DVD4250D_Service_Man DVD4250

User Manual: DVD4250

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DVD4250D
DVD PLAYER

SERVICE MANUAL

1

1. G ENERAL DESCRIPTION
1.1 ES66x8
The ES66x8 Vibratto II processor is a highly integrated single-chip DVD solution that integrates read
channel, ECC, Servo DSP, MCU, and MPEG-2/MPEG-4/DivX decoder that has a state-of-the-art 480p/576p
progressive-scan video feature to provide brilliant and sharp, flicker-free video output to the display, and with
built-in gamma correction and S/PDIF input and output support. The 66x8 performs audio/video stream data
processing, TV encoding, Macrovision copy protection, DVD system navigation, system control, and
housekeeping functions.
The Vibratto II DVD processor is built on the ESS proprietary dual CPU Programmable Multimedia
Processor (PMP) core consisting of 32-bit RISC and 64-bit DSP processors and offers the best DVD feature set.
These features can be listed as follows:

General Features:
−

Single -chip DVD processor incorporating all front-end and back-end functions.

−

Unified memory architecture.

−

Built-in ADCs and DACs for servo control signals .

−

DVD-Video, DVD-VR, VCD 1.1 and 2.0 and SVCD

−

Proven ECC, EFM/EFM+ demodulation, and EDC circuit.

−

Direct interface of 16-bit DRAM up to 128-Mb capacity.

−

Direct interface of 8- or 16-bit SDRAM up to 128-Mb capacity.

−

Direct interface for up to 4 banks of 8-bit EPROM or Flash EPROM for up to 4 MB per bank.

−

Direct interface to the ES6603 servo AFE chip.

Video Related Features:
−

Integrated NTSC/PAL encoder with pixel-adaptive de-interlacer and five 10-bit 54 MHz video DACs .

−

DivX and MPEG-4 Advanced Simple Profile at full screen.

−

Media playback with CD-ROM, CD-R/RW, DVD-R/RW and DVD+R/RW.

−

Macrovision 7.1 for NTSC/PAL interlaced video.

−
−

Macrovision NTSC/PAL (480p/576p) progressive scan video.
Simultaneous composite, S-video and YUV outputs.

−

CCIR656/601 YUV 4:2:2 output.

−

OSD controller supports 256 colors in 8 degrees of transparency.

−

JPEG digital photo CD support ( Kodak Picture CD and Fujifilm FujiColor CD ).

2

Audio Related Features:
−

Full DVD-Audio support including MLP and LPCM decode, CPPM decryption, and watermark detection.

−

Up to 7.1 channel audio outputs .

−

Bass management.

−

Dolby Digital ( AC-3 ), Dolby Pro Logic, and Pro Logic II.

−

DTS surround ( ES6698 only ).

−

S/PDIF digital audio input and output.

−

SRS TruSurround.

−

Professional karaoke with full scoring scheme.

1.2 M EMORY
1.2.1 System SRAM Interface
The system SRAM interface controls access to optional external SRAM, which can be used for RISC
code, stack, and data. The SRAM bus supports four independent address spaces, each having programmable bus
width and wait states. The interface can support not only SRAM, but also
ROM/EPROM and memory-mapped I/O ports for standalone applications are supported.
1.2.2 DRAM Memory Interface
The Vibratto II provides a glueless 16-bit interface to DRAM memory devices used as video memory
for a DVD player. The maximum amount of memory supported is 16 MB of Synchronous DRAM (SDRAM).
The memory interface is configurable in depth to support 128-Mb addressing. The memory interface controls
access to both external SDRAM or EDO memories, which can be the sole unified external read/write memory
acting as program and data memory as well as various decoding and display buffers.

1.3 FRONT PANEL
The front panel is based around an Futaba VFD and a common front panel controller chip, (uPT6311).
The ES66x8 controls the uPT6311 using several control signals, (clock, data, chip select). The infrared remote
control signal is passed directly to the ES66x8 for decoding.

1.4 REAR PANEL
A typical rear panel is included in the reference design. This rear panel supports:
- six channel and two channel audio outputs
- Optical and coax S/PDIF outputs.
- Composite, S-Video, and SCART outputs
The six-video signals used to provide CVBS, S-Video, and RGB are generated by the ES66x8’s internal video
DAC. The video signals are buffered by external circuitry.
Six channel audio output by the ES66x8 in the form of three I2 S (or similar) data streams. The S/PDIF serial
stream is also generated by the ES66x8 output by the rear panel. A six channel audio DAC are used for six
channel audio output with ES66x8, and similarly one Audio DAC is used for two channel audio output with
ES66x8.

3

2. System Block Diagram and ES66x8 Pin Description
2.1 ES66x8 Pin Description

4

5

6

7

8

2.1 SYSTEM BLOCK DIAGRAM
A sample system block diagram for the ES66x8 Vibratto II DVD player board design is shown in the
following figure:

9

3. AUDIO OUTPUT
The ES66x8 supports two-channel analog audio output while ES66x8 supports six-channel analog audio output.
In a system configuration with six analog outputs, the front left and right channels can be configured to provide
the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround
system.
The ES6008 also provides digital output in S/PDIF format. The board supports both optical and coaxial S/PDIF
outputs.

3. AUDIO DACS
The ES66x8 supports several variations of an I2 S type bus, varying the order of the data bits (leading or no
leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the ES66x8
internal configuration registers. The I2 S format uses four stereo data lines and three clock lines. The I2 S data and
clock lines can be connected directly to one or more audio DAC to generate analog audio output.
The two-channel DAC is an CS4392. The DACs support up to 192kHz sampling rate.
The outputs of the DACs are differential, not single ended so a buffering circuit is required. The buffer circuits
use National LM833 op-amps to perform the low-pass filtering and the buffering.

5 VIDEO INTERFACE
5.1 Video Display Output
The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the
Vibratto II. The output section consists of a programmable CRT controller capable of operating either in Master
or Slave mode.

10

The video output section features internal line buffers which allow the outgoing luminance and chrominance data
to match the internal clock rates with external pixel clock rates, easily facilitating YUV4:2:2 to YUV4:2:0
component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation.
Video Bus
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR1656 pixel
format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y)
pixels; there are as many chrominance lines as luminance.
Video Post-Processing
The Vibratto II video post-processing circuitry provides support for the color conversion, scaling, and filtering
functions through a combination of special hardware and software. Horizontal up-sampling and filtering is done
with a programmable, 7-tap polyphase filter bank for accurate
non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the
applicable scaling ratio.
Video Timing
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The
double clock typically is used for TV displays, the single for computer displays.

6 SDRAM MEMORY
The memory bus interface generates all the control signals to interface with external memory. The Vibratto II
supports different configurations using the memory configuration bits SDCFG[1:0] (bits 12:11), the SD8BIT bit
(bit 14), and SD64M bit (bit 15) in the BUSCON_DRAM_CONTROL register. Configurations can be
implemented in many ways. The following table lists the typical SDRAM configurations used by the Vibratto II.
Typical SDRAM Configurations:

The memory interface controls access to both external SDRAM or EDO memories, which can be the sole unified
external read/write me mory acting as program and data memory as well as various decoding and display buffers.
At high clock speeds, the Vibratto II memory bus interface

11

has sufficient bandwidth to support the decoding and displaying of CCIR1656/601 resolution images at full
fra me rate.

7 FLASH MEMORY
The decoder board supports AMD class Flash memories. Currently 4 configurations are supported:
FLASH_512K_8b
FLASH_1024K_8b
FLASH_512Kx2_8b
FLASH_512Kx2_16b
The Vibratto II permits both 8- and 16-bit common memory I/O accesses with a removable storage card via the
host interface.

8 S ERIAL EEPROM MEMORY
An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup,
etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the
same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or
equivalent.

9 AUDIO INTERFACE AUDIO SAMPLING RATE
CONFIGURATION

AND

PLL COMPONENT

The ES66x8 Vibratto II audio mode configuration is selectable, allowing it to interface directly with
low-cost audio DACs and ADCs. The audio port provides a standard I2 S interface input and output and S/PDIF
(IEC958) audio output. Stereo mode is in I2 S format while six channels Dolby Digital (5.1 channel) audio output
can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low
skew. The transmit I2 S interface supports the 128, 192, 256, 384, and 512 sampling frequency formats, where
sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2 S
transmit interface can be 16, 18, 20, 24, and 32-bit samples.
For Linear PCM audio stream format, the Vibratto II supports 48 kHz and 96 kHz. Dolby Digital audio
only supports 48 kHz. The ES6008/18 Vibratto II incorporates a built-in programmable analog PLL in the device
architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either
be an output from or an input to the ES66x8 Vibratto II . Audio data out (TSD) and audio frame sync (TWS) are
clocked out of the Vibratto II based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is
used to clock in audio data in (RSD) and audio receive frame sync (RWS).

10 FRONT PANEL
10.1 VFD CONTROLLER
The VFD controller is a PTC PT6311. This controller is not a processor, but does include a simple state
machine which scans the VFD and reads the front panel button matrix. The 6311 also includes RAM so it can
store the current state of all the VFD icons and segments. Therefore, the 6311 need only be accessed when the
VFD status changes and when the button status is read. The ES66x8 can control this chip directly using PIO pins
or can allow the front panel PIC to control the VFD.

11 MISCELLANEOUS FUNCTIONS
11.1 RESET CIRCUITRY
Two different chips are supported to provide the power-on-reset and pushbutton reset function:
AAT3521 or V6300.

12

12 CONNECTORS
12.1 SCART CONNECTORS
Pinout of the scart connector:
1 ? Audio Right Out
2 ? Audio Right In
3 ? Audio Left / Monu Out
4 ? Audio Gnd
5 ? Blue Gnd
6 ? Audio Left / Mono In
7 ? Blue
8 ? Control Voltage
9 ? Green Gnd
10 ? Comms Data 2
11 ? Green
12 ? Comms Data 1
13 ? Red Gnd
14 ? Comms Data Gnd
15 ? Red
16 ? Fast Blanking
17 ? Video Gnd
18 ? Fast Blanking Gnd
19 ? Composite Video In
20 ? Composite Video Out
21 ? Shield
Some cheaper SCART cables use unshielded wires, which is just about acceptable for short cable lengths. For
longer lengths, shielded coax cable become essential.

Scart Signals:
Audio signals
0.5V RMS, <1K output impedance, >10K input impedance.
Red, Green, Blue
0.7Vpp ? 2dB, 75R input and output impedance. Note that the Red connection (pin 20) can alternatively carry the
S-VHS Chrominance signal, which is 0.3V.
Composite Video / CSync
1Vpp including sync, ?2dB, 75R input and output impedance.Bandwidth = 25Hz to 4.8MHz for normal TV
Video de-emphasis to CCIR 405.1 (625-line TV)
Fast Blanking
75R input and output impedance. This control voltage allows devices to over-ride the composite video input with
RGB inputs, for example when inserting closed caption text. It is called fast because this can be done at the same
speeds as other video signals, which is why it requires the same 75R impedances.

13

0 to
Left

0.4V: TV
unconnected,

is
it

driven
is

by the
pulled

composite
to
0V

video
by

input
its

signal
75R

(pin 19).
termination.

1V to 3V: the TV is driven by the signals Red, Green, Blue and composite sync. The latter is sent to the
TV on pin 19. This signal is useful when using a TV to display the RGB output of devices such as home
computers with TV-compatible frame rates. Tying the signal to 5V via 100R forms a potential divider
with the 75R termination, holding the signal at around 2V. Alternatively, if a TTL level (0 to 5V)
negative sync pulse is available, this will be high during the display periods, so this can drive the
blanking signal via a suitable resistor.
Control Voltage
0 to 2V = TV, Normal.
5 to 8V = TV wide screen
9.5 to 12V = AV mode

13. CIRCUIT DESCRIPTION
13.1 POWER SUPPLY:
−
−
−
−
−
−

Socket PL2 is the 220VAC input.
Socket PL3 is used for the power button on the front panel.
3.15A fuse F1 is used to protect the device against short circuit.
Voltage is rectified by using diodes D1, D2, D3 and D4. Using capacitor C33 (47?f) a DC voltage is
produced. (310- 320VDC).
The current in the primary side of the transformer TR2 comes to the SMPS IC (TNY267P). It has a built-in
oscillator, over current and thermal protection circuitry and runs at 133kHz. It starts with the current from
the primary side of the transformer and follows the current from the feedback winding.
Voltages on the secondary side are as follows: 12 Volts at pin11 at C42, 5 Volts at C40,3.3 Volts at C38,
-22Volts at C44,-12 Volts at D22.

−

−

D14 TL431 is a constant current regulator. TL431 watches the 5 volts and supplies the required current to
IC2. There are a LED and a photo transistor in IC2. The LED inside the IC2 transmits the value of the
current from D25 to phototransistor. Depending on the current gain of the phototransistor IC3 keeps the
voltage on the 5-volt-winding constant.
–22 Volts is used to feed the VFD (Vacuum Fluorescent Display) driver IC on the front panel.

14

Functional Block Diagram of Switcher

13.2 FRONT PANEL:
−
−
−
−
−
−

All the functions on the front panel are controlled by U1 (ES66x8) on the mainboard.
U1 sends the commands to IC2 PT6311 via socket J2 (pins 3,4 and 5).
There are 48 keys scanning function, 5 LED outputs, 1 Stand-by output and VFD drivers on PT6311.
Vacuum fluorescent display is specially designed for DVD.
The scanned keys are transmitted via PT6311 to U1 on the mainboard.
IR remote control receiver module sends the commands from the remote control directly to U1.

13.3 BACK PANEL:
−
−
−
−

There are 1 SCART connector (con24), 2 pieces RCA audio jacks for audio output, 1 coaxial digital audio
output and 1 laser digital audio output on the back panel.
MOFT3C2 is used for laser output.
Left and right audio outputs are on RCA Conn 6.
LUMA and CHROMA signals of S-Video are transmitted to P1 via transistors Q39 and Q37 respectively.

15

CD Update Procedure of 4250D
1.

Download the update file from the convenient link according to your default language choice.

2.

While there is no CD in the DVD (No Disc Mode) , press “Menu 1 3 5 7” buttons on the remote control
in order to reach the Service Menu of DVD Player:

3.

2.1. Note the software version described as “b.xx “ to be able to compare the sw. Version after update
process.
Copy the update file to the desktop and rename it according to the update file name in the hidden menu of
the device.
For example If C2M1AS__ is written then rename it like C2M1AS__.rom
If P6M1AS__ is written then rename it like P6M1AS__.rom
(If you receive the update file already renamed (with addition of .rom) from the customer technical support
department by giving the SAP code of the product then burn the already renamed file with nero program as
it is shown below.)

4.

Burn the renamed files by Nero program with below set up.

5.

After burning process is completed, place the update CD into the DVD tray and press play button.

6.

Wait to see the update process steps as shown below. When the sw. Update is completed unit will switch
itself to standby mode.

7.

Finally, press the eject button and take out the update CD while DVD Player remains at stand by Mode.

8.

Updating process has been completed. To check whether it is updated correctly or not, repeat the first step
for comparing software version

9.

If the previous and letter names are different, CD is update has completed successfully. If the name remains
same than go through the steps from the beginning.

IMPORTANT NOTE: If the AC source breaks down while the updating the unit (main board) will be
totally out of order. This kind of units/boards is out of Warranty.

16

Brief Information of Naming the File
Software version differs from each other depending on front models. 23xx and 24xx are called Old VFD and
25xx and 26xx are called Mini VFD. Each character in the file name is an abbreviation of a description as
illustrated below.

C2M1AS__
Progressive Option (with progressive : P, without progressive: _ )
DMR option (with DMR:R, without DMR:_ )
Loader Type (S loader:s W loader:w)

Flash Type ( AMD:A, Intel:I )
Language group

VFD type

DAC channel (2, 6)

DAC Type

17

Pay attention the left side. Select CD and CD_ROM (ISO) on the upper left side of screen

18

Select No Multisession

19

Format is Mode 1

20

21

Leave the dates as it is

22

Leave it as it is

23

Click the “New” on the upper right corner of the screen

24

Select your file from file browser then you will see your file in the “Name” section on the right side and then
copy the files to under “Name” section on the left side.(this is just an example you will see your file name when
you are doing this process)

25

Click the “Burns the current compilation”

26

Then you will see this screen and click the “Burn” on the right upper side of screen

27

You will see this screen and tray will open itself on computer ,then place the CD in CD-ROM
And it will start writing. At the end you will see “burn complited”

.

28

VCC33

RFGND
SBAD
FEI
CEI
TEI

1

CVBS
Y
V
U
CVBS

CVBS + RGB

Y
G
R
B
C

CVBS
G
R
B
CVBS

L1
2.4UH

UDAC (5)

D2
R6

D3

C1
470PF

75 OHM

1N6263

GND

C2
470PF
GNDV
2.4UH

75 OHM

C3
470PF

C4
470PF

2

D13

CDAC (5)

21

GNDV
L3

GNDV
2.4UH

D11

YDAC (5)

R63
0.1U
C8
0 OHM

R50

1N6263

D12

C6
470PF

0.1U
1N6263 GNDV

RFGND

75 OHM

C5
470PF

2

C7

390
VCC33V

1

20K

GNDV
GND

D8

GNDV

GNDV
2.4UH

GNDV
L4

VCCV

VDAC (5)

R62
1N6263

VCC33

1

TSD2

0.1U

R11

1N6263 GNDV

VCCV

TSD1
TSD0
TWS
UDAC1
CDAC1
YDAC1
GNDV
VCC33V
VDAC1
FDAC1
RSET
COMP
VREF
VS33_PL2

C

0.1U

L2

GNDV

VCCV

GNDV

VCC33V

SPDIF
TBCK
MCLK

0.1U

GNDV

D4

1N6263

XS XS XS

VCC20
XFLAG3
XFLAG2
XFLAG1
XFLAG0
RXD
TXD

CC16

UDAC1
CDAC1
YDAC1
VDAC1
FDAC1

1

GND

21

GND

1U

TESTAD

CC13 CC14 CC15

C9
470PF

75 OHM

D9

C10
470PF

RR16

1.2K

CC22
0.1U
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208

0
RR17
RR18

0.1U

PLLGND

47P

10K
5.1K
TR1
TR2

0.1U

SVREF15
(3) OPEN
SPINDLE
FOCUS
SLEGN

0.015U
CC32

560P
CC33

0.015U

560P

0.015U

SCSJ
SDATA
SCLK
CC35 CC36 CC37

RFGND
R23
R65
R64

33
33
33

R26

33

U5

17

CAS

16

WE

DWE#

R41

33

DQM

R44

33

RAS1#
RAS2#

R46
R47

33
33

15
39

DQML
DQMH

20
21

BA0
BA1

36
40

NC
NC

VCCQ
VCCQ
VCCQ
VCCQ

LD3
LD2
LD1
LD0
LOE#
WRLL#
LCS3#
VCC20

6
12
46
52

VSS
VSS
VSS

28
41
54

4Mx16 SDRAM (9ns)

32/64MBIT SDRAM

R17
R18

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

WRLL#
RESET#

LCS2#
LA0
LA1
LA2

LA19
LA18
LA8
LA7
LA6
LA5
LA4
LA3
LA2

LA3
LA4
LA5
LA6
LA7
LA8

0
OPEN

LA17

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

A16
BYTE
GND
DQ15/A_1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
G
GND
E
A0

A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
W
RP
VPP
DU/WP
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1

LCS2#
LA9
LA10
LA11
LA12
LA13
LA14
LA15

LA0
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
LOE#
LA1

GND

LCS3#
U4
LA0
LA1
LA2
LA3
LA4
LA5
LA6
LA7
LA8
LA9
LA10
LA11
LA12
LA13
LA14
LA15
LA16
LA17
OPEN
0 OHM
OPEN
0 OHM
LCS3#
LOE#

JP1
LA16
LA17
LA18
LA19
LA20
LA21
DQM

R32
R34
R35
R68
REMOVE
R32, R35
R34, R68

TYPE
EPROM
FLASH

12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
31
1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

22
24

CE
OE

D0
D1
D2
D3
D4
D5
D6
D7

13
14
15
17
18
19
20
21

LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7

VCC

VCC

32

GND

16

27C040/080-90

100K

FB4
3.3UH

Y1

R43
0

VCC
R19

27M

GND

RESET#
WRLL#
LA20

VCC
GND

R42
VSSQ
VSSQ
VSSQ
VSSQ

GNDV

GNDV

U2
LA16
LA15
LA14
LA13
LA12
LA11
LA10
LA9
LA20

WRLL#
LA18

DB13
DB12
DB11
DB10
DB9
DB8
DSCK

33

IR
VFD-CLK
VFD-CS
VFD-DATA

DB3
DB4
DB5
DB6
DB7
DB15
DB14

R40

3
9
43
49

GNDV

GND

VCC
RAS2#
DOE#
DWE#
DB0
DB1
DB2

CAS#

VCC
VCC
VCC

RAS0#
RAS1#

RAS

DMA11
CAS#
CS0#

CS

18

C13

C14

27PF

27PF

GND

C15
1000PF

GND

GND

RESET
GND
NC
EN
VCC

RESET#

1
2
3
4
5

R37
OPEN\0
R36
OPEN\0

AAT3521 SOT-23(5pin)
U11
GND 1
RESET 2
VCC 3

RESET# (3)

IR
VCC
VFD-DATA
VFD-CLK
VFD-CS

EM-MARIN
RESET IC

AAT3520 SOT-23(3pin)
GND

R36
OPEN
0

0

R45

OPEN

1
3

RESET CLK/CE1
WE ADDR/CE1

2
4

LA21

LCS2#
IR
+5V
VFD-DATA
VFD-CLK
VFD-CS
GND

4-PIN EXTENSION FOR ROM EMULATOR INTERFACE

HDR6-100
GND

U10
AAT3521
V6300

1
2
3
4
5
6

R48

ROM EMULATOR SOCKET

J2

100K

U10
10x4

19

33

RN3

33

R57

C12
470PF

U7

8
7
6
5

R58

RAS0#

C11
470PF

75 OHM

VCC
VCC33

LD7
LD6
LD5
LD4

INSTALL
R34, R68
R32, R35

10x4

CS0#

1
14
27

GNDV

LA19

RN2

CKE

RESET#

1
2
3
4

37

DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15

MA8
MA9
MA10
MA11

CLK

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10

38

VCC33
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

8
7
6
5

33

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

10x4

33

23
24
25
26
29
30
31
32
33
34
22
35

1N6263

VD33_PL1

104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53

R60
R56
R54
R55
R31

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11

EAUX43
EAUX42
EAUX41
EAUX40

RN1

GND (5) SCART-ON

(4)
(4)
(4)
(4)

RS232_DET

1
2
3
4

(5) NN

33P

MA4
MA5
MA6
MA7

8
7
6
5

33P

R53
1K

8
7
6
5

33P
R52
1K

(3) INSW
(3) HOMESW
(3) CLOSE
(3) OUTSW
(3) DRVSB

FDAC (5)

R61

FERB

VD33_PLL
RWS/TDMFS
RBCK/TDMCLK
RSD/TDMDR
LD7
LD6
LD5
LD4
VD33
VS33
LD3
LD2
LD1
LD0
LOE
LWRLL
LCS3
VDD
VSS
LCS2
LCS1
LCS0
LA0
LA1
LA2
VD33
VS33
LA3
LA4
LA5
LA6
LA7
LA8
VDD
VSS
LA9
LA10
LA11
LA12
LA13
LA14
LA15
VD33
VS33
LA16
LA17
LA18
LA19
LA20
LA21
DQM
VD33

Vibratto-II

GNDV
2.4UH

GNDV
L5

D10

FB2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

VCC

XSCSJ
XSDATA
XSCLK
DEFCT
SLDC
SPDON

XIN
XOUT
DCLK
DMA0
DMA1
DMA2
DMA3

(3) SCSJ
(3) SDATA
(3) SCLK

24C01A

33
33
33

SVREF15

(3) SVREF15

SERIAL EEPROM
U3

CC31
0.015U RR27
RR28
RR29

4.7K
33
33
33
33

7.5nF

CC30

5.1K
6.8K
6.8K
SFGIN

1
2
3
4

BA5954

6.8K
6.8K

RR24
RR25
RR26

DA
CC28

AM5868

RR21
RR22

SLEGP

TRACK

(3) TRACK

0

MA0
MA1
MA2
MA3

(3) SPINDLE
(3) FOCUS
(3) SLEGN

RR96

AVSS_DS
AVSS_PL
XSPDOFTR1
XSFDO
XSFTROPI
AVDD3_PL
XSPLLFTR1
XSPLLFTR2
XSVREF0
XSAWRC
AVSS_DA
XSRFRPCTR
XSTRAY
AVDD3_DA
XSSPINDLE
XSFOCUS
XSSLEGP
XSSLEGN
XSTRACK
XSTESTDA
XSFGIN
XSPHOI
SXCSJ
XSDATA
XSCLK
XSDFCT
XSLDC
XSSPDON
VD33
VS33
XGPIO[9]
XGPIO[8]
XGPIO[7]
XGPIO[6]
XGPIO[5]
XGPIO[4]
EAUX03
EAUX02
EAUX01
EAUX00
VSS
VDD
AUX0
AUX1
AUX2/ HSYNC
AUX3/ VSYNC
AUX4
AUX5
AUX6
AUX7
RESET
VS33

1N6263 GNDV

GNDV

U1
ES66x8

TMS28F400Axy

TR1

PLL33V

21

CC18
C
CC19
C
CC21
0.047U
CC23
560P

2

R

CC27
0.1U

R69

S-VIDEO + RGB

CVBS + YUV

2
SVREF15

R

RFGND

DOE#

VCCV

1
2
3

RR14

CC24 CC25 CC26

R33

1U
CC12

RFRP

RR9

TR2

DSCK

FB1
FERB

4.7U

CC46

68K

GND

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

TESTAD

RR87

GND

GND

XSDSSLV
XSRFIP
XSRFIN
XSIPIN
AVDD3_DS
XSIREF
XSVREF[15]
XSVREF[09]
XSVREF[21]
AVDD3_AD
XSRFRP
XSTEI
XSCEI
AVSS_AD
XSFEI
XSSBAD
XSTESTAD
XSTEXI
VDD
VSS
XSFLAG[3]
XSFLAG[2]
XSFLAG[1]
XSFLAG[0]
XSIP1
XSIP2
XSLG
XSWBL
XSWBLCLK
VS33
VD33
SPDIFIN
SPDIF/SEL_PLL3
TBCK
MCLK
TSD3
TSD2
VS33
TSD1/SEL_PLL1
TSD0/SEL_PLL0
TWS/SEL_PLL2
YUV0/UDAC
YUV2/CDAC
YUV5/YDAC
VS33_DA
VD33_DA
YUV6/VDAC
YUV7/FDAC
YUV4/RSET
YUV3/COMP
YUV1/VREF
VS33_PL

0
33K

VCC
WC
SCL
SDA

VCC

RFRP

RR15
RR12

S0
S1
S2
GND

VCCV
D1

CVBS + S-VIDEO
or CVBS + YUV
CVBS
Y
V
U
C

VDAC
YDAC
CDAC
UDAC
FDAC

1N6263 GNDV
10K

CC8

CC17
6800P

CC20
1U

1
2
3
4

R10
4.7K

VIDEO OUTPUT TABLE

1N6263
VCCV

R5
4.7K

R59

EAUX40
EAUX41
EAUX42
EAUX43

RR10

CC28

R9
4.7K

(4)
(4)
(4)
(4)

MULTI
Frequency
S-CHIP DEFAULT
DEFAULT
S-CHIP
4.5
114.75
4.25
121.5
NA
135
reserved
5
bypass
27
NA
bypass
101.25
108
4
3.75
4.5
121.5
4.25
114.75
reserved
128.25
4.75
NA
94.5
3.5
5.5
148.5
6
4
108
162

PLL0
0
1
0
1
0
1
0
1

21

RR8

RFGND

(3) ATR_OP

R8
4.7K

PLL1
0
0
1
1
0
0
1
1

PLL2
0
0
0
0
1
1
1
1

R4
OPEN

TP38

DIN

RN4

(3) MIRR

R7
4.7K

RR7

SVREF15

RFO

RF33V

1
2
3
4

R3
OPEN

TSD2
TSD1
TSD0
TWS

CC5
0.1U

CC58
4700P
CC59
C
CC61
C
CC55
4700P

SDEFCT (3)
SPDON (3)
SLDC (3)

8
7
6
5

R2
OPEN

2

RR3
RR4
RR5
RR6

DIP

(3) RFO

10x4
VCC33

CC1
CC2
1000P
CC3
1000P
1000P
CC4
1000P
3.3K
3.3K
3.3K
3.3K

RS232 CONNECTOR 2.54MM

(3) DIN
DEFCT
SPDON
SLDC

R1
OPEN

SPDIF (5)
TBCK (4)
MCLK (4)

GND

(3) SBAD
(3) FEI
(3) CEI
(3) TEI

CLK SOURCE
DCLK INPUT
CRSTAL OSC

21

SERVO MCU
DEBUG
HEADER

1
2
3
4
5

SVREF21

(3) SVREF21

PLL3
1
0

JJ1

VCC

RS232_DET

0

VCC33

VD33
XIN
XOUT
DCLK
DMA0
DMA1
DMA2
DMA3
VS33
VD33
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
VS33
VD33
DMA11
DCAS
DCS0
DCS1
DRAS0
DBANK0/ DRAS1
VSS
VDD
DBANK1/ DRAS2
DCKE/DOE/TDMTSC
DWE
DB0
DB1
DB2
VS33
VD33
DB3
DB4
DB5
DB6
DB7
DB15
DB14
VS33
VD33
DB13
DB12
DB11
DB10
DB9
DB8
DSCK
VS33

R51

VCC33

1

4.7K
TXD
RS232_DET
RXD

TP37

RR2

(3) DIP
(3) MOCTL

VCC33

4.7K

TP36

RR1

VCC33

TP2
FLAG1
TP4
FLAG3
TP6
TESTAD
TP8
RFRP
TP10
DIN
TP12
SFOCUS
TP14
SSLEGN
TP16
MIRR
TP18
FEI
TP20
XSPDON

SVREF09
SVREF21

TP1
FLAG0
TP3
FLAG2
TP5
RFO
TP7
DA
TP9
DIP
TP11
STRACK
TP13
SSLEGP
TP15
SSPINDLE
TP17
TEI
TP19
CEI
TP21
FGIN

XFLAG0
XFLAG1
XFLAG2
XFLAG3
RFO
TESTAD
DA
RFRP
DIP
DIN
TRACK
FOCUS
SLEGP
SLEGN
SPINDLE
MIRR
TEI
FEI
CEI
SPDON
SFGIN

R37
0
OPEN

VESTEL
Title

Vibratto-ll ES66X8
Size
C

Document Number

Date:

Wednesday, March 03, 2004

Rev
A1

VESTEL-4250H-A1
Sheet

2

of

5

RF50V

DIN (2)
DIP (2)

CC38
0.1U
CC39
0.1U

CC41
470P
CC43
470P

RR52
(2) SVREF15
MVCC

33
CC75
0.1U

RR53
12K

RFGND
RFOUT

CC48
820P
RF50V

RF50V
CC45
0.01U
12K(1%)

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

RR34

CC51
2200P
CC52
2200P
CC53
2200P
CC56
2200P

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

CC57
120P

ES6603

F

DD1
1

RR56

(2) SLEGN

1K

CC50
0.1U
OP2OUT
RFGND
SCSJ
SDATA
SCLK

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

RR112

SCSJ (2)
SDATA (2)
SCLK (2)

OPEN

RR113

OPEN

FOCUS-

RR114

0

CLOSE-1

RR115

OPEN

MVCC

SVREF15
CC60 RF50V
0.1U
RR41

0
LINK

OPEN

47K

CC70
100P
0(OPEN)

RR109

FOCUS1

1

CON2

2

CON1

3

RR55

CC54
0.047U
CE
FE
TE
SBA

33K

RR49

CEI (2)
FEI (2)
TEI (2)
SBAD (2)

RR116

CC73
4700P

TP23
MNTR

LL6
1

MVCC
RR108

0

RR107

DCLOAD+ RR106

DCLOAD-

TP24
DEFCT

RR105

DD4

FB

DVDLDO

FB (0805)

CC64
1000P

2

LL13
CC85

QQ1
2SB1132

RR43

1

RFGND
RR45
RR46

STBY

28

CFCERR1

BIAS

27

CFCERR2

VINTK

26

VINFC

4

VINSL+

CTKERR1

25

5

VINSL-

CTKERR2

24

6

VOSL

7

VNFFC

3
FB (0805)

DD3

PVCC2

PVCC1

VNFTK

20

0(OPEN)

10

PGND

PGND

19

SLED-

11

VOSL-

VOLD-

18

LOAD-/DCMO-

SLED+

12

VOSL+

VOLD+

17

LOAD+/DCMO+

13

VOFC-

VOTK-

16

14

VOFC+

VOTK+

15

0

FOCUS-

1(0805) FOCUS-1
1(0805)

RR66
RR68

TRACK-

0

CC77
0.1U

+

CC78
100U/10V

TRACK-1

RR67
RR69

1(0805)
1(0805)

MGND
TRACKTRACK+

29
30

MVCC
0

RR104

OPEN

R

1
2
3
4
5
6
7
8
9
10
11

5.1K

HOMESW

HOMESW (2)

DCLOAD+

C

LOAD-/DCMOLOAD+/DCMO+
DCLOADDCLOAD+
SLEDSLED+

RR78
OPEN
CC80
MGND
INSW (2)

2.0MM
RR81
1
2

0

RFGND
IN4148

MGND

SLED+
SLED-

1
2

UU5

MVCC

CC82

OUTSW (2)

1

OUT1

2

VM

3

VCC

4

FIN

MVCC
GND

8

OUT2

7

VREF

6

RIN

5

DCLOADMGND
CLOSE-1

RR89

1K

CLOSE (2)

0.1U
BA6287F ROHM
OPEN

MGND

OPEN (2)

2.0MM

RR11

56K

SBA
SDATA
SCSJ
SCLK
SVREF21
SVREF15

CC34

33P

(2) SVREF21

TP30
SBAD
TP32
SCSJ
TP34
SVREF09

TP31
SDATA
TP33
SCLK
TP35
SVREF15

UU4A
4

28
26

0

MEVO

RR72

R

CC10
0

RR83

10K

2

RR84

470K

3

TL3472
1

ATR_OP (2)

CC29
RR75
R

RR85
0.47U

8

RR59

+

CC9
100U/16V

LINK

-

CC6
0.1U

CN1
HOP-1200 PUH (JP24-0.5MM)

R

SVREF15

RFGND
TRACKTRACK+
FOCUSFOCUS+
DVDMDI

LOAD-/DCMO-

RR35

100

RR36

DVDLDO
CDLDO
100

RR70
10K

CDMDI

RR40

R

RR71
1.5K
RR73 1M
OP2OUT

RR74
22K

OP2IN+

25
27

CC62
0.1U

MVCC

RF50V

SVREF21
(2)
8

PVC

RR37
RR39

RFOUT
C
B
A
D
3.3K F
3.3K
E

MGND
LOAD+/DCMO+
RR77
10K

OP2IN-

5

+

6

-

RR76
4.7K
UU4B
7

MOCTL (2)

TL3472
RR79
1.5K

RFGND

4

GND
GND

RR102

RR80

RFGND

RF50V

GND
GND

SPINDLE (2)
SVREF15

OPEN

VCC

J12

BEFR_OP (2)

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

RR101

9

RFGND

TRTR+
FOFO+
PD(MONITOR)
VCC
VR
GND
LD(DVD)
LD(CD)
VR
GND(NC)
PD
GND
RFOUT
C
B
A
D
F
E
VCC
VS(VCC)
GND

CC72
100P
0

SPINDLE1 RR58

0(OPEN)

S12V

TRACK (2)

MVCC

JJ2
C

33K
47K

MGND

CC84
1

RR51
RR54

RR103

RF50V

RR50

22

TRACK1

22K

MVCC

1000P
CC71

2

LL10

CDLDO

1

PREGND

RR48

21

MGND

CC69
100U/16V

2SB1132
QQ2

VINLD

23

STBY

MGND
1
OPEN

FOCUS+

1K

10
10

DD2

1
OPEN

8

MIRR (2)
SLDC (2)

CC68
100U/16V

3

C

PVC
DVDLD
CDLD
DVDMDI
CDMDI

RFGND

0

2

1 DD5
OPEN

SDEFCT (2)
TP25
LINK

3.3K

0

MEVO
CC63
0.22U RF50V
CC65
CC66
160P
CC67
33000P
0.01U

IN4148

R

RR60

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

E

RR47

(2) FOCUS

RFGND
RF33V

SDEN
SDATA
SCLK
V33
LCP
LCN
MNTR
CE
FE
TE
PI
V25
V125
TPH
DFT
LINK

1K

RR97

UU3
BA5954FP/AM5868(OPEN)

CD_F
CD_E
VPB
VC
DVDLD
CDLD
DVDPD
CDPD
VNB
LDON
MIRR
MP
MB
MLPF
MIN
MEVO

D
C
B
A

DVDFRP
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD_D
CD_C
CD_B
CD_A

R

RR88

(2) DRVSB

RFDC
RFSIN
ATOP
ATON
AIN
AIP
VPA
RFAC
BYP
DIN
DIP
FNP
FNN
VNA
MEV
RX

UU2

RR98

MGND

RFO (2)
CC44
0.1U

(2) SPDON

GND
GND

CC40
0.1U
CC42
0.1U

RF50V
RFGND
CC81
0.1U

RR82
22K

VESTEL
Title

ES6603 & Motor Drivers

RFGND

MGND

Size
C

Document Number

Date:

Wednesday, March 03, 2004

Rev
A1

VESTEL-4250H-A1
Sheet

3

of

5

A

B

C

D

E

6-CHANNEL AUDIO OUT
+3.3V

WOLFSON 6-CHANNEL AUDIODAC
2-CHANNEL AUDIO OUT

B55
10UF

C272
0.1UF

VCCA

WOLFSON 2-CHANNEL AUDIODAC

VCCA

VCCA
U38

GNDA
1
2
3
4
5
6
7
8
9
10

(2) EAUX43
(2)
(2)
(2)
(2)

4

TSD0
TBCK
TWS
MCLK

(2) EAUX42
(2) EAUX41
(2) EAUX40

RST
VL
SDATA
SCLK
LRCK
MCLK
M3
M2
M1
M0

U31
CS4360

20
19
18
17
16
15
14
13
12
11

AMUTEC
AUTAAUTA+
VA
GND
AOUTB+
AOUTBBMUTEC
CMOUT
FILT+

AOUT0L- (5)
AOUT0L+ (5)

(2) TSD0
(2) TSD1
(2) TSD2
(2) TBCK
(2) TWS
(2) MCLK

AOUT0R+ (5)
AOUT0R- (5)

(2)
(2)
(2)
(2)

CS4392
U1
U2

GNDA

C258
10UF

C273

C259
10UF

EAUX43
EAUX42
EAUX41
EAUX40

VLS
SDIN1
SDIN2
SDIN3
SCLK
LRCK
MCLK
VD
GND
RST
DIF1
DIF0
M1
VLC

U32
PCM1606

28
27
26
25
24
23
22
21
20
19
18
17
16
15

MUTC1
AOUTA1
AOUTB1
MUTC2
AOUTA2
AOUTB2
VA
GND
AOUTA3
AOUTB3
MUTEC3
VQ
FILT+
M2

AOUT1R- (5)
AOUT1L- (5)

0.1UF

U1
U2

GNDA

DATA1
DATA2
DATA3
FMT1
FMT2
ZEROA
AGND
VOUT5
VOUT6
VOUT1

SCKI
BCK
LRCK
DEMP1
DEMP0
VCC
VCOM
VOUT4
VOUT3
VOUT2

MCLK
TBCK
TWS
EAUX43
EAUX42

20
19
18
17
16
15
14
13
12
11

4

U1
AOUT1R- (5)
AOUT1L- (5)
AOUT0R- (5)
AOUT0L- (5)
AOUT2R- (5)
AOUT2L- (5)

GNDA

B50
0.1UF

10UF

1
2
3
4
5
6
7
8
9
10

AOUT2R- (5)
AOUT2L- (5)

GNDA GNDA
GNDA

TSD0
TSD1
TSD2
EAUX40
EAUX41

AOUT0R- (5)
AOUT0L- (5)

C274
C260

0.1UF

1
2
3
4
5
6
7
8
9
10
11
12
13
14

GNDA

GNDA GNDA GNDA GNDA

T1

T2

T3

T4

TP

TP

TP

TP

GND

GND

RFGND

GND

GNDA
VCCA
C256
U30
CS4340
(2) EAUX43
(2) TSD0
(2) TBCK
(2) TWS
(2) MCLK
(2) EAUX42
(2) EAUX41
(2) EAUX40

3

R71

1
2
3
4
5
6
7
8

33

RST
MUTEC
AOUTL
SDATA
SCLK/DEM1 VCCA
VSS
LRCK
MCLK
AOUTR
DIF1
REF-GND
DIF0
VQ
DEM0
FILT+

0.1UF
16
15
14
13
12
11
10
9

3

AOUT0L- (5)
AOUT0R- (5)
U1
U2

GNDA

VCCA

+3.3V
1

1

B51
D23
10UF IN4148

D24
IN4148

3.3V REGUALTOR
VCC
+5V
LL2
FERB

ES66x8

C23
OPEN
(10UF)

2

2

B15
0.1UF

B16
0.1UF

B17
0.1UF

B18
0.1UF

B19
0.1UF

B20
0.1UF

B21
0.1UF

B22
0.1UF

B31
10UF

B33
10UF

CC7
100/10

+

OPEN

IN

OUT

FRONT
2

ADJ

RF50V

Q2

1

VCC33

VCC33
3

R38
OPEN
1%
(412 OHM)

(EZ1085)

CC11
0.1
GND

RFGND

B23
0.1UF

B24
0.1UF

B25
0.1UF

B28
0.1UF

B29
0.1UF

B30
0.1UF

LL1
FERB

B32
10UF

GND

2

PLL33V

VCC33

LL7

LL5
FERB
2

RF33V

B34
0.1UF

B35
0.1UF

B36
0.1UF

B37
0.1UF

B38
0.1UF

B40
10UF

B43
0.1UF

B41
0.1UF

B62
10UF

0.1UF
B60

2
4

B61
0.1UF

R67
412(1%)

OUT
OUT

IN

3

VCC
CC125
0.1

CC126
0.1

CC127
0.1

CC128
0.1

CC129
0.1

+

R66
250(1%)

24C01

LL9

GND

+5V

LL14 2

C16
0.1UF(OPEN)

2 FERB

LL12

2 FERB

VCC
B3
220UF

CC130
100U

GNDA

GND

+12V

-12V

S12V

VCC33

8
7
6
5
4
3
2
1

B4
220UF

B1
220UF

GND
B45
0.1UF

GND

1

2.54MM
JS3

GND

GNDA
GND

VESTEL

GND

Title

GND

ESS CONFIDENTIAL

MISC

The information has been checked and is believed to be reliable. However, no responsibility is assumed for inaccuracies. Circuit diagrams are provided as a means of illustrating typical applications; consequently complete information for construction purposes is not necessarily given. ESS reserves the right to make changes at any time in order to improve the design.

A

2 OPEN

FERB

LL11
VCCA

GND

GND

VCC33

MVCC

1

RFGND

2 OPEN

MGND

GND

VCC20
TYP 2.5V ( 2.3V -- 2.7V )

2 OPEN

VCC33
U9
AMS1117

VCC20

GND

LL3

2

VCC33V

LL8

ADJ

VCC

SDRAM

INP

OUT

1

VCC33

ADJ

2

GND

2 OPEN

GNDV

VCC33
LL15
FERB

GND

B2
OPEN
(100UF)

R39
OPEN
1%
(681 OHM)

No need to install
EZ1085 circuitry if
J12 provide +3.3V

RFGND

EZ1085

B

C

D

Size
C

Document Number

Date:

Wednesday, March 03, 2004

Rev
A1

VESTEL-4250H-A1
Sheet
E

4

of

5

C

10 OHM

4

R160
100K

C224
22PF

QUIET0 1 R163
470

1 R154

1

3

4

R161
100K

C225
22PF

1

(2) UDAC

C299
100uF/25

11K

QUIET0
680

C177
open

1

680PF

R13

R164

Q24
2SC3327

2

470

1

R431
1K8

B-OUT

1

C232
0.1UF

R432
75

R435
75

GND

10 OHM

10UF

V4

R151
100K

C218
22PF

R16
C181

680PF

QUIET0 1 R155
470

10K

1

Q21
2SC3327

2

+5VA
1

OPEN

1

1
R416

3

V-

R174

1

IN4148

1

2

3

-12V
U27A
1

2
2

1

7404

R166
10M
U27B

U27C

U27D

U27E

C228
(2) SPDIF

1

SCART-ON (2)

GND

VCC

10UF
R159
100K

R407
10K

2 1

100K

10 OHM

4

10K

C291
3300PF

2

FR

1

GND

Q34
2N3904

GND

R156

2

C290
680PF

R413
1.2K

Q26
8550

1

C219
1

10K

10UF

V+

3

R411
820

D7
Q27
2N3904

12

470

1

(4) AOUT0R+

U23-1
OPA2134UA

8

R415
680

R414

C289

R176

1

+12V

3
1

R173
+12V

10K

QUIET0
R171
1K

open

2

R420

Q25
8550

2

3

10UF

C180

1
10K

R405
100K

1

470uF
1

CON24
GND

+5VA

C227
220uF/25
R170 1K
1
1

1

(4) AOUT2L-

R404
10K

D25
IN4148

GND
C226

R167
2.2K

1

680

3

R15

D5
IN4148

R165
6.8K

IN4148
D6

1

3

1

6

1

R14

1

Q35
2N3904

R403
3 330

1

1
CC

1

1
1

C_OUT

+12V

-12V
C288

FL
FR

Q33
8550
3

1

R148

10K
C287
3300PF

Q32
8550

R406
10K

1 2

3

1

R412

C215
7

C286
680PF

10K

10UF

V+

5

R408
10K

(2) NN

1

1

1

1

GNDV

1

1
2
3
4
5
6
7
8
9
10
11

1

1

1

8

R410
680

R409

C285
(4) AOUT2L+

GNDV

U24-2
OPA2134UA

R401
10K
3

+12V

+12V

10K

1
1

3
1
1

FB

1

10UF

C172

1

FB3

3

R197

1

R196
1

3

C284

Q31
2N3904
1

2

+5VA

Q38
BC848B

2

Q30
8550

1

R429
2K2

10 OHM

J1

CVBS-OUT
R-OUT
G-OUT
B-OUT

+5VA

R402

10UF

V-

10K

VCC

SUB

2

1

R158

-12V

(4) AOUT1L-

GNDV

2

680PF

2

C283
3300PF

GNDV

GNDV

1

10K
3

1
1

C282

VCCV

C221
LFE_OUT

1
R400

3

(2) SCART-ON

V+

3

10K

10UF

GNDV
GNDV
U24-1
OPA2134UA

8

1

3

1

1

4

CHROMA-OUT

Q20
2SC3327

2

+12V

R399
680

R398

C281
(4) AOUT1L+

4

1

10K

R445
75

R444
75

5

LUMA-OUT

470

680PF

1

R437
1K8

1

C235
open

R426
75

R428
75

1 R-OUT

21

R195

680

R425
1K8

CHROMA-OUT

1

6

5

2

QUIET0

1
10K

10UF

R153
1

C301
100uF/25

6
CVBS-OUT

1

1

(4) AOUT1R-

C211

Q40
BC848B

2

2

-12V
R186

3

C298
100uF/25
1

4

C217
22PF

1

(2) CDAC

Q37
BC848B

2

1

1

(2) FDAC

1

1

10 OHM
R150
100K

P1
R438
2K2

R422
2K2

LS

1
10UF

680PF

R175

GNDV

3

R30

Ls_OUT

V-

C278
3300PF
C279

R436
75

1
C214
7

10K

R433
1K8

GNDV
VCCV

6

C277

LUMA-OUT

VCCV

U25-2
OPA2134UA

V+

5

R339

1
R434
75

GNDV

1

(4) AOUT1R+

1

GNDV

1

10K

R427
75

G-OUT

1

R397
680

R338

Q23
2SC3327

2

+12V

10K

8

C262
10UF

680

C189
open

10K

CVBS-OUT

1

4

1

C261
10UF

1

C300
100uF/25

R424
75

R441
75
Q39
BC848B

2

3

R25

R12
1

(4) AOUT2R-

C178
680PF

1

(2) YDAC

1
R423
1K8

-12V
4

Q36
BC848B

2

C297
100uF/25

10UF

V-

1

(2) VDAC

1

RS

3

680PF

C276
3300PF

R157

1

10K

2

1

C275

1

R430
2K2

1

Rs_OUT

1
R353

R421
2K2

C220

3

1

V+

3

1

(4) AOUT2R+

R337
680

VCCV

U25-1
OPA2134UA

8
R331
10K

E

1

VCCV

+12V
C263
10UF

D

1

B

1

A

3

C223
22PF

4

5

6

9

8

11

10

0.1UF
7404

7404

7404

7404

-12V
R20
1

(4) AOUT0R-

C184

1
10K

10UF

1
QUIET0

C185
1

680PF

R22
10K

1

R162

R172
Q22
2SC3327

2

470
1

open

U27F

3

C292

R21
680

1M
13

P3

12

P9
RCA CONN

RCA CONN 6

+12V

7404
R178

4
1

C230

1

3

330 OHM

0.1UF

+12V

C213

C216
22PF

680PF

3

C175
10UF

C176
10UF

VCC

2

VIN

1

47UH

1
1

MOFT3C2

R187
68 OHM
C280
0.1UF

2

R28
10K

C193
0.1UF

3

CC
SUB

1

C174
0.1UF

FR
FL

open

Q13
2SC3327

2

C173
0.1UF

RS
LS

C190

10K

1
QUIET0

R152
1
470

GND

1

10UF

1

1

-12V

C188

R27
680

L21
P2

R149
100K

1
1

(4) AOUT0L-

2

GND

10 OHM

10UF

-12V
R24

C296

1

+5VA

1

V4

C295
3300PF

6

8
9

680PF

R179
91 OHM

GND

5
6
7

C294

10K

C170
10UF

FL

1
1

R419

C169
10UF

R29

7

10K

10UF

V+

5

C191
0.1UF

4

R418680
1

1

C128
0.1UF

2
3

8
R417

C293
(4) AOUT0L+

C236
0.1UF

U23-2
OPA2134UA

GND

GND

VESTEL
Title

OUTPUT

A

B

C

D

Size
C

Document Number

Date:

Wednesday, March 03, 2004

Rev
A1

VESTEL-4250H-A1
Sheet
E

5

of

5



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.3
Linearized                      : No
Encryption                      : Standard V1.2 (40-bit)
User Access                     : Print, Copy, Fill forms, Extract, Assemble, Print high-res
Creator                         : DVD4250D_Service_Man - Microsoft Word
Create Date                     : 2004:10:08 09:57:39
Title                           : DVD4250D_Service_Man.PDF
Author                          : barisya
Producer                        : Acrobat PDFWriter 4.0 for Windows NT
Modify Date                     : 2004:10:08 10:17:34+03:00
Page Count                      : 34

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