IPhone - Schematics & Service Manual PDF
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https://www.mobile-manuals.com/
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1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
Thu Apr 17 17:11:44 2014
N61 CARRIER BUILD
D C B A
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TABLE_TABLEOFCONTENTS_ITEM
CONTENTS
SOC:MAIN SOC:I/OS SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC SOC:NAND SOC:CAM,LCD,LPDP,PCIE IO:BUTTON FLEX CONN AUDIO:L67 CODEC (1/2) AUDIO:L67 CODEC (2/2) CAMERA:FRONT FLEX CONN POWER:ADI(1/2) POWER:ADI(2/2) POWER:TIGRISR,VIBE DRIVER DISPLAY:CHESTNUT,BACKLIGHT DRIVER AUDIO:SPKR AMP,STROBE IO:TRISTAR2 IO:DOCK FLEX CONN SENSORS:COMPASS DISPLAY:FLEX CONN SENSORS:MESA FLEX CONN SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM CAMERA:REAR FLEX CONN TOUCH:CUMULUS,MESON POWER:BATT CONN,TPS,PD FEATURES SYSTEM:VOLTAGE PROPERTIES SYSTEM:N61 SPECIFIC BLANK CELL:ALIASES AP INTERFACE & DEBUG CONNECTORS BASEBAND PMU (1 0F 2) BASEBAND PMU (2 OF 2) BASEBAND (1 OF 2) BASEBAND (1 OF 2) MOBILE DATA MODEM (2 OF 2) RF TRANSCEIVER (1 0F 3) RF TRANSCEIVER (2 OF 3) RF TRANSCEIVER (3 OF 3) QFE DCDC 2G PA VERY LOW BAND PAD LOW BAND PAD MID BAND PAD HIGH BAND PAD ANTENNA SWITCH HIGH BAND SWITCH RX DIVERSITY GPS GPS ANTENNA FEEDS WIFI/BT: MODULE AND FRONT END
JUMPER JUMPER
N56_MLB N56_MLB N56_MLB N56_MLB N56_MLB N56_MLB N61_MLB N61_MLB N61_MLB N61_MLB N56_MLB N56_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N61_MLB N/A N61_MLB N56_MLB N56_MLB N56_MLB
N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB N61_RADIO_MLB
SCH 051-9903 BRD 820-3486 MCO 056-6825
BOM 639-4237 (16GB,BETTER) BOM 639-5838 (32GB,BEST) BOM 639-5839 (64GB,ULTRA)
08/29/2013 08/29/2013 08/29/2013 08/29/2013 08/29/2013 08/29/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/29/2013 08/29/2013 08/21/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 08/26/2013 N/A 08/26/2013 09/10/2013 09/10/2013 09/10/2013
03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014 03/24/2014
NAND BOM OPTIONS
PART#
QTY DESCRIPTION
REFERENCE DESIGNATOR(S) CRITICAL
335S0998 1 NAND,19NM,16GX8,MLC,PPN1.5
U0604
CRITICAL
335S0993 1 NAND,19NM,32GX8,MLC,PPN1.5
U0604
CRITICAL
335S0994 1 NAND,19NM,64GX8,MLC,PPN1.5
U0604
CRITICAL
335S00010 1 NAND,19NM,128GX8,TLC,PPN1.5
U0604
CRITICAL
138S0867 1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0610,C0611,C0614,C0634 CRITICAL
138S0867
1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 CRITICAL
138S00003 1 CAP,X5R,15UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 CRITICAL
BOM OPTION
TABLE_5_HEAD
NAND_16G
TABLE_5_ITEM
NAND_32G
TABLE_5_ITEM
NAND_64G
TABLE_5_ITEM
NAND_128G
TABLE_5_ITEM
NAND_16G
TABLE_5_ITEM
TABLE_5_ITEM
NAND_32G & NAND_64G
NAND_128G
TABLE_5_ITEM
ALTERNATE NAND BOM OPTIONS
PART NUMBER ALTERNATE FOR BOM OPTION PART NUMBER
335S0992
335S0998
ALTERNATE
335S1038
335S0998
ALTERNATE
335S1040
335S0994
ALTERNATE
335S00014
335S0994
ALTERNATE
335S00015
335S00010
ALTERNATE
335S00009
335S0994
ALTERNATE
REF DES COMMENTS:
TABLE_ALT_HEAD
U0604 U0604 U0604 U0604 U0604 U0604
TOSHIBA,NAND,16GB
TABLE_ALT_ITEM
HYNIX,NAND,16GB
TABLE_ALT_ITEM
HYNIX,NAND,64GB
TABLE_ALT_ITEM
TOSHIBA,NAND,64GB
TABLE_ALT_ITEM
TOSHIBA,NAND128GB
TABLE_ALT_ITEM
SANDISK,NAND,64GB,TLC
TABLE_ALT_ITEM
SHIELD BOM OPTIONS
PART#
QTY DESCRIPTION
TABLE_5_HEAD
REFERENCE DESIGNATOR(S) CRITICAL
BOM OPTION
604-00241 1 SUBASSY, SHIELD, UPPER FRONT, N61
SH2501
CRITICAL
COMMON
TABLE_5_ITEM
604-00242 1 SUBASSY, SHIELD, LOWER FRONT, N61
SH2502
CRITICAL
COMMON
TABLE_5_ITEM
604-00243 1 SUBASSY, SHIELD, LOWER BACK, N61
SH2504
CRITICAL
COMMON
TABLE_5_ITEM
604-00244 1 SUBASSY, SA SHIELD, N61
SH2506
CRITICAL
COMMON
TABLE_5_ITEM
BOM 639-00208 (16GB,BETTER,DTD) BOM 639-00209 (32GB,BEST,DTD) BOM 639-00210 (64GB,ULTRA,DTD)
BOM 639-00025(128GB,SUPREME,TLC) BOM 639-00212(128GB,SUPREME,TLC,DTD)
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3
2
1
REV
ECN
CK DESCRIPTION OF REVISION APPD
DATE
7 0002727241 ENGINEERING RELEASED
2014-04-18
N61 BOM CALLOUTS
PART#
QTY DESCRIPTION
REFERENCE DESIGNATOR(S) CRITICAL
051-9903 1 SCH, MLB, N61
SCH
CRITICAL
820-3486 1 PCBF, MLB, N61
PCB
CRITICAL
825-6838 1 EEEE FOR 639-4237 16GB
EEEE_G16T
CRITICAL
825-6838 1 EEEE FOR 639-5838 32GB
EEEE_G16R
CRITICAL
825-6838 1 EEEE FOR 639-5839 64GB
EEEE_G16Q
CRITICAL
825-6838 1 EEEE FOR 639-00025 128GB
EEEE_G16N
CRITICAL
825-6838 1 EEEE FOR 639-00208 16GB
EEEE_F98F
CRITICAL
825-6838 1 EEEE FOR 639-00209 32GB
EEEE_FQK0
CRITICAL
825-6838 1 EEEE FOR 639-00210 64GB
EEEE_FQJY
CRITICAL
825-6838 1 EEEE FOR 639-00212 128GB
EEEE_FY9W
CRITICAL
BOM OPTION
TABLE_5_HEAD
?
TABLE_5_ITEM
?
TABLE_5_ITEM
EEEE_16G
TABLE_5_ITEM
EEEE_32G
TABLE_5_ITEM
EEEE_64G
TABLE_5_ITEM
EEEE_128G
TABLE_5_ITEM
EEEE_16G_TDDLTE
TABLE_5_ITEM
EEEE_32G_TDDLTE
TABLE_5_ITEM
EEEE_64G_TDDLTE
TABLE_5_ITEM
TABLE_5_ITEM
EEEE_128G_TLC_TDDLTE
D
ALTERNATE BOM OPTIONS
PART NUMBER ALTERNATE FOR BOM OPTION PART NUMBER
152S1844
152S1836
ALTERNATE
152S1842
152S1849
ALTERNATE
197S0392
197S0369
ALTERNATE
197S0399
197S0369
ALTERNATE
338S1285
338S1202
ALTERNATE
152S2034
152S2033
ALTERNATE
152S00004
152S2049
ALTERNATE
339S00005
339S0246
ALTERNATE
339S0247
339S0246
ALTERNATE
339S00006
339S0246
ALTERNATE
339S00007
339S0246
ALTERNATE
339S00008
339S0246
ALTERNATE
155S0773
155S0453
ALTERNATE
118S0764
118S0717
ALTERNATE
343S0688
343S0638
ALTERNATE
138S00005
138S00003
ALTERNATE
155S00011
155S00008
ALTERNATE
377S0168
377S0140
ALTERNATE
155S0885
155S0610
ALTERNATE
138S0648
138S0652
ALTERNATE
138S0657
138S0702
ALTERNATE
338S00028
338S00017
ALTERNATE
338S00029
338S00017
ALTERNATE
335S00013
335S0894
ALTERNATE
REF DES COMMENTS:
TABLE_ALT_HEAD
L1604
TY ALT INDUCTOR
TABLE_ALT_ITEM
L1519
TY ALT INDUCTOR
TABLE_ALT_ITEM
Y1200
ESPON ALT XTAL
TABLE_ALT_ITEM
Y1200
NDK ALT XTAL
TABLE_ALT_ITEM
U1601
L21 SPKAMP
TABLE_ALT_ITEM
L1209,L1211, L1213
TABLE_ALT_ITEM
1.2MM 1.0UH, CYNTEC
L1210,L1212, L1214
TABLE_ALT_ITEM
1.2MM 0.47UH, CYNTEC
U0201
FIJI, B0, SAMSUNG
TABLE_ALT_ITEM
U0201 FIJI, B0, HYNIX
TABLE_ALT_ITEM
U0201 FIJI, B1, E
TABLE_ALT_ITEM
U0201 FIJI, B1, H
TABLE_ALT_ITEM
U0201 FIJI, B1, S
TABLE_ALT_ITEM
TY 120OHM FERRITE
TABLE_ALT_ITEM
R1309 3.92KOHM, 01005
TABLE_ALT_ITEM
U2401
CUMULUS C1, FAB4
TABLE_ALT_ITEM
C1290
TABLE_ALT_ITEM
15UF,0402,HRTZL CAP
L1135
CMC,90OHM,MURATA
TABLE_ALT_ITEM
DZ1113
TABLE_ALT_ITEM
SUPPR,TRANS,VARISTOR,AMOTECH
FL1802,FL1803 FERR BD,150OHM,200MA,01005
TABLE_ALT_ITEM
C1018
TABLE_ALT_ITEM
CAP,4.7UF,20%,6.3V,0402,H=0.65MM
C1106
CAP,4.3UF,20%,4V,0610
TABLE_ALT_ITEM
U2203
TABLE_ALT_ITEM
CARBON, BOSCH, BMI162BC
U2203
CARBON, ST, AP6DS2AA
TABLE_ALT_ITEM
U0301
ST 8K EEPROM
TABLE_ALT_ITEM
C B
A
DRAWING TITLE
SCHEM,MLB,N61
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
PAGE
1 OF 55
SHEET
1 OF 54
3
2
1
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https://www.mobile-manuals.com/
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2
1
FIJI: JTAG,USB,HSIC,XTAL
ROOM=SOC
D
FL0201
D
1KOHM-25%-0.2A
26 12 11 5 4 PP1V2
ROOM=SOC
R0201
1
2
0.00
01005
26 PP1V2_PLL
ROOM=SOC
1 C0206
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
1 C0213
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
1 C0207
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1 C0208
0.01UF
10%
2
6.3V X5R
01005
26 PP1V8_XTAL
C0203 1
0.1UF
20%
4V X5R
2
01005
ROOM=SOC
ROOM=SOC
1 C0204
2.2UF
20%
2
6.3V X5R
0201-1
1
2
0201
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27
VDD12_UH0_HSIC0 D7 VDD12_UH2_HSIC1 AN4
VDDA12_PLL_SOC M16 VDDA12_PLL_MG V19
VDDA12_PLL_CPU AD14 VDDA12_PLL_LPDP AN24 VDDA18_SOC0_TSADC V17 VDDA18_SOC1_TSADC G7 VDDA18_CPU_TSADC AE15
VDD18_XTAL E14 VDD18_EFUSE1 J7 PWRTERM2GND
VDDH_USB E2 VDD33_USB E1 VDD12_CKE_DDR0 D16 VDD12_CKE_DDR1 N5
ROOM=SOC
C0202 1
0.22UF
20%
6.3V X5R
2
0201
VOLTAGE=0V
PP1V2_SDRAM 4 12 23 26
C0211 ROOM=SOC
1
0.1UF
20%
2
4V X5R
01005
PP3V3_USB 12 26
ROOM=SOC
1 C0205
0.1UF
20%
2
6.3V X5R-CERM
01005
ROOM=SOC
1 C0212
0.1UF
20%
2
4V X5R
01005
C
3.3V
P2MM-NSM
C
0.95V
PP SM PP0203
1.2V
U0201
P2MM-NSM
PLACE NEAR SOC.
PP SM PP0204
PP0201 P4MM SM 1 PP
C1 NC
C2 NC
POP-FIJI-1GB-DDR-B0
UH1_HSIC0_DATA BGA
UH1_HSIC0_STB SYM 1 OF 13
PP0202 REMOVE PP IF
SPACE IS NEEDED
P4MM
SM 1
PP
29
BASEBAND 29
50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB
AR4 UH2_HSIC1_DATA AP4 UH2_HSIC1_STB
K4 JTAG_SEL
ROOM=SOC
ANALOGMUXOUT D15 NC
USB_DP F5 USB_DM E5
90_AP_BI_TRISTAR_USB0_P 17 90_AP_BI_TRISTAR_USB0_N 17
20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24 23
NO_XNET_CONNECTION=TRUE
1R0206
100K
5% 1/32W MF 2 01005 ROOM=SOC
SERIAL MODE NAMES
17 TRISTAR_BI_AP_JTAG_SWDIO 17 TRISTAR_TO_AP_JTAG_SWCLK
L4 NC
J5 NC
L3 NC
K5 NC
K3 K2
JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK
AH32 RESET*
USBHS ON/OFF TOLERANCE 5V/1.98V
USB_VBUS D3 USB_ID D2 NC
USB_VBUS_DETECT 14
25 17 15 13 4 RESET_1V8_L
AJ33 CFSB
USB_REXT D1
USB_REXT
B
ROOM=SOC
1 C0201
1000PF
10%
2
6.3V X5R-CERM
01005
13 AP_TO_PMU_TEST_CLKOUT
W4 CFSB1 AH33 HOLD_RESET AH31 TST_CLKOUT AG29 FAST_SCAN_CLK
WDOG AK30
XI0 A16 XO0 A15
AP_TO_PMU_RESET_IN 13
1R0203
200
1%
1/32W MF 2 01005
NOTE: NEW USB_REXT VALUE FOR FIJI = 200 OHM
B
AH29 TESTMODE
C0209
12PF
12
I2C ADDRESS MAP
I2C0
DEVICE BINARY
ADI PMU:
LM3534 BL DRIVER:
TRISTAR:
I2C1
CHESTNUT:
TIGRIS CHARGER: LINEAR VIBE:
CS35L19B AMP: MESA EEPROM (MEMORY):
MESA EEPROM (ID):
1110100X 1100011X 0011010X 0100111X
1110101X 1011010X 1000000X 1010110X 1011110X
7-BIT HEX
0X74 0X63 0X1A 0X27
0X75 0X5A 0X40 0X56 0X5E
8-BIT HEX
0XE8 0XC6 0X34 0X4E
0XEA 0XB4 0X80 0XAC 0XBC
45_XTAL_24M_I 45_XTAL_24M_O
R02021
1.00M
1% 1/32W
MF 01005 2
Y0201
1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM
R0207
1.33K
1
2
45_XTAL_24M_O_R
1% 1/32W
MF 01005
1
3
24
5% 16V CERM 01005
C0210
12PF
12
5% 16V CERM 01005
PCB: PLACE THIS XW AT U0201, NEAR XI/XO
XW0204
SHORT-10L-0.1MM-SM
45_XTAL_24M_O_GND
1
2
ROOM=SOC
I2C2
CT814 ALS: 0101001X DISPLAY EEPROM: 1010001X
0X29 0X51
0X52 0XA2
A
RCAM I2C
OPEL STROBE DRIVER: 1100011X
0X63
0XC6
REAR FACING CAM: 0010000X
0X10
0X20
VCM AF DRIVER: 0001100X
0X0C
0X18
FCAM I2C
FRONT FACING CAM:
0010000X
0X10
0X20
NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION.
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
SOC:MAIN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
2
SHEET
2
OF OF
55 54
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2
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https://www.mobile-manuals.com/
6
5
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3
FIJI: DIGITAL I/O,BOOTSTRAPPING
2
1
D
14 13 12 10 4 3 PP1V8_SDRAM
29 26 17 15
18 AP_TO_HEADSET_HS3_CTRL 18 AP_TO_HEADSET_HS4_CTRL
13 8 BUTTON_TO_AP_VOL_UP_L 13 8 BUTTON_TO_AP_VOL_DOWN_L
26 14 12 5 PP1V8_ALWAYS
16 SPKAMP_TO_AP_INT_L
ROOM=SOC
ROOM=SOC
R0314
220K
1R03131
392K
1%
5%
1/32W
1/32W
MF
MF 01005
2
01005 2
16 AP_TO_SPKAMP_BEE_GEES 16 AP_TO_SPKAMP_RESET_L 29 AP_TO_BT_WAKE 29 AP_TO_BB_RST_L 29 AP_TO_WLAN_JTAG_SWCLK 29 AP_TO_WLAN_JTAG_SWDIO 21 13 BUTTON_TO_AP_MENU_KEY_L
13 8BUTTON_TO_AP_HOLD_KEY_L
13 PMU_TO_AP_IRQ_L 29 BB_TO_AP_IPC_GPIO1
29 AP_TO_BB_WAKE_MODEM
BOARD_ID3
29 AP_TO_STOCKHOLM_SIM_SEL
BOOT_CONFIG0
C
13 AP_TO_PMU_KEEPACT
BOOT_CONFIG1
DFU STATUS BOOT_CONFIG2 BOARD_ID4
29 BB_TO_AP_DEVICE_RDY 29 BB_TO_AP_GPS_SYNC 29 AP_TO_BB_HOST_RDY 29 BB_TO_AP_RESET_DET_L 27 BOOT_CONFIG1 25 FORCE_DFU
10 CODEC_TO_AP_INT_L 29 AP_TO_RADIO_ON_L
BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0
27 BOARD_REV3 27 BOARD_REV2
27 BOARD_REV0 29 AP_TO_BB_COREDUMP
13 8 BUTTON_TO_AP_RINGER_A 29 BB_TO_AP_IPC_GPIO 14 AP_TO_VIBE_EN
B
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
R03021 R03031 R03041 R03051 R0306 1R0308 1
2.2K 2.2K 2.2K 2.2K 1.33K 1.33K
5%
5%
5%
5%
1%
1/32W
D P2MM-NSM 1 PP SM PP0301
1/32W
MF 01005 2
1/32W
MF 01005 2
1/32W
MF 01005 2
1/32W
MF 01005 2
1/32W
MF 01005
1%
MF 2 01005 2
P2MM-NSM
1 PP SM PP0302
AC1 AC2 AC3 AC4 AD1 AD2 AD3 AD4 AG30 AG31 AG32
Y3 Y4 AK31 AE1 AF30 NC AE2 AE3 NC AE4 AK32 NC AF3 AF4 AH4 AJ1 AD29 AJ2 AK33 NCAJ30 NC AJ3 NC AJ4 AD30 AC30 NCAC31 NCAB29 AK1 AK2 NC AK3 AK4 AM29
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4
U0201
POP-FIJI-1GB-DDR-B0
BGA
SYM 2 OF 13
GPIO5
TMR32_PWM0
GPIO6
TMR32_PWM1
GRP2
GPIO7
TMR32_PWM2
GPIO8
GPIO9
UART0_RXD
GPIO10
UART0_TXD
GPIO11
GPIO12
UART1_CTSN
GRP4
GPIO13
UART1_RTSN
GPIO14
UART1_RXD
GPIO15
UART1_TXD
GPIO16
GPIO17
UART2_CTSN
GRP3
GPIO18
UART2_RTSN
GPIO19
UART2_RXD
GPIO20
UART2_TXD
GRP2
GPIO21
GPIO22
UART3_CTSN
GRP4
GPIO23
UART3_RTSN
GPIO24
UART3_RXD
GPIO25
UART3_TXD
GPIO26
GPIO27
UART4_CTSN
GRP3
GPIO28
UART4_RTSN
GPIO29
UART4_RXD
GPIO30
UART4_TXD
GPIO31
GPIO32
UART5_RTXD
GPIO33
GRP2
GPIO34
GPIO35
GPIO36
GPIO37
UART6_RXD
GPIO38
UART6_TXD
AM3 OSCAR_BI_AP_TIME_SYNC_HOST_INT 22
AM4
AP_TO_VIBE_TRIG 14
AN3 NC
AL2 AL1
TRISTAR_TO_AP_DEBUG_UART0_RXD 17 AP_TO_TRISTAR_DEBUG_UART0_TXD 17
H30 H31 H32 H33
BT_TO_AP_UART1_CTS_L 29 AP_TO_BT_UART1_RTS_L 29
BT_TO_AP_UART1_RXD 29 AP_TO_BT_UART1_TXD 29
AL31 AM33 AL32 AL33
BB_TO_AP_UART2_CTS_L 29 AP_TO_BB_UART2_RTS_L 29
BB_TO_AP_UART2_RXD 17 29 AP_TO_BB_UART2_TXD 17 29
F30 G30 G31 G32
STOCKHOLM_TO_AP_UART3_CTS_L 29 AP_TO_STOCKHOLM_UART3_RTS_L 29
STOCKHOLM_TO_AP_UART3_RXD 29 AP_TO_STOCKHOLM_UART3_TXD 29
AE31 AF31 AE32 AE33
WLAN_TO_AP_UART4_CTS_L 29 AP_TO_WLAN_UART4_RTS_L 29
WLAN_TO_AP_UART4_RXD 29 AP_TO_WLAN_UART4_TXD 29
AG4
AP_TO_TIGRIS_SWI 14
AM2 AM1
TRISTAR_TO_AP_ACC_UART6_RXD 17 AP_TO_TRISTAR_ACC_UART6_TXD 17
AB30 GPIO40 AB31 GPIO41
AL3 GPIO42
GRP2 GRP4
UART7_RXD UART7_TXD UART8_RXD UART8_TXD
B30 NC A30 AF2 AF1
AP_TO_WLAN_DEVICE_WAKE 29 OSCAR_TO_AP_UART_RXD 22 AP_TO_OSCAR_UART_TXD 22
ROOM=SOC
R0301
33.2
10 45_AP_TO_CODEC_I2S0_MCLK 1
2
1%
10
1/32W
MF
10
01005
10
CODEC ASP 10
45_AP_TO_CODEC_I2S0_MCLK_R 45_AP_TO_CODEC_ASP_I2S0_BCLK AP_TO_CODEC_ASP_I2S0_LRCLK CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT
29 45_AP_TO_BT_I2S1_BCLK
BLUETOOTH 29 AP_TO_BT_I2S1_LRCLK
29 BT_TO_AP_I2S1_DIN
16 45_AP_TO_SPKAMP_I2S2_MCLK
R0311 ROOM=SOC 29 AP_TO_BT_I2S1_DOUT
33.2
1
2
45_AP_TO_SPKAMP_I2S2_MCLK_R
BLUETOOTH
CODEC
XSP &
1% 1/32W
MF 01005
SPKR AMP
16 10 16 10 16 10 16 10
45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_LRCLK CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_XSP_I2S2_DOUT
BASEBAND
PP0303
P2MM-NSM 11 ALS_TO_AP_INT_L
SM
1 PP
29 45_AP_TO_BB_I2S3_BCLK
ROOM=SOC 29 AP_TO_BB_I2S3_LRCLK
BASEBAND
29 BB_TO_AP_I2S3_DIN 29 AP_TO_BB_I2S3_DOUT
STOCKHOLM
17 13 TRISTAR_TO_AP_INT 10 45_AP_TO_CODEC_VSP_I2S4_BCLK
CODEC VSP 10 AP_TO_CODEC_VSP_I2S4_LRCLK 10 CODEC_TO_AP_VSP_I2S4_DIN 10 AP_TO_CODEC_VSP_I2S4_DOUT
WIFI UART
GAS GAUGE
BOARD_ID2 BOARD_ID1 BOARD_ID0
27 26 BOARD_ID2 27 BOARD_ID1
CODEC
10 CODEC_TO_AP_SPI_MISO 10 AP_TO_CODEC_SPI_MOSI 10 AP_TO_CODEC_SPI_CLK 10 AP_TO_CODEC_SPI_CS_L
GRAPE
24 TOUCH_TO_AP_SPI_MISO 24 AP_TO_TOUCH_SPI_MOSI 24 AP_TO_TOUCH_SPI_CLK 24 AP_TO_TOUCH_SPI_CS_L
MESA_TO_AP_SPI_MISO
21
ROOM=SOC
R0340
21 AP_TO_MESA_SPI_MOSI
21 AP_TO_MESA_SPI_CLK 1
2 AP_TO_MESA_SPI_CLK_R
01005 21 MESA_TO_AP_INT
0.00
D26 I2S0_MCK
I2C0_SCL AM32
U30 I2S0_BCLK
U0201
I2C0_SDA AM31
U31 I2S0_LRCPKOP-FIJI-1GB-DDR-B0
GRP3
U32 I2S0_DIN
BGA
I2C1_SCL Y31
U33 I2S0_DOUT
SYM 3 OF 13
I2C1_SDA Y30
AP_TO_I2C0_SCL 13 15 17 AP_BI_I2C0_SDA 13 15 17
AP_TO_I2C1_SCL 14 16 21 AP_BI_I2C1_SDA 14 16 21
NC R30 P30 T30 R31 T31
I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT
D25 I2S2_MCK N30 I2S2_BCLK N31 I2S2_LRCK P32 I2S2_DIN P33 I2S2_DOUT
GRP4
GRP2
I2C2_SCL AH1 I2C2_SDA AH2 I2C3_SCL AN1NC I2C3_SDA AN2NC
DWI_CLK AL29 45_AP_TO_PMU_AND_BL_DWI_CLK 13 15
DWI_DO AL30 45_AP_TO_PMU_AND_BL_DWI_DO 13 15
AP_TO_I2C2_SCL 11 20 AP_BI_I2C2_SDA 11 20
P2MM-NSM
PP SM PP0305
P2MM-NSM
PP SM PP0304
AA2 I2S3_MCK
AA4 I2S3_BCLK
GRP2
AA3 I2S3_LRCK Y1 I2S3_DIN
C
Y2 I2S3_DOUT
AB32 AB33 AA30 AA32 AA33
I2S4_MCK I2S4_BCLK I2S4_LRCK I2S4_DIN I2S4_DOUT
AG1 AG2 NC AG3 NC AH3
SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN
J3 SPI1_MISO J2 SPI1_MOSI J1 SPI1_SCLK J4 SPI1_SSIN
F33 SPI2_MISO F32 SPI2_MOSI E32 SPI2_SCLK E31 SPI2_SSIN
AD33 AD32 AD31 AE30
SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN
GRP3
GRP4
GRP1
GRP2
GRP3
GRP3
GRP4
SEP_I2C_SCL SEP_I2C_SDA SEP_SPI_SCLK SEP_SPI_SSIN SEP_SPI_MISO SEP_SPI_MOSI
SEP_GPIO0
AR31 AP31 AN30NC AN31NC AN33NC AN32NC AM30NC
AP_TO_EEPROM_I2C_SCL 3 AP_BI_EEPROM_I2C_SDA 3
ISP_UART0_RXD C32 OSCAR_TO_AP_ISP_UART_RXD
22
ISP_UART0_TXD C33 AP_ISP_TO_OSCAR_UART_TXD
22
GRP3
SOCHOT0 AJ31 SOCHOT1 AJ32
DISP_VSYNC AL5NC
PMU_TO_AP_PRE_UVLO_L_R AP_TO_PMU_SOCHOT1_L_R
PP1V8
2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27
R03101
10K
5% 1/32W
MF 01005 2
ROOM=SOC
R0315
0.00
1
2 PMU_TO_AP_PRE_UVLO_L 13
0% 1/32W
MF 01005
ROOM=SOC
GRP2
CLK32K_OUT AB1 45_AP_TO_TOUCH_CLK32K_RESET_L 24
CPU_SLEEP_STATUS
AH30 NC NO
CONNECTED
ON
MLB
NAND_SYS_CLK
AB4 NC
USED
FOR
PCIE
NAND
R0312
0.00
1
2
0% 1/32W
MF 01005
ROOM=SOC
PP1V8_SDRAM 3 4 10 12 13 14 15
17 26 29
NOSTUFF
1R0307
B
10K
5%
1/32W MF 2 01005
ROOM=SOC
AP_TO_PMU_SOCHOT1_L 13
ANTI-ROLLBACK EEPROM
ONSEMI EEPROM APN:335S0894
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
1R0316
A1
1 C0301
1.0UF
1R0317
2.2K
5%
1/32W
MF
2
01005 ROOM=E_SE
VCC
U0301
CAT24C08C4A
WLCSP
20%
2
6.3V X5R
0201-1
ROOM=E_SE
2.2K
5%
1/32W
MF
2
01005 ROOM=E_SE
3 AP_TO_EEPROM_I2C_SCL
B1 SCL
SDA B2
AP_BI_EEPROM_I2C_SDA 3
A
VSS ROOM=E_SE
A2
8
7
6
5
REMOVED HOLD + MENU KEY BUFFERS SINCE NOT NEEDED FOR FIJI
4
3
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
SOC:I/OS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
3
SHEET
3
OF OF
55 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
FIJI: VDDCA,VDD1/2,VDDQ,VDD,VDD_FIXED,VDD_CPU,VDD_GPU
VDDCA, VDD1/2, VDDQ
VDD
VDD_CPU, VDD_GPU
25 17 15 13 2 RESET_1V8_L NOTE: CKEIN CONFIRMED 1.8V TOLERANT
D17 DDR0_CKEIN N4 DDR1_CKEIN
R11 R13 R15
R17
D
R19
45_DDR0_ZQ_CA
A17 DDR0_ZQ_CA
R2
45_DDR1_ZQ_CA
M1 DDR1_ZQ_CA
R21
45_DDR0_ZQ_DQ
AR13 DDR0_ZQ_DQ
R23
45_DDR1_ZQ_DQ
L33 DDR1_ZQ_DQ
R25
4 45_DDR0_VREF_CA
A18 DDR0_VREF_CA
R27
4 45_DDR1_VREF_CA
P1 DDR1_VREF_CA
R29
R1 0401R1 0402R1 0411 1R0412 4 45_DDR0_VREF_DQ
AR15 DDR0_VREF_DQ
R3
240
1%
240
1%
240
1%
240
1%
4 45_DDR1_VREF_DQ
N33 DDR1_VREF_DQ
R32
1/32W
1/32W
1/32W
1/32W
R4
MF
MF
MF
MF
2RO0O1M0=0S5OC 2RO0O1M0=0S5OC 2RO0O1M0=0S5OC 2RO0O1M0=0S5OC
A20
R5
B17
U0201
R6
C14
POP-FIJI-1GB-DDR-B0
R7
(DDR IMPEDANCE CONTROL)
H1
BGA
R9
N1 VDDCA
SYM 7 OF 13
T10
U1
T12
V1
T14
T16
26 23 12 4 2 PP1V2_SDRAM
AA1
T18 T2
AF33
T20
AP25
T22
AP6
T24
AR17
T26
B15 VDD2
B19 1.2V
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
B7
C
C0402 C0422 C0401 C0429 E33
1UF 20%
1UF 20%
1UF 20%
4.3UF 20%
G1
4V CERM
4V CERM
4V CERM
4V CERM
K33
0402
0402
0402
0402
R1
1
3
1
3
1
3
1
3
T32
T28 T29 VSS T3 T4 T7 T8 U11 U13
24
24
24
24
Y32
U15
U17
U19
U2
U21
U23
U25
U27
U29
29 26 17 15 14 13 12 10 3 PP1V8_SDRAM
A19
U3
ROOM=SOC
ROOM=SOC
ROOM=SOC
AG33
U4
1 C0450 1 C0451 1 C0452 AR16
U5
2.2UF
20%
2.2UF
20%
2.2UF
20%
AR25
U6
2
6.3V X5R
2
6.3V X5R
2
6.3V X5R
AR7
U7
0201-1
0201-1
0201-1
B16 VDD1
U9
1.8V B8
D33
K1
T1
T33
W1
B
4 2 PP1V2
26 12 11 5
ROOM=SOC
C0431
4.3UF 20% 4V
CERM 0402
1
3
24
ROOM=SOC C0427
1 C0467 1
1.0UF 1.0UF
20%
2
6.3V X5R
20%
2
6.3V X5R
0201-1
0201-1
ROOM=SOC
ROOM=SOC
C0432
1UF 20% 4V
CERM 0402
1
3
24
1 C0426
15PF
5%
2
16V NP0-C0G-CERM
01005
ROOM=SOC
ROOM=SOC
C0425
0.47UF 20% 6.3V CERM
0402
1
3
ROOM=SOC
C0430
0.47UF 20% 6.3V CERM
0402
1
3
AC33 AR11 AR14 AR19 AR22 AR24
AR6 AR8 G33 J33 M33 R33 V33 Y33
VDDQ
24
24
26 7
PP0V95_FIXED_SOC
12
1 C0435
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
ROOM=SOC
ROOM=SOC
C0438 C0439
4.3UF 20%
4V CERM 0402
4.3UF 20%
4V CERM 0402
1
31
3
24
24
ROOM=SOC
C0404
1UF 20% 4V
CERM 0402
1
3
24
ROOM=SOC
C0405
1UF
20% 4V CERM
0402
1
3
24
ROOM=SOC
C0476
4.3UF 20% 4V
CERM 0402
1
3
24
ROOM=SOC
C0406
0.47UF 20% 6.3V
CERM 0402
1
3
24
1 C0478
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
AA16 AA18 AA22
AA6 AB10 AB23 AB25 AC14 AC16 AC18 AC27
AC7 AD13 AD19 AD21 AD25
AD6 AE10 AE11 AE16 AE22 AF13 AF17 AF23 AF25 AF27
AF7 AG14 AG16 AG18
AG6 AH10 AH20
AH7 AJ14 AJ16 AJ24 AJ27
AJ6 AJ9 AK12 AK18 AK20 AK22 AK25 F26
F7 G10 G12 G14 G16 G18 G20 G22
G8 H11 H13 H15
H9 J10 J12 J14 J26
J8 K11 K13 K15
K9 L10
L12
L14
U0201
POP-FIJI-1GB-DDR-B0
L16
BGA
L26
L8 SYM 10 OF 13
M11
M13
M15
M17
M9
N10
N12
N14
N16
N26
N8
P11
P13
P15
P17
P9
R10
R12
R14
R16
R18
R26
R8
T11
T13
T15
VDD_FIXED
0.95V TBD: 3.3A? @ 105C
T17 VDD_FIXED
T19
T9
U10
U12
U14
U16
U18
U26
U8
V11
V13
V15
V9
W10
W12
W14
W16
W18
W21
W8
Y11
Y13
Y15
Y19
Y23
Y25
Y27
VDD_FIXED_SENSE
Y7
Y9
PP0403
P2MM-NSM
V7 12 45_BUCK5_FB
SM 1
PP
ROOM=SOC
26 12 PP_GPU
1 C0442
ROOM=SOC
C0445
ROOM=SOC
C0448
ROOM=SOC
C0418
ROOM=SOC
C0419
ROOM=SOC
C0420
ROOM=SOC
C0475
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
4.3UF 20% 4V
CERM 0402
4.3UF 20% 4V
CERM 0402
1UF 20% 4V
CERM 0402
1UF 20% 4V
CERM 0402
0.47UF 20% 6.3V
CERM 0402
4.3UF 20% 4V
CERM 0402
D
1
3
1
3
1
3
1
3
1
3
1
3
1 C0466
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
24
24
24
24
24
24
26 12 PP_CPU
ROOM=SOC
C0443
0.47UF 20%
6.3V CERM 0402
1
3
ROOM=SOC
C0446
0.47UF 20%
6.3V CERM 0402
1
3
ROOM=SOC
C0444
1UF 20%
4V CERM 0402
1
3
AA10 AA14
AA8 AB11 AB13 AB15
AB9
U0201
POP-FIJI-1GB-DDR-B0
BGA
SYM 13 OF 13
AA17 AA19 AA21 AA23 AA25 AB16 AB18
24
24
24
AC10 AC12
AB20 AB22
AC8
AB24
ROOM=SOC
C0409
4.3UF 20% 4V
CERM 0402
1
3
24
ROOM=SOC
C0411
4.3UF 20% 4V
CERM 0402
1
3
24
ROOM=SOC
C0414
4.3UF 20% 4V
CERM 0402
1
3
24
AD11 AD15
AD9 AE12 AE14
AE8 AF11 AF15
AF9
VDD_CPU
0.775V - 1.0V TBD: 7.6A? @ 105C
AB26
AC17
AC19
AC21
AC23
AC25
AD16
AD18
C
AD20
ROOM=SOC
C0408
4.3UF 20% 4V
CERM 0402
1
3
ROOM=SOC
C0410
4.3UF 20% 4V
CERM 0402
1
3
ROOM=SOC
C0413
1UF 20% 4V
CERM 0402
1
3
AG10 AG12
AG8 AH11 AH13 AH15
AD22 AD24 AD26 AE17 AE19 AE21
24
24
24
AH9 AJ10
AE23 AE25
AJ12
AF18
AJ7
AF20
VDD_GPU
AJ8
AF22
0.8V - 0.95V
1 C0447
TBD: 3.45A? @ 105C AF24
10UF
AF26
20%
2
6.3V CERM-X5R
0402-9
45_BUCK0_FB
12
AA12 VDD_CPU_SENSE
AG17 AG19
ROOM=SOC
PP0401
AG21
ROOM=SOC
C0415
4.3UF
ROOM=SOC
C0465
1UF
P2MM-NSM SM 1 PP
ROOM=SOC
AG23 AG25 AH16
20% 4V
20% 4V
AH18
CERM 0402
CERM 0402
AH22
1
3
24
1
3
24
1C0449
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
AH24
AH26
AJ17
AJ19 AJ21
B
AJ23
ROOM=SOC
1 C0472
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=SOC
C0471 1
2.2UF
20% 6.3V
X5R
2
0201-1
1 C0468
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
AJ25 W17 Y16 Y18 Y20 Y22 Y24
Y26
VDD_GPU_SENS1E2 AG27 45_BUCK1_FB
PP0402 P2MM-NSM SM 1 PP
ROOM=SOC
A
26 23 12 4 2 PP1V2_SDRAM
1 C0423
1R0403
0.01UF 10K
10%
1%
2
6.3V X5R
01005
ROOM=SOC
1/32W
MF
2
01005 ROOM=SOC
45_DDR0_VREF_CA 4
1 C0424
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0404
10K
1%
1/32W
MF
2
01005 ROOM=SOC
26 12 11 5 4 2 PP1V2
1 C0433
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1 C0434
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0405
10K
1%
1/32W
MF
2
01005 ROOM=SOC
45_DDR1_VREF_CA 4
1R0406
10K
1% 1/32W
MF 2 01005
ROOM=SOC
NOTE: SOME VENDORS HAVE INTERNAL DIVIDER CIRCUITS
1 C0436
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1 C0437
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0407
4.7K
1%
1/32W
MF
2
01005 ROOM=SOC
45_DDR0_VREF_DQ 4
1R0408
4.7K
1% 1/32W
MF 2 01005
ROOM=SOC
1 C0440
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1 C0441
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0409
4.7K
1% 1/32W MF
2
01005 ROOM=SOC
45_DDR1_VREF_DQ 4
1R0410
4.7K
1%
1/32W MF
2
01005 ROOM=SOC
8
7
6
5
4
3
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
4
SHEET
4
OF OF
55 54
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
FIJI: VDDIOD,VDDIO18,VDD_VAR_SOC
JUST A FEW GNDS
A1
AJ15
A2
A32
D
A33 AA11
AA15
U0201
POP-FIJI-1GB-DDR-B0
BGA
SYM 11 OF 13
AJ18 AJ20 AJ22 AJ26 AJ28
AA20
AJ5
AA24
AK10
AA26
AK14
AA27
AK16
AA28
AK24
AA31
AK27
AA5
AK28
AA7
AK29
AA9
AK6
AB12
AK8
AB14
AL11
AB17
AL13
AB19
AL15
AB21
AL17
AB27
AL19
AB28
AL21
AB6
AL23
AB7
AL25
AB8
AL27
AC11
AL6
AC13
AL7
AC15
AL9
AC20
AM10
AC22
C
AC24
AC26
AM11 AM12 AM13
AC28
AM14
AC32
AM15
AC5
AM16
AC6 AC9
VSS AD10
AM17 VSS
AM18
AM19
AD12
AM20
AD17
AM21
AD23
AM22
AD27
AM23
AD28
AM24
AD5
AM26
AD7
AM28
AD8
AM5
AE13
AM6
AE18
AM7
AE20
AM8
AE24
AM9
AE26
AN25
AE27
AN26
AE28
AN27
AE29
AN28
AE6
AN29
AE7
AN5
B
AE9
AN6
AF10
AP1
AF12
AP10
AF14
AP12
AF16
AP14
AF19
AP17
AF21
AP19
AF28
AP2
AF32
AP21
AF5
AP24
AF6
AP3
AF8
AP32
AG11
AP33
AG13
AP5
AG15
AP7
AG20
AR1
AG22
AR2
AG24
AR3
AG26
AR32
AG28
AR33
AG5
AR5
AG7
B1
AG9
B18
AH12
B2
AH14
B20
AH17
B32
A
AH19
B33
AH21
C10
AH23
C11
AH25
C15
AH27
C16
AH28
C17
AH6
C18
AH8
C19
AJ11
C20
AJ13
C22
C23
C24
U0201
POP-FIJI-1GB-DDR-B0
C25
BGA
C26
SYM 12 OF 13
C27
C28
C3
C4
C5
C6
C9
D10
D12
D13
D18
D19
D20
D21
D22
D23
D24
D27
D4
D5
D6
D8
D9
E11
E15
E17
E19
E21
E23
E24
E25
E26
E27
E28
E6
E7
E9
F10 VSS
VSS
F12
F14
F16
F18
F20
F22
F24
F27
F29
F31
F6
F8
G11
G13
G15
G17
G19
G21
G23
G25
G27
G28
G6
G9
H10
H12
H14
H17
H18
H2
H20
H22
H24
H26
H27
H29
H5
H6
H7
H8
J11
J13
J16
J19
J21
J23
J25
J27
J28
J29
J30
J31
J32
J9
K10
K12
K14
K17
K18
K20
K22
K24
K26
K28
K29
K30
K31
K32
K6
K8
L1
L11
L13
L15
L17
L19
L2
L21
L23 L25
26 12 11 4 2 PP1V2
L27
L29
L30
L31
L32
L5
L7
L9
M10
M12
M14
M18
M2
M20
M22
M24
M26
M28
M29
M3
M30
M31
M32
M4
M5
M6
M8
N11
N13
N15
N17
N19
N2
N21
N23
N25
N27
N29
N3
N32
N7
N9
P10
P12
P14
P16
P18
P2
P20
P22
P24
P26
P28
P29
P3
P31
P4
P5
P6
P8
C21
8
7
6
VDD_SRAM, VDD_SOC
V10
V12
U0201
POP-FIJI-1GB-DDR-B0
V14
BGA
V16
SYM 8 OF 13
V18
D
V2
PP_VAR_SOC
26 12
V20 G24
V22
G26
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
V24
1 C0508 C0503
C0507 C0509 C0510
H16
V26
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SOC
4.3UF 20%
4V CERM 0402
1
3
1UF 20%
4V CERM 0402
1
3
1UF 20%
4V CERM 0402
1
3
0.47UF 20%
6.3V CERM 0402
1
3
H19 H21 H23 H25
V28 V29 V3
V30
J15
24
24
24
24
J17
V31
V32
J18
V4
J20
V5
J22
V6
J24
V8
K16
W11
K19
W13
K21
W15
K23
W19
VDDIOD, VDDIO18
K25 W2
L18
W23
L20
W25
L22 VDD_VAR_SOC
VSS W27
CAPS FOR VDDIOD ARE SHARED WITH VDDQ
L24 0.90V - 0.95V
W29
M19 1.8A @ 105C
E16 VDDIOD_DDRCA
VDDIO18_GRP1 J6
PP1V8 2 3 6 7 10 11 12 13 15 20 23 24
M21
25 26 27
E18 VDDIOD_DDRCA F15 VDDIOD_DDRCA F17 VDDIOD_DDRCA
ROOM=SOC
M23
C0502
M25
ROOM=SOC
1 C0501
1UF
20%
N18
K7 VDDIOD_DDRCA L6 VDDIOD_DDRCA M7 VDDIOD_DDRCA N6 VDDIOD_DDRCA P7 VDDIOD_DDRCA
U0201
POP-FIJI-1GB-DDR-B0
VDDIO18_GRP2 AB5 VDDIO18_GRP2 AE5 VDDIO18_GRP2 AH5 VDDIO18_GRP2 T6 VDDIO18_GRP2 W5
2.2UF
20%
2
6.3V X5R
0201-1
4V CERM 0402
1
3
24
N20 N22 N24 P19 P21 P23
W3
W30
C
W31
W32
W33
W6
W7
W9
Y10
Y12
AK11 AK19 AK21 AK23
AK7 AK9 AL10
VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ VDDIOD_DDR0DQ
1.2V
BGA SYM 9 OF 13
1.8V
VDDIO18_GRP3 AA29 VDDIO18_GRP3 AC29 VDDIO18_GRP3 AF29 VDDIO18_GRP3 AJ29
VDDIO18_GRP4 F25 VDDIO18_GRP4 F28 VDDIO18_GRP4 H28
ROOM=SOC
C0511 1
1.0UF
20%
6.3V X5R
2
0201-1
ROOM=SOC
C0506
0.47UF 20%
6.3V CERM 0402
1
3
Y14 P25
Y17 R20
Y21 R22
Y28 R24
Y29 T21
Y5 T23
Y6 T25
Y8 U20
AL12 VDDIOD_DDR0DQ
24
U22
VSS_SENSE AA13
AL18 VDDIOD_DDR0DQ
U24
AL20 VDDIOD_DDR0DQ
V21
AL22 VDDIOD_DDR0DQ
V23
AL8 VDDIOD_DDR0DQ
V25 GRP7 POWERS GPIO11,12 (BUTTONS)
K27 VDDIOD_DDR1DQ
VDDIO18_GRP7 T5
PP1V8_ALWAYS 3 12 14 26
W20 W22
L28 M27 N28 P27 R28 T27
VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ VDDIOD_DDR1DQ
VDDIO18_PPN AK13 VDDIO18_PPN AK15 VDDIO18_PPN AK17 VDDIO18_PPN AL14 VDDIO18_PPN AL16
1 C0520
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
12 45_BUCK2_FB
W24 W26 VDD_VAR_SOC_SENSE
B
U28 VDDIOD_DDR1DQ
V27 VDDIOD_DDR1DQ W28 VDDIOD_DDR1DQ
PP0501
P2MM-NSM
SM
PP
CPU_VSS_SENSE
ROOM=SOC
SYNC_MASTER=N56_MLB
PAGE TITLE
A SYNC_DATE=08/29/2013
SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
5
SHEET
5
OF OF
55 54
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
FIJI: NAND + 12X17 NAND PKG
SUPPORT FOR PPN1.5 (1.8V IO) ONLY
D
PP1V8
2 3 5 6 7 10 11 12 13 15 20 23 24 25 26 27
23 20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24
1R0607
100K
5%
U0201
POP-FIJI-1GB-DDR-B0
BGA
C
1/32W
MF
2
01005 ROOM=SOC
SYM 4 OF 13
1R0608
100K
5%
1/32W
MF
2
01005 ROOM=SOC
6 AP_TO_NAND_ANC0_CEN0_L
6 AP_BI_NAND_ANC0_IO<0> 6 AP_BI_NAND_ANC0_IO<1> 6 AP_BI_NAND_ANC0_IO<2> 6 AP_BI_NAND_ANC0_IO<3> 6 AP_BI_NAND_ANC0_IO<4> 6 AP_BI_NAND_ANC0_IO<5> 6 AP_BI_NAND_ANC0_IO<6> 6 AP_BI_NAND_ANC0_IO<7>
AN16 PPN0_CEN0 NCAP16 PPN0_CEN1
AN22 AP22 AN21 AN20 AN19 AN18 AP18 AN17
PPN0_IO0 PPN0_IO1 PPN0_IO2 PPN0_IO3 PPN0_IO4 PPN0_IO5 PPN0_IO6 PPN0_IO7
PPN1_CEN0 AN8 PPN1_CEN1 AN7NC
PPN1_IO0 PPN1_IO1 PPN1_IO2 PPN1_IO3 PPN1_IO4 PPN1_IO5 PPN1_IO6 PPN1_IO7
AN9 AN10 AN11 AP11 AN12 AN14 AN15 AP15
AP_TO_NAND_ANC1_CEN0_L 6
R0601
240
1
2
1% 1/32W
MF 01005
ROOM=SOC
6 AP_TO_NAND_ANC0_ALE 6 AP_TO_NAND_ANC0_CLE 6 AP_TO_NAND_ANC0_WE_L 6 45_AP_TO_NAND_ANC0_RE_L 6 45_AP_BI_NAND_ANC0_DQS
45_AP_PPN0_ZQ
AP23 AN23 AR23 AP20 AR18 AR20
PPN0_ALE PPN0_CLE PPN0_WEN PPN0_REN PPN0_DQS PPN0_ZQ
6 AP_TO_NAND_ANC_DQVREF
AR21 PPN0_VREF
B
PPN1_ALE PPN1_CLE PPN1_WEN PPN1_REN PPN1_DQS
PPN1_ZQ
AP9 AP8 AR9 AN13 AP13 AR12
PPN1_VREF AR10
AP_TO_NAND_ANC1_ALE 6 AP_TO_NAND_ANC1_CLE 6 AP_TO_NAND_ANC1_WE_L 6 45_AP_TO_NAND_ANC1_RE_L 6 45_AP_BI_NAND_ANC1_DQS 6
45_AP_PPN1_ZQ
AP_TO_NAND_ANC_DQVREF 6
R0602
240
1
2
1% 1/32W
MF 01005
ROOM=SOC
D
1 C0623
100PF
5%
2
16V NP0-C0G
0R1O0O0M5=NAND
1 C0622
220PF
10%
2
10V X7R-CERM
01005
ROOM=NAND
1 C0609
0.47UF
20%
2
4V X7S
0204
ROOM=NAND
1 C0602
1UF
20%
2
4V X6S
0204
ROOM=NAND
1 C0604
1UF
20%
2
4V X6S
0204
ROOM=NAND
OMIT_TABLE
1 C0610
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
OMIT_TABLE
1 C0611
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
OMIT_TABLE
1 C0613
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
OMIT_TABLE
1 C0614
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
OMIT_TABLE
1 C0633
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
PP3V0_NAND 12 26
OMIT_TABLE
1 C0634
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
26 PP1V2_NAND_VDDI
1 C0625
100PF
5%
2
16V NP0-C0G
0R1O0O0M5=NAND
1 C0624 1 C0601 1 C0615
220PF 1.0UF 1.0UF
10%
20%
2
10V X7R-CERM
2
6.3V X5R
20%
2
6.3V X5R
01005
0201-1
0201-1
ROOM=NAND ROOM=NAND
ROOM=NAND
1000MA
500MA
1 C0603
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=NAND
1 C0605
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
1 C0606
15UF
20%
2
6.3V X5R
0402-1
ROOM=NAND
1 C0612
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=NAND
1 C0616
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=NAND
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
1 C0617 1 C0620 1 C0621
10UF
100PF 220PF
20%
2
6.3V CERM-X5R
0402-9
ROOM=NAND
5%
2
16V NP0-C0G
0R1O0O0M5=NAND
10%
2
10V X7R-CERM
01005
ROOM=NAND
OA8
OF8
OE0
OD8
OC8
OB8 B2
B6 F6
F2 L3
M6
G0
N7
N1
THE TOTAL INDUCTANCE SEEN BY THE NAND SHOULD BE <2NH
1 C0640 1 C0641
VDDI
1.0UF
1.0UF
VCC
VCCQ
20%
20%
OMIT_TABLE
2
6.3V X5R
2
6.3V X5R
6 AP_BI_NAND_ANC0_IO<0> 6 AP_BI_NAND_ANC0_IO<1> 6 AP_BI_NAND_ANC0_IO<2> 6 AP_BI_NAND_ANC0_IO<3> 6 AP_BI_NAND_ANC0_IO<4>
G3 IO0-0 H2 IO1-0 J3 IO2-0 K2 IO3-0 L5 IO4-0
ROOM=NAND
U0604 LGA
CE0* A5 CLE0 A3 ALE0 C1 WE0* E3
AP_TO_NAND_ANC0_CEN0_L 6 AP_TO_NAND_ANC0_CLE 6 AP_TO_NAND_ANC0_ALE 6
AP_TO_NAND_ANC0_WE_L 6
0201-1
0201-1
NOTE:C0640,C0641 ADDED FOR UF NEEDS
C
6 AP_BI_NAND_ANC0_IO<5> 6 AP_BI_NAND_ANC0_IO<6> 6 AP_BI_NAND_ANC0_IO<7>
K6 IO5-0 J5 IO6-0 H6 IO7-0
RE0 B4 NC RE0* C7 45_AP_TO_NAND_ANC0_RE_L 6
NAND-1YNM-128GX8-TLC-PPN1.5-128G
AP_BI_NAND_ANC1_IO<0> AP_BI_NAND_ANC1_IO<1> AP_BI_NAND_ANC1_IO<2> AP_BI_NAND_ANC1_IO<3> AP_BI_NAND_ANC1_IO<4> AP_BI_NAND_ANC1_IO<5> AP_BI_NAND_ANC1_IO<6> AP_BI_NAND_ANC1_IO<7>
G1 IO0-1 J1 IO1-1 L1 IO2-1 N3 IO3-1 N5 IO4-1 L7 IO5-1 J7 IO6-1 G7 IO7-1
DQS0 H4 45_AP_BI_NAND_ANC0_DQS 6 DQS0* F4 NC
R/B0* E5
NAND_TO_PP_RB
CE1* C5 CLE1 C3 ALE1 D2 WE1* E1
AP_TO_NAND_ANC1_CEN0_L 6 AP_TO_NAND_ANC1_CLE 6 AP_TO_NAND_ANC1_ALE 6
AP_TO_NAND_ANC1_WE_L 6
SMPP0600
PP P2MM-NSM ROOM=NAND
RE1 D4 NC RE1* D6 45_AP_TO_NAND_ANC1_RE_L 6
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
PP0604SM
P2MM-NSM ROOM=NAND
PP
NAND_TO_PP_TCKC OA0 TCKC
DQS1 M4 45_AP_BI_NAND_ANC1_DQS 6 DQS1* K4 NC
R/B1* E7 NC
VREF G5 ZQ A1
6 AP_TO_NAND_ANC_DQVREF 45_NAND_PPN_ZQ
1 C0607
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0603
50K
1%
1/32W
MF
2
01005 ROOM=SOC
PP0605SM
P2MM-NSM ROOM=NAND
PP
NAND_TO_PP_TMSC OB0 TMSC VSS
VSSQ
A7
M2
OC0
OD0
OE8
OF0
G8
ROOM=NAND
1 R0609
243
1% 1/32W
1 C0608
0.01UF
10%
2
6.3V X5R
01005
ROOM=SOC
1R0604
50K
1%
1/32W
MF
2
01005 ROOM=SOC
B
MF 2 01005
PP0601
P4MM
SM
ROOM=SOC
1
PP
NOTE: IO<6> PREFERRED BY MATT BYOM (N51) (IS A STATUS READY BIT)
AP_BI_NAND_ANC0_IO<6> 6
PP0602
P4MM
SM
ROOM=SOC
1
PP
45_AP_TO_NAND_ANC0_RE_L 6
PP0603
P4MM
SM
ROOM=SOC
1
PP
45_AP_BI_NAND_ANC0_DQS 6
NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE
A
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
SOC:NAND
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
6
SHEET
6
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
FIJI: HIGH SPEED DIG (CAM,LCD,LPDP,PCIE)
D
NOTE: NEED TO EVALUATE PI FOR PP1V0. CONCERN OVER SHARING IT WITH MIPI AND PCIE REFCLK WITHOUT A FILTER.
VDD18_MIPID E10 VDD18_MIPID F11 VDD18_MIPIC0 E22 VDD18_MIPIC1 F23 VDD10_MIPIC E20 VDD10_MIPIC F19 VDD10_MIPIC F21 VDD10_MIPID E8 VDD10_MIPID F9
20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24 23
C0714 1
0.1UF
20%
4V X5R
2
01005
ROOM=SOC
1 C0701
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
C0702 1
0.1UF
20%
4V X5R
2
01005
ROOM=SOC
PP1V0 7 12 26
1 C0715
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
1.8V
1.0V
U0201
POP-FIJI-1GB-DDR-B0
BGA
C
23 90_RCAM_TO_AP_MIPI_DATA0_P 23 90_RCAM_TO_AP_MIPI_DATA0_N
A21 MIPI0C_DPDATA0 B21 MIPI0C_DNDATA0
SYM 5 OF 13
ISP0_SCL E29 ISP0_SDA E30
ROOM=SOC
1R0704
1.00K
5%
1/32W MF 2 01005
ROOM=SOC
ROOM=SOC
ROOM=SOC
1R0705 1R0706 1R0708
1.00K 1.00K 1.00K
5%
5%
5%
1/32W
1/32W
1/32W
MF
MF
MF
2 01005
2 01005
2 01005
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
AP_TO_RCAM_I2C_SCL 16 23 AP_BI_RCAM_I2C_SDA 16 23
23 90_RCAM_TO_AP_MIPI_DATA1_P 23 90_RCAM_TO_AP_MIPI_DATA1_N
A22 MIPI0C_DPDATA1 B22 MIPI0C_DNDATA1
23 90_RCAM_TO_AP_MIPI_DATA2_P 23 90_RCAM_TO_AP_MIPI_DATA2_N
A24 MIPI0C_DPDATA2 B24 MIPI0C_DNDATA2
23 90_RCAM_TO_AP_MIPI_DATA3_P 23 90_RCAM_TO_AP_MIPI_DATA3_N
A25 MIPI0C_DPDATA3 B25 MIPI0C_DNDATA3
23 90_RCAM_TO_AP_MIPI_CLK_P 23 90_RCAM_TO_AP_MIPI_CLK_N
A23 MIPI0C_DPCLK B23 MIPI0C_DNCLK
45_CAM0_REXT A29 MIPI0C_REXT
20 90_AP_TO_LCM_MIPI_DATA0_P 20 90_AP_TO_LCM_MIPI_DATA0_N
A3 MIPI0D_DPDATA0 B3 MIPI0D_DNDATA0
20 90_AP_TO_LCM_MIPI_DATA1_P 20 90_AP_TO_LCM_MIPI_DATA1_N
A4 MIPI0D_DPDATA1 B4 MIPI0D_DNDATA1
20 90_AP_TO_LCM_MIPI_DATA2_P 20 90_AP_TO_LCM_MIPI_DATA2_N
A6 MIPI0D_DPDATA2 B6 MIPI0D_DNDATA2
NC C8 MIPI0D_DPDATA3
B
NC C7 MIPI0D_DNDATA3
20 90_AP_TO_LCM_MIPI_CLK_P 20 90_AP_TO_LCM_MIPI_CLK_N
A5 MIPI0D_DPCLK B5 MIPI0D_DNCLK
A7 MIPI0D_REXT
45_LCM_REXT
VDDIO18_GRP4
VDDIO18_GRP4
ISP1_SCL D32 ISP1_SDA D31
SENSOR0_CLK D29 SENSOR0_RST C30
SENSOR1_CLK B31 SENSOR1_RST D30
45_AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN 23 SHUTDOWN IS ALSO RESET FCAM
45_AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN 11
SENSOR0_ISTRB
C29 NC
SENSOR0_XSHUTDOWN D28
SENSOR1_ISTRB
C31 NC
SENSOR1_XSHUTDOWN A31
AP_TO_STOCKHOLM_DWLD_REQ 29 CAM_EXT_LDO_EN 23
MIPI1C_REXT B29 45_CAM1_REXT
MIPI1C_DPDATA0 A26 MIPI1C_DNDATA0 B26
90_FCAM_TO_AP_MIPI_DATA0_P 11 90_FCAM_TO_AP_MIPI_DATA0_N 11
MIPI1C_DPDATA1 A28 MIPI1C_DNDATA1 B28
90_FCAM_TO_AP_MIPI_DATA1_P 11 90_FCAM_TO_AP_MIPI_DATA1_N 11
MIPI1C_DPCLK A27 MIPI1C_DNCLK B27
90_FCAM_TO_AP_MIPI_CLK_P 11 90_FCAM_TO_AP_MIPI_CLK_N 11
1R0703
4.02K
1%
1/32W
MF
2
01005 ROOM=SOC
AP_TO_FCAM_I2C_SCL 11 AP_BI_FCAM_I2C_SDA 11
R0707 61.9
1
2 45_AP_TO_RCAM_CLK 23
1/32W 1% 01005 MF ROOM=SOC
NOSTUFF
29 90_WLAN_TO_AP_PCIE1_RXDP_P
1 C0709
56PF
5%
2
16V NP0-C0G
01005
ROOM=SOC
29 90_WLAN_TO_AP_PCIE1_RXDP_N
R0709
61.9
1
2 45_AP_TO_FCAM_CLK 11
1/32W 1% 01005
MF ROOM=SOC NOSTUFF
1 C0710
56PF
5%
2
16V NP0-C0G
01005
ROOM=SOC
29 90_AP_TO_WLAN_PCIE1_TXDP_P
29 90_AP_TO_WLAN_PCIE1_TXDP_N
ROOM=SOC
C0705
0.1UF
12 X5R 20% 01005 4V
C0706
0.1UF
12 X5R 20% 01005 4V ROOM=SOC
ROOM=SOC
C0703
0.1UF
12 X5R 20% 01005 4V
C0704
0.1UF
12 X5R 20% 01005 4V ROOM=SOC
ROOM=SOC
C0720
0.1UF
29 90_AP_TO_WLAN_PCIE1_REFCLK1_P 1 2 X5R 20%
01005 4V
C0721
0.1UF
29 90_AP_TO_WLAN_PCIE1_REFCLK1_N 1 2 X5R 20%
01005 4V ROOM=SOC
NOTE: IS A FERRITE NEEDED? THERE ARE DCR CONCERNS.
26 12 4 PP0V95_FIXED_SOC
R0712
1
2
0.00
01005
ROOM=SOC
26 PP0V95_FIXED_SOC_PCIE
1 C0712
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=SOC
1 C0711
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
NOTE: PLACE NEAR THE PCIE PINS, NOT LPDP. 26 12 7 PP1V0
1 C0713
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=SOC
1 C0708
0.1UF
20%
2
4V X5R
01005
ROOM=SOC
D
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
PWRTERM2GND VDDA10_LPDP0 AL24 VDDA10_LPDP1 AL26 PWRTERM2GND VDDA10_LPDP2 AM25 PWRTERM2GND VDDA10_LPDP3 AM27 PWRTERM2GND VDD095_VPTX0_PCIE E13 VDD095_VPTX1_PCIE D11 VDD095_VP_PCIE E12 VDDA10_REFCLK_PCIE D14 VDD18_VPH_PCIE F13
90_WLAN_TO_AP_PCIE1_RXDP_C_P 90_WLAN_TO_AP_PCIE1_RXDP_C_N
AR30 NC
LPDP_AUX_P
AP30 NC
LPDP_AUX_N
AR26 NC
LPDP_TX0P
AP26 NC
LPDP_TX0N
AR27 NC
LPDP_TX1P
AP27 NC
LPDP_TX1N
AR28 NC
LPDP_TX2P
AP28 NC
LPDP_TX2N
AR29 NC
LPDP_TX3P
AP29 NC
LPDP_TX3N
AL28 NC
LPDP_CAL_DRV_OUT
AK26 NC
LPDP_CAL_VSS_EXT
B11 NC
PCIE_RX0_P
A11 NC
PCIE_RX0_M
B12 NC
PCIE_TX0_P
A12 NC
PCIE_TX0_M
NCA13 PCIE_REF_CLK0_P
B13 NC
PCIE_REF_CLK0_M
AB2 NC
PCIE_CLKREQ0_N
A10 PCIE_RX1_P B10 PCIE_RX1_M
90_AP_TO_WLAN_PCIE1_TXDP_C_P 90_AP_TO_WLAN_PCIE1_TXDP_C_N
A9 PCIE_TX1_P B9 PCIE_TX1_M
90_AP_TO_WLAN_PCIE1_REFCLK1_C_P A14 PCIE_REF_CLK1_P 90_AP_TO_WLAN_PCIE1_REFCLK1_C_N B14 PCIE_REF_CLK1_M
AB3 PCIE_CLKREQ1_N
45_PCIE_RESREF A8 PCIE_RESREF
1R0710
200
1%
1/32W
MF
2
01005 ROOM=SOC
ULPI_DATA0 H4 ULPI_DATA1 H3
AP_TO_OSCAR_SWDCLK_1V8 22 AP_BI_OSCAR_SWDIO_1V8 22
ULPI_DATA2 G3 NC ULPI_DATA3 G4
AP_TO_LEDDRV_EN 16
ULPI_DATA4 F2 NC ULPI_DATA5 G2 NC
C
1.0V
0.95V 1.0V 1.8V
ULPI_DATA6 F3 NC
24MA
ULPI_DATA7 F4
TOUCH_TO_AP_INT_L 24
POP-FIJI-1GB-DDR-B0
BGA SYM 6 OF 13
U0201
ULPI_CLK G5 ULPI_DIR E3 ULPI_NXT F1 ULPI_STP E4
OSCAR_TO_PMU_HOST_WAKE 13 22 LCM_TO_AP_HIFA_BSYNC 20 24 AP_TO_TOUCH_RESET_L 24 AP_TO_LCM_RESET_L 20
EDP_HPD G29
AP_TO_STOCKHOLM_EN 29
PCIE_REF_PAD_CLK_P C13NC
PCIE_REF_PAD_CLK_M
C12 NC
B
GPIO39/PCIE_PERST0_N
AK5 NC
GPIO43/PCIE_PERST1_N AL4 AP_TO_WLAN_PCIE1_RST_L 29
RF TEAM: CONFIRMED PD NEEDED
R0719
1R0719
100K
5%
1/32W MF 2 01005
R07011
4.02K
1%
1/32W
MF
01005 ROOM=SOC
2
1R0702
4.02K
1%
1/32W MF
2
01005 ROOM=SOC
23 20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24
29 WLAN_TO_AP_PCIE1_CLKREQ_L
1R0711
1.00K
5%
1/32W
MF
2
01005 ROOM=SOC
A
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
SOC:CAM,LCD,LPDP,PCIE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
7
SHEET
7
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
BUTTON FLEX (BUTTONS, ANC REF MIC, STROBE, STROBE_NTC, WIFI FLEX PAC)
D
MIC2 (ANC REF MIC): MIC2/4 BIAS, MIC2_P,_N
FL0813
120-OHM-210MA
26 10 PP_CODEC_TO_REARMIC2_BIAS
2
1
01005 ROOM=BUTTON
9 REARMIC2_TO_CODEC_P
FL0801
120-OHM-210MA
2
1
01005 ROOM=BUTTON
FL0802
120-OHM-210MA
9 REARMIC2_TO_CODEC_N
2
1
01005 ROOM=BUTTON
C
CODEC_TO_REARMIC2_BIAS_CONN 8
1 C0827
100PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
REARMIC2_TO_CODEC_P_CONN 8
1 C0801
56PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
1 C0802
56PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
REARMIC2_TO_CODEC_N_CONN 8
13 3 BUTTON_TO_AP_HOLD_KEY_L
C0810 1
27PF
5%
6.3V NP0-C0G
2
0201
ROOM=BUTTON
FL0809
120-OHM-210MA
1
2
01005 ROOM=BUTTON
BUTTON_TO_AP_HOLD_KEY_CONN_L 1
0201
D5.Z50V-861.20PF
2 ROOM=BUTTON
B
BUTTONS: RINGER, HOLD, VOL_UP/DOWN,
13 3 BUTTON_TO_AP_RINGER_A
FL0810
120-OHM-210MA
1
2
01005
ROOM=BUTTON
1
BUTTON_TO_AP_RINGER_A_CONN 8
C0819 1
27PF
5%
6.3V NP0-C0G
2
0201
ROOM=BUTTON
0201
D5.Z50V-861.21PF
2 ROOM=BUTTON
NORTH_AC_GND_SCREW 8 25 29
FL0811
120-OHM-210MA
13 3 BUTTON_TO_AP_VOL_DOWN_L
C0820 1
100PF
5%
10V NP0-C0G
2
01005
ROOM=BUTTON
1
2
01005
ROOM=BUTTON
BUTTON_TO_AP_VOL_DOWN_CONN_L 8
1 DZ0812
12V-33PF
01005-1 2 ROOM=BUTTON
NORTH_AC_GND_SCREW 8 25 29
FL0812
120-OHM-210MA
13 3 BUTTON_TO_AP_VOL_UP_L
C0821 1
100PF
5%
10V NP0-C0G
2
01005
ROOM=BUTTON
1
2
BUTTON_TO_AP_VOL_UP_CONN_L 8
01005 ROOM=BUTTON
1 DZ0813
12V-33PF
01005-1
2 ROOM=BUTTON
NORTH_AC_GND_SCREW 8 25 29
A
RIGHT BUTTON B2B
MLB: 516S1312
J0801 ROOM=BUTTON
BB35S-RB12-3A
F-ST-SM
14
13
8 BUTTON_TO_AP_HOLD_KEY_CONN_L 2
1
8 REARMIC2_TO_CODEC_P_CONN
4
3
8 REARMIC2_TO_CODEC_N_CONN
6
5
8 CODEC_TO_REARMIC2_BIAS_CONN 8
7
8 RCAM_TO_STROBE_NTC_CONN
10
9
NC 12
11
16
15
PP_STRB_DRIVER_TO_LED_WARM 8 16 26
PP_STRB_DRIVER_TO_LED_COOL 8 16 26
XW0801 SM
STROBE_GND_RET 1
2
ROOM=STROBE
LEFT BUTTON B2B
MLB: 516S1315
8 BUTTON_TO_AP_VOL_UP_CONN_L
ROOM=BUTTON
J0802
BB35S-RB6-3A
F-ST-SM
8
7
2 4 8 BUTTON_TO_AP_VOL_DOWN_CONN_L 6
1
3
5
BUTTON_TO_AP_RINGER_A_CONN 8
10
9
STROBE: LED WARM
16 8 PP_STRB_DRIVER_TO_LED_WARM
26
C0822 1
100PF
5%
16V NP0-C0G
2
01005
ROOM=BUTTON
STROBE: LED COOL
26 16 8 PP_STRB_DRIVER_TO_LED_COOL
C0826 1
100PF
5%
16V NP0-C0G
2
01005
ROOM=BUTTON
1 C0824
27PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
1 C0825
27PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
STROBE: NTC
FL0817
120-OHM-210MA
16 RCAM_TO_STROBE_NTC
R08031
51.1K
1%
1/32W MF
01005 ROOM=BUTTON
2
1
2
01005 ROOM=BUTTON
RCAM_TO_STROBE_NTC_CONN 8
1 C0828
56PF
5%
2
16V NP0-C0G
01005
ROOM=BUTTON
8
7
6
5
4
3
2
1
D
C
B
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
IO:BUTTON FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
8
SHEET
8
OF OF
55 54
2
1
8
7
6
L67 AUDIO CODEC
https://www.mobile-manuals.com/
5
4
3
2
1
AUDIO I/O
D
D
(ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS)
VOICE
MIC
18 9 LOWERMIC1_TO_CODEC_P
18 9 LOWERMIC1_TO_CODEC_N
NOSTUFF
1 C0927
56PF
5%
2
16V NP0-C0G
01005
ROOM=CODEC
NOSTUFF
1 C0930
56PF
5%
2
16V NP0-C0G
01005
ROOM=CODEC
C0922
0.1UF
12
20%
X5R
4V
01005
ROOM=CODEC
C0923
0.1UF
12
20%
X5R
4V
01005
ROOM=CODEC
ROOM=CODEC
R0915
ROOM=CODEC
18 9 CODEC_TO_HPHONE_HS4
1.33K
1
2
1%
C0920
U0900
1/32W MF
0.1UF
WLCSP
CS42L67-CWZR-A1
C
01005 NO_XNET_CONNECTION=TRUE
ROOM=CODEC
C0904 1
EXTMIC_TO_CODEC_P
12
20%
X5R
4V
01005
ROOM=CODEC
SYM 1 OF 3
LOWERMIC1_TO_AIN1_P G2 AIN1+ PRIMARY
LOWERMIC1_TO_AIN1_N
G1
(VOICE) MIC AIN1-
AOUT1+ K7 AOUT1- L7
CODEC_TO_RCVR_P 11 CODEC_TO_RCVR_N 11
C
HEADPHONE MIC
220PF
10%
10V X7R-CERM
2
NO_XNET_CONNECTION=TRUE
EXTMIC_TO_CODEC_N C0921
0.1UF
EXTMIC_TO_AIN2_P EXTMIC_TO_AIN2_N
F4 AIN2+ HEADPHONE F3 AIN2- MIC
AOUT2+ L5 AOUT2- K5
CODEC_TO_HAC_P 11 CODEC_TO_HAC_N 11
ROOM=CODEC
R0950
1.33K
18 9 CODEC_TO_HPHONE_HS3 1
2
01005
1% 1/32W
MF 01005
NO_XNET_CONNECTION=TRUE
ANC REF MIC
9 8 REARMIC2_TO_CODEC_P
9 8 REARMIC2_TO_CODEC_N
NOSTUFF
1 C0942
56PF
5%
2
16V NP0-C0G
01005
NOSTUFF
1 C0943
56PF
5%
2
16V NP0-C0G
01005
12
20%
X5R
4V
01005
ROOM=CODEC
C0940
0.1UF
12
20% 4V
X5R 01005
ROOM=CODEC
C0941
0.1UF
12
20%
X5R
4V
01005
ROOM=CODEC
REARMIC2_TO_AIN5_P REARMIC2_TO_AIN5_N
NC NC
F2 F1
AIN3+ AIN3-
ANALOG MIC IN
NC
E4
AIN4+
ANC REF MIC2
NC E3 AIN4-
E1 AIN5+ ANC E2 AIN5- REF MIC1
FRONTMIC3_TO_AIN6_P FRONTMIC3_TO_AIN6_N
D1 AIN6+ ANC D2 AIN6- ERROR MIC
NC NC
D3 D4
AIN7+ AIN7-
ANALOG LINEIN
NC
C1
AIN8+
ANALOG LINEIN
NC C2 AIN8-
LOWERMIC1_TO_DIN1_SD LOWERMIC1_TO_DIN1_SCLK
A6 DMIC1_SD B6 DMIC1_SCLK
MIC2MIC3_TO_DIN2_SD
A3 DMIC2_SD
LINEOUT_REF K8
LINEOUTA J8 NC LINEOUTB H8 NC
HPOUTA J9 HPOUTB K9
HS3 K1
HS4 L2
HS3_REF L9 HS4_REF L8 HPDETECT G8
DN G10 DP F10
MBUS_REF F11
CODEC_TO_HPHONE_HS3 9 18 CODEC_TO_HPHONE_HS4 9 18 CODEC_TO_HPHONE_HS3_REF 18 CODEC_TO_HPHONE_HS4_REF 18 HPHONE_TO_CODEC_DET 18
NOSTUFF
C0950 1
56PF
5%
16V NP0-C0G
2
01005
ROOM=CODEC
NOSTUFF
C0951
1
56PF
5%
16V NP0-C0G
2
01005
ROOM=CODEC
CODEC_TO_HPHONE_L 18 CODEC_TO_HPHONE_R 18
ROOM=CODEC
C0952
100PF
12
ROOM=CODEC
ROOM=CODEC
C0944
0.1UF
B
12
20% 4V
X5R 01005
ANC
ERROR
11 9 FRONTMIC3_TO_CODEC_P
MIC 11 9 FRONTMIC3_TO_CODEC_N
NOSTUFF
1 C0946
56PF
5%
2
16V NP0-C0G
01005
ROOM=CODEC
NOSTUFF
1 C0947
56PF
5%
2
16V NP0-C0G
ROOM=CODEC 01005
ROOM=CODEC
C0945
0.1UF
12
20% 4V
X5R 01005
ROOM=CODEC
MIC2MIC3_TO_DIN2_SCLK A2 DMIC2_SCLK
R0902
5% 10V
20.0
NP0-C0G
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N
1
2
5% 1/32W
MF 01005
ROOM=CODEC
01005
ROOM=CODEC
1 C0953
100PF
90_CODEC_BI_TRISTAR_MIKEYBUS_N 17
B
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P CODEC_MBUS_REF 18
R0903
20.0
1
2
2
5% 10V
NOSTUFF
NP0-C0G
01005
90_CODEC_BI_TRISTAR_MIKEYBUS_P 17
5% 1/32W
MF 01005
ROOM=CODEC
C0954NO_XNET_CONNECTION=TRUE
100PF
12
5%
10V NP0-C0G
01005
ROOM=CODEC
18 9 LOWERMIC1_TO_CODEC_P 18 9 LOWERMIC1_TO_CODEC_N
ROOM=SOC
R0941 NO_XNET_CONNECTION=TRUE 1
2 NOSTUFF
0.00
01005
R0942
ROOM=SOC
NO_XNET_CONNECTION=TRUE 1
2 NOSTUFF
0.00
01005
ROOM=SOC
9 8 REARMIC2_TO_CODEC_P
R0943 NO_XNET_CONNECTION=TRUE 1
2 NOSTUFF
A
0.00
01005
R0944
11 9 FRONTMIC3_TO_CODEC_P
NO_XNET_CONNECTION=TRUE 1ROOM=SOC2 NOSTUFF
0.00
01005
9 8 REARMIC2_TO_CODEC_N 11 9 FRONTMIC3_TO_CODEC_N
ROOM=SOC
R0945 NO_XNET_CONNECTION=TRUE 1
2 NOSTUFF
0.00
01005
R0946
ROOM=SOC
NO_XNET_CONNECTION=TRUE 1
2 NOSTUFF
0.00
01005
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
AUDIO:L67 CODEC (1/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
9
SHEET
9
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
6
L67 AUDIO CODEC
https://www.mobile-manuals.com/
5
4
3
2
1
D
POWER, MICBIAS
D
DIGITAL SYSTEM I/O
NOTE: C1022 WAS REDUCED TO 2.2UF BECAUSE OF ADDITIONAL NEARBY VCC MAIN CAPS
ROOM=CODEC
CS42L67-CWZR-A1
48 39 31 26 23 17 16 15 14 12 PP_VCC_MAIN
52 51
23 20 15 13 12 11 7 6 5 3 2 PP1V8
27 26 25 24
C1074 ROOM=CODEC
1
2.2UF
20%
2
6.3V X5R
0201-1
1 C1022
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=CODEC
1 C1031
0.1UF
20%
2
6.3V X5R-CERM
01005
ROOM=CODEC
1 C1075
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=CODEC
PCB: C1021 AT U0921.L6
1 C1013
3 45_AP_TO_CODEC_I2S0_MCLK
A9 MCLK
WEAK INT PD
U0900
WLCSP
A1 C5
SYM 3 OF 3
B1
3 45_AP_TO_CODEC_ASP_I2S0_BCLK
C10 ASP_SCLK
F9
3 AP_TO_CODEC_ASP_I2S0_LRCLK
B11 ASP_LRCK
D5
3 AP_TO_CODEC_ASP_I2S0_DOUT
C9 ASP_SDIN
D7
3 CODEC_TO_AP_ASP_I2S0_DIN
A8 ASP_SDOUT
ALL ASP PINS:WEAK INT PD
E5
3 45_AP_TO_CODEC_VSP_I2S4_BCLK
E9 VSP_SCLK
E6
29 26 17 15 14 13 12 10 4 3 PP1V8_SDRAM
0.1UF
20%
2
4V X5R
01005
ROOM=CODEC
1 C1014
10UF
20%
2
6.3V CERM-X5R
0402-9
1 C1016
0.1UF
20%
2
4V X5R
01005
3 AP_TO_CODEC_VSP_I2S4_LRCLK 3 AP_TO_CODEC_VSP_I2S4_DOUT 3 CODEC_TO_AP_VSP_I2S4_DIN
16 3 45_AP_TO_CODEC_XSP_I2S2_BCLK 16 3 AP_TO_CODEC_XSP_I2S2_LRCLK 16 3 AP_TO_CODEC_XSP_I2S2_DOUT 16 3 CODEC_TO_AP_XSP_I2S2_DIN
E8 D10 D11
B8 B7 C7 A7
VSP_LRCK/FSYNC VSP_SDIN VSP_SDOUT
ALL VSP PINS:WEAK INT PD
XSP_SCLK XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE XSP_SDOUT
ALL XSP PINS:WEAK INT PD
E7 GND
F5 F6 F7 F8 G7 H3 H4
ROOM=CODEC
ROOM=CODEC
J3
VA J1 VCP G11
A11 VD B10
VL B9 VP L6 VPROG_CP H11
26 16 12 PP1V8_VA_L19_L67
C
1 C1012
2.2UF
ROOM=CODEC
3 AP_TO_CODEC_SPI_CS_L
B5 CS*
J4
3 AP_TO_CODEC_SPI_CLK
B4 CCLK
C
3 AP_TO_CODEC_SPI_MOSI
B3 CDIN
10 CODEC_AGND
20%
2
6.3V X5R
0201-1
ROOM=CODEC
U0900
KEEP THESE CAPS AT CODEC PINS
FLYP J11 26 PP_CODEC_VHP_FLYP
ROOM=CODEC
1 C1032
2.2UF
20%
29 26 17 15 14 13 12 10 4 3 PP1V8_SDRAM
ROOM=CODEC
1R1045
1.00K
5% 1/32W MF
3 CODEC_TO_AP_SPI_MISO 3 CODEC_TO_AP_INT_L 13 CODEC_TO_PMU_MIKEY_INT_L
A4 CDOUT
WEAK INT PD L67 WEAK INT PD = 550K - 2450K
G4 INT*
G5 WAKE*
WLCSP
SYM 2 OF 3
CS42L67-CWZR-A1
KEEP THESE CAPS AT CODEC PINS
26 18 PP_CODEC_TO_MIC1_BIAS
J5 MIC1_BIAS
ROOM=CODEC
C1020 1
C1021
ROOM=CODEC
1.0UF
4.7UF
1R1000
2.21K
1%
1/32W MF 2 01005
20%
6.3V X5R
2
0201-1
18 MIC1_BIASFILT_RET
2 1 MIC1_BIAS_FILT J6 MIC1_BIAS_FILT
ROOM=CODEC
CODEC_AGND 10
20%
6.3V X5R-CERM1
402
26 PP_EXTMIC_BIAS_IN
L4 MIC2_BIAS_IN
ROOM=CODEC
FLYC
26
FLYN
+VCP_FILT
G9 26 PP_CODEC_VHP_FLYC H10
J10 PP_CODEC_VHP_FLYN H9
2
6.3V X5R
0201-1
C1033 ROOM=CODEC
1
2.2UF
20%
2
6.3V X5R
0201-1
K11
26 PP_CODEC_VCPFILT+
GNDCP0 K10 GNDCP1 L11
PGND_CODEC_GNDCP
-VCP_FILT L10 SPEAKER_VQ J7
26 PP_CODEC_VCPFILT26 PP_CODEC_SPKR_VQ
ROOM=CODEC
KEEP THESE CAPS AT CODEC PINS
XW1048
SM
1
2
ROOM=CODEC
1 C1025
4.7UF
20%
2
6.3V X5R-CERM1
402
ROOM=CODEC
1 C1029
4.7UF
20%
2
6.3V X5R-CERM1
402
2 01005
CODEC_RESET_L
G3 RESET*
E10 NC
E11 NC
A5 NC
C6 NC
C8 NC
D6 NC
TSTO
TSTO MUST BE NC
D8 D9 B2 TSTI C3 C4 C11
1 C1037
1.0UF
20%
2
6.3V X5R
0201-1
26 PP_EXTMIC_BIAS 26 PP_EXTMIC_BIAS_FILT_IN 26 PP_EXTMIC_BIAS_FILT
L3 MIC2_BIAS K4 MIC2_BIAS_FILT_IN K3 MIC2_BIAS_FILT
GNDP K6
FILT2+6 H1 PP_CODEC_FILT+
FILT- H2 C1024 1
1 C1034
4.7UF
20%
2
6.3V X5R-CERM1
402
KEEP THIS CAP AT CODEC PINS
ROOM=CODEC
1 C1038
4.7UF
ROOM=CODEC
B
20%
2
6.3V X5R-CERM1
C1015 1
1.0UF
402
20%
ROOM=CODEC
6.3V X5R
2
ROOM=CODEC
26 11PP_CODEC_TO_FRONTMIC3_BIAS H7 MIC3_BIAS FRONTMIC3_TO_CODEC_RET_FILT G6 MIC3_BIAS_FILT
26 8PP_CODEC_TO_REARMIC2_BIAS H6 MIC4_BIAS REARMIC2_TO_CODEC_RET_FILT H5 MIC4_BIAS_FILT
GNDA J2
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=CODEC
KEEP THIS CAP AT CODEC PINS CODEC_AGND 10
B
0201-1
1 C1000
A10 GNDD L1 GNDHS0 K2 GNDHS1
1.0UF
2 ROOM=CODEC
ROOM=CODEC
C1018 1
ROOM=BUTTON_B2B
XW1002
4.7UF
20%
6.3V X5R-CERM1
2
402
SHORT-10L-0.1MM-SM
1
2 FRONTMIC3_BIAS_FILT_GND
20%
2
6.3V X5R
0201-1
1 ROOM=CODEC
C1019
2
4.7UF
20%
6.3V X5R-CERM1 402
ROOM=BUTTON_B2B
XW1004
SHORT-10L-0.1MM-SM
REARMIC2_BIAS_FILT_GND1
2
XW1003
SHORT-10L-0.1MM-SM 1
PCB NOTE: PLACE NEAR J1111 GND PIN
A
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
AUDIO:L67 CODEC (2/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
10
SHEET
10
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
FRONT CAM FLEX B2B
(FCAM, PROX, ALS, RECEIVER, ANC ERROR MIC)
D
15 13 12 10 7 6 5 3 2 PP1V8
27 26 25 24 23 20
FL1123
FERR-22-OHM-1A-0.055OHM
1
2
0201 ROOM=CG_B2B
PP1V8_FCAM_CONN 11 26
1 C1107 1
0.1UF
20%
2
4V X5R
2
01005
ROOM=CG_B2B
C1104
100PF 5% 16V NP0-C0G
01005
ROOM=CG_B2B
26 12 5 4 2 PP1V2
FL1166
FERR-22-OHM-1A-0.055OHM
1
2
0201 ROOM=CG_B2B
PP1V2_FCAM_VDDIO_CONN 11 26
1 C1166
0.1UF
20%
2
4V X5R
01005
ROOM=CG_B2B
1 C1167
100PF
5%
16V
2
NP0-C0G
01005
ROOM=CG_B2B
FL1144
FERR-22-OHM-1A-0.055OHM
26 23 PP2V85_CAM_VDD
1
2
PP2V85_FCAM_AVDD_CONN 11 26
C1193 1
0201 ROOM=CG_B2B
1 C1143 1 C1105
2.2UF
20%
6.3V X5R
2
0201-1
0.1UF
20%
2
6.3V X5R-CERM
01005
100PF
5%
16V
2
NP0-C0G
01005
ROOM=CG_B2B
ROOM=CG_B2B
ROOM=CG_B2B
C
CAMERA
B
FL1113
120-OHM-25%-250MA-0.5DCR
7 45_AP_TO_FCAM_CLK
1
2
45_AP_TO_FCAM_CLK_CONN 11
01005 ROOM=CG_B2B
1 C1198
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
FL1112
120-OHM-25%-250MA-0.5DCR
7 AP_TO_FCAM_SHUTDOWN
1
2
AP_TO_FCAM_SHUTDOWN_CONN 11
01005 ROOM=CG_B2B
FL1115
1 C1102
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
120-OHM-25%-250MA-0.5DCR
7 AP_TO_FCAM_I2C_SCL
1
2
01005 ROOM=CG_B2B
1 C1192
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
FL1114
120-OHM-25%-250MA-0.5DCR
AP_TO_FCAM_SCL_CONN 11
7 AP_BI_FCAM_I2C_SDA 90_FCAM_TO_AP_MIPI_DATA0_N
7
1
2
01005 ROOM=CG_B2B
L1139
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
4
1
AP_BI_FCAM_SDA_CONN 11
1 C1196
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
90_FCAM_TO_AP_MIPI_DATA0_CONN_N 11
90_FCAM_TO_AP_MIPI_DATA0_P
7
90_FCAM_TO_AP_MIPI_DATA1_P
7
3
2
ROOM=CG_B2B
L1140
90-OHM-0.1A-0.7-3GHZ TAM0605
SYM_VER-1
4
1
90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11
7 90_FCAM_TO_AP_MIPI_DATA1_N
3
2
ROOM=CG_B2B
90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11
L1135
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
A
90_FCAM_TO_AP_MIPI_CLK_P
7
4
1
90_FCAM_TO_AP_MIPI_CLK_CONN_P 11
90_FCAM_TO_AP_MIPI_CLK_N
7
3
2
ROOM=CG_B2B
90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
26 12 11 PP3V0_PROX_IRLED
1 C1103
100PF
5% 16V
2
NP0-C0G
01005
ROOM=CG_B2B
SPECIAL Z = 0.60 MM MAX IRLED = 104-128MA
1 C1144
0.1UF
20%
2
4V X5R
01005
ROOM=CG_B2B
1 C1101
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=CG_B2B
1 C1114
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=CG_B2B
1 C1106
4.3UF
20%
2
4V X5R-CERM
0610-1
ROOM=CG_B2B
26 12 PP3V0_PROX_ALS
FL1104
120-OHM-25%-250MA-0.5DCR
5 MA
2
1
PP3V0_PROX_CONN 11 26
01005 ROOM=CG_B2B
1 C1199
100PF
5%
16V
2
NP0-C0G
01005
ROOM=CG_B2B
C1108 1
4.3UF
20%
4V X5R-CERM
2
0610-1
ROOM=CG_B2B
FL1145
120-OHM-25%-250MA-0.5DCR
0.25 MA
1
2
PP3V0_ALS_CONN 11 26
C1109 1 C1113 1
2.2UF 2.2UF
20%
20%
6.3V
6.3V
X5R
2 X5R
2
0201-1
0201-1
ROOM=CG_B2B ROOM=CG_B2B
01005 ROOM=CG_B2B
1 C1100
0.1UF
20%
2
6.3V X5R-CERM
01005
1 C1163
100PF
5%
16V
2
NP0-C0G
01005
ROOM=CG_B2B
ALS, PROX
FL1158
24 CUMULUS_TO_PROX_RX_EN_1V8
1
2
120-OHM-210MA
01005 ROOM=CG_B2B
PROX_RX SIGNAL MUST BE TREATED WITH CARE
CUMULUS_TO_PROX_RX_EN_1V8_CONN 11
1 C1158
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
20 3 AP_BI_I2C2_SDA 20 3 AP_TO_I2C2_SCL
3 ALS_TO_AP_INT_L 11 PGND_IRLED_K
24 11
FL1102
1
2
120-OHM-210MA
01005
ROOM=CG_B2B
FL1120
1
2
120-OHM-210MA
01005 ROOM=CG_B2B
FL1157
2
1
120-OHM-210MA
01005
ROOM=CG_B2B
45_PROX_TO_CUMULUS_RX_CONN
1 C1162
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
AP_BI_I2C2_SDA_ALS_CONN 11
1 C1111
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
AP_TO_I2C2_SCL_ALS_CONN 11
1 C1110
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
ALS_TO_AP_INT_CONN_L 11
1 C1112
56PF
5%
2
16V NP0-C0G
01005
ROOM=CG_B2B
3
Q1101 D
S
SYM_VER_1 2
ROOM=CG_B2B
DMN3730UFB4
DFN1006H4-3
G1
CUMULUS_TO_PROX_TX_EN_BUFF 24
1R1185
1.00M
5%
1/32W MF
2
01005 ROOM=CG_B2B
8
7
6
5
4
3
2
1
THIS ON ONE MLB ---> 516S1081 RECEPTACLE SENSOR HOTBAR ---> 998-6868
J1111
AA22L
F-ST-SM
41 ROOM=CG_B2B
37
38
11 CODEC_TO_RCVR_CONN_N
1
11 CODEC_TO_RCVR_CONN_P
3
26 11 PP1V8_FCAM_CONN
5
26 11 PP2V85_FCAM_AVDD_CONN
7
9
11
11 45_AP_TO_FCAM_CLK_CONN
13
11 AP_TO_FCAM_SCL_CONN
15
11 AP_TO_FCAM_SHUTDOWN_CONN
17
11 AP_BI_FCAM_SDA_CONN
19
21
26 11 PP3V0_PROX_CONN
23
11 CUMULUS_TO_PROX_RX_EN_1V8_CONN 25
27
11 AP_BI_I2C2_SDA_ALS_CONN
29
11 ALS_TO_AP_INT_CONN_L
31
11 PGND_IRLED_K
33
11 FRONTMIC3_TO_CODEC_N_CONN
35
39 42
2
CODEC_TO_HAC_CONN_P 11
4
CODEC_TO_HAC_CONN_N 11
6
PP1V2_FCAM_VDDIO_CONN 11 26
8
10
90_FCAM_TO_AP_MIPI_DATA0_CONN_N 11
D
12
90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11
14
90_FCAM_TO_AP_MIPI_CLK_CONN_P 11
16
90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
18
90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11
20
90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11
22
24
26
45_PROX_TO_CUMULUS_RX_CONN 11 24
28
PP3V0_ALS_CONN 11 26
30
AP_TO_I2C2_SCL_ALS_CONN 11
32
PP3V0_PROX_IRLED 11 12 26
34
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 26
36
FRONTMIC3_TO_CODEC_P_CONN 11
40
AUDIO
3
FL1148
120-OHM-210MA
26 10 PP_CODEC_TO_FRONTMIC3_BIAS 1
2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 26
01005 ROOM=CG_B2B
1 DZ1115
6.8V-100PF
01005
ROOM=CG_B2B
2 ROOM=CG_B2B
C
FL1164
70-OHM-25%-0.28A
9 CODEC_TO_HAC_N
2
1
01005
ROOM=CG_B2B
FL1165
70-OHM-25%-0.28A
CODEC_TO_HAC_CONN_N 11
NO_XNET_CONNECTION=TRUE
1 DZ1118
12V-33PF 01005-1 2 ROOM=CG_B2B
9 CODEC_TO_HAC_P
2
1
01005
CODEC_TO_HAC_CONN_P 11
NO_XNET_CONNECTION=TRUE
1 DZ1119
12V-33PF 01005-1 2 ROOM=CG_B2B
9 CODEC_TO_RCVR_N
ROOM=CG_B2B
FL1151
70-OHM-25%-0.28A
1
2
01005
CODEC_TO_RCVR_CONN_N 11
NO_XNET_CONNECTION=TRUE
1 DZ1116
12V-33PF 01005-1
2 ROOM=CG_B2B
9 CODEC_TO_RCVR_P
ROOM=CG_B2B
FL1152
B
70-OHM-25%-0.28A
1
2
01005
CODEC_TO_RCVR_CONN_P 11
NO_XNET_CONNECTION=TRUE
1 DZ1117
12V-33PF 01005-1 2 ROOM=CG_B2B
9 FRONTMIC3_TO_CODEC_N 9 FRONTMIC3_TO_CODEC_P
ROOM=CG_B2B
FL1103
120-OHM-210MA
1
2
01005
FRONTMIC3_TO_CODEC_N_CONN 11
NO_XNET_CONNECTION=TRUE
1 DZ1114
6.8V-100PF
01005 2 ROOM=CG_B2B
ROOM=CG_B2B
FL1101
120-OHM-210MA
2
1
01005
FRONTMIC3_TO_CODEC_P_CONN 11
NO_XNET_CONNECTION=TRUE
1 DZ1113
6.8V-100PF
01005 2 ROOM=CG_B2B
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
CAMERA:FRONT FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
11
SHEET
11
OF OF
55 54
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
H7 VDD1(BUCK3)=0.045A MAX BUCK3_SW1=0.500A MAX BUCK3_SW2=0.?A MAX BUCK3_SW3=0.?A MAX TOTAL=0.545A MAX
ADI PMU
(BUCK, LDO, VIBE DRIVER, 32K, CHARGER)
NOTE: L1210, L1212 BOMOPTIONS CONTROLLED ON PAGE1
SAME POLARITY
L1209 ROOM=PMU
1UH-3.0A-0.059OHM
1
2
PIFA20161B
L1210 ROOM=PMU
0.47UH-20%-3.3A-0.065OHM
1
2
MCMK2012TR47M-SM
L1211 ROOM=PMU 1UH-3.0A-0.059OHM
0V775/0V95/1V0
PP_CPU 4 26
1 C1290 1 C1292 1 C1294 1 C1235
15UF 15UF 15UF 15UF
20%
2
6.3V X5R
20%
2
6.3V X5R
20%
2
6.3V X5R
20%
2
6.3V X5R
0402-1
0402-1
0402-1
0402-1
ROOM=PMU
ROOM=PMU
ROOM=PMU ROOM=PMU
L1216
1.0UH-20%-2.4A-0.075HM
1
2 PCB:PLACE C1297 NEAR C1263
PIFE20161T-SM ROOM=PMU
XW1218
SHORT-10L-0.1MM-SM
1
2
ROOM=PMU
1 C1297 1 C1296
100PF
100PF
5%
5%
16V
16V
2
NP0-C0G 2
NP0-C0G
01005
01005
ROOM=PMU
ROOM=PMU
+
PP1V8_SDRAM 3 4 10 13 14 15 17
26 29
1 C1293
15UF
20%
2
6.3V X5R
0402-1
ROOM=PMU
1 C1243
15UF
20%
2
6.3V X5R
0402-1
ROOM=PMU
H7 VDD_CPU
7.6A MAX
1
2
APN: 338S1251 (ADI AZ)
PIFA20161B
D
U1202
L1212 ROOM=PMU
0.47UH-20%-3.3A-0.065OHM
1 C1222 1 C1245 1 C1262 1 C1228 15UF 15UF 15UF 15UF
D2186AZE0FJAVAC
20%
20%
20%
20%
FCCSP-N56-N61 ROOM=PMU
1
2
2
6.3V X5R
2
6.3V X5R
2
6.3V X5R
2
6.3V X5R
SYM 1 OF 3
MCMK2012TR47M-SM
0402-1 ROOM=PMU
0402-1 ROOM=PMU
0402-1 ROOM=PMU
0402-1 ROOM=PMU
26 25 18 17 14 PP5V0_USB
NOSTUFF
R1201
470
1
2 26 PP5V0_USB_TO_PMU
5% 1/32W MF-LF 01005
ROOM=PMU
NC N16 VBUS_OVP_OFF
NC M20 NC M21
VCENTER
N20
N21
P20 VBUS
P21
BUCK0_LX0 BUCK0_LX1 BUCK0_LX2
A7 26 PP_BUCK0_LX0
B7
DIDT=TRUE
C7
A9 26 PP_BUCK0_LX1
B9
DIDT=TRUE
C9
A12 26 PP_BUCK0_LX2 B12 DIDT=TRUE
C12
SAME POLARITY
L1213 ROOM=PMU
1UH-3.0A-0.059OHM
BAT/USB
25 14 CHARGER_VBATT_SNS
NC H20 NC H21 IBAT
K10 VBAT
48 39 31 26 23 17 16 15 14 10 PP_VCC_MAIN
52 51
1 C1220 1 C1200 1 C1217 1 C1218 C1250
10UF
10UF
10UF
10UF
2.2UF
C
20%
2
6.3V CERM-X5R
0402-9
20%
2
6.3V CERM-X5R
0402-9
20%
2
6.3V CERM-X5R
0402-9
20%
2
6.3V CERM-X5R
0402-9
20% 6.3V X5R 0201-1
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
NC L16 ACT_DIO
NC L20 NC L21
CHG_LX
J20
J21 VCC_MAIN
K7 VCC_MAIN_S
A4
B4 VDD_BUCK1
C4
BUCK0_LX3
A14 26 PP_BUCK0_LX3 B14 DIDT=TRUE
C14
1
2
PIFA20161B
L1214 ROOM=PMU
0.47UH-20%-3.3A-0.065OHM
BUCK0_FB E7
45_BUCK0_FB 4
BUCK1_LX0 BUCK1_LX1
A3 26 PP_BUCK1_LX0
B3
DIDT=TRUE
C3
A5 26 PP_BUCK1_LX1
B5
DIDT=TRUE
C5
1
2
MCMK2012TR47M-SM
BUCK1_FB E4
45_BUCK1_FB 4
L1215ROOM=PMU
1.0UH-20%-2.4A-0.075HM
1
2
0V9/0V95
PP_GPU 4 26
1 C1203 1 C1227
15UF 15UF
20%
20%
2
6.3V X5R
2
6.3V X5R
0402-1
0402-1
ROOM=PMU
ROOM=PMU
1 C1210 1 C1226
15UF 15UF
20%
20%
2
6.3V X5R
2
6.3V X5R
0402-1
0402-1
ROOM=PMU
ROOM=PMU
0V9/0V95
PP_VAR_SOC 5 26
BUCK INPUT BUCK
1 C1251
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1225
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1260
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1263
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1267
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1285
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1298
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1264
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=PMU
1 C1266
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
F1 F2 VDD_BUCK2
K1 K2 VDD_BUCK3 E20 E21 VDD_BUCK4
A17 B17
VDD_BUCK5 C17
N9 VDD_BUCK6 N8 VDD_BYP_BUCK6 A8 B8
VDD_BUCK001 C8
A13
G1 26 PP_BUCK2_LX
BUCK2_LX G2
DIDT=TRUE
PIFE20161T-SM
BUCK2_FB F4
45_BUCK2_FB 5
J1 BUCK3_LX J2
BUCK3_FB K6 P5
BUCK3_SW1 N5
P6 BUCK3_SW2 R6
P7 BUCK3_SW3 R7
26 PP_BUCK3_LX DIDT=TRUE
45_BUCK3_FB PP1V8 2 3 5 6 7 10 11 13 15 20 23 24
25 26 27
PP1V8_GRAPE 24 26
PP1V8_OSCAR 19 22 26
1 C1223 1 C1275 1 C1289
15UF 15UF 15UF
20%
2
6.3V X5R
20%
2
6.3V X5R
20%
2
6.3V X5R
0402-1
0402-1
0402-1
ROOM=PMU
ROOM=PMU
ROOM=PMU
B13 VDD_BUCK023
C13
N6 VBUCK3_SW N7
H7 VAR
1.8A MAX
H7 VDD_GPU
3.45A MAX
PCB:PLACE C1296 NEAR L1216
D
H7 VDDCA,VDD2
(BUCK4)=0.500A MAX BUCK4_SW1=1.000A MAX BUCK4_SW2=0.100A MAX
TOTAL=1.600A MAX
L1217
1.0UH-20%-2.4A-0.075HM
ROOM=PMU
1
2
+
PP1V2_SDRAM 2 4 12 23 26
PIFE20161T-SM
XW1220
SHORT-10L-0.1MM-SM
1
2
ROOM=PMU
1 C1214 1 C1216 1
15UF 15UF
20%
20%
2
6.3V X5R
2
6.3V X5R
2
0402-1
0402-1
ROOM=PMU
ROOM=PMU
C1288
100PF
5% 16V NP0-C0G 01005
ROOM=PMU
PCB:PLACE C1270 NEAR L1217
L1218 ROOM=PMU
C
1.0UH-20%-2.4A-0.075HM
1
2
PIFE20161T-SM
L1219 ROOM=PMU
0.47UH-30%-2.7A-0.065OHM
1
2
MCKK2012-SM
PP0V95_FIXED_SOC 4 7 26
1 C1240
15UF
20%
2
6.3V X5R
0402-1
ROOM=PMU
1 C1202
15UF
20%
2
6.3V X5R
0402-1
ROOM=PMU
1 C1209 1 C1241
15UF 15UF
20%
2
6.3V X5R
20%
2
6.3V X5R
0402-1
0402-1
ROOM=PMU
ROOM=PMU
H7 VDD_SRAM, VDD_SRAM_SOC
3.3A MAX
DESENSE CAPS FOR VCCMAIN:
C1271: WIFI MODULE C1272: AP PMU MODULE BB PMU MODULE:RF SIDE QPOET MODULE:RF SIDE
1 2
C1271 1
100PF
5%
16V NP0-C0G
2
01005
ROOM=WIFI
C1272
100PF 5% 16V NP0-C0G
01005
ROOM=PMU
B
26 23 12 4 2 PP1V2_SDRAM
1 C1278
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
N13 VDD_LDO6 P14 VDD_LDO2 H17 VDD_LDO1_3 J17 VDD_LDO4_13 N15 VDD_LDO5 L17 VDD_LDO7_8
L2 VDD_LDO10 N11 VDD_LDO9_11
NC P12 VDD_VIB NC R12 VIB
N12 VIB_PWM_EN
C1 XTAL1 D1 XTAL2 G9 VSS_RTC
45_PMU_TO_XTAL_OSC32
ROOM=PMU
C1276 1
18PF
5%
16V CERM
2
01005
ROOM=PMU
Y1200
45_XTAL_TO_PMU_OSC32
32.768K-20PPM-12.5PF
1
2
2.0X1.2X0.60-SM1
ROOM=PMU
1 C1283
18PF
5%
2
16V CERM
01005
A
XTAL VIBE
LDO INPUT
LDO
F20 26 PP_BUCK4_LX
BUCK4_LX F21
DIDT=TRUE
BUCK4_FB E18 45_BUCK4_FB
N3 VBUCK4_SW N4
M2 BUCK4_SW1 N2
BUCK4_SW2 L5
PP1V2 2 4 5 11 26 PP1V2_OSCAR 22 26
A16 B16 BUCK5_LX0 C16 A18 B18 BUCK5_LX1 C18 BUCK5_FB C21
26 PP_BUCK5_LX0 DIDT=TRUE
26 PP_BUCK5_LX1 DIDT=TRUE
45_BUCK5_FB 4
BUCK6_LX R9 NC BUCK6_FB L11NC BUCK6_BYP R8 NC
(50MA) VLDO1 (50MA) VLDO2 (50MA) VLDO3 (50MA) VLDO4 (1000MA) VLDO5 (150MA) VLDO6 (250MA) VLDO7 (250MA) VLDO8 (250MA) VLDO9
VLDO9_FB (100MA) VLDO10 (250MA) VLDO11
(5MA) VLDO12 (250MA) VLDO13
F18 2.5-3.3V +/-77.5MV R14 1.2-1.9V +/-42.5MV G18 2.5-3.3V +/-75MV H18 2.5-3.6V +/-75MV R15 2.5-3.6V +/-75MV R13 1.2-3.6V +/-82.5MV K18 2.5-3.6V +/-75MV NC L18 2.5-3.6V +/-70MV R10 2.5-3.6V +/-71.25MV P10 PP2V9_LDO9 L1 0.6-1.4V +/-25MV R11 2.5-3.6V +/-82.5MV L6 FIXED 1.8V, +/-5% J18 2.5-3.6V +/-71.25MV
VPUMP R5 45_PMU_VPUMP
SPEC REQUIRES 10NF, VPUMP RUNS AT 4.6V
VPUMP CAP: 30% DERATED.
1 C1208
0.1UF
20%
2
6.3V X5R-CERM
01005
ROOM=PMU
1 C1270
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
1 C1229
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
1 C1212
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
1 C1284 1 C1299 1 C1207
1.0UF 2.2UF 2.2UF
20%
20%
20%
2
6.3V X5R
2
6.3V X5R
2
6.3V X5R
0201-1
0201-1
0201-1
ROOM=PMU ROOM=PMU ROOM=PMU
B
TO DO: REVIEW ALL LDO ASSIGNMENTS (CHECK VDD_LDO INPUT SOURCE, CHECK CURRENT RATING FOR LDO OUT SOC USB PHY (25 MA) VS. LOAD REQUIREMENT AT DESTINATION, ETC)
SPEAKER AMP, CODEC VA (2.5 MA L1419, 3MA L67)
PP3V3_USB 2 26 PP1V8_VA_L19_L67 10 16 26
PP3V0_TRISTAR 15 17 26 29 PP3V0_IMU 19 26
TRISTAR VDH, WIFI_FLEX PAC (? MA) GYRO, ACCEL, COMPASS (? MA) NOTE: 3V +/- 5% PER EUGENE NAND (? MA) ACCESSORY POWER (? MA) PROX/ALS VDD (PROX: 0.75/1.2 MA ALS: 0.175/0.25 MA [TYP/MAX])
PP3V0_NAND 6 26 PP3V3_ACC 17 26
PP3V0_PROX_ALS 11 26
REAR CAM AUTO FOCUS (120MA PEAK, PROBABLY CAP AT 80MA) REAR/FRONT CAM AVDD (? MA) SOC 1V0 MIPI, USB_DVDD, DP (71 MA TOTAL)
PROX LED (102 MA TYP)
ALWAYS ON 1V8 (? MA)
PP1V0 7 26
PP3V0_PROX_IRLED 11 26
PP1V8_ALWAYS 3 5
14 26
PP3V0_MESA 21 26
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
POWER:ADI(1/2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
1 C1242
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=PMU
1 C1232 1 C1291
2.2UF 0.1UF
20%
20%
2
6.3V X5R
2
4V X5R
0201-1
01005
ROOM=PMU
ROOM=PMU
1 C1219 NOTICE OF PROPRIETARY PROPERTY:
2.2UF THE INFORMATION CONTAINED HEREIN IS THE
20%
PROPRIETARY PROPERTY OF APPLE INC.
2
6.3V X5R
0201-1
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
ROOM=PMU II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BRANCH
PAGE
12
SHEET
12
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
ADI PMU
(AMUX, GPIO, BUTTONS, ADC, THERMISTORS, SYSTEM I/F, GND)
D
2
1
D
C
NO_XNET_CONNECTION=TRUE
ROOM=PMU_
C1359 1
100PF
5%
6.3V CERM
2
01005
FOREHEAD NTC
1 NO_XNET_CONNECTION=TRUE ROOM=PMU_
R1308
10KOHM-1%
01005 2
FOREHEAD_NTC_P FOREHEAD_NTC_N
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
NO_XNET_CONNECTION=TRUE
ROOM=PMU_
C1367 1
100PF
5%
6.3V CERM
2
01005
CAMERA NTC
1 NO_XNET_CONNECTION=TRUE ROOM=PMU_
R1310
10KOHM-1%
01005 2
CAM_NTC_P CAM_NTC_N
B
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
NO_XNET_CONNECTION=TRUE
ROOM=PMU_
C1322 1
100PF
5%
6.3V CERM
2
01005
RADIO PA NTC
1 NO_XNET_CONNECTION=TRUE ROOM=PMU_
R1390
10KOHM-1%
01005 2
PA_NTC_P PA_NTC_N
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
NO_XNET_CONNECTION=TRUE
ROOM=PMU_
C1368 1
100PF
5%
6.3V CERM
2
A
01005
H7P NTC
1 NO_XNET_CONNECTION=TRUE ROOM=PMU_
R1357
10KOHM-1%
01005 2
SOC_NTC_P SOC_NTC_N
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
8
APN: 338S1251 (ADI AZ)
ROOM=PMU
R1316
200K
1
2
1%
MF
1/20W
201
ROOM=PMU
C1317
0.1UF
12
0201 6.3V
10% CERM-X5R
ROOM=PMU
C1318
1.0UF
12
ROOM=PMU
R1331
6.34K
1
2 TRISTAR_TO_PMU_USB_BRICKID 17
MF 01005
1% 1/32W
1 C1326
0.01UF
10%
2
6.3V X5R
01005
ROOM=PMU
AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN
ROOM=PMU U1202
D2186AZE0FJAVAC
1.8V ---> 1.8V ---> 1.8V ---> 1.8V ---> 1.8V --->
3.33V --->
NC NC 13 8 3 BUTTON_TO_AP_RINGER_A 8 3 BUTTON_TO_AP_VOL_UP_L 8 3 BUTTON_TO_AP_VOL_DOWN_L 20 15 LCM_TO_CHESTNUT_PWR_EN 13 TRISTAR_TO_PMU_USB_BRICKID_R
A1 AMUX_A0 B1 AMUX_A1 D2 AMUX_A2 E2 AMUX_A3 E1 AMUX_A4 H6 AMUX_A5 H5 AMUX_A6
FCCSP-N56-N61 SYM 2 OF 3
IREF
VREF
ADC/REFS
VDD_REF
VDD_RTC
FIXED 2.5V, +/-2%
BRICK_ID
ADC_IN7
15 13 CHESTNUT_TO_PMU_ADCIN7
H4 AMUX_A7
ADC_REF
AMUX
25 PMU_TO_TP_AMUX_AY
G4 AMUX_AY
ACC_ID
BASEBAND --->
29 RADIO_TO_PMU_ADC_SMPS1
J5 AMUX_B0
BUTTONS/DETECT
1.8V ---> 1.8V ---> BASEBAND --->
PCB: MAKE XW1328, XW1329 ACCESSIBLE!
29 RADIO_TO_PMU_ADC_PP_LDO11_VDDIO J6 AMUX_B1
29 13 45_PMU_TO_WLAN_CLK32K
NC K5 AMUX_B2 NC K8 AMUX_B3
L8 AMUX_B4
29 RADIO_TO_PMU_ADC_PP_LDO5_SIM
K9 AMUX_B5
2 AP_TO_PMU_TEST_CLKOUT
L9 AMUX_B6
29 RADIO_TO_PMU_ADC_SMPS4
L10 AMUX_B7
25 PMU_TO_TP_AMUX_BY
L4 AMUX_BY
17 15 13 3 AP_TO_I2C0_SCL
J4 SCL
TMPR_DET
ACC_DET
BUTTON1
100-300K INT PU
BUTTON2
100-300K INT PU
BUTTON3
100-300K INT PU
BUTTON4
100-300K INT PU
KEEPACT
NO INT PULL
SHDN
PP1300 ROOM=PMU
SM 1 P2MM-NSM PP
PP1301 ROOM=PMU
1 P2MM-NSM PP
17 15 3 AP_BI_I2C0_SDA 15 3 45_AP_TO_PMU_AND_BL_DWI_CLK 15 3 45_AP_TO_PMU_AND_BL_DWI_DO
SM
24 23 20 15 12 11 10 7 6 5 3 2 PP1V8
27 26 25
XW1304 NO_XNET_CONNECTION=TRUE
ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
XW1309 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
XW1306 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
3 PMU_TO_AP_PRE_UVLO_L
ROOM=PMU
R13011
100K
5% 1/32W
MF 01005 2
2 AP_TO_PMU_RESET_IN 17 TRISTAR_TO_PMU_HOST_RESET 3 AP_TO_PMU_SOCHOT1_L 25 17 15 4 2 RESET_1V8_L 3 PMU_TO_AP_IRQ_L
20 PMU_TO_PHOTON_ALIVE
FOREHEAD_TO_PMU_NTC
K4 K15 J16 NC K16
F8 P3 R3 P4 R4 P2 N1
L15
SDA
DWI_CK
100-300K INT PD
DWI_DI
100-300K INT PD
DWI_DO
PRE_UVLO
RESET_IN1
100-300K INT PD
RESET_IN2
100-300K INT PD
RESET_IN3
100-300K INT PU TO LDO12
RESET*
NO INT PULL
IRQ*
NO INT PULL
SYS_ALIVE
TDEV1
XW1311 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
XW1308 NO_XNET_CONNECTION=TRUE
ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
CAM_TO_PMU_NTC PA_TO_PMU_NTC SOC_TO_PMU_NTC
R17 TDEV2 P17 TDEV3 R19 TDEV4
XW1333 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
XW1314 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
XW1315 NO_XNET_CONNECTION=TRUE ROOM=PMU
1
2 SHORT-10L-0.1MM-SM
45_PMU_TCAL
C1365 1
100PF
5%
6.3V CERM
2
01005
ROOM=PMU
1R1309
3.92K
0.1%
1/20W
MF
2
0201 ROOM=PMU
P18 TCAL NC P19 TBAT
PLACE THESE XWS AT PMU
NTC
AP<->PMU
GPIO
OUT_32K
GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
20% X5R 6.3V 0201-1
F6 G5 E5 F7
N17 N18
45_PMU_IREF 26 PP_PMU_VREF
ROOM=PMU
C1319
0.1UF
12
26 PP_PMU_VDD_REF 26 PP_PMU_VDD_RTC
10% 6.3V CERM-X5R
0201
13 TRISTAR_TO_PMU_USB_BRICKID_R
1 C1323
1000PF
10%
2
6.3V X5R-CERM
01005
ROOM=PMU
CHESTNUT_TO_PMU_ADCIN7 13 15
E6 NC N19 NC
F5 NC R18 D21 D20 B20 C20 NC L7 N10 NC E8
F17 F16 E15 F15 G17 E17 E16 E14 H16 G16 F14 F13 E13 E12 NC E11 F12 NC E10 E9 F11 NC F9 NC F10 NC
BUTTON_TO_AP_MENU_KEY_L 3 21 BUTTON_TO_AP_HOLD_KEY_L 3 8
ROOM=PMU
1R1330
100K
5%
1/32W MF 2 01005
PP1V8_SDRAM 3 4 10 12 14 15 17 26 29 BUTTON_TO_AP_RINGER_A 3 8 13
AP_TO_PMU_KEEPACT
45_PMU_TO_WLAN_CLK32K 13 29
CHG_TO_PMU_INT_L 14 BB_TO_PMU_HOST_WAKE_L 29
PMU_TO_BB_RST_R_L TRISTAR_TO_AP_INT 3 17 STOCKHOLM_TO_PMU_HOST_WAKE
29
PMU_TO_OSCAR_RESET_CLK32K_L 22 WLAN_TO_PMU_HOST_WAKE 29
CODEC_TO_PMU_MIKEY_INT_L 10 PMU_TO_BT_REG_ON 29
BT_TO_PMU_HOST_WAKE 29 PMU_TO_WLAN_REG_ON 29 AP_TO_I2C0_SCL 3 13 15 17
OSCAR_TO_PMU_HOST_WAKE 7 22
PMU_TO_BB_VBUS_DET 29
WLAN_TO_PMU_PCIE_WAKE_L 29 PMU_TO_ACC_SW_ON 17
ROOM=PMU
R1312
1.00K
1
2
5% 1/32W
MF
01005
PMU_TO_BB_RST_L 29
3
ROOM=PMU
1R1387
1.00M
5% 1/32W MF 2 01005
ADI OTP: SEE RADAR 14032884
ROOM=PMU U1202
D2186AZE0FJAVAC
FCCSP-N56-N61
SYM 3 OF 3
A15
G13
B15 VSS_BUCK0_5
C15 A2
G14
H8 H9
C
B2
H10
VSS_BUCK1
C2
H11
A6
H12
B6
H13
VSS_BUCK01
C6
H14
G20
J8
G21 VSS_BUCK4
J9
A19
J10
B19
J11
VSS_BUCK5
C19
J12
P9 VSS_BUCK6
J13
A10
J14
A11
J15
B10
K11
B11 VSS_BUCK012
K12
C10
K13
C11
K14
H1 H2 VSS_BUCK23
VSS K17 L12
L13
G8 VSSA_BUCK0 G6 VSSA_BUCK1 H7 VSSA_BUCK2 J7 VSSA_BUCK3 H15 VSSA_BUCK4 G15 VSSA_BUCK5 P8 VSSA_BUCK6
L14
M1
N14
P1
P11 P13
B
P15
P16
K20
R1
K21 VSS_SW_CHG
R2
R16
A20
R20
A21
R21
B21
G7 VSS G10
G11
G12
SYNC_MASTER=N56_MLB
A SYNC_DATE=08/29/2013
PAGE TITLE
POWER:ADI(2/2)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
13
SHEET
13
OF OF
55 54
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
TIGRIS CHARGER & VIBE DRIVER
2
1
D
D
PP_VCC_MAIN 10 12 15 16 17 23 26 31 39 48
51 52
CHARGER_LDO 26
C1403 C1410 ROOM=CHARGER
ROOM=CHARGER
1
1
100PF
5% 16V
2 NP0-C0G 01005
2.2UF
20%
2
6.3V X5R
0201-1
1 C1450 1
220PF
10%
2
10V X7R-CERM
2
01005
ROOM=CHARGER
C1451
100PF
5% 16V NP0-C0G 01005
ROOM=CHARGER
CHARGER CAPS
1 C1411 1 C1415 ROOM=CHARGER 1 C1417
10UF
20%
2
6.3V CERM-X5R
0402-9
2.2UF
20%
2
6.3V X5R
0201-1
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=CHARGER
ROOM=CHARGER
C1418 ROOM=CHARGER
1
2.2UF
20%
2
6.3V X5R
0201-1
B3
B2
B1
A3
A2
A2 VDD_MAIN
B2 VDD_MAIN
D2 VDD_MAIN
C2 VDD_MAIN
CHARGER DESENSE CAPS
26 PMID_CAP
NOSTUFF
PLACE BY L1401
S
Q1403
1 C1407 1 C1409 1 C1453
1 C1452
CSD68815W15
A1
BGA
4.2UF
10%
2
16V X5R-CERM
0402-1
ROOM=CHARGER
4.2UF
10%
2
16V X5R-CERM
0402-1
ROOM=CHARGER
100PF
5%
2
25V NP0-C0G
01005
ROOM=CHARGER
100PF
5%
2
25V NP0-C0G
F5 PMID
01005 ROOM=CHARGER
A5
VBUS
U1401
SN2400B0YFF
WCSP
LDO G4 BOOT G5
26 25 18 17 12 PP5V0_USB
NOSTUFF
B5 VBUS D5 VBUS
26 12 5 3 PP1V8_ALWAYS
ROOM=CHARGER
R14031
100K
5%
1/32W
MF
C
01005 2
1 C1408
4.2UF
1 C1440
220PF
10%
2
16V X5R-CERM
0402-1
ROOM=CHARGER
10%
2
10V X7R-CERM
01005
ROOM=CHARGER
C1470
100PF
5% 25V NP0-C0G 01005
ROOM=CHARGER
C1471
100PF
5% 25V NP0-C0G 01005
ROOM=CHARGER
29 26 17 15 13 12 10 4 3 PP1V8_SDRAM
C5 VBUS E5 VBUS
21 16 14 3 AP_BI_I2C1_SDA
G3
21 16 14 3 AP_TO_I2C1_SCL
E4
XW1401 SM
1
2 SYS_ALIVE_TIGRIS E3
ROOM=CHARGER 17 TRISTAR_TO_PMU_OVP_SW_EN_L F4
SDA SCL SYS_ALIVE VBUS_OVP_OFF
BUCK_SW A4 BUCK_SW B4 BUCK_SW D4 BUCK_SW C4
BAT A1 BAT B1 BAT D1 BAT C1
13 CHG_TO_PMU_INT_L
G2 INT
BAT_SNS E1
26 CHG_BOOT 26 CHG_LX
ROOM=CHARGER
C1402
0.033UF
1
2 10%
16V X5R
402
CHARGER_VBATT_SNS 12 25
L1401
1
2
PIFE25201T-SM
1.0UH-20%-3.2A-0.065OHM
ROOM=CHARGER
NOSTUFF
ROOM=CHARGER
1R1401
100K
5% 1/32W MF 2 01005
C1
C2
C3
G
D ROOM=CHARGER
C1412 ROOM=CHARGER
1
2.2UF
20%
C1416 ROOM=CHARGER
1
2.2UF
20%
1 C1480
100PF
5% 16V
PP_BATT_VCC 14 16 25 26 40 45 46
C
26 PP_TIGRIS_VBUS_DET
F1 VBUS_DET
ACT_DIODE E2 CHG_ACT_DIO
2
6.3V X5R
0201-1
2
6.3V X5R
0201-1
2
NP0-C0G
01005
ROOM=CHARGER
F3 TEST
HDQ_HOST G1 HDQ_GAUGE F2
AP_TO_TIGRIS_SWI 3 BATTERY_SWI 25
DESENSE CAP PCB: PLACE CLOSE BY TIGRIS
A3 PGND B3 PGND D3 PGND C3 PGND
2 USB_VBUS_DETECT
R1454
68.1K
1
2
1% 1/32W
MF 01005
B
A 8
21 16 14 3 AP_BI_I2C1_SDA 21 16 14 3 AP_TO_I2C1_SCL
3 AP_TO_VIBE_EN 3 AP_TO_VIBE_TRIG
NOSTUFF
1R1411
100K
5% 1/32W MF 2 01005 ROOM=VIBE_DRIVER
VDD C2
ROOM=VIBE_DRIVER
U1400
DRV2604YZF
B2 SDA
BGA
OUT+ A3
C1 SCL
OUT- C3
PP_BATT_VCC 14 16 25 26 40 45 46
1 C1433
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=VIBE_DRIVER
A1 EN
VREG A2 VIBE_C_VREG
B1 IN/TRIG
1R1412
100K
5% 1/32W MF 2 01005 ROOM=VIBE_DRIVER
B3 GND
ROOM=VIBE_DRIVER
1 C1401
2.2UF
20%
2
6.3V X5R
0201-1
1 C1405
100PF
5%
16V
2
NP0-C0G
01005
ROOM=VIBE_DRIVER
VIBE_DRIVE_P 18 26 VIBE_DRIVE_N 18 26
1 C1406
100PF
5%
16V
2
NP0-C0G
01005
ROOM=VIBE_DRIVER
7
6
5
4
3
B
A
PAGE TITLE
POWER:TIGRISR,VIBE DRIVER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
14
SHEET
14
OF OF
55 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
CHESTNUT, BACKLIGHT DRIVER, MESA BOOST
D500 DISPLAY PMU (TI CHESTNUT, 338S1149)
D
39 31 26 23 17 16 15 14 12 10 PP_VCC_MAIN
52 51 48
1
L1519
1.5UH-20%-1.8A-0.118OHM
LQE2MRT1R5MG0-SM ROOM=CHESTNUT
2
C1547 1
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=CHESTNUT
26 PP_CHESTNUT_LXP
17 15 13 3 AP_TO_I2C0_SCL
U1501
TPS65730A0PYFF
BGA
CF1 C4
D1 VIN ROOM=CHESTNUT CF2 E4
26 PP_CHESTNUT_CP
B2 SW
26 PP_CHESTNUT_CN
A2 SYNC
NO INT PULL
D3 SCL
LCMBST B3 CPUMP B4
1 C1554
10UF
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
17 15 13 3 AP_BI_I2C0_SDA
D2 SDA
VNEG E3
20 13 LCM_TO_CHESTNUT_PWR_EN 25 17 13 4 2 RESET_1V8_L
13 CHESTNUT_TO_PMU_ADCIN7
C3 LCM_EN
200K INT PD
C2 RESET*
NO INT PULL
E1 ADCMUX
VNEG(SUB) E2 HVLDO1 A4 HVLDO2 A3
HVLDO3 A1
26 PP6V0_LCM_BOOST
PN5V7_SAGE_AVDDN
PP5V7_SAGE_AVDDH 24 26 PP5V7_LCM_AVDDH 20 26
PP5V1_GRAPE_VDDH 24 26
20 24 26
1 C1504
10UF
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
1 C1502
10UF
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
1 C1529
10UF
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
1 C1541 1 C1569
1 C1577
1UF
10UF
10UF
C
20%
2
6.3V X5R
0201
ROOM=CHESTNUT
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
20%
2
10V X5R-CERM
0402-8
ROOM=CHESTNUT
1 D
C
B3 C1 AGND B1 PGND1 D4 PGND2
A1 PGND B3 AGND
D500 BACKLIGHT DRIVER
L1503
15UH-20%-0.72A-0.9OHM
MESA BOOST A0
1
2
PITA32251T-SM
NOTE: D1501 IS 30V DIODE FOR N61 AND 20V FOR N56.
ROOM=BACKLIGHT
ROOM=BACKLIGHT
D1501
NSR0530P2T5G
B
26 PP_WLED_LX
A
K
1 C1505 1 C1530 1 C1531
APN: 353S3978
B
2.2UF
2.2UF
2.2UF
39 31 26 23 17 16 15 14 12 10 PP_VCC_MAIN
52 51 48
SOD-923-1
20%
2
25V X5R-CERM
20%
2
25V X5R-CERM
20%
2
25V X5R-CERM
ROOM=MESA
C1552 1
1 C1597
0402-1
ROOM=BACKLIGHT
0402-1
ROOM=BACKLIGHT
0402-1
ROOM=BACKLIGHT
ROOM=MESA
U1503
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=BACKLIGHT
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=BACKLIGHT
17 15 13 3 AP_BI_I2C0_SDA 17 15 13 3 AP_TO_I2C0_SCL
ROOM=BACKLIGHT
U1502
LM3534TMX-A1
A3 SW
BGA
OVP D1
C3 IN
A1 SDA A2 SCL
ILED1 D3
PP_LCM_BL_CAT1 20 26
ILED2 D2 PP_LCM_BL_CAT2 20 26
SCK B2 45_AP_TO_PMU_AND_BL_DWI_CLK 3 13
ROOM=BACKLIGHT
1 C1513
100PF
5%
2
25V NP0-C0G
01005
PP_LCM_BL_ANODE 20 26
L1500
1.0UH-20%-0.4A-0.53OHM
52 17 16 15 14 12 10
PP_VCC_MAIN
51 48 39 31 26 23
C1508 1
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=MESA
1
2 26 PP18V0_MESA_SW
0403
29 26 17 12 PP3V0_TRISTAR 25 21 MESA_TO_BOOST_EN
B1 SW
LM3638
BGA
A2 VIN
B2 EN_M A3 EN_S
C2 LDOIN
VOUT C3
VOLTAGE=17.0V
PMID C1
26 P17V0_MOJAVE_LDOIN
C1503 ROOM=MESA
1
100PF
5%
2
25V NP0-C0G
01005
PP16V5_MESA 21 25 26
1 C1500
2.2UF
20%
2
25V X5R
0402-3
24 23 20 13 12 11 10 7 6 5 3 2 PP1V8
C1 VIO_SPI
SDI C2 45_AP_TO_PMU_AND_BL_DWI_DO 3 13
ROOM=MESA
27 26 25
PP1V8_SDRAM
29 26 17 14 13 12 10 4 3
B1 HWEN
1 C1501
2.2UF
20%
GND
2
25V X5R
0402-3
ROOM=MESA
A
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
DISPLAY:CHESTNUT,BACKLIGHT DRIVER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
15
SHEET
15
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
SPEAKER AMP, LED DRIVER
2
1
SPEAKER AMP
D
I2C ADDRESS: 1000000X
D
A5 B5
B3 A1
B4 B1
C3 C1
C4 D1
D3
1 C1635
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SPKR_AMP
1 C1637
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=SPKR_AMP
PCB: PLACE C1635, C1637 AT VP INPUT 26 PP_L19_VBOOST
ROOM=SPKR_AMP
1 C1609
0.1UF
20%
2
6.3V X5R-CERM
01005
PP1V8_VA_L19_L67 10 12 26
ROOM=SPKR_AMP
1 C1630
2.2UF
20%
2
6.3V X5R
0201-1
TBD: PROTO_MLB2 WILL NOSTUFF THIS, BUT RESERVE FOOTPRINT SPACE IN CASE SPKAMP LOCATION RIGHT NEXT TO DOCKFLEX,EXPLORE NEED
NOSTUFF
FL1606
120OHM-25%-1.8A-0.06DCR
1
R2OOM=SPKR_AMP
0402
FERRITE_GND1
ROOM=SPKR_AMP
XW1610
SHORT-10L-0.1MM-SM
1
2
46 45 40 26 25 14 PP_BATT_VCC
1 C1695
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=SPKR_AMP
1 C1603
10UF
20%
2
10V X5R-CERM
0402-8
ROOM=SPKR_AMP
1 C1648
22UF
20%
2
10V X5R-CERM
0603-1
ROOM=SPKR_AMP
1 C1642
0.1UF
10%
2
16V X5R-CERM
0201
ROOM=SPKR_AMP
A4
F5
VBST
ROOM=SPKR_AMP VA VP
V = 1.0V C= 1UF MIN
1 C1629
V= VA PIN C= 2.2UF MIN
1 C1640
FL1609
120OHM-25%-1.8A-0.06DCR
ROOM=SPKR_AMP
1
2
0402 NOSTUFF
FERRITE_GND2
ROOM=SPKR_AMP
XW1611
SHORT-10L-0.1MM-SM
1
2
L1604
1.2UH-2.88A-0.082OHM
C1632 1
10UF
20%
6.3V CERM-X5R
2
0402-9
1
2 26 PP_SPKAMP_SW
PIFE25201T-SM ROOM=SPKR_AMP
21 14 3 AP_BI_I2C1_SDA
21 14 3 AP_TO_I2C1_SCL
U1601
CS35L19B-XWZR-C0
A2
WLCSP
FILT2+6 F2 PP_SPKAMP_FILT
B2 SW
VER1
LDO_FIL2T6 C5 PP_SPKAMP_LDO_FILT
D5 SDA D6 SCL
VSENSE- E3 VSENSE+ E2
2.2UF
20%
2
6.3V X5R
0201-1
4.7UF
20%
2
6.3V X5R-CERM1
402
ROOM=SPKR_AMP
SPKAMP_VSENSE_N SPKAMP_VSENSE_P
NOSTUFF
1 C1604
220PF
ROOM=SPKR_AMP
R1604
1
2
0.00
01005
NOSTUFF
1 C1606
220PF
SPEAKER_TO_SPKAMP_VSENSE_N 18
ROOM=SPKR_AMP
3 SPKAMP_TO_AP_INT_L
A7 INT*
ISENSE- F1
SPKAMP_ISENSE_N
10%
2
10V X7R-CERM
10%
2
10V X7R-CERM
C
3 AP_TO_SPKAMP_RESET_L
1R1629
100K
5%
1/32W MF 2 01005 ROOM=CHARGER
(LEFT CONFIG)
3 AP_TO_SPKAMP_BEE_GEES
3 45_AP_TO_SPKAMP_I2S2_MCLK 10 3 45_AP_TO_CODEC_XSP_I2S2_BCLK
NO INT PULLS
A6 RESET*
NO INT PULLS
D7 ALIVE
NO INT PULLS
C7 ADO
1M INT PD
E7 MCLK
1M INT PD
E6 SCLK
ISENSE+ E1
SPKAMP_ISENSE_P
OUT+ D2 OUT- C2
SPKAMP_TO_SPEAKER_OUT_P
IREF+ B7 SPKAMP_IREF
1R1635
44.2K
ROOM=SPKR_AMP
R1601 NO_XNET_CONNECTION=TRUE
1/321W
2MF
39.2 1% 01005 1 C01.61U0F1NO_XNET_CONNECTION=TRUE
20%
ROOM=SPKR_AMP
R1602 2
6.3V X5R-CERM
010051/321W
2MF NO_XNET_CONNECTION=TRUE
01005
01005
C
ROOM=SPKR_AMP
R1605
1
2
SPEAKER_TO_SPKAMP_VSENSE_P 18
NOSTUFF 0.00
01005
1 C1605
220PF
10%
2
10V X7R-CERM
01005
10 3 AP_TO_CODEC_XSP_I2S2_LRCLK 10 3 AP_TO_CODEC_XSP_I2S2_DOUT
1M INT PD
F6 LRCK/FSYNC
1M INT PD
F7 SDIN
1%
1/32W
MF
2
01005 ROOM=SPKR_AMP
39.2 1% 01005
CKPLUS_WAIVE=MISS_N_DIFFPAIR
R1603
0.100
1
2
1%
SPKAMP_TO_SPEAKER_OUT_CONN_P 18
10 3 CODEC_TO_AP_XSP_I2S2_DIN
1M INT PD
E5 SDOUT
1M INT PD
1/4W MF
0402
~700MA RMS @ 2.4W INTO 8OHM
GNDP
GNDA
SPKAMP_TO_SPEAKER_OUT_CONN_N 18
F4
F3
E4
C6
B6
D4
A3
C1660 1
1000PF
10%
10V X5R
2
01005
ROOM=SPKR_AMP
C1663 1
1000PF
10%
10V X5R
2
01005
ROOM=SPKR_AMP
C1600 1
1000PF
10%
10V X5R
2
01005
ROOM=SPKR_AMP
1 C1602
1000PF
10%
2
10V X5R
01005
ROOM=SPKR_AMP
B
A 8
STROBE DRIVER
TI: APN 353S3899
48 39 31 26 23 17 15 14 12 10 PP_VCC_MAIN
52 51
C1686 1 C1687 1
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=STROBE
10UF
20%
6.3V CERM-X5R
2
0402-9
ROOM=STROBE
ROOM=STROBE
L1605
1UH-3.0A-0.059OHM
1
2 26 PP_LED_DRV_LX
PIFA20161B ROOM=STROBE
7 AP_TO_LEDDRV_EN 23 RCAM_TO_LEDDRV_STROBE_EN
NOTE: TORCH N/C NC 29 BB_TO_LEDDRV_GSM_BLANK 23 7 AP_BI_RCAM_I2C_SDA 23 7 AP_TO_RCAM_I2C_SCL
U1602
LM3564A1TMX
WLCSP
D1 IN A2
A3
B3 OUT
C3
B2 SW
A4
D3 ENABLE
LED1 B4
E3
INT 200K PD AGND
STROBE
INT 200K PD AGND
C2 TORCH
C4
E4
INT 200K
TX
PD
AGND
LED2
D4
E2
INT 200K PD AGND
SDA
D2 SCL
TEMP E1
GND AGND
26 PP_LED_BOOST_OUT
1 C1694
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=STROBE
1 C1696
10UF
20%
2
6.3V CERM-X5R
0402-9
ROOM=STROBE
PP_STRB_DRIVER_TO_LED_COOL 8 26
C1608 1
100PF
5%
16V NP0-C0G
2
01005
ROOM=STROBE
C1673 1
100PF
5%
16V NP0-C0G
2
01005
ROOM=STROBE
PP_STRB_DRIVER_TO_LED_WARM 8 26
C1
B1
A1
RCAM_TO_STROBE_NTC 8
7
6
5
4
3
B
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
AUDIO:SPKR AMP,STROBE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
16
SHEET
16
OF OF
55 54
2
1
8
7
TRISTAR2
D
https://www.mobile-manuals.com/
6
5
4
3
2
1
D
C B A
8
29 26 15 12 PP3V0_TRISTAR
1 C1700
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=TRISTAR
1 C1754
0.1UF
20%
2
4V X5R
01005
ROOM=TRISTAR
12C ADDRESS: 0011010X
P2MM-NSM
PP1705 SM PP
29 26 15 14 13 12 10 4 3 PP1V8_SDRAM
1 C1739
0.01UF
10%
2
6.3V X5R
01005
ROOM=TRISTAR
13 PMU_TO_ACC_SW_ON
PP3V3_ACC 12 17 26 ACC_PWR
ROOM=TRISTAR
B1
A1
VCC
U1703
LM34904
USMD
B2 ENABLE
ACC_PWR A2
C2 ACC_DET* GND
POK* C1
PP_VCC_MAIN 10 12 14 15 16 23 26 31 39 48
51 52
PP3V3_ACC 12 17 26
VDD_1V8 F3 VDD_3V0 F4 ACC_PWR D5
9 90_CODEC_BI_TRISTAR_MIKEYBUS_P 9 90_CODEC_BI_TRISTAR_MIKEYBUS_N
BB DEBUG USB
29 90_TRISTAR_BI_BB_USB_P 29 90_TRISTAR_BI_BB_USB_N
BRICK_ID 13 TRISTAR_TO_PMU_USB_BRICKID
SOC USB
2 90_AP_BI_TRISTAR_USB0_P 2 90_AP_BI_TRISTAR_USB0_N
ACCESSORY UART
3 AP_TO_TRISTAR_ACC_UART6_TXD 3 TRISTAR_TO_AP_ACC_UART6_RXD
DEBUG UART
3 AP_TO_TRISTAR_DEBUG_UART0_TXD 3 TRISTAR_TO_AP_DEBUG_UART0_RXD
RX IS WRT SOC (BB TX) --> TX IS WRT SOC (BB RX) <--
29 3 BB_TO_AP_UART2_RXD 29 3 AP_TO_BB_UART2_TXD
2 TRISTAR_TO_AP_JTAG_SWCLK 2 TRISTAR_BI_AP_JTAG_SWDIO
U1700
CBTL1610A2UK
C3 DIG_DP WLCSP P_IN F6
C4 DIG_DN
ACC1 C5
A1 USB1_DP B1 USB1_DN
ACC2 E5 DP1 A2
C2 BRICK_ID
DN1 B2
A3 USB0_DP B3 USB0_DN
DP2 A4 DN2 B4
E2 UART0_TX
CON_DET_L E3
E1 UART0_RX POW_GATE_EN* D6
F2 UART1_TX F1 UART1_RX
SWITCH_EN E4 HOST_RESET B6
D2 UART2_TX D1 UART2_RX
A5 JTAG_CLK B5 JTAG_DIO
SDA D3 SCL D4 INT C6 BYPASS E6
F5 DVSS C1 DVSS A6 DVSS
PP_E75_TO_TRISTAR_ACC1 18 26 PP_E75_TO_TRISTAR_ACC2 18 26
90_TRISTAR_BI_E75_PAIR1_CONN_P 18 25 90_TRISTAR_BI_E75_PAIR1_CONN_N 18 25
90_TRISTAR_BI_E75_PAIR2_CONN_P 18 25 90_TRISTAR_BI_E75_PAIR2_CONN_N 18 25
E75_TO_TRISTAR_CON_DETECT 18
RESET_1V8_L 2 4 13 15 25
AP_BI_I2C0_SDA 3 13 15 AP_TO_I2C0_SCL 3 13 15 TRISTAR_TO_AP_INT 3 13 TRISTAR_BYPASS
1 C1738
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=TRISTAR
PP_TRISTAR_PIN 17 26
1 C1704 PIN FOR HANDSHAKE
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=TRISTAR
PP1722 ROOM=TRISTAR
SM PP P2MM-NSM
TRISTAR_TO_PMU_OVP_SW_EN_L 14
TRISTAR_TO_PMU_HOST_RESET 13 HOST_RESET ACTIVE HIGH AMBER HAS 100K-300K INT PD
PP_TRISTAR_PIN 17 26
2
R1710
S
10K
1
2
5%
REVERSE_GATE
1 G
1/32W
MF
01005
D
0402
CSD68822F4
Q1701
3
PP5V0_USB 12 14 18 25 26
7
6
5
4
3
C
B
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
IO:TRISTAR2
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
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17
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1
DOCKFLEX B2B (USB VBUS, SPEAKER,ANTENNA LAT SW CTRL, MIC1 (PRIMARY MIC), ACC DET/ID/PWR, E75 DIFFPAIRS)
D
LOWER MIC1 (PRIMARY VOICE MIC)
C
HEADPHONE
B
9 LOWERMIC1_TO_CODEC_N 9 LOWERMIC1_TO_CODEC_P 26 10 PP_CODEC_TO_MIC1_BIAS
FL1881
120-OHM-210MA
2
1
01005 ROOM=DOCK_B2B
FL1882
120-OHM-210MA
LOWERMIC1_TO_CODEC_N_CONN 18
1 C1889
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
2
1
LOWERMIC1_TO_CODEC_P_CONN 18
01005 ROOM=DOCK_B2B
FL1855
120-OHM-210MA
1 C1890
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
2
1
01005 ROOM=DOCK_B2B
PP_CODEC_TO_MIC1_BIAS_CONN 18 26
1 C1855
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
R1801
9 HPHONE_TO_CODEC_DET
3.3K
1
2
01005 5%
MF 1/32W
HPHONE_TO_CODEC_DET_CONN 18
ROOM=DOCK_B2B
1 C1816
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
FL1805
600-OHM-25%-0.28A-0.75OHM
9 CODEC_TO_HPHONE_HS3
1
2
0201 ROOM=DOCK_B2B
CODEC_TO_HPHONE_HS3_CONN 18
1 DZ1803
6.8V-100PF
01005 2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
FL1804
600-OHM-25%-0.28A-0.75OHM
9 CODEC_TO_HPHONE_HS4
1
2
CODEC_TO_HPHONE_HS4_CONN 18
0201 ROOM=DOCK_B2B
1 DZ1804
6.8V-100PF
01005
2
ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE
FL1807
600-OHM-25%-0.28A-0.75OHM
9 CODEC_TO_HPHONE_HS4_REF
1
2 CODEC_TO_HPHONE_HS4_REF_CONN 18
0201 ROOM=DOCK_B2B
1 DZ1809
6.8V-100PF 01005
2
ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE
FL1806
600-OHM-25%-0.28A-0.75OHM
9 CODEC_TO_HPHONE_HS3_REF
1
2
0201 ROOM=DOCK_B2B
CODEC_TO_HPHONE_HS3_REF_CONN 18
1 DZ1807
6.8V-100PF 01005 2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
FL1803 01005
150OHM-25%-200MA-0.7DCR
3 AP_TO_HEADSET_HS3_CTRL
1
2 AP_TO_HEADSET_HS3_CTRL_CONN 18
ROOM=DOCK_B2B
1 C1808
FL1802 01005
150OHM-25%-200MA-0.7DCR
100PF
5%
2
10V NP0-C0G
01005
ROOM=DOCK_B2B
3 AP_TO_HEADSET_HS4_CTRL
1
2
ROOM=DOCK_B2B
AP_TO_HEADSET_HS4_CTRL_CONN 18
1 C1805
100PF
5%
2
10V NP0-C0G
01005
ROOM=DOCK_B2B
26 14 VIBE_DRIVE_P
ACCESSORY: VIBE DRIVE
26 14 VIBE_DRIVE_N
SPEAKER: LEADS, VSENSE
TRISTAR
CODEC TO HEADPHONE
A
9 CODEC_TO_HPHONE_L
L1801
FERR-33-OHM-0.8A-0.09-OHM
1
2
0201 ROOM=DOCK_B2B
CODEC_TO_HPHONE_L_CONN 18
1 DZ1811
6.8V-100PF
01005
2
ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE
9 CODEC_TO_HPHONE_R
L1802
FERR-33-OHM-0.8A-0.09-OHM
1
2
0201 ROOM=DOCK_B2B
CODEC_TO_HPHONE_R_CONN 18
1 DZ1810
6.8V-100PF
01005
2
ROOM=DOCK_B2B NO_XNET_CONNECTION=TRUE
FL1819
120-OHM-210MA
2
1
01005 ROOM=DOCK_B2B 1
2
FL1820
120-OHM-210MA
2
1
01005 ROOM=DOCK_B2B
VIBE_DRIVE_P_CONN 18 17 14 12 PP5V0_USB
C1875
26 25 18
100PF
5% 16V NP0-C0G 01005
ROOM=DOCK_B2B
USB VBUS
1 C1834
220PF
10%
2
25V X7R-CERM
0201
ROOM=DOCK_B2B
VIBE_DRIVE_N_CONN 18
C1876
100PF
5% 16V
NP0-C0G
01005
ROOM=DOCK_B2B
1 C1833 1 C1812
56PF
100PF
5%
5%
2
25V NP0-C0G-CERM
2
25V NP0-C0G
01005
01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
FL1895
120-OHM-210MA
SPEAKER_TO_SPKAMP_VSENSE_P 2
16
1 SPEAKER_TO_SPKAMP_VSENSE_P_CONN 18
01005 ROOM=DOCK_B2B
1 C1849
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
FL1866
120-OHM-210MA
SPEAKER_TO_SPKAMP_VSENSE_N 2
16
1
01005 ROOM=DOCK_B2B
SPEAKER_TO_SPKAMP_VSENSE_N_CONN 18
1 C1850
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
18 16 SPKAMP_TO_SPEAKER_OUT_CONN_P 18 16 SPKAMP_TO_SPEAKER_OUT_CONN_N
1 C1899
100PF
5%
16V
2
NP0-C0G
01005
ROOM=DOCK_B2B
1 DZ1814
12V-33PF 01005-1
2
NO_XNET_CONNECTION=TRUE ROOM=DOCK_B2B
1 C1802
100PF
5%
16V
2
NP0-C0G
01005
ROOM=DOCK_B2B
1 DZ1813
12V-33PF
01005-1 2 NO_XNET_CONNECTION=TRUE
ROOM=DOCK_B2B
R1830
17 E75_TO_TRISTAR_CON_DETECT 1/32W 2
1 E75_TO_TRISTAR_CON_DETECT_CONN 18 25
5%
MF 1.00K 01005
1 C1870
ROOM=DOCK_B2B
FL1854
27PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
10-OHM-1.1A
26 17 PP_E75_TO_TRISTAR_ACC1
1
2
01005 ROOM=DOCK_B2B
FL1853
10-OHM-1.1A
PP_E75_TO_TRISTAR_ACC1_CONN 18 25 26
C1871
100PF 5% 16V NP0-C0G
01005 ROOM=DOCK_B2B
26 17 PP_E75_TO_TRISTAR_ACC2
1
2
01005 ROOM=DOCK_B2B
PP_E75_TO_TRISTAR_ACC2_CONN 18 25 26
C1872
100PF 5% 16V NP0-C0G
01005
ROOM=DOCK_B2B
9 CODEC_MBUS_REF
XW1813 SM
1
2
ROOM=DOCK_B2B
8
7
6
5
4
MLB: 516S1281 (RCPT)
J1817 ROOM=DOCK_B2B
24-5859-036-201-829
F-ST-SM
41
37
38
1 C1817
0.1UF
10%
18 16 SPKAMP_TO_SPEAKER_OUT_CONN_P SPEAKER_TO_SPKAMP_VSENSE_P_CONN
18
18 VIBE_DRIVE_N_CONN
1 3 5
2
25V X5R
18 AP_TO_HEADSET_HS4_CTRL_CONN
7
0201
ROOM=DOCK_B2B 18 AP_TO_HEADSET_HS3_CTRL_CONN
9
18 HPHONE_TO_CODEC_DET_CONN
11
18 CODEC_TO_HPHONE_HS4_REF_CONN
13
18 CODEC_TO_HPHONE_HS4_CONN
15
18 LOWERMIC1_TO_CODEC_N_CONN
17
10 MIC1_BIASFILT_RET
19
26 18 PP_CODEC_TO_MIC1_BIAS_CONN
21
18 BB_GPIO3_CONN
23
18 BB_GPIO2_CONN
25
26 18 PP_BB_VDD_2V7_CONN
27
18 BB_GPIO4_CONN
29
25 18 E75_TO_TRISTAR_CON_DETECT_CONN 31
18 BB_GPIO0_CONN
33
35
2 SPKAMP_TO_SPEAKER_OUT_CONN_N
16 18
4 SPEAKER_TO_SPKAMP_VSENSE_N_CONN
18
D
6
VIBE_DRIVE_P_CONN 18
8
CODEC_TO_HPHONE_L_CONN 18
10
12
CODEC_TO_HPHONE_R_CONN 18
14
CODEC_TO_HPHONE_HS3_REF_CONN 18
16
CODEC_TO_HPHONE_HS3_CONN 18
18
LOWERMIC1_TO_CODEC_P_CONN 18
20 PP_E75_TO_TRISTAR_ACC1_CONN
18 25 26
22
24 90_TRISTAR_BI_E75_PAIR1_CONN_P 26 90_TRISTAR_BI_E75_PAIR1_CONN_N 28
17 25 17 25
30 90_TRISTAR_BI_E75_PAIR2_CONN_N
17 25
32 90_TRISTAR_BI_E75_PAIR2_CONN_P
17 25
34
PP_E75_TO_TRISTAR_ACC2_CONN 18 25 26
36
26 25 18 17 14 12 PP5V0_USB
39
40
42
PP5V0_USB 12 14 17 18 25 26
29 PP_BB_VDD_2V7
29 BB_GPIO0
ANTENNA
29 BB_GPIO2
29 BB_GPIO3
29 BB_GPIO4
FL1880
120-OHM-210MA
C
2
1
01005 ROOM=DOCK_B2B
PP_BB_VDD_2V7_CONN 18 26
C1886
100PF 5% 16V NP0-C0G
01005 ROOM=BUTTON
FL1879
120-OHM-210MA
2
1
01005 ROOM=DOCK_B2B
FL1875
120-OHM-210MA
1 C1885
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
BB_GPIO0_CONN 18
1
2
BB_GPIO2_CONN 18
01005 ROOM=DOCK_B2B
1 C1888
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
FL1876
120-OHM-210MA
1
2
01005 ROOM=DOCK_B2B
BB_GPIO3_CONN 18
1 C1806
B
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
FL1877
120-OHM-210MA
1
2
01005 ROOM=DOCK_B2B
BB_GPIO4_CONN 18
1 C1814
56PF
5%
2
16V NP0-C0G
01005
ROOM=DOCK_B2B
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
IO:DOCK FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
18
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55 54
3
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https://www.mobile-manuals.com/
7
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COMPASS - AKM COMPASS IN POR LOCATION
1 D
COMPASS CSP: 338S1014
C
C
B1 C1
C4
26 12 PP3V0_IMU
NOSTUFF
C1903
100PF
5% 16V NP0-C0G 01005 ROOM=COMPASS
ROOM=COMPASS
1 C1902
2.2UF
20%
2
6.3V X5R
0201-1
VDD VID
U1901
AK8963C
CSP
D1 CAD0 D2 CAD1
SCL/SK A3 SDA/SI A4
1 C1901
0.1UF
20%
2
4V X5R
01005
ROOM=COMPASS
PP1V8_OSCAR 12 19 22 26 NOSTUFF
C1904
100PF
5% 16V NP0-C0G 01005 ROOM=COMPASS
OSCAR_TO_IMU_SPI_SCLK 22 OSCAR_TO_IMU_SPI_MOSI 22
NC C2 TST1
CSB* A2
OSCAR_TO_COMPASS_SPI_CS_L 22
NC B3 RSV
SO B4
IMU_TO_OSCAR_SPI_MISO 22
NC C3 TRG
DRDY A1
COMPASS_TO_OSCAR_INT 22
PP1V8_OSCAR
26 22 19 12
D4 RST*
VSS
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
1 C1905 1 C1906 1 C1907 1 C1908
B
56PF
5%
2
16V NP0-C0G
01005
ROOM=COMPASS
56PF
5%
2
16V NP0-C0G
01005
ROOM=COMPASS
56PF
5%
2
16V NP0-C0G
01005
ROOM=COMPASS
56PF
5%
2
16V NP0-C0G
01005
ROOM=COMPASS
B
A
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
SENSORS:COMPASS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
19
SHEET
19
OF OF
55 54
8
7
6
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4
3
2
1
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6
5
4
3
LCD B2B
Backlight
D
(N56 HAS A 2ND SET OF BL SIGNALS ON P. 19).
26 15
FL2024
240-OHM-0.2A-0.8-OHM
PP_LCM_BL_ANODE
1
2
0201-2 ROOM=LCM_B2B
PP_LCM_BL_ANODE_CONN 20 25 26
1 C2017
100PF
5%
2
25V NP0-C0G
01005
ROOM=LCM_B2B
FL2025
240-OHM-0.2A-0.8-OHM
26 15
PP_LCM_BL_CAT1
1
2
PP_LCM_BL_CAT1_CONN 20 25 26
0201-2 ROOM=LCM_B2B
1 C2018
100PF
5%
2
25V NP0-C0G
01005
ROOM=LCM_B2B
C
FL2026
240-OHM-0.2A-0.8-OHM
26 15
PP_LCM_BL_CAT2
1
2
0201-2 ROOM=LCM_B2B
PP_LCM_BL_CAT2_CONN 20 25 26
1 C2019
100PF
5%
2
25V NP0-C0G
01005
ROOM=LCM_B2B
LCM Supplies
B
24 23 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25
FL2027
80-OHM-0.2A-0.4-OHM
1
2
0201-2 ROOM=LCM_B2B
1 C2039
0.1UF
10%
2
6.3V CERM-X5R
0201
ROOM=LCM_B2B
PP1V8_LCM_CONN
1 C2040
100PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
20 26
26 24 15 PN5V7_SAGE_AVDDN
26 15 PP5V7_LCM_AVDDH
C2070 1
2.2UF
20%
6.3V X5R
2
0201-1
ROOM=LCM_B2B
C2051 1
2.2UF
20%
6.3V X5R
2
0201-1
ROOM=LCM_B2B
FL2061
70-OHM-300MA
2
1
01005-1 ROOM=LCM_B2B
PN5V7_LCM_AVDDN_CONN 20 26
1 C2044
100PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
ROOM=LCM_B2B
FL2037
80-OHM-0.2A-0.4-OHM
C2050 1
2.2UF
20%
6.3V X5R
2
0201-1
ROOM=LCM_B2B
1
2
020C1-22 071 1
2.2UF
20%
6.3V X5R
2
0201-1
ROOM=LCM_B2B
PP5V7_LCM_AVDDH_CONN
1 C2094
100PF
5%
16V
2
NP0-C0G
01005
ROOM=LCM_B2B
20 26
A
THIS ONE ON MLB ---> 516S1164
J2019 24-5857-030-001-829
35 F-ST-SM
31
32
26 25 20 PP_LCM_BL_CAT2_CONN
20 90_AP_TO_LCM_MIPI_DATA2_CONN_N 20 90_AP_TO_LCM_MIPI_DATA2_CONN_P
20 90_AP_TO_LCM_MIPI_CLK_CONN_N 20 90_AP_TO_LCM_MIPI_CLK_CONN_P
20 90_AP_TO_LCM_MIPI_DATA1_CONN_N 20 90_AP_TO_LCM_MIPI_DATA1_CONN_P
20 90_AP_TO_LCM_MIPI_DATA0_CONN_N 20 90_AP_TO_LCM_MIPI_DATA0_CONN_P
26 20 PP1V8_LCM_CONN
1
2
PP_LCM_BL_ANODE_CONN 20 25 26
3
4
PP_LCM_BL_CAT1_CONN 20 25 26
5
6
LCD_TO_AP_PIFA_CONN 20 25
7
8 NC
9
10
PMU_TO_PHOTON_ALIVE_CONN 20
11
12
LCM_TO_AP_HIFA_BSYNC_CONN 20
13
14
AP_TO_LCM_RESET_CONN_L 20
15
16
LCM_TO_CHESTNUT_PWR_EN_CONN 20
17
18
AP_TO_I2C2_SCL_CONN 20
19
20
AP_BI_I2C2_SDA_CONN 20
21
22
SAGE_TO_TOUCH_VCPL_REF_CONN 20
23
24
SAGE_TO_TOUCH_VCPH_REF_CONN 20
25
26
PP5V7_LCM_AVDDH_CONN 20 26
27
28
PN5V7_LCM_AVDDN_CONN 20 26
29
30
TOUCH_TO_SAGE_VCM_IN_CONN 20
33
34
36
Digital Interfaces
11 3 AP_BI_I2C2_SDA
11 3 AP_TO_I2C2_SCL
15 13 LCM_TO_CHESTNUT_PWR_EN
7 AP_TO_LCM_RESET_L
R20521
100K
1% 1/32W
MF 01005 2 ROOM=LCM_B2B
FL2039
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
FL2066
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
FL2035
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
FL2036
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
AP_BI_I2C2_SDA_CONN 20
1 C2089
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
AP_TO_I2C2_SCL_CONN 20
1 C2090
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
LCM_TO_CHESTNUT_PWR_EN_CONN 20
1 C2093
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
AP_TO_LCM_RESET_CONN_L 20
1 C2000
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
PMU_TO_PHOTON_ALIVE
13
FL2050
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
PMU_TO_PHOTON_ALIVE_CONN 20
1 C2095
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
LCD_TO_AP_PIFA_CONN
1 C2058
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
20 25
8
7
6
5
4
3
2
1
MIPI Common Mode Chokes
(N56 HAS A 4TH MIPI LANE ON P. 19).
L2044
90-OHM-0.1A-0.7-3GHZ TAM0605
SYM_VER-1
7 90_AP_TO_LCM_MIPI_CLK_P
1
4
90_AP_TO_LCM_MIPI_CLK_CONN_P 20
D
7 90_AP_TO_LCM_MIPI_CLK_N
2
3
ROOM=LCM_B2B
90_AP_TO_LCM_MIPI_CLK_CONN_N 20
L2043
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
7 90_AP_TO_LCM_MIPI_DATA0_P
1
4
90_AP_TO_LCM_MIPI_DATA0_CONN_P 20
7 90_AP_TO_LCM_MIPI_DATA0_N 7 90_AP_TO_LCM_MIPI_DATA1_P
2
3
ROOM=LCM_B2B
L2042
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
1
4
90_AP_TO_LCM_MIPI_DATA0_CONN_N 20 90_AP_TO_LCM_MIPI_DATA1_CONN_P 20
7 90_AP_TO_LCM_MIPI_DATA1_N 7 90_AP_TO_LCM_MIPI_DATA2_P
2
3
ROOM=LCM_B2B
L2041
90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
1
4
90_AP_TO_LCM_MIPI_DATA1_CONN_N 20 90_AP_TO_LCM_MIPI_DATA2_CONN_P 20
7 90_AP_TO_LCM_MIPI_DATA2_N
2
3
ROOM=LCM_B2B
90_AP_TO_LCM_MIPI_DATA2_CONN_N 20
Sync/Reset/Debug
24 7 LCM_TO_AP_HIFA_BSYNC
C
FL2034
120-OHM-210MA
2
1
01005 ROOM=LCM_B2B
LCM_TO_AP_HIFA_BSYNC_CONN 20
1 C2001
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
Touch
24 TOUCH_TO_SAGE_VCM_IN
FL2001
120-OHM-210MA
2
1
TOUCH_TO_SAGE_VCM_IN_CONN 20
B
C2087 1
2.2UF
20%
6.3V X5R
2
0201-1
C2088 1
2.2UF
20%
6.3V X5R
2
0201-1
01005 ROOM=LCM_B2B
1 C2002
56PF
5%
2
16V NP0-C0G
01005
ROOM=LCM_B2B
ROOM=LCM_B2B
ROOM=LCM_B2B
24 SAGE_TO_TOUCH_VCPH_REF 24 SAGE_TO_TOUCH_VCPL_REF
R2008
0.00
2
1
0% 1/32W
MF 01005
ROOM=LCM_B2B
R2009
0.00
2
1
0% 1/32W
MF 01005
ROOM=LCM_B2B
SAGE_TO_TOUCH_VCPH_REF_CONN 20 SAGE_TO_TOUCH_VCPL_REF_CONN 20
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
DISPLAY:FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
20
SHEET
20
OF OF
55 54
2
1
8
7
6
MESA CONNECTOR
D
https://www.mobile-manuals.com/
5
4
3
2
1
MLB: 516S1278
21 MESA_TO_BOOST_EN_CONN
J2118
24-5857-016-201-829 F-ST-SM 21
17
18
21 AP_BI_I2C1_SDA_MESA_CONN
1
2
AP_TO_I2C1_SCL_MESA_CONN 21
D
21 BUTTON_TO_AP_MENU_KEY_L_CONN
3
4
PP3V0_MESA_CONN 21 26
21 MESA_TO_AP_INT_CONN
5
6
PP16V5_MESA_CONN 21 26
7
8
PP1V8_MESA_CONN 21 26
9
10
AP_TO_MESA_SPI_CLK_CONN 21
11
12
AP_TO_MESA_SPI_MOSI_CONN 21
13
14
MESA_TO_AP_SPI_MISO_CONN 21
15
16
19
20
22
ROOM=MAMBA_MESA_B2B
13 3 BUTTON_TO_AP_MENU_KEY_L
C
R2160
1
2
0.00
01005
ROOM=MAMBA_MESA_B2B
1 C2167
27PF
5%
2
16V NP0-C0G
01005
ROOM=MAMBA_MESA_B2B
BUTTON_TO_AP_MENU_KEY_L_CONN 21
1
NOSTUFF 0201
D5.Z52V-161.20PF
2
ROOM=MAMBA_MESA_B2B
26 21 12 PP3V0_MESA
1 C2180
1.0UF
20%
2
6.3V X5R
0201-1
ROOM=MESA
U2100
MESA 1.8V LDO
LP5907UVX-1.8
RDAR://15792924
A1 VIN DSBGA VOUT A2 26 PP1V8_MESA
B2
B1 VEN
GND ROOM=MESA
1 C2181
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=MESA
FL2133 ROOM=MAMBA_MESA_B2B
70-OHM-300MA
1
2
01005-1
PP1V8_MESA_CONN 21 26
1 C2184
100PF
5%
16V
2
NP0-C0G
01005
ROOM=MAMBA_MESA_B2B
26 25 15 PP16V5_MESA
B
25 15 MESA_TO_BOOST_EN
FL2156
70-OHM-300MA
ROOM=MAMBA_MESA_B2B
1
2
PP16V5_MESA_CONN 21 26
01005-1
1 C2110
100PF
5%
2
25V NP0-C0G
01005
R2166
681
1
2
1% 1/32W
MF 01005
ROOM=MAMBA_MESA_B2B
C2116 1
56PF
5%
16V 01005
2
MESA_TO_BOOST_EN_CONN 21 ROOM=MAMBA_MESA_B2B
PP3V0_MESA
26 21 12
1 C2132
2.2UF
20%
2
6.3V X5R
0201-1
1 C2133
2.2UF
20%
2
6.3V X5R
0201-1
NOTE: 0.45OHM DCR
FL2119
70-OHM-300MA
ROOM=MAMBA_MESA_B2B
2
1
01005-1
1 C2134
2.2UF
20%
2
6.3V X5R
0201-1
1 C2105
0.1UF
20%
2
4V X5R
01005
ROOM=MAMBA_MESA_B2B
PP3V0_MESA_CONN 21 26
C2119
100PF 5% 16V NP0-C0G
01005
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B
3 MESA_TO_AP_INT
A
16 14 3 AP_TO_I2C1_SCL
R2167
681
1% 1/32W
MF 01005 ROOM=MAMBA_MESA_B2B
FL2179
120-OHM-210MA
01005 ROOM=MAMBA_MESA_B2B
C2149 1
56PF
5%
16V NP0-C0G
2
01005
ROOM=MAMBA_MESA_B2B
MESA_TO_AP_INT_CONN 21
C2179 1
56PF
5%
16V NP0-C0G
2
01005
ROOM=MAMBA_MESA_B2B
AP_TO_I2C1_SCL_MESA_CONN 21
8
7
6
5
MESA SENSOR:
4
01005 FL2132
C
120-OHM-210MA
ROOM=MAMBA_MESA_B2B
3 AP_TO_MESA_SPI_MOSI
2
1
AP_TO_MESA_SPI_MOSI_CONN 21
3 AP_TO_MESA_SPI_CLK 3 MESA_TO_AP_SPI_MISO 16 14 3 AP_BI_I2C1_SDA
R2163 ROOM=MAMBA_MESA_B2B
1
2
0.00
01005
01005FL2150
120-OHM-210MA
ROOM=MAMBA_MESA_B2B
2
1
01005FL2159
120-OHM-210MA
ROOM=MAMBA_MESA_B2B
2
1
AP_TO_MESA_SPI_CLK_CONN
21
MESA_TO_AP_SPI_MISO_CONN 21
AP_BI_I2C1_SDA_MESA_CONN 21
1 C2103
56PF
5%
2
16V 01005
1 C2100 1 C2126 1 C2198
56PF
56PF
56PF
5%
2
16V 01005
5%
2
16V 01005
5%
2
16V 01005
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
B
A
PAGE TITLE
SENSORS:MESA FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
21
SHEET
21
OF OF
55 54
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
OSCAR + SENSORS
OSCAR VDDIO = 1.8V ALWAYS ON (NEED TO WAKE HOST & RUN PLL) OSCAR CORE = 1.2V ALWAYS ON (NEED TO RUN IN S2RAM)
26 22 19 12 PP1V8_OSCAR
PP1V2_OSCAR 12 26
C13 C1
ROOM=OSCAR
1 C2261
2
0.1UF
20% 4V
C2292
1.0UF
X5R
20%
1
01005
6.3V X5R
2
B2
E12
D13
C2274 1
1.0UF
20%
6.3V X5R
2
0201-1
ROOM=OSCAR
ROOM=OSCAR
1 C2260
0.1UF
20%
2
4V X5R
PP2201SM
RPO2OMMM=-ONSSCMARPP 1
OSCAR_TO_AP_UART_RXD 3 22
D
0201-1 ROOM=OSCAR
VDDIO VDDC
U2201
01005
PP2202SM
RPO2OMMM=-ONSSCMARPP
1
AP_TO_OSCAR_UART_TXD 3 22
LPC18B1UK/CPA0-00
WLCSP ROOM=OSCAR
PP2203SM
P2MM-NSM ROOM=OSCAR
PP
1
OSCAR_BI_AP_TIME_SYNC_HOST_INT 3 22
22 3 OSCAR_TO_AP_UART_RXD 22 3 AP_TO_OSCAR_UART_TXD
C11 U0_TXD/GPIO0[15] A9 U0_RXD/GPIO0[16]
29 OSCAR_TO_RADIO_CONTEXT_A 29 OSCAR_TO_RADIO_CONTEXT_B
E10 U1_RXD/GPIO0[22] F11 U1_TXD/GPIO0[23]
3 AP_ISP_TO_OSCAR_UART_TXD 3 OSCAR_TO_AP_ISP_UART_RXD
F1 U2_RXD/GPIO0[5] F3 U2_TXD/GPIO0[6]
29 OSCAR_TO_BB_UART_TXD 29 BB_TO_OSCAR_UART_RXD
F9 U3_TXD/GPIO0[1] F13 U3_RXDGPIO0[2]
22 19 OSCAR_TO_IMU_SPI_SCLK
A7 SPI0_SCK/GPIO0[12]
22 19 IMU_TO_OSCAR_SPI_MISO
A5 SPI0_MISO/GPIO0[13]
22 19 OSCAR_TO_IMU_SPI_MOSI
B6 SPI0_MOSI/GPIO0[14]
22 OSCAR_TO_GYRO_SPI_CS_L
D9 SPI0_SSEL0/GPIO0[3]
22 OSCAR_TO_PHOSPHORUS_SPI_CS_L
B4 SPI0_SSEL1/GPIO0[18]
19 OSCAR_TO_COMPASS_SPI_CS_L
D7 SPI0_SSEL2/GPIO0[4]
NC C5 SPI0_SSEL3/GPIO0[25]
CLKOUT/GPIO0[0] GPIO0[7] GPIO0[8]
NMI/GPIO0[24] GPIO0[26]
SWO/GPIO0[27] WDFLAG/GPIO1[2] ALARM1/GPIO1[3] ALARM0/GPIO1[4] SWDIO/GPIO0[19] SWCLK/GPIO0[20] CLK32K/GPIO0[21]
F5 OSCAR_BI_AP_TIME_SYNC_HOST_INT
E4
GYRO_TO_OSCAR_INT1
D3 A13
COMPASS_TO_OSCAR_INT 19 GYRO_TO_OSCAR_INT2 22
A3 NC A11 NC D11 NC D5 NC C3 B10
OSCAR_TO_PMU_HOST_WAKE 7 13 AP_BI_OSCAR_SWDIO_1V8 7
B8
AP_TO_OSCAR_SWDCLK_1V8 7
E2 NC
I2C0_SDAP/GPIO0[10] B12NC I2C0_SCL/GPIO0[11] A1 NC
I2C1_SDA/GPIO0[9] E6 NC I2C1_SCL/GPIO0[17] E8 NC
26 22 19 12 PP1V8_OSCAR
ROOM=OSCAR
1R2254
C
392K
1%
1/32W
MF
2 01005
NOSTUFF
F7 RESET*
D1
I2C2_SDA/GPIO1[0] C9 NC I2C2_SCL/GPIO1[1] C7 NC VSS
PP2204SM
P2MM-NSM ROOM=OSCAR
PP
PP2205SM
RPO2OMMM=-ONSSCMARPP
1
PP2206SM
RPO2OMMM=-ONSSCMARPP
IMU_TO_OSCAR_SPI_MISO 19 22 GYRO_TO_OSCAR_INT2 22 GYRO_TO_OSCAR_INT1 22
13 PMU_TO_OSCAR_RESET_CLK32K_L
NOSTUFF
1 C2204
56PF
5%
2
16V 01005
ROOM=OSCAR
CARBON (ACCEL GYRO COMBO) D
INVENSENSE, APN 338S00017, C2211=0.1UF BOSCH, APN 338S00028, C2211=0.1UF ST, APN 338S00029, C2211=0.01UF,25V
22 OSCAR_TO_GYRO_SPI_CS_L 22 GYRO_TO_OSCAR_INT2
C2248 1
0.1UF
20%
6.3V X5R-CERM
2
01005
ROOM=GYRO
PP1V8_OSCAR 12 19 22 26
1 C2245
0.1UF
20%
2
6.3V X5R-CERM
01005
ROOM=GYRO
1 C2247
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=GYRO
1
ROOM=GYRO
VDD
VDDIO
U2203
MPU-6700-12-COMBO
LGA
5 CS
8 FSYNC/GND GYRO_PUMP 14 REGOUT/GND_CAP
SCL/SPC 2 SDA/SDI 3 SA0/SDO 4
7 INT/INT2
DRDY/INT1 6
OSCAR_TO_IMU_SPI_SCLK 19 22 OSCAR_TO_IMU_SPI_MOSI 19 22 IMU_TO_OSCAR_SPI_MISO 19 22
GYRO_TO_OSCAR_INT1 22
C
9 GND1 16
10 GND2
15 GND6
13 GND5
12 GND4
11 GND3
1 C2211
0.1UF
10%
2
6.3V CERM-X5R
0201
ROOM=GYRO
THIS IS OUTSIDE OF SHIELD IN TO THE RIGHT OF THE NAND
PHOSPHORUS
PP1V8_OSCAR 12 19 22 26
C2250 1
1.0UF
20%
6.3V X5R
2
0201-1
ROOM=PHOSPHORUS
1 C2251
0.1UF
20%
2
4V X5R
01005
ROOM=PHOSPHORUS
B
8
6
B
22 19 OSCAR_TO_IMU_SPI_MOSI 22 19 OSCAR_TO_IMU_SPI_SCLK
1
VDD VDDIO
U2204
BMP282AC
3 SDI LGA SDO 5
4 SCK
2 CS* GND
7
1 C2255
56PF
5%
2
16V 01005
ROOM=PHOSPHORUS
NOSTUFF
IMU_TO_OSCAR_SPI_MISO 19 22
22 OSCAR_TO_PHOSPHORUS_SPI_CS_L
NOSTUFF
1 C2256
56PF
5%
2
16V 01005
ROOM=PHOSPHORUS
NOSTUFF
NOSTUFF
1 C2241 1 C2201
56PF
56PF
5%
2
16V 01005
5%
2
16V 01005
ROOM=PHOSPHORUS ROOM=PHOSPHORUS
A
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
22
SHEET
22
OF OF
55 54
8
7
6
5
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
RCAM
D
RCAM: 4-LANE MIPI
C
B2B (REAR CAMERA CONNECTOR)
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605
SYM_VER-1
L2334
7 90_RCAM_TO_AP_MIPI_DATA3_P
4
1 90_RCAM_TO_AP_MIPI_DATA3_CONN_P 23
7 90_RCAM_TO_AP_MIPI_DATA3_N
3
2 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 23
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605 SYM_VER-1
L2333
7 90_RCAM_TO_AP_MIPI_DATA2_P
4
1 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 23
7 90_RCAM_TO_AP_MIPI_DATA2_N
3
2 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 23
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605
SYM_VER-1
L2337
7 90_RCAM_TO_AP_MIPI_CLK_P
4
1
90_RCAM_TO_AP_MIPI_CLK_CONN_P 23
7 90_RCAM_TO_AP_MIPI_CLK_N
3
2
90_RCAM_TO_AP_MIPI_CLK_CONN_N 23
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605
SYM_VER-1
L2338
7 90_RCAM_TO_AP_MIPI_DATA1_P
4
1 90_RCAM_TO_AP_MIPI_DATA1_CONN_P 23
7 90_RCAM_TO_AP_MIPI_DATA1_N
3
2 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 23
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605 SYM_VER-1
L2336
7 90_RCAM_TO_AP_MIPI_DATA0_P
4
1
90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23
7 90_RCAM_TO_AP_MIPI_DATA0_N
3
2
90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23
AP_BI_RCAM_I2C_SDA
16 7
RCAM: DIGITAL I/F (I2C,CTRL,CLK)
16 7 AP_TO_RCAM_I2C_SCL
7 AP_TO_RCAM_SHUTDOWN
R23411
100K
5%
1/32W
MF
01005 ROOM=RCAM_B2B
2
7 45_AP_TO_RCAM_CLK
16 RCAM_TO_LEDDRV_STROBE_EN
ROOM=RCAM_B2B
FL2329
70-OHM-300MA
1
2
01005-1
ROOM=RCAM_B2B
FL2331
70-OHM-300MA
1
2
01005-1
ROOM=RCAM_B2B
FL2330
70-OHM-300MA
1
2
01005-1
ROOM=RCAM_B2B
FL2328
120-OHM-210MA
1
2
01005
ROOM=RCAM_B2B
FL2322
120-OHM-210MA
1
2
01005
AP_BI_RCAM_I2C_SDA_CONN 23
1 C2386
56PF
5%
2
16V NP0-C0G
01005
ROOM=RCAM_B2B
AP_TO_RCAM_I2C_SCL_CONN 23
1 C2387
56PF
5%
2
16V NP0-C0G
01005
ROOM=RCAM_B2B
AP_TO_RCAM_SHUTDOWN_CONN 23
1 C2394
56PF
5%
2
16V NP0-C0G
01005
ROOM=RCAM_B2B
45_AP_TO_RCAM_CLK_CONN 23
1 C2384
56PF
5%
2
16V NP0-C0G
01005
ROOM=RCAM_B2B
RCAM_TO_LEDDRV_STROBE_EN_CONN 23
1 C2300
56PF
5%
2
16V NP0-C0G
01005
ROOM=RCAM_B2B
THIS ONE ON MLB ---> 516S1174 PLUG
RCAM_B2B
D
J2321
AA21-S034VA1
F-ST-SM
36
35
26 23 PP_RCAM_AF_CONN
23 AP_BI_RCAM_I2C_SDA_CONN 23 AP_TO_RCAM_I2C_SCL_CONN 26 23 PP1V2_RCAM_CONN
26 23 PP1V8_RCAM_CONN 23 AP_TO_RCAM_SHUTDOWN_CONN 23 45_AP_TO_RCAM_CLK_CONN 23 RCAM_TO_LEDDRV_STROBE_EN_CONN
26 23 PP2V85_RCAM_AVDD_CONN
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
38
37
90_RCAM_TO_AP_MIPI_DATA3_CONN_P 23 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 23
90_RCAM_TO_AP_MIPI_DATA2_CONN_P 23 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 23
90_RCAM_TO_AP_MIPI_CLK_CONN_P 23 90_RCAM_TO_AP_MIPI_CLK_CONN_N 23
90_RCAM_TO_AP_MIPI_DATA1_CONN_P 23 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 23
90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23 90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23
C
26 23 11 PP2V85_CAM_VDD
ROOM=RCAM_B2B
FL2343
10-OHM-750MA
1
2
C2363 1
2.2UF
20% 6.3V
X5R
2
0201-1
ROOM=RCAM_B2B
01005-1 0.07 OHMS
1 C2303
0.1UF
20%
2
6.3V X5R-CERM
01005
ROOM=RCAM_B2B
PP2V85_RCAM_AVDD_CONN 23 26
1 C2304
100PF
5%
16V
2
NP0-C0G
01005
ROOM=RCAM_B2B
RCAM/FCAM AVDD RAIL EXT. LDO:
B RCAM:
POWER: (1.8V DVDD) (2.8V AVDD) (1.2V VCC) (1.8V/2V AF)
A
L2329
FERR-22-OHM-1A-0.055OHM
20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24 23
1
2
0201 ROOM=RCAM_B2B
NOTE: USING PP1V8 FOR N61 AND BUCK6 FOR N56.
1 C2323 1
2.2UF
20%
6.3V
2
X5R
2
0201-1
ROOM=RCAM_B2B
PP_RCAM_AF_CONN 23 26
C2393
100PF 5% 16V NP0-C0G
01005
ROOM=RCAM_B2B
26 12 4 2 PP1V2_SDRAM
C2302 1
1.0UF
20%
6.3V X5R
2
0201-1
ROOM=RCAM_B2B
20 15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 25 24 23
L2330
FERR-33OHM-25%-0.5A-0.07OHM-DCR
1
2
0201
ROOM=RCAM_B2B
C2389
2.2UF
1
20% 6.3V
X5R 0201-1
2
ROOM=RCAM_B2B
ROOM=RCAM_B2B
L2318
FERR-22-OHM-1A-0.055OHM
1
2
0201
C2390 1
1.0UF
20%
6.3V X5R
2
0201-1
ROOM=RCAM_B2B
PP1V2_RCAM_CONN 23 26
1 C2305
2.2UF
20%
6.3V
2
X5R
0201-1
ROOM=RCAM_B2B
1 C2392
100PF
5%
16V
2
NP0-C0G
01005
ROOM=RCAM_B2B
PP1V8_RCAM_CONN 23 26
1 C2395
100PF
5%
16V
2
NP0-C0G
01005
ROOM=RCAM_B2B
8
7
6
5
B
48 39 31 26 17 16 15 14 12 10 PP_VCC_MAIN
52 51
1 C2301
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=RCAM_B2B
B2
EXTERNAL LDO:
U2301
LP5907UVX2.925-S A1 VIN DSBGA VOUT A2
ROOM=RCAM_B2B B1 VEN
GND
PP2V85_CAM_VDD 11 23 26
1 C2345
2.2UF
20%
2
6.3V X5R
0201-1
ROOM=RCAM_B2B
7 CAM_EXT_LDO_EN
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
CAMERA:REAR FLEX CONN
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
23
SHEET
23
OF OF
55 54
4
3
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
26 20 15 PN5V7_SAGE_AVDDN
26 24 15 PP5V7_SAGE_AVDDH
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
25 26 27
Touch (B2B, Driver ICs)
Cumulus
C2414 1
10UF
20%
10V X5R-CERM
2
0402-8
C2409 1
10UF
20%
10V X5R-CERM
2
0402-8
1 C2415
0.1UF
20%
2
6.3V X5R-CERM
01005
MESON A1
APN: 343S0694
Turn on is later than PP1V8_GRAPE Turn off is same time as PP1V8_GRAPE
APN: 343S0638
26 15 PP5V1_GRAPE_VDDH
D
26 PP_CUMULUS_VDDCORE
Touch probe points
P2MM
PP2402
SM 1 PP
P2MM
SM
PP2403
1 PP
CUMULUS_TO_SAGE_BOOST_CLK_EN 24
AP_TO_TOUCH_SPI_CS_L
3 24
24 TOUCH_TO_SAGE_SENSE_IN<7> 24 TOUCH_TO_SAGE_SENSE_IN<9> 24 TOUCH_TO_SAGE_SENSE_IN<10> 24 TOUCH_TO_SAGE_SENSE_IN<8>
E5 SNS_IN0 D5 SNS_IN1 C5 SNS_IN2 B5 SNS_IN3
AVDDH1 D2 AVDDH2 D4 AVDDH3 F3 AVDDH4 G6 AVDDH5 G3
AVDDL G2 VDDIO_OSC J1
VDDIO N3 VDDIO K1
DRV_OUT0 G7 SAGE_TO_TOUCH_VSTM_OUT<22> 24
DRV_OUT1 H7 SAGE_TO_TOUCH_VSTM_OUT<16> 24
DRV_OUT2 J6 SAGE_TO_TOUCH_VSTM_OUT<15> 24
D
DRV_OUT3 J7 SAGE_TO_TOUCH_VSTM_OUT<17> 24
C2402 1
10UF
20%
10V X5R-CERM
2
0402-8
C2432 1
4.7UF
20%
6.3V X5R-CERM1
2
402
26 PP_CUMULUS_VDDANA
C2433 1
4.7UF
20%
6.3V X5R-CERM1
2
402
PP1V8_GRAPE 12 24 26
1 C2403
1.0UF
20%
2
6.3V X5R
0201-1
P2MM
SM
PP2404
1 PP
PP2405SM
P2MM-NSM PP
AP_TO_TOUCH_SPI_CLK LCM_TO_AP_HIFA_BSYNC
3 24 7 20 24
24 TOUCH_TO_SAGE_SENSE_IN<11> 24 TOUCH_TO_SAGE_SENSE_IN<2> 24 TOUCH_TO_SAGE_SENSE_IN<4> 24 TOUCH_TO_SAGE_SENSE_IN<3> 24 TOUCH_TO_SAGE_SENSE_IN<1>
A5 SNS_IN4 A7 SNS_IN5 A9 SNS_IN6 B7 SNS_IN7 C7 SNS_IN8
U2402
MESON-A1
CSP
DRV_OUT4 K7 SAGE_TO_TOUCH_VSTM_OUT<12> 24
DRV_OUT5 L7 SAGE_TO_TOUCH_VSTM_OUT<14> 24
DRV_OUT6 M7 SAGE_TO_TOUCH_VSTM_OUT<8>
24
DRV_OUT7 N7 SAGE_TO_TOUCH_VSTM_OUT<2>
24
DRV_OUT8 G8 SAGE_TO_TOUCH_VSTM_OUT<21> 24
VDDANA B1 VDDCORE C1
VDDH C8 C5 F4
VDDLDO A1
P2MM
24 TOUCH_TO_SAGE_SENSE_IN<0>
D7 SNS_IN9
DRV_OUT9 H8 SAGE_TO_TOUCH_VSTM_OUT<0>
24
SM
C
Follow Touch routing guidelines
Cumulus sense nets are sensitive
24 SAGE_TO_CUMULUS_IN<11> 24 SAGE_TO_CUMULUS_IN<4> 24 SAGE_TO_CUMULUS_IN<5> 24 SAGE_TO_CUMULUS_IN<3> 24 SAGE_TO_CUMULUS_IN<1> 24 SAGE_TO_CUMULUS_IN<2> 24 SAGE_TO_CUMULUS_IN<0> 24 SAGE_TO_CUMULUS_IN<9> 24 SAGE_TO_CUMULUS_IN<8> 24 SAGE_TO_CUMULUS_IN<6> 24 SAGE_TO_CUMULUS_IN<10> 24 SAGE_TO_CUMULUS_IN<7>
C2417 1
10V X7R-CERM
C2418 1
10V X7R-CERM
C2419 1
10V X7R-CERM
C2420 1
10V X7R-CERM
C2421 1
10V X7R-CERM
C2422 1
10V X7R-CERM
24 45_PROX_TO_CUMULUS_RX_IN
VDDIO
PP2408 1 PP
TP_CUMULUS_GPIO
24
2 220PF
10% 01005 C2425 1
2 220PF 10V X7R-CERM
10% 01005 C2426 1
2 220PF 10V X7R-CERM
10% 01005 C2427 1
2 220PF
10% 01005 2 220PF
10% 01005 2 220PF
C_IN0 C_IN1 C_IN2 C_IN3 C_IN4 C_IN5
B9 IN0_0
U2401
VSTM_0 E9 NC
B8 IN1_0 CUMULUS-C1 VSTM_1 E5 NC
A9 IN2_0
WLBGA
VSTM_2 F7 NC
B7 IN3_0
VSTM_3 E6 NC
B6 IN4_0
VSTM_4 E7 NC
A8 IN5_0
VSTM_5 F8 CUMULUS_TO_MESON_VSTM_OUT_P 24
2 220PF 10V X7R-CERM
10% 01005 C2428 1
2 220PF 10V X7R-CERM
10% 01005 C2429 1
2 220PF 10V X7R-CERM
10% 01005 C2430 1
10% 01005 2 220PF
10% 01005 2 220PF
10% 01005 2 220PF
C_IN6 C_IN7 C_IN8 C_IN9 C_IN10 C_IN11
B5 IN6_0 B4 IN7_0 A7 IN8_0 B3 IN9_0 A6 IN10_0 A3 IN11_0
VSTM_6 G9 CUMULUS_TO_MESON_VSTM_OUT_N 24 VSTM_7 D6 NC VSTM_8 D7 NC VSTM_9 D8 NC VSTM_10 F9 NC VSTM_11 D5 NC
10V X7R-CERM
10% 01005
NC A5 IN12_0
VSTM_12 F6 NC
NC A4 IN13_0
VSTM_13 F5 NC
NC B2 IN14_0
VSTM_14 G4 NC
A2 IN14_1
VSTM_15 E8 NC
VSTM_16 G8 NC
24 3 AP_TO_TOUCH_SPI_CS_L
E4 H_CS*
VSTM_17 G7 NC
PP2410SM
P2MM-NSM PP
PP2411SM
P2MM-NSM PP
PP2412SM
P2MM-NSM PP
CUMULUS_TO_MESON_VSTM_OUT_N 24
CUMULUS_TO_MESON_VSTM_OUT_P 24
45_AP_TO_TOUCH_CLK32K_RESET_L
3 24
24 TOUCH_TO_SAGE_SENSE_IN<6> 24 TOUCH_TO_SAGE_SENSE_IN<5>
24 SAGE_TO_CUMULUS_IN<7> 24 SAGE_TO_CUMULUS_IN<9> 24 SAGE_TO_CUMULUS_IN<10> 24 SAGE_TO_CUMULUS_IN<8> 24 SAGE_TO_CUMULUS_IN<11> 24 SAGE_TO_CUMULUS_IN<2> 24 SAGE_TO_CUMULUS_IN<4> 24 SAGE_TO_CUMULUS_IN<3> 24 SAGE_TO_CUMULUS_IN<1> 24 SAGE_TO_CUMULUS_IN<0> 24 SAGE_TO_CUMULUS_IN<6> 24 SAGE_TO_CUMULUS_IN<5>
E7 SNS_IN10 B9 SNS_IN11 NC C9 SNS_IN12 NC D9 SNS_IN13 NC E9 SNS_IN14
E6 D6 C6 B6 A4 A6 A8 B8 C8 D8 E8 B10 NC C10 NC D10 NC E10
SNS_OUT0 SNS_OUT1 SNS_OUT2 SNS_OUT3 SNS_OUT4 SNS_OUT5 SNS_OUT6 SNS_OUT7 SNS_OUT8 SNS_OUT9 SNS_OUT10 SNS_OUT11 SNS_OUT12 SNS_OUT13 SNS_OUT14
DRV_OUT10 J8 SAGE_TO_TOUCH_VSTM_OUT<13> 24
DRV_OUT11 K8 SAGE_TO_TOUCH_VSTM_OUT<1>
24
DRV_OUT12 L8 SAGE_TO_TOUCH_VSTM_OUT<5>
24
DRV_OUT13 M8 SAGE_TO_TOUCH_VSTM_OUT<4>
24
DRV_OUT14 N8 SAGE_TO_TOUCH_VSTM_OUT<6>
24
DRV_OUT15 K9 SAGE_TO_TOUCH_VSTM_OUT<10> 24
DRV_OUT16 G9 SAGE_TO_TOUCH_VSTM_OUT<23> 24
DRV_OUT17 H9 SAGE_TO_TOUCH_VSTM_OUT<18> 24
DRV_OUT18 J9 SAGE_TO_TOUCH_VSTM_OUT<20> 24
DRV_OUT19 G10 SAGE_TO_TOUCH_VSTM_OUT<19> 24
DRV_OUT20 L9 SAGE_TO_TOUCH_VSTM_OUT<9>
24
DRV_OUT21 M9 SAGE_TO_TOUCH_VSTM_OUT<7>
24
DRV_OUT22 N9 SAGE_TO_TOUCH_VSTM_OUT<3>
24
DRV_OUT23 K10 SAGE_TO_TOUCH_VSTM_OUT<11> 24
DRV_OUT24 H10NC DRV_OUT25 J10NC DRV_OUT26 L10NC
DRV_OUT27 M10NC
DRV_IN P L6 CUMULUS_TO_MESON_VSTM_OUT_P 24
C
DRV_IN N K6 CUMULUS_TO_MESON_VSTM_OUT_N 24
3 TOUCH_TO_AP_SPI_MISO
Touch B2B
7
24 3
R2403
10.2 3
1
2
1%
1/32W MF
01005
TOUCH_TO_AP_INT_L AP_TO_TOUCH_SPI_CLK AP_TO_TOUCH_SPI_MOSI TOUCH_TO_AP_SPI_MISO_R
24 TOUCH_I2C_SDA 26 24 12 PP1V8_GRAPE
24 CUMULUS_TO_PROX_TX_EN_1V8_L 24 3 45_AP_TO_TOUCH_CLK32K_RESET_L
7 AP_TO_TOUCH_RESET_L
Radars for XW rdar://12773579 rdar://12611242
F1 H_INT* D3 H_SCLK D2 H_SDI E1 H_SDO
C4 JTAG_TCK C3 JTAG_TDI E2 JTAG_TDO C6 JTAG_TMS
E3 BCFG_RTCK D1 CLKIN/RESET* D9 RSTOVR*
GND
VSTM_18 G6 NC VSTM_19 G5 NC
GPIO_1/CK G1 LCM_TO_AP_HIFA_BSYNC_BUFF
24
GPIO_2/SD D4 CUMULUS_TO_SAGE_BOOST_CLK_EN 24
GPIO_3 F2 NC
GPIO_4 F3 TP_CUMULUS_GPIO
24
TM_ACS* C2 CUMULUS_TO_PROX_RX_EN_1V8
TM_OVR G3
TOUCH_I2C_SCL 24
C7 C9 G2
No decoupling on previous designs
PP1V8_GRAPE 12 24 26
R2405
100K
5% 1/32W MF 01005
11
C2439 1
0.1UF
20%
4V X5R
2
01005
24
R24101
220K
5% 1/32W
MF 01005 2
SAGE_VBIAS
D3 VBIAS
24 TOUCH_I2C_SDA
J2 I2C_SDA
24 TOUCH_I2C_SCL
J3 I2C_SCL
24 20 7 LCM_TO_AP_HIFA_BSYNC
NC G5 TEST_MUX0 NC H5 TEST_MUX1 NC L3 TEST_MUX2 NC M3 TESTMODE
M1 BSYNC/SCAN_RESET
NC M2 SCAN CLK NC L2 SCANOUT CUMULUS_TO_SAGE_BOOST_CLK_EN L1 STEP_CLK/SCAN_IN
K4 GCM
L4 BOOST_EN/SCAN_EN
26 24 PP_SAGE_VBST_OUTH 26 24 PN_SAGE_VBST_OUTL
A2 PLDO_SUP_IN B1 VBST_OUTH E1 VBST_OUTL
PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG PBKG
A1 B4 A10 B3 C3 F6 F10 H1 H2 H3 H4 N10 F4 N1 F5 K5 N6
TOUCH_TO_SAGE_VCM_IN 20
R24341
0.00
0%
1/32W MF
01005 2
1R2435
0.00
0%
1/32W MF 2 01005
MLB APN : 516S1086 (Receptacle)
26 24 12 PP1V8_GRAPE
26 24 PP_SAGE_LX
C1 LX
Flex APN: 516S1087 (Plug)
26 24 PP_SAGE_LY
D1 LY
VCM_IN_0 E4
TOUCH_TO_MESON_VCM_IN0
R24071
F1 NLDO_SUP_IN
VCM_IN_1 J5
TOUCH_TO_MESON_VCM_IN1
B
J2401
AA21-S046VA1
F-ST-SM
24 20 7 LCM_TO_AP_HIFA_BSYNC
100K
5%
1/32W MF
01005 2
5
VCC
U2403
74AUP2G3404GN SOT1115
1 1A
1Y 6
LCM_TO_AP_HIFA_BSYNC_BUFF 24
24 20 24 20 26 24 26 24 26 24
SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF PN_SAGE_TO_TOUCH_VCPL_FILT PP_SAGE_TO_TOUCH_VCPH PN_SAGE_VCPL_F
B2 VCPH_REF_EN F2 VCPL_REF_EN G1 VCPL A3 VCPH E2 VCPL_F
GO F8
MESON_TO_TOUCH_GUARD 24
AUX_BUF_IN M4
AUX_BUF_OUT M5 NC
B
AUX_PLDO_OUT N5 NC
48
47
K3 I2C_SLV_ADDR0
AUX_NLDO_OUT N4 NC
24 CUMULUS_TO_PROX_TX_EN_1V8_L
3 2A
2Y 4
CUMULUS_TO_PROX_TX_EN_BUFF 11
K2 I2C_SLV_ADDR1
C2 C4 AGND2 F7 AGND2 E3 AGND3 L5 AGND3 F9 AGND4 H6 AGND4 M6 AGND4 G4 AGND5 J4 DGND N2 DGND
24 TOUCH_TO_SAGE_SENSE_IN<7> 2 24 TOUCH_TO_SAGE_SENSE_IN<10> 4 24 TOUCH_TO_SAGE_SENSE_IN<11> 6
8
24 SAGE_TO_TOUCH_VSTM_OUT<6> 10 24 SAGE_TO_TOUCH_VSTM_OUT<7> 12 24 SAGE_TO_TOUCH_VSTM_OUT<8> 14 24 SAGE_TO_TOUCH_VSTM_OUT<9> 16 24 SAGE_TO_TOUCH_VSTM_OUT<10>18
1
TOUCH_TO_SAGE_SENSE_IN<6>
3
TOUCH_TO_SAGE_SENSE_IN<9>
5
TOUCH_TO_SAGE_SENSE_IN<8>
7
OIC_RIGHT_NET
9
11
SAGE_TO_TOUCH_VSTM_OUT<3>
13
SAGE_TO_TOUCH_VSTM_OUT<2>
15
SAGE_TO_TOUCH_VSTM_OUT<4>
17
SAGE_TO_TOUCH_VSTM_OUT<5>
24
24
R2488
24
1 255K 2MF
01005 1% 1/32W
24
24
24
24
GND
1R2406
2
100K
5%
1/32W MF 2 01005
Meson decoupling
26 24 PP_SAGE_VBST_OUTH
Tantalums solved singing caps issue. Validate issue is resolved with Meson and replace with 0402 ceramics.
C2438 1
0.33UF
20% 20V 2 TANT 0402
C2410 1
1000PF
10%
25V X7R-CERM
2
0201
AGND1
FL2486
10-OHM-750MA
26 24 PN_SAGE_TO_TOUCH_VCPL_FILT 1
2
Meson VCPL rail: Effective impedance of 3 Ohms, at 115 kHz with 12 V bias.
PN_SAGE_TO_TOUCH_VCPL 24 26
24 SAGE_TO_TOUCH_VSTM_OUT<11>20
19
SAGE_TO_TOUCH_VSTM_OUT<0>
24
R2412
26 24 15 PP5V7_SAGE_AVDDH
24 SAGE_TO_TOUCH_VSTM_OUT<13>22 24 SAGE_TO_TOUCH_VSTM_OUT<15>24 24 SAGE_TO_TOUCH_VSTM_OUT<17>26 24 SAGE_TO_TOUCH_VSTM_OUT<19>28 24 SAGE_TO_TOUCH_VSTM_OUT<20>30
21
SAGE_TO_TOUCH_VSTM_OUT<1>
23
SAGE_TO_TOUCH_VSTM_OUT<12>
25
SAGE_TO_TOUCH_VSTM_OUT<14>
27
SAGE_TO_TOUCH_VSTM_OUT<16>
29
SAGE_TO_TOUCH_VSTM_OUT<18>
24 26 24 PP_SAGE_TO_TOUCH_VCPH_CONN
24
24
24 24
0.00
1
2
0% 1/32W
MF
01005
R2411
PP_SAGE_TO_TOUCH_VCPH
24 26
I2C pull-ups
26 24 12 PP1V8_GRAPE
26 24
PN_SAGE_VBST_OUTL
C2407
1UF-10OHM 2
20%
25V
TANT
0603-LLP2
1
C2411 1
1000PF
10%
25V X7R-CERM
2
A
24 24 26 24
24 24 24 24
SAGE_TO_TOUCH_VSTM_OUT<21>32 SAGE_TO_TOUCH_VSTM_OUT<0> 34 PP_SAGE_TO_TOUCH_VCPH_CONN36
38
TOUCH_TO_SAGE_SENSE_IN<0> 40 TOUCH_TO_SAGE_SENSE_IN<3> 42 TOUCH_TO_SAGE_SENSE_IN<5> 44 MESON_TO_TOUCH_GUARD_CONN 46
50
31
SAGE_TO_TOUCH_VSTM_OUT<22>
33
SAGE_TO_TOUCH_VSTM_OUT<23>
24 26 24 PN_SAGE_TO_TOUCH_VCPL_CONN
24
35
PN_SAGE_TO_TOUCH_VCPL_CONN
24 26
37
OIC_LEFT_NET
R2495
1 255K 2MF
39
01005 1% 1/32W
41
TOUCH_TO_SAGE_SENSE_IN<1>
24
43
TOUCH_TO_SAGE_SENSE_IN<2>
45
TOUCH_TO_SAGE_SENSE_IN<4>
24
24 MESON_TO_TOUCH_GUARD_CONN
24
49
0.00
1
2
0% 1/32W
MF 01005
R2433
0.00
1
2
1% 1/20W
MF
0201
PN_SAGE_TO_TOUCH_VCPL
24 26
MESON_TO_TOUCH_GUARD
24
24 TOUCH_I2C_SDA 24 TOUCH_I2C_SCL
1R2420
1.8K
5% 1/32W
MF 2 01005
1R2421
1.8K
5% 1/32W
MF 2 01005
0201
24 20 SAGE_TO_TOUCH_VCPH_REF 24 20 SAGE_TO_TOUCH_VCPL_REF
C2436 1
0.01UF
10%
6.3V X5R
2
01005
C2437 1
0.01UF
10%
6.3V X5R
2
01005
Optical prox filter
11 45_PROX_TO_CUMULUS_RX_CONN
C2401
1000PF
12
45_PROX_TO_CUMULUS_RX_C
R2402
22.1K
1
2
45_PROX_TO_CUMULUS_RX_IN 24
26 24 PP_SAGE_TO_TOUCH_VCPH 26 24 PN_SAGE_VCPL_F
01005-1
1 C2490
100PF
5%
2
25V NP0-C0G
01005
1 C2405
2.2UF
20%
2
25V X5R
0402-3
1 C2408
1UF
10%
2
16V X6S-CERM
0402
1 C2441
0.1UF
10%
2
16V X5R-CERM
0201
L2401
10UH-20%-0.23A-1.56OHM
26 24 PP_SAGE_LX
2
1 PP_SAGE_LY
PSB1614FE
24 26
SYNC_MASTER=N/A
A SYNC_DATE=N/A
PAGE TITLE
TOUCH:CUMULUS,MESON
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
10% 6.3V X5R-CERM
01005
1% 1/32W
MF 01005
1 C2416
27PF
5%
2
16V NP0-C0G
01005
C2404 1
0.01UF
10%
25V X5R-CERM
2
0201
C2440 1
1.0UF
20%
16V X5R-CERM
2
0201
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
BRANCH
PAGE
24
SHEET
24
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS
POWER TP
TESTPOINTS
D
46 45 40 26 25 16 14 PP_BATT_VCC
BATTERY CONN
26 18 17 14 12 PP5V0_USB
TP1250A1 VBUS
MOJAVE TP
TP-P6
MESA_TO_BOOST_EN 21 15
TP1256A9
D
TP2512
TP-P55
A POWER GROUND
THIS ONE ON MLB ---> 516S1239 RCPT
PCB: PLACE XW2512 AT BATT CONN, PIN 7
TP-P6
1 C2560 1 C2549
2
100PF
5%
16V
NP0-C0G
2
01005
ROOM=BATTERY_B2B
15PF
5% 16V NP0-C0G-CERM 01005
ROOM=BATTERY_B2B
1 C2550
33PF
5%
2
16V NP0-C0G-CERM
01005
ROOM=BATTERY_B2B
14 BATTERY_SWI
FL2511
120-OHM-210MA
1
2
01005 ROOM=BATTERY_B2B
25 BATTERY_SWI_CONN
1 C2579
ROOM=BATTERY_B2B
J2523
RCPT-BATT-2BLADES-0.90
F-SM-SM 14
11
12
1
7
3
2
5
4
6
8
1 C2509
100PF
5% 16V 2 NP0-C0G 01005 ROOM=BATTERY_B2B
BATTERY_SWI_CONN 25
XW2512
SHORT-10L-0.25MM-SM
2
1 CHARGER_VBATT_SNS 12 14
ROOM=BATTERY_B2B
PP_BATT_VCC 14 16 25 26 40 45 46
1 C2575
220PF
10%
2
10V X7R-CERM
01005
ROOM=BATTERY_B2B
1 C2522
56PF
5%
2
16V NP0-C0G
01005
ROOM=BATTERY_B2B
46 45 40 26 25 16 14 PP_BATT_VCC
TP2539
A
TP-P55
TP2513
A
TP-P6
TP2545
A
TP-P55
VBAT
26 21 15 PP16V5_MESA
TP1257A0
TP-P55
E75 - USB/UART/ID/POWER
TP2521
18 17 90_TRISTAR_BI_E75_PAIR1_CONN_P
A
TP-P55
56PF
5%
2
16V NP0-C0G
01005
ROOM=BATTERY_B2B
9
10
13
1 C2561
220PF
10%
SUPER TP
TP2522 18 17 90_TRISTAR_BI_E75_PAIR1_CONN_N
1A
TP-P55
2
10V X7R-CERM
01005
ROOM=BATTERY_B2B
13 PMU_TO_TP_AMUX_AY
TP1250A6 ANALOG MUX A OUTPUT TP-P55
TP2523 18 17 90_TRISTAR_BI_E75_PAIR2_CONN_P
1A
TP-P55
TP2524 18 17 90_TRISTAR_BI_E75_PAIR2_CONN_N
1A
C
TP-P55
C
13 PMU_TO_TP_AMUX_BY
TP1250A7 ANALOG MUX B OUTPUT
TP2526
FIDUCIALS
SHIELDS
COWLING
TP-P55
26 18 PP_E75_TO_TRISTAR_ACC1_CONN
A
TP-P55
FD2501
FID
0P5SM1P0SQ-NSP 1
FD2502
FID
0P5SM1P0SQ-NSP 1
SH2501 OMIT_TABLE
SM
806-8537
SHLD-EMI-UPPER-FRONT-N61
RETENTION-COAX-N61
CL2501 806-8699 SM
RESET
17 15 13 4 2 RESET_1V8_L
TP1250A8 H6P & BB RESET TP-P55
26 18 PP_E75_TO_TRISTAR_ACC2_CONN
TP1252A7
TP-P55
TP2535 A TP IS TO HELP WITH USB SI
TP-P55 IN THE FACTORY FIXTURE.
FD2503
FID
0P5SM1P0SQ-NSP 1
SH2502 OMIT_TABLE
SM
806-8538
SH2505
SHLD-SNOUT-1-N61
SM
DFU
TP2510 18 E75_TO_TRISTAR_CON_DETECT_CONN
1A
TP-P55
FOR DIAGS
FD2504
FID
0P5SM1P0SQ-NSP 1
FD2505
FID
0P5SM1P0SQ-NSP 1
SHLD-EMI-LOWER-FRONT-N61
SH2503
SM
806-00230
SHLD-EMI-UPPER-EXT-N61
1
NORTH_AC_GND_SCREW 8 25 29
2
CKPLUS_WAIVE=TERMSHORTED
806-7014
3 FORCE_DFU
15 13 12 11 10 7 6 5 3 2 PP1V8
27 26 24 23 20
TP1250A9
TP-P55
PP2510 P4MM SM
PP
FORCE
DFU
LCM BACKLIGHT
26 20 PP_LCM_BL_CAT1_CONN
TP1251A8 LCD BACKLIGHT SINK1
TP-P55
FD2506
B
FID
0P5SM1P0SQ-NSP
1
SH2504 OMIT_TABLE
SM
806-00424
CL2502 TH-NSP SL-1.20X0.40-1.50X0.70-NSP
26 20 PP_LCM_BL_CAT2_CONN
TP1251A9 LCD BACKLIGHT SINK2 TP-P55
B
SHLD-N61-EMI-LOWER-BACK-TALL
OMIT_TABLE
SH2506 806-8541
SM
SHLD-EMI-SA-N61
26 20 PP_LCM_BL_ANODE_CONN 20 LCD_TO_AP_PIFA_CONN
TP1252A0 LCD BACKLIGHT SOURCE TP-P55
TP1251A7 LCD PIFA TEST POINT
TP-P55
SCREW HOLES +
860-3948
BS2503
STDOFF-MLB-UNPLATED-0.85-N61-SM
860-7862
BS2512
STDOFF-2.70OD1.84ID-0.88H-TH
STANDOFFS
29 25 8 NORTH_AC_GND_SCREW
1 C2510 1 C2511 1 C2501
BS2511
BS2510
220PF
10%
56PF
5%
4.7PF
+/-0.1PF
STDOFF-2.6OD0.5H-0.5-1.7-TH
STDOFF-2.2OD0.25H-0.50-1.70
2
10V X7R-CERM
2
16V NP0-C0G
2
16V NP0-C0G
A
29 50_AP_UAT_FEED
1
860-8396
29 50_AP_WIFI_5G_CONN_ANT
860-7846
01005
01005
ROOM=ASSEMBLY ROOM=ASSEMBLY
01005 ROOM=ASSEMBLY
860-3948
BS2501
860-3948
BS2502
STDOFF-MLB-UNPLATED-0.85-N61-SM STDOFF-MLB-UNPLATED-0.85-N61-SM
BS2504
STDOFF-2.55OD1.4ID-0.99H-SM
29 AP_TO_STOCKHOLM_ANT
860-7861
BS2509
STDOFF-2.70OD1.84ID-0.88H-TH
860-7862
1 C2523
220PF
10%
2
10V X7R-CERM
01005
ROOM=ASSEMBLY
8
7
6
5
4
3
SYNC_MASTER=N61_MLB
A SYNC_DATE=08/26/2013
PAGE TITLE
POWER:BATT CONN,TPS,PD FEATURES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
25
SHEET
25
OF OF
55 54
2
1
8
7
D
C
B
A
8
7
https://www.mobile-manuals.com/
6
5
4
3
2
1
VOLTAGE PROPERTIES
I55 I56 I57 I58 I60 I59 I61
I64 I65 I67 I66 I68 I70 I69
I71 I72
I73 I77 I76 I75
I74 I78 I79 I80 I81 I82 I83 I87 I86 I85
I88 I89 I90 I91 I92 I96
I93 I97 I98 I99 I100 I101 I103 I140 I104 I106 I105 I107 I108 I109 I110 I111 I113 I112 I114 I116 I115 I117 I118 I120 I119 I121 I122 I126 I124 I125 I123 I127 I128 I129 I130 I131 I132 I133 I134 I136 I135 I137 I138
6
VOLTAGE=3.3V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V VOLTAGE=3.0V
PP3V3_USB
2 12
I1
PP1V8_VA_L19_L67 10 12 16
I2
PP3V0_TRISTAR 12 15 17 29
PP3V0_IMU
12 19
I4
PP3V0_NAND
6 12
PP3V3_ACC
12 17
I5
PP3V0_PROX_ALS 11 12
I7
I8
VOLTAGE=4.6V VOLTAGE=1.0V VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=3.0V VOLTAGE=1.1V VOLTAGE=1.1V
PP_VCC_MAIN PP1V0
10 12 14 15 16 17 23 31 39 48 51 52
7 12
I10 I11
PP3V0_PROX_IRLED 11 12
I12
PP1V8_ALWAYS
3 5 12 14
I13
PP3V0_MESA
12 21
PP_CPU
4 12
PP_GPU
4 12
I16
I17
VOLTAGE=1.2V VOLTAGE=1.8V
PP1V2_SDRAM PP1V8_SDRAM
2 4 12 23 3 4 10 12 13 14 15 17 29
I143
VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.2V
PP1V8 PP1V8_GRAPE PP1V8_OSCAR PP1V2_NAND_VDDI
2 3 5 6 7 10 11 12 13 15 20 23 24 25 27 12 24
12 19 22
6
VOLTAGE=1.8V
PP_EXTMIC_BIAS_FILT_IN 10
I20
VOLTAGE=1.8V
BOARD_ID2
3 27
I21
VOLTAGE=1.2V
PP1V2
2 4 5 11 12
VOLTAGE=5.0V PP_E75_TO_TRISTAR_ACC1_CONN 18 25
I23
VOLTAGE=5.0V
PP_E75_TO_TRISTAR_ACC1 17 18
I24
VOLTAGE=22.0V
PP_LCM_BL_ANODE
15 20
I25
VOLTAGE=0.2V
PP_LCM_BL_CAT2
15 20
I26
VOLTAGE=0.2V
PP_LCM_BL_CAT1
15 20
I27
VOLTAGE=0.2V
PP_LCM_BL_CAT2_CONN 20 25
I28
VOLTAGE=0.2V
PP_LCM_BL_CAT1_CONN 20 25
I30
I29
VOLTAGE=-5.7V
PN5V7_SAGE_AVDDN
15 20 24
VOLTAGE=1.2V
PP1V2_OSCAR
12 22
VOLTAGE=3.0V
PP3V0_MESA_CONN
21
I33
VOLTAGE=6V
PP6V0_LCM_BOOST
15
I35
VOLTAGE=5.0V PP_STRB_DRIVER_TO_LED_WARM 8 16
I34
VOLTAGE=5.0V PP_STRB_DRIVER_TO_LED_COOL 8 16
I38
I37
I40
VOLTAGE=1.8V
PP_CODEC_TO_MIC1_BIAS 10 18
VOLTAGE=1.8V
PP_EXTMIC_BIAS_IN 10
VOLTAGE=1.8V
PP_EXTMIC_BIAS_FILT 10
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS 10 11
I41
VOLTAGE=1.8V PP_CODEC_TO_REARMIC2_BIAS
I42
8 10
VOLTAGE=1.8V
PP_CODEC_FILT+ 10
I43
VOLTAGE=2.2V
PP_CODEC_SPKR_VQ 10
I44
VOLTAGE=2.5V
PP_CODEC_VCPFILT- 10
VOLTAGE=2.5V
PP_CODEC_VCPFILT+ 10
I46
VOLTAGE=2.5V
PP_CODEC_VHP_FLYN 10
I48
VOLTAGE=0.2V
PP_CODEC_VHP_FLYC 10
I47
VOLTAGE=2.5V
PP_CODEC_VHP_FLYP 10
VOLTAGE=1.8V
PP1V8_FCAM_CONN 11
VOLTAGE=3.0V
PP2V85_FCAM_AVDD_CONN 11
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11
I50
VOLTAGE=3.0V
PP3V0_ALS_CONN 11
I51
VOLTAGE=1.2V
PP1V2_FCAM_VDDIO_CONN 11
I52
VOLTAGE=5.0V VOLTAGE=5.0V VOLTAGE=4.6V
PP5V0_USB 12 14 17 18 25
I53
PP5V0_USB_TO_PMU 12
I54
PP_BUCK5_LX0 12
VOLTAGE=4.6V
PP_BUCK3_LX 12
VOLTAGE=4.6V
PP_BUCK4_LX 12
VOLTAGE=4.6V
PP_BUCK2_LX 12
I141
VOLTAGE=4.6V
PP_BUCK1_LX1 12
I147
VOLTAGE=4.6V
PP_BUCK1_LX0 12
I148
VOLTAGE=4.6V VOLTAGE=4.6V
PP_BUCK0_LX3 12 PP_BUCK0_LX2 12
I149
VOLTAGE=4.6V
PP_BUCK0_LX1 12
I150
VOLTAGE=4.6V
PP_BUCK0_LX0 12
I151
VOLTAGE=6.0V
PP_CHESTNUT_LXP 15
VOLTAGE=6.0V
PP_CHESTNUT_CP 15
VOLTAGE=6.0V
PP_CHESTNUT_CN 15
I152
VOLTAGE=5.7V
PP5V7_SAGE_AVDDH 15 24
I154
VOLTAGE=5.7V
PP5V7_LCM_AVDDH 15 20
I153
VOLTAGE=5.1V
PP5V1_GRAPE_VDDH 15 24
I155
VOLTAGE=22.0V
PP_WLED_LX 15
VOLTAGE=18.0V
PP18V0_MESA_SW 15
VOLTAGE=17.0V
P17V0_MOJAVE_LDOIN 15
VOLTAGE=16.5V VOLTAGE=8.0V
PP16V5_MESA 15 21 25 PP_SPKAMP_SW 16
VOLTAGE=8.0V VOLTAGE=1.8V VOLTAGE=1.8V
PP_L19_VBOOST 16 PP_SPKAMP_FILT 16 PP_SPKAMP_LDO_FILT 16
VOLTAGE=5.0V VOLTAGE=5.0V
PP_LED_DRV_LX 16 PP_LED_BOOST_OUT 16
VOLTAGE=2.9V
PP2V9_LDO9 12
VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS_CONN 18
VOLTAGE=4.6V
PP_E75_TO_TRISTAR_ACC2 17 18
VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2_CONN 18 25
VOLTAGE=1.8V VOLTAGE=22.0V VOLTAGE=-5.7V VOLTAGE=5.7V
PP1V8_LCM_CONN 20 PP_LCM_BL_ANODE_CONN 20 25 PN5V7_LCM_AVDDN_CONN 20 PP5V7_LCM_AVDDH_CONN 20
VOLTAGE=1.8V VOLTAGE=16.5V
VOLTAGE=5.0V
PP1V8_MESA 21 PP16V5_MESA_CONN 21
PP_TRISTAR_PIN 17
VOLTAGE=1.2V VOLTAGE=1.8V
PP1V2_RCAM_CONN 23 PP1V8_RCAM_CONN 23
VOLTAGE=3.0V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.2V VOLTAGE=13.5V VOLTAGE=-12V VOLTAGE=13.5V VOLTAGE=-12V
PP2V85_CAM_VDD 11 23 PP2V85_RCAM_AVDD_CONN 23
PP_CUMULUS_VDDCORE 24 PP_CUMULUS_VDDANA 24
PP_SAGE_TO_TOUCH_VCPH_CONN 24 PN_SAGE_TO_TOUCH_VCPL_CONN 24
PP_SAGE_TO_TOUCH_VCPH 24 PN_SAGE_TO_TOUCH_VCPL 24
VOLTAGE=-12V VOLTAGE=5.7V VOLTAGE=17.0V
VOLTAGE=1.8V VOLTAGE=14V
VOLTAGE=5.0V
VOLTAGE=2.5V VOLTAGE=1.8V VOLTAGE=1.8V VOLTAGE=1.8V
VOLTAGE=4.6V VOLTAGE=1.8V VOLTAGE=3.0V
PN_SAGE_VCPL_F 24 PP_SAGE_LX 24 PP_SAGE_LY 24
PP_PMU_VREF 13 PP_SAGE_VBST_OUTH 24
PP_TIGRIS_VBUS_DET 14 PP1V8_PLL
PP_MIPIOD_VREG BOARD_ID0
PP_PMU_VDD_REF 13 PP_EXTMIC_BIAS 10
PP1V8_XTAL 2 PP_PMU_VDD_RTC 13
PP_BATT_VCC 14 16 25 40 45 46 PP1V8_MESA_CONN 21 PP3V0_PROX_CONN 11
VOLTAGE=1.0V VOLTAGE=1.0V VOLTAGE=1.2V VOLTAGE=1.0V VOLTAGE=1.0V
PP0V95_FIXED_SOC
4 7 12
PP0V95_FIXED_SOC_PCIE 7
PP1V2_PLL
2
PP_BUCK5_LX1
12
PP_VAR_SOC
5 12
VOLTAGE=5.0V VOLTAGE=5.0V VOLTAGE=4.6V VOLTAGE=4.6V
VOLTAGE=3.0V VOLTAGE=3.0V
PMID_CAP CHARGER_LDO CHG_BOOT CHG_LX
VIBE_DRIVE_P VIBE_DRIVE_N
14 14 14 14
14 18 14 18
VOLTAGE=1.8V
PP_RCAM_AF_CONN 23
VOLTAGE=-14.0V
PN_SAGE_VBST_OUTL 24
VOLTAGE=-12.0V PN_SAGE_TO_TOUCH_VCPL_FILT 24
VOLTAGE=2.7V
PP_BB_VDD_2V7_CONN 18
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
5
4
3
D
C
B
A
PAGE TITLE
SYSTEM:VOLTAGE PROPERTIES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
26
SHEET
26
OF OF
55 54
2
1
8
7
D
https://www.mobile-manuals.com/
6
5
4
3
N61 SPECIFIC
2
1
D
C B A
8
C BOOTSTRAPPING (BOARD_REV, BOARD_ID, BOOT_CFG)
BOARD_REV[3:0]={GPIO34, GPIO35, GPIO36, GPIO37}
FLOAT=LOW, PULLUP=HIGH
3 BOARD_REV3 3 BOARD_REV0
I6 I13
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26
MAKE_BASE=TRUE
1111 PROTOMLB1
1110 1101 1100
PROTOMLB2 PROTO1 PROTO2
NOSTUFF
R0374 3 BOARD_REV2
ROOM=SOC
1
2
1.00K
1011 1010
EVT EVT SPLIT CARBON DOE
01005 MF 5% 1/32W
B
1001 CARRIER BUILD <--- SELECTED
1000 DVT
BOARD_ID[4:0]={GPIO29, GPIO16, SPIO0_MISO, SPI0_MOSI, SPI0_SCLK}
FLOAT=LOW, PULLUP=HIGH
00100 00101 00110
N56, T133 MLB N56 DEV FIJI N61 MLB <--- SELECTED
BOOT_CONFIG[2:0]={GPIO28, GPIO25, GPIO18}
FLOAT=LOW, PULLUP=HIGH
000 SPI0
001
SPI0 TEST MODE
010 NAND
<--- SELECTED
011
NAND TEST MODE
100 NVME
101
NVME TEST MODE
111 FAST SPI
R0324 26 3 BOARD_ID2
ROOM=SOC
1
2
1.00K
01005 MF 5% 1/32W
R0325 3 BOARD_ID1
ROOM=SOC
1
2
1.00K
01005 MF 5% 1/32W
3 BOOT_CONFIG1
I11
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
A
PAGE TITLE
SYSTEM:N61 SPECIFIC
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
27
SHEET
27
OF OF
55 54
7
6
5
4
3
2
1
8
7
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https://www.mobile-manuals.com/
6
5
4
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1
D
C
C
B
B
A
8
7
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
A
PAGE TITLE
BLANK
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
28
SHEET
28
OF OF
55 54
6
5
4
3
2
1
8 D C B A
8
https://www.mobile-manuals.com/
7
6
5
4
3
2
1
RADIO_MLB HIERARCHICAL SYMBOL
POWER
D
POWER
PP1V8_SDRAM
26 17 15 14 13 12 10 4 3
I314
MAKE_BASE=TRUE
PP_WL_BT_VDDIO_AP 51
VCC_MAIN, VBAT GOES TO RADIO_MLB DIRECTLY
I315 PP_STOCKHOLM_1V8_S2R 52 54
CHECK ALL PAGES IN RF SIDE!
I407
RFFE_VIO_S2R 53
CELLULAR HOUSE KEEPING
AP_TO_RADIO_ON_L
3
BB_TO_AP_RESET_DET_L
3
PMU_TO_BB_RST_L
13
AP_TO_BB_RST_L
3
I325
MAKE_BASE=TRUE
I324
MAKE_BASE=TRUE
I326
MAKE_BASE=TRUE
I327
MAKE_BASE=TRUE
RADIO_ON_L BB_RESET_DET_L RF_PMIC_RESET_L
BB_RST_L
AP_TO_BB_WAKE_MODEM
I329
MAKE_BASE=TRUE
3
BB_TO_PMU_HOST_WAKE_L
I328
MAKE_BASE=TRUE
13
BB_TO_AP_IPC_GPIO
3
I331
MAKE_BASE=TRUE
BB_TO_LEDDRV_GSM_BLANK
I330
MAKE_BASE=TRUE
16
BB_TO_AP_GPS_SYNC
3
I332
MAKE_BASE=TRUE
AP_WAKE_MODEM BB_WAKE_HOST_L
BB_IPC_GPIO GSM_TXBURST_IND
BB_GPS_SYNC
30 32 30 35 30 32 30 32
35 30 35 35 35 30 35
WLAN/BT HOUSE KEEPING
45_PMU_TO_WLAN_CLK32K
13
PMU_TO_WLAN_REG_ON
13
WLAN_TO_PMU_HOST_WAKE
13
PMU_TO_BT_REG_ON
13
AP_TO_BT_WAKE
3
BT_TO_PMU_HOST_WAKE
13
I316
MAKE_BASE=TRUE
I317
MAKE_BASE=TRUE
I318
MAKE_BASE=TRUE
I319
MAKE_BASE=TRUE
I320
MAKE_BASE=TRUE
I321
MAKE_BASE=TRUE
CLK32K_AP WLAN_REG_ON HOST_WAKE_WLAN
BT_REG_ON WAKE_BT
HOST_WAKE_BT
30 51 30 51 30 51 30 51 30 51 51
HSIC IPC
3 AP_TO_WLAN_JTAG_SWCLK
I333
MAKE_BASE=TRUE
WLAN_JTAG_SWDCLK
30 51
50_AP_BI_BB_HSIC1_DATA
I368
MAKE_BASE=TRUE
2
50_BB_HSIC_DATA 30 34
3 AP_TO_WLAN_JTAG_SWDIO
I334
MAKE_BASE=TRUE
WLAN_JTAG_SWDIO
30 51
50_AP_BI_BB_HSIC1_STB
2
I369
MAKE_BASE=TRUE
50_BB_HSIC_STROBE
30 34
13 WLAN_TO_PMU_PCIE_WAKE_L
I335
MAKE_BASE=TRUE
WLAN_PCIE_WAKE_L
30 51
AP_TO_BB_HOST_RDY
3
I371
MAKE_BASE=TRUE
BB_HOST_RDY 30 35
3 AP_TO_WLAN_DEVICE_WAKE
I336
MAKE_BASE=TRUE
PCIE_DEV_WAKE
30 51
BB_TO_AP_DEVICE_RDY
3
I370
MAKE_BASE=TRUE
BB_DEVICE_RDY 30 35
7 90_WLAN_TO_AP_PCIE1_RXDP_P
I337
MAKE_BASE=TRUE
90_WLAN_PCIE_TDP
30 51
3 BB_TO_AP_IPC_GPIO1
I372
MAKE_BASE=TRUE
BB_IPC_GPIO1 35
7 90_WLAN_TO_AP_PCIE1_RXDP_N 7 90_AP_TO_WLAN_PCIE1_TXDP_P
I340
MAKE_BASE=TRUE
I338
MAKE_BASE=TRUE
90_WLAN_PCIE_TDN 90_WLAN_PCIE_RDP
30 51 30 51
C
UART IPC
7 90_AP_TO_WLAN_PCIE1_TXDP_N 7 90_AP_TO_WLAN_PCIE1_REFCLK1_P
I339
MAKE_BASE=TRUE
I342
MAKE_BASE=TRUE
90_WLAN_PCIE_RDN 90_WLAN_PCIE_REFCLK_P
30 51 51
AP_TO_BB_UART2_RTS_L
3
I373
MAKE_BASE=TRUE
BB_UART_CTS_L 30 35
I341 7 90_AP_TO_WLAN_PCIE1_REFCLK1_N MAKE_BASE=TRUE
90_WLAN_PCIE_REFCLK_N
51
BB_TO_AP_UART2_CTS_L
3
I376
MAKE_BASE=TRUE
BB_UART_RTS_L 30 35
7 WLAN_TO_AP_PCIE1_CLKREQ_L
I344
MAKE_BASE=TRUE
WLAN_PCIE_CLKREQ_L
30 51
AP_TO_BB_UART2_TXD
17 3
I374
MAKE_BASE=TRUE
BB_UART_RXD 30 35
7 AP_TO_WLAN_PCIE1_RST_L
I343
MAKE_BASE=TRUE
WLAN_PCIE_PERST_L
30 51
BB_TO_AP_UART2_RXD
I375
MAKE_BASE=TRUE
BB_UART_TXD
17 3
30 35
AUDIO I2S
45_AP_TO_BB_I2S3_BCLK
3
AP_TO_BB_I2S3_DOUT
3
BB_TO_AP_I2S3_DIN
3
AP_TO_BB_I2S3_LRCLK
3
I377
MAKE_BASE=TRUE
I378
MAKE_BASE=TRUE
I379
MAKE_BASE=TRUE
I380
MAKE_BASE=TRUE
BB_I2S_CLK BB_I2S_RXD BB_I2S_TXD
BB_I2S_WS
35 30 35 30 35 30 35
OSCAR UART
OSCAR_TO_BB_UART_TXD
22
BB_TO_OSCAR_UART_RXD
22
I382
MAKE_BASE=TRUE
I381
MAKE_BASE=TRUE
BB_OTHER_RXD BB_OTHER_TXD
30 35 30 35
WLAN HSIC IPC
WLAN_TO_AP_UART4_RXD
3
AP_TO_WLAN_UART4_TXD
3
I345
MAKE_BASE=TRUE
I348
MAKE_BASE=TRUE
3
WLAN_TO_AP_UART4_CTS_L
I347
MAKE_BASE=TRUE
AP_TO_WLAN_UART4_RTS_L
I346
MAKE_BASE=TRUE
3
WLAN_UART_TXD WLAN_UART_RXD
WLAN_UART_RTS_L WLAN_UART_CTS_L
30 51 30 51 30 51 30 51
BB DEBUG INTERFACES
BT UART IPC
AP_TO_BT_UART1_RTS_L
3
I349
MAKE_BASE=TRUE
BT_UART_CTS_L 51
BT_TO_AP_UART1_CTS_L
I352
MAKE_BASE=TRUE
BT_UART_RTS_L
3
51
AP_TO_BT_UART1_TXD
I351
MAKE_BASE=TRUE
BT_UART_RXD
AP_TO_BB_COREDUMP
3
I384
MAKE_BASE=TRUE
BB_CORE_DUMP 30 35
3
BT_TO_AP_UART1_RXD
I350
MAKE_BASE=TRUE
BT_UART_TXD
30 51
PMU_TO_BB_VBUS_DET
13
I387
MAKE_BASE=TRUE
17
90_TRISTAR_BI_BB_USB_N
I386
MAKE_BASE=TRUE
17
90_TRISTAR_BI_BB_USB_P
I388
MAKE_BASE=TRUE
BB_USB_VBUS 90_BB_USB_N 90_BB_USB_P
30 34 30 34 30 34
3
30 51
BT AUDIO PCM
B
RADIO ANTENNA CONTROL
PP_BB_VDD_2V7
18
BB_GPIO0
18
BB_GPIO2
18
BB_GPIO3
18
BB_GPIO4
18
I389
MAKE_BASE=TRUE
I390
MAKE_BASE=TRUE
I391
MAKE_BASE=TRUE
I392
MAKE_BASE=TRUE
I394
MAKE_BASE=TRUE
PP_LDO14_RFSW BB_LAT_GPIO0 BB_LAT_GPIO2 BB_LAT_GPIO3 BB_LAT_GPIO4
31 41 42 35 35 35 35
45_AP_TO_BT_I2S1_BCLK
3
AP_TO_BT_I2S1_DOUT
3
BT_TO_AP_I2S1_DIN
3
AP_TO_BT_I2S1_LRCLK
3
I354
MAKE_BASE=TRUE
I353
MAKE_BASE=TRUE
I355
MAKE_BASE=TRUE
I356
MAKE_BASE=TRUE
BT_PCM_CLK 51 BT_PCM_IN 51
BT_PCM_OUT 51
BT_PCM_SYNC 51
OSCAR STATES
OSCAR_TO_RADIO_CONTEXT_A
I358
MAKE_BASE=TRUE
22
22
OSCAR_TO_RADIO_CONTEXT_B
I357
MAKE_BASE=TRUE
OSCAR_CONTEXT_A 51
OSCAR_CONTEXT_B 51
FCT TESTING
STOCKHOLM
RADIO_TO_PMU_ADC_SMPS1
13
RADIO_TO_PMU_ADC_PP_LDO11_VDDIO
13
RADIO_TO_PMU_ADC_PP_LDO5_SIM
13
RADIO_TO_PMU_ADC_SMPS4
13
I395
MAKE_BASE=TRUE
I396
MAKE_BASE=TRUE
I398
MAKE_BASE=TRUE
I397
MAKE_BASE=TRUE
ADC_SMPS1 30
ADC_PP_LDO11 30 ADC_PP_LDO5 30 ADC_SMPS4 30
UPPER RADIO ANTENNA CONTROL
25 50_AP_WIFI_5G_CONN_ANT 25 50_AP_UAT_FEED
UAT_ANT_GND PP3V0_TRISTAR
29 26 17 15 12
25 8 NORTH_AC_GND_SCREW
I410
MAKE_BASE=TRUE
50_WIFI_5G_CONN_ANT
50
I409
MAKE_BASE=TRUE
50_UPPER_ANT_FEED
50
I411
MAKE_BASE=TRUE
ANT_GND 50
I404
MAKE_BASE=TRUE
PAC_VDD_3V0 53
I412
MAKE_BASE=TRUE
NORTH_ANT_GND 50
STOCKHOLM_TO_AP_UART3_CTS_L 3
AP_TO_STOCKHOLM_UART3_RTS_L 3
STOCKHOLM_TO_AP_UART3_RXD 3
AP_TO_STOCKHOLM_UART3_TXD 3
AP_TO_STOCKHOLM_DWLD_REQ 7
STOCKHOLM_TO_PMU_HOST_WAKE 13
AP_TO_STOCKHOLM_EN
7 PP3V0_TRISTAR
29 26 17 15 12
AP_TO_STOCKHOLM_SIM_SEL
3
25 AP_TO_STOCKHOLM_ANT
I359
MAKE_BASE=TRUE
I360
MAKE_BASE=TRUE
I361
MAKE_BASE=TRUE
I363
MAKE_BASE=TRUE
I362
MAKE_BASE=TRUE
I364
MAKE_BASE=TRUE
I365
MAKE_BASE=TRUE
I366
MAKE_BASE=TRUE
I367
MAKE_BASE=TRUE
I406
MAKE_BASE=TRUE
STOCKHOLM_RTS_L STOCKHOLM_CTS_L STOCKHOLM_UART_TXD STOCKHOLM_UART_RXD STOCKHOLM_FW_DWLD_REQ STOCKHOLM_HOST_WAKE STOCKHOLM_ENABLE STOCKHOLM_VDD_MUX_3V0 STOCKHOLM_SIM_SEL
STOCKHOLM_ANT
30 52 30 52 30 52 30 52 52 30 52 52 54 54 52
PAGE TITLE
CELL:ALIASES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
A
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUESTIV ALL RIGHTS RESERVED
PAGE
30
SHEET
29
OF OF
55 54
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
AP INTERFACE & DEBUG CONNECTORS
2
1
PROBE POINTS
PP3105_RF
D
P2MM SM 1 CLK32K_AP
PP
29 51
WIFI_BT
PP3113_RF P4MM SM 1 BB_COEX_UART_RXD
PP WIFI_BT
35 51
PP3114_RF P4MM SM 1 BB_COEX_UART_TXD
PP WIFI_BT
35 51
PP3119_RF P2MM SM 1 BT_UART_TXD
PP WIFI_BT
PP3120_RF P2MM-NSM
SM 1 BT_UART_RXD
PP WIFI_BT
PP3152_RF P2MM SM 1 WAKE_BT
PP WIFI_BT
PP3153_RF P2MM SM 1 WLAN_REG_ON
PP WIFI_BT
PP3154_RF P4MM SM 1 BT_REG_ON
PP WIFI_BT
29 51 29 51 29 51 29 51 29 51
PP3155_RF
P2MM
SM 1 HOST_WAKE_WLAN
PP
29 51
C
WIFI_BT
PP3156_RF
P2MM
SM 1 WLAN_PCIE_WAKE_L
PP
29 51
WIFI_BT
PP3157_RF P2MM SM 1 WLAN_PCIE_PERST_L
PP WIFI_BT
PP3158_RF P2MM SM 1 WLAN_PCIE_CLKREQ_L
PP WIFI_BT
29 51 29 51
PP3159_RF P4MM SM 1 PCIE_DEV_WAKE
PP WIFI_BT
PP3160_RF P2MM SM 1 WLAN_UART_RTS_L
PP
WIFI_BT
PP3161_RF P2MM SM 1 WLAN_UART_CTS_L
PP
29 51 29 51 29 51
WIFI_BT
PP3162_RF
P2MM
SM 1
WLAN_UART_RXD
PP
WIFI_BT
PP3163_RF P2MM SM 1 WLAN_UART_TXD
PP WIFI_BT
29 51 29 51
PP3190_RF
B
P2MM
SM 1
WLAN_JTAG_SWDCLK
PP
29 51
WIFI_BT
PP3191_RF P2MM SM 1 WLAN_JTAG_SWDIO
PP WIFI_BT
29 51
PP3166_RF P4MM SM 1 90_WLAN_PCIE_RDN
PP WIFI_BT
PP3167_RF
P4MM
SM 1
90_WLAN_PCIE_RDP
PP
WIFI_BT
PP3168_RF P4MM-NSM
SM 1 90_WLAN_PCIE_TDN
PP WIFI_BT
PP3169_RF P4MM-NSM
SM 1 90_WLAN_PCIE_TDP
PP WIFI_BT
29 51 29 51 29 51 29 51
DIFF-PAIR PROBE POINTS LOCATED OPPOSITE DC-BLOCKS
A
33 31
38 37 35 34 33 31 30 39
54 33 31 30
31
XW3101_RF
SHORT-10L-0.1MM-SM
VREG_SMPS1_0V90
1
2
ADC_SMPS1
PP_LDO11
XW3102_RF
SHORT-10L-0.1MM-SM
1
2
ADC_PP_LDO11
PP_LDO5
XW3103_RF
SHORT-10L-0.1MM-SM
1
2
ADC_PP_LDO5
XW3104_RF
SHORT-10L-0.1MM-SM
VREG_SMPS4_2V075
1
2
ADC_SMPS4
PP3121_RF P2MM-NSM
SM 1
PP RADIO_STOCKHOLM
PP3122_RF P4MM SM 1
PP SIM_DEBUG
PP3123_RF P2MM-NSM
SM 1
PP RADIO_STOCKHOLM
PP3124_RF P2MM SM 1
PP RADIO_STOCKHOLM
PP3125_RF P2MM-NSM
SM 1
PP RADIO_STOCKHOLM
PP3126_RF P2MM-NSM
SM 1
PP RADIO_STOCKHOLM
PP3128_RF P2MM SM 1
PP RADIO_STOCKHOLM
PP3174_RF P4MM SM 1
PP SIM_DEBUG
PP3129_RF P4MM SM 1
PP SIM_DEBUG
PP3165_RF P4MM SM 1
PP SIM_DEBUG
PP3183_RF P4MM SM 1
PP SIM_DEBUG
PP3184_RF P4MM SM 1
PP SIM_DEBUG
PP3186_RF P4MM SM 1
PP SIM_DEBUG
PP3187_RF P4MM SM 1
PP SIM_DEBUG
PP3188_RF P4MM SM 1
PP SIM_DEBUG
PP3189_RF P4MM SM 1
PP SIM_DEBUG
PP_3178_RF P2MM-NSM SM 1
PP
PP_3179_RF P2MM-NSM SM 1
PP
PP_3180_RF P2MM-NSM SM 1
PP
PP_3183_RF P2MM-NSM SM 1
PP
PP_3184_RF P2MM-NSM SM 1
PP
STOCKHOLM_HOST_WAKE 29 52 BB_REQUEST_XO_CLK 32 52 STOCKHOLM_UART_RXD 29 52 STOCKHOLM_UART_TXD 29 52 STOCKHOLM_CTS_L 29 52 STOCKHOLM_RTS_L 29 52 PP_PN65_VCC_SIM 52
STOCKHOLM_SIM_SWP 52 54
REF_CLK_FROM_BB
32 52
DSDS_SIM_CLK
34 54
DSDS_SIM_RESET
34 54
DSDS_SIM_DATA
34 54
DSDS_SIM_DETECT 34
PP_LDO6
31 33 54
DSDS_SIM_SWP
54
DSDS_SIM_DATA_R 54
BB_SIM_RESET
30 35
BB_SIM_CLK
30 35
BB_SIM_DATA
30 35
BB_SIM_DETECT
30 35
PP_LDO5
30 31 33 54
PP3115_RF P4MM-NSM
SM 1 50_BB_HSIC_STROBE
PP SIM_DEBUG
PP3116_RF P4MM-NSM
SM 1 50_BB_HSIC_DATA
PP SIM_DEBUG
PP3101_RF
P4MM
SM PP
1
BB_DEBUG_ERROR
SIM_DEBUG
PP3102_RF P4MM SM 1 RF_PMIC_RESET_L
PP SIM_DEBUG
PP3103_RF
P4MM
SM 1
PP
PS_HOLD_PMIC
SIM_DEBUG
PP3127_RF
P4MM
SM 1
PP
PMIC_RESOUT_L
SIM_DEBUG
PP3104_RF P4MM SM 1 MDM_CLK
PP SIM_DEBUG
PP3109_RF
P4MM
SM 1
PP_LDO11
PP
SIM_DEBUG
PP3110_RF
P4MM
SM 1
RADIO_ON_L
PP
SIM_DEBUG
PP3111_RF P4MM SM 1 SPMI_DATA
PP SIM_DEBUG
PP3112_RF P4MM SM 1 SPMI_CLK
PP SIM_DEBUG
29 34 29 34
PP3130_RF P4MM SM 1 BB_JTAG_RST_L
PP SIM_DEBUG
PP3131_RF P4MM SM 1 BB_JTAG_TCK
PP SIM_DEBUG
PP3132_RF
P4MM
35
SM PP
1
BB_JTAG_TMS
SIM_DEBUG
29 32
PP3133_RF P4MM SM 1 BB_JTAG_TDO
PP SIM_DEBUG
PP3134_RF
P4MM
32
SM 1
PP
BB_JTAG_TDI
SIM_DEBUG
32 34
PP3135_RF
P4MM
SM 1
PP
BB_JTAG_TRST_L
SIM_DEBUG
32 34
PP3136_RF P4MM SM 1 BB_DEBUG_STATUS
PP SIM_DEBUG
PP3137_RF
P4MM
SM 1
BB_CORE_DUMP
30 31 33 34 35 37 38 39
PP
SIM_DEBUG
29 32
PP3138_RF
P4MM
SM 1
BB_USB_VBUS
PP
SIM_DEBUG
32 34
PP3139_RF P4MM SM 1 90_BB_USB_N
PP SIM_DEBUG
32 34
PP3140_RF P4MM SM 1 90_BB_USB_P
PP SIM_DEBUG
34 34 34 34 34
34 35 29 35 29 34 29 34 29 34
PP3141_RF P4MM SM 1 BB_UART_TXD
PP SIM_DEBUG
PP3142_RF P4MM SM 1 BB_UART_RXD
PP SIM_DEBUG
PP3143_RF
P4MM
SM PP
1
BB_UART_RTS_L
SIM_DEBUG
PP3144_RF P4MM SM 1 BB_UART_CTS_L
PP SIM_DEBUG
PP3145_RF
P4MM
SM 1
PP
BB_HOST_RDY
SIM_DEBUG
PP3146_RF
P4MM
SM 1
PP
BB_DEVICE_RDY
SIM_DEBUG
PP3147_RF P4MM SM 1 BB_GPS_SYNC
PP SIM_DEBUG
PP3148_RF
P4MM
SM 1
BB_WAKE_HOST_L
PP
SIM_DEBUG
PP3149_RF
P4MM
SM 1
BB_RESET_DET_L
PP
SIM_DEBUG
PP3150_RF P4MM SM 1 BB_RST_L
PP SIM_DEBUG
PP3151_RF P4MM SM 1 BOOT_HSIC
PP SIM_DEBUG
29 35 29 35 29 35 29 35 29 35
29 35 29 35 29 35 29 35
PP3170_RF P4MM SM 1
PP RF_DEBUG
PP3171_RF P4MM SM 1
PP RF_DEBUG
PP3172_RF P4MM SM 1
PP RF_DEBUG
PP3173_RF P4MM SM 1
PP RF_DEBUG
PP3175_RF P4MM SM 1
PP RF_DEBUG
PP3176_RF P4MM SM 1
PP RF_DEBUG
PP3177_RF P4MM SM 1
PP RF_DEBUG
PP3178_RF P4MM SM 1
PP RF_DEBUG
PP3179_RF P4MM SM 1
PP RF_DEBUG
29 32
30 35
RFFE1_CLK
35 39 40 41 42 43 44
RFFE1_DATA
35 39 40 41 42 43 44
RFFE2_CLK
35 45 46 48
RFFE2_DATA
35 45 46 48
BB_I2S_WS
29 35
BB_I2S_RXD
29 35
BB_I2S_TXD
29 35
BB_OTHER_TXD
29 35
BB_OTHER_RXD
29 35
PART NUMBER ALTERNATE FOR BOM OPTION PART NUMBER
197S0565
197S0593
ALTERNATE
197S0598
197S0593
ALTERNATE
138S00005
138S00003
ALTERNATE
138S0739
138S0706
ALTERNATE
138S0945
138S0706
ALTERNATE
138S1103
138S0719
ALTERNATE
339S0231
339S0228
ALTERNATE
339S0242
339S0228
ALTERNATE
155S00024
155S0950
ALTERNATE
REF DES COMMENTS:
TABLE_ALT_HEAD
Y3301_RF KDS 19.2MHZ XTAL
TABLE_ALT_ITEM
Y3301_RF AVX 19.2MHZ XTAL
TABLE_ALT_ITEM
C3216_RF 15UF CAPACITOR
TABLE_ALT_ITEM
C4207_RF 1.0UF CAPACITOR
TABLE_ALT_ITEM
C4207_RF 1.0UF CAPACITOR
TABLE_ALT_ITEM
C4007_RF 4.7UF CAPACITOR
TABLE_ALT_ITEM
TABLE_ALT_ITEM
U5201_RF CORONA MODULE USI
TABLE_ALT_ITEM
U5201_RF CORONA MODULE TDK
F_TRI_RF TRIPLEXER BIN2
TABLE_ALT_ITEM
39 38 37 35 34 33 31 30
PP_LDO11
35 30 35 35
RADIO_BB
1 R3102_RF
10K
1% 1/32W
MF 01005 2
RADIO_BB
1 R3103_RF
10K
1% 1/32W
MF 01005 2
BOOT_HSIC
BOOT_HSIC_USB
WATCHDOG_DISABLE
RADIO_BB
1 R3104_RF
10K
1% 1/32W
MF 01005 2
SIM CARD ESD PROTECTION
D C B
OUT 29 OUT 29 OUT 29 OUT 29
BB_SIM_DETECT
35 30
DZ3102_RF 5.5V-6.2PF
1
2
SIM CARD CONNECTOR
0201
VR3101_RF
ESDAVLC5-4BU4
SM
54 33 31 30 PP_LDO5
BB_SIM_RESET 35 30 IN
BB_SIM_CLK 35 30 IN
VCC
J3101_RF
2
SIMCARD-RCPT-N61
RST
F-ST-SM
I/O
7
3 CLK
DETECT 12
SWP 6 GND
8 9 10
1 11 13
5
BB_SIM_DATA
1
PP_LDO5
35 30
30 31 33 54
4 4FF_SIM_SWP
30 54
GND
1R3101_RF
15.00K
1% 1/32W MF 201005
1 C3101_RF
2.2UF
20%
2
6.3V X5R
0201-1
BB_SIM_DATA
BI 30 35
BB_SIM_DETECT
OUT 30 35
4FF_SIM_SWP
BI 30 54
1 DZ3101_RF
BB_SIM_RESET
2
35 30
12V-33PF
01005-1
2
5
3 BB_SIM_CLK
30 35
SYNC_MASTER=N/A
PAGE TITLE
AP INTERFACE & DEBUG
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
A SYNC_DATE=N/A
CONNECTORS
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
31
SHEET
30
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
BASEBAND PMU (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
23 17 16 15 14 12 10 52 51 48 39 31 26
PP_VCC_MAIN
RADIO_PMIC
1 C3270_RF
100PF
5%
2
16V NP0-C0G
01005
RADIO_PMIC
1 C3224_RF
2.2UF
20%
2
6.3V X5R
0201-1
RADIO_PMIC
1 C3223_RF
2.2UF
20%
2
6.3V X5R
0201-1
RADIO_PMIC
1 C3222_RF
2.2UF
20%
2
6.3V X5R
0201-1
RADIO_PMIC
1 C3216_RF
15UF
20%
2
6.3V X5R
0402-1
RADIO_PMIC
1 C3221_RF
15UF
20%
2
6.3V X5R
0402-1
SWITCHERS OUTPUT CAPS
33 31 30 VREG_SMPS1_0V90
31 VREG_SMPS2_1V25
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
RADIO_PMIC RADIO_PMIC
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
RADIO_PMIC
RADIO_PMIC
RADIO_PMIC
D
1 C3229_RF
20UF
20%
2
6.3V CERM-X5R
0402
1 C3231_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3233_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3235_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3249_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3251_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3259_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3260_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3237_RF
20UF
20%
2
6.3V CERM-X5R
0402
1 C3239_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3242_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3244_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3253_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3255_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3258_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3261_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3262_RF
2.2UF
20%
2
6.3V X5R
0201-1
VREG_SMPS3_0V95
31
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
1 C3230_RF
20UF
20%
2
6.3V CERM-X5R
0402
1 C3232_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3234_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3236_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3250_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3252_RF
2.2UF
20%
2
6.3V X5R
0201-1
RADIO_PMIC
1 C3257_RF
2.2UF
20%
2
6.3V X5R
0201-1
VREG_SMPS4_2V075 30 31
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
1 C3238_RF
20UF
20%
2
6.3V CERM-X5R
0402
1 C3240_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3241_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3243_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3254_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C3256_RF
2.2UF
20%
2
6.3V X5R
0201-1
C
VREG_RF_CLK_BYP
C
AVDD_BYP
SWITCHERS BULK CAPS
52
17 16 15 14 12 10 51 48 39 31 26 23
IN
PP_VCC_MAIN MAKE_BASE=TRUE
VBATT_S1
31
VBATT_S1
31
1
RADIO_PMIC C3217_RF
15UF
20%
2
6.3V X5R
0402-1
31 VBATT_S1 31 VBATT_S2
31 VBATT_S3
1
RADIO_PMIC C3226_RF
1.0UF
20%
2
10V
X5R-CERM
0201-1
REF_BYP
1
RADIO_PMIC C3227_RF
0.1UF
20%
2
4V
X5R
01005
1
RADIO_PMIC C3228_RF
U_PMICRF
PM8019
BGA
SYM 5 OF 5 26 VDD_INT_BYP
VREG_RFCLK 91
1.0UF
2
1200V%
X5R-CERM
0201-1
21 REF_BYP
REG
VREG_XO 74 VREG_XO_PMIC
15 GND_REF
VREG_S1 27
22 VDD_S1
VSW_S1_1 11
88 VDD_S2
VSW_S1_2 16
94 VDD_S2
VREG_S2 82
47 VDD_S3
VSW_S2 93
RADIO_PMIC
L3201_RF
2.2UH-20%-1.5A-0.160OHM
PP_VSW_S1 1
2MAKK2016-SM
VOLTAGE=4.50V
RADIO_PMIC
L3203_RF
2.2UH-20%-1.5A-0.160OHM
PP_VSW_S2 1
RADIO2_MPAMKIKC2016-SM
VOLTAGE=4.50V
L3204_RF
1235MA 1100MA
VREG_SMPS1_0V90 OUT 30 31 33 VREG_SMPS2_1V25 OUT 31
52
17 16 15 14 12 10 51 48 39 31 26 23
IN
PP_VCC_MAIN MAKE_BASE=TRUE
VBATT_S2
31
VBATT_S2
31
31 VBATT_S4 31 VREG_SMPS2_1V25
1 VDD_S4 92 VDD_L1
VREG_S3 62 VSW_S3_1 53 VSW_S3_2 58
2.2UH-20%-1.5A-0.160OHM
PP_VSW_S3 1
2MAKK2016-SM
VOLTAGE=4.50V
RADIO_PMIC
L3202_RF
1350MA
VREG_SMPS3_0V95 OUT 31
1
RADIO_PMIC C3218_RF
15UF
20%
2
6.3V X5R
0402-1
31 30 VREG_SMPS4_2V075 31 30 VREG_SMPS4_2V075
2 VDD_L2_3 4 VDD_L7_8_11 77 VDD_L9
VREG_S4 23 VSW_S4_1 6 VSW_S4_2 12
VREG_L1 86
2.2UH-20%-1.2A-0.15OHM
PP_VSW_S4 1
2 0806
VOLTAGE=4.50V
VREG_RX
550MA
VREG_SMPS4_2V075 OUT 30 31
VOLTAGE=1.225V
PP_LDO1
OUT 33 37 38
72 VDD_L10
VREG_L2 7
VOLTAGE=1.80V
PP_LDO2
OUT 33
B
52
17 16 15 14 12 10 51 48 39 31 26 23
IN
PP_VCC_MAIN MAKE_BASE=TRUE
VBATT_S3
31
VBATT_S3
31
31 VREG_SMPS3_0V95 31 30 VREG_SMPS4_2V075
38 VDD_L12 85 VDD_XO_RFC
VREG_L3 8 VREG_L4 68
VOLTAGE=1.80V
PP_LDO3
OUT 32 33
B
VOLTAGE=3.075V
PP_LDO4
OUT 33
1
RADIO_PMIC C3219_RF
15UF
20%
2
6.3V X5R
0402-1
34
52 39 31 17 16
12 10 15 14 26 23
51 48
OUT IN
MDM_VREF_LPDDR2 PP_VCC_MAIN
49 GND 52 VREF_DDR2 43 VIN_VPH1 54 VIN_VPH2
VREG_L5 59 VREG_L6 48 VREG_L7 10 VREG_L8 3
VREG_SIM VREG_TX
VOLTAGE=1.80V VOLTAGE=1.80V VOLTAGE=1.90V VOLTAGE=2.05V
PP_LDO5 PP_LDO6 PP_LDO7 PP_LDO8
OUT 30 33 54 OUT 30 33 54 OUT 33 35 OUT 37 38
52
17 16 15 14 12 10 51 48 39 31 26 23
IN
PP_VCC_MAIN MAKE_BASE=TRUE
VBATT_S4
31
VBATT_S4
31
VREG_L9 71 VREG_L10 83
VOLTAGE=1.20V VOLTAGE=0.90V
PP_LDO9 PP_LDO10
OUT 33 OUT 33
1
RADIO_PMIC C3220_RF
15UF
20%
2
6.3V X5R
0402-1
VREG_L11 9 VREG_L12 33 VREG_L13 34
VREG_IO
VOLTAGE=1.80V VOLTAGE=0.95V VOLTAGE=2.95V
PP_LDO11 PP_LDO12 PP_LDO13
OUT 30 33 34 35 37 38 39 OUT 33 OUT 33 50
VREG_L14 28
VOLTAGE=5.0V
PP_LDO14_RFSW OUT 29 41 42
1 RCA3D2I0O1__PRMFI1RCACD3I2O0_2P_MRI1FCRCA3D2I0O3__PRMFI1CRCA3D2I0O4__PRMFI1CCRA3D2I0O5__PRMFI1CRCA3D2I0O6__PRMFI1CCRA3D2I0O7__PRMFI1CCRA3D2I0O8__PRMFI1RCACD3I2O0_9P_MRI1RFCACD3I2O1_0P_MRI1RFCACD3I2O1_1P_MRIFC1 CRA3D2I1O2__PRMFI1RCACD3I2O1_3P_MRIFC1 CRA3D2I1O4__PRMFI1CRCA3D2I1O5__PRMFIC
1.0UF 10UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF 10UF
20%
2
10V
X5R-CERM
2
20% 6.3V CERM-X5R
2
2100%V
X5R-CERM
20%
2
10V
X5R-CERM
20%
2
10V
X5R-CERM
20%
2
10V
X5R-CERM
20%
2
10V
X5R-CERM
20%
2
10V
X5R-CERM
20%
20%
20%
2
6.3V CERM-X5R
2
6.3V CERM-X5R
2
6.3V CERM-X5R
1.0UF 10UF
20%
2
10V
X5R-CERM
20%
2
6.3V CERM-X5R
1.0UF 1.0UF
20%
20%
2
10V
X5R-CERM
2
10V
X5R-CERM
0201-1
0402-9
0201-1
0201-1
0201-1
0201-1
0201-1
0201-1
0402-9
0402-9
0402-9
0201-1
0402-9
0201-1
0201-1
A
A
BASEBAND PAGE TITLE PMU (1 0F 2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
32
SHEET
31
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
BOARD_IDREVISION
0.00V N61 PROTO_MLB1
D
0.50V 0.70V
N61 DEV3 N61 DEV4
0.90V N61 PROTO_MLB2
1.10V N61/N56 PROTO1
1.30V N61/N56 PROTO2
1.40V N61/N56 EVT1
1.50V N61/N56 EVT2 (CARRIER)
1.60V N61/N56 DVT
1.70V N61/N56 PVT
XTAL19M_IN 32
1 RADIO_PMIC R3304_RF
100K
1% 1/32W MF 201005 NOSTUFF
2
1
C401
R411
L400
U404
D
RADIO_PMIC 33 32 31 IN
PP_LDO3
C
1R3305_RF
39K
1%
1/32W
MF 2 01005
BOARD_ID 32
CALCULATE WITH 2M IN PARALLEL TO GND
RADIO_PMIC
1R3306_RF
200K
1% 1/32W MF 2 01005
32 32
33 OUT
35 OUT
BOARD_ID
39
VINYL
29
VDDPX_BIAS 18
44 NC
VREF_DAC_BIAS 35
24 NC
U_PMICRF
PM8019
BGA
SYM 4 OF 5
MPP_01 MPP_GPIO GPIO_01 13 NC BB_GPS_ENABLE
MPP_02
GPIO_02 30
BB_REQUEST_XO_CLK
MPP_03 MPP_04 MPP_05
GPIO_03 55 NC
GPIO_04 19 NC
GPIO_05 14
BB_BUA_SIM
MPP_06
GPIO_06 25 NC
IN 30 52 IN 35
33 32 31 IN
RADIO_PMIC
Y3301_RF
19.2MHZ-10PPM-7PF-80OHM
2.0X1.6-SM
1
3 32 XTAL19M_IN
U_PMICRF
4
2
XTAL19M_OUT
34 IN XO_OUT_D0_EN
RADIO_PMIC
R3308_RF
PP_LDO3 1100K2 XO_THERM_Y1
1%
1/32W MF
01005
RADIO_PMIC
1 C3301_RF
1
PM8019
BGA
SYM 2 OF 5
90 XTAL_19M_IN
84 XTAL_19M_OUT
CLOCK
73 GND_XO
XO_OUT_A0 64 50_A0_PMCLK
XO_OUT_A1 67 REF_CLK_FROM_BB SLEEP_CLK 80 SLEEP_CLK_32K
RADIO_PMIC
C3303_RF 1000PF
12
RADIO_PMIC
R3309_RF
100
1
2
OUT OUT
50_PMIC_RF_CLK
10% 6.33V0 52
1% MF 1/32W01005
X5R-CERM
01005
34
50_RF_CLK OUT
RADIO_PMIC
1 C3302_RF
18PF
5%
C
79 XO_OUT_D0_EN
XO_OUT_D0 78 MDM_CLK
OUT 30 34
2
16V CERM
01005
57 XO_THERM 46 GND_XOADC
PA_THERM1
42 NC
PA_THERM2 32
PA_CTL_QFE 39
NOSTUFF
BATT_ID_THERM 37
1000PF
10%
2
6.3V X5R-CERM
01005
R3310_RF
100KOHM-1%
01005
2
RADIO_PMIC NOSTUFF
PP_LDO3 31 32 33
1 RADIO_PMIC R3311_RF
100K
1% 1/32W MF 2 01005
DEFAULT CONFIGURATION
VINYL
32
B SUPPORTS VINYL
1 RADIO_PMIC R3312_RF
100K
1% 1/32W MF 2 01005 NOSTUFF
30 29 IN 34 IN
RADIO_PMIC
R3301_RF
BB_RST_L 11.00K2
29 30
IN
RADIO_ON_L
70 31
1% MF
1/32W0R1A0D0I5O_PMIC R3307_RF34 30 OUT
PMIC_RESOUT_L
75
PS_HOLD 120.0K2
30 PS_HOLD_PMIC 65
5% MF 1/32W0100530 29
IN
RF_PMIC_RESET_L20
34 30 BI SPMI_CLK
81
34 30 BI SPMI_DATA
76
CBL_PWR* PON_TRIG PON_RST* PS_HOLD RESIN* SPMI_CLK SPMI_DATA
U_PMICRF
PM8019
BGA SYM 1 OF 5
CONTROL
OPT 66 NC GND 89
GND 56 GND 45
B
U_PMICRF
PM8019
BGA
SYM 3 OF 5 5 GND_S1 87 GND_S2 INPUT_PWR 63 GND_S3 17 GND_S4
GND 36 GND 40 GND 41 GND 50 GND 51 GND 60 GND 61 GND 69
A
A
BASEBAND PAGE TITLE PMU (2 OF 2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
33
SHEET
32
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
BASEBAND (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C538 R500 L500 U502
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
BGA
(EBI1 PAD)
D
33 31 IN PP_LDO10
(MSM COREJ)15 K14 K15
VDD_CORE VDD_CORE VDD_CORE
SYM 5 OF 6 PWR
VDD_P1 F19 VDD_P1 L19 VDD_P1 L20
PP_LDO9
IN 31 33
L13 VDD_CORE
VDD_P1 M1
L14 VDD_CORE
VDD_P1 T19
M8 M9 M12
VDD_CORE VDD_CORE VDD_CORE
VDD_P2 B20(SDC1 PPAPD_)LDO13 VDD_P3 B2 (GENIO PPPA_DL)DO11
IN 31 33 50 IN 30 31 33 34 35 37 38 39
M13 VDD_CORE
VDD_P3 J19
N7 VDD_CORE
VDD_P3 K2
N8 VDD_CORE
VDD_P3 V2
N11 VDD_CORE N12 VDD_CORE
VDD_P3 V5 VDD_P3 V19
P7 P10 P11
VDD_CORE VDD_CORE VDD_CORE
VDD_P4 R19 VDD_P5 U19
PP_LDO6 PP_LDO5
IN (UIM1 PAD) IN (UIM2 PAD)
33 31 IN PP_LDO12
(MSM MEMOER1Y5) VDD_MEM F8 VDD_MEM
F9 VDD_MEM
F15 VDD_MEM
G8 VDD_MEM
K10 VDD_MEM
L9 VDD_MEM
L10 VDD_MEM
N15 VDD_MEM
P14 VDD_MEM
P15 VDD_MEM
C
R7 VDD_MEM R8 VDD_MEM
33 31 30 IN
E5 VDD_MEM
VREG_SMP(SM1O_D0EVM90SUB SYSFT6EMV)DD_MODEM F7 VDD_MODEM
F10 VDD_MODEM F11 VDD_MODEM
VDD_P6 V9 (HSIC PPAPD_)LDO9
VREF_SDC A19 VREF_UIM U20
VDDPX_BIAS
VDD_USB_CORE V13
PP_LDO12
VDD_USB_1P8 U11
PP_LDO2
VDD_USB_3P3 V10
PP_LDO4
VDD_A2 C12 VDD_A2 C9
PP_LDO7
VDD_A2 B12 VDD_A1 B9 VDD_A2 C6
VDD_A1 B6
PP_LDO1
VDD_A1 B15
PP_LDO1
VDD_PLL U13 VDD_PLL R12
PP_LDO10
IN 31 33 IN 32 33 IN 31 33 IN 31 33 IN 31 IN 31 33 35
IN 31 33 37 38
IN 31 33 37 38 IN 31 33
G6 G9 G10 G13 G14 G15
VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM
VDD_PLL D17 VDD_PLL2 E16
PP_LDO3
VDD_ALWAYS_ON
T17 NC
VDD_DDR_CORE_1P8 J20(LPDDR2P)P_LDO11
VDD_DDR_CORE_1P8 K1
IN 31 32 33 IN 30 31 33 34 35 37 38 39
H8 H9 H12 H13 J7 J8 J11
VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM
VDD_DDR_CORE_1P2 E20(LPDDR2P_PC_OLRDEO)9 VDD_DDR_CORE_1P2 H1 VDD_DDR_CORE_1P2 P1 VDD_DDR_CORE_1P2 P20
VDD_QFPROM_PRG W8 (QFUSE PPPR_OLGDROA3MMING)
IN 31 33 IN 31 32 33
J12 VDD_MODEM K6 VDD_MODEM
K7 VDD_MODEM K11 VDD_MODEM
L6 VDD_MODEM
B
RADIO_BB
D
U_BB_RF
ASIC-MDM9625M-333P
A2 GND A20 GND C14 GND
BGA
SYM 6 OF 6 GND
GND M10 GND M11 GND M14
C20 GND
GND M15
E14 GND
GND M20
F12 GND
GND N1
F13 GND
GND N6
F14 GND
GND N9
F20 GND
GND N10
G7 GND
GND N13
G11 GND
GND N14
G12 GND
GND P6
H6 GND
GND P8
H7 GND
GND P9
H10 GND
GND P12
H11 GND
GND R20
H14 GND
GND T20
H15 GND
GND V20
J1 GND
GND W1
J6 GND
GND W5
J9 GND
GND W9
J10 GND
GND W20
J13 GND
GND W12
J14 GND K8 GND
GND A12 GND A6
C
K9 GND
GND E12
K12 GND
GND E9
K13 GND
GND A9
K19 GND
GND E6
K20 GND
GND A17
L1 GND
GND C17
L7 GND
GND B17
L8 GND
GND P13
L11 GND
GND R13
L12 GND
GND R14
L15 GND M6 GND
GND A15
M7 GND
B
(MSM CORE)
33
RADIO_BB 31 IN
PP_LDO10
RADIO_BB
1 C3401_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3404_RF
2.2UF
20%
2
4V X5R-CERM
0201
(MSM MEMORY)
33
RADIO_BB 31 IN
PP_LDO12
RADIO_BB
1 C3402_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3405_RF
2.2UF
20%
2
4V X5R-CERM
0201
(MODEM SUB SYSTEM)
33
31
RADIO_BB 30 IN
VREG_SMPS1_0V90
RADIO_BB
RADIO_BB
1 C3403_RF 1 C3406_RF
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3407_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3408_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3409_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3410_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3411_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3412_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3413_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3414_RF
2.2UF
20%
2
4V X5R-CERM
0201
RADIO_BB
1 C3415_RF
2.2UF
20%
2
4V X5R-CERM
0201
(EBI1 PAD)
RADIO_BB
33
RADIO_BB 31 IN
PP_LDO9
RADIO_BB
1 C3416_RF
1 C3419_RF
2.2UF
2.2UF
20%
2
4V X5R-CERM
20%
2
4V X5R-CERM
0201
0201
(HSIC PAD)
(USB
33
RADIO_BB 31 IN
PP_LDO9
RADIO_BB
33
RADIO_BB 31 IN
PP_LDO2
RADIO_BB
1 C3422_RF
1 C3424_RF
2.2UF
2.2UF
20%
2
4V X5R-CERM
20%
2
4V X5R-CERM
0201
0201
1.8V)
RADIO_BB
1 C3427_RF
2.2UF
20%
2
4V X5R-CERM
0201
(GPS
38
37
33
RADIO_BB 31 IN
PP_LDO1
RADIO_BB
1 C3430_RF
0.1UF
20%
2
4V X5R
01005
NOSTUFF
ADC)
(LPDDR2)
PP_LDO11 RADIO_BB
38 37 35 34 33 31 30
RADIO_BB
39
IN
RADIO_BB
1 C3432_RF
1 C3435_RF
2.2UF
2.2UF
20%
2
4V X5R-CERM
20%
2
4V X5R-CERM
0201
0201
(SDC1 PAD)
50
33
RADIO_BB 31 IN
PP_LDO13
NOSTUFF
RADIO_BB
RADIO_BB
1 C3417_RF
1 C3420_RF
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
(SDC/UIM)
(COMBO DAC/BBRX)
(PLL)
(LPDDR2 CORE)
33
RADIO_BB 32 IN
VDDPX_BIAS
35
33
RADIO_BB 31 IN
PP_LDO7
RADIO_BB
RADIO_BB
33
RADIO_BB 31 IN
PP_LDO10
RADIO_BB
33
RADIO_BB 31 IN
PP_LDO9
RADIO_BB
RADIO_BB
1 C3425_RF
1 C3428_RF 1 C3431_RF
1 C3433_RF
1 C3436_RF
0.1UF
20%
2
4V X5R
01005
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
NOSTUFF
NOSTUFF
NOSTUFF
RADIO_BB
1 C3438_RF
2.2UF
20%
2
4V X5R-CERM
0201
(GENIO PAD)
PP_LDO11 RADIO_BB
38 37 35 34 33 31 30
RADIO_BB
39
IN
RADIO_BB
1 C3418_RF
1 C3421_RF
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
(USB
33
RADIO_BB 31 IN
PP_LDO12
RADIO_BB
1 C3423_RF
2.2UF
20%
2
4V X5R-CERM
0201
CORE)
(BBRX)
38
37
33
RADIO_BB 31 IN
PP_LDO1
RADIO_BB
RADIO_BB
1 C3426_RF
1 C3429_RF
2.2UF
20%
2
4V X5R-CERM
0201
2.2UF
20%
2
4V X5R-CERM
0201
(PLL)
(QFUSE)
33
32
RADIO_BB 31 IN
PP_LDO3
33
32
RADIO_BB 31 IN
PP_LDO3
RADIO_BB
RADIO_BB
1 C3434_RF
1 C3437_RF
2.2UF
2.2UF
20%
2
4V X5R-CERM
0201
20%
2
4V X5R-CERM
0201
NOSTUFF
A
A
BASEBAND PAGE TITLE (1 OF 2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
34
SHEET
33
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
BASEBAND (2 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
39 38 37 35 34 33 31 30
PP_LDO11
A2
35 34 BB_SWD_ENABLE 34 30 29 90_BB_USB_P
34 30 BB_JTAG_TCK
VP
B2 IN1
IN2 C1
U_JTAGRF
TS5A2066
B1 COM1 BGA COM2 C2
A1 NO1
D1
NO2 D2 GND
RADIO_SIMCARD
BB_SWD_ENABLE 34 35 90_BB_USB_N 29 30 34 BB_JTAG_TMS 30 34
2
1
C600
R606
L600
U602
D
PP_LDO11 30 31 33 34 35 37 38 39
RADIO_BB
R3509_RF1
C
10K
1% 1/32W
C
MF
010052
NOSTUFF
DSDS_SIM_DETECT 30 34
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
32 30 IN 30 IN 32 IN
34 30 IN 30 IN
34 30 IN 30 IN
34 32 30 IN 32 OUT
34 30
30 29 IN
PMIC_RESOUT_L BB_JTAG_RST_L SLEEP_CLK_32K
W14 N2
W17
BB_JTAG_TCK
R2
BB_JTAG_TDI
P3
BB_JTAG_TMS
P2
BB_JTAG_TRST_L
T4
MDM_CLK XO_OUT_D0_EN
R11 NC R9 NC
W19 V18
DSDS_SIM_DETECT N19
BB_USB_VBUS
B19 NCC19 NC
U12
RESIN* SRST* SLEEP_CLK
TCK TDI TMS TRST*
MODE_0 MODE_1
CXO CXO_EN
UIM1_DETECT
SDC1_CMD SDC1_CLK
USB_HS_VBUS
BGA
SYM 1 OF 6 DIGITAL
RESOUT* PS_HOLD
TDO
PMIC_SPMI_DATA PMIC_SPMI_CLK
HSIC_CAL HSIC_DATA HSIC_STROBE
UIM1_RESET UIM1_CLK
UIM1_DATA
SDC1_DATA_3 SDC1_DATA_2 SDC1_DATA_1 SDC1_DATA_0
V17 W18NC PS_HOLD
OUT 32
P5
BB_JTAG_TDO
OUT 30
W15 SPMI_DATA V15 SPMI_CLK
BI 30 32 BI 30 32
U9
BB_HSIC_CAL
U10 50_BB_HSIC_DATA BI 29 30 R10 50_BB_HSIC_STROBE BI 29 30
M19 DSDS_SIM_RESET N18 DSDS_SIM_CLK P19 DSDS_SIM_DATA
OUT 30 54 OUT 30 54
BI 30 54
B18 A18NC D20NC D19NC
NC
1RR3A5D02I_OR_FBB
240
1% 1/32W MF 201005
RADIO_BB
R3505_RF 1 240 2 EBI1_CAL R1
1% MF 1/32W01005
BDM_ZQG1
RADIO_BB R3506_RF 1 240 2
1% MF 1/32W01005
F18 NCF16 NCG20 NCG19 NCG18 NCG16 NC
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
BGA
EBI1_CAL
SYM 2 OF 6
EBI1_VREF N20
EBI1_ZQ
EBI1_EBI2
EBI1_VREF M5 EBI1_VREF R16
EBI2_CS* EBI2_CLE* EBI2_ALE* EBI2_WE* EBI2_OE* EBI2_BUSY*
EBI2_AD_7 EBI2_AD_6 EBI2_AD_5 EBI2_AD_4 EBI2_AD_3 EBI2_AD_2 EBI2_AD_1 EBI2_AD_0
H20 H19NC H18NC H16NC J18NC K18NC J16NC K16NC
NC
MDM_VREF_LPDDRI2N 31 34
B
34 32 30 MDM_CLK
V12 NCW13
USB_HS_ID USB_HS_SYSCLK
USB_HS_DP USB_HS_DM USB_HS_REXT
V11 W11 W10
90_BB_USB_P 90_BB_USB_N BB_USB_TRXTUNE
BI 29 30 34 BI 29 30 34
B
PP_LDO11 30 31 33 34 35 37 38 39
1RR3A5D01I_OR_FBB
200
1% 1/32W MF 201005 PP_LDO11 30 31 33 34 35 37 38 39
MDM_VREF_LPDDR2 31 34
1 C3501_RF
1.0UF
20%
2
6.3V X5R
0201-1
A1
VCC
1
1
35 34
U_EEP_RF
CAT24C08C4A
BB_EEPROM_SCBL1 SCL WLCSP SDA B2
BB_EEPROM_SDA 34 35
R3507_RF
10K
1% 1/32W MF
R3508_RF
10K
1% 1/32W MF
201005
201005
VSS
35 34 BB_EEPROM_SCL
A2
A
35 34 BB_EEPROM_SDA
A
BASEBAND PAGE TITLE (1 OF 2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
35
SHEET
34
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
BASEBAND (3 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C704
R700
L700
U702
D
PP_LDO11 30 31 33 34 35 37 38 39
RADIO_BB
R3601_RF1
RADIO_BB
10K 1%
U_BB_RF
ASIC-MDM9625M-333P
1/32W MF
BGA
010052
30 OUT BB_SIM_DATA
R18 GPIO_0
SYM 3 OF 6
GPIO_38 H5 GSM_TXBURST_IND OUT 29
RADIO_BB
BB_SIM_DETECT 30 35 30
35
IN
30 IN
BB_SIM_DETECT BB_SIM_RESET
U18 GPIO_1 T18 GPIO_2
GPIO
BLSP1
GPIO_39 GPIO_40
H2 H3 NC
CTRL_FWD_REV
BB_IPC_GPIO1 OUT 29
U_BB_RF
ASIC-MDM9625M-333P
BGA
36 IN 36 IN
WTR_BB_PRX_I_P E11 BBRX_IP_CH0 WTR_BB_PRX_I_N C11 BBRX_IM_CH0
SYM 4 OF 6 TX_DAC0_IREF C13 WTR_TX_IDAC
ANALOG
TX_DAC0_VREF E13 VREF_DAC_BIAS
OUT 35 36
32 35
36 IN
WTR_BB_PRX_Q_P E10 BBRX_QP_CH0
TX_DAC0_IP A14 WTR_BB_TX_I_P
OUT 36
36 IN
WTR_BB_PRX_Q_N C10 BBRX_QM_CH0
TX_DAC0_IM B14 WTR_BB_TX_I_N
OUT 36
36 IN 36 IN
WTR_BB_DRX_I_P B11 BBRX_IP_CH1 WTR_BB_DRX_I_N A11 BBRX_IM_CH1
TX_DAC0_QP B13 WTR_BB_TX_Q_P TX_DAC0_QM A13 WTR_BB_TX_Q_N
OUT 36 OUT 36
36 IN
WTR_BB_DRX_Q_P B10 BBRX_QP_CH1
TX_DAC1_IREF C8 PP_LDO7
31 33 35
C
36 IN
WTR_BB_DRX_Q_N A10 BBRX_QM_CH1
TX_DAC1_VREF E8
38 IN
WFR_BB_PRX_I_P
B5 BBRX_IP_CH2
TX_DAC1_IP A8
38 IN
WFR_BB_PRX_I_N
A5 BBRX_IM_CH2
TX_DAC1_IM B8
38 IN 38 IN
WFR_BB_PRX_Q_P WFR_BB_PRX_Q_N
B4 BBRX_QP_CH2 A4 BBRX_QM_CH2
TX_DAC1_QP A7 TX_DAC1_QM B7
38 IN 38 IN 38 IN 38 IN
36 IN 36 IN 36 IN 36 IN
WFR_BB_DRX_I_P WFR_BB_DRX_I_N WFR_BB_DRX_Q_P WFR_BB_DRX_Q_N
WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N
C4 C5 B3 A3
C15 C16 B16 A16
BBRX_IP_CH3 BBRX_IM_CH3 BBRX_QP_CH3 BBRX_QM_CH3
GNSS_BB_IP GNSS_BB_IM GNSS_BB_QP GNSS_BB_QM
ET_DAC_M C7 ET_DAC_P E7
ET_DAC_N ET_DAC_P
DNC DNC DNC DNC
V16 W16NC D4 NC C3 NC
NC
OUT 39 OUT 39
30 30 29 30 29 30 29 30 29
OUT OUT IN IN OUT
30 29 30 29 30 29
29
OUT IN OUT OUT
BB_SIM_CLK BB_UART_TXD BB_UART_RXD BB_UART_CTS_L BB_UART_RTS_L
BB_I2S_WS BB_I2S_RXD BB_I2S_TXD BB_I2S_CLK
P18 U15 U14 V14 U16
U3 NC U4 NC W2 NC V3 NC V7
V6 W7 U8
GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15
BLSP2 GRFC BLSP3 BLSP4
GPIO_41 GPIO_42 GPIO_43 GPIO_44 GPIO_45 GPIO_46 GPIO_47 GPIO_48 GPIO_49 GPIO_50 GPIO_51 GPIO_52
G3 G2 NC F1 NC F2 NC D3 NC C1 NC
UAT_SELECT LAT_SELECT BB_UAT_GPIO0 BB_UAT_GPIO1 BB_UAT_GPIO3
G5 NC
F3 NC
E3 NC F5 NC
WLAN_TX_BLANK
N5 NC
N3 NC BB_COEX_UART_TXD OUT
30 51
GPIO_53 T3 BB_COEX_UART_RXD IN 30 51
C
30 29 OUT 30 29 IN
34 BI
BB_OTHER_TXD BB_OTHER_RXD BB_EEPROM_SDA
M18 NCM16 NCN16 NCL16 NCD18
C18 E19
GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22
BLSP5 SSBI BLSP6
GPIO_54 E2 WTR_SSBI_TX_GPS OUT 36
GPIO_55 D1 WTR_SSBI_PRX_DRX IN 36
GPIO_56 GPIO_57
D2 E1 NC WFR_SSBI
OUT 38
GPIO_58 GPIO_59
T1 R6
NC
BB_DEBUG_SYNC (DEV)
GSM_TX_PHASE_D1
OUT 36
GPIO_60 R3 GSM_TX_PHASE_D0 OUT 36
34 BI
BB_EEPROM_SCL
E18 GPIO_23
GPIO_61 U7 BB_CORE_DUMP
IN 29 30
30 29 OUT BB_RESET_DET_L P16 GPIO_24
GPIO_62 V8 BB_DEBUG_STATUS OUT 30
29 IN AP_WAKE_MODEM L18 GPIO_25
GPIO_63 W4 BB_DEBUG_ERROR OUT 30
29 OUT BB_LAT_GPIO0
L5 GPIO_26
GPIO_64 W3 BB_SWD_ENABLE
OUT 34
29 OUT
BB_LAT_GPIO1
BB_LAT_GPIO2
M3 NC K3
GPIO_27 GPIO_28
GPIO_65 U6 GPIO_66 T2
BB_IPC_GPIO BB_HOST_RDY
BI 29 IN 29 30
29 OUT BB_LAT_GPIO3
L3 GPIO_29
GPIO_67 R15 BB_WAKE_HOST_L OUT 29 30
29 OUT BB_LAT_GPIO4
M2 GPIO_30
GPIO_68 V4 BB_DEVICE_RDY
OUT 29 30
30 IN
BB_LAT_GPIO5
K5 NC B1
NC C2
NC WATCHDOG_DISABLE
J5
GPIO_31 GPIO_32 GPIO_33 GPIO_34
GRFC
GPIO_69 U17 BB_BUA_SIM
GPIO_70 V1 BB_GPS_SYNC
GPIO_71 GPIO_72
W6 U2 NC RFFE2_DATA
IN 32 OUT 29 30
BI 30 35 45 46 48
30 IN 30 IN
BOOT_HSIC BOOT_HSIC_USB
L2 GPIO_35 J3 GPIO_36
RFFE
GPIO_73 U5 GPIO_74 U1
RFFE2_CLK RFFE1_DATA
BI 30 35 45 46 48 BI 30 39 40 41 42 43 44
J2 NC
GPIO_37
GPIO_75 R5 RFFE1_CLK
BI 30 39 40 41 42 43 44
WTR_TX_IDAC
36 35
35 32 VREF_DAC_BIAS
B
RADIO_BB 1 C3601_RF
RADIO_BB RADIO_BB 1 C3603_RF 1 C3604_RF
B
0.1UF
2200PF 2200PF
10%
10%
10%
2
6.3V X7R
2
6.3V X5R-CERM
2
6.3V X5R-CERM
0201
01005
01005
35 33 31 PP_LDO7
NOSTUFF
48 46 45 35 30 48 46 45 44 43 41 40 35 53
RFFE2_CLK
U_BUFFER
RF5129
BGA
A1 SCLK
SDATA A2 RFFE2_DATA
RFFE_VIO
A3 VIO SDATA_A B2 RFFE2_DATA_BUFFER
RFFE2_CLK_BUFFERB3 SCLK_A
30 35 45 46 48 53
B1 GND
A
8
7
6
5
39 38 37 35 34 33 31 30
PP_LDO11
R3602_RF
0.00
1
2
1% 1/20W
MF 0201
RFFE_VIO 35 40 41 43 44 45 46 48
VOLTAGE=1.80V
RFFE2_DATA
1 C3602_RF
22PF
5%
2
16V CERM
01005
4
3
A
MOBILE PAGE TITLE DATA MODEM (2 OF 2)
Apple Inc.
R
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
36
SHEET
35
OF OF
55 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
2
1
C802
R802
L800
U803
D
LB1 LB2 LB3 LB4 MB1 MB2 MB3 HB1 HB2 HB3 HBMB4
DC DC DC DC NO DC DC DC NO DC DC DC NO DC
C
42 42 42 41
38 OUT 38 IN
45 47 47 46 46 46 44
50_B8_PRX_WTR_IN
102 PRX_LB1_IN
50_B20_PRX_WTR_IN
92 PRX_LB2_IN
50_B26_PRX_WTR_IN
73 PRX_LB3_IN
50_B13_B17_B28_B29_PRX_65WTRP_RXI_NLB4_IN
50_WFR_PRX_LB_CA_IN 91 PRX_LB_CA_OUT
50_WFR_PRX_MB_CA_OUT 50 PRX_MB_CA_IN
50_B34_B39_PRX_WTR_IN 51 PRX_MB1_IN
50_DCS_WTR_IN
43 PRX_MB2_IN
50_PCS_WTR_IN
27 PRX_MB3_IN
50_B40A_PRX_WTR_IN
19 PRX_HMB4_IN
50_B40B_B38X_PRX_WTR_IN9 PRX_HB1_IN
50_B41A_PRX_WTR_IN
17 PRX_HB2_IN
50_B7_PRX_WTR_IN
18 PRX_HB3_IN
33 NC
PRX_HB_CA_OUT
U_WTR_RF
WTR1625
BGA
SYM 1 OF 5
PRX_BB_IP PRX_BB_IM PRX_BB_QP PRX_BB_QM
99 108 107 97
WTR_BB_PRX_I_P WTR_BB_PRX_I_N WTR_BB_PRX_Q_P WTR_BB_PRX_Q_N
OUT 35 OUT 35 OUT 35 OUT 35
LB1 LB2 LB3 LB4 MB1 MB2 MB3 HB1 HB2 HB3 HBMB4
DC DC DC DC NO DC DC DC NO DC DC DC NO DC
47 47 47 47
38 OUT 38 IN
47 47
47 47 47 47
49 49
50_B8_B28B_DRX_WTR_IN
5 DRX_LB1_IN
50_B13_B17_DRX_WTR_IN 15 DRX_LB2_IN
50_B26_B28A_DRX_WTR_IN 16 DRX_LB3_IN
50_B20_B29_DRX_WTR_IN
7 DRX_LB4_IN
50_WFR_DRX_LB_CA_IN
32 DRX_LB_CA_OUT
50_WFR_DRX_MB_CA_OUT 50_B34_DRX_WTR_IN
29 DRX_MB_CA_IN 28 DRX_MB1_IN
50_B39_DRX_WTR_IN
20 DRX_MB2_IN
50_B40_DRX_WTR_IN 50_B38X_DRX_WTR_IN
NC 1 DRX_MB3_IN
2 DRX_HMB4_IN 4 DRX_HB1_IN
50_B41A_DRX_WTR_IN
12 DRX_HB2_IN
50_B7_DRX_WTR_IN
13 DRX_HB3_IN
100_GPS_WTR_IN_P 100_GPS_WTR_IN_N
30 NC
36 44
DRX_HB_CA_OUT
GNSS_RF_INP GNSS_RF_INM
U_WTR_RF
WTR1625
BGA
SYM 2 OF 5
D
DRX_BB_IP 76 DRX_BB_IM 86 DRX_BB_QP 61 DRX_BB_QM 68
WTR_BB_DRX_I_P WTR_BB_DRX_I_N WTR_BB_DRX_Q_P WTR_BB_DRX_Q_N
GNSS_BB_IP 60 GNSS_BB_IM 53 GNSS_BB_QP 67 GNSS_BB_QM 85
WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N
DNC 37 NC
RADIO_WTR OUT RADIO_WTR OUT RADIO_WTR OUT RADIO_WTR
OUT 35
RADIO_WTR OUT RADIO_WTR OUT RADIO_WTR OUT RADIO_WTR
OUT 35
C
B
A 8
35 WTR_BB_TX_I_P 35 WTR_BB_TX_I_N 35 WTR_BB_TX_Q_P 35 WTR_BB_TX_Q_N
WTR_TX_IDAC
35
151 160 152 161 127
TX_BB_IP TX_BB_IM TX_BB_QP TX_BB_QM DAC_REF
U_WTR_RF
WTR1625
BGA
SYM 3 OF 5
35
GSM_TX_PHASE_D0 123 GP_DATA0
35
GSM_TX_PHASE_D1 104 GP_DATA1
RADIO_WTR
141 GND
R3702_RF
4.75K
1
2
WTR_RTUNE
94 GND 71 RTUNE
1% 1/32W
MF 01005
35 WTR_SSBI_TX_GPS 35 WTR_SSBI_PRX_DRX
140 GND
55 118 105
95
GND GND SSBI_TX_GNSS SSBI_PRX_DRX
156 GND
131 XO_IN
TX_LB1_OUT
162 NC
TX_LB2_OUT 153
TX_LB3_OUT 163
TX_LB4_OUT 154
TX_MB1_OUT 146
TX_MB2_OUT 138
TX_MB3_OUT 139
TX_MB4_OUT
155 NC
TX_HB1_OUT 130
TX_HB2_OUT 121
ADC_IN 109
PDET_RFFB 117
GND 122
38 32
50_RF_CLK
RADIO_WTR
1 C3702_RF
100PF
5%
2
10V NP0-C0G
01005
NOSTUFF
RF_CLK IS SHARED BETWEEN WTR AND WFR. LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.
7
6
5
4
50_LB_2G_WTR_TX_OUT 40 50_B8_B26_B20_WTR_TX_OUT 42 50_B13_B17_B28_WTR_TX_OUT 41
50_B3_B4_WTR_TX_OUT 43 50_HB_2G_WTR_TX_OUT 40 50_B1_B25_B34_B39_WTR_TX_OUT 43
B
50_B7_WTR_TX_OUT
44
50_B40_B38_B41_WTR_TX_OUT 44
50_FWD_OR_REV_RF
45
A
RFPAGE TITTLE RANSCEIVER (1 0F 3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
37 OF 55
SHEET
36 OF 54
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
WTR TRANSCEIVER (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
38 31 PP_LDO8
MAKE_BASE=TRUE
33 31 PP_LDO1
38 MAKE_BASE=TRUE
38 37 VREG_2V
D
VREG_2V 37 38 VREG_1P3V 37 38
MAKE_BASE=TRUE
RADIO_WTR
1
RADIO_WTR C3801_RF
10UF
20%
2
6.3V
CERM-X5R
0402
WTR DECOUPLING CAPS
L3801_RF
22NH-3%-0.25A
VDD_DRX_BB_2V 37 38 37 VREG_1P3V
MAKE_BASE=TRUE
RADIO_WTR
1 C3812_RF
100PF
5%
2
10V NP0-C0G
01005
NOSTUFF
WTR DECOUPLING SHARED WITH C3808_RF
1
2 VDD_PRX_PLL_1P3V 37 VREG_1P3V
0201 RADIO_WTR
RADIO_WTR
1 C3820_RF
0.1UF
20%
2
4V X5R
01005
NOSTUFF
MAKE_BASE=TRUE
1
RADIO_WTR C3808_RF
10UF
20%
2
6.3V
CERM-X5R
0402
VDD_TX_DA_2V 37
RADIO_WTR
1 C3813_RF
100PF
5%
2
10V NP0-C0G
01005
RADIO_WTR RADIO_WTR
MAKE_BASE=TRUE
VDD_PRX_BB_2V 37
VDD_TX_BBF_2V 37
RADIO_WTR
1 C3814_RF
100PF
5%
2
10V NP0-C0G
01005
NOSTUFF
R3801_RF
0.00
1
2
VDD_PRX_VCO_2V 37
1%
RADIO_WTR
C
1/20W MF
0201
1 C3815_RF
0.1UF
20%
2
4V X5R
01005
R3802_RF
0.00
1
2
VDD_SHDR_VCO_2V
37
1% 1/20W
MF 0201
RADIO_WTR
1 C3816_RF
0.1UF
20%
2
4V X5R
01005
VDD_SHDR_PLL_1P3V 37
RADIO_WTR
1 C3821_RF
0.1UF
20%
2
4V X5R
01005
VDD_PRX_HBMB_1P3V 37
VDD_SHDR_VCO_1P3V
RADIO_WTR
1 C3823_RF
0.1UF
20%
2
4V X5R
01005
VDD_PRX_VCO_1P3V 37 DELETED C3805 PR REVIEW FEEDBACK
VDD_PRX_LO_HB_1P3V 37
RADIO_WTR
1 C3830_RF
0.1UF
20%
2
4V X5R
01005
37
VDD_PRX_VCO_1P3V
90 VDD_RF1_P_VCO
37 VDD_PRX_VCO_2V
80 VDD_RF2_P_VCO
VDD_DRX_LB_1P3V 37
37 VDD_PRX_LO_HB_1P3V25 VDD_RF1_P_HB_LO
37 VDD_PRX_LB_1P3V 72 VDD_RF1_P_LB
37 VDD_PRX_HBMB_1P3V 34 VDD_RF1_P_HMB
37 VDD_PRX_LO_HBMB_1P357V VDD_RF1_P_HMB_LO
37 VDD_PRX_PLL_1P3V 79 VDD_RF1_P_PLL
VDD_PRX_LB_1P3V 37
37 VDD_PRX_BB_2V 37 VDD_PRX_2V
98 VDD_RF2_P_BB 100 VDD_RF2_P_RX
37 VDD_DRX_LO1_1P3V 14 VDD_RF1_D_LB_LO
37 VDD_DRX_LO2_1P3V 38 VDD_RF1_D_LOM
37 VDD_DRX_LB_1P3V 31 VDD_RF1_D_LB
37 VDD_DRX_HB_1P3V 22 VDD_RF1_D_HB
VDD_DRX_LO2_1P3V 37
37
RADIO_WTR
1 C3833_RF
0.1UF 37
20%
2
4V X5R
37
01005
37
VDD_DRX_MB_1P3V 11
VDD_DRX_BB_2V
54
VDD_SHDR_VCO_1P3V 48
VDD_SHDR_VCO_2V 62
VDD_SHDR_PLL_1P3V 78
VDD_RF1_D_MB VDD_RF2_D_BB VDD_RF1_S_VCO VDD_RF2_S_VCO VDD_RF1_S_PLL
VDD_DRX_LO1_1P3V 37
RADIO_WTR
1 C3809_RF
0.1UF
20%
2
4V X5R
01005
2
U_WTR_RF
WTR1625
BGA SYM 4 OF 5
1
C934 R926 L3802_RF U902
D
VDD_RF2_T_DA 129 VDD_RF1_T_DA 137 VDD_RF1_T_UPC 136 VDD_RF1_T_LO 135 VDD_RF2_T_BB 126 VDD_RF2_FBRX 116 VDD_RF2_T_VCO 157 VDD_RF1_T_VCO 149 VDD_RF1_T_SYN 115 VDD_RF2_T_PLL 114 VDD_RF1_G_LNA 52 VDD_RF1_G_VCO 74 VDD_RF1_G_PLL 93 VDD_RF1_G_BB 59
GND 113 VDD_RF2_XO 147
VDD_DIO 103
VDD_TX_DA_2V VDD_TX_DA_1P3V VDD_TX_UPC_1P3V VDD_TX_LO_1P3V VDD_TX_BBF_2V VDD_FBRX_2V VDD_TX_VCO_2V VDD_TX_VCO_1P3V VDD_TX_SYNTH_1P3V VDD_TX_PLL_2V VDD_GPS_LNA_1P3V VDD_GPS_VCO_1P3V VDD_GPS_PLL_1P3V VDD_GPS_BB_1P3V
VDD_XO_2V VDD_MSM_1P8V
37 37 37 37 37 37 37 37 37 37 37 37 37
C
37 37
B
A
38 35 34 33 31 30 39
PP_LDO11
MAKE_BASE=TRUE
R3803_RF
0.00
1
2
VDD_TX_VCO_2V 37
1% 1/20W
MF 0201
RADIO_WTR
1 C3817_RF
0.1UF
20%
2
4V X5R
01005
VDD_TX_PLL_2V 37
RADIO_WTR
1 C3802_RF
0.1UF
20%
2
4V X5R
01005
NOSTUFF
R3808_RF
0.00
1
2
0% 1/32W
MF 01005
VDD_XO_2V 37
RADIO_WTR
1 C3803_RF
0.1UF
10%
2
10V X5R-CERM
0201
I175
VDD_FBRX_2V 37
VDD_PRX_2V 37
RADIO_WTR
1 C3818_RF
0.1UF
20%
2
4V X5R
01005
VDD_MSM_1P8V 37
RADIO_WTR RADIO_WTR
1 C3811_RF
1.0UF
10%
2
6.3V X5R-CERM
0201-1
1 C3819_RF
0.1UF
20%
2
4V X5R
01005
NOSTUFF
8
7
VDD_PRX_LO_HBMB_1P3V 37
RADIO_WTR
1 C3806_RF
0.1UF
20%
2
4V X5R
01005
VDD_TX_SYNTH_1P3V 37
RADIO_WTR
1 C3824_RF
0.1UF
20%
2
4V X5R
01005
VDD_TX_LO_1P3V 37
RADIO_WTR
1 C3825_RF
0.1UF
20%
2
4V X5R
01005
VDD_TX_UPC_1P3V 37
RADIO_WTR
1 C3826_RF
100PF
5%
2
10V NP0-C0G
01005
R3806_RF
0.00
1
2
1% 1/20W
MF 0201
VDD_TX_VCO_1P3V 37
RADIO_WTR
1 C3807_RF
0.1UF
20%
2
4V X5R
01005
L3802_RF
8.2NH-3%-0.19A-1.6OHM
1
2
01005
VDD_TX_DA_1P3V 37
RADIO_WTR
1 C3827_RF
100PF
5%
2
10V NP0-C0G
01005
NOSTUFF
6
5
VDD_DRX_MB_1P3V 37
VDD_DRX_HB_1P3V 37
RADIO_WTR 1 R3807_RF
0.00
1% 1/20W MF 20201
VDD_GPS
MAKE_BASE=TRUE
VDD_GPS_LNA_1P3V 37
RADIO_WTR
1 C3828_RF
0.1UF
20%
2
4V X5R
01005
MAKE_BASE=TRUE
VDD_GPS_BB_1P3V 37
VDD_GPS_PLL_1P3V 37
RADIO_WTR
1 C3829_RF
0.1UF
2
42RV0A%DIO_WTR X5R
01005
MAKE_BASE=TRUE
VDD_GPS_VCO_1P3V 37
4
3
89 GND 56 GND 83 GND 82 GND 58 GND
35 GND 8 GND
26 GND 64 GND 42 GND 41 GND 81 GND
21 GND 6 GND
24 GND 39 GND
10 GND 3 GND
23 GND 46 GND
49 GND 69 GND 88 GND 70 GND 63 GND 40 GND
47 GND 87 GND 77 GND 96 GND
U_WTR_RF
WTR1625
BGA
GND 111
SYM 5 OF 5
GND 101
GND 110
GND 145
GND 144
GND 143
GND 128
GND 120
GND 119 GND 106
B
GND 150
GND 134
GND 159 GND 142 GND 125 GND 124 GND 148 GND 158 GND 133 GND 112 GND 132
GND 45 GND 66 GND 84 GND 75
GND 164
A
RFPAGE TITTLE RANSCEIVER (2 OF 3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
38 OF 55
SHEET
37 OF 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
WFR TRANSCEIVER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
2
1
C1019
R1016
L1000
U1002
D
37 31 37 33 31
PP_LDO8
MAKE_BASE=TRUE
PP_LDO1
MAKE_BASE=TRUE
VREG_2V 37 38 VREG_1P3V 37 38
38 37
VREG_1P3V
MAKE_BASE=TRUE
1
RADIO_WFR C3901_RF
10UF
2
26.03%V
CERM-X5R
0402
U_WFR_RF
WFR1620
BGA
GND 1
D
VDD_DIG_1P3V 38 38 37 VREG_2V RADIO_WFR
1 C3904_RF
0.1UF
2 X24V50R% 01005
VDD_DRX_LO_1P3V 38
MAKE_BASE=TRUE
1
RADIO_WFR C3903_RF
10UF
2
62.03%V
CERM-X5R
0402
RADIO_WFR
R3903_RF
0.00
1
2 VDD_PRX_VCO_WFR_2V 38
1% 1/20W
MF 0201
RADIO_WFR 1 C3912_RF
0.1UF
2 42XV05%R 01005
VDD_XO_WFR_2V 38
MB1
DC
MB2
NO DC
MB3
DC
MB1
DC
MB2
NO DC
MB3
DC
43 50_B25_PRX_WFR_IN 43 50_B1_B4_PRX_WFR_IN 43 50_B3_PRX_WFR_IN
50_WFR_PRX_HB_CA_IN
36 IN
47 47 47
50_WFR_PRX_LB_CA_IN
50_B25_DRX_WFR_IN 50_B1_B4_DRX_WFR_IN 50_B3_DRX_WFR_IN
36RAIDN IO_5W0F_RWFR_DRX_LB_CA_IN
22 16
6
27 NC
3
49 54 66
43 NC
36
PRX_MB1_IN PRX_MB2_IN PRX_MB3_IN
PRX_HB_CA_IN
PRX_LB_CA_IN
DRX_MB1_IN DRX_MB2_IN DRX_MB3_IN
DRX_HB_CA_IN
DRX_LB_CA_IN
SYM 1 OF 2 RX_OTHER
GND 61
SSBI_PRX_DRX 13
WFR_SSBI
GND 34
PRX_MB_CA_OUT 5 50_WFR_PRX_MB_CA_OUT
DRX_MB_CA_OUT 65 50_WFR_DRX_MB_CA_OUT
PRX_BB_IP 29 WFR_BB_PRX_I_P PRX_BB_IM 28 WFR_BB_PRX_I_N PRX_BB_QP 25 WFR_BB_PRX_Q_P PRX_BB_QM 30 WFR_BB_PRX_Q_N
DRX_BB_IP 62 WFR_BB_DRX_I_P
35
OUT 36 OUT 36
35 35 35 35 35
RADIO_WFR
RADIO_WFR
RADIO_WFR
52 GND
DRX_BB_IM 63 WFR_BB_DRX_I_N
35
1 C3905_RF
0.1UF
2
42V0% X5R
01005
1 C3913_RF
0.1UF
2
42V0% X5R
01005
R3901_RF
4.75K
1
2
1% 1/32W 01M0F05
WFR_RTUNE 19 R_TUNE 7 XO_IN
DRX_BB_QP 57 WFR_BB_DRX_Q_P
35
DRX_BB_QM 64 WFR_BB_DRX_Q_N
35
C B A
8
VDD_DRX_LB_WFR_1P3V 38
36 32
50_RF_CLK
I113
VDD_DRX_MB_HB_FE_1P3V 38
RADIO_WFR 1 C3907_RF
0.1UF
2 X24V50R% 01005 NOSTUFF
I114
VDD_PRX_MBHB_FE_1P3V
RADIO_WFR
1 C3908_RF
0.1UF
2
24V0% X5R
01005
NOSTUFF
VDD_PRX_LB_FE_1P3V 38
RADIO_WFR
R3902_RF
1 0.00 2VDD_PRX_VCO_WFR_1P3V 38
1% 1/20W
MF 0201
RADIO_WFR
1 C3910_RF
0.1UF
2
42V0% X5R
01005
VDD_PRX_PLL_WFR_1P3V 38
RADIO_WFR 1 C3911_RF
0.1UF
2 X42V50R% 01005
VDD_PRX_LO_WFR_1P3V 38
RADIO_WFR
1 C3902_RF
0.1UF
2
24V0% X5R
01005
VDD1_DRX_BB_2V 38
RADIO_WFR 1 C3915_RF
0.1UF
2 42XV05%R 01005
VDD1_PRX_BB_2V 38
RADIO_WFR
1 C3916_RF
0.1UF
2
42V0% X5R
01005
39 37 35 34 33 31 30 PP_LDO11
MAKE_BASE=TRUE
VDD1_1P8V 38
RADIO_WFR
1 C3917_RF
0.1UF
2
42V0% X5R
01005
7
6
5
4
RADIO_WFR
1 C3919_RF
100PF
2
51%0V NP0-C0G
C
01005
NOSTUFF
38 VDD_PRX_VCO_WFR_2V 37 VDD_RF2_P_VCO 38 VDD_PRX_VCO_WFR_1P33V3 VDD_RF1_P_VCO
U_WFR_RF
WFR1620
BGA
SYM 2 OF 2
PWR_GND
GND 46 GND 35
38 VDD_PRX_LO_WFR_1P3V31 VDD_RF1_P_LO
GND 42
38 VDD_PRX_PLL_WFR_1P34V4 VDD_RF1_P_PLL
GND 53
38 VDD_PRX_LB_FE_1P3V 15 VDD_RF1_P_LB_FE
GND 20
38 VDD1_PRX_BB_2V
23 VDD_RF2_P_BB
GND 51
38 VDD_PRX_MBHB_FE_1P31V0 VDD_RF1_P_MHB_FE
GND 41
38 VDD_DRX_LO_1P3V
47 VDD_RF1_D_LO
GND 45
38 VDD1_DRX_BB_2V
56 VDD_RF2_D_BB
GND 50
GND 18
B
38 VDD_DRX_LB_WFR_1P3V39 VDD_RF1_D_LB_FE
GND 9
38 VDD_DRX_MB_HB_FE_1P539V VDD_RF1_D_MHB_FE
GND 11
38 VDD_DIG_1P3V
24 VDD_RF1_DIG
GND 21
14 GND
GND 32
38 VDD1_1P8V
2 VDD_DIO
GND 4
38 VDD_XO_WFR_2V
17 VDD_RF2_XO
GND 38
GND 55
GND 40
GND 60
GND 48
GND 58
GND 26
GND 8
GND 12
A
RFPAGE TITTLE RANSCEIVER (3 OF 3)
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
39 OF 55
SHEET
38 OF 54
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
QFE DCDC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
XW4001_RF
SHORT-10L-0.25MM-SM
39 31 26 23 17 16 15 14 12 10 PP_VCC_MAIN
52 51 48
1
2
NOSTUFF
VBATT_SW 39
RADIO_QPOET
L4002_RF
22-OHM-25%-1800MA
U_QPOET
QFE1100
SHOULD BE PLACED
MAX 0.25MM AWAY FROM QPOET
1 C4001_RF
48 39 31 14 12 10
10UF 26 23 17 16 15 52 51
20%
PP_VCC_MAIN 1
44 43 42 41 39 VPA_ET
0201
2 1Q4POEBYTP__BBAATTTT 10 BYP_LOAD
BGA
VDD_BATT 15 VDD_BATT 16
PP_VCC_MAIN 10 12 14 15 16 17 23 26 31 39 48 51 52
XW4002_RF
SHORT-10L-0.25MM-SM
2
6.3V CERM-X5R
1
2
04S0W2_GROUND 39
39 VBATT_SW
28 VDD_BUCK
VDD_AMP 5
APT_VINPUT 39
NOSTUFF B>O1T.H0MXMW'S TO CREATE
39
35 IN
SW_GROUND ET_DAC_P
27 GND_BUCK 7 AMP_INP
VDD_1P8 17 VSW_BUCK 2Q3POET_V1SW
1P.P5_LUDHO-111.95A30-31033.314 315 137 O38H39M PS2B25201T-SM
INDUCTANCE
35 IN
ET_DAC_N
2 AMP_INM
AMP_OUT 4
RADIO_QPOET
L4003_RF
VPA_ET 39 41 42 44 43 42 41 39
VPA_ET
44 43 42 41 40 35 30 BI
RFFE1_DATA
26 SDATA
C_BUCK 11
VPA_APT 39
43 44
VPA_APT
C
44 43 42 41 40 35 30 BI
RFFE1_CLK
21
39 31 26 23 17 16 15 14 12 10 52 51 48
32 PA_CTL_QFE
13 BST_L
PP_VCC_MAIN 1
2 20
0805
2.2UH-20%-0.7A-0.23OHM
19
SCLK MPP1 VSW_BOOST USID_LSB
(USID)
C_BUCK 12
C_SW_BUCK 8 C_SW_BUCK 9
C_GSM 6
44 40
GSM_CAP 39 GSM_CAP
RADIO_QPOET
1 C4007_RF
4.7UF
20%
2
10V X5R-CERM
0402
RADIO_QPOET
1 C4008_RF 470PF 10% X5R
2 10V 01005
VPA_ET_FILTER 1 RADIO_QPOET R4001_RF
RADIO_QPOET
22 GND
PA_VBAT 18
VPA_BATT 41 42 43
44
RADIO_QPOET
RADIO_QPOET
2.2 5%
24 GND_BOOST
VOUT_BOOST 25
VOUT_BOOST 39
1 C4005_RF
20UF
@QCRPI4OT.EI7TCUAFTLITMTOIONMGSETEATY
1/32W MF 201005
L4001_RF
GND 1
20%
2
6.3V CERM-X5R
PP_VCC_MAIN
31 39 48 51 10 12 14 15
16 17 23 26
GND_AMP 3
0402
(CAN BE CHANGED TO 20UF)
52
RADIO_QPOET
1 C4010_RF 470PF 10% X5R
2 10V 01005
MITIGATE RX1 DESENSE IN VLB (B13)
VOUT_BOOST_GND 39
B
I/O @ 1.8V
BOOST FILTER
L4004_RF
22-OHM-25%-1800MA
34 33 31 30 39 38 37 35
PP_LDO11
1
RADIO_QPOET
C4002_RF
10UF
20%
2
6.3V
CERM-X5R
0402
39 VOUT_BOOST 1
0201
1
RADIO_QPOET
C4003_RF
10UF
20%
2
6.3V
CERM-X5R
0402
2 APT_VINPUT 39
1
RADIO_QPOET
C4006_RF
10UF
20%
2
6.3V
CERM-X5R
0402
39 VOUT_BOOST_GND
2
XW4004_RF
SHORT-10L-0.25MM-SM
NOSTUFF
1
A
8
7
6
5
4
3
2
1
C1110
R1102
L1104
U1101
D
C
B
A
PAGE TITLE
QFE DCDC
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
40 OF 55
SHEET
39 OF 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2G PA
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C1208
R1200
L1204
U1201
D
RADIO_2G
46 45 26 25 16 14
RADIO_2G
1 C4107_RF
56PF
5%
2
16V NP0-C0G
01005
PP_BATT_VCC
RADIO_2G
1 C4108_RF
2.2UF
20%
2
6.3V X5R
0201-1
VPA_APT
RADIO_2G
1 C4109_RF
2.2UF
20%
2
6.3V X5R
0201-1
1 C4112_RF
100PF
5%
2
16V NP0-C0G
01005
39 44
1 C4119_RF
220PF
2%
2
50V C0G
0201
C4103_RF
100PF
NOSTUFF
36 50_HB_2G_WTR_TX_OUT 1 2
L4102_RF
3.0NH+/-0.1NH-0.6A
5%
16V NP0-C0G
01005
1
2
1
RADIO_2G 0201
C4113_RF
RADIO_2G
1 C4117_RF
50_HB_2G_ASM_IN 45
VBATT V2G
0.8PF
12PF
U_2GPARF
SKY77356-11
+/-0.05PF
2
25V C0G
0201
5%
2
25V NP0-C0G-CERM
0201-2
C
50_HB_2G_PA_IN5 HB_RF_IN LGAHB_RF_OUT 12 50_LB_2G_PA_IN6 LB_RF_IN LB_RF_OUT 7
50_HB_2G_PA_OUT 50_LB_2G_PA_OUT
NOSTUFF
C
8 4
9 11
10 13
RADIO_2G
C4104_RF
100PF
36 50_LB_2G_WTR_TX_OUT 1 2
5% 16V NP0-C0G 01005
VIO 3 SCLK 1 SDATA 2
GND THRM PAD
RFFE_VIO RFFE1_CLK RFFE1_DATA
35 41 43 44 45 46 48
30 35 39 41 42 43 44
30 35 39 41 42 43 44
L4101_RF
6.2NH-3%-0.4A
1
2
0201
RADIO_2G
1 C4118_RF
1.2PF
+/-0.1PF
2
25V C0G-CERM
0201
50_LB_2G_ASM_IN 45
B
B
A
A
PAGE TITLE
2G PA
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
41 OF 55
SHEET
40 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
VERY LOW BAND PAD (B13, B17,
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
2
1
B28) C1332 R1300 L4215_RF
U1304
L4216_RF
8.2NH-3%-0.19A-1.6OHM
D
1
2
50_B28A_ASM_TRX
45
D
01005
1
44 43 42 39 VPA_ET RADIO_VLB_PAD
L4207_RF 18NH-3%-140MA
01005 NOSTUFF
RADIO_VLB_PAD
1 C4211_RF
2.4PF
+/-0.1PF
2
16V NP0-C0G
01005-1
26 29
27 28
30
RADIO_VLB_PAD
C4204_RF
100PF 41 50_B28_WTR_TX_O1UT 2
1 C4209_RF
47PF
5%
2
16V CERM
01005
NOSTUFF
1 C4229_RF
12PF
5%
2
16V CERM
01005
1 C4208_RF
68PF
5%
2
16V NP0-C0G
01005
2
L4217_RF
8.2NH-3%-0.19A-1.6OHM
5% 10V NP0-C0G
01005
1 C4228_RF
1PF
+/-0.1PF
2
16V NP0-C0G
01005
44 43 42 39
VPA_BATT
RADIO_VLB_PAD
1 C4207_RF
1.0UF
20%
2
10V X5R-CERM
0201-1
35
RADIO_VLB_PAD
C4205_RF
100PF
50_B28_PAD_IN 40 B28_IN
41 50_B17_FILTER_TX_O1UT 2
50_B17_PAD_IN
39 B17_IN
C
5%
1
10V
50_B13_PAD_IN
37 B13_IN
NP0-C0G 01005
RADIO_VLB_PAD
41 CTRL_VLB_BAND_SELEC3T_S1W1
L4204_RF
22NH-5%-0.1A
41 CTRL_VLB_BAND_SELEC4T_S2W2
01005
VBAT VCC1 VCC2
U_VLBPAD
SKY77802-12
LGA
B28A_ANT 22 B28B_ANT 11
B17_ANT 25 B13_ANT 8
50_B28A_PAD_ANT 50_B28B_PAD_ANT 50_B17_PAD_ANT 50_B13_PAD_ANT
B29_RX_IN 17
L4224_RF
22-OHM-25%-0.2A-0.9DCR
PLACE INDUCTOR CLOSE TO PA 1
2
01005
50_B28B_ASM_TRX 45
1
L4208_RF 18NH-3%-140MA
01005 RADIO_VLB_PAD NOSTUFF
2
PLACE INDUCTOR CLOSE TO PA
50_B29_PAD_ANT
L4222_RF
6.8NH-3%-0.210A
1
2
01005
1 C4227_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
1 3
1 C4213_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
RADIO_VLB_PAD RADIO_VLB_PAD
FL_B17LP
BAND17 LFL15710MTCTD717
0402
RADIO_VLB_PAD C4226_RF
50_B17_PAD_LPF_I4N IN OUT 2
100PF 1 2 50_B17_ASM_TRX
GND
50_B17_PAD_LPF_OUT
5% 10V NP0-C0G 01005
45
C
NOSTUFF
15 RX_OUT
VI42O 31 LB_1VLB_VIO
2
RFFE_VIO
35 40 43 44 45 46 48
RADIO_VLB_PAD
2 RADIO_VLB_PAD
SCLK 33 SDATA 32
01005 RFFE1_CLK 30 35 39 40 42 43
44
RFFE1_DATA
L4223_RF
3.3NH+/-0.1NH-290MA
C4220_RF
100PF 41 50_B13_FILTER_TX_O1UT 2
5% 10V NP0-C0G 01005
1
RADIO_VLB_PAD
L4205_RF
22NH-5%-0.1A
01005 NOSTUFF
1
2
5
6
7
10
9
12
13
14
16
18
19
20
21
23
24
34
36
38
THRM
GND
PAD
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
1 C4230_RF
15PF
5%
2
16V NP0-C0G-CERM
01005
PLACE INDUCTOR CLOSE TO PA
1
2
01005
50_B13_ASM_TRX 45
1 C4231_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
RADIO_VLB_PAD NOSTUFF
2
L4221_RF
5.1NH-3%-0.250A
1
2
50_B29_ASM_TRX
45
01005
1
B
NOSTUFF RADIO_VLB_PAD
B
L4206_RF
18NH-3%-140MA
01005
50_B13_B17_B28_B29_PAD_RX
C4221_RF
100PF
12
2
L4211_RF
22NH-3%-0.25A
50_B13_B17_B28_B29_MCH_RX 1
2
41
CTRL_VLB_BAND_SELECT_1
41
CTRL_VLB_BAND_SELECT_2
RADIO_VLB_PAD RADIO_VLB_PAD
1 C4203_RF
100PF
5%
2
10V NP0-C0G
01005
1 C4206_RF
100PF
5%
2
10V NP0-C0G
01005
1
PP_LDO14_RFSW 29 31 42
RADIO_VLB_PAD
1 C4201_RF
47PF
5%
2
16V CERM
01005
RADIO_VLB_PAD
C4224_RF
100PF
12
50_B13_TX_FILT_IN
5% 16V NP0-C0G 01005
FL_B13TX
SAW-BAND13-TX-INTERSTAGE
B8817
LGA
1 INPUT_UNBAL OUTPUT_UNBAL 4
RADIO_WTR
1 C4219_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
NOSTUFF
0201
50_B13_FILTER_TX_OUT 41
2 GND 3 GND 5 GND
VDD
U_VLB_SW CXA2973GC
50_VLB_SW_MCH_IN 41
5% 10V NP0-C0G 01005
RADIO_VLB_PAD
1 RADIO_VLB_PAD
RADIO_VLB_PAD
RADIO_VLB_PAD
3 V1 2 V2
BGA
RF1 6
RF2 5 50_B28_WTR_TX_OUT
C4225_RF
L4212_RF
22NH-5%-0.1A
C4202_RF
100PF
A
36 50_B13_B17_B28_WTR_TX_O1UT 2
50_VLB_SW_MCH_IN
41
5%
8
9
RF3 7 50_B13_WTR_TX_OUT
GND
RF4 4 50_B17_WTR_TX_OUT
100PF 1 520_B17_WTR_FILT_IN
5% 10V
01005 2
FL_B17TX
10V
NP0-C0G
1
01005
NP0-C0G 01005
1
RADIO_VLB_PAD
SAW-BAND17-TX-INTERSTAGE
B8822
RADIO_VLB_PAD
LGA
L4202_RF
22NH-5%-0.1A
L4213_RF
22NH-5%-0.1A
1 INPUT_UNBAL OUTPUT_UNBAL 4
01005 NOSTUFF
V2 V1 BAND
RADIO_VLB_PAD
01005
50_B17_FILTER_TX_OUT 41
2 GND 3 GND 5 GND
2
0 1 B28
2
RADIO_VLB_PAD
1 0 B13
1 1 B17
8
7
6
5
4
3
50_B13_B17_B28_B29_PRX_WTR_IN
36
A
VERY PAGE TITLE LOW BAND PAD
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
42 OF 55
SHEET
41 OF 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
LOW BAND PAD (B8, B26, B20)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
2
1
C4318_RF
R1400
L4322_RF
U1402
RADIO_WTR
D
C4309_RF 100PF
L4314_RF
18NH+/-3%-0.250A
1 2 50_B20_MATCH_1
1
2 50_B20_PRX_WTR_IN 36
D
5%
RADIO_WTR
0201
16V NP0-C0G
01005
1 C4312_RF 0.8PF
+/-0.05PF
2
16V C0G-CERM
01005
NOSTUFF
VPA_ET
39 41 43 44
RADIO_WTR
C4310_RF 100PF
L4312_RF
7.5NH+/-3%-0.2A
1 2 50_B26_MATCH_2 1
2 50_B26_PRX_WTR_IN 36
5% 16V NP0-C0G 01005
01005
L4313_RF
8.2NH-3%-0.19A-1.6OHM
CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING
1 01005
2 50_B26_MATCH_1
RADIO_WTR
1 C4314_RF
RADIO_LB_PAD
C4304_RF 100PF
42 50_B20_WTR_TX_OUT 1 2
44 43 41 39
VPA_BATT
CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING
47PF
5%
2
16V CERM
01005
C
5%
10V
1
NP0-C0G
01005
RADIO_LB_PAD
CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING
RADIO_WTR
C4311_RF 100PF
L4315_RF
15NH-3%-0.140A
C
L4303_RF 22NH-5%-0.1A
1 250_B8_MATCH_1 1
2
50_B8_PRX_WTR_IN 36
01005 NOSTUFF
5% 16V
01005
36
2
NP0-C0G 01005
1 C4313_RF
VBATT VCC1 VCC2
0.9PF
+/-0.05PF
RADIO_LB_PAD
C4303_RF 100PF
42 CTRL_LB_BAND_SELECT_1 28 SW1 42 CTRL_LB_BAND_SELECT_2 27 SW2
50_B20_PAD_IN
34 B20IN
U_LBPAD
SKY77803-12
LGA
B20RX 25 50_B20_PAD_RX B26RX 20 50_B26_PAD_RX
B8RX 10 50_B8_PAD_RX
2
16V CERM
01005
32 5
35 6
42 50_B26_WTR_TX_OUT1 2
50_B26_PAD_IN 33 B26IN
B20ANT 22 50_B20_PAD_ANT
5%
1
10V
NP0-C0G
RADIO_LB_PAD 01005
L4322_RF
22NH-5%-0.1A 01005 NOSTUFF
2
RADIO_LB_PAD
C4302_RF
1
RADIO_LB_PAD
L4304_RF 22NH-5%-0.1A 01005 NOSTUFF
2
50_B8_PAD_IN 31 B8IN
4
7
8
9
11
13
12
15
16
18
19
GND
21
23
24
26
29
30
37 38 39 40 41 42 43 44 45 46 47 48
THRM PAD
B26ANT 17 50_B26_PAD_ANT B8ANT 14 50_B8_PAD_ANT
VIO 3 SCLK 1 SDATA 2
LB_VLB_VIO RFFE1_CLK
RFFE1_DATA
41 30 35 39 40 41 43 44 30 35 39 40 41 43 44
L4316_RF
4.3NH-3%-0.270A
1
2
01005
50_B20_ASM_TRX
45
1
RADIO_LB_PAD
PLACE INDUCTOR CLOSE TO PA
L4308_RF 18NH-3%-140MA 01005 NOSTUFF
1 C4317_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
100PF
42 50_B8_WTR_TX_OUT1 2
2
5%
10V
B
NP0-C0G
1
01005
RADIO_LB_PAD
L4305_RF
22NH-5%-0.1A 01005 NOSTUFF
2
L4320_RF
4.3NH-3%-0.270A
1
2
01005
PLACE INDUCTOR CLOSE TO PA
1 C4318_RF
0.6PF
+/-0.05PF
2
16V CERM
01005
B
50_B26_ASM_TRX
45
PP_LDO14_RFSW
DECOUPLING SHARED W C4201_RF
41 31 29
42 CTRL_LB_BAND_SELECT_1 42 CTRL_LB_BAND_SELECT_2
1
RADIO_LB_PAD VDD
U_LB_SW
CXA2973GC
RADIO_LB_PAD
3 V1
BGA
RF1 6
R4301_RF C4301_RF
2 V2
50_B8_B26_B20_WTR_TX_OU1T100PF2 36
0.00 50_LB_SW_T_M1CH 520_LB_SW_MCH_IN
42
A
WTR OUTPUT HAS DC
5% 10V
FIRST SHUNT MUST
NP0-C0G 01005
0% 1/32W
MF 01005
8
9
GND
BE A CAPACITOR.
1 C4320_RF
RF2 5 RF3 7 RF4 4
0.5PF
+/-0.05PF
2
16V C0G-CERM
01005
NOSTUFF
50_LB_SW_MCH_IN 42
50_B8_WTR_TX_OUT 42 50_B20_WTR_TX_OUT 42 50_B26_WTR_TX_OUT 42
V2 V1 BAND 0 1 B8 1 0 B20 1 1 B26
8
7
6
5
L4321_RF
3.6NH+/-0.1NH-0.280A
1
2
1
PLACE INDUCTOR CLOSE TO PA
01005
L4306_RF
18NH-3%-140MA
01005 RADIO_LB_PAD NOSTUFF
2
RADIO_LB_PAD
1 C4307_RF
10PF
5%
2
16V CERM
01005
NOSTUFF
50_B8_ASM_TRX 45
A
LOW BAND PAD PAGE TITLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
43 OF 55
SHEET
42 OF 54
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
MID BAND PAD (B1, B25, B3, B4, B34,
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
B39)
C4426_RF R1500 L4409_RF
U1501
RADIO_WFR C4420_RF
100PF
L4404_RF
2.2NH+/-0.1NH-0.380A
1 2 50_B3_MATCH_1
1
2
50_B3_PRX_WFR_IN 38
5% 16V NP0-C0G 01005
01005
RADIO_WFR
L4403_RF
3.6NH+/-0.1NH-0.280A
C4425_RF
33PF
D
1
2
12
01005 50_B3_MATCH_15_%MATCH 16V
NP0-C0G-CERM 01005
RADIO_MB_PAD
1 C4408_RF
47PF
2
156%V CERM
01005
VPA_ET
NOSTUFF
39 41 42 44
RADIO_MB_PAD
1 C4409_RF
47PF
2
156%V CERM
01005
L4405_RF
1.5NH+/-0.1NH-220MA
1
2
01005
50_B1_B4_PRX_WFR_IN 38
MB_ET_RC_FILT
L4406_RF
RADIO_MB_PAD
2.7NH+/-0.1NH-0.370A
44 42 41 39
VPA_BATT
RADIO_MB_PAD
1 C4407_RF
1.0UF
20%
2
10V X5R-CERM
0201-1
1 R4401_RF
0.00
0% 1/32W MF 20N1O0S0T5UFF
1
2
01005 RADIO_WFR
RADIO_WFR
C4422_RF 100PF
L4409_RF
2.0NH+/-0.1NH-0.380A
12
50_B25_MATCH_1
1
2
50_B25_PRX_WFR_IN
38
5% 16V NP0-C0G 01005
1
L4402_RF
01005
C
RADIO_MB_PAD
3.5NH+/-0.1NH-0.280A
01005
C
VBATT 36 VCC1 27 VCC2 26
C4403_RF
100PF
36
50_B3_B4_WTR_TX_OUT
12
5%
16V
RADIO_MB_NP0P01A-0D0C50G
1 C4401_RF
18PF
2%
2
16V CERM
01005
NOSTUFF
RADIO_MB_PAD
1 C4406_RF
18PF
2%
2
16V CERM
01005
NOSTUFF
RADIO_MB_PAD
C4404_RF
100PF
36
50_B1_B25_B34_B39_WTR_TX_OUT 1 2
5% 16V NP0-C0G 01005
50_B3_B4_PAD_I3N5 B3/4IN 50_B1_B25_B34_B39_PAD3_4INB1/25/34/39IN
4 GND 6 GND 7 GND 9 GND 11 GND 14 GND 13 GND 15 GND 17 GND 18 GND 19 GND 20 GND 21 GND 22 GND 23 GND 25 GND 28 GND 29 GND 30 GND 31 GND 32 GND 33 GND 37 EPAD 38 EPAD 39 EPAD 40 EPAD 41 EPAD 42 EPAD 43 EPAD 44 EPAD 45 EPAD 46 EPAD 47 EPAD 48 EPAD
RADIO_MB_PAD
U_MBPAD
AFEM-8020-AP1
LGA
B3RX 12 50_B3_PAD_RX B1/4RX 10 50_B1_B4_PAD_RX
B25RX 5 50_B25_PAD_RX
B1/3/4ANT 16 50_B1_B3_B4_PAD_ANT B25ANT 8 50_B25_PAD_ANT
B34/39TX 24 50_B34_B39_PAD_ANT
VIO 1 RFFE_VIO SCLK 2 RFFE1_CLK SDATA 3 RFFE1_DATA
45 46 48 35 40 41
44 42 44 30 35 39
40 41 44 30 35 39
40 41 42
C4423_RF
2
33PF
1
2 RADIO_WFR
RADIO_MB_PAD 50_B25_MATCH_2
5%
FL_B39LP
16V
BAND34-39 LFL151G95TCSD734
NP0-C0G-CERM 01005
L4421_RF
0402
0.9NH+/-0.1NH-0.32A-0.6OHM
1
2
4 IN OUT 250_B34_B39_LPF_OUT
50_B34_B39_LPF_IN
01005
NOSTUFF
1 C4410_RF
0.6PF
+/-0.05PF
2
16V CERM
01005
RADIO_MB_PAD
1 3
GND TDD-LTE
1 C4414_RF
12PF
5%
2
16V CERM
01005
NOSTUFF
RADIO_MB_PAD
RADIO_MB_PAD
R4402_RF
0.00
1
2 50_B34_B39_HB_SWITCH_IN 46
0% 1/32W
MF 01005
L4407_RF
1.0NH+/-0.1NH-0.580A
1
2
50_B1_B3_B4_ASM_TRX
45
01005
1 C4418_RF
0.2PF
+/-0.1PF
2
16V NP0-C0G
01005
B
NOSTUFF
B
L4408_RF
3.8NH-+/-0.1NH-0.27A
1
2
01005
1 C4413_RF
1.2PF
+/-0.05PF
2
16V NP0-C0G-CERM
01005
50_B25_ASM_TRX 45
1 C4419_RF
1.5PF
+/-0.05PF
2
16V NP0-C0G-CERM
01005
A
A
MID BAND PAD PAGE TITLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
44 OF 55
SHEET
43 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
HIGH BAND PAD (B7, B38, B40, B41, XGP)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
1
C4533_RF R1600 L1616 U1601
D
RADIO_WTR
D
VPA_ET
39 41 42 43
C4521_RF
100PF
L4512_RF
3.3NH+/-0.1NH-290MA
1 C4507_RF
68PF
5%
2
16V NP0-C0G
01005
1 2 50_B7_MATCH_11
2
5% 16V
NP0-C0G 01005
01005
50_B7_PRX_WTR_IN 36
RADIO_WTR
C4522_RF
1.8PF 12
L4509_RF
2.1NH+/-0.1NH-0.6A
+/-0.1PF 16V
NP0-C0G
01005
RADIO_HB_PAD
1
2
50_B7_ASM_TRX 45
36 50_B7_WTR_TX_OUT
R4506_RF
0.00
1
2
0% 1/32W
MF 01005
RADIO_HB_PAD
50_B7_PAD_MTCH
C4501_RF
18PF
12
RADIO_HB_PAD
1 C4503_RF
1.0PF
2
1+6/V-0.1PF NP0-C0G
01005
2% 16V CERM 01005
43 42 41 39
VPA_BATT
RADIO_HB_PAD
1 C4505_RF
1.0UF
20%
2
10V X5R-CERM
0201-1
1 C4506_RF
100PF
5%
2
16V NP0-C0G
01005
VPA_APT 39 40
1 C4532_RF
68PF
5%
2
25V NP0-C0G-CERM
01005
RADIO_HB_PAD
1 C4512_RF
0.2PF
+/-0.1PF
2
16V NP0-C0G
01005
NOSTUFF
0201
C4526_RF
100PF 12
50_B41B_TX_OUT
44
RADIO_HB_PAD
1 C4510_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
5%
16V NP0-C0G
01005
1 C4520_RF
0.7PF
+/-0.1PF
2
16V NP0-C0G
01005
VBATT 24 VCC1 21 VCC2 20 VAPT 19
C
RADIO_HB_PAD
50_B40_B38_B41_WTR_TX_OUT
36
C4533_RF
100PF
12
50_B7_PAD_IN 25 B7IN
50_B38_B40_B41_PAD_IN
26 B38/40/41IN
RADIO_HB_PAD
U_HBPAD
AFEM-8010-AP1
LGA
B7RX B7ANT
B41B B40/B41
1150_B7_RX_PAD 1550_B7_ANT_PAD
7 50_B41B_TX_PAD 3 50_B40_B41_TX_PAD
NOSTUFF
L4520_RF
1.3NH+/-0.1NH-0.400A
C
FT_B40
TX-BAND40-LTE
SAFFU2G35MA0F57
L4526_RF
LGA
2.2NH+/-0.1NH-0.380A
1
2
50_B40_TX_FILTER_IN1 UNBAL_PRT1 UNBAL_PRT4504_B40_TX_FILTE1R_OUT
2 50_B40_TX_HB_SWITCH_IN
2 GND 3 GND 5 GND
5%
16V NP0-C0G
RADIO_HB_PAD
B41C 5 50_B41C_TX_PAD
B40A/B41A 9 50_B40A_B41A_TX_PAD
1
01005
01005 1
01005
1 C4502_RF
1PF
+/-0.1PF
2
16V NP0-C0G
VIO 27RFFE_VIO SCLK 28RFFE1_CLK SDATA 1 RFFE1_DATA
46 48 35 40 41
43 45 43 30 35 39 40 41 42
30 35 39 40 41 42 43
L4527_RF
9.1NH-3%-0.17A-1.7OHM 01005
TDD-LTE
L4523_RF
9.1NH-3%-0.17A-1.7OHM 01005
01005
2
2
2 GND 4 GND 6 GND 8 GND 10 GND 13 GND 12 GND 14 GND 16 GND 17 GND 18 GND 22 GND 23 GND 29 EPAD 30 EPAD 31 EPAD 32 EPAD 33 EPAD 34 EPAD 35 EPAD 36 EPAD 37 EPAD
50_B40A_TX_HB_SWITCH_MCH
C4531_RF
15PF 1 2 50_B40A_TX_HB_SWITCH_IN
5%
16V
1
NP0-C0G-CERM
01005
L4506_RF
7.5NH+/-3%-0.2A
01005
L4515_RF
2.2NH+/-0.1NH-0.380A
1
2
01005 1
1
50_B41C_FILTER_IN 44
L4528_RF L4521_RF
22NH-3%-0.12A-3.2OHM
6.8NH-3%-140MA 01005
01005
RADIO_HB_PAD
NOSTUFF
2 2
FT40A41A
2
B
LTE-BAND-40A-41A-TX
LGA
C4528_RF
44
50_B40A_B41A_FILTER_I6N ANT
BAND_40A 3 BAND_41A 1
3.0PF 50_B41A_TX_HB_SWITCH_IN
12
46
2 GND 4 GND 5 GND 7 GND 8 GND 9 GND
50_B41A_TX_HB_SWITCH_MCH
+/-0.1PF
1
16V
TDD-LTE
1
NP0-C0G 01005
L4501_RF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
NOSTUFF
RADIO_HB_PAD
L4507_RF
3.9NH+/-0.1NH-0.270A
01005
2 2
L4516_RF
B
1.2NH+/-0.1NH-0.550A
1
2
01005
50_B40A_B41A_FILTER_IN
L4524_RF
1.8NH+/-0.1%-0.380A
1
250_B41B_TX_HB_SWITCH_IN
01005
L4522_RF
2.7NH+/-0.1NH-0.370A
44 50_B41C_FILTER_IN
44
50_B41B_TX_OUT
1
44 2 50_B41B_FILTER_IN
01005
RADIO_HB_PAD
1 NOSTUFF
A
RADIO_HB_PAD
L4504_RF
3.0NH+/-0.1NH-200MA
01005
2
1 NOSTUFF RADIO_HB_PAD
L4508_RF
2.4NH+/-0.1NH-200MA
01005
2
2 GND 3 GND 5 GND 7 GND 8 GND 10 GND
FT_41BC
44
SAW-BAND-41B-41C-TDD-TX
SAWEN2G58QA0F57
50_B41B_FILTER_I1N RF1/
RF2/ 9 50_B41B_TX_HB_SWITCH_MCH
B41BIN
B41BOUT
L4525_RF
1.2NH+/-0.1NH-0.550A
44
50_B41C_FILTER_I4N RF3/
B41CIN
LGA RF4/ 6 50_B41C_TX_HB_SWITCH_MCH
B41COUT
1
2
50_B41C_TX_HB_SWITCH_IN
01005
TDD-LTE
PAGE TITLE
HIGH BAND
Apple Inc.
R
A
PAD
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
45
SHEET
44
OF OF
55 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
ANTENNA SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C1702
R1700
L4608_RF
U1702
D
L4608_RF
22-OHM-25%-0.2A-0.9DCR
R4603_RF
VCC_ASM_FILTERED
1
2
RADIO_ASM 01005
PP_BATT_VCC 14 16 25 26 40 46
50_FWD_REV_CPL_OUT
0.00
1
2
50_FWD_OR_REV_RF 36
1 C4602_RF
0%
47PF
5%
2
16V CERM
01005
1R4601_RF
1/32W MF
01005
105
RADIO_ASM
1%
1/32W
1R4602_RF
105 1%
MF
1/32W
2R0A1D0I0O5_ASM NOSTUFF
MF 2R0A1D0I0O5_ASM
C
ASM NEEDS TO BE UPDATED WITH A NEW PINOUT VERSION 46 50_HB_SWITCH_TX
NOSTUFF
C
29
L4601_RF
2.4NH+/-0.1NH-200MA
36
50_B34_B39_PRX_WTR_IN
1
2
01005
50_B34_B39_FILT_RX 1
L4602_RF
3.3NH+/-0.1NH-180MA 01005
RADIO_ASM
1 INPUT
FRX34B39
BAND34-39 SAWFD1G90LC0F57
LGA
OUT_FIL1 9
OUT_FIL2 6
2 3 4 5 7 8 10
GND RADIO_ASM TDD-LTE
R4608_RF
0.00
46 50_HB_SWITCH_RX 1
2
50_HB_SW_RX_ASM_MCH
0%
1/32W
MF
01005
44 50_B7_ASM_TRX
RADIO_ASM
1 RF1 2 RF3 3 RF7
VDD
U_ASM_RF
RF5159
LGA
FWD/REV 32
50_B39_RX_ASM_OUT
4 RX1
50_B34_RX_ASM_OUT 22 TRX6
43 50_B1_B3_B4_ASM_TRX 23 TRX7
43 50_B25_ASM_TRX
24 TRX8
A2 21
40 50_HB_2G_ASM_IN
12 HBTX
48 50_HB_DIVERSITY_ASM 20 HBRF2
50_ANT2_CONN
50
2
TO DIVERSITY MODULE 41 50_B17_ASM_TRX
8 TRX2
42 50_B8_ASM_TRX
18 TRX3
41 50_B28A_ASM_TRX 41 50_B28B_ASM_TRX 42 50_B26_ASM_TRX
9 TRX0 10 TRX1 16 TRX4
A1 5
50_ASM_ANT1_OUT
R4609_RF
0.00
1
2 50_ANT1_CONN
50
41 50_B13_ASM_TRX 42 50_B20_ASM_TRX
41 50_B29_ASM_TRX
17 TRX5 11 TRX11
7 RX2
VIO 26 RFFE_VIO
35 40 41 43 44 46 48
1% 1/20W
MF 0201
50_LB_2G_ASM_IN TO DIVERSITY MODULE
14 LBTX
SCLK 28 RFFE2_CLK SDATA 27 RFFE2_DATA
30 35 46 48 30 35 46 48
B
1
1
RADIO_ASM RADIO_ASM
48 50_LB_DIVERSITY_ASM 19 LBRF2
GND
1 C4606_RF
B
L4603_RF
1.0NH+/-0.1NH-0.22A-0.9OHM 01005
NOSTUFF
L4604_RF
1.0NH+/-0.1NH-0.22A-0.9OHM 01005 NOSTUFF
13
15
25
30
6
31
33
22PF
5%
2
16V CERM
01005
2
2
RADIOR_AADSIMO_ASM
A
A
PAGE TITLE ANTENNA SWITCH
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
46 OF 55
SHEET
45 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
HIGH BAND SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
R4703_RF
0.00
36 50_B40A_PRX_WTR_IN 1
2
0% 1/32W
MF 01005
50_B40A_PRX_FILTER 1
PP_BATT_VCC
14 16 25 26 40 45
6 1
17
L4705_RF
2.0NH+/-0.1NH-0.380A 01005
2
RADIO_HBSWITCH
FR40A41A
RADIO_HBSWITCH
SAW-BAND-40A-41A-TDD-RX
C4709_RF
9
885055
RX_B40A
6
LGA
RX_B41A
ANT 2 50_B40A_B41A_RX_MATCH
18PF 12
RADIO_HBSWITCH
1 C4710_RF
47PF
5%
2
16V CERM
01005
2%
1
10 GND 8 GND 7 GND 5 GND 4 GND 3 GND 1 GND
16V
CERM
01005
VBATT
C
RADIO_HBSWITCH
TDD-LTE
L4709_RF
3.3NH+/-0.1NH-290MA
01005
44 50_B40A_TX_HB_SWITCH_IN
U_HBS_RF
11 TX1 CXM3652UR
C
C4720_RF
6.0PF
C4704_RF 100PF
44 50_B41A_TX_HB_SWITCH_IN
12 TX2
UQFN
2
44 50_B40_TX_HB_SWITCH_IN
7 TX3
C4721_RF
100PF
36 50_B41A_PRX_WTR_IN
12
50_B41A_PRX_MATCH1 1 2
44 50_B41B_TX_HB_SWITCH_IN
8 TX4
TX RF1 5 50_HB_SWITCH_TX_OUT
12
50_HB_SWITCH_TX
45
+/-0.1PF 16V
NP0-C0G 01005
5%
50_B41A_PRX_FILTER
1
16V
NP0-C0G
01005
44 50_B41C_TX_HB_SWITCH_IN 43 50_B34_B39_HB_SWITCH_IN
9 TX5 10 TX6
5% 25V C0G 0201
L4706_RF
1.0NH+/-0.1NH-0.580A 01005
2
50_B41A_PRX_MATCH2
RADIO_HBSWITCH
1 C4702_RF
15PF
5%
2
16V NP0-C0G-CERM
01005
R4708_RF
0.00
50_B40B_RX_MATCH 1
2
0% 1/32W
MF 01005
50_B40A_B41A_RX
50_B40B_RX
50_B38X_RX
1 48 45 44 43 41 40 35 RFFE_VIO
L4710_RF
48 45 35 30 RFFE2_CLK
12NH-3%-0.140A
45 35 30 RFFE2_DATA
48
01005
RADIO_HBSWITCH
2
14 RX1 13 RX2 15 RX3
4 VIO 3 SCLK 2 SDATA
GND
RX RF1 16 50_HB_SWITCH_RX 45
THRM PAD
TDD-LTE
RADIO_HBSWITCH
36
FR38X40B
L4713_RF C4701_RF
100PF
2.7NH+/-0.1NH-0.370A
R4707_RF 50_B40B_B38X_PRX_WTR_IN 1 2 50_B40B_B38X_PRX_MA1TCH2
2
01005
50_B40B_B38X_PRX_FILTER
SAW-BAND-40B-38X-TDD-RX
885056
2
RF1/ANTRLFG3/ARX_B40B
RF2/RX_B38X
9 6
50_B38X_RX_MATCH
0.00
1
2
1 GND 3 GND 4 GND 5 GND 7 GND 8 GND 10 GND
5% 10V
0% 1/32W
NP0-C0G
1
MF
1
B
01005
L4704_RF
3.7NH-+/-0.1NH-0.27A
1
L4712_RF
TDD-LTE
01005
L4708_RF
2.9NH-+/-0.1NH-0.36A
B
01005
2.7NH+/-0.1NH-0.370A
01005
01005
RADIO_HBSWITCH
2
2
2
A
A
HIGH PAGE TITLE BAND SWITCH
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
PAGE
47 OF 55
SHEET
46 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
RX DIVERSITY (1)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
2
1
C4826_RF
R1800
L1829
U1801
MIDBAND
D
MIDBAND DIVERSITY - WFR HIGHBAND DIVERSITY - WTR
LOWBAND DIVERSITY - WTR
D
L4806_RF
1.8NH+/-0.1%-0.380A
38 50_B1_B4_DRX_WFR_IN 1
2
01005
L4803_RF
3.6NH+/-0.1NH-0.280A
1
2
01005
50_B1_B4_DRX_DSM 48
L4813_RF
3.3NH+/-0.1NH-290MA
RADIO_WTR
C4813_RF
100PF
36 50_B7_DRX_WTR_IN1
2 50_B7_DRX_WTR_M1CH 2
50_B7_DRX_DSM
48
RADIO_WTR
01005
RADIO_WTR
5% 16V01005 NP0-C0G
C4809_RF
1.1PF
12
R4811_RF
50_B7_DRX_MATCH1 0.00 2
+/-0.1PF 16V
NP0-C0G 01005
0% 1/32W
MF 01005
L4825_RF
18NH-3%-0.140A
50_B8_B28B_DRX_WTR_IN 1
2
RADIO_WTR
C4823_RF
100PF
12
01005-1
50_B8_B28B_DRX_WTR_MCH
5% 16V
NP0-C0G
01005
1 C4820_RF
0.3PF
+/-0.05PF
2
16V C0G-CERM
01005
50_B8_B28B_DRX_DSM 48
RADIO_WFR
L4805_RF
1.8NH+/-0.1%-0.380A
C4805_RF 100PF
38 50_B3_DRX_WFR_IN
1
2
12
50_B3_DRX_DSM 48
01005 50_B3_DRX_WFR_M5C%H16V01005
NP0-C0G
C4824_RF
L4801_RF
33PF 2.4NH+/-0.1NH-0.370A
12
1
2
C
01005
5% 16V
50_B3_DRX_WFR_MCH_MATCH
NP0-C0G-CERM
01005
L4804_RF
1.6NH+/-0.1NH-0.390A
RADIO_WFR
C4804_RF 100PF
38 50_B25_DRX_WFR_IN 1
2
12
50_B25_DRX_DSM 48
RADIO_WFR
01005
50_B25_DRX_W5%FR1_6MV0C1H005 NP0-C0G
C4802_RF 33PF
L4802_RF
2.3NH+/-0.1NH-0.370A
12
1
2
5% 16V NP0-C0G-CERM 01005
01005
50_B25_DRX_MATCH
MIDBAND DIVERSITY - WTR
B
RADIO_WTR
L4807_RF
2.0NH+/-0.1NH-0.380A
36 50_B34_DRX_WTR_IN1
2
01005
50_B34_DRX_DSM
48
RADIO_WTR
L4808_RF 3.6NH+/-0.1NH-180MA
1
2
01005 NOSTUFF
RADIO_WTR L4809_RF
2.0NH+/-0.1NH-0.380A
RADIO_WTR C4808_RF
100PF
36 50_B39_DRX_WTR_IN 1
2 50_B39_DRX_WTR_MCH1 1 2 50_B39_DRX_DSM 48
RADIO_WTR
01005
5% 16V01005 NP0-C0G
C438306P_FRF2.2NHL+/4-801.10N_HR-0F.380A
12
1
2
01005
5% 16V
50_B39_DRX_WTR_MCH2
NP0-C0G-CERM
01005
A
8
7
6
RADIO_WTR
R4818_RF
0.00
36 50_B38X_DRX_WTR_IN 1
2
50_B38X_DRX_DSM
48
36
RADIO_WTR L4826_RF 22NH-5%-0.1A
1
2
RADIO_WTR
C4825_RF 100PF
12
50_B13_B17_DRX_DSM 48
0% 1/32W
MF 01005
L4814_RF
50_B13_B17_DRX_WTR_IN 01005
50_B13_B17_DRX_WTR_MCH
5%
10V
NP0-C0G
01005
1 C4831_RF
1.8NH+/-0.1%-0.380A
0.8PF
1
2
01005
+/-0.05PF
2
16V C0G-CERM
01005
C
RADIO_WTR
L4830_RF
0.4NH+/-0.1NH-0.990A
36 50_B40_DRX_WTR_IN
1
2
01005
L4812_RF
2.4NH+/-0.1NH-0.370A
1
2
01005
RADIO_WTR
RADIO_WTR
50_B40_DRX_FILTER 48
L4823_RF 22NH-5%-0.1A
C4827_RF 100PF
1
36
50_B20_B29_DRX_WTR_IN
01005
2 50_B20_B29_DRX_WTR_MCH
12
5% 10V NP0-C0G 01005
1 C4832_RF
0.8PF
+/-0.05PF
2
16V C0G-CERM
01005
50_B20_B29_DRX_DSM
48
RADIO_WTR
RADIO_WTR
RADIO_WTR
C4826_RF
L4829_RF
R4817_RF
0.00
36 50_B41A_DRX_WTR_IN 1
2
C4816_RF 100PF
1 2 50_B41A_DRX_FILTER 48
0% 1/32W
RADIO_WTR MF
50_B41A_DRX_5W%TR16_VM0C1H005 NP0-C0G
C4830_RF
0L10405815_RF
15PF 1.3NH+/-0.1NH-0.400A
100PF 36 50_B26_B28A_DRX_WTR_IN 1 2
8.2NH-3%-0.19A-1.6OHM
50_B26_B28A_DRX_DSM
1
2
48
5% 50_B26_B28A_DRX_0W1T0R05_MCH
16V
NP0-C0G
1
01005
L4827_RF
B
12
1
2
01005
5% 16V
50_B41A_DRX_WTR_MCH_MATCH
NP0-C0G-CERM
01005
13NH-+/-0.3%-0.14A
01005
2
RADIO_WTR L4819_RF 2.2NH+/-0.1NH-0.380A
RADIO_WTR
C4817_RF 100PF
36 50_PCS_WTR_IN 1
2
1 2 50_PCS_DSM_OUT 48
01005
50_PCS_W5T%R1_6RVX0_1M00C5H NP0-C0G
RADIO_WTR
C4811_RF
47PF
12
L4820_RF
2.7NH+/-0.1NH-0.370A
1
2
5% 50-PCS_DRX_WTR_MCH021005 16V CERM 01005
L4822_RF
2.2NH+/-0.1NH-0.380A
RADIO_WTR
C4818_RF
100PF
36 50_DCS_WTR_IN 1
2
12
50_DCS_DSM_OUT 48
01005
50_DCS_W5T%R1_6RVX0_1M00C5H NP0-C0G
RADIO_WTR
C4812_RF
47PF
L4821_RF
5.6NH-3%-0.23A-1.3OHM
12
1
2
5% 50_DCS_DRX_WTR_M0C1H0205 16V CERM 01005
5
4
3
A
PAGE TITLE RX DIVERSITY
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
48 OF 55
SHEET
47 OF 54
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
RX DIVERSITY (2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C1900
R1900
L1900
U1901
D
L4905_RF
C
22-OHM-25%-0.2A-0.9DCR
VCC_DSM
1
2
PP_VCC_MAIN 10 12 14 15 16 17
C
01005
23 26 31 39 51 52
1 C4901_RF
15PF
5%
2
16V NP0-C0G-CERM
01005
2
47 50_B40_DRX_FILTER 47 50_B41A_DRX_FILTER
FD40B41A
SAW-2-1-BAND-40-41A-DRX
B39252B9920P810
6 B40OUT
B40IN 4
9
LGA
1
B41AOUT
B41AIN
47 50_B1_B4_DRX_DSM 32
47 50_B3_DRX_DSM
33
47 50_B7_DRX_DSM
16
47 50_B8_B28B_DRX_DSM 19
47 50_B13_B17_DRX_DSM 25
47 50_B25_DRX_DSM
34
47 50_B26_B28A_DRX_DSM21
47 50_B20_B29_DRX_DSM 23
47 50_B34_DRX_DSM
12
47 50_B39_DRX_DSM
13
47 50_B38X_DRX_DSM
17
50_B40_DRX_DSM
14
50_B41A_DRX_DSM
15
B1/B4 B3 B7 B8/B28B B13/B17 B25 B26/B28A B20/B29 B34 B39 B38X B40 B41A
VBATT
U_DSM_RF
HFQSWBXUA-221
LGA
VIO 3 SDATA 4
SCLK 5 ANT LB 7 ANT HB 9
PCS 29 DCS 30
RFFE_VIO RFFE2_DATA RFFE2_CLK 50_LB_DIVERSITY_ASM 50_HB_DIVERSITY_ASM 50_PCS_DSM_OUT 50_DCS_DSM_OUT
35 40 41 43 44 45 46 30 35 45 46 30 35 45 46 45 45 47 47
31 GND
28 GND
27 GND
26 GND
24 GND
22 GND
20 GND
18 GND
11 GND
10 GND
8 GND
6 GND
1 GND
10 GND 8 GND 7 GND 5 GND 3 GND 2 GND
THRM
PAD
1
1
35 36 37 38 39 40
1
1
B
B
L4901_RF
9.1NH-3%-0.17A-1.7OHM 01005
L4902_RF
5.6NH-3%-0.23A-1.3OHM
L4903_RF
8.2NH-3%-0.19A-1.6OHM 01005
L4904_RF
5.1NH-3%-0.250A
RADIO_DSM
01005 RADIO_DSM
RADIO_DSM
01005 RADIO_DSM
2 2
2 2
A
A
PAGE TITLE
GPS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
49 OF 55
SHEET
48 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
GPS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C1900
R1900
L1900
U1901
D
C
C
L5002_RF
10NH-3%-0.170A
50
50_GPS_DSM_IN
FL_GPSRF
LNA-GNSS-BAL B8821
LGA
BAL_PORT 3
1 UNBAL_PORT
BAL_PORT 4
100_GPS_DSM_P_OUT
1 01005
RADIO_GPS
1 C5001_RF
1.0PF
+/-0.1PF
2
16V NP0-C0G
01005
2 100_GPS_WTR_IN_P 36
2 GND 5 GND
100_GPS_DSM_M_OUT
L5003_RF
10NH-3%-0.170A
1
2 100_GPS_WTR_IN_N 36
01005
B
B
A
A
PAGE TITLE
GPS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
50 OF 55
SHEET
49 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
2
1
ANTENNA FEED'S
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TEST & COAX CONNECTOR FOR LOWER SECTION OF MLB
3 2 2 3 2 3 17 16 15 13 12 11 10 8 7 5 4 3 2 2 4 1 5 7
RADIO_LOW_ANT
RADIO_UP_ANT
D
LOW_COAX
UP_COAX
MM6829-2700B
MM6829-2700B
F-ST-SM
F-ST-SM
R5130_RF
45 50_ANT2_CONN
1
1 50_ANT2_UPPER_COAX_CON1N 0.00 2
50_TRIPLEX_CELL
1% 1/20W
MF 0201
RADIO_UP_ANT
1
L5124_RF
18NH-3%-0.140A 01005
RADIO_UP_ANT NOSTUFF 2
L5128_RF
33-OHM-25%-1500MA
VOLTAGE=2.95V
RADIO_UP_ANT
UAT_SPLT
MM6829-2700B
F-ST-SM
R5131_RF
1
50_CELL_WIFI_GPS_TRIPLEX_ANT
0.00
1
2
1%
1
1/20W MF RADIO_UP_ANT
0201
50_TRIPLEX_ANT_MCH 1
6 ANT EPAD
F_TRI_RF
ACFM-W012-AP1 CELL 1
LGA
GPS/GNSS 9
GND
WIFI 14
PP_LDO13_GPS 1
0201
1 C5129_RF
22PF
5%
2
16V CERM
01005
RADIO_UP_ANT
2
PP_LDO13 31 33
1 C5130_RF
2.2UF
20%
2
6.3V X5R
0201-1
RADIO_UP_ANT
L5126_RF
10NH-3%-0.3A
0201
NOSTUFF
2
L5125_RF
18NH-3%-0.140A 01005
RADIO_UP_ANT NOSTUFF
2
50_TRIPLEX_GPS
L5127_RF
VDD
3.9NH+/-0.1NH-0.270A
SKY65746-14
1
2 50_GPS_LN3A_RIFN_IUN_GPLGSALNRAF_OUT 6
01005
50_GPS_DSM_IN
C
50_WIFI_2G_NOTCHPLEXER_IN 1
51
GND EPAD
L5123_RF
18NH-3%-0.140A
01005 RADIO_UP_ANT NOSTUFF
2
D
49
C
TP_SHORT_PIN
P2MM-NSM
SM 1
PP
NORTH_ANT_GND
29
TP_UAT_GND
P2MM-NSM SM 1
PP
TP_UAT P2MM-NSM SM 1 PP
29 50_UPPER_ANT_FEED
RADIO_UP_ANT
UAT_METR
C5122_RF
12PF
MM6829-2700B
F-ST-SM
1 2 50_UPPER_ANT_MCH 1
5%
ANT_GND 29 50
1
25V CERM
B
L5122_RF
1 C5111_RF
0201
1
12NH-310MA
03015
0.7PF
+/-0.05PF
2
25V C0G-CERM
0201
L5112_RF
12NH-310MA
03015
NOSTUFF
2
50_UAT_MATCH
2
1 C5112_RF
15PF
5%
2
25V NPO
0201
50 29 ANT_GND
A
8
7
6
5
3 2 3 2 4 3 2 2 3
B
TO 5GHZ WIFI ANTENNA FEED
FROM 5GHZ WIFI
WIFI_BT
WI5G_ANT
TP_WIFI_5G_GND P2MM-NSM SM 1 PP
TP_PW229MIMSPP-MFN1ISM_505_WGIFI_5G_CONN_ANRT51103.020_25R0F_WIFMI_M56G1_8CFO2-N9SNT_--MS2CMH700B
50 29 ANT_GND
1 C5132_RF
0.2PF
+/-0.05PF
2
25V COG-CERM
0201
NOSTUFF
1% 1/20W
MF RADIO_UP_ANT 0201
WIFI_BT
WI5G_CN MM6829-2700B
F-ST-SM 1 50_WIFI_5G_IN_OUT BI 51
45 50_ANT1_CONN
4
L5129_RF
1.4NH+/-0.1NH-1.1A
1
0201
1 C5128_RF
0.2PF
+/-0.05PF
2
25V COG-CERM
0201
2 50_ANT1_SW
RADIO_LOW_ANT
LOW_ANT
MM5829-2700 F-ST-SM 1
3
A
PAGE TITLE ANTENNA FEEDS
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
51 OF 55
SHEET
50 OF 54
2
1
8
7
WLAN/BT
https://www.mobile-manuals.com/
6
5
4
3
2
1
WIFI_BT
PP_VCC_MAIN
39 31 26 23 17 16 15 14 12 10 52 48
IN
1
WIFI_BT C5202_RF
1
WIFI_BT C5203_RF
D
10UF 20%
27PF 5%
2
6.3V CERM-X5R
2
16V NP0-C0G
0402-1
01005
29 IN
WIFI_BT
R5208_RF
PP_WL_BT_VDDIO_AP
0.00
1
2
0% 1/32W
MF 01005
51 PP_WLAN_VDDIO_1V8
VOLTAGE=1.80V
1
WIFI_BT C5204_RF
0.01UF
10%
2
6.3V X5R
01005
1
WIFI_BT C5205_RF
27PF
5%
2
16V NP0-C0G
01005
VBATT_RF_VCC 55
VBATT_RF_VCC 54
VBATT 24
VBATT 23
VDDIO_1P8V 22
32K INTERFACE TO AP
WIFI_BT CLK32K_AP
30 29 IN
36 CLK32K
WIFI_BT
WLAN_VIN_1P35 26 VIN_LDO
C5201_RF
WLAN_SR_VLX 28 SR_VLX
7.5UF
WIFI_BT
C
20% 4V CERM 0402
L5201_RF
2.2UH-20%-0.3A-0.38OHM 30 29 IN
1
3
1
2
30 29 IN
WLAN_SR_LC 0603
WLAN_REG_ON 9 WL_REG_ON BT_REG_ON 10 BT_REG_ON
24
30 29 OUT 30 29 OUT 51 30 29 IN 30 29 BI
29 IN 29 IN 30 29 IN 30 29 IN 30 29 OUT 30 29 OUT
HOST_WAKE_WLAN WLAN_PCIE_WAKE_L WLAN_PCIE_PERST_L WLAN_PCIE_CLKREQ_L 90_WLAN_PCIE_REFCLK_N 90_WLAN_PCIE_REFCLK_P 90_WLAN_PCIE_RDN 90_WLAN_PCIE_RDP 90_WLAN_PCIE_TDN 90_WLAN_PCIE_TDP
30 GPIO_0 12 PCIE_WAKE* 14 PCIE_PRST* 13 PCIE_CLKREQ* 16 PCIE_REFCLK_N 17 PCIE_REFCLK_P 20 PCIE_RDN 21 PCIE_RDP 18 PCIE_TDN 19 PCIE_TDP
DC BLOCKS LOCATED ON AP SIDE SWIZZLE DATA LANE ON TOP-LEVEL
30 29 IN 30 29 BI
29 IN
29 IN
JTAG_SEL
51
WLAN_JTAG_SWDCLK WLAN_JTAG_SWDIO OSCAR_CONTEXT_A
OSCAR_CONTEXT_B
11 JTAG_SEL 31 JTAG_TCK(GPIO_2) 34 JTAG_TMS(GPIO_3) 32 JTAG_TDI(GPIO_4) NC 35 JTAG_TDO(GPIO_5) 33 JTAG_TRST(GPIO_6)
51 30 29 WLAN_PCIE_PERST_L
GND
B
1 C5215_RF
100PF
5%
2
16V NP0-C0G
01005
1 15 25 27 29 37 44 46 51 52 53 57
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
WIFI_BT
U5201_RF
LBEE5U8ZKC-646
LGA
THRM_PAD
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
2G_ANT 45 50_WLAN_G_ANT 5G_ANT 58 50_WLAN_A_ANT
D
WIFI_BT
R5214_RF
0
50_WIFI_2G_NOTCHPLEXER_IN
1
2
WIFI_BT
C5213_RF 0.2PF
+/-0.1PF 16V NP0-C0G 01005
NOSTUFF
5% 1/20W
MF 201
WIFI_BT
1 C5211_RF
0.2PF
+/-0.05PF
2
25V COG-CERM
0201
NOSTUFF
BI 50
WIFI_BT
R5215_RF
0
1
2
WIFI_BT
5%
1/20W
C5208_RF MF
0.2PF
201
+/-0.1PF 16V
NP0-C0G
01005
NOSTUFF
WIFI_BT
FL5201_RF
5.15-5.92GHZ
LFB185G53CGCD878
50_WIFI_5G_BPF_RADIO 1
3 50_WIFI_5G_BPF_MATCH
WIFI_BT
R5216_RF
0
1
2
WIFI_BT
C5212_RF 0.2PF
+/-0.1PF 16V NP0-C0G 01005 NOSTUFF
2
WIFI_BT
C5216_RF 0.2PF
+/-0.1PF 16V NP0-C0G 01005 NOSTUFF
5% 1/20W
MF 201
50_WIFI_5G_IN_OUT
WIFI_BT
C5217_RF 0.2PF
+/-0.1PF 16V NP0-C0G 01005 NOSTUFF
BI 50
GPIO_1 8 PCIE_DEV_WAKE
IN 29 30
BT_HOST_WAKE 43 HOST_WAKE_BT
OUT 29
BT_DEV_WAKE 42 WAKE_BT
IN 29 30
C
BT_UART_CTS* 38 BT_UART_CTS_L
IN 29
1 WIFI_BT R5210_RF
BT_UART_RTS* 39 BT_UART_RTS_L BT_UART_RXD 41 BT_UART_RXD BT_UART_TXD 40 BT_UART_TXD
OUT 29 IN 29 30
OUT 29 30
100K 5% 1/32W MF 2 01005
BT_PCM_CLK 49 BT_PCM_CLK BT_PCM_SYNC 50 BT_PCM_SYNC
BT_PCM_IN 48 BT_PCM_IN BT_PCM_OUT 47 BT_PCM_OUT
BI 29 BI 29 IN 29 OUT 29
UART_RTS(GPIO_7) UART_CTS(GPIO_8)
UART_RX(GPIO_9) UART_TX(GPIO_10)
56 WLAN_UART_RTS_L 4 WLAN_UART_CTS_L 3 WLAN_UART_RXD 2 WLAN_UART_TXD
OUT 29 30 IN 29 30 IN 29 30
OUT 29 30
SECI_TX(GPIO_13) 6 SECI_RX(GPIO_14) 5
RF_SW_CTRL_8 7
WLAN_COEX_TXD WLAN_COEX_RXD
NC
WIFI_BT
R5206_RF
0.00
1
2
0% 1/32W
MF 01005
BB_COEX_UART_RXD 30 35
98
97
96
95
94
93
WIFI_BT
R5205_RF
0.00
1
2
BB_COEX_UART_TXD 30 35
B
0% 1/32W
MF 01005
PP_WLAN_VDDIO_1V8 51
1 WIFI_BT R5201_RF
10K
5%
1/32W
MF
2
01005 NOSTUFF
A
JTAG_SEL 51
1 WIFI_BT R5202_RF
10K 5% 1/32W MF 2 01005
MODULE BOOT-STRAPPED TO PCIE INTERNALLY
8
7
6
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
5
4
3
SYNC_MASTER=N/A
A SYNC_DATE=N/A
PAGE TITLE
WIFI/BT: MODULE AND FRONT END
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
52
SHEET
51
OF OF
55 54
2
1
8
7
6
STOCKHOLM
https://www.mobile-manuals.com/
5
4
3
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
2
1
C2101
R2100
L2102
U2100
D
REMOVING BULK CAP 4.7UF 0402 --> BECAUSE OF OTHER BULK CAPS IN LAYOUT
52
31 26 23
14 12 10 17 16 15
IN
51 48 39
PP_VCC_MAIN
SVDD B7 ESE_VDD C5
VUP G2 TVDD E7 NC SVDD_IN G1
54 52 29 IN PP_STOCKHOLM_1V8_S2R
RADIO_STOCKHOLM
1 C5302_RF
1UF
20%
2
10V X5R
C6 C7 D7 NC D3
PP_STOCKHOLM_VDD
VOLTAGE=1.80V
PP_STOCKHOLM_ESE VOLTAGE=1.80V
RADIO_STOCKHOLM
1 C5303_RF
0.1UF
20%
RADIO_STOCKHOLM
1 C5304_RF
1UF
20%
2
10V X5R
0201
RADIO_STOCKHOLM
1 C5305_RF
0.1UF
20%
2
6.3V X5R-CERM
01005
52 51
14
PP_VCC_MAIN 10 12
IN
48 39 31 26 23 17 16 15
RADIO_STOCKHOLM
C5306_RF
1
0.22UF
20%
1
RADIO_STOCKHOLM
C5307_RF
0.22UF
20%
C5312_RF
D5
C5
VDD/RF_IF_VDD VBAT VDHF PVDD
C
0201
2
6.3V X5R-CERM
01005
6.3V X5R
2
0201
2
6.3V X5R
0201
220PF
STOCKHOLM_ANT_MATCH 12
1 C5314_RF 1 C5315_RF
C
390PF
220PF
T5301_RF
ATB201206E-20011
0805
STOCKHOLM_HOST_WAKE 30 29 OUT
D1 IRQ
U5301_RF
PN65V
UFLGA
52 STOCKHOLM_RF_DATA_IO
SIM_SWIO A4
STOCKHOLM_SIM_SWP
R5319_RF
1.00K
1
2
5% RADIO_STOCKHOLM 1/32W
MF 01005
BI 30 54
VDD VDD_RF
U5302_RF
AS3923-B0-BWLT
WLCSP
1 C5310_RF
560PF
10%
2
50V X7R-CERM
0201
RADIO_STOCKHOLM
3 BAL1
4 UNBAL
2% 50V NPO-COG
0402
2%
2
50V C0G
0402
2%
2
50V NPO-COG
0402
C5313_RF
33PF
29
STOCKHOLM_ANT
1 C5316_RF 330PF
52 29 32 30 32 30 30 29 30 29 30 29 30 29 52 29
ALWAYS ON PULL-UP --> NC B3
STOCKHOLM_FW_DWLD_REQ IN
A1
OUT BB_REQUEST_XO_CLK
A2
IN REF_CLK_FROM_BB
A3
STOCKHOLM_UART_RXD
C1
IN
STOCKHOLM_UART_TXD
D2
OUT
STOCKHOLM_CTS_L
B1
IN
STOCKHOLM_RTS_L OUT
B2
STOCKHOLM_ENABLE
E1
IN
E3 NC E4 NC F4 NC E6 NC A7 NC A6
NC C3
SVDD_REQ DWL CLK_REQ CLK_XTAL1 RX TX CTS RTS VEN
SMX_RST* SMX_CLK ESE_IO1 ESE_IO2 ESE_IO3 ESE_IO4
XTAL2
SIM_VCC SIM_PMU_VCC
TX_PWR_REQ
ESE_DWPM_DBG ESE_DWPS_DBG
ANT1 RXP/RF_CLK_RX
TX1 TX2 RXN/RF_CLK_RX ANT2 VMID
RF_CLK_TX RF_DATA_IO
A5 VOLTAGE=1.80V PP_PN65_VCC_SIM
OUT
B5
PP_PN65_SIM_PMU
IN
54
F2 NC
D5 NC E5 NC
1R5303 10K
5% 1/32W
MF
G7 F6
NC
STOCKHOLM_RF_CLK_RX
R5316_RF
0.00
1
2
2 01005 STOCKHOLM_RF_CLK_RX_ASM3923
G3 NC
G5 NC F5 G6
NC F7
0% 1/32W
NC
MF
52 29 STOCKHOLM_ENABLE
01005
R5317_RF
0.00
STOCKHOLM_RF_CLK_TX 1
2 STOCKHOLM_RF_CLK_TX_ASM3923
F1
B4
R5318_RF
0.00
52 STOCKHOLM_RF_DATA_1IO
2
0% 1/32W
MF 01005
STOCKHOLM_RF_DATA_IO_ASM3923
A2 RF_IF_VDD A4 RF_DATA_IO A5 RF_CLK_RX B2 RF_CLK_TX
A1 TIO A3 GP_IO B1 NRES
CDMP1 B3 CDMP2 B4
L5301_RF
78NH-5%-0.97A-0.13OHM
STOCKHOLM_CDMP2
1
2
RFO1 RFO2
C4
0402
STOCKHOLM_RFO1
L5302_RF
C3 STOCKHOLM_RF0278NH-5%-0.97A-0.13OHM
1
2
RFI1 D1 STOCKHOLM_RFI1
0402
RFI2 C1 STOCKHOLM_RFI2
VSP_RF D3 STOCKHOLM_VSP_RF
VSP C2 STOCKHOLM_VSP
1 C5308_RF
1UF
1 C5309_RF
0.022UF
1 C5311_RF
560PF
10%
2
50V X7R-CERM
0201
RADIO_STOCKHOLM
2 BAL0
1 GND
12
2% 25V NPO-COG 0201
TPA53031_RF
TP-P55
TPA53041_RF
TP-P55
2%
2
25V NPO-COG
0201
B5 VSS_DMP
D2 VSS
D4 VSS_RF
B
STOCKHOLM_VMID
0% 1/32W
MF 01005
20%
2
6.3V X5R
0201
RADIO_STOCKHOLM
10%
2
6.3V X5R-CERM
0201
RADIO_STOCKHOLM
B
E2 VSS B6 GND C4 GND D4 GND D6 GND F3 GND G4 TVSS C2 PVSS
RADIO_STOCKHOLM
1 C5317_RF
0.1UF
20%
2
6.3V X5R-CERM
01005
TP530A1_R1F STOCKHOLM_TIO
TP-P55
TPA53021_RF
TP-P55
54 52 29 PP_STOCKHOLM_1V8_S2R
52 29 IN 52 29 IN
STOCKHOLM_ENABLE STOCKHOLM_FW_DWLD_REQ
NOSTUFF
1 RADIO_STOCKHOLM R5301_RF
100K
5% 1/32W MF 2 01005
1 RADIO_STOCKHOLM R5302_RF
100K
5% 1/32W MF 2 01005
A
SYNC_MASTER=N/A
A SYNC_DATE=N/A
PAGE TITLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
SIZE
051-9903 D
REVISION
7.0.0
BRANCH
PAGE
53 OF 55
SHEET
52 OF 54
8
7
6
5
4
3
2
1
https://www.mobile-manuals.com/
8
7
6
5
4
3
ON-BOARD JUMPER FLEX
D
UAT JUMPER
L5408_RF
120NH-5%-40MA
PAC2_VDD_3V0_FILTER
1
2
0201
PAC_VDD_3V0
29
1 C5405_RF
33PF
5%
2
16V NP0-C0G
01005
1 C5403_RF
0.01UF
10%
2
25V X5R-CERM
0201
6 VDD
C
RFFE2_CLK_BUFFER
35
R5401_RF
0
1
2
5% 1/20W
MF 201
SCLK_FILT
SDAT_FILT
1 C5401_RF
33PF
5%
2
16V NP0-C0G
01005
U5411_RF
RF1331
5 SCLK WLCSP VIO 3
4 SDAT
1 RF1A 10 RF1B
9 RF2A 8 RF2B
VIO_FILT
L5407_RF
120NH-5%-40MA
1
2 RFFE_VIO_S2R 29
0201
1 C5408_RF
0.01UF
10%
2
25V X5R-CERM
0201
1 C5404_RF
33PF
5%
2
16V NP0-C0G
01005
11 GNDA 2 RFGND1 7 RFGND2
RFFE2_DATA_BUFFER
35
R5402_RF
0
1
2
5% 1/20W
MF 201
1 C5402_RF
33PF
5%
2
16V NP0-C0G
01005
L5403_RF
13NH-280MA
L_2AB 1
2
C5407_RF
12PF
UAT_MID
12
UAT
TP3
P2MM-NSM 1 SM
PP
B
1 C5409_RF 03015
0.5PF
0.05PF
2% 25V C0G-CERM 0201
2
25V NP0-C0G
0201
L_1B
L5402_RF
13NH-280MA
1
2
03015
L_1A
L5401_RF
27NH
1
2
03015
1
L5400_RF
13NH-280MA
03015
2
A
8
7
6
5
4
3
2
1
D
C
B
A
PAGE TITLE
JUMPER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PAGE
54
SHEET
53
OF OF
55 54
2
1
8
7
https://www.mobile-manuals.com/
6
5
4
3
DSDS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
PP_LDO6
54 33 31 30
1 C5501_RF
2.2UF
20%
2
6.3V X5R
0201-1
NOSTUFF
1R5501_RF
15.00K 1% 1/32W MF 201005
NOSTUFF
VCC
8
U5501_RF
34 30
DSDS_SIM_CLK
ST33F1MFE
5 CLK UFDFPN SWIO 2 DSDS_SIM_SWP
30 54
C
34 30
DSDS_SIM_DATA
R5503_RF 34 30
DSDS_SIM_RESET
0.00
1
2
30 DSDS_SIM_DATA_R
6 RST 4 IO0
IO1 3 NC NC1 7 NC
9 EPAD
1 GND
0%
1/32W MF
NOSTUFF
01005
NOSTUFF
52 29 29
PP_STOCKHOLM_1V8_S2R STOCKHOLM_VDD_MUX_3V0
1 C5502_RF
2.2UF
A2
D2
20%
B
2
6.3V X5R
0201-1
V+ VIO
NOSTUFF
U5502_RF
54 33 31 30
PP_LDO5
R5504_RF
0.00
1
2
PP_PN65_SIM_PMU
52 54
0% 1/32W
MF 01005
54 29 IN
54 33 31 30
STOCKHOLM_SIM_SEL PP_LDO5
TS3DS26227YZT D1 4FF_SIM_SWP
A1 IN1
WCSP NC1 NO1 B1 DSDS_SIM_SWP
D3 NC2
COM1 C1 STOCKHOLM_SIM_SWP
BI 30 54 BI 30 54 BI 30 52 54
R5505_RF
4FF_SIM_SWP
54 30
0.00
1
2
STOCKHOLM_SIM_SWP 30 52 54
0% 1/32W
MF 01005
54 33 31 30
54 52 OUT
PP_LDO6
PP_PN65_SIM_PMU VOLTAGE=3.00V
B3 NO2 C3 COM2
IN2 A3 STOCKHOLM_SIM_SEL
GND NOSTUFF
1 R5502_RF
10K
1%
1/32W
MF
01005
RADIO_BB
2
29 54
NOSTUFF DEFAULT LOW = 4FF
C2
B2
A
8
7
6
5
4
3
2
1
D
C
B
A
PAGE TITLE
JUMPER
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
DRAWING NUMBER
051-9903
REVISION
7.0.0
BRANCH
SIZE
D
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
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