Home ›

File info: application/pdf · 30 pages · 4.51MB

V13700D/M

Overview. The V13700M/D series consists of two current controlled transconductance amplifiers, each with differential inputs and a push-pull output.

PDF Datasheet

Coolaudio Semiconductors - COOLAUDIO International Ltd

Full PDF Document

If the inline viewer fails, it will open the original document in compatibility mode automatically. You can also open the file directly.

Extracted Text

Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers
V13700D/M

Overview The V13700M/D series consists of two current controlled transconductance amplifiers, each with differential inputs and a push-pull output. The two amplifiers share common supplies but otherwise operate independently. Linearizing diodes are provided at the inputs to reduce distortion and allow higher input levels. The result is a 10 dB signal-tonoise improvement referenced to 0.5 percent THD. High impedance buffers are provided which are especially designed to complement the dynamic range of the amplifiers. The output buffers of the V13700M/D differ from those of the LM13600 in that their input bias currents (and hence their output DC levels) are independent of IABC. This may result in performance superior to that of the LM13600 in audio applications.
Its features are:
� gm adjustable over 6 decades � Excellent gm linearity � Excellent matching between amplifiers � Linearizing diodes � High impedance buffers � High output signal-to-noise ratio
Block Diagram and Pin Description

AMP BIAS INPUT
16

Dual-In-Line and Small Outline Packages

DIODE BIAS
15

INPUT (+)
14

INPUT (-) OUTPUT

BUFFER BUFFER V+ INPUT OUTPUT

AMP DIODE INPUT INPUT OUTPUT V- BUFFER BUFFER

BIAS BIAS

(+)

(-)

INPUT OUTPUT

INPUT

00798102

V13700D/M

Electrical Characteristics Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage V13700M/D
Differential Input Power Dissipation (Note 2) TA = 25�C
V13700M/D Amplifier Bias Current (IABC) Output Short Circuit Duration
Diode Bias Current (ID) Buffer Output Current (Note 3) Operating Temperature Range
V13700M/D DC Input Voltage Storage Temperature Range Soldering Information Dual-In-Line Package Small Outline Package

36 VDC or �18 V Voltage �5 V
570 mW
2 mA Continuous
2 mA 20 mA
0 �C to +70 �C
+VS to -VS -65 �C to +150 �C Soldering (10 sec.) 260 �C Vapor Phase (60 sec.) 215 �C Infrared (15 sec.) 220 �C

V13700D/M

Electrical Characteristics (Note 4)

Parameter
Input Offset Voltage VOS Including Diodes Input Offset Change Input Offset Current

Conditions
Over Specified Temperature Range IABC = 5 �A
Diode Bias Current (ID) = 500 �A 5 �A~ IABC ~ 500 �A

Input Bias Current

Over Specified Temperature Range

Forward Transconductance (gm)
gm Tracking
Peak Output Current
Peak Output Voltage Positive Negative
Supply Current VOS Sensitivity Positive Negative
CMRR Common Mode Range
Crosstalk Differential Input
Current Leakage Current Input Resistance Open Loop Bandwidth
Slew Rate Buffer Input Current Peak Buffer Output
Voltage

Over Specified Temperature Range
RL = 0, IABC = 5 �A RL = 0, IABC = 500 �A RL = 0, Over Specified Temp Range
RL = , 5 �A IABC 500 �A RL = , 5 �A IABC 500 �A IABC = 500 �A, Both Channels
~VOS/~V+ ~VOS/~V
Referred to Input (Note 5) 20 Hz < f < 20 kHz
IABC = 0, Input = �4V IABC = 0 (Refer to Test Circuit)
Unity Gain Compensated (Note 5) (Note 5)

V13700M/D

Min Typ Max

0.4

0.3

0.5

0.1

0.1 0.6

0.4

6700 9600 13000

5400

0.3

350 500 650

300

12 14.2 -12 -14.4
2.6

20 150 20 150 80 110 �12 �13.5
100

0.02 100

0.2 100

0.5

Units
mV mV mV �A �A �mho
dB
�A
V
mA
�V/V �V/V dB
V dB
nA nA k~ MHz V/�s �A V

Note 1: "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 2: For operation at ambient temperatures above 25 �C, the device must be derated based on a 150 �C maximum junction temperature and a thermal resistance, junction to ambient, as follows: V13700M/D, 90 �C/W; V13700M/D, 110 �C/W. Note 3: Buffer output current should be limited so as to not exceed package dissipation. Note 4: These specifications apply for VS = �15 V, TA = 25 �C, amplifier bias current (IABC) = 500 �A, pins 2 and 15 open unless otherwise specified. The inputs to the buffers are grounded and outputs are open. Note 5: These specifications apply for VS = �15 V, IABC = 500 �A, ROUT = 5 k connected from the buffer output to -VS and the input of the buffer is connected to the transconductance amplifier output.
3

Schematic Diagram

V13700D/M
One Operational Transconductance Ampli er One Operational Transconductance Ampli er

Typical Application

V13700M V13700M

Voltage Controlled Low-Pass Filter Voltage Controlled Low-Pass Filter

Typical Performance Characteristics Input O set Voltage

V13700D/M
Input O set Current

Input O set Current (nA)

Input O set Voltage (mV)

Ampli er Bias Current (IABC) Input Bias Current

Ampli er Bias Current (IABC) Peak Output Current

Peak Output Current (A)

Input Bias Current (nA)

Peak Output Voltage and Common Mode Range (V)

Ampli er Bias Current (IABC)
Peak Output Voltage and Common Mode Range

Ampli er Bias Current (IABC) Leakage Current

Ampli er Bias Current (IABC) 5

Ambient Temperature (TA)

Input Leakage

V13700D/M
Transconductance

Transconductance (gm) - (mho)

Input Leakage Current (pA)

Input Resistance (M)

Input Di ential Voltage Input Resistance

Ampli er Bias Current (IABC)
Ampli er Bias Voltage vs Ampli er Bias Current

Ampli er Bias Resistance (mV)

Ampli er Bias Current (IABC) Input and Output Capacitance

Ampli er Bias Current (IABC) Output Resistance

Output Resistance (M)

Ampli er Bias Current (IABC) 6

Ampli er Bias Current (IABC)

Capacitance (pF)

Typical Performance Characteristics (Continued)
Distortion vs Di erential Input Voltage
Distortion vs Di erential Input Voltage

V13700D/M
Voltage vs Ampli er Bias Current
Voltage vs Ampli er Bias Current

OutpuOtutVpoluttaVgoeltRaelgaetiRveelative to 1 Vtolt1RVoMlSt (RdMB)S (dB)

OutpuOtutDipsuttorDtiisotnor(ti%o)n (%)

Di erential Input Voltage (mVpp) Di erential Input Voltage (mVpp)
Output Noise vs Frequency Output Noise vs Frequency

IABC Ampli er Bias Current (A) IABC Ampli er Bias Current (A)

OutpuOtutNpoiusteNCoiusrreeCntur(rpeAn/t1(/pHAz/)1/Hz)

Frequency (Hz) Frequency (Hz)

Unity Gain Follower Unity Gain Follower

V13700M V13700M

V13700D/M

Typical Performance Characteristics (Continued)

Leakage Current Test Circuit

Di erential Input Current Test Circuit

Leakage Current Test Circuit
-

V13700M
+

Leakage Curren-t Test Circuit Leakage Current Test Circuit
V13700M

-+ -
V13700M V13700M
+ +

Di erential Input Current Test Circuit
-
V13D7D0ii0MeerreennttiiaallIInnppuuttCCuurrr-reennttTTeessttCCiirrccuuiitt
+
V13700M
-+
V13700M V13700M
+ +

Circuit Description

The differential transistor pair Q4 and Q5 form a transconductance stage in that the ratio of their collector currents is

defined

the

diffVeIrNe=ntiakqlTinpInut

vI5oltag(e1a)ccording I4

the

transfer

function:

VIN =

kT q

I5 I4

(1)

wcuhrererentVsINofistrtahnesdisitfoferrsIe4Qn+5tiaaIl5nidn=pQuI4AtBrvCeoslptaeg(c2VetVi,)IvNIkNeT==l/yq.kWkqiqsTTiathpIInpnthroeIIxII54e54imxcaetp(e(11tlyi)o)2n6omf QV1a2t

25 �C and I5 and Q13, all

and I4 are transistors

the collector and diodes are

identical to equal

in size. IABC:

Transistors

and

with

DioI4de+DI15f=ormIABaC

curr(e2n)t

mirror

which

forces

the

sum

currents

and

kT q In

I5 I4

kT q

I5-I4 II44++II55==IIAABBCC I4

((22))

wI5haeprperIoAaBCchisetshuenaitmypalIni5fdietrhIb4eiaTsaycIluAoBrrrCesenrtieaspkpoqTlfiethdIen(t3oIn)tIIf54huengctaiioknqnTpcinan.IF5bI-o4Ier4

small differential input approximated as:

voltages

the

ratio

and

(3)

[VIN

IABCq 2kT

kkTT = I5 - qIq4

IInn

II(II54544) I4

kkTT qq

IABIIC55--II44 2 II44

[VII55INII44I2ABkCTqIIA2A2BBCC = I5 - I4

((33)) (4)

[
[ [
[
[ [

[VIN

IABCq 2kT

[VVININ

IIAABBCCqq 22kkTT

= IOUT (5)

==II55--II44

((44))

[VIN

IABCq 2kT

= IOUT

(5)

[VVININ

IIAABBCCqq 22kkTT

== IIOOUUTT

((55))

( (
[ [

(3) I5 I4 IABC
2

[VIN

IABCq 2kT

= I5 - I4

(4)

V13700D/M

Collector currents I4 and I5 are not very useful by themselves and it is necessary to subtract one current from the other. The remaining transistors and diodes form three current mirrors that produce an output current equal to I5 minus I4 thus:

[VIN

IABCq 2kT

= IOUT

(5)

The term in brackets is then the transconductance of the amplifier and is proportional to IABC.

Linearizing Diodes
For differential voltages greater than a few millivolts, Equation (3) becomes less valid and the transconductance becomes increasingly nonlinear. Figure 1 demonstrates how the internal diodes can linearize the transfer function of the amplifier. For convenience assume the diodes are biased with current sources and the input signal is in the form of current IS. Since the sum of I4 and I5 is IABC and the difference is IOUT, currents I4 and I5 can be written as follows:

I4 =

IABC 2

IOUT , 2

IABC 2

IOUT 2

I4 =

IABC 2

IOUT , 2

IABC 2

IOUT 2

Since the diodes and the input transistors have identical geometries and are subject to similar voltages and

( ( temperatures,

the

following

trkuqTe: kIqnITOUI2I2TIDDnI=O+U-I2I2TIDDsII=ss+-=IsIIs2s IIkAq=DTBC2IkIIAqDnTBC

IABC 2

IOUT 2

InABC 2

I+ABC 2

IOUT -2

IOUT 2

IABC 2

fo-r

IOUT |IS2| <

ID 2

for |IS| <

ID 2

(6) (6)

Notice that in deriving Equation (6) no approximations have been made and there are no temperature-dependent terms. The limitations are that the signal current not exceed ID/2 and that the diodes be biased with currents. In practice, replacing the current sources with resistors will generate insignificant errors.

V13700D/M
Applications Voltage Controlled Amplifiers Figure 2 shows how the linearizing diodes can be used in a voltage-controlled amplifier. To understand the input biasing, it is best to consider the 13 k resistor as a current source and use a Thevenin equivalent circuit as shown in Figure 3. This circuit is similar to Figure 1 and operates the same. The potentiometer in Figure 2 is adjusted to minimize the effects of the control signal at the output.
Figure 1. Linearizing Diodes
For optimum signal-to-noise performance, IABC should be as large as possible as shown by the Output Voltage vs. Amplifier Bias Current graph. Larger amplitudes of input signal also improve the S/N ratio. The linearizing diodes help here by allowing larger input signals for the same output distortion as shown by the Distortion vs. Differential Input Voltage graph. S/N may be optimized by adjusting the magnitude of the input signal via RIN (Figure 2) until the output distortion is below some desired level. The output voltage swing can then be set at any level by selecting RL. Although the noise contribution of the linearizing diodes is negligible relative to the contribution of the amplifier's internal transistors, ID should be as large as possible. This minimizes the dynamic junction resistance of the diodes (re) and maximizes their linearizing action when balanced against RIN. A value of 1 mA is recommended for ID unless the specific application demands otherwise.
10

V13700D/M
V13700M
Figure 2. Voltage Controlled Ampli er
Figure 3. Equivalent VCA Input Circuit
11

V13700D/M

Stereo Volume Control
The circuit of Figure 4 uses the excellent matching of the two V13700M/D amplifiers to provide a Stereo Volume Control with a typical channel-to-channel gain tracking of 0.3 dB. RP is provided to minimize the output offset voltage and may be replaced with two 510 resistors in AC-coupled applications. For the component values given, amplifier gain is derived for Figure 2 as being:

If VC is derived from a second signaVVlVVIsONIoONu=r=ce99t4h40eVV0nxIONxtIhAI=eABBCcC9ir4cu0itxbIeAcBoCmes an amplitude modulator or two-quadrant

multiplier as shown in Figure 5, where:

IO = IO =

--2ID2IIDSISIO(I(AI=ABBCC)-)2I=D=IS

-(-2IID2IAIDSIBSC)VRV=RINCIN2C2--2I-DI2SI2DIIDSISVR(IN(VCV2---++RR21IC1DIC.S4.4V(VV)-)

+ 1.4 RC

The constant term in the above equation may be cancelled by feeding IS x IDRC/2(V- + 1.4 V) into IO. The circuit of Figure 6 adds RM to provide this current, resulting in a four-quadrant multiplier where RC is trimmed such that VO = 0 V for VIN2 = 0 V. RM also serves as the load resistor for IO.

Stereo Volume Control (Continued)

V13700M
V13700M V13700M

V13700M V13700M V13700M
Figure 4. Stereo Volume Control Figure 4. Stereo Volume Control Figure 4. Stereo Volume Control

V13700D/M
V13700M
Figure 5. Amplitude Modulator
V13700M
Figure 6. Four-Quadrant Multiplier
Noting that the gain of the V13700M/D amplifier of Figure 3 may be controlled by varying the linearizing diode current ID as well as by varying IABC, Figure 7 shows an AGC Amplifier using this approach. As VO reaches a high enough amplitude (3VBE) to turn on the Darlington transistors and the linearizing diodes, the increase in ID reduces the amplifier gain so as to hold VO at that level.
13

V13700D/M
Voltage Controlled Resistors An Operational Transconductance Amplifier (OTA) may be used to implement a Voltage Controlled Resistor as shown in Figure 8. A signal voltage applied at RX generates a VIN to the V13700M/D which is then multiplied by the gm of the amplifier to produce an output current, thus: where gm 19.2IABC at 25 �C. Note that the attenuation of VO by R and RA is necessary to maintain VIN within the linear range of the V13700M/D input. Figure 9 shows a similar VCR where the linearizing diodes are added, essentially improving the noise performance of the resistor. A floating VCR is shown in Figure 10, where each "end" of the "resistor" may be at any voltage within the output voltage range of the V13700M/D.
V13700M V13700M
Figure 7. AGC Ampli er Figure 7. AGC Ampli er
V13700M V13700M
Figure 8. Voltage Controlled Resistor, Single-Ended Figure 8. Voltage Controll1e4d Resistor, Single-Ended

V13700M

V13700D/M

V13700M
Figure 9. Voltage Controlled Resistor with Linearizing Diodes

Figure 9. Voltage Controlled Resistor with Linearizing Diodes
Voltage Controlled Filters OTA's are extremely useful for implementing voltage controlled filters, with the V13700M/D having the advantage that the required buffers are included on the I.C. The VC Lo-Pass Filter of Figure 11 performs as a unity-gain buffer amplifier at frequencies below cut-off, with the cut-off frequency being the point at which XC/gm equals the closed-loop gain of (R/RA). At frequencies above cut-off the circuit provides a single RC roll-off (6 dB per octave) of the input signal amplitude with a -3 dB point defined by the given equation, where gm is again 19.2 x IABC at room temperature. Figure 12 shows a VC High-Pass Filter which operates in much the same manner, providing a single RC roll-off below the defined cut-off frequency. Additional amplifiers may be used to implement higher order filters as demonstrated by the two-pole Butterworth Lo-Pass Filter of Figure 13 and the state variable filter of Figure 14. Due to the excellent gm tracking of the two amplifiers, these filters perform well over several decades of frequency.

1/2V13700M

Figure 10. Floating Voltage Controlled Resistor

Figure 10. Floating Vo15ltage Controlled Resistor

V13700M

V13700D/M

Figure 11. Voltage Controlled Low-Pass Filter V13700M

Figure 12. Voltage Controlled Hi-Pass Filter
16

1/2V13700M

V13700D/M
1/2V13700M

Figure 13. Voltage Controlled 2-Pole Butterworth Lo-Pass Filter

1/2V13700M

Figure 14. Voltage Controlled State Variable Filter
17

V13700D/M
Voltage Controlled Oscillators The classic Triangular/Square Wave VCO of Figure 15 is one of a variety of Voltage Controlled Oscillators which may be built utilizing the V13700M/D. With the component values shown, this oscillator provides signals from 200 kHz to below 2 Hz as IC is varied from 1 mA to 10 nA. The output amplitudes are set by IA x RA. Note that the peak differential input voltage must be less than 5 V to prevent zenering the inputs.
A few modifications to this circuit produce the ramp/pulse VCO of Figure 16. When VO2 is high, IF is added to IC to increase amplifier A1's bias current and thus to increase the charging rate of capacitor C. When VO2 is low, IF goes to zero and the capacitor discharge current is set by IC. The VC Lo-Pass Filter of Figure 11 may be used to produce a high-quality sinusoidal VCO. The circuit of Figure 16 employs two V13700M/D packages, with three of the amplifiers configured as lo-pass filters and the fourth as a limiter/inverter. The circuit oscillates at the frequency at which the loop phase-shift is 360� or 180� for the inverter and 60� per filter stage. This VCO operates from 5 Hz to 50 kHz with less than 1% THD.

1/2V13700M

Figure 15. Triangular/Square-Wave VCO

1/2V13700M

V13700D/M
1/2V13700M

Figure 16. Ramp/Pulse VCO

Voltage Controlled Oscillators (Continued) 1/213700M

V13700D/M
1/213700M

1/213700M

Figure 17. Sinusoidal VCO

V13700M
Figure 18 shows how to build a VCO using one ampli er when the other ampli er is needed for another function.
Figure 18. Single Ampli er VCO
20

V13700D/M
Additional Applications Figure 19 presents an interesting one-shot which draws no power supply current until it is triggered. A positivegoing trigger pulse of at least 2 V amplitude turns on the amplifier through RB and pulls the non-inverting input high. The amplifier regenerates and latches its output high until capacitor C charges to the voltage level on the non-inverting input. The output then switches low, turning off the amplifier and discharging the capacitor. The capacitor discharge rate is speeded up by shorting the diode bias pin to the inverting input so that an additional discharge current flows through DI when the amplifier output switches low. A special feature of this timer is that the other amplifier, when biased from VO, can perform another function and draw zero stand-by power as well.
V13700M
Figure 19. Zero Stand-By Power Time
The operation of the multiplexer of Figure 20 is very straightforward. When A1 is turned on it holds VO equal to VIN1 and when A2 is supplied with bias current then it controls VO. CC and RC serve to stabilize the unity-gain configuration of amplifiers A1 and A2. The maximum clock rate is limited to about 200 kHz by the V13700M/D slew rate into 150 pF when the (VIN1�VIN2) differential is at its maximum allowable value of 5 V. The Phase-Locked Loop of Figure 21 uses the four-quadrant multiplier of Figure 6 and the VCO of Figure 18 to produce a PLL with a �5% hold-in range and an input sensitivity of about 300 mV.
21

V13700D/M

1/2V13700M

Figure 20. Multiplexer

1/2V13700M

Figure 21. Phase Lock Loop
The Schmitt Trigger of Figure 22 uses the amplifier output current into R to set the hysteresis of the comparator; thus VH = 2 x R x IB. Varying IB will produce a Schmitt Trigger with variable hysteresis.
22

V13700M V13700M

V13700D/M

Figure 22. Schmitt Trigger
Figure 22. Schmitt Trigger
Figure 23 shows a Tachometer or Frequency-to-Voltage converter. Whenever A1 is toggled by a positive-going input, an amount of charge equal to (VH�VL) Ct is sourced into Cf and Rt. This once per cycle charge is then balanced by the current of VO/Rt. The maximum FIN is limited by the amount of time required to charge Ct from VL to VH with a current of IB, where VL and VH represent the maximum low and maximum high output voltage swing of the V13700M/D. D1 is added to provide a discharge path for Ct when A1 switches low. The Peak Detector of Figure 24 uses A2 to turn on A1 whenever VIN becomes more positive than VO. A1 then charges storage capacitor C to hold VO equal to VIN PK. Pulling the output of A2 low through D1 serves to turn off A1 so that VO remains constant.

1/2V13700M 1/2V13700M

Figure 23. Tachometer Figure 23. Tachometer

V13700D/M

1/2V13700M

Figure 24. Peak Detector and Hold Circuit
The Ramp-and-Hold of Figure 26 sources IB into capacitor C whenever the input to A1 is brought high, giving a ramp-rate of about 1 V/ms for the component values shown. The true-RMS converter of Figure 27 is essentially an automatic gain control amplifier which adjusts its gain such that the AC power at the output of amplifier A1 is constant. The output power of amplifier A1 is monitored by squaring amplifier A2 and the average compared to a reference voltage with amplifier A3. The output of A3 provides bias current to the diodes of A1 to attenuate the input signal. Because the output power of A1 is held constant, the RMS value is constant and the attenuation is directly proportional to the RMS value of the input voltage. The attenuation is also proportional to the diode bias current. Amplifier A4 adjuststhe ratio of currents through the diodes to be equal and therefore the voltage at the output of A4 is proportional to the RMS value of the input voltage. The calibration potentiometer is set such that VO reads directly in RMS volts.

V13700M

V13700D/M

Figure 25. Sample-Hold Circuit

1/2V13700M

Figure 26. Ramp and Hold

V13700D/M

1/2V13700M

Figure 27. True RMS Converter Figure 27. True RMS Converter

The circuit of Figure 28 is a voltage reference of variable Temperature Coefficient. The 100 k potentiometer adjusts the output voltage which has a positive TC above 1.2 V, zero TC at about 1.2 V, and negative TC below 1.2 V. This is accomplished by balancing the TC of the A2 transfer function against the complementary TC of D1. The wide dynamic range of the V13700M/D allows easy control of the output pulse width in the Pulse Width Modulator of Figure 29. For generating IABC over a range of 4 to 6 decades of current, the system of Figure 30 provides a logarithmic current out for a linear voltage in. Since the closed-loop configuration ensures that the input to A2 is held equal to 0V, the output current of A1 is equal to I3 = -VC/RC. The differential voltage between Q1 and Q2 is attenuated by the R1,R2 network so that A1 may be assumed to be operating within its linear range.
From Equation (5), the input voltage to A1 is:

VIN1

-2kTI3 qI2

= -2kTVC qI2RC

VIN1

-2kTI3 qI2

= -2kTVC

qI2RC VB1

(R1+R2) R1

VIN1

VB1

(R1+R2) R1

VIN1

VB1 =

kT q

IC2 IC1

kT q

In IABC I1

VB1 =

kT q

IC2 IC1

kT q

In IABC I1

The voltage on the base of Q1 is then

VIN1

-2kTI3 qI2

= -2kTVC qI2RC

VIN1VB=1-=2qk(IR2T1I3+RR=21)

-2kTVC VqINI12RC

The ratio of the Q1 and Q2 collector currenVtsBV1isB=1de=(Rfi1nk+qeTRdR21bI)nyV:INIICC121

kT q

In IABC I1

VB1 =

kT q

IC2 IC1

kT q

In IABC I1

V13700D/M

Combining and solving for IABC yields:

IABC = I1 exp

2(R1+R2) VC R1I2RC

This logarithmic current can be used to bias the circuit of Figure 4 to provide temperature independent stereo attenuation characteristic.

1/2V13700M

Figure 28. Delta VBE Reference

27
V13700M

V13700M

IABC = I1 exp

2(R1+R2) VC R1I2RC

V13700D/M

1/2V13700M

Figure 28. Delta VBE Reference

V13700M

Figure 29. Pulse Width Modulator
28

V13700D/M

1/2V13700M 1/2V13700M

Package Dimensions SOP16

Figure 30. Logarithmic Current Source Figure 30. Logarithmic Current Source

V13700M V13700M
29

DIP16
V13700D

V13700D/M