Index of /pdf/hp/disc/7925
Flidl . - - - - - - - - - - - - - - ~~ PHAECWKLAERTDT - - - - - - - - - - - - - - - - , SERVICE MANUAL 79250 DISC DRIVE Manual part no. 07925-90913 Microfiche part no. 07925-90813 Printed: SEP 1983 Change 2 Printed in U.S.A. 07925-90913 E0983 IMPORTANT NOTICE This manual applies to the "D" version of the HP 7925 Disc Drive. Earlier "A" and "B" versions are documented in Service Manual part no. 07925-90903. MODELS COVERED The main part of this manual covers the HP 7925M and the HP 79258 Disc Drives.' Appendix A covers the HP 7925H Disc Drive. OPTIONS COVERED This manual covers option 015, as well as the standard HP 7925D Disc Drive. FOR U.S.A. ONLY The Federal Communications Commission (in 47 CFR 15.818) has specified that the following notice be brought to the attention of the users of this product. FEDERAL COMMUNICATIONS COMMISSION RADIO FREQUENCY INTERFERENCE STATEMENT Warning: This equipment generates, uses, and can radiate radio frequency energy and if not installed and used in accordance with the instructions manual, may cause interference to radio communications. It has been tested and found to comply with the limits for Class A computing devices pursuant to Subpart J of Part 15 of FCC Rules, which are designed to provide reasonable protection against such interference when operated in a commercial environment. Operation of this equipment in a residential area is likely to cause interference in which case the user at his own expense will be required to take whatever measures may be required to correct the interference. HEWLETT-PACKARD COMPANY P.O. BOX 39, BOISE, IDAHO 83707, U.S.A. IPRINTING HISTORY New editions incorporate all update material since the previous edition. Updating Supplements, which are issued between editions, contain additional and revised information to be incorporated into the manual by the user. The date on the title page changes only when a new edition is published. First Printing Change One Change Two SEP 1983 13 JAN 1984 2 APR 1984 NOTICE The information contained in this document is subject to change without notice. HEWLETT-PACKARD MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Hewlett-Packard shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this material. This document contains proprietary information which is protected by copyright. All rights are reserved. No part of this document may be photocopied or reproduced without the prior written consent of Hewlett-Packard Company. Copyright© 1983, 1984 by HEWLETT-PACKARD COMPANY ii Change 2 PREFACE I This manual provides field service information for the Hewlett-Packard 7925D Disc Drive and is intended for use by service-trained personnel. The HP 7925D Disc Drive is a state-of-the-art, massmemory (120 Mbyte) product and, because of its product design, a modular replacement philosophy has been implemented to minimize on-site repair time. On-site troubleshooting and repair is assured through the use of the information provided in this manual and the maintenance aids contained in the service kit. For disc drive operating instructions, refer to the HP 7925D Disc Drive User's Manual, part no. 07925-90911. For installation instructions, refer to the HP 7925D Disc Drive Installation Manual, part no. 07925-90912. WARNING The HP 7925 Disc Drive contains magnetic material (spindle assembly and actuator assembly), a potential hazard to personnel during shipping. Special packaging and markings are required by the United States Government for shipping. If reshipment of the disc drive becomes necessary, refer to the HP 7925D Disc Drive Installation Manual, part no. 07925-90912 for repackaging instructions. If reshipment of the spindle assembly and/or the actuator assembly becomes necessary, refer to section V of this manual for repackaging information. The contents of this manual are organized as follows: · Section I provides the theory of operation in which each major circuit group is described in detail. · Section II provides preventive maintenance information, maintenance precautions, lists standard and special tools and test equipment required to service the disc drive, the preventive maintenance schedule, and required preventive maintenance inspection and cleaning procedures. · Section III provides step-by-step alignment and adjustment procedures for the disc drive. · Section IV provides troubleshooting information which includes functional diagrams of the disc drive and troubleshooting flowcharts. · Section V provides step-by-step removal and replacement procedures for each field-replaceable electrical and electro-mechanical assembly used in the disc drive. · Section VI provides listings of all field-replaceable parts and an illustrated parts breakdown for the disc drive, as well as replacement part ordering information. · Appendix A provides changes and additions to the information contained in the main manual needed for HP 7925H Disc Drive service. Change 2 iii/iv CONTENTS I Section I THEORY OF OPERATION. Introduction Addressing Structure Addressing Modes Surface Mode Cylinder Mode Sector Format : Functional Description I/O Control System Tag Bus Logic Control Bus Logic Select Logic Unit Identity Logic Status Logic Attention Logic Spindle Rotation System Spindle Logic Initialization Door Control Logic , Run Spindle Command Logic Phase Encoding and Decoding Speed Control Motor Current Regulation Dynamic Braking Speed Down Detection Overcurrent Protection Overvoltage Protection Head Positioning System Initial Head Load Operation Normal Head Unload Operation Seek Operation Offset Operation Recalibrate Operation Emergency Retract Operation Sector Sensing System Read/Write System Head Selection Read Mode Operation Write Mode Operation Read/Write Fault Detection Fault Detection System Illegal Address Detection Timeout Fault Detection '" AGC Fault Detection Carriage Back Fault Detection Interlock Fault Detection Read/Write Fault Detection Air Circulation and Filtration System Power Distribution System Power Panel Assembly Power Supply Assembly Voltage Regulator Circuits Voltage Protection Circuits Supply Voltage Distribution Page 1-1 1-1 1-2 1-2 1-2 1-3 1-5 1-6 1-6 1-9 1-9 1-10 1-10 1-11 1-12 1-12 1-12 1-12 1-12 1-13 1-13 1-15 1-15 1-15 1-15 1-15 1-15 1-19 1-20 1-21 1-22 1-23 1-23 1-24 1-24 1-25 1-25 1-26 1-26 1-26 1-27 1-28 1-28 1-28 1-28 1-30 1-32 1-32 1-32 1-32 1-32 1-32 Section II MAINTENANCE Introduction Maintenance Precautions Service Tools and Test Equipment Standard Tools ., Standard Test Equipment Special Tools Special Test Equipment DSU Controls and Indicators DSU Operation Preventive Maintenance , General Cleaning Information Preliminary Steps Servicing the Air Circulation System Pack Lock Lubrication Cleaning Data and Servo Heads Cleaning Carriage Rails and Bearings Cleaning the Spindle Assembly and Pack Chamber Assembly Page 2-1 2-1 2-1 2-1 2-1 2-1 2-2 , 2-5 2-6 2-7 2-7 2-7 2-8 2-8 2-10 2-10 2-12 Section III Page ALIGNMENT AND ADJUSTMENT Introduction 3-1 Service Adjustments not Requiring the DSU 3-1 Door Lock Assembly 3-1 Door Unlock Solenoid 3-1 Door Closed and Door Locked Switches 3-1 Carriage Latch and Detector Assembly 3-2 Head Cam Alignment 3-2 Service Adjustments Requiring the DSU 3-2 Installing the DSU 3-3 Exercising the Disc Drive 3-4 Velocity Command Gain Adjustment 3-5 Head Alignment Procedures 3-6 Warmup 3-7 Circumferential Alignment Check 3-7 Circumferential Alignment 3-8 Track Follower Alignment 3-9 Servo Head Alignment 3-9 I · · · · · · · Data Head Alignment Check 3-19 Data Head Alignment 3-20 On-Line Checkout 3-21 Section IV TROUBLESHOOTING Diagnostic Test Programs Troubleshooting Flowcharts Power Sources Visual Indication of Drive Status Disc Service Unit System Functional Diagrams Wiring Connections Power Distribution Page 4-1 4-1 4-1 4-2 4-2 4-2 4-2 4-2 v I CONTENTS (continued) Section V Page REMOVAL AND REPLACEMENT Introduction 5-1 Preparation for Service 5-1 Shroud Removal and Replacement 5-1 Door and Side Cover Removal and Replacement 5-1 Prefilter Removal and Replacement 5-2 Absolute Filter Removal and Replacement 5-2 Front Frame Assembly 5-2 Indicator Assembly PCA-A11 and Incandescent Lamp Removal and Replacement 5-3 Pack Chamber Assembly Removal and Replacement 5-3 Printed Circuit Card Removal and Replacement 5-3 Card Cage PCA's 5-3 Spindle Logic PCA-A8 5-4 Read/Write Preamplifier PCA-A6 5-4 Card Cage Chassis and Motherboard PCA-A7 .. 5-5 Power and Motor Regulator PCA-A9 5-5 Fault Indicator PCA-A12 5-5 Pack Detector Assembly Removal and Replacement 5-6 Data and Servo Head Removal and Replacement 5-6 Carriage Latch and Detector Assembly Removal and Replacement 5-7 Actuator Assembly Removal and Replacement .... 5-9 Velocity Transducer and Velocity Transducer Shaft 5-10 Head Cam 5-11 Head Cam Support 5-11 Spindle Assembly Removal and Replacement 5-13 Encoder PCA-A10 Removal and Replacement 5-14 Spindle Bottom Cover 5-14 Spindle Ground Contact and Encoder Disc 5-15 Pack Lock 5-15 Blower Motor Removal and Replacement 5-16 Blower Motor Starting Capacitor Removal and Replacement 5-16 Power Supply Assembly Removal and Replacement 5-16 Door Lock Assembly Removal and Replacement 5-17 Power Panel Assembly Removal and Replacement 5-17 Section VI REPLACEABLE PARTS Introduction Ordering Information Page 6-1 6-1 APPENDIX A A-l vi Change 2 ILLUSTRATIONS I Title Page Addressing Structure of an HP 7925 Disc Drive 1-1 Sector Clock and Index Generation 1-2 Logical vs. Physical Sectors 1-3 Surface Mode vs. Cylinder Mode 1-3 Sector Format 1-4 HP 7925 Disc Drive, Simplified Block Diagram 1-5 Disc Drive Interface 1-6 Tag Bus Timing 1-9 Phase Selection Timing ,." 1-14 Servo and Data Track Assignments 1-17 Air Circulation and Filtration System 1-30 Types of Contaminants and Critical Elements 1-31 Special Service Tools 2-3 DSU Test Module, Controls and Indicators " .2-5 Head Alignment Meter Calibrations 2-6 Measuring Absolute Filter Air Pressure 2-9 Pack Lock Lubrication Tool 2-10 Examples of Head Contamination 2-11 Prepared Head Cleaning Tool 2-12 Connector Assembly 3-1 Use of Head Cam Alignment Tool , 3-3 Head Cam Tool Alignment 3-4 DSU Installed 3-5 Data Head Alignment Locations , 3-7 Thermometer 3-7 Use of Circumferential Timing Tolerance Label 3-8 Interpretation of Circumferential Timing Data Graph 3-10 Data Graph Example 1 3-11 Data Graph Example 2 3-12 Data Graph Example 3 , .. 3-13 Data Graph Example 4 3-14 Data Graph Example 5 3-15 Data Graph Example 6 , 3-16 Data Graph Example 7 3-17 Track Follower Alignment 3-18 Actuator Crash Stop Clearance 3-20 Power-Up Troubleshooting Flowchart .. , , .. 4-10 Blower Troubleshooting Flowchart 4-11 DRIVE FAULT Indicator Troubleshooting Flowchart 4-12 IL LED Indicator Troubleshooting Flowchart 4-13 W-AR LED Indicator Troubleshooting Flowchart 4-15 R-W LED Indicator Troubleshooting Flowchart 4-16 W-AC LED Indicator Troubleshooting Flowchart '.' 4-17 MH LED Indicator Troubleshooting Flowchart 4-18 Title Page DC-W LED Indicator Troubleshooting Flowchart 4-19 AGC LED Indicator Troubleshooting Flowchart 4-20 CB LED Indicator Troubleshooting Flowchart 4-21 T LED Indicator Troubleshooting Flowchart 4-22 Door Unlock Solenoid Troubleshooting Flowchart 4-23 DOOR UNLOCKED Indicator Troubleshooting Flowchart 4-25 Unit Select Indicator Troubleshooting Flowchart .. , 4-27 READ ONLY Indicator Troubleshooting Flowchart 4-28 DRIVE READY Indicator Troubleshooting Flowchart 4-29 RUN/STOP Switch Troubleshooting Flowchart .. 4-30 Spindle Rotation Troubleshooting Flowchart 4-31 Head Positioning Troubleshooting Flowchart 4-34 Emergency Return (CRB) Troubleshooting Flowchart 4-37 Power Panel Assembly, Wiring Diagram 4-38 Mainframe Assembly, Wiring Diagram , 4-39 I/O Control System, Functional Diagram 4-41 Spindle Rotation System, Functional Diagram 4-43 Head Positioning System, Functional Diagram 4-45 Sector Sensing System, Functional Diagram 4-47 Read/Write System, Functional Diagram 4-49 Fault Detection System, Functional Diagram .4-51 Pack Detector Assembly 5-6 Using the Head Installation Tool , 5-8 Head Positioning 5-9 Use of Head Cam Alignment Tool , 5-12 Head Cam Tool Alignment 5-13 Spindle Screw Locations 5-15 Blower Motor Starting Capacitor 5-17 HP 7925D Disc Drive, Exploded View 6-5 Mainframe Assembly, Exploded View 6-9 Front Frame Assembly, Exploded View 6-10 Pack Chamber Assembly, Exploded View 6-13 Spindle Assembly, Exploded View 6-14 Power Supply Assembly, Exploded View 6-17 Actuator Assembly, Exploded View 6-19 Air Distribution Assembly, Exploded View 6-21 Operator Panel and Lower Card Cage Assembly, Exploded View 6-23 Power Panel Assembly, Exploded View 6-25 Disc Pack, Exploded View 6-27 Termination Assembly, Exploded View 6-29 vii I TABLES Title Tag Bus Command Summary Control Bus Bit Assignments Status Word Bit Assignments " Write Current Reduction vs. Cylinder Address Summary of Timeout Conditions Fault Events Standard Tools Special Tools Preventive Maintenance Routines Description of Circumferential Timing Conditions Visual Indication of Drive Status Disc Service Unit (DSU) Functions Flowchart Symbols Motherboard PCA-A7 Signal Distribution List Page 1-7 1-10 1-10 1-26 1-27 1-28 2-2 2-2 2-7 3-19 4-3 4-6 4-9 4-53 Title Page Power Distribution List HP 7925D Disc Drive, Replaceable Parts Mainframe Assembly, Replaceable Parts Front Frame Assembly, Replaceable Parts Pack Chamber Assembly, Replaceable Parts Spindle Assembly, Replaceable Parts Power Supply Assembly, Replaceable Parts Actuator Assembly, Replaceable Parts Air Distribution Assembly, Replaceable Parts Operator Panel and Lower Card Cage Assembly, Replaceable Parts Power Panel Assembly, Replaceable Parts Disc Pack, Replaceable Parts Termination Assembly, Replaceable Parts Reference Designations and abbreviations Code List of Manufacturers " 4-61 6-3 '" . 6-7 6-10 6-11 6-14 6-15 6-18 6-20 6-22 6-24 6-26 6-28 6-30 6-31 viii SAFETY CONSIDERATIONS KEEP WITH MANUAL GENERAL - This product and related documentation must be reviewed for familiarization with safety markings and instructions before operation. SAFETY SYMBOLS 7 Instruction manual symbol: the product will be marked with this symbol when it is necessary for the user to refer to the instruction manual in order to protect the product against damage. Indicates hazardous voltages. ..L Indicates earth (ground) terminal. WARNING The WARNING sign denotes a hazard. It calls attention to a procedure, practice, or the like, which, if not correctly performed or adhered to, could result in injury. Do not proceed beyond a WARNING sign until the indicated conditions are fully understood and met. I I CAUTION The CAUTION sign denotes a . . hazard. It calls attention to an operating procedure, practice, or the like, which, if not correctly performed or adhered to, could re- sult in damage to or destruction of part or all of the product. Do not proceed beyond a CAUTION sign until the indicated condi- tions are fully understood and met. SAFETY EARTH GROUND - This is a safety class I product and is provided with a protective earthing terminal. An uninterruptible safety earth ground must be provided from the main power source to the product input wiring terminals, power cord, or supplied power cord set. Whenever it is likely that the protection has been impaired, the product must be made inoperative and be secured against any unintended operation. BEFORE APPLYING POWER - Verify that the product is configured to match the available main power source per the input power configuration instructions provided in this manual. If this product is to be energized via an autotransformer (for voltage reduction) make sure the common terminal is connected to the earth terminal of the main power source. SERVICING WARNING Any servicing, adjustment, maintenance, or repair of this product must be performed only by servicetrained personnel. Adjustments described in this manual "may be performed with power supplied to the product while protective covers are removed. Energy available at many points may, if contacted, result in personal injury. Capacitors inside this product may still be charged even when disconnected from its power source. To avoid a fire hazard, only fuses with the required current rating and of the specified type (normal blow, time delay, etc.) are to be used for replacement. To install or remove a fuse, first disconnect the power cord from the device. Then, using a small screwdriver, turn the fuseholder cap counterclockwise until the cap releases. Install the proper fuse in the cap -:- either end of the fuse can be installed in the cap. Next, install the fuse and fuseholder cap in the fuseholder by pressing the cap inwards and then turning it clockwise until it locks in place. ix/x THEORY OF OPERATION ·I~ 1-1. INTRODUCTION This section contains the theory of operation for the disc drive. Included are a description of its addressing structure and modes, its sector format, and a detailed discussion of each of its functional systems. 1-2. ADDRESSING STRUCTURE The disc pack used with this disc drive is comprised of seven discs. The top and bottom discs provide physical protection for the five center discs. These five center discs provide nine data surfaces and one servo surface. As shown in figure 1-1, the disc drive accesses data on the nine data surfaces with nine read/write or data heads. Head positioning information and sector clocking are derived from the fifth (servo) surface through a read only or servo head. There are 815 ensured cylinder positions available for data storage. Cylinder addresses range from zero to 822. Each data cylinder consists of nine data tracks, one on each data surface. Tracks are addressed when both cylinder and head addresses are specified. Each data track is divided into 64 physical data sectors. Sectors are addressed when both head and sector addresses are specified for a given cylinder. Head addresses range from zero to 8 and sector addresses range from zero to 63. 823 CYLINDERS PER DRIVE 9 DATA HEADS 1 SERVO HEAD PER DRIVE o CARRIAGE ASSEMBLY SERVO 4 6 HEAD~ 64 SECTORS PER TRACK NOTE: A TRACK IS SELECTED WHEN A CYLINDER AND A HEAD ARE SPECIFIED UPPER AND LOWER PROTECTIVE DISCS DIRECTION OF ROTATION jlTOP VIEWI 7311-32 Figure 1-1. Addressing Structure of an HP 7925 Disc Drive 1-1 Theory of Operation 7925 The physical location of each data sector is determined by counting clock transitions which are derived from the servo code written on the servo surface (see figure 1-2). There are 53,760 clock transitions produced per revolution (2.42 MHz at 2700 rpm). A unique index pattern is encoded on the servo track between physical sectors 0 and 63. It is used to sense the start of physical sector O. The sector counting electronics counts these clock transitions to keep track of the physical sectors as they pass beneath the heads, and when the index pattern is detected at the end of each revolution, it resets its counter to zero and begins counting for the next revolution. The disc drive keeps track of physical sectors as they pass beneath the heads. The controller, on the other hand, deals only with logical sectors in order to minimize system intervention during automatic head and/or track switching. This feature of the controller enables multiple sector operations to continue beyond the end of a track without waiting for another revolution of the disc to take place. Logical sectors are staggered as the tracks progress downward through the cylinder, so that sector 63 on the next track will follow sector 63 on the current track (see figure 1-3). This logical structuring of sectors permits the controller to verify the address fields and track status of sector 63 on the new track and then immediately continue with the data transfer to sector 0 of the new track. The mapping from logical sector to physical sector is performed by the controller microcode before the sector address is transferred to the disc drive. An inverse mapping operation occurs in the case where the disc drive returns its present sector address in response to a controller command. 1-3. ADDRESSING MODES The controller operates in two modes, the surface mode and the cylinder mode, to access the data storage areas of the disc drive. The following paragraphs discuss controller/disc drive operations in the two modes. 1-4. SURFACE MODE In the surface mode of operation, only one head is selected. The head is positioned over a particular track and then data is written or read starting with the lowest numbered track and continuing to the highest numbered track. A surface of information therefore consists of all sectors on all tracks at a given head address. Data transfer will continue with sector 0 of the next track after the address fields and track status indicators of sector 63 of that track have been verified by the controller. This process continues until there is no more data or no more storage space left on this surface of the disc. 1-5. CYLINDER MODE In the cylinder mode of operation, the heads are positioned over a particular cylinder and then data is written or read starting with the lowest numbered head and continuing to the highest numbered head. A cylinder of information therefore consists of all sectors on all tracks at a given cylinder address. Head switching occurs after the data in sector 63 of the current track has been transferred. Head switching is sequential, that is, head 1 will be selected after head 0, and so forth. Data transfers will continue with sector 0 of the next track after the address fields and track status indicators of sector 63 of that track have been verified by the controller. An end-of-cylinder will OCCllI after the data in sector 63 of the last track has been transferred. Cylinder switching (a seek operation) may take place at this time and the process repeated. DIRECTION /OF HEAD / MOTION 7311-33A 1-2 NOTES: 1. SERVO CODE = 6720 (MINUS 3) DI-BITS PER REVOLUTION. 2. SECTOR CLOCK = 53,760 CYCLES PER REVOLUTION (2.42 MHz AT 2700 RPM). 3. ONE INDEX PULSE IS GENERATED PER REVOLUTION. Figure 1-2. Sector Clock and Index Generation 7925 Theory of Operation 7311-34 .... 4 o 4 OF~I~~~i:g~ - - - - - - - -..~.. SECTOR 3 2 0 63 62 .... 3 2 0 63 62 PHYSICAL LOGICAL 3 H ~2 2 D 3 62 61 61 60 60 59 4 o ~INDEXZONE 59 58 T Figure 1-3. Logical vs. Physical Sectors ~ SECTOR 0,1, 2 ... SECTOR ... 61, 62, 63 ~ TRACK N TRACK N + 1 TRACK N + 2 HEAD t 0 1 2 3 SERVO 4 5 6 8 SURFACE ~CYllNDERN ~, CYLINDER N + 1 CYLINDER N + 2 j II II II L:J DATA L:J II II L:J DATA DATA L:J II II L:J DATA SERVO L:J II II L:J DATA DATA L:J II II L:J DATA DATA CJ DATA 7311-35 SURFACE MODE CYLINDER MODE Figure 1-4. Surface Mode vs. Cylinder Mode 1-6. SECTOR FORMAT The smallest addressable data storage area on a data surface is a data sector (see figure 1-5). Accessing a data sector is accomplished when the controller specifies the address of the cylinder, head, and sector. Each data sector contains a 15-word preamble, a 128-word data field, and a 7-word postamble. which specifies the head and sector addresses and provides the spare, protected, and defective track status indicators. The data field is used to store 128 words of data. Each word is defined as being 16-bits. Only the data field is transferred to and from the system during most data operations. The preamble and postamble are normally generated and checked by the controller. The 15-word preamble is used for synchronization and addressing purposes. It is comprised of a 12-word sync field; a sync word; a cylinder address word; and a word The 7-word postamble consists of a cyclic redundancy check word and six words of error correction code. The controller generates this check information during a write 1-3 Theory of Operation 7925 SECTOR 63 SECTOR 0 CD PREAMBLE 15 WORDS 0 SYNC 1 WORD 0 DATA 128 WORDS 0 POSTAMBLE 7 WORDS CD CRC 1 WORD 0 ECC 6 WORDS SYNC WORD CYLINDER 15 015 015141312 87 o PREAMBLE oCD DATA oo POSTAMBLE SYNC FIELD - 15 WORDS FOR SYNCHRONIZATION AND ADDRESSING - 128 WORDS OF DATA - DATA CHECKING AND ERROR CORRECTION INFORMATION - 12 WORDS (192 BITS) OF O's CD SYNC - SYNC WORD - 1003768 IF ECC FIELD IS VALID (BITS 15-0) 1003778 OTHERWISE ® CYLAD - CYLINDER - CYLINDER ADDRESS (BITS 15-0) o HSAD - S - IF "1", SPARE TRACK IN ACTIVE USE (BIT 15) P - IF "1", PROTECTED TRACK (BIT 14) D - IF "1", DEFECTIVE TRACK (BIT 13) HEAD - HEAD ADDRESS (BITS 12-8) SECTOR - SECTOR ADDRESS (BITS 7-0) o® CRC - CYCLIC REDUNDANCY CHECK - 1 WORD OF CHECK INFORMATION ECC - ERROR CORRECTION CODE - 6 WORDS OF CHECK AND CORRECTION INFORMATION REF 7300-37A 1-4 Figure 1-5. Sector Format 7925 Theory of Operation operation and appends it to the other information written in the sector. The check information itself depends on the value of every bit from the first bit in the sync word to the last bit in the data field. During a read operation, this check information is regenerated and compared in such a way that the presence of errors is detected, and by using the error correction hardware in the controller, the error(s) may be corrected. The HP 13356A Formatted Disc Pack is formatted in this fashion and it must be used as the removable storage media for this disc drive. 1-7. FUNCTIONAL DESCRIPTION The disc drive is organized into eight functional systems. (See figure 1-6.) These are the input/output (I/O) control system, spindle rotation system, head positioning system, sector sensing system, read/write system, fault detection system, air circulation and filtration system, and power distribution system. Each of these functional systems is discussed in detail in the following paragraphs. In addition, a functional block diagram is provided for each system in Section IV, Troubleshooting. An alphabetic listing of each signal mnemonic, a source and destination signal list, and a mainframe wiring diagram are also provided in Section IV, Troubleshooting. The I/O control system provides the communication link between the controller and the disc drive via its tag and control buses. The spindle rotation system provides power to the spindle motor and maintains spindle speed at 2700 revolutions per minute. It also operates the pack loading assembly door lock mechanism. The head positioning system controls the loading and unloading of heads under both normal and abnormal (fault) circumstances. The sector sensing system continually monitors the physical sector presently passing beneath the heads. The controller is notified when the present sector equals the addressed sector. This information is also used to enable the read/write system for a data transfer operation. The read/write system provides the means to read information from a data surface or write information onto a data surface. The fault detection system continually monitors various conditions within the disc drive, and lights fault indicators, retracts the heads, and brakes spindle rotation when a fault is detected. The air circulation and filtration system provides cooling air to the heat generating components of the disc drive and cool filtered air to the pack chamber. The power distribution system supplies all operating voltages to the seven other disc drive systems. r---------------------------------------------------, HP 7925 DISC DRIVE I I - -......-------4----~I~~~-----.~..._R_ ESA_DY/SW_TR_IETME_---'I+~----DATA - - - + , DISC PACK TO/FROM CONTROLLER 4 _-,;,L..<_ - , - - _ ~~~--. I/O _-, 11 ;<- - - - STROBE-----.. '........--:--_CO~~~O L ----+L . . - CONTROL SYSTEM _-....._ _....J i SECTOR CLOCK & INDEX SECTOR SENSING SYSTEM FROM PR~~~~~ SOURCE -:--_+_~ POWER DISTRIBUTION SYSTEM TO ALL OTHER SYSTEMS FAULT AC ~N:~~ ~ II' POWLERr-- - -CI-RSC-Y~-~A-~~-I:-N~ A IR DETECTION SYSTEM & FILTRATION I SYSTEM ··· I I LI HEAD POSITIONING SYSTEM ACTUATOR ASSEMBLY ...-----+----- SERVO CODE -------' RETRACT HEADS BRAKE f----SPINDLE---.' SPINDLE ROTATION SYSTEM LIGHT FAULT INDICATORS ENCODER DISC --l 7311-37 Figure 1-6. HP 7925 Disc Drive, Simplified Block Diagram 1-5 Theory of Operation 7925 1-8. I/O CONTROL SYSTEM The I/O control system (see figure 4-24) consists of circuits on I/O sector PCA-A2 and drive control PCA-A4, although all communication between these two PCA's occurs via motherboard PCA-A7. Included are the tag bus, control bus, select, unit identity, status, and attention logic. The purpose of the I/O control system is to provide the communication link between the controller and the disc drive. As can be seen in figure 1-7, communication between the controller and all connected disc drives takes place via a 4-bit unidirectional tag bus and a 12-bit bidirectional control bus. A command is placed on the tag bus by the controller to specify what function the disc drive should perform. The command is validated by an active strobe signal from the controller. Upon receipt of certain commands, the disc drive will transfer information to the controller via the control bus. Other tag bus commands require that the controller place supplemental information on the control bus in order for the disc drive to execute the commanded function. Data is transferred between the controller and the selected disc drive via bidirectional data lines unique to that disc drive. 1-9. TAG BUS LOGIC. Each disc drive connected to the controller can respond to fourteen individual tag bus commands. Table 1-1 provides a summary of the tag bus commands. Included are the 4-bit codes that must be placed on the tag bus by the controller, the function that will be decoded, an indication of which functions require previous selection of the disc drive, the type of information that will be placed on the control bus, its direction of flow, and the action that will take place. As can be seen, tag bus bit 3 determines whether the disc drive or the controller will transfer information on the control bus. If bit 3 is active (bit 3 = 0), the disc drive will send information to the controller. If bit 3 is inactive (bit 3 = 1), the controller will send information to the disc drive. All commands placed on the tag bus by the controller are ground-true. They will remain valid as long as the strobe signal from the controller remains active (see figure 1-8). All validations occur on the leading edge of the strobe signal and terminate on its trailing edge. HP 13037 DISC - CONTROLLER ...... L HP 7925 DISC DRIVE (UNITO) ··· HP 7925 DISC DRIVE (UNIT 1·7) HP 13037 DISC CONTROLLER DATA HP 7925 DISC DRIVE 7311-38A 1-6 Figure 1-7. Disc Drive Interface 7925 Theory of Operation TAG BUS BIT 3210 DECODED FUNCTION 0000 READ 000 1 WRITE 0010 0011 REQUEST STATUS (RQS) REQUEST IDENTITY (RQI) 0 10 0 DISCONNECT (DCN) 0 10 1 CONTROLLER PRESET (CPS) 0 110 REQUEST SECTOR (RQP) 0 11 1 Table 1-1. Tag Bus Command Summary DISC DRIVE SELECTED YES YES YES NO NO NO YES CONTROL BUS (REFER TO TABLE 1-2) INFORMATION DIRECTION CURRENT STATUS FROM DISC DRIVE CURRENT STATUS FROM DISC DRIVE CURRENT STATUS IDENTITY FROM DISC DRIVE FROM DISC DRIVE ----- --- --- HEAD-SECTOR ADDRESS FROM DISC DRIVE NOT USED ACTION The selected disc drive will gate its current status onto the control bus and keep it updated throughout the entire read operation. It will then wait for the leading edge of its internal sector compare signal before trans- ferring sector compare (status bit 8 = 1) in its status word on the control bus and the bit-encoded data from the addressed sector to the controller on its data lines. The transfer of data will continue until the end of the addressed sector is reached or the read command is dropped. The selected disc drive will gate its current status onto the control bus and keep it updated throughout the entire write operation. It will then wait for the leading edge of its internal sector compare signal before trans- ferring sector compare (status bit 8 = 1) in its status word on the control bus and the bit-encoded data from the controller to the addressed sector on its data lines. The transfer of data will continue until the end of the addressed sector is reached or the write command is dropped. The selected disc drive will gate its current status onto the control bus and keep it updated as long as the strobe signal remains active. Every disc drive connected to the controller that has its attention bit set (status bit 7 = 1) will gate its identity onto a line on the control bus that corresponds to the unit number of that disc drive. The identity will remain active until the attention bit is cleared or the request identity command is dropped. The internal rotational position sensing feature of each disc drive permits the transfer of its identity up to 15 sectors before an actual sector compare occurs. This feature and the amount of look-ahead is jumper-selectable in each disc drive. Every disc drive connected to the controller will be reset to its unselected state and the light-emitting diode (LED) in the upper left-hand corner of each unit select display will go out. In this state, each disc drive can only respond to four tag bus commands (ADU, CPS, DCN, or RQI). Same as DISCONNECT. In addition, each disc drive connected to the controller will clear any nondestructive read/write faults (W · AR and R · W); an AGC fault; its head and sector address registers; its illegal head and sector address flip-flops; and the seek check, first status, drive fault, and attention status bits. The selected disc drive will gate the contents of its head address register and its present sector address counter onto the control bus. This information will remain on the control bus as long as the strobe signal remains active and the present sector address will be continually updated by the sector counter. 1-7 Theory of Operation 7925 TAG BUS BIT 32 10 DECODED FUNCTION 10 00 SEEK 10 0 1 ADDRESS RECORD (ADR) 10 10 ADDRESS UNIT (ADU) 10 1 1 RECALIBRATE (RCL) 1100 TRANSMIT SECTOR (XMS) Table 1-1. Tag Bus Command Summary (Continued) DISC DRIVE SELECTED YES YES NO YES YES CONTROL BUS (REFER TO TABLE 1-2) INFORMATION DIRECTION CYLINDER ADDRESS FROM CONTROLLER HEAD-SECTOR ADDRESS FROM CONTROLLER UNIT ADDRESS FROM CONTROLLER --- --- HEAD-SECTOR ADDRESS FROM CONTROLLER ACTION The selected disc drive will check for a legal cylinder address on the control bus, then clock this address into its new cylinder address register (legal cylinder addresses are 0 thru 822). A seek operation to that address will then be initiated. When the heads are correctly positioned and settled over the specified cylinder, the disc drive will make attention (status 7 = 1) available in its status word. If the cylinder address is illegal, the disc drive will make seek check (status bit 2 = 1) and attention (status bit 7 = 1) available in its status word and it will not clock the illegal address into its new cylinder address register. The selected disc drive will check for a legal head and sector address on the control bus, then clock these addresses into its head address register and sector address register, respectively (legal head addresses are 0 thru 8and legal sector addresses are 0 thru 63). If either address is illegal, the disc drive will make seek check (status bit 2 = 1) available in its status word and it will not clock the illegal address into the respective register. Every disc drive connected to the controller will compare the unit address on the control bus with the unit address set on its UNIT SELECT switch. If they compare, only that disc drive will be set to its selected state and the light-emitting diode (LED) in the upper lefthand corner of the unit select display will light. In this state, the selected disc drive can respond to all fourteen tag bus commands. The selected disc drive will clear its new cylinder address register and present cylinder address counter, then initiate a recalibrate (seek home) operation to cylinder O. When the heads are correctly positioned and settled over cylinder 0, the disc drive will make attention (status bit 7 = 1) available in its sta lJs word. The selected disc drive will check for a legal sector address on the control bus, then clock this address into its sector address register (legal sector addresses are o thru 63). If the address is illegal, the disc drive will make seek check (status bit 2 = 1) available in its status word and it will not clock the illegal address into its sector address register. The head address on the control bus is ignored and the contents of the head address register will remain unchanged. Note: Used to automatically increment the sector address during cylinder and surface mode. 110 1 SET OFFSET (SOF) 11 10 CLEAR STATUS (CLS) 1111 YES OFFSET MAGNITUDE AND SIGN YES SELECT CLEAR FROM CONTROLLER FROM CONTROLLER The selected disc drive will clock the contents on the control bus into its offset magnitude and sign registers and reposition the heads accordingly (valid offset magnitudes are 0 thru 63 increments of 12.5 microinches each in either a positive or negative direction from track center). Note: This function is designed to permi t marginal data recovery. The selected disc drive will selectively clear either first status (status bit 3 = 0) or attention (status bit 7 = 0) or both status bits depending upon the state of bits 0 and 1 on the control bus. NOT USED 1-8 7925 Theory of Operation CONTROL BUS (CBUS 0-111 INFORMATION FROM DISC DRIVE (TBUS 3=0) CONTROL BUS (CBUS 0-11) INFORMATION FROM CONTROLLER (TBUS 3=11 \ \ I 1 I I I I TAG BUS (TBUS 0-3) ~I I I STROBE (STB) I I I I I I I I I I I I I I \1 Tl ~ 600 ns T2 ~ 600 ns / V T3;;' 600 ns / I I V I I I I I I I 1 I NOTE: Tl = TAG BUS SET·UP TIME T2 = STROBE WIDTH T3 = TAG BUS HOLD TIME 7311-39 Figure 1-8. Tag Bus Timing 1-10. CONTROL BUS LOGIC. Each disc drive connected to the controller can transmit information to the controller or receive information from the controller via the 16-bit bidirectional control bus (the HP 7925 Disc Drive uses only 12 bits of the control bus, see figure 1-7). Upon receipt of certain tag bus commands, the disc drive will transmit its current status (READ,' WRITE, or RQS), its identity (RQD, or its stored head address and present sector address (RQP) to the controller via the control bus. Other tag bus commands require that the controller place supplemental information on the control bus in order for the disc drive to execute the commanded function. This information includes the cylinder address (SEEK), head and sector addresses (ADR or XMS), unit address (ADU), offset magnitude and sign (SOF), or the information to selectively clear the attention and/or first status, status bits (CLS). Table 1-2 provides a summary of the control bus bit assignments for each decoded tag bus function. The control bus receivers within each disc drive are always enabled to receive the supplemental information from the controller. The ground-true signals from the controller are converted to positive-true signals by the control bus receivers for use throughout the disc drive circuitry. The control bus drivers are only enabled by four tag bus commands, i.e., READ, WRITE, RQS, or RQP. These commands require that the particular disc drive be selected. Once enabled, the control bus drivers convert the positive-true signals from the disc drive into ground-true signals for transfer to the controller. The identity of each disc drive connected to the controller that has its attention bit set (status bit 7 = 1) will be placed directly onto the control bus in response to a decoded RQI comma!1d. This information will bypass the control bus drivers, but it will still be transferred as a ground-true signal. 1-11. SELECT LOGIC. A disc drive must be selected by the controller in order for it to respond to ten of the fourteen tag bus commands. If not selected, it can only respond to four commands, i.e., ADU, CPS, DCN, or RQI. The controller selects a disc drive by placing the unit address of the desired disc drive on the control bus and an ADU command on the tag bus. Each disc drive connected to the controller will compare its unit address, established by the setting of its UNIT SELECT switch, with the unit address on the control bus. If they compare, only that disc drive will set its select flip-flop once the ADU command is decoded. When set, the SEL signal will become active (SEL = 1) to enable the remaining ten tag bus commands to be decoded by that disc drive. It will also enable the read/write logic in that disc drive. The SELL signal will become active (SELL = 0) to light the light-emitting diode (LED), located in the upper left-hand corner of the unit select display. The disc drive will be reset to its unselected state whenever the controller issues either a CPS or DCN command on the tag bus, or the RUN/STOP switch is set to RUN, or the power-on sequence is initiated. 1-9 Theory of Operation 7925 Table 1-2. Control Bus Bit Assignments DECODED TAG BUS FUNCTION CONTROL BUS BIT CLEAR STATUS SET OFFSET SEEK REQUEST SECTOR ADDRESS RECORD TRANSMIT SECTOR ADDRESS UNIT READ WRITE REQUEST STATUS REQUEST IDENTITY 0 ATTENTION MAGNITUDE 1 CYLINDER 1 1 FIRST STATUS 2 2 2 4 4 3 8 8 4 16 16 5 32 32 6 64 7 SIGN - 128 8 256 9 512 10 11 12 13 14 15 SECTOR 1 2 4 8 16 32 HEAD 1 2 4 8 UNIT 1 2 4 STATUS DRIVE BUSY DRIVE READY SEEK CHECK FIRST STATUS DRIVE FAULT FORMAT READ ONLY ATIENTION SECTOR COMPARE I: DRIVE TYPE UNIT 0 1 2 3 4 5 6 7 1-12. UNIT IDENTITY LOGIC. The unit identity logic on I/O sector PCA - A2 does not require a disc drive to be selected in order for it to transfer the identity of the disc driv~ to the controller. During a polling operation, the controller will issue an RQI command on the tag bus. Every disc drive connected to the controller that has its attention bit set (status bit 7 = 1) will gate its identity onto a specific line on the control bus that corresponds to the unit number of that disc drive. This information will bypass the control bus drivers, but it will still be transferred to the controller as a ground-true signal. A jumper-selectable feature can be enabled to cause the disc drive to wait for the leading edge of its internal sector compare signal before transferring its identity. This internal rotation position sensing (RPS) feature can also establish up to 15 sectors worth oflook-ahead. The amount of look-ahead is jumper-selectable on I/O sector PCA-A2. RPS is disabled when a disc drive is connected to an HP 13037 Disc Controller. Table 1-3. Status Word Bit Assignments CONTROL BUS STATUS 0 Drive Busy 1 Drive Ready 2 Seek Check 3 First Status 4 Drive Fault 5 Format 6 Read Only 7 Attention 8 Sector Compare 9 { Always 1 Drive Type 10 Always 1 1-13. STATUS LOGIC. A 12-bit status word is transferred to the controller in response to one of three decoded tag bus commands, i.e., READ, WRITE, or RQS. Table 1-3 lists the status word bit assignments and each bit is discussed in the following paragraphs. 1-10 1-14. Drive Busy. The drive busy status bit will be active (status bit 0 = 1) whenever the heads are not correctly positioned and settled over a legal cylinder. 7925 Theory of Operation 1-15. Drive Ready. The drive ready status bit will be active (status bit 1 = 1) and the DRIVE READY lamp will light whenever the heads are positioned over the data area of the disc pack (cylinders 0 through 822). 1-16. Seek Check. The seek check status bit will be active (status bit 2 = 1) whenever one or more of the following conditions exists: a. The controller has placed an illegal cylinder address (cylinder address> 822) on the control bus with a SEEK command on the tag bus. This condition will also cause the attention bit to be active (status bit 7 = 1). b. The controller has placed an illegal head address (head address > 8) on the control bus with an ADR command on the tag bus. c. The controller has placed an illegal sector address (sector address> 63) on the control bus with either an ADR or XMS command on the tag bus. d. The controller has attempted to command a seek operation while the disc drive was in the process of executing a previous SEEK command. This bit can be cleared if a legal operation (SEEK, ADR, or XMS) is performed to correct the error. The attention bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 0 active on the control bus. 1-17. First Status. The first status, status bit will be active (status bit 3 = 1) whenever the disc drive initially loads the heads. This bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 1 active on the control bus. 1-18. Drive Fault. The drive fault status bit will be active (status bit 4 = 1) and the DRIVE FAULT lamp will light whenever the disc drive fault circuits detect either a read/write, servo, or interlock fault condition. Nondestructive read/write faults (W. AR or R. W) can be cleared by the controller if it issues a CPS command on the tag bus. Destructive read/write faults (W. AC, or DC · W, or MH), servo faults (T, AGC, or CRB), or an interlock fault (IL) cause the heads to unload. Operator intervention will therefore be required. 1-19. Format. The format status bit will be active (status bit 5 = 1) whenever the FORMAT switch on the operator control panel is set to the format position (.). 1-20. Read Only. The read only status bit will be active (status bit 6 = 1) and the READ ONLY lamp will light whenever the READ ONLY switch on the operator control panel is set to the protected position (.) thereby inhibiting any write operations. 1-21. Attention. The attention status bit will be ac- tive (status bit 7 = 1) whenever the disc drive: a. Correctly positions the heads over cylinder 0 (initial head load or RCL operation). b. Retracts the heads under either normal or abnormal (fault) circumstances. c. Completes a seek operation to a legal cylinder address (cylinder address ~ 822). d. Is commanded to perform a seek operation to an illegal cylinder address (cylinder address> 822). This condition will also cause the seek check status bit to be active (status bit 2 = 1). This bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 0 active on the control bus. Refer to paragraph 1-24 for more detailed information regarding attention logic operation. 1-22. Sector Compare. The sector compare status bit will be active (status bit 8 = 1) only during a read or write operation for as long as the present sector equals the addressed sector. This bit will be cleared whenever the end of the addressed sector is reached or the READ or WRITE command is dropped. 1-23. Drive Type. Status bits 9 and 10 enable the controller to determine the type of disc drive, total number of heads, and the number of sectors per track. The drive type code for an HP 7925 Disc Drive is 11, therefore, bits 9 and 10 will always be active for this type of disc drive. 1-24. ATTENTION LOGIC. There are three attention flip-flops in each disc dri~e which are used to control the state of the attention bit (status bit 7). This status bit, in conjunction with other status bits, is used to notify the controller when the disc drive has performed certain operations. The ACRY and retract attention flip-flops are located on drive control PCA-A4, and the SEEK. ICA flipflop is located on I/O sector PCA-A2. All three flip-flops are initially reset by CLA (via NDPS) when power is first applied or the RUN/STOP switch is set to RUN. When reset, these flip-flops cause the attention bit to be inactive (status bit 7 = 0). Every time the RUN/STOP switch is set to RUN and the disc pack has come up to speed, a seek home operation will be initiated. When the heads are correctly positioned over cylinder 0, the ACRY attention flip-flop will be set by the leading edge of ACRY (status bit 0 = 0 and status bit 7 = 1). This will notify the controller that the seek home operation has been completed. During normal seek operations, the ACRY and retract attention flip-flops are reset once the heads leave the cylinder over which they were settled (status bit 0 = 1 and status bit 7 = 0). Once the heads are correctly positioned 1·11 Theory of Operation 7925 and settled over any legal cylinder, the ACRY attention flip-flop will be set by the leading edge of ACRY. If a seek operation to the same cylinder address is attempted, ACRY will remain active because the heads will not have moved, but CYL will momentarily go inactive (CYL = 0) as the first seek command is dropped and then it will return active (CYL = 1) as the second seek command is decoded. When this occurs, the ACRY attention flip-flop will be direct-set by the leading edge of CYL. In both cases (either a seek operation to a different cylinder address or to the same cylinder address) when the ACRY attention flip-flop is set, the controller is notified that a legal seek operation has been completed (status bit 0 = 0 and status bit 7 = 1). If a seek operation to an illegal cylinder is attempted, the ACRY attention flip-flop will be inhibited from being set because CYL will be held inactive (CYL = 0), and instead the SEEK e ICA flip-flop will be set as soon as the strobe signal goes inactive (status bit 2 = 1 and status bit 7 = 1). This will notify the controller of the illegal seek request. If the RET signal becomes active (RET = 1) for any reason, the heads will be retracted and the drive ready flip-flop, on drive control PCA-A4, will be reset. This will cause the retract attention flip-flop to be set by the leading edge of DRDY (status bit 1 = 0 and status bit 7 = 1). This will notify the controller of the retracted condition of the heads. 1-25. SPINDLE ROTATION SYSTEM The spindle rotation system (see figure 4-25) consists of circuits on drive control PCA-A4, spindle logic PCA-AS, power and motor regulator (PMR) PCA-A9, and encoder PCA-A10. Further, it includes such mechanical assemblies as the spindle motor, pack detector, and pack loading assembly door lock mechanism. Communication between drive control PCA-A4 and the rest of the circuitry occurs via motherboard PCA-A7, while the remainder of the communication occurs via the main harness. The primary purpose of the spindle rotation system is to provide power to the spindle motor and to maintain its operational speed at 2700 revolutions per minute. In addition, it operates the pack chamber door lock mechanism. Included in the following are discussions relative to spindle logic initiatization; the pack chamber door control, run spindle command, and spindle motor phase encoding and decoding, speed control and speed up detection, current regulation, dynamic braking, speed down detection, overcurrent protection, and overvoltage protection. 1-26. SPINDLE LOGIC INITIALIZATION. During the power-up sequence, PSF will momentarily become active (PSF = 0) because the power supplies have not yet reached their full operating level. This will momentarily hold the door unlocked solenoid de-energized which prevents access to the pack chamber. In addition, it will cause SPS to become active (SPS = 0) which will reset both current limit latches, direct-set the reverse direction detector, and clock the speed down latch clear. 1-12 Once the power supplies reach their proper operating level (PSF = 1), SPEN will become active (SPEN = 1) if en- coder PCA-A10 interlock is not open. The speed down detector will then detect that the spindle motor is stopped and it will direct-set the speed down latch. Setting the speed down latch causes SPD to become active (SPD = 0). 1-27. DOOR CONTROL LOGIC. The door unlock solenoid will be energized when the speed-down latch is set, the carriage is retracted, the RUN/STOP switch is set to STOP, and the power supplies are operating. When the solenoid is energized, the pack chamber door will be unlatched permitting access to the pack chamber and the DOOR UNLOCKED lamp will light. A disc pack can now be installed. With a pack installed and the pack chamber door closed, the RUN/STOP switch can be set to RUN. Setting this switch to RUN, sets the run/stop flip-flop. This will generate both a destructive and a non-destructive preset to initialize the rest of the disc drive circuitry (refer to para- graph 1-49). With STOP inactive (STOP = 0), the door unlock solenoid will be de-energized to again latch the pack chamber door and the DOOR UNLOCKED lamp will extinguish. 1-28. RUN SPINDLE COMMAND LOGIC. Once a pack is in place (PIP = 1), the pack chamber door is locked (DL = 1), the carriage is fully retracted from the pack chamber (CRB = 1), no interlock fault (lLF = 0) or timeout fault (TOF = 0) exists, the run/stop flip-flop is set (RUN = 1), and the run spindle flip-flop will be set to generate the run spindle command (RS = 0). This command will reset the speed down latch and the reverse direction detector, and cause an encoder pulse to be generated. The encoder pulse will clock the initial phasing information from the phase encoder into the phase A and phase B flip-flops. 1-29. PHASE ENCODING AND DECODING. The spindle motor is a brushless dc motor with two sets of phase windings. Power is applied to each winding in a prescribed sequence from the +36 and -36 volt supplies through four current switches. Two switches are provided for each phase winding because current is required to flow through the winding in both a positive and negative direction. Each switch is activated three times during any given revolution of the motor. It is the relative position of the rotor with respect to the windings that determines which switch to activate. Rotor position and motor speed are derived by the phase encoder, from the encoder PCA. The phase encoder circuitry consists of an encoder disc, which is fastened to the bottom of the spindle motor shaft, and encoder PCA-A10. The encoder disc is a thin metal disc with three 60-degree slots spaced 60 degrees apart. Encoder PCA-A10 consists of two identical circuits, one for phase A and the other for phase B. Each circuit is comprised of a light-emitting diode (LED), a phototransistor, and an amplifier/inverter stage. The PCA is attached to 7925 Theory of Operation the spindle motor housing so that the light from each LED passes through the slotted area of the encoder disc and strikes the associated phototransistor. When light strikes the phototransistor, it conducts and the resultant output is amplified and inverted. The LED/phototransistor pairs are physically mounted on the PCA 30 degrees apart with phase A arranged to conduct before phase B, therefore, the output from phase A will lead that from phase B by 30 degrees. The two signals from encoder peA-A10 are routed to spindle logic PCA-A8 where they are conditioned and inverted. They can be observed at the test points labeled "ENCA" and "ENCB". They are then coupled to the input of the encoder pulse generator and two "exclusive-OR" gates which act as programmable inverters. The encoder pulse generator produces a pulse for each edge of both spindle encoder sensors. Twelve encoder pulses are produced per revolution. The frequency of the encoder pulses at 2700 revolutions per minute is 540 Hz. The output from the encoder pulse generator can be observed at the test point labeled "ENCP". The "exclusive-OR's" invert the encoder signals when the stop spindle command is active (RS = 1) to dynamically brake the motor. When the run spindle command is active (RS = 0), no inversion takes place and the encoder signals are clocked into the phase A and phase B flip-flops by the output from the encoder pulse generator. The latched encoder signals are then routed to the phase decoder network where they are decoded to select the proper current switch. These phase selection outputs can be observed at test points labeled "PH1+", "PH1-", "PH2+", and "PH2-". Figure 1-9 illustrates the timing relationship of the two input phase signals, the output from the encoder pulse generator, and the four resultant phase selection output signals. If an overcurrent condition is detected in a given phase, that phase will be inhibited. Similarly, if an overvoltage condition is sensed, power to that phase will momentarily be interrupted. Both motor phases will be inhibited when the stop spindle command is active (RS = 1) and the speed is detected to be down or at the moment the reverse direction detector first detects that motor has begun to rotate clockwise (reverse). The latched encoder signals are also applied to the reverse direction detector which is used to detect a clockwise rotation of the motor during speed down detection. In addition, a 180 Hz signal is derived from the latched encoder signals. This signal is used to clock the timeout counter during a seek, seek home, or normal head load or unload operation. 1-30. SPEED CONTROL. As previously mentioned, motor speed is derived from the phase encoder information. The two signals from encoder PCA-A10 are conditioned, inverted, and applied to the input of the encoder pulse generator. The encoder pulse generator produces a pulse for every edge of the encoder signals. Twelve encoder pulses are produced per revolution. The frequency of the encoder pulses at 2700 revolutions per minute is 540 Hz. The output from the encoder pulse generator can be observed at the test point labled "ENCP". This output is routed to the phase and speed down detectors. The phase detector is a 3-stage shift register. The output from the encoder pulse generator is used to shift "O's" to the right and the output from a 540 Hz reference clock is used to shift "l's" to the left. The 540 Hz reference clock is derived from a 2.25 MHz crystal-controlled oscillator and a divide-by-4168 counter. The output from the 2.25 MHz oscillator can be observed at the test point labeled "XTAL" and the output from the 540 Hz reference clock can be observed at the test point labeled "720 Hz". Phase detection is achieved by monitoring the center bit of the shift register. This bit can be observed at the test point labeled "PHASE". When the disc pack is rotating slower than 2700 rpm, "l's" will be shifted through the shift register because reference clock pulses will occur more frequently than encoder pulses. This will cause a "1" to remain in the center bit of the shift register and maximum spindle current to be commanded. As a result, the motor will begin to accelerate. As the motor comes up to speed, encoder pulses will begin to shift "O's" into the left-most bit. Eventually, this will force the "1" out of the center bit. When this occurs, a decrease in the center bit duty cycle will result which in turn will decrease the spindle current command causing less current to be delivered to the motor. At speed, the center bit will toggle and the duty cycle will be nearly symmetrical. The left- and right-most bits of the shift register are monitored by the speed up detector. When these bits remain unchanged for approximately one-half a second, the motor is declared to be at speed. The green SPD LED at the output of the speed up detector will remain off until the spindle is declared to be at speed. If the spindle begins to loose speed slightly, the encoder pulse that was supposed to shift the "I" out of the center bit will be late. This will cause an increase in the center bit duty cycle, an increase in the spindle current command, and more current to be delivered to the motor until it returns to speed. The output from the center bit of the shift register is buffered and filtered to produce a smooth dc voltage which represents the spindle current command. The current command limiter reduces the spindle current command during the braking operation. The spindle current command is applied to the input of the current regulation circuit. It can be observed at the test point labeled "SCC". 1-31. MOTOR CURRENT REGULATION. The motor current regulation circuitry compares the smooth dc voltage representing the spindle current command with 1-13 Theory of Operation 7925 ONE REVOLUTION ...1. 1 1 . . _ - - - - - - (540 Hz at 2700 RPM) - - - - - - ~"'il I I A8 "ENCA" I I I I 1-----41 l_1 I I I U AB"ENCB" I I I A8 "ENCP" A8 "PH1+" (A 0 B) - '--1"""-- '--- '---' ...~ ---......- ......~ '--- ""'-- - '--- - I n n n 1 I 1------ j ---"';1-....1 -----.... 1----i 1 I I I A8 "PH1-" lAoS) A8 "PH2+" (A· B) A8 "PH2-" (A·S) I n n n I I 7311·40 Figure 1-9. Phase Selection Timing the average spindle motor current derived from the spindle motor current sampling resistor and regulates the motor current accordingly. This is achieved by applying the desired spindle current command to the positive inputs of two differential amplifiers and the derived average spindle motor current to the negative inputs. The unitygain inverting amplifier inverts negative current samples, so that they may be processed as positive current samples. The actual measured current sample can be observed at the test point labeled "SMe". The difference between the desired current and the actual measured current is applied to the negative inputs of two comparators. The output from a 22 kHz triangle wave generator is applied to the positive inputs. This signal can be observed at the test point labeled "22 kHz". A pulse train is produced with a duty cycle determined by the points at which the smooth dc voltage intersects the slopes of the triangular wave. If there is a small difference between the desired current and the actual current, a low duty cycle will be output from the comparators. Similarly, a larger difference produces a higher duty cycle output. It is the duty cycle that controls the pulse selection outputs which in turn control the application of current to the spindle motor windings. The output that regulates the positive phases can be observed at the test point labeled "P+", while the output that regulates the negative phases can be observed at the test point labeled "P-". 1-14 7925 Theory of Operation 1-32. DYNAMIC BRAKING. When the RUN/STOP switch is set to STOP, the spindle motor is dynamically braked to a stop. Dynamic braking is achieved by attempting to drive the motor in a clockwise (reverse) direction while it is rotating in a counterclockwise (forward) direc~ tion. This is accomplished by inverting the information from the phase encoder circuitry. The "exclusive-OR's" at the input to the phase A and phase B flip-flops act as programmable inverters. When the stop spindle command is active (RS = 1), the phase encoder information is inverted. This will cause the opposite phase to be driven which will brake the motor to a stop. 1-33. SPEED DOWN DETECTION. The speed down detector monitors the encoder pulses, and when the interval of time between transitions exceed 0.84 of a second, it direct-sets the speed down latch to declare the motor stopped. With the stop spindle command active (RS = 1) and the speed down (SPD = 0), the spindle current command to both motor phases will be inhibited. If the speed down detector should fail to detect the proper time interval between encoder pulses, the reverse direction detector will be clocked set at the moment the motor first begins to rotate clockwise (phase B leads phase A). When set, the reverse direction detector will inhibit the spindle current command to. both motor phases. In either case, the yellow OFF LED will light when the spindle current command to both motor phases has been inhibited and the motor will remain stopped until another run spindle com- mand is issued (RS = 0). 1-34. OVERCURRENT PROTECTION. The four current switches, located on PMR PCA-A9, have overcurrent sense networks associated with them. These networks sense the level of the current being applied to the associated motor phase and if this current exceeds the established upper limit, the appropriate current limit signal will become active (CLI or CL2 = 0). This will set the associated current limit latch on spindle logic PCA-A8. The state of the latch can be observed at the test point labeled "CLl" or "CL2". When set, the latch will disable the spindle current command to that motor phase. The other phase, however, will remain operative to keep the spindle motor rotating until the heads have been unloaded. In addition, the set output will cause the SPFLT LED to light indicating that a spindle fault exists. It will also signal the fault detection circuity through the interlock chain to cause an emergency retract operation. The current limit latches are reset by setting the POWER switch to OFF, then to ON which causes SPS to momentarily become active (SPS = 0). 1-35. OVERVOLTAGE PROTECTION. During spindle braking, the current switch circuits attempt to drive the +36 and -36 volt supply lines to about 60 volts. To protect against this condition, a pair of shunt regulator circuits are employed to monitor the +36 and -36 volt supply lines. If an overvoltage condition is sensed (voltage greater than 42 volts), the active phase is turned off and a bleeder resistor is switched in to lower the excessive voltage. The state of the disabling command can be observed at the test point labeled "VL+" or "VL-". When the lower threshold is reached (voltage less than 40 volts), the system resumes normal operation. If the spindle motor is jammed when the run spindle command is issued (RS = 0), a stall condition will occur. During a stall condition an overvoltage is sensed by the shunt regulator circuits, the active phase is turned off and bleeder resistors are switched in to attempt to lower the excessive voltage. If the bleeder resistors were allowed to remain on, in the stall condition, the resistors would burn out; therefore two regulator protection circuits are employed to sample for excessive on time of the bleeder resistors and to inhibit bleeder action. 1-36. HEAD POSITIONING SYSTEM The head positioning system (see figure 4-26) consists of circuits on I/O sector PCA-A2, servo PCA-A3, drive control PCA-A4, track follower PCA-A5, and power and motor regulator (PMR) PCA-A9. Further, it includes such mechanical assemblies as the actuator assembly, carriage latch solenoid, carriage back detector, and velocity transducer and shaft. With the exception of PMR PCA-A9, all communication between PCA's occurs via motherboard PCA-A7. PMR PCA-A9 communicates with the other PCA's through the main harness. The purpose of the head positioning system is to control the application of power to the coil in the actuator assembly. This causes the heads to be accurately positioned over a specified cylinder during an initial head load, forward or reverse seek, offset, or recalibrate operation. In addition, it provides the means to retract the heads under both normal and abnormal (fault) conditions. Included in the following are discussions relative to an initial head load, normal head unload, forward or reverse seek, offset, recalibrate, and emergency retract operation. 1-37. INITIAL HEAD LOAD OPERATION. Once the disc pack reaches its operational speed of 2700 revolutions per minute, the heads will automatically be loaded. The heads will fly above the surface of the discs supported by a thin cushion of air. This cushion of air acts as an air bearing to the heads. The air bearing functions as a very stiff spring which is opposed by the leaf spring on each head arm. These two opposing forces tend to cancel one another at a flying height of 35 microinches (0.89 microns) at cylinder 0 to 27 microinches (0.69 microns) at cylinder 822. In order for the heads to fly properly several conditions have to be satisfied. Among these are the cleanliness of the air that surrounds the disc surfaces, the axial runout and flatness of the disc surfaces, and the flatness of the head surface near the read/write gap. With a disc pack installed (PIP = 0); the pack access door locked (DL = 0); the run/stop flip-flop set (STOP = 0); no existing AGC fault (AGF = 0), carriage back fault (CBF = 0), interlock fault (lLF = 0), destructive write fault (DWF = 0), or timeout fault (TOF = 0), the head positioning system circuitry waits for the spindle to reach operational speed (SPU = 0). When this occurs, the RET signal will become inactive (RET = 0). This will cause the SKH signal to become active (SKH = 0) which will 1-15 Theory of Operation 7925 initiate a 1667 millisecond timeout cycle, set the servo enable flip-flop, and direct set the seek home flip-flop. The state of the SKH signal can be observed at the test point on drive control PCA-A4 labeled "SKH". The SKH signal will also cause the CYL signal to become active (CYL = 1) to clear the seek check flip-flop on 110 sector PCA-A2. The state of the CYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 2 = 0). In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. With the servo enable flip-flop set (SEN = 1 and SEN = 0) and the DRDY and RET signals active (DRDY and RET = 1), the ECS signal will become active (ECS = 1). This causes the CSOL signal to become active (CSOL = 0) to energize the carriage latch solenoid permitting carriage movement. Also with the head positioning servo loop ena- bled (SEN = 0) and no existing power supply fault (PSF = 1), the linear motor relay on PMR PCA-A9 will be energized to permit current to be applied to the linear motor coil. These conditions can be observed at the test points on PMR PCA-A9 labeled "SEN" and "PSF". The SEN signal also enables the linear motor power amplifier (LMAE = 1) after a 60 millisecond delay to ensure closure of the linear motor relay contacts. With the seek home flip-flop set (SKH = 1 and SKH = 0), the new cylinder address register and present cylinder address counter will be initialized by SKH. Since the new cylinder address and the present cylinder address count both match, the MATCH signal will become active (MATCH = 1). The state of the MATCH signal can be observed at the test point on servo PCA-A3 labeled "M". Since the heads are not yet positioned over the servo zone, the AGC signal from track follower PCA-A5 will be inac- tive (AGC = 0). The set output from the seek home flip- flop and the absence of the AGC signal (AGC = 0) will activate the +slew FET switch on the servo PCA. With this switch closed, a constant velocity will be developed and an appropriate current will be applied to the linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The coil will be repelled from the linear motor magnet to push the carriage assembly supporting the heads along the rails at approximately 3.5 inches per second. A voltage which is proportional to the linear velocity of the carriage is fed back through the tachometer buffer and FET switch to the summing junction of the summing amplifier. The tachometer buffer is a unity-gain amplifier used to eliminate the effects of temperature on the velocity 1-16 transducer signal. The voltage developed is used to precisely control the head positioning servo loop during the initial head load operation. This voltage can be observed at the test point on servo PCA-A3 labeled "TAC". The velocity transducer and shaft are used to develop this linear velocity voltage. The velocity transducer is a cylindrical coil assembly mounted in the center of the linear motor magnet assembly. A magnet is attached to the carriage assembly by a supporting shaft. The motion of this magnet as it passes through the coil generates the linear velocity voltage. The magnitude of the voltage is proportional to the linear velocity and the polarity indicates the direction of motion. As the heads approach the head loading area of the disc pack, they are forced away from the disc surfaces by the air pressure developed by the rotating disc pack and the air distribution system. The heads will actually fly above the surfaces of the discs supported by a thin cushion of air. When the outside edge of the outer guard band is first detected by the servo head, the AGC signal will become active (AGC = 1) to disable the forward slew operation. The state of the AGC signal can be observed at the test point on track follower PCA-A5 labeled "AGC". The seek home flip-flop will be clocked clear by the leading edge of the AGC signal. The set output from the seek home flipflop (SKH = 0) together with the absence of the RET signal (RET = 0) and the active MATCH + SKI signal (MATCH + SKI = 1), activates the fine position FET switch. With this switch closed, the current applied to the linear motor coil will be determined by the POS signal. The POS signal is used to provide radial (cylinder) position information to the head positioning servo loop. This signal is derived from the servo code which is magnetically recorded on the servo surface (see figure 1-10). The servo code consists of 6720 di-bits per revolution, although three of these di-bits are not recorded in the index zone. As the servo surface passes beneath the servo head, a voltage is magnetically induced. The output from the servo head is directly coupled to the input of the differential preamplifier stage on track follower PCA-A5. This stage consists of two differential amplifiers coupled together by a filter network. The gain of the first differential amplifier is controlled by the output from the servo AGC circuit. The differential output is filtered and coupled to a second fixed-gain differential amplifier. The output from the differential preamplifier stage can be observed at the test point on track follower PCA-A5 labeled "PRE". It will be approximately 1.4 volts peak-to-peak. This output is then coupled to the input of the phase switchable amplifier stage. Figure 1-10 illustrates the servo and data track assignments, as well as the waveforms produced at the "PRE"test point as the servo head moves across +odd and -even servo tracks. The phase switchable amplifier stage provides a low source impedance servo code output which is either in phase or ,180 degrees out of phase with the output of the 7925 / 7311-41A UPPER AND LOWER PROTECTIVE DISCS DATA HEAD CORE DATA SURFACE DATA TRACK 0 DATA TRACK 822 -j-. .,SPINDLE M/ DIRECTION OF ,. ROTATION SERVO SURFACE BAND OATA HEAD CORE DATA HEAD CORE . . - DATA TRACK WIDTH (2150 MICROINCHES) 1 DATA HEAD CORE HEAD LOADING AREA · NO INFORMATION IS WRITTEN IN THIS AREA · HEADS ARE LOADED TOWARD THE 01 SC SURFACE OUTER GUARD BAND · CONSISTS OF 24 +000 SERVO TRACKS · USED TO LOCATE DATA TRACK 0 DURING HEAD LOAD AND RECALIBRATE OPERATIONS 1..- SERVO TRACK SPACING (2600 MICROINCHES) SERVO HEAD CORE r DATA HEAD CORE NOTE: WAVEFORM AND TRIGGER TEST POINTS ARE SHOWN ON THE HEAD POSITIONING SYSTEM FUNCTIONAL DIAGRAM, FIGURE 4-25, AT THE FOLLOWING LOCATIONS: A5 'PRE' - (C16) A5 'REF' - (B15) A5 'POS' - (C13) A5 'O/S' - (D14) DATA HEAD CORE +000 SERVO TRACK SERVO HEAD CENTERED OVER A + ODD SERVO TRACK NNSS II NNSS II \ VERTICAL GAIN = 0.5V/OI\! TIME BASE = 1.0 pS/DIV \ OFFSET = ±O.O piN. TEST POINT = A5 "PRE" TRIGGER =A5 "REF" 1 1 1\ " \"....... "'-- " ""\. ~ \ .- l J I~ \ ~ VERTICAL GAIN = 5V/DIV TEST POINT = A5 "POS" SERVO HEAD CORE HEADS POSITIONED WITH 787.5 MICROINCHES OF NEGATIVE OFFSET FROM CYLINDER POSITION 0 ~\.:'\ ,11\\ VERTICAL GAIN =0.5V/DIV TIME BASE = 1.0 j.lS/DIV OFFSET = -787.5 piN. \~ TEST POINT = A5 "PRE" \ TRIGGER = A5 "REF" ./\ --- h 1 fl Vl I\t-~ ~ \ 1 ~ VERTICAL GAIN = 5V/DIV TEST POINT = A5 "O/S" SERVO HEAD CORE HEADS COItHECTLY CENTERED OVER C'1L1NDER POSITION 0, Theory of Operation , VERTICAL GAIN = 0.5V/DIV TIME BASE = 1.0 pS/DIV OFFSET = ±O.O piN. TEST POINT = A5 "PRE" TRIGGER =A5 "REF" VERTICAL GAIN = lV/DIV TEST POINT = A5 "POS" SERVO HEAD CORE HEAIJ~j POSITIONED WITH 787.5 MICROINCHES OF POSITIVE OFFSET FROM CYLINDER POSITION 0 VERTICAL GAIN = 0.5V/DIV '----+---.1I---JHTIME BASE = 1.0 pS/DIV OFFSET = +787.5 piN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" VERTICAL GAIN = 5V/DIV TEST POINT = A5 "O/S" SERVO HEAD CORE SERVO HEAD CENTERED OVER A - EV[N SERVO TRACK VERTICAL GAIN = 0.5V/DIV TIME BASE = 1.0 pS/DIV OFFSET = ±O.O piN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" SERVO HEAD CORE -EVEN SERVO TRACK VERTICAL GAIN = 5V/DIV TEST POINT = A5 "POS" S SN N S SN N Figure 1-10. Servo and Data Track Assignments 1-17/1-18 7925 Theory of Operation differential preamplifier stage. The phase is determined by the least significant bit of the addressed cylinder (LSB). The LSB signal will be active (LSB = 1) for odd cylinders and inactive (LSB = 0) for even cylinders. In the case of an initial head load, the LSB signal will be inactive (LSB = 0). The output from the phase switchable amplifier is coupled to the positive and negative peak detectors where the peaks in the servo code are detected and stored. The peak detectors are gated by either the REF or REF signal. This is determined by the state of the LSB signal and an exclusive-OR acting as a programmable inverter. When LSB is active (LSB = 1), the REF signal will gate the peak detectors and when LSB is inactive (LSB = 0), the REF signal will gate the peak detectors. In the case of an initial head load, the REF signal will gate the peak detectors. The state of the REF signal can be observed at the test point on track follower PCA-A5 labeled "REF". The output from each peak detector is buffered by a unity-gain, non-inverting amplifier and then coupled to the summing junction of the output summing amplifier. Also, summed into this junction is the output of the offset circuit. The output summing amplifier exhibits a gain of 4 to the peak detectors and 0.5 to the offset circuit. The resultant output from the output summing amplifier is the pas signal which can be observed at the test point on track follower PCA-A5 labeled "POS". The derived pas signal is centered about a ground refer- ence and it has a scaling factor of 4 volts per millinch at track center. The signal will be positive once the servo head detects the edge of the outer guard band and it will remain positive until the first track of the servo zone is detected. It will then appear as a triangular waveform as the servo head moves across the servo surface from track 0 to 822. Each zero crossing represents a data track centerline. Once the track center of cylinder 0 is detected (TCD and FINE POSITION = 1), the SB signal will become active (SB = 0). This signal will inhibit tachometer feedback to the head positioning servo loop. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled "TCD". After a 1.3 millisecond delay to allow time for the heads to settle, the drive ready flip-flop will be set. The set output from the drive ready flip-flop causes the DRIVE READY lamp to light, the drive ready status bit to be active (status bit 1 = 1), the first status flip-flop to be clocked set, the AGC and carriage back fault detection circuits to be enabled, and the ACRY signal to become active (ACRY = 0). The state of the DRDY signal can be observed at the test point on drive control PCA-A4 labeled "DRDY". The set output from the first status flip-flop causes the first status, status bit to be active (status bit 3 = 1). This will notify the controller that the disc drive has completed an initial head load operation. This status bit can be selectively cleared by the controller ifit issues a CLS command on the tag bus with bit 1 active on the control bus. When the ACRY signal becomes active (ACRY = 0), it cancels the 1667 millisecond timeout cycle; causes the drive busy status bit to be inactive (status bit 0 = 0); clocks the ACRY attention flip-flop set; and enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 7 = 1). This will notify the controller that the disc drive has correctly positioned the heads over cylinder O. This status bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 0 active on the control bus. The heads will remain settled over cylinder 0 until a seek, recalibrate, or set offset command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. 1-38. NORMAL HEAD UNLOAD OPERATION. The heads are automatically unloaded whenever the RUN/STOP switch is set to STOP (STOP = 1); an AGC fault (AGF = 1), carriage back fault (CBF = 1), interlock fault (ILF = 1), destructive write fault (DWF = 1), or timeout fault (TOF = 1) exists; or the spindle begins to loose speed (SPU = 1). When anyone of these conditions exists, the RET signal will become active (RET = 1). This will clear the drive ready and seek home flip-flops, deenergize the carriage latch solenoid, activate the -slew FET switch, and initiate a 1667 millisecond timeout cycle. With the drive ready flip-flop cleared (DRDY = 0 and DRDY = 1), the DRIVE READY lamp will be extinguished, the drive ready status bit will become inactive (status bit 1 = 0), the AGC and carriage back fault detec- tion circuits will be disabled, the ACRY signal will become inactive (ACRY = 1), and the retract attention flip-flop will be clocked set (status bit 7 = 1). The state of the DRDY signal can be observed at the test point on drive control PCA-A4 labeled "DRDY". The set output from the retract attention flip-flop causes the attention status bit to be active (status bit 7 = 1). This will notify the controller that the disc drive has initiated a normal head unload operation. This status bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 0 active on the control bus. When the ACRY signal becomes inactive (ACRY = 1), the drive busy status bit will become active (status bit 0 = 1); future seek, recalibrate, or write operations will be inhibited; and the attention reset flip-flop will be clocked set to prevent the ACRY and retract attention flip-flops from being reset. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". With the -slew FET switch closed, a constant velocity will be commanded and an appropriate current applied to the 1-19 Theory of Operation 7925 linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". This current will cause the carriage assembly to slew in reverse at 3.5 inches per second until it reaches its fully retracted position (CRB = 1). When this occurs, the RET and CRB signals will both be active (RET and CRB = 1). Together these signals cancel the 1667 millisecond timeout cycle and clear the servo enable flip-flop to disable the head positioning servo loop. In addition, the CRB and STOP signals will clear the run spindle flip-flop to issue a stop spindle command (RS = 1). The door unlock solenoid will be energized to permit pack access as soon as the spindle has been braked to a stop. The heads will remain in their fully retracted position until another head load operation is initiated. 1-39. SEEK OPERATION. A seek operation is used to move the heads from their present cylinder position to some other cylinder position. The disc drive can execute a seek command whenever the heads are positioned and settled over any legal cylinder (ACRY and SB = 0). The controller issues a seek command on the tag bus with a cylinder address on the control bus. When the command is decoded, the SK signal will become active (SK = 1). This will initiate a 120 millisecond timeout cycle, direct set the first clock inhibit flip-flop, and clock the cylinder address (DO thru D9) into the new cylinder address register provided it is legal (lCA = 0). The SK signal will also cause the CYL signal to become active (CYL = 1) to clear the seek check flip-flop on I/O sector PCA-A2. The state of the CYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 2 =0). In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. As previously mentioned, the legal cylinder address supplied by the controller was stored in the new cylinder address register when the seek command was decoded. This address provides destination information to the head positioning servo loop. In addition, the least significant bit of the new cylinder address (LSB) is routed to track follower PCA-A5 where it controls the phase switchable amplifier and the programmable inverter at the input to the peak detector circuitry. This bit will be active (LSB = 1) for odd cylinders and inactive (LSB = 0) for even cylinders. The use of this bit is discussed in detail in paragraph 1-37. Further, the three most significant bits of the new cylinder address are inverted and routed to RlW preamplifier PCA-A6 as the DWA, DWB, and DWC signals. These signals are used to control the programmable write current sink. 1-20 The cylinder address comparator compares the cylinder address stored in the new cylinder address register with the count stored in the present cylinder address counter. It produces a 10-bit digital difference from these two addresses. It also produces a signal which indicates whether a forward or reverse seek operation is required. If the present cylinder address is less than the new cylinder address, the forward FET switch will be activated and the present cylinder address counter will count up (POSITIVE = 1). If the present cylinder address is greater than the new cylinder address, the reverse FET switch will be activated and the present cylinder address counter will count down (POSITIVE = 0). Both commands (forward or reverse) assume that the addresses do not match (MATCH = 1), the seek operation is not inhibited (SKI = 1), a seek home operation is not commanded (SKH = 0), and a retract operation is not commanded (RET = 0). If the present cylinder address is equal to the new cylinder address, the fine position FET switch will be activated and· the current applied to the linear motor coil will be deter- mined by the pas signal. In the case of a forward or reverse seek operation, the digital to analog converter converts the digital difference from the cylinder address comparator into an analog current which is applied to the input of the velocity curve generator. The velocity curve generator produces a current equal to a constant multiplied by the square root of the analog current from the digital to analog converter. The VC GAIN potentiometer on servo PCA-A3 provides the means to adjust the seek time by varying the gain of the velocity command. The velocity command can be observed at the test point on servo PCA-A3 labeled "VC". If the reverse FET switch is activated, the velocity command will be routed to the summing junction of the summing amplifier. If the forward FET switch is activated, the velocity command will be inverted by a unitygain, inverting amplifier before it is applied to the summing junction. The summing junction also receives a voltage which is proportional to the linear velocity of the carriage. This voltage is developed by the velocity transducer and shaft and is fed back through the tachometer buffer and FET switch. The summing amplifier compares the buffered output from the tachometer (measured velocity) with the output from the velocity curve generator (velocity command) and produces a current command which drives the difference to zero. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The amount of current available may be limited by the current command limiter. This circuit is activated by the seek inhibit signal (SKI = 1). The current command is coupled through the voltage gain amplifier to the linear motor power amplifier via a closed FET switch. Both of these amplifiers are located on PMR PCA-A9. The FET switch and linear motor relay were both activated when the head positioning servo loop was 7925 Theory of Operation enabled (SEN = 1) during the initial head load operation. Power is applied to the linear coil through the energized linear motor relay. The linear motor voltage developed can be observed at the test point labeled "LMV" and a sample of linear motor current can be observed at the test point labeled "LMC". Both of these test points are located on PMR PCA-A9. As the heads begin to move across the disc surfaces, the ACRY signal will become inactive (ACRY = D. This will cause the drive busy status bit to become active (status bit o = 1); future seek, recalibrate, or write operations to be inhibited; and the attention reset flip-flop to be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 7 = 0). In addition, the POS signal will be developed from the servo code written on the servo surface. This signal can be observed at the test point on track follower PCA-A5 (source) or servo PCA-A3 (destination) labeled "POS". Every time the POS signal passes through zero volts, a clock pulse is generated by the cylinder pulse generator on servo PCA-A3. The first clock pulse is inhibited because the first clock inhibit flip-flop was set when the seek command was decoded. This flip-flop will be clocked clear on the leading edge of the TCD signal to enable subsequent clock pulses to clock the present cylinder address counter. The track center detector will produce the TCD signal when the heads are within 1/4 track width of track center. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled "TCD". The match logic monitors the digital difference applied to the digital to analog converter. When the heads are positioned within one cylinder from the addressed cylinder, the MATCH-1 signal will become active (MATCH-1 = 0). This signal notifies the track center detector that the present cylinder address count is one less than the address stored in the new cylinder address register. The last clock pulse is produced by the track center detector rather than by the cylinder pulse generator. This pulse is produced when the last 1/4 track of travel is detected. When the present cylinder address count equals the address stored in the new cylinder address register, the MATCH signal will become active (MATCH = 1). The state of the MATCH-1 and MATCH signals can be observed at the test points on servo PCA-A3 labeled "MI" and "M", respectively. When the MATCH signal becomes active (MATCH = 1), it disables the forward or reverse velocity command to the summing junction of the summing amplifier, activates the fine position FET switch, and increases the sensitivity of the track center detector. With the fine position FET switch closed, the current applied to the linear motor coil will be determined by the POS signal. Once the track center of the addressed cylinder is detected (TCD and FINE POSITION = 1), the SB signal will become active (SB = 0). This will inhibit tachometer feedback to the head positioning servo loop. After a 1.3 millisecond delay to allow time for the heads to settle, the ACRY signal will become active (ACRY = 0). The drive ready flip-flop is not affected. It remains set from the initial head load operation. When the ACRY signal becomes active (ACRY = 0), it cancels the 120 millisecond timeout cycle; causes the drive busy status bit to be inactive (status bit 0 = 0); clocks the ACRY attention flip-flop set; and enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 7 = 1). This will notify the controller that the disc drive has completed a seek operation to a legal cylinder. This status bit can be selectively cleared by the controller if it issues a CLS command on the tag bus with bit 0 active on the control bus. The heads will remain settled over the addressed cylinder until a set offset, recalibrate, or another seek command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. 1-40. OFFSET OPERATION. An offset operation is used to move the heads in small increments to either side of track center. This function is designed to permit marginal data recovery. The controller issues a set offset command on the tag bus with the offset magnitude and sign on the control bus. The internal control bus bits DO through D5 specify the offset magnitude in 63 increments of 12.5 microinches each, while bit D7 specifies the direction (+ or - ) from track center. The disc drive decodes the tag bus command and the SOF signal becomes active (SOF = 1) to clock the offset magnitude and sign into the offset magnitude and sign registers, respectively. Both of these registers are located on track follower PCA-A5. They are both cleared by the COF signal when the heads are initially loaded or when a seek or recalibrate command is decoded. Therefore if offset is desired, the offset magnitude and sign must be re-specified after either of these operations is performed. In addition, the SOF signal disables the ACRY signal for 1.3 milliseconds to allow the heads time to settle. With ACRY disabled (ACRY = 1), the drive busy status bit will momentarily become active (status bit 0 = 1); future seek, recalibrate, or write operations will momentarily be inhibited; and the attention reset flip-flop will be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 7 = 0). When the ACRY signal becomes active again (ACRY = 0), the drive busy status bit will become inactive (status bit 0 = 0); the ACRY attention flip-flop will be clocked set; and future seek, recalibrate, or write operations will be enabled. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 7 = D. This will notify the controller that the disc drive has completed the offset operation. This status bit can be selectively 1-21 Theory of Operation 7925 cleared by the controller ifit issues a CLS command on the tag bus with bit 0 active on the control bus. The stored offset magnitude is converted into an analog voltage by the digital to analog converter. The amount of voltage developed can be observed at the test point on track follower PCA-A5 labeled "DIS". This voltage is applied through a FET switch to the summing junction of the output summing amplifier for a negative offset operation. In the case of a positive offset operation, this voltage is inverted by a unity-gain inverting amplifier before it is applied to the summing junction. The output summing amplifier exhibits a gain of 0.5 to the offset circuit. The amount of offset is summed into the pas signal to cause the heads to be repositioned. Figure 1-10 illustrates the heads centered over cylinder 0, positioned over cylinder 0 with maximum negative offset, and positioned over cylinder 0 with maximum positive offset. The heads will remain settled over their present cylinder position until a seek, recalibrate, or another set offset command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. 1-41. RECALIBRATE OPERATION. A recalibrate operation is used to move the heads from their present cylinder position to a home position over cylinder O. The controller issues a recalibrate command to establish a reference head position. The disc drive can execute a recalibrate command whenever the heads are positioned and settled over any legal cylinder (ACRY and SB = 0). When the command is decoded, the RH signal will become active (RH =0). This will cause the SKH signal to become active (SKH = 0) which will initiate a 1667 millisecond timeout cycle and direct set the seek home flip-flop. The servo enable flip-flop is not affected. It remains set from the initial head load operation. The state of the SKH signal can be observed at the test point on drive control' PCA-A4 labeled "SKH". This signal will also cause the CYL signal to become va active (CYL = 1) to clear the seek check flip-flop on sector PCA-A2. The state of the CYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 8 = 0). In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. With the seek home flip-flop set (SKH = 1 and SKH = 0), the new cylinder address register and present cylinder address counter will be cleared by SKH. Since the new cylinder address and present cylinder address count both match (both are zero), the MATCH signal will become 1-22 active (MATCH = 1). The state of the MATCH signal can be observed at the test point on servo PCA-A3labeled "M". With the heads currently positioned over the servo zone, the AGC signal from track follower PCA-A5 will be active (AGC = 1). The reset output from the seek home flip-flop (SKH = 0) and the presence of the AGC signal (AGC = 1) will activate the -slew FET switch. With this switch closed, a constant velocity will be commanded and an appropriate current applied to the linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The carriage assembly will slew in reverse at 3.5 inches per second. When the outside edge of the outer guard band is first detected by the servo head, the AGC signal will become inactive (AGC = 0) to disable the reverse slew operation. The set output from the seek home flip-flop (SKH = 1) and the absence of the AGC signal (AGC = 0) will activate the +slew FET switch. With this switch closed, a forward slew operation will be initiated to reverse the movement of the heads. When the outside edge of the outer guard band is again detected by the servo head, the AGC signal will become active (AGC = 1) to disable the forward slew operation. The seek home flip-flop will be clocked clear by the leading edge of the AGC signal. The set output from the seek home flip-flop (SKH = 0) together with the absence of the RET signal (RET = 0) and the active MATCH + SKI signal (MATCH + SKI = 1), activates the fine position FET switch. With this switch closed, the current applied to the linear motor coil will be determined by the pas signal. This signal can be observed at the test point on track follower PCA-A5 (source) or servo PCA-A3 (destination) labeled "pas". During head movement, the ACRY signal will become inactive (ACRY = 1). This will cause the drive busy status bit to become active (status bit 0 = 1); future seek, recali- brate, or write operations to be inhibited; and the attention reset flip-flop to be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 7 = 0). Once the track center of cylinder 0 is detected (TCD and FINE POSITION = 1), the SB signal will become active (SB = 0). This signal will inhibit tachometer feedback to the head positioning servo loop. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled "TCD". After a 1.3 millisecond delay to allow time for the heads to settle, the ACRY signal will become active (ACRY = 0). The drive ready flip-flop is not affected. It remains set from the initial head load operation. When the ACRY signal becomes active (ACRY = 0), it cancels the 1667 millisecond timeout cycle; causes the drive busy status bit to be inactive (status bit 0 = 0); clocks the ACRY attention flip-flop set; and enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". 7925 Theory of Operation The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 7 = 1). This will notify the controller that the disc drive has correctly positioned the heads over the home position (cylinder 0). This status bit can be selectively cleared by the controller ifit issues a CLS command on the tag bus with bit 0 active on the control bus. The heads will remain settled over the home position (cylinder 0) until a seek, set offset, or another recalibrate command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. 1-42. EMERGENCY RETRACT OPERATION. The circuitry used to retract the heads during an emergency condition is located on PMR PCA-A9. It consists of the retract timer, programmable voltage regulator, and linear motor relay. An emergency retract operation is initiated whenever the head positioning servo loop is dis- abled (SEN = 1) or a power supply failure is detected (PSF = 0). These conditions can be observed at the test points on PMR PCA-A9 labeled "SEN" and "PSF". Whenever either of these conditions exists, the linear motor relay will be de-energized to permit a retract voltage to be applied to the linear motor coil. Initially a retract voltage of approximately 7 volts is applied to the coil for about 500 milliseconds. The retract voltage is then reduced to approximately 4 volts until the carriage is fully retracted (CRB =1) at which time the retract voltage is removed. During an emergency retract operation, the carriage will normally reach its fully retracted position before the retract voltage is reduced. Sustaining the higher retract voltage for an excessive period of time can damage the programmable voltage regulator, therefore, the retract voltage is reduced in the event that the carriage fails to reach its fully retracted position before the retract timer times out. The retract timer is designed to accept power from either the +10 or +36 Vdc supply, thus, if either supply should fail, the circuit will still function. Further, if both supplies should fail (as in the loss of mains power), the rotating spindle will act as a generator to provide enough power to retract the heads. The emergency retract voltage can be observed at the test point on PMR PCA-A91abeled "ERV". If a timeout or interlock fault should occur during normal operations (TOF or ILF = 1), the servo enable flip-flop will be cleared to disable the head positioning servo loop. This will de-energize the carriage unlatched solenoid (ECS = 0 and CSOL = 1) and linear motor relay (SEN = 0), disable the linear motor power amplifier (LMAE = 0), and initiate an emergency retract operation (ER = 0) after a 60 millisecond delay to ensure closure of the linear motor relay contacts. The state of the ER signal can be observed at the test point on PMR PCA - A9 labeled "ER". The interlock (ILF) line goes through an inverter and becomes the signal ILFL. If an interlock fault (ILF = 1, ILFL = 0) or a write fault (WFLT = 0) should occur, head selection will be terminated. This action prevents the heads from writing on the disc during an emergency retract operation. If a failure is detected in one or more of the power supplies (PSF = 0), a greater emergency is said to exist because it cannot be assumed that supply voltages are available to power the disc drive circuitry. In this case, the linear motor relay is immediately de-energized (PSF = 0) and a FET switch grounds the ER signal line (ER = 0) to force. an emergency retract operation. In addition, the PSF signal disables power to the spindle permitting it to coast to a stop and holds the door unlock solenoid de-energized to prevent access to the pack chamber until the carriage has been fully retracted (CRB = 1), spindle has come to a stop (SPD = 1), and the RUN/STOP switch has been set to STOP (STOP = 1). 1-43. SECTOR SENSING SYSTEM The sector sensing system (see figure 4-27) consists of circuits on track follower PCA-A5 and I/O sector PCA-A2, although all communication between these two PCA's occurs via motherboard PCA-A7. The purpose of the sector sensing system is to monitor circumferential head position by continually monitoring the physical location of each data sector as it passes beneath the heads. It notifies the controller when the present sector count equals the addressed· sector. In addition, it enables the read/write system for a data transfer operation and gates the unit identity of the disc drive to the controller upon request, provided the RPS feature is enabled. To accomplish this, a sector clock and index pulse are derived from the servo code which is magnetically recorded on the servo surface (see figures 1-2 and 1-10). The servo code consists of 6720 di-bits per revolution, although three of these di-bits are not recorded in the index zone. As the servo head flies over the servo surface, a voltage is magnetically induced. The output from the servo head is directly coupled to the input of the differential preamplifier stage. This stage consists of two differential amplifiers coupled together by a filter network. The gain of the first differential amplifier is controlled by the output from the AGC circuit on track follower PCA-A5. The differential output is filtered and coupled to a second, fixed-gain differential amplifier. The output from the differential preamplifier stage can be observed at the test point labeled "PRE". It will be approximately 1.4 volts peak-to-peak. This differential output is coupled to the input of an integrated phase locked loop through the servo head signal filter (low-pass filter). The sector clock developed by the phase locked loop is coupled to a divide-by-eight counter and is fed back to provide a reference signal to the phase locked loop and a clocking signal to the index detector. The reference signal can be observed at the test point labeled "REF". The developed sector clock is a square-wave with exactly 53,760 transitions per revolution or 2.42 MHz at a spindle 1-23 Theory of Operation 7925 speed of 2700 revolutions per minute. It is this output that is used to clock the sector counting electronics on I/O sector PCA-A2. Also, since the sector clock is phase locked to the servo code, it tracks any variations in spindle speed. The sector clock can be observed at the test point labeled "SCL". The inverted (PRE) output from the differential preamplifier stage is also coupled to the input of the nega·, tive level detector. The level detector detects the presence of peaks in the servo code that exceed 0.33 volt in amplitude. The output from the level detector can be observed at the test point labeled "NLD". The output from the negative level detector is coupled to the index detector where it sets a delay flip-flop. The output from the flip-flop is coupled to a 7-bit shift register. As the discs rotate counterclockwise from the beginning of sector 0 through the end of sector 63, positive-true bits are shifted into the shift register on the trailing edge of the reference signal. A unique 6-bit index pattern is magnetically recorded between physical sectors 0 and 63. When the entire 6-bits of the index pattern have been shifted into the shift register, an index pulse is generated on the trailing edge of the next reference signal transition. This index pulse can be observed at the test point labeled "IP". It will remain active for 3.31 microseconds. The index pulse (lP) clears the CE index flip-flop. The "Q" output of this flip-flop is inverted and becomes the CEP signal. When the CEP signal is equal to logical one, a data pack is in the disc drive. When the CEP signal is equal to logical zero, a CE disc pack is in the disc drive. If a CE disc pack is in the disc drive, circuitry on I/O sector PCA-A2 prevents writing on the CE disc pack. The derived sector clock is coupled to a divide-by-840 counter. At each count of 840, the sector counter is clocked to store the present sector count. This count corresponds to the physical sector presently passing beneath the heads. One revolution results in 53,760 clock transitions which when divided by 840 equals 64 physical sectors. The present sector count along with the head address are returned to the controller whenever it issues an RQP command. Each time the disc pack completes a revolution, the index pattern is detected and the index pulse is generated to clear both the divide-by-840 and sector counters. This will initiate'the counting cycle for the next revolution. The sector address register is initially cleared when NDPS becomes active (NDPS = 0). This occurs when power is first applied or when the RUN/STOP switch is set to RUN. This will establish a sector address of zero which will remain in effect until the contents of the sector address register are changed by either an ADR or XMS command. Whenever an ADR or XMS command is issued by the controller, a 6-bit sector address is also supplied. Bits D4 through D7 are checked to ensure that the address is legal before it is stored in the sector address register (legal sector addresses are 0 through 63). If bits D6 and D7 are active, the supplied address is greater than 63 and is therefore illegal. An illegal address is not stored in the 1-24 sector address register, but instead a seek check will result (status bit 2 = 1). The legal address stored in the sector address register is continually compared with the present sector count by the sector comparator. Once the sector presently passing beneath the heads matches the addressed sector, the sector compare flip-flop will be clocked. When clocked during a read or write operation, the sector compare flip-flop will be clocked set (status bit 8 = 1) and the sector compare signal will become active (SC = 1) to enable the read/ write system for a data transfer operation. Sector compare can be observed at the test point labeled "SC". It will remain active until the end of the addressed sector is forced (count 817) or the READ or WRITE command is dropped. The legal address stored in the sector address register is also continually compared with the present sector count by the look-ahead comparator. This comparator forms part of the rotational position sensing feature in each disc drive. This feature (if enabled) permits a disc drive to transfer its identity to the controller up to 15 sectors (5.2 milliseconds) before an actual sector compare occurs (status bit 8 = 1). Four jumpers provide the means to add a 4-bit binary number to the present sector count. If all four jumpers are installed, a zero will be added to the present sector count and the look-ahead feature will have no effect. If all four jumpers are removed, 15 will be added to the present sector count. Any combination of jumpers may be used, however, RPS should be disabled when the disc drive is connected to an HP 13037 Disc Controller. When sector compare minus look-ahead occurs, the disc drive will gate its identity onto a specific line on the control bus that corresponds to the unit number of that disc drive. This assumes, of course, that the disc drive has its attention bit set (status bit 7 = 1) and an RQI command is active. 1-44. READ/WRITE SYSTEM The read/write system (see figure 4-28) consists of circuits on I/O sector PCA-A2, servo PCA-A3, drive control PCAA4, and R/W preamplifier PCA-A6. All communication between these PCA's occurs via motherboard PCA-A7. The data heads connect directly to R/W preamplifier PCA-A6. The purpose of the read/write system is to provide the means to read information from or write information onto a data surface of the disc pack. Included in the following are discussions relative to head selection, read mode operation, write mode operation, and read/write fault detection. 1-45. HEAD SELECTION. Information is read from or written onto a data surface of the disc pack by means of nine data heads. There is one data head for each data surface. Each data head consists of a gapped ferrite core mounted in a ceramic shoe. Data heads are gimbaled and contoured to fly over the surface of the disc supported by a thin cushion of air. Two windings are wound around the ferrite core. They are connected at a common point and phased such that the common point acts as a center tap. 7925 Theory of Operation These windings are used for both reading and writing by detecting or producing a magnetic field at the gap in the ferrite core. The appropriate head must be selected before a read or write operation can be performed. The address of the desired head is stored in the head address register on I/O sector PCA-A2. The head address register is initially cleared when NDPS becomes active (NDPS = 0). This occurs when power is first applied or when the RUN/ STOP switch is set to RUN. This will establish a head address of zero which will remain in effect until the contents of the head address register is changed by an ADR command. Whenever an ADR command is issued by the controller, a 4-bit head address is also supplied. Bits D8, D9, DI0, and Dll are checked to ensure that the address is legal before it is stored in the head address register (legal head addresses are 0 through 8). An illegal head address is not stored in the head address register, but instead a seek check will result (status bit 2 =1). The stored head address is buffered by circuits on drive control PCA-A4. The buffered head select bits (BHSO through BHS3) are coupled to the input of the data head decoder on R/W preamplifier PCA-A6. If no write faults exist (WFLT = 0), the center tap winding of the addressed head will be switched to a + 12 Vdc power source. The multiple heads selected detector continuously monitors the center tap windings, and if more than one head is selected, a destructive MH fault will be declared. 1-46. READ MODE OPERATION. As the data surfaces pass beneath the data heads, the magnetically stored flux fields intersect the gap in the ferrite core. Gap motion through the flux field causes a voltage to be induced into the read/write winding wound around the core. This induced voltage is analyzed by the read circuitry to define the data recorded on the data surface. Each flux reversal (caused by a write current polarity change) generates a readback voltage pulse. The read circuitry on RlW preamplifier PCA-A6 and drive control PCA-A4 is always enabled in the read mode. A differential signal is coupled from the selected head windings to the input of the preamplifier stage via the head select diodes and the two conducting read/write mode FET switches. The other heads and the write current paths are isolated by back-biased diodes. The gain of the preamplifier stage is set by the data AGC circuit on drive control PCA-A4. The output of the preamplifier stage is coupled through a balanced low-pass filter to the differentiator stage. The differentiator stage transforms the read data waveform such that the data points are represented by zero crossings rather than the peaks produced at the data head. The differential data from RlW preamplifier PCA-A6 is coupled through a second balanced low-pass filter on drive control PCA-A4 to the input of the fixed-gain read amplifier. The output from this amplifier is coupled to the zero crossing detector and data AGC circuit. The data AGC circuit maintains a constant peak-to-peak level at the input of the zero crossing detector by controlling the gain of the preamplifier stage on R/W preamplifier PCA-A6. The data AGC circuit is disabled during write mode operations. Once the sector presently passing beneath the heads matches the addressed sector, the sector compare flip-flop on I/O sector PCA-A2 will be clocked. When clocked during a read mode operation, the sector compare flip-flop will be clocked set (status bit 8 = 1) and the sector compare signal will become active (SC = 1) to enable the read/write system for a data transfer. Sector compare will remain active until the end of the addressed sector is forced (count 816) or the READ command is dropped. With the disc drive selected (SEL = 1) and the read system enabled (URG = 1), the zero crossing detector and line driver are both enabled. The zero crossing detector will produce a pulse for positive- or negative-going zero crossings. These pulses are transferred to the controller via the bidirectional data lines unique to that disc drive. Data separation is performed by circuits in the controller. 1-47. WRITE MODE OPERATION. Data is written by passing a current through the read/write winding in the selected head. This generates a flux field across the gap. The flux field magnetizes the iron oxide particles bound to the surface of the disc. The writing process orients the poles of each magnetized particle to permanently store the direction of the flux field as the oxide passes beneath the head. The direction of the flux field is a function of the write current polarity. Data is written by reversing the write current through the head windings. This change in write current polarity switches the direction of the flux field across the gap. Erasing old data is accomplished by writing over any data which may have been previously written on the disc. As in a read operation, the sector compare flip-flop must be clocked set (status bit 8 = 1) and the sector compare signal must be active (SC = 1) to enable the read/write system for a data transfer. Sector compare will remain active until the end of the addressed sector is forced (count 817) or the WRITE command is dropped. With the disc drive selected (SEL = 1) and the write system enabled (UWG = 1), the line receiver on drive control PCA-A4 is enabled to accept data from the controller via the bidirectional data lines unique to that disc drive. Data formatting is performed by circuits in the controller. The data pulses produced by the line receiver toggle the write toggle logic to supply two complimentary write data signals (WDA and WDB) once the write mode of operation has been enabled. The write mode is enabled when the disc drive is selected (SEL = 1), the write system is enabled (UWG = 1), no write faults exist (WFLT = 0), and the read only mode is disabled (R02 = 0). 1-25 Theory of Operation 7925 The read only mode inhibits a write operation and thus prevents data from being written onto any data surface of the disc pack. The read only mode is selected when the READ ONLY switch is set to READ ONLY. The READ ONLY lamp will light and the read only status bit will become active (status bit 6 = 1) to signify that the read only mode has been selected. When the write signal is active (WRITE = 1) and the URG and ACRY signals are both inactive (URG and ACRY = 0) which signifies that the read mode is disabled and the heads are settled over a legal cylinder, the WEN signal will become active (WEN = 1) to enable the write mode. Once enabled, the the read/write mode FET switches will disconnect the head select diodes from the preamplifier stage. In addition, it will enable the sWitchable write current source to produce write current to the head windings. The amount of write .current produced is controlled by the programmable write current sink. The three most significant bits of the cylinder address are coupled from servo PCA-A3 to the input of the programmable write current sink on R/W preamplifier PCA-A6. This information is used to modify the write current via the programmable write current sink. Seven write current zones ensure proper saturation for best head resolution. Write current is reduced by 2.1 milliamperes for each 128 cylinder increment from cylinder zero. Maximum write current is available at the outer cylinders and it is progressively reduced as the heads are moved toward the inner cylinqers. This will optimize the write current for the changing relative velocity between the heads and media as cylinder radius decreases. Table 1-4 lists the reduction in write current as a function of the cylinder address. The programmable write current sink draws current from the selected head through the write current switches. Each write cun-ent switch is in series with one of the head windings. The complementary write data lines (WDA and WDB) alternately control these write current switches. This selects the head winding through which the write Table 1-4. Write Current Reduction vs. Cylinder Address CYLINDER DWA owe owe REDUCTION IN WRITE CURRENT (rnA peak) 0-.127 0 0 0 0 128-.255 0 0 1 2.1 256-.383 0 1 0 4.2 384-'511 0 1 1 6.3 512 ......639 1 0 0 8.4 640 ......767 1 0 1 10.5 768 ......822 1 1 0 12.6 1-26 current will pass. Changing the write current from one winding to the other reverses the flux field at the gap in the ferrite core. This changes the direction of the magnetization of the oxide particles bound to the surface of the disc, thereby writing a data bit. 1-48. READ/WRITE FAULT DETECTION. As previously mentioned, the multiple heads selected detector continuously monitors the center taps of each head winding, and if more than one head is selected, a destructive MH fault is declared. In addition, the ac write current detector continuously monitors the output of the switchable write current source, and if dc write current is being destructive W · AC fault is declared. The dc write current detector continuously monitors the output of the switchable write current source, and if dc write current is being applied to the head windings and the disc drive is not in the write mode, a destructive DC · W fault is declared. The state of the ACRY signal is continuously monitored, and if head movement is detected during the write mode, a non-destr"uctive W · AR fault is declared. The state of the URG signal is continuously monitored, and if the read and write modes are simultaneously enabled, a nondestructive R. W fault is declared. Whenever one of these read/write fault conditions is detected, a latch on drive control PCA-A4 will be set, an LED will light, subsequent read/write faults will be inhibited, the write mode will be terminated, and all heads will be disabled. 1-49. FAULT DETECTION SYSTEM The fault detection system (see figure 4-29) consists of circuits on I/O sector PCA-A2, servo PCA-A3, drive control PCA-A4, spindle logic PCA-A8, power and motor regulator (PMR) PCA-A9, and fault indicator PCA-A12. All communication between card cage PCA's occurs via motherboard PCA-A7. Spindle logic PCA-A8 and PMR PCA-A9 communicate with the other PCA's through the main harness. Fault indicator PCA-A12 communicates with drive control PCA-A4 through a separate interconnecting cable. The purpose of the fault detection system is to continually monitor various conditions within the disc drive, and light fault indicators, retract the heads, and brake spindle rotation when a fault is detected. Included in the following are discussions relative to illegal address, timeout, AGC, carriage back, interlock, and read/write fault detection. I-50. ILLEGAL ADDRESS DETECTION. Circuits on I/O sector PCA-A2 and servo PCA-A3 continually monitor the internal control bus in the disc drive for illegal cylinder, head, and sector addresses. In addition multiple SEEK commands are detected by circuitry on I/O sector PCA-A2. Whenever one or more of these conditions exists, the disc drive will make seek check (status bit 2 = 1) available in its status word and it will not clock the illegal address into the appropriate register. Each of these detection circuits is discussed in detail in the following paragraphs. 7925 Theory of Operation 1-51. Illegal Cylinder Address Detection. The internal control bus bits DO through D9 are continually monitored by the illegal cylinder address detector on servo PCA-A3. If a cylinder address greater than 822 is de- tected, the ICA signal will become active (lCA = 1). This will inhibit the illegal cylinder address from being clocked into the new cylinder address register (see figure 4-29). The seek check flip-flop will be clocked set on the leading edge of the decoded SEEK command. The seek check flipflop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). In addition, the seek check flip-flop is reset by CYL whenever the seek home command is active (SKH = 0) or a seek to a legal cylinder address command is decoded. Further, if the heads are in motion (ACRY = 1) when the SEEK command is decoded, the seek check flip-flop will be clocked set on the leading edge of the decoded SEEK command. This will notify the controller that the disc drive is in the process of executing a previous SEEK command. 1-52. Illegal Head Address Detection. The internal control bus bits D8, D9, DI0, and Dll are continually monitored by the illegal head address detection circuitry on I/O sector PCA-A2. If a head address greater than 8 is detected, the illegal head address flip-flop will be clocked set on the leading edge of the decoded ADR command. In addition, the illegal head address will not be clocked into the head address register (see figure 4-28). The illegal head address flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). 1-53. Illegal Sector Address Detection. The internal control bus bits DO and D7 are continually monitored by the illegal sector address detection circuitry on I/O sector PCA-A2. If a sector address greater than 63 is detected, the illegal sector address flip-flop will be clocked set on the leading edge of the decoded ADR or XMS command. In addition, the illegal sector address will not be clocked into the sector address register (see figure 4-27). The illegal sector address flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). 1-54. TIMEOUT FAULT DETECTION. Each time a forward or reverse seek operation is commanded, circuits on drive control PCA-A4 initiate a 120 millisecond time-out cycle. When the SEEK command is de- coded (SK = 1), the timeout cycle flip-flop is set to initiate the 120 millisecond timout cycle. A 135 Hz signal (TCC) derived from the spindle speed (see figure 4-29) is used to clock the timeout counter. Similarly, a 1667 millisecond timout cycle is initiated each time an initial head load, normal head unload, or recalibrate operation is commanded. Table 1-5 provides a summary of those conditions that initiate and those conditions that cancel a timeout cycle. If the event being timed is not cancelled before the timeout counter times out, a timeout fault will be declared. When a timeout fault is detected, the following events will occur: · TOFL signal becomes active (TOFL = 0). · T fault LED lights (TOFL = 0). · Timeout counter reset is inhibited (TOFL = 0). · Heads are unloaded, spindle is braked to a stop, and the pack chamber door is unlatched. Refer to table 1-6 for the specific events. The timeout counter is reset by DPS whenever the poweron sequence is initiated (lLF = 1) or the RUN/STOP switch is set to RUN (RUN = 1). TIMEOUT CYCLE 120 ms 1667 ms 1667 ms 1667 ms Table 1-5. Summary of Timeout Conditions INITIATING CONDITION CANCELLING CONDITION Seek command (SK = 1) Initial Head load (SKH = 0) Normal head unload (RET. TOFl + IlFl = 1) Recalibrate command (RH = 1) Heads settled on specified cylinder within 120 milliseconds (TOFl · ACRY = 1). Heads settled on cylinder 0 within 1667 milliseconds (TOFl · ACRY = 1). Heads reach fully retracted position within 1667 milliseconds (TOFl · RET. CRB = 1). Heads are settled on cylinder 0 within 1667 milliseconds (TOFl · 2 ACRY = 1). 1-27 Theory of Operation 7925 STEP Table 1-6. Fault Events EVENT 1 DRIVE FAULT lamp lights (FLTL = 0). 2 Drive fault status bit is active (status bit 4 = 1). 3 Normal head unload operation is initiated (RET = 1). 4 Drive ready flip-flop is reset (RET = 1). 5 DRIVE READY lamp goes out (DRDYL = 1). 6 Servo enable flip-flop is reset (TOF = 1). 7 Head positioning servo is disabled (SEN = 1). 8 Heads are fully retracted (CRB = 1). 9 Run spindle flip-flop is reset (TOF · CRB = 1). 10 Stop spindle command becomes active (RS = 0). 11 Spindle is braked to a stop (SPD = 0). 12 Door unlock solenoid is energized (SPD = 0). 13 DOOR UNLOCKED lamp lights (DU = 0). I-55. AGC FAULT DETECTION. The state of the AGC signal is continually monitored by a circuit on servo PCA-A3. If the servo AGC signal is lost while the heads are located on or between cylinders 0 and 822, an AGC fault will be declared. When an AGC fault is detected, the following events will occur: · AGC fault flip-flop is set (AGCF · DRDY = 1). · AGFL signal becomes active (AGFL = 0). · AGC fault LED lights (AGFL = 0). · Heads are unloaded. Refer to table 1-6, steps 1 through 8, for the specific events. The AGC fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (ILF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). 1-56. CARRIAGE BACK FAULT DETECTION. The state of the CRB signal is continually monitored by a circuit on drive control PCA-A4. If the CRB signal becomes active (CRB = 1) indicating that the heads have been fully retracted, but the drive ready flip-flop has not been reset by the RET signal (CRB and DRDY simultaneously active), a carriage back fault will be declared. When a carriage back fault is detected, the following events will occur: · Carriage back fault flip-flop is set (CRB · DRDY = 1). · CBFL signal becomes active (CBFL = 0). · CB fault LED lights (CBFL = 0). · Heads are unloaded. Refer to table 1-6, steps 1 through 8, for the specific events. 1-28 The carriage back fault flip-flop is reset by DPS whenever the power-on sequence is initiated (lLF = 1) or the RUN/ STOP switch is set to RUN (RUN = 1). I-57. INTERLOCK FAULT DETECTION. The interlock fault detection circuitry on drive control PCA-A4 continually monitors the interlock chain, the -36, -24, -12, +5, + 12, and +36 Vdc power supply voltages, the temperature of the heat sink on PMR PCA-A9, and the spindle fault logic on spindle logic PCA-A8. If anyone of the PCA's (with the exception of indicator PCA-All and fault indicator PCA-AI2) is not firmly in place, the pack chamber is disconnected, anyone of the monitored power supplies falls below a specified value, the temperature of the heat sink on PMR PCA-A9 rises above a specified value, or a spindle fault is detected, an interlock fault will be declared. When an interlock fault is detected, the following events will occur: · PSU LED is on when +5 Vdc and + 12 Vdc are present. · ILFL signal becomes active (ILFL = 0). · IL fault LED lights (ILFL = 0). · Heads are unloaded, spindle is braked to a stop, and the pack chamber door is unlatched. Refer to table 1-6 for the specific events. If an interlock is indicated because the + 5, + 12, or -12 Vdc is missing, or spindle logic PCA-A8 is unplugged, the spindle will not be braked to a stop and the pack chamber door will not be unlocked. Under these conditions, the following events will occur: o PSU LED goes out because PSF = O. · ILFL signal becomes active (ILFL = 0) · IL fault LED lights (ILFL = 0) · Heads are unloaded and steps 1 through 8 of table 1-6 apply. Note: If drive control PCA-A4 is unplugged, then the DRIVE FAULT and IL indicators will not light. 1-58. READ/WRITE FAULT DETECTION. The read/write fault detection circuitry on drive control PCA-A4 continually monitors internal disc drive signals to detect five fault conditions. These fault conditions are classified as either non-destructive or destructive write faults. There are two non-destructive and three destructive write faults. Each is discussed in detail in the following paragraphs. 1-59. Non-destructive Write Faults. The two fault conditions classified as non-destructive are: · Write without Access Ready (W · AR). · Simultaneous read or write (R. W). 7925 Theory of Operation In the first condition, the state of the AeRY signal is continually monitored. If the heads are not settled over the specified cylinder (ACRY = 1) during the write mode (WRITE = 1) and no other write faults exist (WFLT = 1), a W 0 AR fault is declared. When a W 0 AR fault is detected, the following events will occur: - -- oW. AR fault flip-flop is set (W 0 AR 0 WFLT = 1). o WRFL signal becomes active (WRFL = 0). - --- o W 0 AR fault LED lights (WRFL = 0). o NDWF signal becomes active (NDWF = 0). o WFLT signal becomes active (WFLT = 0). o Subsequent read/write faults are inhibited (WFLT = 0). o DRIVE FAULT lamp lights (FLTL = 0). o Drive fault status bit becomes active (status bit 4 = 1). The W 0 AR fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (ILF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). In the second condition, the state of the URG signal is continually monitored. If the URG signal becomes active (URG = 1) during the write mode (WRITE = 1) and no other write faults exist (WFLT = 1), a R · W fault is declared. When a RoW fault is detected, the following events will occur: oRo W fault flip-flop is set (R 0 W 0 WFLT = 1). o RWFL signal becomes active (RWFL = 0). o R o W fault LED lights (RWFL = 0). o NDWF signal becomes active (NDWF = 0). o WFLT signal becomes active (WFLT = 0). o Subsequent read/write faults are inhibited (WFLT = 0). · DRIVE FAULT lamp lights (FLTL = 0). · Drive fault status bit becomes active (status bit 4 = 1). The R · W fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). 1-60. Destructive Write Faults. The three fault conditions classified as destructive are: · A write gate without any alternating write current (W. AC). o More than one head selected (MH). o DC write current without a write gate (DC. W). In the first condition, the state of the ACW signal is continually monitored. If the ACW signal remains inactive (ACW = 0) during the write mode (WRITE = 1) and no write faults exist (WFLT = 1), a W · AC fault is declared. When a W 0 AC fault is detected, the following events will occur: o W 0 AC fault flip-flop is set (W · AC · WFLT = 1). o WAFL signal becomes active (WAFL = 0). o W 0 AC fault LED lights (WAFL = 0). o DWF signal becomes active (DWF = 0). o WFLT signal becomes active (WFLT = 0). o Subsequent read/write faults are inhibited (WFLT = 0). o Heads are unloaded. Refer to table 1-6, steps 1 through 8, for the specific events. The W 0 AC fault flip-flop is reset by DPS whenever the power-on sequence is initiated (lLF = 1) or the RUN/ STOP is set to RUN (RUN = 1). In the second condition, the state of the MHS signal is continually monitored. If the MHS signal becomes active (MHS = 0) and no other write faults exist (WFLT = 1), a MH fault is declared. When a MH fault is detected, the following events will occur: · MH fault flip-flop is set (MHS · WFLT = 1). · MHFL signal becomes active (MHFL = 0). o MH fault LED lights (MHFL = 0). o DWF signal becomes active (DWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · Heads are unloaded. Refer to table 1-6, steps 1 through 8, for the specific events. The MH fault flip-flop is reset by DPS whenever the power-on sequence is initiated (ILF = 1) or the RUN/ STOP switch is set to RUN (RUN = 1). 1-29 Theory of Operation 7925 In the third condition, the state of the DCW signal is continually monitored. If write current is being applied to the heads (DCW = 1), the disc drive is not in the write mode (WRITE = 0), and no other write faults exist (WFLT = 1), a DC · W fault is declared. When a DC · W fault is detected, the following events will occur: · Both the W · AC and MH fault flip-flops are set (DC. W · WFLT = 1). · Both the WAFL and MHFL signals become active (WAFL and MHFL = 0). · Both the W · AC and MH fault LED's light (WAFL and MHFL = 0). · DWF signal becomes active (DWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · Heads are unloaded. Refer to table 1-6, steps 1 through 8, for the specific events. The W. AC and MH fault flip-flops are reset by DPS whenever the power-on sequence is initiated (lLF = 1) or the RUN/STOP switch is set to RUN (RUN = 1). 1-61. AIR CIRULATION AND FILTRATION SYSTEM The air circulation and filtration system (see figure 1-11) consists of a rotating impeller located on the disc drive mainframe and an exhaust fan located on the power panel assembly. In addition, a prefilter and absolute filter are used to trap contaminants in the developed air supply. As can be seen in figure 1-11, a centrifugal blower draws room ambient air into the prefilter enclosure through the vent openings in the front door of the enclosure. The larger airborne contaminants are trapped as the air is drawn through the prefilter. Approximately one-half of the developed air flow bypasses the absolute filter element, passing directly through the lower half of the absolute filter box. From there, the air is directed through a flexible hose to the cooling air duct where it is diverted into three separate paths. Two of these paths flow along I~ --:"":"":"'~_ABSO LUTE FILTER 7301-45 1·30 PREFILTER ENCLOSURE PREFILTER Figure 1-11. Air Circulation and Filtration System 7925 Theory of Operation the fins of the heat sink on power and motor regulator PCA-A9 and the remaining path is distributed over the components mounted on the PCA. The flow of air from the heat sink exits through the ducting and vent openings provided at the rear of the enclosure. The remammg half of the developed air flow passes through the filtration element in the absolute filter where 99 percent of all contaminants 0.3 micron or larger are trapped. After the air is thoroughly filtered, it is ducted into the pack chamber. When a disc pack is installed, all critical areas will be purged of any foreign matter. Also, the high positive pressure developed within the pack chamber tends to reject any foreign matter that may be airborne. Figure 1-12 shows the critical elements involved in the read/write process, i.e., the read/write gap, the flying height of the heads, and the thickness of the oxide coating on the disc surfaces. The flying height of the heads is an average value due to the surface irregularities of both the heads and discs. Figure 1-12 also shows various types of contaminants and their size relationships. If a particle was hard enough and of the right size, it could scratch either the oxide coating or the head surface. Even if it was not hard enough to scratch, it may be large enough to increase the head-to-disc spacing, thereby causing data errors. Therefore, to prevent potential damage due to head-to-disc contact and possible data losses, it becomes extremely important to maintain the cleanliness of the air supply within the disc drive. To ensure that clean air will be present, the disc drive must be operated in the specified environment and the cleanliness of the prefilter and efficiency of the absolute filter must be checked on a regular basis. Refer to Section II, Maintenance, for the absolute filter output air pressure measurement procedure. Further, the absolute filter must be changed whenever the air flow through it becomes restricted and the output air pressure drops below the value specified in paragraph 2-13. Refer to Section V, Removal and Replacement, for the prefilter and absolute filter replacement procedures. SMOKE PARTICLE 6.35 MICRONS (250 MICROINCHES) READ/WRITE GAP 1.52 MICRONS (60 MICROINCHES)) TYPICAL FLYING HEIGHT AT CYLINDER 822 ~n~ 0.69 MICRONS ~ -1. (27 MICROINCHES) I .... llH~ J OXIDE COATING THICKNESS 1.01 MICRONS (40 MICROINCHES) ¢ DIRECTION OF ROTATION IS COUNTERCLOCKWISE. SURFACE SPEED AT 2700 RPM IS 112 MILES PER HOUR AT THE OUTER CIRCUMFERENCE. ~ ALUMINUM SUBSTRATE 0.19 CENTIMETRE (0.075 INCH) REF 7301-46 Figure 1-12. Types of Contaminants and Critical Elements 1-31 Theory of Operation 7925 1-62. POWER DISTRIBUTION SYSTEM The power distribution system primarily consists of the power panel assembly, power supply assembly, voltage regulator and protection circuits, and the associated switches, fuses, lamps, and wiring. The purpose of the power distribution system is to develop the various operating voltages from the primary power source and distribute these voltages throughout the disc drive circuitry. Figures 4-22 and 4-23 provide the wiring diagrams for the power panel assembly and disc drive mainframe assembly, respectively. Tables 4-3 and 4-4 provide the signal distribution list for motherboard PCA-A7 and the power distribution list for the disc drive mainframe assembly, respectively. Together these diagrams and listings provide all of the wiring information for the disc drive. 1-63. POWER PANEL ASSEMBLY. The power panel assembly (22, figure 6-1) is located in the lower rear section of the disc drive cabinet. This assembly consists of a circuit breaker, a three-receptacle outlet strip, and an air exhaust fan. The power panel assembly equips the enclosure with an electrical package to control, protect, and distribute single-phase mains power. The exhaust fan is used to help maintain the internal cabinet temperature at the proper operating level. The disc drive is supplied with an appropriate power cord. The various power cords available are shown in the HP 7925D Installation Manual, part no. 07925-90912. 1-64. POWER SUPPLY ASSEMBLY. The power supply assembly consists of a power transformer (T1), three bridge rectifiers (CR1 through CR3), five filter networks (R1 through R5 and C1 through C5), and eight fuses (F2 through F9). This assembly develops five unregulated dc voltages (+20V, -20V, +lOY, +36V, and -36V) from the primary power source. The terminal strip (TB1) on the primary side of the power transformer (T1) permits strapping of the primary windings to match the available primary power source. Refer to the HP 7925D Installation Manual, part no. 07925-90912, for the various strapping configurations of TBl. Fuses F2 through F6 provide overload protection for the five unregulated secondary voltages. Fuses F7 through F9 provide overload protection for bridge rectifiers CR1 through CR3. All power supply assembly grounds are brought to a common ground block (TB2). It is important that these connections be made as shown because each has a specific assignment, i.e., ground 1 serves as logic ground, ground 2 serves as linear motor ground, and grounds 3 and 4 serve as spindle motor grounds. 1-65. VOLTAGE REGULATOR CIRCUITS. The unregulated dc voltages developed by the power supply assembly are routed to the four voltage regulator circuits on power and motor regulator PCA-A9 via the power sup- ply harness. The unregulated output from the +10 volt supply is routed to the input of the +5 volt voltage regulator. The +5 volt regulated supply is sampled at motherboard PCA-A7 so that the proper voltage level will be maintained at that point. The unregulated output from the +20 and -20 volt supplies are routed to the inputs of the + 12 and -12 volt voltage regulators. The unregulated output from the -36 volt supply is routed to the -24 volt voltage regulator. Test points are provided on power and motor regulator PCA-A9 to monitor the outputs from the + 5, + 12, -12, and - 24 volt regulated supplies. 1-66. VOLTAGE PROTECTION CIRCUITS. Circuits are provided in the disc drive to detect over and under voltage conditions in the +5, +12, -12, +36 and -36 volt supplies. Reverse polarity protection is also incorporated into each disc drive supply. Diodes on power and motor regulator PCA-A9 provide reverse polarity protection at the input of the +5, +12, -12, and -24 volt regulated supplies and +36 and -36 volt unregulated supplies. Diodes on motherboard PCA-A7 provide additional reverse polarity protection for the +12 and -12 volt regulated supplies. In addition, a crowbar circuit on motherboard PCA-A7 guards the +5 volt regulated supply from a possible overvoltage condition and guards the -12 volt regulated supply from a possible connection to a positive supply. A fuse (A9F1) provides overload protection for the +36 Vdc supply. The -24 volt regulated supply is also protected from overload by a fuse (A9F2). 1-67. SUPPLY VOLTAGE DISTRIBUTION. The outputs from each of the four regulated supplies, the +10 volt unregulated supply, the +36 volt supply, and ground 1 are routed throughout the disc drive via the main harness and motherboard PCA-A7. The regulated supplies are used to provide the operating voltages for the disc drive circuitry. The unregulated +10 volt supply is used to provide the operating voltage for the carriage unlatched solenoid and pack chamber door unlocked solenoid. In addition, it provides the input to the +5 volt voltage regulator. Ground 1 is used as logic ground throughout the disc drive circuitry. The +10 volt supply is used to evaluate the line voltage condition (brownout protection). A power distribution list is provided in table 4-5. The outputs from the +20, -20, +36, -36 volt unregulated supplies and grounds 2, 3, and 4 are not included in this listing because they are used exclusively on power and motor regulator PCA-A9. As long as PSF equals 1, the PSU LED on drive control PCA-A4 will be on indicating that the +5, +12, and -12 power supplies are working and within tolerance. As previously mentioned, the unregulated outputs from the +20, -20, and -36 volt supplies are used to develop regulated voltages, ground 2 is used as linear motor ground, and grounds 3 and 4 are used as spindle motor grounds. The unregulated ±36 volt supplies are used to provide the operating voltages for the linear motor power amplifier and the four spindle motor current switches which are located on power and motor regulator PCA-A9. 1-32 MAINTENANCE I~ 2-1. INTRODUCTION WARNING This disc drive does not contain operator-serviceable parts. To prevent electrical shock, refer all installation and maintenance activities to service-trained personnel. This section contains maintenance precautions, listings of special tools and test equipment, preventive maintenance routines, and preventive maintenance inspection and cleaning procedures. Maintenance of the disc drive must be performed by service-trained personnel only. 2-2. MAINTENANCE PRECAUTIONS To avoid injury to personnel and to prevent damage to equipment, observe the following safety precautions: WARNING · Observe all warnings and cautions provided in this manual and that are placed on the equipment. · Use extreme caution when working on the disc drive with shroud removed or doors opened. Hazardous voltages are present inside the mainframe when the power distribution assembly is connected to an active ac power source. · Do not attempt to remove or change printed-circuit assemblies, interconnecting cables, or extender cards while power is applied. I CAUTION I · Do not run the disc drive without an absolute filter. Severe contamination in the head/disc area will result which could damage the head and/or disc surface. · Use only the brands of cleaning material specified in table 2-1. Some other brands contain contaminating oils and/or lint which may leave a harmful residue. · Use only the type of alcohol specified in table 2-1. Some other brands contain impurities that could cause damage. · Avoid applying excessive pressure to the gimbal area of the head while cleaning. Excessive pressure may alter or damage the head characteristics which are precision set at the factory. · Never place an inspection mirror between the heads or allow it to touch the heads. The flying characteristics of the heads may be altered or damaged. · Do not use oil or other similar lubricants anywhere in the disc drive. · Do not attempt to manually extend the carriage assembly, unless the head loading tool (part no. 13354-60023) is clamped to the carriage assembly and there is no disc pack in the disc drive, otherwise head damage will result. 2-3. SERVICE TOOLS AND TEST EQUIPMENT The following paragraphs list and describe the tools and test equipment required to service the disc drive. 2-4. STANDARD TOOLS Recommended standard tools and materials required for service are listed in table 2-1. Except where noted, equivalent tools may be substituted. 2-5. STANDARD TEST EQUIPMENT The standard test equipment required for maintenance are as follows: a. Digital Voltmeter, HP 970A or equivalent batteryoperated digital voltmeter. b. Oscilloscope, HP 180A, or equivalent. 2-6. SPECIAL TOOLS Table 2-2 lists the special tools required for maintenance. Figure 2-1 depicts the special tools. 2-1 Maintenance 7925 Table 2-1. Standard Tools TOOL HP PART NO. Lubricant* Pozidriv Bit Alcohol, isopropyl (filtered)* Bit, 1/4-inch drive, hex key Bit, 1/4-inch drive, Pozidriv #2 Bit, 1/4-inch drive, slotted Bit, 1/4-inch drive (used with part no. 1535-2653) Extension bar (used with part no. 8710-1007) Gauge set, 0.0015 - 0.025 inch Hex head drive (used with part no. 8710-1007) Inspection mirror Kimwipe tissues* Pin extractor Pliers, diagonal cutting Pliers, long nose Q-tips Screwdriver,4 x 114-inch Screwdriver,3 x 3/16-inch Screwdriver, Pozidriv Screwdriver, Pozidriv Screwdriver, Pozidriv, stubby Screwdriver, offset Socket set, 1/4-inch drive Soldering iron Soldering iron tip Steel rule, 6-inch Tape, masking Wire strippers Wrench, 7/16-inch box Wrench, torque, 0 - 12 inch-pounds Wrench, torque, 30 - 200 inch-pounds Cleaning sleeves (w/handle) 6040-0084 8710-0915 8500-0559 8710-0664 8710-0903 8710-0669 1535-2652 8710-1132 8750-0053 8710-1145 8830-0005 9300-0001 8710-0688 8710-0006 8710-0016 8520-0023 8730-0001 8730-0019 8710-0900 8710-0899 8690-0011 8690-0021 8750-0001 0460-0030 8710-0058 8720-0017 1535-2653 8710-1007 9310-5074 *Do not substitute. WARNING Isopropyl alcohol is a restricted article (flammable Iiquid). Transport in accordance with Department of Transportation Regulations, Title 49, parts 171 - 177 (Hazardous Materials). 2-7. SPECIAL TEST EQUIPMENT The only special test equipment required for maintenance is the Disc Service Unit. The Disc Service Unit (DSU) components include the following items and are depicted in figure 2-1. a. DSU Test Module, part no. 13354-60005 b. Head Alignment PCA, part no. 13354-60110 c. 20-Pin Jumper Cable, part no. 13354-60013 d. 50-Pin Jumper Cable, part no. 13354-60012 2-2 The DSU test module simulates controller signals which are applied to the disc drive and processes disc drive responses for display. Simulated signals are produced either manually or automatically to operate the disc drive under both static and dynamic conditions. All operations, including read and write, are limited to addressing and accessing. The actual writing of data is not performed and during a read operation, the DSU test module does not decode any data. Disc drive faults that occur during any operation are displayed by the light-emitting diodes which are located on the operator panel. In the automatic mode (functions 1,2, and 3), the DSU test module provides the means to automatically perform alternate, incremental, or random seek operations. These capabilities are used to exercise the disc drive to relax any mechanical stresses, and to permit an adjustment of the seek time. The index sequences (functions 4, 5, and 6) are used for the circumferential alignment of the heads. In the alignment mode (function 7), the DSU test module provides the means to automatically seek a specific cylinder while displaying a dimensional offset. These capabilities are used to align the data heads. In the manual mode (function 8), the DSU test module provides the means to manually program cylinder addresses, head and sector addresses, unit addresses, and offset information onto the control bus lines and the disc drive functions onto the tag bus lines. These capabilities are typically used for off-line checkout of the disc drive. A three-digit numerical display is provided on the DSU test module for measuring seek time, delay between seeks, Table 2-2. Special Tools NAME HP PART NO. OR HP PRODUCT NO. Air Pressure Measuring Gauge Cam Alignment Assembly CE Pack Assembly Extender Board Head Alignment Tool Head Installation Tool Head Initial Position Tool Spindle Logic Extender Head Extender Cable Head Loading Tool Fault Indicator Assembly Pack Lock Lubrication Tool Socket Torque Wrench Standoff Wrench-Retainer Hub Locking Bushing Thermometer 0101-0374 13354-60001 13357 A 13354-60003 13354-20007 13354-20009 13354-20008 13354-60002 13354-60025 13354-60023 13354-60014 07920-20086 8710-1239 8710-1240 2510-0115 07920-20090 07920-60091 07925-60009 7925 DATA DISC PACK IN CARRYING CASE HP 13356A (DISC PACK ONLY) DSU TEST MODULE P!N 13354-60005 TORQUE WRENCH PIN 1535-265~i POSIDRIV® BIT PIN 8710-0915 mi'... [IT l i t J -73J1f8 EXTENSION BAR P!N 8710-1132 1!4-INCH BIT P!N 1535-2652 HEX HEAD DRIVER PIN 8710-1145 ~ HEAD INSTALLATION TOOL PIN 13354-20009 CE DISC PACK IN CARRYING CASE HP 13357A HEAD ALIGNMENT PCA PIN 13354-60110 20-PIN JUMPER CABLE PIN 13354-60013 50-PIN JUMPER CABLE PIN 13354-60012 HEAD CAM ALIGNMENT TOOL PIN 13354-60001 7311-44C liD SECTOR PCA PIN 07925-60001 (Option 035 only) HEAD LOADING TOOL P!N 13354-60023 PACK LOCK LUBRICATiON TOOL PIN 07920-20086 TORQUE WRENCH PIN 8710-1240 TORQUE WRENCH PIN 8710-1007 WRENCH-RETAINER PIN 07920-20090 SOCKET PIN 8710-1239 HUB LOCKING BUSHING PIN 07920-60091 AIR PRESSURE MEASURING GAUGE PIN 0101-0374 £l"U.4J&t.'t:h6-%%%IM=-l:·NM#'@kj·i···}XWtW;H;@·:·fi:b\\t~;izM~"." AIR PRESSURE PROBE ASSEMBLY PIN 12995-60013 HEAD ALIGNMENT TOOL PIN 13354-20007 HEAD INITIAL POSITION TOOL PIN 13354-20008 SPINDLE LOGIC EXTENDER PIN 13354-60002 Maintenance USER'S MANUAL PIN 07925-90911 INSTALLATION MANUAL PIN 07925-90912 SERVICE MANUAL PIN 07925-90913 FAULT INDICATOR SERVICE ADAPTER PIN 13354-60014 THERMOMETER PIN 07925-60009 EXTENDER BOARD P!N 13354-60003 Figure 2-1. Special Service Tools 2-3/2-4 7925 Maintenance and head alignment. In addition, a meter is provided for measuring radial head alignment. In the manual mode, the state of each of the control bus lines and tag bus lines is displayed on LED's. Instructions for using the D8U for alignment and adjustment are provided in section III of this manual and an off-line checkout procedure in which the D8U is used is provided in section IV. 2-8. DSU CONTROLS AND INDICATORS. The following paragraphs describe the controls and indicators for the D8U (figure 2-2). Toggle switches - Twenty toggle switches that are used for seek, alignment, and manual functions of the D8U. For alternate and incremental seek operations, the switches are divided into two groups of 10 switches each. Each group is used to select a cylinder address in binary form for alternate seek operations. For the incremental seek operations, only the bottom 10 switches are used for selecting cylinder addresses. The center column of placarded information relating to the switches includes VFY, H8 (Cll), H4, H2, and HI, and 832, 816, 88, 84, 82, and 81. The VFY function is not used for the HP 7925. The labels H8 (Cll), H4, H2, and HI are used with the head alignment and manual functions. The toggle switches select the desired data head in binary form. REF 7300-11 Figure 2-2. DSU Test Module, Controls and Indicators 2-5 Maintenance 7925 The labels S32, S16, S8, S4, S2, and Sl are used with the manual function. The toggle switches select the desired sector for operation. The right-hand column of labels is used in the manual mode. Switches T1 through T3 set the tag bus commands and switches CO through C15 set the control bus commands. LED Indicators - Twenty indicators used in conjunction with the toggle switches. When a switch is set to the right, the corresponding LED lights indicating that the switch line is active. The indicators also display the states of the tag bus and control bus. STOP Pushbutton - Momentary contact switch that stops an operation in progress. START Pushbutton - Momentary contact switch that starts an operation, or in the manual mode, provides the strobe (STB) as long as actuated. DELAY Control - Varies time between seek operations from one millisecond (MIN) to 1.2 seconds (MAX). Digital Display - Three-digit display that indicates head offset in 6.3 microinch increments. If head offset is out of range, two decimal points on the left and center digits light. For seek operations, the display reads out time in milliseconds. HEAD ALIGNMENT Meter - Analog meter is used during head alignment. The meter displays head offset in 6.3-microinch increments. Each minor division represents 12.5 microinches. (See figure 2-3.) ~ ,I-.-- 62.5 MICROINCHES I" III I-n--/ 1 DIVISION = 12.5 MICRO INCHES I 10 1/2 DIVISION = 6.3 MICROINCHES I o \ \ ~o \ 30 "50 1~ / / 30 / / 50 -. --- - -,- - - - -- 7301-29 Figure 2-3. Head Alignment Meter Calibrations 2-6 2-9. DSU OPERATION. The operating functions of the DSU using the controls and indicators are described in the following paragraphs. FUNCTION 1 - ALTERNATE SEEK. This function is used to exercise the disc drive. The toggle switches are used to select the cylinder addresses for the seek operation. The top 10 switches are used to select the first cylinder address and the bottom 10 switches are used to select the second cylinder address. When the START pushbutton is pressed, the heads seek home (cylinder 0) then go to the first cylinder address. When the heads reach the first address, a seek to the second address is performed. This operation continues until the STOP pushbutton is pressed or the function is changed. If either address is greater than 822 the heads will remain at the address within range. If both addresses are out of range, only the seek home operation will be performed. Seek delay time is adjusted by the DELAY control. Note: All operations are terminated when the FUNCTION switch is set to any other position. FUNCTION 2 - INCREMENTAL SEEK. The bottom 10 switches are used to set the address increment the drive will seek. When the START pushbutton is pressed, the heads seek home and then will proceed to the next address. The next address is determined by the present address plus the address number set on the toggle switches. The incremental seek begins at cylinder zero and progresses to the next higher address until the highest cylinder number selected is an out-of-range address. When the out-of-range address is reached, the next seek will be the present address less the number set on the toggle switches. Seek delay time is adjusted by the DELAY control. FUNCTION 3 - RANDOM SEEK. Cylinder addresses are generated with a pseudo random sequence provided by the DSU. When the START pushbutton is pressed, the heads seek home then progress through the random sequence. The sequence continues until the STOP pushbutton is pressed or the function is changed. The seek time delay is adjusted by the DELAY control. FUNCTIONS 4, 5, and 6 - INDEX SEQUENCES. These functions are used for the circumferential alignment of the heads. FUNCTION 7 - HEAD ALIGNMENT. This function is used to align the data heads. The data head offset to be displayed on the meter and digital display are selected by the four toggle switches denoted by H8 (C11), H4, H2, and HI. When the START pushbutton is pressed, the heads seek home then seek to track 490. The head offset is displayed in 6,3-microinch units on the meter and digital display. 7925 Maintenance FUNCTION 8 - MANUAL. This function is used to operate the disc drive manually. Tag bus commands are entered by toggle switches TO through T3. Head selection is accomplished with switches H8 (Cll), H4, H2, and HI, and sector is selected using switches labeled S32, S16, S8, S4, S2, and S1. When the START pushbutton is pressed the operation begins. Indicator LED's CO through C15 display the state of the control bus. The tag bus commands are listed on the front panel of the DSU and described in Section I, Theory of Operation. Also, the control bus functions are described in section 1. 2-10. PREVENTIVE MAINTENANCE Table 2-3 provides preventive maintenance routines for the disc drive. These routines are to be performed every six months. However, if the disc drive is installed in an environment that contains abnormal amounts of dust, smoke, oil vapor, or other foreign matter, the routines should be performed more frequently. Preliminary steps are included to provide guidelines for preparing the disc drive for service. References are made to Section V, Removal and Replacement, for any disassembly that is required. In addition to the routines contained in table 2-3, detailed preventive maintenance procedures are also included. When the preventive maintenance has been completed and the disc drive has been restored to an operating condi- tion, perform an operational checkout using the appropriate diagnostic tests or the off-line checkout given in Section IV, Troubleshooting. 2-11. GENERAL CLEANING INFORMATION To ensure trouble-free operation, the disc drive should be kept free of unusual amounts of contaminants. When the results of an inspection indicate that excessive amounts of smoke, dust, oil vapor, or other foreign matter are present, a general cleaning is required. Refer to table 2-1 for the appropriate cleaning materials, ensuring that only the specified brands and types are used. 2-12. PRELIMINARY STEPS WARNING This disc drive does not contain operator-serviceable parts. To prevent electrical shock, refer all installation and maintenance activities to service-trained personnel. Before performing any or all of the preventive maintenance routines given in table 2-3 and in the preventive maintenance procedures, perform the following preliminary steps: Table 2-3. Preventive Maintenance Routines ITEM ROUTINE Absolute Filter and Prefilter Measure absolute filter output air pressure. Refer to paragraph 2-13. Replace as necessary. (Refer to Section V, Removal and Replacement.) Data and Servo Heads Inspect for contamination. (Refer to figure 2-6.) Clean as necessary. (Refer to paragraph 2-15.) Head Cables and Connectors Carriage Rails and Bearings Inspect for looseness and/or damage. Replace as necessary. Clean as required. (Refer to paragraph 2-16.) Inspect bearings for excessive wear and ease of operation. Spindle and Pack Chamber Remove all foreign particles and clean as necessary. (Refer to paragraph 2-17.) Spindle Ground Contact and Spring Inspect spindle ground contact and spring for excessive wear and/or looseness. Replace as necessary. Power Supplies Mainframe Switches and Solenoids Alignment of all adjustable parameters Indicators Pack Lock Lubrication Check all power supply voltage values. (Refer to paragraph 4-3.) Inspect for proper operation. (Refer to Section III, Alignment and Adjustment.) Check alignment of all adjustable parameters. If necessary, adjust. (Refer to Section III, Alignment and Adjustment.) Inspect for proper operation. Replace as necessary. (Refer to Section V, Removal and Replacement.) Perform the pack lock lubrication procedure. (Refer to paragraph 2-14.) 2-7 Maintenance 7925 a. Remove and store disc pack. Ensure that the disc pack is stored in the proper storage container. b. Disconnect the ac power cord from the main power source. c. Remove front and rear doors. d. Remove the side panels and shroud. (Refer to Section V, Removal and Replacement.) Note: Remove components only to the extent necessary to gain adequate access for servicing. e. Record the date the preventive maintenance was performed on the preventive maintenance label. If a new label is needed, a new one (HP part number 7120-7288) can be ordered from the nearest HP Sales and Support Office. f. Proceed with the preventive maintenance procedures. 2-13. SERVICING THE AIR CIRCULATION SYSTEM Servicing the air circulation system consists of measuring the air pressure at the outlet on the pack loading assembly, and periodic replacement of the prefilter and/or the absolute filter. To measure the absolute filter air pressure, proceed as follows: a. Remove the shroud. (Refer to Section V, Removal and Replacement.) b. Connect the power panel assembly power cord to a source of ac power. c. Set the power distribution unit circuit breaker to ON and the disc drive DISC switch to the on position. d. Install a scratch pack and close the pack chamber door. e. On the disc drive, set the RUN/STOP switch to RUN and wait until the heads load. f. Using the air pressure measuring gauge with the air pressure probe assembly, place the probe over the air pressure outlet. (See figure 2-4). g. Observe the air pressure. Check that air pressure is equal to or greater than the minimum acceptable limits given below: MINIMUM LINE NORMAL ACCEPTABLE FREQUENCY OPERATION LIMITS (Hz) (Inches of water) (Inches of water) 50 > 0.30 0.30 60 > 0.30 0.30 Note: Meter may peg when filter is new. 2-8 h. Set RUN/STOP switch to STOP, DISC switch and circuit breaker to OFF, and disconnect power cord from source of ac power. i. If observed air pressure is less than minimum acceptable limits, remove and inspect the prefilter. j. If the prefilter is dirty, replace the prefilter. (Ensure that the prefilter airflow direction arrow is facing in the proper direction.) k. After replacing the prefilter, remeasure the air pressure. 1. If the air pressure remains below acceptable limits after the prefilter has been replaced, replace the absolute filter. (Refer to Section V, Removal and Replacement.) m. Replace the shroud. 2-14. PACK LOCK LUBRICATION Pack lock (2, figure 6-5) lubrication is performed at every preventive maintenance interval. The pack lock lubrication tool (part no. 07920-20086) and the lubricant (part no. 6040-0084) are required to perform this procedure. The lubricant (part no. 6040-0084) used in this procedure can cause painful eye irritation upon contact and for some people skin inflammation (dermatitis). When using this lubricant, hand protection (latex gloves) should be worn and care should be taken to keep the lubricant away from eye tissue. Note: If the lubricant (part no. 6040-0084) gets on the skin, a waterless hand cleaner is recommended to remove the lubricant. a. If the disc drive is operating, set the RUN/STOP switch to STOP. b. Allow the spindle to halt (approximately 30 seconds). The DOOR UNLOCKED indicator will light, which means that the spindle has stopped rotating, the door unlock solenoid is energized, and it is safe to open the. pack chamber door. c. Remove and store the disc pack. Be sure to leave the pack chamber door open. d. Disconnect the ac power cord from the ac mains power. 7925 Maintenance 7311-48 Figure 2-4. Measuring Absolute Filter Air Pressure e. Use a Q-tip to remove any old lubricant in the pack lock that is not on the threads. h. Clean the lubricant from the pack lock lubrication tool with a Kimwipe tissue. f. Apply the lubricant (part no. 6040-0084) to the pack lock lubrication tool. The lubricant should be applied to fill all the threads flush to the top of the thread. (Refer to figure 2-5.) Use a Kimwipe tissue to remove all excess lubricant from the threads. Use a Q-tip to remove any lubricant from the clearance hole in the pack lock lubrication tool. g. While applying a slight upward pull on the tool, screw the pack lock lubrication tool into and out of the pack lock three times. Applying a slight upward pull insures the lubricant is applied where it is needed. 1. Use a Q-tip to remove any lubricant in the pack lock that is not on the threads. j. Use a Q-tip to apply a light coat of lubricant on the top of the release pin in the pack lock. (1) Depress the pack lock and, using a Q-tip, apply a thin coat oflubricant to the two inside surfaces of the pack lock retainer that mate with the flats on the pack lock. (2) Release the pack lock and wipe off any excess lubricant from the top of the pack lock. 2-9 Maintenance r FILL LUBRICANT TO TOP OF THREADS 7925 e. Carefully remove any remaining contamination from the head surfaces. I CAUTION I Never place an inspection mirror between the heads or allow the mirror to touch the heads. The head flying characteristics may be altered or damaged. f. Using an inspection mirror, verify that all signs of contamination have been removed. If the contamination cannot be removed, replace the head. (Refer to Section V, Removal and Replacement.) REF 7311-72 CLEARANCE HOLE Figure 2-5. Pack Lock Lubrication Tool (3) Continue to depress and release the pack lock until all excess lubricant has been removed. 1. Reconnect the ac power cord to the ac mains power and close the pack chamber door. 2-15. CLEANING DATA AND SERVO HEADS When inspection reveals contamination on the data and servo heads (see figure 2-6), clean as follows: I CAUTION I Use only the cleaning sleeve and filtered isopropyl alcohol specified in table 2-l. Use of other material may leave a residue that could cause damage. a. Place a cleaning sleeve on the end of the cleanin"g handle. (See figure 2-7.) b. Dampen the cleaning sleeve with filtered 91-percent isopropyl alcohol. I CAUTION I Avoid applying excessive pressure to the gimbal area of the head while cleaning. Excessive pressure may alter the flying characteristics of the head which were precision set at the factory. c. Clean each head by placing the prepared head cleaning tool between the surfaces, then gently wipe the head face. Use only sufficient pressure to thoroughly wet the head and remove contamination. d. Replace the cleaning sleeve on the cleaning handle with a clean dry sleeve. 2-10 2-16. CLEANING CARRIAGE RAILS AND BEARINGS It is important that the carriage bearings and rails are clean in order to maintain the accuracy of the disc drive. The carriage bearings and rails should be inspected at every disc drive preventive maintenance interval. To inspect and clean the bearings and rails, proceed as follows: I CAUTION I Use care in loading the heads onto the head loading tool. Allowing the heads to contact each other may cause damage. a. Position the head loading tool so that, as the heads slide from the actuator-mounted head cams, the heads will rest on the proper locations of the head loading tool. b. Manually depress the carriage latch and move the carriage forward. c. Manually move the carriage along the carriage rail and inspect the rails and bearing surfaces for signs of contamination. Roughness or resistance in the carriage travel indicates cleaning is necessary. I CAUTION I When cleaning the carriage bearings, do not allow the alcohol to flow on the sides of the bearings. Alcohol destroys the bearing lubricant which will cause damage to the disc drive. d. Use cotton swabs slightly dampened with filtered 91percent isopropyl alcohol (use only HP part no. 85000559) to clean the length of both rails and the grooves of the three bearings. e. Push the carriage back to the latched position. The head loading tool will fall free. 7925 REF 7300-12(1) THRU (4) Maintenance TYPE OF CONTAMINATION: NONE. IDEAL HEAD CONDITION. CAUSE: NEW HEAD OR MINIMAL OPERATION IN A CLEAN ENVIRONMENT. REMEDY: NONE. TYPE OF CONTAMINATION: OXIDE BUI LDUP ON TRAI LING EDGE (DOWN HEAD SHOWN). TYPICAL OPERATING CONDITION. CAUSE: NEW MEDIA OR MANY HOURS OF OPERATION. REMEDY: CLEAN AS OUTLINED IN PARAGRAPH 2-15. TYPE OF CONTAMINATION: ABRASION AND PARTICULATE. CAUSE: MEDIA IS ABRASIVE OR EXCESSIVE MECHANICAL RUNOUT EXISTS. REMEDY: REPLACE DEFECTIVE HEAD AS OUTLINED IN PARAGRAPH 5-18. A DELAY IS PERMISSIBLE. IF WIDTH OF ABRASION IS LESS THAN 0.13-cm lO.05-in.) TYPE OF CONTAMINATION: ABRASION AND PARTICULATE. CAUSE: EXCESSIVE OPERATION ON ABRASIVE MEDIA. AIR FLOW RESTRICTED AND/OR CONTAMINANTS PRESENT IN AIR CIRCULATION REMEDY: REPLACE DEFECTIVE HEAD AS OUTLINED IN PARAGRAPH 5-18. REPLACE MEDIA. CHECK ABSOLUTE FILTER SEAL AND MEASURE ABSOLUTE FILTER OUTPUT AIR PRESSURE AS OUTLINED IN PARAGRAPH 2-13. Figure 2-6. Examples of Head Contamination 2-11 Maintenance CLEANING SLEEVE CLEANING HANDLE 7301-158 Figure 2-7. Prepared Head Cleaning Tool 7925 2-17. CLEANING THE SPINDLE ASSEMBLY AND PACK CHAMBER ASSEMBLY To clean the spindle assembly and pack chamber assembly, proceed as follows: I CAUTION I Exercise care to ensure that masking tape adhesive is not left on any surfaces. Residue adhesive will allow contamination to accumulate. a. Using masking tape, lightly apply adhesive side of tape to all exposed surfaces of the spindle to remove foreign matter. b. Using a Kimwipe dampened with 91-percent isopropyl alcohol, wipe clean the spindle assembly. c. Using masking tape, lightly press adhesive side of tape to all exposed surfaces of pack chamber assembly and door. Then wipe clean with a Kimwipe tissue slightly dampened with filtered 91-percent isopropyl alcohol. 2-12 ALIGNMENT AND ADJUSTMENT I~ 3-1. INTRODUCTION WARNING This disc drive does not contain operator-serviceable parts. To prevent electrical shock, refer all installation and maintenance activities to service-trained personnel. This section contains step-by-step alignment procedures for the disc drive. The procedures are divided into two categories; the first category is devoted to the alignment and adjustment procedures that do not require the use of the disc service unit (DSU) and the second category covers the procedures that require the use of the DSU. Alignment and adjustment procedures are to be performed only after a repair has been made, or when specified parameters are out of tolerance. Do not perform any adjustment unless necessary. 3-2. SERVICE ADJUSTMENTS NOT REQUIRING THE DSU The switches, solenoids, and carriage latch and detector assembly are the only components and assemblies that do not require the use of the DSU for adjustment. 3-3. DOOR LOCK ASSEMBLY 3-4. DOOR UNLOCK SOLENOID. Be sure to remove the ac power from the disc drive when performing this procedure.The door unlock solenoid electromechanically latches or unlatches the pack chamber door. When the solenoid is replaced, ensure that the latch lever, which is connected to the solenoid, operates freely. Manually operate the solenoid to determine if any physical binding is present. If the lever is binding, loosen the two screws that secure the solenoid and position the solenoid to gain free operation of the latch lever. Then tighten the solenoid screws. 3-5. DOOR CLOSED AND DOOR LOCKED SWITCHES. The function of the door closed switch (20, figure 6-4) is to detect a door closed condition. To check or adjust the door closed switch after replacement, proceed as follows: a. Disconnect the ac power cord from the ac mains power. b. Remove the shroud. (Refer to paragraph 5-3.) c. Disconnect the cable attached to the connector assembly (31). d. Using an ohmmeter, measure th~ resistance between pins 5 and 6 on the connector assembly (refer to figure 3-1). e. Close the pack chamber door. An open circuit condition (infinite resistance) should be detected by the ohmmeter. WARNING To avoid dangerous electrical shock, do not perform the following procedure until the mains power is' removed from the disc drive. The door lock assembly consists of the door unlock solenoid, the door closed switch, and the door locked switch, all of which are mounted on a single frame. If a c0mponent on this assembly fails, the entire assembly is replaced from the service kit and the defective assembly is repaired after the disc drive has been restored to operation. Normally, the switches and solenoid are not adjustable, however, it is possible to position the switches and solenoid slightly after replacement. Paragraphs 3-4 and 3-5 describe the methods for adjusting the switches and solenoid. 7311-2 000 (0)8 880 Figure 3-1. Connector Assembly 3-1 Alignment and Adjustment 7925 f. Open the pack chamber door by pushing down on the latch lever (12, figure 6-4). A short circuit condition (zero resistance) should be detected by the ohmmeter. g. If the above checks are not correct, the switch must be adjusted as described in step h. If the above checks are correct, the switch is properly adjusted. Proceed to step i. h. Loosen the two screws (21) which secure the switch and reposition the switch. Repeat steps d through g. i. Attach the cable to the connector assembly, replace the shroud, and restore the ac power. The door locked switch (15, figure 6-4) detects whether the door unlock solenoid (14) has locked or unlocked the pack chamber door. When the solenoid is energized, the door should be unlocked and the switch closed. To check or adjust the door locked switch after replacement, proceed as follows: a. Disconnect the ac power cord from the ac mains power. b. Remove the shroud. (Refer to paragraph 5-3.) c. Disconnect the cable attached to the connector assembly (31). d. Using an ohmmeter, measure the resistance between pins 1 and 2 on the connector assembly (refer to figure 3-1). e. Close the pack chamber door. An open circuit condition (infinite resistance) should be detected by the ohmmeter. f. Push down on the latchlever(12, figure 6-4). A short circuit condition (zero resistance) should be detected by the ohmmeter. g. If the above checks are not correct, the switch must be adjusted as described in step h. If the above checks are correct, the switch is properly adjusted. Proceed to step i. h. Loosen the two screws (16) which secure the switch and reposition the switch. Repeat steps d through g. 1. Attach the cable to the connector assembly, replace the shroud, and restore the ac power. 3-6. CARRIAGE LATCH AND DETECTOR ASSEMBLY The carriage latch and detector assembly requires adjustment only if the assembly has been replaced. To adjust the carriage latch and detector assembly, proceed as follows: a. Remove the power cord from the ac mains power. 3-2 b. Loosen the two retaining screws securing the assembly to the face of the actuator assembly. c. Position the assembly so that the carriage-back flag on the coil and carriage assembly travels through the approximate center of the photoswitch light path, ensuring that there is no contact between components. d. Tighten the retaining screws. I CAUTION I To avoid damage to the disc drive, do not move the carriage out more than 1.3 cm (0.5 in.). e. Check the latching action by pressing in the solenoid plunger and slightly pulling out the carriage. Then press in the carriage and latch the assembly. Ensure that the latching action is smooth. Connect the power cord to the ac mains power. 3-7. HEAD CAM ALIGNMENT The head cam alignment procedure is performed whenever a head cam or head cam support is replaced. To adjust the head cams, proceed as follows: a. Remove the power cord from the ac mains power. Remove the shroud. (Refer to paragraph 5-3.) Remove the pack chamber assembly. (Refer to paragraph 5-9.) b. Install the head cam alignment tool, part no. 1335460001, on the spindle hub. (See figure 3-2.) Ensure that the head cams mate with the head cam alignment tool. c. If the head cams require adjustment, perform substeps (1) through (3), otherwise proceed to step d. (1) Loosen the two screws (12, figure 6-7) on the two head cams (11). (2) Adjust the head cams to position with the head cam alignment tool. (See figure 3-3.) (3) Tighten the head cam securing screws (12, figure 6-7) to 7 inch-pounds. d. Remove the head cam alignment tool. e. Replace the pack chamber and the shroud. Restore ac power to the disc drive. 3-8. SERVICE ADJUSTMENTS REQUIRING THE DSU The DSU is required to perform the velocity command gain adjustment and data head alignment. An installation procedure for the DSU, an exercising procedure for the 7925 Alignment and Adjustment INSTRUCTIONS OJ LOOSEN KNUR LED SCREWS o SLIDE ALIGNMENT TOOL ONTO SPINDLE HUB o ENSURE THAT ALIGNMENT TOOL BUTTS UP AGAINST CAMS m SECURE ALIGNMENT TOOL ON SPINDLE HUB, USING KNURLED SCREW Figure 3-2. Use of Head Cam Alignment Tool disc drive, and all alignment and adjustment procedures which require the use of the DSU are provided in the following paragraphs. 3-9. INSTALLING THE DSU WARNING Adjustments requiring the DSU are performed with power supplied to the disc drive, and protective covers removed. Such maintenance should be performed only by service-trained personnel who are aware of the hazards involved (for example, fire and electrical shock). To install the DSU, proceed as follows: a. Disconnect the ac power cord from the ac mains power. b. Remove the shroud from the disc drive enclosure. c. Loosen the three screws that secure the preamp shield and remove the shield. d. Disconnect the interconnect cable from J1 on I/O sector PCA-A2. e. Loosen the two screws that secure the card cage cover and cable mounting bracket to the card cage and remove the cover and mounting bracket. f. Insert head alignment PCA, part no. 13354-60110, into card slot AI. (See figure 3-4.) Ensure that the PCA is correctly oriented, then firmly seat the PCA in the receptacle. The component side of the PCA must face toward the right side of th,e card cage as viewed from the front. g. Hang the DSU Test Module, part no. 13354-60005, on the top outer edge of the card cage. 3-3 Alignment and Adjustment 7925 INSTRUCTIONS [!] LOOSEN FOUR HEAD CAM SCREWS I2l [}] SEAT HEAD CAMS AGAINST SIX ALIGNMENT TOOL PINS o TIGHTEN HEAD CAM SCREWS Figure 3-3. Head Cam Tool Alignment h. Connect the 50-pin jumper cable, part no. 13354-60012, between the 50-pin connector on the DSU and J1 on VO sector PCA-A2. i. Connect the 20-pin jumper cable, part no. 13354-60013, between the 2o-pin connector on the DSU and the 2o-pin connector on the head alignment peA. 3-10. EXERCISING THE DISC DRIVE After the DSU has been installed, the disc drive should be exercised to relax any mechanical stresses. This is particularly important when one of the mechanical assemblies has been replaced. To exercise the disc drive, proceed as follows: I CAUTION' a. Install the DSU as outlined in paragraph 3-9. Do not plug or unplug any cables from the data heads to read/write preamplifier PCA-A6 or from the servo head to track follower PCA-A5 or from the head alignment PCA to read/write preamplifier PCA-A6 while the heads are loaded. Incorrect information can be written on the disc. b. Set the RUN/STOP switch to STOP and the DISC switch to the on position. c. Install a scratch pack in the pack chamber assembly. d. On the disc drive, set the RUN/STOP switch to RUN. Set the unit select switch to 0 (zero). j. Connect the head cable connector from the head alignment PCA to the head connector located at the top or read/write preamplifier PCA-A6. k. Connect the primary power cord to the ac mains power. 3-4 e. On the DSU, set the FUNCTION switch to position 3 (RANDOM SEEK). f. On the DSU, rotate the DELAY potentiometer fully clockwise to MAX. 7925 Alignment and Adjustment Note: With the DELAY potentiometer set to MAX, a maximum delay between seek operations is introduced. g. On the DSU, press the START pushbutton and allow the disc drive to perform a series of random seek operations. h. After several seek operations have been performed, rotate the DELAY potentiometer fully counterclockwise to MIN. Note: With the DELAY potentiometer set to MIN, a minimum delay between seek operations is introduced. 1. If one of the assemblies has been replaced, allow the disc drive to run for at least one minute, otherwise allow the drive to run for at least 5 seconds. j. On the DSU, press the STOP pushbutton. 3-11. VELOCITY COMMAND GAIN ADJUSTMENT The only electrical adjustment requiring the use of the DSU is the velocity command gain adjustment. To perform this adjustment, proceed as follows: a. Exercise the disc drive as outlined in paragraph 3-10. 7301-168 Figure 3-4. DSU Installed 3-5 Alignme~t and Adjustment 7925 WARNING The following adjustments are performed with power supplied to the disc drive, and protective covers removed. Such maintenance should be performed only by service-trained personnel who are aware of the hazards involved (for example, fire and electrical shock). b. Remove the terminal block cover on the power supply. c. Using an HP 970 Digital Voltmeter (or equivalent battery-operated voltmeter, for isolation from AC ground paths), measure the voltage across terminals 1 and 4 on TB1 of the power supply (refer to figure 4-23). Also note the power supply strapping by comparing the strapping on TBl with the strapping shown in figure 4-23. These measurements will be used to determine the seek time adjustment range. d. On the DSU, set the FUNCTION switch to position 1 (ALTERNATE SEEK). e. On the DSU, select cylinder address 0 on the top ten switches (all 10 switches set to the left). f. With the lower bank of switches, select cylinder address 822 (switches 512, 256, 32, 16,4, and 2 set to the right). g. On the DSU, press the START pushbutton and allow the disc drive to alternately seek between cylinders 0 and 822. h. On the DSU, rotate the DELAY potentiometer until the seek time from cylinder 0 to cylinder 822 (forward seek operation) can be differentiated from the seek time from cylinder 822 to cylinder 0 (reverse seek operation). Note: The two seek times will probably be different. i. For both forward and reverse seek operations, observe the digital displays to ensure that the seek time is in the range specified in the following table and that the deviation between forward and reverse seek times is 3.0 milliseconds or less. Use the values measured in step c to determine the proper seek time range. 3-6 STRAPPING OF THE POWER SUPPLY (Vac) 100 120 220 240 LINE VOLTAGE (Vac, as measured in step c) 90 to 95 96 to 100 101 to 105 108 to 110 111 to 115 116 to 120 121 to 126 198 to 200 201 to 210 211 to 220 221 to 230 216 to 220 221 to 230 231 to 240 241 to 252 SEEK TIME RANGE (milliseconds) 46.0 to 49.0 45.5 to 48.5 45.0 to 48.0 46.0 to 49.0 45.0 to 48.0 44.5 to 47.5 44.0 to 47.0 46.5 to 49.5 45.5 to 48.5 45.0 to 48.0 44.5 to 47.5 46.0 to 49.0 45.0 to 48.0 44.5 to 47.5 44.0 to 47.0 Note: The seek time adjustment is set for the best overall operation of the disc drive and this time setting will vary for each disc drive. The best operation of the disc drive does not necessarily mean the shortest seek time. Ifnecessary, adjust VC GAIN potentiometer A3R33 on servo PCA-A3 until the values are within the specified range. j. On the DSU, press the STOP pushbutton. k. On the disc drive, set the RUN/STOP switch to STOP. 1. Replace the terminal block cover on the power supply. 3-12. HEADALIGNMENTPROCEDURES The head alignment procedures include the circumferential alignment check, circumferential alignment, servo head alignment, data head alignment, and data head alignment check. Also, a warmup procedure is included which must be performed before the alignment procedures or the alignment checks can be performed. (See figure 3-5 for head alignment locations.) The servo head alignment procedure should be performed only when necessary. After the servo head has been aligned, the data heads must be checked for alignment, and aligned as necessary. Do not attempt to align the data heads unless the servo head has been replaced, one or more data heads have been replaced, the data head algnment check, or circumferential alignment check reveals that a head is out of the allowable tolerance. 7925 Alignment and Adjustment REF 7311-52 Figure 3-5. Data Head Alignment Locations 3-13. WARMUP. The warmup is performed to allow for temperature stablization before proceeding with head alignment or head alignment check. To perform the warmup, proceed as follows: a. Install the DSU as outlined in paragraph 3-9. Hook the liquid crystal thermometer to the outside of the front door (6, figure 6-1), as shown in figure 3-6. b. Install the HP 7925 CE Disc Pack (13357A) in the disc drive. REF 7301-80 Figure 3-6. Thermometer c. On the disc drive, set the READ ONLY switch to the protected position (.), the unit select switch to 0 (zero), and the RUN/STOP switch to RUN. d. Set the DSU to function 3 and rotate the DELAY control to a position near MIN. Press the START pushbutton and allow the disc drive to perform random seek operations for 5 minutes. e. Set the DSU to function 7 and press the START pushbutton. Allow the disc drive heads to remain positioned at cylinder 490 for 15 minutes before proceeding. Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. Note: When the DSU is set to function 7 and the START pushbutton is pressed, ensure the meter pointer moves to the far right, then to the far left, and then back again. If the meter does not act as described, perform the servo head alignment. The time required for this cycle is 5 seconds. This operation is referred to as the 5-second cycle throughout the alignment procedures. 3-14. CIRCUMFERENTIAL ALIGNMENT CHECK. This procedure is used to check the circumferential alignment of the data heads and the servo head. Note: To test an HP 7925 Disc Drive, the DSU must have a date code of 1845 or greater. The date code is located on a tag on the back of the DSU. The HP 13357A CE Disc Pack has a circumferential timing tolerance label attached to the outside cover. (Refer to figure 3-7.) The information on each label is divided into 3 rows and 9 columns. The columns labeled HO through H8 correspond to the number of the data head in the disc drive selected by the DSU toggle switches. The rows 0, 410, and 820 are the cylinder numbers of the disc pack selected by setting the DSU to positions 4, 5, or 6, respectively. The label gives the range for the DSU digital display reading, depending on the selection of the data head and the cylinder position. The first number in each column is the minimum acceptable digital display reading for the DSU. The last number in each column is the maximum acceptable digital display reading for the DSU. The following procedure verifies circumferential alignment by ensuring that the DSU digital display reading is within the range specified on the CE disc pack label. 3-7 Alignment and Adjustment 7925 DSU FUNCTION POSITION POSITION 4 POSITION 5 POSITION 6 H8 0 0 0 0 0 0 0 0 1 H4 0 0 0 0 1 1 1 1 0 H2 0 0 1 1 0 0 1 1 0 H1 0 1 0 1 0 1 0 1 0 * For proper test values refer to the CE disc pack dust cover. DSU SWITCH POSITIONS 0- Switch set to LEFT 1 - Switch set to RIGHT DSU TOGGLE SWITCH POSITIONS 7311-73 Figure 3-7. Use of Circumferential Timing Tolerance Label a. Perform the warmup procedure. (Refer to paragraph 3-13.) Perform the data head alignment check. (Refer to paragraph 3-18.) b. On the DSU, set the FUNCTION switch to position 4 (Cyl 0). c. Select a head using the binary combination of toggle switches H8, H4, H2, and HI on the DSU. d. On the DSU, press the START pushbutton and note the time on the digital display. Referring to the circumferential timing tolerance label on the CE disc pack, look in the row labeled Cyl 0 and in the column for the head selected. The digital display reading on the DSU should be greater than or equal to the first number and less than or equal to the last number in the column. e. On the DSU, set the FUNCTION switch to position 5 (Cyl 410). f. On the DSU, press the START pushbutton and note the time on the digital display. Referring to the circumferential timing tolerance label on the CE disc pack, look in the row labeled Cyl 410 and in the column for the head selected. The digital display reading on the DSU should be greater than or equal to the first number and less than or equal to the last number in the column. g. On the DSU, set the FUNCTION switch to position 6 (Cy1820). h. On the DSU, press the START pushbutton and note 3-8 the time on the digital display. Referring to the circumferential timing tolerance label on the CE disc pack, look in the row labeled Cyl 820 and in the column for the head selected. The digital display reading on the DSU should be greater than or equal to the first number and less than or equal to the last number in the column. i. Repeat steps b through h for each data head. j. If all the heads are within tolerance, the circumferential alignment is correct. k. If any or all heads are not within tolerance, refer to paragraph 3-15. 1. On t.he rlis~ rlrivp.; sP.t thp. RUN/STOP switch to STOP. m. Remove the CE disc pack from the disc drive. n. On the disc drive, set the READ ONLY switch to the unprotected position. o. Remove the DSU and the head alignment PCA from the disc drive and then replace all cables removed during the DSU installation. p. Replace the shroud on the disc drive enclosure. 3-15. CIRCUMFERENTIAL ALIGNMENT. This procedure is used to correct the circumferential alignment of the disc drive. To properly perform this procedure, the following conditions must be met: · Use a DSU that has a date code of 1845 or greater. The date code is located on a tag on the back of the DSU. 7925 Alignment and Adjustment · Use the proper circumferential timing data graph. The proper data graph is determined by: (1) The part number for the track follower on the data graph matching the part number on track follower PCA-A5 in the disc drive. (2) The HP 13357A CE Disc Pack having a serial number in the CE pack serial number range indicated on the data graph. The circumferential timing data graph is used as an aid to determine the best solution to correct the circumferential alignment. (Data graphs can be obtained from the field service office.) To plot the data on the graph, proceed as follows: a. Perform the warmup procedure. (Refer to paragraph 3-13.) Perform the data head alignment check. (Refer to paragraph 3-18.) b. On the DSU, set the FUNCTION switch to position 4 (Cyl 0). c. Select a head using the binary combination of toggle switches H8, H4, H2, and HI on the DSU. d. On the DSU, press the START pushbutton and note the time on the digital display. Plot this value in the proper location on the circumferential timing data graph. e. On the DSU, set the FUNCTION switch to position 5 (Cyl 410). f. On the DSU, press the START pushbutton and note the time on the digital display. Plot this value in the proper location on the circumferential timing data graph. g. On the DSU, set the FUNCTION switch to position 6 (Cyl 820). h. On the DSU, press the START pushbutton and note the time on the digital display. Plot this value in the proper location on the circumferential timing data graph. i. Repeat steps b through h for each data head. After a data graph is completed for the disc drive under test, follow the flowchart in figure 3-8. This flowchart is used in conjunction with the description of circumferential timing conditions, table 3-1, and the seven example data graphs, figures 3-9 through 3-15, to determine the best solution to correct the circumferential alignment. A description of the seven possible conditions that can be observed in the completed data graph for the disc drive under test is contained in table 3-1. 3-16. TRACK FOLLOWER ALIGNMENT. This procedure should be performed only after the circumferential alignment shows that the disc drive is out of tolerance with a number 1, 2, 3, or 4 condition. (Refer to table 3-1.) The alignment of the track follower PCA shifts all the circumferential timing values by the same amount. The amount of the shift is dependent on the adjustment of the potentiometer, labeled IND DEL, on the track follower PCA. To perform this alignment, proceed as follows: a. Remove the exhaust shield (10, figure 6-1). b. Perform the warmup procedure. (Refer to paragraph 3-13.) c. Perform the circumferential alignment procedure. (Refer to paragraph 3-15.) d. On the data graph, identify the head and cylinder position that is farthest out of tolerance (in the shaded area) and set the DSU to this head (using the binary combination of toggle switches H8, H4, H2, and HI) and cylinder (Function Switch set to position 4, 5, or 6) address. e. Note the value on the data graph that is at the lower or upper limit for the head and cylinder address identified in step d. f. On the DSU, press the start button. g. As shown in figure 3-16, adjust the IND DEL potentiometer on the track follower PCA until the value on the DSU is within tolerance for the head and cylinder selected. h. Perform the circumferential alignment check. (Refer to paragraph 3-14.) If the disc drive does pass, circumferential alignment is correct and the track follower PCA is properly aligned. If the disc drive does not pass, perform the circumferential alignment. (Refer to paragraph 3-15.) 3-17. SERVO HEAD ALIGNMENT. Theservohead normally requires alignment only after replacement. To align the servo head, proceed as follows: WARNING Do not use any tools on the carriage assembly while the heads are loaded unless the DSU has just performed a function 7 operation and the 5-second DSU head alignment cycle time is completed. This precaution is necessary to prevent the carriage from emergency retracting and damaging tools, or possibly causing injury to personnel. 3-9 Alignment and Adjustment 7925 PERFORM THE CIRCUMFERENTIAL ALIGNMENT CHECK. (Refer to paragraph 3-14.) YES BACK UP ALL DATA ASSOCI- NO ATED WITH THIS DISC DRIVE ON A SYSTEM NOT DEPEN- DENT ON THIS DISC DRIVE. PERFORM THE CIRCUMFERENTIAL ALIGNMENT PROCEDURE AND RECORD THE DATA ON THE CIRCUMFERENTIAL TIMING DATA GRAPH. (Refer to paragraph 3-15.) ADJUST THE IND DEL POTENTIOMETER ON PCA-A5. (Refer to paragraph 3-16.) CONTACT THE HEWLETTPACKARD PRODUCT SPECIALIST. REPLACE THE ACTUATOR. (Refer to paragraph 5-20.) 7311-74A 3-10 Figure 3-8. Interpretation of Circumferential Timing Data Graph -:] ~ ~ c:.n HEAD CYLINDER LOWER LIMIT (-4 J.tS FROM MEAN VALUE) MEAN VALUE UPPER LIMIT (+4 J.tS FROM MEAN VALUE) CYLINDER HEAD -5 -4 -3 -2 -1 0 1 2 3 4 5 I I I 0 0 410 820 92.0 4 91.2 · · 89.9 I 0 94.1 1 410 93.6 820 92.8 · 0 93.2 2 410 92.5 820 91.5 I 0 3 410 820 W 95.0 «~ 94.8 94.6 0:: I [ ] EH~; 0 94.5 410 94.1 820 93.5 0 5 410 820 I O. 93.1 I- :::> 92.1 0 91.0 · 0 93.6 6 410 92.9 96.0 95.2 93.9 ·· I 98.1 97.6 U 96.8 · 97.2 96.5 · - 95.5 ··· I 99.0 98.8 98.6 98.5 98.1 97.5 97.1 96.1 95.0 · 97.6 4 96.9 · 4~ · · · 4_ 0.0 99.2 97.9 I I 2.1 1.6 I 0.8 I 1.2 0.5 99.5 I 3.0 2.8 2.6 2.5" 2.1 I 1.5 I I 1.1' 0.1 99.0 1.6 0.9 W «~ 0:: I~ 10 Iu.. 0 I- :::> 0 0 410 0 820 0 410 1 820 0 410 2 820 0 410 3 820 0 410 4 820 0 410 5 820 0 410 6 820 ·I 91.8 U 95.8 99.8 820 0 7 410 820 0 8 410 820 I 92.8 91.9 91.0 ··· I 92.1 91.3 90.0 I -5 -4 -3 -2 -1 I 96.8 95.9 95.0 · I 96.1 95.3 · 94.0 · I 0 1 2 I 0.8 99.9 99.0 I 0.1 99.3 98.0 3 l 5 0 410 7 820 0 410 8 820 ~ ~ 7311-75 I--' t!:: TIMING (MICROSECONDS) CE PACK SIN 1815A00161 TO 234 ~. ::s CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 TRACK FOLLOWER PIN 07925-60004 3 (n::!s)o DISC DRIVE SIN _ § DATE _ p. 6: '2' tn S Figure 3-9. Data Graph Example 1 n:(:!s)o ~ .:.... ~ t~§. HEAD I CYLINDER o o I 410 LOWER LIMIT (-4 JlS FROM MEAN VALUE) -5 -4 -3 I 92.0 91.2 820 89.9 I o 94.1 410 93.6 820 92.8 I o 93.2 2 I 410 92.5 820 91.5 I 3 U [] 4100 820 :!~ B·············· g« ·····.·. ·i /.:<.i . .·/i/: + -+II I ...l.......L..- Ei ~ rn 4--4--..2..-- MEAN VALUE -2 -1 0 ~ J·--! 95.2 93.9 ~ · 98.1 · G :9:6r.:8; -97-.2 96.5 95.5 ··· 99.0 3 UPPER LIMIT (+4 JlS FROM MEAN VALUE) CYLINDER I HEAD :.(.:t.s).. 2 3 4 5 I $::Is) p... 0.0 99.2 97.9 I I 2.1 1.6 -0 410 o ~ 'i:r --820 etn -0 .:(.:t.s).. 410 ~.8 o 1.2 a5 99.5 I · 3.0 2.8 820 - -0 410 2 820 - -0 410 3 2.6 I: -2.5 2.1 ~.5 820 - -0 -410 4 820 ~5I :!~ ~§ -0 6 -410 820 - -0 7 410 820 - -0 8 -410 820 I I -5 I II I +++->- I 93.6 92.9 91.8 I 92.8 91.9 91.0 I 92.1 91.3 90.0 I -4 -3 -2 .97.1 ~.1 95.· ::r::::: 97.6 96.9 95.8 :;::I: eg6.8 · ·· sa9 95.0. ~ -96.1 95.3 94.0 ·· · T -1 0 2 1.1 "0 0.1 -410 5 99.0 820 ~ 1.6 -0 0.9 410 6 99.8 Ii 0.8 99.9 99.0 I -0.1 99.3 98.0 T 3 4 5 820 - -0 -410 7 820 - -0 -410 8 820 TIMING (MICROSECONDS) CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 CE PACK SIN 1815A00161 TO 234 TRACK FOLLOWER PIN 07925-60004 DISC DRIVE SIN _ DATE _ ~ 7311-76 (.0 Figure 3-10. Data Graph Example 2 ~ CJ1 -:J ~ /:.,,;) C1l HEAD CYLINDER 0 0 410 820 LOWER LIMIT (-4 J.l.S FROM MEAN VALUE) -5 -4 -3 I i 92.0 - , I 91.2 89.9 0 I 94.1 1 410 I 93.6 820 I 92.8 I 0 93.2 2 410 92.5 820 91.5 I 0 W 95.0 3 410 820 -U - «:2: 94.8 94.6 -0: I D [i§~ 0 410 820 94.5 94.1 93.5 0 5 410 820 0 .... 93.1 => 92.1 0 91.0 MEAN VALUE -2 -1 0 1 2 · ·· I 96.0 95.2 93.9 I 98.1 97.6 96.8 ·· · 97.2 · · 96.5 0 95.5 I 99.0 4 98.8 98.6 ·· 98.5 98.1 · · 97.5 · 97.1 96.1 95.0 UPPER LIMIT (+4 J.l.S FROM MEAN VALUE) CYLINDER HEAD 3 4 5 I I 0.0 I : 0 99.2 410 0 97.9 - 820 I I 2-.1 0 1.6 410 1 I 0.8 820 I I 1.2 0 - 0.5 410 2 99.5 820 I I 3.0 W 2.8 2.6 «~ I 0: 2.5 W ..J 2.1 .0... I 1.5 11. · I I 1.1 · 0.1 .9.0 0 -=..>.. ,0 0 410 3 820 0 410 4 820 0 410 5 820 I I 0 93.6 97.6 4~ 1.6 0 6 410 92.9 96.9 4 0.9 410 6 820 0 I 91.8 I 92.8 ,95.8 96.8 4~ 99.8 820 · I 0.8 I 0 7 410 : 91.9 95.9 4 99.9 410 7 820 0 8 410 820 91.0 I 92.1 - 91.3 90.0 95.0 99.«. 820 I 96.1 ·4_ I 0.1 - 0 95.3 94.0 99.3 I 9~ 410 8 820 I -5 -4 -3 -2 -1 I 0 1 2 3 l 5 ~ ~ 7311-77 ~ t:: TIMING (MICROSECONDS) CE PACK SIN 1815A00161 TO 234 c:i:as' CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 TRACK FOLLOWER PIN 07925-60004 .:3e.:n.s.. DISC DRIVE SIN _ ~ ::s DATE _ s::lo 5: 'E' til 8" Figure 3-11. Data Graph Example 3 .:e.:n.s.. CI.:l ~ ~ HEAD I CYLINDER o o I 410 820 o 410 820 o 2 I 410 820 3 LOWER LIMIT (-4 ~s FROM MEAN VALUE) -5 -4 -3 I 92.0 91.2 89.9 I 94.1 93.6 92.8 I H m MEAN VALUE -2 -1 0 -9~.0-I. - 9 5 .- 2 . 9:W -r--.-I I I I I I I I 97.· :c:= ~ 95.5. 99.0 98.8 98.6 t:: QQ' ::s 3 UPPER LIMIT (+4 ~s FROM MEAN VALUE) CYLINDER I HEAD 2 3 4 5 I :(:!s) :"~:s' l:l. 0.0 99.2 o 410 I 0 6: '2' 97.9 820 en I S I 2.1 o :(:!s) 1.6 410 "' I 0.8 820 I o 410 I 2 820 5 R=ff 96.1 95....0... ""T -0 93.6 lei -97-.6 6 -410 820 92.98 (.).8 96.9 -- 95.8 - -0 I 92.8 · ~ -96-.8 7 -410 91.9 4 95.9 820 91.0 lei -0 92.1 n =r:95.0 -96.1 8 410 91.3 · 95.3 ~ 90.0 I 94.0 T -5 -4 -3 -2 -1 0 1.6 0.9 99.8 0.8 99.9 99.0 I 0.1 99.3 98.0 I 2 3 4 5 o 410 6 820 o 410 7 820 o 410 8 820 TIMING (MICROSECONDS) CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 CE PACK SIN 1815A00161 TO 234 TRACK FOLLOWER PIN 07925-60004 DISC DRIVE SiN _ DATE _ 7311-78 -c.Jo Figure 3-12. Data Graph Example 4 t>,:) C)l ~ ~ ~ 01 HEAD CYLINDER LOWER LIMIT (-4 J.lS FROM MEAN VALUE) MEAN VALUE UPPER LIMIT (+4 J.lS FROM MEAN VALUE) CYLINDER HEAD -5 -4 -3 -2 -1 0 1 2 3 4 5 0 I 92.7 4_ · I 96.7 I 0.7 " 0 0 410 820 92.0 · 91.0 · 96.0 95.0 0.0 99.0 : I " 410 0 820 0 95.3 U 99.3 I 3.3 0 1 410 820 0 2 410 820 0 W 3 410 U Z 820 a<:! [] ~~ 0 410 820 0 0 I- 5 410 ::> 820 0 0 6 410 820 95.0 .94.7 · 94.0 93.5 92.8 I 95.9 95.8 95.7 I 95.6 95.4 95.1 I 93.8 93.2 92.3 I 94.4 93.9 93.2 U 99.0 · · 98.7 · 98.0 U 97.5 · 96.8 n ·· 99.9 99.8 99.7 I 99.6 99.4 · 4_ 99.1 n I · 97.8 9_ 96.3 4_ 98.4 97.9 97.2 4_ 4_ 4_ 3.0 1 2a I I 2.0 1.5 I 0.8 I I 3.9 W 3.8 U Z 3.7 I a<:! 3.6 ~ 3.4 0 I- I 3.1 I LL 0 I 1.8 I- 1.2 ::> 0.3 0 I 2.4 1.9 1.2 410 1 820 0 410 2 820 0 410 3 820 0 410 4 820 0 410 5 820 0 410 6 820 I I I 0 94.0 98.0 4 2.0 0 7 410 820 0 8 410 820 93.5 97.5 92.7 96.7 I 94.4 98.4 94.0 98.0 93.4 97.4 I I -5 -4 -3 -2 -1 0 1 4 1.5 · 0.7 · I 2.4 ~.o · 1.4 2 3 l 5 410 7 820 0 410 8 820 Cl-' ~ 7311-79 01 t:: TIMING (MICROSECONDS) CE PACK SIN 1815A00071 TO 160 ciQ' =:s CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 TRACK FOLLOWER PIN 07925-60004 :3 l'O =:s DISC DRIVE SIN _ ~ j:l) =:s DATE _ 0.. > 0.. 'i:' en 3" l'O Figure 3-13. Data Graph Example 5 =:s ~ ~ ~ (j) HEAD CYLINDER 0 0 410 820 LOWER LIMIT (-4 J.lS FROM MEAN VALUE) -5 -4 -3 I 92.7 92.0 91.0 0 95.3 1 410 95.0 820 94.7 I 0 94.0 2 410 93.5 820 92.8 I 0 W 95.9 3 410 (.) iZ 95.8 820 :<a3:: 95.7 I [ ] Effi~· 0 410 820 95.6 95.4 95.1 0 5 410 0 I 93.8 5 93.2 820 0 92.3 I 0 94.4 6 410 93.9 820 0 7 410 93.2 I 94.0 93.5 · 4 820 0 8 410 820 92. I 94.4. (e).0 · 93.4 I -5 -4 -~l -2 -1 · U · · 0 · -2 -1 MEAN VALUE 0 1 I 96.7 96.0 95.0 I 99.3 99.0 98.7 I 98.0 97.5 96.8 99.9 99.8 99.7 I 99.6 99.4 99.1 I 97.8 97.2 96.3 I 98.4 97.9 97.2 I 98.0 97.5 96.7 I 98.4 98.0 97.4 I 0 · 0 4_ 1 UPPER LIMIT (+4 J.lS FROM MEAN VALUE) CYLINDER HEAD 2 3 4 5 I 0.7 0 0 0.0 .. 99.0, I I 3.3 · 410 0 820 0 3.0 (t~ 410 1 I 2.7 (.) 820 · I I 2.0 · 1.5 )e>.8 0 410 2 820 · t 0 I 3.9 W 3.8 (.) Z 3.7 a<3:: 3.6 W ...J 3.4 0 I- I 3.1 I LL 0 I 1.8 I- 1.2 ::> 0.3 0 I 0 410 3 820 0 410 4 820 0 410 5 820 2.4 0 1.9 410 6 1.2 820 I 2.0 0 1.5 410 7 0.7 820 I 2.4 0 2.0 410 8 1.4 820 I 2 3 4 5 TIMING (MICROSECONDS) CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 CE PACK SiN 1815A00071 TO 160 TRACK FOLLOWER PIN 07925-60004 DISC DRIVE SIN _ DATE _ 7311-80 Figure 3-14. Data Graph Example 6 t::: aQ' ::s -3 (t) ::s § a.. a>.. ~. tn -3" (t) ::s -1 ~ ~ C1l ..;J to ~ en HEAD CYLINDER 0 0 410 820 0 1 410 820 0 2 410 820 0 3 410 820 D ~0 410 820 0 5 410 820 0 6 410 820 0 7 410 820 0 8 410 820 LOWER LIMIT (-4/Js FROM MEAN VALUE) -5 -4 -3 I 92.7 92.0 .91.0 · · ' 95.3 95.0 94.7 .I 94.0 93.5 92.8 0 I W U Z« a: B~ 0 ~ :::> 0 95.9 95.8 95.7 I 95.6 95.4 95.1 I f 93.8 I 93.2 92.3 · 94.4 93.9 93.2 I 94.0 93.5 92.7 I 94.4 94.0 93.4 I -5 -4 -3 -2 ·· ·· -2 MEAN VALUE UPPER LIMIT (+4/Js FROM MEAN VALUE) -1 0 1 2 3 4 5 I I 96.7 0.7 96.0 0.0 95.0 ·· · 99.3 99.0 98.7 98.0 99.0 · I 3.3 3.0 I 2.7 I I 2.0 97.5 1.5 96.8 I .99.9 tJl.8 9~ · I 99.6 · 99.4 · 99.1 97.8 97.2 96.3 I 98.4 97.9 4_ ·· · I 0.8 I 3.9 3.8 3:7 I 3.6 3.4 I 3.1 I I 1.8 1.2 0.3 I 2.4 1.9 ·w«~ a: ~ 0 ~ u.. 0 ~ :::> .. 0 97.2 0 98.0 · 97.5 U 96.7 · I 98.4 · 98.0 97.4 ·· · I -1 0 1 2 3 1.2 I 2.0 1.5 0.7 I 2.4 2.0 1.4 l 5 CYLINDER HEAD 0 410 0 820 0 410 1 820 0 410 2 820 0 410 3 820 0 410 4 820 0 410 5 820 0 410 6 820 0 410 7 820 0 410 8 820 '"~ 7311-81 ..;J t:: TIMING (MICROSECONDS) CE PACK SIN 1815A00071 TO 160 dQ' ::s CIRCUMFERENTIAL TIMING DATA GRAPH FOR 7925 TRACK FOLLOWER PIN 07925-60004 S (t) DISC DRIVE SIN _ :n:so $l) ::s DATE _ Po 6: 1::' Cf.l 3" (t) Figure 3-15. Data Graph Example 7 n::so Alignment and Adjustment 7925 7311-81 ® Clockwise - causes the values to shift in a positive direction ® Counterclockwise - causes the values to shift in·a negative direction Figure 3-16. Track Follower Alignment a. Perform the warmup procedure outlined in paragraph 3-13. b. On the DSU, set the FUNCTION switch to position 7. Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. c. Tighten the servo head to 5 inch-pounds. 3-18 d. On the DSU, set the FUNCTION switch to position 1 (ALTERNATE SEEK). e. On the DSU, select cylinder address 822 on the upper bank often switches (switches 512, 256, 32, 16,4, and 2 set to the right). f. On the DSU, select cylinder address 896 (illegal address) on the lower bank of switches (switches 512, 256, and 128 set to the right). g. Press the START pushbutton on the DSU. The heads will go to cylinder 822 and remain at 822. 7925 DATA GRAPH Condition 1 Condition 2 Condition 3 Condition 4 Condition 5 Condition 6 Condition 7 Alignment and Adjustment Table 3-1. Description of Circumferential Timing Conditions DESCRIPTION Only one head is out of tolerance outside the lower limit. All the other heads are within tolerance. (Refer to figure 3-9.) Only one head is out of tolerance outside the upper limit. All the other heads are within tolerance. (Refer to figure 3-10.) Only one head is out of tolerance outside the upper limit. All the other heads are within tolerance. (Refer to figure 3-11.) Only one head is out of tolerance outside the lower limit. All the other heads are within tolerance. (Refer to figure 3-12.) Head 0 or heads 0 and 1 are out of tolerance outside the lower limit and head 7 or heads 7 and 8 are out of tolerance outside the upper limit. (Refer to figure 3-13.) Head 0 or heads 0 and 1 are out of tolerance outside the lower limit and head 7 or heads 7 and 8 are out of tolerance outside the lower limit. (Refer to figure 3-14.) All the heads are within tolerance, circumferential alignment is within the disc drive specification. (Refer to figure 3-15.) h. Check the clearance, shown in figure 3-17, between the upper crash stop and the upper part of the carriage assembly to ensure it is approximately 0.051 em (0.020 in.). If the clearance is not correct, perform steps i and j, otherwise proceed to step k. i. On the DSU, set the FUNCTION switch to position 7. Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. j. Insert the head alignment tool into the servo head alignment hole (see figure 3-5) with the "L-shaped" handle end pointing upward. Adjust the head position to obtain the clearance shown in figure 3-17. Rotate the tool counterclockwise for more clearance, and clockwise for less clearance. k. On the DSU, set the FUNCTION switch to position 7. Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. 1. On the DSU, press the START pushbutton. Ensure that the head alignment meter pointer moves to the far right, then to the far left, and then back again. If the pointer does not perform as stated above, repeat steps d through 1. m. Ensure that the DSU is set to FUNCTION 7. Tighten the servo head to 7.5 inch-pounds and repeat steps d through 1 and then proceed to step n. n. Perform the data head alignment check. o. Perform the circumferential alignment check. 3-18. DATA HEAD ALIGNMENT CHECK. The data head alignment check may be performed independent of the alignment procedures to verify whether any or all data heads are within tolerance. If any data head is out of tolerance, perform the data head alignment procedure. To check data head alignment, proceed as follows: a. Perform the warmup procedure outlined in paragraph 3-13. b. On the DSU, select the data head to be checked using the binary combination of toggle switches H8 (C11), H4, H2, and HI. c. Set the FUNCTION switch to position 7, press the START pushbutton, and wait for the completion of the 5-second cycle. 3-19 Alignment and Adjustment 7925 (NOT TO SCALE) '--0.051 em (0.020 in.) g. After this procedure is completed and all tools have been removed from the actuator assembly, set the DSU to FUNCTION 1. h. On the DSU, press the START pushbutton and then press the STOP pushbutton. Set the RUN/STOP switch to STOP. 3-19. DATA HEAD ALIGNMENT. The data head alignment procedure should be performed when a servo head has been replaced, a data head has been replaced, or when the data head alignment check reveals that a data head is out of tolerance. To align a data head, proceed as follows: I CAUTION I Do not insert the head alignment tool into the servo head adjustment hole, which is the fifth from the top (see figure 3-5), otherwise all data heads will require realignment. a. Perform the warmup procedure outlined in paragraph 3-13. b. On the DSU, set the FUNCTION switch to position 7 and press the START pushbutton. After the 5-second cycle is complete, torque all data heads to be aligned to 5 inch-pounds. REF 7311-53 Figure 3-17. Actuator Crash Stop Clearance Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. d. Verify that the head alignment is within a reading of 0.0 ±5 on the HEAD ALIGNMENT meter. e. Repeat steps b through d for each data head to be checked. f. Perform the data head alignment procedure for each data head that is out of tolerance. 3·20 Note: Do not stop the spindle while the DSU is set to FUNCTION 7. If the spindle must be stopped, remove any tools from the actuator assembly; set the DSU to FUNCTION 1; press the START pushbutton, then the STOP pushbutton; and then set the RUN/STOP switch to STOP. c. Select the data head to be aligned using the binary combination of toggle switches H8 (CII), H4, H2, and HI. Press the START pushbutton and wait for the completion of the 5-second cycle. d. Insert the head alignment tool, with the "L shaped" handle end pointing upward, into the data head alignment hole and adjust the head until the meter deflection is between a reading of -10 and + 10 units. Remove the alignment tool. (Note that the tool pointer and meter pointer move in the same direction. ) e. Tighten the data head to 7.5 inch-pounds. f. Insert the alignment tool and carefully adjust the data head for a reading of 0.0 ± 1 on the HEAD ALIGNMENT meter. Remove the alignment tool. 7925 Alignment and Adjustment g. Press the START pushbutton and wait for the 5-second cycle to complete. The display and meter should read the same as that given in step f. h. Repeat steps c through g for each data head to be aligned, using the binary combination of toggle switches H8, H4, H2, and HI. i. Set the FUNCTION switch to position 3, rotate the DELAY control to a position near MIN, and press the START pushbutton. Allow the disc drive to random seek for 2 minutes. j. Verify that head alignment is within a reading of 0.0 ±2 on the HEAD ALIGNMENT meter. k. If a head is out of tolerance, repeat steps e through j. 1. Repeat steps i and j for each data head. m. Read the temperature of the disc drive from the liquid crystal thermometer (see figure 3-6) and record this temperature on the head alignment label. Note: The disc drive temperature is read by noting the number containing a green color on the liquid crystal thermometer. If only blue or brown colors show, the disc drive temperature is the average of the blue and brown numbers. This number represents the disc drive temperature in degrees Celsius. For proper operation, the disc drive temperature should be within ±10°C (±18°F) of the temperature recorded on the head alignment label (located inside of the front door). n. Perform the circumferential alignment check. 3-20. ON-LINE CHECKOUT When all adjustments have been completed, remove the CE disc pack. Set the DISC switch on the operator panel and the circuit breaker on the power panel assembly to the OFF positions. Remove the DSU, head alignment PCA, and related cabling. Reconnect the cabling disconnected prior to alignment, replace the shroud, and apply ac power. Perform an on-line checkout in accordance with diagnostic tests supplied with the system. 3-21/3-22 TROUBLESHOOTING I~ WARNING This disc drive does not contain operator-serviceable parts. To prevent electrical shock, refer all installation and maintenance activities to service-trained personnel. This section contains information useful for troubleshooting the HP 7925 Disc Drive. Included are functional diagrams, troubleshooting flowcharts, wiring diagrams, and test waveforms. The information provided is for the isolation of malfunctions within the drive and not for equipment external to the drive. 4-1. DIAGNOSTIC TEST PROGRAMS Diagnostic test programs for use with Hewlett-Packard systems containing disc drives are available from Hewlett-Packard. It is recommended that the user of an HP 7925 Disc Drive installed in a non-HP system have available a diagnostic test program with capabilities similar to those offered by Hewlett-Packard. An HP-generated diagnostic tests the system devices which are associated with disc drive operation. In addition to this testing capability, the diagnostic can also be used to isolate a group of circuits within the drive as the possible cause of a malfunction. These include the read/write circuits, the head positioning circuits, and the head and sector storage circuits. It should be noted that the diagnostic is the only readily available means by which the user can check the ability of the read/write circuits to write data on the disc surfaces, read it back from the disc surfaces, and store and retain the data. The disc service unit (DSU) will not issue a write command and does not check data generated by the drive in response to a read command. The diagnostic is also able to determine the status of the drive (drive busy, not ready, seek check, first status, and attention). It also monitors the on/off status of the DRIVE FAULT indicator (fault). The diagnostic can also be employed to detect patterns exhibited by intermittent errors. This may be done by running the diagnostic continuously over a period of time and checking for the conditions present at each occurrence of the error. Detailed operating instructions for HP-supplied diagnostic test programs are contained in the documentation delivered with the software. 4-2. TROUBLESHOOTING FLOWCHARTS If a malfunction can be associated with a certain circuit through knowledge of the drive, the service-trained and equipped user can go directly to the appropriate troubleshooting flowchart (figures 4-2 through 4-21) and following the instructions given, attempt to remedy the fault. Visual indication of the drive status, as described in table 4-1, is intended to aid in isolating the malfunction to a particular area of the drive. If the malfunction cannot be located in this manner, carry out the procedure described in the power-up flowchart (figure 4-1). Failing this, the diagnostic test program should be used to isolate the fault. It should be noted that the power-up flowchart checks, in general, operation of the blower, power sources, door lock circuits, spindle rotating circuits, and head positioning circuits. The diagnostic test program, on the other hand, checks operation of the I/O control circuits, read/write circuits, sector sensing circuits, and the portions of the head positioning circuits that seek to a cylinder addressed by the disc controller. Refer to table 4-3 for a description of the symbols used on the troubleshooting flowcharts. 4-3. POWER SOURCES The troubleshooting procedures in this section assume that all power sources in the drive are within tolerance. If they are not, the cause of the trouble will be apparent (IL LED indicator lit) and the PSU LED on drive control PCA-A4 will be off. If the +5 Vdc power source exceeds approximately +5.6 Vdc, a crowbar circuit on PCA-A7 disables the 5-volt supply, causing all. indicators to be extinguished. The mainframe assembly wiring diagram (figure 4-23) can be used to trace power source malfunctions. To check the voltages, proceed as follows: WARNING The following procedure is performed with power supplied to the disc drive, and protective covers removed. This troubleshooting should be performed only by service-trained personnel who are aware of the hazards involved (for example, fire and electrical shock). a. If applicable, remove the disc pack from the disc drive. b. Remove ac power from the disc drive. c. Remove the shroud as outlined in paragraph 5-3. 4-1 Troubleshooting 7925 d. Remove track follower PCA-A5 and replace w.ith extender board, part no. 13354-60003. (Refer to paragraph 5-9.) e. Apply ac power to the disc drive and check the voltages shown below. +5.0 ± 0.1 Vdc at A5Jl-5, E* + 12.0 ± 0.6 Vdc at A5Jl-3, C* -12.0 ± 0.6 Vdc at A5Jl-2, B* -24.0 ± 1.2 Vdc at A5Jl-14 *These voltages are within tolerance if the PSU LED on drive control PCA-A4 is lit. f. If the voltages are not within specifications, refer to the mainframe assembly wiring diagram, figure 4-23, for further troubleshooting. 4-4. VISUAL INDICATION OF DRIVE STATUS Table 4-1 lists the response of the drive to certain conditions as evidenced by the appearance of the light-emitting diodes (LED's) on fault indicator PCA-A12 and spindle logic PCA-AB, the indicators on the operator control panel, and the drive mechanism. Also provided is a description of the circuit that implements the response, including its logic equation and location on the system functional diagram. 4-5. DISC SERVICE UNIT The disc service unit (DSU) simulates disc controller signals and processes the response of the drive for display. A detailed description of the DSU is given in paragraphs 2-7 through 2-9 and installation instructions are provided in paragraph 3-9. The eight DSU modes of operation are described in table 4-2. Note: All operations of the DSU, including read, are limited to addressing and accessing. During a read operation, the DSU test module does not decode data. Performance testing of the read and write functions must be performed by a system diagnostic test program. 4-6. SYSTEM FUNCTIONAL DIAGRAMS Figures 4-24 through 4-29 provide functional diagrams for the disc drive. These include the I/O control system, spindle rotation system, head positioning system, sector sensing system, read/write system, and fault detection system. Each of the systems is discussed in detail in Section I, Theory of Operation. A grid-coordinate system is used bn the functional diagrams to aid in following signal flow. In addition, cross-references are provided for each signal where it leaves one diagram to appear on another. In order to simplify the diagrams as much as possible, all interconnections that occur through the mainframe wiring harness and motherboard PCA-A7 have been omitted. Refer to the mainframe assembly wiring diagram (figure 4-23) and motherboard PCA-A7 signal distribution list (table 4-4) for this information. 4-7. WIRING CONNECTIONS Wiring connections for the drive (except that on motherboard PCA-A7) are shown in the mainframe assembly wiring diagram (figure 4-23). Motherboard wiring connections are contained in motherboard PCA-A7 signal distribution list (table 4-4). Two cables connect the drive to the disc controller - an HP 13013D multi-unit cable which contains the control bus, tag bus, and strobe signal wiring; and an HP 13213D data cable which carries the read/write and SL (Drive Select) signals. 4-8. POWER DISTRIBUTION Distribution of the ac power input to the drive enclosure is shown in the power panel assembly wiring diagram (figure 4-22). The drive converts the ac power to + 5 Vdc, ",1,. + 12 Vn~-., +~- h- V. r-!-(-', -1-')- .Vr-l_", -'_h.i..V. r_l",".', !_:I..n....,_1 -<.'...H,...~., ................f..n_.A.... distribution to the components of the drive. This distribution is detailed in the power distribution list (table 4-5). 4-2 7925 Troubleshooting INDICATOR! INDICATION Table 4-1. Visual Indication of Drive Status ACTIVE STATE LOGIC EQUATION CIRCUIT DESCRIPTION FUNCTIONAL DIAGRAM Unit Select Identifi- SEL cation Indicator READ ONLY R01 Indicator DOOR UNLOCKED PSF. (STOP. CRB. SPD) Indicator DRIVE READY Indicator DRIVE FAULT Indicator Set = AGC · CB Reset = FLT + DL. PIP + SPU + STOP FLTL = AGC + CBF + TO + ILF + W · AC + W · AR + R · W + MH + DCW · Indicator is lit when both of the following conditions are met: a. Control bus bits DO thru D2 match signals USO thru US2 from UNIT SELECT switch S3. b. Select flip-flop is set. [ADU (Address Unit) signal selected on tag bus while STROBE signal is active sets flip-flop.] I/O Control System, figure 4-24. Indicator is lit when READ ONLY switch S5 is set to Read/Write System, READ ONLY. ftgure 4-28. Indicator is lit when all of the following conditions are met (door unlock solenoid energized): a. RUN/STOP switch S2 set to STOP. b. Carriage fully retracted. c. Spindle stopped. d. All power supplies are on. Spindle Rotation System, figure 4-25. Indicator is lit when both of the following conditions are met: a. AGC (Automatic Gain Control) signal active. b. SB (Servo Balanced) signal active. Head Positioning System, figure 4-26. Indicator is lit when anyone of the following conditions is met: a. AGC (Automatic Gain Control) signal active, caused by loss of servo information any time after drive becomes active. b. CB (Carr iage Back) signal active, caused by defective carriage back detector (phototransistor). This occurs when drive is ready but the phototransistor or CB signals say that heads are retracted. c. TO (Time Out) caused by anyone of the following: 1. Any head loading sequence or recalibration taking more than 1.25 seconds. 2. Track-to-track seek taking more than 120 milliseconds. d. ILF (Interlock) signal active, due to one of the following: 1. Out of tolerance or missing power supply voltage. 2. Excessive temperature condition, as sensed by switch A9A1. 3. PCA improperly seated or missing. 4. Line voltage 15 percent below nominal value. 5. Current limit in spindle power amplifier. e. Destructive write faUlt, caused by anyone of the following: 1. Drive lQ.. write mode with no data signal applied (W · AC LED indicator is lit.) 2. More than one head selected for reading or writing. (MH LED indicator is lit.) 3. DC write current is supplied to the head driver while drive is not in write mode. (Both MH and W. AC LED's are lit.) Head Positioning System, figure 4-26. 4-3 TroUbleshooting 7925 INDICATOR! INDICATION DRIVE FAULT Indicator (Continued) IL LED Indicator AGC LED Indicator CB LED Indicator MH LED Indicator W. AC and MH LED Indicators T LED Indicator Table 4-1. Visual Indication of Drive Status (Continued) LOGIC EQUATION ACTIVE STATE CIRCUIT DESCRIPTION FUNCTIONAL DIAGRAM --- AG~ DRDY = AGC · SKH · DRDY CRB. DRDY MHS + WRITE. DCW WRITE. DCW TOFL f. Non-destructive write fault, caused by one of the following: 1. Heads not settled on a cylinder [ACRY (Access Ready) signal inactive] while in write mode. (W · AR LED indicator is lit.) 2. Drive in both read and write mode at the same time. (R · W LED indicator is lit.) Indicator is lit when one of the following conditions is met: a. Any PCA (with the exception of PCA-A11 and PCAA12) not firmly seated or correctly positioned in the drive. b. Pack loading assembly disconnected. c. +36 Vdc, +12 Vdc, +5 Vdc, -12 Vdc, -24 Vdc, or -36 Vdc power source out of tolerance or missing. d. Temperature of heat sink on PCA-A9 rises above a specified limit. e. A spindle fault is detected. Fault Detection System, figure 4-29. Indicator is lit when the following conditions are met: a. Heads are out of cylinder area between inner and outer guard bands. [DRDY (Drive Ready) signal active.] b. AGC (Automatic Gain Control) and DRDY (Drive Ready) signals active. Fault Detection System, figure 4-29. Indicator is lit when the following conditions are met: a. CRB (Carriage Back) signal active. b. DRDY (Drive Ready) signal active. Fault Detection System, figure 4-29. Indicator is lit when more than one head is selected for Fault Detection reading or writing. System, figure 4-29. Both indicators are lit when the following conditions are met: a. DC current supplied to head drivers. b. Drive not in write mode. Fault Detection System, figure 4-29. Indicator is lit when one of the following conditions is met: a. Heads not settled on specified cylinder within 120 milliseconds after SK (Seek) signal is activated. b. Heads not settled on cylinder 0 within 1667 milliseconds after SKH (Seek Home) signal becomes active. c. Heads do not reach fully retracted position within 1667 milliseconds after RET (Retrack) signal becomes active. d. Heads not settled on cylinder 0 within 1667 milliseconds after RH (Restore Home) signal becomes active. Fault Detection System, figure 4-29. 4-4 7925 Troubleshooting Table 4-1. Visual Indication of Drive Status (Continued) INDICATOR! INDICATION LOGIC EQUATION ACTIVE STATE CIRCUIT DESCRIPTION FUNCTIONAL DIAGRAM W. AR LED Indicator WRITE. ACRY Indicator is lit when the following conditions are met: a. Drive in write mode. b. ACRY (Access Ready) signal inactive. Fault Detection System, figure 4-29. R. W LED Indicator URG. WRITE Indicator is lit when the following conditions are met: a. URG (Unselected Read Gate) signal active. b. WRITE (Write) signal active. Fault Detection System, figure 4-29. W. AC LED Indicator WRITE. ACW Indicator is lit when the following conditions are met: a. Drive in write mode. b. No data signal present. Fault Detection System, figure 4-29. SPU LED Indicator --- Indicator is lit when spindle motor is operating at correct Spindle Rotation speed. System, figure 4-25. OFF LED Indicator --- Indicator is lit when power is removed from spindle motor. Spindle Rotation System, figure 4-25. SPFLT LED Indicator --- Indicator is lit when an overcurrent condition is sensed in Spindle Rotation spindle rotation system. System, figure 4-25. Spindle starts to rotate from a stationary state. PIP. DL · ILF · RUN. CRB. TOF Spindle rotation occurs when the following conditions are met: a. Disc pack in place. b. Disc pack access door locked. c. No IL drive fault. d. RUN/STOP switch set to RUN. e. Carriage fully retracted. f. No time-out fault. Sp ndle Rotation System, figure 4-25. Spindle continues to rotate. CRB. ILF Once started, the spindle motor continues to rotate as long as the follow ing conditions are met: a. Carriage not fully retracted. [CRB (Carriage Back) signal inactive.] b. ILF (Interlock Fault) signal inactive. Spindle Rotation System, figure 4-25. Heads seek to cylinder 0 (home) from the retracted position. RET. SPU During a power-up operation, the heads seek home when the RET (Retract) signal becomes inactive. This occurs when the spindle reaches operational speed (SPU signal active). Head Positioning System, figure 4-26. Heads seek from one cylinder to another. ACRY · SK · ICA The heads seek from one cylinder to another provided the following conditions are met: a. Heads settled on any legal cylinder. [ACRY (Access Ready) signal active.] b. The SK (Seek) signal from controller is present. c. The address to which the heads are to seek is not an illegal one ( > 823). Head Positioning System, figure 4-26. 4-5 Troubleshooting 7925 Table 4-2. Disc Service Unit (DSU) Functions CONTROLI INDICATOR FUNCTION FUNCTION switch Function No.1 - Alternate Seek Selects automatic Alternate Seek function (position 1). START (STROBE) pushbutton Starts operation of Alternate Seek function. Heads first seek to cylinder 0, then to the cylinder address selected on the upper bank of ten toggle switches, and then alternately between this address and the cylinder address selected on the lower bank of ten toggle switches. If either selected address is an illegal one (greater than 822), the heads seek to the legal address and remain there. If both addresses are illegal, only the seek to 0 (zero) is performed. STOP pushbutton Stops operation of Alternate Seek function. Upper bank of 10 toggle switches (1 through 512) Selects cylinder address to which heads seek after leaving cylinder O. Lower bank of 10 toggle switches (1 through 512) Selects cylinder address to which heads seek after leaving cylinder address selected by upper bank of 10 toggle switches. DELAY control Selects time interval between seeks. 3-digit display Indicates time interval for seek. Readout is in milliseconds. FUNCTION switch Function No. 2 - Incremental Seek Selects automatic Incremental Seek function (position 2). START (STROBE) pushbutton Starts operation of Incremental Seek function. Heads first seek to cylinder 0 and then to next address. Next address is determined by adding the numbers selected by the lowest ten (1 through 512) switches on the lower bank of toggle switches. Incremental seeking of the heads to the next address continues until a next address greater than 822 is reached. When this occurs, the programmed next address number is subtracted from the preceding valid next address (822 or less), causing decremental seeking to the next address until cylinder 0 is reached. The heads continue this incremental and decremental seek action until the STOP pushbutton is pressed. STOP pushbutton Stops operation of Incremental Seek function. Lower bank of 9 toggle switches (1 through 256) Selects amount by which current cylinder address is incremented (or decremented) for next seek. DELAY control Selects time interval between seeks. 3-digit display Indicates time for seek. Readout is in milliseconds. FUNCTION switch Function No.3 - Random Seek Selects automatic Random Seek function (position 3). START (STROBE) pushbutton Starts operation of Random Seek function. Heads first seek to cylinder 0 and then to cylinder addresses generated by the DSU in a pseudo-random sequence. Note: On functions 1 through 3, head 0 and sector 0 are selected before the initial seek to 0 (zero). 4-6 7925 Troubleshooting CONTROL/ INDICATOR STOP pushbutton DELAY control 3-digit display Table 4-2. Disc Service Unit CDSU) FunctionsCContinued) FUNCTION Function No.3 - Random Seek (Continued) Stops operation of Random Seek function. Selects time interval between seeks. Indicates time interval between seeks. Readout is in milliseconds. FUNCTION switch START (STROBE) pushbutton STOP pushbutton 3-digit display Function No.4, 5, or 6 - Circumferential Alignment Selects automatic setting to prescribed cylinder depending on the position. Position 4 - cylinder 0 Position 5 - cylinder 410 Position 6 - cylinder 820 Starts operation. Heads go to the cylinder listed above. Stops operation. Indicates time interval to seek to the cylinder. Readout is in milliseconds. FUNCTION switch START (STROBE) pushbutton Upper 4 toggle switches (TO through T3) TO thru T3 LED indicators Lower bank of 16 toggle switches (1 through 512 and 1 through 32) Function No.8 - Manual Mode Selects Manual mode of operation (position 8). When pressed, activates STROBE signal applied to the tag bus decoder in I/O Sector PCA-A2. This executes the command selected by tag bus switches 64 through 512 on the upper bank of 10 toggle switches. The STROBE signal is active as long as the START (STROBE) pushbutton is held down. Selects input command to be supplied on tag bus to drive. The toggle switch settings and the associated input commands are listed on the upper right-hand corner of the DSU front panel. The DSU does not issue a Write command. Indicates the state of the tag bus bits (input command) selected by the upper 4 toggle switches (64 through 512). Selects state 'of control bus bits CO through C15 for the following tag bus commands. Bits are strobed into the drive when the START (STROBE) pushbutton is pressed. Command Address Record (ADR) - 1001 CO thru C5 C8, C9, C10, and C11 Control Bits Selects sector address to be stored in drive Sector Address register. Selects head identity to be stored in drive Head register. Note: On functions 1 through 3, head 0 and sector 0 are selected before the initial seek to 0 (zero). 4-7 Troubleshooting CONTROL/ INDICATOR CO thru C15 LED indicators 4-8 7925 Table 4-2. Disc Service Unit (DSU) Functions(Continued) FUNCTION Function No.8 - Manual Mode (Continued) Command Address Unit (ADU) - 1010 CO thru C2 Control Bits Selects identity of drive to be enabled for communication with DSU. (The identity of the drive is the number selected on the UNIT SELECT switch on the drive operator panel.) Clear Status (CLS)-1110 co Clears three Attention flip-flops in drive. This deactivates First Status signal. Note: If CO and C1 are both selected, the Attention flip-flops and the First Status flip-flop are cleared. Seek (SK) - 1000 CO thru C9 Selects cylinder address to which heads are to seek. Set Offset (SOF) - 1101 CO thru C5 Selects offset magnitude in 63 increments of 12.5 microinches each. C7 Selects direction (+ or -) of offset. Transmit Sector (XMS) - 1100 CO thru C5 Selects sector address to be stored in drive Sector Address register. a. Indicates the state of the control bus bits selected by the lower band of 16 toggle switches when anyone of the preceding six commands is selected. b. Indicates the status of the drive when anyone of the following commands is selected: Read (READ) - 0000 Write (WRITE) - 0001 Request Status (RQS) - 0010 Coding for the LED~s is as foiiows. With the exception of Co (AeRY), a lighted LED indicates that the corresponding signal is active. CO, when lighted, indicates that signal ACRY is inactive. CO - ACRY (Access Ready) C1 - DRDY (Drive Ready) C2 - Illegal head selected, illegal sector selected, or seek check C3 - First Status C4 - FLT (Fault) C5 - Format C6 - READ Only C7 - ATT (Attention) C8 - SC (Sector Compare) C9 - High } C10 - Drive Type C9 on and C10 on, drive = 7925 C11 through C15 - Not used 7925 CONTROL/ INDICATOR Table 4-2. Disc Service Unit (DSU) Functions (Continued) Troubleshooting FUNCTION Function NO.8 - Manual Mode (Continued) c. Indicates position information when Request Position (RQP) command is selected. Coding for the LED's is as follows: CO thru C5 - Present sector from servo code. C6-0 C7- 0 C8, C9, C10, and C11 - Identity of selected head (0 through 8) C11 thru C15 - Not used Table 4-3. Flowchart Symbols SYMBOL C -----""') DESCRIPTION TERMINATION SYMBOL. This symbol indicates an entry to the flowchart or an exit from the flowchart. 1---_1 PROCESS SYMBOL. This symbol indicates the execution of a defined operation. ---------~ <o> FLOWLINE SYMBOL. This symbol indicates the logical path to follow in the flowchart. ANNOTATION SYMBOL. This symbol is used for descriptive comment in the flowchart. DECISION SYMBOL. This symbol requires a choice of logical paths. This choice of paths depends on the answer to the question contained in the symbol. OFFPAGE CONNECTOR. This symbol designates entry or exit from a page. EXIT from a page Go to sheet 2, block A. ENTRY from a page 1~ ~ .......Continued from ~Sheet1. Block A 4-9 Troubleshooting 7925 Refer to blower troubleshooting flowchart, fig. 4·2. Refer to DRIVE FAULT indicator troubleshooting flowchart, fig. 4-3 Check +5V power supply. Refer to paragraph 4-3. Refer to door unlocked solenoid troubleshooting flowchart, IIg. 4-13 Refer to DOOR UNLOCKED indicator troubleshooting flowchart, fig. 4-14. Refer to Unit Select indicator troubleshooting flowchart, fig. 4-15. Refer to READ ONLY indicator troubleshooting flowchart, fig. 4-16. Refer to DRIVE READY indicator troubleshooting flowchart, fig. 4-17. Refer to door unlocked solenoid troubleshooting flowchart, fig. 4-13. Refer to DOOR UNLOCKED indicator trouleshooting flowchart, fig. 4·14. Refer to DRIVE FAliLTindicator troubleshooting flowchart, fig. 4-3. Refer to DRIVE READ'LLndjcator troubleshooting flowchart, fig. 4-17. l. . __E_N_D_.,.) 7311-3C 4-10 Figure 4-1. Power-Up Troubleshooting Flowchart 7925 7311-4C Troubleshooting Check primary fuse F1. NOTE: Refer to the following diagram for circuit details. · Mainframe Assembly Wiring Diagram, fig. 4-23. Replace fuse F 1. (Refer to note 3, fig. 4-23.) Check for 120 Vac between TB1-1 and TB1-3 using a battery operated DVM. Disconnect the ac power and then check wiring between switch 81, fuse F1, and TB1. Repair as necessary. Disconnect the ac power and then check continuity of wires connecting TB1-1, TB 1-3, blower motor B1, and starting capacitor C1. Repair wiring. Check starting capacitor C1. Replace capacitor C1. (Refer to para. 5-30.) Replace blower motor B1. (Refer to para. 5-29.1 Figure 4-2. Blower Troubleshooting Flowchart 4-11 Troubleshooting 7925 ~ - - - - Drive inoperative. NOTES: 1. Refer to the following diagrams for circuit details. · Fault Detection System Functional Diagram, fig. 4-29. · Mainframe Assembly Wiring Diagram, fig. 4-23. 2. PCA's associated with DRIVE FAULT malfunctions include: · Motherboard PCA·A? · Power and motor regulator PCA-A9. Refer to troubleshooting flowchart for lit LED indicator. See figs. 4-4 through 4-12. Check + 5 Vdc supply. Check output of + 5 Vdc regulator on PCA-A9 and crowbar circuit on PCA-A? Replace PCA-A9 and/or PCA-A? Yes 7311-5 4-12 Figure 4-3. DRIVE FAULT Indicator Troubleshooting Flowchart 7925 Check seating of all peA's except A 11 and A 12. If ok, check fuses on power supply assembly. If ok, check fuses on PMR board. If ok, check that ac line voltage is within No tolerance using a battery-operated DVM. If ok, check following voltages. VOLTAGE TEST POINT +36 Vdc -36 Vdc A9J2-4 A9J2-7 NOTES Refer to the following diagram for circuit details · Mainframe Assembly WIring Diagram, fig. 4-23. 2 peA's associated with IL malfunction includes · Power and motor regulator PCA·A9 Troubleshooting Check vol tage at followi ng test points on PCA-A5. (Refer to para. 4-3 for measure· menttolerances. VOLTAGE +5 Vdc +12 Vdc -12 Vdc TEST POINT A5Jl-5 A5Jl-3. C A5Jl-2. B Ves Remove A9Pl from peA-Ago (Drive power off,) Check voltages at the following TP VOLTAGE +5 Vdc +12 Vdc -12 Vdc TEST POINT A9J 1-32. 30. 29. 34 A9JI-35.36 A9JI-38.37 >---~ Replace PCA-A9 7311-6(1 )A Figure 4-4. IL LED Indicator Troubleshooting Flowchart (Sheet 1 of 2) 4-13 Troubleshooting 7925 Check temperature switch on PCA-A9 for open state. Refer to blower troubleshooting flowchart, fig. 4-2. Check for cause of over temperature. If none, replace PCA-A9. Use fig. 4-23 to trace source of problem. Replace PCA-A9. Check current path from A8Pl-16 to A4Pl16 for open circuit, short to ground, or high resistance. 7311-6(2)A 4-14 Figure 4-4. IL LED Indicator Troubleshooting Flowchart (Sheet 2 of 2) 7925 Troubleshooting Using the DSU, verify that track-to-track seek time does not exceed 5 msec. If necessary, perform velocity command gain adjustment on servo PCA. Refer to para. 3-11. NOTES: 1. Refer to the following diagram for circuit details. · Head Positioning System Functional Diagram, fig. 4-26. 2. PCA's associated with W. AR malfunction include: · Servo PCA-A3. · Drive control PCA-A4. · Track follower PCA-AS. Replace PCA-A3. No No Replace PCA-A4. No Load heads and unplug linear motor from PCA-A9. Scope ATP pas on PCA-A5 and observe runout. If peak-to-peak exceeds 2.QV, disc pack is defective. Replace PCA-A5. No Change pack. No Replace servo head. 7311-7C Figure 4-5. W. AR LED Indicator Troubleshooting Flowchart 4-15 Troubleshooting 7925 NOTES: 1. Refer to the following diagram for circuit details. · Read/Write System Functional Diagram, fig. 4-28. 2. PCA's associated with R. W malfunction include: · I/O sector PCA·A2/microprocessor. · Drive Control PCA-A4. No J URG signal probably active. ~--------' Replace PCA-A2. If malfunction remains, replace PCA-A4. If malfunction remains, check current path from A2P2-K to A4P2-K for open circuit. Replace PCA-A4. If malfunction remains, replace PCA-A2. If malfunction remains, check current paths from A2P2-9 to A4P2-9 and from A2P2-K to A4P2-K for open circuit. 7311-8A 4-16 Figure 4-6. R. W LED Indicator Troubleshooting Flowchart 7925 Troubleshooting NOTE: Refer to the following diagram for circuit details. · Read/Write System Functional Diagram, fig. 4·28. No Use diagnostic operator design program to verify that W. AJ:5 occurs when individually formatting each head. Replace defective head.( Refer to para. 5-18.)1-------------------~ Verify that data cable is connected at both ends and is continuous. Reconnect or replace data cable. Replace PCA-AG. If fault remains, replace PCA-A4. If fault remains, replace PCA-A7. Using diagnostic operator design program, tell drive to read full sector and loop. Scope A4TP RDA and TP ROB. Check for presence of data bursts, separated by 100 Jisec of intersector gap. If M version drive, remove data cable from 13037 Disc Controller and scope wire terminations. No Trace signals to locate open circuit and repair. Replace device controller PCA 13037-60028 in 13037 Disc Controller or data PCA·A 1. 7311-98 Figure 4-7. W. AC LED Indicator Troubleshooting Flowchart 4-17 Troubleshooting 7925 Replace PCA·A4. If malfunction remains, check that correct head select si~nals are active at A4Pl-12 (HSO), A4Pl·13 (HS1). A4Pl-R (HS21. and A4P2·3 (HS3). NOTES: 1. Refer to the following diagram for circuit details. · Read/Write System Functional Diagram, fig. 4·28. 2. PCA's associated with MH malfunction include: · I/O sector PCA·A2/Microprocessor. · Drive control PCA·A4. · Read/Write PCA·A6. Replace PCA-A2. If malfunction remains, check following current paths for open circuit: A2P1-N to A4P1-12 A2P1-12 to A4P1-13 A2P1-P to A4P1·R A2P l-S to A4P2-3 Replace PCA-A6. If malfunction remains, check following circuit paths for short to ground: A4P1·11 to A6P1·2 A4P1·10 to A6P1·C A4P1·9 to A6P1-3 A4P2·T to A6Pl-J 7311-10A 4-18 Figure 4-8. MH LED Indicator Troubleshooting Flowchart 7925 Troubleshooting Replace PCA-A4. If malfunction remains, check for inactive UWG signal at A4P2·9. NOTES: 1. Refer to the following diagrams for circuit details. · Read/Write System Functional Diagram, fig. 4-28. · Sector Sensing System Functional Diagram, fig. 4-27. · F:ault Detection System Functional Diagram, fig. 4-29. 2. PCA's associated with DC. W malfunction include: · I/O sector PCA-A2/microprocessor. · Drive control PCA-A4. · Track follower PCA-AS. · Read/Write PCA·A6. Replace PCA-A2. If malfunction remains, check current path from A2P2·9 to A4P2-9 for open circuit. If none, check for SCL pulse train at ASP2-6. Replace PCA·A6. If malfunction remains, check current paths from A4Pl-H to A6Pl·E and from A3P2·S to A4P2-S for open circuit. Replace PCA-AS. If malfunction remains, '------... check current path from ASP2·6 to A2P2·6 for short to ground. Check current path from ASP2-6 to A2P2·6 for open circuit. 7311-11 B Figure 4-9. DC. W LED Indicator Troubleshooting Flowchart 4-19 Troubleshooting 7925 Replace peA-A5. If malfunction remains, replace PCA-A3. If malfunction remains, reo place PCA·A4. NOTES: 1. Refer to the following diagram for circuit details. · Hnad Positioning System Functional Diagram, fig. 4-26. 2. PCA's associated with AGC malfunction include: · Servo PCA·A3. · Drive control PCA-A4. · Track follower PCA-A5. No Set RUN/STOP switch to STOP. Check for a servo code signal at A5TP PRE when RUN/STOP switch is set to RUN. NOTE: Signal may be incoherent; however, the pre· sence of a signal should be detectable while heads are over cylinder area. Replace servo head. (Refer to para. 5-l8.) Check wiring from A5Pl·16 to A3Pl·16 and from A3P2·S to A4P2·S for short to ground. No Replace pack. 7311-12A 4-20 Figure 4-10. AGe LED Indicator Troubleshooting Flowchart 7925 Troubleshooting NOTES: 1. Refer to the following diagrams for circuit details. · Head Positioning System Functional Diagram. fig. 4·26. · Mainframe Assembly Wiring Diagram. fig. 4·23. 2. PCA's associated with CB malfunction include: · Drive control PCA-A4. Move carriage forward so carriage back flag clears carriage back detector slot. If this cannot be done by setting RUN/STOP switch to RUN from STOP position. disconnect connector A9P3 from PCA-A9 and carefully move carriage by hand. CAUTION: Do not attempt to extend carriage to point where heads are positioned over discs. To release carriage from retracted position momentarily connect ground to brown wired terminal of carriage unlatched solenoid assy. Cause is probably CRB rather than DRDY. ~----I" Remove obstruclion. 7311-13 Figure 4-11. CB LED Indicator Troubleshooting Flowchart 4-21 Troubleshooting NOTES: 1. Refer to the following diagrams for circuit details. · Head Positioning System Functional Diagram. fig. 4-26. · Mainframe Assembly Wiring Diagram, fig. 4·23. 2. PCA's associated with T malfunction include: · Servo PCA·A3. · Drive control PCA-A4. 7925 Refer to head positioning troubleshooting flowchart, fig. 4·20. Refer to CRB troubleshooting flowchart, fig. 4·21. RET signal occurred and CRB signal did not become active within 1.66 sec. Replace PCA-A3. Refer to CRB trouble- > - - - - - - - - - - - - r - - - - - - - - - . t shooting flowchart, fig. 4·21. Neither slew reverse nor emergency retract circuits retract carriage when they should. Place piece of opaque material in carriage back detector slot to block light from photo- +- ~ rans/stor. Again check voltage at terminal with white wire. , 7311-14A 4-22 Figure 4-12. T LED Indicator Troubleshooting Flowchart 7925 Troubleshooting Turn disc drive power·on and set RUN/STOP switch S2 to STOP. NOTES: 1. Refer to the following diagrams for circuit details. · Spindle Rotation System Functional Diagram, fig. 4-25. · Fault Detection System Functional Diagram, fig. 4-29. · Mainframe Assembly Wiring Diagram, fig. 4-23. 2. PCA's associated with door unlocked solenoid malfunction include: · Drive control PCA-A4. · Power and motor regulator PCA-A9. Refer to DRIVE FAULT indicator troubleshooting flowchart, fig. 4-3. Refer to emergency return (CRB) troubleshooting flowchart, fig. 4-21. Replace PCA-A4. Check connector on PCA-A11. Verify operation of RUN/STOP switch. Replace PCA-A9. Replace solenoid assembly. 7311-15(1) Figure 4-13. Door Unlock Solenoid Troubleshooting Flowchart (Sheet 1 of 2) 4-23 Troubleshooting 7925 Disconnect connector P1 from PCA-A9. (Drive power off.) Replace PCA-A9. Replace PCA-A4. Check connector on PCA-A11. Verify operation of RUN/STOP switch. Replace PCA-A9. dJ-l-l---------' 7311-15(2) 4-24 Figure 4-13. Door Unlock Solenoid Troubleshooting Flowchart (Sheet 2 of 2) 7925 Troubleshooting NOTES: 1. Refer to the following diagram for circuit details. · Spindle Rotation System Functional Diagram, fig. 4-25. 2. PCA's associated with DOOR UNLOCKED indicator mal- function include: · Indicator PCA-A11. Refer to door unlocked solenoid trouble- >------+1 shooting flowchart. fig 4-13 Replace lamp. Adjust 56. (Refer to para. 3-5) Check connector attached to PCA-A 11. 1 - - - - - - - , Reinstall connector on PCA-All 7311-16(1) B Figure 4-14. DOOR UNLOCKED Indicator Troubleshooting Flowchart (Sheet 1 of 2) 4-25 Troubleshooting 7925 Set RUN/STOP switch to RUN. Refer to door unlocked solenoid troubleshooting flowchart, fig. 4-13. Replace door locked microswitch 83. (8ee para. 3-5.) No Check wiring from 83 to PCA-A11 for shorts or pinching to casting. 7311-16(2) 4·26 Figure 4-14. DOOR UNLOCKED Indicator Troubleshooting Flowchart (Sheet 2 of 2) 7925 Troubleshooting Troubleshoot + 5 Vdc supply. (See fig. 4·23.1 Replace PCA-A11. NOTES: 1. Refer to the following diagrams for circurt details. · 1/0 Control System Functional Diagram, fig. 4-24 · Mainframe Assembly, fig. 4-23. 2. PCA's associated with unit select indicator malfunction include: · Indicator PCA-A11. Remove operator panel and check UNIT SELECT switch for broken wires Repair wiring to switch 53. Figure 4-15. Unit Select Indicator Troubleshooting Flowchart 4-27 Troubleshooting 7925 Set READ ONLY switch 55 to on. NOTES: 1. Refer to the following diagram for circuit details. · Read/Write System Functional Diagram, fig. 4-28. 2. PCA's associated with READ ONLY indicator malfunction include: · Indicator PCA-A11. Check if READ ONLY indicator lamp is burnt out. Yes Replace lamp. Disconnect connector A11P1 from A11J1 and check continuity between A11 P1-8 (on cable) and ground. Check continuity through switch 55. If ok, repair wiring. Otherwise, replace switch 55. Replace PCA-A11. 7311-18 Figure 4-16. READ ONLY Indicator Troubleshooting Flowchart 7925 Troubleshooting NOTES: 1. Refer to the following diagram for circuit details. · Head Positioning System Functional Diagram, fig. 4-26. 2. PCA's associated with DRIVE READY indicator malfunction include: · Drive control PCA-A4. · Indicator PCA-A 11. After 35 second delay: 14---0 Refer to head positioning, fig. 4·20. Ves Repair wire in main harness between A4P1 and A11P1. 7311-198 Figure 4-17. DRIVE READY Indicator Troubleshooting Flowchart 4-29 Troubleshooting 792'5 Check RUN/STOP switch for proper mechanical/electrical operation. NOTE: Refer to the following diagram for circuit details. · Spindle Rotation System Functional Diagram, fig. 4-25. Replace RUN/STOP switch. Replace PCA-A4 with card extender (without PCA·A4 installed on extender). Check current path from P2-16 on extender to terminal on RUN/STOP switch with wht/yel/blu wire attached (RUN) and from P2-U to terminal with wht/yel/org wire attached (STOP). Refer to DRIVE FAULT indicator troubleshooting flowchart, fig. 4-3. Repair wiring or replace PCA·A?, PCA-A11, or connectors, as necessary. 7311-20 4·30 Figure 4-18. RUN/STOP Switch Troubleshooting Flowchart 7925 Troubleshooting Set power ON/OFF switch to OFF and back to ON. No NOTES: 1. Refer to the following diagram for circu~ details. · Spindle Rotation System Functional Diagram. fig. 4·25. 2. PCA's associated with spindle rotation system malfunctions include: · Drive control PCA-A4. · Spindle logic PCA-AB. · Power and motor regulator PCA-A9. · Encoder PCA-Al0. ---- --1"'-- A_ft_er_3_5_s_ec_o_nd_d_e_laY__:- - - Refer to DRIVE READY indicator troubleshooting flowchart. fig. 4·17. Refer to DOOR UNLOCKED indicator troubleshooting flowchart. fig. 4·14. 7311-21(1)8 Figure 4-19. Spindle Rotation Troubleshooting Flowchart (Sheet 1 of 3) 4-31 Troubleshooting 7925 Replace PCA·A8 and recheck A8P1-J. Replace PCA-A 10. Yes Yes Replace PCA-A9. Yes Replace spindle motor. (Refer to para. 5-24.l 7311-21 (2)8 4-32 Figure 4-19. Spindle Rotation Troubleshooting Flowchart (Sheet 2 of 3) 7925 Troubleshooting 2 Refer to door unlocked indicator troubleshooting flowchart, fig. 4-14. If trouble persists. check operation of pack detector circuit and door closed switch S7. If ok, check associated wiring. Refer to RUN/STOP switch troubleshooting flowchart, fig. 4-18. Check current path from CRB switch terminal with white wire to A4Pl-S. If ok, replace switch. Replace PCA-A4. Check current path between A4P2-1 and A8Pl-J for open circuit. 7311-21(3)A Figure 4-19. Spindle Rotation Troubleshooting Flowchart (Sheet 3 of 3) 4-33 Troubleshooting Yes 7925 NOTES: 1. Refer to the following diagram for circuit details. · Head Positioning System Functional Diagram, fig. 4-26. 2. PCA's associated with head positioning malfunctions include: · I/O sector PCA-A2. · Servo PCA-A3. · Drive control PCA-A4. · Track follower PCA-A5. · Motherboard PCA-A? · Power and motor regulator PCA-A9. Replace PCA-A2. Replace PCA-A2. No Replace PCA-A3. No Replace PCA·A5. No Replace PCA-A9. 7311-22(1 )A 4-34 Figure 4-20. Head Positioning Troubleshooting Flowchart (Sheet 1 of 3) 7925 Troubleshooting Replace PCA-A5. If malfunction remains, replace PCA-A3. If malfunction remains, replace PCA-A4. Check if servo head is disconnected, servo code is missing, or servo head is bad. If malfunction remains, replace PCA-A5. If malfunction remains, replace PCA-A3. Replace PCA-A3. If malfunction remains, replace PCA-A2. If malfunction remains, replace PCA-A5. On carriage solenoid, short top lug to ground. Replace PCA-A9. Spindle is not up to speed. Refer to spindle rotating troubleshooting flowchart, fig. 4-19. Replace/adjust solenoid. Replace PCA-A4. No 7311-22(2)A Figure 4-20. Head Positioning Troubleshooting Flowchart (Sheet 2 of 3) 4-35 Troubleshooting 7925 Check that actuator assy. connector A9P3 IS connected to PCA-A9. No 7311-22(3)A 4-36 Figure 4-20. Head Positioning Troubleshooting Flowchart (Sheet 3 of 3) 7925 Troubleshooting Either IL of T LED indicator lit and heads not retracted. Remove power and check for continuny between A9TP ERV and A9TP LMV. NOTES: 1. Refer to the following diagram for circuit details. · Head Positioning System Functional Diagram, fig. 4-26. 2. PCA's associated with CRB malfunction include: · Power and motor regulator PCA-A9. Replace PCA-A9. Actuator assembly probably jammed. Repair or replace. 7311-23 Figure 4-21. Emergency Return (CRB) Troubleshooting Flowchart 4-37 Troubleshooting 7925 LINE FILTER OPTION 15 ONLY ILI~EI > RE D 'CHOKE: : rrn, RED) IpOWERI r---, L_==-_J [B] 0 I~~--: LINE ~ BRN »WHT-BRNif\...O WHT-BLK BLK I -=- _iNEUTRAL 8 LU ~2o-:W_1H_T_-+oC::)-J""::""::;~H=)---:;~-+-_----I FAN L-1.J 100/120VAC8AS8 220/240 VAC 4A S8 54 GRN CHASSIS 7604-8 Figure 4-22. Power Panel Assembly, Wiring Diagram 4-38 7925 Troubleshooting !I I 11 12 13 14 15 SEE POWER PANEL ASSEMBLY WIRING DIAGRAM I POWER::;;';;;;;G-;;':;:TOR PCA-A. Ir~~~~y--------------------~--I L-_...J T1 TB1 1.5A o---~---...('93 } - - - - - - - I 1 -12V (REGULATED) 928 ~-----------------+---' > - - -. .---+-~~ 0 - - - - 1 - - - - - ( 97 >--_ _+.::,:20;...:..V_--1 6 6 t - - - - -.......- - I J---------------I~+12V (REGULATED) J1 e---~-------------r_-_+_+_-------<54 I I L .-.--+-----+---0'\ 0-=::....:....---1-----( 92 ;.-_ _+_'0_V_--4 1 '1 t - - - - - - - - - - - - - - _ e......---i...--i TI >.---_.--+-+----+--0\0..=-.:.----1----....( ,96 }--_ _+~3(3_V_--oI I 94 )...----~3QV----I I 71 7 +5VRS + 5V (REGULATED) - 24V (REGULATED) .---------+--+---4----{ 90 )--_~Q'_.:.:ND::.:2=___--1 8 8 GNDI (NOTE 5) A9J5 LINEAR MOTOR GROUND LOGIC GROUND (NOTE 6) SPINDLE MOTOR GROUND } +36V -36V MF1 1A TEMPERATURE SWITCH A9S1 BLOWER MOTOR STARTING CAPACITOR NOTES: ,. c = J DENOTES OPERATOR PANEL NOMENCLATURE. C===J Df:NOTES POWER SUPPLY ASSEMBLY NOMENCLATURE CD 2. ENCIRCLED NUMBERS INDICATE WIRING COLOR CODE: AS FOLLOWS: STRAPPING CONFIGURATIONS A COLOR A BC BLACK BROWN RED ORANGE YELLOW GREEN BLUE VIOLET GRAY WHITE 000 111 2 22 3 33 444 555 6 66 7 7 7 888 999 3. - -- ,- FUSE- - . . ~-_ _~ DESCRIPTION F1 for 120 Vac operation 8A, 250V, slo-blo HP PART NO. 2110-0383 F1 for 240 Vac operation 4A, 250V, slo-blo 2110-0365 F2 8A, 250V, slo-blo 2110-0383 F3 8A, 250V, slo-blo 2110-0383 F4 8A, 250V, slo-blo 2110-0383 F5 1.5A, 250V, fast-blo 2110-0043 F6 1.5A, 250V, fast-blo 2110-0043 A9F1 1A,125V, fast-blo 2110-0516 A9F2 O.125A, 125V, fast-blo 2110-0513 F7 20A, 125V, medium-blo 2110-0098 F8 20A, 125V, medium-blo 2110-0098 F9 20A, 125V, medium-blo 2110-0098 'THIS POINT IS NOT AT ZERO POTENTIAL WITH RESPECT TO THE CABINET. THIS POINT IS AT ZERO POTENTIAL WITH RESPECT TO WIRE 928 (TB1-1). 4. TERMINAL BLOCK T81 IS SHOWN CONFIGURED FOR 120 VAC OPERATION. GROUND BLOCK TB2 CONNECTIONS MUST BE MADE AS SHOWN. 6. ONLY GROUND 1 LEAVES POWER AND MOTOR REGULATOR PCA-A9. 7. PARENTHETICALLY NOTED CONNECTOR PIN IDENTIFICATIONS DENOTE SOURCE OR DESTINATION. 8. THE NUMBERS ON THE CONNECTOR A9P1 MAY NOT MATCH THE NUMBERS ON A9J1. THE WIRING COLOR CODE (SEE NOTE 2) AND WIRE SOURCE INFORMATION SHOULD BE USED FOR PROPER CONNECTION TO A9J1. 7311-25E SPINDLE MOTOR A9P4 A9J4 22 SMPH2 I I ·1· SMPH1 51 5 I:'~G~--==-----j---~~ I LATCH 1 SOLENOID L:M~L~ _ r------- I DOOR J----i...----...--( 945 I UNLOCK L ------- OLENOID ASSEMBLY PIO J2P/O P1 (SEE NOTE 8) I SP'NDLE-L~G1C PCA-AS - - , PIO P/O A9J1 A7P1 A~8P1~~ A~8J1 I----'IC....,.0..9.._ _--<'8 >--_ _IC_18~16 16 18 I----P~Ij..;.,.1+_ _--{ 94 PH1 + 15 15 I 171 I----P..;...H:...:..,.1_ - _--{ 95 >--__...:..P.:..;.H1...:..--I S S .....-P_H2_+_ _--< 96 > -_ _PH_2_+~ 14 1'4 15 10 11 :=~P=H~2--,-~=====:::,~----~P=H~-2,--+: ~8~II~8: 16 13 I 24 1 48 46 . . - . . . - - - - - < 918 } - - - - - - I I !----""N2=L=-2_ _--<,923>----...:..C=L=..2--I U U I t--S_PE_N~_--< 928 )--__...:..SP...:..EN~ R R J -SP-S- - - - - { 9 3 5 } - - - - -S-P-S 1 7 7 cs t--S_ _+_ _--< 937 }--_-=S.=.:CS:....-.+--I H H t--s_cs -_ _--< 938 r -_ _SC_S---I F F I +12V 361 +12V -12V GND 5 I I 33 1 6I +5V GND GNO ~~ A8J1 A8P1 T T _ .......1..C.I.7... - - - - - - - - - - - - - - - - - < 92 r -_ _.........- 'AS JJ L L a---:S:.;...PU=___ ---(~ -<904r- 11 11 !---'S_P_D M: M ........,.:.T...:..CC=___ --(9Q8 --{934}- . ENCB 13 13 J - - - - - - { 9 0 1 ) - - - - - - - , N N ENCA 905 } -_ _- - , 10 10 t--E,-IL2_ _-< 9 9 .--E_IL_'- - - { 966 I EIE D5 ID5 4 4 +5V · ____--.:J IF!ACK- -, DETECTOR II ~ --r I I L __ -J RUNISTOP SWITCIj-S2 GND ,A11W1 946 ~. ~ STQiiIA11W3' 948 I I +12~ GND +5V I L1 10 11 · P/D P/O A11Jl AllPl I 8 18 I -:J OPERA~-; IFORMA;:W~-- CONTROL 0 P/O. PIO ; PANEL FORMAT[!] J1,. P11 P/olp/O P11 J11 MOTHERBOARD PCA-A7 REFER TO MOTHERBOARD PCA-A7 SIGNAL DISTRIBUTION TABLE PIO PIO A7P1 A7J1 ----:.I:C::.:.17~ A A AS 3 3 --=$:.;..P~U PIP SP5 E I E --.:..T.=..CC~ S S I J IJ 99 1 I '6 '6 1 1717 '5 1'5 1 '"I's uS2 LIS 1 US0 DL. PIP 948 } 902 } 916 } - 912 }-- -f-f-f- -+_ _......---::...,..,..........,..,.... ~U~S2~+_«948 ~U~S.!._1~_(902 --=u:.::::SO~__{g16 55 6 16 8 18 ..::::...D:::..;L.~P...:.:IP___I H H DOOR CLOSED SWITCH·S7 NC 10 10 11 11 9 I9 717 66 3 3 DU _ SfF SELL 93 } - - - - - - - - f - - - - - - - - - - - - - - - - - 1 7 7 947 }- -f- ......:.:.:RU~N:........t C C 957}- -f- ---:SfOl5"::.:T..::.:0~ 913 91 ~-------+--- i5Ri5YL R R : ...,__"...",...--------:FTI[~L:.:..:TL:.......t T T ~.~ 924>---------+-----1 DOOR LOCKED SWITCH·S6 NC GND 2222 P/O P/o P11 J11 LI· --.JI· 12 13 15 18 19 --1 IFAULTI;D;;'~1;- - ---- +5V ~~) ~~) t5V 11 ~--{ ~~ ~~ ~~ ~R ~~ 1I A4J2 P/OA12P1 P/OA12Jl LF~8_+__M_HF-L------_+_-------:.M:.:.:..H:.;...FL=_t~7 - ,-,65' :::~ WAFL , :::~ : I : I WAFL 5 5 :~::=::;O:RF-=F:....::LL=============:=============:::=:~:.:1 : '-'~2-+-...:..:IL--FL=---------'--1 ~I_LF_L....... 2 2 1 AGFL ~AGFL I L · P/OA12J1 P/OA12P1 +5V 9 9J----- :~ ;-::---..1 'I' :: ........... +5V :: ,:::1-_=:.:. :~. -._=~-_=~-":I ·,6 15 ~+_5V_ _...... 1 .~~ +5V ~ /B / 5.62V TO XMP2-6 PACK CHAMBER INTERLOCK MainframeAssembly 1/0 Conlrol Syslem SpindleRolalionSyslem HeadPosilioningSyslem.. SeclorSensingSyslem Read/WrileSyslem FaultDeleclionSyslem 4-39 4-41 4-43 ..4-45 .4-47 4-49 4-51 16 17 18 Figure 4-23, Mainframe Assembly, Wiring Diagram 4-39/4-40 7925 IP/O I/'OSECTciR'PcA.A2" - - - - - - - - - - - - - - --- --- --- - - -- --- -- - - --- --- --- --- --- --- --- --- -- --p0 L ) > - - - - - - - - - - CPS } ~~~LT ·· ~~~~~~ION I ~~GRAM A . . . - - - - - - - - - -...... READ SEE ,.....-- Pl~ f) SOF - SEE } HEAD POSITIONING SYSTEM DIAGRAM READ READ. SEL READ,wRITE (Bl) WRITE 1 - - - - - - - - 1 . (D3 & C14) r------I. WRITE --t-----~....._t WRITE. SEL (03 & C14) (C3 & 04) , & SECTOR SENSIN, G } (C7 & C9) SYSTEM DIAGRAMS I >-- } r----P-2 ~ 8 SEL ~ ~~~i~;D~/~W~RMITE REQUEST (C5) STATUS 1 - - - - - - -.... ~D~S;~lE5~ REQUEST iDENTITY --+--------------4.- r~~ O I S C O N N E C T - - t - - - - - - - - - - -....- D C N - - - - - - - - - - - - - - - , CO~~~~iiER--+----------.-....- CPS - - - - - - - - - - - - - - 1 - - - - 1 REQUEST FROM CONTROLLER TBUSO-3~ Jl 37,39, 41,43 TAG BUS DECODER SECTOR SEEK 1-- .... Rap · SEL (D3 & C16) SEE HEAD POSITIONING SEEK. SEL (C12 & B12) } (Bll & FAULT DETECTION (A4) SYSTEM DIAGRAMS ['N0oooiiPCA-Ai11 B: --+------------..- ~ ADDRESS RECORD ADDRESS SEE SECTOR SENSING (BB) & FAULT I - - - - - - -.... ADR · SEL DETECTION (B3) & READ/WRITE (C3) SYSTEM DIAGRAMS ADU---------------1I-----, UNIT I JI ~DECIMAL I 1 ~ >--'-_~'D-__ POINT 10 I SEULNEICTT I DISPLAY I I 'STB STB 1 --< 1 SEL, 13 I ,Pl' +5V 1.--<lI STROBE I ECALIBRAT TRANSMIT SECTOR SET OFFSET CLEAR STATUS RCL. SEL } SEE HEAD POSITIONING t-------.... (C12) ~~~~ ~:S~~~T~~~~~~~N SEE SECTOR SENSING XMS. SEL } (B8) & FAULT DETECTION (B3) SYSTEM DIAGRAMS t - - - - - - -....-SOF ----,---------~-~----_- _----~ CLS. SEL (B13 & B14) ~ 15 l' I 16 17 - < I - - - - - - USO tj - < I ------ US1 t - - - - - - - - - - - - - l - - - S E L - - - - - - - - - - - - - - - - - - - - - - + - - - + - - - - - - -....- - - - - - -.. P2 A ~.--+-__t__-..,...-------~:........-~--~:........---_ 1 - < I - - - - - - US2 17 t--P_1 _ _......_ DO-D5 & D7 TO OFFSET MAG,NITUDE &SIGN REGISTERS UNIT I SELECT C SWITCH-S3 I ADU SELECT ,USO FF I COMPARE ------t------I Q SEL 10 I US2 RQI (A4) DCN NDPS (B13) SK II SEd6~t ---c SENSING (PRESENT LOOK = ADDRESSED)-o SYSTEM SECTOR + AHEAD SECTOR DIAGRAM AT{B13) DO 01 D2 ~g-~~CTOR} ._-----::lr'-----. ADDRESS SEE SECTOR SENSING SYSTEM REGISTER DIAGRAM (BB & Bl0) SEE FAULT DETECTION L II (A9).... .... ~~l~i~ READ. SEL (A4) ~:ES~~~~~41 RQP. SEL (B41. SEE D8-Dl0 READ,wRITE TO HEAD ADDRESS } ,SDYIASGTERMAM SYSTEM DIAGRAM (A3 & B3) 7,8,9,10,11, _F' ,H,K,L,M,_'- P:j DO-D9 REGISTER (B3) TO/FROM { CONTROLLER I 7/ 12) 3,4,5,6,7,8,9, ):J..:,.l- . . . c - - - - - - t - - < L 10,21,23,25,27 7311-260 I7 9 10 I 00-010 Troubleshooting 11 12 13 14 15 16 17 NOTE: All D-type flip-flops are clocked on the rising edge of the clock signal. -.J _ +5V D S ~----tC SEEK-ICA ATTENTION FF Q ACRY (B15) -----------------------------1 A , . - - - - ( : l - -.....---I~ AT (C3) CLS. SEL (B4) READIWR~~~ DI~YGSri;~ { (D4) SSEENScINiG~~{ PRESENT SYSTEM - - - - - SECTOR DIAGRAM (B7) ADDRESSED 6 - - - HEAD - - - - - r - - - - - - - -.... _ _ ~g~~ +-_ _f--S~~;~S ILLEGAL HEAD ADDRESS SEE (HEAD> !l) FAULT DETECTION ILLEGAL SEC rOR ADDRESS > ISECTl'n 63) SYSTEM DIAGRAM (B4 & B5) ILLEGAL CYLINDER ADDRESS (CYLINDEIl:- (22) Ofl MULTIPLE SEEK COMMANDS FIRST STATUS {D::: POSITIO~~~g Q I--...:F...F:. S SYSTEM DIAGRAM (B3) POSITlO~~~g { +-STA~US DRDY __-+-__ SYSTEM BIT 1 DIAGRAM (B3) 21 I....-----SEEK CHECK -+_ _--+_S~~_i~S FIRST STATUS - - - - - + - - - + _ S~~_i~S DETE6~~S6E~E { SYSTEM DIAGRAM (C14) FLT---t---+- STATUS BIT 4 . - - - - - - - - - FORMAT ------+----+- STATUS BIT 5 STA TUS/H EAD-SECTOR MULTIPLEXER CLS. SEt (B4) 00 25 READNlR~~~ READ ---+----STATUS D1~Y~ri;~ ONLY BIT 6 (C4) { I....--+-------------------------------SE-C-T-O-R-----~- ATTENTION - - - - - - t - - t - - - S~~_i~S READ. SEL (A4) WRITE. SEL (A4) ')--3-----10 S 'C COMPARE FF ·I ~ al--------<:>--- SECTOR COMPARE - - - - - - t - + - - -STBAITTU8S 1--+-_ _ 2° SEE SECTOR SENSING SYSTEMD lAG RAM (C8) - - COMPARE - - PRESENT _ ADDRESSED SECTOR - SECTOR STATUS .....-----e_--+-+--- BIT 9 W5 STATUS '---+--+---BIT 10, 12 COUNT 817 7920 0 RQS. SEL DRIVE TYPE (A4) STATUS BIT 11 NOTE: STATUS IS OUTPUT UNLESS RQP· SEL ARE ACTIVE. Mainframe Assembly. .. . . . . . . . . .. . . . . . . . . . .. 4-39 I/O Control System 4-41 Spindle Rotation System 4-43 Head Positioning System. . . . . . .. . . . . . . . . .. .. 4-45 Sector Sensing System. . . . . . . . .. . . . . . . .. . 4-47 Read/Write System 4-49 Fault Detection System , 4-51 DO Dl I I I I I I \, · C JJ 00-011 - - - - - - - - - - - - - - - - - - - - - . - . - - - - - - - - - - - - - - - - - - - - - Jo 11, 12 13 14 15 f6 17 Figure 4-24. I/O Control System, Functional Diagram 4·41/4·42 7925 Troubleshooting 3 4 6 8 9 10 11 12 13 14 15 16 17 NOTES: 1. ALL D-TYPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF THE CLOCK SIGNAL. R~~~-----------------------------------------------------.-------------------~ ~~~~~~------------------~~-l 2. SPINDLE MOTOR GROUND (GROUNDS 3 AND 4). I PI) P ) VLlM ) 11) J 1 A T I r;-D~;PC;:.A"i11 IDRlvE'CONTRO'lPCA-M-----------------------------l 1 I I I I ! Lf>-""'-'- ,@Ul T 1 .. I DOOR LOCKED I I SWITCH-S6 Cn:-::------D-U---)~ 3II' II II ~~~ SPINRDUL~ IIIIIIII IIIII <i ± --- ~ T C+ ~OMPARAT~ OR .~~TP- rif,...,....-tr ~ 1~ : 1 "". --t>i IIII 1 IIII B > - - - -.......--.... +12V 4~+5V I: 2' I 1 I __- - - . , J l - ( 18 ~_D_L_e_P_IP DOSOR CLOSED WITCH-S7 NO)c -< NC SEE FAULT { DETE.CTION TOF SYSTEM DlAG RAM ILF ~--t- ---L (B9) M f--Pr-2_e_------+------------1I--------D-L-e-P-IP-t I SEE HEAD ~-------+--+-""'-+---fD-L -e -PIP-" POSITIONING (C3) & FAULT DETECTION (Al0) ~{ RUN SYSTEMrnAGRAMS 11 ( RUN I I (16 t--ir---""""OI DIAGRAM (D7) RUN I II I ~~ 0 1 9 ( SfOP STOP (~I F::~;:;;:T~:~ ~) < DE~;t;OR L...--C-U-RC.~~~~ ~ ~~::C~~:7) @ < J - - " o " ~~~:;:~~I~?,:E~R '¥" ! f ~~----. ~ +~V SEE HEAD { IfR;E~l L - - - J I ~~S~~~O~~~~6~~6~ DIAG~~~O~ iI II - --- DIF'i::~~:~~ T I ? ~ 1 II } I C 11~+5V DETECTORJ3 CBS SYSTEMDIAG~~~~ STOP I CRB Pl 2.25 MHz OSCILLATOR SYSTEM FF ENCODER "0" P2 ~ 1 )>-------« IJ PULSES (540 Hz @2700RPM) 1 I ~ +5V Ispul ~ I Jt. GREEN { .. SPU I;) I SPU ( L I I IL-~~~ -.-.Jj,~~-l----------------~SlIIs~~----------~~ IIII III +,_Jl--==~-T~C-H ~~~A I~~ ~~~ ~~r~l~I ~ 1 1 ,III )~I)+----6-----~---- 2 ~ XTAL - +4168 COUNTER 122kHzI 22 kHz TRIANGLE WAVE r---O--- GENERATOR Mainframe Assembly I/OControISystem.. Spindle Rotation System Head Positioning System Sector Sensing System. Read/Write System . . Fault Detection System 4·39 4-41 4-43 4-45 4-47 4-49 4-51 )1)------1540Hzl IPHTASEI ..._ _....... ISCCI ~DI:~~E~~~~~R ~0~1----------~--C. ~-~BUFFEMI~R~ =~~ LIMITER ~ O--~ DIFFERENTIAL AMPLIFIER COMPARATOR , I~' ~~-~-~Vl·~~-----~-~-----------------~ "I" SHIFT R;GHT 11--------, RE FERENCE ~~~~ ( ~IENCpl r----U-N-I-TY-G-A-IN--+---T --IDIIA :: L INVERTING A~ MPLIFIER --- RS ~~_AM~P~UFI~ ERv~ ~~---~IV-~-----~~-----------------~ :: ~~~~ DETECTOR ~ D RQ SPS ---+-----IC (CIa) ~7 A ~ I S M C I e - - - - 0 . . . L sCS+ ./ . (813) I I ' IOFF II . SPS OR ANGE :S +5V DETECTOR _ R Q J - ~Q D - r-Tf---' \\ C --<I p'HASEB _. "1" =CW ROTATION "0" = CCW ROTA~ BOTH MOTOR T= r--- -- PHASE 1 CURRENT LIMIT LATCH S Q ---0-- - )""'" '- -----I I PH1+ I ._= -----tt--+---~ +---I~ - ~ - IPH1-1 T --..... r _ _+-__+4~_~~ - - )-", "0"= POSITIVE MOTOR PHASE~HrnrrED - ~ B B +5V II // ISPF~t~~RED ~l ~~~ ~~~,~~ SYSTEM DIAGRAM = (04) ~.-- -- r - 1 ~ " IPH2+1 I -- c:: I -V- IPH2-1 · ~~ ~- -':'"""'.\ A. Br-----"- - -- ~ "iT,-J ) CLl , 1~ / 7· I" / I M ~ r-- ' -}SESDYEESTFTEAECMUTILOTN DIAGRAM I (A7) +36VS ) 15 ) PH1+ ;) 18 ")-t--o( > - - - - - - + - - - - - - - ' II ).S) PH1- e~ I P1l1- 17 1 -36VS - ......-----' -36VS B3~E~g~T RESISTORR NOTE 2 SMAHl SCSl scs+ (C9) H) ~ SCS- (C9) I F) ~ ) I I scs+ SCSSPEN ) 44 el SMCG I SPINDLE MOTOR CURRENT SAMPLING 1I RESISTOR 46 )+----6-------------------. ~) I 4 7 2i ' I ~ Er 1! 0~ S~E~E~~F~A~UJLOTN DIAGRAMlC3JI el pH2+1 PH2+ I )M) / '17 ) PH2- I ) 15 I1 .1 PH2-] 1 +36VS NOTE 2 PSF SMAH2 +36VS --"""'----. +36 VOLT BLEEDER RESISTOR 1V L - I . SHUNT I REGULATOR REGULATOR PROTECTION CIRCUIT REGULATOR A B C SEE FAULT PSF DETECTION SYSTEM I } DIAGRAM I I SPD /1 15 )>---r------« 11 " ~~ Q Deer __, ~, / u) i' ') CL2 VLlM+ )~.13 PROTECTION CIRCUIT ~ ~-~ DOOR UNLOCK SOLENOID f~~l P/O PMR PCA-A9 Jl II D II I 41>>D-S-OL-~'7\ I 45 Jl --T-- L ~ 1 3) +10V ;) 7 L__ J l1_0V I 22 )>-P-SF------« N II 4;) iJ5 (~J (; II L (D5) STOP CRB SPD · · II I I II ~I IL C f----4 ~ ------------------+---------------------------- i .- I---------------------~T------...n--u--~ £ II ~ ENCODER PULSE tGENERATOR ~~~ ~-o - - IENCA1T ~ ENC8! _ !/ K 7 10 I :)7) I I' J )IN ~:) 13 -~ I7, ~I ~ ~ - - - - - - 36 VS ~~----' ------ - ~ - - - - ~ SHUNT REGULATOR _ ~, ~ENL-CB---------------------":-::"-T~-O~ ---~ ENCA I rg;) --<>--------~ +36VS NOTE: SHUNTS BETWEEN I -- -- -- -- - -- -- -- - -- --. -- - - - - -- - --J D 3 4 6 8 9 10 11 12 13 14 15 16 17 7311-27C Figure 4-25. Spindle Rotation System, Functional Diagram 4-43/4-44 7925 Troubleshooting 8 10 11 12 13 14 15 16 17 18 ____ --, [>0 r- -- -- -- - r----------------------------------------------------------- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7 5~)Jl - - ~;;~T~E~T;M;;;:;;-- -- -- -- -- -- -- -- J1 I (49 f-(_ _C_SO_L CARRIAGE UNLATCHED SOLENOID --1Q-- +10V A C p;-1 6791011r;:-R~A~---- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - )~~~ · FROM ;C;:;:::;;111 < 'I INDICATOR _--CAY-LINDD-ERD-R-E-SS-------------------------------- DO-D9--_--1~-------------+-_+----H-,' J_,K'_,_L'"",,<M '1 --. P1 I DRIVE READY F~~~----------------------------------l I ((\\ J1- I 1+12V~7 ")--D_R_D_Y_L_+-----<;8 P1 ---I L _ _ CONTROLLER - - : ! J 1 3,5,6,~~8~9~1_~(L, 21,23,25,27 F-- -- --- ---c-{>--- -- I!OSECTOR PCA-A2 J1Y _ ,~ CONTROL BUS _ 00-09 10 K - , 7 8 9 1 0 1 1 F'ri L'M' P1 ' ,,, I) :I SEE I/O CONTROL (B, 10) -READ!WRITE (D6), & } FAULT DETECTION (B9) SYSTEM DIAGRAM ACRY SEE DRDY }~O CONTROL(B14)&(B15) FAULT DETECTION (B8) SYSTEM DIAGRAMS I ACRY SEE I/O CONTROL DRIVE READY FF P2 ~--------~ 58 17 >--+---+-------"""< CYLINDER ADDRESS 10 ~ ~ ILLEGAL DCAYEL~I~N~~D~ESRR ,/10 CYLINDER PULSE GENERATOR FINE POSITION ICA..-. SR ] "' -- J CLoCK _ICYL I. ,~ I') F S~)1 MATCH 1 - - - - 0 - -. . . MATCH -1 -- (C7) I ~DLN6E~W~~: p£!:5AR LOGIC , 10 I_ _ ·~ MATCH (C7) I CYL R E G I S T E "R ' - -" - - - - - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -P2../.,.1. 1 ~ (B7) "",4 10.... CYLINDER CO~~~~~~SOR I----+_t--P.O...SITIVE 10 ",'" DIRECTION CORRECTION ~ DIGITAL TO ANALOG CONVERTER DIFFERENCE IANALOG SWITCH 1 PRESENT NEW ( "1" =CYLINDER < CYLINDER ADDRESS ADD RESS VELOCITY CURVE GENERATOR ~0rv~ cl .A. L>f ~[ill ~~ig~~ I ~_o------P'T"11)'" ~8 ) DWA · 1.1 - ~~o------"""""I~) 13 ~ k I ~~o--------a.~/ 12 ~ DWC I SEE I/O CONTROL II SYSTEM DIAGRAM (B4) SEEK H P2 SYSTEM Q I DIAGRAM (B10) I 1 ~ ; }SEE FAULT SK > - - - - - + - -.....--< 12 ~ I SK DETECTION SYSTEM ....0..._RD_.Y..--I Q R I DIAGRAM I 1 (A8) 1 I AGC P1 ~--.JI---------------------+-----~17 D -. . . .- - - - - - - - u - - - _ + _ - - - - . ; . . . ~U AGC 16 /P1 "I I I I I I I U~~ TRACK CENTER DETECTOR ITCDle-- () -Jr lSi< -4'"'_~lcK..._.....01...._ .C..L.EAR PRESENT r--- 0 S Qt-------j~_~.J r-L--/ CYLINDER J FIRST ~g~~~~~ CLOCK - INHIBIT FF DISABLE UP/ON "1"= ON "0" = UP PRESENT NEW "0" = CYLINDER ~ CYLINDER ADDRESS ADDRESS - + ....- ........ UNITY GAIN INVERTING AMPLIFIER I @fJ, TACHOMETER BUFFER II ~--.J ANALOGJL<...----..,P21""",~ TAC --lSWI~H ./ IL SET OFFSET SOF · SEL SEL -....----- fl--- P1 T SOF I >-------iI---4.---+---< N ---l I I I SEE FAULT AGF CBF NOTES: 1. RELAY SHOWN IN THE DE-ENERGIZED POSITION. 2. PROPER POSITION OF PMR JUMPER SHOWN BELOW. DETECTION II SYSTEM DIAGRAM (89) ILF DWF TOF SERVO ENABLE FF Q ......- -....... _ II FROM~ 2 ./P2 MATCt+SKI (C7) ~ 1!4 TRACK DETECTED ---.. MATCH-l'~' (Ala) MATCH +SKI (C7) ..!.. SB (B6) '--4--------------+-------------+--+......t.~---------------;r-)~16 LSB D$U I -.. , V ~/...P. ~1~-+-+_ "POS .. .---------_+ _- ~_ U_ -- -- -- -- -- -- -- __ _~t~~;~~L COMPENSATION t - - - - t - - - - - i l - - - - - - - - - - i l - - - - - - + - - - - - - - - - - - - - - - I II ANALOG SWITCH II ~ ~-;;<t' f'~--_ _ _ , SUMMING AMPLIFIER MATC~H SKH--. MATCH+SKI~--n \ ......-----+-----~ 14 ) - f - - - - - - - - - - - - - - - - - - - - - - . . t +36V I I LMV I LINEAR MOTOR POWER AMPLIFIER SEE NOTE 1 · T J3 LMV r AcTU~OR .., I I ASSEMBLY SEE FAULT DETECTION SYSTEM DIAGRAM SEE READ! WRITE SYSTEM DIAGRAM (09) ~---~20 I I I I -36V I LMC 3 r------------------ I LINEAR MOTOR flELAY 1-----+12V . 1 I MOTOR LMC CURRENT SAMPLE I L RESISTOR +10V +36V I RETRACT TIMER PROGRAMMABLE VOLTAGE REGULATOR IJ1 1-----< 28 CRB f - - - - - -....- - - - - - " I SERVO CODE _--------~ 22 LI ., PSF I _ SEE NOTE 2 o 7920 ,-"p 7925 JI --W41 ---- CRB TAC r--;2--T~~O;PC~- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - TAC -- --- -- -- -- -- --,-- -- -- -- -- -- -- -- -- -- - 113 16 I SEE SECTOR SENSING SYSTEM II DIAGRAM (B5) +~ ~r-I . ·6 P2 53,760'" /REV WINDOW GENERATOR .;-8 COUNTER LPOHCAKSEED 6720'" /REV SERVO HEAD SIGNAL FILTER DIFFERENTIAL P2 . . . - - - - - PREAMPLIFIER STAGE I FIXED GAIN DIFFERENTIAL AMPLIFIER VARIABLE GAIN DIFFERENTIAL AMPLIFIER I I AGC I , COMPARATOR LOOP REF : <l=------.---------------+-4-------------;--;-------S;.~~O - __ -J .....-----~ 16 #( P-1 -..-------<0\--------------- -5V REF r - - PHA::MS~II~T~:BLE------, - -12V REF + PEAK A C I SEE SPINDLE I ROTATION SYSTEM DIAGRAM LI DL. PIP (B4) SPU (C5) STOP (C4) SEE FAULT{ DI~~~;~ DE,TEC..T.10. N,. . TOF ILF -(B-9) R Q SEN { SEE FAULT DETECTION SYSTEM DIAGRAM ~7 PSF I I (D5)-----r7 N I CRB (B7) I IS P2 I ~--------------------------~ 13 ~ /P2 13 " I (A 10) SKI_ MATCH + SK I (C6 & C9) 4> C "'-----------~ +-A-SGKCI --~---...-. ~-(MB-A8T&C-HB9+)_SKI~LVIrIr D S R Q Q ~HS-~EE~-KE-o T (C12) SKI _ RET ~ SKH SKH ' r-------R-ET-ar-----....' -~ J--. =--..,/ SKH · AGC _ J RET - . I (C7) _ ......- - t _ I t - - - - - - - ' +6V r7l ( -.L!..J SKI SKH · AGC ,~ 1'::/ + SLEW (FORWAR:D@3.5IPS),ANALOG() SWITCH C7 [ill _ SLEW -6V (REVERSE@3.5IPSI LI NEAR MOTOR CURRENT COMMAND AMPLIFIER · CURRENT COMMAND T~ LIMITER II) 1 CC OUTPUT SUMMING AMPLI FI ER r--+----.-----(. 18 ~~----........,~------'l" -PEAK +5V REF I POSITIVE PEAK DETECTOR....., DUAL ANALOG SWITCH I I, /I LN " SKH ...--.. ~ '- SK J - COF I ,W ~u AGC .- SRH I~ I '" ) ./ IS J }SEE FAULT AGCF.. DETECTION SYSTEM DIAGRAM (A7) OFFSET MAGNITUDE REGISTER 6 MAGNITUDE CLEAR DIGITAL TO ANALOG CONVERTER UNITY GAIN INVERTING AMPLIFIER "1" = ODD CYLINDERS "0" = EVEN CYLINDERS Uf----I----+---__e Mainframe Assembly 4-39 D CRB OFFSET MAGNITUDE POS AND SIGN '--------------------------------------DO~::& D7-------l......----------------------------------------- AGC COF --:~:;.;~;.~;.D5:.::&.:D:.:.7 ~~"-------------- CRB pas AGC COF ~..;.~_-~..;5..;&~D..;.7 I : .........__ T . ~-+--- . 7,9,10,11, ..... CLEAR ~ J~ J L M 1 07 OFFSET SIGN REGISTER ___' L -- -- -- -- - NEGATIVE POSITIVE ---- ------- -- -- -- -- I/O Control System. 4-41 Spindle Rotation System 4-43 D Head Positioning System 4-45 Sector Sensing System 4-47 Read/Write System . . 4-49 _ _ _ _ _ _ _ _ _ _ _ _ --.J Fault Detection System 4·51 7311-280 6 8 10 11 12 13 14 15 16 18 Figure 4-26. Head Positioning System, Functional Diagram 4-45/4-46 7925 Troubleshooting 10 -----1 A ADDRESSED SECTOR I C ,----, I ACTUATOR I ASSEMBLY L __ ---l TEST POINT PRE REF 7920 0 W5 7925 6-- ID~~~~-----------------------------------~ SECTOR COUNT DECODER I I I DIFFERENTIAL PREAMPLIFIER STAGE ~----.~, WINDOW GENERATOR I FIXED GAIN ,~ DIFFERENTIAL AMPLIFIER PHASE ~.8 COUNTER II 07925-60005 ONLY I I ,r~ scL1 >-_ -< L--__-+-__ S~~ci~ - - - - - « 1,3 LOW-PASS FILTER II e I 1 I : ,IIII:: w L AGe} SEE HEAD POSITIONING SYSTEM DIAGRAM IIL _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __.-~---I1I y3:I :1~~ (C18) SERVO HEAD SIGNAL FILTER LOCKED P21 LOOP 1--_f--------4--4.....,..4· 6 SCL ....- - - - . . I, I I 3)- INDEX DETECTOR IP \ - I' IP Pl v~C~P 6 ~(...~.. -2------Io---- .... 53,760 "'/llt:V 2.42 Mill I I ~IIER INDEX PULSE I I SECTOR COUNT SECTOR· 63 1I tNDEX PATTERN I 0* 1 "I SE~ORO I I/O SECTOR PCA-A2 JUMPER LOCATIONS E:!l . W5 L!TII!O!..!..!..!.-!I II:Z:Il m C'::: :5'1:';:::9:J~~!~ ,=JUMPERS. : --< I" SEE FAULT I DETESCYTS.TIOENM, DIAGRAM } I lBB) r - NDPS I _J D L'! .-- q ' · · ~ .·cy:. 0····tt. -_ [;:::::.5"C.;.;::.:;:5 .... ..-- C::::::~'i::'::::51::::::,:5" " ...--- [:::::3'p,,c:::3' ... I I I IL 1120 (7920)/840 (7925) LOOK- AHEAD COMPARATOR +5V 1088(7920)/ 817 (7925) I/O CONTRSO EL E{ ~ /6 SYSTEM ~ DIAGRAM (A15) pn LOOK-AHEAD JUMPERS (0-+ 15) IN = "0" OUT="1" ;CLOtK SECTOR COUNTER PRESENT SECTOR I -__.c--......- SECTOR -----L-"'7I'----I~ COMPARATOR SEE I/O CONTROL SYSTEM DIAGRAM (84 & C4) SECTOR ADDRESS CHECK COMPARE PRESENT SECTOR = ADDRESSED SECTOR SEE {READ. SEL I/O CONTROL SYSTEM· DIAGRAM (A4) WRITE. SEL D J C [£] W6 I/O CONTRSOEL,E{AT · SYSTEM DIAGRAM HOI (C31 I STROBE SEE I/O CONTROL II TO UNIT (IDENTITY LOGIC) SYSTEM DIAGRAM (C21 I ADDRESSED SECTOR SECTOR COMPARE FF Q SC ,W SEE I/O CONTROL SYSTEM DIAGRAM (A4) I I ..- ~/-6-- ~~~T~E~S 7 DO-D5 SECTOR ----.~ COMPARE (STATUS BIT 8) I I SEE I I/O CONTROL SYSTEM DIAGRAM (C15 & C4) I I I I I 1=D II >- READ- f------------rP2~) K URG -----. WRITE--=D )1 9 )-UWG- SEE READIWRITE SYSTEM DIAGRAM (D5) , _ _________ ---lI D *0 FOR AN HP 13356A DISC PACK 1 FOR AN HP 13357 CE DISC PACK (.::.:.:.:.:.:5..E::::!cJ ::3l!::c!l :J ·cr·c:J 0·· :- MUST BE IN PLACE FOR PROPER OPI:IIATION ~ ~ W . 4 ·· · · · · W.6 ~ ~ ENABLE DISABLE RPS R.PS ._ Mainframe Assembly . I/O Control System. . Spindle Rotation System Head Positioning System Sector Sensing System . ReadlWrite System . . Fault Detection System 4-39 4-41 4-43 4-45 4-47 4-49 4-51 SECTOR SENSING SYSTEM TIMING DIAGRAM 7311-29C 10 Figure 4-27. Sector Sensing System, Functional Diagram 4-47/4-48 7925 A C o 7311-30C DATA TO/FROM CONTROLLER { DATA SELECT 10 11 12 13 Troubleshooting 14 SEL (C6) A URG (D7) LOW-PASS FILTER ZERO CROSSING DETECTOR WEN CYLINDER 0 127 128 255 256 383 384 511 512 639 640 767 768 822 ... ~<¥ .....,.., DWA 29 0 0 0 0 1 1 1 DWB 28 0 0 1 1 0 0 1 DWC 27 0 1 0 1 0 1 0 DECREASE IN WRITE CURRENT (mAPEAK) 0 2.1 4.2 6.3 8.4 10.5 12.6 AC WRITE CURRENT DETECTOR :- MULTIPLE HEADS :: SELECTED DETECTOR = / > - ACW ----. / SEE FAULT DETECTION SYSTEM DIAGRAM (C8) DATA AGC CIRCUIT WRITE (07) c > - DCW ---. NOTE: All D-Type flip-flops are clocked on the rising edge of the clock signal. o Mainframe Assembly . 4-39 I/O Control System. . 4-41 Spindle Rotation System 4-43 Head Positioning System 4-45 Sector Sensing System . 4-47 Read/Write System . . 4-49 Fault Detection System 4-51 10 11 12 13 14 Figure 4-28. Read/Write System, Functional Diagram 4·49/4·50 7925 Troubleshooting 2 3 4 5 6 8 9 10 11 12 13 14 A B C-;V;:J rT=~ FOLLOWER I I I I I PCA-A5 PA p!-~-i JRJ I L17- U ..J ,PREAMPLIFIER 1 PCA-A6 I I L 15 - S ..J r=~ CHAMBER ASSEMBLY I 1-7-8 r L__ ! IC05flCI6 IC_0__ 6 _ ICI9 ... ~~~~----------------------------------I SEE I/O CONTROL SYSTEM DIAGRAM (B4 & D5) SEE I/O CONTROL SYSTEM DIAGRAM SEEKe(~~~ SK P2 CPS (A6)-~~--+-------------------~1""""'+ ILLEGAL RCLe SE L ----+---+--......---~ (84) CONTROL, BUS 3 HEAD ADDRESS FF CARRY D J QI---------+----, ACRY C 4 CONSTANT ( = 7 for 7925) CONTROL BUS CARRY 4 ILLEGAL HEAD ADDRESS (HEAD> 8) I D Q ~--+--IL-L-E-G-A-L----lIII...-' SEE I/O CONTROL SYSTEM DIAGRAM (B14) ~ SEEK CHECK (STATUS BIT 2) CONSTANT (=192 for 7925) AD R - SE L-------4~-~ XMS - SE L - - - - - - L . - . , C SECTOR ILLEGAL ADDRESS CYLINDER ADDRESS (SECTOR> 63) " - (CYLINDER> 822) OR MULTIPLE SEEK COMMANDS SEE I/O CONTROL SYSTEM DIAGRAM ~(BI 6) I--_ _p..:...~) I ! I_C1_2-e 14 . .P_1 ..._ .. P2 N >-.... r------ -- --- ---- -- -------- -- ---- -- ---- ------ -------- - ---- ---< SEESPINDL.E{ ROTATION TCC V f--P_1 -------------------------------------------t SYSTEM DIAGR~M S_K (_A-1io4_) -< 1'2 ~P-2-------------------------------------------------- ..., TCC (135 Hz) I CPS L I R FLT I I H ISERV~-;;- - P2 N I - - ----- - - ~=O;;;N;:;;1 SK I (08) SYSTEM DIAGRAM I ~ SKH AGC AGC FAULT FF S Q 1----4I.-- A_G_F~ C8F II ILLEGAL CYLINDER ADDRESS DETECTOR ICA ICA I I SEE HEAD POSITIONING SYSTEM DIAGRAM (83) ~ NDPS --t-_.----t R SEE SPINDLE{ ILF ROTATION ILF DWF (B3) & HEAD pas IT Ia NIN G TO F <4--+---+--+-_e_T-O-F... (C3, C4) ~ CARRIAGE BACK SYSTEM ILCYLINDER ADDRESS DO D9 - PI --------- -- - 17,8,9,10,11, J F,H,K,l,M 'yf~,7,9,10,11, »- ~/'--1-0-- H,J,K,L,M F- .J::!:::I 'if '" 15 - S- - I __ -.-J~ 11 SEE HEAD { POSITIONING DIAGRAM (C5) I DRDY CR8 ---< S ~-PI------+------+---""----~ FAULT FF DIAGRAMS S QI---I----------. ISEE I/O CONTROL (811), SECTOR SENSING (C5) & READ;WRITE (86) 1SYSTEM DIAGRAMS ~ CRB (812) R DPS SEE SPINDLE DL - PIP (B4) ROTATION SPU SYSTEM (C5) DIAGRAM STOP _ (C4) RH RET RET '---\;----/ SEE I/O CONTROL SYSTEM DIAGRAM (C9) ACRY-~~-,. (C9) TIMEOUT CYCLE FF INITIATE 120 ms SK S Q TIMEOUT CYCLE INITIATE 1667 ms R Q TIMEOUT CYCLE ACRY DPS RET - CR8 ACRY I 6 I CYL 11 >-----------------+----l~-----' I P2 D NDPS ILFL TOFl TIMEOUT CLOCK COUNTER RESET COUNT 16 120 ms COUNT 224 1667 ms CANCEL TIMEOUT ---~ A 8 -24V I IL __ RP~ ACRY .:. _ _ - I P1 _ _ }SEE HEAD ~..........- - - - - - - - f - - + - - - - - - f ! - -......-ACRY .POSITION ING D>------------------I..----+-----------I I P1 J -.J - __ IC03/ICI4 SEE READ;W~ITE SYSTEM DlAG RAM URG I P2 (D7) ---< K I ACW---< P1 (C12) K I DCW ---< J SYSTEM DIAGRAM (B3) ACRY (B12) (D12) I -1-- ~~A~G~F ~ L ~ - ---------WFLT + - - - ---------- + ~1---------------- ----------------------~ --- ---1- -~ 6 -l - 2 - - --n 3- - - ~ c D ~~~~-------------------l 421 POWE- R AN- D M- OTO- R RE- GU- LATO,R P- CA-A- 9 --. J1 I~ I +12V I I 12.1K I +36V 4.64K TEMPERATURE SWITCH - A9S1 OPENS AT II 72.8 ± 2.8°C (163 ± 5°F) CLOSES AT I 64.4 ± 3.4° C (148 ± 6°F) I I EIL2 P1 1K 10 '---\r-' 1.94K SEE SPINDLE ROTATION SYSTEM DIAGRAM +5V (C14) +5V EIL1 ICO,8 9 ......- -........~, T I IL-36V 4.64K II I..< J1 9 ~----I-C0-9/-IC-I8-e:< 16 ~I IL +5V 10K @:gJ ~I CURRENT LIMIT LATCH 1 R '--V-J SEE SPINDLE ROTATION SYSTEM DIAGRAM (B13) CURRENT LIMIT LATCH 2 · ICL21 >-- 8 CL1 (A14) >-- U CL2 (D14) I >-- 7 SPS JI (D14) IC02/ICI3 MHS ---< l -- - -- -- -- -- -- -- - _-1-- ~ FDRIVE CONTROL PCA-A4 61.9K 16 - - - - - - - P1 ~ .-J I P2 31.6K WRITE W-AR W-AR FAULT FF S SEE READ;WRITE SYSTEM DlAG RAM (B7) ~ NDPS ~------I--------------I------+--------IR Q 1---.........;W,;.;,R.;.;.F..;;L I I ~+___+_----.J2r_< 4 ~ WRF L +10 VDC-< 6 26.1K SEE MAINFRAME ASSEMBLY WIRING DIAGRAM SEE SPINDLE ROTATION +5V4~ 5 I P1 q.+5V ,I : +12V ---<3,C~+12V I: -12V~2,B~-12V I I +12V 5.11K +12V 6.81K +12V 13.3K +5 VDC ILF SEE READ;WRITE {WRITE r - - - - - - - - + - - + -__I---+---+~ SYSTEM DIAGRAM (C7) WRITE URG WRITE R -W R-W FAULT FF W- AC FAULT FF RWFL < RWFL SYSTEM DIAGRAM I I SEE SPINDLE { I ROTATION (D3) 5.62K SEE SPINDLE { ROTATION SYSTEM DIAGRAM RUN ~..-.---~---, (B4) ONE SHOT <5 WAFl DWF & HEAD POSITIONING (C5) SYSTEM DIAGRAMS PSF,-< N I L T 6.8tl F V +5 VDC ~------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ J8 ~ MHFL ~L~I~R-;;;;:-A:;- - I IWeAR I;; ® ) 4) J 1 >5V +5V I II ~I ) 7) (V;;\'1 I I I IW - AC I~ ) 5) \~ CI 1-5V +5V 15V +5V I I ~~ I /'1 L ® ) 8) 15V +5V -- --l I IAGC III ® <J1 AGFL ~\~ :I9I :, I iI 'I < C8FL 6 r - - - - -..... I ®[!g II ~ I <I : 2 ~-I-LF- L ------ iI ®[D~ I!< /1 : I ~I ~-TO-F-L---------I ~ FLT (STATUS 81T 4) I C SEE I/O CONTROL SYSTEM DIAGRAM (B15) Mainframe Assembly . I/O Control System. . Spindle Rotation System Head Positioning System Sector Sensing System . Read/Write System . . Fault Detection System 4-39 4-41 D 4-43 4-45 4-47 4-49 4-51 NOTE: ALL D-TYPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF THE CLOCK SIGNAL. 7311-31 D 4 6 8 9 10 11 12 13 14 Figure 4-29. Fault Detection System, Functional Diagram 4-51/4-52 7925 SIGNAL MNEMONIC DEFINITION ACRY "Not" Access Ready ACW AC Write (Current Sense) AGC Automatic Gain Control AGCF "Not" AGC Fault AGFL "Not" AGC Fault LED ATT Attention BHSO Buttered Head Select Bit 0 BHS1 BHS2 Buffered Head Select Bit 1 Buffered Head Select Bit 2 BHS3 Buffered Head Select Bit 3 Spare CBFL "Not" Carriage Back Fault LED CBS Carriage Back Supply CBUSO "Not" Control Bus Bit 0 CBUS1 "Not" Control Bus Bit 1 CBUS2 "Not" Control Bus Bit 2 A1 HEAD ALIGNMENT PCA XA1P1 XA1P2 A2 I/O SECTOR PCA XA2P1 XA2P2 J1 N J 24 A3 SERVO PCA XA3P1 XA3P2 Troubleshooting Table 4-4. Motherboard PCA-A7 Signal Distribution List A4 DRIVE CONTROL PCA A5 TRACK FOLLOWER PCA A6 R/W PREAMPLIFIER PCA A7 MOTHERBOARD PCA XA4P2 J1 J2 XA5P1 XA5P2 XA6P1 J1 J2 J3 COMMENTS Exits A4P1-N to DSU and A2J1-24 to controller. K 16 17 s To Fault Indicator PCA pin A12J1-1. E 2 c 3 J To Fault Indicator PCA pin A12J1-6. To Carriage Back Detector. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. DENOTES SIGNAL SOURCE DENOTES BIDIRECTIONAL SIGNAL 4-53 SIGNAL MNEMONIC DEFINITION CBUS3 CBUS4 "Not" Control Bus Bit 3 "Not" Control Bus Bit 4 CBUS5 "Not" Control Bus Bit 5 CBUS6 "Not" Control Bus Bit 6 CBUS7 "Not" Control Bus Bit 7 CBUSa "Not" Control Bus Bit 8 CBUS9 "Not" Control Bus Bit 9 CBUS10 "Not" Control Bus Bit 1.0 CC Current Command CEP "Not" CE Pack Installed CLA "Not" Clear Attention COF "Not" Clear Offset CPS "Not" Controller Preset CRB Carriage Back CYL Set Cylinder DO Internal Control Bus Bit 0 DENOTES SIGNAL SOURCE Al HEAD ALIGNMENT PCA XA1Pl XA1P2 A2 I/O SECTOR PCA XA2P1 XA2P2 V 11 DENOTES BIDIRECTIONAL SIGNAL A3 SERVO PCA XA3P1 XA3P2 Troubleshooting Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A4 DRIVE CONTROL PCA XA4P1 XA4P2 Jl J2 AS TRACK FOLLOWER PCA XASPl XASP2 A6 RM PREAMPLIFIER PCA XA6Pl A7 MOTHERBOARD PeA Jl J2 J3 COMMENTS Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. Two-way control bus to and from controller. To Power and Motor Regulator PeA pin 4 A9Jl-14. 5 R S 11 11 U 11 From Carriage Back Detector. Also. to Power and Motor Regulator peA pin A9J1-28. 4-54 7925 7925 SIGNAL MNEMONIC DEFINITION 01 Internal Control Bus Bit 1 02 03 04 05 06 07 08 09 010 DATA DATA DCW DDB DGC Internal Control Bus Bit 2 Internal Control Bus Bit 3 Internal Control Bus Bit 4 Internal Control Bus Bit 5 Internal Control Bus Bit 6 Internal Control Bus Bit 7 Internal Control Bus Bit 8 Internal Control Bus Bit 9 Internal Control Bus Bit 10 Data "Nor' Data DC Write (Current Sense) Differential Data Bus "Not" Differential Data Bus Data AGC DENOTES SIGNAL SOURCE A1 HEAD ALIGNMENT PCA XA1P1 XA1P2 A2 I/O SECTOR PCA XA2P2 J1 A3 A4 SERVO PCA DRIVE CONTROL PCA XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 L Troubleshooting AS TRACK FOLLOWER PCA XASP1 XASP2 A6 R/W PREAMPLIFIER peA XA6P1 Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS L M M 10 10 9 9 7 7 K K* J J H H* 6 "Not Used. "Not Used. "Not Used. Two-way data bus to and from controller. Two-way data bus to and from controller. L 10 DENOTES BIDIRECTIONAL SIGNAL H 4-55 SIGNAL MNEMONIC DEFINITION OLe PIP Door Locked and Pack In Place "Not" Destructive Preset DRDY DRDYL DSUT Drive Ready "Not" Drive Ready Lamp "Not" DSU Drive Type A1 HEAD ALIGN MENT PCA XA1P1 XA1P2 A2 I/O SECTOR PeA XA2P1 XA2P2 J1 Troubleshooting A3 A4 SERVO PCA DRIVE CONTROL PCA XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 M Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) AS TRACK FOLLOWER PCA XASP1 XASP2 A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD peA J2 J3 COMMENTS From Indicator PeA pin Al1Jl-18. ·Not Used. N* 4 To DRIVE READY lamp via Indicator PCA R pin AllJl-7. Identifies 7920/7925 to DSU. DWA "Not" Decrease Write Current A (13mA) DWB "Not" Decrease Write Current B (6.5mA) DWC ECS "Not" Decrease Write Current C (3.25mA) Energize Carriage Solenoid FLT Drive Fault F FLTL "Not" Drive Fault Lamp FMT Format Pack 13 HSO Head Select Bit 0 HSl Head Select Bit 1 HS2 Head Select Bit 2 HS3 Head Select Bit 3 12 13 R 3 A B F T To Power and Motor Regulator PCA pin A9Jl·50. To DRIVE FAULT lamp via Indicator PCA pin AllJl-6. From FORMAT switch - S4. DENOTES SIGNAL SOURCE DENOTES BIDIRECTIONAL S,·GNAL 7925 4-56 7925 SIGNAL MNEMONIC DEFINmON ICA Illegal Cylinder Address ICIS Interlock Chain In AS ICOS/lCI6 Interlock Chain Out ASlin A6 IC06 ICI2 Interlock Chain Out A6 Interlock Chain in A2 A1 HEAD ALIGNMENT PCA XA1P1 XA1P2 A2 I/O SECTOR PCA XA2P1 XA2P2 J1 6 A3 A4 SERVO PCA DRIVE CONTROL PCA XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 Troubleshooting AS TRACK FOLLOWER PCA XASP1 XASP2 A6 RIW PREAMPLIFIER PCA XA6P1 Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS Interlock chain source from - 24V supply. 17 15 To pack chamber interlock pin J2-7. From Spi ndle Logic PCA pin A8P1-T. 14 IC02/1CI3 IC03/ICI4 ILFL Interlock Chain Out A2/ln A3 Interlock Chain Out A3/ In A4 "Not" Interlock Fault LED 15 16 IP "Not" Index Pulse LD "Not" Lock Door (Pack Access) B 3 LSB Least Significant Bit (of Cylinder Address) 16 MHFL "Not" Multiple Head Fault LED MHS NDPS POS "Not" Multiple Head Sense "Not" Non-Destructive Preset Position L 0 0 V DENOTES SIGNAL SOURCE DENOTES BIDIRECTIONAL SIGNAL To interlock logic on Drive Control PCA -A4. To Fault Indicator PCA pin A12J1-2. To Power and Motor Regulator PCA pin A9J1-47. To Fault Indicator PCA pin A12J1-8. 4-57 SIGNAL MNEMONIC DEFINITION PSF "Not" Power Supply Failed RDA Read Data A ROB RET RH ROl R02 RS RUN RWFL SB SCL SEL SELL SEN SK Read Data B Retract Heads "Not" Restore Home Read Only 1 Read Only 2 "Not" Rur. j:lindle "Not" Run "Not" Read with Write Fault LED "Not" Servo Balanced Sector Clock Drive Selected "Not" Drive Selected LED "Not" Servo Enable Seek A1 HEAD ALIGNMENT PCA XA1P1 XA1P2 A2 I/O SECTOR PCA XA2P1 XA2P2 J1 A3 SERVO PCA XA3P1 XA3P2 Troubleshooting Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A4 DRIVE CONTROL PCA AS TRACK FOLLOWER PCA A6 R/W PREAMPUFIER PCA A7 MOTHERBOARD PCA XA4P2 J1 J2 XASP1 XASP2 XA6P1 J1 J2 J3 COMMENTS To Power and Motor Regulator PCA pin 14 A9Jl-22. F 6 13 H From READ ONLY switch - S5. J To Spindle Logic PCA pin A8Pl-J.. 3 From Indicator PCA pin Al1Jl-l1. 16 To Fault Indicator PeA pin A12Jl-7. 17 6 8 N 12 To Indicator PCA pin All J1-10, 7 To Power and Motor Regulator PeA pin K A9Jl·20. DENOTES SIGNAL SOURCE DENOTES BIDIRECTIONAL SIGNAL 4-58 7925 7925 SIGNAL MNEMONIC DEFINITION SKH "Not" Seek Home SKI "Not" Seek Inhibit SOF SPD SPU STB STF STOP TCC TAe TAC TBUSO TBUS1 TBUS2 TBUS3 TOFl Set Offset "Not" Speed Down "Not" Speed Up "Not" Strobe "Not" Self Test Failed "Not" Stop "Not" Timeout Count Clock Tachometer "Not" Tachometer "Not" Tag Bus Bit 0 "Not" Tag Bus Bit 1 "Not" Tag Bus Bit 2 "Not" Tag Bus Bit 3 "Not" Timeout Fault lED DENOTES SIGNAL SOURCE A1 HEAD ALIGN MENT peA XA1P1 XA1P2 A2 I/O SECTOR PCA XA2P1 XA2P2 J1 A3 SERVO PCA XA3P1 XA3P2 u 2 A4 DRIVE CONTROL PCA XA4P2 J1 J2 Troubleshooting A5 TRACK FOLLOWER peA XA5P1 XA5P2 A6 RIW PREAMPLIFIER PCA XA6P1 Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS N T 15 C 13 U V S C 37 39 41 43 From Spindle logic PCA pin A8P1-11 · From Spindle logic PCA pin A8P1-L. From Controller. 15 From Indicator peA pin A11J1-9. From Spindle logic PCA pin A8P1-M. From Velocity Transducer. From Velocity Transducer. One-way tag bus from controller._ One-way tag bus from controller. One-way tag bus from controller. One-way tag bus from controller. To Fault Indicator PCA pin A12J1-3. DENOTES BIDIRECTIONAL SIGNAL 4-59 SIGNAL MNEMONIC DEFINITION URG Unselected Read Gate usa Unit Select Bit a US1 Unit Select Bit 1 US2 UWG WAFL Unit Select Bit 2 Unselected Write Gate "Not" Write with No AC Fault LED A1 HEAD ALIGNMENT PCA XA1P1 XA1P2 K A2 I/O SECTOR PCA XA2P1 J1 A 17 9 Troubleshooting Table 4-4. Motherboard PCA-A7 Signal Distribution List (Continued) A3 A4 SERVO PCA DRIVE CONTROLPCA XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 K 9 A5 TRACK FOLLOWER PCA XA5P1 XA5P2 A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS From UNIT SELECT switch - S3. Also, to Unit Select Display via Indicator PCA pin A11J1-15. From UNIT SELECT switch - S3. Also, to Unit Select Display via Indicator PCA pin A11J1-17. From UNIT SELECT switch - S3. Also, to Unit Select Display via Indicator PCA pin A11J1-16. To Fault Indicator PCA pin A12J1-5. WDT GOT WEN WENT WRFL +SVRS Write Data Ground Data Write Enable H Write Enable Toggle "Not" Write with Access Not Ready Fault LED + SV Remote Sense o 4 E R 18 To Fault Indicator PCA pin A12J1-4. To Power and Motor Regulator PCA pin A9J 1-26. Source from + SV supply. 7925 DENOTES SIGNAL SOURCE DENOTES BIDIRECTIONAL SIGNAL 4-60 7925 Troubleshooting Table 4-5. Power Distribution List SUPPLY VOLTAGE +SV HEAD ALIGNMENT PeA A1 XA1P1 XA1P2 4,5, 0, E XA2P1 VO SECTOR PCA A2 XA2P2 CONNECTIONS VIA MOTHERBOARD PCA - A7 SERVO PCA A3 DRIVE CONTROL PCA A4 J1 XA3P1 XA3P2 XA4P1 XA4P2 J2 4,5, 26,30, 4,5, O,E 32, 35 0, E 4,5, 0, E 9,10, 11, 12, 13,14, 15, 16 TRACK FOLLOWER PCA AS XASP1 XASP2 RlW PREAMPLIFIER PCA A6 XA6P1 4,5, 0, E MOTHERBOARD PCA A7 J1 J3 CONNECTIONS VIA MAIN HARNESS SPINDLE LOGIC PeA A8 P1 PMR PCA A9 J1 ENCODER PCA A10 J1 INDICATOR PCA A11 J1 J2 17, 4,5, U,V 0, E 5 13 4 FAULT INDICATOR PeA A12 J1 9,10, 11, 12, 13,14, 15,16 +12V 3,e 3, e 3, e 3, e 3,e 9,K 20, X 3,C 5 (J Q C Wt- :5 :;:) Caw:J: -12V 2, B 2,8 2, B 2, B 2, B 10, L 21, Y 2,8 -24V o W t- S:3 o0 azw: ::;) +10V GROUND 6 1, A 18, V 1, A 18, V 11, 12, 1, A 18, V 1, A 18, V 14, 15, 16,19, 20,29, 31,33, 34,45, 46,47, 48,49, 50 DENOTES SOURCE 14 11, M 19, W 1, A 18, V 7,8, 12, N, P 22,23, 4 Z,AA 1, 18, A, V 2 2 4-61/4-62 REMOVAL AND REPLACEMENT I~ 5-1. INTRODUCTION This section provides removal and replacement procedures for the field-replaceable disc drive assemblies. The procedures are given in the order in which disassembly normally occurs. Each assembly or component that must be removed before access can be gained to another assembly is presented first, followed by the next assembly that can be removed. References are made to illustrations and listings contained in Section VI, Replaceable Parts, to aid in identifying and locating parts. 5-2. PREPARATION FOR SERVICE b. Disconnect the ac power cord from the ac mains power. c. Open the rear door. d. Remove the two screws (2, figure 6-1) that secure the shroud. e. Lift the rear of the shroud up to gain approximately 3 em (l in.) clearance and pull the shroud straight back. To replace the shroud, place it on the side rails of the enclosure and push straight in. When fully seated, the fixed runners on the shroud will drop into mating holes. Secure the shroud with thetwo mounting screws. WARNING This disc drive does not contain operator-serviceable parts. To prevent electrical shock, refer all installation and maintenance activities to service-trained personnel. Before starting any removal and replacement procedure, perform the following steps: a. If the disc drive is in an operating mode, set the RUN/STOP switch to STOP. The DRIVE READY indicator will extinguish immediately. b. Allow the spindle to halt (approximately 30 seconds). The DOOR UNLOCKED indicator will light, at which time the spindle has stopped rotating, the door unlock solenoid is energized, and it is safe to open the pack chamber door. c. Remove and store the disc pack. d. Open the front and rear doors. e. Set the power switch on the power panel assembly to the off position. Disconnect the ac power cord from the ac mains power. 5-3. SHROUD REMOVAL AND REPLACEMENT To remove the shroud, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. 5-4. DOOR AND SIDE COVER REMOVAL AND REPLACEMENT To remove either door, proceed to step a. The side covers are secured to the frame with four screws, two screws on each end. The cover is also secured by a flange and bracket arrangement located at the bottom center of the cover, and with latching brackets at the top. To remove either side cover, proceed to step b. a. To remove the front or rear door, proceed as follows: (1) Perform the preparation for service outlined in paragraph 5-2. (2) Disconnect the ac power cord from the ac mains power. (3) Open the door that is to be removed. (4) Support weight of door with one hand and grasp upper hinge pin with other hand. (5) Pull upper hinge pin up until it is free of hinge bracket and then move door away from hinge bracket. Now move door upward until lower hinge pin is free of lower hinge bracket. (6) Close door until it is free of side panel and then lift door away from cabinet. (7) To replace the door, perform the above steps in reverse order. b. To remove a side cover, proceed as follows: (1) Remove the four screws (10, figure 6-1) securing the cover to the frame. 5-1 Removal and Replacement 7925 (2) Pull the bottom of the cover away from the frame to disengage the flange from the frame bracket. (3) To remove the cover, lift it out and up. To replace a side cover, proceed as follows: (1) Insert the top edge of the cover into the enclosure frame and pull downward to secure the cover onto the mating frame shoulders. (2) Push in the bottom of the cover, ensuring that the bottom flange is inserted into the mating slot on the bottom of the enclosure frame. (3) Replace and tighten the four screws (10, figure 6-1) which secure the cover to the frame. 5-5. PREFILTER REMOVAL AND REPLACEMENT To remove the prefilter, open the front door and slide the filter out of the prefilter chamber. Insert a new filter, ensuring airflow arrow points in the correct direction (refer to figure 6-1), and close the front door. 5-6. ABSOLUTE FILTER REMOVAL AND REPLACEMENT To remove the absolute filter, (1, figure 6-S) proceed as follows: a. Perform the preparation for service outlined III paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the front shield (15, figure 6-1). d. On the prefilter chamber (19, figure 6-1), disengage the two quick-release fasteners at the top of the assembly. e. Pull the prefilter chamber down, then out of the enclosure. f. Loosen the air hose clamp (3, figure 6-S) and separate it from the absolute filter. g. Remove the two knurled screws (2) from the front of the absolute filter. h. Pull the absolute filter down and out of the enclosure. To replace the absolute filter, proceed as follows: a. Inspect the new filter for holes or damage to the paper element. 5-2 b. Insert the absolute filter, ensuring that the bottom of the filter box rests on the tab on the impeller cover assembly. c. Press the filter up and seat the guide pin into the corresponding hole, then secure the filter with the two knurled screws. d. Reinstall the air hose on the absolute filter. e. Replace the prefilter chamber, ensuring that the rear mounting bracket seats onto the mating bracket in the disc drive. f. Push the prefilter chamber up and latch in place. The neck on the prefilter chamber acts as a guide into the impeller cover assembly to ensure proper mounting. g. Reinstall the front shield (15, figure 6-1). h. Restore the ac power to the disc drive. i. Measure the air pressure of the absolute filter as outlined in paragraph 2-13. 5-7. FRONT FRAME ASSEMBLV To remove the front frame assembly (41, figure 6-2), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Disconnect the door lock assembly wiring connector. Remove the cable clamp and the ground clip from the right mounting bracket of the front frame assembly. I CAUTION I Do not extend the front frame more than 10 cm (4 in.). Damage to wiring and associated connectors can occur. e. On the front frame mounting brackets, remove the two screws (42, figure 6-2) on each bracket and lift the frame out far enough to gain access to PCA-A1l. f. On the indicator PCA, disconnect the IS-pin connector, the pack detector cable, and the ground lug. Then remove the front frame assembly. To replace the front frame assembly, perform the above steps in the reverse order. 7925 Removal and Replacement 5-8. INDICATOR ASSEMBLY PCA-A11 AND INCANDESCENT LA~.~P REMOVAL AND REPLACEMENT To remove indicator assembly PCA-A11 or replace an incandescent lamp, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3,) d. Remove the front frame assembly. (Refer to paragraph 5-7.) e. If an incandescent lamp requires replacement, follow substeps (1) through (3); otherwise, proceed to step f. (1) Being careful not to bend the lamp contact, rotate the lamp contact on the indicator PCA counter-clockwise. Remove the defective lamp. (2) Insert the replacement lamp and rotate the lamp contact clockwise to hold the new lamp in place. (3) Proceed to step g. f. Remove indicator assembly PCA-A11 and replace with the new indicator assembly. Note: When replacing indicator assembly PCA-A11, ensure that the LED on the indicator assembly is centered in the hole in the front panel frame. g. Replace the front frame. (Refer to paragraph 5-7.) Replace the shroud. (Refer to paragraph 5-3.) Restore the ac power to the disc drive. 5-9. PACK CHAMBER ASSEMBLY REMOVAL AND REPLACEMENT To remove the pack chamber assembly (3, figure 6-1), proceed as follows: a. Remove the disc pack. b. Perform the preparation for service outlined in paragraph 5-2. c. Disconnect the ac power cord from the ac mains power. d. Remove the shroud. (Refer to paragraph 5-3,) e. Remove the front frame assembly. (Refer to paragraph 5-7.) f. Remove the two screws (66, figure 6-2) that hold the side plate assembly (65) in place. Remove the side plate assembly. g. At the bottom of the pack chamber assembly, release the four quick-release fasteners (39 and 41, figure 6-4). h. Disconnect connector J2 from plug P1 (cable harness leading to the door lock assembly). i. Lift the pack chamber assembly out of the disc drive. To replace the pack chamber assembly, proceed as follows: a. Loosen (do not remove) the two screws which hold the preamplifier retainer (44, figure 6-4) and push the retainer upward (toward the door of the pack chamber). b. Align the four quick-release fasteners over the four posts on the mainframe and place the pack chamber assembly on the mainframe. c. Secure the pack chamber assembly by attaching the quick-release fasteners to the mainframe and reconnect connector J2. d. Ensure (by visual inspection) that the heads can enter the pack chamber without interference through the hole in the side of the pack chamber assembly. e. Lower the preamplifier retainer (44, figure 6-4) and push the retainer down on read/write preamplifier PCA-A6. Tighten the knurled screws (45, figure 6-4). f. Install the side plate assembly using the two mounting screws. g. Replace the front frame assembly. (Refer to paragraph 5-7.) Replace the shroud. (Refer to paragraph 5-3.) Restore the ac power to the disc drive. h. Attach the 13356A disc pack label (1, figure 6-4) to the spanner handle (35, figure 6-4). 5-10. PRINTED CIRCUIT CARD REMOVAL AND REPLACEMENT Four of the PCA's are mounted in the card cage chassis and a fifth is mounted in a separate card chassis. The remainder of the PCA's are mounted in other locations throughout the disc drive. 5-11. CARD CAGE PCA'S To remove any of the four card cage PCA's, A2 through A5, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. Removal and Replacement 7925 b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Disconnect the interconnecting cable from jack Jl on I/O Sector PCA-A2 (4). e. Remove the three screws that secure the preamp shield (1, figure 6-2) and remove the shield. f. Loosen the two screws that secure the cable mounting bracket (5) and the card cage cover (8). Remove the bracket and cover from the card cage. Note: Whenever I/O sector PCA-A2 is replaced, ensure the jumpers are in the proper locations. (Refer to figure 4-27.) g. On drive control PCA-A4 (11), simultaneously lift up on the two PCA extractor levers and slide the PCA up 5 cm (2 in.). Disconnect the data cable and fault indicator cable from the PCA. If desired, remove the drive control PCA-A4 from the card cage chassis. h. To remove track follower PCA-A5 (12), disconnect the servo head connector, then simultaneously lift up on the two PCA extractor levers and slide the PCA up and out of the card cage chassis. Note: Whenever track follower PCA-A5 is replaced, the data head alignment check must be performed. (Refer to Section III, Alignment and Adjustment.) I CAUTION I Ensure that the correct replacement PCA is inserted into its corresponding card slot, otherwise damage to the PCA may result. i. Insert the replacement PCA into the card slot ensuring that the component side of the PCA faces toward the outer side of the disc drive. Reconnect any cables disconnected during removal and then press the PCA firmly into the receptacle until seated. j. Install the card cage cover and the cable mounting bracket and tighten the two mounting screws. k. Install the preamp shield and secure with the three mounting screws. 1. Replace the shroud. (Refer to paragraph 5-3.) Restore the ac power to the disc drive. 5-4 5-12. SPINDLE LOGIC PCA-A8 Spindle logic PCA-A8 (46, figure 6-2) is mounted in a card cage located directly above the operator panel. To remove this PCA, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front door and remove the front shield (15, figure 6-1). d. Insert a blade-type screwdriver between the card cage side and the spindle logic PCA retainer (44, figure 6-2). e. Lightly pry inward the retainer .arm to extract the screw head from its seating hole and lift out retainer. f. Lift the PCA extractors outward and slide out the spindle logic PCA. To replace spindle logic PCA-A8, insert the PCA into the card slot and firmly seat into the mating receptacle. Then replace the retainer, ensuring that the screw heads are secured in the seating holes. 5-13. READ/WRITE PREAMPLIFIER PCA-A6 To remove read/write preamplifier PCA-A6 (15, figure 6-2) from a disc drive, proceed as follows: I CAUTION I The read/write preamplifier PCA-A6 contains a CMOS component. To avoid damage to the CMOS component, do not touch the components or the circuit traces on the PCA. a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the three screws that secure the preamp shield (1, figure 6-2) and remove the shield. e. Disconnect all head connectors from PCA-A6. f. Loosen (do not remove) the two screws which hold the preamplifier retainer (44, figure 6-4) and push the retainer upward. Pull the PCA out of the connector and remove it from the disc drive. 7925 Removal and Replacement To replace the read/write preamplifier, proceed as follows: a. Insert and firmly seat the PCA in the connector. Loosen (do not remove) the two screws which hold the preamplifier retainer (44, figure 6-4) and push the retainer down. Tighten the two screws which hold the preamplifier. Ensure that the preamplifier retainer securely holds the read/write preamplifier. b. Connect the head connectors to the read/write preamplifier. c. Install the preamp shield and secure with the three mounting screws. d. Replace the shroud. (Refer to paragraph 5-3.) Restore the ac power to the disc drive. 5-14. CARD CAGE CHASSIS AND MOTHERBOARD PCA-A7 To remove the card cage chassis (13, figure 6-2) and motherboard PCA-A7 (16), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3), d. Remove card cage PCA's. (Refer to paragraph 5-11.) Note: Before removing the card cage chassis, release the data cable from the cable retainer at the rear of the card cage chassis and release the fault indicator cable from the cable retainer on the side of the card cage chassis. e. At the bottom of the card cage, release the four quick-release fasteners and lift out card cage chassis. f. Remove read/write preamplifier PCA-A6. (Refer to paragraph 5-13.) g. On the motherboard, disconnect cabling, and remove velocity transducer connector. h. Loosen the screws (17) and lift out the motherboard. To replace the motherboard and card cage chassis, perform the above steps in the reverse order. 5-15. POWER AND MOTOR REGULATOR PCA-A9 To remove power and motor regulator PCA-A9 (49, figure 6-2), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front and rear doors and remove the front shield (15, figure 6-1), the rear shield (13), and the exhaust shield (11). d. Rotate the three 1/4-turn fasteners that secure the PCA to the bottom of the mainframe. e. Lower the PCA into its service position. f. Loosen the air hose clamp (59, figure 6-2) screw and disconnect air hose (60). g. Disconnect the four cables and the wiring harness. h. Lift PCA straight up and out to disengage three catches on edge of PCA from mating hinge hooks. To replace power and motor regulator PCA-A9, perform the above steps in the reverse order. I CAUTION I To avoid damage to the disc drive, ensure that the jumper on power and motor regulator PCA-A9 is in the proper position. (Refer to figure 4-26.) Note: Ensure the cables attached to PCA-A9 are pushed up into the groove (near the hinges) in the mainframe before the 1/4-turn fasteners are secured to the bottom of the mainframe. 5-16. FAULT INDICATOR PCA-AI2 Fault indicator PCA-AI2 is mounted on the back side of the operator panel assembly. To remove fault indicator PCA-AI2, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front door on the disc drive enclosure and remove the front shield (15, figure 6-1). I CAUTION I To prevent connector damage, remove the fault indicator ribbon cable from the plastic clip located at the bottom of the spindle logic card cage. 5-5 Removal and Replacement d. Remove the two screws at the top of the panel and the two screws on the underside of the operator panel. e. Pull the panel out far enough to gain access to the PCA. f. Disconnect the plug from jack A12J1 on the fault indicator PCA. g. From the rear side of the PCA, remove two nuts (3, figure 6-9) on mounting posts and lift off PCA. To replace fault indicator PCA-A12, perform the above steps in the reverse order. Note: When fault indicator PCA-A12 (2, figure 6-9) is replaced, ensure that the letters "hp" on the back of PCA-A12 are oriented so they are on the top side of the PCA when it is installed in the operator panel (9, figure 6-9). 7925 DETECTOR IN THE DOWN POSITION 5-17. PACK DETECTOR ASSEMBLY REMOVAL AND REPLACEMENT To remove the pack detector assembly, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3,) d. Open the front door and remove the front shield (15, figure 6-1). e. Remove the front frame assembly. (Refer to paragraph 5-7.) Remove pack chamber assembly. (Refer to paragraph 5-9.) f. Remove the two screws that secure pack detector assembly to the mainframe, and remove the assembly. To replace the pack detector assembly, perform the above steps in the reverse order. When the pack chamber is back in place, measure the air pressure as outlined in paragraph 2-13. When replacing the assembly, ensure that the detector is in the down position as shown in figure 5-1. 5-18. DATA AND SERVO HEAD REMOVAL AND REPLACEMENT The data and servo heads are removed and replaced in the same manner. When any head is replaced, head alignment must be performed as part of the replacement. To remove a data or servo head, proceed as follows: 5-6 7311-87 Figure 5-1. Pack Detector Assembly a. Perform the preparation for service outlined III paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the front frame assembly (refer to paragraph 5-7) and then remove the pack chamber assembly (refer to paragraph 5-9\. e. Remove card cage PCA's. (Refer to paragraph 5-11.) f. Remove card cage chassis. (Refer to paragraph 5-14.) 7925 Removal and Replacement I CAUTION I The read/write preamplifier PCA-A6 contains a CMOS component. To avoid damage to the CMOS component, do not touch the components or the circuit traces on the PCA. g. Disconnect head cable connector to be removed from read/write preamplifier PCA-A6. I CAUTION I To avoid damage to the head, be sure to install the head installation tool on the head as shown in figure 5-2. h. Install the head installation tool as shown in figure 5-2. The UP side of the installation tool is used for heads 1, 3, 4, 6, and 8. The DN side of the installation tool is used for heads 0,2,5, 7, and the servo. i. Hold the head in place by applying a slight pressure to the head installation tool, then loosen the head securing screw. j. Remove the head with the head installation tool attached. Care must be exercised to avoid damaging critical alignments of the head assembly. To replace a data or servo head, proceed as follows: I CAUTION I To avoid damage to the head, do not touch or clean the surface of the head that attaches to the actuator. I CAUTION I To avoid damage to the head, be sure to install the head installation tool on the head as shown in figure 5-2. a. Install the head installation tool as shown in figure 5-2. The UP side of the installation tool is used for heads 1, 3, 4, 6, and 8. The DN side of the installation tool is used for heads 0, 2, 5, 7, and the servo. b. Clean the head surface as outlined in paragraph 2-15. c. Before seating the head in place, pull head cable through slot into which the head positions. d. Replace head and thread in head securing screw. e. Using fingers, thread in screw until it isjust snug and the head remains in place. I""', ,A"I,uI T I ln ..1 IVI,. Do not tighten head securing screw with head installation tool attached to head, as the heads will not seat properly in the carriage. Damage to the head and disc surface is likely to occur if the head is tightened with the tool in place. f. Remove the head installation tool. Ensure the replacement head is properly positioned on the head cam (see figure 5-3). g. Insert the head initial position tool to ensure the head alignment screw can be adjusted through the head alignment hole in the coil/carriage assembly. h. Tighten the head securing screw to 5 inch-pounds, and remove the head initial position tool. i. Replace the card cage, card cage PCA's, pack chamber assembly, and the front frame assembly. j. Reconnect all cabling disconnected prior to head removal. If applicable, replace the contamination shield (25, figure 6-2). k. Perform the head alignment procedures given in Section III, Alignment and Adjustment. Measure the air pressure of the absolute filter as outlined in paragraph 2-13. 5-19. CARRIAGE LATCH AND DETECTOR ASSEMBLV REMOVAL AND REPLACEMENT To remove and replace the carriage latch and detector assembly (5 an~ 7, figure 6-7), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mams power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the card cage PCA's and card cage chassis. (Refer to paragraphs 5-11 and 5-14.) e. Disconnect the connector from the detector (5) and the two connectors from the carriage latch (7). I CAUTION I Exercise care when handling the actuator assembly if the carriage latch and detector assembly is removed. Carriage movement is no longer restrained and damage to the heads may result. 5-7 Removal and Replacement 7925 UP HEAD 1. Position the head installation tool with the marking: · UP for heads 1, 3, 4, 6, and 8 · DN for heads 0, 2, 5, 7, and servo 2. Firmly hold thumb at spring joint. 3. Lift head arm up until assembly is straight. 4. Post inserts into hole on head assembly. 5. Center pin slides over back of head assembly. 6. Front pin slides under head assembly. HEAD UP DOWN 1- Rotate head into installation position. 2,3 1,2 Ensure that mounting hole (2) and cable (3) are facing head preamplifier side of drive. 4 3 Install head and secure. 5 4 Remove head installation tool before tightening head securing screw. REF 7301 5-8 DOWN HEAD Figure 5-2. Using the Head Installation Tool 7925 REF 7311-55 Figure 5-3. Head Positioning f. Remove the two retaining screws (8 and 9) that secure the carriage latch and detector assembly to the actuator assembly. g. Install replacement assembly and hold in place with retaining screws. Do not tighten retaining screws. h. Connect the wiring connectors. i. Adjust the carriage latch and detector assembly position so that the carriage back flag on the coil/carriage assembly travels through the approximate center of the photoswitch, ensuring that there is no contact between components. j. Tighten the retaining screws. I CAUTION I To avoid damage to the disc drive, do not move the carriage out more than 1.3 cm (0.5 in.). k. Check the latching action by pressing in the solenoid plunger and pulling out the carriage. Then press in the carriage and latch the assembly. Ensure that the latching action is smooth. 5-20. ACTUATOR ASSEMBLY REMOVAL AND REPLACEMENT WARNING The magnetic field of the actuator assembly can have dangerous effects Removal and Replacement on aircraft navigation instruments (e.g., c01npass) during air shipment. When air shipping this assembly, you must comply with all applicable domestic and foreign regulations. For shipping into or within the United States, follow the U.S. Department of Transportation (DOT) Regulations, Title 49, Parts 171-177 (Hazardous Materials). For foreign air shipments, follow the International Air Transport Association (lATA) Regulations, Article 1052. The magnetic field strength for one actuator assembly is shown below. DISTANCE [Metres (Feet)] 0.90 (2.95) 2.13 (7.0) 4.60 (15.0) FIELD STRENGTH UNSHIELDED SHIELDED* (Milligauss) (Milligauss) 275.0 7.63 25.3 0.57 3.1 0.06 * Measurements made with the actuator assembly in a Hewlett-Packard Shielded Shipping Package, part number 07925-60080. Note: Regulations in effect at the publication of this manual allow air shipment of up to three (3) actuator assemblies in the Hewlett-Packard Shielded Shipping Package, part number 07925-60080, without special labeling as a restricted article. (The HP shielded shipping package consists of a steel drum with specially designed shielding and padding. Do not alter or substitute.) Air shipment of four (4) or more actuator assemblies (in the shielded package) must be labeled as restrictd articles.· If the shielded package is not available, each actuator must be packaged separately and shipped as a restricted article. Restricted articles require several magnetic warning labels and a certification of magnetic field strength. Consult your nearest Restricted Article Coordinator before air shipment of any magnetic assembly. The coordinator will know of changes (if any) in regulations and proper labeling of restricted articles. Questions may also be directed to the Restricted 5-9 Removal and Replacement 7925 Article Coordinator at Hewlett-Packard Disc Memory Division by phoning (208) 376-6000. To remove the actuator assembly, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3,) d. Remove card cage PCA's and card cage chassis. (Refer to paragraphs 5-11 and 5-14,) e. Remove side covers. (Refer to paragraph 5-4.) f. On power and motor regulator PCA-A9, release the 1/4-turn fasteners and lower the PCA into its service position. g. Disconnect the carriage latch and detector assembly wiring connectors. h. Disconnect the head cable connectors and remove the heads as outlined in paragraph 5-18. 1. Disconnect the velocity transducer cable from motherboard PCA-A7. j. Disconnect two leads on terminal board tabs that connect to coil ribbon cable. k. Remove the front frame assembly (refer to paragraph 5-7) and then remove the pack chamber assembly (refer to paragraph 5-9.) 1. Remove the cable shield on the underside of the casting. m. From the bottom of the mainframe, remove four bolts and lockwashers (31 and 32, figure 6-2) that secure the actuator assembly to the mainframe. n. Grasp the top of the actuator assembly and lift it straight up to release the guide pins from the holes in the mainframe, then lift the assembly to the rear to remove it from the disc drive. To replace the actuator assembly, proceed as follows: a. Position the actuator assembly over its mounting space and seat the guide pins into the mating holes on the mainframe. Attach the two capacitors to the coil band shield barrier block and to ground. (Refer to figure 6-7.) 5-10 b. Replace four bolts and lockwashers and secure actuator assembly to the mainframe. Torque the bolts to 80 inch-pounds. c. Replace pack chamber assembly and connect doorlock assembly cable. (Refer to paragraph 5-9.) Replace the front frame assembly. (Refer to paragraph 5-7,) d. Replace the cable shield on the underside of the casting. e. Connect coil ribbon cable to terminal board. f. Reconnect the velocity transducer cable to motherboard PCA-A7, install the heads as outlined in paragraph 5-18, and reconnect the carriage latch and detector assembly connectors. Note: To install the heads, the head screw fastener blocks (29, figure 6-7) must be removed from the actuator. g. Return power and motor regulator PCA-A9 to its operating position and secure with the three 1/4-turn fasteners. h. Replace card cage chassis and card cage PCA's. i. Restore ac power to the disc drive. Measure the absolute filter air pressure as outlined in paragraph 2-13. j. Replace shroud and side covers. 5-21. VELOCITY TRANSDUCER AND VELOCITY TRANSDUCER SHAFT The velocity transducer (1, figure 6-7) and the velocity transducer shaft (3) are removed from the disc drive as follows: a. Perform the preparation for service outlined III paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3,) d. Remove the card cage chassis. (Refer to paragraph 5-14,) e. Disconnect the velocity transducer cable from connector A7P2 on motherboard PCA-A7. f. Loosen the setscrew (4) that secures the velocity transducer shaft to the carriage assembly. g. Using a slender tool (such as a 1/32-inch allen wrench), push the velocity transducer shaft free from the carriage assembly. 7925 Removal and Replacement h. Remove the two screws (2) that secure the velocity transducer (1) to the actuator assembly. 1. Carefully slide the velocity transducer, with the velocity transducer shaft inside it, out from the rear of the actuator assembly. I CAUTION I The velocity transducer shaft contains a calibrated magnet. To avoid damage to the velocity transducer shaft, avoid contact by the magnet end of the shaft with ferrous or magnetic materials. j. Carefully slide the velocity transducer shaft out from the rear of the velocity transducer. To install a new velocity transducer and/or velocity transducer shaft, proceed as follows: I CAUTION I Exercise extreme care when replacing the velocity transducer. A slight torque on the back section will break the wires inside the assembly. a. If the velocity transducer requires replacement, replace it with a new one. b. Gently push the velocity transducer into the back of the actuator assembly and secure it in place with the two screws previously removed. I CAUTION I The velocity transducer shaft contains a calibrated magnet. To avoid damage to the velocity transducer shaft, avoid contact by the magnet end of the shaft with ferrous or magnetic materials. c. If the velocity transducer shaft requires replacement, replace it with a new one. d. Insert the rod end of the velocity transducer shaft into the opening at the end of the velocity transducer. e. Using a slender tool of nonmagnetic material (such as the eraser end of a pencil), push on the magnet end of the velocity transducer shaft until the rod end extends through the hole in the carriage assembly. f. Tighten the setscrew (4) on the carriage assembly to secure the velocity transducer shaft. g. Replace the card cage chassis. (Refer to paragraph 5-14.) h. Replace the shroud. (Refer to paragraph 5-3,) Restore the ac mains power to the disc drive. 5-22. HEAD CAM To replace a head cam (11, figure 6-7), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the front frame assembly (refer to paragraph 5-7) and then remove the pack chamber assembly (refer to paragraph 5-9). Remove the data heads and the servo head. (Refer to paragraph 5-18.) e. Remove the two screws (12) which secure the head cam to the head cam support. f. Install the new head cam on the head cam support by loosely tightening the two head cam screws (12). g. Loosen the two screws (12) on the other head cam (11). h. Install the head cam alignment tool, part no. 1335460001, on the spindle hub. (See figure 5-4.) Ensure that the head cams mate with the head cam alignment tool. i. Adjust the cams to position with the head cam alignment tool. (See figure 5-5.) j. Tighten the cam securing screws (12) to 7 inch-pounds. k. Remove the head cam alignment tool. Replace the data heads and the servo head. (Refer to paragraph 5-18,) I. Replace the pack chamber assembly (refer to paragraph 5-9) and then replace the front frame assembly (refer to paragraph 5-7). m. Measure the absolute filter air pressure as outlined in paragraph 2-13. n. Replace the shroud. (Refer to paragraph 5-3.) Restore ac power to the disc drive. 5-23. HEAD CAM SUPPORT To replace a head cam support (14, figure 6-7), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) 5-11 Removal and Replacement 7925 INSTRUCTIONS LOOSEN KNURLED SCREWS SLIDE ALIGNMENT TOOL ONTO SPINDLE HUB ENSURE THAT ALIGNMENT TOOL BUTTS UP AGAINST CAMS SECURE ALIGNMENT TOOL ON SPINDLE HUB, USING KNURLED SCREW REF 7311·56 Figure 5-4. Use of Head Cam Alignment Tool d. Remove the front frame assembly. (Refer to paragraph 5-7.) Remove the pack chamber assembly. (Refer to paragraph 5-9.) Remove the data heads and the servo head. (Refer to paragraph 5-18.) e. Remove the two screws (12, figure 6-7) which secure the head cam to the head cam support. f. Remove the two screws (15) which secure the head cam support (14) to the magnet and rail assembly (28, figure 6-7). g. Install the new head cam support (14) using the two screws (15) and the lockwashers, ensuring that the support is pushed forward firmly against the stop on the lower beam (toward the crash stops). h. Install the head cam (11) on the head cam support by loosely tightening the two head cam screws (12) and washers (13). 5-12 i. Loosen the two screws (12) on the other head cam (11). j. Install the head cam alignment tool, part no. 1335460001, on the spindle hub. (See figure 5-4.) Ensure that the head cams mate with the head cam alignment tool. k. Adjust the cams to position with the head cam alignment tool. (See figure 5-5.) 1. Tighten the cam securing screws (12) to 7 inch-pounds. m. Remove the head cam alignment tool. Replace the data heads and the servo head. (Refer to paragraph 5-18.) n. Replace the pack chamber assembly (refer to paragraph 5-9) and then replace the front frame assembly (refer to paragraph 5-7), 7925 Removal and Replacement INSTRUCTIONS [!] LOOSEN FOUR HEAD CAM SCREWS [3] 0 SEAT HEAD CAMS AGAINST SIX ALIGNMENT TOOL PINS mTIGHTEN HEAD CAM SCREWS Figure 5-5. Head Cam Tool Alignment o. Measure the absolute filter air pressure as outlined in paragraph 2-13. p. Replace the shroud. (Refer to paragraph 5-3.) 5-24. SPINDLE ASSEMBLY REMOVAL AND REPLACEMENT as Restricted Articles: HMagnetic Material" per International Air Transport Association (lATA) Article 1052, Packaging Note 905 (c)j and/or HClass ORM-C, Magnetized Material", per Code of Federal Regulations (CFR) Title 49, Packaging Note 173.1020. WARNING Spindle Assembly, part no. 0792560012, has a weak magnetic field which may adversely affect aircraft compasses when air shipped in multiple quantities. If you ship more than the quantities listed in the ~~Not Restricted" column in the table below, you must declare the shipment SHIPPING PACKAGE FIELD STRENGTH (milligauss) SHIPMENT QUANTITY 2.13 m (7 ft) 4.57 m (15 ft) Not Restricted Restricted Corrugated Carton 0.08 0.008 1 thru 20 21 or more Shielded Metallic Canister 0.07 0.007 1 thru 20 21 or more 5-13 Removal and Replacement 7925 Call or see your nearest Restricted Article Coordinator or the Restricted Article Coordinator at Hewlett-Packard Disc Memory Division (USA phone 208/376-6000) if you have any questions about how to declare and label a Restricted Article. To remove the spindle assembly (35, figure 6-2), proceed as follows: a. Perform the preparation for service outlined III paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the side panels. (Refer to paragraph 5-4.) e. Remove the front frame assembly (refer to paragraph 5-7) and then remove the pack chamber assembly (refer to paragraph 5-9,) f. On power and motor regulator PCA-A9, release the 1I4-turn fasteners and lower the PCA into its service position. I CAUTION I When removing the spindle assembly, do not attempt to remove the spindle hub. Damage to the disc drive will occur if removal of this component is attempted. g. From the bottom side of the mainframe, remove the four bolts with lockwashers (36 and 37, figure 6-2) that secure the spindle assembly to the mainframe. h. Disconnect the spindle motor wiring connector from the PMR PCA. I. Disconnect encoder PCA-AID cable connector. j. Lift the spindle assembly straight out from the mainframe. I CAUTION I The inner perimeter of the spindle hub may contain a series of tapped holes, some of which may contain items which appear to be setscrews. These items are balance weights and must not be touched. If any weight is moved, the spindle balance will be disturbed and damage to the disc drive will occur. 5-14 I CAUTION I The spindle assembly is a delicate device. Follow the removal/packaging instructions provided in the shipping package containing the replacement spindle assembly. To replace the spindle assembly, perform the above steps in the reverse order. Tighten the mounting bolts to 80 inch-pounds. Before replacing the pack chamber assembly, verify the head cam alignment. (Refer to paragraph 5-22.) Measure the absolute filter air pressure as outlined in paragraph 2-13. Verify data head alignment. (Refer to Section III, Alignment and Adjustment.) 5-25. ENCODER PCA-A10 REMOVAL AND REPLACEMENT To remove encoder peA-AID (4, figure 6-5), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front door and remove the front shield (15, figure 6-1). d. On encoder PCA-AlD, disconnect the cable connector. e. On encoder PCA-AlD, remove two screws (5, figure 6-5) and lift off the PCA. To replace encoder PCA-AlD, perform the above steps in the reverse order. I To replace encoder peA-AID, perform the above steps in the reverse order. When installing the two screws removed in step e, tighten them to 12 inch-pounds. 5-26. SPINDLE BOTTOM COVER I To replace the spindle bottom cover (6, figure 6-5), pro- ceed as follows: a. Perform the preparation for service outlined in para- graph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front door of the disc drive and remove the front shield (15, figure 6-1). Change 1 7925 Removal and Replacement Remove the bottom cover (6, figure 6-5) of the spindle. The spindle bottom cover is installed by reversing this procedure. When installing the bottom cover, tighten the three mounting screws (7) to 12 inch-pounds. 5-27. SPINDLE GROUND CONTACT AND ENCODER DISC I To replace the spindle ground contact (8, figure 6-5) or an encoder disc (9), proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Open the front door of the disc drive and remove the front shield (15, figure 6-1). Remove the bottom cover (6, figure 6-5) of the spindle. e. Remove encoder PCA-A10. (Refer to paragraph 5-25.) f. While holding the spindle motor hub, use a wrench to remove the spindle ground contact. g. If the encoder disc requires replacement, replace it with a new encoder disc. h. Place the encoder disc in position in the spindle. Note: I For proper operation of the disc drive the part number on the encoder disc must face toward the bottom cover (6) of the spindle. i. If the spindle ground contact requires replacement, replace it with a new spindle ground contact. j. Attach the spindle ground contact to the spindle shaft. k. Replace encoder PCA-A10. (Refer to paragraph 5-25.) I 1. Replace the bottom cover (6) of the spindle. m. Replace the front shield (15, figure 6-1). n. Restore ac power to the disc drive. 5-28. PACK LOCK To perform the pack lock replacement procedure requires the special tool package for the service kit, part number 07920-67802. To change a pack lock, proceed as follows: WARNING The lubricant (part no. 6040-0084) used in this procedure can cause Change 1 painful eye irritation upon contact and for some people skin inflammation (dermatitis). When using this lubricant, hand protection (latex gloves) should be worn and care should be taken to keep the lubricant away from eye tissue. Note: If the lubricant (part no. 6040-0084) gets on the skin, a waterless hand cleaner is recommended to remove the lubricant. a. If the disc drive is in an operating mode, set the RUN/STOP switch to STOP. b. Allow the spindle to halt (approximately 30 seconds). The DOOR UNLOCKED indicator will light, which means that the spindle has stopped rotating, the door unlock solenoid is energized, and it is safe to open the pack chamber door. c. Remove and store the disc pack. Be sure to leave the pack chamber door open. d. Disconnect the ac power cord from the ac mains power. e. Rotate the spindle hub (see figure 5-6) until one of the allen screws is visible through one of the large holes in the spindle hub. Remove the allen screw and replace it with the hub locking bushing. f. Remove the pack lock retainer (1, figure 6-5) using the pack lock retainer tool which fits on the 100 footpound torque wrench. Throw out the old retainer. g. Remove the pack lock assembly (2). Be sure to leave the compression spring (3) in the spindle assembly. Throw out the old pack lock assembly. ALLEN SCREW \ REF 7311-72 Figure 5-6. Spindle Screw Locations 5-15 Removal and Replacement 7925 h. U sing a cotton swab (part no. 8520-0023), spread a thin coat of lubricant (part no. 6040-0084) on the two flat surfaces on the sides of the pack lock assembly (2). 1. Insert the new pack lock assembly (2) into the spindle. Ensure that the bottom of the pack lock is centered in the compression spring (3). j. Insert the new pack lock retainer (1) and hand tighten the retainer into the spindle. Ensure that the pack lock moves freely up and down inside the retainer. k. Depress and release the pack lock assembly (2) and then, using a Kimwipe tissue, wipe off any excess lubricant from the top of the pack lock. Repeat this step until all excess lubricant has been removed. 1. Screw the pack lock retainer (1) down until it is flush with the top of the spindle. Tighten the pack lock retainer to 25 foot-pounds. m. Remove the hub locking bushing and replace with the allen head screw removed in step e. Tighten the allen head screw to 10 inch-pounds. (Refer to figure 5-6.) I CAUTION I To prevent damage to the disc drive from a possible head crash, ensure that the pack chamber area is clean. n. Clean the pack chamber and the top of the spindle as outlined in paragraph 2-17. o. Reconnect the ac power cord to the ac mains power and close the pack chamber door. 5-29. BLOWER MOTOR REMOVAL AND REPLACEMENT To remove the blower motor, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3,) d. Open the front door and remove the front shield (15, figure 6-1). e. Remove the prefilter assembly. (Refer to paragraph 5-5,) f. On the blower motor starting capacitor (14, figure 6-8), remove blower motor leads. 5-16 g. On the power supply assembly (22, figure 6-2), remove the safety cover (19). h. Disconnect lead 3 on power supply terminal block (30, figure 6-6). i. On power and motor regulator PCA-A9, release the 1/4-turn fasteners and lower the PCA into its service position. Disconnect the connectors on power and motor regulator PCA-A9 and remove the PCA. j. Remove four screws (6, figure 6-8) that secure the impeller cover assembly (5) to the mainframe and remove the impeller cover assembly. k. Loosen the setscrew (8) that attaches the impeller (7) to the blower motor shaft. 1. Remove the four screws (10) that secure the blower motor (9) to the mainframe. m. Remove the blower motor. To replace the blower motor, perform the above steps in the reverse order. When the blower motor is replaced, ensure the safety cover is replaced on the power supply assembly. 5-30. BLOWER MOTOR STARTING CAPACITOR REMOVAL AND REPLACEMENT To remove the blower motor starting capacitor, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the insulator cover and the wires from the blower motor starting capacitor. (Refer to figure 5-7.) e. Remove the top screw (13, figure 6-8) that secures the capacitor clamp (12) to the capacitor mounting bracket and remove the capacitor from the disc drive. To replace the blower motor starting capacitor, perform the above steps in the reverse order. 5-31. POWER SUPPLY ASSEMBLY REMOVAL AND REPLACEMENT To remove the power supply assembly, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. 7925 Removal and Replacement Green Wire (from blower motor) Blue Wire (from power supply) k. Disconnect the ground lead from the mainframe. 1. Lift the power supply assembly off the mainframe. To replace the power supply assembly, perform the above steps in the reverse order. Note: After the actuator assembly is installed, the head and circumferential alignment should be checked and adjusted, if necessary, as outlined in paragraphs 3-12 through 3-19. Red Wire (from blower motor) Note: Negative symbol stamped on the capacitor, below the terminals, should be on the down side (toward the casting) of the capacitor. REF 7311-58 Figure 5-7. Blower Motor Starting Capacitor b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the side panels. (Refer to paragraph 5-4.). e. Remove the actuator assembly. (Refer to paragraph 5-20.) Be extremely careful when handling the actuator assembly and connecting cables. f. On power and motor regulator PCA-A9, release the three 1/4-turn fasteners and lower the PCA into its service position. g. Disconnect the power cable connectors from power and motor regulator PCA-A9. h. Remove the safety cover (19, figure 6-2) from the power supply (22). On the input power terminal block (30, figure 6-6), remove the leads from terminals 1 and 3. 1. Remove harness cable retainer that is attached to the bottom of the mainframe. j. Remove the four bolts with washers (23 and 24, figure 6-2) that secure the power supply assembly to the mainframe. 5-32. DOOR LOCK ASSEMBLY REMOVAL AND REPLACEMENT To remove the door lock assembly, proceed as follows: a. Perform the preparation for service outlined in paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the shroud. (Refer to paragraph 5-3.) d. Remove the front frame assembly (refer to paragraph 5-7) and then remove the pack chamber assembly (refer to paragraph 5-9.) e. Remove the five screws (2, figure 6-4) that secure the door lock assembly to the pack chamber assembly and remove the assembly. To replace the door lock assembly, perform the above steps in the reverse order. When the pack chamber is replaced, measure the absolute filter air pressure as outlined in paragraph 2-13. 5-33. POWER PANEL ASSEMBLY REMOVAL AND REPLACEMENT To remove the power panel assembly (23, figure 6-1), proceed as follows: a. Perform the preparation for service outlined III paragraph 5-2. b. Disconnect the ac power cord from the ac mains power. c. Remove the rear shield (13, figure 6-1). d. Disconnect all cables passing through the opening in the power panel assembly to disc drive. Loosen the cable strain relief clamps at the bottom of the enclosure and withdraw the cables from the enclosure. e. Disconnect any power cords attached to the outlets on the power panel assembly. 5-17 Removal and Replacement 7925 f. Disconnect the power panel assembly grounding wire from the grounding stud at the bottom rear of the enclosure. g. Remove the four screws attaching the power panel assembly to the enclosure and remove the assembly. To replace the power panel assembly, perform the above steps in the reverse order. When the power panel assembly is replaced, ensure the grounding wire is connected to the enclosure. 5-18 REPLACEABLE PARTS I~ 6-1. INTRODUCTION This section provides listings of all field-replaceable parts and an illustrated parts breakdown for the disc drive, as well as replaceable part ordering information. Replaceable parts for the disc drive are listed in disassembly order in tables 6-1 through 6-12 and illustrated in figures 6-1 through 6-12. In each listing, attaching parts are listed immediately after the item they attach. Items in the DESCRIPTION column are indented to indicate relationship to the next higher assembly. In addition, the symbol "- - - x - - -" follows the last attaching part for that item. Indentation is as follows: MAJOR ASSEMBLY *Replaceable Assembly *Attaching Parts for Replaceable Assembly **Subassembly or Component Part **Attaching Parts for Subassembly or Component Part The replaceable parts listings provide the following information for each part: a. FIG. & INDEX NO. The figure and index number which indicates where the replaceable part is illustrated. b. HP PART NO. The Hewlett-Packard part number for each replaceable part. c. DESCRIPTION. The description of each replaceable part. Refer to table 6-13 for an explanation of abbreviations used in the DESCRIPTION column. d. MFR CODE. The five-digit code that denotes a typical manufacturer of a part. Refer to table 6-14 for a listing of manufacturers that correspond to the codes. e. MFR PART NO. The manufacturer's part number of each replaceable part. f. UNITS PER ASSEMBLY. The total quantity of each part used in the major assembly. The MFR CODE and MFR PART NO. for common hardware items are listed as 00000 and OBD (order by description), respectively, because these items can usually be purchased locally. 6-2. ORDERING INFORMATION To order replaceable parts for the disc drive, address the order to your local Hewlett-Packard Sales and Support Office. Sales and Support Offices are listed at the back of this manual. Specify the following information for each part ordered: a. Model and full serial number. b. Hewlett-Packard part number. c. Complete description for each part as provided in the replaceable parts listings. 6-1/6-2 7925 Replaceable Parts Table 6-1. HP 7925D Disc Drive, Replaceable Parts FIG.& INDEX NO. HP PART NO. DESCRIPTION MFR CODE MFR PART NO. UNITS PER ASSY 6-1- 79250 DISC DRIVE 28480 1 07925-60124 *SHROUD ASSEMBLY 28480 (Attaching Parts) 2 2680-0059 *SCREW, machine, ph, pozi, 10-32,0.750 in. long, w/ext tooth 00000 ---x--- 3 07925-60132 *PACK CHAMBER ASSEMBLY (See figure 6-4) 28480 4 No Number *MAINFRAME ASSEMBLY (See figure 6-2) 28480 (Attaching Parts) 5 2940-0055 *SCREW, cap, hex hd, 1/4-20,0.625 in. long 00000 ---x--- 6 7120-7288 *LABEL, head alignment and P.M. 28480 7 07925-60121 *DOOR, front 28480 8 07925-60137 *DOOR, rear 28480 8A 1390-0344 **LOCK 28480 8B 1600-0543 **LATCH, pawl 28480 8C 1390-0345 **KEY 28480 9 07925-60122 *PANEL, side 28480 (Attaching Parts) 10 2680-0244 *SCREW, machine, hex head, 10-32,0.375 in. long with 00000 indented flange lock ---x--- 11 07925-00042 *EXHAUST SHIELD 28480 (Attaching Parts) 12 2680-0285 *SCREW, machine, pozi, 10-32,0.625 in. long 00000 ---x--- 13 07925-00040 *REAR SHIELD 28480 (Attaching Parts) 14 2680-0285 *SCREW, machine, pozi, 10-32,0.625 in. long 00000 ---x--- 15 07925-60127 *FRONT SHIELD (S models) 28480 07925-60134 *FRONT SHIELD (M models) 28480 (Attaching Parts) 16 2680-0285 *SCREW, machine, pozi, 10-32,0.625 in. long 00000 ---x--- 17 0380-1649 *STANDOFF, hex 28480 18 3150-0316 *PREFILTER 28480 19 07925-60117 *PREFILTER CHAMBER 28480 (Attaching Parts) 20 1390-0388 *FASTENER, snap-in-grommet (for use with item 21) 28480 21 1390-0389 *FASTENER, snap-in-grommet (for use with item 20) 28480 ---x--- 22 8120-2371 *POWER CORD, 120 Vac 28480 8120-1860 *POWER CORD, 240 Vac (Option 015) 28480 8120-1689 *POWER CORD, 240 Vac (Option 015) 28480 8120-1369 *POWER CORD, 240 Vac (Option 015) 28480 8120-1351 *POWER CORD, 240 Vac (Option 015) 28480 8120-2104 *POWER CORD, 240 Vac (Option 015) 28480 23 29425-60029 *POWER PANEL ASSEMBLY (See figure 6-10) 28480 29425-60030 *POWER PANEL ASSEMBLY (Opt. 015) (See figure 6-10) 28480 (Attaching Parts) 24 2680-0285 *SCREW, machine, pozi, 10-32,0.500 in. long 00000 wlflat washer 25 0590-0804 *NUT, wlretainer, 10-32 00000 ---x--- 26 7101-0436 *PANEL, filler, rear 28480 (Attaching Parts) 27 2360-0115 *SCREW, machine, ph, pozi, 6-32, 0.312 in. long 00000 28 3050-0228 *WASHER, int-tooth, no. 6 00000 ---x--- 07925-60124 OBD 07925-60132 NSR OBD 7120-7288 07925-60121 07925-60137 1390-0344 1600-0543 1390-0345 07925-60122 OBD 07925-00042 OBD 07925-00040 OBD 07925-60127 07925-60134 OBD 0380-1649 3150-0316 07925-60117 1390-0388 1390-0389 8120-2371 8120-1860 8120-1689 8120-1369 8120-1351 8120-2104 29425-60029 29425-60030 OBD OBD 7101-0436 OBD OBD 1 2 1 1 6 1 1 1 1 1 2 I 2 8 1 4 1 I 4 1 REF I 4 2 1 1 2 2 1 REF REF REF REF REF 1 REF I 4 4 1 4 4 Change 1 6-3 Replaceable Parts 7925 Table 6-1. HP 7925D Disc Drive, Replaceable Parts (Continued) FIG. & INDEX NO. 6-129 30 31 32 33 34 35 36 37 38 39 40 41 HP PART NO. DESCRIPTION 07925-60123 2680-0244 07925-60126 2510-0045 2580-0003 07920-60084 0590-0804 1492-0081 2940-0214 0403-0246 1460-1570 2510-0254 8120-2880 *PANEL, filler, front (Attaching Parts) *SCREW, machine, hex head, 10-32,0.375 in. long, with indented flange lock ---x--*TERMINATION ASSEMBLY (See figure 6-12) (Attaching Parts) *SCREW, machine, ph, pozi, 6-32, 0.375 in. long *NUT, hex, 8-32, w/lock ---x--*FRAME, enclosure HNUT, sheet metal, 10-32 HCASTER (Attaching Parts) HSCREW, cap, hex hd, w/washer, 5/16-18,0.625 in. long ---x--HLEVELER HSPRING LATCH (Attaching Parts) HSCREW, machine, hex indented flange lock, 8-32, 0.375 in. long ---x--*POWER INTERCONNECT CABLE MFR CODE 28480 00000 28480 00000 00000 28480 00000 28480 00000 28480 28480 00000 28480 07925-90911 07925-90912 13037-90911 130130 132130 13356A 130370 The following items are provided with the disc drive but are not shown in figure 6-1. 79250 Oisc Drive User's Manual 79250 Oisc Drive Installation Manual Oisc Controller Installation and Service Manual (7925M only) Multi-Unit Cable Oata Cable Oisc Pack (see figure 6-11) Oisc Controller (7925M only) 28480 28480 28480 28480 28480 28480 28480 MFR PART NO. 07925-60123 aBO 07925-60126 aBO aBO 07920-60084 aBO 1492-0081 aBO 0403-0246 1460-1570 aBO 8120-2880 07925-90911 07925-90912 13037 -90911 130130 132130 13356A 130370 UNITS PER ASSY 1 2 1 2 2 1 6 4 4 4 2 1 1 1 1 1 1 1 1 1 6-4 7925 Replaceable Parts Change 1 Figure6-1. HP 7925D Disc DrI.ve, Exploded V·lew 6-5/6-6 7925 Replaceable Parts Table 6-2. Mainframe Assembly, Replaceable Parts FIG. & INDEX NO. HP PART NO. DESCRIPTION MFR CODE MFR PART NO. UNITS PER ASSY 6-2- No Number MAINFRAME ASSEMBLY (4, figure 6-1) 28480 1 07925-00053 *PREAMP SHIELD 28480 (Attaching Parts) 2 2510-0045 *SCREW, machine, pozi, ph, 0.375 in. long, w/ext-tooth 00000 ---x--- 3 2510-0043 *SCREW, machine, fh, pozi, 8-32, 0.375 in. long, w/ext-tooth 00000 4 3050-0001 *WASHER, flat, no. 8 00000 5 07925-00056 *BRACKET, cable mounting 28480 6 2420-0001 *NUT, hex, 6-32, w/ext-tooth 00000 7 2190-0142 *WASHER, flat, no. 6 00000 8 07906-00047 *COVER, card cage 28480 9 07925-60001 *1/0 SECTOR PCA (A2) 28480 10 07920-60183 *SERVO PCA (A3) 28480 11 07925-60002 *DRIVE CONTROL PCA (A4) 28480 12 07925-60105 *TRACK FOLLOWER PCA (A5) 28480 13 07925-60133 *CARD CAGE CHASSIS 28480 14 0403-0102 "GUIDE, PCA, nylon, 6.5 in. long, 0.312 in. wide 23880 15 07925-60106 *READ/WRITE PREAMPLIFIER PCA (A6) 28480 16 07925-60008 *MOTHERBOARD PCA (A7) 28480 (Attaching Parts) 17 2510-0045 *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth 00000 ---x--- 18 7120-8039 *LABEL, warning 28480 19 07920-00100 *COVER, terminal block 28480 (Attaching Parts) 20 2200-0155 *SCREW, machine, ph, pozi, no. 4-40, 1.00 in. long 00000 21 2190-0913 *WASHER, lock, split, no. 4 00000 ---x--- 22 07925-60084 *POWER SUPPLY ASSEMBLY (See figure 6-6) 28480 (Attaching Parts) 23 2940-0055 *SCREW, cap, hex hd, 1/4-20,0.625 in. long 00000 24 2190-0032 *WASHER, lock, split, 1/4 in. 00000 ---x--- 25 07920-00084 ·SHIELD, contamination 28480 (Attaching parts) 26 2510-0045 *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth . 00000 ---x--- 27 07925-60033 *HEAD ASSEMBLY, read/write (down) 28480 28 07920-60114 *HEAD ASSEMBLY, servo 28480 29 07925-60032 *HEAD ASSEMBLY, read/write (up) 28480 30 07920-60097 *ACTUATOR ASSEMBLY (See figure 6-7) 28480 (Attaching parts) 31 3020-0006 *SCREW, cap, socket hd, 1/4-20, 1.25 in. long 00000 32 2190-0032 ·WASHER, lock, split, 1/4 in. 00000 ---x--- 33 07925-60079 *PACK DETECTOR ASSEMBLY 28480 (Attaching parts) 34 2200-0105 *SCREW, machine, ph, pozi, 4-40, 0.312 in. long, w/ext-tooth 00000 ---x--- 35 07925-60112 *SPINDLE ASSEMBLY (See figure 6-5) 28480 (Attaching Parts) 36 3020-0006 *SCREW, cap, socket hd, 1/4-20, 1.25 in. long 00000 37 2190-0032 *WASHER, lock, split, 1/4 in. 00000 ---x--- 38 07925-60074 *HUB LOCK 28480 (Attaching Parts) 39 3030-0735 *SCREW, shoulder, 6-32 28480 40 1460-0629 *SPRING, hub lock 28480 ---x--- No Number 07925-00053 OBD OBD OBD 07925-00056 OBD OBD 07906-00047 07925-60001 07920-60183 07925-60002 07925-60105 07925-60133 1650F 07925-60106 07925-60008 OBD 7120-8039 07920-00100 OBD OBD 07925-60084 OBD OBD 07920-00084 OBD 07925-60033 07920-60114 07925-60032 07920-60097 OBD OBD 07925-60079 OBD 07925-60112 OBD OBD 07925-60074 3030-0735 1460-0629 REF 1 3 2 2 2 I 2 1 1 1 1 1 1 10 1 1 4 1 1 2 2 1 4 4 1 2 2 1 3 1 4 4 1 2 1 4 4 1 1 1 Change 1 6-7 Replaceable Parts 7925 Table 6-2. Mainframe Assembly, Replaceable Parts (Continued) FIG. & INDEX NO. 6-241 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 HP PART NO. DESCRIPTION 07925-60131 2510-0045 No Number 07925-00028 2360-0196 07925-60031 07920-40007 2510-0105 07925-60010 2110-0516 2110-0513 07920-40008 0624-0397 07920-20063 07920-00056 2360-0137 3050-0228 2420-0001 1400-0851 0890-1147 07920-60048 07925-00029 2510-0045 3050-0001 07925-60146 2510-0045 2190-0758 No Number *FRONT FRAME ASSEMBLY (See figure 6-3) (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth ---x--*OPERATOR PANEL AND LOWER CARD CAGE ASSEMBLY (See figure 6-9) *RETAINER, spindle logic PCA (Attaching Parts) *SCREW, machine, pozi, 6-32, 0.375 in. long ---x--*SPINOLE LOGIC PCA (A8) *HINGE, female *SCREW, machine, ph, pozi, 8-32, 0.438 in. long *POWER AND MOTOR REGULATOR (A9) **FUSE, 1A, 125V, fast-blo **FUSE, 0.125A, 125V, fast-blo *HINGE, male (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.438 in. long ---x--*OUCT, air *FIN, air duct *SCREW, machine, ph, pozi, 6-32, 1.75 in. long *WASHER, flat, no. 6 *NUT, 6-32, hex, w/lock washer *CLAMP, hose *HOSE, air *FAULT INDICATOR CABLE ASSEMBLY *SUPPORT, harness (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in., w/ext-tooth *WASHER, flat, no. 8 ---x--*SIOE PLATE ASSEMBLY (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth *WASHER, flat, no. 8 ---x--*AIR DISTRIBUTION ASSEMBLY (See figure 6-8) MFR CODE 28480 00000 28480 28480 00000 28480 28480 00000 28480 75915 75915 28480 00000 28480 28480 00000 00000 00000 81646 28480 28480 28480 00000 00000 28480 00000 00000 28480 MFR PART NO. 07925-60131 OBO No Number 07925-00028 OBO 07925-60031 07920-40007 OBO 07925-60010 78-154 273.125 07920-40008 OBO 07920-20063 07920-00056 OBO OBO OBO 6206 0890-1147 07920-60048 07925-00029 OBO OBO 07925-60146 OBO OBO No Number UNITS PER ASSY 1 4 1 1 1 1 3 3 1 1 1 3 3 1 1 2 4 2 1 1 1 1 2 2 1 2 2 1 6-8 7925 Replaceable Parts REF 7311-60C Figure 6-2. Mainframe Assembly, Exploded View 6-9 Replaceable Parts 7925 Table 6-3. Front Frame Assembly, Replaceable Parts FIG. & INDEX NO. 6-31 2 3 4 5 6 7 8 9 10 11 HP PART NO. DESCRIPTION 07925-60131 07920-60011 2200-0107 3050-0105 0380-0019 2140-0209 3101-1051 3130-0103 2190-0102 2950-0035 07925-60053 7120-7460 7120-7459 FRONT FRAME ASSEMBLY (41, figure 6-2) *INDICATOR ASSEMBLY (A11) (Attaching Parts) *SCREW, machine, ph, pozi, 4-40, 0.375 in. long, w/ext-tooth *WASHER, flat, no. 4 *SPACER, no. 4, 0.188 in. thick ---x--*LAMP, incandescent, 14V *SWITCH, toggle, SPDT (Attaching Parts) *NUT, face *WASHER, lock, int-tooth, 7/16 in. *NUT, hex, 15/32-32 ---x--*FRONT PANEL ASSEMBLY **7920 IDENTIFICATION LABEL **7925 IDENTIFICATION LABEL MFR CODE 28480 28480 00000 00000 76854 01236 27191 28480 00000 00000 28480 28480 28480 MFR PART NO. 07925-60131 07920-60011 OBO OBD 10918-412 382 8908K507 3130-0103 OBD OBD 07925-60053 7120-7460 7120-7459 UNITS PER ASSY REF 1 4 4 4 5 1 1 1 1 1 1 1 7301-24D 6-10 Figure 6-3. Front Frame Assembly, Exploded View 7925 Replaceable Parts Table 6-4. Pack Chamber Assembly, Replaceable Parts FIG. & INDEX NO. HP PART NO. DESCRIPTION MFR CODE MFR PART NO. UNITS PER ASSY 6-4- 07925-60132 PACK CHAMBER ASSEMBLY (3, figure 6-1) 28480 1 7120-5729 **13394 DISC PACK LABEL (HP 7920) 28480 7120-6798 **13356 DISC PACK LABEL (HP 7925) 28480 07920-60054 *OOOR LOCK ASSEMBLY 28480 (Attaching Parts) 2 2360-0121 *SCREW, machine, ph, pOli, 6-32, 0.375 in. long, w/ext-tooth 00000 3 3050-0228 *WASHER, flat, no. 6 00000 ---x--- 4 1480-0073 **PIN, roll 28480 5 1480-0073 **PIN, roll 28480 6 1530-1933 **SHAFT, lock 28480 7 07920-40010 **TIP, lock shaft 28480 8 0570-1153 **SCREW, shoulder, 8-32 28480 9 2200-0141 **SCREW, machine, ph, pOli, 4-40, 0.312 in. long, w/ext-tooth 00000 10 3050-0229 **WASHER, flat, no. 4 00000 11 1480-0127 **PIN, roll 28480 12 07920-00009 **LEVER, latch 28480 13 1901-0028 **SEMICONOUCTOR DEVICE, diode 04713 14 0491-0079 **SOLENOIO, door unlock 02289 15 3102-0009 **SWITCH, door locked 28480 (Attaching Parts) 16 0520-0141 **SCREW, machine, ph, pOli, 2-56, 1.0 in. long 00000 17 0610-0001 **NUT, hex, 2-56 00000 18 2190-0045 **WASHER, lock, split, no. 2 00000 19 2190-0479 **WASHER, flat, no. 2 00000 ---x--- 20 3102-0009 **SWITCH, door closed 28480 (Attaching Parts) 21 0520-0136 **SCREW, machine, ph, pOli, 2-56, 0.625 in. long 00000 22 0610-0001 **NUT, hex, 2-56 00000 23 2190-0045 **WASHER, lock, split, no. 2 00000 24 2190-0479 **WASHER, flat, no. 2 00000 ---x--- 25 1530-1935 **SHAFT, door detect 28480 26 1460-1533 **SPRING 28480 27 0380-0627 **STANOOFF, round, 4-40, 0.188 in. long 28480 28 07920-00039 **BRACKET, connector mounting 28480 (Attaching Parts) 29 2360-0113 **SCREW, machine, ph, pOli, 6-32, 0.250 in. long, w/ext-tooth 00000 ---x--- 30 0050-0067 **MOUNT, latch 28480 31 No Number **CONNECTOR ASSEMBLY 28480 32 1390-0685 *LATCH, door 28480 (Attaching Parts) 33 2360-0117 *SCREW, machine, ph, pOli, 6-32, 0.375 in. long 00000 34 07920-00109 *LATCH RETAINER 28480 ---x--- 35 07920-40022 *HANOLE, spanner 28480 (Attaching Parts) 36 2200-0167 *SCREW, machine, fh, pOli, 82-deg, 4-40, 0.375 in. long 00000 ---x--- 37 07920-60099 *ACCESS DOOR HANDLE ASSEMBLY 28480 38 1460-0565 *SPRING 28480 39 07925-00059 *PLATE, snapslide 28480 (Attaching Parts) 40 2360-0184 *SCREW, machine, fh, pOli, 82-deg, 0.312 in. long 00000 ---x--- 41 07920-00071 *PLATE, snapslide 28480 (Attaching Parts) 2360-0184 *SCREW, machine, fh, pOli, 82-deg, 0.312 in. long 00000 ---x--- 07925-60132 7120-5729 7120-6798 07920-60054 aBO aBO 1480-0073 1480-0073 1530-1933 07920-40010 0570-1153 aBO aBO 1480-0127 07920-00009 SR1358-9 SOA151201 3102-0009 aBO aBO aBO aBO 3102-0009 aBO aBO aBO aBO 1530-1935 1460-1533 0380-0627 07920-00039 aBO 0050-0067 NSR 1390-0685 aBO 07920-00109 07920-40022 aBO 07920-60099 1460-0565 07925-00059 aBO 07920-00071 aBO REF 1 1 1 5 5 1 1 1 1 1 2 2 2 1 1 1 1 I 2 2 2 4 1 2 2 2 4 1 1 1 1 2 1 I 1 2 4 2 1 6 1 2 1 2 3 2 Change 1 6-11 Replaceable Parts 7925 Table 6-4. Pack Chamber Assembly, Replaceable Parts (Continued) FIG. & INDEX NO. HP PART NO. DESCRIPTION 6-4- 42 07920-20051 *STUO, door detect 43 0403-0101 *GUIOE, PCA, nylon, 2.5 in. long, 0.312 in. wide 44 07920-00091 *BRACKET, preamplifier retainer (When replacing this part, order item 43 also.) (Attaching Parts) 45 0570-0901 *SCREW, knurled, 6-32, 0.25 in. long 46 2190-0008 *WASHER, lock, ext-tooth, no. 6 ---x--- I 47 48 49 07920-20076 07920-00082 1460-1540 *BLaCK, hinge *CaVER, hinge *SPRING, hinge 50 07920-40014 *RETAINER, spring MFR CODE MFR PART NO. 28480 23880 28480 07920-20051 1250F 07920-00091 00000 00000 28480 28480 28480 28480 aBO aBO 07920-20076 07920-00082 1460-1540 07920-40014 UNITS PER ASSY 1 1 1 2 2 2 2 2 2 6-12 Change 1 7925 Replaceable P arts 35 47 I 32-tt 3433~ -~i!.:.~,:~ F1' 9ure 6-4, P ack Chamber Assembly, Exploded Vl'eW Change 1 6-13 Replaceable Parts 7925 Table 6-5. Spindle Assembly, Replaceable Parts FIG. & INDEX NO. 6-5- 1 2 3 4 5 6 7 8 9 10 HP PART NO. 07925-60112 07925-60109 No Number No Number 1460-0813 07920-60009 2510-0315 07925-60114 2510-0315 07905-60031 07920-00016 No Number DESCRIPTION . SPINDLE ASSEMBLY (36, figure 6-2) *PACK LOCK AND RETAINER ASSEMBLY HRETAINER, pack lock **PACK LOCK ASSEMBLY *SPRING, compression *ENCODER PCA (A10) (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/scw ---x--- *COVER ASSEMBLY, spindle, bottom (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/scw ---x--- *SPINDLE GROUND CONTACT *DISC, encoder *MOTOR, spindle MFR CODE 28480 28480 28480 28480 28480 28480 00000 28480 00000 28480 28480 28480 MFR PART NO. 07925-60112 07925-60109 NSR NSR 1460-0813 07920-60009 OBD 07925-60114 OBD 07905-60031 07920-00016 NSR UNITS PER ASSY REF 1 1 1 1 1 2 1 3 1 1 1 7301-26B 6-14 7 Figure 6-5. Spindle Assembly, Exploded View Change 1 7925 Replaceable Parts Table 6-6. Power Supply Assembly, Replaceable Parts FIG.& INDEX NO. 6-61 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 HP PART NO." DESCRIPTION 07925-60084 07920-00101 2360-0115 3050-0228 1906-0205 2420-0001 2190-0464 0380-0549 2680-0099 2190-0034 0698-3640 2360-0117 2190-0464 2360-0117 2190-0464 2510-0109 2580-0003 2360-0201 2420-0001 0180-1958 0180-0539 0180-1970 0180-2859 1210-0013 0180-0540 0180-0542 2360-0117 2200-0149 2190-0913 3050-0229 0360-1918 0360-0625 07920-00098 2360-0115 07920-20062 2360-0121 2950-0004 2190-0740 3050-0225 0570-1003 7100-0238 9100-4057 2360-0181 07920-00099 2510-0120 2110-0565 2110-0383 2110-0043 2110-0098 2110-0569 2110-0566 No Number 2510-0120 07920-00096 0400-0056 POWER SUPPLY ASSEMBLY (22, figure 6-2) *COVER, capacitor (Attaching Parts) *SCREW, machine, ph, pozi, w/ext-tooth, no. 6-32, 0.312 in. *WASH ER, flat, no. 6 ---x--*OIOOE (CR1, CR2, and CR3) (Attaching Parts) *NUT, hex, no. 6-32, w/ext-tooth *WASH ER, flat, no. 6 *SPACER, round, no. 8, 0.125 in. ---x--*SCREW, machine, ph, pozi, no. 10-32,0.375 in. *WASHER, lock, split, no. 10 *RESISTOR, 1.8k ±5% (R1 thru R5) *SCREW, machine, ph, pozi, w/ext-tooth, no. 6-32, 0.375 in. *WASH ER, flat, no. 6 *SCREW, machine, ph, pozi, w/ext-tooth, no. 6-32,0.375 in. *WASHER, flat, no. 6 *SCREW, machine, ph, pozi, no. 8-32, 0.625 in. *NUT, hex, no. 8-32, w/ext-tooth *SCREW, machine, ph, pozi, no. 6-32, 0.5 in. *NUT, hex, no. 6-32, w/ext-tooth *CLAMP, capacitor (used on C1 and C2) *CAPACITOR, 41,000 /-LF, +75% -10%,50 Vdc (C1 and C2) *CLAMP, capacitor (used on C3) *CAPACITOR, 8300 /-LF, +75% -10%,15 Vdc (C3) *CLAMP, capacitor (used on C4 and C5) *CAPACITOR, 8400 /-LF, +75% -10%, 30 Vdc (C4) *CAPACITOR, 4400 /-LF, +75% -10%, 30 Vdc (C5) *SCREW, machine, ph, pozi, w/ext-tooth, 0.375 in. *SCREW, machine, ph, pozi, no. 4-40, 0.625 in. *WASHER, lock, split, no. 4 *WASHER, flat, no. 4 *BLOCK, barrier (TB1) *STRIP, marker *BRACKET, barrier block *SCREW, machine, ph, pozi, w/ext-tooth, no. 6-32, 0.312 in. *BLOCK, ground (Attaching Parts) *SCREW, machine, ph, pozi, w/ext-tooth, no. 6-32, 0.50 in. ---x--*NUT, hex, 1/4-20 *WASHER, lock, split, 1/4-in. *WASHER, flat, 114-in. *SCREW, cap, hex, 1/4-20,3.25 in. *COVER, transformer *TRANSFORMER, power (T1) *SCREW, machine, 82-deg, fh, pozi, no. 6-32, 0.250 in. *COVER, fuse *SCREW, machine, 82-deg, th, pozi, no. 8-32, 0.312 in. *FUSEHOLOER, cap *FUSE, 8A, 250V slo-blo (F2, F3, and F4) *FUSE, 1.5A, 250V (F5 and F6) *FUSE, 20A, 125V medium-blo (F7, F8, and F9) *NUT, fuseholder *FUSEHOLOER, body *BRACKET, fuse *SCREW, machine, 82-deg, fh, pozi, no. 8-32, 0.312 in. *BRACKET, transformer *BUSHING, snap-in, forO.375 in. hole MFR CODE 28480 28480 00000 00000 28480 00000 00000 00000 00000 00000 28480 00000 00000 00000 00000 00000 00000 00000 00000 28480 28480 28480 28480 28480 28480 28480 00000 00000 00000 00000 28480 28480 28480 00000 28480 00000 00000 00000 00000 00000 28480 28480 00000 28480 00000 28480 28480 28480 28480 28480 28480 28480 00000 28480 28480 MFR PART NO. 07925-60084 07920-00101 OBO OBO 1906-0205 OBO OBO OBO OBO OBO 0698-3640 OBO OBO OBO OBO OBO OBO OBO OBO 0180-1958 0180-0539 0180-1970 0180-2859 1210-0013 0180-0540 0180-0542 OBO OBO OBO OBO 0360-1918 0360-0625 07920-00098 OBO 07920-20062 OBO OBO OBO OBO OBO 7100-0238 9100-4057 OBO 07920-00099 OBO 2110-0565 2110-0383 2110-0043 2110-0098 2110-0569 2110-0566 NSR OBO 07920-00096 0400-0056 UNITS PER ASSV 1 1 2 2 3 1 1 1 10 10 5 3 3 10 10 3 3 2 2 2 2 1 1 2 1 1 2 2 2 2 1 1 1 10 1 2 4 4 8 4 1 1 2 1 2 8 3 2 3 8 8 1 2 1 1 6-15 Replaceable Parts 7925 Table 6-6. Power Supply Assembly, Replaceable Parts (Continued) FIG. & INDEX NO. 6-653 54 HP PART NO. DESCRIPTION 0340-0597 *BUSHING, snap-in, for 1.000 in. hole No Number *BRACKET, capacitor MFR CODE 28480 28480 MFR PART NO. 0340-0597 NSR UNITS PER ASSY 1 1 I 6-16 7925 Replaceable Parts 20 20 38 39 45 31 30 " \ r 1 2 49 34 33 10 REF 7311-36A Figure 6-6. Power Supply Assembly, Exploded View 6-17 Replaceable Parts Table 6-7. Actuator Assembly, Replaceable Parts FIG.& INDEX NO. 6-7- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 HP PART NO. DESCRIPTION 07920-60097 07905-60046 2200-0166 07930-60226 0520-0127 1990-0615 0624-0314 07920-60017 2200-0121 2200-0145 3050-0229 4040-1102 2200-0105 3050-0229 0050-1986 2360-0121 2190-0851 07920-40023 2360-0123 0360-0108 0150-0093 0360-0628 2360-0113 0360-0108 No Number No Number No Number No Number No Number 07920-40026 3030-0925 3050-0229 07925-00001 0520-0155 ACTUATOR ASSEMBLY (30, figure 6-2) *VELOCITY TRANSDUCER (Attaching Parts) *SCREW, machine, pozi, 82-deg fh, 4-40, 0.312 in. long ---x--*SHAFT, velocity transducer (Attaching Parts) *SETSCREW, hex drive, 2-56, 0.187 in. long ---x--*PHOTOSWITCH, carriage-back detector (Attaching Parts) ·SCREW, self-tapping, 4-20, 0.375 in. long ---x--*SOLENOIO, carriage latch assembly (Attaching Parts) *SCREW, machine, ph, pozi, 4-40, 1.125 in. long *SCREW, machine, ph, pozi, 4-40, 0.438 in. long *WASHER, flat, no. 4 ---x--*CAM, head (Attaching Parts) *SCREW, machine, ph, pozi, 4-40, 0.312 in. long, w/ext-tooth *WASHER, flat, no. 4 ---x--*SUPPORT, head cam (Attaching Parts) *SCREW, machine, ph, pozi, 6-32, 0.500 in. long *WASHER, lock, split, no. 6 ---x--*SHIELO, coil band (Attaching Parts) *SCREW, machine, ph, pozi, 6-32, 0.625 in. long, w/ext-tooth *LUG, solder ---x--*CAPACITOR, 0.01 IlF, 100 Vdc, +80 -20%, cer *TERMINAL (Attaching Parts) *SCREW, machine, ph, pozi, 6-32, 0.250 in. long, w/ext-tooth *LUG, ground ---x--*SCREW, machine, pozi, 82-deg fh, 4-40, 0.438 in. long *CLAMP, crash stop *CRASH STOP *COILICARRIAGE ASSEMBLY *MAGNET/RAIL ASSEMBLY *HEAO SCREW FASTENER BLOCK *SCREW, socket hd cap, 4-40, 0.5 in. long *WASHER, flat, no. 4 *RETAINER (Attaching Parts) *SCREW, machine, ph, pozi, 2-56, 0.125 in. long ---x--- MFR CODE 28480 28480 00000 28480 00000 28480 00000 28480 00000 00000 00000 28480 00000 00000 28480 00000 00000 28480 28480 28480 82560 28480 00000 28480 00000 28480 28480 28480 28480 28480 00000 00000 28480 00000 MFR PART NO. 07920-60097 07905-60046 OBO 07930-60226 OBO 1990-0615 OBO 07920-6001 7 OBO OBO OBO 4040-1102 OBO OBO 0050-1986 OBO OBO 07920-40023 07920-40023 0360-0108 TA.01 80/20 0360-0628 OBO 0360-0108 NSR NSR NSR NSR NSR 07920-40026 OBO OBO 07925-00001 OBO 7925 UNITS PER ASSY REF 1 2 1 1 1 2 1 1 1 2 2 2 2 2 2 2 1 2 2 2 2 4 2 4 2 2 1 1 2 6 6 1 2 6-18 7925 Replaceable Parts ~Jl 3 /~I~~/.#~ /4. V: 1 r/ '~~31 'I 30 Q .g~ \3'-.... ~ (27, figure 6-2) (29, figure 6-2) .V -... ~ ~ ~ ~ (27, figure 6-2) (29, figure 6-2) (28, figure 6-2) :::::::::::::: :::::::::::::: 7311-65A Figure 6-7. Actuator Assembly, Exploded View 6-19 Replaceable Parts 7925 Table 6-8. Air Distribution Assembly, Replaceable Parts FIG. & INDEX NO. 6-8- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 HP PART NO. No Number 3150-0340 0570-1175 1400-0851 0890-1147 07920-60068 2510-0045 3160-0292 3030-0939 3140-0671 2510-0108 0340-0761 1400-0513 2360-0195 0160-0585 07920-00059 2510-0045 No Number DESCRIPTION AIR OISTRI BUTION ASSEMBLY (68, figure 6-2) *FILTER, absolute (Attaching Parts) *SCREW, thumb, 8-32, 0.375 in. long ---x--*CLAMP, hose *HOSE, air (60, figure 6-2) *IMPELLER COVER ASSEMBLY (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth ---x--*IMPELLER (Attaching Parts) *SETSCREW, hex, locking, 1/4-20,0.375 in. long ---x--*MOTOR, blower, 115 Vac, 3300 rpm (Attaching Parts) *SCREW, machine, 1OO-deg, fh, pozi, 8-32, 0.625 in. long ---x--*INSULATOR COVER, terminal *CLAMP, capacitor (Attaching Parts) *SCREW, machine, ph, pozi, 6-32, 0.312 in. long, w/ext-tooth ---x--*CAPACITOR, fxd, paper, 5 p.F, ±100f0, 370 VAC *BRACKET, capacitor mounting (Attaching Parts) *SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth ---x--*CASTING, mainframe MFR CODE 28480 28480 73734 81646 28480 28480 00000 28480 28480 28480 00000 90201 28480 00000 56289 28480 00000 28480 MFR PART NO. No Number 3150-0340 33302 6206 0890-1147 07920-60068 OBO 3160-0292 3030-0939 3140-0671 OBO OC-1 1400-0513 OBO 500P9032 07920-00059 OBO NSR UNITS PER ASSY REF 1 2 1 REF 1 4 1 1 1 4 1 1 2 1 1 2 1 6-20 7925 Replaceable Parts I ~10 Figure 6-8. Air D.lstribU fIOn Assembly, Exploded Vl' ew 6-21 Replaceable Parts 7925 Table 6-9. Operator Panel and Lower Card Cage Assembly, Replaceable Parts FIG. & INDEX NO. 6-9- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HP PART NO. DESCRIPTION No Number 07925-60049 0380-0174 07920-60030 2260-0002 2190-0061 07905-80040 3100-1700 2950-0001 2190-0016 07925-00011 2360-0115 07925-00015 2360-0121 3050-0228 2360-0113 07920-00043 2510-0045 3050-0001 0403-0302 1251-0334 2260-0009 3050-0229 2200-0147 07920-00041 OPERATOR PANEL AND LOWER CARD CAGE ASSEMBLY (43, figure 6-2) *OPERATOR PANEL ASSEMBLY (Attaching Parts) *SCREW, machine, ph, pozi, 4-40, 0.250 in. long, w/ext-tooth ---x--**FAULT INDICATOR PCA (A12) (Attaching Parts) **NUT, hex, 4-40 **WASHER, lock, split no. 4 ---x--**KNOB **SWITCH, rotary, eight-position (Attaching Parts) **NUT, hex, 3/8-32 **WASHER, lock, int-tooth, 3/8 in. ---x--**PANEL *SCREW, machine, ph, pozi, 6-32, 0.312 in. long, w/ext-tooth *ENCLOSURE, operator panel *SCREW, machine, ph, pozi, 4-40, 0.250 in. long, w/ext-tooth *WASHER, flat, no. 6 *SCREW, machine, ph, pozi, 6-32, 0.250 in. long, w/ext-tooth *PLATE, bottom, card cage *SCREW, machine, ph, 8-32,0.375 in. long *WASHER, flat, no. 8 *GUIOE, PCA, nylon, 8.0 in. long, 0.312 in. wide *CONNECTOR, edge, 36-pin (Attaching Parts) *NUT, hex, 4-40, w/ext-tooth *WASHER, flat, no. 4 *SCREW, machine, ph, pozi, 4-40, 0.5 in. long ---x--*CARO CAGE, lower MFR CODE 28480 28480 28480 28480 00000 00000 28480 11237 00000 00000 28480 00000 28480 00000 00000 00000 28480 00000 00000 28480 71785 00000 00000 00000 28480 MFR PART NO. No Number 07925-60049 0380-0174 07920-60030 OBO OBO 07905-80040 X5P12700B OBO OBO 07925-00011 OBO 07925-00015 OBO OBO OBO 07920-00043 OBO OBO 0403-0302 251-18-30-261 OBO OBO OBO 07920-00041 UNITS PER ASSY REF 1 4 1 2 2 1 1 2 2 1 3 1 2 2 2 1 4 4 2 1 2 4 2 1 6-22 7925 Replaceable Parts 19 9 <0 1 10 5 7301-90 Figure 6-9. Operator Panel and Lower Card Cage Assembly, Exploded View 6-23 Replaceable Parts 7925 Table 6-10. Power Panel Assembly, Replaceable Parts FIG. & INDEX NO. I 6-10- 1 2 I 3 4 5 6 7 I 8 9 10 11 12 13 14 15 16 17 18 I 19 20 21 22 23 24 25 26 27 28 29 30 31 32 I 33 34 35 36 37 38 HP PART NO. DESCRIPTION 29425-60029 29425-60030 29425-00012 29425-00013 2360-0115 2360-0192 2680-0129 2190-0467 2360-0115 29425-60016 29425-00014 29425-60028 2360-0115 2360-0115 29425-60017 2360-0115 29425-60018 2110-0565 2110-0383 2110-0365 3101-2399 8120-1478 0400-0013 29425-60008 2680-0129 2190-0467 29425-00017 1600-0555 2360-0115 2190-0464 3160-0092 2360-0125 2190-0464 2420-0001 3160-0341 3160-0342 2360-0125 2420-0001 2200-0140 29425-00024 2200-0140 29425-00023 8160-0460 29425-00025 POWER PANEL ASSEMBLY (22, figure 4-1) POWER PANEL ASSEMBLY (Option 015) (22, figure 4-1) *ACCESS PLATE *ACCESS PLATE (Option 015) (Attaching Parts) *SCREW, mach, pnh, pozi, 6-32, 0.312 in., w/ext-tooth ---x--*SCREW, mach, 100-deg fh, pozi, 6-32, 0.25 in. *SCREW, mach, pnh, pozi, 10-32,0.312 in. *WASHER, lock, w/ext-tooth, no. 10 *SCREW, mach, pnh, pozi, 6-32,0.312 in., w/ext-tooth *RECEPTACLE PLATE ASSEMBLY *PLATE, bottom *INDUCTOR ASSEMBLY (Option 015) (Attaching Parts) *SCREW, mach, pnh, pozi, 6-32, 0.312 in., w/ext-tooth ---x--*SCREW, mach, pnh, pozi, 6-32, 0.312 in., w/ext-tooth *L1NE FILTER ASSEMBLY *SCREW, mach, pnh, pozi, 6-32, 0.312 in., w/ext-tooth *SWITCH ASSEMBLY **CAP, fuseholder **FUSE, 8A, 250V, Sio-Blo **FUSE, 4A, 250V, Sio-Blo (Option 015) **SWITCH, rocker, DPDT *CORD, fan *GROMMET *CABLE ASSEMBLY, ground strap (Attaching Parts) *SCREW, mach, pnh, pozi, 10-32,0.312 in. *WASHER, lock, w/ext-tooth, no. 10 ---x--*CHASSIS, power panel *SHUTTER (Attaching Parts) *SCREW, mach, pnh, pozi, 6-32, 0.312 in., w/ext-tooth *WASHER, flat, no. 6 ---x--*GUARD, fan (Attaching Parts) *SCREW, mach, pnh, pozi, 6-32, 0.75 in., w/ext-tooth *WASHER, flat, no. 6 *NUT, hex, no. 6-32, w/ext-tooth ---x--*FAN, 120 Vac *FAN, 240 Vac (Option 015) (Attaching Parts) *SCREW, mach, pnh, pozi, 6-32, 0.75 in., w/ext-tooth *NUT, hex, no. 6-32, w/ext-tooth ---x--*SCREW, mach, 100-deg fh, pozi, 4-40, 0.25 in. *RETAINER, top, RFI shield *SCREW, mach, 1OO-deg fh, pozi, 4-40, 0.25 in. *RETAINER, SIDE, RFI shield *RFI SHIELD STRIP, 2.33 feet *PANEL MFR CODE 28480 28480 28480 28480 OBD 00000 00000 00000 00000 28480 28480 28480 0000 00000 28480 00000 28480 28480 71607 71607 09353 28480 28480 28480 00000 00000 28480 28480 00000 00000 28480 00000 00000 00000 28875 28875 00000 00000 00000 28480 00000 28480 28480 28480 MFR PART NO. 29425-60029 29425-60030 29425-00012 29425-00013 4 OBD OBD OBD OBD 29425-60016 29425-00014 29425-60028 OBD OBD 29425-60017 OBD 29425-60018 2110-0565 MDA-8 MDA-4AMP 9221J3Z4Q 0400-0013 0400-0013 29425-60008 OBD OBD 29425-00017 1600-0555 2 OBD 3160-0092 OBD OBD OBD BS21 07F-51 OH BS21 07F-531 H OBD OBD OBD 29425-00024 OBD 29425-00023 8160-0460 29425-00025 UNITS PER ASSY REF REF 1 REF 4 1 2 4 1 1 REF 4 2 1 3 1 1 1 REF 1 1 1 1 1 2 1 1 2 1 4 4 4 1 REF 4 4 4 1 4 2 1 1 6-24 Change 1 7925 Replaceable Parts 23 8 (Option 015) REF 7604-6E Change 1 35,36 37 25 ~2 Figure 6-10. Power Panel Assembly, Exploded View 6-25 Replaceable Parts Table 6-11. Disc Pack, Replaceable Parts FIG.& INDEX NO. 6-111 and 2 1 2 3 HP PART NO. 13356A 13356-60003 No Number No Number No Number DISC PACK *COVER ASSEMBLY ** BOTTOM COVER **TOP COVER *DISC ASSEMBLY DESCRIPTION MFR CODE 28480 28480 28480 28480 28480 MFR PART NO. 13356A 13356-60003 NSR NSR NSR 7925 UNITS PER ASSY REF 1 1 1 1 6-26 7925 Replaceable Parts \~/~----2 / / // -~ ~ . -------- 11:--------3 7301-91 Figure 6-11. Disc Pack, Exploded View 6-27 Replaceable Parts 7925 Table 6-12. Termination Assembly, Replaceable Parts FIG.& INDEX NO. 6-12- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HP PART NO. DESCRIPTION 07925-60126 2580-0003 2510-0045 07920-60096 07920-60037 2200-0141 2190-0376 07920-00106 5061-1386 2260-0009 2190-0376 2200-0147 2420-0001 2360-0117 07906-00055 07925-00050 0380-0529 2360-0117 07905-8001 0 07905-60039 07925-60116 2360-0121 TERMINATION ASSEMBLY (31, figure 6-1) (Attaching Parts) *NUT, hex, 8-32, w/ext-tooth *SCREW, machine, ph, pozi, 8-32, 0.375 in. long ---x--*CABLE, data *OATA COUPLER PCA (Attaching Parts) *SCREW, machine, ph, pozi, 4-40, 0.312 in. long *WASHER, flat, no. 4 ---x--*OATA COUPLER BRACKET *INTERCONNECT ASSEMBLY (Attaching Parts) *NUT, hex, 4-40 *WASHER, flat, no. 4 *SCREW, machine, ph, pozi, 4-40, 0.500 in. long ---x--*NUT, hex, 6-32, w/ext-tooth *SCREW, machine, ph, pozi, 6-32, 0.375 in. long *TERMINATIOR BRACKET *TERMINATOR MOUNTING BRACKET *STANOOFF, hex, 1.25 in. long *SCREW, machine, ph, pozi, 6-32, 0.375 in. long *CABLE-TO-CABLE ADAPTER *TERMINATOR PCA (For last disc drive in the series) *CABLE, control *SCREW, machine, ph, pozi, 6-32, 0.50 in. long, w/ext-tooth The following item is shown but is not part of the terminator assembly. 21 130130 MULTI-UNIT CABLE MFR· CODE 28480 00000 00000 28480 28480 00000 00000 28480 28480 00000 00000 00000 00000 00000 28480 28480 00000 00000 28480 28480 28480 00000 28480 MFR PART NO. 07925-60126 OBO OBO 07920-60096 07920-60037 OBO OBO 07920-00106 5061-1386 OBO OBO OBO OBO OBO 07906-00055 07925-00050 OBO OBO 07905-80010 07905-60039 07925-60116 OBO 130130 UNITS PER ASSY REF 4 4 1 1 2 2 1 1 2 2 2 2 2 1 1 2 2 1 1 1 2 1 6-28 7925 7 1,2 - Replaceable Parts 16 20 \ 20 7301-8C Figure 6-12. Termination Assembly, Exploded View 6-29 Replaceable Parts 7925 Table 6-13. Reference Designations and Abbreviations A = assembly B = blower, fan, motor, synchro C = capacitor CB = circuit breaker CR = diode OS = indicator lamp E = contact, miscellaneous electrical part F = fuse FL = filter H = hardware A ac AR assy = ampere(s) = alternating current = as required = assembly brkt c C cer cm comp conn = bracket = centi(10-2) = Celsius, centigrade = ceramic = centimetre = composition = connector d dc deg dia dpdt dpst = deci(10-1) = direct current = degree(s) = diameter = double-pole, double-throw = double-pole, single-throw elctlt encap ext = electrolytic = encapsulated = external F = Fahrenheit, farad fb = fast blow fh = flat head fig. = figure filh = fillister head flm = film fw = full wave fxd = fixed G = giga(109 ) Ge = germanium H = henry, henries hd = head hex = hexagon, hexagonal hlcl = helical Hz = Hertz REFERENCE DESIGNATIONS J = jack, receptacle connector T K = relay TB L = inductor TP M = meter U MP = mechanical part P = plug connector VR Q = semicondu,ctor device other W than diode or integrated circuit R = resistor X RT = thermistor Y S = switch Z = transformer = terminal board = test point = integrated circuit, non- repairable assembly = voltage retulator = cable assembly (with connec- tors), wire = socket = crystal unit = network, tuned circuit ABBREVIATIONS 10 in. incand incl inti 1/0 = inside diameter = inch, inches = incandescent = include(s) = internal = input/output k = kilo (103), kilohm kg = kilogram Ib LED Ih = pound = light-emitting diode = left hand M m mach mb met oxd mfr misc mm mtg My = mega (106 ), megohm = milli (10-3 ) = machine = medium blow = metal oxide = manufacturer = miscellaneous = millimetre = mounting = Mylar n n.c. no. n.o. NSR ntd = nano (10-9 ) = normally closed = number = normally open = not separately replaceable = no time delay aBO 00 ovh oxd p PCA phh pnh Pia pot pozi = order by description = outside diameter = oval head = oxide = pico (10-12) = printed-circuit assembly = phillips head = pan head = part of = potentiometer = Pozidriv qty = quantity rdh = round head rect = rectifier ref = reference rf = radio frequency rfi = radio frequency interference rh = right hand rpm = revolutions per minute rwv = reverse working voltage sb SCR scw Se Si slftpg spdt spst sst stl sw = slow blow = semiconductor-controlled rectifier = square cone washer = selenium = silicon = self-tapping = single-pole, double throw = single-pole, single throw = stainless steel = steel = switch T = TORX® screw Ta = tantalum tgl = toggle thd = thread Ti = titanium tol = tolerance U (Il) = micro (10-6) V var Vdcw = volt(s) = variable = direct current working volts W = watt(s) wi = with WIV = inverse working volts ww = wire-wound TORX® is a registered trademark of the Camcar Division of Textron, Inc. 5/83 6-30 7925 Replaceable Parts Table 6-14. Code List of Manufacturers The following code numbers are extracted from the Federal Supply Code for Manufacturers Cataloging Handbooks H4-1, and H4-2, and their supplements. CODE NO. MANUFACTURER CODE ADDRESS NO. MANUFACTURER ADDRESS 01974 02289 04549 04713 11237 23880 27191 28480 28875 GE Company, Motor Dept.. ......... Fort Wayne, IN Hi-G, Inc....................... Windsor Locks, CT Dzus Fastener Co., Inc............... West Islip, NY Motorola, Inc. Semiconductor Products Div........ Phoenix, AZ CTS Keene, Inc. .................. Paso Robles, CA Stanford Applied Eng., Inc......... Santa Clara, CA Cutler-Hammer, Inc., Power Distribution and Control Div....... Milwaukee, WI Hewlett-Packard Co.................. Palo Alto, CA IMC Magnetics Corp., NH Div........ Rochester, NH 56289 71607 71785 73734 75915 76854 81646 82560 90201 Sprague Electric Co.............. North Adams, MA McGraw Edison, Co., Bussman Mfg. Div. . . . . . ... . . . . .. . . .. Bristol, CT TRW Electronic Components, Cinch Div.................. Elk Grove Village, IL Federal Screw Products Co. ........... . Chicago, IL Littelfuse, Inc. ..................... Des Plaines, IL Oak Industries, Inc., Switch Div...... Crystal Lake, IL Ideal Corp.......................... New York, NY Radio Materials Co.....................Chicago, IL Mallory Capacitor Co............... Indianapolis, IN 6-31/6-32 APPENDIX A HP 7925H DISC DRIVE SERVICE PREFACE This appendix adds service information for the HP 7925H Disc Drive. In general, the information given in the main manual is applicable to the HP 7925H, with the following exceptions: SECTION I - THEORY OF OPERATION · All paragraphs SECTION II - MAINTENANCE · Special Test Equipment (paragraph 2-7) · Preventive Maintenance (paragraph 2-10) SECTION III - ALIGNMENT AND ADJUSTMENT · Installing the DSU (paragraph 3-9) · On-Line Checkout (paragraph 3-20) SECTION IV - TROUBLESHOOTING · All paragraphs SECTION V - REMOVAL AND REPLACEMENT · Printed Circuit Card Removal and Replacement (paragraph 5-10) SECTION VI - REPLACEABLE PARTS · Introduction (paragraph 6-1) These exceptions are fully described in Parts I through VI of this appendix. In addition, Part VII provides a description of the HP 7925H recording format and communications protocol. For a detailed description of the HP 7925H command set, refer to the HP 13365 Integrated Controller Programming Guide, part no. 13365-90901. A-ii Part I THEORY OF OPERATION Introduction Addressing Structure Addressing Modes Surface Mode " Cylinder Mode Sector Format Functional Description Controller Microprocessor Module Eight-Bit Microprocessqr Read-Only Memory (ROM) Operation Control Registers HP-IB Interface Module Data Path Module FIFO and Data Serializer/ Deserializer Data Formatter Data Separator CRC Generator/Checker DMA Machine Operation Control System Drive Identification Drive Operation Control Access Not Ready Drive Not Ready Seek Check First Status Drive Fault Format '" Read Only Attention Attention Logic Spindle Rotation System Spindle Logic Initialization Door Control Logic Run Spindle Command Logic Phase Encoding and Decoding Speed Control Motor Current Regulation Dynamic Braking Speed Down Detection Overcurrent Protection Overvoltage Protection Head Positioning System Initial Head Load Operation Normal Head Unload Operation Seek Operation Offset Operation Recalibrate Operation Emergency Retract Operation Sector Sensing System ReadlWrite System Head Selection Read Mode Operation Write Mode Operation ReadlWrite Fault Detection Fault Detection System Illegal Address Detection Page A-I A-I A-I A-I A-3 A-3 A-4 A-4 A-9 A-9 A-9 A-9 A-IO ~ . A-IO A-IO 0' · A-IO A-IO '" A-10 A-IO A-IO A-IO A-IO A-II A-ll A-II A-II A-II '" A-12 A-12 A-12 A-12 A-12 A-12 A-12 '" A-12 A-13 A-13 A-14 A-15 A-15 A-15 A-15 A-15 A-16 A-17 A-18 A-21 A-22 A-23 A-23 A-24 A-24 A-25 A-25 A-26 A-26 A-26 CONTENTS I Timeout Fault Detection " AGC Fault Detection Carriage Back 'Fault Detection Interlock Fault Detection ReadlWrite Fault Detection Non-destructive Write Faults Destructive Write Faults Air Circulation and Filtration System Power Distribution System Power Panel Assembly Power Supply Assembly Voltage. Regulator Circuits Voltage Protection Circuits Supply Voltage Distribution Part II MAINTENANCE Special Test Equipment _ Preventive Maintenance Part III ALIGNMENT AND ADJUSTMENT Installing the DSU On-Line Checkout ~ Part IV TROUBLESHOOTING Diagnostic Test Programs Self Test Modes of Operation Operating Mode Service Mode Self-Test Example Troubleshooting Flowcharts Power Sources Visual Indication of Drive Status Disc Service Unit System Functional Diagrams Wiring Connections Power Distribution Part V REMOVAL AND REPLACEMENT Card Cage PCA's Self-Test PCA-AI3 Card Cage Fan Part VI REPLACEABLE PARTS Introduction Part VII RECORDING FORMAT AND COMMUNICATION PROTOCOL Introduction Recording Format Channel Communications Idle States Controller Secondaries ' A-27 A-27 A-27 A-27 A-28 A-28 A-29 A-29 A-30 A-3I A-3I A-3I A-32 A-32 Page A-33 A-33 Page A-35 A-35 Page A-37 A-37 A-37 A-38 A-38 A-38 A-38 A-38 A-39 A-39 A-39 A-39 A-39 Page A-75 A-75 A-76 Page A-77 Page A-81 A-8I A-82 A-84 A-84 A-iii I ILLUSTRATIONS Title Page Addressing Structure of an HP 7925H Disc Drive .. A-2 Sector Clock and Index Generation A-3 Logical vs. Physical Sectors A-3 Surface Mode vs. Cylinder Mode A-4 HP 7925H Sector Format A-5 HP 7925H Disc Drive Simplified Block Diagram A-6 Phase Selection Timing A-14 HP 7925H Servo and Data Track Assignments A-19 HP 7925H Air Circulation and Filtration System A-30 Types of Contaminants and Critical Elements A-31 110 Sector PCA, part no. 07925-60001 A-33 Self-Test Controls and Indicators A-40 HP 7925H Power-Up Troubleshooting Flowchart .. A-48 HP 7925H Integrated Controller, Functional Diagram A-49 HP 7925H Mainframe Assembly, Wiring Diagram A-51 HP 7925H Operation Control System, Functional Diagram A-53 Title HP 7925H Spindle Rotation System, Functional Diagram HP 7925H Head Positioning System, Functional Diagram HP 7925H Sector Sensing System, Functional Diagram HP 7925H ReadlWrite System, Functional Diagram HP 7925H Fault Detection System, Functional Diagram HP 7925D Disc Drive - Part Changes for HP 7925H Mainframe Assembly - Part Changes for HP 7925H Bit Numbering Notation Track and Sector Format Sequence Protocol. " General Form of Secondary Page A-55 A-57 A-59 A-61 A-63 A-78 A-79 A-81 A-82 A-83 A-84 I TABLES Title Controller Mnemonics Operation Control Command Signals Status Word Bit Assignments Write Current Reduction vs. Cylinder Address Summary of Timeout Conditions Fault Events Self-Test Control Operation ~ Self-Test Function Test Description Test Failure Summary Page A-7 A-II A-ll A-26 A-27 A-28 A-41 A-42 A-45 Title Visual Indication of Drive Status HP 7925H Motherboard PCA-A7 Signal Distribution List HP 7925H Power Distribution List HP 7925D Disc Drive - Part Changes for HP 7925H Mainframe Assembly - Part Changes for HP 7925H ' Controller Secondaries Coding Summary Page A-47 A-65 A-73 A-78 A-79 A-83 A-iv PART I - THEORY OF OPERATION A-1. INTRODUCTION This Part contains a brief introduction to the HP 7925H Disc Drive addressing structure, the HP 7925H environment, the functional makeup of the HP 7925H, the format of the disc data surfaces, and a list of mnemonics and abbreviations. Also provided is a detailed discussion of the integrated controller and each of the eight systems which compose the drive function. The principal difference between the HP 7925H and the HP 7925 Disc Drive described in the main manual is that the HP 13037 Disc Controller used by the HP 7925 is replaced by disc controller circuitry contained within the HP 7925H. This integrated controller (hereafter referred to as the controller) provides a simple interface between the Hewlett-Packard Interface Bus (HP-IB) and the HP 7925H. (See figure A-I.) The characteristics of the controller permit up to four HP 7925H's to be interfaced to a single HP-IB channel. Upon receipt of command sequences via the HP-IB, the controller decodes and generates all of the necessary timing sequences for the disc drive. In addition, the controller handles all of the input/ output communications with the HP-IB controller-incharge. A self-test function incorporated in the controller assists in isolating certain malfunctions to the printedcircuit assemblies (PCA's) and other components of the disc drive. A-2. ADDRESSING STRUCTURE The disc pack used with this disc drive is comprised of seven discs. The top and bottom discs provide physical protection for the five center discs. These five center discs provide nine data surfaces and one servo surface. As shown in figure A-I, the disc drive accesses data on the nine data surfaces with nine read/write or data heads. Head positioning information and sector clocking are derived from the fifth (servo) surface through a read only or servo head. There are 815 ensured cylinder positions available for data storage. Cylinder addresses range from zero to 822. Each data cylinder consists of nine data tracks, one on each data surface. Tracks are addressed when both cylinder and head addresses are specified. Each data track is divided into 64 physical data sectors. Sectors are addressed when both head and sector addresses are specified for a given cylinder. Head addresses range from zero to 8 and sector addresses range from zero to 63. The physical location of each data sector is determined by counting clock transitions which are derived from the servo code written on the servo surface (see figure A-2L There are 53,760 clock pulses produced per revolution (2.42 MHz at 2700 rpm). A unique index pattern is encoded on the servo track between physical sectors 0 and 63. It is used to sense the start of physical sector O. The sector counting electronics counts these clock transitions to keep track of the physical sectors as they pass beneath the heads, and when the index pattern is detected at the end of each revolution, it resets its counter to zero and begins counting for the next revolution. The disc drive keeps track of physical sectors as they pass beneath the heads. The controller, on the other hand, deals only with logical sectors in order to minimize system intervention during automatic head and/or track switching. This feature of the controller enables multiple sector operations to continue beyond the end of a track without waiting for another revolution of the disc to take place. Logical sectors are staggered as the tracks progress downward through the cylinder, so that sector 63 on the next track will follow sector 63 on the current track (see figure A-3). This logical structuring of sectors permits the controller to verify the address fields and track status of sector 63 on the new track and then immediately continue with the data transfer to sector 0 of the new track. The. mapping from logical sector to physical sector is performed by the controller microcode before the sector address is transferred to the disc drive. An inverse mapping operation occurs in the case where the disc drive returns its present sector address in response to a controller command. A-3. ADDRESSING MODES The controller operates in two modes, the surface mode and the cylinder mode, to access the data storage areas of the disc drive. (See figure A-4.) The following paragraphs discuss controller/disc drive operations in the two modes. A-4. SURFACE MODE In the surface mode of operation, only one head is selected. The head is positioned over a particular track and then data is written or read starting with the lowest numbered track and continuing to the highest numbered track. A surface of information therefore consists of all sectors on all tracks at a given head address. Data transfers will continue with sector 0 of the next track after the address fields and track status indicators of sector 63 of that track have been verified by the controller. This process continues until there is no more data or no more storage space left on this surface of the disc. A-I Appendix A 7925 HP-IB CONTROLLER IN CHARGE (CIC) HP INTERFACE BUS (HP-IB) CONTENTS ON.E HP-IB CIC UP TO 4 DISC DRIVES PER CIC - - - - CONTROLLER DISC DRIVE CONTROLLER ---- DISC DRIVE -CO-NT-RO- LLE-R DISC DRIVE CONTROLLER DISC DRIVE HP 7925H NO.1 /' HP 7925H NO.2 HP 7925H NO.3 HP 7925H NO.4 " 823 CYLINDERS PER DRIVE 9 DATA HEADS 1 SERVO HEAD PER DRIVE o CARRIAGE ASSEMBLY SERVO 4 6 8 HEAD~ 64 SECTORS PER TRACK UPPER AND LOWER PROTECTIVE DISCS NOTE: A TRACK IS SELECTED WHEN A CYLINDER AND A HEAD ARE SPECIFIED 7311-91 A-2 Figure A-I. Addressing Structure of an HP 7925H Disc Drive 7925 Appendix A track status indicators of sector 63 of that track have been verified by the controller. An end-of-cylinder will occur after the data in sector 63 of the last track has been transferred. Cylinder switching (a seek operation) may take place at this time and the process repeated. NOTES: 1. SERVO CODE = 6720 (MINUS 3) DI-BITS PER REVOLUTION. 2. SECTOR CLOCK = 53,760 CYCLES PER REVOLUTION (2.42 MHz AT 2700 RPM). 3. ONE INDEX PULSE IS GENERATED PER REVOLUTION. 7311-33A Figure A-2. Sector Clock and Index Generation A-5. CYLINDER MODE In the cylinder mode of operation, the heads are positioned over a particular cylinder and then data is written or read starting with the lowest numbered head and continuing to the highest numbered head. A cylinder of information therefore consists of all sectors on all tracks at a given cylinder address. Head switching occurs after the data in sector 63 of the current track has been transferred. Head switching is sequential, that is, head 1 will be selected after head 0, and so forth. Data transfers will continue with sector 0 of the next track after the address fields and A-5. SECTOR FORMAT The smallest addressable data storage area on a data surface is a data sector (see figure A-5). Accessing a data sector is accomplished when the controller specifies the address of the cylinder, head, and sector. Each data sector contains a 30-byte preamble, a 256-byte data field, and a 14-byte postamble. The 30-byte preamble is used for synchronization and addressing purposes. It is comprised of a 24-byte sync field; a 2-byte sync field; a 2-byte cylinder address field; and a 2-byte field which specifies the head and sector addresses and provides the spare, protected, and defective track status indicators. The data field is used to store 256 bytes of data. Each byte is defined as being 8-bits. Only the data field is transferred to and from the system during most data operations. The preamble and postamble are normally generated and checked by the controller. The 14-byte postamble consists of a cyclic redundancy check (eRC) word and 12 bytes of error correction code. The controller generates the CRC information during a write operation and appends it to the other information written in the sector. The check information itself depends on the value of every bit from the first bit in the sync word to the last bit in the data field. During a read operation, .... 4 3 2 o SECTOR o 63 62 .... H ~2 D 3 63 62 61 4 62 61 60 ~INDEXZONE T 7311-34 Figure A-3. Logical vs. Physical Sectors A-3 Appendix A 7925 ~ SECTOR 0,1, 2 ... SECTOR ... 61, 62, 63·~ TRACK N TRACK N + 1 TRACK N + 2 SURFACE MODE HEAD t SERVO 4 6 SURFACE ff= ~CYUNDERN CYLINDER N + 1 CYLINDER N + 2 j II II II L:J DATA L:J II II L:J DATA DATA L:J II II L:J DATA SERVO L:J II II L:J DATA DATA L:J II DATA ==I I DATA DATA CYLINDER MODE 7311-35 Figure A-4. Surface Mode vs. Cylinder Mode this check information is regenerated and compared in such a way that the presence of errors is detected. The present controller will not support error correction and writes an arbitrary pattern in the 12-byte error correction code (ECC) field. The HP 13356A Formatted Disc Pack is formatted in this fashion and it must be used as the removable storage media for this disc drive. A-7. FUNCTIONAL DESCRIPTION The disc drive is organized into the controller and eight functional systems. (See figure A-6.l These eight functional systems are the operation control system, spindle rotation system, head positioning system, sector sensing system, read/write system, fault detection system, air circulation and filtration system, and power distribution system. Each of these functional systems is discussed in detail in the following paragraphs. In addition, a functional block diagram is provided for each system in Part IV, Troubleshooting. An alphabetic listing of each signal mnemonic, a source and destination signal list, and a mainframe wiring diagram are also provided in Part IV, Troubleshooting. The controller consists of three modules: an HP-IB device interface module, a microprocessor module, and a data path module. In addition, the controller includes a number of operation control registers. The HP-IB device interface module provides a logical interface between the HP-IB and the controller. The microprocessor module handles all of the communications and command interpretations for the controller and in turn generates most of the timing and all of the control signals needed by the controller and the disc drive. The data path module contains the circuitry necessary for the proper transfer of data bidirectionally between the controller and the disc drive. The operation control registers appear to the microprocessor as a bank of I/O registers through which the microprocessor controls and monitors the state of the disc drive operation control and sector sensing systems. The spindle rotation system provides power to the spindle motor and maintains spindle speed at 2700 revolutions per minute. It also operates the pack chamber assembly door lock mechanism. The head positioning system controls the loading and unloading of heads under both normal and abnormal (fault) circumstances. The operation control system interfaces between the controller and the disc drive. The sector sensing system continually monitors the physical sector presently passing beneath the heads. The controller is notified when the present sector equals the addressed sector. This information is also used to enable the read/write system for a data transfer operation. The read/write system provides the means to read information from a data surface or write information onto a data surface. The fault detection system continually monitors various conditions within the disc drive, and lights fault indicators, retracts the heads, and brakes spindle rotation when a fault is detected. The air circulation and filtration system provides cooling air to the heat generating components of the disc drive and cool filtered air to the pack chamber. The power distribution system supplies all operating voltages to the controller and the seven other disc drive systems. A-B. CONTROLLER The controller provides a simple interface between the HP-IB and a disc drive having a storage capacity of 120 megabytes. Upon receipt of command sequences via the HP-IB, the controller decodes and generates all the necessary timing and control signals for the disc drive. The controller also handles all of the input/output communications with the HP-lB. A-4 7925 SECTOR 63 SECTOR 0 Appendix A SECTOR 1 CD PREAMBLE 30 BYTES CD DATA 256 BYTES 2 BYTES 14 BYTES ® CRC @ ECC 2 BYTES 12 BYTES SYNC WORD CYLINDER 8 76 5 8 CD PREAMBLE - 30 BYTES FOR SYNCHRONIZATION AND ADDRESSING <y DATA - 256 BYTES OF DATA Go) POSTAMBLE - DATA CHECKING AND ERROR CORRECTION INFORMATION SYNC FIELD - 24 BYTES (192 BITS) OF'O'S @ SYNC - SYNC WORD - 1003768 IF ECC FIELD IS VALID 1003778 OTHERWISE @ CYLAD - CYLINDER - CYLINDER ADDRESS G) HSAD - S - IF "1", SPARE TRACK IN ACTIVE USE (BIT 8) P - IF "1", PROTECTED TRACK (BIT 7) D - IF "1", DEFECTIVE TRACK (BIT 6) HEAD - HEAD ADDRESS (BITS 5 -1) SECTOR - SECTOR ADDRESS (BITS 8-11 ® CRC - CYCLIC REDUNDANCY CHECK - 2 BYTES OF CHECK INFQRMATION @ ECC - ERROR CORRECTION CODE - 12 BYTES OF CHECK AND CORRECTION INFORMATION.* *NOT WRITTEN OR READ BY HP 7925H. 7311-92 Figure A-5. HP 7925H Sector Format A·5 Appendix A 7925 ~~~~~~RJ~----------------------------------------------------1 I comRm.LER - - - - - - - - - - 1 I I I READ/WRITE DATA LINES ..----DATA ----., DISC PACK ACTUATOR ASSEMBL Y L FROM PR~~~~--+ I SOURCE I I I I I I I LI -+----+f SERVO L_-_--l~-y--II------t---- CODE - - - - ' SPINDLE ~MOTDR LIGHT FAULT INDICATORS . .......J 7311-93 Figure A-6. HP 7925H Disc Drive Simplified Block Diagram The controller is a microprocessor-based design, interfacing to the HP-IB through the HP-manufactured Processor-to-HP-IB-Interface (PHI) integrated circuit. The HP-IB protocol used in the controller is compatible with the requirement of other HP-IB disc subsystems. The controller command set (the set of legal commands passed as data for the secondary get command) is a proper subset of the HP 12745 (HP 13037 Disc Controller!HP-IB) subsystem command set. A general description of the controller command protocol is contained in Part VII of this appendix. For a detailed description of the controller command structure, refer to the HP 13365 Integrated Controller Programming Guide, part no. 13365-90901. The controller consists of two printed-circuit assemblies (PCA's) which reside in the card cage of the disc drive. A functional diagram of the controller is provided in figure A-14 and table A-I describes the signal mnemonics used in the diagram. Microprocessor PCA-A2 of the controller replaces I/O sector PCA-A2 of the HP 7925 Disc Drive while retaining the necessary sector circuitry. Data PCA-AI of the controller occupies the previously unused Al slot in the disc drive card cage. Self-test PCA-A13, mounted inside the rear door of the disc drive and connected by cable to data PCA-A1, contains the controller self-test controls and indicators and the HP-IB input! output connector. All of the electrical power required by the controller is drawn from the disc drive power supplies. In the controller, all data transferred during a read or write operation flows through the PHI integrated circuit and a 16-byte first-in, first-out (FIFO) buffer memory. Therefore, the maximum number of bytes of data that the controller can buffer is 24. In order to guarantee no loss of data, an HP-IB channel with a transfer rate of greater than 900 kilobytes is required. A user can request normal or full-sector data transfer. During a normal READ or WRITE, only the actual 256 data bytes within the sector are transferred, whereas in a READ FULL SECTOR or WRITE FULL SECTOR the preamble and postamble information is also transferred. Thus, a full sector consists of 6 bytes of preamble, 256 bytes of data, 2 bytes of Cyclic Redundancy Check (CRC) bits and 12 bytes reserved for Error Correcting Code (ECC) information - a total of 276 bytes. The controller does not support ECC and all error checking is handled by CRC. However, all disc packs written by the controller and the HP 13037 Disc Controller are interchangeable. There is also a VERIFY command, in which the controller reads from the disc as in a normal READ, checking the CRC bytes, but not transferring data to the HP-IB. This command is used mainly to check for possible disc data errors. During a READ or WRITE (normal or FULL SECTOR), a hardware DMA configuration handshakes data between the FIFO and the PHI chip. The microprocessor is used only to switch the data path between the actual data and the CRC bytes. Between each sector of a multi-sector transfer, the microprocessor checks for errors and addresses the next sector to be transferred. A-6 7925 Appendix A MNEMONIC Table A-I. Controller Mnemonics SIGNAL FUNCTION ADBI0-7 ADBO 0-7 AlU ClK AlU IMM ANYER ATN CARRY CBUSl CBUSU DAV DDB, DDB DIO 1-8 DT DTYPE EOI EOT EOW ERE EXADBOE EXRAREN HDREG IE IFC IFIFO Data Input Bus Data Output Bus ALU Clock AlU Immediate Any Error Attention (ground true) Carry Bit Control Bus, lower Byte Control Bus, Upper Byte Data Valid (ground true) Differential Data Bus Data Input/Output Data Test Drive Type End or Identify (ground true) End of Transmission End of Word External ROM Enable External AlU Output Data Bus Enable External Clear External RAR Enable Head Register Input Enable Interface Clear Input from FIFO Eight-bit bus providing input data for microprocessor. Eight-bit bus carrying data from microprocessor. Clock having a 75-percent duty cycle and 276 nanosecond period that runs ALU chips, Program Status register, and Output Address decoder. Allows data byte from microcode word to be used by ALU or output through ALU. Flag indicating that an error has been detected by cyclic re.dundancy check (CRC) circuit during a read or verify. Bidirectional HP-IB control signal. Flag indicating that a one has been moved left from most significant bit of ALU by a shift or arithmetic operation. Enables loading output register containing lower byte of cylinder address or offset value. Enables loading output register containing upper bits of cylinder address or offset or T-bit and select. Bidirectional HP-IB control line. Serial data between formatter/separator and read/write circuitry. Eight-bit wide HP-IB bidirectional data bus. Signal from Self-Test output register to formatter/separator enabling data loopback. Enables reading of input register containing drive type, rotational position sensing (RPS) enable, sector compare, and device address. Bidirectional HP-IB control line. Flag from DMA handshake logic to microprocessor indicating that read or write of a sector is complete. Flag from data path End-of-Word counter indicating that a byte has been clocked to/from formatter/separator circuitry. Grounding this line turns off internal PROMS, allowing external microcode store to be connected to microprocessor PCA-A2 via connector A2J2. Grounding this line allows output data bus to be driveR from connector J1 of microprocessor PCA-A2. Grounding this line on connector J2 of microprocessor PCA-A2 resets microprocessor to zero memory location. Signal action is similar to PON. Grounding this line on connector J2 of microprocessor PCA-A2 allows microcode memory to be addressed via connector J2 of PCA-A2. Enables loading of Head Register from data output bus. Enables loading of AlU from bidirectional buffer via input data bus. Bidirectional HP-IB control line. Enables transfer of data from first-in-first-out memory (FIFO) to AlU. A-7 Appendix A 7925 Table A-I. Controller Mnemonics (Continued) MNEMONIC SIGNAL FUNCTION IL INPHI INTCW ISTSW LED 0-3 LSB MSB NDAC NRFD NTORE OE OFIFO OPHI OVRFLO OVRUN Interlock Input from PHI chip Internal Control Word Initiate Self-Test Switch Light Self-Test LED Least Significant Byte Most Significant Bit Data Accepted (ground true) Ready for Data (ground true) Not Output Register Empty Output Enable Output to FIFO Output to PHI Overflow Overrun PHEAD PHICW PON PSECT RAR 0-11 RC RCP Physical Head PHI Control Word Power on Preset Physical Sector ROM Address Register Read Clock Read Clock Pulses RD REN RES ROM 0-23 ROR 0-23 Read Data Remote Enable Reset ROM Output Memory ROM Output Register Completes interlock path on motherboard PCA-A7. Enables transfer of data from PHI to ALU. Enables loading of Internal Control Word output register. This register sets up data path operations. Flag from self-test panel to microprocessor which starts selftest sequence. Four lines from Self-Test output register to self-test panel. Flag indicating that least significant bit of ALU output byte is a one. Flag indicating that most significant bit of ALU output byte is a one. Bidirectional HP-IB control line. Bidirectional HP-IB control line. Flag indicating presence of data in FIFO. Enables transfer of data from ALU to bidirectional buffer over output data bus. Enables data transfer from ALU to FIFO via bidirectional buffer. Enables data transfer from ALU to PHI chip via bidirectional buffer. Flag indicating an overflow in ALU during an arithmetic operation. Flag indicating either FIFO going empty during a write operation or FI FO overflowing during a read operation. (Indicates failure of HP-IB or CPU to keep up.) Enables head register to pass current head address to ALU via input data bus. Enables data to pass from ALU to PHI Control Word register, setting up parameters for transfer to or from PHI chip. Connects to disc drive NDPS line and resets microcode. Enables number of sector currently under heads to be transmitted from Physical Sector register to ALU. Twelve-bit address of next microcode word. A 7.5-MHz read clock generated by separator circuitry during a read or verify operation. Special read clock for word counter. Not enabled during formatter/separator loopback self test when write clock only is " used. Serial data from separator during read or verify operations. A bidirectional HP-IB control line. Signal generated from PON to clear various registers in microprocessor. Output of currently addressed microcode memory location. Latched microcode word representing current microprocessor instruction. A-8 7925 Appendix A Table A-l. Controller Mnemonics (Continued) MNEMONIC SIGNAL FUNCTION SCTRG SERSW SRO STAT 2 STINP --- STFAIL Sector Register Service Switch Service Request Status Two Self-Test Input Self-Test Fail STOUT SYNC 1 TBIT TGBUS TNSW 0-3 VRFLG WC Self-Test Out Sync One T-Bit Tag Bus Test Number switches Verify Flag Write Clock WD WORD 8 ZERO Write Data Eighth Word Zero Flag Enables target sector address to be transferred from ALU to Target Sector register. Flag representing state of OP/SERVICE switch on self-test panel. Bibirectional HP-IB control line. Enables transfer of contents of Status register to ALU. Enables transfer of state of self-test TEST NUMBER switches to ALU. Line from Self-Test output register which activates S.T. FAILED LED on self-test panel and SELF TEST FAILED indicator on disc drive control panel. Enables transfer of data from ALU to Self-Test output register. Flag indicating that sync word has been detected by data separator during a read or verify operation. Line from control bus, Upper Byte register which clears disc drive Function register and Self-Test output register. Enables transfer of data to disc drive Function register. Four lines connecting self-test TEST NUMBER switches to Self-Test input register. Flag from PHI Control Word register which disables PHI chip from transferring data out during a verify operation. A 7.5-MHz clock from formatter during a write operation which advances word counter and clocks data from FIFO to formatter. Serial data from data path multiplexer to formatter during write. Flag for microprocessor indicating eighth word in read, write, or verify data transfer. A flag indicating presence of all zeros in ALU output. The components comprising the three modules of the controller are described in the following paragraphs. A-9. MICROPROCESSOR MODULE. The microprocessor module consists of the following components. A-lO. Eight-Bit Microprocessor. The microprocessor is composed of two four-bit slice bipolar microprocessor integrated circuits. It executes all of the arithmetic, logical, and I/O operations within the instruction cycle time of 267 nanoseconds. The microprocessor handles all the communications and command interpretations for the controller, and in turn generates most of the timing and all of the control signals needed by the controller and the disc drive. (The'DMA hardware generates its own timing signals once it has been enabled by the microprocessor.) The microprocessor also executes the self-test algorithms for self-test diagnostics of the disc drive. A-ll. Read-Only Memory (ROM), The controller utilizes a 24-bit wide microcode format and 3072 words of control store made up of three 2k x 8 and three lk x 8 ROM integrated circuits with 80 nanosecond access time. A-l2. Operation Control Registers. The operation control registers form the interface between the microprocessor and the disc drive electronics. The functions of the registers are as follows: Output Register Function Control Bus Upper and Control Bus Lower Contents/Functions Drive command (one bit per drive function) Cylinder and offset address, front panel LED, self-test bit A-9 Appendix A 7925 Head Address Target Sector Status Drive Type Physical Sector Current head address, currently selected head Target sector address The present status of the disc drive Drive type, current HP-IB device address, rotational position sensing (RPS) enable, and sector compare flag Physical sector presently passing under head The microprocessor module also contains the sector counters and the sector compare logic for the disc drive. These circuits are discussed in the sector sensing system description (paragraph A-50). A-13. HP-IB INTERFACE MODULE. The HP-IB interface module consists primarily of a PHI integrated circuit that provides a logical interface between the controller and the HP-IB. HP-IB is Hewlett-Packard's implementation of IEEE Standard No. 488-1975, IEEE Standard Digital Interface for Programmable Instrumentation. 'Ib the microprocessor, the PHI appears as a bank of eight registers, some of which are read-only, write-only, and read/write registers. Four transceiver integrated circuits provide a physical interface between the PHI logic levels and those of the HP-IB. The HP-IB device address is obtained from the HP-IB DEVICE ADDRESS switch on the control panel of the disc drive. At power-on, or on completion of self test, the value set on the switch is loaded into the HP-IB address register of the PHI. data by the data separator. The sync field is used to synchronize the phase-locked loop (PLU of the separator. Starting from the first I-bit of the preamble, bit-serial data is clocked into the FIFO and the CRC checker. Data written and read by the formatter/separator is compatible with data processed by the formatter/separator in the HP 13037 Disc Controller. A-lB. eRC Generator/Checker. During a WRITE or INITIALIZE command, a CRC word is generated from the preamble and data being written and is appended to the end of the data field. During a VERIFY command, and all READ commands except READ FULL SECTOR, the CRC checker looks for a CRC word appropriate to the preceding data and preamble fields. If a data error is detected, a flag will be set to alert the microprocessor. A-19. DMA Machine. During data transfers, the PHI chip and the FIFO handshake directly under the control of the DMA machine. The DMA machine takes direct control because the microprocessor cannot process individual bytes at the required 937.5 kilobyte rate. Instead, the microprocessor keeps a count of the bytes transferred and switches the CRC generator/checker into the data path at the proper time. The micropocessor starts up the DMA machine at the beginning of each sector. The machine stops by itself when anyone of the following conditions is detected: a) End of Sector (normal stop), b) Data Overrun (the channel plus all controller buffering cannot match the burst transfer rate to or from the disc), or c) End of Transfer (the EOI bit has been detected during a write data operation). A-14. DATA PATH MODULE. The data path module consists of the following components. A-15. FIFO and Data Serializer/Deserializer. A 16-level serial/parallel first-in, first-out (FIFO) buffer memory device provides a measure of buffering for the data passing through the controller. The FIFO also converts bytes received from the HP-IB to the bit-serial form required by the data formatter component (writing) and reconstructs bytes from the bit-serial data stream supplied by the data separator (reading). A-16. Data Formatter. At the start of each sector of a write operation, the data formatter automatically gen- erates and writes a sync field (12 words of zeros). At the completion of the sync field, the formatter clocks the data (including the preamble) from the serial output of the FcoIFmpO~nesnactoedsesfoirt to a MFM (delay modulation) form, pulse crowding, and sends it to the predisc drive read/write system (paragraph A-51). A-17. Data Separator. During a read operation, the amplified MFM signal received from the disc drive read/ write system (paragraph A-51) is decoded into clock and A-IO A-20. OPERATION CONTROL SYSTEM The operation control system (figure A-16) receives commands and information for drive operations from the controller, and outputs status information to the controller. A-21. DRIVE IDENTIFICATION. Unless addressed, the disc drive can respond only to a limited number of HP-IB commands all of which are handled complet~ly in the PHI chip, without controller interfer- ence. The address to which the drive will respond is set by disc drive HP-IB DEVICE ADDRESS switch S3, with the selected address appearing at the display on the operator panel. The address is read by the controller from the Drive Type register after a self-test operation and as part of the HP-IB command. A-22. DRIVE OPERATION CONTROL. When the disc drive is addressed by the HP-IB, the controller will respond to commands and perform the appropriate operations. Those operations whicH require drive functions external to the controller are initiated by control signals entered into the Function register by the controller. These control signals are described in table A-2. If a 7925 Appendix A Table A-2. Operation Control Command Signals MNEMONIC CLA CLS CPS SIGNAL Clear Attention Clear First Status Controller Preset RED RCL Read One Sector Recalibrate SK SOF Seek Set Offset WRT Write One Sector ACTION Resets Attention flip-flop. Resets First Status flip-flop. Resets controller, together with Head, Sector, and Fault registers. Also initiates self-test routine. Sector addressed by Head and Sector registers is read onto HP-IB. Heads seek to cylinder O. Cylinder 0 is used as a reference. Correct location is found by counting tracks from cylinder O. Heads seek to target cylinder address, provided it is a legal address (0 - 822). Controller supplies, on control bus, amount and direction of head offset in 63 increments of 25 microinches each. Offset is stored in Offset register and heads are offset as required. Data supplied by HP-IB is written into sector addressed by Head and Sector registers. REQUEST STATUS command is received, the controller will transfer several bytes of data concerning the disc drive and controller to the HP-IB. One byte is an encoded word representing the status of the controller itself. Another byte contains the drive type. The controller reads this value, set by the absence of jumpers in sockets W362 and W363 on microprocessor PCA-A2, from the Drive Type register. (The location of jumpers W362 and W363 on PCA-A2 is shown in figure A-16.) The HP 7925H is type 3. The third status byte comes from the Status register and reflects conditions in the drive external to the controller. Table A-3 lists the status byte bit assignments and each bit is discussed in the following paragraphs. Table A-3. Status Word Bit Assignments STATUS BIT CONDITION 1 Access Not Ready 2 Drive Not Ready 3 Seek Check 4 First Status 5 Drive Fault 6 Format 7 Read Only 8 Attention A-23. Access Not Ready. The access not ready status bit will be active (status bit 1 = 1) whenever the heads are not positioned over a valid track as determined by the information on the servo surface of the disc. A-24. Drive Not Ready. The drive not ready status bit will be active (status bit 2 = 1) whenever the heads are unloaded or a drive fault has occurred. A-25. Seek Check. The seek check status bit will be active (status bit 3 = 1) whenever one or more of the following conditions exists: a. An illegal cylinder address has been sent to the drive via a SEEK command or during address verification. b. An illegal head and/or sector address has been sent to the controller via a SEEK, ADDRESS RECORD, or COLD LOAD READ command. An illegal head or sector is not accepted by the controller, that is, the controller retains the previous head and/or sector information. An illegal cylinder is accepted by the controller without error indication, and a subsequent RE- QUEST DISC ADDRESS command will return this ad- dress. If the illegal cylinder address is sent to the disc drive, the heads do not move and a Status-2 error (seek check) is generated. The controller uses the DRV TYP field to determine the legality of heads and sectors. The disc drive itself determines whether the cylinder address is legal. . A-26. First Status. The first status status bit will be active (status bit 4 = 1) when the heads are loaded to identify this event to the user. The controller makes no use of this bit. The controller clears the first status bit after sending it to the channel. A-27. Drive Fault. The drive fault status bit will be active (status bit 5 = 1) and the DRIVE FAULT lamp will be lit whenever the disc drive fault circuits detect either a read/write, servo, or interlock fault condition. Nondestructive read/write faults (W. AR or R. W) can be cleared by the controller if it issues a CPS command. Destructive read/write faults (W. AC, or DC. W, or MH), servo faults (T, AGC, or CRB), or an interlock fault (IL) cause the heads to unload. Operator intervention will therefore be required. A-II Appendix A 7925 A-28. Format. The format status bit will be active (status bit 6 = 1) whenever the FORMAT switch on the operator control panel is set to the format position (.). A-29. Read Only. The read only status bit will be active (status bit 7 = 1) and the read only lamp will be lit whenever the READ ONLY switch on the operator control panel is set to the protected position (.) thereby inhibiting any write operations. A-30. Attention. The attention status bit will be ac- tive (status bit 8 = 1) at the completion of a SEEK or a RECALIBRATE, or when the heads load or unload. The attention status bit is cleared by the controller (not reported to the channel) except when the heads unload due to a drive fault. A-31. ATTENTION LOGIC. There are two attention flip-flops in each disc drive which are used to control the state of the attention bit (status bit 8). This status bit, in conjunction with other status bits, is used to notify the controller when the disc drive has performed certain operations. The ACRY and retract attention flip-flops are located on drive control PCA-A4. Both flip-flops are initially reset by CLA (via NDPS) when power is first applied or the RUN/STOP switch is set to RUN. When reset, these flip-flops cause the attention bit to be inactive (status bit 8 = 0). Every time the RUN/STOP switch is set to RUN and the disc pack has come up to speed, a seek home operation will be initiated. When the heads are correctly positioned over cylinder 0, the ACRY attention flip-flop will be set by the leading edge of ACRY. This will notify the controller that the seek home operation has been completed. During normal seek operations, the ACRY and retract attention flip-flops are reset once the heads leave the cylinder over which they were settled. Once the heads are correctly positioned and settled over any legal cylinder, the ACRY attention flip-flop will be set by the leading edge of ACRY. If a seek operation to the same cylinder address is attempted, ACRY will remain active because the heads will not have moved, but CYL will momentarily go inactive (CYL = 0) as the first seek command is drop- ped and then it will return active (CYL = 1) as the second seek command is decoded. When this occurs, the ACRY attention flip-flop will be direct-set by the leading edge of CYL. In both cases (either a seek operation to a different cylinder address or to the same cylinder address) when the ACRY attention flip-flop is set, the controller is notified that a legal seek operation has been completed. If the RET signal becomes active (RET = 1) for any reason, the heads will be retracted and the drive ready flip-flop, on drive control PCA-A4, will be reset. This will cause the retract attention flip-flop to be set by the leading edge of DRDY This will notify the controller of the retracted condition of the heads. A-12 A-32. SPINDLE ROTATION SYSTEM The spindle rotation system (see figure A-17) consists of circuits on drive control PCA-A4, spindle logic PCA-A8, power and motor regulator (PMR) PCA-A9, and encoder PCA-A10. Further, it includes such mechanical assemblies as the spindle motor, pack detector, and pack chamber assembly door lock mechanism. Communication between drive control PCA-A4 and the rest of the circuitry occurs via motherboard PCA-A7, while the remainder of the communication occurs via the main harness. The primary purpose of the spindle rotation system is to provide power to the spindle motor and to maintain its operational speed at 2700 revolutions per minute. In addition, it operates the pack chamber door lock mechanism. Included in the following are discussions relative to spindle logic initialization; the pack chamber door control, run spindle command, and spindle motor phase encoding and decoding, speed control and speed up detection, current regulation, dynamic braking, speed down detection, overcurrent protection, and overvoltage protection. A-33. SPINDLE LOGIC INITIALIZATION. During the power-up sequence, PSF will momentarily become active (PSF = 0) because the power supplies have not yet reached their full operating level. This will momentarily hold the door unlocked solenoid de-energized which prevents access to the pack chamber. In addition, it will cause SPS to become active (SPS = 0) which will reset both current limit latches, direct-set the reverse direction detector, and clock the speed down latch clear. Once the power supplies reach their proper operating level (PSF = 1), SPEN will become active (SPEN = 1) if encoder PCA-A10 interlock is not open. The speed down detector will then detect that the spindle motor is stopped and it will direct-set the speed down latch. Setting the speed down latch causes SPD to become active (SPD = 0). A-34. DOOR CONTROL LOGIC. The door unlock solenoid will be energized when the speed-down latch is set, the carriage is retracted, the RUN/STOP switch is set to STOP, and the power supplies are operating. When the solenoid is energized, the pack chamber door will be unlatched permitting access to the pack chamber and the DOOR UNLOCKED lamp will light. A disc pack can now be installed. With a pack installed and the pack chamber door closed, the RUN/STOP switch can be set to RUN. Setting this switch to RUN, sets the run/stop flip-flop. This will generate both a destructive and a non-destructive preset to initialize the rest of the disc drive circuitry (refer to paragraph 1-58). With STOP inactive (STOP = 0), the door unlock solenoid will be de-energized to again latch the pack chamber door and the DOOR UNLOCKED lamp will extinguish. A-35. RUN SPINDLE COMMAND LOGIC. Once a pack is in place (PIP = 1), the pack chamber door is locked (DL = 1), the carriage is fully retracted from the pack chamber (CRB = 1), no interlock fault (lLF = 0) or 7925 Appendix A timeout fault (TOF = 0) exists, the run/stop flip-flop is set (RUN = 1), and the run spindle flip-flop will be set to generate the run spindle command (RS = 0). This command will reset the speed down latch and the reverse direction detector, and cause an encoder pulse to be generated. The encoder pulse will clock the initial phasing information from the phase encoder into the phase A and phase B flip-flops. A-36. PHASE ENCODING AND DECODING. The spindle motor is a brushless dc motor with two sets of phase windings. Power is applied to each winding in a prescribed sequence from the +36 and -36 volt supplies through four current switches. Two switches are provided for each phase winding because current is required to flow through the winding in both a positive and negative direction. Each switch is activated three times during any given revolution of the motor. It is the relative position of the rotor with respect to the windings that determines which switch to activate. Rotor position and motor speed are derived by the phase encoder, from the encoder PCA. The phase encoder circuitry consists of an encoder disc, which is fastened to the bottom of the spindle motor shaft, and encoder PCA-A10. The encoder disc is a thin metal disc with three 60-degree slots spaced 60 degrees apart. Encoder PCA-A10 consists of two identical circuits, one for phase A and the other for phase B. Each circuit is comprised of a light-emitting diode (LED), a phototransistor, and an amplifier/inverter stage. The PCA is attached to the spindle motor housing so that the light from each LED passes through the slotted area of the encoder disc and strikes the associated phototransistor. When light strikes the phototransistor, it conducts and the resultant output is amplified and inverted. The LED/phototransistor pairs are physically mounted on the PCA 30 degrees apart with phase A arranged to conduct before phase B, therefore, the output from phase A will lead that from phase B by 30 degrees. The two signals from encoder PCA-A10 are routed to spindle logic PCA-A8 where they are conditioned and inverted. They can be observed at the test points labeled '~ENC.N' and "ENCB". They are then coupled to the input of the encoder pulse generator and two "exclusive-OR" gates which act as programmable inverters. The encoder pulse generator produces a pulse for each edge of both spindle encoder sensors. 'lWeIve encoder pulses are produced per revolution. The frequency of the encoder pulses at 2700 revolutions per minute is 540 Hz. The output from the encoder pulse generator can be observed at the test point labeled "ENCP". The ~'exclusive-OR's" invert the encoder signals when the run spindle command is inactive (RS = 1) to dynamically brake the motor. When the run spindle command is active (RS = 0), no inversion takes place and the encoder signals are clocked into the phase A and phase B flip-flops by the output from the encoder pulse generator. The latched encoder signals are then routed to the phase decoder network where they are decoded to select the proper current switch. These phase selection outputs can be observed at test points labeled "PH1+", "PH1-", "PR2+", and "PH2-". Figure A-7 illustrates the timing relationship of the two input phase signals, the output from the encoder pulse generator, and the four resultant phase selection output signals. If an overcurrent condition is detected -in a given phase, that phase will be inhibited. Similarly, if an overvoltage condition is sensed, power to that phase will momentarily be interrupted. Both motor phases will be inhibited when the run spindle command is inactive (RS = 1) and the speed is detected to be down or at the moment the reverse direction detector first detects that the motor has begun to rotate clockwise (reverse). The latched encoder signals are also applied to the reverse direction detector which is used to detect a clockwise rotation of the motor during speed down detection. In addition, a 180 Hz signal is derived from the latched encoder signals. This signal is used to clock the timeout counter during a seek, seek home, or normal head load or unload operation. A-37. SPEED CONTROL. As previously mentioned, motor speed is derived from the phase encoder information. The two signals from encoder PCA-A10 are conditioned, inverted, and applied to the input of the encoder pulse generator. The encoder pulse generator produces a pulse for every edge of the encoder signals. Twelve encoder pulses are produced per revolution. The frequency of the encoder pulses at 2700 revolutions per minute is 540 Hz. The output from the encoder pulse generator can be observed at the test point labled "ENCP". This output is routed to the phase and speed down detectors. The phase detector is a 3-stage shift register. The output from the encoder pulse generator is used to shift "O's" to the right and the output from a 540 Hz reference clock is used to shift "l's" to the left. The 540 Hz reference clock is derived from a 2.25 MHz crystal-controlled oscillator and a divide-by-4168 counter. The output from the .2.25 MHz oscillator can be observed at the test point labeled "3 MHz" and the output from the 540 Hz reference clock can be observed at the test point labeled "720 Hz". Phase detection is achieved by monitoring the center bit of the shift register. This bit can be observed at the test point labeled "PHASE". When the disc pack is rotating slower than 2700 rpm, "l's" will be shifted through the shift register because reference clock pulses will occur more frequently than encoder pulses. This will cause a "1" to remain in the center bit of the shift register and maximum spindle current to be commanded. As a result, the motor will begin to accelerate. As the motor comes up to speed, encoder pulses will begin to shift "O's" into the left-most bit. Eventually, this will force the "1" out of the center bit. When this occurs, a decrease in the center bit duty cycle will result which in turn will decrease the spindle current command causing less current to be delivered to the motor. At speed, the center bit will toggle and the duty cycle will be nearly symmetrical. A-13 Appendix A 7925 A8"ENCA" l A8 "ENCB" 1....·. - - - - - - - ONE REVOLUTION (540 Hz at 2700 RPM) -------~~"'il I I IIII I~i I I IIIII U - A8 "ENCP" A8 "PH1+" (A· B) A8 "PH1 " (1\. Bl - "'"-- ' - - n - ' - - '--- I....- I.....-.. l....- I n nI I I I I I I 7311-40 A8 "PH2+" (A· B) A8 "PH2-" (A ·S) I n n n I I Figure A-7. Phase Selection Timing The left- and right-most bits of the shift register are monitored by the speed up detector. When these bits remain unchanged for approximately one-half a second, the motor is declared to be at speed. The green SPD LED at the output of the speed up detector will remain off until the spindle is declared to be at speed. If the spindle begins to loose speed slightly, the encoder pulse that was supposed to shift the "I" out of the center bit will be late. This will cause an increase in the center bit duty cycle, an increase in the spindle current command, and more current to be delivered to the motor until it returns to speed. A-14 The output from the center bit of the shift register is buffered and filtered to produce a smooth dc voltage which represents the spindle current command. The current command limiter reduces the spindle current command during the braking operation. The spindle current command is applied to the input of the current regulation circuit. It can be observed at the test point labeled "SCC". A-38. MOTOR CURRENT REGULATION. The motor current regulation circuitry compares the smooth dc 7925 Appendix A voltage representing the spindle current command with the average spindle motor current derived from the spindle motor current sampling resistor and regulates the motor current accordingly. This is achieved by applying the desired spindle current command to the positive inputs of two differential amplifiers and the derived average spindle motor current to the negative inputs. The unitygain inverting amplifier inverts negative current samples, so that they may be processed as positive current samples. The actual measured current sample can be observed at the test point labeled "SMC". The difference between the desired current and the actual measured current is applied to the negative inputs of two comparators. The output from a 22 kHz triangle wave generator is applied to the positive inputs. This signal can be observed at the test point labeled "22 kHz". A pulse train is produced with a duty cycle determined by the points at which the smooth dc voltage intersects the slopes of the triangular wave. If there is a small difference between the desired current and the actual current, a low duty cycle will be output from the comparators. Similarly, a larger difference produces a higher duty cycle output. It is the duty cycle that controls the pulse selection outputs which in turn control the application of current to the spindle motor windings. The output that regulates the positive phases can be observed at the test point labeled "P+", while the output that regulates the negative phases can be observed at the test point labeled "P-". A-39. DYNAMIC BRAKING. When the RUN/ STOP switch is set to STOp, the spindle motor is dynamically braked to a stop. Dynamic braking is achieved by attempting to drive the motor in a clockwise (reverse) direction while it is rotating in a counterclockwise (forward) direction. This is accomplished by inverting the information from the phase encoder circuitry. The "exclusive-OR's" at the input to the phase A and phase B flip-flops act as programmable inverters. When the run spindle command is inactive (RS = 1), the phase encoder information is inverted. This will cause the opposite phase to be driven which will brake the motor to a stop. A-40. SPEED DOWN DETECTION. The speed down detector monitors the encoder pulses, and when the interval of time between transitions exceeds 0.7 of a second, it direct-sets the speed down latch to declare the motor stopped. With the run spindle command inactive (RS = 1) and the speed down (SPD = 0), the spindle cur- rent command to both motor phases will be inhibited. If the speed down detector should fail to detect the proper time interval between encoder pulses, the reverse direction detector will be clocked set at the moment the motor first begins to rotate clockwise (phase B leads phase A). When set, the reverse direction detector will inhibit the spindle current command to both motor phases. In either case, the yellow OFF LED will light when the spindle current command to both motor p'hases has been inhibited and the motor will remain stopped until another run spin- dle command is issued (RS = 0). A-41. OVERCURRENT PROTECTION. The four current switches, located on PMR PCA-A9, have overcurrent sense networks associated with them. These networks sense the level of the current being applied to the associated motor phase and if this current exceeds the established upper limit, the appropriate current limit signal will become active (CLI or CL2 = 0). This will set the associated current limit latch on spindle logic PCA-AS. The state of the latch can be observed at the test point labeled "CLl" or "CL2". When set, the latch will disable the spindle current command to that motor phase. The other phase, however, will remain operative to keep the spindle motor rotating until the heads have been unloaded. In addition, the set output will cause the SPFLT LED to light indicating that a spindle fault exists. It will also signal the fault detection circuity through the interlock chain to cause an emergency retract operation. The current limit latches are reset by setting the POWER switch to OFF, then to ON which causes SPS to momentarily become active (SPS = 0). A-42. OVERVOLTAGE PROTECTION. During spindle braking, the current switch circuits attempt to drive the +36 and -36 volt supply lines to about 60 volts. To protect against this condition, a pair of shunt regulator circuits are employed to monitor the +36 and -36 volt supply lines. If an overvoltage condition is sensed (voltage greater than 42 volts), the active phase is turned off and a bleeder resistor is switched in to lower the excessive voltage. The state of the disabling command can be observed at the test point labeled "VL+" or "VL-". When the lower threshold is reached (voltage less than 40 volts), the system resumes normal operation. If the spindle motor is jammed when the run spindle command is issued (RS = 0), a stall condition will occur. During a stall condition an overvoltage is sensed by the shunt regulator circuits, the active phase is turned off and bleeder resistors are switched in to attempt to lower the excessive voltage. If the bleeder resistors were allowed to remain on, in the stall condition, the resistors would burn out; therefore two regulator protection circuits are employed to sample for excessive on time of the bleeder resistors and to inhibit bleeder action. A-43. HEAD POSITIONING SYSTEM The head positioning system (see figure A-IS) consists of circuits on microprocessor PCA-A2, servo PCA-A3, drive control PCA-A4, track follower PCA-A5, and power and motor regulator (PMR) PCA-A9. Further, it includes such mechanical assemblies as the actuator assembly, carriage latch solenoid, carriage back detector, and velocity transducer and shaft. With the exception of PMR PCA-A9, all communication between PCA's occurs via motherboard PCA-A7 and interconnecting cables. PMR PCA-A9 communicates with the other PCA's through the main harness. The purpose of the head positioning system is to control the application of power to the coil in the actuator assembly. This causes the heads to be accurately A-15 Appendix A 7925 positioned over a specified cylinder during an initial head load, forward or reverse seek, offset, or recalibrate operation. In addition, it provides the means to retract the heads under both normal and abnormal (fault) conditions. Included in the following are discussions relative to an initial head load, normal head unload, forward or reverse seek, offset, recalibrate, and emergency retract operation. A-44. INITIAL HEAD LOAD OPERATION. Once the disc pack reaches its operational speed of 2700 revolutions per minute, the heads will automatically be loaded. The heads will fly above the surface of the discs supported by a thin cushion of air. This cushion of air acts as an air bearing to the heads. The air bearing functions as a very stiff spring which is opposed by the leaf spring on each head arm. These two opposing forces tend to cancel one another at a flying height of 35 microinches (0.89 microns) at cylinder 0 to 27 microinches (0.69 microns) at cylinder 822. In order for the heads to fly properly several conditions have to be satisfied. Among these are the cleanliness of the air that surrounds the disc surfaces, the axial runout and flatness of the disc surfaces, and the flatness of the head surface near the read/write gap. With a disc pack installed (PIP = 0); the pack access door locked (DL = 0); the run/stop flip-flop set (STOP = 0); no existing AGC fault (AGF = 0), carriage back fault (CBF = 0), interlock fault (ILF = 0), destructive write fault (DWF = 0), or timeout fault (TOF = 0), the head positioning system circuitry waits for the spindle to reach operational speed (SPU = 0). When this occurs, the RET signal will become inactive (RET = 0). This will cause the SKH signal to become active (SKH = 0) which will initiate a 1667 millisecond timeout cycle, set the servo enable flip-flop, and direct set the seek home flip-flop. The state of the SKH signal can be observed at the test point on drive control PCA-A4 labeled "SKH". The SKH signal will also cause the CYL signal to become active (CYL = 1) to clear the,seek check flip-flop on mi- croprocessor PCA-A2. The state of the CXYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 3 = 0). In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. With the servo enable flip-flop set (SEN = 1 and SEN = 0) and the DRDY and RET signals active (DRDY and RET = 0), the ECS signal will become active (ECS = 1). This causes the CSOL signal to become active (CSOL = 0) to energize the carriage latch solenoid permitting carriage movement. Also with the head positioning servo loop enabled (SEN =0) and no existing power supply fault (PSF = 1), the linear motor relay on PMR PCA-A9 will be energized to permit current to be applied to the linear motor A-16 coil. These conditions can be observed at the test points on PMR PCA-A9 labeled "SEN" and "PSF". The SEN signal also enables the linear motor power amplifier (LMAE = 1) after a 60 millisecond delay to ensure closure of the linear motor relay contacts. With the seek home flip-flop set (SKH = 1 and SKH = 0), the new cylinder address register and present cylinder address counter will be cleared by SKH. Since the new cylinder address and the present cylinder address count both match (both are zero), the MATCH signal will become active (MATCH = 1). The state of the MATCH signal can be observed at the test point on servo PCA-A3 labeled "M". Since the heads are not yet positioned over the servo zone, the AGC signal from track follower PCA-AS will be inactive (AGC = 0). The set output from the seek home flipflop and the absence of the AGC signal (AGC = 0) will activate the +slew FET switch on the servo PCA. With this switch closed, a constant velocity will be developed and an appropriate current will be applied to the linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The coil will be repelled from the linear motor magnet to push the carriage assembly supporting the heads along the rails at approximately 3.5 inches per second. A voltage which is proportional to the linear velocity of the carriage is fed back through the tachometer buffer and FET switch to the summing junction of the summing amplifier. The tachometer buffer is a unity-gain amplifier used to eliminate the effects of temperature on the velocity transducer signal. The voltage developed is used to precisely control the head positioning servo loop during the initial head load operation. This voltage can be observed at the test point on servo PCA-A3 labeled "TAC". The velocity transducer and shaft are used to develop this linear velocity voltage. The velocity transducer is a cylindrical coil assembly mounted in the center of the linear motor magnet assembly. A magnet is attached to the carriage assembly by a supporting shaft. The motion of this magnet as it passes through the coil generates the linear velocity voltage. The magnitude Df the voltage is proportional to the linear velocity and the polarity indicates the direction of motion. As the heads approach the head loading area of the disc pack, they are forced away from the disc surfaces by the air pressure developed by the rotating disc pack and the air distribution system. The heads will actually fly above the surfaces of the discs supported by a thin cushion of air. When the outside edge of the outer guard band is first detected by the servo head, the AGC signal will become active (AGC = 1) to disable the forward slew operation. The state of the AGC signal can be observed at the test point on track follower PCA-AS labeled "AGC". The seek home flip-flop will be clocked clear by the leading edge of the AGC signal. The set output from the seek home flipflop (SKH = 0) together with the absence of the RET sig- 7925 Appendix A nal (RET = 0) and the active MATCH + SKI signal (MATCH + SKI = 1), activates the fine position FET switch. With this switch closed, the current applied to the linear motor coil will be determined by the POS signal. The POS signal is used to provide radial (cylinder) position information to the 4ead positioning servo loop. This signal is derived from th~ servo code which is magnetically recorded on the servo surface (see figure A-8). The servo code consists of 6720 di-bits per revolution, although three of these di-bits are not recorded in the index zone. As the servo surface passes beneath the servo head, a voltage is magnetically induced. The output from the servo head is directly coupled to the input of the differential preamplifier stage on track follower PCA-A5. This stage consists of two differential amplifiers coupled together by a filter network. The gain of the first differential amplifier is controlled by the output from the servo AGC circuit. The differential output is filtered and coupled to a second fixed-gain differential amplifier. The output from the differential preamplifier stage can be observed at the test point on track follower PCA-A5 labeled "PRE". It will be approximately 1.4 volts peak-to-peak. This output is then coupled to the input of the phase switchable amplifier stage. Figure A-8 illustrates the servo and data track assignments, as well as the waveforms produced at the "PRE" test point as the servo head moves across +odd and -even servo tracks. The phase switchable amplifier stage provides a low source impedance servo code output which is either in phase or 180 degrees out of phase with the output of the differential preamplifier stage. The phase is determined by the least significant bit of the addressed cylinder (LSB). The LSB signal will be active (LSB = 1) for odd cylinders and inactive (LSB = 0) for even cylinders. In the case of an initial head load, the LSB signal will be inactive (LSB = 0). The output from the phase switchable amplifier is coupled to the positive and negative peak detectors where the peaks in the servo code are detected and stored. The peak detectors are gated by either the REF or REF signal. This is determined by the state of the LSB signal and an exclusive-OR acting as a programmable inverter. When LSB is active (LSB = 1), the REF signal will gate the peak detectors and when LSB is inactive (LSB = 0), the REF signal will gate the peak detectors. In the case of an initial head load, the REF signal will gate the peak detectors. The state of the REF signal can be observed at the test point on track follower PCA-A5 labeled "REF". The output from each peak detector is buffered by a unity-gain, non-inverting amplifier and then coupled to the summing junction of the output summing amplifier. Also, summed into this junction is the output of the offset circuit. The output summing amplifier exhibits a gain of 4 to the peak detectors and 0.5 to the offset circuit. The resultant output from the output summing amplifier is the POS signal which can be observed at the test point on track follower PCA-A5 labeled "POS". The derived POS signal is centered about a ground reference and it has a scaling factor of 4 volts per one thousandth of an inch at track center. The signal will be positive once the servo head detects the edge of the outer guard band and it will remain positive until the first track of the servo zone is detected. It will then appear as a triangular waveform as the servo head moves across the servo surface from track 0 to 822. Each zero crossing represents a data track centerline. Once the track center of cylinder 0 is detected (TCD and FINE POSITION = 1), the SB signal will become active (SB = 0). This signal will inhibit tachometer feedback to the head positioning servo loop. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled "TCD". After a 1.3 millisecond delay to allow time for the heads to settle, the drive ready flip-flop will be set. The set output from the drive ready flip-flop causes the DRIVE READY lamp to light, the first status flip-flop to be clocked set, the AGC and carriage back fault detection circuits to be enabled, and the ACRY signal to become active (ACRY = 0). The state of the DRDY signal can be observed at the test point on drive control PCA-A4 labeled "DRDY". The set output from the first status flip-flop causes the first status, status bit to be active (status bit 4 = 1). This will notify the controller that the disc drive has completed an initial head load operation. This status bit can be selectively cleared by the controller it it issues a CLS command. When the ACRY signal becomes active (ACRY = 0), it cancels the 1667 millisecond timeout cycle; clocks the ACRY attention flip-flop set; and enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 8 = 1). This will notify the controller that the disc drive has correctly positioned the heads over cylinder O. This status bit can be selectively cleared by the controller if it issues a CLS command. The heads will remain settled over cylinder 0 until a seek, recalibrate, or set offset command is decoded; or until they are unloaded when the RUN/STOP switch is set to STOP; or until certain fault conditions are detected. A-45. NORMAL HEAD UNLOAD OPERATION. The heads are automatically unloaded whenever the RUN/STOP switch is set to STOP (STOP = 1); an AGC fault (AGF = 1), carriage back fault (CBF = 1), interlock fault (ILF = 1), destructive write fault (DWF = 1), or timeout fault (TOF = 1) exists; or the spindle begins to loose speed (SPU = 1). When anyone of these conditions exists, the RET signal will become active (RET = 1). This will clear the drive ready and seek home flip-flops, deenergize the carriage latch solenoid, activate the -slew FET switch, and initiate a 1667 millisecond timeout cycle. A-17 Appendix A 7925 With the drive ready flip-flop cleared (DRDY = 0 and DRDY = 1), the DRIVE READY lamp will be extinguished, the AGC and carriage back fault detection circuits will be disabled, the ACRY signal will become inactive (ACRY = 1), and the retract attention flip-flop will be clocked set (status bit 7 = 1). The state of the DRDY signal can be observed at the test point on drive control PCA-A4 labeled "DRDY". The set output from the retract attention flip-flop causes the attention status bit to be active (status bit 8 = 1), This will notify the controller that the disc drive has initiated a normal head unload operation. This status bit can be selectively cleared by the controller if it issues a CLS command. When the ACRY signal becomes inactive (ACRY = 1), future seek, recalibate, or write operations will be inhibited; and the attention reset flip-flop will be clocked set to prevent the ACRY and retract attention flip-flops from being reset. The state of the ACRY signal can be observed at the test point on drive control PCA-A4labeled "ACRY". With the -slew FET switch closed, a constant velocity will be commanded and an appropriate current applied to the linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". This current will cause the carriage assembly to slew in reverse at 3.5 inches per second until it reaches its fully retracted position (CRB = 1). When this occurs, the RET and CRB signals will both be active (RET and CRB = 1). Together these signals cancel the 1667 millisecond timeout cycle and clear the servo enable flip-flop to disable the head positioning servo loop. In addition, the CRB and STOP signals will clear the run spindle flip-flop to issue a stop spindle command (RS = 1). The door unlock solenoid will be energized to permit pack access as soon as the spindle has been braked to a stop. The heads will remain in their fully retracted position until another head load operation is initiated. A-46. SEEK OPERATION. A seek operation is used to move the heads from their present cylinder position to some other cylinder position. The disc drive can execute a seek command whenever the heads are positioned and settled over any legal cylinder (ACRY and SB = 0). The controller issues a seek command with a cylinder address on the control bus. When the command is decoded, the SK signal will become active (SK = D. This will initiate a 120 millisecond timeout cycle, direct set the first clock inhibit flip-flop, and clock the cylinder address (DO thru D9) into the new cylinder address register provided it is legal (lCA = 0). The SK signal will also cause the CYL signal to become active (CYL = 1) to clear the seek check flip-flop on I/O sector PCA-A2. The state of the CYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 3 = 0). A-18 In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. As previously mentioned, the legal cylinder address supplied by the controller was stored in the new cylinder address register when the seek command was decoded. This address provides destination information to the head positioning servo loop. In addition, the least significant bit of the new cylinder address (LSB) is routed to track follower PCA-A5 where it controls the phase switchable amplifier and the programmable inverter at the input to the peak detector circuitry. This bit will be active (LSB = 1) for odd cylinders and inactive (LSB = 0) for even cylinders. The use of this bit is discussed in detail in paragraph A-44. Further, the three most significant bits of the new cylinder address are inverted and routed to RlW preamplifier PCA-A6 as the DWA, DWB, and DWC signals. These signals are used to control the programmable write current sink. The cylinder address comparator compares the cylinder address stored in the 'new cylinder address register with the count stored in the present cylinder address counter. It produces a lO-bit digital difference from these two addresses. It also produces a signal which indicates whether a forward or reverse seek operation is required. If the present cylinder address is less than the new cylinder address, the forward FET switch will be activated and the present cylinder address counter will count up (POSITIVE = 1). If the present cylinder address is greater than the new cylinder address, the reverse FET switch will be activated and the present cylinder address counter will count down (POSITIVE = 0). Both commands (forward or reverse) assume that the addresses do not match (MATCH = 1), the seek operation is not inhibited (SKI = 1), a seek home operation is not commanded (SKH = 0), and a retract operation is not commanded (RET = m.lfthe present cylinder address is equal to the new cylinder address, the fine position FET switch will be activated and the current applied to the linear motor coil will be determined by the POS signal. In the case of a forward or reverse seek operation, the digital to analog converter converts the digital difference from the cylinder address comparator into an analog current which is applied to the input of the velocity curve generator. The velocity curve generator produces a current equal to a constant multiplied by the square root of the analog current from the digital to analog converter. The VC GAIN potentiometer on servo PCA-A3 provides the means to adjust the seek time by varying the gain of the velocity command. The velocity command can be observed at the test point on servo PCA-A3 labeled "VC". If the reverse FET switch is activated, the velocity command will be routed to the summing junction of the summing amplifier. If the forward FET switch is activated, the velocity command will be inverted by a unity-gain, inverting amplifier before it is applied to the summing junction. The 7925 UPPE R AND LOWE R PROTECTIVE DISCS DATA SURFACE DATA TRACK 0 DATA TRACK 822 SPINDLE ~/ -j---...." DIRECTION OF , ROTATION SERVO SURFACE DATA HEAD CORE --'1 ...- DATA TRACK WIDTH (2150 MICROINCHESI \ HEAD LOADING AREA · NO INFORMATION IS WRITTEN IN THIS AREA · HEADS ARE LOADED TOWARD THE DI SC SURFACE OUTER GUARD BAND · CONSISTS OF 24 + ODD SE RVO TRACKS · USED TO LOCATE DATA TRACK 0 DURING HEAD LOAD AND RECALIBRATE OPERATIONS 1...- SERVO TRACK SPACING (2600 MICflOINCHES) SERVO HEAD CORE REF7311-41A NOTE: WAVEFORM AND TRIGGER TEST POINTS ARE SHOWN ON THE HEAD POSITIONING SYSTEM FUNCTIONAL DIAGRAM, FIGURE A·18,AT THE FOLLOWING LOCATIONS: A5 'PRE' - (C16) A5 'REF' - (B15) A5 'POS' - (C13) A5 'OIS' - (014) DATA HEAD CORE DATA HEAD CORE r DATA HEAD CORE r DATA HEAD CORE DATA HEAD CORE +ODD SERVO TRACK SERVO HEAD CENTERED OVER A + ODD SERVO TRACK NNSS II NNSS II VERTICAL GAIN = 0.5V/DIV TIME BASE = 1.0~S/DIV OFFSET = iO.O /.lIN. TEST POINT ~ A5 "PRE" TRIGGER = A5 "REF" Appendix A ~f--- ._-+---+---+-+---+---+-+--~ VERTICAL GAIN = 5V/DIV TEST POINT = A5 "POS" SERVO HEAD CORE HEAOS POSITIONED WITH 787.5 MICROINCHES OF NEGATIVE OFFSET FROM CYLINDER POSITION 0 VERTICAL GAIN = 0.5V/DIV TIME BASE = 1.0/.lS/DIV OFFSET =-787.5 ~IN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" VERTICAL GAIN = 5V/DIV TEST POINT = A5 "O/S" SERVO HEAD CORE HEADS COIlHECTL Y CENTERED , OVER CYLINDER POSITION 0 VERTICAL GAIN = 0.5V/D!V TIME BASE 1.0 ~S/DIV OF FSET = ±O.O /.lIN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" VERTICAL GAIN = lV/DIV TEST POINT = A5 "pas" SERVO HEAD CORE HEAIlS POSITIONED WITH 787.5 MICROINCHES OF POSITIVE OFFSET , FROM CYLINDER POSITION 0 VERTICAL GAIN = 0.5V/DIV TIME BASE = 1.0 ~S/DIV OFFSET = +787.5 ~IN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" VERTICAL GAIN = 5V/DIV TEST POINT = A5 "O/S" SERVO HEAD CORE SERVO HE,\O CENTERED OVER , A - EVEN SERVO TRACK VERTICAL GAIN = 0.5V/DIV Tlivl'': BASE = 1.0IlS/DIV OFFSET = 10.0 IlIN. TEST POINT = A5 "PRE" TRIGGER = A5 "REF" SERVO HEAD CORE -EVEN SERVO TRACK VERTICAL GAIN = 5V/DIV TEST POINT = A5 "POS" S SN N S SN N Figure A-8. HP 7925H Servo and Data Track Assignments A-19/A-20 7925 Appendix A summing junction also receives a voltage which is proportional to the linear velocity of the carriage. This voltage is developed by the velocity transducer and shaft and is fed back through the tachometer buffer and FET switch. The summing amplifier compares the buffered output from the tachometer (measured velocity) with the output from the velocity curve generator (velocity command) and produces a current command which drives the difference to zero. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The amount of current available may be limited by the current command limiter. This circuit is activated by the seek inhibit signal (SKI = 1). The current command is coupled through the voltage gain amplifier to the linear motor power amplifier via a closed FET switch. Both of these amplifiers are located on PMR PCA-A9. The FET switch and linear motor relay were both activated when the head positioning servo loop was enabled (SEN = 1) during the initial head load operation. Power is applied to the linear coil through the energized linear motor relay. The linear motor voltage developed can be observed at the test point labeled ~'LMV" and a sample of linear motor current can be observed at the test point labeled "LMC". Both of these test points are located on PMR PCA-A9. As the heads begin to move across the disc surfaces, the ACRY signal will become inactive (ACRY = D. This will cause future seek, recalibrate, or write operations to be inhibited; and the attention reset flip-flop to be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 8 = 0). In addition, the POS signal will be developed from the servo code written on the servo surface. This signal can be observed at the test point on track follower PCA-A5 (source) or servo PCA-A3 (destination) labeled '~POS". Every time the POS signal passes through zero volts, a clock pulse is generated by the cylinder pulse generator on servo PCA-A3. The first clock pulse is inhibited because the first clock inhibit flip-flop was set when the seek command was decoded. This flip-flop will be clocked clear on the leading edge of the TCD signal to enable subsequent clock pulses to clock the present cylinder address counter. The track center detector will produce the TCD signal when the heads are within 1/4 track width of track center. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled ~~TCD". The match logic monitors the digital difference applied to the digital to analog converter. When the heads are positioned within one cylinder from the addressed cylinder, the MATCH-l signal will become active (MATCH-l = 0). This signal notifies the track center detector that the present cylinder address count is one less than the address stored in the new cylinder address register. The last clock pulse is produced by the track center detector rather than by the cylinder pulse generator. This pulse is produced when the last one-quarter track of travel is detected. When the present cylinder address count equals the address stored in the new cylinder address register, the MATCH signal will become active (MATCH = D. The state of the MATCH-l and MATCH signals can be observed at the test points on servo PCA-A3 labeled "Ml" and "M", respectively. When the MATCH signal becomes active (MATCH = D, it disables the for- ward or reverse velocity command to the summing junction of the summing amplifier, activates the fine position FET switch, and increases the sensitivity of the track center detector. With the fine position FET switch closed, the current applied to the linear motor coil will be determined by the POS signal. Once the track center of the addressed cylinder is detected (TCD and FINE POSITION = 1), the SB signal will be- come active (SB = 0). This will inhibit tachometer feed- back to the head positioning servo loop. After a 1.3 millisecond delay to allow time for the heads to settle, the ACRY signal will become active (ACRY = 0). The drive ready flip-flop is not affected. It remains set from the initial head load operation. When the ACRY signal becomes active (ACRY = 0), it cancels the 120 millisecond timeout cycle; causes the drive busy status bit to be inactive (status bit 0 = 0); and clocks the ACRY attention flip-flop set, which enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 8 = 1). This will notify the controller that the disc drive has completed a seek operation to a legal cylinder. This status bit can be selectively cleared by the controller if it issues a CLA command. The heads will remain settled over the addressed cylinder until a set offset, recalibrate, or another seek command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. A-47. OFFSET OPERATION. An offset operation is used to move the heads in small increments to either side of track center. This function is designed to permit marginal data recovery. The controller issues a set offset (SOF) command with the offset magnitude and sign on the control bus. The internal control bus bits DO through D5 specify the offset magnitude in 63 increments of 12.5 microinches each, while bit D7 specifies the direction (+ or -) from track center. The disc drive decodes the command and the SOF signal becomes active (SOF = 1) to clock the offset magnitude and sign into the offset magnitude and sign registers, respectively. Both of these registers are located on track follower PCA-A5. They are both cleared by the COF signal when the heads are initially loaded or when a seek or recalibrate command is decoded. Therefore if offset is desired, the offset magnitude and sign must be re-specified after either of these operations is performed. A·21 Appendix A 7925 In addition, the SOF signal disables the ACRY signal for 1.3 milliseconds to allow the heads time to settle. With ACRY disabled (ACRY = 1), future seek, recalibrate, or write operations will momentarily be inhibited; and the attention reset flip-flop will be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 8 = 0), When the ACRY signal becomes active again (ACRY = 0), the ACRY attention flip-flop will be clocked set; and future seek, recalibrate, or write operations will be enabled. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 8= 1). This will notify the controller that the disc drive has completed the offset operation. This status bit can be selectively cleared by the controller if it issues a CLA command. The stored offset magnitude is converted into an analog voltage by the digital to analog converter. The amount of voltage developed can be observed at the test point on track follower PCA-A5 labeled "O/S". This voltage is applied through a FET switch to the summing junction of the output summing amplifier for a negative offset operation. In the case of a positive offset operation, this voltage is inverted by a unity-gain inverting amplifier before it is applied to the summing junction. The output summing amplifier exhibits a gain of 0.5 to the offset circuit. The amount of offset is summed into the POS signal to cause the heads to be repositioned. Figure A-8 illustrates the heads centered over cylinder 0, positioned over cylinder 0 with maximum negative offset, and positioned over cylinder 0 with maximum positive offset. The heads will remain settled over their present cylinder position until a seek, recalibrate, or another set offset command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. A-48. RECALIBRATE OPERATION. A recalibrate operation is used to move the heads from their present cylinder position to a home position over cylinder O. The controller issues a recalibrate command to establish a reference head position. The disc drive can execute a recalibrate command whenever the heads are positioned and settled over any legal cylinder (ACRY and SB = 0). When the command is decoded, the RH signal will become active (RH = 0). This will cause the SKH signal to become active (SKH = 0) which will initiate a 1667 millisecond timeout cycle and direct set the seek home flip-flop. The servo enable flip-flop is not affected. It remains set from the initial head load operation. The state of the SKH signal can be observed at the test point on drive control PCA-A4 labeled "SKH". This signal will also cause the CYL signal to become active (CYL = 1). The state of the CYL signal can be observed at the test point on servo PCA-A3 labeled "CYL". Clearing the seek check flip-flop clears the seek check status bit (status bit 3 = 0). A-22 In addition, the COF signal will become active (COF = 0) to clear the offset magnitude and sign registers on track follower PCA-A5. This will ensure that any offset information stored during a previous offset operation will be cleared out so that it will not affect the positioning of the heads. With the seek home flip-flop set (SKH = 1 and SKH = 0), the new cylinder address register and present cylinder address counter will be cleared by SKH. Since the new cylinder address and present cylinder address count both match (both are zero), the MATCH signal will become active (MATCH = 1). The state of the MATCH signal can be observed at the test point on servo PCA-A3 labeled "M". With the heads currently positioned over the servo zone, the AGC signal from track follower PCA-A5 will be active (AGC = 1). The reset output from the seek home flip-flop (SKH = Ol and the presence of the AGC signal (AGC = 1) will activate the -slew FET switch. With this switch closed, a constant velocity will be commanded and an appropriate current applied to the linear motor coil. This current command can be observed at the test point on servo PCA-A3 labeled "CC". The carriage assembly will slew in reverse at 3.5 inches per second. When the outside edge of the outer guard band is first detected by the servo head, the AGC signal will become inactive (AGC = 0) to disable the reverse slew operation. The set output from the seek home flip-flop (SKH = 1) and the absence of the AGC signal (AGC = 0) will activate the +slew FET switch. With this switch closed, a forward slew operation will be initiated to reverse the movement of the heads. When the outside edge of the outer guard band is again detected by the servo head, the AGC signal will become active (AGC = 1) to disable the forward slew operation. The seek home flip-flop will be clocked clear by the leading edge of the AGC signal. The set output from the seek home nip-flop (SKH = 0) together with the absence of the RET signal (RET = 0) and the active MATCH + SKI signal (MATCH + SKI = 1), activates the fine position FET switch. With this switch closed, the current applied to the linear motor coil will be determined by the POS signal. This signal can be observed at the test point on track follower PCA-A5 (source) or servo PCA-A3 (destination) labeled "POS". During head movement, the ACRY signal will become inactive (ACRY = 1). This will cause future seek, recalibrate, or write operations to be inhibited; and the attention reset flip-flop to be clocked clear to reset the ACRY attention and retract attention flip-flops (status bit 8 = 0). Once the track center of cylinder 0 is detected (TCD and FINE POSITION = 1), the SB signal will become active (SB = 0), This signal will inhibit tachometer feedback to the head positioning servo loop. The state of the TCD signal can be observed at the test point on servo PCA-A3 labeled "TCD". After a 1.3 millisecond delay to allow time 7925 Appendix A for the heads to settle, the ACRY signal will become active (ACRY = 0). The drive ready flip-flop is not affected. It remains set from the initial head load operation~ When the ACRY signal becomes active (ACRY = 0), it cancels the 1667 millisecond timeout cycle; clocks the ACRY attention flip-flop set; and enables future seek, recalibrate, or write operations. The state of the ACRY signal can be observed at the test point on drive control PCA-A4 labeled "ACRY". The set output from the ACRY attention flip-flop causes the attention status bit to be active (status bit 8 = 1). This will notify the controller that the disc drive has correctly positioned the heads over the home position (cylinder 0). This status bit can be selectively cleared by the controller if it issues a CLA command. The heads will remain settled over the home position (cylinder 0) until a seek, set offset, or another recalibrate command is decoded, or until they are unloaded when the RUN/STOP switch is set to STOP or a fault condition is detected. A-49. EMERGENCY RETRACT OPERATION. The circuitry used to retract the heads during an emergency condition is located on PMR PCA-A9. It consists ofthe retract timer, programmable voltage regulator, .and linear motor relay. An emergency retract operation is initiated whenever the head positioning servo loop is disabled (SEN = 1) or a power supply failure is detected (PSF = 0). These conditions can be observed at the test points on PMR PCA-A9 labeled "SEN" and "PSF". Whenever either of these conditions exists, the linear motor relay will be de-energized to permit a retract voltage to be applied to the linear motor coil. Initially a retract voltage of approximately 7 volts is applied to the coil for about 500 milliseconds. The retract voltage is then reduced to approximately 4 volts until the carriage is fully retracted (CRB = 1) at which time the retract voltage is removed. During an emergency retract operation, the carriage will normally reach its fully retracted position before the retract voltage is reduced. Sustaining the higher retract voltage for an excessive period of time can damage the programmable voltage regulator, therefore, the retract voltage is reduced in the event that the carriage fails to reach its fully retracted position before the retract timer times out. The retract timer is designed to accept power from either the +10'or +36 Vdc supply, thus, if either supply should fail, the circuit will still function. Further, if both supplies should fail (as in the loss of mains power), the rotating spindle will act as a generator to provide enough power to retract the heads. The emergency retract voltage can be observed at the test point on PMR PCA-A9 labeled "ERV". If a timeout or interlock fault should occur during normal operations (TOF or ILF = 1l, the servo enable flip-flop will be cleared to disable the head positioning servo loop. This will de-energize the carriage unlatched solenoid (ECS = 0 and CSOL = 1) and linear motor relay (SEN = 0 l, disable the linear motor power amplifier (LMAE = 0), and initiate an emergency retract operation (ER = 0) after a 60 millisecond delay to ensure closure of the linear motor relay contacts. The state of the ER signal can be observed at the test point on PMR PCA - A9 labeled "ER". The interlock (ILF) line goes through an inverter and becomes the signal ILFL. If an interlock fault (ILF = 1, ILFO = 0) or a write fault (WFLT = 0) should occur, head selection will be terminated. This action prevents the heads from writing on the disc during an emergency retract operation. If a failure is detected in one or more of the power supplies (PSF = 0), a greater emergency is said to exist because it cannot be assumed that supply voltages are available to power the disc drive circuitry. In this case, the linear motor relay is immediately de-energized (PSF = Q) and a FET switch grounds the ER signal line (E'R = 0) to force an emergency retract operation. In addition, the PSF signal disables power to the spindle permitting it to coast to a stop and holds the door unlock solenoid de-energized to prevent access to the pack chamber until the carriage has been fully retracted (CRB = 1), spindle has come to a stop (SPD = 1), and the RUN/STOP switch has been set to STOP (STOP = 1). A-50. SECTOR SENSING SYSTEM The sector sensing system (see figure A-19) consists of circuits on track follower PCA-A5 and microprocessor PCA-A2, although all communication between these two PCA's occurs via motherboard PCA-A7. The purpose of the sector sensing system is to monitor circumferential head position by continually monitoring the physical location of each data sector as it passes beneath the heads. It notifies the controller when the present sector count equals the addressed sector. In addition, it enables the read/write system for a data transfer operation and determines the response of the controller when the rotational position sensing (RPS) feature is enabled. To accomplish this, a sector clock and index pulse are derived from the servo code which is magnetically recorded on the servo surface (see figures A-2 and A-8). The servo code consists of 6720 di-bits per revolution, although three of these di-bits are not recorded in the index zone. As the servo head flies over the servo surface, a voltage is magnetically induced. The output from the servo head is directly coupled to the input of the differential preamplifier stage. This stage consists of two differential amplifiers coupled together by a filter network. The gain of the first differential amplifier is controlled by the output from the AGC circuit on track follower PCA-A5. The differential output is filtered and coupled to a second, fixed-gain differential amplifier. The output from the differential preamplifier stage can be observed at the test point labeled "PRE". It will be approximately 1.4 volts peak-to-peak. A-23 Appendix A 7925 This differential output is coupled to the input of an integrated phase locked loop through the servo head signal filter (low-pass filter). The sector clock developed by the phase locked loop is coupled to a divide-by-eight counter and is fed back to provide a reference signal to the phase locked loop and a clocking signal to the index detector. The reference signal can be observed at the test point labeled "REF". The developed sector clock is a square-wave with exactly 53,760 transitions per revolution or 2.42 MHz at a spindle speed of2700 revolutions per minute. It is this output that is used to clock the sector counting electronics on microprocessor PCA-A2. Also, since the sector clock is phase locked to the servo code, it tracks any variations in spindle speed. The sector clock can be observed at the test point labeled "SCL". The inverted (PRE) output from the differential preamplifier stage is also coupled to the input of the negative level detector. The level detector detects the presence of peaks in the servo code that exceed 0.33 volt in amplitude. The output from the level detector can be observed at the test point labeled "NLD". The output from the negative level detector is coupled to the index detector where it sets a delay flip-flop. The output from the flip-flop is coupled to a 7-bit shift register. As the discs rotate counterclockwise from the beginning of sector 0 through the end of sector 63, positive-true bits are shifted into the shift register on the trailing edge of the reference signal. A unique 6-bit index pattern is magnetically recorded between physical sectors 0 and 63. When the entire 6-bits of the index pattern have been shifted into the shift register, an index pulse is generated on the trailing edge of the next reference signal transition. This index pulse can be observed at the test point labeled "iF". It will remain active for 3.31 microseconds. The derived sector clock is coupled to a divide-by-840 counter. At each count of 840, the sector counter is clocked to store the present sector count. This count corresponds to the physical sector presently passing beneath the heads. One revolution results in 53,760 clock transitions which when divided by 840 equals 64 physical sectors. Each time the disc pack completes a revolution, the index pattern is detected and the index pulse is generated to clear both the divide-by-840 and sector counters. This will initiate the counting cycle for the next revolution. The sector address register is initially cleared when NDPS becomes active (NDPS = 0). This occurs when power is first applied or when the RUN/STOP switch is set to RUN. This will establish a sector address of zero which will remain in effect until the contents of the sector address register are changed by an ADR command. Whenever an ADR command is issued by the controller, a 6-bit sector address is also supplied. Bits D4 and D5 are both checked to ensure that the address is legal before it is stored in the sector address register (legal sector addresses are 0 through 63). If both bits are active, the supplied address is greater than 63 and is therefore illegal. An illegal address A-24 is not stored in the sector address register, but instead a seek check will result (status bit 3 = 1). The legal address stored in the sector address register is continually compared with the present sector count by the sector comparator. Once the sector presently passing beneath the heads matches the addressed sector, the sector compare flip-flop will be clocked. When clocked during a read or write operation, the sector compare flip-flop will be clocked set and the sector compare signal will become active (SC = 1) to enable the read/write system for a data transfer operation. Sector compare can be observed at the test point labeled "SC". It will remain active until the end of the addressed sector is forced (count 816) or the READ or WRITE command is dropped. When jumper W360 is in place on microprocessor PCA-A2, a sector look-ahead algorithm called Rotational Position Sensing (RPS) is in effect. (The location ofjumper W360 on PCA-A2 is shown in figure A-16.) Then, after a SEEK has been completed, the response of the drive to a PARALLEL POLL command on the HP-IB is enabled only during a period of time (n + 1) milliseconds long on each revolution of the disc, when n is the unit number. This parallel poll response window closes two sectors before the target sector. If the host CPU does not give the parallel poll within this window, it must wait until the next revolution. If RPS is not enabled, the disc drive will respond to parallel poll immediately upon completing the SEEK, even though the heads might not be anywhere near the target sector. This could tie up the HP-IB for nearly 16 milliseconds waiting for a data transfer to begin. A-51. READ/WRITE SYSTEM The read/write system (see figure A-20) consists of circuits on data PCA-A1, microprocessor PCA-A2, servo PCA-A3, drive control PCA-A4, and R/W preamplifier PCA-A6. All communication between these PCA's occurs via motherboard PCA-A7 and interconnecting cables. The data heads connect directly to R1W preamplifier PCA-A6. The purpose of the read/write system is to provide tte means to read information from or write information onto a data surface of the disc pack. Included in the following are discussions relative to head selection, read mode operation, write mode operation, and read/write fault detection. A-52. HEAD SELECTION. Information is read from or written onto a data surface of the disc pack by means of nine data heads. There is one data head for each data surface. Each data head consists of a gapped ferrite core mounted in a ceramic shoe. Data heads are gimbaled and contoured to fly over the surface of the disc supported' by a thin cushion of air. Two windings are wound around the ferrite core. They are connect~d at a common point and phased such that the common point acts as a center tap. These windings are used for both reading and writing by detecting or producing a magnetic field at the gap in the ferrite core. 7925 Appendix A The appropriate head must be selected before a read or write operation can be performed. The address of the desired head is stored in the head address register on microprocessor PCA-A2. The head address register is ini- tially cleared when NDPS becomes active (NDPS = 0). This occurs when power is first applied or when the RUN/STOP switch is set to RUN. This will establish a head address of zero which will remain in effect until the contents of the head address register is changed by an ADR command. Whenever an ADR command is issued by the controller, a 4-bit head address is also supplied. Bits DO, D1, D2, and D3 are checked to ensure that the address is legal before it is stored in the head address register (legal head addresses are 0 thru 8). An illegal head address is not stored in the head address register, but instead a seek check will result (status bit 3 = 1). The stored head address is buffered by circuits on drive control PCA-A4. The buffered head select bits (BRSO through BRS3) are coupled to the input of the data head decoder on RlW preamplifier PCA-A6. If no write faults exist (WFLT = 0), the center tap winding of the addressed head will be switched to a + 12 Vdc power source. The multiple heads selected detector continuously monitors the center tap windings, and if more than one head is selected, a destructive MR fault will be declared. A-53. READ MODE OPERATION. As the data surfaces pass beneath the data heads, the magnetically stored flux fields intersect the gap in the ferrite core. Gap motion through the flux field causes a voltage to be induced into the read/write winding wound around the core. This induced voltage is analyzed by.the read circuitry to define the data recorded on the data surface. Each flux reversal (caused by a write current polarity change) generates a readback voltage pulse. The read circuitry on RlW preamplifier PCA-A6 and drive control PCA-A4 is always enabled in the read mode. A differential signal is coupled from the selected head windings to the input of the preamplifier stage via the head select diodes and the two conducting read/write mode FET switches. The other heads and the write current paths are isolated by back-biased diodes. The gain of the preamplifier stage is set by the data AGC circuit on drive control PCA-A4. The output of the preamplifier stage is coupled through a balanced low-pass filter to the differentiator stage. The differentiator stage transforms the read data waveform such that the data points are represented by zero crossings rather than the peaks produced at the data head. The differential .data from RlW preamplifier PCA-A6 is coupled through a second balanced low-pass filter on drive control PCA-A4 to the input of the fixed-gain read amplifier. The output from this amplifier is coupled to the zero crossing detector and data AGC circuit. The data AGC circuit maintains a constant peak-to-peak level at the input of the zero crossing detector by controlling the gain of the preamplifier stage on R/W preamplifier PCA-A6. The data AGC circuit is disabled during write mode operations. Once the sector presently passing beneath the heads matches the addressed sector, the sector compare flip-flop on microprocessor PCA-A2 will be clocked. When clocked during a read mode operation, the sector compare flip-flop will be clocked set and the sector compare signal will become active (SC = 1) to enable the read/write system for a data transfer. Sector compare will remain active until the end of the addressed sector is forced (count 817) or the READ command is dropped. With the disc drive selected (SEL = 1) and the read system enabled (URG = 1), the zero crossing detector and line driver are both enabled. The zero crossing detector will produce a pulse for positive- or negative-going zero crossings. These pulses are transferred via bidirectional data lines to the data separator in the controller. (See paragraph A-17.) A-54. WRITE MODE OPERATION. Data is written by passing a current through the read/write winding in the selected head. This generates a flux field across the gap. The flux field magnetizes the iron oxide particles bound to the surface of the disc. The writing process orients the poles of each magnetized particle to permanently store the direction of the flux field as the oxide passes beneath the head. The direction of the flux field is a function of the write current polarity. Data is written by reversing the write current through the head windings. This change in write current polarity switches the direction of the flux field across the gap. Erasing old data is accomplished by writing over any data which may have been previously written on the disc. As in a read operation, the sector compare flip-flop must be clocked set and the sector compare signal must be active (SC = 1) to enable the read/write system for a data transfer. Sector compare will remain active until the end of the addressed sector is forced (count 816) or the WRITE command is dropped. With the disc drive selected (SEL = 1) and the write system enabled (UWG = 1), the line receiver on drive control PCA-A4 is enabled to accept data from the controller via the bidirectional data lines. Data formatting is performed by circuits in the controller. (See paragraph A-16.) The data pulses produced by the line receiver toggle the write toggle logic to supply two complimentary write data signals (WDA and WDB) once the write mode of operation has been enabled. The write mode is enabled when the disc drive is selected (SEL = 1), the write system is enabled (UWG = 1), no write faults exist (WFLT = 0), and the read only mode is disabled (R02 = 0). The read only mode inhibits a write operation and thus prevents data from being written onto any data surface of the disc pack. The read only mode is selected when the READ ONLY switch is set to READ ONLY. The READ ONLY lamp will light and the read only status bit will become active (status bit 7 = 1) to signify that the read only mode has been selected. A-25 Appendix A 7925 When the write signal is active (WRITE = 1) and the URG and ACRY signals are both inactive (URG and ACRY = 0) which signifies that the read mode is disabled and the heads are settled over a legal cylinder, the WEN signal will become active (WEN = 1) to enable the write mode. Once enabled, the the read/write mode FET switches will disconnect the head select diodes from the. preamplifier stage. In addition, it will enable the switchable write current source to produce write current to the head windings. The amount of write current produced is controlled by the programmable write current sink. The three most significant bits of the cylinder address are coupled from servo PCA-A3 to the input of the programmable write current sink on RlW preamplifier PCA-A6. This information is used to modify the write current via the programmable write current sink. Seven write current zones ensure proper saturation for best head resolution. Write current is reduced by 3.50 milliamperes for each 128 cylinder increment from cylinder zero. Maximum write current is available at the outer cylinders and it is progressively reduced as the heads are moved toward the inner cylinders. This will optimize the write current for the changing relative velocity between the heads and media as cylinder radius decreases. Table A-4 lists the reduction in write current as a function of the cylinder address. Table A-4. Write Current Reduction vs. Cylinder Address CYLINDER DWA DWB DWe REDUCTION IN WRITE CURRENT (rnA peak) 0- 127 a a a 128 - 255 a a 1 256 - 383 a 1 a 384- 511 a 1 1 512 - 639 1 a a 640- 767 1 a 1 768- 822 1 1 a a 3.50 7.0 10.5 14.0 17.5 21.0 The programmable write current sink draws current from the selected head through the write current switches. Each write current switch is in series with one of the head windings. The complementary write data lines (WDA and WDB) alternately control these write current switches. This selects the head winding through which the write current will pass. Changing the write current from one winding to the other reverses the flux field at the gap in the ferrite core. This changes the direction of the magnetization of the oxide particles bound to the surface of the disc, thereby writing a data bit. A-55. READ/WRITE FAULT DETECTION. As previously mentioned, the multiple heads selected detector continuously monitors the center taps of each head winding, and if more than one head is selected, a destructive MH fault is declared. In addition, the ac write current A·26 detector continuously monitors the write current paths, and if the absence of alternating write current is sensed, a destructive W. AC fault is declared. The dc write current detector continuously monitors the output of the switchable write current source, and if dc write current is being applied to the head windings and the disc drive is not in the write mode, a destructive DC. W fault is declared. The state of the ACRY signal is continuously monitored, and ifhead movement is detected during the write mode, a non-destructive W. AR fault is declared. The state of the URG signal is continuously monitored, and if the read and write modes are simultaneously enabled, a nondestructive R. W fault is declared. Whenever one of these read/write fault conditions is detected, a latch on' drive control PCA-A4 will be set, an LED will light, subsequent read/write faults will be inhibited, the write mode will be terminated, and all heads will be disabled. A-56. FAULT DETECTION SYSTEM The fault detection system (see figure A-21) consists of circuits on data PCA-Al, microprocessor PCA-A2, servo PCA-A3, drive control PCA-A4, spindle logic PCA-A8, power and motor regulator (PMR) PCA-A9, and fault indicator PCA-AI2. All communication between card cage PCA's occurs via motherboard PCA-A7 and interconnecting cables. Spindle logic PCA-A8 and PMR PCA-A9 communicate with the other PCA's through the main harness. Fault indicator PCA-AI2 communicates with drive control PCA-A4 through a separate interconnecting cable. The purpose of the fault detection system is to continually monitor various conditions within the disc drive, and light fault indicators, retract the heads, and brake spindle rotation when a fault is detected. Included in the following are discussions relative to illegal address, timeout, AGC, carriage back, interlock, and read/write fault detection. A-57. ILLEGAL ADDRESS DETECTION. A circuit servo PCA-A3 continually monitors the internal control bus in the disc drive for illegal cylinder addresses. Whenever this condition exists, the disc drive will make seek check (status bit 3 = 1) available in its status word and it will not clock the illegal address into the appropriate register. The internal control bus bits DO through D9 are continually monitored by the illegal cylinder address detector on servo PCA-A3. If a cylinder address greater than 822 is detected, the ICA signal will become active (ICA = 1). This will inhibit the illegal cylinder address from being clocked into the new cylinder address register (see figure A-21). The seek check flip-flop will be clocked set on the leading edge of the decoded SEEK command. The seek check flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). In addition, the seek check flip-flop is reset by CYL whenever the seek home command is active (SKH = 0) or a seek to a legal cylinder address command is decoded. 7925 Appendix A A-58. TIMEOUT FAULT DETECTION. Each time a forward or reverse seek operation is commanded, circuits on drive control PCA-A4 initiate a 120 millisecond time- out cycle. When the SEEK command is decoded (SK = 1), the timeout cycle flip-flop is set to initiate the 120 millisecond timeout cycle. A 135 Hz signal (TCC) derived from the spindle speed (see figure A-21) is used to clock the timeout counter. Similarly, a 1667 millisecond timeout cycle is initiated each time an initial head load, normal head unload, or recalibrate operation is commanded. Table A-5 provides a summary of those conditions that initiate and those conditions that cancel a timeout cycle. If the event being timed is not cancelled before the timeout counter times out, a timeout fault will be declared. When a timeout fault is detected, the following events will occur: · TOFL signal becomes active (TOFL = 0). · T fault LED lights (TOFL = OJ. · Timeout counter reset is inhibited (TOFL = 0). · Heads are unloaded, spindle is braked to a stop, and the pack chamber door is unlatched. Refer to table A-6 for the specific events. The timeout counter is reset by DPS whenever the poweron sequence is initiated (lLF = 1) or the RUN/STOP switch is set to RUN (RUN = 1). A-59. AGC FAULT DETECTION. The state of the AGC signal is continually monitored by a circuit on servo PCA-A3. If the servo AGe signal is lost while the heads are located on or between cylinders 0 and 822, an AGC fault will be declared. When an AGC fault is detected, the following events will occur: · AGC fault flip-flop is set (AGCF · DRDY = 1). · AGFL signal becomes active (AGFL = 0). · AGC fault L~D lights (AGFL = 0), · Heads are unloaded. Refer to table A-6, steps 1 through 8, for the specific events. The AGC fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). A-60. CARRIAGE BACK FAULT DETECTION. The state of the CRB signal is continually monitored by a circuit on drive control PCA-A4. If the CRB signal becomes active (CRB = 1) indicating that the heads have been fully retracted, but the drive ready flip-flop has not been reset by the RET signal (CRB and DRDY simultaneously active), a carriage back fault will be declared. When a carriage back fault is detected, the following events will occur: · Carriage back fault flip-flop is set (CRB · DRDY = 1). · CBFL signal becomes active (CBFL = 0). · CB fault LED lights (CBFL = 0). · Heads are unloaded. Refer to table A-6, steps 1 through 8, for the specific events. The carriage back fault flip-flop is reset by DPS whenever the power-on sequence is initiated (lLF = 1) or the RUN/ STOP switch is set to RUN (RUN = 1). A-61. INTERLOCK FAULT DETECTION. The interlock fault detection circuitry on drive control PCA-A4 continually monitors the interlock chain, the -36, -24, -12, +5, + 12, and +36 Vdc power supply voltages, the temperature of the heat sink on PMR PCA-A9, and the spindle fault logic on spindle logic PCA-A8. If anyone of the PCA's (with the exception of indicator PCA-A11 and fault indicator PCA-A12) is not firmly in place, the pack chamber is disconnected, anyone of the monitored power supplies falls below a specified value, the temperature of Table A-5. Summary of Timeout Conditions TIMEOUT CYCLE 120 ms 1667 ms 1667 ms 1667 ms INITIATING CONDITION Seek command (SK = 1) Initial Head load (SKH = 0) Normal head unload (RET. TOFl + IlFl = 1) Recalibrate command (RH = 1) CANCELLING CONDITION Heads settled on. specified cylinder within 120 milliseconds (TOFl · ACRY = 1). Heads settled on cylinder 0 within 1667 milliseconds (TOFl · ACRY = 1). Heads reach fully retracted position within 1667 milliseconds (TOFl. RET. CRB = 1). Heads are settled on cylinder 0 within 1667 milliseconds (TOFl · 2 AeRY = 1). A-27 Appendix A 7925 STEP Table A-6. Fault Events EVENT 1 DRIVE FAULT lamp lights (FLTL = 0). 2 Drive fault status bit is active (status bit 5 = 1). 3 Normal head unload operation is initiated (RET = 1). 4 Drive ready flip-flop is reset (RET = 1). 5 DRIVE READY lamp goes out (DRDY~ = 1). 6 Servo enable flip-flop is reset (TOF = 1). 7 Head positioning servo is disabled (SEN = 1). 8 Heads are fully retracted (CRB = 1). 9 Run spindle flip-flop is reset (TOF. CRB = 1). 10 Stop spindle command becomes active (RS = 0). 11 Spindle is braked to a stop (SPD = 0). 12 Door unlock solenoid is energized (SPD = 0). 13 DOOR UNLOCKED lamp lights (DU = 0). the heat sink on PMR PCA-A9 rises above a specified value, or a spindle fault is detected, an interlock fault will be declared. When an interlock fault is detected, the following events will occur: · PSU LED is on when +5 Vdc and + 12 Vdc are present. · ILFL signal becomes active (lLFL = 0). · IL fault LED lights (lLFL = 0). · Heads are unloaded, spindle is braked to a stop, and the pack chamber door is unlatched. Refer to table A-7 for the specific events. If an interlock is indicated because the +5, + 12, or -12 Vdc is missing, or spindle logic PCA-AS is unplugged, the spindle will not be braked to a stop and the pack chamber door will not be unlocked. Under these conditions, the following events will occur: · PSU LED goes out because PSF = O. · ILFL signal becomes active (ILFL = 0) · IL fault LED lights (lLFL = 0) · Heads are unloaded and steps 1 through S of table A-7 apply. Note: If drive control PCA-A4 is unplugged, then the DRIVE FAULT and IL indicators will not light. A-62. READ/WRITE FAULT DETECTION. The read/write fault detection circuitry on drive control PCA-A4 continually monitors internal disc drive signals to detect five fault conditions. These fault conditions are A·28 classified as either non-destructive or destructive write faults. There are two non-destructiv'e and three destructive write faults. Each is discussed in detail in the following paragraphs. A-63. Non-destructive Write Faults. The two fault conditions classified as non-destructive are: · Write without Access Ready (W · AR). · Simultaneous read or write (R · W). In the first condition, the state of the ACRY signal is continually monitored. If the heads are not settled over the specified cylinder (ACRY = 1) during the write mode (WRITE = 1) and no other write faults exist (W'FLT = 1), a W 0 AR fault is declared. When a W · AR fault is detected, the following events will occur: · W. AR fault flip-flop is set (W · AR · WFI7F = 1). · WRFL signal becomes active (WRFL = 0). · W. AR fault LED lights (WRFL = 0). · NDWF signal becomes active (NDWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · DRIVE FAULT lamp lights (FLTL = 0), · Drive fault status bit becomes active (status bit 4 = 1), The W · AR fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1), In the second condition, the state of the' URG signal is continually monitored. If the URG signal becomes active (URG = 1) during the write mode (WRITE = 1) and no other write faults exist (W'FLT = 1), a R · W fault is declared. When a R · W fault is detected, the following events will occur: oRo \V fault flip-flop is set (R 0 W 0 WFLT = 1). · RWFL signal becomes active (RWFL = 0 l. · R · W fault LED lights (RWFL = 0), · NDWF signal becomes active (NDWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0>. 7925 Appendix A · DRIVE FAULT lamp lights (FLTL = 0). · Drive fault status bit becomes active (status bit 5 = 1). The R · W fault flip-flop is reset by NDPS whenever the power-on sequence is initiated (lLF = 1), the RUN/STOP switch is set to RUN (RUN = 1), or a CPS command is decoded (CPS = 1). A-64. Destructive Write Faults. The three fault conditions classified as destructive are: · A write gate without any alternating write current (W.AC). · More than one head selected (MH). · DC write current without a write gate (DC. W). In the first condition, the state of the ACW signal is continually monitored. If the ACW signal remains inac- tive (ACW = 0) during the write mode (WRITE =1) and no write faults exist (WFLT = 1), a W · AC fault is declared. When a W. AC fault is detected, the following events will occur: · W. AC fault flip-flop is set (W · AC · WFLT = 1). · WAFL signal becomes active (WAFL = 0). · W. AC fault LED lights (WAFL = 0). · DWF signal becomes active (DWF = 0), · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · Heads are unloaded. Refer to table A-6, steps 1 through 8, for the specific events. The W · AC fault flip-flop is reset by DPS whenever the power-on sequence is initiated (ILF = 1) or the RUN/ STOP is set to RUN (RUN = 1). In the second condition, the state of the MHS signal is continually monitored. If the MHS signal becomes active (MHS = 0) and no other write faults exist (WFLT = 1), a MH fault is declared. When a MH fault is detected, the following events will occur: · MH fault flip-flop is set (MHS · WFLT = 1). · MHFL signal becomes active (MHFL = 0). · MH fault LED lights (MHFL = 0). · DWF signal becomes active (DWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · Heads are unloaded. Refer to table A-6, steps 1 through 8, for the specific events. The MH fault flip-flop is reset by DPS whenever the power-on sequence is initiated (ILF = 1) or the RUN/ STOP switch is set to RUN (RUN = 1). In the third condition, the state of the DCW signal is continually monitored. If write current is being applied to the heads (DCW = 1), the disc drive is not in the write mode (WRITE =; 0), and no other write faults exist (WFLT = 1), a DC. W fault is declared. When a DC. W fault is detected, the following events will occur: · Both the W · AC and MH fault flip-flops are set (DC. W. WFLT = 1). · Both the WAFL and MHFL signals become active (WAFL and MHFL = 0). · Both the W · AC and MH fault LED's light (WAFL and MHFL = 0). · DWF signal becomes active (DWF = 0). · WFLT signal becomes active (WFLT = 0). · Subsequent read/write faults are inhibited (WFLT = 0). · Heads are unloaded. Refer to table A-6, steps 1 through 8, for the specific events. The W. AC and MH fault flip-flops are reset by DPS whenever the power-on sequence is initiated (lLF = 1) or the RUN/STOP switch is set to RUN (RUN = 1). A-65. AIR CIRULATION AND FILTRATION SYSTEM The air circulation and filtration system (see figure A-9) consists of a rotating impeller located on the disc drive mainframe and an exhaust fan located on the power panel assembly. In addition, a prefilter and absolute filter are used to trap contaminants in the developed air supply. As can be seen in figure A-9, a centrifugal blower draws room ambient air into the prefilter enclosure through the vent openings in the front door of the enclosure. The larger airborne contaminants are trapped as the air is drawn through the prefilter. Approximately one-half of the developed air flow bypasses the absolute filter element, passing directly through the lower half of the absolute filter box. From there, the air is directed through a flexible hose to the cooling air duct where it is diverted into three separate paths. Two of these paths flow along the fins of A-29 Appendix A POWER AND MOTOR REGULATOR PCA·A9 7925 I"'~~~=--~.!.....:.....~_ABSO LUTE FILTER CENTRIFUGAL BLOWER PREFILTER ENCLOSURE PREFILTER 7301-98 Figure A-9. HP 7925H Air Circulation and Filtration System the heat sink on power and motor regulator PCA-A9 and the remaining path is distributed over the components mounted on the PCA. The flow of air from the heat sink exits through the ducting and vent openings provided at the rear of the enclosure. The fan on the card cage assembly directs cooling air to the peA's housed in the assembly. The remaining half of the developed air flow passes through the filtration element in the absolute filter where 99 percent of all contaminants 0.3 micron or larger are trapped. After the air is thoroughly filtered, it is ducted into the pack chamber. When a disc pack is installed, all critical areas will be purged of any foreign matter. Also, the high positive pressure developed within the pack chamber tends to reject any foreign matter that may be airborne. Figure A-IO shows the critical elements involved in the read/write process, i.e., the read/write gap, the flying height of the heads, and the thickness of the oxide coating on the disc surfaces. The flying height of the heads is an average value .due to the surface irregularities of both the heads and discs. Figure A-IO also shows various types of contaminants and their size relationships. If a particle was hard enough and of the right size, it could scratch either the oxide coating or the head surface. Even if it was not hard enough to scratch, it may be large enough to increase the head-to-disc spacing, thereby causing data errors. Therefore, to prevent potential damage due to head-to-disc contact and possible data losses, it becomes extremely important to maintain the cleanliness of the air supply within the disc drive. To ensure that clean air will be present, the disc.drive must be operated in the specified environment and the cleanliness of the prefilter and efficiency of the absolute filter must be checked on a regular basis. Refer to Section II, Maintenance in the main manual, for the absolute filter output air pressure measurement procedure. Further, the absolute filter must be changed whenever the air flow through it becomes restricted and the output air pressure drops below the value specified in paragraph 2-13 in the main manual. Refer to Section V, Removal and Replacement in the main manual, for the prefilter and absolute filter replacement procedures. A-66. POWER DISTRIBUTION SYSTEM The power distribution system primarily consists of the power panel assembly, power supply assembly, voltage A·3D 7925 Appendix A SMOKE PARTICLE 6.35 MICRONS (250 MICROINCHES) READ/WRITE GAP 1.52 MICRONS (60 MICROINCHES) ) TYPICAL FLYING HEIGHT AT CYLINDER 822 ~ I.-~nr 0.69 MICRONS (27 MICROINCHES) ~ .. llH~ J OXIDE COATING THICKNESS 1.01 MICRONS (40 MICROINCHES) ¢ DIRECTION OF ROTATION IS COUNTERCLOCKWISE. SURFACE SPEED AT 2700 RPM IS 112 MI LES PER HOUR AT THE OUTER CIRCUMFERENCE. t ALUMINUM SUBSTRATE 0.19 CENTIMETRE (0.075 INCH) 7301-46A Figure A-10. Types of Contaminants and Critical Elements regulator and protection circuits, and the associated switches, fuses, lamps, and wiring. The purpose of the power distribution system is to develop the various operating voltages from the primary power source and distribute these voltages throughout the disc drive circuitry. Figure A-15 provides the wiring diagram for the disc drive mainframe assembly. Tables A-II and A-12 in this appendix provide the signal distribution list for motherboard PCA-A7 and the power distribution list for the disc drive mainframe assembly, respectively. Together these diagrams and listings provide all of the wiring information for the disc drive. A-67. POWER PANEL ASSEMBLY. The power panel assembly (21, figure 6-1 in the main manual) is located in the lower rear section of the disc drive cabinet. This assembly consists of a circuit breaker, a threereceptacle outlet strip, and an air intake fan. The power panel assembly equips the enclosure with an electrical package to control, protect, and distribute single-phase mains power. The intake fan is used to help maintain the internal cabinet temperature at the proper operating level. The disc drive is supplied with an appropriate power cord. The various power cords available are shown in the HP 7925D Installation Manual, part no. 07925-90912. A-68. POWER SUPPLY ASSEMBLY. The power supply assembly consists of a power transformer (T1), three bridge rectifiers (CR1 through CR3), five filter networks (R1 through R5 and C1 through C5), and five fuses (F2 through F6). This assembly develops five unregulated dc voltages (+20V, -20V, +10V, +36V, and -36V) from the primary power source. The terminal strip (TB1) on the primary side of the power transformer (T1) permits strapping of the primary windings to match the available primary power source. Refer to figure A-15 Mainframe Assembly Wiring Diagram, for the various strapping configurations of TBl. Fuses provide overload protection for the five unregulated secondary voltages. All power supply assembly grounds are brought to a common ground block (TB2). It is important that these connections be made as shown because each has a specific assignment, i.e., ground 1 serves as logic ground, ground 2 serves linear motor ground, and grounds 3 and 4 serve as spindle motor grounds. A-69. VOLTAGE REGULATOR CIRCUITS. The unregulated dc voltages developed by the power supply assembly are routed to the four voltage regulator circuits on power and motor regulator PCA-A9 via the power supply harness. The unregulated output from the + 10 volt supply is routed to the input of the +5 volt voltage regulator. The +5 volt regulated supply is sampled at motherboard PCA-A7 so that the proper voltage level will be maintained at that point. The unregulated output from the +20 and -20 volt supplies are routed to the inputs of the + 12 and -12 volt voltage regulators. The unregulated output from the -36 volt supply is routed to the -24 volt voltage regulator. Test points are provided on power and motor regulator PCA-A9 to monitor the outputs from the +5, + 12, -12, and -24 volt regulated supplies. A-31 Appendix A 7925 A-70. VOLTAGE PROTECTION CIRCUITS. Circuits are provided in the disc drive to detect over and under voltage conditions in the +5, +12, -12, +36 and -36 volt supplies. Reverse polarity protection is also incorporated into each disc drive supply. Diodes on power and motor regulator PCA-A9 provide reverse polarity protection at the input of the +5, + 12, -12, and -24 volt regulated supplies and +36 and -36 volt unregulated supplies. Diodes on motherboard PCA-A7 provide additional reverse polarity protection for the + 12 and -12 volt regulated supplies. In addition, a crowbar circuit on motherboard PCA-A7 guards the + 5 volt regulated supply from a possible overvoltage condition and guards the -12 volt regulated supply from a possible connection to a positive supply. A fuse (A9Fl) provides overload protection for the +36 Vdc supply. The -24 volt regulated supply is also protected from overload by a fuse (A9F2). A-71. SUPPLY VOLTAGE DISTRIBUTION. The outputs from each of the four regulated supplies, the + 10 volt unregulated supply, the +36 volt supply, and ground 1 are routed throughout the disc drive via interconnect cables, the main harness, and motherboard PCA-A7. The regulated supplies are used to provide the operating voltages for the controller and the disc drive circuitry. The unregulated + 10 volt supply is used to provide the operating voltage for the carriage unlatched solenoid and pack chamber door unlocked solenoid. In addition, it provides the input to the +5 volt voltage regulator. Ground 1 is used as logic ground throughout the controller and disc drive circuitry. The +20 volt supply is used to evaluate the line voltage condition (brownout protection). A power distribution list is provided in table A-12. The outputs from the +20, -20, +36, -36 volt unregulated supplies and grounds 2, 3, and 4 are not included in this listing because they are used exclusively on power and motor regulator PCA-A9. As long as PSF equals 1, the PSU LED on drive control PCA-A4 will be on indicating that the + 5, + 12, and -12 power supplies are working and within tolerance. As previously mentioned, the unregulated outputs from the + 20, - 20, and - 36 volt supplies are used to develop regulated voltages, ground 2 is used as linear motor ground, and grounds 3 and 4 are used as spindle motor grounds. The unregulated ±36 volt supplies are used to provide the operating voltages for the linear motor power amplifier and the four spindle motor current switches which are located on power and motor regulator PCA-A9. A-32 PART II - MAINTENANCE In general, the maintenance information contained in section II of the main manual is applicable to the HP 7925H. The only changes required pertain to the description of the special test equipment (paragraph 2-7) and the preventive maintenance schedule (paragraph 2-10). These changes are described in the following paragraphs. A-72. SPECIAL TEST EQUIPMENT The Disc Service Unit (DSU) described in section II of the main manual is the only item of special test equipment required to service the HP 7925H Disc Drive. However, operation of the DSU with the HP 7925H requires the use of the following additional item of equipment. · I/O Sector PCA, part no. 07925-60001. (See figure A-l1.) Instructions for installing the DSU in the HP 7925H are provided in part III of this appendix. It should be noted that the controller's self-test feature is deactivated when the DSU is installed in the HP 7925Hdisc drive faults are identified solely by eight lightemitting diodes (LED's) located on the disc drive control panel and three LED's on spindle logic PCA-AB. Interpre- Figure A-II. I/O Sector PCA, part no. 07925-60001 tation ofthis readout is described in section IV of the main manual. A-73. PREVENTIVE MAINTENANCE For HP 7925H usage, the following information should be added to table 2-3 in the main manual. ITEM ROUTINE Card Cage Assembly Fan Inspect for proper operation. A-33/A-34 PART III - ALIGNMENT AND ADJUSTMENT In general, the alignment and adjustment procedures given in section III of the main manual are applicable to the HP 7925H. The only differences pertain to installing the DSU (paragraph 3-8) and on-line checkout (paragraph 3-17). These paragraphs should be replaced with the following information. A-74. INSTALLING THE DSU WARNING The equipment described in these instructions does not contain operator-serviceable parts. To prevent electrical shock, refer the following installation to service-trained personnel. To install the disc service unit (DSU), proceed as follows: a. Perform the preparation for service procedure outlined in paragraph 5-2 of the main manual. b. Ensure that the ac power cord is disconnected from the ac mains power source. c. Remove the shroud following the procedure outlined in paragraph 5-3 of the main manual. d. Remove the two nuts (6, figure A-14) that attach the cable assembly (5) to the card cage cover. Separate the cable from the cover. e. Loosen the three screws that secure the preamp shield and remove the shield. f. Loosen the screws used to secure the card cage cover to the card cage chassis and remove the cover. g. Remove jumper cable, part no. 13365-60006, connected between data PCA-A1 and microprocessor PCA-A2. h. Remove data PCA-A1 and microprocessor PCAA2 from the card cage chassis. i. Install Head Alignment PCA, part no. 13354-60010, into the card guides for Al. Ensure that the component side of the PCA is facing towards the right-hand side of the card cage chassis, as viewed from the front of the disc drive. Push the PCA into the connector on motherboard PCA-A7 until the PCA is firmly seated. j. Insert I/O Sector PCA, part no. 07925-60001, into the card guides for A2. Ensure that the component side of the PCA is facing in the same direction as The component side of the head alignment PCA. Push the PCA firmly into the connectors on motherboard PCA-A7. k. Hang the DSU Test Module, part no. 13354-60005, on the top outer edge of the card cage chassis as shown in figure 3-4 of the main manual. 1. Connect 50-pin Jumper Cable, part no. 1335460012, between the 50-pin connector on the DSU test module and J1 on the I/O Sector PCA. m. Connect 20-pin Jumper Cable, part no. 1335460013, between the 20-pin connector on the DSU test module and J1 on the head alignment PCA. I CAUTION I Do not plug or unplug any cables from the data heads to read/write preamplifier PCA-A6 or from the servo head to track follower PCA-A5 while the heads are loaded. Incorrect information can be written on the disc. n. Connect the head cable connector from the head alignment PCA to the head connector located at the top of read/write preamplifier PCA-A6. A-75. ON-LINE CHECKOUT When all adjustments have been completed, remove the CE disc pack. Set the power switch on the power panel assembly to the 0 (off) position. Remove the DSU, head alignment PCA, I/O sector peA, and related cabling. Replace data PCA-A1, microprocessor PCA-A2, reconnect the cabling disconnected prior to alignment, replace the shroud, and apply ac power. The HP 7925H includes a self-test feature that provides a go/no-go check of the controller hardware and also tests certain functions of the disc drive. Self test can be invoked in the following three ways: · Automatically via a power-on or by setting the disc drive RUN/STOP switch to RUN. · Using the HP-IB INITIATE SELF-TEST command. · Manually by activating the START switch on the self-test panel located at the rear of the disc drive, assuming that the controller is in Idle State 2 or 3. Full details of self-test operation and readout interpretation are provided in Part IV of this appendix. Following satisfactory completion of self test, perform an on-line checkout in accordance with the diagnostic tests supplied with the system. A-35/A-36 PART IV - TROUBLESHOOTING The troubleshooting information provided in section IV of the main manual requires a number of changes and additions to make it applicable to the HP 7925H. Changes are required for the following: · Diagnostic Test Programs (paragraph 4-1) · Troubleshooting Flowcharts (paragraph 4-2) · Power Sources (paragraph 4-3) · Visual Indication of Drive Status (paragraph 4-4) · Disc Service Unit (paragraph 4-5) · System Functional Diagrams (paragraph 4-6) · Wiring Connections (paragraph 4-7) · Power Distribution (paragraph 4-8) Details of the required changes are provided in paragraphs A-76 through A-88. WARNING Troubleshooting instructions are intended for service-trained personnel only. To avoid potentially serious electrical shock, do not proceed further in this part unless qualified to do so. A-76. DIAGNOSTIC TEST PROGRAMS In addition to employing the diagnostic test programs described in the main manual, the HP 7925H also includes a self-test capability that assists in isolating certain malfunctions to the printed-circuit assemblies (PCA's) and other components of the disc drive. Details of this self-test feature are provided in the following paragraphs. A-77. SELF TEST Self test thoroughly tests controller PCA's Al and A2 to a functional block level (110 logic, microprocessor, formatter/separator, etc.) and is intended as an aid to board-level repair of the controller. Certain functions of the disc drive are also tested on a go/no-go basis. The self-test feature includes the following components: · Test firmware in ROM. · A test panel with operating controls and indicators, located at the rear of the disc drive (see figure A-12). · A SELF TEST FAILED indicator on the operator panel of the disc drive. The self-test routine is divided into 13 separate tests with two additional tests reserved for equipment adjustments. Most of the tests are subdivided into sections (up to 15). The tests are executed in a "bottom up" progression, first testing the controller microprocessor, extending to the remainder of the controller logic, and finally testing the functioning of the disc drive (with the exception of write). The tests are executed in reverse order, from test 17 (octal) to test 3. The first test turns on all of the rear panel TEST RESULT LED's (octal 17). If self test passes, all of the LED's are turned off. Self test can be invoked in the following three ways: · Automatically via a power-on or by setting the disc drive RUN/STOP switch to RUN. · Using the secondary HP-IB INITIATE SELF-TEST command. · Manually by activating the START switch on the rear self-test panel (assuming that the controller is in Idle State 2 or 3). Note: The LED in the upper left-hand corner of the disc drive Unit Select Indicator is unlighted when the controller is in Idle State 2, Idle State 3, or when self test is running. When the LED is lighted, the controller will not respond to the test START switch. A-78. MODES OF OPERATION The OP/SERVICE switch on the self-test panel (figure A-12) places the controller self-test feature in either an operating mode or a service mode. The switch must be in the OP (operating) position for the disc drive to operate normally. In the SERVICE position, the self-test circuit will loop continuously in self-test until a failure occurs. Details of the two modes of operation are provided in the following paragraphs. Refer to table A-7 for a summary of self-test control operation and to table A-8 for a detailed description of the tests. A-37 Appendix A 7925 A-79. OPERATING MODE. Self test will be started at power turn on and will run through the self-test sequence until a test requiring a "drive ready" state is incurred. A flashing octal 10 will then be seen on the TEST RESULT LED's. When the disc drive RUN/STOP switch is set to RUN, the sequence described above will be repeated. When the spindle comes up to speed, the heads load, and the internal time delays have lapsed, "drive ready" will occur, and the self-test sequence will complete. A similar sequence can be initiated by HP-IB command, or by the START switch on the self-test panel. At the beginning of self test, the TEST RESULT LED's, the S.T. FAILED LED, and the operator panel SELF TEST FAILED indicator will flash briefly, indicating controller activity and testing of the LED's. If a test fails, the test number (octal) is displayed continuously on the TEST RESULT LED's. A test failure summary, including probable failure sources is provided in table A-9. The S.T. FAILED LED and the SELF TEST FAILED indicator are also lit continuously if a test fails. If no failures are detected, all self-test readout remains off. If an error occurs on tests 17 through 15, the controller "hangs" (HP-IB command sequences are not recognized and the self-test panel switches are inoperative). If an error occurs in tests 14 through 3, or if there are no errors, self test exits to the controller operating firmware where the HP-IB sequences are recognized. The secondary sequence RETURN SELF-TEST RESULT should be executed before any disc drive commands are attempted in order to learn of any self-test failures. All other disc drive indicators and controls, including the DRIVE FAULT and DRIVE READY indicators, and the RUN/STOP switch are not affected by self test. Drive ready is not inhibited by a self-test failure. A-BO. SERVICE MODE. In the service mode, the controller loops continuously on the test number set on the TEST NUMBER switches until the first error is detected. If the TEST NUMBER switches are set to zero, the controller loops on the entire self-test program. If the controller is looping on a single test in the service mode and an error is detected, the section number of the failure is continuously displayed on the test panel TEST RESULT LED's. If the controller is looping on all of self test (TEST NUMBER switches set to zero), the test failed number is displayed continuously. Whenever a test is successfully completed when in the service mode, the TEST RESULT LED's flash the appropriate test number to indicate which test the controller is executing. When looping on all of self test, the TEST RESULT LED's continually count down through the test numbers. A-81. SELF-TEST EXAMPLE The following example is provided to illustrate the manner in which a circuit malfunction - an intermittent fault in the formatter/separator data path - is isolated by A-38 means of self test. First, it should be noted that intermittent faults may not cause a self-test fail at power turn on, especially if the problem is temperature related. Therefore, if a drive fault is suspected, it is recommended that a continuous loop on self test be initiated. This is achieved by a) setting the OP/SERVICE switch to the SERVICE position, b) setting all of the TEST NUMBER switches to zero, and c) activating the START switch. In the event that the system is not in Idle State 2 or 3, Idle State 2 can be entered via the END command. The controller will now loop on self test, with the TEST RESULT LED's counting down the test numbers until an error is detected. The TEST RESULT LED's will then continuously display the errant test number and the self-test failed indicators will be lit. For the sample malfunction, an octal 12 will be displayed, indicating a formatter/separator loopback test failure. Details of this test are given in table A-B. By setting the TEST NUMBER switches to 12 and again activating the START switch, the controller can now be made to loop on the formatter/separator test until a failure again occurs. This time, when a failure is detected, self test will halt with the TEST RESULT LED's indicating the sector number of the failure - in this case an octal15. From table A-9, it can be determined that the data sent through the formatter/separator is bad and the probable source of the malfunction is data peA-Al. It is possible to continuously loop on a section failure by a) selecting the service mode, b) setting the TEST NUMBER switches to the failed section number, and c) holding the START switch in the on position. This allows the failed test to be repeated after it is detected - a useful feature when troubleshooting the circuitry with an oscilloscope. A-82. TROUBLESHOOTING FLOWCHARTS The following troubleshooting flowchart is revised for use with the HP 7925H and replaces figure 4-1 in the main manual. · Figure A-13. HP 7925H Power-Up Troubleshooting Flowchart The remainder of the troubleshooting flowcharts in the main manual are applicable to the HP 7925H. The revised functional diagrams listed in paragraph A-B6 should be used with these flowcharts. A-83. POWER SOURCES The following schematic is revised for use with the HP 7925H and replaces figure 4-23 in the main manual. · Figure A-15. HP 7925H Mainframe Assembly Wiring Diagram 7925 Appendix A A-84. VISUAL INDICTION OF DRIVE STATUS The information given in the main manual for visual indication of drive status (table 4-1) is applicable to the HP 7925H, with the exception of the listing of applicable functional diagrams and the data presented for the Unit Select Identification indicator. The revised data for the Unit Select Identification indicator is given in table A-lO. The revised functional diagrams listed in paragraph A-86 should be used with table 4-1 in the main manual. A-8S. DISC SERVICE UNIT The disc service unit (DSU) installation instructions given in section III of the main manual do not apply to the HP 7925H. Refer to part III of this appendix for DSU installation instructions applicable to the HP 7925H. A-86. SYSTEM FUNCTIONAL DIAGRAMS The following diagrams have been revised for use with the HP 7925H and replace figures 4-23 through 4-29, respectively, in the main manual. · Figure A-15. HP 7925H Mainframe Assembly, Wiring Diagram · Figure A-16. HP 7925H Operation Control System, Functional Diagram · Figure A-17. HP 7925H Spindle Rotating System, Functional Diagram · Figure A-18. HP 7925H Head Positioning System, Functional Diagram · Figure A-19. HP 7925H Sector Sensing System, Functional Diagram · Figure A-20. HP 7925H Read/Write System, Functional Diagram · Figure A-2I. HP 7925H Fault Detection System, Functional Diagram A functional diagram of the integrated controller is provided in figure A-14. In addition, the following table has been revised for use with the HP 7925H and replaces table 4-4 in the main manual: · Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List A-87. WIRING CONNECTIONS The following information, revised for HP 7925H usage, replaces figure 4-23 and table 4-4, respectively, in the main manual: · Figure A-15. HP 7925H Mainframe Assembly, Wiring Diagram · Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List Note: Th.e HP l30l3D Multi-Unit Cable and the HP l32l3D Data Cable listed in the main manual are not used with the HP 7925H. A-88. POWER DISTRIBUTION The following table is revised for use with the HP 7925H and replaces table 4-5 in the main manual: · Table A-12. HP 7925H Power Distribution List A·39 Appendix A 7925 TEST RESULT 4 --=------0 o o o TEST NUMBER I ~ ~~~ S.T. FAILED 01-------=---5 OP ~ SERVICE I 2 START ~ 3 1. TEST NUMBER switches 2. OP/SERVICE switch 3. START switch 4. TEST RESULT LED's 5. S.T. FAILED LED Select desired self-test test number in octal when OP/SERVICE switch (2) is in SERVICE position. Selects self-test mode of operation. When OP position is selected, controller executes self-test routine at power turn-on, on HP-IB command, or when START switch (3) is activated. Switch must be in OP position for disc drive to operate normally. When SERVICE position is selected, controller will loop continuously in self test until a fault is detected. Initiates self-test operation. Switch is spring-loaded in off position. Provides a readout of self-test operation. At beginning of self-test routine, LED's will flash briefly, indicating controller activity and testing of LED's. If a test fails, the LED's indicate the number of the failed test in octal. If self test passes, the LED's remain unlit. Indicates a self-test (S.T.) failure. Result is duplicated by SELF TEST FAILED indicator on disc drive operator panel. 7300-99 A·40 Figure A-12. Self-Test Controls and Indicators 7925 Appendix A Table A-7. Self-Test Control Operation SWITCH SETTING OP/SERVICE switch: OP TEST NUMBER switches: Any setting START switch: Momentary operation SELF-TEST ACTION LED DISPLAY Tries to execute all tests once. If error in test 17, 16, or 15, controller hangs~ If error in tests 14 through 1, exits immediately to controller firmware. All LED's flash momentarily. If there is an error, TEST RESULT LED's display failed test number, S.T. FAILED LED is also lit. If there is no error, all LED's go off. OP/SERVICE switch: OP TEST NUMBER switches: Any setting START switch: Held in on position 2 Loops on entire self test until START switch is released. Exits test only when switch is released. Executes tests up to first error and then restarts self test. All LED's flash momentarily each pass through self test. Error is not displayed until START switch is released. OP/SERVICE switch: SERVICE 3 TEST NUMBER switches: n '> 2 START switch Momentary operation Loops on test n until first error is detected. Halts (JMP*) on error until START switch is set again (except for error in test 17, where controller hangs). TEST RESULT LED's flash test n each time that test is completed. On error in test n, LED's continuously display section number of failure. S.T. FAILED LED is also lit. OP/SERVICE switch: SERVICE 3 TEST NUMBER switches: 2 START switch: Momentary operation Generates PHI tuning procedure. Flashes 2 on TEST RESULT LED's. OP/SERVICE switch: SERVICE 3 TEST NUMBER switches: 1 START switch: Momentary operation Causes disc drive to do random seeks. Flashes 1 on TEST RESULT LED's. OP/SERVICE switch: SERVICE 3 TEST NUMBER switches: 0 START switch: Momentary operation Loops on entire self test until error is detected. Halts on error until START switch is set again (except for errors in test 17, where controller hangs). TEST RESULT LED's flash test number each time test is completed. On error in a test, LED's continuously display failed test number. S.T. FAILED LED is also lit. Notes: 1. An error in test 17, 16, or 15 will cause the controller to hang (i.e., not respond to HP-IB commands). The only way to reset the controller after a test 17 failure is to reset the disc drive, either by cycling the disc drive power switch or the RUN/STOP switch. In tests 16 and 15, activating the START switch also restarts self test. 2. In the service mode, with the START switch held in the on position, the controller will loop on the appropriate test (or entire self test) until the first error is detected, when it will start over again. The START switch inhibits error halts except in test 17. 3. Always return the OP/SERVICE switch to the OP position to use the disc drive. Otherwise, the controller will not respond to HP-IB commands. A-41 Appendix A TEST NO. 17 TEST Microprocessor alive 16 RALU, Flags 15 PHI 14 FIFO's 13 PHI/FIFO handshake 12 Formatter/ Separator Loopback Test Table A-S. Self-Test Function Test Description 7925 DESCRIPTION This is the first test executed. It tests the heart of the microprocessor - the sequencers and the branching logic. Some ALU faults are also trapped by test 17. If a fault is detected in test 17, the controller hangs up in a JMP* loop. The only way to exit this loop is to either cycle the POWER switch or the disc drive RUN/STOP switch. This action resets the microprocessor and causes it to start self test over. There are no distinct sections within this test. On error, the TEST RESULT LED's display an octal 17 both in the OP (operating) and SERVICE positions of the OP/SERVICE switch. This test checks the 2901 registers and arithmetic/logic units (RALU's), and the program status register flags. Like test 17, if a failure is detected in test 16, the controller hangs. Unlike test 17, the "hang" loop can be exited by activating the START switch. On error, the TEST RESULT LED's display an octal 16 continuously whether in the OP or SERVICE mode (unless the START switch is held in the on position). This test checks the PHI in its offline mode. The following items are tested: · PHI identity sequence · PHI interrupt flags · Inbound and outbound FIFO data test · Data tag bits (EOI and ATN) On error, test 15 outputs an octal 15 on the TEST RESULT LED's and hangs the controller, whether in the OP or SERVICE mode. The hang condition can be exited by activating the START switch. This test checks the 9403 FIFO's in the controller. The following possible faults are tested: · NTORE stuck at 0 or 1 faults · Data errors within each FIFO At this point, the microprocessor and PHI are assumed good and errors can be reliably reported via the HP-IB. This is the first test that a) reports section numbers, and b) exits to the controller operating firmware after an error is detected. Even if test 14 fails, the controller attempts to execute commands and secondaries. Any operation involving data transfer through the FIFO's will probably fail. This test checks the PHI/FIFO handshake logic, sector word counters, read full! write full flip-flop, and EOT detector. The test transfers data from the FIFO, through the PHI, and back to the FIFO. The PHI is in its offline loopback mode. This test checks the formatter/separator, serial operation of the FIFO's (both in and out), the overrun detector, and the EOW/8th word counter. The test is divided into three subtests: a. The formatter/separator itself is first tested by passing a known data pattern from the FIFO through the formatter/separator in its loopback mode and back into the FIFO. The received data pattern is then compared with the original. b. The overrun detector is then checked by clearing the FIFO and enabling the formatter/separator. An overrun will result when the formatter/separator tries to pull data from an empty FIFO. c. Finally, the 8th word counter is tested by passing 16 bytes through the formatter/ separator, counting EOW's, and seeing that the 8th word flag is set only after the 16th byte (8th word) is transferred. A-42 7925 Appendix A TEST NO. 11 10 Table A-B. Self-Test Function Test Description (Continued) TEST CRC/Data Path Switch Drive Status DESCRIPTION This test checks the CRC generator/checker (9401) and the data path switch (CRC multiplexer). It checks that the CRC chip generates the proper CRC pattern and properly detects CRC errors. A known pattern is loaded into the FIFO, sent through the CRC chip, and returned through the formatter/separator to the FIFO. The generated CRC pattern is then switched into the. data path and loaded into the FIFO, where it is checked against the expected results. The ANYER (CRC error) flag is also checked as data is shifted through the CRC chip. This test looks at the drive status register and reports an error if the disc drive is busy with drive ready set or if the drive is faulted. Self test will loop on Tests 17 through 10 until Drive Ready becomes active, flashing octal 10 every time test 10 is executed. If Drive Ready does not become true before 92 seconds have elapsed, the S.T. FAILED LED will light and the TEST RESULT LED's will display octal 1O. Note: If the disc drive is powered on and the RUN/STOP switch is not in the RUN position or the disc pack is not in place, the resulting absence of Drive Ready will cause the S.T. FAILED indicator to come on approximately 92 seconds after power on is initiated. If this occurs, proper preparation of the disc drive for operation (disc pack installed and RUN/STOP switch set to RUN) will allow the self-test routine to start again. 7 Head/Sector Logic This test checks much of the I/O sector logic of the controller. The head register is first tested for stuck-at faults. Disallowing drive types (set via the drive type jumpers) will also be reported as an error. The index counters, sector counters, sector comparators, sector registers, and sector compare flip-flop are also tested here. This section of the test is executed twice, once with head 1 addressed and once with head 2 addressed. This tests both sets of sector counters if the drive type is set to a 7906. 6 Recali brate Test This test issues a RECALIBRATE command to the drive, waits for drive attention (with a time limit of 1275 milliseconds), and checks the resulting drive status. If the recalibrate does not complete in time, a timeout error is reported. If an attention is received in time, the drive status is then checked; bad drive status is reported to the TEST RESULT LED's. 5 Seek Test This test exercises the seek function of the disc drive by issuing a seek to the maxi·· mum cylinder address. If the seek completes within 100 milliseconds, the controller issues a seek to the maximum cylinder address + 1, forcing a seek check. If a seek check does in fact occur, the controller then issues a seek to cylinder 0, again with a 100 millisecond timeout. No address verification is done in this test, but if the drive does not end up on cylinder 0, the verify test which follows will fail. 4 Set Offset Test The purpose of this test is to see if a set offset drive order to the disc drive will complete. The maximum positive offset (+63), maximum negative offset (-63), and zero offset are sent to the disc drive in that order. If attention is not received within 10 milliseconds, a timeout error is reported. This test does not verify that the heads are actually offset the proper direction and magnitude. 3 Verify Cylinder 0 This test attempts to verify cylinder 0 with no head offset. The purpose of this test is to check the read data path from the heads, through the preamp, and to the data separator. This test also verifies that the heads are on cylinder 0 by checking the address field in a sector. The entire cylinder is verified in cylinder mode with track sparing enabled. If a data error is found in any sector, one retry is attempted. If the retry also results in a data error, the test is aborted, and the failure is reported to the test panel LED's. No limit is placed on the number of retries allowed for the entire cylinder. Test 3 can fail due to several non-hardware related problems. Bad media, a track flagged defective but not properly spared, or a spare track in cylin- der 0 will cause a test 3 failure. However, the drive can still be used after a test 3 failure. A·43 Appendix A 7925 Table A-B. Self-Test Function Test Description (Continued) TEST NO. 2 1 TEST DESCRIPTION PHI Tuning Procedure This test is not a legitimate part of the self-test routine. It is provided for diagnostic and service purposes. When selected, self test loops through the program steps described in the PHI data sheet. The HSE waveform can be measured and the delay stabilization trimmer adjusted. Drive Random Seek Procedure This test is not a legitimate part of the self-test routine. It is provided for diagnostic and service purposes. When selected, self test will generate seek commands using a pseudo-random number generator. A-44 7925 Appendix A TEST NO. 17 16 15 14 13 12 11 10 Table A-9. Test Failure Summary SECTION NO. - - - 17 16 15 14 17 16 15 14 13 12 11 17 16 15 14 13 12 11 10 17 16 15 14 17 16 10 TEST RESULT LED'S TEST/SECTION FAILURE · · · · MICROPROCESSOR · · · 0 RALU, FLAGS · · · 0 PHI ····· ····· ··0 0 0 0 · 0 · 0 FIFO's NTORE stuck-at-O. NTORE stuck-at-1. Upper FIFO data error. Lower FIFO data error. ···· ···0 ··· 0 ·· ·0 ··0 0 PHI/FIFO HANDSHAKE EOT flag stuck. Write-to-PHI not complete. Sector word counter does not handshake. Read full/write full does not override EOS (read from PHI ··· 0 0 0 ·· 0 · ·0 handshake does not complete). EOT not detected. Lower NYBBLE data bad. Upper NYBBLE data bad. ···· ···0 ··· 0 ·0 ·0 00 · · 0 · · · 0 0 · · 0 0 ·· · 0 0 0 FORMATIER/SEPARATOR EOW stuck true. No EOW in data test. Bad data from formatter/ separator. Overrun stuck true. Undetected overrun. No EOW in 8th word test. 8th word flag stuck true. 8th word flag stuck false. ····· ····0 ··0 0 0 ·· ·0 0 CRC/DATA PATH SWITCH No EOW in test. CRC error stuck false. CRC error stuck true. Bad generated CRC pattern. ···· ··0 0 ··0 0 ·0 0 O· DRIVE STATUS Drive fault. Drive busy while ready. Drive not ready. PROBABLE SOURCE PCA-A2*, disc drive PCA-A2 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 PCA-A1 Data PCA-A1*, PCA-A2 PCA-A1 PCA-A1 PCA-A1 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1 PCA-A1*, PCA-A2 PCA-A1*, PCA-A2 PCA-A1 Drive electronics*, PCA-A2 Drive electronics Drive electronics, PCA-A2 Drive electronics o = LED "OFF" · = LED "ON" .to Display flashing * Most probable source A-45 Appendix A 7925 TEST NO. 7 6 5 4 Table A-g. Test Failure Summary (Continued) SECTION NO. 17 16 15 14 13 12 11 10 7 6 5 4 3 2 17 16 4 3 2 1 17 16 15 4 3 2 1 17 16 4 3 2 1 TEST RESULT LED'S TEST/SECTION FAILURE ····0 ····· ··· 0 0 ·· 0 · 0 ·0 ·· ·0 ·0 ·0 0 · ·0 0 0 0 0 ·· · 8 · 0 0 ·0 · · 0 00 0 0 ·· · 0 0 0 HEAD/SECTOR LOGIC Illegal drive type. Bad head register. Sector count too large (head 1) Sector count not incrementing (head 1). Sector count not properly cleared (head 1). Sector compare stuck-at-1 (head 1). Sector compare stuck-at-O (head 1). Sector compare set more than once per revolution (head 1). Sector count too large (head 2). Sector count not incrementing (head 2). Sector count not properly cleared head 2). Sector compare stuck-at-1 (head 2). Sector compare stuck-at-O (head 2). Sector compare set more than once per revolution (head 2). · 0 · ·· 0 0 ·· · 0 ·· 0 · 0 · 0 0 · 00 0 · · 0 0 0 0 ··· 0 0 0 0 ····· 0 0 0 0 ·· 0 0 ·· 0 ·· 0 · 0 · 0 · 0 · ·· ··· 0 ·· 0 0 0 00 · 0 0 · · 0 0 0 · · 0 0 0 RECALIBRATE Recalibrate timeout error. Attention stuck-at-1. Drive busy and attention set. Drive not ready. Seek check. Drive fault. SEEK Seek timeout error. Attention stuck-at-1. Undetected seek check. Drive busy and attention set. Drive not ready. Seek check. Drive fault. SET OFFSET Set offset timeout error. Attention stuck-at-1. Drive busy and attention set. Drive not ready. Seek check. Drive fault. PROBABLE SOURCE PCA-A2*, drive electronics PCA-A2 PCA-A2 PCA-A2 PCA-A2*, drive electronics PCA-A2*, drive electronics PCA-A2 PCA-A2 PCA-A2 PCA-A2 PCA-A2 PCA-A2*, drive electronics PCA-A2 PCA-A2 PCA-A2 Drive electronics*, PCA-A2 Drive electronics', PCA-A2 Drive electronics'. PCA-A2 Drive electronics'. PCA-A2 Drive electronics Drive electronics', PCA-A2 Drive electronics Drive electronics*, PCA-A2 Disc drive', PCA-A2 Drive electronics Drive electronics', PCA-A2 Drive Electronics Drive electronics Drive electronics', PCA-A2 Drive electronics Drive electronics', PCA-A2 Drive electronics*, PCA-A2 Drive electronics Drive electronics Drive electronics Drive electronics Drive electronics o = LED "OFF" A-46 · = LED "ON" * Most probable source 7925 Table A-g. Test Failure Summary (Continued) Appendix A TEST NO. 3 SECTION NO. 17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 TEST RESULT LED'S · 0 0 · · ········ 0 0 · 0 0 0 0 0 · ·· 0 0 0 0 · ·· 0 0 0 ·· 0 ··0 0 0 ·· 0 ··0 0 · ·0 0 · 0 · 0 · 0 · 0 · 0 · TEST/SECTION FAILURE VERIFY CYLINDER ZERO Drive status error. Address miscompare. Defective track error. Direct access to spare track. Head 10 data error. Head 9 data error. Head 8 data error. Head 7 data error. Head 6 data error. Head 5 data error. Head 4 data error. Head 3 data error. Head 2 data error. Head 1 data error. Head 0 data error. o = LED "OFF" · = LED "ON" PROBABLE SOURCE Drive electronics* disc cartridge, PCA-A1 Drive electronics Drive electronics Disc cartridge Disc cartridge Disc cartridge*, PCA-A6, PCA-A5 Same as section 13 Same as section 13 Same as section 13 Same as section 13 Same as section 13 Same as section 13 Same as section 13 Same as section 13 Same as section 13 PCA-A1", disc cartridge, PCA-A6, PCA-A5 * Most probable source Table A-IO. Visual Indication of Drive Status INDICATOR/ INDICATION Unit Select Identification Indicator LOGIC EQUATION ACTIVE STATE CIRCUIT DESCRIPTION FUNCTIONAL DIAGRAM SEL Indicator is off when anyone of the following conditions Operation Control is met: System, figure a. Self test is running. A-16. b. Controller is in Idle State 2 or Idle State 3. A-47 Appendix A 7925 NOTE: Referenced figures are in Section IV of main manual. 1. Set RUN/STOP switch to STOP. 2. Turn disc drive power on. Refer to blower troubleshooting flowchart, fig. 4-2. Check +5V power supply. Refer to paragraph 4-3. Refer to DRIVE FAULT indicator trouble· shooting flowchart, fig. 4·3 Reter to door unlocked solenoid troubleshooting flowchart, fig. 4·13. Refer to DOOR UNLOCKED indicator troubleshooting flowchart, fig. 4-14. Refer to Unit Select indicator troubleshooting flowchart, fig. 4·15. Refer to READ ONLY indicator troubleshooting flowchart, fig. 4·16. Refer to DRIVE READY indicator troubleshooting flowchart, fig. 4-17. Set RUN/STOP Switch to RUN Refer to DRIVE FAULT indicator troubleshooting flowchart, fig. 4-3. Refer to door unlocked solenoid troubleshooting flowchart, fig. 4-13. Refer to DOOR UNLOCKED indicator trouleshooting flowchart. fig. 4-14. Aefer to DRIVE READY indicator troubleshooting flowchart, fig. 4-17. Refer to self-test information contained in paragraphs A-77 through A-81. 7311-95 A-48 Figure A-13. HP 7925H Power-Up Troubleshooting Flowchart 7925 Appendix A 10 11 12 A2 MICROPROCESSOR PCA TEST CONNECTOR J2 1JUMPER ASSY. PIN 13365-60006 lr-__ __ ---f-- - __ __ - - - - 38 26 27 24 25 11 12 13 15 41 39 37 35 10 4 3 47 45 43 42 - 211 - 44 - 40 33 31 29 23 22 21 19 17 46 48 18 20 o ~~ ~~_!~ __/~_: ~--/~ --~~--/ ~-:~ --/~- ~ ~_:~ __~r-__ ~~_:~_:~ __/~_! ~-~ ~-~,-.:'~--~ ~-:~ _~r------ _~r-__ --~~ .I~_:~-~~ ~~- -~ '--~~--~~ ~~ /~ _! ~-~ '--" A1 DATA peA 39 / Jl STO"U'T I A13 SELF-TEST peA _------i::'E-'5O--T"IJ2~)49 )>----...( 49 +-J.,l .......--_ , > I-----L- 'Ei5-1 ---~/, 47 <47 +-.;------t "I A ~~ «en ~0 :;;; '"'" N ::2: M~ '~=t ~l!) t~o ~ '"'" c~o ~0) ~~ :;;; '"'" ~ ::2: E~ '"'" .::: ~~ ;~e iI' .~::: ~.::: ~~ N~ S ~~.::: IIwx- z«w 0a: 0a: 0a:: 0a: 0a: 0a:: 0a: 0a: a0: 0a: 0a: 0a: 0a:: 0a: 0a:: a0: 0a:: 0a:: 0a:: 0a: 0a:: 0a:: a0: 0a:: ~~ a::ro II-·r X2 U;UJ ..J u ~~ a:: IIx- z«en 0 «aa::: «aa:::: N M «aa:::: a:: «a: '=t l!) to «aa:::: «aa:::: a: «a: I' «aa::: co «aa::: 0) «aa:::: 0 «aa:::: «aa:: LULU :!42 / : ISTSW 40 SER SW 1.. <: 33 OPH' ~~~~PDIA} ~N~~'i 4, ROR8-11 / CLO-J 110M OUTPUT IIEGISTER I ~~i~~iS II...--2-4-/ J'-----+-"--S-CT-R-G--{-----------{----------~-BU-S-U-{-------~------11 HDREG ~(A~8~,;A~9T)I~G J_-T-G-B-U-S.. ~~~~P DIAG (A2) CBUSL ~~~~PDIAG (B5, C5) I L ~ MI~C~:II,O~C~fO~~DE ~I""'" -----.... OFIFO I...... ..;..OP_H_I P/OJ1) 35 -!-_+~ 33 r LI------+-""------{------"-------------------------..-----{---------i--+---.........::=========:=:T=':=:==============:=:; :: ~ 29 / : 1 31" I / 1 28" I /: 41 " 1 iNPHi STINP VRFLG PHICW SELF-TEST R~~J;~ETR 1--5/+-tI-+ ._ _L_E_D_2 -i-O+) 45) ( 45 ~----+-.......... I 1 L_E_D_3 -:-)~ 43 ) < 43 ~;-----J .-- S_T_F_A_IL > ~) 40 <40 +-....---- A ~1 I SELF-TEST INPUT REGISTER ...._4-1-,--+_~--....:__--IS-T-SW---~_+~29 )>- I_ _S_E_RS_W > r -.--'"/~ 38 r-_T_N_SW_O_·"----r-..+~ 30 ) -« 29 ~ ......... ( 38 +-+--_ _.......... ( 30 +-+- -+-__-1 (C13, C3), SCTR SENS DIAG (A7, B7), R/W DIAG (B4) BUS ---_ OUT EN "'------..... ~~~~;~G f--P-S-EC-T---- f--D-T-Y-PE----{~~~~~IAG (All (D3) f {~~~;~T~G P_HE_A_D..... (A9) rSTAT2 ~(C~l~~~)i;)IAG ------ST-OU-T --------~)39 1 12~ ,P, /O~J-l -ArD-B-IO---~ 14 ~<........._ _A_D_B_'1_~ 4/ ROR 3-6 / I INPUT I ADDEDCROEDSES II J IN EN IFi'FO INPHI STINP ~ I 27 r I '" I / 29 : ) 31 MICROCODE DECODE OE : ) 43 '--- LOGIC I -/-+ . . . . . - -. . .. .I - - - - - - - - - - - t - - - - + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ~ ~ - - - - - - - - - - - _ t _ - - + - - - - - - - - - - . . . . IE ;. ; ; ; . . . - - - .....I.- .. ,-4- 5 - 16 +<--'-_ _A_D_BI_2_ 1 1 ' - - - - - < : 18 +<--'-_ _A_D_B_'3_.......... t - - - - - < 20 ~<--'-__A_D_B_14_~1 · .-< 22 +<--'-_ _A_D_B_15_.......... ROR 0-7 / IMM I ALU IMMEDIATE BUFFER - - - . . ODUATTPAUT BUS { SEE OP CONT DIAG (B2), HD POS DIAG (Bl), SCTR SENS DIAG (A8), R/W D lAG (B3) 1'-_ _- < 24"~'\/--Io-_ _A_D_B_16 __ 18/ ROR 23 / 1'-_ _-< 26 ~<-+---A-D-B-17--..Jlo..-"""'l~I--Jo.--I---1--R-0-R-4-_2-1---------()_AT-A_IN_P_U_T_BU_S_ _~_~ ALU AND RAM I- DA_T_A_O,;".U,;..T_P_U_T_B_U_S '-- --t~-------- _t_-+----oooor------A-D;;..;B-O;.,.O-------i----+) 11 r- - A_D_B_O_l -------+--#) 13 / MSB l LSB lCARRY LZERO / OVERFLO 1'-_ _--< 36 ~<_;_--A-N-Y-ER-~ 1'-_ _--< 38+/,, O_V_RU_N_.......... 6 ROR 12-15,17 28 ~<_+-..:.V..;.;R:.;..F.::.LG.::--~---_+----------------------------------i~ 1 FLAG SELECT AND INVERT I C 1---- r 30 ~/ '"~ - -E-OT--:;~ - - . ...,. - - - --+-- - - - ---- - - - ----- - _ _ __1-+ tE XFTLEARGNAL 1 A_D_B_0_2 1 A_D_B_0_3 1 A_D_B_O_4 1 A_D_B_O_5 1- A_D_B_O_6 --+~) 15 --+~> 17 --+~) 19 ---r--4) 21 --;.~) 23 ,/ EOW r - - - - - < 34 ~,,-+-----I / NTORE " __ ........_ _~ 10 ~<--i- S_Y_N_C_l_......1 r - - - - < 32/~,, W_0_R_D_8_-'1 1"-_ _-< 42+/,-,-+-_ _I_ST_S_W_ _ 1 1"-_ _--<. 40 +<-....._ _S_E_R_S_ W _ 3/ ROR 18,22,23 / CLO LATCH '--- ..... BRANCH LOGIC PUSH/ POP l. SELOlsEL1/ FILE ENABLE ~~l 12, ROR 0-11 I I p-...._ - -.... INSTRUCTION / I '---.:.:I-~.:..:..:..:..:-----------------------------------------~~ SEQUENCER AND STACK 12, CLO --+i 1 - - - - + - , - - - - - -.....- - - - - - - - - - - - - - ' _ _ _ _ _A_D_B_O_7 -;-_)~ 25 D / CLOCK INHIBIT ~ r-:> ; 15MH, - 1.....- - - -..... Cl.OCK I I liENEIlATOR }-1 I I DI .P/2 ' " b~~~~ATOR -'--P--- -O---N--' -" -- - EXTiNH ----~~- - --- -~ ---I--I -~- - ---- CLEM - . . . --< ,. ~)YNC CLO CLl EXT CLR '-- ...1 . - -...- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -....- - - - - - - - - - - - - J~~----i WRITE CLOCK ) RST ..--:.~) 46 - - - - - - - - - - - - - 14 - 3 - - - - / : ADBOO 11 " : / 1 ADBOl <:. 13 " : 15 ADB02 ~ 17 ~ I. ,. 19 / : ADB03 ADB04 DATA OUTPUT BUS I PHRIEC~O?N:T~RROL I~ 21 : : ADB05 PROCESSOR 1~/ H~~B INTERFACE ,---. (PHil : r r_ _T_N_SW_l-----;r-->~ 32 ) <32 ~ -. r--_T_N_SW_2 _ _TN_S_W_3 +~) 34 ) > .....'_+/ 36 < 34 ~~_ _- . <36 _-+- _ - .... I ATN > ( 1-----------+--+) 22 )>-----« 22 ( r S_R_Q o!-~) 20 20 +-(--+- ATN S_R_Q Jf ( 11 10 .,...(( i "· 23 < : ADB06 HA~DgM~A~~KE I----. I I_F_C > T'"-+) 18 (18 ( · IFC : (9 I 25 ,/ ADB07 8 ": - :!46 / I RST 43 OE " 45 / : IE ~: 12 ADBIO 8 ": I 14 / ' ADBI1 ": / ADBI2 16 " 18 +-/--I-_A_D_BI_3_ _""1 "I / : ADBI4 FN~1~ 20" I GUS / I ADE315 22" : / I ADBIG I INTERNAL I RC~O~N~TR1OELR '-- ---.. * FIFO BIRDEI~R~E~C¢TeIORN ....--+-_-+- 8-+-/ _ ~ . . . PARALLEL - - - - - - - - -.... I/O !SERIAL OUT IN ~ I GEN~~~TOR ----.....J AND CHECKER r-- R_E_N r-+) 9 ) 1-- > N D A C ...&.._,+/ 16 I NR_F_D -+->~ 14) r-- D_A_V r-- E_O_I >~ 12 ) >~ 10 ) 1 D_I_O_l .......>~ 2 ) r- D_10_2 --;.-)-+ 4) 1--_ _....;D;;,,;I.;;;.0.;;.,3 --i-)~ 6 ) 1 D_I_O_4 ........~-+ 8 ) > DI05 l," I--------~.I~I 1 1-- D_1_0 _6 r )-+ ....:... 3 ) ( 9( < 16( < ( 14 REN NDAC NRFD ~ (17 :I ( 8 : <7 < 12 ( ( 10 ( DAV 1( 6 EOI i (5 ( 2 +-(_------0-10-1-----~(1 ( 4( 0102 (2 ( 6( <8( (1 ( <3 ( DI03 0104 DI05 DI06 (3 (4 ( 13 ( 14 TO/FROM HP-IB 24 " : 26 / I ADBI7 r-- D_I_0 _7 :-)+ 5 ) ( 5( 0107 (15 C : : INTCW 37 : ; 35" : /I 17 I OF/FO TFiFO : : NTOnE "I ~/ I EOT :: i ::::: I S~g~~R COUNTER J RD,RC D_10_8 :0-)+ 7 ) <7 ( 0108 (16 I OVERRUN DETECT J r I .I.....,.C_~_ON_RT_~_R,..- lw... FORMATTE~ SEPARATo"f S_T_F_A_I_L WRITE GATE READ GATE PT"21~:~ J 1 Ir 1 :\ 9 7 .1. ~i K \I -------CABLE ASSY PIN 13365-60008 MOTHERBOARD : ~! ~;;~:LOCK +0/__: _ _(_15_M_~_I/_) .... (! 10 SYNC 1 · / CLOCK INItIIlI r " Jj Jl 1 ~ f DDS >L .... -+-_+-~ __~-~..L---D-D-B---'-:_+,1 - EI~~;:~~~{T'AL SEE .- R/W DIAG (A5) -- NOTE: ABBREVIATIONS USED TO IDENTIFY SYSTEM FUNCTIONAL DIAGRAMS REPRESENT THE FOLLOWING FIGURES: OP CONT - OPERATION CONTROL SYSTEM, FIG. A-16. SCTR SENS - SECTOR SENSING SYSTEM, FIG. A-19. D R/W - READ/WRITE SYSTEM, FIG. A·20. HD POS - HEAD POSITIONING SYSTEM, FIG. A-18. REF 7906-2 10 11 12 Figure A-14. HP 7925H Integrated Controller, Functional Diagram A-49/A-50 7925 IPOWER A~;M~.:.;;;R PeA-AD rl~~~~--------------------~~~--I 1 A9P2 A9J2 T1 TBI 1.5A - 20V p - - - - I - - - - - { 93 r - - - - - _ f 9 9 I - - - - - - - - - - - - - - - - - - - - - i . . . - - - I -12V (REGULATED) SEE POWER PANEL ASSEMBLY WIRING DIAGRAM 928)----------------------t"-----' J1 ......- - - - - - - - - - - - - - - - . , . - - - + - + - - - ' - - - t - M 5 4 BLOWER MOTOR STARTING CAPACITOR > - - - . - - - + - - < 5 ' \ o--~f-----{97 }--_ _+.=..:20..;...V_ _f 6 6 1 - - - - - - - + - - - - 1 1-- ,..--...---f--+---<:n O - - - - f - - - - - { 92 >-_ _+_10.:....V_---I r - - T >----e---f-+----t---c:f"' ()o~--I----{96 1 1 --~+3-6- V --I -36V I 94~717 . - - - - - - - - f - + - - + - - < 90 >--_ _G_ND_2_-I 8 8 (NOTE 5) A9J5 LINEAR MOTOR GROUND LOGIC GROUND (NOTE 6) SPINDLE MOTOR GROUND } LINEAR MOTOR B3 · + 12V (REGULATED) +5VRS + 5V (REGULATED) - 24V (REGULATED) +36V -36V A9F1 lA TEMPERATURE SWITCH A9S1 OPENS@72.B±2.8C,C(16315°F) NOTES: 1. c=J C===J DENOTES OPERATOR PANEL NOMENCLATUIU. DENOTES POWER SUPPLY ASSEMBLY NOMENCLATURE. CD 2. ENClflCLIC NUMBERS INDICATE WIRING COLOR CODE AS FOLLOWS: COLOR BLACK BROWN RED ORANGE YELLOW GREEN BLUE VIOLET GRAY WHITE · A C 0 0 0 1 1 1 2 2 2 3 3 3 4 4 4 5 5 5 666 7 7 7 8 B B 9 9 9 7311-96C FUSE F1 for 120Vac operalion F1for240Vacoperalion F2 F3 F4 F5 F6 A9F1 A9F2 F7 F8 F9 DESCRIPTION 8A,250V,sIO-blo 4A,250V,slo-blo 8A,250V,slo-bla 8A,250V,slo-blo 8A,250V,slo-blo 1.5A,250V,fasl-blo 1.5A,250V,fasl-blo 1A,125V,fasl-bio 0.125A,125V,fast-blo '20A,125V,medium-blo 20A,125V,medium-blo 20A, 125V, medium-blo HP PART NO. 2110-0383 2110-0365 2110-0383 2110-0383 2110-0383 2110-0043 2110-0043 2110-0516 2110-0513 2110-0098 2110-0098 2110-0098 TERMINAL BLOCK TB1 IS SHOWN CONFIGURED FOR 120 VAC OPERATION GROUND BLOCK TB2 CONNECTIONS MUST BE MADE AS SHOWN. ONLY GROUND t LEAVES POWER AND MOTOR REGULATOR PCA-A9 PARENTHETICALLY NOTED CONNECTOR PIN IDENTIFICATIONS DENOTE SOURCE OR DESTINATION. CONNECTION BETWEEN A1J2 AND A13J1 IS VIA CABLE ASSEMBLY, PART NO. 13365-60008. THE NUMBERS ON CONNECTOR A9P1 MAY NOT MATCH THE NUMBERS ON A9J1. THE WIRING COLOR CODE (SEE NOTE 2) AND WIRE SOURCE INFORMATION SHOULD BE USED FOR PROPER CONNECTION TO A9J1. STRAPPING CONFIGURATIONS 100VAC 120VAC 220VAC 'THIS POINT IS NOT AT ZERO POTENTIAL WITH RESPECT TO THE CABINET. THIS POINT IS AT ZERO POTENTIAL WITH RESPECT TO WIRE 928 (TB1-1). 240VAC A9Po4 A9J4 22 SPINDLE MOTOR I I ·1· 1 5 5 SMPHI I:'~G~--==----i-a----+---, I LATCH L...-- ,----- I SOLENOID L:M:L~ _ I DOOR t----ia----+---{ 945 I UNLOCK L:SOLENOID ASSEMBLY ------- P/OJ2 P/OP1 -< 945}------' SEE NOTE9 P/O P/O A9J1 A'9Pl ICOO !--P.:....H..;...l+ r.--_ _'_CI_8-I 16 16 QD PH_1_+-115 15 PH1- PH1}------1S S PH2+ PH2+ 12 I - - - - - - - { 116 } - - - - - I 1 4 114 PH2- I } -_ _PH_2_--I17 1,1 VL+ 11 I - -V_L _-_ _--<..OI4>-_ _VL_----f: : 16 } - - - -C-IT- I 8 B I CL2 }-----I U U I ~S-PE-N----(_11.'11 } -_ _SP_EN---I R R 48 } - - - - -~ - 1 7 7 SCS+ SCS+ t - - - - - - { I~ 11 ) - - - - - ' - - - 1 H H SCS46 >-_ _SC_S----f F F I 361 +12V + 12V -12V 37 GND 5 I I 33 +5V I 6I GND GND 12 13 15 Appendix A 18 t - -1_CI_7 J J a---;.R=S ----( 92 }--<925>-- ~RBOARDPCA·A7 I ;~:~~~-~O MOTHERBOARD PCA·A7 SIGNAL DISTRIBUTION TABLE.) I I P/O P/O A7P1 A7J1 ... I_CI_7--1 · _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _.:..:..:RS=---t 3 3 L L .........,:S:-PU-=--- ----<.904}-- _ _ _ _- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - S P - U - t PIP 11 11 t--S_PD --<908)..- --+ S_PD--t E I E II r-- ~ M M 1TC- C - - - - - - - - - - - - - - - - - - - - - - I , , 9 3 4 } - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.... S I FORMATI SWITCH-54 S o I(PAC'K- -, DETECTOR P/O P/O AllJl AllPl , J IJ ENCB 13 13 I - - - - - - { 901 } - - - - - - - , N N J--E_NC_A_---< 10 10 J----=E:..:..:IL=2_ _-< 9 J--E_IL_'_---< I E IE --~E~-l A1OP1 A10JI PCA.A10 5D I D5 44 +5V · ENCB 3 3 ENCA I EIL2 I I 1 1 I RUN/STOP SWITCH·S2 . ~ ~ TOPIAllWJ IM8 I I P/O P/O AllPl AllJl +12V .-----------155 GND I ,------t 2 I 2 . . . - - -+-5V- 1 13 13 99 I I '8 '8 1 17 17 '5 1'5 I t' US2 US1 USG DL. PIP 902 } - f 916 >-+ g12 >-+ .......---.,,....,,,.--:::-:-::- ----'U=S..:....'t-e--4....902 ----'U..;;..SO~----{916 55 6 I6 8 1a ...:;;..D.L.._.P_1P--t H H NC DOOR CLOSED SWITCH·S7 10 10 11 11 9,9 717 93 } - - - - - - - - - + - - - - - - - - - - - - - - - - - t 7 7 947 }-- -+ RU.:....N---4 C C sroJS 957>---------+-----------------1 B B 913)---------+-------------D-RD-Y--.L R R P/O A1J2 ,.-",,"- 7 _ - - - - - f 49 49 a..-----I 4 45 v - - - - - I 43 43 40 """iSTSW 29 SERSW t_----t38 TNSWO 30 1 _ - - - - - 1 32 32 t_--TN-SW-2--t 34 34 TNSW3 t_----t36 22 SRO 20 __- - -IF- C t 18 18 99 NDAC 1_------t1616 __- - - - t 14 14 __- - - - t 12 12 EOI DI02 a - - -D-I0-3 t 6 6 DI04 0105 DI06 DI07 L-----I5 5 DI08 77 ~ ~ NOTE 8 PIO A1J2 -~ GND 1111GND 13 13......----.1 1515......----.1 GND 1717......----.. GND GNO 23 28,....---_.. 25,...-- _.. 2626...---_.. ~ ~ 66 01 >---------+-------:P::-::/O=--=-P/:::-o-----------I T T ~n : 3 3 DU 024)---------+------t DOOR LOCKED SWITCH·58 NC TIT PIO PIO Pll Jll cz (:l +5V +5V +5V 10 +5V +5V 12 ~f---( +5V 13 ~f----i +5V 14 r--f---< ~~ ~~ TO XA4P2-6 --~ I ------1 FAULTIND~C;T~ - - MHFL II P/OA12P1 P/OA12J1 RWFL 0-=--C1BF-L-=--=--=-------------11--------C-B-F-L1 6 I 6 ~::~ 'oJ 3 :::~ : II : 'oJ 1 ILFL AGFl ILFL 2 2 ~ AGFl · +5V + 5V +I5V +fiV _--....1 +fiV _---....1 ~~ +5V _---....1 +I5V _---....1 i L ~ I A7J2 A7P2 11 .5 1 5 TAC I I I I I I I /8 / VELOCITY TRANSDUCER -A13J2 ATN· SELF-TEST PCA-A13 SRO IFC 43 40 29 SERSW 38 TNSWO .........--~--.._f 30' 30 TNSWI 1 . _ - - - - - 4 3 2 32 TNSW2 34 TNSW3 36 22 . -_ _........;S_R0---f 20 20 · IF.C...-4 18 18 · R_E_N_f 9 9 · ND_A..;.,.C_f16 16 .------i1212 EOI 1 2 ~D.;.;;IO..;.l_f 2 EO·I DIOI 0102 0103 DI('"1 13 0105 0106 15 DI07 --16 DI08 P/O A13J1 ,......~ GND TO/FROM HP-IB DI03 0104 1'-----.-.;.~_f8 8 1'-----_f3 3 DI07 13 13 t -GN-D - - -....... 15 15 t - - - - -..... GND 1 7 1 7 . . . . - - - -....... 1919~~--.....J GND GND 23 I'-----_f 7 h ""'" 28 28....G-_ND_ __'1 n26 """ 12 13 15 19 Figure A-15. HP 7925H Mainframe Assembly, Wiring Diagram A-51JA-52 7925 '3 10 11 1? 13 14 r -- -- -- -- --SECEOI~J~g~tJ~D-- ---;C~C;R~ -- -- -- -- - - - - - - -,- - - - - - - - - - - - - - - - - - - - CP;--P~> CPS --------I.~} m~klON A I DIAGRAM (A4) I TG8US I CPS SOF I READ WRITE } SEE READ/WRITE (D4) AND SECTOR SENSING (C9) I FUNCTION REGISTER SK RCL ~ SYSTEM DIAGRAMS SK } ~~~I~~;~ING RCL SYSTEM I CLS CLA DIAGRAM (81) I CLA ISEE INTEGRATED CONTROLLER I } DIAGRAM (841 DATA OUTPUT BUS - - -.......'-------------------------+-------------------~-- r oiCATooo-Ai11 I I I I J I 10 I ~DECIMAL POINT I 1 I SEULNEICTT - - - < SEL 113 ..P_l DISPLAY SE_ L -------------+-----------<:lC FORMAT IFORMATI I I SOF P1 T )>- II DIAGRAM SOF } .. ~~~D POSITIONING (A4) SYSTEM DIAGRAM (Bl) SS4 WITC~H 0-------,. I OFF I FMT A > - +5·V ~ P2 B } SEL ----.. I1 I IPl 010 I---------..,....~15 ........ CONTROL BUS UPPER 09 DB 8YTE C 8USU SEE INTEGRATED CONTROLLER DIAGRAM (A4) ~~~D/WRITE SYSTEM DIAGRAM (C5) ,-------------13------, I ~ I I YF I SERVoP;;;::AT - - - - - - - - - - - - - - - - ) > - - - - - - - - .6 ICA - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.....-. - - - - - - - - - - - - - - - - - - - - - - - I - C - A - - - - - - - « ICA l { ; : e ILLEGAL I r:2-- --- -- ---- ---- -- -- ----- -- -- -- - -- I ~YDL~~~~~ ICA iCA @g I I IP2 "DRIVEOON'iiiOi: PCAoA41 I I DETECTOR 11 ) ( 11 f:-CYL I I SK SKH ACRY ACRY ATTENTION FF I 1 1 I I CAYDLDINREDSESR L-':~~ ....: __ -.J I II 6,7,9,10,11, = D i - H,J,K,L,M 10 '_'1 N U +5V S o SQ ACRY C ATTN 1 (811) ~~~~~TION + 5V 0 _I DRDY C RETRACT ATTENTION FF Q 1---------, R ACRY ATTN RET ATTN ~ ATTN 117 I E )>--------------« I ATTN 1 IE f------------------------. ATTN 1 I I 10 ~g·~~w f CYLINDER I I ADDRESS REGISTER I I SEE o ~ a tF-F------tl..-----+----------' C e _ - - - - - - - - - _ DRDY ~~~D POSITIONING ACRY } SYSTEM DIAGRAM (B3) ATTN 1 : (89) : 17 FAUSLET E} DETECTION NDPS ~ :: D) SYSTEM DIAGRAM: NDPS ( D ~ ~ PON SEE FAULT DETECTION SYSTEM DIAGRAM (C6) SEE FAULT DETECTION SYSTEM DIAGRAM (C14) II 1 HEAD POSITIONING SYSTEM 07 DIAGRAM (82) (8B) I FLT -------- CLA - - - - t - - - - - - - - - - + - - - - - - - - - - - - - - - - - - - - - - - L - . . + 5 ) CLA I I( 5 E--C-L-A - SEE FAULT 15 17 16 ~ fjl' UNIT SELECT C SWITCH-S3 ---< I P2 usa A USl ---< I 1 ---< I Pl US2 17 I I USO USl US2 +5V I I W360 I RPS "" DRIVE TYPE DRIVE TYPE REGISTER DATA INPUT BUS I------I~ { SEE INTEGRATED CONTROLLER DIAGRAM (B4) CONTROL 8US LOWER 8YTE C8USL SEE INTEGRATED CONTROLLER DIAGRAM (A4) D6 05 H 04 K D3 02 Dl DO M 10 IL 00-05 & 07 TO OFFSET MAGNITUDE &SIGN REGISTERS ~E.FA U~ ~g~~~w 10' DETECT. IOL.TN·.{ CYliNDER SYSTEM ADDRESS DIAGRAfur (85) REGISTER _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _S_K T u , ~SKH I SKH~ I~RHRET {~~tLT DETECTION L S~Y~SRT_EAM_M I Pl p) ACRY I ~I ) HI) RH I DETECTION ( J #--A-CR~Y---+---------...- - - - - - - - . I (I'7 E--R...H. --+--..-..04~ FORMAT FLT ICA ATTN1 STATUS REGISTER PRT-",",==-.......-t DRDY ~ , RCL --:- SK --« IN .......__SK --I --t I I SK ~ FIRST STATUS FIRST STATUS DATA STAT 2 INPUT SEE INTEGRATED 8US CONTROLLER DIAGRAM (85) I I - - - _ . - t SEE READ/WRITE SC DIAGRAM (C4) I SEE HEAD } POSITIONING SYSTEM DIAGRAM (83) o · - -....- + - - I C DRDY .R RST o I D TYPE SEE INTEGRATED L-- - - -- -- -- -- - - -- -- -- -- -- CONTROLLE~ DIAGRAM (84) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _· SEE INTEGRATED CONTROi..LER DIAGRAM (81) · ---J 7311-97B 10 11 12 13 14 Appendix A 15 16 A NOTES: 1. ALL D-TYPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF CLOCK SIGNAL. 2. REFER TO THE FOLLOWING FIGURES FOR DIAGRAMS OF REFERENCED SYSTEMS: INTEGRATED CONTROLLER A-14 MAINFRAME ASSEMBLY A-15 SPINDLE ROTATION SySTEM A-17 HEAD POSITIONING SYSTEM A-18 SECTOR SENSING SySTEM A-19 READ/WRITE SYSTEM FAULT DETECTION SYSTEM A-20 A-21 B 3. FOR HP 7920H AND 7925H USAGE, PROGRAMMING JUMPERS ON PCA-A2 (SEE BELOW) ARE POSITIONED AS FOl:.LOWS: W360 W361 - W362 W363 W312 W314 W316 W318 - INSTALLED FOR RPS ONLY NOT USED (A SPARE JUMPER CAN BE STORED HERE) IN 7920H, OUT 7925H NOT INSTALLED NOT INSTALLED OUT 7920H, IN 7925H INSTALLED INSTALLED MICROPROCESSOR PCA-A2 C o 15 16 Figure A-16. HP 7925H Operation Control System, Functional Diagram A-53/A-54 7925 Appendix A 3 4 9 10 11 12 13 14 15 16 17 - - -I Fp~~;R;L;;:;;;(;;;;:;;:;;-P~- - - - - - - - l - - - - - - - - - - - - - - ---36-;;- A DOOR LOCKED SWITCH-S6 l FCKDETECTciR I I I~ I I I L_-J I +5V 4~ PIP I: 2I I 1 I I I I STOP L..-... ...('). - - l L - - CARRIA~E BACK f DETECTOR I J3 11~+5V C L__J r~~~~--------------------------lIIII IIIIII i-~-- T T K r!m ~ ~R ,@0 -+-_~4~_-1--IBt-----T e~~LJ1--~'l-----+------l,'~III~) 1I~hei ~ IIIII +12V SEE FAULT { DETECTION SYSTEM DlAG RAM (B9) TOF ILF ~---I------I I I J1 DL. PIP 18 ~---_a_--< M ~P.;:::.2:.....-.....------.f__-------__1f__-------D-L-.-PI-P_I ~~~ I I :i I I I I I I ENCODER"O"~"l" T I I I DOOR CLOSED I I I I ( ---e ~ I ----~ I SWITCH-S7 i II I e~ r-....:. -.J NO)c NC I I I "I ~t>=b>~----~V~------------------------------+-~~-------Pl.H~_A-_S-_E--I-IN-H-I-B ~_E_D_" l'_ -1' I SEE HEAD DL. PI"f> POSITIONING (C3) & ~--------+--+-__f - - f - + - - - - - " FAU LT DETECTION (A 10) SEE FAULT DEDTIE~C~T~IO~N~ { RUN SYSTEM DIAGRAMS (D7) < I I ~l I CUR~~~~~~~~L;~~ I r 0 - I ~ 11 ( RUN 16 f - - - + - - - - - ( " l I S Q RUN <! t----..:S_TO~P_e-+-----__I I II ~~~EE.N...----.... t -<J- ,~f~====:=:=:===::f~i-~==========-+-3-6-v=s==========-~--+-~--~ i Ii~~H=~~ ~ ....L.{" 9 ~(S-TO-P----< U. - J II <I L-.-.+II710~}~~ii~~ION II L L__-~ ~--=~J ~M(.~=6~~~~)I-.J I ? 1 1 CRB P1 RQ SEE HEAD { POSITIONING (C3) & FAULT DETECTION (B10) SYSTEM DIAGRAMS STOP II } II I TL-.----4_ ---- -' I 11>-~--"""-"'-'--- _-_ - T 1 III II'~ IIII SEE FAULT PSF DETECTION > ) I SDYIASGTERMAM II I (D5) 2.25 MHz OSCILLATOR -;- 4168 COUNTER 122kHzI 22 kHz , TRIANGLE WAVE ~ GENERATOR NOTES: 1. ALL D-TYPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF THE CLOCK SIGNAL. 2. SPINDLE MOTOR GROUND (GROUNDS 3 AND 4). 3. REFER TO THE FOLLOWING FIGURES FOR DIAGRAMS OF REFERENCED SYSTEMS: INTEGRATED CONTROLLER. . MAINFRAME ASSEMBLY . . . OPERATION CONTROL SYSTEM. HEAD POSITIONING SYSTEM. SECTOR SENSING SYSTEM. . READIWRITE SYSTEM . . . FAULT DETECTION SYSTEM. A-14 A-15 A-16 A-18 A-19 A-20 A-21 r-r-- P1.....,~ P )>-_ _V_L1_M )~ 11 )-JT'"1 ..if'./.4/ ) CTI , 7 PHASE 1 CURRENT LIMIT - I }SEE FAULT II :, I I ,;...> . ----------------t-~/ I PH1+ M ) TCC. DETECTION SYSTEM DIAGRAM I 1 I L- ATCH SQ ~ ~'C~--~~~-~~~~~~-A-.~B A v V - ') /15 (A7) PH1+ 1: , I 7 18 - I ~ PH1+ +36VS SPINRDULNE FF PULSES (540 Hz @ 2700 RPM) PHASE I I PHASE Iscci ADMIFPFLEIFRIEENRTIAL . ___. COMP~ ARATOR SHIFT LEFT 0/11-------r..~....- .... BUFFER/FILTER ~ CURRENT COMMAND ~>-----.......- - - t + V~-------n-----------------------, D:,.HE~~~R 01--------. LIMITER a..--....,----- V~----I- SHIFT RIGHT 11-------, ~ - __ ~ REFERENCE CLOCK 540 Hz IENCpl UNITY GAIN INVERTING ~ DIFFEP~NTIAL C~ OMPARATOR - I - "~"~~~-----------~~~-~~~ A~ MPLIFIER a...-- + ~~------.(')_------------------____.'---4---_I--I~,IOII = POSITIVE MOTOR §!J +5V S )>-_ _P_H_1_-- - 4 ) 17 ')+-_-{Ir-_P_H_1-_ _-+-_ _----, -36VS R 0 t-- p2 r-t 1 )>-__R_S_--« J __ : _ _t--... '~~~~ ~ H ),>-_ _S_C_S_+---4) 44 I +5V Ispul / POSITIO~EI~~~~~ { _ . & FAULT DETECTION ~ SPU ~) 7C SPU (B10) I SYSTEM DIAGRAMS / IL "-I SPEED UP DETECTOR 1- o_ ISMCIe-i) A_SCS+ /' (B13) '-----lIIlt. " ' -'~(C13SC)S- CURRENT SAMPLE DIFFERENTIAL AMPLIFIER ...-- C SPS (C7) REVERSE DIRECTION DETECTOR IOFF III ORANGE +5V 't-:::Y\ " r '--V---" SEE FAULT DETECTION SYSTEM DIAGRAM (04) : SCS- I el SMCG I I Er 1,1 SEE FAULT PSF SPEED DOWN DETECTOR SPEED DOWN ,.-.I~TCH ......-- D H '(i PHASE A FF ,.....- Q L-.- D 1 - - - - + - - - - 4 BOTH MOTOR "1":.; PHASES INHIUITED PHASE 2 CURRENT LIMIT . 1 CL21 LATCH 1 IPH2+1 ~ A : L---+-_----lf--4-~ _-I~--<........>. -----e~----+---- ....I1..>~ 14 ) I PH2-1 DIAGRAM (C3) PH2+ ) 12 _I PH2+ I I I I _-------------a..~15 )>--_S_P_D_--« 11~/,,--L- I I SPS - - - - 1 - - - - 1 C (C10) Sll~ +- --' c ~--O "1" = CW ROTATION PHASE B "0" = CCW ROTATION ~ - -QLE..D......---+---~ ( ( " '.~ -I'::~ --<O>----t_a-----------+~'~/17) - I !, - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + 4 , / .U '------------------------------------------------44:) K ) PH2CL2 VLlM+ '> 15 '-L-..A... I : / /I - :1 I 1~ ~ I ) 10 I +- -. _ 36 VS _ ......._.-.1 -36VS -36 VOLT BLEEDER RESISTOR NOTE 2 RESISTOR SMAH1 SCS1 I NOTE 2 SCS2 SMAH2 +36VS --J\.f\A_ _ +36 VO LT BLEEDER RESISTOR tr--------, IV L - I ' 4 5-_--- 2 J4 SHUNT REGULATOR REGULATOR PROTECTION I CIRCUIT FNCO;;E';;.C:-A10 REGULATOR PROTECTION CI RCUIT A C ~~~ SOLENOID II I~~Jl DSOL..... I J1 , 22 )>-_P_SF I -« N STOP D IL __ JI> ---~-- 4 )~--~7 45 3 ~ 1 j +10V 7 L+1_0V II 4;) (~~~J [5 <; P2 II L CRB SPD III II I --.J T a_ II I ENCODER PULSE GENERATOR ~f-o i l-- e IENCBI ~~, I ) SPS ~· 1/ 7 iI II I7 48 I'\. :1/ L _ ~, PSF - -.......) - - - - _ a _ - - . ( ] I (D2) SHUNT REGULATOR I I +36VS NOTE: SHUNTS BETWEEN I nI : '--------------------------~)_-_oc 1ft------------------------------~/ ~, -------------------------~~~~ D 7311-98A 8 9 10 11 12 13 14 15 16 17 Figure A-17. HP 7925H Spindle Rotation System, Functional Diagram A-55/A-56 7925 Appendix A 10 PR~;;;;;P -~ --- -- -.-- --- --- ------ --------- --- --- --- ----.----- --- --- ------ --- --- --- ------ ------ ----. -1 A I '--I I ACTUATOR I ASSEMBLY L __ -.J I I I TRAC"i<"FoUOWE'ii'PCA-M - - - - --- - - - - - - - - - - --- ------. I WINDOW I DIFFERENTIAL PREAMPLIFIER STAGE GENERATOR I VARIABLE GAIN DIFFERENTIAL AMPLIFIER ~---r--- S~~ci~ - - - - - « 1,3 I I I LOW-PASS FILTER L AGC } SEE HEAD POSITIONING SYSTEM DIAGRAM (C18) SERVO HEAD SIGNAL FI LTER ---I I 78 COUNTER PHASE LOCKED LOOP 1-- ~--.... INDEX DETECrOR I I I I TP --p_2~I16 II >-- SCL ~ 61IItI-(-:-~2----S-CL-.----tlr----l~ ! Ii 3~ I TP I ~ .~II Ii 3 1 L_ _ _ _ _ _ _ _ _ ---.Jv)C,~P I1 TIMING GENERATOR TIMING GENERATOR DET:C~YZ!}J SYSTEM DIAGRAM I (B8) -< o I - NDPS C TEST POINT SECTOR 63 1I I" INDEX PATTERN I 0* 1 I PRE I I I I L REF TIMING DECODER TIMING DECODER W314 ,..-- U3 Bl DATA INPUT BUS SEE INTEGRATED CONTROLLER DIAGRAM --JA.... A3 B4 SCTRG DATA OUTPUT BUS . . ., B4 UPPER DISC SECTOR COUNTER PHYSICAL SECTOR REGISTER TARGET SECTOR REGISTER SECTOR COMPARATOR HE,\D REGI:;TER H3 H2 HO 111 '--------4 - } SEE READIWRITE SYSTEM D lAG RAM (B3) LOWER DISC SECTOR COUNTER SEE READIWFlI fE SYSTEM DIAGIIAM (C3) ~ '---------i-----Q BAILOUT SEE OPERATION CONTROL SYSTEM DIAGRAM (03) ~ SEE 01'1: IlI\TION CONTIl()!. SYSTEM DIMiHI\M (A3) II·(~ ._----+--t 0 SC C Q SC 'J---__"'-----------. URG SEE OPERATION { CONTROL SYSTEM DIAGRAM (A3) IlLAD WIlITE SECTOR COMPARE FF SEE OPERATION { CONTROL SYSTEM . WRITE DIAGRAM (A3) UWG I....... - - - - - - - - - - - - - - - - - - - - - - - - ' 0W3120 1 - - - - - - - - - - - - - - - - - - - - - - - ' NOT IN PLACE FOR 7925H -- P2 K ~ URG -----.. SEE READIWRITE SYSTEM DIAGRAM (05) 9 >-UWG--. I 1 .-J o *@ FOR AN HP 13356A DISC PACK 1 FOR AN HP 13357CE DISC PACK SECTOR SENSING SYSTEM TIMING DIAGRAM NOTES: 1. FOR LOCATION OF JUMPERS W312 AND W314, SEE FIGURE A-16, NOTE 3. 2. REFER TO THE FOLLOWING FIGURES FOR DIAGRAMS OF REFERENCED SYSTEMS: INTEGRATED CONTROLLER. . MAINFRAME ASSEMBLY . . . OPERATION CONTROL SYSTEM. SPINDLE ROTATION SYSTEM. HEAD POSITIONING SYSTEM. A-14 A-15 A-16 A-17 A-18 READIWRITE SYSTEM . . . FAULT DETECTION SYSTEM. A-20 A-21 7311-100 10 Figure A-19. HP 7925H Sector Sensing System, Functional Diagram A-59/A-60 7925 Appendix A 10 11 12 13 14 IDATA~-1--------1 IPffi~~~M---------------------------------------------------------------------------------------------------------------------------~~----------I A I I CIONNTETGRROA"LLiE'~R~ ~ DDB P2 )- DDB:» 4) D_D_B DDB: I } >------------7. , DIAGRAM (Dl0) 10 L II I PREAMPi:i"FiER 1-- -- -- -- -- -- -- -- --I I __________ ---.JI SCEOENOTRPEORLASTYISOTNEM DIAGRAM (A6) SEL '.. }~JP"'l----. .- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7 I , 1 '"-1~ -I-. . ..... R_E_A_D_D_A_T_A I ) 4 - r - - ~ I · - - - - --......- - - - - - - - - - - - - - - - - - - - - HEAD----,- - - --- - - - - - - - - - - - - - - - - - - - - - - - - - - - - " - - - - - - R/W -;C;:A-S- - - - - - - - - - - - - - - - - - - - - - - - - - - . t WDPB I ~..__... DRIVER I ~ SEL (C6) 1 A I I +12V I I WDPA I I URG (07) rMICROPR~~2------------------SEEINTEG=--------1 1 II SEL WRITE OATA I I I II mrr@~~ CONTROLLER DIAGRAM (Bl) I ~ I I N)~---_~~12~P-l~---~~----~~---------~~ I)I ---<1~-I ~--~~~----~------~--~-~ I CON6~~GL~~ II ~> ~ ~ HS2 ) < ~ »)----- '0· II . f-r--+------4~I-------- ~:8~TEM HS3 ~ I P2 N D P S - - - - < Dli --}~~~LT DETECTION NDPS DIAGRAM WFLT+ILFL}~;~~~:~~~:~a: (Cll) 1 P2 T I o~ I I, I I ~ ~>~----~---~(2~1 I ~~ 1 _ - I lI >~----~~---~(fI ~I D~R 2~ DATA ~ ~~ 9 )>----- BHS2 -----« 3 3 ~l 1 1 1 1 1 1 4 I\~ b.L- '~- ~ ~".". 2L _ _ -1 3~ ~~~ I r G:.CJ -, I L _ _ ...JSERVO ~41 r - - - , 5ern] ~~ .., ~: Ir 6~\1=~~~r-:,~r~ \J ~ ~ G PREAMPLIFIER ylA -> (11.1 Lr':. ,:;I G L~;~$ T ,... ~ I! -W~- c:~: ~ ~ ~ ::: ::: : ~ : . :~ ::: :: ::: ~ ; :~ : : I, DIFFERENTIATOR II ~V 1-111~ ~~1STAG3E )--ROA--< F )--RDB--<!I ~ DECREASE I :11 Ii) H ) I:1 ! OGC <i II LOW-PASS FILTER eJ looc! ZERO CROSSING DETECTOR ~ ~rr ::: :1 I ::: :::: II I CIRCUIT (D71 l:/=V=T~A~- - - - - - - - - - - - - - - - --_. - R~~'-1-1 PHEAD _ I I ~~~~ I I II SE~O~~I~~~~J~D I c I L (()) I I J11 L- +12V~. B,\RO'? -- ---- ~ I I READ ONLY ~ -< ROl IB4) +(-I- ) P1 18 - ---------------------------------------------..,) J READ ONLY SWITCH-S5 I SEE D~S~EC!T~O~R~ { _I\I\_I_LO_U_T --."' I1 I I II ~ --< I R02 J RE~~~~ER r-:~~~_-_-_-_~~ SEL (A141 SEE FAULT DETECTION ~ SYSTEM DIAGRAM rC9) II I IIB )>----- WR I1 i <01 (II I '" I I 4 5V J +6 PR _00 ~::JWWDDAB WR '5V CKLK ~ ~ ... WRITE DATA PHASE A WRITE DATA PHASE B ~ ~ I WRITE ~~RRENT DETECTOR - M~~~~iE I I r >-- :-'\.I "7 ACW - - . I ,:1 >-- 1,- MHS _ c o (D7) I I C~~~~~~ { OPERATTg~ WII IT I..: ..1.1_1..:_1\1_>_ _-+-_-1 DIAG~:~ II IL I I1) P 2 9 . I I KI ) ~I SEE { OPCE~R~A~T~IO~N~ DIAG~~~ I II ~ SEL B (I II :1 R02 ~ W(BF7L)T SEL G t . UW - --< I UWG 9 <I1 J ! URG----< K (' LI -~ WRITE Hi~~ { POSIT~~~+~~ ACRY .. ~~~r)E DIAGRAM (84) (~~~) } T )>-----WENT.-----« Rf/- , , - i - - - - - - - - - - - . J1 L...- -+- I I I WENT I II S.E.u-E~ -{-I-J-' (--I-~--,1~ > - - - II ?:e--.? e? 9--e SSFE~ESUTL:MD~~EGC~~~N I IC8 J Dl~12>--DWC---< L~ ) H )""-------- WEN ------« E L-1 /~ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.......-------. I r- . I '" (9.6 mAl II L- -- --- -- -- -- -- --- --- IDWAI I OWB (4.4mAJ SERVO"PcA. I I DWC (2.3 mAl r )---DWA ___<IA 1 HEAD . POSDIIT~IOYN~~IN~G~ IHi ._~ ~1 1 1I~ I _ _ _ < OWB B ~ PROGRAMMABLE WRITE CURRENT I: SINK SWITCHABLE - WRITE CURRENT SOURCE ~- (812)----~ 1 -+-_ _,..- SELECTED DETECTOR DC - WRITE CURRENT DETECTOR I/ SEE : FAULT DETECTION SYSTEM DIAGRAM iC8) : ::~ I >-- 7 5 I DCW - - . ~I NOTES: 1. ALL D-TVPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF THE CLOCK SIGNAL. 2. REFER TO THE FOLLOWI~G FIGURES FOR DIAGRAMS OF REFERENCED SYSTEMS: o INTEGRATED CONTROLLER. . MAINFRAME ASSEMBLY . . . OPERATION CONTROL SYSTEM. A-14 A-15 A-16 SPINDLE ROTATION SYSTEM. A-17 HEAD POSITIONING SYSTEM. A-18 SECTOR SENSING SYSTEM. . A·19 FAULT DETECTION SYSTEM. A-21 7311-101A 10 11 12 13 Figure A-20. HP 7925H Read/Write System, Functional Diagram A-61/A-62 7925 Appendix A 2 3 4 5 6 a 9 10 11 12 13 14 I==~~-----------------------------I - - - - - - - - - - - - - - - - - I SEESPINDLE{ r-·---......- -- -- -- ---- -- -- ---- -- -- ---- -- ---- ------ -------- - ---- -- -------------- - - < SYSTEMR~~~~~~ TCC V ~P_1 ~---------------------------------_, A I II I I I P1 B - - l HEAD r ALIGNMENT I, p R JI PCA·A1 I I I L 13 - - P I SEE OPERATION CONTROL SYSTEM DIAGRAM (A3) · SK P? ) : (A6) . !CPS: ) (C12) · RH I) _(~C~6)_ _·· P""T~~) N SK (A14) >-..-----------------------------------------< I 12 tP-2 ( - r ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - _ I CPS LI ·I I R I FLT I H RH TIMEOUT INITIATE 7 -- -- - -- - - r;v~.;;- ~=o;;;:;:;;N;;1 P2 N I SK I SYSTEM DIAGRAM (OS) ~ I SKH AGC II ILLEGAL CYLINDER ADDRESS DETECTOR ICA ICA I I S SEE HEAD POSITIONING SYSTEM DIAGRAM (B3) AGC FAULT FF S NDPS ~_e_--+------IR Q ~--tI.....- A_G_F~ CBF SERE OSTPAITNI ODNL E { I LF (83) & HEAQ ILF DWF POSITIONING (C3, C4) TO F ~-+--+---+-.......T._O_F-4I SYSTEM RET ~ CARRIAGE BACK DIAGRAMS CYCLEFF 120ms SK S Q TIMEOUT CYCLE INITIATE 1667 ms R 6 TIMEOUT CYCLE ACRY DPS I CYLINDER ADDRESS DO D9 L- 1.7,8,9,10,11, F,H,K,L,M )>- ---J/~1_0 Pl _n ~ -- 6,7,9,10,", H,J,K . L,M -n-F=l F- 15 - S- - __ 11 1I SEE HEAD { POSITION ING DIAGRAM (C5) ---l DRDY I Pl I CR B - - < S ~------------Ir--- ---I~~---I-_~ FAULT FF Q .......- - - I f - - - - - - - - -...... SEE OPERATION CONTROL (B11), SECTOR SENSING (C5) CRB (B12) R & READ/WRITE (B6) SYSTEM DIAGRAMS ~ DPS SEE SPINDLE DL. PIP (B4) ROTATION SPU SYSTEM (C5) DIAGRAM STOP ...... (C4) RET '--V--' SEE OPERATION CONTROL SYSTEM DIAGRAM (C9) ACRY (C9) RET. CRB ACRY TCC (135 Hz) TIMEOUT CLOCK COUNTER RESET COUNT 16 120ms COUNT 224 1667 ms CANCEL TIMEOUT A B SEE :I OPERATION CONTROL SYSTEM _(;";;,,B...:.7)_ _.....f.-_..;..;;IC..;..;A_--..:~) 6 o NDPS TOFL DIAGRAM I IC01/ICI2 (B7) CLY Pf) 11 >-- C_Y_L -t-_ _-t- ----J ILFL c o rT~:l C - ; - , r;;;~ I FOLLOWER I I I I PCA·A5 PREAMPLIFIERII PCA·A6 CHAMBER ASSEMBLY ILPA, ,pf-~-1, ,JAJ IL _ _ RP~ ':G=3~ --.J 17- U..J L.15- l __ , - - - - - - - - - - - - - ----1-- ICOI/ICII '( S ..J ~7-8 IC_O_ts_! IIIIPOWE;;;D;O~~O~''';- ~IIII T III>-- IDRlvE'CONTROLPCA-A4 -- -- -- -- ~..._l II4(< )I 4IIIII )JlI~®I I ~@ \:I!IIII-JI l<l<lIIIII IIrIIN-D'-~·R~~JIII +36V 12.1K IIIIL ~III IL JIIII>>---- IIL VT - - - - - - - - - - ------------------L.<J IIIL I ~®®/tI~ ®a~illll :ii<~<!II -36V 4.64K 42 - J1 +12V TEMPERATURE SWITCH - A9S1 OPENS AT 72,8± 2.8:>C (163 ± 5;) F) CLOSES AT 64.4 ± 3.4"C (148 ± 6°F) J1 SEE HEAD POSITIONING SYSTEM ISPIN~~~--------------l : 1) P O N - - -.........f - - -_ _..l... I NDPS D >-------------------If----+-------------' AeRY I P1) J ACRY IC02/ICI3 IC03/ICI4 SEE READ/WRITE SYSTEM DIAGRAM 16 - - - - - - - --:.9-K- - P1 P1 _ _ }SEE HEAD P .........----------lr---+------It---e--AC RY POSITION ING URG I P2 (D7) - - < K I ACW--< P1 (C12) K SYSTEM DIAGRAM (B3) ACRY (B12) I DCW - - < J (D12) I MHS - - < L ----- - --- ----- AGFL ~---------------+---------------+--+---------------------------------.;--- J2 WFLT 1-6-2-3 W. AR W. AR FAULT FF SEE READ/WRITE SYSTEM DIAGRAM (B7) ~ ~L~I~R~A;;- - - - W · AR III IAGC EIL2 P1 1K 10 ICL11 CURRENT LIMIT LATCH 1 I P2 +10 VDC--< 6 31.6K 26.1K NDPS 1--.---"W...;..;,R..;";,,F-=L ----II--+---+------J.2,....,( WRFL ) +5V +5V AGFL ~ 1.94K 1K SEE SPINDLE ROTATION SYSTEM DIAGRAM +5V (C14) a CL1 (A141 SEE MAINFRAME ASSEMBLY 45 I P1 +5V ~ ~ +5V ,I : J+ .0111F +12V 5.11K WIRING +12V --<3,C~+12V DIAGRAM I: -12V--<2,B~-12V +12V +12V 13.3K +5 VDC ILF SEE READ/WRITE {WRITE ,.--------+---+-+--+1---+--...... SYSTE M DlAG RAM (C7) WRITE URG R .W L--.---+---N-D-P-S--IR Q..........__R_W_F_L -+ ---If--_-+_-t-< RWFL 7) (~ '(;\'1 +5V +5V ~ 6 ~-CB- FL --...... +5V W. AC EIL1 9 ....,~-........r-...... ...__I_C_O_8/_IC_I_1- - - e . T +5V 10K II 9 . ( - - -I-C0-9/-IC-la - e : ( 16 .... 1K --"V\J"r-------J.......... '--\.r SEE SPINDLE ROTATION SYSTEM DIAGRAM (B13) CURRENT LIMIT LATCH 2 Q · ICL21 R.--------~- SEE SPINDLE ROTATION SYSTEM DIAGRAM +5V +12V 6.81K u CL2 (D141 5.62K SEE SPINDLE { ROTATION SYSTEM DIAGRAM (B4) RUN ~I--- __t---__ SEE SPINDLE { ROTATION (D3) 7 SPS & HEAD PSF ~ N f - - I o - -.....- - - - - - - - - - - - - _ . . . . . - - -....-t (D141 POSITIONING ONE SHOT WRITE AC FAULT FF S DPS R Q ............- - - - - - - + - - - - - - - - + - - - - : - - < ( MH FAULT FF S DWF W · AC WAFL ) 5) +5V +5V [!g II i 2 ~-I-LF-L---------I (C5) SYSTEM DIAGRAMS 6.811 F +5 VDC ""--- - J - _ _ _ . . . . - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - D - P - S__---t R ~- QI--...... 8 ( MHFL ) 8) +5V +5V 3 ~-T-OF-L-------- FLT P2 FLT (STATUS BIT 4) SEE OPERATION CONTROL SYSTEM DIAGRAM (B13) s ....., J1 I +12V NOTES: 1. ALL D-TYPE FLIP-FLOPS ARE CLOCKED ON THE RISING EDGE OF THE CLOCK SIGNAL. 2. REFER TO THE FOLLOWING FIGURES FOR DIA- GRAMS OF REFERENCED SYSTEMS: INTEGRATED CONTROLLER. . MAINFRAME ASSEMBLY . . . OPERATION CONTROL SYSTEM. SPINDLE ROTATION SYSTEM. HEAD POSITIONING SYSTEM. SECTOR SENSING SYSTEM. I;lEAD/WRITE SYSTEM A·14 A·15 A·16 A-17 A-18 A-19 A-20 C D 2 4 6 a 9 10 11 12 13 14 7311-102A Figure A-21. HP 7925H Fault Detection System, Functional Diagram A-63/A-64 7925 SIGNAL MNEMONIC ACRY DEFINITION "N ot" Access Ready A1* DATA PCA XA1P1 XA1P2 A2* MICROPROCESSOR PCA XA2P1 XA2P2 A3 SERVO PCA XA3P1 XA3P2 N J ACW AC Write (Current Sense) AGC Automatic Gain Control 16 IINot" AGC Fault IINot" AGe Fault LED ATT Attention E BHSO Buffered Head Select Bit 0 BHS1 Buffered Head Select Bit 1 BHS2 Buffered Head Select Bit 2 BHS3 Buffered Head Select Bit 3 Spare CBFC "Not" Carriage Back Fault LED CBS Carriage Back Supply Appendix A Table A-II. HP 7925H Motherboard peA-A? Signal Distribution List A4 DRIVE CONTROL PCA XA4P2 J1 J2 AS TRACK FOLLOWER PCA XA5Pl XA5P2 A6 R/W PREAMPLI FIER PCA XA6Pl A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS Exits A4P1-N to DSU. To Fault Indicator PCA pin A12J1-6. To Carriage Back Detector. DENOTES SIGNAL SOURCE · WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-65 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) SIGNAL MNEMONIC DEFINITION CC Currant Command A1* DATA PCA XA1P1 XA1P2 A2* MICROPROCESSOR peA XA2P1 XA2P2 A3 SERVO PCA XA3P1 "Not" CE Pack Installed v A4 DRIVE CONTROL PCA XA4P1 XA4P2 J1 J2 AS TRACK FOLLOWER PCA XA5P1 XA5P2 A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS 4 To Power and Motor Regulator PCA pin A9J1-14. "Not" Clear Attention II N at" Clear Offset 5 U CRB CYL "Not" Controller Preset Carriage Back Set Cylinder R S 11 11 From Carriage Back Detector. 13 Also, to Power and Motor Regulator PCA pin A9J1-28. 00 Internal Control Bus Bit 0 11 11 01 I nternal Control Bus Bit 1 L L 02 I ntarnal Control Bus Bit 2 M M 03 Intarnal Control Bus Bit 3 to 10 04 I ntarnal Control Bus Bit 4 9 9 05 Intarnal Control Bus Bit 5 7 06 Internal Control Bus Bit 6 K DENOTES SIGNAL SOURCE 7 K* * Not Usad * WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-66 7925 7925 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) SIGNAL MNEMONIC DEFINITION A1* DATA PCA XA1P1 07 I nternal Control Bus Bit 7 A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL PCA XA2P2 XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 J AS TRACK FOLLOWER PCA XA5P1 XA5P2 J A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD PCA J1 J2 J1 COMMENTS 08 Internal Control Bus Bit 8 H H* * Not Used 09 I nternal Control Bus Bit 9 010 Internal Control Bus Bit 10 DCW DC Wr i te (Current Sense) F 6 15* J * Not Used 5 DDS Differential Data Bus L L l515'B "Not" Differential Data Bus 10 DGC Data AGC DLePIP Door Locked and Pack in Place BPS IINot" Destructive Preset 10 M M P H N* o From Indicator PCA pin A11J1-18. * Not Used DRDY Drive Ready DRDYL "Not" Drive Ready Lamp i5WA IINot" Decrease Write Current A (13 mA) 5WB "Not" Decrease Write Current 8 (6.5 mA) DENOTES SIGNAL SOURCE 4 18 18 13 To DRIVE READY lamp via Indicator PCA pin A11J1-7. A 8 · WHEN DSU IS INSTALLED, SLOTS Al AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-67 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) 7925 SIGNAL MNEMONIC DEFINITION A1* DATA PCA A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL peA XA1P1 XA1P2 XA2P1 XA2P2 XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 "Not" Decrease Write Current · C (3.25 mA) ~-----+----+-----+-----+-----+" ECS Energize Carriage Solenoid .......---~ FLT Drive Fault F "Not" Drive Fault Lamp FMT HSO HS1 HS2 Format Pack Head Select Bit 0 Head Select Bit 1 Head Select Bit 2 13 . . . , . .: 12 13 R AS TRACK FOLLOWER PCA XA5P1 XA5P2 A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD peA J1 J2 J3 COMMENTS To Power and Motor F Regulator ·peA pin A9J1-50. To DRIVE FAULT T lamp via indlcator peA pin A 11 J 1-6. From FORMAT J switch -S4. HS3 Head Select Bit 3 . 3 . . . . . ....__I_C_A_ _...._ _II_le_g_a_I_C_y_l_in_d_e_r_A_d_d_re_s_s_.... -+ . ·.... . .....-6--+-----+""""_ ----01-----+-----+----+-----+----+----+-------~~---+-----1----+_-----------1 ICI5 Interlock Chain In AS Interlock chain source 17 from -24V supply. .....----t_---+-----t'----t----...,.~. - -..... IC05/ICI6 Interlock Chain Out A5/ln A6 a--------1------------~----t_----_I_---_+----+_--- ' 15 . ----+---.-.------~.I----+---~----+----------- ... IC06 Interlock Chain Out A6 .. :: ss To pack chamber interlock pin J2-7. I. . ICll Interlock Chain I n A 1 13 . .;. . I·,A'. . .. From Spindle Logic peA pin A8P1-T. DENOTES SIGNAL SOURCE · WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-68 7925 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) SIGNAL MNEMONIC DEFINITION Al* DATA PCA XA1Pl IC01/1CI2 Interlock Chain Out Allin A2 A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL PCA XA2P2 XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 B AS TRACK FOLLOWER PCA XA5P1 XA5P2 A6 R/W PREAMPLIFIER PCA XA6Pl A7 MOTHERBOARD PCA J1 J2 J3 COMMENTS IC02/1CI3 Interlock Chain Out A2/1n A3 15 IC03/1CI4 Interlock Chain Out A3/ln A4 16 i"CFL IINot" Interlock Fault LE D IP "Not" Index Pulse B 3 C"5 IINot" Lock Door(Pack Access) LSB MR'FI.. Least Significant Bit (of Cylinder Address) IINot" Multiple Head Fault LED MHS IINot" Multiple Head Sense 16 16 L N'5PS "Not" Non-Destructive Preset D D To interlock Iqgic on Drive Control PCA-A4. To Fault Indicator PCA pin A12Jl-2. To Power and Motor Regulator PCA pin A9J1-47. To Fault Indicator PCA pin A12Jl-8. POS Position PSF "Not" Power Supply Failed RDA Read Data A V N F 14 13 To Power and Motor Regulator PCA pin A9J1-22. ROB Read Data B 6 14 DENOTES SIGNAL SOURCE · WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-69 Appendix A SIGNAL MNEMONIC DEFINITION A1* DATA PCA A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL peA XA1P1 XA1P2 XA2P1 XA2P2 XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 AS TRACK FOLLOWER PCA XA5P1 XA5P2 A6 R/W PREAMPLIFIER peA XA6P1 A7 MOTHERBOARD peA J1 J2 J3 RET Ri=r Retract Heads "Not" Restore Home R01 Read Only 1 R02 Read Only 2 AS "Not" Run Spindle RUN "Not" Run R"WF't "Not" Read with Write Fault LED SB "Not" Servo Balanced SCL Sector Clock SEL - - SELL Drive Selected "Not" Drive Selected LE D SEN "N at" Servo Enable SK Seek II 18 ~~JI. 6 I I-·/f..· iii ii/ / )/ ·if 8 i/< // <··········>ii/ \ Wi rt~;I- 13 H >fif gjllill J ~11~ltl)11 16 17 t 7 Will 8 N 12 III ·//.. </> --3 7 K COMMENTS From READ ONLY switch - S5. To Spindle Logic PCA pin A8P1-J. From Indicator PCA pin A11J1-11. To Fault Indicator PCA pin A12J1-7. To Indicator PCA pin Al1Jl-10. To Power and Motor Regulator PCA pin A9J 1-20. Si<R" "Not" Seek Home U DENOTES SIGNAL SOURCE · WHEN DSU IS INSTALLED, SL.OTS Al AND A2 CONTAIN HEAD ALIGNMENT peA AND I/O SECTOR PCA, RESPECTIVELY. A-70 7925 7925 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) SIGNAL MNEMONIC DEFINITION "N ot" Seek Inh ibit Al* DATA PCA A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL PCA XA1Pl XA1P2 XA2P2 XA3Pl XA3P2 XA4Pl XA4P2 Jl J2 2 2 AS TRACK FOLLOWER PCA XA5Pl XA5P2 A6 R/W PREAMPLIFIER PCA XA6Pl A7 MOTHERBOARD PCA Jl J2 J3 COMMENTS SOF Set Offset SPi5" SP1T liN ot" Speed Down "Not" Speed Up STF "Not" Self Test Failed STOP "Not" Stop TEe "Not" Timeout Count Clock TAC Tachometer TAC "Not" Tachometer fC5F[ "Not" Timeout Fault LED URG Unselected Read Gate usa Unit Select Bit 0 US1 US2 Unit Select Bit 1 Unit Select Bit 2 DENOTES SIGNAL SOURCE K K A 17 N 15 C B C T 3 E P 15 B S 5 From Spindle Logic PCA pin A8P1-11. From Spindle Logic PCA pin A8Pl-L. From Indicator PCA pin A 11Jl-9. From Spindle Logic PCA pin A8Pl-M. From Velocity Transducer. From Velocity Transducer. To Fault Indicator PCA pin A12Jl-3. From UN IT 5E LECT switch - 53. Also, to Unit Select Display 5 via Indicator PCA pin A 11 J 1- 15. From UNIT SELECT switch - 53. Also,to Unit Select Display 6 via Indicator PCA pin A 11 J1- 17. From UNIT SELECT switch- 8 S3. Also, to Unit Select Display via Indicator PCA,pin A11J1- 16. · WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O 5ECTOR PCA, RESPECTIVELY. A-71 Appendix A Table A-II. HP 7925H Motherboard PCA-A7 Signal Distribution List (Continued) SIGNAL MNEMONIC UWG DEFINITION U nselected W rite Gate A1* DATA peA A2* MICROPROCESSOR PCA A3 SERVO PCA A4 DRIVE CONTROL PCA XA1P1 XA1P2 XA2P1 XA2P2 XA3P1 XA3P2 XA4P1 XA4P2 J1 J2 9 9 WAF[ WD "Not" Write with No AC Fault LED Write Data GDT Ground Data II ./i' AS TRACK FOLLOWER PCA XA5Pl XA5P2 A6 R/W PREAMPLIFIER PCA XA6P1 A7 MOTHERBOARD peA J1 J2 J3 COMMENTS To Fault I ndicator peA pin A12J1-5. D 4 WEN Write Enable H WENT Write Enable Toggle WFfF[ "Not" Write with Access Not Ready Fault LED +5VRS +5V Remote Sense 1/ II E R 18 To Fault Indicator PCA pin A 12J1-4. To Power and Motor RegulatorPCA pinA9J1-26. Source from +5V supply. 7925 DENOTES SIGNAL SOURCE A-72 · WHEN DSU IS INSTALLED, SLOTS A1 AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. 7925 Appendix A Table A-12. HP 7925H Power Distribution List CONNECTIONS VIA MOTHERBOARD PCA-A7 SUPPLY VOLTAGE DATAPCA A1* XA1P1 XA1P2 MICROPROCESSOR PCA A2* XA2P1 XA2P2 SERVOPCA A3 XA3P1 XA3P2 +5V 4,5, D,E 4,5, D,E 4,5, D, E DRIVE CONTROL PCA A4 XA4P1 XA4P2 J2 4,5, D,E 9,10, 11,12, 13,14, 15,16 TRACK FOLLOWER PCA A5 XA5P1 XA5P2 CONNECTIONS VIA MAIN HARNESS R/W PREAMP PCA A6 XA6P1 MOTHERBOARD PCA SPINDLE PMR PCA LOGIC PCA A7 AS A9 J1 J3 P1 J1 ENCODER peA Al0 J1 INDICATOR peA A11 J1 J2 4,5, D, E 17,18, U,V 4,5, D,E 5 13 4 CONNECTIONS VIA CABLE 13365-&0007 FAULT INDICATOR PCA A12 DATA PCA A1 SELF-TEST PCA A13 J1 J2 J1 9,10, 11, 12, 13,14, 15, 16 25,26 25,26 (J C +12V 3,C 3,C 3,C 3,C 3,C 9,K 20,X 3,C 5 c w <~ ..J :::> C) w a: -12V 2,8 2,8 2,8 2,8 2, 8 lO,l 21, Y 2,8 -24V c w ~ :2J<5 CJ O C) w ex: +10V GROUND 1,A 18, V 1,-A 18,V 1,A 18,V 6 1,A 18,V 14 11, M 19,W 1,A 18, V 7,8, 22,23, 4 12, Z,AA N,P 1,16, A,V 2 2 11, 13, 15,17, 19,21, 23,24, 27,28 11, 13, 15,17, 19,21, 23,24, 27,28 DENOTES SOURCE * WHEN DSU IS INSTAllED, SLOTS Al AND A2 CONTAIN HEAD ALIGNMENT PCA AND I/O SECTOR PCA, RESPECTIVELY. A-73/A-74 PART V - REMOVAL AND REPLACEMENT The majority of the removal and replacement procedures contained in section V of the main manual are applicable to the HP 7925H. The only differences pertain to the removal instructions for a) certain of the PCA's (paragraph 5-10), and b) the fan on the card cage assembly. These changes are discussed in the following paragraphs. WARNING The information given in this part is intended for service-trained personnel. To avoid potentially serious electrical shock, do not proceed further unless qualified to do so. A-89. CARD CAGE PCA'S To remove any of the five card cage PCA's, A1 through A5, proceed as follows: a. Perform the preparation for service procedure outlined in paragraph 5-2 of the main manual. b. Ensure that the ac power cord is removed from the ac mains power source. c. Remove the shroud following the procedure outlined in paragraph 5-3 of the main manual. d. Remove the two nuts (6, figure A-14) that attach the cable assembly (5) to the card cage cover. Separate the cable from the cover. e. Loosen the three screws thqt secure the preamp shield and remove the shield. f. Loosen the two screws that secure the card cage cover and remove the cover. g. Disconnect all cables from the PCA to be removed from the card cage chassis. h. On PCA's Al and A2, pull up on the PCA extractor and slide the PCA up and out of the card cage chassis. On PCA's A3 through A5, simultaneously lift up the two extractor levers and slide the PCA up and out of the card cage chassis. I CAUTION I Ensure that the correct replacement PCA is inserted into the corresponding card guides, otherwise damage to the PCA could result. I CAUTION I Whenever microprocessor PCA-A2 is replaced, ensure that programming jumpers VV360 through VV363 and VV312 through VV318 on PCA-A2 are correctly programmed for HP 7925H operation as follows. (The location of the jumpers is shown in figure A-16.) VV360 - IN for rotational position sensing (RPS) VV361 - Spare. An unused jumper can be stored here. VV362 - OUT VV363 - OUT VV312 - OUT VV314 - IN VV316 - IN VV318 - IN I CAUTION I Whenever track follower PCA-A5 is replaced, the data head alignment check must be performed. (Refer to section III of the main manual for details.) i. Insert the replacement PCA into the card slot, ensuring that the component side of the PCA faces toward the outer side of the disc drive. Reconnect any cables disconnected during removal and then press the PCA firmly into the receptacle until seated. j. Replace the card cage cover and secure with the two screws. k. Install the preamp shield and secure with the three mounting screws. 1. Connect the cable assembly to Data PCA-AI. m. Attach the cable assembly to the card cage cover using the two mounting nuts. n. Replace the shroud as described in paragraph 5-3 of the main manual. o. Restore power to the disc drive. A-gO. SELF-TEST PCA-A13 To remove the self-test PCA-A13 (13, figure A-22), proceed as follows: A-75 Appendix A 7925 a. Perform the preparation for service procedure outlined in paragraph 5-2 of the main manual. b. Ensure that the ac power cord is disconnected from the ac mains power source. c. Open the rear door. d. Remove the four screws (2) that secure the rear shield (1) to the cabinet frame. e. Disconnect the cable assembly (5, figure A-23) from the self-test PCA. f. Remove the three screws (6) that attach the HP-IB shield (5) to the rear shield. g. Remove the two screws (8) that attach the HP-IB shield to the self-test PCA. h. Remove the two screws (10) that attach the ground bracket (12) to the self-test PCA. i. Remove the self-test PCA from the self-test panel (14). The self-test PCA is installed by reversing the above procedure. A-91. CARD CAGE FAN To remove the card cage fan (13, figure A-23), proceed as follows: a. Perform the preparation for service procedure outlined in paragraph 5-2 of the main manual. b. Ensure that the ac power cord is disconnected from the ac mains power source. c. Remove the shroud (refer to paragraph 5-3). d. Disconnect the power cord (10) from the fan. e. Remove the three screws (11) and spacers (14) that attach the fan to the card cage. To install the fan reverse the above procedure. When installing the fan ensure that the airflow arrow on the fan points toward the outside of the disc drive. A-76 PART VI - REPLACEABLE PARTS A-92. INTRODUCTION The replaceable parts lists and exploded views contained in section VI of the main manual are applicable to the HP 7925H, with the exception of certain component changes required in the documentation for the HP 7925 Disc Drive (table 6-1, figure 6-1) and the Mainframe Assembly (table 6-2, figure 6-2). These changes are detailed in figures A-22 and A-23, respec- tively. In addition, an HP-IB Device Address label, part no. 7120-8111, is used to identify the 8-position rotary switch (6, figure 6-9) on the HP 7925H operator panel (9, figure 6-9) and an HP-IB Cable (2 metres), part no. 8120-3446, is included with the disc drive. Also, the 13013D Multi-Unit Cable, the 13213D Data Cable, the 13037D Disc Controller, and the 13037D Disc Controller Installation and Service Manual, part no. 13037-90911, are not provided with the HP 7925H. A-77 Appendix A 7925 Table A-13. HP 7925D Disc Drive - Part Cp.anges for HP 7925H FIG. & INDEX NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 HP PART NO. 07925-60143 2680-0285 0590-0804 2510-0148 13365-00018 2510-0045 3050-0001 2360-0209 2190-0008 2200-0149 3050-0229 13365-00024 13365-60003 13365-00001 DESCRIPTION 'REAR SHIELD (Attaching Parts) 'SCREW, machine, pozi, 10-32,0.625 in. long 'NUT, sheet metal, 10-32 ---x--'SCREW, machine, 8-32, 1.25 in. long, w/ext-tooth, 'SHIELD, HP-IB (Attaching Parts) ·SCREW, machine, ph, pozi, 8-32, 0.375 in. long, w/ext-tooth 'WASHER, flat, no. 8 ---x--'SCREW, machine, ph, pozi, 6-32, 1.0 in. long 'WASHER, lock, no. 6 'SCREW, machine, ph, 0.625 in. long 'WASHER, flat, no. 4 'GROUND BRACKET, HP-IB Connector 'SELF-TEST, PCA (A13) · PAN EL, Self-Test MFR CODE 28480 00000 00000 00000 28480 00000 00000 00000 00000 00000 00000 28480 28480 28480 MFR PART NO. 07925-60143 aBO aBO aBO 13365-00018 aBO aBO aBO aBO aBO aBO 13365-00024 13365-60003 13365-00001 UNITS PER ASSY 1 4 4 2 1 3 3 2 2 2 2 1 1 1 3 (34, figure 6-1) A-78 Figure A·22. HP 7925D Disc Drive - Part Changes for HP 7925H 7925 Appendix A Table A-14. Mainframe Assembly - Part Changes for HP 7925H FIG. & INDEX NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 HP PART NO. 13365-00019 2510-0043 3050-0001 13365-60006 13365-60015 2420-6001 2190-0142 13365-60101 13365-60202 13365-60011 2360-0242 3160-0300 3160-0381 0380-0912 13365-00020 2360-0121 DESCRIPTION *CaVER, card cage (Attaching Parts) *SCREW, machine, fh, pozi, 6-32, 0.375 in. long, w/ext-tooth *WASHER, flat, no. 8 ---x--*CABLE, jumper *CABLE ASSEMBLY (Attaching Parts) *NUT, hex, 6-32, w/ext-tooth *WASHER, flat, no. 6 ---x--*OATA PCA (A1) *MICRaPRaCEssaR PCA (A2) *CABLE, fan *SCREW, machine, pozi, ph, 6-32, 1.25 in. long, w/ext-tooth *FINGER GUARO *FAN, 115 Vac, 50/60 Hz *SPACER, round, 0.72 in. long *BRACKET, fan (Attaching Parts) *SCREW, machine, pozi, ph, 6-32,0.50 in. long, w/ext-tooth ---x--- MFR CODE 28480 00000 00000 28480 28480 00000 00000 28480 28480 28480 00000 28480 28480 00000 28480 00000 MFR PART NO. 13365-00019 aBO aBO 13365-60006 13365-60015 aBO aBO 13365-60101 13365-60202 13365-60011 aBO 3160-0300 3160-0381 aBO 13365-00020 aBO UNITS PER ASSY 1 2 2 1 1 2 2 1 1 1 3 1 1 3 1 4 (13, fig ure 6-2) 12 11 Figure A-23. Mainframe Assembly - Part Changes for HP 7925H A-79/A-80 PART VII - RECORDING FORMAT AND COMMUNICATION PROTOCOL A-93. INTRODUCTION This part describes the recording format used in the HP 7925H Disc Drive and provides details of the HP 7925H command set. The bit numbering notation shown in figure A-24 is used throughout the section. A 16-bit word is made up of two bytes, namely the lefthand (upper, most significant) byte and the righthand (lower, least significant) byte. Note that the HP 7925/1000 numbering scheme is the reverse of the HP 300/3000 scheme in that the least significant bit is numbered 0 and the most significant bit is numbered 15. A-94. RECORDING FORMAT The HP 7925H track and sector recording format is illustrated in figure A-25. There are 48 sectors on each track and each sector is separated from the next by an intersector gap (ISG) having a nominal duration of 27 microseconds. Each sector contains a number of fields, described as follows. · SYNC. The sync field consists of 24 bytes of all zeros. The field is generated at the beginning of each sector written, and is used to synchronize the read electronics to the data stream during a read operation. · PREAMBLE. The preamble is a 6-byte field that precedes the data field of each sector. The six bytes are defined as follows: SYNC - The sync bytes form one word (two bytes) of value 100377 (octal). The leading 1, since it follows the sync field, signifies the start of a valid data stream to the data separator. The least significant 1 (making the bytes 100377 instead of 100376) indicates that there is no valid error-correcting information in the ECC field of the postamble. The controller will not support error correction at present, but will write an arbitrary pattern into the ECC field so that the READ FULL SECTOR and WRITE FULL SECTOR of all compatible disc drive subsystems will function properly. CYLAD - Two bytes containing the 16-bit cylinder address of the sector. The address may not be the same as the physical address of the sector if the sector is part of a track which has been flagged with the S (spare) or D (defective) bit. S, P, D - Three bits of track status information. The combination used must be the same for all sectors of a particular track (cylinder and head address). The three bits are defined as follows: S bit - When set to 1 indicates that the track being accessed is a spare track in active use. P bit - When set to 1 indicates that the track being accessed is write protected. Such a track may not be written on unless the READ ONLY switch on the disc drive HP-IB TRANSFERRED FIRST TRANSFERRED SECOND r r - - - - - - - - - . J A ' - - - - - - - - - -_ _y , . . . - - - - - - - - - - ' A ' - - - - - - ) 8 76 5 4 3 2 8 7 4 3 2 HP 300/3000 HP 7925/1000 a 2 3 4 5 6 7 8 9 10 11 12 .13 14 15 15 14 13 12 11 10 9 8 7 6 5 4 3 2 o 7300·110 Figure A-24. Bit Numbering Notation A-81 Appendix A 7925 is not set and the FORMAT switch on the disc drive is set to override the protect feature. D bit - When set to 1 indicates that the track being accessed has been flagged defective. The Sand D bits are mutually exclusive. The P bit may be set in any combination. HEAD - Five bits containing the head address of the sector. The address may not be the same as the physical head address of the sector being flagged with the S or D bit. The S, P, D bits and the head address together form one byte of the preamble. SECTOR - One byte containing the sector (rotational position) address of the sector. · DATA. The data field consisting of 256 bytes of data. · POSTAMBLE. The postamble is a 14-byte field that follows the data field of each sector. The 14 bytes are: CRC- Two bytes of cyclic redundancy check (CRC) information for detection of errors during readout. ECC- A 12-byte field reserved for errorcorrecting information. The present controller will not support error correction. The controller writes an arbitrary pattern on the ECC field. A READ FULL SECTOR command will return the pattern after the other fields have been transmitted. A-95. CHANNEL COMMUNICATIONS The controller presents a bus-controlled device interface on the HP-IB. In this mode of operation, the controller-in-charge of the bus (for example, an HP 300 System I/O channel) explicitly addresses devices (for example, the HP 7925H) to communicate over the HP-IB. This is accomplished by using the primary and secondary commands defined in IEEE Standard 488-1975, IEEE Standard Digital Interface for Programmable Instrumentation. Communications between the controller and HP-IB (except for the SECONDARY (HARD) CLEAR and IDENTIFY sequences) observe the general sequence protocol shown in figure A-26. An HP-IB primary or secondary is distinguished from data by the assertion of the Attention (ATN) line on the HP-IB. Only the HP-IB controller-in-charge (CIC) can assert ATN. Primary and secondary, as used in this section, are subsets of the total class of primaries and secondaries available under HP-IB protocol. In particular, the primaries recognized by the controller are primary address to talk/listen (Primary 1) and primary untalk/ unlisten (Primary 2). Refer to IEEE Standard Digital Interface for Programmable Instrumentation for additional details. In general, four different types of information flow between the controller and the HP-IB channel. These types are: · Control commands (Op codes) and associated parameters. · Controller status on completed commands. · Read data passed from the disc to the I/O channel. · Write data passed from the I/O channel to the disc. J { ISG SECTOR n ISG SECTOR n + 1 J ISG /' I -- / / I I -- / I I -- -.. , FSYIENCLD» PREAMBLE DATA POSTAMBLE r 24 , , - - - - - - -.........-:-_-_-_ -----------------J/-------~ BYTES'" 6 BYTES _ 256 BYTES I 14 BYTES \ ,," ./ -- I \ I \ ./ ",./ _C_Y_L_A_D---I~ · ./ __.------. 8 7 6 5 l_c_S_Y_N_C_....... HEAD I1 8 - I - - 1 SECTOR - I I (-C-R-C-I \\ E_C_C_* l\ 2 BYTES 2 BYTES 1 BYTE 1 BYTE 2 BYTES 12 BYTES * NOT WRITTEN OR READ BY HP 7925H. 7311-103 Figure A-25. Track and Sector Format A-82 7925 Appendix A PRIMARY 1 1 SECONDARY ! DATA BYTES* (ATN) 8 I (ATN) 8 I 8 I In addition to the four types of information listed above, there are seven other types of control information with secondaries that the controller is capable of interpreting. These are listed below and described in the following paragraphs. · DSJ (DEVICE SPECIFIED JUMP). Informs the I/O channel whether or not an operation was completed successfully (a go/no go indication). · PARALLEL POLL. The I/O channel conducts a parallel poll on the HP~IB and each device on the bus is allowed to request attention or service by asserting the HP-IB End or Identify (EOD line corresponding to the HP-IB address. 1 PRIMARY 2 (ATN) 8 I * The number of data bytes may vary from 0 to n, depending on the particular sequence. 7300-112 Figure A-26. Sequence Protocol · SECONDARY (HARD) CLEAR. The controller is commanded to place itself in a known reset state. · SELF-TEST. The I/O channel commands the controller to execute a self-diagnostic procedure. The channel can. then request the result of the diagnostic. · LOOPBACK. A test of the channel and the controller. The channel writes data to the controller, then reads it back and compares it with the original data. An HP-IB secondary command is associated with each of the above types. Upon receipt of such a secondary, the controller examines the modifier field (see table A-15) in order to distinguish which of the four operation types to perform. · IDENTIFY. Invoked by the operating system to determine what ,kind of devices are present on the I/O channel. The controller returns two bytes of preassigned identification code whenever the identify is performed (usually at system power-up) to aid the channel in the process of auto-configuration. Table A-15. Controller Secondaries Coding Summary PRIMARY COMMAND Listen Talk Listen Talk Listen Talk Listen Talk Listen Talk Listen Talk Untalk SECONDARY COMMAND SECONDARY TYPE % MODIFIER FIELD 8 765 4321 D (DATA) P 1 1 0 1 0 0 0 D P 110 1000 D P110 0000 D P 110 0000 D P 110 1001 D P 110 100 1 C (CONTROL) P 1 1 1 0 0 0 0 C P 111 0000 C P 111 1111 C P 111 1111 C P 111 1110 C P 111 1110 - P 1 1 A DDRS FUNCTION Receive Disc Command (Secondary Get Command) Send Disc Status (Secondary Send Status) Receive Write Data (Secondary Write Data) Send Read Data (Secondary Read Data) Cyclic Redundancy Check (CRC)" Cyclic Redundancy Check (CRC)" Secondary (Hard) Clear Return Device-Specified Jump (DSJ) byte Initiate Self-Test Return Self-Test Result Write Loopback Record Read Loopback Record Identify " Not implemented on current versions of the controller. A-83 Appendix A 7925 · CRC. A dummy cyclic redundancy check which is contained in the controller vocabulary to provide upward compatibility with future versions of the PHI chip capable of checking for errors in the data. A-96. IDLE STATES The controller has three idle states, where it is waiting to perform an operation (command or secondary). Idle State 1 (analogous to the Command Wait Loop in the HP 13037 Disc Controller) is entered at the normal or error completion of all secondaries except the END command and the RETURN DSJ BYTE secondary. In Idle State 1, the controller will respond to any parallel poll conducted on the HP-IB but will not report the disc drive being unloaded nor allow self-test to be invoked via the self-test START switch located at the rear of the disc drive. These condi~ tions arc reversed in Idle State 2 (analogous to the HP 13037 Disc Controller Poll Loop). That is, the controller will not respond to a parallel poll except when a disc drive is unloaded, but it will respond to the self-test START switch. Idle State 3, entered after a self test or SECONDARY (HARD) CLEAR is performed, is similar to Idle State 2 except that the controller also generates a parallel poll response (PPR). Since a self test is automatically performed at power-on or whenever the disc drive is loaded, Idle State 3 will be entered at these times also. A-97. CONTROLLER SECONDARIES The controll~r can interpret the thirteen secondaries listed in table A-15. (For a detailed description of these secondaries, refer to the HP 13365 Integrated Disc Controller Programming Guide, part no. 13365-90901.) The two CRC secondaries listed in table A-15 are not implemented in current versions of the controller and are included for reference only. The general form of the secondary as transmitted over the HP-IB, is as shown in fjgure A-27. P is an odd par- ity bit in bit 8 of all controller-in-charge primaries and secondaries. The PHI chip mayor may not freeze the bus when parity is not odd. This is a programmable feature set by bit 1 in the data byte of a System 300 CLEAR command. DIC is used to distinguish between "data-type" and "control-type" secondaries (D/C = all), and XXXX is a modifier field which defines the particular operation to be performed. Note in table A-15 that the same secondary can be used to perform different operations, depending on whether the associated primary is an address to talk or an address to listen. The PHI chip, when processing a secondary, changes the 1 sent in bit 6 to a listen/talk = 0/1, depending on the sense of the associated primary. Thus, the controller can determine the proper interpretation of the secondary. The controller expects the last data byte sent to it during any listen sequence to be tagged with the EOI bit. When the controller is addressed to talk, any data byte tagged with EOI usually indicates an error condition in the controller. The only exceptions are the READ LOOPBACK RECORD secondary and the CRC secondary. Any secondary other than those described will generate an I/O program error status and set the device-specified jump (DSJ) byte to 1 (error). I/O program error status and DSJ byte = 1 also result if any byte tagged with ATN is received with incorrect (even) parity and the parity freeze option of the PHI is not enabled. 8765 4321 ~9xxxxl 7300-113 Figure A-27. General Form of Secondary A-84 SALES & SUPPORT OFFICES Arranged alphabetically by country Product Line Sales/Support Key Key Product Une A Analytical CM Components C Computer Systems Sales only CH Computer Systems Hardware Sales and Sarvlces CS Computer Systems Software Sales and Services E Electronic Instruments &Measurement Systems M Medical Products MP Medical Products Primary SRO MS Medical Products Secondary SRO P Personal Computation Producta Sales only for speclllc product line Support only for speclftc product line IMPORTANT: These symbols designate general product line capablUIy. They do not Insure sales or support availability for all products within a line, at all locations. Contact your local sales office for Information regarding locations where HP support Is available for specific products. HP distributors are printed in italics. ANGOLA Telectra Empresa Tecnica de Equipamentos R. Barbosa Rodrigues, 41-1 DT. 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Via Nuova San Rocco a Capodimonte, 62/A 1-80131 NAPLES Tel: (081) 7413544 Telex: 710698 A,CH,E Hewlett-Packard Italiana S.p.A. VlSle G. Modugno 33 '-16156 GENOVA PEGLI Tel: (010) 68-37-07 Telex: 215238 E,C Hewlett-Packard Italiana S.p.A. Via Turazza 14 1·35100 PADOVA Tel: (049) 664888 Telex: 430315 A,CH,E,MS Hewlell·Packard Italiana S.p.A. VlSle C. Pavese 340 1-00144 ROllA Tel: (06) 54831 Telex: 610514 A,CH,CM,CS,E,MS,P· 0 SALES & SUPPORT OFFICES Arranged alphabetically by country (h~ Hewlett-Packard Italiana S.p.A. Corso Svizzera, 184 1-10149 TORINO Tel: (011) 74 4044 Telex: 221079 CH,E JAPAN Yokogawa-Hewlett-Packard Ltd. 152-1,Onna 000 ATSUGI, Kanagawa, 243 Tel: (0462) 28-0451 CM,C·,E Yokogawa-Hewlett-Packard Ltd. Towa Building 2-3, Kaigan-dori, 2 Chome Chuo-ku KOBE,650 Tel: (078) 392-4791 C,E Yokogawa-Hewlett-Packard Ltd. Kumagaya Asahi 82 Bldg 3-4 Tsukuba KUMAGAYA, Saitama 360 Tel: (0485) 24-6563 CH,CM,E Yokogawa·Hewlett-Packard Ltd. Asahi Shinbun Oaiichi Seimei Bldg. 4-7, Hanabata-cho KUMAMOTO,860 Tel: (0963) 54·7311 CH,E Yokogawa-Hew1ett-Packard Ltd. Shin-Kyoto Center Bldg. 614, Higashi·Shiokoji·cho Karasuma-Nishiiru Shiokoji-dori, Shimogyo-ku KYOTO, 600 Tel: 075-343-0921 CH,E Yokogawa-Hewlett-Packard Ltd. Mito Mitsui Bldg 4·73, Sannomaru, 1 Chome MITO, Ibaragi 310 Tel: (0292) 25-7470 CH,CM,E Yokogawa-Hewlett-Packard Ltd. Sumitomo Seimei 14-9 Bldg. Meieki-Minami, 2 Chome Nakamura-ku NAGOYA,450 Tel: (052) 571-5171 CH,CM,CS,E,MS Yokogawa-Hewlett-Packard Ltd. Chuo Bldg., 4-20 Nishinakajima, 5 Chome Yodogawa-ku OSAKA,532 Tel: (06) 304-6021 Telex: YHPOSA 523-3624 A,CH,CM,CS,E,MP,P· Yokogawa-Hewlett-Packard Ltd. 27·15, Yabe, 1 Chome SAGAMIHARA Kanagawa, 229 Tel: 0427 59-1311 Yokogawa-Hewlett-Packard Ltd. Oaiichi Seimei Bldg. 7-1, Nishi Shinjuku, 2 Chome Shinjuku-ku,TOKYO 160 Tel: 03-348-4611-5 CH,E Yokogawa-Hewlett-Packard Ltd. 29-21 Takaido-Higashi, 3 Chome Suginami-ku TOKYO 168 Tel: (03) 331-6111 Telex: 232-2024 YHPTOK A,CH,CM,CS,E,MP,P· Yokogawa-Hewlett-Packard Ltd. Oaiichi Asano Building 2-8, Odori, 5 Chome UTSUNOMIYA, Tochigi 320 Tel: (0286) 25·7155 CH,CS,E Yokogawa-Hewlett-Packard Ltd. Yasuda Seimei Nishiguchi Bldg. 30-4 Tsuruya-cho, 3 Chome YOKOHAMA221 Tel: (045) 312-1252 CH,CM,E JORDAN Mouasher Cousins Company P.O. Box 1381 AMMAN Tel: 24907, 39901 Telex: 21456 SABCO JO CH,E,M,P KENYA ADCOM LId., Inc., Kenya P.O.Box 30010 NAIROBI Tel: 331955 Telex: 22639 E,M KOREA Samsung Electronics Computer Division 16-561 Yeoksam-Dong Kwangnam-Ku C.P.O. Box 2115 SEOUL Tel: 555-1555, 555-5441 Telex: K21364 SAMSAN A,CH,CM,CS,E,M,P MALTA Philip Toledo LId. NotabileRd. MRIEHEL Tel: 44141, 455 66 Telex: Media MW 649 P MEXICO Hewlett-Packard Mexicana, S.A. de C.V. Av. Periferico Sur No. 6501 Tepepan, Xochimilco MEXICO D.F. 16020 Tel: 676-4600 Telex: 17-74-507 HEWPACK MEX A,CH,CS,E,MS,P Hewlett-Packard Mexicana, SA de C.V. Ave. Colonia del Valle #409 Col. del Valle Municipio de Garza Garcia MONTERREY, N.L. Tel: 784241 Telex: 038 410 CH ECISA Jose Vasconcelos No. 218 Col. Condesa Deleg. Cuauhtemoc MEXICO D.F. 06140 Tel: 553-1206 Telex: 11-12155 ECE ME 1.1 KUWAIT AI-Khaldiya Trading & Contracting P.O. Box 830 Sa!at KUWAIT Tel: 42-4910,41·1126 Telex: 22481 Areeg kt CH,E,M Photo & Cine Equipment P.O. Box 210 Sa!at KUWAIT Tel: 42-2846,42-3801 Telex: 22241 Matin kt P MOROCCO Dolbeau 81 rue Karatchi CASABLANCA Tel: 3041-82, 3068-38 Telex: 23051,22822 E Gerep 2 rue d'Agadir Boite Postale 156 CASABLANCA Tel: 212093,212095 Telex: 23 139 LEBANON P G.M. Dolmadjian Achra!ieh P.O. Box 165. 161 BEIRUT Tel: 290293 Mp·· NETHERLANDS Hewlett-Packard Nederland B.V. Van Heuven Goedhartlaan 121 NL 1181KK AMSTELVEEN P.O. Box 667 NL 1180 AR AMSTELVEEN LUXEMBOURG Hewlett-Packard Belgium S.A.lN.V. Blvd de la Woluwe, 100 Tel: (020) 47-20-21 Telex: 13216 HEPA NL A,CH,CM,CS,E,MP,P Woluwedal Hewlell-Packard Nederland B.V. B-1200 BRUSSELS Bongerd 2 Tel: (02) 762-32-00 NL 2906VK CAPELLE, AID IJSSEL Telex: 23-494 paloben bru P.O. Box 41 A,CH,CM,CS,E,MP,P NL 2900AA CAPELLE, AID IJSSEL Tel: (10) 51-64-44 MALAYSIA Telex: 21261 HEPAC NL Hewlett-Packard Sales (Malaysia) A,CH,CS,E Sdn. Bhd. 1st Floor, Bangunan British NEW ZEALAND American Hewlell-Packard (N.Z.) Ltd. Jalan Semantan, Oamansara Heights 169 Manukau Road KUALA LUMPUR 23-03 P.O. Box 26-189 Tel: 943022 Epsom, AUCKLAND Telex: MA31011 Tel: 687-159 A,CH,E,M,P· Cable: HEWPACK Auckland ProteI Engineering CH,CM,E,P· P.O.Box /9/1 Hewlett-Packard (N.Z.) Ltd. Lot 6624, Section 64 4-12 Cruickshank Street 23/4 Pending Road Kilbirnie, WELLINGTON 3 Kuching, SARAWAK P.O. Box 9443 Tel: 36299 Courtenay Place, WELLINGTON 3 Telex: MA 10904 PROTEL Tel: 877-199 Cable: PROTELENG Cable: HEWPACK Wellington A,E,M CH,CM,E,P Northrop Instruments & Systems LId. 369 Khyber Pass Road P.O. Box 8602 AUCKLAND Tel: 194-091 Telex: 60605 A,M Northrop Instruments & Systems LId. 110 Mandeville St. P.O. Box 8388 CHRISTCHURCH Tel: 486-928 Telex: 4203 A,M Northrop Instruments & Systems LId. Sturdee House 85-81 Ghuznee Street P.O. Box 2406 WELLINGTON Tel: 850-091 Telex: NZ 3380 A,M NORTHERN IRELAND See United Kingdom NORWAY Hewlett-Packard Norge AlS Folke Bernadottes vei 50 P.O. Box 3558 N-5033 FYLUNGSDALEN (Bergen) Tel: (05) 16-55-40 Telex: 16621 hpnas n CH,CS,E,MS ~ewlett-Packard Norge AlS Osterndalen 18 P.O. Box 34 N-13450STERAs Tel: (02) 17-11-80 Telex: 16621 hpnas n A,CH,CM,CS,E,M,P OMAN Khimjil Ramdas P.O. Box 19 MUSCAT Tel: 122225, 145601 Telex: 3289 BROKER MB MUSCAT P Suhail & Saud Bahwan P.O.8ox 169 MUSCAT Tel: 134201-3 Telex: 3214 BAHWAN MB PAKISTAN Mushko & Company LId. 1-B, Street 43 Sector F-811 ISLAMABAD Tel: 26815 Cable: FEMUS Rawalpindi A,E,M Mushko & Company LId. Oosman Chambers Abdullah Haroon Road KARACHI 0302 Tel: 524131, 524132 Telex: 2894 MUSKO PK Cable: COOPERATOR Karachi A,E,M,P· PANAMA Electr6nico Balboa, S.A. Calle Samuel Lewis, Ed. Alta Apartado 4929 PANAMAS Tel: 64-2100 Telex: 3483 ELECTRON PG A,CM,E,M,P 0 SALES & SUPPORT OFFICES (h~ Arranged alphabetically by country PERU era Electro MMica S.A. Los Flamencos 145, San Isidro Casilla 1030 LIMA 1 Tel: 41-4325, 41-3703 Telex: Pub. Booth 25306 CM,E,M,P PHILIPPINES The Online Advanced Systems Corporation Rico House, Amorsolo Cor. Herrera Street Legaspi Village, Makati P.O. Box 1510 Metro MANILA Tel: 85-35·81,85·34·91,85-32·21 Telex: 3274 ONLINE A,CH,CS,E,M Electronic Specialists and Proponents Inc. 690-B Epifanio de los Santos Avenue Cubao, QUEZON CITY P.O. Box 2649 Manila Tel: 98-96-81, 98-96-82, 98·96-83 Telex: 40018,42000 ITT GLOBE MACKAY BOOTH P PORTUGAL Mundinter Intercambio Mundial de Comercio S.A.R.L. P. O. Box 2761 Avenida Antonio Augusto de Aguiar 138 P·L/SBON Tel: (19) 53-21-31, 53·21·37 Telex: 16691 munter p M Soquimica Av. da Uberdade, 220-2 1298 LISBOA Codex Tel: 5621811213 Telex: 13316 SABASA P Telectra·Empresa Tecnica de Equipmentos Eleetricos S.A.R.L. Rua Rodrigo da Fonseca 103 P.O. Box 2531 P-LISBON 1 Tel: (19) 68-60-72 Telex: 12598 CH,CS,E,P PUERTO RICO Hewlett·Packard Puerto Rico P.O. Box 4407 CAROLINA, Puerto Rico 00628 Calle 272 Edificio 203 Urb. Country Club RIO PIEDRAS, Puerto Rico Tel: (809) 762-7255 A,CH,CS QATAR Computearbia P.O. Box 2750 DOHA Tel: 883555 Telex: 4806 CHPARB P Eastern Technical Services P.O.Box 4747 DOHA Tel: 329993 Telex: 4156 EASTEC DH Nasser Trading & Contracting P.O.Box 1563 DOHA Tel: 22170, 23539 Telex: 4439 NASSER DH M SAUDI ARABIA Modern Electronic Establishment Hewlell-Packard Division P.O. Box 281 Thuobah AL·KHOBAR Tel: 864-46 78 Telex: 671 106 HPMEEK SJ Cable: ELECTA AL-KHOBAR CH,CS,E,M,P Modern Electronic Establishment Hewlell-Packard Division P.O. Box 1228 Redec Plaza, 6th Floor JEDDAH Tel: 644 38 48 Telex: 4027 12 FARNAS SJ Cable: ELECTA JEDDAH CH,CS,E,M,P Modern Electronic Establishment Hewlell-Packard Division P.O.Box 2728 RIYADH Tel: 491-97 15,491-6387 Telex: 202049 MEERYD SJ CH,CS,E,M,P SCOTLAND See United Kingdom SINGAPORE Hewlell-Packard Singapore (Sales) Pte. Ltd. P.O. Box 58 Alexandra Post Office SINGAPORE,9115 6th Floor, Inchcape House 450-452 Alexandra Road SINGAPORE 0511 Tel: 631788 Telex: HPSGSO RS 34209 Cable: HEWPACK, Singapore A,CH,CS,E,MS,P Dynamar International LId. Unit 05- 11 Block 6 Kolam Ayer Industrial Estate StNGAPORE 1334 Tel: 747-6188 Telex: RS 26283 CM SOUTH AFRICA Hewlett·Packard So Africa (Pty.) Ltd. P.O. Box 120 Howard Place CAPE PROVINCE 7450 Pine Park Center, Forest Drive, Pinelands CAPE PROVINCE 7405 Tel: 53-7954 Telex: 57-20006 A,CH,CM,E,MS,P Hewlett·Packard So Africa (Pty.) Ltd. P.O. Box 37099 92 Overport Drive DURBAN 4067 Tel: 28·4178, 28-4179, 28'4110 Telex: 6-22954 CH,CM Hewlett-Packard So Africa (Pty.) Ltd. 6 Linton Arcade 511 Cape Road Linton Grange PORT ELIZABETH 6001 Tel: 041-302148 CH Hewlett·Packard So Africa (Ply.) Ltd. P.O.Box 33345 Glenstantia 0010 TRANSVAAL 1st Floor East Constantia Park Ridge Shopping Centre Constantia Park PRETORIA Tel: 982043 Telex: 32163 CH,E Hewlett-Packard So Africa (Pty.) Ltd. Private Bag Wendywood SANDTON 2144 Tel: 802-5111, 802-5125 Telex: 4·20877 Cable: HEWPACK Johannesburg A,CH,CM,CS,E,MS,P SPAIN Hewlett-Packard Espanola SA Calle Entenza, 321 E-BARCELONA 29 Tel: 322.24.51, 321.73.54 Telex: 52603 hpbee A,CH,CS,E,MS,P Hewlett-Packard Espanola S.A. Calle San Vicente SINo Edificio Albia II E-BILBAO 1 Tel: 423.83.06 A,CH,E,MS Hewlett-Packard Espanola SA Crla. de la Coruna, Km. 16,400 Las Rozas E-MADRID Tel: (1) 637.00.11 CH,CS,M Hewlett-Packard Espanola SA Avda. S. Francisco Javier, Sino Planta 10. Edificio Sevilla 2, E-SEVILLA 5 Tel: 64.44.54 Telex: 72933 A,CS,MS,P Hewlett·Packard Espanola SA Calle Ramon Gordillo, 1 (Entlo.3) E·VALENCIA 10 Tel: 361-1354 CH,P SWEDEN Hewlett-Packard Sverige AB Sunnanvagen 14K S-22226 LUND Tel: (046) 13-69-79 Telex: (854) 17886 (via SpAnga office) CH Hewlett-Packard Sverige AB Vastra Vintergatan 9 S-703440REBRO Tel: (19) 10-48-80 Telex: (854) 17886 (via SpAnga office) CH Hewlett-Packard Sverige AB Skalholtsgatan 9, Kista Box 19 S-16393 SpANGA Tel: (08) 750-2000 Telex: (854) 17886 A,CH,CM,CS,E,MS,P Hewlett-Packard Sverige AB FrlHaliisgatan 30 S-42132 VASTRA·FROLUNDA Tel: (031) 49-09-50 Telex: (854) 17886 (via SpAnga office) CH,E,P SWITZERLAND Hewlett-Packard (Schweiz) AG Clarastrasse 12 CH-4058 BASLE Tel: (61) 33-59-20 A Hewlett-Packard (Schweiz) AG 7, rue du Bois-du-Lan Case Postale 365 CH-1217 MEYRIN 1 Tel: (0041) 22-83-11-11 Telex:27333 HPAG CH CH,CM,CS Hewlett·Packard (Schweiz) AG Allmend 2 CH-8967 WIDEN Tel: (0041) 57 312111 Telex: 53933 hpag ch Cable: HPAG CH A,CH,CM,CS,E,MS,P SYRIA General Electronic Inc. Nuri Basha P.O. Box 5781 DAMASCUS Tel: 33-24-87 Telex: 112161TIKAL SY Cable: ELECTROBOR DAMASCUS E Middle East Electronics Place Azme P.O.Box 2308 DAMASCUS Tel: 334592 Telex: 11304 SA TACO SY M,P TAIWAN Hewlett-Packard Far East Ltd. Kaohsiung Office 2/F 68-2, Chung Cheng 3rd Road KAOHSIUNG Tel: 241-2318, 261-3253 CH,CS,E Hewlett-Packard Far East Ltd. Taiwan Branch 5th Floor 205 Tun Hwa North Road TAIPEI Tel: (02) 712-0404 Cable:HEWPACK Taipei A,CH,CM,CS,E,M,P Ing Uh Trading Co. 3rd Floor, 7 Jen-Ai Road, Sec. 2 TAIPEI 100 Tel: (02) 3948191 Cable: INGLIH TAIPEI A THAILAND Unimesa 30 Patpong Ave., Suriwong BANGKOK 5 Tel: 235-5727 Telex: 84439 Simonco TH Cable: UNIMESA Bangkok A, CH,CS,E,M Bangkok Business Equipment LId. 515-6 Dejo Road BANGKOK Tel: 234-8670,234-8671 Telex: 87669-BEQUIPT TH Cable: BUSIQUIPT Bangkok P TRINIDAD & TOBAGO Caribbean Telecoms LId. 50lA Jerningham Avenue P.O. Box 732 PORT·Of·SPAIN Tel: 62-44213,62-44214 Telex: 235,272 HUGCO WG CM,E,M,P TUNISIA Tunisie Electronique 31 Avenue de la Uberte TUNIS Tel: 280-144 E,P Corema Iter. Av. de Carthage TUNIS Tel: 253-821 Telex: 12319 CABAM TN M TURKEY Teknim Company LId. Iran Caddesi No. 7 Kavaklidere, ANKARA Tel: 275800 Telex: 42155 TKNM TR E E.M.A. Medina Eidem Sokak No.41/6 Yuksel Caddesi 'ANKARA Tel: 175622 M UNITED ARAB EMIRATES Emitac LId. P.O. Box 1641 SHARJAH Tel: 354121, 354123 Telex: 68136 Emitac Sh CH,CS,E,M,P UNITED KINGDOM GREAT BRITAIN Hewlett-Packard Ltd. Trafalgar House Navigation Road ALTRINCHAM Chesire WA 14 1NU Tel: (061) 928-6422 Telex: 668068 A,CH,CS,E,M Hewlett-Packard Ltd. Oakfield House, Oakfield Grove Clifton BRISTOL BS8 2BN, Avon Tel: (027) 38606 Telex: 444302 CH,M,P GREAT BRITAIN (Cont'd) Hewlett-Packard Ltd. Fourier House 257-263 High Street LONDON COLNEY Herts., AL2 1HA, SI. Albans Tel: (0727) 24400 Telex: 1·8952716 CH,CS,E Hewlett-Packard Ltd. Ouadrangle 106·118 Station Road REDHILL, Surrey Tel: (0737) 68655 Telex: 947234 CH,CS,E Hewlett-Packard Ltd. Avon House 435 Stratford Road SHIRLEY, Solihull West Midlands B90 4BL Tel: (021) 7458800 Telex: 339105 CH Hewlett-Packard Ltd. West End House 41 High Street, West End SOUTHAMPTON Hampshire S03 300 Tel: (703) 886767 Telex: 477138 CH Hewlett-Packard Ltd. King Street Lane WINNERSH, Wokingham Berkshire RG 11 5AR Tel: (0734) 784774 Telex: 847178 A,CH,E,M Hewlett-Packard Ltd. Nine Mile Ride WOKINGHAU Berkshire, 3RG 11 3LL Tel: 34463100 Telex: 84-88-05 CH,CS,E NORTHERN IRELAND Cardiac Services Company 95A Finaghy Road South BELFAST BT 10 OBY Tel' (0232) 625-566 Telex: 747626 At SCOTLAND Hewlett-Packard Ltd. SOUTH QUEENSFERRY West Lothian, EH30 9GT Tel: (031) 3311188 Telex: 72682 A,CH,CM,CS,E,M UNITED STATES Alabama Hewlett·Packard Co. P.O. Box 7000 8290 Whitesburg Drive, S.E. HUNTSVILLE, AL 35P02 Tel: (205) 830-2000 CH,CM,CS,E,M' Arizona Hewlett-Packard Co. 8080 Point Parkway West PHOENIX, AZ 85044 Tel: (602) 273-8000 A,CH,CM,CS,E,MS Hewlett·Packard Co. 2424 East Aragon Road TUCSON, AZ 85706 Tel: (602) 889-4631 CH,E,MS" 0 SALES & SUPPORT OFFICES Arranged alphabetically by country [h~ California Hewlett-Packard Co. 99 South Hill Dr. 4BRISBANE, CA 94005 Tel: (415) 330-2500 CH,CS Hewlett-Packard Co. 7621 Canoga Avenue CANOGA PARK, CA 91304 Tel: (213) 702-8363 A,CH,CS,E,P Hewlett-Packard Co. P.O. Box 7830 (93747) 5060 E. Clinton Avenue, Suite 102 FRESNO, CA 93727 Tel: (209) 252-9652 CH,CS,MS Hewlett-Packard Co. P.O. Box 4230 1430 East Orangethorpe FULLERTON, CA 92631 Tel: (714) 870-1000 CH,CM,CS,E,MP Hewlett-Packard Co. 320 S. Kellogg, Suite B GOLETA, CA 93117 Tel: (805) 967-3405 CH Hewlett-Packard Co. 5400 W. Rosecrans Boulevard LAWNDALE, CA 90260 P.O. Box 92105 LOS ANGELES, CA 90009 Tel: (213) 970-7500 Telex: 910-325-6608 CH,CM,CS,MP Hewlett-Packard Co. 3200 Hillview Avenue PALO ALTO, CA 94304 Tel: (415) 857-8000 CH,CS,E Hewlett·Packard Co. P.O. Box 15976 (95813) 4244 So. Market Court, Suite A SACRAMENTO, CA 95834 Tel: (916) 929-7222 A' ,CH,CS,E,MS Hewlett-Packard Co. 9606 Aero Drive P.O. Box 23333 SAN DIEGO, CA 92123 Tel: (619) 279-3200 CH,CM,CS,E,MP Hewlett-Packard Co. 2305 Camino Ramon ·C" SAN RAMON, CA 94583 Tel: (415) 838-5900 CH,CS Hewlett-Packard Co. P.O. Box 4230 Fullerton, CA 92631 363 Brookhollow Drive SANTAANA, CA 92705 Tel: (714) 641-0977 A,CH,CM,CS,MP Hewlett·Packard Co. 3003 Scott Boulevard SANTA CLARA, CA 95050 Tel: (408) 988-7000 Telex: 910-338-0586 A,CH,CM,CS,E,MP Hewlett-Packard Co. 5703 Corsa Avenue WESTLAKE VILLAGE, CA 91362 Tel: (213) 706-6800 E',CH',CS' Colorado Hewlett-Packard Co. 24 Inverness Place, East ENGLEWOOD, CO 80112 Tel: (303) 771-3455 Telex: 910-935-0785 A,CH,CM,CS,E,MS Connecticut Hewlett-Packard Co. 47 Barnes Industrial Road South P.O. Box 5007 WALLINGFORD, CT 06492 Tel: (203) 265-7801 A,CH,CM,CS,E,MS Florida Hewletl-Packard Co. P.O. Box 24210 (33307) 2901 N.W. 62nd Street FORT LAUDERDALE, FL 33309 Tel: (305) 973-2600 CH,CS,E,MP Hewletl-Packard Co. P.O. Box 13910 6177 Lake Ellenor Drive ORLANDO, FL 32809 Tel: (305) 859-2900 A,CH,CM,CS,E,MS Hewlett-Packard Co. 5750B N. Hoover Blvd., Suite 123 TAMPA, FL 33614 Tel: (813) 884-3282 A' ,CH,CM,CS,E' ,M' Georgia Hewlett-Packard Co. P.O. Box 105005 30348 ATLANTA,GA 2000 South Park Place ATLANTA, GA 30339 Tel: (404) 955-1500 Telex: 810-766-4890 A,CH,CM,CS,E,MP HawaII Hewletl-Packard Co. Kawaiahao Plaza, Suite 190 567 South King Street HONOLULU, HI 96813 Tel: (808) 526-1555 A,CH,E,MS Illinois Hewletl-Packard Co. P.O. Box 1607 304 Eldorado Road BLOOMINGTON, IL 61701 Tel: (309) 662-9411 CH,MS" Hewletl-Packard Co. 1100 31 st Street, Suite 100 DOWNERS GROVE, IL 60515 Tel: (312) 960-5760 CH,CS Hewlett-Packard Co. 5201 Tollview Drive ROLLING MEADOWS, IL 60008 Tel: (312) 255-9800 Telex: 910-687-1066 A,CH,CM,CS,E,MP Indiana Hewlett-Packard Co. P.O. Box 50807 7301 No. Shadeland Avenue INDIANAPOLIS, IN 46250 Tel: (317) 842-1000 A,CH,CM,CS,E,MS Iowa Hewlett-Packard Co. 1776 22nd Street, Suite 1 WEST DES MOINES, IA 50262 Tel: (515) 224-1435 CH,MS" Hewlett-Packard Co. 2415 Heinz Road IOWA CITY, IA 52240 Tel: (319) 351-1020 CH,E',MS Kansas Hewlett-Packard Co. 7804 East Funston Road Suite 203 WICHITA, KA 67207 Tel: (316) 684-8491 CH Kentucky Hewlett-Packard Co. 10300 Linn Station Road Suite 100 LOUISVILLE, KY 40223 Tel: (502) 426-0100 A,CH,CS,MS Louisiana Hewletl-Packard Co. P.O. Box 1449 KENNER, LA 70063 160 James Drive East ST. ROSE, LA 70087 Tel: (504) 467-4100 A,CH,CS,E,MS Maryland Hewletl-Packard Co. 3701 Koppers Street BALTIMORE, Md. 21227 Tel: (301) 644-5800 Telex: 710-862-1943 A,CH,CM,CS,E,MS Hewlett-Packard Co. 2 Choke Cherry Road ROCKVILLE, 1.40 20850 Tel: (301) 948-6370 A,CH,CM,CS,E,MP Massachusetts Hewlett-Packard Co. 32 Hartwell Avenue LEXINGTON, MA 02173 Tel: (617) 861-8960 A,CH,CM,CS,E,MP Michigan Hewlett-Packard Co. 23855 Research Drive FARMINGTON HILLS, 1.41 48024 Tel: (313) 476-6400 A,CH,CM,CS,E,MP Hewletl-Packard Co. 4326 Cascade Road S.E. GRAND RAPIDS, 1.41 49506 Tel: (616) 957-1970 CH,CS,MS Hewletl-Packard Co. 1771 W. Big Beaver Road TROY, 1.41 48084 Tel: (313) 643-6474 CH,CS Minnesota Hewletl-Packard Co. 2025 W. Larpenteur Ave. ST. PAUL, MN 55113 Tel: (612) 644-1100 A,CH,CM,CS,E,MP Missouri Hewlett-Packard Co. 11131 Colorado Avenue KANSAS CITY, 1.40 64137 Tel: (816) 763-8000 A,CH,CM,CS,E,MS Hewlett-Packard Co. 13001 Hollenberg Drive BRIDGETON, 1.40 63044 Tel: (314) 344-5100 A,CH,CS,E,MP Nebraska Hewlett-Packard 10824 Old Mill Rd., Suite 3 OMAHA, NE 68154 Tel: (402) 334-1813 CM,MS New Jersey Hewletl-Packard Co. W120 Century Road PARAMUS, NJ 07652 Tel: (201) 265-5000 A,CH,CM,CS,E,MP Hewlett-Packard Co. 60 New England Av. West PISCATAWAY, NJ 08854 Tel: (201) 981-1199 A,CH,CM,CS,E New Mexico Hewletl·Packard Co. P.O. Box 11634 (87192) 11300 Lomas Blvd.,N.E. ALBUQUERQUE, NM 87112 Tel: (505) 292-1330 CH,CS,E,MS New York Hewlett-Packard Co. Computer Drive South ALBANY, NY 12205 Tel: (518) 458-1550 Telex: 710-444-4691 A,CH,E,MS Hewletl-Packard Co. P.O. Box AC 9600 Main Street CLARENCE, NY 14031 Tel: (716) 759-8621 CH Hewletl-Packard Co. 200 Cross Keys Office Park FAIRPORT, NY 14450 Tel: (716) 223-9950 CH,CM,CS,E,MS Hewletl-Packard Co. 7641 Henry Clay Blvd. LIVERPOOL, NY 13088 Tel: (315) 451-1820 A,CH,CM,E,MS Hewlett·Packard Co. No. 1 Pennsylvania Plaza 55th Floor 34th Street & 8th Avenue MANHATIAN NY 10001 Tel: (212) 971-0800 CH,CS,E',M' Hewlett-Packard Co. 250 Westchester Avenue WHITE PLAINS, NY 10604 Tel: (914) 328-0884 CM,CH,CS,E Hewlett-Packard Co. 3 Crossways Park West WOODBURY, NY 11797 Tel: (516) 921-0300 Telex: 510-221-2183 A,CH,CM,CS,E,MS SALES & SUPPORT OFFICES Arranged alphabetically by country UNITED STATES (Cont'd) North Carolina Hewlell-Packard Co. P.O. Box 26500 (27420) 5605 Roanne Way GREENSBORO, NC 27409 Tel: (919) 852-1800 A,CH,CM,CS,E,MS Ohio Hewlell-Packard Co. 9920 Carver Road CINCINNATI, OH 45242 Tel: (513) 891-9870 CH,CS,MS Hewlell·Packard Co. 16500 Sprague Road CLEVELAND, OH 44130 Tel: (216) 243-7300 A,CH,CM,CS,E,MS Hewlell-Packard Co. 962 Crupper Ave. COLUMBUS, OH 43229 Tel: (614)436-1041 CH,CM,CS,E* Hewlell-Packard Co. P.O. Box 280 330 Progress Rd. DAYTON, OH 45449 Tel: (513) 859-8202 A,CH,CM,E* ,MS Oklahoma Hewlell-Packard Co. P.O. Box 75609 (73147) 304 N. Meridian, Suite A 3 OKLAHOMA CITY, OK 73107 Tel: (405) 946-9499 A*,CH,E *,MS Hewlell-Packard Co. 3840 S. 103rd E. Avenue Logan Building, Suite 100 TULSA, OK 74145 Tel: (918) 665·3300 A**,CH,CS,M * Oregon Hewlell-Packard Co. 9255 S. W. Pioneer Court WILSONVILLE, OR 97070 Tel: (503) 682-8000 A,CH,CS,E *,MS Pennsylvania Hewlell·Packard Co. 1021 8th Avenue KING OF PRUSSIA, PA 19046 Tel: (215) 265-7000 A,CH,CM,CS,E,MP Hewlell·Packard Co. 111 Zeta Drive PITTSBURGH, PA 15238 Tel: (412) 782-0400 A,CH,CS,E,MP South Carolina Hewlell-Packard Co. P.O. Box 21708 (29221) Brookside Park, Suite 122 1 Harbison Way COLUMBIA, SC 29210 Tel: (803) 732·0400 CH,E,MS Texas Hewlell-Packard Co. Suite C-110 4171 North Mesa EL PASO, TX 79902 Tel: (915) 533·3555 CH,E*,MS** Hewlell-Packard Co. P.O. Box 42816 (77042) 10535 Harwin Street HOUSTON, TX 77036 Tel: (713) 776·6400 A,CH,CM,CS,E,MP Hewlell-Packard Co. P.O. Box 1270 930 E. Campbell Rd. RICHARDSON, TX 75080 Tel: (214) 231-6101 A,CH,CM,CS,E,MP Hewlell-Packard Co. P.O. Box 32993 (78216) 1020 Central Parkway South SAN ANTONIO, TX 78232 Tel: (512) 494·9336 CH,CS,E,MS Utah Hewlell-Packard Co. P.O. Box 26626 (84126) 3530 W. 2100 South SALT LAKE CITY, UT 84119 Tel: (801) 974-1700 A,CH,CS,E,MS Virginia Hewlell-Packard Co. P.O. Box 9669 (23228) RICHMOND, Va. 23228 4305 Cox Road GLEN ALLEN, Va. 23060 Tel: (804) 747-7750 A,CH,CS,E,MS Washington Hewlell-Packard Co. 15815 S.E. 37th Street BELLEVUE, WA 98006 Tel: (206) 643-4000 A,CH,CM,CS,E,MP Hewlell-Packard Co. Suite A 708 North Argonne Road SPOKANE, WA 99206 Tel: (509) 922-7000 CH,CS West Virginia Hewlell-Packard Co. P.O. Box 4297 4604 MacCorkle Ave., S.E. CHARLESTON, WV 25304 Tel: (304) 925-0492 A,MS Wisconsin Hewlell-Packard Co. 150 S. Sunny Slope Road BROOKFIELD, WI 53005 Tel: (414) 784-8800 A,CH,CS,E* ,MP Tennessee Hewlell-Packard Co. 3070 Directors Row MEMPHIS, TN 38131 Tel: (901) 346-8370 A,CH,MS URUGUAY Pablo Ferrando S.A.C. e I. Avenida Italia 2877 Casilla de Correo 370 MONTEVIDEO Tel: 80-2586 Telex: Public Booth 901 A,CM,E,M VENEZUELA Hewlell·Packard de Venezuela C.A. 3A Transversal Los Ruices Norte Edilicio Segre Apartado 50933 CARACAS 1071 Tel: 239-4133 Telex: 25146 HEWPACK A,CH,CS,E,MS,P Hewlell-Packard de Venezuela C.A. Calle-72-Entre 3H Y3Y, NO.3H-40 Edilieio Ada-Evelyn, Local B Apartado 2646 MARACAIBO, Estado Zulia Tel: (061) 80.304 C,E* Hewlell-Packard de Venezuela C.A. Calle Vargas Rondon Edilicio Seguros Carabobo, Piso 10 VALENCIA Tel:(041) 51385 CH,CS,P Colimodio S.A. Este 2· Sur 21 No. 148 Apartado 1053 CARACAS 1010 Tel: 571·3511 Telex: 21529 COLMODIO M ZIMBABWE Field Technical Sales 45 Kelvin Road, North P.B.3458 SALISBURY Tel: 705231 Telex: 4-122 RH C,E,M,P HEADQUARTERS OFFICES II there is no sales office listed lor your area, contact one 01 these headquarters offices. NORTH/CENTRAL AFRICA Hewlell·Packard S.A. 7 Rue du Bois-du-Lan CH-1217 MEYRIN 1, Switzerland Tel: (022) 83 12 12 Telex: 27835 hpse Cable: HEWPACKSA Geneve ASIA Hewlell-Packard Asia LId. 6th Floor, Sun Hung Kai Centre 30 Harbour Rd. G.P.O. Box 795 HONG KONG Tel: 5-832 3211 Telex: 66678 HEWPA HX Cable: HEWPACK HONG KONG CANADA Hewlell·Packard (Canada) LId. 6877 Goreway Drive MISSISSAUGA, Ontario L4V 1M8 Tel: (416) 678-9430 Telex: 610-492-4246 EASTERN EUROPE Hewlell-Packard Ges.m.b.h. Lieblgasse 1 P.O.Box 72 A-1222 VIENNA, Austria Tel: (222) 2365110 Telex: 1 3 4425 HEPA A NORTHERN EUROPE Hewlell-Packard SA Uilenstede 475 NL-1183 AG AMSTELVEEN The Netherlands P.O.Box 999 NL·1180 AZ AMSTELVEEN The Netherlands Tel: 20437771 OTHER EUROPE Hewlell·Packard SA 7 rue du Bois·du-Lan CH-1217 MEYRIN 1, Switzerland Tel: (022) 83 1212 Telex: 27835 hpse Cable: HEWPACKSA Geneve MEDITERRANEAN AND MIDDLE EAST Hewlell-Packard SA Mediterranean and Middle East Operations Atrina Centre 32 Kilissias Ave. Maroussi, ATHENS, Greece Tel: 682 88 11 Telex: 21-6588 HPAT GR Cable: HEWPACKSA Athens EASTERN USA Hewlell·Packard Co. 4 Choke Cherry Road Rockville, MD 20850 Tel: (301) 258-2000 MIDWESTERN USA Hewlell·Packard Co. 5201 Tollview Drive ROLLING MEADOWS, IL 60008 Tel: (312) 255-9800 SOUTHERN USA Hewlell-Packard Co. P.O. Box 105005 450 Interstate N. Parkway ATLANTA, GA 30339 Tel: (404) 955-1500 WESTERN USA Hewlell-Packard Co. 3939 Lankershim Blvd. LOS ANGELES, CA 91604 Tel: (213) 877·1282 OTHER INTERNATIONAL AREAS Hewlell·Packard Co. Intercontinental Headquarters 3495 Deer Creek Road PALO ALTO, CA 94304 Tel: (415) 857·1501 Telex: 034-8300 Cable: HEWPACK March 1983 5952-6900 HP distributors are printed in italics.Adobe Acrobat 8.31 Paper Capture Plug-in Adobe Acrobat 8.31