AES 7880-A UHF Data Transceiver Module User Manual Manual

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Document ID	496576
Application ID	RCc8zKpVtUjNk3yQ+rObvg==
Document Description	Manual
Short Term Confidential	No
Permanent Confidential	No
Supercede	No
Document Type	User Manual
Display Format	Adobe Acrobat PDF - pdf
Filesize	0.58kB (7299 bits)
Date Submitted	2004-12-14 00:00:00
Date Available	2004-12-14 00:00:00
Creation Date	2004-12-09 16:36:36
Producing Software	PDF-XChange 3.0 (Windows XP)
Document Lastmod	0000-00-00 00:00:00
Document Title	Manual

AES 7880-A
UHF
DATA TRANSCEIVER
USER MANUAL
December 9, 2004
Notice:
The exterior of any product containing this device must contain the following
label:
“Contains FCC ID : L9N-7880-A”
Warning:
This device must be professionally installed with appropriate power supply
and antenna in order to ensure proper operation. For outdoor applications, the
antenna gain must not exceed 10 dBi. For indoor applications, the antenna gain
must not exceed 2.2 dBi.
Warning:
This device may not be modified by the user. Any modifications not
expressly approved by AES Corporation could void the user’s authority to operate
the equipment.
Warning:
For FCC RF exposure compliance purpose, this device may not be
incorporated into any product which operates within 50 cm of a person under
normal operation.
1.0
Description
The AES Model 7880-A UHF Data Transceiver permits data to be transmitted in
the 421 ~ 470 MHz band of frequencies. The maximum output power is 1 W. The data
rate is 9600 baud. The 7880-A interfaces with an embedded microprocessor using a
simple 4-wire serial Programming Port. The operating parameters are set by AES
approved software.
B2.0
Signals
The 7880-A has 20 pins, consisting of 2 rows of 10 pins each. The following
diagram (bottom view) shows the pin numbering scheme:
Pin 1
Pin 20
The following table lists the signal pins and their function:
Pin
Name
Function
19
18
17
16
PSEL
PCLK
PDI
PDO
Select Programming Port (active low)
Serial Clock for Programming Port
Data Input for Programing Port
Data Output from Programming Port
DCLK
DIO
Data Clock for Synchronous Data
Data Input/Output for Synchronous Data
10
11
13
20
VCC
GND
“
“
“
“
“
Power (+5 volts, 900 mA max)
Ground
3.0
Calibration
The 7880-A has a single adjustment – the Crystal Oscillator frequency. In order
to adjust the Crystal Oscillator frequency, a suitable frequency counter must be attached
to the antenna port. With the 7880-A set to transmit, using Manchester coding, the
Crystal Oscillator may be adjusted until the average frequency measured by the
frequency counter corresponds to the desired center frequency. The average frequency
should be set to within 300 Hz of the desired value. Note: The frequency counter must
be capable of measuring up to 470 MHz with an accuracy of 100 Hz in order to ensure
proper calibration of the 7880-A.
4.0
Device Programming
The operation of the 7880-A is controlled by the Programming Port. The protocol
conforms to the Serial Peripheral Interface (SPI), originated by Motorola. The interface
operates in a full duplex manner, with data shifted into the PDI pin at the same time as
data is shifted out on the PDO pin. Data transfer cycles are initiated by the low-going
transition of the PSEL pin; individual data bits are synchronized to the PCLK pin.
5.0
Data Communication
The DIO pin is bidirectional. When the 7880-A is in transmit mode, the DIO pin
becomes an input for the data to be transmitted. When the 7880-A is in receive mode, the
DIO pin becomes an output. In both cases, the data is synchronized to the DCLK pin.

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Create Date                     : 2004:12:09 16:36:36-05:00
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