Cattron North America 7700L UHF TRANSMITTER User Manual IEEE 830 1993 A 5 SRS by Feature

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Date Submitted	2013-05-08 00:00:00
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Creation Date	2013-04-25 11:21:11
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Document Title	IEEE 830-1993 (A.5 Template: SRS by Feature)
Document Creator	Microsoft® Office Word 2007
Document Author:	dstagg

406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
Introduction
Product
Development
TX Integration Guide.
406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
CONFIDENTIALITY NOTICE
The information contained in this document is the exclusive, confidential and proprietary property of Cattron-Theimeg
Inc. It is not to be reproduced, nor is it or any portion of it to be used by or disclosed to any other individual or legal
entity, without the prior, written approval of Cattron-Theimeg Inc. Furthermore, the information contained within this
document is also to be handled in accordance with any and all confidentiality agreements between Cattron-Theimeg
Inc. and the user of this information.
2013 Cattron-Theimeg Inc.
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
Introduction
Revision History
Date
3/21/13
Revision
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Description
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Document p/n: 9S01-7700-A301, rev. 2
Introduction
Table of Contents
1.
INTRODUCTION ............................................................................................................................................1-5
1.1.
1.2.
1.3.
PURPOSE..........................................................................................................................................................1-5
SCOPE ..............................................................................................................................................................1-5
DEFINITIONS, ACRONYMS, ABBREVIATIONS ...................................................................................................1-5
1.3.1.
Definitions ..........................................................................................................................................1-5
1.3.2.
Acronyms ............................................................................................................................................1-5
1.3.3.
Abbreviations ......................................................................................................................................1-6
1.4. REFERENCES....................................................................................................................................................1-6
1.5. OVERVIEW.......................................................................................................................................................1-6
1.5.1.
Notation Conventions .........................................................................................................................1-6
2.
OVERALL DESCRIPTION ............................................................................................................................2-1
2.1.
PRODUCT PERSPECTIVE ...................................................................................................................................2-1
2.1.1.
User Interfaces ....................................................................................................................................2-1
2.1.2.
Hardware Interfaces ............................................................................................................................2-1
2.1.3.
Software Interfaces .............................................................................................................................2-1
2.2. PRODUCT FUNCTIONS ......................................................................................................................................2-1
2.3. USER CHARACTERISTICS .................................................................................................................................2-2
2.4. CONSTRAINTS ..................................................................................................................................................2-2
2.5. ASSUMPTIONS AND DEPENDENCIES .................................................................................................................2-2
3.
SPECIFIC REQUIREMENTS ........................................................................................................................3-3
3.1.
EXTERNAL INTERFACE REQUIREMENTS ..........................................................................................................3-3
3.1.1.
Interfaces.............................................................................................................................................3-3
3.1.1.1 50 Pin Header I/O. ..............................................................................................................................3-3
3.1.2.
Software Interface Requirements ........................................................................................................3-4
3.2. SYSTEM FEATURES ..........................................................................................................................................3-4
3.2.1.
EEPROM ............................................................................................................................................3-4
3.2.2.
Programmable Output Power ..............................................................................................................3-4
3.2.3.
Software Configurable ........................................................................................................................3-5
3.2.4.
Low Cost VCO ...................................................................................................................................3-5
3.3. PERFORMANCE REQUIREMENTS ......................................................................................................................3-5
3.3.1.
Frequency Range ................................................................................................................................3-5
3.3.2.
Switching range ..................................................................................................................................3-5
3.3.3.
Alignment Ranges ..............................................................................................................................3-5
3.3.4.
Power ..................................................................................................................................................3-5
3.3.5.
Frequency Error and Drift ...................................................................................................................3-5
3.3.6.
Adjacent and co channel power ..........................................................................................................3-6
3.3.7.
Transient Emissions ............................................................................................................................3-7
3.3.8.
Modulation ..........................................................................................................................................3-8
3.3.9.
Keying ................................................................................................................................................3-8
3.4. DESIGN CONSTRAINTS .....................................................................................................................................3-8
3.4.1.
Standards Compliance ........................................................................................................................3-8
3.4.2.
Mechanical Dimensions ......................................................................................................................3-9
3.4.3.
Power Requirements .........................................................................................................................3-10
3.4.4.
Software Requirements .....................................................................................................................3-10
3.4.5.
RF Exposure Requirements ..............................................................................................................3-11
3.5. SYSTEM ATTRIBUTES ....................................................................................................................................3-11
3.5.1.
Reliability .........................................................................................................................................3-11
3.5.2.
Availability .......................................................................................................................................3-11
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
3.5.3.
3.5.4.
3.5.5.
Introduction
Security .............................................................................................................................................3-12
Maintainability ..................................................................................................................................3-12
Portability .........................................................................................................................................3-12
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
1.
Introduction
Introduction
1.1.
Purpose
This Document will provide the design constraints for the inclusion of the 7700L TX into a Cattron-Theimeg
Inc. product capable of meeting the requirements of FCC part 90, DOD chapter 5.3.2, ETSI 300-220v2.1.1,
this module will be configured by software and cover the frequency ranges of 406.1125MHz to
419.9875MHz. and power ranges 1mW to 250mW.
Modulation schemes supported will be, 2GFSK
This design is to be based on the latest generation Analog Devices ADF7021 High Performance Narrowband
ISM Transceiver IC.
1.2.
Scope
This document is to define the requirements for this TRX to maintain operation within FCC rules and
approved operation, to include.
Transceiver interface.
Supported protocols.
Hardware target size.
Software requirements.
Operating band.
Exi testing and approvals.
1.3.
Definitions, Acronyms, Abbreviations
1.3.1.
Definitions
Anomaly. Anything observed in the documentation or operation of software that deviates from
expectations based on previously verified software products or reference documents. A critical
anomaly is one that must be resolved before the V&V effort proceeds to the next life- cycle phase.
Third Party Testing. The verification testing required to be carried out by an authorized body.
1.3.2.
Acronyms
ETSI European Telecommunication Standards Institute
EN
European Norm (legal obligation)
FCC
Federal Communication Commission
DOD Department of Defense USA
CAT800 Modulation Protocol consisting of 3 distinct states
2GFSK Modulation consisting of two distinct states and Gausian modified rate of change.
2RCFSK Modulation consisting of two distinct states and Raised Cosine modified rate of change
URM Universal Radio Module
EPH
Current generation of CTI encoder design.
Exi
Intrinsically safe approvals.
SDD
Software Design description
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev. 2
SRS
SVVP
SVVR
V&V
EMC
SRD
1.3.3.
Introduction
system Requirements Specification
Software Verification and Validation Plan
Software Verification and Validation Report
Verification and Validation
Electromagnetic Compatibility
Short Range Device
Abbreviations
none
1.4.
References
1.
2.
3.
4.
5.
6.
1.5.
EN300-220v2.1.1
FCC/DOD5.3.5.2 Emission Mask
ADF7021 Preliminary Technical Datasheet 7700 Agile attachment
Drawing current EPH encoder 84C-0149 7700 Agile attachment
RF2155 Programmable Gain Power Amp 7700 Data sheet Agile attachment.
EN301-489 EMC Short Range Devices ( SRD’s)
Overview
1.5.1.
Notation Conventions
Throughout this document, functionality may be listed using the following syntactical conventions:
The use of “shall” implies a requirement that must be implemented.
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2.
Specific Requirements
Overall Description
2.1.
Product Perspective
This Radio module version is constrained to 406.1125-419.9875MHz, 0dBm to 24dBm, GFSK modulation
and 30% maximum duty cycle.
The Radio modules is to achieve full interchangeability between product model lines, maintaining mechanical
and software interfaces as well as physical dimensions is a general objective.
2.1.1.
User Interfaces
All interface between this module and the User will be software controlled by the product hosting this
module. Features such as Frequency, Power and Modulation are all controlled by the Host device.
2.1.2.
Hardware Interfaces
This product will have two hardware interfaces, these are the RF Port and a 50 pin I/O connector
carrying the microcontroller interface and power lines.
The 50 pin interface will have a
4 wire serial interface, consisting of Clock in, Data out, Data in and Load.
Power: Vbat, 3V3 synth and E2Prom 3-5V
I2C interface to store personality.
Power control interface consisting of 2 wire power set and one wire PA amp on
Data I/O 1 wire out 1 wire in
Chip enable 1 wire.
2.1.3.
Software Interfaces
This module will require the configuration of 15 Data Registers by the operating firmware that set the
operating parameters.
The AE system will provide the operational parameters to the operating firmware.
Frequency,
Power,
Tx/Rx Mode.
2.2.
Product Functions
The Product shall have the capacity to hold a permanent configuration file
The Product shall be software configurable
The Operating frequency shall be Programmable
The Modulation scheme shall be programmable
The Modulation Deviation shall be programmable
The Transmit Power shall be programmable
The Transmit Power envelope Ramp rate shall be Programmable on both the rising and falling edges.
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2.3.
Specific Requirements
User Characteristics
Operators: Require no knowledge of this part, all configuration is taken care of in the engineered product.
Technicians: The programming of this device is effected by the connected encoder, the encoder can choose to
program the device according to it’s own programming or it can take the configuration table from the eeprom
on the radio module.
Therefore the radio module may be independently programmed with the register table, or programmed by the
controller housing it.
2.4.
Constraints
This subsection describes any items that limit the developer’s options. These include:
FCC Part 90 rules
ETSI EN300-220v2.1.1 (or later)
EN301-489
DOD Chapter 5.3.2 rules
Exi limitations imposed on individual components, e.g. maximum capacitance or inductance.
Interconnectivity compatibility with URM physical interface.
Interconnectivity compatibility with URM programming interface.
Physical size for interchangeability with Unity products and current Cattron Toggle and Paddle.
RF Connector type MMCX
Limitation of Human body exposure.
2.5.
Assumptions and Dependencies
It is assumed that this device may need to be revised if any of the constraint’s change.
It is also assumed that the requirements of narrow banding will ultimately force the use of 3GFSK or
4GFSK and a consequential upgrade in decoder receiver technology.
Any actual changes will require further FCC submissions for approvals.
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev.
3.
Specific Requirements
Specific Requirements
3.1.
External Interface Requirements
3.1.1.
Interfaces
3.1.1.1
50 Pin Header I/O.
PIN Label
Description
1,2
3,4
5-14
15
Switched Battery voltage to RF Deck, 5V5 min – 16V max.
RFVBAT
GND
N/C
SWD
16-19 N/C
20
DATCLK
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35-37
38
39
40
41
42
43
44-50
ENA
GND
PAON
PLE
TRDAT
TXD
3V3
3V3/5V
N/C
PCLK
PDI
PDO
RXD1
MUX
N/U
SDA
SCL
N/U
G8
N/U
G16
N/U
Cattron-Theimeg Inc.
O/P, Sync Word Detect, asserts High, (may be programmed Low), when a
specific data frame is received. May be used to lock to talkback message on
CAT800.
I/O, Clock,
When in RX mode leading edge is synchronous with RX Data,
When in TX mode data is latched in on leading edge.
IF in UART mode used to output TX Data.
I/P, Enable RF deck when High.
I/P, RF Power ON and switch to TX mode when High.
I/P, Load Enable, Control Data is latched into registers when High
Data I/O when synchronous, RX data OUT when asynchronous.
TX in when asynchronous (Fit R35)
Regulated input for synthesizer.
Regulated input for E2PROM
I/P, Control Register Clock, data clocked on rising edge.
I/P, Control Register data read in.
O/P, Control Register data read out, MSB first.
May be used to output Received Data (Fit R35).
O/P, TRX status, multi use.
TRX E2PROM
TRX E2PROM
I/P, PA +8dB Gain, assert High
I/P, PA +16dB Gain, assert High
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3.1.1.2
Specific Requirements
RF Antenna Port
MMCX type connector.
3.1.2.
Software Interface Requirements
Software requirements are generally as required to implement the interface indicated above, more
specifically
The RXD and TXD lines will need to have a direct microprocessor interface with baud rates able to cope
with the maximum communication rate, a variable dependant on operating mode, this version is limited
to 4,000baud.
Power Amplifier control consisting of PWR LSB, PWR MSB and PA-ON may be implemented through
a latch, (further power control is available through the Synthesizer control registers.)
Standby will power down the RF device and can be implemented through a latch.
The I2C interface has no specific speed requirements but security of data transferred shall be verified.
3.2.
System Features
3.2.1.
EEPROM
Onboard EEPROM for storing one or more defined RF Personalities.
3.2.1.1.
EEPROM Functional Requirements
I2C Bus
Memory Size 8KB
CRC Data Protection HD>6
3.2.1.2.
EEPROM Repository
The EEPROM on this module may be configured to hold a personality database of the registers
required for the synthesizer programming as well as various yet to be defined configuration data,
such information may include
Power, including a gain calibration value.
Frequency , or a table of Frequencies
Skip frequency table
Data Format.
3.2.2.
Programmable Output Power
Synthesizer output power is programmable by internal register 2. between, OFF, -16dBm and
+13dBm.
Power Amplifier gain control is also programmable by setting the two gain bits for gains in 8dB
steps between, 0dB and +24dB.
Care needs to be taken to ensure maximum dynamic range from the synthesizer is maintained to
control switching transients when power ramping is implemented, the Gain settings of the final
amplifier are set to ensure no more than 3dB of signal drive compression from the ADF7021.
PA Ramp rate is set to 64 codes/bit. For 4KB and 32codes/bit for 2KB.
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406.1125-419.9875MHz GFSK version (7700L)
Document p/n: 9S01-7700-A301, rev.
3.2.3.
Specific Requirements
Software Configurable
All aspects of Synthesizer operation are software configurable, both in Transmit and Receive
modes, refer to the ADF7021 data sheet for full and up to date details.
3.2.4.
Low Cost VCO
In this version the VCO is internal to the synthesizer and operating at twice the output frequency.
3.3.
Performance Requirements
3.3.1.
Frequency Range
406.1125MHz to 419.9875MHz
3.3.2.
Switching range
Switching range to be >= + - 200kHz
3.3.3.
Alignment Ranges
406.1125MHz to 419.9875MHz
3.3.4.
Power
Programmable from 0dBm to 24dBm
3.3.5.
Frequency Error and Drift
Under Extreme conditions
Portable -20C to +55C and simultaneous 1.3Vnom and 0.85Vnom.
Fixed equipment mains powered -20C to +55C and simultaneous +-10% Vac
Better than 1ppm
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406.1125-419.9875MHz GFSK version (7700L)
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3.3.6.
Specific Requirements
Adjacent and co channel power
With test modulation representative of normal operational modulation (baud rate and deviation)
shall fall within the limits defined in USA DOD Chapter 5.3.5.2 Emissions mask
Where P is measured power, Pz is Carrier power un-modulated, Fc is Centre frequency, Ft = Test
frequency.
P(dBc)=Pz for Ft from Fc to Fc + - 2.5kHz where Pz=carrier power when un-
modulated.
P for Ft =Fc+ - 2.5kHz to Fc + - 12.5kHz, P(dBc)= -7*(Fd-2.5)
P= the lesser of -50dBm or -70dBc for Ft>= Fc+ - 12.5kHz
Emission Mask
0.00
10
15
20
25
30
-10.00
-20.00
dBm given Pz
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
Displacement from Cf
DOD Chap 5.3.5.2
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Document p/n: 9S01-7700-A301, rev.
3.3.7.
Specific Requirements
Transient Emissions
Carried out with the transmitter operating both normally, i.e. keying and modulating with normal
data and in test modulation modes. To meet the requirements of ETSI 300-220v2.1.1 (or later)
Alternate channel (2nd channel away) -40dBc without the need to exceed -27dBm.
4X and 10X Channel -50dBc without the need to exceed -36dBm.
FCC Part 90.214 Transient frequency behavior.
Emission Mask including TE while keying
for 300-220
0.00
50
100
150
200
-10.00
-20.00
dBm given Pz
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
Displacement from Cf
DOD Chap 5.3.5.2
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3.3.8.
Specific Requirements
Modulation
The unit shall be capable of the following modulation schemes, adjustable by programming.
2GFSK.
Programmable deviation.
NB: Maximum Bandwidth 8K50F1D
3.3.9.
Keying
The module shall be capable of continuously keying between a transmitting and low power
mode. On Off time will depend on many factors but typically would be a 10% or less duty cycle,
maximum duty cycle at full power must be <=30%, this imposes the requirement for the VCO to
lock in <=5mS
3.4.
Design Constraints
3.4.1.
Standards Compliance
EN300-220 v2.1.1 or later @10mW, (normal keyed modulation applies)
EN301-489-3 EMC Immunity Short Range Devices
FCC Part 90 @ 250mW, (normal keyed modulation applies)
DOD 5.3.5.2 @ 250mW, (normal keyed modulation applies)
EN61000-6-2:2001 EMC Immunity
SARS Human body exposure limits.
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3.4.2.
Specific Requirements
Mechanical Dimensions
7700H TRX outline
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3.4.3.
Specific Requirements
Power Requirements
There are three power sources required for operation
VBat : 5V-16Vdc @500mA
The module power consumption will vary with output power.
Maximum requirements for Vbat used to supply the PA will be 500mA at 27dB. during transmit.
Maximum duty cycle will be <30%, typically <10% with a consequential overall reduction in
average power.
3V3: 3V+- 10% @ 100mA
3V3 EEPROM : 3V+-10% @ 100mA
3.4.4.
Software Requirements
3.4.4.1.
Overall Timing TX Mode
The control of the ENA, PA-ON, G8 and G16 lines need to be sequenced to comply with the
following general sequence. Before progressing to the next state it must be verified by read back
that the prior stage is complete, i.e. Regulator ready, VCO ready, etc, otherwise use the following
timings.
Note that due to digital filtering latency it is necessary to maintain RF ON and DATA CLK for a
number of clock cycles after completion of data loading, typically this latency will not exceed 5
clock cycles, failure to do this may result in early termination of tx data.
Overall Timing diagram
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Specific Requirements
3.4.4.2.
Register Program Sequence TX Mode
After CE low, Wait for MUX input to indicate regulator ready (default)
Wait for 3mS for all to settle
Note TCXO frequency is 14.31818MHz.
1. Program Register 0 and register 1
2.
4.
5.
10
11
Program Registers 2
2.7 PA OFF=0
Program Register 1,
Program Register 3
Program Register 0,
Set PA_ON = 1 switches on PA, & Ant SW to TX, Wait 5mS
Program Register 2,
2.7 PA enable = 1 SWITCH ON PA
2.6-2.4 Modulation scheme = 001 or 101
Output Data
Program Registers 2
2.7 PA OFF=0
Continue clocking data 0 for 6 cycles.
Set PA_ON = 0 switches off PA, & Ant SW to RX,
Take CE low powers down RF deck
** product of Modulation rate and deviation must not exceed 8K5 / 2
3.4.5.
RF Exposure Requirements
Compliance with SAR RF Exposure restrictions require the integrated radio to maintain specific
characteristics, these are
The antenna used must have a maximum gain of +2dBi.
The Antenna must also maintain a distance of greater than 3 inches from the body when worn by the
equipment user. (Ensured by the body harness used.)
The Mean radiated power must remain below 320mW, (equivalent to 60% duty cycle, 3dBd gain
antenna and 250mW output power setting); Given that the maximum power is 250mW, the antenna is
+2dBi and the maximum duty cycle is actually 30%, this is a very safe factor of safety.
3.5.
System Attributes
3.5.1.
Reliability
All design aspect of this module shall be maintained within Agile along with all supporting
documentation and data sheets for future reference.
Maintenance of, Manufacturing, Re-design, Approvals and Testing and continuous improvement shall
fall within the requirements of the quality control system.
3.5.2.
Availability
P.O.S.T and ongoing system checks should be employed to check system availability and continued
stability.
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3.5.3.
Specific Requirements
Security
The data within the onboard EEPROM, personality array shall be protected by a CRC with a HD>=6
3.5.4.
Maintainability
As most aspects of this module are software configurable, little maintenance is likely to be needed,
Tuning is minimized
Specific configuration data may be stored within the Personality EEPROM.
Adjustments are minimal, and likely to be limited to TCXO and RX Helical adjustment. and in the case
of a Power amplifier equipped version Helical Filter tuning.
3.5.5.
Portability
It is envisaged that all Radio modules will be transferable between different encoders and decoders.
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