Cypress Semiconductor CY5671 CY5671 PRoC BLE Module User Manual Manual part 2

Cypress Semiconductor CY5671 PRoC BLE Module Manual part 2

Contents

Manual part 2

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Document ID2483356
Application IDrHSIAruVL7c/geHB6Unoqg==
Document DescriptionManual part 2
Short Term ConfidentialNo
Permanent ConfidentialNo
SupercedeNo
Document TypeUser Manual
Display FormatAdobe Acrobat PDF - pdf
Filesize389.27kB (4865927 bits)
Date Submitted2014-12-23 00:00:00
Date Available2015-01-01 00:00:00
Creation Date2014-12-24 07:44:02
Producing SoftwareAcrobat Distiller 10.1.13 (Windows)
Document Lastmod2014-12-24 07:44:57
Document TitleCY8CKIT-042-BLE Bluetooth Low Energy Pioneer Kit Guide
Document CreatorFrameMaker 10.0.2
Document Author: ROIT

Hardware
5.2
BLE Module Board
5.2.1
PSoC 4 BLE or PRoC BLE
The PRoC BLE or PSoC 4 BLE is the main component on the BLE Module. It provides the RF
interface and analog and digital capability. The PRoC BLE or PSoC 4 BLE pins are mapped to the
Bluetooth module headers (see Figure 5-20). For more information, refer to the BLE web page.
Figure 5-20. Schematics and Board Highlight of Bluetooth Module Headers for BLE Pins
P1.2
P1.0
P0.5
P0.3
P0.1
VDDA
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
VCCD
VREF
P2.7
P2.6
12
14
16
18
20
P6.0
P6.1
/XRES
P4.0
P4.1
P5.0
P5.1
50 Ohm Wiggle Antenna
J4
C14
C13
1.2 pF
1.5 pF
L1
6.8nH
No Load
10
11
12
13
14
EPAD
VCCD
VSSA
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
VDDA
VREF
P2.7
P2.6
U1
VDDD
XTAL32O/P6.0
XTAL32I/P6.1
XRES
P4.0
P4.1
P5.0
CY8C4247LQI-BL483
P5.1
VSSD
VDDR
GANT1
ANT
GANT2
VDDR
VDDR
XTAL24I
XTAL24O
VDDR
P0.0
P0.1
P0.2
P0.3
VDDD
P0.4
P0.5
P0.6
P0.7
P1.0
VDDD
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
ER 10x2
al Pins
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
VDDA
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
VDDA
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
15
XTAL24I 16
XTAL24O 17
18
19
P0.0
20
P0.1
21
P0.2
22
P0.3
23
24
P0.4
25
P0.5
26
P0.6
27
P0.7
28
P1.0
VDDR
VDDD
PCA: 121-60159-01
PCB: 600-60195-01
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Hardware
5.2.2
Bluetooth Module Headers (20-Pin and 24-Pin Headers)
The PSoC 4 BLE and PRoC BLE Modules connect to the Pioneer board using the two (20-pin and
24-pin) Bluetooth module headers (Figure 5-21). All GPIOs and power domains are brought out to
these headers. These headers are the counterparts of the connectors in section 5.1.4.
Figure 5-21. Schematics and Board Highlight of Headers
VDDA
J1
VDDR
TP2
RED
P3.6
P3.4
P3.2
P3.0
P4.0
P4.1
P2.6
P2.4
P2.2
P2.0
11
13
15
17
19
21
23
10
12
14
16
18
20
22
24
TP3
RED
P3.7
P3.5
P3.3
P3.1
P5.1
P5.0
P2.7
P2.5
P2.3
P2.1
HEADER 12x2
Analog Pins
VDDD
J2
TP1
VREF
RED
P1.6
P1.7
P1.5
P1.3
P1.4
P1.1
P0.4
P0.2
P0.0
11
13
15
17
19
TP4
RED
10
12
14
16
18
20
TP5
BLACK
/XRES
P0.7
P0.6
P1.2
P1.0
P0.5
P0.3
P0.1
HEADER 10x2
Digital Pins
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Hardware
5.2.3
Wiggle Antenna
Both the modules use the wiggle antenna. Refer to the Antenna Design Guide (AN91445) for details.
Figure 5-22. Board Highlight of Wiggle Antenna
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Hardware
5.2.4
Antenna Matching Network
An Antenna Matching Network is required between the BLE device and the antenna to achieve optimum performance (Figure 5-23). The matching network has four main tasks:
■
Transform the balanced output of the radio to an unbalanced connection to the antenna (balun).
■
Transform the output impedance of the radio to a 50-ohm antenna.
■
Suppress harmonics to a level below the regulations level in TX mode.
■
Suppress the local oscillator (LO) leakage in RX mode.
Figure 5-23. Schematics and Board Highlight of Antenna Matching Network and Antenna
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Hardware
5.2.5
BLE Passives
Module boards include a 24-MHz crystal and a 32-kHz crystal, the CMOD and shield (CTANK) circuit
for CapSense, a SAR bypass capacitor, and adequate decoupling capacitors for all the power
domains, as shown in Figure 5-24.
Figure 5-24. Schematics and Board Highlight of External Crystal, CMOD, CTANK, Decaps, Jumpers
VDDR
C1
0402
0.1 uF
C2
0603
C3
1.0 uF 0402 0.1 uF
C4
0603
C5
C6
1.0 uF 0402 0.1 uF
0603
C7
VDDD
0.1 uF
0603
1.0 uF
VREF
C9
0402
C8
1.0 uF 0402 0.1 uF
C10
0603
C11
1.0 uF 0402 0.1 uF
C12
0603
C15
1.0 uF
0603
VDDA
1.0 uF
SAR bypass
VCCD
C16
C17
C18
C20
1.0 uF
C19
VDDD
0805
R1
0603
0402
0.1 uF
0603
1.0 uF 0402 0.1 uF
0603
1.0 uF
Zero Ohm
No Load
0805
No Load
R2
Zero Ohm
Shunt
Resistor
P4.0
P4.1
C21
2200 pF
C22
10000 pF
C_Tank
CMOD
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Hardware
5.2.6
Test Points
All power domains are brought out as test points for easy probing.
5.3
BLE Dongle Board
See PSoC 4 BLE or PRoC BLE on page 106.
See Wiggle Antenna on page 108.
See Antenna Matching Network on page 109.
See Pioneer Board LEDs on page 101.
See Push Buttons on page 102.
Figure 5-25. Board Highlight
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Hardware
5.3.1
Power System
The board is powered directly using 5 V from the USB port, as shown in Figure 5-26.
Figure 5-26. Power Supply Block Diagram With Protection Circuits
Headers
USB
5V
PRoC
USB
5V
PTC
5V
PSoC5LP
ESD
P rotection
5.3.1.1
Protection Circuits
The PTC resettable fuse is connected to protect the computer's USB ports from shorts and overcurrent.
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Hardware
5.3.2
USB Type A Plug
The PSoC 5LP connects to the USB port of a PC through a USB type A plug (Figure 5-27). This plug
can also be used to power the board. A resettable polyfuse is used to protect the computer's USB
ports from shorts and overcurrent. If more than 500 mA is applied to the USB port, the fuse will automatically break the connection until the short or overload is removed. The VBUS, D+, and D– lines
from the USB connector are also protected against ESD events using TVS diodes.
Figure 5-27. Schematics and Board Highlight of USB Type A Plug
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Hardware
5.3.3
User LED
A user LED is provided to indicate status from the PRoC BLE device (Figure 5-28). It is also used to
show the bind status.
Figure 5-28. Schematics and Board Highlight of User LED
R7
LED1
BLE_STATUS
0805
0805
820 ohm
Status LED Blue
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6.
Advanced Topics
This chapter describes advanced features of the BLE Pioneer kit as well as the corresponding
projects. It can be used as reference to exploit these features for other applications, according to
project requirements.
6.1
Using PSoC 5LP as USB-UART Bridge
The PSoC 5LP serves as a USB-UART bridge, which can communicate with the COM terminal
software. This section explains how to create a PSoC 4 BLE code example to communicate with the
COM terminal software.
Users who have a Windows operating system that does not have HyperTerminal can use an
alternative terminal software such as PuTTY.
1. Create a new PSoC 4 BLE project in PSoC Creator, as shown in Figure 6-1. Select an
appropriate location for your project and rename the project as required.
Figure 6-1. Create New Project in PSoC Creator
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2. Drag and drop a UART (SCB) component (Figure 6-2) to the TopDesign.
Figure 6-2. UART Component in Component Catalog
3. To configure the UART, double-click or right-click the UART component and select Configure, as
shown in Figure 6-3.
Figure 6-3. Open UART Configuration Window
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4. Change the instance name to UART. Configure the UART as shown in Figure 6-4, Figure 6-5,
and Figure 6-6. Click OK.
Figure 6-4. UART Configuration Tab Window
Figure 6-5. UART Basic Tab Window
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Figure 6-6. UART Advanced Tab Window
5. Select P1[4] for UART RX and P1[5] for UART TX in the Pins tab of .cydwr, as
shown in Figure 6-7.
Figure 6-7. Pin Selection
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6. Place the following code in your main.c project file. The code will echo any UART data received.
int main()
uint8 ch;
/* Start SCB UART TX+RX operation */
UART_Start();
/* Transmit String through UART TX Line */
UART_UartPutString("CY8CKIT-042-BLE USB-UART");
for(;;)
/* Get received character or zero if nothing has been received yet
*/
ch = UART_UartGetChar();
if(0u != ch)
/* Send the data through UART. This function is blocking and waits until
there is an entry into the TX FIFO. */
UART_UartPutChar(ch);
7. Build the project by clicking Build > Build {Project Name} or [Shift][F6]. After the project is built
without errors and warnings, program (by choosing Debug > Program) the project to PSoC 4
BLE/PRoC BLE through the PSoC 5LP USB programmer or MiniProg3.
Note: UART RX and UART TX can be routed to any digital pin on PSoC 4 BLE/PRoC BLE based
on the configuration of the UART component. An SCB implementation of UART will route the RX
and TX pins to one of the following subsets: (P0[0], P0[1] or P0[4], P0[5] or P1[4], P1[5] or P3[0],
P3[1] or P3[4], P3[5] or P5[0], P5[1]).
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Advanced Topics
To communicate with the PSoC 4 from the terminal software, follow this procedure:
1. Connect USB mini-B to J13. The kit enumerates as a KitProg USB-UART and is available in the
Device Manager, Ports (COM & LPT). A communication port is assigned to the
KitProg USB-UART, as shown in Figure 6-8.
Figure 6-8. KitProg USB-UART in Device Manager
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Advanced Topics
2. Open HyperTerminal and choose File > New Connection and enter a name for the new
connection and click OK, as shown in Figure 6-9. For PuTTY, double-click the PuTTY icon and
select Serial under Connection.
Figure 6-9. Open New Connection
HyperTerminal
PuTTY
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3. A new window opens, where the communication port can be selected.
In HyperTerminal, select COMx (or the specific communication port that is assigned to the KitProg USB-UART) in Connect using and click OK, as shown in Figure 6-10. In PuTTY enter the
COMx in Serial line to connect to. This code example uses COM12.
Figure 6-10. Select Communication Port
HyperTerminal
PuTTY
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4. In HyperTerminal, select Bits per second, Data bits, Parity, Stop bits, and Flow control under
Port Settings and click OK, as shown in Figure 6-11. Make sure that the settings are identical to
the UART settings configured for the BLE device.
In PuTTY select Speed (baud), Data bits, Stop bits, Parity and Flow control under Configure
the serial line. Click Session and select Serial under Connection type. Serial line shows the
communication port (COM12) and Speed shows the baud rate selected. Click Open to start the
communication.
Figure 6-11. Configure the Communication Port
HyperTerminal
PuTTY
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5. Enable Echo typed characters locally in File > Properties > Settings > ASCII Setup, to
display the typed characters on HyperTerminal, as shown in Figure 6-12. In PuTTY, select Force
on in Terminal > Line discipline options to display the typed characters on PuTTY, as shown in
Figure 6-13.
Figure 6-12. Enable Echo of Typed Characters in HyperTerminal
Figure 6-13. Enabling Echo of Typed Characters in PuTTY
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6. The COM terminal software displays both the typed data and the echoed data from the PSoC 4
BLE or PRoC BLE UART, as shown in Figure 6-14 and Figure 6-15.
Figure 6-14. Data Displayed on HyperTerminal
Figure 6-15. Data Displayed on PuTTY
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Advanced Topics
6.2
Using PSoC 5LP as USB-I2C Bridge
The PSoC 5LP serves as a USB-I2C bridge that can be used to communicate with the USB-I2C
software running on the PC. The following steps describe how to use the USB-I2C bridge, which can
communicate between the BCP and the PSoC 4 BLE/PRoC BLE.
1. Create a new project targeting the PSoC 4 BLE/PRoC BLE device in PSoC Creator, as shown in
Figure 6-16.
Figure 6-16. Create New Project in PSoC Creator
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Advanced Topics
2. Drag and drop an I2C component (Figure 6-17) to the TopDesign.
Figure 6-17. I2C Component in Component Catalog
3. To configure the I2C component, double-click or right-click the I2C component and select Configure, as shown in Figure 6-18.
Figure 6-18. Open I2C Configuration Window
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4. Change the instance name to I2C. Configure the I2C component according to the settings in
Figure 6-19 and Figure 6-20 and click OK.
Figure 6-19. Configuration Tab
Figure 6-20. I2C Basic and Advanced Tabs
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5. Select pin P3[5] for the I2C SCL and pin P3[4] for the I2C SDA in the Pins tab of
.cydwr, as shown in Figure 6-21.
Figure 6-21. Pin Selection_USBI2C
6. Place the following code in your main.c project file. The code will enable the PSoC 4 BLE/PRoC
BLE device to transmit and receive I2C data to and from the BCP application.
int main()
uint8 wrBuf[10];
/* I2C write buffer */
uint8 rdBuf[10];
uint8 indexCntr;
uint32 byteCnt;
/* I2C read buffer */
/* Enable the Global Interrupt */
CyGlobalIntEnable;
/* Start I2C Slave operation */
I2C_Start();
/* Initialize write buffer */
I2C_I2CSlaveInitWriteBuf((uint8 *) wrBuf, 10);
/* Initialize read buffer */
I2C_I2CSlaveInitReadBuf((uint8 *) rdBuf, 10);
for(;;) /* Loop forever */
/* Wait for I2C master to complete a write */
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if(0u != (I2C_I2CSlaveStatus() & I2C_I2C_SSTAT_WR_CMPLT))
/* Read the number of bytes transferred */
byteCnt = I2C_I2CSlaveGetWriteBufSize();
/* Clear the write status bits*/
I2C_I2CSlaveClearWriteStatus();
/* Move the data written by the master to the read buffer so that the
master can read back the data */
for(indexCntr = 0; indexCntr < byteCnt; indexCntr++)
rdBuf [indexCntr] = wrBuf[indexCntr]; /* Loop back the data to the read
buffer */
/* Clear the write buffer pointer so that the next write operation will
start from index 0 */
I2C_I2CSlaveClearWriteBuf();
/* Clear the read buffer pointer so that the next read operations starts
from index 0 */
I2C_I2CSlaveClearReadBuf();
/* If the master has read the data , reset the read buffer pointer to 0
and clear the read status */
if(0u != (I2C_I2CSlaveStatus() & I2C_I2C_SSTAT_RD_CMPLT))
/* Clear the read buffer pointer so that the next read operations starts
from index 0 */
I2C_I2CSlaveClearReadBuf();
/* Clear the read status bits */
I2C_I2CSlaveClearReadStatus();
7. Build the project by choosing Build > Build Project or [Shift] [F6]. After the project is built
without errors and warnings, program ([Ctrl] [F5]) this code onto the PSoC 4 BLE/PRoC BLE
through the PSoC 5LP programmer or MiniProg3.
8. Open the BCP from Start > All Programs > Cypress > Bridge Control Panel .
9. Connect to KitProg/ under Connected I2C/SPI/RX8 Ports, as shown in Figure 6-22.
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Figure 6-22. Connecting to KitProg/ in BCP
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10.Open Protocol Configuration from the Tools menu and select the appropriate I2C Speed, as
shown in Figure 6-23. Make sure the I2C speed is the same as the one configured in the I2C
component. Click OK to close the window.
Figure 6-23. Opening Protocol Configuration Window in BCP
11. From the BCP, transfer five bytes of data to the I2C device with slave address 0x08. Type the
command shown in Figure 6-24 and press [Enter] or click the Send button in the BCP. The log
shows whether the transaction was successful. A '+' indication after each byte indicates that the
transaction was successful and a '–' indicates that the transaction was a failure.
Figure 6-24. Entering Commands in BCP
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12.From the BCP, read five bytes of data from the I2C slave device with slave address 0x08. The log
shows whether the transaction was successful, as shown in Figure 6-25.
Figure 6-25. Read Data Bytes from BCP
Note: Refer to Help Contents under Help in BCP or press [F1] for details of I2C commands.
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6.3
Developing Applications for PSoC 5LP
The BLE Pioneer kit has an onboard PSoC 5LP whose primary function is that of a programmer and
a bridge. You can build either a normal project or a bootloadable project using the PSoC 5LP.
The PSoC 5LP connections in the Pioneer board are summarized in Figure 6-26. J8 is the I/O
connector. The USB (J13) is connected and used as the PC interface. However, you can still use this
USB connection to create customized USB designs.
Figure 6-26. PSoC 5LP Connections on BLE Pioneer Kit
The programming header (J7) is meant for standalone programming. This header needs to be
populated. See the 'No Load Components' section in Bill of Materials (BOM) on page 184.
6.3.1
Building a Bootloadable Project for PSoC 5LP
All bootloadable applications developed for the PSoC 5LP should be based on the bootloader hex
file, which is programmed onto the kit.
The hex files are included in the following kit installer directory:
\CY8CKIT-042-BLE Kit\\Firmware\Programmer\
KitProg_Bootloader
Figure 6-27. KitProg Bootloader Hex File Location
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To build a bootloadable application for the PSoC 5LP, follow this procedure:
1. In PSoC Creator, choose New > Project > PSoC 5LP, click the expand button adjacent to
Advanced, select Launch Device Selector to bring up the Select Device Window and select
the Device as CY8C5868LTI-LP039, as shown in Figure 6-28. Select the Application Type as
Bootloadable from the drop-down list and click OK.
Figure 6-28. Create New Project in PSoC Creator_PSoC 5LP
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Advanced Topics
Figure 6-29. Select Device in PSoC Creator
2. Navigate to the Schematic view and drag and drop a Bootloadable component (Figure 6-30) on
the TopDesign.
Figure 6-30. Bootloadable Component in Component Catalog
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To configure the Bootloadable, double-click or right-click the Bootloadable component and select
Configure. In the General tab, enable the check box for Manual application image placement and
set the Placement address to ‘0x00002800’.
Figure 6-31. Configuration Window of Bootloadable Component in “General” Tab Setting
Set the dependency of the Bootloadable component by selecting the Dependencies tab in the
configuration window and clicking the Browse button, as shown in Figure 6-32. Select the
KitProg_Bootloader.hex (Figure 6-33) and KitProg_Bootloader.elf files (Figure 6-34); click Open.
Figure 6-32. Configuration Window of Bootloadable Component in the Dependencies Tab
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Figure 6-33. Select KitProg Bootloader Hex File
Figure 6-34. Select KitProg Bootloader Elf File
3. Develop your custom project.
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4. Make sure that the NVL setting of the Bootloadable project and the KitProg_Bootloader project is
the same. Figure 6-35 shows the KitProg_Bootloader.cydwr system settings.
Figure 6-35. KitProg Bootloader System Settings
5. Build the project in PSoC Creator by choosing Build > Build Project or [Shift] [F6].
6. To download the project onto the PSoC 5LP device, open the Bootloader Host tool, which is
available in PSoC Creator. Choose Tools > Bootloader Host, as shown in Figure 6-36.
Figure 6-36. Open Bootloader Host Tool in PSoC Creator
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7. In the Bootloader Host tool, click Filters and add a filter to identify the USB device. Ensure that
the check box for Show USB Devices is enabled. Set VID as 0x04B4, PID as 0xF13B, and click
OK, as shown in Figure 6-37.
Figure 6-37. Port Filters Tab in Bootloader Host Tool
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8. In the Bootloader Host tool, click the Open File button (Figure 6-38) to browse to the location of
the bootloadable file (*.cyacd), as shown in Figure 6-38.
Figure 6-38. Open Bootloadable File in Bootloader Host Tool
Figure 6-39. Select Bootloadable .cyacd File in Bootloader Host
9. Keep the reset switch (SW1) pressed and plug in the USB mini-B connector. If the switch is
pressed for more than 100 ms, the PSoC 5LP enters into bootloader. Click the Program button
(Figure 6-38) in the Bootloader Host tool to program the device.
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10.If bootload is successful, the log of the tool displays “Programming Finished Successfully”;
otherwise, it displays “Failed” and a reason for the failure.
Notes:
■
The PSoC 5LP pins are brought to the PSoC 5LP GPIO header (J8). These pins are selected to
support high-performance analog and digital projects. See PSoC 5LP GPIO Header (J8) on
page 97 for pin information.
■
Take care when allocating the PSoC 5LP pins for custom applications. For example, P2[0]–P2[4]
are dedicated for programming the PSoC 4 BLE/PRoC BLE. See Schematics on page 168
before allocating the pins.
■
When a custom project is programmed onto the PSoC 5LP, the initial capability of the PSoC 5LP
to act as a programmer, USB-UART bridge, or USB-I2C bridge in not available.
■
The status LED does not function unless used by the custom project.
For additional information on bootloaders, refer to Cypress application note, AN73503 - USB HID
Bootloader for PSoC 3 and PSoC 5LP.
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6.3.2
Building a Normal Project for PSoC 5LP
A normal project is a completely new project created for the PSoC 5LP device on the CY8CKIT-042.
Here the entire flash of the PSoC 5LP is programmed, overwriting all bootloader and programming
code. To recover the programmer, reprogram the PSoC 5LP device with the factory-set KitProg.hex
file, which is shipped with the kit installer.
The KitProg.hex file is available at the following location:
\CY8CKIT-042-BLE Kit\\Firmware\
Programmer\KitProg
This advanced functionality requires a MiniProg3 programmer, which is not included with this kit. The
MiniProg3 can be purchased from www.cypress.com/go/CY8CKIT-002.
To build a normal project for the PSoC 5LP, follow these steps:
1. In PSoC Creator, choose New > Project > PSoC 5LP, click the expand button adjacent to
Advanced, select Device as CY8C5868LTI-LP039, and select Application Type as Normal
from the drop-down list, as shown in Figure 6-40.
Figure 6-40. Create New Project in PSoC Creator_PSoC 5LP
2. Develop your custom project.
3. Build the project in PSoC Creator by choosing Build > Build Project or pressing [Shift] [F6].
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4. Connect the 10-pin connector of MiniProg3 to the onboard 10-pin SWD debug and programming
header J7 (which needs to be populated).
5. To program the PSoC 5LP with PSoC Creator, choose Debug > Program or press [Ctrl] [F5]. If
the Programming window appears and shows MiniProg3 and the selected device in the project
under it (CY8C5868LTI-LP039); click on the device and click Connect to program.
Notes:
6.4
■
The 10-pin SWD debug and programming header (J7) is not populated. See the 'No Load
Components' section of A.3 Bill of Materials (BOM) for details.
■
The PSoC 5LP pins are brought to the PSoC 5LP GPIO header (J8). These pins are selected to
support high-performance analog and digital projects. See PSoC 5LP GPIO Header (J8) on
page 97 for pin information.
■
Take care when allocating the PSoC 5LP pins for custom applications. For example, P2[0]–P2[4]
are dedicated for programming the PSoC 4. Refer to A.1 Schematics before allocating the pins.
■
When a normal project is programmed onto the PSoC 5LP, the initial capability of the PSoC 5LP
to act as a programmer, USB-UART bridge, or USB-I2C bridge is not available.
■
The status LED does not function unless it is used by the custom project.
PSoC 5LP Factory Program Restore Instructions
The BLE Pioneer Kit features a PSoC 5LP device that comes factory-programmed as the onboard
programmer and debugger for the PSoC 4 BLE/PRoC BLE device.
In addition to creating applications for the BLE device, you can also create custom applications for
the PSoC 5LP device on this kit. For details, see section Developing Applications for PSoC 5LP on
page 134. Reprogramming or bootloading the PSoC 5LP device with a new flash image will
overwrite the factory program and forfeit the ability to use the PSoC 5LP device as a programmer/
debugger for the BLE device. Follow the instructions to restore the factory program on the PSoC
5LP and enable the programmer/debugger functionality.
6.4.1
PSoC 5LP is Programmed with a Bootloadable Application
If the PSoC 5LP is programmed with a bootloadable application, restore the factory program by
using one of the following two methods.
6.4.1.1
Restore PSoC 5LP Factory Program Using PSoC Programmer
1. Launch PSoC Programmer 3.21.1 or later from Start > Cypress > PSoC Programmer.
2. Configure the BLE Pioneer Kit in service mode. To do this, while holding down the reset button
(SW1 Reset), plug in the BLE Pioneer Kit to the computer using the included USB cable (USB A
to mini-B). This puts the PSoC 5LP into service mode, which is indicated by the blinking green
status LED.
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3. The following message appears in the PSoC Programmer Results window, as shown in
Figure 6-41: “KitProg Bootloader device is detected”.
Figure 6-41. PSoC Programmer Results Window
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4. Switch to the Utilities tab in PSoC Programmer and press the Upgrade Firmware button, as
shown in Figure 6-42. Unplug all other PSoC programmers (such as MiniProg3 and DVKProg)
from the PC before pressing the Upgrade Firmware button.
Figure 6-42. Upgrade Firmware
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5. After programming has completed, the following message appears, as shown in Figure 6-43:
“Firmware Update Finished at 

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