1973_Fairchild_Linear_Integrated_Circuits_Data_Catalog 1973 Fairchild Linear Integrated Circuits Data Catalog

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FAIRCHILD SEMICONDUCTOR

.

,

THE LINEAR INTEGRATED CIRCUITS DATA CATALOG

••

Each Product
Section Contains The
Following Categories
Organized By Function
Index
Selection Guide
Data Sheets
Glossary

The Linear Integrated Circuits Data Catalog
Since its founding ,in 1957, Fairchild has grown
from the original group of eight scientist/engineers to a worldwide industry leader. Large modern plants in Mountain View
and San Rafael, California; Shiprock, New Mexico; and South
Portland, Maine are complemented by off-shore facilities in
Australia, Germany, Hong Kong, Korea, Mexico and Singapore.
Total Linear Capability is a reality at Fairchild
Analog Products. Fairchild is the largest and most experienced
manufacturer of linear devices in the world and takes pride in
its ability to design and mass produce linear products which
meet the needs ofa large and diverse industry. Over the years,
Fairchild's unique combination of design talent and production
expertise has resulted in the most comprehensive line of linear
microcircuits ever assembled.
This advanced line of products is backed by years
of production experience - experience which enables Fairchild
to maintain the position of leadership it has enjoyed since the
delivery of the first order for fJA709 operational amplifiers in
the early 1960s.
The tremendous possibilities inherent in silicon
Planar* technology are still not exhausted and forward-thinking
research continues at Fairchild. This type of research made
possible the industry's first linear integrated circuit, the first
consumer-oriented linear device, the first "universal" operational amplifier, and the first monolithic voltage regulator.
Fairchild's advanced technological capability and
vast production experience combined make possible the most
advanced, most reliable, and lowest cost line of linear integrated circuits in the industry today. The fact that the name
"Fairchild" has always been synonymous with quality, reliability, and leadership is no mere coincidence, and the fact that
Fairchild will remain in this position is not just a promise, but
a pledge to Total Linear Capability.

Fairchild Semiconductor
464 Ellis Street
Mountain View, California 94040

FAIRCHIL..C
SEMICONDUCTOR

*Planar is a patented Fairchild process.

OESCR IPTION

DEVICES

p.A702

Wideband DC Ampl ifier

p.A703
p.A704
p.A705
p.A706
p.A709
p.A710
p.A711
p.A715

RF-IF Amplifier

p.A720
p.A722

PAGE
3-9
7-9

Television Sound System

7-96

Dual Channel Power Audio Amplifier
5 Watt Audio Amplifier
High Performance Operational Ampl ifier
High Speed Differential Comparator

7-96
7-11

Dual Comparator
High Speed Operational Ampl ifier

3-16
4-5
4-9
3-23
7-16
6-9
5-7

p.A725
p.A726

AM Radio System
10-Bit Current Source
Precision Voltage Regulator
Instrumentation Operational Amplifier
Temperature-Controlled Differential Pair

· 3-30
8-3
.3-39

p.A723

p.A727

Temperature-Controlled Differential Preamplifier

p.A728

Precision Voltage Reference

p.A730
p.A732

Differential Amplifier
FM Stereo Multiplex Decoder

· 3-43
· 7-21

p.A733

Differential Video Amplifier

· 6-12

p.A734

Precision Voltage Comparator

· 4-13

p.A739

Dual Low Noise Audio Preamplifier

· 7-24

p.A740
p.A741

FET Input Operational Amplifier
Frequency Compensated Operational Amplifier

5-44

· 3-49
· 3-53
.3-60

p.A741A

Frequency Compensated Operational Amplifier

p.A741 E

Frequency Compensated Operational Amplifier

.3-60

p.A742
p.A746

Zero Crossing AC Trigger-Trigac
Chroma Demodulator

p.A747
p.A747A
p.A747E
p.A748
p.A749
p.A750
p.A753
p.A757
p.A758

Dual Frequency Compensated Operational Amplifier
Dual Frequency Compensated Operational Amplifier
Dual Frequency Compensated Operational Amplifier
High P,erformance Operational Ampl ifier
Dual Audio Preamplifier
Dual Comparator Subsystem
FM Gain Block
Gain Controlled IF Ampl ifier
Phase Locked Loop FM Stereo Multiplex Decoder
High Speed Differential Comparator

· 7-28
· 7-32
.3-65

p.A760
p.A767
p.A768
p.A769
p.A771
IJA772
p.A776
p.A777

FM Stereo Multiplex Decoder
FM Stereo Multiplex Decoder

· 3-72
· 3-72
· 3-77
.1-36
.4-20
· 7-44
· 7-47
· 7-53
.4-24
· 7-57
· 7-21
· 7-57
3-138

FM Stereo Multiplex Decoder
Instrumentation Amplifier
High S'lew Rate Operational Amplifier

3-138

Multi-Purpose Programmable Operational Amplifier
Precision Operational Amplifier

.3-84

2-3

· 3-93

•

DEVICE

DESCRIPTION

PAGE

IlA780

Chroma Subcarrier Regenerator (Phase Locked Loop)

· 7-60

IlA781
IlA786
IlA791
IlA796
IlA7350
MA7351
MA7805
MA7806
MA7808
MA7812
MA7815
MA7818
MA7824
MA78M05
MA78M06
'MA78M08
MA78M12
MA78M15
MA78M20
MA78M24
MA78NOO
MA78TOO
SHOO13

Gain Controlled I F Amplifier
PAL TV Chroma Demodulator

.7-66

SH2001
SH2002
SH2200
SH3002
SH8090
TBA510
TBA920
TBA970
8T13
8T14
8T23
8T24
101
lOlA
102
104
105
107
108
108A

Power Operational Ampl ifier
Double-Balanced Modulator/Demodulator
Tachometer Subsystem
Triple Operational Amplifier
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Positive Voltage Regulator
Three Terminal Negative Voltage Regulators
Tracking Voltage Regulators
Two-Phase MOS Clock Driver
High Voltage, High Current Driver
DTL High Power Driver
High Voltage, High Current Driver
SPDT Analog Switch
10-Bit D/A Converter
Chroma Processing Circu it
Horizontal Oscillator, Phase Comparator and Sync Separator
Television Video Amplifier
Dual Single-Ended Line Driver
Triple Line Receiver
Dual Single-Ended Line Driver
Triple Line Receiver
General Purpose Operational Amplifier
General Purpose Operational Amplifier
Voltage Follwer
Negative Voltage Regulator
Voltage Regulator
General Purpose Operational Amplifier
Super Beta Operational Amplifier
Super Beta Operational Ampl ifier

2-4

· 7-71
3-100
· 7-74
· 7-97
· 7-97
· 5-14
· 5-14
· 5-14
· 5-14
· 5-14
· 5-14
· 5-14
· 5-45
.5-45
.5-45
.5-45
· 5-45
.5-45
· 5-45
· 5-51
.5-44
6-126
6-131
6-135
6-139
.8-22
6-143
· 7-98
· 7-99
· 7-99
6-114
6-117
6-120
6-123
3-106
3-109
3-127
· 5-25
· 5-30
3-116
3-121
3-121

OEseR IPTION

DEVICE

109
110
111
201
201A
207
208
208A
209
301A
302
304
305
305A
307
308
308A
309
310
311
376
1326
1458

Five Volt Regulator

· 5-36
3-127

Voltage Follower
Voltage Comparator
General Purpose Operational Amplifier
General Purpose Operational Ampl ifier
General Purpose Operational Ampl ifier
Super Beta Operational Amplifier
Super Beta Operational Amplifier
Five Volt Regulator
General Purpose Operational Amplifier
Voltage Follower

PAGE

.

.

.

.

Negative Voltage Regulator
Voltage Regu lator
Voltage Regulator
General Purpose Operational Amplifier
Super Beta Operational Amplifier
Super Beta Operational Amplifier
Five Volt Regulator
Voltage Follower
Voltage Comparator
Voltage Regulator
Chroma Demodu lator
Internally Compensated, High Performance Dual Monolithic

· 4-29
3-106
3-109
3-116
3-121
3-121
· 5-36
3-109
3-127
· 5-25
· 5-30
· 5-30
3-116
3-121
3-121
· 3-36
3-127
.4-29
.5-30
7-100
3-132

Operational Ampl ifier

1458C

Internally Compensated, High Performance Dual Monolithic

3-132

Operational Amplifier

1558

Internally Compensated, High Performance Dual Monolithic

2136
3018
3018A
3019
3026
3036
3039
3045
3046
3054
3064
3065
3066
3067
3075
3076
3086

FM IF Amplifier & Detector

3-132

Operational Amplifier

7-101
8-6
8-6
8-6
8-6
8-6
8-6
8-6
8-6
8-6

Transistor Array
Transistor Array
Diode Array
Transistor Array
Transistor Array
Diode Array
Transistor Array
Transistor Array
Transistor Array
TV Automatic Fine Tuning Circuit

FM I F Amplifier-Limiter, Detector, Audio Preamplifier
FM Gain Block

· 7-78
· 7-82
· 7-85
· 7-89
· 7-92
7-101

Transistor Array

·

TV Sound System
TV Chroma Processor
Chroma Demodulator

2-5

8-6

•

DESCRIPTION

DEVICE

PAGE
· 6-87

9368

Two Channel Core Memory Sense Amplifier
Two Channel Core Memory Sense Amplifier
Seven Segment Decoder
Seven Segment Decoder/Driver
Seven Segment Decoder/Driver
Seven Segment Decoder/Driver/Latch

9369
9370
9614

Seven Segment Decoder/Driver/Latch
Seven Segment Decoder/Driver/Latch
Dual Differential Line Driver

· 6-21

7524
7525
9307
9317B
9317C

· 6-87
· 6-18
· 6-19
· 6-19
.6-20
· 6-22
· 6-23

9615

Dual Differential Line Receiver

· 6-27

9616

Triple E IA RS-232-C/M I L-STD-188C Line Driver

9617

Triple EIA RS-232-C Line Receiver

· 6-31
.6-34

9620
9621

Dual Differential Line Receiver
Dual Line Driver

9622

Dual Line Receiver

· 6-36
· 6-42
.6-48

9624

Dual TTL, MOS I nterface Element

.6-52

9625
9627
9650

Dual TTL, MOS I nterface Element
Dual EIA RS-232-C/MIL-STD-188C Line Receiver
4-Bit Current Source

· 6-52
· 6-57
.6-60

9660
9661
9662

Seven Segment Decoder/Programmable Current Driver

6-146

Quad Programmable Current Segment Driver
LED/Lamp Digit Driver

6-146
6-147

LED/Lamp Digit Driver

6-147

Dual Line Receiver
Dual Line Receiver
Dual Line Driver
Dual Line Driver
Memory Driver

.6-69

Dual Line Receiver
Dual Line Receiver
Dual Line Driver

.6-69

75110
75325

Dual Line Driver
Memory Driver

· 6-75

75450A

5 V Dual Peripheral Driver

· 6-79
· 6-91

75451A
75452

5 V Dual Peripheral Driver
5 V Dual Peripheral Driver

· 6-91
· 6-91

9663
55107A
55108A
55109
55110
55325
75107A
75108A
75109

.6-69
.6-75
.6-75
.6-79
· 6-69
· 6-75

75453

5 V Dual Peripheral Driver

· 6-91

75454

5 V Dual Peripheral Driver

· 6-91

75460A
75461A

5 V Dual Peripheral Driver
5 V Dual Peripheral Driver

· 6-91
· 6-91

75462A

5 V Dual Peripheral Driver

· 6-91

75463A

5 V Dual Peripheral Driver

· 6-91

75464A
75491

5 V Dual Peripheral Driver
MOS to LED Segment and Digit Driver

75492

MOS to LED Segment and Djgit Driver

· 6-91
6-110
6-110

Fairchild cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in a Fairchild product.
No other circuit patent licenses are implied.

2-6

INDEX
Selection Guide ............................................. 3-4
DATA SHEETS
General Purpose
IJA702
Wideband DC Amplifier ............................ 3-9
jJA709
High Performance Operational Amplifier ........... 3-16
jJA730
Differential Amplifier ............................. 3-43
jJA739
Dual Low Noise Audio Preamplifier ................ 7-24
IJA741
Frequency Compensated Operational Amplifier ..... 3-53
IJA741 A
Frequency Compensated Operational Amplifier ..... 3-60
jJA741 E
Frequency Compensated Operational Amplifier ..... 3-60
IJA747
Dual Frequency Compensated Operational
Amplifier ........................................ 3-65
Dual Frequency Compensated Operational
IJA747A
Amplifier ........................................ 3-72
Dual Frequency Compensated Operational
IJA747E
Amplifier ........................................ 3-72
High Performance Operational Amplifier ........... 3-77
IJA748
Dual Audio Preamplifier .......................... 7-36
IJA749
Multi-Purpose· Programmable Operational
IJA776
Amplifier ........................................ 3-84
jJA777
Precision Operational Amplifier ................... 3-93
101
General Purpose Operational Amplifier ........... 3-106
101A
General Purpose Operational Amplifier ........... 3-109
102
Voltage Fo"ower ................................ 3-1 27
107
General Purpose Operational Amplifier ........... 3-116
110
Voltage Fo"ower ................................ 3-127
201
General Purpose Operational Amplifier ........... 3-106
201A
General Purpose Operational Amplifier ........... 3-109
207
General Purpose Operational Amplifier ........... 3-116
301A
General Purpose Operational Amplifier ........... 3-109
302
Voltage Fo"ower ................................ 3-1 27
General Purpose Operational Amplifier ........... 3-116
307
310
Voltage Fo"ower ................................ 3-127
1458
Interna"y Compensated, High Performance Dual
Monolithic Operational Amplifier ................. 3-132
1458C
Interna"y Compensated, High Performance Dual
Monolithic Operational Amplifier ................. 3-132
1558
Interna"y Compensated, High Performance Dual
Monolithic Operational Amplifier ................. 3-132
Low Input
IJA725
JJA727
jJA740
IJA771

Current/Low Drift
Instrumentation Operational Amplifier ............. 3~30
Temperature-Contro"ed Differential Preamplifier ... 3-39
FET Input Operational Amplifier ................... 3-49
Instrumentation Amplifier ........................ 3-138

3-2

~A776

~A777

108
108A
208
208A
308
308A

Multi-Purpose Programmable Operational
Amplifier ........................................ 3-84
Precision Operational Amplifier ................... 3-93
Super Beta Operational Amplifier ................ 3-121
Super Beta Operational Amplifier ................ 3-121
Super Beta Operational Amplifier ................ 3-121
Super Beta Operational Amplifier ................ 3-121
Super Beta Operational Amplifier ................ 3-121
Super Beta Operational Amplifier ................ 3-121

High Speed
~A715
High Speed Operational Amplifier ................. 3-23
~A772
High Slew Rate Operational Amplifier ............ 3-138
~A776
Multi-Purpose Programmable Operational
Amplifier ........................................ 3-84
Precision Operational Amplifier ................... 3-93
~A777
Voltage Follower ................................ 3-127
110
Voltage Follower ................................ 3-127
310
Low Power
JJA776
Multi-Purpose Programmable Operational
Amplifier ........................................ 3-84
High Current/Power
JJA791
Power Operational Amplifier ..................... 3-100
Products to be Announced ............................... 3-137
Glossary ................................................. 3-139

INTRODUCTION

With the development of the ~A 709 in 1967,
Fairchild pioneered the development of monolithic
operational amplifiers and has remained the industry
leader. The JJA 709 industry standard was followed
by such other standards as the JJA741 internally compensated amplifier, the JJA740 FET input operational
amplifier, the JJA715 high speed operational amplifier,
the JJA725 high gain, low noise operational amplifier
and the JJA791 power operational amplifier.
Today the Fairchild line of operational amplifiers covers every conceivable requirement from low
drift to high slew rate and from low noise to high
input impedance. Whatever the application, there is
a Fairchild operational amplifier designed to perform
it - precisely, economically and reliably.

3-3

•

SELECTION GUIDE FOR COMMERCIAL OPERATIONAL AMPLIFIERS

GENERAL PURPOSE
TAILORED RESPONSE
I1A702*

I1A709

I1A739

DC
Wide
Band

I1A748

I1A749

Dual
Low
Noise

I1A777

201

201A

301A

Dual

Input Offset Voltage

Max (mV)

5.0

7.5

6.0

6.0

6.0

7.5

7.5

2.0

7.5

I npLit Offset Current

Max (nA)

2000

500

1000

200

500

50

200

10

50

Input Bias Current

Max (nA)

7500

1500

2000

500

1000

250

500

75

250

Voltage Gain

Min (V/mV)

2.0

15

6.5

20

15

25

20

25

25

Operating Supply Voltage Range

Min (V)

+6.0, -3.0

±9.0

±4.0

±5.0

±4.0

±5.0

±5.0

±5.0

±5.0

Max (V)

+14, -7.0

±18

±18

±18

±18

±20

±20

±20

±20

Unity Gain Bandwidth

Typ (MHz)

30

1.0

10

1.0

10

1.0

1.0

1.0

1.0

Slew Rate

Typ (V Ills)

3.5

0.3

1.0

0.5

1.5

0.5

0.5

0.5

0.5

ACL =-1

3.5

0.3

2.5

6.0

2.5

6.0

6.0

6.0

6.0

ACL = 10

5.0

3.0

8.0

2.0

8.0

2.0

2.0

2.0

2.0

ACL = 1

,

Max (V)

+1.5, -6.0

±10

±15

±15

±15

±15

±15

±15

±15

Differential Input Voltage

Max (V)

±5.0

±5.0

±5.0

±30

±5.0

±30

±30

±30

±30

I nput Offset Voltage Drift

Typ (I1VtC)

10

10

4.0

7.0

3.0

3.0

7.0

3.0

6.0

X
X

X
X

X
X

X
X

I nput Voltage Range

Offset Adjust

X
X

Output Short "Circuit Protection
Compensated

X

Dual

X

SELECTION GUIDE FOR MILITARY OPERATIONAL AMPLIFIERS

GENERAL PURPOSE
TAILORED RESPONSE
11702*

I1A709A

I1A709

I1A748

DC
Wide
Band

I1A749

I1A777

101

101A

2.0

5.0

2.0

Dual

Input Of set Voltage

Max (mV)

2.0

5.0

5.0

3.0

I nput Offset Current

Max (nA)

500

50

200

200

400

10

200

10

Input Bias Current

Max (nA)

5000

200

500

500

750

75

500

75

2.0

Voltage Gain

Min (V/mV)

25

25

50

25

50

50

50

Operating Supply Voltage Range

Min (V)

+6.0, -3.0

±9.0

±9.0

±5.0

±4.0

±5.0

±5.0

±5.0

Max (V)

+14, -7.0

±18

±18

±22

±18

±20

±20

±20

Unity Gain Bandwidth

Typ (MHz)

30

5.0

5.0

1.0

10

1.0

1.0

1.0

Slew Rate

Typ (V Ills)

3.5

0.3

0.3

0.5

1.5

0.5

0.5

0.5

ACL =-1

3.5

0.3

0.3

6.0

2.5

6.0

6.0

6.0

ACL = 10

5.0

3.0

3.0

2.0

8.0

2.0

2.0

2.0

ACL = 1

2.5

Max (V)

+1.5, -6.0

±10

±10

±15

±15

±15

±15

±15

Differential Input Voltage

Max (V)

±5.0

±5.0

±5.0

±30

±5.0

±30

±30

±30

I nput Offset Voltage Drift

Typ (I1V;oC)

10

1.8

3.0

7.0

3.0

3.0

3.0

3.0

X
X

X
X

Input Voltage Range

Max (I1VtC)

15

Offset Adjust

X
X

X
X

Output Short Circuit Protection
Compensated

X

Dual
*Vs = +12, -6.0 V
Vs = ±15 V, T A = 25°C unless otherwise specified

3-4

15

HIGH
POWER

GENERAL PURPOSE

LOW
POWER

COMPENSATED
307

310
Voltage
Follower

7.5
50
250
25

J-lA741
Industry
Standard

J-lA776

J-lA747

Programable
ISET=15J-lA

Dual
Industry
Standard

J-lA741E
High
Performance

1458
Dual

J-lA791

J-lA776

1 Amp

150 J-lW
Programable
ISET = 1.5 J-lA

6.0

3.0

6.0

6.0

6.0

6.0

6.0

-

200

30

25

200

200

200

6.0

7.0

500

80

50

500

500

500

10

20

50

50

20

20

20

50

7.5

.999x10- 3

±5.0

±5.0

±5.0

±5.0

±1.2

±5.0

±5.0

±5.0

±1.2

±18

±18

±18

±22

±18

±18

±18

±18

±18

1.0

20

1.0

1.0

1.0

1.0

1.0

0.2

0.2

0.5

30

0.5

0.7

0.7

0.5

0.5

0.5

0.1

0.5

-

0.5

0.7

0.7

0.5

0.5

1.0

0.1

0.5

0.7

0.7

0.5

0.5

6.0

0.1

±15

±15

±15

±15

±15

±15

±15

±30

±30

±30

±30

±30

±30

±30

7.0

15

3.0

X

X

0.5
±15
±30

±10
-

6.0

10

7.0

3.0

3.0

7.0

X

X

X

X

X

X

X

X
X

X
X

X
X

X

X
X

X
X

X

X

X

X

GENERAL PURPOSE

X

X
X

HIGH
POWER

LOW
POWER

COMPENSATED
107

2.0
10
75
50

110

J-lA741

Voltage
Follower

Industry
Standard

4.0
-

3.0

.999x10- 3

J-lA741 A
High
Performance

J-lA776

J-lA747

1558

J-lA791

J-lA776

Programable
ISET = 15 J-lA

Dual
Industry
Standard

Dual

1 Amp

150J-lW
Programable
ISET =1.5 J-lA

3.0

5.0

5.0

5.0

5.0

5.0

30

15

200

200

200

3.0

500

80

50

500

500

500

7.5

50

50

50

50

50

50

50

5.0
200

±5.0

±5.0

±5.0

±5.0

± 1.2

±5.0

±5.0

±5.0

±1.2

±20

±18

±22

±22

±18

±22

±22

±22

±18

1.0

20

1.0

1.0

1.0

1.0

1.0

0.2

0.2

0.5

30

0.5

0.6

0.7

0.5

0.5

0.5

0.1

0.5

0.6

0.7

0.5

0.5

1.0

0.1

0.5
0.5
±15
±30
3.0

-

±10
-

6.0

0.5

0.6

0.7

0.5

0.5

6.0

0.1

±15

±15

±15

±15

±15

±15

±15

±30

±30

±30

±30

±30

±30

±30

7.0

5.0

3.0

7.0

7.0

10

3.0

X

X

15

15

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

3-5

•

SELECTION GUIDE FOR COMMERCIAL OPERATIONAL AMPLIFIERS

HIGH ACCURACY INSTRUMENTATION
LOW BIAS CURRENT
FET

SUPER BETA

BIPOLAR

J,LA740

J,LA776

High ZIN
10 12 n
High Slew
Rate

Low Power
ISET = 1.5 J,LA

J,LA777

208

308

208A

308A

0.5

I nput Offset Voltage

Max (mV)

100

6.0

7.5

2.0

7.5

0.5

Input Offset Current

Max (nA)

0.3

6.0

50

0.2

1.0

0.2

1.0

Input Bias Current

Max (nA)

2.0

10

250

2.0

7.0

2.0

7.0

Voltage Gain

Min (V/mV)

25

50

25

50

15

80

80

Operating Supply Voltage Range

Min (V)

±5.0

±1.2

±5.0

±5.0

±5.0

±5.0

±5.0

Max (V)

±22

±18

±20

±20

±18

±20

±20

Unity Gain Bandwidth

Typ (MHz)

3.0

0.2

1.0

1.0

1.0

1.0

1.0

Slew Rate

Typ (V/J,Ls)

6.0

0.1

0.5

0.3

0.3

0.3

0.3

ACL =-1

6.0

0.1

6.0

0.6

0.6

0.6

0.6

ACL = 10

6.0

0.1

2.0

-

-

-

-

Max (V)

±15

±15

±15

±15

±15

±15

±15

Differential Input Voltage

Max (V)

±30

±30

±30

±0.5

±0.5

±0.5

±0.5

I nput Offset Voltage Drift

Typ (J,LV/oC)

20

3.0

3.0

3.0

6.0

1.0

1.0

Max (J,LV/oC)

-

-

-

15

30

5.0

5.0

X

X

X

X

ACL = 1

Input Voltage Range

Offset Adjust

X

X

X

Output Short Circuit Protection

X

X

X

Compensated

X

X

SELECTION GUIDE FOR MILITARY OPERATIONAL AMPLIFIERS

HIGH ACCURACY INSTRUMENTATION
LOW BIAS CURRENT
FET

BIPOLAR
J,LA776

J,LA740
High ZIN
10 12 n
High Slew
Rate

SUPER BETA
J,LA777

108

108A

Low Power
ISET = 1.5 J,LA

Input Offset Voltage

Max (mV)

20

5.0

2.0

2.0

0.5

I nput Offset Current

Max (nA)

0.15

3.0

10

0.2

0.2

0.2

7.5

75

2.0

2.0

50

50

50

50

80

I nput Bias Current

Max (nA)

Voltage Gain

Min (V/mV)

Operating Supply Voltage Range

Min (V)

±5.0

± 1.2

±5.0

±5.0

±5.0

Max (V)

±22

± 18

±20

±20

±20

Unity Gain Bandwidth

Typ (MHz)

3.0

0.2

1.0

1.0

1.0

Slew Rate

Typ (V/J,Ls)

6.0

0.1

0.5

0.3

0.3

ACL =-1

6.0

0.1

6.0

0.6

0.6

ACL = 10

6.0

0.1

2.0

-

Max (V)

±15

±15

±15

±15

±15

Differential Input Voltage

Max (V)

±30

±30

±30

±0.5

±0.5

I nput Offset Voltage Drift

Typ (J,LV/oC)

20

3.0

3.0

3.0

1.0

Max (J,LV/oC)

-

-

15

15

5.0

X

X

ACL = 1

Input Voltage Range

Offset Adjust

X

X

X

Output Short Circuit Protection

X

X

X

Compensated

X

X

3-6

-

HIGH ACCURACY INSTRUMENTATION

HIGH SPEED

LOW DRIFT
OPAMPS

PREAMPS

JlA725C JlA725E JlA741E 20BA 30BA

JlA727

JlA726
Ie

= 10 JlA
Temp.
o to +85°e

JlA715

JlA74B

ILA776

JlA777

FeedProgramable
Forward ISET = 500 JlA

Temp.
-20 to +85°e

301A

FeedFeedForward Forward

2.5

0.5

3.0

0.5

0.5

3.0

10

7.5

6.0

6.0

7.5

7.5

35

5.0

30

100

1.0

100

25

250

200

6.0

50

50

125

75

80

300

7.0

300

75

1500

500

10

250

250

-

-

310
Voltage
Follower
7.5

7.0
.999x10- 3

250

1000

50

20

50

25

25

±3.0

±5.0

±5.0

±5.0

±5.0

0.06
±9.0

10

±3.0

±6.0

±5.0

±1.2

±5.0

±5.0

±5.0

±22

±22

±22

±18

±20

±18

±18

±18

±18

±18

±20

±20

±18

1.0

1.0

1.0

1.0

1.0

20

1.0

65

1.0

1.2

1.0

1.0

20

-

-

0.6

0.3

0.3

-

18

0.5

15

0.5

0.5

30

-

-

0.6

0.6

0.6

100

6.0

15

6.0

15

-

0.6

-

-

-

-

-

38

2.0

15

2.0

5.0

80

-

±22

±22

±15

±15

±15

±30

±10

±15

± 15

±15

±15

±15

±22

±22

±30

±0.5

±0.5

±5.0

±15

±15

±30

±30

±30

±30

-

0.5

0.5

4.0

1.0

1.0

0.2

0.6

6.0

7.0

3.0

3.0

6.0

10

5.0

2.0

15

5.0

5.0

1.0

1.5

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

±15

X

HIGH ACCURACY INSTRUMENTATION

HIGH SPEED

LOW DRIFT
OPAMPS
JlA725

JlA725A

PREAMPS

JlA741 A

10BA

JlA726

Ie

JlA727

JlA715

= 10 JlA

JlA74B

JlA776

JlA777

lOlA

FeedForward

Programable
ISET = 500 JlA

FeedForward

FeedForward

110
Voltage
Follower

1.0

0.5

3.0

0.5

2.5

10

5.0

5.0

5.0

2.0

2.0

20

5.0

30

0.2

50

15

250

200

3.0

10

10

-

100

75

80

2.0

150

40

750

500

7.5

75

75

3.0

1000

1000

50

80

-

0.06

15

50

50

50

50

.999x10- 3

±3.0

±3.0

±5.0

±5.0

±9.0

±6.0

±5.0

± 1.2

±5.0

±5.0

±5.0

±22

±22

±22

±20

±18

±18

±18

±22

±18

±20

±20

±18

1.0

1.0

1.0

1.0

20

1.0

65

1.0

1.2

1.0

1.0

20

-

-

0.6

0.3

-

18

0.5

15

0.5

0.5

30

0.6

0.6

-

100

6.0

15

6.0

6.0

-

0.6

-

-

-

38

2.0

15

2.0

2.0

-

±22

±22

±15

±15

±30

±10

±15

±15

±15

±15

±15

±15

±22

±22

±30

±0.5

±5.0

±15

±15

±30

±30

±30

±30

-

0.5

0.5

3.0

1.0

0.2

0.6

6.0

7.0

3.0

3.0

3.0

6.0

5.0

1.0

1.5

X

X
X

X

X
X

X

X

X

X

5.0

2.0

15

X

X

X

X

X

X
X

X
X

X

4.0

15

X

X

3-7

X

•

IJA702
WIDEBAND DC AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUIT

GENERAL DESCRIPTION - The J.LA 702 is a monolithic DC Amplifier constructed using the Fairchild
Planar* epitaxial process. It is intended for use as an operational amplifier in analog computers, as a
prevision instrumentation amplifier, or in other applications requiring a feedback amplifier useful from
dc to 30 MHz.

CONNECTION DIAGRAMS
a-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5B
V+

•
•
•
•

LOW OFFSET VOLTAGE
LOW OFFSET VOLTAGE DRIFT
WIDE BANDWIDTH - 20 MHz TYP.
HIGH SLEW RATE - 5 V/J.,Ls TYP.

INVERTING
INPUT

2
LAG!
LEAD

FREQUENCY
COMPENSATION

V-

NOTE: Pin 4 connected to case.

ABSOLUTE MAXIMUM RATINGS
Voltage Between V+ and V- Terminals
Peak Output Current
Differential I nput Voltage
Input Voltage
Internal Power Dissipation (Note)
Metal Can
DIP
Flatpak
Operating Temperature Range
Military (702)
Commercial (702C)
Storage Temperature Range
Lead Temperature (Soldering, 60 seconds)

21 V
50 mA
±5.0 V
+1.5 V to -6.0 V

ORDER INFORMATION
TYPE
702
702C

14-LEAD DIP
(TOP VIEW)

500mW
670mW
570mW
0

PART NO.
702HM
702HC

PACKAGE OUTLINE 6A
NC

NC

NC

v+

0

_55 C to +125 C
O°C to +70°C
0
0
_65 C to +150 C
300°C

NOTE
0
o
Rating applies to ambi~nt temperature up to 7~oC. Above 70 C ambient derate linearly at 6.3mW/ C
for Metal Can, 8.3mW/ C for DIP and 7.1 mW/ C for the Flatpak.

GND
INVERTING
INPUT
NON-INVERTING
INPUT

OUTPUT
NC
LAG

V-

LEAD

NC

NC

ORDER INFORMATION

EQUIVALENT CIRCUIT
S

TYPE
702
702C

V+

PART NO.
702DM
702DC

10·LEAD FLATPAK
(TOP VIEW)
LEAD) EXTERNAL
FREQUENCY
COMPENSATION

R5

. . - - - - - - [ " Q5

3.4 kil

PACKAGE OUTLINE 3F

1
GROUNDo---+---~---~------4

INVERTING 2
INPUT

..---+--~-o LAG

V+

NC

R7

2.4 kil

GND
......-.....:.....QOUTPUT

NON-INVERTING 3
INPUT o - - - - - - - + - - - - - - . J

INVE~~~~~

NC
;---"'\.!:J

>---=:.c:=-, OUTPUT

INVER~~~ C:::==~-.I

LAG
CaMP
LEAD
CaMP

INPUT
V-

RlO
240il

R12
2_6 kil

ORDER INFORMATION
RS
2.4 kil

Rg

4S0il

Rll
240il

v-

TYPE
702

PART NO.
702FM

Pin numbers are shown for Metal Can only.
·Planar is a patented Fairchild process.

3-9

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A702
702
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage
Input Offset Current
Input Bias Current
Input Resistance
Input Voltage Range
Common Mode Rejection Ratio

Rs ~ 2 kn

Large Signal Voltage Gain
Output Resistance
Supply Current
Power Consumption
Transient Response
(unity-gain)

Risetime
Overshoot

0.5
1S0
2.0
40

16
-4.0
SO
2500

RS ~ 2 kn, f ~ 1 kHz
RL;;a. 100 kn, VOUT = ±5.0 V
RL;;a. 100 kn, VOUT = ±2.5 V

100
3600·

Average Temperature Coefficient
of I nput Offset Current
Input Bias Current
Input Resistance
Common Mode Rejection Ratio

RS

~

2 kn, f

~

kn
+0.5

100
1500
700
3.3
30

900
300
2.1
19

n

25
10

120
50

ns

10
20

30
40

ns

mA
,mW

%

%

3.0

4.0

mV

2.5

10

3.5

15

IlV/oC

2.0
SO
400
1.0
3.0
4.3

10
500
1500
5.0
16
10

3.0
50
2S0
0.7
2.0
2.6

15
500
1500
4.0
13
7.5

IlV/oC
nA
nA
nA/oC
nA/oC

6.0
70

1 kHz

V
dB

6000
600

RS ~ 2 kn
RS = 50 n,
TA = 25°C tOI+125°C
RS - 50 n,
T A = 25° C to -5!:i° C
v
T A = +125 C
v
TA = -55 C
T A = 25° C to+125° C
v
v
TA = 25 C to -55 C
TA = -55°C

mV
nA
IlA

500
6.7
120

Risetime
C3 = 50pF, RL;;a. 100 kn,
Overshoot
VIN = 1 mV
..
The following speCifications apply for -55°C ~ TA ~ +125°C:

I nput Offset Current

22
-1.5
SO

3.0
500
3.5

UNITS

200
5.0
90

Transient Response
(x100 gain)

Average Temperature Coefficient
of Input Offset Voltage

0.7
120
1.2
67

2.0
500
5.0
+0.5

VOUT =0
VOUT =0
CI = 0.01 IlF, RI = 20 n,
RL;;a. 100 kn, VIN = 10 mV
CL ~ 100 pF

Input Offset Voltage

V + = 6.0 V, V _ = -3.0 V
TYP.
MIN.
MAX.

V+= 12.0 V, V_ = -6.0 V
MIN.
TYP.
MAX.

95

IlA

kn

S.O
70

95

dB

V+ = 12 V, V _ = -6 V to
Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
Supply Current
Power Consumption

V+ = 6 V, V~ = -3 V
RS ~ 2 kn
RL;;a. 100 kn, VOUT = ±5.0 V
RL;;a. 100 kn, VOUT = ±2.5 V
RL;;a. 100 kn
RL ;;a. 10 kn
TA = +125°C, VOUT = 0
v
TA = -55 C, VOUT = 0
TA =+125°C, VOUT =0
TA = -55°C, VOUT = 0

75
2000

200

75

200

7000

±5.0
±3.5

±5.3
±4.0
4.4
5.0
SO
90

500
±2.5
±1.5

1750
±2.7
±2.0
1.7
2.1
15
19

6.7
7.5
120
135

3.3
3.9
30
35

TYPICAL PERFORMANCE CURVES FOR 702

VOLTAGE TRANSFER
CHARACTERISTIC

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARACTER ISTIC
3.0 r-;--,.-,--,----,---,-;; j""'--'./'-'------'----'
TA =-WC

4200

I-..

t--l;,l

2.0 1--+--+--+--,---t--fljKf-i"'~'-·TAL-=-12-'--5o---ic

III

!I/

TA=25°C
1.0 1----t--+-+-+--+I-lI!f+---+-~-,-_I

If

.4

_21--+--+--+---HI'-I-/ +-+-+-+-+----1
i

VI

,Ol----t--+-+-+-J~~-+--+--r-l

-1.0 I--+---'-+-+--+H-II+---+-+-+--+---I

II

i1Jj

, RL = lOkI!
-2,0 F--i'-I..,....~+""l:4ff-,

+-+

I=I--:.:R~L~=l~OO~kl!:;...t/:f'II-

-3

-1
INPUT VOLTAGE - mV

v+ = +6V I - -

r

i

3-10

3800

V-=-6V

~

!g.

~

V+=I+.12~ _

~t'--..

""'" "-

3400

~

'\

'"~ 3000

'\

§!

"'\
2600

= 3V I - -

-3'~':-10---'----':-6--'----'::-2:--'---'-'--'--.l-.Jl0
INPUT VOLTAGE -mY

IlVN

2200
-60

I
-20

20

60

TEMPERATURE -OC

100

140

V
V
mA
mA
mW
mW

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA702
702C
ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage
Input Offset Current
Input Bias Current
I nput Resistance
Input Voltage Range
Common Mode Rejection Ratio

RS

Large Signal Voltage Gain
Output Resistance
Supply Current
Power Consumption
Transient Response
(unity gain)
Transient Response
(x100 gain)

0;;;;

V+= 12.0 V, V_
MIN:
TYP.

2kn

Risetime
Overshoot
Risetime
Overshoot

C3 = 50 pF, RL
VIN = 1 mV

The following specifications apply
I nput Offset Voltage
Average Temperature Coefficient
of Input Offset Voltage
Input Offset Current
Average Temperature Coefficiel"!t
of Input Offset Current
Input Bias Current
Input Resistance
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio

Large Signal Voltage Gain
Output Voltage Swing
Supply Current
Power Consumption

10
-4.0
70
2000

RS 0;;;; 2 kn, f 0;;;; 1 kHz
RL ~ 100 kn, VOUT = ±5.0 V
RL ~ 100 kn, VOUT = ±2.5 V
VOUT = 0
VOUT =0
CI = 0.01 p,F, RI = 20 n
RL 0;;;; 100 kn, VIN = 10 mV
CL 0;;;; 100pF
~

1.5
0.5
2.5
32

= -6.0 V
MAX.

, V + = 6.0 V, V _ = -3.0 V
MAX.
MIN.
TYP.

5.0
2.0
7.5

1.7
0.3
1.5
55

16
-1.5
70

+0.5

6.0
2.0
5.0
+0.5

92

6000

200
5.0
90

600
6.7
120

25
10

120
50

ns

10
20

30
40

ns

5.0

6.5
20

1500
800
3.3
30

800
300
2.1
19

500

100 kn,

RS" 2 kn
RS = 50 n,
T A = +70°C to O°C
T A = 25°C to+70"C
T A = 25° C to 10° C
TA =O°C

4.0
6.0
4.0
18
86

6.0
65

RS" 2 kn, f 0;;;; 1 kHz
V + = 12 V, V _ = 6 V to
V+ = 6V,V_=3V
Rs 0;;;; 2 kn
RL ~ 100 kn, VOUT = ±5.0 V
RL ~ 100 kn, VOUT = ±2.5 V
RL ~ 100 kn
RL ~ 10 kn
VOUT = 0
VOUT = 0

%

%

90
1500

7.5
25

7.5

2.5
10
20
12

2.5
8.0
18
8

3.0
5.5
2.7
27
86

9.0
65
300

90

300

2.0

I

6.0
V+ • 12V
v- • -6.0V

o°C-l-+l/Ii.f-/-l--l--l
I

//,l~
,,~ fA; 70°C

_+-+-+--+--+-.~~f
I _

1.0,...

t'=
250C t-A

r-

±5.0
±3.5

±5.3
±4.0
5.0
90

400
±2.5
±1.5

I

7.0
125

....~I TA ' 70°C

2.0

I

V
/I

-1.0 I--+--+-+--+,V/a---+---J---J----jt--l-----I

J

/;:.

3.9
35

I

-2. 0

3600

3400

J

,I

r":
""""f-......

I-- RL • lookQ

-6. 0
-5.0

-3.0

r-.....

'I

3-11

'I'...

3000

/J
,-1.0
1.0
INPUT VOLTAGE - mV

....... ~

'~

3200

II

-4. 0

I

<= 12V _
V =-6.0 V

~oc t--

II

RL"lOkQ

INPUT VOLTAGE - mV

3800

l&l-d:-

4. 0

p,A
nA/oC
nAtC
p,A
kn
dB
p,V/V

1750
±2.7
±2.0
2.1
19

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

ifI·

TA • o°c

mV

p,V/oC

7000

VOLTAGE TRANSFER
CHARACTERISTIC

C,HA~ACTERISTIC
r--~..---r--.--.....-'-""'-......,.-.---.-----.

=

n
mA
mW

for O°C " TAO;;;; +70°C:

VOLTAGE TRANSFER
v+ • 6.0 V f - fA
v- .. -3.0 V

mV
p,A
p,A
kn
V
dB

92
3400

TYPICAL PERFORMANCE CURVES FOR 702C

3.0

UNITS

.......

2800

3.0

5.0

01020

3040
506070
TEMPERATURE - °c

V
V
mA
mW

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.LA702
TYPICAL PERFORMANCE CURVES FOR 702
VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
,SUPPLY VOLTAGES

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGES

3,0

1100

......... 1'-....
1000

TA =25·C

f

200

~

'" "

800

I---"

" "\

700

I--"'"

20

60

I-'" l-

.......
,.......f-'"

100

ILIJ

l-

50

+12

+6

-6

-3

+8

+10

+12

-4

-5

-6

SUPPLY VOLTAGES-Y

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

SUPPLY VOLTAGE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE
100

I

~

1\,

I

1\

~ 90

+l~Y

~

V+ •
V-· -6V

. . . 1'..

""

~

~ 70

'f'......

t--...
f-- V+· +6r;--.
y-. -3V

. . . . r- t--

i~

"""i-- t--t--

o
-20

V f--

Z

!2 80

1,,\

"-

-60

I

RS:52kll

>

I--

-

Ito 100

i--""

+8
+10
-4
-5
SUPPLY VOLTAGES-V

-3

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

j.....-I-"
-l- I-

=>

0.5
+6

140

TEMPERATURE _·C

-

f....- I-

~ 150

I---" V

0..
Z

"
-20

I I

TA=25·C,
2,5

'" "-

900

600
-60

250

V+=+6V
V-'-3V -

20

60

100

140

-20

TEMPERATURE _·C

20

60

100

105

/'
95

1/

1

E

r- ........

f--- V-t-r

LIJ

~ 4

~

1

1

3

~

20

60

100

I
-I

1

1

1

1

-20

r- I--20

60

100

160

TEMPERATURE _·C

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

OUTPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

.1

1

V+'+6V
100

50

/
/

1/V V
I/

10
-60

--

v+· +6V

1
-60

140

l-

TEMPERATURE _·C

200

20

60

f-- V-I' -~v

0::

85

~

v+· +12V

I
IZ

...........

LIJ

30

20

1

1 1

«

~

40

-20

TEMPERATURE _·C

R~:52klll

-

-20

60
50
-60

160

V

POWER SUPPLY CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

90

80
-60

./

V
./

TEMPERATURE _·C

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIEl\JT TEMPERATURE

100

_V

-20

~PL
1/

V
V

/Y+'+12V
V-=-6V

500

V

V

\

1

'\

V

\

300

I

I

f\

400

.;'

~

200

f-

V+ • +6V
........ ~~. -3V

+--

r....... i---

f'..- ~

f..-.

V+=+12V
V-· -6V

100
1

o
20

60

100

-60

140

TEMPERATURE _·C

1

-20

20

60

TEMPERATURE _·C

3-12

100

140

100

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A702
TYPICAL PERFORMANCE CURVES FOR 702C
INPUT BIAS CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGES

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE
900

V~. 6.0~

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY: VOLTAGES

3.0

600

TA • 2S°C

_

TA • 2S°C

V • -3.0V
850

2.5

..........

/V

'"'""' ........ ...... 1'-......

z

~800
~
~

~

"-

700

o

ro

ro

500

/

_V .....

/V":

g 750

650

V

~

~

-~

:::>

"z

""

200

1.0

100
+6
-3

0.5

ro

~

50

..............

..... v ...

~

. . .v . . .

+8
+10
-4
- 5
SUPPLY VOLTAGES -V

+6
-3

TEMPERATURE - °c

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

+12
- 6

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

SUPPLY VOLTAGE REJECTION RATIO
AS A FUNCTION OF
AMBIENT
TEMPERATURE
--

1000

3.5

+12
- 6

+8
+10
-4
- 5
SUPPLY VOLTAGES - V

RS 52.0kQ
3.0 r--.....

""~ ......... !'-..

2.5

% 95
!

V+'12V
V-· -6.0V

. . . hi

..............
2.0

V+= 6.0V
V- = -3.0 V

...............

..............
1.5

J

-- -

r--- I---

I'--

20

30~

I'---.
I

-

200

-r-50~

I-V+' 6.0 V
V-· -3.0V

o

010

70

°c

TEMPERATURE -

/

--f--r--..

.........

1.0

010

V+'12V
V-· -6.0 V

.........

ro

:---r--

----75

30~

TEMPERATURE -

,.,.,

5060

70

~

RS

90

-

:---.

..... ~

ro

10

~

~

TEMPERATURE -

V-r-----r--

3.0 I----t---+-+V+ = 6.0 V -+----+--t
V- = -3.0V
2.0

o

I===t=""""'if---k=-I---+--+---l

V+'12V
4.0 I----t---+V- • - .0 V -+-----1r----r----I

88

86

~

2.0 kQ
5.0

--

~

TEMPERATURE -

POWER SUPPLY CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

94

92

...... ".".....

ro

10

°c

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE
96

o

...........

50

~

1.0

ro

/

t==1===1F=~~I--+--=b_d
L----'---''-----'-_L-----'-_''--~
10
20
~
~
50
~
70

o

°c

TEMPERATURE -

°c

OUTPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE
500

500

I
v+· 6.0V

_

100 f---

10

V-.-~

.....

50

20

v+= 6.0V
v-· -3.0 V

400

200

I-o

--

,..-

10

ro

f..-- f..-~

~

f..-!---

-

i'V+'12V
V- "!-6.ov
~

TEMPERATURE -

50

°c

~

r--- r--

200

l"- t---

I
I
V+· 12V
V-· j.OV

100

~

o

o

ro

10

20

~

~

TEMPERATURE -

3-13

........

50

°c

~

70

..-- ........

50

°c

~

ro

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A702
TYPICAL PERFORMANCE CURVES FOR 702 AND 702C
OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
14

SUPPLY CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGES

12 I-

I10 I-

~
-

R.".

-6Y

.If

:54(1

---

//"
4.0

3.0

/.

Y+=+12Y Y-=-6Y -

V

2.0

1\

/"

V ...

4'

vV'

vV'

lOOk

~6

-3

+8

+10

-4

- 5

- 6

SLEW RATE
AS A FUNCTION OF
CLOSED-LOOP VOLTAGE GAIN
(LEAD-LAG COMPENSATION)
100

TA ' 25°C

1.2
1.0

:>

/

0.2

0.1

V
1

/

"

100 k
1.0 M
FREQUENCY - Hz

10M

OY~R~ r
I 1 90%

0.8

/

\.

1.4

/

!So 2.0

10 k

"

TRANSI ENT RESPONSE

r---,---,-..,...,,---r---r--r-t--r----,

/

_ v-· -6.0Y

0.5

"

50
1.0 k

+12

f--

\

1\

SUPPLY VOLTAGES - V

y+.112V I

~:~.p

~.p

60

1.0

10k

10

~

f--

TAI=t~5~C1k

1.0

"'...

70

.J-

\.0

1\; •

1\

SLEW RATE
AS A FUNCTION OF
CLOSED-LOOP VOLTAGE GAIN
(LAG COMPENSATION)

~

r\~

1\
r-..

80

//"

/

LOAD RESISTANCE - II

-

V

V

/.

100

5.0

90

5.0

~

/
I

k"'"
1/ ~
/

r:P.

C1:-'

/

TA • 25°C

TA • 25°C'

L

+

o ~ .....

100

6.0

I

COMMON MODE REJECTION RATIO
AS A F UNCTION OF
FREQUENCY

101---+-+-+---f---+--f--+-I'-+----i

0.6

5.0 f---+-+-+--l--+--+-+-+-+----l

0.4

/

0.2
V+'12V
2.0 I---+-+-+-f---+--+- V- • -6.0V-

/

II

/

IDy-

l - RISETIME

T ' 25°C
IA

5
10
20
CLOSED - LOO P YOLTAGE GA I N

50

l.0 L..-----L.----L.-L-'----'-_--'--'---''-'----'
1
10
20
50
100
CLOSED-LOOP VOLTAGE GAl N

100

TIME

TRANSIENT RESPONSE TEST CIRCUITS
UNITY-GAIN AMPLI FIER
(LAG COMPENSATION)

X100 AMPLIFIER
(LEAD COMPENSATION)

SERIES RESISTANCE LIMITING*

2kU
5kU

VOUT

OUTPUT RISE-TIME LIMITING*

LOGIC COMPATIBILITY

CL

L..-._-'

* Peak Current Limitin~ with Capacitive Loads.

TO LOGIC + SUPPLY,

Pin numbers are shown for Metal Can only.

3-14

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA702
TYPICAL PER FROMANCE CURVES FOR 702 AND 702C
OUTPUT VOLTAGE SWING
AS A FUNCTION OF
SUPPLY VOLTAGES

INPUT VOLTAGE RANGE
AS A FUNCTION OF
SUPPLY VOLTAGES
12

~OSI~IVE . LI~ITI

5000
TA ' 25°C
4500

~

10

>
z

~

-1
!

-3

'"~C6'4"/v.
~4f/,.

~

6.0

~

4.0

~

i"--

r--. t--....

-4
+6
-3

I--"

~

. . . . r--.

+8
+10
-4
-5
SUPPLY VOLTAGES-V

60

40

20

o~E~-L~op, ~1=0

JII~

I III I

"

C1 =100pF, Rl=2k

80

+10

60

i"r.e.PEN-LOOP

IIII

III

Xi~ IfLOISE~i~?OP

-20
100

50M

10M

lk

1\
10k

lOOk

1M

I'---

C2 = 0

I II
I II

I

I II
I II

I

S'

S'

t

I-

10M

II 1\

l-

I

lk

1'0 \.

'0

10k

~ I~
~

lOOk

I--

...........

'r\

o

~
.:,

~

I-r

~Ml ~t+l

50M

y+= +12V
v-= -6Y _
TA = +25°C

12

....
::>
Il.
....
::>

~.--

I-

",

I

·lM

.

~ 10

co

I-

~

FREQUENCY - Hz

<.!>

l~
-'§- 'S
I-li
~S ~~ ~~
.~
OS
-r

....e">

...... i'

C2 = 1000pF, R2 = 200a

-20
lOOk

10M

z

l-

100

-

OUTPUT VOLTAGE SWING
ASA FUNCTION OF FREQUENCY
WITH LEAD-LAG COMPENSATION

1\

co

o

-

V+= +12V
I--V-= -6V TA = +25°C
C3 = 50pF
I"'---.. Rf = 10kn .

1

14

8.0 I-S'

2.0

I II

~

V+'12V
v-· -6.0V
TA '25°C RL'lookQ

12

- 6

d2=ll~0~ PF,I R2 = ko~a'

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
FREQUENCY FOR VARIOUS
LAG COMPENSATION NETWORKS

4.0 I -

ciPE~~L&OP, ~2 = 0
I II

FREQUENCY - Hz

14

+12

+10

..........

60

20

IIII III

FREQUENCY - Hz

6.0 I -

0=

~

Xl CLOSED-LOOP

"'

+8

-4
- 5
SUPPLY VOLTAGES - V

FREQUENCY RESPONSE FOR
VARIOUS CLOSED-LOOP GAINS
(LEAD-LAG COMPENSATION)

40

llli III

r---..b-,.

10

+6
-3

+12

- 6

Y+=+12V
Y-= -6Y
TA = +25°C
Cl = O.1I'F
Rl = 0

m

I III I

. . . . .V
V

80

JII
III

.......

.......... ~

1M

1500

o
+8

~ =O.01I'F, Rl = 2011

-20
lOOk

I-

1000

-4
' 5
SUPPLY VOLTAGES - V

"\

1111 1

l-

V

,/

I no
Xl00
CLOSED - LOOP ~!\..

Cj= 1000pF, Rj=20011

I III I

'~kQ

vV"

2000

FREQUENCY RESPONSE
WITH CONSERVATIVE
COMPENSATION NETWORK

"~

IIII I

RL

........ v

2.0
+6
-3

+12
-6

I
I I
_ Y+=+12Y
V-=-6Y
TA =+25°C

_

2500

./

500

FREQUENCY RESPONSE FOR
VARIOUS CLOSED-LOOP GAINS
(LAG COMPENSATION)
80

......

...... V .....

. . . . . 1--"

3000

......1....... 1-"'"

...... Vt(

./

I--"

3500

"",........ I--"
./

~ 8.0

4000

,/

RL 'IOOkQ

<:>

-2

VOLTAGE GAIN
AS A F UNCTION OF
SUPPLY VOLTAGES

6

\
1\

4

o

1M

lOOk

FREQUENCY - Hz

10M

1M

100M

FREQUENCY - Hz

FREQUENCY COMPENSATION CIRCUITS
LAG COMPENSATION

LEAD-LAG COMPENSATION'

C3

Pin numbers are shown. for Metal Can only.

3-15

•

pA709
HlGHP-E-RFORMANCE ··OPERATIONAL

AMPllflE~

FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The pA70S is a monolithic High Gain Operational Amplifier constructed using the Fairchild Planar* epitaxial process. It features low offset, high input impedance,
large input common mode range, high output swing under load and low power consumption. The
device displays exceptional temperature stability and will operate over a wide range of supply voltages
with little degradation of performance. The amplifier is intended for use in dc servo systems, high
impedance analog computers, low level instrumentation applications and for the generation of special
linear and nonlinear transfer functions.

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58
INPUT FREO. COMPo

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
I nternal Power Dissipation (Note)
Metal Can
DIP
Flatpak
Differential Input Voltage
Input Voltage
Storage Temperature Range
Metal Can, DIP, and Flatpak
Operating Temperature Range
Military (70SA and 70S)
Commercial (70SC)
Lead Temperature
Metal Can, DIP and Flatpak (Soldering 60 seconds)
Output Short Circuit Duration

±18 V
500 mW
670 mW
570 mW
±5.0 V
±10 V

-55°C to +125°C
O°C to +70°C

5 seconds

V-

NOTE: Pin 4 connected to case

ORDER INFORMATION
TYPE
709A
709
709C

PART NO.
709AHM
709HM
709HC
14-LEAD DIP
(TOP VIEW)

PACKAGE OUTLINE 6A

NOTE

Rating applies to ambient temperature up to 70°C. Above 70°C ambient derate linearly at 6.3mW/oC
for Metal Can, 8.3mW/oC for DIP and 7.1 mW/oC for the Flatpak.
EQUIVALENT CIRCUIT

N.C.

14

N.C.

N.C.
INPUT FREQ. COMPo
INVERT INPUT

INPUT FREQUENCY
COMPENSATION

NON-INVERT INPUT

r---------~--~-------------+------~~--~--------~----~__oV+

V·
N.C.

ORDER INFORMATION
TYPE
709A
709
709C

PART NO.
709ADM
709DM
709DC

R15

30kn

10-LEAD FLATPAK
(TOP VIEW)
OUTPUT

RS

3.6kn
INVERTING
INPUT

10kn
OUTPUT
FREQUENCY
COMPENSATION

RlO
18kn

C>-'------l.

PACKAGE OUTLINE 3F

R9
N.C.
INPUT COMPo

NON-INVERTING INPUT

V-

01

N.C.
INPUTCOMP.

INVERTING INPUT

NON·INVERTING
INPUT

OUTPUT
OUTPUT FREO.
COMPo

ORDER INFORMATION

~----------~~------------~----~-oV-

TYPE
709A
709

PART NO.
709AFM
709FM

* Planar is a patented Fairchild process.
3-16

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA709
709A
ELECTRICAL CHARACTERISTICS (T A = +25°C, ±9 V.:::; VS':::; ±15 V unless otherwise specified)
PARAMETER (see definitions)

CONDITIONS

Input Offset Voltage

MIN.

TYP.

RS':::; 10 kn

MAX.

UNITS

0.6

2.0

mV

Input Offset Current

10

50

nA

Input Bias Current

100

200

Input Resistance

350

nA

700

Output Resistance

kn

150

n

Supply Current

VS=±15V

2.5

3.6

rnA

Power Consumptien

Vs = ±15 V

75

108

mW

1.5

ILS

30

%

Vs = ±15 V, VIN = 20 mV, RL = 2 kn, C1 = 5 nF,
R1 = 1.5 kn, C2 = 200 pF, R2 = 50n
CL':::; 100 pF

Risetime,
Transient Response
Overshoot

The following specifications apply for -55°C':::; T A':::; +125°C:
Input Offset Voltage

RS':::;10kn

Average Temperature Coefficient
of I nput Offset Voltage

RS
RS
RS
RS

Input Offset Current

3.0

mV

1.8
1.8
2.0
4.8

10
10
15
25

J.f,vtc
J.f,vtc
ILVtC
J.f,vtc

T A = +125°C
TA = -55°C

3.5
40

50
250

nA
nA

Average Temperature Coefficient
of I nput Offset Current

T A = +25°C to +125°C
T A = +25°C to -55°C

0.08
0.45

0.5
2.8

nAtC
nAtC

Input Bias Current

TA = -55°C

300

600

nA

Input Resistance

T A = -55°C

85

I nput Voltage Range

Vs = ±15 V

±8.0

Common Mode Rejection Ratio

RS':::;10kn

80

= 50.0, T A = +25°C to +125°C
v

= 50n, T A = +25°C to -55 C
v
= 10 kn, T A = +25°C to +125 C
v
v
= 10 kn, T A = +25 C to -55 C'

170

kn

110

dB

V

Supply Voltage Rejection Ratio

RS':::;10kn

Large Signal Voltage Gain

Vs = ±15 V, RL 2. 2 kn, VOUT = ± 10V

Output Voltage Swing

V S = ± 15 V, R L 2. 10 kn
VS=±15V,RL2.2kn

Supply Current

T A = +125°C, Vs = ±15 V
v
TA =-55 C, VS=±15 V

2.1
2.7

3.0
4.5

mA
mA

Power Consumption

TA = +125°C, Vs = ±15 V
v
T A = -55 C, Vs = ±15 V

63
81

90
135

mW
mW

100

J.f,V/V

70,000

V/V

40
25,000
±12
±10

±14
±13

V
V

PERFORMANCE CURVES FOR 709A

VOLTAGE GAiN
70k

V-

RL> 2 kn
- -55;-C';; TA';; +125'C
60k

,/

,..,....

10

i''-

15

,./'

r-T

11

12

-

::r~2\<.SJ._ ~

-

/,./'N\II'I~~~

,..,....V

V

,./'

~

10

13

SUPPLY VOLTAGE - ±V

14

15

POWER CONSUMPTION

n

;10
-55'C';; TA';; +125'C

~

V-

90

I ,/

<:J
Z

~ 8.0

~
<5

--

N\11'I1N\lINI

~

6.0

>

I- ~

::;; 4.0

~

~~~

70

,//
50

o

9

10

11

12

13

14

15

SUPPLY VOLTAGE - ±V

w
2.0

o
9

1

I

,/

......... V

/v .....

./

V

10
10

11

12

13

SUPPLY VOLTAGE - ±V

3-17

1/

io{vft'-

V

Cl

::;;
::;;

8

/'

,/"'"

..... 1-

Cl
Cl

5.0

V

TA = 25'C

10

z

,..,....V

N\11'I1N\lI~ I--""

-I-- I-9

N\II'IIN\UN\

i~
I
I

L""""

20 k

I'-'-~'()~v

20

~~i-~

/1
,/
1

40 k

10k

/'

I

INPUT COMMON MODE
VOLTAGE RANGE

OUTPUT VOLTAGE SWING

25

~~ IL

50 k

30 k

/'

w

14

15

9

10

11

12

13

SUPPLY VOLTAGE - ±V

14

15

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA709
709
ELECTRICALCI-IAR-ACTERISnCS(T A

=T2S

Q

C,±-9V ~ \1S ~ ± 1SV unless otherwise specified)

PARAMETER (see definitions)
I nput Offset

CONDITIONS

Volt~ge

MIN.

RS S 10 kn.

I nput Offset Current
Input Bias Current
I nput Resistance

150

Output Resistance
Power Consumption

VS=±15V

TYP.

MAX.

UNITS

1.0

5.0

mV

50

200

nA

200

500

nA

400

kn.

150

n.

80

165

mW

VIN = 20 mV, RL = 2 kn.,
Transient Response

Risetime

C1 = 5000 pF, R1 = 1.5 kn.,
C2 = 200 pF, R2 = 50n.

0.3

1.0

/-LS

Overshoot

CLS 100 pF

10

30

%

6.0

mV

The following specifications apply for -55°C S T AS +125°C:
Input Offset Voltage

RS S 10 kn.

Average Temperature Coefficient
of I nput Offset Voltage

RS = 50n.
RS S 10 kn.

Large Signal Voltage Gain!

Vs = ±15 V, RL L. 2 kn.,
VOUT = ±10 V

25,000

45,000

Output Voltage Swing

VS=±15V,RL>10kn.
Vs = ±15 V, RLL.2 kn.

±12
±10

±14
±13

V
V

Input Voltage Range

Vs = ±15 V

±8.0

i10

V

70

90

3.0
6.0

/-Lvtc
/-LV/oC
V/V

70,000

Common Mode Rejection Ratio

RS S 10 kn.

Supply Voltage Rejection Ratio

RS S 10 kn.

25

150

/-LV/V

Input Offset Current

TA =+125°C
v
TA = -55 C

20
100

200
500

nA
nA

Input Bias Current

TA

0.5

1.5

= -55°C

Input Resistance

40

dB

/-LA

100

kn.

PERFORMANCE CURVES FOR 709

VOLTAGE GAIN
70 k

V

~~~

50 k

30

V

RL~2kn

-55'C ~ TA ~ +125'C

60 k

1/

~

30 k

V

V

15

L. . .

I

V

I'-\.~,~""",

20

260

0

~ 8.0

':-II'II':-I.l':-

w

~>

~I--

6. 0

w

I-- 1--.....

l- I--

200

I-- I--

Q

10

~I\lII.l~j....--

100

:;; 4.0

o

:;;

j/

~

20 k

- l - I9

1/

150

Q

z

10 k

T~' 2~'C

~

':-II'I\~I.l\ll 1 ~i¥.p. . . . . lV l>/II\'ll~~,l:-

.....v

300

-55'C~TA~+125'C

25

/

POWER CONSUMPTION

2

-55'C ~ TA ~ +125'C

~~
40 k

INPUT COMMON MODE
VOLTAGE RANGE

OUTPUT VOLTAGE SWING

10

I--

11

p.- ~ +-

0
12

13

SUPPLY VOLTAGE - ±V

14

15

:;;

5.0

8
10

11

12

13

14

15

50

2.0

3-18

~

L--

o

0

SUPPLY VOLTAGE - ±V

10- ~

-~·r'lv~ I-

~

10

11
12
13
SUPPLY VOLTAGE - ±V

14

15

9

10

11

12

13

SUPPLY VOLTAGE - ±V

14

15

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA709
709C
ELECTRICAL CHARACTERISTICS (VS = ±15 V, T A = 25°C unless otherwise specified)
PARAMETER (see definitions)

MIN,

CONDITIONS

Input Offset Voltage
Input Offset Current
Input Bias Current
Input Resistance
Output Resistance
Large Signal Voltage Gain

RS

~

10 kn, ±9 V

~

Vs

~

TYP.

Output Voltage Swing
Input Voltage Range
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Power Consumption

RS~
RS~

= ±10 V

15,000
±12
±10

VIN - 20 mV, RL - 2 kn,
C1 = 5000 pF, R1 = 1.5 kn,
C2 = 200 pF, R2 = 50n
CL~ 100pF

Risetime
Transient Response
Overshoot

7.5
500
1.5

mV
nA
IJA
kn
n
V/V
V
V

±10
90
25
SO

±S.O
65

10 kn
10 kn

UNITS

2:0
100
0.3
250
150
45,000
±14
±13

±15 V

50
RL L. 2 kn, VOUT
RL L. 10 kn
RL L. 2 kn

MAX.

V
dB
IJV/V
mW

200
200

0.3

IJS

10

%

The following specifications apply for O°C ~ T A ~ +70°C:
Input
Input
Input
Large
Input

Offset Voltage
Offset Current
Bias Current
Signal Voltage Gain
Resistance

RS

~

10 kn, ±9 V

~

Vs

~

mV
nA
IJA
V/V
kn

10
750
2.0

±15 V

12,000
35

RL L. 2 kn, VOUT = ±10 V

PERFORMANCE CURVES FOR 709C

VOLTAGE GAIN
15k

RLI~2Ikn

30

JcJAiL70Il

>

~~~/"

VV

/"

25

~

~

~\l~'

20

I-

5

//

15

:li'"

//

"r
~

~
\,-\..'

I:::l

~~?
5k

I

2

0·L;)A:<:;;~70·b

C

10k

10

-

~
.....J ....... \'I.~~

/ / f- f-

\,-\..~~,:::; ;.-

-

10

11

12

13

14

15

SUPPLY VOLTAGE - ±V

'Y

8.0

\'I.\t\\\'I.\ltlt

I-- f-

-

f-

6. 0

-I--

i.--

4.0

2.0

o
9

o·c ,s;TA ,s;+70"C

0

~

~
o

INPUT COMMON MODE
VOLTAGE RANGE

OUTPUT VOLTAGE SWING

9

10

11

12

13

14

o

15

9

10

11

12

13

14

15

SUPPLY VOLTAGE - ±V

SUPPLY VOLTAGE - ±V

FREQUENCY COMPENSATION CURVES FOR ALL TYPES
OPEN-LOOP FREQUENCY
RESPONSE FOR VARIOUS
VALUES OF COMPENSATION

FREQUENCY RESPONSE
FOR VARIOUS
CLOSED-LOOP GAl NS

OUTPUT VOLTAGE SWING AS A
FUNCTION OF FREQUENCY
FOR VARIOUS
COMPENSATION
NETWORKS
32
' . .

24
20

16
12

8.0
4.0
O~~~~~~~~~~~~

lK
FREQUENCY - Hz

FREQUENCY - Hz

3-19

10k

lOOk
FREQUENCY - Hz

1M

10M

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p,A709
TYPICAL PERFORMANCE CURVES FOR 709A
VOLTAGE' GAIN AS A
FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARA,CTERISTIC
f5

10

,

II!
I

I

~

5.0

g

~

o

60k

~

50k

..........

----

40k

J
li
/h
//,

30k

~'/f

-10

0.6

0.8

~""2v

INPUT BIAS CURRENT AS A
FUNCTION OF
AMBIENT TEMPERATURE

-

!!:
~

20
60
TEMPERATURE' _·C

/

20

"~

,,:,
~

/

14
12
10
0.1

140

100

/

il

18

~ 16

--rr:=-:-~
-20

2

INPUT BIAS CURRENT AS A
FUNCTION OF
SUPPLY VOLTAGE

500

/

24

r6

-r-

l"- I---

Ivs =1 ±9V

10k
-60

1.0

"'I

~
.

·1

120k

-15
-1.0 -0.8 -0.6 -0.4 -0.2 0
0.2 0.4
INPUT VOLTAGE - mV

--..vs ~

~-I-"'

L

26

Cl

. . . . r--....

~ TA=25·C

~

-5.0

VS= ±15V
TA = 25·C

28

TA" -56·~-.~ ~TA-125·C_

>
W

RL"10kn

rfl

RL -IOkn

30

70k

'f,r-..., 'r-

VS. ±15V

I-

OUTPUT VOLTAGE SWI NG
AS A FUNCTION OF
LOAD RESISTANCE

I

I

0.2

10

0.5
LOAD RESISTANCE - kn

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
50

105
TA = 25·C

100

400

300

"\.

~

I -~

,....-

~I"'"

.............. ~

40

~

'\.

200

1\

\

30

,\

20

\

I'-,.

f'.-

100

. . . . r-

o

-60

20

-20

-

10

60

o

9

140

12
13
11
SUPPLY VOLTAGE - iV

10

TEMPERATURE _·C

COMMON MODE REJECTION
RATIO AS. A FUNCTION OF
AMBIENT TEMPERATURE
112

1"'I"--

100

60

85

14

-60

15

INPUT RESISTANCE AS A
FUNCTION OF
AMBIENT TEMPERATURE

100

140

POWER CONSUMPTION AS A
FUNCTION OF
AMBIENT TEMPERATURE

5.0

R~~ 10kn

-

20
60
TEMPERATURE _·C

-20

"

90
Vs= ±15V

3.0
110

108

1/

80

r- :--.....

/"

y V

.......... 1'-

I

V

0.5

-r-.r-

Z

1.0

108

1-

~

.,/

/

~

70

i8

60

. . . r-.....
........... ~

a:
W

0.3

~

V

104

50

I"
102
-60

0.1
20
60
TEMPERATURE _·c

-20

140

100

-60

-20

20
60
TEMPERATURE _·c

100

TRANSIENT RESPONSE
TEST CIRCUIT

TRANSIENT RESPONSE
1.4
1.2
1.0
0.8
0.6
0.4
0.2

140

40
-60

-20

20
60
TEMPERATURE _·C

140

100

SLEW RATE AS A FUNCTION
OF CLOSED-LOOP GAIN
USING RECOMMENDED
COMPENSATION NETWORKS
100
VS" '15V I
TA= 25·C

10_12

OV!I~~

I

.,...,.....-

V

/1
I
I

If--

/'

10

./

V
VIN

1.0

1/

Vs= ±15V

I

0.5

1.0
TlME-j.ts

-

/

TA = 25·C

j'SETIME

1

1.5

2.0

2.5

Pin numbers only apply to
metal can package.

3-20

0.1
1

10
100
CLOSED-LOOP GAIN

1000

FAIRCHILD LINEAR INTEGRATED CIRCUITS. /lA709
TYPICAL PERFORMANCE CURVES FOR 709 AND 709C

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARACTERISTIC
5

200

1.0
Vs = ±15V
-

(/I

0
T A = _55°C

5.0

--!. If--lTA = 125°C

I
'I

0

I

-5.0

//!

-

0.8

160

0.6

120

TA=25°c -

" "~

J
0.4

111
I

-10

VS= ±15V

Vs = ±15V

'fir

RL = 10 k.Q

0.2

/j,
/./,

-15
-1.0 -0.8 -0.6 -0.4 -0.2

0

0.2

0.4

0.6

0.8

1.0

'"

-20

100

20
60
TEMPERATURE _ °C

"-

140

-60

VS= ±15V

0.8

V

L

.... V

0.4

225

/
80

100

140

•

TA = 25°C

100

0.6

20
60
TEMPERATURE _ °c

250

120
Vs = ±12V

-20

r-. r-

INPUT BIAS CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

1.0

..........

40

........... t--,...

o

o

-60

INPUT VOLTAGE - mV

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

"""" ........

80

- -

- I - ,-.-..

t--

200

I--

60

175

40

150

--

f- f-

--

L..-

-- ~

V
.......... V

0.2

/'

o
-60

-20

20
60
TEMPERATURE _ °c

100

140

OUTPUT VOLTAGE
SWI NG AS A FUNCTION OF
LOAD RESISTANCE

20
-60

125
-20

60
20
TEMPERATURE - °C

100

/'

24

-

12

11

13

14

15

SUPPLY VOLTAGE - ±V

TRANSIENT RESPONSE
1.2

*

R2

0.6

1/

0.4

/

16

0.2

/

* Use R2

II
0.2

0.5
LOAD RESISTANCE - k.Q

10

= 50

on

when the
amplifier is operated with
capacitive loading.

OV!~~

1.0
0.8

1/

18

10
0.1

..........

/

22
20

12

10

1.4
VS= ±15V
TA = 25°C

26

14

9

FREQUENCY COMPENSATION
CIRCUIT

30
28

140

/
/
I
If-

Vs = ±15V

0.5

1.0
TIME-ps

3-21

TA ~ 25°C

ilSETIMj

1.5

2.0

2.5

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A709
TYPICAL PERFORMANCE CURVES FOR 709 AND 709C

FREQUENCY CHARACTE RISTles
AS A FUNCTION OF
AMBIENT TEMPERATURE

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
SUPPLY VOLTAGE
1.5

::::::~
1.1

r-

1'~AJ

1'::-- --r-:---

~~£S!>oIVSE

I

S\.~V4 RATE

1.2

-I-- t-F== F=""

1--1:::::

-I

l- ::

~6A\'IOV4\01\\ t-- t--

-

0.8

C\.OSEO-\'O

I

10

......... ........

--

-

~

--

~

V

-- 'r'~

"2'

/VSL~

~~1'E
OS~

o·(O~r---..
"I.vo~r-11D'l'/i

0.4

J

0.5

~,<>«,~

e.'<~Z;;

1.6

I

F-'

0.7

±9V s; Vs S;±16V

TA" 26·C

I

1.3

0.9

2.0

I

o
11

12

13

14

-60

16

-20

20

60

TEMPERATURE

SUPPLY VOLTAGE - tV

100

_·c

PROTECTION CIRCUITS
OUTPUT SHORT-CI RCUIT
PROTECTION

INPUT BREAKDOWN
PROTECTION

Rl
20011
FD-600
121

o-.A.Mr--~-"'---:i

SUPPLY OVERVOL TAGE
PROTECTION

LATCH-UP PROTECTION

v+

Pin numbers only apply to metal can package.

3-22

140

IJA715
HIGH SPEED OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The #LA715 is a High Speed, High Gain, monolithic Operational
Amplifier constructed using the Fairchild Planar* epitaxial process. It is intended for use in a wide
range of applications where fast signal acquisition or wide bandwidth is required. The #LA 715 features
fast settling time, high slew rate, low offsets, and high output swing for large signal applications. In
addition, the device displays excellent temperature stability and will operate over a wide range of
supply voltages. The #LA715 is ideally suited for use in A to D and D to A converters, active filters,
deflection amplifiers, video amplifiers, phase locked loops, multiplexed analog gates, precision
comparators, sample and holds, and general feedback applications requiring dc wide bandwidth
operation.

•
•
•
•
•

HIGH
FAST
WIDE
WIDE
WIDE

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

I

CDMP 1A

SLEW RATE . . • . • . . • • • 100 V/#LS
SETTLING TIME . . . • . . . 300 ns
BANDWIDTH • • . . . • • . • 65 MHz
OPERATING SUPPLY RANGE
INPUT VOLTAGE RANGES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1 )
Metal Can
DIP
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP
Operating Temperature Range
Military (715)
Commercial (715C)
Lead Temperature (Soldering, 60 Seconds)
Metal Can, DIP

±18 V
500mW
670mW
±15 V
±15 V

ORDER INFORMATION
TYPE
PART NO.
715HM
715
715HC
715C

-65° C to +150° C
_55° C to +1-25° C
O°C to +70°C

- 14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

COMP lA

EQUIVALENT CIRCUIT

COMP 18

COMP 2B
V+

CASCODE
INVERTING
INPUT
NON-INVERTING
INPUT
NC

NC

NC

NC

COMP 2A
OUTPUT
V-

ORDER INFORMATION
TYPE
PART NO.
715
715DM
715C
715DC

All Pin numbers shown refer to 10-lead TO-5 package
Notes on following pages.

3-23

* Planar is a patented Fairchild process.

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA715
ELECTRICAL CHARACTERISnCS FOR 715 (VS = ±15 V, T A = 25°C unless otherwise specified)
..

PARAMETER

MIN.

CONDITIONS

Input Offset Voltage
Input Offset Current
Input Bias Current
I nput Resistance
Input Voltage Range
Large Signal Voltage Gain
Output Resistance
Supply Current
Power Consumption
Acquisition Time (Unity Gain)
Settling Time (Unit Gain)

RS

~10

TYP.

k51

2.0
70
400
1.0
±12

±10
15,000

RL;;;'2 k51, VOUT = ±10 V

VIN =400 mV

Input Offset Current
Input Bias Current
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing

7.0
210

60
40

7.5
250
800
750
4.0

= +125°C
= -55°C
= +125°C
=-55°C

RS ~10 k51
RS ~10 k51
RL;;;'2 k51, VOUT = ±10 V
RL;;;'2 k51

74

92
45

300

10,000
±10

±13

TYPICAL PERFORMANCE CURVES FOR 715
SUPPLY VOLTAGE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

OPEN LOOP GAIN AS A FUNCTION
OF AMBIENT TEMPERATURE
50k

200

Vs" ± 15V
Rl"2kQ -

~

«lk

I

I

Rs ~IOkQ_
vs" ±15V

180

~

160

0

lOk

S

-

-

~

r- r-......

~

I--

~
~

20k

~

80

«l

\
1\

100

'\

80

"'

60

~

10k

l«l

120

«l

120

~

15

~

10

120

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

25

110

Vs" ± 15V
Rl"IOkQ-

RS ~ 10kQ_

Vs "±15V

100

r-

80

TEMPERATURE _·c

SLEW RATE AS A FUNCTION
OF TEMPERATURE

----

;--.r-

«l

TEMPERATURE - ·c

20

'r--..... .........

20

...............

~

90

i'-

/
80

•

-

..........

'"

,/

70

60
«l

80

«l

120

TEMPERATURE - ·C

TEMPERATURE - ·C

3-24

80

mV
nA
nA

51
mA
mW
ns
ns
ns

%
V IlLs
V/ILs
V/ILs
V IlLs

38
18
100

15

UNITS

M51
V

30
25
70

Av = 100
Av = 10
Slew Rate
Av = 1 (non-inverting)
Av = 1 (inverting)
The following apply for -55°C';;;;; T A ~ +125°C:
Input Offset Voltage
RS ~10 k51
TA
TA
TA
TA

5.0
250
750

30,000
75
5.5
165
800
300

VOUT=+5V

Transient Response
Risetime
(Unity Gain)
Overshoot

MAX.

120

mV
nA
nA
nA
ILA
dB

ILVN

~A715

FAIRCHILD LINEAR INTEGRATED CIRCUITS •
ELECTRICAL CHARACTERISTICS FOR 715C (VS = ±15 V, T A = 25°C unless otherwise specified)
PARAMETER
Input Offset Voltage
Input Offset Current
I nput Bias Current
I nput Resistance

±10

Input Voltage Range

74

RS";lO kn
RS";lO kn
RL;;;;'2 kil, VOUT = ±10 V

10,000

Power Consumption

Transient Response
Risetime
(Unity Gain)
Overshoot

165

300

mW

30
25
70

ns
ns
75
50

ns

%
V/J.LS
V/J,LS

38
10

J,LA
Mn.
V
dB
J,LV/V
n
mA

VIN =400 mV

Av
Av

mV
nA

10

800
300

= 10
= 1 (non-inverting)
Av = 1 (inverting)

400

UNITS

5.5
VOUT = +5 V

Av = 100
Slew Rate

250
1.5

92
45
30,000
75

Output Resistance
Supply Current
Acquisition Time (Unity Gain)
Settling Time (Unity Gain

7.5

2.0
70
0.4
1.0
±12

RS ";10 kn

Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain

MAX.

TYP.

MIN.

CONDITIONS

V/J,LS

18
100

V/J,LS

The followi ng apply for 0° C ..; T A ..; +70° C:
I nput Offset Voltage

10
250
750
1.5

RS";lO kn
TA=+70°C

I nput Offset Current

TA
TA

I nput Bias Current

= O°C
= +70°C

7.5

TA =:' O°C
RL;;;;'2 kn, VOUT = ±10 V
RL;;;;'2 kn

Large Signal Voltage Gain
Output Voltage Swing

8,000
±10

±13

SUPPLY VOLTAGE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

SOk

100

I

Vs" £15 V
R ' 2kQ L

RSS IOkQ_
Vs· ±15V

-

30k

20k

~

"

.............

--

..........

10k

o

01020

3040

50

o

o

6070

10

20

TEMPERATURE - ·c

35

1I0

I

30

100

25

~
~

-

15

10

50

60

70

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

Vs" ±15V
RL "lOkQ-

20

40

r-- r--

TEMPERATURE - °c

SLEW RATE AS A FUNCTION
OF TEMPERATURE

!9.
:::

30

----

90

I
RS$IOkQ _
VS"±l5V

-

-

80

70

60
30

40

TEMPERATURE

50

60

70

_·c

o

10

20

30

40

TEMPERATURE

3-25

50

_·c

nA
J,LA
J,LA
V

TYPICAL PERFORMANCE CURVES FOR 715C

OPEN LOOP GAIN AS A FUNCTION
OF AMBIENT TEMPERATURE

mV
nA

60

70

•

~A715

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

TYPICAL PERFORMANCE CURVES FOR 715 AND 715C

NON-INVERTI NG
COMPENSATION COMPONENTS VALUES

SUGGESTED VALUES OF
COMPENSATION CAPACITORS
AS A FUNCTION OF
THE CLOSED LOOP GAIN

FREQUENCY COMPENSATION
CIRCUIT

10k .--"T""""T""TT"--,----r~~__r_~..,...,,__,

CLOSED
LOOP

CI

C2

C3
-

GAIN

~~=+~H+~+v~!Lv
-t;

1000

10 pF

-

100

50 pF

-

250 pF

10 *

100 pF

500 pF

1000 pF

1

500 pF

2000 pF

1000 pF

C2

\!; 1000

f--¥+-+PH\--+-+-H--+--+-++t---l

~

~'

i5

~
u

...

....

ci··. . · ...............~.4..

100

1--+-+++--1

,-C'3

-

.......
.....

* For

Gain 10, compensation may be simplified by
adding a 200 pF capacitor (C4) between Pin 7 and 10.

removing

C2,

C3

and
CLOSED LOOP GAl N

INVERTING UNITY GAIN

2.0

SMALL SIGNAL PULSE RESPONSE
INVERTING UNITY GAIN

HIGH SLEW RATE CIRCUIT

LARGE SIGNAL PULSE
RESPONSE

I

Vs" !15V

Vs" ±15V

5kn

I-- TA "25°C

'\
\\

68pF

"-v

5kn
INPUT

5In

-2.0

TA " 25°C

.025~F

VIN" 400mV

-4.0

LJ'I

t..

-400

800

400

1200

V~

-400

-15V

2.5kn

V

-6.0

6.0

LARGE SIGNAL PULSE RESPONSE
FOR GAIN 10
6.0

I

II

\

/

3.0

I
I
I

2.0
1.0

-1.0

o

5.0

TA "25°C

1.0

-1.0

1200

.800
TIME - ns

1600

400

600

800

1000 1200

VS" + 15v
TA "

ls°C'-

80

/

·60

TA
20

V

16

,/

/

12

V

/"""

. . .J....... ~

20

1

1600

SLEW RATE AS A FUNCTION
OF SUPPLY VOLTAGE

Rl "10kQ

40

1400

10

CLOSED lOOP GAl N

/

10

NO COMPo

V

18

SUPPLY VOLTAGE - V

3-26

400

600

800

1000 1200

1400 1600

VOLTAGE OFFSET
NULL CIRCUIT

V+

I

50kn

/

14

200

,,~oc

V

100

o

Rl "lOW -

/

/""

-1.0

\

TIME - ns

24

100

1\

1.0

\

u
200

I

I

2.0

\

TIME - ns

SLEW RATE AS A FUNCTION
OF THE CLOSED LOOP GAl N

o

\

o

TA" 25°C

3.0

2.0

\

VS" ! 15V

5.0
4.0

I

3.0

\

400

I

4.0

\

LARGE SIGNAL PULSE RESPONSE
FOR GAIN 100
6.0

Vs":!: 15V
TA " 25°C

Vs":!: 15V
1\

4.0

480

TIME - ns

UNITY GAIN LARGE SIGNAL
PULSE RESPONSE
5.0

320

160

1600

TIME - ns

22

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.LA715
TYPICAL PERFORMANCE CURVES FOR 715 AND 715C

OPEN LOOP RESPONSE WITH
COMPENSATION NECESSARY FOR
VARIOUS CLOSED LOOP
GAIN CONFIGURATIONS

CLOSED LOOP FREQUENCY
RESPONSE FOR VARIOUS
_ GAIN CONFIGURATIONS

OPEN LOOP GAIN AS A
FUNCTION OF FREQUENCY

120 rTTTT-'--"'TTrT""""1r-rT1T--'--rn~""7""'"'""""'"
Vs =:': 15 V

80 r-TTTT""-'-lrTTT---r-",.,.-,--"..,,--,---,-"'TTI

lOO~Trr--,-~~~~~~--,-~~

100 1-++++-+--++H--1I-++t+-+-++t"TA-'--,=_25-r-°Crn

1---++++--+--+-+1!+--1-++++--I-+-++ Vs = :': 15 V
GAIN 1000
TA = 25°C

v's =':,:'IS'V
TA = 25°C

60

f-+++t-MI+fF-+-t-t+l-..tr-..:+t+f-----l-+l-H

80 1---++++--+-+-+++-+-+t-fk-+-I'+-t1+ NO C1MP,

40

Gli ~ '1'00
1'\
H-ttt-+.::;::I+tIr+-++++-I--I..j;±j........--!'1\~

60 1-+++t--++-+++-----j--jf-+++-+-++-f'~I\+-+++H
I

20

I---+-I-tt--+--r-tt
11t-+--t++t-++H-

~

201---+~-+--t-n!+--l-+Hr+-H+r+-H~

~

1

20

FREQUENCY - Hz

OPEN LOOP PHASE AS A
FUNCTION OF FREQUENCY

t-t---

~~

III
III

15
GAIN 10

I I

1\

!fl
~
~

-160 1--+-H+-+-++I+--t-++-I+-+-+-HIt---i-+++

cr;

-240 I-+-+++--+-++I+--l-++++--+-t-t-!-t-\-+-+t--H

~

10

I

I--+-H+-+-++tl+---l-+Nt--+-+-+ Vs -! 15V
TA ~ 25°C
-80 I-+-+++--+-++I+--l-++++-~I\r++ NO COMP,

~~

GAIN 100

""~
6

~

GAIN I

~

8

V

40

t\

~

AV=ICOMP.

o

50M

30 r-T-rT;--;r-r"TTl---.--r-TTT--r--'-rTT"'
Vs = :':15 V
TA = 25°C
25
RL = 10 kQ

I--++++-+-++I+--t-++++--+-H Vs = 1: 15 V
80

10M

OUTPUT SWING AS A FUNCTION
OF FREQUENCY FOR VARIOUS
CLOSED LOOP GAIN CONFIGURATIONS

lOOrTTTT--'-TTrT""""1--r-nr.-rrrll",-nI~

~,

1M

lOOk

FREQUENCY - Hz

1\

1\

-320 I-++t+--+-t-t-!+-+-++++-+-t-+++---t-+ttl

i
-400
0.001

0.01

1.0

10

50

0.01

0.1

1.0

FREQUENCY - kHz

FREQUENCY - MHz

VOLTAGE FOLLOWER
TRANSIENT RESPONSE

VOLTAGE FOLLOWER

10

L......L...J.J.J....-'-..L..J....I.J........I.--I-W.1--I-.L...J....LJ.......J.--L..LU

0.001

0.01

0.1

1.0

10

50

FREQUENCY - MHz

COMMON MODE REJECTION RATIO
AS A FUNCTION OF FREQUENCY
100 r---T...,.,..,..-r---r-r""'-""""""""""'--,-""""".,...-,r-r-T'M

Vs

=:': 15 V

600 t---+--+---I--+--+TA = 25°C
VIN = 400 mV

~**#Fl-k++++--+-+-jl ~~ - ±15 Vi 1

v+

TA -25°C

5oor--+~+-~--+--+-~-~

80 1---++++-+-++H--I---+-t-1"k
I

~

60 1---+-+++-+++++-I---++++--+--+-+1I'+<,,-+-++-H

g

401--+-+++--+-++++--1--++++-+-+-H1+-1-+++1

~

/\ IV - ---..-

400 r----hf-----l\------7IP-o;;;:±:;;;..--t----!--i

~

m~~

300 t---vi--+---I!-----+--+---I---i

J

,,-+-+-+ AV = I COMP.

o

I'.

:::e
z

!

200 r---fH-+-~'----+--+-~--i
100

:

201--+-+++--+-++++--1--++++-+-+-H1+-1-+++1

I !RISETIME
o ry--.
IOJ.

o

50

100

150

200

250

300

350
FREQUENCY -

TIME-ns

kHz

NOTES
1. Rating applies to ambient temperature up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for Metal Can and 8.3 mW/oC for the
DIP.
2. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.

3-27

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

~A715

TYPICAL APPLICATIONS
WIDE BAND VIDEO AMPLIFIER WITH 75
DRIVE CAPABILITY

on COAX CABLE

10
VIOEO OUTPUT
TO 750 COAX

+20V

25SmV P-POUT

OdB· 5\IA P-P N
I

;(
t:I

"'1\

10kO

7S0

SOOO

~

-10

~
I
z

7S00

-20

I _______________
L

NOISE OUT· 2mVRMS
Pop SIGIRMS NOISE· 42111

750

•

I
I
I
I
I

\

-30

750

I
I

~

EQUIVALENT CIRCUIT FOR IMAGE ORTHICON

..

*.1 PF

2N3641

r---------------,

I
I

51kO

2N3636

-40
0.001

0.01

0.1

10

100

*.l\1F

FREQUENCY - MHz

1500

soon

10kO

1S0

*.l PF

-20V

HIGH SPEED 10-BIT DIGITAL TO ANALOG CONVERTER
ANALOG
OUTPUT 0 TO- +5_0 V
-

+6.0V
pA722

200pF

VLH = 3 V
mV/DIV(S V FULL SCALE)
O.S ~s/DIV
T = 0 at 1st. 0 I V

15

-6.0V

13~------------'--

3.9kn
-8.0V TO-18V

Conversion Rate
6 bits - 300 ns
8 bits - 600 ns
10 bits - 1000 ns

~A722/~A715

op amp switching ON, as it should
with typical logic voltage on least significant bits.
Note complete absence of ringing.

NOTE:
Contact Fairchild for additional information including how to increase conversion speed by clamping LSB's and how to obtain bipolar outputs.

HIGH SPEED SAMPLE AND HOLD

HIGH SPEED INTEGRATOR

50pF
10kll-

20

10kll

J

15
5.0nF

10
/IINPUT

\
OUTPUT

INPUT

rl.::1l

I\

If

J

\

V';--...,OUTPUT

-10

HOLDO-........Jo,M.....-I'

SAMPLE

-15

1000pF
.----4--~~~--~

--'-

\1'

OUTPUT

~I-I

I

i\

V

1\

Cs

-20

lOGIC INPUT

o

1.0

2.0
TlME~

3-28

3.0

4.0

5.0

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA715

I

I

-tlI

I

I

I

TO

I
I
I

:..._ _ _ _ _ SETTLING TIME - - - -......

I
I
I

,
I
.,

~~~ --t---======j-

--I--~~~~~~~~~~~;

I

I
I
I
I
I

I

I
I
I
I

I
I

I
I

I
I
I
I

I ~V

I
I
I

I

I

I
I

__ ...1I

I

1---------

ACQUISITION TIME - - - - - - -.....-tl
I

HELPFUL HINTS
LAYOUT - The layout should be such that stray capacitance is minimal.
. SUPPLI ES - The supplies should be adequately bypassed. Use of 0.1 ILF high quality ceramic capacitors is recommended.
RINGING - Excessive ringing (long acquisition time) may occur with large capacitive loads. This may be reduced by isolating the capacitive
load with a resistance of 100 n. Large source resistances may also Qive rise to the same problem and this may be decreased by the addition of a
capacitance across the feedback resistance. A value of around 50 pF for unity gain configuration and around 3.0 pF for gain 10 should be
adequate.
LATCH UP - This may occur when the amplifier is used as a voltage follower. The inclusion of a diode between pins 6 and 2 with the cathode
towards pin 2 is the recommended preventive.

3-29

•

IJA725
INSTRUMENTATION OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA71S is a monolithic Instrumentation Operational Amplifier
constructed using the Fairchild Planar* epitaxial process. It is intended for precise, low level signal
amplification applications where low noise, low drift and accurate closed loop gain are required. The
offset null capability, low power consumption, very high voltage gain as well as wide power supply
voltage range provide superior performance for a wide range of instrumentation applications. The
~A71S is pin compatible with the popular ~A741 operational amplifier.
•
•
•
•
•
•
•
•

LOW INPUT NOISE CURRENT .•••••••
HIGH OPEN LOOP GAIN. . . • • .
• •••
LOW INPUT OFFSET CURRENT••••••••
LOW INPUT VOLTAGE DRIFT ..••••••
HIGH COMMON MODE REJECTION.
HIGH INPUT VOLTAGE RANGE.
WIDE POWER SUPPLY RANGE
OFFSET NULL CAPABILITY

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE S8

0.15 pAv'HZ
3,000,000
2 nA
0.6 ~VrC
120 dB
±14 V
±3VTO ±22 V

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
Differential Input Voltage
Input Voltage (Note 2)
Voltage 8etween Offset Null and V+
Storage Temperature Range
Metal Can
Operating Temperature Range
Military (72SA, 72S)
Commercial (i2SE, 72SC)
Lead Temperature
Metal Can (Soldering, 60 Seconds)

±22
V-

SOOmW
±S V
±22 V
±O.S V
-6S0C to +1S0°C
-SSOC to +12SoC
O°C to +7fiJC

EQUIVALENT CIRCUIT
R3
29kSl

NONINVERTING
INPUT

INVERTING
INPUT

R 19

4.5kSl

R6
5.1 k!1

Ra
2.4 k!1

RIa
5.1 k!1

R12
1 k!1

R13
1500

V-

~---------------4------~-----+--~~------~---4----~----------+---~----~--------~---o4
*Planar is a patented Fairchild process.

Notes on following pages

3-30

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A725
725A
ELECTRICAL CHARACTERISTICS (VS = ±15 V, TA = 25"'C unless otherwise specified)
PARAMETER

TEST CONDITIONS

Input Offset Voltage (Without external trim)

~

RS

MIN.

TYP.

MAX.

10 kn

Input Offset Current
I nput Bias Current
fo = 10 Hz
Input Noise Voltage

fo = 100 Hz
fo

I"nput Noise Current

=1

UNITS

0.5

mV

5.0

nA

75

nA

15

nV/

nV/ .JHz

kHz

7.5

nV/-fHz

fo = 10 Hz

1.2

pA/-fHz

fo = 100 Hz

0.6

pA/.jHZ

fo = 1 kHz

0.25

I nput Resistance

pA/-fHz

1.5

I nput Voltage Range
R L ~ 2 kn, V OUT = ± 10 V
RL ~ 500 n, VOUT

Large Signal Voltage Gain

Vs

= ±3 V

Common Mode Rejection Ratio

RS

~

10 kn

Power,Supply Rejection Ratio

RS

~

10 kn

RL

~

10 kn

RL

~

2 kn

Output Voltage Swing

= ±0.5 V,

±13.5

±14

1,000,000

3,000,000

Mn
V
V/V
V/V

100,000
120

130

dB
5.0

2.0

J,lV/V

±12.5

V
V

±10

Output Resistance

150

n
120

mW

6.0

mW

0.75

mV

80

Power Consumption

../HZ'

9.0

= ±3 V

Vs

The following specifications apply for _55° C ~ T A ~ +125° C unless otherwise specified:
Input Offset Voltage (Without External trim)

~

RS

10 kn

RS = 50.n

Average Input Offset Voltage Drift
(Without external trim)
Average Input Offset Voltage Drift
(With external trim)
I nput Offset Current

RS

= 50.n

0.6

TA

= +125°C
= -55"'C

5.0

TA

Average I nput Offset Current Drift

= +125°C
= -55"'C

TA

I nput Bias Current

TA

Large Signal Voltage Gain

R L ~ 2 kn, T A

= +125'" C

RL ~ 2 kn, TA

= ~55°C

Power Supply Rejection Ratio

RS

Output Voltage Swing

RL ~ 2 kn

~

J,lV/oC

1.0

J,lVrC

4.0

nA

18

nA

90

pArC

70

nA
nA

180
1,000,000

V/V

500,000

RS ~ 10 kn

Common Mode Rejection Ratio

2.0

V/V

110

dB

10 kn

8.0

J,lV/V

±10

V

TYPICAL PERFORMANCE CURVES FOR 725A AND 725
OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF TEMPERATURE FOR VARIOUS
SUPPL Y VOLTAGES
140

120

'J~.t~,.....-","",

vs' ±15V

~~

Vs' :!:IOV

---- --

-

NULLED INPUT OFFSET
VOL TAGE AS A FUNCTION
OF TEMPERATURE
100

UNNULLED INPUT OFFSET
VOL TAGE AS A FUNCTION
OF TEMPERATURE
1.0

VSI. ±~v I
-Vos 5 SpY at 25·C

Vs· :!:15V

V

vs' ±5V

f-- f---

~

/V'
RL ~2kQ

~

~ 0.6

... V

100

0.8

,,/

g

~

~V

,,/

l5 04

~

.

,

....

,,/

,,/

V

....... V

80

0.2
-100

60
-60

-20

20

60

TEMPERATURE _·C

100

140

-60

-20

60

20

TEMPERATURE - ·C

3-31

100

140

o

-60

-20

20

60

TEMPERATURE _·C

100

140

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A725
725
Et.EG1"~AI.GHARA(:1"-ER-IS'l"--tGS (-vs= ±45 V, TA=25°Cunless-otflerwisespeeifiecl)

PARAMETER
Input Offset Voltage (Without external trim)

TEST CONDITIONS
RS~

MIN.

TYP.

MAX.

UNITS

0.5

1.0

mV

I nput Offset Current

2.0

20

nA

Input Bias Current

42

100

nA

Input Noise Voltage

Input Noise Current

10 kn

fo = 10 Hz
fo = 100 Hz
fo = 1 kHz

15
9.0
8.0

nV/$z

fo = 10 Hz
fo = 100 Hz
fo = 1 kHz

1.0
0.4
0.15

pA/~

1.5

Mn

Input Resistance
Input Voltage Range
Large Signal Voltage Gain

±13.5
RL

~

2 kn, VOUT = ±10 V

Common Mode Rejection Ratio

RS.~ 10 kn

Power Supply Rejection Ratio

RS ~ 10 kn

Output Voltage Swing

110
±12
±10

2 kn

pAl "Hz
pA/$z

±14

V

3,000,000

V/V

120
2.0

RL~10kn
RL~

1,000,000

nV/.JHz

nV/$z

dB
10

±13.5
±13.5

J,LV/V
V
V

Output Resistance

150

Power Consumption

80

105

1.5

mV

5.0

J,Lvtc

n
mW

The following specifications apply for -55°C ~ T A ~ +125°C unless otherwise specified:
Input Offset Voltage (Without external trim)

RS~ 10 kn

Average Input Offset Voltage Drift
(Without external trim)

RS =50n

2.0

Average Input Offset Voltage Drift
(With external trim)

RS = 50n

0.6

I nput Offset Current

T A = +125°C
TA=-55°C

1.2
7.5

20
40

nA
nA

35

150

pAtC

20
80

100
200

nA
nA

Average Input Offset Current Drift
I nput Bias Current
Large Signal Voltage Gain

T A = +125°C
TA =-55°C
RL~2kn,TA=+125°C
u

RL~2 kn, TA =-55 C

Common Mode Rejection Ratio

RS

~

10 kn

Power Supply Rejection Ratio

RS~

10 kn

Output Voltage Swing

8L~ 2 kn

J,Lvtc

1,000,000
250,000

V/V
V/V

100

dB
20

±10

NOTES:
.
1. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/"C.
2. For supply voltages less than ±22 V, the absolute maximum input voltage is equal to the supply voltage.

3-32

J,LV/V
V

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.l.A725
725E
ELECTRICAL CHARACTERISTICS (VS = ±15 V, TA = 25°C unless otherwise specified)
TEST CONDITIONS

PARAMETER
Input Offset Voltage (Without external trim)

RS

~

TYP.

MIN.

10 kn

I nput Offset Current

0.5

mV

5.0

nA

75

nA

15

nVI

Input Bias Current
fo = 10 Hz
Input Noise Voltage

I nput Noise Current

UNITS

MAX.

9.0

fo= 1 kHz

7.5

nV/..J Hz

fo = 10 Hz

1.2

pAl

fo = 100 Hz

0.6

pAI.J Hz
pAI.J Hz

nV/..J Hz

0.25

fo= 1 kHz
Input Voltage Range
RL ~ 2 kn,vOUT = ±10 V
RL ~ 500 n, VOUT = ±0.5 V

Common Mode Rejection Ratio

RS

~

10 kn

RS

~

10 kn

RL

~

10 kn

RL

~

2 kn

Output Voltage Swing

±14

1,000,000

3,000,000

V
V/V

100,000

Vs = ±3 V
Power Supply Rejection Ratio

±13.5

V/V
dB

120
2.0

IJ,V/V

5.0

V

±12.5

V

±10

n

150

Output Resistance

80

Power Consumption

oJ Hz

Mn

1.5

I nput Resistance

Large Signal Voltage Gain

V Hz

fo = 100 Hz

150

mW

6.0

mW

0.75

mV

Vs = ±3 V

The following specifications apply for 0° C ~ T A ~ +70° C unless otherwise specified:
Input Offset Voltage (Without external trim)
Average Input Offset Voltage Drift
(Without external trim)
Average Input Offset Voltage Drift

RS

~

10 kn

RS = 50 n

2.0

IJ,vl"'c

RS = 50 n

1.0

IJ,V/oC
nA·

(With external trim)
I nput Offset Current

TA = +70°C

1.2

4.0

TA = O°C

4.0

18

10

90

pA/oC

70

nA

180

nA

Average Input Offset Current Drift
TA = +70°C

I nput Bias Current

TA = O°C
R L ~ 2 kn, T A = + 70° C

Large Signal Voltage

1,000,000

. R L ~ 2 kn, T A = 0" C
RS

~

10 kn

Power Supply Rejection Ratio

RS

~

10 kn

Output Voltage Swing

RL

~

2 kn

Common Mode Rejection Ratio

nA

V/V

500,000

V/V

110

dB
8.0

IJ,V/V
V

±10

TYPICAL PERFORMANCE CURVES FOR 725E AND 725C
OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF TEMPERATURE FOR VARIOUS
SUPPL Y VOLTAGES

1~c::r::~~~VS~=7±~~vH===~__
~
Vs =±15V
1~ 1==t:=t:=t~vs~=±±w;lOvvic=-~t=-:j
vs' ±5V
100

UNNULLED INPUT OFFSET.
VOL TAGE AS A FUNCTION
OF TEMPERATURE

NULLED INPUT OFFSET
VOL TAGE AS A FUNCTION
OF TEMPERATURE
100

1.0

VS=±15V
vOS~5~V at 25°C

Vs = ±15V

0.8

-

50

1---+-+---+--1---1--+---1
-50

-

-~

10--

f.- f -

- --

0.6

~

I--- ~
0.4

80

Rll~2kQ

0.2

-100
I

60
0

10

20

30

40

TEMPERATURE - °c

50

60

70

10

~

30

~

TEMPERATURE -

3-33

~

°c

60

ro

o

o

10

~

30

~

TEMPERATURE -

~

°c

60

ro

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA725
725C
ELECTRICAL CHARACTERISTICS (VS = ±15 V, TA = 25°C unless otherwise specified)
PARAMETER
Input Offset Voltage (Without external trim)

TEST CONDITIONS
RS~

MIN.

MAX.

UNITS

0.5

2.5

I nput Offset Current

2.0

35

nA

Input Bias Current

42

125

nA

Input Noise Voltage

Input Noise Current

10 kn

TYP.

mV

fo = 10 Hz

15

nV/..jHZ

fo = 100 Hz

9.0

nV/v'HZ

fo = 1 kHz

8.0

nV/v'HZ

fo = 10 Hz

1.0

fo = 100 Hz

0.3

pA/$z"
pAl yHz

fo = 1 kHz

0.15

pA/..jHZ

1.5

Mn

±14

V

Input Resistance
Input Voltage Range

±13.5

Large Signal Voltage Gain

RL 2. 2 kn, VOUT = ±10 V

Common Mode Rejection Ratio

RS~

10 kn

Power Supply Rejection Ratio

RS~

10 kn

250,000
94

3,000,000

V/V

120
2.0

dB
35

IlV/V

RL2. 10 kn

±12

±13.5

RL2. 2 kn

±10

±13.5

V

Output Resistance

150

n

Power Consumption

80

Output Voltage Swing

V

150

mW

The following specifications apply for O°C ~ T A ~ +70°C unless otherwise specified:
Input Offset Voltage (Without external trim)

RS~10kn

Average Input Offset Voltage Drift
(Without external trim)

RS= 50n

2.0

IlVtC

Average Input Offset Voltage Drift
(With external trim)

RS= 50n

0.6

IlVrC

Input Offset Current

3.5

TA = +70°C

1.2

35

TA = O°C

4.0

50

10

Average Input Offset Current Drift
Input Bias Current

nA
pArC

125

nA

TA =O°C

250

nA

RL2.2kn,TA=0"C
RS~

10 kn

Power Sup'ply Rejection Ratio

RS~

10kn

Output Voltage Swing

RL2. 2 kn

Common Mode Rejection Ratio

nA

TA = +70°C

RL 2. 2 kn, T A = +70
Large Signal Voltage

mV

0

125,000

V/V

125,000

V/V

±10

3-34

115

dB

20

IlV/V
V

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A725
TYPICAL PERFORMANCE CURVES FOR ALL TYPES (Unless Otherwise Specified)
INPUT OFFSET CURRENT
AS A FUNCTION
OF TEMPERATURE
725A AND 725

INPUT OFFSET CURRENT
AS A FUNCTION
OF TEMPERATURE
725C AND 725E

vs' :!:15V

1\

Vs' ±15V

\
\

\

I~

-- ----

~

-........

...........

i'0

0
-60

-20

20

60

TEMPERATURE -

140

100

0

°c

30

40

50

60

70

_·c

INPUT BIAS CURRENT
AS A FUNCTION
OF TEMPERATURE
725C AND 725E
100

100

\

80

~

\.\ ~
r-.,."\ ~

v Vs

0

±20V

0

±15V-

r---.. ~ ~ ~

z

V °:!:lOvY' ~
s
v ±5V
I
Sl
I

20

o

-60

0

-20

20

40

0;

r-.:::: ~ ~"-

Z

Vs
20

~

o

140

Vs

r-- r-- I---.!.

=>

~~

Vs o t20V

t:--

u

«

100

60

TEMPERATURE -

-- - -

•

60

Z

Vs

~ ~ k::

=>

0

0

±15V

7 t--- -=::

±~OV

Vs

t5V

0

010203040506070
TEMPERATURE - °c

·c

SUPPLY VOLTAGE
REJECTION RATIO
AS A FUNCTION
OF TEMPERATURE

COMMON MODE REJECTION
RATIO ASA FUNCTION OF
TEMPERATURE
10

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
TEMPERATURE
411

1

Vs ±15V

Vs.· ±2OV

36

Vs o± 15V

0

120

20

TEMPERATURE

INPUT BIAS CURRENT
AS A FUNeTION
OF TEMPERATURE
725A AND 725

80

10

I

32

I

!

100 I--+--+-+--t--+--+---+---t--t-___l

I

i

-60

-20

Vs .Lov

I
Vs o:!:5V

I

r100

60

20

I

20

12

I

o

24

16

l

I -K

Vs .115V

28

140

RL~2kQ

o

1

-20

-60

20

100

60

TEMPERATURE - ·C

TEMPERATURE _·C

TEMPERATURE _·C

COMMON MODE REJECTION
RATIO AS A FUNCTION
OF SUPPL Y VOLTAGE

D.C. CLOSED LOOP
VOLTAGE GAIN ERROR
AS A FUNCTION OF
SOURCE RESISTANCE

COMMON MODE INPUT
VOL TAGE RANGE AS A
FUNCTION OF
SUPPLY VOLTAGE

1.0

20

I

TA = 25·C

TA

AVCL -10000
120

~=l:==F=--+-+-"""'''''''''''''=j

.~oc

16

/

0.1
12

lOOI---+----+-----t---+--~--___l

AVCL-lOOO

I

801---+----+-----t---+--~--___l

0.01

V

l

AVCL - 100

V

/'

140

V

//

I
0.001
SUPPLY VOLTAGE - tV

I

10

100
SOURCE

lk
RESISTA~CE

3-35

10k
- Q

lOOk

1M

o

5

10

15

SUPPLY VOLTAGE - tV

20

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A725
TYPICAL PERFORMANCE CURVES FOR All TYPES (Unless Otherwise Specified)
CHANGt:JNJNPU"'O~fSET

INPUT OFFSET VOLTAGE
DRIFT ASA
FUNCTION OF TIME
50

STABILIZATION TIME OF
INPUT OFFSET VOLTAGE
FROM POWER TURN-ON

,I,

VS' ±15V

30

40

TA - 25°C
Vs - ±15V
PREVIOUS

VosS20~Vatt·0

TA " 40°C

40

VOLTAGE DUE TO
THERMAL SHOCK AS A
FUNCTION OF TIME

Vosl~I~~_

I

!

30

I

1

,I

\i

20

"-

I----

r--

10

-~

//
o
o
zoo

I'-....

600

-tAPPLY
-10
-20

TIME - HRS

TIME FROM POWER APPLICATION - MIN

INPUT NOISE VOLTAGE
AS A FUNCTION
OF FRE(lUENCY

INPUT NOISE CURRENT
AS A FUNCTION

40

60

il1

100

I--TA ' 25°C

lJI

I
I---- 10Hz - 100kHz

II

I

/

~

/'

1

/

1--""'"

I'.

I~Hl! 10kJz

I-"

"./
/

.... ~

111

r-- ~

Ik

lOOk

10k

100

lk

FREQUENCY - Hz

lOOk

"

1'\
c:
I

j

10k

'\

~
Ik

-

........ r-.....

~ ~r1if
10

-

10 3

\

12

t~~1

1\

1\
V

1111

o

100

10"

lk

~ ~~~~v ~
/

/

/~~
I-~",~

vy

/
10

vV A
100

FREQUENCY - Hz

lOOt

100

n

'\.

120

r\.

:--.~

Ik

100

7Z5A and 725

'\

80

"\.

725Eand 725C

/ I,ll

1/
lk

10k

"

zoo
100

-r-r-r-...., -r-

25

45

65

B5

TEMPERATURE - °c

3-36

1M

-r- -

r--

60

I RL

105

125

-60

_

I . . .~

~

r--

vJ'±llv-r--

40

o

'00

~

Ik

)(

~

60 1----+---"....:
-~

30

~

t---t---f--..po....'

RZI--

-Rl/

'"

-

10

§

~

100

40

20

~

i:l

"t/,

10

102

I

I'-..

I I II

I

li-...

I III

I
I

I III

104

ClOS£D lOOP GAl N- VIV

""

z

"'"
'-....

105

z

FREQUENCY - Hz

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
FREQUENCY FOR
RECOMMENDED
COMPENSATION
NETWORKS

SLEW RATE AS A FUNCTION
OF CLOSED-LOOP GAIN
USING RECOMMENDED
COMPENSATION NETWOR KS

,

2S

~

I

I I II

104

103

I I II

...... I--r-.

RI ' 10Q c i '.OOIif R2 ' 39Q c 2 ' .0211f ........ ,

-20

I

I

RI • Z7Q c i ..OOIif RZ' Z70Q c 2 .' .001511f"~

10

FREQUENCY - Hz

""'" "'"

I I II

RI • 47Q c i .. Ollif

Z

~

TA • 2S°C
vs' :t15V

......

RI • 470Q c i •• 0011if

60
lID

90

I

I I II

10k

7

-

RI • lOW c i '50pf,

80

100

10

\

I

=vs' ±15V
=TA '2S°C

./

AV'IO,OOO

~

1.0

,/

\, Av' 1000

II

Ay'IOO
Av\IO

Ili~

~

1\

TA • 2S°C

o

~S~~I15~

0.01

1\

1\

\

0.001

uP

103

10

~ 0.1

\

./
,/

100

10

I

VOLTAGE OFFSET
NULL CIRCUIT

FREQUENCY
COMPENSATION
CIRCUIT

COMPENSATION
COMPONENT VALUES

v+

10000

1000

CLOSED lOOP GAl N- VIV

FREQUENCY - Hz

R1

C1

R2

AV

(n)

(~F)

(n)

(~F)

10,000
1,000
100
10
1

10 k
470
47
27
10

50pF
.0()1

-

-

-

.01
.05
.05

-

-

Cl

270
39

.0015
.02

R

C2

TRANSIENT RESPONSE
TEST CIRCUIT

II-use sIn

R3 =
when the amplifier
":' is operated with capacitive load.

TRANSIENT RESPONSE
1200

50kn

9O'ro/

>-=·.....- - V O U T

/

400
2kn

I

150pF

- t..Fi
I~

Pin numbers are shown for Metal Can oflly.

3-37

/

I
I

I
I

VS' :!"15V
TA '2S°C_
RL '2kQ
C '150pf_
L
AVCL=I~

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A725
TYPICAL APPLICATIONS
PRECISION AMPLIFIER - AVCL

= 1000

ACTIVE FILTER - BANDPASS WITH 60 dB GAIN
ACTIVE FILTER
FREQUENCY RESPONSE
100

I

I!

~

X

R3 . 1 )
) (.
AV • Av , DC)e+cy/e
- 2R
, R3+ S+ j211fDC 3

80

I_fl=~
2nR C VC / Cx

!



!i

,/
,;'

7.0

9.0

11

SUPPLY VOLTAGE-V

3-44

13

15

~

"'"'-

.....................

2.0

o

o
5.0

"-

~ 4.0

,/

!: 0.2

60
.

en

/7

~

140

8.0

=L

a~

...&l1.2
Z

-60

-20

20
60
TEMPERATURE _oC

100

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS

• IlA730

730e

ELECTRICAL CHARACTERISTICS (T A = 25°C, V+ = 12.0 V, and VCM = 3.5 V unless otherwise specified)
PARAMETER

CONDITIONS

TYP.

MIN.

RS ~ 50n

Input Offset Voltage

MAX.

UNITS

2.0

5.0

mV

Input Offset Current

0.7

3.0

Input Bias Current

4.5

16.0

J,LA
J,LA

Input Resistance
Differential Voltage Gain

RL;;;' 100 kn

Differential Distortion

RL;;;' 100 kn

Bandwidth

kn

2.5

15

100

135

160

85

300

1.0

1.5

Single-Ended Output Resistance

mVp-p
MHz

70

n

500

Output Voltage Swing

RL;;;' 100 kn

Supply Current

RL;;;' 100 kn

9.5

13

rnA

Power Consumption

RL;;;' 100 kn

114

156

mW

RS ~ 50n
o
TA = +70 C

7.5

mV

0.5

3.0

J,LA

TA =OoC

0.8

5.0

J,LA

TA =OoC

5.0

20

J,LA

Vp-p

8.0

5.0

The following specifications apply for O°C ~ T A ~ +70°C
Input Offset Voltage
Input Offset Current
Input Bias Current

kn

1.8

Input Resistance

+5.2

+3.5

Input Voltage Range
RS ~ 50n
f ~ 1.0 kHz,

Common Mode Rejection Ratio

60

dB

80

+3.5V ~ V CM ~ +5.2V
RL;;;' 100 kn

Differential Voltage Gain

190

80
5.0

Common Mode Output Voltage

7.0

Output Resistance
4.5

Output Voltage Swing
Supply Current

V

on
Vp~p

7.5

TA =OoC

10

15

rnA

TA = +70°C

8.8

13

rnA

120

180

mW

106

156

mW

TA =OoC
Power Consumption

8.0
600

TA = +70°C

TYPICAL PERFORMANCE CURVES FOR 730C

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT OFFSE'T CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

2.0

10

1.0

Y+'12Y

./

1. 0.8

,

--- -- - o
010203040506070
TEMPERATURE _·c

Y+'12Y

TA' 25"c

/

ia

0.6

V

~~0.4

i
:! 0.2

o

5.0

/'
r-- r--

... V
/'"

/

2.0

-- --

..........

o
7.0

9.0

11

SUPPLY VOLTAGE-Y

3-45

13

15

010203040506070
TEMPERATURE -"c

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA730
TYPICAL

PERFORMAI~tCECURVESFOR

INPUT BIAS CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

INPUT RESISTANCE
AS A FUNCTION OF
AMBI ENT TEMPERATURE
S.O

TA • 2S"C

c 4.0
~

./'

~

/'

~ 3.0

a

eo

V

...~~

",

i3

~
z
- 1.0

7.0

5.0

9.0

11

13

-60

-1.0

20

60

100

-10

V
-..... ~

~ 120

g

;i

~

..........

y+. 12Y

Itis

~eoo
I

z
o

Ii 600

eo

,/

If

~

./

~

110

V

is

/
j

V

/V

40
_i""""

o

90
-20

20
60
TEMPERATURE -"C

100

140

5.0

7.0

9.0

11

o

13

-60

IS

OUTPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

Y+'IZY

\

:;~10

I
<:>

V ......

z

~

...

-

7.5

<:>

C

!:l
o 6.5

<:>

z

i'--~

V

i'..

/

~ e.o

...
<:>

C

~

!:l

~ 6.0

>

~
~

S

40

100

140

TA' 2S"C

>~e.5

\

r--

60
20
TEMPERATURE -"C

12

9.S

................

V

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
SUPPLY VOLTAGE

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
AMBIENT TEMPERATURE

y+, 12Y

"-

-20

SUPPLY YOLTAGE-Y

120

So

30

~

/

/V

~

...............

-60

10

1000

<:>

~ 130

-30

TA' 2S"C

~ 170

....

/ ~
F ~~

DIFFERENTIAL DISTORTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

200

---

'"

INPUT YOLTAGE -mY

y+. 12Y

~

A'

-S.O
-SO

140

01 FFERENTIAL VOLTAGE GAIN
AS A FUNCTION OF
SUPPL Y VOLTAGE

190

1-

j

-3.0

~

-20

J.~ TA'125"C

TEMPERATURE -"C

DIFFERENTIAL VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

~

i

./

SUPPLY YOLTAGE-Y

~ ISO

1.0

g

.... V

o

15

!

~

V
---'

o

TA'-SS"C~/

:or

60

a: 40
.....
~
l!
20

.....

TA' 2S"C

~ --=

3.0

~.

V

~ 2.0

Y+·12Y

Y· '12Y

V

en

<:>

VOLTAGE TRANSFER
CHARACTERISTICS

100

S.O

...

73_0

i.....

,/

S 4.0

5.5

V

V

V

V

V

/
~

20
-60

-20

20
60
TEMPERATURE -"C

100

140.

4.5
-60

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE

10

V-

I
~

~V

~ 7.0

...
<:>

~

-

J

....... ~

0.5

1.0

2.0

5.0

10

20

6.0
-60

13

11

15

SUPPLY CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE
TA' 25"C

V

/'"

,

V

e.o

"

e.o

LOAD RESISTANCE - kA

9.0

SUPPLY YOLTAGE - Y

6.0

/V

./';1'

V

4.0

7.0

0.2

7.0

10

r-- .........
.......

I

2.0
5.0

12

9.0

5.0

4.0
0.1

140

y+ '12Y

/

~ 6.0

100

SUPPLY CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

TA ' 2S"C
Y+'12Y

...
:::,e.o

is

20
60
TEMPERATURE -"C

11

9.0

~

-20

-20

20

60

TEMPERATURE -"C

3-46

100

140

2.0
5.0

7.0

9.0

11

SUPPLY VOLTAGE - V

13

15

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p,A730
TV~CALPERFORMANCECURVESFOR730C

INPUT BIAS CURRENT
ASA FUNCTION OF
SUPPLY VOLTAGE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARACTERISTICS

50

6.0

".,

.......

5.0

V+'12V

TA' 25·C

V+=12V

40

l /V

.!.

V

".,1--'"

V .....

~

. . .V

a
~

-3.0

13

11

9.0

TEMPERATURE _oc

DIFFERENTIAL VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

01 FFERENTIAL VOLTAGE GAIN
AS A FUNCTION OF
SUPPL Y VOLTAGE

z 170

z 160

~

~

~
~ 120

~ 150

-

~ 130

15
15

--

t--- t---

I::

Q 110

10

30

20

40

t--

60

~
~

70

~2400

V

eo

I

~
~ 300

l/

V

is

~
15

.... v

~

1.0

5.0

9.0

13

11

OUTPUT VOLTAGE SWING
AS A FUNCTION OF.
AMBIENT TEMPERATURE

010203040506010
TEMPERATURE _oC

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
SUPPLY VOLTAGE
12

V+'12V

TA' 25°C

~ff

90

I

~

V

~ eo
10

1...--v

r-

~

10

C!)

z

~

8.0

r- r-- I--

/

4.5
010203040506010

17

o

10

20

TEMPERATURE _·C

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
9.0

30
40
50
TEMPERATURE _oc

9.0

~55.0
4.0
0.1

I

/

0.5

1.0

2.0

5.0

LOAD RFSISTANCE - til

10

20

11

13

SUPPL Y CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

V-

10

r-- I---

1---1--

r--

. . . . 1/'

8.0

e.o

6.0

7.0

4.0

o

15

TA = 25°C

6.0
0.2

9.0

12

/

<:>

1.0

V+=12V

V
7.0

2.0
5.0

SUPPLY VOLTAGE - V

10

V"""

I
~

6.0

10

1

.!-e.o

~

60

SUPPL Y CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

TA = 25·C
V+=12V -

g

/

V

V

/

50

~

/

V

60

...

V

V

V

/

o

9.5
V+'12V

~

100

15

OUTPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

--- r-..

200

ffi

............

40

V

Ii;

SUPPLY VOLTAGE-V

100

50

V+ =12V

TEMPERATURE _·C

;

30

DIFFERENTIAL DISTORTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

. . . .,v

o

50

10

INPUT VOLTAGE-mV

500

g

Q

o

-10

-30

TA,25·C

~

~

-50

200

V+aI2V

1-.-. ~

-5.0

010203040506010

15

SUPPLY VOlTAGE-V

190

5

,~

o
7.0

/

,.I?'
...

1.0

c::a

-1.0

10

2.0

~I

5o

~~

90

,

1.0

>

I-

. '".

.i ""-TA=+7O"C

>

V .....

5.0

TA'25"C",

TA=O"C .~

3.0

V"

1/

./

1/

2.0
10

20

30

40

50

TEMPERATURE -"c

3-47

60

70

5.0

7.0

9.0

11

SUPPLY VOLTAGE - V

13

15

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA730
TYPICAL PERFORMANCE CURVES FOR 730 AND 730C

COMMON MODE REJECTION
RATIO AS A FUNCTION OF
AMBIENT TEMPERATURE

'+

105

Y+'I2v
+3.5 YSVCMH5.2 Y

~

2 95
i

~a::

~

:a

8

10

10

TA : 25·C

y+. 12 Y_

,
9.0

. /V

~

-

/ ~

~

5

r-~

S
o

~ 7.0

65

16.0
....

55
-60

/'

8.0

75

--

-20

20

60

TEMPERATURE _·C

100

140

5.0
-60

/

."

/'

V

."

........

:a

i
!

COMMON MODE OUTPUT VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE

>

~

z

52 85

COMMON MODE OUTPUT
VOLTAGE ASA FUNCTION OF
AMBIENT TEMPERATURE

o
-20

20
60
TEMPERATURE _·C

3-48

100

140

5.0

7.0

9.0

11

SUPPLY YOLTAGE-Y

13

15

IJA740
FET INPUT OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ~A740 is a high performance monolithic FET-Input Operational
Amplifier constructed using the Fairchild Planar* epitaxial process. It is intended for a wide range of
analog applications where very high input impedance is required and features very low input offset
current and very low input bias current. High slew rate, high common mode voltage range and
absence of "latch up" make the ~A740 ideal for use as a voltage follower. The high gain and wide
range of operating voltages provide superior performance in active filters, integrators, summing
amplifiers, sample and holds, transducer amplifiers, and other general feedback applications. The
J,LA740 is short circuit protected and has the same pin configuration as the popular ~A741 operational
amplifier. No external components for frequency compensation are required as the internal 6 dB/
octave roll-off insures stability in closed loop applications.
•
•
•
•
•
•

HIGH INPUT IMPEDANCE .•• 1,000,000 Mn
NO FREQUENCY COMPENSATION REQUIRED
SHORT-CIRCUIT PROTECTION
OFFSET VOLTAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
NO LATCH UP

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Differential Input Voltage
Input Voltage (Note 2)
Voltage between Offset Null and V+
Storage Temperature Range
Operating Temperature Range
Military (740)
Commercial (740C)
Lead Temperature (Soldering, 60 seconds)
Output Short-Circuit Duration (Note 3)

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE S8

NC

INVERTING
INPUT ...

OUTPUT

.r------.

V-

±22V
SOOmW
±30V
±1SV
±o.SV
-6SoC to +1S00C
-SSoC to +12SoC
OOC to +70 0 C
300°C
Indefinite

NOTE: Pin 4 Connected to Case.

ORDER INFORMATION
TYPE
PART NO.
740
740 HM
740C
740 HC

OUTPUT

*Planar is a patented Fairchild process.

Notes on following pages.

3-49

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A740
740

ELECTRICAL CHARACTERISTICS (VS = ±15V, TC = 25 0 C unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage

MIN.

TYP.

I nput Resistance

10

20

mV

150

pA

100

200

1,000,000
RL ~2kn, VOUT

Large Signal Voltage Gain

= ±10V

50,000

UNITS

40

RS::;;;;;100kn

Input Offset Current [Note 4]
I nput Current (either input) [Note 4]

MAX.

pA
Mn

1,000,000

Output Resistance

75

Output Short-Circuit Current

20

rnA

80

dB

Common Mode Rejection Ratio

64

Supply Voltage Rejection Ratio

n

70

300

J,LV/V

Supply Current

4.2

5.2

rnA

Power Consumption

126

156

mW

Slew Rate

6.0

V/J,Ls

Unity Gain Bandwidth

3.0

MHz

Transient Response
(Unity Gain)

Risetime
Overshoot

CL ::;;;;;100pF, RL = 2kn, VIN

110
10

= 100mV

ns
20

%

±12

V

The following specifications apply for TC = -55°C to +8SOC:
±10

Input Voltage Range
Large Signal Voltage Gain

25,000

Output Voltage Swing
Input Offset Voltage
I nput Offset Current

RL~10kn

±12

±14

RL~2kn

±10

±13

RS::;;;;; 100kn

15

TA =-55 O C

30

TA =+85 O C

185

TA = +85 O C

~

3

pA

TRANSI ENT RESPONSE
TEST CIRCUIT

rv+

Your
~

K
V

2~6

5
6

+

1'"

3-50

'/

~CL
~

~

RL

mV
pA

2.5

VOL TAGE OFFSET
NULL CIRCUIT

-

V
30

TA =- 55°C

I nput Current (either input)

2

V

200

pA

4.0

nA

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p,A740

740C

ELECTRICAL CHARACTERISTICS (VS = ±15V, TC = 25 0 C unless otherwise specified)
PARAMETER

CONDITIONS

MIN.

RS ~100kn

Input Offset Voltage
Input Offset Current (Note 4)
Input Current (either input) [Note 4]
Input Resistance

TYP.

MAX.

30

110

mV

60

300

pA

0.1

2.0

RL~2kn, VOUT =±1OV

20,000

nA
Mn

1,000,000

Large Signal Voltage Gain

UNITS

1,000,000

Output Resistance

75

Output Short-Circuit Current

20

n
rnA

Supply Current

4.2

8.0

Power Consumption

126

240

Slew Rate

6.0

V/ILS

Unity Gain Bandwidth

1.0

MHz

Transient Response
(Un~ity Gain)

Risetime
Overshoot

CL ~100pF, RL = 2kn, VIN = 100mV

rnA
mW

300

ns

10

%

The following specifications apply for OOC ~T A ~+70oC:
I nput Voltage Range
Common Mode Rejection Ratio

±10

±12

55

80

Supply Voltage Rejection Ratio

70

Large Signal Voltage Gain
Output Voltage Swing

V
dB
500

RL~10kn

±12

±14

V

RL~2kn

±10

±13

V

Input Offset Voltage

30

mV

Input Offset Current

60

pA

I nput Current (either input)

1.1

10

NOTES:
1.
2.
3.
4.

,."V/V

500,000

Rating applies for ambient temperature to +70 0 C; derate linearly at 6.3mW/oC for ambient temperatures above +70 0 C.
For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
Short circuit may be to ground or either supply. Rating applies to +125 0 C case temperature or +75 0 C ambient temperature.
Typically doubles for every 10°C increase in ambient temperature.

3-51

nA

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p,A740
TYPICAL PERFORMANCE CURVES FOR 740 AND 740C

INPUT BIAS CURRENT AS A
FUNCTION OF AMBIENT
TEMPERATURE

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF FREQUENCY
107

4.0

Vs = ~15V
3.5 I-TA = 25°C

lis =.15V
TA = 25°C

108

" "-

3.0
105
2.5
104

2.0
1.5

'" "-

103

J

1.0
0.5

-"V

/

102
0
1

-0.5

-1.0

-75

-50

-25

25

50

75

""

[\

100

10

100

lk

10k

lOOk

1M

10M

TA - AMBIENT TEMPERATURE - ·C

f - FREQUENCY - Hz

OUTPUT VOLTAGE SWING AS A
FUNCTION OF FREQUENCY

INPUT NOISE VOLTAGE ASA
FUNCTION OF FREQUENCY

40

'lis ~ !IIS'V

35

Vs 1= ~!~v=
TA = 25°C'

"\.

=

TA =25°C-

10- 13

32

"-

2B
24

......

"\

20

\

16

\

12

r-r-

10- 15

~

-

10-18

"\
100

lk

10k

1M

1001<

10

100

lk

10k

lOOk

f - FREQUENCY - Hz

f - FREQUENCY - Hz

VOLTAGE FOLLOWER LARGE
SIGNAL PULSE RESPONSE

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF FREQUENCY

+10

vi •

±1'5V
TA =25°C -

+S
+6

r-+4

-45

I

1\
\

+2
/"--,OUTPUT

/

-2
-4
-6

~

\

-90

r--....
....... j\

v
_...I.

Vs =1. 15V
TA = 25°C

1\
INPui/ ~-

-\.

-

-135

-S
-10

-ISO
TIME - p.

1

10

100

lk

10k

lOOk

f - FREQUENCY - Hz

3-52

1M

10M

IJA741
FREQUENCY-COMPENSATED OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The JLA741 is a high performance monolithic Operational Amplifier
constructed using the Fairchild Planar* epitaxial process. It is intended for a wide range of analog
applications. High common mode voltage range and absence of "latch-up" tendencies make the
JLA741 ideal for use as a voltage follower. The high gain and wide range of operating voltage provides
superior performance in integrator, summing amplifier, and general feedback applications.
•
•
•
•
•
•

NO FREQUENCY COMPENSATION REQUIRED
SHORT CIRCUIT PROTECTION
OFFSET VOLTAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWER CONSUMPTION
NO LATCH UP

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Military (741)
Commercial (741 C)
Internal Power Dissipation (Note 1)
Metal Can
DIP
Mini DIP
Flatpak
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP, and Flatpak
Mini DIP
Operating Temperature Range
Military (741)
Commercial (741C)
Lead Temperature (Soldering)
Metal Can, DIP, and Flatpak (60 seconds)
Mini DIP (10 seconds)
Output Short Circuit Duration (Note 3)

CONNECTION DIAGRAMS
a-LEAD METAL CAN
(lOP VIEW)
PACKAGE OUTLINE 58

Note: Pin 4 connected to case

ORDER
TYPE
741
741C
±22 V
±18 V
500mW
670mW
310 mW
570 mW
±30 V
±15 V
-65°C to +150°C
_55° C to +125° C
-55°C to +125°C
O°C to +70°C
300°C
260°C
Indefinite

INFORMAT~ON

PART NO.
741HM
741HC

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

OFFSET NULL

3

NON· INVERT
INPUT

5

y-

6

OUTPUT

OFFSET
NULL

ORDER INFORMATION
TYPE
PART NO.
741
741DM
741C
741DC
10-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 3F

INVERTING INPUT
NQN·INVERTING
INPUT

EQUIVALENT CIRCUIT
r-~--------~----~------------~----------------~-ov+

OffSET

y-

ORDER INFORMATION
TYPE
PART NO.
741
741FM

OUTPUT

a-LEAD MINIDIP
(TOP VIEW)
PACKAGE OUTLINE 9T

OfFSETNUllE)8 NC
INVERT INPUT
NON· INVERT
INPUT

v-

....

2

+

7

4

V+

6

3

OUTPUT

5

~~Fl~ET

ORDER INFORMATION
TYPE
PART NO.
741C
741TC
*Planar is a patented Fairchild process.

Notes on follol/Ving pages.

3-53

•

~A741

FAIRCHILD LINEAR INTEGRATED CIRCUITS •
741
ELECTRICAL CHARACTERISTICS (VS

= ±15 V, TA = 25°C unless otherwise specified)

PARAMETERS (see definitions)

CONDITIONS

I nput Offset Voltage

MIN.

,

TYP.

MAX.

UNITS

1.0

5.0

I nput Offset Current

20

200

nA

Input Bias Current

80

500

nA

RS ..;;; 10 kn

Input Resistance

0.3

I nput Capacitance
Offset Voltage Adjustment Range
Large Signal Voltage Gain

50,000

RL;;;' 2 kn, VOUT = ±10 V

mV

2.0

Mn

1.4

pF

±15

mV

200,000

,Output Resistance

75

Output Short Circuit Current

25

Supply Current

1.7

2.8

mA

Power Consumption

50

85

mW

Transient Response
(Unity Gain)

Risetime

VIN

Overshoot

Slew Rate

= 20 mY, RL = 2

kn,cL";;; 100 pF

RL;;;' 2 kn

n
mA

0.3

/.Ls

5.0

%

0.5

V//.LS

The following specifications apply for -55°C";;; T A";;; +125°C:
Input Offset Voltage

RS";;; 10 kn

1.0

6.0

mV

= +125°C
TA = _55°C
TA = +125°C
TA = -55°C

7.0

200

nA

TA

I nput Offset Current
I nputBias Current
I nput Voltage Range
Common Mode Rejection Ratio

RS";;; 10 kn

Supply Voltage Rejection Ratio

RS";;; 10 kn

Large Signal Voltage Gain

RL;;;' 2 kn, VOUT

Output Voltage Swing

85

500

nA

0.03

0.5

/.LA

0.3

1.5

/.LA

±12

±13

V

70

90

dB

RL;;;' 10 kn

±12

±14

RL;;;' 2 kn

±10

±13

= +125°C
TA = -55°C
TA

Power Consumption

TA

/.LV/V

25,000

TA

Supply Current

150

30

= ±10 V

= +125°C
= -55°C

V
V

1.5

2.5

2.0

3.3

mA
mA

45

75

mW

60

100

mW

TYPICAL PERFORMANCE CURVES FOR 741

115

16

«l

T~ • 25~C

105

/~

100

,,/

......-

.........
,,/

>

/

20

~

16

~

12

~

85

16

zo

/

/

~

§

...,.--

+125'C

14

/V

~ 24

//

12

/

32

~

90

SUPPLY VOLTAGE-tV

RL~2kll

~ 28

//

-55'C--l---

j'
I NPUT-!

~

V '± lSV
s
T ' 2S·C

A

1\
\

0.8 ~->--~>------+-----+--+--I
V-

0.6 L-._'------''-----L_---'-_--'-_--'
5
15
10
20

01020

30

40

50

ro

00

III

90

TIME -~s

SUPPLY VOlTAGE - tV

TYPICAL APPLICATIONS
UNITY-GAIN VOLTAGE FOLLOWER

~

. NON·INVERTING AMPLIFIER

C ~
:A741~

:~.

0

INPUT

OUTPUT

R1R2
Rl+R2

INPUT

GAIN

RIN = 400 Mn
CIN= 1 pF
ROUT

<<

10
100
1000

1 n

B.W. = 1 MHz

0
OUTPUT

R1

R2

B.W.

1 kn
100 n
100 n

9 kn
9.9 kn
99.9 kn

100 kHz
10 kHz
1 kHz

INVERTING AMPLIFIER

CLIPPING AMPLIFIER

OUTPUT

OUTPUT

GAIN
1
10
100
1000

B.W.

10 kn
1 kn
1 kn
100 n

10
10
100
100

kn
kn
kn
kn

1 MHz
100 kHz
10 kHz
1 kHz

10 kn
1 kn
1 kn
100 n

EOUT
R2
- - =-if
EIN
R1

1EOUT I.;;;

Vz + 0.7 V

where V Z = Zener breakdown voltage

3-58

RIN
400 Mn
280 Mn
80 Mn

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JLA741
TYPICAL APPLICATIONS (Cont'd)
SIMPLE DIFFERENTIATOR

SIMPLE INTEGRATOR

INPUT

lID
f= 1 kHz

Cl

0.1

~F

~VV
~

"A±

INPUT

f = 1 kHz

~Cl0.l~F

Rl 10 kfl

li±

2

OUTPUT

OUTPUT
R3 10kfl

R3 9.1 kfl

LOW DRIFT LOW NOISE AMPLIFIER

HIGH SLEW RATE POWER AMPLIFIER

+15V
+15V

1

5.1 kfl
OUTPUT

INPUT

OUTPUT

RL

15fl

-15V

Voltage Gain = 10 3
Input Offset Vol'tage Drift = 0.6 p,V/oC
I nput Offset Current Drift = 2.0 pAlo C

NOTCH FILTER USING THE p,A741 AS A GYRATOR

NOTCH FREQUENCY AS A
FUNCTION OF C1

OUTPUT

'"

Trim R3 such that

RI

R;

R3
=

Ik

t-....

2 R4

'" 1"."

100

t-...."
10

0.(01)1

'"
0.001

CAPACITOR C 1

3-59

0.1

0.01
~F

1.0

•

IJA741A • IJA741E
FREQUENCY COMPENSATED OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ~A741A and E are high performance monolithic Operation·al
Amplifiers constructed using the Fairchild Planar* epitaxi~1 process. They a~e intended for a wide
range of analog applications. High common mode voltage range and absence of "latch-up" tendencies
make the ~A741 A and E ideal for use as voltage followers. The high gain and wide range of
operating voltage provides superior performance in integrator, summing amplifier, and general feedback applications. Electrical characteristics are identical to MI L-M-38510/1 0101.

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58
NC

•
•
•
•
•
•

NO FREQUENCY COMPENSATION REQUIRED
SHORT-CIRCUIT PROTECTION
OFFSET VOLTAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOWPOWER CONSUMPTION
NO LATCH UP
ORDER INFORMATION

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Flatpak
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Operating Temperature Range
Military (741 A)
Commercial (741 E)
Lead Temperature (Soldering, 60 seconds)
Output Short Circuit Duration (Note 3)

±22V
500mW
670mW
570mW
±30V
±15V
-65°C to +150°C
_55° C to +125° C
O°C to +70°C
300°C
Indefinite

TYPE
741A
741EC

PART NO.
741AHM
741EHC

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

OFFSET NUll

3

NON INVERT

5

OUTPUT

INPUT
y-

OFFSET

6

NULL

NC -...._ _---1,

EQUIVALENT CIRCUIT
ORDER INFORMATION

INV. INPUT

~----+---"----"-----"'-"""'--------"""'-O+Vcc

NON-INV.
INPUT
OUTPUT

TYPE
741A
741EC

PART NO.
741ADM
741EDC

10-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 3F

INVERTING INPUT
NON INVERTING
INPUT

OFFSET

NULL
Rl
lkfl

R3
50kfl

R2
lkfl

ORDER INFORMATION
~-~-4--+--~---~-~--~~~-~--~-4--~~-Vcc

TYPE
741A

OFFSET

NULL

PART NO.
741AFM

·Planar is a patented Fairchild process.

Notes on following pages.

3-60

FAIRCHILD LINEAR INTEGRATED CIRCUITS.

~A741A. ~A741E

741A
ELECTRICAL CHARACTERISTICS (VS = ±15V, TA = 25°C unless otherwise specified)
PARAMETERS (see definitions)

CONDITIONS

Input Offset Voltage

RS'" 50n

MIN.

TYP.
0.8

Average Input Offset Voltage Drift
Input Offset Current

3.0

Average Input Offset Current Drift
Input Bias Current
Power Supply Rejection Ratio

Vs = +10, -20; Vs

= +20, -10V, RS = 50n

Output Short Circuit Current

10

Power Dissipation

Vs = ±20V

I nput Impedance

Vs = ±20V

Large Signal Voltage Gain

Vs = ±20V, RL = 2kn, VOUT

1.0

= ±15V

MAX.
3.0

mV

15

j.tV/oC

30

nA

0.5

nA/oC

30

80

nA

15

50

j.tV/V

25

35

mA

80

150

mW
Mn.

6.0

V/mV

50

Transient Response I

Rise Time

0.25

0.8

(Unity Gain)

Overshoot

6.0

20

I

Bandwidth (Note 4)
Slew Rate (Unity Gain)

VIN

= ±10V

UNITS

j.tS
%

.437

1.5

MHz

0.3

0.7

V/j.ts

The following specifications apply for -55°C'" T A'" +125°C
Input Offset Voltage

4.0

Input Offset Current

70

nA

210

nA

Input Bias Current
Common Mode Rejection Ratio

Vs

Adjustment For Input Offset Voltage

Vs

= ±20V, VIN = ±15V, RS = 50n
= ±20V

Output Short Circuit Current
Power Dissipation
I nput Impedance

Vs

Large Signal Voltage Gain

= ±20V

= 10kn
Vs = ±20V,
RL = 2kn.
Vs = ±20V, RL = 2kn., VOUT = ±15V
Vs = ±5V, RL = 2kn., VOUT = ±2 V
I RL

I

dB

95

mV

10
10

I-55°C
Vs = ±20V I
+125°C

Output Voltage Swing

80

mV

40

mA

165

mW

135

mW

0.5

Mn

±16

V

±15

V

32

V/mV

10

V/mV

NOTES
1. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3mW/oC for the Metal Can, 8.3mWfOC for
the DIP and 7.1 mW/o C for the Flatpak.
2. For supply voltages less than ±15V. the absolute maximum input voltage is equal to the supply voltage.
.
3. Short circuit may be to ground or either supply. Rating applies to +125° C case temperature or 75° Cambient temperature.
4. Calculated value from: BW(MHz) =

.
0.35
Rise Time (j.ts)

3-61

•

~A741A. ~A741E

FAIRCHILD LINEAR INTEGRATED CIRCUITS.
741E
ELECTRICAL CHARACTERISTICS.(VS

= ±15V, TA = 25°C unless otherwise specified)

PARAMETERS (see definitions)

CONDITIONS

Input Offset Voltage

RS

=E;;;

MIN.

50n

MAX.

0.8

3.0

mV

15

ILV/oC

Average Input Offset Voltage Drift
Input Offset Current

Input Bias Current
Vs

= +10, -20; Vs = +20, -10V, RS = 50n

Output Short Circuit Current

10

= ±20V
Vs = ±20V
Vs = ±20V, RL = 2kn, VOUT = ±15V

Power Dissipation

Vs

Input Impedance
Large Signal Voltage Gain
Transient Response
(Unity Gain)

30

nA

0.5

nA/oC

3.0

Average Input Offset Current Drift

Power Supply Rejection Ratio

I
I

1.0

30

80

nA

15

50

ILV/V

25

35

mA

80

150

mW
Mn

6.0

50

V/mV

Rise Time

0.25

0.8

Overshoot

6.0

20

Bandwidth (Note 4)
Slew Rate (Unity Gain)

VIN

The following specifications apply for 0° C

=E;;;

= ±10V
TA

=E;;;

UNITS

TYP.

ILS

%

.437

1.5

MHz

0.3

0.7

V/lLs

70° C

Input Offset Voltage

4.0

mV

Input Offset Current

70

nA

Input Bias Current

210

nA

= ±20V, VIN = ±15V, RS = 50n
Vs = ±20V

Common Mode Rejection Ratio

Vs

Adjustment For Input Offset Voltage

80

dB

10

Output Short Circuit Current

mV
40

10

= ±20V
= ±20V

Power Dissipation

Vs

Input Impedance

Vs

Output Voltage Swing

Vs - -20V,

_ +

Vs

Large Signal Voltage Gain

Vs

150

IIRL = 10kn
RL = 2kn

= ±20V, RL = 2kn, VOUT = ±15V
= ±5V, RL = 2kn, VOUT = ±2 V

1

6

5

10kf!

Vin

V-

-=-

3-62

mW
Mn

±16

V

±15

V

32

V/mV

10

V/mV

~b'

~~
I'A741 A

+

mA

0.5

TRANSI ENT RESPONSE
TEST CIRCUIT

VOLTAGE OFFSET
NULL CIRCUIT

0--2-

95

1
=~ CL

~

VOUT

RL

FAIRCHILD .LINEAR INTEGRATED CIRCUITS.

~A741A. ~A741

E

TYPICAL PERFORMANCE CURVES FOR 741AAND 741E

100
0

TA ='25 C
80

60

/

40

20

o

V

/

./

V

/

/

---..

/

/

10

I

'"'"

I

~!: !~;~c-45

'" "- "-

10-1

5

15

10

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF
FREQUENCY

OPEN LOOP VOLTAGE GA1N
AS A FUNCTION OF
FREQUENCY

POWER CONSUMPTION
AS A FUNCTION OF
SUPPLY VOLTAGE

20

1

10

100

lk

10k

lOOk

\

-90

Vs = 115v
TA = +25°C

I\~

...... ~

-135

\

-180

1M

1

10M

10

100

lk

10k

lOOk

1M

SUPPLY VOLTAGE - ±V

FREQUENCY - Hz

FREQUENCY - Hz

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

INPUT RESISTANCE AND
INPUT CAPACITANCE AS A
FUNCTION OF FREQUENCY

OUTPUT RESISTANCE
AS A FUNCTION OF
FREQUENCY

5.0
TA

100

10M

J

ooor-rn.-.-rn.-.-~.-rv-ir=nl±.\T5L·v-'

250 C

I--II-H+-I-+-++f--I-++++-+ T A = 25°C

RIN

5oo~HH+-~HH+-~HH+-~HH~

"4.0

,..,...3.0

-

-

10M

\
10

1M

\

400 /-'-HH+-~HH+-+-HH+-+-HH~

300 f--Il-H+-I--lI-H+-I--l-H+-I--lI-H+--I
CIN-

200 f--Il-H+-I--lI-H+-I--l-H+-1--l1-H-bC/'-I

lOOk
2.0

10k
100

1.0

5

15

10

20

lk

28

-I-

Vs = ±15v
TA = 25°C

//

24

I

18

14

/

12

8

~

24

~

20

.,"
~

16

~

12

~

0.2

0.5

1.0

2.0

5.0

741A

"

300

'\.

741E

.......

o

100

10

lk

10k

lOOk

1M

o

25

INPUT NOISE CURRENT
AS A FUNCTION OF
FREQUENCY

INPUT NOISE VOLTAGE
AS A FUNCTION OF
FREQUENCY

45

65

85

125

105

AMBIENT TEMPERATURE

FREQUENCY - Hz

LOAD RESISTANCE - Kn

"\

100

~

/
0.1

"

\
\

200

,;,

V

10

~

400

o

I

16

500

32

28

~

V

20

ABSOLUTE MAXIMUM POWER
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE

I

~

1M

600

Vs = ±15V
TA = 25°C
RL = 10kn

36

>

/

22

0

1-1--

lOOk

10k

lk

FREQUENCY - Hz

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
FREQUENCY

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
26

0.1
1M

lOOk

10k
FREQUENCY - Hz

SUPPLY VOLTAGE -+V

BROADBAND NOISE FOR
VARIOUS BANDWIDTHS

V~=I;I~V~~~~~~~~~
t:

100

TA = 25°C
10 14

H--+++-t-+--t++-I-t-t++-I-t--t++--I

.$ 1022 H--t++-I--+-++HI--+-++HH-++t---l
«
I

g
~
(J)

10 16 1-t-t+t-t-+--t+HI-t-t++-I-t-t++--I

23
10

10

--

10-100kHz

"-

me31!3~~

10

~ 1024 I--+-++HH-++~H-++HH-++t---l

./

./

\Ok~Z

10~lkLl

.-"

/"

~

10 17

H-+++-I--+-++HH-t++-H-+++--I

~ 1025 1-t-H-I--lI--I--I--I-I--lH-I--I-I---lH-I--I-1--l
~

:iii

18
10

O'-O--'--'..L.J....~I'-k--'--'..L.J....-l0'-k-'---'..L.J.......J100k

':-0-'-J..L.J....1
l

FREQUENCY - Hz

.1
100

lk
FREOUENCY - Hz

3-63

10k

lOOk

100

lk

10k

SOURCE RESISTANCE - n

lOOk

•

FAIRC'HILD LINEAR INTEGRATED CIRCUITS. MA741 A • MA741E
TYPICAL PERFORMANCE CURVES FOR 741A
INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
200

OUTPUT SHORT-CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE
100

Vs = ±l~V

35
v = ±lbv

""-

50

«
150

c:

E

30

:;;
I

......... ~

U
Z

~ 10.0

100

~

'"

50

.........

r-

o
-60

-20

.... V

~ 5.0

-

20

..

~

"

25

f-

..........

~

'"

'I'-.

"-

20

c:;

f-

a:

,/

o

........

iJ5

60

1.0
-60

140

100

-20

_·c

15

20

60

100

10
-60

140

-20

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
AMBIENT TEMPERATURE
1.4

v~= ±l~V

120 _Vl=±2bv

I
I r~
"o\<;;'~"'~

12

;:

-

1.2

E 100

10

I

..........

Z

0

ii::;;

\r\.

~

o
-60

::>
..J

«

I"- .........

80

>

r- I"-

8
w

. . . . 1"- I--

-20

20

r-

-

60

TEMPERATURE

;:
~

>
i=

~

r- i-

60

1.0

<;;."oVO

...... r--....

-;V

0.8

~

~

~SLIEWR~TE

.........
~

C~
'0'(001)

I

~
'DW

1'O,.",",--

I
I

40
140

100

-60

-20

_·c

20

140

TEMPERATURE _·C

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

V~ = ±1'5V

100

60

20

TEMPERATURE _·C

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

"~

" ,

r--

TEMPERATURE

14

~

,/

3.0

~

30

I

60

100

140

0.6
-60

-20

60

20

'I

100

140

TEMPERATURE _·C

TEMPERATURE _·C

TYPICAL PERFORMANCE CURVES FOR 741 E

10

100

--

r-Vs J±15V
80

c:
:;;

5.0

I

w

60

U
Z

«

r---

20

-- -

t;;

~

I---

I---

~

......

......

..-- ......

7.0

40

INPUT OFFSET CURRENT
ASA FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

I'....

,
-I"-

-r--- I'---

3.0

2.0

Vs =±15VVs = i15V

o

o

1.0
10

20

30

40

TEMPERATURE

50

60

70

o

o
10

_·c

20

30

40

50

60

70

TEMPERATURE _·C

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATU~E

I
10

20

30

40

TEMPERATURE

OUTPUT SHORT-CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

100

o

60

1.10r---,--..--,....---r-..--,....-~

30

28

""""'- r--

80

26

-I'-- r--

-

70

~r-...

'",r--......

24

~

22
60

50

~

..........

20

18
o

10

20

30

40

TEMPERATURE

50

_·c

60

70

70

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
AMBIENT TEMPERATURE

r- Vs = 1±20V
90

60

_·c

o

10

20

30

40

TEMPERATURE _·C

3-64

50

60

70
TEMPERATURE _·C

pA747
DUAL FREQUENCY COMPENSATED OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The IlA747 is a pair of high performance monolithic Operational
Amplifiers constructed using the Fairchild Planar* epitaxial process. They are intended for a wide
range of analog applications where board space or weight are important. High common mode voltage
range and absence of "latch-up" make the IlA747 ideal for use as a voltage follower. The high gain
and wide range of operating voltage provides superior performance in integrator, summing amplifier,
and general feedback applications. The IlA747 is short-circuit protected and requires no external
components for frequency compensation. The internal 6 dB/octave roll-off insures stability in closed
loop applications. For single amplifier performance, see IlA741 data sheet.
•
•
•
•
•
•

NO FREQUENCY COMPENSATION REQUIRED
SHORT-CIRCUIT PROTECTION
OFFSET VOLTAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWER CONSUMPTION
NO LATCH UP

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Military (747)
Commercial (747C)
Internal Power Dissipation (Note 1)
Metal Can
DIP
Differential Input Voltage
Input Voltage (Note 2)
Voltage between Offset N411 and V_
Storage Temperature Range
Operating Temperature Range
Military (747)
Commercial (747C)
Lead Temperature (Soldering, 60 seconds)
Output Short-Circuit Duration (Note 3)

CONNECTION DIAGRAMS
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 7A

OFFSET
NULL A

INV
INPUT A

±22 V
±18 V
500mW
670mW
±30V
±15 V
±O.5 V
-65°C to +150°C
-55° C to +125°C
O°C to 70°C
300°C
Indefinite

NON·INV
INPUT A

V+ A

OFFSET
NULL A

OUTPUT A

V-

NO
CONNECT

OFFSET
NULL B

OUTPUT B

NON·INV
INPUT B

V+ B

INV
INPUT B

OFFSET
NULL B

ORDER INFORMATION
TYPE
PART NO.
747
747DM
747C
747 DC

10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

EQUIVALENT CIRCUIT (Each Side)

NC

~~------~~--~~----------~--------------~--ov+

INVERTING
INPUT A

Rg
25Q

INVERTING
INPUT B

OUTPUT

RIO
50Q
OFFSET
NULL

RI
lk!l

R3
50k(1

R2
lk!l

R4
5k(1

Rl2
50kQ

Q20

Rll
50Q

v-

ORDER INFORMATION
TYPE
PART NO.
747
747HM
747C
747HC
·Planar is a patented Fairchild process.

Notes on following pages.
3-65

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA747
ELECTRICAL CHARACTERISTICS FOR 747 - Each Amplifier (VS = ±15 V, TA = 25°C unless otherwise specified)
~

~

PARAMETERS (see definitions)

TYP.

MIN.

CONDITIONS

MAX.

UNITS

1.0

5.0

mV

Input Offset Current

20

200

nA

I nput Bias Current

80

500

nA

Input Offset Voltage

RS ..;;10 kn

I nput Capacitance
Offset Voltage Adjustment Range
Large Signal Voltage Gain

Rt

~2

50,000

kn, VOUT = ±10 V

Mn

2.0

0.3

I nput Resistance

1.4

pF

±15

mV

200,000

V/V
n

75

Output Resistance

mA

Output Short-Circuit Current

25

Supply Current

1.7

2.8

mA

Power Consumption

50

85

mW

Transient Response
(Unity Gain)

II Risetime
IOvershoot

Slew Rate

VIN. = 20 mV, RL = 2 kn,
CL";; 100 pF

0.3
5.0

%

RL ~2 kn

0.5

V/J.LS

120

dB

Channel Separation

J.Ls

The following specifications apply for -55°C";; T A ..;; +125°C.
Input Offset Voltage
Input Offset Current

RS ..;;10 kn

1.0

6.0

mV

T A = +125°C

7.0

200

nA

TA = -55°C

85

500

nA

0.03

0.5

/-LA

0.3

1.5

J.LA

TA = +125°C

Input Bias Current

TA = -55°C

Input Voltage Range
Common Mode Rejection Ratio

RS ..;;10 kn

Supply Voltage Rejection Ratio

RS ..;;10 kn

Large Signal Voltage Gain

RL

~2

RL

~10

Output Voltage Swing

Power Consumption

±13

70

90

V
dB
150

30

J.LV/V

25,000

kn, VOUT = ±10 V
kn

RL ~2 kn

Supply Current

±12

V/V

±12

±14

±10

±13

V
V

T A = +125°C

1.5

2.5

mA

TA =-55°C

2.0

3.3

mA

T A = +125°C

45

75

mW

TA = -55°C

60

100

mW

TYPICAL PERFORMANCE CURVES (Each Amplifier) FOR 747 AND 747C

OPEN LOOP VOL TAGE GAIN
AS A FUNCTION OF
SUPPL Y VOL TAGE
115

flO

r--

/

".- ~

V

~

,."",.

.,..V

RL~2kQ

-55·C

~

I-t-+tt.....
""""""::±+rt-t-++++-+-++t-+--l

-20

~IOI6 I-t-+tt-+-++rt-t-++++-+-++t-+--l

i _

1-++++--+-++l+-----1I-+-H+-+-++l+--l
1017 1-++++--+-++l+-----1I-+-H+-+-++l+--l

1O~1O~~-~~~~I~k~~IO~k~~IOOk
FREQUENCY - Hz

\.
"\

100

20

140

o

25

45

85

65

lOS

125

TEMPERATURE - '-C

INPUT NOISE CURRENT
AS A FUNCTION OF
FREQUENCY

N~lii22

BROADBAND NOISE FOR
VARIOUS BANDWIDTHS
~

VS ·± 15V
T • 25'C
A

VS·Z 15V
T ·25'C
A

liii

23

10

1D-1OOItHz

I

""-

-

,/

L

ID-lDItZ

III

~

r'\.

747 C- f---;~

-

100

~

,

-

200

15

III.

'\

300

f'..

I

'\.

400

......

0.5

140

ABSOLUTE MAXIMUM POWER
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE

_

0.2

140

OUTPUT SHORT·CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT JEMPERATURE

"'-

INPUT NOISE VOLTAGE
AS A FUNCTION OF
FREQUENCY

g

30

TEMPERATURE - C

LOAD RES ISTANCE - K"

~ 1015

..........

I.

8
0.1

N

"

TEMPERATURE -C

/

10

c

40

I

18

. . . . r-. r--

35

1-1- ~

VS· ± 15V
26 T ·25'C
A
24

........

0-

~I024

~Jl

.......

~
~

~

/'

ilii

25

I
~

Ik
FREQUENCY - Hz

3-68

10k

.1
lOOk

lOOIt

100

SOURCE RESISTANCE·"

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A747
TYPICAL PERFORMANCE CURVES (Each Amplifier) FOR 747 AND 747C
OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
FREQUENCY

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF
FREQUENCY

Vs -± 15V

Vs -.± 15V

--......

40

\

TA - WC

'" ""
10

10

100

-45

'"'"
Ik

10k

Vs -.± 15V

36

TA - 25·C

TA - 25'C
RL - 10ko

32

1\

28

1\

24

........

"

1\
\

20
16
12

-135

"

\

\

lOOk

FREQUENCY - Hz

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
FREQUENCY

-18)

1M

10M

I

10

100

Ik

10k

lOOk

1M

10M

100

10

600

100

Vs -± 15V

70

lOOk

\

50

7

200

'\

40

\

30

'\

20

100

•

\.

60

300

TA - 25'C

"- \

8)

400

-.± 15V

Vs

90

\

-

1M

lOOk

COMMON MODE REJECTION
RATIO AS A FUNCTION OF
FREQUENCY

500

"

C 1N

10k
FREQUENCY - Hz

TA - 25'C

1M

Ik

OUTPUT RESISTANCE
AS A FUNCTION OF
FREQUENCY

10M

.........

100

FREQUENCY - Hz

INPUT RESISTANCE AND
INPUT CAPACITANCE AS A
FUNCTION OF FREQUENCY

RIN

.........

o

10
10k
100

lOOk

10k

Ik

1M

FREQUENCY - Hz

0.1

o

100

Ik

10k

lOOk

1M

10

100

10k

lOOk

28

Vs

k.

20

-.± 15V

,"

....... "i

90%
tOUTPUT

16

/

12

/

~.......- - - - -

I
I

~
f--

RISE

Tli
1.0

1.5

I NPUT-j

\

.

J
j \
-2 ~U--+--+-+-+++-*--+-+---I
-6r--r--r-+-+-~~~~~-1

RL~

2kQ-

CL~

100pf

2.0

VOUT

-4 ~t--+--+-+-+++--lI-\-\f'>-+----1
r-t ............L _ _

VS~ :15V_

TA ' 25 C

.5

01020

2.5

30

TlI!'t-1J$

40

50

60

ro

8)

W

TIME -"5

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
SUPPLY VOLTAGE

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE OFFSET
NULL CIRCUIT
1.4

1.4

VIS - ± 15V

TA - 25 C

1.0

10M

f--If---t--t--+--+--+-+-T A- 25 'c

24

1.2

1M

VOLTAGE FOLLOWER
LARGE SIGNAL PULSE RESPONSE

TRANSIENT RESPONSE
TEST CI RCUIT

TRANSIENT RESPONSE

Ik

FREQUENCY - Hz

FREQUENCY - Hz

1.2

~NSltNr~
~

----

I~
S~
OO'l~,,~\l

~~

1.0

--

0.8

/

............

..=

...........

...-

~'.I'

'::? QO~
.4~
~

-V

0.8

I

~\~~

~~
~£~

SLE~ RAn:

I

-V/>8~
'--

I

0.6

0.6

5

10

15

-60

20

SUPPI.Y VOLTAGE - ±V

3-69

I
-20

100

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA747
TYPICAL APPLICATIONS

ANALOG MULTIPLIER

QUADRATURE OSCILLATOR

+15 V

C2
820 pF
1%

SINE
OUTPUT

C3
820pF

R13
1.5 k.l1

CURRENT SOURCE

1%

AMPLIFIER

R2
20 k.l1

Rl4
25.8 k.l1*

1%

IN963B

1%

Rll
R2
180 k.l1

12 k.l1*

R12
12 k.l1*

1%

1%
MULTIPLIER
2N2920
OR
I'A726

1%

R5
5 k.l1
1%

Rl
190 k.l1

R15
25.8 k.l1*

1%

1%
R4

R3
20 k.l1

15 k.l1

1%

1%

I

Cl
820pF

1%

RlO

'Matched to 0.1%
EOUT

= 100 EINl

R7
150 k.l1

150 k.l1

X EIN2
-15V

COMPRESSOR/EXPANDER AMPLIFIERS

ZERO ADJUST

+15 V

TRACKING POSITIVE AND NEGATIVE
VOL TAGE REFERENCES

Dl

R2
10 k.l1

-Pv

COMPRESSOR
INPUT

D2

lkn

D3
Rl
1 k.l1

NEGATIVE
REGULATED
OUTPUT
-12V
IL,,5mA
SOURCE OR
SINK

EXPANDER
OUTPUT
EXPANDER
INPUT

R3
10 k.l1

fa

-=
COMPRESSOR

EXPANDER

POSITIVE OUTPUT

= VOl

X Rl + R2
R2

MAXIMUM COMPRESSION EXPANSION RATIO = RllR (10 kn >R ;;;'0)
NOTE: DIODES 0 1 THROUGH 04 ARE MATCHED FD6666 OR EQUIVALENT

NEGATIVE OUTPUT

= -POSITIVE

OUTPUT X R6 R5

NOTCH FILTER USING THE p,A747 AS A GYRATOR

10k

>--....-0

INPUT

NOTCH FREQUENCY AS A
FUNCTION OF C 1

OUTPUT

1" ....
........1-..,
TRIM R3 SUCH THAT

~=~
R2

I'..
I...........

2 R4

r'-.. ......

"

7.5 kn

7.5 kn

10
0.0001
C2

0.001

0.01
CAPACITOR C I

3-70

0.1
~F

LO

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A747
TYPI CAL APPLI CATIONS
UNITY-GAIN VOLTAGE FOLLOWER

>--.....- 0

NON-INVERTING AMPLIFIER

;>--+--o

OUTPUT

OUTPUT

INPUT

RIN = 400 Mn
CIN = 1 pF

ROUT< < 1 n
B W = 1 MHz

GAIN
10
100
1000

INVERTING AMPLIFIER

RI
1 kg
100 g
100 g

R2
9 kg
9.9 kg
99.9 kn

B.W.
100 kHz
10 kHz
1 kHz

RIN
400 Mg
280 Mg
80 Mn

WEIGHTED AVERAGING AMPLIFIER

Rl

I

Rf

EINl
R2
EIN2
INPUT

R3

o---\,N\,---<~

EIN3

>---+--0 OUTPUT

GAIN
1
10
100
1000

RI
10 kn
1 kn
1 kn
lOOn

R2
10 kn
10 kn
100 kn
100 kg

BW
1 MHz
100 kHz
10 kHz
1 kHz

">----I~_o OUTPUT

RIN
10 kg
1 kg
1 kg
100 n

3-71

JJA747AeIJA747E
D-UALFREQUENCY COMPENSATED OPE-RATIONAL AMPLIFIER
FAIRCH ILD LINEAR INTEGRATED C IRCU ITS

GENERAL DESCRIPTION - The J.LA747 A and E are pairs of high performance monolithic
Operational Amplifiers constructed using the Fairchild Planar* epitaxial process. They are intended
for a wide range of analog applications where board space or weight are important. High common
mode voltage range and absence of "latch-up" make the J.LA747A and E ideal for use as voltage
followers. The accuracy of long interval integrators, timers and sample and hold circuits is improved
due to the low drift and low bias currents. The J.LA747 A and E are short-circuit protected and require
no external components for frequency compensation. The internal 6 dB/octave roll-off insures
stability in closed loop applications. Electrical characteristics are identical to MI L-M-38510/10102.
•
•
•
•
•
•
•

CONNECTION DIAGRAMS
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 7A

OFFSET
NULL A

INV
INPUT A
NON·INV
INPUT A

NO FREQUENCY COMPENSATION REQUIRED
SHORT-CIRCUIT PROTECTION
OFFSET VOL TAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWE R CONSUMPTION
OFFSET VOLTAGE .
3.0 mV MAX
OFFSET CURRENT . . . 30 nA MAX

V+A

OFFSET
NULL A

OUTPUT A

V-

NO
CONNECT

OFFSET
NULL 8

OUTPUT 8

NON·INV
INPUT 8

V+ 8
OFFSET
NULL 8

INV
INPUT 8

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Differential I nput Voltage
Input Voltage (Note 2)
Voltage between Offset Null and V_
Storage Temperature Range
Operating Temperature Range
Military (747 A)
Commercial (747E)
Lead Temperature (Soldering, 60 seconds)
Output Short-Circuit Duration (Note 3)

±22 V
500mW
670mW
±30 V
±15 V
±0.5 V
-65°C to +150°C
-55°C to +125°C
O°C to +70°C
300°C
Indefinite

ORDER INFORMATION
TYPE
PART NO.
747A
747ADM
747E
747EDC

10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

NC

EQUIVALENT CIRCUIT (Each Side)
INV INPUT

,......---+---+----...----_-.. . . .

----------1~+VCC

NON-INV.
INPUT
OUTPUT

V-

ORDER INFORMATION
TYPE
PART NO.
747AHM
747A
747EHC
747E

OFFSET
NULL
Rl
lkU

R3
50kU

R2
lkU

OFFSET
NULL

*Planar is a patented Fairchild Process_

3-72

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA747A • IlA747E
747A
ELECTRICAL CHARACTERISTICS ±5 V ~ Vs ~ ±20 V, TA = 25°C unless otherwise specified)
PARAMETERS (see definitions)

CONDITIONS

Input Offset Voltage

RS ~ 50n

MIN.

TYP.

MAX.

UNITS

0.8

3.0
15

JLvtc

3.0

30

nA

mV

Average Input Offset
Voltage Drift
Input Offset Current
Average Input Offset
0.5

nA/oC

30

80

nA

15

50

JLV/V

25

35

rnA

80

150

Current Drift
I nput Bias Current
Power Supply Rejection Ratio

Vs = +10, -20; Vs = 20, -10 V
RS = 50 n

Output Short Circuit Current

10

Power Dissipation

Vs = ±20 V

Input Impedance

Vs = ±20 V

Large Signal Voltage Gain

1.0

VS=±20V,RL=2kil
VOUT = ±15 V

mW
Mil

6

V/mV

50

Transient Response

I

Rise Time

0.25

0.8

JLS

(Unity Gain)

I

Overshoot

6.0

20

%

Bandwidth (Note 4)
Slew Rate (Unity Gain)

VIN = ±10 V

0.437

1.5

MHz

0.3

0.7

V/JLS

The following specifications apply for -55°C ~ T A ~ +125°C
Input Offset Voltage

4.0

mV

Input Offset Current

70

nA

210

nA

Input Bias Current
Common Mode Rejection Ratio
Adjustment for Input Offset Voltage

V S = ±20 V, V IN = ± 15 V
RS = 50 n

80

dB

95

10

Vs = ±20 V

Output Short Circuit Current

I
J

mV
40

rnA

-55°C

165

mW

-f:125°C

135

mW

10

Power Dissipation

Vs = ±20 V

I nput Impedance

Vs = ±20 V

0.5

V S = ±20 V, R L = 10 kil

±16

V

RL = 2 kn

±15

V

Output Voltage Swing
Large Signal Voltage Gain
Channel Separation

Mn

Vs = ±20 V, RL = 2 kil, VOUT = ±15 V

32

V/mV

VS=± 5V,RL=2kil,VOUT=± 2V

10

V/mV

Vs = ±20 V

100

dB

NOTES:
1. Rating applies to ambient temperatures uo to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for the Metal Can, 8.3 mW/oC for
the DIP.
2. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
3. Short circuit may be to ground or either supply. Rating applies to +125°C case temperature or 75°C ambient temperature.
0.35
4. Calculated value from: BW (MHz) =
RISETIME (JLs)

3-73

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • /JA747A • #1A747E
747E
ELECTRICAL CHARACTERISTICS (±5 V ~ Vs ~ ±20 V, T A = 25°C unless otherwise specified)
PARAMETERS (see definitions)

CONDITIONS

Input Offset Voltage

RS

~

MIN.

50n

TYP.

MAX.

UNITS

0.8

3.0
15

J,tV/oC

3

30

nA

0.5

nArC

30

80

nA

15

50

INN

25

35

mA

80

150

mV

Average I nput Offset
Voltage Drift
I nput Offset Current
Average Input Offset
Current Drift
I nput Bias Current
Vs = +10, -20; Vs = 20, -10 V

Power Supply Rejection Ratio

RS = 50 n
10

Output Short Ci.rcuit Current
Power Dissipation

Vs = ±20 V

I nput Impedance

Vs = ±20 V

1.0

Vs = ±20 V, RL = 2 kn, VOUT = ±15 V

50

Large Signal Voltage Gain
Transient Response
(Unity Gain)

I
I

mW
Mn

6

V/mV

Rise Time

0.25

0.8

J,ts

Overshoot

6

20

%

Bandwidth (Note 4)
Slew Rate (Unity Gain)

VIN = ±10 V

0.45

1.5

MHz

0.3

0.7

V/J,ts

The following specifications apply for O°C ~ T A ~ 70°C
Input Offset Voltage

4.0

mV

I nput Offset Current

70

nA

210

nA

Input Bias Current
Vs = ±20 V, VIN = ±15 V

Common Mode Rejection Ratio

80

RS = 50 n

Adjustment for Input Offset Voltage

10

Vs = ±20 V

Output Short Circuit Current

mV
40

10

Power Dissipation

Vs = ±20 V

I nput Impedance

Vs = ±20 V

Output Voltage Swing
Large Signal Voltage Gain
Channel Separation

165

±16

V

RL = 2kn

±15

V

Vs = ±20 V, RL = 2 kn, VOUT = ±15 V

32

V/mV

VS=± 5V,RL=2kn,VOUT=± 2V

10

V/mV

100

1

dB

TRANSI ENT RESPONSE
TEST CIRCUIT

l~"
3;/

~~
jlA741A

mW

Vs = ±20 V, RL = 10 kn

VOLTAGE OFFSET
NULL CI RCUIT

+

mA

Mn

0.5

Vs = ±20 V

0--2-

dB

95

6

5

10kU

Vin

V-

-=

3-74

1
=;:CL

~

VOUT

RL

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p,A747A • p,A747E
TYPICAL PERFORMANCE CURVES FOR 747A
INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

OUTPUT SHORT·CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE
100

200

35

V~ = ±l~V

Vs = ±15V

"-

50
Z

I

u

z

~

100

V

10,0

~

50

5

~
' - r-

0
-60

-20

-

z

. . . .V

5,0
3,0

........

......

25

,

>-

V

~

"-

20

U
>a:

...........

o
I

til

1,0
-60

140

-20

", ...

15

20

60

100

10
-60

140

20

-20

TEMPERATURE - °C

TEMPERATURE - °C

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
14

~

", ,1

i---

100

60

20

Vi-"

........
,

--

I-...

30

E

30

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
AMBIENT TEMPERATURE

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

V~ = ±1'5V

120

_V~

1.4

V~ =±l~V

= ±2bv

I
I

12

"
E

10

I
Z

1.2
100

:--

0

\

~

",,. . . . t"-

8a:
¥!

80


>
;::

r- r-

-;

0,8

-i""--..

., ~

~)
J
~I'I'

i""--..

SLEW RATE

~

-60

-20

100

60

20

-60

140

-20

20

140

100

60

OW,
i~
IO~I~

I

0.1}
-60

-20

20

60

140

100

TEMPERATURE - °C

TEMPERATURE - °C

TEMPERATURE - °C

I

~I

/'

40

o

...----

W

~SVO
~~I'

1,0

~

r--- r-

60

~

r- l"- t--_

....

::0

r-- ' -

t

140

100

60

TEMPERATURE - °C

TYPICAL PERFORMANCE CURVES FOR 747E
INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
10

100

--- --

-VS=I±15V
7.0
80

c:
:;;

~
5.0 ~

I

60

I---"":

......

-

.............

...........

u

Z
-

r--

z

2.0

t

VS=±15V-

Vs = 15V

o

o

1,0
10

20

30

40

50

60

70

o

10

20

30

40

50

60

o
70

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE
100

o

10

20

30

40

OUTPUT SHORT·CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
30

----

70

28

--

............... r-.,.
26

r---

......................

-

""-

24

...............
...............

22

..............

60
20

18

50
010

203040506070
TEMPERATURE - "C

o

10

20

30

40

TEMPERATURE _ °C

3·75

I

60

70

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
AMBIENT TEMPERATURE

I- Vs = 1±20V

80

50

TEMPERATURE - °C

TEMPERATURE - °C

TEMPERATURE - °C

90

--

::0

50

60

70

40
TEMPERATURE - °C

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A747A • p.A747E
TYPICAL PERFORMANCE CURVES FOR 747A AND 747E

POWER CONSUMPTION
AS A FUNCTION OF
SUPPLY VOLTAGE

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
FREQUENCY

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF
FREQUENCY

100

)

TA ='25"C
80

60

/

40

./

20

o

V

/

r-----..

/

V

I"

10

V

V

~

1
10- 1

5

10

15

20

1

10

100

-45

'" '"

lk

10k

.....

"

lOOk

\

1M

-180
10M

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

INPUT RESISTANCE AND
INPUT CAPACITANCE AS A
FUNCTION OF FREQUENCY

1

10

100

lk

10k

lOOk

1M

10M

FREQUENCY - Hz

OUTPUT RESISTANCE
AS A FUNCTION OF
FREQUENCY
100

10M

J25"C

"

-135

FREQUENCY - Hz

TA

Vs = !,5V
TA = +25"C

1\

-90

SUPPLY VOLTAGE - ±V

5.0

~

Vs = J15V
TA=+25"C-

OOO~~~~~~~~~~Vi~=~lt\~15v~
1--1-+++-1-+-1+1-1-+++1-+ TA = 25"C

R'N

500 I--+-+-I~+-I-+-I+-+--I-+-I+-+-H-I-+---I
4.0

3.0

-

10-

V

]\
1

1M

400 I--+-+-I~+--I-+-I+-+-!-H+-+-H-I-+---I

1\
300 1--++1+-+-1-+++-+-1-+1+-+-1-+++-1
C'N-

I1

lOOk

Iy

200 1--++1+-+-1-+++-+-1-+1+-+-1-+1-11'

2.0

10k
100

1.0
5

15

10

20

lk

SUPPLY VOLTAGE - +V

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
28

26

~

24

'"z

22

~

20

~
~

:::>

18

""~

16

o

~
«

~

VS= .l5V
TA = 25"C

/V

10k

lOOk

0.1
1M

.--

40

~

32
28

~

24

~

20

:;'""i

16

~

~

J

II

o

;::

12

,;,

8 0 .1

/

0.2

0.5

1.0

2.0

5.0

I\.

400

1\

~
I\.

i"

o

100

lk

10k

"

100

I\.
lOOk

1M

o
25

45

65

85

125

105

FREQUENCY - Hz

AMBIENT TEMPERATURE

INPUT NOISE CURRENT
AS A FUNCTION OF
FREQUENCY

BROADBAND NOISE FOR
VARIOUS BANDWIDTHS

LOAD RESISTANCE - Kn

INPUT NOISE VOLTAGE
AS A FUNCTION OF
FREQUENCY

,,7A- f - -

200

12

10

'\
747E

300

\

~

II

10

ABSOLUTE MAXIMUM POWER
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE

500

'\-

/

1M

600

VS= ±15V
TA = 25"C
RL = 10kn

36

'"z

lOOk

10k
FREQUENCY - Hz

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
FREQUENCY

I--

1/

14

lk

FREQUENCY - Hz

V~=I±ll~V~~~~~~~jt~

TA=25"C:j::

:i:

1014I--H-++-+-f-+f+-+-I-+l+-H-+t+-l

N

I

>

>-

I

~ 10

~

J« 1022 1---11-H+--t-t-Ht--I--t-t+t-II--t-H+---l
10

Z

15

t--

~at!§~Em

~ 10 161--H-!+-+-f-+f+-+-I-+I+-+-I-+t+-l
g

~ 10
-I-t--~~~+-V~
10 100kHz
_....
1/

"

~ms~~

~ 1024 1---11-H+--t-t-H.po.,.I--t-t+t--I--t-H+---l
~

~

:§

z

«

~ 10 17 1--H-!+-+-I-+I+-+-I-+I+-+-IHt+-l

~ 1025 Hf-+f+-I-t-+tt--I--t-+tt--I--t-+tt----i
:;'i

:0

100

lk
FREQUENCY - dz

10k

lOOk

10261'-0-'-U-I..-1O....
0-'-'...u...-l....
k -I-J..J.J....-....-'-'..J.J....---'100k
lO k
FREQUENCY - Hz

3-76

100

lk

10k

SOURCE RESISTANCE - n

lOOk

IJA748
HIGH PERFORMANCE OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA748 is a High Performance Monolithic Operational Amplifier
constructed using the Fairchild Planar* epitaxial process. It is intended for a high wide range of analog
applications where tailoring of frequency characteristics is desirable. High common mode voltage range
and absence of "latch-up" make the J.LA 748 ideal for use as a voltage follower. The high gain and wide
range of operating voltages provide superior performance in integrator, summing amplifier, and general
feedback appl ications. The J.LA 748 is short-circuit protected and has the same pin configuration as the
popular J.LA 741 operational amplifier. Unity gain frequency compensation is achieved by means of a
single 30 pF capacitor. For superior performance, see J.LA 777 data sheet.
•
•
•
•
•

SHORT-CIRCUIT PROTECTION
OFFSET VOL TAGE NULL CAPABILITY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWER CONSUMPTION
NO LATCH UP

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
I nternal Power Dissipation (Note 1)
Metal Can
DIP
Mini DIP
Flatpak
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP, and Flatpak
Mini DIP
Operating Temperature Range
Military (748)
Commercial (748C)
Lead Temperature (Soldering, 60 Seconds)
Metal Can, DIP and Flatpak
Mini DIP
Output Short Circuit Duration (Note 3)

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58

NOTE: Pin 4 connected to case
ORDER INFORMATION
TYPE
PART NO.
748
748HM
748C
748HC

±22 V

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

500mW
670mW
310mW
570mW
±30 V
±15 V

NC
NC

OffSET
NUll

INPUT
NON·

300°C
260°C
Indefinite

OUTPUT

iNVERT

INPUT

OFFSET

v-

NULL

NC

ORDER INFORMATION
TYPE
PART NO.
748
748DM
748C
748DC

-65°C to +150°C
-55°C to +125°C
-55°C to +125°C
O°C to +70°C

FREQ
COMP

(COMP)

INVERT

8-LEAD MINI DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

OffS[lONULL

!~~~5t

I

8

2

7

FREQ
COMP
V+

IN~E~~

3

6

OUTPU1

INPU:

4

5

~0aET

EQUIVALENT CIRCUIT
ORDER INFORMATION
TYPE
PART NO.
748C
748TC

~~--------~----~------------~--------------~--~v+

1~LEAD FLATPAk:f

(TOP VIEW)
PACKAGE OUTLINE 3F
NC

6FRF~~TC~~~

FREQ COMP

INVERTING
INPUT

NON INVERT
INPUT

v-

----,L..;...._ _...;..J

:fAvailable on special request
ORDER INFORMATION
TYPE
PART NO.
748

Notes on following pages.

748FM

*Planar is a patented Fairchild process.

3-77

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • /lA748
748
ELECTRICAL CHARACTERISTICS (VS

= ±15 V, T A = 25°C, Cc = 30 pF

PARAMETERS (see definitions)

CONDITIONS

I nput Offset Voltage

RS';;;10 kn

unless otherwise specified)
TYP.

MIN.

MAX.

UNITS'

1.0

5.0

mV

I nput Offset Current

20

200

nA

Input Bias Current

80

500

Input Resistance

0.3

Input Capacitance
Offset Voltage Adjustment Range
Large Signal Voltage Gain

= ±10 V

RL ;;;;:.2 kn, VOUT

50,000

nA

2.0

Mn

2.0

pF

±15

mV

150,000

V/V

Output Resistance

75

n

Output Short-Circuit Current

25

mA

Supply Current

1.9

2.8

mA

Power Consumption

60

85

mW

Transient Response
(Voltage Follower,
Risetime
Gain of 1)
Overshoot

V I N = 20 mV, Cc
CL .;;;100 pF

Slew Rate
(Voltage Follower, Gain of 1)

= 30 p F , R L = 2

kn,

RL;;;;:'2 kn

Transient Response
(Voltage Follower,
Risetime
Gain of 10)
Overshoot

VIN = 20 mV, Cc
CL .;;;100 pF

Slew Rate
(Voltage Follower, Gain of 10)

RL;;;;:'2 kn, Cc

= 3.5 pF, RL = 2

0.3
5.0

J,Ls

0.5

V/J,Ls

0.2
5.0

J,Ls

5.5

V/J,LS

%

kn,

= 3.5 pF

%

The following specifications apply for -55° C .;;;T A';;; +125° C:
Input Offset Voltage

RS ';;;10 kn

1.0

6.0

mV

I nput Offset Current

TA = +125°C
TA - -55°C

10
50

200
500

nA
nA

I nput Bias Current

TA
TA

= +125°C
= -55 C

0.03
0.3

0.5
1.5

J,LA
J,LA

v

Input Voltage Range
Common Mode Rejection Ratio

RS';;;lO kn

Supply Voltage Rejection Ratio

RS';;;lO kn

Large Signal Voltage Gain

RL;;;;:'2 kn, VOUT

Output Voltage Swing

RL ;;;;:.10 kn
RL;;;;:.2 kn

±12

±13

V

70

90

dB

30

= ±10 V

Power Consumption

v

V
V

1.5
2.0

2.5
3.3

mA
rnA

45
60

75
100

mW
·mW

VOL TAGE OFFSET
NULL CIRCUIT

2 ....

1

'~'
+

5

';~

-

v+

v-

J

c

J~6

,..

3 +/s

~

10Mll

5.1 Mll

~.,~

v25kll

~

'SUGGESTED

ALTERNATE

3-78

J,LVN
V/V

±14
±13

±12
±10

= +125°C
= -55 C
TA = +125°C
v
TA = -55 C
TA
TA

Supply Current

150

25,000

FAIRCHILD LINEAR INTEGRATED CIRCUITS • /JA748
748C
ELECTRICAL CHARACTI;RISTICS (VS

= ±15

PARAMETERS (see definitions)

CONDITIONS

Input Offset Voltage

RS

V, TA

~10

= 25°C, Cc = 30 pF

unless otherwise specified)
MIN.

TYP.

kn

MAX.

UNITS

2.0

6.0

I nput Offset Current

20

200

nA

I nput Bias Current

80

500

nA

Input Resistance

0.3

2.0

mV

Mn

Input Capacitance

2.0

pF

Offset Voltage Adjustment Range

±15

mV

150,000

V/V

Large Signal Voltage Gain

= ±10

RL ;;;.2 kn, VOUT

20,000

V

Output Resistance

n

75

Output Short-Circuit Current

25

Supply Current

1.9

2.8

mA

Power Consumption

60

85'

mW

Transient Response
(Voltage Follower,
Risetime
Gain of 1)
Overshoot

VIN = 20 mV,CC
CL ~100 pF

Slew Rate
(Voltage Follower, Gain of 1)
Transient Response
(Voltage Follower,
Gain of 10)

= 30

pF, RL

=2

kn,

RL;;;'2 kn

VIN = 20 mV, Cc
CL ~100 pF

Risetime
Overshoot

Slew Rate
(Voltage Follower, Gain of 10)

mA

0.3
5.0

J.LS

0.5

V/J.LS

0.2
5.0

J.LS

5.5

V/J.LS

%

= 3.5 pF, RL = 2 kn,

RL;;;'2 kn

%

The following specifications apply for O°C ~ T A ~ +70°C:
Input Offset Voltage

RS ~ 10 kn

7.5

I nput Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio

RS ~10 kn

Supply Voltage Rejection Ratio

RS ~ 10 kn

±12

±13

70

90
30

Large Signal Voltage Gain

RL ~2 kn, VOUT

Output Voltage Swing

RL;;;'lO kn
RL;;;'2 kn

= ±10

nA

800

nA
V
dB

150

15,000

V

±14
±13
60

V
V
100

GAIN TEST CIRCUIT
-20V +20V
)
C

SOkn
VOUT"'"
DIGITAL
VOLTMETER

IJ::

6~~1:

0.47 p.F

1

SOkn
0.01%
50n
0.1%
son
0.1%

..

~2

j

+ 3

yJ:.5PF

r~i+~h 6

P
30 F:

100n

son

000"

t

son
"'VIN
D.C. INPUT
(±10V)

TOLERANCE OF ALL UNMARKED
RESISTORS IS 1%

2~

!

2kn
VIN

~

AVO
)
-15V +15V

3-79

*

J.LV/V
V/V

±12
±10

Power Consumption

lkn

mV

300

x

103

= ---=
VOUT

10 X 103
- - FOR VIN SPECIFIED
VOUT

mW

I

FAIRCHILD LINEAR INTEGRATED CIRCUllS • p.A748
TYPICAL PERFORMANCE CURVES FOR 748
INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
300

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE
10.0

V~ '±l~V

/'

/

..,E

./

30

I,\~
r---....

~

TEMPERATURE -

I'-140

-20

-60

20

140

100

60

""

10
-60

TEMPERATURE -'C

·c

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

140

100

80
Vs:' ±10
I-RL ·oo

I- VS"±lJV
40

70

30

-

1- 1""-""-

-

....

60

20

·c
POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

50
TA ·25·C

-20

TEMPERATURE -

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

40

20

~

15

100

±l~V

i'...

/

60

20

Vs'

~

0.1

-20

""

V
r--.... r-.....

-60

" "-

/V

100

o

./
/

1\

-

35

Vs' ±15V
5.0

'\
200

OUTPUT SHORT-CIRCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

.......

"

r- t-

1'--""-

r-t-.

- r-

........

'"

10

10

0

15

10

20

40

0
-60

-20

20

SUPPLY VOLTAGE - ±v

100

60

140

30

-60

-20

100

60

20

140

TEMPERATURE - "C

TEMPERATURE - ·C

TYPICAL PERFORMANCE CURVES FOR 748C
INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

OUTPUT SHORT-CI RCUIT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT RESISTANCE
AS A FUNCTION OF
AMBIENT TEMPERATURE

200

32

10

Vs' ±15V

Vs • ±'15V

VS·t5V

30

7.0
160
5.0

r-....
120

r----.....

r--

80

--

4.0
3.0

2.0

40

0

//

r-V~

...V

30

40

50

60

10

20

TEMPERATURE ·C

40

30

40

50

60

o

70

50

10

20

'c

30

40

50

~
60

70

TEMPERATURE ·C

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

TA ' 25·C

'" "

20

TEMPERATURE -

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPL Y VOLTAGE

..........

22

18

G

70

"""

24

./

1.0
20

10

'~

26

V
0

r-....

28

V

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE
80

I
I-VS'± 15V

40

70

30

60

,

·1

V
S 15V
I-RL ·,'00

30

I
20 J.-

-

-

20

--- r--

t--

100-

-f-- I---

r--

t--

50

101----4--+---+--+------4----'
40

10

o0
SUPPLY VOLTAGE - ±V

10

20

30

40

TEMPERATURE ·C

3-80

50

60

70

30

o

10

20

30

40

TEMPERATURE ·C

50

60

ro

FAIRCHILD LINEAR INTEGRATED CIRCUITS

•

/lA748

TYPICAL PERFORMANCE CURVES FOR 748 AND 748C
OUTPUT VOLTAGE. SWING
AS A FUNCTION OF
SUPPLY VOLTAGE

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGE
115

40

TAl" 25 JC

16
-TA " 25 °c
RL" 2kQ

110 r-RL "2kQ

/

32
105
100

L

95

V

V

V

24

V

16

,/

o

12

16

o

20

/

L

5

10

28

1

40

V
.1/

20

o

/

/

/

10

/

24

'/

500

"\

/

12

15

!J

I

8

20

0.1

\.

0.2

"\

0.5

1.0

10

5.0

2.0

o

25

748C FREQUENCY
CHARACTE RISTICS AS A
FUNCTION OF
AMBIENT TEMPERATURE

-

I

~r_,\.\'i

-r--.,

~

~~,Y

...........

SLE! RATE

~~~

-:;?

I

~8~

-,/

o.S /

I
I
-20

SUPPLY VOLTAGE - ± V

i"-

100

20

0.95

I---+-t---+---+-~

1«1

10

TEMPERATURE -'C

INPUT NOISE CURRENT
AS A FUNCTION OF
FREQUENCY

VS"± l5V~m~~!~~m~

~

~1016 I--t-t+f-t-++++-+-H-H-+-++t+-l

~ -17 1--t-t+1-+-+-t++-+-+-I-H--+-++H--l
10

lOIS 1OL......!-LLL-J.--'-.L.J..J..-.L~..LL..lIO-k.L...LJ....L....J
100
1k
100k
FREQUENCY - Hz

ro

00

100
VS"t 15V '
TA"WC

{IO~~~-+-+H+-+~+r+-~~

~

~~I-0..-=;....±:-ttt--+~++-+-+-HH-I

~

40

BROADBAND NOISE FOR
VARIOUS BANDWIDTHS

T " 25=q:
A

1014 ~~-+-+ttt--+~++-+-t-HH-I

~

20

TEMPERATURE -=C

1020 ,...,....,....,-.-,--TT'I""-,--....-r.,...,---r-....,..,~

N>

125

105

VIS" ± 15V

1.0

INPUT NOISE VOLTAGE
AS A FUNCTION OF
FREQUENCY

85

AMBIENT, TEMPERATURE (oCI

748 FREQUENCY
CHARACTERISTICS AS A
FUNCTION OF
AMBIENT TEMPERATURE

0.6
-00

65

45

LOAD RESISTANCE - kQ

1.2

g

I"\.

100

1.4

~ 1015

'\

748C.--'"

200

FREQUENCY CHARACTERISTICS
AS A FUNCTION OF
SUPPLY VOLTAGE

N

,748.c-- c--

~

300

I

SUPPLY VOLTAGE -±V'

~

20

'\.

400

I

16

15

10

600

V

20

/
5

5

ABSOLUTE MAXIMUM POWER
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE

--

Vs =~15J

-T =25°C
A

_RL=oo

60

o

SUPPLY VOLTAGE - tV

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE

TA' 25 ·C

80

20

15

SUPPLY VOLTAGE -, V

POWER CONSUMPTION
AS A FUNCTION OF
SUPPLY VOLTAGE

100

//

/"

SUPPLY VOLTAGE - ± V

120

/

/

/

/'

/

/V

85
80

.,,-

TA " 25 °c

14

/'

~,..-

/V

90

INPUT COMMON MODE
VOLTAGE RANGE AS A
FUNCTION OF SUPPLY VOLTAGE

-

lO-lOOkHz

!W~~~~~+-rH+-~~-+-+-H+~

II

,/

/'

lO-lOkHz

<5

~lii24 ~+++-+-+-j-j.fI~~++-+-+-H~

uJlk~Z

~
~

k-" V

~io25 ~-t+t-+--+H+--t--++++-+-t-H+-i

100

Ik
FREQUENCY - Hz

3-81

10k

lOOk

.1
100

lk

10k

SOURCE RESISTANCE-u

lOOk

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA748
TYPICAL PERFORMANCE CURVES FOR 748 AND 748C

120 r-----r-,..---r----r-,----,,--,
Vs = ±1 15V
""'5:;:rTA • +25°C_
100

••••••••••••••

~

60

~r-CC'30pF-

/

-90

~•••••••• ~

TA = +2SoC_
RS =SOQ

\

\\

-60

~~

r·······... ..

\

-ISO
••••••••••••••• \

\

1

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
FREQUENCY FOR VARIOUS
GAIN/COMPENSATION OPTIONS

10

102

Cc

40

j 2pF

lOOk

1M

1

10

100

lk

INPUT RESISTANCE AND
INPUT CAPACITANCE AS A
FUNCTION OF FREQUENCY
10M

10k

FREQUENCY - Hz

FREQUENCY - Hz

Vs =±15V
TA =2SoC=

""

lOOk

1M

10M

\

'"

\

"-

,. NO OVERSHOOT
"- (C L~ l00pFl

'"

"-

2Of,OVERta~
(C ~ 20pFi
I

I

'"~ ~

MO

20

10

100

90

A

70

400

A

Cl·'30pF.

'\

60

1.0

~

50

\

40

/

200

\.

30

II

100

ro

VS".tlSV
T ' 25'C

"- \.

IKl

300

lOOk

~

60

COMMON MODE REJECTION
RATIO AS A FUNCTION OF
FREQUENCY

\.
CIN

~

40

30

""'--=::

CLOS£D LOOP VOLTAGE GAl N - dB

VS"115V
T ' 25 'c
500

10

10M

VS "±lSVTA "25°CRL "2kl'l _

1\

........ r-,

RIN
1M

......
1M

\

L

1.0

OUTPUT RESISTANCE
AS A 'FUNCTION OF
FREQUENCY
100

III

2.0

I

-20

10M

S.O

cc·s~3 K···.

C)3OpF

20

10

CC=31~

20

r--.
lOOk

10k

lk

COMPENSATION CAPACITANCE
AS A FUNCTION OF
CLOSED LOOP VOLTAGE GAIN
so

-'" L

Cc -lpF

o

FREQUENCY - Hz

"~lSV

60

_2O'----L._~~'---L_~~~W

107

Vs
TA -2SoC_
RL ~ 10kQ

80

10k

\

1\

"

FREQUENCY RESPONSE
FOR VARIOUS
CLOSED-LOOP GAINS

100

lk

\
Cc • 30pF

106

103
104
loS
FREQUENCY - Hz

120

100

\C C ' 3pF

\

16

-210

FREQUENCY - Hz

10

1\

-180

-20 '-----'---'--'----'---'-----''---'
102
1
10
103
104
lfY

1

32

I',

'" •••••••••••• " "

•••...

Vs • !lSV
TA = 25 °c
RL =1OkQ

24

RL = 2kQ-"
Cc = 30pF

-120

20

40

VS=~15V

.~ ~-RL-2kQ
Cc = 3pf

RS"SOQ

R =2kQ
L

40

-30

••••••
~ RL '2kQ
•••••••••
'--CC=3pF
•

80

OUTPUT VO L T AG E SWI NG
AS A FUNCTION OF
FREQUENCY

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF
FREQUENCY

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
FREQUENCY

\

20
10

10k

100

lk

lOOk

10k

1M

0.1

0
100

lk

10k

lOOk

1M

100

10

FREQUENCY - Hz

FREQUENCY - Hz

VOL TAGE FOLLOWER
TRANSIENT RESPONSE
(GAIN OF 1)

lk

lOOk

10k

1M

10M

FREQUENCY - Hz

VOLTAGE FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE

TRANSIENT RESPONSE
TEST CIRCUIT

10 r---r--.--,...---r--r---r-r---r--.--,

28

VSI=±l~V
f--t--t---t--+--+-+----1r-T A• 2S °C-

24

-

20
90%

16

I--+--+--+--+---+--t-t--RL' 2kQ _
II'"" I
l
Cl ~ loopF
:I
I
l
xl
i
I-OUTPUT
~ ~- Cc "3OpF_
'
INPUTI-il \

~---4--.....- - - o V O U T

I

12

I

-

-2

I

Cc

VS= !ISV_

~

30pF

!A = 25°C
RL' 2kQ CL'loopF

RIS£Tlj

.S

1.0

1.5

2.0

2.5

TlME-(JS

i/
II

11

:1

~x 10'\'--+-+--1
1--+--+-+--t----1f-+!.1'
: I CC· 3pF.l..

-6

f-~-t---t---t---+--+-i-j"i-.---j"T'---j----t---I

-10

'--.1..-~-'--L---'-~_'---.1..-~""

o

10

20

30

40

~

TIME -1lS

3-82

\

60

ro

~

90

FAIRCHILD LINEAR INTEGRATED CIRCUITS • MA748
TYPICAL PERFORMANCE CURVES FOR 748 AND 748C

FEED-FORWARD COMPENSATION
LARGE SIGNAL FEED-FORWARD
TRANSI ENT RESPONSE
10

F~f

Vs - ±ISV

10kn

VI

Rl - 00
Cl -lOff
TA ' 25 °c

7.5

F~~OO

N

'::'

S.O

f

10kn
VIN

31 ~A748~6""'-_-0 VOUT

.-----+-3.0-k-n-I..:!.I~

1

2.5

t_ ~~PF

•

1\

I

1\

\

\

0

150pF

-2.S

0

1.0

2.0

3.0

4.0

S.O

6.0

RESPONSE TI ME - IJS

TYPICAL APPLICATIONS

PULSE WIDTH MODULATOR

VIN
±SV

Rl
l00kn

:r"
,,~.I

0.47~F~

R2
l00kn

C2

:r

VOUT

l

R3
10kn
1
fc =

R4
l00kn

21T R2

Cl

R2

~~~.~V

fn =

02
";:F-<6.2V

=
fc

21T R2

'

8

R3

R3

C2

II-

1:
I~

-:;:-30pF

30pF

-::'

~6

VIN
-VOUT

I

Cl

1

"Iii 7
~

21T Rl

+~V

'''~ft:.
~A748

+

1

~

Rl

R2

3 +

RS
loon

CIRCUIT FOR OPERATING THE ,uA748
WITHOUT A NEGATIVE SUPPLY

PRACTICAL DIFFERENTIATOR

-

,1

l_

< fn < funity gain

NOTES

1.
2.
3.

Rating applies to ambient temperature up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for the Metal Can, 8.3 mW/oC for
the DIP, 5.6 mW/oC for the Mini DIP and 7.1 mW/oC for the Flatpak.
For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
Short circuit may be to ground or either supply. Rating applies to +125°C case temperature or +75°C case temperature or +75°C ambient
temperature.

3-83

•

IJA776
MULTI-PURPOSE PROGRAMMABLE OPERATIONAL AM PLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUIT

DESCRIPTION - The /J-A776 Programmable Operational Amplifier is constructed using the Fairchild
Planar* epitaxial process. High input impedance, low supply currents, and low input noise over a wide
range of operating supply voltages coupled with programmable electrical characteristics result in an
extremely versatile amplifier for use in high accuracy, low power consumption analog applications.
Input noise voltage and current, power consumption, and input current can be optimized by a single
resistor or current source that sets the chip quiescent current for nano-watt power consumption or for
characteristics similar to the /J-A 741. Internal frequency compensation, absence of latch up, high slew
rate and short circuit current protection assure ease of use in long time integrators, active filters, and
sample and hold circuits.
•
•
•
•
•

MICROPOWER CONSUMPTION
±1.2V to ±18V OPERATION
NO FREQUENCY COMPENSATION REQUIRED
LOW INPUT BIAS CURRENTS
WIDE PROGRAMMING RANGE

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Mini DIP
Differential Input Voltage
Input Voltage (Note 2)
Voltage Between Offset Null and VISET (Maximum Current at ISET)
VSET (Maximum Voltage to Ground at ISET)
Storage Temperature Range
Metal Can, DIP
Mini DIP
Operating Temperature Range
Military (776)
Commercial (776C)
Lead Temperature (Soldering, 60 seconds)
Metal Can, DIP
Mini DIP
Output Short-Circuit Duration (Note 3)

•
•
•
•
•

HIGH SLEW RATE
LOW NOISE
SHORT CIRCUIT PROTECTION
OFFSET NULL CAPABILITY
NO LATCH UP
±18 V
SOOmW
670mW
310mW
±30V
±15 V
±O.S V
500/J-A
(V+ -2.0V)';;;;VSET';;;;V+

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5B

V-

ORDER INFORMATION
TYPE
PART NO.
776
776HM
776C
776HC
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

N.C.

N.C.

N.C.

N.C.

OFFSET NULL

-6S0C to +1S0°C
-S5°C to +125°C
-SSOC to +125°C
O°C to +70°C
300°C
260°C
Indefinite

EQUIVALENT CIRCUIT
r---------~--1_-+-n~~~--~--------~r_~v+

ISET
V+

INVERT INPUT
NON· INVERT
INPUT
V-

OUTPUT
OFFSET NULL
N.C.

N.C.

ORDER INFORMATION
TYPE
PART NO.
776
776DM
776C
776DC
8-LEAD MINI DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

OUTPUT
OFfSET N U L L D 8 ISET

~--~----~--~--~~------~--------~~~v-

INVERT INPUT

2

7

V+

NON.I~~~~i

3

6

OUTPUT

v-

4

5

OFFSET NULL

ORDER INFORMATION
TYPE
PART NO.
776C
776TC
·Planar is a patented Fairchild process.

3-84

FAIRCHILD LINEAR INTEGRATED CIRCUITS. J.LA776
±15 VOLT OPERATION FOR 776
ELECTRICAL CHARACTERISTICS (T A = 25°C, Unless Otherwise Specified)
ISET = 1.5/.LA
PARAMETERS
Input Offset Voltage
Input Offset Current

MIN.

CONDITIONS

ISET = 15/.LA

TYP.

MAX.

TYP.

MAX.

RS~10kn

2.0

5.0

2.0

5.0

mV

R~10kn

0.7

3.0

2.0

15

nA

2.0

7.5

15

50

nA

Input Bias Current

MIN.

UNITS

I nput Resistance

50

5.0

Mn

Input Capacitance

2.0

2.0

pF

Offset Voltage Adjustment Range

9.0

18

mV

Large Signal Voltage Gain

RL~75kn,

200k

VOUT =±10V

400k

V/V

RL~5kn, VOUT =±10V

100k

400k

V/V

5.0k

1.0k

n

Output Short-Circuit Current

3.0

12

mA

Supply Current

20

Output Resistance

25

160

0.75

Power Consumption
Transient Response
Risetime

(unity gain)

VIN = 20mV, RL ~ 5kn,

Overshoot
Slew Rate
Output Voltage Swing

RL~5kn

±12

RL~75kn

/.LA

5.4

mW

0.35

/.LS

0

10

%

0.1

0.8

1.6

CL = 100pF

180

V//.LS

±14

V
±10

RL~5kn

±13

V

The following specifications apply -55°C~T A~ +125°C
Input Offset Voltage
I nput Offset Current

Input Bias Current

6.0

mV

5.0

15

nA

10

40

nA

RS~10kn

6.0

TA = +125°C
TA = -55°C
TA = +125°C

7.5

50

nA

TA = -55°C

20

120

nA

Input Voltage Range

±10

Common Mode Rejection Ratio

RS~10kn

Supply Voltage Rejection Ratio

RS~10kn

Large Signal Voltage Gain

RL~75kn,

Output Voltage Swing

RL~75kn

70

±10
90
25

VOUT=±10V

70
150

V
90
25

100k

75k

±10

±10

dB
150

/.LV/V
V/V
V

Supply Current

30

200

/.LA

Power Consumption

0.9

6.0

mW

3-85

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JJ.A776
±3 VOLT OPERATION FOR 776
ELECTRICAL CHARACTERISTICS (T A = 25° C, Unless Otherwise Specified)
ISET = 15~A

ISET = 1.5~A
\

PARAMETERS

CONDITIONS

Input Offset Voltage

MIN.

RSE;;10kn

TYP.

MAX.

2.0

MIN.

UNITS

TYP.

MAX.

5.0

2.0

5.0

mV
nA

Input Offset Current

0.7

3.0

2.0

15

Inp4t Bias Current

2.0

7.5

15

50

nA

Input ReSistance

50

5.0

·Mn

Input Capacitance

2.0

2.0

pF

9.0

18

mV

Offset Voltage Adjustment Range
Large Signal Voltage Gain

RL~75kn,
RL~5kn,

50k

VOUT=±1V

200k

V/V'
50k

VOUT=±1V

Output Resistance

5k

V/V

200k
1k

n

Output Short-Circuit Current

3.0

Supply Current

13

20

130

160

p,A

Power Consumption

78

120

780

960

~W

Transient Response

Risetime

(unity gain)

VIN = 20mV, RL ~ 5kn,
CL E;; 100pF

Overshoot
Slew Rate

RL~5kn

..
The following specifications apply for -55 ° C Et; T A Et;
I nput Offset Voltage
Input Offset Current

Input Bias Current

0.6

~s

0

5

%

0.03

0.35

V/~s

+125°C

RSEt;10kn

6.0

6.0

mV

5.0

15

nA

TA = -55°C

10

40

nA

TA = +125°C

7.5

50

nA

TA = -55°C

20

120

nA

Input Voltage Range

±1.0
RSE;;10kn

Supply Voltage Rejection Ratio

RSEt;10kn

.70

±1.0
86
25

RL~75kn,VOUT=±1V
RL~5kn,

Output Voltage Swing

3.0

T A = +125°C

Common Mode Rejection Ratio

Large Signal Voltage Gain

mA

5.0

70
150

V
dB

86
25

150

25k

VOUT=±1V

RL~75kn

±2.0

~V/V

V/V

25k

V/V

±2.4

V

RL~5kn

±1.9

±2.1

V

Supply Current

25

180

~A

Power Consumption

150

1080

~W

NOTES
1.

Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW!OC for Metal Can, 8.3 mW!OC for the
DIP, and 5.6 mW!8C for the Mini DIP.

2.
3.

For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
Short Circuit may be to ground or either supply • . Rating applies to +12SoC case temperature or +7SoC ambient temperature for

'SET Et; 30 ~A.

3-86

FAIRCHILD LINEAR INTEGRATED CIRCUITS. J-LA776
±15 VOLT OPERATION FOR 776C
ELECTRICAL CHARACTERISTICS (T A = 25°C, Unless Otherwise Specified)
ISET = 151lA

ISET = 1.51lA
TYP.

MAX.

2.0

Input Offset Cl!rrent
Input Bias Current

PARAMETERS

CONDITIONS

MIN.

RS~10kn

Input Offset Voltage

MIN.

TYP.

MAX.

UNITS

6.0

2.0

6.0

mV

0.7

6.0

2.0

25

nA

2.0

10

15

50

nA

Input Resistance

50

5.0

Mn

Input Capacitance

2.0

2.0

pF

9.0

18

Offset Voltage Adjustment Range
Large Signal Voltage Gain

RL~75kn,
RL~5kn,

50k

VOUT=±10V

V/V
50k

VOUT=±10V

Output Resistance

5.0

Output Short-Circuit Current

3.0

Supply Current

20

Power Consumption

400k

V/V

1.0

kn

VIN = 20mV, RL ~ 5kn,
Risetime

(unity gain)

CL

~

100pF

Overshoot
Slew Rate

RL~5kn

±12

RL~75kn

Output Voltage Swing

mA

12
30

160

0.9

Transient Response

mV

400k

190

IlA

5.7

mW

1.6

0.35

IlS

0

10

%

0.1

0.8

V/IlS

±14

V
±10

RL~5kn

V

±13

The following specifications apply to O°C~T A~ +70°C
Input Offset Voltage
I nput Offset Current

Input Bias Current

RS~10kn

7.5

7.5

mV

TA = +70°C
TA =O°C

6.0

25

nA

10

40

nA
nA

TA=+70°C

10

50

TA = O°C

20

100

±10

Input Voltage Range
Common Mode Rejection Ratio

RS~10kn

Supply Voltage Rejection Ratio

RS~10kn

Large Signal Voltage Gain

RL~75kn,

Output Voltage Swing

RL~75kn

70

90
25

VOUT=±10V

Supply Current
Power Consumption

3-87

70
200

nA
V

±10

dB

90
25

200

IlV/V

50k

50k

V/V

±10

±10

V

35

200

IlA

1.05

6.0

mW

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.LA776
±3 VOLT OPERATION FOR 776C
ELECTRICAL CHARACTERISTICS (T A = 25°C, Unless Otherwise Specified)
ISET = 1.5J,LA
PARAMETERS

MIN.

CONDITIONS

I nput Offset Voltage

TYP.

ISET = 15J,LA
MAX.

MIN.

TYP.

MAX.

UNITS

2.0

6.0

2.0

6.0

mV

I n put Offset Cu rrent

0.7

6.0

2.0

25

nA

Input Bias Current

2.0

10

15

50

Input Resistance

50

5.0

Mn

Input Capacitance

2.0

2.0

pF

Offset Voltage Adjustment Range

9.0

18

mV

RS';;;10kn

Large Signal Voltage Gain

RL~75kn, VOUT=±1V
RL~5kn,

25k

200k

nA

V/V
25 k

VOUT=±1V

200k

V/V

Output Resistance

5.0

1.0

kn

Output Short-Circuit Current

3.0

5.0

mA

Supply Current

13

20

130

170

J,LA

Power Consumption

78

120

780

1020

J,LW

Transient Response

Risetime

(unity gain)

VIN = 20mV, RL;;;;' 5kn,
CL = 100pF

Overshoot
Slew Rate

RL~5kn

3.0

0.6

J,LS

0

5

%

0.03

0.35

V/J,LS

The following specifications apply for O°C';;;T A';;;+70°C
Input Offset Voltage
I nput Offset Current

Input Bias Current

RS';;;10kn

7.5

7.5

mV

TA = +70°C

6.0

25

nA

TA = O°C

10

40

nA

TA = +70°C

10

50

nA

TA = O°C

20

100

nA

±1.0

Input Voltage Range
Common Mode Rejection Ratio

RS';;;10kn

Supply Voltage Rejection Ratio

RS';;;10kn

Large Signal Voltage Gain

±1.0
70

86
25

RL~75kn,VOUT=±1V
RL~5kn,

Output Voltage Swing

70

200

V
86
25

dB
200

25k

V/V
25k

VOUT=±1V
±2.0

RL~75kn

J,LV/V

V/V

±2.4

V

RL~5kn

±2.0

±2.1

V

Supply Current

25

180

J,LA

Power Consumption

150

1080

J,LW

3-88

FAIRCHILD LINEAR INTEGRATED CIRCUITS • llA776
TYPICAL PERFORMANCE CURVES FOR 776 AND 776C
INPUT BIAS CURRENT
AS 'A FUNCTION OF
SET CURRENT
100

II

30

I

f-T "zsoc
f- A
f- ±3.OV SVSS ±ISV

±3 .0V S ~ SS ±isv
1

24

\

\

"-

V

"-

"-

z

-

,/

V

0.1
0.01

0.1

o

10

100

- -i

-20

-60

ISET - SET CURRENT - ~A

20

ISET "ISiJA

"'JI

::::>

/

"\

ISET "ISiJA

"'-,

/

I

±3.0V SVSS ±18V

\

"'-,

/

10

INPU.T OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

"I"-

~A r-60

100

'i-I

-

"-

-t--+

o

-20

-60

140

20

100

60

140

TEMPERATURE - °c

TEMPERATURE - °c

CHANGE IN INPUT OFFSET
VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
(UNNULLED)

CHANGE IN INPUT OFFSET
VOLTAGE 'AS A FUNCTION
OF SET CURRENT

--

I

ISET "l.SJJA

INPUT NOISE VOLTAGE
AS A FUNCTION OF
SET CURRENT

-~------""-

500

T " 2SOC
A
±3.0V S Vss±ISV f--

>

;'-300

(!)

~
>

~

SOO

I

"

100

~

~

I I I

Vs" ±15V -

400

1SET "l5IIA

300

.....

I'-..

15

..........

5

~ -100

I"-

z

~

100

~

0

z

,

"r-......

(!)

z

5 -300

100

(!)

~

V~

5

10

't

/v

\@ -100

-S

:I:

/'

~

~ 200

./

L
-300

./

~

~

V

1O- 14 1-+-+H-+-+-f+
' f"o.:-I-++++-+--+-f-++--l
i

1O-

IS

t-+-++t--+--+-H+--+-++t+-'l"-d-++H

:z


~

~

10-15

f-

I

I

I

I

±3.0Vs VSs ±lSV
TA"ZSoC
-

r\

10

21
1
~
~ '=::::::- en USET "15JJAI

bj

~

"-

'\.

I

I

~

in2 USET -ISiJAI

I'-...

'"

'" r.....

_ r--

1

in

"

1_

10-27
10k

Ik

100

r-..

r-USET " I.SiJAI _
r--

2

I
10

lOOk

10-30 L-J....J....U---L.-l..-L...LJ....--'--...l..-U..J..111--,--,1-l.1..J..J
11--1
0.01
0.1
10
100

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
T " zsOc
A

...... 1-'

~

24

"

/V

A,

18

I

V

12

o
lk

ISET" ISIlA

~-

I

f--

24

ISET "15JJA
RL "5kQ

>-

20

"

g

16

~,"\r-I.SIlAS ISET slS1lA

12

.,f
~V

_

I I 'I III
lOOk

LOAD RESI STANCE - Q

0.1

V
o

~~

...... 1'"

..... 1"" 1/

lOOk

ISET "l.SiJA
R "5kQ L

./

~

....... 1"'"

Vs -t3.0\1 -

I--

V
./

10k

V

I

'--r-

o
1M

TAI"~ob I

Vs "!15V

~/

V----

100

GAl N-BANDWI DTH
PRODUCT AS A FUNCTION
OF SET CURRENT

1M

y /'"

~

'" "

10

1SET -SET CURRENT 1lA

10M

1
I
1.5JJA 5 ISETSI5~A
RL • 7SkQ

T "2SoC
A

28

Vs" ± 15V
ISET" I.SJJA

,

-

JS'!15~+

.001

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
SUPPLY VOLTAGE
32

L......H""

L..----

0.1

1SET - SET CURRENT - JJA

FREQUENCY - Hz

30

"'-

I

±3

±6

!..I\tv----......

YIN
-15V

l00kn

VOUT

-1.2V

R3

Slo--"Atv-......- - £

91k!1

22M!1

+15V O-';";O"I'y----.....

PD =600nW

":'

":'

-15V

HIGH INPUT IMPEDANCE
AMPLIFIER

50Mn
90k!1

+15V
500kn
-15V

+15V

6

"IN

·OUT
500kn

S3

30Mn

50Mn

-=

":'

3-92

10kn
":'

":'

-15V

JJA777
PRECISION OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUIT

GENERAL DESCRIPTION - The }1A777 is a monolithic Precision Operational Amplifier constructed
using a low noise Fairchild Planar* epitaxial process. It is an excellent choice when performance versus
cost trade-offs are possible between super beta or FET input operational amplifiers and low cost
general purpose operational amplifiers. Low offset and bias currents improve system accuracy when
used in applications such as long term integrators, sample and hold circuits and high source impedance
summing amplifiers. Even though the input bias current is extremely low, the }1A777 maintains full
±30 V differential voltage range. The internal construction utilizes isothermal layout and special
electrical design to maintain system performance despite variations in temperature or output load.
High common mode input voltage range, latch-up protection, short circuit protection and simple
frequency compensation make the device versatile and easily used.
•
•
•
•
•

8-LEAD METAL CAN
(TOP VIEW)
PACKAGEOUTLINE 58

OUTPUT

vNOTE: Pin 4 connected to case

LOW OFFSET VOLTAGE AND OFFSET CURRENT
LOW OFFSET VOLTAGE AND CURRENT DRIFT
LOW INPUT BIAS CURRENT
LOW INPUT NOISE VOLTAGE
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Mini DIP
Flatpak
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP, and Flatpak
Mini DIP
Operating Temperature Range
Military (777)
Commercial (777C)
Lead Temperature
Metal Can, DIP and Flatpak (Soldering, 60 seconds)
Mini DIP (Soldering, 10 seconds)
Output Short-Circuit Duration (Note 3)

CONNECTION DIAGRAMS

ORDER INFORMATION
TYPE
PART NO.
777
777 HM
777C
777 HC
l4-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

±22 V
500mW
670mW
310mW
570mW
±30 V
±15 V

INVERT

INPUT
NON

t~~~~i
v-

-65° C to +150° C
_55° C to +125° C

ORDER INFORMATION
PART NO.
TYPE
777DM
777
777DC
777C

_55° C to +125° C
0° C to 70° C

8-LEAD MINI DIP
(TOP VIEW)
PACKAGE OUTLINE 9T
COMPOFfSETDFREQ
NULL
1
8
COMP

300° C
260° C
Indefinite

COMP OFFSET NULL

2

7

V+

IN:E~~

3

6

OUTPUT

INPUJ

4

5

2~~lET

ORDER INFORMATION
TYPE
PART NO.
77]C
777TC

EQUIVALENT CIRCUIT
INVERTING INPUT

'7~~t

COMPo

r-------~+_~----~----+_~_,------------~~V+

lO-LEAD FLATPAKt
(TOP VIEW)
PACKAGE OUTLINE 3F
N.C
FREQ. COMPo
OFFSET NULL
INVERTING
INPUT
NON· INVERT.
INPUT
V-

N.C
FREQ. COMPo

V+
OUTPUT
OFFSET NULL

t Available on special request

ORDER INFORMATION
PART NO.
777FM

TYPE
777

* Planar is a patented Fairch ild process.

Notes on following pages.·

3-93

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A777
ELECTRICAL CHARACTERISTICS FOR 777 (VS

= ± 15 V, T A = 25°C, Cc = 30 pF unless otherwise specified)

PARAMETERS

CONDITIONS

Input Offset Voltage

RS

~

MIN.

50 kn

Input Offset Current
Input Bias Current
Input Resistance

TYP.

MAX.

UNITS

0.5

2.0

mV

0.25

3.0

nA

8.0

25

nA

10.0

Mn

Input Capacitance

3.0

pF

Offset Voltage Adjustment Range

±25

mV

2.0

RL ~ 2 kil, VOUT = ±10V

Large Signal Voltage Gain

50,000

250,000

Output Resistance

100

Output Short-Circuit Current

±25

V/V
il
rnA

Supply Current

1.9

2:8

mA

Power Consumption

60

85

mW

Transient Response
(Voltage Follower,
Gain of 1)

VIN = 20 mY, Cc = 30 pF,
Risetime

RL = 2 kil, CL

~

100 pF

Overshoot

Slew Rate

RL

~

2kil

0.3

JJ,s

5.0

%

0.5

V/JJ,s

0.2

JJ,s

5.0

%

5.5

V/JJ,s

(Voltage, Follower, Gain of 1)
Transient Response
(Voltage Follower,
Gain of 10)

VIN = 20 mY, Cc = 3.5 pF,
Risetime

RL = 2 kil, CL ~ 100 pF

Overshoot
Slew Rate

RL

~

2 kil, Cc = 3.5 pF

(Voltage Follower, Gain of 10)
The following specifications apply for _55° C ~ T A ~ +125° C:
Input Offset Voltage

RS

~

50 kn

0.5

3.0

Average Input Offset Voltage Drift

RS

~

50 kn

2.5

15

Input Offset Current
Average I nput Offset Current Drift

10

nA

25°C ~ TA ~ +125°C

2.5

30

pArC

-55°C ~ TA ~ 25°C

6.5

150

pArC

Input Bias Current

75

Input Voltage Range
Common Mode Rejection Ratio

RS

~

50 kil

Supply Voltage Rejection Ratio

RS

~

50 kn

Large Signal Voltage Gain

RL ~ 2 kil, VOUT = ± 10 V

Output Voltage Swing
Supply Current
Power Consumption

mV

JJ,VrC

RL

~

±12

±13

80

95
13

10 kn

RL ~ 2 kil

nA
V
dB

100

25,000

JJ,vtv
V/V

±12

±14

±10

±13

V
V

TA = +125°C

1.5

2.5

rnA

TA = -55°C

2.0

3.3

rnA

T A = +125°C

40

75

mW

TA = -55°C

60

100

mW

3-94

FAIRCHILD LINEAR INTEGRATED CIRCUITS ellA777
ELECTRICAL CHARACTERISTICS FOR 777C (VS = ±15 V, TA = 25°C, Cc = 30 pF unless otherwise specified)
PARAMETERS

CONDITIONS

Input Offset Voltage

MIN.

RS';;;; 50 kU

Input Offset Current
Input Bias Current
I nput Resistance

1.0

Input Capacitance
Offs~t Voltage Adjustment Range

RL ~ 2 kn, VOUT = ±10V

Large\Signal Voltage Gain

25,000

TYP.

MAX.

UNITS

0.7

5.0

mV

0.7

20.0

nA

25

100

nA

2.0

Mn

3.0

pF

±25

mV

250,000

V/V

Output Resistance

100

n

Output Short-Circuit Current

±25

mA

Supply Current

1.9

2.8

mA

Power Consumption

60

85

mW

Transient Response
(Voltage Follower,
Gain of 1)

VIN = 20 mV, Cc = 30 pF,
Risetime

RL = 2 kn, CL .;;;; 100 pF

Overshoot
Slew Rate

RL

~

2 kn

0.3

/J.S

5.0

%

0.5

V//J.s

0.2

/J.S

5.0

%

5.5

V//J.s

(Voltage Follower, Gain of 1)
Transient Response
(Voltage Follower,
Gain of 10)

VIN = 20 mV, Cc = 3.5 pF,
Risetime

RL = 2 kU, CL .;;;; 100 pF

Overshoot
Slew Rate

RL

~

2 kU

(Voltage Follower, Gain of 10)
The following specifications apply for 0° C .;;;; T A .;;;; + 70° C
Input Offset Voltage

RS';;;; 50 kU

0.8

5.0

mV

Average Input Offset Voltage Drift

RS';;;; 50 kU

4.0

30

/J.VrC

25°C';;;; T A ';;;;+70°C

0.01

0.3

nArC

O°C.;;;; TA ';;;;+25°C

0.02

0.6

nArC

Input Offset Current
Average I nput Offset Current Drift

40

Input Bias Current

200

Input Voltage Range
Common Mode Rejection Ratio

RS';;;; 50 kn

Supply Voltage Rejection Ratio

RS';;;; 50 kU

Large Signal Voltage Gain

RL~

Output Voltage Swing

±12

±13

70

95
15

2kn,VOUT=±10V

nA
V
dB

150

15,000

/J.V/V
V/V

RL

~

10 kU

±12

±14

RL

~

2 kU

±10

±13

Power Consumption

nA

60

V
V
100

mW

NOTES
1.
2.
3.

Rating applies to ambient temperatures up to 70° C. Above 70° C ambient derate linearly at 6.3 mW/ C for Metal Can, 8.3 mW/ C for the DIP
5.6 mW/C for the Mini DIP and 7.1 mW/C for the Flatpak.
For supply voltages less than ± 15 V, the absolute maximum input voltage is equal to the supply voltage.
Short circuit may be to ground or either supply. Rating applies to +125°C case temperature or +75°C ambient temperature.

3-95

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p,A777
TYPICAL PER FORMANCE CURVES FOR 777 AND 777C

120

~25°C

-

..,.,.100

777C: O°C < TA < 70°C

/'

RL ' 2k{l

32

~

16

777: -55°C < TA < 125°C

TA
RL =2kr2-

110

/"

~

/'

12

/'

15

.10

a

20

100
50

r--:

LBI
TA =25°C _

500

20

/

10

V-

~

-r-

-20

20

80

1.6

1.0
0.8

-

J7C

100

60

0.1
-60

140

-20

100

140

OUTPUT VOLTAGE SWING
AS A FUNCTION OF
LOAD RESISTANCE
28

Vs .1±15J
-T '2S OC
A

..........

---

/

...........

/

...................

V

/

.................

V
I

I

777
~

I

0.2

o

5

15

10

20

30
-60

-20

60

20

100

/

8

140

0.1

0.5

0.2

1.0

2.0

5.0

10

SUPPLY VOLTAGE - ±v

TEMPERATURE - °c

LOAD RESISTANCE - k{l

OUTPUT SHORT-CIRCUIT
CURRENT AS A FUNCTION
OF AMBIENT
TEMPERATURE

ABSOLUTE MAXIMUM
POWER DISSIPATION AS
A FUNCTION OF AMBIENT
TEMPERATURE

INPUT NOISE VOLTAGE
AND CURRENT AS A
FUNCTION OF FREQUENCY

35

30

60

POWER CONSUMPTION AS
A FUNCTION OF AMBI ENT
TEMPERATURE

1-........ ........

0.4

20

TEMPERATURE - °c

50

0.6

-17~

0.2

70

60

V

V

0.5

VS' ±15V_
RL ' 00

----

1.2

I--""'"

V

1.0

I

TA ' 25°C

1.4

L...-777

......

20
•

1 - r--- r---

,-

TEMPERATURE - °c

SUPPLY VOLTAGE - ± V

INPUT OFFSET CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

./"
I

1i

I

-60

20

10
=:= 5.0

OFFSET 777

0.1

Vs' ±15V

_V

a

-- - - ~
I"--

15

20

30

.......

10

15

10

INPUT RESISTANCE AS
A FUNCTION OF
AMBIENT TEMPERATURE

~FFSET777C:

1
5

/
5

I

I

V

INPUT CURR ENT AS
A FUNCTION OF
AMBIENT TEMPERATURE

........... BIAS 777C

10

~

o

20

IS

~VS'+15V

//

/
//

SUPPLY VOLTAGE ±V

100

1/

8

SUPPLY VOLTAGE -. V

SUPPLY VOLTAGE - ±V

POWER CONSUMPTION AS
A FUNCTION OF SUPPLY
VOLTAGE

10

i

10

5

"'"

g
z

'"
5

;

'"
~

./

90

/

>
+1

z

V

16

.,--

777: -55°C~f-+-+--+--+-Vs

f

•• ± 15V

I
20

40

60

0

~

-10

~

-20 --

~

-30

i

G

-40

/

-

I-""

/
TA '25°C - I-Vs ' ±l5V
V
I NTAL rFSErOLrGE ,1II

-50

100

80

.--lL1/

z

-c---

INIITlA~ OFF~T V?LT~GE ---.----=-I

\
1\

2.5

\

\

-2.5

o

1.0

2.0

3.0

RESPON~E

4.0

5.0

6.0

TI ME - US

GAIN TEST CIRCUIT

VOLTAGE OFFSET
NULL CIRCUIT

VOUT
o-__---Jo/'Ir-.-__

-+-~

DIGITAL
VOLTMETER

DC INPUT
Vs • ±15V)

(± 10V FOR

TOLERANCE Of ALL UNMARKED
RES) STORS IS I~

10MQ

5.IMQ
2kQ
25kQ

SUGGESTED

ALTERNATE

3-98

103

A .V)NX
VO
VOU!

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p,A777
TYPICAL APPLICATIONS
SAMPLE AND HOLD

BIAS COMPENSATED LONG TIME INTEGRATOR

V+

>--+---0 OUTPUT

30pF

* Adjust

R3 for minimum integrator drift

AMPLIFIER FOR CAPACITANCE TRANSDUCERS

CAPACITANCE MULTIPLIER

lOMO

•
Low Frequency Cutoff R1 x C 1

HIGH SLEW RATE POWER AMPLIFIER

~LATERALCURRENTSOURCE

...-----.-0 +15V

INPUTo--""""'~

OUTPUT

51kQ
INPUT O--'VV'v-+-t

1

RL

-:-15Q

lOOkQ

OUTPUT
51kQ

3pF

2N6124

I80Q
'-----+--0

± 100 V COMMON MODE RANGE

-I5V

INSTRUMENTATION AMPLIFIER WITH
HIGH COMMON MODE REJECTION

INSTRUMENTATION AMPLIFIER
R3

lOOkQ

>--+---~-

"-

10

f:::TC= 25°C

1 M

10- 13

FREQUENCY - Hz

I-J =11 115 ~

100 k

~
o

60

INPUT NOISE CURRENT
AS A FUNCTION OF
FREQUENCY

r.......

10 k

INPUT NOISE VOLTAGe
AS A FUNCTION OF
FREQUENCY

~

r--.

30

~

::t:

POWER SUPPLY VOLTAGE - ± V

10- 22

lk

~
.IV

>

40

20

......

FREQUENCY - Hz

80

Tcl:c

15

100

180

v'= ~ll~lv
TC = 25·C

20
10

III

TYPICAL POWER SUPPLY REJECTION
RATIO AS A FUNCTION OF
FREQUENCY (791)
100

x

60

o
TC - CASE TEMPERATURE _·C

TYPICAL PERFORMANCE CURVE
VOLTAGE GAIN AS A FUNCTION
OF POWER SUPPLY VOLTAGE

z

20

2.5

III
III
lOUT> 0

o
140

TC - CASE TEMPERATURE _·C

~

!;
,2

:----

Z

IOUT< 0

5.0

I

"'" -

:;)

.............

50
-60

7.5

~

1\

I-

0

II

eo: 10.0

\\

~

\

J

V = 115 V

I-

150

~

OUTPUT RESISTANCE
AS A FUNCTION OF
FREQUENCY (OPEN LOOP)

~C= 1:5 Q ~C=0.62 Q

"-

RSC = 3.0 Q

1000

0_L60~--_2LO~--2LO~--6LO~~10LO~~140
TC - CASE TEMPERATURE _·C

3-103

2.5 L-_..LL.._..J.L._..L....._...LL_...L-_....I
o
250
500
750
1000
1250
1500
lOUT - OUTPUT CURRENT - ± rnA

FAIRCHILD LINEAR INTEGRATED CIRCUITS. tLA791
TYPICAL PERFORMANCE CURVES FOR 791 AND 791C (Cont'd)
MAXIMUM POWER
DISSIPATION PER OUTPUT
TRANSISTOR AS A FUNCTION
OF CASE TEMPERATURE

SHORT CIRCUIT CURRENT
AS A FUNCTION OF CURRENT
SENSE RESISTOR, RSC

OUTPUT SAFE OPERATING AREA
PER OUTPUT TRANSISTOR

25

1500
15

i1

~

20

o
>
I

/
V'

f-

10

6°CIW

::>

'\

::>

f-

o
I

'\.

-7.5

~

deN

/ /

o
>

1250

I

II

~

15



o
>

/ /

-15

1000

25

-25

50

75

100

TC - CASE TEMPERATURE -

~

J.

~

';;-<20 s

........

1

1000

...................

I

7S0

f-

::>

u
a: 500
U
fa:

~

250

----

1/

r--

1.0

1M

I

2S

~~

V

lOOk

~

/

~

S
~

/

/"

10k

10

v,

L/

,/
1.0

./

V

T-

75

100

lk

125

1

o. 1

100

10

vI = I±Wv

IJU1U
RL= 11 n
TC = 25°C

60

RL = 11 n
Tc = 25°C

40

-40

60
40

"

Ce = 0
-80

~~
......
Ce = 100 pF

20

o

10

100

~

IIII

Ce = 5pF
-120

t:::~

10 k

FREQUENCY - Hz

"

~d}I=O
r-.;:
J I~ I

""
100 k

-240
10

1 M

...J

;)

20

~

\

~r\

UJl
IIII

LIJ

PF

1\

100lpF

lk

10 k

100 k

100

1 M

10 k

=

TYPICAL OFFSET VOL TAGE NULLED
AS A FUNCTION OF
CASE TEMPERATURE
v

115 v

=

±'15 V

+0.5

I~~

1\
.............

100 k

FREQUENCY - Hz

FREQUENCY - Hz

v

r-- r--"-

V

V

-0.5

o
-60

-20

20

60

100

140

-

_Ull
100

TYPICAL OFFSET VOLTAGE
UN-NULLED AS A FUNCTION OF
CASE TEMPE RATURE

"

'r-..

1111

o
>

i"

IJI=
RL = 11 n
TC = 2SoC

LIJb

-200

~

11~J

40

";

-160

~~

......

z

«

Ce = 5 pF

Ce = loopF

UJ~

IIII

120
100

100

FREQUENCY RESPONSE FOR
CLOSED LOOP GAINS

80

160

10
CLOSED LOOP GAIN

OPEN LOOP PHASE RESPONSE
AS A FUNCTION OF
FREQUENCY

~~

3.0
Q

V

I

w

VOLTAGE GAIN
AS A FUNCTION OF
OPEN LOOP FREQUENCY RESPONSE

~

2.S

J =I±lISV_
S
TC=2SoC -

CLOSEO LOOP GAIN

80

2.0

100

I I

TC - CASE TEMPERATURE - °c

I-

1.5

1

I

SO

1.0

VS=±15V _
RL=lln _
TC=25°C -

I

-25

O.S

............

SLEW RATE AS A FUNCTION
OF CLOSED LOOP GAIN

RS~=3.0J-

o

o

~

RSC - CURRENT SENSE RESISTOR -

POWER BANDWIDTH AS A FUNCTION
OF CLOSED LOOP GAIN

-~

c

140

250

lOUT - OUTPUT CURRENT - AMP

J

'"'"-

-50

O.S

I

............

fZ

w
a:
a:
::>
u

-O.S

-1.0

I

.............

'"

500

o

125

C

SHORT CIRCUIT CURRENT
AS A FUNCTION OF
CASE TEMPERATURE
1250

750

::>

o
-50

\

U

180

-60

TC - CASE TEMPERATURE - °C

-20

20

60

100

140

TC - CASE TEMPERATURE - °C

3-104

180

1 M

10 M

FAIRCHILD LINEAR INTEGRATED CIRCUITS • ",A791
TYPICAL APPLICATIONS

POSITIVE VOLTAGE REGULATOR
+30 V

10 k

20k

20k

NOTES:

a to 27

V regulator
500 rnA output current

•

DC SERVO AMPLIFIER
50 k

5 k

+15 V

SIZE 8 OR 9 12
SERVOMOTGIlI

AC SERVO AMPLIFIER
BRIDGE TYPE
C

VIN

~

+28 V

5 k

50 k

t---..'VY---.----..""'----__.

10 k

o

5k

,SERVOMOTOfil

1.50

10 k

3-105

,,-de

101· 201
GENERAL PURPOSE OPERATIONAL AMPLIFIERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 101 and 201 are General Purpose monolithic Operational Amplifiers constructed using the Fairchild Planar* epitaxial process. They are intended for a wide range of
analog applications where tailoring of frequency characteristics is desirable. The 101 and 201
compensate easily with a single external component. High common mode voltage range and absence
of "latch-up" make the 101 and 201 ideal for use as voltage followers. The high gain and wide range
of operating voltages provide superior performance in integrator, summing amplifier, and general
feedback applications. The 101 and 201 are short-circuit protected and have the same pin configuration as the popular /-LA 741, /-LA 748 and /-LA 709.

•
•
•
•
•

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58

SHORT-CIRCUIT PROTECTION
OFFSET VOLTAGE NULL CAPABI LlTY
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWER CONSUMPTION
NO LATCH UP
NOTE: Pin 4 connected to case.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP
Operating Temperature Range
Military (101)
Commercial (201)
Lead Temperature (Soldering, 60 seconds)

±22V
500mW
670mW
±30V
±15V

-55°C to +125°C
O°C to +70°C
300°C

ORDER INFORMATION
TYPE
101
201

PART NO.
LM101H
LM201H

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLIN E 6A

EOUIVALENT CIRCUIT

CaMP NULL

CaMP

NC

NC

NC

NC

OFFSET NULL
(COMP)

FREQ. COMPo
V+

INVERT INPUT
NON INVERTING
INPUT

OUTPUT

V-

OFFSET NULL

NC

NC

OUTPUT

ORDER INFORMATION
TYPE
101
201

*Planar is

Notes on following pages

3-106

PART NO.
LM101D
LM201D

a~patented

Fairchild process.

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101 • 201
ELECTRICAL CHARACTERISTICS FOR 101 (±5.0V';;;; Vs .;;;; ±20V, T A = 25°C, C1 = 30pF unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage

RS';;;; 10kn

MIN.

TYP.

MAX.

UNITS

1.0

5.0

mV

Input Offset Current

40

200

nA

Input Bias Current

120

500

Input Resistance
Supply Current
Large Signal Voltage Gain

300
Vs = ±20V

800
1.8

nA
kn

3.0

rnA

VS=±15V
VOUT = ±10V, RL;;;' 2kn

50

160

V/mV

The following specifications apply for -55°C';;;; T A';;;; +125°C:
Input Offset Voltage
Average Temperature Coefficient
of Input Offset Voltage

RS';;;; 10kn

6.0

mV

RS';;;; 50n.

3.0

pV/oC

RS';;;; 10kn

6.0

pV/oC

TA =+125°C

10

200

TA = -55°C

100

500

nA

+25° C .;;;; T A .;;;; +125° C
-55°C';;;; TA';;;; +25°C

0.01
0.02

0.1
0.2

nA/oC
nA/oC

Input Bias Current

TA = -55°C

6.28

1.5

/.LA

Supply Current

T A = +125°C, Vs = ±20V

1.2

2.5

rnA

Input Offset Current
Average Temperature Coefficient
of Input Offset Current

Large Signal Voltage Gain

Vs = ±15V, VOUT = ±10V
RL;;;' 2kn

I RL = 10kn
I RL = 2kn

25

nA

V/mV

±12

±14

V

±10

±13

V

70

90

dB

70

90

dB

Output Voltage Swing

Vs = ±15V

Input Voltage Range

VS=±15V

±12

Common Mode Rejection Ratio

RS';;;; 10kn

Supply Voltage Rejection Ratio

RS';;;;10kn

V

NOTES
1. Rating applies to ambient temperature up to 70°C. Above 70°C ambient derate linearly at 6.3mW/oC for the Metal Can and 8.3mW/oC
for the DIP.
2. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
3. Short circuit may be to ground or either supply. The 101 ratings apply to +125°C case temperature or +75°C ambient temperature. The
0
201 ratings apply to ,case temperatures up to +70 C.

3-107

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101 • 201
ELECTRICAL CHARACTERISTICS FOR 201 (±5.0V ~ Vs ~ ±15V, T A = 25°C, Cl = 30pF unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage

RS

~

MIN.

10kn

TYP.

MAX.

UNITS
mV

2.0

7.5

Input Offset Current

100

500

nA

Input Bias Current

0.25

1.5

Jl.A

3.0

mA

Input Resistance
Supply Current
Large Signal Voltage Gain

100
VS=±15V

400
1.8

kn

VS=±15V
VOUT = ±10V, RL > 2kn

20

150

V/mV

The following specifications apply for O°C ~ T A ~ 70°C:
Input Offset Voltage

RS

~

10kn

Average Temperature Coefficient
of Input Offset Voltage

RS

~

50n

6.0

RS

~

10kn

10.0

10

mV

Jl.V/oC
Jl.V/oC

TA = 70°C

50

400

TA = O°C

150

750

nA

Average Temperature Coefficient
of Input Offset Current

25° C ~ T A ~ 70° C
0° C ~ T A ~ 25° C

0.01
0.02

0.3
0.6

nA/oC
nA/oC

Input Bias Current

TA = O°C

0.32

2.0

Jl.A

Input Offset Current

Large Signal Voltage Gain

nA

Vs = ±15V, VOUT = ±10V
RL> 2kn

_

15

I

V/mV

Output Voltage Swing

RL = 10kn
VS-±15V IRL=2kn

±12

±14

V

±10

±13

V

Input Voltage Range

Vs = ±15V

±12

Common Mode Rejection Ratio.

RS

~

10kn

65

90

dB

Supply Voltage Rejection Ratio

RS

~

10kn

70

90

dB

3-108

V

lOlA · 20lA · 30lA
GENERAL PURPOSE OPERATIONAL AMPLIFIERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 101A, 201A and 301A are General Purpose monolithic Operational
Amplifiers constructed using the Fairchild Planar* epitaxial process. These integrated circuits are
intended for applications requiring low input offset voltage or low input offset current. The accuracy
of long interval integrators, timers and sample and hold circuits is improved due to the low drift and
low bias currents of the 101 A, 201 A, or 301 A. Frequency response may be matched to the individual
circuit need with one external capacitor. The absence of "latch-up" coupled with internal short circuit
protection make the 101 A, 201 A and 301 A virtually foolproof. The 101 A, 201 A and 301 A are pin
compatible with the popular J.LA709, J.LA741, J.LA748 and J.LA777.
•
•
•
•
•

LOW OFFSET CURRENT AND VOLTAGE
LOW OFFSET CURRENT DRI FT
LOW BIAS CURRENT
SHORT CIRCUIT PROTECTED
LOW POWER CONSUMPTION

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58

vNOTE: PIN CONNECTED TO CASE

ORDER INFORMATION
TYPE
PART NO.
lOlA
LM101AH
201A
LM201AH
lOlA
LMlO1AH

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Military and Instrument (101A and 201A)
Commercial (301 A)
Internal Power Dissipation (Note 1)
Metal Can
DIP
Flatpak
Mini DIP
Differential I nput Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can, DIP, and Flatpak
Mini DIP
Operating Temperature Range
Military (101A)
Instrument (201A)
Commercial (301 A)
Lead Temperature (Soldering)
Metal Can, DIP and Flatpak (60 seconds)
Mini DIP (10 seconds)
Output Short Circuit Duration (Note 3)
EQUIVALENT CIRCUIT

±22V
±18V
500mW
670mW
570mW
310mW
±30V
±15V

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

NON INVERTING
INPUT

ORDER INFORMATION
TYPE
PART NO.
lOlA
LM101AD
lOlA
LM201AD
lOlA
LM301AD

-65°C to +150°C
_55° C to +125° C
_55° C to +125° C
_25° C to +85° C
O°C to +70°C
300°C
260°C
Indefinite
COMP NULL

COMP

10-LEAD FLATPACK
(TOP VIEW)
PACKAGE OUTLINE 3F
N.C
OFFSET NULL
FREQ COMP

N.C
FREQ. COMP

INVERTING INPUT'-----";'--''NON·INVERTING
INPUT L...-.....r--..:I'

V+
OUTPUT
OFFSET
NULL

Available on special request
ORDER INFORMATION
TYPE
PART NO.
lOlA
LM101AF
201A
LM201AF

8-LEAD MINIDIP
(TOP VIEW)

OUTPUT

PACKAGE OUTLINE 9T
OFFSET NULL
(COMP.)

FREQ.
COMP

INVERT INPUT

V+

NON· INVERT
INPUT
V-

OUTPUT
OFFSET
NULL

ORDER INFORMATION
TYPE
PART NO.
lOlA
LMlO1AN

Notes on page 3

*Planar is a patented Fairchild process.

3-109

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101A. 201A. 301A
ELECTRICAL CHARACTERISTICS FOR 101A and 201A (±5.0V ~ Vs ~ ±20V, TA = 25°C, C1 = 30pF unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage

RS

TYP

MAX

UNITS

0.7

2.0

mV

Input Offset Current

1.5

10

nA

Input Bias Current

30

75

nA

~

MIN

10k!2

Input Resistance

1.5

Supply Current

4.0

Vs = ±20V

Mn

1.8

mA

3.0

VS=±15V

Large Signal Voltage Gain

50

VOUT = ±10V, RL;;;;' 2k!2

160

V/mV

The following specifications apply for -55°C ~ T A ~ +125°C: (Note 4)
Input Offset Voltage

RS

~

10k!2

Average Temperature Coefficient
of Input Offset Voltage

3.0

Input Offset Current
Average Temperature Coefficient
of I nput Offset Current

mV

15

p,V/oC

20

nA

+25°C ~ TA ~ +125°C

0.01

0.1

nA/oC

-55°C ~ TA ~ +25°C

0.02

0.2

nA/oC

100

nA

2.5

mA

Input Bias Current
Supply Current

3.0

TA = +125°C, Vs = ±20V

1.2

Vs = ±15V, VOUT = ±10V

Large Signal Voltage Gain

25

RL;;;;' 2k!2

V/mV

RL = 10k!2

±12

±14

V

RL = 2k!2

±10

±13

V

Output Voltage Swing

VS=±15V

Input Voltage Range

Vs = ±20V

Common Mode Rejection Ratio

RS

~

10k!2

80

96

dB

Supply Voltage Rejection Ratio

RS

~

10k!2

80

96

dB

±15

V

GUARANTEED PERFORMANCE CURVES FOR lOlA AND 201A
INPUT VOLTAGE RANGE
VS.SUPPLY

OUTPUT SWING VS. SUPPLY

20

20

16

./

f<.,V

!j ~

Sv

82

IS

SUPPLY VOLTAGE - ±V

20

0

i

1
IS

10

SUPPLY VOLTAGE - ±V

3-110

V

~*\,,~*---

20

70

V

/

76

-S5° :!: TA:!: 25°C

-ssoc ~ TA $ 12SoC

94

88

~~~>!j

V
10

V

~~\.

/V

1/
o

./

IS

10

VOLTAGE GAIN VS. SUPPLY
100

-ssoS :!: TA ~ 125°C
S

10

15

SUPPLY VOLTAGE - ±V

20

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101A. 201A. 301A
ELECTRICAL CHARACTERISTICS FOR 301A (±5.0V';;;; VS';;;; ±15V, T A = 25°C, C1 = 30pF unless otherwise specified)
PARAMETER

CONDITIONS

Input Offset Voltage

RS';;;; 10kS1

MIN

TYP

MAX

UNITS

2.0

7.5

mV

Input Offset Current

3

50

nA

Input Bias Current

70

250

nA

Input Resistance

2

0.5

Supply Current

VS=±15V

MS1

1.8

mA

3.0

Vs = ±15V

Large Signal Voltage Gain

25

VOUT = ±10V, RL;;;;" 2kS1

160

V/mV

The following specifications apply for O°C.;;;; T A';;;; 70°C:
Input Offset Voltage

RS';;;; 10kS1

Average Temperature Coefficient
of Input Offset Voltage

6.0

Input Offset Current
Average Temperature Coefficient
of I nput Offset Current

mV

30

J.LV/oC

70

nA

25° C .;;;; T A .;;;; 70° C

0.01

0.3

nA/oC

0° C .;;;; T A .;;;; 25° C

0.02

0.6

nA/oC

300

nA

Input Bias Current
Vs = ±15V, VOUT = ±10V

Large Signal Voltage Gain

10

V/mV

15

RL;;;;" 2kS1

Output Voltage Swing

RL = 10kS1
Vs = ±15V, RL = 2kS1

±12

±14

V

±10

±13

V

Input Voltage Range

Vs = ±15V

±12

Common Mode Rejection Ratio

RS';;;; 10kS1

70

90

dB

Supply Voltage Rejection Ratio

RS';;;; 10kS1

70

90

dB

V

NOTES:
(1) Rating

applies to ambient temperature up to 70° C. Above 70° C ambient derate linearly at 6.3 mW/oC for the Metal Can, 8.3 mWr C for
the DIP, 5.6 mW/oC for the Mini DIP and 7.1 mW/oC for the Flatpak.

(2)
(3)
(4)

For supply voltages less than ±15 V. the absolute maximum input voltage is equal to the supply voltage.
Short circuit may be to ground or either supply.101A and 201A ratings apply to +125°C case temperature or +75°C ambient temperature.
301 A ratings apply for case temperatures to 70° C.
.
All 201A specifications apply for -25°C ~ T A ~ +85 0 C unless otherwise specified.

GUARANTEED PERFORMANCE CURVES FOR 301A
INPUT VOLTAGE RANGE
VS.SUPPLY

OUTPUT SWING VS. SUPPLY
20

20

16

94

12

~,\\~"-V

~

V

./

o

VOLTAGE GAIN VS. SUPPLY
100

5

V

~
I.

~~

V

V

V
V

V

./

V V

15

V
~~\~\}~V V
\()'i-9

10

¥-g;;:,

V

V
./

V

o~e ~ Tf\ ~ 70

0

j....:::: l=- V

e

./

V

88

82

~.~'i-9
~~\>.\.

~\¥-\\tl

I'

j....- l -

./

I

l -V

76

I

oOf ~ TA ~

)
oop~ TA ~ 7fe

10
SUPPLY VOLTAGE - ±V

15

o

5

10
SUPPLY VOLTAGE - ±V

3-111

15

70

I---

t(I~~ V

5

10
5UPPLY VOLTAGE - ±V

7re
15

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101A. 201A. 301A
TYPICAL PERFORMANCE CURVES FOR 101A, 201A AND 301A (Unless Otherwise Specified)

0

100

40

1

~-

90

80

-~
~

--

~

«c

I

0
4

~I"'"'"

TA -125'C
3

I'--. OFFSH

2
I

5

10

O.
-75

20

15

-50

--

-25

SUPPLY VOLTAGE - tV

-l-

25

!Z

v:..

1.5

B
~
~

OFFSE

2

50

75

100

0

125

-----

1.0

-

Fr
~'C

~

80

60

40

20

TEMPERATURE - °c

15

2.0

",:'"

6

SUPPLY CURRENT

il!

0

",""
8
4

2.5

~55'C

l""- t--

20

TEMPERATURE - 'c

TA -

r---

40

-c-

~"..

- BiAS

60 r - - -

----- --- -......

20
10

TA - 25'C

I

0_

-~ r-..

30

i
TA --55'C-

llO

100

INPUT CURRENT
301A

INPUT CURRENT
101A AND 201A

VOLTAGE GAIN
120

-

CURRENT LIMITING
VS J±15V

~ ~ r--.

'\l"\ '\

{;

:>-

-

~

Y,-

tioo

(">

\

0.5

o

10

5

15

o
o

20

'"

..........

25

30

1\

1""1'

1\

r--:::.
TA -__
25°C
t--I--

"

r-...

"

........

r--.

10-26

10- 16
10

100

Ik

10k

lOOk

100

10

FREQUENCY - Hz

80

RS "lkQ
TA " 25°C

~

60

~'w-

40

VCM,JIV/Ik

""

60

10k

FREQUENCY - Hz

lOOk

1M

1""'-'\

lOOk

CLOSED LOOP OUTPUT
I~PEDANCE

102

""""I~:; ----'K'~
/t;

<"J)

40

SINGLE POLE
r-- CO'llPENSATI,ON
CI " 30 pF
I----TA" 25°C
Ik

10k

""1"""
lOOk

\...,
I~

.........

1M

/

V

AV"looO

AV"I

\

FREQUENCY - Hz

3-112

-

'\

~J-

100

/
'-....--I

~/:

~J'v,o

10

10k

Ik
FREQUENCY - Hz

f---

"-

20

100

100

lOOk

103

-

100

80

~

10k

POWER SUPPLY
REJECTION

120

-

Ik
FREQUENCY - Hz

COMMON MODE
REJECTION

10

20

INPUT NOISE CURRENT
301A

1\

"-

20

15

INPUT NOISE CURRENT
101A AND 201A

INPUT NOISE VOLTAGE

100

10

OUTPUT CURRENT - rnA

SUPPLY VOLTAGE - ±V

V

V
~~~~;S%~ONci "30 pF

TA " 25°C
lOUT" +5rnA-

I
10M

100

Ik

10k

FREQUENCY - Hz

lOOk

1M

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101A. 201A. 301A
TYPICAL PERFORMANCE CURVES FOR 101A, 201A AND 301A
OPEN LOOP FREQUENCY
RESPONSE

120

120

120

TWO POlE

100

225

100

80

180

80

60

135
80

40

\

60

\~

"

40

1\

20

100

lk

10k

lOOk

1M

10M

10

100

lk

FREQUENCY - Hz

16

10k

16

1\

1\

,

\ cl

40

45

20

1M

,10k

lOOk

1M

-20

10M

10M

o

\

1\

40

~

60

ro

~1-1-

1M

10M

FREQUENCY - Hz

INVERTER PULSE RESPONSE
OUT~UT

-

~

INPUT

- I

f7
INPUT

OUTPUT

\
\

TWO POlE

-Z
-4

T! -25 C._
VS '±15V '
CI -30pF_
C? =300pF

-8
-10

I

I
II

~"

- IV

-6

TA -25°C_
V ±~V

lOOk

4

I--

-Z

r'

30

I

10

OUTPUT

I

-10
01020

100M

VS" +15V
TA " 25°C

o

1M

10

-4

SI~GL£ ~OLE

-8

10M

-

f'\.
t--

1\

r
).

1M

FEED FORWARD

lOOk

10k

/'\,

1/

\

lOOk

TWO POlE

"

/

I

':

\

10k

f\

1\

r- Ir- -

f-

Ik

LARGE SIGNAL FREQUENCY
RESPONSE

IZ

VOLTAGE FOLLOWER PULSE
RESPONSE

-6

100

16

VOLTAGE FOLLOWER PULSE
RESPONSE·
-----

-4

10

FREQUENCY - Hz

FREQUENCY - Hz

-Z

"

45

....

FREQUENCY - Hz

INPUT \

90

1\

~

\

135

1\

~

-

~

GAIN~

FEED FIRWARD

z

1\

o

\

- ), rvV

\

1\ SINGlE POlE
~

180

'~PH~\
'\,

1

c "30 pF ,
l

Ik

90

\

"31~

1\

"~

60

135

Vs" t15V
TlI -25°C
C "30pFl
C "300 pF

1\

IZ

1\

80

TA -'25°C
Vs"±15V_ 225

I - - r-.....

LARGE SIGNAL FREQUENCY
RESPONS-e

TA " 25°C
vs" ±15V

IZ

180

'"

lOOk

FREQUENCY - Hz

LARGE'SIGNAL FREQUENCY
RESPONSE
- ---_.-

100

I'"

-20
1

J

~

r\

TA " 25°C
VS" t15V
I-Cl "30pf
Cz ",300 pF
10

225
PHr

GAIN

45

10

OPEN LOOP FREQUENCY
RESPONSE

OPEN LOOP FREQUENCY
RESPONSE

- --

-6
FEE9FOR~ARD

TA = 25°C
Vs - ±15V

-8

-10

80

01020

TIME-lIS

30

40

~

60

ro

IZ34~678

80

TIME -lIS

TIME-lIS

COMPENSATION CIRCUITS
(All pin numbers shown refer to 8 pin TO-5 packc;tge)
SINGLE POLE COMPENSATION

TWO POLE COMPENSATION

Vour

FEEDFORWARD COMPENSATION

VIN

RI
D----''oAA._.........=I

Your
C2= _ _
1_

Cl;?:

Rl Cs
Rl + R2

C.= 30pF

27TfoR2
Cs

=

30 pF

C,

C2=10Cl

150pF

3-113

fo

=

3 MHz

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 101A. 201A., 301A
TYPICAL APPLICATIONS
(All pin numbers shown refer to 8 pin TO-5 package)
INVERTING AMPLIFIER
-WITH BALANCING CIRCUIT

FAST VOLTAGE FOLLOWER

INPUT o---w..-'--~Wv-----,

">"---+---0 OUTPUT

Power Bandwidth: 15 kHz
Slew Rate: 1V/IJs

VOLTAGE COMPARATOR FOR
DRIVING DTL OR TTL
INTEGRATED CIRCUITS

t May be zero'or equal to parallel combination
of R1 and R2 for minimum offset.

FAST SUMMING AMPLIFIER
OUTPUT

C2

3pF

RI

30kil

VI NC>--''VV\r-+-4--=-!

MULTIPLE APERTURE
WINDOW DISCRIMINATOR
CI

150pF

V
IN

Power Bandwidth: 250 kHz
Small Signal Bandwidth: 3.5 MHz

VIN > V4

Slew Rate: 10V/lls

V4
°1

BILATERAL CURRENT SOURCE
V3 < VIN < V4
RI

R3

100kil
0.1%

°2

VI N o---'l/II\r---=-t

50kil
0.1%

R2

500il
1%

V2 VI
iOUT=
R3
R1

3-114

R3 VIN
R1 R5

= R4 + R5
= R2"

FAIRCHILD LINEAR INTEGRATED CIRCUITS. lOlA. 201A. 301A
TYPICAL APPLICATIONS (CONtO)
(All pin numbers shown refer to 8 pin TO-5 package)
DOUBLE ENDED LIMIT DETECTOR

LOW FREQUENCY SQUARE WAVE
GENERATOR

v+

RI
1M
...-----.-..1f--- LOW IMPEDANCE
OUTPUT

>=----.,IVv-.........~-

CLAMPED
OUTPUT
DI,6.2V
D2,6.2V

* Adjust C1

VOUT

for frequency

VOUT

PRACTICAL DIFFERENTIATOR

f
c

= 4.6V FOR VLo;;;; VIN o;;;;Vu
= OV FOR VIN < VL OR VIN

< Vu

CIRCUIT FOR OPERATING
WITHOUT A NEGATIVE SUPPLY

•

=_1_
21TR2C1

fh=_1~
21TR1 C1
=_1_

+10V 6 - - - - - 4 - - - - - - - - 0

PULSE WIDTH MODULATOR

FREE-RUNNING MUL TIVIBRATOR
RI
160k.o.
VIN
:!:SV

R2
100k.o.

RI
100k.o.

CI
0.47JLF

*

VOUT
R3
10k.o.

DI,6.2V

RS

lOon

*Chosen for oscillation at 100 Hz

D2,6.2V
-::-

GAIN TEST CIRCUIT

V
O--_'VV\r-+-~~
OUT
DIGITAL
VOLTMETER
SOk.o.
0.01%

SO.o.

D.C. INPUT
(±IOV FOR
VS=±15V)

S± O.SpF
TOL.ERANCE OF AL.L. UNMARKED
RESISTORS IS 1%

SO.o.
0.1%

V IN X 103

6

10 X 103

AVO =

2k.o.

3-115

FOR ±10V INPUT
VOUT

107-207-307
GENERAL PURPOSE OPERATIONAL AMPLIFIERS
FAIRCHILD LINEAR tNTEGRATED CIRCU ITS

GENERAL DESCRIPTION- The 107 series of General Purpose Operational Amplifiers is constructed
using the Fairchild Planar* epitaxial process. Advanced processing techniques have reduced the 107
input current an order of magnitude below ~ndustry standards such as the JJ.A709 while still replacing,
pin-for-pin, JJ.A709, 101, lOlA, and /;LA741. The 107,207, and 307 offer better accuracy, internal
compensation, and lower noise for high impedan.ce circuit applications while providing features similar
to the 101 A. The low input currents allow the device to be used in slow-charge applications such as
long period integrators, slow ramps, and sample-and-hol·d circuits. The 207 is identical to the 107
except that 207 performance i'S guaranteed from -25°C to +85°C while the 107 performance is
guaranteed over a -55°C to +l~oC temperature range. The 307 is available in both TO-99 and 8-lead
mini DIP packages and is guaranteed .over a O°C to +70°C temperature range.

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58

N.C.

INVERTING
INPUT

•

LOW OFFSET VOLTAGE

•

LOW INPUT CUR RENT

•

LOW OFFSET CURRENT

•

GUARANTEED DRIFT C'HARACT-aAISTICS

•

GUARANTEED OFFSETS OVER OOMMON MODE RANGE

EQUIVALENT CIRCUIT

2

Note: Pin 4 connected to case.

ORDER INFORMATION
TYPE
PART NO.
107
LM107H
207
LM207H
307
LM307H

V+

7

8-LEAD MINID~P
(TOP VIEW)
PACKAGE OUTLINE 9T

N.C.

N.C.

INVERT INPUT
NON-INVERT
INPUT

V-

OUTPUT

--,_ _ _.;...r-

N.C.

ORDER INFORMATION
TYPE
PART NO.
LM307N
307
4
V-

Pin Connections Shown Are For Metal Can.

Dual I n-line Package
and Flatpak Available
By Special Request
*Planar is a patented Fairchild process.

3-116

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 107 • 207 • 307

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Military and Instrument (107 and 207)
Commercial (307)
Internal Power Dissipation (Note 1)
Metal Can
Mini DIP
Differential I nput Voltage
Input Voltage (Note 2)
Storage Temperature Range
Metal Can
Mini DIP
Operating Temperature Ra,nge
Military n 07)
Instrument (207)
Commercial (307)
Lead Temperature (Soldering)
Metal Can (60 seconds)
Mini DIP (10 seconds)
Output Shor.t Circuit Duration (107 and 207)
(307 Note 3)

±22 V
±18 V
500mW
310mW
±30 V
±15 V
_65°C to +150°C
_55°C to +125°C
-55°C to +125°C
_25° C to +85° C
O°C to +70°C
300°C
260°C
Indefinite
Indefinite

I

NOTES:
1. Rating applies to ambient temperat~res up to 70° C. Above 70° C ambient derate linearly at 6.3 mW/C for Metal Can and 5.6 mW/ C for the
Mini DIP.
2. For supply voltages less than ± 15 V I the absol ute maximum input voltage is equal to the supply voltage.
3. Continuous short circuit is allowed for case temperatures to 70°C and ambient temperatures to 55°C.

107 AND 207
ELECTRICAL CHARACTERISTICS
PARAMETER

(±5 V < VS.< ±20 V, TA = 25°C for 107 and 207) unless otherwise specified.
CONDITIONS

MIN.

TYP.

MAX.

UNITS
mV

0.7

2.0

I nput Offset Current

1.5

10

nA

Input Bias Current

30

75

nA

Input Offset Voltage

RS < 10 kn

1.5

I nput Resistance
Supply Current
Large Signal Voltage Gain

VS=±15V

50

Mn

4.0
1.8

Vs = ±20 V

3.0

160

mA
V/mV

V 0 UT = ± 10 V R L ;;;;. 2 kn
I

The following specs apply for 55°C < TA < 125°C unless otherwise specified
Input Offset Voltage

3.0

mV

3.0

15

J,LV/oC

20

nA

25°C '"

10

~

2«-L

-<.''Y

~V~~
V

15

:;;

0

76r---r-~r_~--~--~--~

107: -55°'c <;; T A <; 125°C
207: -25°C <;;TA <;85°C -

I

o
5

I

10

r-~-_+-~~~: =;~:~ ~ ~~ ~ ~~~~C_

I

70~-~~~~1-~1-~1-~

15

10

20

SUPPLY VOLTAGE - ±V

20

15

10

SUPPLY VOLTAGE - ±V

15

20

SUPPLY VOLTAGE - ±V

GUARANTEED PERFORMANCE CURVES FOR 307
INPUT VOLTAGE RANGE

OUTPUT SWING

20

VOLTAGE GAIN
100

20

16

V .....

12

~

6'1
.....

./

0<"

~S!j«-/

".

~

k
V

15

I-'""
10

~

./'

~

V

~~
0°C<;;T A <;;70°C

I

I

10

SUPPLY VOLTAGE - ±V

~

~\~.~"

l~p-.y

o
5

94

v

I

-

I
15

"
~

~

V

88

.J

~
82

~
~r~I"

i-"1-"-

---

~\~

--

76
DOC <;; T A <;; 70°C

o

I

70
5

I-- ~

10

SUPPLY VOLTAGE - ±V

3-118

15

5

I

lD
SUPPLY VOLTAGE - tV'

I

-

I
15

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 107 • 207 • 307
TYPICAL PERFORMANCE CURVES FOR 107 AND 207
INPUT CURRENT

VOLTAGE GAIN

SUPPLY CURRENT
2.5

~( )

120

I
2.0

1.5

1.0

---

......-:~

-

1

-

~

~25C

r--

~

1-

110

OJ
I

z

~

'~"

100

~
~
90

0.5

o

...... ~

--

....-

~

:lO

~

?O

10

15

20

:;:
0:

lA,125' C

::J

U

f::J

~-

5

Z

10

15

-~

50

25

25

-

50

75

AMBIENT TEMPERATURE -

100

125

C

INPUT NOISE CURRENT
10 ·24

~

VS' '15 V

-...:::::: ~ r-...

:I:

~

!"\

'\
10.0

'\.

I

fZ
0:
0:

'"

::J

Z

\

U

~

-

T A ' 125 C ~TA' 25'C

f::J
f::J

75

SUPPLY VOLTAGE- 'V

CURRENT LIMITING

o

r--....

20

15.0

I

...........

10

o

'v

SUPPLY VOLTAGE -

~4S ..........
~

I

TA,25C -

80

5

--

...

)

' ··55 C

'!? 10 25

•

~

5.0

.... ......

-

r-..
10 26
10

15

20

25

10

30

100

OUTPUT CURRENT - !mA

lk

100 k

10k

FREQUENCY - Hz

TYPICAL PERFORMANCE CURVES FOR 307
SUPPLY CURRENT

VOLiAGE GAIN

2.5

120

2.0

--

1.5

--

80
60

I
lA

INPUT CURRENT

100

!

110

25'C

'0

1

I
Z

~

'"

100

'"«

...... ".-

i"'"

1

,25' C

~..!-,.-

f-

z

r-- h-L
BIAS

~

r-

20

0:
0:
::J

>

>

U

~

1.0

40

f::J
Z

90
0.5

OFFSET

o

o

80

5

10

15

SUPPL¥ VOLTAGE -

10

'v

15

""'-

-

40

20

SUPPLY VOLTAGE - lV

TEMPERATURE - 'C

CURRENT LIMITING
15.0

o

INPUT NOISE CURRENT
10- 24

~ t.........

TAt 25"C

'\ ~

10.0

~A=70'C\

1,\
~

'\
10. 25

\

5,0

.....
-

r='15{

o

10

o

10- 26
15

20

25

10

30

OUTPUT CURRENT - ±mA

100

1k

FREQUENCY - Hz

3-119

10k

lOOk

60

80

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 107. 207. 307
TYPICAL PERFORMANCE CURVES

OPEN LOOP
FREQUENCY RESPONSE

INPUT NOISE VOLTAGE
120

.------,--r--.-------,--.--.,....-,--.
TA

=

25°C

vs= ±15 V

100~

80r--1"'--~--+--1--~--+-~
60r-~--~"'--~~--~--+-~
40r-~--~--+"'--~--r--+--~
20r-~--~--+-~"'--~--+-~
o I-----+----I---+---+--+-,,~
1\

-20

~---J._ _--'-_ _-'-----J._ _- ' - _ - ' - - - - '

10

100

1K

10 K

1M

100 K

FREQUENCY - Hz

FREQUENCY - Hz

LARGE SIGNAL
FREQUENCY RESPONSE

VOLTAGE FOLLOWER
PULSE RESPONSE

10 M

8r-+-~-+-1--r-+--r-+-1-1

8r--1-1-+++-f-N-I---+~+-+-++H-I

TA

=

25°C

-8 1-+--+---I--+-1----1f----+_ V s = ± 15 V -

1K

-10 ............--'----'---'--'----'---'--......
-,--'--,-'
o 10 20 30 40 50 60 70 80

100 K

10K
FREQUENCY - Hz

TIME -

~s

TYPICAL APPLICATIONS
(All pin numbers shown refer to 8-lead TO-5 package)
NON-INVERTING AMPLIFIER

NON-INVERTING AC AMPLIFIER

INVERTING AMPLIFIER

R2

2~6
Rl

~

3

R2
Rl

VOUT

VIN

V

VIN

R1 + R2
VOUT = - - - VIN
R1
RIN = R3

3-120

2~6

rV
R2
VOUT = R1
RIN

= R1

VIN

I

VOUT

-

108A - 208A - 308A
108-208-308
SUPER BETA OPERATIONAL AMPLIFIERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERA~

DESCRIPTION - The 10S series of Super Beta Operational Amplifiers is constructed
using the Fairchild Planar* epitaxial process. High input impedance, low noise, input offsets, and
temperature drift are made possible through use of super beta processing, making the device suitable
for applications requiring high accuracy and low drift performance. The 10SA series is specially
selected for extremely low offset voltage and drift, and high common mode rejection, making possible
superior performance in applications where offset nulling is undesirable. Increased slew rate wi.thout
performance compromise is available through use of feedforward compensation techniques, maximizing performance in high speed sample-and-hold circuits and precision high speed summing amplifiers.
The wide supply range and excellent supply voltage rejection assure maximum flexibility in voltage
follower, summing, and general feedback applications.
•
•
•
•
•

VNOTE PIN 4 CONNECTED TO CASE.

GUARANTEED LOW INPUT OFFSET CHARACTERISTICS
HIGH INPUT IMPEDANCE
LOW OFFSET CURRENT
LOW BIAS CURRENT
OPERATION OVER WIDE SUPPLY RANGE

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
10SA,10S,20SA,20S
30SA,30S
Internal Power Dissipation (Note 1)
Differential Input Current (Note 2)
Input Voltage (Note 3)
Storage Temperature Range
Operating Temperature Range
Military (10SA, 10S)
Industrial (20SA, 20S)
Commercial (30SA, 30S)
Lead Temperature (Soldering, 60 Seconds)
Output Short Circuit Duration (Note 4)

±20V
±1S V
500mW
±10mA
±15 V
-65°C to +150°C
-55°C to +125°C
-25°C to +S5°C
O°C to +70°C
300°C
Indefinite

EQUIVALENT CIRCUIT
COMPENSATION

COMPENSATION
@

CD

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5B

.-----~--+-~~----~--+_~----------~----~v+

'----1.-------' OUTPUT

ORDER INFORMATION
TYPE
PART NO.
108A
LM108AH
108
LM108H
208A
LM208AH
208
LM208H
308A
LM308AH
308
LM308H
14-LEAD DIP**
(TOP VIEW)
PACKAGE OUTLINE 6A
NC

N.C.

COMP

N.C.

GUARD
INVERT INPUT

N.C.

V-

N.C.

OUTPur

ORDER INFORMATION
TYPE
PART NO.
108A
LM108AD
108
LM108D
208A
LM208AD
208
LM208D
308A
LM308AD
308
LM308D
10-LEAD FLATPAK**
(TOP VIEW)
PACKAGE OUTLINE 3F
N.C

GUARD

COMP
COMP
V+
OUTPUT

v-

ORDER INFORMATION
TYPE
PART NO.
108A
LM108AF
108
LM108F
208A
LM208AF
208
LM208F

0= Pin Numbers
RI9
6.4kO

V+

NON· INVERT
INPUT
GUARD

GUARD
INVERTING
INPUT
NON· INVERTING
INPUT

Pin numbers are for Metal Can only

COMPo

R!7
5000

• • Available on special order
See notes on following pages.

.. Planar is a patented Fairchild process.

3-121

•

FAIRCHILD LINEAR IC 108A • 208A • 308A • 108 • 208 • 308
ELECTRICAL CHARACTERISTICS FOR 108A AND 208A

(±5 V.;;;; VS';;;; ±20 V, -fA = 25°C, Cc = 30 pF unless otherwise specified)
MIN.

CONDITIONS

PARAMETERS

TYP.

MAX.

UNITS

Input Offset Voltage

0.3

0.5

mV

Input Offset Current

0.05

0.2

nA

0.8

2.0

Input Bias Current
Input Resistance
Supply Current

30

70

Vs = ±15 V

0.3

nA
Mn

0.6

rnA

V S = ± 15 V, R L ~ 10 kn,
Large Signal Voltage Gain

80,000

VOUT = ±10 V

300,000

V/V

The following specifications apply for _55° C .;;;; T A .;;;; +125° C (see note 5)
Input Offset Voltage
Average Input Offset Voltage Drift

1.0

I nput Offset Current
Average I nput Offset Current Drift

0.5

Input Bias Current
Supply Current

T A = +125°C

Input Voltage Range

VS=±15V

Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing

ELECTRICAL CHARACTERISTICS FOR 308A
PARAMETERS

~

10 kn

~

10 kn

VOUT = ±10 V
V S = ± 15 V, R L

mV
p,VrC

0.4

nA

2.5

pA/oC

0.8

3.0

nA

0.15

0.4

rnA

±13.5

Common Mode Rejection Ratio
V S = ± 15 V, R L

1.0
5.0

V

96

110

dB

96

110

dB

40,000
±13

V/V
±14

V

(±5 V.;;;; VS';;;; ±15 V, T A = 25°C, Cc = 30 pF unless otherwise specified)
CONDITIONS

MIN.

TYP.

MAX.

UNITS

Input Offset Voltage

0.3

0.5

mV

Input Offset Current

0.2

1.0

nA

Input Bias Current

1.5

7.0

Input Resistance
Supply Current

10

0.3

VS=±15V
V S = ± 15 V, R L

Large Signal Voltage Gain

40

~

nA
Mil

0.8

rnA

10 kn,
80,000

VOUT = ±10 V

V/V

300,000

The following specifications apply for O°C .;;;; T A';;;; +70°C
Input Offset Voltage

0.73

Average Input Offset Voltage Drift

1.0

Input Offset Current
Average Input Offset Current Drift

2.0

Input Bias Current
Input Voltage Range
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing

---'

~

nA

10

pA/oC

10

nA
V

96

110

dB

96

110

dB

10 kn,
60,000

VOUT = ±10 V
V S = ± 15 V, R L

~

mV
p,V/oC

1.5

±13.5

VS=±15V

V S = ± 15 V, R L

5.0

10 kn

±13

V/V
±14

V

NOTES:
The maximum junction temperature of the 1 08A/1 08 is 150° C, while that of the 208A/208 is 100° C, and 308A/308 is 85° C. For operating
at elevated temperatures, devices in the TO-99 package must be derated based on thermal resistance of 150° C/W, junction to ambient, or
45° C/W, junction to case. For the flat package a maximum rating of 300 mW applies and derating is based on a thermal resistance of
185°C/W when mounted on a 1/16 inch thick epoxy glass board with ten 0.03-inch-wide, 2-ounce copper conductors. The thermal
resistance of the Dual-In-line Package is 100°C/W, junction to ambient.

1.

2.

The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore, excessive current will flow if a differential input
voltage in excess of 1 V is applied between the inputs unless adequate limiting resistance is used.

3.

For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.

4.

Short circuit may be to either supply or ground. Rating applies to operation up to the maximum operating temperature range.

5.

For the 208A/208, all temperature specifications apply over _25° C .;;;; T A .;;;; 85° C.

3-122

FAIRCHILD LINEAR IC 108A • 208A • 308A • 108 • 208 • 308
ELECTRICAL CHARACTERISTICS FOR 108 AND 208

(±5 V ~ Vs ~ ±20 V, T A = 25°C, Cc = 30 pF unless otherwise specified)
MIN.

CONDITIONS

PARAMETERS

TYP.

MAX.

UNITS

Input Offset Voltage

0.7

2.0

mV

Input Offset Current

0.05

0.2

nA

0.8

2.0

Input Bias Current
30

Input Resistance
Supply Current
Large Signal Voltage Gain

0.3

Vs = ±15 V
RL;;;' 10 kfl, VOUT = ±10 V
50,000

VS=±15V

nA
Mil

70
0.6

mA
V/V

300,000

The following specifications apply for -55°C ~ T A ~ 125°C (see note 5)
Input Offset Voltage
3.0

Average Input Offset Voltage Drift

TA = +125°C

Input Voltage Range

Vs = ±15 V

nA

2.5

pA/oC

3.0

nA

0.15

0.4

rnA

±13.5

Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain

Vs = ±15 V, RL;;;' 10 kil,
VOUT = ±10 V

Output Voltage Swing

V S = ± 1 5 V, R L :;:: 10 kil

ELECTRICAL CHARACTERISTICS FOR 308
PARAMETERS

INloC

0.4

Input Bias Current
Supply Current

mV

15

0.5

I nput Offset Current
Average I nput Offset Current Drift

3.0

V

85

100

dB

80

96

dB

25,000
±13

V/V
±14

V

(±5 V ~ Vs ~ ±15 V, T A = 25°C, Cc = 30 pF unless otherwise specified)
CONDITIONS

MIN.

TYP.

MAX.

UNITS

Input Offset Voltage

2.0

7.5

mV

I nput Offset Current

0.2

1.0

nA

Input Bias Current

1.5

7.0

I nput Resistance
Supply Current
Large Signal Voltage Gain

10
Vs = ±15 V

0.3

V S = ± 15 V, R L ;;;. 10 kfl,
VOUT = ±10 V

25,000

nA
Mfl

40
0.8

300,000

mA
V/V

The following specifications apply for O°C ~ T A ~ +70°C
Input Offset Voltage
Average Input Offset Voltage Drift

6.0

I nput Offset Current
Average Input Offset Current Drift

2.0

Input Bias Current
I nput Voltage Range

±13.5

VS=±15V

Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing

Vs = ±15 V, RL;;;' 10 kil,
VOUT = ±10 V
V S = ± 1 5 V, R L = 10 kil

3-123

10

mV

30

IJ,VrC

1.5

nA

10

pArC

10

nA
V

80

100

dB

80

96

dB
V/V

15,000
±13

±14

V

•

FAIRCHILD LINEAR IC 108A • 208A • 308A • 108 • 208 • 308
TYPICAL PERFORMANCE CURVES FOR 108 SERIES
INPUT NOISE VOLTAGE

OPEN L.OOP
FREQUENCY RESPONSE

POWER SUPPLY REJECTION
120

1000

,....---.----,-----,c---~-....,

120 ,....--..,...--r---.----..,...--r---.-----.

100 I--......,..-+---+-----i'"
RS "1M

~

l""-

I

g

60 t----""..t----''''d---'''.. . - l - - + - - - ;

~

40

~

RS "lOOk

~ ro I---+---+--~----\\;".L-H.."--_I

~S" b

1--....

80 t---"'od-----"-r.:-t--__i--+---;

z

I

10

100

10

1---+--+--+__-+-"--"<-I-,---"-+__---1 45

"

Or-pHASE ..•...•... --j.--+--+-_~
'\.F''--\-,-l
r - GAIN- - f - - Cf·30pF~1r-- 0

-ro
10k

Ik

lOOk

L......'-_ _ _

100

~

Ik

_

___''--_

10k

_'___

__'

1M

lOOk

-ro~~-~-~~-~I-~~~
I

10M

10

100

CLOSED LOOP
OUTPUT IMPEDANCE
,--,----,----,---.-----r--:---.

10k

lOOk

1M

10M

VOLTAGE FOLLOWER
PULSE RESPONSE_

LARGE SIGNAL
FREQUENCY RESPONSE
-

16

Ilk

FREQUENCY - Hz

. FREQUENCY - Hz

FREQUENCY - Hz

103

20

.", \

1

IO.--..,--.--.-----r--,-,-..,--r--,---,

TA =25°C

102t---If-__i--r__i--;~-+--;

VS" ±15V

\\

12

6~~-+~--i-~+-~!~
....-....+..-....1.r_-~~-I

i\

4

\

\

-2
Cf "30pF

"100

Ik

10k

lOOk

1M

10M

o

Ik

if
V

'\

t······· "'),+--+-+--1

-6

TA =25°C_
VS" ±15V
-8 I--+---+--+--+---+---if--+-C " 30 ~Ffl
-10 '---'---'--~--'----1.___''---'--~-'-__'

\

. ::- :-.lOOk

10k

FREQUENCY - Hz

/ OUTPUT

V

~1-+-~H--+~--l~+-1-~-I

\

..........

INPUT!

i\

\C f =3 pF

1M

~

0 ro 40 60 80

~

~

~

~

~

FREQUENCY - Hz

TYPICAL PERFORMANCE CURVES FOR 108A ~ 208A • 108 • 208 (unless otherwise specified)
INPUT CURRENTS

MAXIMUM DRIFT ERROR

MAXIMUM OFFSET ERROR

2;0

100

Ik

1.5

"",

I. 0

/.

....... N~8IAS20S.
roo;.:.:
'V?08

O. 5

10

- -V

-1'-=

0.25
1081208

O.ro

II

1.0

1~1kA

0.15
0.1 01'-....

-I---

~

~

~

5

25

~

~

~

~

m

-=:::::

"-

=:::::::,.

\

1
1A" 25 C
10

~

V- ~
A I
~

...

~

5

10
15
SUPPLY VOLTAGE - ±V

100M

ro

500

100M

Q

l

11 "_"oe

~

'"

rr=
OUTPUT CURRENT - ± rnA

3-124

r--

10M

1M

600

\

o

1001l08A: -55°C ~ TAS 125°C_
208/208A : -25°C ~ TA~ SSoC

r--1.0
lOOk

SUPPLY CURRENT - 108
±15V

-r-.....

TA"25°C-

o

~~ I--"""

./

INPUT RESISTANCE -

\

Cf -0
f -100Hz

,.

'-- .-.

vs"

V

108/208

Q

TA"I25C-.

/V- ~C

90

f--

OUTPUT SWING -108
15

~

100

f--

10M

1M

INPUT RESISTANCE -

lro

lIO

/

208/208A: -25°C 5 TA 585°C -

AMBIENT TEMPERATURE _·C

VOLTAGE GAIN -108

./~~

1001lOSA, -55°C 5 TA 5 125°C-

II

0.1
lOOk

~

r--V

III

108M08 OFFSET 208A/208

I

0

~

Vj
i/

300

roo
-

100

o

V

V

t.25 ocl

---r-Tl25 J
o

--5

--.,!--

15
10
SUPPLY VOLTAGE - tV

20

FAIRCHILD LINEAR IC 108A • 208A • 308A • 108 • 208 • 308
TYPICAL PERFORMANCE CURVES FOR308A AND 308 (unless otherwise specified)
INPUT CURRENTS

MAXIMUM DRIFT ERROR - 308

MAXIMUM OFFSET ERROR - 308

4

1000

1000

V

O°C

r--- I-1

E

-

c

0.25

-...........

0.20

----

I"-

0.15
0.10

o

o

10

20

t5

~
~

alAS

~

~

r-

/

c..

z

-

~

MAXIMUM

II
-

w ro

-mltAL

II

1.0

w

-

lOOk

-

~

10

...... V

"

MAXIMUM

.......t-tIII

- -llnAL:---

100M

10M

VOLTAGE GAIN
i--

....

I--

"l

400

~

~\

m

tJ.-

----"

250

..--

200

/'"

TA • 25°C"""'"
TA = O°C----

'"

10M

100M

Q

SUPPLY CURRENT

V~ ±~5V

R

I- TA = 70°C----

......

INPUT RESISTANCE -

OUTPUT SWING
15

......

1M

lOOk

INPUT RESISTANCE - Q

120 r---r-----.----,.---,.----r---,

V

...... ~

1.0

1M

TEMPERATURE - °c

/

,/"

==

'"o
'"

./

::::>

~

V

/
100

=

350

,...,

150

100 f - - - f - - - - - ; - - - + - - + - - + - - j

----

--

TA·boc_
~

~

TA = 25°C

r--

TA • 70°C

1

•

100
50

5

10

15

o

o
o

90~-~~-~-~-~-~

20

SUPPLY VOLTAGE - + V

5

10

15

20

SUPPLY VOLTAGE - ±V

OUTPUT CURRENT - ± rnA

STANDARD COMPENSATION CIRCUITS

INVERTING
INPUT
- " " ".......-1
NON· INVERTING R3
INPUT

NON· INVERTING
INPUT

FEEDFORWARD COMPENSATION
HIGHER SLEW RATES AND WIDER BANDWIDTH
FEEDFORWARD COMPENSATION
FOR DECOUPLING LOAD
CAPACITANCE

OPEN LOOP VOLTAGE GAIN

STANDARDFEEDFORWARD

R2
RS> 10k.n

100k.n

INPUT -"""""''V-_+_---II------,

">-=-+-...Jo,Iotv--.--4- OUTPUT
OUTPUT
20

o
C1
500 pF

-20

STANDARD

~r.;.l-~GAIN-

_r--CpMPENS~TI O N · · ·••••:
I

I

45

•. 1"\.

.....

~

L-.--L._..l.-_~--L._..J.----J~~

1

10

100

lk

10k

lOOk

FREQUENCY - Hz

3-125

1M

10M

J

CL
75 pF
to 0.01

~F

FAIRCHILD LINEAR IC 108A • 208A • 308A • 108 • 208 • 308
GUARDING
Extra care must be taken in the assembly of printed .circuit boards to take full advantage of the low input currents of the 108 amplifier. Boards
ml,lst be thoroughly cleaned with TCE or alcohol and blown dry with compressed air. After cleaning, the boards should be coated with epoxy
or silicone rubber to prevent contamination.
Even with properly cleaned and coated boards, leakage currents may cause trou~le at 125 C, particularly since the input pins are adjacent to
pins that are at supply potentials. This leakage can be significantly reduced by using guarding to lower the voltage difference between the inputs
and adjacent metal runs. Input guarding of the 8-Iead TO-99 package is accomplished by using a 10-lead pin circle, with the leads of the device
formed so that the holes adjacent to the inputs are empty when it is inserted in the board. The guard, which is a conductive ring surrounding
the inputs, is connected to a low impedance point that is at approximately the same voltage as the inputs. Leakage currents from high voltage
pins are then absorbed by the guard.
0

The pin configuration of the Dual In-line Package is designed to facilitate guarding, since the pins adjacent to the inputs are not used (this is
different from the standard ~A 741 and 101 A pin configuration).

CONNECTION OF INPUT GUARDS
INVERTING AMPLIFIER

FOLLOWER

NON-INVERTING AMPLIFIER

BOARD LAYOUT FOR
INPUT GUARDING WITH
TO-99 PACKAGE
(BOTTOM VIEW)
COMPENSATION

I~

v+

'"""' .....~, ' ,I
05

OUTPUT

OUTPUT

OUTPUT
INPUT--f-+-i

v_I
BOTTOM VIEW

Rl R2

• Use to compensate for
large source resistances.

NOTE:---

Rl + R2

Must be low
impedance

TYPICAL APPLICATIONS

t

FAST SUMMING AMPLIFIER WITH LOW INPUT CURRENT

SAMPLE AND HOLD

RS
INPUT ---">N\r~...---------......- - H - - - - - ,

INPUT

Rl
150k

Cl
0.002

~F

OUTPUT
OUTPUT

* I n addition to increasing speed,
the 101 A raises high and low
frequency gain, increases output
drive capability and eliminates
thermal feedback.

t Power Bandwidth: 250 kHz
Small Signal Bandwidth: 3.5 MHz
Slew Rate: 10 V //J-S
-8

:j:C5=~
R1

3-126

* Worst

case drift less than
2.5 mV";s
t Teflon, Polyethylene or
Polycarbonate Dielectric
Capacitor

102 - 302 -110 - 310
VOLTAGE FOLLOWER
FAIRCHILD LINEAR INTEGRATED CIRCU ITS

GENERAL DESCRIPTION - The 102/302 and 110/310 are monolithic Operational Amplifiers
internally connected as unity gain non-inverting amplifiers. They are constructed using the Fairchild
Planar* epitaxial process. These circuits are ideal for such applications as fast sample and hold circuits,
active filters, or as general purpose buffers. Super-beta transistors are used allowing the devices to
operate at very low input currents without sacrificing speed. They may be used interchangeably with
the 101 and the ~A 741 in voltage follower applications. The 110/310 are suggested for new designs
and are direct replacements for the 102/302. They feature lower offset voltage, drift, bias current,
noise, plus higher speed and a wider operating voltage range.
•
•
•
•
•

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE SB

•

HIGH SLEW RATE . . . 30 V/J.,ls
LOW INPUT CURRENT
INTERNALLY COMPENSATED
PLUG-IN REPLACEMENT FOR BOTH THE 101 AND
J.lA741 VOLTAGE FOLLOWER APPLICATIONS
WIDE RANGE OF SUPPLY VOLTAGES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Input Voltage (Note 2)
Output Short Circuit Duration (Note 3)
Storage Temperature Range
Operating Temperature Range
Military (102/110)
Commercial (302/310)
Lead Temperature (soldering,. 60 seconds)
EQUIVALENT CIRCUIT

±18 V
SOOmW
±1S V
Indefinite
-6SoC to +1S0°C

v-

ORDER INFORMATION
TYPE
PART NO.
102
LM102H
302
LM302H
110
LM110H
310
LM310H

-SSoC to +12SoC
O°C to +70°C
300°C

BALANCE

7

v+

INPUT O---+--+----1~~-_I:

"""------0

BOOSTER

Ril
200

~----~--------~----------------~-----------------4-------------oVSee notes on following pages

·Planar is a patented Fairchild process.

3-127

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 102 • 110 • 302 • 310
102
ELECTRICAL CHARACTERISTICS (VS

= ±15 V,

TA

= 25°C,

CL ~ 100 pF, unless otherwise specified)
TYP.

MAX.

Offset Voltage

2.0

5.0

Average Temperature Coefficient of Offset Voltage

6.0

PA'RAMETER

CONDITIONS

MIN.

3.0

I nput Current
I nput Resistance
Voltage Gain

RL

~

10

kn

10 10

10 12

0.999

0.9996

±10

±13

Output Resistance

0.8

Output Voltage Swing (Note 4)

RL ~ 8

kn

3.5

Supply Current
Positive Supply Rejection

60

Negative Supply Rejection

70

rnV

I.NrC
10

nA

n
2.5

n

5.5

mA

V
dB
dB

I nput Capacitance
-55°C ~ T A ~ 125°C

Offset Voltage

UNITS

3.0

pF

7.5

mV

TA = 125°C

3.0

10

nA

TA = -55°C

30

100

nA

2.6

4.0

rnA

TYP.

MAX.

UNITS

Offset Voltage

5.0

15

Average Temperature Coefficient of Offset Voltage

20

I nput Current

-55°C ~ TA ~ 125°C

Voltage Gain

kn
10 kn

RL ~ 10

Output Voltage Swing

RL ~

Supply Current

TA = 125°C

0.999
V

±10

302
ELECTRICAL CHARACTERISTICS (VS = ±15 V, T A = 25°C, CL ~ 100 pF, unless otherwise specified)
PARAMETER

CONDITIONS

MIN.

I nput Current

10

I nput Resistance
Voltage Gain

RL

> 8 kn

RL

~

8

kn

0.9995

1.000

0.8

2.5

n

3.5

5.5

mA

±10
60

Negative Supply Rejection

70

I nput Current

n

0.9985

Positive Supply Rejection

Offset Voltage

V
dB
dB
pF

3.0
0° C ~ T A ~ 70° C
TA = 70°C
TA

= O°C

3-128

nA

10 12

Supply Current

I nput Capacitance

30

10 9

Output Resistance
Output Voltage Swing (Note 4)

rnV
JLV/oC

20

rnV

3.0

15

nA

20

50

nA

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 102 • 110 • 302 • 310
110

< TA

ELECTRICAL CHARACTERISTICS (±5 V ~ Vs ~ ±18 V, -55°C

Input Bias Current
I nput Resistance

125°C, unless otherwise specified)
TYP.

MAX.

UNITS

TA

·1.5

4.0

mV

TA

1.0

3.0

nA

PARAMETER
Input Offset Voltage

~

CONDITIONS

= 25°C
= 25°C
TA = 25°C

MIN.

1010

I nput Capacitance
Large Signal Voltage Gain

TA

= 25° C, V S = ± 15 V
= ±10 V, RL = 8 kn
= 25°C
= 25°C·

VOUT

Output Resistance

TA

Supply Current

TA

0.999

101~

n

1.5

pF

0.9999
0.75

2.5

n

3.9

5.5

mA

Input Offset Voltage
Offset Voltage Temperature Drift

6.0
-55°C ~ TA ~ 85"C
TA

= 125°C

12

I nput Bias Current

Supply Current

= ±15 V,
RL = 10 kn
V S = ± 15 V
TA = 125°C

Supply Voltage Rejection Ratio

±5 V

Large Signal Voltage Gain
Output Voltage Swing (Note 4)

Vs

I

~

Vs

~

VOUT
RL

= ±10 V

= 10 kn

IlV/"C
10

nA

4.0

mA

0.999
±10

V
2.0

±18 V

mV
IlV/oC

6.0

70

dB

80

310
ELECTRICAL CHARACTERISTICS (±5 V ~ Vs ~ ±18 V, O°C ~ T A ~ 70°C, unless otherwise specified)
CONDITIONS

PARAMETER
Input Offset Voltage

TA

Input Bias Current

TA

Input Resistance

TA

= 25°C
= 25°C
= 25°C

MIN.

10 10

I nput Capacitance
Large Signal Voltage Gain

TA

= 25°C, Vs = ±15 V
= ± 10 V R L = 8 kn
= 25°C
= 25°C

VOUT

Output Resistance

TA

Supply Current

TA

0.999

TYP.

MAX.

UNITS

2.5

7.5

mV

2.0

7.0

nA

10 12

n

1.5

pF

0.9999

I

0.75

2.5

n

3.9

5.5

mA

10

Input Offset Voltage
10

Offset Voltage Temperature Drift

10

Input Bias Current

Output Voltage Swing (Note 4)

= ±15 V, VOUT = ±10 V
RL = 10 kn
V S = ± 15 V R L = 10 kn

Supply Voltage Rejection Ratio

±5 V

Large Signal Voltage Gain

Vs

I

~

Vs

~

±18 V

mV
IlV/"C
nA

0.999
V

±10
70

80

dB

NOTES:
o
o
1. Rating applies to ambient temperatures up to +70 C. Above +70 C ambient, derate linearly at 6.3 mW/C.
2. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
o
3. For 102 and 110 continuous short circuit is allowed for case temperature of +125°C and ambient temperature to +70 C. For 302 and 310
o
0
continuous short circuit is allowed for case temperature to +70 C and ambient temperature to +55 C. It is n~essary to insert a resistor
greater than 2 kn in series with the input when the amplifier is driven from low impedance sources to prevent damage when the output is
shorted.
4. Increased output swing under load can be obtained by connecting an external resistor between the booster and V_terminals (see curve).

3-129

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 102 • 110 • 302 • 310
TYPICAL PERFORMANCE CURVES FOR 102/302,110/310

VOLTAGE GAIN .

VOLTAGE GAIN
10

..... r-.
z

<

~ -20

RI

1M

-25

-f-

-30

-r-

-35

-f-

_

-40
lOOk

RS'3~

I

>
I

I

t-

=>

t-

=>

0

-5

\

-10

20

10

RS = 100 kn

.........

""-

-

0

"\

RS ' 10kn

--

I

V

100

1k

1,.00

'

\

~

........

.......

"

~l

~~ r--(/10.-

"'1/,

/t-~

?J-

U'v.

40

;o.o(~

30

i\

10k

~s

100 k

1M

lOOk

VS '±15V
f - - TA • 25'C

1M

10M

\

I

-10

100

lk

lOOk

10k

FREQUENCY - Hz

FREQUENCY - Hz

\.

~

10

""'- ~r--

,

"

20

o

10M

80

50

\

II1I

1M

90

60

/

lOOk

POWER SUPPLY REJECTION

~151V I I I I I

70

;'

10k

FREQUENCY - Hz

s
T A =25'C
DISTORTION <5%

\

~

/

O. 1
1k

10
10

10

~

1= fA •
~+A

40

LARGE SIGNAL
FREQUENCY RESPONSE
12

J
25 C

30

CURRENT-rnA

111I1

-15
TIME -

o

14

f--"A
1.0

~""'" ~

100

~

i/

I

o

100M

10

\\

I

~

TA '_55°C

_Vf±15 V

10M

1M

~V'=

\

tg

-

"

1'0..

"~

111111

100

±1~

~

5o

45

OUTPUT RESISTANCE

Vs =
V
T A ' 25°C

I

-~

T A ' 25°C

FREQUENCY - Hz

15

10

~

=>

IIIII1

.....

FREQUENCY - Hz

LARGE SIGNAL
PULSE RESPONSE

......

o
>

t-

90

~ ~kn -

::::-

~

135

i\

,

~

I

I

180

...... ~

10

r-VS ±15V
~ TA = 25'C

~

'. ........

>

ml~ln-fl(

IIIIII}

PHASE

o

r;;;;;;;;;; ~
1--- :-::::0 ~

225

RS=3kn~ ~,

:;: -15

>

.... v

I\. I

-10

OUTPUT NOISE VOLTAGE
1000

TA' 125'C

270

\ \1

!g -5
I

POSITIVE OUTPUT SWING
15

II

VS= t15 V
f- TA • 25°C

10M

1M

FREQUENCY - Hz

TYPICAL PERFORMANCE CURVES FOR 102/110
INPUT CURRENT

VOLTAGE GAIN

SYMMETRICAL OUTPUT SWING

100

SUPPLY CURRENT

10

~~

VOUT-±10V
Vs' ±15 V

=V S '±15V

'" ~~~15V

./
10

........

,,"'/

I...........

......... ........

1.0

J

f-- .....

v
I - ..-0.1
-55 -35

-15

5

25

45

65

TEMPERATURE _

85

105

125

1
-55 -35

-15

'c

W

,/'

rtf
~

"",.

/'

V

~

./

v

/

~~

,/'
V

~~

.........

~~

5

25

45

65

85

105

0.999 L-....L---'_..L-....I._..L-....I._..L......J..---I
-55 -35 -15
5
25
45
65
85
105 125

125

TEMPERATURE -'C

TEMPERATURE _ 'C

o
-55 -35 -15

5

25

45

TEMPERATURE _

65

85

105

125

'c

TYPICAL PERFORMANCE CURVES FOR 302/310
INPUT CURRENT

SUPPLY CURRENT

SYMMETRICAL OUTPUT SWING

100

VOLTAGE GAIN

10
=VS·t15V

_VO UT =±10V
Vs = t15 V

10

-

r1.0

r--

-

-- --H:1n ---

O. 1
o

10

20

30

40

50

TEMPERATURE _ 'c

60

70

80

1

-- --~

--

10

20

30

40

~

~

50

.........

~~ ~S=±15V
Vs=±~

a:
a:

a

1\~"oO

'-'

~~

~

I
tZ
w

-

I"'-'~-

?:;

...-

~

...-

1

o
60

70

80

o

10

20

30

40

50

TEMPERATURE _ 'c

TEMPERATURE _ 'c

3-130

60

70

80

0.999 5~-.......-...Ll0~-'----1....
5---i.----!20.
SUPPLY VOLTAGE - +V

FAIRCHILD LINEAR INTEGRATED CIRCUITS • ·102 • 110 • 302 • 310
TYPICAL APPLICATIONS
HIGH INPUT IMPEDANCE
AC AMPLIFIER

DIFFERENTIAL INPUT
INSTRUMENTATION AMPLIFIER

HIGH Q NOTCH FILTER

, . - - - - - -.......-OUTPUT

V IN
Rl
100 k

Rl
10M

C2
2.0pF

INPUTS

C3
540 pF

OUTPUT

R3
5M

R4= R5
R2

VOUT

R2
10M

1
fo= - - - 21T R1 C1

R3
C1
270pF

R4
AV = R2

C2
270 pF

R1

= R2 = 2R3
C3

C1 = C2 =

BANDPASS FILTER

FAST INTEGRATOR
WITH LOW INPUT CURRENT

2

SIMULATED INDUCTOR

Cl
10pF
OUTPUT

Rl
10M

OUTPUT

1%

L

= R1 R2 C1

RS = R2
Rp = R1

150 pF

LOW PASS ACTIVE FILTER

FAST INVERTING AMPLIFIER
WITH HIGH INPUT IMPEDANCE

HIGH PASS ACTIVE FILTER

Cl
5 pF

Cl *
110 k

Cl *
0.02 JlF

OUTPUT
INPUT~M"""--'W.,-.t--'

INPUT

OUTPUT

--1 t------t t -.......---t
OUTPUT

INPUT

* Values are for 1 0 kHz cutoff. Use silvered mica
capacitors for good temperature stabiHt'y.

BUFFERED REFERENCE SOURCE

*Values are 100 Hz cutoff. Use
metalized polycarbonate capacitors
for good temperature stability

150pF

SAMPLE AND HOLD

LOW DRIFT SAMPLE AND HOLD**

.----..JVI/'v--_- v+ ±15 V
Rl
3.6 k

.------+--.......-OUTPUT

INPUT

S A M P L E - - - -.....- - - ,

Dl
lN4611

OUTPUT

OUTPUT
INPUT-_--~

R4
27 k
1%

Cl
0.1 JlF

* Use capacitor with polycarbonate teflon or
polyethylene dielectric.

*Teflon, polyethylene or polycarbonate
dielectric capacitor
* *Worst case drift less than 3 mV /s

3-131

•

1558 • 1458 • 1458C

INTERNALLY COMPENSATED, HIGH PERFORMANCE
DUAL MONOLITHIC OPERATIONAL AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 1558/1458 are a monolithic pair of Internally Compensated High
Performance Amplifiers constructed using the Fairchild Planar* epitaxial process. They are intended
for a wide range of analog applications where board space or weight are important. High common
mode voltage range and absence of "latch-up" make the 1558/1458 ideal for use as voltage followers.
The high gain and wide range of operating voltage provides superior performance in integrator, summing amplifier and general feedback applications. .

CONNECTION DIAGRAMS
8·LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5B

The 1558,/1458. are short-circuit protected and require no external components for frequency compensation. The internal 6 dB/octave roll-off insures stability in closed loop applications. For single
amplifier performance, see the pA 741 data sheet.
•
•
•
•
•
•

NO FREQUENCY COMPENSATION REQUI RED
SHORT-CIRCUIT PROTECTION
LARGE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES
LOW POWER CONSUMPTION
NO LATCH-UP
MINI DIP PACKAGE

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Military (1558)
Commercial (1458 and 1458C)
Internal Power Dissipation (Note 1)
Metal Can
Mini DIP
Differential Input Voltage (Note 2)
Common-Mode Input Swing (Note 2)
Output Short Ci.rcuit Duration (Note 3)
Storage Temperature Range
Operating Temperature Range
Military (1558)
Commercial (1458 and 1458C)
Lead Temperatu re
Metal Can (Soldering, 60 seconds)
Mini DIP (Soldering, 10 seconds)

v-

±22V
±18 V

ORDER INFORMATION
TYPE
PART NO.
1558
MC1558G
1458
MC1458G
1458C
MC1458CG

800mW
560mW
±30V
±15 V
Indefinite
-65°C to +150°C

8-·LEAD MINI DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

-55° C to +125° C
O°C to 70°C
Output A

Inverting Input A

EQUIVALENT CI RCUIT
(EACH SIDE)

~'-----~------~--------

__~--------'-~V+

Non-I nverting

Input A

Output B

Inverting
Input B

v-

Non-I nverting

Input B

NON·INVERTING
INPUT

Rg

25n

OUTPUT

ORDER INFORMATION
TYPE
PART NO.
1458
1458PI
1458C
1458CPI

.~----~~---+------+---4---~~~--------~v-

*Planar is a patented Fairchild process.

Notes on following page.

3-132

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 1558 • 1458 • 1458C
1558
ELECTRICAL CHARACTERISTICS (VS

=

±15V, T A = 25°C unless otherwise specified)

PARAMETERS

CONDITIONS

Input Offset Voltage

RS

«

MIN

10kn

Input Offset Current
Input Bias Current

MAX

UNITS

1.0

5.0

mV

0.03

0.2

p,A

0.2

0.5

p,A

TYP

Differential Input Impedance
Parallel Input Resistance

0.3

1.0

Mn

6.0

pF

f = 20Hz, Open Loop
Parallel I nput Capacitance
Common-Mode Input Impedance

f = 20Hz
±12

Common-Mode Input Voltage Swing
Equivalent Input Noise Voltage

AV = 100, RS = 10kn, f = 1.0kHz,

200

Mn

±13

V

45

nV/JHz

70

90

dB

50k

200k

V/V

14

kHz

Unity Gain Crossover Frequency (Open Loop)

1.1

MHz

Phase Margin (Open Loop, Unity Gain)

65

Degrees

Gain Margin

11

BW = 1.0Hz
Common-Mode Rejection Ratio

f = 100Hz

Open-Loop Voltage Gain

VOUT = ±10V, RL = 2.0kn
AV = 1, RL = 2.0kn, THO

« 5%,

Power Bandwidth
Vo = 20V p _p

Slew Rate

AV = 1

Output Impedance

f = 20Hz

RL

=

V/p,s

0.8

Short-Circuit Output Current
Output Voltage Swing

dB

±12

10kn

75

n

20

mA

±14

V

Power Supply Sensitivity
V_
V+

= Constant
= Constant

Power Supply Current

Power Dissipation

30

150

p,V/V

30

150

p,V/V

1+

2.3

5.0

mA

L

2.3

5.0

mA

70

150

mW

RS ~ 10kn

VOUT = 0

The Following Specifications Apply For -55°C
Input Offset Voltage

« T A « +125°C
«

6.0

mV

I np ut Offset Current

0.5

p,A

Input Bias Current

1.5

p,A

Open-Loop Voltage Gain

RS

1Okn

. VOUT = ±10V, RL = 2.0kn

Output Voltage Swing

RL = 2kn

Average Temperature Coefficient
of I nput Offset Voltage

RS = 50n

25k
±10

V/V
±13
15

V
p,vtc

NOTES:
1. Rating applies to ambient temperatures up to 25°e. Above 25°e ambient derate linearly at 6.3 mW/e for the metal can and 5.6 mW/e for
the mini, DIP.
2. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
0
3, Short circuit may be to ground or either supply. Rating applies to +125°e case temperature or 70 e ambient temperature,

3-133

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 1558 • 1458 • 1458C
1458
ELECTRICAL CHARACTERISTICS (VS = ±15V, T A = 25°C unless otherwise specified)
TYP

MAX

UNITS

2.0

6.0

mV

Input Offset Current

.03

0.2

pA

Input Bias Current

0.2

0.5

pA

PARAMETERS

CONDITIONS

Input Offset Voltage

RS

~

MIN

10kn

Differential Input Impedance
1.0

Mn

6.0

pF

200

Mn

±13

V

45

nV/J"Hz

70

90

dB

20k

100k

V/V

14

kHz

0.3

Parallel Input Resistance
f

=

20Hz, Open Loop

Parallel Input Capacitance
Common-Mode Input Impedance

f

=

20Hz
±12

Common-Mode Input Voltage Swing
AV

=

100, RS

BW

=

1.0Hz

Common-Mode Rejection Ratio

f

100Hz

Open-Loop Voltage Gain

VOUT

=

10kn, f

=

1.0kHz,

Equivalent Input Noise Voltage
=

=

±10V, RL

=

2.0kn

AV = 1, RL = 2.0kn, THO

~

5%,

Power Bandwidth
Vo = 20V p _p
Unity Gain Crossover Frequency (Open-Loop)

1.1

MHz

Phase Margin (Open-Loop, Unity Gain)

65

Degrees

Gain Margin

11

dB

Slew Rate

AV = 1

Output Impedance

f = 20Hz

Short-Circuit Output Current
Output Voltage Swing

Vips

0.8

±12

RL = 10kn

75

n

20

mA
V

±14

Power Supply Sensitivity

= Constant
V + = Constant

30

150

pV/V

30

150

pV/V

1+

2.3

5.6

mA

L

2.3

5.6

mA

70

170

mW

7.5

mV

Input Offset Current

0.3

pA

Input Bias Current

0.8

pA

V_

RS ~ 10kn

Power Supply Current
Power Dissipation

VOUT =0

The Following Specifications Apply For O°C ~ T A ~ 70° C

Input Offset Voltage

RS ~ 10kn

Open Loop Voltage Gain

VOUT = ±10V, RL = 2.0kn

15k

Output Voltage Swing

RL = 2.0kn

±10

Average Temperature Coefficient
of Input Offset Voltage

RS = 50n

V/V
±13
15

3-134

V
pV;oC

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 1558 • 1458 • 1458C
1458C
ELECTRICAL CHARACTERISTICS (VS = ±15V, T A = 25°C unless otherwise specified)
PARAMETERS

CONDITIONS

Input Offset Voltage

RS';;;; 10kn

MIN

TYP

MAX

UNITS

2.0

10

mV

Input Offset Current

.03

0.3

J.tA

Input Bias Current

0.2

0.7

J.tA.

Differential Input Impedance
Parallel Input Resistance
f

= 20Hz, Open Loop

Parallel Input Capacitance
Common-Mode Input Impedance

f

= 20Hz

Common-Mode Input Voltage Swing

±11

1.0

Mn

6.0

pF

200

Mn.

±13

V

AV = 100, RS = 10kn, f = 1.0kHz,
Equivalent Input Noise Voltage

45

nV/JHz

60

90

dB

20k

lOOk

V/V

14

kHz

Unity Gain Crossover Frequency (Open-Loop)

1.1

MHz

Phase Margin (Open-Loop, Unity Gain)

65

Degrees

Gain Margin

11

BW = 1.0Hz
Common-Mode Rejection Ratio

f = 100Hz

Open-Loop Voltage Gain

VOUT = ±10V, RL

= 10kn

AV = 1, RL = 2.0kn, THD

~

5%,

Power Bandwidth
Vo = 20V p _p

Slew Rate

AV = 1

Output Impedance

f = 20Hz

0.8

Short-Circuit Output Current
Output Voltage Swing

RL

=

dB

±11

10kn

V/J.ts

75

n

20

rnA

±14

V

Power Supply Sensitivity

V_ = Constant

30

J.tV/V

30

J.tV/V

RS';;;; 10kn
V + = Constant

1+

2.3

8.0

rnA

L

2.3

8.0

rnA

70

240

mW

12

mV

Input Offset Current

0.4

J.tA

Input Bias Current

1.0

J.tA

Power Supply Current
Power Dissipation

VOUT = 0

The Following Speci"fications Apply For O°C ~ T A ~ +70°C
Input Offset Voltage

RS ~ 10kn

Open Loop Voltage Gain

VOUT = ±10V, RL = 10kn

Output Voltage Swing

RL = 2.0kn

Average Temperature Coefficient
of Input Offset Voltage

RS = 50n

15k
±9.0

V/V
±13
15

3-135

V
J.tV/oC

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 1558 • 1458 • 1458C
TYPICAL PERFORMANCE CURVES FOR 1558,1458 AND 1458C
(V + = +15V, V _ = -15V, T A = 25° C unless otherwise noted)

OPEN-LOOP VOLTAGE GAIN
AS A FUNCTION OF
POWER SUPPLY VOLTAGES

POWER BANDWIDTH (LARGE
SIGNAL SWING AS A
FUNCTION OF FREQUENCY)

OPEN-LOOP FREQUENCY RESPONSE

120

+120

115

+100

32



0

100

g

~

0
I

95

f--

---"

+80

z

~

'"~

+60

..:

/"

~

+40

I

0

..:>

90

<5

..:>

I

+20

28

"" ""

85
80

-20
30

6.0

12

9.0

15

18

21

1.0

10

V+ AND V- - POWER SUPPLY VOLTAGE - V

100

1.0k

>I

24

~
..:

20

~

§;

\

1\

\

16

>-

\

::J

>-

::J

""I""1\

10k

lOOk

1.0M

12

0

I

>-

::J

0

8.0

VOLTAGE FOLLOWER
±15 VOLT SUPPLIES
THO

>

4.0

II

a

I II
1.0

Fig. 2

POWER DISSIPATION
AS A FUNCTION OF
POWER SUPPLY VOLTAGE

lOOk

Fig. 3

OUTPUT VOL T AGE SWI NG
AS A FUNCTION OF
LOAD RESISTANCE

100

10k

f - FREQUENCY - Hz

f - FREQUENCY - Hz

Fig. 1

~

II

100

10

10M

< 5%

OUTPUT NOISE
AS A FUNCTION OF
SOURCE RESISTANCE
1.4

32

70

;;:

50
40

I

30

0

20

E

./

~

Ci

7.0

~

5.0
4.0
3.0

~
I

0

0.

-

1.2

28
>Q.

E
:>

24

I

/V

10

a:

0

V

z

iii

Vo

./

'"~..:

20

>

16

0

~

II

E
I

til

~

?

::J

>0

I

>c

8.0

10

14

18

0.4

0.2

1.0
6.0

0.6

::J

12

4.0

2.0

0.8

>-

0
I

2.0

1.0

0.1
100

22

V+ AND V- POWER SUPPLY VOLTAGE - V

Fig. 4

10k

1.0k

RL - LOAD RESISTANCE - OHMS

RS - SOURCE RESISTANCE - OHMS

Fig. 5

Fig. 6

HIGH-IMPEDANCE, HIGH-GAIN
INVERTING AMPLIFIER

QUADRATURE OSCILLATbR
C3
820pF
1%

SINE

OUTPUT
C2
820pF
1%

R2

180k!)
1%

1
f ~

Fig. 7

I

(R1Cl ~ R2 C2)
21T j C2R2C3 R3

Cl
820PF
1%

Fig. 8

ANALOG MULTIPLIER

COMPRESSOR/EXPANDER AMPLIFIERS
D,

EXPANDER

R4

INPUT

10kn

MAXIMUM COMPRESSION EXPANSION RATIO ~ Rl/R

(10 kf!

>

R

> 0)

NOTE: DIODES Dl THROUGH D4 ARE MATCHED FD6666 OR EQUIVALENT.

Fig. 9

Fig.10

3-136

lOOk

IJA771

IJA772

INSTRUMENTATION AMPLIFIER

HIGH SLEW RATE
OPERATIONAL AMPLIFIER

GENERAL DESCRIPTION - The J1,A771 is a true Instrumentation
Amplifier with an internally closed feedback loop determining the
device gain. The IJ,A771 instrumentation amplifier is distinguished from
operational amplifiers with external resistor feedback because the input
terminals are totally uncommitted and need be connected only to the
signal source. The IJ,A771 also features very high input impedance, very
low bias and offset currents, low offset drifts, low noise and high
common mode and power supply rejection. The addition of a few
external components enables the user to "add-on" a derived common
mode voltage follower for driving shielded input lines, if desired.
Typical applications include strain gauge, transducer and transconductance amplifiers, physiological (biomedical) probes, and thermocouple
preamplifiers.

GENERAL DESCRIPTION - The IJ,A772 is a monolithic High Slew
Rate Operational Amplifier, constructed using the Fairchild Planar*
epitaxial process. The IJ,A772 features high slew rate and fast settling
time, with excellent dc characteristics. Additional features such as
internal compensation, offset null capability and current limiting are
provided. The IJ,A772 is ideal for use in AID, DIA and sampled data
systems, and in pulse amplifiers.

•
•
•
•
•
•
•

GAIN DETERMINED BY INT~RNALLY CLOSED FEEDBACK
LOOP
VERY HIGH INPUT IMPEDANCE
LOW OFFSET DRIFTS
LOW NOISE
HIGH COMMON MODE AND POWER SUPPLY REJECTION
VERY LOW BIAS AND OFFSET CURRENTS
VERY SIMPLE GAIN SETTING AND ADJUSTMENT

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

•
•
•
•
•
•
•

FAST SETTLING TIME . . . 300 ns
HIGH SLEW RATE .•. 60 V/lJ,s
HIGH GAIN BANDWIDTH . . . 10 MHz
EXCELLENT INPUT CHARACTERISTICS
CAN BE OPERATED NON-INVERTING OR INVERTING
INTERNALLY COMPENSATED
WIDE DIFFERENTIAL AND COMMON-MODE INPUT VOLTAGE
RANGE

•

WIDE SUPPLY RANGE

CONNECTION DIAGRAM
a-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5B
SLEW RATE
CONTROL

OF FSET ADJUST
FUNCTIONAL AND DIAGRAM

INVERTING
INPUT

NON-INVERTING
INPUT

*Planar is a patented Fairchild process.

3-138

GLOSSARY
OPERATIONAL AMPLI FIERS

Average Temperature Coefficient of Input Offset Current The change in input offset current over the operating
temperature range divided by the operating temperature range.
Average Temperature Coefficient of Input Offset Voltage The change in input offset voltage over the operating
temperature range divided by the operating temperature range.
Bandwidth - That frequency at which the open loop voltage
gain is reduced to 0.707 of its dc value.
Broadband Noise Figure - The common logarithm of the ratio
of the input signal-to-noise ratio to the output signal-to-noise
ratio over the frequency range for which this parameter is
nominally flat.
Channel Separation - The level of output signal from an
undriven amplifier with respect to the output from an adjacent
driven amplifier.
Common Mode Input Resistance - The resistance seen looking
into both inputs tied together.
Common Mode Output Voltage - The output voltage resulting
from the application of a specified voltage common to
both inputs.
Common Mode Rejection Ratio - The ratio of the change of
input offset voltage to the change in common mode voltage
producing it.
Common Mode Input Voltage Swing - The peak value of the
common mode input voltage which can be applied for linear
operation.
Differential Input Capacitance - The effective capacitance
between the two inputs, operating open loop.
Differential Input Resistance - The effective resistance between the two inputs, operating open loop.
Differential Load Rejection - The ratio of the change in input
offset voltage to the change in differential load current
producing it.
Differential Voltage Gain - The ratio of the change in
differential output voltage to the change in differential input
voltage producing it.
Equivalent Input Noise Voltage - The equivalent input noise
voltage which would reproduce the noise seen at the output if
all amplifier noise sources and the source resistances were set
to zero.
Equivalent Input Noise Current - The equivalent input noise
current which would reproduce the noise seen at the output if
all amplifier noise sources were set to zero and the source
impedances were large compared to the optimum source
impedance.
Input Bias Current - The average of the two input currents
with no signal applied.
Input Bias Current Drift - The rate of change of input bias
current with temperature, supply voltage, or time.
Input Capacitance - The capacitance seen looking into either
input terminal with the other grounded.

Input Offset Current - The difference in current into the two
input term inals with the output voltage at zero.
Input Offset Voltage - That voltage which must be applied
between the input terminals, through two equal resistances, to
obtain zero output voltage.
Input Resistance - The resistance seen looking into either
input with the other grounded.
Input Voltage Range - The range of voltage on either input
terminal over which the amplifier will operate as specified.
Exceeding the input voltage range may cause the amplifier to
function improperly.
Internal Power Dissipation - The power required to operate
the amplifier with no load and no input signal.
Large Signal Voltage Gain - The ratio of the Output Voltage
Swing to the change in input voltage required to produce it.
Open Loop Voltage Gain - The ratio of the output signal
voltage to the differential input signal voltage producing it,
with no feedback applied.
Output Resistance - The small signal ac resistance seen
looking into the output with no feedback applied and the
output dc voltage near zero.
Output Short-Circuit Current - The maximum output current
obtainable with the output shorted to ground or to either
supply.
Output Voltage Swing - The peak output voltage swing that
can be obtained without cl ipping of the output voltage
waveform.
Power Bandwidth - The maximum frequency at which the
maximum output can be maintained without significant
distortion.
Power Consumption - See Internal Power Dissipation.
Power Supply Current - The current required from the power
supply to operate the amplifier with no load and no signal
applied.
Power Supply Rejection Ratio - The ratio of the change in
input offset voltage to the change in supply voltage producing it.
Power Supply Sensitivity - The ratio of the change of a
specified parameter to the change in supply voltage causing it.
Settling Time - The time from a step change of input to the
time the corresponding output settles to within a specified
percentage of the final value.
Slew Rate - The maximum rate of change of output under
large signal conditions.
Transient Response - The closed loop step function response
of the circuit under small signal conditions.
Unity Gain Bandwidth - The frequency at which the open
loop gain is reduced to unity.
Unity Gain Crossover Frequency - See Unity Gain Bandwidth.

•

INDEX

Comparator Data Sheets are presented in alphanumeric sequence.

Selection Guide ............................................. 4-3
DATA SHEETS
uA71 0 High Speed Differential Comparator .................... 4-5
uA711 Dual Comparator ...................................... 4-9
uA734 Precision Voltage Comparator ......................... 4-13
uA750 Dual Comparator Subsystem .......................... 4-20
uA760 High Speed Differential Comparator ................... 4-24
111-311 Voltage Comparator ................................ 4-29
Glossary ................................................... 4-34

4-2

SELECTION GUIDE FOR MILITARY VOLTAGE COMPARATORS (1)

PARAMETER

UNITS

111

~A710

p.A711

~A734

~A760

Input Offset Voltagej Max.

mV (2)

4.0

3.0

4.5

4.0

6.0

Temperature Coefficient of
Input Offset Voltage

~V/oC

2.0

3.5

5.0

2.5

3.0

Input Bias Current, Max,

~A

'0.150

45

150

0.1q

60

I nput Offset Current, Max.

~A

0.02

7.0

20

0.02

7.5
±4.5 to ±6.5

Supply Voltage

V

+12, -6.0

+12, -6.0

±5.0to±15

Response Time

ns

200

40

40

200

16

I nput Voltage Range

V

±14

±5.0 (3)

±5.0 (3)

±10

±4.0

Output Voltage Swing

V

Voltage Gain, Min.

V/mV

Power Consumption, Max

mW

TTL Fanout
Diff. Input Voltage Range

1.
2.
3.

0, +5.0 to ±15

N/A

-0.5 to +3.2

-0.5 to +3.2

o to +8.0

o to +3.0

200 (4)

1.0

0.5

25

5.0 (4)

165

150

200 (5)

145

312

5.0 (Min)

1

1

2

2

±16

±5.0

±5.0

±10

±5.0

V

4.

Typical values at 20° C unless otherwise specified.
Maximum or minimum value for -55°C";;; T A";;; +125°C.
V_ = -7.0 V
Typical.

5.

TA

=

+25°C.

SELECTION GUIDE FOR COMMERCIAL VOLTAGE COMPARATORS (1)

PARAMETER

UNITS

311

~A710

~A711

~A734

~A750

~A760

Input Offset Voltage, Max.

mV (2)

10

5.0

5.0

7.5

20 (4) + Hyster.

6.0

Temperature Coefficient of
Input Offset Voltage

~V/oC

6.0

5.0

5.0

3.5

100

3.0

I nput Bias Current, Max.

~A

0.3

40

150

0.15

5.0

60

I nput Offset Current, Max.

~A

0.07

7.5

25

0.045

N.A.

7.5

Supply Voltage

V

+12, -6.0

+12, -6.0

±5.0to±15

Response Time (ns)

ns

200

40

40

200

470

16

Input Voltage Range

V

±14

±5.0 (3)

±5.0 (3)

±5.0

3toV+-2

±4.0

Output Voltage Swing

V

N.A.

-0.5 to -3.2

-0.5 to +3.2

o to +8.0

V+-2

o to ±3.0

Voltage Gain, Min.

V/mV

200 (4)

0.8

0.5

25

N.A.

5.0 (4)
325

Power Consumption, Max.

mW

TTL Fanout
Diff. Input Voltage Range

V

0, +5.0 to ±15

±4.5 to ±6.5

205

150

230 (5)

145

150 (4)

5.0 (Min)

1

1

2

20

2

±16

±5.0

±5.0

±10

±5.0

±5.0

1.
2.
3.

Typical values at 25° C unless otherwise specified.
Minimum or maximum value for OoC ,,;;; T A";;; 70°C.

4.

Typical.
TA = +25°C.

5.

+24

V-=-7.0V.

4-3

•

IJA710
HIGH SPEED DIFFERENTIAL COMPARATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ~A710 is a Differential Voltage Comparator in'tended for
applications requiring high accuracy and fast response times. It is constructed on a single silicon chip
using the Fairchild Planar* epitaxial process. The device is useful as a variable threshold Schmitt
trigger, a pulse height discriminator, a voltage comparator in high-speed AID converters, a memory
sense amplifier or a high noise immunity line receiver. The output of the comparator is compatible
with all integrated logic forms.

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58
v+

•

•
•
•

5 mV MAXIMUM OFFSET VOLTAGE
5 J,LA MAXIMUM OFFSET CURRENT
1000 MINIMUM VOLTAGE GAIN
20 ~VrC MAXIMUM OFFSET VOLTAGE DRIFT

NON.INVERTING
INPUT

2

•

V-

Pin 4 connected to case.

NOTE:

ABSOLUTE MAXIMUM RATINGS
Positive Supply Voltage
Negative Supply Voltage
Peak Output Current
Differential Input Voltage
Input Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Flatpak
Storage Temperature Range
Meltal Can, DIP, and Flatpak
Operating Temperature Range
Military (710)
Commercial (71 OC)
Lead Temperature
Metal Can, DIP and Flatpak (Soldering, 60 seconds)

+14.0 V
-7.0 V
10mA
±5.0 V
±7.0 V
500mW
670 mW
570mW

ORDER INFORMATION
TYPE
PART NO.
710
710HM
710HC
710C
14·LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A
NC
NC

-65° C to +150° C

NON·INVERTING
INPUT
INVERTING
INPUT

_55° C to +125° C
O°C to + 70°C

4

NC

V-

OUTPUT

NC

NC

ORDER INFORMATION
EQUIVALENT CIRCUIT

Rl
500 n

R4

R5

2.8 kn

3.9kn

V+

TYPE
710
710C

PART NO.
710DM
710DC

10-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 3F

R2

soon

GND

NC

NON-INVERTING ~-""",-,----"
INPUT
INVERTING r--"j..:!..--I~
INPUT

V-

GROUND

V+

NC

NON-INVE~J~~~ 0 - - - - + - - - - - - - - - 1 :
INVERTING 'INPUT

NC

NC

t-.::,C:::==:l

OUTPUT

0----1'

o - - - - - - - - - - - - - t - - - -.....- - - - I '
ORDER INFORMATION
V-

TYPE
710

PART NO.
710FM

·Planar is a patented Fairchild process.

Notes on following pages.
4-5

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

~A710

710
ELECTRICAL CHARACTERISTICS (T A = +25°C, V+ = 12.0 V, V- = -6.0 V unless otherwise specified)
PARAMETER
(see definitions)

CONDITIONS
(Note 2)

Input Offset Voltage
Input Offset Current
Input Bias Current
Voltage Gain
Output Resistance
Output Sink Current
Response Time (Note 3)

RS < 200

MIN.

TYP.

MAX.
2.0
3.0
20

1250

0.6
0.75
13
1700
200
2.5
40

n

~VIN ~ 5 mV, VOUT = 0

2.0

The following specifications apply for _55° C < T A < +125°C:
I nput Offset Voltage
RS < 200 n
u
u
Average Temperature Coefficient
RS = 50 n, T A = 25 C to T A = +125 C
of Input Offset Voltage
RS = 50 n, T A = 25°C to T A = -55°C
TA = +125°C
Input Offset Current
TA = -55°C
Average Temperature Coefficient
T A = 25° C to T A = +125° C
of Input Offset Current
T A = 25° C to T A = _55° C
TA = -55o.C
Input Bias Current
Input Voltage Range
V- = -7.0 V
Common Mode Rejection Ratio
RS < 2000
Differential Input Voltage Range
Voltage Gain
Output HIGH Voltage
~VIN ~ 5 mV,O < lOUT < 5.0 mA
Output LOW Voltage
~VIN ~5mV
TA = +125°C, ~VIN ~ 5 mV, VOUT =0
Output Sink Current
T A = -55°C, ~ VIN ~ 5 mV, VOUT = 0
Positive Supply Current
VOUT ~O
VOUT - Gnd, Inverting Input - +5mV.
Negative Supply Current
VOUT = Gnd, Inverting Input = +10mV.
Power Consumption

3.5
2.7
0.25
1.8
5.0
15
27
±5.0
80
±5.0
1000
2.5
-1.0
0.5
1.0

mV

J.LA
J.LA

n
mA
ns
3.0
10
10
3.0
7.0
25
75
45

mV

J.LV/uC
J.LV/oC
J.LA
J.LA
nA/oC
nA/oC
J.LA
V
dB
V

100

3.2
-0.5
1.7
2.3
5.2
4.6
90

UNITS

4.0
0

9.0
7.0
150

V
V
mA
mA
mA
mA
mW

UNITS

710C
ELECTRICAL CHARACTERISTICS (T A = 25° C, V+ = 12.0 V, V- = -6.0 V unless otherwise specified)
PARAMETER
(see definitions)

CONDITIONS
(Note 2)

Input Offset Voltage
I nput Offset Current
I nput Bias Current
Voltage Gain
Output Resistance
Output Sink Current
Response Time (Note 2)

RS < 200

MIN.

TYP.

MAX.
5.0
5.0
25

1000

1.6
1.8
16
1500
200
2.5
40

n

~VIN ~ 5 mV, VOUT =0

1.6

The following specifications apply for O°C < T A ~ +70°C:
I nput Offset Voltage
RS ~ 200 n
Average Temperature Coefficient
RS = 50 n, T A = 0° C to T A = +70° C
of Input Offset Voltage
I nput Offset Current
Average Temperature Coefficient
T A = 25° C to T A = +70° C
of Input Offset Current
T A = 25° C to T A = 0° C
Input Bias Current
TA = O°C
Input Voltage Range
V = -7.0 V
Common Mode Rejection Ratio
RS ~ 200 n
Differential Input Voltage Range
Voltage Gain
Output HIGH Voltage
~VIN ~ 5 mV, 0< lOUT < 5.0 mA
Output LOW Voltage
~VIN ~5mV
Output Sink Current
~VIN ~ 5 mV, VOUT - 0
Positive Supply Current
VOUT ~ 0
Negative Supply Current
VOUT = Gnd, Inverting Input = +5mV.
VOUT = Gnd, Inverting Input = +10mV.
Power Consumption

±5.0
70
±5.0
800
2.5
-1.0
0.5

mV

J.LA
J.LA

n
mA
ns
mV

5.0

6.5
20

J.Lvtc

15
24
25

7.5
50
100
40

J.LA
nA/oC
nA/oC
J.LA
V
dB
V

98

3.2
-0.5

4.0
0

5.2
4.6
90

9.0
7.0
150

V
V
mA
mA
mA
mW

NOTES:
1. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for Metal Can, 8.3 mW/C for DIP,
and 7.1 mW/oC for the Flatpak.
2. The input offset voltage and input offset current (see definitions) are specified for a logic threshold voltage as follows: For 710, 1.8 V at
o
-55°C, 1.4 V at +25°C, 1.0 Vat +125°C. For 710C, 1.5 V at OOC, 1.4 V at +25°C, and 1.2 V at +70 C.
3. The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.

4-6

FAIRCHILD LINEAR INTEGRATED CIRCUITS. MA710
TYPICAL PERFORMANCE CURVES FOR 710

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARACTERISTIC
1800

~

iJ. '

2.01--+--I--+--+---.Jj.+-A-1--+--I--l

:V;
, ,

!:i

g
5 1.01--+-+--+--+11:J/-k'-'-t--+-+--t---t
"'0
III
5
ill

r....

t

-1.0 --- --- --- -'
-5.0

-3.0

"-

1600

"25°C
1

- TA " 25°C

'\

\

1500

~

~

\

1\

3.0

5.0

-20

100

20
60
TEMPERATURE - °c

-60

20
60
TEMPERATURE - °c

100

140

I'\.

o

-60

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE

.1

-20

"-

90

'"

. . . . !'-.

20
60
TEMPERATURE - °c

100

"

8S

0;;;;;;;;

2.0

1.5

75
-60

1.0
-20

20
60
TEMPERATURE - °c

100

140

RESPONSE TIME FOR
VARIOUS INPUT OVERDRIVES

-60

4.0

3.0

3.0

2.0
1.0

~/

IOmV

~

.A-5.0mV ....... V

IV 1/

, ,

2.0

f'1

1.0

20
60
TEMPERATURE - °c

-20

\,\ \ . '

10~V

20mV

' - 2.0mV

V+" +12V
V·', -6:0V r--+T ', 25°C
A

100
50

1.0

'"
100

--

\-'\ \.
~\

20
60
TEMPERATURE - °c

100

_ JI

-t.~~~L£VEl

140

140

V+· 12V
V- • -6.0 V

....!!2.G1C THRESHOLD Vo

..;;;;..:~"-

-

NEGATI VE OUTPUT U:VEl

-

-1.0
-60

-20

60
20
TEMPERATURE - °c

100

140 •

COMMON MODE
PULSE RESPONSE
V+.1+12V
3.0 I--+--+--I--+---I-I--+V;'--~'-'i_6:;';'V+---I

f 2.6mv

2.0I--II==:t:+:::t:::t.:~-+TA .'25°C r--

-(,
V,5.0mv ~,

V-k':/
·1.0

2.0

RESPONSE TIME FOR
VARIOUS INPUT OVERDRIVES

4.0

20mV

;;;;:::

3.0

........

.........

OUTPUT VOLTAGE LEVELS
AS A FUNCTION OF
AMBIENT TEMPERATURE

........

80

-20

4.0

1/

•

..........

~

94
-60

140

V+· 12V
V- • -6.0 V

2.5

.........

V+" 12V
v-" -7.0V
+5.0 V

96

...............

3.0

r--.. r-....

'"""- r--...

..........

3.5

I./r-'"

14

V~ VcM~

98

V+· 12V
V- • -6.0 V
95

I

-5.0

100

OUTPUT SINK CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

100

11
12
13
POSITIVE SUPPLY VOLTAGE - V

102

1.0

-20

~

V+· 12V
V- • -6.0V

\

-

...........

V

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

\

...... '"""-

,/"

V

./
./

,.~~ ~
'J'~~ P

\I .......

104

40

'""',-

./'

10

140

2.0
V+" 12V
V- • -6.0 V

o

V
1000 V

j.-

V

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

50

10

1500

"

500

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

r-..... .........

./

+--+--+---1

-1.0
1.0
INPUT VOLTAGE - mV

i"'-.~

,.''\'~

~2000

'\

1300
-60

..,.V

2500

1400

--- --- -1 '---

I--+-+-+-:!~T

3000

V+ • 12~
v- • -6.0V
I

1700

VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGES
I
I

1.01--+-+--t--t---t-t--t--t--t--I
·0 ---"-

......

--

-1.0

.Oll

son

"A710

V out

-I----r--

- f - VCM

2.0 - r - - ':' +-+--+--+--+-+---1---1

100
V+' +12V
v-, -6.0V
T ', 25°C r--A

50

...

:::>

l.or--~

:::>

o

'1 I

20

40

60
TlME- ns

80

100

120

20

40

60
TIME - ns

4-7

80

100

120

40

80
TlME- ns

120

160

FAIRCHILD LINEAR INTEGRATED CIRCUITS. J,lA710
TYPICAL PERFORMANCE CURVES FOR 710C

1700
V·· 12 V
- V" • "6.0 V

I

1---1--+-+

3.0

I

T • o°C.

~

A1

1/

--- ---

-=

(-.jI'-

TA • 25°C
2.0 f--+--+--+--+--+'*1''''::''-'--TI-.......
70'-C-+--I
3/
A

I

I!

--- --- --- -:1

-I'--

1500

.i·

3040
50
TIMPERATURE - °c

1200

800

3.0

I

20

I'-....

-- --

r-....... r--

r--

10

30
40
5060
TEMPERATURE - °c

70

I---+--+--+-+-

1

30
40
50
TEMPERATURE - °c

92

ro

60

o

10

20

--

r-

30
40
50
TEMPERATURE" °c

60

70

OUTPUT VOLTAGE LEVELS
AS A FUNCTION OF
AMBIENT TEMPERATURE

)'12/ V" • -6.0V

V·· 12 V
V- • "6.0 V

POSI TI VE OUTPUT LEVEL
3.0

3.0

2.5

-r---

4.0

V_ • 12 V "_
V • -6.0 V

~~-+-+-~-~-+--+-~

1

94

3.5

I

,I

.........

OUTPUT SINK CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE
100

r--....

1.0
01020

--

........
...........

14

V·· 12 V
V • "7.0 V
"5.0VS VCMS .5.0V

96

...........

O~~-~~~~-~~-~

01020

"'

~ I--

,/

1

98

'~

--

102

100

"- ~

"..

COMMON MODE REJECTION RATIO
AS A FUNCTION OF
AMBIENT TEMPERATURE

40

2.0

p~

~

/'V

,."

11
12
13
POSITIVE SUPPLY VOLTAGE" V

I
I
V··12V _
V" • -6.0 V

30

./

6070

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

V '12V _
V- • "6.0 V

V~

r-.....

"
01020

I--

;;YV ...--f-- I--

-\'

1400

1200

V

V

2000

.....................

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
~

1

TA • 25°C
2400

1600

1300

-1.0 L....-.l...--'--...J.........J...---J..---1_'---.l...-....I....-~
5.0
"5.0
"3.0
-1.0
1.0
3.0
INPUT VOLTAGE - mV

2800

I
V·· 12V v" • -6.0V

.............
1.0 f--+--+--+--+--i1J,l-/--+_+--+-+--I

50

VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGES

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE TRANSFER
CHARACTERISTIC

'-

r-- r---

2.0

--

2.0
LOGIC THRESHOLD VOLTAGE- f - -

-

1.0

1.5
NEGATIVE OUTPUT LEVEL
75

L...-1..L.0--:':2O-...J3O'---4O~----:':50-~60~~70

0

1.0

01020

TEMPERATURE - °c

RESPONSE TIME FOR
VARIOUS INPUT OVERDRIVES
4.0

-1.0

ro

60

01020

RESPONSE TIME FOR
VARIOUS INPUT OVERDRIVES

3040
506070
TEMPERATURE " °c

COMMON MODE
PULSE RESPONSE

4.0

3.0
20mV
2.0
1.0

30
40
50
TEMPERATURE - °c

IOmV

3.0

111 J. 5.~mvl//
'I II VT

il VlL

-

2.0
1.0

v.· .12V
v" '. "6:0V f - TA'· 2S'C

100

10mV -\20mV

2.0mV

~....-:v

"1.0

\\ \'-

50

\.

~\

2. 0

{.

V 5.OmV

V•• 1.12V
V"· "6V
TA .'25°C

3.0

r 2.Jmv

1.0

'r--.. ......

--

" 1.0

2.0 -

100
V.· .12V
V"· "6.0V
TA'· 25°C t-t--

50

~
;:;,

I.

0-

c-

.O~

c-~."•••••

-r--

r--

-

I- VCM

--

r- -

o

"I I

20

40

60
TIME" ns

80

100

120

20

40

60
TIME" ns

4-8

80

100

120

40

80
. TIME" ns

120

160

IJA711
DUAL COMPARATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J..LA711 is a Dual, Differential Voltage Comparator intended
primarily for core-memory sense amplifier applications. The device features high accuracy, fast response
times, large input voltage range, low power consumption and compatibility with practically all
integrated logic forms. When used as a sense amplifier, the threshold voltage can be adjusted over a
wide range, almost independent of the integrated circuit characteristics. Independent strobing of each
comparator channel is provided, and pulse stretching on the output is easily accomplished. Other
applications of .the dual comparator include a window discriminator in pulse height detectors and a
double-ended limit detector for automatic Go/No-Go test equipment. The J..LA711, which is similar to
the J..LA710 differential comparator, is constructed using the Fairchild Planar* epitaxial process.

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

STROBE 1

STROBE 2

INVERTING
INPUT 1

•

FAST RESPONSE TIME . . . 40 ns TYPICAL

•

5 mV MAXIMUM OFFSET VOLTAGE

•
•

10J..LA MAXIMUM OFFSET CURRENT
INDEPENDENT STROBING OF EACH COMPARATOR

V-

Note: Pin 5 connected to case.

ABSOLUTE MAXIMUM RATINGS
Positive Supply Voltage
Negative ~upply Voltage
Peak Output Current
Differential Input Voltage
Input Voltage
Strobe Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Flatpak
Operating Temperature Range
Military (711)
Commercial (711 C)
Storage Temperature Range
Lead Temperature
M~tal Can, DIP and Flatpak (Soldering, 60 seconds)
EQUIVALENT CIRCUIT

INVERTING
INPUT 2

STROBE 1

+14 V
-7.0 V
50mA
±5.0 V
±7.0V
o to +6.0 V
500mW
670mW
570mW

ORDER INFORMATION
TYPE
PART NO.
711
711HM
711HC
711C
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

N.C.

N.C.

INVERTING
INPUT 1

STROBE 1

NON·INVERTING
INPUT 1

v+

V-

-55°C to +125°C
O°C to + 70°C
-65°C to +150°C

GROUND

NON-INVERTING
INPUT 2

OUTPUT

INVERTING
INPUT 2

STROBE 2
N.C.

N.C.

ORDER INFORMATION

STROBE 2

'---~----------~--~---4r---r---~----------~--~---oV+

TYPE
711
711C

PART NO.
711DM
711DC

10-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 3F
INV~NR:~*~
NON.'NV~::~*~

c:::=:::r-,"'-..c------''''"i:=:::::::J STROBE 1
c:::::=:::r--iy
v+

NON·INVERTING
INPUT 2

c:===:F--I+".

or---,,____....

OUTPUT

INVERTING c::=:::r:-t,.;'l....----~=::::::J STROBE 2
INPUT2

ORDER INFORMATION
PART NO.
TYPE
711FM
711

* Planar

Notes on following page.

4-9

is a patented Fairchild process.

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • ILA711
711
ELECTRICAL CHARACTERISTICS (T A = 25°C, V+ = 12 V, V- = -6.0 V unless otherwise specified)

Input Offset Voltage
Input Offset Current

MIN.

CONDITIONS

PARAMETER

VOUT = +1.4 V, RS ..;;200
VOUT = +1.4 V, RS ..;;200

n, VCM = 0
n

VOUT = 1.4 V

Input Bias Current
750

Voltage Gain

TYP.

MAX.

UNITS

1.0

3.5

mV

1.0

5.0

mV

0.5

10.0

/.LA

25

75

/.LA

1500

Response Time (Note 2)

40

Strobe Release Time

12

Input Voltage Range

V-=-7.0 V

ns
V

±5.0

V

±5.0

Differential Input Voltage Range

200

Output Resistance
Output HIGH Voltage

VIN ~10mV

Loaded Output HIGH Voltage

VIN ~ 10 mV, 10 = 5mA

Output LOW Voltage

VIN

4.5
2.5

3.5

~10mV

-1.0

-0.5

Strobed Output Level

VSTROBE ";;0.3 V

-1.0

Output Sink Current

VIN

Strobe Current

ns

~10

mV, V out ~O
VSTROBE = 100 mV

Positive Supply Current

VOUT

Negative Supply Current

VOUT

0.5

5.0

V

0

V

V
0
2.5

mA

3.9
130

mA
mA

8.6

Power Consumption

V
mA

0.8
1.2

=Gnd, Inverting Input = +5mV
=Gnd, Inverting Input = +5mV

51

200

mW

4.5

mV

6.0

mV

20

/.LA

150

/.LA

The following specifications apply for -55° C ..;; T A";; +125°C:
Input Offset Voltage (Note 3)

RS ..;;200
RS ..;;200

n, VCM = 0
n

Input Offset Current (Note 3)
Input Bias Current
Temperature Coefficient of
5.0

Input Offset Voltage

/.LVrC

500

Voltage Gain

NOTES:
1. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/C for the Metal Can, 8.3 mW/oC for
the DIP, and 7.1 mW/oC for the Flatpak.
2. The response time specified (see definitions) is for a 100 mV step input with 5 mV overdrive.
3. The input offset voltage is specified for a logic threshold as follows:
711: 1.8 Vat-55°C, 1.4 Vat+25°C, 1.0 Vat+125°C
711C: 1.5 V at OOC, 1.4 Vat+25°C, 1.2 Vat+70°C

4-10

FAIRCHILD LINEAR INTEGRATED CIRCUITS • ~A711
711C
ELECTRICAL CHARACTERISTICS (T A

= 25°C, V+ = 12 V,

V-

= -6.0

V unless otherwise specified)

MIN.

MAX.

1.0

5.0

mV

VOUT = +1.4 V, RS ~200 n

1.0

7.5

mV

VOUT = +1.4 V

0.5

15

J.LA

25

100

J.LA

CONDITIONS
VOUT = +1.4 V, RS ~2oo 0, VCM = 0

I nput Offset Voltage
Input Offset Current

UNITS

TYP.

PARAMETER

Input Bias Current
Voltage Gain

700

1500

Response Time (Note 2)

40

ns

Strobe Release Time

12

ns

V-=-7.0V

I nput Voltage Range

V

±5.0

V

±5.0

Differential Input Voltage Range

200

Output Resistance
Output HIGH Voltage

VIN ;;;.10mV

Loaded Output HIGH Voltage

VIN ;;;.10 mV, 10

Output LOW Voltage

4.5

=5 mA

2.5

3.5

VIN ;;;.10mV

-1.0

-0.5

Strobed Output Level

VSTROBE ~0.3 V

-1.0

Output Sink Current

VIN ;;;.10 mV, VOUT ;;;.0

Strobe Current

VSTROBE

Positive Supply Current

VOUT Gnd, Inverting Input

Negative Suppty Current

VOUTGnd, Inverting

0.5

= 100 mV

5.0

V

0

V

V
0
2.5

mA

3.9
130

mA
mA

8.6

Power Consumption

V
mA

0.8
1.2

= +10mV.
Input = +10mV.

n

230

mW

6.0

mV

10

mV

25

J.LA

150

J.LA

0

The following specifications apply for 0 C ~ T A ~ +70 C:
0

Input Offset Voltage (Note 3)

RS ~ 200n, VCM = 0
RS ~ 200 n

Input Offset Current (Note 3)
Input Bias Current
Temperature Coefficient of
Input Offset Voltage

5.0

Voltage Gain

500

4-11

J.Lvtc

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlAi11
TYPICAL PERFORMANCE CURVES FOR 711 AND 711C
VOLTAGE TRANSFER
CHARACTERISTIC
711

VOL TAGE TRANSFER
CHARACTER ISTIC
711C

5.0

~ p-

g

,'/'

~

, '/

1.0

~-~-

-1.0
-5.0

-

-

TA a -t25°C "
2.0

§

1.0

3.0

TA a <'10°C

~

'til

V+ a +12V
V- a -6.0V

'"

---

-- --

1500

'\

"\

~

g

If

"\

1«lO

"\

1300

''\

-~

1200
-60

-1.0_5~.0,..-1--_-::1.
3•0:---1---:-_1.L:-0---L--I,L.0-J.-,J3.-=-0-L.-,J5. 0

5.0

""-

;

f
F

---

-1.0
+1.0
INPUT VOLTAGE - mV

I

TA • o°c (:'

Vi

-- '-55°C

- 3.0

it'

1600

ll/

3.0

~
~

//i

+25°C

~'

4.0

,'/1
/1/

2.0 I

V+ a +12V
V- a -6.0V

// '
,vI

3.0

+125°C

1700

5.0

f--V.a+ 12V
v- a -6.0V
4. O

VOLTAGE GAIN
AS A FUNCTION OF
AMBIENT TEMPERATURE

-20

+20
+60
TEMPERATURE °c

INPUT VOLTAGE - mV

VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGES

""

+100

+I«l

COMMON MODE
PULSE RESPONSE

2800

TA a 25°C

~

2400

2000

V

-l~ V

1600

1200

800

V~

./

~

V

VV

V

V

I--

~':' 2.0
z~ 1.0

i~
8>

I----I--

V

-

~

0 I-50
f--.

~ I---

V

V+o+12V
v- a -6.0V
TA ° 25°C

3.0

f--

II

12

14

13

80
TIME - ns

INPUT BIAS CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE
50

I

\

S.O

I

\

r"-

1.0

+60
.20
TEMPERATURE - ·C

II>

.100

~

100

S
>

50

~

.I«l

6.0

V

4.0

'H

5.0mV

i..-

~ 2.0mV

J

/117 1/

y .....

/
V+a +12V._
V- a -6.0V
TA a25·C -

20

«l

60
80
TIME - ns

~

120

POWER CONSUMPTION
AS A FUNCTION OF
AMBIENT TEMPERATURE
l«l

vout V+o +12V
V- ° -6.0V

~Cl

100

I

I

~~:~!~~V-

TA °25·C

5.lkO

-6.0V

0

~
2.0
5.0mV ....
1.0

10mV

vr

OUTPUT PULSE
STRETCHING WITH
CAPACITJVE LOADING

V.- +12V
V-- -6.0V TA - 25·C

J

FIll f

........

STROBE RELEASE TIME
FOR VARIOUS INPUT
OVERDRIVES

~
c

VI"
20mV

-1.0

o
-20

2.0
1.0

§

10

!:l

3.0

. . . . r---.,
..............

i.-"'"

4.0

~

~

20

-60

>

~

I\.

30

g

160

RESPONSE TIME
FOR VARIOUS INPUT
OVERDRIVES

V.o .12V
V- ° -6.0V

\.

/

120

2.0 I-~.".

POSITIVE SUPPLY VOLTAGE - V

2.0

~ f--

V

«lO1O

3.0

Vout

Ejn

~ ~.omv

I~ V

130

I---

r-.....

OmV

t-......

~

I

-1.0mV I--

~ ~~

-2.01--+-+-+--+--+--+-+--1-1--1

-1.0
10

I- l--

20
30
TIME - ns

50

100

200
300
TIME - ns

4-12

«lO

500

120
-60

-20

+20
+60
TEMPERATURE - ·C

.100

.I«l

uA734
PRECISION VOLTAGE COM PARATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The p,A 734 is a Precision Voltage Comparator constructed on a single
silicon chip using the Fairchild Planar* epitaxial process. It is specifically designed for high accuracy
level sensing and measuring applications. The p,A 734 is extremely useful for analog-to-digital
converters with twelve bit accuracies and one mega-bit conversion rates. Maximum resolution is
obtained by high gain, low input offset current, and low input offset voltage. Its superior temperature
stability can be improved by offset nulling which further reduces offset voltage drift. Balanced or
unbalanced supply operation and standard TTL logic compatibility enhance the p,A734's versatility.
•
•
•
•
•
•
•

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

CONSTANT INPUT IMPEDANCE OVER DIFFERENTIAL INPUT RANGE
HIGH INPUT IMPEDANCE . . . 55 Mn
LOW DRIFT .. . 3.5/.NloC
HIGH GAIN . . . 60 k
BALANCED OFFSET NULL CAPABILITY
WIDE SUPPLY VOLTAGE RANGE . . . ±5 V to ±18 V
TTL COMPATIBLE

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Peak Output Current
Differential Input Voltage
Input Voltage Range (Note 1)
Voltage Between Offset Null and VInternal Power Dissipation (Note 2)
Metal Can
DIP
Operating Temperature Range
Military (734)
Commercial (734C)
Storage Temperature Range
Metal Can, DIP
Lead Temperature (Soldering, 60 Seconds Max.)

NON INV. INPUT

±18 V
10 mA
±10 V
±13V
±0.5 V
500mW
670mW
-55°C to +125°C
O°C to +70°C
-65°C to +150°C
300°C

•

V-

ORDER INFORMATION
TYPE

PART NO.

734
734C

734HM
734HC

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

EQUIVALENT CIRCUIT
v+
RS
400

R9
10k

N.C.

PU LL UP RESISTOR

N.C.

OUTPUT

v+
OUT

N.C.
NON INVERTING
INPUT

1-1

N.C.
GNO

INVERTING
INPUT

GND

v·
OFFSET NULL
N.C.
OFFSET NULL

R12
19k

R13
52

1+10---..+----------1----------+-----1

ORDER INFORMATION

~---~~--~~---+----_+-----~--~--~vOFFSET NULL

OFFSET NULL

Notes on following pages.

TYPE

PART NO.

734
734C

734DM
734DC

* Planar is a patented F airch ild process.

4-13

FAIRCHILD LINEAR INTEGRATED CIRCUITS • /lA734
±15 VOLT OPERATION FOR 734C
ELECTRICAL CHARACTERISTICS (T A = 25°C, Pin 8 tied to +15 V, unless otherwise specified) Note 3.
PARAMETERS

CONDITIONS

Input Offset Voltage

MIN.

RS";; 50 kn

Input Offset Current
Input Bias Current

TYP.

MAX.

UNITS

1.1

5.0

mV

3.5

25

nA

30

100

nA

55

Mn

Input Capacitance

3.0

pF

Offset Voltage Adjustment Range

8.5

mV

60 k

V/V

Input Resistance

Large Signal Voltage Gain

7.0

.'

R L = 1.5 kn to +5.0 V

35 k

Positive Supply Current - Output LOW

4.0

5.0

rnA

Negative Supply Current - Output LOW

1.5

2.0

mA

Power Consumption - Output LOW

82

105

mW

Transient Response

ns

200

R L = 1.5 kn to +5.0 V
5 rnV Overdrive, 100 rnV Pulse

The following specifications apply for O°C..;; T A";; +70°C
Input Offset Voltage

RS";; 50 kn

Input Offset Current
Average Input Offset Voltage Drift

1.2

7.5

mV

4.0

45

nA

3.5

20

p,V/oC

RS";; 50 n

Without External Trim
TA

= +25°C to +70°C

0.02

0.3

nAloC

TA

= +25°C to O°C

0.05

0.75

nAloC

Average Input Offset Current Drift

Input Bias Current
Large Signal Voltage Gain

150
RL

= 1.5 kn to +5.0 V

25 k

nA
V/V

Input Common Mode Voltage Range

±10

V

Differential I nput Voltage Range

±10

V

Common Mode Rejection Ratio

RS";; 50 kn

Supply Voltage Rejection Ratio

RS";; 50 kn

VS

=

70

100
6.0

dB
100

p,V/V

± 5 V to ± 18 V

10

= 0.080 mA

7.0

10

= 0.080 mA, V8 = +5.0 V

2.4

V

Output HIGH Voltage
5.0

V

0.4

V

Positive Supply Current - Output LOW

7.0

mA

Negative Supply Current - Output LOW

2.5

mA

Power Dissipation - Output LOW

145

rnW

Output LOW Voltage

ISINK

= 3.2 rnA

4-14

FAIRCHILD LINEAR INTEGRATE"D CIRCUITS • MA734
±15 VOLT OPERATION FOR 734
ELECTRICAL CHARACTERISTICS (T A = 25°C, Pin 8 tied to +15 V, unless otherwise specified) Note 3.
MIN.

CONDITIONS

PARAMETERS

TYP.

MAX.

UNITS

0.9

3.0

mV

Input Offset Current

1.5

10

nA

Input Bias Current

28

50

nA

Input Offset Voltage

RS';;; 50 kn

60

Mn

I nput Capacitance

3.0

pF

Offset Voltage Adjustment Range

8.5

mV

70 k

V/V

20

Input Resistance

Large Signal Voltage Gain

35 k

R L = 1.5 kn to +5.0 V

Positive Supply Current - Output LOW

4.0

5.0

mA

Negative Supply Current - Output LOW

1.5

2.0

mA

Power Consumption - Output LOW

82

105

mW

Transient Response

RL = 1.5 kn to +5.0 V

ns

200

5 mV Overdrive, 100 mV Pulse

The following specifications apply for -55° C .;;; T A .;;; +125° C
Input Offset Voltage

RS';;; 50"kn

Input Offset Current
Average Input Offset Voltage Drift

1.1

4.0

mV

3.0

20

nA

2.5

15

p,V/oC

RS';;; 50 kn

Without External Trim
TA

= +25°C to +125°C

0.01

0.1

nA/oC

TA

= +25°C to

0.05

0.4

nA/oC

150

nA

Average Input Offset Current Drift
-55°C

Input Bias Current

= 1 .5

25 k

V/V

Input Common Mode Voltage Range

±10

V

Differential Input Voltage Range

±10

V

Large Signal Voltage Gain

RL

kn to +5.0 V

Common Mode Rejection Ratio

RS';;; 50 kn

Supply Voltage Rejection Ratio

RS';;; 50 kn

Vs

=

70

dB

100
5.0

100

p,V/V

±5 V to ±18 V

10

= 0.080 mA

10

= 0.080 mA,

V

7.0

Output HIGH Voltage

= +5.0

5.0

V

0.4

V

Positive Supply Current - Output LOW

7.0

mA

Negative Supply Current - Output LOW

2.5

mA

Power Dissipation - Output LOW

145

mW

Output LOW Voltage

ISINK

= 3.2

V8

mA

V

2.4

NOTES:
1. Rating applies for ±15 V supplies. For other supply voltages the rating is within 2 V of either supply.
2. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for Metal Can, 8.3"mW/oC for DIP.
3. Pin numbers refer to Metal Can package.

4-15

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p,A734
TYPICAL PERFORMANCE CURVES FOR 734 AND 734C (Note 2)
UN-NULLED INPUT OFFSET
VOLTAGE AS A FUNCTION
OF AMBIENT
TEMPERATURE

TRANSFER
CHARACTERISTICS
8.0

2.0

Vs • :tISV
PIN 8 TIED TO +ISV
Rl • l.HO TIED TO +SV

1.8

6.0

\ /

INVERTING INPUT

o

-400 -300

-200 -100

0

1.0

100

200

300

Vs • :tISV
-20

~

35

"- r--...

I--

,,--

30
2S

.......

-

I--

'"

IS

..........

10

.........
.............

20

100

60

140

-

VS' :tISV
TA .2S"C

'r

1

-2

-10

AMB IENT TEMPERATURE - ·C

10

10

\
\

;

\
\

6.0

\
I\.

4.0

i'..

i'....

2.0

o

-20

~

-.... r-J-..

20

DIFFERENTIAL INPUT VOLTAGE - V

OUTPUT HIGH VOLTAGE AS
A FUNCTION OF SUPPLY
VOLTAGE AND AMBIENT
TEMPERATURE

140

±S.OV ~ Vs ~ :tISV

~
.:. 8.0

i~

20

20

-20

-

100

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

<.>

"'-.

~

60

20

12

40

10

-20

~

AMBIENT TEMPERATURE - ·C

4S

,

30

140

INPUT BIAS CURRENT AS A
FUNCTION OF DIFFERENTIAL INPUT VOLTAGE

I±SV~ Vs s: :tISV

40

100

60

20

~ o~~~~~+-+-+--t--t--I

I

AMBIENT TEMPERATURE - ·C

INPUT BIAS CURRENT AS A
FUNCTION OF AMBI ENT
TEMPERATURE

so

~ 200 ~1<-Pt-+-./--+-+-~4--t--I

~ 100

I

INPUT VOLTAGE - ~V

60

~~

"

.......

0.6

Gl

...

l!5

0.8

"

~

g~

........ ........ ~.SOIl
I

V

~

...............V

1.2

\/

2.0

-

"- ~'IOOkO

1.4

M /-

~ Gl I-\-t"-"-'t'-"-'T'-'-~'r"-'-~+--t--t--I

"

1.6

~
4.0 -NON-INVERTIN
INPUT-'

INPUT OFFSET VOLTAGE
CHANGE AS A FUNCTION OF
AMBIENT TEMPERATURENULLED TO ZERO AT 25°C

100

60

AMBIENT TEMPERATURE

OUTPUT LOW VOLTAGE AS
A FUNCTION OF SUPPLY
VOLTAGE AND AMBIENT

140

_·c

OUTPUT VOLTAGE LOW
VS SINK CURRENT

TEMPER~T,~E
350

8.20 ,.....PIN8T1EOTOV+

~

I

::f 8.IS
i3

-r--_

8.10

~
~

g 8.05
5

§

........ ~

v~
,//

> ~ . . . . .1'.....

I

I

-20

-60

~

4.00
60

I'
I"

. . . . 1'-.
r-- .....

'I\..

275

. . . 1'.....

100

140

!

2S0

PIN 8 TIED TO +15V

V VI-'
..,.,.V V PIN 8 OPEN

V

/11
-

v
,,/"

:tSV

225

-20

-60

20

100

60

l.

10

140
SINK CURRENT - rnA

POSITIVE AND NEGATIVE
SUPPLY CURRENTS AS A
FUNCTION OF AMBIENT
TEMPERATURE

VOLTAGE GAIN AS A
FUNCTION OF SUPPLY
VOLTAGE

Vs • ±lSV
Rl • I.SQTlED TO +5V

v ...

Vs :t15V
TA' • 2S·C
VIN > 10 mV

AMBIENT TEMPERATURE _·C

VOLTAGE GAIN ASA
FUNCTION OF AMBIENT
TEMPERATURE

5.5

TA • 2S·C
Rl • 1.5 kQTlED TO +SV

70k

Vs • :tISV
VOUT lOW

lOOk

-

4.5

"-

,,\
~

""

60k

""" . . . .1'....

60k

40k

3.5
/

...........

r-

---

I--

r--....

I--

~

-20

20

60

AMB IENT TEMPERATURE - ·C

100

140

±S

1.5

:til

:t7

:til

±IS

-~

V

2.5

SDk

20k

V
V

100

AMB lENT TEMPERATURE - ·C

I20k

./

V ~
. /V k-"

/±lSV-

......v

--

4.10 >
I ..........

20

300

~
~

I

8;00

~
4.20

600

325

4.30~
VS' ±SV ;;;;;- -

I-v's .1lsv

:;:

I- PINS 8 TIED TO v+
ISNK • 3.2 rnA

4.40

10' 80 ~A

0.5
~

,/

-~

V

...- IS (PIN

~- "'"

8 TIED TO +ISV)
.......... 1--

J---r"
...- iSIPIN
BOPEN)
~

-~

IS

-20

20

60

SUPPLY VOLTAGE - V
AMBIENTTEMPERATURE - "C

4-16

100

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA734
TYPICAL PERFORMANCE CURVES FOR 734 AND 734C (Note 2)
RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES

RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES

PIN 8 OPEN
RL • 1.5 kO TIED TO .+5V
TA • 25°C
Vs • ±15V
2O,mV :-...
10 mV

/

PIN 8 OPEN
RL • 1.5 kO TIED TO +15V
TA • 25°C
Vs • ±l5V

>

f?' A 1,,< 2 mV

~ 77
'/11 I

5mV

g

~

4

'5

2

§

)

INPUT OFFSET VOLTAGE
DRIFT AS A FUNCTION
OF TIME

,\

20 mV --\,
10 mV

\ .~

'" \
1\ ,

35
Vs • ±15V
TA • 125°C
RS • 500

30
25

2mV
5mV

TREND LINE

20

,\

15

II

~
~

240

160

J

50

~
80

10

100

g

0

40D

320

80

TIME - ns

160

2«1

320

40D

o

200

RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES

II

V V /

j /

'(..f V

/ '/

If/

)

V

10 mV

2

J

l(/

1\ ,

20 mV

i

~i\\

I\--:- ,-2 mV

;--~

I\"' .... ; - - 5 mV

L\

."V

-5

\ \

0

I~ ~

Tl·
Vs' ±15V

\,\

4

'5mV-

~oc

1\\1\ \

/

"~,2my

IJ

... V

-10

1\

~ +--:-

VS' ±15V
RS • 50Q
VO·1.4V- f.-

-15
PIN 8 TIED TO +15V
Rl • 10 kQ TIED TO +15V

-50
-100
160

2«1

320

I'NlTIt
80

400

RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES

:;6.0
PIN 8 TIED TO +15V

~~

:

~;o~Q ,TlED TO +5V

Vs • ±l5V
10 mV ' -

200

20 mV ~

/

g

I

I J
-f.J I J-

/

g
~

-100
80

160

~\ ~

10mV- ;--

r
·50

240

40D

320

-

I\- ;-2mV
;-5mV

200

\~,
~\I\.

V

"-

100

I- r-t-~~:

~~~o

I

VS' ±15V'- f.RS • 500
Vo ·1.4V_ f.-

,/

I

:NITI~L OF~SET ~OLTArE < : ~V

I
160

240

320

20

40D

TIME - ns

COMMON MODE REJECTION
RATIO AS A FUNCTION OF
AMBIENT TEMPERATURE

160

m1\00- i'-';-

50

0

120

~ fu50i

\

PIN 8 TIED TO +15V
RL ·1.5kO TIED TO +5V

80

TIME - ns

80

300

I

100

40

RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES

I
~

i'

< ~v

-25

\\

.L~ i....-'

.0

I I
fOLIAtE

TIME FROM POWER APPLICATION - SECONDS

I
2OmV- ~l\

200

5 mV

ET

THERMAL RESPONSE OF
INPUT OFFSET VOLTAGE
TO STEP CHANGE OF CASE
TEMPERATURE

I

'5 400

'/ II-- ' - : - ' - -

40D

°T

TIME - ns

6.0

§

2mV

320

I

~

///

240

160

TIME - ns

4.0

-20

0

80

1000

STABILIZATION TIME OF
INPUT OFFSET VOLTAGE
FROM POWER TURN·ON
10

6

800

60D

40D

TIME - HOURS

8

20 mV
10 ~V

II
o

TIME - ns

RESPONSE TIME FOR
VARIOUS INPUT
OVERDRIVES
PIN 8 TIED TO +15V
RL • 10k TIED TO +15V
TA • 25°C
V • ±15V

1/

/'

OFFSET NULL CIRCUIT (NOTE 2)

«I

60

80

TIME FROM HEAT APPLICATION - SECONDS

AC TEST CIRCUIT (NOTE 2)

lIO

100

I - I--

I--

I""'----r-...

f'..t-

90

80
Vs • ±15V
V,N' ±IOV._
RS • 100 kO

I

70
-60

-20

20

60

I
100

SOn

150k,:+---oVOUT

>_---oVOUT
STROBE

STROBE 1
STROBE 2

V-

V-

RS

* 1/29944

= R1
R1

V HYS

R2

+ R2

=

FOR MINIMUM OFFSET

R1 [VOMAX- VOMIN]

PRECISION DUAL LIMIT GO-NO GO TESTER

HIGH POWER OUTPUT CIRCUITS

VON
~-----_-oVOUT

VOUT

FREE RUNNING OSCILLATOR

VOLTAGE CONTROLLED OSCILLATOR

+lSV

lkU

20ku

+lSV

f

~

'VIN

T1
• Adjusts T2

IVREF\,R 1 C1

PULSE WIDTH DISCRIMINATOR

FREQUENCY DIVIDER & STAIRCASE GENERATOR

Cl
V.No--I

lJl[:.N

J-_n........~

VOUT

I-'...-T

FJT1100

V-

IVREFI -

2VO

+ N [3.5T + 2VO
VOUT Pulse Appears

T In Seconds
Vo for FJT 1000' ~ O.31V

Whenever T

4-18

>

RCV2

~

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA734
TYPICAL APPLICATIONS (Note 2)

v'

PHASE METER

Vl~

V-""""

/'"

2~

VO UT

VAVG~

lOu

V2~

~

OUT

V
VAVG - - - - - - - - - -

<1»0

<1>< 0

20ki!

101!

21T VAVG

I/J = VOUT. PEAK

-11'

12-BIT AID CONVERTER

•

v'
R
2R

2R

2R

oro REF.
VOLTAGE
ANALOG
INPUT

1

NO. OF BITS
8
9
10
12

END OF CONVERSION
OUTPUT PU LSE

12-BIT AID CONVERTER
CLOCK
INPUT

START
INPUT

4-19

A VALUE
12.5kO
25kO
50kO
200kO

IJA750
DUAL COMPARATOR SUBSYSTEM
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA750 is a Dual Comparator Subsystem consisting of two
independent high current comparators with input inhibit capability. A voltage reference is included
in the J.LA750. The device is protected against short circuits and thermal overloads. Positive switching
is insured by built-in hysteresis. Hysteresis expansion is available for operation in noisy environments.
These advantages make the ~A750 ideally suited for a wide variety of applications including environment and process systems. It is also recommended for use as a comparator for driving relays or
indicator lamps.

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

OUTPUT B

•

HIGH OUTPUT CURRENT CAPABILITY . . . 250 mA

•

THERMAL AND SHORT CIRCUIT CURRENT PROTECTION

•

SUBSYSTEM VOLTAGE REFERENCE

•

POSITIVE SWITCHING BY MEANS OF BUILT-IN HYSTERESIS

STROBE B

STROBE A

INPUT B (+)

INPUTA(+)

INPUTBH

INPUTAH

OUTPUT CURRENT SINKING CAPABILITY IN ADDITION TO HIGH CURRENT SOURCE
COMPLETELYINDEPENDENTCOMPARATORS
INDEPENDENT INPUT INHIBIT CAPABILITY

ORDER INFORMATION

WIDE POWER SUPPLY RANGE ... +11 V to +26 V

TYPE
750C

EQUIVALENT CIRCUIT
SUPPLY

v+
14

OVERLOAD
2

~----+---I-+--I--+--I--I--+---,--+-+--

4
INPUTS!"'}

CLAMP A
GND

•

•

OUTPUT A

REFERENCE

•

.•

SUPPLY

OVERLOAD

5

3

INPUTBI-)

STROBES

•
REFERENCE

4-20

8
GND

__-+-+----1I---.f---I--t' a"

12
STROBE A

to

11

INPUT A H

INPUT A(+}

PART NO.
750DC

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

/JA750

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Voltage Between Input Pins
Input Voltage Range
Voltage Range at Output Terminal (Output Off)
Voltage at Clamp Terminal (Clamp Off)
Output Current Per Side (Note 1)
Reference Output Current
Clamp Sinking Current Per Side
Power Dissipation (Note 2)
Voltage at Strobe Input Terminal
Current Out of Overload Terminal
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 seconds)

26V
±5 V
o V to Supply Voltage
-5 V to Supply Voltage
30V
250mA
30mA
30mA
670mW

+6V
10mA
O°C to +70°C
-65°C to +150°C
300°C

ELECTRICAL CHARACTERISTICS: 750C
Each Comparator (TA = 25°C, V+ = 24 V, VSTROBE = 0, VIN(+) and VIN(-) as defined in Figure 1,
I REF = 0, ICLAMP = 0, RL = 1 kil, (Notes 3,4) Test Circuit 1, unless otherwise specified).
UNITS

CONDITIONS

PARAMETERS
DC CHARACTERISTICS:
Positive Threshold Voltage (VTHRESH (+»

(See Figure 1)

9.0

mV

Negative Threshold Voltage (VTHRESH (_»

(See Figure 1)

9.0

mV

Hysteresis Voltage (VHYST)

(See Figure 1)

18

mV

Offset Voltage (V OFFSET)

(See Figure 1)

0.5

mV

Continuous Available Output Current

Device "ON" (See Figure 1)

220

mA

1.5

Total Input Bias Current
Output Voltage Below Supply Voltage

TJ= 25°C, lOUT = 150mA
Device "ON" (See Figure 1)

Output Leakage Current

Device "OFF" (See Figure 1)

1.7

Device "ON" (See Figure 1)

Clamp Saturation Voltage

0.4

ICLAMP = 25 mA

J.l.A
2.1

V

100

J.l.A

0.8

V
il

15

Clamp ON Resistance
1.1

Strobe Activation Voltage

2.3

V

7.8

8.4

V

12

18

1.6

kil

5.0

Strobe Input Resistance
Reference Voltage

IREF = 10 mA

Supply Current (Pin 14)

Device "ON", lOUT = 0

7.0

Shutdown Threshold Voltage at OVERLOAD Terminal
(measured as voltage below supply voltage) (Note 4)

mA
V

0.7

The following specifications apply for O°C ~ T A ~ 70°C
(See Figure 1)

6.0

14

mV

(See Figure 1)

6.0

14

mV

Hysteresis Voltage (VHYST)

(See Figure 1)

12

Offset Voltage (V OF FSET)

(See Figure 1)

Continuous Available Output Current

Device "ON" (See Figure 1)

Positive Threshold Voltage (VTHRESH (+»
Negative Threshold Voltage (VTHRESH

(_»

28

mV

6.0

mV

5.0

J.l.A

mA

125

Total I nput Bias Current
AC CHARACTERISTICS: TA = 25°C, RL = 220 il, RCLAMP = 2.4 kil
Output Rise time (t r )
Output Fall time (tf)

(See Figure 2)

55

ns

(See Figure 2)

150

ns

Turn ON Propagation Delay, I nput to Output (tPLH)

(See Figure 2)

95

ns

Turn OFF Propagation Delay, Input to Output (tpHL)

(See Figure 2)

470

ns

Turn ON Strobe Release Time Itsr+)
Turn OFF Strobe Release Time (t sr -)

(See Figure 3)

115

ns

(See Figure 3)

525

ns

NOTES:
1.

Rating applies when OVERLOAD terminal is used to modify or defeat internal overload protection circuitry.

2.

Rating applies when used without heatsink. Junction temperature T J must not exceed 150°C. T J = T A + Rth x P DISS ' where Rth I'::i
120° C/W is the typical thermal resistance (junction to ambient) for the package without heatsink and P DISS is the power dissipation in the.
package.

3.

At least one input pin of an unused comparator section should be connected to a positive voltage between +3 V and (V+ -2 V) e.g.,
reference output pin (Pin 6).

4.

Under overload conditions the device will shut off the output sections. Resetting can be accomplished by temporarily interrupting the
supply current after the overload conditions have been removed. An R-C network between the supply and overload terminal can be used
to decrease the sensitivity of the overload protection network.

4-21

•

~A750

FAIRCHILD LINEAR INTEGRATED CIRCUITS •
HYSTERESIS DEFINITIONS

SWITCHING TIMES

STROBE RELEASE TIMES

OUTPUT

VO~~~~~

r---__+-~-----~----ON

VIN (+) - VIN (_)
OFF---f---~-+-~-~

VTHRESH

+3V

STROBEINPUTVOLT~

H

J\=

::,~

1+--;.-----+1 VTHRESH (+)

VHYST

rVHYST

j====-====== 4..=_T.:.-_ _ __

/4--_.,---+_ _ _-1
i-VOFFSET

--l

Daviea "ON": Y,N (+);;. Y,N (_) + VTHRESH (+)
Daviea "OFF": Y,N (+)" Y,N (_) - IVTHRESH (_)1

~tsr-

tsr+

VHYST = VTHRESH (+) + IVTHRESH (-)1
VOFFSET = 1/2 [VTHRESH (+) - IVTHRESH (-)11

Fig. 2

Fig. 1

Fig. 3

BLOCK DIAGRAM

TEST CIRCUIT 1
SUPPLY
14

OUTPUT A

13

OUTPUTS

1

, . . . - - - - _ - - - - - - - -.........--_-
()

o
10

20
SUPPLY VOLTAGE - VOLTS

30

-......

50

70

90

--b...

110

130

150

REFERENCE OUTPUT VOLTAGE
AS A FUNCTION OF
TEMPERATURE AND
REFERENCE OUTPUT CURRENT

/0/

8.0

=' 24 V

. . . . .V

7.9

"lOUT = 150 mA

7.8

/ /"
V /'"
V
-1.8
10

30

50

70

-- -- -

'REFERENCE

./

~ -1.6

4

30

V+

...::JI

~

...............

8.1

>

-

..........

JUNCTION TEMPERATURE _ °c

VOLTAGE 01 FFERENCE BETWEEN
OUTPUT AND SUPPLY VOLTAGE AS A
FUNCTION OF JUNCTION TEMPERATURE
AND OUTPUT CURRENT

,f

_"j~NC"'ON=25°~

~

30

~

BOTH SIDES TURNED ON

-

20

H - VOLTS

~

IOUT= 0

~

0.5

-0.8

_IRIEFE~ENC~ = 0

-

(t
Y,N

SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
AND TEMPERATURE

"

1.0

V+ = 24 V

10

JUNCTION TEMPERATURE _ °c

12

1.5

V+ = 12 V

-12

-16

14

V+= 24 V

I I

o

_161--+-+--+--+--1--1
+--1

16

2.0

/

V+".12V

VOFFSET

o
>

INPUT BIAS CURRENT AS A
FUNCTION OF
JUNCTION TEMPERATURE
2.5

I

~

I

>

I

--r

V

= 1 mA

'REFERENCE

-

= 10 mA __

~

7.7
90

110

JUNCTION TEMPERATURE - °c

4-22

130

150

INPUTB(+)

5INPUT8i-!

10

30

50

70

90

110

JUNCTION TEMPERATURE - °c

130

150

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

JLA750

TYPICAL PERFORMANCE CURVES FOR 750C (Cont'd)
POWER DISSIPATION DUE TO
BIAS CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
300

IR~F = 0

I

1

700

/

10UTPUT= 0

600

Ij/

BOTH SIDES TN"

v

500

V/

ov

200

POWER DISSIPATION AS A FUNCTION
POWER DISSIPATION DUE TO
OF OUTPUT CURRENT (ONE SIDE)
REFERENCE OUTPUT CURRENT
AND JUNCTION TEMPJ:RATURE
AS A FUNCTION OF SUPPLY VOLTAGE

~V

y ~
v
y
/ ' 5-

400

,\,0'"

f--

...

100

,\~';;"'V

..J.,
~

~
0
w
w
w

1.6

c.t-:~

o

10

20

30

40

50

60

AMBIENT TEMPERATURE _

r-......

1.5

f7
l/f

7.5

"'t-...

1.4

r-..... r---.....

1.3

10

70

~ .....

,~~~,

7.6

a:

I£--+--I-~~~~~NT~~~~;~ ~~6~Ng!N RB~SED.
RTH (JUNCTION TO AMBIENT) = 12(fJC/W.
50~~--~~~--~--~--~~

1.7

~t-

7.7

Z

a:

=1 24 V

1.8

I 1= \Om!\.
~l\~¢E

CJ

FOR HIGHER TOTAL POWER DISSIPATION.
USE EXTERNAL HEAT SINK. TO CALCULATE

V+

IR~FER~NCEI= 1 rn~

7.9

Cl

«

30

STROBE ACTIVATION
VOLTAGE ASA FUNCTION
OF TEMPERATURE

Tj::;O 25°C

>

20

1.9

8.0

140

~
0

1

REFERENCE OUTPUT CURRENT - rnA

REFERENCE OUTPUT VOLTAGE
AS A FUNCTION OF SUPPLY
VOLTAGE AND OUTPUT CURRENT

150

v+= 12 V

10

20

°c

30

SUPPLY VOLTAGE - VOLTS

10

30

50

70

90

110

JUNCTION TEMPERATURE _

130

150

°c

TYPICAL APPLICATION
TEMPERATURE CONTROL SYSTEM

7.5 k!l
RELAYS: VCOIL = 10 -12 V
ICOIL.;; 150 mA

6.8 k!l
5 k!l (TEMPERATURE ADJUSTMENT)

1- I
L

~T-;T~R:S~R -

-

-

~10 k!l AT DESIRED
TEMPERATURE

----------

4-23

..

•

IJA760
HIGH SPEED DIFFERENTIAL COMPARATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The IJ,A760 is a Differential Voltage Comparator offering considerable
speed improvement over the IJ,A71 0 family and operation from symmetric supplies of from ±4.5 V to
±6.5 V. The IJ,A760 can be used in high speed analog to digital conversion systems and as a zero
crossing detector in disc file and tape amplifiers. The IJ,A760 output features balanced rise and fall times
for minimum skew and close matching between the complementary outputs. The outputs are TTL
compatible with a minimum sink capability of two gate loads.
•
•
•
•
•

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 56

GUARANTEED HIGH SPEED . . . 25 ns MAX
GUARANTEED DELAY MATCHING ON BOTH OUTPUTS
COMPLEMENTARY TTL COMPATIBLE OUTPUTS
HIGH SENSITIVITY
USES STANDARD SUPPLY VOLTAGES
OP2

IP2

ABSOLUTE MAXIMUM RATINGS
Positive Supply Voltage
Negative Supply Voltage
Peak Output Current
Differential Input Voltage
Input Voltage
Internal Power Dissipation (Note 1)
Metal Can
DIP
Operating Temperature Range
Military (760)
Commercial (760C)
Storage Temperature Range
Metal Can and DIP

+8 V
-8 V
10mA
±5 V

v-

V+~VIN~V_

500mW
670mW
-55°C to 125°C
O°C to 70°C

ORDER INFORMATION
TYPE
760
760C

PART NO.
760HM
760HC

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

EQUIVALENT CIRCUIT

OUTPUT 1

INPUT 1

INPUT 2

0---+_....1

L . - - - - - - - o OUTPUT 2

ORDER INFORMATION
RS
350Sl

Re

1000

R13
4kSl

TYPE
760
760C

Notes on following page.

4-24

PART NO.
760DM
760DC

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A760
760
ELECTRICAL CHARACTERISTICS (VS

= ±4.5V to ±6.5V, T A = -55°C to +125°C, T A = 25°C for typical figures unless otherwise specified.)

PARAMETER

TYP.

MAX.

1.0

6.0

mV

I nput Offset Current

0.5

7.5

p.A

Input Bias Current

8.0

60

p.A

Input Offset Voltage

Output Resistance (either output)

Response Time

TEST CONDITIONS

MIN.

RS~200n

VOUT = VOH

100

Note 2, T A = 25°C

18

Note 3, T A = 25°C

n
30

ns

25

ns

16

Note 4

UNITS

ns

Response Time Difference between
Outputs
(tpd of +VIN1) - (tpd of - VIN2)

Note 2, T A = 25°C

5.0

ns

(tpd of +VIN2) - (tpd of - VIN1)

Note 2, T A = 25°C

5.0

ns

(tpd of +VIN1) - (tpd of +VIN2)

Note 2, T A = 25°C

7.5

ns

(tpd of -VIN1) - (tpd of -VIN2)

Note 2, T A = 25°C

7.5

ns

Input Resistance

f = 1 MHz

12

kn

Input Capacitance

f = 1 MHz

8.0

pF

Average Temperature Coefficient

RS = 50n, T A = -55°C to T A = +125°C

3.0

p.vtc

TA = 25°C to TA = +125°C

2.0

nAtC

of Input Offset Voltage
Average Temperature Coefficient
of Input Offset Current
Input Voltage Range

T A = 25° C to T A = -55° C
±4.0

Vs = ±6.5V

Differential Input Voltage Range

7.0

nAtC

±4.5

V

±5.0

V

o ~ lOUT ~ 5.0 mA
Output HIGH Voltage (either output)

Vs = ±5.0V

2.4

3.2

V

lOUT = 80 p.A, Vs = ±4.5V

2.4

3.0

V

Output LOW Voltage (either output)

ISINK = 3.2 mA

0.25

0.4

V

Positive Supply Current

Vs = ±6.5V

18

32

mA

Negative Supply Current

Vs = ±6.5V

9.0

16

mA

4-25

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p,A760
760C
ELECTRICAL CHARACTERISTICS (VS = ±4.5V to ±6.5V, T A = O°C to +70°C, T A = 25°C for typical figures unless otherwise specified.)
TYP.

MAX.

1.0

6.0

rnV

Input Offset Current

0.5

7.5

IlA

Input Bias Current

8.0

60

IlA

PARAMETER
Input Offset Voltage

Output Resistance (either output)

Response Time

TEST CONDITIONS

MIN.

RS~200n

VOUT= VOH

100

Note 2, T A = 25°C

18

Note 3, T A = 25°C
Note 4

UNITS

0
30

ns

25

ns
ns

16

Response Time Difference between
Outputs
(tpd of +VIN1) - (tpd of - VIN2)

Note 2, T A = 25°C

5.0

ns

(tpd of +VIN2) - (tpd of - VIN1)

Note 2, T A = 25°C

5.0

ns

(tpd of +VIN1) - (tpd of +VIN2)

Note 2, T A = 25°C

10

ns

(tpd of -VIN1) - (tpd of -VIN2)

Note 2, T A = 25°C

10

ns

I nput Resistance

f = 1 MHz

12

kn

I nput Capacitance

f = 1 MHz

8.0

pF

Average Temperature Coefficient

RS = 500,T A = O°C to T A = +70°C

3.0

IlVrc

TA = 25°C to TA = +70°C

5.0

nA/oC

T A = 25° C to T A = 0° C

10

nA/oC

±4.5

V

±5.0

V

of Input Offset Voltage
Average Temperature Coefficient
of Input Offset Current
Input Voltage Range

±4.0

Vs = ±6.5V

Differential Input Voltage Range

o ~ lOUT ~ 5.0 rnA
Output HIGH Voltage (either output)

Vs = ±5.0V

2.4

3.2

V

lOUT = 80 IlA, Vs = ±4.5V

2.5

3.0

V

Output LOW Voltage (either output)

ISINK = 3.2 rnA

0.25

0.4

V

Positive Supply Current

Vs = ±6.5V

18

34

rnA

Negative Supply Current

Vs = ±6.5V

9.0

16

rnA

NOTES
1.
2.
3.
4.

Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/o C for Metal Can and 8.3 mW/o C
for the DIP.
Response time measured from the 50% point of a 30 mVp-p 10 MHz sinusoidal input to the 50% point of the output.
Response time measured from the 50% point of a 2 Vp-p 10 MHz sinusoidal input to the 50% point of the output.
Response time measured from the start of a 100 mV input step with 5 mV overdrive to the time when the output crosses the logic
threshold.

4-26

FAIRCHILD LINEAR INTEGR·ATED CIRCUITS. p.A760
TYPICAL PERFORMANCE CURVES FOR 760 AND 760C
RESPONSE TIME .fOR
VARIOUS INPUT OVERDRIVES

RESPONSE TIME FOR
VARIOUS INPUT OVERDRIVES

RESPONSE TIME AS A
FUNCTION OF INPUT VOL TAG!
40

Vs= ±5V
TA = 25'C

>

20 mv....,

1
10mV-1
1

~

~

1-5~V

I-2m~

!;

1

~OmV

I

"~

0

I::l

o

I

I

30

1f5mV
10mV/

0

~

~

tpd+

~

-

1"'--10-

r-....

20

.;, 100

50

I

~ ~21V

~

E

~

2

~.

>

o
>

3

i!

w 100

"~

~

5>

±5~

V! =
10 MHz SINE WAVE INPUTS
TA = 25'C

Vs ='±5V
TA = 25'C

4

I

tpd_

I

50

>

10

15

20

25

30

35

"Z

10
10

TIME - ns

RESPONSE TIME AS A
FUNCTION OF INPUT VOLTAGE
30
vsl=

15

20

25

30

35

±~VI

I

I

12

10

2

INPUT VOLTAGE - mV peak·to-peak

TIME-ns

VOLTAGE TRANSFER
CHARACTERISTIC

VOLTAGE TRANSFER
CHARACTERISTIC

Vs = ±5V

I

I

10 MHz SINE WAVE INPUTS
TA = 25'C

Vs = ±6.5V
••••••• ,j, ......

~

20

:;;

;::
w

! 4~~--~~--~~--~-~1~

" , r--....
.......... ....

tpd+

.....

~

~

r---t---~-+--hf--t---t Vs = ±5.0V

~ 3~~--~~--~fj~~~.~.. ~·~=·;=~t~~.=~~~.

tpd

~

it:···" ............

~ 2r---t---r--+--~ft~.~/r--+--r-~
,.

~ 10

o

I

/1/
o
10

20

100

200

1000 2000

INPUT VOLTAG - mV peak·to-peak

INPUT VOLTAGE - mV

INPUT VOLTAGE - mV

VOLTAGE GAIN AS A
FUNCTION OF
SUPPL Y VOLTAGE

VOLTAGE GAIN ASA
FUNCTION OF AMBIENT
TEMPERATURE

INPUT BIAS CURRENT AS A
FUNCTION OF AMBIENT
TEMPERATURE
12

9.000
4.000

/~

r- r.....

7.000

S.ooo
5.000

/'

4.000
3.000
2.000

/

,,/

""

V

V

"

"-

'- .........
......... ~

-..

.......... ~

,

2.000
±5.0

±5.5

±6.5

±6.0

-so

o
20

-20

-SO

20

~ ±4~5V Tb ±S.~V

I

0.2

15

-

-

T

r--

J

-

~

T
....... r-...

140

V~ = ±~V

---- ----

-::;;;:: r-- _tpd+

100

OUTPUT VOLTAGE LEVELS
AS A FUNCTION OF
AMBIENT TEMPERATURE

."

'\

.......... r-.....

60

20

TEMPERATURE - 'C

25

"

-20

V =
VIN = 30 mVp·p f = 10 MHz

"- r\

0.4

140

RESPONSE TIME AS A
FUNCTION OF
.AMBIENT TEMPERATURE

Vs = ±6.5V

0.6

100

SO

TEMPERATURE _ 'C

30

\

I,

~

/

INPUT OFFSET CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

0.8

"

'\.

SUPPLY VOLTAGE-V

1.0

10

3.000

o
±4.5

Vs = ±S.5V

Vs = ±5V

TA =125,C

8.000

OH

-r-

tPd

1

~/crHIt

Il ou;=5.dmA

~SHOLO~

~ ....

10
VOL ISINK = 3.2 mA

o

-60

-20

20

60

TEMPERATURE _ 'c

100

140

-60

-20

20

so

100

AMBIENT TEMPERATURE - 'c

4-27

140

o
-60

-20
20
60
100
AMBIENT TEMPERATURE _ 'c

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA760
TYPICAL PERFORMANCE CURVES FOR 760 AND 760C (Cont'd)

RISE TIME AS A FUNCTION
OF CAPACITIVE LOAD
30

30

J!

±Isv
s
TA = 2SOC-

VS=±SVCf
TA = 2SOC
2S

/

20

20

/

---

10

1

V

I

10

'-

o
50

V~

100

200

--

..-1--1--

7

<:
./

CAPACITIVE LOAD - pF

./

V
l/

"..-

200

~

>
I

i

1

2~~~~~~~~~~~~
O~~~~~~~~~~~~

z

~

o

~ -2~~~~~~~~~~~~

r-.....

8
18

2

........

o

o

-

gw

"'- .........
100

18

-

:;;

.....

5
10
50
CAPACITIVE LOAD - pF

1

I

= ±6 SV
TA = 2SOC-

14

IS

I

10

16

~

J

/

15

o

25

COMMON MODE RANGE AS
A FUNCTION OF
SUPPL Y VOLTAGE

INPUT BIAS CURRENT AS A
FUNCTION OF 01 FFERENTIAL
INPUT VOLTAGE

FALL TIME AS A FUNCTION
OF CAPACITIVE LOAD

10

20

30

SO

40

60

--

70

I--

80

90

-~4~.5-'--~±51-:-.0-'--~±51-:-.5-'--....J±61-:-.0-'--...J±6.5

100

SUPPLY VOLTAGE-V

DIFFERENTIAL INPUT VOLTAGE - mV

APPLICATIONS
Pin numbers shown are only for Metal Can,

LEVEL DETECTOR WITH HYSTERESIS

FAST POSITIVE PEAK DETECTOR
FDSSS

100kn

JL

OUTPUTJ:

r-'''''''. . . . .~~

--II--ns
50

~~---..-OUTPUT

I
a

HIGH SPEED 3-BIT AID CONVERTER

ZERO CROSSING DETECTOR

MSB

I

5kn
FD6SS
INPUT

0-__--""4

........,;~--nlH---H

__---I~ .......;.....---OUTPUT
~~_-OUTPUT

50n

lOon

Total delay = 30 ns
Input frequency = 300 Hz to 3 MHz
Minimum input voltage = 20 mVp-p

loon

LINE RECEIVER WITH HIGH COMMON MODE RANGE

loon

OUTPUT

INPUT--'\NI....-----_........!

OUTPUT

lOon

RS
Common mode range = ±4 x 50 V
lOon

RS
Differential Input sensitivity = 5 x 50 mV
P1 must be adjusted for optimum common mode rejection.
son

For RS = 200n
Common mode range
Sensitivity = 20 mV

= ±16V

350n
+5V

4-28

Input voltage range: 3.5V
Typical conversion speed: 30 ns

111-311
VOLTAGE COMPARATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 111 and 311 are monolithic, low input current Voltage Comparators,
each constructed using the Fairchild Planar* epitaxial process. The 111 series operates from the single
5 V supply used for integrated circuit logic to the standard ±15 V operational amplifier supplies. The
111 series is intended for a wide range of applications including driving lamps or relays and switching
voltages up to 50 V at currents as high as 50 rnA. The output stage is compatible with RTL, DTL,
TTL and MOS logic. The input stage current can be raised to increase input slew rate.

•
•
•
•
•
•

LOW INPUT BIAS CURRENT ... 60 nA
LOW INPUT OFFSET CURRENT ... 4 nA
DIFFERENTIAL INPUT VOLTAGE •.• ±30 V
POWER SUPPLY VOLTAGE SINGLE 5.0 V SUPPLY TO ±15 V
OFFSET VOLTAGE NULL CAPABILITY
STROBE CAPABILITY

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58
v+

NON·INVERTING
INPUT

ABSOLUTE MAXIMUM RATINGS
Voltage Between V + and V_Terminals
Output to V _ (111)
(311)
Ground to V_
Differential Input Voltage
Input Voltage (Note 1)
Internal Power Dissipation (Note 2)
Output Short Circuit Duration
Storage Temperature Range
Operating Temperature Range
Military (111)
Commercial (311)

BALANCE!
STROBE

2

ORDER INFORMATION
TYPE
PART NO.
111
LM111H
311
LM311H

36V
50V
40 V
30V
±30 V
±15 V
500mW
10 seconds
_65° C to +150° C

TRUTH TABLE

+
+

-55°C to +125°C
O°C to +70°C

STROBE

OUTPUT

H

H

L

L

H

L

L

L

EQUIVALENT CIRCUIT
~:~~~~E/o-"-

_ _ _-+_ _ _ _ _ _ _,,,
~-~-~~-~~-r---'---'------~--"----------~~---oV+

1--1--..-0 OUTPUT

L...--.._------......_---_...-__........____........__......

.....
L...------_O

_~-_+---

_Ov-

R13

4kn

GROUND

* Planar is a patented Fairchild process.

Notes on fol/owing pages.

4-29

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 111 • 311
111

ELECTRICAL CHARACTERISTICS (VS
PARAMETER

= ±15 V, T A = -55°C to +125°C unless otherwise specified)
MIN.

CONDITIONS

Note 3
TYP.

MAX.

UNITS

Input Offset Voltage (Note 4)

T A = 25°C, RS:E;; 50 kn

0.7

3.0

rnV

Input Offset Current (Note 4)

TA = 25°C

4.0

10

nA

100

nA

Input Bias Current

TA = 25°C

60

Voltage Gain

TA = 25°C

200

V/mV

Response Time (Note 5)

TA = 25°C

200

ns

Saturation Voltage

VIN :E;; -5 rnV, lOUT = 50 mA
TA = 25°C

0.75

Strobe On Current

TA = 25°C

3.0

Output Leakage Current

VIN ;;;;. 5 mV, VOUT = 35 V
0.2

TA = 25°C
Input Offset Voltage (Note 4)

RS:E;; 50 k!l

I nput Offset Current (Note 4)
Input Bias Current

V
rnA

10

nA

4.0

mV

20

nA

150

nA

±14

Input Voltage Range
Saturation Voltage

1.5

V

v+ ;;;;. 4.5 V, V- = 0
VIN :E;; -6 mV, ISINK :E;; 8 mA

Output Leakage Current

V IN;;;;' 5 mV, VOUT = 35 V

Positive Supply Current

TA = 25°C

Negative Supply Current

TA = 25°C

0.23

0.4

V

0.1

0.5

p,A

5.1

6.0

mA

4.1

5.0

rnA

311
ELECTRICAL CHARACTERISTICS (VS = ±15 V, TA = O°C to 70°C unless otherwise specified) Note 3
PARAMETER

MIN.

CONDITIONS

TYP.

MAX.

UNITS

Input Offset Voltage (Note 4)

TA = 25°C, RS:E;; 50 kn

2.0

7.5

rnV

Input Offset Current (Note 4)

TA = 25°C

6.0

50

nA

250

nA

Input Bias Current

TA = 25°C

100

Voltage Gain

TA = 25°C

200

V/rnV

Response Time (Note 5)

TA = 25°C

200

ns

Saturation Voltage

VIN :E;; -10 rnV, lOUT = 50 rnA
TA = 25°C

0.75

Strobe On Current

TA = 25°C

3.0

Output Leakage Current

VIN;;;;' 10 rnV, VOUT = 35 V
0.2

TA = 25°C
Input Offset Voltage (Note 4)

RS:E;; 50 kn

Input Offset Current (Note 4)
Input Bias Current
Input Voltage Range

1.5

V
rnA

50

n"A

10

mV

70

nA

300

nA

±14

V

Saturation Voltage

V+ ;;;;. 4.5 V, V- = 0
0.23

0.4

Positive Supply Current

TA = 25°C

5.1

7.5

rnA

Negative Supply Current

TA = 25°C

4.1

5.0

rnA

VIN:E;; -10 mV, ISINK:E;; 8 mA

V

NOTES:
1. This rating applies for ±15 V supplies. The positive input voltage limit is 30 V above the negative supply. The negative input voltage limit is
equal to the negative supply voltage or 30 V below the positive supply, whichever is less.
2. Rating applies to ambient temperatures up to 70° C. Above 70° C ambient derate linearly at 6.3 mW/ ° C.
3. The offset voltage, offset current and bias current specifications apply for any supply voltage from a single 5 V supply up to ± 15 V suppl ies.
4. The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a
1 rnA load. Thus, these parameters define an error band and take into account the worst case effects of voltage gain and input impedance.
5. The response time specified (see definitions) is for a 100 mV input step with 5 mV overdrive.

4-30

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 111 • 311
TYPICAL PERFORMANCE CURVES FOR 111

'" .....

.......

I

I

I

1

30

v~=±lL -

i'...

v~=±lL

~AISE6
.......

20

1'-0..

200

~

""'" "\:

"'

........

-..

~

,RAISED

I""'-J
..... 1-..

1

"""

NORMAL

1"-'-

o
65

85

105 125

-55 -35 -15

. TEMPERATURE _ °c

25

45

65

85

-

I-

Z

,.."."
1=

===
=

-'

;;

--

:;

fil

VSI= ±115

10~

~

I
,-NciRMAL

_R1FERIED Tb
SUPPLY VOLTAGES

100

.... -1-

-1

.1,

-~ ~

80

~~

60

.4

'~"
"""~
~

.....

l-- I-- ~

40
.2

V-

a
-12

-8

-4

12

16

-15

.......- . - -.......---.-..,...........- . - - . -.....
1
A = 125°C
7":

I-+--+---+--+-t-+
0.7

~

0.5

~

0.4

o

~

~

0.3
0.2
0.1

30

45

65

0

85

105 125

.......

0.5

1.0

DIFFERENTIAL INPUT VOLTAGE - mV

LEAKAGE CURRENTS

F==

V S=+15V

10-8

./

I

I

1/

1

1

I

POSITIVE SUPPLY-

.......... ...... ~PUTtW

"+-.......

....

:'\..

-0.5

OUT~UT VOUT; ~

,

A

A

1

~

£~;"'TA=250C-I-+--+-~+-I

1

./

10-9

INPUT VIN = 15

I POSI~::t;t:.~ .... """0;;;;;;;
I
I

, " " ....

~

NEGATIVE SUPPLY-

/'

10- 10

I

OUTrUTrH

jL~,.,;.'t-+--+--+--+--l'--+--+--+--I

10- 11

o
-55
OUTPUT CURRENT - mA

r\.
I '\

J

-1.0

r T
VS= ±15V_

I--+--+-+--+----f-+-.~./..,.F~---f~
".,'-V

/'./'"

1\
'\

f-'-~MITTER

SUPPLY CURRENT
10

- f - T A = -55°C"I.r>:---:''''",'"'''
";:;,*,V--II---I--+---f

II

.......
20

",:,;;,,;

.'
/.

;::

~

25

TA = 25°C

I
I

TEMPERATURE _ °c

OUTPUT SATURATION VOLTAGE

0.6

I

40

o

-55 -35

DIFFERENTIAL INPUT VOLTAGE - V

~..,....

....:::J
....:::J

~s=~V-

{

FOLLOWER
10 r-0UTPUT
RL = 600

20

-16

0

>

I

OUTP~T

f- V ++=50V

>
-1 .0

10M

RL = lk

50

-0.5

120

111TI~

n

TRANSFER FUNCTION
60

V+

T A =25°C

1M

lOOk

INPUT RESISTANCE -

140

~

,11111 T

O. 1

105 125

COMMON MODE LIMITS

INPUT CHARACTERISTICS

0.8

~~

TEMPERATURE _ °c

180
160

TV

0,

o
45

I

10

V>

1
25

.....
~

MA:~II

....

.........

NORMAL

-15

=T. = 25°C

E

'"..:

10

-55 -35

>

!:i

\.

......

100

100

I

.......

300

OFFSET ERROR

INPUT OFFSET CURRENT

INPUT BIAS CURRENT
400

-35

-15

25

45

65

TEMPERATURE _ °c

4·31

85

105 125

...- ......

25

45

65

1

1

I

85

105

125

TEMPERATURE _ °c

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 111 • 311
TYPICAL PERFORMANCE CURVES FOR 311

INPUT OFFSET CURRENT

INPUT BIAS CURRENT

- ---

500

400

20

IRA~

300

--

r----...

--

200

NORMAL

100

--

.....................
RAISEO

10

OFFSET ERROR

VS=~15V_

r-......

Vs ='±15 V

~

100

~T~=25·C

>

E
I

1---

~

1---

w

~

1---

~
I-

'"o

10

i

NORMAL

V TIT

~ :::1---

r- TYPICAL

Z

~

..J

I

~

~

,mo t7m
Vos

Sl
W

20

~

ro

~

ro

00

o

o

10

20

TEMPERATURE _·C

30

ro

40

00

1
10k

70

lOOk

INPUT CHARACTERISTICS

COMMON MODE LIMITS
V+

'VsL±15J_
T A =25·C

200

1M

TRANSFER FUNCTION
60

_REF~RREO'TO

SUPPLY VOLTAGES

ro

-0 .5

-VS~30V

~oRM1L OU~PUT-

_ TA = 25·C

175

RL = lk

lro

.....

100

- ....

1.!.:=..

""":=..

.4

.2
25

-12

-S

-4

12

10

-T~=2~·C
V

I

-EMITTER
FOLLOWER
20 -OUTPUT
RL =600n

20

30

~

50

60

70

\
I

./

0.4

V

= V S -±15V

POSITIVE SUPPLY
OUTPUT LOW

I-t--

o

"

p~

OUTPUT VOUT = 40 V

20

~

40

OUTPUT CURRENT - rnA

ro

o

10

20

~

40

50

60

70

TEMPERATURE _·C

35

........r

-

I

w- 1 ,~
25

.,...,

INPUT VIN = j5 V

1 __

OUTPr HIGI

10

-

./

NEGATIVE SUPPLY

!L
o

1.0

LEAKAGE CURRENTS

=

-----

1/

0.2

0.5

w-B

!-...-

/

0.3

'\..

DIFFERENTIAL INPUT VOLTAGE - mV

./

./

"

-0.5

./

0.5

\.

J

-1.0

SUPPLY CURRENT

./

I

" i\..

10

I-- vsl= ±15)

0.6

~

0

10

0.7

o

30

~

TEMPERATURE _·C

OUTPUT SATURATION VOLTAGE

0.1

C!l
«
!:i

-

(

o

16

DIFFERENTIAL INPUT VOLTAGE - mV

O.S

40

5

--

50

o

I

w

75

-16

V++=40V

>

1.0

125

10M

INPUT RESISTANCE - n

TEMPERATURE _·C

225

/v

I-

S

o
o

UM

45

-

I
55

65

TEMPERATURE _·C

TYPICAL APPLICATIONS
OFFSET NULL CIRCUIT

STROBE CIRCUIT

INCREASING INPUT
STAGE CURRENT *

3k!1

OFFSET BALANCING

STROBING

-=

lN914
DIODES

* I ncreases typical common
mode slew rate from 7.0 V /J.ls
to 18 V /J.ls

4-32

75

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 111 • 311
TYPICAL APPLICATIONS (Cont'd)
ADJUSTABLE LOW VOLTAGE
REFERENCE SUPPLY

ZERO CROSSING DETECTOR
DRIVING MOS LOGIC

POSITIVE PEAK DETECTOR

v+=sv
TO

>-......_OMOS
LOGIC

*Solid tantalum

*Solid tantalum

STROBING OF BOTH INPUT
AND OUTPUT STAGES

DIGITAL
TRANSMISSION ISOLATOR

NEGATIVE PEAK DETECTOR

TTL
STROBE

+15V

S.2k

5.1k

FROM
TTL
GATE

*Typical input current is 50 pA

*Solid tantalum

with inputs strobed off.

PRECISION PH010DIODE COMPARATOR

RELAY DRIVER WITH STROBE

SWITCHING POWER AMPLIFIER

+5 V

Rl 3.9 k

INPUT
Rl
10
k

-=-

* R2 sets the comparison level.
At comparison, the photodiode has
less than 5 mV across it, decreasing
leakages by an order of magnitude.

C1

TTLSTROBE

0.1 pF

* Absorbs inductive kickback of relay
and protects I C from severe voltage
transients on V++ line~

SWITCHING POWER AMPLIFIER

J

Rl

"'v+

02~
2N6125

O

I
2NS125

R12
620

620

r-'
3

R2
620

OUTPUT

l

~r'
. 4

04

03

R3
620

I'"

R4
300k
R5
510

-r

I

6

~~
111

I

I

RS
39k

1

Rll
620

M
7

6.

3

S....-:

~11'~
RIO
620

'1'
4

R13
300k
R9
39k

J:C 1
TO.22I'F

4-33

R14
510
RS 15k

R7 15k

--

REFERENCE

..... INPUT

•

GLOSSARY
COMPARATORS

Average Temperature Coefficient of Input Offset Current The change in input offset current over the operating
temperature range divided by the operating temperature range.

Output Fall Time - The time taken for the output voltage to
fall from 90% to 10% of its value with a step-function applied
at the input.

Average Temperature Coefficient of Input Offset Voltage The change in input offset voltage. over the operating
temperature range divided by the operating temperature range.

Output Resistance - The resistance seen looking in to the
output with the dc output level at the logic threshold.
Output Rise Time - The time taken for the output voltage to
rise from 10% to 90% of its value with a step-function at the
input.

Common Mode Rejection Ratio - The ratio of the change of
input offset voltage to the change in common mode voltage
producing it.

Output Sink Current - The maximum negative current that
can be del ivered by the comparator.

Differential Input Voltage Range - The range of voltage
applied between the input terminals for which operation
within specifications is assured.

Positive Output Voltage Level - The dc output voltage in the
positive direction with the input voltage equal to, or greater
than, a minimum specified value.

Input Bias Current - The average of the two input currents
with no signal applied.

Response Time - The interval between the application of an
input step function and the time when the output voltage
crosses the logic threshold level.

Input Capacitance - The capacitance seen looking into either
input terminal with the other grounded.

Strobed Output Level - The dc output voltage, independent
of input voltage, with the voltage on the strobe terminal in
exces~ of the strobe activation voltage.

Input Common Mode Voltage Range - The range of common
mode input voltage over which the device will operate within
specifications.
Input Offset Current - The difference between the two input
currents with the output at the logic threshold voltage.

Strobe Activation Voltage - The voltage applied to the strobe
terminal beyond which the device does not respond to the
conditions at the input terminals.

Input Offset Voltage - That voltage which must be applied to
the input terminals to give the logic threshold voltage at the
output.

Strobe Current - The maximum current taken by the strobe
terminal during activation.
Strobe Input Resistance - The resistance between the strobe
terminal and ground.

Input Resistance - The resistance seen looking into either
input terminal with the other grounded.
Input Voltage Range - The range of voltage on either input
terminal over which the device will operate as specified.

Strobe Release Time - The time required for the output to
rise to the logic threshold voltage after the strobe terminal has
been activated.

Logic Threshold Voltage - The output voltage at which the
logic circuitry being driven changes state. It has two values,
positive and negative.

Supply Voltage Rejection Ratio - The ratio of the change in
input offset voltage to the change in supply voltage
producing it.

Negative Output Voltage Level - The dc output voltage in the
negative direction with the input voltage equal to, or greater
than, a minimum specified value.

Voltage Gain - The ratio of the change in output voltage to
the change in voltage between the input terminals producing it
with the dc output in the vicinity of the logic threshold.
4-34

INDEX
Selection Guide .................. ........................... 5-4
DATA SHEETS
Adjustable Positive
~A723
Precision Voltage Regulator ..................... 5-7
105
Voltage Regulator ............................. 5-30
305
Voltage Regulator ............................. 5-30
305A
Voltage Regulator ............................. 5-30
376
Voltage Regulator ............................. 5-30
Fixed Positive
~A7805
Three-Terminal Positive Voltage Regulator ......
~A7806
Three-Terminal Positive Voltage Regulator ......
~A7808
Three-Terminal Positive Voltage Regulator ......
~A7812
Three-Terminal Positive Voltage Regulator ......
~A7815
Three-Terminal Positive Voltage Regulator ......
~A7818
Three-Terminal Positive Voltage Regulator ......
~A7824
Three-Terminal Positive Voltage Regulator ......
~A78MOO
Three-Terminal Positive Voltage Regulators .....
109
Five Volt Regulator ............................
209
Five Volt Regulator ............................
309
Five Volt Regulator ............................

5-14
5-14
5-14
5-14
5-14
5-14
5-14
5-45
5-36
5-36
5-40

Adjustable Negative
~A723
Precision Voltage Regulator ..................... 5-7
104
Negative Voltage Regulator ................ ; .. 5-25
304
Negative Voltage Regulator ................... 5-25
Fixed Negative
~A78NOO
Three-Terminal Negative Voltage Regulators .... 5-51
Fixed Positive and Negative
~A78TOO
Tracking Voltage Regulators ................... 5-44
Precision Voltage Reference
fJA728
Precision Voltage Reference ................... 5-44
Products to be Announced ................................. 5-43
Glossary .................................................. . 5-52

5-2

INTRODUCTION
Fairchild Semiconductor produces the most
comprehensive line of monolithic voltage regulators
available. This line includes fixed output, three-terminal
regulators for a range of output voltages from 5.0 V to
30 V. Both positive and negative three-terminal voltage
regulators are available, with rated output currents
from 500 rnA to 3.0 A.
For requirements not covered by the fixed output devices Fairchild offers a line of flexible precision
regulators for all applications, including positive, negative, tracking, and switching.
The breath of the product line, the built-in overload protection in every device, the precision, and the
flexibility make Fairchild the place to go for volume
deliveries of economical, easy to use, reliable voltage
regulators.

6-3

SELECTION GUIDE FOR COMMERCIAL VOLTAGE REGULATORS (4)

FIXED POSITIVE
JJ,A7800 SERIES
JJ,A7805 JJ,A7806 JJ,A7808 JJ,A7812 JJ,A7815 JJ,A7818 JJ,A7824

209

309

Min. (V)

7.0

8.0

10

14

17

20

26

7.0

Max. (V)

35

35

35

35

35

35

40

35

35

Output Voltage

Min. (V)

4.8

5.75

7.7

11.5

14.4

17.3

23

4.7

4.8

5.2

6.25

8.3

12.5

15.6

18.7

25

5.3

5.2

Output Current

Max. (mA)

1000

1000

1000

1000

1000

1000

1000

1000

1000

Peak (mA)

2200

2200

2200

2200

Input Voltage Range

Max. (V)

7.0

2100

2100

2100

2200

2200

Line Regulation

Max. (%) Notes 1, 2

2.0

2.0

2.0

2.0

2.0

2.0

2.0

1.0

2.0

load Regulation

Max. (%) Notes 1, 2

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

Quiescent Current

Max. (mA) Note 2

8.0

8.0

8.0

8.0

8.0

8.0

8.0

10

62

59

56

55

54

53

50

Ripple Rejection
Dropout Voltage
Output Voltage Drift

Min. (dB) f

= 120 Hz, Notes 2,3
lOUT = IMax.

Typ. (V)
Typ. (mV/oC)

-

10

-

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

-1.1

-0.8

-0.8

-1.0

-1.0

-1.0

-1.5

-0.75

-0.8

X
X
X

X

X

X

X

X

Max. (%;oC)

OPERATIONAL AMPLIFIERS
TTL SYSTEMS
MOS SYSTEMS

CMOS

X

X

X
X

X
X

ECl SYSTEMS

X

CONSUMER

X

X

SELECTION GUIDE FOR MILITARY VOLTAGE REGULATORS (4)

FIXED POSITIVE
JJ,A7800 SERIES
JJ,A7805
Input Voltage Range
Output Voltage

JJ,A7808

JJ,A7812

JJ,A7815

JJ,A7818

JJ,A7824

109

Min. (V)

7.0

8.0

10

14

17

20

26

Max. (V)

35

35

35

35

35

35

40

35

Min. (V)

4.8

5.75

7.7

11.5

14.4

17.3

23

4.7

Max. (V)
Output Current

JJ,A7806

7.0

5.2

6.25

8.3

12.5

15.6

18.7

25

5.3

Max. (rnA)

1000

1000

1000

1000

1000

1000

1000

1000

Peak (rnA)

2200

2200

2200

2200

2200

2100

2100

2100

Line Regulation

Max. (%) Notes 1, 2

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

load Regulation

Max. (%) Notes 1,2

1.0

1.0

1.0

1.0

1.0

1.0

1.0

2.0

Quiescent Current

Max. (nA) Note 2

6.0

6.0

6.0

6.0

6.0

6.0

6.0

Ripple Rejection

Min. (dB) f

68

65

62

61

60

59

56

DropoutVoltage

Typ. (V)
Typ. (mV/oC)

Output Voltage Drift

= 100 Hz, Note 2
lOUT = IMax.

10

-

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

-1.1

-0.8

-0.8

-1.0

-1.0

-1.0

-1.5

-0.75

X
X
X

X

X

X

X

X

Max. (%rC)

OPERATIONAL AMPLIFIERS
TTL SYSTEMS
MOS SYSTEMS

CMOS

X
X
X

EClSYSTEMS

NOTES:
1.
2.
3.
4.

% VOUT
Typical for 78MXX and 78NXX Series
Typical for 723
The 7800 is available in TO-3 and TO-220 (Commercial Grade only). 109 and 78NOO are available in TO-3
The 723, 78MOO Series, 104, 105 are available in TO-5 type package
The 376 is available in 8-Lead mini-DIP

5-4

ADJUSTABLE
POSITIVE

FIXED POSITIVE
J,LA78MOO SERIES

LtA78M05 J,LA78M06 J,LA78M08 J,LA78M12 J,LA78M15 J,LA78M20 J,LA78M24 J,LA723 305

FIXED
NEGATIVE

ADJUSTABLE
NEGATIVE

305A 376

J,LA723

304

-40

7.0

8.0

10

14

17

22

26

9.5

8.0

8.5

9.0

30

30

30

35

35

40

40

40

40

50

40

4.8

5.75

7.7

11.5

14.4

19.0

23

2.0

4.5

4.5

5.0

-37

J,LA78N02 J,LA78N04 J,LA78N05

-40

-4.5

-6.5

-9.5 -8.0

-15

-15

-7.5
-15

-30

-1.8

--3.8

-5.1

5.2

6.25

8.3

12.5

15.6

21.0

25

37

30

40

37

-2.0

0

-2.2

-4.2

-5.3

500

500

500

500

500

500

500

150

20

45

25

150

20

2500

2500

2500

750

750

750

750

700

700

700

-

-

-

-

-

-

3000

3000

3000

1.0

1.0

1.0

1.0

1.0

1.0

1.0

0.1

0.06

0.06

0.03

0.1

0.1

1.0

1.0

0.5

1.0

1.0

1.0

1.0

1.0

1.0

1.0

0.6

0.05

0.2

0.2

0.6

0.02

1.0

1.0

0.4

4.2

4.3

4.3

4.3

4.4

4.5

4.6

4.0

2.0

2.0

2.5

4.0

5.0

10

10

10

78

75

72

71

70

69

66

74

60

-

-

74

60

60

60

60

2.0

2.0

2.0

2.0

2.0

2.0

2.0

3.0

3.0

3.0

3.0

3.0

2.0

-

-

-

-

-

-

0.015

X

X

X

X

X

X

X

X
CMOS

X

X
X

X

1.0

-

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

1.0

X

J,LA78M06

J,LA78M08

J,LA78M12

J,LA78M20

2.0
0.~5

1.0
X

X

X

ADJUSTABLE
POSITIVE
J,LA78M15

2.0
0.5

X

X

X

FIXED POSITIVE
J,LA78MOO SERIES
J,LA78M05

0.015

2.0
0.5

J,LA78M24

•

ADJUSTABLE
NEGATIVE

J,LA723

105

J,LA723

104

7.0

8.0

10

14

17

22

26

9.5

8.0

-9.5

-50

30

30

30

35

35

40

40

40

50

-40

-8.0

4.8

5.75

7.7

11.5

14.4

19.0

23

2.0

4.5

6.25

8.3

12.5

15.6

21.0

25

37

40

-37
-2.0

-40

5.2
500

500

500

500

500

500

500

150

20

150

20

750

750

750

750

700

700

700

-

1.0

1.0

1.0

1.0

1.0

1.0

1.0

0.1

0.06

0.1

1.0

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.6

0.05

0.6

0.02

4.2

4.3

4.3

4.3

4.4

4.5

4.6

3.5

2.0

3.5

5.0

78

75

72

71

70

69

66

74

60

74

60

2.0

2.0

2.0

2.0

2.0

2.0

2.0

3.0

3.0

3.0

2.0

-

-

-

-

-

-

0.015

1.0

0.015

1.0

X

X

X

X

X

X

-

X

X
CMOS

X

X

5. Thermal resistance of the package without a heat sink.
Junction to Case
TO·3
TO-220
TO-5

4°C/W
2°C/W
20°C/W

Junction to Ambient
35°C/W
0
50 C/W
150°C/W

5-5

0

-

-

X

X

X

X

X

X

X

X

X

X

X

uA723

PRECISION VOLTAGE REGULATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL' DESCRIPTION - The J.lA723 is a monolithic Voltage Regulator constructed using the
Fairchild Planar* epitaxial process. The device consists 'of a temperature compensated reference
amplifier, error amplifier, power series pass transistor and current limit circuitry. Additional NPN or
PNP pass elements may be used when output currents exceeding 150 mA are required. Provisions are
made for adjustable current limiting and remote shutdown. In addition to the above, the device
features low standby current drain, low temperature drift and high ripple rejection. The J.lA 723 is
intended for use with positive or negative supplies as a series, shunt, switching or floating regulator.
Applications include laboratory power supplies, isolation regulators for low level data amplifiers, logic
card regulators, small instrument power supplies, airborne systems and other power supplies for digital
and linear circuits.

•
•
•
•
•

POSITIVE OR NEGATIVE SUPPLY OPERATION
SERIES, SHUNT, SWITCHING OR FLOATING OPERATION
.01% LINE AND LOAD REGULATION
OUTPUT VOLTAGE ADJUSTABLE FROM 2 TO 37 VOLTS
OUTPUT CURRENT TO 150 rnA WITHOUT EXTERNAL PASS TRANSISTOR

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F

CURRENT
LIMIT

INVERTING
INPUT

NON-INVERTING
INPUT

Vc

V-

Note: Pin 5 connected to case.

ABSOLUTE MAXIMUM RATINGS
Pulse Voltage from V + to V _, (50 ms) (723)
Continuous Voltage from V+ to V_
Input/Output Voltage Differential
Differential Input Voltage
Voltage Between Non-Inverting Input and V_
Current from V
Current from V REF
Internal Power Dissipation (Note 1)
Metal Can
DIP
Storage Temperature Range
Operating Temperature Range
Military (723)
Commercial (723C)
Lead Temperature (Soldering, 60 seconds)

50V
40V
40V
±5V
+8V
25mA
15 rnA

z

800mW
1000 mW
o
-65°C to +150 C
-55°C to +125°C
o
OOC to +70 C
300°C

ORDER INFORMATION
PART NO.

TYPE
723

723HM

723C

723HC

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

NC

14
13
12

v+

11

FREQUENCY
COMPENSATION

EQUIVALENT CIRCUIT

NC
FREQUENCY
COMPENSATION

10

NC

Vc

ORDER INFORMATION
VOUT

Vz
VOLTAGE
REFERENCE
AMPLIFIER

V-

TYPE

PART NO.

723

723 OM

723C

723 DC

CURRENT
LIMITER

* Planar is a patented Fairchild process.

Notes on following pages.

5-7

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA723

723
ELECTRICAL CHARACTERISTICS (Note 2)
PARAMETER
V
Line Regulation

V

= 12V to V

IN

= 12V to V

IN

IN
IN

Ripple Rejection

IL

= 1 rnA to

0.01

0.1

%V

0.2

74

%V
1llIT
%V
OUT
%V
OUT
%V
OUT
dB

86

dB

IN

= 12V to

V

IN

= 15V

0.3
0.03

I L = 50 rnA

Hz to 10 kHz, C

REF

Average Temperature Coefficient
of Output Voltage

-55°C~T A ~+125°C

Short Circuit Current Limit

= 1 rnA to

IL

= 50 rnA

RSC = 10n, VOUT = 0

0.002

0.015

BW = 100 Hz to 10 kHz, C
BW = 100 Hz to 10 kHz, C

REF

REF

=0

7.15

7.35

20

2.3

V

%/1000 hrs

0.1
IL =0,V IN =30V

%/oC

p.V rms
p.V rms

2.5

= 5 p.F

OJlI

rnA

65
6.95

Long Term Stability
Standby Current Drain

0.15
0.6

= 5 p.F (See Fig. 1) ,

Reference Voltage
Output Noise Voltage

UNITS

0.02

f = 50 Hz to 10kHz

= 50

MAX.

= 40V

-55"'C ~ T A ~+125"'C, IL
f

TYP.

= 15V

-55"'C~T A ~+125"'C, V

Load Regulation

MIN.

CONDITIONS

3.5

rnA

Input Voltage Range

9.5

40

V

Output Voltage Range

2.0

37

V

I nput/Output Voltage Differential

3.0

38

V

723C
ELECTRICAL CHARACTERISTICS (Note 2)
PARAMETER

CONDITIONS
V

Line Regulation

Load Regulation
Ripple Rejection

= 12V to V IN = 15V

IN

V

MIN.

= 12V to V

= 40V

IN
IN
O"'C ~T A ~70"'C, V

= 12V to V
= 15V
IN
IN
I L - 1 rnA to I L - 50 rnA

UNITS

0.01

0.1

0.1

0.5

%"-OUI
%V OUT

0.3

%V

0.03

0.2

OUT
%V OUT

0.6

%V

0'" C ~ T A ~ 70'" C, I L = 1 mA to I L = 50 mA
74

dB

f = 50 Hz to 10 kHz, CREF = 5 p.F (See Fig. 1) I

86

dB

OOC~T A ~70oC

Short Circuit Current Limit

RSC

= 10n, VOUT =

0.003

6.80
BW

= 100 Hz to 10 kHz, C REF = 0

BW = 100 Hz to 10 kHz, C

0.015

REF

= 5 p.F

Long Term Stability

7.15

%/oC

7.50

V

20

p.V rms

2.5

p.V rms

0.1
2.3

IL = 0, V IN = 30V

4.0

%/1000 hrs
rnA

Input Voltage Range

9.5

40

V

Output Voltage Range

2.0

37

V

I nput/Output Voltage Differential

3.0

38

V

5-8

OUT

rnA

65

0

Reference Voltage

Standby Current Drain

MAX.

f = 50 Hz to 10 kHz

Average Temperature Coefficient
of Output Voltage

Output Noise Voltage

TYP.

FAIRCHILD LINEAR INTEGRATED CIRCUITS. /lA723
TYPICAL PERFORMANCE CURVES FOR 723
MAXIMUM LOAD CURRENT
AS A FUNCTION OF
INPUT·OUTPUT VOLTAGE
DIFFERENTIAL
200

+0.05

0.05

TJ MAX - 150°C
RTH • 150°C/W

_
PSTANOBY - 60rnW
(No heat sink)
-

160

~ ::::::::

roo-

E

5

1\

120



'-

-0.3

-0.4

~(
o

20

...........
-0.2

-0.25

100

VOUT - +5V. VIN ' +12V.
RSC -!On

o

10

15

20

25

30

STANDBY CURRENT DRAIN
AS A FUNCTION OF
INPUT VOLTAGE
5.0

VOUT ' 5V. VIN ' +12
Rsc -Ion ---'-'-'--

VOIUT •
IL • 0

'\

"'\

~REF

4.0

3.0

~

~
~

0.2

tlIo

II
60

40

o

100

80

>--f

.,/'

1.0

I

..-

T ' -55°C
A

....-~
,...- T ' 25°C
A

/

'-'

~

~

/

- >-<
-- " - ~
5l_D!, --n - n 'i'

>--1

~

~ 0.4

~~

...

>\1

/"

~ 0.6

\ '\\
\ \\ ...

~-o.2

r'-a~

-0.15

~ 0.8

~"\ ~

o

r--...~~

~ -0.1

CURRENT LIMITING
CHARACTERISTICS

1.0

z

.

~Il!

~ I--

OUTPUT CURRENT - rnA

1.2

~

l-sslc

OUTPUT CURRENT - rnA

VOUT ·5V. VIN - +12V
RSC • !On

~

'

80

60

40

TA

I" ~ ...... I"- -4...r--:,
...... r.::: -. ~'<5°L~
......

VOUT - 5V. VIN ' +12V
RSC -0

-0.2

10

r--

.... ...........
C_ f-- ~

~/0
.. '-0.05

\
\

LOAD REGULATION
CHARACTERISTICS WITH
CURRENT LIMITING

LOAD REGULATION
CHARACTERISTICS WITHOUT
CURRENT liMITING

/

-I
o

20

OUTPUT CURRENT - rnA

60

40

80

o

100

o

!O

20

OUTPUT CURRENT - rnA

40

30

50

I NPUT VOLTAGE - V

TYPICAL PERFORMANCE CURVES FOR 7231C
MAXIMUM LOAD CURRENT
AS A FUNCTION OF
INPUT/OUTPUT VOLTAGE
DIFFERENTIAL

MAXIMUM LOAD CURRENT
AS A FUNCTION OF
INPUT/OUTPUT VOLTAGE
DIFFERENTIAL
200

200

TJ MAX • 150°C
RTH • 150°C/W
PSTANOBY' 60rnW
METAL CAN PACKAGE
(NO HEAT SI NK)

160

h\

~

h\
120

~

\

--' 80
TA ' 25°C

40

-

o

\"
!\.. K
;Cc, j'--.r- r--.
A

o

-r-

T

I I

!O

~

30

20

50

40

LOAD REGULATION
CHARACTERISTICS
WITH CURRENT LIMITING
+0.1

I

-:::
~

TA - 25°C

I

:::::: ~-.
........"
T/700~-- "'

'iN

......

-0.2

o

10

20

40

30

20

OUTPUT CURRENT - rnA

VOUT ' +5V
VIN - +12V
RSC' 0
-0.2
50

o

""
30

60

40

20

80

100

our PUT CURRENT - rnA

STANDBY CURRENT DRAIN
AS A FUNCTION OF
INPUT VOLTAGE

1.2

5.0
VOUT - VREF
IL • 0

1.0

'\

'\

4.0

0.8

~i'
,

- --

I
!O

TA -o°c

/ TA • 25°C

TA -O°C_ -

V

r-..

~ ......
/~ ..... ........... ' TA -70°C

r

C_

; -0.1

TA ' 25°C

CURRENT LIMITING
CHARACTERISTICS

VOUT - +5V
VIN - +12V
Rsc -Ion

-II::::::: ~

\

\

o
o

TA 'OdC_

r-4'~

z
o

,

-

r--

....::::

r..

40

-- -t--r-.-.. 'A.;r-

..;;;::-- i--..

\\
\\

~

1\ \

--' 80

TJ MAX • 125°C
RTH • 125°C/W
PSTANOBY • 60 rnW
OI P PACKAGE
(NO HEAT SI NK)

160

\ 1\

~ 120

LOAD REGULATION
CHARACTERISTICS WITHOUT
CURRENT LIMITING

0.6

3.0

,-

TA ' 70°C

-

}A 'O°C
2.0

~;:::;: -C-

~

0.4

/'

~

0.2

o

20

\

--

TA - +700e

1.0

VIN ' +12V
VOUT ' +5V
RSC '10n

o

\

TA - +25~e

-

40

60

OUTPUT CURRENT - rnA

5-9

80

100

o

o

10

20

30

I NPUT VOLTAGE - V

40

50

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A723
TYPICAL PERFORMANCE CURVES IFOR 723 AND 723C.
LINE REGULATION AS A
FUNCTION OF INPUT/OUTPUT
VOLTAGE DIFFERENTIAL

LOAD REGULATION AS A
FUNCTION OF INPUT/OUTPUT
VOLTAGE DIFFERENTIAL

+0.3

r---r---.---r-r--r----.---,-~-__.

+0.2

+0.2

r-~-r~-r_-+--+~-li.V·

+0.1

VOUT = +5V
r-~-r~-r_~-+~-R~=O
TA = +25°C

+3V

IL -lrnA

~

5

;;+0.1r-~-r~-r_-+--+~-+--+---I

---

'f
z

o

~

~ti!-o.l

~ O~~~~~~~~~~+-~~
ti!

CURRENT LIMITING
CHARACTERISTICS AS A
FUNCTION OF JUNCTION
TEMPERATURE
200

~~o.

r'

0.5

6.0

160

~
S

1/~

~UT VbLT AriE

~

SCI'lOp- =-.
0.4

+100

+50

-50

-

2.0

2.0

/r....
if

V1N = +12V
-2.0 VOUT=+5V
IL -lrnA
TA = 25°C
RSC =0
-4.0
-5

+150

!S
§;

l

80

~

4.0

i

1/

...........

1il/fNt f1

45

/

4.0

120

~~

LIMiTcu~

0.3

35

IN

~~I~
----'. C(j~~tf"&

0.6

25

LINE TRANSIENT
RESPONSE

~r.

0.7

r--....
i'

-0.2 VOUT=+5V
R~ -0
TA ' 25°C
IL = 1 rnA to IL =50 rnA
-0.3
-5
15

-0.11-+-+--+-1-+--+-+--\-+---1

0.8

=-.

z
o

~

~

r----0UTPUT VOLTAGE
~r---

-2.0~

"'"
25

15

§;

5

-4.0~
-6.0

35

45

JUNCTION TEMPERATURE - °c

LOAD TRANSIENT
RESPONSE
12
LOAri

10

CUR~ENT

~

8.0

OUTPUT IMPEDANCE AS A
FUNCTION OF FREQUENCY
10

1\

II

1\

VOUT = +5V
V1N = +12V
RSC = 0
TA = +25°C
Il • 50 rnA

III

.~

1.0

". Cl =11lf

4.0

-

r--OUTPUT VOLTAGE

f\
~

r r- .-/
-4.0

-8.0

\

\

-5

-10

Ii

~LA==~5~~

II

V

0.1

V = +12V -20
1N
VOUT =-t5V
-30

R~=O

15
TlME-

25

35

.01
100

45

~s

Ik

10k

lOOk

1M

FREQUENCY - Hz

NOTES
1.
2.

3.
4.
5.
6.
7.

Rating applies to ambient temperatures up to 25°C. Above 25°C ambient derate linearly at 6.3 mWlC for the Metal Can, and 8.3 mWlC
for the DIP.
Unless otherwise specified,.TA = 25°C, VIN = V+ = Vc = 12 V, V_ = 0, VOUT = 5 V, IL = 1 mA, RSC = 0, C1 = 100 pF, CREF = 0 and
divider impedance as seen by error amplifier";;; 1 0 kn connected as shown in Fig. 1. Line and load regulation specifications are given for
the condition of constant chip temperature. Temperature drifts must be taken into account separately for high dissipation conditions.
L1 is 40 turns of No. 20 enameled copper wire wound on Ferroxcube P36/22-3B7 pot core or equivalent with 0.009" air gap.
Figures in parentheses may be used if R1/R2 divider is placed on opposite side of error amp.
Replace R1/R2 in figures with divider shown in figure 13.
V+ must be connected to a +3 V or greater supply.
For metal can applications where Vz is required, an external 6.2 volt zener diode should be connected in series with VOUT.

5-10

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA723
TABLE I
RESISTOR VALUES (kil) FOR STANDARD OUTPUT VOLTAGES
POSITIVE
OUTPUT VOLTAGE

APPLICABLE
FIGURES
(Note 4)

FIXED OUTPUT
±5%
RI

1, 5, 6, 9,
4.12
12 (4)
1, 5, 6, 9,
3.57
12 (4)
1, 5, 6, 9,
2.15
12 (4)
1, 5, 6, 9,
1.15
12 (4)
2, 4, (5, S, 1.87
12, 9)
2, 4, (5, 6, 4.87
9, 12)
2, 4, (5, 6, 7.87
9, 12)
2, 4, (5, 6, 21.0
9, 12)

+3.0
+3.6
+5.0
+6.0
+9.0
+12
+15
+28

7
7

+45
+75

OUTPUT ADJUSTABLE
± 10% (Note 5)

APPLICABLE
FIGURES

R2

RI

PI

R2

3.01

1.8

0.5

1.2

+100

7

3.65

1.5

0.5

1.5

+250

0.5

2.2

0.5

4.99

.75

6.04

0.5

7.15

3.57
3.57

NEGATIVE
OUTPUT VOLTAGE

.75

FIXED OUTPUT
±5%
RI

5% OUTPUT
ADJUSTABLE ± 10%

R2

RI

PI

R2

3.57

102

2.2

10

91

7

3.57

255

2.2

10

240

-6 (note 6)

3, (10)

3.57

2.43

1.2

0.5

.75

2.7

-9

3, 10

3.48

5.36

1.2

0.5

2.0

1.0

2.7

-12

3, 10

3.57

8.45

1.2

0.5

3.3

7.15

2.0

1.0

3.0

-15

3, 10

3.65

11.5

1.2

0:5

4.3

7.15

3.3

1.0

3.0

-28

3, 10

3.57

24.3

1.2

0.5

10

7.15

5.6

1.0

2.0

-45

8

3.57

41.2

2.2

10

33

48.7

2.2
2.2

10
10

39

-100
-250

8
8

3.57
3.57

97.6
249

2.2

10

2.2

10

91
240

78.7

68

TABLE II
FORMULAE FOR INTERMEDIATE OUTPUT VOLTAGES
Outputs from +2 to +7 volts
[Figures 1, 5, 6, 9, 12, (4)]

Outputs from +4 to +250 volts
[Figure 7]

R2

Your = [VREF X - - - ]
RI + R2

Your

Outputs from +7 to +37 volts
[Figures 2, 4, (5, 6, 9, 12)]

=

Current limiting

Foldback Current limiting

Outputs from -6 to -250 volts
[Figures 3, 8, 10]

R, + R2
Your = [VREF X - - - ]
R2

Your

=

I

VREF
RI + R2
[-2- X - - - ] ; R3 = R4
RI

_ [ Your R3
KNEE ~

ISHORT CKr

BASIC LOW VOLTAGE REGULATOR
(VOUT = 2 to 7 Volts)

r--

, - - - - VREF

~;;;

Cl

J---"VII\,........... ~~~~MTED

R3

+ R4
R4

]

1. Cl

J.

IIA723 CL

-N.I.

Invl--..-""",.....J

"'v-,_-=-or--I---'~CO~MP

VOUT ~

I

1

RSC

REGULATED
OUTPUT

C S I - - - -.....

C S I - - - -.....
R3

100

VREF

R3

RSC

IIA723

_-=-.....R2

VSENSE X
-Rsc

v+hvc

VoUT I--

CREF I-=-

VSENSE (R3 + R4) ]
Rsc R4

VIN

v.h"
.~ N.1.

=[

+

BASIC HIGH VOLTAGE REGULATOR
(V OUT = 7 to 37 Volts)

VIN

r-,1.

•

VSENSE
IL l M l r = - Rsc

VREF
R2 - R,
[-2- X - - .- ]; R3 = R4
RI

I COMP

pF

Rl

Inv _

t----<
_ Cl

~~looPF

TYPICAL PERFORMANCE

R2

-=E"

Regulated Output Voltage
5V
Line Regulation (l!.VIN = 3 V) 0.5 mV
Load Regulation (t.IL=50 rnA) 1.5 mV
R

RI R2 f
..
·f
Not e: R3 = RI+R2
or minimum temperature dn t.

Note: R3 =

RI~~:

TYPICAL PERFORMANCE
Regulated Output Voltage
15 V
Line Regulation (l!.VIN = 3 V) 1.5 mV
Load Regulation (t.IL=50 rnA) 4.5 mV

for minimum temperature drift.

R3 may be eliminated for minimum component count.

Fig. 1

Fig. 2

5-11

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA723
NE'GATIVE VOLTAGE REGULATOR

VREF

POSITIVE VOLTAGE REGULATOR
(External NPN Pass Transistor)

VOUT
Tl
214898

Vz
pA723

CL

R.4

3KQ

REGULATED
OUTPUT

CS
N.I.

R3
3KQ

Rl

Cl
100pF

V-

REGULATED
OUTPUT '--

Note 7

TYPICAL PERFORMANCE

TYPICAL PERFORMANCE

Regulated Output Voltage
-15 V
Line Regulation (aVIN = 3 V)
1 mV
Load Regulation (aIL = 100 mA) 2 mV

Regulated Output Voltage
+15 V
Line Regulation (aVIN = 3 V) 1.5 mV
Load Regulation (aiL = 1 A)
15 mV

Fig. 3

Fig. 4

POSITIVE VOLTAGE REGULATOR
(External PNP Pass Transistor)

FOlDBACK CURRENT LIMITING

VIN

R3
60Q
V+

Vc

VREF

RSC 30Q

Tl
214898

VO UT

VREF

R3
2.7KQ

VOUT
pA723
Rl

pA723
Rl

CL

CL
CS

Inv

N.I.

R2

Inv

N.I.

R4
5.6KQ

CS
RSC

REGULATED
OUTPUT

R2

-::

TYPICAL PERFORMANCE
Regulated Output Voltage
5V
Line Regulation (aV 1N = 3 V) 0.5 mV
Load Regulation (aiL = 10 mA) 1 mV
Short Circuit Current
20 rnA

TYPICAL PERFORMANCE

+

Regulated Output Voltage
+5 V
Line Regulation (aVIN = 3 V) 0.5 mV
Load Regulation (aIL = 1 A)
5 mV

Fig. 5

Fig. 6

POSITIVE FLOATING REGULATOR

NEGATIVE flOATING REGULATOR

R5 10KQ

V+

01 12 V
IN 1426

CLt------+

CL

RSC lQ

CS

,----1---+---+--I N.I.
R3
3.0KQ

Tl
2N5287

pA723

Cl
100pF

VV-

L..-+-_ _ _........_ _ _ _ _+-_+-. ~~~~MTED

Note 7

L---+--+---4----4-------+-----e...... ~~~~~:TED

TYPICAL PERFORMANCE

TYPICAL PERFORMANCE

Regulated Output Voltage
+50 V
Line Regulation (aVIN = 20 V) 15 mV
Load Regulation (aiL = 50 mA) 20 mV

Regulated Output Voltage
-100 V
Line Regulation (aVIN = 20 V) 30 mV
Load Regulation (aIL=100 mA) 20 mV

Note 7

Fig. 8

Fig. 7

5-12

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A723
NEGATIVE SWITCHING REGULATOR

POSITIVE SWITCHING REGULATOR

VC+---~

V+
. - - - - - - f VREF

Rl

V+

-=-

VO UT

IIA723

II ~~2mH

Cl
O.IIIF

~A723

CS
R3 lKQ
R2

Cl
O.II1FI

R4
lMQ

r

Inv
V-

COMP

Tl
2N5455

CS

'V- COMP

~

Cl15pF

I,,'OO'F
TYPICAL PERFORMANCE

TYPICAL PERFORMANCE
Regulated Output Voltage
Line Regulation (AVIN = 30 V)
Load Regulation (AIL = 2 A)

Note 3

01
lN4942

Inv

N.I.
R4
IMQ

RI

-=-

CL

R3 1KQ

C2 100llF

N.I.

R6
2200

VOUT

VREF

Vz

REGULATED
OUTPUT

CL

R2

R7
IKQ

Vc

+5 V
10 mV
80 mV

Regulated Output Voltage
-15 V
Line Regulation (AVIN = 20 V)
8 mV
Load Regulation (AIL = 2 A)
6 mV

Notes 3, 7

Fig. 9

Fig. 10

REMOTE SHUTDOWN REGULATOR WITH
CURRENT LIMITING

SHUNT REGULATOR

VIN

REGULATED
OUTPUT

V+

t---.......,~

Vc

Note 2

REGULATED
OUTPUT

VOUT

•

pA723
YZ

CL

R3 100Q

pA723
N.I.

CSt--------'

CL

Iny t - - - - - - - - - '

CS

r-JI:t.:"'Q-O ~~~~
Note 1: Current limit transistor may be
used for shutdown if current
limiting is not required.

2: Add if Vout > 10V

Inv

N.I.

INPUT

TYPICAL PERFORMANCE

TYPICAL PERFORMANCE

Regulated Output Voltage
+5 V
Line Regulation (AVIN = 3 V) 0.5 mV
Load Regulation (AIL=50 mA) 1.5 mV

Regulated Output Voltage
+5 V
Line Regulation (AVIN = 10 V) 0.5 mV
Load Regulation (AIL= 100 mA) 1.5 mV

Note 7

Fig. 11

Fig. 12

OUTPUT VOLTAGE
ADJUST

EQUIVALENT CIRCUIT

R1 500Q

R3
25KQ

R4
IKQ

V+

R5
lKO

DI
6.2V
Rl
R2
15KQ
PI

------.0

Vz

.-·-----0 CDMPENSATION
r - - - - - O ~P:I~ENT

RIO
RS
5KQ

VREF

Fig. 13

5-13

Rg
20
3000 KO

NON-INVERTING
INPUT

CURRENT

' - - - - - - - 0 SENSE

V-

INVERTING
INPUT

~A7800 SERIES
THREE -TERMINAL POSITIVE VOLTAGE REGULATORS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The pA7800 series of monolithic Three-Terminal Positive Voltage
Regulators is constructed using the Fairchild Planar* ephaxial process. These regulators employ
internal current limiting, thermal shutdown and safe-area compensation, making them essentially
indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. They
are intended as fixed-voltage regulators in a wide range of applications including local, on-card
regulation for elimination of distribution problems associated with single point regulation. In
addition to use as fixed voltage regulators, these devices can be used with external components to
obtain adjustable output voltages and currents and also as the power pass element in precision
regulators.
.
•

OUTPUT CURRENT IN EXCESS OF 1 AMP

•

NOEXTERNALCOMPONENTS

•

INTERNAL THERMAL OVERLOAD PROTECTION

•

INTERNAL SHORT CIRCUIT CURRENT LIMITING

•

OUTPUT TRANSISTOR SAFE-AREA COMPENSATION

•

AVAILABLE IN THE TQ-220 AND THE TO-3 PACKAGE

•

OUTPUT VOL TAGES OF 5,6,8, 12, 15, 18, AND 24 VOL TS

ABSOLUTE MAXIMUM RATINGS
Input Voltage (5 V through 18 V)
(24V)
I nternal Power Dissipation (Note 1 )
Storage Temperature Range
Operating Junction Temperature Range (Note 2)

Internally
-65°C to
-55°C to
O°C to

7800
7800C
Lead Temperature (Soldering, 60 second time limit) TO-3 Package
(Soldering, 10 second time limit) TO-220 Package

35V
40V
Limited
+150°C
+150°C
+125°C
300°C
230°C

CONNECTION DIAGRAMS
TO-220 PACKAGE
(TOP VIEW)
PACKAGE OUTLINE GH

ORDER
OUTPUT
VOLTAGE
5V
6V
8V
12 V
15 V
18 V
24V

INFORMATION
TYPE

PART NO.

7805C
7806C
7808C
7812C
7815C
7818C
7824C

7805UC
7806UC
7808UC
7812UC
7815UC
7818UC
7824UC

TO-3 PACKAGE
(TOP VIEW)
PACKAGE OUTLINE GJ

EQUIVALENT CIRCUIT

.......------...---.......- .......-----.--o INPUT

~-+------

All
O.3n
RS
3.3kn

D1

.,...........----+---+---.......- .............-----0 OUTPUT
2

A6
2.7kn

3
~-+-~~--~-~-~-----

«

S

I

20

12
\.

I

>

~

..........

~.ortJ.tA~1S-.

100

o

I
Z

-r-..

;:
I

INFINITE HEAT SINk

0

~C~rSIN~

5.0

~

i""-.

12

2.0 ~~rSINk

.................

1.0

I"

1\

,

O. 1
75

50

25

100

125

150

PEAK OUTPUT CURRENT
AS A FUNCTION OF INPUT/OUTPUT
01 FFERENTIAL VOLTAGE

2.0

I

...J

«

~

1.5

Ci

I-

:::J

1.0

-

........

0.5

i'..

"

50

25

\

1\

"'

0.2
0.1
75

\

..........

"\..

100

125

150

RIPPLE REJECTION
AS A FUNCTION OF FREQUENCY

3.0

-::::-- --~

........ .......

r-.. -....
r-.. ::::::::

".

r-

-~
I

~",~

~

~

11- ~ ~

I-:: :---.
A

r"" ~

"lJ

1.0

,~~ I
~s0

r"- ~~J' ......

'I

1.5

-I--- l---'I2!Q~A

........

I

2.0

IU7"~120~

r-.

2.5

~~
.!~

1.0

>
«

AMBIENT TEMPERATURE _·C

2.5

~

g

\

N IN.m HEATSINK

WlrH
HE
::::: ~~7"SINI(

5.0

2.0

OJ

\..

0.2

10

a:

~

""- \

I

20

Ci

I\.

t-..

0.5

50

z

-r:..

AMBIENT TEMPERATURE _·C

~
0

MAXIMUM AVERAGE POWER
DISSIPATION AS A FUNCTION OF
AMBIENT TEMPERATURE
(TO-220,780OC) .

0.5

r

i

o

-75 -50 -25

0

25

I'-.::

........

~

~~'

~

o

1

i

10

~

i'-

DEVIATION

I

1

20

~

I-- _OUTPUT VOLTAGE

= 20mA
= 25·C

'L
5.0 -TJ

1

I
Z

~

-

~OU~ = 15V I

-

I~PU'! VOLTAbE

~

~

/

4.0

--

,.,.1-"-

f--

J

~

:;
o

-10
lOUT = 500mA
1 5V ,

"'VPUT,=

-2

-20

o

10

20

30

40

50

60

3.0

o

10
TIME -

10

15

~s

20

25

30

35

INPUT VOLTAGE - VOLTS

QUIESCENT CURRENT
AS A FUNCTION OF TEMPERATURE
4.6

5

12

OUTPUT IMPEDANCE
AS A FUNCTION OF FREQUENCY
102

= 10V
V,N
5V
... VOUT =
lOUT = 500mA

V,N
VOUT
TA
CL

4.4

= 10V
= 5V
= 25·C
= O~F

10 1

4.2

r-- r- r-

/'"

/
4.0

/
loll:

3.8

25

50

75

100

II

10

125 150 175

100

lk

I

"

10-2
0

-

.....

.,," ~ftUy51~~A
/

10- 1

I

3.6
-75 -50 -25

""

'OUT=20mA

10k

I II
lOOk

1M

FREQUENCY - Hz

JUNCTION TEMPERATURE _·C

APPLICATIONS
-VO

+ OUTPUT

~II
-OUTPUT

POSITIVE AND NEGATIVE RI:GULATOR

NEGATIVE OUTPUT VOLTAGE CIRCUIT

2N3789
V,N o-_-_~-""

r----1r-----........--.rl~lmr:H:'--.......-Ovo

4.m

470n

D.W

SWITCHING REGULATOR

5-23

~A7800SERIES

FAIRCHILD LINEAR INTEGRATED CIRCUITS •
APPLICATIONS (Cont'd)
+VIN

2

1

INPUT

OUTPUT

/LA78XX*

O.33/L~

3

;;;;: C
2

+
R2

-~

-=

NOTES:
* To specify an output voltage, substitute voltage value for "XX".
+ Although no output capacitor is needed for stability, it does improve transient response.

++ Required if regulator is located. an appreciable distance from power
supply filter.

CIRCUIT FOR INCREASING OUTPUT VOLTAGE

FIXED OUTPUT REGULATOR

INPUT

0 - -.....-

, , ,I

....

/LA78XX
INPUT

0---......--1

1------+---.......--_-0 OUTPUT

/LA7805

O.33/LF

' - - - - - -.....- - 0 OUTPUT

lokn
1 kn

Output Current =

-=

VOUT

R1

CURRENT REGULATOR

10 REGULATED OUTPUT

D
1

8

REGULATED
OUTPUT

2

7

COMPENSATION

UNREG

3

6

FEEDBACK

INPUT
GROUND

4

5

REFERENCE
BYPASS

800. STER
OUTPUT

ORDER INFORMATION
TYPE
PART NO.
376
LM376N
L---+-~f-----40----<> REFERENCE BYPASS

PIN CONNECTIONS SHOWN ARE FOR METAL CAN

·Planar is a patented Fairchild process.

Notes on following pages.
5-30

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 105 • 305 • 305A • 376
105
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Note 2
PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Input Vol1;age Range

8.5

50

V

Output Voltage Range

4.5

40

V

Output/Input Voltage Differential
Load Regulation (Note 3)

o ~ 10 ~ 12 mA

V
%

0.03

0.1

%

0.03

0.1

0.025

0.06

%/V

0.015

0.03

%/V

0.003

0.01

0.3

1.0

1.7

1.81

0.02

RSC = 10n, T A = 125°C
RSC = 10n, T A = -55°C
V IN - VOUT ~ 5 V

Line Regulation

V IN - VOUT

>5

V

Ripple Rejection

CREF = 10 Jl.F, f = 120 Hz

Temperature Stability

-55°C ~ TA ~ 125°C

Feedback Sense Voltage
Output Noise Voltage

30
0.05

3.0
RSC = 10n, T A = 25°C

1.63
10Hz

~

f

~

10kHz

CREF = 0
CREF

> 0.1

Jl.F

RSC = 10n, T A

Current Limit Sense Voltage

= 25°C,

VOUT=OV
Standby Current Drain

225

VIN=50V

Long Term Stability

%

%/V
%
V

0.005

%

0.002

%

300

315

mV

0.8

2.0

mA

0.1

1.0

%

TYP.

MAX.

305
ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise specified) Note 2
PARAMETER

CONDITIONS
..

MIN.

-

UNITS

Input Voltage Range

8.5

40

V

Output Voltage Range

4.5

30

V

Output/Input Voltage Differential

3.0
0.02

RSC = 10n, T A = 25°C
Load Regulation (Note 3)

o ~ 10 ~

12 mA

RSC

=

15n, T A = 70°C

RSC = 10n, TA = O°C
V IN - VOUT ~ 5 V

Line Regulation.

V IN -,. VOUT

.> 5

V

Ripple Rejection

CREF = 10 Jl.F, f = 120 Hz

Temperature Stability

0° C ~ T A ~ 70° C

Feedback Sense Voltage
Output Noise Voltage

1.63
10 H z

~

f

~

10kHz

CREF = 0
CREF

Current Limit Sense Voltage

> 0.1

Jl.F

RSC = 10n, T A = 25°C

225

30

V

0.05

%

0.03

0.1

%

0.03

0.1

%

0.025

0.06

%/V

0.015

0.03

%/V

0.003

0.01

%/V

0.3

1.0

1.7

1.81

%
V

0.005

%

0.002

%

300

315

mV

0.8

2.0

mA

0.1

1.0

%

VOUT =0 V
Standby Current Drain

VIN =40 V

Long Term Stability

NOTES
1. Rating applies to ambient temperatures up to 70° C. Above 70° C ambient derate linearly at 6.3 mW/ C for the metal can and 5.6 mW/ C
for the mini Dip.
2. These specifications apply for input and output voltages within the ranges given, and for a divider impedance seen by the feedback
terminal of 2 kn, unless otherwise specified. The load and line regulatio.n specifications are for constant junction temperature. Temperature

drift effects must be taken into account separately when the unit is operating under conditions of high dissipation.
3. The output currents given, as well as the load regulation, can be increased by the addition of external transistors. The improvement
factor will be roughly equal to the composite current gain of the added transistors.
4. With no external pass transistor.

5-31

I

FAI"RCHILD LINEAR INTEGRATED CIRCUITS • 105 • 305 • 305A • 376
305A
ELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise specified) Note 2
PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Input Voltage Range

8.5

50

V

Output Voltage Range

4.5

40

V

Output/Input Voltage Differential

3.0

30

V

Load Regulation (Note 3)

0';;;; 10';;;; 45 mA

RSC = on, TA = 25°C

0.02

0.2

%

e

0.03

0.4

%

0.03

0.4

0.025
0.015

0.06

RSC = on, TA = 70

0

RSC = on T A = 0° C
V I N - VOUT .;;;; 5 V

Line Regulation
Ripple Rejection

VIN - VOUT > 5V
CREF = 10 ,uF, f = 120 Hz

Temperature Stability

0° C .;;;; T A .;;;; 70° C

Feedback Sense Voltage
Output Noise Voltage

1.55
10 Hz';;;; f.;;;; 10 kHz

CREF = 0
CREF

> 0.1

,uF

RSC = 10n, T A = 25°C,

Current Limit Sense Voltage
(Note 4)

VOUT = OV

Standby Current Drain

VIN = 50 V

0.03

0.003

225

Long Term Stability

%
%/V
%/V
%/V

0.3

1.0

1.7

1.85

%
V

0.005

%

0.002

%

300

375

mV

0.8

2.0

mA

0.1

1.0

%

TYP.

MAX.

376
ELECTRICAL CHARACTERISTICS O°C';;;; T A';;;; 70°C
PARAMETER

CONDITIONS

MIN.

UNITS

Input Voltage Range

9.0

40

V

Output Voltage Range

5.0

37

V

Output/Input Voltage Differential

3.0

30

V

RSC = on, TA = 25°C

0.2

%

RSC =on, TA = 70°C

0.5

%

RSC = on, T A = 0° C

0.5

Load Regulation

Line Regulation

0.;;;; 10';;;; 25 mA

TA = 25°C

%

0.03

%/V

0.1

%/V

Ripple Rejection

f = 120 Hz, T A = 25°C

0.1

%/V

Standby Current Drain

V IN = 30 V, T A = 25° C

2.5

mA

Reference Voltage

1.60

Current Limit Sense Voltage

1.72
0.360

5-32

1.80

V
V

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 105 • 305 • 305A • 376
TYPICAL PERFORMANCE CURVES FOR 105/305/305A
CURRENT LIMITING
CHARACTE RISTICS

LOAD REGULATION

LOAD REGULATION

~~~•••••••• ;~A.+-=1-15-0'+C'--+----1
..... !'.......r--..... ..............
~O;:::T+A-=-25-+'~--:.:.·'""'I··

-0.Q1 1---+-+-.....;···4-•••-•••-.I----'I'"...

... >.:......~

-0.02 1-+-.p......!.rl-~'.r.--+--+--+----1
+.... .....
\ . .....
T
°

=1_S5 C

1--+_+--'\'.+: TA=25';

.....
-0.02 I - - - + - + - - - + - - l - - + -••-"
•• t..+--I---~
TA = -55'C· ••••••••

........
-0.03 1-----+---l--+--l--l----I---I------1

-0.04

\·1

TA=150'C:

-I

••••• A I

\

0.6

-0.06

1--+--+-...!...H--+---+T-4-1--1----+~

-0.08

1----+_-l-~_:...;T~A+-=-12_5'.j-C-+\-+-~..!..--I

........_ - ' - - - '
15
20

- r - ,,:,

~

-I

:

-----l":, -

0;

-Rsr=O
-0.04

0.8 1--+--+--1r--;-+--I--f-+--+---+--I

':;:;:;

r - - c14.~
o·

;t

" r-- " I
~~8!-

-

C">

=.

0.4 1--+---+----1H-+--+-~-+---+---t---l

0.2 1---+---1--1--++--+---11--+--+---1--1
RSC = 100

L---'-_~___I._....L.._'--

o

10

10

20
LOAD CURRENT - mA

CURRENT LIMIT SENSE VOL TAGE

SHORT CIRCUIT CURRENT

,l~5L-

, "'-J,

40

0.5
....."

............
0.4

30

..... ......

.........
~

..........
...........

0.3

20

~

..........

'"

RSC = lOn

-r:::
-.....J.sc

r-.... .........

RrC = 2fn

\

\

2.6

"""
"- r-......

r--.... I""

f;;;::

. \1

2.8

"

= 15n

kd

.....

Rl!R21= 2
Rl = 1.11 VOUT

\

1\
'-

2.4

",-R2

1'--..

2.2

0

25

50

75

100

125

150

-75 -50 -25

TEMPERATURE - 'C

0

25

50

75

100

125

150

10

5

MINIMUM INPUT VOL TAGE

REGULATOR DROPOUT VOLTAGE
13 ~-r--~~--~~~~~I-r_I~

1

1----+_-I-~---l---..j....~~~T : :~~ _

f--VOUT = 4.5 V

SUPPL Y VOL TAGE REJECTION
0.1

1==

VOUT 10 V
TA - 25'C I--

0.05

r-...

/
./

....

"/

7.0

0.02

./10'

•••

/

\

...... ~~.................:.

12

0.01

~f--IL=10mA-

1--+--+---1---_
....+••••.• .I:,.-.::~~~
1• • •:..:....

.......

..... ~

---

r\.

............

-~riO=(IPF

0.001

6.0

25

50

75

100

125

-75 -50

-25

50

75

100

10

125

MINIMUM OUTPUT VOL TAGE
---

TRANSIENT RESPONSE

STANDBY CURRENT DRAIN
~

1

I - - - t - - - - + _ - + - - - I RSC

4.0

3.5

3.0

2.5
-75

/

/

/

1----+_-1-_-""55~'C~•.•••••~ ___ _

. ······1

1.0 1---+--h-.:..··-I----25'C

.......

i
--+i--±;;;o;o;I~-I

0.9 { '

----~

~IL=O-+---+--t----+-I-~

400 ,...::.:.:::::. CL = 1 PFr--_f---_~FSC
INL

50

75

100

125

:

~~~A

= 1.0mA

~~~~. =.I.:~~ •••

I---+-LO-A-D-+----ft,\:-··•••-•••

••••••••••••••••

.......
25

,;VIN =, •.~.~ •.

-40 I - - - + - - - + - - - + - - + - - - - t l - - - I

125'C

TEMPERATURE _ 'C

= lOp-

1.1 1----+--1-~---+-~----I-_l______0=1

..,. / '
-25

\

LINE

/

/
./

-50

50

20

INPUT-OUTPUT VOLTAGE DIFFERENTIAL - V

TEMPERATURE - 'C

TEMPERATURE - 'C

4.5

25

CREIF = 0

r.....

--

0.005

0.002

-25

50

20

OUTPUT VOLTAGE - V

TEMPERATURE - 'C

8.0

-75 -50

..................

2.0

0.2
-75 -50 -25

./

50

OPTIMUM DIVIDER
RESISTANCE VALUES

3.0

10

1

40

30

3.2

~ ~"

...........

20

OUTPUT CURRENT - mA

LOAD CURRENT - mA

0.6

10

40

30

fr··········

0.8 L----I.._....L----'L-......L._.!.-......I_....l----J
40
30
50
10
20
INPUT VOLTAGE -V

5-33

I
20

10

TIME - pS

30

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 105 • 305 • 305A • 376
TYPICAL PERFORMANCE CURVES FOR 376

0.4

I-__--+-+--+---II----+-_+_ RS~

1-+--+--I--I---+---1-I-+--+-~t J

o_
1.00

TA=O'C

I-+-+--+--f--f--+---+-"""",V'--c.!~~
~"'::
.......

.....,~

k::':'"

o

TA=70'C
0.75 t--+-+-+---+---II--+--++-:-H---f---;
TA=25'C - -

0.350

0.50

I--+---+-+--+-----il----+--H-~j--:-_I_--;

0.300

0.25

I--+---+-+--+--I---+--+l---;-~--f---;

0.250

••••••• T A 1= 25'C

0.1 I-+--+-_I_-I--......::--::o
••oi'.c.
•••c:t..•

0.400

t'-...

--I

.,;'

I

lo<.5mA_

= ,In -

1-+-+-+--+......,1'-+-",.;...1-;;----

0.3 1--+-+-_+_-+--t-t-I_+-+-_+_-+--1

0.2

CURRENT LIMIT
SENSE VOLTAGE
I

CURRENT LIMITING
CHARACTE RISTICS

LOAD REGULATION

['...

.........

. . . . r--.... . . . .

-

.. ...... 1........

i =76'cI _

T

~~::::..... .... .....

0.200
20

10

10

30

20

15

25

AMBIENT TEMPERATURE - 'C

MINIMUM INPUT VOLTAGE

REGULATOR DROPOUT VOLTAGE
12.3 .--..,..---r---r--r-"-T"'---r-"---I'T'I-""I---'

OPTIMUM DIVIDER RESISTANCE

12.2 1---+---+-+--+----1-+_ VOUT = 10 VRSC = 101l
12.1 I---+-t-+--+-t-+--+-I__+_---i
IL = 20mA
12.0 1---+---1-+\--+-t-+--+-I__+_---i

2.9

J

I

VOUT=5V-

7.1

11.9

7.0
6.9
6.8

_Vf-'"

6.7

V

~

V

I----F====t-="!-~~::--I-+--+-I__+_---i

r-r-.

2.6

.......... /......:: ...... "'-

2.4

IL

=

Ji' .......::" ....

10mA

_r--IJ~=5~IA/

6.5

2.1

11.3 '---'-----1_-'--'-_'---.............._-'---'----'

2.0

70

50

•••••

50

25

1.90

1.80

LU
0:
0:

1.75

Vo=10V
I,..-

........ ~i"""

::J

1.70
1.65

Iii
1.60
1.55

/'"

,.,
II ~

-~

I-

0.025

--

0.020

-

...... r---. r20

15

25

30

35

TRANSIENT RESPONSE
1\

LINE

o -----, ':;':":=:::::
...~::::t.~..,....:.:.;.;..t-4
-rRSC

= 10n+---+---t--I

r----l-e~~NT: 1~~+---+---t--I
I

~

'\
...... ~

0.Q15

.........

Vo= 5V

CL = 0
RSC
400 1 - - - + - - - + - - - 1 1 - - - IFL
INL

-

= 10n
= 20 mA
= 1.0 mA

I---+----+--II-~. ..-••-.. /~UT ~l.~~.~ ...

r-.....

0.010

1.50
10

........ ~

40

-40

r0-

V

'\

OUTPUT VOLTAGE - V

\

~

~.R2

10

70

VOUT = lOV_
TA = 25'C
f.; 120 Hz
CREF = 0

0.030

1.95

1.85

\

2.2

SUPPLY VOLTAGE REJECTION
I I I

2.00

I-

,

Vo = 1.72X(';;+ 1

\

AMBIENT TEMPERATURE _ 'c

STANDBY CURRENT DRAIN
TA = 25°C

~

Vo -l.72

1\

2.3 I--

11.4 I---+-t-+--+--II--+---+-+--_+_---i

AMBIENT TEMPERATURE - 'C

«

2.7

2'.5

11.7

R2 = 1.72x Rl

2.8

11.5

25

i

Rl = 1. 11Vokn

11.8 I----t:c:-::-::i-+--+---I---t=....r--t---+--;

11.6 -

I-'"

3.0

6.6

«

70

50

OUTPUT CUR RENT - mA

7.2

u

25

LOAD CURRENT - mA

7.3

E
I
z

30

15

20

25

30

35

40

10

15

20

25

30

-400 '--_-'-_-'-_----1'---_........._-'-_---'
10
20
30

INPUT/OUTPUT VOLTAGE DIFFERENTIAL

INPUT VOLTAGE - V

BASIC POSITIVE REGULATOR WITH CURRENT LIMITING

VOUT

~

1.72 - - - R2

325

ISC

~--mA

RSC

5-34

TIME - pS

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 105. 305 • 305A • 376
TYPICAL APPLICATIONS

10A REGULATOR WITH FOLDBACK CURRENT LIMITING

1.0A REGULATOR WITH PROTECTIVE DIODES
VOUT 28V

D1 tt
UTR3305

C1
47 ~F
35 V

R2
3.15 k

R2
2.13 k

1%

1%

t Solid tantalum
• Electrolytic

• Protects against input voltage
reversal
tt Protects against output
voltage reversal

t Protects against shorted input or
inductive loads on unregulated
supply

CURRENT REGULATOR

LINEAR REGULATOR WITH FOLDBACK CURRENT LIMITING
VOUT= 15V
200 mA

. - - - - - - - - - - - - - - -__-~~-__oVIN

R1
16.7 k
1%

R2
2.27 k
1%
R1
1.82W

IOUT= 1A

~

SWITCHING REGULATOR

SHUNT REGULATOR
D1 1N3821 3.3 V

11

L1
1.7 MH'

R1
l1.1k

UTR
2305

1%

C1

R1
56 k

C2

R3
620

R2
3,2 k

C3
V IN <-15V

1%

J100 PF

VOUT= lOV
200mA

35 V

I""

o 11lF

-::VIN>8.5V

t Solid tantalum
tt 125 turns #22 .on Arnold Engineering
A262123-2 molybdenum permalloy core.

5-35

•

109-209
FIVE VOLT REGUlATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 109 and 209 are complete Five Volt Regulators constructed using
the Fairchild Planar* epitaxial process. These regulators employ internal current limiting, thermal
shutdown and safe-area compensation making them essentially indestructible. They are intended for
use as local regulators, eliminating noise and distribution problems associated with single point regulation. If adequate heat sinking is provided, they can provide over 1A output current. The 109 and 209
are intended primarily for use with TTL and DTL logic and are completely specified under worst case
conditions to match the power supply requirements of these logic families. In addition to use as a
fixed 5 V regulator, these devices can be used with external components to obtain adjustable output
voltages and currents and as the power pass element in precision regulators.

•
•
•
•
•

CONNECTION DIAGRAM
TO-3 PACKAGE
(TOP VIEW)
PACKAGE OUTLINE GJ

OUTPUT CURRENT IN EXCESS OF 1 AMP
SPECIFIED TO MATCH WORST CASE TTL AND DTL REQUIREMENTS
NO EXTERNAL COMPONENTS
INTERNAL THERMAL OVERLOAD PROTECTION
OUTPUT TRANSISTOR SAFE-AREA COMPENSATION
Case is connected to ground.

ABSOLUTE MAXIMUM RATINGS
Input Voltage
Internal Power Dissipation
Storage Temperature Range
Operating Junction Temperature Range
109
209
Lead Temperature (Soldering, 60 seconds)

35 V
Internally Limited
_65° C to +150° C

ORDER
TYPE
109
209

_55° C to +150° C
_25° C to +150° C
300°C

INFORMATION
PART NO.
LM109K
LM209K

EQUIVALENT CIRCUIT

,--...-------,.-------t-----.--t---.......- - O INPUT
R4

R18

100 k!l

500n

Rll

0.311

R5
3.3 kll

~-.......-

.1--..----+--.......- - - -......_ -.......- - 0 OUTPUT

.......-_4---~-~---~-_4~~~---~~---oCOMMON

* Planar
5-36

is a patented Fairchild process.

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 109 • 209
o
o
ELECTRICAL CHARACTERISTICS (TJ = _55°C to +150 C for 109, -25°C to +150 C for 209, V,N
otherwise specified)

10 V, lOUT

PARAMETER

MIN.

TYP.

MAX.

UNITS

4.7

5.05

5.3

V

4

50

mV

15

100

mV

5.4

V

10

mA

CONPITIONS

Output Voltage

TJ

= 25°C

Line Regulation

TJ

= 25°C, 7

Load Regulation

TJ = 25°C, 5 mA ";;1 OUT ";;1.5 A

Output Voltage

8 V ";;V,N ..;;20 V, 5 mA ";;IOUT";;1 A, P";;15 W

Quiescent Current

7 V ";;V,N ..;;25

V ";;V,N ";;25 V

l

V

I

with Line

8V ";;V,N ..;;25 V

with Load

5 mA ";;IOUT";; 1.0 A

4.6

= 0.5

A, unless

4.2

TJ = 25°C

mA
0.8

mA

0.5

mA

Q uiescent Current Change

/

Output Noise Voltage

TA

= 25°C,

10 Hz ..;;f";;100 kHz

40

JJ-V

Long Term Stability
Thermal Resistance Junction to Case (Note 1 )

NOTE 1:

mV

10

°CI W

3.0

Without a heat sink, the thermal resistance is approximately 35° C/W. With a heat,sink, the effective thermal resistance can only
approach the values specified, depending on the efficiency of the sink.

TYPICAL PERFORMANCE CURVES FOR 109 AND 209
MAXIMUM AVERAGE POWER
DISSIPATION

OUTPUT IMPEDANCE

PEAK OUTPUT CURRENT

50

4.0

20

10

INFINITE
HEAT
SINK

/

~ ~~~~F~~NL~ '"

~

1"0.

1--680.75

i--.

VIN=10V=

r--

TA = 25"C ::

.....-

~'"

1-0..

-----..

3.01--+--+---+--+---+--1

/V'. / '

~

<>:
I

".
"- "\
I\.

NOHEA0
SINK

.----~-~-....---r----,-----,

>-

/

\

IL =20mA

1

J /

I

2.0

I----'-j~t==_io::--I--

!;

~

IL -500 mA..==

\\

I'-...

i

1

o

--"'"
..--

1.01-+-+--+--+----P_d-----l

0.5
25

50

75

100

125

150

100

1k

10k

lOOk

1M

5.0

10

FREQUENCY - Hz

AMBIENT TEMPERATURE -"C

15

20

RIPPLE REJECTION

DROPOUT VOLTAGE
2.5 .---,---,--.,---,-----,-,....--,--.---...,

~
z

B0r---+-~~~~~~~-~

2.0

1---.b--+--="",,,,:::+--4-+

1.0

r--t---t=""'"-",,=-t

0.5

r--t--t--t---+--+-

o

~

~.

601----+---t-----+---'IrII---',..,....-l

40

20~_~_~~_~_~_ _~

10

100

1k

10k

lOOk

1M

-75 -50

FREQUENCY - Hz

-25

0

25

50

75

100

JUNCTION TEMP.ERATURE -"C

5-37

25

INPUT VOLTAGE - V

125

150

30

35

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 109 • 209
TYPICAL PERFORMANCE CURVES FOR 109 AND 209 (Cont'd)

OUTPUT VOLTAGE

DROPOUT CHARACTER ISTIC
5.5

5.1

r---,---,---.,..--....--..,.---,

1.0~Ema~
I==$;J

" 1\

4.9

I--t---"'<:t--f-Hc....::..,.+---t-----l

f4.8
~

TJ = 25·C

I--t-F"Id-ttl-It--t-+-t-t++l++--+- CL = 0

........

5.0

5.0 I--+--+--+---J.,.,~+--l

4.5

,

-

t - - - t - - - t - - - t - - - - - 1 I - - I L = lA

OUTPUT NOISE VOLTAGE

~
~
I

~

«

~

\

0.1

0

>

w

(J)

~

r

VIN = 10 V
20
IL =

1
~

INPUT VOLTAGE - V

0.Q1
~

0

•

W

~

100

1. lW

10

10k

FR EOUENCY - Hz

QUIESCENT CURRENT
AS A FUNCTION
OF INPUT VOLTAGE

QUIESCENT CURRENT
AS A FUNCTION OF
TEMPERATURE
4.8

lk

100

JUNCTION TEMPERATURE -·C

VI~ = ld V
IL =20mA

4.6

5.0
TJ = 25·C

4.4

IL =0

4.2

4.0

3.8

~V

V

~

V

-

~r--

_f-

r.:::::: F====

IL = lA

4.0

=====-

~V

3.6
-75

/

,

_.-1"""

-

...........

3.0
-50 -25

0

25

50

75

100

125

150

10

JUNCTiON TEMPERATURE -·C

15

20

25

30

35

INPUT VOLTAGE - V

APPLICATIONS

FIXED 5 V REGULATOR"

TRACKING VOLTAGE REGULATOR

F----.>------'~----.----O +VOUT

INPUT

1-_-0

~~TPUT

4.7k

4.7 k

-VIN

o---+--......- . . J
O.33~F

NOTES:
* Required if regulator is located an appreciable
distance from power supply filter.
t Although no output capacitor is needed for
stability I it does improve transient response.

5-38

J

' - - - - - - - - - -......---o-VOUT

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 109 • 209,
APPLICATIONS (Cont'd)

ADJUSTABLE OUTPUT REGULATOR

. INPUT 0-_._--1

t--.-~

OUTPUT

Rl
300
1%

CURRENT REGULATOR

INPUT

•

0-__--1

~----o OUTPUT

NOTE:

* Determines output current.

POSITIVE AND NEGATIVE REGULATOR

t

OUTPUT

o 1 ~F

0.1

~F

-OUTPUT

5-39

309
FIVE VOLT REGULATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 309 is a monolithic 5 Volt Regulator constructed using the
Fairchild Planar* epitaxial process. This regulator employs internal current limiting, thermal shutdown
and safe-area compensation making it essentially indestructable. The 309 is intended for use as a
local regulator, eliminating noise and distribution problems associated with single point regulation.
If adequate heat sinking is provided, it can provide over 1 A output current. The 309 is intended
primarily for use with TTL and DTL logic and is completely specified under worst case conditions to
match the .power supply requirements of these logic families. In addition to use as a fixed 5 volt
regulator, this device can be used with external components to obtain adjustable output voltages and
currents and as the power pass element in precision regulators.

•

OUTPUT CURRENT IN EXCESS OF 1 AMP

•

SPECIFIED TO MATCH WORST CASE TTL AND DTL REQUIREMENTS

•

NO EXTERNAL COMPONENTS

•

INTERNAL THERMAL OVERLOAD PROTECTION

•

OUTPUT TRANSISTOR SAFE-AREA COMPENSATION

CONNECTION DIAGRAM
TO-3 PACKAGE
(TOP VIEW)
PACKAGE OUTLINE GJ

ABSOLUTE MAXIMUM RATINGS
Input Voltage

35V

I nternal Power Dissipation

I nternally Limited

Storage Temperature Range

-65°C to +150°C

Operating Junction Temperature Range

Case is connected to ground.

ORDER INFORMATION
TYPE
PART NO.
309
LM309K

O°C to +125°C

Lead Temperature (Soldering, 60 second time limit)

300°C

EQUIVALENT CIRCUIT
r---~------------~------------~------~~--,------,---oINPUT

R4

R18

100 k!l

500n

•

R5

3.3 kSl

r-.....--------+---.....--------.......~~-+---o OUTPUT

~--~--~--_4----~--_+------~--~--~~------~~----_oCOMMON

• Planar is a patented Fairchild process.

5-40

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

309

ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER

CONDITIONS

Output Voltage

TJ = 25°C

Line Regulation

TJ = 25°C

MIN.

TYP.

MAX.

5.05

5.2

V

4.0

50

rnV

50

100

rnV

4.8

7 V.;;;; V,N';;;; 25 V
Load Regulation

UNITS

TJ = 25°C
5 mA .;;;; lOUT';;;; 1.5 A

Output Voltage

7 V.;;;; VIN';;;; 25 V
4.75

5 mA .;;;; 'OUT';;;; 1.0 A

5.25

V

P';;;; 20W
Quiescent Current

7 V.;;;; VIN';;;; 25 V

Quiescent Current Change

I with

I with

10

5.2

rnA

Line

7V';;;;V,N';;;;25V

0.5

rnA

Load

5 mA';;;; lOUT';;;; 1.0 A

0.8

rnA

Output Noise Voltage

TA = 25°C
10 Hz';;;; f.;;;; 100kHz

40

J.LV

Long Term Stability

20

Thermal Resistance Junction to Case (Note 2)

rnV

3.0

°C/W

NOTES:
(1)

Unless otherwise spec"ified, these specifications apply for OOC .;;;; TJ';;;; 125°C, VIN = 10 V and lOUT = 0.5A.

(2)

Without a heat sink, the thermal resistance of the TO-3 package is approximately 35°C/W. With a heat sink, the effective thermal
resistance can only approach the values specified, depending on the efficiency of the sink.

TYPICAL PERFORMANCE CURVES
MAXIMUM AVERAGE
POWER DISSIPATION
50

PEAK OUTPUT
CURRENT

OUTPUT IMPE DANCE
4.0

--

VIN"IOV:::
TA "25°C

=

20

""",

10

--

INFINITE
HEAT SINK

- "'" "

I

680-75

NO HEAT
f=SINK

"'-

/

\

\

1

I

50

75

100

125

150

2
10

o
100

AMBIENT TEMPERATURE - °c

lk

10k

lOOk

5.0

1M

RIPPLE REJECTION

VOUT "1 4•5V
10

DROPOUT VOL T AGE
AVOUT

80

25

20

15

~

DROPOUT CHARACTERISTIC

l00rnV

I

IL"lA_

t--__.d::::---+-

60

4.5

20
10

--

IL • 200rnA
VIN "IOV
AV IN = 3V p-p

100

lk

10k

FREQUENC Y - Hz

lOOk

1M

25

50

100

JUNCTION TEMPERATURE - °c

5-41

35

5.5

5.0

40

30

INPUT VOLTAGE - V

2_5,--,----,----,----,-----,

2.0

-- ----

~=125°C

...............

FREQUENCY - Hz

100

TJ = 25°C

............................

III
I

IL "500rnA

0.5
25

I

1.0

\\

.............

If -........

/
'/

/

IL "lOrnA

...........

(

2.0

/

'\

_WAKEFIELD

~EATSINK

~

3.0

/'

-

4.0
5

T =125°C
J

!J
VI
"'"

!I
VJ

""'-T J =25°C
I

I NPUT VOLTAGE - V

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

309

TYPICAL PERFORMANCE CURVES (Cont'd)
OUTPUT VOL TAGE

QUIESCENT CURRENT

6.0 ,-----.----,.--.,.-----r----,

5.1 r - - - - r - - - - , - - . . , . - - - - , - - - - ,

V/N • 10V

-

--~

«E

5.01---+---+--+
.........
"""""""'·0;;::::-1----1

.......

I

",

~t:l

4.91---+---+--+---+----1

.5 _ _
5

r--~~'O

IL=IA~~

~

5.0 I---+---+--+---':~~""",""---l

~

I

~

I-----+-----+--+--VIN • IOV20mA
IL '1
4.8 l..-_....L_--L_ _...L......_-'-_---I
o
25
50
75
100
125

4.5l..-_....L_........L_ _...L......_-.l.._---..J
o
25
50
75
125
100
JUNCTI ON TEMPERATURE· °c

JUNCTION TEMPERATURE· °c

QUIESCENT CURRENT

OUTPUT NOISE VOLTAGE

6.0 r---,--r--r---,-..,----.-..,---,

IL = zo:l mA

V-

I--

/

5.0

~~.-

T '125°C

1"..- ~

~

~

T • 25°C

5.5

~

~...-l--

!O.I~~IIE~mIEEII
~

~

I
4.5
5.0

10

20

15

0.01 L-..l..-.Iu..J.J.I.I.l.L.-..l..-.Iu..J.J.I.I.l.L.-...L......L.L.L.J.WJ
10
100
Ik
10k

25

I NPUT VOLTAGE· V

FREQUENCY· Hz

APPLI CATIONS

FIXED 5 V REGULATOR

INPUT

309
CI*

0.22,..F

T

3

CURRENT REGULATOR

~ r--o ~~TPUT

INPUT

=:]

:= C2 t

1

~

309

r

~
RI"

NOTES:

NOTES:

* Required if regulator is located an appreciable

* Determines output current.

distance from power supply filter.
t Although no output capacitor is needed for
stability, it does improve transient response.

5-42

OUTPUT

~A78TOO
TRACKING VOLTAGE
REGULATOR

~A728
PRECISION VOLTAGE
REFERENCE

GENERAL D~SCRIPTION - The IJ,A728 is a Precision Voltage
Reference with excellent output voltage temperature coefficient and
long term stability. The device includes a zener diode reference, a
buffer amplifier and a heater circuit to maintain constant chip
temperature. The IJ,A728 offers unmatched performance in applica'bions
such as AID and D/A converters, precision voltage and current sources,
digital voltmeters and programable power supplies.

GENERAL DESCRIPTION - The IJ,A78TOO is a family of dual polarity
Tracking Regulators which provide balanced positive and negative,
regulated output voltages at currents up to 150 mA over the
temperature range. Output current can be easily boosted by the
addition of external pass transistors. I nitial output voltage accuracy for
prime grade devices is ±2%. In addition, the voltage can be adjusted
over a ± 10% range with the use of external components. The output
current is internally limited for device protection. This, in conjunction
with thermal shutdown circuitry, maintains chip temperature at a safe
level. I nternal compensation is included to maintain frequency stability.
The IJ,A78TOO series is available in the following output voltages.

•
•
•
•
•
•
•

1 ppmrC TYPICAL TEMPERATURE COEFFICIENT
10 ppm/1000 HOURS TYPICAL LONG-TERM STABILITY
LOW DRIFT AMPLIFIER
LOW OUTPUT IMPEDANCE
POSITIVE OR NEGATIVE OPERATION
LATCH-UP PREVENTION PROVIDED
ADJUSTABLE CHIP TEMPERATURE

•
•
•
•
•
•

BLOCK DIAGRAM

•
+15 V

DEVICE TYPE

OUTPUT VOLTAGES

78T05
78T06
78T12
7aT15
78T17
78T18

+ 5 V, - 5 V
+12 V, - 6 V
+12 V, -12 V
+15 V, -15 V
+ 5V,-12V
+18 V, -18 V

EXCELLENT OUTPUT VOLTAGE REGULATION (±1%)
INTERNAL AND EXTERNAL CURRENT LIMITING
INTERNALTHERMALSHUTDOWN
FIXED OUTPUT VOLTAGES
INTERNAL FREQUENCY COMPENSATION
AVAILABLE IN 10-LEAD METAL CAN (PACKAGE OUTLINE 9J) AND 14-LEAD POWER DIP (PACKAGE OUTLINE 9J)
MILITARY (-55°C to +125°C) AND COMMERCIAL (O°C TO
70°C) OPERATING TEMPERATURE RANGE
BLOCK DIAGRAM
V 1N +

0--------------,

10

POSITIVE
REFERENCE

NONINV
INPUT

v+

>--.......-OVo+

TEMP.
ADJ.
GNDo--.-+-.-~v_~------~

INVERTING
INPUT

>---+-OVo_
NEGATIVE
REFERENCE

-15 V

-=
V 1N __ O-----+-------~--...J

5-44

~A78MOO SERIES
THREE-TERMINAL POSITIVE VOLTAGE REGULATORS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The #LA78MOO series of Three-Terminal Medium Current Positive
Voltage Regulators are constructed using the Fairchild Planar* epitaxial process. These regulators
employ internal current limiting, thermal shutdown and safe-area compensation making them
essentially indestructible. If adequate heat sinking is provided, they can deliver up to 500 rnA output
current. They are intended as fixed-voltage regulators in a wide range of applications including local,
on-card regulation for elimination of noise and distribution problems associated with single point
regulation. I n addition to use as fixed voltage regulators,these devices can be used with external
components to obtain adjustable output voltages and currents and as the power pass element in
precision regulators.
•
•
•
•
•

CONNECTION DIAGRAM
TO-S TYPE PACKAGE
(TOP VIEW)
PACKAGE OUTLINE CS

'''~"'"

OUTPUT CURRENT UP TO O.S AMP
NO EXTERNAL COMPONENTS
INTERNAL THERMAL OVERLOAD PROTECTION
INTERNAL SHORT CIRCUIT CURRENT LIMITING
OUTPUT TRANSISTOR SAFE-AREA COMPENSATION

(1)

OUTPUT

(3)

(2)

ABSOLUTE MAXIMUM RATINGS
Input Voltage
(5 V, 6V,8 V)
(12V,15V)
(20 V, 24 V)
Internal Power Dissipation (Note 1)
Storage Temperature Range
Operating Junction Temperature Range (Note 2)
Military (78MOO)
Commercial (78MOOC)
Lead Temperature (Soldering, 60 second time limit)

30V
35V
40V
Internally Limited
-65° C to +200° C
-55°C to +175°C
O°C to +175°C
300°C

EQUIVALENT CIRCUIT

- - - - - - t - - - - - -.......- - - -.....- ........- -.......-~ INPUT

r - -.......

Rll
R5

3.3 kH

ORDER INFORMATION
OUTPUT
VOLTAGE
5V
6V
8V
12 V
15 V
20V
24V
5V
6V
8V
12 V
15 V
20V
24V

TYPE

PART NO.

78M05
78M06
78M08
78M12
78M15
78M20
78M24
78M05C
78M06C
78M08C
78M12C
78M15C
78M20C
78M24C

7SMOSHM
7SM06HM
7SMOSHM
7SM12HM
7SM15HM
7SM20HM
7SM24HM
7SMOSHC
7S·M06HC
7SM08HC
7SM12HC
7SM1SHC
7SM20HC
78M24HC

0.3H

.1--..----t--4------.....

- t - - - - Q OUTPUT
2

R20
0·25

kH

R6

Dl

2.7 kH

3
~-~-~-~--~-~---~-4_-4_----~--__oCOMMON

*Planar is a patented Fairchild process.

Notes on following pages.

5-45

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JLA78MOO SERIES
78M05 AND 78M05C
ELECTRICAL CHARACTERISTICS (VIN = 10 V, lOUT = 200 rnA, -55°C';;;; TJ .;;;; 150°C for 78M05 and O°C';;;; TJ';;;; 150°C for 78M05C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

= 25°C
TJ = 25°C
TJ = 25°C

MIN.

Load Regulation

I
I

V

3.0

rn~

5 rnA';;;; lOUT';;;; 0.5 A

25

rnV

5.0

V

5 rnA';;;; lOUT';;;; 200 rnA

= 25°C

4.2

rnA

with line

8 V.;;;; VIN .;;;; 25 V

0.2

rnA

with load

5rnA';;;;IOUT';;;;0.5A

0.1

rnA

40

p,V

Quiescent Current

TJ

Quiescent Current Change

I
I

UNITS

5.0

8.0 V.;;;; VIN .;;;; 20 V

Output Voltage

MAX.

7 V';;;; VIN .;;;; 20 V

TJ

Line Regulation

TYP.

= 25°C,

Output Noise Voltage

TA

10 Hz';;;; f.;;;; 100 kHz

Ripple Rejection

f

78

dB

Dropout Voltage

TJ

2.0

V

= 120 Hz, 8 V.;;;; VIN .;;;; 18 V
= 25°C, lOUT = 0.5 A
TJ = 25°C

Peak Output Current

rnA

750

78M06 AND 78M06C
ELECTRICAL CHARACTERISTICS (VIN = 11 V, lOUT = 200 rnA, -55°C';;;; TJ .;;;; 150°C for 78M06 and O°C';;;; TJ';;;; 150°C for 78M06C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

TJ

=

Line Regulation

TJ

= 25°C
= 25°C

Load Regulation

TJ

MIN.

25°C
8 V.;;;; VIN .;;;; 20 V
5 rnA';;;; lOUT';;;; 0.5 A

5 rnA .;;;; lOUT';;;; 200 rnA

Quiescent Current

I
I

= 25°C

rnV

30

rnV

6.0

V

4.3

rnA

0.2

rnA

with load

5 rnA .;;;; lOUT';;;; 0.5 A

0.1

rnA

45

/.LV

75

dB

2.0

V

TA

= 25°C, 10 Hz .;;;; f

.;;;; 100 kHz

= 120 Hz, 9 V.;;;; VIN .;;;;
= 25°C, lOUT = 0.5 A
TJ = 25°C

Ripple Rejection

f

Dropout Voltage

TJ

Peak Output Current

NOTE 1: Thermal resistance of the packages (without a heat sink)
Junction to Case. . . . . . . . . . . . . . . . . . . . . . . 20° C/W
NOTE 2: Operating Ambient Temperature Range

78MOOC

V

5.0

9 V.;;;; VIN .;;;; 25 V

Output Noise Voltage

78MOO

UNITS

with line

TJ

Quiescent Current Change

MAX.

6.0

I
I

9 V.;;;; VIN .;;;; 21 V

Output Voltage

TYP.

-55°C to +125°C
0° C to 85° C

5-46

19 V

750

rnA

0

Junction to Ambient . . . . . . . . . . . . . . . . . . . 170 C/W

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J,LA78MOO SERIES
7SMOS AN D 7SMOSC
ELECTRICAL CHARACTERISTICS (VIN = 14 V, lOUT = 200 mA, -55°C';;;; TJ .;;;; 150°C for 78M08 and O°C.;;;; TJ';;;; 150°C for 78M08C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

TJ

Line Regulation

TJ

Load Regulation

TJ

I

I

UNITS
V

6.0

rnV

6 mA';;;; lOUT';;;; 0.5 A

40

rnV

= 25°C

8.0

V

4.3

rnA

with line

11.5 V.;;;; VIN .;;;; 25 V

0.2

mA

with load

5rnA';;;;IOUT';;;;0.5A

0.1

mA

52

/-LV

72

dB

Quiescent Current

TJ

I

MAX.

8.0

5 rnA';;;; lOUT';;;; 200 rnA

I

TYP.

10.5 V.;;;; VIN .;;;; 25 V

11.5 V .;;;; VIN .;;;; 23 V

Output Voltage

Quiescent Current Change

= 25°C
= 25°C
= 25°C

MIN.

= 25°C,

Output Noise Voltage

TA

19 Hz';;;; f.;;;; 100 kHz

Ripple Rejection.

= 120 Hz, 11 .5 V .;;;; V IN';;;; 21 .5 V
TJ = 25°C, lOUT = 0.5 A
TJ = 25°C
f

Dropout Voltage
Peak Output Current

V

2.0

rnA

750

7SM12 AND 7SM12C
ELECTRICAL CHARACTERISTICS (VIN = 19 V, lOUT = 200 mA, -55°C';;;; TJ .;;;; 150°C for 78M12 and O°C.;;;; TJ';;;; 150°C for 78M12C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

TJ

Line Regulation

TJ

Load Regulation

TJ

I

UNITS

12

V
mV

5mA';;;;IOUT.;;;;0.5A

50

mV

12

V

= 25°C

4.3

mA

with line

15 V.;;;; VIN .;;;; 30 V

0.2

mA

with load

5 rnA';;;; lOUT';;;; 0.5 A

0.1

mA

75

/-LV

TJ

I

MAX.

10

5 rnA';;;; 200 mA

Quiescent Current

Output Noise Voltage

TA

Ripple Rejection

f

Dropout Voltage

TJ

Peak Output Current

I

I

TYP.

14.5 V .;;;; V IN';;;; 30 V

15.5 V .;;;; V IN';;;; 27 V

Output Voltage

Quiescent Current Change

= 25°C
= 25°C
= 25°C

MIN.

= 25°C,

10 Hz';;;; f.;;;; 100 kHz

= 120 Hz, 15 V';;;; VIN .;;;;
= 25°C, lOUT = 0.5 A
TJ = 25°C

5-47

25 V

71

dB

2.0

V

750

mA

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J,LA78MOO SERIES
78M15 AND 78M15C
ELECTRICAL CHARACTERISTICS (VIN = 23 V, lOUT = 200 rnA, -55°C";;; TJ";;; 150°C for 78M15 and O°C,,;;; TJ";;; 150°C for 78M15C,
un less otherwise specified)
PARAMETER
Output Voltage

TJ

Line Regulation

TJ

Load Regulation

TJ

I

I

with line
with load

UNITS

15

V

11

rnV

5 rnA";;; lOUT";;; 0.5 A

60

rnV

15

V

= 25°C

4.4

rnA

0.2

rnA

5 rnA ,,;;; lOUT";;; 0.5 A

0.1

rnA

90

/.LV

70

dB

2.0

V

TA

= 25°C,

10 Hz";;; f,,;;; 100 kHz

= 120 Hz, 18.5 V,,;;; VIN ,,;;; 28.5 V
= 1.0 A, TJ = 25°C, lOUT = 0.5 A
TJ = 25°C

Ripple Rejection

f

Dropout Voltage

lOUT

Peak Output Current

MAX.

18.5 V ,,;;; V IN";;; 30 V

TJ

I
I

TYP.

17.5 V ,,;;; V IN";;; 30 V

5 rnA";;; lOUT";;; 200 rnA

Quiescent Current

Output Noise Voltage

= 25°C
= 25°C
= 25°C

18.5 V ,,;;; V IN";;; 30 V

Output Voltage

Quiescent Current Change

MIN.

CONDITIONS

700

rnA

78M20 AND 78M20C
ELECTRICAL CHARACTERISTICS (VIN = 29 V, lOUT = 200 rnA, -55°C";;; TJ ,,;;; 150°C for 78M20 and O°C,,;;; TJ";;; 150°C for 78M20C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

TJ

Line Regulation

TJ

= 25°C
= 25°C
TJ = 25°C

Load Regulation

TJ

I
I

V

15

rnV

5 rnA";;; lOUT";;; 0.5 A

80

rnV

20

V

= 25°C

4.5

rnA

24 V,,;;; VIN ,,;;; 35 V

0.2

rnA

with load

5 rnA ,,;;; lOUT";;; 0.5 A

0.1

rnA

= 25°C, 10 Hz";;; f ,,;;; 100 kHz
= 120 Hz, 24 V,,;;; VIN ,,;;; 34 V
TJ = 25°C, lOUT = 0.5 A
TJ = 25°C

110

/.LV

69

dB

2.0

V

TA

Ripple Rejection

f

Dropout Voltage

UNITS

with line

Output Noise Voltage

Peak Output Current

MAX.

20

5 rnA";;; lOUT";;; 200 rnA

Quiescent Current

TYP.

23 V ,,;;; VIN ,,;;; 36 V

24 V ,,;;; V IN";;; 35 V

Output Voltage

Quiescent Current Change

I
I

MIN.

5-48

700

rnA

FAIRCHILD LINEAR INTEGRATED CIRCUITS • MA78MOOSERIES
78M24 AND 78M24C
ELECTRICAL CHARACTERISTICS (VIN = 33 V, lOUT = 200 rnA, -55°C';;;; TJ .;;;; 150°C for 78M24 and O°C.;;;; TJ';;;; 150°C for 78M24C,
unless otherwise specified)
PARAMETER

CONDITIONS

Output Voltage

TJ = 25°C

Line Regulation

TJ = 25°C

Load Regulation

TJ=25°C

27 V .;;;; VIN .;;;; 38 V
5 rnA .;;;; lOUT';;;; 0.5 A

28 V .;;;; V IN';;;; 38 V

Output Voltage

I
I

TYP.

MAX.

UNITS

24

V

18

rnV

100

rnV

24

5 rnA .;;;; lOUT';;;; 200 rnA

Quiescent Current
Quiescent Current Change

I
I

MIN.

V

TJ = 25°C

4.6

rnA

with line

28 V .;;;; V IN';;;; 38 V

0.2

rnA

with load

5 rnA .;;;; lOUT';;;; 0.5 A

0.1

rnA

T A = 25°C. Hz';;;; f.;;;; 100 kHz

170

pV

66

dB

2.0

V

Output Noise Voltage
Ripple Rejection

f = 120 Hz, 28 V.;;;; VIN .;;;; 38 V

Dropout Voltage

TJ = 25°C, lOUT = 0.5 A

Peak Output Current

TJ = 25°C

700

rnA

APPLI CA TI ONS

+ OUTPUT

-OUTPUT

POSITIVE AND NEGATIVE REGULATOR

-OUTPUT

~II
NEGATIVE OUTPUT VOLTAGE CIRCUIT

5-49

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J,tA78MOO SERIES
APPLICATIONS (Cont'd)
Vo
2

1

INPUT

I'A78MXX

OUTPUT

3

O.33I'F';

~ c/

-'-

NOTES:
To specify an output voltage, substitute voltage value for "XX".
+ Although no output capacitor is needed for stability, it does improve transient response.
++ Required if regulator is located an appreciable distance from power
supply filter.

FIXED OUTPUT REGULATOR

INPUT

o--.......- - f

CIRCUIT FOR INCREASING OUTPUT VOLTAGE

INPUT 0 - -.........-

I'A78MXX

1...-----.-..--0

....

t------+---.......~-.....-_o OUTPUT

I'A78MXX

OUTPUT

10k!"!

V OUT
Output Current = - - R1

ADJUSTABLE OUTPUT REGULATOR, 7 to 30 VOL TS

CURRENT REGULATOR

. .91_0_0-+_...,O.1I'F
.

*

-

VOUT

INPUTo-_-..._ _""""'2N378.,.9_ _ _ _ _ _ _ _ _ _ _ _ _---.

9.1k

3.on
F - - -...·~10k

I-

I'A78MXX

o33
. 1'F

VARIABLE OUTPUT VOLTAGE, 0.5 to 7 VOLTS

-

t=--t--+--oQ OUTPUT

HIGH CURRENT VOLTAGE REGULATOR

RSC

INPUT

30

4.7 k

-VIN 0 - - -.....-

HIGH OUTPUT CURRENT, SHORT CI RCUIT PROTECTED

....- - '

"'----------_--0

± TRACKING VOLTAGE REGULATOR

5-50

-VOUT

IJA78NOO
THREE-TERMINAL NEGATIVE VOLTAGE REGULATORS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ,uA78NOO series of monolithic three Terminal Negative Voltage
Regulators is specifically designed for emitter coupled logic (ECL) circuits. Three voltages are available:
-2.0 V, -4.0 V, and -5.2 V. The ,uA78NOO regulators are capable of providing output currents to
3A with adequate heat sinking. These regulators employ internal current limiting, thermal shutdown,
and safe-area compensation making them essentially indestructable. The output voltage is precision
trimmed to typically 0.5% and has excellent tolerance to variations with line voltage, load current,
and ambient temperature. The ,uA78NOO are intended as fixed-voltage regulators in ECL applications
including local, on-card regulation for elimination of noise and distribution problems associated with
si ngle point regulation.

•
•
•
•

CONNECTION DIAGRAM
TO-3PACKAGE
(TOP VIEW)
PACKAGE OUTLINE GJ

OUTPUT VOL TAGE TOLERANCE TYPICALLY 0.5% WITHOUT EXTERNAL TRIMMING
OUTPUT CURRENT OF UP TO 3 AMPERES
INTERNAL THERMAL OVERLOAD PROTECTION
OUTPUT TRANSISTOR SAFE-AREA COMPENSATION AND SHORT CIRCUIT PROTECTION

•

ABSOLUTE MAXIMUM RATINGS
-15 V
Internally Limited
-65°C to +150°C

Input Voltage
Internal Power Dissipation
Storage Temperature Range
Operating Temperature Range
Military (78NOO)
Commercial (78NOOC)
Lead Temperature (Soldering, 60 second time limit)

_55° C to +125° C
O°C to +70°C
300°C

BLOCK DIAGRAM
TYPICAL APPLICATION

COMMON

-INPUT

Current
Protection
Generator t----.----4~ Circuit
COMMON

-OUTPUT

-INPUT

Series

Pa ••
Transistor

* To specify an output voltage,
substitute voltage value for "XX".

5-51

GLOSSARY

VOLTAGE REGULATORS

Average Temperature Coefficient of Output Voltage - The
percentage change in output voltage for a specified change in
ambient temperature.

Output Noise Voltage - The rms value of the noise voltage
measured at the output with constant load current and no
input ripple.

Current Limit Sense Voltage - The voltage across the current
limit terminals required to initiate current limiting.

Output Resistance - The resistance seen looking into the
output terminal at a specified value of load current.

Dropout Voltage - The input/output differential voltage at
which the circuit ceases to regulate against further reductions
in input voltage.

Output Voltage Range - The range of regulated output
voltages over which the specifications apply.

Feedback Sense Voltage - The voltage measured on the
feedback terminal of the regulator, with respect to ground,
when the device is operating in regulation.

Output Voltage Scale Factor - The output voltage obtained
for a unit value of resistance between the adjustment terminal
and ground.

Input Voltage Range - The range of dc input voltage over
which the regulator will operate within specifications.

Quiescent Current - That part of the input current to the
regulator that is not delivered to the load.

Input/Output Voltage Differential - The value of difference
voltage between input and output outside of which the
regulator ceases to operate within specifications.

Reference Voltage - The output of the reference amplifier
measured with respect to the negative supply.
Ripple Rejection - The ratio of the peak-to-peak input ripple
voltage to the peak-to-peak output ripple voltage.

Line Regulation - The percentage change of output voltage
for a specified change in input voltage.

Short-Circuit Current Limit - The output current of the
regulator with the output shorted to the negative supply.

Load Regulation - The percentage change in output voltage
for a specified change in load current.

Standby Current Drain - The supply current drawn by the
regulator with no output load and no reference voltage load.

Long Term Stability - Output voltage stability under accelerated life test conditions after 1000 hours at maximum rated
voltage and power dissipation.

Temperature Stability - The percentage change in output
voltage over a specified ambient temperature range.
5-52

INDEX
Selection Guide ............................................. 6-4
DATA SHEETS
DATA TRANSMISSION
General Purpose
9614
Dual Differential Line Driver ................... 6-23
Dual Differential Line Driver ................... 6-27
9615
9620
Dual Differential Line Receiver ................. 6-36
Dual Line Driver .•............................ 6-42
9621
9622
Dual Line Receiver ............................ 6-48
55/75107A Dual Line Receivers ........................... 6-69
55/75108A Dual Line Receivers ............................ 6-69
55/75109
Dual Line Drivers ............................. 6-75
55/75110
Dual Line Drivers ............................. 6-75
8T13
Dual Single-Ended Line Driver ............ ; ... 6-114
Triple Line Receiver .......................... 6-117
8T14
RS-232-C/MIL-STD-188C
9616
Triple EIA RS-232-C/MIL-STD-188C
Line Driver ................................... 6-31
9617
Triple EIA RS-232-C Line Receiver ............. 6-34
9627
Dual EIA RS-232-C/MIL-STD-188C
Line Receiver ................................ 6-57
IBM Compatible
8T23
Dual Single-Ended Line Driver ................ 6-120
8T24
Triple Line Receiver .......................... 6-123
DISPLAY DRIVERS
LED
9660
9661
9662
9663
75491
75492
9307
93178
9617C
9368
9369
9370

Seven Segment Decoder/Programmable
Current Driver ............................... 6-146
Quad Programmable Current Segment Driver .. 6-146
Quad LED/Lamp Digit Driver .................. 6-147
Hex LED/Lamp Digit Driver ................... 6-147
MOS to LED Segment and Digit Driver ........ 6-110
MOS to LED Segment and Digit Driver ........ 6-110
Seven Segment Decoder ...................... 6-18
Seven Segment Decoder/Driver ................ 6-19
Seven Segment Decoder/Driver ................ 6-19
Seven Segment Decoder/Driver/Latch ......... 6-20
Seven Segment Decoder/Driver/Latch ......... 6-:21
Seven Segment Decoder/Driver/Latch ......... 6-22

MEMORY
Core Drivers
55/75325
Memory Driver ................................ 6-79
7524
Two Channel Core Memory Sense Amplifier .... 6-87
7525
Two Channel Core Memory Sense Amplifier .... 6-87
MOS Memory
75107A
Dual Line Receiver ............................ 6-69
75108A
Dual Line Receiver ............................ 6-69
SH0013
Two Phase MOS Clock Driver ................. 6-126
GENERAL PURPOSE DRIVERS
9624
9625
75450A
75451A

Dual
Dual
Dual
Dual

TTL, MOS Interface Element ..............
TTL, MOS Interface Element ..............
Peripheral Driver .........................
Peripheral Driver .........................
6-2

6-52
6-52
6-91
6~91

75452
75453
75454
75460A
75461A
75462A
75463A
75464A
SH2001
SH2002
SH2200

pual Peripheral Driver ......................... 6-91
Dual Peripheral Driver ......................... 6-91
Dual Peripheral Driver ......................... 6-91
Dual High Voltage Peripheral Driver ............ 6-91
Dual High Voltage Peripheral Driver ............ 6-91
Dual High Voltage Peripheral Driver ............ 6-91
Dual High Voltage Peripheral Driver ............ 6-91
Dual High Voltage Peripheral Driver ............ 6-91
High Voltage, High Current Driver ............. 6-131
DTL High Power Driver ...................... 6-135
High Voltage, High Current Driver ............. 6-139

01 A AND AID CONVERSION
J.lA722
9650
SH8090

10-Bit Current Source .......................... 6-9
4-Bit Current Source .......................... 6-60
10-Bit D/A Converter ........................ 6-143

Tape - Disc File Amplifier
J.lA733
Differential Video Amplifier .................... 6-12
Products to be Announced ............................... 6-145

,-.

Glossary ................................................. 6-148

INTRODUCTION
Interface circuits, a major category within
linear integrated circuits, perform the interface between
analog and digital systems. They can be categorized
by the function they perform.
Data Transmission
Display Driving
Memory Driving and Sensing
General Purpose Driving
DIA and AID Conversion
Tape and Disc File Amplification
Each device category can be described as follows:
1. Data Transmission, i.e., Line Driver and Receivers
These devices adapt TTL signal levels for transmission over data transmission line and back to TTL
signal levels at the receiving end of the transmission
line.
2. Display Drivers, i.e., LED Drivers
These devices convert MOS and TTL signal levels to
high output currents for driving LED displays.
3. Memory Driving and Sensing
These drivers convert TTL signal levels to the appropriate signal required by the memory system. The
sense amplifiers convert the small output signals
to TTL signal levels.
4. General Purpose Drivers, i.e., Peripheral Drivers
These devices convert TTL signal levels to high
voltage and current output levels.

5. 01A and AID Conversion and Tape and Disc File
Amplifiers
These devices perform specific function as their
name implies.
Interface circuits reduce overall system
complexity and greatly improve system performance.
Simplify your system - analog or digital - with
Fairchild linear circuits interface products.
6-3

•

SELECTION GUIDE FOR LINE DRIVER AND RECEIVER
DATA
TRANSMISSION
DISTANCE

SUGGESTED DEVICES

FORM OF CIRCUIT
OPERATION

CONSTRAINTS
DRIVERS

RECEIVERS

SIMPLEX OR HALF DUPLEX
Short Distance, Up to 10Ft.

Single Ended

7400 or 9000 Series

Transmission Lines Up to 10Ft.
With ;;'93 n Impedances

10 Ft. Up to 500 Ft.

Single Ended

9614
8T13

9615
8T14

Distance of Transmission
Limited by Environmental Noise

500 Ft. and Up

Balanced Differential

9614
75109/75110

9615
75107/75108

For Use in High Noise Environments
and Long Distance Data Transmission
Up to 4,000 Ft.

MULTIPLEX
Up to 500 Ft.

Single Ended

8T13

8T14

500 Ft. and Up

Balanced Differential

75109/75110

75107/75108

SPECIAL SPECIFICATIONS
EIA RS232C

9616

9617
9627

Implied Maximum Cable Length is 50 Ft.,
Maximum Modulation Rate is 20 k Baud
External Capacitor May Be Needed on
9616 to Control Rise and Fall to
5 - 15% of the Unit I nterval at the
Maximum System Modulation Rate

MIL-STD-188

9616

9627

IBM 360 - I/O Interface

8T23

8T24

SELECTION GUIDE FOR TRANSMISSION LINE DRIVERS

KEY FEATURES (Typical)

Supply Voltages

UNITS

9614

9616(1)

9621

9624(2)

V

+5.0

+12
-12

+5.0
+12

+5.0
(0 to -30)

Yes

Yes

Yes

Inputs TTL Compatible

75450

75109

75110

8T13(4)

8T23(4)

+5.0

+5.0
-5.0

+5.0
-5.0

+5.0

+5.0

Yes

Yes

Yes

Yes

Yes

Yes

SERIES(3)

VOH

V

+3.2

+6.0

+4.3

VTAP-0.5

+30 (max)

N/A

N/A

3.2

3.2

VOL

V

+0.2

-6.0

+0.2

VDD +0.2

+0.4

N/A

N/A

0

0

10 (On) Va = 2.0 V
Nominal Supplies

mA

-85

N/A

-250

-20
(Va = -10 V)

+300 (max)

+6.0

+12

-210

-210

10L (Off) Va = 0.4 V
Nominal Supplies

/-LA

N/A

N/A

N/A

N/A

100

100

100

500

40

ISC

mA

-90

+15to-15 -420

-20

N/A

+6.0

+12

+30

+30

tpd

ns

16

300

10

120

30

9.0

9.0

20

20

mW

87

83

60

20

30

180

300

160

160

Po per Channel

NOTES FOR LINE DRIVERS/INTERFACE DRIVERS
1.

The 9616 is a triple EIA line driver. Each driver incorporates an internal response control circuit. The slew rate is a maximum of 30 V//-Ls and a
minimum of 4 V//-Ls (3% of unit interval at 20 k baud). The two values for ISC are the typical VOH and VOL short circuit currents. The tpd is
measured from 1.5 V on the input to the output passing through the 0 V point. The delay is caused by the internally controlled slew rate of the
output. The 9616 meets the electrical interface requirements of EIA·RS·232C and the CCITT recommendation V.24. By using an external capacitor
from the output to ground for wave shaping, the 9616 will also meet the low level digital interface for MIL·STD·188C.

2.

The 96.24 dual TTL/DTL to MaS level converter is designed to operate with a VDD from 0 to -30 V.

3.

The VOH value is a maximum stand off voltage on the collector of the output device. 10 (on) is the maximum steady state current sinking
capability of the output device. 10 (off) is the maximum leakage current into the output with the output device off.

4.

The 8T13 and 8T23 have foldback current limited outputs. VOL is a typical VCE (sat) of the output transistor at collector currents of 100 mA
(VOL = 0.25 V) and 300 mA (VOL = 0.5 V).

6-4

SELECTION GUIDE FOR TRANSMISSION LINE RECEIVERS
OR SENSE AMPLIFIERS

KEY FEATURES
(Typical)

UNITS 9615 9617

Supply Voltages

V

Outputs TTL
Compatible

9620

9625

9627(1)

+5.0
-11 to -30

+12.0
-12.0

+5.0

9622

+5.0 to +12 +5.0 to -10

75107

75108

7524

7525

+5.0

+5.0
-5.0

+5.0
-5.0

+5.0
-5.0

+5.0
-5.0

Yes

+5.0

+5.0

Yes

Yes

Yes

Yes

Yes

Yes
Wired-OR

Yes

Yes

±0.5

+1.5

-3.01-9.0

±0.6
±2.4

+1.5

+1.5

±15

±10

N/A

±2.5

N/A

N/A

±3.0

±3.0

N/A

N/A

18

18

16

16

2.6

2.5
175

VTH

V

±0.5

+1.5

VCM

V

±15

±25
.)

Yes
Open
Yes
Collector

Yes

±0.025 ±0.025 ±0.04 ±0.025

RIN

kn.

7.0

4.0

2.4

5.0

22

3T07
or >6

Po

mW

175

100

110

140

60

234

315

315

130

130

175

ns

28

50

30

35

70

72

20

20

14

14

25

25

X

X

X

X

X

X

X

X

X

X

X

tpd
Differential Inputs

X

Output Enable

X

Respdnse Control

X

'.

X

Line Terminaator

X

X

Wired-OR Output

X

X

Failsafe Control
1.

8T14 8T24

X

X'"
X

X

X

X

X

X

X
C>

9627 Dual EIA RS-232/Mil-Std 188C Line Driver allows two levels of hysteresis and a choice of input resistances to satisfy both the EIA RS-232
and Mil-Std 188C electrical specifications.

GENERAL PURPOSE - HIGH CURRENT DRIVERS
High Current Drivers are designed with inputs TTL and/or MOS compatible and output stage capable of handline high currents. These circuits are ideal
as lamp, relay, LED, and memory drivers.

PERIPHERAL DRIVERS - 75450 SERIES • 75460 SERIES: Peripheral Drivers are dual monolithic circuits, each circuit consisting of a TTL logic
gate and a high current NPN transistor. The NPN transistors are guaranteed to sink 300 rnA and hold off 30 volts even when powered down, on high
voltage devices 60volt breakdown is guaranteed.

DEVICE
NUMBER

GATE
FUNCTION

CIRCUIT
FUNCTION

TRANSISTOR
CONNECTION MODE

CURRENT
CAPABILITY (TYP)

75450

NAND

N/A

External

300 mA at 0.7 V

75451

NAND

AND

Internal

300 mA at 0.7 V

75452

AND

NAND

Internal

300 mA at 0.7 V

75453

NOR

OR

Internal

300 mA at 0.7 V

75454

OR

NOR

Internal

300 mA at 0.7 V

300 rnA at 0.7 V

10 at VOUT

HIGH VOLTAGE (6UV Standoff)
75460*

NAND

N/A

External

75461*

NAND

AND

Internal

300 mA at 0.7 V

75462*

AND

NAND

Internal

300 mA at 0.7 V

75463*

NOR

OR

Internal

300 mA at 0.7 V

75464*

OR

NOR

Internal

300 mA at 0.7 V

6-5

•

AID AND DIA SYSTEMS

CURRENT SOURCES
J1,A 722
9650

VOLTAGE REFERENCE
10-Bit Current Source

J1,A 728

Precision Voltage Reference

4-Bit Current Source

D/A SUBSYSTEM

OPERATIONAL AMPLIFIER
SH8090

10-Bit D/A Converter

J1,A772

High Slew Rate Op Amp

LED DRIVERS

SEGMENT DRIVERS: LED Segment Drivers interface MOS and TTL signals to LED's. The currents can be set for low currents for continuous
operation or higher currents for multiplex operation.
DIGIT DRIVERS: LED Digit Drivers are used for multiplex operation for selection of the digit to be turned on. MOS and/or TTL signals are used to
select proper digit and each has high output current capability.

SEGMENT DRIVERS
DEVICE
NUMBER

INPUT
COMPA TI BI LlTY

BCD
DECODER

NUMBER
OF DRIVERS

MAXIMUM
CURRENTS

9660*

TTL and MOS

Yes

7+ Decimal

75 mA

9661*

TTL and MOS

No

4

75mA

75491

MOS

No

4

50 mA

9307

TTL

Yes

None

N/A

9317

TTL

Yes

7

40mA

9368

TTL

Yes

7

17 mA

9369

TTL

Yes

7

50mA

9370

TTL

Yes

7

25 mA

DIGIT DRIVER
NUMBER
OF DRIVERS

MAXIMUM
CURRENT CAPABILITY

DEVICE
NUMBER

INPUT
COMPATIBILITY

9662*

TTL and MOS

4

Vo at 10

9663*

TTL and MOS

6

Vo at 10

75492

MOS

4

Vo at

* New Products to be announced in 1973.

= 600 mA = 0.75 V Max
= 600 mA = 0.75 V Max
10 = 250 mA = 1. 7 V Max

SELECTION GUIDE FOR MEMORY SYSTEMS

CORE

TTL
INPUT

CORE
DRIVER

CORE
MEMORY

I---

I---

75325 - Core Memory Driver

CORE
SENSE AMP

TTL
OUTPUT

7524/25 - Dual Core Memory Sense Amplifier

MaS

MEMORY
SENSE
AMP

MOS
(1103)

75107/75108 -

TTL OUTPUT

Dual Sense Amplifier

MOS CLOCK DRIVER

SH0013 Two Phase MOS Clock Driver

TAPE AND DISC FILE AMPLIFIERS
pA733

Video Amplifier

pA 739

Dual Low Noise Preamplifier

6-7

•

IJA722
10-BIT CURRENT SOURCE
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The IlA722 is a monolithic high-speed, 10-8it Precision Current Source
intended· for use in current summing digital-to-analog converters or as the feedback element in
successive approximation analog-to-digital converters. It is constructed, using the Fairchild Planar*
epitaxial process, and consists of a reference supply, ten current sources connected to a single output
summing line, and associated logic switches. The full scale current and coding format are set by an
external resistor array, which may be preselected and fixed for general usage or trimmed for
greater accuracy. The IlA722 is compatible with the Fairchild families of linear and digital circuits.

•
•
•
•
•

CONNECTION DIAGRAM
24-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 3M
BIT CONTROL LOGIC INPUTS

A
Vi 'G,

G2 G3 G4

G s Gs G7 Ga Gg G lO'OUTPUT

12111098

7

654

3

2

1

000000000000

8 ± 1/2 BIT ACCURACY FROM O°C TO +55°C
7± 1/2 BIT ACCURACY FROM -20°C TO +85°C
600 ns SWITCHING SPEED
INTERNAL PRECISION REFERENCE
TTL COMPATIBLE

ABSOLUTE MAXIMUM RATI NGS
Voltage from V+ to V_
Voltage from Output to V+
Voltage from Output to V_
Voltage from Logic Inputs to Output
Voltage from Logic I nputs to V +
Voltage from Logic I nputs to V_
Internal Power Dissipation (Note 1)
Operating .Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 seconds)

-0.5 V to +18 V
-12 V to +6 V
V to +12 V
-9 V to +7 V
-18V to 0 V
o V to +12 V
450mW
-20° C to +85° C
-65°C to +150°C
300°C

o0000000'0 000

o

1314151617181920212223'24
V
REI RE2Re3RE4 RES ReGRE7 REa REg R EIO

+

FAEQ \

)

T

COMP

OUTPUTS TO RESISTOR ARRAY

Note: Pin 13 I nternally Connected to Case.

ORDER INFORMATION
TYPE
PART NO.
7228
722BFC
722C
722FC

EQUIVALENT CIRCUIT
- - - - - - - - - - - - - - - B I T CONTROL LOGIC I N P U T S - - - - - - - - - - - - - - - - - < .

1
r---+----r-+--__r___1r_---.--__+--.._-+--,r--+--~-+_-__r___1r_-_r___+--.._--O OUTPUT

_

BIT CONTROL
GATES

-

CURRENT SOURCES

24
PRECISION
VOLTAGE
SOURCE

I

-1

I
I

RE10

I

I
II

EXTERNAL
-RESISTOR
ARRAY

I

L _____________________________ J

*Planar is a patented Fairchild process.

Notes on following pages.

6-9

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA722
7228
ELECTRICAL CHARACTERISTICS
PARAMETER

CONDITIONS
(Note 2)

MIN.

TYP.

MAX.

±.07

10
±.20

Resolution
TA
Absolute Error

±.10

±.20

%

-20°C";; T A";; +85°C

±.13

±.39

%

Logic Inputs

Zero-Scale

2160

Logic Inputs

Power Supply Rejection

Bits
%

0° C ..;; T A ..;; +55° C

= 0.4 V
= 2.5 V
t:N+ = t:N_ = ±5%

Full-Scale

Output Cu rrent

= 25°C

UNITS

0.2

Output Resistance
Switching Speed

2560

3000

p,A

±.002

±.25

p,A

±.06

±0.1

%/%

1.2

Mn
ns

600

Input HIGH Voltage

2.1

2.5

V

Input LOW Voltage

0.4

0.7

Power Consumption

165

250

V

TYP.

MAX.

i..08

10
:!:.39

Bits
%

O°C..;; T A";; +55°C

±.17

±.39

%

-20°C";; T A";; +85°C

±.22

±.78

%

mW

722C
ELECTRICAL CHARACTERISTICS
PARAMETER

CONDITIONS
(Note 2)

MIN.

Resolution
TA
Absolute Error

Output Current

= 25°C

= 0.4 V
= 2.5 V
= AV_ = ±5%

Full-Scale

Logic Inputs

Zero-Scale

Logic Inputs

Power Supply Rejection

AV+

2160

Output Resistance

0.2

Switching Speed

UNITS

2560

3000

p,A

±.002

±.25

p,A

±.06

±0.1

%/%

1.2

Mn
ns

600
2.1

Input HIGH Voltage

V

2.5

I nput LOW Voltage

0.4

0.7

Power Consumption

165

250

V
mW

NOTES
(1) Rating applies for ambient temperatures to +85° C.
(2) Unless otherwise specified, T A = 25° C, V+ = 6.00 V ± 0.1 V, V- = -6.00 V ± 0.1 V, V out = 0 V, CI = 200 pF, and external resistor array as
per Table 1.
(3) In Table 1, the maximum absolute value tolerance for REI = ±10%.
TABLE 1
BINARY CODE RESISTOR ARRAY
FOR 8 ± 1/2 BIT ACCURACY
722B
TYPICAL FULL-SCALE
OUTPUT CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

Resistor
Number
(REJ)

Nominal
Value
(kil)

Nominal
Ratio
(REJ/REI)

Max. Ratio
Tolerance
Max. Ratio
(TA=25°C) Temp. Coeff.
(%)
(ppmrC)

722C
Max. Ratio
Tolerance
Max. Ratio
(TA=25°C) Temp. Coeff.
(%)
(ppmfC)

+0.2

+0.1
722B

...... ::::::-0. 1 /

~

...-::: ~

7~

~

"-

L
-0.2

-0.3

-20

20

40

TEMPERATURE

60

_oc

80

100

REl

2.547

1.000

Note 3

±5

RE2

5.094

2.000

±0.02

±5

±0.10

±20

RE3

10.245

4.022

±0.05

±10

±0.20

±50

RE4

20.60

8.088

±0.10

±20

±0.20

±50

RE5

41.43

16.265

±0.20

±20

±0.50

±100

RE6

81.93

32.17

±0.20

±50

±0.50

±100

RE7

163.4

64.16

±0.50

±100

±1.0

±500

RE8

325.7

127.9

±1.0

±200

±1.0

±500

RE9

644.9

253.2

±2.0

±500

±5.0

±1000

RE10

1275

500.8

±2.0

±500

±5.0

±1000

6-10

Note 3

±20

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA722
TYPICAL DIGITAL-TO-ANALOG CONVERTER

PARALLEL DATA IN
SERIAL DATA IN
DATA REGISTER

RESET
FULL·SCALE ADJUST

G1
12

+6.0V
-6.0V

13

>-......- 0 ANALOG DATA OUTPUT

200pF

C1

14

15

RE1

TYPICAL ANALOG-TO-DIGITAL CONVERTER

START/STOP CONVERSION
CLOCK

PROGRAMMER
AND
DATA REGISTER

RESET
PARALLEL DATA OUT
COMPARATOR DECISION

12r-"~~~"~--~"~~~

+6.0V

------I

13
200pF

C1

-6.0V __---4........1"--... 15 -

-

-

-

-

--

14~~~~~~~~r-~~~-'
ANALOG DATA INPUT

I
EQUIVALENT CIRCUIT

BiT CONTROL LOGIC INPUTS
FREQUENCY COMPENSATION

G5

G1

D23

6.2V

OUTPUTS TO RESISTOR ARRAY

6-11

~A733
DIFFERENTIAL VIDEO AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCU ITS

GENERAL DESCRIPTION - The p,A733 is a monolithic two-stage Differential Input, Differential
Output Video Amplifier constructed using the Fairchild Planar* epitaxial process. Internal series-shunt
feedback is used to obtain wide bandwidth, low phase distortion, and excellent gain stability. Emitter
follower outputs enable the device to drive capacitive loads and all stages are current-source biased to
obtain high power supply and common mode rejection ratios. It offers fixed gains of 10,100 or 400
without external components, and adjustable gains from 10 to 400 by the use of a single external
resistor. No external frequency compensation components are required for any gain option. The
device is particularly useful in magnetic tape or disc file systems using phase or NRZ encoding and in
high speed thin film or plated wire memories. Other applications include general purpose video and
pulse amplifiers where wide bandwidth, low phase shift, and excellent gain stability are required.
•
•
•
•

120 MHz BANDWIDTH
250 kn INPUT RESISTANCE
SELECTABLE GAINS OF 10, 100, AND 400
NO FREQUENCY COMPENSATION REQUIRED

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5F
G 1A
GAIN SELECT

INPUT 1

...---..:.0 OUTPUT 1

INPUT 2

L---.".a OUTPUT 2

G 1B
GAIN SELECT

Note:

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Differential Input Voltage
Common Mode Input Voltage
Output Current
Internal Power Dissipation (Note 1·)
Metal Can
Flatpak
DIP
Operating Temperature Range
Military (733)
Commercial (733C)
Storage Temperature Range
Lead Temperature (Soldering, 60 second time limit)

Pin 5 connected to case.

ORDER INFORMATION
TYPE
PART NO.
733
733HM
733C
733HC

±8V
±5V
±6V
10mA

10-LEAD FLATPAK

500mW
570mW
670mW

(TOP VIEW)
PACKAGE OUTLINE 3F
INPUT 2

_55° C to +1 25° C
0° C to +70° C
_65° C to +150° C
300°C

EQUIVALENT CI RCUIT

INPUT 1

G2B

G2A

G1B

G1A

v-

v+

OUTPUT 2

OUTPUT 1

ORDER INFORMATION
TYPE
PART NO.
733
733FM
RS
10k!1

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A
INPUT 2
7kU

R3
50!!

INPUT 1

OUTPUT 1

N.C.

N.C.

OUTPUT 2

G2B

G2A

G1B

G1A

R12
7k!1

vN.C.
OUTPUT 2

R14
400!1

v+
N.C.
OUTPUT 1

ORDER INFORMATION
TYPE
PART NO.
733
733DM
733C
733DC
*Planar is a patented Fairchild process.

Notes on following pages.

6-12

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A733
733
ELECTRICAL CHARACTERISTICS (T A

= 25°C, Vs = .:f:.6.0 V unless otherwise specified)

PARAMETER (see definitions)

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Differential Voltage Gain
Gain 1 (Note 2)

300

400

500

Gain 2 (Note 3)

90

100

110

Gain 3 (Note 4)

9.0

10

11

Bandwidth

RS = 50n

Gain 1

40

MHz

Gain 2

90

MHz

Gain 3

120

MHz

Risetime

RS = 50n, VOUT = 1 V p _p

Gain 1

10.5

Gain 2

4.5

Gain 3

2.5

Propagation Delay

ns
10

ns
ns

RS = 50n, VOUT = 1 V p _p

Gain 1

7.5

Gain 2

6.0

Gain 3

3.6

ns

4.0

kn

30

kn

ns
10

ns

Input Resistance
Gain 1
Gain 2

20

Gain 3
I nput Capacitance

Gain 2

250

kn

2.0

pF

Input Offset Current

0.4

3.0

Input Bias Current

9.0

20

Input Noise Voltage

RS = 50n, BW = 1 kHz to 10 MHz

Input Voltage Range

J.tA
J.tA
J.tVrms

12
.:f:.1.0

V

Comm'on Mode Rejection Ratio
Gain 2

"CM =.:f:.1 V, f~ 100 kHz

Gain 2

VCM=.:f:.1 V,f=5MHz

60

86

dB

60

dB

70

dB

Supply Voltage Rejection Ratio
Gain 2

Avs= .:1:.0.5 V

50

Output Offset Voltage
. ~.

Gain 1
Gain 2 and Gain 3

V

0.6

1.5

0.35

1.0

V

3.4

Output Common Mode Voltage

2.4

2.9

Output Voltage Swing

3.0

4.0

V
V _

Output Sink Current

2.5

3.6

rnA

Output Resistance

20

Power Supply Current

18

p p

n
24

mA

The following specifications apply for _55° C ~ T A ~ +125° C
Differential Voltage Gain
Gain 1 (Note 2)

200

600

Gain 2 (Note 3)

80

120

Gain 3 (Note 4)

8.0

12

Input Resistance
kn

8.0

Gain 2

5.0

J.tA

40
.:1:.1.0

J.tA
V

Common Mode Rejection Ratio

50

dB

Supply Voltage Rejection Ratio

50

dB

Input Offset Current
Input Bias Current
Input Voltage Range

Output Offset Voltage
Gain 1

1.5

V

Gain 2 and Gain 3

1.2

V
V _
pp
mA

27

mA

Output Swing

2.5

Output Sink Current

2.2

Positive Supply Current

6-13

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A733
733C
ELECTRICAL CHARACTERISTICS (TA = 25°C, Vs = .±.6.0 V unless otherwise specified)
MIN.

TYP.

MAX.

Gain 1 (Note 2)

250

400

600

Gain 2 (Note 3)

80

100

120

Gain 3 (Note 4)

8.0

10

12

CONDITIONS

PARAMETER (see definitions)

UNITS

Differential Voltage Gain

Bandwidth

RS = 50n

Gain 1

40

MHz

Gain 2

90

MHz

Gain 3

120

MHz

Risetime

RS = 50n, VOUT = 1 Vp-p

Gain 1

10.5

Gain 2

4.5

Gain 3

2.5

Propagation Delay

ns
12

ns
ns

RS = 50n, VOUT = 1 V p_p

Gain 1

7.5

Gain 2

6.0

Gain 3

3.6

ns

4.0

kn

30

kn

ns
10

ns

Input Resistance
Gain 1
Gain 2

10

Gain 3
Input Capacitance

Gain 2

250

kn

2.0

pF

Input Offset Current

0.4

5.0

p,A

Input Bias Current

9.0

30

p,A
p,V rms

Input Noise Voltage

RS = 50n, BW = 1 kHz to 10 MHz

12
.:1:.1.0

Input Voltage Range

V

Common Mode Rejection Ratio
Gain 2

VCM =.:1:.1 V, f~ 100 kHz

Gain 2

VCM =.:1:.1 V, f = 5 MHz

60

86

dB

60

dB

70

dB

Supply Voltage Rejection Ratio
Gain 2

50

Ilvs = .:1:.0.5 V

Output Offset Voltage
Gain 1
Gain 2 and Gain 3

0.6

1.5

V

0.35

1.5

V

3.4

V
V _
pp
mA

24

mA

Output Common Mode Voltage

2.4

2.9

Output Voltage Swing

3.0

'4.0

Output Sink Current

2.5

3.6

Output Resistance

20

Power Supply Current

18

n

Differential Voltage Gain
Gain 1 (Note 2)

250

600

Gain 2 (Note 3)

80

120

Gain 3 (Note 4)

8.0

12

8.0

Input Resistance-Gain 2

kn
6.0

I nput Offset Current

40

Input Bias Current
Input Voltage Range

tJA
tJA

.:1:.1.0

V

'"50

dB

Common Mode Rejection Ratio
Gain 2

V CM =.:1:.1 V, f~ 100 kHz

Supply Voltage Rejection Ratio
Gain 2

dB

50

tJ:..vS = .:1:.0.5 V

Output Offset Voltage (All Gain)
Output Voltage Swing

2.8

Output Sink Current

2.5

Power Supply Current

6-14

1.5

V
V _
pp
mA

27

mA

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA733

TYPICAL PERFORMANCE CURVES FOR 733 AND 733C
PHASE SHIFT
AS A FUNCTION
OF FR EQUENCY

"

-5

~

GAIN2
VS '±6VTA ' 25°C

"-

",,-

::::::::::
-50

"-

~t-.

r\

-20

1\

GAIN I

........

30
20

~ '"~
"'\

"-~

-250

....

~

5

I

012345678910

10

r-

H

ri

50

10

i

-;!

SOO 1000

100

S

10

FREQUENCY - MHz

FREQUENCY - MHz

COMMON MODE REJECTION RATIO
AS A FUNCTION
OF FREQUENCY
GAIN 2
VS' ±6V
TA ' 25°C

I'-..

OUTPUT VOLTAGE SWING
AS A FUNCTION
OF FREQUENCY

100

500 1000

PULSE RESPONSE
1.6

Vs" ±6V
TA ' 25°C
6.0 RL'lkQ

Vs' ±6V
TA' 2SoC
RL" lkQ

1.4
1.2

5.0

GAI~ 3 II'
( /
GAliN 2

1.0

............

0.8

4.0

r--,

..........

r-....

50

~
~~
~

FREQUENCY - MHz

7.0

100

.........

........

GAIN3

"'~~-

-300
-350

........

\

GAIN2

-;!

-25

., 90

r--

40

\\

-200

Vs' ±6V
T/\' 25°C

50

~\

-150

""""-

60

VS' ±6V
TA ' 25°C

~t'--

-100

~ -10

VOLTAGE GAIN
AS A FUNCTION
OF FREQUENCY

PHASE SHIFT
AS A FUNCTION
OF FREQUENCY

3.0

~ ~'NI

0.6

1\

L

0.4

1\

2.0

tV

0.2

\

J

1.0

-0.2

10

o

o

1M

lOOk

10k

10M

100M

I

5

DIFFERENTIAL
OVERDRIVE
RECOVERY TIME
1.6

/V

/

/

&l
'" 30

/
10

o
o

~

20

V

40

1.2

r
LJ

0.8
0.6

/

0.2

100 120 140

160 ISO 200

1.10

J---o

~

GAIN3

'\ I'-. ~-r-

..........

-

I---

I-

J
JI

0.2

J

20

60

TEMPERATURE - °c

-S

0

5

10

IS

20

25

30

35

~

0

TA '70 e

~

~

0

5

10

15

20

Vs ' :,:6V
RL'lkQ,_

'\~

I

.9

~,

~

\'

5

TA '12SOC-",
50 100

10

FREQUENCY - MHz

6-15

~

TA ' 25°C

1.3

1.0

0

140

30

VOLTAGE GAIN
AS A FUNCTION
OF SUPPLY VOLTAGE

,/

V

1.1

30

25

TIME - ns

1.4

-I0
100

~

-0.4

-10

0

\

~

-0.2

'0.4
-IS

20

"

25

~A ' 25°e -f---- I - -

"/

1.2

0.85

-20

TA ' -55°

0.4

40

\
-60

0.6 I---

0

\

0.80

Vs ' ±3V

60

I - -i--

20

~ ~- TA,=12soe L -

0.8 f---- I--f- TA 'O°C

Vs .1±6V

'"

11-

15

1.0

Vs' ±6V

GAIN VERSUS FREQUENCY
AS A FUNCTION
OF TEMPERATURE

~1-,

W

GAIN 21
VS ' :':6V_ I--RL'lkQ

TIME - ns

VOLTAGE GAIN
AS A FUNCTION
OF TEMPERATURE

\

S

1.2

'I
/'

0.4

DIFFERENTIAL INPUT VOLTAGE - mV

1.15

0

1.4

-0.2

SO

~

1.6

vsJ ±8

V
60

~

PULSE RESPONSE
AS A FUNCTION
OF TEMPERATURE

GAIN 2
TA" 25°C
RL'lkQ

1.0

~

~

TIME - ns

1.4

~ 50
;::
~ 40

-0.4

PULSE RESPONSE
AS A FUNCTION
OF SUPPLY VOLTAGE

V " ±6V
s
TA" 25°C
GAIN 2

60

500 1000

100

FREQUENCY - MHz

FREQUENCY - Hz

70

50

10

T ' -5sOe
A

ill

.8

~
J~

~~A,',ooe

.7 I--

'TA '25°e

.6

TA','70°c
1"11

500 1000

.5

V

/V' ~ ~
I--"

r"""""
./

~

V

V

~V

~

.4
3

SUPPLY VOLTAGE -

tV

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA733

TYPICAL PER FORMANCE CURVES FOR 733 AND 733C

OUTPUT VOLTAGE SWING
AS A FUNCTION
OF LOAD RESISTANCE

OUTPUT VOLTAGE AND
CURRENT SWING AS A
FUNCTION OF SUPPLY VOLTAGE
7.0

7.0

,./

../ ~V

,..,."

6.0

50

5.0

40

4.0

~V
:/""
~'/."-~'\

P

~~

3.0

c;~

o
3.0

4.0

5.0

7.0

6.0

8.0

Vs' ±6V
v I.I±~V
Sl I I

V'"

o

50

10

100 200

500

lk

5k

10k

-10

5

1

100

VOLTAGE GAIN
AS A FUNCTION
OF RADJ

VOLTAGE GAIN
ADJUST
CIRCUIT
1000

~~'.2~~~HZ

80

VS' ±6V
TA ' 25°C

0.2pF

T

70
60

/

50

0.2pF

V

'\

I'

-

"

100

""

T

40

1I
/V

~

"'- ~:-- ,...

10

o

10
1 2.0

lk

100

10

10k

Radj -

INPUT RESISTANCE
AS A FUNCTION
OF TEMPERATURE

SUPPLY CURRENT
AS A FUNCTION
OF TEMPERATURE
21

GAIN2
Vs' ±6V

SUPPLY CURRENT
AS A FUNCTION
OF
- - -SUPPLY VOLTAGE

28

TA ' 25°C

I

24

/

50
40

V
./

30

./

20

o

Q

20

60

10

VS' ±6V

10k

lk

100

10

SOURCE RES I Sf ANCE - Q

70

500 1000

100

FREQUENCY - MHz

GAIN 2
Vs' ±6V

90

50

10

LOAD RESI SfANCE - Q

INPUT NOISE VOLTAGE
AS A FUNCTION
OF SOURCE RESISTANCE

20

~ Vs:,±~V

/

SUPPLY VOLTAGE - +V

30

.~

10

/

1.0

1.0

"
\~

20

II

2.0

GAIN2
TA ' 25°C

30

,/

,,0-':

./

60

Vs' ±6V
TA • 25°C

TA' 25°C

6.0

GAIN VERSUS FREQUENCY
AS A FUNCTION
OF SUPPLY VOLTAGE

/

V

18

-20

r---. r-....

/~

17

/

/

20

"-[""'...

/

16

//

12

15

0

20

60

TEMPERATURE - °c

100

140

14
-60

/

/

16

./V

-60

//

19

/
-20

20

60

TEMPERATURE - ·C

100

140,

8

/
3
SUPPLY VOLTAGE -

±V

NOTES
1. Rating applies to ambJent temperatures up to 70°C. Above 70°C ambient derate linearly at 6.3 mW/oC for the Metal Can, 8.3 mW/oC for
the DIP and 7.1 mW/ C for the Flatpak.
2. Gain Select pins G1A and G18 connected together.
3. Gain Select pins G2A and G28 connected together.
4. All Gain Select pins open.

6-16

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA733
TYPICAL APPLICATIONS
OSCILLATOR FREQUENCY FOR
VARIOUS CAPACITOR VALUES

VOLTAGE CONTROLLED OSCILLATOR

106~-+~~--+--+-+~--~~-4~~~--~~~-+--+-+4~~

1051--+-t-+-+-'--t'-+-"""'~...t-----+---j-+++---jI---+-f-+-j-+---+--+-++--I

~v)

"

I
U

~~~

z

1

~

8

u

7

~A733

2

~

>

~

f"

u'

9 5

4

Voltage
. Control

,..

I

a~~_-I12N4360

()

V-

V c '" 0
I-----....J
Frequency Variation 3: 1

10k

1.0k

lOOk

1M

10M

FREQUENCY· Hz

PHASE ENCODING PLAYBACK SYSTEM
-6V

h

READ
HEAD

1~
2

f----..

7
d/dT

~A733

,~ 6

f----..

PASSIVE
LOW PASS
FILTER

~

~

SQUARE
AND
LIMIT

3 0

..... +6V

Phase Linearity:
Input Resistance:
Input Capacity:
Fixed Gain:

.:1::.4° from 2 to 5 MHz
30kn
2 pF

100

6-17

LOGIC
LEVEL
OUTPUT

•

TTL/MSI 9307
SEVEN SEGMENT DECODER
FOR ADDITIONAL INFORMATION SEE THE FAIRCHILD TTL DATA BOOK

DESCRIPTION - The 9307 is a Seven Segment Decoder designed to accept four inputs in 8421 BCD
code and provide the appropriate outputs to drive a seven segment numerical display. The decoder can
be used with seven segment incandescent lamp, neon, electro-luminescent, or CRT numeric displays.
The 9307 is compatible with all other Fairchild TTL devices.

LOGIC SYMBOL
7

1

2

6

3

5

9

15

9307

•
•
•
•
•
•
•

TTL COMPATIBLE
AUTOMATIC RIPPLE BLANKING FOR SUPPRESSION OF LEADING EDGE ZEROES
LAMP INTENSITY MODULATION CAPABILITY
LAMP TEST FACI L1TY
BLANKING INPUT
ACTIVE HIGH OUTPUTS
ALL CERAMIC "HERMETIC" 16-LEAD DUAL IN-LINE PACKAGE

ABSOLUTE MAXIMUM RATIN.GS (above which the useful life may be impaired)
Storage Temperature
Temperature (Ambient) Under Bias
VCC Pin Potential to Ground Pin
Voltage Applied to Outputs for HIGH Output State
Input Voltage (dc)

-65°C to +150°C
-55°C to +125°C
-0.5 V to +7 V
-0.5 V to +VCC value
-0.5 V to +5.5 V

4

13

12

11

10

14

VCC=PIN 16
GND=PIN 8

CONNECTION DIAGRAMS
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 68
16
15
14
13
12
11

LOGIC DIAGRAM

10

ORDER INFORMATION
TYPE
PART NO.
9307
9307DM
9307C
9307 DC
16-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 4L
16
15
14
13
12
11
10

d

@

9

@

®

o
6-18

~

= Pin Numbers

ORDER INFORMATION
TYPE
PART NO.
9307FM
9307
9307FC
9307C

TTL/MSI 93178· 9317C
SEVEN SEGMENT DECODER/DRIVER
FOR ADDITIONAL INFORMATION SEE THE FAIRCHILD TTL DATA BOOK.

DESCRIPTION - The 9317 is a TTL/MSI Seven Segment Decoder/Driver designed to accept four
inputs in 8421 BCD code and provide the appropriate outputs to drive a seven segment numerical
display. The decoder can be used to directly drive seven segment incandescent lamp displays and light
emitting diode indicators (or indirectly drive neon, electro-luminescent, numeric displays). The 9317 is
compatible with all members of the Fairchild TTL family.

LOGIC SYMBOL
712635

The 9317 is available in two output current and latch voltage versions, the 9317B and C.
9317

•
•
•
•
•
•
•
•
•
•

TTL COMPATIBLE
AUTOMATIC RIPPLE BLANKING FOR SUPPRESSION OF LEADING EDGE ZEROS AND/OR
TRAILING EDGE ZEROS
LAMP INTENSITY MODULATION CAPABILITY
LAMP TEST FACILITY
BLANKING INPUT
ACTIVE LOW OUTPUTS
ALL CERAMIC "HERMETIC" 16-LEAD DUAL IN-LINE PACKAGE
DRIVE LAMPS DIRECTLY
CODES IN EXCESS OF BINARY 9 DISABLE OUTPUTS
ENHANCED RELIABILITY WITH UNIQUE NUMERIC ONE DISPLAY POSITION

Address Inputs
Lamp Test (Active LOW) Input
Ripple Blanking (Active LOW) Input
Ripple Blanking (Active LOW) Output
(Active LOW) Outputs

a, b, c, d, e, f, 9

Vee = Pin 16
GND = Pin

16
A2
[f

4
5
6
7
8

1 Unit Load (U.L.) = 40J,LA HIGH/1.6 rnA LOW

OPTIONS
PARAMETER
Latch Voltage
Output Current (Pins 9 through 15)

LOGIC DIAGRAM

9317B

9317C

20 Volts
40mA

30 Volts
20 mA

@ @i:T

g

RBO
iiBf
A3
AO

GND

if

15
14
13
12
11
10
9

ORDER INFORMATION
TYPE
PART NO.
9317BDM
9317B
9317B
9317BDC
9317CDM
9317C
9317CDC
9317C
16-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 4L

RBi

0= PIN

8

CONNECTION DIAGRAMS
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 7B

LOADING
HIGH
LOW
1.0 U.L. 1.0 U.L.
5.0 U.L. 4.0 U.L.
1.0 U.L. 0.5 U.L.
1.5 U.L. 1.5 U.L.
See Options

PIN NAMES
AO, A1, A2, A3
LT
RBI
RBO

4 13121110 9 1514

4

16
15
14
13
12
11
10

8

9

ORDER INFORMATION
TYPE
PART NO.
9317B
9317BFM
9317BFC
9317B
9317C
9317CFM
9317CFC
9317C

NUMBER

6-19

•

TTL/MSI 9368
SEVEN SEGMENT DECODER/DRIVER/LATCH
FOR ADDITIONAL INFORMATION SEE SEPARATE DATA SHEET

DESCRIPTION - The 9368 is a TTL/MSI Seven Segment Decoder Driver incorporating input latches,
and output circuits to drive common cathode type LED displays directly.

LOGIC SYMBOL
712635

•
•
•
•
•
•
•

HIGH SPEED INPUT LATCHES FOR DATA STORAGE
DRIVES COMMON CATHODE LED DISPLAYS DIRECTLY
ACTIVE LOW LATCH ENABLE FOR EASY INTERFACE WITH MSI CIRCUITS
HEXADECIMAL DECODE FORMAT
LATCH SPEED COMPARABLE TO STANDARD MSI LATCHES
DATA INPUT FAN IN ZERO WHEN LATCH NOT ENABLED*
AUTOMATIC RIPPLE BLANKING FOR SUPPRESSION OF LEADING EDGE ZEROS AND/OR
TRAILING EDGE ZEROS
• PINOUT COMPARABLE WITH OTHER STANDARD MSI DECODERS SUCH AS 9307, 9317,
9357A (7446), 9357B (7447),9358 (7448),9359 (7449)

PIN NAMES

EL
RBI
RBO
a, b, c, d, e, f, g

9368
RBO a b c

4

13

12 11

d

e

f

9

10

9

15

14

Vee = Pin 16
GND= Pin

8

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B

LOADING
HIGH
LOW
2.0 U.L.
1.0 U.L. *
1.0U.L.
1.0U.L.
1.0 U.L.
1.0 U.L.
2.0 U.L.
2.0 U.L.
"OFF"
20mA

Address Inputs
Latch Enable
Ripple Blanking (Active LOW) Input
Ripple Blanking (Active LOW) Output
(Active HIGH) Outputs

AO, A1, A2, A3

AO AI A2 A3 EL RBI

16
15
14
13
12

* LOW level loading is 1 U.L..only when latch is enabled. When latch is disabled loading is 10 p,A.

11
10

NUMERICAL DESIGNATIONS
10

I-I
I_I

11

12

13

14

15

ORDER INFORMATION
TYPE
PART NO.
9368
9368DC

1-1-1111-1--11-11-11-111- 111II
I-I
III 111-11-1111_1111-

TYPICAL APPLICATION

BLOCK DIAGRAM

---------------1

7-SEGMENT DECODER
RBO a b c

I

d

e

f

9

I

DATA
INPUTS

OUTPUTS
LATCH

,----------------,

LATCH

I
I
I

LATCH

RBI--------a

D-------__

6-20

RBO

I
I
I

I
I
I
I
I
I
I
FAIRCHILD FND 70
LED
I
L_____ - - - - - - - - - ....I

TTL/MSI 9369
SEVEN SEGMENT DECODER/DRIVER/LATCH
FOR ADDITIONAL INFORMATION SEE SEPARATE DATA SHEET

DESCRIPTION - The 9369 is a TTL/MSI Seven Segment Decoder Driver incorporating input latches
and output circuits to drive common cathode type LED displays. The outputs will source up to 50 rnA
per output, with one resistor per output needed to limit the current.
•
•
•
•
•
•
•
•
•

LOGIC SYMBOL
712635

HIGH SPEED INPUT LATCHES FOR DATA STORAGE
DRIVES COMMON CATHODE LED DISPLAYS WITH UP TO 50 rnA PER SEGMENT
PROVIDES MULTIPLEX DRIVE FOR 10 LED's RATED AT 5 rnA AVERAGE PER SEGMENT
ACTIVE LOW LATCH ENABLE FOR EASY INTERFACE WITH MSI CIRCUITS
HEXADECIMAL DECODE FORMAT
LATCH SPEED COMPARABLE TO STANDARD MSI LATCHES
DATA INPUT FAN IN ZERO WHEN LATCH NOT ENABLED*
AUTOMATIC RIPPLE BLANKING FOR SUPPRESSION OF LEADING EDGE ZEROS AND/OR
TRAILING EDGE ZEROS
PINOUT COMPARABLE WITH OTHER STANDARD MSI DECODERS SUCH AS 9307,9317,
9357A (7446), 9357B (7447),9358 (7448)

PIN NAMES

4

13

d

12 11 10

e

f

9

9

15

14

Vee = Pin 16
GND = Pin 8

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B

LOADING
LOW
HIGH
2.0 U.L.
1.0U.L.*
1.0 U.L.
1.0 U.L.
1.0 U.L.
1.0 U.L.
2.0 U.L.
2.0 U.L.
"OFF"
50mA

Address Inputs
Latch Enable
Ripple Blanking (Active LOW) Input
Ripple Blanking (Active LOW) Output
(Active HI GH) Output Source Current

AO, A1, A2, A3
EL
RBI
RBO
a,b,c,d,e,f,g

9369
RBO a b c

16
15

•

14
13
12
11

1 Unit Load (U.L.) = 40 p,A HIGH/1.6 mA LOW
* LOW level lo.ading ,is 1 U.L. only when latch is enabled. When latch is disabled loading is 10 p,A.

10

NUMERICAL DESIGNATIONS
10

I-I
I_I

12

11

13

14

ORDER INFORMATION
TYPE
PART NO.
9369
9369DC

15

1-1-1111-1-11-11-11-111- 111II
I-I 11-1111-11-1111_1111-

TYPICAL APPLICATION
DATA
INPUT

BLOCK DIAGRAM

9369
7-SEGMENT DECODER

---------------l

RBO a b c

d

e

f

9

I
I

7-CURRENT .
LIMITING RESISTORS

DATA
INPUTS

OUTPUTS
LATCH

,---------------,
LATCH

I
I
I
I
I

LATCH

RBI-------.a

IC)-------..;_RBO

I
I

L_ _ _ ..:-. _ _ _ _ _ _ _ _ _ _

6-21

I
I
I
I
I

I
I
....J

TTL/MSI 9370
SEVEN SEGMENT DECODER/DRIVER/LATCH
FOR ADDITIONAL INFORMATION SEE SEPARATE DATA SHEET

DESCRIPTION - The 9370 is a TTL/MSI Seven Segment Decoder Driver incorporating input latches
and output circuits to drive incandescent displays directly. It can also be used to drive common
anode LED displays in either a multiplexed mode or directly with the aid of external current limiting
resistors.

LOGIC SYMBOL
7

1

2

6

3

5

AO Al A2 A3 EL RBI

•
•
•
•
•
•
•

HIGH SPEED INPUT LATCHES FOR DATA STORAGE
25 rnA SINK CAPABILITY TO DRIVE EITHER INCANDESCENT OR COMMON ANODE LED
DISPLAYS
HEXADECIMAL DECODE FORMAT
ACTIVE LOW LATCH ENABLE FOR EASY INTERFACE WITH MSI CIRCUITS
DATA INPUT LOADING ESSENTIALLY ZERO WHEN LATCH IS DISABLED*
AUTOMATIC RIPPLE BLANKING FOR SUPPRESSION OF LEADING EDGE ZERO'S AND/OR
TRAILING EDGE ZERO'S
PINOUT COMPATIBLE WITH OTHER STANDARD MSI DECODERS SUCH AS 9307, 9317,
9357A (7446), 9357B (7447),9358 (7448)

PIN NAMES

a,b, c, d, e, T, 9

4

13

d

12 11 10

e

f

9

iii
9

15

14

Vee = Pin 16
GND = Pin 8

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B

LOADING
HIGH
LOW
2.0 U.L.
1.0 U.L.*
1.0 U.L.
1.0 U.L.
1.0 U.L.
1.0U.L.
2.0 U.L.
2.0 U.L.
1.0 U.L.
2.0 U.L.
"OFF"
25 mA

Address Inputs
Latch Enable
Ripple Blanking (Active LOW) Input
As an Output
As an Input
(Active LOW) Open Collector Outputs

AO, A1, A2, A3
EL
RBI
RBO
RBO

9370
RBO a b c

16

15
14
13
12
11

10

*

LOW level loading is

U.L. only when latch is enabled. When latch is disabled loading is 10 }.LA.

NUMERICAL DESIGNATIONS
10

I-I
I_I

11

12

13

14

ORDER INFORMATION
TYPE
PART NO.
9370
9370DC

15

1-1-1111-1-11-11-11-111- 11111--1-1 11-1111-11-1111_1111-

TYPICAL APPLICATION
DATA
INPUT

BLOCK DIAGRAM

9370
7-SEGMENT DECODER

---------------l
I
I

DATA
INPUTS

OUTPUTS
LATCH

.----------------,
LATCH

LATCH

I

I

I
I

I
I

I

I

I

I

I
RBI-------

J

INPUT PULSE

1

~

~

I

b,s
2kO

510
5%

r

/.1

.....

A

....

±~1

~

1"

~.
I
Vour (A)

I

't. -'PHL
VM

I

H'PLH
VOUT (8)

I-

INPUT PULSE
Frequency = 500 kHz
Amplitude = 3.0 ±0.1 V
Pulse Width = 110 ± 10 ns
tr = t f :::; 5.0 ns

Fig. 1

6-24

ov

'PLHi-,
I
'PH~

3.0V

VM

~

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9614
TYPICAL ELECTRICAL CHARACTERISTICS

ACTIVE PULL-DOWN
OUTPUT LOW CURRENT
AS A FUNCTION OF
OUTPUT LOW VOLTAGE
100

/~ V

TA =ksoc


8

~

~
o

2.0

4.0

6.0

8.0

0

20

60

100

140

T A - AMBIENT TEMPERATURE - °c

SUPPLY CURRENT
AS A FUNCTION OF
TEMPERATURE

SUPPLY CURRENT
AS A FUNCTION OF
OPERATING FREQUENCY
100

VCC=5.0V
CL =30pF

/

E

/

f-

~ 60

,.-

30

~

........ j--

::;
&
iil

. . .V

.-....-

40

u
u

25

20
-60

10

-20

I

IpHL

~ 10 f-;:::;: ~

~

-60

-20

O.S

0.2

1.0

2.0

S.O

10

f - FREQUENCY - MHz

TRANSFER CHARACTERISTICS
AS A FUNCTION OF
SUPPL Y VOL T AGE

VCC=5.0V

~----+--+-+::t=~TA~=2~5~oC~-=lI--=::j

V

/'

K_

0

I----t--+--+-+-+-+--I---+--I

~
f-

~ 2.0

-.... ...

5
~

l

iii

0.1

140

TA=55°C-1--

~ 3.0
~

/

-

100

..--~----r--""'---"--..----r-...,

~

~
~

60

TA=125°C

'" 4.0
~

UJ

~

o

20

TRANSFE R CHARACTE RISTICS
AS A FUNCTION OF
TEMPERATURE
5.0

20

0

TA - AMBIENT TEMPERATURE _oC

30

o

-20



o

j)

40

!;;

2.0

~

h

PROPAGATION DELAY TIME
AS A FUNCTION OF
TEMPERATURE

~

I'

f-

> 0.5

VOH -OUTPUT HIGH VOLTAGE-VOLTS

Vcc -SUPPLY VOLTAGE- VOLTS

I

""'""-

35

i

If

u
u
.... 10

............

,--- -

~

fJ'S'?
90S'?

30

o

E

~ff
-#
&~

g§

--

80
,

t.....

g

S 3.0 r- ~

~
~ ~r-~~--~-+--+--+~~~

~
>

~

"""-

;;-~

~

~ ~ f---+----1~"'f-

I

.tsv

-

,- ~

o

-

S.O

VIN

7.0

I

1

~

o

-~

~

I

VCC

INPUT/OUTPUT TRANSFER
CHARACTERISTIC
AS A FUNCTION OF
TEMPERATURE

~2kO-

v~2kO
IN
-

6.0

~
g

l

3.0

~

1

A

___ VCC"S:OV

!5
~

r

2.0

I

I"'"

T)ZSoC

1-

1.0

g

0.1

~.4

0.2

TA " _55°C

g

,-----

1

-0.3

0.1

0.1

-0.2

5.0

-

vT)ZSOC

~

~ 2.0

0.3

~I

Vcc "4.5V

~

a

V

2.0

~

o

~

/

0

V

}-2.0

~

VIN"" STROBE INPUT VOLTAGE - VOLlS

~

~

~

5

V

-4.0

\
0

/

-6.0
~

W 52025

V

/
~

~

4

~

0

5

m e

20

25

VIN -INPUT VOLTAGf - VOLlS

VCM - COMMON MODE VOLTAGE -VOLlS

SWITCHING TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE.

POWER SUPPLY CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

POWER SUPPLY CURRENT
AS A FUNCTION OF
POWE R SUPPLY VOLTAGE

/

/

z

VDIFF • 2.0V

4.0

/

c

I--

•

L

_ vcc' 5.0V
UNTESTED INPUT" OV

VCc' o.OV
3.0

4.0

3.0

4.0 -T "25°C
A

>8 1.0
2.0

2.0

:!

~ 2.0

1.0

1.0

1.0

INPUT CURRENT
AS A FUNCTION OF
INPUT VOL TAGE
6.0

'::17 VOIFF " -2.0V

~

>~
o

o

VIN -STROBE INPUTVOLTAGE-VOLlS

3.0

I

o

o

0.4

TA "ZS c

I!! 4.0

g

\

TA '-55°C

0.2

~

Vcc "5.0V

~

l"'\

3.0

!5

,

~.5V

2•0

Vcc 5.5J

5.0

~
:;
g

Vce

OUTPUT VOL TAGE
AS A FUNCTION OF
COMMON MODE VOLTAGE

VCC .I S• OV

~

"\

~ 3.0

VIN -INPUT VOLTAGE - VOLlS

6.0

4.0

.-.::::::. ~VCC"5.0V

1.0

STROBE INPUT/OUTPUT
TRANSFE R CHARACTE RISTIC
AS A FUNCTION OF
AMBIENT TEMPERATURE

I

"~5oe

!5

VIN -INPUT VOLTAGE -VOLlS

g ~:

~

i

g

1.0

-0.1

~

>0

I

-0.2

~

T
A

1

~

I

0.0

M

6.0

.1

I-- VCC "4.SV

>8

00

~

5.0 r--VCC "5.5V

"-

T "IZSoc

0 20

~

~ 4.0

1-,.- --VCC)SV

CC "4.5V
IOL'ISrnA
VOIFF " O.SV

STROBE INPUT/OUTPUT
TRANSFER CHARACTERISTIC
AS A FUNCTION OF VCC

vcc

Vi)5.0V

 1.0

IOL - OUTPUT LOW CURRENT - rnA

~

...... 1\

t

,;>

I....- ~

.......- ....-

I

"",,-".1

f-- f-- I- VCC" 4.SV

...~ 2.0

~

------...
V~C

70

70

00

00 r- VIN " -3Vto-t3V

Vcc • S.OV

<

E

!
i

00f--~--+----1--~--+----1~~

50

! so

~f--~--~~~-r4-+-~--~

a

I

~

I

~f--~--+-~~~~~~--~

~
~

~

~

~

Vec = 5.5V
~

~

~

10 t---t----f*'"-+

+ INPUT" VCC -

o

1.0

2.0

3.0

-INPUT'" OV--

4.0

5.0

6.0

Vcc- POWER SUPPLY VOLTAGE - VOLlS

7.0

o

-60

f-

--

II

10

o~~--~~---L--~~--~

I

-~

......

~

-

~2O

_~ 20

tpLH
RL" 3.9kO
CL'~PF~

50

-20

0

20

~

60

M

10

100 120

TA - AMBIENTTEMPERATURE _oc

6-29

20

I~

V

-"'1--.

-

V
~

V

tpHL
RL" 3900/
CL "~pF

/v

V
V·

o
-60

-~

-20

0

20

~

60

M

100

TA -AMBIENT TEMPERATURE-oC

120

I~

FAIRCHILD LINEAR INTEGRATED CIRCUITS- 9615
·SWITCHING TIME TEST CI RCUIT

WAVEFORMS

_----"'-t---

Vee

+3.Q

Q.QV

$

~

""'"-----3.QV
+3.QV

-J~H' ~ -!t..:H~~:~

10---+-"'--<> vOUT

~1000.----1

(*USE VIN OR V IN • GROUND OTHER INPUT)

------1-.

1.5V

Photograph of a 9615 switching
differential data in the presence
of high common mode noise.

IN A+
IN A-

A_[
VERTICAL

= 2.0 V DIV.

HORIZONTAL

Fig. 2
STANDARD USAGE
DRIVER SYSTEM

RECEIVER SYSTEM

H

LINE

L.._ _ _

!=*===<'~==:i==:__

9_61_5_

..

TTL LOGIC

For example of operation see 9614 data sheet application section.

Fig. 3
FREQUENCY RESPONSE CONTROL
FREQUENCY RESPONSE
AS A FUNCTION OF
CAPACITANCE
10M
Vee" 5.0V

TA ' 25°e
1M

"-

O!

~l00K

"

§

~

10K

"-

1K

>

Note: CR
.01 p.F may cause slowing of rise
and fa" times of the output.

100
.001

Fig. 4

6-30

"
.01

0.1

1.0

eR "CAPACITANCE "IlF

10

= 50 ns/DIV.

9616
TRIPLE EIA RS-232-C/MIL-STD-188C LINE DRIVER
FAIRCHILD LINEAR INTEGRATED CI,RCUITS

GENERAL DESCRIPTION - The 9616 is a Triple Line Driver which meets the electrical interface
specifications of EIA RS-232-C and CCITT V.24 and/or MIL-STD-188C (by the appropriate device
selection). Each driver converts TTUDTL logic levels to EIA/CCITT and/or MIL-STD-188C logic levels
for transmission between data terminal equipment and data communications equipment. The output
slew rate is internally limited and can be lowered by an external capacitor; all output currents are short
circuit limited. The outputs are protected against RS-232-C fault conditions. A logic HIGH on the
inhibit terminal interrupts signal transfer and forces the output to a -V OUT (EIA/CCITT MARK state).

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

For the complementary function, see the 9617 Triple EIA RS-232-C Line Receiver and the 9627 Dual
EIA RS-232-C and MIL-STD-188C Line Receiver.

INPUT A1
INPUT A2
INHIBIT A

•
•
•
•
•

INTERNAL SLEW RATE LIMITING
MEETS EIA RS-232-C AND CCITT V .24 AND/OR MI L-STD-188C
LOGIC TRUE INHIBIT FUNCTION
OUTPUT SHORT CIRCUIT CURRENT LIMITING
OUTPUT VOLTAGE LEVELS INDEPENDENT OF SUPPLY VOLTAGES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
I nput or I nhibit Voltage
Output Signal Voltage
Maximum Power Disipation (Note 1)
Storage Temperature Range
Operating Temperature
(9616)
RS-232
Mil-~td-188
RS-232
(9616C)
RS-23:t
Mil-Std-188
(9616E)
Lead Temperature (Soldering, 60 seconds)

OUTPUT A
INPUT C
INHIBIT C
GND

ORDER INFORMATION
TYPE
PART NO.
9616
9616 OM
9616C
9616 CDC
9616E
9616 EDC

±15 V
-1.5 to +6.0 V
±15 V
630mW
-65°C to +125°C
_55° C to +125° C
O°C to 75°C
O°C to 75°C
300°C

TRUTH TABLE

EQUIVALENT CIRCUIT (One of three channels)
INHIBITo---K,t--....,...---"IV\r-p------

~100~~~r-~~--+--+--+--~
:>:

I,

o

o

20

"

po
"4.5V-

iCC

o
> 1.0

15

!3

1\..'

~200r--r~--~~--~~~~~
!::;

10

13.0

I\..

g

5.0

3.5

VCC2 " 12V
TA " 25°C

-0.5

-1.0

""""- "

)

""" '"
""

-1.5

-2.0

--

I

~

~

120

~ 4.0

o

o

50

~

5.0

~

4.0

g
~

~

.....

12

-300

~
!::;
g

~

~

-12

-18
-15

/

200

I

VIN "5 ·0V
1

VIN " 2.. 0V",
VIN " 0.5V-

,!

1

-15

-5.0

0

5.0

15

POWER OISSIPATION
AS A FUNCTION OF
AMBIENT TEMPERATURE
300

V • 5.0V
CC1
VCC2 ' 12V

250

~
~ 200

/V

40

-

I-- I--

-I-

---

~

~

\'\~\C-~
f-'""'"

I'·ip,cjl.~'r--

B'i

150

-- J--- ~O @ Vce~cC2 • 13.2V

~

100

-= - -

;::;

-

50

3.0

9.0

15

25

VCM - INPUl COMMON MODE VOLTAGE - VOLTS

20

-3.0

It
II

(SeY9'it

-25

60

~
;:::

liN - INPUT CURRENT - rnA

1'1-

I

I

SEE FIG. 2

/

/

500

!

3.0

o

250

80

I
-9.0

300

SWITCHING TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

/

:>

100

yl N "1-0.5~ TO lOY

I

-;- -6.0
z

0

1.0

.J
150

100

j

0

-100

52 .0

/
II

/

::- 6.0

r-- p

..;'

INPUT VOLTAGE
AS A FUNCTION OF
INPUT CURRENT
VCCI "5.0V _T A ' 25°C
~C2 "12V

~

1

J../..

'!vcc1 '4Jv
--

II>

VOIFF ' DIFFERENTIAL INPUT VOLTAGE - mV

18

I'

7"

VCC1 "5.0V
V
" 12V TA " 25 C
CC2

6.0

TA .75°\......

I
I

V
CC2 : 12.0,V __

7.0

'-

~~

lA· 125°f ......

j"

TYPICAL VOUT
AS A FUNCTION OF VCM
CHARACTERISTICS

'25°~

~

r'j"

VOIFF - DIFFERENTIAL INPUT VOLTAGE - mV

If! / /
TA " O°C ::.. 11
I I
TA
I
I

> 1.0

140

1

-500

TA ' -55~C

g

-r

o

200

160

A~TENJATORII NPJTS

II

I
100

60

I1

VCC "13.2V __
1.0 I ,'2

TYPICAL VOUT

VCC2 " 12V

.1

5.0

AS A FUNCTION OF VOIFF
TRANSFER CHARACTERISTIC
VCC1 "5.0V

20

V I" 5.6v VCCI ".;.5V
"
CC I "

r--

1

80

40

0

• TA "AMBIENTTEMPERATURE - °c

I

VOIFF - DIFFERENTIAL INPUT VOLTAGE - mV

5.0

-20

rCC2; 10.Sr,-.< )

VCC "5.0V TA '25 °C
I
VCC "12.0V
t- 12

o

-60

lA' 25°C
ATTENUA10R INPUTS

6.0

I

'I

-

o

-3.0

AND 5
-- i:INS4
ATTENUATO INPUTS

PI NS 3 AND 6 01 R~Cll NPU1S

-

~

r-....

-2.5

r I

10L D15mA

TYPICAL VOUT
AS A FUNCTION OF VOIFF
TRANSFE R CHARACTER ISTIC

I

> 1.0

v-cc - 4.5V
i
VCC -IO.SV-

1.0
0.5

7.0

g

o

g

~ 1.5

r-....
t'-..
r-....

5.0

-

2.5

~ 2.0

VeCI " 5.0V

TYPICAL VOUT
AS A FUNCTION OF VOIFF
TRANSFER CHARACTERISTIC

!r

10H D-0.2mA

<.:>

10H - OUTPUT HIGH CURRENT - rnA

IOL - OUl PUl LOW CURRENT -rnA

~ 4.0

-

o

-60

-20

0

20

60

100

lA - AMBIENT1EMPERATURE_oC

6-38

140

o

I
Po

CC1 ·5.0V VCC2 '

i2:o\l--

p@VI~
D1 CC - 4.5V Vce • 10 SV ~

-- -

·60

@V

I'I

-20

0

20

1

I' 2

'1

60

100

lA - AMBIENT lEMPERATURE- °c

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9620

ST ANDARD USAGE

I

DRIVER SYSTEM

COG'C

H

i

""DRMR

I

LINE

RECEIVER SYSTEM

H

:

~r-H
i

"20

CO"'C

I

Fig. 1 SWITCHING TIME TEST CIRCUIT

VCC1 = 5.0 V
VCC2 = 12 V

WAVEFORMS

~0.5V

OV~50%
V

IN

~

05V~0%
50%

•

' "-t:---1
, ~ -'''"c

OV

1.5V

Photograph of a 9620 switching
differential data in the presence
of high common mode noise.

A+~

A. ~o-

A+(

J

'"'At

A_(

VERT

=

6-39

2.0 V/div. HORIZ

=

50 ns/div.

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9620
APPLICATIONS (Cont'd)

DIGITAL COMPARATOR WITH
DIODE REFERENCE AND
HIGH LEVEL LOGIC OUT

DIGITAL DJFFERENTIAL LINE
RECEIVER WITH INPUTS
ROLLED OFF

EXPANDED INTERFACE

12.0V

-=-t--

V th = 2V 01 00 E

INVERTING

V ref = Resistor, Diodes, or Supply

DIGITAL DIFFERENTIAL AMPLIFIER
(Line Receiver)

DIGITAL COMPARATOR

1

{D>-Dl
INVERTING WITH TERMINATION

L~J

J

T~

NON-INVERTING WITH TERMINATION
NON-INVERTING

DIGITAL COMPARATOR WITH
RESISTIVE DIVIDER
AS REFERENCE

INTERFACING METHODS

1
INVERTING

J
NON-INVERTING

6-40

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9620
APPLICATIONS

MUL TIVIBRATOR

AC COUPLED DIGITAL AMPLIFIER
WITH HYSTERESIS

TYPICALLY
R1 = 1.6 kn, R2 = 2.7 kn

TYPICALLY
R1

= 1.6 kn, R2 = 2.7 kn, T = 1.3 R3C

DOUBLE-ENDED COMPARATOR

MONOSTABLE MUL TIVIBRATOR
NEGATIVE EDGE TRIGGERING

OUT

TYPICALLY
C1

= 0.1 J.LF, R1 = 1.2 kn, R2 = 1.0 kn

Pulse Width = 50 ns + 3.15 X 103 C

2

HIGH INPUT IMPEDANCE
LINE RECEIVER
(Positive Signals Only)

CRYSTAL CONTROLLED
MUL TIVIBRATOR

12V

OUT
OUT
IN+
IN-

TYPICALLY
R1

R2

= 1.6 kn, R2 = 2.7 kn, C = 1000

6-41

o---r

•

9621
DUAL LINE DRIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 9621 was designed to drive transmission lines in either a differential
or a single-ended mode. Output clamp diodes and back-matching resistors for 130n twisted pair are
provided. The output has the capability of driving high capacitance loads.

CONNECTION DIAGRAMS
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

•
•
•
•
•
•

TTL COMPATIBILITY
TRANSMISSION LINE BACK-MATCHING
OUTPUT CLAMP DIODES
HIGH CAPACITANCE DRIVE
HIGH OUTPUT VOLTAGE
MILITARY TEMPERATURE RANGE

Vee 1

ABSOLUTE MAXIMUM RATINGS
Storage Temperature
Operating Temperature Range
Military (9621)
Commercial (9621 C)
VCC1 Pin Potential to Ground Pin
Input Voltage
Voltage Applied to Outputs
VCC2 Pin Potential to Ground Pin
Lead Temperature (Soldering, 60 seconds)
Internal Power Dissipation (Note 1)
DIP

_65° C to +150° C
_55° C to +125° C
O°C to 75°C
+3.8V to +8V
-0.5V to +15V
-2V to +VCC1 +1 V
VCC1 to +15V
300°C
670mW

GND

vee2

ORDER INFORMATION
PART NO.
TYPE
9621
9621DM
9621C
9621DC

NOTE
1.

Rating applies to ambient temperatures up to 70° C. Above 70° C derate linearly at 8.3mW/o C.

14-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 31

EQUIVALENT CIRCUIT (ONE SIDE ONLY)
Vcc,
r---------~--------------------------------------_.
1.5kll

1. 75kll

Vee 1

2.7kO

2kO

GND

Vee 2

3kO

I
PIN"

I
I

ORDER INFORMATION
TYPE
PART NO.
9621
9621FM

cr-----.J

9000

6-42

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9621
9621
ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL

-55°C

CHARACTER ISTIC

NOTES

MIN.
Output lOW Voltage

VOL

ISC
IOl

2

Output Short-Circu it Current

2

Output lOW Current

4.0

MAX.

UNITS

400

350
4.0

4.3

COND.ITIONS

MAX.

MIN.

mV
V

-180

-420

rnA

150

200

rnA

IOl = 20 rnA

VCC1 =4.5 V

IOH =-20 rnA

VCC1 =4.5 V

VCC2 = 10.8 V
VCC2 = 10.8 V
VCC1 = 4.5 V

VOUT =0 V

VCC2 = 10.8 V
VOUT= 5.0

V

Input Reverse Current

'R

2.0

3

Resistive Output lOW Voltage

VOHR

3

Resistive Output HIGH Voltage

VOlC

4

Clamped Output lOW Voltage

4

-1.15

-1.8

<1.0
380
4.0

5.0

2.0
500

rnA
IlA

mV

4.2
-1.0

Clamped Output HIGH Voltage

-1.8

-18

V
-2.0

6.0

7.0

V
V

'CC1

+5 V Supply Current

7.0

4.7

7.0

7.3

rnA

ICC2

+12 V Supply Current

9.8

6.5

9.8

9.8

rnA

tplH

5

Turn-Off Time

30

150

ns

tpHl

5

Turn-On Time

80

150

ns

tPlH

Turn-Off Time

13

25

ns

tPHl

Turn-On Time

9

25

ns

V,l

Input lOW Voltage

1.5

1.0

V,H

Input HIGH Voltage

1.3
2.2

2.0

1.7

0.7
1.8

VCC1 = 4.5 V
VCC2 = 10.8 V

!

'F

VOHC

TYP.
200

4.0

Input Forward Current

VOlR

MIN.

350

Output HIGH Voltage

VOH

+125°C

+25°C

MAX.

VF =0 V

VCC1 = 5.5 V

VR = 5.5 V

VCC1 = 5.5 V

IOl = 2.8 rnA

VCC1 = 5.0 V

IOH = -2.3 rnA

VCC1 = 5.0 V

'Ol = -20 rnA

VCC1 = 5.0 V

IOH =20 rnA

VCC1 = 5.0 V

VCC2 = 13.2 V
VCC2 = 13.2 V
VCC2 = 12.0 V
VCC2 = 12.0 V
VCC2 = 12.0 V
VCC2 = 12.0 V
Inputs

VCC1 = 5.5 V

Open

VCC2 = 13.2 V

Cl = 5000 pF

VCC1 = 5.0 V
VCC2 = 12.0 V

Cl = 30 pF

VCC1 = 5.0 V
VCC2 = 12.0 V

V

VCC1 = 5.5 V. VCC2 = 10.8 V

V

VCC1

= 4.5 V. VCC2 = 13.2 V

NOTES:
2. Pulse tests to insure transient current handling (test time = 3 seconds maximum 3. Test output resistance including 105n. output resistor.
4. Tests output clamp diodes.
5. With both sides loaded at T A
6.

(8 JA = 165° C/W).
Maximum frequency

= 500

= +125°C.

maximum frequency

kHz with both sides loaded at T A

=

one side only).

500 kHz for Dual In-line package (8JA

= +75°C.

6-43

= 95°C/W)

or 300 kHz for Flatpak

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9621
9621C
ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL

NOTES

O°C

CHARACTERISTIC

MIN.
VOL

Output LOW Voltage

VOH

Output HIGH Voltage

ISC
IOL

2
2

Output Short-Circuit

+25°C
MAX.

MIN.

TYP.

400
4.2
Current

Output LOW Current

200
4.2

4.4

-100

-420

75

+75°C
MAX.

MIN.

400

MAX.
450

4.2

mV
V
mA

200

mA

IF

Input Forward Current

1.8

1.15

1.8

1.8

mA

IR

Input Reverse Current

5.0

<1.0

5.0

10.0

J.l.A

VOLR

3

Resistive Output LOW Voltage

380

500

mV

VOHR

3

Resistive Output HIGH Voltage

VOLC

4

Clamped Output LOW Voltage

-1.0

-2.0

V

VOHC

4

Clamped Output HIG H Voltage

6.0

7.0

V

4.0

4.2

V

ICC1

+5 V Supply Current

7.0

4.7

7.0

7.3

mA

ICC2

+12 V Supply Current

9.8

6.5

9.8

9.8

mA

tPLH

6

Turn-Off Time

30

200

ns

tpHL

6

Turn-On Time

80

200

ns

tPLH

Turn-Off Time

13

40

ns

tpHL

Turn-On Time

9

40

ns

VIL

Input LOW Voltage

VIH

Input HIGH Voltage

1.3
2.2

1.5
2.0

6-44

1.7

-0.7

1.0
1.8

IOL = 20 mA

VCC1 = 4.75 V

IOH = -20 rnA

VCC1 = 4.75 V

VCC2 = 11.4 V
VCC2 = 11.4 V
VOUT-O V

VCC1 - 4.75 V

VOUT = 5.0 V

VCC1 = 4.75 V

VF -0 V

VCC1 - 5.25 V

VR= 5.5 V

VCC1 = 5.25 V

VCC2 = 11.4 V
VCC2 = 11.4 V
VCC2 = 12.6 V
VCC2 = 12.6 V
IOL = 2.8 rnA

VCC1 = 5.0 V
VCC2 = 12.0 V

IOH = -2.3 mA

VCC1 = 5.0 V
VCC2 = 12.0 V

IOL = -20 mA

VCC1 = 5.0 V
VCC2 = 12.0 V

IOH =20 mA

VCC1

= 5.0 V

VCC2 = 12.0 V
Inputs

VCC1 = 5.25 V

Open

VCC2 = 12.6 V

CL = 5000 pF

VCC1 = 5.0 V
VCC2 = 12.0V

CL = 30 pF

VCC1 = 5.0 V
VCC2 = 12.0 V

V

VCC1 = 5.25 V, VCC2 = 12.6 V

V

VCC1 = 4.75 V, VCC2 = 11.4 V

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9621
TYPICAL ELECTRICAL CHARACTERISTICS FOR 9621 AND 9621C
OUTPUT HIGH CURRENT
AS A FUNCTION OF
OUTPUT HIGH VOLTAGE
V
• s.ov
CCI
vccz • IZV

OUTPUT LOW CURRENT
AS A FUNCTION OF
OUTPUT LOW VOLTAGE
300

I
VCC •
I
• IZV
ccz

5.ov

v

.., 250

"..... I--

E

/

1

1/

zoo

~

~

v

so

/

/

4.0

0

-500

S.O

0

1.0

I •

20

IZ~

'/

.

/'"

10

V
' 5.0V
CCI

./
16

. . . .V

E

/

~

INfUTSO~\

-50
-10

-6.0

-Z.O

/
I

~
;::

IS

0/
0/

0

/

I NPUT GRO~NDED

8.0

IZ

....

V
• 5.0V
CCI
• IZ.OV
V
CCz
CL • 30pF

. . . . . . . r-.

10

o

16

o

Z.O

4.0

Z.O

8.0

6.0

V
- SUPPLY VOLTAGE - VOLTS
CCI

SWITCHING TIME
AS A FUNCTION OF
TEMPERATURE

I

-r-I--

./'

'$;'"~

-

~

f--t.'- I-- C f
L

;::

'/ ~'"'"

• 5.0V
f-- r- VCCI

~ 120

80

VCC

~l

• IZ.OV

5000pF

. . . . r---.. ........,.,

I
40 -tpLH

r--

5.0

6.0

o

10

-60

VOUT - OUTPUT VOLTAGE - VOLTS

-20

0

20

60

100

o

-60

140

-20

0

20

60

100

140

TA - AMBIENTTEMPERATURE - °c

TEMPERATURE (C)

SUPPLY CURRENT
AS A FUNCTION OF
FREQUENCY
40

r

V

160

fl
V

1

2.0

25

~

/

tl-

/

30

V

§j

-30

/

SWITCHING TIME
AS A FUNCTION OF
TEMPERATURE

I

§I

$Y

/

1/
..........

35

II

I

L

/

V
- SUPPLY VOLTAGE - VOLTS
CC2

TYPICAL OUTPUT IMPEDANCE
WITH BACK MATCHING
RESISTORS

15

'i

./~

If
4.0

VCCI - SUPPLY VOLTAGE - VOLTS

V
• 5.0V
CCI
V
• IZV
CCz

./'

)V /

o
o

o

-10

V
• IZV
CCZ
TA • 2SOC

liZ

./v

140

100

60

'Z

4.0

0

20

.., Z.O

E

-16

~

0

SUPPL Y CURRENT
AS A FUNCTION OF
SUPPL Y VOLTAGE

~ 8.0

10

-20

SUPPLY CURRENT
AS A FUNCTION OF
INPUTS OPEN

-IZ

~

-60

5.0

SUPPLY CURRENT
ASA FUNCTION OF
INPUTS GROUNDED

'4

50

4.0

TA - AMBIENTTEMPERATURE - °c

tl

-

3.0

2.0

VOH - OUTPUT HIGH VOLTAGE - VOLTS

i V

~

IOL • lOrnA

VOL - OUTPUT LOW VOLTAGE - VOLTS

is

§

!3
,.01.0

I
3.0

Z.O

E

-20

V
• 4.SV
CCI
• 10.8 V
ccz
r-IOH • -ZOmA
r v

/

Z
TA • 25°C

-

4.0

g

V
1.0

~ -8

13

/

~ -300

§

I

VCC

/

S.O

/

/

:E

V

I-- V

o

~

V

to

o

..,

./

B -zoo

I

5100

-

~ -100

:I:

ISO

~
o

-

LOGIC LEVELS
AS A FUNCTION OF
AMBIENT TEMPERATURE

SWITCHING TIME TEST CIRCUIT

WAVEFORMS

V
• 5.0V
CCI
vcc2 • IZV
NO OUTPUT LOADING

30

I

1

ZO

I
....-

o

0.1

O.Z

0.5

1.0

v/
Z.O

/

5.0

:" '''\' &:

ru
DUTY CICLE
50%
AMPLITUDE
0.4V

OUT

10

f - FREQUENCY - MHz

6-45

1.5V

o

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9621
DESCRiPTION OF REFLECTION DIAGRAM USAGE
The reflections on any line may be found by using the following procedure:
1. Draw the driver output characteristics for both the HIGH state and the LOW state on an I-V graph in the same manner as the reflection
diagram.
2. Draw the receiver input characteristic on the same graph. The two points of intersection of the receiver and driver characteristics are the
two dc operating points.
3. Choose to analyze either the reflections for the output going LOW or HIGH. In the example chosen the negative transition is analyzed.
4. Draw a line with a slope equal to the impedance ofthe line to be used, (ZO= 100 on in the example), from the HIGH state operating point
(labeled A on our graph) to the LOW state output device characteristic (B1). B1 equals the conditions at the driver output immediately
after turn-on.
5. Reverse the slope of Zo and sketch it from B1 to the receiver input characteristic (C1). C1 equals the conditions at the receiver when the
wavefront B1 first reaches it.

6. By continuing this procedure of reversing the slope of Zo at each node all the reflections (81, C1, B2, C2, 83, C3 - - - BN, CN), where
BX is the voltage at the driver and Cx is the voltage at the receiver, can be found.
The same procedure is used to check the reflections when switching the output HIGH.
BACK-MATCHING, also referred to as reverse termination, offers several advantages to the user. It reduces the system power by not requiring
the high current for resistive termination and it reduces the dc line losses because I R drops in the line become minimum.
To back-match any line (output switching low):
1. Measure the output resistance, Rout, from the LOW state operating point to B.
2. Subtract Rout from Z. (Rout + RM = ZO). This value RM, is the required back-matching resistance.
3. Place RM in series with the output of driver.
4. The reflections that occur on the line with RM inserted can be treated in the same manner as the general case. The results are B1, and C1,
and the receiver will not see any reflections.

When switching the line differentially RM + Rout = ZO/2' The matched output characteristics of the 9621 make it possible to back-match effectively and require analysis of switching only one state.

TYPICAL REFLECTION DIAGRAM*

200

O~TPUT

V
=5.0V
CC1

,

I-

z
~

40

0::

::>

u

I-

L

CIZ_~

¥
-~
-~~:
'
t
.:.
----- cn ---~ .:J

0..

, -40
I-

::>

?

-80

---""'

---

.~

B3

~

B2'

_

... _-

~
_V' >~
B2'--'

::>

50

.tQ

Be

~\--

------ /
~

C'
1

.--ZO=looQ
-----

B1'

tC2

---~

I(

J
-3.0

/

-1.0

1.0

_v-~

/

~,?Ij"l
ctRr~C\.Ij\)£.\)
R· ROIj"l ~
'-N\1~ N\

TYPICAL RECEIVER
INPUT CHARACTERISTICS

.E

)'

)

__

80

11

HIGH1STATE OLTPUT
CHARACTERISTICS "-

7

120



Q

>

o
N

100 ns/Div.

R term

•

200 ns/Div.

= 75~

Rterm

>

>

-

-

Q

is
>

>
o
N

~

C\I

200 ns/Div.

200 ns/Div.

6-47

= 00

9622
DUAL LINE RECEIVER
FAIRCHILD LINEAR INTEGRATED CIRCUIT

GENERAL DESCRIPTION - The 9622 is a Dual Line Receiver designed to discriminate a worst case
logic swing of2.0V from a ±10V common mode noise signal or ground shift. A 1.5V threshold is
built into the differential amplifier to offer a TTL compatible threshold voltage and maximum noise
immunity. The offset is obtained by use of current sources and matched resistors and varies only
±5% (75 mV) over the military and industrial temperature ranges.
The 9622 allows the choice of output states with the inputs open without affecting circuit performance by use of S3 (Note 1). A 1300 terminating resistor is provided at the input of each line
receiver. An enable is also provided for eachlline receiver. The output is TTL compatible. The
output HIGH level can be increased to +12V by tying it to a positive supply through a resistor. The
output circuits allow wired-OR operation.

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

S3
OUTA
EN A
A+

•
•
•
•
•
•
•
•
•

TTL COMPATIBLE THRESHOLD VOLTAGE
INPUT TERMINATING RESISTORS
CHOICE OF OUTPUT STATE WITH INPUTS OPEN
TTL COMPATIBLE OUTPUT
HIGH COMMON MODE
WIRE-OR CAPABILITY
ENABLE INPUTS
FULL MILITARY TEMPERATURE RANGE
LOGIC COMPATIBLE SUPPLY VOLTAGES

OUT B
EN B
B+

A 1300
A-

BVEE

ORDER INFORMATION
TYPE
PART NO.
9622
9622DM
9622C
9622DC

NOTE
1. S3 connected to Vee-open inputs causes output to be HIGH.
S3 connected to Ground-open inputs causes output to be LOW.

14-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 31

EQUIVALENT CIRCUIT
Vee (7)

5kO

2kO

2kO

5kO

2kO

5kO

2kO

2kO

5kO

2kO
S3
OUTA

GND
OUTB

..........)1-........,(13)
EN A
A+
A 1300
1300
(14)

(5)
(6)o---+-'W'r-..+...IC~I-+----I---~

EN B
B+
B 1300

A-

s-

Vee

VEE

5kO

ORDER INFORMATION
PART NO.
TYPE
9622FM
9622

6-48

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 9622
ABSOLUTE MAXIMUM RATINGS (above which the useful life may be impaired)
Storage Temperature
Operating Temperature
Military (9622)
Commercial (9622C)
Internal Power Dissipation (Note 2)
DIP
Flatpak
Vec Pin Potential to Ground Pin
Input Voltage
Voltage Applied to Outputs for Output HIGH State
VEE Pin Potential to Ground Pin
Enable Pin Potential to Ground Pin
Lead Temperature (Soldering, 60 seconds)

-55° C to +125° C
O°C to +75°C
670mW
570mW
-0.5V to +7V
±15V
-0.5V to +13.2V
-0.5V to -12V
-0.5V to +15V
300°C

NOTE
2.

Rating applies to ambient temperature up to 70°C.

Above 70°C derate linearly at 8.3mW/oC for the DIP and 7.1 mW/oC for the Flatpak.

9622
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ± 10%)
LIMITS
SYMBOL

-55°C

CHARACTERISTIC

MIN.
VOL

Output LOW Voltage

VOH

Output HIGH Voltage

ICEX

Output Leakage Current

ISC

Output Shorted Current

+25°C

MAX.

MIN.

DAD
2.8

TYP.
0.17

3.0

-1.3

-3.1

-1.4

-2.15

Leakage Current
Enable Input

IF (ENABLE)
IF (+Input)

-1.5

Forward Current
+Input

VIL(ENABLE)

-2.3

Forward Current

VTH

Input LOW Voltage

Threshold Voltage

VCM

Common Mode Voltage

R130n

Terminating Resistance

ICC

-1.67

-2.6

Forward Current

Oifferential Input

J.LA

-3.1

rnA

2.0

5.0

J.LA

-1.5

-1.5

rnA
\

-Input
IF (-Input)

-0.96

200
-1.3

VCC =4.5 V

Volts
Volts

2.9

-3.1

-1.87

1.3
1.0

2.0

1.4
1.0
-10
100

1.5
±12

-2.1

-2.0
-2.3

-204
1.0
2.0
+10

0.7
1.0

2.0

rnA
rnA
Volts
Volts
Volts

130

175

n

5 V Supply Current

13.7

22.9

rnA

lEE

-10 V Supply Current

-6.5

-11.1

rnA

tPLH

Turn-Off Time

38

50

tPHL

Turn-On Time

35

50

* VD IFF is a differential input voltage referred from A+ to A- and from B+ to B-.

6-49

CONDITIONS

MAX.

DAD

100

Enable Input
IR (ENABLE)

MIN.

DAD

3.3

50

UNITS

+125°C
MAX.

ns
ns

VEE = -11 V

*VOIFF = 2.0 V

IOL = 1204 rnA

VCC = 4.5 V

VEE = -9.0 V

*VOIFF = 1.0 V

IOH = -0.2 rnA

VCC =4.5 V

VEE = -11 V

*VDIFF = 1.0 V

VCEX=12V

VCC = 5.0 V

VEE = -10 V

*VOIFF = 1.0 V

VSC = 0 V

VCC = 4.5 V

VEE = -11 V

S3 =4.5 V

VR = 4.0 V

VCC = 5.5 V

VEE = -9.0 V

S3 =0 V
VCC =5.0 V

VF =0 V
VEE = -10 V

-Input = GNO

VF =0 V

VCC' S3 = 5.0 V
+Input = GND

VEE=-10V
VF =0 V

VCC = 5.0 V :!!10%
VEE = -10 V ±10%
VCC = 5.0 V ±10%
VEE = -10 V ±10%
VCC = 5.0 V
*VOIFF

=

VEE=-10V

1.0 Vor 2.0 V

VCC = 5.5 V

VEE = -11 V

S3, + Inputs = 5.5 V, -Inputs = 0 V
VCC = 5.5 V

VEE = -11 V

S3, + Inputs = 5.5 V, -Inputs = 0 V
VCC = 5.0 V

VEE=-10V

VIN ~3 V, RL = 3.9 kn, CL = 30 pF
VCC = 5.0 V

VEE = -10 V

VIN 0.....3.0 V, RL = 0.39 kn, CL = 30 pF

•

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 9622
9622C
ELECTRICAL CHARACTERISTICS (IVee = 5.0 V ± 5%)
LIMITS
SYMBOL

o°c

CHARACTER ISTIC

MIN.
VOL

Output LOW Voltage

VOH

Output HIGH Voltage

ICEX
ISC

MIN.

0.45
2.9

3.0

Output Leakage Current
Output Shorted Current

+25°C
MAX.

MAX.

0.17

0.45

-3.1

-2.15

Forward Current
+Input

IF (+Input)

Forward Current
-Input

IF(-Input)
VIL (ENABLE)

Input LOW Voltage

Threshold Voltage

-3.1

mA
p.A

10

-.96

-1.5

-1.5

mA

-2.6

-1.67

-2.4

-2.3

mA

-1.87

2.0

-2.7

1.4

1.2
1.0

p.A

-1.5

-2.9

Forward Current

Differential Input
VTH

-1.3

5

Leakage Current
Enable Input

IF (ENABLE)

Volts
200

-3.2

VCC = 4.75 V

Volts

0.45

100
-1.4

CONDITIONS

MAX.

2.9

Enable Input
IR(ENABLEI

MIN.

3.3

80
-1.3

UNITS

+75°C

TYP.

-2.6

1.0

mA

1.5

2.0

-7.5

±12

+7.5

Volts

91

130

185

n

1.0

2.0

VCM

Common Mode Voltage

R130n

Terminating Resistance

ICC

5 V Supply Current

13.7

22.9

mA

lEE

-10 V Supply Current

-6.5

-11.1

mA

tpLH

Turn-Off Time

38

100

ns

tpHL

Turn-On Time

35

100

ns

VEE = -9.5 V

*VDlFF = 1.0 V

IOH = -0.2 mA

VCC =4.75 V

VEE = -10.5 V

*VDIFF = 1.0 V

VCEX =5.25 V

VCC =5.0 V

VEE=-10V

*VDIFF = 1.0 V

VSC =OV

VCC = 4.75 V

VEE = -10.5 V

S3 =4.75 V

VR=4.0V

VCC = 5.25 V

VEE = -9.5 V

S3 =0 V

VF =0 V

VCC=5.0V

VEE = -10 V

-Input = GND

VF =0 V

VCC. S3 = 5.0 V
+Input = GND

VEE=-10V

VEE = -10 V ±5%
VEE = -10 V ±5%
Vce =5.0 V

VCC = 5.25 V
VCC = 5.25 V

VIN

~

VCC = 5.0 V
VCC =5.0V

r-

I I
-

OV--~:

VOUT

~.2~ ~ _l.~V
_

____- \ __

OV

STANDARD USAGE
I

H "'' ' ' " HH ., ' H

DRIVER SYSTEM

RECEIVER SYSTEM

_ _L_O_G_'C_--J

I

I
I

6-50

VEE=-10V

VIN ~3.0 V. RL = 0.39 kn. CL = 30 pF

tPHL

1.5V

VEE=-10V

VIN ~3.9 V. RL = 3.9 kn. CL = 30 pF

I
_:

VEE = -10.5 V

S3. + Inputs = 5.25 V. -Inputs = 0 V

tPLH
I

VEE = -10.5 V

S3. +Inputs = 5.25 V. -Inputs = 0 V

WAVEFORMS

Vce

VEE = -10 V

*VOIFF = 1.0 V or 2.0 V

*VOIFF is a differential input voltage referred from A+ to A- and from 8+ to 8-.

SWITCHING TIME TEST CIRCUIT

VF =0 V

VCC = 5.0 V ±5%

Volts

1.0

IOL = 14.1 mA

VCC = 4.75 V

VCC = 5.0 V ±5%

Volts

0.85

VEE = -10.5 V

*VDIFF = 2.0 V

,"m,

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 9622
TYPICAL PERFORMANCE CURVES FOR 9622 AND 9622C

OUTPUT LOW VOLTAGE
AS A FUNCTION OF
OUTPUT LOW CURRENT
300

VEE" -10V
TA • 25°C

==e

~

~

200

/~

!:;

g

9==

_.'-I!>'-I

100

~

.'-15

~(,(,

~

g
i3

4.0

~

VEE' -10V
TA • 25°C

VOH @ 10H' -0.2mA
1-3.0 f--+--+---I--+-+---1f----+-+--I--l

I\.
I\.~

I\.

"- i'.
~

3.0

5
~ 2.0

r- r-

-

I-

i'.l~

+s

C'C'~'
(s~

f-

o

5.0

vee' 5.0V

o

10

15

"I-~~ I"'
r-...

-1.0

-1.5

-2.0

VOUT - VDIFF TRANSFER
CHARACTERISTICS

OUTPUT VOLTAGE
AS A FUNCTION OF
COMMON MODE VOLTAGE

~

~

4.0

~

3.0

g

I

r-

2.0

f----

5

>°

19
g

Vee' 4.5V

>

-

-~
Of

-~

-'w

-tl:\

::>

2i
>2i

I
I

1.0

25
i2

~

1.2

1.4

1.8

0

20

40

60

80

4.0

4.0 f--+++--I--+-+--i-f--+--I-i--l

.

t--+++--+--+--+-t-t--+--I+--;

:z

Vee '5.0V
VEE' -lOY

~'5.0V

2.0

+ INlpUT

\A (

e

3.0

5 ;2.0

t--+++--+--+--+'-t'--t---f"

"c-

,;. ,}

IX
IX

:::>

u

,~

c..
:z -2.0

-12

-4.0

0

4.0

12

l~

I' - INPUT

~V

-4.0

~

-6.0

20

~

~

A~

:z

1.0 1--+-+-+--+--+--+---f-I--+-lf+---1

-20

100 120 140

INPUT CURRENT
AS A FUNCTION OF
INPUT VOLTAGE

O~~~==~==~~==~=

2.0

-20

l A ' AMBIENT lEMPERA1URE °e

VIN ' 2.0 - 5.0V

1.6

-12

~

-8.0

-4.0

4.0

8.0

VDIFF - DIFFERENTIALINPUl VOLTAGE - VOLTS

veM - COMMON MODE VOlTAGE' - VOLTS

VIN - INPUT VOLTAGE - VOLTS

TURN ON TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

TURN OFF TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

POWER DISSIPATION
AS A FUNCTION OF
AMBIENT TEMPERATURE

100 Vee' 5.0V
VEE' -10V --1-1---+---1---+--+--+--1
LOAD A: RL ' 500Q e L • 50pF VL • 5.0V
80 LOAD B: RL ' 390Q e L • 30pF VL • 5.0V -c--LOAD e : RL ' lOOQ e L • 50pF VL ' 3.0V

c:

00f--+--+---I--+-+---1f----r-+--+--l

~

40

-60 -40

Vee' 5.0V VEE' -10V

g

-'
~

I

>'"'

1•0

o

~

~

O~~~--+-~~~_L-~~~

-3.0

Vee' 5.0V

19g

~·~W

VEE' -llV
1.0 f--+-+---I--+-+---1-r-'f--I--l
0.5 1--+-+--+--+--+--1-+-+--+--1
TYPICAL VOL @101 • 12.4mA

"

-2.5

IOH - OUlPUl HIGH CURRENT - mA

5.0

1.5 1--+--+--+--+-+--1-+-+---+--1

-?

IOL - OUlPU1LOW CURRENT -mA

Vee' 5.5V

2.0 I--+--+--+--+-+--If--+--+--+---l

.......

i' .......

(

-0.5

~

's

'C;·s~
'01- i'

o
o

20

2.5 1--+--+--+--+--+--1-+--+--+----1

i5

~

I

~
g

~~,:.p

~s 1.0

~(,(,

50

!:;

g

:;:

.",.

>0

'" 5.0

LOGIC LEVELS
AS A FUNCTION OF
AMBIENT TEMPERATURE
3.5 r--r-...---,--.,..---,---,-r---r-...,.-....,

6.0

!:;

vV'

150

~

2i

~
~(,(,

250

OUTPUT HIGH VOLTAGE
AS A FUNCTION OF
OUTPUT HIGH CURRENT

100 Vee' 5.0V
VEE' -lOY
LOAD A: RL ' 500Q e L• 50pF VL • 5.0V
80 LOAD B: RL ' 3. 9kl'l e~· 30pF VL • 5.0V
LOAO e: RL ' 200n e L • 50pF VL' 3.0V

:z

-........L--I--

IX

i:=

40

~ll-

LOAD e LOAD B
20 f--+-+---I--+-+---1f----r-+--+--l

250 f--+-+---I--+-+-f----+-+--+--l

-

s:
e

25
60

~
--==== ~

20

-

~

~~ :::=fo~

200 f--+--+---I--+-+--,f----+-+--+--l

~

-

~

~A

-

ii'i
;::;

--:::::~

i

c--- Po @Vee' 5.5V

VEE' -llV+--+--+---1

150

-c--- po@Vee·5.0VVEE·-IOVI·--="......;.--l

100

F+=::t:::t:=t=:::=t~hb+--=1~
Po@V ee ' 4.5V VEE' -9.0V - _

o
-00
TA - AMBIENT TEMPERATURE - °e

-20

0

20

60

100

TA - AMBIENT TEMPERATURE - °e

6-51

12

140
TA - AMBIENT TEMPERATURE - °e

•

9624-9625
DUAL TTL, MOS INTERFACE ELEMENTS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 9624 is a Dual 2-lnput TTL Compatible Interface Gate specifically
designed to drive MOS. The output swing is adjustable and will allow it to be used as a data driver,
clock driver or discrete MOS driver. It has an active output for driving medium capacitive loads.
The 9625 is a dual MOS to TTL level conv~rter. It is designed to convert standard negative MOS logic
levels to TTL levels. The 9625 features a high input impedance which allows preservation of the driving
MOS logic level.
NOTE: The TTL and MOS devices manufactured by Fairchild Semiconductor are considered as positive
TRUE logic (the more positive voltage level is assigned the binary state of "1" or TRUE)' Following
MI L-STD-806B logic symbol specifications, the 9624 is represented as a NAND gate and the 9625 as a
non-inverting buffer. This convention (of assuming MOS as a positive TRUE logic) has not been uniformly accepted by the industry; therefore, it is necessary to note that with negative TRUE MOS logic
(the more negative voltage level is assigned the binary state "1" or TRUE), the 9624 acts as an AND
gate and the 9625 as an inverter.
•
•
•

TTL COMPATIBLE INPUTS/OUTPUT
MOS COMPATIBLE'OUTPUT/INPUTS
LOWPOWER

CONNECTION DIAGRAMS
9624
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A
14

2

13

3

12

4

11

5

10

6

9

7

8

ORDER INFORMATION

9624 EQUIVALENT CIRCUIT

"

TYPE
9624
9624C

TAP

PART NO.
9624DM
9624DC

9625
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A

2
3

9625 EQUIVALENT CIRCUIT
14

Vee

4

Sku

10kn

5

10kH

11

6

OUT2

OUT 1

7

5

22kH

22k!l

IN IO---ANv----£

10

r--J;NIr---oIN 2

7

ORDER INFORMATION
TYPE
9625
9625C

VOO

6-52

PART NO.
9625DM
9625DC

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9624 • 9625

ABSOLUTE MAXIMUM RATINGS
Storage Temperature
Temperature (Ambient) Under Bias
vee Pin Potential to Ground Pin
Voltage Applied to Outputs for HIGH Output State (9624)
Voltage Applied to Outputs for HIGH Output State (9625)
Input Voltage (dc) (9624)
Input Voltage (dc) (9625)
V DO Pin Potential to Ground Pin
Voo Pin Potential to Tap Pin (9624)

-65°C to +150°C
-55°C to +125°C
Voo to +10 V
V DO to +Vee value
-0.5 V to Vee value
-0.5 V to +5.5 V
Vee to Voo
-30 V to +0.5 V
-30 V to +0.5 V
Vee +0.5 V
670mW
300°C

V TAP

I nternal Power Dissipation (Note 3)
Lead Temperature (Soldering, 60 seconds)
Operating Temperature Range
Military (9624 and 9625)
Commercial (9624C and 9625C)

_55° C to +125° C
o°c to +75°C

9624
ELECTRICAL CHARACTERISTICS (VCC = 5 0 V ±10%)
LIMITS
SYMBOL

-55°C

CHARACTERISTIC

MIN.

+25°<:

MAX.

MIN.

TYP.

UNITS

+125°C
MAX.

MIN.

CONOITIONS

MAX.
Volts

VOHl

Output HIGH Voltage

-1.0

-1.0

-0.5

-1.0

VOH2

Output HIGH .voltage

+3.5

+3.5

+4.0

+3.5

VOL

Output LOW Voltage

VIH

Input HIGH Voltage

VIL

Input LOW Voltage

1.4

1.1

0.8

IF

Input Load Current

-1.40

-1.25

-1.13

IR

Input Leakage Current

2.0

2.0

5.0

ICEX

Output Leakage Current

VCC = 4.5 V, Voo = -28 V, VTAP = 0 V
IOH = -101J.A
VCC - 5.5 V, Voo = -20 V, VTAP - 5.5 V
Inputs at VIL, IOH = -10 IJ.A

See Note 1

Volts

VCC = 4.5 V, IOL = 10 rnA, VOO = -15 to 28 V

Volts

Guaranteed Input HIGH Threshold for all Inputs

Volts

Guaranteed Input LOW Threshold for all Inputs

rnA

VCC = 5.5 V, VF = 0.4 V, VOO = -11 to -28 V

IJ.A

VCC = 5.5 V, VR = 4.0 V, VOO = -11 to-28 V

@ VIH, O,;;;VTAP';;;VCC (Note 2)
2.1

1.7

1.9

50

IJ.A

VCC = 5.5 V, VTAP = 0 V, VOO = -28 V,
VOUT = 0 V

ISC

Output Short-Circuit

-12

-31

-32

-14

-11

-28

rnA

Current

VCC = 4.5 V, VTAP = 0 V, VIN = 0 V
VOO=-11 V,VOUT=-ll V

IVCC

VCC Supply Current

6.1

rnA

VCC = 5.5 V, VOO = -15 V, VTAP = 0 V

IMAX

Max. Current

10

rnA

VCC = 10 V, VOO = -30 V, Inputs Open

tPLH

Switching Speed

190

250

ns

VCC = 5.0 V, See Figure 1

tPHL

Switching Speed

50

100

ns

VOO = -13 V, VTAP = 0 V

Inputs Open
VTAP = 0 V

9624C
ELECTRICAL CHARACTERISTtCS (VCC = 5.0 V ±5%)
LIMITS
SYMBOL

CHARACTERISTIC
MIN.

VOHl

Output HIGH Voltage

+25 9 C

O°C
MAX.

-1.0

MIN.
-1.0

TYP.

+75°C
MAX.

MIN.

-0.5

UNITS

CONOITIONS

MAX.

-1.0

Volts

VCC = 4.75 V, VOO = -28 V, VTAP = 0 V
IOH = -10 IJ.A

VOH2

Output HIGH Voltage

VOL

Qutput LOW Voltage

VIH

Input HIGH Voltage

+3.25

+3.25

+3.75

Volts

+3.25

See Note 1
2.0

Volts

1.9

1.8

VCC = 5.25 V, VOO = -20 V, VTAP = 5.25 V
IOH = -10IJ.A, Inputs at VIL
VCC = 4.5 V, IOL = 10 rnA, VOO - -11 to -28 V
@O.;;; VTAP';;; VCC

(Note 2)

Volts

Guaranteed Input HIGH Threshold for all Inputs
Guaranteed Input LOW Threshold for all Inputs

VIL

Input LOW Voltage

1.2

1.1

0.95

Volts

IF

Input Load Current

-1.32

-1.25

-1.20

rnA

VCC = 5.25 V, VF = 0.45 V.

IR

Input Leakage Current

5.0

5.0

10

IJ.A

VCC = 5.25 V, VR = 4.5 V

ICEX

Output Leakage Current

ISC

Output Short-Ci rcu it Current

IVCC

VCC Supply Current

IMAX

Max. Current

tpLH

Switching Speed

190

250

ns

VCC = 5.0 V, See Figure 1

tPHL

Switching Speed

50

100

ns

VOO - -13 V, VTAP - 0 V

100
-12

-31

-14

-32

IJ.A
-12

-31

rnA

6.1

rnA

10

rnA

6-53

VCC = 5.25 V, VTAP = 0 V
VOO = -28 V, VOUT = 0 V
VCC = 4.75 V, VTAP - 0 V, VIN - 0 V
VOO = -11 V, VOUT = -11 V
VCC = 5.25 V, VOO = -15 V, VTAP = 0 V
Input Open
VCC = 8.0 V, VOO = -30 V, VTAP = 0 V
Input Open

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9624 • 9625
9625
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±10%)
liMITS
SYMBOL

CHARACTE R ISTIC

_55°C
MIN.

+25°C

MAX.

MIN.

MAX.

MIN.

CONOITIONS

UNITS

+125°C

TYP.

MAX.

Output HIGH Voltage

VOL

Output LOW Voltage

0.5

0.5

0.5

Volts

VCC= 4.5 V,IOL = 1.2 mA

VIH

Input HIGH Voltage

-3.0

-3.0

-3.0

Volts

VOO = -11 V, Inputs at VIL
Guaranteed Input HIGH Threshold for all Inputs

VIL

Input LOW Voltage

Volts

Guaranteed Input LOW Threshold for all Inputs

IF

I nput load Current

ICEX

Output Leakage Current

IVCCL
IVCCH

2.6

2.5

Volts

VCC = 4.5 V, IOH = -60 IJ,A

VOH

2.5

VOO = -11 V, Inputs at VIH
VCC = 5.5 V, IOl = 1.5 mA

IVOO

-9.0

-9.0

-9.0

210

210

210

IJ,A

VCC = 5.0 V, VF = -3.0 V, VOO = -13 V

50

IJ,A

VCC = VCEX = 4.5 V, VOO = -13 V

Supply Current

4.8

mA

VCC - 5.5 V, VOO = -15 V, VIN = -10 V

Supply Current

2.1

VOO Supply Current

VCC=S.5V, VOO=-15V,VIN =OV

-9.0

mA

VCC = 5.5 V, VOO

= -15 V

Input Open or GNO

IMAX

Max. VOO Supply Current

-25

mA

tpLH

Switching Speed

55

100

ns

VCC - 5.0 V, VOO - -13 V

tPHL

Switching Speed

90

150

ns

See Figure 2

VCC= 8.0 V, VOO= -20 V, VIN =0 V

9625C
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%)
LIMITS
SYMBOL

CHARACTER ISTIC

O°C
MIN.

+25°C
MAX.

MIN.

+75°C

TYP.

MAX.

MIN.

UNITS

CONOITIONS

MAX.
VCC = 4.75 V, IOH = -60 IJ,A

VOH

Output HIGH Voltage

VOL

Output lOW Voltage

0.5

0.5

0.5

Volts

VIH

Input HIGH Voltage

-3.0

-3.0

-3.0

Volts

Guaranteed Input HIGH Threshold for all Inputs

VIL

Input LOW Voltage

Volts

Guaranteed Input lOW Threshold for all Inputs

IF

Input Load Current

ICEX

Output Leakage Current

IVCCL

2.5

2.6

-9.0

Volts

2.5

-9.0

-9.0

210

210

VOO = -11 V, Inputs at VIH
VCC = 5.25 V,lOl = 1.52 mA
VCC = 4.75 V,lOl = 1.33 mA,lnputsat VIL

IJ,A

VCC = 5.0 V, VF = -3.0 V, VOO = -13 V

100

IJ,A

VCC = VCEX =4.75 V, VOO = -13 V

Supply Current

4.8

mA

VCC = 5.25 V, VOO = -15 V, VIN = -10 V

IVCCH

Supply Current

2.1

mA

VCC = 5.25 V, VOO = -15 V, VIN = 0 V

IVOO

VOO Supply Current

-9.0

mA

IMAX

Max. VOO Supply Current

-25

mA

VCC = 8.0 V, VOO = -20 V, VIN = 0 V

tPLH

Switching Speed

55

100

ns

tPHL

Switching Speed

90

150

ns

VCC = 5.0 V, VOO = -13 V
See Figure 2

210

VCC - 5.5 V, VOO = -15 V
Input Open or GNO

NOTES
1. Max

= VOO+1.0

V over Temperature Range. Typ

= VOO +0.2 V

over Temperature Range.

2. At no time shall the voltage from VOO to VTAP exceed 30 V. See Absolute Maximum Ratings.
3.

Rating applies to ambient temperatures up to 70°C. Above 70°C derate linearly at 8.3 mW/C.

LOADING RULES:

'n~

t>

9625
IIN=+210 I'A

----------~ ~------3/1

111

*The extender pin allows the number of inputs to be extended by adding diodes or the OT~L 933 extender.
* * Fan out into MOS is limited only by MOS leakage currents.

6-54

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9624 • 9625

TYPICAL PERFORMANCE CURVES FOR 9624 AND 9624C

THRESHOLD VOLTAGE
AS A FUNCTION OF
AMBIENT TEMPERATURE
250

3.0

2.0

1.5

-

- r-- -

"'""'- ~
VIL

1.0 f - - -

-

~5°C

TA '
vcc' 5.0V
t- voo' -l3V

2.5
VIH

0.5

""•
E

/'

/

60

-25

25

50

75

100

~ -20

5
~ -25

-12

-11

-10

-9.0

-8.0

-7.0

TA - AMBIENT TEMPERATURE - °c

YOL - OUTPUT LOW VOLTAGE - VOLTS

POWER DISSIPATION
AS A FUNCTION OF
AMBIENT TEMPERATURE

SWITCHING TIME
AS A FUNCTION OF
LOAD CAPACITANCE

Ycc - 5.5V
Voo • -15V

50

"'

-35

-40

-13

"-1"-

Ji-30

/

125

~

:l:

I

6

vcc - 5.0V
voo • -13V

'r--...

-10

B-15

/
-55

TA - 25

~

/
/

"-,

-5.0

/

/

r--

--

'""'---

OUTPUT HIGH CURRENT
AS A FUNCTION OF
OUTPUT HIGH VOLTAGE

OUTPUT LOW CURRENT
AS A FUNCTION OF
OUTPUT LOW VOLTAGE

I

1200

T ; 25°C
V~o - -13V - - - 1 - - -

1000

Vec - S.OY
VTAP-OV.-

t_

-6.0

o

-4.0

-16

SWITCHING TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

'"

500

--I --"r:"

cL -15pf

.tf - ---'"

-12

-8.0

VOH - OUTPUT HIGH VOLTAGE - VOLTS

li"

400

40

./
GATE ON

30

-r--

~

\,?~~

---f--

I

V
/'"

20
100

V

V

10

-

.lpLH- -

GATE OfF
-55

-25
25
50
75
TA - AMBIENT TEMPERATURE - °c

100

400

200

125

600

1000

800

-55

-25
0
25
50
75
TA - AMBIENT TEMPERATURE - °c

c L - LOAO CAPACITANCE - pF

100

125

TYPICAL PERFORMANCE CURVES FOR 9625 AND 9625C

THRESHOLD VOLTAGE
AS A FUNCTION OF
AMBIENT TEMPERATURE

SWITCHING TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

POWER DISSIPATION
AS A FUNCTION OF
AMBIENT TEMPERATURE
60

-10

200
Vec - 5.0V, voo' -l3V

-8.0

160

V>

~

VI LTHRESHOLD

!::;

VI HTHRESHOLD

~-6.0

-

40
ON
30

- - ---

~

OFF

r-

~-4.0

i

c -15pf
--- L

50

20
-2.0

-55

-25

25

50

75

TA - AMB I ENTTEMPERATURE - °c

100

125

-55

-25

25

50

75

TA - AMBIENT TEMPERATURE - °c

6-55

----

100

125

-- ---

120

~,...

80 f - - tpLl
~

tl'\\\\

f-- ~
40

-55

-25

0

25

50

75

TA - AMBIENT TEMPERATURE - °c

100

125

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9624 • 9625

9624 SWITCHING TIME TEST CIRCUIT AND WAVEFORMS
_---30V

V IN - - - -

----15V
VOUT

VIN

REP RATE = 500 kHz
AMPLITUDE = 3 V
PULSE WIDTH
1 p.s
t r , tf ~ 10 ns
C = 15 pF

-J~------OV

I I
TAPO
13

=

__________

OVOD
7

r

VOUT-----

TESTS

CONDITIONS

tPLH,tPHL

TA
(OC)

VCC
(Volts)

VDD
(Volts)

Tap
Voltage

25

5.0

-13

0

Fig. 1

9625 SWITCHING TIME TEST CIRCUIT AND WAVEFORMS
Vee

Rep Rate = 500 kHz
Amplitude = -10 V
Pulse Width = 1.0 p.s
t r , tf = 20 ns

TESTS

CONDITIONS

tPLL, tPHH

TA
(oC)

R

VCC
(Volts)

VDD
(Volts)

(kil)

5.0

-13

3.75

25

Fig. 2

APPLICATIONS
9624 Clock Driving
(using a high capacitance drive scheme)
220

TYPICAL SWITCHING TIMES
AS A FUNCTION OF
LOAD CAPACITANCE

200
sTbRAJE

180

TI~E

180

./

140
120

~~

Pr

100

RISE TIME f - -

80
80

FDH60R
EQUIVALENT

40

V
I--

I..'

I..- ~

~

OE:e~

l - I--"

20

200

INCREASING HIGH DRIVE LEVEL CAPABILITY

6-56

400

600

CAPACITIVE LOAD - pF

800

1000

9627
DUAL EIA RS-232-C/MIL-STD-188C LINE RECEIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 9627 is a Dual Line Receiver which meets the electrical interface
specifications of EIA RS-232-C and MI L-STD-188C. The input circuitry accomodates ±25V input
signals and the differential inputs allow user selection of either inverting or non-inverting logic for
the receiver operation. The 9627 provides both a selectable hysteresis range and selectable receiver
input resistance. When pin 1 is tied to VEE, the switching points are at +2.6V and -2.6V, thus
meeting RS-232-C requirements. When pin 1 is open, the switching points are at +0.45V and -0.45V,
thus satisfying the requirements fo MIL-STD-188C LOW level interface. Connecting the RIN pin to
the (-) input yields an input impedance in the range of 3kn to 7kn and satisfies RS-232-C
requirements; leaving R IN unconnected, the input resistance will be greater than 6kn to satisfy
MI L-STD-188C.
The output circuitry is TTL/DTL compatible and will a,llow "collector-dotting" to generate the
wire-AND function. A TTL/DTL strobe is also provided for each receiver. The EIA failsafe mode of
operation is shown in the application section of this data sheet.
For the complementary function, see the 9616 triple EIA RS-232C/MIL-STD-188 line driver.

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B
VARIABLE
HYSTERESIS
(EIA PIN)
OUTPUT A

14
STROBE A

STROBE A
" INTERNAL
CONNECTION"
INVERTING
INPUT A

13

"INTERNAL
12 CONNECTION
INVERTING
11 INPUT B

RINA
NON·INVERTING
INPUT A

RIN B

10 NON.INVERTING
INPUT B

GND

•
•
•
•
•
•
•
•

EIA RS-232-C INPUT STANDARDS
MIL-STD-188C INPUT STANDARDS
VARIABLE HYSTERESIS CONTROL
HIGH COMMON MODE REJECTION
RIN CONTROL (5kn OR 10kn)
WIRED-OR CAPABILITY
CHOICE OF INVERTING AND NON-INVERTING INPUTS
OUTPUTS AND STROBE TTL COMPATIBLE

VEE

*Make No Connection To This Pin.

ORDERING INFORMATION
TYPE
PART NO_
9627
9627DM
9627C
9627CDC

EQUIVALENT CI RCUIT
'6~----------~--~~--~----~------------1---~----~----------------~--~----~--------1----------'
Vee
R47
R"
1.2Skn
e,
1.2Bkn

R4"
1.2Skn

Pin 4 and 13 = I nternal Connection.

6-57

I

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 9627
ABSOLUTE MAXIMUM RATINGS
VCC to Ground
VEE to Ground
Input Voltage Referred tQ Ground Pin
Strobe to Ground Voltage
Maximum Applied Output Voltage
Storage Temperature Range
Operating Temperature Range
Military (9627)
Commercial (9627C)
Maximum Power Dissipation (Note 1)
Lead Temperature (Soldering, 60 seconds)

OV to +15V
OV to -15V
±25V
-0.5V to +5.5V
-0.5V to +15V
_65° C to +150° C
_55° C to +125° C
O°C to +75°C
730mW
300°C

NOTE
1. Rating applies up to 75°C ambient temperature. Above 75°C derate linearly at 8.3mW/oC.

9627. 9627C
ELECTRICAL CHARACTERISTICS (VCC

= 12V ±10%, VEE = 12V ±10% Over Operating Temperature

Range, Unless Otherwise Specified)

MI L-STD-l88C
CONDITIONS (Pins 6 and 11 open.
Inverting inputs open.
Pin 1 open.)

SYMBOL

PARAMETER

VOL

Output LOW Voltage

VOH

Output HIGH Voltage

VCC

ISC

Output Shorted Current

VCC = +13.2V, VEE = -10.SV
Non-Inverting Input = +0.6V
Outputs Grounded

IIH
,(Strobe)

Input HIGH Current (Strobe)

RIN

Input Resistance

ITH+

Positive Threshold Current

ITH-

Negative Threshold Current

VCC = +10.SV, VEE = -13.2V
Non-Inverting Input = -0.6V, IOL

MIN.

= 6.4 rnA

= +10.SV, VEE = -13.2V

VIH
(Strobe)

Input HIGH Voltage (Strobe)

1+

Positive Supply Current

= -0.6V
VNon-lnverting Input = +0.6V
VCC = +13.2V, VEE = -10.SV
VNon-lnverting Input = -0.6V

1-

Negative Supply Current

VNon-lnverting Input

0.4

V

3.0

l

40

/.LA
mA
n

100
-100

/.LA
/.LA

VNon-lnverting Input

±10

%

O.S

V
V

2.0
11.5
-10.4

= +0.6V

mA

1.0
6k

ITH + and I THMagnitude Matching Error
Input LOW Voltage (Strobe)

UNITS

V

Non-Inverting Input

VIL
(Strobe)

MAX.

2.4

= +10.SV, VEE = -13.2V Vs = 2.4V
= +0.6V I Vs = 5.5V
VCC = +13.2V, VEE = -13.2V
Non-Inverting Input = +3V or -3V
VOUT = 2.4 V
VOUT = 0.4 V
VCC

TYP.

13.4

mA
mA

-S.O

RS-232C
SYMBOL

PARAMETER

RIN

Input Resistance

VIN

Input Voltage

VTH+

Positive Threshold Voltage

VTH-

Negative Threshold Voltage

CONDITIONS (Non-inverting inputs
connected to ground, RIN inputs
connected to inverting inputs)
V IN
VIN

= +3.0V to +25V
= -3.0V to -25V

Open Circuit
..:1... .

MIN.

MAX.

UNITS

3.0

7.0

kn

3.0

7.0

kn

-2.0

2.0

V

!

0.6

V

-0.6

6-58

TYP.

V

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 9627
9627. 9627C
AC CHARACTERISTICS (TA

=

+25°C, VCC

=

+12.0V, VEE

=

-12.0V)

MIL-STD-188C. RS-232-C
PARAMETER

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

tPLH

Propagation Delay Time

VIN

=

10Vp-p, Shaped for 10kHz

60

250

ns

tPHL

Propagation Delay Time

VIN

=

10Vp-p, Shaped for 10kHz

84

250

ns

SWITCHING WAVEFORMS
RS-232-C

MIL-STD-188C

IN

OUT

----1---,1

RL

= 390n.

PRR = 10kHz
PW = 50~s
4V/~s ~ Slope ~ 30V/~s
390n. ~ R L ~ 3.9k n.

tpw = 50~s
tr and tf = 5 ±2.5~s

SWITCHING TIME TEST CIRCUIT
+5.0V

-=

•

GND

EIA RS-232-C INTERFACE WITH FAILSAFE RECEIVER
1/2 9627

DATA OUT IS LOW
I F I NPUT IS OPEN, OR
INPUT IS SHORTED TO AB, OR
DRIVER POWER IS OFF
DATA OUT IS HIGH IF
SPACE (LOGIC "0" OR "ON"
IS RECEIVED.

SIGNAL COMMON
RETURN
CIRCUIT AB
+5V

MIL-STO-188C INTERFACE
1/6 9N0411404

1/3 9616

I

LMIL.STD.188C
LOW LEVEL INTERFACE

>

I~
)
DATA OUT

PIN 1 OPEN

*Capacitor For Transmitter Waveshaping at Applicable Modulation Rate.

* * For

balanced input threshOld, leave unused input open. (Don't connect to ground.)

6-59

9650
4-81T CURRENT SOURCE
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 9650 is a high speed, 4-Bit Precision Current Source, intended
for use in DIA and AID converters with up to 12-bit accuracy. It is constructed on a single silicon
chip, using the Fairchild Planar* epitaxial process and consists of a reference transistor and four logic
operated precision current sources connected to a single output summing line. Logic inputs are fully
TTL compatible under all temperature and supply conditions. A clamp circuit is provided to prevent
turn on latchup on the reference input.
•
•
•
•
•

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B

LSB IN

200 ns SETTLING TIME (12 ± 1/2 LSB)
STANDARD SUPPLY LEVELS
VARIABLE BIT CURRENTS
REFERENCE COMPENSATION
TTL COMPATIBLE

ABSOLUTE MAXIMUM RATINGS
V+

+7 V
-18 V
2.0mA
+5.5 V
730mW
-65°C to +150°C

VMSB Current
Logic Input Voltage
Power Dissipation (Note 1 )
Storage Temperature
Operating Temperature
Military (9650-1,9650-2,9650-3)
Commercial (9650-1C, 9650-2C, 9650-3C)
Lead Temperature (Soldering, 60 seconds)
VREF Inputs
Output (Note 2)

V+

BIT 31N

MSB OUT

BIT 21N

BIT 2 OUT

MSB IN

BIT 3 OUT

V-

V REF -2

GND

LSB OUT

VREF -1

lOUT

REF OUT

IREF

ORDER INFORMATION
TYPE
PART NO.
9650-1
9650-1 OM
9650-2
9650-2DM
9650-3
9650-3DM
9650-1C
9650-1 DC
9650-2C
9650-2DC
9650-3C
9650-3DC

_55° C to +125° C
O°C to 70°C
+300°C
+7 V to V+18 V to VREF

EQUIVALENT CIRCUIT
BIT 3
IN

BIT 2
IN

RlO
2.4 k

R"

2.5 k

~--+--r------~--~-+------~--~--r-----~~--+---------------oIOUT

....------0 IREF

L-..+-----+------+--t------t------+---tf------I__--~~_+_--....._+_--_~

VREF

11

& 2)

L-.._ _ _ _- +______-+-_____+_-------+-----+------~~--~I__------+-----~------~-----.--~~V-

LSB
OUT

BIT3
OUT

BIT 2
OUT

MSB
OUT

REF
OUT

*Planar is a patented Fairchild process.

Notes on following page.

6-60

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

9650-1 • 9650-2 • 9650-3
ELECTRICAL CHARACTERISTICS
PARAMETER
(see definitions)

(T A = 25°C, Power Supply Range 4.5 V, - 14 V to 5.5 V, -16 V, unless otherwise specified)
CONDITIONS (TYPE)

MIN.

TYP.

MAX.

UNITS

Linearity

(9650-1 )
(9650-2)
(9650-3)

±0.01
±0.05
±0.2

Full Scale Output Current Error

(9650-1 )
(9650-2)
(9650-3)

±0.1
±0.2
±OA

(9650-1 )
(9650-2, 9650-3)

±0.0025
±0.01

%/V
%/V

630
650

mV
mV

Power Supply Coefficient of Full
Scale Output Current
VBE Range

(9650-1, 9650-2)
(9650-3)

570
550

hFE of Reference Transistor

(9650-1 )
(9650-2, 9650-3)

500
300

Output Impedance

All Bits On

% of FSI
% of FSI
% of FSI
%
%
%

1500
1000
Mn

5.0

The following specifications apply for -55°C';;;; T A';;;; 125°C
Accuracy

(9650-1 )
(9650-2)
(9650-3)

±0.025
±0.1
±0.3

Full Scale Output Current Error

(9650-1)
(9650-2)
(9650-3)

±0.2
±0.3
±0.6

(9650-1 )
(9650-2, 9650-3)

±0.005
±0.02

Power Supply Coefficient of Full
Scale Output.Current

% of FSI
% of FSI
% of FSI
%
%
%
%/V
%/V

Input LOW Voltage

Each Bit On

Input HIGH Voltage

Each Bit Off

Input LOW Current

VIL = 0.4 V

-1.6

Input HIGH Current

VIH = 204 V

40

J.LA

Output Current

Bit 1 (MSB)
Bit 2
Bit 3
Bit 4 (LSB)

1.0
0.5
0.25
0.125

2.0
1.0
0.5
0.25

rnA
rnA
mA
rnA

Output Current

All Bits Off
(9650-1 )
(9650-2,9650-3)

5.0
5.0

250
500

nA
nA

V+

V
V

Output Voltage
Reference Current

0.7

Feeding Op Amp Summing Junction
Resistive Load

0
-4.0

Using Compensation Transistor

1.0

VREF Current

±1.0

Reference Limit Current

VREF=OV

Positive Supply Current
Negative Supply Current

20

rnA

rnA
±2.2

rnA

75

rnA

(9650-1, 9650-2)
(9650-3)

8.0
10

rnA
rnA

(9650-1,9650-2)
(9650-3)

-11
-15

rnA
rnA

NOTES:

1.
2.

V
V

2.0

Rating applies for ambient temperature to 70° C. Derate linearly at 9.1 mW/oC for ambient temperatures above 70° C.
VREF Voltage ~ -7.0 V.

6-61

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

9650-1 C • 9650- 2C • 9650-3C
ELECTRICAL CHARACTERISTICS

(T A = 25°C, Power Supply Range 4.5 V, -14 V to 5.5 V, -16 V, unless otherwise specified)

PARAMETER
(see definitions)

CONDITIONS (TYPE)

MIN.

TYP.

MAX.

UNITS

Linearity

(9650-1 C)
(9650-2C)
(9650-3C)

±0.01
±0.05
±0.2

% of FSI
% of FSI
% of FSI

Full Scale Output Current Error

(9650-1 C)
(9650-2C)
(9650-3C)

±0.1
±0.2
±0.4

%
%
%

(9650-1C
(9650-2C,9650-3C)

±0.003
±0.012

%/V
%/V

630
650

mV
mV

Power Supply Coefficient of Full
Scale Output Current
VBE Range

(9650-1C,9650-2C)
(9650-3C)

570
550

hFE of Reference Transistgr

(9650-1 C)
(9650-2C, 9650-3C)

500
300

Output Impedance

All Bits On

1500
1000
Mn

5.0

The following specifications apply for O°C ..;; T A";; 70°C
Accuracy

(9650-1 C)
(9650-2C)
(9650-3C)

±0.025
±0.1
±0.3

Full Scale Output Current Error

(9650-1 C)
(9650-2C)
(9650-3C)

0.2
0.3
0.6

(9650-1 C)
(9650-2C, 9650-3C)

±0.006
±0.024

Power Supply Coefficient of Full
Scale Output Current
Input LOW Voltage

Each Bit On

Input HIGH Voltage

Each Bit Off

I nput LOW Current

VIL=0.4V

Input HI G H Current

VIH=2.4V

Output Current

Bit
Bit
Bit
Bit

Output Current

All Bits Off
(9650-1 C)
(9650-2C,9650-3C)

Output Voltage
Reference Current

0.8
2.0

Feeding Op Amp Summing Junction
Resistive Load

V
mA

40

J..lA

2.0
1.0
0.5
0.25

mA
mA
mA
mA

5.0
5.0

250
500

nA
nA

V+

V
V

0

Using Compensation Transistor

%/V
%/V

1.0
0.5
0.25
0.125

-4.0
1.0
±1.0

VREF Current

%
%
%

V
-1.6

1 (MSB)
2
3
4 (LSB)

% of FSI
% of FSI
% of FSI

mA
±2.2

mA

75

mA

Reference Limit Current

VREF=OV

Positive Supply Current

(9650-1C,9650-2C)
(9650-3C)

8.0
10

mA
mA

Negative Supply Current

(9650-1C,9650-2C)
(9650-3C)

-11
-15

mA
mA

20

6-62

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

TYPICAL PERFORMANCE CURVES

SWITCHING TIME
AS A FUNCTION OF
MSB CURRENT
(50% IN TO 10% OUT)
70

SUMMI~G JU~CTION LOAD

60

V+ =5.0V
V- = -15 V

t-

SETTLING TIME
AS A FUNCTION OF
LOAD RESISTANCE
(0 TO FSI OUTPUT ± 1/2 LSB)

OUTPUT CURRENT SETTLING TIME
AS A FUNCTION OF
MSB CURRENT
(0 TO FSI OUTPUT ± 1/2 LSB)
175

-+--+--+---+---+-I-t-----i

1.0

+--+--+---+--+-+--+---1

150

TA = 25°C

---:--

30 t--+-+--t--+-t~t----+-+--t----i

20

t--+-+--t--+-t-t----+-+--t----i

10

t--+-+--t--+-t-t----+-+--t----i

I

:!i;::

'"z

~

0.6

100

///

75

/~

0.4

/ /V . . .

lO·BIT

50

h

0.2

~~.0~~1.2-~1~.4~~1.~6~~1.8~~2.0

0
1.0

1.75

1.25

"-

~

1.300

"'-""

0.75

0.50

-50

-25

25

50

-- -:......-

""

75

100

125

1.295

0001
0010

----

~A MS~

1
CURRbNT
V+ = 5.0 V

..........

/

-0.002

1.285

-0.006

.--f....--

V

I

/V
/
J

1.280
4.5
-14

5.0
-15
SUPPLY VOLTAGE - V

5.5

-0.008
-75

-50

-25

0

25

50

75

100

125

-16
T A - AMBIENT TEMPERATURE - °C

9650 KITS TO BUILD DIA - AID CONVERTERS

NOMINAL
NOMINAL
OUTPUT
LOGIC INPUT
OUTPUT
CURRENT (rnA)
CURRENT (rnA)
1.875

I

i-- V -=-15V

0.002

-0.004

TRUTH TABLE

0000

i10iF RLI

10

I-- ~

1.290

T A - AMBIENT TEMPERATURE _ °c

LOGIC INPUT

= T In (2 EOUT/ELSB)

T

FULL SCALE OUTPUT CURRENT DRIFT
AS A FUNCTION OF
AMBIENT TEMPERATURE
0.006

I--t-

TS

LOAD RESISTANCE - kU

0.004

1.305

/'

o

1.310

1.00

0.25
-75

o

2.0

T~ = 2JoC

v+ = 5.0 V
V-=-15V

'"

1.8

1.6

INPUT LOGIC THRESHOLD VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE
1.315

1.50

1.4

1.2

,/ ~9"V

0 ./'

~V

MSB CURRENT - rnA

2.00

"",

I~ Y

25

MSB CURRENT - rnA

INPUT LOGIC THRESHOLD VOLTAGE
AS A FUNCTION OF
AMBIENT TEMPERATURE

V

~
/JP ~

125

501--+-+---+--+---+-I-+--+---+---I

401--1"""

CURR~NT

1 rnA MSB
I--V+ = 5.0 V
V-=-15V
0.8 - T = 25°C
A

SUMMING JUNCTldN L6AD
V+ = 5.0V
V- = -15 V

1000

0.875

1.750

1001

0.750

1.625

1010

0.625

TEMPERATURE RANGE

TYPE

-55°C to +125°C

9650-1

9650-2

9650-3

O°C to +70°C

9650-1C

9650-2C

9650-3C

NO. OF UNITS
Accuracy to

0011

1.500

1011

0.500

0100

1.375

1100

0.375

8 Bits

0

0

2

0101

1.250

1101

0.250

10 Bits

0

1

2

0110

1.125

1110

0.125

12 Bits

1

1

1

0111

1.000

1111

0.000

6-63

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

TYPICAL APPLICATIONS t

VOLTAGE TO FREQUENCY CONVERTER
+5 V

15 k
FREQUENCY
OUT
50 kHz MAX.

FD333
D.C.
IN

20k

OTO+l0V

1/29024

12

10 k

10k

r

lOPF

V-

8-BIT D/A CONVERTER

10-BIT D/A CONVERTER
,r-LS-B-----------DIGITAL INPUTS;------------M-SB"""

+5V

1

r-

BlO

B9

3

4

2

101--

7

~ 12

9650-3
11

13

I

I

67

1

2

r- 7

6~

14

68

BS

65

3

4

I-

15 5 1 j

12

10

9650-3

11

14

13

r---

S~

R12
80k

13

FULL SCALE
ADJ.

pA728

10

111
Rll
40 k

B3

B2

Bl

1

2

3

4
lOt--

9650-2

8

12

13

11

S~

14

'1

15

1

9

8

7

R9
10 k

RS
80k

R7
40k

R l0
20 k

_

511

I

...l12

r--- 9
r-- 7
~-

15

64

y y y y

f Y Y y

-==t==l f Y

S
RS
2Dk

5

24

23
R13
10k

R5
10k

AB FN215 RESISTOR ARRAY

4
R4
8Dk

3

2

1

R3
40k

R2
2Dk

Rl
10k

R16

R15

1k

lk

15 V

~~S

r u~~
3

R20
Sk
14

R18
5k

R19
5k
15

16

R17
13.5 k
18

17

tFor complete A pplications data, please
request our 9650 Applications Note.

21
*0

8

+

22

-

5

~~~

1

5M~

ZERO ADJ.

3~6

1L '"'tV

1

19 Q U n E R

R14
R14

5MS1

2k

QUnDER

:= ~;
2k

....

6-64

~

EOUT

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

TYPICAL APPLICATIONS ( cont'd)t

8·BIT AID CONVERTER

AI I I I

-

r--

" '09316'UP
'. " "
CEP
CET BINARY
TC _
CP
COUNTER
8

n ' Q-0

yQOP ~ -,

.q

-

1/2 9024

1~

-

SERIAL DATA
CLOCK OUTPUT
CONVERSION
COMPLETE

......
......

CP
K A Q

CP
~K

-"

SERIAL DATA
OUTPUT

Q

~J

1/4 9002

B
Q~

-~

1/49

CLOCK

"'~~

_.............,....
P

1/49002

E

D

Al

AO

17

A2

9334
8-BIT ADDRESSA8LE LATCH
C

1

0

2

3

4

5

8

9

7

6

-

?

LS8

PARALLEL
DATA
OUTPUT

FU LL SCALE ADJ.

11

MSB
~A728

5k

L----

+5 V

~~6

'tQ
-

8

1

30pF

-=

L
£'"

I
16 4

3

2

1

16 4

9650-3

r f' "

14

,........=.....

105

13

-15V

7

11

1

9650-3

~

---l!!.+

lOr-

8

1 pA734

15

14

13

r-:- -

5
11

6

5

10kfOk 40k 80k

f

I

+15 V
2

~12

10 k 20 k 40 k 80 k

10 k

3

~6

6

L:2
9

10_1

~

r

8k

-15V

-

100 k

QUAD 2 DIVIDER

n

""'y f"'"

15 k

loon

2k

220k

~
-15V

5k

ANALOG
INPUT

1k

--

NOTE: Digital gnd. indicated by

t For complete Applications data, please
request ou r 9650 Applications Note.

Analog gnd. indicated by

6·65

*

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

TYPICAL APPLICATIONS (cont'd)t

10·BIT AID CONVERTER

-

~
STA RT ,..

1/29024

Q1~"

J

L-"

-

-OK

F1
-Q

J

CP

-<:K

r

TC

L~

-

7 sv
3
Q

Y

X

1~

17

9316

~O 0J1

-r)

£:1T"

+5 V

C~ Po P1 P2 P3

~

t-

""""]8

CLO CK

V

II I I

r----

KP.""

---rs

CONVERSION
COMPLETE

-

1/29024

Qr--

CP

-""8

1/49002

/E Po P1 P2 P3

CP
9300
K
°0 °1

I

Z

Q3
°3

n
~

I

...

SERIAL
DATA
OUTPUT

mm
DATA
CLOCK

I
I

.A
1/49002

1/39003,

I
E

Y

Z

I

I

I
I

6

AO

A1

A2

E

I

0

I

n

l' i I
0

4

5

6

7

I I

f

A1

AO

8

9334
C

~f9OO2

11/49002

I

X

A2

9334
C

0

1

2

3

4

5

6

7

i

~~

II

-

LSS

.... 5V
+

1
-

....

r

-rl

I

2

7

3

-

2

7

14

5~

15

~

3

4

r---

9650-3

6f.;h.

12
13

1

r----

4 10

9650-3
11

61:;;.

11

13

14

15

12

11

R12
SO k

Rll
40 k

AO"
"A728

r

9

RlO
20 k

R9
10k

R20
6k

R19
5k

14

r@

10k

-=-

1

pF

7

---MSB

4

6~

9650-2

8
11

8

7

6

5

RS
SOk

R7
40 k

R6
20 k

R5
10k

24

R1S
5k

R17
13.5 k
18

14

13

23

4

R 13
10 k

R4
80 k

3
R3
40k

R16

R15

• 1k

1k

19 QUfjlDER

~O

15

2k

OUAf9DER
10.1
~ "F

'1

2

1

R2
20k

R1
10k

R14
14k
121

51n

S

30

9

3

2

1

16

, ~,

-

I

1

-r-- 12

AS FN·215 RESISTOR ARRAY

-

'""'"'' [

10

r--r-

5~

12

I

13

---PARALLEL DATA OUT

I

-15V

~~
t "'' ' '

22

"'''f l'

0777

2k

...

ANALOG
INPUT

-"-

NOTE: Digital gnd. indicated by
t For complete Applications data, please
request our 9650 Applications Note.

Analog gnd. indicated by

6-66

V
"*"

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 9650

TYPICAL APPLICATIONS (cont'd)t

12-BIT AID CONVERTER

,.

1/49002

1/29024

ST ART _

L~

01:

J
CP
K

Q~

CP

CP

r-

9316

r~

n1

-,a

~

,

iJT,

+5 V

T

Po Pl P2 P3

,....-

KP.-

K

.... CONVERSION
~ COMPLETE

V

I
clf

J~

-0

"--r'B

-8

CL OCK

~

J

-A

1"~,

1/29024

r---

1/49002

1/~

L=:;

TC°3

~

CP

9300

K
°0 °1

03
°3

I

f1
SERIAL
DATA
OUTPUT

.... "SERIAL
DATA
CLOCK

~

~1/49002

1/39003

E

T

/E Po Pl P2 P3

I

II

y

I

II

D

AO

Al

A2

I

E

n

D

AO

8

4

5

6

7

~

1/49002

II~J, ,
JL ~. I I

I

9334
C

U",,,,,,,

'""''''' I

z

I

Al

A2

2

3

4

5

_9

6

7

I I

1

L

-*
8

9334
COl

~7

•

-PARALLEL OATA DUT

-

_MSB
LSB

2

1
-

....

7

3

4

9650-3

1211

13

6~

14

5~

15

1

r--

10

-

....

2

7

I

I

3

4

I
I

r-----

9650-2

1211

13

6R:.

14

9

-

1

2

7

3

4

9650-1

6~

8

;-

~

15, 5

r--

.... f-

1211

13

14

'1

15

1

11

12
R12
80k

10

Rll
40 k

RlO
20 k

8

9
R9
10 k

7

R8
80 k

R7
40 k

6
R6
20 k

5

13

FULL SCALE
ADJ.

C

~A728 ~

R20
6k

R 19
5k

14

R18
5k

3~6

'If:;J

10kr

39n

~~"'I.Q:'"'

18

R4

R3
80 k1 40 k

RlB

19

lk"

OUAVIDER

*0

2k
5H2
QUAD 2 DIVIDER

n

10.1
r- IlF

2
R2
20 k

1
Rl
10k

R15

1k

R17
13.5 k

16

3

4

R 13
10k

AB FN·215 RESISTOR ARRAY

r--

23

24

R5
10 k

15V

+5 V

~~
t
"M"

R14
14 k
21

'

22

mm!

I'

D777

2k
ANALOG
INPUT

-'-

NOTE: Digital gnd. indicated by

t For complete App"lications data, please
Analog gnd. indicated by

request our 9650 Applications Note.

6-67

V
"*"

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 9650

TYPICAL APPLICATIONS (cont'd) t

12-BIT D/A CONVERTER

''"LS-B--------------DIGITAL INPUTS--------------M-S"""B'
B12

L
~

Bll

~_

+5V

161

BIO

B9

3

2

4

1211

14

13

-L

15

I---

6~

-

5~

~

87

B6

B5

B4

Y Y Y Y

+5V

10

9650-3

7

B8

yy y

161

2

4

3

9650-2

7
1211

13

R12
80k

13

FULL SCALE
ADJ.

~A72B

C

11

10

Rll
40 k

8

7

R9
10k

R8
80k

R7
40 k

6
RS
20 k

5

24

14

3

4

y
10

9650-1
6*
14

13

Rig
5k

R 18
5k

15

16

R17
13.5 k

17

23

4

3

R13
10k

R4
80 k

R3
40k

R5
10 k

AB FN 215 RESISTOR ARRAY
R20
6k

2

161

15

1

9

R10
20k

Bl

r--8
~r- 12 11

5~

15

B2

r--- 9
r-- 7

6~

14

l

12

L

101---

B3

Y Y Y

+5V

R16

R15

1k

1k

19 QUAD 3 DIVIDER

18

15 V

1

R2
20k

t
~ar

Rl
10k

~A777

+

R14
14 k
21

4;0

-

22

-=

1]

3~6

2

'1
5

1

pF

5MU

ZERO ADJ.

:

2k

5MU

51n

~ "t,~
Ion

~

DER
QUA

_ 0.1
-;;; ~F

2k

--

t For complete Applications data, please
request our 9650 Applications Note.

TYPICAL DC TEST CIRCUIT

BIT INPUTS

Ra

BIT BIT
3
2 MSB

v+ LSB

l00k±O.l%

Sl

Rg

- --I
I
16

4

8

10

9650-x

12

13

11

15 5

14

I

_.-I
'05~FI
IOU

R5
10 k

R4
ao k

R3
40 k

R2
20 k

~

-=

Rl
10k

____ 5M

~~

___

5k
V-

NOTES:
1. Required resistor
9650A & 9650E,
9650 & 9650C,
9650B & 9650L,
2. S1 closed and S2

ratio tolerances of R1 - R5 to test the various grades are as
R5 to R2 to R1 - ±0.005%, R3 to R1 - ±0.01%, R4 to R1
R5 to R2 to R 1 - ±0.025%, R3 to R 1 - ±0.05%, R4 to R 1
R5 to R2 to R 1 - ±0.1 %,
R3 to R 1 - ±0.2%, R4 to R 1
open for output current (all Bits off) tests only.

6-68

6

830

follows:
- ±0.02%.
- ±0.1 %.
- ±0.4%.

~5k

r-<> EOUT

55107A·75107A·55108A·75108A
DUAL LINE RECEIVERS
FAIRCHILD LINEAR INTEGRATED CI RCU ITS

GENERAl. DESCRIPTION - The 551 07A/751 07A and 55108A/75108A are high speed, two-channel
Line Receivers with common voltage supply and ground terminals. They are designed to detect input
signals of 25mV (or· greater) amplitude and convert the polarity of the signal into appropriate TTL
compatible output logic levels. They feature high input impedance and low input currents which
induce very little loading on the transmission line making these devices ideal for use in party line
systems. The receiver input common mode voltage range is ~3V but can be increased to ±15V by
the use of input attenuators. Separate or common strobes are available. The 55107A/75107Acircuit
features an active pull-up (totem pole output). The 55108A/75108A circuit features an open collector
output configuration that permits wired-QR connections. The receivers are designed to be used with
the 55109/75109 and 55110/75110 line drivers. The 55107A/75107A and 55108A/75108A line
receivers are useful in high speed balanced, unbalanced and party line transmission systems and as data
comparators.
•
•
•
•
•
•
•
•
•
•
•
•

HIGHSPEED
STANDARD SUPPLY VOLTAGES
DUAL CHANNELS
HIGH COMMON-MODE REJECTION RATIO
HIGH INPUT IMPEDANCE
HIGH INPUT SENSITIVITY
INPUT COMMON-MODE VOLTAGE RANGE OF :Z.3V
SEPARATE OR COMMON STROBES
TTL OR DTL DRIVE CAPABI LlTY
WIRED-OR OUTPUT CAPABILITY
HIGH DC NOISE MARGINS
STROBE INPUT CLAMP DIODES

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A
INPUT
lA
INPUT
lB

OUTPUT
lY

INPUT
2B

STROBE
lG

NC

STROBE
S

OUTPUT
2Y
STROBE
2G

GND

ORDER INFORMATION
TYPE
PART NO.
55107A
SN55107AJ
75107A
SN75107AJ
75107A
SN75107AN
55108A
SN55108AJ
75108A
SN75108AJ
75108A
SN75108AN

V'~~----~----~--~----~----------~------~--~RS

Ra

400~!

4k~!

OUTPUT
IY
ZI

Z2

rIA

GND

1

STAOBE
IG

IB

A4
3kH

STROBE
S

AI7
3kn

-

STAOBE
2G

r 2B
INPUTS

1
Z.

2A

OUTPUT
2Y

RI4
lk!l

v~

NC

EQUIVALENT CIRCUIT

INPUTS

v+

RIS
lkll

RIa
400Sl

NOTE: Components shown with dashed lines are applicable to the 55107A and 75107A only.

6-69

R21
4kll

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS •. 55107A • 75107A • 55108A • 75108A
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (Note 1)
Internal Power Dissipation (Note 3)
Differential Input Voltage (Note 2)
Common Mode Input Voltage (Note 1)
Strobe Input Voltage (Note 1)
Operating Temperature Range
551 07A/1 OSA
75107 A/1 OSA
Storage Temperature Range
Hermetic 01 P (SN55/751 07 AJ, SN55/751 08AJ)
Molded DIP (SN75107AN, SN7510SAN)
Lead Temperature
Hermetic DIP (Soldering, 60 Seconds) SN55/75107AJ, SN55/7510SAJ
Molded DIP (Soldering, 10 Seconds) SN75107 AN, SN7510SAN

±7V
670mW
±6V
±5V
5.5V
-55°C to +125°C
OOC to +70 o C
o

-65°C to +150 C
-55°C to +125°C

Notes on the followi ng page

55107A.75107A
ELECTRICAL CHARACTERISTICS

[+4.5 V '" Vs '" ±5.5 V, -55°C'" T A '" +125°C, unless otherwise noted, (Note 4)]

PARAMETER

TEST CONDITIONS

Input HIGH Current

VDIFF = 0.5V, VCM = -3V to +3V

I nput LOW Current

VDIFF = -2V, VCM = -3V to +3V

Gate Input HIGH Current
Gate I nput LOW Current

MIN.

TYP.
30

Strobe I nput LOW Current

40

IJA
mA

-1.6

mA

VSTROBE = 2.4V

SO

VSTROBE = V+

2.0

IJA
mA

-3.2

mA

0.4

V

Output LOW Voltag~
Short-Circuit Output Current

ISINK = 16mA ,VCM
Vo = 0 (Note 5)

= -3V to
=

+3V

2.4

V

-3V to +3V
-1S

= 25°C
Vo = VOH, IL = 0 ,T A = 25°C·
= -5V, R L = 390.0., C L = 50pF, T A = 25 ° C
VO=VOH,IL=O,T A

AC CHARACTERISTICS (V,T= +5V, V tpLH (D)

IJA
IJA

1.0

VSTROBE = 0.4V
IL = -400IJA, V CM

Negative Supply Current

75
-10

VGATE =V+

Output HIGH Voltage

Positive Supply Current

UNITS

VGATE = 2.4V
VGATE =0.4V

Strobe Input HIGH Current

MAX.

-70

mA

1S

30

mA

-S.4

-15

mA

See Test Circuit)

17

25

ns

tPHL (D)

17

25

ns

tPLH (S)

10

15

ns

tpHL (S)

10

15

ns

55108A.75108A
ELECTRICAL CHARACTERISTICS

[±4.5 V '" Vs '" ±5.5 V, -55°C'" T A '" +125°C, unless otherwise noted, (Note 4)]

PARAMETER

TEST CONDITIONS

Input HIGH Current

VDIFF = 0.5V, VCM

I nput LOW Current

VDIFF = -2V, VCM = -3V to +3V

Gate Input HIGH Current
Gate I nput LOW Current
Strobe Input HIGH Current

MIN.

= -3V to +3V

TYP.
30

VGATE = 2.4V

MAX.

UNITS

75

IJA

-10

IJA

40
1.0

IJA
mA

-1.6

mA

VSTROBE = 2.4V

SO

VSTROBE = V+

2.0

IJA
mA

-3.2

mA

VGATE =V+
VGATE

= 0.4V

Strobe Input LOW Current

VSTROBE = 0.4V

Output LOW Voltage

ISINK = 16mA ,VCM

Output HIGH Current

VOUT =V+

Positive Supply Current

Vo =VOH, IL = O,T A

Negative Supply Current

Vo = VOH, IL = O,T A

= -3V to +3V

= 25°C
= 25°C

0.4

V

250

jJ,A

1S

30

mA

-S.4

-15

mA

AC CHARACTERISTICS (V+ = t5V, V- = -5V, RL = 390.0., C = 15pF, T A = 25°C See Test Circuit)
L
tPLH (D)

19

25

ns

tPHL (D)

19

25

ns

tPLH (S)

13

20

ns

tPHL (S)

13

20

ns

6-70

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55107A • 75107A • 55108A • 75108A
TRUTH TABLE

RECOMMENDED COMBINATIONS
OF INPUT VOLTAGE FOR
LINE RECEIVERS

DIFFERENTIAL
INPUTS

STROBES

A-B
~

VID

25 mV

OUTPUT

G

S

Y

Lor H

Lor H

H

Lor H

L

H

>
I

w

~

~

o

z

:::>

L

Lor H

H

ffi

H

H

INDETERMINATE

..:

Lor H

L

H

L

Lor H

H

H

H

L

-25 mV < VID <25 mV

VID "';;;-25 mV

~
I

~
INPUT - B·TO·GROUND VOLTAGE - V

TYPICAL PERFORMANCE CURVES

OUTPUT VOLTAGE
AS A FUNCTION OF
DI FFERENTIAL
INPUT VOLTAGE

INPUT HIGH CURRENT
INTO 1A OR 2A
AS A FUNCTION OF
AMBIENT TEMPERATURE

HIGH LOGIC LEVEL
SUPPLY CURRENT
AS A FUNCTION OF
AMBIENT TEMPERATURE

100

30

v- = -5V

. 751LA

25

80

>
I

~

4

-

INVEJTING' ,If
INPrS ---J

~

75107A

o
>

"-

INPUY

-

I---

20
60

40

I

.

................ """

-?

V+=5V
V-=-5V
N= 10
TAI5°C

20

o
-20

-10

0

10

20

30

-75

o
-50

w

;:::

~

~ 80~~~~~=-~-~-T~~~

~

~

~
~

60r--r-r--r-r--r-+~~~
40r--r-r--r-r--r-+r--r~

I

~

z

o

~

"~
~
I

c

-25

25

50

75

100

125

i - 75108A --I

25 r-RL39OO
20

I

~~

I

r

15

I

RL = 19500

j.

-50

-25

0

25

50

125

o

-75

-50

-25

0

25

50

75

100

40

40

V+ = 5V

v= = -5V

30

30

25

25
20

15
10

V+ = 5V
-5V
RL = 39011
CL = 50pF

v- =

35

RL = 390u
CL = 15pF

~~

RL = 390Dn

~ f-""""

....-

1--751OBA

~H(S)

15
10

I

1PtiL\S)

_tLLIs)

I

5

125

TA - AMBIENT TEMPERATURE - °c

1--75107A--J

10

o

10

20

I

-...-1

15

100

.... /

i--75107A--t

tpHL(D)

1
75

)

r--~

55107A,75107A
PROPAGATION
DELAY TIME
(STROBE INPUTS)
AS A FUNCTION OF
AMBIENT TEMPERATURE

t

-75
TA - AMBIENT TEMPERATURE - °c

I

20

55108A,75108A
PROPAGATION
DELAY TIME
(STROBE INPUTS)
AS A FUNCTION OF
AMBIENT TEMPERATURE

35

§
20

-

-75

25

I
1--75107A --I
7510BA
I

TA - AMBIENT TEMPERATURE _ °c

V+ =15V
V-=-5V
CL =tPF

30

,......

30

15+

r--

40
35

z

r- -!

55108A,75108A
PROPAGATION
DELAY TIME
HIGH-TO-LOW LEVEL
(DIFFERENTIAL INPUTS)
AS A FUNCTION OF
AMBIENT TEMPERATURE

120 .-----.--~-r--r---.--~-.-___.

o

10

T A - AMBIENT TEMPERATURE _ °c

55108A,75108A
PROPAGATION
DELAY TIME
LOW-TO-HIGH LEVEL
(DIFFERENTIAL INPUTS)
AS A FUNCTION OF
AMBIENT TEMPERATURE

o

I

o

40

VDIFF - DIFFERENTIAL INPUT VOLTAGE - mV

::;:

15

~~;:~~-!

I

-30

-~

55107A

~
5o

-40

I
I

NO:h-NVElTING

I- /

40
V+ = 5V
v- = -5V
35 RL = 39012
CL = 50pF

V+=15V
V-=-5V

V+:15V
551LA

55107A,75107A
PROPAGATION
DELAY TIME
(DIFFERENTIAL INPUTS)
AS A FUNCTION OF
AMBIENT TEMPERATURE

T

-p

~

r-- V

/

~

K::

o
-50

-25

0

25

50

75

100

125

TA - AMBIENT TEMPERATURE _ °c

-75 -50

-25

25

50

75

TA - AMBIENT TEMPERATURE _ °c

100

125

-75

-so

-25

0

25

50

75

100

TA - AMBIENT TEMPERATURE _ °c

NOTES:
1. These voltages are with respect to network ground terminal.
2. These voltage values are at the non inverting (+) terminal with respect

to the inverting (-) terminal.

3. Rating applies to 70°C ambient temperature. Above 70°C derate at S.3 mW/oC.
4. Specifications apply from OOC to 70°C for 75107A and 7510SA. Guaranteed supply voltage range is from .:1:.4.75 V to .:1:.5.25 V for 75107A
and 7510SA.
5. Note more than one (1) output should be shorted at a time.

6-71

125

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55107A • 75107A • 55108A • 75108A
SWITCHING CHARACTERISTICS
AC TEST CIRCUIT

DIFFERENTIAL
INPUT
OUTPUT

55107A
75107A

-=

See Note 4

2G

lG

t------'W_--.._----o

OUTPUT

55108
75108

CL
STROBE
INPUT
See Note 2

o-----_--.. . .

15PF

1

50n

-= See Note 3

--JI/III~.,

NOTES:
1. The pulse generators have the following characteristics: Zout = 50 .0, tr = tf = 10 ± 5 ns, tp1 '" 500 ns, PRR = 1 MHz tp2'" 1 MS,
PRR '" 500 ,kHz.
2. Strobe input pulse is applied to Strobe 1 G when inputs 1 A-1 B are being tested, to Strobe S when inputs 1 A-1 B or 2A-2B are being tested,
and to Strobe 2G when inputs 2A-2B are being tested.
3. CL includes probe and jig capacitance.
4. All diodes are 1N916.

VOL TAGE WAVEFORMS

200mV
INPUT
A
OV

3V
STROBE
INPUT
G orS

OV

VOH
OUTPUT
y

6-72

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55107A • 75107A • 55108A • 75108A
APPLICATION
BASIC BALANCED-LINE TRANSMISSION SYSTEM

TWISTED-PAIR OR EQUIVALENT
TRANSMISSION LINE
ZO= 2 RT

DATA A
INPUT B

y

STROBES
INHIBIT

D
RECEIVER

DRIVER

The 55107A/75107A dual line circuits are designed specifically for use in high speed data transmission systems that utilize balanced,
terminated transmission lines such as twisted-pair lines. The system operates in the balanced mode, so that noise induced on one line is
also induced on the other. The noise appears common-mode at the receiver input terminals where it is rejected. The ground connection
between the line driver and receiver is not part of the signal circuit so that system performance is not affected by circulating ground currents.
The unique driver output circuit allows terminated transmission lines to be driven at normal line impedances. High speed system operation is
ensured since line reflections are virtually eliminated when terminated lines are used. Cross-talk is minimized by low signal amplitudes and low
line impedances.
The typical data delay in a system is approximately (30+ 1_3L) ns, where L is the distance in feet separating the driver and receiver. This
delay includes one gate delay in both the driver and receiver.
Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output current. The driven line is selected by
appropriate driver-input logic levels. The voltage difference is approximately:
VOIFF ~ 1/210(on) • RT
'
High series line resistance will cause degradation of the signal. The receivers, liowever, will detect signals as low as 25 mV (or less), For normal
line resistances, data may be recovered from lines of several thousand feet in length.
Line-termination resistors (RT) are required only at the extreme ends of the line. For short lines, termination resistors at the receiver only may
prove adequate. The signal amplitude will then be approximately:
VOIFF ~ 'O(on) • RT

DATA-BUS OR PARTY-LINE SYSTEM
RECEIVER 1

RECEIVER 4

RECEIVER 2

y

STROBES

STROBES

TWISTED-PAIR LINE

STROBES
RT

LOCATION 2
DRIVER 1

DRIVER 3
A

DATA A
INPUT B

C

DRIVER 4

A

C

INHIBIT D

D
LOCATION 1

LOCATION 3

LOCATION 4

The strobe feature of the receivers and the inhibit feature of the drivers allow the 55107A175107A dual line circuits to be used in data-bus or
party-line systems. In these applications, several drivers and receivers may share a common transmission line. An enabled driver transmits data
to all enabled receivers on the line while other drivers and receivers are disabled. Data is thus time-multiplexed on the transmission line. The
55107A/75107A device specifications allow widely varying thermal and electrical environments at the various driver and receiver locations.
The data-bus system offers maximum performance at minimum cost.

6-73

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55107A • 75107A • 55108A • 75108A
APPLICATION (Cont'd)
UNBALANCED OR SINGLE-LINE SYSTEMS

55107A/75107A or
551 08A/751 OOA

INPUT~
VREF~ ~OUTPUT
STROBES

The 55101A/75107A dual line circuits may also be used in unbalanced or single-line systems. Although these systems do not offer the same
performance as balanced systems for long lines, they are adequate for very short lines where environment noise is not severe.
The receiver threshold level is established by applying a de reference voltage to one receiver input terminal. The signal from the transmission
line is applied to the remaining input. The reference voltage should be optimized so that signal swing is symmetrical about it for maximum
noise margin. The reference voltage should be in the range of -3.0 V to +3.0 V. It can be provided by a voltage supply or by a voltage divider
from an available supply voltage.

PRECAUTIONS IN THE USE OF 55/75107A AND 55/75108A DUAL LINE RECEIVERS
The following precaution should be observed when using or testing 55107A/75107A line circuits:

When only one receiver in a package is being used, at least one of the differential inputs of the unused receiver should be terminated at some
voltage between -3.0 V and +3.0 V, preferably at ground. Failure to do so will cause improper operation of the unit being used because of
common bias circuitry for the current sources of the two receivers.

INCREASING COMMON-MODE INPUT
VOLTAGE RANGE OF RECEIVER

55108A/75108A DOT-OR OUTPUT CONNECTIONS

y
JO-~'-J--<> OUTPUT

FOR BALANCED, TERMINATED LINES,
Zo= 2Rl + 2R2

The 55107A/75107A and 55108A/75108A line receivers feature a
common-mode input voltage range of =1:.3.0 V. This satisfies the requirements for all but the noisiest system applications. For these severe noise
environments, the common-mode range can be extended by the use of
external input attenuators. Common-mode input voltages can in this
way be reduced to =1:.3.0 V at the receiver input terminals. Differential
data signals will be reduced proportionately. Input sensitivity, input
impedance and delay times will be adversely affected.

The 55108A/75108A line receivers feature an open-collector-output
circuit that can be connected in the DOT-OR logic configuration with
other 55108A/75108A outputs. This allows a level of logic to be
implemented without additional logic delay.

6-74

55109 • 75109 • 55110 • 75110
DUAL LINE DRIVERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 55109/75109 and 55110/75110 are Dual Line Drivers featuring
independent channels with common supply voltage and ground terminals. The major difference
between the 55109/75109 and the 55110/75110 drivers is the output-current specification. The
output current is nominally 6 mA for the 55109/75109 and 12 mA for the 55110/75110. The driver
circuits have a constant output that is switched to either of two output terminals by the appropriate
logic levels at the input terminals. The output current can be switched off by appropriate logic levels
at the inhibit inputs. The circuit also features an inhibit input that is common to both drivers,
providing more circuit versatility. The common-mode voltage range of the driver outputs is -3.0 V to
+10 V, which allows a common-mode voltage on the line without affecting the driver performance.
For application information see 55107A. 75107A. 55108A. 75108A data sheet.

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A
INPUT
1A

v+

INPUT
1B
INH

1C
INH

v-

2C

•
•
•
•
•
•
•
•

INPUT
2A
INPUT
2B

HIGH SPEED
STANDARD SUPPLY VOLTAGES
DUAL CHANNELS
TTL INPUT COMPATIBILITY
CURRENT-MODE OUTPUT (6mA or 12mA TYPICAL)
HIGH OUTPUT IMPEDANCE
HIGH COMMON-MODE OUTPUT VOLTAGE RANGE (-3V to 10V)
INHIBITOR AVAILABLE FOR DRIVER SELECTION

INH

o

I ......'

rL.>L. •

2Z
B OUTPUT
2Y

GND

ORDER INFORMATION
TYPE
PART NO.
55109
SN55109J
75109
SN75109J
75109
SN15109N
55110
SN55110J
75110
SN75110J
75110
SN75110N

EQUIVALENT CIRCUIT
55109

55110

75109

r--_ _ _ _ _ _ _ _ _-o0UTPUT
.--_ _ _ _ _ _--<>OUi;UT
LOGIC / 'A
INPUTS
180------'

LOGIC /'A
INPUTS

28

~----,...

r---I----it"·

NOTES:
1. Component values shown are
nominal.

'------oO~~UT
L---_ _ _ _ _ _ _ _-O

6-75

9 OUTPUT

OU~~UT

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55109 • 75109 • 55110 • 75110
ABSOLUTE MAXIMUM RATINGS
Supply Voltage V + (See Note 1 )
Supply Voltage V _ (See Note 1)
Logic and Inhibitor Input Voltages (See Note 1)
Common-Mode Output Voltage (See Note 1)
Operating Free-Air Temperature Range
55109/55110
75109/75110
Storage Temperature Range
Hermetic DIP (SN55175109J, SN55/75110J)
Molded DIP (SN75109N, SN75110N)
Lead Temperature
Hermetic 01 P (soldering, 60 seconds)
Molded 01 P (soldering, 10 seconds)
Notes on the following pages.

7V
-7V
5.5 V
-5 to 12 V
-55°C to +125°C
O°C to +70°C
-65°C to +150°C
-55°C to +125°C

55109 • 75109
ELECTRICAL CHARACTERISTICS [±4.5V EO; VS';;';; ±5.5 V, -55°C';;';; TA .;;,;; +125°C, (Note 2) V+= Max., V- =Max. unless otherwise specified]
PARAMETER

TEST CONDITIONS

Input HIGH Current
Input LOW Current

MIN.

TYP.

40

JlA

VIN = MAX. V+

1.0

rnA

VINHIBIT = 2.4 V
VINHIBIT = MAX. V+

Inhibit Input LOW Current
Common-Inhibit HIGH Current

rnA

40

JlA

1.0

rnA

-3.0

rnA

VINHIBIT = 2.4 V

80

JlA

2.0

rnA

-6.0

rnA

7.0

mA

100

JlA

18

30

rnA

-18

-30

VINHIBIT = 0.4 V
V+ = MAX., V- = MAX.

ON-ST A TE Output Current

-3.0

VINHIBIT = 0.4 V
VINHIBIT = MAX. V+

Common-Inhibit LOW Current

UNITS

VIN = 2.4 V
VIN - 0.4 V

Inhibit Input HIGH Current

MAX.

V+

= MIN.,

OF F-ST ATE Output Current

V+

= MIN., V- = MIN.

ICC + (ON) Supply Current with Driver Enabled

VIN

ICC - (ON) Supply Current with Driver Enabled

VIN

ICC + (OFF) Supply Current with Driver Inhibited

VIN

ICC - (OFF) Supply Current with Driver Inhibited

VIN

V-

= MAX.

3.5

rnA

= 0.4 V, VINHIBIT = 2:0 V
= 0.4 V, VINHIBIT = 2.0 V
= 0.4 V, VINHIBIT = 0.4 V
= 0.4 V, VINHIBIT = 0.4 V

mA

18

rnA

-10

rnA

AC CHARACTERISTICS .£V+ ='5 V, V- = -5 V, TA = 25°C (See Test Circuit)]
tPLH (L)
tpHL (L)

Propagation Delay Time (Logic Inputs)

9.0

15

Propagation Delay Time (Logic Inputs)

9.0

15

ns

tpLH (I)

Propagation Delay Time (Inhibitor Inputs)

16

25

ns

tPHL (I)

Propagation Delay Time (Inhibitor Inputs)

13

25

ns

55109,75109
SUPPLY CURRENT WITH
DRIVER ENABLED
AS A FUNCTION OF
AMBIENT TEMPERATURE

55109,75109
OUTPUT CURRENT
AS A FUNCTION OF
LOGIC INPUT VOLTAGE
16

40
VI~(L) =h.4V
35 I-~~H~I§~ 2V -+---+-+---+---+----1

v+l= 5V I

14 I-~~I; ;~~H(I) -+--1---+--+-+--1
TA = 25·C
12 t---+---+-+--t---If---+--+---I

V- = -5V

301--+--+-+--+--+--+--+---I
251--+--+-t--+--+--If+---+---I
I-- 75109 --t

10 t---+---+-+--t---If---+--+---I

OUTPUT

Z

20 f---~_,c=c+=t:=t=$~~~;l;~
15
+-----+-+---+----+t-+--I

r---=icc-

OUTPUT

y

101--+--+-+--+--+--+--+---I

O~~~_~~~_~~~

-75 -50 -25

VIIL) - LOGIC INPUT VOLTAGE - V

0

25

50

75 100
_·c

TA - AMBIENT TEMPERATURE

6-76

125

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55109 • 75109 • 55110 • 75110
RECOMMENDED OPERATING CONDITIONS (Note 3)
75109

55109

75110

55110
MIN.

NOM.

MAX.

NOM.

MIN.

MAX.

UNIT

V+ Positive Supply Voltage (Note 1)

4.5

5.0

5.5

4.75

5.0

5.25

V

V- Negative Supply Voltage (Note 1)

-5.5

-5.0

-4.5

-5.25

-5.0

-4.75

V

0

10

0

10

V

-3.0

0

-3.0

0

V

Positive Common Mode Output Voltage
(Note 1)
Negative Common Mode Output Voltage
(Note 1)

55110. 75110
ELECTRICAL CHARACTERISTICS (±4.5 V.;;;; Vs .;;;; ±5.5 V, -55°C';;;; T A .;;;; +125°C, (Note 2) V+ = Max., V- = Max. unless otherwise specified]
PARAMETER

MIN.

TEST CONDITIONS

Input HIGH Current
I nput LOW Current

TYP.

40

IJ.A

VIN = Max. V+

1.0

rnA

-3.0

VINHIBIT = 2.4 V
VINHIBIT = Max. V+

Inhibit Input LOW Current
Common-Inhibit Input HIGH Current
Common-Inhibit Input LOW Current
ON-ST A TE Output Current

UNITS

VIN=2.4V
VIN = 0.4 V

Inhibit Input HIGH Current

MAX.

rnA

40

IJ.A

1.0

rnA

VINHIBIT = 0.4 V

-3.0

rnA

VINHIBIT = 2.4 V

80

IJ.A

VINHIBIT = Max. V+

2.0

rnA

VINHIBIT = 0.4 V
V+ = Max., V- = Max

-6.0

rnA

15

mA

V+ = Min., V- = Max.

6.5

rnA

OFF-STATE Output Current

V+ = Min., V- = Min.

ICC + (ON) Supply Current with Driver Enabled

VIN = 0.4 V, VINHIBIT = 2.0 V

23

35

rnA

ICC - (ON) Supply Current with Driver Enabled

VIN = 0.4 V, VINHIBIT = 2.0 V

-34

-50

rnA

ICC + (OFF) Supply Current with Driver Inhibited

VIN = 0.4 V, VINHIBIT = 0.4 V

21

mA

ICC - (OFF) Supply Current with Driver Inhibited

VIN = 0.4 V, VINHIBIT = 0.4 V

-17

rnA

100

IJ.A

AC CHARACTERISTICS [V+ = 5 V, V- = -5 V, TA = 25°C (See Test Circuit)]
tPLH (L)
tPHL (L)

Propagation Delay Time (Logic Inputs)

9.0

15

Propagation Delay Time (Logic Inputs)

9.0

15

ns

tpLH (I)

Propagation Delay Time (I nhibitor Inputs)

16

25

ns

tPHL (I)

Propagation Delay Time (I nhibitor Inputs)

13

25

ns

ns

55110,75110
SUPPLY CURRENT WITH
DRIVER ENABLED
AS A FUNCTION OF
AMBIENT TEMPERATURE

55110, 75110
OUTPUT CURRENT
AS A FUNCTION OF
LOGIC INPUT VOLTAGE
40
35

141---+---+-+--+---+-+---+----i

-

 OUTPUT

A

D

A single-ended output from a driver may be used in single-line systems. Coaxial or shielded line is preferred for minimum noise and cross-talk
problems. For large signal swings, the high output current (12 mAl of the 55110/75110 is recommended. Drivers may be parallelled for higher
current. The unused driver output must be tied to ground. The following precaution should be observed when using or testing 55/75109 and
55/75110 dual line drivers.
When only one driver in a package is being used, the outputs of the other driver
must either be grounded or inhibited in order to prevent excess power dissipation.

6-78

55325/75325
MEMORY DRIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION-The 55325 and 75325 are Memory Drivers for use in magnetic memories constructed on a silicon ship using the Fairchild Planar* process. The device contains four
600 rnA switches, two source switches and two sink switches that can be selected by the appropriate
logic input and appropriate strobe. The device has adequate base drive to source currents up to 375 rnA
with VCC2 of 15 V or 600 rnA with VCC2 voltage of 24 V. In applications requiring drive to source
currents greater than 375 rnA, an external resistor may be used to regulate the source base current to
within ±5% and reduce the power dissipation to allow higher source currents at higher ambient
temperatures.

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 78,98
SOURCE
COLLECTORS

VCC2

Internal voltage surge protection of each of the output sink transistors is provided for switching
inductive loads.

•

600 rnA OUTPUT CAPABILITY

•
•
•
•
•
•
•
•

FAST SWITCH TIMES
OUTPUT SHORT-CIRCUIT CURRENT
DUAL SINK AND DUAL SOURCE OUTPUTS
MINIMUM TIME SKEW BETWEEN ADDRESS AND OUTPUT CURRENT RISE
24 V CAPABILITY
TTL OR DTL COMPATIBLE
SOURCE BASE DRIVE EXTERNALLY ADJUSTABLE
INPUT CLAMP DIODES

VCC1

ORDER INFORMATION
TYPE
PART NO.
55325
SN55325J
75325
SN75325J
75325
SN75325N

,-------,

LOGIC DIAGRAM

Rmt

~VCC2

SOURCE o-~---.....,
COLLECTORS

EQUIVALENT CI RCUIT
VCC20--_ _- - - - _ . . _ - - - - - - - - - ,

R NODE

r-----~-----.,_-o VCCI

15

WO-~---,.,

~-+---o

x

0---+--",""","""'---+

Dl

Sl

0--+-----....

STROBES

SOURCE
OUTPUT X

10

I

I
GROUND

~VCC1

0--+-----1

L _______ -1

POSITIVE LOGIC TRUTH TABLE
SINK

OUTPUT Z
SINK
STAOBES2

ADDRESS INPUTS

STROBE INPUTS

SOURCE
A

SINK
C
D

SOURCE

L

X
X

X
X

L

X
X
H

H

L

X

X

H

H

Sl

SINK
S2

ourpUTS INote 3)
SOURCE

"'"

ON
OFF
OFF
OFF
. OFF
OFF

OFF
ON'
OFF
OFF
OFF
OFF

,SINK

y

Z

OFF
OFF
ON
OFF
OFF
OFF

OFF
OFF
OFF
ON
OFF
OFF

H = HIGH level, L = LOW level, X "" Irrelevant

*Planar is a patented Fairchild process.

6-79

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325

ABSOLUTE MAXIMUM RATINGS
Supply Voltage VCC1 (Note 1)
Supply Voltage V CC2 (Note 2)
I nput Voltage (Any Address or Strobe Input)
Storage Temperature Range
Hermetic DIP (SN55325J, SN75325J)
Molded DIP (SN75325N)
Operating Temperature Range
Hermetic 01 P
Military (SN55325J)
Commercial (SN75325J)
Molded 01 P (SN75325N)
Internal Power Dissipation (Note 2)
Lead Temperature
Hermetic 01 P (Soldering, 60 seconds)
Molded 01 P (Soldering, 10 seconds)

7.0V
25 V
5.5V
-65°C to +150°C
-55°C to +125°C

-55°C to +125°C
OoC to + 70°C
O°C to + 70°C
800mW

55325
ELECTRICAL CHARACTERISTICS (-55°C ~ T A ~ 125°C unless otherwise specified, T A = 25°C for typical values)
~

PARAMETER

CONDITIONS

Input HIGH Voltage

VIH

Fig. 1 & 2

Input LOW Voltage

VIL

Fig. 3 & 4

MIN. TYP. MAX. UNITS
2.0

V
0.8

V

-1.3 -1.7

V

VCC1 = 4.5 V, VCC2 = 24 V
Input Clamp Diode Voltage

VCD

liN = -10 mA, TA = 25°C
Fig. 5

Source-collectors Termi nal Off-state Current

Sink Output HIGH Voltage

10FF

VOH

VCC1 = 4.5 V, VCC2 = 24 V

Full Range

Fig. 1

TA=25°C

VCC1 = 4.5 V, VCC2 = 24 V

Saturation Voltage

Input HIGH Current

Address Inputs
Strobe Inputs
Address Inputs
Strobe Inputs

Input LOW Current
Supply Current, All Sources
and Sinks Off

liN
IIH

Address Inputs
Strobe Inputs

I,lL

From VCCl
From VCC2

ICC(off)

#LA

23

Full Range

V

V
V

0.9

V

0.7

V

VCCl = 5.5 V, VCC2 = 24 V

1.0

mA

VIN = 5.5 V, Fig. 5

2.0

mA

See Note 3, 4 & Fig. 4
VCCl = 4.5 V, VCC2 = 15 V
See Note 3, 4 & Fig. 3

Input Current at Maximum
Input Voltage

#LA

150

0.7

RL = 24n, Isink~600 mA

Sink Outputs

500

0.9

RL = 24n, Isource~-600 mA
V sat

19

10 = 0, Fig. 2
V CC 1 = 4.5 V, V CC2 = 15 V

Source Outputs

3.0

TA = 25°C

0,43

Full Range
TA = 25°C

0.43

VCCl = 5.5 V, VCC2 = 24 V

3.0

40

#LA

VIN = 2.4 V, Fig. 5

6.0

80

#LA

VCC1 = 5.5 V, VCC2 = 24 V

-1.0 -1.6

mA

VIN =0.4V,Fig.5

-2.0 -3.2

mA

VCCl = 5.5 V, VCC2 = 24 V
T A = 25°C, Fig. 6

14

22

mA

7.5

20

mA

55

70

mA

32

50

mA

VCC1 = 5.5 V, VCC2 = 24 V
Supply Current from VCC1, Either Sink On

ICCl

Isink = 50 mA, T A = 25°C
Fig. 7
VCC1 = 5.5 V, VCC2 = 24 V

Supply Current from VCC2, Either Source On

ICC2

Isource = -50 mA, T A = 25°C
Fig.8

NOTES:
1. Voltage values are with respect to network ground terminal.
2.

For operation of 55325 above 70° C free air temperature, refer to Dissipation Derating Curve, Figure 13.

3. Not more than one output is to be on at anyone time.
4. Parameters measured using the following pulse techniques;

tw = 200 #Ls, duty cycle ~ 2%.

6-80

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325
75325
ELECTRICAL CHARACTERISTICS (O°C ~ T A ~ 70°C, T A = 25°C for typical values unless otherwise specified)
PARAMETER

MIN. TYP. MAX. UNITS

CONDITIONS

Input HIGH Voltage

VIH

Fig. 1 & 2

Input LOW Voltage

VIL

Fig. 3 & 4

V

2.0
O.S

V

-1.3 -1.7

V

V CC 1 = 4.5 V, V CC2 = 24 V
Input Clamp Diode Voltage

liN = -10 rnA, TA = 25°C

VCD

Fig. 5
Source-collectors Terminal Off-State Current

Sink Output HI GH Voltage

10FF

VCC1 = 4.5 V, VCC2 = 24 V

Full Range

Fig. 1

TA=25°C

VCC1 = 4.5 V, VCC2 = 24 V

VOH

VCC1 = 4.5 V, VCC2 = 15 V
RL = 2451, Isource~-600 mA
See Note 4 & Fig. 3

Vsat

VCC1 = 4.5 V, VCC2

= 15 V

RL = 2451, Isink ~600 rnA

Sink Outputs

See Note 4 & Fig. 4
Input Current at Maximum
Input Voltage

Address Inputs
Strobe Inputs

liN

Address Inputs

Input HIGH Current

Strobe Inputs

IIH

Address Inputs

Input LOW Current

Strobe Inputs
Supply Current, All Sources
and Sinks Off

IlL

From VCC1
From VCC2

19

200

JJA

200

JJA
V

23

10 = 0, Fig. 2

Source Outputs
Saturation Voltage

3.0

Full Range

0.9

V

0.75

V

Full Range

0.9

V

TA = 25°C

0.75

0.43

TA=25°C

VCC1 = 5.5 V, VCC2 = 24 V

1.0

rnA

VIN = 5.5 V, Fig. 5

2.0

rnA

VCC1 = 5.5 V, VCC2 = 24 V

3.0

40

JJA

VIN = 2.4 V, Fig. 5

6.0

SO

JJA

VeC1 = 5.5 V, VCC2 = 24 V

-1.0 -1.6

VIN = 0.4 V, Fig. 5

-2.0 -3.2

VCC1 = 5.5 V, VCC2 =24 V
ICC(off)

TA = 25°C, Fig. 6

mA
rnA

14

22

rnA

7.5

20

rnA

55

70

mA

32

50

mA

VCC1 = 5.5 V, VCC2 =24 V
Supply Current from V CC1, Either Sink On

Isink = 50 rnA, T A = 25°C

ICC1

Fig.7
VCC1 = 5.5 V, VCC2 = 24 V
Supply Current from V CC2, Either Source On

Isource = -50 rnA, T A = 25°C

ICC2

Fig.S

55325 • 75325
SWITCHING CHARACTERISTICS

(VCC1 = 5.0 V, TA = 25°C, See Test Circuit Figures 9 and 10)

PARAMETER

TEST

TYP.

MAX.

VCC2 = 15 V, RL = 24n

25

50

CL = 25 pF

25

50

CONDITIONS

MIN.

UNITS

FIGURE
tpLH

-

Propagation Delay Time to Source Collectors

9

tpHL
tTLH

tTHL
tpLH

-tpHL
tTLH

Transition Time to Source Outputs

Propagation Delay Time to Sink Outputs

-tTHL

Transition Time to Sink Outputs

ts

Storage Time to Sink Outputs

10

9

9

VCC2=20V,RL=1 kn

55

CL = 25 pF

7.0

V CC2 = 15 V, R L = 24n

20

45

CL = 25 pF

20

45

VCC2 = 15 V, RL = 24n

7.0

15

9.0

20

15

30

CL = 25 pF

6-S1

ns

CL = 25 pF
VCC2 = 15 V, RL = 24n

9

ns

ns

ns

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325
TYPICAL PERFORMANCE CURVES
OFF~TATECURRENTINTOSOURCE

COLLECTORS AS A FUNCTION OF
AMBIENT TEMPERATURE
400

1

200

0.6
VCCI 4.5V
VCC2= 24 V
See Fig. 1

i
Iii

~

20

0

10

1

20

UJ

~

'":;:

II

1

-75

-50

0.2 t---t-----i-

'"

z

---

-25

12r-~-+-~-~-~~-+-~

~o

/
........

16

u;

1
J:

./

0.1

o

>

50

75

100

125

-75

-50

TA - AMBIENT TEMPERATURE -'C

-25

25

50

75

100

;
0

>
z

~

'"

z
u;

'"

N

250

4~6
31

426

385

~6

28

26

300

350

400

450

500

550

E

0.6

i

0.5

J

VCC1'= 5.5
VCC2= 24 V
SeeFt6

12
10

r-

I

ICC210ff)

~

0.4

----

ICClI~ffI

14

«

~

0.3

1

0.2

B

'5

:::>

1

538

41

0.1

;;-

0
-75

-50

-25

25

50

75

100

-75

125

-50

-25

25

50

75

100

125

TA-AM8IENT TEMPERATURE-'C

TA-AMBIENT TEMPERATURE-'C

PARAMETER MEASUREMENT INFORM~TION
DC TEST CIRCUITSt
24 V
24 V

r

VCC2

1

-l

~.lWIIy-'" COLL~~¥S~~

I
I

SEE
TEST
TABLE

I

,I
I
OPEN
4.5V:{SEE
2V
TEST
TABLE
~t-...,...-<>

}S:1:2
10

OPEN

-=

I

L Vce1

GNO

1~5~---- -=
TEST TABLE

TEST TABLE
A

B

GND
2V

GND
2V

81
2V
GND

c

0

2V
GND
4.5V
4.5 V

4.5 V

4.5 V
2V
GND

82
GND
2V
GND
2V

V

Z

VOH
VOH
OPEN
OPEN

OPEN
OPEN
VOH
VOH

Fig.2 VIH AND VOH

Fig. 1 I (OFF) AND VIH
t Arrows indicate actual direction of current flow.

6-82

350n
2411
600

650

-ilsource) or I(sink) - SOURCE CURRENT orSINK CURRENT-rnA

16

0.8 ,....--....-....---.--..,----,--.---,..---.
VCCI = 4.5 V
VCC2= 15V
0.7
-IISource) or IISink) = 1
See Figs. 3 and 4

0

u

618

SUPPLY CURRENT, ALL SOURCES
AND SINKS OFF AS A FUNCTION OF
AMBIENT TEMPERATURE

0

~

125

TA - AMBIENT TEMPERATURE -'C

SOURCE OR SINK SATURATION VOLTAGE
AS A FUNCTION OF
AMBIENT TEMPERATURE

~

Rext
730
RL 48

0
25

>

:~~;;:~~:~W -+-+---ir7""1-.::~t--I
See Figs. 3 and 4

J:

f

1

0.5

VCCI = 4.5 V
VCC2= 24 V
10= 0
See Fig. 2

~

o
>

L

40

,....-~__~--...--r---,r--....,....-,..-.....,

VCCI = 4.5 V
VCC2= 15V

>

/

1

100

SOURCE OR SINK SATURA.TION
VOLTAGE ASA FUNCTION OF
SOURCE CURRENT OR
SINK CURRENT

SINK OUTPUT HIGH
VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 55325 • 75325
PARAMETER MEASUREMENT INFORMATION
DC TEST CI RCUITS (Cont'd)

15V
15V

OPEN

350n

VCr;

-l

SOURCE
COLLECTORS

SOURCE
COLLECTORS

I
I

4.SVl

-1

vcr;

r

....--1~"--O OPEN

t

SEE
TEST
TABLE

V(sat)

~=l

O.S V

I(sink)

O.sVl

OPEN

r--il--r-O

+

SEE
TEST
TABLE

...-+--r--o

OPEN

0'"

1 kn

I
L VCC2....

I
V(sat)

4.5 V

L

1

VCC.2.... _ _ _ _ G~

_ _ _ _ ~D

4.5 V
4.5 V

TEST TABLE

TEST TABLE
A

B

Sl

W

X

C

D

S2

Y

Z

0.8 V

4.5 V

0.8 V

GND

OPEN

0.8 V

4.5 V

0.8 V

RL

OPEN

4.5 V

0.8 V

0.8 V

OPEN

GND

4.5 V

0;8 V

0.8 V

OPEN

RL

Fig. 4 VIL AND SINK V(sat) (Note 4)

Fig. 3 VIL AND SOURCE V(sad (Note 4)

TEST TABLES
24 V

II,IIH

VCC2
'-'V\II,~

APPLY VIN = 5.5 V,

souRcE

MEASURE liN

COLLECTORS
I

GROUND

APPLY 5.5 V

APPLY VIN = 2.4 V,
,............-L---oOPEN

MEASURE IIH

5.5Vo----j

--

liN IIH

V,No----i
IlL

SEE
TEST
TABLE

A

Sl

Sl

A,B

B,C,S2,D
C,S2,D

B

Sl

A,C,S2,D
A,Sl,B,D

C

S2

S2

C,D

A,Sl, B

D

S2

A,Sl,B,C

OPEN

~1--"T""'"-oOPEN

APPLY VIN = 0.4 V,
MEASURE IlL

APPLY 5.5 V

APPLY 'IN = -10 rnA

-----1

L VCC1

MEASURE VCD

GND

A
Sl

0:-

5.5 V
(4.5 V FOR
TESTING V,)

tArrows indicate actual direction of current flow.

6-83

Sl,B,C,S2,D
A, B, C, S2, D

B

A,Sl,C,S2,D

C

A,Sl,B,S2,D

S2

A,Sl,B,C,D

D

A,Sl,B,C,S2

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325
PARAMETER MEASUREMENT INFORMATION

DC TEST CI RCUITS (Cont'd)
24V

24V

..----<11.,

4.5 V 0-.......

6V

OPEN

5V

L

Veel

I

GND

IFc~----~
5.5V

5.5V

TEST TABLE
C

0

S2

GND
5V

5V
GND

GND
GND

TEST TABLE
y

Z

I(sink)
OPEN

OPEN

A
GND

B
5V

GND

I(sink)

5V

GND

GND

Fig. 7 ICC1, EITHER SINK ON

Fig.6 ICC1(OFF) AND ICC2(OFF)

S1

Fig.8 ICC2, EITHER SOURCE ON.

SWITCHING CHARACTERISTICS
15V

35011

OPEN

RL"

RL'

2411

2411

,..-----3V
90%

'--______J,
10%

10%

I

I l-tPLH-!
I
I
I
I
I
1 - -..- - 1
I

I
I
I
I
I
I

90%
OUTPUT Y

...--f.....;;.,-_---+-O

OUTPUTZ

OUTPUT

10%

1

tTHL

_ _ _ _ ~D

VOL TAGE WAVEFORMS
TEST TABLE

5V

PARAMETER
tpLH and tpHL
tpLH' t pHL ,
t TLH , t THL ,

INPUT

OUTPUT UNDER TEST

CONNECT TO 5 V

A and S1

B, C, 0 and S2

Band S1

A, C, 0 and S2

Sink output Y

C and S2

A, B, 0 and S1

Sink output Z

o and S2

A, B, C and S1

Source collectors

and ts
NOTES:

A. The pulse generator has the following characteristics: Zout = 50 il, duty cycle';;;; 1%.
B: CL includes probe and jig capacitance.

Fig. 9 SWITCHING TIMES

t Arrows indicate actual direction of current flow.

6-84

10%

I '--_ _ _ _ _ _ _J

I-I

L ~eel

OV

2oon'---11--1

r--tPHL--1

......"'---.---+-O

I
I
r--------

VOH

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325
PARAMETER MEASUREMENT INFORMATION (Cont'd)
SWITCHING CHARACTERISTICS (Cont'd)
20V

VOLTAGE WAVEFORMS
350n

OPEN

..;;lOns

""",.....- - - - 3 V

90%

INPUT

L......,I-.--+_-.....---OOUTPUT
OUTPUT
10%
~----VOL

lOOk

1..--1-++--1-____..-0 OUTPUT

SEE
TEST
TABLE

TEST TABLE
PARAMETER

I
L~CCl _ _ _ _ _

OUTPUT UNDER TEST

INPUT

CONNECT TO 5 V

Source output W
A and S1
B, C, D, and S2
tTLHand tTH L I--S-o-u-r-ce-o-u-t-p-u-t-X---+B-a-n-d-S-1-+--A-,-C-',-D-,-a-n-d-S-2--;

5V

NOTES:

A. The pulse generator has the following characteristics: Zout = 5012, duty cycle";; 1%.
B. CL includes probe and jig capacitance.

Fig. 10 TRANSITION TIMES OF SOURCE OUTPUTS

APPLICATIONS
FSA2503M

AIR ISOLATED

DIODE ARRAY

THIS 4 X 4 GRIO OF SOURCE SINK

r--

PAJRSFUNCTIONSASAMATRIX TO
SELECT ONE OUT OF 16 DRIVE LINES

A

(

:--

In memory-drive applications the 75325
(or for full-temperature operation, the
55325) can be connected in any of
several ways. Typically, however, sources
and sinks are arranged in pairs from
which many drive-lines branch off as
shown in Figure 11. Here each drive-line
is served by a unique combination of
two source/sink pairs so that a selection
matrix is formed. To select drive-line 13,
9311 No.1 must be set to 3 (with mode
select HIGH), enabling source X of
75325 No.2 to drive lines 12 through
15, and 9311 No.2 must be set to 2,
providing a sink at Y of 75325 No.4 for
drive-line 13 only. Alternatively, to drive
current in drive-line 13 in the opposite
direction, only the mode-select voltage
would be changed from HIGH to LOW.
The size of such a matrix is limited only
by the number of drive-lines that a
source sink pair can serve. This number
in turn depends on the capacitive and
inductive load that each drive-line of the
particular system imposes on the driver.

1
2
3

w

,--051

r-f----o

/ \~

V

B
y

75325
NO.1

.

C

op-

0-- A
0-- B
0-- c
0-- 0

X

Z

6

~

20---

•

4

r-p.

6070-

9311

No 1

D~~~fD~6Rl

8090100-

8
9
10

..... - r-c~
~

110-

r-c

51
B

12075325

130-

EO~

N02

140-

El

,. 0-

-r-- f--c

f--c

Y

X

C

12
13
14

,.

52

--0

Z

1N4607

SOURCE ST:::'

r---,

I
MODE SELECT
(SOURCE/SINK)

TIMING STROBE

';:016

-~~~~

'"

SINK STROBE

I

L~_J

y

SINK
STROBE

L - - ..,

I'-

51

MODE SELECT

.........

I
I
I

;~~~~~
0

(50URCE/5INK::r=~
3V

~4~H~J

SEE NOTE A

TO ADDITIONAL

SOU~~~J;sROBE

I I
I I
I I

ll

B

~~ fB~

",',I I:"i I ,J
y

x

75325
NO.4

B

YYY
I
1

(SL)V~r
I

x

75325
N03

1to 0.0 0 0 b b~1> b b b

1234

67891011

12131415

931TNo2

ABC

TO ADDITIONAL
SINK STROBE
INPUTS

0

!!!!

~

Fig.11 75325 USED AS A MEMORY DRIVER TO SELECT ONE OF SIXTEEN DRIVE LINES
NOTE A: This optional mode-select and timing-strobe technique can be used in place of the 9N40 mode-select and 9311 timing-strobe when
minimum time skew is desired.

6-85

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 55325 • 75325
APPLICATIONS (Cont'd)
EXTERNAL RESISTOR CALCULATION - A typical magnetic-memory word drive requirement is shown in Figure 12. A source-output
transistor of one 75325 delivers load current (I L). The sink-output transistor of another 75325 sinks this current.
The value of the external pull-up resistor (Rext) for a particular memory application may be determined using the following equation:
16 [VCC2(min) - Vs - 2.2]

(Equation 1)

where: Rext is in kn,
VCC2(min) is the lowest expected value of VCC2 in volts,
Vs is the source output voltage in volts with respect to ground,
IL is in mAo

Rext =
IL - 1.6 [VCC2(min) - Vs - 2.9]

The power dissipated in resistor R ext during the load current pulse duration is calculated using Equation 2.
IL
PRext ~ [VCC2(min) - Vs - 2] where: PRext is in mW.
16
After solving for R ext , the magnitude of the source collector current (lCS) is determined from Equation 3.

(Equation 2)

(Equation 3)

ICS ~ 0.941L where: ICS is in mAo
As an example, let VCC2(min)

= 20 V and VL = 3 V

while IL of 500 mA flows.
16 (20 - 3 - 2.2)

Using Equation 1,
Rext

= ----------

= 0.5 kn

500 - 1.6 (20 - 3 - 2.9)
and from Equation 2,
500
PRext ~- [20 - 3 - 2] ~ 470 mW
16
The amount of the memory system current source (lCS) from Equation 3 is:
ICS ~ 0.94 (500) ~ 470 mA
In this example the regulated source-output transistor base current through the external pull-up resistor (Rext) and the source gate is
approximately 30 mAo This current and ICS comprise I L.

THERMAL INFORMATION

TYPICAL APPLICATION DATA
EXTERNAL RESISTOR CALCULATION (Cont'd)

55325
DISSIPATION DERATING CURVE

VCC2

~

Rext

,-----

1000 r-----,....-----.----r--..,.-"""T"--.,
ICS

900 f--------if----__l--f-__+--+---I

R

800

lONE

I ~~~~3g~
L _ _ _ _ _ _ _ _

A~ ~

,

I--~I--__l-__+-__+--+---I

........
700 l------1f-"'o~-__+-_+----+--l

I

.J

.........

,

600t--t----11--"'oo<:""""!--f--+----I

""-...,

500 1------1'------t-__+""',,
__+--+_----I
4001------1----t-__+-~~"'~+_----I
3001---1------1'------t-__+-~~~

200

r-~-----~--.---

--.

100 r-' 1~~~F-~ -r-~T~'~-+-II---I
70

80

90

100

110

120

TA-AMBIENT TEMPERATURE-"C

NOTES:

A. For clarity, partial logic diagrams of two 75325's are shown.
B. Source and sink shown are in different packages.

Fig. 13

Fig. 12

6-86

130

7524-7525
TWO CHANNEL CORE MEMORY SENSE AMPLIFIERS
FA IRe H I LD LI NEAR INTEG RAT ED CI RC U ITS

GENERAL DESCRIPTION - The 7524 and 7525 are Two Channel Core Memory Sense Amplifiers
constructed on a silicon chip using the patented Fairchild Planar* epitaxial process. They can be used
for small (1 K to 8K words) memories as well as larger memory systems. The devices are suitable for
small core sizes facilitating very fast memory cycle times. The 7524 and 7525 feature tight threshold
accuracy, fast response time, and independent strobe selection. Unit to unit variations are minimized
so that individual adjustments of the threshold and strobe timing are not necessary.
All logic inputs and outputs are fully TTL compatible. The 7524 and 7525 can be combined with the
Fairchild MSI Quad Latch 9314 to provide complete memory data register capability.

•
•
•
•

±2 mV THRESHOLD VARIATION
25 ns PROPAGATION DELAY
DUAL INDEPENDENT STROBES
TTL COMPATIBLE

CONNECTION DIAGRAM
16·LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 68

CEXT

ABSOLUTE MAXIMUM RATINGS
±5.0 V
±7.0 V
+5.5 V
730mW

Differential Input Voltage
Supply Voltage
Logic Input Voltage
Power Dissipation
Storage Temperature
Hermetic DI P (SN7524J, SN7524J)
Molded DI P (SN7524N, SN7525N)
Operating Temperature
Lead Temperature
Hermetic DI P (Soldering, 60 seconds)
Molded DI P (Soldering, 10 seconds)

V+

INPUT Al

STROBE A

INPUT A2

OUTPUT A

- VREF

GND2

+ VREF

OUTPUT B

INPUT Bl

STROBE B

INPUT B2

NC

V-

GND 1

-65°C to +150°C
-55°C to +125°C
O°C to +70°C
+300°C
+260°C

Signal Input
Reference Input

±3.0 V
±3.0 V

ORDER INFORMATION
TYPE
PART NO.
7524
SN7524J
7525
SN7525J

BLOCK DIAGRAM
STROBE A (15)

(2)~OUTPUT

INPUT A

AMP

A(14)

(3)

I

I
I
-VREF(4):=fi?
VREF
+
+VREF(5)

I
I

(6)~1

INPUT B

AMP

(7)

~ ~ ~
CEXT V(I)

(8)

V+

OUTPUT B
(12)

~ ~
STROBE B

(16) (II)

G~ID 1

(9)

GND 2
(13)

• Planar is a patented Fairchild process.

6-87

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 7524 • 7525
7524.7525
ELECTRICAL CHARACTERISTICS (V+ = 5.0 V, V_ = -5.0 V, O°C to +70°C either amplifier unless otherwise specified).
TEST CONDITIONS

PARAMETER

MIN.

TYP.

MAX.

UNITS

7524
Differential Input Threshold Voltage

Vref = 15 mV

11

19

mV

Vref = 40 mV

36

44

mV

Vref = 15 mV

8.0

22

mV

= 40 mV

33

47

mV

7525
Differential Input Threshold Voltage

Vref

..
The follOWing specifications apply to either the 7524 or the 7525:
Threshold
Voltage
Range

Minimum

10

mV

Maximum

50

mV

Threshold Uncertainty

±2.0

mV

Differential I nput Bias Current

VIN D = 0 mV

15

Differential Input Offset Current

VIN D = 0 mV

1.0

J..LA

Differential I npu t Impedance

f

2.5

k.r2

Positive Supply Current
Negative Supply Current
Output Short-Circuit Current

= 1.0 kHz

TA= 25°C, V+ = 5.25 V,
V-

= -5.25 V

T A = 25°C, V+ = 5.25 V,
V- = -5.25 V
V+ = 5.25 V, V- = -5.25 V

75

J..LA

25

40

mA

10

20

mA

3.5

mA

2.1

LOGIC INPUT/OUTPUT CONDITIONS (See Fig. 2)
1 Load = 400 J..LA
Output HIGH Voltage

= 2.0 V
= 0.8 V
V- = -4.75 V

VIN(1) Strobe

V IN (0) Strobe
V+ = 4.75 V,

2.4

3.9

V

1 Sink = 16 rnA

(Strobe Inputs)

= 0.8 V
= -4.75 V
VIN(O) Strobe = 0.8 V
V+ = 4.75 V, V- = -4.75 V

I nput LOW Voltage

VIN(1) Strobe = 2.0 V

(Strobe Inputs)

V+

Output LOW Voltage

V+

Input HIGH Voltage

0.25

VIN(O) Strobe

= 4.75

= 4.75

V, V-

VIN(O) Strobe = 0.4 V

(Strobe Inputs)

V+

V, V-

2.0
0.8

= -5.25 V

-1.0

VIN(1) Strobe = 2.4 V

= 5.25

Input HIGH Current

V+

(Strobe Inputs)

VIN(1) Strobe
V+

= 5.25

V

V

= -4.75 V

I nput LOW Current

= 5.25

0.4

V, V-

V, V-

= -5.25 V

= V+

V, V- = -5.25 V

V

-1.6

mA

40

J..LA

1.0

mA

AC CHARACTERISTICS
Common Mode Input Firing Voltage
Differential Input Overload
Recovery Time
Common Mode I nput Overload
Recovery Time
Input to Output Delay
(See Figure 1)
Strobe to Output Delay
(See Figure 1)

tr = tf " 15 ns
tp = 50 ns
VIN + 2.0 V,
tr = tf = 20 ns
VIN CM = ±2.0 V,
tr = tf = 20 ns

±3.0

V

20

ns

20

ns

tpd (1) D

25

tpd (0) D

35

tpd (1) Strobe

15

tpd (0) Strobe

25

6-88

40

ns

30

ns

ns
ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 7524 • 7525
TYPICAL PERFORMANCE CURVES FOR 7524 AND 7525
THRESHOLD VOLTAGE
AS A FUNCTION OF

REFERENCE VOLTAGE
so
I-

/

40
~
,
30

~
~

20

/

~
~

V

/

..•..

V

V

f
'"~

g

21

r---

20

Q

<5

~~

1/>.................

30

24
vREF-'z::mv
23 t-TA -25°C

•.••.•.~

I
V~'S J
¥;: O?CVTO 700C

DIFFERENTIAL INPUT BIAS
CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE

THRESHOLD VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE

19

v+- 'SV

v- - -SV

--

r--- r--

30

ro

,

~ 5.0

o
+S.O

+S.S

o

+6.0

10

ro

30

40

SUPPLY VOLTAGE - VCC - V

AMB I ENT TEMPERATURE - TA - °c

DIFFERENTIAL INPUT OFFSET
CURRENT AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT HIGH CURRENT
AS A FUNCTION OF
INPUT VOLTAGE

INPUT LOW CURRENT
AS A FUNCTION OF
INPUT VOLTAGE

0.6

V+!SV'

./

~ S.O

/V

az

~

I'-...

.............

::::>

"-

z

r---

0.4

;::

--

5

/

~

0.2

o
o

ro

10

30

W

40

~

~-o.SO

-0.25

(

o

o

ro

1.0

\

5

V

tt:

C

........ ............,

~-o.7S

/

2.0

I'- .........

~-1.00

V

:;:

~

¥~:zSs.,vc

E

15

/

4.0

<-1.7S f§-I.S0
z
7-:1.25

.IV

1'""
i--

2.0

4.0

3.0

\

o

o

S.O

0.25

0.50

0.75 1.00

1.25 1.50

INPUT VOLTAGE - VIN - V

INPUT VOLTAGE - VIN - V

OUTPUT VOLTAGE AS A
FUNCTION OF 01 FFERENTIAL
INPUT VOLTAGE

OUTPUT LOW VOLTAGE
AS A FUNCTION OF
SINK CURRENT

OUTPUT HIGH VOLTAGE
AS A FUNCTION OF
LOAD CURRENT

V+-SV
V- = -5V
TA- 25°C

O.S

I LOAD - -4001lA

4.0

5.0

V~·SV'

,- ¥~: i§.Yc

.- vREF!~mv-1

>

-r-.....t-..

~ 0.4

I

3.0

I-

:--V REF - 25mV-

2.00

•

r--.. r-.......
r-....... .......

::::>

i~

1.7S

AMBIENTTEMPERATURE - TA - °c

S.O

o

ro

-2.00
V;-SV'

r-¥~: i$~c

B O.S

~

~

W

REFERENCE VOLTAGE - v REF

-;:; 1.0

~

10

C

10

asffi

-... r--.

--t-""""'"'Inf-----+---t---1--oB
OUTPUT

OUTPUT

J ~I

I.;V

L

L

r

"

tpd(l) STROBE
tpd(O) D

1~1.5V

- - - T ' ..'

\-------~.

tP2

tPI1

*1_1_._I_."

28M

~~~rl~___~:1~4~~~-o

"

I

INPUT PULSE

'\:.......'~

---1'

Jf.1.5VtPll~·:
I--

Ir

- -- -- -

-5::::
STROBE

I--tpd(O) STROBE

F\1.5V\".---.
~-

- -----

VOUT(I)

VOUT(O)

NOTES:
1. Pulse generators have the following characteristics:
ZOUT = 50 n, tr = tf = 15 (±5) ns, tp1 = 100 ns, tp2 = 300 ns,
PRR = 1 MHz.
2. Strobe input pulse is applied to Strobe A when inputs A1 - A2
are being tested and to Strobe 8 when inputs 81 - 82 are being
tested.
3. C1 includes probe and jig capacitance.

Fig. 1

DC TEST

TEST TABLE
TYPE

INPUTS
A1 - A2 or B1 - B2

7524

7525

A1 - A2 or B1 - B2

-

OUTPUT

Vref

"i'N 0

15 mV

< 11 mV

.;;;; 0.4 V

15 mV

> 19 mV

~

VOUT

2.4 V

A1 - A2 or B1 - B2

40mV

<36mV

.;;;; 0.4 V

A1 - A2 or B1 - B2

40mV

>44 mV

~

A1 - A2 or B1 - B2

15 mV

<

A1 - A2 or B1 - B2

15 mV

>22 mV

~2.4

A1 - A2 or B1 - B2

40mV

<33mV

.;;;; 0.4 V

A1 - A2 or B1 - B2

40mV

>47 mV

~2.4

Fig. 2

6-90

8mV

2.4 V

';;;;0.4 V
V
V

Isink

Iload

16 mA

-

-

-400 JlA

16mA

-

-

-400 JlA

16 mA

-

-

-400 JlA

16mA

-

-

-400 JlA

75450A • 75451A • 75452 • 75453 • 75454
75460A • 75461A • 75462A • 75463A • 75464A
DUAL PERIPHERAL DRIVERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 75450A, 75451A, 75452, 75453, and 75454 are Dual General Purpose Interface Drivers that convert TTL
and DTL logic levels to high current drive capability. The 75450A features two TTL NAN 0 gates and two uncommitted transistors. The 75451 A, 75452,
75453 and 75454 feature two standard series 74 TTL gates in AND, NAND, OR and NOR configurations respectively, driving the base of two high
voltage, high current, uncommitted collector output transistors.
The 75460A series are functionally interchangeable with the 75450 series and are recommended for use in applications requiring a minimum collector to
emitter breakdown voltage of 60 V.
The 75450 series and 75460A series offer flexibility in designing high speed logic buffers, power drivers, lamp drivers, line drivers, MOS drivers, clock
drivers and memory drivers.
•
•
•
•
•
•

HIGH SPEED SWITCHING
HIGH OUTPUT CURRENT CAPABILITY
UNCOMMITTED COLLECTOR OUTPUT DEVICES FOR HIGH OUTPUT VOLTAGE CAPABILITY
TTL OR DTL INPUT COMPATIBILITY
INPUT CLAMP DIODES
+5 VOL T SUPPL Y VOLTAGE

ABSOLUTE MAXIMUM RATINGS
75450A

Supply Voltage, V CC
Input Voltage (See Note 1)
I nteremitter Voltage (See Note 2)
VCC to Substrate Voltage (See Note 6)
Collector to Substrate Voltage (See Note 6)
Collector-base Voltage
Collector-emitter Voltage (See Note 3)
Emitter-base Voltage
Output Voltage (See Notes 1 and 4)
Continuous Collector Current (See Note 5)
Continuous Output Current (See Note 5)
Continuous Total Power Dissipation (See Note 7)
Operating Free-Air Temperature Range
Storage Temperature Range
Molded DIP
Hermetic 01 P
Lead Temperature
Molded DIP (Soldering, 10 seconds)
Hermetic DIP (Soldering, 30 seconds)

75460A

75451A
75452
75453
75454

75461A
75462A
75463A
75464A

7V
5.5V
5.5 V

7V
5.5V
5.5V

30V

60V

800mW
O°C to 70°C

300mA
800mW
O°C to 70°C

300mA
800mW
O°C to 70°C

-55°C to 125° C
-65°C to 150° C

-55°C to 125°C
-65°C to 150°C

-55°C to 125°C
-65°C to 150°C

-55°C to 125°C
-65°C to 150°C

260°C
300°C

260°C
300°C

260°C
300°C

260°C
300°C

7V
5.5 V
5.5 V
35 V
35 V
35 V
30V
5V

7V
5.5V
5.5 V
65 V
65V
65V
60V
5V

300mA

300mA

800mW
O°C to 70°C

NOTES:
1.
Voltage values are with respect to network ground terminal unless otherwise specified.
2.
This is the voltage between two emitters of a multiple-emitter input transistor.
3.
This value applies when the base-emitter resistance (R BE) is equal to or less than 500 n.
4.
This is the maximum voltage which should be applied to any output when it is in the off state.
5.
Both halves of these dual circuits may conduct rated current simultaneously ..
6.
For the 75450A and 75460A only, the substrate (Pin 8), must always be at the most negative device voltage for proper operation.
7.
Above 70°C ambient temperature, derate linearly at 8.3 mW/oC.

6-91

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75450A
DUAL POSITIVE-AND PERIPHERAL DRIVER
EQUIVALENT CIRCUIT

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

r------1----t--.-----o vee
1.6 k

130

1E

1e

1k
SUB

Go--+-",
4k

1.6 k

130

LOGIC FUNCTION
Positive Logic:
2

2A

e

O--+-+_---.

Y = AG (gate only)
C = AG (gate and transistor)

ORDER INFORMATION

2E

TYPE
75450A
75450A

~-+-4-----~-~-~-----__oGND

PART NO.
SN75450AJ
SN75450AN

All resistor values in ohms.

D
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, TA = ODC to 70 C, unless otherwise noted)

TTL Gates
SYMBOL

TEST

PARAMETER

VIH

Input HIGH Voltage

1

VIL

Input LOW Voltage

2

VCD

Input Clamp Diode Voltage

3

VOH

Output HIGH Voltage

2

VOL

Output LOW Voltage

1

II

I nput Current at Maximum
Input Voltage

IIH

Input HIGH Current

IlL

I nput LOW Current

Input A
Input G
Input A
Input G
Input A
Input G

lOS

Short-Circuit Output Current$

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

tAli typical values at VCC

CONDITIONS

FIGURE

= 4.75 V,
VCC = 4.75 V,
10H = -400 p,A

= -12 mA
VIL = 0.8 V,

VCC = 4.75 V,

VIH=2V,

VCC

4

VCC = 5.25 V,

VI = 2.4 V

3

VCC = 5.25 V,

VI=O.4V

5

VCC = 5.25 V

+Not more than one output should be shorted at a time.

6-92

2.4

VCC = 5.25 V,
VCC

= 5.25

V,

UNIT

0.8

V

-1.5

V
V

3.3
0.22

IOL = 16 rnA
VI = 5.5 V

D

MAX.

V

II

VCC = 5.25 V,

= 5 V, TA = 25 C.

TYP.t

2

4

6

MIN.

0.4
1
2
40
80
-1.6
-3.2

V
rnA
p,A
rnA

-55

rnA

VI =OV

2

4

rnA

VI =5 V

6

11

rnA

-18

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75450A
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted) Cont'd.
Output Transistors
SYMBOL

PARAMETER

CONDITIONS

V(BR)CBO

Collector-Base Breakdown Voltage

IC = 100 p,A

IE = 0

35

V

V(BR)CER

Collector-Emitter Breakdown Voltage

IC = 100 p,A

RBE = 500 n.

30

V

V(BR)EBO

Emitter-Base Breakdown Voltage

5

V

MIN.

IE = 100 p,A

IC= 0

VCE = 3V,

IC = 100 rnA,

TA = 25°C
IC = 300 rnA,

VCE=3V,
Static Forward Current Transfer
hFE

TA = 25°C

Ratio (Note 8)

IC = 100 rnA,

VCE=3V,
TA = O°C

IC = 300 rnA,

VCE = 3V,
TA =o°c
VBE(sat)
VCE(sat)

TYP.t

MAX.

25
30
20
25

IB=10mA,

IC = 100 rnA

0.85

1

IB = 30 rnA,

IC = 300 rnA

1.05

1.2

Collector-Emitter Saturation

IB = 10 rnA,

IC= 100 rnA

0.25

0.4

Voltage (Note 8)

IB = 30 rnA,

IC = 300 rnA

0.5

0.7

Base-Emitter Voltage (Note 8)

UNIT

V
V

t All typical values are at VCC = 5 V, T A = 25°C.
Note 8: These parameters must be measured using pulse techniques. tw = 300 p,s, duty cycle"; 2%.

AC CHARACTERISTICS (VCC = 5 V, T A = 25°C)
TTL Gates
SYMBOL

PARAMETER

tpLH

Propagation Delay Time, Output LOW to HIGH

tpHL

Propagation Delay Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE
12

CL=15pF,

MIN.

RL = 400 n.

TYP.

MAX.

UNIT

20

ns

8

ns

Output Transistors
SYMBOL

PARAMETER

td

Delay Time

tr

Rise Time

ts

Storage Time

tf

Fall Time

TEST

CONDITIONS +

FIGURE

13

IC = 200 rnA,

IB(1) = 20 rnA,

IB(2) = -40 rnA,

VBE(off) = -1 V,

CL = 15 pF,

RL = 50 n.

MIN.

TYP.

MAX.

UNIT

8

ns

12

ns

7

ns

6

ns

Gates and Transistors Combined
SYMBOL

PARAMETER

tpLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output H IG H to LOW

TEST
FIGURE

14

CONDITIONS+

IC = 200 rnA,

CL = 15 pF,

RL=50n.

+Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.

6-93

MIN.

TYP.

MAX.

UNIT

40

ns

25

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75451 A
DUAL POSITIVE-AND PERIPHERAL DRIVER
CONNECTION DIAGRAM
8-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

EQUIVALENT CIRCUIT (Each Driver)
~------.-----~-----------ovcc

4k

1.6 k

y

A

0--+----"

500

1k

.-----4-------~~----~--_+----~_oGND

-:

Component values shown are nominal.
All resistor values in ohms.
Positive Logic; Y = AB

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
(on state)
(on state)
(on state)
(off state)

L
L
L
H

ORDER INFORMATION
TYPE
75451A

PART NO_
SN75451AP

H = HIGH Level, L = LOW Level

ELECTRICAL CHARACTERISTICS (VCC
SYMBOL

= 5.0 V

±5%, TA

= O°C to 70°C, unless otherwise noted)
TEST

PARAMETER

CONDITIONS

FIGURE

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VCD

Input Clamp Diode Voltage

8

IOH

Output HIGH Current

7

Output LOW Voltage

7

VCC

= 4.75 V,

II

Input Current at Maximum Input Voltage

IIH

Input HIGH Current

IlL

Input LOW Current

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

t All typical values are at VCC

=5

V, T A

MAX.

UNIT
V

= -12 mA

VCC = 4.75 V, VOH =30 V

0.8

V

-1.5

V

100

p,A

VIH = 2 V
VIL = 0.8 V,

10L = 100 rnA
VCC = 4.75 V,

0.25

0.4

0.5

0.7

V
VIL = 0.8 V,

10L = 300 mA
II

TYP.t

2

VCC = 4.75 V,
VOL

MIN.

VCC = 5.25 V,

VI = 5.5 V

1.0

rnA

9

VCC = 5.25 V,

VI = 2.4 V

40

p,A

8

VCC = 5.25 V,

VI=O.4V

-1.0

-1.6

rnA

VCC = 5.25 V,

VI =5V

7.0

11

rnA

VCC = 5.25 V,

VI =OV

52

65

rnA

TYP.

MAX.

9

10

= 25°C.

AC CHARACTERISTICS (VCC = 5 V, T A = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-94

10

~

200 mA,

RL = 50

n

CL = 15 pF,

MIN.

UNIT

45

ns

25

ns

10

ns

12

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75452
DUAL POSITIVE-NAND PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
8-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

r-----------~-------------------------~----------~---------------_ovcc
1.6 k

4k

1.6 k

130

y

Ao-.......- . J

.-------4---------------~~-----~~-----~-------_4-----~_4-----0GND

-=

Component values shown are nominal.
All resistor values in ohms.
Positive Logic: Y = AB

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
H
H
H
L

(off state)
(off state)
(off state)
(on state)

ORDER INFORMATION
TYPE
75452

PART NO.
SN75452P

H = HIGH Level, L = LOW Level.

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted)
SYMBOL

TEST

PARAMETER

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VCD

Input Clamp Diode Voltage

8

10H

CONDITIONS

FIGURE

Output HI G H Current

7

VOL

7

TYP.t

MAX.

VCC = 4.75 V,

UNIT
V

2
II = -12 mA

V CC = 4.75 V, V OH = 30 V,

0.8

V

-1.5

V

100

JoLA

VIL = 0.8 V
VCC = 4.75 V,

Output LOW Voltage

MIN.

VIH = 2 V,

10L = 100 mA
VCC = 4.75 V,

0.25

0.4

0.5

0.7

V

VIH=2V,

10L = 300 rnA

mA

II

Input Current at Maximum Input Voltage

9

VCC = 5.25 V,

VI = 5.5 V

1.0

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

JoLA

IlL

I nput LOW Current

8

VCC = 5.25 V,

VI=O.4V

-1.6

rnA

ICCH

Supply Current, Output HIGH

VCC = 5.25 V,

VI =OV

11

14

rnA

ICCL

Supply Current, Output LOW

VCC = 5.25 V,

VI = 5V

56

71

rnA

TYP.

MAX.

tAil typical values are at VCC = 5 V, TA

=

10

-1.0

25°C.

AC CHARACTERISTICS (VCC = 5 V, TA = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

MIN.

50
14

6-95

10

~

200 mA,

RL = 50

n

CL = 15 pF,

UNIT
ns

35

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75453
DUAL POSITIVE-OR PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
8-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

r---------------------~--------------------~---------------~--------------------_ovcc

y

A

o--..----------J

~---------------4----------------~----------------------------------------~~~-----4-_oGND

'::" Component values shown are nominal.
Positive Logic: Y

All resistor values in ohms.

= A

+ B

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
ORDER INFORMATION

(on state)
(off state)
(off state)
(off state)

L
H
H
H

TYPE
75453

PART NO.
SN75453P

H = HIGH Level, L = LOW Level

ELECTRICAL CHARACTERISTICS (VCC
SYMBOL

=

D

5.0 V ±5%, T A = OG C to 70 C, unless otherwise noted)
TEST

PARAMETER

CONDITIONS

FIGURE

MIN.

TYP.t

MAX.

UNIT
V

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

0.8

V

-1.5

V

100

p,A

VCD

Input Clamp Diode Voltage

8

10H

Output HIGH Current

7

VOL

7

Output LOW Voltage

2
VCC = 4.75 V,

11=-12mA

VCC = 4.75 V, VOH = 30 V
VIH =2V
VCC = 4.75 V,

VIL = 0.8 V,

10L = 100 mA
VCC = 4.75 V,

0.25

0.4

0.5

0.7

V

VIL = 0.8 V,

10L = 300 mA

mA

II

Input Current at Maximum Input Voltage

9

VCC = 5.25 V,

VI = 5.5 V

1.0

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

p,A

IlL

Input LOW Current

8

VCC = 5.25 V,

VI = 0.4 V

-1.6

mA

VCC = 5.25 V,

VI =5V

8.0

11

mA

VCC = 5.25 V,

VI =OV

54

68

mA

ICCH

Supply Current, Output HIGH

IceL

Supply Curren't, Output LOW

11

-1.0

tAli typical values are at Vcc = 5 V, TA = 25°C.

D

AC CHARACTERISTICS (Vee = 5 V, T A = 25 C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tpHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-96

10

~

200 mA,

RL = 50

n.

CL = 15 pF,

MIN.

TYP.

MAX.

UNIT

35

ns

25

ns

10

ns

12

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75454
DUAL POSITIVE-NOR PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
8·LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 9T

r-------~-------.------+_~~~~------_Ovcc

4k

2k

4k

2k

1.6 k

130

y

1k
~----~----~~------------~---+--~--~-+----OGND

-=

All resistor values in ohms.

Positive Logic: Y

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

= A

+B

Y
H
L
L
L

(off state)
(on state)
(on state)
(on state)

ORDER INFORMATION
TYPE
75454

PART NO.
SN75454P

H = HIGH Level, L = LOW Level

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted)
SYMBOL

PARAMETER

TEST

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VeD

Input Clamp Diode Voltage

8

10H

Output HIGH Voltage

CONDITIONS

FIGURE

7

Output LOW Voltage

7

TYP.t

MAX.

VCC = 4.75 V,

II = -12 mA

VCC = 4.75 V, VOH = 30 V,
VIL =0.8 V
VIH = 2 V,

10l = 100 rnA
Vce = 4.75 V,

UNIT
V

2

VCC = 4.75 V,
VOL

MIN.

0.8

V

-1.5

V

100

J.LA

0.25

0.4

0.5

0.7

V

VIH = 2 V,

10l = 300 rnA
II

I nput Current at Maximum I nput Voltage

9

VCC = 5.25 V,

VI = 5.5 V

1.0

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

J.LA

8

VCC = 5.25 V,

VI=O.4V

-1.6

rnA

VCC = 5.25 V,

VI =OV

13

17

mA

VCC = 5.25 V,

VI = 5V

61

79

mA

IlL

I nput LOW Current

ICCH

Supply Current, Output HIGH

ICCl

Supply Current Output LOW

11

-1.0

rnA

t All typical values are at Vee = 5 V, T A = 2Soe.

AC CHARACTERISTICS (VCC = 5 V, TA = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHl

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHl

Transition Time, Output HIGH to lOW

TEST

CONDITIONS

FIGURE

14

6-97

10

~

200 mA,

RL = 50

n

CL=15pF,

MIN.

TYP.

MAX.

UNIT

50

ns

25

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75460A
DUAL POSITIVE-AND PERIPHERAL DRIVER
EaUIVALENT CIRCUIT

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

r-------~~------._--~------__Ovcc

4k

1.6 k

130

1E

1C

1k

SUB
G

cr-+--..
LOGIC FUNCTION
Positive Logic:
2c

2A

0--+--+-.......

Y = AG (gate only)
C = AG (gate and transistor)

ORDER INFORMATION

2E

TYPE
75460A
75460A

~-+--~------~--~~~------------~GND

PART NO.
SN75460AJ
SN75460AN

All resistor values in ohms.

75460A
ELECTRICAL CHARACTERISTICS (Vce = 5.0 V ±5%, T A = oDe to 70

De, unless otherwise noted)

TTL Gates
SYMBOL

TEST

PARAMETER

FIGURE

VIH

Input HIGH Voltage

1

VIL

Input LOW Voltage

2

VCD

Input Clamp Diode Voltage

3

VOH

Output HIGH Voltage

2

VOL

Output LOW Voltage

1

II

I nput Current at Maximum
Input Voltage

IIH

Input HIGH Current

IlL

I nput LOW Current

Input G
Input A
Input G
Input A
Input G

lOS

Short-Circuit Output eurrent+

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

t All typical values at VCC

Input A

CONDITIONS

Vce = 4.75 V,

II = -12 mA

VCC = 4.75 V,

VIL = 0.8 V,

IOH = -400}.LA
Vec = 4.75 V,

VIH=2V,

VI = 5.5 V

4

Vee= 5.25 V,

VI = 2.4 V

3

Vce = 5.25 V,

VI=O.4V

5

Vce = 5.25 V

D

+Not more than one output should be shorted at a time.

6-98

2.4

MAX.

UNIT
V

0.8

V

-1.5

V
V

3.3
0.22

10L = 16 mA
Vce = 5.25 V,

= 5 V, T A = 25 C.

TYP.t

2

4

6

MIN.

0.4
1
2
40
80
-1.6
-3.2

-18

V
mA
}.LA
mA

-55

mA

Vce = 5.25 V,

VI =OV

2

4

mA

Vec = 5.25 V,

VI =5 V

6

11

mA

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75460A

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted) Cont'd.
Output Transistors
SYMBOL

PARAMETER

CONDITIONS

V(BR)CBO

Collector-Base Breakdown Voltage

IC = 100,uA

V(BR)CER

Collector-E mitter Breakdown Voltage

IC

V(BR)EBO

Emitter-Base Breakdown Voltage

IE = 100,uA

IC= 0

VCE=3V,

IC = 100 rnA,

=

MIN.

100,uA

hFE

V

RBE = 500 n

60

V

5

V

IC = 100 rnA,

VCE = 3 V,

20

TA = o°c
IC = 300 rnA,

VCE=3V,
TA = o°c
VBE(sat)
VCE(sat)

25
30

TA=25°C

Ratio (Note 8)

25

IB = 10 mA,

Ic = 100 rnA

0.85

1

IB = 30 mA,

IC = 300 rnA

1.05

1.2

Collector-Emitter Saturation

IB = 10 rnA,

IC = 100 rnA

0.25

0.4

Voltage (Note 8)

IB = 30 mA,

IC = 300 rnA

0.5

0.7

Base-Emitter Voltage (Note 8)

tAil typ i-ca I values are at VCC

=5

V, T A

UNIT

65

IC = 300 rnA,

VCE=3V,

MAX.

IE = 0

TA = 25°C
Static Forward Current Transfer

TYP.t

V
V

= 25°C.

Note 8: These parameters must be measured using pulse techniques. tw = 300 ,us, duty cycle";;; 2%.

75460A
AC CHARACTERISTICS (VCC = 5 V, TA = 25°C)
TTL Gates
PARAMETER

SYMBOL
tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE
12

CL = 15 pF,

MIN.

RL = 400 n

TYP.

MAX.

UNIT

20

ns

8

ns

Output Transistors
PARAMETER

SYMBOL
td

Delay Time

tr

Rise Time

ts

Storage Time

tf

Fall Time

TEST

CONDITIONS +

FIGURE
IC
13

=

200 rnA,

IB(2)

=

-40 rnA,

CL=15pF,

IB(1)

=

MIN.

20 rnA,

VBE(off) = -1 V,
RL

=

50 n

TYP.

MAX.

UNIT

8

ns

12

ns

7

ns

6

ns

Gates and Transistors Combined
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST
FIGURE

14

CONDITIONS+

IC = 200 mA,

CL = 15 pF,

RL=50n

+Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.

6-99

MIN.

TYP.

MAX.

UNIT

40

ns

25

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75461A
DUAL POSITIVE-AND PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
8-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

r-----.---.....------o vee
4k

1.6 k

130

y

Ao--e--..T

500

1k

.---~----~--~-~~-~_oGND

-=

Component values shown are nominal.
All resistor values in ohms.
Positive Logic: Y = AS

TRUTH TABLE

H

A

B

L
L
H
H

L
H
L
H

= HIGH

Level, L

= LOW

Y
L
L
L
H

(on state)
(on state)
(on state)
(off state)

ORDER INFORMATION
TYPE
75461A

PART NO.
SN75461AP

Level

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted)
SYMBOL

PARAMETER

TEST

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VCD

Input Clamp Diode Voltage

8

IOH

Output HIGH Current

7

VOL

Output LOW Voltage

CONDITIONS

FIGURE

7

MIN.

TYP.t

MAX.

V

2

= 4.75 V,
VCC = 4.75 V,
VIH = 2 V
VCC = 4.75 V,

= -12 rnA
VOH = 60 V

IOL = 100 rnA

I

VCC

= 4.75 V,

VCC

II

VIL

V

0.4

0.5

0.7

p,A

V

= 0.8 V,

IOL = 300 mA

= 5.25

V

-1.5

0.25

VIL = 0.8 V
VIL

0.8

100

= 0.8 V,

UNIT

II

Input Current at Maximum Input Voltage

9

VCC

V,

VI = 5.5 V

1.0

mA

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

p,A

-':1.0

IlL

Input LOW Current

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

8
10

VCC = 5.25 V,

VI=O.4V

-1.6

mA

VCC = 5.25 V,

VI =5V

7.0

11

mA

VCC = 5.25 V,

VI =0 V

52

65

mA

TYP.

MAX.

tAli tvpical values are at V CC = 5 V, T A = 25° C.

AC CHARACTERISTICS (VCC = 5 V, TA = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tpHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-100

10

~

200 mA,

RL = 50

n

CL=15pF,

MIN.

UNIT

45

ns

25

ns

10

ns

12

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 75450/75460A SERIES
75462A
DUAL POSITIVE-NAND PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)
...-----.
. . . -----.....--_----0

-

CONNECTION DIAGRAM
8-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

vee

Component values shown are nominal.
All resistor values in ohms.
Positive Logic: Y = AS

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
H
H
H
L

(off state)
(off state)
(off state)
(on state)

ORDER INFORMATION
TYPE
75462A

PART NO.
SN75462AP

H = HIGH Level, L = LOW Level.

ELECTRICAL CHARACTERISTICS (Vec = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted)
SYMBOL

PARAMETER

TEST

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VCD

I nput Clamp Diode Voltage

8

IOH

Output HIGH Current

CONDITIONS

FIGURE

7

Output LOW Voltage

7

VCC = 4.75 V,

Input Current at Maximum Input Voltage

9

IIH

Input HIGH Current

9

IlL

I nput LOW Current

8

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

10

MAX.

UNIT
V

II = -12 mA

VCC = 4.75 V, VOH = 60 V

0.8

V

-1.5

V

100

JlA

VIL =0.8 V
VIH = 2 V,

IOL = 100 mA
VCC = 4.75 V,

0.25

0.4

0.5

0.7

V

VIH = 2 V,

IOL = 300 mA
II

TYP.t

2

VCC = 4.75 V,
VOL

MIN.

VI = 5.5 V

1.0

VCC = 5.25 V,

VI = 2.4 V

40

JlA

VCC = 5.25 V,

VI=O.4V

-1.6

mA

VCC = 5.25 V,

-1.0

mA

VCC = 5.25 V,

VI =OV

11

14

mA

VCC = 5.25 V,

VI = 5 V

56

71

mA

TYP.

MAX.

t All typical values are at VCC = 5 V, T A = 25°C.

AC CHARACTERISTICS (VCC = 5 V, T A = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-101

10

R<

200 mA,

RL = 50

on

CL = 15 pF,

MIN.

UNIT

50

ns

35

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75463A
DUAL POSITIVE-OR PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
a-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9T

~--------1---------~------+----------oVcc

y

Ao-......----..r

.-------~-------+----------------~--+_--~__oGND

Positive Logic: Y = A + B

All resistor values in ohms.

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
L
H
H
H

ORDER INFORMATION

(on state)
(off state)
(off state)
(off state)

TYPE
75463A

PART NO.
SN75463AP

H = HIGH Level, L = LOW Level

D
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = ODC to 70 C, unless otherwise noted)
SYMBOL

TEST

PARAMETER

VIH

Input HIGH Voltage

7

VIL

Input LOW Voltage

7

VCD

Input Clamp Diode Voltage

8

10H

CONDITIONS

FIGURE

7

Output HIGH Current

VOL

7

TYP.t

MAX.

2
VCC = 4.75 V,

II = -12 mA

VIH =2V
VIL = 0.8 V,

10L = 100 mA
VCC = 4.75 V,

UNIT
V

VCC = 4.75 V, VOH = 60V
VCC = 4.75 V,

Output LOW Voltage

MIN.

0.8

V

-1.5

V

100

J..LA

0.25

0.4

0.5

0.7

V

VIL = 0.8 V,

10L = 300 mA
II

I nput Current at Maximum I nput Voltage

9

VCC = 5.25 V,

VI = 5.5 V

1.0

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

J..LA

IlL

Input LOW Current

8

VCC = 5.25 V,

VI=O.4V

-1.6

mA

ICCH

Supply Current, Output HIGH

ICCL

Supply Current, Output LOW

11

-1.0

mA

VCC = 5.25 V,

VI =5V

8.0

11

mA

VCC = 5.25 V,

VI =0 V

54

68

mA

D

t All typical values are at Vee = 5 V, T A = 25 e.

D
AC CHARACTERISTICS (VCC = 5 V, TA = 25 C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-102

10::::: 200 mA,
RL = 50

n

CL=15pF,

MIN.

TYP.

MAX.

UNIT

35

ns

25

ns

10

ns

12

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
75464A
DUAL POSITIVE-NOR PERIPHERAL DRIVER
EQUIVALENT CIRCUIT (Each Driver)

CONNECTION DIAGRAM
8-LEAD FLATPAK
(TOP VIEW)
PACKAGE OUTLINE 9T

r-------~------~------~--._--~------_Ovcc
4 k

2k

4 k

2k

1.6k

130

y

1k

500

1k

~-----+--~--~------------~~~~~--~~~~GND

~

All resistor values in ohms.

Positive Logic: Y = A + B

TRUTH TABLE
A

B

L
L
H
H

L
H
L
H

Y
H
L
L
L

(off state)
(on state)
(on state)
(on state)

ORDER INFORMATION
TYPE
75464A

PART NO.
SN75464AP

H = HIGH Level, L = LOW Level

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%, T A = O°C to 70°C, unless otherwise noted)
SYMBOL

PARAMETER

TEST

VIH

Input HIGH Voltage

7

VIL

I nput LOW Voltage

7

VCD

I nput Clamp Diode Voltage

8

10H

Output HIGH Voltage

CONDITIONS

FIGURE

7

VOL

7

TYP.t

MAX.

2
VCC = 4.75 V,

V

II = -12 mA

VIL = 0.8 V
VIH=2V,

0.25

10L = 100 mA
VCC = 4.75 V,

UNIT

0.8

V

-1.5

V

100

JJ.A

VCC = 4.75 V, VOH = 60 V
VCC = 4.75 V,

Output LOW Voltage

MIN.

0.4
V

VIH = 2 V,

0.5

10L = 300 mA

0.7

II

Input Current at Maximum Input Voltage

9

VCC = 5.25 V,

VI = 5.5 V

1.0

IIH

Input HIGH Current

9

VCC = 5.25 V,

VI = 2.4 V

40

J.l-A

IlL

I nput LOW Current

8

VCC = 5.25 V,

VI=O.4V

-1.6

mA

ICCH

Supply Current, Output HIGH

ICCL

Supply Current Output LOW

11

-1.0

mA

VCC = 5.25 V,

VI =OV

13

17

mA

VCC = 5.25 V,

VI =5V

61

79

mA

t All typical values are at VCC = 5 V, T A = 25°C.

AC CHARACTERISTICS (VCC = 5 V, TA = 25°C)
SYMBOL

PARAMETER

tPLH

Propagation Delay Time, Output LOW to HIGH

tPHL

Propagation Delay Time, Output HIGH to LOW

tTLH

Transition Time, Output LOW to HIGH

tTHL

Transition Time, Output HIGH to LOW

TEST

CONDITIONS

FIGURE

14

6-103

10

~

200 mA,

RL = 50

n

CL=15pF,

MIN.

TYP.

MAX.

UNIT

50

ns

25

ns

10

ns

12

ns

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
PARAMETER MEASUREMENT INFORMATION
DC TEST CIRCUlTt

Vee

Vee

4,5 V

Vee

OPEN

I

I

1

Both inputs are tested simultaneously.

t

Each input is tested separately.

Fig. 1

Fig. 2

Each input is tested separately.

Fig. 3

lOS
Vee

Vee

Vee

OPEN

OPEN

Each gate is tested separately.
(75450A and 75460A only)

Each input is tested separately

Fig. 4

Both gates are tested simultaneously.

Fig. 6

Fig. 5

Vee

TEST TABLE
Vee

OUTPUT
INPUT
OTHER
CIRCUIT UNDER
INPUT
APPLY MEASURE
TEST

75451A
75461A

VIH

VIH

VOH

IOH

VIL

Vcc

IOL

VOL

75452
75462A

VIH

VIH

IOL

VOL

VIL

Vcc

VOH

IOH

75453
75453A

VIH

GND

VOH

IOH

VIL

VIL

IOL

VOL

75454
75454A

VIH

GND

IOL

VOL

VIL

VIL

VOH

IOH

tOH

uI 1

VOH

SEE

OPEN

TEST

TABLE

::'\ tOl

NOTE: Each input is tested separately.

Fig.7

NOTES:
A. Each input is tested separately.
B. When testing 75453/75463A and 75454/75454A
input not under test is grounded. For all other
circuits it is at 4.5'V.

Fig. 8

ICCH,ICCl
FOR AND, NAND CIRCUITS
Vee

Vee

ICCH,ICCl
FOR OR, NOR CI RCUITS
Vee

OPEN

Each input is tested separately.

Fig. 9

Both gates are tested simultaneously.

Fig. 10

t Arrows indicate actual direction of current flow. Current into a terminal is a positive value.

6-104

Both gates are tested simultaneously.

Fig. 11

I

FAI-RCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
PARAMETER MEASUREMENT INFORMATION
AC CHARACTE RISTICS

PROPAGATION DELAY TIMES, EACH GATE (75450A, 75460A ONLY)
TEST CI RCUIT
INPUT 2.4 V

Vee

5V

OUTPUT

VOLTAGE WAVEFORMS

--l

t------r- .;; lOn,

f--';;5n,

INPUT---9-0%.,.~1!
1.5V

~'"

~:
1

j,
9 0 % - - - - 3V

I }O%
I
I '''"'---0-.51'-'_1....;0: -

'X

1.5V

d-------

~~---

OUTPUT _ _ _ _..J.

NOTES:

ov

O
V "

,",- - - VOL

A The pulse generator has the following characteristics: PRR = 1 MHz, Zout ~ 50
B C

n-

include probe and jig capacitance.

L
C All diodes are FD777.

Fig. 12

•

SWITCHING TIMES, EACH TRANSISTOR (75450A, 75460A ONLY)
TEST CIRCUIT
10V

-lV

INPUT

to-----1I'--~-Q OUTPUT

VOLTAGE WAVEFORMS
1----0.31"
I

~5M9~k

10%",,~

INPUT _ _ _

!

~~lns

I
td-t---J
OUTPUT-----_~I.
• I t,
10%
~

-----l

I

9~k~.W---------

i ~~k

OV

~lns~

I

t,~

tf~I'
',II!!!~_ _ __
}
l~k

90%

NOTES:

3V

90%

A. The pulse generator has the following characteristics: duty cycle.s;;; 1%, Zout ~ 50
B. CL includes probe and jig capacitance.

Fig. 13

6-105

n.

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
PARAMETER MEASUREMENT INFORMATION

AC CHARACTERISTICS (Cont'd)

SWITCHING TIMES OF COMPLETE DRIVERS
TEST CIRCUIT
INPUT

VOLTAGE WAVEFORMS
10V

2.4 V

t--" 5 ns

--1
INPUT
75450A175460A
75451A175461A

f -.....- O

90%
1.5 V

75453 /75463A

OUTPUT

-I

I

I

;0%

..$
10%

~~II--_'::O~ ___

3V

I

,1.5 V

1.5 V

I

10%

I

I
--l

0.4 V

OV

tPLH--t---l

90%~l50%

OUTPUT

A.
B.
C.

0V

I

t----t-tPHL

NOTES:

- - - __ -

I

0.5~s

:"'5ns

3V

90%
1.5 V

11-~-::::::::::::~=:::::::::~J+-

1:

~~:~~j~~:~~~

I

10% I

,..

INPUT

I- ",10ns

U:

~I:

5~l
90%

10%

+---

--l

/-tTHL

I--t:rLH

The pulse generator has the following characteristics: PRR - 1 MHz, Zout ~ 50 n.
When testing 75450A, connect output Y to transistor base and ground the substrate terminal.
CL includes probe and jig capacitance.

Fig. 14

TYPICAL PERFORMANCE CURVES FOR 75450 SERIES. 75460A SERIES
75450A • 75460A TTL GATE
HIGH-LEVEL OUTPUT
VOLTAGE AS A FUNCTION
OF HIGH-LEVEL OUTPUT
CURRENT

75450A. 75460A TRANSISTOR STATIC
FORWARD CURRENT
TRANSFER RATIO AS A
FUNCTION OF
COLLECTOR CURRENT

4.0

100

I

VCC = 5 V

>

3.5

'"!:i«

3.0

I

"

I::0
I::0

0

l.5
2.0

~

1.5

'"i

1.0

so

\

~

-10

IOH -

-15

HIGH·L~VEL

1'\

20

-20

-25

10
-30

-35

o

-40

20

10

40

70

200

100

400

IC - COLLECTOR CURRENT - rnA

OUTPUT CURRENT - rnA

Fig. 15

Fig. 16

75450A • 75460A TRANSISTOR
BASE-EMITTER VOLTAGE
AS A FUNCTION OF
COLLECTOR CURRENT

TRANSISTOR COLLECTOREMITTER SATURATION
VOLTAGE AS A FUNCTION OF
COLLECTOR CURRENT

o. 6

1.2

If--~=

10
Ie
.
1.0 f-See Note 7

JOlc
J:..H::
r--:t::!=+
,'A

0.9
O.S

~k

0.7

A
~ t7

a:

IC
= 10
IS
o. 5f--See Note 7

~
TA=70'C- I--

~

VJ

~

6.4

TA=70~'1

o. 3

8

0.5

I

0.4

o. 2

0.3
0.2

O. 1

O. 1
.0

---

1~~bb

L::::: b:::=}::::::~

0

10

20

40

70

100

200

I

lI-

.--

~ ~TA=25'C

0.6

10

400

20

IC - COLLECTOR CURRENT - rnA

TA = O"C

25"C

rill

40

V

70

100

200

IC - COLLECTOR CURRENT - rnA

Fig. 17
NOTE 7.

,--

30

i\
-5

---

T~=~

~~

40

\

- ------

~ --

50

0.5

o

See N0le 7

60

J:

o

_ VCE = 3 V

90

~.

I

0

~;~_

70

J:

>

:

See Figure 2

"

0

>

~~L

Fig. 18

These parameters must be measured using pulse techniques. tw

6-106

=

300 J.Ls, duty cycle";;; 2%.

VOH

I

10%

400

VOL

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
TYPI CAL APPLI CA TI ONS
500 mASINK

GATED COMPARATOR

OUTPUT

Y '"

G+ lA

2A +

11\ 2A

Fig. 20

Fig. 19

FLOATING SWITCH
+5V

INPUT

4--"oJ'>Ar-_-.......--o IN-PHASE OUTPUT

---+-+-+--I----.

OUT-OF-PHASE OUTPUTo-......

•

THIS SIDE CAN PERFORM

THE SAME OR ANOTHER FUNCTION

Fig. 21

CORE MEMORY DRIVER
SOURCE
CONTROL

SQUARE-WAVE GENERATOR
a2an

B20n
01 pF

O.lpF

------,I
1/2 FSA2503M

I

I
i
I

J

!

SOURCE
CURRENT

OUTPUT

il

STROBE

SINK

CONTROL

Fig. 22
Source and sink controls are activated by input HIGH voltages (VIH ;;;. 2V).

Fig. 23

6-107

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
TYPICAL APPLICATIONS (Cont'd)
·DUAL MOS-TO-TTL DRIVER
DUAL TTL-TO-MOS DRIVER

-10 V OR NEGATIVE
SUPPLY OF MOS CIRCUIT

+5V

OUTPUT "A"

-10 V OR NEGATIVE
+5 V INPUT "A"

SUPPLY OF MOS CIRCUIT

OUTPUT "A"

2.7kn

22kn
INPUT "A"

o-.....-..N'v-1H~~-I----+---,
39pF

2.7kn

22kn

39pF

INPUT "S" O--+----'lM_~~--+----+_---J
STROSE

INPUT "S"

OUTPUT

33kn

"s"

STROSE

Fig. 24

OUTPUT "S"

Fig. 25

DUAL LAMP OR RELAY DRIVER
BALANCED LINE DRIVER

5V

INPUT "A"

+5V
Rt

...------0

--.JVVv---,
J..
I

LINE I

I

-=-

TWISTED
PAIR
LINE

L....._ _ _ _ _ _-Q LINE 2
Rt

INPUT
FROM

r- -JVI/'v- - - J

TTL
STROSE

Termination is made at the receiving end as follows:
Line 1 is terminated to ground through Zo/2;
Line 2 is terminated to +5 V through Zo/2;
where Zo is the line impedence.

INPUT "S"

current at ~ 10% to reduce surge current.
Note: Clamp diodes across relay·coils suppress reverse
emf when relay is turned off.

Fig. 26

Fig. 27

COMPLEMENTARY DRIVER
INPUT

*

t Optional keep-alive resistors maintain off-state lamp

TTL OR DTL POSITIVE LOGIC-LEVEL DETECTOR

5V

5Vo---.----~-----.....----------~

an

lkn

TEST "1"

r

INPUTo-o()oo~,()"....I

TEST "0"

390n
COMPLEMENTARY OUTPUTS FOR:
GO-NO-GO INDICATORS
MOS CLOCK ORIVERS
BIPOLAR RELAYS

I

9N0417404

INVERTER

39on1

Fig. 29

Fig. 28

6-108

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75450/75460A SERIES
TYPICAL APPLICATIONS (Cont'd)
MOS NEGATIVE-LOGIC-LEVEL DETECTOR
LOGIC SIGNAL COMPARATOR
5Vo-~~~~---------1--------------------~~--------------------~

Y=AS+BS

5V

INPUT "A"

Y = A8 + S

1kn
10kn t

2N5961

30kn t

120n

INPUT
STR08E

ti'he two input resistors must be adjusted for the level of MOS input.

INPUT "8"

Fig. 31

Fig. 30

IN-PHASE DETECTOR
1kn

5v o------+--""""M---+----------O OUTPUT

SIGNALS FROM
PEAK DETECTORS

I

A
8

A

o---+----.

OUTPUT

Output LOW occurs only when
inputs are low simultaneously.

•

t If inputs are unused, they should be connected to +5 V through a 1 kn. resistor.

Fig. 32

ALARM DETECTOR
5Vo----------------+-------------.--~

MULTIFUNCTION LOGIC-SIGNAL COMPARATOR
FROM ALARM
TRANSDUCE RS

5Vo-------~--------~---,

INPUT "A"

0-------+----...,

INPUT "8"

0---------11-----.

1 kn

1kn

I0--+-----_-----+---,
390n

FROM ALARM
TRANSDUCERS

=AS

INPUT "C"

390

n

I o-.....----------.J
I 0--+-_-------...1
390n

Y1

ALARM
RELAY

390 n

NOTE: 390 n. resistors will increase sensitivity of inputs
and consequently reduce the noise immunity of the
device. The clamp diode across the relay coil suppresses the reverse emf of the relay coil when the
relay is turned off.

'(1 = A + 8

Fig. 33

Fig. 34

6-109

75491-75492
MOS TO LED SEGMENT AND DIGIT DRIVER
FAIRCHILD LINEAR INTEGRATED CIRCUIT

GENERAL DESCRIPTION - The 75491 LED Quad Segment Driver interfaces MOS signals to
common-cathode LED displays. High output current capability makes the device ideal in time
multiplex systems using segment address or digit scan method of driving LED's to minimize the
number of drivers required.
The 75492 Hex LED/Lamp Driver converts MOS signals to high output currents for LED display
digit select or lamp select. The high output current capability makes the device ideal in time
multiplex systems using segment address or digit scan method of driving LED's to minimize the
number of drivers required.

75491
CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9A

INl

IN4

El

E4

Cl

C4

Vaa

74191
• 50mA SOURCE OR SINK CAPABILITY
• LOW INPUT CURRENTS FOR MOS COMPATIBILITY
• LOW STANDBY POWER
• FOUR HIGH GAIN DARLINGTON CIRCUITS

Vss

C2

C3

E2

E3

IN2

IN3

ORDER INFORMATION
TYPE
PART NO.
75491
SN75491N
75492
• 250 rnA SINK CAPABILITY
• MOS COMPATIBLE
• LOW STANDBY POWER
• SIX HIGH GAIN DARLINGTON CIRCUITS

75492
CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9A

EQUIVALENT CIRCUITS

1/3 OF 75492

1/2 OF 75491
IN

OUT

OUT

OUTl

INl

OUT2

OUT6

IN2

IN6

Vaa

Vss

IN3
4k!!

IN

6kl!

6kl!

7k!!

+--+-------'-~

430!!

- - - - VDD

o

6-110

INS

OUT3

OUTS

OUT4

IN4

I

+--+------+__~TO
NEXT

TO
NEXT
ORIVER

VOD

I
I
I

4k!!

DRIVER

ORDER INFORMATION
TYPE
PART NO.
SN75492N
75492

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75491 • 75492
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VSS (Note 1)
Input Voltage
Collector Voltage (Note 2)
Collector to Emitter Voltage (75491 Only)
Collector to Input .voltage
Emitter Voltage (75491 Only)
Emitter to Input Voltage (75491 Only)
VDD to Input Voltage (Note 3)
Continuous Collector Current
75491
75492
Continuous VDD Current (75492 Only)
Continuous Total Power Dissipation
Operating Temperature Range
Storage Temperature Range
lead Temperature (Soldering, 10 seconds)

10V
VSS
10V
10V
10V
5.0V
5.0V
5.0V
50mA
250mA
600mA
800mW
O°C to 70°C
_55° C to +125° C
260°C

NOTES
1. VSS terminal voltage is with respect to any other device terminal.
2. Voltage values are with respect to VOO terminal unless otherwise noted.
3. With the exception of the inputs, the Voo terminal must always be the most negative device voltage for proper operation.

75491 TRUTH TABLE
INPUT

OUTPUT
E

75492 TRUTH TABLE

OUTPUT
C

INPUT

OUTPUT

l

H

H

l

l

l

H

H

H

l

•
75491
ELECTRICAL CHARACTERISTICS (Vss = 10V, unless otherwise specified)
SYMBOL

PARAMETERS

VCEl

lOW level Collector-to-Emitter
Voltage

CONDITIONS

TYP.

MAX.

UNITS

VIN = 8.5V through 1 kn
IOl = 50mA, VE = 5V, TA = 25°C

0.9

1.2

V

VIN = 8.5V through 1 kn
IOl = 50mA, VE = 5V

0.9

1.5

V

VCH= 10V, VE = 0, liN = 40J,tA

100

J,tA

VCH = 10V, VE = 0, VIN = 0.7V

100

J,tA

3.0

mA

100

J,tA

1.0

mA

MAX.

UNITS

ICH

Collector HI G H Current

II

Input Current at Maximum
Input Voltage

VIN = 10V, IOl = 20mA

IER

Reverse Biased Emitter Current

IC = 0, VIN = 0, VE = 5V

ISS

Supply Current

MIN.

2.0

AC CHARACTERISTICS (VSS = 7.5V, T A = 25°C)
SYMBOL
tPHl
tPlH

PARAMETERS
Propagation Delay Time

CONDITIONS
Rl = 200n, VIN = 4.5V
Cl = 15pF, VE;"O

6-111

MIN.

TYP.
20

ns

100

ns

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75491 • 75492
75492
ELECTRICAL CHARACTERISTICS (VSS
SYMBOL

VOL

= 10V, unless otherwise specified)

PARAMETERS

CONDITIONS

Output HIGH Current

II

Input Current at Maximum Input
Voltage

ISS

Supply Current

tpHl

MAX.

UNITS

0.9

1.2

V

= 6.5V through 1 kO
= 250mA, T A = 25°C
VI N = 6.5V through 1 kn
IOl = 250mA
VOH = 10V, liN = 40~A
VOH = 10V, VIN = 0.5V

IOH

SYMBOL

TYP.

VIN
IOL

Output lOW Voltage

AC CHARACTERISTICS (VSS

MIN.

VIN

'.
1.5

V

200

~A

200

~A

3.0

mA

1.0

mA

MAX.

UNITS

0.9

= 10V, IOl = 20mA

2.0

= 7.5V, T A = 25°C)

PARAMETERS

CONDITIONS
Rl

Propagation Delay Time

Cl

tPlH

MIN.

= 390, VIN = 7.5V
= 15pF

TYP.
40

ns

600

ns

NOTE
All typical values are at T A = 25° C.

WAVEFORMS

TEST CIRCUIT
7.5V

TYPICAL APPLICATION

+V

VSS

~F-6---

I

I

1
75491
\ QUAD SEGMENT

I
I

~_1

1

______

!"~::==:=--=--_-~==_-_-_-::.~=-~-_-~==--_~_

VDD

J

I

.--:-::-:-. I

I

L_· _

__~

L...-_ _ _..,VSS

DRIVER
13 PACKAGES)

FNA-30
9DIGIT
LED DISPLAY

D1

I
1

I
I

-r=-~
-=
VDD

75492

I

1 DRIVER

I

I

HEX DIGIT

112 PACKAGES)

I

~_2_ _ _ _ _ _

------------~

INTERFACING BETWEEN MOS CALCULATOR CIRCUIT AND LED MULTI-DIGIT DISPLAY
This example of time multiplexing the individual digits in a visible display minimizes display circuitry. Up to twelve digits of a seven-segment
display plus decimal point may be displayed using only two 75491 and two 75492 drivers.

6-112

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 75491 • 75492
TYPICAL MOS INTERFACE APPLICATIONS

QUAD OR HEX
MOS RELAY DRIVER

QUAD OR HEX
MOS LAMP DRIVER
+v
+v

75491

75491

OR

OR

1----

1---75492

MOS
INPUT

75492

MOS
INPUT

O--+-'VV\.,--__---£

0--1--"""\,-_--[

I

L ___ _

MOS TO TTL LEVEL SHIFTER

MOS STROBED NOR DRIVER

+v

+v

1----75491

LOAD

LAMP
OR
RELAY

MOS
INPUT o--+-'VV\r--~-l..

I
MOS
INPUT 1 0--I--"VV1r-.....---£

J-.......--'I/VI~-+--<>

MOS
INPUT2

L ____

-+-+___'

TTL
OUT

I

120l!

+----4--+-----~

Fan Out = 2 TTL Load

MOS
STROBE
INPUT

0--1--""'\,-_---£

I

L ___ _
75491
OR

75492

Note: For the above applications, it is assumed that the ground pin on the 75491
is at the same potential as the most negative MOS power supply voltage.

6-113

•

BT13
DUAL SINGLE-ENDED LINE DRIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 8T13 Dual Line Driver is designed for driving 50n to 500n coaxial
cable, strip line, or twisted pair transmission lines. All inputs are TTL or DTL compatible and the
emitter-follower outputs enable two or more drivers to operate on the same line in party line applications.

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B, 9B

For a dual line driver to meet the IBM System/360 I/O Interface Specification, see 8T23 data sheet.
•
•
•
•
•

HIGH OUTPUT DRIVE CAPABILITY
HIGH SPEED
INPUT CLAMP DIODES
SINGLE 5 V SUPPLY OPERATION
SHORT CIRCUIT PROTECTED

16

15

14

ABSOLUTE MAXIMUM RATINGS
Input Voltage (Note 1)
Output Voltage (Note 1)
Supply Voltage (Note 1)
Storage Temperature Range
Hermetic DIP (S8T13E, N8T13E)
Molded DIP (N8T13B)
Operating Temperature Range
Military (S8T13)
Commercial (N8T13)
Lead Temperatures
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Soldering, 10 seconds)
Internal Power Dissipation (Note 2)

13

+5.5 V
+7.0 V
+7.0 V

12
11

_65° C to +150° C
-55°C to +125°C

10

-55°C to +125°C
O°C to +75°C
300°C
260°C
730 mW

ORDER INFORMATION
TYPE
S8T13
N8T13
N8T13

NOTES:
1. Voltages are with respect to the ground pin (pin 8).
2. Rating applies to ambient temperatures up to 75° C. Above 75° C derate linearly at 8.3 mW/o C.

PART NO.
S8T13E
N8T13E
N8T13B

LOGIC DIAGRAM

EaUIVALENT CIRCUIT (FOR EACH DRIVER)
v+O--------------4~~----------~------~--~------------------~--_,
360H

10
11

12

~-

____~

~-

____~

13
VOUT

5114)

719)

14
15

NOTE: Numbers refer to package pins (side A); numbers in parentheses are pinouts (side B).

6-114

V+ = PIN 16
GND=PIN8

FA-IRCHILD LINEAR INTEGRATED CIRCUIT • 8T13
ELECTRICAL CHARACTERISTICS FOR S8T13 (V+ = 5.0 V ±5%, TA = -55°C to +125°C (Note 3))
TEST CONDITIONS
LIMITS
AND GATE NO.1
PARAMETER

INPUTS

INPUT

OF NO.2

OTHER
UNDER

UNITS

OUTPUTS

NOTES
MIN.

AND GATE

INPUTS

TYP.

MAX.

TEST
2.0V

2.0V

0.8V

-75mA

9

OV

OV

OV

3.0 V

10

Output LOW Leakage Current

0.8 V

4.5 V

OV

0.4 V

Input LOW Current

0.4 V

4.5 V

Input HIGH Current

4.5 V

OV

Output HIGH Voltage
Output HI G H Leakage Current

2.4

V
JJ,A

500

-0.1

-800

JJ,A

-1.6

mA

40

JJ,A

ELECTRICAL CHARACTERISTICS FOR S8T13 AND N8T13 (V+ = 5.0 V, TA = 25°C.)
TEST CONDITIONS
LIMITS

AND GATE NO.1
PARAMETER

INPUTS

INPUT
UNDER

OF NO.2

OTHER

OUTPUTS

UNITS
NOTES
MIN.

AND GATE

INPUTS

TYP.

MAX.

TEST

12,15

32

ns

11, 15

Turn Off Delay, tpLL

ns

20

11, 15

Turn On Delay, tpHH

ns

20

12, 15

22

ns

Power/Current Consumption:
Output LOW

0.8V

0.8 V

0.8 V

14,17

315/60

rnW/rnA

Output HIGH

2.0V

2.0 V

2.0V

14,17

150/28

mW/mA

10mA

OV

OV

4.5 V

4.5V

OV

-250

rnA

4.5 V

4.5 V

OV

-30

rnA

-1.5

V

Input Latch Voltage
Output HIGH Current
Output Short Circuit
Input Clamp Diode Voltage

13

5.5

2.0V

16

-100

OV

16

V

-12 rnA

NOTES:
3. Specifications apply V+ = 5.0 V ±5% and aOe to 75°C for N8T13.
4. All voltage measurements are referenced to the ground terminal. Terminals not specifically referenced are left electrically open.
5. All measurements are taken with ground pin tied to zero volts.
6. Positive current is defined as into the terminal referenced.
7. Positive logic definition: "UP" Level = HIGH, "DOWN" Level = LOW.
8. Precautionary measures should be taken to ensure current limiting in accordance with Absolute Maximum Ratings should the isolation
diodes become forward biased.
9. Output source current is supplied through a resistor to ground.
10. With forced output voltage of 3 V no more than 500 JJ,A will enter the driver when output is in LOW state. V + = 0 V.
"11. RL = 37n. to ground.
12. Load is 37 n. in parallel with 1000 pF.
13. This test guarantees operation free of input latch-up over the specified operating supply voltage range.
14. I CC is dependent upon loading. I CC limit specified is for no-load test condition.
15. Reference ac Test Figure and Pulse Requirements.
16. Reference "Typical Output Current as a function of Output Voltage Curve."
17. V + = 5.25 V. Power Consumption specified for both drivers in package.

AC TEST CIRCUIT

INPUT
(
()3.0V

I

PULSE
GENERATOR

VOLTAGE WAVEFORMS

t-tpw-'

OUTPUT

(

·~
~--IEt:.
-

IL

P-

2,~,~·

1.5vifV:
lV
INPUT - - _ . . . . .

~*
I ""--------

I II

--/1

tf

r-tr

I

l-tPHH----:--~
5v

3Hl

I

INPUT PULSE:
Amplitude = 3.0 V
tpw = 40 ns (50% Duty Cycle)
tr = tf .;;; 5 ns (10% and 90% measurement points)

OUTPUT

6-115

1.

T:

I-

i\1.5V

T PLL

-I ""-----

•

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 8T13
TYPICAL PERFORMANCE CURVE FOR S8T13 AND N8T13
OUTPUT CURRENT AS A
FUNCTION OF OUTPUT VOLTAGE
250

200

"'\

«

E
I

I-

zw

a::
a::
:::>
u
I-

1

T A 25°C
v+; 5.0V

~I'-o..

150

\

\

100

:::>

\

~

I-

:::>
0

50

o

-

o

0.5

1.0

-

1.5

2.0

2.5

3.0

\

3.5

OUTPUT VOLTAGE - VOLTS

TYPICAL APPLICATIONS
75

n PARTY

LINE (2 DRIVERS, 3 RECEIVERS)

75

n COAX

Note: For party line operation, termination of each physical end of the line is recommended.

SIMPLEX OPERATION (1 DRIVER)

50n COAX

Note: For simplex operation, the line should be terminated only at the distant receiver site.

6-116

8T14
TRIPLE LINE RECEIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 8T14 Triple Line Receiver is designed to receive digital information from coaxial cable, strip line, or twisted pair single ended transmission lines. High input impedance (~30kn) presents minimal loading to the transmission lines in multiple receiver applications. The 8T14 has built in hysteresis which makes it ideal for such applications as Schmitt triggers,
one-shots, and oscillators. Use the 8T24 triple line receiver where IBM System/360 I/O Interface
Specification must be met.
•
•
•
•
•

BUILT-IN INPUT THRESHOLD HYSTERESIS
HIGH SPEED
INDEPENDENT CHANNEL STROBING
FANOUT OF 10 TTL LOADS
SINGLE +5V SUPPLY OPERATION

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 68, 98

A3
B3

ABSOLUTE MAXIMUM RATINGS
Input Voltage (Note 1)
Output Voltage (Note 1)
Supply Voltage (Note 1)
Storage Temperature Range
Hermetic DIP (S8T14E, N8T14E)
Molded DIP (N8T148)
Operating Temperature Range
Military (S8T14)
Commercial (N8T14)
Lead Temperatures
Hermetic DIP (soldering, 60 seconds)
Molded DIP (soldering, 10 seconds)
Internal Power Dissipation (Note 2)

Rl

+5.5V
+7.0V
+7.0V

'I
GND

'2

_55° C to +125° C
O°C to +75°C
300°C
260°C
730mW

Voltages are with respect to the ground pin (pin 8).
Rating applies to ambient temperatures up to 70° C. Above 70° C derate linearly at 8.3mW/ C.

EQUIVALENT CIRCUIT (EACH RECEIVER)

68011

S2

Bl

_65° C to +150° C
-55°C to +125°C

NOTES
1.
2.

SI
Al

ORDER INFORMATION
TYPE
PART NO.
SST14
SST14E
NST14
NST14E
NST14
NST14B
LOGIC DIAGRAM

62011

4k

soon

56n

A2Q-----I

6-117

•

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 8T14
HYSTERESIS TEST CIRCUIT
VCC =5.0V

1

CURVE TRACER
TEK 575

I

~

16

4

3

~11

14

'-- 15

10

R INPUT

VOUT

....- 5
~

6

~

12

~

C

7r----

9t---

~1

2

B

13

_ 0.33/lF

I--

r-::;r-B
T1.0/lF

1

E

'---------""1,r---V2- - - -V-

()

-==

OUTPUT

C

81

1.0V

--,,--VIN
1
2.0V

Verify in each of three (3) positions of S1 (F ig. 1) that the
following occurs per Fig. 2.
1. V1and V2 must be between O.8V minimum and 2.0V maximum.
2. Hysteresis = V 1 -V2 ;;;. O.3V.

Fig. 2

Fig. 1

APPLICATIONS

8T14 RECEIVER

Fig. 3

If more than one driver/receiver pair is to be used on each transmission
line, the line should be terminated at both ends as shown in Fig. 4

Fig. 4

SCHMITT TRIGGER APPLICATION

IN

IN
OV
OUT

8T14 RECEIVER
OUT

Fig. 5

6-118

\_1.2V

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 8T14
ELECTRICAL CHARACTERISTICS (V+ = 5.0 V ±5%; -55°C";; T A ,.;; +125°C For S8T14 (Note 3)
TEST CONDITIONS
PARAMETER

R

B

MIN.

TYP.

MAX.

UNITS

4.5V

OV

OV

-800}LA

10,16

2.6

3.5

V

OV

O.SV

OV

OV

-SOO}LA

10,16

2.6

3.5

V

O.SV

2.0V

OV

OV

16mA

11,15

0.4

V

OV

OV

2.0V

2.0V

16mA

11,15

0.4

V

Sn

OV

0.4V

-0.1

-1.6

mA

An

OV

-0.1

-1.6

mA

-0.1

-1.6

mA

0.17

mA

40

}LA

Output LOW Voltage

OAV

Bn

Input HIGH
Current

OUTPUTS

2.0V

Output HIGH Voltage

Input LOW
Current

A

S

LIMITS
NOTES

0.4V

Rn

3.SV

Sn

3.SV

4.5V

An

4.5V

OV

40

}LA

Bn

OV

4.5V

40

}LA

OV

OV

Hysteresis

4.5V

13,14

0.30

0.50

V

NOTE
3. Specifications apply from 0° C to + 75°C for N8T14.

ELECTRICAL CHARACTERISTICS (T A

= 25°C, V+ = 5.0V)
TEST CONDITIONS

LIMITS

PARAMETER
R
Turn-on Propagation Delay tpHH
Turn-off Propagation Delay tpLL

S

A

B

OUTPUTS

MIN.

VIN

5.0V

OV

OV

18

VIN

5.0V

OV

OV

18

Power/Current Consumption

Input Voltage Rating

TYP.

MAX.

20

30

ns

20

30

ns

315/60

380172

mW/mA

Sn

3.SV

10mA

OV

OV

5.5

V

An

OV

OV

10mA

OV

5.5

V

OV

OV

OV

10mA

3.SV

OV

OV

OV

Bn
Output Short-Circuit Current

Sn
Input Clamp Voltage

UNITS

NOTES

An
Bn

-12mA
-12mA
-12mA

V

5.5
OV

-50

-100

mA

-1.5

V

-1.5

V

-1.5

V

NOTES
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.

All voltage measurements are referenced to the ground terminal. Terminals not specifically referenced are left electrically open.
All measurements are taken with ground pin tied to zero volts.
Positive current is defined as into the terminal referenced.
Positive current flow is defined as into the terminal referenced.
Positive Logic Definition: "UP" Level = "HIGH"; "DOWN" Level = "LOW".
Precautionary measures should be taken to ensure current limiting in accordance with Absolute Maximum Ratings should the clamp
diodes on the S, A, and B inputs become forward biased.
Output source current is supplied through a resistor to ground.
Output sink current is supplied through a resistor to Vee.
This test guarantees operation free of input latch·up over the specified operating supply voltage range.
Hysteresis is defined as voltage difference between R input level at which output begins to go from LOW to HIGH state and level at
which output begins to go from HIGH to LOW.
= 5.0V.
Previous condition is a HI G H output state.
Previous condition is a LOW output state.
V+=5.25V.
Measured as time delay from R input gOing through 1.5V to the output gOing through 1.5V. (See ST24 data sheet ac test circuit).

"+

6-119

•

8T23
DUAL SINGLE-ENDED LINE DRIVER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL. DESCRIPTION - The 8T23 Dual Line Driver is designed to meet the requirements of
the IBM System/360 I/O Interface Specification for interface drivers. All inputs are TTL or DTL
compatible. Logic has been incorporated to ensure that no spurious noise is generated on the transmission line during the power-up and power-down sequence. The outputs are protected from short
circuits and have uncommitted emitter outputs which allows DOT-OR logic to be performed in
party I ine data bus appl ications.

•
•
•
•
•

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B, 9B

lOUT = 59.3 mA AT 3.11 V
UNCOMMITTED EMITTER OUTPUTS FOR PARTY LINE/WIRED-OR APPLICATIONS
SHORT CIRCUIT PROTECTION
SINGLE 5 V SUPPLY OPERATION
AND-OR LOGIC CONFIGURATION

16
15
14

13

ABSOLUTE MAXIMUM RATINGS
12

Input Voltage (Note 1)
Output Voltage (Note 1)
Supply Voltage (Note 1)
Storage Temperature Range
Hermetic DIP (N8T23E)
Molded DIP (N8T23B)
Operating Temperature Range
Lead Temperatures
Hermetic DIP (Soldering, 60 seconds)
Mo.lded DIP (Soldering, 10 seconds
Internal Power Dissipation (Note 2)

+5.5 V
+7.0 V
+7.0 V

11

10

_65° C to +150° C
_65° C to +125° C
O°C to +75° C
300°C
260°C
730mW

ORDER INFORMATION
TYPE
N8T23
N8T23

NOTES:
1. Voltages are with respect to the ground pin (pin 8).
2. Rating applies to ambient temperatures up to 70° C. Above 70° C derate linearly at 8.3 mW/o C.

PART NO.
N8T23E
N8T23B

LOGIC DIAGRAM

EQUIVALENT CIRCUIT (FOR EACH DRIVER)
V+O--------------4r-~----------~------~--~------------------_.--_,
360l!

1S!!

10
11
12
13
VOUT
7(91

14
15
3k

2k

V+ = PIN 16
NOTE: Numbers refer to package pins (side A); numbers in parentheses are pinouts (side B).

6-120

GND = PIN 8

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 8T23
ELECTRICAL CHARACTERISTICS FOR N8T23 (V+

= 5.0 V

±5%, T A

= OCC to

-

+75c C.)

TEST CONDITIONS
LIMITS

AND GATE NO.1
CHARACTERISTICS

INPUT
UNDER
TEST

Output LOW Voltage

INPUTS

OTHER
INPUTS

OF NO.2

OUTPUTS

MIN.

AND GATE

0.8 V

4.5 V

OV

-240 J1,A

OV

OV

OV

3.0 V

Input LOW Current

0.4 V

4.5 V

Input HIGH Current

4.5 V

OV

Output HIGH Leakage Current

ELECTRICAL CHARACTERISTICS FOR N8T23 (V+

UNITS

NOTES
TYP.

MAX.

9

+0.15

V

3, 16

40

J1,A

-1.6

mA

40

J1,A

-0.1

= 5.0 V, T A = 25c C.)

TEST CONDITIONS
AND GATE NO.1
CHARACTERISTICS

INPUT
UNDER
TEST

Output HIGH Voltage

2.0V

OTHER
INPUTS
2.0V

LIMITS
INPUTS
OF NO.2

OUTPUTS

UNITS

NOTES
MIN.

AND GATE

0.8 V

59.3 mA

TYP.

MAX.

12

20

ns

3.11

V

10,14

Turn-On Delay tpHH
Turn-Off Delay tPLL

11, 14

15

25

ns

10,14

12

20

ns

11, 14

20

35

ns

Power/Current Consumption:
Output LOW

0.8 V

0.8 V

0.8 V

13, 17

315/60

mW/mA

Output HIGH

2.0 V

2.0 V

2.0 V

13, 17

150/28

mW/mA

10 mA

OV

OV

4.5 V

4.5 V

OV

-250

mA

-1.5

V

Input Latch Voltage
Output HIGH Current
Input Clamp Diode Voltage

2.0V

-12 mA

12

5.5

15

-100

V

15

NOTES:
3. All voltage measurements are referenced to the ground terminal. Terminals not specifically referenced are left electrically open.
4. All measurements are taken with ground pin tied to zero volts.
5. Positive current is defined as into the terminal referenced.
6. Positive logic definition: "UP" Level = HIGH, "DOWN" Level = LOW.
7. Precautionary measures should be taken to ensure c,urrent limiting in accordance with Absolute Maximum Ratings should the isolation
diodes become forward biased.
8. Output source current is supplied through a resistor to ground.
9. With forced output current of 240 J1,A the output voltage must not exceed 0.15 V.
10. R L = 50 n to ground.
11. Load is 50 n in parallel with 100 pF.
12. This test guarantees operation free of input latch-up over the specified operating supply voltage range.
13. ,+ is dependent upon loading. ,+ limit specified is for no-load test condition for both drivers.
14. Reference ac Test Circuit and Pulse Requirements.
15. Reference "Typical Output Current as a function of Output Voltage Curve".
16. V+ = 0 V.
17. V+ = 5.25 V.

AC TEST CIRCUIT
INPUT
4

PULSE
GENERATOR

1
I

WAVEFORMS
OUTPUT

) 3.0V

~
.

-

I-tpw-j

C)

2V

~

iwnic,

INPUT

l.4V

I

I I

---I I

I---

1V

t,

I
I

l-',""~
U~

':'

INPUT PULSE:
Amplitude = 3.0 V
tpw = 50 ns (50% Duty Cycle)
tr = tf ~5 ns (10% and 90% measurement points)

f

I

1.4 V
1V

..::::1
I ,--t
2V

I

:

OUTPUT

6-121

,1.5V

l--tpLL-!

•

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 8T23
TYPICAL PERFORMANCE CURVE FOR N8T23

OUTPUT CURRENT AS A
FUNCTION OF OUTPUT VOLTAGE

J

I

Vee = 5.0 V
T A =25°e-

300

<{

E
I"
f-

z

w

I'..

200

"

a:
a:
::::>
u

"" 1'\

f-

::::>
0-

f-

::::>
0

100

o

1.0

2.0

\

3.0

\

5.0

4.0

OUTPUT VOLTAGE - VOLTS

TYPICAL APPLICATION

,-----------,

1/2 8T23 (SIDE A OR BI

,---------------1

I

I
I
I

1/38T24

I
I
---~\_-.r_rl"1
95ft COAX

I

I

I
I

I
I
I

I

I

I

I

~I

95ft

I

I
I

I

I
I
I
I

I

I
I
I
I
I

L ___ ~- ___________ ~I

IL_~ _ _ _ _ _ _ _ _ ~
INHIBIT
APPL Y LOGIC LOW
TO TURN OFF DRIVER
OUTPUT.

NOTE:

To insure proper logic operation, unused inputs should not be left floating. Tie the unused inputs to V+ through a current limit
resistor (2.2kn).
To inhibit the driver, apply a logic LOW voltage to one input from gate 1 and 2 as shown above.

6-122

8T24
TRIPLE LINE RECEIVER
FAIRCHILD LINEAR INTEGRATED CIRCU ITS

GENERAL DESCRIPTION - The 8T24 Triple Line Receiver is designed specifically to meet the IBM
System/360 I/O Interface Specification (File No. S360-19). The logic inputs (S, A, B) are fully TTL or
DTL compatible. The R (Receive) input is designed to withstand a positive dc input of +7 V with
power on (V+ = 5 V) and +6 V with power off, V+ = 0 V) and a negative dc input of 0.15 V with
power on or off. This protection allows normal bus operation even if one or more receivers have been
powered down.
•

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B, 9B

MEETS IBM SYSTEM/360 I/O INTERFACE SPECIFICATION

•

BUILT-IN INPUT THRESHOLD HYSTERESIS

•
•

HIGH SPEED
INDEPE-NDENT CHANNEL STROBING

•
•

FANOUT OF 10 TTL LOADS
SINGLE +5V SUPPLY OPERATION

ABSOLUTE MAXIMUM RATINGS
Input Voltage (Note 1)
Output Voltage (Note 1)
Supply Voltage (Note 1)
Storage Temperature Range
Molded DIP (N8T24B)
Hermetic DIP (N8T24E)
Operating Temperature Range
Lead Temperatures
Hermetic DIP (soldering, 60 seconds)
Molded DIP (soldering, 10 seconds)
I nternal Power Dissipation (Note 2)

+5.5V
+7.0V
+7.0V
_55° C to +1 25° C
_65° C to +150° C
O°C to +75°C
300°C
260°C
730mW

ORDER INFORMATION
TYPE
N8T24
N8T24

PART NO.
N8T24E
N8T24B

LOGIC DIAGRAM

NOTES:

1.
2.

Voltages are with respect to the ground pin (pin 8).
Rating applies to ambient temperatures up to 70°C. Above 70°C derate linearly at 8.3mW/C.

EQUIVALENT CIRCUIT (EACH RECEIVER)
56!)

PIN8
=GND
PIN 16 = V+

6-123

•

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 8T24
ELECTRICAL CHARACTERISTICS (V+ = 5.0 V ±5%, TA = O°C to +75° C)
TEST CONDITIONS
PARAMETER

R

A

B

1.70V

4.5V

OV

OV

-800p.A

OV

0.7V

OV

OV

-800p.A

0.70V

1.7V

OV

OV

16mA

9

0.2

0.4

V

OV

OV

1.7V

1.7V

16mA

9

0.2

0.4

V

Sn

OV

O.4V

-0.1

-1.6

mA

An

OV

-0.1

-1.6

mA

-0.1

-1.6

mA

0.17

mA

5.0

mA

5.0

mA

Output LOW Voltage

MIN.

TYP.

8

2.6

3.4

V

8

2.6

3.4

V

OUTPUTS

0.4V
O.4V

Bn

Input HIGH Current

UNITS

S

Output HI G H Voltage

I nput LOW Current

LIMITS
NOTES

Rn

3.11V

Rn

7.0V

Rn

6.0V

Sn

3.11V

10
4.5V

MAX.

40

p.A

An

4.5V

OV

40

p.A

Bn

OV

4.5V

40

p.A

ELECTRICAL CHARACTERISTICS (V+

= 5.0 V, T A = 25°C)
LIMITS

TEST CONDITIONS
PARAMETER

R

S

A

B

Turn-on Propagation Delay tpH H

VIN

5.0V

OV

OV

Turn-off Propagation Delay tpLL

VIN

5.0V

OV

OV

14

VIN

4.5V

OV

OV

12,13

Hysteresis

UNITS

NOTES
OUTPUTS

MIN.
14

0.2

TYP.

MAX.

20

30

ns

20

30

ns

0.4

V

Power/Consumption

f5

315

380

mW

Supply Current

15

60

72

mA

3.11V

10mA

OV

An

OV

OV

10mA

Bn

OV

OV

OV

3.11V

OV

OV

OV

Sn
Input Latch Voltage

Output Short Circuit Current

Input Clamp
Diode Vciltage

Sn
An
Bn

OV

11

5.5

V

OV

11

5.5

V

10mA

11

5.5

-12mA
-12mA
-12mA

-50

V
-100

mA

-1.5

V

-1.5

V

-1.5

V

NOTES:
3.
4.
5.
6.
7.
8.
9.

All voltage measurements are referenced to the ground terminal. Terminals not specifically referenced are left electrically open.
All measurements are taken with ground pin tied to zero volts.
Positive current is defined as into the terminal referenced.
Positive logic definition:
"UP" Level = "HIGH", "DOWN" Level = "LOW".
Precautionary measures should be taken to ensure current limiting in accordance with Absolute Maximum Ratings should the
isolation diodes become forward biased.
Output source current is applied through a resistor to ground.
Output sink Curre'nt is supplied through a resistor to V+.

10. V+ = O.OOV
11. This test guarantees operation free of Input latch up over the specified operating supply voltage range.
12. Hysteresis is defined as the voltage difference between the R input level at which the output begins to go from "HIG H" to"LOW" state
and the level at which the output begins to go from HIGH to LOW.
13. See Hysteresis test circuit.
14. Refer to AC test circuits.

15.

V+ = 5.25V.

6-124

FAIRCHILD LINEAR INTEGRATED CIRCUIT. 8T24
AC TEST CIRCUIT AND WAVEFORMS

V+ = 5.0V

16

84.5S1

D.

2.6V

u. T.

10

':"

3 Receivers in the package.
Test each Receiver using switch
positions as shown in Table 1.

TABLE 1
Receiver no.

Position

Input Pulse:

Switch 1

Amplitude = 2.6V
Pulse width = 200ns
(50% Duty Cycle)
tr = t f = 5ns (10% to 90%)

1.5V

-+_J

OUTPUT _ _

. Switch 2

Receiver 1

1

1

Receiver 2

2

2

Receiver 3

3

3

HYSTERESIS TEST CIRCUIT
V+ = 5.0V

1

VOUT
CURVE TRACER
TEK 575

I

~

4

16

3

~11

14

- - 15

10

r--

R INPUT

5

I V2
0.7V

~ 6
~

12

7

~

C

r~'
r

9_

~1

13 I"-

2
8

1
~

OUTPUT

Verify in each of three (3) positions of S 1 (F ig. 1) that
the following occurs per Fig. 2.
1. V x and V must be between 0.7V minimum and 1.7V
1
2
maximum.
2. Hysteresis = V 1 -V 2

B

1O
. I'F

(

E

81

Fig. 1

Fig. 2

TYPICAL APPLICATION

1/3(8T24)

I----~

I

I

I
I

95S1

I

L __·~':"
6-125

•

SHOOl3
2-PHASE MaS CLOCK DRIVERS
FAIRCHILD INTEGRATED MICROSYSTEM CIRCUIT

GENERAL DESCRIPTION - THE SH0013, designed for driving 2-phase MOS clock lines, is a dual
high voltage driver capable of driving large capacitive loads at computer speeds. The SH0013 was
designed to be driven by TTL circuits having moderate output current capability, such as TTL buffers
(9009, 9N40, 9H40, 9S40) or TTL line drivers (9614). The circuit may also be driven by standard
TTL circuits, such as the 9002, with slight degradation in rise time. Capacitive coupling from the
driving TTL circuitry to the SHOO13 provides independent fixed width output pulses. DC level shifting
may also be employed and is especially simple for +5V, -12V MOS systems.

CONNECTION DIAGRAM
12-LEAD TO-8 TYPE PACKAGE
(BOTTOM VIEW)
PACKAGE OUTLINE 5V

The device is supplied in a 12-pin TO-8 type package, capable of dissipating 1.0 W at 70° C or 0.5 Wat
125° C. Use of an efficient fin radiator extends allowable dissipation to 1.66 W at 70° C or 0.8 Wat
+125°C.

•

NC

INPUT
A,
CASE

NC

INPUT NC

30 V OUTPUT VOLTAGE SWING

•

±600 mA OUTPUT CURRENT CAPABILITY

•

5 MHz REPETITION RATE

•

CAPACITIVE LEVEL SHIFTING

•

INDEPENDENT FIXED WIDTH OUTPUT PULSES

•

"ZERO" QUIESCENT POWER DISSIPATION

B2

ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage Difference (Pin 11 to Pin 5)
Input Current (Pins 2,4,6,8)
Peak Output Current (Pins 10, 12)
Power Dissipation at 25°C (No Heat-Sink - See Figure 10)
Storage Temperature
Operating Temperature
Military (SH0013M)
Commercial (SH0013C)
Lead Temperature (1/16" from case for 60 seconds)

30V
±75mA
±600 rnA
1.5W
-65°C to +150°C

ORDER INFORMATION
TYPE
PART NO.
0013
SH0013HM
0013C
SH0013HC

-55°C to +125°C
O°C to +85°C
300°C

SCHEMATIC DIAGRAM
INPUT A,

INPUT A2 4 o - - - - - - - . - - t - - - . . . - - - - - ( .

D,

+-----0', v+

INPUT B, 6 0 - - - . - . - - - - - . - - + - - - - - 0 ( .

INPUT B2

6-126

FAIRCHILD INTEGRATED MICROSYSTEM CIRCUITS • SH0013
ELECTRICAL CHARACTERISTICS (Note 1) (Figures 14, 16)
PARAMETER

CONDITIONS

MIN.

Output LOW Voltage

lOUT = -50 mA liN = 1 mA
IOUT=-100p.A liN = 1 mA

V+ - 3.0
V+ -0.9

Output HIGH Voltage

lOUT = 50 mA liN = 10 mA
lOUT = 100 p.A liN = 10 rnA

Power Supply Leakage Current

VT - V- = 30 V
IOUT=IIN=O

Negative Input Voltage Clamp

V -1.2

liN = -10 rnA

td(on)
trise (Note 3)
td(off) (Note 2)
tfall (Note 2)
tfall (Note 3)
tpw

CIN = 2200 pF RIN = 0
V+ -V-= 20V

40
40
340

CL = 1000 pF

CI N = 500 pF R I N = 0
V+ -V-= 20V

trise
tfall
tpw
Positive Output Swing
Negative Output Swing

CL = 200 pF
lOUT = 0

TYP.

MAX.

UNITS

V+ -1.0
V+ -0.7

V
V

V-+ 1.5
V-+ 0.7

V-+ 2.0
V- +0.9

V
V

<1.0

100

p.A

30
50
30
80
120
490

ns
ns
ns
ns
ns
ns

V -0.7

V

15
35
15
50
70
420
15
20
110

ns
ns
ns

V+-0.7
V +0.7

V
V

NOTES:
(1) V + = 20 V, V _ = 0 V unless otherwise specified. Typicals are for 25° C; minimum and maximum values are for 0° C " T A" 85° C for 0013C,
0
and -55°C" T A" +125 C for the 0013M.
(2) Values shown are for output pulse width determined by input pulse width (Fig. 16, VIN 2).
(3) Output rise and fall times vary depending upon input capacitance and resistance. Refer to Figures 7 and 8.

TABLE 1. TYPICAL DRIVE CAPABILITY OF SH0013 DRIVEN BY 9614 at 70°C ambient (No Heat Sink)
V+-V_

FREQUENCY
50% DUTY CYCLE

PULSE WIDTH

28V
20V
16V

4MHz

100 ns

28V
20V
16V

2MHz

200 ns

28V
20V
16V

1 MHz

200 ns

28V
20V
16V

0.5 MHz

500 ns

RIN

CIN

0

10n

0

10n

CL (MAX)

RISE TIME (MIN)

700 pF

50 pF
200 pF
350 pF

7 ns
10 ns

1800 pF

100 pF
400 pF
700 pF

5 ns
14 ns
19 ns

2300 pF

400 pF
1000 pF
1700 pF

19 ns
34 ns
45 ns

4800 pF

2800 pF
5500 pF
9300 pF

130 ns
183 ns
248 ns

PERFORMANCE CURVES
Fig. 1

PULSE WIDTH AS A
FUNCTION OF RIN AND CIN
FOR SHOO13 AND
9614 LINE DRIVER

Fig. 2
PULSE WIDTH AS A
FUNCTION OF RIN AND CIN
FOR SHOO13 AND
9009 DUAL BUFFER
1000

.---.---....--....,.---,-"""""T---,-.----.--.---.

Fig. 3
PULSE WIDTH AS A
FUNCTION OF RIN AND CIN
FOR SHOO13 AND
9002 NAND GATE

900
800
700
600
500 I---I--+-+--+-~
400 t----1-f--t__

100
1000

2000

3000

INPUT CAPACITANCE - pF

4000

5000

1---1--+-+--+--+--+-+
1000

2000

3000

INPUT CAPACITANCE - pF

6-127

4000

5000

1000
I NPUT CAPACITANCE - pF

•

FAIRCHILD INTEGRATED MICROSYSTEM CIRCUITS· SH0013
PERFORMANCE CURVES (Cont'd)
PULSE WIDTH
AS A FUNCTION OF
AMBIENT TEMPERATURE

Fig. 4

PULSE WIDTH
AS A FUNCTION OF
TTL SUPPLY VOL TAGE
f..--I-C\l.~1~6~

Fig. 5

500

1000

--

SEE FIG. 14
900

-

400

800
700

f--

'--- t : L : l P F

--

-

. 400

f-- 1---

300

i--

-

30

f-- f-- I-

>
I

'--

w
u
z
w

C:N~~pF

....-

0

-~IN=jOOOJF

~-

a;;

~

~

100

200

I
~14 ~R

o

-55 -35 -15

5

25

45

65

85

9!Xf9 DR1IVER

10
5.5

5.0
TTL SUPPLY VOLTAGE-V

AMBIENT TEMPERATURE _·C

Fig. 7

TA = 25·C
RIN =0
CL = 1000 pF

I

4.5

105 125

20

~

&.=LJF

100

ABSOLUTE MINIMUM RISE/FALL
TIME AS A FUNCTION OF
OUTPUT LOAD CAPACITANCE
AND VOLTAGE SWING

a;;

300

600
500

f..--

T

10-T
f-- f- CIN = 5000 pI'

Fig. 6

MAXIMUM LOAD CAPACITANCE (pF)

RISE TIME
AS A FUNCTION OF
INPUT RESISTANCE

Fig. 8

FALL TIME
AS A FUNCTION OF
INPUT CAPACITANCE

120

,..-.,...--r---.----,r---r---.----.--,..--.--.

110

1--+-+--+-i-+-+-+---1I---h-oO!l

100 I--+-+--+-i-+-+~
901--+-~_+~-+_~

80

~
~

701--+-~_+~~~~~·

..J

~

601--+-~~~~~~-+-1--+-4

301---11--+-+-

250L.......I--...Jl0-.l--...J2Q-..L...--30L..-..L...--40L..-..I...-..J50
INPUT RESISTANCE -Ill)

PU LSE WI DTH - ns

AVERAGE INTERNAL POWER
Fig. 9

TRANSITION TIMES
AS A FUNCTION OF
AMBIENT TEMPERATURE

100

80
70
60

50

40
30

20
10

o

-

l..-

I--

F~~~

...- ......

MAXIMUM ALLOWABLE
POWER DISSIPATION
(12 LEAD TO-8 PACKAGE)

2.5

J

90

Fig. 10

z

0

~

ill

1.75

..........

1.5

0

-

..J

1.25

CD

RISE TIME~~"--

~~
5200pF

CL = l000pF
RlfO I

-55 -35 -15

f-0

SHOO13
00l~F

_ 9614

~

25

45

~

-20V

65

85

105 125

~

«

""'" .......... ..........

1.0
NO HEAT SINK
0.75

r--.....

~

/

I

400

DUTY CYCLE I

I

a;;

"

~

~

--- ""'"r-.....

300

..J

I"..........

~

~

"

/{oo!./
200

V /' / i
/
"'"
l/1/ ~ ......... l..,..o-

..........

>
«

o
o

25

50

75

~~ ~

o
o

.~~

125

100

20
SUPPLY DIFFERENCE - V

TRANSIENT POWER
AS A FUNCTION OF
FREQUENCY FOR
20 V SUPPLY DIFFERENCE

Fig. 13

1000

1000

900

900

BOO

800

700 I-++-I-+-~-~

700

III

-

_iff;
-~
I

500

200
100

o

/

A

I

/

~+_lv·.Jov

/

~~

+-_______

_ _"""T'"_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

t
_~.7-V+-T-YP-.---_,I
o

.l

T

RISE

I

v+(oV)

I-I-FALL

I

TIME

I

TIME

~5O%],-o.9O%-----_LOGIC ..0..

PULSE
WIOTH

OUTPUT
PULSE

Oll.TPUT
SWING

_-1,_-r-______

l'_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~..:.:lO%~--------LbGIC .. l"

t

0.7 V TYP.

__--'-y_________________________________ V- (-20V)
Logic "0" = Most positive output voltage

V+ = MOS VSS Supply

Logic "1" = Most negative output voltage

V
= MOS VDD Supply
V+ = Y- - Power Supply Difference

-

Output Swing = Clock pulse amplitude

V+ - Y- = Power Supply Difference

PULSE CHARACTERISTICS
All output pulse characteristics (rise time, fall time, pulse width) are determined by the input circuitry (RIN, CIN) and the driving element.
In operation, the driving element, such as a.9614 line driver, delivers a positive voltage through the coupling elements to the SH0013 input
transistor. As the input voltage reaches approximately 0.6 V, the input transistor (a1) begins to turn on and discharge the load capacitance in
some rise time (t r ). If RIN = 0 and CIN > 1000 pF, the rise time is determined by the input current available from the driver. For the 9614,
the available current is ~ 90 mA, causing the SH0013 to deliver a peak output current of ~ 550 mAo Adding input resistance lowers the available input current, increasing the rise time. When the output is fully ON (Logic "1"), the input capacitor will continue to discharge; the driver
output impedance, coupling resistor (if any) and the SHOO13 input impedance combine in series to determine the output pulse width. When the
input current has decayed to a level which is insufficient to keep the input transistor saturated, it begins to turn off and the upper output
transistor (a2) begins to charge the load capacitor in some fall time (tf). Fall time is affected by the load capacitance and the input coupling
components (RIN, CIN).
Typical pulse widths are shown in Figures 1-5 for various drivers versus coupling capacitance and resistance.
RISE TIME/FALL TIME LIMIT
The maximum transient output current that the SH0013 may conduct is ±600 mAo More current than this might cause permanent damage or
shorten the life of the device. The transient output current is given by
AV
Ipeak = - t - X 0.8 X CL

Eq.1

where AV = output swing, t = tr or tf (10% to 90%), CL = load capacitance, 0.8 == fraction of output swing from 10%
to 90%.
Refer to Figure 6 for absolute minimum computed rise/fall times; see Figure 7 for typicals. Fall time is affected somewhat by the coupling
elements as shown in Figure 8.. See Figure 9 for rise/fall time variations with temperature.
MAXIMUM CAPACITIVE LOADING
The maximum capacitive load is determined by the maximum allowable dissipation of the TO-8 type Package, output swing, frequency and
duty cycle. Duty cycle and supply difference determine the average internal power dissipated in the 1100[2 resistors (Pdc).
Pdc =

(V+ _V-)2
1100
X (Duty Cycle)

Eq.2

where duty cycle refers to the fraction of the cycle spent in the logical "1" state.
Figure 11 shows computed average internal power as a function of duty cycle and supply difference. Frequency, output swing and load
capacitance determine the transient power dissipated in a1, and a2 due to charging and discharging the load capacitance. Transient power
(Pac) may be computed as
Pac = C (AV)2 f
Eq.3
where AV

= output

swing. For 16V or 20V supplies, see Figures 12 or 13.

For other supply voltages, use Eq. 3. The maximum allowable power dissipation versus ambient temperature for the TO-8 type Package is shown
in Figure 10. The sum of the average internal power (Pdc) and the transient power (Pac) is limited by the maximum allowable package
dissipation.
Eq.4
The maximum load capacitance may be easily determined using Eqs. 1, 2, 3, and 4.
APPLICATION CIRCUITS
Figures 17 and 18 show typical application circuits. Figure 17 shows a full two-phase system, where the coupling resistance and capacitance set
the pulse width. Figure 18 shows a method of dc level shifting for +5V, -12V MOS systems. Note that in this circuit the SH0013 output waveform is identical to the waveform applied to the 9002.

6-129

•

FAIRCHILD INTEGRATED MICROSYSTEM CIRCUITS • SH0013
STANDARD AC TEST
CIRCUIT

TYPICAL APPLICATION
AC TEST CI RCUIT
+5.00 V

+20V

+5.00 V

+20 V

2N914
(OR EQUIV.)

CLOCK INPUT ' - - -.......- - - - -.......- - - - - - - - -........

CLOCK INPUT
f = 500 kHz

f = 500 kHz

50% DUTY CYCLE

50% DUTY CYCLE

AMPLITUDE = 5V

AMPLITUDE = 5 V

tr = tf .;;; 10 ns

Fig. 14

* 9614,9009,9002
Fig. 15

tr = tf';;; 10 ns

TIM ING DIAGRAM
~----------------------------+5V

OV-----r

OV __.....I!

'---------------OV
- - - - . 1 ~9O%~-----LOGIC "0"

VOUT
1'----------o4-'.::..:.::....--~-- LOGIC "1"

VIN1:
VIN2:

RC INPUT NETWORK DETERMINES t pw . ALL PARAMETERS APPLICABLE
EXCEPT td off.
INPUT PULSE WIDTH DETERMINES t pw .

Fig. 16

TWO-PHASE MaS CLOCK DRIVER
CIRCUIT
+5V

WAVEFORMS
Vss

1/29614

Fi~.

17

DC LEVEL SHIFTING
Vss = +5V

Voo or VGG = -12V

Fig. 18

6-130

SH2001
HIGH VOLTAGE, HIGH CURRENT DRIVER
FAIRCHILD INTEGRATED MICROSYSTEMS

•
•
•
•
•
•

INPUTS DTL/TTL COMPATIBLE
USE FOR CORE, CABLE, AND LAMP DRIVER
HIGH CURRENT CAPABILITY . . . 250 mA SINKING CURRENT AT 0.5 V
HIGH VOL TAGE CAPABILITY • . . 50 V LVCEO
LOGIC FLEXIBILITY . . . 4-INPUT NAND WITH INHIBIT (NOR) INPUT
HIGH SPEED . . . ton = 70 ns (TYP), toff = 110 ns (TYP)

CONNECTION DIAGRAMS
(SEE BLOCK DIAGRAM)
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E

Vce

ABSOLUTE MAXIMUM RATINGS (25°C Free Air Temperature unless otherwise noted)
+40 V
Voltage Applied to Pin 8
Voltage Applied to Pin 10
8V
Internal Pointer Dissipation
680mW
Metal Can
570mW
Flatpak
_65° C to +150° C
Storage Temperature
1 mA
I nput Reverse Current
1A
Current on Pin 8
Operating Temperature Range
-55°C to +125°C
Military (SH2001)
O°C to 70°C
Commercial (SH2001 C)

•

GND

ORDER INFORMATION
TYPE
PART NO.
SH2001
SH2001HM
SH2001HC
SH2001C

10-LEAD FLATPACK
(TOP VIEW)
PACKAGE OUTLINE 3F
BLOCK DIAGRAM/CONNECTION DIAGRAM

8
Vee

2

8 = 1 • 2· 3· 4 + 9 POSITIVE

3

(NAND LOGIC)

4

GND

GND~5
6

7

ORDER INFORMATION
TYPE
PART NO.
SH2001
SH2001 FM
SH2001C
SH2001FC

Note: Above pin numbers apply to both flatpak and can, Top View.

6-131

FAIRCHILD INTEGRATED MICROSYSTEMSSH2001
SH2001 AND SH2001 C

GUARANTEED TEST SEQUENCE

LIMIT

TEST
NO.

LTPD
GROUP

PIN 1

PIN 2

PIN 3

PIN 4

PIN 5

1

A

VIH

VIH

VIH

VIH

2

A

3

A

4

A

5

A

6

A

7

A

8

B

9

PIN 6

PIN 7

PIN 8

GND

GND

IOL1

VIL

GND

GND

IOL1

VIL

GND

PIN 9

PIN 10

SENSE

MIN.

MAX.

VCCL

V8

VOL

VCCL

V8

VOL

IOL2

VCCL

V6

VOL2

GND

IOL2

VCCL

V6

VOL2

GND

IOL2

VCCL

V6

VOL2

VIL
GND

GND

IOL2

VCCL

V6

VOL2

GND

IOL2

VCCL

V6

VOL2

VCCH

11

IR
IR

VIL
VIL

VIL

VIH

GND

GND

GND

GND

B

VR
GND

VR

GND

GND

GND

VCCH

12

10

B

GND

GND

GND

GND

VCCH

13

IR

11

B

GND

GND

VR
GND

VR

GND

VCCH

14

IR

1.2

B

VCCH

19

IR

13

C

14

C

15

C

16

C

VR

17

C

18

0

19

E

20

F

GND

VR

VR

VR

VR

GND

VCCH

11

-IF

VR

VF

VR

VR

GND

VCCH

12

-IF

VR

VR

VF

VR

GND

VCCH

13

-IF

VR

VR

VF
GND

GND

VCCH

14

-IF

VCCH

19

VCCL

V6

VCCL

18

lOX

VpD

110

IpDH

110

VF

GND

VF

GND
GND

GND

GND
IOL3

GND

VOX

GND

GND

-IF
VOH

21

F

GND

VMAX

22*

F

GND

VpD

ton

23*

F

GND

VPD

toff

GND

IMAX

*See Test Conditions on Page 3
FORCI NG FUNCTIONS (Temperature Range _55° C to +125° C)

SH2001

-55°C

+25°C

+125°C

UNITS

4.50
5.50

4.50
5.50

4.50
5.50

V
V

1040

5.00
8.00
1.10

VIH
VR
VF

2.10
4.00

1.90
4.00

0.80
1.70
4.00

0040

0040

0040

V

IOL1

250

250

250

mA

IOL2

34.0

36.0

32.0

mA

IOL3
VOX

8.0
40.0

8.0
40.0

8.0
40.0

mA
V

SYMBOL
VCCL
VCCH
VPD
VMAX
VIL

FORCING FUNCTIONS (Temperature Range O°C to +70°C)

V
V
V
V
V

SH2001C

SYMBOL

O°C

+25°C

+70°C

UNITS

VCCL
VCCH

5.00

5.00

5.00

5.00

5.00

5.00

V
V

1.20

VIH
VR

2.00

.950
1.80
4.00

V

VIL

8.00
1.10
1.90

4.00

4.00

VF

0.45

0045

0.50
250

V
V

34.0
8.0
40.0

mA

V

5.00

VPD
VMAX·

IOL1

250

250

IOL2
IOL3
VOX

36.0
8.0
40.0

36.0
8.0
40.0

6-132

V
V

mA
mA
V

FAIRCHILD INTEGRATED MICROSYSTEMS SH2001
SH2001

TEST LIMITS (Temperature Range -55°C to +125°C)
-55°C
MIN.

SYMBOL

+25°C
MAX.

2.00

2.10

O°C

0.45
0.45

V
V
V
JJ.A
mA
JJ.A
mA
mA
ns
ns

5.0
1.50
200

+25°C
MIN.

MAX.

+70°C
MAX.

0.45
0.45

VOL1
VOL2
VOH
IR
-IF
lOX
IpDH
IMAX
ton
toff

UNITS

SH2001C

TEST LIMITS (Temperature Range O°C to +70°C)

MIN.

MAX.

1.80
6.0
1.60
5.0
30.6
29.6
160
220

1.60

SYMBOL

MIN.

0.45
0.45

0.45
0.45

VOL1
VOL2
VOH
IR
-IF
lOX
IpDH
IMAX
ton
toff

+125°C
MAX.

MIN.

MIN.

0.45
0.45

2.05

1.95

MAX.

UNITS

0.5
0.5

V
V
V
JJ.A
mA
JJ.A
mA
mA
ns
ns

1.85
10.0
13.5
200

5.0
1.40
5.0
30.6
34.0
200
260

1.40

TABLE OF L TPD'S (These apply to test -sequence page 2)
GROUP

COLD

A

15%

HOT
10%
10%
10%
10%
10%
10%

B

15%
15%

C
D

E
F
TYPICAL SWITCHING TIMES

15%
15%
15%
15%
15%
15%

SWITCHING TIME TEST CONDITIONS

250
200
~

...--.__--0 OUTPUT

150

l/~

I

en
w
::a:

f=

~~ V

100
50

-

~

~ton

V

i.,...oo'" ~

~~ ~

0

TEMPERATURE

INPUT

ov-_......_ . . I

6-133

•

FAIRCHILD INTEGRATED MICROSYSTEMS SH2001
APPLICATIONS
LAMP DRIVER

'"'~'~A~~OM§V ~ ~-"'% ~
x

COUNTER,
ETC.

LAMP TEST

-

+2B VDC

LATCHING RELAY

LATCH INPUT

<'>----9

II

>---~r_~~r-~

,. 50V

UNLATCH { :
INPUTS
3

DTL INTERFACE DRIVER

r-<:>---.....- - 0 OUTPUT
RL

(Logic levels selected
by Vee)

Vee
RL;;' 160n at Vee = 40V
RL;;' Bon at Vee = 20V

HIGH CURRENT LINE TRANSMITTER

'NV'mG~

50neABLE

INPUTS

Vee
(UPTO+12V)

NON-INVERTING INPUT

NOTE: If only non-inverting input is used, one of the inverting inputs must be grounded.

6-134

SH2002
DTL HIGH POWER DRIVER
FAIRCHILD INTEGRATED MICROSYSTEMS

•
•
•
•
•
•

LOGIC FLEXIBILITY . . . LATCHABLE 4-INPUT NAND WITH INHIBIT (NOR) INPUT
HIGH CURRENT CAPABILITY . . . UP TO 150 mA
HIGH VOLTAGE CAPABILITY . . . 50 V LVCEO
INPUT COMPATIBLE WITH DTL/TTL PRODUCTS
FULL -55°C to +125°C TEMPERATURE OPERATION
APPLICATIONS INCLUDE CABLE AND LAMP DRIVER

CONNECTION DIAGRAMS
(SEE BLOCK DIAGRAM)
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E
Vee

ABSOLUTE MAXIMUM RATINGS (25°C Free Air Temperature unless otherwise noted)
Voltage Appl ied to Pin 10 (continuous)
+B.OV
Input Reverse Current
1.0mA
Voltage Applied to Pin B (continuous)
+40V
Voltage Applied to Pin 10 (pulsed < 1 second)
+12V
BOOmW
Power Dissipation (Derate Linearity to +175°C)
Storage Temperature Range
-65°C to +150°C
Metal Can, Flatpak
Molded Dip
-55°C to +125°C
Operating Temperature Range
Military (SH2002)
-55°C to +125°C
O°C to 70°C
Commercial (SH2002C)

GND

•

ORDER INFORMATION
TYPE
PART NO.
SH2002
SH2002HM
SH2002C
SH2002HC

10-LEAD FLATPACK
(TOP VIEW)
PACKAGE OUTLINE 3F
Vee

BLOCK DIAGRAM

GND

8

ORDER INFORMATION
TYPE
PART NO.
SH2002
SH2002FM
SH2002C
SH2002FC

10-LEAD MOLDED DIP
(TOP VIEW)
PACKAGE OUTLINE 9F

2

3
4

GND~5
7

6

ORDER INFORMATION
PART NO.
TYPE
SH2002C
SH2002PC
Note: Above pin numbers refer to all packages, Top View

6-135

FAIRCHILD INTEGRATED MICROSYSTEMS SH2002
SH2002 AND SH2002C

GUARANTEED TEST SEQUENCE

LIMIT
TEST
NO.

LTPD
GROUP

PIN 1

PIN 2

PIN 3

PIN4

PIN 5

VIH

VIH.

VIH

PIN 6

PIN 7

PINS

PI 1\1 9

PIN 10
VCCL

Vs

VOL

VIL

VCCL

Vs

VOL

SENSE

MIN.

MAX.

1

A

VIH

GND

GND

lOll

2

A

VIL

GND

GND

lOll

3

A

VIL

GND

IOL2

VCCL

V6

VOL2

4

A

GND

IOL2

VCCL

V6

VOL2

5

A

GND

IOL2

VCCL

V6

VOL2

6

A

GND

IOL2

VCCL

V6

VOL2

7

A

VIL
GND

GND

IOL2

VCCL

V6

S

B

GND

GND

VCCH

II

VOL2
IR

VIL
VIL

GND

GND
GND

GND

GND

VCCH

12

IR

VR
GND

GND

GND

VCCH

13

IR

VR

GND

VCCH

14

IR

VCCH

19

IR

II

-IF
-IF

9

B

VR
GND

10

B

GND

VR
GND

11

B

GND

GND

12

B

13

C

VF

VR

14

C

VR

15

C

VR

16

C

VR

17

C

1S

0

19

E

20

F

21

F

GND

VCCL
VCCH
VPD
VMAX
VIL
VIH
VR
VF
IOL1
IOL2
VOX

VR

VR

VR

GND

VCCH

VF

VR

VR

GND

VCCH

12

VR

VF

VR

GND

VCCH

13

-IF

VR

VR

VF
GND

GND

VCCH

14

-IF

GND
GND

GND

VF

GND

GND

GND

GND

GND

GND

VOX

GND

FORCING FUNCTIONS (Temperature Range -55°C to +125°C)
SYMBOL

VIH

-IF

VCCH

19

VCCL

V6

VCCL

IS

lOX

VPD

110

IpDH

VMAX

110

IMAX

VOH

SH2002

-55°C

+25°C

+125°C

UNITS

4.50
5.50

4.50
5.50
5.00
S.OO
1.10
1.90
4.00
0.40
150
S.O
40.0

4.50
5.50

O.SO
1.70
4.00
0.40
150
7.50
40.0

V
V
V
V
V
V
V
V
mA
mA
V

1.40
2.10
4.00
0.40
150
S.O
40.0

FORCI NG FUNCTIONS (Temperature Range 0° C to +70° C)

SH2002C

SYMBOL

O°C

+25°C

+70°C

UNITS

VCCL
VCCH
VPD
VMAX
VIL
VIH
VR
VF
IOL1
IOL2
VOX

5.00
5.00

5.00
5.00
5.00
S.OO
1.10
1.90
4.00
0.45
250
S.O
40.0

5.00
5.00

V
V
V
V
V
V
V
V
mA
rnA
V

1.20
2.00
4.00
0.45
250
S.O
40.0

6-136

.950
1.S0
4.00
0.50
250
7.5
40.0

FAI RCHI LD INTEGRATED MICROSYSTEMS SH2002
SH2002

TEST LIMITS (Temperature Range -55°C to +125°C)

+25°C

-55°C
SYMBOL

MIN.

MIN.

MAX.

+125°C
MAX.

0.45
0.45

VOL1
VOL2
VOH
IR
-IF

0.40
0.40

2.10

2.00

lOX
IpDH
IMAX

O°C

V
V
V

5.0
1.50
200

J.LA
rnA
J.LA
rnA
rnA

+70°C

+25°C
MAX.

MIN.

MAX.
0.45
0.45

VOL1
VOL2
VOH
IR
-IF

UNITS

0.45
0.45

SH2002C

TEST LIMITS (Temperature Range O°C to +70°C)

MIN.

MAX.

1.80
2.0
1.60
5.0
30.6
29.6

1.60

SYMBOL

MIN.

MIN.

0.45
0.45

2.05

1.95

MAX.

UNITS

0.5
0.5

V
V
V

10.0
1.35
200

J.LA
rnA

1.85
5.0
1.40
5.0
30.6
34.0

1.40

lOX
IpDH
IMAX

J.LA
rnA
rnA

TABLE OF L TPD'S (These apply to test sequence page 2)
GROUP

COLD

A

15%

B
C

HOT
10%
10%
10%
10%
10%
10%

15%
15%

D

E
F

TYPICAL SWITCHING TIMES

15%
15%
15%
15%
15%
15%

SWITCHING TIME TEST CONDITIONS

250
200
C
I
Cfl
W
~

i=

150
100

toft / '
L........

. ....~ -ton

50

L'
~

6 - -___- 0 ( ) OUTPUT

V

",

~~

0

TEMPERATURE

INPUT

ov-_....._

6-137

J

•

FAIRCHILD INTEGRATED MICROSYSTEMS SH2002
APPLICATIONS
LAMP DRIVER

LAMP TEST

o---~""""""",

2 - NO. 327 BULBS

INPUTS FROM
DECADE
COUNTER,
ETC.

+28 Vdc

LATCHING RELAY OR FAULT LAMP DRIVER

NO. 330
BULB

LATCH INPUT 0---<'1"".........

9

>-----~--~VV-__£

+14 Vdc
6o--------~--~

UNLATCH {
INPUTS

~

+28 Vdc

2

3

Relay will unlatch if any input (1, 2,3) goes LOW.

OUTPUT TRANSFER PULSE SAFE OPERATING AREA

1.5

1, \\ \ \ \
~
\ \ N "1. "'~
$
~
I\..

en

~



t)

0:.

0

lt)

UJ

..J
..J

0.5

.........

0

t)

I

'"

' " 0,
0

$.0

J~

~~

!d

o

o

5.0

10

15

'"

. . . . .............

........ .............
...............

20

r---......

r--....

--.......

25

VCE - COLLECTOR TO EMITTER VOLTAGE - VOLTS

6-138

~ r--.......

f'.
30

.............
35

SH2200
HIGH VOLTAGE, HIGH CURRENT DRIVER
FAIRCHILD INTEGRATED MICROSYSTEMS

FEATURES
• INPUT DTL/TTL COMPATIBLE
• HIGH SINKING CURRENT CAPABILITY . . . 500 mA AT 0.6 V
• HIGH VOLTAGE CAPABIL1TY . . . 50 V, VOX
• LOGIC FLEXIBIL1TY . . . 4"INPUT NAND WITH INHIBIT (NOR) INPUT

CONNECTIQN DIAGRAMS
(SEE BLClCK DIAGRAM)
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E
vee

APPL1CATIONS
• RELAY AND LAMP DRIVER WITH LATCHING
• TAPE READOUT, TEST EQUIPMENT
• SOLENOID DRIVER

ABSOLUTE MAXIMUM RATINGS
Voltage Applied to Pin 8
Voltage Applied to Pin 10
I nput Reverse Current
Current on Pin 8
Storage Temperature Range
Metal Can and Flatpak
Molded DIP
Operating Temperature Range
Metal Can and Flatpak
Molded DIP

+50V
+8.0V
1.0mA
1.0A

GND

ORDER INFORMATION
TYPE
SH2200
SH2200C

-65°C to +150°C
-55°C to +125°C
-55°C to +125°C
O°C to +70°C

Maximum Power Dissipation
At 25°C Ambient Temperature
Metal Can (Note 1)
Flatpak (Note 1)
Molded DIP

PART NO.
SH2200HM
SH2200HC

10-LEAD FLATPACK
(TOP VIEW)
PACKAGE OUTLINE 3F

680mW
575mW
455mW
GND

Note 1. Use proper heat sink at temperature above 100° C

ORDER INFORMATION
TYPE
PART NO.
SH2200
SH2200FM
SH2200C
SH2200FC

BLOCK DIAGRAM

10-LEAD MOLDED DIP
(TOP VIEW)
PACKAGE OUTLINE 9F

8
2

8=

3

1 • 2· 3· 4 + 9 POSITIVE
(NAND LOGIC)

4

GND~5
6

7

ORDER INFORMATION
TYPE
PART NO.
SH2200C
SH2200PC

Note: Above pin numbers apply to all package types, Top View

6-139

•
•

FAIRCHILD INTEGRATED MICROSYSTEMS SH2200
GUARANTEED TEST SEQUENCE
TEST
NO.

LIMITS

LTPD GROUP AT
COLD

+25°e

PIN 6

Vee

Vs

VOL1

VIL

Vee

Vs

VOL1

GND

IOL1

VIL

Vee

Vs

VOL1

GND

GND

IOL1

VIL

Vee

Vs

VOL1

GND

GND

IOL1

VIL

Vce

Vs

VOL1

lOL2

Vee

V6

VOL2

GND

IOL2

Vee

V6

VOL2

GND

lOL2

Vee

V6

VOL2

PIN 3

PIN 4

PIN 5

VIH

VIH

VIH

GND

GND

IOL1

GND

GND

GND

B

A

·e

VIH

B

A

e

VIL

4

-

-

5

-

6

-

-

-

7

B

A

e

S

B

A

e

9

B

A

e

10

B

A

e

11

B

A

e

VIL
VIL
VIL

GND

VIL
VIL
VIL

MAX

lOL1

PIN 2

3

MIN

PIN 10

PIN 1

2

SENSE

PIN 9

HOT

VIL
GND

GND

lOL2

GND

lOL2

PIN 7

PIN S

VIH

Vee

V6

VOL2

Vee

V6

VOL2

12

A

e

VR

GND

GND

GND

GND

Vee

11

IR

13

A

e

GND

VR

GND

GND

GND

Vee

12

IR

14

A

C

GND

GND

VR

GND

GND

Vee

13

IR

15

A

e

GND

GND

GND

VR

GND

Vee

14

IR

16

A

e

Vee

19

IR

A

e

Vee

11

-IF

A

C

-IF

17
1S

B
B

19

B

A

e

20

B

A

C

21

B

A

e

22

B

A

e

23

-

A

e

24

-

A

-

25

-

A

-

GND
VF
VR
VR
VR

VR
VF
VR
VR

VR
VR
VF
VR

Vee
VPD

VR

GND

VR

GND

Vee

12

VR

GND

Vee

13

-IF

VF

GND

Vee

14

-IF

GND

GND

Vee

19

Vee

V6

Vee

IS

VPD

110

IpD

VMAX

110

IMAX

VF

GND
GND

GND

GND
IOL3

GND

VOX

GND
GND

GND

FORCING FUNCTIONS (Temperature Range o.oe to 70°C)
SYMBOL

VR

GND

lOX

SH2200C

oOe

+25°e

5.0

5.0

o
+70 e
5.0

UNITS
V
V

5.0

V

S.O

VMAX

-IF
VOH1

1.9

1.8

1.6

V
V

VR

4.5

4.5

4.5

V

VF

0.45

0.45

0.45

V

50

50

V

VIL
VIH

0.S5

VOX

0.S5

0.S5

IOL1

500

500

500

rnA

IOL2

16

16

16

rnA

IOL3

o
TEST LIMITS (Temperature Range oOe to 70 e)
SYMBOL

rnA

S.O

oOe

SH2200C
+25°e

o
+70 e

UNITS
V

VOL1

0.6

0.6

0.6

VOL2
VOH1
I.R
-IF

0.45

0.45

0.45

V

1.95

1.S5

1.65

V

60
1.6

1.6

60
1.6

J.lA
rnA

5.0

200

12.2

J.lA
mA

30

mA

lOX
IpD
IMAX

6-140

FAIRCHILD INTEGRATED MICROSYSTEMS SH2200
FORCING FUNCTIONS (Temperature Range -55°C to +125°C)
SYMBOL

_55°C

+25°C

+125°C

UNITS

5.0

5.0
5.0

5.0

V
V
V
V
V
V
V
V
mA

VCC
VpD
VMAX
V,L
V,H
VR
VF

0.8
2.0
4.5
0.4

VOX
lOll

500
16

IOL2
IOL3

SH2200

8.0
0.9
1.7
4.5
0.4
50
500
16

0.8
1.4
4.5
0.4
50
500

mA
mA

16

8.0

TEST LIMITS (Temperature Range -55°C to +125°C)
SYMBOL

SH2200

-55°C

+25°C

+125°C

0.8
0.4
2.05

0.6
0.4
1.75

0.7
0.4
1.45

V
V
V

60
1.6
5.0
11
25

60
1.6
200

JlA
mA

VOLl
VOL2
VOHl
'R
-IF

1.6

lOX
IpO
'MAX

UNITS

JlA
mA
mA

PERFORMANCE CURVES
TYPICAL SWITCHING TIME
AS A FUNCTION OF
AMBIENT TEMPERATURE

OUTPUT VOLTAGE
TEST CIRCUIT

•

1.2
CJ)

I...J

0

1.0

I
w

0.8

\

>

(!)

...J

0

>

0.6

~

0.4

I

Ie = 600 mA

"""-

0

...J

"- .........1

'""-...

II:l

\.

"-

«
I-

0.2

le=5OOmA
le= 400mA
Ie

0

~oomA

>

o

25

·55

---

---------

125

70

T A - AMBIENT TEMPERATURE - °e

TYPICAL OUTPUT VOLTAGE
AS A FUNCTION ·OF
AMBIENT TEMPERATURE

SWITCHING TIME TEST CIRCUIT

300

loon

logy has made possible advanced standard circuits
such as the J,JA 758 phase locked loop stereo decoder
and the ~A7800 series of three terminal voltage
regulators. Other advanced products include custom
camera circuits utilizing MOS, linear and digital circuitry and technology.
Many other complex linear circuits are being
developed for consumer applications from automotive
to television to calculators. A sampling of these will
be found in the New Product section of this data catalog.
The Fairchild consumer linear team is working
with customers to bring to the market linear circuits
which will optimize cost and performance requirements
of consumer electronic products - and they are being
reliably produced in volume by the linear volume leader.
Contact us for your consumer needs.
Put
Fairchild to work for you.

7-3

•

CONSUMER CIRCUITS SELECTION GUIDE

AUTOMOTIVE & APPLIANCE
CONTROL CIRCUITS

AUDIO CIRCUITS

DEVICE TYPE

Power Amplifier

Preamplifier
JJ,A741

JJ,A742

JJ,A7350*

JJ,A7351*

JJ,A739

JJ,A749

X

X

JJ,A705*

JJ,A706

X

X

Audio Driver
Audio Pre-Amp, Single/Dual
Audio Power Amp, Single/Dual
Audio Mute
AFC/AFT
AGC
ACC
Chroma Amplifier
Chroma Demodulator
Chroma Processor

X

Comparator
Converter
DC Amplifier
Detector
Demodulator
Electronic Attenuator
I F Amplifier
Limiter
Luminance Amplifier
Mixer
Modulator
Noise Gate
Oscillator
Operational Amplifier

X

X

Phase Comparator
Regulated Power Supply
Sync Separator
Stereo Switch
RF Amplifier
Tachometer
Thyristor & Scr Control

X
X

Tint Control
Voltage Regulator
Video Amplifier
Zener Reference

7-4

X

AM/FM RECEIVER CIRCUITS
AM, FM, IF & Detector
J,!-A703

pA720

pA753

pA757

Stereo Decoders

2136*

3075

3076*

pA732

pA758

pA767

pA768

pA769

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

•

X
X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

*See New Product Section

7-5

CONSUMER CIRCUITS SELECTION GUIDE

TV RECEIVER CIRCUITS
AFT
DEVICE TYPE

Chroma Processing

3064

3066

2 Chip PAL

3 Chip NTSC

2 Chip NTSC
3067

~A746

~A780

~A781

1326*

~A786

TBA510*

Audio Driver
Audio Pre-Amp, Single/Dual
Audio Power Amp, Single/Dual
Audio Mute
AFC/AFT

X

AGC
ACC

X

Chroma Amplifier

X

X
X

Chroma Demodulator

X

X

Chroma Processor

X
X

X

X

Comparator
Converter
DC Amplifier

X

Detector

X

Demodulator

X

Electronic Attenuator
I F Amplifier

X

X

Limiter
Luminance Amplifier
Mixer
Modulator
Noise Gate

X

X

Oscillator
Operational Amplifier
Phase Comparator

X

Regulated Power Supply

X

Sync Separator
Stereo Switch
RF Amplifier
Tachometer
Thyristor & Scr Control

X

Tint Control

X
X

Voltage Regulator
Video Amplifier
Zener Reference

X

X

X

7-6

X

X

VOLTAGE REGULATORS
Luminance

TBA970*

Horizontal

Sound Systems

Amplifier

VIDEO TAPE
RECORDER SYSTEMS

Oscillator

~A704*

3065

X

X

TBA920*

~A723

~A7800

~A78MOO*

~A733

~A796

X

X

X
X

X

X

X

X

X

X

X

X

•

X

X
X

X

X
X

X

X

X

X

X

X
X

7-7

*See New Product Section

~A703
RF-IF AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA703 is a monolithic RF-IF Amplifier constructed using the
Fairchild Planar* epitaxial process and is intended for use as a limiting or non-limiting amplifier,
harmonic mixer, or oscillator to 1SO MHz. The low internal feedback of the device insures a higher
stability-limited gain than that available from conventional circuitry. Including the biasing network in
the same package reduces the number of external components required, thereby increasing the
reliability and versatility of the device.

CONNECTION DIAGRAM
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE SZ

v+

•

29 mmho MINIMUM FORWARD TRANSADMITTANCE

•
•

1.0 mmho/O.05 mmho MAXIMUM INPUT/OUTPUT CONDUCTANCE
18 pF/4.0 pF MAXIMUM INPUT/OUTPUT CAPACITANCE

DECOUPLINeGB
7
OUTPUT

3
INPUT HIGH

5
4

INPUT LOW

GROUND

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Output Collector Voltage
Voltage Between Input Terminals
I nternal Power Dissipation
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 seconds)

20V
24V
±S.O V
200mW
O°C to +70°C
-6SoC to +1S0°C
300°C

NOTE: Pin 4 connected to case.

ORDER INFORMATION
TYPE
PART NO.
703HC
703C

•

EQUIVALENT CIRCUIT

50 !!

V+~--~AA~--~----------------~----------~

OUTPUT

INPUT

GROUND

·Planar is a patented Fairchild process.

7-9

FAIRCHILD LINEAR INTEGRATED CIRCUITS • fJA703
703C
ELECTRICAL CHARACTERISTICS (T A

= 25°C, V+ = 12 V

PARAMETER

unless otherwise specified)
MIN.

CONDITIONS

Supply Current

elN

Power Consumption

elN

=0
=0
=0
= 400 mV rms , f = 1 kHz

Quiescent Output Current

elN

Peak-to-Peak Output Current

elN

Output Saturation Voltage

= 2.5 mA
elN = 10 mV rms , f = 1 kHz
elN < 10 mVrms,f = 10.7 MHz
elN < 10 mV rms , f = 10.7 MHz
eOUT = 100 mV rms , f = 10.7 MHz
eOUT = 100 mV rms , f = 10.7 MHz
f = 10.7 MHz, RS = 500 n.
f = 100 MHz, RS = 500 n.

1.5

TYP.

MAX.
14

mA

110

170

mW

2.5

3.3

mA
mA

3.0

17

Forward Transadmittance
I nput Conductance
I nput Capacitance
Output Conductance
Output Capacitance
Noise Figure

UNITS

9.0

29

1.7

V

1.0

mmho

33

mmho

0.35
9.0

18

0.03

0.05

2.0

4.0

pF
mmho
pF

6.0

dB

8.0

dB

TYPICAL PERFORMANCE CURVES FOR 703C

INPUT RESISTANCE AND
CAPACITANCE AS A FUNCTION
OF INPUT VOLTAGE
25

INPUT ADMITTANCE AS A
FUNCTION OF FREQUENCY

20

V+~ 12V

20

Vi
I

~~c;~

,.....,

"') r<,...

'"'"t--

rrCtNcr-

o

I

100

200
300
I NPUT VOLTAGE - mVrms

400

/

~

o
500

I II

0.6

I

0.5

~

CONDUCTANCE
0.4

I

1,..0' ....

1/

0.2

--

0.1

o
100

o
I

1000

FREQUENCY - MHz

MAXIMUM REVERSE
TRANSADMITTANCE AS A
FUNCTION OF FREQUENCY

FORWARD TRANSADMITTANCE
AS A FUNCTION OF FREQUENCY
50

sut~lJcE-

V

0.3

LI l/

I

cON6uc~ME

0.7

... 1-'

o

11
11

~

v+ 12V
TA • 25°C

0.8

...... ~

I.................

o

0.9

I

~~ ~ r--

1--

1.0

I stiSC~~~NCE
I

v+ ~ I~~l
I-TA ' 25°C

I

TA ' 25°C
-f"5MHz

r-- -

OUTPUT ADMITTANCE AS A
FUNCTION OF FREQUENCY

I

~

~v

o

100
FREQUENCY - MHz

1000

OUTPUT CURRENT AS A
FUNCTION OF INPUT VOL TAGE

0.05

.........
V+'I2V
TA ' 25°C

40

MAGNITUDE
30

........... :--..

-40

0.04

-so

0.03

I-~
20

-120

10

f.-- V

r--I-

rH~~

o
I

-160

-200
10
100
FREQUENCY - MHz

1000

"\

V+'I2V
TA • 25°C

v+ -12V
TA ' 25"C

-

f--

\
\
\

0.02

/

0.01

o
I

-

\
\.

J

V

'\.

~f-'"

10
100
FREQUENCY - MHz

7-10

o
1000

-250

~
-150

-50
50
I NPUT VOLTAGE - mV

150

250

uA706
5 WATT AUDIO AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The /-LA706 monolithic 5.0 W Audio Amplifier is constructed using the
Fairchild Planar* epitaxial process. It is ideally suited as an audio amplifier in automobile radios.
Provided with adequate heat sinking, the circuit is optimized to provide 5.5 W (continuous output)
into a 4.0 n speaker using a single 14 V supply. The circuit operates over the full automobile battery
range of 6.0 V to 16 V. The /-LA 706 incorporates such speci al features as self-centering bias, direct
coupling to the input, low quiescent current, high input impedance and low distortion. Operation as a
5.0 W audio amplifier is achieved with minimal external components.

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 9H, 9J

Other applications for the /-LA 706 are home audio equipment, TV receivers and many industrial
appl ications.
OUTPUT
N.C.
GROUND
N.C.

•
•
•
•
•
•
•
•

OUTPUT POWER 5.5 W (14 V - 4 n)
LOW DISTORTION
LOW QUIESCENT CURRENT
SELF CENTERING BIAS
HIGH INPUT IMPEDANCE
HIGH PEAK OUTPUT CURRENT
HIGH IMMUNITY TO DAMAGE FROM SHORT-CIRCUITED LOADt
PIN-FOR-PIN REPLACEMENT FOR TBA641B

GROUND
COMPENSATION
INPUT

SUPPLY (v+)
N.C.
BOOTSTRAP
N.C.
RIPPLE BY·PASS
N.C.
GAIN CONTROL

ORDER INFORMATIOj\l
TYPE
PART NO.
706AC
706APC
706BC
706BPC

tThe device will withstand repetitive short circuits across the speaker load if the absolute maximum
junction temperature is not exceeded.

EQUIVALENT CIRCUIT
14
r----<~------------_._-------.._-O SUPPLY (v+)

12

10
RIPPLE BY·PASS

0 - - - - - - - - - 1 - -...

GAIN CONTROL

o----'VVv--_-_+-_+------,

.----~~--_+--~~---+-~ BOOTSTRAP

OUTPUT
INPUT

COMPENSATION

0------1---+----+--+---'

GROUND o-----+--+----+--+----~

0= Pin Numbers
*Planar is a patented Fairchild process.

7 -11

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA706
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (No Signal)
Supply Voltage
Input Voltage
Peak Output Current
Operating Temperature Range
Storage Temperature
Maximum Junction Temperature
Power Dissipation (TC';;;; 85°C)
Power Dissipation (T A';;;; 25°C)
Package Type A (706M
Package Type B (706B)
Power Dissipation (T A';;;; 85°C)
Package Type A (706A)
Package Type B (706B)

25V
16 V
-0.5 V to V+
2.5A
0
_30° C to +85 C
-55°C to +125°C
150°C
5W
1.7 W
2.3W
0.9W
1.2 W

PACKAGE THERMAL RESISTANCE
Thermal Resistance, Junction to Ambient
Package Type A (706A)
Package Type B (706B)
Thermal Resistance, Junction to Case
Package Type A (706A)
Package Type B (706B)

706AC AN D 706BC

ELECTRICAL CHARACTERISTICS

(V+ = 14 V, RL = 4 il, T A = 25°C, ct>C-A = 13°C!W, Test Circuit 1, unless otherwise specified)
MIN.

TYP.

MAX.

POUT = 0

10

18

30

mA

POUT = 0

7

15

27

mA

200

950

nA

6.55

7.0

7.45
49

CONDITIONS

PARAMETER
Total Supply Current
Quiescent Current in Output Transistors
Input Bias Current

UNITS

V

DC Output Level

RS = 22 kil

Voltage Gain, AV

RB =Oil

43

46

Output Power, POUT

THD = 10%, f = 1 kHz, AV = 46 dB

4.5

5.5

W

Total Harmonic Distortion

f = 1 kHz, AV = 46 dB

0.3
0.5
3.0

%
%
%

3.5

pV

POUT = 50 mW
POUT =2.0 W
POUT =4.5 W
Equivalent Input Noise Voltage

RS = 22 kil, B.W. = 10 kHz

Total Supply Current

POUT = 4.5 W

I nput Impedance

AV = 46 dB, f = 1 kHz

dB

510

mA

3.0

Mil

TYPICAL PERFORMANCE CURVES FOR 706AC AND 706BC
(T A = 25°C, fJC-A = 13°C/W, Test Circuit 1, AV = 46 dB)
MAXIMUM ALLOWABLE POWER
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE
(FOR PACKAGE TYPE A)

MAXIMUM ALLOWABLE POWER
DISSIPATION AS A FUNCTI·ON
OF AMBIENT TEMPERATURE
(FOR PACKAGE TYPE B)

OUTPUT POWE R AS A
FUNCTION OF SUPPLY VOL TAGE
THD = 10%
f = 1 kHz
t-RL = 4f!

INFINITE HEAT SINK
",,-HEAT SINK OF 3SoCIW

::'b.

~

I"-

FREE AIR

........... i'.,

.....
-f--

f""-..~

-30

-20

10

FR~E AIR

i'..

PACKAGE TYPE A

o

'" " "
. . . r-.. ....

PACKAGE fYPE B

30

50

70

TA - AMBIENT TEMPERATURE - °C

90

o

-30

V
. . .V

.....

-.

~
o

-20

10

30

50

TA - AMBIENT TEMPERATURE _

7-12

/

/V

~EAT SINK OF 13°CIW

.........

..........

/

70

°c

90

6

V

. . . .V
10

12

SUPPLY VOLTAGE - VOLTS

14

16

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA706
TYPICAL PERFORMANCE CURVES FOR 706AC AND 706BC (Cont'd)
TOTAL HARMONIC DISTORTION
AS A FUNCTION OF OUTPUT POWER
12

~
z

o

~
Iii
o

i'i
~

.1

10

I I I

r- v+ = 14 V --If--t-t-+I--t--+++-tr---1
f= 1 kHz
10 r- RL = 4n
~-+-I-t-I-+--+-++ff--t

v+= 14 V
RL = 4 n
AV = 34 d8

I

;;:
Cl

6
4~-+-+++-~-+-+-H--+~-+~--t

V-

I\:

o

;;: -5

>

l\

..J

21-~~~+--r~~-+~-++r--t

I

10k

lk

100

1\

"'-10

~OUr~ ~~O rr:: J.
~UT=2W

POUT = 2W ~

10

"

~

./~OUT = 100 mW

1'\~ II

o

-15

100 k

0.01

0.1

10

100

OUTPUT POWER - WATTS

FREQUENCY - Hz

FREQUENCY - kHz

OUTPUT POWER AS A
FUNCTION OF INPUT VOLTAGE

SUPPL Y CURRENT AS A
FUNCTION OF OUTPUT POWER

MAXIMUM POWER DISSIPATION
BY THE INTEGRATED CIRCUIT AS
A FUNCTION OF SUPPLY VOLTAGE

-

,

v+= 14 V

~

-

600

/

4

,

'"

~

J

V

/

o

100

/

~~

10

15

I

25

20

~

2

1

"",/

30

10

TOTAL SUPPLY CURRENT AND QUIESCENT
CURRENT OF OUTPUT TRANSISTOR
AS A FUNCTION OF SUPPLY VOLTAGE

POWER DISSIPATION
AS A FUNCTION
OF SUPPLY VOLTAGE

100

30

30

1

25

25

'"~

I

RL = 4n

RL = 4n

80

~ ........

--

v.-:;;

L

-

V

V V

./
POUT =13 .0W / '
/'
~V /
~ ::/i:~ = 1.0W

........

I- ............

60

40

E

'"'"
:::J
tJ

~

~

b;:? .....

I 1/

20

..:

LV'"""""

I. . . .

OUTPUT POWER - WATTS

2

10

22

f---

POUT= 0

POUT = 0

~

20

-I-

-

........ V
~ .......

18

1'--_

-r--

6.9

--

r--

-

V+ = 14 V

v+ = 14V

--

/

",...

~

16

......

~V

,//

-10

10

30

50

70

TA - AMBIENT TEMPERATURE - 'c

90

12

/

-30

1/

....

1

/
12
-10

10

30

50

70

T A - AMBIENT TEMPERATURE - 'c

7-13

16

1/

20

1

14

6.8

o

14

DC OUTPUT LEVEL AS A
FUNCTION OF SUPPLY VOLTAGE

1

V

12

22

...

90

3

V
6

V

ffi
~

10

SUPPLY VOLTAGE - VOLTS

TOTAL SUPPLY CURRENT AND
QUIESCENT CURRENT OF OUTPUT
TRANSISTOR AS A FUNCTION
OF AMBIENT TEMPERATURE

I
f-

5

16

SUPPLY VOLTAGE - VOLTS

DC OUTPUT LEVEL
AS A FUNCTION OF
AMBIENT TEMPERATURE
I I

7.1

14

12

is
o

I+V /'
V ~
V'"

V V
10

-30

f-

15

/ ./

10

~

ff-

:::>

lL /V'"

15

I

7.0

~
20

V

/

§

20

f/

/

I

~

~f'

/'"

/

..:

POUT = 2.0W,

7.2 _

16

14

12

SUPPLY VOLTAGE - VOLTS

OUTPUT POWER - WATTS

~+ ~ 14~

V

/'

'"w

~

/

.//

~

1

POWER DISSIPATION AND EFFICIENCY
AS A FUNCTION OF OUTPUT POWER

I

V

i'i

/

INPUT VOLTAGE - mV

f--

~
z

/

200

/

o

/

300

/

:::>

V

L

j

2

V-

400

~n

L =

.,L/

500

j

J

.......... V

v+= 14 V
RL =4n

/

RL =4n
AV = 46 dB
f= 1 kHz

I

~

0

~

!:i

~

~

r- A V =46dB

5

z

w

~4-~~+--+~4--+--I-+~~

~

r- ~+~14V
RL =4n

!g

81-~~~+--r~~-r~-+~--t

~

g

RELATIVE VOLTAGE GAIN AS
A FUNCTION OF FREQUENCY

TOTAL HARMONIC DISTORTION
AS A FUNCTION OF FREQUENCY

V

/

/

10

~

/

:/

12

SUPPLY VOLTAGE - VOLTS

14

16

:;
0

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.LA706
TEST CIRCUIT 1 (AV = 46 dB, RB = 0

INPUT

n, Cc = 1.5 ,uF, CF

0---...------=-1

= 150 pF)

100j.lF

25 V

22 kn

TYPICAL AUDIO APPLICATIONS
5 WATT AUDIO AMPLIFIER WITH MINIMUM COMPONENT COUNT

34dB

AV
BW

10 kHz

RB

100

Cc

10 nF

CF

1 nF

46 dB
10 kHz

20 kHz

on

on

6.8 nF

2.7 nF

1.5 nF

470 pF

330 pF

150 pF

20 kHz

INPUT

10 k!l

n

100

n

-=

5 WATT AUDIO AMPLIFIER WITH LOAD CONNECTED TO GROUND

INPUT

VOLUME
CONTROL
10kH

-=

AV

34 dB

46 dB

Cs

27 nF

5.6 nF

Note:

Cs

selected for 3 dB at 4 kHz.

7-14

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA706
A PC BOARD LAYOUT FOR THE 5 WATT AUDIO AMPLIFIER

uA706

SPEAKER

PHOTOGRAPH OF THE

~A706

IN A TYPICAL APPLICATION

•

7-15

IJA720
AM RADIO SYSTEM
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The }.lA720 is a monolithic AM Radio Receiver System made with the
patented Fairchild Planar* epitaxial process. The device contains two amplifiers, a mixer-oscillator, an
AGC detector and a voltage regulator. It is intended for superheterodyne AM receiver applications.
Since all parts of the circuit are accessible separately, the }.lA720 can be used in a variety of other
applications. The voltage regulator is protected against short term overvoltage transients.
•

AM-RF OSCILLATOR-CONVERTER, IF AMPLIFIER ON ONE CHIP

•

REGULATED SUPPLY

•

OVERVOLTAGE PROTECTION

•

AMPLI FIERS SEPARATELY ACCESSIBLE

•

AGC FOR RF STAGE

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

CONVERTER
INPUT

CONVERTER
OUTPUT

OSCILLATOR

RF OUTPUT

SUPPLY

RF INPUT

CONVERTER
DECOUPLE

ABSOLUTE MAXIMUM RATINGS
16V
40mA
670mW
20mA
10mA
10mA
±10mA
10mA

Operating Voltage
Current into Supply Terminal (Pin 3)
Power Dissipation (Note 1)
Current into RF Output Terminal (Pin 13)
Current into RF Input Terminal (Pin 12)
Current into I F I nput Terminal (Pin 7)
Current into or out of Detector Input Terminal (Pin 5)
Current into AGC Filter Terminal (Pin 10)
Negative Voltage on RF Input, I F I nput, and Detector I nput Terminals
Negative Voltage on Converter Input Terminal
Operating Temperature Range
Storage Temperature Range
Lead Temperatures
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Soldering, 10 seconds)

-5V
OV
-40 0 C to +85 0 C
-55 0 C to +125 0 C

RF DECOUPLE

DETECTOR
INPUT

AGC FILTER

IF OUTPUT

GROUND 1

I F INPUT

GROUND 2

ORDER INFORMATION
TYPE
720C
720C

PART NO.
720DC
720PC

300 0 C
2600 C

EQUIVALENT CIRCUIT
RF OUTPUT

OSCILLATOR

CONVERTER
INPUT

CONVERTER
OUTPUT

CONVERTER
DECOUPLE

4

2

IF
INPUT

DECOUP~:

l'

GROUND 1

GROUND 2

0=

PIN NUMBER

*Planar is a patented Fairchild process

See notes on following page.

7-16

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A720
720C
ELECTRICAL CHARACTERISTICS (T A = 25°C, V+ = 12 V, Test Circuit 1, unless otherwise indicated)
UNITS

CONDITIONS

PARAMETERS

DC CHARACTERISTICS (Oscillator OFF, S1 in Pos 2, S3 in Pos 2, unless otherwise indicated)
Voltage on Supply Terminal (V3)

12 + 13 = 15 mA

6.6

7.0

7.5

V

Voltage on S'upply Terminal (V3)

12 + 13 + 113 + 114 = 22 mA, S3 in Pos 1

6.6

7.0

7.5

V

V3 = 5 V, S1 in Pos 1

4.0

6.0

8.0

mA

V 3 = 5 V, S1 in Pos 1, S3 in Pos 1

6.0

9.0

12

mA

Current into Oscillator and Supply Terminal
(12+ 13)
Current into Oscillator, Supply, RF Out, and
Conv. Out Terminals (/2 + 13 + 113 + 114)

,

Oscillator Current (/2)

12 + 13 = 15 mA

1.2

mA

RF Output Current (113)

12 + 13 = 15 mA

4.0

mA

I F Output Current (/6)

12 + 13 = 15 mA

4.0

mA

Voltage on Converter Input (V1)

12 + 13 = 15 mA

5.8

V
V

Voltage on IF Input (V7)

12 + 13 = 15 mA

0.75

Voltage on RF Input (V12)

12 + 13 = 15 rnA

0.67

V

Internal Power Dissipation

12 + 13 + 113 + 114 = 22 mA, S3 in Pos 1

200

mW

AC CHARACTERISTICS (Signals are measured at the device pins)
RF Transconductance (gmRF = i13/e12)

f12 = 1 MHz, e12 = 100 J,LVRMS, e5 = 0
Osci /lator 0 F F

80

120

500

180

mmhos

RF Input Resistance (RIN12)

f12'= 1 MHz, e12 = 100 J,LVRMS, S2 in Pos 2

1000

1'2

RF Input Capacitance (CIN12)

f12 = 1 MHz, e12 = 100 J,LVRMS, S2 in Pos 2

50

pF

RF Output Resistance (ROUT13)

f13 = 1 MHz

50

k1'2

R F Output Capacitance (COUT13)

f13 = 1 MHz

10

pF

RF Noise Voltage, ~

Referred to Input, RS = 50 1'2, f13 = 1 MHz

3.0

nV/vHz

RF Stage Gain Reduction
Detector Input Voltage (e5)

~gmRF

= 3 dB, f13 = 1 MHz, f5 = 260 kHz

140

180

250

mVRMS

~gmRF

= 40 dB, f13 = 1 MHz, f5 = 260 kHz

220

270

330

mVRMS

50

90

130

mmhos

600

1000

1'2

IF Tranconductance (9ml F = ie/e7)

f7 = 260 kHz, e7 = 1 mVRMS

I F Input Resistance (RIN7)

f7 = 260 kHz

IF Input Capacitance (CIN7)

f7 = 260 kHz

70

pF

I F Output Resistance (ROUT6)

f6 = 260 kHz

10

k1'2

I F Output Capacitance (COUT6)

f6 = 260 kHz

8

pF

Converter Transconductance

f1 = 1 MHz, e1 = 1 mVRMS,

(gmCON = i14/e1)

1.5

2.5

1000

1400

1'2

8

pF
k1'2

3.4

mmhos

f14 = fos c illator - f1

Converter Input Resistance (RIN1)

f1 = 1 MHz

Converter Input Capacitance (CIN1)

f1 = 1 MHz

Converter Output Resistance (ROUT14)

f14 = 260 kHz

50

Converter Output Capacitance (COUT14)

f14 = 260 kHz

10

pF

1.2

VRMS

Oscillator Output Voltage (e2)

o
o
Note 1. Rating applies for ambient temperatures to +70 C. Derate at 8.3 mW/oC between +70 C and +85°C.

7-17

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA720
TYPICAL PERFORMANCE CURVES FOR 720C
TEST CIRCUIT 1, unless otherwise specified.
CURRENTS AS A FUNCTION OF
VOLTAGE (V3)
80

RF TRANSCONDUCTANCE AS A
FUNCTION OF FREQUENCY

/1

70

i

60

II
I

III

TA

i~
~

12 + 13

~

30

>

~

20

I,..J
~

?

~~

g,
10

12

14

16

"7 "mVRMS -

z

"" '\1\

-2
-4

-6

10

r-.
1\

\

50

1\

\,

-S
-10

_

\

-12
5

-4

~

\

1

-2

g

>

-8
-10

0.5

o

-6

\

-14
0.1

i
~

I

~

I
~

g,

-1 2

1\

-14
0.1

100

0.5

10

5

50

100

, - FREQUENCY - MHz

, - FREQUENCY - MHz

VOLTAGE ON PIN 3 - VOLTS

RF AND IF
TRANSCONDUCTANCE AS A
FUNCTION OF TEMPERATURE

RF AGC CHARACTERISTIC

~5~~

TAl.

I
U

z

40

10

III
."

"2 = l00~VRMS

U

50

12 +13 +1'3 + 1'4-

~A =2~od II _

I

= 125 oC

IF TRANSCONDUCTANCE AS A
FUNCTION OF FREQUENCY

CONVERTER
TRANSCONDUCTANCE AS A
FUNCTION OF TEMPERATURE
is 3.0.-----r-,--r----r-,--r--..,.--,

.......

,

'12= 10mV
'12 = 1 MHz
'5 = 260 kHz

-30
-40

o

~

~

-50

1
200

~

401--_+--+--~_+-_+_-+__t---;

:;:

-160

~
'1- 120
I

'"z

0::

~

-80

-40

"-

I
I
I
I

TA - AMBIENT TEMPERATURE -

TA ='250C

I

= 1 MHz
= 260 kHz
'12= 1 MHz

~

"

'7

-4

"

1.0 1---+-+--t---+-+--~-4--I

~7

8 -40
o~~--~-~~--~--~~--~
-20
20
40
60
80
100
120

g,

°c

TA - AMBIENT TEMPERATURE -

20

V

*'I

o~.J."'~ /

16

iii

14

~

i

V

o

d

VI

TA = 1250
I
IS rAM = 90%
f MOO = 400Hz

~
;::

1/

~iY-:tr::-

0~!""I

12

Q

:s

-S

~

6

~

~
o

-10

0.4

0.6

O.S

1.0

1.2

1.4

-12

1.6

SINEWAVE VOLTAGE AT PIN 2 - VRMS

"~-r--

1,/

10

::;;

J
0.2

°c

TOTAL HARMONIC DISTORTION OF
THE MODULATING SIGNAL AS A
FUNCTION OF CARRIER INPUT LEVEL

~~

-6

0.51--_+-+--~_+-_+_-+__t--_I

I

RELATIVE GAIN AS A FUNCTION
OF SUPPLY TERMINAL VOLTAGE

-2

'"

8

~~0--~20--~--2~0--~40---60~-S~0-~10-0~'20

25!C
'T!2 ==1.26MHz

'"

~

201--_+-_+_-~_+-_+_-+__t---;

-200

/

a:

60

350

OSCILLATOR TERMINAL (PIN 2)
VII CHARACTERISTIC

1---+-+--~_+-+--~-4--I

11.51--+-+--t---+-+--~_+--I

F

~
<
I

2.0

o

80

DETECTQR INPUT VOLTAGE - mV RMS

~ :--...

i
z

-+--+--1

-r----

u

100 I---+--+--+--+-gm-li-- + _ _ t - - - ;

r- ~; : J~~HZ

= 1 MHz, f14 = fOSCILLATOR-f,

2.5

~~~C~~t!.~~R OFF

~

g,

300

250

140
120

f1

" = 1 mV RMS

E

a:

,

-60

150

1601---+--+--+-_+-_+_-+__t---;
"2 = l00~VRMS

~z

\

100

I
u

z

\

-70
50

1801-'-+--+--+--+--+--+--+--1

E

",

-10
-20

E

13
~

.........

2

o
1

)

II
VI

2

1

3 4 5

10

20

30 4050

100

CARRIER INPUT LEVEL - mVRMS

SUPPLY VOLTAGE (V3 ) - V

TEST CIRCUIT 1

R,.

 x 120 mm Ferrite Antenna

RF COIL

=00-

[]

4

B+
13

2

1

5

1

1-2
2-3
4-5

44 Turns
81 Turns
8 Turns

1st. IF COIL

14

~

1-3

95 Turns

2nd. IF COIL

1-2
2-3
9-10
9-8

B+

•

OSC COIL

120
80
15
185

Turns
Turns
Turns
Turns

1-2
2-3
9-10
9-8

B+

Core: k = .021

120 Turns
80 Turns
30 Turns
170 Turns

Core: k = 0.021

-=-

7-19

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA720
BLOCK DIAGRAM AND TYPICAL APPLICATIONS
CONV
IN

CONV
DEC

CONV
OSC

OUT

IF
IN

SUPPLY

14

6
IIF

lOUT

i
I
I
L __

I
I
I
I
I
I

B_ _ _ _ _ _ _ _ _ _ _ _ _

10

AGC
FILTER

DETECT
IN

--.J

GND 2

AM CAR RADIO (SLUG TUNED)

'----r--------------

I

270 pF

I

680 n

~ ________

""1

I

I

I

:

I

220kU

IF2

200pF

14

13

1----------,
I

I

~--_+~IHKI~~~~~-

I

300pF

12

I
I

I
I

~-----~------4__+--~~_+~

TO

AUDIO
AMPLIFIER

~

56 pF

11
10

330n

14V

~470"F

2nd. IF TRANSFORMER

1st. I F TRANSFORMER
2nd IF Trans

~PF
100

~_~p_F+-_

fJA720 ...,;.1.;,..4t-..;;....-t(

7

B+

B+

1-2
1-3
4-5
7-8
6-8
00

1-2
1-3
4-5
7-8
6-8

223 Turns
350 Turns
8 Turns
10 Turns
350 Turns
56

00

67
350
8
40
350
58

Turns
Turns
Turns
Turns
Turns

10 x 10 mm Core

10 x 10 mm Core

7-20

TO DIODE

IJA732 • IJA768

FM STEREO MULTIPLEX DECODERS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The JiA732 and JiA768 are monolithic FM Stereo Multiplex Decoder
systems constructed using the Fairchild Planar* epitaxial process. They are electrically identical;
however, the right and left stereo outputs are reversed for the JiA768. These integrated circuits
demodulate a stereo mUltiplex signal into the right and left audio channels while inherently suppressing SCA frequency components. I nternal provision is made for interstation audio muting, stereo/
mono mode switching and driving an external stereo mode indicator lamp. The excellent performance,
wide supply range and low external parts requirement make the JiA 732 and JiA 768 su itable for all
line-operated and automotive FM stereo multiplex applications.
•
•
•
•
•

45 dB CHANNEL SEPARATION
55 dB STORECAST REJECTION WITHOUT SCA FILTERS
HIGH CURRENT STEREO INDICATOR LAMP DRIVER
OPERATION WITH 8 V TO 14 V SUPPLIES
INTERNAL STEREO SWITCHING AND AUDIO MUTING FUNCTIONS

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A
JiA732
19kHz FI LTER

DECOUPLING

19kHz FILTER

38kHz FILTER

MPX INPUT

RIGHT OUTPUT

STE REO MONO de

LEFT OUTPUT

AUDIO MUTE de

ABSOLUTE MAXIMUM RATINGS
Supply Voltage (Note 1)
Voltage at Stereo Lamp Driver Terminal
Current into Stereo Lamp Driver (Note 2)
I nternal Power Dissipation
Operati ng Temperature Range
Storage Temperature Range
Lead Temperature
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Solderi ng, 10 seconds)

38kHz FILTER BIAS
V+

STEREO LAMP

+15 V
+22 V
100 mA
670mW
O°C to +70°C
-55°C to +125°C
732DC,768DC
732PC, 768PC

GND

BIAS

ORDER INFORMATION
TYPE
PART NO.
732C
732DC
732C
732PC

BLOCK DIAGRAM (JiA732 and JiA768)

~A768

rd

~A732

v+

BIAS

8

__

LEFT OUTPUT
RIGHT OUTPUT

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

RIGHT OUTPUT ~A768
LE FT OUTPUT . ~A 732

9 _ _ _ _ _ _12

11

-----i

JiA768

I

AUDIO MUTE de
CONTROL VOLTAGE

10 138kHz FILTER BIAS

Stereo
Demodulator

MPX INPUT

19kHz FILTER

38kHz FILTER

MPX INPUT

LEFT OUTPUT

13

> - - C ) - - - -...

STEREO MONO de
38

~Hz

DECOUPLING

19kHz FI LTER

RIGHT OUTPUT

FILTER
AUDIO MUTE de

3BkHz FILTER BIAS

STEREO LAMP
STEREO LAMP

STEREO - MONAURAL de
CONTROL VOLTAGE

GND

I

V+
BIAS

I
L-_-;y-__
_
7

cr'
2

~

ORDER INFORMATION
TYPE
PART NO.
768C
768DC
768C
768PC

I

*Planar is a patented Fairchild process.

Notes on following page.

7-21

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A732. p.A768
732C AND 768C
ELECTRICAL CHARACTERISTICS (T A = 25°C, V+= +12 V, 200 mVRMS standard stereo multiplex signal applied to input, unless otherwise specified (Note 3), Refer to Test Circuit of Figure 1,)
PARAMETER

MIN.

TYP.

Supply Current

MAX.

11

18

UNITS
mA

Input Resistance

12

20

kn

Stereo Separation
f=100Hz
f = 1 kHz
f = 10 kHz

30
20

40
45
40

dB
dB
dB

Channel Balance (Monaural Input)

0.2

dB

Total Harmonic Distortion

0.5

Voltage Gain

1.0

VI V

67 kHz Storecast Rejection (Note 4)

55

dB

1.0

%

19 kHz Pilot Level Required at Input for:
Stereo I ndicator Lamp on
Stereo I ndicator Lamp off

12
8.0

22

4.0

mVRMS
mVRMS

DC Voltage Required at Pin 4 for
Stereo~Monaural Switching
Stereo on
Stereo off

1.0
0.6

1.25
0.85

1.5
1.0

Vdc
Vdc

DC Voltage Required at Pin 5 for Audio
Mute Switching
Audio on
Audio off,

1.0
0.6

1.20
0.85

1.5
1.0

Vdc'
Vdc

Mute Attenuation of Audio

45

55

dB

30
25

dB
dB

High Frequency Audio Components in Left and
Right Outputs (dB below 1 kHz output)
19 kHz
38 kHz
NOTES:

Power supply tran'sients up to 22 V are permissible for periods of 15 seconds. However, extended operation at voltages greater than 15 V
should be avoided as the maximum allowable internal power dissipation for this device may be exceeded.
Rating applies to steady state current. Maximum permissible surge current during turn-on of the Stereo Indicator Lamp is 500 mAo
"Standard Stereo Multiplex Signal" here refers to a 200 mV RMS (0.56 V pop) composite stereo signal including 10% pilot with L = 1
and R = 1 as described in the FCC Rules on FM Broadcasting.
Measured with a sterl'lo composite signal consisting of 80% stereo, 10% pilot and 10% SCA as defined in the FCC Rules on FM Broadcasting.

(1)

(2)
(3)
(4)

TYPICAL PERFORMANCE CURVES FOR 732C AND 768C
SEPARATION AS A
FUNCTION OF
AUDIO FREQUENCY
80
_

60

40

80

~A ; 2~ lc

4.0

I

,..-

........

...-

40

r-

0.05 0.1 0.2

0.5 1.0 2.0

FREQUENCY - kHz

5.0 10

lo

-

20

o

T~

~ 1.0

o

o

100

200

1 kHz SEPARATION AS A
FUNCTION OF POWER
SUPPLY VOLTAGE

• 25 C
r- V+. +1ZV I
I I I I 1 1
f • 1.0 kHz IMONAURAL OR STEREO WI TH L • R)

V+'+lZV .1..
1
f • 1.0 kHzlNOTE 3)

60

20

0.01

I

r-TA'25°C

~ 'm~l~S ~ERE~ SI ~jA~ INoJE 31
V

1kHz DISTORTION AS
A FUNCTION OF
INPUT VOLTAGE

1 kHz SEPARATION AS A
FUNCTION OF COMPOSITE
INPUT VOLTAGE

300

400

500

STEREO I NPUT VOLTAGE - mV RMS

---

o
o

...-'"
-~

~~
100

200

300

INPUT VOLTAGE - mV RMS

7-22

L

400

V

500
POWER SUPPLY VOLTAGE - VOLTS

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JlA732. JlA768
IlA732 • IlA768 FM STEREO MULTIPLEX DECODER TEST CIRCUIT AND TYPICAL APPLICATION
~A768·
~A732·

lEFT OUTPUT
RIGHT OUTPUT

38 kHz
FilTER

RIGHT OUTPUT· ~A768
lE FT OUTPUT . ~A732

O.02~FJ

V+

+12 V

3.9kH

4.7 kH
lED
FlV1100R
EQUIVALENT

330H

AUDIO MUTE
deCONTROL

Fig. 1
NOTES:
(1) Capacitors C , C and C should be polystyrene or mylar.
1 2
3
(2) Coils L1 and L2 are 7.0 mH nominal with Q = 60 (Miller #1361 or equivalent).
(3) Coil L3 is 8.0 mH nominal with Q = 80, tapped at 10: 1 turns ratio. (Miller #1362 or equivalent).
(4) Resistor R1 can be increased (or decreased) in value to increase (or decrease) the 19 kHz sensitivity.

IlA732 • IlA768 FM STEREO MULTIPLEX DECODER EQUIVALENT CIRCuIT

Bias

V+

Os

0 9

MPX
Input
3

38kHz
Filter Bias
010

0

~A768
~A732

Right Output - ~A768
Left Output - ~A732
011

- Left Output
- Right Output
0 12

19kHz
Filter
01

38kHz
Filter

( )13

R'~~R~

RI2
2kQ

200

I:L

°3S
Q29

-

,..,037
030

RI
20kQ
0 36

,.--

I
RS

SkQ
f--

;--

.~Y-

~

011 012

032
R29
3kQ

R6
SkQ

R4
6kQ

R3 R7
6kQ 10
kQ

R9
IkQ

RS
6.4kQ

RI4
3kQ

~

RIO
IkQ

~

----K0IS

Os

{:"'°21

R32
l.5kQ

70
Ground

60
Stereo Lamp
Driver

7-23

RI6
700Q

-:1~

R22
SkQ

SkQ

027

026

R21

022~

02S>-

RIS
SOOQ

SO
Audio Mute de
Control Voltage

2kQ

023

R20
IkQ

fQ

09

tt

24

Q20

RI9
200Q

R17
2kQ

o

04

RIS

iR11
310Q

034

f

010

017

.....016
R28
4kQ

~

06

::-'0 1

R2

I

RI3

IOkQ

~038

031

033

19kHz
Filter
0 2

R23
SooQ

R25
2kQ

R27
700Q

14 0
40
Deeoupling
Stereo-Monaural
de Control Voltage

028

IJA739
DUAL LOW NOISE AUDIO PREAMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA739 consists of two identical monolithic Operational Amplifiers
using the Fairchild Planar* epitaxial process. These low noise, high gain amplifiers exhibit extremely
stable operating characteristics over a wide range of supply voltages and temperatures. The device is
intended for a variety of applications requiring two high performance operational amplifiers.
•
•
•
•
•
•
•

SINGLE OR DUAL SUPPLY OPERATION
LOW NOISE FIGURE, 2.0 dB
HIGH GAIN, 20,000 V/V
LARGE COMMON MODE RANGE, ±11 V
EXCELLENT GAIN STABILITY VS. SUPPLY VOLTAGE
NO LATCH-UP
OUTPUT SHORT CIRCUIT PROTECTED

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A
OUTPUT A

V+

OUTPUT
LAG A

OUTPUT B

OUTPUT
LAG B

"'"'{

LAG A

}

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 1)
Differential Input Voltage
Input Voltage (Note 2)
Storage Temperature Range
Operating Temperature Range
Lead Temperature
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Soldering, 10 seconds)
Output Short-Circuit Duration, T A = 25° C (Note 3)

±18 V
670 mW
±5 V
±15 V
_55° C to +125° C
O°C to +70°C
300°C
260°C
30 seconds

EQUIVALENT CIRCUIT

INPUT
LAG B

NON-INVERTING
INPUT A
NON-INVERTING
INPUT B

INVERTING
INPUT A

INVERTING
INPUT B

V-

ORDER INFORMATION
TYPE
PART NO.
739C
739C

739DC
739PC

V+

14

R6

20011

RS
9kl1

R9

15 kl!

Rn

10kl1

OUTPUT A

OUTPUT B

3
OUTPUT
LAG A

10

4

~

INVERTING
INPUT B

INPUT
LAG A
NON-INVE RTING
INPUT A

INVERTING
INPUT A

11

'-.--'-'

9 INPUT
LAG B
NON-INVERTING
INPUT B

12
OUTPUT
LAG B

* Planar

Notes on following page

7-24

is a patented Fairchild process.

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JlA739
739C
ELECTRICAL CHARACTERISTICS (VS = ±15V, RL = 50 kn to Pin 7, T A = 25 0 C unless otherwise specified)
PARAMETER

CONDITIONS

MIN.

TYP.

RS ~200n

Input Offset Voltage

I nput Resistance

UNITS

1.0

6.0

50

1000

nA

300

2000

nA

Input Offset Current
Input Bias Current

MAX.

mV

37

150

6500

20,000

Positive Output Voltage Swing

+12

+13

V

Negative Output Voltage Swing

-14

-15

V

±10

±11

70

90

Large Signal Voltage Gain

VOUT =±5.0V

Output Resistance

f = 1.0kHz

kn
V/V

5.0

Input Voltage Range

kn
V

Common Mode Rejection Ratio

RS~10kn

Supply Voltage Rejection Ratio

RS~10kn

Power Consumption

VOUT = 0

270

420

Supply Current

VOUT = 0
RS = 5.0kn, BW = 10Hz to 10kHz

9.0

14

Broadband Noise Figure

2.0

dB

Turn On Delay (See Figure 1)

Open Loop, VIN = ±20mV

0.2

IJ,S

Turn Off Delay (See Figure 1)

Open Loop, VIN = ±20mV

0.3

IJ,S

Slew Rate (unity gain) [See Figure 2]

Cl = O.HLF, Rl = 4.7n

1.0

V/IJ,S

Channel Separation (See Figure 3)

RS ~10kn, f = 10kHz

140

dB

dB

50

IJ,V/V
mW
rnA

The following specifications apply for Vs = ±4.0V, T A = 25 0 C
RS~200n

I nput Offset Voltage

1.0

6.0

mV

50

1000

nA

Input Offset Current
Input Bias Current

nA

300

=0
=0

Supply Current

VOUT

Power Consumption

VOUT

Large Signal Voltage Gain

VOUT = ±1.0V

2.5

rnA

20

mW
V/V

2500

15,000

Positive Output Voltage Swing

+2.5

+2.8

V

Negative Output Voltage Swing

-3.6

-4.0

V

•

NOTES:
1. Rating applies at ambient temperature below 70 o C.
2. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply Voltage.
3. Short circuit may be to ground or either supply.

FREQUENCY RESPONSE
TEST CIRCUIT

PULSE RESPONSE
WAVEFORMS

CHANNEL SEPARATION
TEST CIRCUIT

n
'I, .,

150n

c,

r\1-

lkn

5

r----J-1_ _- 0_ VOA

"V

+20mV

1000pF

41

lkn
A

6

1

lOOk

f-- - - - - - - - - - -

toft

Ov---f--- -t\bUT

r-----'l""'r--~

lkn

l 8~13
Y,I'A739

lkn

+

".>--+-0_

/11

+-'VVV---9-1~~

=:: l000pF

150n.

Fig. 1

Fig. 2

7-25

.-2..

SEPARATION= VOA •
VOB
100

lOOk

Fig. 3

\bB

FAIRCHILD LINEAR INTEGRATED CIRCUITS. IlA739
TYPICAL PERFORMANCE CURVES FOR 739C
WIDE BAND INPUT NOISE
VOLTAGE AS A FUNCTION
OF TEMPERATURE

INPUT NOISE CURRENT
AS A FUNCTION
OF FREQUENCY

INPUT NOISE VOLTAGE
AS A FUNCTION

OF FREQUENCY

21
10- 1""""""1rT"11'T"""-r-T""T"""--"'-"""'..-r--,--,-,...,.,...-,

2.0
BW -'20 to
Vs - ',5V
RS',00n

S~kHz

-

1.6

-

1.2

.8

a:

~

51
z
~

-

....-

r--

H-+I+-+-t+H--t--I-++t--t--H-t+--I

10-25

::;

1O-

18

':-Q.....................-1....
00-'-.J....U---',k-..J.....L.L.'--,O'-k.....L..u.L.......J
, OOk

1

26

'-0.....L..L..U..-1"'":00--'-.........-..J.,k--..L...L.U~,0-:-k.............u...,-:-:'ook

10-

'
FREQUENCY - Hz

TEMPERATURE -'C

FREQUENCY - Hz

COMMON MODE RANGE
AS A FUNCTION OF
SUPPLY VOLTAGE

WIDE BAND INPUT NOISE
CURRENT AS A FUNCTION
OF TEMPERATURE

TYPICAL OUTPUT VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE

IS .-----,--,---,---,---,...----.-....".

101--f--+--t---i-:
ISO

t--t--+--t--+----1I---t--\

100

F-==F=l=9--+-+=*=d
-S

SO
-10

0

0

10

20

30

40

SO

TEMPE RATU RE -

t---+--t--+--'

70

60

'c

OUTPUT CAPABI LITY
AS A FUNCTION OF
SUPPLY VOLTAGE
12

SUPPLY VOLTAGE -.V

SUPPLY VOLTAGE -.V

TOTAL SUPPLY CURRENT
AS A FUNCTION OF
SUPPL Y VOL TAG E

TOTAL POWER DISSIPATION
AS A FUNCTION OF
SUPPLY VOLTAGE AND LOAD

20

f-lkHz
TA ·2S'C
RL to GND

soo

Vo =0
i- TA = 2S'C
RL 10PIN 7

10

400 t----f--+--+-.....,

219"~~~
.LY9'()~.Y

/

12

Vo -0
TA = 25'C
R L toPIN7

~dj-V

16

/ V / ,/~

'/./V/

~
/P~

V. . . . ~ ................. .........
~~

°4~~-~-~10~~12-~1~4-~16~~'8

o

10

ISk

10k

Sk

o

12

40k

J

--...........

L--

16

18

10

.........

18

Vs= I. ,SV

0.4

.............
.............

20k

r---... r--

RL = Skn

~
81,qS

0.3

~,

RL-l0kn

............." ~~IV7"

0.2

i'--

- r--

RL = 10kd

3kn

10k

I

SUPPLY VOLTAGE - ±V

16

0.5

RL 10 GND
30k

I

14

14

~~ ~gk~~rms_

"iiI. =~I

12

12

INPUT OFFSET CURRENT
AND BIAS CURRENT AS
FUNCTIONS OF TEMPERATURE

O. 1

I
I
4

10

SUPPLY VOLTAGE - ±V

~s=±lsl

-

r

RL

14

OPEN LOOP GAIN
AS A FUNCTION OF
TEMPERATURE

o =O.S'Vrms
f= 1.0kHz
TA = 25'C
RL 10 GND

20k

200 t--t---i7~:...n~-bo'-__Ir--+--I

SUPPLY VOLTAGE - ±V

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGE
2Sk

3OO1---+--+--++-oooooA

100 t-744~~-I--+----11---+--I

4

SUPPLY VOLTAGE - ±V

r----r-"""T"--,---r-"""""lr--""7"T--r...,

r-- rSr..£!!.RRENT
16

18

10

20

30

40

TEMPERATURE - 'C

7-26

SO

60

70

10

20

30

40

SO

TEMPERATURE -'C

60

70

FAIRCHILD LINEAR INTEGRATED CIRCUITS. J.lA739
TYPICAL PERFORMANCE CURVES FOR 739C
OUTPUT VOLTAGE
SWING AS A FUNCTION OF
FREQUENCY FOR VARIOUS
COMPENSATION NETWORKS

CLOSED LOOP GAIN
AS A FUNCTION OF
FREQUENCY

loo~,"-r-nmr,-rn,,-.~-r~~

VS=~115V

50

TA =25°C -

20

1,\

10

~,

\.

,

1\

1 AV = 60dB, C 1= 3OOpF, R I .=

AV=4OdB,CI=0.ool~F,Rl =150n!~~Vd::t:trt:l

0.2

AV=20dB,CI

0.1

A~,=,~dBiCI, =,~/~~' R,I i,~·7~

100

FREQUENCY
COMPENSATION
NETWORK

200

V~

i'-~

2.0
Vs

160

....V

120

"-

~I--

80

~

-240

lk

10k

lOOk

1M

40

--

84iV5w'io~;~:E

0.4
,SEE, FI~U~~ ,3

o

10M

--..~

0.8

10

lk

100

10k

lOOk

o

o

FREQUENCY - Hz

FREQUENCY - Hz

10

20. 30

40

50

+30V
0.0022/.1F

470k!l
150k!l

150k!l

OUTPUT A

0-_----41-'-.,....---<

~;;""'---1.....:..j1 ~..--o OUTPUT B

56k!l

lM!l

lM!l
+

750pF

i

5~F/25V

.oo27~F

270k!l

270kn

1.2kn

1.2k!l

INPUT A

INPUT B

TYPICAL PERFORMANCE
Gain 40dS at 1 kHz, RIAA equalized
I npot overload point, 80 m V rms
Noise level, 21lV referred to input
Signal to noise ratio, 74dB below 10mV
Channel separation @ 1 kHz, 80dS

7-27

70

•

TYPICAL APPLICATION

~F

60

TEMPERATURE _ °C

STEREO PHONO PREAMPLIFIER - RIAA EQUALIZED

0.0022

10M

=~15V

"-f'~

1.2

~

-180

100

1M

I----~

\

-300

lOOk

1.6

1\
-120

=33n~hf"lHH+tt~

CHANGE OF AC
CHARACTERISTICS
WITH TEMPERATURE

Vs 1=~115~
TA =25°C -

=!IW
TA = 25°C

-60

10k

RI

FREQUENCY - Hz

CHANNEL SEPARATION
AS A FUNCTION OF
FREQUENCY

OPEN LOOP PHASE SHI FT
WI THOUT COIYIPENSA TI ON

=O.OI~F,

lk

FREQUENCY - Hz

FREQUENCY - Hz

470n; 50 mV
110 = -2 mA, negative half cycles,
V(_) Input - V(+) Input> 50 mV
Beginning of positive half cycles

180

Beginning of negative half cycles

-500

Beginning of positive half cycles

2.0

2.7

4.0

V

Beginning of negative half cycles

-4.0

-3.3

-2.0

V

-7.0

-4.5

V

410

500

J.LA

-280

-180

J.LA

DEFINITIONS
VOLTAGE RANGE: The range of voltage on the (+) or (-) input terminals~ which, if exceeded, could cause the TRIGAC to cease functioning.
BIAS CURRENT: The average of the two currents into the (+) and (-) input terminals.

NOTES:
(1) The maximum voltage should not exceed the instantaneous supply voltage of the J.LA 742.
(2) Rating applies for an external storage capacitor having a value of not more than 2J.LF.

7-29

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JlA742
TYPICAL PERFORMANCE CURVES FOR 742C
(TEST CIRCUIT 1 UNLESS OTHERWISE SPECIFIED)

2.4
'Sl-DC, BEGINNING OF
r--PDSITIV;, HALF CYCLES-

2.0

"\
'l'
1.6
1\
t-..

0.8

!

10

......

/'

:>

/~r:iG~~I~~ ~;~~N~~~~ES -

"""
'"

f-

0

a:
a:

.........
OF POSITIVE HALF CYCLES

TlME-~s

-- -........ r--.....

~

~: !

OFF STATE

STORAGE

!

-32

. /

>
~

M

0
..J

20

30

40

SO

60

........

'-.....
~

w
a:
a:

--- -

~~

I'-.......~

0

J:

J:
ff-

tJ

2

20

is's=Si k -

o

10

.............. ......

2S0

NEGArVE HjLF CYps-

200
10

20

30

50

40

60

70

o

Hj

20

20

30

40

50

'1

""'"'-

I

..J

60

~

50

~

R~

J:

r=

40

~

3D

~

f2

a:
a:

r---

:>

20

'"§

10

tJ

--- ----- ~

RS.S ~ SOk

Z

o

70

o

10

20

30

40

50

TEMPERATURE _ °c

TEST CIRCUIT 1
. - - - " -_ _ _ _ _ _ _ _ _.::.;DC:.o

AC

-151-SUPPLY SELECTOR

T
.----...,....------'-~.;....---+I ~ 'SUPPLY
I

RL

-1

(l00WATT
INCANDESCENT
LAMP)

RSYN

H

INPUT

-110

10kU,2W

j.LA742

(+)

~3
20kU

r---

r--

~

TEMPERATURE - °c

VSUPPLY

30

HOLDING CURRENT AT SWITCH
TERMINAL AS A FUNCTION OF
TEMPERATURE

r--

60

40

TEMPERATURE _ °C

_Rs.i= 10k

r--.

10

...... ~

~

-- ----- ----

30

300

~ROUTPUT

10TURN

-\

47n

¥2S:

ROUT

3.0n
SPRAGUE PART NO. 5C023474X025OB3
OR EQUIVALENT

7-30

~IIE'c

60Hz./.
nOVAC

TRIAC WITH HIGH
GATE SENSITIVITY
(RCA 40526 OR
EQUIVALENT)

...........

'-.....

:>

70

40

............

2

2.0

o

..... ~ITIVE HALF CYCLES



NEGATIVE HALF CYCLES

. P01TIVE ILF CTLES

TEMPERATURE _ °c

60

4S0

I

2.5

70

16

SYNC INPUT THRESHOLD
CURRENT AS A FUNCTION OF
TEMPERATURE

'1

2

tJ

12
SUPPLY CURRENT -mA

fZ

3.0

f-

AT THE THRESHOLD LEVEL,AN INTERMEDIATE
STATE OF A FEW MILLIVOLTS MAY OCCUR, CAUSING
SKIP FIRING: SKIP FIRING IS ELIMINATED WITH
-

10

--

:>

-24 '-----J1L....-"_YS-'Ti_RE_s's_O-''i"_A_TlO_N..l..1_.l.-1---J1'-----'

o

o

2.0

SOO

I>

/
/
ON STATE
1-__1fr-_t--+--+--+--j----l

-

3.S

0

~ ~~~-j---l--1--+--+-__1~_t
~~ /NOTE
>

4.0

I

/'

-2S

1.6

1.2

Tr 2jOC-

CAPACITOR-~F

4.S

~
0
~

-36

.,

o

. SYNC INPUT THRESHOLD
VOLTAGE AS A FUNCTION OF
TEMPERATURE

/V

-40

~

O.B

0.4

.-----,r----.-~-....,..--r-_r_--,

~

0

>
~

PULSE WIDTH MEASURED
AT 37% AMPLITUDE

10

L

II

12

~

~

.......::: ~

INPUT THRESHOLD VOLTAGE
AS A FUNCTION OF
TEMPERATURE

~
~

~

~

V

f-

J

16

J.,

/,V

~

Sl-AC:BEG'NN~"""'"

~

V

./

1/



..... ~ ...... 1'-..

20

"V

f-

o

-44

24

2S~C

12

~

t>-....

o

T! =

14

,,~

......
0.4

16

r- -T!=2SlC-

V

"

I"\.

1.2

SUPPLY VOLTAGE
AS A FUNCTION OF
SUPPLY CURRENT

TRIGGER OUTPUT PULSE WIDTH
AS A FUNCTION OF
STORAGE CAPACITOR

TRIGGER OUTPUT PULSE
WAVE FORMS

3

INPUT

60

70

50

--

r--

60

70

FAIRCHILD LINEAR INTEGRATED CIRCUITS. p.A742
TYPICAL APPLICATIONS FOR 742C
ZERO CROSSING CONTROL CIRCUIT
WITHOUT HYSTERESIS

I

10kn

tOka

ZERO CROSSING CIRCUIT WITH DC SUPPLY

ROR'

lQkn

13

RL
RSYN"

10

--,

ACIN

2
/'A742
3
11

7-

~

f

J.l.A742

lOon

12

1

:f

~~ERESIS O.,.F';4::

rCST'

10kn

RESISTOR

..

I
I
I

8

10kn

tQkn

ACINPUT

I

0. , • F "

SENSOR BRIDGE***
SENSOR BRIDGE***

Fig. 1

Fig. 2

ZERO CROSSING CIRCUIT

SCR FIRING-HALF WAVE

10kn

O.33p.F
25V

10k!!

JlA742
AC INPUT

p.A742

lQkil

lOon

toon

HYSTERESIS
RESISTOR

HYSTERESIS"
RESISTOR

SENSOR BRIDGE***

SENSOR BRIDGE***

Fig. 3

Fig. 4

INVERSE PARALLEL SCR PAIR FIRING
WITH A PULSE TRANSFORMER

INVERSE PARALLEL SCR PAIR FIRING
WITH A THIRDSCR

---l
I

O.33pF
25V

lQkn

I
I

lOon
HYSTERESIS

10kn

RESISTOR

~,="
I

lOon

~O.'.F"

HYSTERESIS

RESISTOR

SENSOR BRIDGE* * *

AC INPUT

I

/JA742

SENSOR BRIDGE* * *

Fig. 6

Fig. 5
* Recommended Values

ZERO CROSSING WITH PROPORTIONAL CONTROL

AC Supply Voltage
60Hz
l00kQ

RDR

R SYN

CST

Volts - RMS

AC INPUT

200kn

24

1.2 kn

2.2 kn

0.47/-LF/25V

110

10kn

10kn

0.47/-LF/25V

220

22kn

22kn

0.47/-LF/25V

FOR SUPPLY VOLTAGE FREQUENCY OF 400Hz REDUCE CST
TO .047 /-LF /25V

lOon
HYSTERESIS
RESISTOR

* * Necessary with inductive loads.
***The sensor resistance will determine the values of the
bridge resistors. For the values of RDR shown, the total
current into the bridge should not exceed 5mA.at 20V.

SENSOR BR IDGE* * *

Fig. 7

7-31

•

IJA746
CHROMA DEMODULATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ~A746 is a monolithic Chroma Demodulator constructed using
the Fairchild Planar* epitaxial process. This device demodulates the chroma subcarrier information
contained in a color television video signal and provides color-difference signals at the outputs. The
low voltage drift of the dc output insures excellent performance in direct-coupled chrominance
output circuitry.

•
•
•
•

CONNECTION DIAGRAMS
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E

LOW OUTPUT VOLTAGE DRIFT WITH TEMPERATURE
DOUBLY BALANCED DEMODULATION
INTERNAL COLOR-DIFFERENCE MATRIX FOR NTSC COLOR TV
10 VOLT PEAK-TO-PEAK EB -Ey OUTPUT

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Minimum Load Resistance
Peak-to-Peak Reference Input Voltage
Peak-to-Peak Chroma Input Voltage
Internal Power Dissipation
Metal Can
DIP
Operating Temperature Range
Storage Temperature Range
Molded DIP
Metal Can and Hermetic DIP
Lead Temperature
Metal Can and Hermetic DIP (soldering, 60 seconds)
Molded DIP (soldering, 10 seconds)

NC

+28V
3kn.
5.0V
5.0V
500mW
670mW
O°C to +70°C

REF "A"

ORDER INFORMATION
TYPE
746C

PART NO.
746HC

_55° C to +125° C
-65°C to +150°C
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

EQUIVALENT CIRCUIT
NC
NC

EB-Ey

GND
E6- Ey

CHROMA 1-1

NC

CHROMA (+)

ER-Ey

ER-Ey
EG-Ey
REF "A"

1-)
CHROMA

NC

NC

REF "8"

REF "6"

EG-Ey

REF "A"

v+

3

ORDER INFORMATION
TYPE
746C
7460

PART NO.
746DC
746PC

Pin numbers shown for Dual In-line Package.

* Planar is a patented Fairchild Process.

7-32

FAIRCHILD LINEAR INTEGRATED CIRCUITS- fJ.A746
746C
ELECTRICAL CHARACTERISTICS (T A = 25°C, V+ = 24V, Test Circuit 1 unless otherwise specified)
PARAMETER

CONDITIONS

Supply Current

eC = 0, RL = 1 Mil
eC = 0, RL = 1 Mil, T A = 70°C
ec =0

Internal Power Dissipation

MIN.

TYP.

MAX.

UNITS

5.5

9.0

12.5

mA

9.0

13.0

mA

22

25.5

16.5

mA

eC = 0, T A = 70°C
eC =0

340

430

mW

ec = 0, T A = 70° C

340

445

mW

14.5

15.8

V

mA

22

DC Voltage at any Output Terminal

eC =0
ec = 0, T A = 70° C

13.0

14.5

16.0

V

Temperature Coefficient of DC Voltage
at any Output Terminal

eC =0

-5.0

-0.3

+5.0

mV/oC

Absolute Value of DC
Difference Voltage between any Two Outputs

ec =0

0.15

0.6

DC Voltage at either Reference Terminal

eA =e s =e c =0

5.8

DC Voltage at either Chroma Terminal

3.2

V

Reference Input Resistance

eC =0
eC =0

1.7

kil

Reference Input Capacitance

eC = 0

13.2

Chroma Input Resistance
Chroma Input Capacitance

V

6.0

pF

0.8

kn
pF

5.0

Peak-to-Peak Chroma Input Voltage

Es - Ey = 5Vp-p

Peak-to-Peak ER - Ey Output Voltage

EB - Ey = 5Vp-p

Peak-to-Peak EG - Ey Output Voltage
Maximum Peak-to-Peak Es -Ey Output Voltage

V

0.4

0.7

V

3.5

3.8

4.2

V

Es - Ey = 5Vp-p

0.75

1.0

1.25

V

8.0

10

Es - Ey Demodulation Angle

eC = 1.5Vp-p
Es - Ey = 5Vp-p

ER - Ey Demodulation Angle

Es - Ey = 5Vp-p

V

3

Degrees

109

Degrees

EG - Ey Demodulation Angle

Es - Ey = 5Vp-p

ER - Ey Demodulation Angle relative to Es - Ey
Demodulation Angle

Es - Ey = 5Vp-p

101

106

111

Degrees

Es - Ey Demodulation Angle relative to EG - Ey
Demodulation Angle

Es - Ey = 5Vp-p

96

104

112

Degrees

Highest AC Unbalance Voltage
at any Output Terminal

ec = 0

0.3

0.8

V _
p p

Degrees

259

DEFINITIONS
Color-Difference Demodulation Angle - A color-difference demodulation angle is defined as the instantaneous phase of the (+) Chroma input
signal which produces the most positive voltage at the respective color-difference output with the phase of Reference "A" taken at 3 degrees
and the phase of Reference "B" taken at 106 degrees.
(+) Chroma Input - A composite chroma signal containing the burst at a phase of 180 degrees is demodulated to produce specified colordifference demodulation angles when applied to the (+) Chroma input.
(-) Chroma Input - A composite chroma signal containing the burst at a phase of 0 degrees is demodulated to produce specified colordifference demodulation angles when applied to the (-) Chroma input.

7-33

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JlA746
TYPICAL PERFORMANCE CURVES FOR 746C
(Test Circuit 1 Unless Otherwise Specified)

SUPPLY CURRENT VERSUS
SUPPLY VOLTAGE

INTERNAL POWER DISSIPATION
VERSUS SUPPLY VOLTAGE

32

18

500
TA=25"C
e c =0

r----

28

---

~"""

;a

Ii'

_i---':""

~~

./

RL =lMn

~

300

-

200

~

15

24

~
~

'\

j

-

o

300

r\

~
Q

15

,,~

r--..

ii:

200

..~

'" -

-

~

g

o
50

100

3

200 300

10

I

20 30

50

LOAD RESISTANCE -

DEMODULATION LINEARITY

14.5

F""1--t--t---1=",*==I=:;:::::I

o

LOAD RESISTANCE-kn

10

TA =25°C
e c =0

!;

o
20 30

DEMODULATION ANGLES
AND RELATIVE GAINS

100

14.4 I----+--+--+---+--+--+-----l

14.3 '----'-_-'-_"'----'_........_
o
10
20
30
40
50

200 300

kn

DEMODULATION SENSITIVITY
TO RELATIVE PHASING OF
REFERENCE SIGNALS

DEMODULATION SENSITIVITY
TO AMPLITUDE OF
REFERENCE SIGNALS

~+
/1--

V

/
IJ

r-

V"

/

EB-E y

/

V

..,......... ~

EG-Ey

V
o l[,..0.8

0.4

1.2

I.

ER-Ey _

tv"
,V

II
V
o

TA • 25°C

ec • 0.4V POp

f-ER-Ey

iL

/L

EG-Ey

o

1.6

0.4

0.8

CHROMA>
REFS>
REFA

>

*

1.2

1.6

2.0

PEAK-TO-PEAK REFERENCE INPUT VOLTAGES - VOLTS

TEST CIRCUIT 1
INPUTS
CHROMA:
ec ~ 1.5Vp-p
fc = 3.59MHz

I-- t--

Y'
o

PEAK-TO-PEAK CHROMA INPUT VOLTAGE - VOLTS

I' .OOlI'F
I' .OOlI'F
I•.OOlI'F

r

OUTPUTS
ES-Ey

lOW.

14

13

f =: ,

10kU

I'A746

11

ER-EY

10kU

9

8
RL
3.3kU

I

RL
3.3kU

.15PF

RL
3.3kU

.OlI'F
II

1

REFERENCE
eA = eB = 1Vp-p
fA = fB = 3.58MHz
0
0B = 0A + 103

.........- - - 1
60
70

AMBIENT TEMPERATURE-oC

..,.

TA • 25°C

28

26

DC VOLTAGE AT ANY OUTPUT
VERSUS AMBIENT TEMPERATURE

100

~
10

24

SUPPLY VOLTAGE-V

..J

-I-.

~

3

22

r--,.....

~

I\[\.
12

./'

V

14.8 r-----r--.--.,.---,---r--r----,

;a
TA =25°C
ec=o

1\

..........

20

28

26

400

16

~

24

INTERNAL POWER DISSIPATION
VERSUS LOAD RESISTANCE

32

20

13

SUPPLY VOLTAGE - V

SUPPLY CURRENT
VERSUS LOAD RESISTANCE

24

V

,/

14

12

22

20

28

L

10

SUPPLY VOLTAGE-V

I

15

~

o

28

26

~I'.\."

./

,-/

ec·Ov

11

o
22

~

..---

~

100

~

20

-~

..J

TA =25°C

16

~:

/v
/"

~

r-- f--

V

...-::;~}'+.g.

5i
Q

-

17

/'"

TA =25°C
ec=O

r----

400

z
o

II:

~

DC VOLTAGE AT ANY OUTPUT
VERSUS SUPPLY VOLTAGE

+24V

Pin numbers shown for Dual In-line Package only.

7-34

T

75pF

=-

75pF

-~

FAIRCHILD LINEAR INTEGRATED CIRCUITS. /lA746
TYPICAL APPLICATION
COMPLETE R-G-B VtDIEO OUTPUT STAGE
+270 V

BLUE

c~~6~1-t

4

REF A-1 7
REF B-1 6

~~

1.8
1.8kJl

kJl

GRA Y SCALE SE TUP ....3V31/\00,......,W....4-....JViI_NvI--I

.47"F

VIDEO INPUTo-I ......~+-<
3 VOLTS
FD 777

I

PEAKj
TO
PEAK

39n

750n

Pin numbers shown for Dual In-line Package only.

Fully de coupled circuit exhibits negligible drift with temperature, eliminates interaction between contrast and brightness controls, and
minimizes gray-scale set-up time.

ALTERNATIVE R-G-S VIDEO OUTPUT STAGE
2.2kO.:!:10%

TO GREEN

2.21<.0.:10%

CATHODE

15k1l

~CRT

Skill

&

TO RED

~CRT

b

CATHODE

2.2k1l± 10%

•

TO BLUE

~CRT

15k1l

&

CA~HODE

550!JH

B+~~~--~I---~r+---rr----'

250V

27k1l
2:5%

18k1l

t5%

56k1l
±s%

lW

lkn

±s%

....----011
CHROMA INPUT
REF A
REF B

Pin numbers shown fo.r Dual In-line Package only.

From:
"A Semiconductor Video Output Amplifier for a
Red Blue Green Large Screen Color Television
Receiver", by D. Poppy.
IEEE Transactions on
Broadcast and Television Receivers, BTR-15, #2,
pp. 167-70, Ju Iy 1969.

Reprinted with permission.

7-35

SET-UP SWITCH

IJA749
DUAL AUDIO PREAMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.LA 749 consists of Two Identical High Gain Operational Amplifiers
constructed on a single silicon chip using the Fairchild Planar* epitaxial process. These three-stage
amplifiers use Class A PNP transistor output stages with uncommitted collectors. This enables a variety
of loads to be employed for general purpose applications from dc to 10 MHz, where two high
performance operational amplifiers are required. I n addition, the outputs may be wired-OR for use as
a dual comparator or they may function as diodes in low threshold rectifying circuits such as absolute
value amplifiers, peak detectors, etc.
•
•
•
•
•
•
•

SINGLE OR DUAL SUPPLY OPERATION
LOW POWER CONSUMPTION
HIGH GAIN, 25,000 V/V
LARGE COMMON MODE RANGE, +11 V, -13 V
EXCELLENT GAIN STABILITY VS. SUPPLY VOLTAGE
NO LATCH-UP
OUTPUT SHORTCIRCUIT PROTECTED

CONNECTION DIAGRAMS
8-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 58

v+

NON-INVERTING
INPUT A

ABSOLUTE MAXIMUM RATINGS
Supply Voltage (749 and 749C)
(7490)
I nternal Power Dissipation (Note 1)
Metal Can
DIP
Differential Input Voltage
Input Voltage (Note 2) (749 and 749C)
(7490)
Storage Temperature Range
Metal Can, Hermetic DIP
Molded DIP (749PC)
Operating Temperature Range
Military (749)
Commercial (749C and 7490)
Lead Temperature
Metal Can, Hermetic 01 P (Soldering, 60 seconds)
Molded 01 P (Soldering, 10 seconds)
Output ~hort-Circuit Duration, TA =25°C (Note 3)

±18 V
±12 V
500mW
650mW
±5 V
±15 V
±12 V

2

6

NON -INVERTING
INPUT B

V-

Note: Pin 4 connected to case.

ORDER INFORMATION
TYPE
PART NO.
7490
749DHC

-65°C to +150°C
-55°C to +125°C
-55°C to +125°C
O°C to + 70°C
300°C
260°C
30 seconds

14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

OUTPUT A
OUTPUT
LAG A

V+
OUTPUT B
2 OUTPUT
LAG B
1

NON·INVERTING
INPUT A
INVERTING
INPUT A
V-

OUTPUT
LAG A

INPUT

Y-

LAG A

NON· INVERTING
INPUT A

II(VERTING
INPUT A

INVERTING
INPUT B

} INPUT
LAG B
NON·INVERTING
INPUT B
INVERTING
INPUT B

ORDER INFORMATION
TYPE
PART NO.
749
749DM
749C
749DC
749C
749PC

'iNPuT

sLAG B

NON·INVERTING
INPUT B

*Planar is a patented Fairchild process.

Notes on following pages.

7-36

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A749
749
EL-ECTRICAL CHARACTERISTICS (VS = ±15 V, RL = 5 kn to Pin 7, T A = 25°C unless otherwise specified)
PARAMETER
Input Offset Voltage
I nput Offset Current
Input Bias Current
Input Resistance
Large Signal Voltage Gain
Positive Output Voltage Swing
Negative Output Voltage" Swing
Output Resistance
Common Mode Rejection Ratio
Positive Supply Voltage Rejection Ratio
Negative Supply Voltage Rejection Ratio
I nput Voltage Range
Internal Power Dissipation
Supply Current
Broadband Noise Figure
Turn On Delay (See Fig. 3)
Turn Off Delay (See Fig. 3)
Slew Rate (unity gain) (See Fig. 2)
Channel Separation (See Fig. 4)

MIN.

CONDITIONS
RS = 200 n

100
20,000
+12
-14

VOUT = ±10 V

f =
RS
RS
RS

1.0 kHz
= 200 n, VI N = +11.5 V to --13.5 V
= 200 n
= 200 n

70

TYP.

MAX.

UNITS

1.0
50
0.30
150
50,000
+13
-15
5.0
90
50
50

3.0
400
0.75

mV
nA
/-LA
kn
V/V
V
V
kn
dB
/-LV/V
/-LV/V
V
mW
mA
dB
/-LS
/-LS
V//-LS
dB

-13
180
9.0
2.5
0.2
0.3
2.0
140

VOUT = 0
VOUT = 0
RS = 10 kn, BW = 10 Hz to 10 kHz
Open Loop, V,N = ±20 mV
Open Loop, VIN = ±20 mV
C1 - 0.02 /-LF, R1 - 33 n, C2 - 10 pF
RS = 1 kn f = 10kHz

200
200
+11
220
10.4

The following specifications apply for Vs = ±4.0 V, RL = 10 kn to Pin 7, T A = 25°C
Input Offset Voltage
Input Offset Current
I nput Bias Current
Supply Current
Internal Power Dissipation
Large Signal Voltage Gain
Positive Output Voltage Swing
Negative Output Voltage Swing

RS = 200 n

VOUT = 0
VOUT=O
VOUT = ±2.0 V

20,000
+2.5
-3.6

1.0
50
0.15
2.5
20
60,000
+2.8
-4.0

3.0
300
0.75
4.8
36

mV
nA
/-LA
mA
mW
V/V
V
V

The following specifications apply for -55°C ~ TA ~ +125°C, Vs = ±15 V, RL = 5 kn to Pin 7:
Large Signal Voltage Gain
Positive Output Voltage Swing
Negative Output Voltage Swing
Input Offset Voltage
Input Offset Current

6,500
20,000
+12
-14

VOUT = ±10 V, T A = +125°C
u
VOUT = ±10 V, T A = -55 C

RS = 200 n
u
T A = +125 C
TA = -55°C
TA = +125 C
TA = -55E>C
RS = 200 n, +25°C ~ T A ~ +125°C
RS = 200 n, -55°C ~TA ~ +25°C
u
u
+25 C ~ T A ~ +125 C
-55°C ~ T A ~ +25°C
-55°C ~ TA ~ +125°C
u
VOUT = 0, TA = +125 C
VOUT = 0, TA = -55°C
VOUT = 0, TA = +125°C
VOUT = 0, TA = -55°C
u

Input Bias Current
Input Offset Voltage Drift
I nput Offset Current Drift
I nput Bias Current Drift
Supply Current
Internal Power Dissipation

The following specifications apply for -55°C ~ TA ~ +125°C, Vs = ±4 V, RL
Input Offset Voltage
Input Offset Current
Large Signal Voltage Gain

RS

=

=

20,000
30,000
+13
-15
1.0
0.05
0.05
0.15
0.3
3.0
3.0
0.5
2.0
5.0

9.7
13
200
300

10 kS1 to Pin 7:

200 n

1.5
50

VOUT = ±2.0 V, TA = +125°C
VOUT = ±2.0 V, TA = -55°C

Positive Output Voltage Swing
Negative Output Voltage Swing

6.0
1.0
1.5
0.75
3.0

5,000
20,000
+2.5
-3.6

6.0
750

+2.8
-4.0

NOTES:
1. Rating applies to ambient temperatures up to 70°C. Above 70°C ambient derate linearly at 8.3 mW/oC for the DIP package.
2. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage.
3. Short circuit may be to ground or either supply.

7-37

V/V
V/V
V
V
mV
/-LA
/-LA
/-LA
/-LA
/-LV/oC
/-LVrC
nArC
nArC
nArC
mA
mA
mW
mW

mV
nA
V/V
V/V
V
V

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A749
749C
ELECTRICAL CHARACTERISTICS (VS = ±15 V, RL = 5 kh to Pin 7, TA = 25°C unless otherwise specifified)
PARAMETER
Input Offset Voltage

CONDITIONS

MIN.

RS = 200 n

I nput Offset Current
Input Bias Current
Input Resistance
Large Signal Voltage Gain

VOUT = ±10 V

TYP.

MAX.

UNITS
mV

1.0

6.0

50

750

nA

0.30

1.5

MA

50

150

15,000

50,000

kn
V/V

Positive Output Voltage Swing

+12

+13

V

Negative Output Voltage Swing

-14

-15

V

Output Resistance

f = 1.0 kHz

Common Mode Rejection Ratio

RS = 200 n, VIN = +11.5 V to -13.5 V

70

5.0

kn

90

dB

Positive Supply Voltage Rejection Ratio

RS = 200 n

50

350

MVIV

Negative Supply Voltage Rejection Ratio

RS = 200 n

50

200

MV/V

Input Voltage Range

-13

+11

V

Internal Power Dissipation

VOUT = 0

180

330

mW

Supply Current

9.0

14

Broadband Noise Figure

VOUT =0
RS = 10 kn, BW = 10 Hz to 10 kHz

2.5

dB

Turn On Delay (See Fig. 3)

Open Loop, VIN = ±20 mV

0.2

MS

Turn Off Delay (See Fig. 3)

Open Loop, VIN = ±20 mV

0.3

MS

Slew Rate (unity gain) (See Fig. 2)

Cl =0.02MF,Rl =33!1,C2=10pF

2.0

V/MS

Channel Separation (See Fig. 4)

RS = 1 kn, f = 10 kHz

140

dB

mA

The following specifications apply for Vs = ±4.0 V, RL = 10 kn to Pin 7, TA = 25°C:
Input Offset Voltage

RS = 200

n

I nput Offset Current
Input Bias Current

1.0

6.0

mV

50

600

nA

0.3

1.5

MA

Supply Current

VOUT = 0

2.5

Internal Power Dissipation

VOUT = 0

20

mW

Large Signal Voltage Gain

VOUT = ±2.0 V

60,000

V/V

15,000

mA

Positive Output Voltage Swing

+2.5

+2.8

V

Negative Output Voltage Swing

-3.6

-4.0

V

8,000

40,000

V/V

15,000

50,000

V/V

The following specifications apply for O°C ~ TA ~ +70°C, VS:= ±15 V, RL = 5 kn to Pin 7:
Large Signal Voltage Gain

VOUT = ±10 V, T A == +70°C
VOUT = ± 10 V, T A = 0° C

Positive Output Voltage Swing

+12

+13

V

Negative Output Voltage Swing

-14

-15

V

Input Offset Voltage

RS = 200 n

Input Offset Current
Input Bias Current
I nput Offset Voltage Drift
I nput Offset Current Drift
I nput Bias Current Drift

9.0

mV

1.5

MA

0.3

3.0

MA

RS = 200 n, +25°C ~ T A ~ +70°C

3.0

MV;oC

RS = 200 n, O°C ~ T A ~ +25°C

3.0

MVrC

+25°C ~ TA ~ +70°C

0.5

nArC

0° C ~ T A ~ +25° C

2.0

nArC

0° C ~ T A ~ + 70° C

4.0

nArC

The following specifications apply for O°C ~ TA ~ +70°C, Vs
Input Offset Voltage

1.0
0.05

RS = 200

=±4 V, RL = 10 kn to Pin 7:

n

Input Offset Current
Large Signal Voltage Gain

VOUT = ±2.0 V, TA = 70°C

8,000

Large Signal Voltage Gain

VOUT = ±2.0 V, TA = OG C

15,000

1.5

9.0

mV

0.05

1.0

MA
V/V
V/V

Positive Output Voltage Swing

+2.5

+2.8

V

Negative OU,tput Voltage Swing

-3.6

-4.0

V

7-38

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA749
7490

ELECTRICAL CHARACTERISTICS (VS = ±6 V, RL = 10 kn to pin 4. T A = 25°C unless otherwise specifified)
PARAMETER

CONDITIONS

Input Offset Voltage

TYP.

MIN.

RS';;;; 200 n

I nput Resistance
Large Signal Voltage Gain

VOUT = ±4.0 V

rnV

1.0

10

50

600

nA

300

1500

nA

Input. Offset Current
Input Bias Current

UNIT S

MAX.

50

150

10,000

20,000

kn
V/V

Positive Output Voltage Swing

+4.5

+5.0

V

Negative Output Voltage Swing

-5.5

-6.0

V

Output Resistance

f = 1.0 kHz

kn

10

Input Voltage Range

-4.0

V

+2.5

Common Mode Rejection Ratio

RS';;;; 10 kn

Supply Voltage Rejection Ratio

RS';;;;10kn

Power Consumption (including load)

VOUT = 0

24

36

54

Supply Current (including load)

VOUT = 0

2.0

3.0

4.5

Turn On Delay (See Figure 5)

Open Loop, VIN = ±20 mV, RL = 5 kn

70

dB

90
50

100

J.LV/V
mW
rnA

0.2

J.LS

Turn Off Delay (See Figure 5)

Open Loop, VIN = ±20 mV, RL = 5 kn

0.3

J.LS

Channel Separation (See Figure 7)

RS';;;;10kn,f=10kHz

140

dB

TYPICAL PERFORMANCE CURVES fOR 749 AND 749C

90

r-

"

60

1\

OPEN LOOP
30

r-50

.....

:---

"K

~~~UL~~~ /

I- 100 kn SOURCE

100

,

ro"

/i'"

)

100
~

Hz

~r'\

//

1
0.5
Vs = '15 V
TA = 25 C
RL = 5 kl!
TO PIN 7
1M

100 k

~240

~

Hz

1M

I\.

lk

10k

lOOk
~

1M

10M

Hz

CHANGE OF AC
CHARACTERISTICS
WITH TEMPERATURE

1\

~5kl~

TO PIN 7

I-I-+-I+-H'-Hf-I---I-++I---lI--t-t-t-t--I

-

-

Vs = .,5 V
RL=5kn TO PIN 7

,~ !\
1.6

~

I"~

~
"'IIti: NLEWIRATE

0.8

1'..J

o~60

10M
FREQUENCY

~

7-39

Hz

I~

LNJW:T~~ ~

0.4

~300

lOOk

\

2.0

1\
10 k

100

t;V'

I I III II

1111

1.2

1\

FREQUENCY

10M

Vs= '15V

\

1k

AV = 60 dB, Cl = 300 pF, R 1 = 470 12
AV = 40 dB, Cl = 0.001 "F, Rl = 150 l!
Av = 20dB, Cl = 0.Q1 "F, Rl = 33l!/
AV=OdB,Cl =0.1 "F, Rl=4.7l!/

FREQUENCY

I-I-+-I+-H'-Hf-I---I-++I-t ~~ :
160

~180

100

l)I

CHANNEL SEPARATION
AS A FUNCTION OF
FREQUENCY

Vs= '15 V
TA = 25 C
RL = 5kl!
TOPIN 7

~60

~120

"

FREQUENCY Hz

OPEN LOOP PHASE SHIFT
WITHOUT COMPENSATION

1\.1\
1\

\

O. 1
10k

1\

"\

10

i"

III
1k

1\

::.;0,~

>< .....

III

II

~30

r\

~~

inWfiTlf i
II

20

"\

-'"

VS=±15V
TA=25°C
RL = 5 kn
TOPIN 7

50

~~

~/

~

t-Cl = 300 pF, Rl = 470 12
Cl = 1000 pF, Rl = 15012
r-Cl =0.01 "F, Rl =3312
4 n

FREQUENCY

OUTPUT CAPABILITY AS A
FUNCTION OF FREQUENCY
AND COMPENSATION

OPEN LOOP FREQUENCY
RESPONSE USING RECOMMENDED
COMPENSATION NETWORKS

CLOSED LOOP GAIN
AS A FUNCTION OF
FREQUENCY

I (-

~20

20

60

TEMPERATURE

~

100
'C

140

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A749
TYPICAL PERFORMANCE CURVES FOR 749 AND 749C
INPUT NOISE VOLTAGE
AS A FUNCTION
OF FREQUENCY
100

INPUT NOISE CURRENT
AS A FUNCTION
OF FREQUENCY

800

vsl=~lL

50

ABSOLUTE MAXIMUM POWER
DISSIPATION AS A FUNCTION
OF TEMPERATURE

VS= '15 V

RS=loon
TA = 25°C

1=j=!::t+=+=t=I=~:j:::++tl=::t~!: i~2~

50

600

~

10

,

1-1-

5.0

400

1\,

749C
1.0
200

0.5

74~

o. 1

0.1

10

100

10k

lk

100 k

L..-L...J....l-'--..L.-.I-I-L..l..-~.........J...J-....I..-....L..J.-'-'--I

10

100

1k

0

lOOk

o

-20

-60

60

20

100

COMMON MODE RANGE
AS A FUNCTION OF
SUPPLY VOLTAGE

TYPICAL OUTPUT VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE

>

,

2

/.V

TA = 25 C
RL TOPIN7

/. V

24

7'

~. .0-./., V
<"
«-v <,..,. .0-

106

V

~

V'<-V

#r/
811"

1

o

175

140

AMBIENT TEMPERATURE - °c

TA ~ 25 C
RL=5kH TO PIN 7

V

1

FREQUENCY - Hz

FREQUENCY - Hz

OPEN LOOP 180 PHASE SHIFT
FREQUENCY AS A FUNCTION OF
SUPPLY VOLTAGE

10k

to

2

flO

'6

'4

SUPPLY VOLTAGE - V

SUPPLY VOLTAGE - ±V

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
LOAD RESISTANCE

TOTAL SUPPLY CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

r-----,----r--..,...-~____,r--___,_-__,

VOUT = 0.5 V rms
f= I kHz

150

TA = 25°C
RL TOPIN7

12

10

14

16

18

SUPPLY VOLTAGE - 'V

TOTAL POWER DISSIPATION
AS A FUNCTION OF
SUPPLY VOLTAGE AND LOAD
500

.----r---r---,--~____,r--""'7T"-__,

VOUT = 0
TA = 25°C
RLTOPIN7
161--+--+--t---+--,--J

TA = 25°C
VOUT = 0
RL TO PIN 7
400 I-----l---+--+----+ ,----,~-+-__I

121--+--+--t--~+--r--+-~

3001---1---I--...J,

1 2 5 1 - - - + - - + - - + - - .L"""£'-!----".'I=---I
100 1-----+--+---"7

200

O~~-~--L-~_~~_~

2.5

10

15

oL..-~_-L_-'-_-'--_~~_~

4

20

10

LOAD RESISTANCE - kn

12

14

16

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGE

0.5

b.5

'"

100
80

I ......

10

12

14

16

18

-60

'r--..-s>1

(~

,

"
1"-

0

20

60

TEMPERATURE _ °C

7-40

100

140

"-

P'--.. ~4S

74~

\

o

7t---

"r-...

1

-60

-

1\

r\ \
?~

0.2

O. 1 ,

1

-20

18

TO PIN 7

' - - t--

~f.Q

RL = 2.5~;--

20

~~N==50kn

0.3

F/L~Sk7;'

(

o

1

~'Olk.Q_ I--- ~

60

16

VS= -15 V

\

1

120

40

r\,

0.4

160
140

14

INPUT OFFSET CURRENT
AND BIAS CURRENT AS
FUNCTIONS OF TEMPERATURE

VOIUT =
v~ms
VS= ±15V
RL TO PIN 7

180

12

SUPPLY VOLTAGE - ±V

OPEN LOOP GAIN
AS A FUNCTION OF
TEMPERATURE
200

SUPPLY VOLTAGE - 'V

10

18

SUPPLY VOLTAGE- 'V

749C

1\

"'F=l,
-20

'\

~~
20

~

OFF1SET

60

TEMPERATURE - 'C

dURR~NT

\
100

140

FAIRCHILD LINEAR INTEGRATED CIRCUITS • IlA749
TYPICAL PERFORMANCE CURVES FOR 7490

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
SUPPLY VOLTAGE
60
50

OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF
LOAD RESISTANCE

Vo = 0.5 V RMS

55

f= 1 kHz

50

V O =0.5VRMS
f= 1 kHz

45

TA = 25°C
RL TOPIN4

T A =25°C
RL TOPIN4

~

2

40

~

35

~

~
0

25

g

20

~
2

/
/

15

/

/'"

1/
//-

00

12

28

~

24

I
I

...-

~

16

~

12

~

o

I-

~1.0"'<)..L..

0

20

SUPPLY VOLTAGE - ±V

LOAO RESISTANCE - kfl

OPEN LOOP GAIN
AS A FUNCTION OF
TEMPERATURE

TOTAL SUPPLY CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE

~'l.._

........:

,.,.~.p

300

20

±6VI

~

20

+--+~~-1__~__~~

40

60

4

70

10

90

III III

10M

-10

100M

10

,

.~-

."

-'»

I\~

0.2

100

lk

lk

10k

\1\

N
lOOk

1M

10k

'N

10M

COMMON MODE RANGE
AS A FUNCTION OF
SUPPLY VOLTAGE

~

(>-1-\"0
\".-<'

\
\

Vs - '6 V
T A =25°C
RL =lOkfl

I

\ "

"

\ \

'\

!VS =±6V
:TA = 25°C
RL = 10kfl
THO 0.5%
I

... ~

0.5

oQ

FREQUENCY - Hz

5.0

~

/~...?..r

000'

40

1\
1M

0

I

u'&

~

50

\
lOOk

,
~~
1~~fJr' \
C'

60

\

10

0.1

10

?~

1\\

Cl =0.025pF, Rl =3fl

2.0

4

~~

70

\

IIII I IIII I

10k

_20\<.9-- ilLI

~.o(\

't
~~

ff--

... ,\

-~

~f\\

~~

lOOk

~

1M

FREQUENCY - Hz

SUPPLY VOLTAGE - ±V

7-41

12

SUPPLY VOLTAGE - ±V

80

~

......

Cl =0.0025pF, Rl =33fl

-10 lk

o

12

0

ILl I I I

20

-

I - -~

.\o\<.9-V

OPEN LOOP FREQUENCY
RESPONSE USING RECOMMENDED
COMPENSATION NETWORKS

Vs ±6 V
T A =25°C
RL =10kfl

O
L, IF'I~ll =1 20rfll '~

30

;::;-

SUPPLY VOLTAGE - ±V·

CI 3r

40

~

~\..

p-

III III I

50

/ ' ...-

V

~

CLOSED LOOP GAIN
AS A FUNCTION OF
FREQUENCY
70

100

~

/

/.i,-..9-L

~
...- ~~
;........:::
./

a:

TEMPERATURE _ °C

60

/

~~~

>=

gj

-

50

",,~'*"~

;,:

:I!

0

30

200

I

o

1
10

/
/

2

~
~

V~r---

RL =5.1 kfl

- - R L -2.4kfl·VS

12

RL TOPIN4
TA = 25"C

o

i
RL = 10 kfl _ Vs = ±6 V._--+_-I

10

Vo=O V

I

__

I--

TOTAL POWER DISSIPATION
AS A FUNCTION OF
SUPPLY VOLTAGE AND LOAD

12~-r--+_-+--+_-+--~~~~

i 10~-+

V~\..

~

SUPPLY VOLTAGE - ±V

16o--"""T""-.,...---,--.,...----r--,----,-.....
VO=O
TA = 25°C
R L TOPIN4

l-

V

~

4

14

1

~

"~

f--

16

12

20

~

~

1- ---

1±4

~

g

.......~:::;'O\J
V
I
I

-

RL TOPIN4

~
<.!J

1

/

10

10

h'''''
4~~- I - -

/

TA = 25°C

>

I~ f--

/

0

32

V

I

30

>

TYPICAL OUTPUT VOLTAGE
AS A FUNCTION OF
SUPPLY VOLTAGE

100 M

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • fJA749
OFFSET NULL
NETWORK
749 AND 749C

*

FREQUENCY RESPONSE
TEST CIRCUIT
749 AND 749C

*

PULSE RESPONSE
WAVEFORMS
749 AND 749C

V+

r-r- --l rov -----f-~

+20mv~

-20:~ ---=-~-----11-ton--l

VIN(t)

toff
VOUT

I

V-

Fig. 1

Fig. 2

Fig. 3

CHANNEL SEPARATION" *
TEST CIRCUIT
749 AND 749C

PU LSE RESPONSE
WAVEFORMS
7490

r--

+20mV~

-20:~

ton--l

I~---------------VoA-l

-=

---=-1-----11- r- --l r-

SEPARATION = VOB : 100

ov

VIN(t)

tofl

-----f-

-~

VOUT

I

~-_O()VOB

5kf!
V-

Fig_ 4

Fig. 5

FREQUENCY RESPONSE
TEST CIRCUIT
7490

CHANNEL SEPARATION
TEST CIRCUIT
7490

10kf!
V-

I--------~:--------:---

-=

SEPARATION =

~ = _1_
VO B

1000

1 kf!

1 kf!

>-...........- -.......-0 VO B
10ka

V-

Fig. 6

Fig. 7

*Pin numbers refer to Dual-in-line Package

7-42

FAIRCHILD LINEAR INTEGRATED CIRCUITS • I1A749

TYPICAL APPLICATIONS

VOLTAGE TO FREQUENCY CONVERTER

+15 V

RAMP
G~NERATOR

100.Q

VIN
o TO +15 V o-AN.........~

VOLTS

OUTPUT
(PIN I)

R9

Rl
51 k

01
2N5845

o~~--------~~--------~=---------~

-4

VOUT
(COMPARATOR
INPUT)
(PIN 9)

o~---------,~---------,

__--------~__

VOLTS

-4~-----------1...-----'"

L-------.-------+--ovOUT

WAVESHAPES

R6
. 1.3 k.Q

R2
5.1 k.Q

-15V
RAMP GENERATOR

COMPARATOR

OUTPUT/RESET

R * = R pin' + Rg + RCE 0, + R6 output stage.

I

STEREO TAPE PREAMPLIFIER

80

~

r-------JVo{l,---------___
"'9..V~.....---_'II,.".,.---VCC = 12 V
1.5 M

70

1.2 k.Q
loo1lF/15V

~I-

........

J_

TAPE HEAD

,

..........

"'- ...........

51lF/9 V

~----~I--

750k.Q

40

10k.Q

30

15 k.Q

20

100

1000

10,000 20,000

FREQUENCY - kHz
1.2M.Q
TO
SIDE 8

TYPICAL PERFORMANCE
OPTIONAL FEEDBACK
TONE COMPENSATION

Gain at 1 kHz
Output Voltage Swing
Power Consumption

7-43

60 dB
2.8 V rms
30 mW

~A753
FM GAIN BLOCK
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The ,.."A753 is a high performance monolithic FM Gain Block using
the Fairchild Planar* epitaxial process. The FM gain block consists of a three stage direct coupled
amplifier with 330n input and output terminations and the 7 pF shunting capacitance required
for a 10.7 MHz FM IF strip utilizing commercially available ceramic filters. Included on the chip is a
7.8 V active regulator providing up to 10 mA of current to an external load such as an FM tuner.

CONNECTION DIAGRAM
8-LEAD MINI DIP
(TOP VIEW)
PACKAGE OUTLI N E 9T

The ,.."A753 features full temperature compensation for the I F amplifier and the 7.8 V regulator.
Excellent power supply rejection eliminates the need for an external regulated supply. An output
from the second stage of the I F amplifier provides a means of external gain control without affecting
the input or output terminations. The device is packaged in an 8-lead mini DIP.
•
•
•
•
•

50 dB VOLTAGE GAIN AT 10.7 MHz
330n INPUT AND OUTPUT TERMINATIONS
OPTIMIZED GAIN VS TEMPERATURE CHARACTERISTICS
TEMPERATURE COMPENSATED 7.8 V ACTIVE REGULATOR PROVIDING UP TO 10 mA
OF CURRENT
SHORT CI RCUIT PROTECTION FOR ALL EXTERNAL CONNECTIONS

ABSOLUTE MAXIMUM RATINGS (Note 1)
Voltage at any terminal must not exceed V+
Supply Voltage (V+)
Power Dissipation (PD) (Note 1 )
Input Voltage (Pins 1 and 3)
Regulator Output Current (IREG)
Regulator Short Circuit Duration
Operating Temperature Range (T A)
Storage Temperature Range (TSTG)
Lead Temperature
(Soldering, 10 seconds)

18 V
310mW
±3 V
10mA
Indefinite
_40° C to +85° C
-55°C to +125°C

IF INPUT
IF INPUT
DECOUPLE

08

v+

2

7

LOW LEVEL
I F OUTPUT

IF SUPPLY
DECOUPLE

3

6

REGULATOR
OUTPUT

GND

4

5

IF OUTPUT

ORDER INFORMATION
TYPE
PART NO.
753C
753TC

Notes: 1. Rating applies for ambient temperatures to 70°C. Above 70°C derate linearly at 6.3 mW/oC

EQUIVALENT CIRCUIT
LOW LEVEL

v'

IF OUTPUT

REGULATOR OUTPUT

R7

1.2kSl

IF INPUT

IF INPUT DECOUPLE

*Planar is a patented Fairchild process.

7-44

FAIRCHILD LINEAR INTEGRATED CIRCUITS • fJA753
753C
ELECTRICAL CHARACTERISTICS: (T A

=

PARAMETER

25°C, V + = +12 V unless otherwise specified)

CONDITION

TEST
CIRCUIT
FIG. NO.

MIN.

TYP.

MAX.

UNITS

DC CHARACTERISTICS
Supply Current
Power Dissipation
Terminal Voltages

16

V

3

10

RL =

00

3

11

16

19

mA

RL =

00

3

190

230

mW

I L = 5 mA

3

210

255

mW

IL = 5 mA

3

Supply Voltage Operating Range

Pin 1,2

1.4

3

2.6

V

5

2.0

V

6

7.2

7.8

7

V

8.3

2.0

V
V

AC CHARACTERISTICS IF AMPLI FIER (fo = 10.7 MHz)
-3 dB Limiting Threshold
VIN = 100 mV, RL =

Voltage Gain
Voltage Gain Change
I nput Impedance:

00

p,V
V p _p

900

1

Output Voltage Swing

1

1 .1
40

1.4
50

56

dB

VOUT = 100 mV

1

-40°C';;;; T A';;;; +25°C

1

6.0

dB

+25°C .;;;; T A';;;; 85°C

1

1.0

dB

Pin 1 to Pin 2

Parallel Input Resistance
Parallel I nput Capacitance
Output Impedance:

230

330

440

5.0

9.0

14

230

330

440

5.0

9.0

14

n
pF

Pin 5 to ground

Parallel Output Resistance
Parallel Output Capacitance
Output Noise Voltage

5.0

2

n
pF
mVRMS

AC CHARACTERISTICS REGULATOR SECTION
Line Regulation (V6)

I L = 5 mA, V+ = 10 V to 16 V

3

3.0

Load Regulation (V 6)

I L = 0 to 5 mA

3

-10

Temperature Coefficient (V 6)

IL = 5 mA,
-40°C';;;; T A';;;; +85°C

3

-0.15

30

mV
mV
mVtC

I

TEST CIRCUIT FOR DYNAMIC CHARACTERISTICS

4.3 k

51

n

36011

.......- _ - - - - - - - - '

'------~--~-...t__----<~~---<~-

Av IdB)" STEP ATTENUATOR
SETTING +2BdB

Fig. 1
NOISE MEASUREMENT TEST CIRCUIT

TEST CI RCUIT FOR STATIC CHARACTERISTICS
v+

v+

>--11-.---0 ~~VM
330n

Fig. 2

Fig. 3
7-45

FAIRCHILD LINEAR INTEGRATED CIRCUITS • pA753
TYPICAL PERFORMANCE CURVES

SUPPL Y CURRENT AS A
FUNCTION OF SUPPLY VOL TAGE

REGULATOR OUTPUT VOLTAGE
AS A FUNCTION OF
AMBIENT TEMPERATURE

VOLTAGE GAIN AS A
FUNCTION OF TEMPERATURE

18

7.9

80

=i 25,C
IplN 6 = 0

I

= 12V
IplN 6 = 5 rnA

60

17

16

I
I-v+

I-TA

f--- I - -

-

f..--- ~

.....,. V

50

7. 8

~

t--i'-

40

15
20

I--I-14
10

11

12

14

15

16

-40

40

7

80

TA - AM81ENT TEMPERATURE -

SUPPL Y VOLTAGE - VOLTS

'c

-40

TA -

BLOCK DIAGRAM

REGULATOR

I F INPUT o.:..~---4P----f
~-4

___"";'.::.o IF OUTPUT

LOW LEVEL
IF OUTPUT

TYPICAL APPLICATION

V+
SUPPL y VOLTAGE
FOR FM TUNER

IF~
TUNER

Fl AND F2; VERNITRON FM4
DR EQUIVALENT
10.7 MHz CERAMIC
FILTER

7-46

40
AMBIENT TEMPERATURE -

80

'c

IJA757
GAIN CONTROLLED IF AMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The J.1,A757 is a monolithic high performance, Gain Controlled IF
Amplifier constructed using the Fairchild Planar* epitaxial process. The amplifier contains two sections
which may be operated independently, or in cascade, from audio frequencies to 25 MHz. The J.1,A757
is intended primarily as a gain controlled, intermediate frequency amplifier in AM and FM communications receivers. It also has excellent performance when operated in FM receivers as a limiting
amplifier.
•
•
•
•
•

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

70 dB GAIN AT 10.7 MHz
70 dB AGC RANGE AT 10.7 MHz
300 mV SIGNAL HANDLING CAPABILITY AT INPUT
CONSTANT INPUT AND OUTPUT IMPEDANCE WITH AGC
STABLE GAIN WITH SUPPLY VOLTAGE AND TEMPERATURE AT ALL LEVELS OF GAIN
REDUCTION.

INPUT 1 (+)

(-) INPUT 1

DECOUPLE

DECOUPLE

AGC 1

OUTPUT 1

AGC2

v+

GND

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Voltage at any Output Terminal
Voltage at either AGC Terminal (Note 1)
Differential Voltage at either Input
(Pins 1 and 14, Pins 2 and 10)
Internal Power Dissipation (Note 2)
Storage Temperature Range
Hermetic DIP (757, 757C)
Molded DIP (757C)
Operating Temperature Range
Military (757)
Commercial (757C)
Lead Temperature
Hermetic DIP (Soldering, 60 seconds) 757
Molded DIP (Soldering, 10 seconds) 757C

DECOUPLE

+15V
+24V
±12V
±5V

OUTPUT 2 (-I

INPUT 2
SHIELD
(+) OUTPUT 2

670mW
ORDER INFORMATION
-65 0 C to + 1500 C
-55 0 C to +125 0 C

TYPE
757
757C
757C

-55 0 C to +125 0 C
OOC to +70 0 C

EQUIVALENT CIRCUIT
OUTPUT 1
12

PART NO.
757DM
757DC
757PC

OUTPUT 2

v+

INPUT 2
1110

SHIELD 9

8

1
5kH

4kH

150H

5

AGC2

GROUND

*Planar is a patented Fairchild process.

Notes on following pages.

7-47

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A757
757
ELECTRICAL CHARACTERISTICS (V+ = +12 V, ,T A = 25°C, unless otherwise specified)

PARAMETERS

Supply Current

CONDITIONS

V AGC 1 ,2 = +0.8 V

TEST
CIRCUIT

MIN.

1

TYP.

mA

210

mW

240

mW

V AGC 1,2 = +0.8 V

1

Voltage Gain at no Gain Reduction

V AGC 1,2 = +3.0 V
V AGC 1,2 = +0.8 V, f = 500 kHz

2

65

V AGC 1,2 = +0.8 V, f = 10.7 MHz

2

60
20

39

Voltage Gain at Full Gain Reduction
Current into either AGC Terminal
Gain Reduction Sensitivity
Input Voltage for -3 dB Limiting at Output
I ntermodulation Products

mA

17
20

Internal Power Dissipation

Voltage Gain at Partial Gain Reduction

UNITS

13

17
170
200
74
70

V AGC 1,2 = +3.0 V

MAX.

dB
dB
46

dB

VAGC 1,2 = +1.7 V, f = 500 kHz

2

V AGC 1,2 = +1.7 V, f = 10.7 MHz

2

37

V AGC 1,2 = +3.0 V, f = 500 kHz

2
2

2.0

10

dB

V AGC 1,2 = +3.0 V, f = 10.7 MHz

1.0

8

dB

V AGC 1 ,2 = +3.0 V
VAGC 1,2 = +1.7 V, f = 500 kHz

1

15

50

2

50

2

0.5
-50

J-LA
dB/V
mV

V AGC 1,2 = +0.8 V, f = 500 kHz
Two-tone signal

2

dB

dB

f1 = 500 kHz, e1 = 100 mV
f2 = 510 kHz, e2 = 100 mV
lOUT = 1 mA POp
SECTION 1
I nput Resistance at either I nput Terminal
Input Capacitance at either Input Terminal

V AGC 1 = +0.8 V, f = 10.7 MHz
V AGC 1 = +3.0 V, f = 10.7 MHz

3.0

V AGC 1 = +0.8 V, f = 10.7 MHz

kn
kn
pF

5.0
4.5
2.5

VAGC 1 = +3.0 V, f = 10.7 MHz

2.2

pF

Output Resistance

V AGC 1 = +0.8 V, f = 10.7 MHz

100

kn

Output Capacitance

V AGC 1 = +3.0 V, f = 10.7 MHz
V AGC 1 = +0.8 V, f = 10.7 MHz

100
2.6

kn
pF

Forward Transadmittance

V AGC 1 = +3.0 V, f = 10.7 MHz
V AGC 1 = +0.8 V, f = 500 kHz

2.2
14

mmho

13

mmho

0.4

mA

V AGC 1 = +0.8 V, f = 10.7 MHz

pF

Peak-to-Peak Output Current

V AGC 1 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage
Noise Figure

lOUT = 0.1 mA, V AGC 1 = +3.0 V
RS = 1.0 kn, f = 10.7 MHz

8.0

RS = 1.0 kn, f = 500 kHz

8.0

dB

15

mV

5.0
4.5

kn

I nterferi ng Signal Voltage at Input
for 1 .0% Cross Modulation

.25

8.0

Carrier signal, fc = 500 kHz
Interfering signal, fi = 510 kHz

9.0

Volts
dB

lOUT = 0.5 mA pop, V AGC 1 = +0.8 V
SECTION 2
I nput Resistance

V AGC 2 = +0.8 V, f = 10.7 MHz

I nput Capacitance

V AGC 2 = +3.0 V, f = 10.7 MHz
V AGC 2 = +0.8 V, f = 10.7 MHz
V AGC 2 = +3.0 V, f = 10.7 MHz

2.2

pF

Output Resistance at either Output Terminal

V AGC 2 = +0.8 V, f = 10.7 MHz

26

kn
kn
pF
pF

3.0

V AGC 2 = +3.0 V, f = 10.7 MHz

20

Output Capacitance at either Output Terminal

V AGC 2 = +0.8 V, f = 10.7 MHz
V AGC 2 = +3.0 V, f = 10.7 MHz

2.2

Forward Transadmittance

V AGC 2 = +0.8V, f = 500 kHz
V AGC 2 = +0.8 V, f = 10.7 MHz

VAGC

kn
pF

2.5

2.5
440

mmho
mmho

280
2.4
4.8

3.5
7.0

mA
mA

6.0

Volts

Quiescent Output Current at either Output Terminal
Peak-to-Peak Current at either Output Terminal

2 = +3.0 V
V AGC 2 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage at either
Output Terminal

lOUT = 1.0 mA, V AGC 2 = +3.0 V

5.0

Power Supply Sensitivity

V S = 12 V to 15 V
dB Gain Reduction
30 dB Gain Reduction

0.5
0.8

dBN
dBN

60 dB Gain Reduction

1.0

dBN

o

7-48

1.7
3.8

FAIRCHILD LINEAR INTEGRATED CIRCUITS • fJ.A757

757
ELECTRICAL CHARACTERISTICS (V+ = +12 V, T A = +125°C, unless otherwise specified)

Supply Current
I nternal Power Dissipation
Voltage Gain at no Gain Reduction

VAGC 1,2

Voltage Gain at Full Gain Reduction

= +0.8

1

TYP.

V, f = 10.7 MHz

VAGC 1,2 = +3.0 V, f = 500 kHz
V, f = 10.7 MHz

VAGC 1,2 - +3.0 V

55

MAX.

UNITS

rnA

14

17

17

20

rnA

170

210
240

mW
mW

200
2

V AGC 1,2 = +1.7 V, f = 500 kHz

= +3.0

MIN.

1

V

V AGC 1,2 = +3.0 V
V AGC 1,2 - +0.8 V, f - 500 kHz

VAGC 1,2
Current into either AGC Terminal

= +0.8

CIRCUIT

V AGC 1,2 = +3.0 V
• V AGC 1 ,2 = +0.8 V

VAGC 1,2
Voltage Gain at Partial Gain Reduction

TEST

CONDITIONS

PARAMETERS

dB

71

2

62

dB

2

35

dB

2

2.0
-1.0

15

dB
dB

15

50

JlA

2
1

SECTION 1
0.2

Peak-to-Peak Output Current

V AGC 1 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage

lOUT = 0.1 mA, VAGC 1 = +3.0 V

mA

0.4
8.0

9.4

Volts

1.7

2.8

3.8

5.6

3.5
7.0

rnA

6.0

7.0

Volts

MAX.

UNITS

SECTION 2
Quiescent Output Current at either Output Terminal
Peak-to-Peak Current at either Output Terminal

V AGC 2 - +3.0 V
V AGC 2 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage at either

lOUT

= 1.0 rnA, VAGC 2 = +3.0

V

rnA

Output Termi nal

757
ELECTRICAL CHARACTERISTICS (V+ = +12 V, T A

= -55°C, unless otherwise specified)

Supply Current

TEST

CONDITIONS

PARAMETERS

CIRCUIT

MIN.

1

VAGC 1,2 =+0.8 V
V AGC 1,2 = +3.0 V

I nternal Power Dissipation

V AGC 1,2 = +0.8 V

1

Voltage Gain at no Gain Reduction

V AGC 1,2 = +3.0 V
VAGC 1,2 - +0.8 V, f - 500 kHz
VAGC 1,2 = +0.8 V, f = 10.7 MHz

2
2

Voltage Gain at Partial Gain Reduction

V A GC 1,2

Voltage Gain at Full Gain Reduction

V AGC 1,2 = +3.0 V, f
V AGC 1,2 = +3.0 V, f

Current into either AGC Terminal

VAGC 1,2 = +3.0 V

= + 1 .7

= 500 kHz
= 10.7 MHz

rnA

10

17

14

20

rnA

120

21.0
240

mW

170
55

mW
dB
dB
dB

68
64

2
2

28
2.0
-3.0

15

dB

1

30

70

JlA

2

V, f - 500 kHz

TYP.

dB

SECTION 1
Peak-to-Peak Output Current

V AGC 1 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage

lOUT

= 0.1

0.2

rnA

0.4
8.0

9.0

Volts

1.0

1.7

3.5

mA

2.3

3.4

7.0

rnA

4.0

6.0

Volts

mA, VAGC 1 = +3.0 V

SECTION 2

Peak-to-Peak Current at either Output Terminal

VAGC 2 = +3.0 V
VAGC 2 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage at either

lOUT

Quiescent Output Current at either Output Terminal

= 1.0 rnA, V AGC

Output Terminal

7-49

2

= +3.0

V

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A757
757C,
ELECTRICAL CHARACTERISTICS (V+

= +12 V,

TA

= +25°C, unless otherwise specified)

PARAMETERS

Supply Current
Internal Power Dissipation
Voltage Gain at no Gain Reduction
Voltage Gain at Partial Gain Reduction
Voltage Gain at Full Gain Reduction
Current into either AGC Terminal
Gain Reduction Sensitivity
Input Voltage for -3 dB Limiting at Output
Intermodulation Products

TEST

CONDITIONS

V AGC
VAGC
V AGC
V AGC
VAGC
VAGC

1,2 = +0.8 V
1,2 = +3.0 V
1,2 = +0.8V
1 2 = +3.0 V
1,2 = +0.8V , f = 500 kHz
1 2 = +0.8 .V, f = 10.7 MHz

V AGC
V AGC
V AGC
V AGC

1,2
1,2
1,2
1,2

= +1.7
= +1.7
= +3.0
= +3.0

V,
V,
V,
V,

f
f
f
f

CIRCUIT

MIN.

1
1
2
2
2
2
2
2
1

= 500 kHz
= 10.7 MHz
= 500 kHz
= 10.7 MHz

V AGC 1,2 = +3.0 V
V AGC 1,2 = +1.7 V, f = 500 kHz

65
60
20

MAX.

14

17

18
170
220
74

22
210
270

70
39
37
2.0
1.0
15

46
10
8
50

50
0'.5
-50

2
2
2

V AGC 1,2 = +0.8 V, f = 500 kHz
Two-tone signal
f1 = 500 kHz, e1 = 100 mV

TYP.

UNITS

mA
mA
mW
mW
dB
dB
dB
dB
dB
dB
J.LA
dB/V
mV
dB

f2 = 510 kHz, e2 = 100 mV
lOUT = 1 mA pop
SECTION 1
Input Resistance at either Input Terminal

V AGC 1 = +0.8 V, f = 10.7 MHz
V AGC 1 = +3.0 V, f = 10.7 MHz

I nput Capacitance at either I nput Terminal

V AGC 1 = +0.8 V, f = 10.7 MHz

Output Resistance
Output Capacitance
Forward Transadmittance
Peak-to-Peak Output Current
Output Saturation Voltage
Noise Figure
Interfering Signal Voltage at Input
for 1.0% Cross Modulation

3.0

V AGC 1 = +3.0 V, f = 10.7 MHz
V AGC 1 = +0.8 V, f = 10.7 MHz
V AGC 1 = +3.0 V, f = 10.7 MHz
V AGC 1 = +0.8 V, f = 10.7 MHz
V AGC 1 = +3.0 V, f = 10.7 MHz
VAGC 1 = +0.8 V, f = 500 kHz
V AGC 1 = +0.8 V, f = 10.7"MHz
V AGC 1 = +3.0 V, f = 500 kHz
Output in full limiting

.25

5.0
4.5

kn
kn

2.5
2.2

pF
kn
kn
pF
pF

100
100
2.6
2.2
14
13
0.4
8.0
8.0
8.0
15

lOUT = 0.1 mA, VAGC 1 = +3.0 V
RS = 1.0 kn, f = 10.7 MHz
RS = 1.0 kn, f = 500 kHz
Carrier signal, fc = 500 kHz
Interfering signal, fi = 510 kHz

pF

mmho
mmho
mA
9.0

V
dB
dB
mV

lOUT = 0.5 mA pop, VAGC 1 = +0.8 V
SECTION 2
Input Resistance
Input Capacitance
Output Resistance at either Output Terminal
Output Capacitance at either Output Terminal
Forward Transadmittance

V AGC
V AGC
VAGC
V AGC
V AGC

2
2
2
2
2

= +0.8
= +3.0
= +0.8
= +3.0
= +0.8

V,
V,
V,
V,
V,

f
f
f
f
f

=
=
=
=
=

10.7
10.7
10.7
10.7
10.7

3.0

MHz
MHz
M~z

MHz
MHz

V AGC 2 = +3.0 V, f = 10.7 MHz
V AGC 2 = +0.8 V f = 10.7 MHz
V AGC 2 = +3.0 V, f = 10.7 MHz

..

V AGC 2 = +3.0 V
V AGC 2 = +3.0 V, f = 500 kHz
Output in full limiting

Output Saturation Voltage at either
Output Terminal
Power Supply Sensitivity

lOUT = 1 .0 mA, V AGC 2 = +3.0 V
VS=12Vt015V
o dB Gain Reduction
30 dB Gain Reduction
60 dB Gain Reduction

7-50

kn
pF
pF

2.2
2.5

V AGC 2 = +0.8 V, f = 500 kHz
V AGC 2 = +0.8 V, f = 10.7 MHz

Quiescent Output Current at either Output Terminal
Peak-to-Peak Current at either Output Terminal

kn
kn
pF
pF
kn

5.0
4.5
2.5
2.2
26
20

1.7
3.8

440

mmho

280

mmho

2.4
4.8

3.5

mA

7.0

mA

5.0

6.0

V

0.5
0.8
1.0

dBN
dB/V
dB/V

FAIRCHILD LINEAR INTEGRATED CIRCUITS • pA757
TYPICAL PERFORMANCE CURVES FOR 757 AND 757C

PRODUCT OF SECTIONS 1 AND 2
FORWARD TRANSADMITTANCE
AS A FUNCTION OF FREQUENCY

SECTION 1
FORWARD TRANSADMITTANCE
AS A FUNCTION OF FREQUENCY

.J. J~ dB REFERENCE' 6.2 X 10-3 mho2
odB GAIN REDUCTION

-.......

I

10

20 dB dAIN
20

I

30

40 dB JAIN

~EJucITION

[

i\
\

20 dB GAIN REDUCTION

\

30dB GAIN REDUCTION

~ i\

-~

50 -TA ,150c
y+. +12Y

\\

2.0

10 dB JAIN

....... ~

...... ~

I

'--TA 'ZSoC_
y+, +12V

!'.,
50

5.0
10
20
FREQUENCY - MHz

50

100

1.0

2.0

S4.5k
u
z

~
~3.5k

TA ' 25°C
y+. +12Y
I O7
3.Ok
•
r2.5k

r

o

10

TZ
20

60

-- ---

/JA757
I

ro

30
40
50
60
GAl N ~EDUCTI ON - dB

50

40

~

10 dB GAl N REDUCTI ON AT +Z5°C

....... '"'-

o

-60

+2slc-

20
,

-20

~

30

+60

~

40

~

50

+Zsoc-

80

o

0.5

1.0

1.5

YAGC'3.0~

~.

~

~
I.

V

YAGC '1.0Y/

12

10
8

V
9

/

/

l.4

30

S+N

""
""~

2.5

3.0

20

10

llo!
3.5

~

4.0

0

r-f

/

V

V

............

/'

12

--- ....---

13

/'

/JA7S7-

10

20

30
40
50
60
GAIN REDUCTION - dB

J

I

II ''iOOkHz-

r;

y+, +12Y , TA ' +ZSoc

r-'r/i/
~

./

riO' 3.0 rnA pp

10·,12.0Irnl~

60
1.0

IS

/J
/
./

POWER SUPPLY VOLTAGE - VOLTS

/JA757

II
5.0

I
10

50

I NPUT LEVEL - mv.

7-51

~

/r;'

10 '1.0 rnA pp

-

RS-Ik~",,",~
1-~.7MHi •

12 ' 5\0 kHz

II
14

TA ' ZSoc
y+, +12V

V

o

10

TA -ZSoC

11

VV
V'"

TWO TONE 1M DISTORTION
PRODUCTS AS A FUNCTION OF
INPUT SIGNAL LEVEL

/JA7S7
10

L

/

~

~

,/

/

VAGC - VOLTS

............

B 1'4

NOISE FIGURE

o

~&

Z.O

~

70

40

Vi

+lZSoc

~~7S7

20

16

4.0

~

...~

\~

70

22

i

100

50

g

POWER SUPPLY CURRENT
AS A FUNCTION OF
~UPPL Y VOLTAGE

18

~

~

\~

60

+140

+100

~

V+'12V
f· 500kHz

TEST CI RCu'1T 2

-55°C

TEMPERATURE - °c

~

50

SIGNAL TO NOISE RATIO
IMPROVEMENT AND NOISE
FIGURE AS A FUNCTION OF
GAIN REDUCTION

\
\\

2:

y+. +lZVf 'SookHz
+20

2030405060
GAIN REDUCTION - dB

co

4\\- --5~oC
--\

o

6Od,B GAliN R~UCT~ 1--1--

+757

1--+-1----+-1----+-1----+--1

10

~

10

5.0
10
20
FREQUENCY - MHz

2.0

1.0

1
+125 °C_

30
20

1.0

SECTION 2
OUTPUT RESISTANCE AND
CAPACITANCE AS A FUNCTION
OF GAIN REDUCTION
35k r--.--r--.--r--.--r--.--.

10

30dB GAIN REDUCTION AT +Zsoc

.....

100

/JA7S7

1 ·1

60

50

5.0
10
20
FREQUENCY - MHz

GAIN REDUCTION AS A
FUNCTION OF
GAIN CONTROL VOLTAGE

1""

I

y+. +12Y

~A757-

30k

VOLTAGE GAIN AS A FUNCTION
OF TEMPERATURE
~
odB GAl N REDUCTI ON AT +ZSoc
70

"I'.

I

T .1250 C

- - r---

CAPACITANCE

~ 4.Ok

'"

r--... ,,1\

i'-- r...... ,I"-1\

50 r-'A
1--

- r--- r--- r---...

~

~ 1"\

JI

4.0

RESlsIANC~

5.0k

'"

i'--,

30dB JAI)RELJTION

SECTION 1 AND 2
INPUT RESISTANCE AND
CAPACITANCE AS A FUNCTION
OF GAIN REDUCTION
5.5k

~EDUTI::--

20 dB JAIN iREJudTlON

I I
I [

\
~

/JA757

~

I I

60
1.0

--

[

10 dB GAIN REDUCTION

J

.j.

0 ~B IREFERENCE • 440 mmho
OdB GAIN REDUCTION

I 0 dB REFERENCE' 14 mmho

odB GAIN REDUCTION
[

"-\

-

~EJUJTlON

I

SECTION 2
FORWARD TRANSADMITTANCE
AS A FUNCTION OF FREQUENCY

100

1
500

ro

~

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J.lA757
TEST CIRCUIT 1 (NOTE 3)

+12V

12

13

14

11

10

TEST CI RCUIT 2 (NOTE 2)

1
0.1

f1
"F

14

13

"~ _ J

+12 V

·0.1 "F

11

12

0.1 "F

~

50n

-0.1 "F
10

---1
I

1.0
kn

~
I

I

___ J

:t

o1
. "F

0.1 "F

f;)u-- ~8~t~g)L
I

SUPPLY

I

'-I
__

TINT
CONTROL

APC DETECTOR
OUTPUT

OSCI LLATOR
CONTROLI

ioh(

.r.-

I

GROUND
OSCILLATOR
FEEDBACK

TO ~A746 CHROMA 4 - - - - - , TO I!A781 CHROMA IF ~BURST INPUT FROM I!A781
DEMODULATOR ~
AMPL1IFIERjACC TERMINAL
ACC AMPLIFIER
REFERENCE
OUTPUT TERMINAL
TERMINALS
INTEGRA·
PHASE
INTEGRA·
PHASE
SHIFT
~~fS~J~T
~I~T~
PHASE SHIFT CRYSTAL
NETWORK
WORK
WORK
WORK
CAPACIWR
OSC
OUT

ACC DETECTOR
INPUT
APC DETECTOR
INPUT

GATE INPUT

ABSOLUTE MAXIMUM RATINGS
Supply Current
Current into Gate Input Terminal
Peak-to-Peak Voltage at either APC or ACC Detector Input Terminals
Internal Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Soldering, 10 seconds)
BLOCK DIAGRAM

I

TINT CONTROL

The J,LA 780 is also useful as a communications phase locked loop system to select, amplify and
demodulate AM, FM, FSK and SS8 signals.

BURST
GATE

~A780

I

I

OSCILLATOR
CURRENT
SOURCE

1-

....._---'

___________

L _.

...J

*Planar is a patented Fairchild process.

7-60

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p.A780

78De
DC

CHARACTERISTICS (T A = 25°C, Gate "ON", Test Circuit 1 unless otherwise specified)

PARAMETER

CONDITIONS

MIN.

TYP.

11.3

12.0

12.6

40

200

mV

5.8

7.6

mA

12

40

pA

-330

-70

+330

mV

-375

-50

+375

mV

-330

-20

+330

mV

-200

+300

+800

mV

Voltage at ACC Detector Input Terminal

6.0

6.5

Voltage at APC Detector Input Terminal

6.0

Supply Current

MAX.

26

Voltage at Supply Terminal
Supply Regulation (.1. V 10)

V+

= 22 V'to

V+

= 27

V

UNITS
mA
V

Gate "OFF", 50 kn resistor

Total Current into Oscillator

connected between Pin 10 and

Output Terminals

4.2

Pin 6, Pin 2 shorted to Pin 3

Current into Either APC Detector
Output Terminal

12 kn resistor connected
between Pin 6 and Ground

Offset Voltage between ACC

50 kn resistor connected

Detector Output Terminals (V 15 - V 16)
Offset Voltage between APC Detector

between Pin 10 and Pin 6
50 kn resistor connected
between Pin 10 and Pin 6

Output Terminals (V 11 - V 12)
Offset Voltage between Oscillator
Control Terminals (V7 - V8)

12 kn resistor connected
between Pin 6 and Ground,
V 11

Offset Voltage between Oscillator
Output Terminals (V2 - V3)

= V 12 = 9.5 V

Gate "OFF"

Voltage at Oscillator Feedback Terminal

2.8

Voltage at Tint Control Terminal
Voltage at Tint Control Terminal

Gate "OFF"

7.3

Internal Power Dissipation

V
7.0

6.5

7.0

200

300

7.6

8.2

310

400

V
V
mV
V
mW

78De
AC CHARACTERISTICS

(T A

= 25°C, peak-to-peak burst level at APC Detector Input Terminal

200 mV. Standard NTSC Signal,

fo = 3.579545 MHz, Test Circuit 2 unless otherwise specified.)
PARAMETER
Oscillator Pull-in Range
Oscillator Static Phase Error

CONDITIONS

MAX.

UNITS

400

Hz

f free run

< fo

-400

Hz

f free run

= fo +120 Hz
= fo -120 Hz

Oscillator Control Sensitivity
Input Resistance at Oscillator
Feedback Terminal
Input Capacitance at Oscillator
Feedback Terminal
Output Terminal (Pin 3)

TYP.

f free run> fo

f free run

Peak-to-Peak Current at Oscillator

MIN.

Tint Control Wiper at Ground

+2.2

Degree

-2.2

Degree

12

Hz/mV

2.2

kn

4.5

pF

6.8

mA

ACC Detector I nput Resistance

2.2

kn

ACC Detector I nput Capacitance

4.5

pF

ACC Detector Sensitivity

100 mV p _p burst level at ACC
Detector Input Terminal,

+2.2

mVdc/mV p _p

Oscillator Locked
APC Detector Input Resistance

2.2

kn

APC Detector Input Capacitance

4.5

pF

APC Detector Sensitivity

5.0

mV/Degree

7-'61

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • p-A780
TYPICAL PERFORMANCE CURVES FOR 780C
(Test Circuit 2 unless otherwise specified)

SUPPLY VOLTAGE
AS A FUNCTION OF
SUPPLY CURRENT
16
14

STATIC PHASE ERROR
AS A FUNCTION OF
BURST INPUT LEVEL

STATIC PHASE ERROR
AS A FUNCTION OF
FREQUENCY OFFSET
20

TA ' 25°C
TEST CI RCUIT I

IS

T ' 25°C
A

TA ' 25°C

1--+--+--+--1-

IS

10
12
10

\

~

I--+--+--+--Ir---

10

/
J

/

L

1--+--t--+..9j¥-t-

-S

o

IV

-S

-10 ~+-~~~t--~-+-+--t--+-~

10

30

20

I

-20 1---'---'---1._'---"--'-----'_"'---'--'
-1000 -800 -600 ;400 -200 0 200 400 600 800 1000

40

1000

SOO

TA • 2SoC

~ 600

~ -200
~

1---+--+---+---+----1---+---f---1

-8

1---+--+---+---+----1---+---1---1

/'

~

-400

1

10 ' 3.S79545 MHz

STANO~RD ~TSC ,SIGN~L

""

-800

..,......

DIFFERENTIAL DC VOLTAGE AT
APC DETECTOR OUTPUT
TERMINALS AS A FUNCTION OF
OSCILLATOR FREQUENCY OFFSET

APC DETECTOR OUTPUT
AS A FUNCTION OF
RELATIVE PHASE DIFFERENCE

~

30

//

I~ 20
<2:

01-

/

!::t; -30
o

PEAK - TO

I~ 60

!:i
~

j,~

20

~

i5

v.I

-20

, , , ,

~

:; -40 f-lOOmV

g
~

-60

~ -80

-so

<
0

100

200

300 400 500

OSCILLATOR FREQUENCY OFFSET, M - Hz

<

~

~

0

SlOB

20
RELATIVE PHASE DIFFERENCE BETWEEN COLOR
BURST AND LOCAL OSCILLATOR - DEGREES

7

B~

6

~~

5

g~

4

~~

7-62

25

800

TA =2SoC

~PEJ

VLAG~

- Tb - PEiAK
AT.b r-OSCILLATOR FEEDBACK TERMINAL-I.2V

\/
\

3

-200

/

i\

L\

2

o

PIN 2

/'

~

PIN3

'0

'SOOmV

~

8

~§

jmi
~

E

~~

!;;:,

,5

-100
~

200
400
600
PEAK - TO - PEAK BURST INPUT
LEVEL AT ACC DETECTOR INPUT - mV

",I-

to =3.S79545 MHz
STANDARD NTSC SIGNAL

~ 'l

~ /''-:

200mV-

IP

/L,7

u

10 = 3.S7954SMHz
BURST LEVEL = 200 mV pop

o

10

K1::.100mv

I - - to = 3.579545 MHz. OSCILLATOR LOCKED
STANDARD N?SC SlpNAL L
.L

OSCILLATOR OUTPUT
AS A FUNCTION OF
TINT CONTROL CURRENT

i PEA~ BURST I ~UT LfVEL

40

2:

o

1000

Joomvl~ V~

>

-40
-SOO -400 -300 -200 -100

TA = 2SoC

80

<

V

LV

~g

o~

V

200

c.:>

/

10

-20

o

~ 100

TA ' 2SoC

::

§~

-1000

-fI

- f - - r--

TEMPERATURE - ° C

E

V ...-

/

~ ~ J
400
600
800
PEAK - TO - PEAK BURST INPUT
LEVEL AT APC DETECTOR INPUT - mV

0

10,000

./

e: -600

-10 L-......l..._ _.l......--1._...J......----I_....L.._1----I
80
o
20
40
60

-10

J

SOO 1000

/

L

0

8'

STANDARD NTSC SIGNAL

-6

40

T ' 2SOC
A

800

10 = 3.S7954 MHz

-4

~~

II

100

DIFFERENTIAL DC VOLTAGE
AT ACC DETECTOR OUTPUT
AS A FUNCTION OF
BURST INPUT LEVEL

-2~~--+--+--~~~~~r-~

...J!3
<0-

10 • 3.S79S4S ~'H~ I I
STANDARD NTSC SIGNAL

FREQUENCY PULL-IN
RANGE AS A FUNCTION OF
BURST INPUT LEVEL

~ 200

~~

-120Hz
-240Hz

STATIC PHASE ERROR
AS A FUNCTION OF
TEMPERATURE

~

!:iz

so

10

.....

PEAK TO PEAK BURST INPUT LEVEL AT A PC DETECTOR - mV

~400

u.s
0-::>,

-IS

i+12OHz

FREQUENCY OFFSET - Hz

8 ALL COMPONENTS OF TEST CI RCUIT 2 AT
ROOM TEMPERATURE EXCEPT INTEGRATED
6 CIRCUIT UNDER TEST.

so

FREQUEN~i~~zSET -

SUPPLY CURRENT - mA

10r--r--~~--~-'--'---r-~

>

V

L

-10

o

"- .....

"'r--

V
V
-100

\.

100

r--.... I-- f-200

DC CURRENT INTO TINT CONTROL TERMINAL-1lA

300

FAIRCHILD LINEAR INTEGRATED CIRCUITS • f.lA780
TEST CIRCUIT 1

TEST CIRCUIT 2

ACC DETECTOR OUTPUT

lOOll

STANDARD NTSC
SIGNAL INPUT
(Y-COMPONENT REMOVED)

lOOll

ACC SET-UP
22kll

APC SET-UP

20kll

+

470ll

V=t24V.

l=+ 24V

RS=470ll
lkll

lkll

2kll

r·

Ol
/-::CI--"'C::-:H-:-::R~O::":"MA-:-O TO vA 746

CHROMA
INPUT 1

OUTPUT 2

g~~~~LATOR

CHROMA INPUT

!.2._---1
CHROMA
INPUT 2

ACC INPUT
FROM ~A780
CHROMA SUBCARRIER
REGENERATOR ACC
DETECTOR OUTPUT

CHROMA
LEVEL
CONTROL

V+~

TO vA780
CHROMA SUBCARRIER
REGENERATOR ACC DETECTOR
AND APC DETECTOR INPUTS

*Planar is a patented Fairchild process.

7-66

FAIRCHILD LINEAR INTEGRATED CIRCUITS • MA781
781C

ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER

CONDITION
RL6=RL9=1 Mn

Supply Current

(Note 1)

MIN.

RL6 = 0 n

Short Circuit Load Current, Chroma Output 2

RL9 = 0 n

MAX.

UNITS

8.0

13

18

mA

17

24

31

mA

400

550

Internal Power Dissipation
Short Circuit Load Current, Chroma Output 1

TYP.

20

mW
mA

42

mA

20

36

DC Voltage at Chroma Output 1 Terminal

15.5

17.5

DC Voltage at Chroma Output 2 Terminal

17.5

18

18.5

14

17

19

dB

11

14

16

mVp_p/mVd c

12

15.8

17

dB

3.0

5.0

5.5

V

17

19.5

22

V

16.6

17

V

Killer "OFF" Threshold (Pin 13)

16

16.3

DC Voltage at Decouple Terminal, Pin 11

15

15.5

16

V

DC Voltage at Decouple Terminal, Pin 12

14.5

15.3

16

V

0.7

1.0

1.2

V

Gain, ACC Amplifier Stage
Output Voltage Sensitivity of ACC Amplifier
to ACC Control Voltage

V ACC = V 1 - V 14 = 0 mV to
V1- V 14=-75mV

Maximum Gain, Chroma Level Amplifier Stage
DC Voltage at Chroma Level Control Terminal
for 90% Maximum Output Level,
Chroma Level Amplifier Stage
DC Voltage at Chroma Level Control Terminal
for 10% Maximum Output Level,
Chroma Level Amplifier Stage
Killer "ON" Threshold

Chroma Level Control Set for
90% Maximum Output
Chroma Level Control Wiper set
for 10% of Maximum Output

(Pin 13)

DC Voltage at Gain Preselect Terminal

20

V
V

V

DC Voltage at Chroma Input 1 Terminal

1.7

V

DC Voltage at Chroma Input 2 Terminal

1.4

V

0.7

dB

Chroma Input 1 Resistance

2.4

kn

Chroma Input 1 Capacitance

6.2

pF

Chroma Input 2 Resistance

2.4

kn

Chroma Input 2 Capacitance

4.2

pF

T A = 25° C to T A = 70° C
Adjust Input Level at Chroma
Gain Change with Temperature,
Chroma Level Amplifier Stage

Input 2 for Output Level =
1.0 V RMS at Maximum Gain.
Set Chroma Level Control
Wiper for Output Level =
100 mV RMS

NOTE (1)
T A = 25°C, v+ = 24 V, RL6 = 3.3 kil, RL9 = 2.7 kn, Chroma Level Control Wiper at Ground, Voltage at ACC Input Terminals = 10 V, zero
Differential Voltage between ACC Input Terminals, f = 3.58 MHz, Peak-to-Peak Input at Chroma Input 1 = 200 mV, Peak-to-Peak Input at
Chroma Input 2 = 400 mV, unless otherwise specified. Refer to Test Circuit 1.

7-67

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • MA781
TYPICAL PERFORMANCE CURVES FOR 781C
ACC AMPLIFIER GAIN AS A
FUNCTION OF 01 FFERENTIAL DC
VOLTAGE AT ACC INPUT
TERMINALS

SUPPLY CURRENT
AS A FUNCTION OF
SUPPLY VOLTAGE
30
28

16

f-L=Joc

~

V

22
20
18
16
14
12

14 - I T J 2 J
v+ = 24 V

/

24

I

/

/

/

16

20

J

V

10

2.4

/

1.6

24

r-

"

~

U5

26

28

30

-

-300

32

I

-200

1.2

§

0.8

~

100

o
o

300

12

TEST CIRCUIT
14-17V

1 kn

10kn

.41pF

~
RL9

2.1kn

lOon

6 an

12

13

11

10

9

KILLER
DEDE- CHROMA CHROMA
ADJUST COUPLE COUPLE LEVEL OUTPUT 2

V+

Il A781
GAIN·
CHROMA PREINPUT 1 SELECT

ACC
I NPUT

loon

1

2

GND.

N.C.

4

5

3

CHROMA CHROMA
OUTPUT INPUT
1
2

6

1

62kn

1

220

SET SUPPLY

FOR
VW 10V

.'

-=-

3.58 MHz
INPUT

1

3.58MHz
INPUT

EQUIVALENT CIRCUIT
KILLER
ADJUST
13

DECOUPLE
II

DECOUPLE
12

CHROMA
LEVEL
CONTROL
10

CHROMA
OUTPUT#2
9

V+

8

RI
5.6k!! R2
2.7k!!

RIO
3.9kll

14

A.C.C.

1~~~~

-----_--+---1----1---+---1

0-

2

4
GROUND

3
GAIN
CHROMA
PRESELECT OUTPUT 1

7-68

7
CHROMA
INPUT 2

1
9.5

"1'\..

16

20

24

OC VOLTAGE AT CHROMA LEVEL CONTROL TERMINAL - V

DIFFERENTIAL DC VOLTAGE AT ACC INPUT TERMINALS IVI - V 14) - mV

SUPPLY VOLTAGE - V

"

""',

o

200

16.9

1

0.4

-100

I--

15.5

"

I

~

V

1
O

= 2J C
V+=24V

>
2.0

/
22

T~

2.8

7

I

a:

2

18

I

12 '-- "2 = 200 mV p.p

o

14

3.2

i - - i--

/

26

-

CHROMA LEVEL AMPLIFIER
GAIN AS A FUNCTION OF
DC VOLTAGE AT CHROMA
LEVEL CONTROL TERMINAL

RII
1.2kll

RI2
3.7k!!

FAIRCHILD LINEAR INTEGRATED CIRCUITS • J,LA781

INTEGRATED CIRCUIT COLOR TV CHROMA PROCESSING SYSTEM

+24V

10kn

KILLER
THRESHOLD
ADJUST

COLOR
LEVEL
CONTROL

5k.\l
33n

.0IJLF

~
14

13

12

11

10

9

/LA 746
CHROMA DEMODULATOR

/LA 781
CHROMA I. F. AMPLIFIER

6

6

7

100

.Il

470
pF

SET-=- UP

SET-UP

r

470
pF

-=-

COMPOSITE
VIDEO
INPUT
+24V

47pF

47PF

~

r

SKEW

62
k.\l

1

22
k.\l

k.\l
25
kn

.05
JLF

I-=~~--~~--~----------------~----------~
11
10
15
13
12
16
14
p.A780
CHROMA SUBCARRIER REGENERATOR

lk.\l

36k.\l

43k.ll

TINT
CONTROL

.00JLF

270

k.ll

-=-

7

4

I

I

1.5
kn

7-69

360pF

180.11

56.1l

1

056
JLF

-=-

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS •

~A781

INTEGRATED CIRCUIT COLOR TV CHROMA PROCESSING SYSTEM

(BLOCK DIAGRAM)

r

f~

KILLER
THRESHOLD

I
CHRO MA
INPU T

-I t-

KILLER
SWITCH

~
AMP

ILA781
CHROMA I.F.

ACC

c~

CHROMA REFERENCES

ACC
DETECTOR

•

VOLTAGE
REGULATOR

A PC
DETECTOR

•

r

ILA746
CHROMA
DEMODULATOR

~lpt

PHASE SHIFT
NETWORK

p.A780
CHROMA SUBCARRIER
REGENERATOR

r----

~ D.C.
TINT
CONTROL

t

BURST GATING PULSE

7-70

R-Y

f--

MATRIX
AND
EMITTER
FOLLOWERS

SYCHRONOUS
DETECTORS

D.C. CHROMA
LEVEL CONTROL

rD~

-

(+lCHROMA
INPUT

(-jCHROMA
INPUT

L~

II
1\

PHASE
SHIFT
NETWORK

CHROMA
OUTPUT
NETWORK

B-Y

~ I--.

G-Y

- r--

IJA786
PAL TV CHROMA DEMODULATOR
FAIRCHILD LINEAR INTEGRATED CIRCUIT

GENERAL DESCRIPTION - The MA786 is a Synchronous Demodulator for direct drive of color
video output stages. It is constructed on a single silicon chip using the Fairchild Planar* epitaxial
process. The MA 786 is designed for use in color television receivers operating on the Phase Alternate
Line (PAL) system. The circuit consists of two synchronous demodulators, a decoding matrix, a
PAL switch with internal multivibrator and a color killer switch.

•
•
•
•
•
•

DOUBLE-BALANCED SYNCHRONOUS DEMODULATOR
INTERNAL DECODING MATRIX
EMITTER FOLLOWER OUTPUTS
INTERNAL PAL SWITCH
INTERNAL COLOR KILLER
PROVISION FOR OUTPUT DC LEVEL MATCHING

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6B, 9B

IDENTIFICATION
INPUT

GROUND

R-Y REFERENCE
INPUT

- LINE PULSE INPUT

+ LINE PULSE INPUT

PAL SWITCH OUTPUT

ABSOLUTE MAXIMUM RATINGS

R-Y OUTPUT

R-Y CHROMA INPUT

G-Y OUTPUT

R-Y DC
LEVEL ADJUST

V+

G-Y DC
LEVEL ADJUST
KILLER INPUT

B-Y OUTPUT

13.2 V
730mW
5mA
±5 V
5mA
0
-40 C to +85° C
-55°C to +125°C

Supply Voltage (Note 1)
Internal Power Dissipation (Note 2)
Color Difference Output Currents
Voltage on Identification Input
Current into Identification Input
Operating Temperature Range
Storage Temperature Range
Lead Temperature
Hermetic DIP (Soldering, 60 seconds)
Molded DIP (Soldering, 10 seconds)

300°C
260°C

B- Y REFERENCE
INPUT

B-Y CHROMA INPUT

ORDER' INFORMATION
TYPE
PART NO.
786C
786DC
786C
786PC

BLOCK DIAGRAM

B·Y OUTPUT

G-Y OUTPUT

KILLER INPUT

R-Y OUTPUT

1

V+

10

0 \.V

0

1

B·Y
REFERENCE
INPUT

10

1
1

1

r--;::~-1--------~::::::.o

o-=--~
1

PAL

I

.-----..J SWITCH
OUTPUT

1

I@
GROUND

R·Y
REFERENCE

<;>

L-r--=......,......"J+---------"9

0 _____ _ @-----B·Y CHROMA INPUT

G·Y
DC
LEVEL ADJUST

R·Y DC
LEVEL ADJUST

02 ____ _
R·Y CHROMA INPUT

:~~~;IFICATION

+ LINE -LINE
PULSE PULSE
INPUT INPUT

·Planar is a patented Fairchild process.

Notes on following page.

7-71

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • JlA786
786C
ELECTRICAL CHARACTERISTICS (T A

= 2SoC, V+ = 12V, Test Circuit 1, unless otherwise specified.

PARAMETER

See Note 3)

CONDITIONS

MIN.

TYP.
33

40

(Note 4)

6.S

7.4

7.S

V

100

n

Supply Current (16)
DC Voltage at S·y Output

MAX.

Output Resistance at Color Difference Terminals (R4, RS, R7)

UNITS
mA

Color Difference Gain
R-Y Channel

7.0

V/V

B-Y Channel

12.S

V/V

G-Y Channel

(Note S)
(Note 6)

Maximum Color Difference Output Voltage
R-Y Output (V4)

3.2

Vp-p

B-Y Output (V7)

4.0

Vp-p

G-Y Output (VS)

1.S

Input Resistance of Chroma Inputs (Rg, R13)

Vp-p

n

1000

Input Capacitance of Chroma Inputs (Cg, C13)

pF

10

DC Voltage at Chroma Inputs (Vg, V13)
Input Resistance of Reference Inputs (R2, RS)
DC Voltage at Reference Inputs (V2, VS)

3.2

V

gOO

n

2.2

V

Color Killer Voltage Threshold (VlO)
Color "ON"

O.g

Color "OFF"

V
V

0.3

Peak-To-Peak PAL Switch Output Voltage (V3)

2.0

Vp-p

3.0

TEST CIRCUIT 1

KILLER
INPUT

I

HORIZONTAL
LINE
PULSE

v+
+12V

f

10
B-Y CHROMA INPUT

R·Y CHROMA INPUT

IDENTIFICATION
INPUT

b"j,,,,I,
1,4

6

9

15

IlA786
B·Y REFERENCE INPUT

R·Y REFERENCE INPUT

4

R-Y OUTPUT

5

G-YOUTPUT

7

B-Y OUTPUT

13

8

j

2
11

12

3

---,I-

VB-Y

:r:1-

;t~~
~~~ a:~~3
wd o..;:~
---'~

~

) lkU r

---'4:

:.-

2.5
kU

I!

150llH

16

VG-Y

-----

-==

-v
,...o

9

4
10kQ

o

-

"

6

6.8kQ

.471.1l

-==

o-C
SI

() -BVdc

Note: SI is closed for "adjusted" measurements.

Fig. 1
PRODUCT DETECTOR

+8 Vdc

CARRIER INPUT
300 mV (rms)

~~--~------------~
SSB SIGNAL
INPUT

This figure shows the JJ.A 796 used as a single sideband (SSB) suppressed carrier demodulator (product detectod. The carrier signal is applied to
the carrier input port with sufficient amplitude for switching operation. A carrier input level of 300 mV(rms) is optimum. The composite SSB
signal is applied to the signal input port with an amplitude of 5.0 to 500 mV(rms). All output signal components except the desired demodulated audio are filtered out, so that an offset adjustment is not required. This circuit may also be used as an AM detector by applying composite
and carrier signals in the same manner as described for product detector operation.

Fig. 2
FREQUENCY DOUBLER

+12 Vdc

?
lkQ

1

lkQ

~

RL
7

"

1

uA796

C"

1

:; coswt

9

4
10kO
50kO

T

lOkO

"

AVe"; cos 2wt

8

I

If

-==

6

510

C

RL

3

2

510

510

510

10

-

t

-==

"
-Aveocos 2wt

5

6.BkQ

'5
O-BV

-==

The frequency doubler circuit shown will double low-level signals with low distortion. The value of C should be chosen for low reactance at the
operating frequency.
Signal level at the carrier input must be less than 25 mV peak to maintain operation in the linear region of the switching differential amplifier.
Levels to 50 mV peak may be used with some distortion of the output waveform. If a larger input signal is available a resistive divider may be
used at the carrier input, with full signal applied to the signal input.

Fig. 3

7-77

I

3064
TV AUTOMATIC FINE-TUNING CIRCUIT
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 3064 is a monolithic TV Automatic Fine-Tuning Circuit constructed using the Fairchild Planar* epitaxial process. The 3064 combines all of the automatic fine-tuning
circuitry, except transformers, in one integrated circuit. Systems with low level I F amplifiers can now
achieve tuning accuracies of ±25 kHz due to the 3064's high sensitivity. Internal voltage regulation
improves overall performance and reduces system cost.

•
•
•
•

CONNECTION DIAGRAM
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E

HIGH SENSITIVITY
25 kHz MAX. FREQUENCY DEVIATION
INTERNAL VOLTAGE REGULATOR
INTERNAL AGC

V+

ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage
Internal Power Dissipation (Note 3)
Detector Differential Voltage (V 1-3)
Detector Input Voltage Range (V1, V3)
I.F. Amp Output (V2)
Bias Voltage (V6)
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 60 seconds)

Note 2
700mW
±10V
+5V,-6V
+20V,OV
+2V,OV
-65°C to +150°C
_40° C to +85° C
300°C

I.F. AMP
OUTPUT

v-

DETECTOR
INPUT

I.F. AMP
INPUT

CORRECTION
VOLTAGE
OUTPUT

ORDER INFORMATION
TYPE
PART NO.
3064
CA3064T

NOTES:
(1)
All voltages referenced to V_except as noted.
(2)
V + terminal may be connected to any positive voltage source through a suitable dropping
resistor, provided the dissipation rating is not exceeded.
(3)
Derate linearly at 5.6 mW/oC for ambient temperatures above +25°C.

EQUIVALENT CIRCUIT
LF.AMP
OUTPUT

BIAS
2

6

DETECTOR INPUT
1

CORRECTION
VOLTAGE

OUTPUT

CORRECTION

4

5

VOLTAGE
OUTPUT

3

DETECTOR
INPUT

10

v+

·Planar is a patented Fairchild process.

7-78

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 3064
ELECTRICAL CHARACTEBISTICS (V+= +30V, RS = 1.5 kn, TA = 25°C, Test Circuit 1, unless otherwise specified.)
MIN

TYP

MAX

130

140

150

mW

TA = -25°C

135

150

mW

TA = +85°C

145

150

mW

4.0

6.5

9.5

rnA

10.9

11.8

12.8

V

Quiescent Operating Current - 12

1.0

2.0

4.0

rnA

Quiescent Operating Voltages - V4, V5

5.0

6.9

8.0

V

Output Offset Voltage - (V 4-V5)

-1.0

0

1.0

V

PARAMETER

CONDITIONS

Power Consumption

TA=+25°C

Test
V10 = +10.5V Ckt 2

Supply Current - 1+
Regulated Supply Voltage - V+

UNITS

Test Ckt 2

Input Admittance - Y 11

f = 45.75 MHz

0.41 + j 1.0

mmho

Reverse Transfer Admittance - Y 12

f = 45.75 MHz

0+ j 3.4

J.Lmho

Forward Transfer Admittance - Y 21

f = 45.75 MHz

24.5 - j 29

mmho

Output Admittance - Y 22

f = 45.75 MHz

0.04 + j 0.9

mmho

Correction Control Voltage - V 4 (Test Circuit 1)

VIN = 18 mV RMS
fo = 45.750 MHz

M as listed (MHz)
-0.030

85

%V+
25

+0.030
-0.900

80

%V+

+0.900

35

%V+

-1.500

80

%V+

+1.500
Correction Control Voltage - V5 (Test Circuit 1)

%V+

35

%V+

VIN = 18 mV RMS
fo = 45.750 MHz

M as listed (MHz)
-0.030

25

+0.030

85

%V+

-0.900

35
80

%V+

-1.500

35

%V+
80

TYPICAL PERFORMANCE CURVES FOR 3064
WIDE-BAND DYNAMIC
CONTROL
VOLTAGE CHARACTERISTICS

NARROW-BAND DYNAMIC
CONTROL
VOL TAGE CHARACTERISTICS

I

12.5

-.......

IS

TA ' 2SOC
V,N '18mV

V--

10

~

/
/

I

)~

S.O

/

REF.A,I

8~%OfVIO
7.S

5.0

~EF.

0
-0.030 -0.020 -0.010 45.7S0 0.010

2.5

Ii

0.020

0
-2.0

0.030

INPUT FREQUENCY DEVIATION - MHz

/

TA ·2SOC
V,N ·18mV

COJROL

~LTA~

"

REF. C 80% of VIO

/

I

r\

' " 25'10 ofBVIO

.-"'"

L

/

10

7.5

2.5

CORiRECTI

12.5

....... CORRECTION CONTROL V~

"

%V+I

+0.900

+1.500

IS

%V+

I

11

REF. D 35'10 of VIO -

\
-1.5

...-

"-1.0

-O.S 4S.750 O.S

/

1.0

I NPUT FREQUENCY DEVIATION - MHz

NOTE: See test circuit 1.

7-79

\.

2L5

2.0

%V+

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 3064

COIL DATA FOR DISCRIMINATOR WINDINGS

TEST CI RCUIT 1
CORRECTION VOLTAGES

R1
3kQ

REF. A
REF. C
REF. D
REF. B

O.OOl~F

R6
10

L1 - Discriminator Primary: 3 1/16 turns; #20, Enamel-covered
wire-close-wound, at bottom of coil form. Inductance of
L1 = 0.165 J,LH; 00 = 120 at fo = 45.75 MHz. Start winding at Terminal #6; finish at Terminal #1. See Notes below.

R7
1.5kQ

R3
9kQ

L2 - Tertiary Windings: 2 1/16 turns; #20 Enamel-covered wireclose wound over botton end of L 1. Start winding at Terminal #3;
finish at Terminal #4. See Notes below.

+30V

J

R2
1kQ

L3 - Discriminator Secondary: 3 1/2 turns; center-tapped, space
wound at bottom of coil form. Inductance of L3 = 0.180 J,LH; 00 =
150 at fo = 45.75 MHz. Start winding at Terminal #2; finish at
Terminal #5, connect center tap to Terminal #7. See Notes below.

C2
0.001

R4
2kQ

~~F

R5
5kQ
C3
68pF

NOTES:

1. Coil Forms; Cylindrical; 0.30" Dia. max.
2. Tuning Core: 0.250" Dia. x 0.37" Length.
: Material: Carbinal J or equivalent.
3. Coil Form Base: See drawing below.
4. End of coil nearest terminal board to be designated

°r~

the winding start end.

CONTROL VOLTAGE OUTPUT

NOTE:

Parts placement is critical. Use P.C. board layout on
last page for best results.

COIL FORM BASE TERMINAL DIAGRAM

L1 is aligned for symmetrical bandwidth on either side of 45.750 MHz.
L2 tertiary winding wound on L1 coil form.

+--+-+--?I~--1---et-7

L3 is aligned for zero differential output between terminals 4 and 5 at

T

30 0

1"-

fo= 45.750 MHz.

60 0 /
2

1---

TYP.

REFERENCE VOLTAGE PERCENTAGES
85% of V 10
25% of V 10

Ref. A
Ref. B

RCA Distributor Part No.
122213

80% of V 10
35% of V 10

Ref. C
Ref. D

122203

BLOCK DIAGRAM

10kSl·3W

....------'VVI,---

,-+140V

-

-

-

-

-

-

-

-

-

-

------,

I

I

~~------------~I~

I

~_--"-t-i~---\N'v~-..,---+-_I ~~~:;;'

21

I
:I~~~--i I---+-------=+-------f

IF AMP

71

I
6

L ______ _

_

_________ J

7-80

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 3064

PRINTED CIRCUIT BOARD FOR CORRECTION
VOLTAGE TEST CIRCUIT

(Full Size Bottom View)

I

TEST CIRCUIT 2
Regulated Voltage, Total Supply Current and
Quiescent Current at Terminal 2

+30V

7-81

3065
TV SOUND SYSTEM
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 3065 is a monolithic TV Sound System constructed using the
Fairchild Planar* epitaxial process. It contains a multi-stage limiting I F amplifier, dc gain (volume)
control, FM detector and an audio driver. Excellent sensitivity, high AM rejection and an internally
regulated supply, coupled with low external component requirements make the 3065 ideally suited
for TV sound channels.

•
•
•
•
•

DC VOLUME CONTROL ELIMINATES NEED FOR SHIELDED CABLES
EXCELLENT AM REJECTION - 50 dB TYPICAL AT 4.5 MHz
DIFFERENTIAL PEAK DETECTOR REQUIRES ONLY ONE SINGLE-TUNED COIL
INTERNAL ZENER DIODE REGULATED SUPPLY
LOW HARMONIC DISTORTION

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Internal Power Dissipation (Note 2)
Power Supply Current
Operating Temperature Range
Storage Temperature Range
Lead Temperature
Hermetic DIP (Soldering, 60 seconds) CA3064D
Molded DIP (Soldering, 10 seconds) CA3065E

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

IF INPUT BIAS
IF INPUT

Note 1
670mW
50 rnA
-40° C to +85° C
_55° C to +125° C

AUDIO INPUT
TONE CONTROL

GND

AUDIO OUTPUT

GND

NC

V+

QUAD DETECTOR

DC VOLUME
CONTROL

QUAD DETECTOR

DEEMPHASIS

DETECTOR
OUTPUT

ORDER INFORMATION
TYPE
PART NO.
3065
CA3065D
3065
CA3065E

NOTES
1. V + terminal may be connected to any positive voltage through a suitable dropping resistor,
provided the dissipation rating is not exceeded.
2.
Rating applies to ambient temperature up to 70°C. Derate linearly at 8.3 mW/oC above 70°C.

BLOCK DIAGRAM

DE-EMPHASIS

7

>-----+-0 DETECTOR
OUTPUT

I FIN PU T 0-"'2+-_-1
AUDIO
OUTPUT

IF
INPUT BIAS~+---I

9
GROUND

----10 ---4[--14 ---13

QUAD
DETECTOR

QUAD
DETECTOR

GROUND

AUDIO
INPUT

TONE
CONTROL

*Planar is a patented Fairchild process

7-82

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 3065
ELECTRICAL CHARACTERISTICS (T A = 25°C, 1+ = 30 rnA unless otherwise specified)

DC CHARACTERISTICS
Zener Regulating Voltage (V5)
Supply Current (15)
Internal Power Dissipation
Voltage at IF Input Bias (Vl)
Voltage at DC Volume Control (V6)
Voltage at De-emphasis (V7)
Voltage at Quad Detector (V9)
Voltage at Audio Output (V12)
AC CHARACTERISTICS
IF AMPLIFIER
Input Limiting Voltage at
-3 dB point

4.0

f= 4.5 MHz

12.2
24
400

5.8

V
rnA
mW
V
V
V
V
V

200

400

p,V

40

1

50

dB

500
45
<0.02

f = 1.0 MHz, Pin 2 to Pin 9
f = 4.5 MHz, Pin 1 to Pin 2

mmho
degrees
pF

17
4.0

kn
pF

3.25
75

kn
pF

f = 4.5 MHz, Pin 9 to Ground

(f o = 4.5 MHz, FM = ±25 kHz
at 400 Hz, VIN = 100 mV)

Recovered AF VoltaQe
Total Harmonic Distortion
Output Resistance
De emphasis Output
Detector Output
ATTENUATOR
Max. Attenuation
Max. Play-through Voltage*
• AUDIO AMPLIFIER
Voltage Gain
Total Harmonic Distortion
Undistorted Output Voltage
I nput Resistance
Output Resistance
IS

11.2
16
370
2.0
4.8
6.1
3.7
5.1'

1

fo = 4.5 MHz, FM ± 25 kHz
at 400 Hz, VIN = 100 p,V
AM = 30% at 1 kHz
f = 4.5 MHz

I F Transconductance
Magnitude
Phase Angle
Feedback Capacitance
Input Impedance Components
Parallel Input Resistance
Parallel Input Capacitance
Output Impedance Components
Parallel Output Resistance
Parallel Output Capacitance
DETECTOR

Play-through voltage

10.3
10
343

V+ = 9.0V
1+= 33 rnA

AM Rejection

*

UNITS

TEST CIRCUIT

CONDITIONS

PARAMETER

0.5

1
1

0.75
0.9

Vrms
%

2.0

kn

7.5
300
Rx
Rx

=
=

00
00

V14 = 0.1 Vrms, f = 400 Hz
V12 = 2 Vrms, f = 400 Hz
THD = 5%, f = 400 Hz
f= 400 Hz
f = 400 Hz

1
1

60

2
2
2

17.5

n

80
0.075

dB
mV

1.0

20
1.5
2.5
70
270

2.0

dB
%
Vrms
kn
n

the unwanted signal, measured at the detected output (Pin 8), when the volume control is set for minimum output.

TYPICAL PERFORMANCE CURVES FOR 3065

70

--r--.

60

50

40

20

.....

\

0.2

1.0
2.0
0.5
FREQUENCY - MHz

80

V

\
_TA"25C
1+'30mA
-TEST CIRCUIT 4

10

o

0.01

I
20

IIII I I
0.1

I
FREQUENCY - MHz

7-83

/

\

\
10

50

o

--

/

40

\

5.0

,;'

'\

10

TA "25°C
20 -VIN "100 ~v
I+- 30mA I
TEST CIRCUIT 3
10

0.1

"

60

30

o

100

25

\

AUDIO GAIN REDUCTION
VERSUS DC VOLUME
CONTROL RESISTANCE

FREQUENCY RESPONSE OF
AUDIO AMPLIFIER SECTION

FREQUENCY RESPONSE OF
IF AMPLIFIER SECTION

I
I

/

/
TA" 25°C
1+' 30mA
TEi

ClRiUli I

10
100
RESISTANCE FROM DC CONTROL TO GND - KQ

500

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 3065
TEST CIRCUITS

INPUT LIMITING VOLTAGE, AM REJECTION, RECOVERED
AUDIO, TOTAL HARMONIC DISTORTION, MAXIMUM ATTEN·
UATION, MAXIMUM "PLAY-THROUGH" TEST CIRCUIT.

AUDIO VOLTAGE GAIN
(UNDISTORTED OUTPUT)
Vee
30rrA;

DISTORTION
ANALYZER
(HEWLETTPACKARD
TYPE 330
OR
EQUIVALENT)

RS

*

0.05r-F

fL

UNIVERTER
(BOONTON
TYPE 207H
OR EQUIVALENT)
AM-FM GEN.
(BOONTON
TYPE 202H
OR EQUIVALENT)

0.47

IfLF

68pF

l

12

pF

DISTORTION
ANALYZER
(HEWLETTPACKARD
TYPE 330

EQUI~:LENT)
PINS 7,8,11,13 NO CONNECTION

PINS 11, 12, 13, 14 NO CONNECTION
*L I = 16IJ-H NOMINAL.
Q(UNLOADED) = 50

TEST CIRCUIT 1

TEST CI RCUIT 2

IF AMPLIFIER SECTION

AUDIO AMPLIFIER SECTION

EIN = 100IJ- Vrm s

EIN = 100 mV

TEST CIRCUIT 3

TEST CIRCUIT 4

TYPICAL APPLICATION

SUGGESTED CI RCUIT LAYOUT
COMPONENT SIDE

TV SOUND SYSTEM

TO B+
TO DC
VOLTAGE

CONTROL

*L I = 16IJ-H NOMINAL, Q(UNLOADED) = 50

7·84

3066
lV CHROMA PROCESSOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION
The 3066 is a monolithic integrated circuit using the Fairchild
Planar* epitaxial process.
It provides complete chroma processing except for tint control and
demodulation.

•
•
•
•
•
•

BLANKED CHROMA AMPLIFIER
CHROMA BAND PASS AMPLIFIER
DC CHROMA CONTROL
COLOR KILLER
ACC DETECTOR
CHROMA SUBCARRIER REGENERATION

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 68, 98

CHROMA INPUT
ACC DETECTOR
OUTPUT
BURST -CHROMA
BIAS
KILLER ADJUST
GND
ZENER SUPPLY

ABSOLUTE MAXIMUM RATINGS
Supply Current and Voltages (see chart)
Internal Power Dissipation (Note 1)
Operating Temperature Range
Storage Temperature
Lead Temperature
Hermetic DIP (Soldel'ing, 60 seconds) CA3066D
Molded DIP (Soldering, 10 seconds) CA3066E

CHROMA AMPL.
TUNING
CHROMA GAIN
CONTROL
CHROMA OUTPUT
BAND PASS AMPL.
TUNING
SUPPL Y
BURST SEPARATOR
OUTPUT

OSCILLATOR
INPUT

HORIZONTAL
KEY PULSE

OSCILLATOR
OUTPUT

ACC ADJUST

730mW

-40° C to +85° C
-55°C to +125°C

ORDER INFORMATION
TYPE
PART NO.
3066
CA3066D
3066
CA3066E

EQUIVALENT CIRCUIT
13

Notes on following page.

7-85

10 11

*Planar is a patented Fairchild process.

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 3066

MAXIMUM RATINGS
(with respect to Terminal No.5)
TERMINAL

SYMBOL

NO.

MIN.

MAX,

UNITS

20

mA

Note 3

V

18

V

liN (Note 2)
Voltage

10

-5.0

Voltage

11

0.0

Voltage

12

0.0

12

V

Voltage

15

0.0

Note 3

V

Voltage

16

0.0

15

V

Voltage

1

-5.0

5.0

V

6

NOTES 1. Rating applies to ambient temperature up to 70°C. Above 70°C derate linearly at 6.67 mW/oC.
2. Terminal No.6 is internally connected to a zener reference element, that, if used, should be biased by a positive voltage through
a resistor that limits the current to a value which is less than the maximum current rating of terminal No.6.
3. The upper voltage limit cannot exceed the power supply input voltage at pin 12.

ELECTRICAL CHARACTERISTICS (V12 = 11.2 V, T A = 25°C, Test Circuit Figure 1)
PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNITS

DC CHARACTERISTICS
ACC Reference

V2

0.5

V

Burst-Chroma Amp Bias Current Term

V3

2.9

V

Killer Reference

V4

V

1.0

V

Zener Regulator Reference

V6

Oscillator Input

V7

1.4

Oscillator Output

V8

2.35

V

Balance ACC Control

V9

1.65

V

Chroma Output

V14

Supply Current

15

10.6

11.9

12.6

V

V

4.6
14

24

33

mA

Burst Separator Output (S1 Closed)

111

6.5

mA

Band-Pass Amp. Output

113

4.8

mA

Chroma Amp Output

116

1.27

mA

1.2

V p _p

AC CHARACTERISTICS (Test Circuit Figure 2)
Oscillator Output
Chroma Output

V1

=

0

0.7

V8

2.5

V 1 = 1.25 V POp
100% : V1

=

1.25 V p _p

0.5

V14

V1i=1.25V p _p

V p _p

60

mV p _p

V p _p

1.0

Killed; V1 = 0.025 V

ACC Detector Output

3.5

V2

0.9

V

Small Signal I nput Resistance Pin 1

Ri

50

n.

Small Signal Input Capacitance Pin 1

Ci

2.4

pF

Small Signal Output Resistance Pin 14

Ro

250

n.

7-86

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 3066
TYPICAL PERFORMANCE CURVES
ACC AND KILLER REFERENCE
VOLTAGES, OSCILLATOR AND
CHROMA OUTPUTS AS A FUNC·
TION OF CHROMA INPUT
>~2.5

c. 175

TA = 25·C

I

2.0

~5
Z«

«..J

'-'u
~ 8
I

0.5

I

>~

t'~

«
::;;
o
~

V4

/ V

100

I

~ILL

0
1.0

1.5

2.0

2.5

~

I

\

6

«
::;;
~

is

\

25

0
1.1

1.2

1.3

p _p

~
SO

I-

\

50

1.0

i6'o~ ~5~~O~A IN'PUT! 1.25'V
~

I

I::::J

75

..J

i
Ii

'"

1\

>
C

Vl - CHROMA INPUT - V p _p

r100

o
..J

V2

0.5

120

\

~ 125

/
V

V14
1.0

150

~

I

w::;;

erO
~ ~ 1.5
er'-'
er c

~~
~ ~
~:5

~

TYPICAL ACC CHARACTER ISTIC
OF CHROMA OUTPUT AS A
FUNCTION OF CHROMA INPUT

T~ = 25·~

>6.

Vs

/'"

I-

~~

KILL THRESHOLD LEVEL OF
CHROMA INPUT AS A FUNCTION
OF KILLER REFERENCE

60

I
I

40

20

~
1.4

40

KILLER REFERENCE (SET AT NO SIGNAL INPUT) - V

SO

120

160

200

CHROMA INPUT - %

DC TEST CIRCUIT

3kn

Fig.
AC TEST CIRCUIT

B.2pF

>---+---+-{

I>--+---_-+--og~~~~:
1500

33pF

5.6k

100pF

TO+l1.2V

ALL RESISTANCE VALUES ARE IN OHMS
UNLESS OTHERWISE INDICATED.
ALL COILS HAVE A Q ;> 30.

DYNAMIC TEST PROCEDURE
Steps 1, 2, and 3 are performed with no Chroma input (V 1 = 0).
1.
2.
3.
4.
5.

Adjust ACC potentiometer for V2 = +0.65 V.
Adjust Killer Potentiometer for V 4 = +1.2 V.
Adjust capacitor Cx (crystal trimmer) so that frequency of oscillator is 3.579545 MHz.
Unless otherwise noted, the chroma gain control is at maximum gain (fully clockwise).
The chroma input test signal is a 52.5 /J.s "line" at subcarrier frequency, and 10 cycles of burst at 46.5% of the "Iine" amplitude. The
chroma input (V 1) is in peak-to-peak volts of "Iine" amplitude.
6. The chroma output (V 14) is the same as the chroma input (V 1) except that the burst is removed and keying overshoot occurs in the retrace
period. The chroma output is in peak-to-peak volts of "Iine" amplitude.
7. The oscillator output (Va) is the CW output at terminal No.8 and is in peak-to-peak volts.

Fig. 2

7-87

I

FAIRCHILD LINEAR INTEGRATED CIRCUITS • 3066
COMPLETE CHROMA PROCESSING SYSTEM
3066/3067

KILLER
ADJ.

CHROMA
GAIN CONTROL

TINT
CONTRDL

ACC
ADJ.

I-I

I

I

3.58
MHz
OSC.

I

I
I
I
I

OSCILLATOR
OUTPUT

-42..0

---

R-Y

I
I

15
G-Y

~
14

B-Y

I
1

_____________ J
7

HORIZONTAL
KEY PULSE

3066

3067

TYPICAL APPLICATION

Ll

10
01

T 1 (PRIM) = 24~H
(SEC)= 8~H

30~H

12

54

+11.2 V REG.

r-~~~~-1~-'-----'--~--~--~----~----------'-------~~~----~~~~-----------'T03007

5.6 k

3.9 k

56
pF

1.2 k

r---~r---~--------------------------~----~-;--.---------.g~~~~:
HO:~~~~:~~~~l~O~k~+---t-CH-R-O-M-A~---;----~-----+-----r-----r----~----'
GAIN
10 k
68 pF

20 k

CH~NOp~~~
0.01

~F

30

56k

01
~F

100~F

+-----______

-=

~~~~~--_4--_4--~----~~~------4__4--------~--~~----~----~-J~~~+30V

KILLER ADJUST

ALL RESISTANCE VALUES ARE IN OHMS.
ALL COILS HAVE A 00U 30

ACC ADJUST

o 1 ~F

*NOTE: If the 3066 or 3067 are to be separately removed from the circuit, the Zeners should be paralleled to avoid excessive voltage on the
remaining unit.

7-88

3067
CHROMA DEMODULATOR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The 3067 is a monolithic integrated circuit for TV chroma
demodulation. This device demodulates the chroma information contained in the color video signal
and provides the color difference output signals. The device also incorporates a dc tint control and an
internal R-C filter for eliminating high frequency components in the output signals.

•
•
•
•
•

BALANCED CHROMA DEMODULATORS
DC TINT CONTROL
COLOR DIFFERENCE MATRIX
INTERNAL RF FILTERING
REFERENCE SUBCARRIER LIMITER

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 68,98
3.58 MHz TINT
AMPLIFIER OUTPUT
TINT CONTROL
REFERENCE
SUBCARRIER INPUT
REGULATOR
REFERENCE
GROUND
(B·Y) DEMODULATOR
REFERENCE INPUT

ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Tint Amplifier Output Voltage
Internal Power Dissipation (Note 1)
Operating Temperature Range
Storage Temperature

12 V
15 V
730mW
0
0
_40 C to +85 C
0
0
_55 C to +1 25 C

Lead Temperature
Hermetic 01 P (Soldering, 60 seconds) CA3067D
Molded 01 P (Soldering, 10 seconds) CA3067E
Current into Regulator Reference Terminal

DECOUPLE
BIAS
CHROMA INPUT

v+
(R·Y) DEMODULATOR
REFERENCE INPUT
DECOUPLE

DECOUPLE

R·Y OUTPUT

B·Y OUTPUT

G·YOUTPUT

ORDER INFORMATION
TYPE
3067
3067

PART NO.
CA3067D
CA3067E

I

EQUIVALENT CIRCUIT

All resistor values are in ohms. All capacitor values, unless otherwise indicated, are in pF.
Notes on following pages.

7-89

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 3067

ELECTRICAL CHARACTERISTICS - T A = 25°C and V+ = 11.2 V
PARAMETER

LIMITS

CONDITIONS

SYMBOL

MIN.

TYP.

MAX.

UNITS

DC CHARACTERISTICS
Voltages
Tint Control Input

V2

Reference Subcarrier

V3

Regulator Reference

V4

12

= 0.25 mA

3.5
2.1
10.6

11.9

B-Y, R-Y Oscillator Reference Inputs

V6,V12

5.7

Balance (B-Y, R-Y)

V7, V11

5.0

B-Y, G-Y,.R-Y Outputs

4.2

V8, Vg, V10

Difference Outputs (Note 2)

~V8, ~Vg, ~V1O

Chroma Inputs
Tint Ampl.ifier Balance

5.0

-0.3

12.6
V
5.8
0.3

V14, V15

3.0

V16

4.7

Currents
Tint Amplifier Output (min)

l1(min)

Total Supply

11 + 113

V16

=8 V

0.16

0.37

15

24

33

mA

AC CHARACTERISTICS
Tint Amplifier Output
Sensitivity

160

V3 = 7 mVRMS

Limiting Knee

V1

Limiting

250
300

V3 = 35 mVRMS'

Tint Amplifier Phase Reference (Note 3)

cJ>6

Tint Amplifier Phase Shift (Note 4)

~cJ>6

mVRM S
380

V3 = 350 mVRMS
V3 = 70 mVRMS

185

220

V3 = 70 mVRMS

gO

105

235

Degree
Degree

Demodulated Chroma Output
R-Y

V10

Ratio of G-Y to R-Y

V9 1V 1O

Ratio of B-y to R-Y

V8/ V 1O
BW

Color Difference Output (3 dB Bandwidth)

V3 = 70 mVRMS
V 14 = 35 mVRMS

150

250

0.28

0.36

0.44

1.0

1.2

1.4

450

550

VRMS
kHz

Color Difference Outputs
(maximum input signals)
R-Y

V10

G-Y

Vg

B-Y

3.0

V3 = 70 mVRMS

1.1

V14 = 212 mVRMS

V8

V _
pp

3.6

Small Signal I nput Resistance
Terminal No.3

550

q

Terminal Nos. 6 and 12

2,200

Small Signal Output Resistance
Terminal Nos. 8, 9 and 10

5

ro

NOTES
1. Rating applies to ambient temperature of 70°C. From 70°C to 85°C derate linearily at 8.3 mW/oC.

V8+ V 9+ V 10
2.

AVS=V8-

~Vg =

3

3.

Terminal No.3 is phase reference.

4.

Read phase shift as tint control is varied.

Vg-

3

3

7-90

n

FAIRCHILD LINEAR INTEGRATED CIRCUIT • 3067

DC TEST CIRCUIT

~----------------.-----~--~/.~---------.
IT

+11.2 V

3067

8.2 k!2

+20 V

AC TEST CIRCUIT
25 k

TO

v+

10

56

r-.;.....--.!.---.JV..,.,.--....--'WIt----1r---..-------- +11.2 V

TINT
CONTROL

All resistance values are in ohms.
Unless otherwise indicated, all capacitance values less than 1.0 are in microfarads; 1.0 or greater are in picofarads.

AC TEST PROCEDURE
1.

2.
3.

4.

5.

The reference subcarrier input (3) is
a 3.58 MHz CW signal from a 50 n
source.
The chroma input (14) is a 3.53 MHz
CW signal from a 50
source.
Phase and amplitude at terminal Nos.
1, 3, 6, and 12 are measured with
vector voltmeter (HP8405A or equivalent).
Signals at terminal Nos. 8, 9 and 10
are measured with an ac voltmeter
(HP400E or equivalent) or an oscilloscope.
Unless otherwise noted the Tint
control is at maximum resistance.

REFERENCE
SUBCARRIER INPUT

~
.01

n

""'>....;,.;.~_o

I

R·Y OUTPUT

5k

I
. . . . . o G·y OUTPUT

>-......;;.~

5k

"">-...:...:.~-o B·Y OUTPUT

5k
L ___ _

11

-=-

CIRCUIT
GND

T·

REG.
REF.

01

BLOCK DIAGRAM

•

TYPICAL APPLICATION

+11.2 V REG.
TINT
CONTROL

560
1

6

12
TINT
25 k

R·Y
OUTPUT

56

14~4-------~--r-+---------4
15~4-------~~r-+---------+---~

6.8 k

5~1
1-

REFERENCE
SUBCARRIER ....._ _ _ _ _ _~~-------'

IN~~-------r------~-~r--i

L-__

4

47 pF

16

11

All resistance values are in ohms.
All capacitance values above 1.0 are in pF, below 1.0 ar.e in p,F.

7-91

3075
FM IF AMPLIFIER-LIMITER, DETECTOR, AUDIO PREAMPLIFIER
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL 'DESCRIPTION - The 3075 is a monolithic FM I F sub-system constructed using the
Fairchild Planar* epitaxial process. The system consists of a three stage limiting amplifier with a zener
diode regulated power supply, a differential peak detector stage and an internally biased audio
preamplifier stage.

CONNECTION DIAGRAM
14-LEAD DIP
(TOP VIEW)
PACKAGE OUTLINE 6A, 9A

The I F amplifier stage provides typically 60 dB gain at 10.7 MHz and is followed by a differential
limiting stage with constant current source to provide excellent limiting characteristics. The
differential peak detector circuit requires only one coil and thus provides easy tuning and minimum
external components.

IF INPUT BIAS

Applications include automotive and home FM receivers, mobile communications equipment, and
television sound channels.
•
•
•
•
•
•

AUDIO INPUT

IF INPUT

250p.V TYPICAL LIMITING SENSITIVITY AT 10.7MHz
125p.V TYPICAL LIMITING SENSITIVITY AT 4.5MHz
55dB TYPICAL AM REJECTION AT 4.5MHz
SINGLE COIL TUNING
DIFFERENTIAL PEAK DETECTION
INTERNAL ZENER DIODE REGULATION FOR IF SECTION

TONE CONTROL

GND

AUDIO OUTPUT

GND

NC

v+

QUAD DETECTOR

NC

QUAD DETECTOR
DETECTOR OUTPUT

DE·EMPHASIS

ABSOLUTE MAXIMUM RATINGS (Voltage at any terminal must not exceed V+)
+18V
Supply Voltage (Pin 5)
±3V
Input Voltage (between pins 1 and 2)
670mW
Power Dissipation (Note 1)
-40 o C to +85 0 C
Operating Temperature Range
-55 0 C to +125 0 C'
Storage Temperature Range
Lead Temperature
Hermetic DIP (Soldering 60 Seconds) CA3075D
Molded DIP (Soldering 10 Seconds) CA3075E

ORDER INFORMATION
TYPE
3075
3075

PART NO.
CA3075D
CA3075E

NOTE1: Rating applies to TA = 700C. Above 700C derate at 8.3mW/oC.

EQUIVALENT CIRCUIT
QUAD

DE·EMPHASIS

7

DETECTOR OUTPUT

DETECTOR

9

8

GND

10

I

GND

Rn
390

R6

390

IF INPUT BIAS

14
AUDIO

INPUT

R19
10k

13
TONE

-=

CONTROL

R20
150

12
AUDIO

OUTPUT

·Planar is a patented Fairchild process.

7-92

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 3075
3075

ELECTRICAL CHARACTERISTICS (TA

= 25OC,

V+

= +12V,

unless otherwise specified)

CONDITIONS

PARAMETERS

TYP.

MIN.

MAX.

UNITS

DC CHARACTERISTICS (Test Circuit 1)

= 8.5V
= 12V
V+ = 16V

Supply Current 15

V+

8.0

11

V+

12

17

28

rnA

25

35

rnA

rnA

340

Power Dissipation
Pin 7
Terminal Voltages

Pin 8
Pin 12

RL at Pin 12

= 3.9n

AC CHARACTERISTICS (IF Stage f

V

5.5

V
V

5.0

Change V+ from 10V to 16V

DC Shift Pin 8

-600

+600
250

0.5

Recovered Audio at Detector Output

600

0.7

40

= 4.5 MHz, Test Circuit

2.0

50

dB

125
1.0

Recovered Audio at Detector Output

400

1.4

40

AM Rejection

2.0

56

Input Resistance

40
10
VOUT

dB
kn

12
2.0

= 2 VRMS

17 _

V/V

4.0

%

Vp-p

8.4

Maximum Available Output Swing

•

BLOCK DIAGRAM

v+

,------

IF INPUT ....
IF INPUT ....
BIAS -

1
1
1
1
1
21
11
I

I

DE-EMPHASIS

5

7

-------------

REGULATED
POWER SUPPLY

------------l
I
I
I

I

BUFFER

1
Is
I

IF AMPLIFIER

AUDIO 6RIVER

~~

I

I

FM DETECTOR

I

~

I

1
1

L _____

%

kHz, Test Circuit 3)

Voltage Gain
THO at Detector Output

Jl.V
VRMS

1.5

THO at Detector Output

=1

%

2)

-3dB Limiting Sensitivity

AC CHARACTERISTICS (Audio Amplifier f

Jl.V
VRMS

1.0

THO at Detector Output
AM Rejection

I
I
I

mV

= 10.7 MHz, Test Circuit 2)

-3dB Limiting Sensitivity

AC CHARACTER ISTICS (I F Stage f

mW

6.0

1
1
I
112
I

1
1
I

_ ___ J

3- - - -

9

---- 10--14- - - 14 - - - - 13

C

)

GROUND

QUAD
DETECTOR

QUAD
DETECTOR

7-93

GROUND

AUDIO
INPUT

TONE
CONTROL

DETECTOR
OUTPUT

-'" AUDIO
OUTPUT

FAIRCHILD LINEAR INTEGRATED CIRCUITS. 3075
TEST CIRCUITS

17+

V7

V'3

O.Q1~FJ
13
14

12

V'4

V'2

V,,2
Va
10

Va, '0

TEST CIRCUIT 1

V+

FM GENERATOR
(BOONTON 202H
OR EQUIVALENT)

O.OI~F

I
IF CONVERTER/
AM MODULATOR
(MEASUREMENTS
275 OR
EQUIVALENT)

J

Io.ol~F

0.0 IIlF
51 Sl

----1

VOLTMETERI
DISTORTION
ANALYZER
(HP 333A OR
EQUIVALENT)

3075

r

10

AUDIO
OSCILLATOR
(HP 200CD OR
EQUIVALENT)

TUNED CIRCUIT COMPONENTS
fo
O.Q1~FI

FM = 4.5MHz ± 25kHz @ 400Hz; VIN = 10mVRMS
NO CONNECTION TO PINS 6,11,12,13,14
AM modulation = 30% @ 400 Hz
Select R1 for desired loaded a (aL).

TEST CI RCUIT 2

= 10.7MHz

C1

33pF

68pF

6.8pF

12pF

R1

"'" 33kn

L1

7#L H

16#L H

55

55

QL

OSC~~~~~OR

HO.471-"F_ _

I

..:.14~----I":"--..

(HP 200CD OR
EQUIVALENT)

----...
12

3075

3.9kSl
Il
I°.Q1 F

-= -=

IO.OlIlF

FM = 10.7MHz @400Hz, VIN = 10mVRMS
NO CONNECTION TO PINS 6, 7,8, 11, 13

TEST CI RCUIT 3

7-94

-=

= 4.5MHz

C2

V+

O.OI Il F

fo

VOLTMETER/
DISTORTION
(HP 333A OR
EQUIVALENT)

IJA704

IJA705

TELEVISION SOUND SYSTEM

DUAL CHANNEL AUDIO
POWER AM PLI FI ER

GENERAL DESCRIPTION - The }LA 704 is designed to perform the
entire sound function in a television receiver. It can also perform the
functions of the IF amplifier/limiter, detector, dc volume control,
audio amplifier and power output stages in a monophonic FM radio.
The ci rcuit provides an undistorted power output of 2.0W into a 160
or s.on load and 1.0W into a 4.0n load. It operates over a supply
voltage range of 10V to 30V while maintaining V+/2 output tracking
and 40dB ripple rejection. An electronic attenuator makes possible a
dc volume control with greater than SOdB range. The desired volume
control characteristic is achieved using an inexpensive linear potentiometer. A fixed audio output is provided for use with an ac volume
control or a video tape recorder. Other features are thermal overload
protection, ac short circuit protection at the power amplifier output,
and a low external component count.

GENERAL DESCRIPTION - The p.A705 is a Dual Audio Power
Amplifier capable of delivering 2.5W per channel into an sn load from
a supply voltage of lS Vdc. The device can be operated over a supply
range of 6.0V to 30V. The p.A705 requires a minimum of external
components; short circuit current limiting and thermal limiting are
incorporated on-chip for device protection. In addition, the device
incorporates an internal ripple filter for unregulated or minimally filtered power supplies without use of large electrolytic capacitors. A fast
charge circuit is included to eliminate undesirable pops in the speakers
caused by turn on transients.

•
•
•
•
•
•
•
•
•
•

•
•
•
•

GOOD LIMITING SENSITIVITY ••. 100p.V
DC VOLUME CONTROL
HIGH OUTPUT POWER ••• 2.0W WITH ±7.5kHz DEVIATION
GOOD AM REJECTION •.• 45dB TYPICAL
LOW DISTORTION
OPERATES FROM 10 TO 30V
THERMALSHUTDOWN
SHORT CIRCUIT PROTECTION
LOWEXTERNALCOMPONENTCOUNT
FIXED OUTPUT AVAILABLE FOR VTR APPLICATIONS

•
•

2.5W CONTINUOUS POWER/CHANNEL
TYPICALLY BOdB GAIN
LOW DISTORTION (TYPICALLY O.3"~)
FAST CHARGE CIRCUIT ELIMINATES TURN ON SPEAKER
POPS
SELF CENTERING BIASING WITH RIPPLE FILTER
SHORT CIRCUIT AND THERMAL PROTECTION

TYPICAL APPLICATION

BLOCK DIAGRAM

BIAS PIN

DC

i--

QUAD
INPUT

VOLUME

QUAD
BIAS

CONTROL

I
I
I
PQWERAMP
OUTPUT

IF INPUT

DECOUPLE

TO BIAS PIN

FIXED
AUDIO

OUTPUT

ATTEN
ATTEN POWER
DECOUPLE OUTPUT AMP

INPU:l~r:
DECOUPLE

7-96

B+

IJA7350

IJA7351

TACHOMETER SUBSYSTEM

TRIPLE
OPERATIONAL AMPLIFIER

GENERAL DESCRIPTION - The ,uA7350 includes a tachometer
circuit, as well as an operational amplifier and two comparators
constructed using the Fairchild Planar* epitaxial process. The tachometer produces fixed width pulses at the zero crossing of a ground
referenced ac input signal. Each pulse width is individually determined
by the choice of an external resistor and capacitor. The output stage of
the tachometer section is a common emitter NPN transistQr with an
uncommitted collector. The operational amplifier and comparators
are of identical design except that the comparators have no provision
for external compensation. Their output stages consist of Class A
PNP amplifiers with uncommitted collectors which allow variety of
loads for general purpose applications. I n addition, the outputs of the
comparators may be wired-OR for use as a dual level sensor.

GENERAL DESCRIPTION - The ,uA7351 consists of three identical
operational amplifiers constructed using the Fairchild Planar* epitaxial
process. Each two stage amplifier uses a Class A PNP common emitter
output stage with an uncommitted collector, which allows a variety of
loads for general purpose applications. In addition, the outputs of two
or more of the op amps may be wired-OR for use as logic blocks, such
as dual level comparators. The absence of latch-up makes them ideal
for use as voltage followers. Designed specifically to operate on a single
supply, the ,uA 7351 is an excellent choice for automotive systems and
other battery operated equipment requiring general purpose operational
amplifiers.

The entire device will function on a single as well as a dual supply
system.

•
•
•
•
•

SINGLE OR DUAL SUPPLY OPERATION
TACHOMETER, OPERATIONAL AMPLIFIER AND TWO
COMPARATORS ON ONE CHIP
SEPARATELY CONTROLLED PULSE WIDTHS AT POSITIVE
AND NEGATIVE ZERO CROSSINGS
UNCOMMITTED COLLECTOR OUTPUTS
SHORT-CIRCUIT PROTECTED

•
•
•
•
•

OPERATION ON SINGLE SUPPLIES +4.0 TO +16V OR DUAL
SUPPLI ES ±2.0 TO ±8.0V
LOW POWER CONSUMPTION
NO LATCH UP
SHORT CIRCUIT PROTECTED
VERSATILE OUTPUT STAGE GIVES WIRED-OR CAPABILITY
AND WIDE OUTPUT SWING
CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)

CONNECTION DIAGRAM
16-LEAD DIP
(TOP VIEW)

INVERTING
INPUT A
OUTPUT A

TACHOMETER
INPUT

NON-INVERTING
INPUT A

SWITCH T2

NON-INVERTING
INPUT B

OUTPUT C

NON-INVERTING
INPUT A

OUTPUT B

INVERTING
INPUT B

V-

INVERTING
INPUT A

COMPENSATION A

SWITCH Tl

TACHOMETER
OUTPUT

OUTPUT A

COMPENSATION A

V+

V+

OUTPUT B

NON-INVERTING
INPUT C

INVERTING
INPUT B

INVERTING
INPUT C

NON·INVERTING
INPUT B

V-

OUTPUT C

INVERTING
INPUT C
NON-INVERTING
INPUTC
COMPENSATION C

V+

N_C.

COMPENSATION B

*Planar is a patented Fairchild process

7-97

•

TBA510
CHROMA PROCESSING CIRCUIT

GENERAL DESCRIPTION - The TBA510 is a monolithic integrated circuit designed to perform the chrominance amplifier function for television
receivers. A dc chroma gain control, which can be ganged to the receiver contrast control, is provided. Also incorporated is a variable gain ACC stage,
chroma blanking, burst gating, burst output stage and PAL delay line driver.

•
•
•
•

DC CHROMA CONTROL
PAL DELAY LINE DRIVER
ACC AMPLI FIER
COLOR KILLER

BLOCK DIAGRAM (Showing TBA510 and p.A786 in Typical Application)
DC
LEVEL

12

----I

I

~A786

4

14

15

HORIZ.
PULSE

7·98

10

VERTICAL
PULSE

TBA920

TBA970

HORIZONTAL OSCILLATOR,
PHASE COMPARATOR
AND SYNC SEPARATOR

TELEVISION VI DEO AM PLI FI ER

GENERAL DESCRIPTION - The TBA920 is a monolithic integrated
circuit designed for TV receiver applications. It accepts the composite

GENERAL DESCRIPTION - The TBA970 is a monolithic integrated

video amplifier for television receivers. In addition to video amplification, it provides a dc contrast· control which can be ganged to the
chroma gain control, beam current limiting and black level control by a
clamped feedback circuit combined with the brightness controi.

video signal, separates sync pulses with the added safeguard of noise
gating and provides a sync output for the vertical integrator. Also
incorporated is the horizontal oscillator along with two phase comparators, one to compare flyback pulses to the oscillator and the other
for sync phase comparison. The device will interface with both SCR
and transistor deflection systems.

•
•
•
•

SYNC SEPARATOR
NOISE GATE
HORIZONTAL OSCILLATOR
DUALPHASECOMPARATOR

•
•
•
•

BLOCK DIAGRAM

DC CONTRAST CONTROL
DC BRIGHTNESS CONTROL
BLACK LEVEL CLAMPING
BEAM CURRENT LIMITING

BLOCK DIAGRAM

COMPOSITE

VIDEO

HOLD CONTROL

7-99

•

1326

CHROMA DEMODULATOR

GENERAL DESCRIPTION - The 1326 is a color television Chroma Demodulator constructed on a monolithic chip using the Fairchild Planar*
process. The device demodulates the chroma subcarrier information contained in an NTSC color television video signal and can provide either color
difference or RGB signals at the outputs. The low voltage drift of the dc output ensures excellent performance in direct coupled output circuitry.

•
•
•
•
•

LUMINANCE AND BLANKING INPUTS
COLOR DI FFERENCE OR RGS OUTPUTS
HIGH OUTPUT VOLTAGE SWING
LOW OUTPUT VOLTAGE DRIFT WITH TEMPERATURE
ON-CHIP FILTERING OF OUTPUT RF COMPONENTS

EQUIVALENT CIRCUIT
B·Y REFERENCE

REFERENCE
DECOUPLE

R-Y REFERENCE

12

13

r-;----------+----;---~--------+_--~~------------~~~------_+----------_.--~~v+
1k

LUMINANCE
INPUT

GROUND

10
B·YCHROMA
INPUT

CHROMA
DECOUPLE

R-YCHROMA
INPUT

·Planar is a patented Fairchild process

7-100

2136

3076

FM IF AMPLIFIER
AN D DETECTOR

FM GAIN BLOCK

GENERAL DESCRIPTION - The 2136 FM sound system consists of a
limiting IF amplifier and doubly balanced quadrature detector. Excellent sensitivity, good AM rejection and an internally regulated power
supply coupled with low external component count make the 2136
suitaole for many FM applications.

GENERAL DESCRIPTION - The 3076 is a monolithic high gain
wideband IF amplifier-limiter constructed using the Fairchild Planar*
epitaxial process. The device provides a four stage I F amplifier-limiter
with its own voltage regulator section. The four stage amplifier is
emitter coupled between stages and typically provides 80 dB of
voltage gain, with a 2 kn load at 10.7 MHz. Excellent limiting in the
differential output stage is provided by the use of a constant current
sink. The regulator section uses a zener diode to provide regulated and
decoupled voltages to the amplifier.

•
•
•
•
•

300ILV LIMITING SENSITIVITY
40dB AM REJECTION
SINGLE TUNING COIL
EXCELLENT REGULATION
LOW DISTORTION

•
•
•
•

BLOCK DIAGRAM

IF

SOILV TYPICAL LIMITING SENSITIVITY AT 10.7MHz
SOdB GAIN WITH 2kn LOAD
INTERNAL ZENER DIODE SUPPLY REGULATION
BANDWIDTH 20MHz

•

TYPICAL APPLICATION

DET

OUT

IN

10

2

12

HIGH

IF
IN

1

0.°1°.01
jJF

pF

DE-EMPHASIS

*Planar is a patented Fairchild process

7-101

GLOSSARY
CONSUMER

AM Rejection - The ratio of the recovered audio output
produced by a desired FM signal with specified modulation,
amplitude and frequency to that produced by an AM signal,
on the same carrier, with specified modulation index.
Burst Separator Output - The amplitude of the chroma
reference burst at the output of the gated burst amplifier.
Channel Balance, Monaural Input - The ratio of the outputs
from the right and left channels with a monaural signal applied
to the input.
Common Mode Gain - The ratio of the output voltage change
to the input common mode voltage producing that change.

Frequency Response - The frequency at which the output
drops to 0.707 of its low frequency value.
I F Transconductance - The ratio of the output ac IF current
to the input signal voltage.
Input Admittance (Y11) - The ratio of the small signal ac
input current to the input voltage causing it, with the output
short circuited.
'
Input Limiting Voltage at -3.0 dB Point - See Limiting
Sensitivity.
Input Offset Current - The difference in current into the two
input terminals with the output voltage at zero.

Converter Transconductance - The ratio of the converter
output ac current to the input voltage causing it.

Input Voltage for -3.0 dB Limiting at Output - See Limiting
Sensitivity.

Differential Output Resistance between the two output terminals.

The resistance measured

Input Voltage Range - The range of input voltage over which
the device will operate within specifications.

Differential Output Voltage Swing - The peak differential
output voltage that can be obtained without clipping the
output voltage waveform.

Intermodulation Products - Undesired output signals created
by interaction of undesired input signals.

Equivalent Input Noise Voltage - The equivalent input noise
voltage which would reproduce the noise seen at the output if
all other noise sources were turned off and the source
resistance set to zero.
Feedback Capacitance - The effective value of the capacitive
coupling from output to input.
Forward Transadmittance - The ratio of the small signal ac
short-circuit output current to the input voltage causing it.
Forward Transfer
Transadm ittance.

Admittance,

(Y21)

-

See

Forward

Internal Power Dissipation - The power dissipated by the
device under specified conditions.
Killer Off Threshold - The voltage required at the color killer
terminal to restore the chroma output.
Killer On Threshold - The voltage required at the color killer
terminal to kill the chroma output.
Limiting Sensitivity - The value of input voltage above which
the output is 3.0 dB below its limited value.
Maximum Available Output Swing - The maximum available
output voltage, without clipping of the output voltage
waveform.
, 7 -102

Noise Figure - The common logarithm of the ratio of the
input signal to noise ratio to the output signal to noise ratio.

signal ac input current to the ac output voltage, with the input
short-circuited.

Oscillator Control Sensitivity - The ratio of the change in
oscillator frequency to the change in control voltage causing it.

RF Noise Voltage - The equivalent input noise voltage of the
RF Stage.

Oscillator Pull-In Range - The range of free-running frequency
over which the oscillator will lock to the incoming signal.

R F Transconductance - The ratio of the R F output current to
the R F input voltage.

Oscillator Static Phase Error - The phase difference between
the oscillator output and the incoming frequency to which it
is locked.

Short-Circuit Load Current - The maximum output current
which the device will provide into a short-circuit.

Output Admittance (Y22) - The ratio of the small signal ac
output current to the ac output voltage with the input
short-circuited.

Stereo Separation - The ratio of the right and left channel
outputs for a standard input signal with specified audio
frequency.

Output Common Mode Voltage - The average of the voltages
at the output terminals.

Supply Regulation - The change in internal device supply
voltage for a specified change in external power supply
voltage.

Output Conductance admittance.

The resistive value of the output

Supply Rejection - The ratio of the change in a specified
circuit voltage to the change in supply voltage causing it.

Output Saturation Voltage - The dc voltage between output
and ground in the saturated condition.

Temperature Coefficient of dc Voltage - The change in dc
voltage over the operating temperature range divided by the
operating temperature range.

Play-Through Voltage - The signal voltage measured at the
output with the volume control set for minimum output.

THO - See Total Harmonic 'Distortion.

Power Supply Sensitivity - The ratio of the change in a
specified parameter to the change in power supply voltage
causing it.

Total Harmonic Distortion - The rms value of the harmonic
content of a signal expressed as a percentage of the rms value
of its fundamental.

Quiescent Output Current - The output current with no signal
applied at the input.

Voltage Gain - The ratio of the output signal voltage to the
input signal voltage under linear conditions.

Recovered Audio - The value of the audio voltage measured
at the detector output under the specified circuit conditions.

67 kHz Storecast Rejection - The ratio of the 67 kHz SCA
signal at the output to the desired output with the standard
FCC signal input.

Reverse Transfer Admittance (Y12) - The ratio of the small
7-103

•

CONSUMER LINEAR INTEGRATED CIRCUITS OPTIONAL PACKAGE OUTLINES

(H) 5A

(D) 7F

JEDEC (TO-100) With Formed Leads

14-Lead Hermetic Quad In-Line

NOTES
All dimensions in inches
Leads are gold plated kovar
Package weight is 1.22 gram
This is a 5E package with the leads formed

NOTES
Package weight is 2.0 grams
This is a 6A package with the leads formed

(D) 7H

16-Lead Hermetic Quad In-Line

14-Lead Molded Quad In-Line

(P) 9C

I-

.785-----j
1--.75°,('1"r11

r-------.760----J
111(l11.740
I

r~I:'--'025RNOM'
L9

.
r~045
L
Ilrll1

:~:g

245

R :035

8

16

..j ~:~;

14

.065
.045

:~~

L.oso
.070

NOTES
Package weight is 2.0 grams
*The .037/.027 demension does not apply to the corner leads
This is a 6B package with the leads formed

Package weight is 0.9 grams
This is a 9A package with the leads formed

(P) 90

16-Lead Molded Quad In-Line

r------

NOTES

--------j

iQl'045

=

.760

In r"l,..., 1.740, ('1,..., r11

.240

L9

__

-j

16

GENERAL NOTES FOR (D)7F. (D)7H. (P)9C. AND (P)9D

_R

All dimensions in inches
Leads are intended for insertion in hole rows on .300" centers
They are purposely shipped with "positive" misalignment to facilitate insertion
Board-drilling dimensions should equal your practice for .020 inch diameter lead
Leads are tin-plated kovar

.085
.075

..j I--~;

~'" ~
~MAX'~O
.325------.1.020

s:t;~":

:t
iii-l---l •..:al& 1j;J t;::
~I'

'" '" '" " .., .. "I' -t

NOM. 200

".

~

.016

i

L:::-" -1-:"

1---.420----1 .009

,

380

'

NOTES
Package weight is 0.9 grams
*The .037/.027 dimension does not apply to the corner leads
This is a 9B package with the leads formed

7-104

INDEX
Transistor/diode array and analog switches data sheets are presented
in alphanumeric sequence.
DATA SHEETS

J-IA726
3018
3018A
3019
3026
3036
3039
3045
3046
3054
3086
SH3002

Temperature - Controlled Differential Pair ........ 8-3
Transistor Array ............................... 8-6
Transistor Array ............................... 8-6
Diode Array ................................... 8-6
Transistor Array ............................... 8-6
Transistor Array ............................... 8-6
Diode Array ................................... 8-6
Transistor Array ............................... 8-6
Transistor Array ............................... 8-6
Transistor Array ............................... 8-6
Transistor Array ............................... 8-6
SPOT Analog Switch .......................... 8-22

Glossary ................................................... 8-25

8-2

IJA726
TEMPERATURE-CONTROLLED DIFFERENTIAL PAIR
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - The JJ.A726 is a Monolithic Transistor Pair in a high thermal-resistance
package, held at a constant temperature by active temperature regulator circuitry. The transistor pair
displays the excellent matching, close thermal coupling and fast thermal response inherent in
monolithic construction. The high gain and low standby dissipation of the regulator circuit permits
tight temperature control over a wide range of ambient temperatures. It is intended for use as an
input stage in very-low-drift dc amplifiers, replacing complex chopper-stabilized amplifiers. It is also
useful as the nonlinear element in logarithmic amplifiers and multipliers where the highly predictable
exponential relation between emitter-base voltage and collector current is employed. The device is
constructed on a single silicon chip using the Fairchild Planar* process.
ABSOLUTE MAXIMUM RATINGS
Operating Temperature Range
Military (726)
Commercial (726C)
Storage Temperature Range
Lead Temperature (Soldering, 60 seconds)
Supply Voltage
Internal Power Dissipation

CONNECTION DIAGRAM
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE SU

-SSOC to +12SoC
O°C to +8SoC
-6SoC to +150°C
300°C
±laV
SOOmW

MAXIMUM RATINGS FOR EACH TRANSISTOR
Collector-to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
Collector-to-Substrate Voltage, VCIO
Emitter-to-Base Voltage, VEBO
Collector Current, IC

30V
40V
40V
SV
5mA

ORDER INFORMATION
TYPE
PART NO.
726HM
726
726HC
726C

EQUIVALENT CIRCUIT
__

~---1~-------oV+

8
TEMP AOJ

6

21kO

1

c
81

:3
2

C23
El

82

01
6.2V

Ql

3

1

E2

10

lko

R3

02

4.8kO

6.2V

R5
Q2

100

L-____________~~----~~----------------~--~V5.

·Planar is a patented Fairchild process.

8-3

•

FAIRCHILD LINEAR INTEGRATED CIRCUITS- J.LA726
726
ELECTRICAL CHARACTERISTICS (-ssOc.;;;;; TA';;;;; +12SoC, Vs
PARAMETER
Input Offset Voltage
I nput Offset Current
Average Input Bias Current
Offset Voltage Change
Input Offset Voltage Drift
Input Offset Voltage Drift

= ±lSV,

Radj

= 62kn unless otherwise specified)

CONDITIONS

MIN.

TYP.

MAX.

UNITS

10J,tA';;;;; IC';;;;; 100J,tA, VCE

1.0

2.S

mV

IC

10

so

nA

SO

200

nA

SO

lS0

nA

2S0

SOO

nA

0.3

6.0

mV

0.3

6.0

mV

0.2

1.0

J,tv/oc

0.2

1.0

J,tv/oc

= SV, RS';;;;; son
= 10J,tA, VCE = SV
IC = 100J,tA, VCE = SV
Ic = 10J,tA, VCE = SV
IC = 100J,tA, VCE = SV
Ic = 10J,tA, SV .;;;;; VCE .;;;;; 2SV, RS .;;;;; 100kn
IC = 100J,tA, SV .;;;;; VCE .;;;;; 2SV, RS .;;;;; 10kn
10J,tA';;;;; IC .;;;;; 100J,tA, VCE = SV,
RS';;;;; son, +2SoC';;;;; TA .;;;;; +12SoC
10J,tA';;;;; IC .;;;;; 100J,tA, VeE = SV,
RS';;;;; son, -Ssoc ';;;;;TA .;;;;; +2SoC
IC = 10J,tA, VCE = SV

10

pA/oC

IC = 100J,tA, VCE ;:: SV

30

pA/oC

Supply Voltage Rejection Ratio

10J,tA';;;;; Ie';;;;; 100J,tA, RS,.g; son,

2S

J,tV/V

Low Frequency Noise

IC = 10J,tA, VCE = SV, RS';;;;; son
BW = .001 Hz to 0.1 Hz

4.0

J,tV pop

Broadband Noise

IC = 10J,tA, VCE = SV, RS';;;;; son
BW = 0.1 Hz to 10kHz

10

J,tV POp

S.O

J,tV/week

I nput Offset Current Drift

= 2SoC

Long-term Drift

10,uA';;;;; IC';;;;; 100J,tA, VeE = SV, RS';;;;; son, TA

High Frequency Current Gain

f = 20MHz, Ie = 100J,tA, VCE = SV

Output Capacitance

IE = 0, VCB = SV

1.0

Emitter Transition Capacitance

IE = 100J,tA

1.0

Collector Saturation Voltage

IB = 100J,tA, IC = 1 mA

O.S

1.0

TYP.

MAX.

UNITS

1.S

3.S
pF
pF
V·

726C
ELECTRICAL CHARACTERISTICS (O°C';;;;; T A';;;;; +8SoC, Vs = ±lSV, Radj = 7Skn unless otherwise specified)

Input Offset Voltage
I nput Offset Current
Average I nput Bias Current
Offset Voltage Change
Input Offset Voltage Drift

MIN.

CONDITIONS

PARAMETER

10J,tA';;;;; IC .;;;;; 100J,tA, VCE = SV, RS .;;;;; son

1.0

3.0

mV

IC = 10J,tA, VCE = SV

10

100

nA

IC = 100J,tA, VCE = SV

SO

400

nA

Ic = 10J,tA, VCE = SV

SO

300

nA

IC = 100J,tA, VCE = SV

2S0

1000

nA

Ic = 10J,tA, SV .;;;;; VCE .;;;;; 2SV, RS .;;;;; 100kn

0.3

6.0

mV

IC = 100J,tA, SV.;;;;; VCE .;;;;; 2SV, RS';;;;; 10kn

0.3

6.0

mV

IC = 100J,tA, VCE = SV, RS';;;;; son

0.2

2.0

J,tV/oc

,

IC = 10J,tA, VCE = SV

10

pA/oC

IC = 100J,tA, VCE = SV

30

pA/oC

Supply Voltage Rejection Ratio

IC = 100J,tA, RS = son

2S

J,tV/V

Low Frequency Noise

IC = 10J,tA, VCE = SV, RS';;;;; son,
BW = 0.001 Hz to 0.1 Hz

4.0

J,tV POp

Broadband Noise

IC = 10J,tA, VCE = SV, RS';;;;; son,
BW = 0.1 Hz to 10kHz

10

J,tV POp

S.O

J,tV/wee k

I nput Offset Current Drift

= 2SOC

Long-Term Drift

IC = 100J,tA, VCE = SV, RS';;;;; 50n, T A

High Frequency Current Gain

f = 20MHz, IC = 100J,tA, VCE'= SV

Output Capacitance

IE=O,VCB=SV

1.0

Emitter Transition Capacitance

IE = 100J,tA

1.0

Collector Saturation Voltage

IB = 100J,tA, IC = 1 mA

O.S

3;.4

1.S

•••

3.S
pF
pF
1.0

V

FAIRCHILD LINEAR INTEGRATED CIRCUITS. JlA726
TYPICAL PERFORMANCE CURVES FOR 726

CURRENT GAIN AS A FUNCTION
OF COLLECTOR CURRENT

SUPPLY CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE

1000

20

I

I--+--+--+--+--+--+- Vs • :!:ISV

I--

Radj ' 62kQ

16 1--+----+-----1---1----+-----+----+---+--+---1
cc
E

12

i '" f'..- ,
~
8

.......

i;!

4

i'.
.........

o~~~~~~u-~~~~
I~
I~A
IrnA
lOrnA

0

-60

~

f'.-

-20

20
60
TEMPERATURE - °c

COLLECTOR CURRENT

100

140

TYPICAL PERFORMANCE CURVES FOR 726C
CURRENT GAIN AS A FUNCTION
OF COLLECTOR CURRENT

SUPPLY CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
10

1000 r--"'T"""T"'T'"r---r---,--,-,.-r--r--r--"'1rr-r----,

V~E • s~o J I

I--+--+-++---+--+-+-++- Vs • ±is V
800

Radj • 7SkQ

I--+..-+..-+----+----+---_+_ Vs • ± IS V

t__
t__

I--

Radj • 7SkQ

1--+-+-++-+-+-+-++ o°c ~ TA ~ 8SOC t-~t__+-+++_+-+-+-++~~~,~H+~

~~~~~~-I-H+~_HHI\~
./

~~~~~-I~~~~-I.O~rnA~~~lOrnA

20

COLLECTOR CURRENT

40
60
TEMPERATURE - °c

80

100

TYPICAL X100 AMPLIFIER CIRCUIT

I

IN~~7A
~~--R-a-dJ~. ~ ~I~~A~~--~
+l5V

75kQ

25kO

+l5V
25kO

~ ::~1>~f/I£::.....---R-l--4--"I31"~
*
R2

';0

21

~

7

a 4 C2

200pF
-15V

-15V
75kO
R7

Cl

1.5ko

5nFL Ra

Qlr4qlB 2N2060
-15V

,

.

50ko
ALL RESISTORS 1 %

8-5

500
Rg

Eout

3018-3018A-3019-3026-3036
3039-3045 -3046 -3054-3086
TRANSISTOR AND DIODE ARRAYS
FAIRCHILD LINEAR INTEGRATED CIRCUITS

GENERAL DESCRIPTION - Fairchild Transistor and Diode Arrays consist of general purpose integrated circuit devices constructed
on a single substrate, using the Fairchild Planar* epitaxial process. These arrays are arranged to offer maximum flexibility in circuit
design for applications from dc to 120 MHz. Excellent transistor and diode matching and temperature tracking allow circuit
techniques unavailable when using discrete devices. Multiple devices in one package permit a greater packing density and cost saving
than with individually packaged transistors.
•
•
•

PRECISION MONOLITHIC MATCHING
DESIGN FLEXIBILITY
CUSTOM APPLICATIONS
PACKAGE OUTLINE 5G
11

PACKAGE OUTLINE 5E

PACKAGE OUTLINE 6A
2

12

1

5

4

3
9:1rL
°4
2

1

:4' of:
0

2

1

10

7
10
4
SUBSTRATE

6

7

9

10

12

13
SUBSTRATE

ORDER INFORMATION
PART NO.
TYPE
CA3018/CA3018A
3018/3018A

ORDER INFORMATION
TYPE
PART NO.
CA3045/3046/3086
3045/3046/3086

ORDER INFORMATION
TYPE
PART NO.
3036
CA3036

PACKAGE OUTLINE 6A

PACKAGE OUTLINE 5G
12

11

14

10

13

11

SUBSTRATE

o
5

ORDER INFORMATION
PART NO.
TYPE
CA3026
3026

12

ORDER INFORMATION
TYPE
PART NO.
CA3054
3054
PACKAGE OUTLINE 5G

PACKAGE OUTLINE 5E
3

4

5

6

7

8

~~~
r#o;,~rWl

b 'b b ' -b 6- W~
.hl'~~9·
1

2

11

12

10

SUBSTRATE
AND CASE

ORDER INFORMATION
TYPE
PART NO.
3019
CA3019

ORDER INFORMATION
TYPE
PART NO.
CA3039
3039
"'Planar is a patented Fairchild process.

8-6

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3018/3018A
•

MATCHED MONOLITHIC GENERAL PURPOSE TRANSISTORS

•
•
•
•
•
•
•

hFE MATCHED ±10%
VBE MATCHED ±2 mV 3018A (±5 mV 3018)
OPERATION FROM DC TO 120 MHz
WIDE OPERATING CURRENT RANGE
3018A PERFORMANCE CHARACTERISTICS CONTROLLED FROM 10.~A TO 10 mA
LOW NOISE FIGURE - 3.2 dB TYPICAL AT 1 kHz
FULL MILITARY TEMPERATURE RANGE CAPABILITY (-55 TO +125°C)

APPLICATIONS
• General Use in Signal Processing Systems in dc Through VHF
Range
• Custom Designed Differential Ampl ifiers
• Temperature Compensated Amplifiers
ABSOLUTE MAXIMUM RATINGS
Power Dissipation (Note 1)
Any One Transistor
Total Package
Temperature Range
Operating Temperature
Storage Temperature

3018
300mW
450mW

,.3018A
300mW
450mW

_55° C to +125° C
_65° C to +200° C

-55°C to +125°C
_65° C to +200° C

15 V
20V
20V
5V
50mA

15 V
30V
.40V
5V
50mA

The following ratings apply for each transistor in the device:
Collector-to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
Collector-to-Substrate Voltage, VCIO (Note 2)
Emitter-to-Base Voltage, VEBO
Collector Current, IC

ELECTRICAL CHARACTERISTICS FOR 3018/3018A (T A = 25°C unless otherwise specified)
PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

MIN.

TYP.

MAX

UNITS

3018A

3018
Collector Cutoff Current

ICBO

VCB=10V,IE=0

-

0.002

100

-

0.002

40

nA

Collector Cutoff Current

ICEO

VCE=10V,IB=0

-

See Curve

5

-

See Curve

0.5

ILA

Collector Cutoff Current Darlington Pair

ICEOD

VCE=10V,IB=0

-

-

-

-

-

5

ILA

Collector-to-Emitter Breakdown Voltage

V(BR)CEO

IC = 1 mA, I B =

a

15

24

-

15

24

-

V

Collector-to-Base Breakdown Voltage

V(BR)CBO

IC=10ILA ,IE=0

20

60

-

30

60

-

V

Emitter-to-Base Breakdown Voltage

V(BR)EBO

IE=10IL A ,IC=0

5

7

-

5

7

-

V

Collector-to-Substrate Breakdown Voltage

V(BR)CIO

IC=10IL A ,ICI=0

20

60

-

40

60

-

V

Collector-to-Emitter Saturation Voltage

VCES

I B = 1 mA, I C = 10 mA

-

0.23

-

-

0.23

0.5

V

-

hFE

VCE=3V,

-

50
60
30

100
100
54

-

-

-

100
100
54

-

Static Forward Current Transfer Ratio

0.9

0.97

-

0.9

0.97

-

-

2000
1000

5400
2800

-

-

Magnitude of Static-Beta Ratio
(Isolated Transistors Q1 and Q2)

{'e

= 10mA
IC= 1 mA
IC= 10ILA

VCE = 3 V, IC1 = IC2 = 1 mA

30

-

Static Forward Current Transfer Ratio
Darlington Pair (Q3 & ~)

hFED

VCE = 3 V

{IC = 1 mA
IC=1001LA

1500

5400

-

-

-

-

Base-to-Emitter Voltage

VBE

VCE = 3 V

{IE = 1 mA
IE = 10 mA

-

0.715
0.800

-

0.600

-

0.715
0.800

0.800
0.900

V

VBE1

VCE=3V,IE=1mA

-

0.48

5

-

0.48

2

mV

V CE = 3 V, IE = 1 mA

-

-1.9

-

-

-1.9

-

mVrC

-

1.46
1.32

-

-

-

1.46
1.32

1.60
1.50

V

VCE=3V,IE=1mA

-

4.4

-

-

4.4

-

mVrC

VCC = +6 V, VEE = -6 V,

-

10

-

-

10

-

ILV/oC

Input Offset Voltage

IVBE2'1

Temperature Coefficient: Base-toEmitter Voltage Q1 ' Q2

I~VBEI

Base (Q3)-to-Emitter (~)
Voltage-Darlington Pair

VBED
(V9-1)

Temperature Coefficient:
Base-to-Emitter Voltage
Darlington Pair-Q3,~

I~VBEDI

Temperature Coefficient:
Magnitude of Input-Offset Voltage

IVBE,-VBE21

~T

~T

VCE = 3 V

{IE = 10 mA
IE = 1 mA

~T

NOTES
1. Derate at 5 mW/o C for T A
85°
2. Substrate must be connected to the most negative voltage to maintain normal operation.

>

C.

8-7

-

1.10

•

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
ELECTRICAL CHARACTERISTICS FOR 3018/3018A (T A = 2SoC unless otherwise specified)
CONDITIONS

PARAMETER

TYP.

MAX.

UNITS

-

3.2S.

-

dB

110

-

kn

f = 1 kHz, VCE = 3 V, IC =.100 J.tA

NF

Low Frequency Noise Figure

MIN.

= 1 kn

Source resistance

Low Frequency, Small-Signal Equivalent Circuit Characteristics:

Short Circuit Input Resistance

hie

Open Circuit Output Conductance

hoe
hre

-

Yfe

Output Admittance

Yie
Y oe

Reverse Transfer Admittance

Y re

Forward Current-Transfer Ratio

hfe

Open Circuit Reverse Voltage.Transfer Ratio

f = 1 kHz, VCE = 3 V, IC = 1 rnA

3.S
1S.6

-

J.tmho

1.8x10-4

-

-

-

31-j 1.S
0.3+j 0.04

-

O.OO1+j 0.03

-

mmho

-

Admittance Characteristics:
Forward Transfer Admittance
I nput Admittance

f = 1 MHz, VCE = 3 V, Ic = 1 rnA

rnmho
mmho
mmho

See Curve
SOO

-

MHz

-

0.6

-

pF

=0

-

0.S8

-

pF

VCI =3V, IC=O

-

2.8

-

pF

Gain-Bandwidth Product

fT

VCE = 3 V, IC = 3 mA

Emitter-to-Base Capacitance

Ceb

VEB = 3 V, IE = 0

Collector-to-Base Capacitance

Ccb

VCB = 3 V, IC

Collector-to-Substrate Capacitance

CCI

300

TYPICAL PERFORMANCE CURVES FOR 3018/3018A

COLLECTOR-TO-BASE CUTOFF
CURRENT ASA FUNCTION OF
AMBIENT TEMPERATURE FOR
EACH TRANSISTOR

COLLECTOR-TO-EMITTER CUTOFF
CURRENT AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR EACH TRANSISTOR

50

50
=,E"O

1

V CB "15V
10V~

f:=

1

.'

h

'B= 0

5.10-1

~V-

-

f--

VCE"

5.10-2

/U

,,~

~~

;;..-:

1//
5.10- 1

~~

5.10-2

;1

1--1

60

100

75

10,000

'"

9000

25

I--

8000

~
I

i

7000
6000

"0:
~

4000

u

3000

~

~

5000

~V'

./'"

/'"

-

:......

"

0.8

::
~

o.

r:

........V

~I

I

7

0.6

....

1--"

o

0.1

0.5

-t

0.2

0.5
IE - EMITTER CURRENT - rnA

10

20

....

0.4
0.01 0.02

....V

...........

I I
0.05 0.1

-

3

=IV SE1

0.5

i
o

I--

1

::>

z
I

:g

o >
1

2

IE - EMITTER CURRENT - rnA

8-8

2

- VSE2'

II
0.2

to
«

~>

I

II U

II

"«z
o

,/

1
I

INPUT OFFSET VOLTAGE

W
1000

d'
V SE....

I

2000

E

o
>
0:

I

I

~

~
~

0.9

/

0.8

O.OS 0.1

0.2

0.5

1

10

S

STATIC INPUT VOLTAGE FOR
DARLINGTON PAIR 03,04 AS A
FUNCTION OF EMITTER CURRENT
1.7

>

=3 V
TA = 25 C
VCE

I

I~IOR
~I r-hFEl
hFE2

IE - EMITTER CURRENT - rnA

'c

0.9

>

1.0

/L

1/

0.01 0.02

125

100

75

50

TA - AMBIENT TEMPERATURE -

VCE =3 V
TA--;-25'C

V

SO

125

'c

STATIC BASE-TO-EMITTER VOLTAGE
STATIC FORWARD CURRENTAND INPUT OFFSET VOLTAGE FOR
TRANSFER RATIO FOR DARLINGTON
01,02 AS A FUNCTION OF
CONNECTED TRANSISTORS 03,04 AS A
FUNCTION OF EMITTER CURRENT
EMITTER CURRENT
z

70

5.10-3

/

,

"'\

V

"'I--

L~

'"/

... '

80

r'
50

25

TA - AMBIENT TEMPERATURE -

0:

90

~~
U«

.//

l
5.10-4

~i-"

o:W

'/

5.,0-3

"

0

5V

/

'h

.....

°'Z
'

~~

100

50

/,
'/

/,1

~

VCE = 3 V
TA = 25'C

'L
/

r/,

110

5.10 2

5.102

'/
/,'f

STATIC FORWARD CURRENTTRANSFER AND BETA RATIO FOR
TRANSISTORS 01, 02 AS A
FUNCTION OF EMITTER CURRENT

5

10

0:
~
W
C)

VCE =3 V
-TA = 25'C
1.6

«

!:;>
0 1
>0:

~~

J
/

I.S

t~

:'1--

WC)

~~

1.4

"'«
~"
I

~

1.3

>

1.2 /
0.1
0.2

V

LV

.... '"

V

V

"'"
O.S

'E - EMITl'ER CURRENT - rnA

10

20

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES.
TYPICAL PERFORMANCE CURVES FOR 3018/3018A (Cont'd)
BASE-TO-EMITTER VOLTAGE
CHARACTERISTIC FOR EACH
TRANSISTOR AS A FUNCTION
OF AMBIENT TEMPERATURE

OFFSET VOLTAGE CHARACTERISTIC
ASA FUNCTION OF
AMBIENT TEMPERATURE
4

E

3

I

~~

'"~«

2

>-

"'r-

§;

IE = 10 m A

'.

.....-

0.9

-

VCE = 3 V

>

~

.-'

I

'"

~

I

>~

0.5

---

1.0 mA

a

I

0.1

1'.

1

5

I

~

V

0.71--t--+--+~"""",~..---I----ie---I

~I

.,

Ci'

:: ~Z
~
g ::?~

1.50

~ ~
I

1.25

w

0.61--t--+--+-+--+---"~~~--I

1.75

I

0:

~

OW

I

~

>

0.8 1---+~'k-''''d--+--+--+----1f---I

~

0.7 5

-N

.--"""T'"--r----r-"T""""~-""T"""--,;__..,

>

a
>
~

a

STATIC INPUT VOLTAGE FOR
DARLINGTON PAIR (Q3, Q4)
AS A FUNCTION OF
AMBIENT TEMPERATURE

w'"
.,«

>
0.51--t--+--+-+--+-+----i--3I

W

~

a
>

>

0.4 L..--L._.l...---L.._...L.---L_....L----l_..J

0
-75 -50

-25

25

50

75

100

125

-75 -50

T A - AM81ENT TEMPERATURE - °c

-25

25

50

75

100

0.75
-75

125

-25

-50

50

TA - AM81ENT TEMPERATURE - °c

TA - AMBIENT TEMPERATURE - °c

TYPICAL AC CHARACTERISTICS FOR EACH TRANSISTOR
GAIN-BANDWIDTH PRODUCT (fT)
AS A FUNCTION OF
COLLECTOR CURRENT

NORMALIZED h PARAMETERS
AS A FUNCTION OF
COLLECTOR CURRENT

1000

100

V~E

::;;
I

Jv

=
TA = 25°C

J:

50

800

0

~J:

600

~
;;;

400

~

V

--

,...,

f

Z

hie

«
~

0.5

4

5

6

7

8

.....,

bie

>--"

u E
:> E
OW

'/

UU

Lf'

V/ gie

Do
ZZ

««
i£

J

I

§EI

2

V-

j

1

0.2

0.5

2

0.2

0.5

1

5

2

10

20

t~

-

50 100 200

&'7

~ r-~

1';:

:>"o~

I ~

V

"'-;-~lkHz

0.D1

0.02

0.05

0.1

~~

0.2

IC - COLLECTOR CURRENT - rnA

0.5

r-

CA3018/CA3018A

-20

10

J

L9

,2

~'"
DO

0.1 0.2

0.5

1

2

5

10

20

50

o

0.1

0.2

0.5

1

2

5

""V i--'~
10

20

20

I

F~JQUEN!IES_

LESS THAN 500 MHz

-

~e

"

0e

1

I- TA = 25°C
VCE = 3 V

/

rlc= 11 rni
50

100 200

10

~

i~"l

~~0/i

10

->-

1~~~

-

f

I - FREQUENCY - MHz

~Pr

/
,./

-

0

1«

I
I

,<",, E
o E

1- FREQUENCY - MHz

20

10

c

",
0.1

r-~~;~:o~

~~
;::>

i
0.05 0.1

OZ

,L./

o

~

"

20

«

VCE = 3 V
rlC= 1 rnA

Z

~~

~e

1JlJ

rT

u

Zw

re

OUTPUT ADMITTANCE (Y oe)
AS A FUNCTION OF FREQUENCY

H;=~5~~
~ 8

E

~I

IC - COLLECTOR CU RRENT - rnA

VCE = 3 V
rlc= 1 rnA

u

~
h

, / I~~

~

hie
0.1
0.01 0.02

10

9

0:

30

0"-

"- /

VI"'""
hoe

0.2

3

91e

~ '"
8~

::

V

~

1

f--

~

o

W

N

::;

200

o

at 1 rnA

~

«z

INPUT ADMITTANCE (Yie)
AS A FUNCTION OF
FREQUENCY

~
.6!!?~

~;~: ~:~~~ 10.4

~hoe'; 15.6~rnho

...

IC - COLLECTOR CURRENT - rn A

I"

hoe

r--

}

40

"'w
Zu

..t-

o

~

11

I--- hie = 110

:::~

u
:>

I

I-

hre

>-

~

tc~ =13~
=1=lkHz
f-- TA = 25°C

FORWARD TRANSFER ADMITTANCE (Yfe)
AS A FUNCTION OF FREQUENCY

o

-

0.01

_I--' .."

-

0.05

/

lkH,/

//f'

~

.....
0.02

II

/

~~
0.1

0.2

IC - COLLECTOR CURRENT - rnA

/'

0.5

•

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3019
•
•

EXCELLENT DIODE MATCHING - 1 rnV TYP.
LOW REVERSE LEAKAGE CURRENT - 5 rnA TYP.

APPLICATIONS
• Modulator
• Mixer
• Balanced Modulator
• Analog Switch
• Diode Gate for Chopper-Modulator Appl ications

ABSOLUTE MAXIMUM RATINGS
Power Dissipation
For each Diode
Total F.or Device
Temperature Range
Storage Temperature
Operating Temperature
Voltage Between Any Pin and Pin 7 (Note 1)

20mW
120mW
_65° C to +200° C
_55° C to +125° C
18 V

ELECTRICAL CHARACTERISTICS FOR 3019 (For each diode, TA = 25°C unless otherwise specified)
PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNITS

VF

DC Forward Current, IF

= 1 rnA

-

0.73

0.78

V

DC Reverse Breakdown Voltage (Any Diode) BV

DC Reverse Current, IR

= -10 IlA

4.0

6.0

-

V

BVS

DC Reverse Current, IR

= -10 IlA

25

80

-

V

IR

DC Reverse Voltage, VR

= -4

V

-

0.0055

10

IlA

IR

DC Reverse Voltage, VR

= -4

V

-

0.010

10

IlA

1VF1 - VF2'

DC Forward Current, IF

= 1 mA

-

1.0

5.0

mV

-

1.8

-

pF

Pin 2 or 6to Pin 7

-

4.4

-

pF

Pin 5 or8 to Pin 7

-

2.7

-

pF

See Figure 1

-

10

-

mV

DC Forward Voltage Drop

DC Reverse Breakdown Voltage Between
any Diode Unit and Substrate
DC Reverse (Leakage) Current
DC Reverse (Leakage) Current Between
any Diode Unit and Substrate
Magnitude of Diode Offset Voltage
(Difference in DC Forward Voltage
Drops of any Two Diode Units)
Single Diode Capacitance

Frequency, f
CD

DC Reverse Voltage, VR
Frequency, f

Diode Quad-to-Substrate
Capacitance

C

_
DQ I

= 1 MHz

Vs

V

= 1 MHz

DC Reverse Voltage, VR between
Pins 2,5,6, or 8 of Diode Quad
and Pin 7 (Substrate)

Series Gate Switching Pedestal Voltage

= -2

= -2

NOTE

1. Substrate (Pin 7) must be connected to the most negative potential.

8-10

V

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
TYPICAL PERFORMANCE CURVES FOR 3019

REVERSE (L'EAKAGE) CURRENT
(ANY DIODE) AS A FUNCTION OF
TEMPERATURE

DC FORWARD VOLTAGE DROP
(ANY DIODE) AS A FUNCTION OF
TEMPERATURE

40 r-.....,...-r-.....,...-r-.....,...-r---r-----,
V R ACROSS DIODE = -4 V

>

1.11--I--+--I--+--I--+--+--l

351--1--1--1--+--1--+-_+__1

I

~

~

1.0 I---+--+---I--+---I--+---+-~

~

0.91---+--+---I--+---I--+---+-~

~

;"

0.81---+--+"
......""""'+---1--+---1---1---_1

:

201--I--1--I--+--I--+-~~__I

~

151---+--1---+--+---+--~/~r--I

~

10

~

~

~ ........... ~

0.71---+--+---1...........
-+-1'-....."""""+---1---1---_1

f2
~

301---+--1---+--+---+--+---+~

I

........................
0.61---+--+---I--+---I--.j........:""'k~---l

I---+--+---+----I--~/_+_-f--f
/V

-~

:-

vI

0.51--I--+--I--+--I--+--+--l

5r--r--~_r~r_~-r__+__I

0.4L---l-:--L---l--!..---l--!..-.....J....~

~7~5~-5~0--2~5-0~~2~5~5~0~7~5~10~0~125

-75

-50

-25

0

25

50

75

100

125

TA - AMBIENT TEMPERATURE - °c

TA - AMBIENT TEMPERATURE - °C

DIODE CAPACITANCE
(ANY DIODE) AS A FUNCTION OF
REVERSE VOLTAGE

DIODE aUAD-TO-SUBSTRATE
CAPACITANCE AS A FUNCTION OF
REVERSE VOLTAGE

8r-.....,...-r-.....,...-r-.....,...-r-.....,...~

8r-.....,...--r-.....,...--r-.....,...-r---r-----,

f-

1

T

=

~ LJc

25o l_+---I-_+---+-_-I---_I

=
1= 1 MHz

1= 1 MHz

---4f---+----I--+--I---I

6~-+--+---+-r--+--r--+~

I

w
U

Z

;'!:
i3

~

<3
o

o

i5

~

2

11-

r =r;::;::::i=::t==t:::t=:j
°0~--~--l-1--~.....J....2--~.....J....3--~~4
V R - DC REVERSE VOLTAGE BETWEEN PIN
2 OR 6 AND SUBSTRATE (PIN 7)

V R - DC REVERSE VOLTAGE ACROSS DIODE - V

•

SERIES GATE SWITCHING
TEST SETUP

DIODE aUAD-TO-SUBSTRATE
CAPACITANCE AS A FUNCTION OF
REVERSE VOLTAGE

T A =25°C
1= 1 MHz

61---+--r--I--+---I--+---+-~

+6 V

'';; 10mV P-P
4.7 kn

P

2VP

fb
_

II =

100 kHz""

-=-

12=10 MHz ""

-;-

VR - DC REVERSE VOLTAGE BETWEEN PINS
5 OR 8 AND SUBSTRATE (PIN 7)

2£3 ~
16 l:d"'-=- 9

j

-8>-.....

1

500

500n

-=

n

4.7

Fig. 1

TEKTRONIX TYPE
585 WITH TYPE-B
PLUG-IN UNITOR
EQUIVALENT
vOUT' ....._ _ _ _ _.....

j

kn-==
-6V

8-11

-J...--I

3019

--.---_-t

•
l"!p

OSCILLOSCOPE:

I ""..;., 2

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3026/3054

•
•
•
•

LOW INPUT OFFSET VOLTAGE - ±5 mV
WIDEBAND OPERATION
INDEPENDENTLY ACCESSIBLE INPUTS AND OUTPUTS
TWO MATCHED DIFFERENTIAL AMPLIFIERS

APPLICATIONS
• Dual Sense Ampl ifiers
• Dual Schmitt Triggers
• Multifunction Combinations - RF/Mixer/Oscillator; Converter/IF
• I F Amplifiers (Differential and/or Cascode)
• Product Detectors
• Doubly Balanced Modulators and Demodulators

•
•
•
•
•
•

Balanced Quadrature Detectors
Cascade Limiters
Synchronous Detectors
Pairs of Balanced Mixers
Synthexizer Mixers
Balanced (Push-Pull) Cascode Ampl ifiers

ABSOLUTE MAXIMUM RATINGS (For Each Transistor)
Power Dissipation (Note 1)
Any One Transistor
Total Package
Temperature Range
Operating Temperature
Storage Temperature

3054
300mW
600mW

3026
300mW
7S0mW

-5SoC to +12SoC
-6So C to +200° C

O°C to +85°C
-2 So C to +8So C

The following ratings apply for each transistor in the device
Collector-to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
Collector-to-Substrate Voltage, VCIO (Note 2)
Emitter~to-Base Voltage, VEBO
Collector Current, IC
ELECTRICAL CHARACTERISTICS FOR 3026/3054 (TA

=

15 V
20 V
20 V
SV
SOmA

25°C unless otherwise specified)
MIN.

TYP.

MAX.

UNITS

VIO

-

110

-

0.45
0.3
10

S
2
24

mV
IlA
IlA

-

0.98 to
1.02

-

-

-

1.1

-

IlV/oC

-

0.630
0.71S
0.7S0
0.800

0.700
0.800
0.8S0
0.900

V

VCB = 3 V, IC = 1 rnA

-

-1.9

-

mV/oC

CONDITIONS

PARAMETER
For Each Differential Ampl ifier
Input Offset Voltage
Input Offset Current
Input Bias Current
Quiescent Operating
Current Ratio
Temperature Coefficient
Magnitude of input-Offset Voltage
For Each Transistor
DC Forward Base-toEmitter Voltage

II
IC(Q1) or IC(QS)
IC(Q2)
IC(Q6)

VCB

=3

IE(Q3)

V

-

= IE(04)

= 2 mA

alvlOI
aT
VCB = 3 V

VBE

IC = 50 IlA
1 mA
3mA
10mA

Temperature Coefficient of Base
to-Emitter Voltage

aVBE

Collector-Cutoff Current

ICBO

VCB = 10 V, IE = 0

-

0.002

100

nA

Coil ector-to-Emitter
Brea kdown Vol tage

V(BR)CEO

I C = 1 mA, I B = 0

15

24

-

V

Collector-to-Base
Breakdown Voltage

V(BR)CBO

IC= 10 IlA, IE = 0

20

60

-

V

Collector-to-Substrate
Breakdown Voltage

V(BR)CIO

IC= 101lA, ICI =0

20

60

-

V

V(BR)EBO

I E = 10 IlA, I C = 0

5

7

-

V

Emitter-to-Base Breakdown Voltage

aT

NOTES
1. For T A> 55°C; 3026 derates at 5 mW/oC and 3054 at 6.67 mW/oC
2. The collector of each transistor of the 3026 and 3054 is isolated from the substrate by an integral diode. Substrate must be connected to the
most negative voltage to maintain normal operation.

8-12

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
ELECTRICAL CHARACTERISTICS FOR 3026/3054 (Continued) (T A = 25°C unless otherwise specified)
PARAMETER (See Test Circuits)

CONDITIONS

Common-Mode Rejection Ratio
for Each Ampl ifier

CMRR

VCC

AGC Range, One Stage

AGC

VEE

Voltage Gain, Single Stage Double-Ended Output

AV

Vx

AGC Range, Two Stage

AGC

f

Voltage Gain, Two Stage Double-Ended Output

AV

Low-Frequency, Small-Signal Equivalent-Circuit Characteristics:
(for Single Transistor)
Forward Current-Transfer Ratio
hfe
Short Circuit I nput Resistance
hie
Open Circuit Output Conductance
hoe
Open Circuit Reverse Voltage-Transfer Ratio
h re
1 Noise Figure (for Single Transistor)
NF
Gain-Bandwidth Product (for Single Transistor)

fT

= 12 V
= -6 V

= -3.3 V

= 1 kHz

MIN.

TYP.

MAX.

UNITS

-

100

-

dB

-

75

-

dB

-

32

dB

-

105

-

60

-

-

110
3.5
15.6
1.8xl0-4

= 1 kHz, VCE = 3 V
VCE = 3 V, IC = 3 mA

-

3.25
550

-

-20+j 0
0.22+j 0.1
O.Ol+j 0
-0.003+j 0

-

f = 1 kHz, VCE
IC = 1 mA

=3

V,

-

f

Admittance Characteristics; Differential Circuit Configuration:
(for Each Amplifier)
Forward Transfer Admittance
Y21
Input Admittance
Y11
Output Admittance
Y22
Reverse Transfer Admittance
Y12
Admittance Characteristics; Cascode Circuit Configuration:
(for Each Ampl ifier)
Forward Transfer Admittance
Y21
I nput Admittance
Y11
Output Admittance
Y22
Reverse Transfer Admittance
Y12

VCB = 3 V
Each Collector
IC ~ 1.25 rnA
f = 1 MHz

-

VCB = 3 V
Total Stage
IC ~ 2.5 rnA
f = 1 MHz

-

Noise Figure

f

NF

-

-

= 100 MHz

dB

kfl
pmho

dB
MHz

-

mmho
mmho
mmho
mmho

-

68-j 0
0.55+j 0
O+j 0.02
0.004-j 0.005

-

dB

mmho
mmho
mmho
#Lmho

-

-

8

dB

TYPICAL PERFORMANCE CURVES FOR 3026/3054
COLLECTOR-TO-BASE CUTOFF
CURRENT AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR EACH TRANSISTOR
50

«

10

c

=

'l

50

L. /

...
I

VCB =i5V?

10 V.,..

...,.

10- 1

......

5.10-1

-

5.10-2

~ 10I

o

/.r/
':h

2

10-3

Jl
10-4

-

5.1~

«

V

20
10

iii
Z

50

75.

TA - AM,'ENT TEMPERATURE -

100

°c

125

0.9

~

0.8

~
~

0.7

i

VCB~ 3.0~

~~ ~

~

0.2

10

0.5
'C - COLLECTOR CURRENT - mA

8-13

0.4

-75

~ ~~~mA
"'''1
r----

~r--..:
t:"
0.5~ I'.....:

0.6
0.5

/

1
0.1

1.0

~o
>

/
5.10-4

~
II:

I

",

25

II)

0-

..... :;;...-: .....

o

I

/

/

...:>

II:

o

1

I

./

~V- f--

1.2

~3.0~V
==:TA = 25°C

'1

Z

II:
II:

:>
u

§

100

50
'E=O

BASE-TO-EMITTER VOLTAGE
CHARACTERISTIC FOR EACH
TRANSISTOR AS A FUNCTION OF
AMBIENT TEMPERATURE

INPUT BIAS CURRENT
CHARACTERISTIC AS A FUNCTION
OF COLLECTOR CURRENT
FOR EACH TRANSISTOR

-50

-25

25

50

75

TA - AMBIENT TEMPERATURE -

100

°c

125

I

FAIRCHILD Lie TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
TYPICAL AC CHARACTERISTICS FOR EACH TRANSISTOR FOR 3026/3054
NORMALIZED h PARAMETER
AS A FUNCTION OF
COLLECTOR CURRENT FOR
EACH TRANSISTOR

GAIN BANDWIDTH PRODUCT (fT)
ASA FUNCTION OF
COLLECTOR CURRENT
1000

100

:z:
::;;
I

800

~:z:

600

/
I

b

~

::;

400

1"'-.....

--

,-

h ::l.88xl0.4

'!Io..


u.a:

20

~ ~

0'"

I

U

«

"

t

~

8

\

r....

at

8

-20 -Vcs=3V
_ STAGE Ie = 2.5 rnA

0.1

VI

0.2

0.5

2

1\
b21

I"\..

a:

a

I'

f -

10

20

50

I--

o

0.1

100 200

~

911
1

J

~I'
6

1

~

.0

TA = 25'e

-40

"

l-

=>

_w
NU
.02
a:«

-=>
NO

r-T A = 25'e

2

a

"'2

I
/
If/
JI/

r-STAGE Ie = 2.5 rnA

a

9211\

a: U
I- 2
«
a:o.

1'.......

b ll

I--'
0.2

0.5

5

1

10

20

50

100 200

1 - FREQUENCY - MHz

FREQUENCY - MHz

REVERSE TRANSFER
ADMITTANCE (Y12)
AS A FUNCTION OF
FREQUENCY

OUTPUT ADMITTANCE (Y22)
AS A FUNCTION OF
FREQUENCY
100

~
2E

VC~ ~ ~ Iv
-2

STAGE Ie = 2.5 rnA
TA = 25'e

\

t
~

8
5
~
a

-6

~

N

'" -12
0.1

0.2

0.5

1
1-

2

fo"'"

5

./'

10

20

is
~

i

,

TA = 25'C
10

VI

a:

U
2

~
~
\

-10

~

8

I

-8

1
Ves = 3 V
STAGE IC = 2.5 rnA

U

E

V
II
/

-4

U

2

«

I

922

E
I

J

::-iJ

\
\

a:

1

~

~

I-

w

r- -

1

10

w

912

'"2

/

~

b

I-

w
a:
w

'"
~

~

a

V /

0.1

0.0 1

a:

a

0.00 1
0.1

50 100

/'

-

0.2

8-14

=r==

V

~
0.5

1
I -

FREQUENCY - MHz

12

1/

I

.0

.o~

20

1 - FREQUENCY - MHz

INPUT ADMITTANCE (Y11)
AS A FUNCTION OF
FREQUENCY

r-....

CI-

~

ill

'"a:w
0.1

~
I

80

I
2
'"«W

?

91

II

0.000 1
0.1

1 - FREQUENCY - MHz

60

g

N

o

FORWARD TRANSFER
. ADMITTANCE (Y21)
AS A FUNCTION OF
FREQUENCY

I

~

w

~a: ~c

~
5a

I

100

,1

b12

TYPICAL AC CHARACTERISTICS FOR EACH CASCODE AMPLIFIER FOR 3026/3054

a:
w E

1/

TA = 25'C

1

0

1

~~

I

w

922

V V

1 - FREQUENCY - MHz

1000

Ie (EACH TRANSISTOR) = 1.25 rnA
1

E

V

0
0.1

50 100 200

DIFFERENTIAL CONFIGURATION
V CS =3.0V

I

b22/

20

10

0.3

o. 1

10

5

REVERSE TRANSFER
ADMITTANCE (Y12)
AS A FUNCTION OF
FREQUENCY

a
~

1

1 - FREQUENCY - MHz

1/

8

911

20

J

~

~~

V

\

........ ~

1

OUTPUT ADMITTANCE (Y 22)
AS A FUNCTION OF
FREQUENCY

V
0.2

0.2

f--

c-- f-/

IC - COLLECTOR CURRENT rnA

IC - COLLECTOR CURRENT - rnA

DIFFERENTIAL CONFIGURATION
VCS =3.0V

0.05

f--

1 hoe

1/

-

200

atlmA_

TA = 25'C

b21

l /10-

Z

-

IC (EACH TRANSISTOR) = 1.25 rnA

1 -

re
hoe ",'5.6IJ mho

~

hre

DI~FJRIE~TllL C6N~I~IJRA+IONI
Vcs = 3.0 V

:-- :::: ~:OkU

hie _

~

30

J

VCS=3.0V
50 1-1
= 1 kHz
~TA =25'C

Vcs ='3.0 V
TA =25'C

FORWARD TRANSFER
ADMITTANCE (Y21)
AS A FUNCTION OF
FREQUENCY

5

10

FREQUENCY -

20
MHz

50 100 200

50

0.01
100 200

.0

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
TYPICAL PERFORMANCE CURVES FOR 3026/3054 (Cont'd)

OFFSET VOLTAGE CHARACTERISTIC
AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR DIFFERENTIAL PAIRS
6

O.B
V CB = 3.0 V

>

E
I

~
~

4
3

lLL

o
I

2

""',..

-

IE = lOrnA

- --

-

~NO.7 5

>
I

t- TA = 25°C

>

V

1 rnA

0.50

.01T A

'"

~ 0.2 5

""',..

I

.,..'/

w

"
-0:

~>

0.7

~

~
~
I
.,

0.6

ON
Cl
Z

-0:

I

-5
W

/
I

i-""i-'

I-'
INPUT OFFSET VOLTAGE = IV

~
!:;
0
>

- V BE 1
BE1
2

i
i
0

1

0.5

//

>

I

0

0
-75

-50

-25

25

50

75

100

125

0.4
0.01

0.02

T A - AMBIENT TEMPERATURE - °C'

0.1

0.2

0.5

1

110

I

I

I

-2

0

./

0.2

:.,... ....

IQ.

z

0.1

I 0.05

20.02

-4

.......

-1

-2

-3

'"

,

-5

-4

0.2

0.5

1

10

5

r---.-,

\

\

VCC=+12V
V =- 6V

rf EE =1 kHz

SIGNAL INPUT VOLTAGE = 1 mVrms

"-

-6

Vx - DC BIAS VOLTAGE ON PINS B, 11 - V

Vx - DC BIAS VILTAGE ON PINSB, 11- V

0.05 0.1

25

\
o

0.02

TWO·STAGE VOLTAGE
GAIN

50

-50

-3

...... /

-

0.01
O.oT

50

-

'"

100

-25

-1

/

0.5

V>

::>

1.

Ie - COLLECTOR CURRENT - rnA

I

...............
o

::>

u

I-

75

25

V~

BO

/

0:
0:

VCC=+12 V
VEE=-6V
-I--75 I-- f
= 1 kHz
SIGNAL INPUT VOLTAGE = 10 rnVrms

.............,.

90

I

z

SINGLE STAGE VOLTAGE
GAIN
100

2

VCC + 12V
VEE=-6V
f
= 1 kHz

100

o

10

5

:>

'1
I-

IE - EMITTER CURRENT - rnA

COMMON MODE REJECTION.
RATIO
120

0.05

V CB =3·9Y
-TA = 25°C

I

VBE

...... 1'

/

".,

0:
W

::

10

1/

VCB=3.~':'

5

INPUT OFFSET CURRENT FOR
MATCHED DIFFERENTIAL PAIRS
AS A FUNCTION OF
COLLECTOR CURRENT

STATIC BASE·TO·EMITTER VOLTAGE
CHARACTERISTIC AND INPUT OFFSET
VOLTAGE FOR DIFFERENTIAL PAIRS
AS A FUNCTION OF EMITTER CURRENT

-25

I

I

-1

-2

r

·1

\

\

-50

°

-5

-6

Vx - DC BIAS VOLTAGE ON PINS 2,3 AND B, 11 - V

•
Vx

Vx VCC = +12

VCC = +12 V

1k

I

O.l~F

11

O.1

~F

0.1 ~FJ

O.l~F.I

Test setup

I-=-

lk

lk

VE; = -6

1 k

VCC = +12 V

VEE -: -6 V

VCC = +12 V

Test setup
Pin numbers are shown for 3054 (DIP) only.

8·15

Test setup

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3036
•
•
•

MATCHED TRANSISTOR PERFORMANCE
LOW NOISE PERFORMANCE
200 MHz GAIN BANDWIDTH PRODUCT

APPLICATIONS
• Stereo Phonograph Preamplifiers
• Low level Stereo and Single Channel Amplifier Stages
• Low noise, Emitter-follower Differential Amplifiers
• Operational Amplifier Drivers
ABSOLUTE MAXIMUM RATINGS (For Each Transistor)
Power Dissipation
Any One Transistor
Total For Array
Temperature Range
Operating Temperature
Storage Temperature

300mW
300mW
_55° C to +125° C
_65° C to +200° C

The following ratings apply for each transistor in the array
Collector-to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
Emitter-to-Base Voltage, VEBO
Collector Current, IC

15 V
30 V
5V
50mA

ELECTRICAL CHARACTERISTICS FOR 3036 (T A = 25°C unless otherwise specified)
CONDITIONS

PARAMETER

TYP.

MAX.

UNITS

-

-

0.5
5.0

MIN.

For Each Transistor (Q1, Q2, Q3, ~)
Collector Cutoff Current
Collector Cutoff CLJrrent.
Collector-to-Emitter Breakdown Voltage
Collector-to-Base Breakdown Voltage
Emitter-to-Base Breakdown Voltage

ICBO
ICEO
V(BR)CEO
V(BR)CBO
V(BR)EBO

VCB=5V,IE=0
VCE=15V,IB=0
I C = 1 mA, I B = 0
I C = 10 MA, IE = 0
IE = 10 MA, I C = 0

-

-

15
30
5.0

20
44
6.0

-

MA
MA
V
V
V

For Either InputTransistor (Q1 or 03)
Static Forward Current-Transfer Ratio

hFE

IC1 or IC3= 1 mA

30

82

-

-

For Either Darlington Pair (01, Q2 or Q3, ~)
Emitter-to-Base Breakdown Voltage

V (BR)EBO(D)

IE2 or IE4 = 10 MA

10

12.6

-

V

1000

4540

-

-

-

82
2.6
7.0
9.8 x 10-5

-

kn
Mmho

1300
82
108

kn
Mmho

-

IC1 + IC2 }
Static Forward Current-Transfer Ratio

or

hFE(D)

= 1 mA

IC3 + IC4
For Each Input Transistor (Q1 or Q3)
Short Circuit Forward Current-Transfer Ratio
Short Circuit Input Resistance
Open Circuit Output Conductance
Open Circuit Reverse Voltage-Transfer Ratio

hfe
hie
hoe
h re

For Either Darlington Pair (Q1, Q2 or Q3, ~)
Short Circuit Forward Current-Transfer Ratio
Short Circuit Input Resistance
Open Circuit Output Conductance
Open Circuit Reverse Voltage-Transfer Ratio

hfe(D)
hie(D)
hoe(D)
hre(D)

Noise Voltage
For Either I nput Transistor (01 or Q3)
Forward Transfer Admittance
Input Admittance (Output Short Circuited)
Output Admittance (I nput Short Circuited)
Reverse Transfer Admittance
(Input Short-Circuited)
For Either Darlington Pair (Q1, Q2, or Q3, ~)
Input Admittance (Output Short Circuited)
Output Admittance (Input Short Circuited)
Gain-Bandwidth Product

EN

Yfe
Vie
Yoe

f = 1 kHz
I C 1 or I C3 = 1 mA

-

-

-

IC3 + IC4

-

2.7 x 10-3

-

f = 100 Hz
f = 1 kHz
f=10kHz

-

0.2
0.05
0.012

3.0
0.3
0.1

-

f = 50 MHz

-

0.68 + j 7.9
4.4 + j 5.95
1.94 + j 2.64

-

mmho
mmho
mmho

-

Negligible

-

mmho

f = 50 MHz

-

IC1 + IC2j

-

1.71 + j 2.8
3.96 + j 2.6
200

-

mmho
mmho
MHz

f = 1 kHz

IC1 + IC2 }
or

= 1 mA

IC1 or IC3 = 2 mA

Yre

Yie(D)
Yoe(D)
fT(D)

-

or
IC3 + IC4

8-16

= 2 mA

150

r

MV (r ms)

-Jf{HZj
f(Hz

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3039
•
•
•

EXCELLENT DIODE MATCHING - 1 mV TYP.
REVERSE RECOVERY TIME - 1 ns TYP.
LOW DIODE CAPACITANCE - 0.65 pF @ VR = -2 V

APPLICATIONS
• Balanced Modulators or Demodulators
• Ring Modulators
• High Speed Diode Gates
• Analog Switches

ABSOLUTE MAXIMUM RATINGS
Power Dissipation (See note)
Any One Diode Unit
Total for Device
Temperature Range
Operating Temperature
Storage Temperature
Voltages and Currents
Peak Inverse Voltage, PIV for: 01 - 05
06
Peak Diode-to-Substrate Voltage, VOl for 01 - 05
(term. 1,4,5,8 or 12 to term. 10)
DC Forward Current, IF
Peak Recurrent Forward Current, If
Peak Forward Surge Current, If (surge)

100 mW
600mW
_55° C to +125° C
_65° C to +200° C
5V
0.5 V
+20, - 1 V
25mA
100 mA
100 mA

ELECTRICAL CHARACTERISTICS FOR 3039 (For each diode unit, T A = 25°C unless otherwise specified)
CONDITIONS

PARAMETER

MIN.

TYP.

MAX.

UNITS

-

0.65
0.73
0.76
0.81

0.69
0.78
0.80
0.90

V
V
V
V

DC Forward Voltage Drop

VF

IF = 50 #LA
1 mA
3mA
10mA

DC Reverse Breakdown Voltage

BV

IR = -10 #LA

5.0

7.0

-

V

DC Reverse Breakdown Voltage
Between any Diode Unit and Substrate

BVS

IR = -10 #LA

20

-

-

V

DC Reverse (Leakage) Current

IR

VR = -4 V

-

0.016

100

nA

DC Reverse (Leakage) Cur.rent
Between any Diode Unit and Substrate

IR

VR =-10 V

-

0.022

100

nA

Magnitude of Diode Offset Voltage
(Difference in DC Forward Voltage
Drops of any Two Diode Units)

1VF1 - VF21

IF = 1 mA

-

0.5

5.0

mV

IF = 1 mA

-

1.0

-

#LV/oC

IF = 1 mA

-

-1.9

-

mV/oC

A1VF1 - VF21
Temperature Coefficient of 1VF1 - VF21
AT
AVF

Temperature Coefficient of Forward Drop

-AT

DC Forward Voltage Drop for
Anode-to-Substrate Diode (OS)

VF

IF = 1 mA

-

0.65

-

V

Reverse Recovery Time

trr

IF = 10 mA, IRO=: 10 mA

-

1.0

-

ns

Diode Resistance

RD

f = 1 kHz, IF = 1 mA

25

30

45

n

Diode Capacitance

CD

VR=-2V,IF=0

0.65

-

pF

Di ode-to-Substrate Capacitance

COl

VOl = +4 V, IF = 0

-

3.2

-

pF

NOTE: Derate at 5.7 mW/oC for T A> 55° C.

8-17

•

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
TYPICAL PERFORMANCE CURVES FOR 3039

DC FORWARD VOLTAGE DROP
(ANY DIODE) AND DIODE OFFSET
VOLTAGE ASA FUNCTION OF
DC FORWARD CURRENT
1.0

~
I
w

~

~OV :..'~

0

U

Q

I

0.6



I-

w

'"o

0\""'' '

-

~

w

--

G~O/

0.7

~

I

,

o.S

~
>
~

IL

~

W

"O~'II

'/

Pnl

>

JI

'0.6
0.01

0.02
IF -

0.05 0.1

0.2

0.5

I
-IL
N

>

VF I
2

I

1

:1'1

I

o
C

o

I

DIODE OFFSET VOLTAGE = IV F 1
I I I I

..;.

o
5

1

IF' =

>



i ...

1.0

0.9

~

O.S

~

I--

z
w

/
0.5

0:
0:

I

:::>

..:~

u

'"w
~

i/

0.1

/

0:

Q

o
C

.6

I

-:N

~ f--"- r"'"0.11rnA

~o.4
~

o.3

-75

-50

-25

25

V

/

, rnA

0.5

>

Q

I

-~
50

75

TA - AMBIENT TEMPERATURE -

.05

./

u

100

.!!"

l,....---

0.01
.005

0.001
-75

125

-50

·c

-25

0

25

50

75

DC REVERSE (LEAKAGE) CURRENT
BETWEEN DIODES (1,2,3,4,5)
AND SUBSTRATE AS A FUNCTION OF
TEMPERATURE

1000

T1 =1215JC_

1\

10 V
500

0:
0:

..I'-.....

/

:::>

u
w

/

0:

0.6

.........

I

0.1

/

25

-26

50

75

100

125

~

50

I

/

0.01

0.001
-75

TA - AMSIENT TEMPERATURE - ·C

-50

-25

0

.....

,
1\
"-

20

r--.

25

50

75

100

1
0.01

125

T A - AMBIENT TEMPERATURE - ·C

0.02
IF -

0.05 0.1

0.2

0.5

1

DC FORWARD CURRENT -

DIODE-TO-SUBSTRATE CAPACITANCE
AS A FUNCTION OF
REVERSE VOLTAGE

-Tl

= 25t

IF = 0

IL

I
w

~

;:
~

...........

5
w

Q

o

C

.........

--

r--

-

I
Q

Q

o

U

C
I

~

o~~--~~--~~--~~~

o

DC REVERSE VOLTAGE ACROSS DIODE -

........

Q

0:

DIODE CAPACITANCE
(DIODES 1,2,3,4,5)
AS A FUNCTION OF
REVERSE VOLTAGE

VR -

I........

10

I

.!!"

0.4

100

~

Q

0.5

~

Q

u

...........

200

w

~

...........

c:

~

'"

........... r.....

t.= 1 kHz-

"-

/

10

125

DIODE RESISTANCE
(ANY DIODE) AS A FUNCTION OF
DC FORWARD CURRENT

100
FVR 1=

100

TA - AMBIENT TEMPERATURE _ ·C

IZ

-50

J

I-

0.7

I~A

0.7

-75

V R = -4 V

~

2

':1:

~
g

::-

w

1

w

g

4

10

I

~~

10

E

DC FORWARD CURRENT - rnA

'DC FORWARD VOLTAGE DROP
(ANY DIODE) AS A FUNCTION OF
TEMPERATURE
1.2

5

>

TA = 25"C

>

DC REVERSE (LEAKAGE) CURRENT
(DIODES 1, 2, 3, 4,5)
AS A FUNCTION OF
TEMPERATURE

DIODE OFFSET VOLTAGE
(ANY DIODE) AS A FUNCTION OF
TEMPERATURE

0

o
VR - DC REVERSE VOLTAGE BETWEEN
PINS I, 4, 5, 8, OR 1~ AND SUBSTRATE (PIN 10)

V

8-18

5
rnA

10

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
3045/3046/3086
•
•
•

LOW INPUT OFFSET VOLTAGE
WIDEBAND OPERATION
LOW NOISE

APPLICATIONS
• General Use in all Types of Signal Processing Systems Operating
Anywhere in the Frequency Range From DC to VH F
• Custom Designed Differential Amplifiers
• Temperature Compensated Amplifiers

ABSOLUTE MAXIMUM RATINGS (For Each Transistor)
Power Dissipation (Note 1 )
Each Transistor
At TA = 2SoC
300mW
At TA = 2SoC to SSoC
At TA = 2SoC to 7SoC
300 mW
Voltages and Currents
1S V
Collector7to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
20 V
Collector-to-Substrate Voltage, VCIO (Note 2)
20V
Emitter-to-Base Voltage, VEBO
SV
Collector Current, IC
SOmA
Temperature Range
Operating Temperature

3045

3046/3086
Each Transistor Total Package
300mW
7S0 mW
300 mW
7S0 mW

Total Package
750mW
750mW

1S V
20 V
20 V
SV
SOmA
(3046) 0° C to +8So C
(3086) _40° C to +8So C
-SSoC to +12S'C

-6So C to +200° C

Storage Temperature

ELECTRICAL CHARACTERISTICS FOR 3045/3046/3086 (T A = 2SoC unless otherwise specified)
3045,3046

PARAMETER

3086

CONDITIONS
MIN.

TYP.

MAX.

MIN.

UNITS

TYP.

MAX.

Collector-to-Base Breakdown Voltage

V(BR)CBO

IC = 10 /-LA, IE = 0

20

60

-

20

60

V(BR)CEO

I C = 1 mA, I B = 0

15

24

-

15

24

-

V

Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown Voltage

V(BR)CIO

IC = lO/-LA, ICI = 0

20

60

-

20

60

-

V

V

Emitter-to-Base Breakdown Voltage

V(BR)EBO

IE = 10 /-LA, IC = 0

5.0

7.0

-

5.0

7.0

-

V

Collector Cutoff Current

ICBO

VCB=10V,IE-0

-

0.002

40

-

0.002

100

nA

Collector Cutoff Current

ICEO

VCE=10V,IB=0

-

See curve

0.5

-

See curve

5.0

/-LA

-

-

-

-

-

-

-

40
-

100
100
54

-

40
-

100
100
54

-

-

-

0.3

2.0

-

-

-

/-LA

-

0.715
0.800

-

-

0.715
0.800

-

V

Static Forward Current-Transfer Ratio
(Static Beta)

hFE

Input Offset Current for Matched Pair

VCE=3V,lc=lmA

Ql and Q211101 -11021
Base-to-Emitter Voltage

VCE = 3 V

IC = 10 mA
IC = 1 mA
Ic = 10 /-LA

VBE

VCE = 3 V

IE = 1 mA
IE = 10 mA

Magnitude of Input Offset Voltage for
Differential Pair 1VBEl - VBE21

VCE = 3 V, IC = 1 rnA

-

0.45

5.0

-

-

-

mV

Magnitude of Input Offset Voltage for
Isolated Transistors IVBE3 - VBE41,
1VBE4 - VBE51, 1VBE5 - VBE31

VCE = 3 V, IC = 1 rnA

-

0.45

5.0

-

-

-

mV

VCE = 3 V, IC = 1 rnA

-

-1.9

-

-

-1.9

-

mV/oC

IB = 1 rnA, IC = 10 rnA

-

0.23

-

-

0.23

-

V

-

1.1

-

-

-

-

/-LVrC

Temperature Coefficient of
Base-to-Emitter Voltage

~VBE

Collector-to-Emitter Saturation Voltage

VCE(sat)

Temperature Coefficient:
Magnitude of Input-Offset Voltage

I~VlOl

~T

VCE = 3 V, IC

= 1 rnA

~T

NOTES
1. 3046 and 3086 derate at 6_67 mW/oC for T A > 55°C, 3045 at 8 mW/oC for T A > 75°C_
2_ Substrate (Pin 13) must be connected to the most negative voltage to maintain normal operation.

8-19

•

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
ELECTRICAL CHARACTERISTICS FOR 3045/3046/3086 (T A = 25°C unless otherwise specified) (Continued)
CONDITIONS

PARAMETER

f = 1 kHz, V CE = 3V, IC = 100fJ.A
RS = 1 kn

NF

Low Frequency Noise Figure

MIN.

TYP.

MAX.

UNITS

-

3.25

-

dB

15.6

-

fJ. mho

1.8x10-4

-

-

-

Low Frequency, Small-Signal Equivalent-Circuit Characteristics:
Forward Current-Transfer Ratio

hfe

Short-Circuit Input Resistance

hie

Open-Circuit Output Conductance
Open-Circuit Reverse Voltage-Transfer Ratio

110
3.5
f = 1 kHz, V CE = 3V, IC = 1mA

-

hoe
h re

kn

Admittance Characteristics:
Forward Transfer Admittance

Yfe

-

31 -j 1.5

Input Admittance

Yie

-

0.3+j 0.04

Output Admittance

Y oe

-

0.001 +j 0.03

-

Reverse Transfer Admittance

Y re

-

See curve

-

-

Gain-Bandwidth Product

fT

VCE = 3V, IC = 3mA

550

-

-

Emitter-to-Base Capacitance

CEB

V EB = 3V, IE = 0

-

0.6

-

pF

Collector-to-Base Capacitance

CCB

V CB = 3V, IC =0

-

0.58

-

pF

VCS = 3V, IC =0

-

2.8

-

pF

Collector-to-Substrate Capacitance

f = 1MHz, VCE = 3V, IC = 1 mA

CCI

300

-

-

TYPICAL PERFORMANCE CURVES FOR 3045/3046/3086
COLLECTOR-TO-BASE CUTOFF
CURRENT AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR EACH TRANSISTOR
50

50

~

~IE"0

~
/. /

10

I

....
z

w

'"'":>

1

:=

10- 1

VCB

= 15V

5

/.1

r/.

t,)

a

10V~

'h

'"0

-~

'"'"
:>

5.,0-2

§

1//

25

75

50

f'/

I

2

a:
a:

1

:>
t,)

0.5

~

0.2

....
:>

0.1

0

/

I

/



0.6 ;7'

.... "

0.02

0.05 0.1

0.2

0.5

1

2

IC - COllECTOR CURRENT - mA

5

10

/4

>

3

1/"' ....

I

7'
T

IT

I

0.05 0.1
IE -

0.2

0.5

2

2

0.05

0.1

0.5

0.2

2

1

5

~
>

0.8

,

0.9

~

10

VCE

0.7

R: ~

~
I

;;;

I

= 3.0

5

0.6

~
~

"

0.5

>
0
10

0.4
-75

V

'" "
~ ~~

0

'"w::

I

~~

I

CA3045/3046/30B6

EMITTER CURRENT - mA

8-20

1

./7
1

hFEl

O.B

I

I

0.4
0.01 0.02

0.9

I

«:

V~ ,,/'

INPUT OFFSET VOLTAGE

~

I~I

BASE-TO-EMITTER VOLTAGE
CHARACTERISTIC AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR EACH TRANSISTOR
w

0.5

hFE2 OR

/

V~
50
0.01 0.02

:=

0.02
0.01
0.01

".-

I~I

10-""/

/

70



./

Q
-

75

50

0.8

= 3.0 V
= 25'C

z

/

T A - AMBIENT TEMPE RATURE - °C

VCE

....
z

~~
.ca

5.,0-3

25

0

10
5 =TA

sg

"' ....
5.,0-2

'l

'c

INPUT OFFSET CURRENT FOR
MATCHED TRANSISTOR PAIR
01, Q2 AS A FUNCTION OF
COLLECTOR CURRENT

'i

5.,0- 1

'/

10- 3

125

100

u.~

/

1

I 10-2

TA - AMBIENT TEMPERATURE -

100

",,,,

Ow

= 1O~
5V

10-

~~
;:'"
t,)Z

]

10- 4

5

1

8
5.,0-4

1\,

h V ....
0

10

'"

~

50

7

0

5.,0-3

"

0

~

1.1

U

VC'E!
V
110 I:-TA = 25'C

1//

IB = 0

....z
t,)

., ::;...0"
F""

f..-

V CE

-

'ZO

8

I

102

120

5.,0 2

5.,02

~

5.,0- 1

. / '/'

~ 10- 2
I 10-3

~V- f--

STATIC FORWARD CURRENTTRANSFER AND BETA RATIO FOR
TRANSISTORS 01, Q2 AS A
FUNCTION OF EMITTER CURRENT

COLLECTOR-TO-EMITTER CUTOFF
CURRENT AS A FUNCTION OF
AMBIENT TEMPERATURE
FOR EACH TRANSISTOR

-50

-25

0

25

50

75

TA - AMBIENT TEMPERATURE -

100

'c

125

FAIRCHILD LIC TRANSISTOR AND DIODE ARRAYS. 30XX SERIES
TYPICAL PERFORMANCE CURVES FOR 3045/3046/3086 (Cont'd)
INPUT OFFSET VOLTAGE FOR
DIFFERENTIAL PAIR AND PAIRED
ISOLATED TRANSISTORS AS A
FUNCTION OF AMBIENT TEMPERATURE
>

E

.~

w

~

100

\~~ V
....... ...?-

I
_I
VCE = 3.0 V

~

,,,.,..,, ... n,

I = 1 kHz - hie = 3.5 kn
TA = 25'C : h = 1.88 x 10-4
re
hoe = 15.6

~f10

VC~ = 3.~V

:J:

TA = 25'C

::;;

._~

I

800

~

600

~~

J

:J:

b

~~

I

~~

I-

0.50

1

I,....-

o

25

-25

50

75

100

125

'c

TA - AMBIENT TEMPERATURE -

NOISE FIGURE
ASA FUNCTION OF
COLLECTOR CURRENT
20

-

J

1~ ~
!"

TA = 25'C

~",c§2

.

0.Q1

0.02

~

~~

~¥

O.OS

'I'

0.5

1

0.1

J

RS = 1000 n
TA = 25'C

7

~~

.....

0.2

~ r--~

O.S

0.01

IC - COLLECTOR CURRENT - rnA

~ ..,./ /1

I--

I,C:;'

40

~ ~

lJ;

I

:=

~

20

~ ~

10

'"

~~

--

.I~

V

0.05

0.1

I~

o~~

..,,'"

~V
o

1/

0.02

O.S

1

COMMON - EMITTER CIRCUIT, BASE INPUT.
-

TA =2S'C
VCE = 3.0V
IC=I.0mA

/1
'/

/1

1/ /9;e

V

I'
5

10

20

~ ......

/'
50

.......
o

100 200

0.1 0.2

FREQUENCY - MHz

I -

r-

VCE=3.0V
IC= 1.0 rnA

w

~

2

5

10

20

O.S

r--- V CE = 3.0 V
Ie = 1.0 rnA

9r~ IS SM1LL IA~ FIREQU~NCIES
LESS THAN SOO MHz

-......

~~
-0.5

0:(.)
wVJ

~~

~

V
I /900
~ ~~
1

50 100 200

20

u.1

~~

I

'L

0.5

10

~ E

If

0.1 0.2

5

COMMON - EMITTER CIRCUIT, BASE INPUT.
r--TA =2S'C

8~

I

o

2

1

(.)

boel

,

1

REVERSE TRANSFER ADMITTANCE
AS A FUNCTION OF
FREQUENCY

EMITTER CIRCUIT, BASE INPU~

1

0.5

1- FREQUENCY - MHz

OUTPUT ADMITTANCE
AS A FUNCTION OF
FREQUENCY
r- ~~~~~~ -

0.5

INPUT ADMITTANCE
AS A FUNCTION OF
FREQUENCY

....

2

0.2

bieJ

i'

-20
0.1 0.2

/'

........., "'10 kHz

. 0.1

0.05

....... ~

IC - COLLECTOR CURRENT - rnA

\

8

/

. . . v,- kHz
~I-'

~

-10

V
./

r------ -

0.Q1

0.5

/

V

/

kHz

0.2

~

,F-r--;:,'<}

/

~

I---

25

V

0/

10

o

1

30

bi
ti~~

V CE = 3.0 V

;::,'<~v
}

...... ~r;~

o

NOISE FIGURE
AS A FUNCTION OF
COLLECTOR CURRENT

,<

-

~~$'

15

" r~

0.05 0.1

-

IC - COLLECTOR CURRENT - rnA

20

~

3!0 Iv
CE
Rs=500n

I

h~

0.Q1 0.02

.,

400

........

/'

z

~

hre

K le

0.1
-50

hie

r-

/

.....

hoe

0.25

-75

"- I~i'-

1L~

y.lmA

I

2
>

_
mA_

hoe

0.75

o
~

1000

~

~

re
h

>

1

~mho

r--

~~

o

~

GAIN·BANDWIDTH PRODUCT
AS A FUNCTION OF
COLLECTOR CURRENT

NORMALIZED h PARAMETERS
AS A FUNCTION OF
COLLECTOR CURRENT

-1

bre

"

1 0

-;.f.
o

J

50 100 200

-1.5

-2
1

1- FREQUENCY - MHz

10

20

f - FREQUENCY - MHz

8-21

50

100

200

•

SH3002
SPDT ANALOG SWITCH
FAIRCHILD INTEGRATED MICROSYSTEMS

GENERAL DESCRIPTION - The SH3002 is a SPOT analog switch which consists of a monolithic
TTL type gate driving apair of MOS switches.

•
•
•

CONNECTION DIAGRAM
10-LEAD METAL CAN
(TOP VIEW)
PACKAGE OUTLINE 5E

INPUTS TTL COMPATIBLE
LOW FEED THROUGH SPI KES ON THE OUTPUT
TYPICAL tON 75 ns

APPLICA TI ONS
Series Shunt Choppers
AID Conversion Single Pole Double Throw Relays
Multiplexing
Scanning

v+

NC

ABSOLUTE MAXIMUM RATINGS
Maximum Temperatures
Storage Temperature
Operating Temperature Military (3002)
Commercial (3002C)
Maximum Power Dissipation
at 2SoC Case
D
at 25 C Ambient
Maximum Voltages and Current
VCOM (Pin 8)
VNO, VNC (Pins 7 & 9)
V+ (Pin 10)
V- (Pin 6)

NC
D

D

-65 C to +150 C
D
D
-55 C to+125 C
ODC to + 70DC

GND

500mW
350mW
±12 V
±12 V
+11 V
-22V
10 mA
±6 V

INO,INC
V switch (Pin 4)

ORDER INFORMATION
TYPE
PART NO.
3002
SH3002HM
3002C
SH3002HC

EQUIVALENT CIRCUIT

9 V+

NO

I---------~---------I
Vsw 0

i
I

[>

i

I
I
o--------------~----~
I
I
I
L----T----------,----~
6v-

6GND

8-22

t----=F~r=;:~"i=i'9=:;='i::::tl
I

.015
MIN.

~rr=.~;1

.-l Seating

I Plane

.011

.009
.095
.065

I

.375
I
i-NOM.----I

TYP.

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Package weight is 2.0 grams

NOTES
All dimensions in inches
Leads are gold-plated kovar
Package weight is 0.95 gram
50 mil kovar header

(0)7A

(0)68
14-Lead Hermetic Dual In-line

16-Lead Hermetic Dual In-line
I------:j~------I

I

I

it::::: ::r~:

.025 R
NOM.

.755
.785

• I I .065
--j

--1.

,

k

~

r--.

~~::=i

i .015
.------------n
MIN.

Seating
lane

.045
.020 .015
.016

.

I

.020
MIN.

rp

.011

.009

I---

1--.045

W::~

.375
NOM.

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Package weight is 2.0 grams
*The .027/.037 dimension does not apply to
the corner leads

310

--j

~'290
=:J I
.011

~.375·~
NOM .

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for a conventional .020 inch
diameter lead
Leads are tin-plated kovar
Package weight is 2.2 grams
JEDEC TO-116 except for package width

9·5

•

PACKAGE OUTLINES

(P)9A

(0)7B
16-Lead Hermetic Dual In-line
I

JEDEC (TO-116)
14-Lead Molded Dual In-line

I

.755
.785

il: :::::::t~

T -~::::::=~=====~
.260
.240

L~:::;:;::::;:::;=;:;:::::;~~

~ ~.065
.045

r-:~--j

.011
.009

.045

--j II-.ofJ5

I

----i 1--.016

Jl

200
MAX.

Seating
Plane
.375

g

~~_____

~:=JI

.020
MIN.

~

R .045
.035
.085
.075

SeatIng+Plane. 150 .100

I

!

I

~
i i
.090--r---l

f---NOM:--l

STANDOFF

WIDTH

lYP.

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Package weight is 2.2 grams
The .037/.027 dimension does not apply to
the corner leads

.015
NOM.

~

~
II .020
----ii---. 016

.037
.025

STANDOFF

r-:~§gl :g1
A~-=f=T

.011
.009

I

.375

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Package weight is 0.9 gram

(P)9B

(P)9F

16-Lead Molded Dual In-line

10-Lead Molded Dual In-line

r--.

[I::::: :)r"

I

!

.250
.240

~:l
.150
.100

ir--t.09O
I .110
lYP.

Jl

~037
II .020
.025 -11--.

STANDOFF

016

4

I .375 NOM. I
I----I

II

S50

-----j
II I

.545 I I

6

10

i

I I .055
--l 1--.040

.,---~~.... ~~~.:g~g.
Ie
.015

11

l : : : $ 1 3/32 DIA .

L

:~~~ ~ ~ ~N~.

200

I

I---NOM~

WIDTH

~

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Package weight is 0.9 gram
* The '.037/.027 dimension does not apply to
the corner leads

l.080
.070

Seating

ili~: MIN.
020
MAX.
~_
-.l

Plane

.150
MIN.

J
l
~
.090
TYP.

WIDTH

~

..

--r

.037 II .020
.027 --11-.016
STANDOFF
WIDTH

NOTES:
All dimensions in inches
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are gold-plated kovar
Package weight is 0.65 gram

9-6

.011

.009

PACKAGE OUTLINES

(BP)9J

(AP)9H
Dual In-line Power Package (DIPP)

Dual In-line Power Package (DIPP)
With Bracket Heat Sink
:g~~ DIA. (2 PLC'S)

PIN 1 ID
DRILL FOR
4-40NC-2A THREAD

.125
.115
R .045
.035

I_~~~~~~~~~
~

I

.065
1--.045

.085
.075

COPPER SLUG

r--:~~g~
I
:~~g----j I

f-----.560. -

r--

~t ~J---l-------_m 'r
~~
.090

lYP.

.037
.025
STANDOFF
WIDTH

~~.020

r:

I,

.310~l

.540

I
, I

.290

-===:::J

Ff

.020
.010

+

II

JL·020

.011

L..

.016

--j -.009

.016

.073

NOTES:
All dimensions in inches
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Copper slug and tin-plated copper bracket

NOTES:
All dimensions in inches
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Leads are tin-plated kovar
Copper slug

(H)CS

(T)9T
JEDEC (TO-39)

8-Lead Molded Dual In-line

~.:~

r~
:):}:~Nm~
L
'5'---'8'

SEATINGflm
\" l
1
PLANE
.l25 MIN. . '
'

--L.--110
'090

J ':--,\ -

lYP.

:g~~

~--~

.039 NOM.
TYP. 4 PLCS

Seating
Plane

I - ,..

~tr~!.

17° NOM.
TYP.
2 PLCS.

-t

.260
.240

~ ~ ~~~IN.
METAL

,011
3° NOM

·370DIA.
.350

'0~3'
~
1

MAX.

.375 NOM.

JL;: =-. ""L -lf~_1

F

335
:315 DIA,

.009
LEAD NO.3

NOTES
All dimensions in inches
Leads are intended for insertion in hole
rows on .300" centers
They are purposely shipped with "positive"
misalignment to facilitate insertion
Board-drilling dimensions should equal your
practice for .020 inch diameter lead
Package weight is 0.6 gram
Leads are tin or gold-plate kovar

NOTES:

9-7

All dimensions in inches
Leads are gold-plated over nickel-flash on steel
Lead No. 3 connected to case
Low thermal resistance
Package weight is 0.76 gram

•

PACKAGE OUTLINES

(K)GJ

(U)GH
JEDEC (TO-220)
Molded Power Package

JEDEC (TO-3)

.------===i==;--;:=;:;:.;;----i~1·,~
OUTPUT

I
325

...L..-===~~=--.L-_IN_PU_T-,

----

.145.'

:~~ .L

~F~~1"-----'r

II

.135
MAX.

.0~5~5

1

:gjJOIA.

.095

XX?

:;J

SEAPlANJlNGE-L--.:::
tL..il.-t-..u....._-_.....
.055
·.020

.31~ Seating Plane
I

t 1..210
.190

.045

.141 01A

II

"I=di;!JJ~

I-lo-----:==-"-=r---:-T

COMMON 1-lo-_=='-=7

r-:m'-l

SECTION X . X
.030

.015~A

.188 R MAX.

2 Places

H-:~~

NOTES:
All dimensions in inches
Mounting tab is electrically connected ~o
COMMON
Package is molded with nickel plated copper
tab and leads
Package weight is 2.1 grams

NOTES
All dimensions in inches
Leads 1 and 2 electrically isolated from case
Case
is
third
electrical connection
(COMMON)
Leads are gold-plated copper cored kovar
Package weight. is 7.4 grams

9-8

ORDER INFORMATION
A simplified ordering procedure for Fairchild linear integrated circuits is introduced with the publication of this catalog.
Three basic units of information are contained in the new code.
741
Device Type

C

D
Package Type

Temperature Range

DEVICE TYPE
This group of alpha numeric characters defines the data sheet which specifies the device functional and electrical characteristics.

PACKAGE TYPE
One letter represents the basic package style.
D
F
H

= Dual In-line Package (Hermetic)
= Flatpak (Hermetic)
= Metal Can Package

J = Metal P?wer Package (TO-66 Outline)

K
P
T
U

=
=
=
=

Metal Power Package (TO-3 Outline)
Dual In-line Package (Molded)
Mini DIP
Power Package (Molded, TO-220 Outline)

Different outlines exist within each package style to accommodate various die sizes and number of leads. Specific dimensions
for each package can be found in the PACKAGE OUTLINES section of this catalog.
TEMPERATURE RANGE
Two basic temperature grades are in common use:
C

= Commercial/Industrial/Consumer

M

= Military
_55° C to +125° C
-55°C to + 85°C

O°C to +70/75°C
-20°C to +85°C
_40° C to +60° C
_40° C to +85° C

Exact values and conditions are indicated on the individual data sheets.

EXAMPLES
1.

710FM
This number code indicates a JiA710 Voltage Comparator in a flatpak with military temperature rating capability.

2.

725EHC
This number code indicates a JiA725 Instrumentation Operational Amplifier, electrical option E, in a metal can with a
commercial temperature rating capability.

DEVICE IDENTI FICATION/MARKING
All Fairchild standard catalog linear circuits will be marked as the following example:
710DC

F Date Code

All second sourced items will be identified and marked with the original manufacturer's part number/order code:
SN75107J

F Date Code

UNIQUE 38510 PROCESSING
Additional processing to Fairchild Unique 385.10 specifications is indicated by noting the appropriate requirements (OB,
OC) after the standard order code.
Detailed ordering procedures are provided in the OEM price list. (Also see page 11-1 ).

OLD ORDER CODES
Devices may continue to be purchased against old order codes (Example: U5R7723393;how 723HC). However, all products
will be marked with new order codes unless otherwise specified.

10-1

•

MIL·M·38510/MIL·STD·883
Fairchild Analog Products has within it a unique "company" totallv dedicated to the processing of Hi-Rei parts. This
company is complete with marketing, production, engineering, production control and quality assurance functions designed
specifically to serve the special needs of the Hi-Rei customer.
Our standard Hi-Rei process flow is M I L-M-3851 O. Fairchild maintains an inventory of MI L-M-3851 0 Class B processed
parts.
Where an approved JAN slash specification exists (i.e. M3851 0/1 01) inventory is maintained for the JAN Class B part
(i.e. JAN M3851 0/1 01 01 BGC).
Where an approved slash specification does not exist product is processed per Fairchild's UNIQUE 38510 program Class B
and inventoried. This UN IQUE 38510 inventory is available for processing to specific customer drawings or may be ordered
directly from one of the standard processing options listed below.

UNIQUE 38510 CLASS CODES:
QB
QC

MIL-M-38510 Class B Process Flow
MIL-M-38510 Class C Process Flow

Number Options:
OPTION 1
OPTION 2
OPTION 3
OPTION 4
OPTION 5
OPTION 6
OPTION 7

These options apply to operations performed on each unit delivered:
Lead form to dimensions in detail specification, followed by hermetic seal tests.
Hot solder dip finish.
Read and record critical parameters before and after burn-in.
Initial qualification, Group B & C quality conformance not required.
Radiographic inspection shall be performed on all devices.
Special marking required.
Non-conforming variation - - refer to procurement documents for details (must be negotiated with
factory.)

Letter Options:
OPTION A
OPTION B
OPTION C

These options apply once per Purchase Order or line item and are considered Test Charges:
Group B testing shall be performed on customer's parts.
Group C testing shall be performed on customer's parts.
Generic data to be supplied from the latest completed lot.

The UNIQUE 38510 general specification and the detailed slash specifications are available upon request.

•
11-1

DICE POLICY
GENERAL INFORMATION
Fairchild linear integrated circuits, constructed using the Fairchild Planar* epitaxial process, are available in dice form
incorporating these features:
•
•
•
•
•

Commercial or Military Selection (Military Limits Probed at 25°C)
M I L-STD-883, Method 2010.1, Condition B Visual
Gold Backing
Glass Passivation
Protective Packaging

ELECTRICAL CHARACTERISTICS
Each die is electrically tested at 25°C to guaranteed commercial dc parameters.
Military grade die are similarly selected and defined as the 25°C dc military data sheet limits probed at 25°C.

QUALITY ASSURANCE
All Fairchild linear dice are 100% visually inspected and conform to MIL-STD-883, Method 2010.1, Condition B. In
addition, quality control visually inspects the dice to a given sampling plan.
Each die is gold backed to aid die attach. For protection in handling and assembly, each die has a glass passivation coating
with only the bonding pads exposed.

SHI PPI NG PACKAGES
Linear dice are packaged in containers with an anti-static sheet inserted between the lid and the dice. This sheet guards
against electrostatic damage during shipment and storage.
The clear plastic carrier allows visual inspection of all the packaged dice. Each carrier is heat sealed within a transparent bag.
A small piece of dehydrator paper with humidity indicating color is inserted in each bag prior to sealing.

O'RDER INFORMATION
The minimum order quantity is in 25 piece multiples of value greater than $250.00 per line item of commercial grade die.
For ordering information and pricing on military grade die, contact your local Fairchild distributor or Fairchild sales office.
Each linear integrated circuit die has a unique order code which describes the device type, the dice designation and type of
electrical tests performed. The dice designation is denoted by an "X" and is substituted for the package code. Examples
follow:
Generic Type
Order Code
741C**
3045
75450
lOlA

741XC
CA3045X
SN75450X
LM101AX

**Some device types imply a military or commercial range by the generic type. Where this does not occur the suffix should be:

or

XM

Military Grade Die

XC

Commercial Grade Die

SPECIAL CHIP PROCESSING
If there is a need for additional testing or processing, Fairchild will negotiate with the customer to meet his requirements.

PRODUCT AVAILABLE IN DICE FORM
Please refer to FSC OEM Price List for product available in die form.
*Planar is a patented Fairchild process.

12-1

•

LINEAR CROSS REFERENCE GUIDE

MOTOROLA
DEVICE ORDER NUMBER FORMAT
MC

14
1

_ _ _ _ _---11

MANUFACTURER
IDENTIFICATION

58
,

TEMPERATURE
RANGE

PACKAGE CROSS REFERENCE
PACKAGE

MOTOROLA

FAIRCHILD

L

D

Dual In-line MOLDED

P

P

Flatpak

F

TO-5 Can

G,R

F
H

MC943
MC1303
MC1304
MC1305
MC1307
MC1310
MC1326
MC1328
MC1339
MC1350
MC1351
MC1352
MC1353
MC1355
MC1357
MC1358
MC1364
MC1370
MC1371
MC1410
MC1414
MC1420
MC1429
MC1430
MC1431
MC1433
MC1435
MC1436
MC1437
MC1438
MC1439
MC1440
MC1441
MC1445
MC1446
MC1456
MC1458
MC1460
MC1461
MC1463

1 - '_ _ _ _

DEVICE
TYPE

PACKAGE
TYPE

TEMPERATURE RANGE CROSS REFERENCE

Dual In-line HERMETIC

MOTOROLA

P

TEMPERATURE RANGE:j:

MOTOROLA

FAIRCHILD

COMMERCIAL

13,14

C

MILITARY

15

M

:j: See Order I nformation for values

*FAIRCHILD
*FAIRCHILD
*FAIRCHILD
*FAIRCHILD
*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL MOTOROLA
DIRECT
FUNCTIONAL MOTOROLA
DIRECT
FUNCTIONAL
REPLACEMENT EQUIVALENT
REPLACEMENT EaUIVALENT
REPLACEMENT EaUIVALENT
SH2001
p.A749C
p.A732C
p.A732C
p.A767C
p.A758C
p.A746C
p.A746C
p.A749C
p.A757C
3065
,."A757C
p.A757C
3065
2136
3065
3064
p.A780C
p.A781C
p.A733C
p.A711C
p.A733C
p.A730C
p.A702C
p.A702C
301
p.A749C
301
p.A749C
p.A749C
301
7525
7524
p.A733C
p.A733C
p.A725C
1458
p.A723C
p.A723C
p.A723C

MC1466
MC1469
MC1488
MC1489
MC1496
MC1509
MC1510
MC1514
MC1519
MC1520
MC1525
MC1526
MC1529
MC1530
MC1531
MC1533
MC1535
MC1536
MC1537
MC1539
MC1540
MC1541
MC1543
MC1545
MC1546
MC1550
MC1552
MC1553
MC1556
MC1558
MC1560
MC1561
MC1563
MC1566
MC1569
MC1580
MC1582
MC1583
MC1584
MC1590

p.A723C
p.A723C
9616C
9617C
p.A796C
p.A733
p.A733
p.A711
p.A733
101
p.A730
p.A730
p.A730
p.A702
p.A702
101
p.A749
p.A741
p.A749
101
7525
7524
7524
p.A733
p.A733
p.A757
p.A715
p.A715
p.A725
1558
p.A723
p.A723
p.A723
p.A723
p.A723
9615
9614
9615
9615
p.A757

*See specific data sheet for complete order part number.

13-2

MC1596
MC1709
MC1710
MC1711
MC1712
MC1723
MC1741
MC1748
MC75107A
MC75108A
MC75109
MC75110
MC75325
MC55107A
MC55108A
MC55109
MC55110
MFC4060
MFC6010
MFC8000
MFC8001
MFC8002
MFC8030
MFC8040
MFC8070
MLM101A
MLM105
MLM107
MLM109
MLM201
MLM205
MLM207
MLM209
MLM301
MLM305
MLM307
MLM309

p.A796
p.A709
p.A710
p.A 711
p.A702
p.A723
p.A741
p.A748
75107A
75108A
75109
75110
75325
55107A
55108A
55109
55110
p.A723
p.A703
p.A739
p.A739
p.A739
p.A703
p.A791
p.A742
101A
105
107
109
201
205
207
209
301
305
307
309

NATIONAL

DEVICE ORDER NUMBER FORMAT

LM
MANUFACTURER
IDENTIFICATION

1

01

TEMPERATURE
RANGE

PACKAGE CROSS REFERENCE

H
DEVICE
TYPE

PACKAGE
TYPE

TEMPERATURE RANGE CROSS REFERENCE

PACKAGE

NATIONAL

FAIRCHILD

Dual In-line HERMETIC

D,J

D

COMMERCIAL

3,2

C

Dual In-line MOLDED

N

T,P

MILITARY

1

M

Flatpak

F,W

F

TO-3 Can

K

K

TO-5 Can

H,G

H

NATIONAL

DM7820
DM7820A
DM7822
DM7830
DM7831
DM7832
DM8820
DM8820A
DM8822
DM8830
DM8831
DM8832
LHOO02
LHOO02C
LH0020
LH0020C
LH0021
LH0021C
LH0041
LH0041C
LH0042
LH0042C
LH0052
LH0052C
LH10l
LH201
LH2101A
LH2201A
LH2301A
LH2108
LH2208
LH2308
LH2110
LH2210
LH2310
LH2111
LH2211
LH2311
LH24250
LH24250C

*FAIRCHILD
DIRECT
REPLACEMENT

*FAIRCHILD
FUNCTIONAL
EQUIVALENT
9615
9615
9617
9614
9614
9614
9615
9615
9617
9614
9614
9614
JlA791
JlA 791 C
JlA725
JlA725C
JlA791
JlA 791 C
JlA791
JlA791C
JlA740
JlA740C
JlA740
JlA740C
107
207
lOlA
201A
301A
108
208
308
110
210
310
111
211
311
JlA776
JlA776C

NATIONAL

LM100
LM101
LM101A
LM102
LM104
LM105
LM106
LM107
LM108
LM108A
LM109
LM110
LMlll
LMl12
LMl18
LMl19
LM120
LM121
LM160
LM161
LM200
LM201
LM202
LM204
LM205
LM206
LM207
LM208
LM208A
LM209
LM210
LM211
LM216
LM216A
LM218
LM219
LM219
LM300
LM301A
LM302

TEMPERATURE RANGE:j:

NATIONAL

FAIRCHILD

:j: See Order Information for values

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL NATIONAL
REPLACEMENT EQUIVALENT
JlA723
101
lOlA
102
104
105
JlA760
107
108
108A
109
110
111
JlA776
JlA772
JlA760
JlA78NOO
JlA727
JlA760
JlA760
JlA723C
201
202
204
205
JlA710C
207
208
208A
209
210
211
JlA740
JlA740
JlA772
JlA760
JlA760
JlA723
301A
302

*See specific data sheet for complete order part number.

13-3

LM304
LM305
LM306
LM307
LM308
LM308A
LM309
LM310
LM311
LM312
LM316
LM316A
LM318
LM320-05
LM340-05
LM340-06
LM340-08
LM340-12
LM340-15
LM340-18
LM340-24
LM350
LM376
LM709
LM709A
LM709C
LM710
LM710C
LM711
LM711C
LM723
LM723C
LM725
LM725A
LM725C
LM733
LM733C
LH740A
LH740AC
LM741

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL
REPLACEMENT EQUIVALENT
304
305
JlA710C
307
308
308A
309
310
311
JlA776C
JlA740C
JlA740C
JlA772C
JlA78N05
JlA7805C
JlA7806C
JlA7808C
JlA7812C
JlA7815C
JlA7818C
JlA7824C
75325
376
JlA709
JlA709A
JlA709C
JlA710
JlA710C
JlA711
JlA711C
JlA723
JlA723C
JlA725
JlA725A
JlA725C
JlA733
JlA733C
JlA740
JlA740C
JlA741

•

NATIONAL (Cont'd)

NATIONAL

LM741C
LM747
LM747C
LM748
LM748C
LM1488
LM1489
LM1489A
LM1414
LM1458
LM1514
LM1558

*FAIRCHILD
*FAIRCHILD
FUNCTIONAL NATIONAL
DIRECT
REPLACEMENT EQUIVALENT
~A741C
~A747
~A747C

~A748
~A748C

9616
9617
9617
~A711C

1458
~A711

1558

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL NATIONAL
REPLACEMENT EQUIVALENT
~A776

LM4250
LM4250C
LM7520
LM7521
LM7522
LM7523
LM7524
LM7525
LM7528
LM7529
LM7534
LM7535
LM7538

~A776C

7524
7524
7524
7524
7524
7525
7528
7529
7534
7535

7524
7524

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL
REPLACEMENT EQUIVALENT

LM7539
LM75325
LM75450A
LM75451A
LM75452
LM75453
LM75454
LMDAC-01
NHOO011
NHOO011CN
NHOOO13
NHOOO16
NHOOO17
NHOOO18

7524
75325
75450A
75451A
75452
75453
75454
~A722

SH2001
SH2002
SHOO13
SH2200
SH2200
SH2200

RCA
DEVICE ORDER NUMBER FORMAT

PACKAGE CROSS REFERENCE
PACKAGE

RCA

FAIRCHILD

Dual In-line HERMETIC

D

D

Dual In-line MOLDED

E

P

TO-5 Can MOLDED

T

H

DICE

H

X

RCA

*FAIRCHILD
DIRECT
REPLACEMENT

*FAIRCHILD
FUNCTIONAL
EQUIVALENT

RCA

. CA3000
~A702
CA3033
CA3001
~A733
CA3033A
CA3002
~A703
CA3035
CA3004
~A703
CA3036
CA3005
~A703
CA3037
CA3006
~A703
CA3037A
CA3007
~A716
CA3038
CA3008
~A702
CA3038A
CA3008A
~A702
CA3039
CA3040
CA3010
~A702
CA3041
CA3010A
~A702
CA3042
CA3011
~A753
CA3043
CA3012
~A753
CA3044
CA3013
~A753
CA3045
CA3014
~A753
CA3046
CA3015
~A702
CA3047
CA3015A
~A702
CA3048
CA3016
~A702
CA3048H
CA3016A
~A702
CA3018
CA3050
3018
CA3018A
3018A
CA3051
CA3019
3019
CA3052
CA3021
~A757
CA3053
CA3022
~A757
CA3054
CA3023
~A757
CA3058
CA3026
3026
CA3059
CA3028
~A703
CA3060A
CA3028A
~A703
CA3060B
CA3029
~A702
CA3060
CA3029A
~A702
CA3064
CA3030
~A702
CA3065
CA3030A
~A702
CA3066
..
* See specific data sheet for complete order part number.

____________CA
~I

3045 _________
I~

MANUFACTURER
IDENTIFICATION

*FAIRCHILD
DIRECT
REPLACEMENT

*FAIRCHILD
FUNCTIONAL
EQUIVALENT
~A709

~A709
~A739

3036
~A709
~A709
~A709
~A709

3039
~A733

3065
3065
3065
3064
3045
3046
~A709
~A749
~A749
~A730
~A730
~A739
~A703

3054
~A742
~A742

~A739
~A739
~A739

3064
3065
3066

13-4

RCA

CA3067
CA3070
CA3071
CA3072
CA3075
CA3076
CA3078
CA3079
CA3085
CA3085A
CA3085B
CA3086
CA3088
CA3089
CA3090
CA3091
CA3118
CA3118A
CA3146
CA3146A
CA3458
CA3541
CA3558
CA3741C
CA3741
CA3747C
CA3747
CA3748C
CA3748
CA6741

DEVICE
TYPE

*FAIRCHILD
DIRECT
REPLACEMENT

*FAIRCHILD
FUNCTIONAL
EQUIVALENT

3067
~A780
~A781
~A746

3075
3076
~A776
~A742

~A723
~A723
~A723

3086
~A720

3075
~A758
~A795

3018
3018
3046
3046
1458
7524
1558
~A741C
~A741
~A747C
~A747

~A748C

~A748
~A741

SIGNETICS
DEVICE ORDER NUMBER FORMAT
NE

I
TEMPERATURE
RANGE

501

--L--

A

~I__________

PACKAGE
TYPE

DEVICE
TYPE

TEMPERATURE RANGE CROSS REFERENCE

PACKAGE CROSS RE FERENCE
SIGNETICS

PACKAGE

FAIRCHILD

TEMPERATURERANGE*

SIGNETICS

FAIRCHILD

Dual In-line HERMETIC

F,I

D

COMMERCIAL

NE,N

C

Dual In-line MOLDED

A,B

P

MILITARY

SE,S

M

Mini DIP

V

T
F

Flatpak

W,Q

TO-3Can

DA

K

TO-5 Can

DB,K,T

H

SIGNETICS

501
510
511
515
516
518
526
527
528
529
531
533
536
537
550
592
J,LA709
J,LA71 0

*FAIRCHILD
DIRECT
REPLACEMENT

* See Order I nformation for values

*FAIRCHILD
FUNCTIONAL SIGNETICS
EQUIVALENT
J,LA733
J,LA730
3045
J,LA730
J,LA740
J,LA711
J,LA71 0
J,LA760
7524
J,LA760
J,LA715
J,LA776
J,LA740
J,LA725
J,LA723
J,LA733

J,LA711
J,LA723
J,LA733
J,LA740
J,LA741
J,LA747
J,LA748
5556
5558
7520
7521
7522
7523
7524
7525
75450
75450A

J,LA709
J,LA71 0

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL SIGNETICS
REPLACEMENT EQUIVALENT
75451
75451 A
LM10l
LM107
LM108
LM109
LM201
LM207
LM209
LM301
LM307
LM308
LM309
8T13
8T14
8T23
8T24

J,LA711
J,LA723
J,LA733
J,LA740
J,LA741
J,LA747
J,LA748
J,LA776
1458
7524
7524
7524
7524
7524
7525
75450A
75450A

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL
REPLACEMENT EQUIVALENT
75451 A
75451 A
101
107
108
109
201
207
209
301
307
308
309
8T13
8T14
8T23
8T24

* See specific data sheet for complete order part number.

SPRAGUE
DEVICE ORDER NUMBER FORMAT
ULN
I

MANUFACTURER
IDENTIFICATION

SPRAGUE

ULN2111
ULN2113
ULN2114
ULN2120
ULN2121
ULN2122

*FAIRCHILD
DIRECT
REPLACEMENT

2120
I

DEVICE
TYPE

N

3065
J,LA746
J,LA732

J,LA767
J,LA732

SPRAGUE

FAIRCHILD

Dual In-Line MOLDED

A,N

P

TO-5 Can

K,W

H

*FAIRCHILD
DIRECT
REPLACEMENT

*FAIRCHILD
FUNCTIONAL
EQUIVALENT

PACKAGE

I

PACKAGE
TYPE

*FAIRCHILD
FUNCTIONAL SPRAGUE
EQUIVALENT

2136

PACKAGE CROSS REFERENCE

ULN2124
ULN2126
ULN2127
ULN2128
ULN2129
ULN2131

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL SPRAGUE
REPLACEMENT EQUIVALENT
J,LA780
J,LA739
J,LA781
J,LA767
3075
J,LA753

*See specific data sheet for complete order part number.

13-5

ULN2136
ULN2165
ULX2205
ULX2211
ULX2275
ULX2277

2136
3065
J,LA706
J,LA704
J,LA705
J,LA705

•

TEXAS INSTRUMENTS
DEVICE ORDER NUMBER FORMAT
SN

75

MANUFACTURER
IDENTIFICATION

450

TEMPERATURE
RANGE

PACKAGE CROSS REFERENCE
T.I.

PACKAGE

N

DEVICE
TYPE

PACKAGE
TYPE

TEMPERATURE RANGE CROSS REFERENCE
FAIRCHILD

TEMPERATURE RANGEt

T.I.

FAIRCHILD

D

COMMERCIAL

75,72

C

Dual In-line MOLDED

N

P

MILITARY

55,52

M

Mini DIP

P

T

Flatpak

H,U,Z,W

F

TO-5 Can

L

H

Dual In-line HERMETIC

T.I.

SN52101A
SN52107
SN52510
SN52558
SN52702
SN52709
SN52709A
SN52710
SN52711
SN52720
SN52733
SN52741
SN52747
SN52748
SN52770
SN52771
SN52810
SN52811
SN52820
SN5510
SN5511
SN5512
SN5514
SN55107A
SN55108A
SN55109
SN55110
SN70024
SN72301A
SN72307
SN72400
SN72510
SN72558
SN72702
SN72709
:)
SN72710
SN72711
SN72720
SN72733
SN72741
SN72748
SN72770
SN72771

*FAIRCHILD
*FAIRCHILD
FUNCTIONAL
DIRECT
REPLACEMENT EQUIVALENT

101A
107

J,tA71 0
J,tA71 0

1558
J,tA702
J,tA709
J,tA709A
J,tA71 0
J,tA711
J,tA711
J,tA733
J,tA741
J,tA747
J,tA748
J,tA740
J,tA740
J,tA71 0
J,tA711
J,tA734
J,tA733
J,tA733
J,tA733
J,tA733
55107A
55108A
55109
55110
J,tA706C
301
307
J,tA723C
J,tA710C
1458
J,tA702C
J,tA709C
J,tA710C
J,tA711C
J,tA711C
J,tA733C
J,tA747C
J,tA748C
J,tA740C
J,tA740C

T.I.

SN72810
SN72811
SN72820
SN7510
SN7511
SN7512
SN7514
SN7520
SN7521
SN7522
SN7523
SN7524
SN7525
SN7526
SN7527
SN7528
SN7529
SN75100L
SN75107A
SN75108A
SN75109
SN75110
SN75114
SN75115
SN75150
SN75152
SN75154
SN75182
SN75183
SN75232
SN75233
SN75234
SN75235
SN75238
SN75239
SN75324
SN75325
SN75326
SN75327
SN75450
SN75451
SN75452
SN75453

* See 'specific data sheet for complete order part number

t See Order Information for values.

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL
REPLACEMENT EQUIVALENT

J,tA710C
J,tA711C
J,tA734C
J,tA733C
J,tA733C
J,tA733C
J,tA733C
7524
7524
7524
7524
7524
7525
7524
7524
7524
7524
9615
75107A
75108A
75109
75110
9614C
9615C
9616C
9627C
9617C
9615
9614
7534
7525
75234
75235
7524
7524
75325
75325
75325
75325
75450A
75451A
75452
75453

T.I.

SN75454
SN75460
SN75461
SN75462
SN75463
SN75464
SN76001
SN76003
SN76005
SN76010
SN76013
SN76050
SN76104
SN76105
SN76107
SN76110
SN76131
SN76149
SN76177
SN76242
SN76243
SN76246
SN76266
SN76267
SN76350
SN76550
SN76552
SN76553
SN76564
SN76603
SN76619
SN76630
SN76640
SN76642
SN76643
SN76660
SN76665
SN76666
SN76670
SN76675
SN76676
SN76680

*FAIRCHILD
*FAIRCHILD
DIRECT
FUNCTIONAL
REPLACEMENT eQUIVALENT

75454
75460
75461
75462
75463
75464
J,tA706C
J,tA706C
J,tA706C
J,tA706C
J,tA706C
J,tA706C
J,tA732C
J,tA732C
J,tA767C
J,tA767C
J,tA739C
J,tA749C
J,tA705C
J,tA780C
J,tA781C
J,tA746C
3066
3067
J,tA720C
J,tA723C
J,tA723C
J,tA723C
3064
J,tA703C
J,tA703C
J,tA786C
3065
3075
2136
3065
3065
3066
3065
3075
3076
3065

The following is a list of currently available linear integrated circuits application notes. For your convenience, they are organized by
application note number, product number and function. For application notes and the most recent Fairchild Semiconductor
Application Literature Index write to:

Fairchild Semiconductor
Technical I nformation Center
P.O. Box 880A
Mountain View, California 94040

LINEAR INTEGRATED CIRCUITS APPLICATION NOTE INDEX BY NUMBER
APP-116
117/2
123
125
171

175
186
195
196
203
204
205
208
210
218

225
229
243
254
261
265
267
268
269

APP-270

The Operation and Use of a Fast Integrated
Circuit Comparator, 1966
Frequency Compensation Techniques for an
I ntegrated Operational Amplifier, 1966
Core Memory Sense Amplifier Designs Using an
I ntegrated Circuit, 1966
A Versatile Tester for Linear Integrated
Circuits, 1966
Applications of the MA739 and MA749 Dual
Preamplifier I ntegrated Circuits in Home
Entertainment Equipment, 1969
The MA739, A Low Noise Dual Operational
Amplifier, 1969
Marker Beacon Receiver and Display, 1970
Radiation Testing of Linear Microcircuits, 1966
Space and Nuclear Environments and their
Effects on Semiconductors, 1967
A Comparison of Solid State Subcarrier
Oscillators for Color TV Receivers, 1970
An Integrated Circuit AGC IF Amplifier, 1970
Thermal Evaluation of Integrated Circuits,
1970
A Monolithic Zero Crossing AC Trigger
(TRIGAC) for Thyristor Power Controls, 1971
Integrated TV Chroma Processing System, 1971
The J.1A776, An Operational Amplifier with
Programmable Gain, Bandwidth, Slew Rate,
and Power Dissipation, 1971
Gated Pulse Rate Function Multiplier, 1967
Analog-to-Pulse Width Converter, 1968
Some Useful Signal Processing Circuits Using
FETs and Operational Amplifiers, 1968
Black Level Considerations in High Quality TV
Receivers, 1969
A High Speed, Zero Input Current Chopper
Amplifier, 1969
The MA715 A Versatile High Speed
Operational Amplifier, 1969
The MA746E Color TV Chroma Demodulator
IC, 1969
Applications of the MA749 Dual Operational
Amplifier, 1969
The MA749 Dual Operational Amplifier, 1969

271
276
277

281
283
286
289
293
297
299
300
301
311
312
315
317
318
319
320
321
. 323
324

14-2

A Trapezoidal Deflection Circuit for Use with
the 3250 Numeric Character Generator Using
the MA715, 1969
A High Speed Sample and Hold Using the
MA715, 1969
More Voltage Regulator Applications Using the
MA723,1969
A Low Drift, Low Noise Monolithic Operational Amplifier for Low Level Signal Processing, 1969
A Minimum Component MA749 Voltage-toFrequency Converter with 1% Accuracy, 1970
Even More Voltage Regulator Applications
Using the MA723 - Number 2, 1970
The MA729, MA732 and MA767 Integrated
Circuit Stereo Multiplex Decoders, 1970
Applications of the MA741 Operational Amplifier, 1970
A Low Level Wideband Video Amplifier, 1971
An I mproved Sample and Hold Circuit Using
the MA740, 1970
Proposed Integrated Circuit for Appliance or
Process Control, 1969
Applications of the MA777 1971
The Power Amplifier Using the MA777, 1971
MA760, A High Speed Monolithic Comparator, 1971
The MA7800 Series Three Terminal Positive
Voltage Regulators, 1971
The MA750 Dual High Current Comparator and
Some of its Appl ications, 1972
A High Output Power (5 W), Low Distortion IC
Audio Amplifier, 1972
Integrated Circuits for FM Receivers, 1972
The MA758, Phase Locked Loop Stereo
Multiplex Decoder, 1972
MA9616/9617 EIA Interface Driver and
Receiver, 1972
Operational Amplifiers as Inductors, 1972
Voltage Comparator Applications Using the
MA734, 1972
Applications of the 9650 4-Bit, High Speed,
.; Precision Current Source, 1972

LINEAR INTEGRATED CIRCUITS APPLICATION NOTE INDEX BY FUNCTION
FUNCTIONAL CATEGORY
Amplifiers
AGC
Audio
Chopper
Comparator
Compensation
DC
Differential
Dual
High Speed
High Input Impedance
IF
Integrating
Low Noise
Operational
Power
Power-Audio
Preamp
Sample and Hold
Sense
Video
Wideband
Communication Systems
FM Radio
Pulse Modulation
Data Transmission
Comparators
Compressors
Controls
Process
Remote
Converters
Analog to Digital
Analog to Pulse
Digital to Analog
Voltage to Frequency
Data
Acquisition & Reduction
Systems
Transmission
Decoders, Multiplex
Demodulators
FM
Pulse
Detectors
Level
Minim.um Frequency
Peak, Peak to Peak
Zero Crossing

APPLICATION NOTES

204,243
171,175,301,317
261
116,123,268,289
117/2,300
269
300
268,269
265
265
112,256,318
289
175,277
117/2,218,265,268,269,
270,277,297,300,321
116,289,301
258,259,317
123,171,175,243
271,297
123
265,293
265,293
318,319
229,320,323
320
116,123,311,315,323
243
208
299
171
311,324
229
324
281
297
320, 116,311
286,318,319
318
172,311,323
116,311
315
311
208,311
14.-3

FUNCTIONAL CATEGORY

APPLICATION NOTES

Discriminators, Frequency
Displays, Numeric
Division, Frequency
Filters, Analog
Active
Band Pass
Tunable
Generators
Clock
Numeric Character
Instrumentation
Digital
Indicator
Analog Status
Malfunction
Phase Meter
Line Drivers
Li ne Receivers
Multivibrators, Monostable
Noise
Immunity
Low Noise Techniques
Measurement
Oscillators
Audio
Crystal Controlled
Pulse
Sinusoidal
Subcarrier
Voltage Controlled
Wien Bridge
Parameter Measurement
Power Supplies, Regulators
Radiation Effects on
Semiconductors
Te!evision - See also
Communication Systems
Color Signal Processing
Section-Video Ampl ifier Section
Testers - See also
Instrumentation
Linear
Testing
Transducer - See also Controls
Voltage Regulators

186,318
270
323
243,321
243
243
163
270
324
315
315
315,323
320
116, 311, 320
116
116
229
229
300
145
323
230,300
203
323,281
300
195, 196
116,276,283,312
195, 196

210,267
254,293
125
205
229
276,283,312

•

LINEAR INTEGRATED CIRCUITS APPLICATION NOTE INDEX BY PRODUCT NUMBER
LINEAR INTEGRATED CIRCUITS

APPLICATION NOTES

117/2, 125, 195
203
317,318
125,195,229
116,125,195,225
116,123,125
261,265,270
276,283
277
290
323
171, 175, 186
297
186,243,289
208,299
254,267
210
171,268,269,281
315
318
204
318,319
311
218
300,301,321
210
210
318
312
320
320
324

702
703
706
709
710
711
715
723
725
727
734
739
740
741
742
746
747
749
750
753
757
758
760
776
777
780
781
3075
7800
9616
7617
9650

14-4

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11. Rue Sainte Felicite
75 Paris 15.
Tel: 824-8494 Telex: 842-20614
HOLLAND
Fairchild Semiconductor
Walll
Eindhoven. Holland
Tel: 0314067727 Telex: 044 51024
HONG KONG
Semiconductor. ltd.
135 Hoi Bun Road
P.O. Box 9575
Kwun Tong. Kowloon
Tel: 890271 Telex: 780-3531
ITALY
Fairchild Semiconducttori. S.p.A.
Via F. Lampertico 7
00191 Roma
Tel: 32 78 434
Fairchild Semiconducttori. S.p.A.
Via Palmanova 67 - II B
20132 Milan
Tel: 2899248 Telex: 043 34338

GERMANY
Fairchild Halbleiter GmBH
European Headquarters
6202 Wiesbaden Biebrich
Postfach 4559
Hagenauer Strasse 38
Tel: 0612112051 TWX: 041-86588
Fairchild Halbleiter GmBH
Bayerstr. 15
8000 Munchen 2
Tel: 0811/593632 Telex: 0524831
Fairchild Halbleiter GmBH
Konigsworther Str. 23
3000 Hannover
Tel: (0511) 1 7844 Telex: 092-2922
Fairchild Halbleiter GmBH
Parler Strasse 65
7000 Stuttgart-Nord
Tel: (0711) 22 35 75 Telex: 072-2644
JAPAN
TDK -Fa irch ild
Sanyo Kokusaku Bldg. 2nd FI.
7-B Shiguya 1-Chrome
Shibuya-KU. Tokyo. Japan
Tel: (03) 400-8351 TWX: 2424173

MEXICO
Fairchild Mexicana SIA
Blvd. Presidente Adolfo Lopez Mateos 163
Col. Mexcoac. Mexico 19. D.F.
Tel: 563 5411 Telex: 0071-71-038
SWEDEN
Fairchild Semiconductor AB
Svartensgatan 6.
S·11620 Stockholm
Tel: 08-449255 Telex: 17759
UNITED KINGDOM
Fairchild Semiconductor ltd.
Kingmaker House. Station Road
New Barnet. Herts EN5 INX
Tel: 0441/4407311 Telex: 051·262 835

FAIRCHILC
SEMICONDUCTOR

©1973 Fairchild Semiconductor Components Group, Fairchild Camera and Instrument Corporation/464 Ellis Street, Mountain View, California 94040/(415) 962-5011 ITWX 910-379-6435
Printed in U.S.A.l41-12-0005-112/50M

FAIRCHILD
SEMICONDUCTOR

© 1973 Fairchild Semiconductor Components Group, Fairchild Camera and Instrument Corporation / 464 Ellis Street. Mountain View, California 94040/ (415) 962 · 5011 / TWX 910·379·6435
Printed in U.S.A.l41·12·0005 · 112/ 50M
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