1973_Motorola_Linear_Integrated_Circuits_Data_Book_3ed 1973 Motorola Linear Integrated Circuits Data Book 3ed
User Manual: 1973_Motorola_Linear_Integrated_Circuits_Data_Book_3ed
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MOTOROLA
Selniconductor Products Inc.
rB8~rB8~rB8~rB8~rB8Bm
LINEAR
INTEGRATED CIRCUITS
DATA BOOK
~~~~~~~~~~
12870 FARMINGTON ROAD
LIVONIA. MICHIGAN
48150
IGENERAL INFORMATION I
Master Index
Product Highlights
Selector Guides
Previews of Coming Linear
Integrated Circuits
Interchangeability Guide
Chip Information
MIL-M-38510 Program
IDATA SHEET SPECIFICATIONS I
... in alpha-numerical sequence by
device type number, unless otherwise
noted. (See Master Index for page numbers.)
Packaging Information
IAPPLICATION NOTES I
LINEAR
INTEGRATED CIRCUITS
DATA BOOK
Linear Integrated Circuits have achieved a level of maturity which now rivals that of
their digital counterparts. In all market categories and for a wide variety of applications
functions, linear ICs are serving the needs of equipment manufacturers to reduce cost
and improve equipment form, factor and reliability.
They've matured, too, from the standpoint of availability. The number of off-theshelf linear circuits and their varying capabilities makes them highly useful as building
blocks for system design. Moreover, the now-prevalent practice of second sourcing
assures competitive pricing and quantity delivery.
The Motorola Semiconductor Products Division has been in the forefront of linear IC
development since the inception of integrated circuit technology. This Linear Integrated
Circuit Data Book, therefore, contains data sheets for one of the largest selections of
linear ICs in the industry. Included are devices that were developed by the various
Motorola R&D groups, as well as an extensive second-source inventory of the most
popular circuits developed elsewhere.
For easy reference, the data sheets in this book are in alpha-numeric sequence, without
regard as to product category or applications. However, to provide the user with a qUick
overview of Motorola's complete line of standard linear ICs, a number of selector guides
separate the total line into market and/or functional divisions. This provides a quick
comparison of similar devices, spelling out the most Significant differences. Also included
are a cross-reference table of second-source devices and other product-related information.
The information in this book has been carefully checked and is believed to be reliable;
however, no responsibility is assumed for inaccuracies. Furthermore, this information
does not convey to the purchaser of microelectronic devices any license under the patent
rights of any manufacturer.
Third Edition
NOVEMBER 1973
©MOTOROLA INC., 1973
"All Rights Reserved"
Printed in U.S.A.
The following are trademarks of Motorola Inc.:
McMOS, MDTL, MECL, MECL 10,000, MHTL, MRTL, MTTL
LINEAR INTEGRATED CIRCUITS
MASTER INDEX
Device Type
Number
MC1303
MC1304
MC1305
MC1306
MC1307
MC1310
MC1311
MC1312
MC1313
MC1314
MC1315
MC1324
MC1326
MC1327
MC1328
MC1329
MC1330
MC1331
MC1339
MC1344
MC1349
MC1350
MC1351
MC1352
MC1353
MC1355
MC1356
MC1357
MC1358
MC1359
MC1364
MC1370
MC1371
MC1375
MC1385
MC1391
MC1394
MC1395
MC1396
MC1398
MC13120
MC1406
MC1407
MC1408
Circuit Function Description
Dual Stereo Preamplifier
FM Multiplex Stereo Demodulator
FM Multiplex Stereo Demodulator
1/2-Watt Audio Amplifier
FM Multiplex Stereo Demodulator
FM Stereo Demodulator
FM Stereo Demodulator
Four·Channel SQ* Decoder
Four·Channel SQ* Decoder
Four·Channel Audio Voltage·Controlied Amplifier
Four-Channel Audio Logic Circuit
Dual Doubly Balanced Chroma Demodulator with
RGB Output Matrix
Dual Doubly Balanced Chroma Demodulator with RGB
Output Matrix
Dual Doubly Balanced Chroma Demodulator with RGB
Output Matrix and PAL Switch
Dual Doubly Balanced Chroma Demodulator
Dual Doubly Balanced Chroma Demodulator
Low-Level Video Detector
Low-Level Video Detector
Dual Low·Noise Stereo Preamplifier
TV Signal Processor
IF Amplifier
IF Amplifier
TV Sound Circuit
TV Video IF Amplifier
TV Video IF Amplifier
Limiting FM IF Amplifier
FM Detector/Limiter
IF Amplifier and Quadrature Detector
TV Sound I F Amplifier
TV Sound System
Automatic Frequency Control
TV Chroma Subcarrier Regenerator
TV Chroma IF Amplifier
FM IF Circuit
Class B Audio Driver
TV Horizontal Processor
TV Horizontal Processor
PAL Chroma
PAL Luma
TV Color Processing Circuit
FM IF Amplifier
Six·Bit Multiplying Digital-to·Analog Converter
Analog-Digital Control Circuit
Eight-Bit Multiplying Digital·to-Analog Converter
*Trademark of Columbia Broadcasting System,lnc.
1-1
Selector Guide
(Section 3) or
Circuit Previews
(Section 4)
Page No.
I
Data Sheet
Page No.
(Section 8)
3-17
3-17
3·17
3-17
3-17
3-17
3-17
3·17
3-17
4-5
4·5
3-16
8-2
8-6
8-6
8-10
8·15
8-19
8-27
8-29
8-29
3-16
8-36
3-16
8-42
3-16
3-16
3-16
3-16
3-17
3-16
3-16
3-16,3-17
3-16
3-16
3-16
3-17
4-5
3-16,3-17
3-16
4·6
3-16
3-16
3-16
3-17
3-17
3-16
4-6
4-6
4-6
3-16
4-6
3-8
3-8
3-8
8-32
8-46
8-51
8-55
8-59
8-61
8-66
8-69
8-74
8-78
8-82
8-82
8-88
8-92
8-98
8-103
8-107
8-113
8-118
8-122
8-124
8-129
8-157
8-169
8-186
MASTER INDEX (continued)
Device Type
Number
MC1410
MC1414
MC1420
MC1430
MC1431
MC1433
MC1435
MC1436
MC1436C
MC1437
MC1438
MC1439
MC1440
MC1441
MC1444
MC1445
MC1446
MC1454
MC1455
MC1456
MC1456C
MC1458
MC1458C
MC1460
MC1461
MC1463
MC1466
MC1468
MC1469
MC1488
MC1489
MC1489A
MC1494
MC1495
MC1496
MC1505
MC1506
MC1507
MC1508
MC1510
MC1514
MC1520
MC1530
MC1531
MC1533
MC1535
MC1536
MC1537
MC1538
MC1539
MC1540
MC1541
MC1543
Circuit Function Description
Video Amplifier
Dual Differential Comparator
Operational Amplifier
Operational Amplifier
Operational Amplifier
Operational Amplifier
Dual Operational Amplifier
Operational Amplifier
Operational Amplifier
Operational Amplifier
Power Booster
Operational Amplifier
Core-Memory Sense Amplifier
Sense Amplifier
AC-Coupled 4-Channel Sense Amplifier
Wideband Amplifier
4-Channel, Low-Threshold Sense Amplifier
1-Watt Power Amplifier
Timing Circuit
Operational Amplifier
Operational Amplifier
Dual Operational Amplifier
Dual Operational Amplifier
Positive Voltage Regulator
Positive Voltage Regulator
Negative Voltage Regu lator
Voltage and Current Regulator
Dual ±15-Volt Tracking Regulator
Positive Voltage Regulator
Quad MDTL Line Driver
Quad MDTL Line Receiver
Quad MDTL Line Receiver
Four-Quadrant Multiplier
Four-Quadrant Multiplier
Balanced Modulator-Demodulator
Digital Voltmeter Subsystem (AID Converted
Six-Bit Multiplying Digital-to-Analog Converter
Analog-Digital Control Circuit
Eight-Bit Multiplying Digital-to-Analog Converter
Video Amplifier
Dual Differential Comparator
Operational Amplifier
Operational Amplifier
Operational Amplifier
Operational Amplifier
Dual Operational Amplifier
Operational Amplifier
Operational Amplifier
Power Booster
Operational Amplifier
Core-Memory Sense Amplifier
Sense Amplifier
Dual Sense Amplifier
1-2
Selector Guide
(Section 3) or
Circuit Previews
(Section 4)
Page No.
3-11
3·10
3-2
3-2
3-2
3-2
3-3
3-2
3-2
3-3
3-3
3-2
3-5
3-5
3-5
3-11
3-5
3-15
3-15
3-2
3-2
3-3
3-3
3-12
3-12
3-14
3-14
3-13
3-12
3-6
3-9
3-9
3-15
3-15
3-15
4-3
3-8
3-8
3-8
3-11
3-10
3-2
3-2
3-2
3-2
3-3
3-2
3-3
3-3
3-2
3-5
3-5
3-5
Data Sheet
Page No.
(Section 8)
8-200
8-204
8-208
8-212
8-212
8-216
8-221
8-226
8-226
8-230
8-234
8-240
8-248
8-252
8-266
8-274
8-135
8-290
8-294
8-301
8-301
8-307
8-307
8-311
8-311
8-323
8-339
8-349
8-355
8-145
8-151
8-151
8-386
8-400
8-416
8-157
8-169
8-186
8-200
8-204
8-208
8-212
8-212
8-216
8-221
8-226
8-230
8-234
8-240
8-248
8-252
8-260
MASTER INDEX (continued)
Device Type
Number
MC1544
MCl545
MC1550
MC1552
MC1553
MC1554
MC1555
MC1556
MC1558
MC1560
MC1561
MC1563
MC1566
MC1568
MC1569
MC1585
MC1590
MC1594
MC1595
MC1596
MC1709
MC1709C
MC1710
MC1710C
MC1711
MC1711C
MC1712
MC1712C
MCl723
MCl723C
MC1733
MC1733C
MC1741
MC1741 C
MC1741S
MC1741SC
MC1747
MC1747C
MC1748
MC1748C
MC1776
MC1776C
MC3301
MC3302
MC3401
MC3403
MC3430
MC3431
MC3432
MC3433
MC3450
MC3452
MC3453
Circuit Function Description
AC-Coupled 4-Channel Sense Amplifier
Wideband Amplifier
RF-IF Amplifier
Video Amplifier
Video Amplifier
l-Watt Power Ampl ifier
Timing Circuit
Operational Amplifier
Dual Operational Amplifier
Positive Voltage Regulator
Positive Voltage Regulator
Negative Voltage Regulator
Voltage and Current Regulator
Dual ±15-Volt Tracking Regulator
Positive Voltage Regulator
Dual MOS Clock Driver
Wideband Amplifier with AGC
Four-Quadrant Multiplier
Four-Quadrant Multiplier
8alanced Modulator-Demodulator
Operational Amplifier
Operational Amplifier
Differential Comparator
Differential Comparator
Dual Differential Comparator
Dual Differential Comparator
Wideband DC Amplifier
Wideband DC Amplifier
Positive Voltage Regulator
Positive Voltage Regulator
Differential Video Amplifier
Differential Video Amplifier
Operational Amplifier
Operational Amplifier
High-Slew-Rate Operational Amplifier
High-Slew-Rate Operational Amplifier
Dual Operational Amplifier
Dual Operational Amplifier
Operational Amplifier
Operational Amplifier
Programmable Operational Amplifier
Programmable Operational Amplifier
Quad Operational Amplifier
Quad Comparator
Quad Operational Amplifier
Quad Operational Amplifier
High-Speed Quad Comparator
High-Speed Quad Comparator
High-Speed Quad Comparator
High-Speed Quad Comparator
Quad Line Receiver
Quad Line Receiver
Quad Line Driver
Selector Guide
(Section 3) or
Circuit Previews
(Section 4)
Page No.
3-5
3-11
3-11
3-11
3-11
3-15
3-15
3-2
3-3
3-12
3-12
3-14
3-14
3-13
3-12
3-7
3-11
3-15
3-15
3-15
3-2
3-2
3-10
3-10
3-10
3-10
3-2
3-2
3-12
3-12
3-11
3-11
3-2
3-2
3-2
3-2
3-3
3-3
3-2
3-2
3-2
3-2
3-3,3-17
3-10,3-17
3-3
4-2
4-3
4-3
4-3
4-3
3-9
3-9
3-6
1-3
Data Sheet
Page No.
(Section 8)
8-266
8-274
8-280
8-286
8-286
8-290
8-294
8-301
8-307
8-311
8-311
8-323
8-339
8-349
8-355
8-375
8-380
8-386
8-400
8-416
8-426
8-426
8-430
8-434
8-436
8-436
8-440
8-440
8-444
8-444
8-450
8-450
8-456
8-456
8-460
8-460
8-466
8-466
8-470
8-470
8-472
8-472
8-481
8-489
8-493
-
-
8-501
8-501
8-508
MASTER INDEX (continued)
Device Type
Number
Circuit Function Description
MC3459
MC346o.
MC3462
MC3463
MC35o.3
MC3537
MC3538
MC357o.
MC5528
MC5529
MC5534
MC5535
MC5538
Quad NMOS Memory Driver
Quad NMOS Memory Driver
Quad MECL Line Receiver
Quad MECL Line Driver
Quad Operational Amplifier
Hex Unified Bus Receiver
Quad Unified Bus Transceiver
High-Slew Operational Amplifier
Dual High-Speed Sense Amplifier with Preamplifier Test Points
Dual High-Speed Sense Amplifier with Preamplifier Test Points
Dual Sense Amplifier with Inverted Outputs
Dual Sense Amplifier with Inverted Outputs
Dual High-Speed Sense Amplifier with Preamplifier Test Points
and I nverted Outputs
MC5539
Dual High-Speed Sense Amplifier with Preamplifier Test Points
and I nverted Outputs
MC752o.
Dual Sense Amplifier
MC7521
Dual Sense Amplifier
MC7522
Dual Sense Amplifier
MC7523
Dual Sense Amplifier
MC7524
Dual Sense Amplifier
MC7525
Dual Sense Amplifier
MC7528
Dual High-Speed Sense Amplifier with Preamplifier Test Points
MC7529
Dual High-Speed Sense Amplifier with Preamplifier Test Points
MC7534
Dual Sense Amplifier with Inverted Outputs
MC7535
Dual Sense Amplifier with I nverted Outputs
MC7538
Dual High-Speed Sense Amplifier with Preamplifier Test Points
and I nverted Outputs
Dual High-Speed Sense Amplifier with Preamplifier Test Po ints
MC7539
and Inverted Outputs
MCno.5C
Positive Voltage Regulator
MCn06C
Positive Voltage Regulator
MCno.8C
Positive Voltage Regulator
MCn12C
Positive Voltage Regu lator
MC7715C
Positive Voltage Regulator
MCn18C
Positive Voltage Regulator
MCn2o.C
Positive Voltage Regulator
MC7724C
Positive Voltage Regulator
MC78o.5C
Positive Voltage Regulator
MC78o.6C
Positive Voltage Regulator
MC78o.8C
Positive Voltage Regulator
MC7812C
Positive Voltage Regulator
MC7815C
Positive Voltage Regulator
MC7818C
Positive Voltage Regulator
MC7824C
Positive Voltage Regulator
MC79o.2C
Negative Voltage Regulator
MC79o.5C
Negative Voltage Regulator
MC79o.5.2C Negative Voltage Regulator
MC79o.6C
Negative Voltage Regulator
MC79o.8C
Negative Voltage Regulator
MC7912C
Negative Voltage Regulator
MC7915C
Negative Voltage Regulator
MC7918C
Negative Voltage Regulator
1-4
Selector Guide
(Section 3) or
Circuit Previews
(Section 4)
Page No.
Data Sheet
Page No.
(Section 8)
-
4-3
4-3
4-4
4-4
4-2
4-3
4-3
4-2
3-4
3-4
3-4
3-4
3-4
8-512
8-512
8-515
8-515
8-518
3-4
8-518
3-4
3-4
3-4
3-4
3-4
3-4
3-4
3-4
3-4
3-4
3-4
8-521
8-521
8-521
8-521
8-524
8-524
8-512
8-512
8-515
8-515
8-518
3-4
8-518
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-13
3-14
3-14
3-14
3-14
3-14
3-14
3-14
3-14
8-526
8-526
8-526
8-526
8-526
8-526
8-526
8-526
8-532
8-532
8-532
8-532
8-532
8-532
8-532
-
-
8-540.
8-540.
8-540.
8-540.
8-540.
8-540.
8-540.
8-540.
MASTER INDEX (continued)
Device Type
Number
MC7924C
MC55107
MC55108
MC55325
MC75107
MC75108
MC75109
MC75110
MC75113
MC75140
MC75325
MC75450
MC75451
MC75452
MC75453
MC75454
MC75491
MC75492
MCB1709
MCB1710
MCB1723
MCB1741
MCB1748
MCBC1709
MCBC1710
MCBC1723
MCBC1741
MCBC1748
MCC1436
MCC1439
MCC1458
MCC1463
MCC1469
MCC1495
MCC1536
MCC1539
MCC1558
MCC1563
MCC1569
MCC1595
MCC1709
MCC1709C
MCC1710
MCC1710C
MCC1711
MCC1711C
MCC1723
MCC1723C
MCC1741
MCC1741C
MCC1748
MCC1748C
Selector Guide
(Section 3) or
Circuit Previews
(Section 4)
Page No.
Circuit Function Description
Negative Voltage Regulator
Dual Line Receiver
Dual Line Receiver
Dual Memory Driver
Dual Line Receiver
Dual Line Receiver
Dual Line Driver
Dual Line Driver
Differential Party-Line Driver
Dual Line Receiver
Dual Memory Driver
Dual Peripheral Driver, Positive AND
Dual Peripheral Driver, Positive AND
Dual Peripheral Driver, Positive NAND
Dual Peripheral Driver, Positive OR
Dual Peripheral Driver, Positive NOR
Quad Light-Emitting Diode (LED) Driver
Hex Light-Emitting Diode (LED) Driver
Operational Amplifier (encapsulated Beam-Lead)
Differential Comparator (encapsulated Beam-Lead)
Voltage Regulator (encapsulated Beam-Lead)
Operational Amplifier (encapsulated Beam-Lead)
Operational Amplifier (encapsulated Beam-Lead)
Operational Amplifier (non-encapsulated 8eam-Lead)
Differential Comparator (non-encapsulated Beam-Lead)
Voltage Regulator (non-encapsulated Beam-Lead)
Operational Amplifier (non-encapsulated Beam-Lead)
Operational Amplifier (non-encapsulated Beam-Lead)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
Dual Operational Amplifier (Chip)
Negative Voltage Regulator (Chip)
Positive Voltage Regulator (Chip)
Four-Quadrant Multiplier (Chip)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
Dual Operational Amplifier (Chip)
Negative Voltage Regulator (Chip)
Positive Voltage Regulator (Chip)
Four-Quadrant Multiplier (Chip)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
Differential Comparator (Chip)
Differential Comparator (Chip)
Dual Differential Comparator (Chip)
Dual Differential Comparator (Chip)
Positive Voltage Regulator (Chip)
Positive Voltage Regulator (Chip)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
Operational Amplifier (Chip)
1-5
,
3-14
3-9
3-9
3-7
3-9
3-9
3-6
3-6
3-6
3-9
3-7
3-7
3-7
3-8
3-8
3-8
3-8
3-8
3-2
3-10
3-12
3-2
3-2
3-2
3-10
3-12
3-2
3-2
3-2
3-2
3-3
3-14
3-12
3-15
3-2
3-2
3-3
3-14
3-12
3-15
3-2
3-2
3-10
3-10
3-10
3-10
3-12
3-12
3-2
3-2
3-2
3-2
Data Sheet
Page No.
(Section 8)
8-540
8-549
8-549
8-554
8-549
8-549
8-556
8-556
8-563
8-573
8-554
8-577
8-582
8-585
8-588
8-591
8-594
8-594
8-600
8-604
8-606
8-608
8-612
8-600
8-604
8-606
8-608
8-612
8-614
8-616
8-618
8-620
8-622
8-624
8-614
8-616
8-618
8-620
8-622
8-624
8-626
8-626
8-628
8-628
8-630
8-630
8-632
8-632
8-634
8-634
8-636
8-636
MASTER INDEX (continued)
Device Type
Number
MCCF1458
MCCF1558
MCCF1709
MCCF1709C
MCCF1741
MCCF1741C
MFC4000B
MFC4010A
MFC4040
MFC4050
MFC4060A
MFC4062A
MFC4063A
MFC4064A
MFC6010
MFC6020
MFC6030A
MFC6032A
MFC6033A
MFC6034A
MFC6040
MFC6050
MFC6070
MFC8020A
MFC8021A
MFC8022A
MFC8030
MFC8040
MFC8070
MLM101A
MLM104
MLM105
MLM107
MLM109
MLM110
MLM111
MLM201A
MLM204
MLM205
MLM207
MLM209
MLM210
MLM211
MLM301A
MLM304
MLM305
MLM307
MLM309
MLM310
MLM311
MMH0026
MMH0026C
Circuit Function Description
Dual Operational Amplifier (Flip·Chip)
Dual Operational Amplifier (Flip-Chip)
Operational Amplifier (Flip-Chip)
Operational Amplifier (Flip-Chip)
Operational Amplifier (Flip-Chip)
Operational Amplifier (F lip-Chip)
1/4-Watt Audio Amplifier
Wideband Amplifier
Single Toggle Flip-Flop
Audio Driver
Voltage Regulator
Voltage Regulator
Voltage Regulator
Voltage Regulator
FM IF Amplifier
Dual Toggle Flip-Flop
Voltage Regulator
Voltage Regulator
Voltage Regu lator
Voltage Regulator
Electronic Attenuator
Dual Toggle Flip-Flop with Reset
Audio Power Amplifier
Class B Audio Driver
Class B Audio Driver
Class B Audio Driver
Differential Cascode Amplifier
Audio Preamplifier
Zero Voltage Switch
Operational Amplifier
Negative Voltage Regulator
Positive Voltage Regulator
Operational Amplifier
Positive Voltage Regulator
Operational Amplifier
Voltage Comparator
Operational Amplifier
Negative Voltage Regulator
Positive Voltage Regulator
Operational Amplifier
Positive Voltage Regulator
Operational Amplifier
Voltage Comparator
Operational Amplifier
Negative Voltage Regulator
Positive Voltage Regulator
Operational Amplifier
Positive Voltage Regulator
Operational Amplifier
Voltage Comparator
Dual MOS Clock Driver
Dual MOS Clock Driver
Selector Guide
(Section ;3) or
Circuit Previews
(Section 4)
Page No.
3-3
3-3
3-2
3-2
3-2
3-2
3-17
3-17
3-18
3-17
3-12
3-12
3-12
3-12
3-17
3-18
3-12
3-12
3-12
3-12
3-18
3-18
3-17
3-17
3-17
3-17
3-17
3-15
3-2
3-14
3-12
3-2
3-13
3-2
3-10
3-2
3-14
3-12
3-2
3-13
3-2
3-10
3-2
3-14
3-12
3-2
3-13
3-2
3-10
3-7
3-7
1-6
Data Sheet
Page No.
(Section 8)
8-638
8-638
8-640
8-640
8-642
8-642
8-644
8-647
8-651
8-653
8-656
8-656
8-656
8-656
8-658
8-662
8-664
8-664
8-664
8-664
8-668
8-671
8-673
8-679
8-679
8-679
8-683
8-685
8-688
8-692
8-696
8-698
8-700
8-704
8-709
8'711
8-692
8-696
8-698
8-700
8-704
8-709
8-711
8-692
8-696
8-698
8-700
8-704
8-709
8-711
8-715
8-715
UNDERSTANDING MOTOROLA'S DEVICE NUMBERING SYSTEM
A great deal of information is given in the device number on Motorola ICs. This section will
present the meanings of the prefixes, numbers and suffixes used to designate Motorola linear ICs.
Normally the package style and operating temperature range may be obtained from the device
number.
Although there are exceptions to many of the codes listed below, these codes are generally true
and can provide the user with pertinent information on the particular device type.
Prefix
MC
Packaged Integrated Circuits
MCB
Packaged Beam-lead Integrated Circuits. (Followed by F suffix when in flat pack.)
MCBC
Beam·lead Integrated Circuit chips
MCC
Unencapsulated Integrated Circuit chips
MCCF
Flip-Chip Linear Integrated Circuits
MFC
Low cost Integrated Circuits packaged in Motorola's unique "Functional Circuits" plastic
package (Package suffix not used ,in this device series.)
MLM
Pin-for-pin equivalent to Linear Integrated Circuits made by National Semiconductor
Body Number for Motorola Proprietary Devices
~~~~~~~~~
Military temperature grade (-55 to +125 0 C) Linear ICs
1400-1499
3400-3499 Equivalent to devices above but with Industrial temperature range (0 to +70°C)
1300-1399
3300-3399 Linear ICs aimed at the Consumer industry
Suffix
A
Designates improved or modified IC type, followed by package suffix, i.e., MC1489AL.
C
Designates limited temperature, or limited performance device. Followed by package
designation suffix, i.e., MC1709CL
F
Flat package
G
Metal can package (TO-5 types)
K
Metal power package (TO-3 type)
L
Ceramic dual in-line case (14 or 16 pin)
P
Plastic package
PO
ICs packaged in staggered-lead plastic DIP packages
P1,P2
Used when an IC is available in more than one plastic package.
i.e., P1 = 8 lead plastic DIP, P2 = 14 pin plastic DIP
R
Metal power package (TO-66 type)
Package
Designation
1-7
NOTES
1-8
LI EI
INTEGRATED CIRCUITS
HIGHLIGHTS
2-1
linear IC Highlights (continued)
OPERATIONAL AMPLIFIERS
The operational amplifier has always been the most popular and versatile Linear Ie type. Op
amps have found wide usage in control circuitry, signal processing equipment, active filters for
communications systems, Modems, and many other types of equipment. With the addition of a
few externai components, this basic feedback type amplifier can be transformed into a multitude
of functions ranging from summing amplifiers and simple inverters to integrating amplifiers and
Sample and Hold circuits.
Motorola offers broad line of op amp types. Both proprietary and popular industry-standard
types are covered. The range of high precision to low cost plastic-packaged mUltiple op amps is
spanned by over 50 device types. Two representative devices are discussed here. An overview of
the entire line appears on pages 3-2 and 3-3.
a
HIGH SLEW RATE OPERATIONAL AMPLIFIER
VCC=5.0V
13
MSB
A1
A2
5
A5
A6
A7
LSB
A8
Vref
15
A3
A4
R1
14
6
MC1508L·8
MC1408L
Series
8
9
R2
10
11
2
12
4
16
vo
3
15
pF
VEE =-15V
RO
C·
High-8lew Op-Amp (MC1741S)
Applications where pulses are processed or
where distortion must be kept low under largesignal conditions are ideal candidates for the
MC1741S. Since the unit is a pin-for-pin replacement with all other specs identical to the conventional MC1741 , it is easy to update existing
designs to improve their performance.
Of particular significance is the 3.0 IJ,S settling
time (to 0.1%) of the new device. When combined
with an MC1508L digital-to-analog converter, a lowcost, two-package converter with a voltage-mode
output and total settling time to within ±1.0 least
significant bit of 4.0 IJ,S can be obtained.
It is not often that the advantages of the old
workhorse can be combined with the speed of
the thoroughbred. However, the MC1741 Sop-amp
has done just that; it has a II the familiar easyto-use features of the industry-standard MC1741
internally compensated op-amp. In addition, it
offers a guaranteed minimum slew rate of 10 V/lJ,s
with a typical slew rate of some 20 times greater
than the comparable figure for the conventional
MC1741. Power bandwidth has a'lso increased by a
factor of;m and is now specified at 150 kHz
minimlim.
2-2
Linear IC Highlights (continued)
PROGRAMMABLE OPERATIONAL AMPLIFIER
50 M
500 k
2
500 k
3
10 k
90 k
6
>--0-.....- - . Output
Input
50M
logic to create electronics systems well suited for
critical low-drain, battery-powered equipment. The
MC1776 uses a maximum of only 120 /-IW at
±3.0 V and a programming current of 1.5 /-IA.
This assures long life from the battery.
To demonstrate the versitility of the MC1776,
all static and dynamic parameters are specified at
four combinations of power supply voltages and
programming current. Thus, the user is assured that
the op-amp will perform over this wide range of
operating conditions without having to guess how
changes in the programming conditions will affect
a particular operating parameter.
For operating flexibility and micropower consumption considerations, the MC1776 is the logical
choice.
Micro-Power, Programmable Op-Amp
(MC1776)
The ability to operate with minimal power consumption from a wide range of power supply
voltages is the salient feature of the MC1776 programmable op-amp. Whether two 1.2 V mercury
cells or supplies up to ±18 V are uti lized, the
performance features best suited for a particular
application can be selected. A single resistor or a
current source can be used to set all the quiescent
current levels for this circuit. Thus, the designer is
free to choose, for example, low bias and power
supply currents, or perhaps greater gain-bandwidth
and slew rate.
The MC1776 can be combined with McMOS
2-3
Linear IC Highlights (continued)
VOLTAGE REGULATORS
The sensitivity of semiconductor devices to voltage and temperature changes makes the voltage
regulator circuit an important integral part of many critical systems and subsystems. Today's
designer has considerable choice in integrated regulators, with a variety of characteristics,
capabilities, and prices. The integrated circuit voltage regulator offers ease of design, simplified
assembly and improved performances over discrete transistor designs. Motorola offers a series of Ie
voltage regulators with a variety of specifications, see pages 3-12 thru 3-14. Highlighted here are
two circuits that merit special attention.
The Simplest Voltage Regulator to Use
(MC7800)
The introduction of the three-terminal voltage
regulator marked a milestone in integrated circuit
development. Traditionally, IC voltage regulators
required numerous external components, and supplied only a few milliamperes without additional
current boosting transistors. They had to be pro·
grammed to the desired voltage with precision resistors, and could oscillate if proper circuit layout
considerations were ignored. The MC7800 Series
three·terminal fixed voltage regulators have eliminated these problems.
The new devices are housed in popular power
transistor packages which conven iently connect to
heatsin ks if necessary. They require only three
connections - Input, Output, and G ro undo External
components are required only if the regulator is
located an appreciable distance from the supply
filter capacitors or if current boosting is required
to supply greater than the 1.5 Amperes the devices
can provide. Ease of use and low cost make these
units ideal as on-card voltage regulators, or in almost any electronic system.
The MC7800 series devices are available in seven
popular fixed voltages. The last two numbers of the
part type indicate the nominal output voltage. Each
type features short-circuit protection, thermalshutdown, and safe-operating area compensation for
the internal series pass transistors. These techniques
combine to make the units extremely rugged.
With the arrival of the new MC7800 series
voltage regulators, a regulated power supply is
available at a minimum of cost and design effort for
almost any electronic device. By adding an additional transistor package, regulated voltage can
be available almost any place in a system.
BASIC REGULATOR
Input
Output
Cin*
0.33/-1 F
=
A common ground is required between the
input and the output voltages. The input volt·
age must remain typically 2.0 V above the out·
put voltage even during the low point on the
input ripple voltage.
• = Cin is requ ired if regulator is located an
appreciable distance from power supply
filter.
•• = Co is not needed for stability; however,
it does improve transient response.
The Negative Three-Terminal Regulator
Complements (MC7900)
The popular MC7800 series voltage regulators
described above are all well suited when a positive
voltage is required, but they are not intended for
negative supplies. For these applications the nega·
tive complements, series MC7900 were created.
These units are identical to the MC7800 series
devices except that the voltage and current are of
the opposite polarity. The negative regulators are
supplied in the same voltages available in the
positive series plus two additional voltages commonly used in MECL systems. These supplementary
voltages are -2.0 V and -5.2 V, making them well
suited for on-card regulation in high-speed logic
systems.
The same short-circuit, thermal over-load and
safe-operating area protection circuitry is employed
in the negative devices making them very rugged.
In addition, the devices have the same simplicity of
use as the positive MC7800 series devices. Three·
terminals, fixed·voltages, easy·heatsin king, and the
lack of required external components are features
that make the MC7900 series negative regulators
applicable to nearly any electronic system power
supply.
COMPLEMENTARY REGULATORS
Unregulated
+23
Regulated
Outputs
+15 V
V
1 N4001
or Equiv
Gnd
Gnd
V
-15
-23
*Required only if the regulators are
located an appreciable distance from
the power supply filters.
2-4
V
Linear IC Highlights (continued)
INTERFACE CIRCUITS
Interface circuits is the name applied to devices that operate with both linear signals and digital
logic levels. Most have both linear and digital properties. Examples of interface circuits are DIA
and AID converters, memory sense amplifiers, comparators, and line drivers and receivers.
The rapidly expanding fields of data communications and digital instrumentation make wide
use of these interface devices. Line drivers and receivers, for example, are used whenever data must
be transmitted over long distances in a computer or piece of peripheral equipment. Also, the
industry standard MC1488-89 devices provide the level translation between a Modem and a
computer terminal in accordance with the EIA RS-232C specifications. Likewise comparators are
used as voltage level detectors in control and instrumentation applications.
Motorola offers a broad line of interface circuits. Two of the newest interface devices are
discussed in this section while the complete lineup is outlined beginning on page 3-4.
8·BIT TRACKING A·TO-D CONVERTER
Rin
CLOCK INPUT
LSB
Versatile Analog·Digital Control Function
(MC1507)
MSB
DIGITAL OUTPUT
high-speed capability inherent in the current mode
output of the MC1508and MCl506 01 A converters.
An 8-bit tracking AID system, for example, using a
5-MHz clock rate provides a normal conversion or
update every 0.2 to 1.0 j.lS, and a full-scale conversion time of 50 j.lS. Adding a second MC1507
and a "panic mode" circuit decreases the full-scale
conversion time to 14 j.lS.
By disabling the down counting function, the
tracking converter can be used as a peak-detecting
track and hold circuit. This system will store the
maximum value of an input waveform until it is
reset. Unlike traditional sample and hold circuits
uti lizing the charge on a capacitor, the MC1507
system will not suffer a voltage decay after a period
of time.
The versatile MC1507 has many additional applications bridging the analog and digital realms.
When combined with other building blocks, solutions to numerous analog-digital interface requirements can be economically provided.
The MC1507 is the third member of the
Motorola "building block" series aimed at bridging
the gap between the analog and digital worlds. This
device is particularly useful when combined with
either the MC1508 or MC1506 monolithic Digitalto-Analog (D/A) converters to implement either
Tracking or Successive Approximation Analog-toDigital (AID) Converter designs.
The MC1507 consists of a high-slew-rate op-amp
used asan input buffer and a dual-comparator which
provides two adjustable, but symmetrical, thresholds. The comparator is used in tracking AID
systems to command a counter chain to increment
either up or down. The comparator section is also
applicable to "dead-band" or "window" comparator
designs where indication is given if an input voltage is greater than or less than a specified voltage
range.
The tracking AID converter, for which the
MC1507 is primarily intended, makes use of the
2-5
Linear IC Highlights (continued)
PARTY-LINE DATA TRANSMISSION SYSTEM WITH MULTIPLEX DECODING
~A08E
DATA
MC3453
INPUTS
~
-
DATA
OUTPUTS
STROBe~
,.'L
~
DATA
MC3453
INPUTS
H>--t-t--
OUTPuTS
-
~
DATA
MC3453
INPUTS
~
t--<
OUTPUTS
STROB~
--==?=
OATA
MC3453
INPUTS
-<>--
s~
DATA
;--
01
02
L..o-
2/3
MC7404
~ CIRCUIT
~
-0-
12
'I(
-0-- MC4007
-0- CIRCUITro--0-
v
'--A2
Quad Line Drivers and Receivers
(MC3450, MC3452, MC3453)
A1
A2
input. The MC3450 is also a quad receiver; however, it provides active pull-up outputs, and a threestate strobe input, allowing the outputs to be placed
in a high impedance state.
In addition to their usage to transmit data Within large computer systems, the quad receivers are
well suited for use as sense amplifiers with "1103"
type MOS memory systems. The quad configuration
results in a considerable package savings over existing devices commonly used in this type of
application.
These devices are quad versions of the popular
MC751 07, MC75108 and MC7511 0 type dual line
Driver/Receivers. They are commonly employed to
transmit logic signals. over long lengths of cable in
large digital wstems.
The MC3453 is a.n MTTL-compatible differential
driver with a single enable input common to all
four monolithic drivers in the packages.
The MC3452 is a differential line receiver featuring open-collector outputs and a common strobe
2-6
Linear IC Highlights (continued)
ENTERTAINMENT CIRCUITS
The high-volume, low-cost, and highly specialized requirements of the electronic components
for consumer entertainment equipment match the capabilities of today's linear ICs. A great
variety of the necessary functional blocks for television, stereo phonographs, and radio receivers is
now available in low-cost plastic-packaged ICs. The need for improved performance and increased
reliability and, at the same time, for a lower selling price, is met by state-of-the-art monolithic
circuits.
Motorola's traditional leadership in plastic transistors for the customer electronics industry is
being extended with a complete lineup of low-cost ICs for those functions which can best be
accomplished with monolithic integrated circuits. Both original innovative designs and popular
second-source devices which have been well accepted by the industry are included in this diverse
family of products. Some typical examples are highlighted here.
For Te Ie vi si 0 n
alone, Motorola offers more than 20 different types of ICs to give the
designer a wide choice of performance levels and partitioning approaches. To aid in the parade
toward fully solid-state sets, Motorola offers ICs for the video IF amplifier and detector, AF.T,
chroma processor and detector, deflection, audio stages, and a combination device which supplies
AGC, sync separator and noise-suppression circuitry. Often these I Cs permit circuit complexity and
performance which would not be technically and economically practical with discrete components.
A selector guide to ICs for use in television sets is provided on page 3-16. Several new TV ICs
are previewed on page 4-6.
TYPICAL HORIZONTAL SECTION
Vnonreg
+30 V
A,
AS
' ',1 '"
CA
'0'"'1
'150V
AD
Ae
~H3O~d
II
0.0068
R,-[
24k_
"l
AX
3.3k
150k
0005
,
,
I
,
2
[2
II
.-
'"w
CC£
IsR,"
,
MJ105,(p
o,Equov
1.5k
0.001
"'
Jlr-
~
~
y
0
K
MRD
1140
Equ,v
01pF
'"
~~,:".
Tnpler
120DVJL
,
MC1391P
,
~
"' 1 '"'I
es
s
2.2k
R,
'"
2"
~M':U~:'
H
E
;:;
0.01
"'
02
"'
or Equ,v
0003
"'
=
O.l1'F
·20V Sync
FEATURES:
• I nternal shunt regulator
• Preset Hold control capability
• ±300 Hz typical pull-in range
• Balanced phase detector
• Variable output duty cycle for driving tube or
transistor
• Low thermal frequency drift
• Small static phase error
TV Horizontal Processor (MC1391)
The MC1391 TV horizontal processor packs the
phase detector, oscillator and pre-driver functions
into a single, convenient 8-lead plastic package.
The new unit provides the entire low-level
horizontal signal processing function 'and may be
used, with either transistor or vacuum tube output
stages. This device is one of the first inroads of ICs
into the television deflection circuitry,
2-7
Linear IC Highlights (continued)
For Audio . ..
Linear ICs are rapidly penetrating the audio amplifier stages of television, radio, and stereo
phonographs. Both low level' and power amplifier applications are realizing greater performance
and lower total cost due to the reduced assembly requirements and the ability to use more
complex circuitry with these advanced ICs. A wide range of IC types permits the designer a wide
lattitude of flexibility to create the exact system performance and costs he requires.
TYPICAL CLASS B AMPLIFIER
f
100C",F
'J16VdC
MJE2050 or equiv
0.24
1000 IJ.F/16 Vdc
'----+----+--M-JE-21~:O~' ~";,
1
~~
20 k
0.24
2k
O.OOl.!.1 F
~10.llF
FEATURES:
• Internal power supply transient protection
• Built-in programmable short-circuit-current
limiting
• Excellent sensitivity - 4.0 mV(RMS) typical
• Excellent power-supply ripple rejection - 3!Ld&.
typical
• Wide operating temperature range
• Single supply operation
Class B Audio Driver (MC1385)
The MC1385 is designed to be used in conjunction with complementary output transistors
MJE2050/2150 to produce a 5-watt class B audio
amplifier suitable for use in automotive, consumer,
and industrial electronics.
2-8
Linear IC Highlights (continued)
For Radio . . . .
Two sections in FM radios have lent themselves well to integration: The IF amplifier and
detector, and the stereo multiplex decoder sections. In both high-quality tuners and in low-priced
table radios, the high performance of these ICs and lower assembly costs they make possible,
permit more efficient designs.
TYPICAL FM APPLICATION
+12 V
100
1.8 k
10.7MHz
INPUT
AUDIO
OUTPUT
MFC4010A
S~330U
510
S.8 k
430
1.8 k
S.8 k
*10.7 MH2 Filter; Vernitroo FM·4 Dr equivalent
HL = 6.0pH nom
Adjust R for UL "" 55
FM I F Circuit (MC1375)
Combining several functions required in solidstate F M receivers, the MC1375 provides the IF
amplifier, limiter, FM detector and audio preamplifier in a single 14-lead package. The unit
requires a minimum of external components.
The IF amplifier/limiter section provides
excellent AM rejection and uses an internal zener
diode voltage regulator. The detector is a
differential peak design which promotes simplified
single-coil alignment. The audio preamplifier
supplies a voltage gain of ten.
FEATURES:
• Good sensitivity: input limiting voltage (Knee)
= 250 !LV typical
• Excellent AM rejection: 55 dB typical at 10.7
MHz
• Internal zener diode regulation for the IF
amplifier section
• Low harmonic distortion
• Differential peak detection: permits simplified
single-coil timing
• Audio preamplifier voltage gain: 21 dB typical
2-9
Linear IC Highlights (continued)
For Automotive . ..
In response to consumer demand and government legislation, the automotive industry is undergoing a major engineering evolution Electronics will be used to perform many of the new complex
functions required for the modem automobile. Two approaches are being accepted for applying
ICs to automotive electronics: custom and building block. Because of the large volume potential,
almost all programs can be expected to end with a specialized custom circuit. However, in the
interim, while the systems are being defined and refined, the Motorola building block approach has
received wide acceptance.
Highlighted below is one of the new devices in this series of building blocks.
EaUIVALENT CIRCUIT
6~10~
eO~PTR
7
+
5
+ 2
eO~PTR
1
11
47 8$--0
eOMPTR
eO~TR
2
9
13
+
14
+
GROUND - PIN 12
Vee - PIN 3
FEATURES:
• Wide operating temperature range -40 to +850 C
• Single-supply operation +2.0 to +28 volts
• Differential input voltage ~ ±VCC
• Compare voltages at ground potential
• MTTL compatible
• Low current drain - 700 j.lA typical
@ VCC ~ +5.0 to +28 Vdc
• Outputs can be connected to give the Implied
AND function
Quad Comparator (MC3302)
The MC3302 contains four independent comparators designed for wide operating temperatures
and single positive-power-supply operation requiring
very low supply current.
High density and low cost make this device ideal
for automotive, consumer, and industrial applications.
2-10
LI EI
INTEGRATED CIRCUITS
SELECTOR GUIDES
3-1
INTEGRATED CIRCUITS
OPERA TIONAL AMPLIFIERS
Motorola offers a broad line of operational amplifiers
to meet a wide range of usages. From low·cost, industry
standard types to high precision circuits the span
encompasses a large range of performance capabilities.
These linear integrated circuits are available as single,
dual, and quad monolithic devices in a variety of
package styles as well as standard and beam· lead chips.
Unity
0.Q1
0.03
0.04
0.09
0.09
0.25
0.5
0.5
6.0
10
10
12
12
7.5
6.0
6.0
6.0
10
10
30
25
50
200
200
0.075
0.15
0.5
0.5
0.5
1.0
2.0
5.0
10
2.0
10
3.0
5.0
5.0
5.0
10
2.0
5.0
0.25
0.3
0.5
1.0
1.5
2.0
4.0
7.5
15
7.5
15
6.0
7.5
7.5
7.5
15
5.0
10
50,000
70,000
70,000
25,000
50,000
25,000
20,000
20,000
12
11
20
10
20
10
10
10
75
2.0
5.0
2.0
5.0
2.0
2.0
2.0
10
25
60
200
200
150
100
500
2000
50,000
2:500
50,000
50,000
25,000
40,000
1,000
2,500
4,500
10
4.5
10
10
10
11
3.5
3.5
4.5
2.0
1.0
1.0
2.0
2.0
2.0
7.0
10
1.0
50
100
200
100
500
500
200
2000
4000
25,000
1,500
20,000
15,000
15,000
30,000
750
2,000
3,000
10
4.0
10
10
10
10
3.0
3.5
4.0
2.0
1.0
2.0
2.0
2.0
2.0
7.0
10
1.0
±15
±15
±28
±15
±28
±15
±15
±15
±1):i
±S.O
±15
±15
±15
±15
±S.O
+12,·6.0
±S.O
±15
±6.0
±15
±15
±15
±15
±S.O
+12,·6.0
ts.O
0.2
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.5
40
23
40
23
10
10
200
0.1
2.5
2.0
2.5
2.0
0.57
0.8
15
601
601
601
601
601
601
601,606,626,632,646
601,626
MC1436'
MC1456C
MC1436C
MLM307
MC1741C't
MC1741SC
1.0
2.0
2.0
1.0
0.5
0.8
10
7.0
3.0
10
100
50
10
4.0
2.0
150
10
100
0.5
1.4
4.2
0.8
0.25
2.0
5.0
1.5
1.7
601
6026,606
601,632
601,606
601,606,632
6026,606,632
602A,606
601,606,632
6026,606
MLM101A
MC1531
MC1539'
MC1748' ,.
MC1709'
MC1533
MC1520
MC1712
MC1530
1.0
2.0
1.0
2.0
0.5
0.8
10
7.0
3.0
10
100
10
50
4.0
2.0
150
10
100
0.5
1.4
0.8
4.2
0.25
2.0
5.0
1.5
1.7
601,626
6026,606,646
601
601,626,632,646
601,606,626,632,646
6026,606,632,646
602A,606
601,606,632
6026,606,646
MLM301A
MC1431
MC1748C'
MC1439'
MC1709C*t
MC1433
MC1420
MC1712C
MC1430
*Use MeC prefix for nonencapsulated chip.
**Use MCBC prefix for nonencapsulated beam-lead device, use
tUse MCCF prefix for nonencapsulated flip-chip.
*I
Mea prefix
for beam-lead device in flat ceramic package.
set = 1.5 ~A, IVEEI = Vec = 15 V.
3-2
OPERATIONAL AMPLIFIERS (Continued I
300
850
11
1500
300
3-3
75
614
High current gain (70 dB)
op ampl power booster,
10 = 300 rnA max
MCI438
INTEGRATED CIRCUITS
INTERFACE CIRCUITS
Interface circuits fit in the gray area between the
linear and digital realms. Usually these IC's perform the
necessary translation between an analog signal input and
the required digital logic levels or vice versa. To aid in
selection, the devices have been divided into five main
categories: Sense Amplifiers, Drivers, D/A Converters,
Receivers, and Comparators.
Propagation
Delay
(nsmax)
mentary outputs, memory
data register
~
~
~
~
~
~
~
~
~
Dual channel with opencollector output, high sink
current capability
Dual with independent
strobing
Same as MC7524-25 except
amplifier test points included
Same as MC7524-25 except
NAND outputs
Same as MC7528-29 except
NAND outputs
11
36
19
44
15
40
55
620
MC7520
B.O
22
47
15
40
55
620
MC7521
33
11
36
19
44
15
40
45
620
MC7522
B.O
22
47
15
40
45
620
MC7523
33
11
36
19
44
15
40
40
620
MC7524
8.0
33
22
47
15
40
620
MC7525
40
11
36
19
44
15
40
40
620.
648'
MC7528
10
35
20
45
15
40
40
620
MC5528
8.0
33
22
47
15
40
40
620,
648'
MC5529
11
36
19
44
15
40
40
10
35
20
45
15
40
40
620
MC5534
8.0
33
22
47
15
40
40
620,
648'
MC5535
11
36
19
44
15
40
40
620,
648'
10
35
20
45
15
40
40
620
MC5538
8.0
33
22
47
15
40
40
620,
648'
MC5539
·Case 648 used with commercial-temperature-range devices only.
3-4
MC7529
MC7534
620,
648'
MC7535
MC7538
MC7539
INTERFACE CIRCUITS (Continued I
Threshold
Voltage @
mV
min
Delay
{mVI
Ins maxI
Case
-55 to +12SoC
o to +7SoC
602B.
606.
632
MC1540
MC1440
MC1441
0.5.u5 cycle time,
20n5 typ response time,
±6.0V pawN supply
Type
Propagation
Vref
14
20
·6.0V
30
14
20
·5.0V
30
607.
632
MC1541
17
23
540
35
632
MC1543
Compatible with MECL,
+5.0V, -5.2V power supplies,
threshold insensitive
to supply variations.
complementary outputs
Voltage
{mV - typl
AC-coupled,
decoded Input channel selection,
wired-OR output capability,
±1.0
Case
25
620
-55 to +12SoC 0 to +7SoC
MC1544
MC1444
output strobe capability.
+5.0V. -6.0V power SUPP IV
±1.4
(±4.0 max)
DC coupled, decoded input, 0.5 mV input offset,
output strobe capability. +5.0 V. -6.0 V power supply
useful with the MCM7001 NMOS memory.
3-5
14 typ
620
MC1446
Ouad Me 75110
Tvpe Driver
with common
inhibit input
EJ
U'I Driver with inhibit
inputs for party-line
driver applications
MTTL
Ouad Line Driver
9.0/9.0
MC3453
3.5/7.0
100
9.0/9.0
632,
646
MC75109
9.0/9.0
632,
646
MC75110
25/15
632
MC75113t
MTTL
100
±18/26
MDTL
VOL
Vdc
Function
100
6.5/15
Differential Party-Line
Driver with push-pull
outputs
620
648
6.5/15
&
VOH
Vdc
&
&
VCC
tpLH/tPHL
Compatibility
min
min
Vdc
VEE
Vdc
MDTL, MTTL
-6.0
-9.0
+6.0
+9.0
+9.0
+13.2
·9.0
·13.2
'@3Oooohms, 15 pF
3-6
ns
Type
typ
Ca..
o to +75°C
150/65'
632
MC1488
INTERFACE CIRCUITS
(Continued)
Function
Case
Type
Dual MOS Clock
Driver with Strobe
~
~
MDTL,MTTL
2.0 MHz
5.0/·20
75
75
50
50
-55 to +125
632
MC1585
0/-20
12
17
7.5
20
-55 to +125
601
632
MMH0026
0/-20
12
17
7.5
20
a to +85
601
626
632
MMH0026C
Dual MOS clock Driver
~
MTTL
~
~
~ r;--
Dual Memory Driver with
logic inputs, 24-volt
output capability
~ Dual Peripheral Positive
AND Driver, plus two
MDTL,MTTL
600
25/25 (to source collectors)
20/20 (to sink outputs)
620,
648#
MDTL,MTTL
300'
21/16
632
646
MC75450
300'
17/18
626
MC75451
noncommitted NPN
MC55325
MC75325
output transistors
~"~_'~'M~
AND Driver with logic
MDTL,MTTL
gate outputs internally
connected to NPN
output transistors
#Case 648 used with industrial·temperature·range devices only.
"Each transistor
3-7
INTERFACE CIRCUITS (Continued)
10(on)
Dual positive NAND
driver with logic gate
outputs internally con·
Compatibility
(mA -max)
MDTL. MTTL
300'
18/16
626
MC75452
MDTL. MTTL
300'
12/17
626
MC75453
MDTL. MTTL
300'
25/19
626
MC75454
nected to NPN output
transistors
~= "".00""" ,,'_
0----
with logic gate outputs
0-
internally connected to
NPN output transistors
~
Function
Quad Segment Driver
Dual positive NOR Driver
with logic gate output
internally connected to
NPN output transistors
Sink Current
(rnA-max)
50
Source Current
(mA-max)
50
tpLHitpHL
Input to Collector Output
(ns· typ)
Case
IV -maxI
Type
Oto+70oC
40/20
10
632
646
MC75491
80/40
10
632
646
MC75492
Hex Digit Driver
250
6·Bit Multiplying
Digital-ta-Analog
Converters
MDTL.
MTTL
±0.7B
2.0
150
8-Bit Multiplying
Digital-ta-Analog
MDTL.
MTTL.
CMOS
±0.19
±0.39
±0.7B
2.0
2.0
2.0
300
200
200
Converters
Collector Voltage
3·8
-20
-20
-20
632
MC1506
MC1406
620
620
620
MC1508LB
MC140BLB
MC140BL7
MC140BL6
INTERFACE CIRCUITS
IContinued)
Compatibility
Function
~
§%
Quad Receiver
with common
3-5tate strobe input,
active pullup outputs
MTTL
±25
±3.0
19/19
620
648
MC3450
MTTL
±25
±:l.0
19/19
620
648
MC3452
MTTL
±25
±3.0
17/17
MC75107
MTTL
±25
±3.0
19/19
MC75108
MTTL
±100
5.5
22/22
(Quad MC75107 type)
Quad Receiver
with common
strobe input,
open collector
outputs
(Quad MC75108 type)
Active Pullup
~~"""
Outputs
with strobe
inputs
U" ",,""'
Open
Collector
Outputs
q~
Dual Single-Ended
Receiver with
common reference
Function
y
y
Y
Y
626
MC75140
Input
Quad Line Receiver
Compatibility
Turn-On
Threshold
(Vdc - max)
Input
Hysteresis
ImV - typ)
tPLHltPHL
(ns - typ)
Type
Case
o to +75°C
MDTL,MTTL
1.5
1.25
250
25125
632
MC1489
MDTL,MTTL
2.25
1.25
1150
25125
632
MC1489A
3-9
INTERFACE CIRCUITS
(Continued)
These comparators are designed specifically for single positive-power-supply operation from +2.0 to +28 Vdc. Each monolithic device
contains four independent comparators, yet total package power supply current drain is 1.5 rnA max.
·Use MeC prefix for nonencapsulated chip.
* *Use MCBC prefix for nonencapsulated beam-lead device; use MeB prefix for beam-lead device in ceramic flat package.
DEFINITIONS
Avol
VID
Via
liB
Open-Loop Voltage Gain
Differential Voltage Range
Input Offset Voltage
Input Bias Current
VOH
VOL
lOs
tp
3-10
Positive Output Voltage
Negative Output Voltage
Output Sink Current
Propagation Delay Time
l1IT~~£rn
l1IT~~£rn
INTEGRATED CIRCUITS
HIGH-FREQUENCY AMPLIFIERS
AGe capability or several gain options to provide extra
design flexibility.
Motorola's high-frequency amplifiers simplify the
design of receivers and signal processors. Many offer
,:~JGI!f,;f;~EOUlNtY.AMP1~~teJj:S!;:::(·',<,,·•
Bandwidth
(MHz)
VOS
(Vp·p)
;:
de to 40
;fi
1.0M
26
(AGC ~ 0)
16
100
35
20
de to 75
2.5
10
50
25
22 min
6.0
1.8
1.0M
4.2
10
100
~i
::
i
~
34dB
46dB
15@Av~52dB
100@ Av
60@ Av
~4.0
~
dB
25d8
40 @ Av ~ 52 dB
90@ Av ~ 40dB
Iii: 120@Av =20dB
4.2
10
100
7.0
3.0
1.0M
4.0
4.0
30
250
1.0
1.0
1.0
16
lOOk
20
AVS
(dB)
25
30- 40
(fixed)
100
46- 52
(fixed)
1.0M
44
(AGC ~ 0)
1.0
52
40
20
45
AGC
VCC. VEE
(Vdc)
Cas.
+125°C
0'0
+7SoC
Ves
No
±6.0
601
MC1510
MC1410
Ves
Ves
±5.0
602A.
607.
632
MC1545
MC1445
No
Ves
+6.0
602B.
606
MC1550
No
No
+6.0
602B
MC1552
No
No
+6.0
602B
MC1553
Ves
Ves
+12
601
MC1590
±6.0
603
632
MC1733
Ves
3-11
. . . .:. i ::'.;:': ..,':
Type
100 k
20
~
.;:.:,;;;:..,: ;:{7~;:. • ·: ....:.<:, \
18
!fixed)
6.0
35@Av~40dB
..
50
4.5
35@ Av
'
90
(fixed)
Izol
(!! @kHz)
40@ Av
,; ~.:.,,::
Diff. Input
and Output
IZinl
(k!! @kHz)
:
"
'
Gp
@60MHz
(dB)
No
·55'0
MC1733C
INTEGRATED CIRCUITS
REGULATORS
Motorola offers a broad line of voltage regulators
ranging from low-cost "Functional Circuits" to
high-precision units. Regulators for positive and negative
voltages are available as well as a unique floating
regulator, type MC1566L, whose maximum output
voltage and current are limited only by the external pass
transistor.
"Also available as nonencapsulated chip. use MeC prefix.
**Also available as nonencapsulated beam-lead device; use MCBC prefix, use MeB prefix for device in ceramic flat package.
3-12
REGULATORS (Continued)
100
20
3.5
11
:~~
~.:
~.~
::::~:
~~~~~__~20~0~__~2~.0~~3~0-+~7~.0~~~~+-__~1~0~__+-~5~0~__+-~~50~__~~2~.~0__-+__~0~.8~__+-~~7~9~__~M~L~M~3~09~
.•
2::
:7
8
5
:225
~~
~.~
~~ ~.~~:
~.~
:~~
~~~~~:~
.. ~7~.7~~8~.3~~~7~5~0__-1-=2~.5~_2~7~~1~0~.5~~3~5~r-~8~.~0__-4~~1~6~0~-4-4~16~0~-+__~7~.5~__~~2~.0~__~-71;99~.~047--+~M~C~77~0~8=C~
;~.: 11.5 12.5
750
2.5
23
14.5
35
8.0
240
240
7.5
2.0
199-04
MC7712C
:1ic 14.4 15.6
750
2.5
20
17.5
35
8.0
300
300
7.5
2.0
199-04
MC7715C
~.'.,. 17.3 18.7
500
3.0
17
21
35
8.0
360
360
7.5
2.0
199-04
MC7718C
19.2 20.8
500
3.0
20
23
40
8.0
400
400
7.5
2.0
199-04
MC7720C
S~
23
25
500
3.0
16
27
40
8.0
480
480
7.5
2.0
199-04
MC7724C
~1
.,
~
I
~
4.8
5.2
1500
2.0
30
7.fJ
35
8.0
100
100
15
~.~
19~;04
MC7805C
5.75
6.25
1500
2.0
29
8.0
35
8.0
120
120
15
20
2'5
199-04
11
MC7806C
2.0
2.5
2.0
2.5
2.0
2.5
2.0
2.5
2.0
199-04
11
199-04
11
199-04
11
199-04
11
199-04
11
7.7
8.3
1500
2.5
27
10.5
35
8.0
160
160
15
11.5
12.5
1500
2.5
23
14.5
35
8.0
240
240
15
14.4
15.6
1500
2.5
20
17.5
35
8.0
300
300
15
17.3
18.7
1000
3.0
17
21
35
8.0
360
360
15
23
25
1000
3.0
16
27
40
8.0
480
480
15
2.5
-~
tPreset Voltage Range; range is adjustable by adding external resistors from ±8.0 to ±20 Vdc.
3-13
..
~,.
MC7808C
MC7812C
MC7815C
MC7818C
MC7824C
REGULATORS (Continued)
* Limited only by the characteristics of the external series pass transistor.
3-14
INTEGRATED CIRCUITS
SPECIAL-PURPOSE CIRCUITS
The linear-integrated-circuits listed in this section
were developed by Motorola for the system design
engineer to fill special-purpose requirements as indicated
by the subheadings. Temperature ranges and package
availability are also tailored to provide versatility.
Function
A four-quadrant multiplier designed to operate with ±15-volt
supplies; has internal level-shift circuitry and voltage regulator.
•
Applications include multiply. divide, square root, mean square,
phase detector, frequency doubler, balanced modulator/demodulator, electronic gain control.
Function
Wide range adjustable timers
3-15
INTEGRATED CIRCUITS
CONSUMER APPUCA TION SELECTOR GUIDE
... reflecting Motorola's continuing commitment to
semiconductor products necessary for consumer system
designs. The tabulation contains data for a large number
of components designed principally for entertainment
product applications. It is arranged to simplify first-order
of linear integrated circuit device lineups to satisfy primary functions for Television,Audio, Radio, Automotive
and Organ applications.
646
MC1352
646
MC1331
646
MC1344
Chroma Subcarrier System
646
MC1370
Chroma I F Amplifier
646
MC1371
1st and 2nd Video IF, AGe
Keyer and Amplifier
3rd IF and Video Detector
3rd IF, Video Detector,
Sound I F Detector. and
Sync Separator
Dusl Chroma Demodulators
603
646.647
Same as MC1328 with short-circuit protected
646
MC1329
646.647
MC1326
646
MC1324
646.647
MC1327
outputs, and improved de tracking and temperature coefficients on outputs.
Similar to MC1328 but with Luminance and
Blanking Inputs,
I nternal Matrix Provides RGe Outputs
Same as MC1326 with short-circuit protected
outputs, and improved de tracking and tempersture coefficients on outputs.
Balanced Demodulator with
3-16
Power
Function
IF Amplifier
limiting FM-IF Amplifier
limiting IF Ampl/Quadrature Detector
IF Amplifier
IF Amplifier, Nonsaturating Limiter
IF Amplifier, limiter, Detector,
Function
Stereo Decoders
Four-Channel SQ* Decoders
53
42
40
21
Supply
IdB - typ)
(Volts-max)
Case
Tvpe
18
18
16
18
20
16
626
646.647
646.647
206A
643A
646
MC1350
MC1355
MC1357
MFC4010A
MFC6010
MC1375
60
45
690
480
50
55
625
Channal
Separation
THO
IdB -1YP)
1% -1YP)
Stereo - Indicator
Lamp Driver
(rnA -max)
45
45
40
40
40
0.5
0.5
0.5
0.3
0.5
40
40
40
75
100
45
0.1
VI DR
IVdc)
Function
Quad Comparator
0.175
0.600
0.4
60
0.25
AMR
2.0 to 28
0.5
±VCC
3-17
SOO
Features
Ca,.
Type
Audio Muting
Audio Muting
646
646
646
646
648
MC1304
MC1305
MC1307
MC1310
MC1311
646
MC1312
Coilless Operation
Coi Iless·Operation,
Emitter Follower
Outputs, and
Unity Gain
I,.A-maxl
Sink Current
Case
Tvpe
1.0
6.0
646
MC3302
CONSUMER APPLICATION SELECTOR GUIDE (Continued)
3-18
LIIEAI
INTEGRATED CIRCUITS
PREVIEWS
4-1
II
Preview of Coming Linear Devices
INDUSTRIAL PRODUCTS
Linear ICs have traditionally found wide application in the diverse Industrial market place.
Numerous types of op amps, voltage regulators, analog multipliers and timers fill important roles in
process control, instrumentation, and signal processing functions. The devices previewed below
complement an already substantial lineup of Motorola Industrial products.
MC3570 High-Slew Operational Amplifier
MC3503
'
I A mp I'f'
MC3403 Q uad O
peratlona
I lers
The MC3570G is intended for applications requiring optimum speed. It has a typical unity gain
slew rate of 100 V/jJ.s with a 30 pF load. Power
bandwidth is an impressive 1.5 MHz, and unity
gain crossover frequency is at 15 MHz. The units
are internally compensated for unity gain stability
with 300 of phase margin.
High-speed signal processing, AID and D/A conversion, and high-frequency instrumentation are
just three examples of areas which can make use of
this high-speed monolithic operational amplifier.
The MC3503/3403 is a quad, true differentialinput operational amplifier designed for either
single or split power supply (±15 V) operation.
The four internally-compensated amplifiers within a package draw a total supply current of only
2.5 rnA maximum - independent of supply voltages. When the device is operated with split supplies, most specifications equal or exceed comparable parameters for the popular MC1741.
FEATURES:
•
•
FEATURES:
Wide supply voltage range:
3.0 V <. V <.36 V or
1±1.5 VI <'v <'1±18 VI
Low power drain: 2.5 rnA maximum for all
four amplifiers
•
Internally compensated
•
Low bias currents: 200 nA maximum
•
4-2
High slew rate: 100V/jJ.s
•
Power bandwidth = 1.5 MHz
•
Unity gain crossover at 15 MHz
Preview of Coming Linear Devices (continued)
LINEAR-DIGITAL INTERFACE PRODUCTS
The need to span the gap between analog information and digital processing is becoming increasingly prevalent. In fact, a whole family of linear (analog)/digital interface devices has arisen
in the past few years. This category is highlighted at Motorola by a number of new monolithic
D/A and A/Dconverters. Several of the newest elements in this rapidly expanding field are the
topics of the fol/owing paragraphs.
MC3537 Hex Unified Bus Receiver
MC3538 Quad Unified Bus Transceiver
MC1505 Digital Voltmeter Subsystem
(AID Converter)
Where bus-organized data transmission systems
are employed, the MC3537 and MC3538 can be
efficiently utilized to solve interface problems. The
MC3537 contains six bus receivers, while the
MC3538 contains four drivers and four receivers
with each driver-receiver pair sharing common
input-output pins.
Both types incorporate hysteresis in the receivers to permit excellent noise immunity, and are
optimized for bus rise and fall times less than
10,us.
The MC1505 is the analog front-end portion of
either a 4~ or 3~ digit DVM. It is designed for use
with the MC14435 McMOS logic subsystem to produce the complete 3~ digit DVM function (ex·
c1uding display). The MC1505 can also be used
alone as a general purpose AID converter.
The MC1505 uses the proven dual ramp AID
conversion technique. The subsystem consists of
an on-chip voltage reference, a pair of voltagel
current converters, an integrator, a current switch,
a comparator, and associated control and calibration circuitry. The device requires only one capacitor and two potentiometers for operation.
FEATURES:
•
•
Hysteresis of 1.0 V provided in receivers
High receiver noise immunity: 2.0 V typical
FEATURES:
•
Receiver input threshold voltage insensitive to
temperature changes
•
MTTL-compatible logic levels
•
•
•
Accuracies to 1 3 bits
Single power supply of +5.0 to +18 V
Accepts positive or negative input voltage
•
Equivalent to DM7837 and DM7838 respectively
•
Digital input and output both MTTL and
McMOS compatible
MC3430
thru
High-Speed Quad Comparators
MC3433
MC3459
.
MC3460 Quad NMOS Memory Dnvers
These quad drivers provide the interface between MTTL logic and NMOS memories. The
MC3459 is a low-voltage driver for address lines
while the MC3460 is a high-voltage device for
driving the clock lines. The devices will drive 350
pF loads with propagation delay times of 25 ns and
35 ns respectively.
The high-voltage version uses a multiplexed
pullup circuit to reduce power consumption.
Both of these comparators feature 20 ns response time and a strobe input common to the four
units. However, the MC3430-31 have active pullup
outputs and a three-state strobe, while the MC343233 are equipped with open-collector outputs.
In applications requiring numerous comparators,
such as the sensing of 11 03-type MOS memories, the
greater package density permitted by the quad
configuration results in considerable saving in
circuit board space.
FEATURES:
•
Four drivers per package
FEATURES:
•
MTTL-compatible inputs
•
Response time; 20 ns typical
•
•
Input offset voltage; 3.0 mW typical
Maximum operating frequency greater than
2.0 MHz
•
Choice of either three-state or open-collector
outputs
•
Strobe input common to all four comparators
4-3
Preview of Coming Linear Devices (continued)
MC3463 Quad MECL Line Driver
MC3462 Quad MECL Line Receiver
The MC3463 is a quad line driver with MECL
10,000 compatible inputs. The device switches a
12 mA current sink between each of the two outputs per channel in response to the input logic
condition. A pair of inhibit inputs is provided with
each inhibit common to two of the channels.
Typical propagation delay time is less than 3.0
ns from the logic inputs and 5.0 ns from the inhibit inputs.
The MC3462 is a quad MECL 10,000 compatible line receiver designed for use with the
MC3463 line driver. The MC3462 has a strobe
input common to all four channels, sensitivity of
8.0 mV, and propagation delay time of only 5.0 ns.
FEATURES:
•
•
MECL 10,000 compatible
Quad configuration
•
•
High-speed operation
12 mA output current capability
FEATURES:
4-4
•
MECL 10,000 compatible
•
High-speed operation
•
•
8.0 mV sensitivity
±3.0 V common mode input voltage range
Preview of Coming Linear Devices (continued)
CONSUMER PRODUCTS
Linear ICs are helping the consumer obtain greater functional value for his dollar. They are permitting greater performance and complexity in entertainment equipment without increasing costs.
In addition, Linear IC useage is growing exponentially in automotive electronic systems to aid in
solving safety and environmental problems. The following new devices are specifically conceived
for use in consumer oriented products.
Radio Circuits
MC1315 Four-Channel Audio logic Circuit
MC1314 Four-Channel Audio VoltageControlled Amplifier
The MC1315 provides the basic logic function
for enhancing the front to back separation in the
CBS SQ* four channel decoding system. The new
IC is designed to interface with the MC1312
decoder and MC1314 gain control unit. The
MC1315 provides variable dc logic enhancement
control signals to the MC1314.
This unit extends the performance of the basic
SQ system to the levels desired for top·of-the-line
systems.
The MC1314 is a gain control and balance
adjustment unit for use with the CBS SQ* system
decoders; I t consists of four amplifiers, with the
gain of each being adjustable by varying a dc
voltage. Thus with four variable resistors, the
master volume and LF/RF, LB/RB and FIB
balance may be controlled.
The unit also has inputs which may be connected to the MC1315 logic enhancement unit to
provide increased front to back separation. This
feature is highly desirable in high performance four
channel stereo systems.
FEATURES:
•
Provides logic enhancement to extend front to
back separation to 20 dB
FEATURES:
•
Provisions for variable enhancement control
•
•
DC controlled gain and balance
Compatible with MC1312 decoder and MC1315
logic enhancement unit
•
High density
•
Excellent tracking between all four channels
•
•
High density
Very low output transients
*SQ is a trademark of Columbia Broadcasting System, Inc.
MC1356 FM Detector/Limiter
The MC1356 includes a limiting amplifier, a
quadrature discriminator, and a voltage regulator.
It has been designed primarily for FM receiver
applications. While similar to the MC1357, it includes built-in regulation capable of supplying 20
mA to external circuitry.
FEATURES:
•
Good line and load regulation
•
•
Low harmonic distortion
Permits single tuning coil design
•
Direct replacement for
•
Regulator is short-circuit protected
j.I LN-2136
4-5
Preview of Coming Linear Devices (continued)
TV Circuits
MC1359 Sound System
MC1394 Horizontal Processor
(Negative Sync)
The MC1359 is a complete sound system for a
television receiver. It includes the IF amplifier,
detector, electronic volume control, and audio
amplifier. The IC provides two watts cif audio
output. All this is packed into a single plastic
package with two heat dissipating tabs.
The dc voltage-controlled volume attenuator
saves thll necessity of long lengths of shielded cable
between the volume control and the audio amplifier circuitry. This advanced system provides 80 dB
of audio attenuation range.
The MC1394 horizontal processor packs the
phase detector, oscillator and pre-driver functions
into a single, convenient 8-lead plastic package.
The new unit provides the entire low-level horizontal signal processing function and may be used
with either transistor or vacuum tu be output stages.
This device is a negative-sync version of the
MC1391.
FEATURES:
•
•
•
•
•
•
FEATURES:
•
•
Excellent AM rejection
DC volume control with 80 dB typical attenuation range
•
Signal to noise ratio = 63 dB typical
•
Few external components required
•
Negative sync pulse operation
Internal shunt regulator
Preset Hold control capability
±300 Hz typical pull-in range
Balanced phase detector
Variable output duty cycle for driving tube or
transistor
Low thermal frequency drift
•
Small static phase error
MC1395/TBA395 PAL Chroma
MC1396/TBA396 PAL Luma
The MC1395 forms a complete three-chip PAL
chroma system when used with the MC1396 PAL
luma and the MC1327 chroma demodulator.
It includes the APC detector, oscillator, ACC
detector and controlled stage, PAL bistable,color
killer, and burst gating.
The MC1396 forms a complete three-chip PAL
chroma system when used with the MC1395 PAL
chroma and the MC1327 chroma demodulator.
It includes the chroma amplifier, chroma control, PAL delay line driver, luminance amplifier,
black level clamp, and beam current limiter.
FEATURES:
FEATURES:
•
•
•
•
•
Tracking dc contrast and chroma level controls
•
•
DC brightness control
Beam current limiter operating on the contrast
control
•
Feedback black level clamp
Internal shunt regulator
Balanced phase detector
±450 Hz typical pull-in range
Low thermal frequency drift
MC13120/TBA120 FM IF Amplifier
The MC13120 isa six-stage differential amplifier/
limiter, balanced coincidence detector with dc
volume control designed for use in radio and TV
FM/IF applications.
FEATURES:
•
•
Low harmonic distortion
One coil detector alignment
•
•
DC volume control
Excellent sensitivity
4-6
LIIEA
INTEGRATED CIRCUITS
INTERCHANGEABILITY
GUIDE
5-1
I
I
INTERCHANGEABILITY GUIDE
This interchangeability guide describes equivalent circuits in two ways: (1) the "Direct
Replacement" which is both electrically and mechanically a direct replacement; and, (2) the
"Functional Equivalent" that is generally similar and is suggested as an alternate. When a functional
equivalent circuit is used for a replacement, the specific data sheet should be consulted.
Packaging availability information for each Motorola device is listed in the Linear Application
Selector Guides section and also appears on the individual data sheet for the device. Exact outline
dimensions are shown in the Packaging Information section of this data book.
TYPE
NUMBER
CA3000
CA3001
CA3002
CA3004
CA3005
CA3006
CA3007
CA3008
CA3008A
CA3010
CA3010A
CA3011
CA3012
CA3013
CA3014
CA3015
CA3015A
CA3016
CA3016A
CA3020
CA3020A
CA3021
CA3022
CA3023
CA3028A
CA30288
CA3029
CA3029A
CA3030
CA3030A
CA3031
CA3032
CA3033
CA3033A
CA3035
CA3037
CA3037A
CA3038
CA3038A
CA3040
CA3041
CA3042
CA3043
CA3047
CA3047A
CA3048
CA3052
CA3053
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EQUIVALENT
TYPE
NUMBER
MC1550G
MC1723G
MC1550G
MC1550G
MC1550G
MC1550G
MC1550G
MC1709F
MC1709F
MC1709G
MC1709G
CA3055
CA3056
CA3056A
CA3058
CA3059
CA3064
CA3064/5A
CA3065
CA306517F
CA3066
CA3067
CA3070
CA3071
CA3072
CA3075
CA3076
CA3079
CA3085
CA3085A
CA30858
CA3909Q
CA3741CT
CA3741T
LH 1 01 F
LH101H
LH201 H
LM100H
LM101AH
LM101H
LM102H
LM104H
LM105H
LM106H
LM107H
LM108AH
LM108H
LM109K
LM110H
LM111D
LM 111 F
LM111 H
LM112H
LM118H
LM1303N
LM1304N
LM1305N
LM1307N
LM1310N
MC1590G
MC1590G
MC1355P
MC1357P
MC1709G
MC1709G
MC1709F
MC1709F
MC1554G
MC1554G
MC1590G
MC1590G
MC1590G
MC1550G
MC1550G
MC1709CP2
MC1709CP2
MC1709CP2
MC1709CP2
MC1712G
MC1712CG
MC1533L
MC1533L
MC1352P
MC1709L
MC1709L
MC1709L
MC1709L
MC1510G
MC1351P
MC1357P
MC1357P
MC1433L
MC1433L
MC3401P
MC1339P
MC1550G
5-2
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EQUIVALENT
MC1723G
MC1741CG
MC1741G
MFC8070
MFC8070
MC1364P
MC1364G
MC1358P
MC1358PQ
MC1398P
MC1328P
MC1370P
MC1371P
MC1328P
MC1375P
MC1590G
MFC8070
MC1723G
MC1723G
MC1723G
MC1310P
MC1741CG
MC1741G
MC1741F
MC1741G
MC1741G
MC1723G
MLM101AG
MC1748G
MLM110G
MLM104G
MLM105G
MC1710G
MLM107G
MC1556G
MC1556G
MLM109K
MLM110G
MLM111L
MLM111F
MLM111G
MC1556G
MC1539G
MC1303L
MC1304P
MC1305P
MC1307P
MC1310P
INTERCHANG EABI LlTY G UI 0 E (continued)
TYPE
NUMBER
LM1351N
LM139AN
LM139D
LM1414J
LM1414N
LM1458H
LM1458N
LM1489AJ
LM1489J
LM1496H
LM1496N
LM1514J
LM1558H
LM1596H
LM200H
LM201AH
LM201H
LM202H
LM204H
LM205H
LM206G
LM207H
LM208H
LM209K
LM210H
LM211D
LM211F
LM211 H
LM2111N
LM212H
LM218H
LM239AN
LM239D
LM330H
LM301AH
LM301AN
LM302H
LM304H
LM305H
LM306H
LM3064H
LM3064N
LM3065N
LM3067N
LM307H
LM3070N
LM3071N
LM3075N
LM308AH
LM308H
LM309K
LM310H
LM311D
LM311 F
LM311H
LM312H
LM318H
LM320-05K
LM320-05.2K
LM320-12K
LM320-15K
LM339AN
LM339D
LM339N
LM340-05K
LM340-05T
LM340-06K
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EaUIVALENT
TYPE
NUMBER
LM340-06T
LM340-08K
LM340-08T
LM340-12K
LM340-12T
LM340-15K
LM340-15T
LM340-18K
LM340-18T
LM340-24K
LM340-24T
LM370H
LM370N
LM371H
LM376N
LM380N
LM381N
LM382N
LM3900N
LM3901N
LM4250CH
LM4250H
LM5520J
LM5521J
LM5523J
LM5525J
LM5528J
LM5529J
LM5534J
LM5535J
LM5538J
LM5539J
LM555CH
LM555D
LM555H
LM703LN
LM709CH
LM709CN
LM709H
LM710CH
LM710CN
LM710H
LM711CH
LM711 H
LM723CD
LM723CH
LM723D
LM723H
LM733CD
LM733CH
LM733D
LM733H
LM741CD
LM741CH
LM741CN
LM741CN-14
LM741D
LM741F
LM741 H
LM746N
LM747CC
LM747D
LM748CH
LM748H
LM75107N
LM75108N
MC1351P
MC3302P
MC3302P
MC1414L
MC1414L
MC1458G
MC1458P1
MC1489AL
MC1489L
MC1496G
MC1496L
MC1514L
MC1558G
MC1596G
MC1723CG
MLM201AG
MC1748CG
MLM210G
MLM204G
MLM205G
MC1710CG
MLM207G
MC1456G
MLM209K
MLM210G
MLM211L
MLM211F
MLM211G
MC1357P
MC1456G
MC1439G
MC3302P
MC3302P
MC1723CG
MLM301AG
MLM301API
MLM310G
MLM304G
MLM305G
MC1710CG
MC1364G
MC1364P
MC1358P
MC1328P
MLM307G
MC1370P
MC1371P
MC1375P
MC1456G
MC1456G
MLM309K
MLM310G
MLM311 L
MLM311F
MLM311G
MC1456G
MC1439G
MC7905CK
MC7905.2CK
MC7912CK
MC7915CK
MC3302P
MC3302P
MC3302P
MC7805CK
MC7805CP
MC7806CK
5-3
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EaUIVALENT
MC7806CP
MC7808CK
MC7808CP
MC7812CK
MC7812CP
MC7815CK
MC7815CP
MC7818CK
MC7818CP
MC7824CK
MC7824CP
MC1590G
MC1350P
MFC6010
MFC6030A
MFC9020
MC1339P
MC1339P
MC3401P
MC3302P
MC1776CG
MC1776G
MC7520L
MC7521 L
MC7523L
MC7525L
MC7528L
MC7529L
MC7534L
MC7535L
MC7538L
MC7539L
MC1455G
MC1455P1
MC1555G
MFC6010
MC1709CG
MC1709CP2
MC1709G
MC1710CG
MC1710CP
MC1710G
MC1711CG
MC1711G
MC1723CL
MC1723CG
MC1723L
MC1723G
MC1733CL
MC1733C
MC1733L
MC1733G
MC1741CL
MC1741CG
MC1741CP1
MC1741CP2
MC1741L
MC1741F
MC1741G
MC1328P
MC1747CL
MD1747L
MC1748CG
MC1748G
MC75107L
MC75108L
I
•
INTERCHANGEABILITY GUIDE (continued)
TYPE
NUMBER
LM75109N
LM75110N
LM7520J
LM7520N
LM7521J
LM7521N
LM7522J
LM7522N
LM7523J
LM7523N
LM7524J
LM7524N
LM7525J
LM7525N
LM7528J
LM7528N
MC7529J
LM7529N
LM75325N
LM7534J
LM7534N
LM7535J
LM7535N
LM7538J
LM7538N
LM7539J
LM7539N
LM75450AN
LM75451AN
LM75452N
LM75453N
MHOO26CH
MHOO26CN
NE501A
NE501 K
NE515A
NE515G
NE515K
NE516A
NE516G
N E516K
NE528B
NE528E
NE531G
NE531T
N E531 V
NE533G
NE533T
NE533V
NE537G
NE537T
NE540L
NE550A
NE550L
NE555T
NE555V
N5070B
N5071A
N5072A
N5111
N5556T
N5556V
N5558F
N5558T
N5558V
N5595A
N5595F
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EQUIVALENT
TYPE
NUMBER
MC75109L
MC75110L
N5596A
N5596K
N5709A
N5709G
N5709T
N5709V
N5710A
N5710T
N5711A
N5711 K
N5723A
N5723T
N5733K
N5741A
N5741T
N5741V
N5747A
N5747F
N5748A
N5748T
N7520B
N7521 B
N7522B
N7523B
N7524B
N7525B
PA239A
SE501 K
SE515G
SE515K
SE516A
SE516G
SE516K
SE528E
SE528R
SE531G
SE531T
SE533G
SE533T
SE537G
SE537T
SE540L
SE550L
SE555T
SN52101AL
SN52107L
SN52558L
SN52702F
SN52702L
SN52702Z
SN52709F
SN52709L
SN52710J
SN52710L
SN52710N
SN52710S
SN52711J
SN52711L
SN52711S
SN52733L
SN52741J
SN52741L
SN52741Z
SN52747J
SN52748J
SN52748L
SN52770L
MC7520L
MC7520L
MC7521 L
MC7521 L
ML7522L
MC7522L
MC7523L
MC7523L
MC7524L
MC7524L
MC7525L
MC7525L
MC7528L
MC7528L
MC7529L
MC7529L
MC75325P
MC7534L
MC7534L
MC7535L
MC7535L
MC7538L
MC7538L
MC7539L
MC7539L
MC75450P
MC75451P
MC75452P
. MC75453P
MMHOO26CG
MMHOO26CPl
MC1733CL
MC1733CG
MC1420G
MC1520F
MC1420G
MC1420G
MC1520F
MC1420G
MC1444L
MC1444L
MC1439G
MC1439G
MC1439P
MCl776CG
MCl776CG
MCl776CG
MC1456G
MC1456G
MFC8020A
MFC6030A
MCl723CG
MC1455G
MC1455Pl
MC1370P
MC1371P
MC1328P
MC1357P
MC1456G
MC1456G
MC1458L
MC1458G
MC1458Pl
MC1495L
MC1495L
5-4
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EaUIVALENT
MC1496L
MC1496G
MC1709CP2
MC1709CF
MC1709CG
MC1709CPl
MC1710CP
MC1710CG
MC1711CP
MC1711CG
MFC6030A
MC1723CG
MC1733CG
MC1741CP2
MC1741CG
MC1741CPl
MC1747CL
MC1747CL
MC1747CG
MC1748CG
MC7520P
MC7521P
MC7522P
MC7523P
MC7524P
MC7525P
MC1339P
MC1733G
MC1520F
MC1520G
MC1520G
MC1520F
MC1520G
MC1544L
MC1544L
MC1539G
MC1539G
MCl776G
MCl776G
MC1556G
MC1556G
MFC8020A
MC1723G
MC1555G
MLM101AG
M LMl 07G
MC1558G
MC1712F
MC1712G
MC1712F
MC1709F
MC1709G
MC1710L
MC1710G
MC1710P
MC1710F
MC1711L
MC1711G
MC1711F
MC1733G
MC1741 L
MC1741G
MC1741F
MC1747L
MC1748G
MC1748G
MC1556G
INTERCHANG EABI LlTY GUIDE (continued)
TYPE
NUMBER
SN52771 L
SN5510F
SN5510L
SN55107J
SN5510BJ
SN55109J
SN5511F
SN5511 L
SN55110J
SN5524J
SN5525J
SN552702N
SN56514L
SN72301AL
SN72301AN
SN72301AP
SN72307L
SN72558L
SN72558P
SN72611S
SN72702F
SN72702L
SN72702N
SN72709L
SN72709N
SN72709P
SN72709S
SN7271N
SN727l0J
SN72710L
SN72710N
SN72710S
SN72711J
SN72711 L
SN72720N
SN72733L
SN72733N
SN72741J
SN72741 L
SN72741N
SN72741P
SN72741Z
SN72747J
SN72747N
SN72748L
SN72770L
SN72771 L
SN7510F
SN7510L
SN75107J
SN75107N
SN7510BJ
SN7510BN
SN75109J
SN75109N
SN7511L
SN75110J
SN75110N
SN75140P
SN75150J
SN75150N
SN75188J
SN75189J
SN7520J
SN7520N
SN7521J
SN7521N
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EQUIVALENT
TYPE
NUMBER
MC1556G
SN7522J
SN7522N
SN7523J
SN7523N
SN75234J
SN75235J
SN7523BJ
SN75239J
SN7524J
SN7524N
SN7525J
SN7525N
SN7528J
SN7528N
SN7529J
SN7529N
SN75325J
SN75450AN
SN75450N
SN75451AP
SN75451P
SN75452P
SN75453P
SN75454P
SN75491N
SN75492N
SN76104N
SN76105N
SN76107N
SN76242N
SN76243N
SN76246N
SN76514L
SN76514N
SN76530P
SN76564N
SN76600P
SN76642N
SN76650N
SN76651N
SN76653N
SN76665N
SN76675N
S5556T
S5558F
S555BT
S5596F
S5596K
S5709G
S5709T
S5710T
S5711 K
S5723T
S5733K
S5741T
553250
7020C
7020M
702FC
702FM
702HC
702HM
703HC
703HM
7090C
7090M
MC1510F
MC1510G
MC55107L
MC55108L
MC75109L
MC1510F
MC1510G
MC75110L
MC7524L
MC7524L
MC1712L
MC1596G
MLM301AG
MLM301AP1
MLM301AP1
MLM307G
MC145BG
MC145BP1
MC1711CF
MC1712CF
MC1712CG
MC1712CL
MC1709CG
MC1709CP2
MC1709CP1
MC1709CF
MC1711 CP2
MC17l0CL
MC1710CG
MC1710CP2
MC17l0CF
MC17l1CL
MC1711CG
MC1414L
MC1733CG
MC1733CL
MC1741CL
MC1741CG
MC1741CP2
MC1741CP1
MC1741CF
MC1747CL
MC1747CL
MC1748CG
MC1456G
MC1456G
MC1410F
MC1410G
MC75107L
MC75107L
MC75109L
MC75108L
MC75109L
MC75109L
MC1410G
MC75110L
MC75110L
MC75140P1
MC1488L
MCl48BL
MC148BL
MCl489L
MC7520L
MC7520L
MC7521 L
MC7521L
5-5
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EQUIVALENT
MC7522L
MC7522L
MC7523L
MC7523L
MC75234L
MC75235L
MC75238L
MC75239L
MC7524L
MC7524L
MC7525L
MC7525L
MC752BL
MC7528L
MC7529L
MC7529L
MC75325L
MC75450P2
MC75450P2
MC75451P
MC75451P
MC75452P
MC75453P
MC5454P
MC75491P
MC75492P
MC1304P
MC1305P
MC1370P
MC1370P
MC1371P
MC1328P
MC1496G
MC1496L
MC1330P
MC1364P
MC1350P
MC1357P
MC1352P
MC1351P
MC1353P
MC1353P
MC1375P
MC1556G
MC1558L
MC155BG
MC1596L
MC1596G
MC1709F
MC1709G
MC1710G
MC1711G
MC1723G
MC1733G
MC1741G
MC55325L
MC1712CL
MC1712L
MC1712CF
MC1712F
MC1712CG
MC1712G
MFC6010
MFC6010
MC1709CL
MC1709L
•
INTERCHANGEABI LlTY GUIDE (continued)
TYPE
NUMBER
709FC
709FM
709HC
709HM
710DC
710DM
710FC
710FM
710HC
710HM
711DC
711DM
711 FC
711FM
711 HC
711HM
719HC
719HM
723DC
723DM
723HC
723HM
729DC
732DC
733DC
733DM
733FC
733FM
733HC
733HM
739DC
739DM
741DC
741DM
741FC
741FM
741HC
741HM
741TC
746DC
746HC
747DC
747DM
747HC
747HM
748HC
748HM
7524DC
7525DC
75325D
75325P
754DC
754HC
754TC
757DC
757DM
767DC
776HC
776HM
780DC
7805KC
7805UC
7806KC
7806UC
7808KC
7808UC
781DC
MOTOROLA
DIRECT
REPLACEMENT
MOTOROLA
FUNCTIONAL
EOUIVALENT
TYPE
NUMBER
MC1709CF
MC1709F
MC1709CG
MC1709G
MC1710CL
MC1710L
MC1710CF
MC1710F
MC1710CG
MC1710G
MC1711CL
MC1711L
MC1711CF
MC1711F
MC1711CG
MC1711G
7812KC
7812UC
7815KC
7815UC
7818KC
7818UC
7824KC
7824UC
796HC
796HM
MC1357P
MC1357P
MC1723CL
MC1723L
MC1723CG
MC1723G
MC1305P
MC1304P
MC1733CL
MC1733L
MC1733CF
MC1733F
MC1733CG
MC1733G
MC1303P
MC1303P
MC1741CL
MC1741 L
MC1741CF'
MC1741F
MC1741CG
MC1741G
MC1741CP1
MC1328P
MC1328P
MC1747CL
MC1747L
MC1747CG
MC1747G
MC1748CG
MC1748G
MC7524L
MC7525L
MC75325L
MC75325P
MC1355P
MC1355P
MC1355P
MC1350P
MC1350P
MC1307P
MC1776CG
MC1776G
MC1370P
MC7805CK
MC7805CP
MC7806CK
MC7806CP
MC7808CK
MC7808CP
MC1371P
5-6
MOTOROLA
DIRECT
REPLACEMENT
MC7812CK
MC7812CP
MC7815CK
MC7815CP
MC7818CK
MC7818CP
MC7824CK
MC7824CP
MC1496G
MC1596G
MOTOROLA
FUNCTIONAL
EOUIVALENT
LI Ell
INTEGRATED CIRCUITS
CHIP INFORMATION
6-1
6-2
LINEAR INTEGRATED CIRCUIT
CHIPS
Most of the linear integrated circuit devices in this Data Book are available in chip form. Many
are offered in several options - such as conventional (face up bonding), beam lead, and flip-chip
versions. Motorola offers many standard linear chips from warehouse stock either directly from the
factory or through franchised distributors. In addition, custom linear IC chips may be designed and
produced to meet a specific need.
Specific information on chip processing, testing, and handling can be obtained in the Semiconductor Chips Data Book.
Electrical limits for stocked linear IC chips in conventional, beam lead, and flip-chip formats
are included on data sheets in this book. (See page 6-4 for listing of stocked chips.)
LINEAR CHIP FORMATS
Conventional Chips encompass by far the greatest number
of available linear Ie chips. These silicon chips use gold backside metalization for easy eutectic bonding to the metalized
area of hybrid assemblies. The interconnecting metalization
and bonding pad areas are formed from evaporated aluminum.
Either gold or aluminum wire may be employed for connection
between on-chip bonding pads and the external circuit.
Beam-Lead Chips are distinguished from conventional chips
by the presence of cantilevered beams used to interconnect
the chip circuit element with the substrate circuit bonding
pads. In production, a complex integrated circuit chip with a
large number of interconnecting beams can be connected to
the substrate, forming all necessary interconnections in a single
operation, using wobble·bonding techniques. I n addition, the
entire surface of a beam-lead chip, except the beams, is covered
with a passivating layer of silicon nitride that is as effective as a
hermetically sealed package in protecting the circuit against
contamination.
Flip-Chips, like beam-lead chips, can be mounted to a
hybrid substrate in a single operation.
In the case of flip-chips, connection to the substrate bonding pads is made by means of raised "solder bumps" that pro·
trude above the chip surface at the integrated-circuit bonding
pads. The devices are mounted to the substrate metalization
areas circuit side down by means of conventional ref low solder
techniques.
6-3
STOCK CHIP AVAILABILITY
All of the chip options listed below are stock items. In addition, nearly all linear devices are
available in chip form. Generally these chips are specified only at room temperature (2!PC).
Packaged Device
Part Number
MC1436
MC1536
MC1439
MC1539
MC1458
MC1558
MC1463
MC1563
MC1469
MC1569
MC1495
MC1595
MC1709
MC1709C
MC1710
MC1710C
MC1711
MC1711C
MC1723
MC1723C
MC1741
MC1741C
MC1748
MC1748C
Standard Chip
Part Number*
Beam-Lead Chip
Part Number#
MCC1436
MCC1536
MCC1439
MCC1539
MCC1458
MCC1558
MCC1463
MCC1563
MCC1469
MCC1569
MCC1495
MCC1595
MCC1709
MCC1709C
MCC1710
MCC1710C
MCC1711
MCC1711C
MCC1723
MCC1723C
MCC1741
MCC1741C
MCC1748
MCC1748C
Flip-Chip
Part Number*
MCCF1458
MCCF1558
MCBC1709
MCCF1709
MCCF1709C
MCBC1710
MCBC1723
MCBC1741
MCCF1741
MCCF1741C
MCBC1748
·Standard chips and flip-chips are sold only in multiples of 10 or 100. Add -1 to
part number when ordering multiples of 10; add -2 to part number when order. ing multiples of 100.
#Beam·lead devices a"re sold only in multiples of 5.
6-4
LIIEAI
INTEGRATED CIRCUITS
MIL-M-38510
PROGRAM
I
7-1
•
7-2
MIL-M-38510
LINEAR INTEGRATED CIRCUITS
Under the M I L-M-3851 0 program, Motorola linear integrated circuits may be procured to the specifications of M I L-M-3851 0 and to four levels of processing which
meet the screening requirements of MI L-STD-883.
This comprehensive program is structured to provide an environment in which
proven methods of manufacturing, quality assurance, monitoring, screening, and
testing can produce the most reliable product on the market. Because it is a
"standard" hi-rei program, it is designed to facilitate delivery and to minimize specification preparation time.
Motorola has qual ified a variety of linear integrated circu its under the MIL -M-3851 0
program. These device types are available (more will be available during 1974) as
JAN-QUALI F I ED product. These devices have specific detailed specifications called
"slash specs".
In addition, nearly all full-temperature-range linear device types are available as
JAN-PROCESSED product with the same MIL-M-38510 processing sequences as
Qualified product, but with other requirements as listed on page 7-5.
Further details and specific processing information can be obtained from your
Motorola representative.
Note that this program supercedes the Checkmate high-reliability processing
program.
7-3
MIL-M-38510 Program
(continued)
MIL-M-38510 JAN-QUALIFIED PRODUCT
JAN-QUALIFIED devices are built to the stringent specifications outlined by the Defense
Electronics Supply Center (DESC). These devices must be manufactured in a government-approved
facility and are screened to electrical limits outlined in government documents referred to as "slash
sheets". These specifications may differ from standard Motorola electrical limits as stated in the
device data sheets.
HOW TO ORDER
MIL-M-38510 JAN-QUALIFIED
PRODUCT
MAJOR REQUIREMENTS OF
JAN-QUALIFIED PRODUCT
1. G.S.I. (Government Source Inspection) provided
upon request.
Military Part No.
2. Must be manufactured in a Government approved
facility.
A typical military part number consists of the
following elements:
3. Product inventoried in distributor and OEM warehouses.
LINEAR ICs QUALIFIED
or In Process of Qualification
MIL-M-38510
Device Type
J
M38510
/XXX
XX
B
C
B
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(1)
(2)
J - This indicates a qualified device.
M38510 - This is the military designator.
(3)
/XXX - This three-digit number signifies the
detail specification ("slash spec") in which
the device type is found. This specification
generally contains more than' one device type
and is written for various generic groupings
(i.e., Op Amps, Voltage Regulators, etc.).
(4)
XX - This two-digit number identifies the
device type within the detail specification.
(5)
(6)
B - This is a single letter and specifies the
device class per MIL-M-38510 and will be
class A, B, or C.
Case outline (see listing on page 7-5).
(7)
Lead finish (see listing on page 7-5).
Motorola
Source
Device Type
JM38510/10101BCG
BGC
BHB
MC1741
JM38510/10102BAB
BCB
BIC
MC1747
JM38510/10103BGC
MLM101A
JM38510/10104BAB
BCB
BGC
MLM108
Motorola Part No.
JM38510/10201BCB
BHB
BIC
MC1723
The Motorola equivalent of the JAN M38510
part number is as follows, and should be referenced
when ordering your specific device requirement:
MCXXXX
BCB
J
JM38510/10301BCB
BGG
BHB
MC1710
JM38510/10302BCB
BHB
BIC
MC1711
JM38510/10304BCB
BGC
BHB
MLM111
JM38510/10401BCB
MC55107
JM38510/10402BCB
MC55108
(1)
(1)
(2)
(3)
(2)
(3)
The MCXXXX designates the Motorola source
device type.
The first three letters after the part number
have the same meaning and order as in the
JAN part numbering system; this will simpi ify you r cross-referenci ng.
J, which is the last letter in the part number,
designates a JAN-QUALIFIED device.
Example:
Order No.: MC1741BCBJ
Device Marking:
JM38510/10101BCB
7-4
MIL-M-38510 Program (continued)
MIL-M-38510 JAN-PROCESSED PRODUCT
JAN-PROCESSED product is intended to assure the same high reliability manufacturing
sequences as JAN-Qualified devices, but without the requirement for government source
inspection_ JAN-Processed devices are available tested to either "slash-sheet" limits or to
Motorola data sheet electrical limits. This part of the program replaces the Motorola Checkmate
hi-reI program and encompasses al/ military-temperature-range linear ICs rather than just those
covered under existing "slash sheets".
MAJOR REQUIREMENTS OF
JAN-PROCESSED PRODUCT
1. No G.S.I. provided.
HOW TO ORDER
MIL-M-38510 JAN-PROCESSED
PRODUCT
2. Government-approved facility not required.
Motorola Part No.
3. Product supplied with MIL-M-38510 electrical
specifications will be designated by an "M" suffix.
4. Product supplied with Motorola standard data
sheet electrical specifications will be designated by
an "5" suffix.
The part number for ordering a JAN-Processed
device consists of the following elements:
MCXXXX
B
CBS
(1)
(2)
(3)
(4)
(5)
5. Devices will be manufactured using design and
processing guidelines contained in MIL-M-38510.
(1)
The MCXXXX designates the Motorola source
device type.
6. Inventories will be maintained prior to burn-in and
final electrical tests.
(2)
B - This is a single letter and specifies the
device class per MIL-M-38510 for classes A,
B, and C. Class 0 is an added Motorola
JAN-Processing class and is the same as the
MIL-M-38510 Class B except for the differences
shown in the Screening Procedures table.
(3)
Case outline (see listing on this page).
DESIGNATIONS COMMON TO BOTH
JAN-QUALIFIED AND
JAN-PROCESSED PRODUCTS
Case Outline Designator
#A
B
C
#0
E
1/4" x 1/4" flat pack, 14 pin
(4)
Lead finish (see listing on this page).
(5)
S - This is a single letter and specifies the
electrical specifications to wh ich the device is
to be screened during electrical testing, and will
be either an S or M. An S specifies the use of
Motorola standard data sheet electrical specifications. An M specifies the use of JAN "slash
sheet" electrical specifications where they exist.
1/8" x 1/4" flat pack, 14 pin
1/4" x 3/4" dual-in-line, 14 pin
1/4" x 3/8" flat pack, 14 pin
1/4" x 3/4" dual-in-line, 16 pin
F
1/4" x 3/8" flat pack, 16 pin
G
H
8 lead can
I
J
10 lead can
1/2" x 1-1/4" dual-in-line, 24 pin
K
3/8" x 1/2" flat pack, 24 pin
Z
1/4" x 1/2" flat pack, 24 pin
Example:
Order No.:
MC1741BCB(MorS)
Device Marking: MC38510/1741BCB (M or S)
1/4" x 1/4" flat pack, 10 pin
#A and 0 outlines are interchangeable
Lead Material and Finish
A
Kovar or Alloy 42,
with hot solder dip
B
Kovar or Alloy 42,
with bright acid tin plate
C
Kovar or Alloy 42,
with gold plate
7-5
MI L-M-38510 Program (continued)
SCREENING PROCEDURES
(To MIL-STO-883 Requirements)
This program establishes screening procedures for total lot screening of integrated
circuits to assist in achieving levels of quality
and reliability commensurate with the intended
application. In recognition of the fact that the
levei of screening has a direct impact on the
cost of the product as well as its quality and
reliability, four standard levels of screening are
provided to coincide with four device classes or
levels of product assurance.
CLASS A
SCREEN
Internal Visual (Precap)
Stabilization Bake
Thermal Shock
Temperature Cycling
Mechanical Shock
Constant Acceleration
Seal
i~l ~i:;'~s
Interim Electrical
Parameters
Burn-in test
Interim Electricals
METHOD
2010 Cond
A and 38510
100824 hrs
min. test
condition C
lOll, Cond A
1010, Cond C
2002 Cond F
One Shock in
y, plane only
or 5 shocks
at Cond B in
VI plane
CLASS B
RQMT
100%
100%
100%
100%
METHOD
2010 Cond
Band 38510
1008,24 hrs
min, test
condition C
100%
1014
CLASS D
CLASS C
RQMT
100%
100%
METHOD
RQMT
2010 Cond
Band 38510
1008,24 hrs
min, test
condition C
100%
100%
100%
METHOD
2010 Cond
Band 38510
1008,24 hrs
min, test
condition C
1010 Cond C
-
100%
RQMT
100%
100%
-
-
1010, Cond C
100%
2001 Cond E
(min) in Y l
plane then
y, plane
JAN slash-sheet
electrical
specification
unless otherwise
designated
1015
240 hrs@
125'C min
JAN slash-sheet
electrical specifications unless
otherwise
Flexibility is provided in the choice of con·
ditions and stress levels to provide screens,
tailored to a particular product or application.
Selection of a level better than that required for
the specific product and application will, of
course, result in unnecessary expense. A level
less than that required will result in an unwarranted risk that reliability and other requirements will not be met. For general hi·rel
applications, the Class B screening level should
be considered.
1010, Cond C
100%
-
-
2001 Cond E
(min)Y,
plane
100%
2001 Cond E
(min) y,
plane
100%
2001 Cond E
(min) y,
plane
100%
100%
1014
100%
1014
100%
1014
100%
100%
JAN slash-sheet
electrical
specifications
unless otherwise
designated
100%
-
Motorola stand_
data sheet
electrical specs
unless otherwise
indicated
100%
100%
1015
168 hrs@
125'C min
100%
-
1015
168 hrs @
125'C min
100%
JAN slash-sheet
electrical
specifications
unless otherwise
designated
100%
Motorola stand.
data sheet
electrical specs
unless otherwise
indicated
100%
100%
designated
Reverse Bias Burn-in
Final Electrical tests
(a) Static tests
(1) 25'C (Subgroup
I table I 5005)
(2) Max and min
rated op. temperature
(subgroups 2 and 3
table 1, 5005)
(b) Dynamic tests andl or
switching tests 25'C
(subgroup 4 and 9
table 1, 5005)
(C) Functional test
25'C (subgroup 7
table I, 5005)
Radiographic
1015 Cond A
er C 72 hrs
at 150'C min
JAN slash-sheet
electrical
speCifications
unless otherwise
designated
2012
100%
100%
JAN slash-sheet
electrical
specifications
unless otherwise
designated
100%
100%
100%
-
-
100%
100%
-
-
100%
100%
100%
100%
5005
Class C
2009
5005
Class A
100%
per
38510
5005
Class B
per
38510
External Visual
2009
100%
2009
100%
.
-
-
Qualification or quality
conformance inspection
.
"Group A per 5005. Generic data available for groups B & C on devices
produced to Class B. C. 0 for JAN processed (from JAN program)
7-6
5005
Class B
100%
2009
•
.
-
per
38510
100%
LI E
INTEGRATED CIRCUITS
DATA SHEETS
8-1
f
MC1303L
L--_ _ _
l . . ____
D_U_A_L_ST_E_R_E_O_PR_EA_M_PL_I_F_IE_R-----'
DUAL
STEREO PREAMPLIFIER
INTEGRATED CIRCUIT
MONOLITHIC DUAL STEREO PREAMPLIFIER
... designed for amplifying low· level stereo audio signals with two
preamplifiers built into a single monolithic semiconductor.
MONOLITHIC
SILICON EPITAXIAL PASSIVATED
Each Preamplifier Features:
•
Large Output Voltage Swing - 4.0 V(rms) min
•
High Open·Loop Voltage Gain; 6000 min
• Channel Separation; 60 dB min at
io kHz
• Short·Circuit·Proof Design
MAXIMUM RATINGS (T. = + 2S'C unless otherwise noled)
Rating
Symbol
Value
Unit
Power Supply Voltage
V+
V-
+15
-15
Vdc
Vdc
Power Dissipation (Package Limitation)
Derate above 25'C
PD
625
5.0
mW
mW/'C
Operating Temperature Range
TA
o to +75
'c
CIRCUIT SCHEMATIC
INPUT LAG I
10 11
OUTPUT LAG I
12
-
C ERAMIC PACKAGE
CASE 632
TO·116
EQUIVALENT CIRCUIT
14
INPUT
LAG 1
V+
1011 12
800
NON·INVERTING
INPUT 1 +9
-8
INVERTING
INPUT 1
24k
OUTPUT 1
13
9
INPUT 1
8
V- 7
24k
OUTPUT 2
1
6
INPUT 2
6.8k
V- 7
6.8k
INVERTING
INPUT 2 - 6
9.6k
800
4 3
INPUT LAG
2
OUTPUT LAG 2
Sea Packaging Information Section for outline dimensions.
8-2
5
MC1303L (continued)
ELECTRICAL CHARACTERISTICS (Each Preamplifier) (V+ = +13 Vdc, V- = -13 Vdc,
T A = +250 C unless otherwise noted)
Characteristic Definitions (linear operations)
Lr=t>-:r"
-,--=
Characteristic
Symbol
Min
Typ
Max
Unit
6,000
10,000
-
v/V
4.0
5.5
-
-
1.0
10
-
0.2
0.4
-
1.5
10
-
-
400
60
70
-
AVDL= IO.ut
'in
+
Open Loop Voltage Gain
AyOL
Output Voltage Swing
(R L = 10 kG)
Vout
~
;=t>----o
12~
I,
+
Input Bias Current
Ib
V(rms
tJ. A
~ = II + 12
2
12~
II
+
~
Input Offset Current
(liO = II - 12)
I.
Input Off set Voltage
V.
DC Power Dissipation
(Power Supply = ± 13 V, Vout = 0)
PD
10
10
tJ. A
mV
Vio
+
Vout"'O
e;n~eoutl
f=[>---eout2
Channel Separation
(f = 10 kHz)
8-3
e
e
out 1
out 2
mW
dB
MC1303L (continued)
TYPICAL PREAMPLIFIER APPLICATIONS
FIGURE 2 - BROADBAND AUDIO AMPLIFIER
FIGURE 1 - MAGNETIC PHONO PLAYBACK
PREAMPLIFIER/RIAA EQUALIZED
680pF.
820pF
1.0~FI3.0
V
INPUT@--lf.....- - {
INPUT
(i).-lf-..--{
OUTPUT
OUTPUT
L...._-+__.v+
"-----+--. v-
1.5nF
~
"
~
Voltage Gain: 40 dB (lOU)@l1.0kHzreielll'nce
Output Voltage Swing: 5.0 V(rms)
-
z +20
+1 0
...... 1'--
UJflllllll1 111111111111111111 Imllill
0
C
N
c(
::l
1-'
10
100
1.0k
I, fREQUENCY (Hz!
0
i
~ .....
+Vin o--J\lW--.....-
-20
10
10k
1.0k
100
lOOk
.....--ov+
Z1
f, FREQUENCY (Hz)
21 = MZ-500·19
(13 V nom.)
TYPICAL PERFORMANCE CHARACTERISTICS
S!rlectseriesRbv
34 dB (50)@ 1.0 kHz
Voltage Gain
O.lJ.1F
l00mVrms@1.0kHz
Input Overload Point
Output Voltage SWing
5,OVrms@1.0kHz@O.1%THO.
Better Than 70 dB Below 10 mV PhonQ
Output Noise Level
10k
allowingllmAfor
zener, and each dual
IJCPreamplitilir
Inpi.lt (Input Shorted)
FIGURE 3 - NAB TAPE HEAD EQUALIZATION
+20
"iitt
~/,
~r--..
7'f..in/s
0
!
>
TAPE HEAD IN (i)-II~--{
~
I)....---I--_v+
0
N
:::;
'"
~:>
)-------+----eV-
~r-
C
820k
3%infs
I'--\--
-1 0
17~;'"
'"
-20
30
Co:: 1500pFfor33/4inh
III
50
100
300
500
1000
3000500010,000
C=910pFfor71l2in/s
20,000
f, FREOUENCY (Hz)
8-4
Voltage Gain: 35 dB@1.0kHz
Output Voltllge Swing: 5.0 V(rms)
lOOk
MC1303L
(continued)
FIGURE 4 - POWER DISSIPATION versus
SUPPLY VOLT AGE
FIGURE 5 - OUTPUT LINEARITY
400
!z
~
C
!C
/
100
;; 0.4
Y+=~13V
~
AV = 100
1= 1.0 kHz
'"
z
o
/
L
/""
200
'"~
.P
:!i
I
300
o
iii
~ 0.5
L
~ 0.3
RL = 100kohm
C
'"~
0.2
--
~
~
, /"
-' O. 1
'"
I-
o
I-
o
0
0"
o
i=
16
12
8.0
4.0
0
,
f-"
4.0
2.0
6.0
Vout • OUTPUT VOLTAGE IVlrmsl)
FIGURE6 - INFLUENCE OF OUTPUT LOADING
6.0
~
I
50
z: 4.0
THO ='I,!!.
w
~
./
3.0
:::>
~ 2.0
o
./
/'
./
./
V
THO=O.I%
/'
V
~L
Y+=±13V
./
./
1.0
L
./
.,/
I-
--- -,...-
rV
,/"
to
~
~
~
AV=100~*
L
1= 1.0 kHz
RF=100kn
RS = 1.0kn
2.0
S.O
':' RS
20
10
RF
':'
50
100
RL. LOAD RESISTANCE (k ohms)
NOISE CHARACTERISTICS
FIGURE 7A - INFLUENCE OF SOURCE
RESISTANCE & BANDWIDTH
SOD
]
~ 400
w
'"
o~
~
RL
':' RS
300
RF
':'
w
z 200
I-
AV=IOO~*
low feD = 10 Hz ~
high leo = 100 kH
o 100
i
o
- - - --
100
200
~
.: 500
:;
w
'"~ 200
""
1000
500
2000
RS. SOURCE RESISTANCE (OHMS)
~
':' RS
RF
':'
V
~
~ 100
10 kHz
V
./
C
z
...rrr
!;
I!:
:::>
1.0 kHz
SO
~ 20
',OOt;
10
10
10.000
./
./
o
L-I5000
10 kHz
RL
o
>
",/
-I-
:::>
I!:
:::>
1000
I
V+=±13V
.,.,...
>
'"C
FIGURE 7B - INFLUENCE OF VOLTAGE GAIN
& BANDWIDTH
~
.,/
20
50
V
100
./
~O::'
. . 1Jf
100 Hz
Y+-±13V
RF
AV~ RS
RS= 1.0 kn
low feD '* 10 Hz
high leo = 100 kHz
200
AV. VOLTAGE GAIN (VN)
8-5
~
SOD
1000
~J
~___________S_T_E_R_E_O_D_E_M_O__D
__
U_LA_T_O__
R~
MC1304P
MC1305P
FM MULTIPLEX
STEREO DEMODULATORS
MONOLITHIC FM MULTIPLEX
STEREO DEMODULATORS
. derive the left and right audio information from the detected
composite signal. The MC1304P eliminates the need for an external
stereo·channel separation control. The MC1305P is similar to the.
MC1304P but permits the use of an external stereo·channel separa·
tion control for maximum separation.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
• Operation Practicable Over Wide Power·Supply Range, 8·14 Vdc
• Built-in Stereo-I ndicator Lamp Driver
• Total Audio Muting Capability
• Automatic Switching - Stereo-Monaural
• Monaural Squelch Capability
MAXIMUM RATINGS (TA = +250 C unless otherwise noted)
Rating
Unit
Value
Powe,SupplvVoltage (Pins 1,6,9,*11,12)
(Pin 7 is grounded)
+22
Vde
Lamp Driver Current
40
mAde
Power Dissipation (Package Limitation)
Plastic Package
625
mW
5.0
mW/oC
o to +75
°c
-65 to +150
°c
Derate above T A = 25°C
Operating Temperature Range (Ambient)
Storage Temperature Range
PLASTIC PACKAGE
CASE 646
·Pin 8 for MC1305P
CHANNEL SEPARATION versus FREQUENCY
0
0
- -
CHANNEL SEPARATION versus COMPOSITE INPUT LEVEL
0
I-""
V
......
0
INPUT C· 5.0pF
---
- :--
!·1.OkHz
0
Input Level -
--...
~
0
200 mVIRMS) Composite
Signal, L= 1, R =Oor
R·1,L·0
0
0
0
0
50
100
200
500
1,000
FREQUENCY 1Hz)
2,000
5,000
10,000
See Packaging Information Section for outline dimensions.
8-6
10
100
150
200
250
300
350
4D0
COMPOSITE INPUT LEVEL (mVIRMS))
450
500
MC1304P, MC1305P (continued)
ELECTRICAL CHARACTERISTICS IVcC = 12 Vdc, T A = +25 0 C unless otherwise noted. Test made with 751's deemphasis network (3.9 kn, 0.02 ",F) unless otherwise noted).
Min
Typ
Max
12
20
-
-
35
45
30
-
-
0.5
-
-
0.5
1.0
Ultrasonic Frequency Rejection (See Note 4)
(19kHz)
(38 kHz)
-
25
20
-
Inherent SCA Rejection Iwithout filter)
@60kHz,67kHzand74kHz
-
50
-
-
C harlcteristics
Unit
Input Impedance
(f
a
kSl
20 Hz)
Stereo Channel Separation (See Notes 1 and 2)
(f = 100 Hz)
(f = 1.0 kHz)
(f= 10kHz)
dB
dB
Channel Balance
IMonaural Input = 200 mV I RMSJ ) ,
(Mono ural, Left and Right Outputs)
Total Harmonic Distortion (See Notes 1 and 3)
%
(Modulation frequencv - 1.0 kHz)
dB
dB
Lamp Indicator IRA - 120n)
Minimum 19 kHz Input Level for lamp on
Maximum 19 kHz Input Level for lamp off
16
14
25
5.0
Audio Muting
Mute on (Voltage required at pin 5)
Mute off (Voltage required at pin 5)
0.6
1.3
-
-
1.0
2.0
55
-
-
-
-
2.0
1.0
-
150
180
300
Attentuation in Mute Mode (Note 5)
Stereo-Monaural Switching
Stereo (Voltage required at pin 4)
Monaural (Voltage required at pin 41
mVIRMS)
Vdc
Vdc
dB
Vdc
1.3
Power Dissipation (Vee - 10 VI
mW
IWithout lamp)
IWith lamp)
300
Note 1 - Measurement made with 200 mV( RMSI Standard Multiplex Composite Signal and L"" 1, R '" 0 or R = 1, L ... O. Standard Multi·
plex Composite signal is here defined as a signal containing left and/or right audio information with a 10% /19 kHz) pilot signal
in accordance with FCC regulations.
Note 2 - Stereo channel separation is adjustable for the MC1305P with a resistor from pin 9 to ground.
Note 3 - Distortion specification also applies to Monaural Signal.
Note 4 - Referenced to 1.0 kHz output signal with Standard Multiplex Composite Input Signal.
Note 5 - This is referenced to 1.0 kHz output signal with either Standard Multiplex Composite Signal or Monaural Input Signal.
FIGURE 1 - DISTORTION COMPONENTS IN AUDIO SIGNAL
~1.6
INPUT
z
o
f---
;::
SIGNAL~
4.0 ~
I
NOTE, BEAT FREOUENCY COMPONENTS IBFCI
RESULT FROM THE PRESENCE OF THE
19 kHz PILOT SIGNAL IN STEREO
BROAOCASTS.
100 mVIRMSI STANOARO COMPOSITE SIGNAL
~1.2
C
~
~
~
:=
BFC . /
L
"~ 0.8
-J
~
z
3.0
~
~
2.0 ~
~
THO, MONAURAL OR STEREO
o
1.0 ~
0.4
...V
o
100
100
300
400
t.Ok
FREQUENCY IHzl
500
FIGURE 2 - TOTAL HARMONIC DISTORTION
5
1=
0
STEREO OR MONAURA;"'"
5
V V
0
w
~
........
,.,.....- ~
~
........ r-
~
~
5.0 k
a
~
10k
V
0....
~
4.0k
t.~ kHz
ii!
~
3.0 k
FIGURE 3 - MULTIPLEX SENSITIVITY
;;0
•
2.0 k
./
~
m
LAMPOFF
-_
-
5.0f----f-----Ic-----I-,.:...,-.-;:!,--="'-1
0~0---~5~O---~10~O---t~5~O---~20~0---~2W
~
19 kHz GAIN ADJUSTMENT, OHMS (PIN 1 TO 19 kHz FILTERl
COMPOSITE INPUT lEVEllmVIRMSl1
8-7
MC1304P, MC1305P (continued)
FIGURE 4 - MC1304 CIRCUIT SCHEMATIC
<\I~:
INPUT
3
Bin
10k
38
kH, 13
TANK
10
11
LEFT CHANNEL
OUTPUT
"
RIGHT CHANNEL
OUTPUT 9
~20:'
80k
5,Ok
S.Ok
2.0k
"
'"
5.0k
.....
~
20k
500
14
DOUB LEA
DECOUP LING
I.Ok
B.Ok
>-
r-...
~
~
~
r<)=1<~
N
5.0k
B.Ok
("
,
FILTER
r-<
r-<
~
B.Ok
19 kH
1
Vcc
v
SIGNAL
2
tOk
-< "
COMPOSITE
19kHz fiLTER
2.0k
""
5.0k
I.Ok
2.0k
10k
....
:,-,.;:
.( -:::>'
6
LA MP
DAIV EA
500
1.0k
7
GN
=
STEREO SWITCH
4
5 AUDIO MUTE
)-
-(~
~l"~
-s=
500
1.0k
FIGURE 5 - MC1305 CIRCUIT SCHEMATIC
19 kHz FILTER
.:.::i.~o.~:·:: ..
2
1
"~:':'....~:::::.::
F{tt'
~
COMPOSITE
SIGNAL
INPUT
"
;,
V
r-<
B.Ok
(
~
500
12
RIGHT CHANNEL
OUTPUT
8
Vee
r-...
14
DOUBl EA
OECOUP LING
V
"
V
"'-
-
5.0k
a.Ok
2.0k
1.0k
LE:FT CHANNEL
OUTPUT
1
~
5.0k
5.0k
11
V
20k
,
S.Ok
TANK
--q K:9<~
~
120~
13
10r,kHZ
I.Ok
Kv
3
38
19kHz
FILTER
10k
1.0k
)...
I
':SE'PAA
10k
....
.~qJ!J~
B.Ok
5.0k
110k
.....
~
5.0k
""
1.Ok
(
~~J":,;
S
500
2.Ok
4
5 AUDIO MUTE
-(~
1.0k
STEREO SWITCH
..
~500
6
LAM P
DAIV ER
7
=
GN
Portions of the circuits shown within the dotted areas pertain to the MC1304P or MC1305P as indicated bV the titles of the circuits.
8-8
MC1304P, MC1305P (continued)
FIGURE 6 - MC1304P TYPICAL CIRCUIT CONFIGURATIONt
LT, l2' 333 turns, Ilu= 8.0mH
r---------~----~----------~==~--~--~----~--~----~~VCC
nommal.MiUer:I361orequiv
L3" 420 turns <=38 AWG, tap at 42
turns, Ou" 55, 8.0 mH nommal,
Miller:::1362 Grequiv
COMPOSITE
SIGNAL
INPUT
O.02/A F
__ ~,"_F-----l------~-1-'--------'---------'---'-------'-I~:.......L--------h:;::;_;;;;:!,
ein---rr
20 k
5
10k
L-'IV\.--o--L-.------r-------.J-O--=ST-:-:ER~EO::-:.I::-:NO~,CA'7TO~R-LA-M-P-~'11 V
l(max)<40mAdc
SYLVANIA TYPE 12£S OR EQUIV
2.0j.lF
tFor tvpical circuit operation, see Molorola Application NaleAN·432.
·SeeFigure3.
* 1.5 kn in series with pin 8
**2.7 kn in series with pin 8
FIGURE 7 - MC1305P TYPICAL CIRCUIT CONFIGURATION t
Ll.l2: 333turns.llu=8.0mH
nommal,Milier:01361orequiv
LJ.420turns=-3BAWG,tapaI42
IIlrns,Ou=55,B.OmHllommal,
O.02I'F
Mitler::1362orequiv
L,-__________,-____--r__-,r-J----:=-:::j~::-:-:=--~+12 v
tFortypical circuit operation. see MOlorolaApphcation Note AN· 432
'SeeFigure3
.oR sep :310.ohlllnolll
Adjusted for lllaXlmUm separation
Portions of the circuits shown within the dotted areas pertain to the MC1304P or MC1305P as indicated by the titles of the circuits.
8-9
1L________________
A_U_D_I_O_A_M
__P_LI_F_I_ER__~
Mel306P
1/2-WATT AUDIO AMPLIFIER
1/2-WATT AUDIO AMPLIFIER
The MC1306P is a monolithic complementary power amplifier and
preamplifier designed to deliver 1/2-Watt into a loudspeaker with a
3.0 mV(rms) typical input. Gain and bandwidth are externally
adjustable. Typical applications include portable AM·FM radios, tape
recorder, phonographs, and intercoms.
•
1/2·Watt Power Output (9.0 Vdc Supply, 8-0hm Load)
• High Overall Gain - 3.0 mV(rms) Sensitivity for 112-Watt Output
•
Low Zero·Signal Current Drain - 4.0 mAdc @ 9.0 V typ
•
Low Distortion - 0.5% at 250 mW typ
PLASTIC PACKAGE
CASE 626
TYPICAL APPLICATIONS
FIGURE 1 - AM-FM RADIO, AUDIO SECTION
9.0 V
1.0 k
r--~5
51
1.0 k
+'I~
V+
+----
8
4
1.0 Meg n
FIGURE 2 - PHONOGRAPH AMPLIFIER
(CERAMIC CARTRIDGE)
8.0n
•
15 pF
200"F
10
0 k --)11----0
k
-------1
O.l"F
6
100pF
Tone ContraiL
1.0 Megn
XTA~1.0Megn
0.05"F
=
8.0n
3- +
-')If-'w>:-::-::---:""'-o---j
0.002"F 1.0 Meg n
Volume
Control
Volume
-=- Control
CIRCUIT SCHEMATIC
Preamplifier
1.4k
Power Amplifier
Output
3
GNO
Preamplifier
Outllul
Power Amplifier
Input
See Packaging Information Section for outline dimensions.
8-10
MC1306P (continued)
MAXIMUM RATINGS (TA ; +25 0 C unless otherwise noted)
Unit
Symbol
Value
Power Supply Voltage
V+
12
Vdc
Load Current
IL
400
mAdc
Power Dissipation (Package !.imitation)
TA; +250 C
Po
R.ting
Derate above T A ; +25 0 C
625
mW
5.0
mW/oC
TA
o to +75
T stg
-65 to +150
°c
°c
1/9JA
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (V+; 9.0 V, RL; 8.0 ohms, f; 1.0 kHz, (using test circuit of Figure 3), TA; +25 0 C
unless otherwise noted.)
Characteristic
Symbol
Open Loop Voltage Gain
Pre·amplifier RL; 1.0 k ohm
AVOL
Typ
Max
-
270
Unit
VIV
-
360
-
5
-
3.0
-
mV(rms)
Power-amplifier RL; 16 ohms
Sensitivity
Min
(Po; 500mW)
Output Impedance (Power-amplifier)
Zo
-
0.5
SIN
-
55
-
Ohm
Signal to Noise Ratio
(Po; 150 mW, f; 300 Hz to 10 kHz)
Total Harmonic Distortion
(Po; 250mW)
THO
-
0.5
-
%
Quiescent Output Voltage
Vo
-
V+/2
Output Power
(THO :<;;10%)
Po
-
mW
Current Drain (zaro signal)
10
Power Dissipation (zero signal)
Po
500
dB
Vdc
570
-
FIGURE 3 - TEST CIRCUIT
4.0
-
rnA
36
-
mW
FIGURE 4 - ZERO SIGNAL BIAS CURRENT
10
1.0k
TA.Lsoc
18.0
>-
---
i'li
~ 6.0
13
~
~ 4.0
'"~
f 2.0
9
o
4.0
--
f-- f--
s.O
6.0
f-- ~
7.0
8.0
9.0
10
V+. POWER SUPPLY VOLTAGE (Vdcl
8-11
~
11
12
MC1306P (continued)
TYPICAL CHARACTERISTICS
=9.0 v, f = 1.0 kHz, TA =+250 C unless otherwise noted)
(v+
FIGURE 5 - EFFICIENCY
FIGURE 6 - OUTPUT POWER
1. 0
60
THOI= 1%
50
~
>'-'
ili
V
/
40
U
~.,
30
20
V
10
3.0
4.0
T~~ :~O~::b.
RL = 8!0 ohm,l
V
./
I,?V
,,/
I
_ O. 8
W
i o.
~
RL = 8 n
THO = 1% ... t-.,
...
Rl=16n.
THO = 1%
~ 0.4
o
7.0
8.0
9.0
10
11
12
3.0
13
~
./ [Y V
/ / t:./: V
.,...
/% ~
~ e:::::-
0.2
6.0
i;J(
L
/ ./ X V
:::>
,t
o
5.0
'2 :--::" V
I
~
L
~ r:::::...-
Rl = 16 n
THO = 10%
6
--
L
tL
4.0
5.0
6.0
7.0
8.0
9.0
10
11
12
13
V+. POWER SUPPLY VOLTAGE IVdc)
V+. POWER SUPPl Y VOLTAGE (Vdc)
FIGURE 7 - TOTAL HARMONIC DISTORTION
4.0
\
~
z
0
;:: 3.2
\
P: = lob
0
t;
'-'
I\.
Z
.
........
Cl = 200"F
\
i5 2.4
m~
Rl::;: 8.0 Ohms
1\
'"
0
::E
'":r
"'" "
1.6
-'
0
o·
t-----..
0.8
...
:I:
0.1
0.2
0.3
0.4
l0-
t-- t-0.7
0.5
1.0
3.0
2.0
4.0
5.0
6.0
7.0 8.0 9.010
f. FREQUENCY IkHzl
FIGURE 8 - EFFECT OF BATTERY AGING
ON LOW·LEVEL DISTORTION
4.0
l
~
Rl = 8 n
Cl=50"F
z
0
;:: 3.0
'"
/
0
t;
i5
/
'-'
Z
0
2.0
::E
-'
0
/"
./
'"
..;;......
1.0
.........:: / - -
/
I
---:::-
I
FIGURE 9 - DISTORTION
10
I
~ 9.0
z
8.0
Jof=lkHz'=10ml
1
0
~
0
'1
t;;
7.0
i5 6.0
Rl': 16 n
Simulated Battery
Cl = 50"F _
Rl=8n'
+~+
CI =300"F
+
CI
Rl:'6h
Cl - 300(F
'-'
V+ = 9.0 V
Rl = 8.0 Ohms
Z 5.0
..'"
........
0
::E
4.0
:I:
I-=
-'
0
c'
3.0
1
IL
2.0
c'
...
:I:
o
9.0
8.0
7.0
6.0
5.0
I I I
4.0
3.0
2.0
...
:I:
1.0
o
1.0
0.01
v+. SUPPLY VOLTAGE IVdc)
0.02
0.03
0.05
0.1
0.2
po. POWE R 0 UTPUT IWATIS)
8-12
0.3
0.5
1.0
MC1306P (continued)
FIGURE 10 - TYPICAL CI RCUIT CONNECTION
C2
,,
,,,
c, :*:
,,,
CI
Cp
1
'l
",
:
", ,
-l1-'W',......I---""':>---1
Preamplifier
Input
MC13DS
DESIGN CONSIDERATIONS
3. Frequency Response
The MCI306P provides the designer with a means to control
preamplifier goin, power amplifier goin, input impedance, and
The low frequency response is controlled bV the cumulative
effect of the series coupling capacitors Cl, C2, and C3. High·
frequency response can be determined bV the faedback capacitor,
ct, and the -3.0 dB point occurs when
frequency response. The following relationships will serve as guides.
1. Gain
The Preamplifier Stage Voltage Gain is:
XCf
Rf
AVA""R;
and is limited onlv bV the open·loop goin (270 V IV). For good
preamplifier de stabilitv Rf should be no larger than l.o-megohm.
The Power Amplifier Voltago Gain is controlled in a similar
manner where:
10 k
AVB""~
The 1O·k ohm faedback resistor is provided in the integrated
4. Batterv Operation
circuit.
The increase of battery resistance with age has two undesirable
effects on circuit performance. One effect is the increaSing of
amplifier distortion at low Signal levels. This is readilv corrected bV
increasing the size of the filter capacitor placed across the battery
(as shown in Figure B; a 300-IlF filter capacitor gives distortions
at low·tonal levels that are comparable to the "stiff" suppIV). The
second effect of supplV impedance is a lowering of power output
capability for steady signals. This condition is not correctable, but
Recommended values of Rp range from 500-ohms to 3.3·k
ohms. The low end is limited primarily by
low~leval
= Rf
Additional high frequency roll·off and noise reduction can be
achieved by placing a capacitor from the center point of Rp to
ground as shown in Figure 10.
capacitor C4 and the RC network shown in dotted lines mav
be naeded to prevent high frequency parasitic oscillations. The R F
choke, shown in series with the output, and capacitor C6 are used
to prevent the high·frequency components in a large-signal cl ippad
audio output waveform from radiating into the RF or IF sections
of a radio (Figure 10).
distortion and
the upper end is limited due to the voltage drive capabilities of the
pre-amplifier. (A resistor can be added in the de feedback loop,
from pin 6 to ground, to increase this drive); The Overall Voltage
Gajn. then, is:
is of questionable importance for music and voice Signals.
2. I nput Impedance
The Preamplifier I nput I mpedence is:
5. Application Examples: (1) The audio section of the AM·FM
radio (Figure 1) is adjusted for a preamplifier gain of 100 with an
input impedance of lO-k ohms. The power amplifier gain is set at
la, which gives an overall voltage gain of 1000. The bandwidth
has been set at 10·kHz. (2). The phono amplifier (Figure 2) is designed for a preamplifier goin of unity and a power amplifier goin
of 10. The input impedance is l.o-megohm. An adjustable treble
control is provided within the feedback loop.
and the Power Amplifier Input Impedance is:
8-13
MC1306P (continued)
TYPICAL PRINTED CIRCUIT BOARD LAYOUT
LOCATION OF COMPONENTS
Rl
CZ
C3
RZ
C5
See Figure 3 for schematic diagram.
PARTS LIST
Component
Value
Cl
C2
C3
C4
C5
Rl
R2
R3
R4
MCI306
PC Board
200l'F
O.II'F
0.051'F
1.0l'F
47 pF
lohm
1 k ohm
4.7 k ohms
270 k ohms
-
8-14
R3
~~__________S_T_E_R_E_O_D_E_M_O__D_U_L_A_TO__R~
MC1307P
FM MULTIPLEX
STEREO DEMODULATOR
MONOLITHIC FM MULTIPLEX
STEREO DEMODULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. designed to derive the left and right channel audio information
from the detected composite signal.
•
Capable of Operation Over a Wide Power Supply Range 8.0 - 14 Vdc
•
Built·in Stereo·lndicator Lamp Driver
I~::::]
(top view)
PLASTIC PACKAGE
CASE 646
FIGURE 1 - TYPICAL CIRCUIT CONFIGURATION
Ll , L2
~3i ~~~~~I~ AL,
u '" 55,
II
MILLER NO.1 361
OR EDUIV
.38AWG,
L3 *~Op~~R4~\~ORNS,
Du·55,8.0m H
NOMINAL,MI LLER
NO. 1362 OR EDUIV
.F
,
I
Vec
0.0022 "F
Lin
19 kHz
3~:HZ
+O.OI"F
~
RA'
I
-
f
3.9 k
3.9 k
0.02.F
;;
0.02.F
""'-L3
9
1
10
13
3
11
LEFT CHA NNEL
OUTPUT
12
RIGHT CH ANNEL
OUTPUT
MC1307P
@
6
+12 v
STEREO INDICATOR LAMP
2
14
I(max) < 40 mA
(Sylvania 12ESB or equiv.)
7
0.05.F
L2
n
'SEE FIGURE 3
r-->-19kHz
+
O.D1.F
4.7 k
;;~ 2.0.F
Pins not shown are not connected.
TYPICAL DC VOLTAGES
Pin Numbers
1
Vee = 8.5 Vdc
Vec • 12 Vdc
8.5
12
(All measured using a VTVM with respect to Pin 7 (lamp on), RA
I
I
I
2
2.7
2.9
I
I
3
3.6
I 3.9
I 4 I 5 I
I - I - I
I - I - I
6
0.8
0.9
See Packaging Information Section for outline dimensions.
8-15
7
0
0
8
-
9
8.5
12
= 180 ohms, see Figure 3)
10
11
4.4
4.7
6.2
9,7
12
6.2
9.7
13
4.4
4.7
14
1,5
1.7
MC1307P (continued)
FIGURE 2 - CIRCUIT SCHEMATIC
1st
2nd
19 kHz 19 kHz
FILTER FILTER
38 kHz
HIGH
VCC
10
9
2
38 kHz
LOW
1
13
LEFT CHANNEL
OUTPUT
11
RIGHT CHANNEL
OUTPUT
12
1k
1.3 k
COMPOSITE
SIGNAL
INPUT
5k
5k
6k
1k
6k
6k
lk
1k
1k
330
GND
LAMP
MAXIMUM RATINGS (T A
=
+25 0 C unless otherwise noted.)
Rating
Power Supply Voltage (Pins 1,6,
9,11,12)
(Pin 7 is grounded)
Lamp Driver Current
Power Dissipation (Package
Limitation)
Derate above T A
= +250 C
Operating Temperature Range (Ambient)
Value
Unit
+22
Vde
40
mAde
625
mW
5.0
mW/oC
o to +75
Uc
°c
-65 to +150
Storage Temperature Range
R-1f;
MC1307P (continued)
ELECTRICAL CHARACTERISTICS IVee = 12 Vdc, T A = +25 0 e, tests made with a 75 /ls de-emphasis network
139 krl 002 /lFI unless otherwise noted I
Characteristic
Min
Typ
Max
Unit
12
20
-
krl
-
-
-
35
40
30
Total Harmonic Distortion (See Notes 1 and 2)
(Modulation Frequency = 1.0 kHz)
-
0.5
1.0
%
Channel Balance
(Monaural Input = 200 mV [rm.l)
(Monaural, Left and Right Outputs)
-
0.5
-
dB
-
-
-
25
20
-
-
50
-
-
16
14
25
140
170
300
Input Impedance
(f = 1.0 kHz)
Stereo Channel Separation (See Note 1)
(f = 100 Hz)
(f = 1.0 kHz)
(f = 10 kHz)
dB
20
Ultrasonic Frequency Rejection (See Note 3)
(19 kHz)
(3B kHz)
-
dB
Inherent SCA Rejection (without filter)
(f = 60 kHz, 67 kHz and 74 kHz) (See Note 3)
Lamp Indicator (RA = 180 n)
(Minimum 19 kHz input levelIor lamp "on")
(Maximum 19 kHz input level for lamp "off")
dB
mV(rms)
5.0
-
Power Dissipation (Vee = 12 VI
mW
-
(Without lamp)
(With lamp)
-
300
Note 1 -
Measurement made with 200 mV(rms) Standard Multiplex Composite Signal where L = 1, R = 0 or R = '. L"" O.
Standard Multiplex Composite Signal is here defined as a signal containing left and/or right audio information with a 10%
Note 2 -
Distortion specification also applies to Monaural Signal.
Note 3 -
Referenced to 1.0 kHz output signal with Standard Multiplex Composite Input Signal.
(19 kHz) pilot signal in accordance with FCC regulations.
TYPICAL CHARACTERISTICS
FIGURE 3 - DISTORTION COMPONENTS IN AUDIO SIGNAL
1.6
~
z
o
~ 1.2
o
I---
4.0 ~
INPUT SIGNAL:
I
I
I
200 mV (rm.) STANOARO COMPOSITE SIGNAL
NOTE: BEAT FREQUENCY COMPONENTS (BFC)
RESULT FROM THE PRESENCE OF THE
19 kHz PILOT SIGNAL IN STEREO
BROADCASTS.
In
5
~
z
BFCL
8
/
0.8
o
~
=>
d
....
~
0
100
2.0~
/
THO, MONAURAL OR STEREO
~
~ 0.4
o
>--
'">--2:
3.0 ~
~
200
300
400
500
1.0 k
FREQUENCY (Hz)
8-17
2.0 k
... '" ......."
3.0 k
4.0 k
r5.0 k
1.0 ~
o
10 k
~
MC1307P (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 4 - TOTAL HARMONIC DISTORTION
FIGURE 5 - MULTIPLEX SENSITIVITY
4.0
100
90
~
z
o
~
In
f
3.0
:;
.s....
o
Ci
~
o
a:
2. 0
~
1. 0
..,,/
Vee = 12 Vdc
'"
/
w
~
0-
o
\
60
\
VCC = 12 Vdc
:::>
30
0-
\
50
40
;!:
STE~ ~
1\
70
::a::
.
./'
<[
:I:
80
\
I'..
20
LAMP "ON"
0-
10 I--- LAMP "OFF"
_I"'"
o
200
300
700
400
500
600
800
COMPOSITE INPUT LEVEL (mV(rmsl)
900
rT
o
1000
100
150
250
200
RA. 19 kHz GAIN ADJUSTMENT (OHMS)
FIGURE 7 - CHANNEL SEPARATION
FIGURE 6 - CHANNEL SEPARATION
0
70
0
z
o
~
0
a:
~....
w
Co>
"..-
'"
~
~
~
....
w
."
COMPOSITE INPUT = 300 mV(rms)
IVCf =Il~
0
0.1
5
III
0.5
1.0
FREQUENCY (kHz)
50
Z
~dl
III
10
60
0
0
z
z
<[
:z:
..
-
-I-
5.0
40
/"'"
30
200
10
8-18
--
300
FREQUENCY =1.0 kHz
VCC = 12 Vdc
400
500
600
700
COMPOSITE INPUT (mV(rmsl)
800
900
1000
MC1310P ~~________S_T_E_R_E_O__D_E_M_O_D_U_L_A_T_O_R____~
Specifications and Applications
InforIllation
FM STEREO
DEMODULATOR
FM STEREO DEMODULATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
. a monolith ic device designed for use in solid·state stereo receivers.
•
Requires no Inductors
•
Low External Part Count
•
Only Oscillator Frequency Adjustment Necessary
•
Integral Stereo/Monaural Switch 75 mA Lamp Driving Capability
•
Wide Dynamic Range: 0.5-2.8 V(p·p) Composite
I nput Signal
•
Wide Supply Range: 8-14 Vdc
•
Excellent Channel Separation Maintained Over Entire Audio
Frequency Range
•
Low Distortion: Typically 0.3% THD at 560 mV (RMS)
Composite Input Signal
•
Excellent SCA Rejection
CASE 646
FIGURE 1 - TYPICAL APPLICATION AND TEST CIRCUIT
19 kHz
R4
Pin
Pin
Pin
Pin
Pin
Pin
Pin
1
2
3
4
5
6
7
= Vee
Pin
Pin
== Input
== Amplifier Output
""
==
=
==
Left Channel Output
Right Channel Output
Lamp Indicator
Ground
Pin
Pin
Pin
Pin
Pin
c;t
R5!
Pin Functions
Output
C8
r--1ER31~
8 == Switch Filter
9 == Switch Filter
~;
10 = 19 kHz Output
11 == Modulator Input
12 = Loop Filter
13 = Loop Filter
14 "" Oscillator RC Network
14
13
9
12
11
10
MC1310
Parts List
Cl
C2
C3
C4
C5
= 2.0jlF
= 0.02 jlF
= 0.02 jlF
= 0.25 jlF
= 0.05 jlF
C6
= 0.5 "F
C7
= 470pF
C8 = 0.25 jlF
Rl = 3.9 kO
R2 = 3.9 kO
R3 = 1.0 kO
R4 = 16 kO
R5 = 5.0 kO
Cl
Input~
+
1
y2
3
4
,....----. >Rl
C2*
5
r-< ~
R2
C3
VCC
See Packaging Information Section for outline dimensions.
8-19
Left
Right
Channel
Output
Channel
Output
~~.
9
8
•
r
7
-=
MC131 OP (continued)
MAXIMUM RATINGS ITA
=
+25° unless otherwise noted.1
Rating
Value
Unit
14
Volts
Power Supply Voltage
75
mA
625
mW
Lamp Current
Power Dissipation
(Package limitationl
Derate above T A = +25 0 C
5.0
mW/oC
Operating Temperature Range (Ambient)
-40 to +85
°c
Storage Temperature Range
-65 to +150
°c
ELECTRICAL CHARACTERISTICS Unless otherwise noted; VCC = +12 Vdc, TA = +250 C, 560 mVIRMSI 12.8 Vip-pi I standard
multiplex composite signal with Lor R channel only modulated at 1.0 kHz and with 100 mV(RMSl pilot level (10%), using circuit of Figurel.
Min
Characteristic
Typ
Max
Unit
-
-
Vlp-p)
2.8
50
-
VIp-pI
20
Stereo Channel Separation
30
40
-
dB
Audio Output Voltage Idesired channell
-
485
-
mV(RMS)
dB
Maximum Standard Composite Input Signal 10.5% THO)
2.8
Maximum Monaural Input Signal 11.0% THO)
Input Impedance
kn
-
1,5
0.3
-
%
-
dB
-
34.4
45
-
75
-
5.0
-
-
20
-
Capture Range (permissible tuning error of internal oscillator,
reference circuit values of Figure 1)
-
±3_5
-
%
Current Drain (lamp "off")
-
13
-
mAde
Monaural Channel Balance (pilot tone "off")
Total Harmonic Distortion
Ultrasonic Frequency Rejection
19 kHz
38 kHz
dB
Inherent SC A Rejection
If = 67 kHz; 9.0 kHz beat note measured
with 1.0 kHz modulation "off")
mV(RMS)
Stereo Switch Level
19 kHz input level for lamp "on"
19 kHz input level for lamp "off"
8-20
s
......
C')
FIGURE 2 - CIRCUIT SCHEMATIC
W
o
Input
2
~~ll0
8k~
5.
2k
Ampl
Output 93
Modulator
Input
11
."
Loop
Filter
n-O
Osc RC
Ntwk
14
13 YV 12
::l
!:t.
r
4 k
4 k
12 k
12 k
k
::l
C
CD
a.
2.3 k
~o
(Xl
r:.,
RT9l
+-t~
~
15 k
1.5 k
15 k
19 k
595
96 68
4
Left Chan net
Output
Right Channel
Output
'---..r-'
Switch
Filter
~
5 k
5 k
6
Lamp
Indicator
1 k
10
19 kHz
Output
I I ~o
MC1310P (continued)
TYPICAL CHARACTERISTICS
Unless otherwise noted: VCC: +12 Vdc. TA : +2So C; 560 mVIRMSI 12.8 V[p_p] I standard multiplex
composite signal with Lor R channel only modulated at 1.0 kHz and with 100 mVIRMSI
pilot level 110%1. using circuit of Figure 1.
FIGURE 3 - CHANNEL SEPARATION versus
COMPOSITE INPUT LEVEL
FIGURE 4 - CHANNEL SEPARATION versus FREQUENCY
50
60
f
<
~ 50
iii 40
:!!
z
o
VCO TUNEO
~ 40
--t_~ ~-
c:
~u:l
30
z
z
«
x
-
2.8 V(p.p)
'\
z
\
0
I
;;!i
t-
~2%DETUNED
~
V
1% DETUNED
z
~
w
~~=
20
z
5'"
'-' 20
1.0
<
r-
;:: 30
V
10
0.5
II IIII
Vin
I kHz
1.5
2.0
COMPOSITE INPUT LEVEL (Vip_pi I
2.5
10
0
50
3.0
FIGURE S - CHANNEL SEPARATION versus
VCO FREE-RUNNING FREQUENCY
PIN
13
100
500
200
1 k 05 F
. •
FILTER NETWORK
1.0 k 2.0 k
5.0 k
FREQUENCY (Hz)
f'" 1 kHz
'"
f = 1 kHz
50
Vin < 2.8 VIP-pi
~
z
o
~ 40
..,1--:/
c:
w
..
0
-
z
0
;:: 40
Vin < 2.8 V(p·pl
'"c:
~
Vin
<
1.5
~
V(P~-\-- r----
z
5'"
'-' 20
0
18.6
19
19.4
VCO FREE-RUNNING FREQUENCY (kHzI
V
w 30
z
z
«
x
18.2
20
10
19.8
FIGURE 7 - THO versus COMPOSITE INPUT LEVEL"
2.8
I
2.4
<
1 kHz
2.0
~
§ 1.6
;::
0.3
o
I II 11111
O.25.F
~I~
1k
05.F
~I:
.1.
FILTER NETWORK
c:
x
O. 1
0
0.5
-1.0
,.-
.....- V
....V
1.5
2_0
COMPOSITE INPUT LEVEL (Vip_pi I
I
~ 1.2
C
/
0.2
0.8
Vin
0.4
2.5
14
I
~~
0.4
I-
10
12
SUPPLY VOLTAGE (Vdc)
8.0
FIGURE 8 - DISTORTION versus FREQUENCY'
0.5
f
r---
~
Z
~
50 k
60
~ 50
~
20 k
FIGURE 6 - CHANNEL SEPARATION versus
SUPPLY VOLTAGE
60
~
10k
PI~
12
--
0
50
3.0
"Measured with Low Pass Filter (BW : 15 kHz).
8-22
100
-- 200
<
LL
2.8 V(P·P)l L
I
.1
500
1.0k 2.0k
5.0k
FREQUENCY (Hz)
"
Vin - 1.5 V(p-pl
10k
20k
50k
MC1310P (cootinued)
TYPICAL CHARACTERISTICS (continued.
FIGURE 10 - VCO FREE-RUNNING FREQUENCY
versus TEMPERATURE
FIGURE 9 - DISTORTION v ....... FREQUENCY'
2.8
2.4
2.0
~
z
c 1.6
I
t--
1111111
,,
100 0.25.F
~P~~NI2
r-
0.8
Vin = 2.8 V(p-pl
0.4
1-1'.
0
50
~z
200
500
-
1.0k 2.0k
5.0k
FREQUENCY (Hz)
10k
:::>
~ 18.8
w
~
20k
50k
-55
.,
LAMP "OFF"
....
z
c
.....
w
./
13
~
./
ijl12.5
12
:;; 60
E
./
~
~
80
i'l!
z
./
8.0
;
....
9
./
-15
+85
+5.0
+25
+45
TEMPERATURE (OCI
+85
40
,
~ '--C7 = 560 pF, RT~ 15 kn
\
~
\
\
: cr
~--!.
-\
,
-'- 470(,
.I RTI~1 19 ki1
RT' R4+ R5
'\
T
i
j
+105
I
I
1,
7 7
17 7
I II /
.'J I
,y v-
-C7 = 330 pF, RT ~ 26 kn
\
........
18
14
I
I
II
20
./
'Measured with Low Pass Filter (BW
-35
ii:
10
12
SUPPLY VOLTAGE (Vdcl
.......
FIGURE 12 - PILOT LEVEL REQUIRED FOR VCO LOCKUP
versus VCO FREE-RUNNING FREQUENCY
100
~ 13.5
.............
§;! 18.6
14.5
a:
............
c
FIGURE 11- CURRENT DRAIN versus SUPPLY VOLTAGE
114
""
19
z
_1"'l-1' Vin = 1.5 V(p.pl_
111"1-111
100
19.2
;;;
\ I
Ci
VCO NONCOMPENSATEO
..........
ffi
"
1.2
....
~
t
ffi
FILTER NETWORK
:;::
.,c....
-;;; 19.4
-
18.5
19
19.5
VCO FREE-RUNNING FREQUENCY (kHzI
20
= 15 kHz'
FIGURE 13 - SYSTEM BLOCK DIAGRAM
Input
19 kHz
Quadrature
19 kHz
. . = External to Decoder
Outputs
8-23
I
MC1310P (continued)
CIRCUIT OPERATION
the regenerated 38-kHz signal. The regenerated 38-kHz
Signal is fed to the stereo decoder via an internal switch,
which closes when a sufficiently large 19 kHz pilot tone
is received.
The 19-kHz signal returned to the 38-kHz regeneration
loop modulator is in quadrature with the 19-kHz pilot
tone when the loop is locked. With the third divider
state appropriately connected, a 19-kHz signal in phase
with the pilot tone is generated. This is multiplied with
the incoming signal in the stereo switch modulator
yielding a dc component proportional to the pilot tone
amplitude. This component after filtering is applied to
the trigger circuit which activates both the stereo switch
and an indicator lamp.
Figure 13, on the previous page, shows the system
block diagram. The upper line, comprising the 38-kHz
regeneration loop operates as follows: the 'internal oscillator running at 76-kHz and feeding through two
divider stages returns a 19-kHz signal to the input modulator. There the returned signal is multi pi ied with the
incoming signal so that when a 19-kHz pilot tone is
received a dc component is produced. The dc component
is extracted by the low pass filter and used to control
the frequency of the internal oscillator which consequently becomes phase-locked to the pilot tone_ With
the oscillator phase-locked to tre pilot the 38-kHz output from the first divider is in the correct phase for decoding a stereo signal. The decoder is essentially another
modulator in which the incoming signal is multiplied by
APPLICATIONS INFORMATION
(Component numbers refer to Figure 1)
External Component Functions and Values
Cl
Input coupling capacitor; 2.0 /.IF is
recommended but a lower value is
permissi ble if reduced separation at low
frequencies is acceptable.
Rl, R2, C2, C3
See Maximum Load Resistance section.
C4
Filter capacitor for stereo switch level
detector; time constant is C4 x 53
kilohms ±30%, maximum dc voltage
appearing across C4 is 0.25 V (pin 8
positive) at 100 mV(RMS) pilot level.
The signal voltage across C4 is negligible.
C5
See Phase Compensation section.
R3, C6. C8
Phase-locked loop filter components;
the following network is recommended:
These values give ±3.5% typical capture
range. Capture range may be increased
by reducing C7 and increasing R4, R5
proportionally but at the cost of increasing beat-note distortion (due to
oscillator-phase jitter) at high-signal
levels. See Figure 12.
Stereo Lamp
Nominal rating up to 75 mA at 12 V;
the circuit includes surge limiting which
restricts cold-lamp current to approximately 250 mAo
19-kHz Output
A buffer output providing a 3.0-Vpk
square wave at 19 kHz is available at
pin 10. A frequency counter may be
connected to this point to measure the
oscillator free-running frequency for
alignment. See Alignment section.
External Monaural/Stereo Switching
If it is desired to maintain the circuit in monaural
mode, the following procedure must be followed. First,
the stereo switch must be disabled to prevent false lamp
triggering. This can be accomplished by connecting pin 8
negative or pin 9 positive by 0.3 volt. Pin 8 may be
grounded directly if desired. Note that the voltage across
C4 increases to approximately 2 volts with pin 9 positive
when pin 8 is grounded.
Second, the 76-kHz oscillator must be killed to
prevent interference when on AM_ This can be accomplished by connecting pin 14 to ground via a current
limiting resistor (3.3 kilohms is recommended).
CB
0.25 "F
When less performance is required a
simpler network consisting of R3 = 100
ohms and C6 = 0.25/.1F may be used
(omit C8). See Figure 9.
R4, R5, C7
Oscillator timing
mended values:
C7=470pF
R4 = 16 H2
R5=5kn
network;
recom-
Phase Compensation/IF Roll-off Compensation
Phase-shifts in the circuit cause the regenerated 38kHz sub-carrier to lead the original 38 kHz by approximately 20. The coupling capacitor C5 generates an
1%
1%
Preset
8-24
MC1310P (continued)
APPLICATIONS INFORMATION (continued)
additional lead of 3.50 (for C5 = 0.05I1F) giving a total
lead of 5.50.
The circuit is so designed that phase lag may be
generated by adding a capacitor from pin 3 to ground.
The source resistance at this point is 500 ohms. A
capacitance of 820 pF compensates the 5.50 phase lead:
increase above this value causes the regenerated subcarrier to lag the original. However, a 5.5 0 phase error
if left noncompensated will not degrade separation
appreciably.
Note that these phase shifts occur within the phaselocked loop and affect only the regenerated 38-kHz
sub·carrier: the circuit causes no significant phase or
amplitude variation in the actual stereo signal prior to
decoding.
Most I F amplifiers have a frequency response that
limits separation to a value significantly lower than the
capability of the MC1310. For example, if the response
produces a 1-dB roll-off at 38 kHz, the separation will be
limited to about 32 dB. This error can be compensated
by using an RC lead network as shown in Figure 14.
The exact values will be determined by the I F amplifier
design. However, the values shown in Figure 14 are
suitable for use with the MC1357 and MC1375 IF
ampl ifiers.
FIGURE 15 - PILOT SENSITIVITY versus
POTENTIOMETER ROTATION
70
+-
100 k'
PIN 9
60
6.2 k
R
10 k
~ 40
PIN 8 v
w
r-
:3
f--
/
'1% RESISTORS
~ 30
ii:
~-- V
CCW
100 k'
,/
20
V
10
V
Y
,
-
.,,;'
V
~LAMP"ON~
V
V
~-;?
/"
./
LAMP "OFF"
./
,/
1-
/"
/"
,/
./"'-
o
FULLCW
CENTER
R (POTENTIOMETER ROTATION)
FULLCCW
Alignment Procedure
The optimum alignment procedure, with no input
signal applied, is to adjust R5 until 19.00 kHz is read at
pin lOon the frequency counter.
Another procedure requiring no equipment, other
than the receiver itself, will result in separation of
within a few dB of optimum. This latter method is
merely to tune the receiver to a stereo broadcast and
adjust R5 until the pilot lamp turns "on". To find the
center of the lock-in range, rotate the potentiometer
back and forth until the center of the lamp "on" range
is found. This completes the alignment.
FIGURE 14 - IF COMPENSATION NETWORK
Alternate Timing Network
The alternate timing network shown, incorporating a
trimmer capacitor rather than a potentiometer, may be
used if desired. Again, to provide correct temperature
compensation, the temperature coefficient of the timing
network must be approximately -300 PPM.
0.005 IlF
FIGURE 16
Voltage Control Oscillator Compensation
Pin 14
Figure 10 illustrates noncompensated Oscillator Drift
versus temperature. The recommended TC of the R4, R5,
C7 combination is -300 PPM. This will hold the
oscillator drift to approximately ±1% over a temperature
range of -40 to +850 C. Allowing ±2% for aging of the
timing components acceptable performance is still ob·
tained.
Lamp Sensitivity
It may be desirable in some cases, to change the lamp
sensitivity due to differing signal levels produced by
various FM detectors. The lamp sensitivity can be
changed by making use of the external circuit shown.
Typical sensitivities versus potentiometer rotation are
also shown in Figure 15.
Maximum Load Resistance
The curve shown gives absolute maximum load resistance values versus supply voltage used for full-signal
handling capability. With desired load resistance choose
C2, C3 capacitors to provide standard 7511s de-emphasis.
8-25
MC1310P (continued)
APPLICATIONS INFORMATION
FIGURE 17 - MAXIMUM LOAO RESISTANCE
versus SUPPLY VOLTAGE
Capture Range versus Timing Components
The capture range can be changed to some extent by
use of different timing components. Typical values are
shown in Figure 12.
1
a
:
w
u
9. 0
~ 7.0
[ii
g
,.
,.
~
,.
5.0
:::>
3. 0
Due to confusion concerning the measurement of the
stereo composite signal, a curve showing both RMS and
p-p composite levels versus pilot level follows, see
Figure 18.
.,,/
.,/"
a:
'"
1
500
5.0
RMS
8% PILOT
a:
Audio Output
The ratio G
iii
1000
p-p audio output (one-channen
- - - - - - - - - - - : - - - - for
pop input signal
~ 200
Lo
.
RMS
10%PILOT~
0
0.45
0.5
These figures are for 3.9-kilohm load resistors and for
low-audio frequencies where de-emphasis roll-off is
insignificant.
_0 0
0.707 RB
FLF
I
I
0.707 LB
-0.707
Y
Ii
Ij> _90 0
Ij> _90 0
LB'
,/
=
LB + j0.707 LF -0.707 RF
I
LF
0.707 R F i L B
0.707 LF
....,
I
I
0.707
+0.707
0.707 RF
Y
Ij> _0 0
I
RF'
I
= RF -0.707
LB + jO.707 RB
= RT
0.707 LB
LT
=
LF + 0.707 RB - j 0.707 LB
RT
=
RF -0.707 LB + j 0.707 RB
LT and AT are composite signals from
sa encoded
records or
The decoding process is shown schematically in Figure 4. The
MC1312P/MC1313P circuits that perform this function consists of
two preamplifiers which are fed with left total, LT. and right total,
RT. signals. The preamplifiers each feed two all-pass* networks
that are used to generate two LT signals in quadrature and two
RT signals in quadrature. The four signals are matrixed to yield
left-front, left-back, right-front, and right-back signals (LF', LB',
RF', RB'I.
The all-pass networks are of the Wein bridge form with the
resistive arms realized in the integrated circuit and the RC arms
formed by 8)(ternal components. The values shown in Figure 1
are for a l00-Hz to 100kHz bandwidth and a phase ripple of ±8.5°
on a 90" phase difference_
It is generally desirable to enhance center-front to center-back
separation. This is accomplished by connecting a resistor between
pins 2 and 11 (front outputs) and 3 resistor between pins 3 and
14 (back outputsl. For a 10% front channel blending t and a 40%
back channel blending t , 47 kilohms between pins 2 and 11 and
sa broadcast.
7.5 kilohms between pins 3 and 14 is required and results in the
following equations:
tRF" = 0.912 LT + 0_088 RT
LF" =0.912 RT + 0_088 LT
RB"
='4
[0.714 (JRT - LTI + 0.286 (RT - JLTI)
.J2
LB" ="2 [0.714 (JLT - RTI + 0.286 (LT - JRTlj
To meet the EIA matrix standards with 10/40 blend use
the circuit of Figure 5, which results in the following equations:
0.772 (0.995 RT + 0.0972 LT)
LT + 0.0972 RT)
RF"
LF"
=
RB"
=
-q
(0.7691 [0.928 (JRT - LT) + 0_372 (RT - JLTlj
LB"
=~
(0.769) [0.928 (JLT - RT) + 0_372 (LT - JRT))
= 0.772 (0.995
-An all·pass network produces pha. shift without amplitude varllitions.
FIGURE 5 - EIA STANDARD BLEND
Pin2
8-31
_f
'\
DUAL CHROMA DEMODULATOR
'-------------:--
MC1324P
DUAL DOUBLY BALANCED
CHROMA DEMODULATOR
DUAL DOUBLY BALANCED CHROMA
DEMODULATOR WITH R G B MATRIX
AND CHROMA DRIVER STAGES
WITH
R G B OUTPUT MATRIX
· .. a monolithic device designed for use in solid·state color tele·
vision receivers.
•
Luminance Input Provided
•
Good Chroma Sensitivity - 0.36 Vp·p Input for 5 Vp·p Output
•
Low Differential Output DC Offset Voltage - 0.6 V max
•
DC Temperature Stability - 3 mV laC typ
•
Negligible Change in Output Voltage Swing and Varying
3.58-MHz Reference Input Signal
•
High Ripple Rejection Achieved with MOS Filter Capacitors
•
High Blue Output Voltage Swing - 10 V(p-p) typ
•
Blanking Input Provided
•
Improved MC1326
•
Short-Circuit Protected Outputs
MONOLITHIC SILICON
INTEGRATED CIRCUIT
f~:::::]
1
(top view)
PLASTIC PACKAGE
CASE 646
FIGURE 1 - MC1324 TYPICAL APPLICATION
BLANKING
INPUT
Vee
+250 Vdc
+24 Vdc
I~: ~ 1:",-23-21 Lu~~~~~eE
10 k
10 k
10 k
8
3.3 k
3.3 k
SIGNAL INPUT
1 Vlp·p)
680
330
680
330
L-------~-------4~----~----.+20V
Atvpical application isgivellaboveloindicate
the requirell1entsand outputfunctiol1sof this
chroma demodulator.
See Packaging Information Section f9r outline dimensions.
8-32
MC1324P (continued)
MAXIMUM RATINGS ITA = +250 C unless otherwise noted.)
Rating
Value
Unit
Power Succlv Voltaae
30
Vdc
Chroma Signal Input Voltage
5.0
Vlpk)
Reference Signal Input Voltage
5.0
Vlpk)
Minimum Load Resistance
2.2
k ohms
Luminance I nput Voltage
12
Vlp-p)
Blanking Input Voltage
7.0
Vlp·p)
625
5.0
mW
mW/oC
o to +75
°c
-65 to +150
°c
Power Dissipation (Package Limitation)
Plastic Package
Derate above T A = +250 C
Operating Temperature Range (Ambient)
Storage Temperature Range
ELECTRICAL CHARACTERISTICS IVCC = 24 Vdc, Vref = 1.0 Vlp-p), Rl = 3.3 k ohms, TA = +250 C unless otherwise noted.)
I
I
Characteristic
Pin No.
I
Min
I
Typ
I
Max
I
Unit
STA TIC CHARACTERISTICS lSee F igur. 2.)
1,2,4
Quiescent Output Voltage
14.3
15
16.3
-
6.0
19
25.5
Vdc
mA
Quiescent Input Current
IRl=ooI
IR l = 3.3 k ohms)
16.5
-
Reference Input de Voltage
5,12,13
-
6.8
-
Vdc
Chroma Input de Voltage
8,9,10
-
3.6
-
Vdc
Differential Output Voltage
1,2,4
-
0.3
0.6
Vdc
Output Temperature Coefficient
IReference Input Voltage = 1.0 Vip-pI. +25° to +650 C)
1,2,4
-
3.0
-
mV/oC
4.0
4.0
5.0
5.0
-
DYNAMIC CHARACTERISTICS ISee Figure 3 )
Detected Output Voltage ISee Note 1.)
Vlpk)
4
+IB·Y)
-(B-Y)
-
Chroma Input Voltage IB·Y Output - 5.0 V[p-pl) ISee Note 2.1
8
-
0.36
0.7
Vlp-p)
Luminance Input Resistance
3
100
-
-
kn
-
0.95
0.5
-
1.1
75
-
luminance Gain From Pin 3 to Outputs
I@dc)
1@5.0MHz)
1,2,4
-
Blanking Input Resistance
kn
6
-
1.0 Vdc
o Vdc
-
Detected Output Voltage IAdjust B-Y Output to
5.0 Vlp-p), luminance Voltage = 23 V)
Vlp-p)
4
G-Y Output
R-Y Output
-
1
2
0.75
3.5
1.0
3.8
1.25
4.2
4,2
4,1
101
248
106
256
111
264
1,2,4
-
100
500
mVlp-p)
1,2,4
-
-
1.0
Vlp·p)
Reference Input Resistance
12,13
-
2.0
-
kn
Reference Input Capacitance
12,13
-
6.0
-
pF
Chroma Input Resistance
9,10
2.0
-
kn
Chroma Input Capacitance
9,10
-
2.0
-
pF
Relative Output Phase IB-Y Output
luminance Voltage = 23 V)
= 5.0 Vlp-p),
Degrees
B-Y to R-Y Output
B-Y to G-Y Output
3.8 Vlp-p)
256 0
106°
I
5.0 Vlp-p)
1.0Vlp-p)
I
Demodulator Unbalance Voltage (no Chroma Input
Voltage and normal Reference Signal Input Voltage)
Residual Carrier and Harmonics Output Voltage (with
Input Signal Voltage, normal Reference Signal
Voltage and B-Y Output
= 5.0 V[p-p])
NOTES:
1. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage to 1.2 V (p.p)'
2. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage until the Blue Output Voltage = 5 Vip-pI. The Chrome
Input Voltage at this point should be equal to or less than 0.7 V(p·p).
8-33
MC1324P (continued)
TEST CI RCUITS
IVee = 24 Vdc, RL = 3.3 Kilohms, TA = +250 C unless otherwise noted.)
FIGURE 2 - DC OUTPUT VOLTAGE TEST CIRCUIT
WITH NORMAL REFERENCE INPUT VOLTAGE
IB,R,AND G)
2.2k
..,..,.----__..--_VCC
0.05"F
B-Y REFERENCE INPUT
E----<
E----< R·Y REFERENCE INPUT
0.05"F
.
FIGURE 3 - DYNAMIC TEST CIRCUIT
RED
OUTPUT
GREEN
OUTPUT
r'-_-,--,-_,--;,--_~},-=_j!,==~==~===~O'lT"F
~
_
-
-
'
2.2 k
INPUT
lJU av
VCC+24V
_ _ _ _ _ _. -_ _ _
41pF
410
'--~
LUMINANCE INPUT
50
__________________________-<
3.58 MHz
~::i:ENCE
1.0 Vlp-p)
TYPICAL CHARACTERISTICS
FIGURE 4 - DETECTED OUTPUT VOLTAGE
ITest Circuit of Figure 3)
FIGURE 5 - POWER DISSIPATION
8.0
400
"iii 1.0
Ch~OlTHllnp~t Signal =1360 mVI~'p)
~
~
..
w
6.0
:;
5.0
to
0
>
....
:>
:::>
0
I
r-- Luminance Input =0
4.0
3.0
r-
--- ~
z
B
-
R
-
0
i=
;t
Ei
0
1.0
o
a
200
Q
w
'-'
-------
V
'>
w
ffi 2.0
to
w
t;;
./'"
300
0
...-'
/'"
----
100
G I----
r
0.2
0.4
0.6
0.8
1.0
1.2
1.4
REFERENCE INPUT SIGNAL AMPLITUDE IVlp-pl)
o
1.6
20
8·34
21
22
23
24
25
SUPPLY VOLTAGE IVdc)
26
21
28
MC1324P (continued)
FIGURE 6 - CIRCUIT SCHEMATIC
G
B
OUTPUT
OUTPUT
R
OUTPUT
12 R.y REFERENCE V 14
INPUT
CC
LUMINANCE
INPUT
I k
3O----'VIIIr-.....-l.
B·Y REFERENCE
INPUT
13o-----t-.......-{
DC REFERENCE
INPUT
5~----~----t-~~-t--~--t-----~--~~---r--~~~~==n
BLANKING
INPUT 1 k
6o-JV.~H
2k
8
B·Y CHROMA
INPUT
CHROMA DC
10 INPUT
8-35
R·Y CHROMA
INPUT
6.3 k
~J
"\
DUAL CHROMA DEMODULATOR
'---------,---------'
MC1326
DUAL DOUBLY BALANCED
CHROMA DEMODULATOR
DUAL DOUBLY BALANCED CHROMA
DEMODULATOR WITH R G B MATRIX
AND CHROMA DRIVER STAGES
WITH
R G B OUTPUT MATRIX
· .. a monolithic device designed for use in solid·state color tele-
MONOLITHIC SILICON
INTEGRATED CIRCUIT
vision receivers.
•
Luminance Input Provided
•
Good Chroma Sensitivity - 0.3 Vp·p I nput for 5 Vp-p Output
•
Low Differential Output DC Offset Voltage - 0.6 V max
•
DC Temperature Stability - 3 mV JOC typ
•
Negligible Change in Output Voltage Swing with Varying
3.5B MHz Reference Input Signal
•
High Ripple Rejection Achieved with MOS Filter Capacitors
•
High Blue Output Voltage Swing - 10 Vp·p typ
•
Blanking Input Provided
PSUFFIX
MAXIMUM RATINGS (T A
+25 0
PLASTIC PACKAGE
CASE 646
C unless otherwise noted)
Rating
Value
Unit
Power Supply Voltage
30
Vdc
Chroma Signal I nput Voltage
5.0
Vpk
Reference Signal Input Voltage
5.0
Vpk
Minimum Load Resistance
3.0
kohms
Luminance I nput Voltage
12
Vp·p
Blanking I nput Voltage
7.0
Vp-p
625
5.0
mW
mWIOC
o to +75
°c
°c
Power Dissipation (Package Limitation)
Plastic Packages
Derate above T A = +25 0 C
Operating Temperature Range (Ambient)
Storage Temperature Range
-65 to +150
PQ SUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - MC1326 TYPICAL APPLICATION
I <~~I
DOD
I
BLANKING
INPUT
1:~~lS-7S?J
+250Vdc
+24Vdc
1.0/lF
10k
MPSU10
~
10k
10k
250pH
OR EOUIV
GREEN
REO
3.5BMHz
s~::~~~:;~T
__
3.3k
3.3k
3.3k
-.-'If-+---lf---'
1 Vp·p
680
330
680
330
680
330
AtypicalapplicationisgiVllnabovltoindicate
ttlerequirementsandoutputfunctionsofthis
thromademodulator.
See Packaging Information Section for outline dimensions.
8·36
> - - -....- - - - -.. +20V
L - - -.....
MC1326 (continued)
ELECTRICAL CHARACTERISTICS (v+ = 24 Vdc, R L = 3.3 k ohms, T A = +2SoC unless otherwise noted)
I
I
Characteristic
Pin No.
I
Min
I
Typ
I
Max
Unit
Vdc
STATIC CHARACTERISTICS
Quiescent Output Voltage
See Figure 2
1,2,4
13
14.4
16
-
-
Quiescent Input Current from Supply (Figure 2)
mA
IRL=oo)
IRL = 3.3 k ohms)
16.5
6.0
19
Reference Input DC Voltage (Figure 2)
5,12,13
-
6.2
-
Chroma Reference I nput DC Voltage (Figure 2)
8,9,10
3.4
-
Vdc
Differential Output Voltage
(Reference I nput Voltage = 1.0 Vp·p)
See Note 1 and Figure 3
1,2,4
-
0.3
0.6
Vdc
Output Voltage Temperature Coefficient
(Reference Input Voltage = 1.0 Vp-p, +25 0 to +65 0 C)
See Note 1 and Figure 3
1,2,4
-
3.0
-
mV/oC
25.5
Vdc
DYNAMIC CHARACTERISTICS IV+ - 24 Vdc , R'1 -- 33 k ohms Reference I nput Voltage - 1 0 Vp p T-A-- +25 0 C unless otherwise noted)
Blue Output Voltage Swing
See Note 2 and Figure 4
4
8.0
10
-
Vp·p
Chroma I nput Voltage (B Output = 5.0 Vp-p)'
See Note 3 and Figure 4
8
-
0.3
0.7
Vp·p
3
100
-
-
kn
-
0.95
0.5
-
-
1.1
'75
-
Luminance Input Resistance
Luminance Gain From Pin 3 to Outputs
I@dc)
1@5.0MHz)
-
1,2,4
Blanking Input Resistance
-
6
1.0Vdc
OVdc
Detected Output Voltage IAdjust B Output to
5.0 Vp·p, Luminance Voltage = 23 V)
See Note 4
G Output
R Output
4
1
2
Relative Output Phase IB Output = 5.0 Vp·p,
Luminance Voltage = 23 V)
B to R Output
B to G Output
kn
Vp·p
0.75
3.5
1.0
3.8
1.25
4.2
Degrees
4,2
4,1
101
248
106
256
111
264
1,2,4
-
250
500
mVp·p
B·Y Phase Shift (B·Y Reference Input to B·Y Output)
4,13
-
3
-
Degrees
Residual Carrier and Harmonics Output Voltage (with
1,2,4
-
0.7
1.5
Vp·p
Reference I nput Resistance (Chroma Input = 0)
12,13
-
2.0
-
kn
Reference Input Capacitance (Chroma Input = 0)
12,13
-
6.0
-
pF
Chroma Input Resistance
8,9,10
2.0
-
kn
Chroma I nput Capacitance
8,9,10
-
2.0
-
pF
4.0 Vp.p
256 0
106 0
I
5.0Vp-p
1.0Vp-p
I
Oemodulator Unbalance Voltage Ino Chroma Input
Voltage and normal Reference Signal Input Voltage)
I nput Signal VOltage, normal Reference Signal
Voltage and B Output = 5.0 Vp-p)
NOTES:
1. With Chroma Input Signal Voltage = 0 and normal Reference Input Signal Voltage = 1.0 Vp-p, all output voltages will be within specified
limits and will not differ from each other by greater than 0.6 Vdc.
2. With normal Reference I nput Signal Voltage, adjust Chroma I nput Signal Voltage to 0.6 Vp·p.
3. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage until the Blue Output Voltage = 5 Vp·p. The Chroma
Input Voltage at this point should be equal to or less than 0.7 Vp·p.
4. With normal Reference Input Signal Voltage, adjust the Chroma Input Signal until the Blue Output Voltage = 5 Vp·p. At this point, the
Red and Green voltages will fall within the specified limits.
8·37
MC1326 (continued)
TEST CIRCUITS
(V+; 24 Vdc, RL ; 3.3 Kilohms, T A; +250 C unless otherwise noted)
FIGURE 2 - DC TEST CIRCUIT WITHOUT REFERENCE
INPUT SIGNAL VOLTAGE {B·Y AND R·YI
FIGURE 3 - DC OUTPUT VOLTAGE TEST CIRCUIT
WITH NORMAL REFERENCE INPUT VOLTAGE
(B, R.AND G)
(For Testing Quiescent Current, DC Output Voltage,
Difference Voltage)
2.2 k
'-____
'-----<.-. V+
--<~--
__ V+
'-----< B·Y REFERENCE INPUT
IO.I"F
'--------<
R·Y REFERENCE INPUT
FIGURE 4 - DYNAMIC TEST CIRCUIT
RED
OUTPUT
GREEN
OUTPUT
--,---,--,--;~~J~~5!=~=~===~0.IT"F
...
50
2.2 k
'-_~
LUMINANCE INPUT
V+ +24V
_ _ _ _ _ _. -_____
INPUT
470
47pF
3.5B MHz
REFERENCE
INPUT
1.0 Vp·p
8-38
UU °
V
MC1326 (continued)
FIGURE 5 - CIRCUIT SCHEMATIC
8-V REFERENCE 13
INPUT
DC REfERENCE
INPUT
5
r--4~
100
100
100
12 H-V REFERENCE
INPUT
______+--4__4-____-+__~~____________-4__~________-4______~____.--o'4
y+
13k
HI
3k
3.7k
4.2k
2k
3k
8·YCHROMA
8 INPUT
CHROMA
10 DCINPUT
R·Y CHROMA
9 INPUT
CIRCUIT OPERATION
high quiescent current (>5 mA) in order to pass large high frequency components without distortion. The filtering reduces the
quiescent current required in the emitter followers and thus reduces dissipation in the integrated circuit.
same frequency as the suppressed chroma carrier with an appropriate phase relationship is supplied between the bases of the upper
If it is not required to mix the luminance signal via 01, this trandifferential pairs Q6 and Q7, Q8 and Q9, Ql0 and Ql1,QI2 and
sistor can be used for brightness control. If the base of Q 1 is
Q13. The upper pairs are switched between full conduction and
to a suitable variable dc voltage, this will vary the de
connected
zero conduction at the carrier frequency rate. The collectors of
output levels of the three detected outputs accordingly and
the upper pairs are cross-coupled so that "doubly balanced" or
vary
the picture brightness level.
thereby
"fu II-wave" synchronous detected chroma signals are obtained.
Both positive and negative phases of the detected signal are availBlanking of the picture during line and frame flvback may be
able at opposite collector pairs.
achieved bV applving a positive-going blanking signal to the base
of 022. With an extra external resistor in series with the 01 base
While the detector section is almost identical to other available
of approximately 5 k ohms, when Q22 is turned on by the blankunits, several excellent additional features ~re incorporated.
ing pulse, the base of QI will be pulled negative bV the current in
Transistor Q1 is used as an emitter follower to which the collector
A I, thus fore ing all three detected outputs to go negative bV the
load resistors of the detectors are returned. The collector impedsame
amou nt. I n a conventional solid~state receiver with a single
ances of the upper pair transistors are high compared with the
video output stage driving the picture tube cathode, a negativecollector load resistors, and any signal at the emitter of Q1 appears
going
signal at the base of the video output stage will blank the
virtually unattenuated at the collectors of the upper pairs, and
picture tube. When using the blanking input be certain the blankhence at the three detector output terminals. This feature may be
ing pulse does not svvitch off the luminance input stage 01 comused to mix the correct amount of the luminance portion of the
pletelv; this would turn off the collector supplV for the demoducolor TV signal with the color difference signals produced bV the
lators and put the entire chroma demodulator out of lock at each
detectors to give R-G-B outputs directly.
A double sideband suppressed carrier chroma signal flows between
the bases of the two differential pairs, Q16 and QI7,QI8 and Q19.
A reference signal of approximately 1 Vp-p amplitude having the
blanking pulse.
Capacitor. CI, C2, and C3 compensate for most of the high fre-
quency roll-off in the luminance signal. This is due to the collector
capacitances of the detector transistors and the input capacitances
Matrix for MC 1326
~-i gain = 0.77
of the emitter followers, Q2, Q3, Q4. Capacitors CI, C2, and C3
provide filtering of carrier harmonics from the detected color difference signals. This increases the available svving before clipping
-
-G-Y
for the color difference Signal, and reduces the high frequency
gain
= 0.11 (B·YI + 0.28 (A·Y)
components which must pass through the emitter followers (Q2,
For indicated requirements and output functions of the MC1326
03, 04) into the video output stages. Since high capacitance
(>100 pF) is characteristic of the input impedance of a video
chroma demodulator please refer to the typical application shown
output stage, the transistor emitter followers must operate at a
on the first page of this spacification.
8-39
MC1326 (continued)
TYPICAL CHARACTER ISTICS
(TA = +25 0 C unless otherwise noted)
(Figures 6 through Figure 10 Reference Test Circuit of Figure 2)
FIGURE 6 - DC OUTPUT VOLTAGE
FIGURE 7 - POWER DISSIPATION
16
400
~
>
~
~
15
--
>-
::>
0
'"'"
...'"I
14
N
V+ = 14 Vdc
f-11
o
1.0
1.0
3.0
~
200
---
~
V
0
w
'-'
~
0
v+ 10 Vdc
13
300
0
I--
00
"0:
I.
n
B.O
4.0
5.0
6.0
7.0
LOAD RESISTANCE (k OHMS)
9.0
20
21
22
FIGURE 8 - DC OUTPUT VOLTAGE
~
~
15
RL =3.3kOHM/
V
V
I
14
N
00
13
26
27
28
/
11
20
21
22
~
~
~ 200
o
/
/
300
z
./
...
0:
23
24
25
SUPPLY VOLTAGE (Vdc)
o
0
.
~=3.3kOHMS
400
>::>
'"'"
'"I
/
FIGURE 9 - POWER DISSIPATION
16
~
/""
100
o
10
.,.-
1,1
i"- ~~VdC
'"
~
23
24
25
SUPPLY VOLTAGE (Vdc)
26
27
100
o
o
28
~
FIGURE 10 - DC OUTPUT VOLTAGE
1.0
2.0
3.0
4.0
5.0
6.0
7.0
LOAD RESISTANCE Ik OHMS)
8.0
9.0
10
FIGURE 11 - DETECTED OUTPUT VOLTAGE
(Reference Test Circuit of Figure 4)
16
j
:g
Z!
'"
S
14 -
V+I= 24 Vdc l
1
CHROMA INPUT VOLTAGE = 0
REFERENCE INPUT VOLTAGE = 0
CONNECT VARIABLE DC SUPPLY
TOPIN3.
1=
::>
0
'"'"
0:
10
/
8.0
19
/
7.0 -
w
6.0 -
'"
5.0
Z!
V
'"
':;
0
RL = 3.3 k OHMS../
I
.
V
I
6.
~
12
...'"
~'
I
8.0
4.0
0
3.0
:il
>'-'
w
>w
0
18
20
21
22
23
24
25
r-- r-
8
I--
R
-
G
-
2.0
1.0
o
8-40
--
luminance Input'" 0
..-
o
26
PIN 3 - LUMINANCE INPUT (Vdc)
1.,1
Chroma Input Signal'" 300 mVp-p
>
>::>
1=
::>
/
VJ = 24 VdJ
RL=3.3kohms
,/
0.2
0.6
0.8
1.0
0.4
1.2
REfERENCE INPUT SIGNAL AMPLITUDE (Vp·p)
1.4
1.6
MC1326 (continued)
TYPICAL CHARACTERISTICS (continued)
ITA = +250 C unless otherwise noted)
(Figures 12 through Figure 17 Reference Test Circuit of Figure 41
FIGURE 12 - OUTPUT VOLTAGE
0
9.0 _
CH~OMA INJUT VOLtAGE =1~0 mvp.p'
REFERENCE INPUT VOLTAGE
=1.0 Vp·p
'? 8. 0
~
'"~
FIGURE 13 - GREEN OUTPUT
20
7. 0
REO
6. 0
~ 5. 0
BL~
'"""
~
4. 0
=>
o 3.0
V
....- ~ V
L
18
2!
V
o
o
12
~
~
10
5
z
~
~V
1.010:::
14
o
>
V
16
'"'"
~
/~ V
~V
~ VGREEN
2.0
REFE~ENCE liN PUT JOLTAdE
~
6.
./
-
8.0
6. O
4.0
3.0
5.0
6.0
LUMINANCE INPUT VOLTAGE (Vp·p)
~
D-
........- r0-
2.0
o
o
8.0
7.0
-
4.0
...-
2.0
~
0.1
I--
0.2
FIGURE 14 - RED OUTPUT
l
1.0 vp.p
(CUPPING)
6.0
2. O
1.0
1--
8.0 Vp·p LUM.
'" 4. 0
V
-
=
I-- r-
"1.0
1
-
'\0
0.3
0.4
0.5
0.6
0.7
0.8
CHROMA INPUT VOLTAGE (Vp·p)
0.9
1.0
FIGURE 15 - BLUE OUTPUT
20
.J,
18 t-REfERENfE INPu'r VOL+AGE = 11.0 vp.J
~
w
'"
~
~
>
~
~
16
14 t- 8.0
12
1o
8.
~
6. 0
w
2.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
CHROMA INPUT VOLTAGE (Vp·p)
0.9
+1.0
~
~
....- V
=>
'"""
~
-2.0
>
~ -3.0
'" -4.0
_
REFERENCE INPUT VOLTAGE = 1.0 Vp·p
CH ROMilNPUT VOLTiGE = 0.1 vp.PI
~ Ll"
V
l-...2'
~!-- - r---
/l"......-:;V
I<:::~Y
. . . V ......... t::-y
~k~V
.......
/./
/" +-......-:: t::::::
V
~l-::/ l"
i'o
2.01
'1.0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
CHROMA INPUT VOLTAGE (Vp·p)
0.9
1.0
~.5r--------'---------l'--------'1---------'
\
t------.,~--- REFE RENCE INPUT VOL TAGE = 1.0 Vp·p _
' " CHROMA INPUT VOLTAGE=O.1 Vp·p
-0.5 t---------t---""\.,L_UMINANCE INPUT = 0
--
\
~ -1.0 t---------t----~--'lr__t_----------t----------j
\
~ -1.5 t---------t------\-~
......t---------t---------j
:;: -2.0 t--------__t----------'t-----------t----------j
\
~. -2.5 t-----+-----+I\.~--___1r----____j
~ -3.0 r-----+----+---""'...---t------i
\
0:
-5.0
-6.0
1
FIGURE 17 - CHROMA BANDWIDTH
..........
~ -1.0
x.~
....-~ V
o~
o 0.1
1.0
FIGURE 16 - LUMINANCE BANDWIDTH
+2.0
~p.p LUIM.
O~~ V
5
4.
(CUPPING)
"-
-3.5 r------II-------+--~--......c_+---__t
-4.0f----+----+----f"
........
:------i
o
1.0
2.0
4.0
3.0
LUMINANCE INPUT FREQUENCY (MHz)
-4.5 '----------'---------'-----------'-----""'--~--~
o
0.5
1.0
1.5
2.0
CHROMA MOOULATION FREQUENCY (MHz)
5.0
8-41
l . . _____
C_H_R_O_M_A_D_E_M_O_D_U_L_A_T_O_R_--...I
MC1327
DUAL DOUBLY BALANCED
CHROMA DEMODULATOR
with
RGB OUTPUT MATRIX
AND PAL SWITCH
DUAL DOUBLY BALANCED CHROMA
DEMODULATOR WITH RGB MATRIX, PAL
SWITCH, AND CHROMA DRIVER STAGES
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. a monolithic device designed for use in solid-state color television
receivers.
•
Good Chroma Sensitivity - 0.28 Vp-p I nput Typical
for 5.0 Vp-p Output
•
Low Differential Output DC Offset Voltage - 0.6 V Maximum
•
Differential DC Temperature Stability - 0.7 mV/oC
•
High Blue Output Voltage Swing - 10 Vp-p Typical
•
Blanking Input Provided
•
Luminance Bandwidth Greater than 5.0 MHz
P SUFFIX
PLASTIC PACKAGE
CASE 646
PO SUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - TYPICAL APPLICATION CIRCUIT
+230 V
'"
LUMINANCE SIGNAL Y
1
SWITCH
:~:TIJLJL
INPUT
+24V
0047,uF
47
"
y .. ~.~ y
~
11k
12
12k
REFERENCE
SIGNAL
MC1327
MPSU10
OREQU1V
REFERENCE
SIGNAL
13
~
..·.. B.'~n< b
~
10
47
2~410
MPS6!i44
OR EQUIV
/oIH
4.7k
Uk
O,22,1.1F
I
O.Ol!JF
MPSUIQ
12k
O.Ol/Jf
II
OR EQUIV
41
R·Y
II-Y
CHROMA-SIGNAL
MPS6544
OR EQUlV
12k
See Packaging Information Section for outline dimensions.
8-42
220pF
MC1327 (continued)
MAXIMUM RATINGS (TA = +250 C unl_om.rwile noted)
Value
Unit
Power Supply Voltage
30
Vdc
Chroma Signal Input Voltage
5.0
Vpk
Reference Signal Input Voltage
5.0
Vpk
Minimum Load Resistance
3.0
kohms
Rating
Luminance f nput Voltage
Blanking Input
Vol~
12
Vp-p
7.0
Vp-p
625
5.0
rrlN/OC
Power Dissipation (Package Limitation)
Plastic Packages
Derate above T A ' +25o C
mW
-20 to +75
Operating Temperature Range (Ambient)
Storage Temperature Range
-65 to +150
°c
°c
ELECTRICAL CHARACTERISTICS (VCC = 24 Vdc. RL' 3.3 k ohms. TA = +250 C unless otherwise noted)
Pin No.
Min
Typ
Max
Unit
1.2,4
13.2
14.5
15_8
Vdc
-
-
STATIC CHARACTERISTICS
Quiescent Output Voltage
(5.. Figure 2)
Quiescent Input Current from Supply (Figure 2)
(RL'CO)
(RL' 3.3 k ohms)
mA
16
7.5
19
Reference Input DC Voltage (Figure 2)
5.12.13
-
6.2
Chroma Reference Input DC Voltage (Figure 2)
8.9.10
-
3.4
-
Vdc
Differential Output Voltage
(5.. Note 1 and Figure 2)
1.2,4
-
0.3
0.6
Vdc
Differential Output Voltage
Temperature Coefficient (See Note 1 and Figure 2)
(+250 C to +65 0 C)
1.2,4
-
0.7
-
Output Voltage Temperature Coefficient
1.2,4
-
+0.5
±.5.0
26
Vdc
mV/oC
mV/oC
(See Note 1 and Figure 2)
(+250 C to +650 C)
DYNAMIC CHARACTERISTICS (VCC
= 24 Vdc. RL = 3.3 k ohms. Reference Input Voltage = 1.0 VP-P. T A' +250C unless otherwise noted)
Blue Output Voltage Swing
(See Note 2 and Figure 3)
4
8.0
10
-
Vp-p
Chroma Input Voltage (B Output = 5.0 Vp-p)
(5.. Note 3 and Figure 3)
8
-
280
550
mVp-p
3
100
-
-
kG
0.95
-1.8
-
-
0.3
-
-
1.1
75
-
Luminance Input Resistance
Luminance Gain From Pin 3 to Outputs
(@dc)
(@5.0MHz. reference at 100 kHz)
-
1.2.4
-
Differential Luminance Gain, RGB Outputs
(@5.0MHz)
-
dB
dB
Blanking Input Resistance
6
(1.0 Vdc)
(OVdc)
kG
-
Detected Output Voltage (Adjust B Output to 5.0 VP-P. Luminance
Voltage = 23 V)
(5.. Note 4)
G Output
R Output
4
PAL Switch Operating Voltage Range
(7.8 kHz Square Wave)
11
1
2
Vp-p
1.4
2.5
1.8
2.9
2.2
3.3
0.3
-
3.0
Vp-p
-
-
100
mVdc
Demodulator Unbalance Voltage (no Chroma Input Voltage and
normal Reference Signal Input Voltage)
1.2,4
-
200
300
mVp-p
Residual Carrier and Harmonics Output Voltage (with Input Signal
Voltage. normal Reference Signal Vol~ and B Output 5.0 Vp-p)
1.2,4
-
0.6
1.0
Vp-p
kG
R-Y Output dc Offset with PAL Switch Operation
=
=0)
12.13
-
2.0
-
Reference Input Capacitance (Chroma Input - 01
12.13
-
6.0
-
pF
Chroma I nput Resistance
8.9.10
-
2.0
kG
Chroma I nput Capacitance
8.9.10
-
2.0
-
Reference Input Resistance (Chroma Input
pF
NOTES: 1. Chroma Input Signal Voltage = 0 and normal Aeference Input Signal Voltage" 1.0 Vp-p.
2. With normal Aeference Input Signal Voltage, adjust Chroma Input Signal Voltage to 1.2 VP-p.
3. With normal Aeference Input Signal Voltage, adjust Chroma Input Signal Voltag. until the Blue Output Voltage'" 5.0 Vp-p.
4. With normal Aeference Input Signal Voltage, adjust Chroma Input Signal Voltage until the Blue Output Voltage
Red and Green voltages will fall within the specified limits.
8-43
= 5.0 Vp-p.
At this point, the
MC1327 (continued)
MC1327 CHROMA DEMODULATOR (PALl
B·Y
INJECTION
DC
INJECTION
13
B·Y OUTPUT
R·Y
INJECTION
,
R·YOUTPUT
6·YOUTPUT
1
4
11
14
LUMINANCE J
INPUT
OJ
'"
'Ok
10k
2.4k
2.0k
2.0k
10k
9.5k
3.6k
3.0k
4.3k
BLANKING 6
INPUT
I.Ok
Vee
(+24Vdc)
I.Ok
all
1.Ok
3.4k
3.4k
10
B·YCHROMA
CHROMA
DC
REFERENCE
100
11
R·YCHROMA
8-44
PAL SWITCH SIGNAL
3.0k
2.0k
MC1327 (continued)
TEST CIRCUITS
(Vee = 24 Vdc, RL = 3.3 kilohms, TA = +250 e unless otherwise noted)
Q,lJ,Cf
Al
Al
Al
2.2k
FIGURE 2 - DC OUTPUT VOLTAGE TEST CIRCUIT
WITH NORMAL REFERENCE INPUT VOL TAGE
(B, R,ANDG)
Vee
FIGURE 3 - DYNAMIC TEST CIRCUIT
GREEN OUTPUT
AED OUTPUT
BLUEO UTPUT
-4-
~.~ ;:
Al
Al
Al
,t
O.lIJF
rrl6
5
3
4
2
1
.".
eHROMA
INPUT
T
"
o.1.'
B
t,
I
10
11
12
13
ov
lnr
U U
51k
MC1327
I
LUMINANCE INPUT
2.2k
14
Vee
+24 V
~;f
·'1 tal.'
J,0.D1 IlF
0.1
4.7k
(
Q,D47I1F
8-45
:
•
B-Y REFERENCE INPUT
R-Y REFEAENCE INPUT
PAL SWITCH SIGNAL
,
DUAL CHROMA DEMODULATOR
'------------'
Met32S
DUAL DOUBLY
BALANCED CHROMA
DEMODULATOR
MONOLITHIC DUAL DOUBLY
BALANCED CHROMA DEMODULATOR
•
Good Chroma Sensitivity (0.3 Vp·p Input Produces 5.0 Vp-p
Output)
•
Good dc Temperature Stability (3 mVPC typ)
•
Low Output dc Offset Voltages (0.6 V max)
Monolithic Silicon
Integrated Circuit
• Pin Compatible with ULN-2114, ULN-2114A
•
Negligible Change in Output Voltage Swing With Varying 3.58 MHz
Reference_Signal
•
High Ripple Rejection Due To Built-In MOS Filter Capacitors
•
High Output Voltage Swing (10 Vp-p Typ) - B-Y
G SUFFIX
PSUFFIX
METAL PACKAGE
CASE 603
ITO-l 00)
PLASTIC PACKAGE
CASE 646
PO SUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - MCI328 TYPICAL APPLICATION
+2!iOVdc
+24Vdc
10k
200j.lH
Number adjacent to terminal ;s the pin number tor plastic packages.
number in
is the corresponding pin numb.. for the mllal package.
MPSUIO
orequiv
a
0.01
~F
CHRg~~~~PUT ~1------5'-i
3.58 MHz
CHROMA REFERENCE_....._~I-_....==II---'
INPUT
A practical application is given above to indicate the requirements
and output functions of this chroma demodulator. There are other
methods of achiaving the matrix of the Chroma-Y and the lumi-
nance compopents without degradation of performance other than
the one indicated. E.g., it Is a common practice for color TV manufacturers to matrix in the picture tube.
See Packaging Information Section for outline dimensions.
8-46
MC1328 (continued)
MAXIMUM RATINGS (TA ~ +25"C unless otherwise specified)
Value
Unit
Power Supply Voltage
30
Vdc
Power Dissipation (Package Limitation)
PI_tic Packages
Derate above T A '" +2S0C
Metal Package
Derate above T A = +25 0 C
625
5.0
680
4.5
mWf'C
mW
mWf'C
Chroma Signal Input Voltage
5.0
Vpk
Reference Signal Input Voltage
5.0
Vpk
Minimum Load Resistance
3.0
k ohms
o to +75
°c
°c
Amlna
Operatinll Temperature Range (Ambient)
rrNV
-65 to +150
Storage Temperature Range
Maximum Ratings a. defined In MIL-$-1950D, Appendix A.
ELECTRICAL CHARACTERISTICS (V+ ~ 24 Vdc, R L = 3.3 k ohms, Reference Input
STATIC CHARACTERISTICS
Voltage = 1.0 Vp·p, TA = +250 C unless otherwise noted)
PinNa.
Characteristic
Quiescent Output Voltage
See Figure 2
Suffix G Pkg
7.8,9
au incent Input Current (See Fi~ure 2)
(RL = 00, Chroma and Reference
Pin No.
Suffix p. PO Pklll
9,11,13
Min
Typ.
Max
Unit
13
1~.3
16
Vdc
mA
6.0
6
Input Voltages'" 01
16.5
(RL "" 3.3 k ohms, Chroma and
19
25.5
Reference Input Voltages = 01
Reference Input DC Voltage
4,5
6.7
6.2
Chroma Input DC Voltage
2,3
3,4
3.4
Differential Output Voltage
See Note 1 and Figure 3
7,8,9
9,11,13
0.3
Output Temperature Coefficient
(No Output Differential Voltage
> 0.6 Vdc, +250 C to +650 C)
See Note 1 and Figure 3
7,B,9
9,11,13
3.0
DYNAMIC CHARACTERISTICS (V+
Vdc
Vdc
0.6
Vdc
mV/oC
= 24 Vdc, RL = 3.3 k ohms,
Referenced Input Voltage = 1.0 Vp-p, TA
Detected Output Voltage (S·Y)
See Note 2
13
= +250 C unless otherwise noted)
8.0
Chroma Input Voltage
(B·Y Output = 5.0 Vp-pl
See Note 3
Detected Output Voltage
(Adjust B-Y Output to 5.0 Vp-p)
G·Y
See Note 4
R·Y
Vp.p
9.0
0.3
0.7
Vp.p
0.75
3.5
1.0
3.8
1.25
4.2
Vp.p
11
9-8
9·7
13-11
13-9
101
248
106
256
111
264
Degrees
7,8,9
9,11,13
250
500
mVp-p
5-9
7·13
7,8,9
9,11.13
Reference Input Resistance
(Chrome Input = 0)
4,5
6,7
2.0
Relative Output Phase
(B·Y Output'" 5.0 Vp-p)
B-Y to R·Y
4.0Vp-p
B·Y to G·Y
5.0Vp.p
"
1.0Vp-p
I
I
Demodulator Unbalance Voltage
(no Chroma Input Voltage and
norma' Reference Signal
Input Voltage)
B-Y Phase Shift
Degrees
(B·Y Reference Input to B-Y Output)
Residual Carrier 51d Hatmonics
(with I nput Signal Voltage,
normal Reference Signal Voltage
and B- Y == 5.0 Vp-pl
1.5
Vp.p
kohms
Reference Input Capacitance
(Chroma Input == 01
4,5
6,7
6.0
pF
Chroma Input Resistance
2,3
·3.4
2.0
kohms
Chroma Input Capacitance
2,3
3.4
2.0
pF
NOTES,
1. With Chroma Input Signal Voltage = 0 and normal Reference Input Signel Voltage (1.0 Vp·p I,all output voltages will be within specified
limits and will not differ fram each other by greater than 0.6 Vdc.
2. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage to 0.6 Vp-p.
3. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage until the B·Y-Output Voltage = 5 Vp·p. The Chroma Input
Voltage at this point should be equal to or less than 0.7 Vp-p.
4. With normal Reference Input Si",a' Voltage. adjust the Chroma Input Signal until the B·Y Output Voltage = 5 Vp-p. At this pOint, the A·Y
and G·Y voltages will fall within the specified limits.
8-47
MC1328 (continued)
TEST CIRCUITS
(v+ ~ 24 Vdc, R L ~ 3.3 k~, T A ~ +25 0 C unless otherwise noted)
FIGURE 2 - TEST CIRCUIT WITH NO REFERENCE INPUT SIGNAL
V+
FIGURE 3 - TEST CIRCUIT WITH REFERENCE INPUT SIGNAL
(Quiescent Current, DC Output Voltage, Difference Voltage)
R·Y REFERENCE INPUT
B·Y REFERENCE
INPUT
V+ ...._-..._ _....J
R·Y REFERENCE INPUT
TYPICAL CHARACTERISTICS
FIGURE 5 - DETECTED OUTPUT
FIGURE 4 - DETECTED OUTPUT
20
"
~
~
w
.
'"
8.0
2LdC
18 f--IV+ =
Rl=3.3kohms
16 r-- Reference Input Signal
14
I.
B~
C;
0
>
12
;r
10
/'
:::>
0
8.0
./
~
6.0
tu
0
4.0
>>-
~
I
7.0
=1 1.0 VPT
~
w
...---r .....-
'"C;
0
/.V
o1£f-o
0.2
--
0.4
5.0
>-
;r
g
R·Y
~
~
G·
f--
4.0
0.8
1.0
1.2
1.4
1.6
1.8
2.0
CHROMA INPUT SIGNAL (Vp·p)
-
---
3.0
2.0
1.0
o
0.6
...--
>
//
2.0
6.0
....
::>
1=
::>
4.0
-
S·Y
R·Y
~
I--
"'"
~
I--
0
>
3.0
~
....
;;:
t:;
2.0
0
0
1.0
0
~
t;;
15
-
w
14
13
G·Y_ I - -
20
21
22
23
24
25
26
27
28
12
2.0
29
-
V+· 24 Vdc
~
v+ - 20 Vdc
3.0
o
5 f - - RL'
3.L
V
ohms
./
V
3"
.s
V
/'
14
13
8.0
400
w
....>
::>
1=
::>
7.0
FIGURE 9 - POWER DISSIPATION
FIGURE 8 - DC OUTPUT VOLTAGE
'"
o~
6.0
LOAD RESISTANCE Ik OHMS)
6
~
5.0
4.0
SUPPLY VOLTAGE IVdc)
~
;::
V
:t
iii
/
V
300 t---- AL = 3.J k ohms
-
V
V
200
I--'"
0
'"
~
~
.......... V
~
100
12
20
21
22
23
24
25
26
27
2S
21
20
22
SUPPLY VOLTAGE IVdc)
23
FIGURE 10 - POWER DISSIPATION
400
I
300
:z
o
;::
:t
~
o
.......
---
""'" t'--
o ..... -.;;;;:
20
'"~
~
1---
100
V+· 24 Vdc
r--
V+ - 20 Vdc
I
o
2.0
24
25
SUPPLY VOLTAGE IVdc)
3.0
4.0
5.0
6.0
LOAD RESISTANCE Ik OHMS)
8-49
7.0
8.0
26
27
28
MC1328 (continued)
FIGURE 11 - CIRCUIT SCHEMATIC
8-Y REFERENCE INPUT
R-Y REFERENCE INPUT
®)
®
6
r--------t--~------~t_~~--------+-~~------4---------~~--~---ov+
13 k
®
3.7k
(i) 3
CHROMA INPUT
3k
14
GROUNOCD~I~--------~--------~r------4------N-um-b-e-ra-d-ia-ce-nt·t-o-te-rm-in-a-li-st-he-p-in-n-u-m-b'-r-fo-r-th-e-PI-"-ti~C~----~~----~
@
4
CHROMA INPUT
packages, number in
0
is the corresponding pin number for the
metal package.
CIRCUIT OPERATION
Capacitors C1, C2 and C3 provide filtering of carrier harmonics
from the detected color difference signals. This increases the available swing before clipping for the color difference signal, and reduces the high frequency components yvhich must pass through the
emitter followers (01, 02, 03) into the video output stages. Since
high capacitance (>100 pF) is characteristic of the input impedance
of a video output stage, the transistor emitter followers must operate at a high quiescent current (>5 mA) in order to pass large high
frequency components without distortion. The filtering reduces
the quiescent current required in the emitter followers and thus
reduces dissipation in the integrated circuit.
A double sideband suppressed carrier chroma signal flows between
the bases of the two differential pairs, 015 and 016, 017 and 018.
A reference signal of approximately 1 Vp-p amplitude having the
same frequency as the suppressed chroma carrier with an appro~
priate phase relationship is supplied between the bases of the upper
differential pairs 05 and 06, 07 and as, 09 and 010, 011 and
012. The upper pairs are switched between full conduction and
zero conduction at the carrier frequency rate. The collectors of
the upper pairs are cross-coupled so that "doubly balanced" or
"full-wave" synchronous detected chroma signals are obtained.
Both positive and negative phases of the detected signal are available at opposite collector pairs.
8-50
'\
DUAL CHROMA DEMODULATOR
'-------------'
MC1329P
DUAL DOUBLY
BALANCED CHROMA
DEMODULATOR
MONOLITHIC DUAL DOUBLY
BALANCED CHROMA DEMODULATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
•
Good Chroma Sensitivity (0.36 V(p·p) Input Produces 5.0 V(p·p)
Output)
•
Good dc Temperature Stability (3 mV 10C typ)
•
Low Output dc Offset Voltages (0.6 V max)
•
Pin Compatible with ULN-2114. ULN-2114A
•
Negligible Change in Output Voltage Swing With Varying 3.58MHz Reference Signal
•
High Ripple Rejection Due to Suilt·ln MOS Filter Capacitors
•
High Output Voltage Swing (II VIp-pI Typ - S·Y)
•
Short·Circuit Protected Outputs
(top view)
PLASTIC PACKAGE
CASE 646
FIGURE 1 - MCI329P TYPICAL APPLICATION
+250 Vdc
+24Vdc
10k
R'
200IJH
0.01 pF
CHR~~~~~PUT e------1f-----c...,
3.58MHz
CHROMA REFERENCE ...--1I--lf--....-==~I-----'
INPUT
·SELECT.
PINS NOT SHOWN ARE
NOT CONNECTED.
A practical application is given above to indicate the requirements
and output functions of this chroma demodulator. There are other
methods of achieving the matrix of the Chroma·Y and the luminance components without degradation of performance other than
the one indicated. E.g .• it is a common practice for color TV
manufacturers to matrix in the picture tube.
See Packaging Information Section for outline dimensions.
8-51
MC1329P (continued)
MAXIMUM RATINGS (TA
= +250 C unless otherwise specified I
Rating
Value
Unit
30
Vdc
+250 C
625
5.0
mW
mW/oC
Chroma Signal Input Voltage
5.0
V(pkl
Reference Signal Input Voltage
5.0
V(pkl
Minimum Load Resistance
2.2
kohms
Power Supply Voltage
Power Dissipation (Package Limitation)
Plastic Package
Derate above T A
=
Operating Temperature Range (Ambient)
Storage Temperature Range
o to +75
°c
-65 to +150
°c
ELECTRICAL CHARACTERISTICS (VCC = 24 Vdc, RL = 3.3 k ohms, Vret = 1.0 V(p-pl, TA = +250 C unless otherwise noted.1
I
I
Characteristics
STATIC CHARACTERISTICS (See Figure 2 I
Quiescent Output Voltage
=
=
I
9,11,13
Quiescent Input Current
(RL
(R L
Pin No.
Min
I
Typ
I
Max
13
14.5
16
-
6.0
19
25.5
8
001
3.3 k ohmsl
I
Unit
Vdc
mA
16.5
Reference Input de Voltage
6,7
-
6.9
-
Vdc
Chroma Input de Voltage
3,4
-
3.6
-
Vdc
0.3
0.6
Vdc
-
3.0
-
mVPC
4.0
4.0
5.5
5.5
-
3
-
0.36
0.7
9
11
0.75
3.5
1.0
3.8
1.25
4.2
Differential Output Voltage
9-11,9-13,
11·13
9,11,13
Output Temperature Coefficient
(No Output Differential Voltage >0.6 Vdc, +250 C to +650 CI
DYNAMIC CHARACTERISTICS (Pin 4 bypassed to ground chroma (3.56 MHzl on pin 3.1
Detected Output Voltage
13
+(B-YI
-(B-YI
See Note 1.
Chroma Input Voltage
(B-Y Output
V(p-pl
V(p-pl
= 5.0 V [p.p) I See Note 2.
Detected Output VA Itage
(Adjust B-Y Output to 5.0 V[p-p) I
V(p-pl
G-Y
R-Y
Relative Output Phase
(B-Y Output = 5.0 V[p-p) I
Degrees
B-Y to R-Y
B-Y to G-Y
13-11
13-9
101
248
106
256
111
264
9,11,13
-
100
500
mV(p-pl
9,11,13
-
-
1.0
V(p-pl
Reference Input Resistance
6,7
-
2.0
-
k ohms
Reference Input Capacitance
6,7
-
6.0
-
pF
Chroma Input Resistance
3,4
-
1.0
-
k ohms
Chroma Input Capacitance
3,4
-
2.0
-
pF
3.B V(p-pl
256°
106°
I
I
5.0 V(p-pl
1.0V(p-pl
I
I
Demodulator Unbalance Voltage
(no Chroma Input Voltage and
normal Reference Signal Input Voltage)
Residual Carrier and Harmonics Output Voltage
(with Input Signal Voltage, normal Reference Signal
Voltage and B-Y
= 5.0 V [p-p) I
NOTES:
1. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage to 1.2 V(p·p).
2. With normal Reference Input Signal Voltage, adjust Chroma Input Signal Voltage until the B-Y Output Voltage
Input Voltage at this point should be equal to or less than 0.7 V(p·pl.
8-52
=
5.0 VIP-Pi. The Chroma
MC1329P (continued)
TYPICAL CHARACTERISTICS
(VCC = 24 Vdc, R L = 3.3 kll, T A = +250 C unless otherwise noted.)
FIGURE 2 - TEST CIRCUIT WITH REFERENCE INPUT SIGNAL
(Quiescent Current, DC Output Voltage, Difference Voltage)
vcc ....- ...---'
FIGURE 3 - DETECTED OUTPUT
8.0
l' 7.0
Ch~om. Inpul, Sign.1 = 1360 mv(J.p)
~
~
w
'"
'"':;
6.0
5.0
'">,..
4.0
=>
3.0
,..ffi
2.0
,..~
'"
~
t;:;
1.0
'"
o
a
--...---
S·Y
-
R·Y
-
G·Y f----
/
0.2
0.4
0.6
O.S
1.0
1.4
1.2
1.6
REFERENCE INPUT SIGNAL AMPLITUDE (V [p.p))
FIGURE 5 - POWER DISSIPATION
FIGURE 4 - DETECTED OUTPUT VOLTAGE
8.0
16
sigL =36d mv(p.p!
l' 7.0 I---- cLm.
Reference Input Signal:::: 1.0 V(p·p)
V
~
~
w
'"'"':;
'",..>
=>
6.0
~
5.0
S·Y f - -
4.0
R·Y
i=
=>
'"ffi
V
./
~
w
'"'"':;
I--
'"
>
./
14
~
3.0
i=
=>
2.0
B
t;:;
'"
15
'"
G·Y
1.0
13
I--
V
1/
V
/
12
20
21
2Z
23
24
25
26
27
28
20
29
SUPPLY VOLTAGE (Vdc)
21
22
23
24
25
SUPPLY VOLTAGE (Vdc)
8-53
26
27
28
MC1329P (continued)
FIGURE 6 - CIRCUIT SCHEMATIC
B-Y CHROMA
REFERENCE INPUT
13
B-Y
OUTPUT
R-Y
11
R-Y
OUTPUT
200
CHROMA
REFERENCE INPUT
VCC
13_6 k
2k
4_9 k
284
CHROMA{
INPUTS
4
284
o-_+------_+------~~--+__+------_+------~
GND
1k
14
o-----------~~------------~------------~----------------~--~I_--~
8-54
~f
MC1330P
~________________V_I_D_E_O_D_E_T_E_C_T_O_R__~
MONOLITHIC LOW-LEVEL VIDEO DETECTOR
LOW-LEVEL VIDEO
DETECTOR
. an integrated circuit featuring very linear video characteristics,
wide bandwidth. Designed for color and monochrome television receivers, replacing the third IF, detector, video buffer and the AFC
buffer.
INTEGRATED CIRCUIT
•
Conversion Gain - 34 dB typ
•
Video Frequency Response
•
I nput of 36 mV Produces 3.0 Vp·p Output
•
High Video Output - 7.7 Vp-p
@
MONOLITHIC SILICON
6.0 MHz < 1.0 dB
•
Fully Balanced Detector
•
High Rejection of I F Carrier
•
Low Radiation of Spurious Frequencies
PLASTIC PACKAGE
CASE 626
MAXIMUM RATINGS ITA
= +25 0 C unless
otherwise noted)
Value
+24
Unit
Supply Current
26
mAde
I nput Voltage
1.0
V(rmsl
625
5.0
mW
mW/oC
o to +75
°c
°c
Rating
Power Supply Voltage
Power Dissipation (Package Limitation)
TA = +250 C
Derate above T A = +25 0 C
Operating Temperature Range (Ambient)
Vdc
-65 to +150
Storage Temperature Range
FIGURE 1 - DETECTED COLOR BARS
FIGURE 2 - PULSE RESPONSE
II
3
p-p
:>
II
:>
II
o
7.51's/DIV.
()LJ
==
-== I I
o
.
1.0l's/DIV.
See Packaging Information Section for outline dimensions.
8-55
PUT
IOI.T
'GE
OJu
IN UT E, VEL
PE
MC1330P (continued)
ELECTRICAL CHARACTERISTICS (v+
= 20 Vdc, Q = 30, fe = 45 MHz, T A = +25 0 e
unless otherwise noted.)
Pin
Min
Typ
Max
Unit
Supply Voltage Range
6
12
20
24
Vde
Supply Current
Characteristic
5,6
-
15
-
rnA
Zero Signal de Output Voltage
4
6.B
7.7
B.3
Vde
Maximum Signal de Output Voltage
4
-
0
-
Vde
I nput Signal Voltage for 3.0 Vp·p Video Output
(90% Modulation)
7
-
36
-
mV(rms)
Vp·p
Maximum Output Voltage Swing
4
-
7.7
-
Carrier Rejection at Output
4
42
60
-
3.0 dB Bandwidth of I F Carrier
7
3.0 dB Bandwidth of Video Output
4
1nput Resistance
7
-
-
BO
-
MHz
12.3
-
kilohm.
pF
MHz
-
-
lBO
-
ohms
2,3
-
-
kilohms
pF
r--
I-
~
11
6.8 k
3.3 k
77 Vo
Cl
L1. Cl; See
I-
PRIMARY OUTPUT
AFT OUTPUT
':'
2.0
::>
0
[LJ""- --]
o
o
':'
z
/
n:
~
<
':;
0
/"
4.0
/
>
~
~
/'"
IF Input = 0
Y
"-
........,F Input = 40 mV(rms)
.........
",
10
14
12
16
20
18
22
24
10
20
4.0
~
-
+2.0
::>
o
~
o
:; -2.0
~
~ -4.0
t;;
o
w
-6.0
-10
~~
w~
~
I
2.0
4.0
6.0
8.0
10
40
-z
~o
~~
«
12
J.
/'
50
60
70
80
90
100
IF Input = 40 mV(rms)
-
~~
1-<
::>100
l-
1.0
t;
1\
14
I---
OUTPUT AMPLITUDE
2.0 f - - - 0=30
1-"
\
vlc
= 20
1M = 1 kHz
f---90%MOO
::>",
1--
\
70% MOO
V+=20Vdc
0=30
o
./
/
r--k
3.0 I - -
00
"'- r--..
IC=45MHz
-6.0
~
V
IF Input = 40 mV(rms)
>
-
6
c:~
........
100
FIGURE 9 - CARRIER FREQUENCY PERFORMANCE
FIGURE 8 - VIDEO FREQUENCY RESPONSE
~ +4.0
~
80
60
INPUT CARRIER LEVEL (mVlrmsll
~ +6.0
I-
--- "'"r--......
r-...
,../
30
SUPPLY VOLTAGE (Vdc)
.
12rC
r---...
.............
./
"'"
/
8.0
~
V+ = 20 Vdc
. 90%MOO I
1M = 1 kHz
IC =45 MHz
0=30
..,./
/'"
/'
2.0
./
/
---
't- ........
FIGURE 7 - DETECTOR LINEARITY
FIGURE 6 - OUTPUT VOLTAGE
6.0
r---... . . .
15 1Vdc
INPUT VOLTAGE (mVlrms})
8.0
.
~
...........
40
20
General Application Notes, #3, last page of this specificatIOn
~
........
V+=20Vdc
% DISTO RTION
----
~
~
0
16
25
MODULATING FREaUENCY (MHz)
30
35
40
45
50
CARRIER FREOUENCY (MHz)
8-57
55
60
65
MC1330P (continued)
APPLICATIONS INFORMATION
FIGURE 10 - COLOR IF AMPLIFIER TYPICAL APPLICATION
r-__~lAk~__-4~____________________-4~______~_+~2.0V 20V
TUNER
AND
IF INPUT
TRAPS
4.3 k
10V~~J
--I
AUXI LlARY VIDEO OUTPUT
1.7V~--
01]["-
AGe 5·8 V ....JVvv---+
3.3k
PRIMARY
VIOEO AND SOUND OUTPUT
;;;~~~~;;~~~;----'--+---------~t:::::::=--'AFTOUTPUT
TV-IF Amplifier Information
A very compact high performance I F amplifier constructed as shown
in Figure 11 minimizes the number of overall components and alignment adjustments. It can be readily combined with normal tuners
and input tuning-trapping circuitry to provide the performance de-
manded of high qual ity receivers. Th is configu ration wi II provide
approKimately 84 dB voltage gain and can accomodate the usual
low impedance input network or, if desired, can take advantage of
an impedance step·up from tuner to MC1350P input (Zin ~7.0 kil·
ohms). The burden of selectivity, formerly found between the third
I F and detector, must now be placed at the interstage. Tho
nominal 3 volt peak·to·peak output can be varied from 0 to 7.0 V
with excellent linearity and freedom from spurious output products.
FIGURE 11 - TRANSFORMER
L
1/4"
-,--
T
- I 3IS··1--~
Primary Winding: 8 turns of AWG #26 close wound, CT
Secondary Winding: 6 turns of AWG #26 close wound, CT
Core: Arnold Typa·TH slugs or equiv.
specific features and information on systems design with this device
are given below:
1. The device provides excellent linearity of output versus input,
asshown in Figure 6. This graph also shows that video peak·to·peak
amplitude (ac) does not change with supply voltage variation.
(Slopes are parallel. Visualize a given variation of input CW and use
the figure as a transfer function.)
2. The de output level does change linearly with supply voltage.
This can be accommodated by regulating the supply or by referencing the subsequent video amplifier to the same power supply.
3. The choice of a for the tuned circuit of pins 2 and 3 is not critical. The higher the Q, the better the reiection of 920 kHz products
but the more critical the tuning accuracy required. Values of a
from 20 to 50 are recommended. (Note the internal resistance.)
4. A video output with positive-going sync is available at pin 5 if
required. This signal has a higher output impedance than pin 4 so
it must be handled with greater care, If not used, pin 5 may be
connected directly to the supply voltage (pin 6),
5. An AFT output (pin 1) provides 350 mV of clipped carrier output, sufficient voltage to drive an AFT ratio detector, with only one
additional stage.
Alignment is most easily accomplished with an AM generator, set
at a carrier frequency of 45.75 MHz, modulated with a video frequency sweep. This provides the proper realistic conditions necessary to operate the low-level detector (LLD). The detector tank is
first adiusted for maximum detected de (with a CW input), next,
the video sweep modulation is applied and the interstage and input
circuits aligned, step by step, as in a standard IF amplifier.
Note: A normal IF sweep generator, essentially an FM generator,
will not serve properly without modification. The LLD tank attempts to "follow" the sweep input frequency, and results in variations of switching amplitude in the detector. Hence, the apparent
overall response becomes modified by the response of the LLD tank,
which a real signal doesn't do.
This effect can be prevented by resistively adding a 45.75 MHz CW
signal to the output of the sweep generator approximately 3 dB
greater than the sweep amplitude.
MC1330P General Information
The MCI330P offers the designer a new approach to an old problem. Now linear detection can be performed at much lower power
signal levels than possible with a detector diode.
Offering a number of distinct advantages, its easy implementation
should meet with ready acceptance for television designs. Some
8-58
'\
VIDEO DETECTOR
'----------'
MC1331P
Produ.ct Previe'VV
LOW-LEVEL VIDEO
DETECTOR
MONOLITHIC LOW-LEVEL VIDEO DETECTOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. an integrated circuit featuring very linear video characteristics and
wide bandwidth. Designed for color and monochrome television receiv·
ers, replacing the third IF, detector, video buffer, AFC buffer, sound
IF detector, and sync separator.
• Conversion Gain - 34 dB typical
f~:::::]
• Video Frequency Response at 6.0 MHz < 3.0 dB
•
Input of 36 mV Produces 3.0 V(p-pl Output
•
High Video Output - 6.0 V(p-pl
•
Fully Balanced Detector
(top view)
• Separate Sou nd Detector
PLASTIC PACKAGE
CASE 646
• Differential Inputs
FIGURE 2 - TYPICAL APPLICATION CIRCUIT
Vee'" +12 Vdc
FIGURE 1 - OUTPUT VOLTAGE
8.0
,_,
~
~
"C
~
w
'"«"
0-
-'
6. 0
Ie = 45 MHz
~
(nOnjOdulated)
~~
"""'
"~
10Vdc- F'"
~
4. 0
0
>
...
00-
r-
'00
~ k'12VdC
~ ~b
2. 0
~
0
o
o
O.Ol.'o1F
V16Vdc
:::J
:::J
r
10
20
30
40
50
60
70
80
90
100
INPUT VOLTAGE (mVIRMSI)
'0 k
°0 = 15·20
L 1 = COlh::raft unlcoil or T form, 7Ya turns of
AWG 1122, cora·3/8 Inch e.
L2 = Coilcraft T·form, 36 2/3 turns of AWG
#30, cora·y. inch #33 material.
See Packaging Information Section for outline dimensions.
8-59
15 k
MC1331P (continued)
MAXIMUM RATINGS ITA = +2s"C unless otherwise noted.)
Unit
Value
Rating
Power Supply Voltage
16
Vdc
SuppiV Current
30
mAde
Input Voltage
2.0
VIRMS)
750
6.7
mW
mW/oC
0 to +75
°c
uc
i
: Power Dissipation IPackage Limitation)
Plastic Package
Derate above T A = +25 0 C
Operating Temperature Range IAmbient)
-65 to +150
Storage Temperature Range
ELECTRICAL CHARACTERISTICS IVee = +12 Vdc,
Characteristic
Q
= 20, fC = 45 MHz, T A = +25 0 C unless otherwise noted.)
Pin
Unit
Min
Typ
Max
16
Vdc
mA
Supply Voltage Range
12
10
12
Supply Current
12
-
25
-
Zero Signal de Output Voltage
5
6.4
7.0
7.6
Vdc
Maximum de Current
5
-
5.0
-
mA
Maximum Signal de Output Voltage
Input Signal Voltage for 3.0 Vlp-p) Video Output
190% modulation from HP608E)
5
13,14
,;
..
-
0
-
Vdc
-
36
-
mVIRMS)
Vlp-p)
Maximum Output Voltage Swing
5
-
6.0
-
Carrier Rejection at Output
5
-
20
-
dB
3.0 dB Bandwidth of Video Ou tput
5
-
6_5
-
MHz
13,14
Input Resistance
Input Capacitance
Internal Resistance
}
(across tuned circuit)
6,7
I nternal Capacitance
-
3.0
-
3.0
-
5.0
-
3.0
-
kf!
pF
kf!
pF
OJtput Resistance
5
-
100
-
f!
AFT Buffer Output Voltage at Carrier Frequency
8
-
100
-
mVlp-p)
Imeasured with 1"0 times probe)
AFT Buffer de Voltage Level
8
-
12
-
Vdc
Sound Detector Gain
9
-
16
-
dB
-
Vlp-p)
11.0 mVIRMS), 41.25 MHz input to pin 11)
Sound Detector Output Resistance
9
-
100
Positive Video Output Swing Voltage
4
-
8.0
Sync Output Amplitude Voltage
2
-
11
8-60
f!
Vlp-p)
~f
MC1339P
')
STEREO PREAMPLIFIER
'---------
DUAL LOW-NOISE
STEREO PREAMPLIFIER
MONOLITHIC DUAL STEREO PREAMPLIFIER
MONOLITHIC
SILICON EPITAXIAL PASSIVATED
INTEGRATED CIRCUIT
· .. designed for low noise preamplification of stereo audio signals.
•
Low Audio Noise
•
High Channel Separation
•
Single Power Supply
•
High I nput Impedance
•
Built-In Power Supply Filter
•
Emitter Follower Output
MAXIMUM RATINGS ITA
~
•
+25 0 C unless otherwise noted)
Rating
Value
Unit
Power Supply Voltage
+16
Vdc
Power Dissipation (Package Limitation)
IDerate abOlle TA = +25 0 C)
625
5.0
mW
mW/oC
Operating Temperature Range
-40 to +85
Storage Temperature Range
-65 to +150
PLASTIC PACKAGE
CASE 646
°c
°c
CIRCUIT SCHEMATIC
CONNECTION DIAGRAM
POWE R SU PPL Y
FILTER
VCC
+7.5V
ZENER
2
ZENER
UTILITY
POWER
ROLL. 4
OFF 1
10
7
INPUT 1
6
INPUT
RETURN 1
J
FEEDBACK
1
OUTPUT
2
FEEDBACK
2
ROLL-OFF I
ROLl·OFF
2
OUTPUT 1
OUTPUT 2
INPUT
I
2400
GNO
See Packaging I nformation Section for out[ ine dimensions.
8-61
RGLTR
GNO
FEEDBACK I
INPUT
RETURN
I
2400
AMPl
GNO
INPUT
RETURN
2
INPUT
2
I
MC1339P (continued)
ELECTRICAL CHARACTERISTICS (Each Preamplifier) (VCC = +12 Vdc TA
= +25 0 C unless otherwise noted )
Typ
Max
Unit
17.5
22
mA
63
66
71
dB
Gain Balance
-
0.3
2.0
dB
Channel Separation (f = 1.0 kHz) See Figure I, SI in position 1.
45
70
Input Resistance
100
250
-
kilohms
1.5
1.0
-
V(RMS)
Output Resistance
-
100
-
ohms
Power Supply Rejection (f = 1.0 kHz) See Figure 2
-
33
-
dB
Total Harmonic Distortion without Feedback
(0.5 V(RMS) into a 3.Q.kilohm load, 1.0 kHz)
-
1.2
-
Min
Characteristic
Power Supply Current
-
Voltage Gain
dB
Signal Output Voltage
No load
3.Q.kilohm load
%
I nput Bias de Current
-
0.8
-
Gain to Feedback Terminals (pins 3 and 12)
-
45
-
dB
Impedance at Feedback Terminals
-
2400
-
ohms
Equivalent I nput Noise Voltage (100 Hz to 10 kHz) See Figure I,
SI in position 2.
-
0.7
3.0
"V(RMS)
"A
TEST CIRCUITS
FIGURE 1 - CHANNEL SEPARATION AND
AUDIO NOISE
FIGURE 2 - POWER SUPPLY REJECTION
Vee
f
r-l-l
l'O~
'V
.".
.
I
Sl
100~F
680
>-+o--_VOI
J:
680
>-4-.0--_ VOl
JO.001~F
JO.001~F
>+o--..... V02
680
SEPARATION· V01IV02
8-62
>-4-0--..... V02
MC1339P (continued)
APPLICATIONS INFORMATION
The circuit diagrams shown in this section are examples of applications for the MCI339P. Included are circuits for a broadband
preamplifier with tape playback and record amplifiers, and a phono
preampl ifier.
FIGURE 5 - TAPE PLAYBACK PREAMPLIFIER
Broadband Ampl ifiers
The MC1339P is useful as a broadband amplifier in applications
requiring a low-signal level low-noise amplifier. The circuit in Figure 3 fills these requirements with a voltage gain of 40 dB and an
OUTPUT
TAPE.HEAD"
10 k
input impedance of 10k ilohms.
r'
CI
FIGURE 3 - BROADBAND AMPLIFIER
0.33jtF
INPUT --lr----<>-....- .. OUTPUT
10 k
0.027 jtF
~
CF
Rl
3.0k
RF
100
-::-
The lower -3.0 dB corner frequency (fl) is determined by the
value for capacitor C1 in accordance with equation 1.
IOk+ 100
Av=---wo-
~
I
Cl
RL = 3 k
'OOjtF
A3
27Tz3fl
(1)
where z3 is the impedance at pin 3 (2.4 kilohms) and A3 is the
amplifier gain at pin 3 (178l.
10 k
100
=
100
The minimum high-frequency gain (5 dB below reference gain of
33dB) oftheamplifierisdetermined by the ratio of Rl + RF while
Rl
the value of capacitor CF provides the bass boost corner frequency
in accordance with equation 2.
Figure 4 shows the response of the broadband amplifier with two
different values of compensation capacitors, Ct. Other capacitor
values can be used; however, as the phase margin is reduced a
CF= _ _
I_
27T RFf2
greater possibility of oscillation exists.
(2)
Based on measurements made on the amplifier (See Figure 5), the
FIGURE 4 - BROADBAND AMPLIFIER RESPONSE
value of C2 is chosen for a phase margi n greater than th irty degrees.
The nearest 10% tolerance component values were used in the
circuit of Figure 5.
70
11111111
60
50
~j ~~~oll
~ 40
11111111
FIGURE 6 - FREQUENCY RESPONSE FOR TAPE PLAYBACK
PREAMPLIFIER (TAPE SPEED 1 7/B OR 33/4 IN/S)
60
z
~ 30
CI=IJ!i
I I I I IIIIIIJ
Phase Margin Cl = 1000 pF-45 0
V
20
5
iTWiiil{r=r nrlrri
10
10
40 100
1111111111
400 1.0 k
4.0 k 10 k
11111111
40kl00k
"-
z
;;:
to
o
""-
0
i'
0
~
400kl.0M
r-
FREUUENCY 1Hz)
30
Tape Playback Preamplifier
20
A low-noise, high-gain preampl ifier to properly process the low-level
40
70100
200
output of the magnetic tape-heads is shown in Figure 5 illustrating
400
7001.0k 2.0k
4.0k 7.0k10k20k
FREUUENCY 1Hz)
a tape-head preamplifier using the MC1339P.
To faithfully reproduce recorded music from magnetic tape, special
Tape Record Preamplifier
frequency compensation is required to provide the NAB standard
The frequency response of a tape recording preamplifier must be
tape playback equalization characteristics, see the response curves
shown in Figure 6. The circuit shown in Figure 5 is designed to pro·
the mirror image of the NAB playback equalization characteristic,
so that the composite record and playback response is flat. Figure
7 shows the record characteristic superimposed on the NAB play·
back response and Figure 8 illustrates the output characteristic of
vide an output of 100 millivolts with an input signal of 2.2 millivolts
at a frequency of 1.0 kHz. (Reference gain is 33 dB).
8·63
MC1339P (continued)
APPLICATIONS INFORMATION (continuedl
a typical laminated core tape head.
Figure 9 shows the
necessary amplifier response characteristic to make a composite
signal 01 Figures 8 and 9 that will meet the proper NAB recording
characteristic 01 Figure 7.
FIGURE 10 - TAPE RECORD PREAMPLIFIER
0.33~F
R4
INPUT--If-_--<~
33 k
CI
10 k
12 MCI339P'>---<>-.....-JV\fV--j
FIGURE 7 - NAB TAPE EQUALIZATION CHARACTERISTIC
CURVES
+25
llii~15~I~Z
+20
i'-
~+5.0
z
;;:
'" -5.0
.p
~
f2=
-R-r
I 1111
-20
-25
20
II
40
i r3 HJ, ~, :i/~ in/5-
1710H~~ i"".:: ~,
RECORD
-15
REFERENCE
1AIN( fTrdB
"'
/
I-"
-10
",-,
200
400
The circuit shown in Figure 10 will give the preamplifier response
as presented in Figure 9.
,....
n
I 70011111.0 k f3t2.0 k31 834.0 k 7.07 1/2klOinlsk
1
70 100
20 k
FREQUENCY 1Hz)
+5.0
~
-10
~ -15
z
;;:
~\2 in~s
.I '\
,
"P'
33/40,17/8
V
in~~
-20
(31
1
C3 = 2" f2 R2
141
At high Irequencies the feedback impedance. zf is R 1 in parallel
with R2 and at low frequencies is R2. Again, capacitor Cl is
chosen by equation 1 to give the desired low frequency breakpoint,
f1. As an example, consider a recording head requiring 30 #J,A is
used with a microphone with a 10-mV output. The 40-#J,A current
sourc~
1\
V
'" -25
The gain is established by the equation
I
R3 + ZI
R2 IR 1 + 2" I C3 1
GAIN = - - - where zl =
zf
R2+IR'+_'_)
2"f C3
The high corner frequency, 12, is determined by equation 4.
FIGURE B - TYPICAL TAPE HEAO OUTPUT
CHARACTERISTICS (constant Iluxl
-5.0
R3
15 k
'"""
~V:
PLAYBACK'
+10
-
,
+15
/
-30
is simulated by a 1.0 VIRMSI output driving a 33·kilohm
resis'tor, R4, at the relerence frequency of 1.0 kHz. The gain
requirement is therefore 100 or 40 dB. The low·frequency gain is
calculated by letting R2 = 100 ohms and calculating the value of
R3 for frequencies below f2.
-3 5
R2 + R3
V
-40
Av=~
= 125
R3= 1241R2) "'" 12kn.
(51
-45
20
40
70100
200
400
7001.0k 2.0k
4.Ok 7.0k10k 20k
FREQUENCY 1Hz)
FIGURE 9 - TAPE RECORD AMPLIFIER RESPONSE
5
0
5
/
0
The typical response for a quarter-track 13% in/sl tape·head is
3.0 dB down at 1770 Hz. Therefore, the high·corner Irequency
If21 of the record amplifier should be at the same frequency. Using
equation 4 the value of C3 is calculated to be 1.0 "F. Resistor
Rl is not needed to roll·olf the high·frequency gain at frequencies
above 20 kHz since. the limited open·loop gain of the MC1339P
accomplishes the same thing. The parallel LC circuit at the ampli·
fier output is used to trap the bias oscillator signal and is tuned to
that frequency.
Phonograph ic Preamplifier
Crystal and ceramic phono-cartridges seldom require a preamplifier
5
TAPE SPEED
0
33/4inJs
Dr I 1IBin/s
5
0
20
A 15-kilohm resistor is used to achieve the gain necessary since
the open-loop gain of the amplifier is not infinite.
40
70100
200
400
II
7001.0 k 2.0 k 4.0 k 7.0k 10k 20 k
due to high·output signal levels (lOa mV to 1.0 VI. However,
magnetic cartridges have output levels 01 from 2.0 to 12 mV and
require a preamplifier such as the MC1339P. Special equalization
of the preamplifier is necessary to make the response match the
AIAA recording characteristic which is used universally. The
amplifier shown in Figure 11 does provide the proper response
FREQUENCY (Hz)
8-64
MC1339P (continued)
APPLICATIONS INFORMATION Icontinuedl
FIGURE 11 - PHONOGRAPH PREAMPLIFIER
I
12=---
2" RI C2
MAGNETIC
CARTRIDGE
II
and 13 is calculated from
"----+-0----1
I
f3=--2" RI C3
Printed Circuit Board Layout
+ CI
Most of the circuits in the applications section can be built on
this printed circuit board layout. Printed circuit board design is
not particularly critical with the MC1339P. However, usual layout
practices such as keeping the input and output lines separated and
providing maximum ground plane area should be used. The layout
shown is for Figure 5 but it can easily be modified without any
problem for the other application circuits given.
RL
cz
'OO~I
171
3k
C3
100
8200 pF
FIGURE 12 - FREQUENCY RESPONSE
FIGURE 13 - PRINTED CIRCUIT BOARD
(copper side shown)
OF PHONO-PREAMPLIFIER
(compensated for RIAA Equalization)
+30
f\ ~151~ Hz
+20
- i"~...,
+10
~
~~
If2 1= 110111
z
<
'"
f3=2120Hz
-10
Illllll
RrT'i In il k7 dj
-20
101
4,
"
-30
-40
11111
20
40
70100
200
400
70010 k 2.0 k
4.0 k 7.0 k 10 k 20 k
FREQUENCY IHzl
for RIAA equalization. Figure 12 illustrates the RIAA response
of the amplifier in Figure 11.
The dashed line shows the
ideal response with the corner frequencies indicated. The lower
IN
corner frequency (f1) is determined by the input capacitance C1
and the equation
Af
f1=---
2" C1 z3
1-1....- - - - - - - 23/ 4" _IN_P_UT
_ _ _ _ _ _.."'I
161
where Af is the feedback gain of 45 dB and z3 equals the terminal
resistance at pin 3.
The corner frequency 12 is determined by
8-65
I
~~____________T_V__SI_G_N_A_L_P_R_O_C_E_SS
__O_R~
MC1344P
Product Previe""
TV SIGNAL
PROCESSOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
TV SIGNAL PROCESSOR
· .. a monolithic TV circuit with sync separator, advanced noise
inversion, AGC comparator, and versatile RF AGC delay amplifier
for use in color or monochrome TV receivers.
•
Video Internally Delayed for Total Noise Inversion
•
Low I mpedance, Noise Cancelled Sync Output
•
•
•
•
•
Refined AGC Gate
Small IF AGC Output Change During R F AGC Interval
Positive and Negative Going R F AGC Outputs
Noise Threshold May Be Externally Adjusted
Time Constants for Sync Separator Externally Chosen
•
Stabilized for ± 10% Supply Variations
PLASTIC PACKAGE
CASE 646
FIGURE 1 - TYPICAL MC1344 APPLICATION CIRCUIT
0.002 ~F
J
O.OOl"F
IF IN PUT
FA OM
TUN ER
470
220
43
2~ h
,
69
.-- 0.002
f: ,.F
7
0.002
"
'~
22k
L--
Rf
AGe
4r-
MC1330
r-
3-eB2
-
T1
---
PRIMARY VIDEO
SOUND OUTPUT
~J
~AND
;G'cl7r~J q LfA--fr P1,.'4
TURNS~
AFT OUTPUT
3.9
TURNS
-
All windings #30 AWG tinned nylon acetale
wire luned with high permeability cores .
Complete transformer is available trom
1
Coilcraft, Type R4786.
_-IS
330k
r
+18 Vdc
18'
4.7k
KEYING lNPUT
-lOY PULSE
0.05
"
t=:
I
MC1344P
~.J14
TO TUNER
,fo.o
4.7k
Ol
./-IF
':00
10 9 8 r 5
2.2k
6?7b,F
oo~
20k
.
.
50 1l F,J
SYNC OUTPUT
1413 1211
"
5
l'
L1
O.l/AF
O.l/A F
,
C2
VID:~T:f\:]
AUXILIARY
OUTPUT
10V
'1
'--J.~
"='
IF
AGC
22
T1
3.3k
68pF
~~
MC13tiD
'.2
iO.",
0.002,'±
50
5
+18 Vdc
L1 wound with #26 AWG tinned nylon
acetate wire tuned bV distorting winding.
Cl
C2
C3
11
RF AGe
OELAY
2,'
4.7k
See Packaging Information Section for outline dimensions.
8-66
R1
39MHl
45 MHl
24pF
18pF
33pF
15pF
12pF
33pF
12
I 58 MHz
10pF
lOpF
18pF
10 Turns
Turns
Select
MC1344P (continued)
MAXIMUM RATINGS (T A
=
+25 0 C unless otherwise noted.)
Rating
Value
Unit
Power Supply Voltage (Pin 111
+22
Vdc
Video Input Voltage (Pin 1)
+10
Vdc
Negative RF AGC Supply Voltage (Pin 3)
-10
Vdc
Gating Voltage (Pin 9)
15
Vp-p
Sync Separator Drive Voltage (Pin 12)
7.0
Vp-p
Power Dissipation (Package Limitation)
Plastic Package
Derate above T A = +25 0 C
625
5.0
mW
mW/oC
o to +70
°c
°c
Operating Temperature Range (Ambient)
Storage Temperature Range
-55 to +150
ELECTRICAL CHARACTERISTICS (VCC
= +18 Vdc, TA = +25 0 C unless otherwise noted.)
Characteristic
Min
Typ
Max
3.4
-
3.9
4.2
Vdc
-
1.0
mV/oC
Sync Output Amplitude
-
16
Sync Output Impedance
-
-
100
Ohms
Vdc
Sync Tip dc Level of Input Signal
Temperature Coefficient of Sync Tip (Input)
Sync Tip to Noise Threshold Separation (Input)
Unit
-
Vp-p
0.45
0.7
0.95
IF AGC Voltage Change During RF Interval
-
0.10
0.5
Vdc
Peak AGC Charge Current
-
15
-
mAde
Peak AGC Discharge Current
IF AGC Voltage Range
Positive R F AGC Voltage Range
Positive RF AGe Minimum Voltage
Negative RF AGC Voltage Range
Negative RF AGe Maximum Voltage
Total Supply Current, IS (Circuit of Figure 1)
NORMAL SYNC
SEPARATION NETWORK
-
0.9
-
mAdc
9.0
-
-
Vdc
-
10
-
Vdc
0.5
1.5
2.0
Vdc
-
10
-
Vdc
9.5
10.2
-
22
12
-
mAde
Vdc
TEST CIRCUIT FOR AGC
AMPLIFIER MEASUREMENTS
NEGATIVE
RF AGC
4.7 k
"
"
3.3 k
1
J
0.1 pF
I/'
"
+IB Vdc
270
13
MC1344P
4.7 k
POSITIVE
RF AGC
12
270 k
IF AGC
~+IBVdc
4.7k
RF DELAY
~--------------~~---,
20 k
8-67
MC1344P (continued)
MC1349P
~~___________________I_F_A_M__PL_I_F_IE_R__~
IF AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
MONOLITHIC IF AMPLIFIER
· .. an integrated circuit featuring wide range AGC for use as an
I F amplifier in radio and television applications over the temperature
range 0 to +7 OOC.
•
Power Gain - 60 dB typ
- 56 dB typ
- 61 dB typ
59 dB typ
at 45
at 58
at 45
at 58
MHz
MHz
MHz
MHz
(pin
(pin
(pin
(pin
•
AGe Range - 80 dB typ, dc to 45 MHz
•
High Output Impedance
•
Low Reverse Transfer Admittance
3 open)
3 open)
3 bypassed)
3 bypassed)
8
O
(top view)
o
•
15· Volt Operation, Single·Polarity Power Supply
•
Improved Noise Figure versus AGe
PLASTIC PACKAGE
CASE 626
FIGURE 1 - TYPICAL APPLICATION OF MC1349P VIDEO IF AMPLIFIER
and MC1330 LOW·LEVEL VIDEO DETECTOR CIRCUIT
180
120
+18 Vdc
VIO~~ -A --]
1.8k
AUXILIARY
OUTPUT
V[
+------... 14 V
".J Ivvw
-
-
--
PRIMARY VIDEO
AND SOUN~ OUTPUT
MC1349P
MC1330
39kurv]
56 pF
0.002
~--i-.AFT OUTPUT
0.002
3.9k
5.1k
AGC
o: .. ~}~'.J
Dl
2
''''..._
__
TURNS""'"
3
TURNS
#10
All windings #22 AWG tinned nylon
L1 wound with ~26 AWG tinned nylon
acetate wire tuned with Coilcraft #61
aefltate wire tuned by distorting winding.
slugs, size 10·32, or equivalent.
*See Note 1 {page 3L and C4, Parts List (page 4) of this specification.
See Packaging Information Section for outline dimensions.
8-69
MC1349P (continued)
MAXIMUM RATINGS
(T A
= +25"<: unless otherwise noted).
Auing
Value
Unit
PawerSupply Voltage (VCC1)
+18
Vdc
Output Supply Voltage (VCC2)
+18
Vdc
~ VCCl (pin 2)
Vdc
Differential Input Voltage
5.0
Vdc
Power Dissipation (Package Limitation)
Plastic Package
Derate above T A = +250 C
625
5.0
mW
mWflC
AGC Supply Voltage
Ota +70
uc
-65 to +150
vC
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS
(VCCl
='+12 Vdc
[pin 2J, VCC2
Characteristic
AGC Range, 45 MHz (5.0 V to 7.5 V) (Figure 3)
= +15
Vdc [pins 1 and 8J, TA
= +25 0 C unless otherwise noted,)
Min
Typ
Max
Unit
70
80
-
dB
52
60
61
56
59
-
dB
Power Gain (Pin 5 grounded via 5.1 kn resistor, input pin 4)
1= 45 MHz, BW (3 dB) = 4.5 MHz, Tuned Input, pin 3 open
Untuned I nput, pin 3 bypassed
1= 58 MHz, BO (3 dB) = 4.5 MHz, Tuned Input, pin 3 open
Untuned Input, pin 3 bypassed
-
-
Maximum Dillerential Output Voltage Swing
6.0
-
Vp·p
Output Stage Current (pins 1 and 8)
9.0
Amplilier Current (pin 2)
15
20
mAde
Power Dissipation
315
400
mW
Noise Figure
1= 45 MHz, Tuned I nput, pin 3 open, Gain Reduction
8.5
DESIGN PARAMETERS
(VCCI
= +12
mA
dB
= 15 dB
Vdc, [pin 2J, VCC2
= +15
Vdc, [pins 1 and 8], TA
= +25 0 C unless otherwise noted.)
Frequency
Parameter
Single·Ended Input Admittance, input pin 4, AGC min
Pin 3 open
Pin 3 open
Pin 3 bypassed
Pin 3 bypassed
Symbol
45 MHz
58 MHz
Unit
mmhos
gIl
bll
gIl
bll
0.74
1.9
4.1
6.5
0.95
2.4
5.4
6.9
g22
b22
5.5
270
8.3
360
1.5
2.0
/Jmhos
520
100
1020
120
400
130
800
400
mmhos
degrees
mmhos
degrees
Single·Ended Input Capacitance, AGC min
Pin 3 open
Pi n 3 bypassed
6.8
2.3
6.7
20
Differential Output Capacitance (AGC max)
1.0
1.0
Diflerential Output Admittance, AGC max
/Jmhos
Reverse Transfer Admittance (magnitude)
Forward Transfer Admittance
Magnitude, pin 3 open
Angle (0 dB AGC), pin 3 open
Magnitude, pin 3 bypassed
Angle (0 dB AGC), pin 3 bypassed
pF
8-70
pF
MC1349P (continued)
FIGURE 2 - CIRCUIT SCHEMATIC
.". J
900
900
2
(+)
~~
2.72 k
5
IN PUT
"~>~>{
3
-)
V
4
40
2 k
650
2.32 k
600
'--J
2.8 k
~
""
~
100
1~
650
)J
L
~
180
180
rr-
2.8 k
100
6.2 k
3.74 k
2 k
(-)
t-...
12 k
INP UTS
6
8
OUTP UTS
4.2 k
t-...
360
,
( +)
7
GND
and for low frequencies, (as shown in the test circuits). This is
due to the dual function of the input amplifier. If replacing MC1350P take precaution not to ground pin 3, (not used in the
MC1350P). Due to the significantly higher gain of the MC1349P,
extra care in layout should be exercised.
GENERAL INFORMATION
The MC1349P is an improved version of the MC1350P. Featuring higher gain, a lower noise figure, and greater AGe range;
in addition, an emitter of the input amplifier is available for by·
passing. This provides a low input impedance with good gain,
useful for untuned input configurations.
Both input and output I F amplifier sections are gain-controlled
in the MC1349P, with the input amplifier also serving as an AGC
amplifier for the output section. During the initial part of AGe
gain reduction, the gain of the input amplifier decreases only a
few dB while the output section decreases 15 dB; further AGC
acts upon the input section. Although the gain reduction curve
was taken with 5.1 kilohms at pin 5. higher series resistance can
be used to reduce the voltage and temperature sensitivity of the
AGe. Pin 5 currents are shown on the AGe curve, see Figure 10.
I n use, it is important to bypass pin 2, both for I F frequencies
NOTE 1: The references to bypasses at pin 3 do not give specific
values (C4, see Figures 1 and 4). In all cases, measurements were taken with a bypass at a standard value as
near as possible to series resonance. The values are dependent on test frequency and circuit layout. FuliV
bypassing pin 3 reduces the input signal handling capability before distortion from over 100 mVIRMS) to
approximately 25 mV(RMS). C4 ~ 0.002 IlF at f ~ 45
MHz is a typical value for printed circuit applications.
8-71
MC1349P (continued)
TEST CIRCUITS
FIGURE 3- TUNED INPUT
(PIN 3 OPEN)
INPUT
Rs: 50
n
,I
Cl
Ll
C2
I
L
FIGURE 4 - UNTUNED INPUT
(PIN 3 BYPASSED TO GROUNDI
VCCl
VCC2
+15 V
INPUT
AS: 50
r
Cp
n
C4
50
5.1 k
Cp
VAGC
PARTS LIST
COMPONENT
45 MHz
58 MHz
Cl
C2
C3
C4
Cp
Ll
Lp
8·60 pF
3·35 pF
1·7.0 pF
82·470 pF
0.0015,uF
0.84,uH
10l'H
50·100 pF
3·35 pF
1·7.0 pF
82·470 pF
O.OOI,uF
0.33,uH
10,uH
T1
8-72
Primary
Secondary
14 turns center-tapped
2Y2 turns (45 MHz tuned input
pin #3 open) 1 Yz turns (all
other fixtures) wound over
primary
Wire:
#.26 AWG tinned nylon acetate wound
on 1/4" diameter coil form
Core:
Arnold Type TH, 1/2" long 6r equivalent.
MC1349P (continued)
TYPICAL CHARACTERISTICS
FIGURE 6 - SINGLE-ENDED INPUT ADMITTANCE
(PIN 3 BYPASSED TO GROUND)
FIGURE 5 - SINGLE-ENDED INPUT ADMITTANCE
(PIN 3 OPEN)
0
5.0
9. 0
S
E
4.0
g
'"
bl1 minAGC
3.0
bl1 maxlAGC'T \
I-I--
iii
co
'"
\l~ V
l/
~
1.0
~ ;;;.-
....-
l
l.-.---- ~ i--'"
gi 1 m' A:&:
-r-
.......
6.0
~
5.0
'"
4.0
3. 0 . /
-' 2.0
1.0
10
20
30
fREQUENCY (MHz)
70
50
----.:::: t:-<
......::
1600
=----......
20
I
I
t
I
911r'" ax GC , -
30
fREQUENCY (MHz)
50
70
100
0.7
~"
~z
0",
~ 0.0 5
~
-IV21IA
t::o
'"
400
20
I--
Q
~oo
I"~ -200
30
fREQUENCY (MHz)
50
70
../
=>
~ 0.0 2
,~ ~ r--. \
.....
-A=pin30pen
B = pin 3 bypassed to ground
10
8 0.03
~ .......
1__
0
10
100
1
16
1
1
58 MHz RS" 70ol1_
14
i---..
/
j
12
58 MHz RS" 50 l1 :;;.
w
'"z
;:; 10
V l'i
k
8.0
r-:::
~
6.0
k:. b7
~
-30
.........
V
0.2 ~
N-
0.1
o
50
70
100
~ -40
45 MHz RS" 50n
~ -50
:0'
C!l
1\
'\
+0.1 rnA
-60
-70
40
-80
4.0
50
8-73
I'\.
\
t;
~ P'
20
30
GAIN REQUCTION (dB)
g22
\
OmA
45 MHz RS" 1.1 kl1
10
~
,./
-
""'\
4.5
5.0
5.5
6.0
6.5
VAGC (V de}
~'"
7 0.3 ~
rnA""'\.
~ -20
4.0
o
0
.4
V
30
fREQUENCY (MHzI
'AGe = -0.1
-10
V.-1 fi"-
V .J?-,"/
~
E
E
FIGURE 10 - GAIN REDUCTION
~PINI3
OPEJ
1
1
18 t- ---PIN 3 BYPASSED TQ GRQUNO
----20
FIGURE 9 - NOISE FIGURE
20
/
b2y
Q
i"-.."" .........
0.6S
0.5 ~
~ 0.0 4
~
.........
~.;;
/
~ 0.0 6
'" "'''''
i ~ 1200
0;;;
'"
u:
--
V
:.- ~ ~
./
V ./ V
f.-" A f'\ g11 minAGC
FIGURE 8 - DIFFERENTIAL OUTPUT ADMITTANCE
(MAXIMUM AGC'
/LV21B
-IV211B
~~
=>
/
V21 A
./ L
w
~ -t7
~
0.0 7
2000
~
---
10
100
FIGURE 7 - SINGLE-ENDED FORWARD
TRANSFER ADMITTANCE
,.«
/
V ....
V
V
o
o
~ ~
b11maxAGk
~
I--
~
7. 0
"
:i
~
?f':' gl1 min AGC
2.0
I--
ii:
-->-
w
1.1
1 blll mmAG\
1
E
g
VI
w
"z
~ 8. 0
/
r-.....
7.0
+0.2 rnA
7.5
8.0
~
~f
~~_____________S_O_U_N_D__IF__A_M_P_L_IF_I_E_R~
MC1350P
MONOLITHIC IF AMPLIFIER
IF AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
... an integrated circuit featuring wide range AGC for use as an IF
amplifier in radio and TV over the temperature range 0 to +75 0 C.
The MC1352 is similar in design but has a keyed·AGC amplifier as an
integral part of the same chip.
8
O
• Power Gain - 50 dB typ at 45 MHz,
- 48 dB typ at 58 MHz
(top view)
o
• AGC Range _. 60 dB min, dc to 45 MHz
• Nearly Constant Input and Output Admittance Over the Entire
AGC Range
• Y21 Constant (-3.0 dB) to 90 MHz
-«
•
Low Reverse Transfer Admittance
•
12· Volt Operation, Single·Polarity Power Supply
1.0 J..(mho typ
PLASTIC PACKAGE
CASE 626
FIGURE 1 - TYPICAL MC1350 VIDEO IF AMPLIFIER
and MC1330 LOW·LEVEL VIDEO DETECTOR CIRCUIT
110
+18 Vdc
3.3 k
VIO~80
AUXILIARY
OUTPUT
V[
~----------~10V
-A --]
"..J Ivvw
--~-
PRIMARY VIDEO
AND SOUND OUTPUT
MC1350
3.9
p-----l--.. AFT 0 UTPUT
0.002 0.001
5k
AGe
39k7.7IV]
MC1330
CJ~[]J
·5~6····LI'
TURNS~
TURNS
All windings *30 AWG tinned nylon
acetate wire tuned with Arnold Type
TH slugs.
See Packaging Information Section for outline dimensions.
8-74
4
k
3"
r 1J
i6
ML.1:'
TURNS
16
L 1 wound with #26 AWG tinned nylon
acetate wire tuned by distorting winding.
MC1350P (continued)
MAXIMUM RATINGS ITA = +250 C unless otherwise noted)
Rating
Symbol
Value
Unit
Power Supply Voltage
v+
+18
Vdc
Output Supply Voltage
VI, V8
+18
Vdc
AGC Supply Voltage
VAGC
v+
Vdc
Differential Input Voltage
Vin
5.0
Vdc
Power Dissipation (Package Limitation)
Plastic Peckage
Derate above 250 C
Po
625
5.0
mW
mWfOC
Operating Temperature Range
TA
Ote +75
°c
ELECTRICAL CHARACTERISTICS IV+ = +12 Vdc; TA = +25 0 C unless otherwise noted)
Characteristic
Symbol
AGC Range, 45 MHz (5.0 V to 7.0 V) (Figure 1)
Power Gain (Pin 5 grounded via a 5.1 kSl resistorl
f = 58 MHz, BW = 4.5 MHz
See Figure 5
f = 45 MHz, BW = 4.5 MHz
f = 10.7 MHz, 8W = 350 kHz
See Figure 6
f = 455 kHz, BW = 20 kHz
Ap
Maximum Differential Voltage Swing
OdBAGC
-30 dB AGC
Vo
l
l
Max
Unit
68
-
dB
46
48
50
58
62
-
-
20
8.0
-
-
5.6
-
'1 + 18
Totel Supply Current (Pins I, 2 and 8)
IS
Power Dissipation
Po
=
Typ
60
-
Output Stege Current (Pins 1 and 8)
DESIGN PARAMETERS Typical Values (V+
Min
-
dB
-
Vp-p
mA
14
17
mAde
168
204
mW
+12 Vdc, T A = +25 0 C unless otherwise noted)
Frequency
Paramater
Symbol
Single·Ended Input Admittance
Input Admittance Variations with AGe
(0 to 60dBI
Differential Output Admittance
10.7 MHz
455 kHz
45 MHz
58 MHz
Unit
mmhos
9jl
bll
0.31
0.022
0.36
0.50
0.39
2.30
0.5
2.75
...
0
40
0:
Z
"
to
FIGURE 3 - NOISE FIGURE
(Figure 5)
~
0
..,;::
60
'"
...'"
4.0
6.0
5.0
22
20
lB
J
::>
to
...u::
~
;:;
'"
z
16
14
7.0
VAGC (V)
.-?'
12
10
B.O
6.0
L L
~
5BMH,#'r'
~
0:
IAGC ',0.2 m;:"'"
BO
-
~
45MHz
.//
~
~
o
'"
10
20
GAIN REDUCTION (dB)
8-75
30
40
MC1350P (continued)
GENERAL OPERATING INFORMATION
FIGURE 4 - CIRCUIT SCHEMATIC
AGe AMPLIFIER SECTION
The input amplifiers (01 and 02) operate at constant emitter
currents so thet input impedance remains independent of AGC
action. Input signals may be applied single-anded or differentially
(for ac) with identical results. Tarminals 4 and 6 may ba driven
from a transformer, but a dc path from either terminal to ground
is not permitted.
AGC action occurs as a result of an Incraasing voltage on the
base of 04 and as causing thasa transistors to conduct more
heavily thereby shunting signal current from the interstage amplifiers 03 and 06. The output amplifiers ara supplied from an active
current source to maintain constant quiescent bias thereby holding
output admittance nearly constant. Coli actor voltage for the output amplifier must be supplied through a center-tapped tuning
coli to Pins 1 and S. The 12-volt supply (V+) at Pin 2 may be used
for this purpose, but output admittance remains more nearly constant if a separate 15-volt supply (V++) is used, because the base
voltage on the output amplifier varias with AGC bias.
FIGURE 5 - POWER GAIN, AGC and NOISE FIGURE TEST CIRCUIT
(45 MHz and 58 MHz)
FIGURE 6 - POWER GAIN and AGC TEST CIRCUIT
(455 kHz and 10.7 MHz)
Input
RS = 50n
-=
O.OOI.F O.OOI.F
"Connect to ground for maximum power gain test.
All power-supply chokes (Lp), are self·resonate at
input frequency. lp ~ 20 kn
See Figure 10 tor frequency response curve.
Note 1. Primary: 120 "H (center-tapped)
au = 140 at 455 kHz
Primary: Secondary turns ratio,., 13
Note 2. Primary: 6.0 "H
Primary winding = 24 turns #36 AWG (close-wound on
114" dia. form)
Core = Arnold Type TH or equiv.
Secondary winding = 1-1/2 turns #36 AWG, 1/4" dia.
(wound over center-tap)
II @45MHz= 11/4 Turns on a 114" coil form.
@58MHz= 6 Turns on a 1/4" coil form
T1 Primary Winding = 18 Turnson a 1/4" coil form, center-tapped
Secondary Winding = 2 Turns centered over Primary Winding@45MHz
=1 Turn@58MHz
Slug = Arnold TH Material 1/2" Long
45MHz
Ll
Tl
Cl
C2
I
0.4pH
Q ~ 100
1.3-3.4.H I Q ~100@2pH
50-1S0pF
8 - SO pF
58
MHz~
I
0.3pH
Q ;, 100
1.2-3.8pHl Q ~100@2pH
8 - SO pF
3 - 35 pF
Frequency
Component 455 kHz
Cl
C2
C3
C4
C5
C6
C7
L1
T1
8-76
-
10.7 MHz
S0-450 pF
5.0-S0 pF
0.05"F
O.OOI"F
0.05"F
0.05"F
36 pF
O.OOI"F
0.05"F
0.05"F
il.05"F
0.05"F
4.6"H
Note 1
Note 2
MC1350P (continued)
TYPICAL CHARACTERISTICS
(v+ = 12 V. TA = +25 0 C)
FIGURE 8 - FORWARD TRANSFER ADMITTANCE
FIGURE 7 - SINGLE-ENDED INPUT ADMITTANCE
5.0
500
1/
4.0
bl1l/
IJ
400
1.0
10
-
. /V
.-""
S
~
./
V
~
"...
100
~~
30
40
50
70
2.0
1.0
100
(Sin!lle-end~d output I
3.0
5.0
v
V
~
0.4
20
50
-200
100
Jj
N
N
!----
30
FIGURE 10 - TEST CIRCUIT RESPONSE CURVE
(45 and 58 MHz)
b2b'
-
20
10
)
0.6
10
-160
FREQUENCY (MHz)
admittance exhibits
twice these values.)
0.2
-120
1 1
o
20
~
~
ffi
~
iY21 :
"...
0
~
a:
~
FIGURE 9 - DIFFERENTIAL OUTPUT ADMITTANCE
0.8
-80 ~
w
l\
£ 200
~
-40
~
300
FREQUENCY (MHz)
1.0
LY21 (-30 dB gain)
LY21 (max gain)
1/
-: 2.0
1111
III r -,==::~
--
"""
V
V
~
30
~
II
40
'\
II
100
FIGURE 11 - DIFFERENTIAL OUTPUT VOLTAGE
~
.01\
o
W
to
~
~
I--
::>
~
::>
o
~
;::
.0
'\
V++=14V
.01\ . . . . . . _I
0"
vJ
0o """"' ...... I
5.
= 12V
4.
3.
~ 2.0
a:
~
!:
o
1. 0
0
10
20
~
·r
FREQUENCY (MHz)
;::
t\..
~
_Scale: 1 MHz/cm_
./
70
50
V
l/
.......
30
40
50
60
70
80
GAIN REDUCTION (d8)
For addltlon.llnformatlon lee"A High-Performance Monolithic
IF Amplifier Incorporating Electronic Gain Control", by W. R.
Davis and J. E. Solomon, IEEE Journal on Solid State Circuits,
December 1968.
8-77
........
e
N
~
~______________SO__U_N_D_I_F_A_M_P_L_I_F_IE_R__~
MC1351
TV SOUND CIRCUIT
WIDE-BAND FM-AMPLIFIER; LIMITER, DETECTOR,
AND AUDIO AMPLIFIER INTEGRATED CIRCUIT
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
· .. designed for I F limiting, detection, audio preamplifier and driver
for the sound portion of a TV receiver.
.
•
Excellent limiting with 80IlV(rms) Input Signal typ
•
•
•
Large Output·Voltage Swing - to 3.5 V(rms) typ
High I F Voltage Gain - 65 dB typ
Zener Power·Supply Regulation Built·ln
•~
-
• Short·Circuit Protection
• A Coincidence Discriminator that Requires Only One R LC Phase
Shift Network
• Preamplifier to Drive a Single External·Transistor Class-A Audio·
Output Stage
.
PSUFFIX
PLASTIC PACKAGE
CASE 646
POSUFFIX
PLASTIC PACKAGE
CASE 647
BLOCK DIAGRAM
r- .......~---i
--,
90 0 ±6
PHASE SHIFT
'0
MULTIPLIER
LXT~A~
CIRCUIT SCHEMATIC
11o------------t*-----------~~~~--+_+_~----~----+_--_.~~_._t------~--~---o14
10
11
See Packaging Information Section for outline dimensions.
8-78
MC1351
(continued)
MAXIMUM RATI NGS (T A ; +25 0 unless otherwise noted)
Rating
Symbol
Value
Power Supply Voltage
V+
+16
Vde
Input Voltage
Vin
0.7
V(rms)
Po
1/0JA
625
5.0
mW
mW/oC
°c
°c
Unit
Power Dissipation (Package Limitation)
Plastic Packages
Derate above +250 C
Operating Temperature Range
TA
Oto +75
Storage Temperature Range
T stg
-65 to +150
ELECTRICAL CHARACTERISTICS (V+; 12 Vdc, T A; +25 0 C, f; 4.5 MHz, Deviation ;±25 kHz unless otherwise noted)
Characteristic
Input Voltage (-3.0 dB Limiting)
AM Rejection (Vin = 20 mV(rmsl, AM
30%) (See Note
11
Symbol
Min
Typ
Max
Unit
VL
-
80
160
I'\i\rmsl
-
45
-
45
-
THO
-
1.0
-
%
Volmaxl
-
3.5
-
V(rms)
0.35
0.50
0.80
-
AMR
AMR = 20 I V OFM ( f = 4.5 MHz, Deviation = ±25 kHz, OL = 24
og V OAM
f = 5.5 MHz, Deviation = ±50 kHz, OL = 30
Total Harmonic Distortion tQL = 24) (See Note 1 ~
dB
(7.5 kHz Deviation)
Maximum Undistorted Audio Output Voltage (Pin 10)ISee Note 11
(Audio Gain Adjusted Externally) 10 = 241
Recovered Audio IPin 21 (See Note 11
(f = 4.5 MHz, Deviation = ±25 kHz, 0L = 24)
(f = 5.5 MHz, Deviation = ±50 kHz, OL = 301
V(rmsl
VA
Audio Preamplifier Open Loop Gain
AVp
I F Voltage Gain
AVIF
-
25
31
mAde
300
375
mW
Rin
-
9.0
Parallel I nput Capacitance
Cin
-
6.0
VReg
-
11.6
10
-
Po
-
Nominal Zener Voltage (lZ - 5.0 mAdel
Power Dissipation (I Z - 5.0 mAdel
dB
-
Parallel I nput Resistance
Power Supply Current (I Z - 5.0 mAdel
dB
65
kn
pF
Vde
Note 1: . QL is loaded circuit Q.
FIGURE 1 - TEST CIRCUIT (V+ = +12 Vdc, T A = +25oC)
10
3300 pF
12 VReg
i
(
10
100 k
MC1351P, PO
50
1.0k
I-=
o.1 P.F
47k
L = 45-80 IlH, (Coil-Craft 01030 or oquiv.)
0= 60 nom at 2.5 MHz
Rdc = 3.8 ohms
10 k
~O.OIP.F
0.1 p.F
8-79
MC1351 (continued)
TYPICAL CHARACTERISTICS
FIGURE 3 - DETECTED AUDIO OUTPUT varsus INPUT
LEVE L @ f = 5.5 MHz, ±50 kHz DEVIATION
FIGURE 2 - DETECTED AUDIO OUTPUT versus INPUT
LEVEL @f =4.5 MHz, ±25 kHz DEVIATION
1000
1000
I
/
0
I
I
10
10
100
loOk
Vin.INPUT VOLTAGE (MV[rmsJ)
10
FIGURE 4 - DETECTOR "S" CURVE
BW = 200 kHz, Q = 24
@
10 k
FIGURE 5 - DETECTOR "S" CURVE @f=5.5MHz,
BW= 220 kHz, Q = 30
f = 4.5 MHz,
FIGURE 6 - IF VOLTAGE GAIN versus FREQUENCY
FIGURE 7 - AM REJECTION
+70
0
0
~
z
;;:
to
w
to
~
Cl
>
+60
70
°v
50
-
_
Cl
>
+50
r- r-I--
~
I"-
l-
~
+40
~ +30
0
'-
l"-
V
t;
I--"
'" +20
«
.J
«
10 k
100
1.0 k
Vin. INPUT VOLTAGE (MV[rms[)
10
a'
0
'"
«
+10
20
10
1.0
-10
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
11
12
100
f. FREQUENCY (MHz)
1.0 k
10k
Vin.INPUT VOLTAGE iltV[rms]I
8-80
100 k
MC1351 (continued)
FIGURE 8 - 4.5 MHz TYPICAL APPLICATION
v+
140 Vdc
Po:: 0.5 Wat 1.5 kHz Deviation
Po = 3.5 Wat 25 kHz Deviation
0.01 jlF
INPUT
II~
..--.j
t - - -....t - - - +240 V
lN4004 OR EaUIV
MJE340 OR EQUIV
1.0 k
"J
0.1,..,....
I
0.01
21k
.F
"">r :?F ...
I ~5
41k
k
VOLUME
CONTROL
8-81
30
Vcc -11.6
R=~
~~___________T_V__V_ID_E_O__IF__A_M_P_L_IF_I_E_R~
MC1352
MC1353
TV VIDEO IF AMPLIFIER WITH
AGC AND KEVER CIRCUIT
TV VIDEO IF AMPLIFIER WITH AGC
AND KEVER CIRCUIT
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. a monolithic I F amplifier with a complete gated wide·range AGC
system for use as the 1st and 2nd I F stages and AGC keyer and
amplifier in color or monochrome TV receivers.
•
Power Gain at 45 MHz, 52 dB typ
•
Extremely Low Reverse·Transfer Admittance
-«
P SUFFIX
1.0 ).lmho typ
•
Nearly Constant Input and Output Admittance Over AGC Range
•
Single·Polarity Power·Supply Operation
•
High·Gain Gated AGC System for Either Positive or Negative·
Going Video Signals
•
Control Signal Available for Delayed AGC of Tuner
•
Two Complementary Devices - MC1352 and MC1353Offer Opposite Tuner AGC Polarity
PLASTIC PACKAGE
CASE 646
PQ SUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - TYPICAL VIDEO IF AMPLIFIER APPLICATION
;-----~--------~------ev+
12 Vdc
RF AGC
TO TUNER
-C3
INote 21
v+
18V[~J
18 Vdc
I
3.9 k
220
2k
10V
3.3 k
-
---
3.9 k
AUXILIARY
~---'I'------'li-.. VIDEO
OUTPUT
4.7
k
MC1330
PRIMARY VIOEO
AND
SOUN~ OUTPUT
33 pF
3.9 k
FLYBACK WINDING
AFT
OUTPUT
-8.0 V PULSE
L1
3"
M-.l
~ltI
t
rvYV"\
16
10
TURNS
See Packaging Information Section for outline dimensions.
8-82
Wound with #26 AWG tinned nylon
acetate wire tuned by distorting
winding.
MC1352, MC1353(continued)
MAXIMUM RATINGS (Voltages relerenced to pin 4, ground; T A = +25 0 C unless otherwise noted)
Value
Unit
Power Supply (Pin 11)
+18
Vdc
Output Supply (Pins 7 and 8)
+18
10
Vdc
V p_p
+6.0
Vdc
Rating
Signal Input Voltage (Pin 1 or 2, other pin ae grounded)
AGe Input Voltage (Pin 6 or 10, other pin ae grounded)
Gatin'g Voltage, Pin 5
+10, -20
Vdc
625
5.0
mW
mW/oC
o to +70
°c
°c
Power Dissipation
Derate above T A = +250 C
Operating Temperature Range
-55to+150
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (V +=+ 12 V dc, V ottages re erence d
un ess at erwise note d)
to pin 4 , groun d T A=+
Min
Typ
Max
Unit
-
75
-
dB
1= 35 MHz or 45 MHz
-
52
-
1=58MHz
-
50
-
-
-
Characteristic
AGC Range
dB
Power Gain
V p _p
Maximum Differential Output Voltage Swing
o dB AGC
-
16.8
8.4
Voltage Range lor RF-AGC at Pin 12
Maximum
Minimum
-
7.0
0.2
-
-30 dB AGC
Vdc
I F Gain Change Over R F-AGC Range
-
10
-
dB
Output Stage Current (17 + 18)
-
5.7
-
mAde
Total Supply Current (17 + 18 + I,,)
-
27
31
mAde
Total Power Dissipation
-
325
370
mW
DESIGN PARAMETERS, TYPICAL VALUES (V+ = 12 Vdc, TA = +25 0 C unless otherwise noted)
Parameters
Single-Ended Input Admittance
Symbol
1=35MHz
1=45 MHz
1=58 MHz
Unit
911
0.55
2.25
0.70
2.80
1.1
3.75
mmhos
50
0
60
0
-
/-lrnhos
20
430
40
570
75
780
pmhos
3.0
80
4.0
100
-
jJmhos
"b22
IY121
«1.0
«1.0
«1.0
.u mho
Iyni
LY21
L Y21
260
-73
-52
240
-100
210
-135
-96
mmhos
degrees
b"
Input Admittance Variations with AGC (0 to 60 dB)
"911
"b"
Differential Output Admittance
922
b22
Output Admittance Variations with AGC (0 to 60 dB)
Reverse Transfer Admittance
Forward Transfer Admittance
Magnitude
Angle (Q dB AGC)
Angle (-30 dB AGC)
"922
-72
-
Single-Ended Input Capacitance
9.5
10
10.5
pF
Differential Output Capacitance
2.0
2.0
2.5
pF
8-83
MCl352, MC1353(continued)
FIGURE 2 - CIRCUIT SCHEMATIC
KEVER AND AGe AMPLIFIER
Keying Section
r--------- - ----,
I
I
(AGCStor~e Ca~.l-
I 9
- -
-cii(---:_~
(IF-AGcFiite~
- - - - - - - - - - - - - - - - - - ---,
C1K--~
:
14
I
I
I
I
I
I
I
i
RF-AGC Amplifier and
Delay Section
16 k
7.5 k
Kever
Pulse
I
5
K2
01
Sk
I
I
I
I
I
I
Connection)
•
--7M~~3;a -~
Connection) 03
100
r:
-r-H:::
6.2k
(MCI353.
I
I
6.2 k
4k
2k
K
200
K__
+-_o-__
_
RF-AGC Line
100
12
16 k
15k
10.9k
Video
I I
DC Inputs
II
I
I
I
I
I I
+,
To
Tuner
C3
-~
and Reference
I
I
I
300
I I
II
I:
300
I
_ _ _ _ _ ...lI
IF AMPLIFIER
AGe Controlled Section
,-- -- -------------..,I
Bias Section
I F Output Section
~------------,
I
II
i-------------- 1
I
L.,,-l-------------"""1r-----+-I--~---,....--~-~-+f:--""""'.....,
t I
~
I
11
IF AGC
I I
750
I
Line
I
I
470 :
,------i
I
:,
i
1
~
25k
12.1 k
I
,---4--~
I
' :
~r--O
'
1 c._ o
1
I
(
,
:
I
I
71
1.4 k
I
o~:
Ya4
I
11/,
: ;1'
I
I I
~~i:
I
V++Output
Supply Voltage
, 9
" "
~470
V+ DC Supply Voltage
40.:,r-
I
5k
:
5k
:
470
~
470
L _________________
4.2 k
:
.1
L________________ _
8-84
~--~~
is
IF Output
MC1352, MC1353(continued)
FIGURE 3 - POWER GAIN, AGC AND NOISE TEST CIRCUIT
Ve, is maintained across the external capacitor, C2, for a particular
video level and dc reference setting. The voltage VC. is the result
of the charge delivered through 01 and the charge drained by 01.
The charge delivered occurs during the time of the gating pulse,
and its magnitude is determined by the amplitude of the video
signal relative to the dc reference level. The voltage Vc is delivered
via the I F-AGC amplifier and applied to the variable gain stage of
the IF signal amplifier and is also applied to the RF-AGC amplifier,
where it is compared to the fixed RF-AGC delay voltage reference
by the differential amplifier, 02 and 03. The following stages
amplify the output signal of either Q2 for MC1352, or 03 for
MC1353 and shift the dc levels causing the RF·AGC voltage to
vary (positive-going for MC1352 or negative-going for MC1353l.
v'
12 Vde
0,001
r
AGC
F
AGe INPUT
AGC
KEY
-8.0 V
FIGURE 4 - TEST CIRCUIT RESPONSE CURVE
(45 and 58 MHz)
v
~
/
V
II
" I\.
'\
~,
"- ~
...........
35and45 MHz
Scale: 1 MHz/em
"
C2
#26AWG Tinned
~ylQn
Acetate Wue
GENERAL OPERATING INFORMATION
The input amplifiers (Q4 and 05) operate at constant emitter
currents so that input impedance remains independent of AGC
action. Input signals may be applied single-ended or differentially
(for ac). Terminals 1 and 2 may be driven from a transformer, but
a de path from either terminal to ground is not permitted.
AGC action occurs as a result of an increaSing voltage on the
base of 06 and Q7 causing those transistors to conduct more heavily
thereby shunting Signal current from the interstage amplifiers 08
and 09. The output amplifiers are fed from an active current
source to maintain constant quiescent bias thereby holding output
admittance nearly constant.
Each device, MC1352 and MC1353. consists of an AGe section
and an I F signal amplifier (Figure 2) subdivided into different func-
tions as indicated by the illustration.
A gating pulse, a reference level, and a composite video signal
are required for proper operation of the AGe section. Either
positive or negative-going video may be used; necessary connections
and signal levels are shown in Figure 1. The essential difference is
that the video is fed into Pin 10 and the AGe reference level is
applied to Pin 6 for a video signal with positive-going sync while
the input connections are reversed for negative*going sync.
The action of the gating section is such that the proper voltage,
FIGURE 5 - TYPICAL AGC APPLICATION CHART
NOTES:
1. The 12-V supply must have a low ac impedance to prevent lowfrequency instability in the RF*AGC loop. This can be achieved
by a 12*V zener diode and a large decoupling capacitor. (5 jJF).
2. Choices of C1, C2 and C3 depend somewhat on the set designers'
preference concerning AGC stability versus AGC recovery speed.
Typical values are C1 ~ 0.11lF, C2 ~ 0.251lF, C3" 10 JiF.
3. To set a fixed IF-AGC operating point (e.g., for receiver alignment) connect a 22 kH resistor from pin 9 to pin 11 to give minimum gain, then bias pin 14 to give the correct operating point
using a 200 kn variable resistor to ground,
4. Although the unit will normally be operating with a very high
power gain, the pin configuration has been carefully chosen so
that shielding between input and output terminals will not
normally be necessary even when a standard socket is used.
8-85
Video
Polarity
NegativeGoing
Sync.
PositiveGoing
Sync.
Pin 6
Voltage
Pin 10
Voltage
55j£
Pin 5
R1 (12)
Adj. 1.0-4.0 Vdc
0
2.0 - 0
--
Nom 2.0 V
Adj. 1.0-8.0 Vdc
Nom 4.5 V
4:Jl
3.9 k
MC1352, MC1353 (continued)
TYPICAL CHARACTERISTICS
(V+ = +12 Vdc, TA = +250 C unless otherwise noted)
FIGURE 6 - SINGLE-ENDED INPUT ADMITTANCE
5.0
V
/
4.0
FIGURE 7 - 01 FFERENTIAL OUTPUT ADMITTANCE
1.0
(SINGLE-E1NOEO OJTPUT
ADMITIANCE EXHIBITS
TWICETHESE VALUES)
0.8
/
/
/
~
~
.s
...
;;;
V
btl
3.0
..,
--
2.0
1.0
......
10
b22
0.6
N
N
..,V
911
SJ
V
0.4
30
40
50
--
0.2
..........
20
/
...
V
.",
~
.s
/
70
100
10
--
a
~
f'..
"
w 300 r-ly211
-40
Reduction
60
\.,
80
\
::>
t:::
z
200
1
100 ::
t'\
to
~
20
Ly21 @30 dB Gain
'0
:
-120
E
140
160
100
180
o
1.0
20
5.0
2.0
20
10
-200
100
50
~
~
7.0
~
6.0
~
'"
....>
'"
Z
'"
;::
~
20
z
<
to
40
!!:
60
~
80
>
>
>
'" :;; ~ :::!
~
~
~
..;
r-. ......
u
::>
0
~
N
..;
>
>
:E
'"'
5.0
V++=14V
"- ..................
~ ~.O
::>
~ 3.0
TUNER
AGC
E2.0
'"w
:±: to
i5
o
o
10
20
'Tuner AGC Delay -
~
I
'"
~
'"OS
~
'"t;
I
I
;;l
z
~
4.0
'"....>
::>
fa
3.0
::>
.~ 40
~
~
~
~
u
60
80
70
20
n
~
B.O
0;
>
>
'"
u
>
~
'"
80
to
«
'"
r--...
4.0 ;::
~
~
3.0
1'\
to
....
o
>
6.0 ;;;
~
~
!!: 60
2.0 ~
7.0 ~
>
>
~ :::!
::l ~ :;; '"
'"
~
f- 'I"ner AjC Oelr
::>
U
50
5.0 ~
IF GAIN REOUCT"iiiN
::>
IF GAIN REDUCTION I .0 ~
0
~
40
30
I
;,.
TUNER
AGC
I--
6.0 w
5.0
100
~
~
to
r\
TUNER
AGC
Vt+~12V
«
FIGURE 11- MC1353 AGC CHARACTERISTICS
7.0
\
100
70
GAIN REDUCTION (dB)
8.0
>
i-""
50
'\
r\ "-..
FIGURE 10 - MC1352 AGC CHARACTERISTICS
'>
-'"
40
r\
FREQUENCY (MHz)
I
30
FIGURE 9 - DIFFERENTIAL OUTPUT VOLTAGE
8.0
II
r-...
Ly21 @Max Gain
3
-
./
FREQUENCY (MHz)
FIGURE 8 - FORWARD TRANSFER ADMITTANCE
400
~
922
FREQUENCY (MHz)
500
V
....- f-"'"
I ~-
::>
....
100
~
3.5
AGC INPUT VOLTAGE (VOLTS)
4.0
4.5
5.0
5.5
6.0
6.5
7.0
AGC INPUT VOLTAGE (VOLTS)
8-86
~
'"
TUNER 2.0 ~
«
1--. AGC
1.0 ~
7.5
8.0
8.5
MC1352, MC1353(continued)
TYPICAL CHARACTERISTICS (continued)
(v+
= +12 Vdc, T A = +25 0 C unless otherwise noted)
FIGURE 12 - TYPICAL NOISE FIGURE
22
V
20
18
'"w
'"=>to
~
u::
16
........V
14
/" .----V
W
'"<3
12
/
z
10
V/
8.0
7
V
See
II
/
f=58MH/
/V
f = 35 MHZ or 45 MHz
1
T~ Circuit of Fi~ure 3.
V
V
6.0
10
20
30
40
AGC GAIN REDUCTION (dBI
For additional information see "A High-Performance Monolithic IF Amplifier
Incorporating Electronic Gain Control", by W. R. Davis and J. E. Solomon, IEEE
Journal on Solid State Circuits, December 1968.
8-87
\
FM IF AMPLIFIER
'---------'
MC1355
LIMITING FM
IF AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
BALANCED MONOLITHIC FOUR·STAGE
HIGH·GAIN FM/IF AMPLIFIER
· .. designed for use with Foster·Seeley discriminator or ratio detector
in high quality FM systems.
PSUFFIX
•
High AM Rejection (60 dB typ)
•
Wide Range of Supply Voltages (8 to 18 Vdc)
•
Low Distortion (0.5% typ)
PLASTIC PACKAGE
CASE 646
PQSUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - TYPICAL FM·IF APPLICATION
+15V
TYPICAL PERFORMANCE:
20p.VSensitivityfor3dB Limiting
68DmV(rms) Recovered Alldio;
75 kHz Oeviatioll
THO>J f4~)J ~ -(
7k
7k
7k
7k
"
~
6k
500
6k
6k
500
,.-1
6k
6k
~ ns2,3.6,9.12,and13arenotinternallyconnected
10
but should be grounded for maximum stability.
FEEDBACK
500
8
3.4k
j~5.2V
"
"
,.-1
OU TPUTS
~~
2k
-....
7
><
500
,.-1
6k
4k
140
4k
4
5
GND
8-89
MC1355 (continued)
TYPICAL CHARACTERISTICS
FIGURE 3 - TEST CIRCUIT
:}-- ~
R5
I
R5
01
I
I
I
110,) MHz
I FILTER
I
I
L __
R3
R1 820 ohms
R2
50
ohm~
A3 1000hms
R4
5kilohms
R5
12kilohms
I
I
-.J
V+ • 15 Vdc
Cl 50 pF
01 Small Signal Germanium Diode
C2 O,Ol"F
(lN542 ore qui,)
Specifications are given for a Foster-Seeley discriminator. ImT1 10.7 MHz Foster-Seeley Discriminator,
proved AM rejection at low signal levels can be obtained with a
Primary Impedance::; 3.9 k,
ratio
detector.
Peak-la-Peak Separation::; 600 kHz
For optimum circuit stability it is important to ground pins 2.
3,4,6,9,12, and 13.
FIGURE 4 - AM REJECTION TEST BLOCK DIAGRAM
r---
RF
(10.7MH,)
L
HP 10514A
MIXER
OR EOUIV
Rr--
~rf- I
230·A
BOOTON
POWER AMPL,
OR EOUIV
I
TEST CIRCUIT
(Figure 3)
r--
HP 340014
RMS
METER
OR EOUIV
51 k
MOOULATION
1 kHz
FM
GENERATOR
10 k
V DIODE BIAS
FIGURE 5 - LIMITING
1000
§ 800
v~c
r--J+.115
(Use Test Circuit of Figure 3)
;;
;
/1--"'"
600
1..1 I.
50
0
;::
....
~ 400
/
i5
o
C 200
I
......
o ~ I0,01
0,1
40
'"
30
;;J
a:
«
25 kHz Deviation
I
:::>
:i:
/"
/
z
~
o
>
«
vi.
1[5VJc
.I
60 f--10O% FM (75 kHz)
80%AM
(Use Test Set· Up of Figure 3)
I
75 kHz Deviation
.s
"'
~
FIGURE 6 - AM REJECTION
70
~/
20
/
1,0
3,05,0 10
100
10
0,01
1000
SIGNAL INPUT VOLTAGE (mV[rms])
0,1
1.0
3,0 5,0 10
SIGNAL INPUT VOL TAGE (mV[rms[)
8-90
100
1000
MC1355 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 7 - OUTPUT DISTORTION
FIGURE 8 - SIGNAL-TO-NOISE RATIO SIGNAL
100
10
B.O
~
2
0
r;:
J v+=
[ll kHi
1\
\
100~
~
0";'1;°'\-
w
(Use Test Circuit of Figure 3)
4.0
~
2.0
60
~
0
1\
2
0
>-
\
/
V /
40
~
~Vi
[\
'\
20
V
V
0.1
1.0
3.0 5.0 10
100
I
1
1
1
1
11 kHlz OE1VIATIbN
21klor AT
1
1
r
-
1
(Use Test Circuit of Figure 3)
V
J 1I I
1
0.01
1000
I I I
1
V
o /'
o
0.01
----
f=
;?,
0
0
80
0
6.0
~
>=>
~
V+o::15Vdc
15Vdc 1 .1_
0.1
SIGNAL INPUT VOLTAGE [mV[rmsll
1.0
1
3.0 5.0 10
1
100
1
1000
SIGNAL INPUT VOLTAGE [mV[rmsll
FIGURE 9 - TOTAL SUPPLY CURRENT
20
~
18
/
(Use Test Circuit of Figure 3)
16
,..-
14
~
12
~
/""
10
i:
0
-----
/"
/""
0
4. 0
2. 0
0
8.0
10
12
14
16
18
SUPPLY VOLTAGE [VOLTSI
I
8-91
~______________S_O_U_N_D__IF_A_M__P_l_IF_I_ER__~
MC1357
IF AMPLIFIER
AND QUADRATURE
DETECTOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
MONOLITHIC TV SOUND IF OR FM IF AMPLIFIER
WITH QUADRATURE DETECTOR
•
•
A Direct Replacement for the ULN2111A
P SUFFIX
PLASTIC PACKAGE
CASE 646
•
Greatly Simplified FM Demodulator Alignment
•
Excellent Performance at V+ = 8.0 Vdc
PQSUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - TV TYPICAL APPLICATION CIRCUIT
+22 V
820
+
]"."'
'1~"_F ~ ~ L~IRVlv--+ 3~'0~P_F,
____
__
__
__
150"F
MCI316
0.1 "F
5 +
413i-"'-__-'-______
12......__"'-__Lo
16 !1
e--1t---'P'--<>-i
INPUT
R2
MC1357
51
I
I
100 k
I
I
0.005
'j-:
~I
I
I
~--------~-+----+---~~~---+--------~~
(Option,1I ':"
Typical Performance:
2 Watts Output
2% Distortion
250"V Sensitivity (3 dB Lim.1
-
Cl = 120 pF
Ll=14"H
Rl = 20 kl1
11 = 30
See Packaging Information Section for outline dimensions.
8-92
1_ O.I"F
MC1357 (continued)
MAXIMUM RATINGS (TA; +25 0 C unless otherwise noted)
Valu.
Unit
Power Supply Voltage
16
Vdc
Input Voltage (Pin 41
3.5
Vp
Power Dissipation (Package Limitation)
625
mW
5.0
mWflC
o to +75
°c
°c
Rating
Plastic Packages
Derate above T A = +250 C
Operating Temperatura Range (Ambient I
-65 to +150
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (V+ ; 12 Vdc, T A; +25 0 C unless otherwise noted)
Pin
Min
Typ
Max
Units
13
10
-
12
15
19
21
mA
Amplifier Input Reference Voltage
6
-
Vdc
2
-
1.45
Detector I "put Reference Voltage
3.65
-
Vdc
Amplifier High Level Output Voltage
10
1.25
1.45
1.65
Vdc
Amplifier Low Level Output Voltage
9
-
0.145
0.2
Vdc
1
3.7
5.4
-
Vdc
5.0
-
kn
11
kn
Characteristic
V+= 8 V
V+ = 12 V
Drain Current
Amplifier Input Resistance
4
Amplifier Input Capacitance
4
-
Detector I nput Resistance
12
-
70
-
Detector I nput Capacitance
12
-
2.7
-
pF
Amplifier Output Resistance
10
-
60
-
ohms
Detector Output Resistance
1
-
200
-
ohms
De--E mphasis Resistance
14
-
8.8
-
kn
Detector Output Voltage
V+= 8 V
V+ = 12 V
DYNAMIC CHARACTERISTICS (FM Modulation Freq. ; 1.0 kHz, Source Resistance = 50 ohms, TA;
-
+25 0 C
pF
for all tests.)
(V+; 12 Vdc fo; 4 5 MHz Ll.f; ±25 kHz Peak Separation = 150 kHz)
Characteristics
Amplifier Voltage Gain (Vin ~ 50 ,..V[rmsl I
AM Rejection' (Vin = 10 mV[rmsl I
Input Limiting Threshold Voltage
Recovered Audio Output Voltage (Vin = 10 mV[rmsl1
Output Distortion (Vin - 10 mV[rmsl1
Pin
Min
Typ
Max
Units
10
-
60
dB
1
4
1
1
-
36
-
250
0.72
-
dB
,..V(rmsl
V(rmsl
3
-
%
-
-
60
40
250
1.2
-
5
-
dB
dB
"V(rmsl
V(rmsl
%
-
53
37
600
0.30
1.4
-
53
45
600
0.48
1.4
-
(V+; 12 Vdc, fo; 5.5 MHz, Ll.f = ±50 kHz, Peak Separation; 260 kHz)
Amplifier Voltage Gain (Vin ~ 50 "V[rmsll
AM Rejection' (Vin = 10 mV[rmsl I
InDut Limiting Threshold Voltage
Recovered Audio Output Voltage (Vin = 10 mV [rmsl I
Output Distortion (Vin - 10 mV[rmsl I
(V+; B.O Vdc, fo
10
1
4
1
1
-
-
-
= 10.7 MHz, Ll.f =±75 kHz, Peak Separation; 550 kHz)
Amplifier Voltage Gain (Vin ~50 "V[rmsl I
AM Rejection' (Vin - 10 mV[rmsl I
10
1
4
1
1
Input Limiting Threshold Voltage
Recovered Audio Output Voltage (Vin - 10 mV[rmsl1
Output Distortion (Vin = 10 mV[rmsl I
-
-
dB
dB
"V(rmsl
V(rmsl
-
%
-
dB
dB
"V(rmsl
V(rmsl
-
(V+; 12 Vdc, fo; 10.7 MHz, Ll.f; ±75 kHz, Peak Separation = 550 kHz)
Amplifier Voltage Gain (Vin ~ 50 "V [rmsl I
AM Rejection' (Vin - 10 mV[rmsl I
Input Limiting Threshold Voltage
Recovered Audio Output Voltage (Vin = 10 mV[rmsl1
Output Distortion (Vin = 10 mV[rmsl I
10
1
4
1
1
·'00% FM, 30% AM Modulation
8-93
-
-
-
%
MC1357 (continued)
TYPICAL CHARACTERISTICS
(V+ = 12 V. TA = +250 C unless otherwise noted)
(fo = 4.5 MHz)
(Use Test Circuit of Figure 13)
FIGURE 2 - AM REJECTION
FIGURE 3 - AM REJECTION
60
0
II
50
~
~
~
"'
""
\
40
E
Ul
....
1111
REF SIGNAL INPUT
(Pin 10)
....
REIF SIIGN1AlIN1pV+
(pin 10)
~
z
V REF SIGNAL
'"
Ul
"'
./
./
(If ~'1
10
0.05
0.1
0.5
0.2
1.0
/
IIi" 5[5
~~z:
II
20
10
0.05
50
II
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
INPUT VOLTAGE ImV[rmsJ)
FIGURE 5 - DETECTED AUDIO OUTPUT
FIGURE 4 - DETECTED AUDIO OUTPUT
1.0
1.3
1
?
0.9
0.8
w
1.2
REF SIGNAL INPUT IPIN 91
I. 1
<0
~
0.7
:;
""
REF SIGNAL INPUT (PIN 9)
1--
~~O.6
o'='
Cl ?:. 0.5
'">
~
l-
/
=> w
",,<0
«
wI-
1.0
/
0.9
I
0.8
il
=>
0.4
'"
'"c;
/
I-~
~
REF SIGNAL
INPUT IPIN 9)
100%FM,30%AM
INPUT VOLTAGE ImV[rmsJ)
§; 0.3
=>
t;;
'"
"-I'
1/
0
1/
20
~~zid
II5.0 IIII10
2.0
40
'"«
100% FM, 30% AM
20
/
,
".........
~
INPUT
(Pin9)
30
-
.....
0
./
"-
V
'"""
t:l
(fo = 5.5 MHz)
II III
o
0.04
0.1
0.4
1.0
4.0
10
/
:;J 0.5
II III
O. 1
0.6
""
S
0.4
t;;
±25kHz OEVIATION
0.2
0.7
40
'"
0.3
0.02
==iiil:! ii:.!fI
-.
=
.
=.
2.0
TIm
10
15.63 MHz
~
i1!
_
ill
II
--==
It
III Ij
fJ
20
FIGURE 7 - DETECTOR TRANSFER CHARACTERISTIC
MHz
4.'JO MHz
~
1.0
0.2
1111
INPUT VO LTAGE ImV[rmsJ)
FIGURE 6 - DETECTOR TRANSFER CHARACTERISTIC
=-
II
0.1
INPUT VOLTAGE ImV[rmsJ)
14_58
±50 kHz OEVIATION
/
---.
II
iii:iiil:!
III=-
5.50MHz
...:
I~
~
m'
rJ
~5_37
" ' 4_42 rlilH7
8-94
0
MHz
:30
MC1357 (continued)
TYPICAL CHARACTERISTICS (continued)
(fo = 10.7 MHz, T A = +25 0 C unless otherwise noted.)
(Use Test Circuit of Figure 13)
FIGURE 9 - AFC VOLTAGE DRIFT
FIGURE 8 - AM REJECTION
(1.0mV INPUT CARRIER @10.7MHz)
50
:: 600
/
40
;
I. V
30
z
~
'>
.s
~V+-
~
200
/
~ 100
"
100% FM. 30% AM
20
'"
~
60
o
40
!:;
0.5
~
10
o
6.0
1.0
2.0
5.0
10
20
50
100
200
500
0.05 O. I
0.01 0.02
INPUT VOLTAGE (mV[rmsll
FIGURE 10 - LIMITING
1.04
~ 1.02
..,.,.,,- I--""
1.01
:J
~ 1.00
~ 0.99
w
~ 0.98
f-
0.97
V
~
...... .....,...-
~
;;'i
~
0
40
+110
+130
Tv!
k::
20
7
..& IV
0.01
+150 +170
-
b--::F
~'
«
z
o
+90
50 100
12 V+
~
0.96
+70
20
60
f;-
'"u;
+50
10
.If" 25 kHz
Mod f" 1.0 kHz
w
DC LEVEL" 5.36 V@+25 0 C
INPUT CARRIER" 1.0m v - I--v+ = 12 Vdc
+30
-
'"0
>
+10
5.0
2.0
I IIII
-
0
/
-10
1.0
I IIII
80
;::
V
V
0.95
-30
0.5
FIGURE 11 - SIGNAL-TO-NOISE RATIO
100
1.03
0.2
INPUT SIGNAL VOLTAGE (mVlrmsll
1.05
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
INPUT SIGNAL VOLTAGE (mVI
AMBIENT TEMPERATURE (OCI
FIGURE 13 - TEST CIRCUIT
FIGURE 12 - DETECTOR TRANSFER CHARACTERISTIC
+1.5
~
±75 kHz DEVIATION
~
to
o
c3
8V+
~ 20
~
10
'~"
V
o
~
-0.5
~
o
-1.0
-1.5
10.45
OUTPUT
2k
10.5
10.55
10.6
10.65
10.7
10.75
10.8
10.85
10.9
10.95
FREQUENCY (MHzl
8-95
10
MC1357 (continued)
FIGURE 14 - FM RADIO TYPICAL APPLICATION CIRCUIT
"'12V
Q=20@1O.7MHz
·L·l.5-3.0"H
"5 POLE FILTER.
TRW #25579 OR EQUIV
AUDIO
OUTPUT
560
3.3 k
4.7 pF
120 pF
2k
50l!
INPUT
FIGURE 15 - OUTPUT DISTORTION
~"l,"~!'
INPUT
(Pin 101 -
Note 1:
I nformation shown in Figures 15. 16. and 17 was obtained
using the circuit of Figure 14.
Note 2:
Optional input to the quadrature coil may be from either
pin 9 or pin 10 in the applications shown. Pin 9 has commonly
been used on this type of part to avoid overload with various
tuning techniques. For this reason, pin 9 is used in tests on the
\I \I
\ \ \ \I
REF SIGNAL
- , INPUT
(Pin 91
\
\.
...........
\.
preceding pages (except as noted). However, a significant improvement of limiting sensitivity can be obtained using pin 10,
.............
see Figure 17, and no overload problems have been incurred
with this tuned circuit configuration.
o
10
100
30
300
1000
INPUT SIGNAL VOLTAGE ("V[rm.] I
FIGURE 17 - RECOVERED AUDIO OUTPUT
FIGURE 16 - SIGNAL·TO·NOISE RATIO
:;;:: 1000
70
E
\\\\
:; 900
REF SIGNAL INPUT (Pin 101
.5
60
w
~
'"
50
w
'"(3
'l'
o
S
«
'"
«
V
o
40
...... 1--' V
V
V
c;
REF SIGNAL INPUT (Pin 91
to
V
....
600
:=::>
500
::>
/
0
0
REF SIGNAL INPUT (Pin 101
.-
400
::>
«
300
ffi
200
0
100
~
>
'-'
20
30
100
300
1000
~
REF SIGNAL INPUT (Pin 9)
1--'1-'
(3
30
10
700
0
>
z
;;;
800
I<-
. . .V
o
10
30
100
300
INPUT SIGNAL VOLTAGE ("V[rm.] I
INPUT SIGNAL VOLTAGE ("V [rm.1I
8-96
1000
MC1357 (continued)
FIGURE 18 - CIRCUIT SCHEMATIC
INPUT SIGNAL VOLTAGE (mVI
12
2
L
~
~~
~~
0-
lk
----t
K>
1k
1k
I
200
4:
v
'"'"
~~
~
v
~
t"
14
....--0
8k
2.5 k
,
2k
200
200
200
,
,
Kr1 K4
500
B.B k
]0
----t
2k
J
3k
,
4k
500
13
.....
~
450
~
500
2.5 k
I
50
10
5k
,
11
•
8-97
"\
SOUND IF AMPLIFIER
l _ _ _ _ _-----'
MC1358
IF AMPLIFIER. LIMITER.
FM DETECTOR. AUDIO DRIVER.
ELECTRONIC ATTENUATOR
TV SOUND IF AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. a versatile monolithic device incorporating IF limiting, detection,
electronic attenuation, audio amplifier, and audio driver capabilities.
•
Direct Replacement for the CA3065
•
Differential Peak Detector Requiring a Single Tuned Circuit
•
Electronic Attenuator Replaces Conventional ac Volume
Control- Range >60 dB
•
Excellent AM Rejection @4.5 and 5.5 MHz
•
High Stability
•
Low Harmonic Distortion
PSUFFIX
PLASTIC PACKAGE
CASE 646
• Audio Drive Capability - 6.0 mAp-p
•
Minimum Undesirable Output Signal @ Maximum Attenuation
PQSUFFIX
PLASTIC PACKAGE
CASE 647
FIGURE 1 - TYPICAL TV APPLICATION CIRCUIT
V+=24V
RS
390
1I1W
SO k1:+--....+1- +110 v
68pF
*11 =16.H NOMINAL.
°IUNLOAOEO,,,SO
C1 and L2 component values are to be
0.33.F
":'
TONE
CONTROL
MC1358 (continued )
MAXIMUM RATINGS (TA
= +25 0 C unless otherwise noted)
Ratina
Value
Unit
±3.0
Vdc
50
rnA
625
5.0
mW
mW/oC
-20 to +75
°c
°c
Input Signal Voltage (Pins 1 and 2)
Power Supply Current
Power Dissipation (Package Limitation)
Plastic Packages
Derate above T A = +250 C
Operating Temperature Range (Ambient)
Storage Temperature Range
-65 to +150
ELECTRICAL CHARACTERISTICS (v+
= 24 Vdc TA = +25 0 C unless otherwise noted)
Pin
Min
TVD
Max
Unit
Regulated Voltage
5
10.3
11
12.2
Vdc
DC Supply Current (V+ = 9 Vdc, RS = 0)
5
10
16
24
mA
Quiescent Output Voltage
12
-
5.1
-
Vdc
Characteristic
DYNAMIC CHARACTERISTICS (v+ = 24 Vdc, T A
=
+25 0 C unless otherwise noted)
Min
Characteristic
Typ
Max
Unit
IF AMPLIFIER AND DETECTOR
10 = 4 5 MHz t.f =±25 kHz
AM Rejection' (Vin
= 10 mV [rmsl)
Input Limiting Threshold Voltage
Recovered Audio Output Volta!l0 (Vin
= 10 mV[rmsl)
Output Distortion (Vin = 10 mV [rmsl )
'0- 5 5 MH z, t.f - ±50 kH z
= 10 mV [rmsl)
40
51
-
dB
-
200
400
IlV(rms)
0.5
0.70
-
V(rms)
-
0.4
2.0
%
40
53
-
dB
-
200
400
IlV (rms)
0.5
0.91
-
V(rms)
-
0.9
-
%
-
17
4.0
-
kn
pF
Output I mpedance Components (I =4.5 MHz, measurement between pin 9 and GND)
Paraliel Output Resistance
Paraliel Output Capacitance
-
3.25
3.6
-
kn
pF
Output Resistance, Detector
Pin 7
Pin 8
-
-
7.5
250
-
kn
n
Volume Reduction Range (See Figure 8)
(dc Volume Control = 00)
60
-
-
dB
Maximum Undesirable Signal (See Note 1)
(dc Volume Control = 00)
-
0.Q7
1.0
mV
17.5
20
-
dB
-
2.0
-
%
2.0
3.0
-
V(rms)
-
kn
AM Rejection" (Vin
Input Limiting Threshold Voltage
Recovered Audio Output Voltage (Vin = 10 mV [rmsl)
= 10 mV [rmsl )
Input Impedance Components (I = 4.5 MHz, measurement between pins 1 and 2)
Output Distortion (V'n
Parallel Input Resistance
Parallel Input Capacitance
ATTENUATDR
AUDIO AMPLIFIER
Voltage Gain
(Vin = 0.1 V(rms), I = 400 Hz)
Total Harmonic Distortion
(Va
= 2.0 V(rmsl. I
= 400 Hz)
Output Voltage
(THO = 5%, I = 400 Hz)
Input Resistance (I = 400 Hz)
-
70
Output Resistance (f = 400 Hz)
-
270
-100% FM, 30% AM Modulation.
Note 1. Undesirable signal is measured at pin 8 when volume control is set for minimum output.
8·99
n
MC1358(continued)
TYPICAL CHARACTERISTICS
IV+
=24 V, T A =+250 C unless otherwise noted)
= 4.5 MHz)
(fo
(fo
60
0
50
0
.....
;;0
~
os
z
o
100% FM, 30% AM
./
0
t;
w
~
0
~
100% FM, 30% AM
1/
30
/
V
20
20
10
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10
20
10
0.05
50
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
INPUT VOLTAGE (mV[rms])
INPUT VOLTAGE (mV[rms])
FIGURE 5 - DETECTED AUDIO OUTPUT
FIGURE 4 - DETECTED AUDIO OUTPUT
1000
1000
80 a
80 0
'>
J
'>E
.s
~ 600
,..
;: 60 a
=>
1/
=>
o
J
!2 400
g
:==>
±25 kHz OEVIATION
/
o
0400
/
«
20
= 5.5 MHz)
FIGURE 3 - AM REJECTION
FIGURE 2 - AM REJECTION
/
±50 kHz DEVIATION
15
=>
«
a
200
0
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
0.05
0.1
0.2
INPUT VOLTAGE (mV[rms])
0.5
1.0
2.0
5.0
10
20
50
INPUT VOLTAGE (mV[rms])
FIGURE 7 -IF AMPLI FIER AND DETECTOR THO
FIGURE 6 -IF AMPLIFIER AND DETECTOR THO
2. 5
~
o
g
2.0 f+-I+!+--+-++f+1rf.11f--l-+-I-++++++--l-1-H
o
o
l;; 1.5 ~-I+!+--+-++f-Hrf.I1--l-+-I-+++m--l-1-H
15
~
±25 kHz OEVIA~I?~,
~ 1.0 H-*l-l--+-++t...jl...j11-+II++1-+-+++-+ffi-l-_-+-+-+-1
«
Mod f = 1 kHz
:r
g,..
z 2. a
o
~
~
0.5
H-Hi1-..........
-ir-..=f"'t++*F==l=l"*#4#F~F=~
~
'-'
Z
o
~ 1.
«
:r
0.1
0.2
0.5
1.0
2.0
5.0
10
20
a
Mod f = 1 kHz
1"-...
-'
,..o~
O.5
a
O~~__~~~~~~~~YU~~~J-~
0.05
±50 kHz DEVIATION
1- 5
50
0.05
INPUT VOLTAGE (mV[rms])
0.1
0.2
0.5
1.0
2.0
5.0
INPUT VOLTAGE (mV[rms])
8-100
10
20
50
MC1358 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 9 -AUDIO AMPLIFIER THO
FIGURE 8 - GAIN REDUCTION OF ATTENUATOR
5. 0
140
12 0
~
z 4. 0
I
o
0
[;:
.....
0
t:; 3. 0
C
)"
0
0
II
f=400Hz
'-'
V
Z
/
~
2. 0
-'
«
>-
1. 0
::;
o
20
1/
/
>-
o
1.0
II
o
2.0
5.0
10
o
20
50
100
200
500
1000
DC VOLUME CONTROL Ik OHMS}
0.05
0.1
0.2
0.5
1.0
2.0
3.0
5.0
OUTPUT VOLTAGE (VOLTS [,m,l)
FIGURE 11 -IF FREOUENCY RESPONSE TEST CIRCUIT
FIGURE 10-IF FREOUENCY RESPONSE
10 0
0
0
V+=24V
0
0
0
0
0
20
10
o
0.1
0.5
0.2
1.0
2.0
5.0
Pins6,l,8,lD,11,12,13,14noconnection.
10
FREQUENCY (MHz)
FIGURE 13 -AUDIO VOL TAGE GAIN,
AUDIO THO TEST CIRCUIT
FIGURE 12 - AM REJECTION, DETECTED AUDIO,
THO, ATTENUATION TEST CIRCUIT
I
V+"Z4V
n,1f-,-,.....--<>-1
O.l",f
AM·FM
GENERATOR
(BOONTON
TYPE2D2H
OR EQUIVALENT)
L1 = 1O-16~H
a(unloadad»50
Pinsl',12,13,14noconnectinn.
8-101
MC1358(continued)
FIGURE 14 - CIRCUIT SCHEMATIC
REGULATED POWER SUPPLY
4
r --- -- - - --- - - -- -- -- - ------ --- --- - -- ---
ELECTRONIC ATTENUATOR
DC VOLUME
CONTROL
7 DE·EMPHASIS
- - - - -6
------
BUFFER
I
I
1k
I
750
750
4k
r--I
I
1
SOUND
INPUT
+----+<'10
IF~
'*~__-_-_-_-_-_~_-_-_-_-_-_~_"'_~_--_-_-_-_-_-_-_-_-_.J
________
r------- --- - - -If AMPLIFIER
---- -LIMITER
- ---- --- ---I
18k
5k
1
1
Ilk
I
I
150
1
10k
_-" L _______________ _
AUDIO
INPUT
14
"::"
TONE 13
CONTROL
AUDIO
OUTPUT
12
AUDIO AMPLIFIER
8-102
DETECTOR
______ ..J
L----f
l . . __
A_U_T_O_M_A_T_I_C_F_R_E_Q_U_E_N_C_y_C_O_N_T_R_O_L-----J
MC1364
AUTOMATIC
FREOUENCYCONTROL
MONOLITHIC TV AUTOMATIC
FREOUENCYCONTROL
•
MONOLITHIC SILICON
INTEGRATED CIRCUIT
High Gain Amplifier - 18 mV Input for Full Output
•
Direct Replacement for the CA3064
•
Also Available in the 14-Lead Dual In-Line Package
Ifj;\
l~::::]
1.~
G SUFFIX
CASE 686
METAL PACKAGE
PSUFFIX
CASE 646
PLASTIC PACKAGE
FIGURE 1 - TYPICAL APPLICATION CIRCUIT
10k
3W
r---t-~~-,------------~~---------------"+140V
Ll
68 pF
82
pF
5.6 pF
10
(11
2
.--+--'
t
(3)
(2)
FROM 3rd VIDEO IF
AMPLIFIER
tk
3
(4)
AFC
OUTPUTS
(5)
(12)
4~'~~~r e------jlf----+-<>0.001 "F
MCt364
(8)
tk
(9)
See page 3 of this specification for
Coil Data Ill. L2. L3).
The number without parenthesis is the pin number for
the metal package. The number in parenthesis is the pin
number for the plastic package.
Metal Package, Pin 9 - no connection
. Plastic Package, Pins 6,1,10,11,13 - no connection
See Packaging Information Section for outline dimensions.
8-103
MC1364 ( continued)
MAXIMUM RATINGS
(T A
= +25 0 C unless otherwise noted, see Note 1 )
Rating
MCl364G
MC1364P
Input Signal Voltage (Pin 7 to 8)
+2.0, -10
+2.0, -10
Unit
Vdc
Output Collector Voltage (Pins 2 and 8)
20
20
Volts
Power Dissipation (Package Limitation)
Derate above T A = +250 C
680
5.6
625
5.0
mW
mW/oC
°c
°c
Operating Temperature Range
-40 to +85
o to +75
Storage Temperature Range
-65 to +150
-65 to +125
ELECTRICAL CHARACTERISTICS (VCC = +30 Vdc TA = +25 0 C see Test Circuit
01
Figure 4 unless otherwise noted.!
Min
Typ
Max
Total Device Dissipation
-
140
-
mW
Total Supply Current
-
12
-
mA
Current Drain, Total
(Reduce V CC so that V 10 = 10.5 Vdc)
4.0
6.5
9.5
mA
Zener Regulating Voltage
10.9
11.8
12.8
V
Quiescent Current to Pin 2
1.0
2.0
4.0
mA
Ouiescent Voltage at Pin 4 or Pin 5
5.0
6.6
8.0
V
Output Offset Voltage (Pin 4 to Pin 5)
-1.0
0
+1.0
V
Characteristic
DESIGN PARAMETERS, TYPICAL VALUES (VCC
=
+30 Vdc, RS
=
Unit
1.5 k, 1 = 45.75 MHz!
Symbol
Typ
Unit
Input Admittance
Yl1
0.4 + jl
mmho
Reverse Transfer Admittance
Y12
0+ j3.4
Ilmh O
Forward Transfer Admittance
Y21
110 + j140
mmhos
Y22
0.02 + jl
mmho
Parameter
Output Admittance (Pin 2)
Note 1:
Pin numbers used
In
the above tables arB for the metal package, Case 686. For corresponding pm numbers for the plastic
package, Case 646, see the Test Circuit, Figure 4 .
TYPICAL CHARACTERISTICS
(See Test Circuit of Figure 2)
FIGURE 3 - TYPICAL WIDE BAND
DYNAMIC CHARACTERISTICS
FIGURE 2 - TYPICAL NARROW BAND
DYNAMIC CHARACTERISTICS
16
16
Vin =18 mVIRMS!
Vin =18 mVIRMS!
14
~
!:;
o
12
~ 10
to
~
8.0
o
- --
14
in
~in5(8!
>
~ 6.0
....
g
4.0
2.0
l--
......
o
45.71
4•. 72
...- I---
45.73
12
10
""o
~
8.0
~
6.0
5
V
4. 0
>
......
~5(8!"""1(
o
Vpin4(5!
" """"
V
!:;
~
w
to
=::::::
....
---
45.74
45.75
45.76
45.77
INPUT FREaUENCY (MHz)
45.78
Pin4 (5'"
"- >=
/
/
"-
Pin 5 (82/
"Pin415!
-
2. 0
0
45.79
43.75
44.75
45.75
INPUT FREaUENCY IMHz!
8-104
46.75
47.75
Me 1364 (continued)
COIL DATA FOR DISCRIMINATOR WINDINGS
FOR FIGURES 1 AND 4
FIGURE 4 - TEST CIRCUIT
RS =1.5 k
Vcc
r-----~-----.-------v~--------_e+30V
L 1 - Discriminator Primary: 3-1/6turns; AWG#20 enamel-covered
wire - close-wound, at bottom of coil form. I nductance of
L1 = 0.165I'H; 0 0 = 120 at fo = 45_75 MHz_
Start winding at Terminal #6; finish at Terminal #1. Saa
Notes below_
68
pF
L2 - Tertiary Windings: 2-1/6 turns; AWG #20 enamel-covered
wire - close-wound over bottom end of L 1.
Start winding at Terminal #3; finish at Terminal #4_ See
Notes below.
L3 - Discriminator Secondary: 3-1/2 turns; AWG #20 enamel-
covered wire. center-tapped. space wound at bottom of coil
141
form.
Ik
50
(91
151
0.001 .F
MCI364
1~~01
Start winding at Terminal 12; finish at Terminal #5. connect
center tap to Terminal
:J;
AFC
OUTPUTS
Ik
181
O.OOI.F
1141 8
Vcc - 11.8
RS=~
1:
#7 _ See Notes below.
Notes: 1- Coil Forms; Cylindrical; -0_30" Dia. Max.
2. Tuning Core: 0_250" Dia_ x 0.37" Length_
Material: Carbinal J or equivalent.
3. Coil Form Base: See drawing below.
4_ End of coil nearest terminal board to be designated the
winding start end.
5_ Mount the coils 3/4" apart, center to center_
to'~8"j
ohms
The number without parenthesis is the pin number for
the metal package. The number in parenthesis is the pin
number for the plastic package.
Metal Package, Pin 9 - no connection
Plastic Package, Pins 6,7,10,11.13 - no connection
(Bottom view
of co;1forml
2
6
3
0"):
~
600
lSI
121
TYP
5
4
I
191
6
07,
i
FIGURE 5 - CIRCUIT SCHEMATIC
131
~o
(8)
3
141
10
III
100
5k
900
5k
900
(141
500
The number without parenthesis ts the pin number for
the metal package. The number in parenthesis is the pin
number for the plastic package.
Metal Packaga., Pin 9 - no connection
Plastic Package, Pins 6,7,10,11,13 - no connection
1.5 k
8-105
MC1364 ( continued)
FIGURE 6 - PRINTED CIRCUIT BOARD AND PARTS ARRANGEMENT
(Copper Side)
Solid line is plastic package. Case 646,
dotted line is metal package. Case 686.
+30
OUTPUT
8-106
MC1370P
~~______C_H_R_O_M_A__S_U_B_C_A_R_R_I_ER__S_Y_S_T_E_M__~
TELEVISION CHROMA
SUBCARRIER
REGENERATOR
TELEVISION CHROMA
SUBCARRIER REGENERATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. a monolithic device designed for solid-state television receivers,
provides a gated voltage controlled oscillator, phase-locked loop and
dc hue control.
•
Sensitive Voltage Controlled 3.58 MHz Crystal Oscillator
•
High-Gain Automatic Phase Control (APC) Loop
•
Wide-Range dc Control of Regenerated SUDcarrier Phase
•
Synchronous Automatic Chroma Control (ACC) Detector
•
Internal Shunt Regulated Power Supply
•
Internal Gating for Color Burst
•
Complements MC1371P Color IF Amplifier
•
Direct Replacement for the CA3070
PLASTIC PACKAGE
CASE 648
FIGURE 1 - MC1370P SYSTEM BLOCK DIAGRAM
15
16
11
12
--------,I
HUE CONTROL
I
I
I
I
2} OSCILLATOR
OUTPUTS
r--+-O 3
HORIZ
KEY 4
PULSE
HORIZ
KEY
SHUNT
RGLR AND
BIAS CKT
I
L ________ _
8·107
I
---~
10
See Packaging Information Section for outline dimensions.
I
I
I
MC1370P (continued)
MAXIMUM RATINGS (TA
=
+25 0 C unless otherwise noted)
Rating
Maximum SupplV Voltage
(through 470 ohms to pin 10)
Power Dissipation (Package limitation)
Plastic Package
Derate above T A = +250 C
Operating Temperature Range (Ambient)
Storage Temperature Range
Valu.
Unit
30
Vdc
625
5.0
mW
mW/oC
o to +75
°c
°c
-65 to +150
ELECTRICAL CHARACTERISTICS (VCC
= +24 Vdc, TA = +25 0 C unless otherwise noted.)
Characteristic
Min
TVp
Max
Unit
STATIC CHARACTERISTICS (See Test Circuit of Figure 2 SI S2 and S3 in position 1 unless otherwise noted.)
Power ·Supply Current (52 in position 2)
-
27
-
mA
Regulator Voltage (pin 10)
11
11.8
12.9
Vdc
mVdc
-
35
-
Oscillator Current (pins 2 and 3, S 1 in position 2)
4.1
6.5
7.5
mA
APe Detector Current (pin 11 or pin 12)
1.0
1.5
1.8
mA
ACe Detector Current (pin 15 or pin 16)
1.0
1.5
1.8
rnA
APe Detector Leakage Current (pin 11 or 12, 52 in·position 3)
-
-
40
I'A
ACe Detector Leakage Current (pin 15 or 16, 52 in position 3)
-
-
30
-375
-40
+375
-300
-50
+300
-330
-10
+330
Load Regulation (pin 10) (VCC from +21 V to +27 V)
APe Detector Balance (voltage between pins 11 and 12)
ACe Detector Balance (voltage between pins 15 and 16)
Oscillator Control Balance (voltage between pins 7 and 8, 52 in
position 3, 53 in position 2)
I'A
mVdc
mVdc
mVdc
Oscillator Gate Leakage (pin 2 and pin 3)
-
-
2.0
I'A
Voltage (pin 1)
-
100
7.7
6.5
6.5
2.8
300
8.2
7.0
7.0
mVdc
Vdc
(pin 13)
(pin 14)
(pin 6)
S2 in position 2
S 1 and 52 in position 2
S2 in position 2
52 in position 2
52 in position 2
7.2
6.0
6.0
-
-
DYNAMIC CHARACTERISTICS (Eburst = 200 mVp-p at pin 13, see test circuit of Figure 3 and note for setup.)
Oscillator Output Voltage
-
(pin 2, SI in position 1)
(pin 3, S 1 in position 3)
-
1.6
1.6
-
Vp·p
-
10
-
-
+400
-600
-
0.02
-
Deg/Hz
-
5.0
-
mVdc/mVp-p
Oscillator Noise Bandwidth (fNN)
-
150
APC Filter Damping Coefficient (K)
-
0.5
Input Impedance (pin 13)
(pin 14)
(pin 6)
-
2.1
2.1
2.2
Oscillator Control Sensitivity (/3)
Oseiflator Pull·in Range
(Above fO = 3.579545 MHz)
(Below fO = 3.579545 MHz)
APC Loop Static Phase Error (with oscillator free-running
frequency offset)
APC Detector Sensitivity
~)
ACC Detector Sensitivity (ACC output level change for input
burst level change)
-
8-108
1.4
Hz/mV
Hz
-
-
mV/Deg
Hz
-
kn
MC1370P (continued)
FIGURE 2 - STATIC CHARACTERISTICS TEST CIRCUIT
21 V to 27 V
.70
,k
~~
":'
16
'k
-=l:
0.01 }IF
~
0.01 pF
2k
2k
~1-, ,
O.01,uF
O.Ol/JF
1
~
'5
I.
13
11
12
2W
S3
9y
10
4.22 k-=
3Sk
MC1370P
FI'i U
4
2
O.D1 P
5
6,7L
~
0.01/JF
S
0.01,uF
100 k
1
12k
./
510
O.Ol,uF
J.
2
"l
l .... Sl
S2
.2
T
3
!
FIGURE 3 - DYNAMIC CHARACTERISTICS TEST CIRCUIT
NORMAL
1
r--'=
2
•
S2
470
2W
62k
DETEC~5~
OUTPUT
I
XO.
D5 ,uF
lOp.F 470
22k
'---~-+--~~h--+4
16
loOk
15
14
36k
ISO
ISO
43 k
270 k fo,...!..--=.:.......+---+-~"""_--J
1.5k
HUE
NOTE:
'--+---i
The Set-up Procedure for Dynamic Characteristics Test
Circuit
The signal source is an NTSC color bar generator (minus lumiina nee or Y content) applied through ,an adjustable 3.58 MHz
attenuatar. The generator horizontal output is used to trigger a
pulse generator set to give an output pulse of +4.0 volts, 4.5
J.lS
to center the pulse during the burst of the color signal (compare
gated portion of output at pin 2 or 3 with burst pulse of signal!.
With 51 set to position 2 and 52 set to position 2, the oscillator is
adjusted to 3.579545 MHz by R2. R 1 is adjusted to produce zero
offset between pins 15 and 16. When 52 is set to position 1, the
oscillator should synchronize to the incoming signal.
wide, at a repetition rate of 15.734 kHz. The pulse delay is adjusted
8-109
:s:
C')
....
w
o"
FIGURE 4 - TYPICAL CHROMA APPLICATIONS CIRCUIT
(MC1370P, MC1371, MC1328 AND MPSU10)
."
8::J
...::;'
COLOR
KILLER
10 k
CHROMA
INPUT
BANOPAS
ADJUST
cp
.~ ,!,.
If
....
~F
220pF
I
2t
2.2jJF
~
P>.L
3b
41
12 ,F
1.8 M
~~
S1 _2
r"
>-i~
~
lO
9
200pF
T2
8
-
Ink
5b
------1
7
6
~
'----- f--
1~13
I
2.7k
...;
20
AI
AOJ T
~
20k
.F~
0.05.F
~.'F
I--
Io05.
22k
if ~
SWITI I SI
POS
POS
65,F
O.05I1F
15
16
ON 2· SET·UP
MPS UIO
3.3k
I'
~q
0.05.F
t
62 k
0.05.F
~f-
22k
0.05
l>F
12
14 13
'"
.
3
4
43 pF
t
10
11
l.5k
47J.LH
68.H (
MPS UIO
orequiv
1,
160,F
3.3k
470,F
~
250
9?
I
36
1.5k
6 l2 'F 7[
8
65pF
D
j
0.1.5.F
100
100
11 n
250
~
~ ",quiv
1
TI
~
O.01I1F
100
~~"~
LUMINANCE
SIGNAL INPUT
~
~
200l1H
~)
15""
>-j~
5
: FERRITE
8EAO
43 k
250 k
HUE
CONTROL
HORIZ KE PULSE
'" V,4.
INPUT
2
200,uH
'---
~
360 pF
180
62 k 10 /-IF
470 25 V
MCI370P
I
©-
~~
Vee = +24 V
ON 1 = NORMAL
36 k
10k
-f470/1W
62k
f---
10k
O.Ol,!.1F
0.05.F
2.2k
a.
33:
+24 V
680
62 k
ACC
ADJUST
I
7
t:
CD
)200.H
1
8?
MC1328
~4t5b6
~
o
12Y11}IOY 9
Ik
f-
100
220
,F
0.01
220,F
r-'5O;F
IU'
MPS UIO
orequiv
O.OlI1F
MCI371P
TI
390 k
"r
/JF
I;r
I
100
410 47,F
CHROMA
~~
M."
"J4?13
Vee = +24 V
33
CHROMA
GAIN
CONTROL
1k
r
--:J
A~JUST
T2
UNIVERSAL WINDING, AWG NO. 36'
62 TURNS WITH TAP AT 8 FROM GN
L·25.5.H,O·30
UNIVERSAL WINDINGS, AWG NO. 31
PRIMARY, 77 TURNS. L·II.B"",I
SECONDARY, 34 TURNS, CT, L· 9,
MC1370P (continued)
FIGURE 5 - CIRCUIT SCHEMATIC
OSCILLATOR
OUTPUT
ACC
CONTROL
CHROMA
INPUTS
APC
CONTROL
OSCILLATOR
FEED-BACK
HUE 1
CONTROL
Pin 9 no connection.
CIRCUIT DESCRIPTION
The MC1370 monolithic circuit provides the sub-carrier re-
generation function necessary for a color television receiver to
decode the NTSC color signal. An internal gate extracts the burst
voltage and this signal is processed in two-phase detectors, the
quadrature detector controls the phase of the local oscillator and
the in-phase detector is used to provide a noise immune ACe and
color killer control voltage. A shunt regulator sets the bias voltages
and ensures stable operation when there are supply voltage varia-
tions.
The basic 3.579545 MHz oscillator consists of the differential
amplifier (Q1 and Q2) with a feed-back loop through a quartz crystal
operating in series resonance from 02 collector to the non inverting
input of the amplifier represented by 01 base. To control the
oscillator frequency the phase shift of the feed-back path is made
variable by the addition of 05 and 06. A capacitor connected
between pins 7 and 8, together with the collector loads, forms a
RC phase-shift network. Consequently, the oscillator signal appearing at pin 7 can be moved in phase over a 45° range by the differential bias applied to 05 and 06 bases. The crystal between pins
7 and 6 completes the feed-back loop. The automatic phase control
to the upper differential pairs of the (05, 061 oscillator is through
the buffer stages Q7 and 08_ The oscillator amplifier is buffered
by 03 and Q4. Output from the oscillator is obtained from the
collector of 1 and is essentially a square wave of 9 rnA peak-topeak with a frequency range of several hundred Hertz.
The control voltage for 05 and 06 is obtained from the phase
detector 09 and alD. As 01 is the current source for this pair,
the voltages appearing at pins 11 and 12 will correspond to the
phase difference between the oscillator current and the burst signal
applied to pin 13. The loop characteristics are controlled in part
a
by a' filter connected between pins 11 and 12. This is usually a
double-time constant network to yield good pull-in times with a
low-noise bandwidth.
To ensure that the quadrature phase detector functions only
during the burst portion of the incoming chroma signal, the detector is gated into conduction by a pulse from the line flyback transformer - applied at pin 4. This has the additional advantage that
the average current in the phase detector has been reduced by the
gate duty factor thus relaxing the input offset stability requirements
of the differential pair and enabling them to be used with high dc
gain.
For the ACC control voltage and color-killer function a similar
phase detector, 015 and 016, is used. However, the chroma signal
input to pin 14 is phase shifted externally by' gOO with respect to
pin 13. As a result, 015 and 016 is an in-phase detector and the
control voltage at pins 15 and 16 will be proportional to the amplitude of the burst. Thus filtering of pins 15 and 16 provides the
control voltage for the gain control stage in the chroma J F and an
indication of the incoming signal strength for the color-killer circuit.
When the phase detectors are not gated "on" by a positive
pulse at pin 4, the bases of 013 and Q14 are held above the bases
of the phase detector inputs. Therefore, between gate pulses, all
the current" from the oscillator output 01 passes through Q13 and
014 to pins 2 and 3. When a phase·shift network is connected
between pins 2 and 3, the phase of the oscillator drive to the demodulators can be controlled by changing the relative conduction
of 013 and Q14 with a bias on pin 1. As a result the oscillator output is controlled in phase providing a dc hue control and is gated
"off" during the burst period, negating the need for burst blanking
in the chroma IF amplifier.
8-111
•
I
MC1370P (continued)
TYPICAL CHARACTERISTICS
FIGURE 6 - STATIC PHASE ERROR .......,
FREQUENCY OFFSET
+10
+B,0
V V
I;; in +6, 0
"'w
V
zto
~e
+2.0
400 mV BURST,
>-'"
wO
0
~~
c: = -2. 0
.. "
~~ -4. 0
i>- t;?'
IA
V
-6. 0
V K
/
:/
-B,
-I
-300
~ N +800
~~
!:~
~
V
-IBO
-140
V-
+20 0
i
I'
MAXIIMUM
AVAILABLE
FREaUENCY
RANGE
0
3: _ -200
ON
--'"
~ i
-400
3: -60 0
100 mV BURST
75
+60 0
co +40 0
~~
A
",0
~:i
~V
-,",
~
m~ BURst
-80 0
M
"
1'-.....
-60
+60
+110
+180
+240
o
+300
100
OSCILLATOR FREE-RUNNING FREUUENCY
OFFSET FROM 3,579545 MHz IHzI
./'
w
V
t3
..:
10 0
FIGURE 9 - OSCILLATOR SENSITIVITY
V
V
./
+3 0
;::
L
i3 "2i +2 0
/'
e: ~ +1 0
~~
o. 0
,/
"'N -1 0
0""-
~~
/
oV
L
+40
w
to
/
~
o
800
+50
/'
~ 300
E
600
400
BURST INPUT LEVEL ImVp-p)
FIGURE 8 - ACC DETECTOR SENSITIVITY
400
~ 200
~
,I
t--
-100 0
-110
'"
~
.er,u,
+1000
V
-
/ V
~~ +4. 0
FIGURE 7 - PULL-IN FREQUENCY RANGE
BURST INPUT VOLTAGE LEVEL
ti:i~-2 0
o
-3 0
"
~
V
~V400
-500
-4
V
V
/"
V
-5
100
200
300
400
BURST INPUT LEVEL ImVp,p)
DEFINITIONS
Oscillator Sensitivity 1.6)
· .. the change in oscillator free-running frequency for a change in
differential control voltage, measured in Hertz/millivolts.
APe Detector Sensitivity tu.)
· .. the differential voltage change produced at the detector output
for a given change in oscillator phase relative to burst phase, measured for a given burst input amplitude in millivolts/degrees.
ACe Detector Sensitivity
· .. the differential voltage produced at the detector output for a
-300
-100
-100
+100
+200
+300
+400
+500
OSCILLATOR FREQUENCY OFFSET
FROM 3,579545 MHz 1Hz)
given change in burst input amplitude with the oscillator locked
in synchronism, measured in millivolts dc/millivolts (p-p).
Noise Bandwidth IfN)
... actually noise semi bandwidth, fNN (= 2 X fN); a measure of
the susceptibility of the burst channel to thermal noise (i.e. dynamic phase error).
Filter Damping Coefficient (K)
. describes the shape of the loop input phase versus output
phase response (Ow) - K == 1 represents critical damping, K
1
over damping.
>
8-112
MCI371P ~___________C_H_R_O_M_A__IF_A_M__PL_I_F_IE_R____~
TELEVISION CHROMA
IF AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
TELEVISION CHROMA IF AMPLIFIER
· .. a monolithic device designed to provide the basic control and
color signal amplification stages of a solid·state color television
receiver. The MC1371 is a combination of two wideband chroma
amplifiers and a color control circuit.
• Schmitt Color· Killer Circuit with Adjustable Trigger Level
• Linear Action dc Manual Gain Control
• Short·Circuit Protected
• Gain Stabilized Against Supply Voltage and Temperature Changes
• Low Phase Distortion
• Excellent Gain Linearity Over Full Output Range
• Direct Replacement for the CA3071
PLASTIC PACKAGE
CASE 646
FIGURE 1 - MC1371P SYSTEM BLOCK DIAGRAM
,--------
CHROMA
GAIN
10
CONTROL
----,
I
I
BIAS
CIRCUIT
I
I
I
I
1---4--012
I
CHROMA
INPUT
2
I
0-+--------1
I
I
) >__---+-09 CHROMA
OUTPUT
I
I
I
I
I
L_
14
ACC
INPUT
See Packaging Information Section for outline dimensions.
8-113
MC1371P (continued)
MAXIMUM RATINGS (T A
=+25oC unless otherwise noted.)
Reting
Value
Unit
Po ..... Supply Voltage
30
Vdc
Amplifier Output Short-Circuit Duration
30
s
Power Dissipation (Package Limitation)
Plastic Dual I"-Line Package
Derate above T A
625
5.0
=+250 C
mW
mWJDc
°c
°c
o to +75
Operating Temperature Range {Ambientl
Storage Temperature Range
-65 to +150
ELECTRICAL CHARACTERISTICS (VCC = +24 Vdc. TA = +250 C unless otherwise noted. See Test Circuit of Figure 2;
switch 51 in position 1, R1 wiper at ground. R2 = 10 kilohms.)
I
Characteristic
Min
Typ
Max
Unit
17
28
31
mA
-
68
1.7
-
13.7
7.5
16.3
10.5
:20
13.5
Static Characteristics
Quiescent Power Supply Current
Short-Circuit Current
mA
(pin 6 momentarily grounded)
(pin 9 momentarily grounded)
First Chroma Stage Input Bias Voltage (pin 2)
First Chroma Stage Output Bias Voltage (pin 6)
ACC Balanced (51 in position 1)
ACC Unbalanced (51 in position 2)
Vdc
Vdc
Second Chroma Stage I npat Bias Voltage (pin 7)
Second Chroma Stage Output Bias Voltage (pin 9)
Quiescent Bias Voltage (pin 12)
Dynamic Characteristics (f = 3 579545 MHz input pin 2
48
=35 mV
-
1.4
-
Vdc
16.6
17.6
18.6
Vdc
13.8
14.8
15.7
Vdc
dB
IRMS) unless otherwise noted)
First Chroma Amplifier Stage Gain (ACe Balanced)
14
17
20
Second Chroma Amplifier Stage Gain
(R 1 wiper at ground)
12
15.5
17
dB
Maximum Linear Output (output level at pin 91
-
2.0
-
V(RMS)
Output Voltage, pin 9 linput pin 2 = 50 mV IRMS))
IRI wiper at VCC)
(R 1 wiper at ground, R2 adjusted for abrupt ac change in
pin 9 output voltage)
-
-
12
12
16.7
2.5
:20.2
3.2
21.6
4.5
-
+0.5
..{l.S
+0.5
+1.5
-1.5
-
2.0
3.S
-
2.2
3.6
-
mV(RMS)
Pin 10 Bias Voltage
(A 1 set for 10% of pin 9 maximum output)
(R 1 set for 90% of pin 9 maximum output)
Vdc
Second Amplifier Gain Stability
(VCC+ 15%)
(VCC -15%)
(T A = +250 C to +7SOC)
dB
-
-
Input Impedance
(pin 2)
-
(pin 7)
Output Impedance
(pin6)
(pin 9)
k!l
pF
k!l
pF
ohms
-
8-114
85
86
-
-
MC1371P (continued)
TYPICAL CHARACTERISTICS
(VCC = +24 Vdc, 10 = 3.579545 MHz, TA = +25 0 C unless otherwise noted.)
FIGURE 2 - TEST CIRCUIT
6.B k
2
1
390 k
SI
100
62 k
O~Oi
' I' O:~,
CT
11
10
B
9
2.7k
I
L
2
is
4
~t]
1
005
5.8 k
-=
7
6
100
1
1
Rl
12
13
MC1371P
tl
2ejJ
75k
"
~I
1 ~F
22 k
~0.Q111f
1k
18k
t'4
I
I
,I
,,I
,,,
-=
*
I'
0.05;01'
62k
0.~~1If
24 V
VCC
33
10 k
R2
0.0511f
;01'
2.2 k
lk
"::"
2
3
OUT~
IN~UT k
4
1
S2
1
FIGURE 3 - MANUAL GAIN CONTROL LINEARITY
1.0
en
O.9
'"
!: O.8
~
O. 7
'"~
O. 6
"'"
"" ""- "-
~ O. 5
!;
j:: O. 4
KillER "OFF"
PIN 2 INPUT· 50 mV IRMS)
........
""-
:::>
~ 0, 3
~ O. 2
I'-..
'-
O. I
o
o
5.0
10
15
PIN 10 CONTROL VOLTAGE IVdc)
"'
25
20
FIGURE 5 - AMPLIFI ER LINEARITY
FIGURE 4 - FIRST STAGE GAIN WITH ACC BIAS
BO0
~
;;600
J
ii!300
V
!;
~ 200
z
0: 100
-200
~
~
/
i/
1. 0
~
/
V
/
>
z
0:
/
+100
+200
t;:
w
~
f
4.0 ~
1./
.,o
2.0 z
PIN 9 PHASE
Cr ANGE,
0:
200
PIN 2 INPUT VOLTAGE (mV IRMSII
8-115
ffi
'"w
e'"
8.0 ~
6.0
i
100
ACC OFFSET VOLTAGE ImVdc)
(Voltage Between Pins 14 and 1)
10
!;
0 1/
-100
Rl WIPER AT GROUND
KillER "OFF"
.
/
o
PIN 2 INPUT • 50 mV IRMS)
I
/
'"~ 2.0
II
0
0
I
w
~
1
./
~
~ 500
>
i.'--
~ 3. 0
~
/
oS
.;:;40
1
/
~70 0
300
MC1371P (continued)
FIGURE 6 - CIRCUIT SCHEMATIC
BY PASS
COLOR KILLER CIRCUIT
R~,
Rll
5.6 k
R5
3.3 k
13
O~
"(
12
BYPA~~4
l?
Hf
012
R6
36
~~01
r '~7"
R4
1k
1k
CHROMA
INPUT
R21
5k
R28
3.3 k
I"
Rl
2.4 k
FIR ST CHR 0 MA
AMPLIFIER
02 ~
R13
500
R19
1.2k
R20
3.7 k
1.--010
,t
~ "r
03
BIAS
CIRCUIT
'"
~~
Rl0
36
9
CHROMA
OUTPUT
Zl";j
R2
220
6
FIRST STAGE
OUTPUT
R26
1.2 k
~
R29
7.6 k
,,08
R7
360
R27
1k
04
-=-
SECOND CHROMA
AMPLIFIER
R25
15 k
R24
3k
R22
1k
VOl
R18
2.4 k
R8
2.4k
BIAS +24 v
R23
1.3 k
1
2
8
R9
1k
013
03
R3
014
Rll
10 k
R16
5.6 k
2.7k
O~
02
~~~T
V'06
to-;
? CONTROL
1k
R12
10 k
KI LLER
CONTROL
CHROMA GAIN
10
11
7
SECOND STAGE
INPUT
CIRCUIT DESCRIPTION
The MC1371
is a monolithic wide-band amplifier circuit that
functions as the basic control and color signal amplification stages
of a color television receiver. The first stage contains the gain
control function of the ACe loop and the second stage performs
the de manual gain control function. Also included is a Schmitt
trigger circuit providing effective color-killer action during mono-
chrome transmissions.
Q1 is a current source modulated by the input signal applied
at pin 2. The current in Q 1 is divided between the differential
pair (02 and 03) in a ratio determined by the ACC voltage applied
through the buffer stages, 04 and 05. Pin 14 is usually offset
with respect to pin 1 by a resistor connected to ground so that at
low·signal levels most of the signal current is taken by 03 and
passed to the load resistor R 5 (the input stage appears as a cascode
amplifier to the signal with the intrinsic ac stability of that configurationL The amplified signai' is then buffered at pin 6 by the
emitter follower stage 06 which is protected from accidental
grounding at the output by the current limiter 07.
At strong signals when the amplitude of the burst is high,
the ACe voltages at pins 1 and ,14 divert most of the signal current
from 03. The signal is "dumped" into the collector load of
Q2. 02 is connected externally at pin 13 and bypassed to ground
at signal frequencies by a capacitor. However, the dc voltage at the
collector of Q2 is dependent on the burst amplitude and therefore
on the input signal strength. As the input signal level falls, more
current is fed into 03 by the ACe loop and the output at pin 6
remains constant while 02 collector voltage increases. At a point
predetermined by 02 collector load (the killer·control setting)
the input Q12 of the color·killer circuit is biased "on", shutting
down the second chroma amplifier stage.
The second chroma stage is similar in configuration to the
first stage. The signal input at pin 7 (which is the output from
pin 6) modulates the current source 08. For a maximum gain
voltage setting on pin 10 the signal current passes through 09 to
the output buffer stage 010. 010 is protected from short circuit
currents by a 11. To reduce the stage gain,current is diverted from
09 by biasing the diode 02 into conduction. 02 can be regarded
as a transistor with 100% dc negative feedback applied between
collector and base. Without the feedback path the gain characteristic of the second stage is that of a differential pair, this S shaped
curve would make tracking of ganged color level and contrast
controls quite difficult. In this limiting form the current through
02 is directly profX)rtional to the voltage difference between the
supply and 02 anode and hence to the control voltage at pin 10.
When the input to the color·killer is biased "on", Q13 is turned
"off" and the voltage at the base of 014 rises abruptly. D2 then
takes all the current from 08 and the output at pin 9 is suppressed.
8-116
s:
(')
~
W
-...I
~
~
FIGURE 7 - TYPICAL CHROMA APPLICATIONS CIRCUIT
IMC1370, MC1371, and MPS Ul0)
0o
::I
COLOR KILLER AOJUST
10k
MPSU10
C~~~:A
1k
r
CHROM
INPUT
0.05.F
-
8 1 3 ""12r;'lfITIO
~F
or equiv
~
\b
f-1~
I __ 5k
~ITo;l
-
~
0.01
CONT~
18k
9
T2
114113 12ylltlOy 9
l
220
I
1 2.7k
MCI371P
pF
0--
470 47 pF
,L
CHROMA
BANOPASS
ADJUST
.p5k I
Tl
220 pF
1
2y
3b
4i
bL!..
50'V
1.8M
12pF
~~;
~
62k
62k
AOJUST
0.05 OF
r---
20 : -
pp,
AOJ
T
~05
F
30pF
.
0
0.05 of
+24 V
-~
lSI
16
15
65pF
~
0.05 OF
180
62k IO.F
470 25V
62k
0.05 OF
43pF
~
0.05
loF
-
3
4~
12
I
lk
36
1.5k
\ I..
VCC-+24V
-
~
)
0.15.F
200JlH
~
~
15k
'47 oH
68 H (
15oH··
MPSU10
~
or equiv
~~)
160;F
11
10
9n
-T
I
470pF
3.3k
~f--
~
~
250
LUMINANCE
+y
6y
71
1
8
1.2 pF
65pF
200 JiH
I~
100
100
~
100
0 tJ
250
250
«;2N3906
ore,u;,
SIGNAL INPUT
~
Tl
_
-
~
3.3k
~
0.01 OF
HORIZ K PULSE
+4 V,
'" •
INPUT
FERRITE
:~ 8EAO
43k
250k
HUE
CONTROL
5
MPS Ul0
360pF
f-1E
MC1370P
1 2
10k
Vore,UIV
~
ON 1 ~ NORMAL
36 k
10k
O.OI.F
ri-- r'f-+-r..-.~+-r..-.~-----+
22 k
~
14 13
+_-,
>-I~
0.05 of
-
-
ON2~SET·UP
~
200.H
470/1W
_
SWI
POS
POS
I
7
~;
L...._ _
2.2k
~
22k
6
I
of ' - - -
220 pF
2.7k
~
~ 4~ 5b
IUk
~3.3k
8r-
MC1328
1k
~
r -
~
~~ ~r-
7
50pF
1_
~3~90~k~..-~
_______ l_'!" 100
~ 02
r-'~
-.F
SI
680
~
....
....
"'-I
6
r- r
o
~ 400
w
100% FM. 30% AM
>
o..,
w
a: 200
......
00.2
V
t75 kHz OEVIATION
"..
0.5
1.0
2.0
5.0
10
20
50
100
200
2.0
1.0
5.0
INPUT SIGNAL VOLTAGE (mV[RMSlI
0.5
INPUT SIGNAL VOLTAGE (mV[RMSlI
FIGURE 5
FIGURE 4 - IF AMPLIFIER AND DETECTOR THO
~
10
20
SIGNAL TO NOISE
100
~
z 2.0
0
;:
80
a:
~
0
I;;
~
..,i5
Z
......
0
:E
a:
:z:
1.0
..
0
......
to
0;
20
...
0
0.5
1.0
5.0
10
20
50
2.0
INPUT SIGNAL VOLTAGE (mV[RMS))
100
00.2
200
1.0
2.0
5.0
10
50
20
100
ZOO
FIGURE 7 - CURRENT DRAIN versus SUPPLY VOLTAGE
FIGURE 6 - AUDIO AMPLIFIER THO
0
~
!z
4.0
a:
26
:;;:
o
~
..,
0.5
INPUT SIGNAL VOLTAGE (mV[RMS1)
5.0
i!5
40
Z
;!
;:
/'
z
.......
±75 kHz OEVIATION
60
i5
t75 kHz OEVIATION
fmod =1.0 kHz
V
a:
:: 22
3.0
l.7
~
a:
Z
o
~ 2.0
:z:
.....
J
,= 1.0 kHz
;!
~ 1.0
a:
~1 8
....
;!
V
~
./
I
0.1
0.2
t4
V
V
V
V
..J...
0.5
1.0
2.0
5.0
8.0
9.0
10
11
12
POWER SUPPLY VOLTAGE (V de)
OUTPUT SIGNAL VOLTAGE (V [RMS})
8-120
13
IS
MC1375P (continued)
FIGURE 8 - CIRCUIT SCHEMATIC
FIGURE 9 - AM REJECTION, THO, RECOVERED
AUDIO, AND SIN TEST CIRCUIT
FIGURE 10 - AUDIO VOLTAGE GAIN AND
THO TEST CIRCUIT
+11.2 Vde
Vo
°t
= 6.0"fl nom
AdlunRtofQl" 55
MIX«BIIS
Voltage
8-121
~~__________________A_U_D_I_O_D__R_IV_E_R__~
MC1385P
Produ.ct Previevv
CLASS B
AUDIO DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
MONOLITHIC CLASS B AUDIO DRIVER
· .. designed to be used in conjunction with class B output transistors
MJE2050/MJE2150 to produce a class B audio amplifier suitable for
auto radio. It is ideal for low·voltage, single-supply audio driver applications as found in Automotive, Consumer and Industrial Electronics.
•
I nternal Power Supply Transient Protection
•
Built-in Programmable Short-Circuit Current Limiting
•
Excellent Sensitivity - 4.0 mV( RMSI typical
•
Class B Operation
•
Excellent Power-Supply Ripple Rejection - 35 dB typical
PLASTIC PACKAGE
CASE 646
FIGURE 1 - TYPICAL APPLICATION CIRCUIT
.. 14.4 Vdc
r--------------~~---+----
+
116
4.7 k
I N PUT
1 /.IF
e----vvv----7 +
1000 /JF
Vdc
9
MJ E2050 or equ iv
8
MC1385
4
::r
470 pF
20 k
0.24
2 k
1 k
+
0.0011'F
See Packaging Information Section for outline dimensions.
8-122
MC1385P (continued)
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted. I
Rating
Value
Unit
25
40
Vdc
50
mA
625
5.0
mW
mW/oC
Operating Temperature Range IAmbientl
-40 to +85
Storage Temperature Range
-65 to +150
°c
°c
Power Supply Voltage
Steady" State
Transients of 50 ms or less
INote 11
Maximum Sink or Source Current
Vdc
Pin 5 or 8
Power Dissipation (Package limitation)
Plastic Package
Derate Above T A = +25 0 C
ELECTRICAL CHARACTERISTICS IVCC = 14.4 Vdc, RL = 3.2 ohms, f = 1.0 kHz, See Figure I, TA = +250 Cunlessotherwisenoted.1
Characteristic
Recommended
Operati~g
Typ
Max
Unit
9.0
-
14.4
16
Vdc
22
-
Vdc
-
10
Min
Power Supply Voltage Range
Power Supply Overvoltage Shutdown INote 11
Drain Current
mA
Power Output
THD= 10%
Input Sensitivity Voltage
Po = 1.0W
5.0
-
-
-
4.0
-
mVIRMSI
-
0.7
-
%
-
2.0
-
mVIRMSI
-
35
S.O
-
kSl
W
Total Harmonic Distortion
PO= 1.0W
Output Noise
RS = 4.7 k ohms, BW = SO Hz - 6.0 kHz
Power·Supply Ripple Rejection
Ripple = 1.0 Vlp·p) @f= 100 Hz, input shorted
Input Impedance
dB
Note 1 - These specifications were set to meet typical automotive load dump requirements.
I
8-123
"
Mel39lP
TV HORIZONTAL PROCESSOR
\.._--------'
TV HORIZONTAL PROCESSOR
TV HORIZONTAL
PROCESSOR
· .. low-level horizontal sections including phase detector, oscillator
and pre-driver - a device designed for use in all types of television
receivers.
•
MONOLITHIC SILICON
INTEGRATED CIRCUIT
Internal Shunt Regl,llator
• Preset Hold Control Capabil ity
• ±300 Hz Typical Pull-In
Linear Balanced Phase Detector
•
• Variable Output Duty Cycle for Driving Tube or Transistor
•
Low Thermal Frequency Drift
• Small Static Phase Error
• Adjustable dc Loop Gain
PLASTIC PACKAGE
CASE 626
Vnonreg
FIGURE 1 - TYPICAL APPLICATION CIRCUIT
+30 V
RA
RS
470
470
+150 V
Y3k
CA
'00"'1
High
Voltage
Rcl/.
12 k
1,
MF
R\f
2.4k_
RX
3.3 k
Ry
0.0068
150 k
.J
0.0051
~'F
JCs
7
8
2.2 k
["
Hold
RO
27 k
~"""'
4k
lOW
cc"g
lM~
1200v...Il-
5
6
MJ105
or Equiv
~>--
RZ
8.2 k
2
K
E
'"15.3, 1
MRO
1l40~
4
3
or
>---
~
-E~r,'o:':"
1.5
or Equiv
=
r-
0.01
~i' "F
Equiv
0.1 pF
39 k
0.003
i'F
y
0
0~~1*
'--
1
~
1.5 k
MC1391P
R
r-
0.1 i'F
-20 V Sync
This circuit has an oscillator pull-in range of ±300 Hz, a noise bandwidth
of 320 Hz, and a damping factor of O.B.
See Packaging Information Section for outline dimensions.
8-124
0.2
i'F
MC1391P (continued)
MAXIMUM RATINGS (TA = +250 C unless otherwise noted.)
Value
Unit
Supply Current
40
mAde
Rating
Output Voltage
40
Vdc
Output Current
30
mAde
Sync Input Voltage (Pin 31
5.0
V(p-pl
Flyback Input Voltage (Pin 41
5.0
V(p-pl
Power Dissipation (Package Limitationl
Plastic Package
Derate above T A = +25 0 C
625
5.0
mW
mW/oC
o to +75
°c
°c
Operating Temperature Range (Ambientl
-65 to +150
Storage Temperature Range
ELECTRICAL CHARACTER ISTICS ITA = +25 0 C unless otherwise noted.! (See Test Circuit 01 Figure 2 all switches in position 1.)
Characteristic
Regulated Voltage (Pin 61
Supply Current (Pin 61
Min
Typ
Ma.
8.0
8.4
8.8
Unit
Vdc
-
20
-
mAde
Vdc
Collector-Emitter Saturation Voltage (Output Transistor
Q1 in Figure 61
(lC = 20 mAo Pin 11 Vdc
-
0.30
0.35
Voltage (Pin 41
-
2.0
Oscillator Pull-in Range (Adjust RH in Figure 21
-
±300
Oscillator Hold-in Range (Adjust RH in Figure 21
-
±900
-
Static Phase Error
(41 = 300 Hzl
-
0.5
-
-
±3.0
-
Phase Detector leakage (Pin 51
(All switches in position 21
-
-
±1.0
Sync Input Voltage (Pin 31
2.0
-
5.0
V(p-pl
Sawtooth Input Voltage (Pin 41
1.0
-
3.0
V(p-pl
Vdc
Hz
Hz
,.s
HzlVdc
Free-running Frequency Supply Dependance
(S1 in position 21
,.A
8-125
MC1391P (continued)
TYPICAL CHARACTERISTICS
(T A = +2So C unless otherwise noted.)
FIGURE 2 - TEST CIRCUIT
r'
t.O"F
2
3.3 k
+
_
I
2
"F
3
6
t2 k
6800
t k
I
Vee +30 V
pF
2
S
OutPut
Pulse
+30 V
(See Figure 5)
"=
t
---
1\
0.003
Sync Pulse
= -20 V.
5.0 "'. fO =
15,750 Hz
-!:Pulse Generator
Output = +50 V.
I
1
1 k
._'VM
S3
"F
7
3k
Pulse Generator
2.
11
MCt391P
t50k
1
S2
1
39 k
RH
•
3.3 k
O.'''F±
r¥-
5l
3:
REFERENCE FREIlUENCY15,750 Hz
.... 1'--...
r:--.....
-20
-
~
S3 in Position 2
-30
4-40
............
f'
-5 0
-60
-70
o
10
20
60
30
40
50
AMBIENT TEMPERATURE (OC)
70
80
FIGURE S - MARK-SPACE RATIO
FIGURE 4 - FREQUENCY DRIFT versus WARM-UP TIME
4.7 5
+40
-""V
4.5
0
/'"
.......
J
t-- fO = 15,750 Hz
I
4.251--
t
= 63.51's
~ 4.0
w
'"
~ 3.1 5
0/
I
S!
:E 3. 5
I
REFERENCE FREIlUENCY = _
+1 0
I
15',50 Hz
I
>
3.25
l---
3.0
o
2.7 5
o
30
60
TIME (s)
90
120
o
/
/
10
V
1/
20
V
1/
30
POSITIVE PULSE WIDTH {J.Is)
8-126
1/
40
50
MC1391P (continued)
FIGURE 6 - CIRCUIT SCHEMATIC
Pre-Driver
Oscillator
Timing
Vee
Oscillator
6
Regulator
Phase Detector
MC1391P CIRCUIT OPERATION
The MC1391P contains the oscillator, phase detector and predriver sections needed for a television horizontal APe loop.
The oscillator is an RC type with one pin (Pin 7) used to can·
trol the timing. The basic operation can be explained easily. If
it is assumed that Q7 is initially off, then the capacitor connected
from Pin 7 to ground will be charged bV an external resistor (RC)
connected to Pin 6. As soon as the voltage at Pin 7 exceeds the
potential set at the base of as bV resistors RB and R10, Q7 will
turn on and 06 will supply base current to 05 and 010. Transistor
010 will set a new. lower potential at the base of as determined
by RB, R9 and R 1O. Then, transistor Q5 will discharge the
capacitor through R4 until the base bias of Q7 falls below that
of as, at wh ich time Q7 will turn off and the cvcle repeats.
The sawtooth generated at the base of Q4 will appear across
R3 and turn off Q3 whenever it exceeds the bias set on Pin 8.
BV adjusting the potential at Pin B, the duty cycle (MSR) at the
predriver output pin (Pin 1) can be changed to accommodate either
tube or transistor horizontal output stages.
The phase detector is isolated from the remainder of the circuit
by R14 and Z2. The phase detector consists of the comparator
Q15, Q16 and the gated current source Q17. Negative going sVnc
pulses at Pin 3 turn off Q12 and the current division between
Q15 and Q16 will be determined bV the phase relationship of the
sync and the sawtooth waveform at Pin 4, which is derived from
the horizontal flvback pulse. If there is no phase difference be·
tween the sync and sawtooth, equal currents will flow in the
collectors of Q15 and Q16 each for half the sync pulse period.
The current in Q15 is turned around by Q1B so that there is no
net output current at Pin 5 for balanced conditions. When a phase
offset occurs, current will flow either in or out of Pin 5. This
pin is connected via an external low-pass filter to Pin 7, thus
controlling the oscillator.
Shunt regulation for the circuit is obtained with a zero temperature coefficient from the series combination of 01, 02 and Z1.
MC1391P (continued)
MC1391P APPLICATIONS INFORMATION
Although it is an integrated circuit, the MC1391P has all the
convenient method of adjusting the de loop gain (fc).
flexibility of a conventional discrete component horizontal APe
For a given phase detector sensitivity (jJ) = 1.60 x 10- 4 A/rad
loop.
The internal temperature compensated voltage regulator allows
a wide supply voltage variation to be tolerated, enabling operation
from nonregulated power supplies. A minimum value for supply
current into Pin 6 to maintain zener regulation is about 18 rnA.
Allowing 2mA for the external dividers
fc = jJp and p = 3.15 x RC Hz/mA
Increasing RC will raise the de loop gain and reduce the static
phase error (S.P.E.) for a given frequency offset. Secondary effects
are to increase the natural resonant frequency of the loop (wn)
and give a wider pull-in range from an out-of-Iock condition. The
+ R _ Vnonreg(min) -8.8
R
A
s-
20x10-3
loop will also tend to be underdamped with fast pull-in times,
producing good airplane flutter performance. However. as the
loop becomes more underdamped impulse noise can cause shock
excitation of the loop. Unlimited increase in the de loop gain will
also raise the noise bandwidth excessively causing horizontal jitter
with thermal noise. Once the dc loop gain has been selected for
Components RA, RS and CA are used for ripple rejection. If
the supply voltage ripple is expected to be less than 100 mV (for
a 30 Volt supply) then RA and RS can be combined and CA
omitted.
The output pulse width can be varied from 6 jJS to 48 jJS by
changing the voltage at Pin 8 (see Figure 5). However, care
should be taken to keep the lead lengths to Pin 8 as short as possi·
adequate S.P. E. performance, the loop filter can be used to produce
the balance between other desirable characteristics. Damping of
the loop is achieved most directly by changing the resistor RX
with respect to Ry which modifies the acldc gain ratio fm) of
the loop. Lowering this ratio will reduce the pull-in range and
ble to prevent ringing which can result in erroneous output pulses
at Pin 1 .. The parallel impedance of RD and RE should be close
to 1 k!l to ensure stable pulse widths.
noise bandwidth (fnn). (Note: very large values of Ry will limit
the control capability of the phase detector with a corresponding
reduction in hold-in rangeL
Static phasing can be adjusted simply by adding a small resistor
For 15 rnA drive at saturation
R
_ V nonreg - 0.3
F- 15x10-3
between the flyback pulse integrating capacitor and ground. The
sync coupling capacitor should not be too small or it can charge
during the vertical pulse and this may result in picture bends at
The oscillator free-running frequency is set by RC and CB
the top of the CRT.
connected to Pin 7. For values of RC» Rdischarge (R4 in Figure
NOTE:
6), a useful approximation for the free-running frequency is
In adjusting. the loop parameters, the following equations may
prove useful:
1
fO=--0.6 RCCS
RX
)(=Ry
Proper choice of RC and Cs will give a wide range of oscillator
frequencies - operation at 31.5 kHz for count-down circuits is
possible for example. As long as the product RCCB"" 10-4 many
combinations of values of RC and Cs will satisfy the free-running
frequency requirement of 15.734 kHz. However, the sensitivity
wn
of the oscillator (pi to control-current from the phase detector
is directly dependent on the magnitude of
Re. and th is provides a
=~
V(1
+)()T
)(2 Twc
K=---
4
8-128
T= Ry
Cc
where:
K = loop damping coefficient
MC1398P
l . . ___
N_G_C_I_R_C_U_IT_~
TV_C_O_L_O_R_P_R_O_C_E_S_S_1
TV COLOR PROCESSING
CIRCUIT
TV COLOR PROCESSING CIRCUIT
MONOLITHIC SILICON
INTEGRATED CIRCUIT
... a chroma IF amplifier with automatic chroma control, color killer,
dc chroma control, and injection lock reference system followed by
dc hue control.
MC1398P is a monolithic device designed for use in solid·state
color television receivers.
•
•
•
•
•
•
•
•
•
Minimum Number of External Components
DC Control of Both Chroma Ampl itude and Hue Shift
Crystal·Controlied Internal Feedback Oscillator
Built·in Noise Immunity
Schmitt Trigger Color Killer
Automatic Chroma Control
Internal Burst Gate and Gate Pulse Shaping Circuit
High Oscillator Lock·in Sensitivity
Built·in Supply Regulation
PLASTIC PACKAGE
CASE 646
FIGURE 1 - TYPICAL CHROMA APPLICATIONS CIRCUIT
(MC1398P. MC1326 and MPSU101
.Z5DVdt
ilANKING
INPUT
0.1""
;:.J,
t-J'"
Tl.
n·
TOPllf14
IMCI3S8f
CKROIAA
GAIN
Seo Fog.It 10 lor (ail ~.!a
See Packaging Information Section for outline dimensions.
8-129
MC1398P(continued)
MAXIMUM RATINGS (TA = +250 C unless otherwise noted I
Value
Unit
35
mAdc
Horizontal Pulse Input Current
250
IlA Peak
Power Dissipation (package limitationl
Derate above T A = +250 C
625
5.0
mW
mW/oC
Operating Temperature Range (Ambientl
-20 to +75
Storage Temperature Range
-65 to +150
vc
vc
Rating
Power Supply Current
E LECTRICA L CHARACTER ISTICS (VCC
= +20 Vdc RS = 390 ohms T A = +250 C unless otherwise noted I
Characterist ic
Regulated Voltage (IS
= 35
mAl
Min
Typ
Max
Unit
9.0
9.6
11.5
Vdc
-
9.2
-
0.8
1.75
-
V(p-pl
34
40
-
d8
(IS = 27 mAl
Maximum Undistorted Chroma Output, See Note 1 ,E(pin 31
= E(pin
141
Maximum Chroma Gain
E(pin 31 = E(pin 141, See Note 1
Automatic Chroma Control Range (ACCI
-3.0 dB down from maximum undistorted output ,see Note 1
d8
19
Chroma 8urst Level to Kill, See Note 1
Manual Chroma Gain Control Range
(6 V(pin 31 (V(pin 141 to 0 Vdcl
-
1.4
-
50
60
-
mV(p-pl
dB
Chroma Input Resistance
k ohms
2.3
Chroma Input Capacitance
-
13
Chroma Output Impedance
-
15
-
Horizontal Input Pulse
2.2
3.0
4.0
Oscillator Output
100
-
-
-
15
-
Oscillator Output Impedance
Hue Control Range
(6V(pin 121 (V(pin 141 to 4.3 Vdcl
pF
ohms
Vp
mV(RMSI
ohms
degrees
100
126
-
900
-
1200
Oscillator Pull-In Range
Hz
-
Oscillator Noise Bandwidth (fNI
Hz
Static Phase Error with Oscillator Detuning
degrees/Hz
-
25 mV(p·pl Burst Amplitude
2.0 mV(p-pl Burst Amplitude
0.20
0.25
-
-
Note 1: With 5.0 mV(p-pl burst input at pin 5
set E(pin 101 to just "unkill"
FIGURE 2 - MCI398P TEST CIRCUIT
lBOpF
"
OSCILLATOR
PEAKING
I.B k
1
REGULATED
VOLTAGE
1
14
1\
CHROMA
OUTPUT
4",
2.2k
2
i
CHROMA
CONTROL
-=- 10 k
-=-
r
~F
100~ OSC
1000 pF
5
10
1ST ACC FILTER
CHROMA
BYPASS 6
9
2ND ACe
FILTER
7
~
1
~
J...
HUE PHASE
SHIFT
I(
0,01
-'S
0.05pF
13
11
250pF
•
+20Vdc
!1.Bk
4
HORIZONTAL
INPUT
CHROMA
INPUT
t
AS = (VC~~ -9.2 kilohms
RS·390
MC139BP
B CRYSTAL
Ll: SEE FIGURE 10 FOR COIL DATA.
8-130
HUE
-:: CONTROL
OUTPUT
-----<
10k
120pF
4.7k
J~
15k
-U
O.OIIlF
i0
ACC/KILLER
CONTROL
O.05~F
~
"
470
5Jr
-=-
s:
(")
~
~
CO
FIGURE 3 - MCl398 CIRCUIT SCHEMATIC
."
8;:,
BIAS SECTION
CHROMA GAIN CONTROL
and OUTPUT
HUE CONTROt and
OSCILLATOR OUTPUT
~.
BIAS SECTION and VOLTAGE REGULATOR
;:,
c:
(1)
.e:
c:p
....
W
OSCILLA.TOR
MC1398P(continued)
TYPICAL CHARACTERISTICS
(T A = +25 0 C unless otherwise noted)
(Figures 4 through 9, See Test Circuit of Figure 2,)
FIGURE 5 - REGULATEO VOLTAGE
FIGURE 4 -INPUT/OUTPUT CHARACTERISTICS
2.8
2. 6
35
:; 2.2
~ 2. Of- E(pin 10)
--
Note 1
~ 1.8
'" 1. 6
>
./
1.4
f-
/
~
f- 1. 2
5
1.0
~ O. 8
~ 0.6 KILLER
'"u 0.4 ONr-'
0.2
2.0
V
10
I
I
30
15
50
200
100
S.O
6.5
CHROMA INPUT VOLTAGE (mVlp.pl)
7.0
180
5.0
6.0
=20 mV(p-p)
E(pin 10) =Note 1 'in
,
\
4.0
--
~IS0
............
7.0
8.0
9.0
8.5
9.5
10
FIGURE 7 - OSCILLATOR OUTPUT versus
PIN 12 VOLTAGE
160
""-.....,.
7.5
PIN 14 REGULATEO VOLTAGE (Vdc)
FIGURE 6 - HUE CONTROL OPERATION
0
l/
-
5~ JdC
20
J
7
I II
~d~
I
5.0
3.0
/
/6
KILLER
OFF
I-'
0
E(pin 3) = E(pin 14) ~
./
V
....
t:
o
IT
I
I
~2.4
'>
.§.
~ 140
~
"'\.: V-
-
~
~ 120
\\
ein = 20 mV(p-p) _
E(pin 10) = Note 1
f-
=>
'"~ 100
\..
8.0
'"
9.0
10
11
80
3.0
4.0
5.0
PIN 12 VOLTAGE (Vdc)
7.0
6.0
8.0
9.0
10
11
PIN 12 VOLTAGE (Vdc)
FIGURE 9 - TEMPERATURE STABILITY of the
MCI398 OSCILLATOR
(lIe only subjected to temperature change)
FIGURE 8 - STATIC PHASE ERROR
-....... r-....
+25
+20
~
+1 5
ffi
+1 0
'~
'"
'"'"w
'"
~
~
t;
-5.0
"'"
....... r-...."-
;- +5:0
w
~
Phase Error unacceptable
.....
~
"" ".~~
~
Phase Error perceptible
-10
-15
.(':0)
Phase Error unacceptable
-Pi
""'o~
e",o
"'.-
I"'"
-2 5
-80
-60
-40
-20
+20
+40
~
5q
"'v"
-20
-100
""
Phase Error perceptible
+60
-40
+80
+100
20
30
40
50
so
" '\
70
AMBIENT TEMPERATURE (oC)
FREUUENCY OFFSET (Hz)
8-132
80
90
100
MC1398P(continued)
FIGURE 10 - PRINTED CIRCUIT LAYOUT OF MC1398P, MC1326,and MPSU 10 TRANSISTORS
f-----------------sin·-------------------<·I
KILLER/ACC ADJUST
4 in.
NOTES:
All reslstofSM"e 1/4 WunlessotherwlSB
no~td.
(Cop!D8rSide Shown)
L1:
TOP
f-0.875J
0.25
SLUG
EXTRACTED ~
I
----l
~'1875
0.51-
I 1
::...l
J=-J
0.5 r--1-1.0~
¥
L1: 80TURNSOF
STANDARD #38 AWG
HEAVYPOLYTHERMALEZ
WIRE.
TAP
1
F}
}69.6TURNS
BOTTOM
VIEW
5.3 TURNS
COILCRAFT FORM #10·32 OR EaUIV
UNIVERSAL AWG #36 WIRE OR EaUIV
L - 26 j.lH
MC1398P APPLICATIONS INFORMATION
MC1398P is a multifunction circuit with considerable gain as-
sociated with the chroma amplifier and oscillator sections. It is
important to the circuit layout utilizing the MC1398P that the
chroma amplifier, oscillator, and oscillator output/hue section
INPUT
OUTPUT
It.
grounds are separated from each other. Ground loop problems
will interfere with oscillation stability and lock-up if this precaution is not observed.
Care must be exercised to avoid coupling from the oscillator
output to the crystal circuitry connected to pin 8. Stray coupling
of these two points can result in excessive oscillator shift; or in
some cases, oscillator drop-out during adjustment of the hue
control.
A suitable circuit layoutforthe MC1398P is shown in Figure 10.
An adjustable capacitor (1.5 -20 pF in parallel with a fixed
22 pF capacitorl is shown in series with the 3.58 MHz crystal. This
capacitor is used to adjust the oscillator exactly on frequency.
and ensures excellent oscillator lock-up. Hovvever. acceptable
oscillator performance can be obtained with a fixed value of capaci·
tance (this value is dependent on the designers' choice of crystalsl.
-
PRIMA~Y
SECONDARY
WINDING
WINDING
82 TURNS
55 TURNS
VIEWI
COl LCRAFT FORM #10·32 OR EaUIV
UNIVERSAL AWG #36 WIRE OR EaUIV
Lp = 12 ~H primary winding
LS = 8.8 ~H secondary winding
K - 0.4
This coil data is intended as an aid only. It is
expected that many designers will want to use
other approaches.
8-133
MC1398P (continued)
MC1398P CIRCUIT DESCRIPTION
The MC1398P is capable of providing the entire color processing
function between the second detector and the demodulator for
television color receivers.
A band pass filter from the second detector provides a 50 mV
(p-p) signal (for a saturated color bar pattern) at the input to the
first chroma amplifier stage (02. 03. 08. 09'- 8ecause of 02
emitter load resistor the input impedance is determined primarily
by the bias resistor (R3) and is about 2.3 kilohms. Since 02 is the
current source for the differential pair (03 and Ogl. the chroma
information will pass to the load resistor (R7) and then to the
second chroma amplifier (017'- To avoid overload of 017. the
maximum gain to 017 base is only X3 and by varying the bias at
the base of 09 it is possible to reduce the stage gain by 23 d8
without signal distortion; the signal being "dumped" by 09
collector into the supply. Since this automatic chroma control
action will vary the dc bias at 017 base the emitter load of 017 is
the current source 018. maintaining the de operating current. 018
collector is bypassed externally to prevent ae signal attenuation.
During picture scan time, the chroma signal passes through the
output level control amplifier (010.011.015.021). By changing
the bias on 011 and 015 bases the signal can either pass to the
output pin 2 or be "dumped" into the supply through 011· The
use of buffer stages 010 and 021 prevent distortion at low-signal
levels and the control range is better than 70 dB. The signal output
is also buffered by 014 and 020. thus providing a low impedance
drive of up to 2.0 V (p-p) to the demodulator. with an overall
gain between pins 5 and 2 of 40 dB. To enable the chroma signal
output to reach the amplifiers from 017 collector, 012 is held in
conduction by 05 which in the absence of any input on pin 4 is not
conducting.
This high collector voltage also holds 026 in
conduction, clamping the input to the burst channel and preventing
chroma information reaching the oscillator. During picture retrace
time, a positive-going 4.0 J.l.S pulse from the line sweep transformer
will turn 05 "on" and 07 "off". When 05 collector goes low.
012 will become "cut-off" preventing the burst signal at 017
collector from reaching the output pin 2_ At the same time, 026
turns "off" opening the burst channel. The high collector voltage
of 07 turns on 016 and 022. 016 passes the burst signal from
017 collector to the subcarrier regenerator and 022 "fills-in" for
Q12 during the gate period to prevent a dc shift in the pin 2
output voltage.
The gated burst signal is applied to the oscillator through 027
and 028. 029. 050 and 035 together with 027 and 028 form
an injection locked oscillator circuit. At series resonance of the
crystal connected to pin 8 the impedance of pin 8 is very low,
thereby reducing the 3.579545 MHz carrier level at the base of
050. The signal at the base of 029 is not reduced but the output
voltages in R33 and R42 will change. Any signals outside the
response band of the crystal will appear equally at 050 and 029
bases and be suppressed in the output by the differential amplifier
common-mode rejection ratio (about 40 dB),
To maintain
oscillation. a feedback signal with the correct phase is passed by
035 back to the input of Q27. Careful control of the resistor
ratios ensures that 029 and 050 are operated linearly with about
350 mV (p-p) at R33 and R42. due to self oscillation. A burst
signal as low as 2.0 mV (p-p) ~t the chroma input is sufficient to
cause the oscillator to lock to the reference phase and frequency.
As the burst amplitude increases. the level at 029 and 050
collectors changes and this shift is used to provide the automatic
chroma control function. 042 and Q45 form a modified differential
amplifier and with zero offset bias Q45 conducts most of the
current from 043. As an increasing burst level swings Q29 and
050 collectors, the ~urrent from 043 is shunted into 042. At a
point predetermined by the setting of the automatic chroma control
connected to pin 10. the composite lateral PNP of 047 and 046
will be biased into conduction. This amplifier has a gain of unity
and a filter capacitor (connected to 046 base) prevents any
tendency to oscillations. Diode CRg provides thermal compensation to ensure a steady color-killer threshold point. The increasing current through 013 emitter is used to control 09 base,
attenuating the input signal as the burst amplitude increases. The
current from 013 also keeps 019 in saturation. When the input
signal becomes too small for satisfactory COlor rendition, 013
current falls and Q19 comes out of saturation. This means 025
will saturate, clamping 021 base and "killing" the chroma output
stage. R24 in the Schmitt trigger circu it ensures that the colorkiller will have hysteresis to prevent fluttering between "on" and
"off" states.
The oscillator output voltages at R33 and R42 are used to
drive 038 and 039 into limiting so that as the burst amplitude increases the oscillator activity to around 700 mV (p-p), there will
be no change in the oscillator output amplitude at pin 13. 038 and
039 are used as current sources with a 1800 phase difference for
the differential pairs 030 and 031. 034 and 037. A small
capacitor attached externally to Q39 collector adjusts the total
phase difference to 135°. Since the signal appearing in the load
resistor R51 will be the vector sum of 031 and 037 signals,
varying the base bias of O~ and 034 will change the oscillator
output phase over the 135 range. 040 and 041 buffer the
oscillator output providing a low impedance drive at pin 13 for
the demodulator.
To minimize crosstalk between the burst and chroma channels,
separate bias chains are used. Further, the Qscillator bias chain
is zener regulated to prevent phase shifts in the' reference output
with power-supply variations.
8-134
,---",I
MC1446L
~,_______________S_E_N_S_E_A_M_P_L_IF_I_E_R__~
FOUR·CHANNEL LOW·THRESHOLD
SENSE AMPLIFIER
FOUR·CHANNEL
LOW·THRESHOLD
SENSE AMPLIFIER
... a sense amplifier designed to convert positive or negative 4.0 mV
signals from plated-wire memories to transistor·transistor logic levels
(MTTL). The problems encountered with ac·coupled plated-wire
sense amplifiers are eliminated with this direct·coupled sense amplifier.
•
Positive or Negative 4.0 mV Signal to Any of Four Input Channels
Produces a Logic t or 0 Output
•
•
Useful with the MCM700t NMOS Memory
Wired "OR" Capability at Amplifier Output Results in Fewer
Associated Circuits
•
t by 4 Internal Decoder Si mplifies Channel Selection
•
Fast Recovery Time from Overload Signals - 40 ns typ
•
Good Isolation Between ON and OFF Channels
•
Channel Select and Strobe Operate from Standard MTTL Levels
MONOLITHIC SILICON
INTEGRATED CIRCUIT
BLOCK DIAGRAM
TRANSFER
CHARACTERISTICS
~
3.0
2.5
0;;;;2.0
~
;::!:; 1.5
I
/
::>0
:=~t.O
~
.j
I
0.5
~6.0 -4.0 ·2.0
0 +2.0 +4.0 +6.0
Vin,lNPUT VOLTAGE (mV)
8
+ -
+
5
4
CIRCUIT ~HEMATIC
Vee
......
,......-""f""....,-~....,1"
2
---~--~~-,..-:<>16
\+5.0 V
50
3.0.
3.5t"
2.!'
See Packaging Information Section for outline dimensions.
8·135
MC1446L (continued)
MAXIMUM RATINGS (TA
= +250 C unless otherwise noted.)
Symbol
Rating
Power Supply Voltage
VCC
VEE
Value
Unit
+10
-10
Vdc
Differential Input Voltage
VID
±5.0
Volts
Common·Mode I nput Voltage
VIC
±5.0
Volts
Output Current
10
25
rnA
Power Dissipation (Package limitation)
Cera mi c Package
Derate above T A = +250 C
PD
575
3.85
mW
mW/oC
TA
o to.+75
uc
T stg
-55 to +125
-C
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS
(VCC
= +5.0 Vdc ±1%. VEE = -S.O Vdc ±1%. TA =
Characteristic
Voltage Gain
Output Voltage level
Figure
Symbol
1
AV
2
Vo
=0
ein = +4.0mV
ein = -4.0 mV
= OOc to +750 C
Input Bias Current
3
liB
Input Offset Current
3
110
Channel Select Current
4
High level
low level
5
Strobe Voltage
High level
5
Max
Unit
Vdc
-
1.4
2.4
-
0.4
-
15
SO
0.1
4.0
/loA
/loA
rnA
-
1.7
0.5
2.S
1.0
VCH
VCl
2.0
-
-
-
-
0.8
VSH
VSl
2.0
0.8
ICH
ICL
Channel Select Voltage
High Level
Low level
Typ
SOD
0.4
2.0
ein
TA
+250 C unless otherwise noted.)
Min
Volts
Volts
-
-
Strobe I nput Current
4
IS
-
30
150
/loA
Output Source Current
S
10+
4.0
8.0
-
rnA
Low Level
Output Sink Current
S
10-
-2.5
-4.0
-
rnA
Positive Supply Current
S
ICC
-
19
27
rnA
Negative Supply Current
S
lEE
-
-17
-24
Input Common-Mode Voltage Range
Channel Selected
7
VICR
Channels Not Selected
Input Differential·Mode Voltage Range
Channel Selected
Channels Not Selected
7
VIDR
rnA
Volts
-
+2.7
-1.0
+2.7
--6.0
-
-
±D.5
±2.0
-
-
-
Volts
-
SWITCHING CHARACTERISTICS
Propagation Delay Time
8
tPHL
Output Rise or Fall Time
8
tTLH.tTHL
Strobe Delay Time
9
Strobe Width (Min)
-
14
30
tdS
-
9
tS(min)
-
20
Channel Select Time
10
tCsel
14
Common·Mode Recovery Time (channel selected)
7
tCMR
Differential·Mode Recovery Time (channel selected)
8
tDMR
-
8-136
14
60
40
ns
ns
ns
ns
ns
ns
ns
MC1446L (continued)
TEST CIRCUITS
FIGURE 1 - VOLTAGE GAIN
FIGURE 2 - OUTPUT DC LEVELS
+5V ·6V
'04 V -0.4 V
If! I
+5V
-6V
'5V
13
10
±:"f"
±O.1%
--+H--<>-'-j
+3.5V
FIGURE 4 - CHANNEL SELECT AND STROBE
INPUT CURRENTS
FIGURE 3 - INPUT CURRENTS
+5V -6V.
lin=IAorla
IIO=IIA -181
FIGURE 6 - OUTPUT CURRENTS
FIGURE 5 - CHANNEL SELECT TRANSFER
CHARACTERISTICS
+5V
-O.3V +O.3V
+5V
990
±O.l%
-sv
-6V
+--+-.__-----o.!..j
.990.
0.1%
10
±D.l%
SWI inpoSl!lon 1 lor 10+
SWlmposltlOn2lorlo-
8-137
t3.5V
Ok
MCl446L (continued)
FIGURE 8 - CIRCUIT PROPAGATION DELAY, OUTPUT RISE AND
FALL TIMES, AND DIFFERENTIAL-MODE RECOVERY TIME
FIGURE 7 - INPUT COMMON-MODE CHARACTERISTICS
+5V -6V
.....
To
'oul
To ScapI
lin
SWlclosadlordifferentialmctder8Covsrytima.
8in=±500mV
FIGURE 9 - STROBE C.l.ARACTERISTICS
+5V
+3.Sv
FIGURE 10 - CHANNEL SELECT TIME
+0.3 V
-6V
+tiV -iV
990
t.O.l%
990
±0.1%
ToScop.
Chan.B
10
:1:0.1%
Input
To Scope
To Scope
Select
le.1
+300
~
50%
mV
10
Signal Input
Chan. 50%
A
50%
Input
TOScopemfUlioutPUI
rt
-r
3.5V
Chlnna':5L+
2~5V
50%
IS min
G,d
lin
tdS-
OUT~
IdS+
+3.5V
8-138
MC1446L (continued)
TYPICAL RECOVERY TIME WAVEFORMS
FIGURE 11 - COMMON-MODE RECOVERY TIME
FIGURE 12 - DIFFERENTIAL-MODE RECOVERY TIME
8-139
MC1446L (continued)
TYPICAL CHARACTERISTICS
IT A = +250 C unless otherwise notedt
FIGURE 14 - DC OUTPUT VOLTAGE LEVEL versus
TEMPERATURE (All Inputs Groundedl
FIGURE 13 - VOLTAGE GAIN versus TEMPERATURE
G
BOO
r--
'5c
~c
600
~
z
;;:
'"w
«
'"~
4.0 , - - - - , - - , - - , - - . . . , - - - , - - - - - , - - - , , - - - - - - ,
~
-- ---
~
~
f--+--+--t---+--II---+---t------i
~ 3.0
w
'"
«
~
~
400
2.0
f--+--+--t---+--II---+---t------i
1.0
f--+--+--+---+--I---+---t------i
~
!;
c
~
c
> 200
:>
«
ci
>
OL-__
o
-75
-50
-25
+25
+50
+75
+100
-75
+125
~
-50
__
~
__
~
__
-25
~
__
+25
~
__
+50
~
+75
__
~
+100
___"
+125
T, TEMPERATURE (OC)
T, TEMPERATURE (OCI
FIGURE 16 - CHANNEL SELECT versus OUTPUT
TRANSFER CHARACTERISTICS
FIGURE 15 - AMPLIFIER TRANSFER CHARACTERISTICS
4.0
4.0
3. 5
~c
_
crs
3. 0
~
w
~
«
'"
~ 2.0
/
~
c
1.0
/
ci
>
o
-B.O
'"
1/
>
!;
w
J
-4.0
2.5
2. o,---CHANNEL 1
(Pin 101_
~
1. 5
~
1.0
+2.0
+4.0
+6.0
o
+B.O
-25
G
2.0
~
,...
1.5
>
.,
3.0
"-
~ -1 5
I
c
>
2.5
~
~
"
c
ci
./
1.0
1.5
4.0
.....
!;
> -5. 0
0.5
3.5
.....,
-10
0.5
o
o
3.0
'in = 100 mV(rms)
I"r--,
~
I
II
c.l.0
2.0
"
~
:::>
1.5
-20
w
2.5
1.0
FIGURE 18 - COMMON-MODE GAIN _sus FREQUENCY
3.5
i'O
0.5
VC, CHANNEL SELECT INPUT VOLTAGE (VOLTS)
4.0
~
AMPLFIER INPUTS
CONNECTED TO APPROPRIATE
I
dC1VOLTAGIES
1-
-1. 0
-2.0
FIGURE 17 - STROBE INPUT TRANSFER
CHARACTERISTICS (Input High)
~
~
CHANNEL 2
(Pinll1
I
I
J
Vin, INPUT VOLTAGE (mV)
~
I
-
ir O. 5
,...
:::>
c
ci
> -0.5
...,/
-6.0
3. 0
2.0
2.5
3.0
3.5
4.0
0.4
VS(in), STROBE INPUT VOLTAGE (VOLTS)
0.6 O.B 1.0
2.0
4.0
6.0 B.O 10
f, FREIlUENCY (mHz)
8-140
" ""
20
40
MC1446L (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 19 - VOLTAGE GAIN versus FREQUENCY
100
I II
OJ
40
~
o
CHANNEL 1 (CHANNEL
2 SELECTED)
r-r-.
w
-
60
w
0
11
ein =100 mV (rmsl to
-
-20
OJ
OJ
'"~
!g
ein = 1.0 mV(rms)
~
z
-25
I II
80
;;:
FIGURE 20 - ADJACENT CHANNEL ISOLATION varsus
FREQUENCY
r'-
-1 5
I'
>
I-
r-
~
~
>
o
'"
>
::>
~
-10
6
-5.0
20
0.5
1.0
5.0
10
t-
0.5
50
1.0
f, FREQUENCY (MHz)
5.0
10
........
r-.
r-
50
f, FREQUENCY (MHz)
CIRCUIT DESCRIPTION
The MC1446L is designed to translate a positive 4.0 mV
6. The current in the second stage of the ampl ifier is set by
the lBO-ohm resistor in the emitter of the current source.
It can be seen that this resistor has one diode drop
(approximately 750 mV) across it. Therefore. an analysis
will show that the voltage drop across the 775-ohm load
resistor in the second stage will be approximately two diodes
when the differential amplifier is balanced. Accounting for
the additional diode voltage drop of the emitter-follower output transistor will set the output dc level at two diodes
above ground or very near the center of MTTL threshold.
signal from a plated wire memory to an MTTL "1" level, or a
negative 4.0 mV to an MTTL "0" level. This sense amplifier also
eliminates the requirement for a bipolar switch in series with the
plated wire because the bit selection is done inside the sense
amplifier.
The circuit operation can be described in sections as follows:
1. All channels have been designed for low input offsets 0.5 V typical.
2. Channel "ORing" is accomplished by using common collector load resistors for four differential amplifier pairs.
3. Channel
7. The strobe circuit works by steering current in the second
stage. When the strobe is low. the entire current of the second stage current source is steered through the 775-ohm
load resistor. This clamps the output to a low state so that
an input signal cannot cause an output. When the strobe is
high. the current is steered through the second stage differential amplifier pair and the output will go to a level
dictated by the presence of an input Signal.
selection is accomplished by current steering
through the four differential pairs. The circuit below the
four differential pairs forms a matrix tree which can be
thought of as a l-by-4 decode matrix. The bottom transistor
is the current source for the first stage of gain.
4. DC translation between the first and second stages of gain
;s done through an emitter-follower stage. two diodes and
another emitter follower for each side of the differential
amplifier. The currents in these translator legs are combined
and run through diodes to the negative supply. These
diodes are used to bias both the first and second gain stages.
This also gives the appropriate gain versus temperature and
dc output level versus temperature characteristics.
5. The top of the second stage amplifier is regulated at a voltage
equal to five diode drops above ground. It can be seen that
if the 700 ohm resistor in the regulator has one diode (or
VBE) across it then the 2.8 k ohm resistor will have four
diode drops across it. This makes a five diode drop voltage
above ground that is fairly independent of the positive supply.
8. The output circuit of the sense amplifier may be thought
of as a push-pull type. The emitter of the push transistor is
brought out to a separate pin from the collector of the
pull transistor. This will facilitate "Wire DRing" the outputs of several sense amplifiers. Several emitter outputs
can be wired together along with only one collector pulldown transistor. The unused collectors of the pulldown
transistor must be grounded. An example of the use of
"Wire DRing" is to have four MC1446 devices wired-OR into
a l6-channel sense amplifier in which a channel may be
selected by selecting channels in parallel at the amplifier
inputs and strobing the proper sense amplifier.
APPLICATIONS INFORMATION
The MC1446 is designed to convert signals as small as positive
or negative 4.0 mV to MTTL logic levels. The output level of the
sense amplifier with no in put signal presen t and with the strobe
high is typically 1.4 volts (typical input threshold of MTTL logicl.
Hence. if the strobe goes high during the absence of an input
signal from the plated-wire memory, the sense amplifier output
will rise to 1.4 volts. This condition could cause false outputs;
therefore careful considerations must be given to strobe timing.
Figure 21 illustrates a typical timing sequence of the MCI446
device as recommended for proper operation.
Figure 22 shows how these sense amplifiers are used in an
N-word-line-by-32-bit basic memory plane organized as 4-N words
of 8 bits each. During a read cycle. the read current is pulsed
through a selected word-line and thus generates o'utputs to all of
the 32-bit positions in the line. The internal one-of-four decoder
selects the desired channeis of the eight sense amplifiers for a
particular system word. When the strobe goes high. the sense
amplifier outputs switch aCCOrding to the data present at the amplifier inputs. The data readout on the other 24-bit lines is not lost
due to the Non-Destructive Read-Out properties of a plated-wire
memory. On the next read cycle the decoder of the sense amplifier
in combination with the selected word-line determines the a-bits
of data to read.
8-141
MC1446L (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 21 - TYPICAL TIMING SEQUENCE
Memory organizations that have more than four words per
vvord-line require that the sense amplifier outputs be wire..()Red.
To wire-OR the outputs of several sense amplifiers all of the
emitters of the output-pull up transistors are tied together. Only
one collector of the pulldown transistors is tied to the wire-O Red
emitters of the pullup transistors. The remaining pulldown tran-
sistors must be grounded as noted in Figure 23. Ten or more
sense amplifiers may be wire-ORad together without any reduction
in usable logic levels since only one sense amplifier per bit is on at
any given time. Variations in propagation delay time (tpd), versus
the number of wire-ORed sense ampHfiers and the output capacitance are given in Figure 24.
The fast propagation delay time and low threshold of the
MC1446 make it useful as the sense amplifier for the MCM7001
N-channel MOS memory_ The data output of the MCM7001 is
referenced around +7.5 volts; thus the po"",r supply inputs of the
MC1446. as well as the MECL-Ievel Channel Select and Strobe
inputs, are translated to MTTL and then referenced around this
level, as shown in Figure 25. The minimum 200 fJ,A current from
the memory generates an input of 20 mV which is easily detected
by the MC1446. The MC1446 otuput is a TTL-level signal with a
+7.5 volt reference. This signal can be translated back to MECL
levels with a zener diode as shown.
I
FIGURE 22 - N-WORD-LINE-BY-32-BIT MEMORY PLANE ORGANIZED AS 4-N WORDS OF 8 BITS EACH
I:j
III mI IJ 11111 [ 11I11 HI Illli :~
MEMORY PLANE
WORD
LINES
W2
WI
o
1 2 3
4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 2223
24 25 26 27
28 29 30 31
~~
TO DIGIT
DRIVERS
r--
r-r--
'--
r-r--
-
~
-
-
'---
fr fc fr
~l tl tl
~'~~'~ ~'~ ~~G\'~ ~'~~'~~w
STROBE
}
8-142
2-8IT
ADDRESS
MC1446L (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 23 - WIRED "OR" MC1446 DEVICES
Strobe
FIGURE 24 - TYPICAL PROPAGATION DELAY TIME VARIATION
(par number of devices at stated capacitancel
Vee
I
!w
20
'">-
19
;::
~
~ 18
....--+--;--0 VEE
From
MamoryPlane
~to
;::
~
/"--1--+-0 Vee
.-- .......
C - 50 pF
o
......
17
J...--
"
L
16
..}
--
~
I----
~ C= 25 pF
I"'"
~
"
f; 15
L
14
....---i----OVEE
o
10
NUMBER OF MC1446 DEVICES
(WIRED OR)
FIGURE 25 - SENSE AMPLIFIER FOR MCM7001 MEMORY
+7.5 V
+12.5 V
+1.5 V
15
16
MC1446
14
11
10
510
R = 100 Ohms
R R R R
510
t-....I-t-+-t-W"v--+--< +12.5 V
510
+7.5 V ------------~~............~*_+-t_+-'Vw---'
1/6·MC7417
~~~n~ o----o---l
~~~n~ o----<>---l
Strobe o----<>---l
3/4
1/6·MC7417
MC10125
1/6·MC7417
8-143
-5.2 V
510
510
510
-5.2 V
MC1446L (continued)
DEFINITIONS
AV
the voltage gain from a channel input to amplifier
output (input signal is 2 mV peak-to-peak and the
strobe is high I
tDMR
time required for the amplifier to recover from
maximum specified differential-mode input, (recovery-output within 10%of its quiescent state I
tdS
delay time from the 50% point of the strobe input
leading or trailing edge to the corresponding 50%
point of the output
tPHL
current from the positive supply with no load
(pin 12 shorted to pin 131
the delay time from the 50% point of a 5.0 mV
input leading edge to the 50% point of the
amplifier output
current into the negative supply with both channel
select pins at +3.5 volts
time between 10% and 90% points of the output
signal with a 5.0 mV input signal
CMVin maximum input common-mode voltage on any
channel that will not cause the amplifier to saturate
DMVin maximum input differential-mode voltage on any
channel signal that will not saturate the amplifier
ICC
input current into the base of any input transistor
when the opposite transistor of the differential
pair is at the same voltage
tSmin
minimum pulse width at 50% points at strobe
input allows a full output (pulse rise times of less
than 10 ns, amplifier differential input equal to
3mV)
VCH
minimum voltage required at the channel select
pin to cause a given channel to give 99% of the
maximum gain through the amplifier
VCL
maximum voltag~ allowable at the channel select
pin to cause a given channel to give 1% or less of
the gain when channel is fully selected
Vo
output dc level with inputs grounded and strobe
high
VOH
minimum output high level
VOL
maximum output low level
VSH
the minimum voltage required at the strobe pin to
allow 99% of a full output
VSL
the maximum voltage allowable at the strobe pin
to allow 1% or less of a full output
input current at channel select pin when the
channel select voltage is at V CH
input current at channel select pin when the
channel select voltage is at VCL
10+
10tCMR
tc sel
difference between base currents of any input
differential pair of transistors
output source current to a load with the output
remaining above2.4 volts,excludingthe amplifier's
own si nk cu rrent
the current that the amplifier will sink into pin 12
time required for the amplifier to recover from
the maximum specified common-mode input,
(recovery - output within 10% of its quiescent
statel
time between the 50% point of the channel gate
input and the 50% point of the signal input that
still allows a full width signal at the amplifier
output
8-144
~J
MC1488L
\
......_Ll_N_E_A_R_'_D_IG_I_T_A_L_I_N_T_E_R_F_A_C_E_C_I_R_C_U_IT_S---,
QUAD MDTL LINE DRIVER
RS-232C
QUAD LINE DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
The MC1488L is a monolithic quad line driver designed to interface data terminal equipment with data communications equipment
in conformance with the specifications of E IA Standard No. RS-232C.
'o-[Y-03 ::~"
Features:
•
Current Limited Output
±10 mA typ
•
Power-Off Sou rce Impedance
300 Ohms min
•
Simple Slew Rate Control with External Capacitor
•
Flexible Operating Supply Range
•
Compatible with All Motorola MDTL and MTTL Logic Families
:~,
07
f
,:~8
014
Vee
VEE
..
CIRCUIT SCHEMATIC
(1/4 OF CIRCUIT SHOWN)
VCC14o------------9---------------9-------.----------,
B.2k
PINS4,9, 120R 2
INPUT
INPUT
PINS5, 10, 13
70
JOO
OUTPUT
PINS6,8,l1 OR 3
3.6t
GND7~
10k
7k
70
VEE 1 o-----------_1~----_1~___________1~------_4-------"
TYPICAL APPLICATION
INTERCONNECTING
CABLE
LINE DRIVER
MCI488L
LINE RECEIVER
MC14B9l
.r - -, ""
-j
""1.. __ '"
,
(top view)
I
~
_
_'NTERCONNECTING I
MDTllOGIC INPUT ~
CABLE
~MOTllOGIC OUTPUT
See Packaging Information Section for outline dimensions.
8-145
CERAMIC PACKAGE
CASE 632
TO-116
01
MC1488L
(eontinued)
Maximum Rating ITA = +25 0 e unless otherwise noted I
Rating
Symbol
Value
Unit
+15
-15
Vdc
Power Supply Voltage
Vec
VEE
Input Signal Voltage
Vin
Output Signal Voltage
Va
±15
Po
1000
6.7
mW
mW/oC
Power aerating (Package Limitation, Ceramic Dual-In-Line Packagel
Derate above T A = +250 C
-15~Vin~
1/~JA
Vdc
7.0
Vdc
Operating Temperature Range
TA
a to +75
°e
Storage Temperature Range
T stg
-65 to +175
°e
ELECTRICAL CHARACTERISTICS IVce
=
+9.0 ± 1% Vdc, VEE
Characteristic
Forward Input Current
Reverse Input Current
= a Vdc)
(Vin = +5.0 Vdc)
(Vin
Output Voltage High
=
-9.0 ± 1% Vdc, TA
=
0 to +750 C unless otherwise noted.1
Figura
Symbol
Min
TVp
Max
Unit
1
IF
1.0
1.6
mA
1
IR
-
-
10
2
VOH
(Vin
= 0.8 Vdc, RL =' 3.0 kil, Vce = +9.0 Vdc, VEE = -9.0 Vdc)
+6.0
+7.0
-
(Vin
= 0.8 Vdc, R L = 3.0 kil, VCC = +13.2 Vdc, VEE = -13.2 Vdc
+9.0
+10.5
-
-6.0
-7.0
-
-9.0
-10.5
-
Output Voltage Low
(Vin = 1.0 Vdc, R L
(Vin
2
= 1.9 Vdc, RL = 3.0 kil, VCC = +13.2 Vdc, VEE = -13.2
Vdc)
: Positive Output Short-Circuit Current
Vdc
VOL
= 3.0 kil, Vee = +9.0 Vdc, VEE = -9.0 Vdcl
3
Ise+
+6.0
+10
+12
3
ISC-
-6.0
-10
-12
4
RO
300
-
5
ICC
-
+15
+20
(Vin
-
+4.5
+6.0
(Vin
-
+19
+25
-
+5.5
+7.0
-
+34
-
-
+12
Negative Output Short-Circuit Current
Output Resistance (Vce
VEE
= 0, IVa 1= ±2.0 V)
Positive SupplV Current (R I = 00\
(Vin = 1.9 Vdc, Vee = +9.0 Vdc)
= 0.8 Vdc, VCC = +9.0 Vdc)
= 1.9 Vdc, Vec = +12 Vdcl
(V in = 0.8 Vdc, VCC = +12 Vdcl
(Vin = 1.9 Vdc, VCC = +15 Vdc)
(Vin = 0·8 Vdc, Vee = +15 Vdcl
Negative Supply Current (R L - 00)
(Vin = 1.9 Vdc, VEE = -9.0 Vdcl
5
mA
mA
Ohms
mA
lEE
= 0.8 Vdc, VEE = -9.0 Vdcl
(Vin = 1.9 Vdc, VEE = -12 Vdcl
(Vin = 0.8 Vdc, VEE = -12 Vdcl
(Vin = 1.9 Vdc, VEE = -15 Vdcl
(Vin = 0.8 Vdc, VEE = -15 Vdcl
(Vin
-
-13
-
-17
-15
mA
-
-18
-23
rnA
-
-15
itA
-34
rnA
-
-
Power Dissipation
IVee = 9.0 Vdc, VEE = -9.0 Vdcl
(Vee = 12 Vdc, VEE = -12 Vdcl
..-
itA
Vdc
-
-
-2.5
itA
rnA
mW
Po
-
-
-
-
333
576
SWITCHING CHARACTERISTICS (Vcc = +9.0 ± 1% Vdc, VEe = -9.0 ± 1% Vdc, TA = +25 0 e.1
Propagation Delay Time ('1 = 3.0 k and 15 pFI
6
tPLH
-
275
350
ns
Fall Time
('1 = 3.0 k and 15 pFI
6
tTHL
-
45
75
n.
Propagation Delay Time ('1 = 3.0 k and 15 pFI
6
tPHL
110
175
n.
Rise Time
6
-
55
100
ns
('1 = 3.0 k and 15 pFI
8-146
tTLH
MC1488L
(continued)
CHARACTERISTIC DEFINITIONS
FIGURE 1 - INPUT CURRENT
+9V
FIGURE 2 - OUTPUT VOLTAGE
-9V
+9V
-9V
14
FIGURE 3 - OUTPUT SHORT-CIRCUIT CURRENT
Vee
FIGURE 4 - OUTPUT RESISTANCE (POWER-OFF)
VEE
+1.9 V
Ise -
I
Vo
±2Vde
±.6.S rnA Max
Ise +
+0.8 V
FIGURE 6 - SWITCHING RESPONSE
FIGURE 5 - POWER-SUPPLY CURRENTS
Vee
vin--D-----I-::-f-3k--.l--eVO
115
+1.9 V
PF
Logic
"1".1
+3V,-_ _ _'"\
1.5V
logic "0"
Vin
~
IPHL
~-------OV
V o - - -____
+O.BV
t'fHL--'-_ _ _.J'"--ITLH
ITHL and ITLH Moa.u,ed 10% 10 90%
VEE
8-147
MC1488L (continued)
TYPICAL CHARACTERISTICS
(TA = +250 C unless otherwise noted.J
FIGURE 7 - TRANSFER CHARACTERISTICS
FIGURE 8 - SHORT-CIRCUIT OUTPUT CURRENT
versus TEMPERATURE
versus POWE R-SUPPL V VOLTAGE
~ +12
+12
Vcc! VEE "I± 12V
+9.0
~
i5
vic
+6.0
-VE~
±9
t
+9.0
~
+6.0
z
~cc=JEe=+h
~
~ +3.0
t
a +3.0
t-
::0
~
o
~ -3.0
::0
-
'C. -S.O
o
>
-9.0
I
I
I
:~' ..
!=
::0
~V~
r3k
>
I-
•
o
Vin
I-
a
a:
-3.0
;;;
-=
t:
I
o
I
0.8V
0.2
0.4
O.S
0.8
1.0
1.2
1.4
l.S
1.8
-
-6.0
ISC-
~ -9.0
r
-12
o
.~
VEE=9V
x
-12
-
ISC+
+125
+75
+25
-55
2.0
T, TEMPERATURE (OC)
Vin, INPUT VOLTAGE (VOLTS)
FIGURE 10 - OUTPUT VOLTAGE
ANO CURRENT-LIMITING CHARACTERISTICS
FIGURE 9 - OUTPUT SLEW RATE versus LOAD CAPACITANCE
1000
+20
+16
«
]
'\
.s +8.0
~ 100
o
I-
w
::0
~ +4.0
a:
a:
~
S
~
~ I....-
+12
r--.
\.
'\.
'"
I10
~ -4.0
E~O
g
!2
~CL
-8.0
1.9 V
-12
Vin
-1S
1.0
1.0
11111111
10
II 11111
1,000
100
~
'"
•
ISC "
0.8 VI VCC = VIEE = ± 9 V
-20
-1S
10,000
-
-12
-B.O
-4.0
FIGURE 11 - MAXIMUM OPERATING TEMPERATURE
versus POWE R-SUPPL V VOLTAGE
0
16
..........
14
~
'"«
12
VCC I
I-14
0
10
I--
w
:;
>
~ 8.0
II:
I--
::0
'"a:
w
"tll
i!
6.0
I--
...........
3
3k
'"
i'...
6 3k
8 3k
11 3k
4.0
> 2.0
.;
>'-'
.11Jl
I-- - I VEE
-55
I
1+25
T, TEMPERATURE (OC)
8-148
+75
+125
lkO/ADlI:'
I--~
I ....
"'\:
1\
'\.
,~
""'\
~fvo
+4.0
VO,OUTPUT VOLTAGE (VOLTS)
CL, CAPACITANCE (pF)
~
- -
I\...
+8.0
+12
+16
MC1488L (continued)
APPLICATIONS INFORMATION
FIGURE 13 - POWER-5UPPL Y PROTECTION
TO MEET POWER'()FF FAULT CONDITIONS
The Electronic Industries Association (EIA) hes released the
RS232C specification detailing the requirements for the interface
between data processing equipment and data communications
equipment. This standard specifies not only the number and type
of interfece leads, but also the voltage levels to be used. The
MCI488L quad driver and its companion circuit, the MCI489L
quad receiver, provide a complete interfece system between DTL
or TTL logic levels and the RS232C defined levels. The RS232C
requirements as applied to drivers are discussed herein.
The requirad driver voltages are defined as between 5 and 15volts in magnitude and are positive for a logic "0" and nagative for
a logic ",". These voltages are so defined when the drivers are
terminated with a 3000 to 7ooQ-ohm resistor. The MCI488L meets
this voltage requirement by converting a DTLlTTL logiC level into
RS232C levels with one stage of inversion.
The RS232C specification further requires that during transitions, the driver output slew rate must not exceed 30 volts per
microsecond. The inherent slew rate of the MCI488L is much too
FIGURE 12 - SLEW RATE versus CAPACITANCE
FOR ISC = 10 mA
would be excessive. Therefore, if the system is designed to permit
10 00
low impedances to ground at the power-supplies of the drivers, a
diode should be placed in each power-supply lead to prevent overheating in this fault condition.
These two diodes. as shown in
Figure 13, could be used to decouple all the driver packages in a
system. (These same diodes will allow the MCI488L to withstand
00
momentary shorts to the ±25-volt limits specified in the earlier
=3IV'",
Standard RS2328.1 The addition of the diodes also permits the
MC1488L to withstand faults with power-supplies of less than the
9.0 volts stated above.
The maximum short-circuit current allowable under fault conditions is' more than guaranteed by the previously mentioned
10 rnA output current limiting.
11111
1.0
10
100
1000
Other Applications
10.000
C, CAPACITANCE (pF)
fast for this requirement. The current limited output of the device
can be used to control this slew rate by connecting a capacitor to
each driver output. The required capacitor can be easily determined
by using the relationship C = ISC x /l,T/aV from which Figure 12 is
derived. Accordingly, a 330-pF capacitor on each output will
guarantee a worst case slew rate of 30 volts per microsecond.
The interface driver is also required to withstand an accidental
short to any other conductor in an interconnecting cable. The worst
The MC1488L is an extremely versatile line driver with a myriad
of possible applications. Several features of the drivers enhance
this versatility:
1. Output Current Limiting - this enables the circuit designer
to define the output voltage levels independent of power-supplies
and can be accomplished by diode clamping of the output pins.
Figure 14 shows the MC1488L used as a DTL to MOS translator
where the high·level voltage output is clamped one diode above
ground.
The resistor divider shown is used to reduce the output
voltage below the 300 mV above ground MOS input level limit.
2. Power-Supply· Range - as can be seen from the schematic
drawing of the drivers, the positive and negative driving elements
of the device are essentially independent and do not require matching power-supplies. In fact .. the positive supply can vary from a
minimum seven volts (required for driving the negative pulldown
seetio!"!) to the maximum specified 15 volts. The negative supply
can vary from approximately ..:.2.5 volts to the minimum specified
possible Signal on any conductor would be another driver using a
plus or minus 15-volt, 500-mA source. The MCI488L is designed to
indefinitely withstand such a short to all four outputs in a package
as long as the power-supply voltages are greater than 9.0 volts (i.e.,
Vcc;;..9.0 V; Vee.;;;-9.0 V). In some power-supply designs, a loss
-15 volts. The MC1488L will drive the output to within 2 volts of
the positive or negative supplies as long as the current output limits
are not exceeded. The combination of the current-limiting and
supply-voltage features allow a wide combination of possible out-
of system power causes a low impedance on the power-supply outputs. When this occurs, a low impedance to ground would exist at
puts within the same quad package. Thus if only a portion of the
the power inputs to the MC1488L effectively shorting the 3()()'ohm
four drivers are used for driving RS232C lines, the remainder could
output resistors to ground. If all four outputs were then shorted
to plus or minus 15 volts, the power dissipation in these resistors
shows one such combination.
be used for DTL to MOS or even DTL to DTL translation. Figure 15
8-149
MC1488L (continued)
FIGURE 14 - MOTL/MTTL-TO-MOS TRANSLATOR
FIGURE 15 - LOGIC TRANSLATOR APPLICATIONS
+12V
MDTl 2
INPUT
MDTl
MTIl
INPUT
lc>----"""l"'k~---+------~---._0.7 V to 10 V
INPUT ~10~-<--/
12
MDTL n-..I-,---....
MMOS
P-+--<>......
INPUT ~130~:::;:::'-,J
-">/I>/I,--,--
-12V
8-150
+12V
10 k
MOS OUTPUT
-10 to 0 V
v
\ . LINEAR/DIGITAL INTERFACE CIRCUITS
MC1489L
MC1489AL
QUAD MDTL
LINE RECEIVERS
RS-232C
QUAD LINE RECEIVERS
INTEGRATED CIRCUIT
The MC1489 monolithic quad line receivers are designed to interface data terminal equipment with data communications equipment
in conformance with the specifications of E IA Standard No. RS·232C.
LOGIC DIAGRAM
•
'~313~11
I nput Resistance - 3.0 k to 7.0 kilohms
•
I nput Signal Range - ± 30 Volts
•
Input Threshold Hysteresis Built In
•
Response Control
aJ Logic Threshold Shifting
bJ Input Noise Filtering
2~
12~
45~'
~
Vee - __-----<014
40,------<0
':y'
CIRCUIT SCHEMATIC 1114 OF CIRCUIT SHOWN I
14
Vee
9k
5k
1.6 k
RF
3 OUTPUT
RESPONSE CONTROl2
t-....
3.55 k
INPUT 1
r......
10k
I RF
MC1489L
10 kH
MC1489AL
2 kH
7 GROUND
TYPICAL APPLICATION
LINE RECEIVER
LINE DRIVER
MC1489L
MC148BL
I
MDTL LOGIC INPUT
INTERCONNECTING
GABLE
~
I
-t--- MDTL LOGIC OUTPUT
I
See Packaging Information Section for outline dimensions.
8-151
CERAMIC PACKAGE
CASE 632
TO-116
7
MC1489L, MC1489AL
(continued)
MAXIMUM RATINGS (TA = +25 o C unless otherwise noted)
Symbol
Value
Unit
Power Supply Voltage
VCC
10
Vdc
I nput Signal Range
Yin
±30
Vdc
IL
20
mA
Po
1!8JA
1000
6.7
mW
mW!oC
TA
o to +75
vc
T stg
-65 to +175
Rating
Output Load Current
Power Dissipation (Package Limitation, Ceramic Dual In-Line Package)
Derate above T A = +25 0 C
Operating Temperature Range
Storage Temperature Range
ElECTR ICAl CHARACTERISTICS (Response control pin is open.) (VCC = +5.0 Vdc ± 1%, T A =
Negative Input Current
I nput Turn-On Threshold Voltage
(T A = +25 0 C, Vo L ,; 0.45 V)
Figure
Symbol
Min
Typ
Max
Unit
1
IIH
3.6
0.43
-
8.3
mA
(Vin = -25 Vdc)
(Vin = -3.0 Vdc)
1
-3.6
-0.43
-
-8.3
1.0
1.75
-
1.5
2.25
2
IlL
2
mA
-
Vdc
VIH
MC1489L
MCI489AL·
Input Turn-Off Threshold Voltage
(T A = +25 0 C, VOH ~ 2.5 V, I L = -0.5 mAl
a to +75 0 C unless otherwise noted)
(Vin = +25 Vdc)
(Vin = +3.0 Vdc)
Characteristics
Positive I nput Current
C
1.95
Vdc
VIL
0.8
Output Voltage High
(Vin = 0.75 V, IL = -0.5 mAl
(Input Open Circuit, IL = -0.5 mAl
2
VOH
2.6
2.6
4.0
4.0
5.0
5.0
Vdc
Output Voltage Low
(Vin = 3.0 V, IL = 10 mAl
2
VOL
-
0.2
0.45
Vdc
3
-
3.0
-
mA
-
20
26
mA
100
130
mW
Output Short-Circuit Current
0.75
0.75
-
1.25
1.25
MC1489L
MC1489AL
Power Supply Current
(Vin = +5.0 Vdc)
4
ISC
1+
Power Dissipation
(Vin = +5.0 Vdc)
4
PD
-
SWITCHING CHARACTERISTICS (VCC = 5.0 Vdc± 1%, TA
=
+250 C)
Propagation Delay Time
(RL = 3.9 kn)
5
tPLH
-
25
85
ns
Rise Time
(RL - 3.9 kn)
5
tr
-
120
175
ns
Propagation Delay Time
(RL=390n)
5
tpHL
-
25
50
ns
Fall Time
(RL = 390 n)
5
If
-
10
20
ns
8-152
MC1489L, MC1489AL (continued)
TEST CIRCUITS
FIGURE 2 - OUTPUT VOLTAGE
and INPUT THRESHOLO VOLTAGE
FIGURE 1 - INPUT CURRENT
+5 Vdc
•
14
OPEN
11
13
FIGURE 4 - POWER-SUPPLY CURRENT
FIGURE 3 - OUTPUT SHORT-CIRCUIT CURRENT
Vcc
II
FIGURE 5 - SWITCHING RESPONSE
FIGURE 6 - RESPONSE CONTROL NODE
or equiv
~------~--------~------.Eo
c.
1/4
MCl489A
tr and tf
RESPONSE NOOE
p-------------eVO
measured
10% - 90%
I,
1.5 V
C, capacitor is for noise filtering.
1.5 V
R, resistor is for threshold shifting.
CT'" 15 pF =total parasitic capacitance, which includes
probe and wiring capacitances
8-153
MC1489L, MC1489AL
(continued)
TYPICAL CHARACTERISTICS
= 5.0 Vdc,
(Vcc
TA
= +25 0 C unless otherwise noted)
FIGURE 8 - MCl489 INPUT THRESHOLD
VOLTAGE ADJUSTMENT
FIGURE 7 - INPUT CURRENT
6.0
+10
+8.0
;;0
.s
./
+6.0
V
+4.0
'"
'"
13
f-
~
~
~
w
..... V
f-
ili
+2.0
-4.0
V
-6.0
-B.O '"
-20
-15
-10
-5.0
3.
>
~
+5.0
I
I
I
+10
+15
+20
t;
D
~RT
f--
o ~5 k
fff-
~Vth
D
I
-10
-25
~
'''~
/
4.0
co
./
....- V
-2.0
II
2. 0
+5 V
-
'-
0
-3.0
4.0
-2.0
-1.0
:;
'"
3.0
D
>
~
2.0
I
RT
~
-
11k
D
6
-
t--
,-, -
D
-1.0
+1.0
~
I - - fo~
+2.0
+3.0
1.4
~
D
VIL -VIH
-2.0
1.6
>
I
-3.0
1.8
:;
D
1.0
>
co
«
.:tVth
f-
=>
w
RT
Vth
-5 V
1.2
'"rf-
1.0
0.8
~z
0.6
I----
+4.0
--
MCI4B9A VIH
(
I
-60
T, TEMPERATURE lOCI
VIH MCI489A
w
«
:;
D
>
1.0 I-- VIH MCI489
VIL MCI489
f--VILMCI489A
f-
~
'"
4.0
B.O
VCC, POWER SUPPLY VOLTAGE IVdc)
8-154
'-
-
12
MCI4~9A
VILl-
I
+60
~
'"w
'"
r
f-
+3.0
0.4
:i
;:; 0.2
co
r
+2.0
VIL
Mi l489
2:
D
-
~
MCI489 VIH
\
FIGURE 11 - INPUT THRESHOLD versus
POWER·SUPPLY VOLTAGE
:l
-
-
,,'-
-
Yin, INPUT VOLTAGE IVdc)
2.0
.:t Vth
-
VIL VIH
+1.0
-
~ 2.0
)
Y
RT
-
FIGURE 10 - INPUT THRESHOLD VOLTAGE
versus TEMPERATURE
2.4
2.2
RT
5k
Vth
+5 V
-
RT-
Yin, INPUT VOLTAGE IVdc)
6.0
~
w
f----- RT I - f----- 11 k I - Vth -5 V
~
1. 0
FIGURE 9 - MC1489A INPUT THRESHOLD
VOL TAGE ADJUSTMENT
co
y=
RT
1---
6
>
+25
RT
13 k
Vth
+5 V
Yin, INPUT VOLTAGE (VOLTS)
5.0
I
5 .0
+120
MC1489L, MC1489AL (continued)
APPLICATIONS INFORMATION
General Information
The Electronic Industries Association (E IA) hasreleased the AS-232C
specification detailing the requirements for the interface between
data processing equipment and data communications equipment.
This standard specifies not only the number and type of interface
leads, but also the voltage levels to be used_ The MC1488L quad
driver and its companion circuit, the MC1489L quad receiver,
provide a complete interface svstem between DTL or TTL logic
levels and the AS-232C defined levels. The AS-232C requ irements
as applied to receivers are discussed herein.
The required input impedance is defined as between 3000 ohms
and 7000 ohms for input voltages between 3.0 and 25 volts in
magnitude; and any voltage on the receiver input in an open circuit
condition must be less than 2.0 volts in magnitude. The MC1489
circuits meet these requirements with a maximum open circuit voltage of one VBE (Aef. Sect. 2.41.
The receiver shall detect a voltage between -3.0 and -25 volts
as a logic "1" and inputs between +3.0 and +25 volts as a logic "0"
(Ref. Sect. 2.3), On some interchange leads, an open circuit or
power "OFF" condition (300 ohms or more to groundl shall be
decoded as an "OFF" condition or logic "1" (Aef. Sect. 2.51. For
this reason, the input hysteresis thresholds of the MC1489 circuits
are all above ground. Thus an open or grounded input will cause
the same output as a negative or logic ", .. input.
Device Characteristics
The MC 1489 interface receivers have internal feedback from the
second stage to the input stage providing input hysteresis for noise
rejection. The MC1489L input has typical turn-on voltage of 1.25
volts and turn-off of 1.0 volt for a typical hysteresis of 250 mV.
The MC1489AL has typical turn-on of 1.95 volts and turn-off of
0.8 volt for typically 1.15 volts of hysteresis.
Each receiver section has an external response control node in
addition to the input and output pins, thereby allowing the designer to vary the input threshold voltage levels. A resistor can be
connected between this node and an external power-supply. Figures 6, 8 and 9 illustrate the input threshold voltage shift possible
through this technique.
This response node can also be used for the filtering of highfrequency. high-energy noise pulses. Figures 12 and 13 show
typical noise-pulse rejection for external capacitors of various sizes.
These two operations on the response node can be combined
or used individually for many combinations of interfacing applications. The MC1489 circuits are particularly useful for interfacing
between MOS circuits and MDTLlMTTL logic systems. In this
application, the input threshold voltages are adjusted (with the
appropriate supply and resistor values) to fall in the center. of the
MOS voltage logic levels. (See Figure 14)
The response node may also be used as the receiver input as
long as the designer realizes that he may not drive this node with
a low impedance source to a voltage greater than one diode above
ground or less than one diode below ground. This feature is
demonstrated in Figure 15 where two receivers are slaved to the
same line that must still meet the RS-232C impedance requirement.
FIGURE 13 - TURN-ON THRESHOLD versus CAPACITANCE
FAOM RESPONSE CONTROL PIN TO GND
FIGUAE 12 - TURN-ON THRESHOLD versus CAPACITA-NCE
FROM AESPONSE CONTAOL PIN TO GND
10
100
1000
10,000
10
100
1000
PW, INPUT PULSE WIDTH (nsl
PW, INPUT PULSE WIDTH (nsl
8-155
10,000
I
MC1489L. MC1489AL
(continued)
APPLICATIONS INFORMATION
(continued)
FIGURE 14 - TYPICAL TRANSLATOR APPLICATIONMOS TO DTL OR TTL
+5 Vdc
r-----I
\
L. __ "
I
OTL .rTTL
FIGURE 15 - TYPICAL PARALLELING OF TWO MC1489A RECEIVERS TO MEET RS.232C
VCC
RESPONSE-CONTROL PIN
INPUT
r---------- -I
112 MC1489
I
8k
9k
-----l
2k
I
OUTPUT
I
I
I
I
I
I
4_2k
-=-
VCC
2k
INPUT
I
8k
RESPONSE-CONTROL PIN
I
I
I
I
I
I
I
I
I
I
4.2k
I
_______ J I
-=-
8-156
OUTPUT
MC1506L
MC1406L
~~______________D_-_T_O_-A__C_O_N_V_E_R_T_E_R__~
Specifications and Applications
InforIllation
MONOLITHIC
SILICON INTEGRATED CIRCUIT
MONOLITHIC SIX BIT, MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
,.
CJ
... designed for use where the output current is a linear product
of a six-bit digital word and an analog input voltage.
•
Digital I nputs are MDTL and MTTL Compatible
•
Relative Accuracy - ±O.78% Error maximum
•
Low Power Dissipation - 85 mW typical @±5.0 V
•
Adjustable Output Current Scaling
•
Fast Settling Time - 150 ns 'typical
•
Standard Supply Voltage: +5.0 V and -5.0 V to -15 V
SIX BIT, MULTIPLYING
DIGITAL-TO-ANALOG
CONVERTER
CERAMIC PACKAGE
CASE 632
TO"116
FIGURE 1 - OUTPUT CURRENT SETTLING TIME
IALL BITS SWITCHED, RL = 50 !"II
FIGURE 2 - D-1o-A TRANSFER CHARACTERISTICS
2.0 V
2.0 rnA
OV
:
ornA
2.0 rnA
.I
, I1II
j
:==r
1.0mA
U
I
II
I
I
(000000)
100 ns/DIV.
INPUTWORD
(111111)
I
TYPICAL APPLICATIONS
•
Tracking A-to-D Converters
•
Stepping Motor Drive
•
Successive Approximation A-to-O Converters
•
CRT Character Generation
•
•
Digital-ta-Analog Meter Readout
Sample and Hold
•
Peak Detector
•
•
•
Programmable Gain and Attenuation
Digital Varicap Tuning
•
•
•
•
•
•
Digital Addition and Subtraction
Analog-Digital Multiplication
Digital-Digital Multiplication
Analog-Digital Division
Programmable Power Suppl ies
Speech Encoding
Video Systems
See Packaging Information Section for outline dimensions.
(MC1506 - Page 1)
8-157
MC1506L, MC1406L (continued)
MAXIMUM RATINGS (T A
= +25 0 C unl ..s otherwise noied.)
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+5.5
-16.5
Vdc
Digital Input Voltage
V5 thru Vl0
+8.0, VEE
Vdc
Vo
±5.0
Vdc
Rating
Applied Output Voltage
Reference Cu rrant
Reference Amplifier Inputs
112
5.0
mA
V12, V13
VCC, VEE
Vdc
1000
6.7
mW
mW/oC
-55 to +125
o to +75
°c
-65 to +150
°c
Power Dissipation (Package Limitation)
Ceramic Package
Derate above T A = +25 0 C
PD
Operating Temperature Range
TA
MCI506L
MCI406L
Storage Temperature Range
T stg
VM
.
ELECTRICAL,CHARACTERISTICS (VCC = +5.0 Vdc, VEE = -15 Vdc, :12= 2.0 mA, TA = Tlow' to Thigh' unless otherwIse noted.
All digital inputs at low logic levels)
Characteristic
Figure
Symbol
Min
Typ
Max
Relative Accuracy (Ertor ralitive to full scale 10)
10
Er
-
-
±0.78
%
Settl ing Tima (within 1/2 LSB [includesfdl T A = +25 0 C)
9
ts
-
150
300
III
Propagation Delay Time
TA = +25 0 C
9
tpHL,
tPLH
-
10
50
ns
Output Full Scale Current Drift
3,14
Vdc
VIH
VIL
3,13
-
-
0.8
0.5
+0.01
--1£
-
-0.002
-0.01
0
0
2.0
2.0
2.1
4.2
1.9
1.97
2.1
-
0
10
-
-
±0.4
-
2.0
-
PSRR (-I
-
0.002
0.Q10
ICC
lEE
-
+7.2
-9.0
+11
-11
-
85
176
120
240
3
113
lOR
Output Current
3'
1.000 krl
3
"
Output Voltage Compliance
(E r ';;±0.78% at T A = +250 CI
3,4,5
Reference Current Slew Rate
B,15
(TA = +25°CI
Output Current Power Supply Sensitivity
10
Power Supply Current
AI thru A6; VIL = 0.8 V
Al thruA6; VIH = 2.0 V
mA
0
, -0.7
3
10
mA
lo(mini
Vo
SR lref
",A
Vdc
mA/"s
(MC1506 - Pogo 2)
8-158
mAiV
mA
PD
Tlow = OOC for MC1406L
= -55°C for MCI506L
rnA
mA
3,11,12
Power Dissipation (all bits high)
VEE = -5.0 Vdc
VEE = -15 Vdc
'Thigh = +75 0 C for MCI406L
= +1250 C for MCI506L
-
-
Reference Input Bias Current (Pin 131
Output Current
(all bits highl
-
IIH
I
uutput ,",urrant Range
VEE = -5.0 V
VEE = -6.0 to -15 V
!:I 12 ~
2.0
-
Digital Input Current
High Level, VIH = 5.0 V
Low Level, VIL m'O.8 V
Vraf = 2.000 V,
PPM/oC
80
ITClol
Digital I nput Logic Levels
High Level, Logic "I" (MC1406L, MCI506LI
Low Level, Logic "0" (MCI406LI
(MCI506LI
Unit
mW
MC1506L, MC1406L (continued)
The MC1506L consists of a reference current amplifier,
and R-2R ladder, and six high-speed current switches_ For
many applications, only a reference resistor and a reference
supply voltage need be added.
The switches are inverting in operation, therefore a low
state at the input turns on the specified output current
component. The switches use a current steering technique
for high speed and a termination amplifier that consists of
an active load gain stage with unity gain feedback. The
termination amplifier holds the parasitic capacitance of the
ladder at a constant voltage during switching and provides
a low impedance termination of equal voltage for all legs
of the ladder.
The R-2R ladder divides the reference amplifier current
into binarily-related components which are fed to the
switches. Note that there is always a remainder current
that is equal to the least significant bit. This current is
shunted to ground, and the maximum current is 63/64 of
the reference amplifier current, or 1.969 mA for a 2.0 mA
reference current if the NPN current source pair is
perfectly matched.
BLOCK DIAGRAM
MSB
AI
A2
AJ
A4
A5
LSB
A6
REFERENCE
CURRENT
AMPLIFIER
H
Vref
o--+---1
COMPLETE CIRCUIT SCHEMATIC
(Digital Inputs; pins 5,6,7,8,9,101
(MC1506 - Page 3)
NPN CURRENT
SOURCE PAIR
BIAS CIRCUIT
MC1506L, MC1406L
(continued)
TEST CIRCUITS AND TYPICAL CHARACTERISTICS
FIGURE 3 - NOTATION DEFINITIONS TEST CIRCUIT
FIGURE 4 - OUTPUT CURRENT versus OUTPUT VOL TAGE
Vcc
~
Al:::
.01--- r A2-A6' High
L~W
RI2
Al
A2
OIGITAL
INPUTS
f
I
S·Bit Accuracy
@ 2~oC
MCI~06L
A3
MCI406L
A4
.0
R12" RI3
~V
A~
~
A6
I--.::O--:,----,.,_ _ _......v--'O'-.
0
~
Vin
--!-
J
OUTPUT
L-_,----'
+ 'lin
-2.0
-1.0
-I.~
-0.5
+0.5
+1.0
+1.5
+2.0
VO, OUTPUT VOLTAGE PIN 41Vdc}
10' KJ61
K1
Jii.}
1 2 +~+~+M+~+~}.
4 8 16 32 64
VI and II apply to inputs. A1
thru AS
L
~;~
AN = 0 if AN isal high level
AN = 1 if AN is: at low level
where K::!
and
FIGURE 6 - POSITIVE V,ef
FIGURE 5 - MAXIMUM OUTPUT VOL TAGE
versus TEMPERATURE
Vcc
+1 .0
.."
~ +0 .6
z
0:
~ +0 .2
\~ ~ I-'"""
A6
\
0
~
~
\ \ \ 1\ \ \ \ \\'
,1\ \
R~nge
1\ \ \
\ 1\ \for 6·Bit Accuracy \ \ 1\ \
A2
-0 .2
\
-0. 4
0-0.6
>
Allowable
\
A3
Vref
JL
14
MCI~06L
MCl406L
A4
~ ~ t--"
I+}
13
\
\ 1\ \
RI2
12
Al
~
+0 .4
~
o
R12" RI3
11
+0.8
A5
NC
10
RL
'::'
-10
Lr
-0. 8
-I. 0
+~O
-~~
+100
VEE
+150
T, TEMPERATURE IOC}
FIGURE 8 - REFERENCE CURRENT SLEW RATE
MEASUREMENT TEST CIRCUIT
FIGURE 7 - NEGATIVE V,ef
Vcc
Vcc
11
12
Al
A2
13
A3
MC1~06L
MC1406L
A4
14
-
R12", RI3
II
RI2
A2
RI3
J-c~.OV
14 20 pF
MCl506L
MCI406L
A4
Ik
-= Jvt=-L=~.omA
Slewing
1-:-='0-----,
A5
RL
10
Ik
13
A3
See text for values of C.
A~
A6
12
Al
Time
A6
Lr
-=
-=
RL' 50
-
:'ii
cr
cr
11
'-'
~
10
'"
cr
B.O
~
7.0
UJ
9.0
z
IEE-
cr
cr 8.0
::J
r--
1+ All bits high
--~
ICC-
'-'
~
~I
i5l
7.0
cr
I-_AII bits low
+ SOoC
'"
0
0-
+IOOoC +125 0 C
-
UJ
S.O
S.O
.s>UJ
8:: 9.0
::J
«
VCC = +5.0 V
VEP -15 V
13
12
::J
J
c-VCC +5.0 V
14
lEE
ICC
~
--
~~
f..-- r-
------f'::7
~
- - All bits high
S.O
S.O
o
-4.0
-S.O
-B.O
-10
-12
-14
VEE, NEGATIVE POWER SUPPLY (Vdc)
T, TEMPERATURE (OC)
(MC1506 - Page 5)
8-161
I
All bits low
-IS
""
MC1506L, MC1406L (continued)
TYPICAL CHARACTERISTICS (continued)
GENERAL INFORMATION
FIGURE 13 - LOGIC INPUT CURRENT .arsus INPUT VOLTAGE
Output Current Range
The output current maximum rating of 4.2 mA may be
used only for negative supply voltages below -6.0 volts,
due to the increased voltage drop across the 400-0hm
resistors in the reference current amplifier.
1. 0
«
\
EO. 8
\
I-
iii
~
i3 o. 6
\
Output Voltage Compliance
l-
s:
Z
\
o. 4
~
>
>=
«
The MC1506L current switches have been designed for
high-speed operation and as a result have a restricted out·
put voltage range, as shown in Figures 4 and 5. When a
current switch is turned "off", the follower emitter is
near ground and a positive voltage on the output terminal
can turn "on" the output diode and increase the output
current level. When a current switch is turned "on", the
negative output voltage range is restricted. The base of
the termination circuit Darlington amplifier is one diode
voltage below ground; thus a negative voltage below the
specified safe level will drive the low current device of the
Darlington into saturation, decreasing the output current
level.
For example, at +250 C the allowable voltage compliance
on pin 4 to maintain six-bit accuracy is ±O.4 volt. With a
full scale output current of 2.0 mA, the maximum resistor
value that can be connected from pin 4 to ground is
200 ohms.
\
\
ffi o. 2
z
1\
0
1.0
2.0
3.0
4.0
5.0
Yin, LOGIC INPUT VOLTAGE (Vdc)
6.0
7.0
B.O
FIGURE 14 - MSB TRANSFER CHARACTERISTICS
.arsus TEMPERATURE (MSB IS "WORST CASE")
1.4
1. 2
«
E
1. 0
t;;
\.
~
'" O.8
~
~ O.6
\
,
\
~
~ O. 4
1\
\
O.2
0
, ,
'\.
\OOC \-55 0 C
+1250 C\ +750 C\+25 0 C\
0.2
0.4
0.6
\
\
1\
1\ \
I \
\
\
\
\
\.
O.B
\
\
1.0
1.2
\
\
Accuracy
Absolute accuracy is the measure of each output current
level with respect to its intended value, and is dependent
upon relative accuracy and full scale current drift. Relative
accuracy is the measure of each output current level as a
fraction of the full scale current. The relative accuracy of
the MC1506L is essentially constant with temperature due
to the excellent temperature tracking of the monolithic
resistor ladder. The reference current may drift with
temperature, causing a change in the absolute accuracy
of output current.
\1\ 1\
\ \
I'\..'\ \
1.4
1.6
1.B
2.0
Yin, LOGIC INPUT VOLTAGE (Vdc)
FIGURE 15 - REFERENCE INPUT FREQUENCY RESPONSE
+2.0
I I 1111111
I I 1111111
I
A
.L i?"'J
Unless otherwise specified:
R12= R13= 1.0kn
-2.0
RL = 50 n(pin 4to GNO)
iii
:g
~ -4.0
Curve A: Large Signal Bandwidth
I
I
The best temperature performance is achieved with a
-6.0 V supply and a reference voltage of -3.0 volts. These
conditions match the voltage across the NPN current source
pair in the reference amplifier at the lowest possible voltage, matching and optimizing the output impedance of
the pair.
The MC1506L!MC1406L is guaranteed accurate to within ±1I2 LSB at +250 C at a full scale output current of
1.969 mAo This corresponds to a reference amplifier output current drive to the ladder of 2.0 mA, with the loss of
one LSB ; 31 IJ.A that is the ladder remainder shunted to
ground. The input current to pin 12 has a guaranteed
current range value of between 1.9 to 2.1 mA, allowing
~
i:~k-C\
B
II 1\
(Method of Figure 6)
Vref = 2.0 VIp-pI off ..t 1.0 V above GNO \
~ -6.0 Curve B: Small Signal Bandwidth
(Method 01 Figure 61
.1
>
Vrel = 50 mV(p·p) ollset 200mVaboveGNO
>=
-8.0 Curve C: Large and Small Signal Bandwidth
.\
(Method of Figure22with no op·ampl, Rl::; 50n)
RS=RL=50n
-10
III
1\
Vret=2.0V
Vs = 120 mV{p·pl centered at 0 V
0.02
0.1
0.2
1.0
2.0
I-
:::>
g
III
\
5.0
10
t, FREQUENCY (MHz)
(MC1506 - Page 6)
8-162
MC1506L, MC1406L (continued)
GENERAL INFORMATION (continued)
some mismatch in the NPN current source pair. The
accuracy test circuit is shown in Figure 10. The 12·bit
converter is calibrated for a full scale output current of
1.969 mAo This is an optional step since the MC1506L
accuracy is essentially the same between 1.5 to 2.5 mAo
Then the MC1506L full scale current is trimmed to the
same value with R 12 so that a zero value appears at the
error amplifier output. The counter is activated and the
error band may be displayed on an oscilloscope, detected
by comparators, or stored in a peak detector.
Two 6·bit D·to·A converters may not be used to construct a 12-bit accurate D-to·A converter. 12·bit accuracy
implies a total error of ±1/2 of one part in 4096, or
±O.012%, which is more accurate than the ±O. 78% specifi·
cation provided by the MC1506L.
MUltiplying Accuracy
The MC1506L may be used in the mUltiplying mode
with six·bit accuracy when the reference current is varied
over a range of 64: 1. The major source of error is the
bias current "Of the termination amplifier. Under "worst
case" conditions these six amplifiers can contribute a total
of 6.0 IlA extra current at the output termi nal. If the
reference current in the mUltiplying mode ranges from
60 IlA to 4.0 mA, the 6.0 IlA contributes an error of
0.1 LSB. This is well within six· bit accuracy.
A monotonic converter is one which supplies an increase
in current for each increment in the binary word. Typically, the MC1506L is monotonic for all values of reference
current above 0.5 mA. The recommended range for
operation with a dc reference current is 0.5 to 4.0 mA.
Settling Time
The "worst case" switching condition occurs when all
bits are switched "on", which corresponds to a high·to-Iow
transition for all bits. This time is typically 150 ns to
within ±.1/2 LSB, while the turn "off" is typically under
50 ns.
The slowest single switch is the least significant bit,
which turns "on" and settles in 50 ns and turns "off" in
30 ns. In applications where the D·to-A converter func·
tions in a positive·going ramp mode, the "worst case"
switching condition does not occur, and a settling time
of less than 150 ns may be realized.
Reference Amplifier Drive and Compensation
The reference amplifier provides a voltage at pin 12 for
converting the reference voltage to a current, and a turn·
around circuit or current mirror for feeding the ladder.
The reference amplifier input current, 112, must always
flow into pin 12 regardless of the setup method or reference
voltage polarity.
Connections for a positive reference voltage are shown
in Figure 6. The reference voltage source supplies the full
current 112. Compensation is accomplished by Miller feed·
back from pin 14 to pin 13. This compensation method
yields the best slew rate, typically better than 2.0 mAIlls,
and is independent of the value of R 12. R 13 must be used
to establish the proper impedance for compensation at
pin 13. For bipolar reference signals, as in the mUltiplying
mode, R 13 can be tied to a negative voltage corresponding
to the minimum input level. Another method is shown
in Figure 22.
It is possible to eliminate R13 with only a small sacri·
fice in accuracy and temperature drift. For instance when
high·speed operation is not needed, a capacitor is connected
from pin 14 to VEE. The capacitor value must be increased
when R 12 is made larger to maintain a proper phase
margin. For R 12 values of 1.0, 2.5, and 5.0 kilohms,
minimum capacitor values are 50, 125, and 250 pF.
Connections for a negative reference voltage are shown
in Figure 7. A high input impedance is the advantage of
this method, but Miller feedback cannot be used because
it feeds the input signal around the PNP directly into the
high impedance node, causing slewing problems and high
frequency peaking. Compensation involves a capacitor
to VEE on pin 14, using the values of the previous para·
graph. The negative reference voltage must be at least
3.0 V above VEE. Bipolar input signals may be handled
by connecting R12 to a positive reference voltage equal to
the peak positive input level at pin 13.
When a dc reference voltage is used, capacitive bypass
to ground is recommended. The 5.0 V logic supply is not
recommended as a reference voltage. If a well regulated
5.0 V supply which drives logic is to be used as the refer·
ence, R 12 should be decoupled by connecting it to +5.0 V
through another resistor and bypassing the junction of
the two resistors with 0.1 IlF to ground. F or reference
voltages greater than 5.0 V, a clamp diode is recommended
between pin 12 and ground.
If pin 12 is driven by a high impedance such as a
transistor current source, none of the above compensation
methods apply and the amplifier must be heavily compen·
sated, thus decreasing the overall bandwidth.
(MC1506 - Page 7)
8-163
I
MC1506L, MCl406L (continued)
APPLICATIONS INFORMATION
FIGURE 16 - OUTPUT CURRENT VOL TAGE CONVERSION
r--~--~
__~o-____~R~1~2~~
__--e
Vref
Vref = 2.0 Vdc
R12=R13,,1.0kU
Ro=5.0ka
Theoretical
Vo
Vf
------
Vo = R'l'2 (RO)(¥ +¥+¥+~ + ~+*,)= K Rol A}
Adjust Rref so that Vo with all digital inputs at
low level is equal to 9.844 volts.
RO
Vo =H (5 K)
(~+~+~+A +~+ s1r) = 10V (~) =9.844 V
An alternative method is to use the MC1539G and input
compensation_ Response of this circuit is also on the
order of 2.0 p.s. See Motorola Application Note AN-459
for more details on this concept.
Voltage outputs of a larger magnitude are obtainable
with this circuit which uses an external operational amplifier as a current to voltage converter. This configuration
automatically keeps the output of the MC1506L at ground
potential and the operational amplifier can generate a
positive voltage limited only by its positive su pply voltage.
Frequency response and settling time are primarily determined by the characteristics of the operational amplifier_
In addition, the operational amplifier must be compensated
for unity gain, and in some cases overcompensation may
be desirable.
Note that this configuration results in a positive output
voltage only, the magnitude of which is dependent on
the digital input_
The following circuit shows how the MLM301AG can
be used in a feedforward mode resulting in a full scale
settling time on the order of 2_0 p.s.
FIGURE 18
+15 V
35 pF
5k
10 k
-
10
(To pin 4
of MC1506L)
>--0---__ Vo
240
-15V
The positive voltage range may be extended by cascoding the output with a high beta common base transistor, Q1, as shown.
FIGURE 17
I
65 pF
5.1 k
10
(!7 ~6\!06l) ...---...--....-<>---1
o---O--......_Vo
The output voltage range for this circuit is 0 volts to
BVCBO of the transistor. Variations in beta must be
considered for wide temperature range applications. An
inverted output waveform may be obtained by using a
load resistor from a positive reference voltage to the
collector of the transistor. Also, high-speed operation is
possible with a large output voltage swing.
(MC1506 - Page B)
8-164
MC1506L, MC1406L (continued)
APPLICATIONS INFORMATION (continued)
Bipolar or Negative Output Voltage
Combined Output Amplifier and Voltage Reference
The circuit of Figure 20 is a variation from the standard
For many of its applications the MC1506L requires a
reference voltage and an operational amplifier. Normally
voltage output circuit and will produce bipolar output
the operational amplifier is used as a current to voltage
signals. A positive current may be sourced into the sumconverter and its output need only go positive, with the
ming node to offset the output voltage in the negative
popular MCl723G voltage regulator both of these functions
direction. For example, if approximately 1.0 mA is used
are provided in a single package with the added bonus of
a bipolar output signal results which may be described
up to 150 mA of output current, see Figure 19. Instead
as a 6-bit "l's" complement offset binary. Vref may be
of powering the MCl723G from a single positive voltage
used as this auxiliary reference. Note that RO has been
supply, it uses a negative bias as well. Although the referdoubled to 10 kilohms because of the anticipated 20 V
ence voltage of the MCl723G is then developed with
(p-p) output range.
respect to that negative voltage it appears as a commonmode signal to the reference amplifier in the D-to-A conFIGURE 20 - BIPOLAR OR NEGATIVE OUTPUT
verter. This allows use of its output amplifier as a
VOLTAGE CIRCUIT
classic current-to-voltage converter with the non-inverting
input grounded.
Vref
Since ±15 V and +5.0 V are normally available in a
combination digital-to-analog system, only the -5.0 V
need be developed. A resistor divider is sufficiently accurate since the allowable range on pin 5 is from -2.0 to
Va
-S.O volts. The 5.0 kilohm pulldown resistor on the amplifier output is necessary for fast negative transitions.
Full scale output may be increased to as much as 32 volts
by increasing RO and raising the +15 V supply voltage to
35 V maximum. The resistor divider should be altered to
comply with the maximum limit of 40 volts across the
MCl723G. Co may be decreased to maintain the same
ROCO product if maximum speed is desired.
Programmable Power Supply
The circuit of Figure 19 can be used as a digitally
programmed power supply by the addition of thumbwheel
switches and a BCD·to-binary converter. The output voltage can be scaled in several ways, including 0 to +6.3 volts
in O.l-volt increments, ±O.05 volt; or 0 to 31.5 volts in
O.5-volt increments, ±O.25 volt.
Polarity Switching Circu it, 6-Bit Magnitude Plus
Sign D-to-A Converter
Bipolar outputs may also be obtained by using a polarity
switching circuit. The circuit of Figure 21, gives 6-bits
magnitude plus a sign bit. In this configuration the operational amplifier is switched between a gain of + 1.0 and
-1.0. Although another operational amplifier is required,
no more space is taken when a dual operational ampl ifier
such as the MC155SG is used. The transistor should be
selected for a very low saturation voltage and resistance.
FIGURE 19 - COMBINED OUTPUT AMPLIFIER and
VOLTAGE REFERENCE CIRCUIT
RO
M" Al
A1
1
A
5
6
NC
1 NC
A3
MC1723G
2
i-<>--+-~-i
A5
5k
r - ----,
1O-f
I
A'
~
FIGURE 21 - POLARITY SWITCHING CIRCUIT
(S-Bit Magnitude Plus Sign D-to-A Converler)
CO'" 25 pF
I
I
I
>-t-.()..--+-eVa
lSB AS
FROM
+lSV
Vo
OUTPUT .....-~~.......'IV---<'--o-........ Vo
Vret!
Panel Meter Readout
The MC1506L can be used to read out the status of
BCD or binary registers or counters in a digital control
system. The current output can be used to drive directly
an analog panel meter. External meter shunts may be
necessary if a meter of less than 2.0 mA full scale is used.
Full scale calibration can be done by adjusting R 12 or Vref.
':' vee
10 = 101 -102 "
~Ile;~
{A} -
VEE
~r,e;~
{s}
DigilalSublrattion:
let Vre f1 = Vref2
RI21
VO"
RI22
~',';: RO I{Al - {of I
ProgrammabJeAmplifier:
ConnectdigilitlinpUISloA=B
Vo" 1JAllv""
_V""I
fRill
RI2Z
This digital subtraction application is useful for indio
cating when one digital word is approaching another in
value. More information is available than with a digital
comparator.
FIGURE 23- PANEL METER READOUT CIRCUIT
Bipolar inputs can be accepted by using any of the
previously described methods, or applied differentially to
R121 and R122 or R131 and R132. Vo will be a bipolar
signal defined by the above equation. Note that the circuit
shown accepts bipolar differential signals but does not have
a negative common-mode range. A vj!,ry useful method is
to connect R 121 and R 122 to a positive reference higher
than the most positive input, and drive R131 and R132.
This yields high input impedance, bipolar differential and
common-mode range. The compensation depends on the
input method used, as shown in previous sections.
(MC1506 - Page 10)
8-166
MC1506L, MC1406L (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 25 - DIGITAL SUMMING and CHARACTER
GENERATION
FIGURE 26 - PEAK DETECTING SAMPLE and HOLD
(F_ture. infinite hold time and optional digital output.)
Vr,'1
Vo
Vo =(101+1021 RO
.IV'.' {At.f v"" {.ll
Rl21
RI22
'0
Vraf2
In a character generation system one MC1506L circuit uses a
fixed reference voltage and its digital input defines the starting
point for a stroke. The second converter circuit has a ramp input
for the reference and its digital input defines the slope of the
stroke. Note that this approach does not result in a 12·bit D·to·A
converter (see Accuracy Section).
Positive peaks may be detected by inserting a hex inverter between
the counter and MC1506L, reversing the comparator inputs, and
connecting the output amplifier for unipolar operation.
FIGURE 28 - PROGRAMMABLE CONSTANT CURRENT SOURCE
FIGURE 27 - PROGRAMMABLE PULSE GENERATOR
Vee
Vtc
01
t--_ _ _voSL
(Oto 1 Voll
In !6mV Sleps)
AS
50
Fast rise and fall times require the use of high speed switching
transistors for the differential pair, Q4 and 05.
Current pulses, ramps, staircases, and sine waves may be generated
by the appropriate digital and reference inputs. This circuit is
especially useful in curve tracer applications.
Linear ramps
and sine waves may be generated by the appropriate reference
input.
FIGURE 29 - ANALOG DIVISION BY DIGITAL WORD
FIGURE 30 - ANALOG QUOTIENT OF TWO
DIGITAL WORDS
'0
Vtt --"""~"""-----<>--1
Vo
Nt
10 = CONSTANT
vo=w
NC
This circuit yields the inverse of a digital word scaled by a
constant. For minimum error over the range of operation, 10 can
be set at 621'A so that 112 will have a maximum value of 3.938 mA
for a digital bit input configuration of 111110.
Compensation is necessary for loop stability and depends on
the type of operational amplifier used. If a standard 1.0 MHz
operational amplifier is employed. it should be overcompensated
when possible. If this cannot be done, the reference amplifier
can furnish the dominant pole with extra Miller feedback from
pin 14 to 13. If the MC1723 or another wideband amplifier is
used, the reference amplifier should always be overcompensated.
101R121
Vref=~
102=
(MC1506 - Page 11)
8·167
~;~~
{ii}
-•
MC1506L, MC1406L (continued)
APPLICATIONS INFORMATION (continuecl)
FIGURE 31 - ANALOG PRODUCT OF TWO DIGITAL WORDS
(High-Speed Operation)
R121
12
Vref "'-"~-r--..
The circuit shown is a simple counter·
ramp converter. An UP/DOWN counter
and dual threshold comparator can be
used to provide faster operation and
continuous conversion.
11
v"' _-"R,.,I...2 _0"12"1
HEX
INVERTER
13
14
20 pF
R13
,
2
3
C - Vin/RO
- Vr8i7ifi2
(MC1506 - Pege 12)
8-168
LSB
MSB
. .C . -
MC1507L
MC1407L
\
......_ _ _ _ _
A_-T_O_-_D_C_O_N_T_R_O_L_C_IR_C_U_I_T_____
Specifications and Applications InforIllation
MONOLITHIC ANALOG - DIGITAL
CONTROL CIRCUIT
· .. designed for wide application in analog-to-digital, interface and
high-speed instrumentation systems. The MC1507L1MC1407L consists of a wide bandwidth operational amplifier and a high-speed,
dual-threshold comparator.
The comparator, which has separate Up and Down outputs, also
possesses a differential reference input that sets both comparator
thresholds for equal levels - but of opposite polarities.
ANALOG-DIGITAL
CONTROL CIRCUIT
MONOLITHIC SILICON
INTEGRATED CIRCUIT
The high slew rate of the amplifier makes it particularly advantageousfor use as a current-to-voltage converter for the MC1506L
and the MC1508L-8 D-to-A converters. Moreover, the operational
amplifier is useful as a high-speed buffer.
16
The MC1507L1MC1407L is well-suited for application with the
above-mentioned monolithic D-to-A converters to produce an inexpensive high-speed tracking analog-to-digital converter.
• Operational Amplifier Features High Slew Rate - 20 V/lls
typical and Wide Bandwidth - 24 MHz typical Unity Gain
Crossover
•
Fast Dual Threshold Schottky Comparator - 75 ns typical
Propagation Delay Time and Input Current of Only 0.4
IlA typical
•
MTTL and CMOS System Compatability
• Standard Supply Voltages of +5.0 and ± 15 Vdc
CERAMIC PACKAGE
CASE 620
• Compatible with MC1508L-8 and MC1506L D-to-A Converters
• Comparator Thresholds Simultaneously Adjustable with a Single
Reference Input Voltage
FIGURE 1 - MC1507L/MC1407L BLOCK DIAGRAM
FIGURE 2 - TYPICAL APPLICATION 8-BIT TRACKING
A-TO-D CONVERTER
Rm
CLOCK INPUT
.--t-"M...-,
UP
OUTPUT
OFFSET
ADJUST
v"
VEE + - - - POWER
Vc
GROUND
COMPARATOR
INPUT
lS8
MSB
DIGITAL OUTPUT
TYPICAL APPLICATIONS
•
•
•
•
•
•
High-Speed Tracking A-ta-O Converters
Successive Approximation A-to-O Converters
Speech Conversion
DAC Current-to-Voltage Converter
Control Systems
Signal Generators
See Packaging Information Section for outline dimensions.
8-169
•
•
•
•
High-Speed Buffer
Window Comparator
Peak Detecting Sample and Hold
Voltage-to-Frequency Conversion
•
Fast Integrator
•
Delta Modulation
I
MC1507L, MC1407L (continued)
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted.)
Symbol
Value
Unit
Vlogic
VCC
VEE
+5.5
+16.5
-16.5
Vdc
Differential I "put Voltage Signal
Amplifier Voltage
Comparator Vol.tage
Comparator Reference Voltage
V16 - V15
V6- V5
V11- V4
±10
±10
±5.0
V
Common-Mode I nput Voltage Swing
Amplifier Voltage
Comparator Voltage
Comparator Reference Voltage
VICRA
VICRC
VICRCref
VeC.VEE
Vlogic. VEE
Vlogic. VEE
V
tsc
lU
s
1000
6.0
mW
mW/oC
Rating
Power Supply Voltages
Logic Voltage Supply
Positive Voltage Supply
Negative Voltage Supply
Amplifier Output Short-CIfCUlt Duration
Power Dissipation (Package Limitationl
Po
Ceramic Dual In-line Package
Derate above T A = +250 C
Operating Temperature Range
uc
TA
-55 to +125
o to +75
MC1507L
MC1407L
Storage Temperature Range
T stg
-65 to +150
FIGURE 3 - CIRCUIT SCHEMATIC
COMPARATOR
COMPENSATION
Vee
14
13
A~~i~~iR
12
(_I
IN(~~TS
6
•
8-170
5
Vlagic
10
°c
MC1507L, MC1407L
(continued)
ELECTRICAL CHARACTERISTICS
IVee = +15 Vdc, VEE = -15 Vdc, Vlagic = +5.0 Vdc, Vre!I+1 = 40 mVdc, V6 = V4 = 0 V,
TA
= +250 C unless otherwise
noted.)
AMPLIFIER SECTION
Characteristic
Unit
mV
VIV
-10 V, RL = 5.0 k!1,
1,2
2,5
4,0
0.06
Output Voltage Swing IR L = 5.0 knl
V16 = -10 Var Av = +1 mode, TA = +25 a e
V16 = -10 V or Av = +1 mode, TA = Tlaw to Thigh
V16=OV,TA =+25 a e
V16=OV,T
Unity Gain Crossover Frequency
Compensated for Unity Gain
e13 = 10 pF, (Pulse Margin = 35a etypicall
Open-Loop Noncompensated
= 00
I
Large·Signal Step Response
Gain = +1, Vin = Ota 10 V ISee Figure 16)
Slew Rate
Settl ing time to within 0.1 %
Gain = +1, Vin = -10 to +10 V ISee Figure 161
Settling time to within 0.1%
Gain = -1, Vin = 0 to -10 V
Slew Rate
Settling time to within 0.1%
Gain = -10, Vin = 0 to -10 V
Slew Rate
Settling time to within 0.1%
Gain = -10, Vin = 0 to -1.0 V
Slew Rate
Power Supply Sensitivity
Vec varied ±Hl%, VEE constant
VEE varied ±Hl%. Vee constand
'Tlaw = -5sOC for MC1507L. oOe for MC1407L
'Thigh = +l25a C for MC1507L. +75a C for MC1407L
COMPARATOR SECTION
Input Bias Current
TA = +25 a C
TA=Tlaw'taT
8-171
0.30
0,46
jJ.A
MC1507L, MC1407L (continued)
ELECTRICAL CHARACTERISTICS (Vcc = +15 Vdc, VEE = -15 Vdc, Vlagic = +5.0 Vdc, Vref(+1 = 40 rnVdc, V6 = V4 = 0 V,
T A = +25 0 C unless otherwise noted.)
COMPARATOR SECTION (cantinuedl
Unit
V
V
rnA
ns
76
75
1.0
1.0
rnV/V
+16,5
-16.5
+5.5
Vdc
rnA
+16'
+8.0.
-16 '
+25
190
290
32,5
486
rnW
-.
+4;0
.-10.
VEE = -5.0 V
V EE=-15V
Note 1. Amplifier Output Swing decreases with reduced
swing voltages are typically ±2.0 volts.
Vee
and VEE supply voltages. At ±5.0~volt supplies, common-mode and output
'Tlaw = -5fiDc for MCI507L, OOc for MC1407L
Thigh = +125a C for MC1507L, +75a C for MC1407L
THREE-QUADRANT OPERATIONAL AMPLIFIER
active filter applications, the amplifier is especially useful since it offers four-quadrant operation with very
wide bandwidth.
The amplifier is a single-gain stage especially designed for
high gain and fast response. Very high impedance current
sources provide a typical resistance of 20 megohms at
pin 13, which is ,the gain node of the circuit and its
major RC pole. The input of the amplifier is protected
against breakdown of the NPN differential pair, and the
output is short-circuit protected. Since the amplifier is a
single-gain stage with all NPN transistors in the signal
path, it has one limitation when compared with standard
operational amplifiers. The amplifier transfer characteristic, Figure 4, shows that the output can swing no more
negative than -2.0 volts with respect to the inputs.
Hence, the circuit is called a three-quadrant operation'al
amplifier. The amplifier may be used as a standard operational amplifier in the noninverting unity gain mode
with an output swing of ±11 V minimum, and as an inverting amplifier to convert negative voltages to positive
voltages. For output swings under 4.0 volts (p-p). as in
FIGURE 4 - TYPICAL TRANSFER CHARACTERISTIC FOR
THREE-QUADRANT OPERATIONAL AMPLIFIER
OUTPUT
VOLTAGE
(VOLTS)
OIFFERENTIAl
-~=~ql--+--+-
8-172
INPUT VOLTAGE
!mY)
MC1507L, MC1407L (continued)
TEST CIRCUITS AND WAVEFORMS
FIGURE 6 - THREE·QUADRANT OPERATIONAL
AMPLIFIER PULSE RESPONSE WAVEFORMS
(Applicable to Circuits of Figures 8 or 15)
FIGURE 5 - OPERATING MODESOF THE THREEQUADRANT OPERATIONAL AMPLIFIER
(Av
RL
= 5.0 kn,
CL (total)
= 100 pF)
INVERTING AMPLIFIER
NONINVERTING AMPLIFIER
i",,_RI
~
.
~
= -1,
16
>
Q
3>
UNITY GAIN FOLLOWER
(~12·VOLT
•
SWING)
Lfb+
o
RI
Av=-Rir!
.n
NOTE: Output swill1l' mlln now
go more than 2.0 V below the
inputvoltagt.
1.01's/DIV
FIGURE 8 - INVERTING GAIN SETTLlNG·TIME
TEST CIRCUIT
FIGURE 7 - SETTLING TIME DEFINITION
S~~~~~G
~
JUNCTION - - - . . : . TO SCOPE (~:25 pF TOTAL)
OUTPUT
lOpF
INPUT
ovt~
- ,..tI,lsetlg = time from 50% of input puiS! to when the output
Settling lime is measured 10 within 10.0011
oftinalvalulalfalsesummingjunction.
settltswithinanerrorb8ndof~O.I%.
FIGURE 9 - AMPLIFIER PROPAGATION DELAY WAVEFORMS
no VI (1/2) = S.O mV
FIGURE 10 - PROPAGATION DELAY TIME TEST CIRCUIT
IOpF
tpdt inaes.sto 20 nlwith Vin = :1:200 mV
NOIe: The unity gain circuit of Figur! 14yieldsnurly identical mults.
50 mV!DlV
8-173
•
MC1507L, MC1407L (continued)
AMPLIFIER GAIN SELECTION
INVERTING MODE
NONINVERTING MODE
FIGURE 12 - VOLTAGE GAIN ;;;'+2
FIGURE ll-VOLTAGEGAIN>I-21
C=5,OpF
C"5.0pF
Cnolraquireil
r---If---,
forAv;;.:-51
,Rin
V" .....""',..+.-o---l
Va
Va
FIGURE 13 - VOLTAGE GAIN
FIGURE 14-VOLTAGEGAIN=+1
~-1
~
5
-
12
16
Vm
Vo
+
13
*1O,F
MmHllum compol\I!nts. wI!h Vin = -10 to +10 V step,
Minimum components, $lew rate 5.0 Vlplwith Vin = 0 to -10 V step.
slewtBoosetllesloO.l%m2.0jls.
FIGURE 15 - VOLTAGE GAIN
slews end seltlesto 0.1% III 1.81'5.
~-1
FIGURE 16 - VOLTAGE GAIN = +1
10pF
10pF
Va
Va
Optimum settling lime. with Vln = -10 to + 10 V step. slews and
settles 10 0.1"., In 1.1111 Wllh Vm - 0 to + 10 V, slews and settles
mO.BllsandJ.OdBlJanOwldlh = 14MHl.
Optimum settling lime: with Vln . 10 V step, slews and
seltiestoO 1% m800 05,
FIGURE 17 - OFFSET VOLTAGE AOJUSTMENT
5
~
-
12
16
•
1
1
3
10k
8-174
.
MC1507L, MC1407L (continued)
ADJUSTABLE DUAL THRESHOLD COMPARATOR
COMPARATOR
FIGURE 18 - COMPARATOR EQUIVALENT CIRCUIT
The comparator equivalent circuit is shown in Figure 18.
It may be envisioned as two comparators with common
inputs and a reference voltage source which sets equal
and opposite thresholds. A positive reference voltage on
pin 11 sets the thresholds as in the transfer characteristic
of Figure 19. If, for example, pin 6 is grounded, when the
input signal on pin 5 exceeds Vth (+), the UP output
goes high. When the inputon pin 5 exceeds Vth (-) in the
negative direction, the DOWN output goes high.
V ll1
6
VIO= V5 - V6
In applications where a single output is desired, as in a
window comparator, the outputs may be connected in
"wired OR" ·if the reference voltage polarity is reversed.
This inverts the output polarity so that when the input is
between thresholds the outputs are in a normal high
state. It also interchanges the outputs so that pin 7 reo
sponds to an input of Vth (+), and pin 9 to an input of
Vth (-). See Figure 20, which is the transfer characteristic
curve. When the outputs are connected together, a low
output state results for an input outside the threshold
window.
E ~ M,smalth EHOI
See ElectrICal CharacteristiCS Tables
FIGURE 20 - COMPARATOR TRANSFER CHARACTERISTIC,
NEGATIVE REFERENCE VOLTAGE
FIGURE 19 - COMPARATOR TRANSFER CHARACTERISTIC,
POSITIVE REFERENCE VOLTAGE
'0
DOWN OUTPUT
5,QV
UP OUTPUT
Vo
DOWN OUTPUT
~.O
UP OUTPUT
v
OUlputscanlJe "wrred OR" for window
campBratoraplilicahons.
Vlh= Vrel'e
At Vth(+!.OOWN output goes low
AT VIIl{+I. DOWN Output Goes Low. Relerence Figure 28.
OPERATION OF OPERATIONAL AMPLIFIEROR COMPARATOR ONLY
FIGURE 21 - INDIVIDUAL AMPLIFIER OPERATION ONLY
FIGURE 22 - INDIVIDUAL COMPARATOR OPERATION ONLY
Vlogic OR GND
Vlagic
COMPENSATION Vee Va
13
1412
4
10
"
"
OffSET
VEE
ADJUST
Pin TO can be grounded only if VEE is below -10 volts. The
connection betwal!ll pins9and 11.inStJresthilllhBcomparator will
not be in the aClive region when Vlogie isuwd.
8-175
MC1507L, MC1407L
(continued)
TYPICAL CHARACTERISTICS
(T A
=
+25 0 C unless otherwise noted.)
FIGURE 24 - TYPICAL SOURCE CURRENT LIMIT
versus TEMPERATURE
(OPERATIONAL AMPLIFIERI
FIGURE 23 - OPEN-LOOP FREQUENCY RESPONSE
(OPERATIONAL AMPLIFIERI
100
31
'\.
0
18
'\
'\.
0
r--
""
0
I
'\.
100
1.0 k
100 k
10 k
'\
1.0M
10M
100M
-75
-50
-25
18
~
16
'"
14
'"
G
i
TYPICAL POWER SUPPLY CURRENT
versus VEE
i
-
4. 0
4
I
2
+75
+100
t----- (----- r--
I
1
I
I
+150 +175
+115
r--
ICC
r--
0
0
1
-15
0
-75
-20
-55
-25
+25
+50
+75
+100
+125
+150
T, TEMPERATURE lOCI
FIGURE 27 - COMPARATOR RESPONSE
versus INPUT OVERDR IVE
FIGURE 28 - COMPARATOR THRESHOLD versuSVref
320
h
;;
300
.§:
0
w
p
'"~
200
a
10 mV
20 mV-
>
V. /"" / '
I-
1i:
1\ \
7'lL
r-I /, / r- 2 mV
1 II ' " 5 mV
2 mV
;-- , \ \" r-10 mV
5mV-
'"
~\ i'- 20 mV
100
comparator application,
Vth(+) and VthH are within ±E of avolts.
0
ts
lEE
I
VEE, NEGATIVE POWER SUPPLY IVdc)
5. 0
r--
0
-10
-5.0
'logic
0
'iC-j
I
r-
0
I
o
-
t--
6
IEl~
2. 0
o
8
111OQIC.-
10
th
+50
0
'" 8. 0
6.0
+25
FIGURE 26 - POWER SUPPLY CURRENT
versus TEMPERATUR E
1
12
~
~
o
T, TEMPERATURE lOCI
20
~
--.....
4.0
f, FREQUENCY (Hzl
FIGURE 25
r--.. r-
8.0
1\
10
r-- t---.
'\
0
0
1.0
:::::-- ~
100
100
200
300
400
500
300 310
600
Vre!. REFERENCE INPUT VOLTAGE (mVI
t, TIME Insl
8-176
+175
MC1507L, MCl407L (continued)
TYPICAL CHARACTERISTICS
(continued)
FIGURE 29 - COMPARATOR THRESHOLD
versus TEMPERATUR E
60,-----,---,------,------,
;;;:
.s
g
40~----+---+------r----~
o
~
~
"t-t~
20~----~--~------~------~
~
.c
:>
~5~5------L---+~2~5----~+7~5~---+~12~5
T, TEMPERATURE IOC)
APPLICATIONS INFORMATION
FIGURE 30 - SINGLE THRESHOLD COMPARATOR
=:F
ov
FIGURE 31 - WINDOW COMPARATOR
lJlJ
v."____"O--1
UP
+Vref
FIGURE 32 - D·TO·A CURRENT·TO·VOLTAGE CONVERTER
(POSITIVE OUTPUT)
'.
FIGURE 33 - D·TO-A CURRENT·TO·VDLTAGE CONVERTER
(BIPOLAR OUTPUT)
Msa
lS8
Al A2 AJ A4 AS AS A7 AS
MSB
lSB
Al A2A3A4A5A6A7A8
lDpF
10pF
R1414
>--<>-+.... vo
MC15D8l·B
15
-Vre!
RO =ZR14
16
dalas_tnt
10 k
-15\1
Leave pin 1 open lor
VEE'" +5V
10~VEE";;
16.5V.
Va fallQe
~irCLiit
IS
from-Vref 10 f.Vref -1 lSBL Pins 15and 16arehigh·
Imped.1nce Inputs so -Vre! may be derived b~ a resistive divider tram
ground tn 8 statile negative supply (reference Figure 34}.
If pin 1 isgroundBd,a clamp diode istecommended from pin 4 10
ground to keep the MC1508L·8
from inlllfnally saturating.
8-177
offset
VO=O Vlor
BinaryhlputlODOOOOO
40pF
+5V
IS
binary code
R1'
2.5k O.'IJF-X
recommended
value.
5k
Output
Settliny time to Q.I%typltIIl I.5I's.
MC1507L, MC1407L
(continued)
APPLICATIONS INFORMATION (continuedl
TRACKING A-TO-D CONVERTERS
step of 16 J.1A instead of a J.1A, and the summing node
would pull back to -40 mV instead of zero. If the com·
parator thresholds were closer to ground than ±40 mV,
this transition would cause the DOWN comparator to
fire and the D·to-A current would decrease. Thus the
system would oscillate between two output values for
this particular transition. This mayor may not be undesirable, depending on system requirements. Both outputs would be within ±1 LSB of the correct value,
which is a standard A·to·D converter accuracy specification. However, the end of conversion feature described
in a later section cannot be used unless the system settles
to a stable value.
With thresholds of ± 1 LSB, the system has a typical
hysteresis of ± 1 LSB, as shown on the transfer
characteristic of Figure 35. If the input voltage is ramping
up and has just fired the UP comparator, the summing
node pulls back to a typical value of zero. With a change
in ramp direction, the input must decrease by 1 LSB to
fire the DOWN comparator. This hysteresis allows for
D-to-A converter error and also lends noise immunity to
the system.
An A-to·D converter using a O-to-A converter in its
feedback loop cannot be any more accurate than the ac·
uracy of the D-to·A converter plus 1/2 LSB quantization
error. In the case of the MC150BL-8, MC1408L·B,
MC1506, and MC1406, this D-to·A accuracy is specified
as ± 1/2 LSB. In a tracking converter with the comparator thresholds set to zero, the A·to-D converter output
toggles between two values, each value within ±1 LSB of
the correct value. The ± 1/2 LSB error of the D·to-A
converter is added to the ± 1 LSB error of the converter,
resulting in a system error of ±1 1/2 LSB. The comparator offset or mismatch error (±E) can be trimmed out
and eliminated as a source of additional error.
If the MC1507 comparator thresholds are set to ±1
LSB, the ±1/2 LSB of the D-to-A converter must also
be added, again, giving a system error of ± 1 1/2 LSB.
In addition, the comparator mismatch error, (+E). must
be added to both the UP threshold and the DOWN threshold.
In order to insure thresholds of at least ±40 mV,
Vref for the comparator should be no lower than ±44
mV for the MC1507L and ±50 mV for the MC1407L.
This results in an additional ±0.2 LSB error in the
MC1507L and an additional ±0.5 LSB error in the
MC 1407 L. Total system error for an 8-bit converter, with
±1 LSB threshold to eliminate toggling and to improve
noise 'immunity, is therefore ± 1.7 LSB for a system with
the MC1507 L, ±2.0 LSB for a system with the MC1407 L.
A tracking A-to-D converter is a system with a digital
output which continuously follows the analog input. It
can be thought of as an "analog-to-digital operational
ampl ifier" since as a system it has many sim ilar specifications: slew rate, propagation delay, settling time, and
adjustable scale factor. The tracking converter is normally
used in high-speed applications which require conversion
times on the order of l-to·l 00 J.1s.
Successive approximation conversion is the other
major method used for A-to-D conversion in this speed
category. The advantages of the tracking system over
successive approximation system include: 1) the elimination of the sample and hold function at the input,
2) a digital output which is continuously present and can
be used in asynchronously sampled systems, and 3) a
conversion or update period equal to slightly more than
one D·to-A converter settling time. The major disadvantage of the method is that if the system slew rate
is exceeded, the conversion time increases. A full scale
input step function requires a conversion time of 2 n
times the tracking update rate, where n is the number of
bits. The full-scale conversion time can be shortened,
however, using methods which will be described later,
and shown in Figure 36.
Another advantage of the track ing system is that,
unlike the successive approximation approach, the output
always indicates a value equal to the present or very
recent input level. Therefore, in many instances latches
or special timing are unnecessary for data readout.
BASIC 8-BIT SYSTEM
An easily constructed tracking A-to-D converter using
the MC1407L, two up/down counters, a quad NAND
gate, and a monolithic D-to-A converter such as the
MC1406 or MC140BL-B is shown in Figure 34. Assuming
a full scale input range of 10 volts, the reference voltage
is chosen so that the UP and DOWN thresholds are at
least ±1 LSB from ground. For an a·bit converter, this
would be 10 V /256 or ±40 mV. The converter operation
is described by assuming that Vin = 0 and the counter
output is 00000000. The D-to-A converter is pulling no
current so the drop across R in is essentially zero. Now
assume Vin rises until it reaches 40 mV, which is the UP
comparator threshold. The UP comparator fires and on
the next positive edge of the clock, a pu Ise is fed to the
UP input of the counter. As shown in the converter
transfer characteristic, the counter output increases to
00000001. The D-to·A converter now pulls B J.1A, so the
summing node voltage drops down to zero. In a similar'
manner the system could count up to any value up to
the full scale 11111111 count.
Since the O-to-A converter output current levels are
rated to be accurate to within ±1/2 LSB, the comparator
thresholds must be set to allow for this error. If, for
instance, all the D-to-A converter error occurred at one
transition, one output could be 1/2 LSB or 4J.1A low and
the next would be 4 J.1A high. This wou Id be a current
High-speed operation is possible with this converter
due to the use of current summing. No operational
amplifier is used in the feedback loop, so the principal
delays involved are the D-to-A converter settling time and
the comparator delay time. The loop delay in Figure 34
is approximately 500 ns, allowing 150 ns for the
MC1507L comparator with a small overdrive. The maximum clock frequency is determined by the loop delay.
8-178
MC1507L, MC1407L (continued)
APPLICATIONS INFORMATION (continued)
Using a clock with a period less than 500 ns would make
TYPICAL PERFORMANCE TABLE FOR BASIC 8-BIT SYSTEM
it possible for two counts to enter the D-to-A converter
2-MHz CLOCK
5-MHz CLOCK
before the UP comparator turns "ofL" The turn "on"
(for continuously
(for de or step
time of the MC1508L-8 current switches is longer than
varying inputs)
inputs)
the turn "off" time so with a clock of slightly over
Normal Conversion
2 MHz, the steps on the up side of the sine wave of
0.2 - 1.0 Ils
0.5 IlS
or Update Time
Figure 38 would be twice as large_ However, even
Tvpical Full-Scale
though a faster clock provides only l-bit resolution
128 IJS
50 IJs
Conversion Time
when tracking a sine wave, the system will still settle to
Slew Rate
8-bit accuracy for dc or square wave inputs_ This
0.2 V/J.l5
0.08 VI",
(10 V Input Range)
principle is used in the high speed system of Figure 36_
Power Bandwidth
2.6 kHz
6.4kHz
When a clock frequency of greater than 2 MHz is used,
110 Vlp-p) Input)
a 100 pF capacitor between the UP and DOWN comparator outputs improves the overall settling time_
FIGURE 34 - TRACKING A-TO-D CONVERTER: BASIC 8-BIT SYSTEM
Vlogic
~
2 MHz (SEE TEXT)
AT EQUILIBRIUM:
lin
114
Vin/Rm
lin_
:v;;,TR14
ANALOG Vin
INPUT
Oto+l0V
NO SAMPLE AND
HOLD NEEDED
A1S=R14
Vre fH=R14(2mA)
A14
14
MC1408L.8
AI.
10
11
AS A1 AS AS
LSB
A4 AJ A2 AI
MSB
DtGITALOUTPUT
FIGURE 35 - 8-BIT TRACKING A-TO-D CONVERTER
TRANSFER CHARACTERISTIC
111111111
{L
11111 110
11111101
111111 (J 0
0000011 0
00000101
r+--'
00000100
r+--'
00000011
r+--'
000000 l O r + - '
o0 0 0 0 0 0 1
o0 0 0 0 0 0 0
o~~=~~~
CamparatDrThresholdp 'I LSB
allOWing -112 LSB D-to-A
convener error and hysteresIs
for nOI'Se Immunity.
~
~~~~
INPUT VOLTAGE {mV)
8-179
MC1507L, MC1407L (continuedl
APPLICATIONS INFORMATION (continued)
multivibrator quadruples its clock rate, and the system
switches to the "Panic Mode". When the summing node
comes back within 130 mV of ground, the system
resumes its normal clock rate and cleanly settles into
the tracking mode.
The Panic Mode system is well suited to multiplexed
data acquisition systems where the voltage presented to
the input may step quickly between various levels. Also,
the power bandwidth has quadrupled and the system will
follow 25 kHz full scale sine waves with slightly more
distortion than when in the normal tracking mode_
HIGH-SPEED SYSTEM
When the input voltage to the tracking A-to-O converter varies more rapidly than the system slew rate, the
output will be unable to follow the input and thus there
is no need for the O-to-A converter to settle between
each clock pulse. A second MC1507L may be employed
as a window detector to indicate when the converter
summ ing node is more than a given voltage from the
comparator deadband, as shown in Figure 36. When the
window detector fires, the MC4024 voltage controlled
FIGURE 36 - TRACKING A-TO-D CONVERTER HIGH-SPEED SYSTEM (With Panic Mode Operation and Voltage Reference)
ANALOG Yin
OTO tiD V
NO SAMPLE·AND·
HOLD NEEDED.
S.H
390
510
10
11
"
A4 A3 A2 Al
AS A7 A6 A5
LSB
DIGITAL OUTPUT
""
FIGURE 37 - TRACKING A-TO-O CONVERTER WAVEFORMS
WITH STEP INPUT
II
OV~
L
V,"1OV
TYPICAL PERFORMANCE TABLE FOR
HIGH-SPEED SYSTEM
Normal Conversion
Update Time
Tvpical Full-Scale
Conversion Time
Slew Rate
(10 V Input Range)
Power Bandwidth
10 V(p-p) Input
2 MHz/S MHz
CLOCK
(for continuously
varying inputs)
5 MHz/20 MHz
CLOCK
(for dc or step
inputsl
0.51's
0.2 - 11's
32,us
14#0'9
(SeecircunofFigllre36)
0.32 VII'S
0.8 VII'S
END OF
CONVERSION
lSeeFtgure46)
10.4 kHz
25.6 kHz
UP
COMPAAATOR
DOWN
COMPARATOR
----.Jn L - - -
IL
------'
PANIC~
.
COMPARATOR
CONVERTER
OUTPUT
(ANALOG
EQUIVALENT!
TIME_
8-180
MC1507L, MC1407L
(continued)
APPLICATIONS INFORMATION (continued)
FIGURE 38 - BASIC 8-BIT TRACKING A-TO-D
CONVERTER SINE WAVE RESPONSE
FIGURE 39 - EXPANDED PORTION OF FIGURE 3B
>
o
:>
""
N
200/ls/DIV
CLOCK FREQUENCY = 2.0 MHz
Digital output has been converted to analog using an
ultra-high-speed D-to-A converter.
FIGURE 40 - BASIC 8-BIT TRACKING A-TO-D
CONVERTER STEP RESPONSE
III
>
o
""
.,.;
I
- -
II
==
I
!
:>
FIGURE 41 - HIGH-SPEED 8-BIT TRACKING A TO 0
CONVERTER STEP RESPONSE
..
II
-- ..-
II
>
o
. i i i--
I'
iIIiII
R!!
iii
I
-.
=-=:=-t-
:>
iIIIIII- ililllllill
""
.,.;
-1.:'1
20/lS/DIV
CLOCK FREQUENCY = 5.0 MHz
~-~_'11 1Ilt-_~. -. - - It201's/DIV
Clock Frequency increases from 5.0 MHz to 20 MH z with voltage
controlled MC4024 in Panic Mode operation.
TYPICAL PERFORMANCE DATA
FOR 6-BIT SYSTEM
G·BIT TRACKING A·TO·D CONVERTER
A G-bit tracking A-to·D converter may be constructed
with the MC 1506_ The circuit differs in one respect from
the 8-bit system since the MC1506 has inverting logic
inputs. In order to preserve negative feedback in the
loop, a hex inverter may be used ahead of the D-to·A
converter_ However, if inverted logic outputs can be
tolerated, the hex inverter is not necessary. By merely
interchanging the UP and DOWN comparator outputs
the counting direction is inverted, compensating for the
inversion in the D-to·A converter.
The MC1506 has a faster settling time and one·fourth
the number of output states, so the advantage of this
system is higher speed.
BASIC-SYSTEM
3 MHz CLOCK
(for continuously
varying inputs)
Normal Conversion
or Update Ti me
Typical Full-Scale
Conversion Time
Slew Rate
(10 V Input Range)
Power BAndwidth
10V(p-p) Input
8-181
0.33 J.l.s
21
J,lS
PANIC MODE
SYSTEM
5 MHz/20 MHz
CLOCK
(for dc or step
inputs)
0.2 - 1.0 I's
4.0 IJs
0.5 Vll1s
3.3 VII'S
16 kHz
105 kHz
MC1507L, MC1407L (continued)
APPLICATIONS INFORMATION (continued)
TRACKING CONVERTER SYSTEM OPTIONS
FIGURE 42 - UP/DOWN COUNTER WITH
SINGLE·CLOCK INPUT
FIGURE 43 - BIPOLAR INPUT
1 mAj
(SEE TEXT FOR AMPLIFIER
COMPENSATION) .
CLOCK INPUT
Vrel(+)
R,
UJPp_jr~
__________~____{.mffim~-'
rUP/DOWN
R2
Tocoullters
and gales.
MC14516 CMOS
COUNTER
OR EQUIV
7
MCl40ll OR EQUIV
R1
Vref(+)
TO O·TO·A
R14
14
Trim Rinor R1410rlull
Vlogic
MCl408L·8
scalecalibratioll.
Trim RS for lero adjust.
CONVERTER
The Inverters on the comparator oulput may beehmina.ted by re·
verSing the reference voltage polarity, with the result 01 ~ somewhat
longerpropagallondelay.
Fromcounlers.
10
11
15
R15
FIGURE 44 - NEGATIVE INPUT
12
FIGURE 45 - DIFFER5NTlAL INPUT
R1
9k
Yin
9k
(SEE TEXT FOR AMPLIFIER
COMPENSATION)
R14
14
RI5
15
MC140Bl·8
10
11
12
3
END OF CONVERSION
A useful feature of the dual threshold tracking A·to·D
converter is a simple method of sensing end of con·
version. When the system has reached equilibrium the
summing·node voltage is in the comparator deadband
and both UP and DOWN outputs are low. These outputs
can be fed to an OR gate to provide an EOC indication,
or to three NAND gates as shown in Figure 46. This is a
feature which is not available with a single threshold
system, since its comparator is continually changing state.
If the A·to·D converter data is stored in latches, the
EOC output can be fed to a NAND gate with the latch
strobe command to insure accurate data transfer. If the
strobe command occurswhile the system is searching, the
output from the previous conversion will be retained.
However, an advantage of the track ing system is that,
unlike successive approximation, its output always reo
flects a value equal to the present or very recent input
level.
VEE
~
-10 to -15 V
Input Cammon Mode Range ~ +4.0 V to -10 V. O·to·A converter
positive output range can be increawd bycascode transistor assho wn
in MC1508L·8 data sheel. Common·made range would then be
110volu.
FIGURE 46 - END OF CONVERSION OPTIONS
UPCOMPARATOR
DOWN COMPARATOR
p
rn
UP
COMPARATOR
b=r
+5V
rn
OOWN
COMPARATOR
8-182)
MC1507 L, MC1407L (continued)
APPLICATIONS INFORMATION (continued)
PEAK DETECTING TRACK AND HOLD CIRCUIT
WITH DIGITAL OUTPUT AND INFINITE HOLD TIME
The basic tracking A-to-D converter may be used as a
positive peak detecting track and hold system by disabling the DOWN counting function. This may be performed by gating or by eliminating the DOWN connections. The system may be reset to zero by the counter
reset or by re-enabling the DOWN function, shorting the
converter input to ground, and allowing the output to
track to zero. If the DOWN gate is disconnected from the
MC74193 counter, this counter input must be connected
high to allow proper functionin~ of the UP counter.
A negative peak detecting track and hold system is
implemented by modifying the input of the above circuit
to accept negative input signals, as shown in Figure 47.
FIGURE 47 - DIGITAL TRACK AND HOLD
Anv 01 the tracklnq A 10·0 ~on~~rters may be used ,n
the !Jack and hold funcllon by merely stopping the
clock when a digital uutput ISlO beheld
GATING CLOCK
CONVERTliHfCO~
COMM4.ND
TO A TO n CONVERTER
CLOCK INPUT
CLOCK
DISABLING CLOCK
R
Cl~
1 - TO.·TooeONVERTER
eONVERTIHiiTi) ~
~
TRACK AND HOLD OR PEAK DETECTION WITH
ANALOG OUTPUT
-1(e
When a n"", 5i'lmple IS laken. the EfldofConvelS,on
(EOCI command IS useful In Indicalmg acquISition
The basic tracking converter system may be modified
for use in the track and hold function or as a peak
detecting track and hold. Analog output and infinite
hold time are available with the methods shown
in Figures 48-51.
FIGUR E 48 - CONNECTION CONFIGURATION FOR
POSITIVE INPUT AND OUTPUT
FIGURE 49 - CONNECTION CONFIGURATION FOR
NEGATIVE INPUT AND OUTPU r
Vm ' . . -_ _ _ _ _ _ _ _ _- ,
50'
"
"
VO,.~_O_+r-~_::~1_=-=-=-=-~t----'t=:::::;;::;:===!--6
TO GATES AND
7 COUNTERS
VO-..-......---1
'14
R2
FROM
COUNTERS
NC
10
"
10
Rl5
11
"
12
Comparator
t~mmon
mode range recommended for m;llIltamllig
threshold accuracy IS '1 volt. The a·kllohm and both 2'Krlohm
Il!$lslurs may be removed tor 010 -1 volt rnpul range.
FIGURE 50 - CONNECTION CONFIGURATION FOR
POSITIVE INPUT AND NEGATIVE OUTPUT
FIGURE 51 - CONNECTION CONFIGURATION FOR
NEGATIVE INPUT AND POSITIVE OUTPUT
vin--.-_ _ _ _ _ _ _ _ _ _ _..,
V,,'..-________-;
010 -1 V
VO·...-4.--o-+--<:..l_ _
VO-..--4.--o-+--<~l_==:::
010 -5V
Rf may be chosen for
desiredoulpulvollage
range
Vlel
RI'
NC
Rl5
10
10
"
12
Inpul range may beedended with
resistor divider.
8-183
""
MC1507L, MC1407L (continued)
SUGGESTED DESIGN APPLICATIONS
FIGURE 52 - SUCCESSIVE APPROXIMATION A-TO-D CONVERTER
SERIAL DATA
OUTPUT
PARALLEL DATA OUTPUT
FIGURE 53 - HIGH-SPEED INTEGRATOR
O.OOl/JF
50nslOlV
FIGURE 54 - SET-POINT CONTROL CIRCUIT
(Featuring variable deadband and hysteresis)
.-+-o--..,...... u,
2,5 k
3.3 k
N(lte that Cllmpllr310r common-mode input range IS +1 voll mini'
mum. For large signah, connect the operational amplltieras&unity
gam folloWllf which drtVeli a resistor divider to the comparator mput.
When computing the hystereSIS dIVider, remember the 2.5-kilohm
pullupresistorinthecomparatorcircuil.
'---~HYSTERESIS
1k
8-184
CONTROL
MC1507L MC1407L (continued)
I
SUGGESTED DESIGN APPLICATIONS {continuedl
FIGURE 55 - TRANSFER CHARACTERISTIC OF
SET·POINT CONTROL
Variable Deadband Set·'Point Controls are used in
control systems to compensate for large time constants
in the controlled systems. The dual output control shown
in Figure 54 controls two variables, such as heating and
cooling, that keep a controlled variable, such as temper·
ature, centered on the set point or operating point.
The set point voltage need not be produced by the
potentiometer but can be a reference voltage supplied by
the controlled system. As the set point moves linearly
this voltage could come from an MC1508L·8 D·to·A
converter which would provide digital control of the set
point. Deadband could be controlled by the system
in a similar manner.
i
5V
Vo
HYSTERESIS
1
SETJOtNT
FIGURE 56- HIGH·SPEED DELTA MODULATOR
(with optional hysteresis)
R1
14k
15k
R3
CLOCK
FIGURE 57 - WIDE·RANGE VOL TAGE·TO·FREQUENCY CONVERTER
(Useful As Voltage-Controlled Multivibrator, FM Modulator, or Sawtooth Generator.)
430
O.OOlt/F
lk
~
---u--r
--11--
Vee
-OV
_1.5V
FlequencvRan.ge IDa HZIII! OMHz
Lowe, Irequenclescan be achieved IJvtrlmming
amllhhermputoflsetvohage.
8-185
---i
~OO~W~N_'_'-r__~r1
_ _r-_UP_'_'_
I
ANALOG
Vret!:1.0V
Vin
(AESISTIVE OIVIDER CAN
_-------------BE USED FOR GREATER RANGE)
~
DEAOBAND
300 "'
DOWN
v,"
~
0
~f
MC1508L-8
MC1408L-8
MC1408L-7
MC1408L-6
'\
O-TO-A CONVERTER
'--------------'
Speci:ficatlons and Applications
InforIDation
EIGHT-BIT MUL TIPL VING
DIGITAL-TO-ANALOG
CONVERTER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
MONOLITHIC EIGHT-BIT MULTIPL VING
DIGITAL-TO-ANALOG CONVERTER
. designed for use where the output current is a linear product
of an eight-bit digital word and an analog input voltage.
•
Relative Accuracy: ±0.19% Error ma)(imum
(MC1508L·8. MC1408L-8)
16
• Seven and Si)(-Bit Accuracy Available
(MC1408L-7. MC1408L-6)
•
Fast Settling Time - 300 ns typical
•
Noninverting Digital I nputs are MTTL and
CMOS Compatible
• Output Voltage Swing - +0.5 V to -5.0 V
•
L SUFFI)(
CERAMIC PACKAGE
CASE 620
High-Speed Multiplying Input
Slew Rate 4.0 mAIllS
• Standard Supply Voltages: +5.0 V and
-5.0 V to -15 V
FIGURE 2 - BLOCK DIAGRAM
FIGURE 1 - D·to-A TRANSFER CHARACTERISTICS
<
oS
0
IZ
w
a:
a:
:;)
"I-
..
1.0
:;)
I-
:;)
0
(11111111)
(00000000)
NPN Cu~rent
Source Pair
INPUT DIGITAL WORD
TYPICAL APPLICATIONS
•
Tracking A-tOoD Converters
•
Audio Digitizing and Decoding
•
Successive Approximation A-to-D Converters
•
Programmable Power Supplies
Analog-Digital Multiplication
•
2 1/2 Digit Panel Meters and DVM's
•
•
Waveform Synthesis
•
Digital-Digital Multipl icatian
•
Sample and Hold
•
Analog-Digital Division
•
Peak Detector
•
Programmable Gain and Attenuation
•
CRT Character Generation
•
•
•
Digital Addition and Subtraction
Speech Compression and Expansion
Stepping Motor Drive
See Packaging Information Section for outline dimensions.
8-186
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
MAXIMUM RATINGS
(TA = +25 0 C unl ..s otherwise noted.)
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+5.5
-16.5
Vdc
Digital Input Voltage
Rating
V5 thru V12
+5.5,0
Vdc
Applied Output Voltage
Vo
+0.5,-5.2
Vdc
Reference Current
114
5.0
mA
V14,V15
VCC,VEE
Vdc
Reference Amplifier Inputs
Power Dissipation (Package Limitation)
Ceramic Package
Derate above T A = +25 0 C
Po
mW
mW/oC
1000
6.7
Operating Temperature Range
°c
TA
-55 to +125
o to +75
MC1508108
MC1408l Series
ELECTRICAL CHARACTERISTICS
(VCC = +5.0 Vdc, VEE
= -15 Vdc,
Vref
R14
DC
~5to+150
T stg
Storage Temperature Range
= 2.0 rnA, MC1508l·8:
TA = -550 C to +1250 C.
MC1408l Series· TA = 0 to +75 0 C unless otherwise noted All digital inputs at h·,gh logic level I
Figure
Symbol
Relative Accuracy (Error relative to full scale 10)
MC150BIoB, MC140810B
MC14081=7, See Note 1
MC 1408106, See Note 1
4
Er
Settling Time to within 1/2 lSB [includes tPlH)(TA=+250 CISee Note 2
5
Propagation Delay Time
5
Characteristic
Min
Typ
Max
-
-
±0.19
±0.39
±0.7B
Unit
%
-
-
-
ts
-
300
-
ns
tPlH,tPHl
-
30
100
ns
TCIO
-
-20
-
PPM/oC
VIH
Vll
2.0
-
O.B
IIH
III
-
0
-0.4
0.04
-O.B
-1.0
-3.0
TA=+25 0 C
Output Full Scale Current Drift
Vdc
Digital Input logic levels (MSBI
High level, Logic "1"
low level, logic "0"
3
Digital Input Current (MSBI
High level, VIH = 5.0 V
low level, Vll = O.B V
3
Aeference Input Bias Current (Pin 151
3
115
Output Current Range
3
lOA
-
mA
VEE = -5.0 V
VEE = ~.O to -15 V
~
rnA
0
0
2.0
2.0
2.1
4.2
1.9
1.99
2.1
-
0
4.0
-
-0.6,+0.5
-5.0,+0.5
4.0
-
mA/"s
PSAA(-I
-
0.5
2.7
"AIV
3
ICC
lEE
-
+13.5
-7.5
+22
-13
mA
Power Supply Voltage Aange
(TA = +25 0 C)
3
VCCR
VeEA
+4.5
-4.5
+5.0
-15
+5.5
-16.5
Vdc
Power Dissipation
All bits low
VeE = -5.0 Vdc
VEE = -15 Vdc
3
Po
Output Current
Vref = 2.000 V, A14 = 100011
3
Output Current
(All bits lowl
3
10(minl
Output Voltage Compliance (E r ~0.19% at T A = +25 0 CI
Pin 1 grounded
Pin 1 open, VEE below -10 V
3
Va
Reference Current Slew Rate
6
Output Current Power Supply Sensitivity
Power Supply Current
(All bits lowl
mA
10
SA Iref
Vdc
mW
-
All bits high
VeE = -5.0 Vdc
VEe = -15 Vdc
-
105
190
170
305
-
90
160
-
Note 1.
All current switches are tested to guarantee at least 50% of rated output current.
Note 2.
All bits switched.
8-187
"A
MC1508L·8, MC1408L·8, MC1408L·7, MC1408L·6 (continued)
TEST CIRCUITS
FIGURE 3 - NOTATION DEFINITIONS TEST CIRCUIT
TVpical Values:
,----'---.., 14
V I and II apply to inputs A 1
thru AS
A 14
t-<>---'II)~--'-'" V ref (+)
Al
Digital
Inputs
~
R14 = A1S '"' 1 k
vref"" +2.0 V
C = 15 pF
A2
The resistor tied to pin 15 is to temperature compensate the
A3
bias current and may not be necessary for all applications.
A4
.Al
A2
A3
10:: K { + +
A5
248
Vo
A6
t-<>------,.......... Output
A7
where K
AS
A4
AS
+ -
16
32
A6
+ -
64
+
. . . . v ref'
=-R14
and AN = "1" if AN is at high level
AN = "0" jf AN is at low level
values of C)
FIGURE 4 - RELATIVE ACCURACY TEST CIRCUIT
MSB
Al
A2
12-8it
A3
Converter
(±.O.O2%
error max)
A5
-----0-- A6
,-0--,0-
r-o-
O-to-A
A4
A7
AS
5 k
A9 Al0 All A12
LSB?
f
.~ ~
~ ~
950
R14
MSB 14
5
50 k
~
0.1 uF
V raf f:::2 V
100
0 to +10 V Output
~
,J
Error (1 V = 1%)
6
7
B
8-8 it Counter
'MC1508L-B
9
MC1408L Series
10
~
"
12
LSB
'~
15
lK
.".
11
V EE
FIGURES - TRANSIENT RESPONSE and SETTLING TIME
·'n
2.4V
1.4V
0.4 V
+2.0 Vdc
0==+-----:-_-+===
1.0 k
u •• RL to ~NO for
turn off
m •••ur • ."."t ( ••• teMt).
:r O. 1IJF
'~
r.';;o---""--+-....
leo
eo ~':.:::~:n~i.me
n.
tS· 300
tvplc.1
to t. 112 LSB
(All bits switched
low to high)
<;25 of
TRANSIENTO
RESPONSE
-100
mV
VEE
8-188
+--~------fII-R-L-'-50 n
pin 4 to GNO
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
TEST CIRCUITS Icontinuedl
FIGURE 6 - REFERENCE CURRENT SLEW
RATE MEASUREMENT
Vee
b:-o---v'(V--....--e
1k
vre:JL ~
V
-=
dl
RL '" 50
I
dt
o
- - 2.0 mA
Slewing
Time
Vee
FIGURE 7 - POSITIVE V,ef
FIGURE 8 - NEGATIVE V,ef
Vee
Vee
.---,,-1_3......,
R 14
== A 15
13
Al
A2
~
dV
RL dt
R14==A15
Al
f..!.::O--"':"'y.---r_
R14
(+ 1 V ref .r-1...
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
AS
AS
(-) Vref
12
VEE
8-189
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6
(continued)
FIGURE 9 - MC150BL-B/MCl40BL SERIES EQUIVALENT
CIRCUIT SCHEMATIC
DIGITAL INPUTS
v
VEE
COMPENSATION
OUTPUT
RANGE
CONTROL
CIRCUIT DESCRIPTION
The MC1508L-8 consists of a reference current amplifier, an
a low impedance termination of equal voltage for all legs of
the ladder.
The R·2R ladder divides the reference ampl ifier current into
binarily·related components, which are fed to the switches. Note
that there is always a remainder current which is equal to the
least significant bit. This current is, shunted to ground, and the
maximum output current is 255/256 of the reference amplifier
current, or 1.992 mA for a 2.0 mA reference amplifier current
if the NPN current source pair is perfectly matched.
R~2R
ladder, and eight high-speed current switches. For many
applications, only a reference resistor and reference voltage need
be added.
The switches are noninverting in operation, therefore a high
state on the input turns on the specified output current component.
The switch uses current steering for high speed, and a termination
amplifier consisting of an active load gain stage with unity gain
feedback. The termination amplifi~r holds the parasitic capacitance
of the ladder at a constant voltage during switching, and provides
8-190
MC150SL-S. MC140SL-S. MC140SL-7. MC140SL-6 (continued)
GENERAL INFORMATION
Reference Amplifier Drive and Compensation
The reference amplifier provides a voltage at pin 14 for con-
verting the reference voltage to a current, and a turn-around circuit
Refer to the subsequent text section on Settling Time for more
details on output loading.
or current mirror for feeding the ladder. The reference amplifier
input current. 114. must alwavs flow into pin 14 regardless of the
II a power supply value between -5.0 V and -10 V is desired,
a voltage of between 0 and -5.0 V may be applied to pin 1. The
setup method or reference voltage polarity.
value of this voltage will be the maximum allowable negative out·
put swing.
Connections for a positive reference voltage are shown in Figure
7. The reference voltage source supplies the full current 114. For
bipolar reference signals, as in the multiplying mode, R15 can be
tied to a negative voltage corresponding to the minimum input
level. It is possible to el iminate R 15 with only a small sacrifice
in accuracy and temperature drift. Another method for bipolar
inputs is shown in Figure 25.
The compensation capacitor value must be increased with increases in R14 to maintain proper phase margin; for R14 values
of 1.0, 2.5 and 5.0 kilohms, minimum capacitor values are 15,
37, and 75 pF.
Output Current Range
The output current maximum rating of 4.2 mA may be used
only for negative supply voltages more negative than -6.0 volts,
due to the increased voltage drop across the 350-0hm resistors in
the reference current amp I ifier.
Accuracy
The capacitor may be tied to either VEE or
Absolute accuracy is the measure of each output current level
with respect to its intended value, and is dependent upon relative
accuracy and full scale current drift. Relative accuracy is the
measure of each output current level as a fraction of the full.scale
current. The relative accuracy of the MC1508L·8 is essent~lIy
constant with temperature due to the excellent temperature tracking of the monolithic resistor ladder. The reference current may
drift with temperature, causing a change in the absolute accuracy
ground. but using VEE increases negative supply rejection.
A negative reference voltage may be used if R14 is grounded
and the reference voltage is applied to R15 as shown in Figure S.
A high input impedance is the main advantage of this method.
Compensation involves a capacitor to VEE on pin 16, using the
values of the previous paragraph. The negative reference voltage
must be at least 3.0,volts above the VEE supply. Bipolar input
signals may be handled by connecting R14 to a positive reference
voltage equal to the peak positive input level at pin 15.
When a dc reference volt~ge is used. capacitive bypass to ground
is recommended. The 5.0-V logic supply is not recommended as
a reference voltage. If a well regulated 5.Q..V supply which drives
logic is to be used as the reference, R 14 should be decoupled by
connecting it to +5.0 V through another resistor and bypassing
the junction of the two resistors with 0.1 p.F to ground. For
reference voltages greater than 5.0 V, a clamp diode is recommended between pin 14 and ground.
If pin 14 is driven by a high impedance such as a transistor
current source, none of the above compensation methods apply
and the amplifier must m; heavily compensated, decreasing the
01 output current. However, the MC1508L-B has a very low lull
scale current drift with temperature.
The MC1508L·S/MC140SL Series is guaranteed accurate to with·
in ± 1/2 LSB at +250 C at a full scale output current 01 1.992 mAo
This corresponds to a reference amplifier output current drive to
the ladder network of 2.0 rnA, with the loss 01 one LSB
= S.O p.A
which is the ladder remainder shunted to ground. The input c~rrent
to pin 14 has a guaranteed value of between 1.9 and .2.1 rnA.
a!lowing some mismatch in the NPN current source pair. The
accuracy test circuit is shown in Figure 4. The 12-bit converter
is calibrated for a full scale output current of 1.992 rnA. This is
an optional step since the MC150SL·8 accuracy is essentially the
same between 1.5 and 2.5 rnA. Then the MC1508L·8 circuits' full
scale current is trimmed to the same value with R 14 so that a zero
value appears at the error amplifier: output. The counter is activated
and the error band may be displayed on an oscilloscope, detected
by comparators, or stored in a peak detector.
Two S·bit D·to-A converters may not be used to construct a
16-bit accurate D-to-A converter. 16-bit accuracy implies a total
overall bandwidth.
Output Voltage Range
The voltage on pin 4 is restricted to a range of -0.6 to +0.5
volts at +25 0 C, due to the current switching methods employed
in the MC150SL·S. When a current switch is turned "011", the posi·
error 01 ±1/2 01 one part in 65, 536, or .±0.00076%, which is much
tive voltage on the output terminal can turn "on" the output
diode and increase the output current level. When a current switch
is turned "on", the negative output voltage range is restricted.
The base of the termination circuit Darlington transistor is one
diode voltage below ground when pin 1 is grounded, so a negative
voltage below the specified safe level will drive the low current
device of the Darlington into saturation, decreasing the output
current level.
more accurate than the ±.0.19% specification provided by the
MC150SL·S.
Multiplying Accuracy
The MC150SL·S may be used in the multiplying mode with
kilohms between pin 4 and ground will yield a voltage output
eight-bit accuracy when the reference current id varied over a range
of 256: 1. The major source of error is the bias current of the
termination amplifier. Under "worst case" conditions, these eight
amplifiers can contribute a total of 1.6 #lA extra current at the
output terminal. If the reference current in the multiplying mode
ranges from 16 p.A to 4.0 rnA, the 1.6 #lA contributes an error
01 256 levels between 0 and -4.9S0 volts.
010.1 LSB. This is well within eight·bit accuracy.
The negative output voltage compliance 01 the MC1508L·S may
be extended to -5.0 V volts by. opening the circuit at pin 1. The
negative supply voltage must be more negative than -10 volts.
I)sing a lull scale current 01 1.992 mA and load resistor 01 2.5
Floating pin 1 does
not affect the converter speed or power dissipation. However, the
value of the load resistor determines the switching time due to
increased voltage swing. Values of RL up to 500 ohms do not significantly affect . performance, but a 2.5-kilohm load increases
"worst case" settling time to 1.2 J.l.S (when all bits are switched onL
A monotonic converter is one which supplies an increase in
current for each increment in the binary word. Typically, the
MC1508L-B is monotonic for all values of reference current above
0.5 rnA. The recommended range for operation with a dc reference
current is 0.5 to 4.0 mAo
.
8-191
MC1508L-8, MC1408L-8, MC1408L-7, MC1408L-6 (continued)
GENERAL INFORMATION (Continued)
Settling Tim.
The "worst case" switching condition occurs when all bits are
switched "on", which corresponds to a low-ta-high transition for
The test circuit of Figure 5 requires a smaller voltage swing for
the current switches due to internal voltage clamping in the
all bits. This tim. is typically 300 ns for settling to within ± 112
LSB, for B-bit accuracy, and 200 ns to 1/2 LSB for 7 and S-bit
accuracy. The turn off is typically under 100 ns. These times
apply when RL ";;500 ohms and Co ";;25 pF.
1508L-8.
Me-
A 1.0-kilohm load resistor from pin 4 to ground gives
a typical settling time of 400 ns. Thus. it is voltage swing and not
the output RC time constant that determines settling time for
most applications.
Extra care must be taken in board layout since this is usually
the dominant factor in satisfactory test results when measuring
The slowest single switch is the least significant bit. which turns
"on" and settles in 250 ns and turns "off" iii 80 ns. In applications where the D-to-A converter functions in a positive-going
settling time.
ramp mode, the "worst case" switching condition does not occur,
and a settling time of less than 300 ns may be realized. Bit A7
turns "on" in 200 ns and "off" in 80 ns, while bit A6 turns "on"
quencies. and minimum scope lead length are all mandatory.
Short leads, 100 I'F supply bypassing for low fre-
in 150 ns and "off" in 80 ns.
TYPICAL CHARACTERISTICS
(VCC
= +5.0 V,
VEE
= -15 V,
TA
= +25 0 C unless otherwise noted.)
FIGURE 11 - TRANSFER CHARACTERISTIC versus TEMPERATURE
(A5 thru AS thresholds lie within range for Al thru A4)
FIGURE 10 - LOGIC INPUT CURRENT versus INPUT VOL TAGE
1.0
I
+25 0 C_ --55 0 C
;;(
O.B
C--+1 125 0 C-'\.
-...
.5
...
~
\
\
"-
.........
o
o
O.B
:='"
0.6
0
E
\
\
"
2.0
3.0
VI, LOGIC INPUT VOLTAGE IVdc)
4.0
I
A3
A4
,I ,
o
o
5.0
Al
/
0.4
0.2
A4-Aa- ~
1.0
'\.
A2
'"
~~
0.2
'"
13
...
Al,A2
1.0
1.0
2.0
3.0
VI, LOGIC INPUT VOLTAGE (Vdc)
5.0
4.0
FIGURE 12 - OUTPUT CURRENT versus OUTPUT VOL TAGE
FIGURE 13 - MAXIMUM OUTPUT VOLTAGE vel'Stis TEMPERATURE
(See text for pin 1 restrictions)
(Negative range with pin 1 open is -5.0 Vdc over full temperature range)
2.0
I.B
Al ~ High L:vel
A2·AB@ Low Level
r--
+1.0
I
~ +O.B
;. +0.6
;;( 1.6
.5 1.4
!Z
Va Range
'"
Accuracy
~ 1. 2
...~
1. 0
~ O.B
'"
o O. 6
E
w~ +0. 2
!::;
>
o
f
i--
pin 1 open
VEE <;-10 Vdc
0.4
O. 2
0
-7.0
~ +0.4
forB-bit
-6.0
-5.0
-4.0
-3.0
J
/
V
-2.0
"-
... -0. 2
~'"
o
r' pin 1 grounded
-1.0·
I
I
+1.0
~% @ ~ W W ~ @
~~ ~AllowableVO Ran;e~ W ~
~~
~ ~ @ ~~
8-192
~~
~
~~
~~
-0.8
-1.0
+2.0 +3.0
lor B·bit Accuracy ~
~ Ipin I grounded)
W ~W~~ @
-0.4
~ -0. 6
Va, OUTPUT VOLTAGE, PIN 4lVdc)
~
-55
+50
+100
T, TEMPERATURE (DC)
+150
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
TYPICAL CHARACTERISTICS
(VCC
= +5.0 V,
VEE
FIGURE 15 - TYPICAL POWER SUPPLY CURRENT
versus TEMPERATURE (all bits low)
FIGURE 14 - REFERENCE INPUT FREQUENCY RESPONSE
+8.0
20
+6.0
;;
18
~\
+4.0
/
::'. +2.0
;(
B
~
~
~ -2.0
>
A
12
'"wa:
10
0.1
--
-
ICC
lEE
6.0
\1'
o
~
~
\
-10
~
;;: 8.0
\
-8.0
14
It
::>
C\. \
~ -6.0
16
~a:
a
\
~ -4.0
-'
.s
I-
r\
I-
-12
(continued)
= -15 V, TA = +25 0 C unless otherwise noted.)
1.0
f, FREQUENCY (MHz)
4.0
10
o
-55
+50
+100
T, TEMPERATURE (OC)
+150
Unless otherwise specified:
FIGURE 16 - TYPICAL POWER SUPPLY CURRENT
versus VEE (all bits low)
R14 = R15 = 1.0 kn
C = 15 pF, pin 16 to VEE
RL = 50 n,pin 4 to GNO
Curve A:
20
large Signal Bandwidth
;(
Method of Figure 7
.s
Vref = 2.0 VIp-pI offset 1.0 V above GNO
I-
a'l
Curve B:
Large and Small Signal Bandwidth
Method of Figure 25 (no op-ampl. Rl
RS = 50 n
Vref=2.0V
Vs = 100 mV(p-p) centered at 0 V
16
~ 14
::>
Small Signal Bandwidth
Method of Figure 7 RL = 250 n
Vref =50 mV(p-p) offset 200 mV above GND
<.)
12
~
10
a:
=50 n)
ICC
~
It
Curve C:
18
~
~ 8.0
fEE
6.0
4.0
o
-2.0
-4.0
-6.0
-8.0
-10
-12
-14
-16
-18
VEE, NEGATIVE POWER SUPPLY (Vdc)
APPLICATIONS INFORMATION
FIGURE 17 - OUTPUT CURRENT TO VOLTAGE CONVERSION
Vee
Vref::- 2.0 Vdc
A14=R15==10kn
R O =5.0kH
13
Theoretical
MSB
AI
f-"'4'o--_"'Vv-_~-_
Va
v ref
Vret
A2
Vo"-
R14
A3
[AI
(RO)-+
2
A2
A3
4
8
-
A4
AS
A6
16
32
64
+ _. +
Adjust Vref. R14 or AO so that Va with all digital inputs at high
A4
level is equal to 9.961 volts.
A5
2 V
A6
Va'" 1k
A7
LSB
AB
:<
8-193
[1
15k) -
2
+
1
1
1
4
8
16
_t_i_
10 V [ 255J
= 9.961 V
256
1
1
._+_t
32
64
-20
MC140SL~7, MC140SL~6(continued)
MC150SL-S, MC140SL-S,
APPLICATIONS INFORMATION
Voltage outputs of a larger magnitude are obtainable with this
circuit which uses an external operational amplifier as a current
(continued)
The positive voltage range may be extended by cascading the
output with a high beta c~mmon base transistor, Q 1, as shown.
to voltage converter. This configuration automatically keeps the
output of the MC1508L·B at ground potential and the operational
amplifier can generate a positive voltage limited only by its positive
supply voltage. Frequency response and settling time are primarily
determined by the characteristics of the operational amplifier. In
addition, the operational amplifier must be compensated for unity
gain, and in some cases overcompensation may be desirable.
FIGURE 20 - EXTENDING POSITIVE
VOLTAGE RANGE
Note that this configuration results in a positive output voltage
only, the magnitude of which is dependent on the digital input.
The following circuit shows how the MLM301AG can be used
in a feedforward mode resulting in" a full scale settling time on
the order of 2.0 liS.
vee
5k
(Resistor and
diode optional,
see text)
Ge
FIGURE 1B
65 pF
6.1 k
The output voltage range for this circuit is 0 volts to BVCBO
(To pm 4
of MC150SL·8)
of the transistor. If pin 1 is left open, the transistor base may be
(i)---O-.....-.vo
grounded, eliminating both the resistor and the diode. Variations
in beta must be considered for wide temperature range applications. An inverted output waveform may be obtained by using a
load resistor from a positive reference voltage to the collector of
the transistor. Also, high~speed operation is possible with a large
output voltage swing, because pin 4 is held at a constant voltage.
The resistor (RI to VEE maintains the transistor emitter voltage
when all bits are "off" and insures fast turn~on of the least
significant bit.
An alternative method is to use the MC1539G and input com·
pensation. Response of this circuit is also on the order of
2.0~s.
See Motorola Application Note AN·459 for more details on this
concept.
Combined Output Amplifier and Voltage Reference
For many of its applications the MC1508L-8 requiresa reference
voltage and an operational amplifier. Normally the operational
amplifier is used as a current to voltage converter and its output
FIGURE 19
need only go positive. With the popular MCl723G voltage regula·
tor both of these functions are provided in a single package with
the added bonus of up to 150 rnA of output current. See Figure
35 pF
21. The MC1723G uses both a positive and negative power supply.
The reference voltage of the MC 1723G is then developed with
5 k
respect to the negative voltage and appears as a common-mode
signal to the reference ampl ifier in the D~t()-oA converter. Th is
allows use of its output amplifier as a classic current-to-voltage
converter with the non-inverting input grounded.
Since ± 15 V and +5.0 V are normally available in a combination digital-to-analog system, only the -5.0 V need be developed.
A resistor divider is sufficiently accurate since the allowable range
10 k
'0
(To pin 4
of MC1608L-8)
>--o---<~....
240
v0
on pin 5 is from -2.0 to -8.0 volts.
0.2 IlF
The 5.0 kilohm pulldown
resistor on the amplifier output is necessary for fast negative
transitions.
Full scale output may be increased to as much as 32 volts by
increasing RO and raising the +15 V supply voltage to 35 V maximum_ The resistor divider should be altered to comply with the
maximum limit of 40 volts across the MC1723G. Co may be
decreased to maintain the same RCCO product if maximum speed
is desired.
-15 V
8-194
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6(continued)
APPLICATIONS INFORMATION (continued I
Programmable Power Supply
FIGURE 22 - BIPOLAR OR NEGATIVE OUTPUT
VOLTAGE CIRCUIT
The circuit of Figure 21 can be used as a digitally programmed
power supply by the addition of thumbwheel switches and a BCD·
to-binary converter. The output voltage can be scaled in several
ways, including 0 to +25.5 volts in O.1-volt increments, ±O.05 volt;
or 0 to 5.1 volts in 20 mV increments. ± 10 mV.
AO
FIGURE 21 - COMBINED OUTPUT AMPLIFIER and
VOLTAGE REFERENCE CIRCUIT
A'
AO 5 k
Co 25 pF
Vee +5 V
Msa
A.
Re=2A14
A15 = R14
-15 V
VEE
A2
A3
MC1508L·B
MC140BL Series
A5
Vref
[Al A2 A3 A4 AS AS A7 A8]
Vr.f
Va = (AOI - + - + - + - + - + - + - + - (ROI
A14
2
4
8
16 32 64 128 256
AS
A6
+15 V
A7
AS
LSB
FIGURE 23 - BIPOLAR OR INVERTED NEGATIVE
OUTPUT VOLTAGE CIRCUIT
3.6 k
17.1
V
1
5 1
1.6 k
1
0.01 ",F
I
L ___
A
1
A1A2A3A4ASA6A7AB
I
.J
VEE -15 V
MC1508L·8
MC 1408 L Series
AO
Vo=Vrflf=A12 {A}
4
Settling tim. for a 10-volt st.p~ 1.0 III
A'.
bit configuration
A,5
Va = -Vref
For a ±S.O volt output range:
Vr.f" -5.00 volts
A14'" R15" 2.5 kn
-Vr.f
Bipolar or Negative Output Voltage
The circuit of Figure 22 is a variation from the standard voltage output circuit and will produce bipolar output signals. A
positive current may be sourced into the summing node to offset
the output voltage in the negative direction. For example, if
C = 37 pF (minI
RO'" 5 kn
Decrease RO to 2.5 kn for a 0 to -5.0-volt output range.
This application provides somewhat lower speed, as previously
discussed in the Output Voltage Range section of the General
Information.
approximately '.0 mA is used a bipolar output signal results which
may be described as a a-bit ""s" complement offset binary. Vref
may be used as this auxiliary reference. Note that AO has been
doubled to 10 kilohms because of the anticipated 20 V(p-pl
output range.
8-195
MC150BL-B, MC140BL-B, MC140BL-7,
MC140BL~6 (continued)
APPLICATIONS INFORMATION (continued)
Polarity Switch.ing Circu it. a-Bit Magnitude
Plus Sign D-t~A Converter
Bipolar outputs may also be obtained by using a polarity switch-
ing circuit. The circuit of Figure 24 gives 8-bit magnitude plus
a sign bit. In this configuration the operational amplifier is switched
between a gain of +1.0 and -1.0. Although another operational
amplifier is required, no more space is taken when a dual operational
amplifier such as the MC1558G is used. The transistor should be
Panel Meter Readout
The MCI508L-8 can be used to read out the status.of BCD or
binary registers or counters in a digital control system. The current
output can be used to drive directly an analog panel meter. Ex·
ternal meter shunts may be necessary if a meter of less than 2.0
rnA full scale is used. Full scale calibration can be done by adjusting R14 or Vref.
selected for a very low saturation voltage and resistance.
FIGURE 26 - PANEL METER READOUT CIRCUIT
FIGURE 24 - POLARITY SWITCHING CIRCUIT
IS-Bit Magnitude Plus Sign O-to-A Converted
Digital Word From Counter or Register
MSB
R
From Va
Output . . .
Op-Ampl
..-""oIV............,..,
LSB
R,..',,4_ ''''4..j
V re f ....-'l
0
R,5
P
~
i
MC16OBL-8
MC 1408 L Series
'5
5 k
Observe int.rnal meter
resistance (for pin 4
voltage swing).
Polarity
Control Bit
Programmable Gain Amplifier or Digital Attenuatar
FIGURE 27 - DC COUPLED DIGITAL ATTENUATOR
and DIGITAL SUBTRACTION
When used in the multiplying mode the MCI508L-8 can be
applied as a digital attenuatar. See Figure 25. One advantage of
this technique is that if AS := 50 ohms, no compensation capacitor
is needed. The small and large signal bandwidths are now identical
and are shown in Figure 14.
The best frequency response is obtained by not allowing 114
to reach zero. However, the high impedance node, pin 16, is
clamped to prevent saturation and insure fast recovery when the
current through R14 goes to zero. AS can be set for a .±1.0 rnA
variation in relation to 114. 114 can never be negative.
The output current is always unipolar. The quiescent de output
current level changes with the digital word wh ich makes ac coupl ing
necessary.
R.
Vref 2
'4
R142
R152
15
MC1741G
MC1508L·8
MC1408L
Series
,.
Vref 1
R141
R,4
Vref
+"4
I'·
R.
FIGURE 25 - PROGRAMMABLE GAIN AMPLIFIER OR
DIGITAL ATTENUATOR CIRCUIT
R151
'5
MC1508L·8
MC1408L
Series
Vo
When Vs = O. 114 = 2.0 mA
VO'
[~l + ~I{A}RO
Vee
10=
to
l-t02=~
R141
Digital Subtraction:
'2
Let V ref 1
R141
8-196
V re
!~
R142
{A}-
{. }
102 = -IS
18 +
to'" to 1
Programmable Amplifier:
Connect Digital Inputs 10 A = 8
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
APPLICATIONS INFORMATION
(continued)
FIGURE 30 - NEGATIVE PEAK DETECTING
SAMPLE AND HOLD
This digital subtraction application is useful for indicating when
one digital word is approaching another in value. More information
is available than with a digital comparator.
Bipolar inputs can be accepted bV using any of the previously
described methods, or applied differentially to R141 and R142
or R151 and R152. Vo will be a bipolar signal defined by the
above equation. Note that the circuit shown accepts bipolar differential signals bUT does not have a negative common-mode range.
A very useful method is to connect R141 and R142 to a positive
reference higher than the most positive input. and drive R151 and
R152_ This yields high input impedance. bipolar differential and
common-mode range.
Va
(load sensitive)
VO(max) = -
FIGURE 28 - DIGITAL SUMMING and CHARACTER GENERATION
( 255)
256
Va(max) = 0 to -5.0 volts
e
A
Vref 1
FIGURE 31 - PROGRAMMABLE PULSE GENERATION
Va
+5.0 Vdc
Vee
Va
t----SL
50
o to
1.0 Volt
in 4.0 mV steps
Fast rise and fall times require the use of high-speed switching
transistors for the differential pair, Q4 and as. Linear ramps and
sine waves may be generated by the appropriate reference input.
In a character generation system one MC1508L-8 circuit uses a
fixed reference voltage and its digital input defines the starting
point for a stroke. The second converter circuit has a ramp input
for the reference and its digital input defines the slope of the
stroke. Note that this approach does not result in a 16-bit D-to-A
converter (see Accu racy Section).
FIGURE 32 - PROGRAMMABLE CONSTANT CURRENT SOURCE
+5.0 V(min)
FIGURE 29 - POSITIVE PEAK DETECTING SAMPLE and HOLD
Amplit~de
Input
(Features indefinite hold time and optional digital output.)
Clock Detect/Hold
Reset
Vee
-15 V
Ne
+5.0 V
Ra=/31Jj2(100kO)
@IO= 1.0mA
-The base of Q2 must be at least
4 V below supply voltag.~
Current pulses, ramps, staircases, and sine waves may be generated by the appropriate digital and reference inputs. This circuit is
especially useful in curve tracer applications.
8-197
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 34 - ANALOG QUOTIENT OF TWO DIGITAL WORDS
FIGURE 33 - ANALOG DIVISION BY DIGITAL WORD
This circuit yields the inverse of a digital word scaled by a
constant. For minimum error over the range of operation. 10 can
be set at 16 IJ.A so that 114Will have a maximum value of 3.984
mA for a digital bit input configuration of 00000001.
Compensation is necessary for loop stabil ity and depends on
the type of operational amplifier used. If a standard 1.0 MHz
operational amplifier is employed, it should be overcompensated
when possible. If the MC1723 or another wideband amplifier is
used, the reference amplifier should always be overcompensated.
FIGURE 35 - ANALOG PRODUCT OF TWO DIGITAL WORDS
(High·Speed Operation)
102
15
4
13
~
'-v------/
B
A
VO=-IOI R OVref
=R141
Since AO
{ A \ RO
Vref
= R142 and K = -
R141
1102'" K
JA}
is}1
K can be an analog variable.
8·198
MC150SL-S, MC140SL-S, MC140SL-7, MC140SL-6 (continued)
APPLICATIONS INFORMATION (continuedl
FIGURE 36 - TWO·DIGIT BCD CONVERSION
v, ..
Least S.gnlflcant
BCD Word
Vee
Two a-bit, D-to-A converters can be used to build a two digit
BCD D-to-A or A-to-D converter. If both outputs feed the virtual
ground of an operational amplifier, 10:1 current scaling can be
achieved with a resistive current d.ivider. If current output is desired, the units may be operated at full scale current levels of
FIGURE
'$7 -
4.0 rnA and 0.4 rnA with the outputs connected to sum the currents.
The error of the D-to-A converter handl ing the least significant
bits will be scaled down by a factor of ten and thus an MC1408L-6
may be used for the least significant word.
DIGITAL QUOTIENT OF TWO ANALOG VARIABLES
or ANALOG·TO·DIGITAL CONVERSION
Reset
Clock
RO
Vref
4
12
R14
Vref
R15
14
13
VEE
11
10
9
MC1508L-8
Me 1408 L Series 8
7
6
5
LSB
The circuit shown is a simple counterramp converter. An UP/DOWN counter
and dual threshold comparator can be
used to provide faster operation and continuous conversion.
MSB
'-----v----'
C
c=
Vin/RO
Vref/R14
8-199
MC1510G
MC1410G
~~________H_IG_H_-_F_R_E_a_U_E_NC_Y__C_IR_C_U_I_TS~
VIDEO AMPLIFIER
WIDEBAND VIDEO AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
'.' designed for use as a high-frequency differential amplifier with
operating characteristics that provide a flat frequency response from
dc to 40 MHz.
•
High Gain Characteristics
AV = 93 typ
•
Wide Bandwidth - dc to 40 MHz typ
•
Large Output Voltage Swing
4.5 Vp-p typical @ ±6.0 V Supply
•
Low Output Distortion
THD";;; 1.5% typ
METAL PACKAGE
CASE 601
~
,
8
(bottom view)
FIGURE 1 - VOLTAGE GAIN versus FREQUENCY
0
;~
0
-
-
51
00
1.0
I
2.0
5.0
.0
I
vee = +6.0 Vdc
VI'
.5
VEE "'-6.0 Vdc
L
.0
.5r-
"\.
\.
V
Av(se)=~
10,
FIGURE 2 - LIMITING CHARACTERISTICS
@l1.0kHz
20
50
f, FREQUENCY (MHz)
"
200
100
500
1000
0
10
~".
Vi,
::t
I\.
I III
Vee" +6.0Vdc
VEE =-6.0 Vdc
51
.Ok
1.0 kHz
51
20
40
60
80
100
120
Vin. INPUT SIGNAL (mVp-p)
140
EQUIVALENT CIRCUIT
CIRCUIT SCHEMATIC
,-----------------------------
Vee 2
I
I
750
750
510,+-_ _5_10+_ _f"
I
I
1
INPUT 11
OUTPUT 1
INPUT 1
(+) 1
1~~~T'.,:2:.;1_ _ _+-__....J
6.8k
2.0k
670
OUTPUT 2
3
INPUT 2
I
-+______-' 270
L-_ _ _ _ _
L - - - - - - - - VEE B - - - - - - - - - cASE6 - -
•
See Packaging Information Section for outline dimensions.
8-200
GNO
6
VEE
8
6
Gnd
MC1510G, MC1410G
(continued)
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted)
Rating
Symbol
Value
Unit
VCC
+8.0
Vdc
VEE
-B.O
Vdc
Differential Input Signal
VIDR
±5.0
Volts
Common Mode I nput Swing
Power Supply Voltage
VICR
±6.0
Volts
Load Current
IL
10
rnA
Output Short Circuit Duration
ts
5.0
s
680
4.6
mW
mW/oC
Power Dissipation (Package Limitation)
Metal Can
Derate above T A
Po
= +25 0 C
Operating Temperature Range
TA
MC1410
MC1510
Storage Temperature Range
o to +75
°c
-55 to +125
T stg
-65 to +150
°c
ELECTRICAL CHARACTERISTICS(Vcc = +6.0 Vdc, VEE = -6.0 Vdc, RL = 5.0 kn, T A = +25 0 C unless otherwise noted.!
Differential Mode IVin = 01
Common Mode (Differential Output = 0)
Step Response
Average Temperature Coefficient of
Input Offset Voltage
(RS = 50 n, T A = Tlow * to Thigh .*)
10kn,TA=Tlow to
DC Power Dissipation
(Power Supply = ±B.O VI
Equivalent Average Input Noise Voltage
(f = 10 Hz to 500 kHz, RS = 0)
*Tlow = OOC for MC1410
or -5SoC for MC1510
"Thigh
= +7SoC for MC1410 or
+125 0 C for MC1510
8·201
MC1510G, MC1410G (continued)
TYPICAL CHARACTERISTICS
(Vee ~ +6.0 Vdc. VEE ~ -6.0 Vdc. T A ~ +25 0 C unless otherwise noted.)
FIGURE 4
FIGURE 3
POWER DISSIPATION versus SUPPLY VOLTAGE
VOLTAGE GAIN versus SUPPLY VOLTAGE
42.----,----,----,----,-----,----,----,
30 0
0
0
o
o
*
---
V
6.0
/
V
/
V
~ 40
z
~ 38~--~----~----~~fT~~~----~--~
'"~
o 361----+----+.~--+__l
>
Ii
J
8.0
10
12·
.IVCCI. IVEEI. SUPPLY VOLTAGE (Vdc)
1.4
34t----f--,f--t-----+_--I
32,l;;---;;f----;h--+--=~==::===:;==~.
4.0
B.O
10
12
14
16
18
16
IVCCI.IVEEI. SUPPLY VOLTAGE (VdCf
FIGURE5
FIGURE 6
De OUTPUT VOLTAGE versus TEMPERATURE
VOLTAGE GAIN versus TEMPERATURE
5
3.5
--
0
5
:g
;:::
w
'"~
."
o
r--- r--
>
~ 3.0
./
..-=>
~;"~'
o
o
C
'-'
>
30
-55
-25
o
+25
+50
+75
+100
TA. AMBIENT TEMPERATURE (DC)
+125
_
2. 5
-55
+150
-25
--
V02
+25
+50
+75
TA. TEMPERATURE (DC)
+100
+125
FIGURE B
FIGURE 7
INPUT BIAS CURRENT versus TEMPERATURE
OUTPUT NOISE VOLTAGE versus SOURCE IMPEDANCE
7. 0
40
O~
h
I~
~
11 + 12
IIB=I
:;-
"::[:2:
0
.§
w
~
o
BANOWIOTH - 5.0 Hz to 10 MHz
5. 0
12 - -
f-
=>
~ 4. 0
=>
o
~ r--
+25
+50
+75
TA. TEMPERATURE (DC)
_
~
...
~3, 0
>
2.0
-25
I
Z
10
-55
-r---.
f,--
+100
1.0
+125
8·202
10
V~
100
1.0k
10k
RS. SOURCE RESISTANCE (OHMS)
100 k
MC1510G, MC1410G (continued)
TYPICAL CHARACTERISTICS
FIGURE 9
LIMITING CHARACTERISTICS @ 30 MHz
FIGURE 10
LIMITING CHARACTERISTICS versus FREQUENCY
1000
800
~ 600
Vee" +6.0 Vdc
VEE" -6.0 Vdc
TA"15'e
;;
E
w
to
V
c:;; 200
>
V
Iv.:
fj
to
/,'/
o
(J
~ 60 0
Vm"v
~
Vee" +6.0 Vdc
VEE" -6.0 Vdc
TA"15'e
w
:~~:
300
800
E
V
40 0
;o
~
~
;;
-=
~
~ 40 0I----f=15M~
30 MHz I
=>
o
':"
j
51
,/
~
I IIIIIII
100
10
Vin. INPUT VOLTAGE ImVlrmsl1
:'"' :ff,';1'"To,
....>
200
e:-
r-
I
~q5MHZ
HP606
I III
I III
1000
51
or Equiv _
10
100
Vin. INPUT VOLTAGE ImVlrmsll
TYPICAL APPLICATIONS
FIGURE 11
ENVELOPE DETECTOR
FIGURE 12
SINGLE STAGE WIDEBAND AMPLIFIER
+6 Vdc
+6 Vdc
IAV" 39 dB)
0.1 "F
'in
~f-"""---
FIGURE 10 - POWER DISSIPATION
versus TEMPE RATUR E
FIGURE 9 - RESPONSE TIME
0
I\~
\-\\\
'--'-"
5.0mV Overdrive
,..-
2,omVO+drilll
~
-1. 0
0
0
I
nli-----f---11----+---1i-----------+--I
I
~-5010~----~20~--~.0~--~G~0-----8*0----~,~00~--~,20
0
- 25
t. TIME (nsl
25
50
75
100
125
TA. AMBIENT TEMPERATURE (DC)
FIGURE 11 - RECOMMENDED SERIES RESISTANCE
-sus MRTL LOADS
..
FIGURE 12 - SINK CURRENT versus TEMPERATURE
0
100
~~
0
~
,
0
I·
3.0
1'-1'
9" 10
0
mWMRTL
.0
I'Med.Power
.or----- f1. O
0.1
IMRTIL I
0.2
" " ........
~
0
1"1'
0.5
1.0
2.0
RS,SERIES RESISTANCE lUll
t-
5.0
10
0
-50
·25
FIGURE 13 - CROSSTALKt
/
1
lin=±50mV
I
,
,,
I
:
j
1
1
--
25
50
TA. TEMPERATURE (OCI
..-
-
Induced outputsigAII in
amplifilrl2 dUlto output
signal atlmplm... 11.
TIME.50nlldlv
two.... CIII condition shown - no load.
8-207
75
100
125
"\
OPERATIONAL AMPLIFIERS
'-----------'
MC1520
MC1420
MONOLITHIC DIFFERENTIAL OUTPUT OPERATIONAL
AMPLIFIER
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED
CIRCUIT
· .. designed for use in general·purpose or wide·band
differential amplifier applications, especially those requiring differential outputs.
Typical Characteristics
• Differential Input and Differential Output
• Wide Closed-Loop Bandwidth; 10 MHz
• Differential Gain; 70 dB
• High Input Impedance; 2.0 megohms:
• Low Output Impedance; 50 ohms
Pin 3 connected to case
G SUFFIX
METAL PACKAGE
CASE 602A
MAXIMUM RATINGS (T A'" +2SoC unless otherwise noted)
Rating
Symbol
Value
Unit
V+
V-
+8.0
-8.0
Vdc
Vin
1.8.0
Vdc
ILl,IL2
15
mA
680
4.6
500
mW
mW/oC
mW
mW/oC
Power Supply Voltage
Differential I nput Signal
Load Current
Power Dissipation (Package Limitation)
Metal Package
Derate above T A = +2SoC
Flat Package
Derate above T A = +2SoC
Operating Temperature Range
Po
3.3
MC1520
MC1420
Storage Temperature Range
TA
-55to+125
o to + 75
°c
T stg
-65 to +150
°c
F SUFFIX
CERAMIC PACKAGE
CASE 606
TO-9!
CIRCUIT SCHEMATICS
FIGURE 1 - CIRCUIT SCHEMATIC
CDITi CD0
Cl
C3
®ITJ
C4
wIT]
C2
FIGURE 2 - EQUIVALENT CIRCUIT
®[!ill
v+
,
OUTPUT
rv-r:,::...,:::----<>® W
OUTPUT
' - 7 " ' -_ _-<>1 ® ill
oo
See Packaging Information Section for outline dimensions.
8-208
cont';n~p,"numbef!orme!.lca"p&ckage
,ontain.pmn"mb",fa,flatp.ck'9~
MC1520, MC1420 (continued)
SINGLE-ENDED ELECTRICAL CHARACTERISTICS
I
0,;" ~ •.•. " . ~""R,=10kn
R2=10kn
R3= 5.Okn
Cs = 39 pF
r;" .
-
n,. O.,,"~,
80
70
R,=10kn
R2= l00kn
R3 = 10 kn
Cs = 10pF
I
15
0,;" - '00. ,,~,,"~,
.
80
R, = 1.0kn
R2 = 100 kn
R3= 1.0kn
Cs = 1.0 pF
r~"
,~
R, = 50 n
R2 =00
R3 = 50 n
Cs = 0
70
30
',O.,m_
180
70
35
(Open Loop[Figure 4J)
(Closed Loop[ Unity GainJ )
(Figure 5)
ns
ns
Vlf/.S
ns
ns
Vlf/.s
ns
ns
Vlf/.s
ns
ns
Vlf/.s
I
2.0
10
Input Noise Voltage (Open Loop)
(5.0 Hz - 5.0 MHz)
f/.V(rms)
11
2.0
mW
f/.VN
8-209
MC1520, MC1420 (continued)
DIFFERENTIAL ELECTRICAL CHARACTERISTICS
(v+
= +6.0 Vdc, V- = -6.0 Vdc, T A = +2SoC unless
Zout
ohms
Vo(CM)
Vdc
Vpeak
(v+
TYPICAL CHARACTERISTICS
= +6.0 Vdc, V- = -6.0 Vdc, T A' = +2SoC, unless otherwise noted,)
FIGURE 3 - LARGE SIGNAL SWING
versus FREQUENCY
TEST CIRCUIT
AI
+S. 0
~
INVERTING
+6.0
NON·INVERTlNG'---",-~
c5 +4. 0
;::
w
CJ
~
CURVE 4
2
CURVE3\
1
+2. 0
"I'-
o
>
....
1/1-'
~-2.0
1/
::::I
o
'" -4.0
TEST CONDITIONS
;S
FIGURE CURVE
NO.
a.. -6. 0
-S. 0
0.1
3
1.0
10
100
1000
10,000
t, FREQUENCY (kHz)
4
•
FIGURE 4 - OPEN LOOP VOLTAGE GAIN
70
I
I
II
1
2
3
4
1
2
'N.'
'"w
'"!:;«
40
0
30
>
AVOL
AVOL
AVOL
NON· INVERTING
NON·INVERTING
NON·INVERTING
100
10
1.0
~
tOOk
lOOk
10k
lO.k
a
a
a
l.Ok
10 k
!iOk
10k
3.
3.
.0
50
50
39
~
~
~
100
10,
10k
9.1 k
~
10'
+60
;;;
z +40
100
.,0
10k
11
;S
«
..l
«
NON·INVERTING
NON-INVERTING
NON-INVERTING
1.Ok
10k
10k
1.0
10
1.0
10
1.0
10
39
2.0
0.55
0.17
0.17
1.0
2.0
5.2
2.0
0.55
0.17
FIGURE S - CLOSED LOOP VOLTAGE GAIN
versus FREQUENCY
0
>
3
NON·INVERTING
100
10
1.0
1.0
NOISE
OUTPUT
Rl1m R21nl R3 1nI CSlpfl mVlrms
50
z
«
1
2
INVERTING
INVERTING
INVERTING
VOLTAGE
GAIN
III
II
"
60
MODE
NO.
3
~
10
i
0.1
1.0
10
100
1000
10,000
t, FREQUENCY (kHz)
-20
1.0
ill'
10
100
1000
t, FREQUENCY (kHz)
8·210
10,000
100,000
MC1520, MC1420 (continued)
TYPICAL OUTPUT CHARACTERISTICS
(v+ = +6.0 Vdc,
v- = -6.0 Vdc, unless otherwise noted.l
FIGURE 7 - OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
FIGURE 6 - POWER DISSIPATION
versus POWER SUPPLY VOLTAGE
25
50
0
<.>
c
~
w
0:
...
:::>
0
~
100
...~
125
z
0
~
z
o
;;:
~
to
40
iiil00~~!~JII~
W
w
'"<.>""
""
::'"
to
80
::
~ 60~__~__7f____~__+-__~__-4____
e 40~--~~-+----~--+---~---+----
to
to
""
:;
<.>
>
to
0
0
L
V
V
W
~
/'
~
~
30
..:;
>
""
ZO
10
o
3.0
4.0
6.0
5.0
B.O
7.0
9.0
4.0
Z.O
V+ and V-, POWER SUPPLY VOLTAGE (Vdcl
6.0
B.O
V+ and V, SUPPLY VOLTAGE (Vdcl
FIGURE 9 - OUTPUT NOISE VOLTAGE
versus SOURCE RESISTANCE
FIGURE 8 - SINGLE ENDED OUTPUT VOLTAGE
versus LOAD RESISTANCE
1000
0
~
RZ
B. 0
"C.
I
~6. 0
w
to
""
:;
/
o
>
...~ 4.0
1100
>
g
o
.;
>
1
_ Rl _ R3
C,
w
to
:;
""
~
Open Loop
J-H-
o
>
cr~pt
10
AV=.!!1.
Rl
i3
z
...
.-1-+1"
IUv
I II
~ 1.0
>
/
40dB
CS=1.0pF
~
~
o
II
:::>
2. 0
V
V
V
CS=39pF
4.0
2.0
RL,
L~AO
6.0
B.O
0.1
10
RESISTANCE (K·OHMSI
101lB
II
1.0
10
100
RS, SOURCE RESISTANCE (K·OHMSI
8-211
Rl RZ
I ~yR2
20 dBf- RS = R3
CS= lOpF
O. 1
0
R~=
n
1.0 M
I
j
L----...,;
\
OPERATIONAL AMPLIFIERS
MCIS30, MCI430 ' ' - - - - - - - - - - - - - '
MCIS31, MCI431
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIERS
INTEGRATED CIRCUIT
. . . designed for use as a summing amplifier, inte·
grator, or amplifier with operating characteristics as a
function of the external feedback components.
TheMC1531 (MC1431) is provided with Darlington
inputs to increase input impedance; otherwise the
MC1531 (MC1431) circuit is identical with the MC1530
(MCI430) circuit.
•
High Open Loop Voltage Gain - 4500 mi~ (MC1530l
- 2500 min (MC1531)
•
High Input Impedance - 10 Kilohms min (MC1530)
- 1.0 Megohm min (MC1531)
•
Low Output Impedance - 50 Ohms max
•
High Slew Rate - 6.0 V//ls typ @ Avs = 10
•
High Open Loop Bandwidth - 2.0MHz typ (MC1530)
0.4 MHz typ (MCI531)
MAXIMUM RATINGS
G SUFFIX
METAL PACKAGE
CASE 6028
(TA =.250 C unless otherwsie notedl
Rating
Power Supply Voltage MC1530, MC1531
MC1430, MCl431
Differential I nput Signal
Symbol
Value
Unit
VCC,VEE
VCC,VEE
+9.0, -9.0
+8.0, -8.0
Vdc
±5.0
Volts
10
mA
680
4.6
500
3.3
mW
mW/oC
mW
mW/oC
400
3.3
mW
mW/oC
VID(max)
Load Current
Power Dissipation (Package Limitation)
F SUFFIX
PD
Metal Package
Derate above T A = +250 C
Flat Package
Derate above T A = +2So C
Dual In·Line Plastic Package
MC1430, MC1431
Derate above +2SoC
°c
Operating Temperature Range
MC1530, MC1531
MC1430, MC1431
-55 to +125
to +75
Storage Temperature .Range
Metal and Ceramic Package
Plastic Package
MC1430, MC1431
-65 to +175
-55 to +150
CERAMIC PACKAGE
CASE 606
TO-91
...
~~~rn[
PSUFFIX
PLASTIC PACKAGE
CASE 646
o
°c
(MC1430P/MC1431 P only)
CIRCUIT SCHEMATICS
FIGURE 2 - MC1530/MC1430
(STANDARD INPUTI
FIGURE 1 - EQUIVALENT CIRCUIT
BOTH TYPES
FIGURE 3 - MC1531/MC1431
(DARLINGTON INPUTI
E
l-4+""'4--OQUTPUT
OUTPUT
INPUTS
PIN CONNECTIDNS
Schematic
"F"& "G"Pkgs.
"P"Package
ABCDEFGHJK
1 2 3 4 5 6 7 8 9 10
4 6 8 7 11 12 13 14 1 2
·See Packaging Information Section for outline dimensions.
8-212
MC1530, MC1531, MC1430, MC1431 (continued)
ELECTRICAL CHARACTERISTICS (Vee
=
+6.0 Vdc, VEE = -6.0 Vdc, TA = +2Soe unless otherwise noted)
STEP RESPONSE, TYPICAL CHARACTERISTICS
(Vee = +6.0 Vdc, VEE = -6.0 Vdc, Vo
<;
400 mVdc, T A'" +2Soc)
Symbol
MC1530
MCI430
MCl&31
MC1431
0.13
0.11
33
0.36
0.21
16
0.34
0.25
6.0
0.30
0.28
5.5,
V/l£s
0.28
0.16
1.7
0.l7
0.17
1.4
V/':$
Step Response
{Gain'" 100,0% overshoot,
RT = 1.0 k ohm, R2 '" 100 k ohms.
R3'" 1.0 k ohm, C, = 750pF
{Gain'" 10, 10% overshoot,
RT '" 10 k oh'!!s. R2 = 100 k ohms,
R3 = 10 k ohms. C, '" 6800 pF
{ Gain" 1.0. 5.0% overshoot,
\~
',OVERSHOOT
~SlEWRATE
\.-
AT = 10k ohms. A2 = 10k ohms,
R3 = 5.0 k ohms,
= 33.000 pF
C,
CD Tlow:
DoC for MC143Q
-5S Ge tor MC1&30
Thigh: +7SoC for MC1430
+12S0C for MC1530
8-213
tTHL
tPHL
SR
'THL
tPHL
SR
tTHl
tPHL
SR
TIOw: OOC for MC1431
_BSoC for Met631
Thigh: +76o C for MC1431
+1260 C MeT631
...
..
....
VI..
~s
MC1530, MC1531, MC1430, MC1431 (continued)
TYPICAL OUTPUT CHARACTERISTICS
(Vee'" +6.0 Vdc, vEE = -6.0 Vdc. T A '" +250 C)
FIGURE 4 - TEST CIRCUIT
OEVICE
NO.
MCI530/MCI430. MCI531/MCI431
MCI530/MCI430. MCI531/MCI431
MCI530/MCI430. MC1'5311MCI431
MCI530/MCI430
MCI530/MCI430
MCI530/MCI430
MCI530/MCI430
MCI530/MCI430
MC1531/MC1431
MC1531/MC1431
MC1531/MC1431
MCI530/MCI430
MCI530IMCI430
MCI530/MCI430
MCI530/MCI430
MC1531/MC1431
MC1531/MC1431
MCI531/MCI431
MC15311MC1431
FIG. CURVE VOLTAGE
GAIN
NO.
NO.
100
5
1.2
10
3
1
4
100
6
1
10
2
10
3
1
4
1
5
100
1
1
10
2
1
3
1
S
AVOL
2
AVOL
3
AVOL
4
AVOL
1
9
AVOL
2
AVOL
3
AVOL
4
AVOl
RZ
CI
FIGURE 5 - LARGE SIGNAL SWING
versus FREQUENCY
TEST CONOITIONS
c,IpFI
150
R, lknl R2 1knl R3 1nl
.1.0
10
10
1.0
10
1.0
10
1.0
1.0
10
10
a
a
a
0
a
0
a
a
100
100
10
100
100
10
10
1.0
100
100
10
1.0k
10 k
5.0k
1.0k
10k
1.0k
5.0 k
500
1.0k
10k
5.0 k
0
····-
6800
33.000
150
6800
6800
33,000
33,000
150
6800
33,000
a
a
a
a
a
150
6800
33,000
1~
0
0
6800
33,000
a
FIGURE 6 - MC1530/MC1430 VOLTAGE
GAIN versus FREQUENCY
14
45
40
Z
~
~
10
8. 0
o
6.0
~
>
I:::>
~
I\~
...... 1\
""
to
CURVE 4
o
~- 2.0
10 k
Z
3
\
4.0
0
1.0 k
CURVr! ....
35
;
z
1
«
to
25
w
20
~
o
1\
5
>
IIII
5.0
lill
10 k
10M
LoM
CURVE~
0
.j
\, I\.
100 k
30
iii
S
z
"
to
w
to
"
~
0
>
~
"
FIGURE 8 - MC1530/MC1430 OPEN LOOP VOLTAGE GAIN
versus FREQUENCY
105
III
rt"tH...
35
CURVE
30
90
l'
~
z
i\
25
15
CURVE
60
'"~
5
.j
0
CURJE";
100 k
.........
, ,
CURVE4
,
.......
r-....
3
2
'r--
5
r--....
LOM
10M
0
100
1.0 k
10 k
100 k
f, FREQUENCY (Hzl
f, FREQUENCY (Hzl
8-214
l"-
'l"-
~
II
I
5.0
10 k
2'..
75
«to
w
20
10
10M
f, FREQUENCY (Hzl
, FiGURE 7 - MC1531/MC1431 VOLTAGE
.GAIN versus FREQUENCY
45
\
.4'\ '"',)
CURVE
1.0M
100 k
f, FREQUENCY 1Hz!
.40
:1\
'\
I
t'-..
","
I'
LOM
10M
MC1530, MC1531, MC1430, MC1431 (continued)
FIGURE 9 - MC1531/MC1431 OPEN LOOP VOLTAGE GAIN
versus FREQUENCY
105
0
FIGURE 10 - VOLTAGE GAIN versus POWER SUPPLY VOLTAGE
5
z
:;;:
<.0
r-....
60
w
"3,
CURVEr.t'-r-.
<.0
!:;
o
>
"
5
.t
0
r-t--
........
",
r---
o
100
1.0 k
~
80
> -10
...0 3'"
~ !: 60
z" 50
r-.
, t' ""
MC1530/MC1430
~
""
.......:: ~
MC15311MC1431
17
t!J
o
40
't--...
lOOk
10 k
TA =+25'C
<.0
o
r-.... r-...
5
90
w
.,...
2:"-
1.0M
30
10M
4.0
2.0
6.0
10
B.O
VCC and VEE. POWER SUPI'LY VOLTAGE (VOLTS)
I. FREQUENCY (Hz)
FIGURE 11 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
+6.0
'"~
o
+4.0
V ...
~
FIGURE 12 - COMMON-MODE SWING versus POWER
SUPPLY VOLTAGE
~ +2.0
~
w
'"
~o
1.0 ,--,--.------,---,--,--..,.--,.--,--r---,
~
1Ji
0
~
~ -2.0
~
...g -4.0
~
r-..
w -'
g~
0:::
::;; 3
2.0 1--t--1----1"""'3.I.,:;;.~;:;..'_I_
8
1.0 f--\---.,I----+-,-..+=--Ll-...l--+--f--\----1
::;;'"
5
-6.0
10
100
4.0 I-~I--+-
~ ;; 3.0 f--\--I----+-·H--± __..jo!~....~'1"t==-\----1
'"
6
>
6.01--t--i---1--+--t--+-
iii 5.0 f--\--I----+--+-+-+-+-f--\-:!.......-::J
1.0 k
OL-_L---'~~_~~~_ _ _ _~__~_L-~
;;
10k
0
1.0
RL. LOAO RESISTANCE (OHMS)
6.0
1.0
B.O
2.0
3.0
VCC and VEE. POWER SUPPLY VOLTAGE (VOLTS)
FIGURE 13 - POWER DISSIPATION versus
POWER SUPPLY VOLTAGE
1000
800
60 0
400
200
V
100
:>
80
.§
0
z
V
o
~
iii
c
~
~
/
40
:1
17
1
~ 8. 0
B.0
4.0
2.0
1.0
2.0
3.0
4.0
5.0
B.O
1.0
8.0
9.0
VCC and VEE. POWER SUPPLY VOLTAGE (Vdc)
8-215
9.0
10
_____f
\ ....._ _ _ _O_P_E_R_A_T_I_O_N_A_L_A_M_P_L_I_F_IE_R_S--..I
MCIS33
MCI433
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
MONOLITHIC OPERATIONAL
AMPLIFIER
... designed for use as a summing amplifier, in·
tegrator, or amplifier with operating character·
istics as a function of the external feedback
components.
• High·Performance Open Loop Gain Characteristics
AVOL = 60,000 typical
•
G SUfFIX
METAL PACKAGE
CASE 602B
Low Temperature Drift - ±5 J1V 10C
FSUFFIX
CERAM,C.PAt;KAGE
CASE 606
- TO:91
• Large Output Voltage Swing ± 13 V typical@±15 V Supply
LSUFFIX
• Low Output Impedance - Zout
=
CERAMIC PACKAGE
100 ohms typical
CASE 632
TO·116
PSUFFIX
PLASTIC PACKAGE
CASE 648
(MC1433P Onlv)
FIGURE 2 - EQUIVALENT CIRCUIT
FIGURE 1 - CIRCUIT SCHEMATIC
OUTPUT
LAG
C
DC
PIN CONNECTIONS
See Packaging Information Section for outline dimensions.
8·216
Schematic
A
B
C
0
E
F
G
H
"G"Package
"F" Package
1
10
2
3
4
5
4
11
6
5
12
7
6
"L" 81 "P" Packars
4
3
7
8
7
14
,.
K
MC1533. MC1433
(continued)
ELECTRICAL CHARACTERISTICS IV+ = +15 Vdc, V- = -15 Vdc, TA = +25 0 C unless otherwise notedl
Characteristic
Unit
60,000
50,000
100
150
k!1
300
600
±12
±10
±13
±12
Vpeak
Vpeak
/lA
2.0
4.0
p.A
0.1
0.50
0.75
0.15
mV
1,0
~
Response IC2 = 10 pFI
Gai n = 100, 10% overshoot,
Rl = 10k!1, R2= 1.0M!1,
R3 = 100 n, Cl =O.Olp.F
= 10, no
~ Rl = 10 kn, R2 = 100 k!1,
Gain
f
0.1
6.2
overshoot,
R3 = 10!1. Cl = O.l/lF
p.s
p.s
Vlp.s
0.25
p.s
p.s
Vlp.s
0.3
0.1
2.9
f
~
p.s
p.s
VI/ls
0.2
0.1
2.0
Average Temperature Coefficient
of I nput Offset Voltage
p.VloC
10
B.O
IT A = Tlow to +250 CI
IT A = +25 0 C to
Average Temperature Coefficient
of I nput Offset Current
ITA = Tlow to Thighl
ITA = +25 0 C to Thl
nA/oC
ITCliol
0.1
0.05
mW
DC Power Dissipation
IPowerSupply =±15 V,
125
240
p.VN
Positive Supply Sensitivity
IV- constantl
200
Negative Supply Sensitivity
/lVN
IV+ constantl
G)
Thigh = +7SoC for MC1433,
+12SoC for MC1533
00
Trow == 0 for MC1433
-55°C for MC1533
200
~
Input offset voltage (Vio) may be adjusted to zero,
@
dVout/dt == Slew Rate
8·217
MC1533, MC1433 (continued)
MAXIMUM RATINGS ITA ~ +25 0 C unless otherwise noted)
Symbol
V+
V-
Rating
Power Supply Voltage
MC1533,MC1433
MC1533,MC1433
Differential I nput Signal
Common Mode Input Swing
Value
Unit
+20,+18
-20,-18
Vdc
Vdc
Vin
±10
Volts
CMVin
±V+
Volts
Load Current
IL
10
mA
Output Short Circuit Duration
ts
1.0
s
Power Dissipation (Package Limitation)
PD
680
4.6
500
3.3
625
5.0
400
3.3
mW
mW/oC
mW
mW/oC
mW
mW/oC
mW
mW/oC
Metal Package
Derate above T A ~ +25 0 C
Flat Package
Derate above T A ~ +2SoC
Dual In-line Ceramic Package
Derate above T A ~ +25 0 C
Dual In-Line Plastic Package
.Derate above T A ~ +25 0 C
Operating Temperature Range
°c
TA
MC1533
MC1433
-55 to +125
o to +75
Storage Temperature Range
°c
T stg
-65 to +150
-65 to +125
Metal and Ceramic Packages
Plastic Package
TYPICAL CHARACTERISTICS
FIGURE 3 - TEST CIRCUIT
v+ = +15 Vdc, V- = -15 Vdc. T A = +25 0 C
V+.
R,
Test Conditions
Fig.
No.
Curve
4
Rl (n)
R2(n)
R3(nl
Cl (I'FI
C2 (pFI
1
2
3
3
10k
10k
10k
1.0 k
10k
100 k
1.0M
1.OM
10
10
100
390
1.0
0.1
0.01
0.002
10
10
10
10
5
1
2
3
4
10 k
10 k
10k
1.0 k
10k
100 k
1.0M
1.OM
10
10
100
390
1.0
0.1
0.01
0.002
10
10
10
10
6
1
2
3
4
0
0
0
0
00
10
10
100
390
1.0
0.1
0.01
0.002
10
10
10
10
No.
00
00
00
8-218
MC1533, MC1433 (continued)
TYPICAL CHARACTERISTICS (continued)
(v+
= +15 Vdc,
V-
= -15 Vdc, TA = +
2SoC unless otherwise noted)
FIGURE 4 - LARGE-5IGNAL SWING versus FREQUENCY
8
4
I
~~
\
~
3
+50
\
4
--\ -CURVE 1
0
6
FIGURE 5 - VOLTAGE GAIN versus FREQUENCY
+65
+60
2
r-
\
'\
"
0
0
1.0k
i
+40
~
+30
~
\
2
J
ii5
\
\
"-.......
........
.......
10 k
~
> +20
2
.i
..........
+10
......
100 k
I~URVE 1
o
II
-5.0
10
1.0M
100
100 k
1.0 k
10 k
t, fREQUENCY 1Hz)
t, FREQUENCY 1Hz)
1.0 M
FIGURE 7 - OPEN LOOP VOLTAGE GAIN versus FREQUENCY
(HIGH GAIN CONFIGURATION)
FIGURE 6 - OFFSET ADJUST CIRCUIT
110
100
~
~
........
i""'-
80
A
CURVE 1
0
i"'-
........
4
!'-.
......
~
200 k
........
2i"-
3 .......
.......
.......
i"'-
0
i"'-
.....
20
.......
r-...
.......
.......
100
1.0 k
10 k
lOOk
1.0 M
t, FREQUENCY 1Hz)
v-
I
PIN CONNECTIONS
Schematic
"0" Package
ABC
1
2
"F" Package
"L" & "P" Packagn
10
4
1
5
F
G
H
4
5
8
3
4
11
1
8-219
12
J
9
10
8
2
9
3
•
MC1533, MC1433
(continued)
TYPICAL CHARACTERISTICS
(continued)
FIGURE 9 - VOLTAGE GAIN
FIGURE 8 - POWER DISSIPATION
versus POWER SUPPLY VOLTAGE
700
500
r-- r- AT REDUCED TEMPERATURE
!
100
Q
~
I
70
20
I
/
0
/
.....V
V
5.0
10
15
20
V+ AND V-, POWER SUPPLY VOLTAGES (VOLTSI
FIGURE 10 - COMMON MODE SWING
. versus POWER SUPPLY VOLTAGE
/
'- Eo"
QUIESCENT
~
;
-y...
'"~
.1
..L ,I
..I
'- Eoi'
QUI~CENT I~ 0 V
I/
tEA y TErERAiURE
10
10
12
14
16
18
§
6.0
'z:"'
4.0
~
'~MV',
/
/V/
./
~
-
1
PErlNG ;VOlTA ERANtE-
8.0
V./
/ // '
+CMV"
~
AT
I
./
2
~ 8.0
OpJTlNG
J
14
~
sJr
/
10 4.0 6.0
----
L,...--
V
!/
I
""
/ J"---
50
30
/
I
II
,f
/
/"
/
~z:
~
V
/
200
ffi
110
I
I
kFE otERATI~G ARJ
I
300
~
versus POWER SUPPLY VOL TAGE
./
,1 2.0
~
20
5.0
V+ and V-, POWER SUPPLY VOLTAGE IVdcl
15
10
20
V+ AND V-, POWER SUPPLY VOLTAGES (VOLTS)
FIGURE 11 -INPUT NOISE VOLTAGE
••rsusSOURCE RESISTANCE
16
~
~
14
12
~ 10
CUlM:
BANDWIDTH
C,
R,
INPUT NOISE =
OUTPUT NOISE
-rvoL
§!
I
~
8.0
6.0
lOOk
Rs, SOURCE RESISTANCE (OHMS)
8-220
,------1
~~________O_P_E_R_A_T_I_O_N_A_L_A_M_P_L_I_FI_E_R_S~
MC1535
MC1435
MONOLITHIC DUAL
OPERATIONAL AMPLIFIERS
MONOLITHIC DUAL OPERATIONAL AMPLIFIERS
INTEGRATED CIRCUIT
EPITAXIAL PASSIVATED
... designed for use as summing amplifiers,
integrators, or amplifiers with operating characteristics as a function of the external feedback components. Ideal for chopper stabilized
applications where extremely high gain is
required with excellent stability.
1.0.
~
~
~
F SUFFIX
CERAMIC PACKAGE
CASE 607
Typical Amplifier Features:
(bottom view)
•
High Open Loop Gain Characteristics - Avol = 7,000
•
Low Temperature Drift - ±1 011 V I"c
••
(top view)
Low Input Offset Voltage - 1.0mV
•
Low Input Noise Voltage - O.5IlV
••
c:=J
G SUFFIX
METAL PACKAGE
CASE 6028
l SUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
HIGH zin. DIFFERENTIAL TO SINGLE·ENDED AMPLIFIER
LARGE OUTPUT SWING CONFIGURATION (FLOATING LOAD)
10k
Zin=70nmin
01 pF
(differential)
;r:
4.7
,-- --I
4
10k
+
10k
2
O.l/J.F
3
If:'--.
I
I
6
I
9 :
10
I
I
~~
~ "-
I
I
I
I
I
I
I
I
I
rr~~C~5~
8
0.1 ).iF
F
l
47
5
I
O.I/J.F
10k
7
10k
"'
VEE
Ol"F
S Vdc
4.7
1
47
Ik
-
Vee
-
9k
6Vdc
See Packaging Information Section for outline dimensions.
8-221
-±-
MC1535 i MC1435 (continued)
EaUIVALENT CIRCUIT
CIRCUIT SCHEMATIC
INPUT LAG I
10~
II
OUTPUT LAG I
12(4)
14(6)
400
+(3)9
INPUT I _ (2)8 o---+_----'
9.1k
15k
5.5k
VEE ( 1 ) 7 o - - t - - - - - t - - - - H , . - - - - - t
5.5k
15k
- (10)6 o--+_--,
INPUT 2 + (9)5
OUTPUT 1
(3)9
13(5)
INPUT 1
(2)8
OUTPUT 1
13(5)
VEE 1)7
+---+--014(6)
OUTPUT 2
(10)6
1(7)
INPUT 2
(9)5
OUTPUT 2
1(7)
Vee
9.1k
400
4 3
2(8)
INPUT LAG 2 OUTPUT LAG 2
Number at end of terminal is pin number for ceramic packages.
Number in parenthesis is pin number for metal package. Input Lag available only in ceramic packages.
MAXIMUM RATINGS ITA = +2SoC unless otherwise noted. I
Rating
Power Supply Voltage
Symbol
VCC
VEE
Differential Input Signal Voltage
Common-Mode Input Swing Voltage
Load Current
Output Short-Circuit Duration
MC1435
+9.0
-9.0
Unit
Vdc
Volts
Volts
rnA
Vin
±5.0
±5.0
VICR
IL
+5.0, -4.0
20
+5.0 -4.0
20
TSC
Po
POMr Dissipation (Package Limitation)
MC1535
+10
-10
Continuous
Flat Ceramic Package
Derate above T A = +250 C
Metal Package
Derate above T A = +25°C
mW
mW/oC
mW
mW/oC
mW
mW/oC
500
3.3
680
4.6
625
5.0
Ceramic Dual I n~Line Package
Derate above T A = +2SoC
Operati n9 Temperature Range"
TA
T stg
Storage Temperature Range
8-222
-55 to +125
-65 to +150
I
o to +75
-65 to +150
°c
°c
MC1535, MC1435 (continued)
ELECTRICAL CHARACTERISTICS (Each Amplified (VCC = +£.0 Vdc, VEE = - 6.0 Vdc, TA = +250 C unless otherwise noted.1
Symbol
Characteristics
Step
Gain = 100,30% overshoot,
Rl = 4.7 kil, R2 = 470 kn,
R3 = 150 n, Cl = 1,000 pF
Unit
tPHL
tp
dVO/dt
1
Gain = 10, 10% overshoot,
Rl = 47 kn, R2 = 470 kn,
R3= 47 n, Cl = 0.01 "F
tPHL
tp
dVO/dt
1
mAde
mW
Average Temperature Coefficient 1161-1162
I nput Offset Voltage
Average Temperature Coefficient
Channel Separation (See Fig. 101
(t=10kHzl
(j) Tlow:
OOC for MC1435
-55°C for MC1535
Th;gh: +75 0 C for MC1435·
+125 0 C for MC1535
® dVO/dt = Slew Rate
8-223
MC1535, MC1435 (continued)
TYPICAL OUTPUT CHARACTERISTICS
(VCC
= +6.0 Vdc,
VEE
= -6.0 Vdc, T A = +2s"C.)
FIGURE 1 - TEST CIRCUIT
TEST CONDITIONS
--,
>--<>-+---e
FIGURE
NO.
CURVE
NO.
1
3
3A
10,
I
lor ~~~
a
'0
I
RL
VOLTAGE
GAIN
L
4
__ J1<5.OpF
I
2
10,
10
10
3
lor
I
I
I
Avol
Avol
tor Avol
Avol
or Avol
_1- C
'T'
1
2
3
lor
I
FIGURE 2 - LARGE SIGNAL SWING
versus FREQUENCY
+60
16.0
?
+50
5.0
to
4.0
0
3.0
.
'='
w
:>
t-
'"0
RaIn)
41 k
4lk
4Jk
41k
100,000
0
4.1
4.Jk
4.lk
41 k
4lk
41 k
4lk
410k
410k
410k
410k
4Jk
4lk
1,000
0
10,000
0
100,000
0
150
00
00
00
00
00
1,000
0
10,000
0
100,000
0
100
100
100
100
100
100
'"
OUTPUT
NOISE
mVIRMS)
C21.F)
'"
'"
'"
4.1
'"
41
150
00
·41
00
4.1
00
0
50,000
0.12
0.46
0
510
0
5,000
0
SO,OOO
1.1
2.1
1.0
2.1
0.12
0.46
0
510
0
5,000
0
50,000
8.1
8.1
5.5
5.5
4.4
4.4
I
~ +40
"-
z
;;:
~ +30
.
to
3
\
t-
...'"
CII.F)
FIGURE 3 - VOLTAGE GAIN v.rsus FREQUENCV
7.0
'"
~
H21n)
VCC
·Ceramic packages only.
to
Rlh,)
2.0
6
> 1.0
~
3A
~
-
o
100
1.0 k
2
+20
o
:>
"
<' +10
\
100 k
1.0k
100
1.0M
1.0M
100 k
10k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
140
;;
+1.2
....... --
E
~
120
..
.'='
to
to.8
....... V
z
~ 100
z
to
3
to
;
~
w
r-....
>
g
1"
........ 2
60
0
..
40
>
E
0-0.8
l"-
10 k
lOOk
V
V
Slope can be either polarity
.,,/
t-
~
!; -1.2
6
1.0M
1-
:>
i'-.
o
./
t- -0.4
r-...
r-....
1.0k
L
o
I"-
20
100
+0.4
to
80
W
10M
FIGURE 5 - INPUT OFFSET VOLTAGE
v.rsus TEMPERATURE
FIGURE 4 - OPEN LOOP VOLTAGE GAIN
versus FREQUENCY
;;:
"
3
-10
10 k
10M
<-1.6
-60
-40
-20
+20
MC1135+40
r-I
+60
+80
TA' AMBIENT TEMPERATURE I'C)
f, FREQUENCY (Hz)
8·224
+100
+120 +140
MC1535, MC1435 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 8 - POWER DISSIPATION _sus
POWER SUPPLY VOLTAGE
FIGURE 6 - VOLTAGE GAIN velSus
POWER SUPPLY VOLTAGE
0
0
~
O~
V
~
~
~
>0;
.....
4. 0
~~
~~ 3.0
z'"
~~
S
--
.,.,-
2.0
or-
5"
200
V
~
5.0
1-
-> o. 5
V
...-
I--"""""
---
4.0
2.0
-
.,.,- +VICR
B.O
6.0
~
100
~
5
80
~
60
~
40
~
1<
---
-VICR
-
25
50
75
FIGURE 7 - COMMON MOOE SWING
velSus POWER SUPPL Y VOLTAGE
w
SAFE OPERATING AREA
AT REDUCED TEMPERATURE
400
------
0
0
700
600
500
-
TA=+2SoC
.....
.........
/
V
DO
125
w
'0 QUIESCENT' 0 V-
-
/
SAFE OPERATING AREA
rANi TEMP{RATiRE
3.0
4.0
5.0
6.0
7.0
8.0
9.0
VCC "d VEE. POWER SUPPLY VOLTAGE (Vdel
10
100
(5.0. H~ t~ ~~ ~~~I
CI'I.OOO pF R3 ~
w'
to
;o
0
>
_
OPEN LOOP
'":zo
-
Av ,I00
w
CI '1.000pF R3 '150"
CI,O.OI_F I
~ 1.0
~ Av'lO
I!:
=>
o
~
r- Av-I-
O. I
100
>-....- •.
~171!\
0
OUTPUT LAG
I:~
CI'O.I_F R3 '5.0"
1.0 k
10 k
Rs. SOURCE RESISTANCE (OHMS)
100 k
RS ' Rs
VCC
FIGURE 10 - INOUCED INPUT SIGNAL
ICHANNEL SEPARATION) velSus FREQUENCY
1000
~
00
r -.......
/
Induced input signal (pV of induced input signal in amplifier #2
per volt of output signal at amplifier #1)
e'
1.0 """'"
100
1.0 k
10 k
f. FREQUENCY (Hz)
100 k
0
'l" e' in2
(~l.Wheree· 02 isthe component of
eo 2 due only to lack of perfect separation between the
1.0M
two amplifiers.
8-225
125
~
AMBIENT
TEMPERATURE
DEGREES
CENTIGRADE
FIGURE 9 - OUTPUT WIDEBANO NOISE VOLTAGE
velSus SOURCE RESISTANCE
.5-
75
100
;f
/
VCC aod VEE. POWER SUPPLY VOLTAGE (VOLTS)
;;
100
25
50
'"
10
2.0
10
75
125
l/
/
20
I
::
t
'02
MC1536G
MC1436G
MC1436CG
~__________O_P_E_R_A_T_IO__N_A_L_A~M_P_L_I_F_IE_R__~
HIGH VOLTAGE, INTERNALLY COMPENSATED
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components.
•
•
•
•
•
•
•
•
•
•
EPITAXIAL PASSIVATED
Maximum Supply Voltage - ±40 Vdc (MC1536G)
Output Voltage Swing ±30 Vpk(min) (V+ = +36 V, V- = -36 V) (MC1536G)
±22 Vpk(min) (V+ = +28 V, V- = -28 V)
Input Bias Current - 20 nA max (MC1536G)
Input Offset Current - 3.0 nA max (MC1536G)
Fast Slew Rate - 2.0 V/IlS typ
Internally Compensated
Offset Voltage Null Capability
Input Over-Voltage Protection
AVOL - 500,000 typ
Characteristics Independent of Power Supply Voltages(±5.0 Vdc to ±36 Vdc)
METAL PACKAGE
CASE 601
(bottom view)
FIGURE 1 - 01 FFERENTIAL AMPLIFIER WITH ± 20 V
COMMON-MODE INPUT VOLTAGE RANGE
FIGURE 2 - VOLTAGE CONTROLLED CURRENT
SOURCE 0; TRANSCONDUCTANCE AMPLIFIER
WITH 0 TO 40 V COMPLIANCE
R2
'OOk
"'
10k
"''OOk
-<>-1
VA 0 - _..........
Ore
Vo = 10 {VB-VAl
R3
41'
fl3
&10
1-____';,;;OO;,;:k-i
R4
-28V
0'
1
'DOk
l(J=
4.n
FIGURE 3 - TYPICAL NON-INVERTING Xl0
VOL TAGE AMPLI FI ER
~=~ =2 mA/V
:~~~CC(:~;)A4!2R4
FIGURE 4 - LOW-DRIFT SAMPLE AND HOLD
Vo -44V II"p
>-e>-.........
out
'in
9k
-Driftdutlobisseurr'''t
is typically BmV/s
COMMAND
See Packaging Information Section for outline dimensions.
See current MCC1536/1436 data sheet for standard linear chip information.
8-226
-2BV
MC1536G, MC1436G, MC1436CG (continued)
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted 1
ELECTRICAL CHARACTERISTICS IV+ = +28 Vdc, V- = -28 Vdc, T A = +25 0 C unless otherwise noted 1
Characteristics
Unit
Current
nAdc
TA'" +2SoC
(See Note 1)
T A'" Tlow to
11;01
I nput Offset Current
nAdc
TA"" +250 C
10
25
5,0
12
T A'" +2S0C to Thigh
to +2SoC
TA ==
IV;ol
mVdc
£22
v+' =
-'
+36 Vdc, V- "" -36 Vdc
Power Supply Sensltivitv (de)
IlVN
V- = constant, Rs ~ 10 k ohms
s+
V+ = constant,
s-
S; 10
POVoler Supply Current
k ohms
50
50
(See Note 2)
2,6
5,0
2,6
5,0
14£>
280
mW
DC Quiescent Power Dissipation
,= 0)
Note 1
T,ow: OOCfor MC1436G,CG
-5S0C for MC1536G
Thigh: +7S 0 C for MC1436G,CG
+15(fc for MC1536G
mAde
Note 2
V+ '"'
I v-I
v+
lv-I = 5.0 Vdc to 30 Vdc for MC1436G
=
;0
5.0 Vdc to 36 Vdc for MC1536G
v+ '" lv-I" 5.0 Vdc to 28 Vdc for MC1436CG
8-227
MC1536G, MC1436G, MC1436CG (continued)
FIGURE 6 - PEAK OUTPUT VOLTAGE SWING v......
POWER SUPPLY VOLTAGE
FIGURE 5 - POWER BANDWIDTH
..
>2 35
70
0
t
w
5~
~<>
4C
~
30
>
"""""''\
'\
'"
4
'="
-28V
"' "'
20
10
10k
r-
6.0 8.0 10
20
40
60 80100
'"
-
f. FREQUENCY (kHz)
>
10
~
5.0
=>
<>
..
..
.10
400
32
28
.~
> +20
at::
20
~
16
:5
'""
12
<;
~
-20
10
24
"r-...
100
---............
~
...........
=>
-I~
1.0
~
'"
<> +40
>
.:;
<>
1.0 k
10 k
100 k
'"en
....
8.0
g
4.0
~
['\.
~
10M
1.0M
100M
~
-25
-50
+25
V.....I
TEMPERATURE
3.2
2.8
!<>
2.4
::::;
~ 2.0
5
a: 1.6
=>
<.>
'"
~ 1.2
"'"
a;
.... O.8
~
z
~
"
.........
r--....
o.4
o
-75
;NK
-...............
+50
-50
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE (DC)
8-228
-
r--::::: t:-...
+75
TA. AMBIENT TEMPERATURE (DC)
FIGURE 9 - INPUT BIAS CURRENT
~
SOURCE
............
0
-75
f. FREQUENCY (Hz)
s
uo
<30
FIGURE 8 - OUTPUT SHORT-CIRCUIT CURRENT
versus TEMPERATURE
!Z
~
<20
V+. V-. POWER SUPPLY VOLTAGE (Vd,)
~
+60
V
,:
.s
~
/
V
t--
+120
:0: +80
RL=5kll/
15
~
<>
+140
'"w
'"~
V
20
..'"
FIGURE 7 - OPEN-LOOP FREQUENCY RESPONSE
~ +100
z
V
w
....
200
r-T~=25ot
25
i
rrr-
~
o
4.0
?
f--evo r-
6
30
!:i<>
I-I--
7
3
<>
.j
.?rf
z
~
r-
+100
+125
+100
+125
MC1536G, MC1436G, MC1436CG (continued)
FIGURE 11 - NON-INVERTING FEEDBACK MODEL
FIGURE 10 - INVERTING FEEDBACK MODEL
lout
FIGURE 12 - AUDIO AMPLIFIER
100.
CURRENT DRAIN,
10 .. ,00 mAde@!
Rl"'5Hl
01.D2.D3= lN4OD1
- - - - COMMON
HEAT SINK
10'
O.S,..f
3
10'
1k
1k
v-" -30 Vile
FIGURE 13 - CIRCUIT SCHEMATIC
FIGURE 14 - EQUIVALENT CIRCUIT
v'
7
INVERTING
v,
~----i~6 OUTPUT
NON
,
INVERTING
L
10k
.-J
-vr:FSET
___ .J
8-229
ADJUST
MC1537
MC1437
l . . _____
O_PE_R_A_T_I_O_N_A_L_A_M_PL_I_F_1E_R_S-----l
HIGHLY MATCHED
MONOLITHIC DUAL OPERATIONAL AMPLIFIERS
... designed for use as summing amplifiers, integrators, or amplifiers
with operating characteristics as a function of the external feedback
components. Ideal for chopper stabilized applications where ex·
tremely high gain is required with excelient stability.
DUAL MC1709
MONOLITHIC SILICON
OPERATIONAL AMPLIFIERS
INTEGRATED CIRCUIT
Typical Amplifier Features:
• High·Performance Open Loop Gain Characteristics AVOL = 45,000 typical
• Low Temperature Drift - ±3 JlV 10C
• Large Output Voltage Swing . ± 14 V typical @± 15 V Supply
P SUFFIX
PLASTIC PACKAGE
CASE 646
MAXIMUM RATINGS
(T
= +250 C)
Symbol
Value
Unit
Power Supply Voltage
V+
+18
Vdc
V-
-18
Vdc
Differential I "put Signal
Vin
±5.0
Volts
CMVin
±V+
Volts
Output Short Circuit Duration
ts
.5.0
Power Dissipation (Package Limitation)
Po
Rating
Common Mode I "put Swing
Ceramic Package
Oerat. above T A
Plastic Package
Derate above T A
=
+250
751)
6.0
625
5.0
C
= +250 C
Operating Temperature Range
mW
mW/oC
mW
mW/oC
-55 to +125
o to +75
MC1537
MC1437
Storage Temperature Range
Tstg
-65 to +150
I'c::::J
LSUFFIX
CERAMIC PACKAGE
CASE 632
~
~i~"rTI
..•.. r
TO·116
°c
FIGURE 2 - EQUIVALENT CIRCUIT
FIGURE 1 - CIRCUIT SCHEMATIC
'-.:...:;.",.,+-_~--"'":c"..:."'C6' "
rl--+-----<>"
OUTPUT I
INVERTING
INPUT l
(top view)
1
°c
TA
(MC1437 only)
<>-''---1''''--...,
See Packaging Information Section for outline dimensions.
8-230
MC1537, MC1437 (continued)
ELECTRICAL CHARACTERISTICS -
Each Amplifier (V+ = +15 Vdc, V- = -15 Vdc, T A = 25°C unless otherwise noted)
Open Loop Voltage Gain
IRL = 5.0 kn, V o = ± 10 V,
TA=Tlow
C:::-8.0
>0 -10
II
/
-12
-14
100
10
10 k
1.0 k
100 k
- 5.0
1.0M
1
100
10
1.0 k
t, FREQUENCY (Hz)
~
II
III
~
80
CURVE
z
If'.
'-l
'{
3
4
2f'..
;;;:
..
to
w
to
60
i'-,
~
0
>
.:.
0
40
>
'"
20
1(R L
j
ilJ
"
"
"
=~)
500
1
300
3: 200
oS
5
'I'
1.0k 2.0k 5.0kl0k
~
100
iii
cco
50
~
'I''I'-
lOOk
I
--
I
\Ii:
~
30
~
20
V
/
CAUTION: ADDITIONAL POWER
DISSIPATION RESULTING FROM
~URVE' I
6.0
8.0
1,0
I
I
I
12
14
16
V' AND V-; POWER SUPPLY (Vde)
8-232
-
~~~~~~ ~~~~~~~O¢~EC!ig~~s -
V
4.0
t, FREQUENCY (Hz)
...........
./
./
10
1.0M
.....
Vo=OVOLT
z
'I'100
1.0M
FIGURE 7 - TOTAL POWER DISSIPATION
versus POWE R SUPPLY VOLTAGE
o
10
100 k
10 k
t, FREQUENCY (Hz)
FIGURE 6 - QPEN LOOP VOLTAGE GAIN
versus FREQUENCY
100
Rj. -=1
II
~
~ -2.0
-
CURVEli
+4.0
w
~
Cl(pF)
1
10
100
1000
III
l'I.
2
R3(!l)
FIGURE 5 - VOLTAGE GAIN ve,sus FREQUENCY
I
1\
111111
111111
+10
~ +8.0
~ +6.0
RZ(!l)
1
2
3
4
FIGURE 4 - LARGE SIGNAL SWING
versus FREQUENCY
f
OUTPUT
NOISE
TEST CONDITIONS
Rl(O)
4
C2
+14
_ +12
=25°C
18
MC1537, MC1437 (continued)
TYPICAL CHARACTERISTICS (continued)
fiGURE 8 - VOLTAGE GAIN versus
POWER SUPPLY VOLTAGE
100
-z
'"
~ 80
~
0
0
z
w
0
~
'"
70
/
/
/'
~ ::
'" 14
~
-
TA" 25°C
90
~
fiGURE 9 - COMMON INPUT SWING
versus POWER SUPPLY VOLTAGE
V--
./
~1 1
'~"
CMVY
10
V/
>
8
o
o
"
"S
•
;;z
o
/
60 o
/"
z
5.0
10
20
15
,;-
~
0
fiGURE 10 -INPUT OFfSET VOLTAGE
versus TEMPERATURE
I'--
'"
I-
0.2
Slope can be ~ilher
........
...........
........
""---
........
~-O.4
-OPEN lOOP
'>
p~laritv
C2-3.OpF R3"0
.§
w
'"~
10
~
i'-.
F==F=
AV= 1000 C, = 10pF C2=3.0pF A3=D
+40
+60
+80
+100
+120
f--f-- Av = 100 C1 = 100 pF C2" 3.0 pF R3 = 1.5 k
!10~I~i.Il!--.11
~
.....
g
>"
+20
20
>
o
-.-0.6
~
-0.8-60 -40 -20
15
fiGURE 11 - OUTPUT NOISE VOLTAGE
versus SOURCE RESISTANCE
100~·C,"'0pF
........
'"G+O.2
a
10
5.0
o
v+ AND V-, POWER SUPPLY VOLTAGE (VOLTS)
>+0.6
.§
~
~ !""+CMVin
~
1
v+ AND V-, POWER SUPPl Y VOL TAGE (VOLTS)
~+O.4
V
+140
AV = 10 Cl = 510 pF C2 = 20 pF R3 = 1.5 k
0.1 ~A~V~"~I~.0~C'~"~OE·OE05E"rnF~C~1~"320~0~PF~R3~"~'e·5~k~~~~Il~~
100
1.0 k
10 k
RS. SOURCE RESISTANCE (OHMS)
lA. AMBIENT TEMPERATURE (DC)
lOOk
FIGURE 12 -INDUCED OUTPUT SIGNAL
(CHANNEL SEPARATION) versus fREQUENCY
10'OOO~~!!!II~~~lllg~gl!11
'>
3:
.3
!1000~~~~111~11111~1~111
~
~100!111111
10
~
100
1.0k
I, FREQUENCY
10k
Induced output signal (IlV of induced output signal in
100 k
IHzl
8-233
amplifier
12
per volt of output signal at amplifier #'1).
MC1538R
MC1438R
1L_________________PO_W__ER__B_O_O_S_T_E_R~
MONOLITHIC POWER BOOSTER
The MC153B/MC1438 is designed as a high current gain amplifier
(70 dB), with unity voltage gain that can deliver load currents up to
±300 mAdc. This device is ideally suited to follow an operational
amplifier (such as MC1556/MC14561 for driving low impedance loads
and improving the overall circuit performance.
• High Input Impedance - 0.4 Meg·Ohm typ - when driving the
MC153B/MC1438, the gain of an operational amplifier will
approach the unloaded open·loop gain. Internal power dissipa·
tion of the operational amplifier will be independent of output
voltage and therefore thermal drift will be reduced.
POWER BOOSTER
INTEGRATED CIRCUIT FOR
OPERATIONAL AMPLIFIERS
EPITAXIAL PASSIVATED
CASE 614
• Large Power Bandwidth - 1.5 MHz typ - considerably better than
present operational amplifiers. Bandwidth and slew rate will be
limited by the operational amplifier, not the MC1538/MC143B.
• Low Output Impedance - 10 Ohms typ - allows the MC1538/
MC1438 to drive a capacitive load with greatly reduced phase
shift compared with an operational amplifier. Output voltage
swing capability is much increased when driving small load im·
pedances.
• Adjustable Current Limit - ±5.0 mAdc to ±3oo mAdc
• Excellent Power·Supply Rejection - 1.0 mVIV typ
• Current Gain - 3000 typ
Ca. connected to V-
TYPICAL APPLICATIONS
OPERATIONAL AMPLIFIER BOOST CIRCUIT
DIGITAL OR ANALOG LINE DRIVER
r-~--- Vout",Vin
ftA
39
Zout",son
VOUI
ft.
Ro = Zour-10 n
470pF
POWER SUPPLY SPLITTER
SERVO/POWER AMPLIFIER
Sea Packaging Information Section for outline dimensions.
8·234
MC1538R, MC1438R (continued)
MAXIMUM RATINGS (TC = +25 0 C unless otherwise noted)
Rating
v+
V-
···.15_.
I::i
Vin - Vout
~t~,";~
Symbol
Power Supply Voltage
I nput-Qutput Voltage Differential
. ...
MC1438R
Unit
+18
Vdc
-18
."
-14, +36
Vdc
IVinl
V+or V-
Vdc
IL
350
mAde
TA' +250 C
Derate above T A = +250 C
Thermal Resistance, Junction to Air
Po
1/8JA
8JA
3.0
24
41.6
Watts
mW/oC
°C/W
TC = +250 C
Derate above T C • +2SoC
Po
1/8JC
8JC
17.5
140
Watts
mW/oC
7.15
°C/W
TJ,Tstg
-65 to +150
°c
I nput Voltage Swing
Load Current
Power Dissipation and Thermal Characteristics
Thermal Resistance, Junction to Case
Operating and Storage Junction Temperature Range
OPERATING TEMPERATURE RANGE
Ambient Temperature
o to +75
-55 to +125
MCI438R
MCI538R
ELECTRICAL CHARACTERISTICS
(RL = 300 ohms, TC = +25oC unless otherwise noted.)
8.0
MHz
1.5
MHz
0.5
%
mAde
ISC
Adjustable Range
Power SupplV Sensitivity
3
3
4,5
2
mVIV
2
S+
S-
(V- constand
(V+ constand
Power Supply Current
(RL = 00, Vin = 01
Note 3.
1.0
2
2
Note 1.
Note 2.
140
3
75
Po
6.0
15
mAde
180
450
mW
Output offset Volta. il the quiescent de output voltege with the Input grounded.
Short-Circuit Current, ISC. I,adjultable by varying R1. R2. R3 and A4. The pOlitive current limit Is Ht by R1 or A3, and
the negative current limit i, set by R2 or R4. See F Igur. 4 and 5 for curve. of short-circuit current versus R 1, R2, R3 and R4.
V+ == +15 V, V- == -15 V.
8-235
MC1538R, MC1438R (continued)
TEST CIRCUITS
FIGURE 2
FIGURE3
ISC
=;")
CIRCUIT SCHEMATIC
v+
300
400
300
50k.,.---_ _.......
Positive Current
limit Adjust
7.0
Positive Output
Positive Current
Sense
Input 90--+---------+----+-----+
Negative Current
Sense
Negative Output
Negative Current
limit Adjust
300
300
300
v-
~
~--------~--~~--~~-----__~+_-4-~~Case
~
(bottomviewl
Cae I. connact.o;t to v-
TYPICAL CHARACTERISTICS
(V+
=+15 Vdc. V- = -15 Vdc. TA =+250 C unless otherwise noted)
FIGURE 4 - SHORT -CIRCUIT CURRENT versus R1 OR R2
FIGURE 5 - SHORT-CIRCUIT CURRENT versus R3 OR R4
(100 mA to 300 mAl
(5.0 mA to 100 mAl
.
140
."~~m.-
0
-
7 6 R3
.J;,~ MC1438R
Me15"",
0
2 3
5
4
fl4
1+_
....
-
C.~t5V
0
-
I~ "':"'-
0
10
20
30
.
0
R3limiul+
R4limihd-
"-
0
50
20
Rt OR R2 (OHMS)
40
60
80
R3 OR fl4 (OHMS)
8-236
10.
120
140
MC1538R, MC1438R (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 6 - POWER SUPPLY
FIGURE 7 - SMALL SIGNAL GAIN AND PHASE RESPONSE
CURRENT venus SHUNT RESISTANCE
13
~
"'- ""-..
12
E
....
~
a
i
'"
~
!2
11
10
vin =10
Rl = R2 '
R3=R4=0TA = +125 DC
0r--'-t-1. 0
I
----
! -~
0
-6.0
9.0 _TA=+25 DC
10
K~f'
-2.0
700;;
80
\
10
20
90
50
30
100
I. FREOUENCY IMHz}
Rl OR R2. SHUNT RESISTANCE (OHMSI
FIGURE 8 - POSITIVE OUTPUT
FIGURE 9 - NEGATIVE OUTPUT
VOLTAGE SWING versus LOAD CURRENT
VOLTAGE SWING versus LOAO CURRENT
10
1--+-+--1-+ R3Rl ==, RZ
=00" _+---+_-++-1
R4 = 0
=ii
cw
'"
«
. .I.
~
> 5.0
I
I--i---t--+ Vin adlusted for Vout = +10 Vdc -t---t-t--i
with Il = O.
'Rl=~2=00'
I---t--+--+- Vi"ladiuste~ 10< VD~t = -10 Vde-4_--I+-I
~
0
0
....
....=>
1==>
---+---+---++-1
1---1---11---1-- R3 =R4 =0
=ii
cw
'"«
withIL=O.
> -5.0
~
~
0
0
S
5
>
~
0
-10
0
40
20
60
BO
100
20
0
40
Il, LOAD CURRENT (mAde I
60
80
100
Il, LOAD CURRENT (mAde I
FIGURE 10 - OUTPUT OFFSET VOLTAGE
versus TEMPERATURE
30
!E
'"
«
~
70.---,----,---.---,,---.---,----r--~
,,
a
I
f
I
15
0
0
~
v+ = 20 Vde. V- = -20 Vde
ZO
>
....=>
1=
=>
,
25 I---v+ = 15 Vde. V- = -15 Vde
0
~
f
f
V+ = 5.0 Vde. V- = -5.0 Vde
w
I
I
I
I
I
I
I
:--50
-25
'\
,
I
5.0
~
I
I
I
~
~
,
I
10
-75
FIGURE 11 - INPUT BIAS CURRENT versus TEMPERATURE
MC143B
LIMITS
25
-:
50
75
40~
100
125
-75
__
~
-50
__
~
-25
__
~
____L __ _
25
~
50
__
~
75
TA. AMBIENT TEMPERATU RE (DCI
TA. AMBIENT TEMPERATURE (DCI
·See figur8s4 and 5 for definition of R1, R2,R3, and R4.
8-237
-L__
__
100
~
125
MC1538R, MC1438R (continued)
TYPICAL CHARACTERISTICS (continued)
(V+ = +15 Vdc, V- = -15 Vdc, TA = +250 C unless otherwise noted)
FIGURE 12 - PULSE RESPONSE CHARACTERISTICS
:,
~
"'.00
w?
<.Ow
~<.O
.-~
IV
6.0
500
400
300
_ 250
~
.g 200
I
4.0
\oulput
1
2.0
1
0.>0
... >
Input I
1\
dV'250VI
dt
".
\
c::>
>0
~ -6.0
I
dt
o
I
200
...
I /
"
S
r7
if
\
::;
I
\
I
400
600
-
MCI438-_
20
i/
'!:!.. 75 VI".
-8.0
1150
z 100
~
'"::><.> 70
c 50
RL' 300 ohms
\
£~ -2.0
~J= -4.0
-10
FIGURE 13 - DC SAFE OPERATING AREA
r-
10
8.0
MCl538I==
10
800
1.0
1000
5.0
2.0
t, TIME Insl
10
20
30
40 50
v· - V7 OR V2 - V-IVdcl
TYPICAL APPLICATIONS
FIGURE 15 - NON·INVERTING POWER AMPLIFIER
FIGURE 14 - NON-INVERTING AC POWER AMPLIFIER
.r-~--~----t-------~
0.1
"
X.
~F '='
20k
RA+Re
I.Av=~"'20
II. Isc"'200mA
5.1k
HI. Zout=O.6ohms
IV.
.
RA+ RS
I.AV"'~
5.0/olF
II. lout ... RAR+ARB 10-40
Zin~1.0kDhm
IV. 1St = 200mA
V. PBW= 1.0MHz
FIGURE 17 -INVERTING POWER AMPLIFIER
FIGURE 16 - NON-INVERTING VOLTAGE FOLLOWER
ft,
Characteristics
I, % Error'"
(Vcr~i: 102 .. 0.001%
II. Zout",,1D-4n,f<20Hz
III. Zin230MlIOhms.f<20'Hz
IV,,'SC"200 mAdt
III.
v-
Zin~
RA
IV.ISC ... 200mA
8-238
MC1538R, MC1438R (continued)
TYPICAL APPLICATIONS (continuedl
FIGURE 19 - CONSTANT CURRENT SOURCE
OR TRANSCONDUCTANCE AMPLIFIER
FIGURE 18 - PROGRAMMABLE VOLTAGE SOURCE
R,
.DO
ChllractlriltiCi
IL 1
rnA
1.---10Vin RO
V
II. Zout« I.Omilli-ohm,f-ZDHz
II. Foroptimumlinllrity:
RA RD
Ra=Rc"
FIGURE 21 - ASTABLE MULTIVIBRATOR
FIGURE 20 - SIGNAL DISTRIBUTION
R.
10.
Vootl .... Vin
Chll'ICbriltics
1
2ft_
2R o Co ln(I+-)
1.10·--
R,
Vout 2 ""Yin
1I.lsc=2IXJmA
III. Vo(pk)-,t IVz +O.7IVolb
FIGURE 22 - WIEN BRIDGE OSCILLATOR
Chll1Ictlriltics
I. Pow. ..ppliel . . pro1Kted
fromth.autputflUlt; Isc=2lX1mA
ChlrKllriitics
I. '0"
8-239
21'R~ Co
from 0.01 Hz 10 10 kHz
II. 'Sc"ZOOmA
\
MC1539
MC1439
_______O_PE_R_A_T_I_O_N_A_L_A_M_P_L_I_F_IE_R_S------'
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
· .. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components. For detailed information see Motorola Application
Note AN·439.
MONOLITHIC SILICON
•
Low Input Offset Voltage - 3.0 mV max
•
Low Input Offset Current - 60 nA max
INTEGRATED CIRCUIT
G SUFFIX
•
Large Power-Bandwidth - 20 Vp-p Output Swing at 20 kHz min
•
Output Short-Circuit Protection
•
Input Over-Voltage Protection
•
Class AB Output for Excellent Linearity
•
Slew Rate - 34 V Ip.s typ
METAL PACKAGE
CASE 601
LSUFFIX
CERAMIC PACKAGE
CASE 632
(TO-116)
FIGURE 1 - HIGH SLEW-RATE INVERTER
100 k
10 k
2200 pF
lOOk
P2 SUFFIX
O.I"F
PLASTIC PACKAGE
CASE 646
(MC1439 only)
(10)
1k
.J
~~35V//JS
dt
51k
10k
P1 SUFFIX
+15 V -15 V
PLASTIC PACKAGE
CASE 626
(MC14390nI V)
Pin numbers adjacent to terminals apply to a-pin packages, numbers in
parenthesis apply to Itt-pin packages.
FIGURE 3 - OUTPUT LIMITING CIRCUIT
FIGURE 2 - OUTPUT NULLING CIRCUIT
RF
ein
RI
_ ...D~~Z - 2.1 V
(10)
Vee
150
:.J-L..:.. -0.1 V
>-<>-WIr--+_'.
(10)
>-<>-<~"'.
10 k
See Packaging Information Section for outline dimensions.
8-240
MC1539, MC1439
(continued)
ELECTRICAL CHARACTERISTICS IVcc = +15 Vdc, VEE = -15 Vdc, TA = +2soC unle .. otherwise noted.1
Unit
Characteristic
Input Bias Current
ITA = +2so C)
0.20
1.0
ITA = Tlow(j))
0.23
1.5
nA
I nput Offset Current
150
ITA = Tlow)
ITA = +2s o C)
20
100
150
ITA = Thigh(j))
mV
I nput Offset Voltage
ITA = +2s o C)
2,0
7.5
IT A = Tlow, Thigh)
Average Temperature Coefficient of Input
Offset Voltage ITA = Tlow to Thighl
3.0
IRS = 50 H)
Equivalent Input Noise Voltage
IRS = 10 kll, Noise Bandwidth = 1.0 Hz,
f = 1.0 kHz)
80
no
IT A = +2soC to Thigh)
15,000
100,000
ITA=Tlowl
15,000
100,00:)
10
50
CMRR
Common-Mode Rejection Ratio
dB
If = 1.0 kHz)
Open-Loop Voltage Gain (VO=±10V, RL
10 kll, R5 = 00 I
=
Avol
Power Bandwidth
Vo = 20 Vp·pl
kHz
PBW
IRL = 2.0 kn)
IRL= 1.0kn,Rs= lOki
Step Response
130
tpHL
{ Gain = 1000, no overshoot,
}
Rl = 1.0kn, R2= 1.0M!!, R3= 1.0k!!,
R4= 30kll, Rs= 10kll, Cl = 1000 pF
{ Gain = 1000, 15% overshoot,
ns
6.0
V/~s
80
}
Rl = 1.0kH, R2 = 1.0 MH, R3= 1.0 kll,
. R4=O,R5=10k!!,Cl=10pF
ns
190
tp
100
ns
dVO/dt
14
V/~s
ns
tPHL
60
Rl = 1.0kl!. R2= lOOk!!, R3= 1.0kll,
tp
100
ns
R4= 10k!!, Rs= 10kH,Cl = 2200pF
dVO/dt
34
V/~s
{ Gain = 10, 15% overshoot,
}
Rl = 1.0kH, R2= 10kll, R3= 1.0kll,
tpHL
120
ns
tp
80
ns
R4 = 1.0 kn, Rs = 10 kll, Cl = 2200 pF
dVO/dt
6.25
V/~s
}
{ Gain = I, 15% overshoot,
Rl = 10kn, R2= 10kn, R3=5.0kn,
160
ns
80
ns
R4 = 390 n, R5 = 10 kn, Cl = 2200 pF
4,2
V/~s
4.0
kH
{ Gain = 100, no overshoot,
}
Output Impedance
If = 20 Hz)
Output Voltage Swing
Vpk
Vo
IRL = 2.0 kn, f = 1.0 kHz)
±10
Negative Supply Sensitivity
IVCC constant, RS = 001
:1013
s+
50
200
IlVN
S-
sO
200
IlVN
10+
3.0
6.7
mAde
10-
3.0
6,7
Power Supply Current
IVO = 01
0)Tlow
= oCe
for MC1439
- 5SoC for MC1539
Thigh
= +75 0 C
for MC1439
+12SoC for MC1539
0dVo/dt = Slew Rate
8-241
•
MC1539, MC1439 (continued)
MAXIMUM RATINGS (TA
=
+250 C unless otherwise noted)
Rating
Svmbol
Value
Unit
VCC
VEE
+18
+18
Vdc
Vin
+(VCC + IVEEP
Vdc
VICR
+VCC.-IVEEI
15
Vdc
Power Supply Voltage
Differential I nput Signal Voltage
Common-Mode Input Swing Voltage
Load Current
IL
Output Short-Circuit Duration
ts
Power Dissipation (Package Limitation)
Metal Package
Derate above T A = +250 C
Ceramic Dual In-Line Package
Derate above T A = +25 0 C
Plastic Dual In-Line Packages MC1439
Derate above T A = +250 C
Po
Operating Temperature Range MC1539
TA
680
4.6
750
6.0
625
5.0
mW
mW/oC
mW
mW/oC
mW
mW/oC
-55 to +125
to +75
°c
o
MC1439
°c
T stg
Storage Temperature Range
Metal and Ceramic Packages
Plastic Packages
-65 to +150
-55 to +125
FIGURE 5 - EQUIVALENT CIRCUIT
FIGURE 4 - CIRCUIT SCHEMATIC
(111
mA
Continuous
_.------__+----
.....
7'0------..-~.----
Vee
7(11)
Vee
(3)1
INPUT
8(12)
LAG
(3110------+--f----t---t--,
INPUT LAG
(12)8
1412
INVERTING
INVERTING INPUT
(41 20-'W"....,.....~-{
40
1k
lin
6(10)
OUTPUT
1k
40
151 30-"""".........+---+-----'
1513
Alin PWY-....::;,~-<>S
RO
(l0l
NON
INVERTING
NON·INVERTING INPUT
19150-------+------1------'
OUTPUT LAG
(9)5
VEE
(Sl 40-_ _ _ _ _ _~--.....- - - - - - - -.....---+_--.J
Pinnumbersadjacenl 10 termina!lapplyto 8·pin packagas, numbers in parenthesis apply to 14.pinpeckages.
Pin 7 is electrically connected to the substrate and VEE for Case 646 only.
"Patent pending.
TYPICAL OUTPUT CHARACTERISTICS
(Vee = +15 Vdc, Vee ~ -15 Vdc, T~. = +250 C.l
TEST CONOITIONS (FIGURE 61
FIGURE
NO.
7,8,10,12
,.,.
,.
13
CURVE
NO.
,
2
3
4
5
•
ALL
ALL
ALL
ALL
VOLTAGE
GAIN
Rll!J.1
,
0
'Ok
~I
10
100
'000
1000
,
10
100
1000
1.0k
1.0k
1.0k
1.0k
RZlnl
R31n)
0
10k
'Ok
'OOk
S.Ok
1.Ok
1.0k
1.0k
1.0k
R4lnl
Rstnl
390
~
1.0k
S.Ok
10k
30k
0
390
1.0k
1.0k
1.0k
'Ok
10k
lOOk
1.0k
1.0k
1.0M
l.0k
'Ok
30k
10k
1.0k
1.0M
1.0M
'Ok
'Ok
'Ok
'Ok
'Ok
'Ok
'Ok
'Ok
10k
C,lpFI
0
2200
2'200
2'200
'000
'0
2200
2200
2200
2200
8-242
OUTPUT
LAG
MC1539, MC1439 (continued)
TYPICAL CHARACTERISTICS (continued!
(VCC
= +15 Vdc, VEE = -15 Vdc, T A = +250 C, unless otherwise noted.!
FIGURE 7 - LARGE·SIGNAL SWING versus FREQUENCY
110
24
22
1
?
w
'"':;
'">><[
~
>:::>
'">0
FIGURE 8 - OPEN·LOOP VOLTAGE GAIN versus FREQUENCY
;;; 100
20
18
t\
1'0...
"
16
14
12
:; 90
~
r--..
w
'" 70
\.
1\
5
~
'">"-
\
10
6
8.0
1\
2 \ 3
4
'"
9
~
6.0 r-- RL = 1.0 k OHM
4.0
<5%THO II
2.0
'"
]
II I
o
01-- ARROWS INDICATE
UNCOMPENSATED
Of-- POLE LOCATIONS
40
100 k
100
±18 VOLT SUPPLIES
'">0
20
25
-
20
<[
~
>:::>
I.
15
10
5.0
1..&
~~
o
100
200
~~
300
~
fl
'I
±15 VOLT SUPPLIES
40
~12 ~O( T shpp~l~s
60
!t;:
il:
V
ty~'f~lt
2.0k 3.0k
500 700 1.0 k
RL, LOAD RESISTANCE (OHMS!
Hoo- f-- fin = 1.0 k Hz
2
V
V
V
9.0
±12
±13
V
9.1k[
"'"
80
~I~ I~ 2.0 U~~~
S:i\
~r..
5 ~
""
"
2
100
1.0 k
10 k
~
1.0M
100 k
IRr30kOH~
I
Cl = 1000 pF
IJ 1111111
I
R4 = 10 k OHMS, Cl = 2200 pF
~ 40
'"
"'"
=:
-
~
1.0k_
I
~
..l
!i
R4
0
±18
1.0 k
10 k
r\..
I
I I
r\..
I
'- 4
~ 1.~ kl JJ~! ~\ =2~0 JF
I
I
11111111
lOOk
t, FREQUENCY (Hz).
Pin numbers adjacent to terminals apply to a-pin packages, numbers in parenthesis apply to 14'pin packages.
\
I
oIHL~! b\l= 220~ PJ
• ACL = Closed-Loop Gain
8·243
5
I
I I
I
I
R4=OJJ
Cl = 10pF
I 11111111
I 11111111
11111111
I 11111111
10
6
J
R4 =139J
~
±17
0
,;
"-
2200pF
UCVO
~
1.0k
..1
I
I
I
I
I
±14
±15
±16
SUPPLY VOLTAGE (VOLTS)
I
...J
......
50
4~(6) 6(10)
1(3)
,1
140
200
10
II
11111
6
4
60
VCC 100 k
(412
10M
FIGURE 12 - CLOSED·LOOP GAIN versus FREQUENCY
~'VEE
10k
1
t, FREQUENCY (Hz)
/'
V
~
180
5.0k7.0kl0k
(5)3~8(12)
n+VO
V
rr
21
1.0M
160
V
RL = 1.0 k OHM
-
~
w
. /V
0
4
100 k
10 k
t, FREQUENCY (Hz)
1.0 k
~ 120
14
V
5\
~
~ 100
FIGURE II-OUTPUT VOLTAGE SWING
(to clipping! versus SUPPLY
1
'"
FIGURE 10 - OPEN·LOOP PHASE·SHIFT versus FREQUENCY
30
'"':;
'">>-
'"
1\6
20
10
1.0 M
FIGURE 9 - OUTPUT VOLTAGE
SWING versus LOAD RESISTANCE
w
t'-..
30
t. FREIlUENCY (Hz)
"?"-
RL = 2.0 k OHMS
I'
o
10 k
1.0 k
r..
80
mnr Tn
[lim TTl
r-...
t--...
f\
\
I
3
2
1.0M
10M
MC1539, MC1439(continued)
TYPICAL CHARACTERISTICS
(continued)
(VCC = +15 Vdc, VEE = -15 Vdc, TA ~ +250 C, unless otherwise noted.)
FIGURE 13 -ACL· = 1 RESPONSE versus TEMPERATURE
FIGURE 14 - ACL = 10 RESPONSE versus TEMPERATURE
+40r--.-rTTnTrr--'-'''Trmr--~rrrnTIr--'-rTTrrrn
11--rrrrr;:=~~;-=-ITrTTlTJrITImrn
+20
+351--++++H+H--~~~+t~--t-rr~~--+-r++t~
+15
~ +301--++++++!-H---4-+~+t~--t-rr~~--+-r++t~
~ +10
z
~ +251--t-+++HtH---+-+~ft~--t-rttH~--t-t+ftijH
z
;;: +5.0
'"
-~ +201--tllttt**-~~~~~::~rr~~~~t=~~~
I
~_-550C
'"'"o
g
'"
~
o
;
-5.0 1--++++++!-H---+-++t+t!1t-~H+I-ttttt--\~H+Hfffl
-10
«
-15
-20 L-..,.L.-.J...J...uJWL_'--'...J...J..I.J..J.lL----'--'-LU..LUJ_-'-.L..J...I.J..J.J.IJ
1.0k
10k
lOOk
1.0M
10M
f, FAEIlUE~CY (kHz)
10 k
FIGURE 15 - ACL = 100 RESPONSE versus TEMPERATURE
65
4-
60
f---
iii 55
:!O
~
r--45 r---
9
40
Z
;;:
o
'~"
,,·'t2~st>
-
6
1.0 k 3
~
~
z
8(12)'0
2200 pF
1
;;:
~ 30
« 25
iYII
I III
+l
20
:3
~
+250C
1\\
\'
l
100
f, FAEIlUENCY (kHz)
1.0 M
0
F?t>
!\
8(12)
'0
1000 pF
II
+250C
II
....
+1250C
100
10
-~5JC
I I
1.0M
10M
f, FAEIlUENCY (kHz)
I 1111' ~v = 100 I III
0",
6
r-==
55
5
1.0
10 M
-
1.0 kf ;
~
(3) 30k
60
d 60
d
'" 50
FIGURE 17 - SPECTRAL NOISE DENSITY
250
70
(4)
(5)
o
-55°C
~
10
.. ~~.
em
5
~ 65
(3) 10k
35
15
1.0
'~
1111
80
(10)
(~f+
50
FIGURE 16 -' ACL=1000 RESPONSE versus TEMPERATURE
85
(4)
10M
1.0M
100 k
f, FAEIlUENCY (kHz)
"',.""
>"
,g
FIGURE 18 -OUTPUT NOISE versus SOURCE RESISTANCE
100
(4)
A _ Al A2
3- Al + A2
R2
f:::=~
(5) 6
VN
Av=
Rl
f--+
8(12)
~~.
=
10
~
w
R3
3 1
~(3)
Cl
R4
RS= R3
All =1000
'"0
Z
Av - 100
I-
ir
I-
0
'"
0
10
100
=> 1.0
0
Av -l0
.;
>
,.-:.
r--~
F-rl
0.1
1.0 k
f, FAEIlUENCY (Hz)
10k
100 k
0.1
l
I III
10
1.0
RS, SOURCE RESISTANCE (k OHMS)
• ACL ,. Closed-Loop Gain
Pin numbers adjacent to terminals apply to 8-pin packages, numbers in parenthesis apply to 14-pin packages.
8-244
100
MC1539, MC1439(eontinued)
TYPICAL CHARACTERISTICS (continued)
= +15 Vdc. VEE = -15 Vdc. T A = +250 C. unless otherwise
(Vee
200
I
Vo =0
±15 V SUPPLlES-
120
l:
.5
J
L = 1.0 k!1
THO = 5% _ _ _
110
l:
.5
100
z
100
'"
;::
10
~
iii
90
~
50
Ci
'"~
80
~
10
z
'"
;::
~
---
iii
Ci
'"~
~
~
Vo - 0
RL =~
r--
I-""
.,-
30
sr
20
60
50
-55
-25
o
+25
+50
+15
TA. AMBIENT TEMPERATURE (OC)
+100
10
10
+125
r)
E OPERATING TEA (-55 to +1250
12
14
FIGURE 22 - COMMON-MODE INPUT VOLTAGE
versus SUPPLY VOLTAGE
Vo
Vin
'" -2.0
>
~
-4.0
:::>
-6.0
'"0
>
13
'"
12
'"
,.....- ..---
11
V--'
'" 10 V
8'"
a; 9.0
-8.0
-10
-12
10
u
;;
12
FIGURE 23 - COMMON-MODE REJECTION RATIO
versus FREQUENCY
~ 130
'";::~ 120
III
'"~
z
UNITY GAIN
r---.r--
t;'"
C~~PENSATIO'~'
~ 100
~
--
~
POSITIVE INPUT LlMIT-
16
14
15
VS.SUPPLY VOLTAGE (VOLTS)
13
18
11
AvCM = 20 log
'"
'"
~
z 120
(~?-)
em
I
eM
CMRR = (AvCM - AVail
~ 110~----+-----+-----r---~-----i-----t----~
:\.
80
'"'"~
z
'"~ 100 ~----+-----+-----r---~'---- ± 15 V SUPPLIES
1\
z
'"
8'"
'"
............
Ul
'"w
'"~
---
~------
FIGURE 24 - COMMON-MODE REJECTION RATIO
versus TEMPERATURE
~ 140
II
~
./
. / f-"""
8.0
f. FREUUENCY 1Hz)
11111111
COrpENSATIO~
r---NE~ATIVE INP~T LIMIT
15
14
'"~z
~
+25 0 C
~
w
r---- UNity GAIN
11
16
~
~
1.0 k
~
18
16
VCC AND VEE. POWER SUPPL Y VOLTAGE (VOLTS)
FIGURE 21 - POWER BANDWIDTH
(LARGE·SIGNAL SWING versus FREQUENCY)
~ +8.0
'"z +6.0
~ +4.0
--- ---
FIGURE 20 - POWER DISSIPATION versus
POWER SUPPLY VOLTAGE
FIGURE 19-POWER DISSIPATION versus TEMPERATURE
130
noted.)
60
8
~ 40
'"
~
~
~
10
100
1.0k
10k
lOOk
1.0M
90L-____
-55
~
-15
____L-____L___
+15
~~
+50
__
~
f. FREUUENCY (Hz)
TA. AMBIENT TEMPERATURE laC)
Pin numbers adjacent to terminals applv to a-pin packages, number in parenthesis apply to 14-pin packages.
8-245
____-L____
+15
+100
~
+125
MC1539, MC1439 (continued)
FIGURE 25 - VOLTAGE-FOLLOWER PULSE RESPONSE
+5.0
!So
>
-5.0
5.0
10
15
20
TIME (~sl
TYPICAL APPLICATIONS
Pin numbers adjacent to terminals apply to a-pin packages, numbers in parenthesis apply to 14-pin packages.
FIGURE 26 - VOLTAGE FOLLOWER
FIGURE 27 - 01 FFERENTIAL AMPLI FIER
390
R2
2
'2
S 6 (101
RF
'2
(4)
H2
1121
Rl
RF
Rl
'1
2200 pF
FIGURE 28 - SUMMING AMPLIFIER
'3
R3
>o---- 40 M OHMS
'oel
l '!f]
fl +
[1 + Ql
='oOl Ao~i =4 k 1iJ5J~0.04 OHM
'0 =
-I~ '1 + ~ '2j + [1+
*I
RS = Parallel Combination of R,. R2. R3. RF.
'3
eo=-[!!f
Rl
Rl. R2
For R3 = Rl + R2
"'Properly Compensated
81+
~
RZ
82+!!f
R3
FIGURE 29 - +15 VOLT REGULATOR
+30 V
2N4921 or Equiv
+wv~-----~.------.------t------,(
51
O.l.fJ;
~--~----eVO+
O.l.F
r
51
180
J
O.l • f
MC1460G
For detailed information see Motorola
Application Note AN-48D.
10
6.Sk
'------------------~. +Sense
' -_ _ _ _ _...._ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _, -_ _. . -Sense
Retllrn ••~--------------------------------~••
8-246
e31
"'Properly Compensated
Vo Return
MC1539, MC1439 (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 31 - REGULATOR OUTPUT VOL TAGE
(under pulsed load condition)
FIGURE 30 - LOAD REGULATION FOR
CIRCUIT OF FIGURE 29
-:=p
~
o
>
3
~
o -0.5
>
~
<
z
~
z
>
-1.0
It
-1.5
0
0
100
LOAD
150
100
150
eu RRENT (MIlliAMPERES)
300
II
Horizontal Scale: 200 ",S/Div
Vertical Scale:
1 mVlDlv
8-247
~~______________S_E_N_S_E_A_M_P_L_I_F_IE_R_S~
MC 1540
MC1440
MONOLITHIC SENSE AMPLIFIER
· .. consisting of a wideband differential amplifier, a dc restoration
circuit which also incorporates facilities to externally adjust the
threshold, and an MDTL output gate which is strobed from saturated
logic. It is designed to detect bipolar differential signals derived by
a core memory with cycle times as low as 0.5/.1s.
COREMEMORV
SENSE AMPLIFIER
INTEGRATED CIRCUIT
SILICON
EPITAXIAL PASSIVATED
• Differential Threshold Characteristics:
Adjustable Threshold - 10-25 mV
Nominal Threshold - 17 mV @ V6 = -6 V
Input Offset Voltage - 1.0 mV typical
Threshold Drift - -10 /.IV10C typical
• Fast Response Time - 20 ns typical
• Short Recovery Time:
50 ns max @ ein = 1.8 V Common Mode
50 ns max @ ein = 400 mV Differential Mode
F SUFFIX
GSUFFIX
CERAMIC PACKAGE
CASE 606
METAL PACKAGE
CASE 6028
TO-91
MCl540IMCl440BLOCK DIAGRAM
LSUFFIX
CERAMIC PACKAGE
CASE 632
TO-ll6
Number at end of terminal. represents pin
metal can. Number in parenthesis repre
number for devices in flat package and
senU pin number for dual in-line package.
w
CIRCUIT SCHEMATIC
(1) 2 V+
(14) 1
10 (13)
Cext
3k
1.7 k
6k
1k
1k
6.B k
975
2k
1.5k
v(7) 5
THRESHOLD
ADJUST
6 IB)
GND
560
STROBE
(12) 9
Number at end of terminal represents pin numbar for davie. In flat pack.,. and metal can.
Number in parenthesis represents pin numbar for ceramic dual In-line package.
~ee
Packaging Information Section for outline dimensions.
8-248
MC1540, MC1440 (continued)
MAXIMUM RATINGS tTA = +250 C unless otherwise noted)
Rating
Power SupplV Voltage
Symbol
Value
Unit
v+
V-
+10
-10
Vdc
Vdc
Vin
±5.0
Vdc
CMVin
±5.0
Vdc
Load Current
IL
25
mA
Power Dissipation (Package Limitation)
Metal Can
Derate above T A :: +250 C
Po
680
mW
mWf'C
mW
mWf'C
mW
mWf'C
Differential Input Signal
Common Mode Input Voltage
4.6
500
3.3
625
5.0
Flat Package
Derate above T A"" +2SoC
Ceramic Dualln-line"Package
Derate above T A '" +2SoC
Operating Temperature Range
TA
MCI440F,G,L
MC1540F,G,L
Storage Temperature Range
Tstg
Oto +75
-55 '0 +125
°c
-65'0 +150
°c
ELECTRICAL CHARACTERISTICS
tV+ = +6 Vdc ± 1%, V- = -6 Vdc ± 1%, Cext = 0.01 /J.F, T A = +250 C unless otherwise noted)
Pin number references are for devices in flat package and metal can.
See block diagram for dual in-line package pin numbers.
Input Threshold Voltage
=-6_0 Vdc, T A = 250CI
= -6.0 V, TA =Tlow 0)
(V6 =-6.0 V, TA =
0)
(V6
(V6
3
mVdc
400
450
4
mAde
Reverse Current
"Adc
(Vg = +5.0 Vdc)
5,0
(Vg = +6.0 Vdc, TA = Thigh *1
30
ns
Input to Amplifier Output
(V3 = 25 mV pul.e, Vg = +2.0 Vdcl
Input to Gate Output
(V3 = 25 mV pulse, Vg = +2.0 Vdcl
Strobe to Gate Output
(V3 = V 4 = 0, Vg = +2.0 V pulsel
10
20
'3+8-
20
50
'9+8-
10
30
20
90
5
6
Recovery Time
Differential Mode
n'
(V3 = 400 mV pulsel
8
20
·Tlow'" -5SoC for MC15400r DoC for MC1440, Thigh'" +125 0 C for MC1540 or +750 C for MC1440.
8-249
MC1540, MC1440 (continued)
AV
Amplifier Voltllge Gain - the ratio of output voltage at
pin 1 to the input voltage at pin 3 or 4
Ib
Input Bi•• Current (13 + 141/2
of the t,ailing edge of an input pul.. The devic. i. conlidared ...covered when the th ....hold after. differential overload disturbance i, within 1.0 mV of the threlhold value with·
out the disturbance, or. for common~mode disturbance. when
the level at pin 10 Is within 100 mV of the quiescent value.
the aver. . input current defined ..
I "put Offtet Current - the difference between input cu rrent
YIIlu...
-141
Propagation Delay - The time that Is required for the output
pulse at pin y to IIChieve 50% of its final value or the 1.5 V
level ref....nced to 5'"' of the input pul. at pin x. (The +
and - denote PCMitive and negative-going pul. transition.)
113
Strobe Reverse Current - leakage current when the strobe
input i. high
Strobe Load Current -
Output Voltage High - high-level output voltage when the
output pt. is turned off
amount of current drain from the
circuit when the strobe pin il grounded
Output Voltage Low - low-level output volt.... when the
output gata is turned on
Power Dissipation - amount of power diqip.ud in the
unl... defined by
x v+1 +
x v-I
112
115
Input Thl'8lhold - Input pul. amplitude that cau. . the
output to begin uturdion
Input Offset Voluge - the difference In Vth at each input
Recovery Time - The tim. that is required for the device to
recover from the specified diff.renti.1 and common-mode
overloed inputs prior to strobe •• reference to the 10% point
FIGURE 1 -INPUTTHRESHOLDATOUTPUTVOLTAGE
SWING FROM VOL TOVOH
+6Vde
INPUT
PULSE
FIGURE 2 - INPUT BIAS CURRENT
TEST CIRCUIT
+6Vde
INPUT
PULSE
GENERATOR
(50111
OUTPUT 5.9V~
___
PULSE 0.35V ______' - '
-6Vde
FIGURE 4- AMPLIFIER VOLTAGE GAIN
FIGURE 3 - OUTPUT VOLTAGE LEVELS
+6Vde
+6Vde
15mV
INPUT
PULSE
OV
-6Vde
-6Vde
FIGURE 5 - PROPAGATION DELAY ISTROBE HIGH)
IOns MAX
25mV
INPUT 90%
FIGURE 6 - PROPAGATION DELAY ISTROBE INPUT)
AMPLIFIER
OUTPUT
TO SCOPE
STROBlOV~'5V
INPUT
OV
GATE
OUTPUT
TO SCOPE
AMPLIFIER
OUTPUT
~
GATE
OUTPUT
GATE
OUTPUT
1-
1
'+8-
GATE
OUTPUT
TO SCOPE
r
~1.5V
OV--------------
-6Vde
-6Vde +2 Vde
8-250
MC1540. MC1440 (continued)
FIGURE B - COMMON MODE
RECOVERY TIME TEST CIRCUIT
FIGURE 7 - DIFFERENTIAL MODE
RECOVERY TIME TEST CIRCUIT
AMPLIFIER
OUTPUT
TO SCOPE
GATE OUTPUT
TO SCOPE
COMMON
MOOE
INPUT
-6Vdc
COMMON MODE
INPUT
GENERATOR I
o
200 ns
GENERATOR 3
O.:----+....;,;.~
VIh
1"'1",""-....,
GENERATOR 2
NOTE: Th. output dlown i. reprHlnla1ive of ttl. obUlin.cl. Howwer,
the two put. Implitudll mev not be
or ~ prwant.
1qII"
Pin numbers Ihown for devices in flat package and metal can. S .. block diagram for dual In·line package pin numbers.
FIGURE 10 - TYPICAL THRESHOLD versus TEMPERATURE
FIGURE 9 - TYPICAL TRANSFER CHARACTERISTICS
8. 0
~ 6.0
~
~~
,
I
I
I
4.0
I
I
U
14r----+----~--~----~----+---_4--~~
L
o
-20
22'r---'--~---r----.----~---.----~
10
10
~S~0----~2S~-~L---+~2S~---+~SO~-+~7S----+-1~00---+-J12S
20
TAo AMBIENT TEMPERATURE (OC)
e,,, INPUT VOLTAGE (mY)
FIGURE 12 - TYPICAL THRESHOLD vel'SUS THRESHOLD
VOLTAGE ADJUST FOR V- =6.0V
FIGURE 11 - TYPICAL THRESHOLD versus POWER SUPPLIES
TA = +25"C (Threshold Adjust Attached to V-I
V+~+4.S
+5.0
f----I------jl------f_=~~::.., +S.4
f-_ _ _I -_ _....-IC-___L::.-..IL::._ _
10L-____J -____
-4.S
-S.O
~
q~
+6.0
H.S
______L-____J -_____J
-s.S
-S.O
-S.S
~2S'.-:0'----------."S.5;-------;'S.70---------:S:':.S-------::-7.0
-7.0
THRESHOLD ADJUST VOLTAGE AT PIN S (VOLTS)
V-(VOLTS)
For a more dateUed discussion regarding application of sensa amplifiers. see Motorola Application Nota AN-245.
"The MC1540 - An Integr.~ Cor,. Memory Sense Amplifier,"
8-251
~~______________S_E_N_S_E_A_M_P_L_I_FI_E_R_S~I
MC1541
MC1441
Dual-channel gated sense amplifier with separate wideband differential input amplifiers. Either input can be gated on from saturated logic
levels. The sense amplifier features adjustable threshold, saturated
logic output levels, and a strobe input that accommodates saturated
logic levels. DeSigned to detect bipolar signals from either of two
sense lines. Operates with core memory cycle times less than 0.5 p,s.
F SUFFIX
CERAMIC PACKAGE
CASE 607
Typical Amplifier Features:
• Nominal Threshold - 17 mV
• Input Offset Voltage - 1.0 mV typical
• Propagation Delay
Input to Gate-Output - 20 ns
Input to Amplifier-Output - 10 ns
Gate Response Time - 15 ns
Strobe Response Time - 15 ns
• Common Mode Input Range - 1.5 Volts
LSUFFIX
• Differential Mode Input Range
With Gate On - 600 mV
With Gate Off - 1.5 Volts
CERAMIC PACKAGE
CASE 632
TO-116
• Power Dissipation - 140 mW typical
See Packaging Information Section for outline dimensions.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
V+
V-
+10
-10
Vdc
Vdc
Differential Input Signal
V.
t5
Vdc
:!:5
Vdc
25
mA
500
mW
mW;oC
mW
mW/oC
m
CMV.
Common Mode Input Voltage
m
Load Current
IL
Power Dissipation (Package Limitation)
Flat Package
Derate above 25° C
Ceramic Dual In-Line Package
Derate above 25° C
PD
Operating Temperature Range
MC1541F, MC1541L
MC1441F, MC1441L,
TA
Storage Temperature Range
3.3
600
4.8
T stg
8-252
·C
-55 to +125
o to +75
-65 to +150
°c
MC1541, MC1441 (continued)
CIRCUIT SCHEMATIC
INPUTB
~6}
4
v'
3 (5)
(2)
14
\1)
13
12[14}
2k
6k
INPUT Ao---_---i+-'
GIB}
8.9k
3.8k
2.Sk
4.6k
3.8k
L---~'~11~0I~----~----~------~--------~~~~~--~~~11~1)t:1O------~5~;
B CHANNEL GATE INPUT
STROBE
Numlleratterminal end denotes pin number for flat (F) pa~kage.
Number in parenthesis denotes pin number for dual in-line ceramic (l) package',
LOGIC DIAGRAM
(I) 13
,-------------------------1(3}
-:'.-
12 (14)
---------1
I
I
INPlITA
I
I
1(4)
A CHANNEL !I (11)
I~~~~
II
I "91
I OUTPUT
I
0----;-1--------'
1
3(5)
INPUTS
1
I
4(6)
1L
____________________________ _
THRESHOLD
ADJUST
11 {lJ)
I
_ _ _ _ -.-1
10 (12)
STROBE
Number al terminal end denotes pin number lor Ilat fl8ckage. Number in parenthesis denetes pin number lor dU1L1 in-line package.
Channel
Gate'nput
Input
Signal
Vertical
Scale
'~tJ
20mV/div
Amplinel'
Output
2V1div
Strobe
Inpul
2V1div
l
I
Il
~
II
1\
J
""R
Amplifier
Output
FIGURE 1 - TYPICAL OPERATION
2V!div
.... I--
V
HorizonialScllle
5Dns/div
8-253
MC1541, MC1441
(continued)
ELECTRICAL CHARACTERISTICS
(v+ = +5.0 Vdc ± 1%, V- '" 5.0 Vdc± 1%, Vth(pin 11) = -5.0 Vdc± 1%, Cext '" 0,01 .uF, TA = 25°C unless otherwise noted)
(Tlow"" -55OC for MC1541 arOOC for MC1441, Thigh = +12SoC for MC1541 or +7SoCfor MC1441. Pin numbersrefer~nced in table
denote flat package' to ascertain corresponding pin number for dual in-line package refer to the equivalent circuit.)
Characteristic
Input Threshold Voltage
(T A = +25°C)
(T low ~ T A ~ Thigh)
Fig. No.
Symbol
8
Vth
MC1441
MC1541
Input Offset Voltage
8
Input Bias Current
(VI = V 2 = V3 = V4 = 0)
9
(V 1
= V2 = V3
V.
10
Ib
= V4 = 0, TA=Tlow)
Input Offset Current
9
Output Voltage High
(V 1 = V 2 = V3 = V4 = 0, 10H = 200 /lA)
I.
10
VOH
Output Voltage Low
(V 1 = V2 =V 3 = V4 = 0, V 12 = +5.0 Vdc, 17 = 10 mAdc)
10
VOL
(V 12 = +5. 0 Vdc, 17 = 10 mAdc, T A = + Thigh)
Strobe Load Current
(V 10 =0)
IS
Strobe Reverse Current
(V 10 = +5.0 Vdc)
ISR
(V 10 = +5.0 Vdc, T A = Thigh)
Input Gate Voltage Low
(V 1 = V3 = 25 mVdc, V 2 = V4 = 0)
11
Input Gate Voltage High
(V 1 = V3 = 25 mVdc, V 2 = V4 = 0)
11
Input Gate Load Current
(V 8 or Vg = 0)
VGH
IG
Input Gate Reverse Current (V 8 or V9 = 5.0 Vdc)
(T A = 25°C)
(T A
VGL
IGR
= Thigh)
Common Mode Range
Input Gate High
Input Gate Low
13
Differential Mode Range
Input Gate High
14
VCM
Min
Typ
Max
14
13
12
17
17
20
21
22
-
1.0
6.0
-
5.0
25
-
50
-
1.0
2.0
3.0
-
-
-
-
350
-
-
400
-
-
1.5
-
-
2.0
-
0.7
-
-
1.6
-
-
-
2.5
-
-
2.0
-
.1. 5
.1. 5
-
Unit
mV
-
mV
/lA
/lA
Vdc
mVdc
mAdc
/lAdc
25
Vdc
Vdc
mAdc
/L Adc
25
Vdc
-
VDH
VDL
-
.600
-
mV
Input Gate Low
.1. 5
-
Vdc
Power Dissipation
PD
-
140
180
mW
Fig. No.
Symbol
Min
Typ
Max
Unit
8
tlA
SWITCHING CHARACTERISTICS
Characteristic
Propagation Delay
Input to Amplifier Output
(V 1 = 25 mV pulse, V 10 = +2.0 Vdc)
ns
Input to Output
(V 1 = 25 mV pulse, V 10 = +2.0 Vdc)
8
Strobe to Output
(V 1 = V 2 = V3 = V4 = 0, V 10 = +2.0 V pulse)
12
Gate Input to Amplifie r Input
(V 1 = 25 mV pulse, V9 = 2.0 V pulse)
11
Gate Input to Amplifier Output
(V 1 = 25 mVdc, V9 = 2.0 V pulse)
11
Recovery Time
Differential Mode
Input Gate High V or V = 400 mV pulse
Input Gate Low
1
3
tIO
tso
tGI
tGA
-
10
15
-
20
30
-
15
20
-
10
15
-
30
35
-
30
0
-
-
15
15
30
30
ns
I
I
14
Common Mode
Input Gate High V or V = 1. 5 V pulse
Input Gate Low
1
3
13
8-254
tDR
tCMR
MC1541, MC1441
(continued)
FIGURE 3 - TYPICAL THRESHOLD versus THRESHOLD
VOLTAGE ADJUST
FIGURE 2 - TYPICAL INPUT THRESHOLD versus
TEMPERATURE
19
_
15
I
I
v.I= +5.0 Vde
v+ = +5.0 Vdc
V-
=
,.---- v- = -5.0 Vde
V'h adj = -5.0 Vde
10
18
17
--f--
MC1441
LIMITS
16
15
-50
-15
/
--
15
50
75
TA, AMBIENT TEMPERATURE lOCI
./'
15
/v
10
5.0
-3.5
115
100
/
FIGURE 4 - TYPICAL INPUT THRESHOLD versus V11
10
r-. .....
19
r-
.§
17
o
~
~
16
l-
S
...
:!!
15
--
V!h adj =
I---.
TA=+15
"""- r-...
- --- - -
18
;;
:3
/
TA = +15 0 C
r--
r-
--- -
t-- r---
14
--
r~5.0-
1/
.-
/
V
/
-4.0
-6.0
-4.5
-5.0
-5.5
THRESHOLD ADJUST VOLTAGE IVOLTSI
-6.5
FIGURE 5 - TYPICAL INPUT THRESHOLD
versus INPUT PULSE WIDTH
0
I
V
-
TA = +150 C
"",,-v+ - +4.5 V
5
...................
r-
-----I--.
r--
---
v+ = +5.0 V
I
\\...
v+ = +5.5 V
15
13
11
-4.5
10
-5.0
V-IVOLTSI
-5.5
8-255
o
50
100
150
t. INPUT PULSE WIDTH, Insl
100
150
300
MC1541, MC1441 (continued)
FIGURE 6 - INPUT-OUTPUT TRANSFER
CHARACTERISTICS
5.0 r - - - , - -___-,;....;,;..;..;.;;....;;..;.,;;,;,....;,,;;,..;,..;...;~-,_--_,
FIGURE 7 - CHANNEL GATE INPUT-AMPLIFIER
OUTPUT TRANSFER CHARACTERISTICS
5.0
4.0
£
4.0
~
'"2:w
to
'"
~
w
3.0
to
'~"
'"
~
'">
'"
>
f-
:==>
=>
!;
I
3.0
=>
f-
0
II
~
~
0
2.0
'"u::w
~
)
~
''""
2.0
I
./
1.0
OL-__
~
-30
_____ L_ _ _ _
-20
~
_ _ _ _L -_ _
-10
~
10
____
1.0
~
20
30
o
1.5
1.0
0.5
'in, INPUT VOLTAGE (mV)
2.0
2.5
3.0
CHANNEL GATE INPUT VOLTAGE (VOLTS)
FIGURE 8 - INPUT THRESHOLD FOR OUTPUT VOL TAGE SWING FROM VOH TO VOL
PROPAGATION DELAY FROM INPUT TO OUTPUT
(a) Threshold Test Waveforms
(b) Test Circuit
AMPLIFIER
OUTPUT
TO SCOPE
20 nsmax
INPUT Vth
Vin
---t:;I<:===>r.- 90%
TO SCOPE
PULSE
OV--;;Tr--
~
4.9V----\
~~~~~T
~
0.35 V - - - - - - '
INPUT
PULSE
GENERATOR
(e) Waveforms for Propagation Delay Test
2.5V--+.-...
INPUT
AMPLIFIER
OUTPUT
GATE
OUTPUT TO
SCOPE
n
11
tr ::::: 20 ns
1k
1+--Ir--50%
IO
OUTPUT
5
50
~
+5 Vdc
1.5 V
Note: Vth ~
OV------
Number at terminal end denotes the pin number
for flat package only; to ascertain the corresponding pin number for the dual in line packages refer
to the circuit schematic on the second page.
8-256
+5 Vdc
Vin
Wo
-5 Vdc
-=
MC1541, MC1441 (continued)
FIGURE 9 - INPUT BIAS CURRENT TEST CIRCUIT
FIGURE 10 - OUTPUT VOLTAGE LEVELS
+5 Vdc
+----.-----,
510
Vout, low
lZ 10
510
11
-5 Vdc
11 + 12 =Ib for "A" channel when switch is in "a" position
-Z-
=
Ib for "B" channel when switch is in "5" position
IIHzl'liO
FIGURE 11 - MINIMUM TIME FROM CHANNEL GATE INPUT TO AMPLIFIER INPUT
PROPAGATION DELAY FROM CHANNEL GATE INPUT TO AMPLIFIER OUTPUT
(A) Minimum Time from Gate Input to Amplifier Input - tGi
(See Definitions)
(B) Test Circuit
+5 Vdc
AMPLIFIER
OUTPUT
TO SCOPE
+2.5 Vdc
TO SCOPE
(AI
LI
10
I
I
1
I
Amplifier
1
1L _ _ _ _ _ _
" -
~
L-
11
"\
\
INPUT
PULSE
GENERATOR
\
\
GATE
PULSE
GENERATOR
(el Propagation Delay from Channel Gate
Input to Amplifier Output
2.0 V
Gate
tr
~
20 ns
TO SCOPE
51
10>0.1%
10 ± 10%
-5 Vdc
10± 10%
(Pin numbers shown on this page denote the pin numbers for the
flat package only; to ascertain the correspondi ng pin numbers for
the dual in-line pacKage. refer to the circuit schematic on the
second page.)
8·257
50
50
I
MC1541, MC1441 (continued)
FIGURE 12 - PROPAGATION DELAY FROM STROBE INPUT TO OUTPUT
(a~
Propagation Delay from Strobe Input to Output
+5 Vdc
(bl Test Circuit
510
2.0 V
Strobe
Input
Strobe
Pulse Generator
tr:::: 20 os
51
Gate 1
Output
to Scope
tso
11
~
-5Vdc
FIGURE 13 - COMMON-MODE RECOVERY AND COMMON-MODE RANGE
0.01
± VCM
trandtf
Input
~
~F
250s
10%
Output for input
less than common
mode input range
51
200 os
Output for input
greater than common
mode input range
t$v
f"-
-=
"::"
1k
1k
+5 Vdc
FIGURE 14 - DIFFERENTIAL RECOVERY AND DIFFERENTIAL RANGE
0.01
~F
± 400 mV
Strobe
Generator
5.1 k
3
± Vth
Vth
Generator 1
Input
Output to
Scope
51
Generator
O--------------~~
+2.0 V
Strob9
Generator 3
Overload
Generator 2
lk
± 20'11
.1k
± 2011
+5 Vdc
IPin numbers shown on this page denote the pin numbers for the
flat package only; to ascertain the corresponding pin numbers for
the dual in-line package, refer to the circuit schematic on the
second page.)
8-258
MC1541, MC1441 (continued)
DEFINITIONS
Pin numbers referenced in the definitions below denote the flat package only; to ascertain the corresponding pin
number for the dual in-line package refer to the circuit schematic.
IB
Input Bias Current - The average input current·
defined as (11 + 12 + 13 + 14)/4-
IG
Channel Gate Load Current - The amount of
current drain from the circuit when the channel
gate input (Pin 8 or 9) is grounded.
IGR
Channel Gate Reverse Current - The leakage
current when the channel gate input (Pin 8 or 9)
is high.
lio
Input Offset Current - The difference between
amplifier input current valuesl11 -1210~13 -141·
IS
Strobe Load Current - The amount of current
drain from the circuit when the strobe pin is
grounded.
ISR
Strobe Reverse Current - The leakage current
when the strobe input is high.
Po
Power Dissipation - The amount of power dissipated in the unit.
tcMR
tOR
tGl
tGA
tlA
Common Mode Recovery Time - The time required for the voltage at pin 12 to be within
100 mV of the dc value (after overshoot or
ringing) as referenced to the 10% point of the
trailing edge of a common mode overload signal.
Differential Recovery Time - The time required
for the device to recover from the specified
differential input prior to strobe enable as referenced to the 10% point of the trailing edge of
an input pulse. The device is considered racovered when the threshold with the overload
signal applied is within 1.0 mV of the threshold
with no overload input.
Minimum Time Between Channel Gate Input
and Signal Input - The minimum time between
50% point of channel gate input (Pin 8 or 9)
and 50% point of signal input (Pins 1. 2. 3. or
4) that still allows a full width signal at amplifier output.
Propagation Delay. Channel Gate Input to Am
plifier Outpl!t - The time required for the amplifier output at pin 13 to reach 50% of its final
value as referenced to 50% of the input gate
pulse at pin 8 or 9 (Amplifier input = 25 mVdc).
pulse at pin 13 to achieve 50% of its final value
referenced to 50% of the input pulse at pins 1
and 2 or 3 and 4.
tlO
Propagation Delay. Input to Output - The time
required for the gate output pulse at pin 7 to
reach the 1.5 Volt level as referenced to 50% of
the input pulse at pins 1 and 2 or 3 or 4.
tso
Strobe Propagation Delay to Output - The time
required for the output pulse at pin 7 to reach
the 1.5 Volt level as referenced to the 1.5 Volt
level of the strobe input at pin 10.
VCM
Maximum Common Mode Input Ringe - The
common mode input voltage which causes the
output voltage level of the amplifier to decrease
by 100 mV. (This is independent of the channel
gate input level.)
VDH
Maximum Differential Input Range. Gate Input
High - The differential input which causes the
input stage to begin saturation.
VOL
Maximum Differential Input Range. Gate Input
Low - The differential inpl!t signal which
causes the output voltage level of the amplifier
to decrease by 100 mV.
VGH
Channel Gate Input Voltage High - Gate pl!lse
amplitude that allows the amplifier output
pulse to just reach 100% of its final value. (Am-plifier input is set at 25 mVdc).
VGL
Channel Gate Input Voltage Low - Gate pulse
amplitude that allows the amplifier output to
just reach a 100 mV level. (Amplifier input is
set at 25 mVdc).
Vio
Input Offset Voltage - The difference in Vth
between inputs at pins 1 and 2 or 3 and 4,
VOH
Outpl!t Voltage High - The high-level output
voltage when the output gate is turned off.
VOL
Output Voltage Low - The low-level output
voltage when the output gate is saturated and
the output sink current is 10 mAo
Input Threshold - Input pulse amplitude at
pins 1. 2, 3 or 4 that causes the output gate to
just reach VOL.
Vth
Propagation Delay. Input to Amplifier Output The time required for the amplifier output
8-259
•
~____________D_U_A__L_S_E_N_SE__A_M_P_L_IF_I_E_R~
MC1543L
DUAL MECL
CORE MEMORY
SENSE AMPLIFIER
INTEGRATED CIRCUIT
MONOLITHIC DUAL MECL CORE
MEMORY SENSE AMPLIFIER
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
· .. a dual dc coupled sense amplifier providing output levels com·
patible with emitter·coupled logic levels. The MC1543L offers
adjustable threshold and excellent threshold stability over a wide
range of power·supply voltage variation.
•
Input Threshold - Adjustable from 10 to 40 mV
(Positive or Negative Signals)
•
Both OR and NOR Outputs Available
14
•
Low Power Dissipation
•
Threshold Insensitive VCC or VEE Voltage Variation
•
Each Amplifier is Separately Strobed
CERAMIC PACKAGE
CASE 632
TO·116
CIRCUIT SCHEMATIC
Vee
I
14
13
GMD
(THRESHOLD ADJUST)
',.,
2.11k
2.6k
2.05k
5
.n.
OUTPUTS S
A "V"
Normally
Narlllllly
LOW
VEE
7
"\.J"
Normllly
HIGH
HIGH
See Packaging Information Section fot outline dimensions.
8-260
9
OUTPun
•
.T\.
Normilly
LOW
MC1543L (continued)
MAXIMUM RATINGS
(T A
=
+250 C unless otherwise noted.)
Rating
Power Supply Voltage
Symbol
Value
Unit
VCC
VEE
+10
-10
Vdc
Vdc
VID
±5.0
Vdc
VICM
±5.0
Vdc
IL
25
rnA
1000
6.7
mW
mW/oC
Differential Input Voltage
Common·Mode Input Voltage
Load Current
Power Dissipation (Package Limitation)
Ceramic Dual-in-Line Package
Derate above T A
=
= +25 0 C
Operating Temperature Range
TA
-55 to +125
°c
Storage Temperature Range
T stg
-65 to +150
°c
ELECTRICAL CHARACTERISTICS
TA
Po
(Each Amplifier) (VCC
=
+5.0 Vdc ±5%, VEE = -5.2 Vdc ±5%, Vref = 0.54 V ± 1%,
+2SoC unless otherwise notedJ
Fig.No.
Symbol
Min
Typ
Max
Input Threshold Voltage
8
VTH
17
20
23
mV
Power Supply Currents
(V2 = V3 = V11 = V12
6
6
ICC
lEE
-
9.5
26.5
12
33
mAde
mAdc
Characteristic
= V14 = Ol
Unit
Input Bias Current
7
liB
-
3.5
10
I'Adc
Input Offset Current
7
110
-
0.05
0.5
I'Adc
Output Voltage High
9
VOH
-0.85
-0.8
-0.67
Vdc
Output Voltage Low
9
VOL
-
-1.7
-1.46
Vdc
Strobe Threshold Level
10
VST
-
-1.30
-
Vdc
Strobe Input Current High
10
ISH
-
25
50
I'Adc
Strobe I nput Current Low
10
ISL
-
0.01
0.1
I'Adc
Input Common Mode Range
14
VCMR
3.0
4.0
-
Vdc
Input Threshold Range (by varying V ref)
8
VTHR
-
1040
-
mV
Power Dissipation
6
Po
-
185
230
mW
Reference Supply Input Current (Pin 13)
6
Iref
-
10
40
I'A
28
35
ns
16
20
ns
SWITCHING CHARACTERISTICS
Propagation Delay (I nput to Output)
1
tlO
Propagation Delay (Strobe to Output!
12
tso
-
Strobe Release Time
12
tSR
-
18
30
ns
Recovery Time (Differential·Mode)
(ein = 400 mVdc)
13
tOR
-
10
15
ns
Recovery Time (Common·Mode)
(ein = 3.0 Vdc)
14
tCMR
-
3.0
15
ns
Strobe Width Minimum
12
ts
-
8.0
-
ns
8
VTH
18
15
21.5
18.5
25
22
TEMPERATURE TESTS (-55°C to +125 0 C)
Input Threshold Voltage
TA = -55°C
TA = +125 0 C
mV
Input Bias Current
7
liB
2.2
7.0
20
I'Adc
Input Offset Current
7
110
0.02
0.1
1.0
I'Adc
8-261
MC1543L (continued)
EOUIVALENT CIRCUIT
INPUTS
REFERENCE 13
VOLTAGE
INPUTS
TYPICAL CHARACTERISTICS
(VCC = +5.0 Vdc. VEE = -5.2 Vdc. Vref set fO'r 20 mV Threshold. TA = +25 0 C unless otherwise noted.)
FIGURE 2 - TYPICAL INPUT THRESHOLD
versus REFERENCE VOLTAGE
FIGURE 1 - TYPICAL INPUT THRESHOLD
versus TEMPERATURE
45
24
40
;;;
.s
5
""---I--
0
~
:t:
l-
20
I-
-r--
""---
~
;;;
:i
,;-
18
16
-55 - 50
+25
25
+50
50
----
+75
+100
:t:
1'-- ....
r--
5.0
o
0.2
0.4
0.6
0.8
- .....
1.0
1.2
1.4
Vref. REFERENCE VOLTAGE (VOLTS)
FIGURE 38 - TYPICAL INPUT THRESHOLD versus VEE
4r----------r-----------r------------,
;;;
~
2
2r-----------~----------4_----------_i
5
o
:t:
:t:
[:l
a:
:t:
f'...
:i
f> 10
4
lI-
20
~
;;; 15
+125
_
Threshold: Vref = 0.540 Volt
"-
:t:
l-
FIGURE 3A - TYPICAL INPUT THRESHOLD versus VCC
50
\
30
f:l
TA. AMBIENT TEMPERATURE (DC)
.s
35
a: 25
I-
ReCDlmmen~8d VOI~age fJr 20 m1v
1\
;;;
.s
22
f:l
a:
0
:t:
f-
...;;;
:i
I> 8
~ 8r-------------t--------------+------------~
16
4.5
o~~==~+_------_+==~==~
~
;;;
::0
5.0
5.5
6.0
6.5
VCC. POSITIVE SUPPLY VOLTAGE (VOLTS)
~~~.5------------~5.0~----------~5~.5----------~6.·0
VEE. NEGATIVE SUPPLY VOLTAGE (VOLTS)
8-262
MC1543L (continued)
TYPICAL CHARACTERISTICS (continued I
(VCC = +5.0 Vdc, VEE = -5.2 Vdc, Vr.f set for 20 mV Threshold, TA = +25 0 C unless otherwise noted.1
FIGURE 5 - INPUT·OUTPUT TRANSFER
CHARACTERISTICS (one output!
FIGURE 4- TYPICAL INPUT THRESHOLD
versus INPUT PULSE WIDTH
-0 .5
0
I
"NOR" Output
'>E
;:;;50
~
\
;'"o
> 40
:l
o
~-1. 0
w
\
o
~
~ 30
......
~
:I:
;!; 20
~
10
o
'"
~
o
""
10
...>
~
~
'-
-1 .5
o
-i I- 0.5 my Transitio" Width
-2. 0
20
40
30
50
60
-40
30
t. INPUT PULSE WIDTH (nsl
-20
+10
10
+20
+30
'in' INPUT VOLTAGE (mVI
TEST CIRCUITS
(Vec = +5.0 Vdc, VEE = -5.2 Vdc, Vref = 0.54 V, TA = +25 0 e unless otherwise noted.1
FIGURE 6 - POWER SUPPLY CURRENT DRAIN
FIGURE 7 - INPUT BIAS CURRENT
INPUT OFFSET CURRENT
+5.0 Vdc
+5.0 Vdc
Unless otherwise specified
Vref should be set for
20 mV threshold
IVre! = 0.4 VI
111-0--"
101-0---4
A
-5.2 Vdc
FIGURE 8 - INPUT THRESHOLD LEVEL
FIGURE 9 - OUTPUT VOLTAGE LEVELS
+5.0 Vdc
+5.0 Vdc
to voltmeter
5.1 k
990
±0.1%
11
50
51
11
.....--<>-i.12
3
12
10
±0.1%
-5.2 Vdc
3
to voltmeter
8-263
+40
MC1543l (continued)
TEST CIRCUITS (continued)
FIGURE 11 - PROPAGATION DELAY INPUT TO OUTPUT
.
FIGURE 10 - STROBE THRESHOLD LEVEL
STROBE INPUT CURRENTS
+5.0 Vde
+5.0 We
Vref
V"I
Ito dual-trace
ostilloscope)
12
990
±0.1%
-=
10
±0.1%
-=
-=
(to dual-trace
oscilloscope)
-5.2 Vde.
-=
25mV
INPUT
FIGURE 12 - PROPAGATION DELAY - STROBE TO
OUTPUT and STROBE RELEASE TIME
+5.0 Vde
5.1 k
±1%
51
±1%
FIGURE 13 - DIFFERENTIAL MODE RECOVERY TIME
(See definition section)
Vref
+5.0 Vde
(to dual·trace
oscillosc'ope)
Vre,
(to oscilloscope)
11
3
12
-=
-=
51
-5.2 Vde
(to dua'·trace
oscill ...ope)
-0.7V
DIFFERENTIAL 400 mV
INPUT
-1.7 V
STROBE
---"--t'l
OUTPUT_ _ _ _ _ _ _ _ _ _ __
8-264
-1.7 V
MC1543L (continued)
TEST CIRCUITS Icontinuedl
FIGURE 14 - COMMON MODE RECOVERY TIME
COMMON MODE INPUT RANGE
(See definition section)
+5.0 Vdc
110
Vrof
oscilioscop.1l
51
COMMON
MOOE
INPUT IPLH = 10 ns
3.0 V
STROBE
OUTPUT
-1.7 V
i
\!T...J-----100mV
max
DEFINITIONS
tso Propagation Delay, Strobe Input to Amplifier Output - The
time required for the amplifier output pulse to achieve 50%
of its final value referenced to 50% of the strobe input pulse
at pins 4 or 10.
110 Input Offset Current - The difference between amplifier
input current values IlIA - 12AI or 1118 - 1281.
ISH Strobe High Current - The amount of input current when
the strobe pin is grounded.
tSR Strobe Release Time - The time required for the output to
change to 50% of its swing after the strobe reaches 50% of
its level going low. A de level of 50 mV is the input signal.
ISL Strobe Low Current - The leakage current when the strobe
input is tied to the negative supply.
Po Power Dissipation - The amount of power dissipated in the
unit.
tCMR Common·Mode Recovery Time - The minimum time by
which the strobe input may follow the high level common
mode input signal without causing a signal to appear at the
amplifier output.
tOR Differential-Mode Recovery Time - Differential recovery
time, the minimum time by which the strobe input may
follow the high level differential input signal without causing
a signal to appear at the amplifier output.
tlO Propagation Delay, Amplifier Input to Amplifier Output The time required for the amplifier output to reach 50% of
Its final valua .. referenced to 50% of the level of tha pulse
input.IAmplifier input = 25% over set threshold or approximately 25 mVdc.)
ts Strobe Width
- The amount of .tima the strobe must be high
to obtain a given output. Minimum strobe width is that minimum time required to cause the output to complete a full
swing VOL to VOH or VOH to VOL.
VCMR Maximum Common-Mode Input Range - The common-mode
input voltage which causes the output voltage level of the
amplifier to change by 100 mV Istrobe high).
VOH Output Voltage High - The high-level output voltage at pins
6 and 8 with no input - or at pins 5 and 9 with input
above threshold.
VOL Output Voltage Low - The low-level output voltage at pins
5 and g with no input - or at pins 6 and 8 with Input above
threshold.
VST Strobe Threshold Level - The voltage at which the strobe
turns the amplifier to the ON state.
VTH Input Threshold - Input pulse amplitude at pins 2, 3, II, or
12 that causes the output gate to just reach its new value,
VOL or VOH·
VTH R Input Threshold Range - The maximum spreed of input
threshold level that can be attained by varying the threshold
voltage reference, Vref'
8-265
~f
MC1544L ~________________S_E_N_S_E_A_M_P_L_IF_I_E_R_S~
MC1444L
AC-COUPLED
FOUR-CHANNEL
SENSE AMPLIFIER
IDEAL FOR PLATED-WIRE, THIN-FILM AND OTHER
HIGH-SPEED LOW-LEVEL SENSING APPLICATIONS
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
INTEGRATED CIRCUIT
MC1544L/MC1444L features four input channels with decoded
selection, two stages of gain employing capacitive coupling, and a
MTTL compatible output gate. AC coupling reduces access times by
eliminating the problems usually associated with input line offset
voltages.
Threshold Level - 1.0 mV typ
Propagation Delay Time - 18 ns typ
Decoded Input Channel Selection
MTTL Compatible Inputs and Outputs
Wired OR Output Capability
DC Level Restore Gate on Capacitors Eliminates Repetition Rate
Problems Common to ac·Coupled Circuits
• Output Strobe Capability
•
•
•
•
•
•
CERAMIC PACKAGE
CASE 620
FIGURE 1 - BLOCK OIAGRAM
13
14
15
16
o---t-l ' ......- -..
o---t-l :"~--H
9 OUTPUT
~~tENC~El
INPUTS
, 7
18
6STROBE
~lOGROUND
CAPACITOR
RESTORE
110------1------'
IN"PUT
L - - - - - - - - - - - -....- - - - - o 5YEE
TRUTH TABLE
PIN
7
PIN
HI
LO
HI
LO
HI
HI
LO
LO
8
See Packaging Information Section for outline dimensions.
8-266
CHANNEL
SELECTED
A
B
C
0
MC1544L, MC1444L (continued)
MAXIMUM RATINGS ITA
= +250 C unless otherwise noted)
SYMBOL
VALUE
UNIT
VCC
VEE
+7.0
-8.0
Vdc
Common-Mode I "put Voltage
VCM+
VCM-
+5.0
-6.0
Vdc
Differential-Mode I "put Voltage
VOM+
VOM-
+5.0
-6.0
Vdc
VCR. VCS.VS
+5.5
Vdc
Po
1.0
6.7
W
mW/oC
TA
-55 to +125
o to +75
°c
Tstg
-65 to +150
°c
TJ
+175
°c
RATING
Power Supply Voltage
Capacitor Restore, Channel Select, and
Strobe Input Voltage
Power Dissipation (Package Limitation)
Derate above T A = +2SoC
Operating Temperature Range
MC1544L
MCI444L
Storage Temperature Range
Junction Temperature
FIGURE 2 - CIRCUIT SCHEMATIC
9 OUTPUT
10 GROUND
'1----~6 STROBE
CAPACITOR
RESTORE
11~------------------'
INPUT
8-267
MC1544L, MC1444L (continued)
CMANftEl9
16
;~
MC1544
SOIlTPUT
CHO\NNElco...;~5TROBE:
CMANNELO::I
8
J
11
TEST CURRENT/VOL TAGE VALUES
CAPACITOR RESTORE
CHAN::t:E~~~~~lECl B
...
ELECTRICAL CHARACTERISTICS
ITA'" +2S oC unless otherwise noted)
200
Pin
Und_
Symbol Test Min Typ
CHARACTERISTIC
Input Threshold Voltage (Note 1) MC,544L
Tlow· 10 Thigh-
VTH
MCI444l
13
0.8 2.0
M.. Unit
I,
12
IOL IOH VIL VIH
2.3
mV
-
IJ.A
13,14
7,8
eeL Vee VCCH VEEL Vee VeEH GND
13,14
7.8
12
-
10
12
10
jl.A
12
10
12
10
Low Level
ICSL
0.6
1.0
rnA
12
10
High Level
ICRH
11
10
jl.A
12
10
Low Level
ICRl
11
12
10
12
10
13,14
11
-2.5 -3.5 mA
IS
40
200
-
1.6
2.1
0.7
1.2
High Level VCSH
11
jl.A
-
7
VCSL
7
-
High Lewl VCSH
VCSL
-
1.5
0.7
1.0
2.1
High Level VeRH
11
-
1.5
Low Level
VeAL
11
0.8
1.5
High Level
VSH
-
1.5
Low level
VSL
0.8
1.5
High Level
VOH
2.4
Low Level
VOL
Positive
ICC
Negative
lEE
12
VCM+ 13,14
VCM- 13,14
VOM
13
V
-
0
'0
-
2.0
v
v
2.0
-
V
v
3.6
3,0
13,15
1,0
13,15
1,3
7,13
1,7
13,15
11
-
10
12
10
12
10
12
10
12
10
6
11
12
10
-
11
12
10
6
-
12
10
10
0.4
0.5
15
22
30
rnA
-
-
6,13,14
7,8,11
12
10
15
20
30
rnA
-
-
6,13,14
7,8,11
12
10
-
4.7
-6.0
-
Vdc 13,14
Vdc 13,14
3,7
12
Vdc
-
13
14
This requirement is ellaluated dUflng the ac threshold
te5t (Figures 1,2): A 10 mV signal (einl) is epplied
to ,the '"put, VCRH will result in VOH et the output
while VCRl WIt! allow normal operetion,
This requirement IS eveluated as in Note 4 except
VSH allows normal operation and VSL causes VOH
at the output.
Characteristic
10
12
6
in the same manner and are selected according to the
truth table in Figure "
Pin B is tested in the same manner.
ThiS requirement is conSidered satisfied if the input
bias currents of all unselected channels total lesl
than 1.0 ~A which guarantees that these channels are
sWITCHING CHARACTERISTICS
12
-
Only one input test IS shown, other InpUL$ are tested
"off."
-5.7 -6.0 -63
rnA
Differe:ntial-Mode Range Voltage
3.
526
_
Common-Mode Range Voltage INote 1)
2.
6.0
3.0
Low Level
Power Supply Currents
VIH2
20
(Note 31
Output Voltage
4.75
1.0
Low Level
Strobe Input Voltage
(Note 41
V'L2
1.0
(Note 3)
capacitor Restore Input Voltage
(Note 4)
3.5
1.8
Low/High Level
Channel Select Input Voltage
0
ICSH
lio
Channel Select Input Voltage
10 -0.
TEST CURRENT/VOLTAGES APPLIED TO PINS LISTED BELOW:
High Level
Input Offset Current
Strobe Input Current
0.3
13
Capacitor Restore Input Current
-10
VOLTS
t--'_3+0""5t-'_'0t-'-'.,6t-m_Vt-_+-t_t--+-t_t-__t-_-+_+'_2t-_t-_f-+_+',,,0--i
Input Bias Current (Note 1)
Channel Select Input Current
(Note 2)
I
mA
7,0
7,0
12
12
10
10
7,0
12
10
IT A = +2SoC unless otherwise noted)
Symbol
Figure
Min
Tv.
Mox
10
40
25
Propagation Delay Time
1,5
Strobe ta Input Lead Time
1,5
10
Strobe ta Output Delay Time
1,6
18
Channel Select to Input Lead Time
1,5
15
Channel Select ta Output Delay Time
1,7
25
40
Capacitor Restore ta Input Lead Time
1,5
10
Capacitor Restare Time (50 mV Offset)
1,0
15
Cammon-Mode Recovery Time
19
50
50
Differential-Mode Recovery Time
20
65
30
tesi
56
8-2613
25
Unit
MC1544l, MC1444l
(continued)
FIGURE 3 - AC TEST CIRCUIT
VCC
VEE
50
560
r-- - - - --- - ----- -----,
I
I
:
I
eout
50
50
MTTL III GATES
(used only lor
50
VTH tests. MC3110 or equiv)
LATCH RESET LINE
CHANNEL SELECT A
CAPACITOR RESTORE
CHANNEL SELECT B
STROBE
Diodes are lN916 or equivalent.
Cr includes probe, wiring, and load capacitance.
FIGURE 5 - 'coi. 'c.i. lsi. tpd-. tpd+
FIGURE 4 - THRESHOLO VOLTAGE TEST
' in ',NPUT
SIGNAL
VI:~
ei n" NPUT
5mv---r:.S:.,--__
___ --~-_
-....::..=;r
SIGNAL
o
1-----1-100 ns ___ _
3V-~--
8in2 CHANNEl
SELECT A
' in 3 CHANNEL
SELECTB
....J"---
em2CHANNEL
-'r----\'-----
e"
1It3CHANNEL
o J\. ____
3V
0 -1'L ____ . . , " - - -
'in4 CAPACITOR 3 V \
AESTORE
""SSTRDBE
'out MTTLIII
g~i~T
,---0 ____~
3:~
YaH ~
VOL ___ !!_V___ ~
NOTE: 8in2 and ' in 3 to be normal or inverted (dotted tine)
asn8tBSSilry tosa'ectdhiredcbanneJ. FDI
8in1-8in5 tr=tf<;10ns
I
tCSI----l
I- I
3V--5--;:~tl_I_\
SELECT B
3~
e:
1R4CAPACITOR
RESTORE
I
tesi --..j
'out
=N:..:L.I
3:~-_~il~~~\
___
~
~5_V-=-J-U-
8-269
SelECT A
----r--\
L-
---1
--I
L
L
o~
-.J
o
'in4 CAPACITOR 3V~
RESTORE
lin5STROBE
VOl--lpi_-~l___+_fJtd+
NOTE: Ilinz-einS tr=tf"'0ns
5mV
o
eln2CHANNEL 3V
SElECTB
I
~I_J __ ~
__ ~u:
'SIGNAL
lin3 CHANNel 3 V
f- 'I
VOH~:
,---
ein'INPUT
~
3V--r.;':~~
o~ 1-1- ~
SHEelA
""5 STROBE
I
FIGURE 6 - t lO _. tSO+
'out OUTPUT
0----
-A
3V--~;__
o
I
I
VDH~:
I
I
VOl_~·~~-=-T- --r-
"'--H
1--1-"".
NOTE: 8in,-tinZ t,=lf';; IOns
MC1544L, MC1444L (continued)
DEFINITIONS
Ib
FIGURE 7 -t.,so+. tcso-
Positive power supply current
leRH
The current into the channel select input when the input is at a high-level of 3.5 volts
ICAL
ein'INPUT
5mV------r-\
SIGNAL
SELECT A
L-
The input current to a channel select input when that input is at a high-level of
3.5 volts
'v~-------
ICSL
The current into a channel select input when the input is at a low-level of 0 volts
---1
_
0
ein3CHANNEl 3V--
SELECTB
_ __
I
,
I
,
:
0-1
\
~
I
!
:
ein4CAPACITOR3V\:
L
I
____~
RESTORE
,~~~~~~
0-1:
: '----
""STROBE
V·
I
I EE
Negative power supply current
I io
The difference between the base currents of any input differential pair of transistors
when the base voltages are equal
IOH
Output logic "1" sta*e source current
IOl
Output logic "0" state sink current
ISH
The current into the strobe input when the input is at a high-level of 3.5 volts
ISl
The current into the strobe input when the input is at a lOW-level of 0 volts
tCMR±.
The minimum time between the 50% level of the trailing edge of a + or - 2 volt
common-mode signal (t r = tf $15 ns) and the 50% level of the leading edge of a 5 mV
input pulse when the capacitor restore and strobe inputs are used in a normal manner
as shown in Figure 21
tcr
The minimum time between the 50% level of the leading edge of a 50 mV input
offset signal end the 50% level of the leading edge of the capacitor restore pulse as
shown in Figure 8
teri
The minimum time between the 50% level of the leading edge of the capacitor restore
signal and the 50% level of the leading edge of a 5 mV input Signal as shown in
Figure 5
tesi
The minimum time between the 50% level of the leading edge of the channel select
and the 50% level of the leading edge of a 5 mV input Signal as shown in Figure 5
tcso+
The delay time from the 50% level of the trailing edge of
to the 1.5 volt level of the positive edge of the output when
channel is held at the "'" level as shown in Figure 7
The delay time from the 50% level of the leading edge of
to the 1.5 volt level of the negative edge of the output when
channel is held at the "1" level as shown in Figure 7
I
v:: _____---!--1
-JJ---i--f
H-
""OUTPUT
tcso+
tcso-
NOTE: To tlIStotharcllannel select input.
reverseein2andein3'
ein,-BinS Ir"110;;;10n5
FIGURE 8-t."
8in
!)mV
'COMPOSITE
~nOSCale)15O%INPUT
50mV---I
I
SIGNAL
0 50%
e.
'"2 CHANNEL
SELECT
J
I
I
3V
i
A 0:
8in3 CHANNEL
3V
SELECTB
RESTORE
•in5STROBE
-J
:
:
i,
'I
I:
VOH-----t'\
eOol OUTPUT
50%
VOL - - - - NOTE:
\
~: ~
-l;d-~-l--
8in,-8in5 If=lf< IOns
the channel select Signal
the input to the seleGted
The minimum time between the 50% level of the trailing edge of a + or - 1 volt
differential·mode signal (t r "" tf'$ 15 ns) and the 50% level of the leading edge of a
5 mV input pulse when the capacitor restore and strobe inputs are used in a normal
manner as shown in Figure 22
The delay time from the 50% level of the leading edge of a 5 mV input signal to the
1.5 volt level of the negative edge of the output as shown in Figure 5
The minimum time between the 50% level of the leading edge of the strobe and the
50% level of the leading edge of the input signal as shown in Figure 5
tso+
The delay time from the 50% level of the trail ing edge of the strobe to the 1.5 volt
level of the positive edge of the output when the input is held at the "1" level as
shown in Figure 6
tso_
The delay time from the 50% level of the leading edge of the strobe to the 1.5 volt
level of the negative edge of the output when the input is held at the "1" level as
shown in Figure 6
L
r-
the channel select Signal
the input to the selected
The delay time from the 50% level of the trailing edge of a 5 mV input signal to the
1.5 volt level of the positive edge of the output as shown in Figure 5
L
\
-l ~tCf :
~
o~~~~:
'vo -1
--. J
tOMA±:
\
L
3~
ein4CAPACITOR
The current out of the capacitor restore input when the input is at 8 low-level of
o volts
ICSH
o
Bin, CHANNel
Input current to the base of any input transistor when the base of the other transistor
of the differential pair is at the same voltage
ICC
Vee
Positive power supply voltage
VCCH
Maximum operating positive power supply voltage
VCCl
Minimum operating positive power supply voltage
VCM+
The maximum common·mode input voltage that will not saturate the amplifier
VCM-
The minimum common-mode input voltage that will not break down the amplifier
VCRH
The minimum high·level voltage at the capacitor restore input required to insure
that the capacitors are clamped i.e., the input threshold voltage is greater than 10 mV
veRL
The maximum lOW-level voltage at the capacitor restore input which will allow normal
operation during the threshold test
VCSH
The minimum high-level voltage at a channel select input required to insure that the
total of trie base currents of all unselected inputs is less than 1.0 JolA
VCSl
The maximum low-level voltage at a channel select input required to insure that the
total of the base currents of all unselected inputs is less than 1.0 J.lA
VOM
Vee
VEEH
VeeL
VOH
VOL
VSH
The maximum differential-mode input voltage that will not saturate the amplifier
Negative power supply voltage
Maximum operating negative power supply voltage
Minimum operating negative power supply voltage
Logic "1" state output voltage
Logic "0" state output voltage
The minimum high·level voltage at the strobe input which will allow normal opera·
tion during the threshold test
The maximum low-level voltage at the strobe input which will result in VOH at the
outpClt regardless of input signals
The minimum input signal (ein 1) required to drive the MTTl III gates to obtain
the eo waveform shown in Figure 4
8·27-0
MC1544L, MC1444L (continued)
TYPICAL CHARACTERISTICS
(T A = +25 0 C unless otherwise noted)
FIGURE 10 - THRESHOLO VOLTAGE versus POWER SUPPLIES
FIGURE 9 - THRESHOLO VOLTAGE venus TEMPERATURE
2. 0
1. S
:;
1.4
VEE" -SAl V
~
1. 2
~
1. 0
'"
o
-
VEE - -5.4 V
>
:3 o. 8
0
.
c
"
~ O. S
" O. 4
~
;:
O. 2
0
0
-75
-25
+125
+75
+15
4.75
4.5
7.0
'"
;
5.0
:;
.§.
w
4.0
~
3.0
V
c
i=
--
2.0
~1.0
0
.-"
3.0
1\
c
>
"\
9 2.0
........
i:
~
j.;"
"I-..c
:>
40
10
'"~
V
o
9
5.5
4.0
8.0
6.0
5.15
FIGURE 12 - THRESHOLD VOLTAGE versus PULSE WIDTH
FIGURE 11 - THRESHOLD versus INPUT OFFSET VOLTAGE
:;
~
5.0
VCC; POWER SUPPLY VOLTAGE (VOLTSI
T. TEMPERATURE ("CI
o
o
80
SO
I"-..
r-- t-
1. O
10
80
SO
40
Vio.INPUTOFFSETVoLTAGE (mVI'
100
PW, PULSE WIDTH (nsl
(10% LEVEL OF TRIANGLEI
FIGURE 13 - OUTPUT VOLTAGE
versus CURRENT and TEMPERATURE
FIGURE 14 - SENSE AMPLIFIER RESPONSE
versus TEMPERATUR E IS.. Figures 3 and 51
800
1-,1'"1
:;
E
-SO0
(5mVI
~w
'"~
u;-:t;;: ~
>
~
=>
010
.:.
:?
OH~
THRESHO~
r--
\
l--+lrC
4.0
+25"C
eout
t - - I-- VOL
o
1.0
"
1\
-55"C
15400
.....
V
S.O
8.0
10
11
14
lS
18
10
10L' OUTPUT CURRENT LOW (mAl
8-271
1
MTTL
LEVEl
\
LV
2onS/OIV.
55r
..... ~ t:::::
~V
........ +125"C
I
MC1544L. MC1444L (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 16 - CAPACITOR RESTORE
TIME versus INPUT OFFSET VOLTAGE
FIGURE 15 - INPUT IMPEDANCE .ersus FREQUENCY
50
3. 0
!w
~w
'-'
z
'"
2. 0
"
o
o
APPROXIMATE
-MTTL THRESHOLD_
_ I
LEVEL
I
3.0
>
+125 0C
~ 2.0
\
o
H
~
1.5
1.0
o
2.0
o
Vin' INPUT VOLTAGE (mV)
I
:;
~
~
+1Z50C, VEE' -6.3 V
~
+1250C, VEE' -6.0 V
I
3. 0
f--
ii:
w'
'"~
-
>
-
I
~. 3. 0
I
I
I
2.0
3.0
+125 0C, VEE' -6.0 V
-
+1250C, VEE' -6.3 V
I
I
+250C, VEE' -6.0 V
-55°C, VEE - -5.7 V
-55°C, VEE - -6.0 V
~ 1. 0
-55°C, VEE - -6.3 V
"
>
4.0
I
+125 0C, VEE' -5.7 V
;+ -
~I-
I - -55°C, VEE' -6.0 V
1.0
-
~ 2. 0
oj
0
I
\
;'"
-55 DC, VEE' -6.3 V
l-
=>
~ 1. 0
=>
o
5. 0
+25 0C, VEE' -6.0 V
I
2.0
4.0
FIGURE 20 - CHANNEL SELECT B to
OUTPUT TRANSFER CHARACTERISTICS
I
:--
Q
3.0
2.0
1.0
VS(in),STROBE INPUT VOLTAGE (VOLTS)
FIGURE 19 - CHANNEL SELECT A to
OUTPUT TRANSFER CHARACTERISTICS
5. 0
55°C and +25°C
~
1.0
0.5
Ui 4. 0
. 80
FIGURE 18 - STROBE TO
OUTPUT TRANSFER CHARACTERISTICS
\
~. 3.0
c
60
40
5.0
'"z
I-
20
Vio,lNPUT OFFSET VOLTAGE (mV)
FIGURE 17 - AMPLIFIER INPUT TO
OUTPUT TRANSFER CHARACTERISTIC
~
/
V
<:;
::
"
..:.-
./""
30
o
o
I
1.0
2.0
I
3.0
VCS ' CHANNEL SELECT INPUT VOLTAGE, Pin 8 (VOLTS)
VCS, CHANNEL SELECT INPUTVOLTAGE,Pin 7 (VOLTS)
8-272
4.0
MC1544L, MC1444L
(continued)
FIGURE 21 - COMMON-MOOE CHARACTERISTICS
Note: The 5mV Input Signal (Differential) is superimposed on the
Common-Mode I nput and is shown separately for reference
only.
FIGURE 22 - DIFFERENTIAL-MODE CHARACTERISTICS
Note: The 5mV Input Signal is superimposed on the Differential
Input and is shown separately for reference only.
8-273
MC1545
MC1445
~~________H_I_G_H_-_FR__EQ_U__E_N_C_Y_C_I_R_C_U_IT_S~
GATE CONTROLLED TWO-CHANNEL-INPUT
WIDEBAND AMPLIFIER
GATE CONTROllED
TWO-CHANNEl-INPUT
WIDEBAND AMPLIFIER
... designed for use as a general-purpose gated wideband·amplifier,
video switch, sense amplifier, multiplexer, modulator, FSK circuit,
limiter, AGC circuit, or pulse amplifier. See Application Notes
AN475 and AN491 for design details.
• Large Bandwidth; 75 MHz typical
• Channel-Select Time of 20 ns typical
• Differential Inputs and Differential Output
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
TYPICAL APPLICATIONS
VIDEO SWITCH DR
DIFFERENTIAL AMPLIFIER WITH AGC
MULTIPLEX OR FSK
ANALOG SWITCH
PULSE·WIDTH MODULATOR
BALANCED MODULATOR
SIGNAlINPUTo---r-o""'-!
AMPLITUDE MODULATOR
1011)
eoul
6(7)
Open
CIRCUIT SCHEMATIC
.
F SUFFIX
~
'ERAMIC
~
PACKAGE
CASE 607
G SUFFIX
+--+--<>
' - - - - - - -.....- - - - - - -__-
.....-
......>-.....- - 0
Number in parenthesis denotes pin for F and L packages, number
at left in each case denotes corresponding pin for G package.
8-274
Output
V"
METAL PACKAGE
CASE 602A
~.""".':
"'li~1)1 r
L SUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
MC1545. MC1445 /continued)
MAXIMUM RATINGS (T A = +250 e unless otherwise noted)
Rating
Symbol
Value
Unit
VCC
VEE
+12
-12
Vdc
Vdc
Power Supply Voltage
VID
±5.0
Volts
Load Current
IL
25
mA
Power Dissipation (Package Limitation)
Flat Package
Derate above T A = +25 0 C
Po
500
3.3
mW
mW/oC
625
5.0
mW
mW/oC
680
mW
mW/oC
Differential I nput Signal
Ceramic Dual In-Line Package
Derate above T A
= +25 0 C
Metal Can
Derate above T A
= +25 0 C
Operating Temperature Range
4.6
MCI445
MCI545
Storage Temperature Range
ELECTRICAL CHARACTERI'STICS
TA
Oto +75
-55 to +125
°c
Tsig
-65 to +150
°c
(Vee = +5,0 Vdc, VEE = 5,0 Vdc, at T A = +25 0 e,
specifications apply to both input channels unless otherwise noted)
Fig. No.
Symbol
Min
Typ
Max
Unit
Single-Ended Voltage Gain
MCI445
MCI545
1,12
Av•
19
18
MC1445
MCI545
1,12
BW
22
20
-
dB
Bandwidth
16
16
50
MCI445
MCI545
5,14
Characteristic
Input Impedance
(f = 50 kHz)
75
75
MHz
-
10
10
-
25
-
Ohms
k ohms
Output Impedance
(f = 50 kHz)
6,15
zos
3.0
4.0
-
Output Voltage Swing
(RL = 1,0 k ohm, f = 50 kHz)
4,13
VOD
1.5
2.5
-
V p_p
MCI445
MCI545
16
liB
-
15
15
30
/lAde
16
11101
MCI445
MCI545
17
IVIOI
Quiescent Output dc Level
17
Vo
Output de Level Change
(Gate Voltage Change: +5.0 V to'O VI
17
I"'Vo I
9,18
I nput Common-Mode Voltage Swing
Gate Characteristics
Gate Voltage Low (See Note 1)
I nput Bias Current
(lIB = (11 + 12)/2)
I nput Offset Current
Input Offset Voltage
Common-Mode Rejection Ratio
(f = 50 kHz)
Gate Voltage High (See Note 2)
Gate Current low
-
/lAde
-
7.5
5.0
mVdc
-
0.2
15
-
Vdc
-
CMRR
-
85
-
dB
18
VICR
-
±2.5
-
8
VGOL
MCI445
MC1545
MCI445
MCI545
VGOH
MCI445
MCI545
18
Step Response
(ein = 20mV)
MCI445
MCI545
19
DC Power Dissipation
-
0.20
0.45
0.40
0.70
-
-
1.3
1.5
3,0
2,2
-
4.0
2.5
mA
-
IGOH
-
-
4.0
2.0
/lA
tpLH
-
6.5
6.5
-
ns
-
10
-
6.3
6.3
-
6_5
6.5
MCI445
MCI545
tr
MCI445
MCI545
tf
-
-
-
7.0
7.0
10
10
-
10,20
VN(in)
-
25
10
-
11,20
Po
-
70
70
150
110
-
Note 1 VGOL is the gate voltage which results in channel A gain of unity or less and channel B gain of 16 dB or greater.
Note 2 V GOH is the gate voltage which results in channel B gain of unity or less and channel A gain of 16 dB or greater.
8-275
Vp
Vdc
-
tpHL
= 50 ohms)
mV
IGOL
MCI445
MCI545
MCI445
MCI545
-
-
Gate Current High
(Gate Voltage =+5,0 V)
Widebend I nput Noise
(5.0 Hz - 10 MHz, RS
25
1.0
18
=0 V)
-
-
2.0
MCI445
MCI545
(Gate Voltage
zis
/lVlrms)
mW
MC1545, MC1445 (continued)
FIGURE 2 - SINGLE·ENDED
VOLTAGE GAIN versus TEMPERATURE
FIGURE 1 - SINGLE·ENDED
VOLTAGE GAIN versus FREQUENCY
25
25
~
z
;;:
~
20
z
;;:
to
to
«
~
«
15
~
0
>
ffi
0
Iii
0
>
10
Iii
~
~
\
to
J
15
ffi0
Z
in
20
to
w
to
W
5.0
to
\
o
10
z
in
~
«
5.0
0.01
1.0
0.1
100
10
1000
-55
FIGURE 3 - VOLTAGE GAIN
~
z
;;:
to
W
to
«
20
V-V V--
~
0
>
ffi
0
Iii
- ------
5.0
V
~to
,.-
4.0
Z
~
w
to
V
3.0
«
0
>
2.0
f:::>
:=:::>
in
~
ci
0
>
z
0
«
/
V
~
15
V
1.0
~
,/
t=50kHz
IIIII
10
±4.0
±5.0
±S.O
±7.0
±B.O
±9.0
±10
±11
±12
0.1
0.2
0.5
VCC, VEE, POWER SUPPLY VOLTAGE IVdc)
14
o
~
10
t--
.Z
~
ffi
...
j
6.0 :a
~
~
5.0
t'-..
"
•
~ 6.0
::
"-
4.0
«
~ 2.0 t- 0inlrm.) = 30 mV
.:
ex:
I I
5.0
"-
10
§>
10
20
:I:
III I
lout (rms) = 20 mV
ISO
;;; 140
u
z
3.0~
~
=i
~
~
~
.... '!
n
c::
n
m
1.0
r-r-.
50
« 120
o
2.0 ~
....... ........
5.0
lIllI
lBO
~
4.0 ~
'I'-
ex:
1.0
200
n
r---. r'P
8.0
ex:
f-
7.0
........
2.0
FIGURE 6 - OUTPUT IMPEDANCE versus FREQUENCY
C~
12
1.0
RL, LOAD RESISTANCE Ik OHMS)
FIGURE 5 - INPUT Cp AND Rp versus FREQUENCY
IBOTH CHANNELS)
~
:I:
+125
FIGURE 4 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
to
~
+100
+75
TA, TEMPERATURE IOC)
versus POWER SUPPL Y VOLTAGES
25
+50
+25
-25
t, FREIlUENCY IMHz)
100
80
5 so
~
S
~
40
20
o
100
0.01
0.1
1.0
t, FREIlUENCY IMHz)
t, FREIlUENCY IMHz)
8·276
10
100
MC1545, MC1445 (continued)
FIGURE 7 - CHANNEL SEPARATION versus FREQUENCY
FIGURE 8 - GATE CHARACTERISTICS
140
+20
~
120 HH--H+-~++-R--d-++++--+-+
z
~
100
z
r-r-t+++-+-+-HH-+-+tf~r-~++-+--+-HH-++~
80
'"
-10
-20
0
>
~
0
-30
w
60
~
0
ffi
w
z
z
co
;'"
o
;::
;;;
;:r
g
50
-40
~
40
20
'"u;z
-50
J
-60
-70
0.5
1.0
fin, INPUT FREQUENCY (Hzl
FIGURE 9 - COMMON MODE
REJECTION RATIO versus FREQUENCY
100
~
90
f-
;;;
'"
80
z
70
0
!
w
0
0
'"
6
""8
33
I'---
1111111111
1'--.
Bandwidth
I>
31
'"'"
'='
29
=
1111
f".-
50
Vy
0
>
w
V
~
40
is
z
1"--
30
27
~z
20
~
l-25
z
>
10
23
0.1
10
1.0
100
10
100
f, FREQUENCY (MHzl
1.0 k
100 k
FIGURE 12 - SINGLE·ENDED VOLTAGE GAIN AND
BANDWIDTH TEST CIRCUIT
500
+5.0 V
400
10k
RS, SOURCE RESISTANCE (OHMSI
FIGURE 11 - POWER DISSIPATION
versus PQWER SUPPL Y VOLTAGE
-5.0 V
-75
-75
~
z
II
5.0 liz to 10M Hz
2,
w
60
0.01
S
2.5
2.0
FIGURE 10 - INPUT WIDEBAND NOISE
versus SOURCE RESISTANCE
a'
'"
~
1.5
VG, GATE VOLTAGE (VOLTSI
250
-100
-100
0
;:: 200
;;:
Bi
t"
-100
•
-125
-125
is 150
'"
-125
~
~ 100
~
~
&:
&:
&:
co
Ambient Temperature
Degrees Centigrade
50
4.0
6.0
8.0
10
12
VCC AND VEE, POWER SUPPLY VOLTAGE (Vdcl
Number in parenthesis denotes pin for F and l packages, number at left in each case denotes corresponding pin for G package.
8-277
MC1545, MC1445 (continued)
FIGURE 13 - OUTPUT VOLTAGE SWING TEST CIRCUIT
FIGURE 14 - INPUT IMPEDANCE TEST CIRCUIT
+5.0 V -5.0 V
+5.0 V -5.0 V
10111
6111
FIGURE 15 - OUTPUT IMPEDANCE TEST CIRCUIT
FIGURE 16 - INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT TEST CIRCUIT
+5.0 V -5.0 V
+5.0 V -5.0 V
ein=50mV(rms)
f· 50 kHz
ffL~
~
6171
I
IL
110 isthe difference in current
reading when either 81 Dr 82
is switched.
_____ _
Open
1
+5.0 V
FIGURE 17 - INPUT OFFSET VOLTAGE AND QUIESCENT
OUTPUT LEVEL TEST CIRCUIT
FIGURE 18 - GATE CURRENT tHIGH AND LOW),
COMMON-MODE REJECTION AND
COMMON-MODE INPUT RANGE TEST CIRCUIT
+5.0 V -5.0 V
+5.0 V -5.0 V
Adjust A1 until VI
reads 0 Volts then
+5.0 V
read Edc.
Rl
100 k
10 Turns
-5.0 V
CMRR. 20 log [Avs ]
Ave
Switch SI and readjust Al for VI = 0
6VOldc) = Change in V2 Reading
+5.0 V
+5.0 V
Number in parenthesis denotes pin for F and l packages, number at left in each Case denotes corresponding pin for G package.
8-278
MC1545, MC1445 (continued)
FIGURE 20 - POWER DISSIPATION AND WIDEBAND
INPUT NOISE TEST CIRCUIT
FIGURE 19 - PROPAGATION DELAY AND RISE AND
FALL TIMES TEST CIRCUIT
+5.0 V -5.0 V
To "Au Channel
of Scope
+5.0 V
-5.0 V
7 (8)
Scope Tektronix 567
Pulse
Gen.
10 (1)
or equiv
e;n= 20 mV
tr =' <5.0 ns
t,
6 (7)
True rms Voltmeter
with Bandwidth of
5.0 Hz to 10 MHz
To "B" Channel
of Scope
Vo
Avs
VN(in)" -
Open
~rtPHl
J'U~
\[
I
I
Open
FIGURE 21 - LIMITING CHARACTERISTIC
Qc
5.0
~
I
-
w
~
-I
4.0
I---
~
o
>
V
~ 3.0
~
;=
number at left in each case denotes corresponding pin for G package.
i
/
_ 1.0
i5
•
0
/ "'' 0v~
/ r
« 2.0
Number in parenthesis denotes pin for F and L packagltS,
100
10k eout -
-
1(3)
'"
50
kHz
-
-
4(5)
e
/
o
Vee" ± 5.0 VOLTS
-
10 (I)
-=
100
ein, SING LE·ENDED INPUT
(
I
1(1)
300
400
I
500
va LTAGE (mVp-p)
•
8-279
L----f
l . . ____
H_IG_H_"F_R_E_Q_U_E_N_C_Y_C_I_R_C_U_IT_S----l
MC1550
RF - IF AMPLIFIER
INTEGRATED CIRCUIT
INTEGRATED CIRCUIT LINEAR AMPLIFIER
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
... a versatile,common-emitter,common-base cascode
circuit for use in communications applications. See
Application Notes AN-215, AN-247 and AN-299 for
additional information.
•
Constant Input I mpedance over entire AGC range
•
Extremely LowY12-4.3Jlmhosat60MHz
Pin 7 connected to case
•
High Power Gain - 30 dB @ 60 MHz (0.5 MHz BW)
•
Good Noise Figure - 5 dB @ 60 MHz
GSUFFIX
METAL PACKAGE
CASE 602B
MAXIMUM RATINGS (TA
= +25 0 C unless otherwise noted)
Rating
Power SupplV Voltage, Pin 9
AGC SupplV Voltage
Differential Input Voltage, Pin 1 to Pin 4
Svmbol
Value
Unit
V+
20
Vdc
VAGC
20
Vdc
Vin
±5.0
V(rms)
680
mW
mW/oC
mW
mW/oC
(RS = 500 ohms)
Power Dissipation (Package Limitation)
Po
Metal Can
Derate above T A = +250 C
Flat Package
Derate above T A = +250 C
4.6
500
3.3
Operating Temperature Range
Storage Temperature Range
TA
-55 to +125
T stg
-65 to +150
CIRCUIT DESCRIPTION
CIRCUIT SCHEMATIC
r-----I
I
R,
3k
R,
---------,
I
18k
10 o-lf--f---::3:k - -..
I
I
I
R,
I
R,
I
I
3k
L _____ _
CASE~
I
2
-----8
See Packaging Information Section for outline dimensions.
°c
°c
F SUFFIX
CERAMIC PACKAGE
CASE 606
TO-91
7
V+
The MC1550 is built with monolithic fabrication techniques
utilizing diffused reSistors and small-geometry transistors.
Excellent AGe performance is obtained by shunting the signal
through the AGe transistor QJ maintaining the operating point
of the input transistor Q •. This keeps the input impedance
constant over the entire AGe range.
The amplifier is intended to be used in a common-emitter,
common-base configuration (Q. and Q2) with QJ acting as ~n
AGe transistor. The input signal is applied between pins 1 and
4, where pin 4 is ac-coupled to ground. DC source resistance
between pins 1 and 4 should be small (less than 100 ohms).
Pins 2 and 3 should be connected together and grounded. Pins
8 and 10 should be bypassed to ground. The positive supply
voltage is applied at pin 9 and at higher frequencies, pin 9
should also be bypassed to ground. The output is taken between pins 6 and 9. The substrate is connected to pin 7 and
should be grounded. AGC voltage is applied to pin 5.
MC1550 (continued)
ELECTRICAL CHARACTERISTICS (v+
=
+6 Vdc, T A = +250 C)
Conditions
Characteristic
DC CHARACTERISTICS
Output Voltage
Test Voltage
VAGC=O Vde
VAGC = +6 Vdc
1
VAGC = 0 Vde
1
Vo
V8
VAGC =+6Vde
Supply Drain Current
1
VAGC = 0 Vde
10
VAGC = +6 Vde
AGC Supply Orain Current
1
VAGC = 0 Vde
IAGe
VAGC = +6 Vde
3.80
5.90
-
4.65
6.00
Vde
-
Vde
2.85
-
3.40
3.25
-
3.BO
-
-
2.2
-
-0.2
-
-
0.18
mAde
2.5
mAde
SMALL·SIGNAL CHARACTERISTICS
Small·Signal Voltage Gain
f=500kHz
2
-
29
dB
-3.0 dB
2
AV
BW
22
Bandwidth
22
-
MHz
Transducer Power Gain
f = 60 MHz, BW = 6 MHz
3
Ap
-
25
-
-
21
-
f = 100 MHz, BW = 6 MHz
dB
TYPICAL CHARACTERISTICS
(v+ = 6.0 Vde, T A = +250 C unless otherwise noted)
FIGURE 1 - DC CHARACTERISTICS TEST CI RCUIT
FIGURE 2 - VOLTAGE GAIN AND BANDWIDTH TEST CIRCUIT
VAse +6Vde
V~se +6 Vde
c, ~ C, ~ O.lI'J
R, ~50n
R, ~ 620n
C, thru C. ~ 0.1 j.tF
. . ,p'
2k
±I%
c,
---1 f----+--+__---=-O---4
~'"."
FIGURE 4 - DRAIN CURRENT TEMPERATURE
FIGURE 3 - POWER GAIN TEST CIRCUIT
@
CHARACTERISTICS
60 MHz
1.2 0
v+ ~16 V
VASC~OV
1.1 0
R,
0
R, ~50n
C"C,andC, ~ 0.001 j.tF
C. and C, ~ 0.1 j.tF
C. and C, ~ 9·35 pF
"'"
0.9 0
C7~9·180pF
0.8 0
-55
C, ~ 25·280 pF
L, ~ 0.22j.tH
L, ~O.26 j.tH
-25
+25
+50
+75
TA • AMBIENT TEMPERATURE 1°C)
8-281
+100
+125
•
MC1550 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 6 - INPUT RESISTANCE AND
CAPACITANCE versu. AGC VOLTAGE
FIGURE 5 - INPUT RESISTANCE AND CAPACITANCE
va.... FREQUENCY
2800
1
r-....
2400
V+
~6V
VASC~OV
~
2.0
I
1\
w
3.0
\
50
4.0 ~
7
\ 7
\
iii
1.0
R.... @60MHz\1[
!
J
o
I00
1000
100
!\
90
w
O'§
,
5.0
OV
\\
\\
10
2.0
FIGURE B - OUTPUT RESISTANCE AND
CAPACITANCE v..... AGC VOLTAGE
100
Rout
1.0
6.0
VASC, AGC VOLTAGE (VOLTS)
FIGURE 7 - OUTPUT RESISTANCE AND CAPACITANCE
va.... FREQUENCY
0.1
~
J
60 MHz
C;,
f, FREQUENCY (MHz)
100
I
8.0 ~
R;,
400
~
w
2.0
100
10
1.0
O'§
>-
4.0
I-
o0.1
1
<.>
6.0
c;,
1\
-.800
<£
12
30 MHz
CI:
1\
~1200
!E
'"-
C;,
~
B.O
f3
- r-!:-
I
14
1.0
2.0
3.0
4.0
5.0
VASC , AGe VOLTAGE (VOLTS)
f, FREQUENCY (MHz)
FIGURE 10 - TRANSDUCER POWER GAIN
versus TEMPERATURE
FIGURE 9 - MAXIMUM TRANSDUCER POWER GAIN
varsus FREQUENCY
0
0
VASC~O
BW~6MHz
f.l~ 60 M~Z
BW~6MHz
5
\--
0
1\
5
I--- I---f.;
0
1\
0
~
1\
5
5.0
01.0
2.0
5.0
10
20
50
100
200
500
1000
f, FREQUENCY (MHz)
I0
-55 -40
-20
+20
+40
+60
TA , AMBIENT TEMPERATURE (OC)
8-282
+80. + 100
+125
MC1550 (continued)
TYPICAL CHARACTE R ISTICS (continued)
FIGURE 11 - TRANSDUCER POWER BANDWIDTH versus AGC VOL TAGE
+2~r--------'--------'--------'---'----~----'---r--------.--------.---------r--------r--------'
fo
~60MHz
+20~------_+--------+-------~--~~~
iii
'"~ +lSI--------+--------+_------7"lOtL--+7"'Offi
~ +101_------~--------+-~~~~~-+~~~~~+---~~----~~~~--+_------~--------_r------__i
ffi
~ +5.0
~
.f
-~.ol_---+_---+----+-=.+--7"'~"""o;;::__+-=-_+---__t---__I----t_---t_--_____j
-104~0------~--------~-------L--~--~~---L--~------~--------~------~------~------~90
f, FREQUENCY (MHzl
FIGURE 12 - NOISE FIGURE AND OPTIMUM SOURCE
RESISTANCE versus FREQUENCY
4
v+LJ
2
1400
I
~
1
I!NFro't1
10
50
20
100
2
1
.
iii
600
9.0
~
~
Z
~
RS(optl
1-
200
500
k-
./
7.0
105 MHz
~
of
i""'--..
5.0
4.0
o
60 MHz
~
~
~ +25
z
f---+-t-++-+-+++H+--iI/V<--+-+-t---+I\~i\-+-++t1
..,:c +5.0 ~--t--+-H~+-+-r-+++-i7"'--g2-1f-,-c-b2-+1-+V-A+-GC-=-+S-V-+d--','t-l-t+l
-5o-Y=ri'
~ -101_~--+-~--+-~rt+++---I_+-+-+-+_+_t1-HH
~ -15L-~__L-~~~~~~~__L-~~L-J-J-~-LW
1.0
3.0
10
S.O
f, FREQUENCY (MHz)
30
so
25
~
~
~
I.!.
'§
E
_Q21@30MHz
~
20 --b 211 @60 MHz
~
II-
~
~
~
~
FIGURE 15 -Y21. FORWARD·TRANSFER ADMITTANCE
versus AGC VOLTAGE
i
E +30
a:
~
'"""'"
Rs, SOURCE RESISTANCE !OHMS)
1E +35
+10
V
_t'"
30 MHz
~
1000
FIGURE 14-Y21, FORWARD,TRANSFER ADMITTANCE
versus FREQUENCY
+20
:iii
c +15
L f"'"
6.0
f, FREQUENCY (MHz)
..
..~
~
"'-200 MHz
~ 8.0
..:
400 jil
200
0
'"u:
~
~
1['-....
'"
a:
=>
~
<.>
r--.... t'--
2. 0
VAGC~OV
800 ~
V
4.0
0
1000
J+ ~ 6 Vi
3r------
e
0
0
14
1200~
VAGC~OV"
0
FIGURE 13 - NOISE FIGURE versus SOURCE RESISTANCE
..
....,~
15
z
10
c
Q21 '@60MHz
5.0
a:
100
o
o
,
"" ~
\
a:
~
~
-==b21 @30 MHz
1!l
i
J+=6V~'-
1.0
2.0
\\
~
..........
3.0
VAGC,AGC VOLTAGE (VOLTS)
8-283
~
4.0
5.0
MC1550 (continued)
TYPICAL CHARACTERISTICS
(v+
= 6.0 Vdc, T A = +25 0 C unless otherwise noted)
FIGURE 17 -Y11, INPUT-ADMITTANCE versus FREQUENCY
FIGURE 16 -Y12, REVERSE TRANSFER-ADMITTANCE
versus FREQUENCY
10
10
o
E
.3
w
u
z
r- V+
'"::::
""'
E
6 Vdc
-b12
u
z
>-
,/
'"
/912
1.0
f-
~
~
z
bl
.....
.!-- .....
V911
1.0
"'
::i>-
~
w
~
'"w
~
V
...:
;:
V
/"
N
>-
6Vdc
w
o
::B
-V+
.5
0.1
0.1
1.0
3.0
6.0
10
30
60
1.0
100
3.0
6.0
10
30
60
t. FREQUENCY (MHz)
t. FREQUENCY (MHz)
FIGURE 19 - s11 AND s22, INPUT AND OUTPUT
REFLECTION COEFFICIENT
The Y12 shown in Figure 16 illustrates the extremely low feedback of the MC1550
with no contribution from the external mounting circuitry. However, in many
cases the external circuitry may contribute as much or more to the total feedback
than does the MC1550.
To perform more accurate design calculations of gain, stability, and input - output
impedances it is recommended that the designer first determine the total feed·
back of device plus circuitry.
This can be done in one of two ways:
(1) Measure the total Y12 or 512 of the MC1550 installed in its mounting
circuitry, or
(2) Measure the Y12 of the circuitry alone (without the MC1550 installed) and
add the circuit Y12 to the Y12 for the MC1550 given in Figure 16.
FIGURE 18 -Y22, OUTPUT-ADMITTANCE versus FREQUENCY
1.0
1i
I--V+ 6 Vdc
E
b22
.5
w
u
z
>>-
'"
";2:
V
0.1
0
=>
eo=>
0
~
0.01
922
V
1.0
3.0
6.0
10
30
60
100
t. FREQUENCY (MH,)
8-284
lOa
MC1550 (continued)
TYPICAL CHARACTERISTICS (continued)
(V+ = 6.0 Vdc, T A = +2So C unless otherwise noted)
FIGURE 21 - 522. OUTPUT REFLECTION
COEFFICIENT versus FREQUENCY
FIGURE 20 -sll.INPUT REFLECTION
COEFFICIENT versus FREQUENCY
0.95
-7.0
0.9998
..........
0.90
~'111
-20
-18 ~ tt:
W'"
-16 a:
to
>-w
~u
~u:
~ ~ 0.80
,,"
-14::l
",'-'
~ ~ 0.75
-12
",>-
«'-'
:;;w
~ ~ 0.70
i!a::
0.65
0.60
1.0
8
--3.0
1'221
~>
~:z
~w
~
-4.0 :::
2.0 ~
S
e
"'",
~ ~ 0.9982
~u
60
1.0
f, FREQUENCY (MHz)
-2.0~ ~
~8
822 /
W
,....,
~a: 0.997 4
100
"u:
17
0.997 8
0.997 0
30
«
X
-1.0 ~
"3.0
o
6.0
10
30
60
100
t, FREQUENCY (MHz)
FIGURE 23 -512. REVERSE TRANSMISSION
COEFFICIENT (FEEDBACK)
FIGURE 22 -521. FORWARD TRANSMISSION
COEFFICIENT (GAIN)
8-285
~W
-4.0 ~
>->"'z
-3.00
W
~ ~ 0.998 6
N
~~
w'"
~~
-100 U
-6.0
-5.0
e ,,'-'
w"
10
>=
>~ !Z 0.999 0
>-w
~ H: ~E
-8.0 "'w
~_ i
11/ /
,/
6.0
-6.0 ~
0.999 4
z
"~ en
>->~ ~ 0.85
1L_________H_IG_H_-_F_R_EQ_U__EN_C_Y__C_IR_C_U_I_T_S~
MC1552G
MC1553G
MONOLITHIC VIDEO AMPLIFIER
HIGH FREQUENCY
INTEGRATED CIRCUITS
... a three·stage, direct·coupled, common·
emitter cascade incorporating series·series
feedback to achieve stable voltage gain, low
distortion, and wide bandwidth. Employs a
temperature'compensated de feedback loop
to stabilize the operating point and a current·
biased emitter follower output. Intended for
use as either a wide-band linear amplifier or
as a fast rise pulse amplifier.
•
SILICON
EPITAXIAL PASSIVATED
High Gain - 34 dB ± 1 dB (MC15521
52 dB ± 1 dB (MC15531
• Wide Bandwidth - 40 MHz (MC15521
35MHz (MC15531
•
•
Low Distortion - 0.2% at 200 kHz
Low Temperature Drift - ±0.002 dB/oC
MAXIMUM RATINGS
(TA =+2SoC unless otherwise noted)
Rating
Value
Symbol
Power Supply Voltage, Pin 9
9
Ydc
Input Voltage, Pin 1 to Pin 2
Y.
1.0
V(rms)
Po
6BO
4.6
mW
mWrC
TA
-55 to +125
'c
T stg
-65 to +150
'c
lfi
(RS = 500 ohms)
Power Dissipation (Package Limitation)
Derate above T A = +2SoC
Operating Temperature Range
Storage Temperature Range
METAL PACKAGE
CASE 602B
Unit
y+
Pin 6 connected to case
CIRCUIT SCHEMATICS
FIGURE 1 - MC1552 (LOW GAIN)
FIGURE 2 - MC1553 (HIGH GAIN)
t--+--"T"-oV...
t--+--~<>Vo.'
7
1.6k
3k
80
6k
12k
12k
130
~IN OPTI~N ~T. C
3
6
GNO
4
5
6
GAiNOPTiiiN EXT. C GNO
See Packaging Information Section for outline dimensions.
8-286
6k
MC1552G, MC1553G (continued)
ELECTRICAL CHARACTERISTICS
Voltage Gain
(V+ ~ +6 Vdc. T, ~ +25'C ,,'ess a,h..w;se na,ed)
Gain ...
Fig.
No.
Characteristic
MC1552
Option
50
100
3
Voltage Gain Variation
(T A '" _55°C to .. 125°C)
3
All
3,6
MC1552
50
100
MC1553
-
Output Impedance
(f ::: 100 kHz, RS = 50 r1)
-
All
DC Output Voltage
3
DC Output Voltage Variation
(T A '" _55°C to +12S°C)
3
Output Voltage Swing
(ZL::;:: 1 k\1. V in = 100 mV[1'l1ls])
3
All
All
All
All
Power Dissipation
MC1552
Unit
Vou/Vin
56
113
V/V
175
350
200
400
225
450
-
&2
BW
IZ'nl
IZaut!
V out (de)
D.Vout (de)
Vout
-
All
PD
50
100
'pd
200
400
MC1552
3,4
50
100
'r
Overshoot
3,4
Noise Figure
(RS '" 400 rol, fo '" 30 MHz, BW '" 3 MHz)
-
All
(Va!Vp )100
NF
All
THD
=
All
1 kn)
21
17
40
35
17
7.5
35
15
-
7
10
-
-
16
50
2.5
2.9
3.2
-
::0.05
-
3.6
4.2
-
-
75
-
200
400
MC1553
Total Harmonic Distortion
(V out '" 2 Vp_p. f = 200 kHz, RL
Max
50
100
3,4
MC1553
Rise Time
Typ
44
87
200
400
Input Impedance
(f = 100 kHz, RL" 1 k{!)
Delay Time
Min
200
400
MC1553
Bandwidth
Symbol
dB
MHz
kn
n
120
Vdc
Vdc
Vp_p
mW
-
ns
9
12
16
20
ns
II
8
9
10
25
-
-
30
20
45
5
-
-
5
-
-
0.2
-
%
dB
%
NOTES
*To obtain the voltage-gain characteristic desired , use the following pin connections:
Type
MC15 52
MC1553
Voltage
Gain
Pin Connections
50
100
200
400
Pin 3 Open
Ground Pin j
Connect Pin 3 to Pin 4
Pins 3 and 4 Open
l. Ground Pin 6 as close to can as possible to minimize
overshoot. Best results by directly grounding can.
2. If large input and output coupling capacitors are used,
place shield between them to avoid input-output coupling.
3. A high·frequency capacitor must always be used to by·
pass the power supply. This capacitor should be as close to
the circuit as possible.
shown in Figure 5.
F"
I
Ig. 5b C, ~ 2".f, (1.7
x 10'1 Farads; C, ~
8 CdVout/Vin) Farads
F" 5
V."/V,, F d
Ig. C C, ~ 2".f,(1.5 X 10') ara s
4. Voltage gain can be adjusted to any value between 50 and
3000 by connecting an external resistor from Pin 4 to ground
on MC1552, or from Pin 3 to ground on MC1553, as shown in
FtGURE 3 - TEST CIRCUIT
V."/V" F d
Ig.5d C'~2".f,(3
x 10'1 ara s
F'
FIGURE 4 - PULSE RESPONSE DEFtNITIONS
( 0.1!
~
e........._-;I-_-o-l
50
Figure 8. Under these conditions, the following equations
must be used to determine CI and C2 rather than the circuits
1
Yin
0.5 V"
Vout
Ik
5
§
0.9VP
0.5 Vp
0.1 Vp
8-287
MC1552G, MC1553G (continued)
TYPICAL CHARACTERISTICS
TA =+25°C
FIGURE 6 - VOLTAGE GAIN versus FREQUENCY
FIGURE S. - FREQUENCY RESPONSE
0
60
t=Curv. IA
2A
4A
3A
VQut
V;,
0
0
28 I-
IB
I-
oFf1'
IC
I-
10
f1'
F;t
3C
20 f-f-
3D
2C
~B
38
'rI-
~
200
4C
100
40
50
V+ -:; +6~de
Rs 500
.1,,[ II~ 400
Voo,/V;,
400
40
z
~
~
r-,.
200
100
~
50
~r-..
-
30
~
.i
~
20
\'
0
10
0
10
100
Ik
M
4k 10k
lOOk
f, FREQUENCY IHzI
0
0.1
100 M
10M
TEST CIRCUITS FOR FREQUENCY RESPONSE
C, I FI
C, { FI
IA
IB
IC
10
0.1
0.1
0.1
0.1
250
150
70
40
Curve No.
C, I FI
2A
26
2C
2D
0.01
0.Q1
0.01
0.01
IpFI
1000
1000
1000
1000
100
100
100
100
3A
36
3C
3D
4A
4B
4C
4D
C, I,F)
30
18
8.0
4.0
3.0
1.8
0.8
0.4
0.3
0.18
0.08
0.04
FIGURE Sc - CAPACITIVE COUPLED INPUT IRs V
/V
9
8.0
FIGURE 12 - GAIN = 400
2
2
~
;0
5
~
6.0 :;;
1
FIGURE 11 - GAIN = 200
5
I
1
t, FREQUENCY (MHzl
2. 1~
" i\.
~
V
0
1.0
70 100
1
r"'-I'-
I
t, FREQUENCY IMHzl
8
/
~
8
c.!}o.
50
II
f..- I-
§ o. 4
I o.
2
1
Cp
r-
500 700 1000
MC1554G
MC1454G
'\
POWER AMPLIFIER
'-_ _ _ _ _- - - - - 1
1-WAiTT
POWER AMPLIFIER
INTEGRATED CIRCUIT
MONOLITHIC 1-WATT POWER AMPLIFIERS
MONOLITHIC
SILICON EPITAXIAL PASSIVATED
... designed to amplify signals to 30()'k Hz with
1·Watt delivered to a direct coupled or capac·
itively coupled load.
•
Low Total Harmonic Distortion - 0.4% (Typ)
•
Low Output Impedance - 0.2 Ohm
•
Excellent Gain - Temperature Stability
@
1 Watt
METAL PACKAGE
CASE 6028
(bottom view)
Pin 7 con-nected to case
VOLTAGE GAIN _ _ FREQUENCY CRL • 16 OHMSI
5
0
~
z
5
;;:
:::
20
"'<~
15
o
Gain Option #1
AV =36VIV
,... ~
ri.ln 10lpt;on #2
AV =18 VIV
,... ~
Gain Option
DlJ
AV =10VIV
./
'3
.1
V
>
jl0
Pout' 1.0 W(rm.)
5.0
V+. 16 V
(Se. Figl" 7) I
ftL' 16 OHMS
0
10
100
!.Ok
2.0 k
lOOk
10k
5.Ok
1.0 M
f. FREQUENCY (Hz)
MAXIMUM AVAILABLE OUTPUT POWER
CSINEWAVEI
CIRCUIT SCHEMATIC
8
I
6
0.5 A PEAK CUtftiN
4
II.OW
Ill'll' 1
J-~..-..j-----J-+--~""''''''''''.J1'''
~~{~:~~-~-~
... ",.~:t==:t:=~j
;}~~
2
~75W
0
0.,""
0
0
3!'
1.0
'---+---....- -..-~~4---O' ,-
2.0
'/1/V /
,/
,/
V-
...... f."'"
./
-
~O
10
20
RL. LOAD RESISTANCE (OHMS)
See Packaging Information Section for outline dimensions.
8-290
V
/
ii'
....... ~
~
~
O.lIW
4. 0
V VII
1.5:wf'
50
100
MC1554G, MC1454G (continued)
ELECTRICAL CHARACTERISTICS (TC = +25 0 C unless otherwise noted)
Frequency compensation shown in Figures 6 and 7.
36
THO
"
5
5
GO
mVIV
-40
mVIV
Pin Connection
-To obtain the voltage OIIin characteristic desired, ute the following pin connections: Voltage Gain
10
18
36
-40
Pin. 2 and 4 open, Pi" 5 to ae: ground
Pins 2 and 5 open. Pin 4 to Be ground
Pin 2 connected to Pin 5. Pi" 4 to ac ground
Characteristic DefinitioM
(Linear Operation)
FIGURE 4
FIGURE 3
FIGURE 1
+IV
+16V
o
+I6Y
K!.
open
~'~rY'
!.
~
I
-8Y
V+
''''
12Y"
L-.i...
8-291
H,
7
FIGURE 5
.__ ~_f-ov"
9
v-
":"
V.u,(dcl
MC1554G, MC1454G (continued)
MAXIMUM RATINGS (TC
= +25 0 C unless otherwise noted)
Rating
Symbol
Value
Iv+1 + lv-I
18
Vdc
Peak Load Current
lout
0.5,
Ampere
Audio Output Power
Pout
1.8
Watts
Po
l/eJA
600
4.8
mW
mW/oC
Po
1.8
14.4
Watts
mW/oC
TA
o to +70
-55 to +125
°c
T stg
-55 to +150
°c
Total Power Supply Voltage
Unit
Power Dissipation (package limitation)
TA' +250 C
Derate above 2SoC
TC' +250 C
Derate above 25°C
1/8JC
Operating Temperature Range
MC1454
MC1554
Storage Temperature Range
TYPICAL CONNECTIONS
FIGURE 6 - SPLIT SUPPLY OPERATION VOL TAGE
GAIN (AV)· 10, fLOW ",25 Hz
v'
FIGURE 7 - SINGLE SUPPLY OPERATION VOLTAGE
GAIN IAV}' 10, fLOW'" 100 Hz
v,
39 pF
39 pF
RECOMMENDED OPERATING CONDITIONS
In order to avoid local VHF instability. the following set of rules must be
adhered to:
1. An R·C stabilizing network (0.1 /LF in series with 10 ohms) should be
placed directly from pin 9 to ground, as shown in Figures 6 and 7, using
short leads, to eliminate local VHF instabitity caused by lead inductance
to the load.
2. Excessive lead inductance from the V + supply to pin 10 can cause high
frequency instability. To prevent this, the V + by-pass capacitor should
be connected with short leads from the V + pin to ground_ If this capacitor is remotely located a series R·C network (0.1 p.J and 10 ohms) should
be used directly from pin 10 to ground as shown in Figures 6 and 7_
3. Lead lengths from the external components to pins 7, 9, and 10 of the
package should be as short as possible to insure good VHF grounding
for these points.
Due to the large bandwidth of the amplifier, coupling must be avoided be·
tween the output and input leads. This can be assured by either (a) use of
short leads which are well isolated, (b) narrow-banding the overall amplifier
by placing a capacitor from pin 1 to ground to form a low-pass filter in combination with the source impedance, or (c) use of a shielded input cable. In
applications which require upper band· edge control the input low-pass filter
is recommended.
TYPICAL CHARACTERISTICS
FIGURE 8 - TOTAL HARMONIC DISTORTION
venus LOAD RESISTANCE
3.0
~ 2.5
~
o
i5
u
~
."
~
1.5
....... 1.0
...g
...g
f'" 1 kHz
V -3SVIV
1', A1/1
~J
~
t; 2.0
~
~
lion
°
5.0
7.0
~
~
--90% MAX POWER O'UTP'UT
0
I
~v~IJ.I~I~_lslil
i5
u
.J ' ....
~
~ U,lll~ -Jl
I 1111111
I. 5
In
.........
Z I.
0
~
r:::: ~ ~
~- ~ r-.
10
A1V
0
-10% MAX POWER OUTPUT
Av-1SVIV
11~i'oo
FIGURE 9 - TOTAL HARMONIC DISTORTION
versus FREOUENCY
z
-
~. A
I'-- ~ :--'1"00 ...
5
2.0
20
..
:-- ...
."....
30
°
0
t--b
50
70
100
RL. LOAD RESISTANCE (OHMS)
o
10
AV-1S, RL -lSil
..
AV-10. RL -lOil
100
liillltr'r
Pout'" t W (rms)
1.0 k 2.0 k 5.0 k 10k
f. FREQUENCY 1Hz)
8-292
I--
Av-1S. RL -lOil
...~ O. 5
...g
'
-
lOOk
MC1554, MC1454G (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - VOLTAGE GAIN va....1 TEMPERATURE
FIGURE 11 - OUTPUT VOLTAGE CHANGE
1+4·0
a
-;;
.2
z
'"
AV'36~1V
4a
5 ___
3
z
«
" +2.0
~
a
'"~
~ 25
...
"'"'"
w
g
:>
«
o
>
2a
o
i3 -2.0
AV"0VIV
a
~
/
f-
ffl
:;
5.0
-55
0
~
...z
AV"8VIV
15
a
RL '16 OHMS
v+·aVde
V-· -8Vde
(See Figure 6) _
w
5
d
-25
25
75
50
~ -4.0
125
100
~
-25
-55
25
TA. AMBIENT TEMPERATURE (DC)
50
75
100
125
TA. AM81ENT TEMPERATURE (DC)
FIGURE 12 - VOLTAGE GAIN Vonul FREQUENCY (RL _00)
5
AV -36VIV
0.,.....-:
~
z
"'"
AV "aVIV
25 ;"
AV "0VIV
:;: 2a."
~o
5
>
i1 a
Rl = GO
Vout '12 Vp·p
V+. 16 V
(See Figure 7)
5.0
0
10
100
1.0k
2.0k
5.0 k
10k
lOOk
f. FREQUENCY (Hz)
FIGURE 13 - MAXIMUM OEVICE OISSIPATION
(SINE WAVE)
2. 0
8
r'
ABS LU E AXI
.........
DEVI E DISS P
I
25 -
~\.
t',r--
z 1. 0
o
40
;::
f
O. 7
"-
~
"-
i5 O. 5
'"~
~
"'\.
['\.'\
'\.
o. 3
'\
;;!
ffi
...
'\
\
O.
1
10
12V
2.0
5.0
10
20
RL. LOAD RESISTANCE (OHMS)
8-293
60 ~
80
!Z
~
50
::Ii
125 ~
SUPPLyV~LTt?~·n;I+IV-II.,v~.J
1.0
~
~~ ~
t4V 100!
o. 2
!!
.P
1av
16V
u
100
a'
1
60
ii:'
76
~
90
w
110
5
~
125 ...
1.0M
~f
MC1555
MC1455
~~~_______________T_IM_I_N_G_C_I_R_C_U_IT__~
Specifications and Applications
InforIIlation
TIMING CIRCUIT
MONOLITHIC TIMING CIRCUIT
MONOLITHIC SILICON
INTEGRATED CIRCUIT
a
The MC1555/MC1455 monolithic timing circuit is highly stable
controller capable of producing accurate time delays, or oscillation.
Additional terminals are provided for triggering or resetting if desired.
In the time delay mode of operation, the time is precisely controlled
by one external resistor and capacitor. For astable operation as an
oscillator, the free running frequency and the duty cycle are both
accurately controlled with two external resistors and one capacitor.
The circuit may be triggered and reset on falling waveforms, and
the output structure can source Or sink up to 200 rnA or drive
MTTL circuits.
• Direct Replacement for NE555/SE555 Timers
• Timing From Microseconds Through Hours
• Operates in Both Astable and Monostable Modes
• Adjustable Duty Cycle
• High Current Output Can Source or Sink 200 rnA
• Output Can Drive MTTL
• Temperature Stability of 0.005% per °c
• Normally "On" or Normally "Off" Output
PI SUFFIX
PLASTIC PACKAGE
CASE 626
(Top View)
(MCI455PI only)
0
1. Ground
5
1
4
2. Trigger
3. Output
4. Reset
5. Control Voltage
6. Threshold
7. Discharge
B. VCC
FIGURE 1 - 22-SECOND SOLID-STATE TIME DELAY AELAY CIRCUIT
G SUFFIX
METAL PACKAGE
CASE 601
(Top View)
1. Ground
"
"
"
'4
2.
3.
4.
5.
6.
7.
Trigger
Output
Aeset
Control Voltage
Threshold
Dlscharg_
B. VCC
--
TYPICAL APPLICATIONS
Time Delay Generation
Sequential Timing
Linear Sweep Generation
See Packaging Information Section for outline dimensions.
---
Precision Timing _ Missing Pulse Detection
Pulse Generation _ Pulse Width Modulation
Pulse Shaping
Pulse Position Modulation
-
8-294
MC1555, MC1455 (continued)
MAXIMUM RATINGS
(TA
= +250 e
Rating
Power Supply Voltage
Discharge Current (Pin 7)
Power Dissipation (Package
limitation)
Metal Can
Derate above T A = +25 0 e
Symbol
Value
Unit
Vee
+18
Vdc
17
200
mA
680
4.6
625
5.0
mW
mW/oe
mW
mwf>e
ue
Po
Plastic Dual I n-line Package
Derate above TA = +25 0 e
Operating Temperature
Range (Ambient)
TA
Me1555
Me1455
Storage Temperature Range
FIGURE 3 - GENERAL TEST CIRCUIT
unless otherwise noted.l
-55 to +125
o to +70
T stg
ELECTRICAL CHARACTERISTICS
-65 to +150
Test Circuit for Mea.uring de Parameters:
(to set output and mealure parameters)
al. When Vs
b). When
Vs
~
Va
Vee. Va
2/3 Vee.
S 113
is low.
is high.
c). When Va is low, pin 7 sinks current. To test for Reset,
set Va. hIgh, applv Reset voltage, and test for current
flowing into pin 7. When Reset is not in usa, it should
be tied to Vee-
°e
(T
Characteristics
Supply Current
Vee = 5.0V. RL =00
Vee = 15 V, RL =00
Low
(Note 1)
Timing Error (Note 2)
RA, RB = 1.0 kn to 100 kn
I nitial Accuracy e = 0.1 "F
Voltage Low
(Vee = 15V)
Isink = 10 mA
Isink = 50 mA
Isink = 100 mA
Isink = 200 mA
(Vee = 5.0V)
Isink = B.O mA
Isink = 5.0 mA
V
0.1
0.4
2.0
2.5
0.1
0.15
0.5
2.2
0,25
12.5
NOTES:
1. Supply current when output is high is typically 1.0 mA less.
2. Tested at Vce = 5.0 V and Vee = 15 V.
3. This will determine the maximum value of RA +. RB for 15 V operation.
The maximum total R = 20 megohms.
8-295
MC1555, MC1455 (continued)
TYPICAL CHARACTERISTICS
(T A = +25 0 C unless otherwise noted,)
FIGUR E 5 - SUPPLY CURRENT
FIGURE 4 - TRIGGER PULSE WIDTH
10
150
+2h
12 5
~
E.
100
'"fQ
~
ii:
-J:
-
0/
~'
/
V
-
+25 0 C
I
1.2
~ 1.0
~ 0.8
r-
5V"VCC,,15V
0.2
o
5.0
0.1
0.2
0.3
0.4
VTlminl, MINIMUM TRIGGER VOLTAGE
IX VCC Vdcl
./
I-
+125 OC
0.4
+10oC
o
I-"'"
> 0.6
+'t'lOC
\
V
-650C
1.4
~
r.
-55°C
IP'
1.B
1.6
~
...-: ~
5~ P'"
o
Al~
QOC
2.0
~
Al~ ~oc
~
./
5
~
FIGURE 6- HIGH OUTPUT VOLTAGE
1.0
15
10
VS, SUPPL Y VO LTAG E (Vdcl
II
o
2.0
5.0
10
20
50
100
Isource(mA)
0
FIGURE 7 - LOW OUTPUT VOLTAGE
@ Vee = 5.0 Vdc
FIGURE 8 @
10
LOW OUTPUT VOLTAGE
Vee = 10 Vdc
0
FIGURE 9 - LOW OUTPUT
VOL TAGE @ Vec = 15 Vdc
10
II
I
-55°C:;::;
f/
~ 1.0
If
2!
-"
Q
>
2.0
5.0
10
+25 0 C
1. 0
0
iJ/'
0.1
0.01
1.0
~C
f
iq
~
+1250C~
o. 1
20
50
-55°C
1.0
~5OC
2.0
5.0
ISINK, ImAI
10
50
0.0 1
1.0
100
2.0
-55°C
~
5.0
10
20
50
100
Isink, (rnA)
Isink, (rnA)
FIGURE 11 - DELAY TIME
versus TEMPERATURE
FIGURE 10 - DELAY TIME
versus SUPPLY VOLTAGE
+25°~
+125 0 C
20
J
IlL
o. 1
~5OC
0.0 1
1.0
100
nryIJ~125OC
FIGURE 12 - PROPAGATION DELAY
versus TRIGGER VOLTAGE
1.015
1.015
300 r----r--r---r--r---r--.........,..-,
l:tj 1.010
~ 1.010
N
!250~~-~~-~~~.-~~
«
;::
Q
~
«
!5
1.005
z
~
f-
1.000
>-
«
~
0.995
::E
a;
\
\
---
r-
k-- f--
1.005
Q
~
Z
~ 1.000
;::
>-
~
Q
~
::E
~
\
::E
-r-
-
~ 200
r--
0.995
Q
r-
-
~ 0.990
0.990
5.0
10
15
VS, SUPPLY VO LTAGE IVdcl
20
0.9B~75
Q
~150~~~F=-b~59Yr-r--r~
~
~100~~~~~-r--r-r--r~
~
0.
].
-50 -25
0
,0
+25 +50 +75 +100 +125
TA, AMBIENT TEMPERATURE lOCI
VT(min), MINIMUM TRIGGER VOL TAGE
IX Vce Vdc)
0
8-296
MC1555, MCl455 (continued)
FIGURE 13 - CIRCUIT SCHEMATIC
CONTROL VOLTAGE
GENERAL OPERATION
The MC1555 is a monolithic timing circuit
~hich
A reset pin is provided to discharge the capacitor thus interrupting the timing cycle. As long as the reset pin is low, the capacitor discharge transistor is turned "on" and prevents the capacitor
from charging. While the reset voltage is applied the digital output
will remain the same. The reset pin should be tied to the supply
voltage when not in use.
uses as its
timing elements an external resistor - capacitor network. It can
be used in both the monostable (one-shot) and astable modes
with frequency and duty cycle controlled by the capacitor and
resistor values. While the timing is dependent upon the external
passive components, the monolithic circuit provides the starting
circuit, voltage comparison and other functions needed for a complete timing circuit. I nternal to the integrated circuit are two
comparators, one for the input signal and the other for capacitor
voltage; also a flip-flop and digital output are included. The com-
parator reference voltages are always a fixed ratio of the supply
voltage thus providing output timing independent of supply voltage.
FIGURE 14 - MONOSTABLE CIRCUIT
+Vcc 15 to 15 V)
Monostable Mode
>
tL
In the monostable mode, a capacitor and a single resistor are
used for the timing network. Both the threshold terminal and the
discharge transistor terminal are connected together in this mode,
refer to circuit Figure 14. When the input voltage to the trigger
comparator falls below 1/3 Vee the comparator output triggers
the flip-flop so that it's output sets low. This turns the capacitor
discharge transistor "off" and drives the digital output to the high
state. This condition allows the capacitor to charge at an exponential rate which is set by the RC time constant. When the
capacitor voltage reaches 2/3 Vee the threshold comparator resets
the flip-flop. This action discharges the timing capacitor and returns the digital output to the low state. Once the flip-flop has
been triggered by an input signal, it cannot be retriggered until
the present timing period has been completed. The time that the
output is high is given by the equation t = 1.1 RA C. Various
combinations of Rand C and their associated times are shown in
Figure 16. The trigger pulse width must be less than the timing
period.
Reset
I
I
I
I
I
I
I
8-297
Discharge
2
Trigger
I
3
,
Output
:,:RL
8
4
I
7
MC1555
MC1455
0.01 IlF
I
Control
Voltage
MC1555, MC1455 (continued)
GENERAL OPERATION (continued I
FIGURE 15 - MONOSTABLE WAVEFORMS
FIGURE 17 - ASTABLE CIRCUIT
+VCC(5 to 15 VI
!
,::RL
I
I
4
I
8
I
I
I
I
I
I
Output I
t ... 50 Jjl/cm
(RA = 10 kn. C = 0.01 jlF. RL = 1.0 kn • VCC
1/
1/
10
/
/
~fL ~
;;
,~
1
0.01 /
/
1/
/
/
1/
0.001 /
lOll'
1/
1/
FIGURE 18 - ASTABLE WAVEFORMS
l/
/
/
/
'/
/
/
5
= 15 VI
FIGURE 16 - TIME OELAY
100
MC1555
MCI455
3
/
./
./
/
/
L
/
,.0/
,<:$
~ r--~
I'
/
/
1/
/
/
/
1/ /
1/
1/ 1/ 1/
100.,
1.0m.
lOms
lOOms
1.0
10
100
'd. TIME DELAY (s)
t ==
(RA
Astable Mode
20 J.lslcm
=5.1 kn.C ~ 0.01 jlF. RL = 1.0kn;
RB = 3.9 kn. VCC = 15 VI
In the astable mode the timer is connected so that it will
retrigger itself and cause the capacitor voltage to oscillate between
1/3 Vce and 2/3 Vee. See Figure 17.
The external capacitor charges to 2/3 Vee through RA and RB
and discharges to 1/3 Vce through RB. By varying the ratio of
these resistors the duty cycle can be varied. The charge and
discharge times are independent of the supply voltage.
The charge time (output highl is given by: tl = 0.695 (RA +RB) C
The discharge time (output lowl by: t2 = 0.695 (RB) C
Thus the totel period is given by: T = tl + t2 = 0.695 (RA+2RBI e
The frequency of osciliation is then: f
FIGURE 19 - FREE·RUNNING FREQUENCY
100......,--.""'r-....~-,..---,---r---,
10~--+~-~~-~.--;---r---1
=!. =
1.44
T (RA+2RBle
and may be easilv found as shown in Figure 19.
.
RB
The duty cycle is given by: De = RA+2RB
To obtain the maximum duty cyete RA must be 8S small as
possibla; but it must also be large enough to limit the discharge
current (pin 7 currentl within the maximum rating of the discharge
transistor (200 mA I.
Thli minimum velue of RA is given by:
;;. Vee (Vdc) ;;. Vee (Vdcl
RA
-0-.2--
I"7iAl
8-298
MC1555, MCl455 (continued)
APPLICATIONS INFORMATION
Missing Pulse Detector
Linea, Voltqe Ramp
In the monostable mode, the resistor can be replaced by a con-
The timer can be used to produce an output when an input
pulse fails to occur within the delav of the timer. To accomplish
this, set the time delav to be slightlV longer than the time between
successive input pulses. The timing cycle is then continuously reset
stant current source to provide a linear ramp voltage. The capacitor still charges from 0 to 2/3 Vcc. The linear ramp time is given
bV
_ 2
t-
3
VCC
-1-
by the input pulse train until a change in frequency or a missing
pulse allows completion of the timing cycte. causing a change in
where I = Vcc - Ve - VeE
If VB is much larger than VBE,
RE
then t can be made independent of VCC.
the output level.
FIGURE 20 - LINEAR VOLTAGE SWEEP CIRCUIT
FIGURE 22
+Vcc (5 to 15 VI
Vcc
4
B
Rl
3
2N4403
Output
2
MC1555
MC1455
Trigger
6
5
Reset
2
2N4403
or Equiv
r"~
Input
FIGURE 21 - LINEAR VOLTAGE RAMP WAVEFORMS
eRE -10 k!l., R2 -100 k!l., Rl = 39 k!l., C =O.OlI'F, VCC = 15 VI
FIGURE 23 - MISSING PULSE OETECTOR WAVEFORMS
eRA = 2.0 k!l., RL = 1.0 k!l., C = O.lI'F, VCC = 15 VI
-
CapacItor Voltage
: 20 V'cm
/
t
t = 500 IJ,s/cm
= 100 ,../.S/em
8-299
I
MC1555, MC1455 (continued)
APPLICATIONS INFORMATION (continued)
Pulse Width Modulation
FIGURE 25 - PULSE WIDTH MODULATION WAVEFORMS
(RA 10 kf!, e
0.02 jJF, Vee ~ 15 VI
=
If the timer is triggered with a continuous pulse train in the
=
monostable mode of operation, the charge time of the capacitor
can be varied by changing the control voltage at pin 5. I n this
manner, the output pulse width can be modulated by applying
a modulating signal that controls the threshold voltage.
FIGURE 24
+Vcc (5to 15 VI
RL
RA
4r:
3
o
7
t::
utput
MC1555
MCl455
2
±
5
Modulatio
Test Sequences
Input
Several timers can be connected to drive each other for sequential timing. An example is shown in Figure 26 where the sequence
is started by triggering the first timer which runs for 10 ms. The
C lock
nput
1
0.5 ms/cm
C
6
output then switches low momentarily and starts the second timer
which runs for 50 ms and so forth.
-=
FIGURE 26
VCC (5 to 15 VI
27 k
9.1 k
8
~~
f-oMC1555
MCl455
7
~
0.001 jJF
2
1
0.05jJF
1 0.•11 jJF
-
MC1555
MC1455
Load
I
4
0.01 jJ F
6
.........0-
~t--:l
3
2
3
7
8
0.01 jJF
6
r--or--o-
18.2 k
4
8
5 0.01 jJF
6
27 k
9.1 k
4
7
.........0-
~I
MC1555
MC1455
2
-=
3
"
--0-
0.001 jJF
1
o.
-
8-300
Load
I
1
oljJF
-
Load
'\
OPERATIONAL AMPLIFIERS
MC1556G "---------~
MC1456G
MC1456CG
INTERNALLY COMPENSATED, HIGH PERFORMANCE
MONOLITHIC OPERATIONAL AMPLIFIER
... designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components. For detailed information, see Application Note AN-522.
•
Low Input Bias Current - 15 nA max
•
•
Low Input Offset Current - 2.0 nA max
Low Input Offset Voltage - 4.0 mV max
•
Fast Slew Rate - 2.5 VIJ.l.s typ
•
Large Power Bandwidth - 40 kHz typ
•
Low Power Consumption - 45 mW max
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
EPITAXIAL PASSIVATED
CASE 601
TO-99
'~
• Offset Voltage Null Capability
• Output Short-Circuit Protection
• Input Over-Voltage Protection
8
(bottom view)
TYPICAL INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT versus TEMPERATURE for MC1556G
20
=i1
Eo-
r-r-....
0-"
"w
w'"
",,,,
",=>
=>u
~
tu
~~
10
......
~
0-°
=>0-
"-=>
,,"-
-"
Ej
VOLTAGE-FOLLOWER PULSE RESPONSE
MC1456G'-l
MC1456Ci
INPUT BIAS CURRENT
.......
r--- r--t-
INPUT OFFSET CURRENT
-55
-25
+25
+50
+75
TA, AMBIENT TEMPERATURE lOCI
+100
+125
2 ",/DIVISIDN
CIRCUIT SCHEMATIC
EOUIVALENT CIRCUIT
OFFSET
ADJUST
INVERTING
Vout
I--_--j-O
Vout
V-
Se. Packaging Information Section for outline dimensions,
8-301
MC1556G, MC1456G, MC1456CG (continued)
MAXIMUM RATINGS
= +250 C unless otherwise noted)
Power Supply Voltage
Input Bias Current
TA - +250C
T A '" Tlow to Thigh {See Note 1)
I"put Offset Current
TA - +250 C
T A - +2SoC to Thigh
TA ". Tlow to +25 0C
Input Offset Voltage
TA = +250 C
T A - Tlow to Thigh
Oitferentiallnput Impedince (Open·Loop. f = 20
75
75
sPower Supply Current
10+
10-
DC Quiescent Power Dissipation
11
IVou,-OI
NOD 1: Tlow:
00 for MC1456G and MC1456CG
-6SoC for MC1556G
Thigh: +7SoC for MC1456G and MC1466CG
+12150 C for MCH566G
8-302
1.3
1.3
4.0
4.0
mAde
40
120
mW
MC1556G, MC1456G, MC1456CG (continued)
TYPICAL CHARACTERISTICS
(V+ = +15 Vdc, V-
= -15 Vdc, T A = +25 0 C unless otherwise noted)
FIGURE 2 - SPECTRAL NOISE DENSITY
FIGURE 1 - INPUT COMMON·MODE SWING versus
POWER SUPPl Y VOLTAGE
~
"
Z.
24
'"
~w
21
.
'"
~
">
w
""
'"Z
"'"
'"'""
300
......
18
15
./
6.0
.....-
I-
~ 3.0
c
:>
,/
>
::;
w
g
I-
f=
5.0
±9.0
±12
±15
±18
±21
r-
6
VM
3
-
~
,
o
4 8W" 10 Hz
·15V,,, '."'0/316
10
±24
........
7
~~ +
100
10 k
1.0 k
lOOk
t, FREQUENCY (Hz)
FIGURE 4 - OPEN·lOOP VOLTAGE GAIN
versus TEMPERATURE
FIGURE 3 - COMMON·MODE REJECTION
RATIO versus FREQUENCY
500 k
"-
z
80
~
"'-1""-
Ul
~C1456b
;- 400 k
;;:
MC1456CG
,/
'"w
/
"
>
1""- '\
'i'
z
,/
'"~ 300k
"\
60
"~
r.~r'
•
'w k
10
d
,/
±6.0
100
w
1M
..
~
V+, V', POWER SUPPLY VOLTAGE (Vdc)
120
'"w
g
30
I-
3.0
±3.0
'"'"
"t;
50
z
V
;!;
"~
w
'"0
/V
9.0
100
~
/v
12
~
"-
g
~
"...l lOOk
"-"\
40
"'"
~
200k
V
....---
V
"
~
~ 20
10
1.0
100
1.0 k
10 k
100 k
1.0 M
10 M
-75
100 M
-50
-25
+25
TA, AM81ENT
t, FREQUENCY (Hz)
FIGURE 5 - OPEN·lOOP FREQUENCY RESPONSE
'"
'"..
"
.."
400 k
+120
~ 350k
~
+60
+125
+150 +175
~ 300k
w
~
~
+40
~
> +20
~
100
250 k
~
200 k
"g
t5Dk
~
1.0k
10k
~ lOOk
~
·20
10
:i!
~
...l
1.0
+100
z
w
>
+75
TEMPERATURE (OC)
FIGURE 6 - OPEN·lOOP VOLTAGE GAIN
versus SUPPLY VOLTAGES
+140
~ +100 b-z
;;: +80
+50
lOOk
t, FREQUENCY (Hz)
...l
"
1.0M
"
~
10M
100M
---
~
50k
H.O
±10
±-15
V+, V-, SUPPLY VOLTAGES (Vd,)
8·303
±20
±25
MC1556G, MC1456G, MC1456CG (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 7 - OPEN-LOOP PHASE SHIFT
FIGURE 8 - OUTPUT SHORT-CIRCUIT CURRENT
versus TEMPERATURE
~
-45
"U
1'\
\
::;j!
oS 45
I-
ffi
'"~
1\
'"ffi
e
'-'
'"
t;:
~ -90
w
00
«
il:
I-
~
~
~
\
<>-135
~
-180
10
100
1.0k
10k
lOOk
f. FREQUENCY (Hz)
tOM
JCI456b
MCI456CG
40
35
30
25
---
20
"~
15
~
I-
10
I-
1.0
50
'"
10M
..
~
20
L
~
100M
-75
~
>
I-
:::>
:=
16
12
-25
+25
+50 +75 +100 +125
TA. AMBIENT TEMPERATURE (OC)
Q}II
40
10k 2 _
1\
7
3
~
9.1 k
c-~
I
1.0
+175
/
b-Vou,
4 V-
RL
~
d
V
V/
VIsu~pLlk~
±Iiv JuJpJIJsl
~
",.::::> 8.0 r1--3
>"
4.0 ro
+150
1 1
±18 V SUPPLIES
II
6
+
r-
r--2
:::>
-50
FIGURE 10 - OUTPUT VOL TAGE SWING ve,sus
LOAD RESISTANCE
to
"
t---
SO~RCE
:::>
28
24
~
,,_ 5.0
FIGURE 9 - POWER BANOWIOTH
c:
r-
+
6
4
-15V
I-- Vou '
,/
2k
"-
~
II 1111
10
--
"1.0 k
100
100
f. FREQUENCY (kHz)
TA = 25°C
THD< 5%
V ...
fTkr'
200
1.0 k
500
FIGURE 11 - POWER DISSIPATION ve,sus
POWER SUPPLY VOLTAGE
100
70
50
~ 40
oS 30
z
20
i=
,.
V"
"
is
Vout = 0
~,/
:t
~
2.0k
RL, LOAD RESISTANCE (OHMS)
10
7.0
5.0
~ 4.0
3.0
'"~
L
&?
2.0
±2.o
H.O
±6.0 ±8.0 ±1O ±12 ±14 ±16
V+. V-. POWER SUPPLY VOLTAGE (Vdc)
8-304
±18
±20
±22
5.0 k
10 k
MC1556G, MC1456G, MC1456CG (continued)
TYPICAL APPLICA nONS
Where values are not given for external components they must be selected by the
designer to fit the requirements of the system.
FIGURE 12 - INVERTING FEEDBACK MODEL
FIGURE 13 - NON·INVERTING FEEDBACK MODEL
lout
t
lin
1 + Z2/Z1
Zout"" Zo
An
(w)
Zout- O
FIGURE 14 - LOW·DRIFT SAMPLE AND HOLD
+15 V
SWITCH
>---o-~_
eout
*Drift due to bias current
SAMPLE
COMMAND
is typically 8 mV Is
·15V
FIGURE 15 - HIGH IMPEDANCE BRIDGE AMPLIFIER
10k
10H
10 k
Va=-lOVin
100 k
8-305
MC1556G, MC1456G, MC1456CG (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 16 - LOGARITHMIC AMPLIFIER
FIGURE 17 - VOLTAGE OFFSET NULL CI RCUIT
MC1456, C
MC1556
100 k
>--0---+-_ Vou l
Vout =Kiln IK2Vin)
33 k
OFFSET
ADJUST
See Application Note AN-261 for further detail.
FIGURE ·18 - HIGH INPUT IMPEDANCE, HIGH OUTPUT
CURRENT VOLTAGE FOLLOWER
Vin .....--0----1
Vaut
lin ~ 250Mn
::;t;: 470 pF
L--1~------"""'---"""_ V-
8-306
lo = 100"11
10 = 100 mA Imax)
MC1558
MC1458
MC1458C
l ______
O_P_E_R_A_T_'_O_N_A_L_A_M_P_L_'_F'_E_R_S--'
(DUAL MC1741)
DUAL MC1741
INTERNALLY COMPENSATED, HIGH PERFORMANCE
MONOLITHIC OPERATIONAL AMPLIFIER
DUAL
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier, integrator. or amplifier
with operating characteristics as a function of the external feedback
components.
•
No Frequency Compensation Required
•
Short·Circuit Protection
GSUFFIX
METAL PACKAGE
CASe 601
• Wide Common·Mode and Differential Voltage Ranges
•
Low-Power Consumption
•
No Latch Up
LSUFFIX
CERAMIC PACKAGE
CASE 632
TO-tt6
FIGURE 1- TYPICAL FREQUENCY-5HIFT
KEYER TONE GENERATOR
PI SUFFIX
PLASTIC PACKAGE
CASE 626
MC1458,C (only)
P2 SUFFIX
PLASTIC PACKAGE
CASE 646
MCl458,C (only)
PIN CONNECTIONS
SchematiC
G & Pl Package$.
L&P2Packages
ABC
H
I
J
0
G
2
56--78
K
L
2345678910111214
0.5 ms/DIV.
FREQUENCY
SHIFT
OUTPUT
-15V
-15 V
+15 V
I.
1k
See Packaging Information Section for outline dimensions.
See current MCCF1558/1458 data sheet for flip-chip information.
8-307
MC1558, MC1458, MC1458C(continued)
MAXIMUM RATINGS (TA =+250 C unle.. otherwise noted)
Power Supply Voltage
Input Bias Current
TA = +250 C
T A = Tlow to Thi9h@
Input Offset Current
TA = +250 C
mVdc
(V o =±10 V, RL = 2.0 k ohms)
(V o =±10 V, RL = 10 k ohms)
TA = Tlow to
Power Bandwidth
(AV = 1, RL = 2.0 k ohms, TH05:5%. Va" 20 V pop)
RL = 2 k ohms (T A =Tlow to thigh)
Average Temperature Coefficient of Input Offset Voltage
(RS '" 50 ohms, T A"" Tlow to Thigh)
Power Supply Sensitivity
/lVIV
V- "" constant, Rs ~ 10 k ohms
V+ = constant, Rs
30
30
s: 10 k ohms
Power Supply Current
2.3
2.3
8.0
8.0
70
240
mAde
mW
DC Quiescent Power Dissipation
(V o = 0)
5
~
'"
'"
'" +80
.:E
z
<
~ +60
to
'"o~ +40
/
o
g
-
......... ,....--
to
~
~
>
c1 +2 0
~
0
6.0
3.0
12
9.0
15
18
21
~
~
-20
24
10
1.0
100
1.0 k
100 k
10 k
~ 10M
1.0 M
f, FREGUENCY (Hz)
V+ and V-, POWER·SUPPL Y VOLTAGE (VO LTS)
FIGURE 7 - POWER DISSIPATION
versus POWER SUPPLY VOLTAGE
FIGURE 6 - POWER BANDWIDTH
(LARGE SIGNAL SWING versus FREQUENCY)
100
~
70
24~-+-rrH~r--+-rrH~---r~rH~---r~~~
3: 50
~ 20~-+-++4+H*---~-rH+~--+-~++~~-r1-~~
z
o
~ 16~-+-++4tH#---~-rH+~--+-~++H*I\~-r~~~
~~
~ 12~-+-++4+H*---~-rH+~--+-~++H#-~\~\1-~~
~
o
;l 8.0
~
r---
4.0
1111~HO<15%1
,,/
30
2i
/
~ 10
e
I III
I--+-+-l+IIIH-ffi-I I I '-f--r11-H+Hl--+1-H+++t+I---++>Id-ttI+!
01~0--~~~lll~00~-L-LLU~I~.0~k--~~~~1~0~k--~-L~'0~Ok
f, FREQUENCY (Hz)
8-309
Va = 0
I--
/'
20
'"w
(VOLTAGE FOLLOWER)
±15VOLTSUPPlIES ItI---H-+t+tt+l---I\\+rH~
I
/'
E 40
/
7.0
5.0
4. 0
3.0
2.0
/
6.0
10
14
18
v+.nd V-, POWER SUPPLY VOLTAGE (VOLTS)
22
MC1558, MC1458, MC1458C (continued)
TYPICAL CHARACTERISTICS (continued I
(V+ = +15 Vdc, V-
=
-15 Vdc, TA = +2SoC unless otherwise noted.)
FIGURE 8 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
28
~
16
'">
~
12
~ 8.0
>
4.0
VOL
1I
~
V
./
200
OL SUiPLlIES I
/
lOOk
f::
"f-P
~
+
"v
1.0kH,_ 9.1k_
i <1
HD
100
OUTPUT NOISE versus SOURCE RESISTANCE
±li s
±lr I
V
2:: 20
9-
i rrl·
I
24
FIGURE
-
0%
500
1.0 k
Vo
RLe:..
-
5.0 k
2.0 k
10 k
RL, LOAD RESISTANCE (OHMS)
RS, SOURCE RESISTANCE (OHMS)
FIGURE 10 - HIGH-IMPEDANCE, HIGH-GAIN
INVERTING AMPLIFIER
v'
1
1l ·1 1'F
1/2
MC1558
Ik
lO.l
lOOk
IJ F
v-
8-310
POSITIVE VOLTAGE REGULATORS
MC1560, MC1561
MC1460, MC1461
MONOLITHIC VOLTAGE REGULATOR
POSITIVE-POWER-SUPPL Y
VOLTAGE REGULATOR
INTEGRATED CIRCUIT
· .. designed to deliver continuous load current up to 500 rnA without
use of an external power transistor.
•
Electronic "Shut·Down" Control and Short·Circuit Protection
•
Excellent Load Regulation (Low Output Impedance = 20 milliohms
typ from dc to 100 kHz)
•
High Power Capability: To 17.5 Watts
•
Excellent Transient Response and Temperature Stability
•
High Ripple Rejection = 0.002 %/V typ
EPITAXIAL PASSIVATED
• Single External Transistor Can Boost Load Current to Greater
than 10 Amperes
• Input Voltages to 40 Volts (MC1561)
Pin 10 electricallv
connected
TYPICAL APPLICATION
on
~
~
B
R SUFFIX
METAL PACKAGE
CASE 614
4
MC1560/MC1561
5
MC1460/MC14S1
~
>--
Rl
G SUFFIX
METAL PACKAGE
CASE 602A
+Vo
RSC
3
Case is ground terminal
to case
through substrate.
+
4.7 k
Co ;;
flO
Case
1
(101
~
R1
S.Bk
-
-
-
\'' 1
-=-
Select R1 to give desired Vo:
Rl~
(1 Vo - 7.01 kn
CIRCUIT SCHEMATIC
+Vino--?----~----~--------------r_~----------~----------_r--~
3
OUTPUT
60k
4
..~r<> CU R R E N T LI MIT
L-----:-:-,.---+---+~
J-t--~ OUTPUT SENSE
5
r-~--------+----t-----t----t---~9
~_ _~_ _ _ _ _ _ _ _ _ _- J '---l:::::~::~
DC SH 1FT
0UTPUT
__~6 OUTPUT REFERENCE
NOISE FIL TEA
-::i-------------------+---------<.?a
SHUTDOWN o--t~rt-+,.
CONTROL 2
5.0
GND
10·0---·4---~~~_~
_____
~
_______L__ _ _ _ _ _ _ _ _ _ _ _ _
·"G" package - pin 10 is ground. "R" package - case is ground.
See Packaging Information Section for outline dimensions.
8-311
~
DC SH I FT SE NSE
MC1560, MC1561, MC1460, MC1461 (continued)
ELECTRICAL CHARACTERISTICS (TC
= 25°C unless otherwise noted I
Ch.rKteristic Definitions (linear operation)
(Load Current
= 100 mA for "R" Package device,
I
.
Symbol
Characteristic
Min
Typ
Max
I_
(0 to +7So CI
(-5SoC to +12SDC)
(0 to +7S 0 C)
(-S50C to +12S0C)
CONNECTION FOR Va ~ 3.5 V
Minimum Input-Output Voltage
Differential (See Note 21
IASC = 0)
8.5
9.0
8.5
Vref
3.2
MCI560, MC1561
3.5
3.8
2.1
2.1
3.0
5.0
4.0
12
9.0
mAde
MC1460, MCI461
MC1560. MC1661
mV(rms)
0.150
(C n = 0.1 ItF, f: 10 Hz to 5.0 MHz)
RL
Rl
R2
Temperature Coefficient of Output
Voltage (See Note 31
to to +7S0C)
(-55° to +12S0 C)
MCI460, MCI461
MC1560, MCI661
±0.002
±0.002
Operating Load Current Range*
Select R2 to give desired Vo: R2~(2 Vol kn
SelectR1: Rl~(7.0kn-R2)kn
+Vin 7:v17 Vdc
3
;n=1'0v'm;.~
3.0
:
f= 1.0kHZ:!
8
01 FI'3k
. Il ':"
Rl
~ 6.Sk
R2
1
2.7
+Vo = 10 V
Ll
~;
IL~ I
• +-.1.
..
17 -
t--<>-"ICo:r.10I'F
ff,CASEi ':"
RL
':" ':"(10lC n-::0.11'F
Vo
mAdc
IRSC ~ 0.3 ohms) A Package
1.0
1.0
IRSC~2.0ohmsIGPackage
Input Regulation (% change in output voltage
per '-volt change in input voltage)
MC1460, MC1461
volrmslOOO)
Regin = vin trms) Vo Vin Irms)
(See Note
-::-
500
200
0.003
0.002
0.030
0.015
0.5
0.3
0.7
0.4
2.0
1.2
2.4
1.6
0.006
0.01
0.05
0.13
25
16
35
20
100
60
120
80
MCI460
MC1560
80
20
300
50
MC1461
MCI561
140
70
500
150
Regin
MC1560, MC1561
%lVo
41
Load Regulation
T J '" Constant 11.0 mAS' ILS'20 mAl
T C = 25°C ISee Note 51
(1.0mAsILS; SOmA)
+Vln
Vd.
2.7
I.
Output Noise
Vref
Vd.
37
Vd.
MC1460. MC1461
Bias Current (Vin = 15 V)
ilL'" 1.0 mAde. R2"'6.8kn.
IB=lin-1L)
17
32
2.5
2.5
2.5
MC1460, MC1560
MCI461
MCI661
Reference Voltage tVin = 15 Vl
(Pin 8 to ground)
20
20
35
40
9.0
MCI460
MC1660
MC1461
MCI661
Output Voltage Range
Units
Vd.
Input Voltage (See Note 1)
(Rse = 2.7 ohms unlltSl otherwise noted)
dl
= 10 rnA for "G" Package device, un ess otherwise note
mV
Regload
MCI460
MCI660
MC1461
MC1561
R Package
G Package
%
+Vo 5.0 _mArms
Output Impedance (See Note 61
IRSC = 1.0 ohms, f= 10 kHz, Vin '" 14 Vdc)
Zout
MC1460
MC1560
(I L = 25 mAdc for G Package)
I",
Shutdown Current
(Vin = 20 Vdc)
I
(Vin = 35 Vdc)
MCI461
MCI561
millioAms
I'Adc
Isd
*Operating load Current is also limited by dc Safe Operating Area lsee Figures 15A.8nd 1581. Care must be taken not to exceed the dc Safe Operating Area at any time.
8-312
MC1560, MC1561, MC1460, MC1461 (continued)
MAXIMUM RATINGS (TC = +25 0 C unless otherwise noted)
Rating
Input Voltaga
Symbol
Value
Unit
Vin
20
35
40
Vdc
MC1460. MC1560
MC1461
MC1561
G Packaga
R Package
Load Current
IL
250
600
rnA
Current. Pin 2
Ipin 2
Ipin9
10
5.0
10
5.0
mA
Po
1/6JA
6JA
Po
1/6JC
6JC
0.68
5.44
184
1.8
14.4
69.4
3.0
24
41.6
17.5"
140
7.15
Watts
mW/oC
°C/W
Current. Pin 9
Power Dissipation and Thermal Characteristics
TA = 25°C
Derate above T A = 25°C
Thermal Resistance, Junction to Air
TC = 25°C
Derate above T C = 25°C
Thermal Resistance. Junction to Case
Operating and Storage Junction Temperature
Ranga
TJ. T stg
-65 to +150
Watts
mWfOC
°C/W
°c
-The MC1460R and MC1560R are limited to 12 watts maximum by the voltage and current
maximum ratings.
OPERATING TEMPERATURE RANGE
Ambient Temperature
o to +75
-55 to +125
MC1460. MC1461
MC1560. MC1561
Note 1.
"Minimum Input Voltage" is the minimum "total instan-
Note 4.
The input signal can be introduced by use of a transformer
which will allow the output of an audio oscillator to be
coupled in series with the dc input to the regulator. (The
large ac input impedance of the regulator will not load
the oscillator.) A 24 V, 1.0 ampere filament transformer
with the audio oscillator connected to the 110 V primary
winding is satisfactory for this test. vin ~ 1.0 V (rms).
Note 5.
Load regulation is specified for small (S +170 C) changes
in junction temperature. Temperature drift effect must
be taken into account separately for conditions of high
junction temperature changes due to the thermal feedback
that exists on the monolithic chip.
taneous input voltage" required to properly bias the
internal zener reference diode. For output voltages greater
than approximately 5.5 Vdc the minimum "total
instan~
taneous input voltage" must increase to the extent that it
will always exceed the output voltage by at least the
"input output voltage differential".
4
Note 2.
This parameter states thatthe MC1560/1561 and MC14601
1461 will regulate properly with the input-output voltage
differential (Vin - Vol as low as 2.7 Vdc and 3.0 Vdc re·
spectively. Typical units will regulate properly with (VinV o ) as low as 2.1 Vdc as shown in the typical column.
Note 3.
"Temperature Coefficient of Output Voltage" is defined as:
MC1560. TC
= ± (Vo max - Vo min)(100)
MC1561
Vo
211800ClIVo@250C)
V o IlL = 1.0mA.v0IIL = 50mA
Load Regulation =
X 100
V o1 I L =1.0mA
%loC
Note 6.
The output-voltage adjusting resistors (R 1 and R2) must
have matched temperature characteristics in order to maintain a constant ratio independent of temperature.
The resulting low level output signal (va) will require the
use of a tuned voltmeter to obtain a reading. Special care
should be used to insure that the measurement technique
does not include connection resistance, wire resistance,
and wire lead inductance (i.e., measure close to the case).
Note that No. 22 AWG hook-up wire has approximately
4.0 milliohms/in. dc resistance and an inductive reactance
of approximately 10 milliohms/in. at 100 kHz. Avoid use
of alligator clips or banana plug-jack combination.
GENERAL OPERATING INFORMATION
There is a general tendency to consider a voltage regulator as
simply a dc circuit and to prepare breadboard construction accordingly. The excellent high-frequency performance and fast response
capability of this integrated-circuit regulator, however, makes extra
breadboarding care worthwhile when compared with the limited
performance achieved in other regulators when low~frequency transistors are used in the feedback amplifier. Due to the use of VHF
transistors in the integrated circuit. some VHF care (short, welldressed leads) must be exercised in the construction and wiring of
circuits ("printed-circuit" boards provide an excellent component
interconnection technique).
The circuit must be grounded by a low-inductance connection to
the case of the "R" package, or to pin 100f the "G" package.
A series 4. 7-kn resistor at Pin 5 (Figure 1) will eliminate any VHF
instability problems which may result from lead lengths longer than
a few inches at the regulator output. The resistor body should be as
close to Pin 5 as phYSically possible 1< 112 inch) although the length
of the lead to the load is not critical. If temperature stability is of
major concern, a 4.7-kO resistor should also be placed in series with
Pin 6 in order to cancel any drift due to bias current changes.
8-313
I
MC1560, MC1561, MC1460, MC1461 (continued)
allel resistance. Further. no match to a diffused-resistor temperature
coefficient is required; but R1 and R2 should have the same temperature coefficient to keep their ratio independent of temperature.
Cn values in excess of 0.1 "F are rare!.y needed to reduce noi •.
In cases where more output noise can be tolerated. a smaller capa-
If long input leads are used, it may be necessary to bypass Pin 3
with a O.I·"F capacitor (to ground).
The "Shut·Down Control", Pin 2, can be actuated for all possible
output voltages and any values of Co and Cn with no damage to the
circuit. The standard logic levels of RTL. DTL. or TTL can be used
(see Figure 20~. This control can be used to eliminate power con-
citor can be used (Cn min ... 0.001 "Fl.
The connection to Pin 5 can be made by ~ separate lead directly
to the load. Thus "remote sensing" can be achieved and undesired
impedances (including that of a milliammeter used to measure ILl
can be greatlv reduced in their effect on ZoiJt. A to-ohm resistor
placed from pin t to pin 5 (close to the IC) will eliminate undesirable
lead-inductance effects.
Short-circuit current-limiting is achieved by selecting a value for
RSC which will threshold the internal diode string when the desired
maximum load current flows (see Figure 5). If the device dissipation
and dc safe area limits (Figure 15) are not exceeded. it can be con. tinuously short-circuited at the output without damage.
sumption by circuit loads which can be put in a "standby" mode. as
an ae and de "squelch" control for communications circuits. and as
a dissipation control to protect the regulator under sustained output
short-circuiting (see Figures 21 and 25). As the magnitude of the
input-threshold voltage at Pin 2 depends directly upon the junction
temperature of the IC chip. a fixed de voltage at Pin 2 will cause
automatic shut-down for high junction temperatures (see Figure 23.
a and b). This will protect the chip, independent of the heat sinking
used, the ambient temperature, or the input or output voltage levels.
Due to the small value of input current at Pin 8, the external
resistors, R1 and R2, can be selected with little regard to their par-
TYPICAL CONNECTIONS
FIGURE 1 - CONNECTION FOR Va .. 3.5 V
+Vin
4
~
~
8
Rl
-
5_
~
r-
60
+Vo
RSC
~
3
4.1 k
Co
+
:::10.F
g
1
2
'"'z
I;;
~
-=
-=
V
ZO
. . .V
=
::"1
RZ
6.8 k
V
V
30
'"
RL
1101
V
40
w
Case
~
IR1';IZVo -llkfll
IR2' 6.8 klll
50
10
.)7
0
5.0
0
10
15
ZO
Z5
Vo, OUTPUT VOLTAGE IVOLTSI
-=
30
35
Select Rl to give desired Vo: A1::::«2Vo -7.0)kH
FIGURE 2 - CONNECTIONS FOR Vo S +3.5 V
Z.O
+Vin
3
1
~
4
~
Z
1101
"'11m
O.I.F
Rz
.".
-=
'-
-a-'£
;IL.
RL
+
-a-'£
w
Z
'"'
z
1.0
I;;
'"
6.0
iii
ICO
-=10.F
(IRZ ~ Z (Vol kllJ
0
0
RZ
8-314
'"
I;;
'"
:;i
=
(Z Vol kfl
'"'z
iii
'"
Select Rl:
~1.0kn-
./
Rl
.".
RZ~
11 kll- RZI kfll
w
Select R2 to give desired Va:
Rl
..... 1.0
IR1~
f-
T
Cn
0.IPF
L-
~
;v,!.
5
~
Rl
RSC
Z.5
3.0
Vo, OUTPUT VOLTAGE (VOLTSI
5.0
3.5
MC1560, MC1561, MC1460, MC1461 (continued)
TYPICAL CHARACTERISTICS
cn ;
Unless otherwise stated:
O.l/lF, Co ; 10 /IF, Vo nom; +5.0 Vdc, Vin nom; +9.0 Vdc,
TC; +250 C, IL > 200 mA for "R" Package only.
FIGURE 3 - INPUT TRANSIENT RESPONSE
FIGURE 4 - LOAD TRANSIENT RESPONSE
~~18~1!I
~;
>0
1,"IP20",
tr"'tf=2Ils
>
13
~
""'~
10.005
w
~
10-
1
~ lQ.ooo I ....
"
eo
g
"
>
--
-"
I
0
'"
~
l-
"
>
~ 10.000
" 9,95 0
I 0.000
>
9.99 5
2.0p.S/DIV
9.999
lOps/DIV
O.I,us/DIV
FIGURE 6 - CURRENT-LIMITING CHARACTERISTICS
FIGURE 5 - SHORT·CIRCUIT CURRENT versus RSC
600
1.01r----,----,---~----.----_,
C
.s
I-
ffi
'"'"
B
500
\
w
.
\
I-
300
U
200
~
,.:.
'"
ili
"
.............
0
~
100
o
o
1.0
I-
0.99
0
0.98
~=>
....
2.0
3.0
"""-
4.0
~
--
5.0
1.00
0
>
,,
,
400
0
'"g
.:;
'"'"
- - - R package onlv
::l
ill:0'"
RSC " 6.8 OH MS
0.97
z
oj 0.96
r-
~II
oi
6.0
7.0
8.0
w
9.0
~
RSC. EXTERNAL CURRENT·LlMITING RESISTOR (OHMS)
100
;g
]
80
w
'z"'
'"~
60
0
'!!
I-
~
40
V
=>
0
1l
r!i
100
40
/
V
.",
i
Vin - Vo = 3.0 V
TJ" +2S·C
RSC" 0 Ohm.
w
10 rnA to 500 rnA
E
!
-
'"'
Z
'"~
!!
20
~
l-
=>
0
20
J"'
--------
o
0.001
/
60
FIGURE 8 - DEPENDENCE OF OUTPUT IMPEDANCE
ON OUTPUT VOLTAGE
FIGURE 7 - FREQUENCY-DEPENDENCE
OF OUTPUT IMPEDANCE
I
60
IL. LOAO CURRENT (mA)
0.01
0.1
o
1.0
10
o
8.0
16
v., OUTPUT VOLTAGE (VOLTS)
f. FREUUENCY (MHz)
8-315
24
32
MC1560, MC1561, MC1460, MC1461 (continued)
TYPICAL CHARACTERISTICS (continued)
Unless otherwise stated: Cn = 0.1 p.F, Co = 10p.F, Vo nom = +5.0 Vdc, Yin nom = +9.0 Vdc,
TC = +25 0 C, I L > 200 mA for "R" Package only.
FIGURE 10 - FREQUENCY·DEPENDENCE
OF INPUT REGULATION
FIGURE 9 - OUTPUT IMPEDANCE versus RSC
40
0.009
~
~ 0.00 6
~
~
0
0.003
i"
0
5.0
0.001
0.0001
u
-
sil
I
2.5,,----.,-----::t:="""-""T"----,
./
\
4.5
~
f- Il = 1.0 mA
a;
~
R2=6.8k
.................
/
'"
«
~ ~2.3
>~
~
g 2.2hL---+--.,.L-~---lI-+--.,."L.::::::"'--I-----~
~
TJ=+25'C . /
\
TJ = O'C
2.4~-'---__o<6.-.c..---j----...j.-=-'--_I
w
. / "/
k?" " /
~~X
~
l-
1.0
0.1
FIGURE 12 - EFFECT OF LOAD CURRENT ON
INPUT·OUTPUT VOLTAGE DIFFERENTIAL
FIGURE 11 - BIAS CURRENT versus INPUT VOLTAGE
TJ = +75'C ANO +125'C
0.01
f, FREQUENCY (MHz)
RSC. EXTERNAL CURRENT·lIMITING RESISTOR 10HMS)
5.0
-'l
MCI560
MC1561
o
15
10
/
MC1460
MC1461
~
;;:;
~
I-~
~ ~ 2.11---7"~---7"'q------I-----~
/
~ ~ 2.0!---,.,L---j....,.,Lloc---l-------1------l
~a 1.91---7"=-+-----+------I-----~
\ TJ = -55'C
c
;;
1"1
4.0
o
5.0
10
15
25
20
30
35
40
125
Vin, INPUT VOLTAGE (VOLTS)
0.006
500
~z 0.004
.,
5
~
I~
;;:;
.S
'""'
"I"'"
....
::>
0.00 2
=<
=
S
+1250 C
IZ
~ 31 5
./
""""
"""""-I--.
'".,
TJ = +25'C
.,«
r--....:
~ 250
I
~
II-- t--
~
V.
M·-l0Vd
16
rF
-
RSC =6!0 OHMS
ili
RSC =2h OHMS
~
=3.5 Vd
24
32
Vin - V.,INPUT·OUTPUT VOLTAGE OIFFERENTIAL (VOLTS)
I
-55
-25
+25
+50
+75
TJ, JUNCTION TEMPFRATURE ('C)
8-316
-
'-
RSC =3.0 OHMS
., 12 5
Il"1.0mA
i
8.0
r-- t--
::>
Tr-550C
0
500
OF SHORT-CIRCUIT LOAD CURRENT
DIFFERENTIAL ON INPUT REGULATION
TJ
375
FIGURE 14 - TEMPERATURE DEPENDENCE
FIGURE 13 - EFFECT OF I NPUT-OUTPUT VOLTAGE
'-
250
IL. LOAO CURRENT (mAde)
+100
+125
+150
MC1560, MC1561, MC1460, MC1461 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 15a - DCSAFE OPERATING AREA I"G" PACKAGE)
FIGURE 15b-DCSAFE OPERATING AREA I"R" PACKAGE)
...
0.2
i
~
0.6
.E 0.08
---"'Secondary Breakdown limitation
- - - Bonding Wire Limitation
- - - - .. Thermal Limitation IT C = 250 C)
0.01
0.06
0.0 5
0.4
r~.
~
\
~
TJ.s;.; 150 0 C
~
...
\
MICI46~_ t--
...
MCI461
4.0
5.0 6.0 1.0 B.O
.~CI46~_ \
TJ" 1500 C
I'
30
20
\
40
1\
r\
~C1560
MCI561
~
Limil8tiol\..
- - - '"'Secondary Breakdown
- Bonding Wire Limitation
,
I
10
0.3
jl O. 2
MC1560
0.04
0.03
3.0
~
0.5
...
... ...
o. I
,
o. 7
0.3
\
~C1461
t
MCI561
O. I
3.0
4.0
5.0 6.0 1.0 8.0
20
10
30
Vin - Vout (VOLTS)
Vin - Vout (VOLTS)
·See Application Note AN·415 for an explanation of safe area and second breakdown.
TYPICAL APPLICATIONS
FIGURE 17·- PROVIDING TWO REGULATED
OUTPUT VOLTAGES
FIGURE 16 - A LABORATORY SUPPLY, 0 TO 25 V
JII
2.0pF
1-'-0..:..::....-.........,'
q
IIOV:
MCI461R
25 k
--,:---:=!
l--._--._r--D-;-t"...........
3.9 k
Vo 2
('20 Vdcl
+
::t
@300mA
'O • F
FIGURE 18 - NPN CURRENT BOOST CIRCUITS
2N3055 OR EQUIV
"Vinl ;;;. 6.0 V
+5.0 V
-------"""1r-""7<:--lI-"t"NI.,...... Vo
Vin 1 . .
I
O.l,!.1F ;{-:
I
--.':.lOrnA
Vin 2
510n
3.0 k
6.Bk
"For ripple reduction or increased
efficiency at low output voltages,
the collector of Ql can tie to a
separate low-voltage supply as
shown.
6.8 k
40
MC1560, MC1561, MC1460, MC1461 (continued)
TYPICAL APPLICATIONS (continued)
fiGURE 20 - ELECTRONIC SHUT-DOWN
USING A MDTL GATE
fiGURE 19 - PNP CURRENT BOOST CIRCUIT
2N4904 0 R EaUIV
---,(-)r------------...,
+Vin .............
+Vin
6.8 k
•~__-<~r-------~~~~+~V~.~.~5~.0~V
SC
+V.
logic
Inputs
RI
The MC1460R is "Shut-Down" when any
of the Logic Inputs are at the "a" level.
R2
(DUAL MOlLt GATE)
fiGURE 21 - AUTOMATIC LATCH INTO SHUT-DOWN WHEN
OUTPUT IS SHORT-CIRCUITED WITH MANUAL RE-START
RSC
+V.
+Vin (+15 VI
tTrademark of Motorola Inc.
fiGURE 22 - SCR "CROWBAR" OVER
VOL TAGE PROTECTION
+Vin (+15 Vdc)
(+10 V)
11k
.-4', ~+---:>.::-l
FUSE
(ALTERNATE
CONNECTION)
1
10,uF
91k
2N5060
t~~~---(Normally "ON'"
-=
*C1 is used to allow automatic
uSTA RT· UP" when Vin is
first applied.
____ ":·k
300
fiGURE 23 - LIMITING MAXIMUM JUNCTION TEMPERATURE
fiGURE a - USING A ZERO TC REfERENCE
fiGURE b - USING A TA REfERENCE
Vpin 2 (for shut-down) """ 1.38 - 3.4 X 10-3 ITJ - 25 0 C)
+Vin (15 V)
5.0mA ,
+Vin
(15 V)
+V.
2.0 k
RI
2.0 mA
+5.1 V
2.0k
R2
510
11.0 V
IN3826
DR EaUIV
-::-
-::-
+1.0 V
r
560
820
-::-
8-318
'=
-=
2N4167
DR EOUIV
MC1560, MC1561, MC1460, MC1461 (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 25 - LOW DUTY CYCLE SHORT CIRCUIT
PROTECTION WITH AUTOMATIC RESET
FIGURE 24 - THERMAL SHUTDOWN WHEN USING
EXTERNAL PASS TRANSISTOR
TA REFERENCE
IN400i
DR EQUIV
+Vo
I-:-o--'VI""
10 V
+Vin
(+20 VI
10 k
20
2N4123
DR EQUIV
FIGURE 26 - CONNECTION FOR A NEGATIVE
OUTPUT VOLTAGE
FIGURE 27 - DIGITALLY CONTROLLED 3-TERMINAL
NEGATIVE REGULATOR
+5.0 V
+3.0 V (MINI
~ "ON"
0'
LINE
5oo.F
1.0 k
6.0 mA
("oN"1
u:_";::_-O-:~----I-~,J4~.7~k..,
"OFF"
•
RI
6.8 k
-Vo
-Vo
-Vin
1-17 vI
FIGURE 28 - A ZERO TC ADJUSTABLE "ZENER" REFERENCE
INPUT
------I
+Vref
MC1710C
Voltage Comparator
•++'V~in~_ _-o~r------l~~~5~.I~~~=;==4
9(+4.0 Vdcl
(+loVdcl
MC1460G
4.1k
1.0 k
3.ok
6.8 k
8-319
MC1560, MC1561, MC1460, MC1461 (continued)
GENERAL INFORMATION
Latch·up of these and other regulators can occur if:
1. There are plus and minus voltages available
2. A load exists between Va + and Vo- (This "common load" may be something
inconspicuous -e.g. an operational amplifier. Nearly everyone who uses + and - voltages
will have a common load from V+ to V-I .
3. Vin + and Vin+ are not applied at the same time.
The above conditions result in one of the two outputs becoming reverse-biased which prevents
the regulator from turning "on". Latch-up can be prevented by the circuit configurations
shown in Figure 29 and 30.
FIGURE 29
FIGURE 30
Rl
MC15601
MC1561 j-:._----~
R2 = 6.8 k
GND
-=
lN4001
CASE
1
MC1563R
MC1463R
Vin-
V,-
RSC
8-320
Rl
MC1560, MC1561, MC1460, MC1461 (continued)
VOLTAGE REGULATOR CONSTRUCTION
USING THE MC1460, MC1461, MC1560,
MC1561 INTEGRATED CIRCUITS
FIGURE 31 - Regulator Layout Using Power Package For Load
FIGURE 32 - Regulator Layout For Load Currents Up To 200 mA
Currents Up To 500 mA
RSC
Vo
(Pins 4 & 5)
Gnd
PARTS LIST
Component
There is a general tendency to consider a voltage regulator
as simply a de circuit and to prepare circuit layout accordingly.
The excellent high-frequency performance and fast response capability of this integrated-circuit regulator, however, makes extra
layout care worthwhile. Since short, well-dressed leads must be
used, printed-circuit boards provide an excellent component inter-
connectJon technique.
The circuit layout, shown in Figure 31 for the "Roo or power
package IC, applies also to the lower power "G" package circuit
shown in Figure 32. The R package circuits will deliver up to 500
rnA into a load and the G package, 200 rnA.
The circuit schematic, Figure 33, is for output voltages above
3.5 Vdc and the parts list is as follows:
Description
Value
Rl
R2
Select }
RSC
Select
6.8 kn
1/4 Watt Carbon - See Note 1
1/2 Watt Carbon - See Note 2
*RA
*RB
3n
3n
*R'L
Select for current of 1 mA minimum
}
1/4 Watt Carbon
Sprague 1500 Series, Dickson Dl0C
Co
1OI'F
Cn
O.II'F } Ceramic Disc Centralab DDA 104,
O.II'F
Sprague TG-P10, or Equivalent
O.II'F
Series or Equivalent
*CA
*CB
*Heatsink
- Thermalloy #6168
-IERC LB 66Bl·77U series
*Socket
(Not Shown) Robinson Nugent #0001306
Electronic Molding Corp.
#6341·210·1,6348·188·1,
6349·188·1
*Optional Parts, See Note 3 on next page.
8-321
MC1560, MC1561, MC1460, MC1461 (continued)
VOLTAGE REGULATOR CONSTRUCTION
Note 1.
Note 3.
The value of R1 is approximately (2 Va - 7) kn, where
Va is the desired output voltage (3.5 V or greater).
Optimum temperature stability can be achieved if R 1
(conlinued)
In cases where long leads are used at the input or output
of the regulator, bypass networks RACA and ReGs might
be necessary to eliminate parasitic oscillation.
and A2 have the same temperature coefficient.
With no load, it is possible for a charge to develop on
Note 2.
Rse is a current sensing resistor for short circuit pro-
Co due to leakage currents.
tection. See Figure 5 for a "Short-Circuit Load Current
insure a minimum load current of 1 rnA.
R'L is recommended to
versus Rse" curve.
Note 4.
It is recommended that Pin 2 (shut·down control) be
grounded when not in use. When used, drive current to
Pin 2 must be limited to 10 mA maximum.
FIGURE 33 - Schematic of Complete Regulator Showing Both Necessary and Optional Components
3
I
6
~RA
9
;-3
0.1
",F'T'
~
'MC1560!61
MC1460!61
R1
~
2
Case
'10
~
R2
6.B k
-
Rsc
5
~
I
C A _..L_
I
4~
-
-
r·'
+Vo
1
f
I
~Re
;'3
C
,r;:+ 10"F
I
I
-.L-Ce
'1'0.1 "F
.,..
·G·Package Pin 10 is ground, A package Case Is ground.
FIGURE 34 - Typical Printed Circuit Board Layout
1---------3"-------_.,
8-322
.1
0
T
~
::R'L
,
I
I
I
I
I
-i:-
-
l . . ___
N_E_G_A_T_IV_E_V_O_L_T_A_G_E_R_E_G_U_L_A_T_O_R---o
MCIS63
MCI463
Specifications and Applications InforIllation
MONOLITHIC NEGATIVE VOLTAGE REGULATOR
The MC1563/MC1463 is a "three terminal" negative regulator designed to deliver continuous load carrent up to 500 mAde and provide a maximum negative input voltage of
~40
Vdc. Output current capability can be increased to greater than 10 Adc through use
of one or more external transistors.
Specifications and performance of the MC1563/MC1463 Negative Voltage Regulator are
nearly identical to the MC1569/MC1469 Positive Voltage Regulator. For systems re-
NEGATIVE·POWER·SUPPL Y
VOLTAGE REGULATOR
INTEGRATED CIRCUIT
SILICON EPITAXIAL PASSIVATED
quiring both a positive and negative power supply, these devices are excellent for use as
complementary regulators and offer the advantage of operating with a common input
ground.
The MC1563R/MC1463A case can be mounted directly to a grounded heat sink which
eliminates the need for an insulator.
•
Case is at Ground Potential (R package I
•
Electronic "Shutdown" and Short-Circuit Protection
•
Low Output Impedance - 20 Milliohms typical
•
•
High Power Capability - 9.0 Watts
Excellent Temperature Stability - TCVO = ± 0.002%l oC typical
•
High A ipple Aejection - 0.002% typical
•
500 mA Current Capability
FIGURE 1 - TYPICAL CIRCUIT CONNECTION
(1-3.sl,.;vo,.;I-371 Vdc,1 ";IL ";500 mAl
G SUFFIX
R SUFFIX
METAL PACKAGE
CASE 602A
METAL PACKAGE
CASE 614
FIGURE 2 - TYPICAL NPN CURRENT BOOST CONNECTION
(VO = 5.2 Vdc, I L = 10 Adc [max] I
GNO
CASE
S.8k
Re
v'"
'A
MC1!i&3R
MCl463R
'.
GNO
I
Il:'
c,
lei
• c,
10
Rl
100
.'
.' 'L
Vo
Sallel RA to Give OHirad Vo:
IOAm.l
RA'" (ZIVol-71 k{l
"
O.OOlj.1F
O.02n
Vo
Vo =-5.2 Vde
FIGURE 3 - ±.15 V, ±.400 mA COMPLEMENTARY TRACKING
VOLTAGE REGULATOR
Vin
_20Vdc ........
----o!-l
See Packaging Information Section for outline dimensions.
(MC1563 - Pg. 1)
8·323
MC1563, MC1463 (continued)
MAXIMUM RATINGS (Tc = +25 0 C unless otherwise noted.)
Rating
Symbol
Input Voltage
Unit
Value
Vdc
vin
MC1463
MC1563
-35
-40
G Package R Package
250
600
Peak Load Current
IL pk
Current, Pin 2
Ipin 2
10
10
mA
mA
Po
l/cJ>JA
cJ>JA
Po
1/cJ>JC
cJ>JC
TJ,Tstg
0.68
5.44
184
1.8
14.4
2.4
16
62
9.0
61
17
Watts
mW/oC
°C/W
Watts
mW/oC
°C/W
Power. Dissipation and Thermal Characteristics
= 25°C
Derate above T A = 25°C
Thermal Resistance, Junction to Air
TC = 25°C
Derate above T C = 25°C
TA
Thermal Resistance, Junction to Case
Operating and Storage Junction Temperature
69.4
-65 to +175
°C
Range
OPERATING TEMPERATURE RANGE
Ambient Temperature
MC1463
MC1563
ELECTRICAL CHARACTERISTICS (IL = 100 mAde, TC = +25 0 C unless otherwise noted.)
--~~=---~---,
~
400
~
co
'-'
0
300
~
>-
7. Remote Sensing
The connection to pin 8 can be made with a separate lead
direct to the load. Thus, "remote sensing" can be achieved
and the effect of undesired impedances (including that of
the milliammeter used to measure I L) on Zo can be gre,atly
reduced (see Figure 33).
1
(RA ~12 Vo -71 kn)
50 _(RB=6.Bkn)
~
200
u
~
0
I
100
~
~
Tc=I+25 0 C
1\
\
\
'"""
10
-----
t--
20
30
40
Rsc. EXTERNAL CURRENT·LlMITING RESISTOR (OHMSI
(MC1563 - Pg. 4)
8-326
50
MC1563, MC1463 (continued)
TYPICAL CHARACTERISTICS
Unless otherwise noted: Cn = 0.1 pF, Ce = 0.001 pF, Co = 10 pF, TC = +25 0 C,
Vin(nom) = -15 Vde, VO(nom) = -10 Vde, I L = 100 mAde.
FIGURE 12 - TEMPERATURE DEPENDENCE
OF SHDRT·CIRCUIT LOAD CURRENT
FIGURE 13 - FREQUENCY DEPENDENCE
OF OUTPUT IMPEDANCE
2000
800
..s~
700
Rsc
>-
~
600
'"B
o
500
'"g
400
>'5
=
~ 200
:I:
-
"- t'- I"--
5n
r-- r- t -
Ion
13n
i--
r--
---
r:::::
~
r--- I---
~
-
I--
V
200
>-
~ 100
~
o
.§
50
/'
30
~
·75
500
~ 300
I'--- .........
........
4n
~ 300
(/). 100
~
.......... r-...
3n
U
o·
1000
2n
·50
+25
·25
+50
+75
+100
+125
20
1.0
+150 +175
10
TJ. JUNCTION TEMPERATU RE lOCI
FIGURE 14 - DEPENDENCE OF OUTPUT
IMPEDANCE ON OUTPUT VOLTAGE
5
~
z
25
~
20
w
'-'
'"o
>~
>=>
o
§
15
~
1000
FIGURE 15 - OUTPUT IMPEDANCE versus Rsc
0
0
30
100
f. FREQUENCY IkHzl
~
~
IL Jo mA
o r - - - f~ 1.0 kHz
IVin - tOI 3.0 IV. TJ +J5 0 C
Rsc ~O,IL ~ 10 mAto 500 rnA f ~ 1.0 kHz
0
~
.............
0
0
r--
I--- r--
r--
l::::::::
V
L
0
5. 0
0
0
·10
-20
·30
3.0
-40
6.0
FIGURE 16 - CURRENT LIMITING CHARACTERISTICS
1.03
w
1.02
R;, = 13 O~MS
1.0 1
>
~ 1.00
"'I
>=>
o 0.9 9
~::::i
0.9 8
'"~
0.9 7
«
z
~ 0.96
20
12
Rs<. CURRENT LIMITING RESISTOR (OHMSI
VO, OUTPUT VOLTAGE IVOLTSI
'";'!:
c5
9.0
40
60
80
100
IL. LOAD CURRENT {mAl
IMC1563 - Pg. 51
8-327
120
140
160
15
MC1563, MC1463 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 18 - EFFECTS OF LOAD CURRENT
ON INPUT-QUTPUT VOLTAGE DIFFERENTIAL
FIGURE 17 - BIAS CURRENT versus INPUT VOLTAGE
6.0
Il,1.0mA
RB' 6.B kn
TJ' -55°C
-
;'i
~
.-~
-~ ~
~
..s....
-
5.0
'"~
~
;;;
:§
4.0
TJ
=
--
1.8
I---
-
~
~
+25 0 C
/
V/
K
TC' -55°C
-
TJ :+125 0 C
I
V
i I
1.0
o
-5.0
-10
-20
-15
-25
-35
-30
o
-40
100
f" lkHZ
6
;::
~
~
~
~
~ 0.002
[f!
o
o
TJ'-550C~
Vo
5.0
~
I-- t--L
~
....
c5
TJ = +25 0 C
>
~ bL
-10V~
10
-10.000 r--t"-t"-t--t--T-T--t::::~=~=9
-10.002j--t--t--tr-t--+--t---t---t--t---i
IL'50mA
!; -10.004f--+--+---f/--+--=--t--+--t---t---+----j
~o -1O.006j--t--t--+--t--+--t---t---t--t---i
VO'-3.6V
15
~r==r--9.998j--t--t--t--t--+--t---t---t---t---i
~
TJ' +125 0C
....
500
400
ITf±tIII]
~~~II
c
" 0.004
~
300
FIGURE 20 - INPUT TRANSIENT RESPONSE
0.008
:5
200
IL, LOAD CURRENT ImAdel
FIGURE 19 - EFFECT OF INPUT-QUTPUT VOLTAGE
DIFFERENTIAL ON INPUT REGULATION
o
V
,/
~I
",
"-../~ r',........
V ~ ~ i---< b- TC' +1250C -
TC '+25 0C
Vin, INPUT VOLTAGE IVdel
~
;; 0.00
/
V
20
25
~
30
35
-10.008"_ _-'-_-'-_...1-_-'-_-'-_-'-_-'-_-'-_--'_---'
40
IVin -VOl, INPUT·OUTPUT VOLTAGE DIFFERENTIAllVOLTSI
FIGURE 21 - LOAD TRANSIENT RESPONSE
FIGURE 22 - DC OPERATING AREA
+125
c
1
""~ ....~
.=1~
G
+100
+75
+50
~o
+25
~
-9.750
d r L H ' tpJL' 500 P i \ tPHL' tPLH ' 20 ns
-L
....
"
~ ·10.250
>
+100
0.4
0.3
+95
+90
~
~
+85
~
-9.998
II
~
o
>
.... -10.000
~
0.6
-=
~
~
+105
I
\
-10.002
L
Bo.o5
'" ,
MC1463R
MCI563R
r---
-
- - - - - SECONDARY BREAKDOWN LIMITATIONS
---BONDING WIRE LIMITATIONS
~
- - -THERMAL LIMITATIONS
MC1463G
I I
-TC'250C I
MC163G
0.0 1
3.0
1.0 ms/DIV
........
GTTJ
~ O. 1
~ 0.0 7
"" 3
gO.a
~O.O 2
h
.~
_L
O. 2
o
-10.000
.,
'1PACKAGE
-I
4.0
1
5.0
7.0
I
10
20
30
40
,Vin - Vo I, INPUT·OUTPUT VOL TAGE OIFFERENTIAL IVOLTSI
IMC1563 - Pg. 6)
8-328
50
MC1563, MC1463 (continued)
OPERATION AND APPLICATIONS
This section describes the operation and design of the MCI563 (MCI463) negative voltage regulator and also
provides information on useful applications.
SUBJECT SEQUENCE INDEX
Specification Pg. No.
Theory of Operation
7
NPN Current Boosting
9
PNP Current Boosting
10
Positive and Negative Power Supplies
II
Shutdown Techniques
II
Voltage Boosting
12
Specification Pg. No.
Remote Sensing
12
An Adjustable Zero-Temperature-Coefficient 13
Voltage Source
Thermal Shutdown
13
Thermal Considerations
13
15
PC Board Layout and Information
THEORY OF OPERATION
is exactly the same approach used in the first option. That
is, the output is being resistively divided to match the
reference voltage. There is however, one big difference in
that the output of this "regulator" is driving the input of
another regulator (the error amplifier). The output of the
reference amplifier has a relatively low impedance as compared to the input impedance of the error amplifier.
Changes in the load of the output of the error amplifier
are buffered to the extent that they have virtually no effect
on the reference amplifier. If the feedback resistors are
external (as they are on the MC 1563) a wide range of
reference voltages can be established.
The error amplifier can now be operated at unity gain
to provide excellent regulation. In fact, this "regulatorwithin-a-regulator" concept permits the load regulation to
be specified in terms of output impedance rather than as
some percentage change of the output voltage. This approach was used in the design of the MC1563 negative
voltage regulator.
The usual series voltage regulator shown in Figure 23,
consists of a reference voltage, an error amplifier, and a
series control element. The error amplifier compares the
output voltage with the reference voltage and adjusts the
output accordingly until the error is essentially zero. For
applications requiring output voltages larger than the reference, there are two options. The first is to use a resistive
divider across the output and compare only a fraction of
the output voltage to the reference. This approach suffers
from reduced feedback to the error amplifier due to the
attenuation of the resistive divider. This degrades load
regulation especially at high voltage levels.
The alternative is to eliminate the resistive divider and
to shift the reference voltage instead. To accomplish this,
another amplifier is employed to amplify (or level shift)
the reference voltage using an operational amplifier as
shown in Figure 24. The gain-determining resistors may
be external, enabling a wide range of output voltages. This
Series Control Element
Error
Va
Refer~
=
Vref
ence
Amplifier
Amplifier
(Level
Shifter)
FIGURE 23 - Series Voltage Regulator
Error
Amplifier
FIGURE 24 - The "Regulator-Within-A-Regulator" Approach
(MC1563 -
Pg. 7)
8·329
MC1563, MC1463 (continued)
FIGURE 25
(Recommended External Circuitry is Depicted With Dotted Line.. 1
Vref
and
Iref
Bias
Case/10
-T--~
,
Co:!t
+
7 Vdc
10l'F
920
Outl?ut
Sense
MClS63 (MC1463) Operation
input voltage. It makes use of two zener diodes having
the same breakdown voltage. A first or auxiliary zener is
driven directly from the input voltage line through a
resistor (60 kn) and permits the regulator to initially
achieve the desired bias conditions. This permits the
second, or reference zener to be driven from a current
source. When the reference zener enters breakdown, the
auxiliary zener is isolated from the rest of the regulator
circuitry by a diode disconnect technique. This is necessary
to keep the added noise and ripple of the auxiliary zener
from degrading the performance of the regulator.
Figure 25 shows the MC1563 (MC1463) Negative Regulator block diagram, simplified schematic, and complete
schematic. The four basic sections of the regulator are:
Control, Bias, DC Level Shift, and Output (unity gain)
Regulator. Each section is detailed in the following paragraphs.
Control
The control section involves two basic functions, startup and shutdown. A start-up function is required since
the biasing is essentially independent of the unregulated
(MC1563 - Pg. 8)
8-330
MC1563, MC1463 (continued)
The shutdown control, in effect, consists of a PNP transistor across the reference zener diode. When this transistor
is turned "ON", via pin 2, the reference voltage is reduced to
essentially zero volts and the regulator is forced to shutdown. During shutdown the current drain of the complete IC regulator drops to Vin/60 kn or 500 fJA for a
-30 V input.
inverting input to this amplifier is the Output Sense connection (pin 8) of the regulator. A Darlington connected
NPN power transistor is used to handle the load current.
The short-circuit current limiting resistor, Rsc, is connected in the emitter of this transistor to sample the full
load current. This connection enables a four-diode string
to limit the drive current to the power transistors in a
conventional manner.
Stability and Compensation
Bias
A zener diode is the main reference element and forms
the heart of the bias circuitry. Its positive temperature
coefficient is balanced by the negative temperature coefficients of forward biased diodes in a ratio determined
by the resistors in the diode string. The result is a reference voltage of approximately -3.5 Vdc with a typical
temperature coefficient of 0.002%/oC. In addition, this
circuit also provides a reference current which is used to
bias all current sources in the remaining regulator circuitry.
As has been seen, the MC 1563 employs two amplifiers,
each using negative feedback. This implies the possibility
of frequency instability due to excessive phase shift at high
frequencies. Since the error amplifier is normally used at
unity gain (the worst case for stability) a high impedance
node is brought out for compensation. For normal operation, a capacitor is connected between this point (pin 7)
and pin 5. The recommended value of 0.001 fJF will insure
stability and still provide acceptable transient response
(see Figure 21). It is also necessary to use an output capacitor, Co, (typically 10 fJF) directly from the output (pin
6) to ground. When an external transistor is used to boost
the current, Co = 100 fJF is recommended (see Figure 26).
DC Level Shift
The reference voltage is used as the input to a Darlington
differential amplifier. The gain of this amplifier is quite
high and it therefore may be considered to function as a
conventional operational amplifier. Consequently, negative
feedback can be employed using two external resistors (RA
and RB) to set the closed-loop gain and to boost the reference voltage to the desired output voltage. A capacitor,
Cn , is introduced externally into the level shift network
(via pin 3) to stabilize the amplifier and to filter the zener
noise. The recommended value for this capacitor is 0.1 fJF
and should have a voltage rating in excess of the desired
output voltage. Smaller capacitors (0.001 fJF minimum)
may be used but will cause a slight increase in output
noise. Larger values of Cn will reduce the noise as well as
delay the start-up of the regulator.
NPN CURRENT BOOSTING
For applications requiring more than 500 rnA of load
current, or for minimizing voltage variations due to temperature changes in the IC regulator arising from changes
of the internal power dissipation, the NPN current-boost
circuits of Figure 2 or 26, are recommended. The circuit
shown in Figure 26 can supply up to approximately 4.0
amperes (subject to safe area limitations). At higher currents the VBE of the pass transistor may itself exceed the
threshold of the current limit even for Rsc -= O. Figure 2
illustrates the use of an additional external diode from pin
4 for higher current operation or for pass transistors exhibiting higher VSE'S. It will probably be necessary to
determine Rsc experimentally for each case where a pass
transistor is used because VBE varies from device to device.
Output Regulator
The output of the shift amplifier is fed internally to the
noninverting input of the output error amplifier. The
The circuit of Figure 26 when set up for a· -10 V output
5.0
4.5
GND
\
4.0
\
3.5
\
3.0
1\
\.
2.5
2.0
/-IF
1.5
t:
o
1.0
'"~
0.5
i'....
..........
~
2N3771
Vo
or Equiv
o
.....
o
0.2
0.4
0.6
0.8
--
1.0
r-.
1.2
1.4
1.6
Rsc. Current Limiting Resistor (Ohms)
FIGURE 27 - Isc versus Rsc (referance Figure 26)
FIGURE 26 - Tvpical NPN Current Boost Connection
(MC1563 - Pg. 9)
8-331
1.8
2.0
MC1563, MC1463 (continued)
GND
FIGURE 28 - PNP Currant
Boost Connection
0.001
IlF
~~~J Vdc -
1
n
~R~SC':l-~~j-~:---:--.J
......
MJ450
or Equiv
V
_~~82 Vdc ...- - -......-'\N'v-4>-------><.._~)f-------......... VO "'-5.2
Vdc
(RA = 13 kn) supply and operating with a -15 V input,
with a Rsc of 0.1 .0, will yield a change in O!ltput voltage
of only 26 mV over a load current range of from I rnA
to 3.5 A. This corresponds to a dc output impedance
of only 7.5 milliohms or a percentage load regulation of
0.26% for a fuIl3.s-ampere load current change. Figure 27
indicates how the short circuit current varies with the value
of Rsc for this circuit.
28 this represents a savings of 22 watts when compared
with operating the regulator from the single -9 V supply.
It can supply current to 10 amperes while requiring an
input voltage to the collector of the pass transistor of -6.8
volts minimum. The pass transistor is limited to 10 amperes
by the added short-circuit current network in its emitter
(Rsc2) and the IC regulator is limited to 500 rnA in the
conventional manner (Rsc1). The MJ4s0 exhibits a minimum hFE of 20 at 10 amperes, thus requiring only 500
rnA from the MCls63R. Regulation of this circuit is comparable to that of the NPN boost configuration.
For higher output voltages the additional unregulated
power supply is not required. The collector of the PNP
boost transistor can tie directly to pin 5 and the internal
current limit circuit will provide short-circuit protection
using Rsc (see Figure II). Transistor Q2 and Rsc2 will
not be required and pin 2 should be returned to ground.
PNP CURRENT BOOSTING
A PNP power transistor can also be used to boost the
load current capabilities. To improve the efficiency of the
PNP boost configuration, particularly for small output
voltages, the circuit of Figure 28, is recommended. An
auxiliary -9 volt supply is used to power the IC regulator
and the heavy load current is obtained from a second supply
of lower voltage. For the 10-ampere regulator of Figure
(10 +~400 mA max)
Rsc = 1.5
Vo =
+15 Vdc
+Vo= I-Vol ""
RAlkn) +7
L-_ _ _ _ _ _ _ _ _
~~
_____
2
~~---~-~5.1V
MZ4625
or Equiv
620
3k
n
VO=-15Vdc
FIGURE 29 - A ±15 Vdc Complementary Tracking Ragulator With Auxiliary +5.0 V Supply
(MC1563 - Pg. 101
8-332
MC1563, MC1463 (continued)
Vee
l
+5 Vdc
0--
FIGURE 30 - Satu,ated Logic
Level Shutdown Circu it
0--
MDTLt
0--
MTTL
-10
0--
470
1 k
Output
2
MC1563
MC1463
1 N4001 ,
or Equiv
J-
R(20 k)
-=
>
tOate must be capable of 10
(For MDTL MC930/830 add
10 kfl from +VCC to output.)
POSITIVE AND NEGATIVE POWER SUPPLIES
4
11 mA
1 rnA
Vin
1-20 Vdc)
R (;n k.f!)~ IV;nl
is not short-circuit protected.) The -IS-volt supply varies
less than 0.1 mV over a zero to -300 mAdc current range
and the + IS-volt supply tracks this variation. The + 15-volt
supply varies 20 mV over the zero to +300-mAdc load
current range. The +5-volt supply varies less than 5 mV
for 0 .;;; IL .;;; 200 rnA with the other two voltages remaining unchanged. See MCI561 data sheet or MCI569 data
sheet for information concerning latch-up when using plus
and minus regulations.
If the MCI563 is driven from a floating source it is
possible to use it as a positive regulator by grounding the
negative output terminal. The MCI563 may also be used
with the MCI569 to provide completely independent
positive and negative power regulators with comparable
performance. When used in this manner a silicon diode
such as the I N400 I must be connected as a clamp on the
output with the cathode to ground and the anode to the
negative output voltage. This is to prevent the positive
voltage in the system from forcing the output to a positive
value and preventing the MCI563 from starting up.
Some applications may require complementary tracking
in which both supplies arrive at the voltage level simultaneously, and variations in the magnitudes of the two voltages track. Figures 3 and 29 illustrate this approach. In
this application, the MCI563 is used as the reference regulator, establishing the negative output voltage. The MCI 569
positive regulator is used in a tracking mode by grounding
one side of the differential amplifier (pin 6 of the MC 1569)
and using the other side (pin 5 of the MC1569) to sense
the voltage developed at the junction of the two 3 k-ohm
resistors. This differential amplifier controls.the MCI569
series pass transistor such that the voltage at pin 5 will be
zero. When the voltage at pin 5 equals zero, + IVo I must
equal-IVol·
For the configuration shown in Figure 29, the level
shift amplifier in the MC 1569 is employed to generate an
auxiliary +5-volt supply which is boosted to a 2-ampere
capability by QI and Q2. (The +5-volt supply, as shown,
SHUTDOWN TECHNIQUES
Pin 2 of the MC 1563 is provided for the express purpose of shutting the regulator "OFF". Referring to the
schematic, it can be seen that pin 2 goes to the base of a
PNP transistor; which, if turned "ON", will deny current
to all the biasing current sources. This action causes the
output to go to essentially zero volts and the only current
drawn by the IC regulator will be the small start current
through the 60 k-ohm start resistor (Vin/60 kn). This
feature provides additional versatility in the applications
of the MC1563. Various sub-systems may be placed in a
"standby" mode to conserve power until actually needed.
Or the power may be turned "OFF" in response to other
occurrences such as over-heating, over-voltage, shorted
output, etc.
As an illustration of the first case, consider a system
consisting of both positive-supply logic (MTTL) and
negative-supply logic (MECL). The MECL logic may be
used in a high-speed arithmetic processor whose services
are not continuously required. Substantial power may
Case/l0
MECL
FIGURE 31 - MECL Logic
Output
Gate
2
Leval Shutdown Circuit
VEE
2N706
or Equiv
-5.2 Vdc
(MC1563 - Pg. 11)
8-333
MC1663
MC1463
MC1563, MC1463 (continued)
GND
0.1
jJ.F
.".
68k
casell0
3
2
6.B k
25 k
4
MCl563
MCI463
0.001
jJ.F
2k
2k
B
1N4761 or Equiv
Vin:= -35 V
4
-100V
20 k
6
5
e---------------------------------~----~N_--~--------~~--~
.r------......-
-90 V
FIGURE 32 - Voltage Boosting Circuit
thus be conserved if the MECL circuitry remains un·
powered except when needed. The negative regulator can
be shutdown using any of the standard logic swings. For
saturated logic control, Figure 30 shows a circuit that allows
the normal positive output swing to cause the regulator
to shutdown when the logic output is in the low voltage
state. The negative output levels of a MECL gate can also
be used for shutdown control as shown in Figure 31.
A reduced input voltage can be provided by using a separate
supply. The output voltage may be zener-level shifted, and
the sense line can tie to a portion of the output voltage
through a resistive divider. The voltage boost circuit of
Figure 32 uses this approach to provide a -90 volt supply.
This circuit will exhibit regulation of 0.001 %over a 100 rnA
load current range.
VOLTAGE BOOSTING
The MCI563 offers a remote sensing capability. This
is important when the load is remote from the regulator,
as the resistances of the interconnecting lines (VEE and
GND) are added directly to the output impedance of the
regulator. By remote sensing, this resistance is included
inside the control loop of the regulator and is essentially
eliminated. Figure 33 shows how remote sensing is accomplished using both a separate sense line from pin 8 and a
separate ground line from the regulator to the remote load.
REMOTE SENSING
Some applications may require a high output voltage
which may exceed the voltage rating of the MC1563. This
must be solved by assuring that the IC regulator is operated
within its limits. Three points in the regulator need to
be considered:
1. The input voltage (pin 4),
2. the output voltage (pin 6) and,
3. the output sense lead (pin 8).
\
1-=-
1/
0.1
jJ.F
2
GN D
6.8 k
3
Case/10
+
1
4
O.OOlIt F
Vin
Rsc
+
MC1563
MC1463
9
7
8
5
6
FIGURE 33 - Remote Sensing Circuit
(MC1S63 - Pg. 121
8-334
RA
-
10jJ.F
RL
MC1563, MC1463 (continued)
GND
~
0.1
IJ-F
2
RB
= 6.8 k
RA
=1 k
10
3
1
4
Vin = -10 Vdc
MCI563G
MC1463G
-
9
VZ"" -4 Vdc
IZ:::; 1 mA (max)
70f-08
1-0 6
50-
Vz
= -3.5 (1
RA
+-
I
RB
FIGURE 34 - An Adjustable "Zero·TC" Voltage Source
AN ADJUSTABLE ZERO-TEMPERATURECOEFFICIENT (O-TC) YOLTAGE REFERENCE
SOURCE
1O-3y/oC). By setting -0.61 Ydc externally, at pin 2, the
regulator will shutdown when the chip temperature reaches
approximately 1400 C. Figure 35 shows a circuit that uses
a zero-TC zener diode and a resistive divider to obtain
this vol tage.
In the case where an external pass transistor is employed;
its temperature, rather than that of the IC regulato(-, requires controL A technique similar to the one just discussed can be used by directly monitoring the case temperature of the pass transistor as is indicated in Figure 36.
The case of the normally "OFF" thermal monitoring
transistor, Q2, should be in thermal contact with, but
electrically isolated from, the case of the boost transistor, QI.
The MC1563, when used in conjunction with 10w·TC
resistors, makes an excellent reference-voltage generator.
If the -3.5 volt reference voltage of the IC regulator is a
satisfactory. value, then pins 1 and 9 can be tied together
and no resistors are needed. This will provide a voltage
reference having a typical temperature coefficient of
0.002%/oC. By adding two resistors, RA and RB, any
voltage between -3.5 Ydc and -37 Ydc can be obtained
with the same low TC (see Figure 34)
THERMAL SHUTDOWN
By setting a fixed voltage at pin 2, the MCl563 chip
can be protected against excessive junction temperatures
caused by power dissipation in the IC regulator. This is
based on the negative temperature coefficient of the
base-emitter junction of the shutdown transistor (-1.9 x
THERMAL CONSIDERATIONS
Monolithic voltage regulators are subjected to internal
heating similar to a power transistor. Since the degree of
internal heating is a function of the specific application,
GND
~
O.IIJ-F
270
lN3826
l2
or Equiv
~!::
5.8 k
-0.61 Vdc
r,t-
3
Case/10
+
2k
1
RA
4
5.6 k
5 mA
Vi" - 33 Vdc
1
J
O.OOIIJ- F
R sc
+
MC1563
MC1463
9
8
7
5
6
FIGURE 35 - Junction Temperature Limiting Shutdown Circuit
(MC1563 - Pg. 13)
8-335
-
10IJ-F
RL
MC1563, MC1463 (continued)
the designer must use caution not to exceed the specified
maximum junction temperature (+ 17 SOC). Exceeding this
limit will reduce reliability at an exponential rate. Good
heatsinking not only reduces the junction temperature for
a given power dissipation; it also tends to improve the dc
stability of the output voltage by reducing the junction
temperature change resulting from a change in the power
dissipation ofthe IC regulator. By using the derating factors
or thermal resistance values given in the Maximum Ratings
Table of this data sheet, junction temperature can be com·
puted for any given application in the same manner as for
a power transistor *. A short·circuit on the output terminal
can produce a "worst-case" thermal condition especially
if the maximum input voltage is applied simultaneously
with the maximum value of short-circuit load current
(500 mA). Care should be taken not to exceed the maximum junction temperature rating during this fault condition and, in addition, the dc safe operating area limit (see
Figure 22).
Thermal characteristics for a voltage regulator are useful
in predicting performance since dc load and line regulation
are affected by changes in junction temperature. These
temperature changes can result from either a change in
the ambient temperature, TA, or a change in the power
dissipated in the IC regulator. The effects of ambient
temperature change on the dc output voltage can be estimated from the "Temperature Coefficient of Output
Voltage" characteristic parameter shown as ±0.002%/oC,
typical. Power disSipation is typically changed in the IC
regulator by varying the dc load current. To estimate the
dc change in output voltage due to a change in the dc load
current, three effects must be considered:
I. junction temperature change due to the change in
the power dissipation
2. output voltage decrease due to the finite output
impedance of the control amplifier
3. thermal gradient on the IC chip.
A temperature differential does exist across a power IC
chip and can cause a dc shift in the output voltage. A
"gradient coefficient," GCVO, can be used to describe this
effect and is typically +0.03%/watt for the MC1563R. For
an example of the relative magnitudes of these effects,
consider the following conditions:
Given:
with
and
1
1N 4001 1
or Equiv
~
.
220
,.l
1
I
390
I
I
I
I
1
I
Rsc
.1
TO-66 Type Case with heatsink
~!:::: 0.1
"F
2
3
Case/l0
I
I
I
6.8 k
1
4
I
~
I
T A = +25 0 C
GND
~qUiV
I
I
0.001 "F
or
assume
IL = 100 mA to 200 mA
(.t>IL = 100 mA)
10k
2N2221
02
Yin = -10 Vdc
VO=-SVdc
*For more detailed information of methods used to compute junction temperature, see Motorola Application
Note AN-226, Measurement of Thermal Properties of
Semiconductors.
10 k
MCI563R
RA
7
MC1563
MC1463
9
5
6
or Equiv
L _____ J-Common Heat Smk
FIGURE 36 - Thermal Shutdown When Using External Pass Transistors
(MC1563 - Pg. 14)
8-336
::"F
8
G~2N3771
Q1
+
- 100
RL
MC1563, MC1463 (continued)
assume
and
Ocs =0.2 0C/W
OSA
=20C/W
3. 6. Va due to gradient coefficient, GCVO
ILi VOl = (GCVO)(VO)(LiPo)
It is desired to find the 6. Va which results from this 6.1L.
Each of the three previously stated effects on Va can now
be separately considered.
I.
L'. Va
OR
ILi vol = (+3 x 1O- 4 /W)(5 volts)(5 x 10- 1W)
ILi vol = +0.8 mV
due to 6. TJ
Therefore the total Li Va is given by
6. Va = (VO)(bl'D)(TCVO)(OJC+ OCS+OSA)
L'.
Va = (5 V)(5VxO.l A)(±0.002%/oC)(19.20C/W)
OR
ILi Va total I = ± 1.0-2.0 +0.8 mV
-2.2 mV .;;;Ivo total
6.Vo"'±1.0mW
2. 6. Vo due to Zo
I.;;; -0.2 mV
Other operating conditions may be substituted and computed in a similar manner to evaluate the relative effects
of the parameters.
/6. Vol =(-Zo)(IL)
16. VOl = -(2 x 10- 2)(10- 1) = -2 mV
Typical Printed Circuit Board Layout
2"
(MC1563 - Pi!. 15)
8-337
MC1563, MC1463 (continued)
FIGURE 37 - Location of Components
Note 1:
When Radj is used it is necessary to
~emove
the copper
which shorts out Radj.
Note 2:
Extra holes are available in the circuit board to permit
two resistors to be paralleled to obtain the desired
value of Rsc.
Note 3:
If pin 2 is used to shut down the regulator, remove the
copper which shorts pin 2 to ground.
Note 4:
Remote sensing can be achieved by removing the copper
which shorts pin 8 to pin 6 and connecting pin 8 directly
to the "minus" load terminal. The circuit board ground
should be connected to the unregulated power supply
ground at the "plus" load terminal.
Typical Circuit Connection for Output Voltages Between -3.5 and -37 Volts
r--.----------------------~----~----~--------~~--~--~~--eGND
=
CASE
6.B k
r--.....I---,...2.-o----i
RB
V ref
RA"+
Ql
MC1563R
MC1463R
-
Co
10 jlF
Radj
9.
VO~-3.5(1
Yo
Vin
Select RA
+ Radj to Give Desired VO:
RA
+ Radj ~(21 Vo 1-7) kH with RB = 6.8 kH
PARTS LIST
Compo~ent
Value
RA
RS
Radj
Select
6.8 k
Select
Rsc
R·L
Co
Select
Select
10jlF
Desc:ription
}
1/4 or 1/2 watt carbon
IRC Model X·201,Mallory·Model MTC-1
or eql:-livalen.t
1/2 watt carbon
Jl
For minimum current of 1 mAde
.
Sprague 1500 Series, D·ickson D 1OC series
or equivalent
Ceramic Disc - Centralab DDA 104, or equivalent
Sprague TG-P10, or equivalent
Jumper
Q1
MC1563R or MC1463R
Cn
Cc
0.1 jlF }
0.001 jlF
,~~HS
*Socket
PC Board
Heatsink Thermalloy #6168B or equivalent
(Not Shown)
Robinson Nugent #0001306 or equivalent
Electronic Molding Corp. #6341·210-1,
6348-188·1, 6349-188-1 or equivalent
Circuit DOT, Inc. HPC1113 or equivalent
1155 W. 23rd St.
Tempe, Arizona 85281
·Optional
(MC1563 - Pg. 16)
8-338
RA + Radj
+ ----I
RB
~f
~_______M_U__LT_I_-P_U_R_P_O_S_E_R__EG_U__LA__TO__R_S~
MC1566L
MC1466L
Specifications and Applications InforIDation
MONOLITHIC VOLTAGE AND
CURRENT REGULATOR
This unique "floating" regulator can deliver hundreds of volts limited only by the breakdown voltage of the external series pass tran·
sistor. Output voltage and output current are adjustable. The MC1466/
MC1566 integrated circuit voltage and current regulator is designed to
give "laboratory" power·supply performance.
•
Voltage/Current Regulation with Automatic Crossover
•
Excellent Line Voltage Regulation, 0.01% +1.0 mV
•
Excellent Load Voltage Regulation, 0.01% +1.0 mV
•
Excellent Current Regulation, 0.1% + 1.0 mA
EPITAXIAL PASSIVATED
CERAMIC PACKAGE
CASE 632
• Short·Circuit Protection
•
PRECISION WIDE-RANGE
VOLTAGE and
CURRENT REGULATOR
Output Voltage Adjustable to Zero Volts
•
I nternal Reference Voltage
•
Adjustable I nternal Current Source
_
TO·116
TYPICAL APPLICATIONS
FIGURE 1 - D·TO·15 VOC, 10-AMPERES REGULATOR
FIGURE 2 - D·TO·4D VDC, D.5·AMPERE REGULATOR
+20Vdc
lN4DOI
OREDUIV
0.'
SOIlFl
FIGURE 3 - D·TO·25D VDC, D.l·AMPERE REGULATOR
lN4001
OR EDUIV
lhF
J
CRS
v,
v,
l-
FIGURE 4 - REMOTE PROGRAMMING
2.'
'l
'l
+
INPUT VII
-l
l-
(MC1566L - Pg. 1)
See Packaging Information Section for outline dimensions.
8-339
('-'l.:
FO.Vp<"Vd,.
"0)
RS
MC1566L, MC1466L (continued)
MAXIMUM RATINGS (TA
=
+25 0 C unless otherwise noted)
Symbol
Rating
Auxiliary Voltage
Value
Unit
Vdc
Vaux
30
MCl466
MC1566
35
Power Dissipation (Package Limitation)
Derate above T A = +500C
750
6.0
Po
1/6JA
Operating Temperature Range
TA
mW
mW/oC
uc
a to +75
MC1466
MC1566
-55 to +125
Storage Temperature Range
°c
-65 to +150
Totg
ELECTRICAL CHARACTERISTICS (T A = +25 0 C, Vaux = +25 Vdc unless otherwise noted)
Characteristic Definition
I..
2N2222
It!
j..;t'
0.1
V.UX
10pF
"
MCI46t"
13
MCI566
-L or 'j
~ 'rtf
~
-+Vol'
OREOUl~
,
6
"""
240pf
Symbol
Min
Typ
Max
21
20
-
30
35
-
9.0
7.0
12
B.5
17.3
17.5
lB.2
lB.2
19.7
19
O.B
0.9
1.0
1.0
1.2
1.1
-
6.0
3.0
12
6.0
-
-
360
300
a
40
3.0
15
15
25
MCI466
MC1566
-
1.0
0.7
3.0
1.0
mV
MCI466 aVrefIVref
MC1566
-
0.015
0.004
0.03
0.01
%
MCI466
MC1566
-
-
1.0
0.7
3.0
1.0
mV
MCI466 aVrefIVref
MCI566
-
0.015
0.004
0.03
0.01
%
-
0.01
0.006
0.004
-
3.0
15
15
25
-
-
0.2
0.1
%
-
-
1.0
1.0
mAdc
Characteristic
DR EOUIV
)
Auxiliary Voltage (Sae Notes 1 & 2)
(Voltage from pin 14 to pin 7)
MC1466
MC1566
Vaux
Auxiliary Current
laux
MCI466
MCI566
Internal Reference Voltage
(Voltage from pin 12 to pin 7)
II
Reference Current (See Note 3)
!l
'9.. 2" "'
Co IIFJ
:!: t:l /
-=50 ~..;.
Input Current·Pin B
IB
MCI466
MC1566
I.O
Power Dissipation
Po
MC1466
MC1566
I
5
,~
MCI566
~
'III Vj(w
112
Ut~"
6
240pf SI
DREQUIV
II
B.55ki,l%
11k
114
Uk
CD
1.0llFI
-=
:L
5
-=
L
liD
v~~
,"zn2~
OREQUIV
~o
2.""
2ND!
DREQUIV
!
r-j!:~
1.25
10"F
Me14811"
6
Line Voltage Regulation
(See Note 6)
I.Ok
~
I~
Load Voltage Regulation
(See Note 5)
2N3D55
10
• U
In
OIlEOUIV
j2.:II' )
P
'9."~2"h
l: .
MCl48r
13
-~
Input Offset Voltage, Voltage Control
Amplifier (See Note 4)
MC1466
MC1566
'''''''~
:m
Vdc
mAdc
A'''S.SSt :t ,%
-=
J. ~
mAdc
1ref
MC1466
MC1566
I.Ok
Vdc
VIR
MC1466
MC1566
Units
)
Viov
aViov
aViov
Temperature Coefficient of Output Voltage
MCI466
(TA = a to +75 0 C)
(T A = -55 to +25 0 C)
MCI566
MC1566
(TA = +25 to +1250 C)
TCV o
Input Offset Voltage, Current Control
Amplifier (5.. Note 4)
MCI466
(Voltage from pin 10 to pin 11) MCI566
Vioi
I'Adc
-
a
mW
mVdc
%loC
-
mVdc
40
Mtl_
14
'~.'y2'i'.","
'1m
'.56ksl" 111i;
-=
".
Load Current Regulation
(See Note 7)
500
Y,
:~ksl" L.-;'~ c'±~l
. ';" 1.O,,~50-= -.f,
... In, 1 and 4 no connect on.
alL/IL
MCI466
MCI566
MCI466
MCI566
(MC1666L - Pg. 21
8-340
-
alref
-
-
MC1566L, MC1466L (continued)
NOTE 1:
The instantaneous input voltage, Vaux . must not exceed
the maximum value of 30 volts for the MC1466 or 35
volts for the MC1566. The instantaneous value of Vaux
Load Voltage Regulation =
IlVrel 1100%) + LlViov •
Vrel
NOTE 6:
Line Voltage Regulation is a function of the same two
additive components as Load Voltage Regulation, .6. Viov
and .6.V re f (see note 5). The measurement procedure is:
must be greater than 20 volts for the MC1566 or 21
volts for the MC1466 for proper internal regulation.
NOTE 2:
Theauxiliary supply voltage Vaux . must "float" and be
electrically isolated from the unregulated high voltage
supply. Vin'
NOTE 3:
a.
Set the auxiliary voltage, V aux , to 22 volts for
the MC1566 or the MC1466. Read the value of
Viov (1) and Vref (1)'
b. Change the Vaux to 28 volts for the MC1566 or
the MC1466 and note the value of Viov (2) and
V re f(2)' Then compute Line Voltage Regulation:
Reference current may be set to any value of current
less than 1.2 mAde by applying the relationship:
Irel ImA) = 8.55
•
Rllkfl)
NOTE 4:
A built-in offset voltage (15 mVdc nominal) is provided
so that the power supply output voltage or current may
be adjusted to zero.
NOTE 5:
Load Voltage Regulation is a function of two additive
components, 6,Viov and ~Vref, where .lViov is the
change in input offset voltage (measured between pins 8
and 9) and .6. V ref is the change in voltage across R2
(measured between pin B and ground). Each component
may be measured separately or the sum may be
measured across the load. The measurement procedure
for the test circuit shown is:
a. With 51 open (14 = 0) measure the value of Viov (1)
and Vrel 11)
b. Close 51, adjust R4 so that 14 = 500 IJ.A and note
Viov (2) and Vrel (2).
Then IlViov = Viov (1) - Viov (2)
% Reference Regulation :=
IlViov = IlViov 111 - Viov (2)
% Reference Regulation =
[V rel(1)-V reI12)[ 1100%)= LlVrel 1100%)
Vrelll)
Vrel
Line Voltage Regulation =
LlVrel
- - 1100%) + IlViov •
Vref
NOTE 7:
Load Current Regulation is measured by the following
procedure:
a. With 52 open, adjust R3 for an initial load current,
I Lll). such that Vo is 8.0 Vdc.
b. With 52 closed, adjust RT for Vo = 1.0 Vde and read
iL(2). Then Load Current Regulation =
[iL(2) -ILll)1
ILll)
1100%) + Irel
where Iref is 1.0 mAde, Load Current Regulation is
specified in this manner because I ref passes through
the load in a direction opposite that of load current
and does not pass through the current sense reo
sistor, Rs_
[V,ellll- Vre1121[ 1100%1= t.Vrel 11000/,)
Vref (1)
Vref
0
•
INTERIIAL
VOLTAGE
REBULATOR
REFERENCE
CURRENT
SOURCE
VOLTAGE
CONTROL
AMPlIFIER
IMC1S66L - Pg. 3)
8-341
CURRENT
CONTROL
AMPlifiER
.R
OUTPUT
AMPLIFIER
MC1566L, MC1466L
(continued)
FIGURE 6 - TYPICAL CIRCUIT CONNECTION
CRS
Vin
Q'
"
1.2k
MC1466
MC1S66
240pF
11
10
11
91
R1
R3
500
,,,
CURRENT
LIMIT
ADJUST
CR5
H,
• 'L
PirsI arw:l4notoooection.
C'l
HL
.
v,
r-
NORMAL DESIGN PROCEDURE AND DESIGN CONSIDERATIONS
6. The AC network 110 pF, 240 pF, 1.2 k ohms) is used for
1. Constant Voltage:
compensation. The values shown are valid for all applications.
For constant voltage operation, output voltage Va is given by:
Vo
= (lref)
However, the 10 pF capacitor may be omitted if fr of 01 and
02 is greater than 0.5 MHz.
IA2)
where R2 is the resistance from pin 8 to ground and Iref is the
output current of pin 3.
The recommended value of Iref is 1.0 mAde. Resistor R 1 sets
7. For remote sense applications, the positive voltage sense terminal (pin 9) is connected to the positive load terminal through a
separate sense lead; and the negative sense terminal hhe ground
the value of Iref:
side of A2) is connected to the negative load terminal through
Iref = S.5
Al
where Rl is the resistance between pins 2 and 12.
a separate sense lead.
2. Constant Current:
For constant current operation:
(a) Select Rs for a 250 mV drop at the maximum desired regulated output current, I max'
(b) Adjust potentiometer R3 to set constant current output at
desired value between zero and I max-
S. Co may be selected by using the relationship:
Co = 1100 "F) ILlmax), where ILimax) is the maximum load
current in amperes.
9. C2 is necessary for the internal compensation of the MC14661
MC1566.
10.
~~:e~g~~u:A~~ui~~~.:i;'~~';;,~~~t o~l ~~J'~25~u~~ tS~:~ld not
Imax
~1~2 ..; 0.5 mAdc
3. If Vin is greater than 20 Vdc, CA2, CA3, and CA4 are necessary
to protect the MC1466/MC1566during short·circuit or transient
where: lmax = maximum short.-circuit load current (mAde)
conditions.
jll
4. In applications where very low output noise is desired, R2 may
01
Although Pin 5 will source up to 1.5 mAde, 15> 0.5 mAdc
CRl is necessary for protection during short-circuit conditions.
will result in a degradation in regulation.
5. CA5 is recommended to protect the MC1466/MC1566 from
simultaneous pass transistor failure and output short-circuit.
= minimum beta of
(32 "" minimum beta of Q2
be bypassed with Cl10.1 "F to 2.0"F). When A2 is bypassed.
11. CA6 is recommended when Va,.> 150 Vdc and should be rated
such that Peak I nverse Voltage.? Vo.
IMCI566L - Pg. 4)
8-342
MC1566L, MC1466L (continued)
OPERATION AND APPLICATIONS
This section describes the operation and design of the MC!566/MC!466 voltage and current regulator and also provides
information on useful applications.
SUBJECT SEQUENCE
Theory of Operation
Applications
Transient Failures
Voltage/Current· Mode Indicator
THEORY OF OPERATION
yields a good working PNP from a lateral device working
at a collector current of only a few microamperes. Its base
vol tage (V B2) is derived from a temperature compensated
portion of the diode string and consequently the overall
current is dependent on the value of emitter resistor RI.
Temperature compensation of the base emitter junction
of Q3 is not important because approximately 9 volts
exists between VB2 and V12, making the AVBE's very
small in percentage. Circuit reference voltage is derived
from the product of IR and RR; if IR is set at I mA
(R! = 8.5 Hl.), then RR (in kn) = Yo. Other values of
current may be used as long as the following restraints are
kept in mind: I) package dissipation will be increased by
about 11 mW/mA and 2) bias current for the voltage control
amplifier is 3 /lA, temperature dependent, and is extracted
from the reference current. The reference current should
The schematic of Figure 5 can be simplified by break·
ing it down into basic functions, beginning with a simplified
version of the voltage reference, Figure 7. Zener diodes
CRI and CR5 with their associated forward biased diodes
CR2 through CR4 and CR6 through CR8 form the stable
reference needed to balance the differential amplifier. At
balance (VB! = VB2), the output voltage, (V12 - V7),
is at a value that is twice the drop across either of the two
diode strings: V12 - V7 = 2 (VCRI + VCR2 + VCR3 +
VCR4). Other voltages, temperature compensated or otherwise, are also derived from these diodes strings for use in
other parts of the circuit.
The voltage controlled current source (Figure 8) is a
PNP-NPN composite which, due to the high NPN beta,
FIGURE 7 - REFERENCE VOLTAGE REGULATOR
12
14
1
~: : :~';~
.T
Regulated
Vaux
Voltage
VBl
Rl
2
T
VZ""9 V
~~---l
03
18 V
Equivalent
Diode
VZ""9 V
FIGURE 8 - VOLTAGE CONTROLLED CURRENT SOURCE
18 k
7
1
IIR= VZ-VBE..,8.SS
Rl
Rl
+
(MC1566L - Pg. 5)
8-343
MC1566L, MC1466L(continued)
be at least two orders of magnitude above the largest expected bias current.
FIGURE 10 - CURRENT CONTROL CIRCUIT
12
6
~~--~---------
Loop amplification in the constant voltage mode is
supplied by the voltage controlled amplifier (Figure 9), a
standard high-gain differential amplifier_ The inputs are
diode-protected against differential overvoltages and an
emitter degenerating resistor, Ros, has been added to one
of the transistors. For an emitter current in both QS and
Q6 of 1/2 milliampere there will exist a preset offset voltage in this differential amplifier of 15mV to insure that
the output voltage will be zero when the reference voltage
is zero. Without ROS, the output voltage could be a few
millivolts above zero due to the inherent offset. Since the
load resistor is so large in this stage compared with the
load (Q9) it will be more instructive to look at the gain on
a transconductance basis rather than voltage gain. Transconductance of the differential stage is defined for small
signals as:
1
gm=--2re + RE
(1)
where
0.026
r ""-- and
IE
e
RE = added emitter degenerating resistance.
For IE = 0.5 rnA,
I
1
gm = 104 + 30 = 134 = 7.5 rnA/volt.
(2)
FIGURE 9 - VOLTAGE CONTROL AMPLIFIER
12
6
19.6k
8k
Preregulated
18 V
5
10
V2
9
This level is further boosted by the output stage such that
in the constant voltage mode overall transconductance is
about 300 rnA/volt.
A second differential stage nearly identical to the first
stage, serves as the current control amplifier (Figure 10).
The gain of this stage insures a rapid crossover from the
constant voltage to constant current modes and provides
a convenient point to control the maximum deliverable
load current. In use, a reference voltage derived from the
pre regulator and a voltage divider is applied to pin 10
while the output current is sampled across RS by pin II.
When IL RS is IS mV below the reference value, voltage
V I begins. to rapidly rise, eventually gaining complete
control of Q9 and limiting output current to a value of
V2/RS. If V2 is derived from a variable source, short
circuit current may be controlled over the complete output current capability of the regulator. Since the constantvoltage to constant-current change-over requires only a few
millivolts the voltage regulation maintains its quality to
the current limit and accordingly shows a very sharp
"knee" (1% +1 rnA, Figure 11). Note that the regulator
can switch back into the constant voltage mode if the
output voltage reaches a value greater than YR. Operation
through zero milliamperes is guaranteed by the inclusion
of another emitter offsetting resistor.
FIGURE 11 - VI CURVE FOR D-TO-4D V,
D.S-AMPERE REGULATOR
iii
f-
40
..J
7
0
?
30
w
<.:l
500
8
Reference Voltage
500
«
f-
20
0
10
..J
>
>'
+7.25V 9
+ Output Sense
0.1
VR
0.2
0.3
0.4
0.5
I, CURRENT (AMPERES)
(MC1566L - Pg. 6)
8-344
MC1566L, MC1466L (continued)
Transistor Q9 and five diodes comprise the essential
parts of the output stage (Figure 12). The diodes perform
an "OR" function which allows only one mode of operation
at a time - constant current or constant voltage. However,
an additional stage (Q9) must be included to invert the
logic and make it compatible with the driving requirements
of series pass transistors as well as provide additional gain.
A 1.5 rnA collector current source sets the maximum deliverable output current and boosts the output impedance
to that of the current source.
Note that the negative (substrate) side of the MC1566/
MCI466 is 7.25 volts lower than the output voltage, and
the reference regulator guarantees that the positive side is
II volts above the output. Thus the IC remains at a voltage
(relative to ground) solely dependent on the output, "floating" above and below Vo. VCE across Q9 is only two or
three VBE's depending on the number of transistors used
in the series pass configuration.
Performance characteristics of the regulator may be
approximately calculated for a given circuit (Figure 2).
Assuming that the two added transistors (Q12 and Q13)
have minimum beta's of 20, then the overall regulator
transconductance will be:
gmT = (400)300 rnA/volt = 120 A/volt.
(3)
For a change in current of 500 rnA the output voltage
will drop only:
0.5
b. V = - = 4.2mV.
120
(4)
FIGURE 12 - MC1S66 OUTPUT STAGE
r·______
prer~~u~ted---------<~
From Currant
Control A mpl ifier
C:~:';I ~~:I~~er
The analysis thus far does not consider changes in VR
due to output current changes. IfIL increases by 500 rnA
the collector current of Q9 decreases by 1.25 rnA, causing
the collector current of Q5 to increase by 30 p.A. Accordingly, IR will be decreased by ~.30 p.A which will drop
the output by 0.03%. This figure may be improved considerably by either using higil beta devices as the pass
transistors, or by increasing IR. Note again, however, that
the maximum power rating of the package must be kept
in mind. For example if IR = 4 rnA, power dissipation is
PD = 20 V (8 rnA) + (II V x 3 rnA) = 193 mW. (5)
This indicates that the circuit may be safely operated up
to 1180 C using 20 volts at the auxiliary supply voltage.
If, however, the auxiliary supply voltage is 35 volts,
PD =35 V (8 rnA) + 26 V (3 rnA) =358 mW.
(6)
which dictates that the maximum operating temperature
must be less than 91 0 C to keep package dissipation within
specified limits.
Line voltage regulation is also a function of the voltage
change between pins 8 and 9, and the change of Vref. In
this case, however, these voltages change due to changes in
the internal regulator's voltages, which in turn are caused
by changes in Vaux . Note that line voltage regulation is
not a function of Yin. Note also that the instantaneous
value of Vaux must always be between 20 and 35 volts.
Figure 6 shows six external diodes (CRI to CR6) added
for protective purposes. CRI should be used if the output
voltage is less than 20 volts and CR2, CR3 are absent. For
Vo hig11er than 20 volts, CRI should be discarded in favor
of CR2 and CR3. Diode CR4 prevents IC failure if the
series pass transistors develop collector-base shorts while
the main power transistor suffers a simultaneous open emitter. If the possibility of such a transistor failure mode
seems remote, CR4 may be deleted. To prevent instantaneous differential and common-mode breakdown of the
current sense amplifier, CR5 must be placed across the
current limit resistor Rs.
Load transients occasionally produce a damaging reversal
of current flow from output to input Vo > 150 volts (which
will destroy the IC). Diode CR6 prevents such reversal
and renders the circuit immune from destruction for such
conditions, e.g., adding a large output capacitor after the
supply is turned "on". Diodes CRI, CR2, CR3, and CR5
may be general purpose silicon units such as I N400 I or
equivalent whereas CR4 and CR6 should have a peak inverse
voltage rating equal to Vin or greater.
APPLICATIONS
} - - -.....-
.... Vin
Figure 2 shows a typical O-to-40 volts, 0.5-ampere regulator with better than 0.01% performance, The RC network between pins 5 and 6 and the capacitor between pins
13 and 14 provide frequency compensation for the MC1566/
MC1466. The external pass transistors are used to boost
load current, since the output current of the regulator is
less than 2 rnA.
(MC1566L - Pg. 7)
8-345
•
MC1566L, MC1466L (continued)
Figure I is a 0-to-15 volts, IO-ampere regulator with the
pass transistor configuration necessary to boost the load
currentto 10 amperes. Note that Co has been increased to
1000 p.F following the general rule:
tible with a short-circuit current of 100 mAo Yet current
foldback allows us to design for a maximum regulated load
current of 500 mAo The pertinent design equations are:
Let R2 (k!l) = Vo
Co =100 p.F/A IL.
a
=0.25 [~_ I]
Vo
The prime advantage of the MC1566/MC1466 is its use
as a high voltage regulator, as shown in Figure 3. This
0-to-250 volts OJ-ampere regulator is typical of high voltage applications, limited only by the breakdown and safe
areas of the output pass transistors.
ISC
a
RI (k!l)=r:a Vo
0.25
C =(I -a) ISC
Rs
The primary limiting factor in high voltage series regulators is the pass transistor. Figure 13 shows a safe area curve
for the MJ413. Looking at Figure 3, we see that if the
output is shorted, the transistor will have a collector current of 100 mA, with a VCE approximately equal to 260
volts. Thus this point falls on the dc line of the safe area
curve, insuring that the transistor will not enter secondary
breakdown.
FIGURE 13 - SAFE AREA CURVE FOR THE MJ413
~
~ 1°~IIIIII~I$!
""
100"s
~
~
Z
~
w
::l
In this respect (Safe Operating Area) the foldback circuit
of Figure 14 is superior for handling high voltages and yet
is short-circuit protected. This is due to the fact that load
current is diminished as output voltage drops (VCE increases
as V0 drops) as seen in Figure IS. By careful design the
load current at a short, ISC can be made low enough such
that the combined VCE (Vin) and ISC still falls within the
dc safe operating area of the transistor. For the illustrated
design (Figure· 14), an input voltage of 210 volts is compa-
. ==--
10
U
a:
~
U
TJ "" IS0°C
~
\....
d
THERMAL LIMITATION
AT Tc""
25°C
SECONDARY
BREAKDOWN
LIMITATION
(BASE·EMITTER DISSIPATION IS
PERCEPTIBLE ABOV£ Ie -:-: 5 A.)
The Safe Operating Area Curves indio
c~te Ic-Vc1limitsbelowwhich Ihedevice
will not enter secondary breakdown. Col·
1.0 ml
~~~CII~~'\.~I'II
\.
++t+ttlf---'lcl--++t+t+tt
~ 0.1:: avoid
~~~:o~il::i~
I~~~Sa~:~I:~~~c
cau5inl
catastrophic;!~~U~~e~u:!
failure. To ~~III~~~~III
.J
o
o
.E
insure operation below the maximum TJ•
power·temperature derating musl be
=~~~~r.i=~h steady slate and pulse
++t+ttf+--+-++t+t+H
0.01 L::--,.I~I.....l,,.w.,LJ.II.l:----:.l:-J......,w.,l:1J.J..I.,,.....,~-I..:-:L::-L..J..L:L!-!
1.0 2.0 4.06.0 10
20
4060 100 200 400
1000
VCE. COLLECTOR·EMITTER VOLTAGE (VOLTS)
FIGURE 14 - A 200 V. O.5-AMPERE REGULATOR WITH CURRENT FOLDBACK
lN4005
OR EOUIV
MJ421
OR EOUIV
•
1''''
1
14
5
13
6
I'T-:>"...--..--+l......... Vin
= 210 V
1.2 k
MC1466
MC1566
25V
240 pF
15k
11
1 k
10
>-----<>--l7
8
RSC 2.5
nl1w
18 k
500
lN4001
OR EOUIV ..-. .I -.....~_ _ _ _ _ _ _ _ _ _ _ _....._ _ _ _ _ _ _ _....._
•
200 k
• Vo=200V
RL
-=
(MC1566L - Pg. 8)
8-346
...
1
MC1566L, MC1466L (continued)
from hundreds to thousands of volts in magnitude and only
microseconds in duration. Under some conditions this energy is dissipated across the internal zener connected between pins 9 and 7. This transient condition may produce
a total failure of the regulator device without any apparent
explanation. This type of failure is identified by absence
of the 7-volt zener (CRI) between pin 9 and pin 7. To prevent this failure mode, two solutions have been successfully
applied. The first method involves the use of an external
zener and resistor that shunt more of the transient energy
around the IC (Figure 17). The second method is a transient suppression network consisting of capacitors that
equalize high frequency components across both the auxiliary and main supply. Figure IS illustrates the use of five
capacitors for the full wave rectified main supply and
Figure 19 uses six capacitors when a full wave bridge is used.
The terms ISC and Ik correspond to the short-circuit
current and maximum available load current as shown in
Figure IS.
FIGURE 15 - TYPICAL FOLDBACK PERFORMANCE
250
u
-0
~
200
/
w
Cl
V
«
I- 150
..J
o
>
j
100
1=
::>
0" 50
>
o
o
V
V
/
ISC
/
V
/
200
VOLTAGE/CURRENT - MODE INDICATOR
600
There may be times when it is desirable to know when
the MCIS66/MCI466 is in the constant current mode or
constant voltage mode. A mode indicator can be easily
added to provide this feature. Figure 20 shows how a PNP
transistor has replaced a protection doide between pins S
and 9 of Figure 2. When the MC I S66/MC 1466 goes from
constant voltage mode to constant current mode, Vo will
drop below Vs and the PNP transistor will turn on. The
I-rnA current supplied by pin S will now be shunted to
ground through RI in parallel with R2, which provides a
control voltage, VC. This voltage Vc can then control a
Schmitt trigger which drives front panel lamps to indicate
"constant current" or "constant voltage."
10 • OUTPUT CURRENT (mAde)
Figure 16 shows a remote sense application which should
be used when high current or long wire lengths are used.
This type of wiring is recommended for any application
where the best possible regulation is desired. Since the
sense lines draw only a small current, large voltage drops
do not destroy the excellent regulation of the MC I S66/
MC1466.
TRANSIENT FAILURES
In industrial areas where electrical machinery is used
the normal ac line often contains bursts of voltage running
FIGURE 16 - REMOTE SENSE
MJE340
OR EQUIV
+ 14
5
13
6
T''''
MJ413
1
240pF
MC1466
MC1566
25 V
-
OR EQUIV
11
7
10
RS
8
18 k
8.55 k
A II diodes are
lN40010r
equivalent.
+
Rref
500
+
10llF
Note: All Ground Connections at Load Site.
(MC1566L - Pg. 9)
8-347
•
MC1566L, MC1466L (continued)
FIGURE 17 - A 0-TO-250 VOLT, O_l-AMPERE REGULATOR
MJE340 OR EOUIV
";--:;0...---_,*-<> Vin - 260 V
+ 14
5
rO'I~F
25
MJ413 OR EOUIV
6
v
1
MC1466
MC1566
15 k
1 k
11
100 _
10
8
2.5
500
Vz"" 8 V
All diodes are
lN40010r
250 k
Va Adjust
1
equivalent.
FIGURE 18 - HALF-WAVE RECTIFIER
WITH TRANSIENT SUPPRESSION
MAIN
J
J
FIGURE 19 - FULL·WAVE RECTIFICATION
WITH TRANSIENT SUPPRESSION
SUPPLY
C
1-
C
C=0.33~F
14
C
Vaux
J
J
MAIN
SUPPL Y
C
C = 0.33)lF
14
Vaux
C
FIGURE 20 - O-TO-40 Vdc, O.5-AMPERE REGULATOR WITH MODE INDICATOR
14
5
+50 Vdc
r
25 Vdc
I
0.5
I
VC. (CONTROL VOL TAGE TO SCHMITT TRIGGER)
·Select Q1 such that VCEO
(MC1566L - Pg. 10)
8·348
> Va'
MC1568
MC1468
\
....._ _ _
D_U_A_L_V_O_L_T_A_G_E_R_EG_U_LA_T_O_R_S_---'
DUAL ± 15-VOLT
TRACKING REGULATOR
DUAL±1~VOLTREGULATOR
The MC 1568/MC 1468 is a dual po larity track ing regu lator designed
to provide balanced positive and negative output voltages at currents
to 100 mAo Internally, the device is set for ± 15·volt outputs but an
external adjustment can be used to change both outputs simul·
taneously from 8.0 to 20 volts. Input voltages up to ± 30 volts can
be used and there is provision for adjustable current limiting. The
device is available in three package types to accomodate various
power requirements.
•
Internally set to± 15 V Tracking Outputs
•
•
Output Currents to 100 mA
Outputs Balanced to within 1% (MCI568)
•
•
•
Line and Load Regulation of 0.06%
1% Maximum Output Variation due to Temperature Changes
Standby Current Drain of 3.0 mA
•
•
•
Externally Adjustable Current Limit
Remote Sensing Provisions
Case is at Ground Potential (R suffix package)
MONOLITHIC SILICON
INTEGRATED CIRCUIT
'$;'
~
~
0- ~ :-0
"
(bottom view)
CASE 603
METAL PACKAGE
G SUFFIX
CASE 632
CERAMIC PACKAGE
TO-"6
L SUFFIX
9
CASE 614
METAL PACKAGE
R SUFFIX
.",
CIRCUIT SCHEMATIC
f;::::::1
14
Vee
1
COMPEN(... )
,.!'.!,,:-,-+--t--~--,
(LplICkageonlyl
Vee
5(81
VOLTAGE
GND
10(1)
ADJUST
9(14)
Pin numbln adjacent to terminals Ir. for the G
and R suffix PlCkllllll only. Pin numb.-s in Pl'
renth. . . . lor th. L suffix pack. only.
COMPENH
8112)
Pin 10 is ground for the G suffix padage only.
For ttMt R pttII.8ge, Ihl ca. is ground.
See Packaging Information Section for outline dimensions.
8-349
(top view)
MC1568, MC1468
(continued)
MAXIMUM RATINGS (TC = +25 0 C unless otherwise noted.1
Input Voltage
MC1468
MC1568
ELECTRICAL CHARACTERISTICS (VCC = +20 V, VEE = -20 V, Cl = C2 = 1500 pF, C3 = C4 = 1.0 jlF. RSC+ = RSC- = 4.0 n,
IL + = IL- = 0, TC = +25 0 C unless otherwise noted.1 (Se,..e~F.,;ig;.,u_re_l.~I_ _ _ _ _.......,
mV
Load Regulation
(I L = 0 to 50 rnA. T J = constant!
(TA = Tlow to Thighl
Output Voltage Range
Vdc
L Package (See Figure 4.1
Rand G Packages (See Figures 2 and 13.1
mA
--IGNO
SENSE (+)
CaMPEN 1+)
e-----<>--iVEE
VOINPUT H
CaMPEN H
SENSE 1-)
10
R3
15k
A2
S",dil-O--!---+
I-l
SENSE 1-)
ASC-
R4
15k
11
w..Mr......- - - - - - -......--e-Vo
RSC-
)'--.....""............-------<___4-15 Vd,
2N3055
on EQUIV
0.33n
2.0W
The pre.rn:e ot the Baladj. pin 2. on devices
housed in the dual in-line package fl suffix) allows
the u.r to adjust the output voltages down to
tR.O V. The required value of resistor A2 can
calculetedfrom
A2:
Rl Rintf4l+Vzl
Rint fVO -;-Vzl-41 Rl
Where: Rillt = An Internal Resistor'" R1'" 1 kn
;=O.BRV
Vz=B.BV
-vo
8-351
Some common design values are listed betow:
:l:VOfVI R2
14
12
10
8.0
1.2k
1.8k
3.Sk
TC Vo I%lDC)
0.003
0.022
0.02'
0,028
Is+lmA)
10
1.2
5.0
2.6
MC1568, MC1468 (continued)
TYPICAL CHARACTERISTICS
(Vee =
+20 V. VEE = -20 V. Vo = ± 15 V. TA = +25 0 C unless otherwise noted.)
FIGURE 6 - REGULATOR DROPOUT VOLTAGE
FIGURE 5 - LOAD REGULATION
0
;;
o
1.01--1-""'I~....:I,--+-=~"""-I-_d:::---+--I----l
:!
2.01---1-----l----l-""I..,..:::"".~_+-_+-_I_-_I_-_I
;::
0
..
'"!:;
o
3.01--+--1--1--i--i-=~~~~-J.---+'--
::
I
I
5.0
RSC = 4.0 OHMS
TJ=TA
I-I-- .....
I-- j.---;
I-I-- I-""
+--+--+--t--t--
"NEGATIVE REGULATOR
o
7.0'~0---1...--:;2'"0--'---:!40::----'--;!;60;---1--;!;;--...J.-""'100
>
.=
>
0
20
40
,
FIGURE
FIGURE 7 - MAXIMUM CURRENT CAPABILITY
200
!2:
w
I
.!
16O f - - - Vin· Vo = 3.0 V
VCC = IVEE I
0:
0:
B
..
12 0
o
o
...J
...J
~
'"
R PACKAGE- !-0
0
-li5
f--- (MC1468)~
1
+75
+100
FIGURE
0
0
1\
\
0
0
\
R PACKAGE-~
"
........ ' "
0
+125
TA. AMBIENT TEMPERATURE (DC)
100
I ...
r--....
- - - ND HEATSINK ........... ' " ......
......
~ ~
~~
2.0
4.0
6.0
8.0
10
12
14
16
I Vin· Vo I.INPUT·OUTPUT VOLTAGE DIFFERENTIAL IV)
FIGURE
100
9 - ISC versus RSC
10 - CURRENT-LIMITING CHARACTERISTICS
-
r--- r----!.SC = 10 OHMS
1\
0
'\.
r--....
0
r-..
I--r--f-
-I-
0
0
1'- ......
G PACKAGE ....
I- _ _ _ INFINITE HEATSINK
0
+50
+25
'\.
.......
'....
~
0
11
I.>...
\ \
t- VCC = IVEEI
MC1568)
-25
\
~LPACKAGE~
0
r-....>.. ~
L PACKAGE'"
I-
\
'\. I\,
80
o
,
\i
,
8 - MAXIMUM CURRENT CAPABILITY
\
\
0
~:
~
- - - - NO HEATSINK
- - INFINITE HEATSINK
200
I
1\ ,
'\. I\,
"\ \.
G PACKAGE<
100
80
60
IL, LOAD CURRENT (rnA)
IL,·LOAD CURRENT (rnA)
.g
f.-- I-f.-- I--
0
5 6.01--+--1--1--i--i--+--+---+.---+.--
;(
-
j...> f.--.....
...-
0
4.01t--t--1---1-----l----l----l-.....!!~""'I.~_+~""
>
!;
O~MS
POSITIVE REGULATO~,
G;
:;:
I
RSC = 4.0
(NO .. 100 mV
r--
:>E 0~~::::::j::::t/1
0
........ ,...."
0
I--
t--- f---
RSC = 20 OHMS
r-0
0
0
0
4.0
8.0
12
16
20
24
28
0
-75
32
-50
-25
+25
+50
+75
TJ. JUNCTION TEMPERATURE (DC)
RSC. SHORT·CIRCUIT RESISTOR (OHMS)
8-352
+100
+125
MC1568, MC1468 (continued)
(Vce
= +20
TYPICAL CHARACTERISTICS (continued)
= -20 V, Vo =± 15 V, T A = +25 0 e unless otherwise
V, VEE
FIGURE 11 - STANDBY CURRENT DRAIN
FIGURE 12 - STANDBY CURRENT DRAIN
0
5.0
f- Vee =11 VEE!
9. 0
8. 0
0
1
l1'POSITIVE STANDBY eu RRENT
~
0
~
-55°C
+25 OC
B
2. 0
+25 0 C
1-~~2~~~~ECURRENT~
o
16
18
24
22
20
+ 125°C
./'
26
28
30
-
POSITIVE STANDBY
5. 0
~ 4. 0
Z
3. 0
-55°C
-
V
NEGATIVE STANDBY CURRENT
1. 0
0
15
32
16
17
I
~
I
>-
0.0 1
0
~
-
V
_V V
-
V r--
~
~OSITIJE REG0LATO~
11
0.0 3
~ 0.0 2
-'
20
FIGURE 14 - LOAD TRANSIENT RESPONSE
0.04
~
19
I
VCC = VEE = 30 V
0.0 51-- RSC = 4.0 OHMS
~
18
±VO, OUTPUT VOLTAGE (±V)
FIGURE 13 - TEMPERATURE COEFFICIENT OF
OUTPUT VOLTAGE
I
eURREN~
t--::"
~
±Vin, INPUT VOLTAGE (±V)
6
---
7. 0
>~ 6. 0
oc
+125 0 C
I
1. 0
0.0
noted.)
,-
1/
flIL",O-10mA
RSC = 10 OHMS
NEGATIVE REGULATOR
% CHANGE IN Vo
I---- THERMAL SHIFT = CHANGE IN JUNCTION TEMPERATURE1
15
1
16
1
1
17
1
1
18
I
I
I
19
20
TIME, 20 pS/DIV
±VO, OUTPUT VOLTAGE (±V)
FIGURE 15 - LINE TRANSIENT RESPONSE
>
"
1
.1
FIGURE 16 - RIPPLE REJECTION
1
lNCC = +20 V to +23 V
~OSITIVIE REG~LATO~
:>E
-10
NEGATIVE
~
-20
N
Z
0
-30
o
i=
";zi
~
~
o
~
I RSC = 110 OHM1S
W
~
o
>
>:::>
:=:::>
"VEE = -20 V to -23 V
/
io
RSC = OHMS
IL=10mA
./'
~ -40
(:':
t>Vin '" +20 to +23 V
to
REG~R
V
NEGATIVE REGULATOR-
>- -50
>«
w -60
,/
L
-'
~ -70
oc
>- -80
~
~
-90
o
/'
b--::::r'
POllTlVE
REGULATOR
b:::::::::: r-
./
J--
-100
100
TIME, 50 !"iDIV
1.0k
10 k
t, INPUT FREUUENCY (Hz)
8-353
100 k
1.0M
MC1568, MC1468 (continued)
TYPICAL CHARACTERISTICS (continued)
(VCC = +20 V. VEE = -20 V. Vo =±15 V. TA = +25 0 C unless otherwise noted.)
FIGURE 17 - OUTPUT IMPEDANCE
10
~
i:z:
f-
.
RSC = 4.0 OHMS
IL = 10mA
o
;;:; 1.0
:i!o
~
!
t-
~ O. 1
::>
o
NEGATIVE REGULATOR
POSITI,Y,E REGULATOR
0.0 1
100
III
1.0 k
10 k
f. TEST FREQUENCY (Hz)
8-354
100 k
tOM
,-----I
MCIS69
MC1469
l . . __
PO_S_I_T_IV_E_V_O_LT_A_G_E_R_E_G_U_L_A_T_O_R_S----I
Specifications and Applications InforIllation
MONOLITHIC VOLTAGE REGULATOR
POSITIVE VOLTAGE REGULATOR
INTEGRATED CIRCUIT
The MC1569/MC1469 is a positive voltage regulator designed to
deliver continuous load current up to 500 mAdc. Output voltage is
adjustable from 2.5 Vdc to 37 Vdc. The MC1569 is specified for
use within the. military temperature range (-55 to +125 0 C) and the
MC1469 within the 0 to +700 C temperature range.
For systems requiring a positive regulated voltage, the MC 1569
can be used with performance nearly identical· to the MC 1563 negative
voltage regulator. Systems requiring both a positive and negative
regulated voltage can use the MC 1569 and MC 1563 as complementary
regulators with a common input ground.
•
Electronic "Shut·Down" Control
•
Excellent Load Regulation (Low Output Impedance - 20 milliohms typ)
•
High Power Capability: up to 17.5 Watts
•
Excellent Temperature Stability: ±0.002 %tc typ
•
High Ripple Rejection: 0.002 %fV typ
MONOLITHIC SILICON
EPIT AXIAL PASSIVATED
~
FIGURE 1 - TYPICAL CIRCUIT CONNECTION
(3.5 ";;VO ";;37 Vdc, 1 (2VO_ 7)kQ
v, ±.400 rnA COMPLEMENTARY TRACKING
VOLTAGE REGULATOR
. Vin _----~__f----t~---,=-:;1.2~.-___...-~5::::00~"~'A=m;..~ Vo
+20 Vdc
+15Vdc
IO~F
Jk
3k
~-+------~-
Vin
G SUFFIX
R SUFFIX
Rsc :60m!l
•
""I
FIGURE 3 - ± 15
CASE 614
METAL PACKAGE
FIGURE 2 -- TYPICAL NPN CURRENT BOOST CONNECTION
(VO = 5.0 Vdc, IL = 10 Adc Imaxll
Vin~ 8.5 Vdc
Select Rl to Give Desired
~
(Bottom'View)1
CASE 602A
METAL. PACKAGE
__
~-4VO
SOD mA max
-15Vdc
-20Vdc
The index to the content of this data sheet appears on page 20.
See current MCC1569/1469 data sheet for standard linear chip information.
See Packaging Informatic;m Section for outline dimensions.
Me 1569-P9. 1
8-355
0.001"1
Ik
Vo "+5Vdc
MC1569, MC1469 (continued)
MAXIMUM RATINGS (TC : +25 0 C unless otherwise noted)
Input Voltage
MC1469
MC1569
Peak Load Current
Current, Pin 2
Current, Pin 9
Power Dissipation and Thermal Characteristics
TA = +250 C
Derate above T A
= +25 0 C
Thermal Resistance, Junction to Air
TC = +250 C
Derate above T C = +250 C
Thermal Resistance, Junction to Case
OPERATING TEMPERATURE RANGE
Ambient T emperatu re
MC1469
MC1569
ELECTRICAL CHARACTERISTICS
(TC : +25 0 C unless otherwise noted) (Load Current: 100 mA for "R" Package device, unless otherwise noted)
: 10 mA for "G" Package device,
Characteristic
Fig.
Note
4
Bias Current
ilL = 1.0 mAde, R2 = 6.8 k ohms, liB = lin ·IL)
Output Noise
(CN = 0.1 iJ.F, f
= 10 Hz to 5.0 MHz)
Operating Load Current Range
(R sc ";;;0.3 ohms)
(Rsc";;; 2.0 ohms)
R Package
G Package
8
(cc = 0.001 iJ.F, Rsc = 1.0 ohm, f
Vin = +14 Vdc, VD = +10Vdc)
6
Zo
= 1.0 kHz,
9
VO <3.5 Vdc
FIGURE 4 - CONNECTION FOR Vo ;;>3.5 Vdc
(R sc ·2.7ohmsunlessothelWl$I!noted)
"
f-o-<:>-=------..J
"
Vrel
SelectR2loglvedlsiredVo. R2,,(2VO)kQ Stl,ctRI: RI .. (1.Okn
SelectRl1ogivedesiredVo RI ,,(2Vo ·71krl
FIGURE 6 - INPUT REGULATION
R2)kn
Co +
1
Rl
' 'I
FIGURE 7 - LOAD REGULATION
va = IOVdc
2.7
VO"OV
2N706
OREQUIV
"
1--=<0-=-------'
RI
riM
10k
RI
R2
III
FIGURE 9 - SHUTDOWN CURRENT
2.7
+Vin
f-.:...O-=-------'
1
''}
\3k
FIGURE 8 - OUTPUT IMPEDANCE
Co +
1
J
':o:::,:,'
+ IOpF
":,RL
Vo
1.0mA
10
j
'R!
ft,
50mV(rm&)
1=IOkHl ":'
-1I3-IVin- I.5)kn
MC1569-Pg,3
8-357
s
~
\
l-,MC1569, MC1469 (continued)
GENERAL DESIGN INFORMATION
1. Output Voltage, Vo
.
a) For VO;;' 3.5 Vdc - Output voltage is set by resistors Rl
and R2 (see Figure 4). Set R2 = 6.8 k ohms and determine
Rl from the graph of Figure 10 or from the equation:
Rl"'( 2VO-71kn
7. Remote Sensina
The connection to pin 5 can be made with a separate lead
direct to the load. Thus, "remote sensing" can be achieved
and the effect of undesired impedances (including that of
the milliammeter used to measure IL) on Zo can be greatly
reduced (see Figure 37).
b) For 2.5 ".; Vo ".; 3.5 Vdc - Output voltage is set by resis·
tors Rl and R2 (see Figure 5), Resistors Rl and R2 can be
FIGURE 10 - R1 versus Vo
(VO;;' 3.5 Vdc, See Figure 4)
determined from the graph of Figure 11 or from the
equations:
60
R2 "'2 (VO) kn
Rl '" (7 kS1--R2) kn
~
(R 1 (2 Vo - ;) kn)
(R2 =6.8 kn)
0
c) Output voltage, VO. is determined by the ratio of Rl and
R2. therefore optimum temperature performance can be
achieved if R 1 and R2 have the same temperature
coefficient.
d) Output voltage can be varied by making Rl adjustable as
/'
0
/
0
/
shown in Figure 43.
0
e) If Vo = 3.5 Vdc (to supply MRTt.:'for example). tie pins 6,
8 and 9 together. Rl and R2 are not needed in this case.
2. Short Circuit Current, Isc
Short Circuit Current, Isc. is determined by Rse- Rsc may
be chosen with the aid of Figure 12 or the expression:
R
/
0
/V
0
_0.6 ohm
V
10
5.0
sc......, T;;:
20
15
25
35
30
Vo, OUTPUT VOLTAGE (VOLTS)
where Isc is measured in amperes. This expression is also
FIGURE 11 - Rl and R2 versus Vo
12 5"'; Vo ".; 3.5 Vdc, See Figure 5)
valid when current is boosted as shown in Figures 2, 29 and
30.
3. Compensation, C c
A O.OOlIJF capacitor, C e • from pin 4 to ground will provide
adequate compensation in most applications, with or without current boost. Smaller values of C c will reduce stability
and larger vaJues of Cc will degrade pulse response and output impedance versus frequency. The physical location of
Cc should be close to the MC1569/MC1469 with short lead
lengths.
4. Noise Filter Capacitor, CN
A 0.1 /J.F capacitor, CN, from pin 7 to ground will typically
reduce the output noise voltage to 150 /J.V(rms). The value
of eN can be increased or decreased, depending on the
noise voltage requirements of a particular application. A
minimum value of 0.001 JlF is recommended.
5. Output Capacitor, Co
The value of Co should be at least 1.0 JlF in order to
provide good stability. The maximum value recommended
is a function of current limit resistor Rsc:
2.0
7.0
R
lL.
(RI ~ (7 kn - R2) knl
II-
RI
~w
"-
w
u
z
~ 1.0
iii
'"
I-
u
-'"
f-
z
6.0
V
to'"
iii
'"N
'"
"-
./
. (IR2 ~ [2 (VO) k!l)
5.0
3.5
0
3.0
2.5
VO, OUTPUT VOLTAGE (VOLTS)
Co max '" 250 /J.F
Rsc
where Rsc is measured in ohms. Values of Co greater than
this will degrade the pulse response characteristics and
increase the settling time.
6. Shut·Down Control
One method of turning "OFF" the regulator is to apply a
dc voltage at pin 2. This control can be used to eliminate
power consumption by circuit loads which can be put in
"standby" mode. Examples include, an ac or dc "squelch"
control for communications circuits, and a dissipation control to protect the regulator under sustained output shortcircuiting (see Figures 34,39 and 40). As the magnitude of
the input·threshold voltage at Pin 2 depends directly upon
the junction temperature of the integrated circuit chip, a
fixed dc voltage at Pin 2 will cause automatic shut-down for
high junction temperatures (see Figure 391. This will protect the chip, independent of the heat sinking used, the am·
bient temperature, or the input or output voltage levels.
Standard logic levels of MRTL ,MDTL or MTTL can
also be used to turn the regulator "ON" or "OFF".
FIGURE 12 - Isc versus Rsc
<
.s
700
I-
z
~
'"
::>
u
500
\
\
0
«
g
!::
::>
u
'"
13
300
,.;.
'"0
'"'"
j
\
f'..
100
1.0
2.0
I"- r-3.0
4.0
5.0
6.0
1.0
Rsc, EXTERNAL CURRENT·L1MITING RESISTOR (OHMS)
MC1569-Pg.4
8-358
8.0
MC1569, MC1469 (continued)
TYPICAL CHARACTERISTICS
Unless otherwise noted:
CN
= 0.1 J.l.F, Cc = 0.001 J.l.F, Co = 1.0 J.l.F, TC =
+25°C,
Vin nom = +9.0 Vdc, Vo nom = +5.0 Vdc,
IL >200 mA for R package only.
FIGURE 13 - DEPENDENCE OF OUTPUT
IMPEDANCE ON OUTPUT VOLTAGE
FIGURE 14 - OUTPUT IMPEDANCE versus Rsc
0
0
0
Rsc = 0
0
101---+--+---+--+--~~-~--+--~
o
o
OL-__ __
~
5.0
10
15
25
20
30
35
o
40
2.0
VO, OUTPUT VOLTAGE (VOLTS)
_L_ _- L__
4.0
6.0
~
____L -__
8.0
10
~
___L_ _
12
14
FIGURE 16 - FREQUENCY DEPENDENCE
OF INPUT REGULATION, Co = 2.0 IlF
0.005
I
0.005
n
~0.004
IL=SOmA
Co = 10.F
~ 0.004
IL =SOmA
cp = ~.~
I
~
z
z
o
~ 0.003
o
:::0
:::0
~ 0.003
'"
~ 0.002
ffi
Cc = 0.001 pF
:: 0.002
to::::
1e
;!;
1e
0.001
Cc O.01.pF
~
=
-r
~
Cc=O.1 pF
1
1.0
-
J.=1.J1PF
~ .::'"
;!;
I'-
1
10
0.00 I
Cc = 0.01 pF
Cc =O.lpF
1.0
1000
100
FIGURE 18 - BIAS CURRENT versus INPUT VOLTAGE
5.0
1.03
1.02
./
.......
:::0
0
i'il
N
~
=
0'"
z
.//
TJ = +750 C ANO +125 0 C
1.01
-
0
> 1.00
....:::0
1000
f, FREQUENCY (kHz)
FIGURE 17 - CURRENT·LIMITING CHARACTERISTICS
'"«~
100
10
f, FREQUENCY (kHz)
w
0.98 I--+--+---t-Rsc = 6.8 ohms --I--+--+-H----1
S
0.91
~
0.96
0.95
o
20
I:IT
40
60
I
IL=1.0mA
R2 = 6.8 k
...... V
iT1
80
k;:::::::' ~
\
V t:;:::::::: P 200 mA for R package only.
FIGURE 19 - EFFECT OF LOAD CURRENT ON
INPUT·OUTPUT VOLTAGE DIFFERENTIAL
FIGURE 20 - EFFECT OF INPUT ·OUTPUT VOLTAGE
DIFFERENTIAL ON INPUT REGULATION
.....__.,,..--__,
2.5,-----,~----:::::::~=
0.004
2.4t------tl7"''''''-----t-----::::;~-=--_l
w
'"
o
>~
~
~ ~
...
I-~
- 2.2frL----+-;;;.-""'----'\-t--="""'=---+----_I
:: 0.00 2
2:: ~ 2.1t---7"~--~7"9-----t------I
11:
":'z
:::>w
o~
"; Q
'"I-
2.011---:.,-£---1-".£..1\---1------+---_--1
"-
......
-
TJ=+25DC
................
_L
t---..
17-I--
~ 0.00 I
TJ = -55DC
.S
:;r
VO=+IOVd,
R~=OOHM
>
'" ./
"I"'"
1""""-
:::>
1.91---7"'-1-----+------+------1
c
TJ = +125DC
~ 0.003
z
"~ f?i 2.3 t--""7C--+----=l-~=----_+""""""_~=-_I
~ ~
~
"0
>
IL=I.OmA
'"
0
VO= 3.5 Vd
f4VO= 10 Vd
125
250
IL. LOAO CURRENT (mAd,)
375
8.0
500
~
;;:
10,",$+--+--+--+---I
I-
1511'35
tr=tf=
Q
>
I
I
H
400
.§ 350
~ 300
'"
..,'":::>
-~_...L._
250
Q
_ 10.003 ~-+---l--+==t==::::j===+=+=F==1r::=l
~
Cc = 0.' JJF
~
10.002 1--1--1--lr---1-:-~-::--:+--,t--t---t-~ ~ 10.0011-_1-_f--lI"---1_C_'_=,0_.0_1~_F+-_+-_+-_+-_
c:
0",
~~ 10.000 I--I--I---lf----t----t--t--+--t--t--
~ 9.9991--t--f----tf----t----t--t--t--t--t--
9.998 '-_L-_L...........JL...........J_.......J_--l._--l._-!.._-!.._ _
"g
200
~
150
I-
~
100
"
'"
j
50
Q
r------r--
-50
1000
CO=IOI'FII
II
C,=O.II'F
800
~
...-
600
...!"
400
...
§ 200
C, - 0.01 I'F
,.- nTI II
0
w
C, = O.OOII'F
I-
:::>
II
./
1.0
+25
+50
1000
"~
+75
+100
+125
Ul
CO=2.0~F
800
~
~ 600
z
!
V
.....
C,= O.OII'F
400
.-
~ 200
./
--
C,= O.II'F
"o~
:::>
V
-25
'":E
~
:::>
I-
R~)=lOn
FIGURE 24 - FREOUENCY DEPENDENCE
OF OUTPUT IMPEDANCE, Co = 2.0 {JF
II II
:E
..,wz
~3.3n
TA, AM81ENT TEMPERATURE (DC)
;;;
::
R"
-t---
FIGURE 23 - FREOUENCY DEPENDENCE
OF OUTPUT IMPEDANCE, Co = 10 {JF
0
"""' R~=2.4n
~
o
-75
--r--
- r--r-- t:::::::
100.slOIV
"
32
FIGURE 22 - TEMPERATURE DEPENDENCE OF
SHORT·CIRCUIT LOAD CURRENT
1-~20'5~
~ ~ 81--1--1--If---1---1--t--t--t---t---I
~~
24
Vin - VO,INPUT-OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
FIGURE 21 - INPUT TRANSIENT RESPONSE
>!3
16
C, = O.OOII'F
........ f-'"
L
~
r--
o
10
100
0.5
1000
f, FREQUENCY (kHz)
1.0
5.0
10
50
f, FREQUENCY 1kHz)
MC1569-Pg.6
8-360
100
500
MC1569, MC1469 (continued)
OPERATIONS AND APPLICATIONS
This section describes the operation and design of the MC I 569 positive voltage regulator and also provides information on
useful applications.
SUBJECT SEQUENCE
Theory of Operation
NPN Current Boosting
PNP Current Boosting
Switching Regulator
Positive and Negative Power Supplies
Shutdown Techniques
Voltage Boosting
Remote Sensing
An Adjustable-Zero-TemperatureCoefficient Voltage Source
THEORY OF OPERATION
The usual series voltage regulator shown in Figure 25,
consists of a reference voltage, an error amplifier, and a
series control element. The error amplifier compares the
output voltage with the reference voltage and adjusts the
output accordingly until the error is essentially zero. For
applications requiring output voltages larger than the refer·
ence, there are two options. The first is to use a resistive
divider across the output and compare only a fraction of
the output voltage to the reference. This approach suffers
from reduced feedback to the error amplifier due to the
attenuation of the resistive divider. This degrades load
regulation especially at high voltage levels.
The alternative is to eliminate the resistive divider and
to shift the reference voltage instead. To accomplish this,
another amplifier is employed to amplify (or level shift)
the reference voltage using an operational amplifier as
shown in Figure 26. The gain·determining resistors may
be external, enabling a wide range of output voltages. This
FIGURE 25 - SERIES VOLTAGE REGULATOR
Thermal Shutdown
Thermal Considerations
Latch-Up
is exactly the same approach used in the first option. That
is, the. output is being resistively divided to match t;]C
reference voltage. There is however, one big difference l!l
that the output of this "regulator" is driving the input of
another regulator (the error amplifier). The output of the
reference amplifier has a relatively low impedance as compared to the input impedance of the error amplifier.
Changes in the load of the output of the error amplifier
are buffered to the extent that they have virtually no effect
on the reference amplifier. If the feedback resistors are
external (as they are on the MC15(9) a wide range of
reference voltages can be established.
The error amplifier can now be operated at unity gain
to provide excellent regulation. In fact, this "regulatorwithin·a·regulator" concept permits the load regulation to
be specified in terms of output impedance rather than as
some percentage change of the output voltage. T)'is approach was used in the design of the MC 1569 positive·
voltage regulator.
FIGURE 26 - THE ··REGULATOR·WITHIN·A·REGULATOR" APPROACH
Vo
SERIES CONTROL ELEMENT
MCI569-Pg.7
8-361
MC1569, MC1469 (continued)
FIGURE Xl
Jr------o------------"
OUTPUT
I.....~~r-
SENSE
1 OUTPUT
COMPENSATION AND
CURRENT LIMIT
..1--.-----05 OUTPUT SENSE
---------+-----ir---------<> 9 0 CSHI FT OUTPUT
-----'lIW---+-------1f-----------<> 7 NOISE Fil TE R
OUTPUT REFERENCE
DC SHIFT SENSE
'Pm 10 is ground for Case 602A (G suffix).
Case is ground for Case 614 (A suffix).
Mel 569 Operation
Figure 27 shows the MCl569 Regulator block diagram,
simplified schematic, and complete schematic. The four
basic sections of the regulator are: Control, Bias, DC
Level Shift, and Output (unity gain) Regulator. Each section is detailed in the following paragraphs.
Control
The control section involves two basic functions, startup and shutdown. A start-up function is required since
the biasing is essentially independent of the unregulated
input voltage. It makes use of two zener diodes having
the same breakdown voltage. A first or auxiliary zener is
driven directly from the input voltage line through a resistor (60 kr2) and permits the regulator to initially
achieve the desired bias conditions. This permits the
second, or reference zener to be driven from a current
source. When the reference zener enters breakdown, the
auxiliary zener is isolated from the rest of the regulator
circuitry by a diode disconnect technique. This is necessary to keep the added noise and ripple of the auxiliary
zener from degrading the performance of the regulator.
MC1569-Pg.8
8-362
MC1569, MC1469 (continued)
Output Regulator
The shutdown control consists of an NPN transistor
across the reference zener diode. When this transistor is
turned "ON", via pin 2, the reference voltage is reduced to
essentially zero volts and the regulator is forced to shutdown. During shutdown the current drain of the complete IC regulator drops to Vin/60 kn or 500 /lA for a
30 V input.
The output of the level shift amplifier (pin 9) is fed to
the noninverting input (pin 6) of the output error amplifier. The inverting input to this amplifier is. the Output
Sense connection (pin 5) of the regulator. A Darlington
connected NPN power transistor is used to handle the load
current. The short-circuit current limiting resistor, Rsc, is
connected in the emitter of this transistor to sample the
full load current. By placing an external low-level NPN
transistor. across Rsc as shown in Figure 27, output
current can be limited to a predetermined value:
Bias
A zener diode is the main reference element and forms
the heart of the bias circuitry. Its positive temperature
coefficient is balanced by the negative temperature coefficients of forward biased diodes in a ratio determined
by the resistors in the diode string. The result is a reference voltage of approximately 3.5 Vdc with a typical
temperature coefficient of 0.002 %/"C. In addition, this
circuit also provides a reference curren t which is used to
bias all current sources in the remaining regulator circuitry.
0.6
R
0.6
ILmax""-or sc~
Rsc
IL max
where IL max is the maximum load current (amperes) and
Rsc is the value of the current limiting resistor (ohms).
DC Level Shift
Stability and Compensation
The reference voltage is used as the input to a Darlington
differential amplifier. The gain of this amplifier is quite
high and it therefore may be considered to function as a
conventional operational amplifier. Consequently, negative
feedback can be employed using two exte mal resistors (R I
and R2) to set the closed-loop gain and to boost the reference voltage to the desired output voltage. A capacitor,
CN, is introduced externally into the level shift network
(via pin 7) to stabilize the amplifier and to filter the zener
noise. The recommended value for this capacitor is 0.1 /IF
and should have a voltage rating in excess of the desired
output voltage. Smaller capacitors (0.001 /IF minimum)
may be used but will cause a slight increase in output
noise. Larger values of CN will reduce the noise as well as
delay the start-up of the regulator.
As· has been seen, the MC 1569 employs two amplifiers,
each using negative feedback. This implies the possibility
of instability due to excessive phase shift at high frequencies. Since the error amplifier is normally used a t unity
gain (the worst case for stability) a high impedance node
is brought out for compensation. For normal operation, a
capacitor is connected between this point (pin 4) and
ground. The recommended value of 0.00 I /IF will insure
stability and still provide acceptable transient response
(see Figure 28, A and B). It is also necessary to use an
output capacitor, Co (typically 1.0 /IF) from the output,
YO, to ground. When an external transistor is used to
boost the current, Co ~ 1.0 /IF is also recommended (see
Figure 2).
FIGURE 28B - LOAD TRANSIENT RESPONSE
125
75
-
50
25
I
I
I
I
1
en 10.050
...
I
j
J
00-
>-'
o
> 9.950
J
100.,JDlV
I
100
r---
l 1
95
90
85
I--+--/--t-----j'---j
10.001
1--+--j---t--t---1
10.000
\----'-_~_~_~~
9.999
J
:=~
~ ~ 10.00 0
MC1569-Pg.9
I
105
I
-t,!tl:lOl, , - r-- '----c _t,:tl:lrins_
o-S
=>0
8-363
I
1 1
100
100.,JOIV
MC1569, MC1469 (continued)
boost configuration, particularly for small output
voltages, the circuit of Figure 29 is recommended. An
auxiliary 9.5-volt supply is used to power the IC regulator
and the heavy load current is obtained from a second
supply of lower voltage_ For the 5_0 ampere regulator of
Figure 29 this represents a savings of 17_5 watts when
compared with operating the regulator from the single 9.S
V supply_ It can supply current to 5_0 amperes while
requiring an inpu t voltage to the collector of the pass
transistor of 6.0 volts minimum_ The pass transistor is
limited to 5.0 amperes by the added short-circuit current
network in its emitter (Rsc), (Figure 29B)_
TYPICAL NPN CURRENT BOOST CONNECTIONS
FIGURE 29A - 5 VOLT 5-AMPERE REGULATOR
"Vinl>S.OV
,
Vin2
1
I
, lOrnA
S.8k
100"1
*Forripplereductionorincrusedefficiency at low Dulpul voltages,
thecollectorofQ.lcantietol
separate low-voltage supply as
shown.
PNP CURRENT BOOSTING
A typical PNP current boost circuit is shown in Figure
30. Voltages from 2.5 Vdc to 37 Vdc and currents of
many amperes can be obtained with this circuit.
Since the PNP transistor must not be turned on by the
MC1569 bias current (lIB) the resistor Rin must meet the
following condition
FIGURE 29B - 5-VOLT 5-AMPERE REGULATOR
2N3055OR EaUIV
+5.0 V
Vo
2N4123
OREaUIV
where VBE is the base-to-emitter voltage required to turn
on the PNP pass transistor, (typically 0.6 Vdc for silicon
and 0.2 Vdc for germanium).
For germanium pass transistors, a silicon diode may be
placed in series with the emitter to provide an additional
voltage drop. This allows a larger value of Rin than would
be possible if the diode were omitted. The diode will,
however, be required to carry the maximum load current.
FIGURE 30 - PNP CURRENT
BOOST CONNECTION
+Vin _ _-","",
+vo
SELF-OSCILLATING SWITCHING
REGULATOR
In all of the current boosting circuits shown thus far it
has been assumed that the input-output voltage differential can be minimized to obtain maximum efficiency in
both the external pass element as well as the MC1569.
This may not be possible in applications where only a
single supply voltage is available and high current levels
preclude zener diode pre-regulating approaches. In such
applications a switching-mode voltage regulator is highly
desirable since the pass device is either ON or OFF. The
theoretical efficiency of an ideal switching regulator is
100%_ Realizable efficiencies of 90% are within the realm
of possibility thus obviating the need for large power dissipating components_ The output voltage will contain a
ripple component; however, this can be made quite small
if the switching frequency is made relatively high so filtering techniques are effective. Figure 31 shows a functional
diagram for a self-oscillating voltage regulator. The
comparator-driver will sense the voltage across the inductor, this voltage being related to the load current, IL, by
NPN CURRENT BOOSTING
For applications requiring more than 500 rnA of load
current, or for ~inimizing voltage variations due to temperature changes in the IC regulator arising from changes
of the internal power dissipation, the NPN current-boost
circuits of Figure 2 or 29 are recommended_ The transistor shown in Figure 29A, the 2N3055 can supply
currents to 5_0 amperes (subject, of course, to the safe
area Iimitations)_ To improve the efficiency of the NPN
MC1569-Pg_ 10
8-364
MC1569, MC1469 (continued)
FIGURE 31 - BASIC SELF-OSCI LLATING
SWITCHING REGULATOR
-
-IL
--
For a first approximation this can be assumed to be a
linear relationship.
Initially, Va will be low and QI will be ON. The voltage at the non-inverting input will approach (31 Vin, when:
CRI
Va
-=
Rb
Vref
When this output voltage is reached the comparator will
switch, turning QI OFF. The diode, CRI, will now become
forward biased and will supply a path for the inductor current. This current and the sense voltage will start to decrease until the outpu t voltage reaches
'1
RL
-=
Vc
where the comparator will again switch turning QI ON,
and the cycle repeats. Thus the output voltage is approximately Vref plus a ripple component.
The frequency of oscillation can be shown to be
I max
IL(avg)
Va (Vin - Va)
f= L Vc I(max)- 10)
(I)
10
where
Va
I (max) = The maximum value of inductor current
10 = The minimum inductor current.
Normally this frequency will be in the range of approximately 2 kHz to 6 kHz. In this range, inductor values can
be small and are compatible with the switching times of
the pass transistor and diode. The switching time of the
comparator is quite fast since positive feedback aids both
turn-on and turn-off times_ The limiting factors are the
diode and pass transistor rise and fall times which should
be quite fast or efficiency will suffer.
Figure 32 shows a self oScillating switching regulator
which in many respects is similar to the PNP curren t boost
previously discussed. The 6_8 kn resistor in conjunction
with RI sets the reference voltage, Vref. QI and CRI are
selected for fast switching times as well as the necessary
power dissipation ratings. Since a linear inductor is assumed, the inductor cannot be allowed to saturate at
maximum load currents and should be chosen accordingly.
If core saturation does occur, peak transistor and diode
currents will be large and power dissipation will increase.
FIGURE 32 - MC1569 SELF·OSCILLATING
SWITCHING REGULATOR
CA2, CR3
CR3
lN4001
OR EQUIV
f"<>--.........::..~vo
Me 1569-Pg. 11
8-365
MC1569. MC1469 (continued)
speed. When the output stage of the error amplifier
approaches saturation, CR2 becomes forward biased and
clamps the error amplifier. Resistor Rc should be selected
to supply a total of I mAdc to CR2 and CR3.
To show correlation between the prediCted and tested
specifications the following data was obtained:
As a design center is required for a practical circuit,
assume the following requiremen ts:
Yin = +28 Volts
VO=+IOVolts
LWo=50mV
f~5
Yin = +28 (±'I%) Volts
kHz
Vo = +10 Volts
I(max)= 1.125 A
LWo=60mV
f= 7 kHz
10= I A
(2)
which checks quite well with the predicted values. Rb
can be adjusted to minimize the ripple component as well
as to trim the operating frequency. Also this frequency
will change with varying loads as is normal with this type
of circuit. Pin 2 can still be used for shut-down _if so
desired. Rsc should be set such that the ratio of load current to base drive current is 10: I in this case II .., 100 rnA
and Rsc = 6.5n.
Using Equation (I), the inductor value can be found:
L- (28-10) 10( I )
2(1.125-1)28 5 x 10 3
For the test circuit, a value of 6 mH was selected. Using
for a first approximation
C - (Vin - VO)(VO) .
o - 8L r2 Yin (t,v)
(28 - 10)10
As shown, a value of 100 /IF was selected. Since little current is required at pin 6, Ra can be large. Assume Ra =
47 kn and then use Equation (2) to determine Rb:
50
x
10-3_~R
- 47 kn b
Since thl' internal impedance presented by pin 9 is on
the order of 6On, a value of Rb = Ion is adequa te.
Diodes CR2, CR3, and Rc may be added to prevent
saturation of the error amplifier to increase switching
POSITIVE AND NEGATIVE POWER
SUPPLIES
If the MC 1569 is driven from a floating source it is
possible to use it as a negative regulator by grounding the
positive output terminal. The MCI569 may also be used
with the MCI563 to provide completely independent positive and negative voltage regulators with comparable
performance.
Some applications may require complementary tracking
iii which both supplies arrive at the voltage level simultaneously, and varia tions in the magnitudes of the two
voltages track. Figures 3 and 33 illustrate this approach.
In this application, the MCI563 is used as the reference
regulator, establishing the negative output voltage. The
MCI569 positive regulator is used in a tracking mode by
grounding one side of the differential amplifier (pin 6 of
the MC 1569) and using the other- side (pin 5 of the
MC 1569) to sense the voltage developed at the junction of
the two 3-k 0!Un resistors. This differential amplifier
controls the MCI569 series pass transistor such that the
voltage at pin 5 will be zero. When the voltage at pin 5
equals zero, +VO must equal I-VOl.
For the configuration shown in -Figure 33, the level
shift amplifier in_ the MCI569 is employed to generate an
auxiliary +5-volt supply which is- boosted to a 2-ampere
capability by QI and Q2. (The +5-volt supply, as shown,
MC1569-Pg.12
8-366
MC1569, MC1469 (continued)
zero volts and the only current drawn by the IC regulator
will be the small start current through the 60-k-ohm start
resistor (Vin/60 kn). This feature provides additional
versatility in the applications of the MCIS69. Various subsystems may be placed in a "standby" mode to conserve
power until actually needed. Or the power may be turned
"OFF" in response to other occurrences such as overheating, over-voltage, shorted output, etc.
To activate shutdown, one simply applies a potential
greater than two diode drops with a current capability of
I rnA. Note that if a hard supply (i.e., +3 V) is applied
directly to pin 2, the shutdown circuitry will be destroyed
since there is no inherent current limiting. Maximum
rating for the drive current into pin 2 is 10 rnA, while
I rnA is adequate for shutdown.
is not short-circuit protected.) The -IS-volt supply
varies less than 0.1 mV over a zero to -300 mAdc current
range and the + IS-volt supply tracks this variation. The
+IS-volt supply varies 20 mV over the zero to +300 mAdc
load current range. The +S-volt supply varies less than
S mV for 0';;; IL';;; 200 rnA with the other two voltages reo
maining unchanged. See page 19 for additional information.
SHUTDOWN TECHNIQUES
Pin 2 of the MClS69 is provided for the express purpose of shutting the regulator "OFF". Referring to the
schematic, it can be seen that pin 2 goes to the base of an
NPN transistor; which, if turned "ON", will turn the
zener "OFF" and deny current to all the biasing current
sources. This action causes the output to go to essentially
FIGURE 33 - A ±15 Vd. COMPLEMENTARY TRACKING REGULATOR WITH AUXILIARY +5.0 V SUPPLY
1
3
+20 Vdc
2N3055
OR E(lUIV
02
VO'+5V
~
0161J
MJ3101
OR EOUIV
(~J
-
9
",
MC1569R
MCI469R
POSITIVE REGULATOR
a
Vo =+15Vdc
~
4
:;;: ~0.001 ~F
I
12k
,&
~,.
(2N5223)
OR EOUIV
(I o +~ 400 mA MAX)
Rsc= 1.5
~
3k
l·"
5
7
':;::;: 0.1
CASE
62
+Vo = 1-Vo I'"
RA(kll) +7
~F
r
6.8 k
MZ4625
OR EOUIV
'::'
2
~,
5.;'v
-!~
..!.3k
RB =6.ak
CN
0.1 ~F :;:::;:
3
y2
CASE
620
1
RA ·22 k
9
4
Cc ' 0.001 ~F
\1
RS ·1.8
-20 Vdc
1
MCI563R
MCI463R
NEGATIVE REGULATOR
'::'
+
7
a
5
6
/I
TIM
YO' -15 Vdc
(10- .. 400 mAMAX)
MC1569-Pg.13
8-367
MC1569, MC1469 (continued)
FIGURE 34 - ELECTRONIC SHUT.QOWN USING A MDTL GATE
+VO
5.0 V
The MC1469 is "Shut-Down" when any
allbe logic Inputs are at thl "0" Level.
¥
+
1.0pF
(DUAL MOll GATE)
FIGURE 35 - AUTOMATIC LATCH INTO SHUT·DOWN WHEN
OUTPUT IS SHORT·CIRCUITED WITH MANUAL RE-sTART
Rse
+Vo
r-t="'>IW-"t"1r-e(+10 VI
Figure 34 shows how the regulator can be controlled
by a logic gate. Here, it is assumed that the regulator
operates in its normal mode - as a positive regulator
referenced to ground - and that the logic gate is of the
saturating type, operating' from a positive supply to
ground. The high logic level should be greater than about
1.5 V and should source no more than 10 mA into pin 2.
The gate shown is of the MDTL type. MRTL and
MTTL can also be used as long as the drive current is
within safe limits (this is important when using MTTL,
where the output stage uses an active pull·up).
In some cases a regulator can be designed which can
handle the power dissipation resulting from normal opera·
tion but cannot safely dissipate the power' resulting from a
sustained short-circuit. The circuit of Figure 35 solves
this problem by shutting down the regulator when the
output is short·circuited.
VOLTAGE BOOSTING
+Vin (+15V)
11k
Cl'
5.1k
(Normally"ON")
-=
·Cl is used to allow automatic
"START·UP"wh.n Vinis
fimapplied.
FIGURE 36 - VOLTAGE BOOSTING CIRCUIT
2N3738
OR EQUIV
Vo'" 100 Vdc
68k
I-<:>----....~ 25 k
The MCI569 has a maximum output voltage capability
of 37 volts which covers the bulk of the user requirements.
However, it is possible to obtain higher output voltages.
One such voltage boosting circuit is shown in Figure 36.
Since high voltage NPN silicon devices are readily
available, the only problem is the voltage limitations of the
MC 1569. This can be overcome by using voltage shift
techniques to limit the voltage to 35 volts across the
MC 1569 while referencing to a higher output voltage.
The zener diode in the base lead of the NPN device is
used to shift the output voltage of the MCI569 by approximately 75 volts to the desired high voltage level, in
this case 100 volts. Another voltage shift is accomplished
by the resistor divider on the output to accommodate the
required 25 volt reference to the MC 1569. The 2 kn
resistor is used to bias the zener diode so the current
through the 4.7 kn resistor can be controlled by the
MC1569. The IN4001 diode protects the MCI569 from
supplying load current under short circuit conditions and
Q2 serves to limit base current to Q I. For Rsc as shown,
the short circuit current will be approximately 100 mAo
In order to use a single supply voltage, Vin(2) can be
derived from Vin(I) with a zener diode, shunt pre·
regulator.
It can be seen that loop gain has been reduced by the
resistor divider and hence the closed loop bandwid th will
be less. This of course will result in a more stable system,
but regulator performance is degraded to some degree.
20 k
REMOTE SENSING
The MC 1569 offers a remote sensing capability. This
is important when the load is remote from the regulator,
MC1569-Pg. 14
8-368
MC1569, MC1469 (continued)
as the resistance of the interconnecting lines (VO and
GND) are added directly to the output impedance of the
regulator. By remote sensing, this resistance is included
inside the control loop of the regulator and is essentially
eliminated. Figure 37 shows how remote sensing is accomplished using both a separate sense line from pin 8 and a
separate ground line from the regulator to the remote
load.
reference having a typical temperature coefficient of
0.002%/oC. By adding two resistors, RI and R2, any
voltage between 3.5 Vdc and 37 Vdc can be obtained
with the same low TC (see Figure 38).
THERMAL SHUTDOWN
By setting a fixed voltage at pin 2, the MC 1569 chip
can be protected against excessive junction temperatures
caused by power dissipation in the IC regulator. This is
based on the negative temperature coefficient of the baseemitter junction of the shutdown transistor and the diode
in series with pin 2 (-3.4 x 1O-3V/°C). By setting 1.0
Vdc externally at pin 2, the regulator will shutdown when
the chip temperature reaches approximately +1400 C. Figure 39 shows a circuit that uses a zero-TC zener diode and
a resistive divider to obtain this voltage.
AN ADJUSTABLE ZERO-TEMPERATURECOEFFICIENT (O-TC) VOLTAGE
REFERENCE SOURCE.
The MC1569, when used in conjunction with low TC
resistors, makes an excellent reference-voltage generator. If the 3.5 volt reference voltage of the IC regulator is
a satisfactory value, then pins 8 and 9 can be tied together
and no resistors are needed. This will provide a voltage
FIGUR E 37 - REMOTE SENSING CIRCUIT
FIGURE 38 - AN ADJUSTABLE "ZERO-TC" VOLTAGE SOURCE
+Vin ....----O-:~----I
1+10 Vdc)
1-=-0--..----=-.. +V,
R1 1+4.0 Vdc)
1.0 k
0.l PF
1
6.8 k
R2
FIGURE 39 - JUNCT)ON TEMPERATURE LIMITING SHUTDOWN CIRCUIT
FIGURE 39A - USING A ZERO TC REFERENCE
FIGURE 39B - USING A TA REFERENCE
Vpin 21for shutdown) ~ 1.38 - 3.4 X 1O-3 1TJ - 25 0 C)
+Vin 115 V)
+Vin
1.5 k
RI
IN3826
OR EDUIV
-=
10 or
CASE
-= -=
r" r"
+
R2
+I.OV
510
(15 V)
2.0mA
+5.1 V
2.0 k
RIC
-=
+
+1.0 V
Co
560
820
Me 1569-Pg. 15
8-369
-=
-=
-=
+VO
MC1569, MC1469 (continued)
FIGURE 40 - THERMAL SHUTDOWN WHEN USING
EXTERNAL PASS TRANSISTORS
TA REFERENCE
lN4001
0.7
OR EQUIV
0.6
FIGURE 41 - DC SAFE OPERATING
AREA
\
0.5
~
0.4
+Vin
~
'VO
(+20 V)
I~r--
------THERMAL LIMITATION ITc 25b C)
- - - - SECONDARY BREAKDOWN LIMITATION
--I-TBONDING
WIRE LIMITATION
,--1~
0.3
~
'"
'"
50'
\
",
TJ'" 150'C
0.2
\
""
1------t--t-+--MCI469G +1----"~_=__t_---t---t---+----\~-----j
MCl15619G , - " "
~CI469IR ____
I
"
MCI569R-~
lL-_-L_~-L~~~_L-_-L_~_~~~~
3.0
4.0
5.0 6.0 7.0 8.0
10
20
30
40
Vjn - Vo IVO LTS)
In the case where an external pass transistor is employed, its temperature, rather than that of the IC regulator, requires controL A technique similar to the one just
discussed can be used by directly monitoring the case
temperature of the pass transistor as is indicated in Figure 40. The case of the normally "OFF" thermal monitoring transistor, 02, should be in thermal contact with,
but electrically isolated from, the case of the boost transistor,OI.
exceed the maximum junction temperature rating during
this fault condition and, in additio'n, the dc safe operating
area limit (see Figure 41).
Thermal characteristics for a voltage regulator are useful in predicting performance since dc load and line
regulation are affected by changes in junction temperature.
These temperature changes can result from either a change
in the ambient temperature, TA, or a change in the power
dissipated in the IC regulatoL The eJfects of ambient temperature change on the dc outpu t voltage can be estimated from the "Temperature Coefficient of Output
Voltage" characteristic parameter shown as ±0.002%/oC,
typicaL Power dissipation is typically changed in the IC
regulator by varying the dc load current. To estimate the
de change in output voltage due to a change in the dc load
current, three effects must be considered:
THERMAL CONSIDERATIONS
Monolithic voltage regulators are subjected to internal
heating similar to a power transistor_ Sin'ce the degree of
internal heating is a function of the specific application,
the designer must use caution not to exceed the specified
maximum junction temperature (+ ISOOC). Exceeding
this limit will reduce reliability at an exponential rate.
Good heatsinking not only reduces the junction temperature for a given power dissipation; it also tends to improve
the dc stability of the output voltage by reducing the
junction tempera ture change resulting from a change in the
power dissipation of the IC regulator. By using the derating. factors or thermal resistance values given in the
Maximum Ratings Table of this data sheet, junction temperature can be computed for any given application in
the same manner as for a power transistor' _ A shortcircuit on the output terminal can produce a "worst-case"
thermal condition especially if the maximum input voltage
is applied simultaneously with the maximum value of
short-circuit load currenL Care should be taken not to
I. junction temperature change due to the change in
the power dissipation
2. output voltage decrease due to the finite output
impedance of the control amplifier
3_ thermal gradient on the lC chip_
A temperature differential does exist across a power lC
chip and can cause a de shift in the output voltage_ A
"gradient coefficient," GCVO, can be used to describe this
effect and is typically -0_06%/watt for the MCIS69_ For
an example of the relative magnitudes of these effects,
consider the following conditions:
Given
'For more detailed information of methods used to compute junction temperature, see Motorola Application
Note AN-226, Measuremen t of Thermal Properties of
Semiconductors.
with
MCIS69
Yin = 10 Vdc
Vo
MC1569-Pg. 16
8-370
= 5 Vde
MC1569, MC1469 (continued)
and
IL =100 rnA to 200 rnA
2. b.VO due to Zo
(b.IL =100 rnA)
Ib.Vol = (-zoXIL)
Ib.VOI = -(2 x 10 -2)(10- 1) = -2 mV
TO-66 Case with heatsink
3. b.VO due to gradient coefficient, GCVO
assume
0CS
=0.2 0 C/W
Ib.Vol
=(GCVOXVO)(b.PD)
Ib.Vol = (-6 x 1O-4 /W)(S voltsXS x IO- I W)
0JC
= 7.ISoC/W
(from maximum ratings
table)
It is desired to find the {:N 0 which results from this b.1 L.
Each of the three previously stated effects on Vo can now
be separately considered.
Ib.VOI = -1.6 mV
Therefore the total b. Vo is given by
Ib.VO totall = ±O.S - 2.0 -1.6 mV
OR
1. b.VO due to b.TJ
-4.1 mV ~ IVo total I ~ - 3.1 mV
b.Vo = (VO)(b.PD)(TCVOXOJC+ OCS + 0SA)
OR
b.VO = (SV)(S V x 0.1 AX±0.002%/"C)(9.3SoC/W)
b.Vo "" ±O.S mV
Other operating conditions may be substituted and cum·
puted in a similar manner to evaluate the relative effects
of the parameters.
TYPICAL PRINTED CIRCUIT BOARD LAYOUT
2"
MC1569-Pg. 17
8-371
MC1569, MC1469 (continued)
FIGURE 42 - LOCATION OF COMPONENTS
·Ci not shown
FIGURE 43 - CIRCUIT SCHEMATIC FOR PRINTED CIRCUIT BOARD IPg. 17)
3.5 V~VO~37 V, 1 mA~ IL $500 mA
Rsc
~~~----_.-~~~--~----+Vo
+V in - -.....------<>---t
I
I
O.Ol"F~ 'C i
I
I
III
I
MC1569R
MCl469R
-:.1::-
Rl
CASE
R2=6.Bk
Select Rl to give desired VO: Rl
~
12 Vo -7) kn
·C j - May be required if tong input leads are used.
MC1569-Pg. 18
8-372
MC1569, MC1469 (continued)
PARTS LIST
Component
R1
R2
Description
Value
Select
6.8 k
1/4 or 1/2 watt carbon
*RA
Select
IRC Model X·201 Mallory Model MTC·1
Rsc
Select
1/2 watt carbon
or equivalent
*RL
Select
For minimum current of 1 mAde
Co
1.0/.lF
Sprague 1500 Series, Dickson 0 10C series
CN
Cc
*Cj
0.1/.1F
O.OO1/.1F
0.01/.1F
Q1
Q2
MC1569R or MC1469R
2N5223, 2N706, or equivalent
or equivalent
~
Ceramic Disc - Centralab DDA 104,
Sprague TG·P10, or equivalent
*HS
-
Heatsink Thermalloy #6168B
*Socket
INotShownl
Robinson Nugent #0001306
Electronic Molding Corp. #6341·210·1,
6346-188·1, 6349·188-1
PC Board
-
Circuit Dot, Inc. HPC1113
1155 W. 23rd St., Tempe, Ariz. 85281
·Optional
LATCH-UP
Latch-up of these and other regulators can occur if:
1. There are plus and minus voltages available
2. A load exists between Vo+ and Vo- (This "common load" may be something inconspicuous
-
e.g. an operational amplifier. Nearly everyone who uses
+ and - voltages will have a
common load from VCC to VEE.l
3. Vin + and Vin - are not applied at the same time.
The above conditions result in one of the two outputs becoming reverse-biased which prevents the
regulator from turning ON . Latch-up can be prevented by the circuit configurations shown in
Figures 44 and 45.
FIGURE
44
Rl
Note: This wnflguration inereases miolmum
Input·olltputdiHerentlillvoltageby" 0.7 V.
FIGURE
45
MC1569-Pg.19
8·373
MC1569, MC1469 (continued)
INDEX
MC 1569 Specification
Page No.
8
Circuit Schematic (MC1569J
Complementary Tracking Voltage Regulator
Dual Power Supplies
Electrical Characteristics
General Design Information
Latch-Up
1,12
1,12
2
4
19
2
2
Maximum Ratings
Mechanical Outline Drawings
NPN Current Boost
PNP Current Boost
Printed Circuit Board Layout
Shutdown Techniques
Switching Regulator
Theory of Operation
Test Circuits
Thermal Considerations
Thermal Shutdown
Typical Characteristics (Curves)
Typical Circuit Connection
Voltage Boosting
Zero TC Voltage Reference Source
1,10
10
17
4,13
10
7,8,9
3
16
15
5,6
1.4,18
14
15
MC1569-Pg. 20
8-374
"~__________D_U_A_L_C_L_O_C_K__D_R_I_V_E_R____~
MC1585L
DUAL MaS CLOCK DRIVER
· .. designed for high-speed driving of highly capacitive loads in a
MOS system.
•
High Output Current (±400 rnA peak)
•
MDTL, MTTL Compatible Input
•
Output Compatible with High and Low Threshold
P-Channel MOS Devices
DUAL MaS
CLOCK DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
FIGURE 1 - CIRCUIT SCHEMATIC
INTERNAL
RESISTOR
V02
CERAMIC PACKAGE
CASE 632
TO-116
VCC2
Val
FIGURE 2
11
INTERNAL
RESISTOR
INTERNAL 2
RESISTOR
CURRENT 3
SOURCE BIAS
4
VCC2
TYPICAL OPERATION
ov
ov
2:
o
~
o
>
o
100 ns IDIV
See Packaging Information Section for outline dimensions.
8-375
CURRENT 5
SOURCE BIAS
INTERNAL 6
RESISTOR
7
Val
Vinl
MC1585L (continued)
MAXIMUM RATINGS (TA = +250 C unless otherwise noted)
Symbol
Value
Voltage Supply Range 1 (See Figure 3)
Rating
VRl
10
Vdc
Voltage Supply Range 2 (See Figure 3)
VR2
30
Vdc
Voltage Supply Range 3 (See Figure 3)
VR3
22
Vdc
Vin(max)
10
Vdc
Input Voltage
Unit
T stg
-65 to +150
Operating Temperature Range
TA
-55 to +125
°c
°c
Power Dissipation
Po
1000
6.7
mW
mWioC
Storage Temperature Range
Ceramic Package
Derate above T A
= +250 C
li8JA
FIGURE 3 - SUPPLY VOLTAGE RANGE DEFINITION
VCC~--l+
+ f - - - VCC 1
I1
VR1
FIGURE 4 - ALLOWABLE VALUES FOR VCC2 AND VEE
-30
-15
-10
-15
-10
VOLTS
-5.0
-0
+5.0
+10
+15
+10
VCC1r-~~~--~---+--~--~--~--~--~--~~
VCC1
MCI585 4
MOS
CLOCK DRIVER
I_-=-___ I~
1
VR3
00
~
o
>
___ _
VEE
VEE
SWITCHING CHARACTERISTICS (CL = 1000 pF, TA = +250 C unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
Propagation Delay Time, Low to High Level
tPLH
-
75
125
ns
Transition Time, Low to High Level
tTLH
-
75
125
ns
Propagation Delay Time, High to Low Level
tPHL
-
50
75
ns
tTHL
-
50
75
ns
Characteristic
Transition Ti me, High to Low Level
The above characteristics were measured with VCCI
measured as shown in Figure 5.
= 5.0volts, VEE = -20 volts, VCC2 = a volts, and CL = 1000 pF. The
FIGURE 6 - AC TEST CIRCUIT
FIGURE 5 - SWITCHING TIME WAVEFORM
::~~
i-'PHL --I
v
OH
'PLH-+-----!
---,
-.1
90%
f = 100kHz
Duty Cycle = 10%
If--'THL
I
I
I
I
I
SWitching times are
o-t
Ctl-°O_P..F_____
+5.0 V
f--'TLH
I
i
I
8-376
MC1585L (continued)
ELECTRICAL CHARACTERISTICS
TEST CURRENT AND VDLTAGE VALUES
(T A'" +25 0 C unless otherwise noted I
Function
(Pin 2 is shorted to pin 3 and pin 5 is short·
ed to pin 6.}
Symbol
10H 10L
mA
Unit
Pin
Under
Min
Max
Unit
',L
-1.6
mA
+50
"A
Output Voltage: High Output
"H
VOH
Low Output
VOL
7
-13.'
Volts
mA
Input Currents: Forward
Reverse Leakage
Supply Current
-1.0
Value
V,L I
Supply Voltages
IVCCIL I VCC1HI VEE I
V,H
VCC2
Volts
+1.0
1.1
1.7B
5.5
'.5
-15
+5.0
Test Limits
Test
Symbol
Characteristic
Input
Voltages
Load
Currents
TV.
TEST CURRENTIVOLTAGE APPLIED TO PINS LISTED BELOW,
8
12
11
10
8,9
12
11
10
12
Volts
+3.7
Veel High Output
Veel Low Output
ICC1H
12
ICCIL
12
+10
+7.0
VEE High Output
'EEH
11
-25
mA
VEE Low Output
'EEL
11
-6'
mA
VCC2 High Output
ICC2H
+15
mA
VCC2 Low Output
ICC2L
+57
mA
8,13
mA
8,13
B,13
GND
9
11
8,9
12
11
9,1'
12
11
8,9,13,1'
12
11
9,1'
12
11
8,9,13,1'
12
11
9,1'
12
11
8,9,13,1'
12
11
10
•
10
10
10
10
•
•
10
10
10
TYPICAL CHARACTERISTICS
FIGURE 7 - PACKAGE LIMITATION ON POWER DISSIPATION
2. 0
1.8
5
1. 6
~ 1.4
...........
z
............
~
1. 2
!i:
0
~
,
..............
-""""'1--...
~ 0.8
:5:~ o. 6
~
..............
............
0.4
'-..........
0.2
o
-55
-35
-15
+5.0
+25
+45
+65
+B5
+105
+125
+145
TA, AMBIENT TEMPERATU RE IOC)
FIGURE 9 - MAXIMUM DIFFERENTIAL LEVEL SHIFT
POWER DISSIPATION (At I•••t on. input low)
FIGURE 8 - MAXIMUM DIFFERENTIAL LEVEL SHIFT
POWER DISSIPATION (WITH BOTH INPUTS HIGH)
140
13 0
120
-lEE =
-~O voltl
-~5 VOltl-
~ 110
z 100
lEE
o
90
VEE - -20 Volts
~
70
~
~
~
~
0
I
200
I
180
VCCl = 5.5 V
VCC2 Independent
~ 160
.sz
0
f= 140
VEE = -15 Volts
~EE
60
0
_110
!i:
"-
c;
I--
- r-
'"~
~
~
0
0
100
-55
-35
-15
+5,0
+25
+45
+65
~251v
VEIE = -zolv
+85
+105
+125 +145
TJ, JUNCTION TEMPERATURE IOC)
8-377
~
r- t-- I--
I--- r--
t-- I--
I
BO
VJE
60
I
40
-55
VCCl = 5.5 V
VCC2:= Independent
VJE=-15 V
_101v
I
VEE = -5.0 V
10
o
I I
I
r-- ~
~ 120
VOIt~
~EE -~O VOIt~
0
1
I---
-35
-15
+5.0
+25
+45
+65
+85
TJ,JUNCTION TEMPERATURE IOC)
+105
+125 +145
MC1585L (continued)
TYPICAL CHARACTERISTICS (cant.)
FIGURE 11 - MAXIMUM POWER DISSIPATION OF
INTERNAL RESISTOR (R3)
FIGURE 10 - MAXIMUM BIAS CURRENT versus VOL TAGE ANO
TEMPERATURE WHEN USING INTERNAL BIAS RESISTOR
l
z
o
~
~
14 0
130
120
11 0
100 90
-
(Vi
r--:.:!i.C2 - VEE! = 20 V
0
,70
-r--
I
I
I
I
J
(VCC2 - VEEJ- 15 V
- -
I
(VdC2 - vJE)-IO V
(V6C2 -
o
-55
-35
-15
-.... r-..
10
3
---
8.0
+105
;::
6.0
~
5.0
Q
0:
~
:i:
I-~
4.0
3.0
~ 2.0
o
-55
-35
I'b;"s=bo -
~
r-- ~bi"=4.0mA
1.0
-15
a
Jbias -
lomA
I
I
--- - --
+5.0
+25
+45
+65
+85
TJ,JUNCTION TEMPERATURE (DC)
I--- I-- I - -
(VCC~
(~C2
'-4.0
~
- 5.0
V~E) = s6 V
+5.0
+25
+45 +65
+85
TJ, JUNCTION TEMPERATURE (DC)
6.0
E
~"
I
30
0
10
:<
I
or
VCCI = 5.5 V-
7.0
I
60
50
~
8.0
V~Cl=5.5Iv-
I
E
700
650
600
550
500
0
450
400
~ 350
Q
300
0:
~ 250
:i: 200
~ 150
100
50
-
1-----5~OC < iJ < +12150 C
V
z
'I;' .~l)
nm
/
w
5.0
'"i3
4.0
z
..: 3.0
z
1.0
~O
100
15
200
20
25
30
FIGURE B - SINGLE-ENDED OUTPUT ADMITTANCE
2.5
/"
"§ 2.0
.
..
'"z
I-I--
I--
'"
I!:
1.5
/
'"c
~
0.5
l/
--
20
...-
i-40
..,.
..
B.O
L
7.0
'"
6.0
~
5.0
/ / bl1 ~
c
/'
V
f-""
-
150
9.0
w
z
/
1.0
70 BO 90 100
60
FIGURE 9 - SINGLE·ENDED INPUT ADMITTANCE
1
.5
/b22
ii
c
50
10
~
S
.5
35 40
t, FREQUENCY IMHz)
t, FREQUENCY IMHz)
w
...- V-
2.0
30
10
I-- r-
to
1
-10
7.0
6.0
10<":
V
./
92~-
4.0
~ 3.0
!:
I--
..::
>
2.0
.- .-
1.0
20
100
t, FREQUENCY 1M Hz)
-
....V
LV
-
40
100
t, FREQUENCY (MHz)
8-382
L
........ /~L'200
MC1590G (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - Y21. FORWARD TRANSFER ADMITTANCE.
FIGURE 11 - Y21. FORWARD TRANSFER ADMITTANCE.
RECTANGULAR FORM
S
200
1
'60
+45
-Pin 1
OUTPUT - Pin 5
INPUT
.21
~ 120
;0
t:
i!i«
~
w
r-.
0
r\
0
'21
!--IY211
1'\
80
/"
'21
~
POLAR FORM
.45
I
-135~«-f
-SO ::
.......
~w
-180~ ~
'\ -225~ ~
1\ 1,\ -270~ ;
~
w
~ -40
~
i
\
~-160
~-200
>
2.0
0
/
-80
-120
5.0
10
0
0
i'.
20
0
50
100
200
i2
0
2.0
t, FREQUENCY (MHz)
I- !NPUT - Pin I
~urrUT T~nl ~
\
lUll
II III
5.0
10
z
-315~
I\.. -380 ~
-4115
20
50
100
200
f. FREQUENCY (MHz)
FIGURE 13 - S11.and ~2.INPUT AND OUTPUT
REFLECTION COEFFICIENT
FIGURE 12 - S11 and S22.INPUT AND OUTPUT
REFLECTION COEFFICIENT
8-383
MC1590G (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 15 - 512. REVERSE TRANSMISSION
COEFFICIENT (FEEDBACK)
FIGURE 14 - 521. FORWARD TRANSMISSION
COEFFICIENT (GAIN)
TYPICAL APPLICATIONS
FIGURE 17 - VIDEO AMPLIFIER
FIGURE 16 - 6()'MHz POWER GAIN TEST CIRCUIT
C4
0.001
pF
1.0pF
C2
L2
11
Input
(50m
.---.......... ·0
5.S k
VAGC
'in
CI
1.0 k
TiPF
·t-I!+---+--_+12 Vdc
0.001 pF
VAGC
LI = 7 Turn•• #20 AWG Wire. 511S" Dia..
5/8" Long
L2 = S Turns. #14 AWG Wire, 911S" Dia.,
3/4" Long
CI,C2,C3= (1·30) pF
C4' (HO) pF
0.001 pF +12 Vdc
FIGURE 18 - 3D-MHz AMPLIFIER
(Powe, Gain = 50 dB. BW "" 1.0 MHz)
FIGURE 19 - 100-MHz MIXER
Input from
(1·10) pF
(1·30) pF
Local Oscillator
(70 MHz)
100
o----+~rz. IF Output
(1-30)pF
(HO) pF
(30 MHz)
Sign.llnput ...-"IfL---..,.-....,-O-=--1
(100 MHz)
:;~~) --llf-......- ....+-<~
(I·30)pF
38 pF
+12Vdc
0.002pF
+12 Vdc
II = 12 Turns 122 AWG Wire on a Toroid Core,
(T37·S Micro M.tal or Equiv)
T1: Primary =17 TurnsllO AWG Wife on a Toroid Core,
(T44-S Micro Metal or Equiv)
Ll = 5 Tum~ #IS AWG Wire, 1/4"10,
518" Long
L2 =16 Turns. #20 AWG Wire on a Toroid
Core, (T44-S Micro-Metal or Equiv)
Secondary = 2 Tums120 AWG Wire
8-384
l'
10pH
MC1590G (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 20 - TWO-STAGE 60 MHz IF AMPLIFIER (Po_ Gain "'80 dB, BW ""_5 MHz)
10 k
VAGe __----------------.-----------------~AAr_------__,
24 pF
Input@----j,'---_-----_--+----l
1.0 P
FI
"":----<)-....
+
I
-=
8-385
10PF
~f
MC1594L
MC1494L
~____________________M_U_L_T_IP_L_IE_R_S~
Specifications and Applications InforIllation
MONOLITHIC FOUR-QUADRANT MULTIPLIER
· .. desigl)ed for use where the output voltage is a linear product of
two input voltages. Typical applications include: multiply, divide,
square root, mean square, phase detector, frequency doubler, balanced
modulator/demodulator, electronic gain control.
The MC1594/1494 is a variable transconductance multiplier with
internal level·shift circuitry and voltage regulator. Scale factor, input
offsets and output offset are completely adjustable with the use of four
external potentiometers. Two complementary regulated voltages are
provided to simplify offset adjustment and improve power· supply
rejection.
•
LINEAR FOUR-QUADRANT
MULTIPLIER INTEGRATED
CIRCUIT
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
Operates With ± 15 V Supplies
• Excellent Linearity - Maximum Error (X or V): ± 0.5% (MC1594)
± 1.0% (MC1494)
• Wide I nput Voltage Range - ± 10 volts
• Adjustable Scale Factor, K (0.1 nominal)
• Single·Ended Output Referenced to Ground
• Simplified Offset Adjust Circuitry
• Frequency Response (3 dB Small·Signal) - 1.0 MHz
• Power Supply Sensitivity - 30 mVIV typical
(top view)
CERAMIC PACKAGE
CASE 620
TYPICAL LINEARITY ERROR
versus TEMPERATURE
FOUR·QUAORANT
MULTIPLIER TRANSFER CHARACTERISTIC
1.0 0
5
0
r-5
0
-55
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE IOC)
VX,INPUT VOLTAGE IVOLTS)
CONTENTS
Subject Sequence
Specification
Page No.
Subject Sequence
Maximum Ratings
2
AC Operation
Electrical Characteristics
DC Applications
AC Applications
Specification
Page No.
Test Circuits
2
3
Characteristic Curves
4
Definitions
Circuit Description
5
General Information Index
B
9
11
13
14
Circuit Schematic
5
Package Outline Dimensions
14
DC Operation
6
See Packaging Information Section for outline dimensions.
8-386
+100
+125
MC1594L, MC1494L (continued)
MAXIMUM RATINGS IT A = +2SOC unl~ss otherwise noted)
Rating
Power SupplV Voltage
Differential I npot Signa'
Symbol
Valu.
Unit
V+
V-
+18
Vdo
Vg-VS
.± 16+1, Rvl<30
± 16+1, Rxl< 30
V,0- V,3
Common-Mode Input Voltage
VCMY" Vg= VB
-18
Vdo
Vdo
VCMX" V,0" V,3
Power Dissipation (Package Limitationl
T A'" +250 C
Derate above T A '" +2So C
Operating Temperature Range
VCMY
±1l.S
VCMX
il'.S
PD
,/8JA
750
5.0
mW
mW/DC
DC
TA
-55 to +125
Oto+ 75
MC1594
MC1494
Storage Temperature Range
T stg
DC
-65 to +150
ELECTRICAL CHARACTERISTICS (v+ '" +15 V. V- =-15 V, T A = +2SoC. Rl
=
16 kH, AX '" 30 kH. Ry
=
62 kil. AL '" 47 kn,
unless otherwise noted)
Characteristic
Unit
Linearity
Output error in Percent of full scale
%
-10V----_v,
vy",+---
i= -5.0
g
r-........
-10
Vx'" 1 V(rmsl, Vy = 10 Vdc
Vy'" 1 V(rms), Vx = 10 Vdc
-151--++f-++ RX' 30 kn. Ry' S1 kU
-15
-10 lL03:-.L-LL.LJ..!.lJ
0""5--'-'-..Ll.illll
10-'-:4-.L-.L.l...LLU1ll
lO-;:"S--'-L..ww.w,1O7
-10
IllrSPilllllll1
I~rl:~Opr
RL' ,4,~ ,k"
niIfill'
111111
10 3
f. FREQUENCY (Hz)
f, FREQUENCY (Hz)
FIGURE 11 - LARGE SIGNAL VOLTAGE versus FREQUENCY
FIGURE 12 - LINEARITY versus RX OR Ry WITH K' 1/10
D,S
(j)
w
"'"':;
>
~
0
\
0,5
>-
T
0
~
'"0
'"w'"
............
ClJ'\
~
1\
~
10
I-
ir
:5
Rl Adjusted for K '" 1110
Vin' 10 Vpp
\
0,4
'"
~
0,3
E
0,1
\.
::;
10
(j) With MC155S Buff" Op·Ampl._
ClJ No Op·Ampl., RL' 47 kl1
"
>
.........
'"0
IIIIIII
-
..........
r--
1111111
100
1.0k
lOOk
10k
f. FREQUENCY (Hz)
FIGURE 13 - LINEARITY versus RX OR Ry WITH K
=1
10
30
40
50
RX (knJ
40
SO
80
100
Ry (kill
FIGURE 14 - SCALE FACTOR (K) versus TEMPERATURE
0.10 8
4
3
'" "'-
1
RLI
Adjust~d for KI, 1 _
0.10
Vin = 2 Vpp
0.104
to
~
O.tO1
o
f"'-....
1
........
---
--
S"
a:
K Factor Adjusted for 1/10 at 250C
'\.
w
~
.1
~
"r-.
",,- 0.09 8
0.09
S
---r--.
0.09 4
-
I'-...
;1,0
4.0
S.O
8.0
10
RX (kil)
4.0
8.0
11
16
10
Ry (kn)
-55
(MC1594 - Pg 4)
8-389
-35
-15
+5.0
+15
+45
+S5
+85
TA. AMBIENT TEMPERATURE (OC)
+105
+115 +145
MC1594L, MC1494L (continued)
GENERAL INFORMATION
1.
CIRCUIT DESCRIPTION
1.1
Introduction
with the offset adjust circuits to virtually eliminate sensitivity
of the offset voltage nulls to changes in supply voltage.
As shown in Figure 15, the MC1594 consists of a multiplier
proper and associated peripheral circuitry to provide these
The MC1594 is a monolithic, four-quadrant multiplier that
operates on the principle of variable transconductance. It
features a single-ended current output referenced to ground
and provides two complementary regulated voltages for use
features.
FIGURE 15
(Recommended External Circuitry is Depicted With Dotted
Line5~
,-------------------------------,I
BLOCK DIAGRAM
v·
2 +4.3V
'VA
3
CURRENT ANOVOLTAGE
REGULATOR
Vv 9
f---.".---'----I
FOUR·QUADRANT
MULTIPLIER
IS
10
Vx
6
4
-VR -4.lV ' -_ _ _, . ' -_ _....1
"
DIFFERENTIAL +
CURRENT
CONVERTER
13
12
V-
5~1~5----------4---------7-------------~--4---~-------------r--------~
SIMPLIFIED CIRCUIT
SCHEMATIC
'VR:+4.lV
2
3
<;>----t"-+--+
*
"
-VR :-4.lV
500
500
v5O-------~--~--~------_r------~~----~~----~~----~~------~----------~
J5o-~_.----_1~--_1--~~~----------~----------------------------;_,_------~--t_----~--_,
v'
COMPLETE CIRCUIT
SCHEMATIC
R1<>::==l===l;:::::+~
GNO~
Jr---------------------t"
__~
500
L
REGULATOR
_____________________
MULTIPLIER
(MC1594 - Pg. 5)
8-390
-I
DIFFERENTIAL
CURRENT CONVERTER
MC1594L, MC1494L (continued)
1.2
Regulator (Figura 151
or
The regulator biases the entire MC1594 circuit making it
essentially independent of supply variation. It also provides
two convenient regulated supply voltages which can be used
2VXVy
'0 = RX Ryll
in the offset adjust circuitry. The regulated output voltage
at pin 2 is approximately +4.3 V while the regulated voltage
at pin 4 is approximately -4.3 V. For optimum temperature
stability of these regulated voltages, it is recommended that
1121 = 1141 = 1,0 rnA (equivalent load of 8,6 knl. As will be
shown later, there will normally be two 20 k-ohm potenti-
The output current can be easily converted to an output
voltage by placing a load resistor RL from the output (pin
14) to ground (Figure 17) or by using an op-ampl. as a
current-to-voltage converter (Figure 16). The result in both
circuits is that the output voltage is given by:
ometers and one 50 k-ohm potentiometer connected between
pins 2 and 4.
The regulator also establishes a constantcurrent reference that
controls an of the constant current sources in the MC1594.
Vo =
Note that all current sources are related to current 11 which
is determined by R 1. For best temperature performance,
R1 should be 16 kn so that 11'::::: O.SmA for all applications.
1.3
2RL Vx Vy
RX R yll = KVX Vy
2RL
where K (scale factorl = RXRyll
Multiplier (Figur. 151
The multiplier section of the MC1594 (center section of
Figure 15) is nearly identical to the MC1595 and is discussed
in detail in Application Note AN-489, "Analysis and Basic
Operation of the MC1595", The result of this analysis is
that the differential output current of the multiplier is given
by:
2.
DC OPERATION
2,1
Selection of External Components
For low frequency operation the circuit of Figure 16 is
recommended. For this circuit, RX = 30 kn, Ry = 62 kn,
R1 = 16 kn and hence 11 ~O.5 rnA. Therefore, to set the
scale factor. K. equal to 1110, the value of RL can be calculated to be:
1
2RL
K=-=--10 RXRyll
Therefore, the output is proportional to the product of the
two input voltages.
1.4
or
Differential Current Converter (Figure 15)
This portion of the circuitry converts the differential output
current (lA-IS) of the multiplier to a single-ended output
current (10):
RL
=
RXRyll
(21 (101
=
(30 k) (62 kl (0,5 mAl
20
RL = 46,5 k
Thus, a reasonable accuracy in scale factor can be achieved
by making RL a fixed 47 kn resistor. However. if it is desired
FIGURE 16 - TYPICAL MULTIPLIER CONNECTION
+15 V
-15 V
Rl
~
50k
22k
Vx
P4
10"1
510
AI
"
16k
30k
10pF
Vy
""I
510
>-o-+_Vo
R'
PI
P2
20 k
20 k
01"1
+15 V
·R isnot necessary if
inputsaredccaupled,
-15 V
O·"'r
-10 V";;VX"'+IO V
-10V~Vy"'+10V
MC1594· Pg. 6)
8·391
MC1594L, MC1494L (continued)
offset voltage can be adjusted to zero (see offset and scale
factor adj ustment procedure).
that the scale factor be exact, R L can be comprised of a
fixed resistor and a potentiometer as shown in Figure 16.
It should be pointed out that there is nothing magic about
The input offset adjustment potentiometers, P 1 and P2 will
be necessary for most applications where it is desirable to
take advantage of the multiplier's excellent linearity characteristics. Depending upon the particular application, some
of the potentiometers can be omitted (see Figures 17, 19,
22. 24 and 25),
setting the scale factor to 1110. This is merely a convenient
factor to use if the Vx and Vy input voltages are expected
to be large. say ±10 V. Obviously with Vx
= Vy = 10 V and
a scale factor of unity, the device could not hope to provide
a 100 V output, so the scale factor is set to 1/10 and provides
an output scaled down by a factor of ten. For many applications it may be desirable to set K = 1/2 or K = 1 or even
K = 100. This can be accomplished by adjusting RX. Ry
and R L appropriately.
2.5
Offset and Scale Factor Adjustment Procedure
The adjustment procedure for the circuit of Figure 16 is:
A. X I nput Offset
The selection of R L is arbitrary and can be chosen after
resistors RX and Ry are found. Note in Figure 16 that Ry
(a) connect oscillator (1 kHz, 5 Vpp sinewave) to the "V"
input (pin 9)
is 62 kn while RX is 30 kn. The reason for this is that the
"Y" side of the multiplier exhibits a second order nonlinearity whereas the "X" side exhibits a simple non-linearity.
By making the Ry resistor approximately twice the value
of the RX resistor, the linearity on both the "X" and "Y"
sides are made equal. The selection of the RX and RV
resistor values is dependent upon the expected amplitude of
Vx and Vv inputs. To maintain a specified linearity,
resistors RX and Ry should be selected according to the
following equations:
(b) connect "X" input (pin 10) to ground
(c) adjust X-offset potentiometer, P2 for an ac null at
the output
B. Y Input Offset
(a) connect oscillator (1 kHz, 5 Vpp sinewave) to the "X"
input Ipin 10)
(b) connect "V" input (pin 9) to ground
(c) adjust V-offset potentiometer, Pl for an ac null at
the output
RX~ 3 Vx (max) in kn when Vx is in volts
C. Output Offset
RV ~ 6 Vv (max) in kH when Vv is in volts
(a) connect both "X" and "V" inputs to ground
(b) adjust output offset potentiometer,P3, until the output voltage V o , is zero volts de
For example, if the maximum input on the "X" side is
± 1 volt, resistor RX can be selected to be 3 kH, If the maximum input on the "Y" side is also ± 1 volt, then resistor
Ry can be selected to be 6 kn (6,2 kn nominal value), If a
scale factoraf K = 10 is desired, the load resistor is found to
be 47 kn. In this example, the multiplier provides a gain
of 20 dB.
2.2
(a) apply +10 Vdc to both the "X" and "Y" inputs
Ib) adjust P4 to achieve -10.00 V at the output
(c) apply -10 Vdc to both "X" and "Y" inputs and check
for Vo = -10.00 V
Operational Amplifier Selection
E. Repeat steps A through 0 as necessary.
The operational amplifier connection in Figure 16 is a simple
but extremely accurate current-to-voltage converter. The
output current of the multiplier flows through the feedback
resistor R L to provide a low impedance output voltage from
the op-ampL Since the offset current and bias currents of
the op-ampl. will cause errors in the output voltage, particularly with temperature, one with very low bias and offset currents is recommended. The MC1556/MC1456 or MC1741/
MC1741 C are excellent choices for this application.
The ability to accurately adjust the MC1594 is dependent
on the offset adjust potentiometers. Potentiometers should
be of the "infinite" resolution type rather than wirewound.
Fine adjustments in balanced-modulator applications may
require two potentiometers to provide "coarse" and "fine"
adjustment. Potentiometers should have low temperature
coefficients and be free from backlash.
Since the MC1594 is capable of operation at much higher
frequencies than the op-ampL, the frequency characteristics
of the circuit in Figure 16 will be primarily dependent upon
the op-ampl.
2.3
D. Scale Factor
2.6
While the MC1594 provides excellent performance in itself,
overall performance depends to a large degree on the quality
of the external components. Previous discussion shows the
direct dependence on RX, Ry, and RL and indirect dependence on R 1 (through '1), Any circuit subjected to temperature variations should be evaluated with these effects in mind,
Stability
The current-to-voltage converter mode is a most demanding
application for an operational amplifier. Loop gain is at its
maximum and the feedback resistor in conjunction with
stray or input capacitance at the multiplier output adds additional phase shift. It may therefore be necessary to add
(particularly in the case of internally compensated op-ampls.)
a small feedback capacitor to reduce loop gain at the higher
frequencies. A value of 10 pF in parallel with RL should be
adequate to insure stability over production and temperature
variations, etc.
2.7
Bias Currents
The MC1594 multiplier, like most linear IC's, requires a de
bias current into its input terminals. The device cannot be
capacitively coupled at the input without regard for this bias
current. If inputs Vx and Vy are able to supply the small bias
current (~0.5 IlA) resistors, R (Figure 16) can be omitted,
If the MC1594 is used in an ac mode of operation and
capacitive coupling is used the value of resistor R can be any
reasonable value up to 100 kil. For minimum noise and
optimum temperature performance, the value of resistor R
shou Id be as low as practical.
An externally compensated op-ampl. might be employed
using slightly heavier compensation than that recommended
for unity-gain operation.
2.8
2.4
Temperature Stability
Offset Adjustment
Parasitic Oscillation
When long leads are used on the inputs, oscillation may occur.
In this event, an RC parasitic suppression network similar to
the ones shown in Figure 16 should be connected directly
to each input using short leads. The purpose of the network
The non-inverting input of the op-ampl. provides a convenient
point to adjust the output offset voltage, By connecting this
point to the wiper arm of a potentiometer (P3), the output
(MC1594 - Pg. 7)
8-392
MC1594L, MC1494L (continued)
"zeros" is seen in Figures 9 and 10.
is to reduce the "Q" ofthe source-tuned circuits which cause
the oscillation.
Inabil ity to adjust the circuit to with in the specified accuracy
twice the value of the RX resistor, the zero associated with
the "V" input will occur at approximately one octave below
the lero associated with the "X" input. For RX = 30 kn and
may be an indication of oscillation.
3.
AC OPERATION
3.1
General
Ry == 62 kn. the zeros occur at 1.5 MHz for the "X" input
and 700 kHz for the "V" input. These two measured break-
points correspond to a shunt capacitance of about 3.5 pF.
Thus, for the circuit of Figure 17, the "X" input zero and
"Y" input zero will be at approximately 15 MHz and
7 MHz respectively.
It should be noted that the MC1594 multiplies in the time
domain, hence, its frequency response is found by means
of complex convolution in the frequency (Laplace) domain.
This means thatif the "X" input does not involve afrequency,
it is not necessary to consider the "X" side frequency
response in the output product. Likewise, for the "V" side.
Thus, for applications such as a wideband I inear AGe amplifier which has a dc voltage as one input, the multiplier frequency response has one zero and one pole. For applications
which involve an ac voltage on both the "X" and "V" side,
such as a balanced modulator, the product voltage response
will have two zeros and one pole, hence, peaking may be
present in the output.
From this brief discussion, it is evident that for ac applications; (1) the value of resistors AX, RV and RL should be
kept as small as possible to achieve maximum frequency
response, and (2) it is possible to select a load resistor R L
such that the dominant pole (RL, C{») cancels the input zero
(RX, 3.5 pF or Ry, 3.5 pF) to give a flat amplitude characteristic with frequency. This is shown in Figures 9 and 10.
Examination of the frequency characteristics of the "X"
and "~V"~ inputs will demonstrate that forwideband amplifier
applications, the best tradeoff with frequency response and
gain is achieved by using the "Y"input for the ac signal.
For ac applications requiring bandwidths greater than those
specified for the MC1594, two ot'1.er devices are recomFor modulator-demodulator applications, the
mended.
MC1596 may be used up to 100 MHz. For wideband multiplier applications, the MC1595 (using small collector loads
and ac coupling) can be used.
For ac operation, such as balanced modulation, frequency
doubler, AGC, etc" the op-ampl. will usually be omitted as
well as the output offset adjust potentiometer. The output
offset adjust potentiometer is omitted since the output will
normally be ae-coupled and the de voltage at the output is
of no concern providing it is close enough to zero volts that
it will not cause clipping in the output waveform. Figure 17
FIGURE 17 - WIDEBAND MULTIPLIER
6.2k
3k
+15 V -15 V
'y
I
I
I
:,~ i~~CD
"
I
I
13
51k
20k
K" 1
ex (max) =ey(max) = ,1 VI
shows a typical ac multiplier circuit with a scale factor K~ 1.
Again, resistor RX and RV are chosen as outlined in the
previous section, with RL chosen to provide the required
scale factor.
The offset voltage then existing at the output will be equal to
the offset current times the load resistance. The output offset current of the MC1594 is typically 17 p.A and 35
maximum.
3.3
Slew·Rate
The MC1594 multiplier is not slew-rate limited in the ordinary sense that an op-ampt. is. Since all the signals in the
multiplier are currents and not voltages, there is no charging
and discharging of stray capacitors and thus no limitations
beyond the normal device limitations. However, it should
be noted that the quiescent current in the output transistors
is 0.5 mA and thus the maximum rate of change of the output voltage is limited by the output load capacitance by
the simple equation:
~A
Thus, the maximum output offset would be
about 160 mV.
3.2
The reason for this
increase in gain is due to the bypassing of RX and Ry at
high frequencies. Since the Ry resistor is approximately
Bandwidth
The bandwidth of the MC1594 is primarily determined by
two factors. First, the dominant pole will be determined by
the load resistor and the stray capacitance at the output
terminal. For the circuit shown in Figure 17, assuming a
total output capacitance (Co) of 10 pF, the 3 dB bandwidth
would be approximately 3,4 MHz. If the load resistor were
47 kn, the bandwidth would be approximately 340 kHz.
Secondly, a "zero" is present in the frequency response
characteristic for both the "x" and "Y" inputs which causes
the output signal to rise in amplitude at a 6 dBfoctave slope
at frequencies beyond the breakpoint of the "zero". The
"zero" is caused by the parasitic and substrate capacitance
which is related to resistors RX and Ry and the transistors
associated with them. The effect of these transmission
Slew· Rate
AVo _
AT
~o
C
Thus, if Co is 10 pF, the maximum slew-rate would be:
AVo 0.5 x 10-3
- - - - - - 50
AT
10 x 10- 12
V/~s
This can be improved if necessary by addition of an emitterfollower or other type of buffer.
3.4
Phase· Vector Error
All multipliers are subject to an error which is known as the
phase-vector error. This error is a phase error only and does
not contribute an amplitude error per se. The phase-vector
(MC1594 - Pg. 8)
•
MC1594L, MC1494L (continued)
error is best explained by an example. If the "X" input is
described in vector notation as
X=A ~
4.
DC APPLICATIONS
4.1
Squaring Circuit
0"
If the two inputs are connected together, the resultant
function is squaring:
and the "Y" input is described as
Vo = KV 2
Y=B40"
where K is the scale factor (see Figure 19).
then the output product would be expected to be
Vo = AB ~
0"
However, a more careful look at the multiplier's defining
equation will provide some useful information. The output
voltage, without initial offset adjustments is given by:
(see Figure 18)
However, due to a relative phase shift between the "X" and
Vo= K(V x + Viox -Vxoff) (Vy + Vioy - Vy off) + Voo
"Y" channels, the output product will be given by
(See "Definitions" for an explanation of terms).
With Vx = Vy = V (squaring) and defining
Notice that the magnitude is correct but the phase angle of
the product is in error. The vector, V, associated with this
error is the "phase-vector error", The s.tartling fact about
the phase-vector error is that it occurs and accumulates much
EX
= Viox
- Vx off
0 the transfer
function through the multiplier is non-inverting. Its output
is fed to the inverting input of the op-ampl. Thus, operation
is in the negative feedback mode and the circuit is de stable.
Should Vx change polarity, the transfer function through
the multiplier becomes inverting, the amplifier has positive
feedback and latch-up results. The problem resulting from
1. Set Vz = 0 volts and adjust the output offset potentiometer (P3) until the output voltage (Va) remains at
some (not necessarily zero) constant value as Vx is varied
between +1.0 volt and +10volts.
2. Maintain Vz at 0 volts, set Vx at +10 volts and adjust the Y input offset potentiometer (P1) until Vo = 0
volts.
3. With Vx = VZ, adjust the X input offset potentiometer
(P2) until the output voltage remains at some (not necessarily - 10 volts) constant value as Vz = V X is varied
between +1.0voltand+10volts.
FIGURE 20 - BASIC DIVIDE CIRCuiT USING MULTIPLIER
Vx
4. Maintain Vx = Vz and adjust th,e scale factor potentiometer (R L) until the average value of V 0 is -10 volts as
Vz = Vx is varied between +1.0 volt and +10 volts.
K Vx Vy
Vz
MC1594l
(MC1494lj
~
-K VXVy
5. Repeat steps 1 through 4 as necessary to achieve optimum performance.
OR
·Vz
Users of the divide circuit should be aware that the accuracy
to be expected decreases in direct proportion to the denomi-
Vo=-
KVx
Vz
>--....- ...
Vo
FIGURE 21 - PRACTICAL DIVIDE CIRCUIT
62k
30k
Vz
r--"I'-----'IIYv---+. MZ91.IIB.
<
OAEOUIV
lN951B
(IN5240B)
-=
(10V)
OR EQUIV
MC1594L
(Mel'S4LI
Vx
10PFl
510
15
13
-1DVz
Vo=-Vx
Pt 20 k
+15 V
-15 V
O __4 - _.... V,
nator voltage. As a result, if V X is set to 10 volts and 0.5%
accuracy is available, then 5% accuracy can be expected
Vx is only 1 volt.
In accordance with an earlier statement, Vx may have only
when
one polarity, positive, while
4.3
Vz may be either polarity.
Square Root
A special case of the divide circuit in which the two inputs
to the multiplier are connected together results in the square
root function as indicated in Figure 22. This circuit too
may suffer from latch-up problems similar to those of the
divide circuit. No~e that only one polarity of input is allowed
and diode clamping (see Figure 23) protects against accidental
latch-up.
This circuit too, may be adjusted in the closed-loop mode:
of approximately 20 dB.
1. Set Vz = -0.01 Vdc and adjust P3 (output offset) for
Va = 0.316 Vdc.
2. Set Vz to -0.9 Vdc and adjust P2 ("X" adjust) for Vo =
+3 Vdc.
3. Set Vz to -10 Vdc and adjust P4 (gain adjust) for Vo =
+10 Vdc.
It is AGC'd through a 60 dB
dynamic range with the application of an AGe voltage from
o Vdc to 1 Vdc. The bandwidth of the amplifier is determined by the load resistor and output stray capacitance. For
this reason, an emitter-follower buffer has been added to
extend the bandwidth in excess of 1 MHz.
5.2
Balanced Modulator
When two-time variant signals are used as inputs, the result-
FIGURE 23 - SQUARE ROOT CI RCUIT
61k
30k
r---~~--------~~---+"Vz
lN962B
(IN51.,BI
-=
(11 V)
OR EOUIV
Vo
10P'1
510
15
13
51k
P320k
+15 V
-15 V
-lOV';;;;Vz';;;;OV
-15 V +15V
(MC1594 -Pg. 11)
8-396
MC1594L, MC1494L (continued)
ing output is suppressed·carrier double-sideband modulation.
In terms of sinusoidal inputs, this can be seen in the following
FIGURE 25 - BALANCED MODULATOR
+15V -15 V
equation:
Va = K( e1 coswmt) (e2 caswet)
3k
where wm is the modulation frequency and we is the carrier
frequency. This equation can be expanded to show the
suppr~ssed carrier or balanced modulation:
6.2k
O.l>lF
1:
11
15
Kele2
VO =-2- [Cos(wc+wm)t+cos(wc-wm)t]
MC1594l
(MC1494U
Unlike many modulation schemes, which are non-linear in
nature. the modulation which takes place when using the
MC1594 is linear. This means that for two sinusoidal inputs,
the output will contain only two frequencies, the sum and
"
eo" Kecem
K" 1
RL
difference, as seen in the above equation: There will be no
spectrum centered about the second harmonic of the carrier,
or any multiple of the carrier. For this reason, the filter
requ irements of a modulation system are reduced to the
minimum. Figure 25 shows the MC1594 configuration to
perform this function.
13
Uk
51k
20k
16k
ec ':;:±1 Vpk
em ';;;±.2 Vpk
FIGURE 24 - WIDEBAND AMPLIFIER
WITH LINEAR AGC
-15 V +15 V
3k
6.2k
O.I>lF
rO. 1 >lF
81:
11
The adjustment procedure for this circuit is quite simple.
(1)
Place the carrier signal at pin 10. With no signal
applied to pin 9, adjust potentiometer P1 such that an ac
null is obtained at the output.
(2)
Place a modulation signal at pin 9. With no signal
applied to pin 10, adjust potentiometer P2 such that an ac
null is obtained at the output.
Again, the ability to make careful adjustment of these offsets
will be a function of the type of potentiometers used for
P1 and P2. Multiple turn cermet type potentiometers are
recommended.
15,:"
2N3946
(2N39041
OR EQUIV
14
MC1594L
(MC1494L)
10
5.3
VAGC
51k
13
51k
-15
_ J....., _
16k
Frequency Doubler
3k
If for Figure 25 both inputs are identical;
v
Then the output is given by
20k
eo
=
emec
=
E 2 cos 2 wt
which reduces to
E2
eo
Notice that the resistor values for AX. Ry, and RL have
been modified. This has been done primarily to increase the
bandwidth by lowering the output impedance of the MC 1594
and then lowering RX and Ry to achieve a gain of 1. The
ec can be as large as 1 volt peak and 8m as high as 2 volts
peak. No output offset adjust is employed since we-are
interested only in the ac output components.
The input R's are used to supply bias current to the multiplier inputs as well as provide matching input impedance.
The output frequency range of this configuration is determined by the 4.7 k ohm output impedance and capacitive
loading. Assuming a 6 pF load, the small-signal bandwidth
="2
(1 + cos2wt)
This equation states that the output will consist of a dc term
equal to one half the peak voltage squared and the second
harmonic of the input frequency. Thus, the circuit acts as a
frequency doubler. Two facts about this circuit are worthy
of note. First, the second harmonic of the input frequency
is the only frequency appearing at the output. The fundamental does not appear. Second, if the input is sinusoidal,
the output will be sinusoidal and requires !!e filtering.
The circuit of Figure 25 can be used as a frequency doubler
with input frequencies in excess of 2 MHz.
5.4
is 5.5 MHz.
Amplitude Modulator
The circuit of Figure 25 is also easily used as an amplitude
modulator. This is accomplished by simply varying the input
offset adjust potentiometer (P1) associated with the modu~
The circuit of Figure 25 will provide a typical carrier rejection
of :;" 70 dB from 1 0 kHz to 1.5 MHz.
(MC1594 - Pg. 12)
8-397
•
.MC1594L, MC1494L (continued)
lation input. This procedure places a de offset on the
modu~
Vy off == "y" input offset adjust voltage
lation input of the multiplier such that the carrier still passes
Voo == output offset voltage
thru the multiplier when the modulating signal is zero.
The result is amplitude moduiation. This is easily seen by
The voltage transfer characteristic below indicates "X", "Y"
examining the basic mathematical expression for amplitude
modulation given below. For the case under discussion,
with K' I,
and output offset voltages.
FIGURE 26
eo = IE + Em coswmt) (E c caswetl
~
'
where E is the de input offset adjust voltage. This expression
can be written as:
eo
==
where
I
Eo [1 + M caswetl coswct
Eo' EEc
and
M ==
Em
E
..
== modulation Index
This is the standard equation for amplitude modulation.
From this, it is easy to see that 100% modulation can be
achieved by adjusting the input offset adjust voltage to be
exactly equal to the peak value of the modulation, Em. This
is done by observing the output waveform and adjusting the
input offset potentiometer, P1, until the output exhibits the
familiar amplitude modulation waveform.
5.5
(V y " t 10 Vj
6.2
Phase Detector
If the circuit of Figure 25 has as its inputs two signals of
identical frequency but having a relative phase shift the out-
Be
Example: 0.35% I inearity means
Va'
= Ec coswct
6.3
eo
=
eeem
=
EcEm
The addition of a simple low pass filter to the output (which
eliminates the second cosine term) and return of R L to an
6.4
and one output, operating specifications are difficult to
define and interpret. Indeled the same specification may be
defined in several completely different ways depending upon
which manufacturer is doing the defining. In order to clear
up some of this mystery, the following definitions and
=- O.
Output Offset Current and Voltage
Output offset voltage (Vaal is:
Vo~ == 100 RL
where RL is the load resistance.
examples are presented.
Note: Output offset voltage is defined by many manufacturers with all inputs at zero but without adjusting
"X" and "Y" offset voltages to zero. Thus it includes
input offset terms, an output offset term and a scale
factor term.
Multiplier Transfer Function
The output of the multiplier may be expressed bV this
equation:
6.5
Scale Factor
Scale factor is the K term in Equation (1), It determines the
"gain" of the multiplier and is expressed approximatelv by
the following equation.
where K == scale factor (see 6.5)
vx
Input Offset Voltage
Output offset current (lao) is the dc current flowing in the
output lead when Vx = Vy = 0 and "X" and "Y" offset voltages are adjusted to zero.
DEFINITIONS OF SPECIFICATIONS
Va' K(V x ± Viox-Vxoff)(Vy± Vioy ·Vyoff)± Voo (1)
(0.0035) (10 volts)
adjust Vx off so that (± Via x -Vx off)
Because of the unique nature of a multiplier, i.e., two inputs
6.1
""""10 ±
Vo(ac)' K (O± Viox ·V x off) (sinwt)
offset adjustment potentiometer will result in a de output
voltage which is proportional to the cosine of the phase difference.
Hence, the circuit functions as a synchronous
detector.
VxVy
The input offset voltage is defined from Equation (1). It is
measured for V x and Vy separately and is defined to be that
dc input offset adjust voltage ("x" or "y") that will result in
minimum ac output when ac (5 Vpp, 1 kHz) is applied to the
other input ("V" or "x" respectively). From Equation (1)
we have:
EcEm coswct cos(wct + (p)
eo = - 2 - [coset> + cos(2wct +
fo
_.
-
VOl
V02
MHz
MHz
kHz
kHz
Vdc
dB
ACM
MC1495
MC1595
12
-
CMV
MC1495
MC1595
11
-
.-
Vdc
9
Vo
-
±.14
-
Vpeak
Power Supply Sensitivity
12
S+
S-
--
5.0
10
-
mV!V
Power Supply Current
12
17
-
6.0
7.0
mA
DC Power Dissipation
12
Po
-
135
170
mW
Differential Output Voltage Swing Capability
8-401
-
MC1595L, MC1495L(continued)
MAXIMUM RATINGS (T'A =+
un essotherwlse no tedt
Rating
Applied Voltage
(V2-V l. V14- V l. Vl-V9. Vl-V 12. Vl-V4.
VI-Va. V12-V7. V9-V7. Va-V7. V4-V7t
Differential I nput Signal
Symbol
IN
Val...
V12-V9
V4-V a
±(6+113 RX)
±(6+13 Ry)
10
10
Maximum Bias Current
13
113
Po
Power DiSlipation (Package Limitation)
Ceramic Package
Derate above T" = +250 C
Operating Temperature Range
30
750
5.0
TA
MC1495
MC1595
Oto +70
-55 to +125
Storage Temperature Range
Tstg
-65 to +150
Unit
Vdc
Vdc
Vdc
mA
mW
mW/oC
°c
°c
°c
TEST CIRCUITS
FIGURE 4 - LINEARITY (USING NULL TECHNIQUE)
,.,......,-.,..--...,..--------+---r-------.v+=+15V
O.''''~
11
10k
"
"
10k
.. k
"
MCI595l
fMCl485l)
10k
"
OFFSET •
ADJUST
"
"k
_ _......l
-----'
SEE fiGURE 13
SCALE
FACTOR
ADJUST
"k
>-c......... V,
"k
"k
OUTPUT
OFfSET
ADJUST
. +--------:.....---....------------+-------...
.~O.'''F
NOTES:
AdjUII: ''Scali fIC10r Adlust" for a mtli in Ve.
This xhl""tic tor iHultfllivl purposa onlynot • •ifild for tilt conditiD....
FIGURE 5 - LINEARITY (USING x·y PLOTTER TECHNIQUEt
.,
32V
19.1k
Vy
y
OFFSET ADJUST. {
ISEEFIGURES 13& 14) x
PLonER
V·INPUT
SCALE
FACTOR
ADJUST.
-ISV
8-402
X·V
PLOTTER
V··· .. V
MC1595L, MC1495L
(continued)
TEST CIRCUITS (continued)
FIGURE 7 - INPUT RESISTANCE
FIGURE 6 - INPUT AND OUTPUT CURRENT
Ry~15k
+32 V
RX~15k
el
=
1.0 V (rms)
20 Hz
Ry~15k
+32 V
RX~15k
11
1.0 M
9.1 k
1
11 k
14
0.1
11 k
~F
13.75 k
-15 V
-15 V
FIGURE 8 - OUTPUT RESISTANCE
Ry
15 k RX
~
~
FIGURE 9 - BANDWIDTH (RL
= 11
kni
+32 V
15 k
11
+32 V
9.1 k
RL
MC1595L
IMCI495L}
14
9.1 k
~
11 k
'2
11 k
MC1595L
(MCI495L1
11 k
14
13
11k
0.1
'\J
13
13.7 k
'1
1.0 V Irms}
20 Hz
0.1 "F
~
R13
13.7 k
*'
T_
Teo
O.I"F
SCALE
FACTOR
ADJUST.
-
I
- ....L.
- . CL S 3.0 pF
--t--
-15 V
FIGURE 10 - BANDWIDTH (RL
Ry~510
= 50 nl
~F
FIGURE 11 - COMMON·MODE GAIN and
COMMON·MODE INPUT SWING
V"'"=+15 V
RX~510
15 k
+32 V
15 k
11
1k
9.1 k
50
MC1595L
(MCI495L1
50
+ 11 k
14
13
12 k
11 k
Vo
0.1 fJ.F
11.0mA
K = 40
5.0 k
SCALE
FACTOR
A~JUST.
-15 V
-15 V
8·403
Vo
ACM ~ 20 log CMVy
Vo
or 20 log CMVX
MC1595L, MC1495L (continued)
TEST CIRCUITS (continued)
FIGURE 13 - OFFSET ADJUST CIRCUIT
FIGURE 12. - POWER SUPPLY SENSITIVITY
+32 V
15 k
15 k
+32 V
V+
9.1 k
2.0 k
11k
2.0 k
lN753
6.2 V
11k
4.3 k
13.7k
2.0 k
10 k
s+ = III (Vol - Vo211
~
tlV+
-15 V
-15 V
s- =
-15V
III (Vol - Vozll
tlV-
FIGURE 14 - OFFSET ADJUST CIRCUIT (ALTERNATE)
V+
5.1 V
5.1 V
2k
-15 V
8-404
MC1595L, MC1495L (continued)
TYPICAL CHARACTERISTICS
FIGURE 15 - LINEAR lTV versus TEMPERATURE
FIGURE 16 - SCALE FACTOR versus TEMPERATURE
2. 0
1.
0.110
81'\.
6""-
1.
~
~
1.4
~
1. 2
E
O. 8
x
O. 6
0.105 ~
"""
:5 1.o ..............
.ff
.,......
ERY
o
t;
-~
['-......
-..........
ERX_
~
a:
<
~ 0.100
~
f..---
K AOJUSTEO TO 0.100 AT +25 0 C
.........
J
[
o
o
+25
+50
+75
TA. AMBIENT TEMPERATURE (DC)
-25
+100
-55
+125
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE (DC)
Vx = Vy = .5.0 V Max
Vx = Vy= .IOV Max
,
~
-'
-'
~
0
....
.
'-'
a:
w
~
0.4
'"
~ 0.2
~
\
\
-'
-'
0.6
~
~
0
....
~
w
10
0.8
<
a:
o
13' = 113 = 1.0 mAde
w
-'
0.8
~
il'i
,
13 = 1,3 = 1.0 mAde
0.6
+125
1.0
1.0
~
+100
FIGURE 18 - ERROR CONTRIBUTED BV
INPUT DIFFERENTIAL AMPLIFIER
FIGURE 17 - ERROR CONTRIBUTED BV
INPUT DIFFERENTIAL AMPLIFIER
-'
r--
0.4
-55
<
~
0.095
0.2
w
r---
",,-
12
!
----
\
\
0.4
~""-
'"
0
a: 0.2
~
14
16
RX OR Ry (k OHMS)
18
o
4.0
20
------r--
B.O
10
RX OR Ry (k OHMS)
6.0
12
14
FIGURE 19 - MAXIMUM ALLOWABLE INPUT VOLTAGE versus VOLTAGE AT PIN lOR PIN 7
14
...,.
12
....- ....-.... ,........,.,.
./". ....- L '
~
~ 10
~
x 8.0
<
::.
):
:::.
ilNIMUM
-~
6.0
.,..........-~
a:
0
X 4.0
:::.
2.0
.,......-.... ,........,.,.
.,......,.....- -- V
2.0
4.0
6.0
....-~ ~
~
.... ~
....
RECiMMENOEO
8.0
10
IV11 DR IV71 (VOLTS)
8-405
12
14
16
18
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION
1. Theory of Operation
2.1.2 3 dB·Bandwidth and Phase Shift
The MC1595 (MC14951 is a monolithic. four-quadrant multi·
plier which.Qperat8s on the principle of variable transconductance.
The detailed theory of operation is covered in Application Note
AN·489, Analysis and Basic Operation of the MC1595. The result
of this, analysis is that the differential output current of the multiplier is given by
Bandwidth is primarily determined by the load resistors and
the stray multiplier output capacitance and lor the operational
amplifier used to level shift the output. If wideband operation
is desired, low value load resistors andlor a wideband operational
amplifier should be used. Stray output capacitance will depend
to a large extent on circuit layout.
Phase shift in the multiplier circuit results from two sources:
phase shift common to both X and Y channels (due to the load
resistor-output capacitance pole mentioned above) and relative
phase shift between X .and Y channels (due to differences in
transadmittance in the X and Y channels). If the input to output
phase shift ·is only 0.60 , the output product of two sine waves
will exhibit a vector error of 1 %. A 3 0 relative phase shift between Vx and Vy results in a vector error of 5%.
where fA and '8 are the currents into pins 14 and 2. respectively.
and Vx and Vy are the X and Y input voltages at the multiplier
input terminals.
2. Design Considerations
2.1.3 Maximum Input Voltage
2.1 General
VX(max). VY(max) maximum input voltages must be such
that:
The MC1595 (MC14951 permits the deSigner to tailor the
multiplier to· a specific application by ·proper selection of external components. External components may be selected to
VX(maxl <113 R y
optimize a given parameter (e.g. bandwidth) which may in turn
VY(max) <13 R y.
restrict another parameter (e.g. maximum output voltage swing).
Each important parameter is discussed in detail in the following
paragraphs.
Exceeding this value will drive one side of the input amplifier to
"cutoff" and cause non-linear operation.
Currents 13 and 113 are chosen at a convenient value (observing power dissipation limitation) between 0.5 mA and 2.0 rnA,
approximately 1.0 rnA. Then R X and Ry can be determined by
considering the input Signal handling requirements.
2.1.1 Linearity, Output Error, ERX or ERY
Linearity error is defined as the maximum deviation of output voltage from a straight line transfer function. I t is expressed
as error in percent of full scale (see figure below).
For VX(maxl = VY(maxl = 10 volts;
RX =
---~~--C":
The equation IA . 18
+10 V
Ry>~
1.0mA
= 10k!!,
2VXVy
=---
RXRy I 3
2VXVy
is derived from IA - 18 = - - - - - - - - - - (RX +~) (Ry + 2kT 113
q l 13
ql3
For example. if the maximum deviation, VE(max), is
± 100 mV and the full scale output is 10 volts, then the
percentage error is
with the assumption RX
~ 2.kT
and Ry
ql13
'ER = VE(max) x 100 = 100 x 10-3 x 100 = ±1.0%.
Vo(max)
10
~ 2kT
.
ql3
At T A = +250 C and 113 = 13 = 1 mA,
2kT =2kT = 52
ql13 q l 3
Linearity error may be measured by either of the following
methods:
1. Using an X - Y plotter with the circuit shown in Figure 5.
obtain plots for X and Y similar to the one shown above.
2. Use the circuit of Figure 4. This method nulls the level
shifted output of the multiplier with the original input.
The peak output of the null operational amplifier will be
equal to the error voltage, VE(maxl'
One source of linearity error can arise from large Signal nonlinearity in the X and Y -input differential amplifiers. To avoid
introducing error from this source, the emitter degeneration
resistors R X and Ry must be chosen large enough so that nonlinear base-emitter voltage variation can be ignored. Figures 17
and 18 show the error expected from this source as a function
of the values of RX and Ry with an operating current of 1.0 mA
in each sideofthe differential amplifiers O.e.,13 = 113 = 1.0 mAl.
n.
Therefore, with AX = Ry = 10 kfl the above assumption is valid.
Reference to Figure 19 will indicate limitations of VX(max) or
VY(maxl due to VI and V7' Exceeding these limits will cause
saturation or "cutoff" of the input transistors. See Step 4 of
Section 3 (General DeSign Procedure) for further details.
2.1.4 Maximum Output Voltage Swing
The maximum output voltage swing is dependent upon the
factors mentioned below and upon the particular circuit being
considered.
For Figure 20 the maximum output swing is dependent
upon V+ for positive swing and upon the voltage at pin 1 for
negative swing. The potential at pin 1 determines the quiescent level for transistors 05, aS, 07, and aS. This potential
8-406
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
If an operational amplifier is used for level shift, as shown
in Figure 21, the output swing (of the multiplier) is greatly
reduced. See Section 3 for further details.
should be related so that negative swing at pins 2 or 14 does
not saturate those transistors. See Section 3 for further information regarding selection of these potentials.
3. General Design Procedure
Selection of component values is best demonstrated by the
following example: assume resistive dividers are used at the X and
FIGURE 20 - BASIC MULTIPLIER
Y inputs to limit the maximum multiplier input to ±S.O volts (Vx =
VY[max~fora±IO-volt input (VX' = Vy'[maxll. (See Figure 211.
If an overall scale factor of 1/10 is desired, then
v+
Rx
RL
RI
Ry
v
= VX' Vy'
o
10
10
( 2V X) (2Vy) = 4/10 VXVy.
10
RL
Vx
Vy
I
I
Therefore, K = 4/10 for the multiplier (excluding the divider
network).
"
} v,
14
MC1595L
(MC1495L)
..
Step 1. The first step is to select current 13 and current 113.
There are no restrictions on the selection of either of these currents
except the power dissipation of the device. 13 and 113 will normally
be one or two milliamperes. Further, 13 does not have to be equal
to '13, and there is normally no need to make them different. FO.r
this example, let
Vo=KVXVy
,
R,
t',
_-
2RL
RX Ry 13
13
RI3
To set currents 13 and '13 to the desired value, it is only
necessary to connect a resistor between pin 13 and ground, and be-tween pin 3 and ground. From the schematic shown in Figure 3,
v-
FIGURE 21 - MULTIPLIER WITH OP·AMPL. LEVEL SHIFT
~15
V
r-----~----~------_1--------r_----_.__e+15V
R,
3k
"
3k
R,
3k
O.l,uF
O.I,uF
>-C'""1r. Vo = V_X_,:_Y
14
12
x OFFSET
ADJUST
2k
....'WIr--+-------","Ok,.,..-+~IM......-I~ V
5.1 V
8-407
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
it can be seen that the resistor values necessary are given by:
R13 +'500 n" IV-I-0.7 V
113
R3 + 500 n = Iv-I-0.7 V
13
region when the maximum. input voltages are applied (Vx' = Vy' =
10 Vor Vx = 5.0 V, Vy = 5;0 V), their respec~ive collector voltage
should be at least a few tenths of a volt higher than the maximum
input voltage. It should also be noticed that the collector voltage
of transistors 03 and ~ are at a potential which is two diode-drops
below the voltage at pin 1. Thus, the voltage at pin 1 should be about
two volts higher than the maximum input voltage. Therefore, to
handle +5.0 volts at the inputs, the voltage at pin 1 must be at least
Let V-=-15V
+7.0 volts. Let V1 = 9.0 Vdc.
Since the current following into pin 1 is always equal to
14.3 V
Then R13 + 500 = 1 mA or R13 = 13.8 kn
213, the voltage at pin 1 can be set by placing a resistor, R1 from
pin 1 to the positive supply:
Let R13 = 12 kn
Similarly. R3
~
V+-V1
Rl=--21 3
13,8 kn
Let R3= 15 kn
However, for applications which require an accurate scale factor,
Let
V+=+15V
T
R _ 15 V -9 V
1 -(2)(1 mAl
the adjustment of R3 and consequently. '3. offers a convenient
method of making a final trim of the scale factor. For this reason,
as shown in Figure 21, resistor R3 is shown as a fixed resistor in
series with a potentiometer.
For applications not requiring an exact scale factor (balanced
Rl
modulator. frequency doubler. AGe amplifier, etc.), pins 3 and 13
can be connected together and a single resistor tram pin 3 to ground
can be used. I n this case, the single resistor would have a value of
hen
= 3 kn.
Note that the voltage at the base of transistors 05, 06, 07 and 08
Step 2 .. The next step is to select AX and Ay. To insure
is one diode-drop below the voltage at pin 1. Thus, in order that
these transistors stay active, the voltage at pins 2 and 14 should be
approximately halfway between the voltage at pin 1 and the positive-
that the input transistors will always be active, the following conditions should be met:
supply voltage. For this example, the voltage at pins 2 and 14 should
be approx imately 11 volts.
one· half the above calculated value for R13.
Step 5. Level Shifting
A good rule of thumb is to make 13AY;;' 1.5 VY(max) and
113 RX;;' 1.5 VX(max)·
The larger the 13Ry and 113RX product in relation to Vy
and Vx respectively, the more accurate the multiplier will be (see
For dc applications, such as the multiply, divide and squareroot functions, it is usually desirable to convert the differential
output to a single-ended output voltage referenced to ground.
The circuit shown in Figure 22 performs this function. It can be
shown that the output voltage of this circuit is given by:
Figures 17 and 18),
21Xly
2 VXVy
Andsince IA-IB=12-114=-1-3- -13 R XRy
Let RX= Ry = 10kn
Then 13Ry = 10 V
2RLVX'Vy'
Then Va = ...,..,C=-::':".,...:'4RXRXI3
where VX'Vy' is the voltage at the
113RX = 10 V
input to the voltage dividers.
since VX(max) = VY(max) = 5.0volts the value of RX = Ry = 10 kn
is sufficient.
FIGURE 22 - LEVEL SHIFT CIRCUIT
Step 3. Nowthat RX, Ry and 13 have been chosen, RL can
be determined:
v+
2RL
4
K=---=RXRyl3
10
R,
or
(21 (RLI
(10 kl (10 kl (1 mAl
R,
= ~
V2
10
'2
v,
Thus RL = 20 kn.
'14
Step 4. To determine what power-supply voltage is necessary
for this application, attention must be given to the circuit schematic
shown in Figure 3. From the circuit schematic it can be seen that
in order to maintain transistors 01, 02. 03 and Q4 in an active
8·408
v"
Rl
Rl
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
The choice of an operational amplifier for this application
possible as shown in Figure 23 where Ry has been increased sub-
should have low bias currents, low offset current. and a high
common-mode input voltage range as well as a high common~mode
stantially to improve the V linearity. and AX decreased somewhat
so as not to materially affect the X linearity. this avoids increasing
rejection ratio, The MC1556, and MC1741 operational amplifiers
A L significantly in order to maintain a K of 0.1.
The versatility of the MC1595 (MCI495) allows the user to
to optimize its performance for various input and output signal
meet these requirements.
Referring to Figure21, the level shift components will be determined. When Vx = Vy "" 0, the currents 12 and 114 will be equal
to 113. In Step 3, RL was found to be 20 kn and in Step 4, V2 and
V14 were found to be approximately 11 volts. From this information, Ao can be found easily from the following equation (neglecting the operational amplifiers bias current):
levels.
4. Offset and Scale Factor Adjustment
4.1
Offset Voltages
Within the monolithic multiplier (Figure 3) transistor baseemitter junctions are typically matched within 1 mV and resistors
are typically matched within 2%. Even with this careful matching. an output error can occur. This output error is comprised
of X-input offset voltage, V-input offset voltage, and outputoffset voltage_ These errors can be adjusted to zero with the techniques shown in Figure 21. Offset terms can be shown analytically by the transfer function:
And for this example, ~ + 1 mA = 15 V -11 V
20kn
Ro
Solving for R o , Ro
Thus, select Ro
For Ro
= 2.6 kn
Vo
= 3.0 kn
= 3.0 kn, the voltage at pins 2 and
V2
= K(VX
i
VIOXiVX offl (Vy i VIOyiVy offl i Voo
Where K
: : : scale factor
Vx
: : : X input voltage
Vy
= Y input voltage
VIO X = X input offset voltage
VIOY = Y input offset voltage
Vx off::::: X input offset adjust voltage
Vy off = Y input offset adjust voltage
Voo
= output offset voltage.
14 is calculated to be
= V14 = 10.4 volts.
The linearity of this circuit (Figure 21) is likely to be as good
or better than the circuit of Figure 5. Further improvements are
FIGURE 23 - MULTIPLIER WITH IMPROVED LINEARITY
-15
7.5k
v
-15V
3k
27k
3k
3k
10
10k
"
V'y
10k
MC1595L
(MC1495L)
t IOV
MC1741G
tMC1741CG)
10k
V'x
12
13
13k
'Ok
33k
12k
5k
OUTPUT
10k
OffSET
SCALE
FACTOR
ADJUST
ADJUST
Y OffSET
X OFFSET
ADJUST
ADJUST
20k
15k
15k
-15V
+15 V
20k
2k
2k
8-409
(1)
MC1595L, MC1495L(continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
5.2 Squaring Circuit
X, Y and Output Offset Voltages
~
o
Output
Offset
Vx
X Offset
Vo
If the two inputs are tied together, the resultant function is
squaring; that is Va = KV2 where K is the scale factor. Note
that all error terms can be eliminated with only three adjustment
potentiometers, thus eliminating one of the input offset adjust·
ments. Procedures for nu lIing with adjustments are given as
follows:
Output
Offset
-~"-t~t--r Vy
1. AC·Procedure:
(al Connect oscillator (1 kHz. 15 Vppl to input
(bl Monitor output at 2 kHz with tuned voltmeter
and adjust P3 for desired gain (be sure to peak response
of the voltmeter)
Ic) Tune voltmeter to 1 kHz and adjust Pl for a minimum output voltage
(dl Ground input and adjust P4 (output offset I for
zero volts dc output
(e) Repeat steps a through d as necessary.
2. DC Proce(i'ure:
(al Set Vx 0 Vy 0 0 V and adjust P4 (output offset
potentiometer) such that Va = 0.0 Vdc
(bl Set Vx
Vy
1.0 V and adjust P1 (Y 'input
offset potentiometer) such that the output voltage is
+ O. 100 volts
(cl Set Vx 0 Vy 0 10 Vdc and adjust P3 such that the
output voltage is + 10.00 volts
(dl Set Vx 0 Vy 0 -10 Vdc. Repeat steps a through
d as necessary.
Y Offset
For most de applications. all three offset adjust potentiome-
ters (P,. P2, P4) will be necessary. One or more offset adjust
potentiometers can be eliminated for ae applications (See Figures
2a. 29. 30. 311.
If well regulated supply voltages are available, the offset ad·
just circuit of Figure 13 is recommended. Otherwise, the circuit
of Figure 14 will greatly reduce the sensitivity to power supply
changes.
4.2 Scale Factor
The scale factor, K, is set by P3(F igure 21). P3 varies 13 which
0
inversely controls the scale factor K. It should be noted that
current 13 is one·half the current through Rt. R1 sets the bias
level for 05. 06. 07. and 0a (See Figure 31. Therefore. to be
sure that these devices remain active under all conditions of input
and output swing, care should be exercised in adjusting P3 over
wide voltage ranges (see Section 3, General Design Procedurel.
0
4.3 Adjustment Procedures
FIGURE 24 - BASIC DIVIDE CIRCUIT
The following adjustment procedure should be used to null
the offsets and set the scale factor for the multiply mode of
operation. (See Figure 21)
1. X I nput Offset
(a) Connect oscillator (1 kHz, 5 Vpp sinewave) to the
"y" input (pin 41
(bl Connect "X" input (pin 91 to ground
(c) Adjust X offset potentiometer, P2, for an ac null
at the output
2. Y Input Offset
(a) Connect oscillator (1 kHz, 5 Vpp sinewavel to the
"X" input (pin 91
(bl Connect "Y" input (pin 41 to ground
(c) Adjust "V" offset potentiometer, P1,for an ac null
at the output
3. Output Offset
(a) Connect both "X" and "V" inputs to ground
(bl Adjust output offset potentiometer, P4. until the
output voltage Va is zero volts dc
4. Scale Factor
(al Apply +10 Vdc to both the "X" and "Y" inputs
(bl Adjust P3 to achieve + 10.00 V at the output.
5. Repeat steps 1 through 4 as necessary.
>---<:-''-.. Vy
5.3 Divide Circuit
Consider the circuit shown in Figure 24 in which the multiplier is placed in the feedback path of an operational amplifier.
For this configuration, the operational amplifier will maintain
a "virtual ground" at the inverting (-I input. Assuming that the
bias current of the operational amplifier is negligible, then 11 =
12 and
KVXVy
-VZ
(11
R1
R2
The ability to accurately adjust the MC1595 (MC14951
depends upon the characteristics of potentiometers P1
through P4. Multi-turn, infinite resolution potentiometers with low-temperature coefficients are recommended.
5. DC Appl ieations
5.1 Multiply
The circuit shown in Figure 21 may be used to multiply
signals from dc to 100 kHz. Input levels to the actual multiplier are 5.0 V (maxI. With resistive voltage dividers the maximum could be very large - however, for this application twoto-one dividers have been used so that the maximum input
level is 10V. The maximum output level has also been designed
for 10 V (maxi.
Solving lor Vy.
If
-R1 Vz
Vy =R2 K VX·
R1 = R2
-VZ
Vy=-KVX
If
R1
0
(31
KR2
-VZ
Vy=-- •
Vx
8-410
(21
(41
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
Hence, the output voltage is the ratio of Vz to Vx and provides
adivide function. This analysis is, of course, the ideal condition.
If the multiplier error is taken into account, the output voltage
is found to be
From equation 7. the percentage error is inversely related to
voltage Vz (i.e., for increasing values of Vz. the percentage
error decreases).
A circuit that performs the divide function is shown in
Figure 2S.
Vy = _ [~] Vz + "E ,
R2 K Vx KVX
Two things should be emphasized concerning Figure 25.
(S)
1. The input voltage (V'X) must be greater than zero and
must be positive. This insures that the current out of
pin 2 of the multiplier will always be in a direction com-
where ll.E is the error voltage at the output of the multiplier.
From this equation, it is seen that divide accuracy is strongly
patible with the polaritv of Vz.
dependent upon the accuracy at which the multiplier can be
2. Pins 2 and 14 of the multiplier have been interchanged
in respect to the operational amplifiers input terminals.
In this instance. Figure 25 differs from the circuit connection shown in Figure 21; necessitated to insure negative
set, particularly at small values of Vy. For example, assume
that R 1 = R2, and K = 1/10. For these conditions the output
of the divide circuit is given by:
---vx
-10 Vz
Vy
=
feedback around the loop.
10 "E
+
\IX
A Suggested Adjustment Procedure for the Divide Circuit
(6)
1. Set Vz = 0 volts and adjust the output offset potentiometer (P 4) until the output voltage (Va) remains at some
(not necessarily zero) constant value as VX' is variE!d
From equation 6, it is seen that only when Vx = 10 V is the
error voltage of the divide circuit as low as the error of the
multiply circuit. For example. when Vx is small. (0.1 volt)
the error voltage of the divide circuit can be expected to be a
hundred times the error of the basic multiplier circuit.
I n terms of percentage error.
between +1.0volt and +10 volts.
2. Keep Vz at 0 volts, set VX' at +10 volts and adiust the
Y input offset potentiometer (Pl) until Va
3. Let VX'
=
=
0 volts.
Vz and adiust the X input offset potentio-
meter (P2) until the output voltage remains at some (not
necessarily - 10 volts) constant value as Vz c; VX' is
varied between +1.0 and +10 volts.
percentage error = error x 100%
actual
4. Keep VX' = Vz and adjust the scale factor potentiometer
or from equation (S),
(P3) until the average value of Vo is -10 volts as Vz
=
VX' is varied between +1.0 volt an~ +10 volts.
5. Repeat steps 1 through 4 as necessary to achieve optimu m performance.
~E
P.E·O
KVX
] Vz
=r R1
[R21~E
= AI
S.4 Square Root
17)
VZ'
A special case of the divide circuit in which the two inputs to
the multiplier are connected together is the square root function
[R2 K Vx
FIGURE 25 - DIVIDE CIRCUIT
-15 V
-15 V
r-----~----~------_1~------~----_,----_+--.+15V
3k
3.9k
O.lJ.1F
3k
lO.IJ.lf
14
10k
MC1141G
IMC1141CG)
~~>-------~
__ Vo
Vo = -IOVZ
V·x
Vx
10k
13
12
13k
12k
5k
SCALE
FACTOR
ADJUST
18k
1'3
.,.
TO OFFSET
AOJUST
(SEE FIGURE 13)
5k
"
L-----------------~~--------__eVZ
20k
OUTPUT
OFFSET
ADJUST
8-411
o-<>-......-.v,
KVo2 = -VZ
Vo
"
=!!
eo
as indicated in Figure 26.
This circuit may suffer from
latch-up problems similar to those of the divide circuit. Note
that only one polarity of input is allowed and diode clamping
2
(1 + cos 2wt).
A potted multiplier can be used to obtain the double frequency component, but frequency would be limited by its
internal level-shift amplifier. I n the monolithic units, the amplifier is om"itted"
I n a typical doubler circuit, conventional ± 15-volt supplies
are used. An input dynamic range of 5.0 volts peak-to-peak is
allowed. The circuit generates wave-forms that are double frequency; less than 1% distortion is encountered without filtering.
The configuration has been successfully used in excess of 200
kHz; reducing the scale factor by decreaSing the load resistors
can further expand the bandwidth.
A slightly modified version of the MC1595 (MC14951 the MC1596 (MC1496) - has been successfully used as a doubler
to obtain 400 MHz. (See Figure 28.1
6.2 Figure 29 represents an application for the monolithic
multiplier as a balanced modulator. Here, the audio input signal
is 1.6 kHz and the carrier is 40 kHz.
(see Figure 27) protects against accidental latch-up.
This circuit also may be adjusted in the closed-loop mode as
follows:
1. Set Vz to - 0.01 volts and adjust P4 (output offset) for
Va::;: +0.316 volts, being careful to approach the output
from the positive side to preclude the effect of the output diode clamping.
2. Set Vz to -0.9 volts and adjust P2 (X adjustl for Va
+3.0 volts.
KE2
= --
=
3. Set Vz to -10 volts and adjust P3 (scale factor adjustl
for Va = +10 volts.
4. Steps 1 through 3 may be repeated as necessary to achieve
desired accuracy.
FIGURE 27 - SQUARE ROOT CIRCUIT
-15
v
-15V
+15V
IDk
RX
Ry
10k
10k
3.9k
3k
O.l/-lF
3k
1
I.
I:
O.lpf
v,
V,·
.jjOjVzj
MZ9Z·118
OR EQUIV
10k
13
Vz
20k
18k
13k
RL
12k
5k
SCALE
FACTOR
ADJUST
'3
-=
TO OFFSET
ADJUST
(SEE FIGURe 13)
5k
"
OUTPUT
OFFSET
ADJUST
8-412
-10
v,;;;; VZ':::+O V
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
The defining equation for balanced modulation is
FIGURE 28 - FREQUENCY DOUBLER
Ry
RX
B.2k
B.H
R,
1
KEcEm
- 2 - - [cos (we + w m ) t + cos (we - wm)t)
3.0k
R,
23.3k
where we is the carrier frequency, wm is the modulator frequency and K is the multiplier gain constant.
R,
'SElECT
S.ak
AC couplingat the output eliminates the need for level translation or an operational amplifier; a higher operating frequency
results.
A problem common to communications is to extract the
intelligence from single-sideband received signal. The ssb signal
is of the form
3.3k
14
1.0P-FJ
I
c,'
,2
eo "'2ilcos2wt
and if multiplied by the appropriate carrier waveform, cos wct.
-15 V
When two equal casine waves are applied to X and Y,
theresul1 isa wave shape of twice the illputfrequency.
Forthisexampletheinputwasa 10kHz signal, OUI!Hlt
was 20 kHz.
FIGURE 29 -
If the frequency of the band-limited carrier signal, Wc, is ascertained in advance the designer can insert a Jaw-pass filter and
obtain the (AK/2) (cos wct) term with ease. He also can use an
operational amplifier for a combination level shift-active filter,
as an external component. But in potted multipliers, even if
the frequency range can be covered, the operational amplifier
is inside and not accessible, so the user must accept the level
shifting provided, and still add a low-pass filter.
BALANCED MODULATOR
+15 V
Ry
B.H
(A)
RX
B.2k
11
,
ey::Ecoswmt
l'"
3'
6.3 Amplitude Modulation
The multiplier performs amplitude modulation, similar to
balanced modulation, when a dc term is added to the modulating
signal with the Y offset adjust potentiometer. (See Figure 30.)
Rl
2 3.3k
eX" E COS wet
OFFSET
ADJUST
Rl
3.3k
14
·SElECT
S.ak
1.01JF
Here, the identity is
I'"
"
J
where m indicates the degree of modulation. Since m is adjustable, via potentiometer Pl, 100% modulation is possible. Without extensive tweaking, 96% modulation may be obtained where
we and wm are the same as in the balanced-modulator example.
-15 V
(B)
6.4 Linear Gain Control
To obtain linear gain control, the deSigner can feed to one
of the two MC1595 (MCI495) inputs. Signal that will vary the
unit's gain. The following example demonstrates the feasibility
of this application. Suppose a 200 kHz sine wave, 1.0 volt
peak-to-peak, is the signal to which a gain control will be added.
The dynamic range of the control voltage Vc is 0 to +1.0 volt.
These must be ascertained and the proper values of AX and Ay
can be selected for optimum performance. For the 200-kHz
operating frequency, load resistors of 100 ohms were chosen to
broaden the operating bandwidth of the multiplier, but gain was
sacrificed. It may be made up with an amplifier operating at the
appropriate frequency. (See Figure 31,)
8-413
MC1595L, MC1495L (continued)
OPERATION AND APPLICATIONS INFORMATION (continued)
The signal is applied to the unit's Y input. Since the total
input range is limited to 1.0 volt pop, a 2.O-volt swing, a current
source of 2.0 mA and an Ry value of 1.0 kilohm Is chosen.
This takes best advantage of the dynamic range and insures
linear operation in the Y-channel.
Sin"" the X input varies between and +1.0 volt, the current
source selected was 1.0 mA and the RX value chosen was 2.0
kilohms. This also insures linear operation over the X input
FIGURE 30 - AMPLITUDE MODULATION
AX
S.2k
"y
S.H
Vee = +15 V
11
1
ey·
E COl
°
R.
3.0k
--<>-1
wmt ...
RLI
..._--<>-t
13
ex. ey<5Vp.p
ChoosingRL = 100 assures wide-bandwidth operation. Hence,
the scale factor for this configuration is
RlI
3.3k
14
11
OFFSET ADJUST
dynamic range.
2 3.3k
MCI595L
(MC ••95L1
·SELECT
6.Bk
T
C
. .'
_ _...;1:,::0.::.0_ _ _ V- 1
(2 kill kl(2 x 10+3 1
eo
=.!..
-15V
40
V-l •
(BI
The 2 in the numerator of the equation is missing in this scale-
factor expression because the output is single.-ended and ae
coupled.
To recover the gain, an MC1552 video amplifier with a gain
of 40 is used. An operational amplifiar also could have been
used with frequancy compansetion to allow a gain of 40 at
200 kHz. Tha MC1539 oparational amplifiar can be tailored for
this use; and tha MC1520 oparationa'amplifier does it directly.
FIGURE 31 - LINEAR GAIN CONTROL
+12V
2k
1k
.
.0
Vin
lOl--.....-o-t
1.5k
l··f
5'0
(BI
(AI
US
Yin"' 1 Vp-p
200kHz
.~
-o-t
MC1595l
(MC ••95l)
VC ...""'....
k",
-a. 0.75
.00
4k
SO""
>--o-3"'3..-4E---4 v,
'00
8
!
-:: 0.5
••
'2
20nAl
O.3311F
'.2
.3
11k
3k
1:
.".
B
.".
.".
IJlF
.f
I
5o
•
.".
-12 V
8-414
NOTE,
Unear gain control of a, 1-volt ,..k..to-peak signal it
performed with a o·to·l-volt comrolvoltagt. If Vc is
0.5 volttha output will bI 0.5 YOtttHI.
MC1595L, MCl495L(continued)
OPERATIONS AND APPLICATIONS
INFORMATION INDEX
1. THEORY OF OPERATION
2. DESIGN CONSIDERATIONS
2.1 General
2.1:1 Linearity, Output Error, ERX or ERY
2.1.2 3·dB Bandwidth and Phase Shift
2.1.3 Maximum Input Voltage
2.1.4 Maximum Output Voltage Swing
3. GENERAL DESIGN PROCEDURES
4. DFFSET AND SCALE FACTOR ADJUSTMENT
4.1 Offset Voltages
4.2 Scale Factor
4.3 Adjustment Procedure
5. DC APPLICATIONS
5.1
5.2
5.3
5.4
Multiply
Squaring Circuit
Divide Circuit
Square Root
6. AC APPLICATIONS
6.1
6.2
6.3
6.4
Frequency Doubler
Balanced Modulator
Amplitude Modulation
Linear Gain Control
8-415
MC1596
MC1496
BALANCED MODULATOR·DEMODULATOR
Speci:fications and Applications
In:for:rnation
BALANCED
MODULATOR - DEMODULATOR
INTEGRATED CIRCUIT
SILICON
EPITAXIAL PASSIVATED
MONOLITHIC BALANCED
MODULATOR - DEMODULATOR
· .. designed for use where the output voltage is a product of an input
voltage (signal) and a switching function (carrier). Typical applications
il)clude suppressed carrier and amplitude modulation, synchronous de·
tection, FM detection, phase detection, and chopper applications. See
Motorola Application Note AN·531 for additional design information.
• Excellent Carrier Suppression - 65 dB typ@O.5MHz
-50dBtyp@10MHz
• Adjustable Gain and Signal Handling
• Balanced Inputs and Outputs
• High Common·Mode Rejection - 85 dB typ
t::J
0*10
,-
~
1
(top view)
I
Ibottom viewl
- .
CASE 602A
CASE 632 ITO·1161
Metal Package
Suffix G
Ceramic Package
Suffix L
.---------------.-===---============~
FIGURE 1 - SUPPRESSED-CARRIER
OUTPUT WAVEFORM
FiGURE 2 - AMPLITUDE·MODULATION
OUTPUT WAVEFORM
FIGURE 4 - AMPLlTUOE·MODULATION SPECTRUM
FIGURE 3 - SUPPRESSED·CARRIER SPECTRUM
FIGURE 6 - TYPICAL MODULATOR CIRCUIT
FIGURE 5 - CIRCUIT SCHEMATIC
HI
r---I====;::=t===~Vo.
(+IF
OUTPUT
MC1596G
DH
~~~~~L VSA'~":;-'----t=====!==~=~GAINADJUST
MODULATING
C
BIAS
E
o---::t:-+------I
500
V' Jo--~--~-----~
SIGNAL
INPUT
PIN CONNECTION CHART
ABC 0 E F G H I J
G Pkg. 1 2 3 4 5 6 7 8 9 10
L Pkg. 1 2 3 4 5 6 8101214
See Packaging Information Section for outline dimensions.
8-416
'----'=----+v·-8Vdc
CARRIER NUll
'5
S.ak
MC1596, MC1496 (continued)
MAXIMUM RATINGS (T A = +25 0 C unless otherwise noted!
Rating
Symbol
Value
Unit
t>.V
30
Vdc
V7 - Vs
V4 - Vl
+5.0
±15+15Re l
Vdc
Maximum Bias Current
15
10
mA
Power Dissipation (Package Limitation)
Ceramic Dual In-Line Package
PD
+2SoC
575
3.S5
mW
mW/oC
Derate above T A = +2SoC
6S0
4.6
mW
mW/oC
Applied Voltage
1V6 - V7, Vs - Vl, V9 - V7, V9 - VS, V7 - V4, V7 - Vl,
Vs - V4, V6 - VS, V2 - V5, V3 - V51
Differential Input Signal
Derate above T A
=
Metal Package
Operating Temperature Range
TA
MC1496
MC1596
DC
o to +70
-55 to +125
T stg
Storage Temperature Range
DC
-65 to +150
ELECTRICAL CHARACTERISTICS' (V+ = +12 Vdc, V- = -8.0 Vdc, 15 = 1.0 mAde, RL = 3.9 kn, Re = 1.0 kn.
T A = +25 0 C unless otherwise noted! (All input and output characteristics are single·ended unless otherwise noted.!
Carrier Feedthrough
Vc '" 60 mV(rms) sine wave and
offset adjusted to zero
Vc = 300 mVp-p square wave:
offset adjusted to zero
offset not adjusted
IC
IC
= 1.0 kHz
= 10 MHz
IC
IC
= 1.0 kHz
= 1.0 kHz
1110
mV(rms)
0.04
20
0.4
200
dB
Carrier Suppression
IS = 10 kHz. 300 mVlrmsl
fC = 500 kHz, 60 mV(rms) sine wave
fC = 10 MHz, 60 mV(rms) sine wave
65
50
Transadmittance Bandwidth (Magnitude) (RL = 50 ohms)
Carrier Input Port, Vc "" 60 mV(rms) sine wave
fS = 1.0 kHz, 300 mV(rms) sine wave
MHz
300
Signal Input Port, VS::;- 300 mV(rms) sine wave
Ivel = 0.5 Vdc
Signal Gain
Vs = 100 mVlrmsl. I
V/V
= 1.0 kHz; Ivel = 0.5
Vdc
Input Impedance, Signal Port, f = 5.0 MHz
Parallel Input Resistance
Single~Ended
200
2.0
kn
pF
40
5.0
kn
pF
12
12
30
0.7
7;0
O.l
7.0
30
nA/oC
2.0
14
90
* Pin
80
/iA
nA/oC
number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin numbers·for a ceramic packaged
device refer to the PIN CONNECTION CHART on the first page of this specification.
8-417
MC1596, MC1496 (continued)
GENERAL OPERATING INFORMATION *
Note 1 - Carrier Feodthrough
Carrier feedthrough is defined as the output voltage at carrier
frequency with only the carrier applied (signal voltage = 01.
Carrier null is achieved b.,.. balancing the currents in the differential amplifier by means of a bias trim potentiometer (R 1 of
Figure 71.
Note 2 ...... Carrier Suppression
base current, PD = 2 IS (V6 - V101 + IS (VS - V 101 where subscripts refer to pin numbers.
Note 6 - Design Equations
The following is a partial list of design equations. needed to
operate the circuit with other supply voltages and input condi·
tions. See Note 3 for Ae equation.
A. Operating Current
Carrier suppression is defined as the ratio of each sideband output to carrier output for the carrier and signal voltage levels speci-
The internal bias currents are set by the conditions at pin 5.
Assume:
fied.
Carrier suppression is very dependent on carrier input level, as
shown in Figure 24. A low value of the carrier does not fully
15=16=19
switch the upper switching devices, and results in 1000er signal
gain, hence lower carrier suppression. A higher than optimum carrier level results in unnecessary device and circuit carrier feedthrough, which again degenerates the suppression figure. The
MC1596 has been characterized with a 60 mV(rmsl sinewave
carrier input signal. This level provides optimum carrier suppression at carrier frequencies in the vicinity of 500 kHz, and is
generally recommended for balanced modulator applications.
Carrier feedthrough is independent of signal level, VS. Thus
carrier suppression can be maximized by operating with large signal levels. However. a linear operating mode must be maintained
in the signal-input transistor pair - or harmonics of the mooulating
signal will be generated and appear in the device output as spurious
sidebands of the suppressed carrier. This requirement places an
upper limit on input-signal amplitude (see Note 3 and Figure 22).
Note also that an optimum carrier level is recommended in F igure 24 for good carrier suppression and minimum spurious sideband generation.
At higher frequencies circuit layout is very important in order
to minimize carrier feedthrough. Shielding may be necessary in
order to prevent capacitive coupling between the carrier input
leads and the output leads.
IB«IC for all transistors
then:
AS
= '!!.::..::1!. -500 n
where:
IS
RS is the resistor between pin
5 and ground
at T A = +2So C
rfJ = 0.7S V
The MC 1596 has been characterized for the condition IS = 1.0
rnA and is the generally recommended value.
B. Common-Mode Quiescent Output Voltage
Note 7 - Biasing
The MC1S96 requires three dc bias voltage levels which must be
set externally. Guidelines for setting up these three levels include
maintaining at least 2 volts collector-base bias on all transistors
while not exceeding the voltages given in the absolute maximum
rating table;
Note 3 - Signal Gain and Maximum Input Level
30 Vdc;;' [(V6, Vgl - (V7, VslI ;;, 2 Vdc
Signal gain (single-endedl at low frequencies is defined as the
voltage gai n,
30Vdc;;' [(V7,Vsl-(Vl,V411;;, 2.7Vdc
Vo
AL
26mV
AVS = Vs = Ae + 2re where re = 15 (mAl'
A constant de potential is applied to the carrier input terminals to
fuliV switch two of the upper transistors "on" and two transistors
"off" (VC = O.S Vdcl. This in effect forms a cascodedifferential
amplifier.
Linear operation requires that the signal input be below a critical value determined by RE and the bias current 15
Vs
s:
IS AE(Volts peakl.
Note that in the test circuit of Figure 12,
maximum value of 1 volt peak.
Vs
30 Vdc;;' [(V 1, V 41 - (VslI ;;, 2.7 Vdc.
The foregOing conditions are based on the following approximations:
V6=V9,
V7=VS,
Vl=V4·
Bias currents flowing into pins 1, 4, 7. and 8 are transistor base
currents and can normally be neglected if external bias dividers
are designed to carry 1.0 rnA or more.
Note 8 - Transadmittance Bandwidth
corresponds to a
Carrier transadmittance bandwidth is the 3-dB bandwidth of
the device forward transadmittance as defined by:
_ iQ (each Sidebandll
Y21C vs (signatl
Vo = O.
Note 4 - Common·Mode Swing
The common·made swing is the voltage which may be applied
to both bases of the signal differential amplifier, without saturating
the current sources or without saturating the differential amplifier
itself by swinging it into the upper switching devices. This swing
is variable depending on the particular circuit CIld biasing conditions chasen (see Note 61.
Signal transadmittance bandwidth is the 3-dB bandwidth of the
device forward transadmittance as defined by:
i
Y21S =
v~
(signalll
(signal) V c = O.S Vdc, Ito
= O.
Note 5 - P_er Dissipation
Power dissipation, PO, within the integrated circuit package
should be calculated as the summation of the voltage-current products at each port, i.e. assuming Vg ~ V6, IS = 16 = Ig and ignoring
*Pin number references pertain to this device when packaged in a
metal can. To ascertain the corresponding pin numbers for a
ceramic packaged device refer to the PIN CONNECTION CHART
on the first page of this specification.
8-418
MC1596, MC1496 (continued)
connected direct IV to each input using short leads. This will reduce
the a of the source-tuned circuits that cause the oscillation.
Note 9 - Coupling and Bypass Capacitors Cl and C2
Capacitors C, and C2 (Figure 7) should be selected for a re-
actance of less than 5.0 ohms at the carrier frequency.
SIGNAL INPUT
(PINS 1 &4)
Note 10 - Output Signal. Vo
1
o-----"~...-----,
r
The output signal is taken from pins 6 and 9, either balanced
or single-ended. Figure 14 shows the output levels of e8ch of the
two output sidebands resu Iting from variations in both the carrier and modulating signal inputs with a single-ended output
connection.
10PF
An alternate method for low-frequency applications is to insert
Note 11 - Signal Port Stability
a 1 k-ohm resistor in series with the inputs, pins 1 and 4. I n this
Under certain values of driving source impedance, oscillation
may occur. In this event, an RC suppression network should be
case input current drift may cause serious degradation of carrier
suppression.
TEST CIRCUITS
FIGURE 7 - CARRIER REJECTION ANO SUPPRESSION
Ik
FIGURE 8 - INPUT-OUTPUT IMPEDANCE
+12 Vdc
Ik
R. =I k
R,
RL
3.9 k
C2
CARRIER 0.1 "F
INPUTVC --'l
Vs
MODULATING
SIGNAL
INPUT 10k
)--c>----e+VD
MCI596
MCI496
51
+--Zout
)--c>--....... -v.
-VD
Zin~
10
10
t
CARRIER NULL
6.8 k
6.8 k
'110 15
V-
-8 Vdc
-8 Vdc
FIGURE 9 - BIAS AND OFFSET CURRENTS
FIGURE 10 - TRANSCONDUCTANCE BANDWIDTH
+12 Vdc
1k
1k
R,
16
2k
CARRIER O.I"F
INPUT Vc--'lf--4-------<>-i;i
MCI596
VS __-p-----..---<>-:-l
MC1496
~I~:U~L
f-O--~.-VD
r-t:-:-T~lil...---.J
MODULATING
10k
51 4
10
6.8 k
'-------ivCARRIER NULL
-8 Vdc
-8 Vdc
Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin numbers for a ceramic
packaged device refer to the PIN CONNECTION CHART on the first page of this specification.
8-419
•
MC1596, MC1496 (continued)
TEST CIRCUITS (continued)
FIGURE 11 - COMMON·MODE GAIN
FIGURE 12 - SIGNAL GAIN AND OUTPUT SWING
+12 Vdc
+12Vdc
1k
Vs
0.5 V
1k
3.9 k
3.9 k
f-C......-+-.... +V o
t-<......-+-.... +Vo
f-C>--.......... -Vo
t-<>--.......... -Va
10
10
6.8 k
50
l
15 =
1 mA
ACM = 20 log
-8 Vd&
J\/oI
6.8 k
-8 Vd&
Vs
Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for a ceramic packaged device refer to the PIN CONNECTION CHART on the first page of this specification.
TYPICAL CHARACTERISTICS
Typical characteristics were obtained with circuit shown in Figure 7, fC = 500 kHz (sine wave),
Vc = 60 mV(rms), f5:: 1 kHz, Vs = 300 mV(rms), T A = +25 0 Cunless otherwise noted.
FIGURE 14 - SIGNAL·PORT PARALLEL·EQUIVALENT
INPUT RESISTANCE versus FREQUENCY
FIGURE 13 - SIDEBAND OUTPUT versus CARRIER LEVELS
;::; 2.0
LaM
~
u;
~ 500
i!
~ 1.6
~
~
SIGNAL INPUT
1.2
~ 0.8
/
'/
=>
r-
:::;
~ 0.4
'"to;
~
0
a
........--
--::::-
50
~
600 mV
t;;
~
400 1mV
---
.,,/~
~
....... .--
=
100
a
'"
~
w
200 mV
~
:2
I'\.
'\.
10
5. 0
~
150
200
1.0
5.0
1.0
50
10
FIGURE 15 - SIGNAL·PORT PARALLEL·EOUIVALENT
INPUT CAPACITANCE versus FREQUENCY
5.0
~
w
~ 4.0
;0
i3
'"
~ 3.0
~
r-
FIGURE 16 - SINGLE·ENDED OUTPUT
IMPEDANCE versus FREQUENCY
140
1
120
1
100
1
rap
80
.......
60
2.0
8
6
Gop
40
:2
4
~ 1.0
"'\..
20
~
300 mV
lOa
\
--
u
~
'"
+rjp
"w
50
a
lOa
f, FREQUENCY (MHz)
a
0
1.0
f, FREQUENCY (MHz)
8-420
r-....
2
10
lOa
MC1596, MC1496 (continued)
TYPICAL CHARACTERISTICS (continued)
Tvpica' characteristics ware obtained with circuit shown in Figure 7, fc = 600 kHz
0.2
0.1
Y21
0.1
= lout
V--
I
Vout = 0
I
~
a:
"-
I
MC159S
20
R:
30
I Vout'" 0
i I IIII
::;
40
11111
5
"'
50
~
>
SO
I+-- MCI49S-'
(+70 0 C)
~
a:
IVel = O.S Vdc
Ltl'UWI
10
1.0
0
1\
TRAS~~~~~I~~~~CE
o
10
'"
:s
z
SIDEBAND
TRANSAOMIITANCE
0.5
;ii 0.3
....
r'\
r"-
II 11111
0.1
O.S
1111
-
0.8
FIGURE 18 - CARRIER SUPPRESSION
versus TEMPERATURE
IIIIII
100
10
-15
1000
" "-50
-25
IC, CARRIER FREQUENCY (MHz)
I'
~ +10
'"w
'"
«
+125
RL=3.9\1
R,=500n I'
/""
I
RL=3.9k
21C
I ~rl= 2 kl
~ -10
I~~I= todn
~
+150 +115
L
RL=3.9k (Standard
- R,=l k Test Circuit)
>
~
'"~
+25
+50
+75 +100
TA, AMBIENT TEMPERATURE (OCI
f
-
~
o
'\ /
FIGURE 20 - CARRIER SUPPRESSION versus FREQUENCY
FIGURE 19 - SIGNAL-PORT FREQUENCY RESPONSE
+ 20
-
-
..........
I--
V
~
V
R, = 1 k
IVC = 0.5 Vdc
-20
IC
'"
1111111
«>
1111111
0.1
-30
0.01
AV=
I I
RL II
31C
~
~el+1 ~Ie.!
_I-"
10
1.0
100
0.5
0.1
-
I.----""
1.0
5.0
10
50
IC. CARRIER FREQUENCY (MHz)
I, FREQUENCY (MHz)
FIGURE 22 - SIDEBAND HARMONIC SUPPRESSION
versus INPUT SIGNAL LEVEL
FIGURE 21 - CARRIER FEEDTHROUGH versus FREQUENCY
10
§
'>'
.sw
'"~«
1.0
-
0
>
....
:::>
--
:=:::>
0
ffi
0.1
"'
a:
'-'
«
t
./
'-'
-
IC±131s.,......
t:::-I~
V
/
../
V
> 0.01
0.05
0.1
0.5
1.0
5.0
10
50
200
IC. CARRIER FREQUENCY (MHz)
400
SOD
VS.INPUT SIGNAL AMPLITUDE (mVlrmsJ)
8-421
800
MC1596, MC1496 (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 23 - SUPPRESSION OF CARRIER HARMONIC
SIDEBANDS versus CARRIER FREQUENCY
FIGURE 24 - CARRIER SUPPRESSION
versus CARRIER INPUT LEVEL
11111
11111
~
10
3IC±IS
0
20
z
Illl
i
21C± IS
'"
itt--
70
0.05
~
w
"';3'"
21C· 2fS
I-
r--
l1
30
40
0.5
1.0
5.0
IC. CARRIER FREUUENCY (MHz)
50
'\..
o
--
/"
/
........
50
60
10
I-
>
70
0.1
IC=10MHz-
'".........
''-'''':
200
100
-r
-
-==
I
IC = 500 kHz
300
400
500
VC. CARRIER INPUT LEVEL (mVlrmsH
OPERATIONS INFORMATION
The MC1596/MC1496. a monolithic balanced modulator cir·
cuit, is shown in Figure 5.
This circuit consists of an upper quad differential amplifier
driven by a standard differential amplifier with dual current
sources. The output collectors are
cross~coupled
The linear signal handling capabilities of a differential amplifier
are well defined. With no emitter degeneration, the maximum
input voltage for linear operation is approximately 25 mV peak.
Since the upper differential amplifier has its emitters internally
connected, this voltage applies to the carrier input port for all
cond it io ns.
Since the lower differential amplifier has provisions for an
external emitter resistance, its linear Signal handling range may be
adjusted by the user. The maximum input voltage for linear operation may be approximated from the following expression:
so that full-wave
balanced multiplication of the two input voltages occurs. That is,
the output signal is a constant times the product of the two input
signals.
Mathematical analysis of linear ae signal multiplication indi-
cates that the output spectrum will consist of only the sum and
difference of the two input frequencies. Thus, the device may be
used as a balanced modulator, doubly balanced mixer, product
detector, frequency doubler, and other applications requiring
these particular output signal characteristics.
The lower differential amplifier has its emitters connected to
the package pins so that an external emitter resistance may be
used. Also, external load resistors are employed at the device
output.
V
=(15) (RE)VOItS peak.
This expression may be used to compute the minimum value of
RE for a given input voltage amplitude.
The upper quad differential amplifier may be operated either
in a linear or a saturated mode. The lower differential amplifier
is operated in a linear mode for most applications.
For low-level operation at both input ports, the output signal
will contain sum and difference frequency components and have
an amplitude which is a function of the product of the input signal
amplitudes.
For high-level operation at the carrier input port and linear
operation at the modulating signal port, the output signal will
contain sum and difference frequency components of the modulating Signal frequency and the fundamental and odd harmonics of
the carrier frequency. The output amplitude will be a constant
times the modulating signal amplitude. Any amplitude variations
in the carrier signal will not appear in the output.
The gain from the modulating signal input port to the output is
the MC1596/MC1496 gain parameter which is most often of interest
to the designer. This gain has significance only when the lower
differential amplifier is operated in a linear mode, but this includes
most applications of the device.
As previously mentioned, the upper quad differential amplifier
may be operated either in a linear or a saturated mode. Approximate gain expressions have been developed for the MC15961
MC1496 for a low-level modulating Signal input and the following
carrier input conditions:
1)
2)
3)
4)
Low·level dc
High-level dc
Low-level ac
High-level ac
These gains are summarized in Table 1, along with the frequency components contained in the output signal.
Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin numbers for a ceramic
package'd device refer to the PIN CONNECTION CHART on the first page.of this specification.
8-422
MC1596, MC1496 (continued)
OPERATIONS INFORMATION (continued)
FIGURE 25 - TABLE 1
VOLTAGE GAIN AND OUTPUT FREQUENCIES
Carrier Input
Signal (VCI
Low-level de
High-level dc
Low-level ae
Approximate
Voltage Gain
NOTES:
1. Low-level Modulating Signal, VM. assumed in all cases.
Vc is Carrier Input Voltage.
2. When the output signal contains mu Itiple frequencies,
Output Signal
Frequency(sl
the gain expression given is for the output amplitude of
each of the two desired outputs, fC + fM and fC - fM.
3. All gain expressions are for a single-ended output. For
a differential output connection, multiply each expression by two.
4. Rl = Load resistance.
5. Re = Emitter resistance between pins 2 and 3.
6. fe = Transistor dynamic emitter resistance, at +250 C;
RL Vc
2(RE + 2rel(~T)
~
RE + 2re
fM
fM
26 mV
re "" 15 (mA)
Rl Vc(rmsl
2J2(~T) (RE + 2rel
fC±fM
0.637 RL
fC HM, 3fC ±fM,
RE + 2re
5fC HM, . . .
7. K
High-level ae
=
Boltzmann's Constant, T
= temperature
in degrees
Kelvin, q = the charge on an electron.
qKT l!I::S 26 mV at room temperature.
APPLICATION INFORMATION
Double sideband suppressed carrier modulation is the basic
application of the MC1596/MC1496. The suggested circuit for
this application is shown on the front page of this data sheet.
In some applications, it may be necessary to operate the
MC1596/MC1496 with a single dc supply voltage instead of dual
supplies. Figure 26 shows a balanced modulator designed for
operation with a single +12 Vdc supply. Performance of this circuit is similar to that of the dual supply modulator.
carrier Signal at the carrier input and an AM signal at the SSB
input.
The carrier signal may be derived from the intermediate frequency Signal or generated locally. The carrier signa I may be introduced with or without modulation, provided its level is
sufficiently high to saturate the upper quad differential amplifier.
If the carrier signal is modulated, a 300 mV(rms) input level is
recommended.
AM Modulator
Doubly Balanced Mixer
The circuit shcwvn in Figure 27 may be used as an amplitude
modulator with a minor modification.
All that is required to shift from suppressed carrier to AM
operation is to adjust the carrier null potentiometer for the proper
amount of carrier insertion in the output signal.
However, the suppressed carrier null circuitry as shown in
Figure 27 does not have sufficient adjustment range. Therefore,
the modulator may be modified for AM operation by changing
two I1!sistor values in the null circuit as shown in Figure 28.
The MC1596/MC1496 may be used as a doubly balanced
mixer with either broadband or tuned narrow band input and
output networks.
The local oscillator signal is introduced at the carrier input
port with a recommended amplitude of 100 mV(rrns}.
Figure 30 shows a mixer with a broadband input and a tuned
output.
Product Detector
The MC1596/MC1496 makes an excellent SSB product detector (see Figure 291.
This product detector has a sensitivity of 3.0 microvolts and a
dynamic range of 90 dB when operating at an intermediate frequency of 9 MHz.
The detector is broadband for the entire high frequency range.
For operation at very low intermediate frequencies down to 50
kHz the 0.1 pF capacitors on pins 7 and 8 should be increased to
1.0 JJF. Also, the output filter at pin 9 can be tailored to a
specific intermediate frequency and audio amplifier input impedance.
As in all applications of the MC 1596/MC1496, the emitter
resistance between pins 2 and 3 may be increased or decreased to
adjust circuit gain, sensitivity, and dynamic range.
This circuit may also be used as an AM detector by introducing
Frequency Doubler
The MC1596/MC1496 will operate as a frequency doubler by
introducing the same frequency at both input ports.
Figures 31 and 32 show a broadband frequency doubler and a
tuned output .very high frequency (VHFI doubler, respectively.
Phase Detection and FM Detection
The MC1596/MC1496 will function as a phase detector. Highlevel input signals are introduced at both inputs. When both inputs
are at the same frequency the MC1596/MC1496 will deliver an
output which is a function of the phase difference between the
two input signals.
An FM detector may be constructed by using the phase detector principle. A tuned circuit is added at one of the inputs to
cause the two input signals to vary in phase as a function of frequency. The MC1596/MC1496 will then provide an output which
is a function of the input Signal frequency.
Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin numbers for a ceramic
packaged device refer to the PIN CONNECTION CHART on the first page of this specification.
8·423
MC1596, MC1496 (continued)
TYPICAL APPLICATIONS
FIGURE 26 - BALANCED MODULATOR
(+12 Vdc SINGLE SUPPLY)
820
1k
FIGURE 27 - BALANCED MODULATOR·DEMODULATOR
+12 Vdc
Uk
3k
RL
3.9k
3k
0.1 pF
t-;:-o-.....- ;.. -00--;"
----
=
IOkH,)\
1.0kH~\~
2.0
~
100H'0 \
~
~\
,
y TErPERArRE
W
40
FIGURE 10 - INPUT NOISE
VOLTAGE versus SOURCE RESISTANCE
SAfE OPERlTlNG tEA
AT
i'-....
"'~
/
J
..........
~-O. 4
~ ~
~ ~
/
/
~
~-o. 2
/
II
.........
§<
:i'
1/
0
~
~
z
/
0
0
U
15
50
15
+0.6
1.0
W
V+ and V-, POWER SUPPLY VOLTAGE (Vdc)
o1.0
100
1.0 k
10 k
R" SOURCE RESISTANCE IOHMS)
See current MCC1709/1709C data sheet for standard linear chip information.
See current MCBC1709/MCB1709F data sheet for Beam-Lead device information.
See current MCCF1709, 17Q9C data sheet for flip-chip information.
I
8-429
,-----f
1L~
MC1710
______
D_I_F_F_E_R_E_N_T_IA_L_C_O
__
M_P_A_R_A_T_O_R__~
DIFFERENTIAL
COMPARATOR
INTEGRATED CIRCUIT
MONOLITHIC DIFFERENTIAL
VOLTAGE COMPARATOR
· .. designed for use in level detection,low-level sensing, and memory
applications.
•
Differential Input Characteristics Input Offset Voltage = 1.0 mV
Offset Voltage Drift = 3.0 p.V IOC
•
Fast Response Time - 40 ns
•
Output Compatible With All Saturating Logic Forms Vo = +3.2 V to -0.5 V typical
•
Low Output Impedance - 200 ohms
MONOLITHIC
SILICON EPITAXIAL PASSIVATED
GSUFFIX
METAL PACKAGE
CASE 501
Lead 4 connected to case
F SUFFIX
CERAMIC PACKAGE
CASE 606
T0-91
MAXIMUM RATINGS (T A '" +25°C unless otherwise noted)
Symbol
v .....
Unit
VCC max
VEE max
+14
-7.0
Vdc
Vdc
Differential Input Signal Voltage
VID
:1:.5.0
Volts
Common Mode I nput Swing Voltage
VICR
:1:.7.0
Volts
Peak load Currant
Il
10
rnA
Po_r Dissipation (package IilTlitalions'
Po
mW
mWfOC
mW.
mWf'c
mW
mW/oC
Rm...
Power Supply Voltage
Metal Package
Derate above T A • +25 oC
Derale above TA = +25°C
Oparating Temparature Range
TA
680
4.6
500
3.3
625
5.0
-5510 +125
Storage Temperature Range
Tstg
-6510 +150
Flal Package
Derate above TA = +25oC
Ceramic Dual I n-Line Package
°c
°c
lSUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
PIN CONNECTIONS
Schematic
A B C 0
3
4
"F" Package
2
3
5
6
8
3
4
6
9
11
"L" Package
2
Vee
Vee
OUTPUT
GNO
See Packaging I nformation Section for outline dimensions.
See current MCC1710/171QC data sheet for standard linear chip information.
See current MCBC1710/MCB1710F for beam-lead device information
8-430
8
2
!'~l!IVAI,ENT CIRCUIT
CIRCUIT SCHEMATIC
E F
"G" Package
VEE
MC1710
(continued)
ELECTRICAL CHARACTERISTICS
Characteristic Definitions (linear operation)
'V:
Vo
AS
C
RS 0:;;: 200n
~
Temperature Coefficient of
Input Off""t Voltage
,
C
12
Vo
A
110 = 11. 12
':"
11+12
IIB=~
Avol= lout
-
-
e
I>VIO'I>T
110
Input Bia. Current
Vo = 1.4 Vde, TA = +25°C
Vo = 1.8 Vde, TA = _55°C
Vo = 1.0 Vde, TA = +125°C
liB
..,.
Vb
..,. A
..,.
14V
lOOmV
.J,
-
2.0
3.0
3.0
-
3.0
-
-
1.0
3.0
7.0
3.0
-
12
-
-
mVde
TA-j-
=oj
"V 1°C
"Ade
-
"Ade
20
45
20
V/V
-
-
ro
-
200
-
ohms
Differential Voltage Range
VID
±S.O
-
-
Vde
Positive Output Voltage
VID~5.0 mV, 0";10";5.0 mA
VOH
2.5
3.2
4.0
Vde
Negative Output Voltage
VOL
-1.0
.(l.5
0
Vde
Output Sink Current
VID~·5.0 mV. VO";O.
10
A
Vb=95mV-VIO
VIO
1.0
1700
VID~·5.0mV
~~
~ , .. ~
~
-
Unit
1250
1000
Output Resistance
i"~
e
Max
Avol
2.0
2.5
-
1.0
2.0
-
±S.O
-
-
Volts
80
100
-
dB
tp
-
40
-
ns
10+
10'
-
6.4
5.5
9.0
7.0
mAde
-
-
115
150
mW
Input Common·Mode Voltage Range
VICR
Common·Mode Rejection Ratio
VEE = ·7.0 Vde, RS";2oon
CMRR
Propagation Delay Time
For Positive and Negative
GOing Input Pul""
mAde
10.
TA = +25°C
VID ~·5.0 mV. Vo ~O,
TA = ·55°C
~VID
Typ
-
A
,'~
-
VIO
Min
VIO
Input Off""t Current
Vo = 1.4 Vde, TA = +25°C
Vo = 1.8 Vdc, TA = ·55°C
Vo = 1.0 Vde, TA = +125°C
Open Loop
Voltage Gain
TA = +25°C
T A = ·55 to +125°C
rL ~.
' !-." ',,,
C
Symbol
A
':'
_
Char_ristic
Input Off""t Voltage
Vo = 1.4 Vde, TA = +25°C
Vo = 1.8 Vde, TA = ·55°C
Vo ~ 1.0 Vde, TA = +125°C
,
AS
V,O
(Vcc ~ +12 Vde VEE ~ -6 Vde. TA = +25 0 C unless otherwi"" noted}
Vb
ein
'~
f
e
..,.A 0
1:_
Power Supply Current
Vo ";OVde
Power Consumption
8-431
MC1710 (continued)
TYPICAL CHARACTERISTICS
FIGURE 2 - INPUT OFFSET VOLTAGE
_ _ TEMPERATURE
FIGURE 1 - VOLTAGE TRANSFER
CHARACTERISTICS
0
0
r
-55OC
I i-+25OC
.0
/,,\'
\
0
1\\
\'
\.. +12SOC
0
.0
\.
l\
0
0
~
+125°C " \
+25°C
\
/'
-noc f-J
-I .0
-a.D
- 6.0
-4.0
+2.0
2.0
+4.0
+6.0
0
-55
+8.0
----
.....-
-2'
.25
.50
+15
+100
Vin,INPUTVOLTAGE (mV)
TA. AMBIENT TEMPERATURE (OC)
FIGURE 3 - INPUT OFFSET CURRENT
v.....sTEMPERATURE
FIGURE 4 - INPUT BIAS CURRENT
vorsusTEMPERATURE
+125
5
01\.
o~
.0
""
5
r-..
0
-'5
""-
"""
0
25
............
'25
"0
--
+75
0
r--
+100
5.0
-55
+125
'" "" "
-2'
"'-..
.25
..0
............
r----
+75
+100
+125
TA. AMBIENT TEMPERATURE (Del
TA, AMBIENTTEMPERATUAE (OCI
FIGURE 6 - VOLTAGE GAIN
versus TEMPERATURE
FIGURE 5 - GAIN VARIATION
WITH POWER SUPPLY VOLTAGE
3000..--,--,--.,..---,.---,.---.---,-----,
2500
25001f---+--+--+-+-+=+-;';;:''''f=---1
Or--.
~ 20001--+--+--+______"""--1.."""'-+-+-__1
z
~
~ 1500
r--- ~
............
§;
-'
is
~1000~~f-----,~-+--+-+-+-+---I
~
1500
""'" ~
1000
-55
Vee. POSITIVE SUPPLY VOLTAGE (Vile)
f'..-
25
.25
'50
+75
lA. AMBIENT TEMPERATURE (DCI
8-432
+100
+125
MC1710
(continued)
TVPICAL CHARACTERISTICS (Continued)
FIGURE 8 - POWER DISSIPATION
_sus TEMPERATURE
FIGURE 7 - RESPONSE TIME
,
+4.0
~ +3.0
0
2:
w
~+2.0
!:;
0
>
20 mV OVERDRIVE-
~+t.O
t-
10 mV
:::>
0
OV~RDRIVE-
~\~
~
.§ 125
z
5 mV OVERDRIVE
\-\\\
'-'-...
0
0
150
2 mV
0
DVE~DRIVE
~
I
c
'"~
-1.0
~~ 100
,p
1:1
I
-.-50
>=
~
iii
..... ~
>
0
20
I
40
I
I
60
80
i
:
100
75
-55
120
-25
t. TIME Ins)
+25
0
FIGURE 9 - RECOMMENDED SERIES RESISTANCE
versus MRTL' LOADS
+5.0
~~
~0
>
"-
0
:l
~
"-,
~
w
to
t-
0.2
0.5
~ +1.0
"'"
'"
1.0
-------\,STATE~
0
""
1.0
ci
>
"',r-.
5.0
L~~§
r-MCl7l0
MTTL, MOTL
-1.0
10
lOR 2
FAN·OUT CAPABILITY
RS, SERIES RESISTANCE Ik OHMS)
8-433
Rl
-6.0 V
MAXIMUM LOW
0
Va
MTTL
:::>
""
" "'
MEO. POWER
1.0
0.1
>
I
2.7k
INPUT VOLTAGE\
LIMITS
0
......
I Mn I
---~:~-t
~ +2.0
mW MRTl
1.0
MINIMUM HIGH STAT~
+3.0
z
10
5.0
+125
SWING
I
+4.0
MC17I0
20
+100
~ ACTUAL OUTPUT
RTL
50
+75
FIGURE 10 - FAN-OUT CAPABILITY
WITH MDTL' OR MTTL' OUTPUT SWING
100
'"
«
+50
TA, AMBIENT TEMPERATURE IOC)
-
\ _____D_I_F_FE_R_E_N_T_I_A_L_C_O_M_P_A_R_A_T_O_R_~
MC1710C
DIFFERENTIAL
COMPARATOR
MONOLITHIC DIFFERENTIAL
VOLTAGE COMPARATOR
· .. designed for use in level detection, low-level sensing, and memory
applications.
•
MONOLITHIC
SILICON EPITAXIAL PASSIVATED
Differential Input Characteristics Input Offset Voltage = 1.5 mV
Offset Voltage Drift = 5.0 /lV JOC
• Fast Response Time - 40 ns
• Output Compatible With All Saturating Logic FormsVo = +3.2 V to' -0.5 V typical
•
Low Output Impedance - 200 ohms
GSUFFIX
METAL PACKAGE·
FSUFFIX
CERAMIC PACKAGE
CASE 601
CASE 606
TO-91
MAXIMUM RATINGS ITA = +25 0 C unless otherwise notedl
Rating
Power Supply Voltage
Oifferential·Mode Input Signal Voltage
Common-Mode Input Swing
Peak Load Current
Power Dissipation (package limitations)
Metal Package
Symbol
Value
Unit
VCC
VEE
+14
-7.0
Vdc
Vdc
VID
;c5.0
Volts
VICR
;c7.0
Volts
IL
10
mA
680
4.6
500
3.3
625
5.0
mW
mW/oC
mW
mW/oC
mW
mW/oC
Derate above T A "" +2SoC
Ceramic and Plastic Dual In-Line Packages
Derate above T A
= +2SoC
LSUFFIX
_
Operating Temperature Range*
TA
o to +75
DC
Storage Temperatu re Range
T stg
-65 to +150
DC
*For fuel temperature range (-5SoC to -+ 125°C) and characteristic curves,
see MC1710 data sheet.
CIRCUIT SCHEMATIC
P SUFFIX
PLASTIC PACKAGE
CASE 646
PIN CONNECTIONS
Schematic
ABC
"G" Package
2
"F" Package
2
"L" and "P" Packages
3
EQUIVALENT CIRCUIT
Vee
+ ro
e
NON.INVERTING Bo---+-----'
INPUT
••
CASE 632
Vee
INVERTING INPUT
>
CERAMIC PACKAGE
TO-116
PD
Derate above T A "" +25 0 C
Flat Package
-.--
OUTPUT
A
GNO
See Packaging Information Section for outline dimensions.
See current MCC1710/1710C data sheet for standard linear chip information.
8-434
0
VEE
0
11
MC1710C (continued)
ELECTRICAL CHARACTERISTICS (Vcc ~ +12 Vdc. VEE ~ -6.0 Vdc. TA = +2SoC unless otherwise notedl
Characteristic Definitions
A,
Vm
A,
'k>:
E
~
":-
A
Characteristic
Input Offset Voltage
Vo ~ 1.4 Vde, T A ~ +25 0 C
Vo ~ 1.5 Vde, TA ~ OOC
Vo ~ 1.2 Vde, TA ~ +70oC
Vo
Rs.;;2oon
Temperature Coefficient of
Input Offset Voltage
Input Offset Current
~
E
_
C
12
A
Va
Input Bias Current
Vo ~ 1.4 Vde, TA
Vo ~ 1.5 Vde, TA
Vo = 1.2 Vde, TA
11+12
IIB"~
Aval :~~
-=
----'~
E-
C
~
A
W
C
:
Vin
A
-VB
';"
1.
-=
VB = 95mV.vro
-=
14V
IOOmV
'Al~
ein---1
~'~
Vin~
,;"Aaf':E
5.0
6.5
6.5
mVdc
-
-
-
-
5.0
-
-
1.0
5.0
7.5
7.5
/lAde
-
-
-
15
25
-
-
/lAde
25
40
40
V/V
-
ro
-
200
-
ohms
±5.0
-
-
Vde
2.5
3.2
4.0
-1.0
-0.5
0
VIDR
VOH
Negative Output Voltage
Vin ;;;::=-5.0 mV
VOL
Propagation Delay Time
For Positive and Negative Going
Input Pulse
/lV/oC
1500
Differential-Mode Voltage Range
Common-Mode Rejection Ratio
RS';;; 200 n
~k<=
;., . '"'~
1.5
Unit
1000
800
Positive Output Voltage
Vin;;' 5.0 mV, 0';;; 10';;; 5.0 mA
Input Common-Mode Range
VEE ~ - 7.0 Vde
":"
-
Avol
Output Sink Current
Vin;;' 5.0 mV, VO;;' 0
TA ~ +25 0 C
TA = OOC
E
Max
liB
= +250 C
= OoC
= +70o C
Output Resist811;ce
Vin
I:1Vloll:1T
TA~Oto+700C
C-=A
Typ
110
Voltage Gain
TA = +250 C
rL ~' ~.,",
"
Min
VIO
Vo ~ 1.4 Vde, TA ~ +250 C
Vo ~ 1.5 Vde, TA ~ OOC
Vo ~ 1.2 Vde, TA = +70oC
110"11- 12
-=-
Symbol
-
-
Vde
Vde
mAde
Is
1.6
0.5
2.5
-
-
±5.0
-
-
70
100
-
-
40
-
-
6.4
5.5
9.0
7.0
mAde
-
110
150
mW
Volts
VICR
CMRR
dB
ns
tpHLlLH
Va
Power Supply Current
Vo';;;OVde
Power Consumption
8-435
ICC
lEE
MCl711
MCl71lC
\
_____D_IF_F_E_R_E_N_T_I_A_L_C_O_M_P_A_R_A_T_O_R_S----'
DUAL DIFFERENTIAL
COMPARATOR
DUAL DIFFERENTIAL VOLTAGE COMPARATOR
· .. designed for use in level detection, low-level sensing, and memory
applications.
Typical Characteristics:
Differential Input
Input Offset Voltage = 1.0 mV
Offset Voltage Drift = 5.0 I1V 1°C
• Fast Response Time - 40 ns
• Output Compatible with All Saturating Logic Forms
Vo = +4.5 V to -0.5 V typical
• Low Output Impedance - 200 ohms
MONOLITHIC SILICON
INTEGRATED CIRCUIT
•
1lI
F SUFFIX
CERAMIC PACKAGE
CASE 606
TO·91
'OS,,""
+
Inputs 1
Go'
VEE
MAXIMUM RATINGS{TA
Rating
= +25 0
C unless otherwise noted I
Value
Unit
VCC
VEE
VIDR
+14
-7.0
Vdc
±5.0
Volts
VICR
IL
±7.0
Volts
50
mA
680
4.6
mW
mW/oC
Flat Ceramic Package
Derate above T A "" +250 C
500
3.3
mW
mW/oC
Ceramic and Plastic Dual In-Line Packages
625
5.0
mW
mW/oC
Differential Input Signal Voltage
Common-Mode Input Swing Voltage
Peak Load Current
Power Dissipation (package limitation)
Metal Package
Derate above T A '" +250 C
MC1711
MC1711C
Storage Temperature Range
,,,puts 2
~
5
6
TA
T stg
-55 to +125
o to +75
-65 to +150
Strobe 2
(Top View)
G SUFFIX
METAL PACKAGE
CASE 603-02
TO-100
Po
Derate above T A = +25 0 C
Operating Temperature Range
Vee
Output
Symbol
Power Supply Voltage
3
StrObe 12G@.;'
V,~c, ~M:':"o".,
,
'''putsl
"
S,n p uts2
4
5
V"
(EIottomVIGw)
°c
°c
L SUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
CIRCUIT SCHEMATIC
P SUFFIX
PLASTIC PACKAGE
CASE 646
(MC1711C only)
'''PU1S1
Output
InpulS2
Dl""""'''----![::J
GNO
OUTPUT
·Connected to pin 4 via the substrate on
some plastic units_
Sse Packaging Information Section for outline dimensions.
8-436
MC1711, MC1711C (continued)
ELECTRICAL CHARACTERISTICS (each comparator)
Unit
Characteristic
Input Offset Voltage
(VICR = 0 Vdc, TA = +250 C)
(VICR 0 Vdc, T A = +250 C)
(VICR = 0 Vdc, T A = Tlow to T
0 Vdc, T
+
+
Input Offset Current
(VO
(VO
(VO
(VO
(VO
=
=
=
=
=
1.4
1.8
1.5
1.0
1.2
Vdc,
Vdc,
Vdc,
Vdc,
Vdc,
TA
TA
TA
TA
TA
+25 0 C)
-550 C)
OoC)
+125 0 C)
+750 C)
0.5
= +25 0 C)
= -550 C)
= OoC)
= +12SoC)
= +7SoC)
25
=
=
=
=
=
15
25
25
Input Bias Current
(VO
(VO
(VO
(VO
(VO
=
=
=
=
=
1.4 Vdc. T A
1.8 Vdc, TA
1.5 Vdc, TA
1.0 Vdc, T A
1.2 Vdc, T A
/LAdc
100
150
150
V/V
1500
S.O
-0.5
-1.0
Output Sink Current
O.S
0
Vdc
0
Vdc
mAdc
0.8
(Vin ;;'-10 mV, Vo ;;'0)
Strobe Current
1.2
1st
2.5
mAdc
(Vstrobe = 100 mVdc)
Input Common·Mode Range
Volts
(VEE = -7.0 Vdc)
Response Ti me
(Vb = S.O mV + VIO)
40
*Tlow = -SSoC for MC17", OOC for MC1711C
Thigh= +12So C for MC17", +7S oC for MC1711C
8-437
ns
MC1711, MC1711C(continued)
TYPICAL CHARACTERISTICS
FIGURE 2 - INPUT BIAS CURRENT
versus TEMPERATURE
FIGURE l-VOLTAGE
TRANSFER CHARACTERISTICS
+5. 0
"I. 0
~
~
~+3. 0
iA = +250C
\
w
'"~ +2. 0
o
>
f-
a: +1. 0
!\
f-
g
c3
0
>
\. r-- ,....
0
-2. 0
-10
-8,0
-6.0
-4.0 -2.0
+2.0 +4.0
Yin. INPUT VOLTAGE. (mV)
+6.0
+8.0
+10
-40
-20
+20
.+40
+60
+80
+100
+120
+140
TA, AMBIENT TEMPERATURE. eC)
FIGURE 3 - VOLTAGE GAIN
versus TEMPERATURE
FIGURE 4 - RESPONSE TIME
FOR VARIOUS INPUT OVERORIVES
+150
0
)cc=t) VEE = -6.0 V
TA = +25 0C_
0
I
0
I
I
0
0
0
0
0
-2. 0
-10
20lv
10m~7I2/
.//~ '/
+20
'/ ~V
+40
... V
+60
2.0
mv
1
+80
+100
+120
t. TIME(ns)
FIGURE 5 - VOLTAGE GAIN VARIATION
WITH POWER SUPPLY VOLTAGE
FIGURE 6 - STROBE RELEASE TIME
FOR VARIOUS INPUT OVERDRIVES
+4.0
+3.0
l
+2.0
o 130
+1. 0
iii
0
+3 0
z
~
o
'"
~ 120
I
V
/
1VCC=+12VIVEE = -6.0 V
TA=+250C_
V
I
I
w
'"~ _
+2.0
o~
;:: c3 +1.0
5:2:~
o
0
o
>
-1. 0
-10
5.0m~.
2.0 mV
~
+10
-1.0mV
+20
t, TIME Ins)
8-438
OmV
.~
+30
+40
+50
MC1711, MC1711C (continued)
FIGURE 8 - OUTPUT PULSE STRETCHING
WITH CAPACITIVE LOADING
FIGURE 7 - COMMON-MODE PULSE RESPONSE
'3.0
.0
I I I I
vc1c: T1 Jv
VEE=-Ei.O~
r~
.or-or-- \--
-
TA =+250 C
50
=
t - v"
Vo
.0t---
!f~mlllllill
.0
.0
-20
0
+20
+40
+60
+80
+100
+120 +140
+160 +180
t, T!ME(ns)
t. TlME(ns)
FIGURE 9 - RECOMMENDED SERIES RESISTANCE
versus MRTL LOADS
+,
100
~~
FIGURE 10 - FAN-OUT CAPABILITY
WITH MDTL OR MTTL OUTPUT SWING
.0
~ ACTUAL OUTPUT
MRlL
0
SWING
MC1711
MC1711C
+4 .0
MINIMUM HIGH STATE_7
a
0
f'.1'
0
MTTL
---Mon--/Z
.0
Mon,
mW MRTl
MTTL;,\
INPUT VOLTAGE
0
""
" "-
:r-t-I"n I ~
MEO. POWER
1
01
0.2
0.'
1.0
.0
I""
2.0
~,
------STATE~
MAXIMUM LOW
0
RI=
l~
MC17l1
Me1711e
MTTL, MOll
1'1'
'0
-I .0
10
\012
RS.SERIES RESISTANCE{k OHMS}
FAN·OUT CAPABILITY
8·439
R,
iffi>
-s.ov
MiTL
_____f
MC1712
MC1712C
\
______
O_PE_R_A_T_I_O_N_A_L_A_M_P_L_I_F_IE_R_S---'
WIDEBAND DC AMPLIFIER
INTEGRATED CIRCUIT
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
MONOLITHIC WIDEBAND DC AMPLIFIER
. designed for use as an operational amplifier utilizing operating
characteristics as a function of the external feedback components.
• Open Loop Gain AVOL
= 3600 typical
•
Low Temperature Drift - ±2.5 !lV/oC
•
Output Voltage Swing ±5.3 V typical @ + 12 V and -6 V Supplies
•
Low Output Impedance - Zout
~ +250 C
MAXIMUM RATINGS ITA
=
GSUFFIX
METAL PACKAGE
CASE 601
200 ohms typical
Lead 4 connected to case
unless otherwise noted)
Rating
Symbol
Value
Unit
Power Supply Voltage
(Total between V+ and V- terminals)
Iv+I+lv-1
21
Vdc
Differential Input Signal
Vin
±5.0
Volts
CMVin
+1.5
-6.0
Volts
Peak Load Current
IL
50
mA
Power Dissipation (Package Limitation)
Metal Package
Po
680
4.6
500
3.3
625
5.0
mW
mW/oC
mW
mW/oC
-55 to +125
o to +75
°c
Common Mode I nput Swing
Derate above T A = +250 C
Flat Ceramic Package
Derate above T A == +25 0 C
Dualln·Line Ceramic Package
Derate above T A :: +25 0 C
Operating Temperature Range MC1712
TA
MC1712C
Storage Temperature Range
T stg
mW
mW/oC
-65 to +150
°c
CIRCUIT SCHEMATIC
F SUFFIX
CERAMIC PACKAGE
CASE 606
TO·91
L SUFFIX
CERAMIC PACKAGE
CASE 632
TO·116
PIN CONNECTIONS
Schematic
4
"L" Package
3
3
4
5
4
5
6
EQUIVALENT CIRCUIT
LEAOl EXTERNAL
F
FREQUENCY
+---1--0 COMPENSATION
lAG
240
0
3
"F" Package
y+
480
ABC
"G" Package
°
~--------~----~----oySee Packaging Information Section for outline dimensions.
8-440
G
E
6
6
H
8
8
10 12
10
13
MC1712, MC1712C (continued)
ELECTRICAL CHARACTERISTICS IT A = +25 0 C unless otherwise;;-;.n;.;o.;;ted;;;;..1-:::£::""..."...,.....,..---...:0:;";:;:::---,
Characteristic
Min
MC1112C
Typ
Max
Unit
VN
Open-Loop Voltage Gain (AL'" 100 k!ll
IV+ = 6.0 Vdc. V- = -3.0 Vdc. Vo = ±2.5 VI
500
2000
(V+ '" 12 Vdc, V-::: -6.0 Vdc, Vo '" ±5.0 VI
(V+::: 12 Vdc, V-:= -6.0 Vdc. Vo '" ±S.O Vdc,
BOO
3400
1500
6000
TA =TlowCD. ThighB.,
-6.0 Vdc
Illl
5.Ok10k
1.0 k 2.0 k
R" LOAD RESISTANCE (OHMSI
IIITn
100 k
MC1712, MC1712C (continued)
TYPICAL CHARACTERISTICS(continued}
FIGURE 7 -INPUT OFFSET CURRENT
versus TEMPERATURE
FIGURE 6 - INPU:r BIAS CURRENT
versus TEMPERATURE
4.0
0.6
"'- I II
'-....
a 1'\
.
'\
j
'"0;
j
+12 V, -6.0 V Supplies
....
15
g:
2.0
....
'" "
'"
~
~
.l>
-40
-20
~
r---........
...........
--
--V~;--
1 11
+20
+40
0.4
a:
........
+6.0 V, -3,0
-60
....
+60
+80
1\
a
~
0
....
r--
~
0,2
"-
\-
~
~
+100
+120 +140
.......
+12 V, -6.0 V Supplies
"-I'-....
' -r--
r---
+6,0 V,-3.0 VI SUPPli'j
-60
-40
-20
+20
TA, AMBIENT TEMPERATURE (DC)
+40
+60
+80
+100 +120 +140.
TA' AMBIENT TEMPERATURE (DC)
FIGURE 8 -INPUT OFFSET VOLTAGE
versus TEMPERATURE
FIGURE 9 - OUTPUT NOISE VOLTAGE
versus SOURCE IMPEDANCE
2.0
v+ = +12 Vdc
:;;
;;:; 1.75
'"~
V
+6.0 V, -3.0 V SUPPI
o
1.50
o
....
::>
~ 1.25
"""6
~
-- --- ---
/ V
~V
I--
1.0
-60
-40
-20
+20
/'
./
>
~
V- = -6,0 Vdc
TA=25 0 C
~
E
V
, / '"
+12 (-6.0t suPPt'
+40
+60
+80
+100
+120 +140
TA, AMBIENT TEMPERATURE (DC)
50
100
1.0 k
RS,SOURCE RESISTANCE (OHMS)
8·443
10 k
'\
MC1723
MC1723C
POSITIVE VOLTAGE REGULATORS
' - - - - - - _ _- - - - - 1
MONOLITHIC VOLTAGE REGULATOR
VOLTAGE REGULATOR
The MCl723 is a positive or negative voltage regulator designed
to deliver load current to 150 mAdc. Output current capability can
be increased to several amperes through use of one or more external
pass transistors. MC 1723 is specified for operation over the military
temperature range (-55 0 C to +125 0 C) and the MCl723C over the
commercial temperature range (0 to +75 0 C)
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
INTEGRATED CIRCUIT
• Output Voltage Adjustable from 2 Vdc to 37 Vdc
• Output Current to 150 mAdc Without External Pass Transistors
~OPVi.WJ10ill
• 0.01% Line and 0.03% Load Regulation
~
• Adjustable Short-Circuit Protection
FSUFFIX
CERAMIC PACKAGE
CASE 606
(TO-91)
:.o
~
FIGURE 1 - CIRCUIT SCHEMATIC
Vee
(12)8
Vc
1
o
7(11)
r-~----~~~--~--~--~~-----1
2
(bottom view)
G SUFFIX
METAL PACKAGE
CASE 603
(TO·l00)
6.2V
14
(top view)
NON·INVERTING
INPUT
INVERTING
INPUT
L SUFFIX
CERAMIC PACKAGE
CASE 632
(TO-116)
PIN NUMBERS ADJACENT TO TERMINALS ARE FOR THE METAL AND CERAMIC fLAT PACKAGE;
PIN NUMBERS IN PARENTHESIS ARE FOR THE CERAMIC DUAL IN-LINE PACKAGE.
FIGURE 2 - TYPICAL CIRCUIT CONNECTION
FIGURE 3 - TYPICAL NPN CURRENT BOOST CONNECTION
(7
TA=+250e
--
~
~
~
\
~
........,.
z
c
\ 1\
::>
<.>
::
'0
~
TA1'~oe
«
::
10
............
~ -0.1
...........
-0.15
40
30
o
5
-0.05
20
40
--
~
:::::-
-O.t
r--
---
~
-----r-..
ez
r-
.,;
T~=:;r.;-
:-f--4...
~
::>
'"c
«
~
15
10
20
25
\
I---
-0.4
5.0
30
RSC = IOn
1.0
1'1
~
'"
'"«
:;
~
w
O.S
\
'"
>
;:::
g
~
0.6
~
....
o
i\."-
\
\
40
20
~
'\.
\
60
i\
0.7
..............
....
J
TA +25 0 C
~
20
40
~
r--
II
0.6
160
"<..
--- ~~
LIMIT CURRENT RSC=5il
60
so
0.5
'"
B
TA = -155OC
o
200
~
:-- t---
LlMITCURRENT RSC = 10 il
....
z
~
-50
+50
r--
8-446
'"
'"
B
'"z
;:::
............
'" "'-
---
+100
TJ.JUNCTION TEMPERATURE (OCI
10. OUTPUT CURRENT (rnA)
120
~
0.4
100
<
,g
w
:::;
0.2
SO
SENSE VOLTAGE
ii
TA=+125 0 C
0.4
a
"
TA = +25 0C\
TA =+125 0C\
'">
....
::>
w
\
~A=-550C
FIGURE 9 - CURRENT LIMITING CHARACTERISTICS
AS A FUNCTION OF JUNCTION TEMPERATURE
S
"""
w
'"....>
~
O.S
RSC = 110 il
~
100
10. OUTPUT CURRENT (rnA)
1.2
:;
-.......;:
.......
-0.3
FIGURE 8 - CURRENT LIMITING CHARACTERISTICS
«.
'"
~
so
60
~~
-0.2
1il
i
'"
o
-0. 1
10. OUTPUT CURRENT (rnA)
~
~~
~
ffl
::
TA-+1250e
RSC = 10 il
j-O.15
~
'"
TA = -55°C
g
'"
-
'0
>
."..
ffl
-0.2
.........
+0.1
::>
'"~
TA = -55°C
FIGURE 7 - LOAD REGULATION CHARACTERISTICS
WITH CURRENT LIMITING
+0.05
c
r-..
10. OUTPUT CURRENT (rnA)
FIGURE 6 - LOAD REGULATION CHARACTERISTICS
WITH CURRENT LIMITING
~
~+250e
'"
Vin-VO.INPUT·OUTPUT VOLTAGE (VOLTS)
ez
r--
iP
I---
20
--
il
80
40
+150
::;
MC1723, MC1723C (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - LINE REGULATION AS A FUNCTION
OF INPUT-OUTPUT VOLTAGE DIFFERENTIAL
+0.2
L\.Vjn
FIGURE 11 - LOAD REGULATION AS A FUNCTION
OF INPUT-OUTPUT VOLTAGE DIFFERENTIAL
+0. I
!+3 V
I~ = I ml to IL J50 mAl
"0
>
"0
z
ez
5
5
~
'"
~+O.l
'"~
--
t--
w
Z
:::;
c
1
- r-- r- r-
'"
~
«
'"
g
.,;
35
25
10
Vin -VO,INPUT·OUTPUT VOLTAGE IVOLTSI
4. 0
.5
~
B 2.O~
---
i:;
o
j.--'"
z
50
+4.0
~
I
II
TA }-550C
I--
'"
+2.0 ~
z
'"
~
~
o
0
TA-+250C
I---
.L b.
lL
1.0 " ' - - - -
w
r-
'"
~
'"
>
OUTPUT VOLTAGE
l-
'-
TA - +125 0C
O~
40
IN~UT vJLTAG~
IL = 0
I-
30
FIGURE 13 - LINE TRANSIENT RESPONSE
t---- Vo ~ Vret
3. 0
20
Vin -Vo, INPUT·OUTPUT VOLTAGE IVOL TSI
FIGURE 12 - STANDBY CURRENT DRAIN AS
A FUNCTION OF INPUT VOLTAGE
..
" f'
-0. 2
15
5.0
~
t'---
.ll
~
-0.1
:<
r----.
-0. I
ii:
~
j..---
10
20
-2.0
-5.0
40
30
+10
Vin,INPUT VOLTAGE IVOLTSI
+20
t, TIME
+30
+40 +45
1",1
FIGURE 15 - OUTPUT IMPEDANCE AS
FUNCTION OF FREQUENCY
FIGURE 14 - LOAD TRANSIENT RESPONSE
+10
IL=40mA
LOAO CURRENT
~z
\
'"
~ +2.0
/
w
>
~
0
0
I
«
g
OUTPUT VOLTAGE
~ -4.0
I-
'"o
-B.0
-5.0
z
w
'-'
«
./
~
1\
o
I-
S
'"t=
+20
+30
+40
[..1'"1
z
«
:pl'l."
~
;!!
I-
ii:
I-
,/'
0.1
'"
0
S
~
+10
~I=O
%
:<
.5
f\
o
'"~
~II '~OmA
,.'"
.01
100
+45
I,TIME..,.)
Jk
Ik
f, FREIlUENCY 1Hz)
8-447
1 Jk
1M
MC1723, MC1723C (continued)
TYPICAL APPLICATIONS
Pin numbers adjacent to terminals are for the metal and ceramic flat packages;
pin numbers in parenthesis are for the ceramic dual in-line package.
<
FIGURE 16 - TYPICAL CONNECTION FOR 2
(12) 8
6(10)
(11)7
10(2)
Vo
<7
FIGURE 17 - MC1723,C FOLDBACK CONNECTION
RSC
6 (10)
(12) 8
Vo
+Vin
RSC
+Vin
Vo
(11)7
RA
10(2)
RI
MC1723
(MCI723C)
(6) 4
RI
1(3)
MC1723
(MCI723C)
R3
2 (4)
(5) 3
Cre!
1 -=
-=
ISC
==
Vsense
RSC
~
100 pF
R2
'"0
11000PF
2
VO,,7[RI: R2J
0.66 at TJ = +250C
RSC
ISC
For bestresults 10 k < RI + R2 < 100 k.
IL--
1(3)
5(7)
-=
Iknee
IN4001
100
or Equlv
MC1723
(MCI723C)
10
1M
Ik
-=
S (10)
+5 V
MC1723
(MCI723C)
2k
+
(5) 3
'""''1
(5) 3
5 (7)
-=
0.33
TO.I"F
(12)8
2 (4)
5.1 k
-=
5.1 k
(7) 5
-=
FIGURE 20 - +15 V, 1-AMPERE REGULATOR
WITH REMOTE SENSE
0.33
FIGURE 21 - -15 V NEGATIVE REGULATOR
6 (10)
Vin
(12) 8
'20 V
(11)7
2 (4)
10 (2)
(S) 4
1(3)
MC1723
(MCI723C)
MC1723
(MCI723C)
0.1
~F
(S) 4
2 (4)
['knee - IJ
ISC
(II) 7
10(2)
1(3)
Vsense
Vo
Vo
Vo
6(10)
(S) 4
J
Vin2
+10 V
-=
(12) 8
0'=
Vi" 1
+S.5 V
=lmH
Vin
+10 V
where
FIGURE 19 - +5 V, 1-AMPERE HIGH
EFFICIENCY REGULATOR
FIGURE 18 - +5 V, 1-AMPERE SWITCHING REGULATOR
(11)7
RA=':.-IOkn
1-0
Vsense
RSC = (1-..) ISC
For minimum drift A3 '" A1!IR2.
O.I"F
-=
2(4)
(5) 3
R2
2.2k
10k
12 k
+ Sense
Vo
~-
+15 V
10 k
Load
-Sense
-=
8-448
Vin = -20 V
+5 V
MC1723, MC1723C (continued)
TYPICAL APPLICATIONS (continuedl
FIGURE 22 - +12 V. I-AMPERE REGULATOR
USING PNP CURRENT BOOST
Vin
2N3791
or Equiv
+18 V ...-.----,(
0.33
100
10k
100pF
12k
Pin numbers adjacent to terminals are for the metal and ceramic flat packages;
pin numbers in parenthesis are for the ceramic dual in-line package.
8-449
~f
\
MCl733
MCl733C
_ _ _ _ _H_I_G_H_-F_R_E_Q_U_E_N_C_Y_C_IR_C_U_I_T_S-----'
DIFFERENTIAL VIDEO
WIDEBAND AMPLIFIER
MONOLITHIC DIFFERENTIAL VIDEO AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
· .. a wideband amplifier with differential input and differential output. Gain is fixed at 10, 100, or 400 without external components
or, with the addition of one external resistor, gain becomes adjustable
from 10 to 400.
•
Bandwidth - 120 MHz typical@ AVd = 10
•
Rise Time - 2.5 ns typical @ AVd = 10
•
Propagation Delay Time - 3.6 ns typical @ AVd = 10
GSUFFIX
METAL PACKAGE
CASE 603
TO-l00
FIGURE 1 - BASIC CIRCUIT
FIGURE 2 - VOLTAGE GAIN
ADJUST CIRCUIT
GAIN SELECT
LSUFFIX
CERAMIC PACKAGE
CASE 632
Radj
TO-116
OUTPUT 1
INPUT 1
D.2/olF
,
INPUT
INPUll
TOUT,PUT
"
OUTPUl2
~OUTPUT
INPUT
2
'.2"
="
2
CONNECTION DIAGRAMS
V· G2A G28
V' G2A G2B
GAIN SELECT
GIA
GAIN SELECT
G2A
GAIN SELECT
FIGURE 3 - CI RCUIT SCHEMATIC
v+ SIIOI
1.1k
2.4k
INPUT I
OUTPUT I
INPUT 2
OUTPUT 2
2.4 k
(top view)
2111
GIS
GAIN SELECT
7 (SI
OUTPUT 1
7k
91111 {
GAIN
SELECT
G1A
GZA
SELECT
Pin 5 connected to case.
14
INPUT 2
6(71
10 (121
3 (31 {
GAIN GZB
G SUFFIX, METAL PACKAGE
OUTPUT Z
7k
NC
INPUT I
13 NC
G2B GAIN SELECT
12 G2A GAIN SELECT
GI B GAIN SELECT
~G~lB~_==l==_I=::::j
4
II GIA GAIN SELECT
v-
5
10
4141
NC
6
9 NC
OUTPUT 2
v+
(top view)
OUTPUT I
400
L SUFFIX, CERAMIC PACKAGE
See Pacltaging Information Section for outline dimensions.
8-450
MC1733, MC1733C (continued)
MAXIMUM RATINGS ITA = +25 0 C unless otherwise notedl
Rating
Power Supply Voltage
Differential Input Voltage
Common-Mode Input Voltage
Output Current
Internal Power Dissipation (Note 1)
Metal Can Package
Ceramic Dual In-Line Package
Operating Temperature Range
Svmbol
Value
Unit
V+
V-
+8.0
-8.0
Volts
Vin
±5.0
Volts
CMVin
±6.0
Volts
10
10
rnA
500
500
rnW
o to +75
-55 to +125
°c
-65 to +150
°c
PD
MC1733C
MC1733
TA
Storage Temperature Range
T stg
ELECTRICAL CHARACTERISTICS IV+ = +6.0 Vdc, V-·· -6.0 Vdc, at TA
= +25 0
C unless otherwise notedl
Differential Voltage Gain
Gain 1 INote 21
Gain 2 INote 3)
Gain 3 INote 4)
AVd
IR s =50n)
Bandwidth
BW
MHz
tr
ns
Gain 1
Gain 2
Gain 3
Rise Time
Gain 1
Gain 2
Gain 3
IRs=50n,Vo= 1 Vp-p)
12
Propagation Delay IRs = 50n, Va = 1 Vp·p)
Gain 1
Gain 2
Gain 3
tpd
Input Resistance
Rin
ns
10
kn
Gain 1
Gain 2
IRs = 50 n,
BW = 1 kHz to 10
Common-Mode Rejection Ratio
Gain 2
Gain 2
IVCM
I
= ±1 V,
= ± 1 V,
f " 100 kHz)
f = 5 MHz)
Supply Voltage
Ga~n
2
Output Offset Voltage
Gain 1
8·451
MC1733, MC1733C (continued)
FIGURE 4 - MAXIMUM ALLOWABLE POWER DISSIPATION
BOO
;<
.s
NOTES
Derate metal package at 6.5 mW fJc for operation at
ambient temperatures above 7SoC and dual in-line package at 9 mW/oC for operation at ambient temperatures
Note 1:
above 1000 C (see Figure 4). If operation at high am-
bient temperatures is required (MC1733) a heatsink
may be necessary to limit maximum junction temperature to 1500C. Thermal resistance, junction-to-case,
Note 2:
Note 3:
for the metal package is 69.4°C per Watt.
Gain Select pins G1A and G1B connected together.
Gain Select pins G2A and G28 connected together.
Note 4:
All Gain Select pins open.
~
;:: 600
;::
[lj
'"
~
~
400
-
MET~L~~~o~GE
CERAMIC OUALIN-LINE PACKAGE
~9mW{OC
_
\
"
0;
\
",
_
200
\
'\'
-',
1'\
~
~
~
o
o
+50
+150
+100
+200
TA, AMBIENT TEMPERATURE (DC)
TYPICAL CHARACTERISTICS
(y+
= +6,0 Ydc. Y- =-6.0 Vdc. T A = +25 0 C unless otherwise noted.)
FIGURE 5 - SUPPLY CURRENT versus TEMPERATURE
FIGURE 6 - SUPPLY CURRENT versus SUPPLY VOL TAGE
20
2B
24
//
./
0
B
,
..........
/V
........
~
1
16
-60
6
-20
+20
+60
TA. AMBIENTTEMPERATURE (DC)
'"
+100
,/'
V
/""
./
2
./
B_O
./
3.0
+140
4.0
5,0
6.0
v±, SUPPLY VOLTAGE (VOLTS)
8-452
1_0
B.O
MC1733, MC1733C (continued)
TYPICAL CHARACTERISTICS (continued)
(V+
= +6.0 Vdc, V- =-6.0 Vdc, T A = +2SoC unless otherwise not.d.)
FIGURE 8 - GAIN .arsus FREQUENCY
FIGURE 7 - GAIN verus TEMPERATURE
1.15
So
"-
~
~AINI
1.10
J,J
50
z
z
<1
~ 1.05
'"
~
,
1.0
'">
'"w
"-
w
"
0.95
L.U
>
t-.....
"
g
0.90
-10
+20
-
~AIN2-
-
'"~
'"
'">
'"w
'"zw
.........
w
"-
-'
0.85
0.80
-SO
GAIN 3_
It-
40
GAIN 2
30
20
~
~
GAIN 3
10
\
'"inz
"
+SO
~L(= Uri
~
+100
+140
'"
10
1.0
T, TEMPERATURE (OC)
\
100
1.0k
f, FREQUENCY (MHz)
FIGURE 9 - GAIN v....us SUPPL Y VOLTAGE
FIGURE 10 - GAIN v.rsus RADJUST
1.4
1000
z
1. 2
z
w
1.0 -
~
~
'">~
-
_GAIN 3
0, 8 .......
..... 1-"'"
~
w
I--
./
;::
":1
S/
O. 4
3.0
....
100
~
./
GAINy
O.
'"~
'"
V
.......
'"
'"-'>
r- V
GAINj.....-"'"
g
Y
- -
~
...........
10
4.0
5.0
S.O
7.0
B.O
10
100
V±, SUPPLY VOLTAGE (VOLTS)
+SO
FIGURE 12 - GAIN v.rsus FREQUENCY
and TEMPERATURE
GAIN 2)
RL = 1 kn
m
+50
'"w
'"'"
+40
+20
'"inz
+10
-'
<1
'"
-10
10
tti2L
40
>
30
'"
II II
'"
~
w
20
V
'"inz
10
TA = +25 0 C
r , II
TA=+75 0C
~
'"
TA =+125 0C
-10
1.0
1.0 k
f, FREQUENCY (MHz)
'i 11'11
10
100
f, FREQUENCY (MHz)
8-453
TA=OoC
~
)
-'
\'
100
T~--550C
w
~
v~!Hv
~
RL = 1 kn
50
w
~
'"
80
'"
~'"
VS=±SV
1.0
z
\
~
> +30
~
~
w
~
VSl±8~
<1
10k
Radj,ln)
FIGURE 11 - GAIN versus FREQUENCY and
SUPPLY VOLTAGE
3
z
.......
1.0 k
1.0k
MC1733, MC1733C (continued)
TYPICAL CHARACTERISTICS (continued)
(V+
= +6.0 Vdc, V- = -6.0 Vdc, T A = +25 0 C unless otherwise noted,)
FIGURE 13 - PULSE RESPONSE versus GAIN
FIGURE 14 - PULSE RESPONSE varsusSUPPLY VOLT-AGE
+1.6
+1.6
IGAINl_
g+1.2
~
"'-...j
"' +0.8
~
~+1.2
~
?
I
../
IL
/I I
~>
!5 +0.4
-10
-5.0
I
>
~+O.4
I'GAIN 1
~
+10
+15
+20
+25
+30
-0.4
-15
+35
-10
+5.0
-5.0
+1.6
TA -
0
'/
~+O.4
~
f
--
0
J
..........
> 110
_ +150C _
I
~
-
TA=+750 C
'"
TA-+l~50C
-
-5.0
+5.0
+10
t, TIME
40
o
o
+15
+20
+25
+30
+35
In~
"- ..........
t;:
~
w
r-.....
-15
'-...
1"-
60
6.0
B.O
70
BO
Insl
Kr-GAIN 3
\
l\
~-250
I\~G~INII
GAIN 1
-300
-350
4.0
50
~ t--.
w
"
1.0
40
30
10
~ -200
..........
........
o
10
'" 150
e>-
-10
-15
I
I
~ -100
~
iE
-50
GAIN2
e
./
I
FIGURE 18 - PHASE SHIFT varsus FREQUENCY
.......
~ffi -10
/'
OVERDRIVE RECOVERY TIME
FIGURE 17 - PHASE SHIFT varsus FREQUENCY
-5.0
+35
/'
C
-10
+30
V
BO
I
( T
-0.4
-15
+25
V
./
'"':;
IJ/I.. r~rA
>
o
160
'"
~
olc
+20
V
GAIN 1
w
TA - -55 0C_
~
~
'>
.5
~+O,8
+15
100
GAIN 1J
RL-lkri-
o
+10
FIGURE 16 - DIFFERENTIAL OVERDRIVE
RECOVERY TIME
FIGURE 15 - PULSE RESPONSE versus TEMPERATURE
~
Vs -±3 V
I,TIME (ns)
!.TIME In~
~+1.2
o
/
JI
.j 0
+5.0
VS~±6V- r--
\
//
-1kn
\
-If
~+O.8
-0.4
-15
r----- _~s-±Blv_
o
1/
0
RL
w
GAIN 1-1.
~
.j
r--
GAIN 3
o
tlk~-
10
1.0
10
100
f, FREQUENCY IMHz)
f. FREQUENCY IMHz)
8-454
1.0 k
MC1733, MC1733C (continued)
TYPICAL CHARACTERISTICS (continued)
(V+ = +6.0 Vdc, V- = -6.0 Vdc, T A = +250 C unless otherwise noted.)
FIGURE 20 -INPUT NOISE VOLTAGE
FIGURE 19 - INPUT RESISTANCE versus TEMPERATURE
0
70
GAIN
r-GAiN 1
~.!
BW~IOMHz
0
0
/
/""
0
0
/""
./'
0
0
./'
/
7
./'
o
/"
z
/"
~
/"
10
1/
0
0
o
-20
-60
+20
+60
+100
+140
1.0
10
T A. AMBI ENT TEMPERATU RE (DC)
8. 0
p--
..-:::: -;::::::. :...--
G~ i:-;;:;:;"
'Q\.'~
~~~~\"\'
..--: r---
.--
3.0
4.0
6.0
~
~
5.0
ijj
(,!J
4.0
~ 2.0
.j
5.0
6.0
7.0
/
1.0
V
o
8.0
10
100
V+, SUPPLY VO LT AG E (VOL TS)
7. 0
RIL
~ 1k~
0
~
~ 5, 0
0
ijj
. . . 1"-
~
§; 3.0
>
0
t'-..
-
G'AI'N'1
......... r--
0
2. 0
r--....
0
1.0
1.0
."
10
10k
FIGURE 24 - COMMON·MODE REJECTION RATIO
0
~ 6. 0
~ 4. 0
1.0 k
RL, LOAO RESISTANCE (Il)
FIGURE 23 - OUTPUT VOLTAGE SWING versus FREQUENCY
~
10k
7. 0
'?-
~
1.0 k
FIGURE 22 - OUTPUT VOLTAGE SWING versus
LOAD RESISTANCE
FIGURE 21 - OUTPUT VOLTAGE SWING and
SIN K CURRENT versus SUPPL Y VOLTAGE
o
.;
100
SOURCE RESISTANCE (Il)
~
100
1.0 k
t, FREQUENCY (MHz)
0
30
10 k
100 k
1.0 M
t, FREQUENCY (Hz)
8-455
10M
100 M
~__________O_P_ER_A_T__IO_N_A_L__A_M_P_L_IF_I_E_R_S~
MC1741
MC1741C
INTERNALL V COMPENSATED. HIGH PERFORMANCE
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
... designed for use as a summing amplifier. integrator. or amplifier with
operating characteristics as a function of the external feedback
components.
•
•
•
•
•
•
No Frequency Compensation Required
Short·Circuit Protection
Offset Voltage Null Capability
Wide Common-Mode and Differential Voltage Ranges
Low-Power Consumption
No Latch Up
MAXIMUM RATINGS
(TA
GSUFFIX
METAL PACKAGE
CASE 601
LSUFFIX
= +25 0 C unless otherwise noted I
Symbol
Rating
Power Supply Voltage
V+
V-
Differential I nput Signal
Vin
Value
MC1741C
MC1741
+18
-18
+22
-22
Vdc
Vdc
PLASTIC PACKAGE
CASE 646
Volts
(MC1741C onlyl
±15
ts
Continuous
Power Dissipation (Package Limitation)
Metal Can
Derate above T A = +25 DC
PD
680
4.6
mW
mW/oC
mW
mW/oC
Derate above T A = +25°C
500
3.3
625
5.0
Ceramic Dual In-Line Package
Derate above T A = +2SoC
750
6.0
mW/oC
mW/oC
Oto +75\-55tO+125
°c
°c
= +2SoC
Plastic Dual In-Line Packages
Operating Temperature Range
TA
T stg
Storage Temperature Range
Plastic Packages
For supply voltages less than
to the supply voltage.
Note 2.
Supply voltage equal to or less than 15 V.
TO-91
PI SUFFIX
PLASTIC PACKAGE
CASE 626
(MC1741C onlyl
PIN CONNECTIONS.
±. 15 V, the absolute maximum input voltage is equal
Note 1.
F SUFFIX
CERAMIC PACKAGE
CASE 606
mW
mW/oC
-65 to +150
-55 to +125
Metal. Flat and Ceramic Packages
P2 SUFFIX
Volts
CMVin
Flat Package
Derate above T A
TO·116
±30
Output Short Circuit Duration (Note 21
Common Mode Input Swing (Note 1)
CERAMIC PACKAGE
CASE 632
Unit
Schematic
A
'"G'" & '"PI'" Packages 1
"F'" Package
2
'"P2" & "L" Packages 3
B
2
3
4
C
3
D
4
5
6
4
5
E
5
F G
6 7
6
7 8
9
1011
CIRCUIT SCHEMATIC
r--t-----~--~-----~------~-
>--
~
>--
16
;;:
~ +60
\\
12
:::>
(VOLTAGE FOLLOWER)
6 B.O - I THO<5%
>
~
~
~ +40
o
>
~ +2 0
«>
0
1\
4.0
o
1.0 k
10 k
100 k
10
1.0
1.4 ,---.-,-"rrr"----,--,......,,.,.'AV-=-:-10=0""'01--rI-r-nllrTTT"l
II
r1l11-- JRS _- LR3 Ii ifi+R2
Rl R2
1.21--t--+-+++tH+--I-t-i,...-+bo+'1'+l+
1
1
~ 1.0 t==tf=t~~---~~~~diA~V_=~tl~~~~II~~11
Av=1001
~ O.B _
-
0 .-6 -
~
Rl
-
R2
R3
w
'"
~
0+1.0
>
1-I-H-I+.-'--j,A-+-++++H
_r-
lA~
0·110l::0-.L..6~6I:Id:l:=.0~k=::l:::::::6:::b:....,tHl~0=k::::1-J-1d:±tI:
1og
Ok
.......... l--
~
~
V
6
ffi
-1.0
N
SLOPE CAN BE EITHER POLARITY
::J
«
'"~ -2.0
a:
+25
-25
·55
+50
+75
+100
+125
TA, AMBIENT TEMPERATURE (OC)
RS, SOURCE RESISTANCE (OHMS)
FIGURE 7 - INPUT BIAS CURRENT varsus TEMPERATURE
90
FIGURE 6 - INPUT OFFSET CURRENT versus TEMPERATURE
~ +10
~a:
80
G +-5. 0
--
t;:;
1£o
~
z
.......... V
j
::J
-
~
:>
~~I~I~IHII#II~~II~I~UU--~A~
10 M
>+2.0
.§
I-~~~~===t=~:~,,;~~!t~
0.2
«
I"
1.0 M
FIGURE 5 - INPUT OFFSET VOLTAGE versus TEMPERATURE
>--
0.41---+-L,1-'~
IT""
IrTllTTT
1--.-.-r-HH:J.H""'::....j-+-+-I-+++-H
~ -5.0
""
100 k
o
V" I-
+
10 k
f, FREQUENCY (Hz)
FIGURE 4 - OUTPUT NOISE versus SOURCE RESISTANCE
W
1.0 k
100
f, FREQUENCY (Hz)
t
~
-20
100
10
~_
""
V
/"
~
-
......
~
70
w
a:
a:
60
>-z
:::>
'"
'"
«
;;; 50
...........
...
!: 40
E
SLOPE CAN BE EITHER POLARITY
I'--.
~
>-:::>
30
~
~ -10
-55
""
"- ~
r--. t---
20
-25
+25
+50
+75
+100
-55
+125
-25
+25
+50
+75
TA,AMBIENT TEMPERATURE (OC)
.TA, AMBIENT TEMPERATURE (OC)
8-458
+100
+125
MC1741, MC1741C (continued)
FIGURE 9 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
FIGURE 8 - POWER DISSIPATION
v.rsus POWER SUPPL Y VOLTAGE
8
100
0
3:
50
./
.§. 40
/'
z
!:! 30
"'"
~
/
'"
w
~1 0
~
4. 0
3. 0
2.0
16
>
....
/
~
~ 8.
>
/
18
10
14
v+ and V-, POWER SUPPLY VOLTAGE (VOLTS)
6.0
200
500
T"'--r--
~
~
80
t;
w
~
60
'"'"z
'"~
40
c
i'
"'
'"'-'
~
'"
!,'.
20
10
100
1.0 k
"~~ut
+
9.1 k
1.0 k
10 k
f, FREQUENCY (Hz)
8-459
100 k
1.0M
RL
-=
~
2.0 k
5.0 k
RL, LOAO RESISTANCE (OHMS)
~ 100
o
1.0 kHz
-=
FIGURE 10 - COMMON-MODE REJECTION
RATIO versus FREQUENCY
o
""
f=
TA=250 C -
0
100
22
100 k
o /
olLYOJ.O%J
4.
II
SUjLljS
V
2
:::>
~7. 0
5. 0
V
to
o
±rOTTr
±lrOLI
1I
0
W
V
~C 20
4
.,..
VOUI=O- e -
10 k
MC1741S 'l~
MC1741SC
______~O
__
PE_R_A_T_I_O_N_A_L_A
__
M_P_L_IF_I_ER_S__~
HIGH SLEW-RATE INTERNALLY-COMPENSATED
OPERATIONAL AMPLIFIER
The MC1741S/MC1741SC is functionally equivalent, pin com·
patible, and possesses the same ease of use as the popular MC1741
circuit, yet offers 20 times higher slew rate and power bandwidth.
This device is ideally suited for D·to·A converters due to its fast
settling time and high slew rate.
•
OPERATIONAL AMPLIFI ER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
G SUFFIX
METAL PACKAGE
CASE 60'
High Slew Rate - 10 V/lls Guaranteed Minimum
•
No Frequency Compensation Required
•
Short·Circuit Protection
•
Offset Voltage Null Capability
•
Wide Common-Mode and Differential Voltage Ranges
•
Low Power Consumption
•
No Latch-Up
ITop V,ew)
TYPICAL APPLICATION OF OUTPUT CURRENT TO
VOLTAGE TRANSFORMATION FOR A D·TO-A CONVERTER
Vee = 5.0V
~i
!\~fl~
Vref = 2.0 Vdc
A1=A2 ==1.0kn
RO=5.0kn
13
MSB
A1
1-"'4:o-_~R\II'{V-_~_--'
CASE 626
IMC1741SC Onlyl
v ref
A2
A3
P1 SUFFIX
PLASTIC PACKAGE
OFFSET NULL
15
INVT INPUT
NONINVT INPUT
VEE
A5
'
M
NC
2
7
~
Vee
OUTPUT
I)
OFFSET NULL
(TopV'llw)
A6
A7
LSB AS
Theoretical Va
Vrel
[A' A2 A3 A4 AS A6 A7 AB]
Va = R1 (Ra) 2' +-4' +8 +16 +'32 +64 \28 +256
Pins not shown are not connected.
Settling time to within 1/2 lSB (±19.5 mV) is approxi·
mately 4.0 IlS Irom the time that all bits are switched.
*The value of C may be selected to minimize overshoot
and ringing (e '" 150 pF).
Adjust Vrel, Rlor RO so that Vo with all digital inputs at high level
is equal to 9.961 volts.
2V
['-+-+-+-+-+-+-+-=10V
1 , 1 ,
1 1
1]
[255]
Va=-(5k)
=9961V
1k
2 4 B 16 32 64 128 256
256'
MC1741S LARGE·SIGNAL TRANSIENT RESPONSE
STANDARD MC1741 versus MC1741S RESPONSE COMPARISON
lo.slDIV
See Packaging I nformation Section for outline dimensions.
8-460
MC1741S, MC1741SC (continued)
CIRCUIT SCHEMATIC
Vee
MAXIMUM RATINGS IT A = +250 e unless otherwise noted)
V.lue
Symbol
Rating
Power Supply Voltage
Vee
VEE
Differential I nput Signal Voltage
Common·Mode Input Voltage Swing ISee Note I)
Output Short-Circuit Duration (See Note 2)
Power Dissipation (Package Limitation)
~'
.,j
:Co
Vin
±30
Volts
±15
Volts
ts
Continuous
Po
= +250 e
Plastic Dual In-line Package
Derate above T A = +250 e
Operating Temperature Range
TA
Storage Temperature Range
T stg
f"-
'010
680
4,6
mW
mWfDe
625
5,0
mW
mW/oC
+71F 'J -55 to +125
°c
°c
-65 to +150
-55 to +125
Metal Package
Plastic Package
Note 1.
Note 2,
Vdc
+22
-22
VICR
Metal Package
Derate above T A
Unit
MC1741S
For supply voltages less than ±15 Vdc, the absolute maximum input voltage is equal to the supply voltage.
Supply voltage equal to or less than 15 Vdc,
FIGURE 2 - INPUT BIAS CURRENT versus TEMPERATURE
FIGUR-E 1 - OFFSET ADJUST CIRCUIT
Vee
~
400
>-- 350
z
.......
r--........
u.J
~ 300
..............
B
OUTPUT
INPUTS
~ 150
.........
;;;
~ 200
~
15 0
~
100
'"«
r--....
...............
..........
>
«
.,;
0
0
-75
-50
-15
+25
+50
T, TEMPERATURE (OC)
8-461
+15
+100
+125
MC1741S, MC1741SC (continued)
ELECTRICAL CHARACTERISTICS I
Characteristic
Unit
Power Bandwidth ISee Figure 3)
Av = 1, RL = 2.0 kn, THO = 5%, Vo = 20 Vlp-p)
Slew Rate IFigures 10 and 11)
VI-) to VI+)
VI+)toVH
Settling Time IF igures 10 and 11)
Ito within 0.1%)
kHz
SR
V//ls
10
tsetlg
12
3.0
/lS
IGain = 1, Ein = 20 mY, see Figures 7 and 8)
Rise Time
/lS
Fall Time
/lS
5-
'Tlow = 0 for MC1741SC
= -55 DC for MC1741S
Thigh = +7sDc for MC1741SC
= +125 DC lor MC1741S
**Plastic package offered in limited temperature range device only.
8-462
MC1741S, MC1741SC(eontinued)
(Vec
TYPICAL CHARACTERISTICS
= +15 Vdc, VEE = -15 Vdc, T A = +250 C unless otherwise noted.)
FIGURE 3 - POWER BANDWIDTH - NONDISTORTED
OUTPUT VOLTAGE versus FREQUENCY
5
FIGURE 4 - OPEN·LOOP FREQUENCY RESPONSE
'11 0
+1 0
•
'100
~ +1
c
.... +1 0
:J::
a;
\
v
'"~ +..0
w
'"
~
'"
>
....
~
'"
~
+8 0
;;:
'"
+60
w
..'"
'"
..
0
~
+4
I~
0
-. .0
/
-1 0
•
~ -1 10
-1
100
1.0 k
lOOk
10 k
1.0 M
0
10
1.0
100
~ 1101-++++++Itf--++t+ttttl--H--+1-+ttIt-+-H-++++tJ
~
~
~
~
1.0 M
100 k
>
.5
1\
t\ t- RSAv==100
10 k r----1---1--t-Htttt---t---t--f-t1ftttt--t-t--t-rtttti
'"
0"'- 1'\
1.
w
10 M
~
2. 0
1.
Av = ,1,000
i-"'"
•
....
1.0
!;
..
'"z
>
Z
>
l.1J
I I
•
'">
~
oz
~
c
•
3. 0
~
100 f--+-++++ttIt--!-+++++ttt----1H+t++ttt--t-I-+++t+tJ
0
10 k
1.0 k
FIGUR E 6 - OUTPUT NOISE versus
SOURCE RESISTANCE
3.
'"
~
f. FREaUENCY (Hz)
FIGURE 5 - NOISE versus FREQUENCY
§;
I~
0
f. FREOUENCY (Hz)
w
I~
>
~+2 0
~
'"
~
z
J,.---
AI" 1O~-
-1-""
Av
.--
0
100
1.0 k
10
t-~v
1
10 k
100 k
RS. SOURCE RESISTANCE (OHMS)
FIGURE 7 - SMALL·SIGNAL TRANSIENT
RESPONSE DEFINITIONS
FIGURE 8 - SMALL·SIGNAL TRANSIENT
RESPONSE TEST CIRCUIT
10k
INPUT
+15V
50"
Vee
01.uF
1:
Pirrsnotshownarenotconnecled.
OUTPUT
INPUT
,--
'''''
I
OUTPUT
8-463
10k
RS
50
.,
.
MC1741S
MC1741SC
MC1741S, MC1741SC (continued)
TYPICAL CHARACTERISTICS (continued)
(VCC
= +15 Vdc, VEE = -15 Vdc, TA = +25 0 C unless otherwise noted.)
FIGURE 9 - POWER DISSIPATION versus POWER
SUPPLY VOLTAGES
80
70
!
60
,/
0
./
0
e
V-
V
,/
/'
10
0
5.0
20
15
10
25
Vee and IVEEI,SUPPL Y VOLTAGE (VOLTSI
SETTLING TIM!: MEASUREMENT
In order to accurately measure the settling time of an
operational amplifier, it is suggested that the "false"
summing junction approach be taken as shown, in
Figure 11. This is necessary since it is difficult to determine when the waveform at the output of the operational amplifier settles to within 0.1 % of it's final
value. Because the output and input voltages are effectively subtracted from each other at the amplifier
inverting input, this seems like an ideal node for the
measurement. However, the probe capacitance at this
critical node can greatly affect the accuracy of the
actual measurement.
The solution to these problems is the creation of a
second or "false" summing node. The addition of two
diodes at this node clamps the error voltage to limit the
voltage excursion to the oscilloscope. Because of the
voltage divider effect, only one-half of the actual error
appears at this node. For extremely critical measurements, the capacitance of the diodes and the oscilloscope,
and the settling time of the oscilloscope must be considered. The expression
FIGURE 10 - LARGE·SIGNAL TRANSIENT WAVEFORMS
INPUT
SLEW
(M~~~ji~~~)NTl
PERIOD)
ALLOWABLE
ERROR
BAND
OUTPUT
~~*
__
J10%
FIGURE 11 - SLEW RATE AND SETTLING
TIME TEST CIRCUIT
tsetlg =.j x 2 + y2 + z2
10.·
VCC"I5V
can be used to determine the actual amplifier settling
time, where
tsetlg = observed settling time
x = amplifier settling time (to be determined)
y = false summing junction settling time
z = osci 1I0scope settling ti me
It should be remembered that to settle within ±0.1 %
requires 7RC time constants.
The ±O.l% factor yvas chosen for the MC1741S
settling time as it is compatible with the ±1/2 LSB
accuracy of the MC150BL-B digital-to-analog converter.
This D-to-A converter features ±0.19% maximum error.
.,0Vn
D_
lO ,
>-....,-~-t-(e) OUTPUT
·MII~ht1l !MIllin 0.01%
FALSE
SUMMING
NODE
SETTLING TIME
In order to properly utilize the high slew rate and fast
settling time of an operational amplifier, a number of
system considerations must be observed. Capacitance at
the summing node and at the amplifier output must be
minimal and circuit board layout should be consistent
with common high-frequency considerations. Both power
supply connections should be adequately bypassed as
close as possible to the device pins. In bypassing, both
low and high-frequency components should be considered to avoid the possibility of excessive ringing. In
order to achieve optimum damping, the selection of a
capacitor in parallel with the feedback resistor may be
necessary. A value too small could result in excessive
ringing while a value too large will degrade slew rate and
settling time.
IN916
DREQUIV
Pinl not Ihllw'''1"1! 1101 eonfllCtell.
8-464
MC1741S, MC1741SC (continued)
TYPICAL APPLICATION
FIGURE 12 - WAVEFORM AT FALSE SUMMING NODE
II
,
:::
E:
>
E
'"
'"
N
111-
FIGURE 14 - 12.5-WATT WIDEBAND POWER AMPLIFIER
+15V
;;;
•
.J-- . II
=--.-n
U
g
1.0~S/DIV
..
FIGURE 13 - EXPANDED WAVEFORM AT
F
:::
E:
>
E
!!;!!
1== - IIII
.
1111
:== - -I
r ..
II.i ,. +--==
I
-;;;
,
0.1%
ERROR
BAND
---L
1-.==
1
Dehveu12.5WallslOlo4.DohmSWI!hlesslhan I%THDto 100kHz.
Pins not mown are not tonnected
"Slncurrentad,ustmenttoelimlnateCrossoverDlStofllOn.
··Epoxy 10 power tranSistor heat sink or tilse lor ma~lmum Thermal Feedback.
I
8-465
Rl
MC1747
MC1747C
\
_______O_P_E_R_A_T_I_O_N_A_L_A_M_PL_I_F_IE_R-----J
DUAL MC1741
INTERNALLY COMPENSATED, HIGH PERFORMANCE
MONOLITHIC OPERATIONAl: AMPLIFIER
· .. designed for use as summing amplifiers, integrators, or amplifiers
with operating characteristics as a function of the external feedback
components. The MC1747L and MC1747CL are functionally, elec·
trically, and pin·for·pin equivalent to the IlA747 and IlA747C respec·
tively.
•
No Frequency Compensation Required
•
Short·Circuit Protection
•
Wide Common·Mode and Differential Voltage Ranges
•
Low·Power Consumption
•
No Latch Up
•
Offset Voltage Null Capability
(DUAL MC1741)
DUAL
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
FIGURE 1 - TYPICAL FREQUENCY·SHIFT·
KEYER TONE GENERATOR
---
\./
r\
F SUFFIX
---Ir\f\
r\
J. '/ \1/ \ I
~t
- --
I
r
CERAMIC PACKAGE
CASE 607
-}
~---
G SUFFIX
METAL PACKAGE
CASE 603
- -- --- - -- - --0.5 ms!OIV.
Tlrminelsnot shown are not conllKtad.
Ik
DEVICE
"FlO and "L" Packages
"G" Package
See Packaging Information Section for outline dimensions.
8-466
ITO·100)
MC1747, MC1747C (continued)
MAXIMUM RATINGS ITA
.250 C unless otherwise noted I
Rating
Power Supplv Voltages
Symbol
MCH41
MC1747C
Unit
VCC
+22
+18
Vde
V""
~12
-18
Differential Input Signal Voltage
CD
VID
Common-Mode Input Swing Voltage
K IJI
50
MIHI
OFFSET
NUll
C lEI
0--+-+--"
'--4----~----~----~--~--~----~----------~~_oVEE
o
The letters without parenthesis denote the pin numbers flJr 1/2 of the dual circuit,
1etlersio parenthesis denote the pin numbers for the other half.
10kn H
t..-i'''v·~ VIO ADJUST
PIN CONNECTION CHART
VEE.-"
DEVICE
"F" and "L" Packages
Offset Null is available only in Ceramic
flatanddualin·linepackages.
"G" Package
TYPICAL CHARACTERISTICS
(VCC
= +15 Vdc, VEE = -15 Vdc, TA = +250 C unless otherwise noted.)
FIGURE 4 -OPEN-LOOP VOLTAGE GAIN
versus POWER-SUPPLY VOLTAGE
.,
~
+120
115
+100
z
;( 110
'"w
'"
"'::;
105
..........
0
> 100
V
Q.
0
~
~0
;
FIGURE 5 - OPEN-LOOP FREQUENCY RESPONSE
120
95
--
-
~
'"
+80
z
;(
t.O
w
+60
~
~ +40
~
g
i5
90
.l
+20
85
80
-20
3.0
6.0
9.0
12
15
18
21
24
10
1.0
100
FIGURE 6 - POWER BANDWIDTH
(LARGE SIGNAL SWING versus FREQUENCY)
3' 50
\
\
16
>
'"~
'",;
0
.sz
20
0
....
12
8.0
1.0 M
10 M
70
24
"'::;
"
100 k
100
1:
~
10 k
~
FIGURE 7 - PQWER DISSIPATION
versus POWER SUPPLY VOLTAGE
28
w
1.0 k
""
f, FREOUENCY (Hz)
Vcc and VEE, POWER-5UPPLY VOLTAGE (VOLTS)
'"
l~
I-- t-
4.0
i5
'"~
100
1.0k
10k
Vo
=0
r--
/
10
/
(Each ampl~i.r)
~
~ 7.0
\
o '---l.......J..1,I.J..UJ..,-IIIII--'---'-.IIL..L.J.J..LUII---L....J....Ll.lllL-...L...LLllllLJ
10
v
/'
~ 20
(VOLTAGE FOLLOWER)
± 15 VO LT SUPPLIES ftj---t-H+tfttt---l\+lI-t+-fttj
11111~HD<15%11111
./
~
\
>
40
!:? 30
lOOk
I, FREQUENCY (Hz)
5.0
4.0
3. 0
2.0
/
/
6.0
10
14
18
VCC and VEE, POWER SUPPLY VOLTAGE (VOLTS)
8-468
22
MC1747, MC1747C(eontinued)
TYPICAL CHARACTERISTICS (continued)
(Vec = +15 Vdc, VEE = -15 Vdc, T A = +250 e unless otherwise noted.!
FIGURE 8 - OUTPUT VOLTAGE SWING
versus LOAO RESISTANCE
28
24
~ 20
'"
~
o
J
16
>
.... 12
~
=>
~ 8.0
o
>
4.0
"i
Ij
"1
/
100
V
i
IsTill
t----t----t--H--ttttt---t---t--tlof"Ht1
-tLjL - - R'S =~3 ~
VOL
R2
AV=Rl
V
j
~
Rp R2
111
Av = 100
±lrOLiSUjllIESI
100 k
f=
r
,,(.M
500
1.0k
~
+
""'v
1.0kH,_ 9.lk_
HO <. O%
200
FIGURE 9 - OUTPUT NOISE versus SOURCE RESISTANCE
1.4 r----,----,-TTTTTTr--r-rTTTr::A-v =--:1::::00:::-0~'--rT'l1Tnll"T1
Va
RL=
5.0 k
2.0 k
10k
10 k
RL. LOAD RESISTANCE (OHMSI
RS, SOURCE RESISTANCE (OHMSI
FIGURE 10- HIGH-IMPEOANCE, HIGH-GAIN
INVERTING AMPLIFIER
Vee
Vee
J
lOOk
O.1 J..lF
Terminals nol shown are not connected.
8-469
100 k
___1
'\
OPERATIONAL AMPLIFIERS
\.-----_-----J
MC1748G
MC1748CG
HIGH PERFORMANCE MONOLITHIC
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components.
•
Noncompensated MC1741G
•
Single 30 pF Capacitor Compensation Required For Unity Gain
•
Short·Circuit Protection
•
Offset Voltage Null Capability
•
Wide Common·Mode and Differential Voltage Ranges
•
Low·Power Consumption
•
No Latch Up
MONOLITHIC
SILICON EPITAXIAL
PASSIVATED
METAL PACKAGE
CASE 601
'-$8
(bottom view)
FIGURE 1 - POWER BANDWIDTH
(LARGE SIGNAL SWING .onus F REQUENCYI
FIGURE 2 - OPEN LOOP FREQUENCY RESPONSE
+120
+100
Nr--r~~~--~~~t--r~Ht~--~-H~
l 20r--r~~~--~~~t--r~Ht~~~-H~
~ 16r--r~~~--~~~t--r~Ht~I\1-~-H~
~
~o~
z
"
~ +60
\
TA=+25 0 C
Cc =30pF_
~
>
(VOLTAGE FOLLOWER)
"5VOLTSUPPL1ES
~+20
~
1tt--+-+-++t+ttr--t\:\++++tttJ
J• 80. THD<5%
4.0 t--t-t+lr-+++1m:r Tl'+il!I-tttl
I 1t-++++tIttt--H-'IodtttH
100
l~
'~+4
" 0
12
10
~
iii
:E +8 0
1.0k
10k
0
-2 0
1.0
lOOk
10
f. FREQUENCY (Hz)
loOk
10k
100 k
~
100M
10 M
FIGURE 4 - OFFSET ADJUST AND
FREQUENCY COMPENSATION
25
OUTPUT
50
__
100
I~
f. FREQUENCY (Hz)
FIGURE 3 - CIRCUIT SCHEMATIC
L-~---+----~--~
I~
-
~-+
____ ________
~
v-
~--04
Se. Packaging Information Section for outline dimensions.
See C?urrent MCC1748/1748C data sheet for standard linear chip information.
8-470
MC1748G, MC1748CG (continued)
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted)
Rating
Unit
Power Supply Voltage
V+
;:,.,:,.:~~: .• :;,
+18
V-
~:;':::':':;;:":2ii:,'
-18
Vdc
Vi"
±30
Volts
CMVin
±15
Volts
Output Short Circuit Duration
t8
Continuous
Power Dissipation (Package Limitation)
Po
680
mW
4.6
mW/oC
Differential Input Signal
Common-Mode Input Swing
Derate above T A
CD
= +2SoC
~O_p_er_a_ti_ng~T_em__~_r_a_tu_re__R_a_n~~______________________________~r--T~Ts~At~9--~----6-05-t-Oto-++_7,-55-0--+---~o~C-----i
~
Storage Temperature Range
=
+25 0
DC
c unless otherwise
Characteristics
Input Bias Current
TA
= +250 C
TA = Tlow to Thi
0.08
@
0.5
0.8
Input Offset Current
/tAdc
0.02
TA = +250 C
0.2
0.3
TA=Tlow to
Input Offset Volta~ IRS" 10 k 111
mVdc
1.0 .
TA = +250 C
6.0
7.5
TA=Tlow to
Differential Input Impedance (Open-Loop. f::: 20 Hz)
2.0
Parallel Input Resistance
Parallel Input Capacitance
Open·Loop Volta~ Gain, IVo =± 10 V, RL = 2.0k ohms)
TA = +250 C
TA - Tlow to Thigh
Step Response (Vin = 20 mV, Cc = 30 pF. RL = 2 kl1. CL = 100 pF)
Rise Time
Overshoot Percentage
Slew Rate
Output Voltage Swing (RL
= 10 k ohmsl
RL = 2 k ohms (TA =Tlowto
Power SupplV Sensitivity
VV+
= constant, As S 10k ohms
= constant, '5: 10 k ohms
S+
S-
Power Supply Current
mW
DC Quiescent Power Dissipation
50
IVo = 0)
CD For supply voltages less than ± 15 V, the Maximum I nput Voltage is equal to the Supply Voltage.
aOc for MC1748CG
-SSoC for MC1748G
+7SoC for MC1748CG
+12SoC for MC1748G
8-471
85
•
~f
'\
MC1776G
MC1776CG
OPERATIONAL AMPLIFIERS
"--------
Specifications and Applications InforIllation
MONOLITHIC MICROPOWER
PROGRAMMABLE OPERATIONAL AMPLIFIER
This extremely versatile operational amplifier features low-power
consumption, high input impedance and low input noise levels_ In
addition, the quiescent currents within the device may be programmed by the choice of an external resistor value or current source
applied to the Iset input_ This allows the amplifier's characteristics
to be optimized for input current, power consumption and input
voltage,and current noise despite wide variations in operating power
supply voltages_
PROGRAMMABLE
OPERATIONAL AMPLIFIER
EPITAXIAL PASSIVATED
INTEGRATED CIRCUIT
METAL PACKAGE
•
•
±1.2 V to ±18 V Operation
Wide Programming Range
•
•
•
Low Noise
Offset Null Capability
No Frequency Compensation Required
•
•
Low Input Bias Currents
Short-Circuit Protection
CASE 601
1~
8
RESISTIVE PROGRAMMING (See Figure 1.1
R set to NEGATIVE SUPPLY
Rset to GROUND
PIN CONNECTIONS
(Recommended for supplV voltage
less than ±6,Q V)
'~
0-- -
'~
~1j:.
6
0-
b-l1::,
As~!
VEE
=
Vee - 0.6
Iset"-Rset
±6.0V
±10V
±12V
±15V
I set = 1.5JlA
3.6 Mr!
6.2 Mil
7.5Mn
10Mn
INVERTING
INPUT
NONINVERTING
INPUT
Vee os VEE
VEE
I sel - - - - -
Rset
VEE
Typical R set Values
Typical R set Values
Vee,V EE
6
I set = 15 J.l.A
360 krl
620kr2
750 kn
1.0 M!1
Vee, VEE
Iset-l.5IJ.A
I set -15pA
±1.5V
1.6 Mn
160 kn
±3.0V
3.6 Mn
7.5 Mn
20 M!1
360 kD.
750 kf2
±6.0V
±15 v
2.0 M!1
NANOWATT AMPLIFIER APPLICATION
ACTIVE PROGRAMMING
,---------------------, ,---------------------,
FET CURRENT SOURCE
7
BIPOLAR CURRENT SOURCE
1M
loa k
Vee
>--c>-"'-e Vo
9lk
VB
21M
-=.-
Pins not shown are not connected.
See Packaging Information Section for outline dimensions.
8-472
Po=600nW
MC1776G, MC1776CG (continued)
MAXIMUM RATINGS (TA=+ 2so e
unless otherwise noted.
Rating
Power Supply Voltages
Symbol
Value
Unit
Vee. vEE
±18
Vdc
±30
Vdc
VeC.VEE
±15
Vdc
Vall-VEE
±D.5
Vdc
'set
V set
500
itA
(Vce - 2.0 V)
to
VCC
Vdc
Differential Input Voltage
VID
Common· Mode Input Voltage
Vee and IVEEI
15 V
Vce and IVEEI;;' 15 V
VICM
<
Offset Null to VEE Voltage
Programming Current
Programming Voltage
(Voltage from 'set terminal to ground)
Output Short-Circuit Duration·
ts
Operating Temperature Range
Mel776
MC1776C
Storage Temperature Range
Derate above T A =
s
°c
-55 to +125
o to +70
T stg
Power Dissipation (Package Limitation)
+250
Indefinite
TA
Po
C
-65 to +150
°c
mW
mW/C o
680
4.6
*May be to ground or either Supply Voltage. Rating applies up to a case temperature of +125 0C or ambient temperature
of+750 Cand I set <;;;30/JA.
SCHEMATIC DIAGRAM
lset
r---------------~--------~--~--_.----~------~----------1_-------oVCC
50
INPUTS
100
OUTPUT
6
50
OFFSET NUll
10k
10k
VEE
L-______~~--~------~~~--~----~------~--------~------_o4
MCl776G, MC1776CG (continued)
ELECTRICAL CHARACTERISTICS
Characteristic
Input Offset Voltage IRS"; 10 kil)
TA = +25 0 C
Tlow* ";TA";
*Tlow = -55°C for Mel776
OoC for MC 1776C
Thigh = +1250 C for MCI776
+ 700C for MC 1776C
TRANSIENT -RESPONSE
TEST CIRCUIT
VOLTAGE OFFSET
NULL CIRCUIT
8-474
MC1776G, MC1776CG (continued)
Unit
mV
7.5
nA
2.0
25
25
40
15
I'W
780
1020
1080
1'5
dB
70
86
25
*Tlow ~ -55°C for MCl776
OoC for MC1776C
Thigh ~ +12SoC for MCl776
+70o C for MCl776C
8-475
200
MC1776G, MC1776CG (continued)
ELECTRICAL CHARACTERISTICS
*Tlow
= -55°C for MCl776
O"c
for MCl776C
Thigh
= +1250 C for MCl776
+70"C for MC 1776C
8-476
MC1776G, MC1776CG (continued)
ELECTRICAL CHARACTERISTICS (
Input Offset Voltage (RS <;;10 knl
TA = +250 C
Tlow' <;;TA
2.0
6.0
·7.5
2.0
25
25
40
nA
nA
15
mW
5.7
6.0
V
dB
70
90
PSRR
IlV/V
25
*Tlow
=
-5SoC for MC1776
OOC for MC 1776C
Thigh = +125 0 C for MCl776
+70o C for MCl776C
8-477
200
MC1776G, MC1776CG (continued)
TYPICAL CHARACTERISTICS
(T A'" +2SoC unless otherwise noted.)
FIGURE 2 - POSITIVE STANDBY SUPPLY
CURRENT versus SET CURRENT
FIGURE 1 - SET CURRENT versus SET RESISTOR
100M
"'
~
1000
.
10M
!3
~ 1.0M
~
;l00k
./
100
i:l
~~
/'
10
fo
Vee = +3 V
VEE=-3V
Rse•• o GND
@
=+3V"Vec<.+lsv
--3V;,VEE;>-18V
z
Vee +15 V
VEE - -I 5V
Aset to GNO
Vee = +3 V
VEE -3 V
Rse•• o VEE
'"t;'"
1
...
Vee=+15V
VEE -15 V
Rse•• o VEE
'"
z
«
t;
w 1.0
>
./
;::
in
:;:
10 k
0.1
1.0
10
O. 1
0.01
100
0.1
Ise•• SET CURRENT lIlA}
1.0
10
100
lset. SET CURRENT (pA)
FIGURE 4 - INPUT BIAS CURRENT versus SET CURRENT
FIGURE 3 - OPEN-LOOP GAIN versus SET CURRENT
107
100
Vee = +15 V
VEE = -15 V
RL -75k
~
~
~
10
'"'"::>
VCC +3 V
VEE=-3V
E 1=
E
1=
+3V .. VCC .. +18V
-3 V;>VEE;>-18V
'"~
V
in
~ 1.0
~
!!!
104
0.1
10
1.0
O. I
0.01
100
0.1
FIGURE 5 - INPUT BIAS CURRENT
versus AMBIENT TEMPERATURE
30
1.0
10
100
I,,,. SFI r,URRENT lIlA}
lse •• SET CURRENT lIlA}
FIGURE 6 - GAIN-BANDWIDTH PRODUCT (GBW}
versus SET CURRENT
10M
+~ v .. vlcc .. +lls V
-3V;,VEE;'-ISV
...~
~
~
24
........ r-..
18
g 1.0M
iii
::>
............
::>
'"
~
t;
t---.,.
........
12
r-.... I,,, = 1.51lA
r---...
~
z
~
6.0
-
o
-60
-
I- 'set = 1.51lA
-40
'"'"'"~
..........
z
....... r-
I
-20
::;
~
~
+20
+40
+60
+SO
+100
;::::::
r-
VCC +15 V
VEE--15V
VCC = +3 V
VEE - -3 V
lOOk
10k
;;:
'"
+120 +140
1.0k
0.1
1.0
10
lset. SET CURRENT lIlA}
T. TEMPERATURE (OC)
8-478
100
MC1776G, MC1776CG (continued)
TYPICAL CHARACTERISTICS (continued)
(T A'=' +25 0 C unless otherwise noted.)
FIGURE 8 - SUPPLY CURRENT
FIGURE 7 - OUTPUT VOL TAGE SWING
versus LOAD RESISTANCE
30
illlill
V
V
-
---~
VCC' +15 V
VEE' -15 V
lse' ' 15"A
versus AMBIENT TEMPERATURE
-
15 0
I120
/
VEE'-15V
Iset = 1.SIJ.A
V
lset=
II
/
~!JJ.A
I,., = 1.5"A_ f--- lse' = 1.5"A
Vcc = +3 V
Vcc = +15 V
VEE=-15V- I--VEE = -3 V
llcc'+3V
VEE' -3 V
1.5~" I,.," 15"A
II
I
III
1
II
1\
I
II
lOOk
10k
1.0 k
\
Ise,=15"A- I--VCC,+3V _
I--VEE = -3 V
Vcc = +15 V
VEE,-15V
o
-60
1.0M
-40
i'
I 1
+40
+60
\
-20
+20
+80
+100
+120 +140
T. AMBIENT TEMPERATURE (DC)
Rl, LOAO RESISTANCE (OHMS)
FIGURE 10 - SLEW RATE
versus SET CURRENT
FIGURE 9 - OUTPUT SWING
versus SUPPLY VOLTAGE
10
0
6
~
'"z
~
w
«
'"
2f---
20
>
6
~>-
RL = 75 k
"-
4
~
o
_1.5~"lse,"15~
8
12
=>
". 8.0
o
>
4.0
. /V
/. V
..%: ~ I-lset = 1.5pA
~~
L
o,/
o 2.0
:g
Ise,-15"A
RL=5k -
w
>«
a:
O. 1
~
RL=5k
~.
~
4.0
1.0
?
0.0 1
6.0
8.0
10
12
14
16
18
0.001
0.01
20
V
Vcc - +15 V
VEE=-15V
Vcc = +3 V
VEE--3V
./
TT
0.1
Vcc. IVEEI. SUPPLY VO LTAG ES (V)
1.0
10
100
lset. SET CURRENT ("A)
FIGURE II - INPUT NOISE VOLTAGE
versus SET CURRENT
FIGURE 12 - OPTIMUM SOURCE RESISTANCE
FOR MINIMUM NOISE versus SET CURRENT
10- 13
100
a
~
w
'-'
z
«
0
In
~
f = 1 kHz
t.f = 1 Hz
+3V<;VCC<;+18V
-3 V;> VEE ;>-18 V
5
w
'-'
a:
=>
~
...t
6
1. 0
=>
0
O. 1
10-17
0.01
0.1
1.0
I,.,. SET CURRENT
10
100
0.01
(~)
0.1
1.0
I.". SET CURRENT (PA)
8-479
10
100
MC1776G, MC1776CG (continued)
APPLICATIONS INFORMATION
FIGURE 15 - MULTIPLE FEEDBACK BANDPASS FILTER
FIGURE 13 - WEIN BRIDGE OSCILLATOR
(1.0 kHz)
22 k
RS
~
RI
INPUT
e
OUTPUT
R2
10 k
Vo
2 M
for a 1.0 kHz filter
with Q= 10
and A 1101 = I
-IS V
RI = 160 k
R2 = 820
RS=300k
e = 0.01 ~F
VEE
-ISV
VEE
FIGURE 16 - GATED AMPLIFIER
lo=~
2n
Re
(lor 10 = 1.0 kHzI
R=16k<>
e = 0.01 ~F
>-~>--+--. OUTPUT
INPUT -----~--o--_I
VEE -IS V
FIGURE 14 - MULTIPLE FEEDBACK BANDPASS FILTER
Vee
.-----JV~-----.ISV
2.7M
-=
FIGURE 17 - HIGH INPUT IMPEDANCE AMPLIFIER
for a given:
VEE
SO M
fa = center frequency
A (fa) = Gain at center frequency
Q =quality factor
-=
Choose a value for C. then
SOOk
RS=~
:trtoC
RI
10k
INPUT
90 k
OUTPUT
SOO k
=-.IlL
2A 1101
R2=~
SOM
402 RI·RS
To obtain less than lOCAl error from the operational amplifier:
00 10 <;0.1
GBW
where fa and GBW are expressed in Hz. GBW is available from
Figure 6 as a function of Set Current, Iset.
8-480
30M
VEE
·-ISV
~~________O__PE_R_A_T_'_O_N_A_L_A__M_P_L_'F_'_E_R__~
MC3301P
MONOLITHIC QUAD
OPERATIONAL AMPLIFIER
MONOLITHIC QUAD SINGLE-SUPPLY
OPERATIONAL AMPLIFIER
FOR AUTOMOTIVE APPLICATIONS
INTEGRATED CIRCUIT
EPITAXIAL PASSIVATED
These internally compensated operational amplifiers are designed
specifically for single positive power supply applications found in
automotive and consumer electronics. Each MC3301 P contains four
independent amplifiers - making it ideal for automotive safety, pollution, and comfort controls. Some typical appl ications are tachometer, voltage regulator, logic circuits, power control and other
similar usages.
~
ryrtrr~ ~
PLASTIC PACKAGE
CASE 646
• Wide Operating Temperature Range - -40 to +85 0 C
•
FIGURE 1 - EQUIVALENT CIRCUIT
Single-Supply Operation - +4.0 to +28 Vdc
•
I nternally Compensated
•
Wide Unity Gain Bandwidth - 4.0 MHz typical
•
Low Input Bias Current - 50 nA typical
•
High Open-Loop Gain - 2000 V IV typical
6~8~
AMPL #2
1
5
+
AMPL #3
13
3~11~
AMPL#1
2
+
4
AMPL#4
12
Vee - PIN 14
+
GROUND - PIN 7
FIGURE 2 - SMALL-SIGNAL TRANSIENT RESPONSE
+15V
Vee
510 k
z
o
in
;;
510 k
c
3>
E
:il
1.0M
+15 V
FIGURE 3 - INVERTING AMPLIFIER
FIGURE 4 - NONINVERTING AMPLIFIER
Rf
510 k
Rf
AV=-~
510 k
fordcm
-
70
-
Degrees
Power Supply Rejection (f
Channel Separation (f
= 100 Hz)
= 1.0 kHz)
NOTES:
1. The quiescent current drain will increase approximately 0.3
rnA for each inverting or non inverting input that is grounded.
2. Input bias current can be defined only fQr the inverting input.
The noninverting input is not a true "differential input" - as
with a conventional IC operational amplifier. As such this
PSSR
-
55
-
dB
eo l/ e02
-
65
-
dB
input does not have a requirement for input bias current.
3. Current mirror gain is defined as the current demanded at the
inverting input divided by the current into the non inverting
input.
4. Bandwidth and phase margin are defined with respect to the
voltage gain from the inverting input to the output.
IMC3301-Page 2)
8-482
MC3301P (continued)
TYPICAL CHARACTERISTICS
(Vee
= +15
Vdc, R L
= 5.0 kil, T A = +250 e
[each amplifier) unless otherwise noted.!
FIGURE 5 - OPEN·LOOP VOL TAGE GAIN
FIGURE 6 - QUIESCENT POWER SUPPL Y CURRENT
Vcc
+15 Vdc
...-----+------....._ein
4.0 Vp·p
1.0 kHz
lOOk
IO~F lOOk
-cu- ~1---'V'-1Ir-f--o---l
.:r-O----1....... eout
8.2 k
26 k
All four amplifiers operate in the same
configuration simultaneously.
100; 51 = A 52 =OPEN
eout
Avol=ein
lOG;
VOHI-);
VOll-);
VOll+);
FIGURE 7 - INPUT BIAS CURRENT AND
CURRENT MIRROR GAIN
200 ~A
L
51
51
51
51
=
A
=C
=B
=A
52 =ClOSEO
S2 = ClOSEO
52 = Cl05ED
52 = CLOSED
FIGURE 8 - OUTPUT CURRENT
VCC
+15 Vdc
100 ~A
lOOk
VCC
+15 Vdc
Vo =0.4 Vdc
or 9.0 Vdc
lOOk
10k
52
>--<>--...........
A
liB; 51
AI: SI
=A
=A
=
=
S2
B 52
B
(MC3301-Page 3)
8-483
'sink; 51
=
'source; Sl
=
A
8
MC3301P (continued)
TYPICAL CHARACTERISTICS
(VCC = +15 Vdc. RL = 5.0 kn. TA = +25 0 C
[each amplifier] unless otherwise noted,)
FIGURE 10 - OPEN-LOOP VOL TAGE GAIN
versus SUPPL Y VOL TAG E
FIGURE 9 - OPEN-LOOP VOL TAGE GAIN versus FREQUENCY
0
2500
0
~
z
0
;;:
to
~
0
1500
L
~
o
;;: 1000
o
0
r-
.".., I-"'"
200 0
V
V
/
::z
0
IIII
0
1111111.
1111111
1111111
WillL
WillL
0
100
10k
1.0 k
~
LlllIlh..
1111111
1111111
1111111
500
1111111
1111111
100 k
0
100M
3.0
10M
6.0
9.0
FREQUENCY (Hz)
12
15
18
21
24
27
30
SUPPLY VOLTAGE (V de)
FIGURE 11 - OUTPUT RESISTANCE versus FREQUENCY
FIGURE 12 - SUPPLY CURRENT versus SUPPLY VOLTAGE
I
_VI-"
I---+.01--(PciSlTlvri INPUT~ GRO~
10 k
o
'\
k
.c.±:::::
/"V"
.0
.... ~
/'
100
J
(POSITIV'E INPUTS OPEN)
0
.0
r-...
10O
0.5 k 1.0 k
t"0
5.0k 10k
50 k 100 k
5.0M
500k 100M
3.0
6.0
FIGURE 13 - LINEAR SOURCE CURRENT versus
SUPPLY VOLTAGE
16
21
24
27
30
FIGURE 14 - LINEAR SINK CURRENT versus
SUPPLY VOLTAGE
16
800
!
I'
I-
z
::!
15
1000
0
~
12
SUPPLY VOLTAGE (Vde)
FREQUENCY
..s"
9.0
12
I-""
'"<.>=>
..;'" V
w
~ 8.0
V
=>
51
----
V
~
'"
VOH
60 0
/
"
VOL = 0.4 Vde
a'"
.""z
=0.4 Vd,
;;;
4. 0
40 0
200
0
3.0
6.0
9.0
12
15
16
21
24
27
30
3.0
6.0
9.0
12
15
18
SUPPLY VOLTAGE (Vde)
SUPPLY VQLTAGE (Vd,)
(MC3301-Page 4)
8-484
21
24
27
30
MC3301P (continued)
OPERATION AND APPLICATIONS
Basic Amplifier
linear operation at the output. The sink current of the device can
be forced to exceed the specified level by keeping the output de
voltage above:::::::: 1.0 volt resulting in an increase in the distortion
The basic ampl ifier is the common emitter stage shown in Figures
15 and 16. The active load '1 is buffered from the input transistor
by a PNP transistor, Q4, and from the output by an NPN transistor,
Q2. Q2 is biased class A by the current source '2. The magnitude
of '2 (specified 'sink) is a limiting factor in capacitively coupled
appearing at the output. Closed loop stability is maintained by an
on-the-chip 3-pF capacitor shown in Figure 18 on the following
page. No external compensation is required.
FIGURE 15
BLOCK DIAGRAM
G7N~
Multipleemitter(8Itranslstor-oneemitterconnectedtoaachinput
current gain of 03 ~ 1, 'its collector current is approximately equal
to Ir also. In operation this current flows through an external
feedback resistor which generates the output voltage signal. For
inverting applications, the non inverting input is often used to set
the de quiescent level at the output. Techniques for doing this are
discussed in the "NOrmal Design Procedure" section.
A noninverting input is obtained by adding a current mirror as
shown in Figure 17. Essentially all current which enters the noninverting input. I r • flows through the diode CRI. The voltage
drop across CRl corresponds to this input current magnitude and
this same voltage is applied to a matched device, 03. Thus 03 is
biased to conduct an emitter current equal to I r . -Since the alpha
FIGURE 17 - OBTAINING A NONINVERTING INPUT
FIGURE 16 - A BASIC GAIN STAGE
OUTPUT
H
-
INPUTS
1+lo--.....---f
Ir
Biasing Circuitry
The circuitry common to all four amplifiers is shown in Figure 19,
see next page. The purpose of this circuitry is to provide biasing
voltage for the PNP and NPN current sources used in the amplifiers.
06. Transistor Q7 reduces base current loading. The voltage
across resistor R2 is the sum of the voltage drops across CR2. CR3
and CR4. minus the VBE drops of transistor Q9 and diode CR5.
The current thus set is established by CR5 in ali the NPN current
sources (Q1 0, etc.). This technique results in current source magnitudes which are relatively independent of the supply voltage. Q11
(Figure 15) provides circuit protection from Signals that are negative
with respect to ground.
The voltage drops across diodes CR2. CR3 and CR4 are used as
references. The voltage across resistor R 1 is the sum of the drops
across CR4 and CR3 minus the VBE of Q8. The PNP current
sources IQ5. etc.1 are set to the magnitude VBE/RI by transistor
(MC3301-Page 51
8-485
CRI
MC3301P (continued)
OPERATION AND APPLICATIONS (continued)
FIGURE 18 - A BASIC OPERATIONAL AMPLIFIER
FIGURE 19 - BIASING CIRCUITRY
10 k
1-1
OUTPUT
INPUTS
CR2
1+)
CR3
CRI
CR4
....
':'
.".
.".
.".
NORMAL DESIGN PROCEDURE
1. Output O-Point Biasing
C. Reference Voltage other than Vce Isee Figure 20)
A. A number of techniques may be devised to bias the quiescent
The biasing resistor Rr may be returned to a voltage (V r )
other than VCC. By setting Rf ; R r • Istill keeping Ir between 10 /lA and 200 /lA) the output de level will be equal
to V r . The expression for determining VOde is:
output voltage to an acceptable level. However, in terms of
loop gain considerations it is usually desirable to use the
non inverting input to effect the biasing as shown in Figures
3 and 4 (see the first page of this specification). The high
impedance of the collector of the non inverting "current
mirror" transistor helps to achieve the maximum loop gain
for any particular configuration. It is desirable that the noninverting input current be in the 10 IJA to 200 ~A range.
V
M
The noninverting input is normally returned to the Vee
voltage (which should be well filtered) through a resistor.
R r , allowing the input current, If. to be within the range of
10 /lA to 200 /lA. Choosing the feedback resislor. Rf. to be
equal to % R r will now bias the ampl ifier output de I evel to
V~C.
2. Gain Determination
A. Inverting Amplifier
The amplifier is normally used in the inverting mode. The
input may be eapacitively coupled to avoid upsetting the
dc bias and the output is normally capacitively coupled to
eliminate the dc voltage across the load. Note that when
the output is capacitively coupled to the load, the value of
This allows the maximum dynamic
range of the output voltage.
FIGURE 20 - INVERTING AMPLIFIER WITH
ARBITRARY REFERENCE
FIGURE 21 - INVERTING AMPLIFIER WITH
Ay = 100 AND Vr = Vee
510 k
Rf
C·
Vin
O.IIlF
Rj
~I-""''''''---0-""-" Va
t
R,
1M
I,
v,
+
where tI> is the VRF drop of the input transistors (approxi
mately 0.6 Vdc @ +250 C and assumed equal). A I is the
current mirror gain.
B. VCC Reference Voltage (see Figures 3 and 4)
approximately
_ IAI)IVr)(Rf)
Ode - - - R - , - -
·Select for low
fr&quency response.
Av: 100
IMC3301-Page 6)
8·486
+15 V
O.lIlF
T'"
fL' 300 Hz, fH : 50 ktlz
MC3301P (continued)
NORMAL DESIGN PROCEDURElcontinuedl
Isink becomes a limitation with respect to the load driving
capabilities of the device. The limitation is less severe if the
device is direct coupled. In this configuration, the ae gain
is determined by the ratio of Rf to Ri, in the same manner
as for a conventional operational amplifier;
B. Noninverting Amplifier
The MC3301 P may be used in the noninverting mode {see
Figure 4, first pagel. The amplifier gain in this configuration
is subject to the current mirror gain. In addition, the resistance of the input diode must be included in the value of
..
A
v
the input resistor. ThiS resistance
=- ~
Ri
.
IS
.
approximately
26
J;.- ohms,
where 'r is input current in milliamperes. The noninverting
ac gain expression is given by:
The lower corner frequency is determined by the coupling
capacitors to the input and load resistors. The upper corner
frequency will usually be determined by the ampl ifier internal compensation. The amplifier unity gain bandwidth
is typically 4.0 MHz and with the gain roll-off at 20 dB per
decade, bandwidth will typically be 400 kHz with 20 dB of
closed loop gain or 40 kHz with 40 dB of closed loop gain.
The exception to this occurs at low gains where the input
resistor selected is large. The pole formed by the amplifier
input capacitance, stray capacitance and the input resistor
may occur before the closed loop gain intercepts the open
loop response curve. The inverting input capacity is typi-
The bandwidth of the noninverting configuration for a given
Rf value is essentially independent of the gain chosen. For
Rf = 510 kn the bandwidth will be in excess of 200 kHz
for noninverting gains of 1, 10, or 100. This is a result of
the loop gain remaining constant for these gains since the
input resistor is effectively isolated from the feedback loop.
cally 3.0 pF.
TYPICA L APPLICATIONS
FIGURE 22 - TACHOMETER CIRCUIT
Vee
0
+12 V
OUTPUT
VH
0
AIR2
RI
Vp·p" IVO·O.6) • AI • t
Timing.lnterval: t "'" 0.7 Rl C1
Hystensis Voltage for Switching
----Ryel
(Vee - 1.6)
FIGURE 23 - VOLTAGE REGUL·ATOR
ZI
R2
FIGURE 24 - LOGIC "OR" GATE
+Vcc
+Vee
0
150 k
+15 Vdc e---'VVV---o-..,
75 k
75 k
01
RI
75k
NOTE:
For positive TC zeners R2 and Rl can be
selected to give 0 TC output.
(MC3301-Page 7)
8-487
t=A+B+C
Me3301 P (continued)
TYPICA L APPLICATIONS (continued)
FIGURE 25 - LOGIC "NAND" GATE (Large Fan-In)
FIGURE 26 - LOGIC "NOR" GATE
+Vec: +15 Vdc
A --+11----.
75 k
75 k
150 k
75 k
+Vec
150 k
f = A • 8 • C • 0 • E •••
f:A+8+C+O
=+15 Vdc
+Vcc
FIGURE 27 - R-S FLIP-FLOP
FIGURE 28 - ASTABLE MUL TlVIBRATOR
Vce:+15V
Vcc
Vec
100 k
100 k
51 k
r-O--__ Q
l!o-e--o-<
r-o----+--eVQ
RESET SET
FIGURE 29 - POSITIVE-EDGE DIFFERENTIATOR
FIGURE 30 - NEGATIVE-EDGE DIFFERENTIATOR
0_001
Output Rise Time"'" 0.22 ms
tllput Change Time Constant"'" 1.0 ms
~F
O.OOlI'F
100 k
lOOk
6Vin
r
l
>--o-_-evQ
0.0021'F
51 k
~~-'\III'v-~
>--o-.....-.Vo
150 k
VO(dc)~7.0Vdc
Vee
(MC3301-Page 8)
8-488
=+15 Vdc
Output Rise Time"'" 0.22 ms
Input Change Time Constant It:: 1.0 ms
~~______________Q_U_A_D__C_O_M_P_A_R_A_T_O_R__~
MC3302P
MONOLITHIC QUAD SINGLE·SUPPL V
COMPARATOR
MONOLITHIC QUAD
COMPARATOR
INTEGRATED CIRCUIT
These comparators are designed specifically for single posItIve·
power·supply Consumer Automotive and Industrial electronic applications. Each MC3302P contains four independent comparatorssuiting it ideally for usages requiring high density and low·cost.
EPITAXIAL PASSIVATED
• Wide Operating Temperature Range - -40 to +85 0 C
• Single·Supply Operation - +2.0 to +28 Vdc
•
Differential Input Voltage = ±VCC
• Compare Voltages at Ground Potential
•
MTTL Compatible
•
Low Current Drain - 700llA typical
@
VCC +5.0 to +28 Vdc
(top view)
• Outputs can be Connected to Give the Implied AND Function
PLASTIC PACKAGE
CASE 646
MAXIMUM RATINGS IT A
= +25 0 C unless
olherwise noted'!
Symbol
Value
Unit
VCC
+2.0 to +28
Vdc
10
20
rnA
FIGURE 1 - EQUIVALENT CIRCUIT
Differential Input Voltage
VI DR
±VCC
Vdc
Common·Mode Input Voltage Range (See Note 2)
VICR
-0.3 to +VCC
Vdc
Po
625
5.0
mW
mWroC
6~10~
TA
-40 to +85
T stg
-65 to +150
°c
°c
Rating
Power Supply Range
Output Sink Current (See Note 1)
Power Dissipation (Package Limitation)
Derate above T A = +25 0 C
Operating Temperature Range
~.
Storage Temperature Range
Note 1.
Requires an external resistor, AL. to limit current below maximum rating.
Note 2.
If either (+) or (-) inputs of any comparator go more than several tenths of a volt
belovv ground, a parasitic transistor turns "on" causing high input current and pas·
eO~PTR
7
eO~PTR
I
11
+
4~ 8~
eOMPTR
5
+ 2
eO~TR
2
9
Vee - PIN J
sible faulty outpuu.
FIGURE 2 - CIRCUIT SCHEMATIC
lo·H~~~~:i5
11+
8-
9+
INPUTS
5+
4·:t==E=E===t====~l--I---l
6·
1+0-+--+--++-[
See Packaging Information Section for outline dimensions.
8-489
IJ
+
+
GROUND - PIN 12
14
MC3302P (continued)
ELECTRICAL CHARACTERISTICS (VCC = +15 Vde, TA = +250 C (eaeheomparator) unless otherwise noted.)
ChIi,act. istic· Definitions
(1/4 Circuit Shown)
-
\
Vee
II
'"
,
Vrel
RL
I
Vo
110
';'~1
tIB:!Lr2
\110: !Vrel·Vml
,
Symbol
Input Offset Voltage (Vref = 1.2 Vde)
(TA = +250 C)
(TA = -40 to +850 C)
VIO
Input Offset Current
110
Input Bias Current
(TA = +250 C)
(T A = -40 to +850 C)
liB
Min
Typ
MIx
Unit
mVde
-
3.0
20
-
40
-
3.0
-
nAdc
[lIB1·IIB21
x
'1
,-
Char.ctwistic
"
Vee
Avol=lin
RL
nAdc
-
30
-
1000
2,000
30,000
-
500
VN
Voltage Gain
(TA = +250 C, RL = 15 kn)
Avol
Transconductance
gm
-
2.0
-
VIDR
±VCC
-
-
I
"
0,.
L~.
'1"
~
Differential Input Voltage Range
,
t
Vee
RL
1
V,.
loff
-2.
Vo
Output Leekage Current
(Output Voltage High)
VOL
r.,t"
Output Sink Current
(VCC = +5.0 Vde)
(TA = +250 C, VOL = 400 mV)
(TA = -40 to +850 C, VOL =
800mV)
Is
,
1
~v,.
1.0
150
400
mAde
-
6.0
2.0
-
-
0·26
-
-
-
60
-
-
2.0
-
-
200
-
Vee
RL
1
,I.
-:
"
'-
Input Common·Mode Range
(Vcc = +28 Vdc)
Common-Mode Rejection Ratio
~
I
-
mVde
-
7.
1
Propagation Delay Time
RL
eo
lin
Volts
VICR
CMRR
dB
/.I.
tPHLlLH
For Positive and Negative·Going
Input Pulse
Vdc
"Ade
loff
Nagative Output Voltage
(Is = 2.0 mA, VCC = +5.0 to +28 Vde)
mho.
,~
7 ••
-:.".
-:
"
IPLHi
+300mv~
Slew Rate (R L = 15 kn)
tSRtSR+
50
VI".
-
-300mV eln
\lin
, . . .n°
,
J,
[V1
Vee
RL
I
Power Supply Current (Total of four
mAde
ID
comparators)
(Is = 0, VCC = +5.0 to +2B Vde)
'2
8-490
-
0.7
1.5
MC3302P (continued)
TYPICAL CHARACTERISTICS
(VCC
= +15 Vdc. TA = +250 C (each comparator) unless otherwise noted.)
FIGURE 4 - OFFSET BIAS CURRENT
FIGURE 3 - INPUT OFFSET VOLTAGE
2.20
1.40
w
«
'"
1.20
0
>
~
1.00
0
ffi
N
-
....
ffi
........
!:;
~ I--""
O.BO
~
........
........ f-
'"
..........
'-'
~
o
ffi
N
::;
:J
«
:&
1.80
a:
a:
..........
1.40
........
......
..........
1.00
:&
0
or
o
z
z 0.60
0.40
-40
-20
+20
+40
+60
Slope can be either polarity.
0.60
0.20
-40
+100
+80
-
..........
«
Slope can be either polaritV.
a:
-20
TA. AMBIENT TEMPERATURE (DC)
+20
+40
+60
+80
+100
TA.AMBIENTTEMPERATURE (DC)
FIGURE 5 -INPUT BIAS CURRENT
0
T1 = JaOC
!....
48
a:
36
15
a:
'"'-'
....
24
~
;::
~
,- l- f -
-
-I-- I -
TA=+25 0 C
-
~
iii
b--- I-
l
TA =+85 0 C
12
o
o
4.0
8.0
12
16
20
24
2B
VCC (Vd,)
TYPICAL APPLICATIONS
FIGURE 6 - FREE-RUNNING SQUARE-WAVE OSCILLATOR
FIGURE 7 - TIME DELAY GENERATOR
Vce
lMO
RL
Vee
Vee
--t_
15 k
Vce
>-<>--......-.Vo
51 k
51 k
vee
51k
Vo
lue
°
.. I.,JI I
,:..j...::!..jl-hh
H
Vo
_LLJ
0 - - 1 -1
Vc
I
,
: I'
lL
II
II
-~Y-'=l-----~Y-
G~f L-Y
'0 I -1"~
_. __
__t _
8-491
MC3302P (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 9 - THE COMPARATOR AS AN
OPERATIONAL AMPLIFIER
FIGURE 8 - COMPARATOR WITH HYSTERESIS
Vee
Vee
Rs
RL
15 k
RS
Va
Vin
-=
----""'Iy------'
V,ef .--Wlr-.....
RI
R2
R2
RS=R1I1R2
-=
V -V +(Vee- V,.fI R1
th1- ,ef R1+ R2+ RL
Vth2=V,ef-
(V,.f - Vo Lowl R1
R1+R2+RL
I
R1
RS = R111 R2
!
r
---Vjn_
-Input common-mode voltage range includes ground (0 Vdc)
and Vo can go to approximately 0 Vdc.
8·492
1""
~_________O_P_E_R_A_T_IO__N_A_L_A_M_P_L_IF_I_E_R_S~
MC3401P
MONOLITHIC QUAD
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
Specifications and Applications
InforIDation
EPITAXIAL PASSIVATED
MONOLITHIC QUAD SINGLE-SUPPL V
OPERATIONAL AMPLIFIER
_
~rjjrn
These internally compensated operational amplifiers are designed specifically for single positive power supply applications
found in industrial control systems and automotive electronics.
Each MC3401 P device contains four independent amplifiers making it ideal for applications such as active filters, multi-channel
amplifiers, tachometer, oscillator and other similar usages.
•
Internally Compensated
•
Wide Unity Gain Bandwidth - 5.0 MHz typical
Low I nput Bias Current - 50 nA typical
•
High Open-Loop Gain - 1000 V/V minimum
CASE 646
6~8~
9
3~11~
10
AMPL*2·
•
PLASTIC PACKAGE
FIGURE 1 - EQUIVALENT CIRCUIT
Single-Supply Operation - +5.0 Vdc to +18 Vdc
•
I
5
+
1
AM9L II
+
2
Vee - pin 14
AMPL,3
13
4
+
AMP1I4
12
+
Ground - pin 7
FIGURE 2 - SMALL·SIGNAL TRANSIENT RESPONSE
510 k
510 k
>-o-t-,.....eVO
5.1 k
1.0 M
5.0 ~S/DIVISION
FIGURE 3 - INVERTING AMPLIFIER
FIGURE 4 - NONINVERTING AMPLIFIER
RI
510 k
HI
510 k
AV= _ _R",I,..- ",I'
26
Ri+-Jr-{mA-)
BW = 250 kHz
Ri
O.IIJ.F 510 k
Yin "~I--'\IIIV-....o--l
1M
+15 V
AV=IO
BW=150kHz
See Packaging Information Section for outline dimensions.
8-493
;.O~VO
110k
MC3401 P (continued)
MAXIMUM RATINGS ITA ~ +25 0 C unless otherwise noted.)
Rating
Symbol
Value
Unit
Vee
+18
Vdc
Non-inverting Input Current
lin
5.0
mA
Power 0 issipation
Po
625
5.0
mW
mW/oC
TA
o to +75
°e
Tstg
-65 to +150
°e
Power Supply Voltage
Derate above T A
=
+25 DC
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS [Vee ~ +15 Vdc RL
Characteristic
Open-Loop Voltage Gain
TA = +25 0 e
oOe";:; TA";:; +75 0 e
=
5 0 kn TA
=
+25 0 e leach amplifier) unless otherwise noted]
Fig. No.
Note
5,9,10
1
Symbol
Min
Typ
Max
Unit
V/V
Avol
-
1000
800
2000
-
-
6.9
7.8
10
14
-
50
-
300
500
10
1.0
-
'sink
5.0
0.5
VOH
VOL
VO[p-p)
13.5
10
14.2
0.03
13.5
0.1
-
Rin
0.1
1.0
-
Slew Rate ICL ~ 100 pF, RL = 5.0 kl
SR
-
0.6
-
Unity Gain Bandwidth
BW
-
5.0
-
MHz
Phase Margin
----ilVo
-
~-o--------~'-----ilVO
Isource
100 is total supply current with "+" input open.
lOG is total supply current with "+" input grounded.
6Vin
6VO
Rin=- Avol=-611B
.0.Vin
Amplifier must be biased (by Vin) in the
linear operating region.
FIGURE 7 - OUTPUT VOLTAGE SWING
FIGURE 8 - PEAK-TO-PEAK OUTPUT VOL TAGE
Rt
510 k
10 k
+1.0 Vde
1
-=
>o-----.-----......... Vo
Ri
Vin........,I----_'V'v---<~o-__t
ei
~:>--+--e Vo
RLo5.0k
-=
Rr
Rt 1M
VOde" Vee
Vo l measured with" _" input biased up as shown.
VOH measured with "_" input grounded.
R;
Vee+15V
~ Vee
-
2
for Ar
8-495
'20'
2Rf
MC3401 P
(continued)
TYPICAL CHARACTERISTICS
(Vcc " +15 Vdc, RL " 5.0 k!1, T A" +25 0 C
[each amplifier] unless otherwise noted.)
FIGURE 10 - OPEN-LOOP VOLTAGE GAIN
versus SUPPLY VOL TAGE
FIGURE 9 - OPEN-LOOP VOL TAGE GAIN versus FREQUENCY
0
~
250 0
:;
60
~ 2000
2:
;ji
50
~
;;'
"'w
w
"'~
~ 1500
40
~
o
>
o
>
~ 30
~
o
0
J
10
./"
~
~
o
,/
/'"
.,100 0
50 0
"0
-l
o
1.0 k
100
10 k
100 k
1.0 M
o
o
10 M
2.0
4.0
6.0
8.0
10
14
12
f, FREQUENCY (Hz)
FIGURE 11 - OUTPUT RESISTANCE versus FREQUENCY
10
t------
lOG (PositivE! inputs grounded)
'"
r--
.s
8.0
\
t--
1"-
I
18
20
FIGURE 12 - SUPPLY CURRENT versus SUPPLY VOLTAGE
10 k
k
16
VCC, SUPPLY VOLTAGE (Vdc)
~
I
.-V
6.0
=>
'-'
~
4.0
o
2.0
---
...-V
I--""
I---"
r-\
-I..-
\
100 (Positive inputs open)
&;
~
100
0.5 k 1.0 k
5.0 k 10k
o
I'--
50kl00k
500k1.0M
o
o
5.0 M
2.0
4.0
FIGURE 13 - LINEAR SOURCE CURRENT versus
SUPPL Y VOL TAGE
14
16
18
/
1.2
10
I---
t--
-
8.0
=>
'-'
20
/
--r-------
0.6
I--
'"
2:
::>
~ 4.0
./
/'"
c;; 0.4
~
:E
O. 2
~
~ 2.0
o
12
FIGURE 14 - LINEAR SINK CURRENT versus
SUPPLY VOLTAGE
12
~
10
1.4
14
~
8.0
VCC, SUPPLY VOLTAGE (Vdc)
f, FREQUENCY
.s
6.0
o
2.0
4.0
6.0
8.0
10
12
14
16
o
18
o
20
2.0
4.0
6.0
8.0
10
12
14
Vec, SUPPLY VOLTAGE (Vdc)
VCC, SUPPLY VOLTAGE (Vdc)
8-496
16
18
20
MC3401 P (continued)
OPERATION AND APPLICATIONS
Basic Ampl ifier
The basic amplifier is the common emitter stage shown in Figures
15 and 16. The active load '1 is buffered from the input transistor
by a PNP transistor, Q4, and from the output by an NPN transistor,
02. Q2 is biased class A by the current source '2. The magnitude
of '2 (specified 'sink) is a limiting factor in capacitively coupled
linear operation at the output. The sink current of the device can
be forced to exceed the specified level with an increase in the
distortion appearing at the output. Closed loop stability is maintained by an on-the-chip 3-pF capacitor shown in Figure 18. No
external compensation is required.
FIGURE 15
BLOCK DIAGRAM
Vec~--------~------+-------~------~~~~~~~~~~------~--------~------,
14 I
I
10
Vec
14
I
I
I
I
10k
I
I
I
I
I
I
CR2
Q8
I
CR3
I
CR4
~-=--
-----::-
12
13
7 <>--:L
GND ~
A noninverting input is obtained by adding a current mirror as
shown in Figure 17. Essentially all current which enters the ooninverting input, 'in2, flows through the diode CR1. The voltage
drop across CR 1 corresponds to this input current magnitude and
alpha current gain of" 03 ::::::: 1, its collector current::::::: lin2 also.
In operation this current flows through an external feedback resistor which generates the output voltage signal. For inverting applications, the noninverting input is often used to set the de quiescent
this same voltage is appl ied to a matched device, 03. Thus 03 is
level at the output. Techniques for doing this are discussed in the
biased to conduct an emitter current equal to I in2.
"Normal Design Procedure" section.
Since the
FIGURE 17 - OBTAINING A NON INVERTING INPUT
FIGURE 16 - A BASIC GAIN STAGE
OUTPUT
1-)
-
INPUTS
1+) 0----<,....---[
lin2
CRI
Biasing Circuitry
The circuitry common to all four amplifiers is shown in Figure 19.
06.
The purpose of this circuitry is to provide biasing voltage for the
across resistor R2 is the sum of the voltage drops across CR2, CR3
PNP and NPN current sources used in the amplifiers.
and CR4, minus the VBE drops of transistor 09 and diode CR5.
The current thus set is established by CR5 in all the NPN current
sources f010, etc.). This technique results in current source magni-
The voltage drops across diodes CR2, CR3 and CR4 are used as
references. The voltage across resistor R 1 is the sum of the drops
across CR4 and CR3 minus the VSE of 08. The PNP current
sources (05, etc.) are set to the magnitude VBE/R 1 by transistor
Transistor Q7 reduces base current loading.
The voltage
tudes which are relatively independent of the supply voltage.
8-497
MC3401 P (continued)
OPERATION AND APPLICATIONS
(continued)
FIGURE 18 - A BASIC OPERATIONAL AMPLIFIER
FIGURE 19 - BIASING CIRCUITRY
10k
1-1
'----+----0 OUTPUT
CR2
INPUTS
(+1
CR3
CRl
CR4
NORMAL DESIGN PROCEDURE
other than Vee. By setting Rf "" Rr , (still keeping I r between
5 J.1.A and 100 J.1.A) the output dc level will be equal to V r .
Neglecting error terms, the expression for determining VOdc
is:
1. Output Q-Point Biasing
A. A number of techniques may be devised to bias the quiescent
output voltage to an acceptable level. However, in terms of
loop gain considerations it is usually desirable to use the
noninverting input to effect the biasing as shown in Figures
3 and 4. The high impedance of the collector of the noninverting "current mirror" transistor helps to achieve the
maximum loop gain for any. particular configuration. It is
desirable that the noninverting input current be in the 5 jJ.A
VOdc =
where 1> is the VBE drop of the input transistors (approximately 0.7 Vdc @ +25 0 C).
to 100 JJ.A range.
B. VCC Reference Voltage (see Figures 3 and 41
The error terms not" appearing in the above equation can
cause the dc operating point to vary up to 20% from the
expected value. Error terms are minimized by setting the
input current within the range of 5 J.1.A to 100 J.1.A.
The non inverting input is normally returned to the Vee
voltage (which should be well filtered) through a resistor,
R r , allowing the input current, Ir , to be within the range of
5 IJ.A to 100 IJ.A. Choosing the feedback .resistor, Rf, to be
equal to ~ Rr will now bias the amplifier output dc.level to
.
VCC
approximately -2-' This allows for maximum dynamic
2. Gain Determination
A. Inverting Ampl ifier
The amplifier is normally used in the inverting mode. The
input may be capacitively coupled to avoid upsetting the
dc/bias and the output is normally capacitively coupled to
eliminate the de voltage across the load. Note that when
the output is capacitively coupled to the load, the value of
range of the output voltage.
C. Reference Voltage other than Vee (See Figure 201.
The biasing resistor Rr may be returned to a voltage (V r )
FIGURE 20 - INVERTING AMPLIFIER WITH
ARBITRARY REFERENCE
FIGURE 21 - INVERTING AMPLIFIER WITH
Av = 100 AND Vr = VCC
510 k
RI
C'
Vin
O.ljJ.F
Ri
~I-'VII..,.....+---o----!
Vin
5.1 k
~1--'VI1Ir-"""-C>---I
>-0-----"" Va
t
R,
I,
v,
VOc~
Rr
+
*Select for low
(1-!!tI~
Av
=
100
frequency response.
Rr
8-498
+15 V
fL = 300 Hz, fH = 50 kHz
MC3401 P (continued)
NORMAL DESIGN PROCEDURE (continued)
B. Noninverting Amplifier
'sink becomes a limitation with respect to the load driving
capabilities of the device. The limitation is less severe if the
Although recommended as an inverting ampJjfier, the
device is direct coupled. In this configuration, the ae gain
is determined by the ratio of Rt to R j. in the same manner
as for a conventional operational amplifier:
Me
3401P may be used in the noninverting mode (see Figure 4).
The amplifier gain in this configuration is subject to the
same error terms that affect the output
point biasing so
the gain may deviate as much as ±.20% from that expected.
In addition, the resistance of the input diode must be included in the value of the input resistor. This resistance is
a
Rf
Ay=- -
Ri
26
approximately - ohms, where Ir is input current in mill iIr
amperes. The noninverting gain expression is given by:
The lower corner frequency is determined by the coupling
capacitors to the input and load resistors. The upper corner
frequency will usually be determined by the amplifier internal compensation. The amplifier unity gain bandwidth
is typically 5.0 MHz and with the gain roll·off at 20 dB per
decade, bandwidth will typically be 500 kHz with 20 dB of
closed loop gain or 50 kHz with 40 dB of closed loop gain.
A
v
=
±20%.
26
Ri+ Ir (rnA)
The bandwidth of the noninverting configuration for a given
Rf value is essentially independent of the gain chosen. For
Rf = 510 kn the bandwidth will be in excess of 200 kHz
for noninverting gains of 1, 10, or 100. This is a result of
the loop gain remaining constant for these gains since the
input resistor is effectively isolated from the feedback loop.
The exception to this occurs at low gains where the input
resistor selected is large. The pole formed by the amplifier
input capacitance, stray capacitance and the input resistor
may occur before the closed loop gain intercepts the open
loop response curve. The inverting input capacity is typically 3.0 pF.
TYPICAL APPLICATIONS
FIGURE 22 - AMPLIFIER AND DRIVER FOR A 50·0HM LINE
510 k
+15 V
51 k
Vin
--1i-"""'_......-o-----l
0.1
~F
10
10
1.2 M
20 ~F
+Tva
2N4403
!Iv = 10
Va = 6 V(p·pl
5.6 k
50
or equlv
+15 V
FIGURE 23 - BASIC BANDPASS AND NOTCH FILTER
390 k
TBP = Center Frequency Gain
TN = Passband Notch Gain
I
RI
R2
wa=iiC
~TCH
Rl = QR
RI
R2=TBP
R3=TN R2
8-499
MC3401 P (continued)
TYPICAL APPLICATIONS
(continued)
FIGURE 24 - BANDPASS AND NOTCH FILTER
62 k
0.005 ~F
0.0051'F
100 k
300 k
100 k
62 k
300 k
120 k
lOOk
Vcc
T
Vcc
lOOk
Vec
(Pin 14): +12 Volts
Ground - pin 7
11
O.1 I'F
10
> - ( 1 - -.....-
lOOk
Vce
Vin
VCC
lOOk
lOOk
Center Frequency 500 Hz
U:5
Bandpass Gain = 1
.... NOTCH
lOO k
Bandpass Output .... pin 4
12
Notch Output--+- pin 10
FIGURE 25 - VOLTAGE REGULATOR
4.l V Vz 1Nl824
or equiv
Vcc
Vo : Vz + 0.6 Vdc
NOTE 1: Ais used to bias the zener.
NOTE 2: If the Zener Te is positive, and equal in
10
R
MJE800
orequiv
Vo
magnitude to the negative Te of the input
to the operational amplifier (~2.0 mV/oC),
the output is zaro-Te. A J.U-Volt Zener
will give approximately zero-Teo
5.0 V at 4.0 A
FIGURE 26 - ZERO CROSSING DETECTOR
1M
1M
INPUT
510 k
510 k
"vDJ'
n n
OUTPUTI
MAGNETIC
PICKUP
510 k
510 k
>-<>-.... OUTPUT
8-500
U
0V
I
U
UOV
MC3450
MC3452
~______________Q_U_A_D__L_IN_E__R_E_C_E_IV_E_R__~
Specifications and Applications
InforIllation
QUAD LINE RECEIVERS
WITH COMMON THREE-STATE
STROBE INPUT
MONOLITHIC SILICON
INTEGRATED CIRCUITS
MONOLITHIC QUAD MTTL COMPATIBLE
LINE RECEIVERS
The MC3450 features four MC75107 type active pullup line
receivers with the addition of a common three-state strobe input.
When the strobe input is at a logic zero, each receiver output state is
determined by the differential voltage across its respective inputs.
With the strobe high, the receiver outputs are in the high impedance
state.
The MC3452 is the same as the MC3450 except that the outputs
are open collector which permits the implied "AND" function.
The strobe input on both devices is buffered to present a strobe
loading factor of only one for all four receivers and inverted to
provide best compatability with standard decoder devices.
•
Receiver Performance Identical to the Popular
MC751 07 /MC751 08 Series
16
[ : : : : ] (topv;ew)
-L SUFFIX
PSUFFIX
CERAMIC PACKAGE
PLASTIC PACKAGE
CASE 648
CASE 620
•
Four I ndependent Receivers with Common Strobe Input
•
Implied "AND" Capability with Open Collector Outputs
•
Useful as a Quad 1103 type Memory Sense Amplifier
CONNECTION DIAGRAM
FIGURE 1 - A TYPICAL MOS MEMORY SENSING APPLICATION FOR A
4·K WORD BY 4-BIT MEMORY ARRANGEMENT EMPLOYING
1103 TYPE MEMORY DEVICES
TRUTH TABLE
INPUT
OUTPUT
STROBE MC3450 MC3452
VID~
L
H
Open
+25 mV
H
Open
Open
-25 mV ~
L
I
I
DATA BIT #2
VIO ~+25 mV
H
Open
open
VID~
L
L
L
OATA BIT #1
-25 mV
H
Open
Open
L "" Low Logic
H
Open
S~ate
High Logic State
= High I mpedance State
t"" Indeterminate State
Only four MC3450 devices are required for a
4-k word by 16-bit memory system.
See Packaging 1nformation Section for outline dimensions.
8-501
=
MC3450, MC3452 (continued)
MAXIMUM RATINGS (TA
=
Oto +700e unless otherwise noted I
Symbol
Value
Unit
Vee,VEE
±7.0
Vdc
Differential·Mode I "put Signal Voltage Range
VIDR
±6.0
Vdc
Common-Mode I "put Voltage Range
VieR
±5.0
Vdc
Strobe Input Voltage
VI(SI
5.5
Vdc
Derate above T A = +250 e
1000
6.6
mW
mwf'e
Plastic Dual I"-line Package
Derate above T A = +25 0 C
1000
6.6
mW
mwf'e
Rating
Power Supply Voltages
Power Dissipation (Package Limitation)
Ceramic Dual I n-Line Package
PD
Operating Temperature Range
TA
o to +70
°e
Storage Temperature Range
T stg
-65 to +150
°e
RECOMMENDED OPERATING CONDITIONS (TA
Characteristic
Power Supply Voltages
Output Load Current
=
0 to +700e unless otherwise noted I
Symbol
Min
Typ
Max
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Vdc
-
-
16
mA
VIDR
-5.0
-
+5.0
Vdc
VICR
-3.0
-
+3.0
Vdc
VIR
-5.0
-
+3.0
Vdc
IOL
Differential-Mode I "put Voltage Range
Common-Mode Input Voltage Range
I nput Voltage Range (any input to Groundl
ELECTRICAL CHARACTERISTICS (
Symbol
Unit
Delay
tPHL(DI
ns
Delay
tPLH(DI
10
ns
Open State to High Logic Level Propagation
Delay Time (Strobel
tPOH(SI
11
ns
High Logic Level to Open State Propagation
tpHO(SI
11
ns
tPOL(SI
11
ns
tPLO(SI
11
ns
Level Propagation
tPHL(SI
12
ns
Low Logic to High Logic Level Propagation
tPLH(SI
12
ns
Character ist ic
Low to High Logic
Time (Differe
I
Delay Time (Strobel
Delay Time (Strobel
8-502
MC3450, MC3452 (continued)
FIGURE 2 - CIRCUIT SCHEMATIC
(1/4 Circuit Shown)
Vcco---_,----t-------t_----~--------~----------_,------_,----------t__,
850
,
4>
'90
850
.I
r--
4 k
120~:
1.6 k
t
:,
~,
I)
,
k:~
r-...,
,.----1
I
I
_----~
~
4
~_+-------oOUTPUT
oj
r---1---~_,~_+-----------+-+------~_+------t_OGND
3.5 k
'--.--+-0 ST AD8 E
4>
4>
VEEO-----~~------_+----~~____~--~
TO OTHER
RECEIVERS
Dashed components apply to the MC3450 circuit only.
TEST CIRCUITS
FIGURE 3 - ICEX, VOH, AND VOL
v, _--------:'<>-1
1-<>""-6--___ +4 . 75 V
V2---------~>--1
TEST TABLE
---4------'-<>-1
+0.8 V
I-<':"::'Hf--e -4.75
V3 ---+~---"<>--1
V4 ---++-t--'-<>--1
v,
V
MC3450 MC3452 MC3450 MC3452
+2.975 V
+3.0 v
VOH~_3~.O~V-t----~-2~.9~75~V~----~~-t----~~~r---~
+3.0 V
v--0-0
ICEX
+3.0 V
VOL -2.975 V -2.975 V
(MC3452)
+5.25
V2
+2.975 V +2.975 V
-3.0 V
-3.0 V
Channel A shown under test. Other chann .. l.. a ... tflsted similarlv
I,.
IMC3450)
FIGURE 5 - IIH(S) AND IIL(S)
FIGURE 4 - ICCH AND IEEH
---------------------'-1
+3.0 V ........
R>---_+5.25 V
13>--1'- +3.0 V
+5.25 V
R>-Hr_e-5.26 V
-5.25 V
VIH(S)or
V,LIS)
8·503
MC3450, MC3452 (continued)
TEST CIRCUITS (continued)
FIGURE7-IIH
FIGURE 6 - lOS
~O>--_ +5.25 V
~>---.+5.25 V
VI
VI - 2.0 V-+-f-=--<>-'~
+25 mV _--~-o-=-!
l-"'io-H...... +3.0 V
+0.8 V ....+-~-o-=-!
+3.0 V_+--+--<>''"I
~o-H_-5.25 V
~<>--IH_-5.25V
Channel A shown under test, other channels are tested similarly.
Only one output shorted at a time.
Channel A(-) shown under test, other channels are tested
similarly. Devices are tested with V1 from +3.0 V to -3.0 V.
FIGURE 8 - IlL
FIGURE 9 - loff
V1 - 2.0 V
FO---.. +5.25
+3.0 V ...-
V
~1:..;60-_ _.. +5.25 V
......~_O-'-<
Vl_+-f-=--<>-'~
+--+-+--<>-=-I
+2.0 V ...
+3.0 V_+-+--o-::!.1
I-'-=<>-+-+-. -5.25 V
~'<>-+-+-" -5.25 V
Channel A(-) shown under test, other channels are tested
similarly. Devices are tested with V1 from +3.0 V to -3.0 V.
Output of Channel A shown under test, other outputs are
tested similarly for V1 = 0.4 V and +2.4 V.
FIGURE 10 - RECEIVER PROPAGATION DELAY tpLH(D) AND tPHL(D)
+s.ov
+100 mV ...---<~-02-
200mv~---50%
OV
t:~~(~~)
____
tPHL(D)
1.5 V
VOL
Eln waveform characteristics:
Output of Channel B shown under test, other channels are tested similarly.
S1 at "A" for MC3452
51 at "S" for MC3450
CL. = 15 pF total for MC3452
CL = 50 pF total for MC3450
8-504
tTLH and tTHL:e;;;;10 ns measured 10% to 90%
PAA=1.0MHz
Duty Cycle"" 500 ns
MC3450, MC3452 (continued)
TEST CIRCUITS
(continued)
FIGURE 11 - STROBE PROPAGATION DELAY TIMES tpLO(S)' tPOL(S). tpHO(S)and tpOH(S)
+5.0 V
390
v,
vi
5,
52
CL
tpLO{S)
100 mV
Closed
Closed
15 pF
tPOL{S)
1QOmV
GNO
GNO
Closed
Open
50 pF
tPHO(S)
GNO
GNO
100 mV
Closed
Closed
15 pF
1QOmV
Open
Closed
50 pF
S1
01
1N916
or equiv
1k
tPOH(S)
CL includes jig and probe capacitance.
Ein waveform characteristics:
tTLH and tTHL ~ 10 ns measured 10% to 90%.
PAR = 1.0 MHz
S2
1,
Duty Cycle
= 50%
Output of Channel B shown under test,
other channels are tested similarlv.
tPLO(S) {Ein 3 . : : - - - - 'PHO(S) { " " ' : :
-tPLO(S)
.-_--"",.5 V
VOH
EO
----("0'"
EO
VOH-0.5 V
"",.5 V
3.0V~
50%
tPOL(S) {
Ein
0 V------
3.0V
Ein
{
-'POH(S)
VOH-------
'POH(S)
5.0V-VD,
EO
50%
OV
tpOL(S)
1.5 V
EO
VOL---------~------
,,"OV
FIGURE 12 - STROBE PROPAGATION DELAY tpLH(S) AND tPHL(S)
+5.0 V
Ein
+3.0V~----50%
+100 mV"---~--<>-'-l
OV
~~LHH~(:!____
tpHL(S)
390
8:>--1-+----.-...
f-o--+-t-e -5.0
EO
V
EO
1.5 V
VOL
15 pF
1-+--1
180
MEMORY
CO~~~TEA o---t-----+--<>-l--(
ADDRESS
#2"'--+-<>-+--1
BUS
380
STROBE
1/4 (MC34501
CIRCUIT
ADD A ESS #3 _-+-o---i--I
The three-state capabitity of the MC3450 permits
bidirectional data transmission as illustrated.
P-+-rC~--eOUTPUT
ADDRESS #4 _ _-0--'---1+
L_~~~2__ ..J
The MC3452 can be used for address decoding as illustrated
above. All outputs of the MC3452 are tied together through a
common resistor to +5.0 volts. In this configuration the MC3452
provides the "AND" function. All addresses have to be true
before the output will go high. This scheme eliminates the need
for 8n "ANO" gate and enhances speed throughput for address
decoding.
FIGURE 15 - SINGLE-ENDED UNI-BUS· LINE RECEIVER
APPLICATION FOR MINICOMPUTERS
1N914
orequiv
FIGURE 16 - WIRED "OR" DATA SELECTION USING
THREE-STATE LOGIC
STROBE
3k
<:>
+5.0 V
MC3450
-+5.0 V
r-------i
I
I
180
I
I
STROBE _
DATA
OUTPUT
MC3450
180
)0>-1-+--<>- OA T A
DATABUS~--~------~~-I
DATA
LINES
+5.0 V
MC3460
180
~,,-~_ADDRESS
ADDRESS BUS ~---~~--~~...,
390
+5.0 V
9.
~-r~_DATA
D~TABUS~----~~--~~~
+5.0 V
390
390
f--o-
ro--
2N2222 or equiv
STROBE
9
:--o-f-<
r<>-'
180
CONTROL BUS~-~-------jl-<>+-I
I
CONTROL
I
390
MC3450
MC3462
I
STROBE~---------1I-<*L.""_ _ _ _ _ _ _
MC3450
I
I
I
J ·~~II~j;~~~t~fo~p~ltlil
'-
~E
TO ADDITIONAL
RECEIVERS
The MC3450/3452 can be used for single-ended as well as
differential line receiving. For single-ended line receiver applications, such as are encountered in minicomputers, the configuration shown in Figure 15 can be used. The voltage source,
which generates Vref, should be deSigned so that the Vref
voltage is halfway between VOH(min) and VOL(max). The
maximum input overdrive required to guarantee a given logic
state is extremely small, 25 mV maximum. This low-input overdrive enhances differential noise immunity. Also the high-input
impedance of the line receiver permits many receivers to be
placed on a single line with minimum load effects.
01 02 03 04
X
Al
A2
V
1/2 MC4007
CIRCUIT
I
8-506
I
~
MC3450, MC3452 (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 17 - PARTY-LINE DATA TRANSMISSION SYSTEM
WITH MULTIPLEX DECODING
~ROBE
DATA
STROBE
r--4+=I=I~~ MC3450!-<1---+-e
MC3453
!NPUTS
MC34S2
DATA
OUTPUTS
I-<)--t-~
STROBE _
-.!L
STROBE
~
DATA
INPUTS
:::t:t=(=j=t~:tt~ MC34501---H--e
MC3453
.+-++--++-0-1 MC3452 K:>--H--e
DATA
OUTPUTS
r----
~
~-!----+-r-+-t-<:>-I MC3452 H:1----.1i-+-e
STROB~
DATA
OUTPUTS
STROBE
r----
~
;;.
OATA
'----o-l
MC3453
INPUTS
MC3450
~====::::::~ MC34521-<1-++-t_-e
A
'~
STROBE
r----
r----
Q1
Q2
~
2/3
MC74Q4
--0-0-
CIRCUIT
1/2
X
MC4QQ7
CIRCUIT
--<>-y
-0-
Q.
-0~
-
A1
A2
A1
For further information on Data Transmission Systems
see Motorola Application Note AN-70S, "Une Driver
and Receiver Considerations".
8-507
A2
DATA
OUTPUTS
MC3453
~~______________Q_U_A_D_L_I_N_E_D_R_I_V_E_R~
QUAD LINE DRIVER WITH
COMMON INHIBIT INPUT
MONOLITHIC MTTL COMPATIBLE
QUAD LINE DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
The MC3453 features four MC75110 type line drivers with a
common inhibit input. When the inhibit input is high, a constant
output current is switched between each pair of output terminals in
response to the logic level at that channel's input. When the inhibit
is low, all channel outputs are nonconductive (transistors biased to
cut-off). This minimizes loading in party·line systems where a large
number of drivers share the same line.
16
• Four Independent Drivers with Common Inhibit Input
• -3.0 Volts Output Common·Mode Voltage Over Entire Operating
Range
L SUFFIX
CERAMIC PACKAGE
CASE 620
• Improved Driver Design Exceeds Performance of Popular MC7 511 0
FIGURE 1 - PARTY·LlNE DATA TRANSMISSION SYSTEM WITH
MULTIPLEX DECODING
P SUFFIX
PLASTIC PACKAGE
CASE 648
CONNECTION DIAGRAM
DATA
INPUTS
INPUT A
VCC
Y
OUTPUT A
INPUT B
Y
OUTPUT B
Z
DATA
INPUTS
Z
Z
OUTPUT C
y
Z
INHIBIT
OUTPUT 0
Y
INPUTC
INPUT 0
DATA
INPUTS
GND
VEE
OAT'"
INPUTS
TRUTH TABLE
(positive logic)
LOGIC INHIBIT
INPUT
INPUT
H
H
See Packaging Information Section for outline dimensions.
8-508
Z
Y
On
Off
On
L
H
Off
H
L
. Off
Off
L
L
Off
Off
L = Low Logie Lavel
H" High Logic Level
For I ...." ... Inform.tlon On 0 ... TrOMml ..... n SYIMml
_Meno..,'. A!>plle ..lon No.. AN·7011, ·'Li ... 0,,_
_ " ' ..ei .... C.....id •• Mlon...
OUTPUT
CURRENT
MC3453 (continued)
MAXIMUM RATINGS (TA = Oto +700C unless otherwise noted)
Ratings
Symbol
Value
Unit
VCC
VEE
+7.0
-7.0
5.5
-5.0 to +12
Volts
mW
mW/oC
TA
1000
6.6
Oto +70
T stg
-65 to +150
Power Supply Voltage
Logic and Inhibitor Input Voltages
Vin
Common·Mode Output Voltage Range
VOCR
Power Dissipation (Package limitation)
Po
Plastic and Ceramic Dual In-Line Packages
Derate above T A = +25 0 C
Operating Temperature Range
Storage Temperature Range
Plastic and Ceramic Dual In-Line Packages
Volts
Volts
°c
°c
RECOMMENDED OPERATING CONDITIONS (See Notes 1 and 2)
Characteristic
Symbol
Power Supply Voltages
VCC
VEE
Common-Mode Output Voltage Range
Min
+4.75
-4.75
Nom
Max
Unit
+5.0
-5.0
+5.25
-5.25
Volts
0
0
-
+10
-3.0
Volts
VOCR
Positive
'Negative
Note 1. These voltage values are in respect to the ground terminal.
Note 2. When not using all four channels, unused outputs must be grounded.
DEFINITIONS OF INPUT LOGIC LEVELS'
I
Characteristic
I
Svmbol
Min
Max
Unit
High-Level Input Voltage (at any input)
VIH
2.0
Volts
Low-Level Input Voltage (at any input)
VIL
0
5.5
0.8
Volts
*The algebraic conventIon, where the most positive limit IS deSignated maXimum, IS used with toglc leve/lnput Voltage Levels only.
ELECTRICAL CHARACTERISTICS ITA = 0 to +700 C unless otherwise noted)
Characteristic##
Symbol
High-Level Input Current (Logic Inputs)
(VCC
(VCC
= Max,
= Max,
VEE
VEE
= Max,
= Max,
VIHL
VIHL
= 2.4 V)
= VCC Max)
Low-Level I nput Current (Logic Inputs)
IVCC
= Max,
VEE
= Max,
VILL
Max
Unit
-
-
-
-
40
1.0
-1.6
I-'A
mA
I-'A
mA
mA
IIHI
= Max, VEE = Max, VIHI = 2.4 V)
= Max, VEE = Max, VIH = VCC Max)
low-Level Input Current (Inhibit Input)
IVCC
Typ#
IILL
= 0.4 V)
High-Level Input Current (Inhibit Input)
(VCC
(VCC
Min
IIHL
IILI
= Max, VEE = Max, VI LI = 0.4 V)
-
-
-
-
40
1.0
-1.6
-
15
100
I-'A
mA
Output Current ("on" state)
IVCC = Max, VEE = Max)
IVCC = Min, VEE = Min)
10(on)
Output Current ("off" state)
(VCC = Min, VEE = Min)
10(off)
-
11
11
5.0
Supply Current from VCC (with driver enabled)
(VI LL = 0.4 V, VI HI = 2.0 V)
ICC(on)
-
35
50
mA
Supply Current from VEE (with driver enabled)
IVILL = 0.4 V, VIHI = 2.0 V)
IEE(on)
65
90
mA
Supply Current from VCC (with driver inhibited)
(VI LL = 0.4 V, VI LI = 0.4 V)
ICC(off)
-
35
50
mA
Supply Current from VEE (with driver inhibited)
IEE(off)
-
25
40
rnA
(VI LL
mA
6.5
= 0.4 V, VI LI = 0.4 V)
#AII typical values are at VCC = +5.0 V, VEE = -5.0 V, TA = +250 C.
##for conditions shown as Minor Max, use the appropriate value specified under recommended operating
conditions for the applicable device type.
Ground unused inputs and outputs.
8-509
MC3453 (continued)
SWITCHING CHARACTERISTICS (VCC = +5.0 V, VEE = -5.0 V, TA = +25 0 C.)
Characteristic
Propagation Delay Time from Logic Input to
Output Y or Z (RL = 50 ohms, CL = 40 pF)
Propagation Delay Time from Inhibit Input
to Output Y or Z (RL =
50 ohms, CL = 40 pF)
FIGURE 2 - LOGIC INPUT TO OUTPUTS PROPAGATION
DELAY TIME WAVEFORMS
Symbol
PLHL
Min
-
tPHLL
-
tPLHI
tPHLI
-
Typ
Max
Unit
9.0
9.0
16
20
15
15
25
25
ns
ns
FIGURE 3 - INHIBIT INPUT TO OUTPUTS PROPAGATION
DELAY TIME WAVEFORMS
3.0 V
3.0 V
INHIBIT
INPUT
OV
OV
OUTPUT
OUTPUT
Y
Y
OV
OUTPUT Z
OUTPUT
Z
OV
TEST CIRCUITS
FIGURE 5 - INHIBIT INPUT TO OUTPUT PROPAGATION
DELAY TIME TEST CIRCUIT
FIGURE 4 - LOGIC INPUT TO OUTPUT PROPAGATION
DELAY TIME TEST CIRCUIT
Vcc
Ein to Scope
=
+5.0 V
Vee = +5.0 V
Output
to
SCOPY-+_--""c-..,
50..--.---<>-1
3
40 pF
50
tTHL
~10ns
(total)
4
I-=-
Y ~-'V'."'""""'>-<:H
MC3453
f/"
Z
OutPut~
to
Scope
Z
Y
50
.n.
8
9
50
Ein
tTLH =tTHL
~10 ns
=-5.0
V
1 k
Channel A shown under t8St, the other
Channel A shown under test, tne other
channels are tested similarly;
channels are tested similarly.
8-510
-5.0 V
MC3453 (continued)
FIGURE 6 - CIRCUIT SCHEMATIC
(1/4 Circuit Shown)
To Other
Vee
Drivers
3.5 k
y
,---+-r-<> Out,-+-+~putl
Z
To Other
Drivers
To Other
Drivers
Inhibit Input
8-511
MC5528
MC5529
MC7528
MC7529
l ______
D_U_A_L_S_E_N_S_E_A_M_P_L_I_F_IE_R_S_____
DUAL HIGH-SPEED
SENSE AMPLIFIER
WITH PREAMPLIFIER
TEST POINTS
MONOLITHIC DUAL SENSE AMPLIFIERS
WITH PREAMPLIFIER TEST POINTS
This dual sense amplifier is designed for use with high-speed
memory systems. Low level pulses originating in the memory are
converted to logic levels compatible with MDTL and MTTL circuits.
External preamplifier test points provide for very accurate timing
of the strobe with the input signal.
•
Adjustable Threshold Voltage Levels
•
High·Speed, Fast Recovery Time
•
Time and Amplitude Signal Discrimination
•
High dc Logic Noise Margin
1.0 Volt typ
•
Good Fan·Out Capability
•
I ndependent Strobing
•
Separate Logic Outputs
•
Test Points Available for Accurate Strobe Timing
MONOLITHIC SILICON
INTEGRATED CIRCUIT
16
[:::: ::1
'.
(top view)
L SUFFIX
CERAMIC PACKAGE
CASE 620
SCHEMATIC DIAGRAM
P SUFFIX
PLASTIC PACKAGE
CASE 648
(MC7528 and MC7529 only)
TEST
POINT
A
Callt
See Packaging Information Section for outline dimensions.
8-512
TEST
STROBE OUTPUT OUTPUT STROBE POINT
AA
B
8BGND
-DIFFERENTIAL
INPUT A
REFERENCE
INPUT
---
DIFFERENTIAL
INPUTS
Vee
MC5528, MC5529, MC7528, MC7529 (continued)
MAXIMUM RATINGS (TA
= +250 C unless otherwise noted.)
Rating
Power Supply Voltage
Symbol
Value
Units
VCC
VEE
+7.0
-7.0
Vdc
Vdc
Vin or Vref
±.5.0
Vdc
Power Dissipation
Derate above T A '" +250 C
PD
575
3.85
mW
Operating Temperature Range
TA
Diffarentiallnput Voltages
mWoC
°c
-55 to +125
o to +70
MC5528. MC5529
MC7528, MC7529
T stg
Storage Temperature Range
ELECTRICAL CHARACTERISTICS IVCC
°c
-55 to +150
= +5.0 V ±5%, VEE = -5.0 V ±5%, T A = Tlow# to
Characteristic
Differential Input Threshold Voltage (VinS = +5.0 V. VID
= ±Vth)
Vth
IVrel
= 15 mV,
'L
= 16 mA,
Va <0.4 VI
MC5528,MC7528
MC5529,MC7529
IVrel
= 40 mV,
IL
= 16 mA,
Va <0.4 VI
MC5528,MC7528
MC5529,MC7529
IVrel
=
15 mV, IL
=
-400
~A,
Va >2.4 VI
mV
36
33
40
MC5528,MC7528
MC5529,MC7529
15
19
MC5528,MC7528
MC5529,MC7529
40
44
47
22
0.8
~A
0.02
1.0
mA
mA
G)
For OoC STA S700e operation; electrical characteristics for MC5528 and
MC5529 are guaranteed the same as MC7528 and MC7529 respectively.
# Tlow = -55°C lor MC5528, MC5529, OOC lor MC7528, MC7529
Thigh
8-513
= +125 0 C lor MC5528, MC5529; +70 0 C lor MC7528, MC7529
MC5528, MC5529, MC7528, MC7529 (continued)
ELECTRICAL CHARACTERISTICS (Vee: +S.O V ±S%. VEE: -S.O V ±S%. TA: +2Soe unless otherwise noted.}
~ Positive current is defined as current into the referenced pin.
@
@)
Pin 1 to have ~100 pF capacitor connected to ground.
Each test point to have 'S15 pF capacitive load to ground.
8-514
MC5534
MC5535
MC1534
MC1535
~~_________D_U_A__L_S_E_N_S_E_A_M_P_L_IF_I_E_R_S__~
MONOLITHIC DUAL SENSE AMPLIFIERS
WITH INVERTED OUTPUTS
DUAL HIGH·SPEED
SENSE AMPLIFIER
WITH
INVERTED OUTPUTS
This dual sense amplifier is designed for use with high-speed
memory systems_ Low level pulses originating in the memory are
converted to logic levels compatible with MDTL and MTTL circuits_
These circuits are identical to the MC7524 except that an additional
stage has been added to each output gate to provide an inverted
output_
•
Adjustable Threshold Voltage Levels
•
High-Speed, Fast Recovery Time
•
Time and Amplitude Signal Discrimination
•
High dc Logic Noise Margin
1.0 Volt typ
•
Good Fan-Out Capability
MONOLITHIC SILICON
INTEGRATED CIRCUIT
16
[::::::II.OPvieW)
•
I ndependent Strobing
•
Separate Logic Outputs
•
Normally High Outputs Accomodate the Wired-OR of
Several Sense Amplifiers
-
L SUFFIX
CERAMIC PACKAGE
CASE 620
SCHEMATIC DIAGRAM
P SUFFIX
PLASTIC PACKAGE
CASE 648
IMC7528 and MC7529 only)
GND2
Cellt
See Packaging Information Section for outline dimensions.
8-515
-DIFFERENTIAL
INPUT A
OUTPUT STROBE
B
B
REFERENCE
INPUT
N.C.
DIFFERENTIAL
INPUT B
GNDl
MC5534, MC5535, MC7534, MC7535 (continued)
MAXIMUM RATINGS ITA = +250 C unless otherwise noted.)
Rating
Power Supply Voltage
Symbol
Value
Units
VCC
VEE
+7.0
-7.0
Vdc
Vdc
Vin or Vref
±5.0
Vdc
Power Dissipation
Derate above T A = +250 C
Po
575
3.85
mWoC
Operating Temperature Range
TA
Differential I nput Voltages
°c
-55 to +125
o to +70
MC5534, MC5535
MC7534, MC7535
T stg
Storage Temperature Range
mW
-55 to +150
.uc
ELECTRICAL CHARACTERISTICS (Vcc = +5.0 V ±5%, VEE = -5.0 V ±5%, TA = Tlow# to
Characteristic
Differentia/Input Threshold Voltage (VinS = +5.0 V. VID = ± Vth)
(Vref = 15 mV, VL = +5.25 V, IL < 250~AI
MC5534, MC7534
MC5535, MC7535
(Vref = 40 mV, VL = "5.25 V, IL <250~AI
(Vref
= 15 mV,
IL
= 20 mA, Vo
=<0.4 VI
MC5534, MC7534
MC5535, MC7535
MC5534, MC7534
MC5535, MC7535
MC5534, MC7534
MC5535, MC7535
CD
For OoC ~ T A ~ 7rPC operation, electrical characteristics for MC5534 and
MC5535 are guaranteed the same as MC7534 and MC7535 respectively.
# Tlow = -55°C for MC5534, MC5535, OOC for MC7534, MC7535
Thigh = +12SoC for MC5534, MC5535, +700 C for MC7534, MC7535
8-516
MC5534, MC5535, MC7534, MC7535 (continued)
ELECTRICAL CHARACTERISTICS (Vee = +5.0 V ±5%, VEE = -5.0 V ±5%, TA = +25 0e unless otherw;se noted. I
@
Positive current is defined as current into the referenced pin.
@
Pin 1 to have ?100 pF capacitor connected to ground.
8-517
MCSS38
MCSS39
MC7S38
MC7S39
\
......_ _ _ _ _D_U_A_L_S_E_N_S_E_A_M_P_L_I_F_IE_R_S_----I
DUAL HIGH-SPEED
SENSE AMPLIFIER
MONOLITHIC DUAL SENSE AMPLIFIERS
WITH PREAMPLIFIER TEST POINTS
AND INVERTED OUTPUTS
WITH
PREAMPLIFIER TEST POINTS
AND
INVERTED OUTPUTS
This dual sense amplifier is designed for use with high-speed
memory systems. Low level pulses originating in the memory are
converted to logic levels compatible with MDTL and MTTL circuits.
These devices are identical to MC5528/MC7528 with the exception
of the inverted outputs.
•
Adjustable Threshold Voltage Levels
•
High-Speed, Fast Recovery Time
•
Time and Amplitude Signal Discrimination
•
High dc Logic Noise Margin
1.0 Volt typ
•
Good Fan-Out Capability
MONOLITHIC SILICON
INTEGRATED CIRCUIT
[::::::1
16
•
I ndependent Strobing
•
Separate Logic Outputs
•
Test Points Available for Strobe Timing
•
Inverted Outputs to Accomodate Wired-DR Outputs of
Several Sense Amplifiers
(topvjew)
-
L SUFFIX
CERAMIC PACKAGE
CASE 620
SCHEMATIC DIAGRAM
P SUFFIX
PLASTIC PACKAGE
CASE 648
(MC7538 and MC7539 only)
TEST
POINT
TEST
STROBE OUTPUT OUTPUT STROBE POINT
A
Cext
See Packaging Information Section for outline dimensions.
8-518
A
--
A
B
B
B
--
OIFFERENTIAL
REFERENCE
DIFFERENTIAL
INPUT A
INPUT
INPUT B
GNO
VEE
MC5538, MC5539, MC7538, MC7539 (continued)
MAXIMUM RATINGS (TA
=
+25 0 C unless otherwise noted)
Symbol
Value
Units
VCC
VEE
+7.0
-7.0
Vdc
Vdc
Vin or Vref
±5.0
Vdc
Po
575
3.85
mW
mWoC
Rating
Power Supply Voltage
Differential I nput Voltages
Power Dissipation
Derate above T A = +2SoC
Operating Temperature Range
°c
TA
-55 to +125
o to +70
MC5538, MC5539
MC7538, MC7539
T stg
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (Vee'" +5.0 V ±5%. VEE'" -5.0 V ±5%,
TA
=
°c
-55 to +150
Tlow# to Thigh# unless otherwise noted.)
MC7538 #
MC7539
Min
Tvp
15
MC5539, MC7539
11
8.0
MC5538, MC7538
MC5539, MC7539
36
33
40,
Characteristic
Symbol
Differential Input Threshold Voltage (VinS;; +5.0 V, VID = ±Vth)
(V ref = 15 mY, VL = +5.25 V, IL < 250 ,uAl
(Vref
=-
40 mY, VL
=
+5.25 V, IL < 250 /-IA)
(Vref= 15 mY, IL= 120mA, VL'-----f-_+_
QUTPUTA
STROBE A
o"-t--t----t---I-....J
2
STROBE A
INPUTS Bl
B1
INPUTS
"<>'---l--+--I--I
OUTP'UTB
BO';.:.'---i-+-+-------t----..J
3911
15
I
I
I
I
I
:
I
"0--+-+-1
STROBE
I
INPUTsAl~114
A1
OUTPUT A
STROBE B
~
7
11
112
I
I
I
I
L _____ J
390
See Packaging Information Section for outline dimensions.
8-524
OUTPUT B
MC7524L, MC7525L (continued)
MAXIMUM RATINGS (TA = +250 C unless otherwise noted)
Rating
Power Supply Voltage
Differential I nput Voltages
Power Dissipation
Symbol
v+
V-
Value
Units
+7.0
-7.0
Vdc
Vdc
Vin or Vref
±5.0
Vdc
Po
575
3.85
mW
mWoC
TA
o to +70
Tstg
-55 to +150
°c
°c
Derate above T A = + 250 C
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (V+
= 5.0 V, V- = -5.0 V, TA = Oto +70oC unless otherwise noted)
Symbol
Characteristic
Input ThreshOld Voltage
Vref = 15 mV
Min
Typ
Max
11
8.0
19
22
44
47
MC7524L
MC7525L
MC7524L
MC7525L
Unit
mV
Vth
33
15
15
40
40
VCMF
-
±3.0
-
Volts
Input Bias Current
lin
30
75
,..A
I"put Offset Current
lio
0.5
-
,..A
Z(jnID
-
2.0
-
kohms
2.0
-
-
Volts
-
-
0.8
Volt
-1.0
-1.6
-
40
1.0
mA
,..A
mA
Vout (1)
2.4
3.9
-
Volts
Vout (0)
-
0.25
0.4
Volt
lse(out)
2.1
-
3.5
mA
V+ Supply Current @ T A = +250 C
1+
-
25
mA
= +250 C
1-
-
-15
-
Vref
= 40 mV
36
Common·Mode I "put F iring Voltage
Input Impedance If = 1.0 kHzl
=0.8 V
= 2.0 V
Input Current Logic "0" Level (Strobe Inputs)
Vin(O) = 0.4 V
Input Current Logic "1" Level (Strobe Inputs) Vin(ll = 2.4 V
Vin!l) = V+
Output Voltage Logic "1" Level Vin(l) = 2.0 V, Vin(O) = 0.8 V
Output Voltage Logic "0" Level
Vin(O) = 0.8 V
Input Voltage Logic "1" Level (Strobe Inputs)
Vin(O)
Yin (1)
I nput Voltage Logic "0" Level (Strobe Inputs)
Vin(ll
Yin
lin~O)
lin (1)
Short-Circuit Output Current
V- Supply Current@TA
SWITCHING CHARACTERISTICS (V+
(m
mA
= 5.0 V, V- = -5.0 V, TA = +250 C unless otherwise noted)
Characteristic
Propagation Delay Time
(Differential Input to Output)
Symbol
Min
Typ
Max
Unit
tpd (1) 0
-
15
40
40
ns
15
30
ns
-
ns
~
Propagation Delay Time
(Strobe Input to Output)
tpd (1) S
tpd (0) S
Differential-Mode Input Overload Recovery Time
toR OM
Common-Mode I nput Overload Recovery Time
toR CM
Minimum Cycle Time
to (min)
8-525
35
20
20
200
-
-
ns
ns
POSITIVE VOLTAGE REGULATORS
MC7700CP
Series
Product
Previe~
THREE-TERMINAL
POSITIVE FIXED
VOLTAGE REGULATORS
MC7700CP SERIES THREE-TERMINAL
POSITIVE VOLTAGE REGULATORS
MONOLITHIC SILICON
INTEGRATED CIRCUITS
The MC7700CP Series positive voltage regulators are identical to
the popular MC7800CP Series devices, except that they are specified
for only half the output current. Like the MC7800CP devices, the
MC7700CP three·terminal regulators are intended for local, on·card
voltage regulation.
Internal current limiting, thermal shutdown circuitry and safe·
area compensation for the internal pass transistor combine to make
these devices remarkably rugged under most operating conditions.
Maximum output current, with adequate heatsinking is 750 mAo
•
No External Components Required
•
Internal Thermal Overload Protection
TYPE NO.IVOLTAGE
MC7705CP
MC7706CP
MC7708CP
MC7712CP
MC7715CP
MC7718CP
MC7720CP
MC7724CP
5.0 Volts
6.0 Volts
8.0 Volts
12 Volts
15 Volts
18 Volts
20 Volts
24 Volts
• Internal Short·Circuit Current Limiting
• Output Transistor Safe· Area Compensation
•
Packaged in the Plastic Case 199·04
(Pin Compatible with the VERSAWATTt or TO·220)
PLASTIC PACKAGE
CASE 199·04
Heat sink surface con-
SCHEMATIC DIAGRAM
nected to pin 3 .
.---~----------~----------~----~--~------~-olnput
1QO'k
Pin 1 Input
Pin 2 Output
Pin 3 Ground
500
STANDARD APPLICATION
J-=
-
INFINITE
HEAT SINK
;t 10
~ 5.0
C
::::::
I--- WITH HEAT
I--- SINK OF
lOoC/W
~ I---
""
--...j,.
~ ~NO HEAT SINK
co
"-
~
~
w
<.0
~>
NO HEAT
SINK
1.0
0.5
.........
"\.
"
=
«
~
0.1
25
50
75
125
100
150
"0.1
+25
+50
2.5
2.5
I
10
2.0
~ 1.0 A I - -
f--
~~
ffi
~
10=20mA~
10 = 200 mA"
j
1.0
z~
-.~
b
OmA f - -
I
0.5
o
£. ~ r-....
f-- ~V~ = 2%
i'
o
25
50
75
100
~=OO~
.........
....... t'--..
1.0
f-
:::>
TJ = 25 0C""",
TJ = 125
0.5
o
125
~
:::::-....
1'-..
o
3.0
6.0
9.0
12
15
18
.......
~
........
r-.....
DC"--..
21
24
27
30
Vin-VO. INPUT·OUTPUT VOLTAGE OIFFERENTIAL IVOLTS)
TJ. JUNCTION TEMPERATURE IOC)
FIGURE 6 - RIPPLE REJECTION AS A FUNCTION
OF OUTPUT VOLTAGES
FIGURE 5 - RIPPLE REJECTION AS A FUNCTION
OF FREQUENCY
100
-
~
'"52
I
I
Vo
1.5
........ r-0-
'"
'"
13
f-
10
~c
:>
.,
2.0
~
f-
f-«
i5i=
~~
"-w
w
'"
500 mA
10
!; C 1.5
"-
'"cow
"-
i--
+150
FIGURE 4 - PEAK OUTPUT CURRENT AS A FUNCTION OF
INPUT·OUTPUT DIFFERENTIAL VOLTAGE
FIGURE 3 - INPUT OUTPUT DIFFERENTIAL AS A
FUNCTION OF JUNCTION TEMPERATURE
~cn
+125
+100
TA. AMBIENTTEMPERATU RE IOC)
TA. AMBIENT TEMPERATURE IOC)
w
~
+75
lOoC/W
HEATSINK-
80
II
90
BO
'"
z
'"
70
co
50
~
~
w
~
ll:
'"
t£
co
......... t--,
60
~
z
'">=
70
::lw
60
~
~
40
ll:
30
''""
Vin = 10 V
Vo = 5.0 V
10 = 20 mA
20
",'
10
o
10
100
1.0 k
10 k
\
f= 120 Hz
lo=20mA ~Vin = 1.0 VIRMS)
f ' r-
~RT#
Ym
f- MC7805
lOV
11 V
14V
19 V
23 V
27V
33 V
MC7806
50 f- MC7808
MC7B12
f- MC7815
MC7818
MC7824
40
4.0
6.0
8.0
---
-
10
12
14
16
18
Vo. OUTPUT VOLTAGE IVOLTS)
I. FREnUENCY 1Hz)
8-537
20
r--
22
24
•
MC7800C series (continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 8 - QUIESCENT CURRENT AS A
FUNCTION OF TEMPERATURE
FIGURE 7 - OUTPUT VOLTAGE AS A FUNCTION
OF JUNCTION TEMPERATURE
4.8
6.20
.1
~
0
~
6.10
~
0
6.00
....
to
>
---
t--
t::>
I!:
::>
0
.1
;;:
Vin=l1V Vo = B.O V
lo=20mA-
t-
~
~
r--
5.90
.,;
>
a
-- -,
!
~
+25
+50
+75
+100
+125
+150
r--... .........,
4.2
~
::;
'"IE
!
-25
Vin= 10V
VO=5.0V lo=2omA
-
4.4
t-
I
5.80
4.6
.§:
3.8
+175
"'"
4.0
o
25
50
.......... I-...
75
100
125
TJ. JUNCTION TEMPERATURE (OC)
TJ. JUNCTION TEMPERATURE (OC)
DEFINITIONS
FIGURE 9 - OUTPUT IMPEDANCE AS A
FUNCTION OF OUTPUT VOLTAGE
Line Regulation - The change in output voltage for a change in
the input voltage. The measurement is made under conditions of
low dissipation or by using pulse techniques such that the average
chip temperature is not significantly affected.
1000
a
500
.§:
300
~
200
....
«
~
:!
--
==
f--
I-120Hz
Load Regulation - The change in output voltage for a change in
~,IO = 500mA
I--CL
load current at constant chip temperature.
O~F
Maximum Power Dissipation - The maximum total device dissipation for which the regulator will operate within specifications.
-~
100
Quiescent Current - That part of the input current that is not
50
delivered to the load.
30
Output Noise Voltage - The rms ac voltage at the output, with
constant load and no input ripple, measured over a specified frequency range.
20
10
4.0
8.0
12
16
20
Long Term Stability - Output voltage stability under accelerated
tife test conditions with the maximum rated voltage listed in the
devices' electrical characteristics and maximum power dissipation.
24
Vo. OUTPUT VOLTAGE (VOLTS)
8-538
MC7800C series (continued)
APPLICATIONS INFORMATION
Design Considerations
to the power supply filter with long wire lengths, or if the output
load capacitance is large. An input bypass capacitor should be
selected to provide good high-frequency characteristics to insure
stable operation under all lpad conditions. A 0.33 J.JF or larger
tantalum, mylar, or other capacitor having low internal impedance
at high frequencies should be chosen. If an aluminum electrolytic capacitor is U'Sed, its value should be 10 J.JF or larger. The
bypass capacitor should be mounted with the shortest possible
leads directly across the regulators input terminals. Normally good
construction techniques should be used to minimize ground loops
and lead resistance drops since the regulator has no external
sense lead.
The MC7800C Series of fixed voltage regulators are designed
with Thermal Overload Protection that shuts down the circuit
when subjected to an excessive power overload condition, Internal
Short-Circuit Protection that limits the maximum current the cir-
cuit will pass, and Output Transistor Safe-Area Compensation that
reduces the output short-circuit current as the voltage across the
pass transistor is increased.
In many low current applications, compensation capacitors are
not required.
However, it is recommended that the regulator
input be bypassed with a capacitor if the regulator is connected
FIGURE 10 - CURRENT REGULATOR
FIGURE 11 - ADJUSTABLE OUTPUT REGULATOR
Output
R
-'0
Constant
C_urrent to
Grounded Load
0.1
/1 F
K>----.......____ Output
R
xx
=
2 digits of type number indicating voltage.
xx
The MC7800C series can be current boosted with a PNP transistor. The MJ2955 provides current to 5.0 amperes. Resistor R
in conjunction with the VSE of the PNP determines when the
pass transistor begins conducting; this circuit is not short-circuit
proof. Input-output differential voltage minimum is increased by
VSE of the pass transistor.
=
2 digits of type number indicating voltage
The circuit of Figure 12 can be modified to provide supply protec·
tion against short circuits by adding a short-circuit sense resistor,
Rsc/and an additional PNP transistor. The current sensing PNP
must be able to handle the short-circuit current of the threeterminal regulator. Therefore, a four-ampere plastic power tran·
sistor is specified.
8-539
MC7900C
l . . __
N_E_G_A_T_I_V_E_V_O_L_T_A_G_E_R_E_G_U_L_A_T_O_R_S----'
Series
MC7900C SERIES THREE-TERMINAL
NEGATIVE VOLTAGE REGULATORS
THREE-TERMINAL
NEGATIVE FIXED
The MC7900C Series of fixed output negative voltage regulators
are intended as complements to the popular MC7800C Series devices.
These negative regulators are available in the same seven·voltage
options as the MC7800C devices. In addition, two extra voltage
options commonly employed in MECL systems are also available
in the negative MC7900C Series.
Available in fixed output voltage options from -2.0 to -24 VOlts,
these regulators employ current limiting, thermal shutdown, and
safe·area compensation - mak ing them remarkably rugged under
most operating conditions. With adequate heat·sinking they can
deliver output currents in excess of 1.0 ampere.
VOLTAGE REGULATORS
MONOLITHIC SILICON
INTEGRATED CIRCUITS
• No External Components Required
• Internal Thermal Overload Protection
• Internal Short·Circuit Current Limiting
K SUFFIX
• Output Transistor Safe·Area Compensation
METAL PACKAGE
CASE 11
• Packaged in the Plastic Case 199·04
(Pin Compatible with the VERSAWATTt or TO·220)
Or Hermetic TO-3 Type Metal Power Package
ITO·3 TYPE)
(bono"' ,,,e,,,,1
SCHEMATIC DIAGRAM
P SUFFIX
PLASTIC PACKAGE
CASE 199·04
GNO
Pin 1 GND (SI
Pin 2 Output (E)
Pin 3 Input (e)
Heat sink surface connected
to pin 3.
,---t--t-< Vo
STANDARD APPLICATION
0.3
............~_ _ _ _ _.u~
L~-4_-.L.....JL-----
__"':"::"__I-oVln
A common ground is required between the
input and the output voltages. The input volt·
age must remain typically 2.0 V more negative
even during the high point on the input ripple
voltage.
xx = these two digits of the type number indi·
cate voltage.
* = Cin is required if regulator is located an
DEVICE TYPE/NOMINAL OUTPUT VOLTAGE
MC7902C - 2.0 Volts
MC7905C - 5.0 Volts
MC7905.2C - 5.2 Volts
MC7906C - 6.0 Volts
MC790BC - 8.0 Volts
MC7912C -12 Volts
MC7915C - 15 Volts
MC7918C - 18 Volts
MC7924C - 24 Volts
tTrademark of Radio Corporation of America.
See Packaging Information Section for outline dimensions.
8-540
appreciable distance from power supply
filter.
** = Co improves stability and transient response.
MC7900C Series (continued)
MC7900C Series MAXIMUM RATINGS (T A = +25 0 C unless otherwise noted)
Rating
Symbol
Input Voltage 12.0 V - 18 V)
(24 V)
Power Dissipation and Thermal Characteristics
Plastic Package
TA = +250 C
Derate above T A = +250 C
Thermal Aesistance, Junction to Air
Value
-35
-40
Po
2.0
20
50
Watts
mW/oC
15
500
2.0
Watts
mW/oC
1/8JA
8JA
TC = +250 C
Derate above TC = +95 0C (See Figure 1)
Po
l/8JC
8JC
Thermal Resistance, Junction to Case
Unit
Vin
Vdc
°CIW
°CIW
Metal Package
TA = +250 C
Po
2.5
28.1'
35
mW/oC
°CIW
1/8JC
8JC
15
250
4.0
mW/oC
°C/W
Storage Junction Temperature Range
T sta
-20 to +150
°c
Operating Junction Temperature Range
TJ
Oto+125
°c
Derate above T A
=
+2SoC
1/8JA
8JA
Thermal Resistance, Junction to Air
TC= +250 C
Po
Derate above T C = +6SoC
Thermal Resistance, Junction to Case
MC7902C ELECTRICAL CHARACTERISTICS IV In
Watts
Watts
- 10V 10=500mA 00C
o
~ 50
~ 6.1 0
--~
40
2.0
4.0
6.0
B.O
10
12
14
16
18
20
22
Vo. OUTPUT VOLTAGE (VOLTS)
8-546
6.0 6
-25
-
I--'
§!
!; 6.1 4
...............
a:
6.1 8
V
./
--
-'1
I
I
Vin=-IIV
VO=-6.0V10=20mA
4
I
+25
+50
+75
+100
+125
TJ. JUNCTION TEMPERATURE (OC)
+150
+175
MC7900C Series (continued)
TYPICAL CHARACTER ISTICS (continued)
FIGURE 7 - QUIESCENT CURRENT AS A FUNCTION
OF TEMPERATURE
DEFINITIONS
line Regulation - The change in output voltage for a change in
the input voltage. The measurement is made under conditions of
low dissipation or by using pulse techniques such that the average
chip temperature is not significantly affected .
.2
.0
I'...
Load Regulation - The change in output voltage for a change in
r--...
load current at constant chip temperature.
t-.....
.8
~
S
J"....
.......
"
4
4.2
Maximum Power Dissipation - The maximum total device dissipation for which the regulator will operate within specifications.
Vin=-IIV
Vo =-S.OV10 =20 rnA
o
25
.........
50
75
TJ. JUNCTION TEMPERATURE (0 C)
t-....
100
Quiescent Current - That part of the input current that is not
delivered to the load.
Output Noise Voltage - The rms ae voltage at the output. with
constant load and no input ripple, measured over a specified frequency range.
r--
Long Term Stability - Output voltage stability under accelerated
life test conditions with the maximum rated voltage listed in the
devices' electrical characteristics and maximum power dissipation.
125
8-547
MC7900C Series (continued)
APPLICATIONS INFORMATION
Design Considerations
to the power supply filter with long wire lengths, or if the output
The MC7900C Series of fixed voltage regulators are designed
with Thermal Overload Protection that shuts down the circuit
when subjected to an excessive power overload condition, Internal
load capacitance is large. An input bypass capacitor ,should be
selected to provide good high-frequency characteristics to insure
stable operation under all load conditions. A 0.33 IJF or larger
tantalum, mylar. or other capacitor having low internal impedance
at high frequencies should be chosen. If an aluminum electrolytic capacitor is used, its value should be 1.0 JJF or larger. The
bypass capacitor should be mounted with the shortest possible
leads directly across the regulators input terminals. Normally good
construction techniques should be used to minimize ground loops
and lead resistance drops since the regulator has no external
sense lead. Bypassing the output is also recommended.
Short-Circuit Protection that limits the maximum current the circuit will pass, and Output Transistor Safe-Area Compensation that
reduces the output short-circuit current as the voltage across the
pass transistor is increased.
In many low current applications, compensation capacitors are
not required. However. it is recommended that the regulator
input be bypassed with a capacitor jf the regulator is connected
FIGURE 8 - CURRENT REGULATOR
FIGURE 9 - CURRENT BOOST REGULATOR
1-5.0 V @ 4.0 A, with 5.0 A current limitingi
-5.0 V
-10 V
Input .......- " N v -....-
-20 V
..
)-------~---<. Output
IO=200mA
1-o.......-A,'VV---4_
3
Inpu' .......-<.-j
=r+1.0 IJF
"'T+1.0 /-IF
----__e. Gnd
Gnd ••- ...........- - - - - - - -...........
The MC7902. -2.0 V regulator can be used as a constant current
source when connected as above. The output current is the sum of
resistor R current and quiescent bias current 8S follOWS:
2V
10
=R+ IB
The quiescent current for this regulator is typically 4.3 rnA.
The 2.0 volt regulator was chosen to minimize dissipation and to
allow the output voltage to operate to within 6.0 V below the
input voltage.
Gnd ...-------~---~---_4_Gnd
*Mounted on common heat sink, Motorola MS·10 or equivalent.
When a boost transistor is used, short~ircuit currents are equal
to the sum of the series pass and regulator limits. which are
measured at 3.2 A and 1.8 A respectively in this case. Series pass
limiting is approximately equal to 0.6 V/RSC. Operation beyond
this point to the peak current capability of the MC7905C is pos-
sible if the regulator is mounted on a heat sink; otherwise thermal
shutdown will occur when the additional load current is picked up
by the regulator.
FIGURE 10 - OPERATIONAL AMPLIFIER SUPPLY
1±15 V@ 1.0Ai
+20 V
Input
0.33jlF
FIGURE 11 - TYPICAL MECL SYSTEM POWER SUPPLY
1-5.2 V@ 4.0 A and -2.0 V @ 2.0 A; for PC Boardi
-12 V
+15 V
Output
2
Input
-5.2 V
"lr---'V\I\r----.....-_Output
1N4001
or Equiv
Gnd
Gnd
-2.0 V
)r--'W'r---~--+-
-20 V
Input
Output
-15 V
Output
.....--4-_eGnd
Gnd e-----~~----~--~~
The MC7815and MC7915 positive and negative regulators may
When current-boost power transistors are used, 47~ohm base-toemitter resistors (R) must be used to bypass the quiescent current
at no load. These resistors, in conjunction with the VSE of the
NPN transistors, determine when the pass transistors begin con-
be connected as shown to obtain a dual power supply for operational amplifiers. A clamp diode should be used at the output of
the MC7815 to prevent potential latch-up problems.
ducting. The l-ohm and 4-ohm dropping resistors were chosen to
reduce the power dissipated in the boost transistors but still leave
at least 2.0 V across these devices for good regulation.
8-548
,----1
MC55107
MC55108
MC75107
MC75108
"'
DUAL LINE RECEIVERS
'------------'
MONOLITHIC DUAL LINE RECEIVERS
The MC55107/MC75107 and MC55108/MC75108 are MTTL compatible dual
DUAL LINE RECEIVERS
line receivers featuring independent channels with common voltage supply and
ground terminals.
The MC55107/MC75107 circuit features an active pull-up
MONOLITHIC SILICON
INTEGRATED CIRCUITS
(totem-pole) output. The MC55108/MC75108 circuit features an open-collector
output configuration that permits the Wired-OR logic connection with similar
outputs lsuch as the MC5401/MC7401 MTTL gate or additional MC551081
MC75108 receiversL Thus a level of logic is implemented without extra delay,
The MC55107/MC75107 and MC55108/MC75108 circuits are designed to
detect input signals of greater than 25 millivolts amplitude and convert the polarity of the signal into appropriate MTTl compatible output logic levels.
•
High Common-Mode Rejection Ratio
•
High Input Impedance
•
High Input Sensitivity
•
Differential Input Common-Mode Voltage Range of ±.3.0 V
•
Differential Input Common-Mode Voltage of More Than
Using External Attenuator
•
Strobe Inputs for Receiver Selection
•
Gate Inputs for Logic Versatility
•
MTTL or MDTL Drive Capability
•
High DC Noise Margins
± 15
V
L SUFFIX
PLASTIC PACKAGE
CERAMIC PACKAGE
CASE 646
CASE 632
IMC75107, MC75108 only)
ITO-t16)
CIRCUIT SCHEMATIC
VCCO-~~~~~--~-----1r------1~-------t----~
14
186
4 k
t.6 k
OUTPUT STROBE
2 Y
INPUTS
1A
2G
OUTPUT STROBE STROBE
18
'G
S
TRUTH TABLE
DIFFERENTIAL
INPUTS
A·B
STROBES
G
S
OUTPUT
y
V'O;;.25 mV
- 25 mV .-: V I 0 < 25
mVf---"---1I-"-":---1-::""'D:::''::T':':R''M",.:7A'''T::-I,
L
o~
H
l,. 0' H
850 850
186
4k
Co",nponents shown with dashed lines are applicable to the MC55107 and MC75107 onlv.
See Packaging Information Section for outline dimensions.
8-549
MC55107, MC75107, MC55108, MC75108 (continued)
MAXIMUM RATINGS IT A
=
T,ow' to Th;gh' unless otherwISe noted I
Rating
Power Supply Voltages
Symbol
Value
Unit
VCC
VEE
+7.0
-7.0
Vdc
VIO
+6.0
Vdc
Common-Mode I nput Voltage Range
VICR
+5.0
Vdc
Strobe Input Voltage
VIISI
5.5
Vdc
625
mW
mW/oC
Differential-Mode I nput Signal Voltage Range
Po
Power Dissipation (Package limitation)
Plastic and Ceramic Dual-in-line Packages
3.85
Derate above T A'" +25 0 C
Operating Temperature Range
MC55107, MC55108
MC75107, MC75108
°c
TA
-55 to +125
o to +70
T stg
Storage Temperature Range
°c
-65 to +150
RECOMMENDED OPERATING CONDITIONS
Characteristic
DEFINITIONS OF INPUT LOGIC LEVELS
Symbol
Test Fig.
Min
Mo.
Unit
High-Level Input Voltage (between differential inputs)
VIOH
1
0.025
5.0
Vdc
Low-Level Input Voltage (between differential inputs)
VIOL
1
-5.0t
-0.025
Vdc
HIgh-Level Input Voltage {at strobe inputs}
VIHISI
3
2.0
5.5
Vdc
Low-Level Input Voltage (at strobe inputs)
VILISI
3
0
0.8
Vdc
Characteristic
tThe algebraic convention, where the most positive limit is designated maximum, is used with Low·Level Input Voltage Level (VIOL)
ELECTRICAL CHARACTERISTICS ITA
Tlow' to T
=
• unless otherwise noted)
Characteristic
Symbol
High-Level Input Current to lA or 2A Input
IVCC = Max, VEE = Max, VIO = 0.5 V, VIC = -3.0 V
to +3.0 VI •
Low-Level Input Current to lA or 2A Input
IVCC = Max, VEE
to +3.0 VI •
= Max, VIO = -2.0 V, VIC
rrent to
-3.0 V
=
nput
IVCC = Max, VEE = Max, VIHISI = 2.4 VI.
IVCC = Max, VEE = Max, VIHISI = VCC Maxi.
Low-Level I nput Current to S Input
IVec = Max, VEE = Max, VILISI = 0.4 VI.
High-Level Output Voltage
VOH
IVec = M;n, VEE = Min, Iload = -400"A,
= -3.0 V to +3.0 VI.
VOL
= 16mA
'CEX
IOSC
t: For conditions shown 8S Min or Max, use the appropriate value specified under recommended operating conditions for
IAII typical values are at Vee'" +5.0 V, Vee'" -5.0 V, T A = +25 0 e.
I INot more than one output should be shorted at a time.
-Tlow = 55 0 C for MC55107 and MC55108,
== 0 for MC75107 and MC75108
Thigh = +125 0 C for MC55107 and MC5510e;
== +70 o C for MC75107 and MC75108
8-550
the applicable device type.
MC55107 , MC75107, MC55108, MC75108 (continued)
SWITCHING CHARACTERISTICS
IVcc
0
+5.0
V, VEE
0
-5.0
V, TA
0
+25 0 C)
Characteristic
Unit
Propagation Delay Time, low-to-high level from
differential inputs A and B to output
(RL = 390 0, CL = 50 pF)
(RL = 390 0, CL = 15 pF)
ns
19
25
ns
Propagation
differential inputs A and B to output
(RL = 3900, CL = 50 pF)
(RL =390 0, CL = 15 pF)
26
19
ns
input to G or S output
(RL = 3900, CL = 50 pF)
(RL = 390 0,
= 15 pF)
20
13
Propagation Delay Time, high-to-low level, from strobe
input G or S to output
(RL = 390 0, CL = 50 pF)
(RL = 390 0, CL = 15 pF)
7
tpHL(S)
ns
20
13
TEST CIRCUITS
FIGURE 1 - VIOH and VIOL
VCC
FIGURE 2 - IIH and IlL
20
'load
-
JiRNot.
IV
I sink
See
Vo
2V
1
VIC
!
2V
I OPEN
I
2s1
L----"1"~;;---.J
NOTE: Each pair of differential inputs is tested
separately. The inputs of the other pair
are grounded
NOTE: When testing one channel, the inputs of
the other channel are grounded.
FIGURE 3 - VIH(S), VIL(S), VOH, VOL, and IOH
VIHIS)
VILIS)
~
10
Soe
Test
S
Table 1--"2-=0_ _ _ _ _--.
-
Islnk,ICEX
V8r_
0
~
I
I
I
VIC
-t
-
I2 V
I.ink, 'CEX
_
Table
I
L------:f~~---J
2BI
'=
VOH
VOH
VOH
VOL
Vo
8-551
TEST TABLE
MC55108
MC7510B
VID
APPLY
ICEX
1
STROBE lG or 2G STROBE S
+25mV
-25mV
VIH(S)
V'1iJl;1
'CEX
'CEX
VILIS)
VIHIS)
VIH(S)
-25 mV
VOL
-25mV
VI.H(S)
VILIS)
V'HIS)
NOTES: 1. VIC· -3.0 V to +3.0 V.
1
' load
I
TEST
I
I
Test
MC55t07
MC76107
2. When tetting one channel, the inputs of the other channel
should be grounded.
MC55107, MC75107, MC55108, MC75108 (continued)
TEST CIRCUITS
(continued)
FIGURE 4 - IIH(G). IIL(G). IIH(S). and IIL(S)
VIH(S)-J
-
lG
Se.
Test
5
Table
2G
VIL(S)
VEE
I ILIS)
I
I
OPEN
I
I
I
5 ••
Test
Table
12 y
OPEN
TEST
INPUT lA
INPUT2A
STROBE lG
STROBE S
IIH at Strobe 1G
+25 mV
Gnd
VIHIS)
Gnd
STROBE 2G
Gnd
"H at Strobe 2G
Gnd
+25 mV
Gnd
Gnd
VIHIS)
+25 mV
+25 mV
Gnd
25 mV
Gnd
VILIS)
VIHIS)
4.5 V
Gnd
IlL at Strobe 1G
"L at Strobe 2G
Gnd
-25 mV
Gnd
4.5 V
VIL(S)
-25 mV
-25 mV
4.5 V
VIL(S)
4.5 V
"H at Strobe S
I'L at Strobe S
FIGURE 5 - lOS
Gnd
FIGURE 6 - ICC and lEE
VEE
Vee
r_1_2~ ~ ~
lA
=
;:Jt~~~"_Jh;
VEE
__ 1_-,
I
I
I
IAI
I
I
I
I
I
I
I
VIO
25 ,;,V
11Y
I
I
I
25mV
I
I
1 2Y
1 2Y
I
I
2BI
L-----J;'-------1
.,:t.GND
NOTES: 1. Each channel is tested separately.
2. Not more than one output should be tested at one time.
8·552
MC55107, MC75107, MC55108, MC75108 (continued)
TEST CIRCUITS
(continued)
FIGURE 7 - PROPAGATION DELAY TIME TEST CIRCUIT
AND WAVEFORMS
VEE
DIFFERENTIAL
INPUT
lA
OUTPUT
MC55107
r-------- J --------,I
I
MC75107
I
..........----o-i--t+
I
11V
I
I
I
50 pF
See Note 3
I
I
I
I
-=
See Note 4
390
S
lG
2G
Vce
390
OUTPUT
t---------4--V~----i_--------.MC5510B
CL
1
r---,---------- .
II '--_-*" _ _ _..J
I
I
iI
tPLH(D) ....,
t p 2 - - - -......
~1
I
!
---I
I-
I
'~,.v
I-- tPHL(D)
I
I
I
k:--'L::'"'"
~
OV
1""----
r--tpl--f
I
0',""
200 mV
100 mV
I
I
STROBE
INPUT
Gar S
5 PF
~S •• Not. 3
STROBE
INPUT e--------4~---J~~--_,
See Note 2
INPUT
A
MC7510B
-i
~
3V
'
F-t:_
NOTES: 1. The pulse generators have the following characteristics:
Zo
OV
I
fr,-5-V-----------I-----..i,~HVL~~
~~J---J
,,_.
_'5V
__
_ _ _ _ _ _..J,
= 50 n.
~
tr "" tf
= 10 ±.5 ns,
VOL
tpl = 500 ns, PAR"" , MHz
tp2 = 1 ms, PRR = 500 kHz.
2. Strobe input pulse is applied to Strobe 1 G when I "puts 1 A-' B are being tested. to Strobe S when Inputs 1 A-' B or 2A-2B
are being tested, and to Strobe 2G when inputs 2A-2B are being tested.
3. CL includes probe and jig capacitance.
4. All diodes are lN916 or equivalent.
TYPICAL APPLICATION
FIGURE 8 - MOSoTO-TTL TRANSLATOR
+5 V
18 k
. -________-., DA T A
OUT
1/2 MC75107 OR MC75108
r:------,
I
+--c>--t-l
D-+-o---_
200
TRANSLATED
DATA OUT
200
STROBES
8-553
/
1L~
MC55325
MC75325
_________
D_U_A_L_M_E_M_O_R_Y__D_R_IV
__
ER____~
DUAL MEMORY DRIVER
The MC55325175325 is a monolithic integrated circuit memory
driver with logic inputs, and is designed for use with magnetic
memories.
The device contains two 600-mA source-switch pairs and two
600·mA sink-switch pairs. Source selection is determined by one of
two logic inputs, and source turn-on is determined by the source
strobe. Likewise, sink selection is determined by one of two logic
inputs, and sink turn-on is determined by the sink strobe. With this
arrangement selection of one of the four switches provides turn-on
with minimum time skew of the output current rise.
•
600-mA Output Capability
•
Output Short-Circuit Protection
•
Input Clamp Diodes
•
Dual Sink and Dual Source Outputs
•
MDTL and MTTL Compatibility
•
24-Volt Output Capability
DUAL MEMORY DRIVER
MONOLITHIC SI LICON
INTEGRATED CIRCUIT
[::::::1
16
(top view)
.L SUFFIX
CERAMIC PACKAGE
CASE 620
PSUFFIX
PLASTIC PACKAGE
CASE 648
(MC75325 only)
MAXIMUM RATINGS ITA = 25°C unless otherwise noted!
Rating
Symbol
Value
Unit
VCCI
VCC2
7.0
25
Vdc
Vdc
I nput Voltage
Vin
5.5
Vdc
Power Dissipation (Package Limitation)
Ceramic and Plastic Dual In-Line Pkg.
Derate above T A = +2SoC
Po
1.0
W
mW/oC
Operating Temperature Range
TA
Supply Voltage INote I!
6.6
MC55325
MC75325
Storage Temperature Range
VCC2
B
Source W
Collectors
A
Node
R Aint
D
Z
VeCl
C
Y
Gnd
°c
-55 to +125
o to +70
T stg
-65 to +150
°c
Note 1. Voltage values are with respect to the network ground terminal.
S1
S2
~
Strobes
SWITCHING CHARACTERISTICS IVCCI = 5 0 V CL = 25 pF TA = 25°C)
Characteristic
Propagation Delay Time to Source Collectors
IVCC2 = 15 V. RL = 24 ohms!
Low-to-H igh-Level Output
High-to-Low-LeveIOutput
Symbol
tpLH
tPHL
ns
Typ
Max
25
25
50
50
Transition Time to Source Outputs
IVCC2 = 20 V. RL = 1 k ohms)
Low-to-H igh-Level Output
High-to-Low-LeveIOutput
Propagation Delay Time to Sink Outputs
IVCC2 = 15 V. RL = 24 ohms!
Low-to-High-LeveIOutput
H igh-to-Low-Level Output
Transition Time to Sink Outputs
IVCC2= 15 V. RL = 24 ohms!
Low-to-H igh-Level Output
H igh-to-Low-Level Output
Storage Time to Sink Outputs
IVCC2 = 15 V. RL = 24 ohms)
tTLH
tTHL
55
7.0
-
tPLH
tpHL
20
20
45
45
tTLH
ITHL
7.0
9.0
15
20
ts
15
30
TRUTH TABLE
ADDRESS INPUTS
SOURCE
A
B
,
H
X
X
X
H
8-554
, ,
,
H
X
X
H
X
X
X
X
H
X
X
H
H
X
H
SOURCE
SINK
81
82
OUTPUTS
,,
H
H
H
X
H
H
,,
H
X
SOURCE
W
X
0"
0"
0"
0"
0"
0"
0"
0"
0"
0"
0"
0"
SINK
Y Z
Off
Off
On
Off
Off
Off
Off
Off
Off
On
Off
Off
H ::: high level, L == low level, X"" irrelevant
NOTE: Not more than one output is to be on
at anyone time.
This is advanee information on a new introduction and specifications are subject to change Without notice.
See Packaging Information Section for outline dimensions.
SINK
C
0
STROBE INPUTS
MC55325, MC75325 (continued)
ELECTRICAL CHARACTERISTICS (T A
=
Tlow# to Thigh# unless otherwise noted.
Off-5tate Current, Source-Collectors Terminal
(VCCI = 4.5 V. VCC2 = 24 V)
TA = Tlow to Thigh
TA = 25°C
loft
I'A
3.0
High-level Sink Output Voltage
(VCCI = 4.5 V. VCC2 = 24 V. 10 = 0)
VOH
Saturation Voltage**
Source Outputs
V sat
(VCCI = 4.5 V. VCC2 = 15 V. Isource "" -600 rnA. Rl = 24 ohms.
Note 2)
T A = Tlow to Thigh
TA = 25°C
Sink Outputs
200
200
V
23
V
0.9
0.43
(VCC! = 4.5 V, VCC2 = 15 V, Isink "" 600 rnA. Rl = 24 ohms,
Note 2)
T A = Tlow to Thigh
T = 25°C
0.9
0.43
Input Current at Maximum Input Voltage
rnA
(VCC! = 5.5 V, VCC2 = 24 V. VI = 5.5 V)
Address Inputs
Strobe Inputs
1.0
2.0
High-level I nput Current
(VCCI = 5.5 V, VCC2 = 24 V, VI = 2.4 V)
I'A
Address Inputs
Strobe Inputs
Low-Level I nput Current
(VCCI = 5.5 V, VCC2 = 24 V. VI = 0.4 V)
Address Inputs
Strobe I
-1.0
-2.0
-1.6
-3.2
14
7.5
22
20
55
70
rnA
32
50
rnA
rnA
ICC(off)
From VCC1
From VCC2
ICC2
"All typical values are at TA
= 25°C.
""Not more than one output is to be "on" at anyone time.
= -55°C for MC55325, OOC for MC75325
= +125 0 C for MC55325. +700 C for MC75325
pulse width = 2001's. duty cycle';; 2%.
# Tlow
Thigh
NOTE 2. Saturation voltage must be measured using pulse techniques:
8-555
/
______I
~~_____________D_U__A_L_L_I_N_E_D_R_I_V_E_R_S~
MC75109
MC75110
MONOLITHIC DUAL LINE DRIVERS
DUAL LINE DRIVERS
The MC75109 and MC7511 0 dual line drivers feature independent
channels with common voltage supply and ground terminals. Each
driver circuit provides a constant output current that switches to
either of two output terminals subject to the appropriate logic levels
at the input terminals. Output current can be switched "off"
(inhibited) by appropriate logic levels at the inhibit inputs. Output
current is nominally six milliamperes for the MC75109 and twelve
millamperes for the MC7511 O.
The inhibit feature permits use in party·line or data-bus applications. A strobe or inhibitor, common to both drivers, is included to
increase driver-logic versatility. With output current in the inhibited
mode,IO(off), is specified so that minimum line loading occurs when
the driver is used in a party·line system with other drivers. Output
impedance of the driver in inhibited mode is very high (the output
impedance of a transistor biased to cutoff).
All driver outputs have a common-mode voltage range of -3.0 volts
to +10 volts, allowing common·mode voltage on the line without
affecting driver performance.
MONOLITHIC SILICON
INTEGRATED CIRCUIT
f::::::]
1
(top view)
LSUFFIX
CERAMIC PACKAGE
CASE 632
(TO·116)
• Insensitive to Supply Variations Over the Entire Operating Range
• MTTL Input Compatibility
• Current·Mode Output (6.0 rnA or 12 rnA typical)
• High Output Impedance
P SUFF IX
PLASTIC PACKAGE
CASE 646
• High Common· Mode Output Voltage Range (-3.0 V to + 10 V)
• Inhibitor Available for Driver Selection
INHIBIT
INPUT
OUTPUTS
Vee 1Y
12 VEE
0
OUTPUTS
22
2Y
TRUTH TABLE
LOGIC INPUTS
INHIBITOR
INPUTS
OUTPUTS
A
B
C
D
Y
Z
Lor H
Lor H
L
Lor H
H
H
Lor H
Lor H
Lor H
Lor H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
L
Lor H
H
Low output represents the "on" state.
High output represents the "off" state.
1A
18
LOGIC
INPUTS
lC
2C
INHIBIT
2A
28 GND
LOGIC
INPUTS
INPUTS
See Packaging Information Section for outline dimensions.
8-556
L
MC75109, MC75110 (continued)
MAXIMUM RATINGS ITA = 0 to +700 C unless otherwise noted.1
Ratings
Svmbol
Value
Unit
VCC
VEE
+7.0
Volts
Vin
5.5
Volts
Common-Mode Output Voltage Range
ISee Note 1)
VOCR
-5.0 to +12
Volts
Power Dissipation (Package Limitation)
Po
Power Supply Voltages
ISee Note 11
Logic and Inhibitor Input Voltage.
ISee Note 1)
-7.0
Plastic and Ceramic Dual In-Line Packages
Derate above T A
= +2SoC
Operating Temperature Range
TA
Storage Temperature Range
Ceramic Dual In-line Package
1000
3.85
mW
mW/oC
o to +70
°c
°c
T stg
-65 to +150
-55 to +150
Plastic Dual I n-Line Package
RECOMMENDED OPERATING CONDITIONS ISee Notes 1 and 2)
Characteristic
Power Supply Voltages
Common-Mode Output Voltage Range
Symbol
Min
Nom
Max
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Volts
Volts
VOCR
Positive
0
0
Negative
-
+10
-3.0
Note 1. These voltage values are in respect to the ground terminal.
Note 2. When using only one channel of the line drivers, the other channel should be
inhibited and/or its outputs grounded.
DEFINITIONS OF INPUT LOGIC LEVELS*
Symbol
Test Fig.
Min
Max
Unit
High-Level Input Voltage lat any input!
VIH
1,2
2.0
5.5
Volts
Low-Level I nput Voltage (at any input)
VIL
1,2
0
0.8
Volts
Characteristic
* The algebraic convention, where the most positive limit is designated maximum, is used with
Logic Level I nput Voltage Levels only.
8-557
MC75109, MC75110 (continued)
E LECTR ICA L CHARACTER ISTICS IT
Characteristic::: :::
Unit
High-Level Input Current to lA, 18, 2A or 28
IVee
IVee
=
=
Max, VEE = Max, VIHL = 2.4 VI"
Max, VEE = Max, VIH = Vee Maxi
Low-Level Input Current to 1A, lB, 2A or 28
IVee = Max, VEE
=
40
1.0
IILL
"A
mA
mA
Max, VILL = 0.4 VI
-3.0
High-Level Input Current into lC or 2C
IVee = Max, VEE = Max, VIHI = 2.4 VI
'IVee = Max, VEE = Max, VIH = Vee Maxi
40
1.0
"A
mA
mA
. VI
-3.0
80
2.0
"A
mA
mA
= 0.4 VI
IOlonl
3
"A
100
mA
35
mA
-50
mA
21:
lEE loffl
4
-1'7 .
mA
"All typical values are at Vee = +S.O V, VEE = -S.O V.
##For conditions shown as Min or Max, use the appropriate value specified under recommended
operating conditions for the applicable device typ~:
SWITCHING CHARACTERISTICS IVee = +50 V VEE = -S 0 V TA = +2soe.1
Characteristic
Symbol
Propagation Delay Time from Logic Input A or B to
Output Y or Z IR L = SO ohms, eL = 40 pFI
Test Fig.
Min
Typ
Max
S
Propagation Delay Time from I nhibitor Input C or 0
. to Qutput YorZ IRL = SOohms,eL =40pFI
ns
-
tPLHL
tPHLL
9.0
9.0
15
15
S
tPLHI
tPHLI
8-558
Unit
ns
-
16
13
25
25
MC75109. MC75110 (continued)
TEST CIRCUITS
IIH
VIH
See
Tabla
OUTPUTS
IlL
VIL
2BL
122
--;0,- - - --'
l
GND
TEST TABLE
TEST AT ANY
LOGIC INPUT
LOGIC INPUTS
NOT UNDER TEST
ALL INHIBITOR
INPUTS
VIHL
Open
VIHI
Vee
VILL
OUTPUT
lY or 2Y
H
(See Note 1)
VIHI
OUTPUT
lZor2Z
L
(See Nots 1)
L
H
(See Notel)
(See Note 1)
IIHL
4.5 V
VIHI
Gnd
Goo
IILL
Gnd
VIHI
Gnd
Gnd
NOTES:
1. Low output represents the "on" statB, high output represents the "off" state.
2. Each input is tested separately.
3. Arrows indicate actual direction of current flow.
FIGURE 2 - VIH. VIL.IIH.IIL
Vee
lA
r
vEe
J----l-,
11Y
OUTPUTS
VIL
VIH~'H See
V,L
4-
Table
I--<>+-·L
IlL
2BL
-..l22
--;.~---
TEST TABLE
TEST AT ANY
INHIBITOR INPUT
VIHI
VILI
ALL LOGIC
INPUTS
VIHL
VIL
OUTPUT
lZor 2Z
INHIBITOR INPUTS
NOT UNDER TEST
OUTPUT
lYor2Y
Open
H(See Note 1)
L(S .. Note 1)
Open
L(See Note 1)
H (See Note 1)
VIHL
Vee
H(S.e Note 11
H(SeeNote 1)
VIL
H(Sse Note 1)
H (See Note 1)
Gnd
Gnd
Gnd
Goo
IIHI
Gnd
Vee
4.5 V
IILI
Gnd
Gnd
8-559
MC75109, MC75110 (continued)
TEST CIRCUITS
(continued)
FIGURE 3- 10(on) and 10(off)
V I H - - f 5 ••
VILe--lTabl.I--<>-+--L_/
VIHJT~~~.
5 ••
OUTPUTS
Table
J--.Q-f---l_-"
VIL
VIH:={S ••
V IL
Table I--8
If 01 is "on", 02 is "off", Diode 01 is "off" and current
IS 1 flows through 01 and IS 2 to VEE. However, if Ql is "off",
and 02 is "on", the current IS 1 flows through diode 01 to
output A and current from output B flows through Q2 to current
sink IS 2.
FIGURE 14 - "PUSH·PULL" SYSTEM SHOWING BOTH LOGIC CONDITIONS
c
.~
c
Differential
Receiver
'E
~
8-568
MC75113L (continued)
FIGURE 15 - COMPARISON OF GROUNO CURRENTS IN "PUSH-PULL" ANO
"PULL-ONLY" DATA TRANSMISSION SYSTEMS
"Pull~Only"
Differential Line Driver Typical Mismatch
of Output Currents Indicated 110 mAl
OmA _____
-
o rnA
o rnA
..
5 rnA
..
5 rnA
lOrnA
"Push·Pull" Differential Line Driver Typical Mismatch
of Output Currents Indicated (2 mA)
----22 rnA
-
11 rnA
11 rnA
..
lOrnA
lOrnA
20 rnA
DIFFERENTIAL PARTY-LINE OPERATION
Often in large computer systems it is desirable to attach
several drivers and receivers at different points along a
transmission line. Figure 16 shows an example of such a
Party-Line or Data Bus System. Only one driver may be
active at a time but all receivers may be active simultaneously. Such sharing or multiplexing of transmission
lines results in considerable savings and flexibility in systems interconnections. Isolation of inactive drivers from
the active driver is essential in party-I ine operation_ The
MC75113L guarantees this isolation even when power
supplies of some of the drivers in the system are "off"_
This important feature makes it unnecessary to simultaneously power-up all system components when the use
of only a few is required. As noted previously, all types of
differential driver systems have the advantage of differential noise cancellation not available with single-ended
driver systems. However, in multiple driver or party-line
systems the MC75113L, with "Push-Pull" outputs, has
the additional advantage of eliminating the uncancelled
common-mode noise spike which occurs during the
"enable" and "inhibit" cycles (required for party-line
operation in "Pull-Only" differential line drivers).
LINE TERMINATION
In any high-speed data transmission system proper
termination to prevent reflections is necessary_ Transmission line pairs in close proximity to ground such as
8~569
MC75113L (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 16 - A DIFFERENTIAL PARTY-LINE SYSTEM
I
L
_P.!Ee!:.Ia~_J
Balanced, terminated transmission line,
i.e., twisted-pair linas.
!custa;;;r - - -
I
I
J
Equipment
I
I
I
I
I
I
I
I
I
L _____ .J
I
L _____ .J
FIGURE 17A - CIRCUIT FOR zdm MEASUREMENT
Transmission L.ine Pair
microstrip, stripline, ribbon cable, and shielded twistedpair, exhibit two distinct characteristics impedances_ The
common-mode characteristic impedance (zcm) is due to
the two lines being at the same potential and carrying
equal currents in the same direction_ The differential-mode
characteristic impedance (Zdm) is due to the lines being at
equal but opposite potentials and carrying equal currents
in opposite directions_ Since both common-mode noise
and differential-mode data signals will be present on the
transmission lines, the lines must be terminated so that
both types of signals will be absorbed rather than reflected
at the termination points_ The differential-mode characteristic impedance of a particular line may be measured
from the circuit in Figure 17A_ The pulse transformer is
used to assure equal and opposite voltage and current
excursions on the pair of lines_ The value of zdm for each
line is equal to the value of the resistor needed to prevent
differential-mode reflections from appearing on the lines.
The circuit of Figure 17B may be used to measure the
value of common-mode characteristic impedance, Zcm. The
flO
Pulse
Generator _
tpLH <2 ns
-=
RT
When AT"" zdm. no Differential-Mode reflections occur.
FIGURE 17B - CIRCUIT FOR Zem MEASUREMENT
Transmission Line Pair
Pulse
Generator
tpLH <2 ns
(Shield or grounded lines
-=
in cable.)
When RT "" zem' no Common-Mode reflections occur.
8-570
MC75113L
(continued)
APPLICATIONS INFORMA nON (continued)
The value of R6 is equal to Zcm. The value of R2 may be
calculated from Equation 1. The value of R 1 and R3 may
be calculated from Equation 2 and 3 using the desired
value of offset voltage, VIO, and supply voltages, VCC
and VEE.
value of resistors which prevent common-mode reflections
is zcm. When measuring zcm and zdm for lines which are
part of a cable contain ing many lines, it is important to
terminate the remaining lines in approximately the same
way as they will eventually be terminated. This is because
the number of grounded conductors and terminated conductors in the cable will affect the value of zcm and zdm
measured.
Since 2 zcm
zdm, it is always possible to choose a
delta bridge of resistors which will correctly terminate
both the common-mode and differential-mode signals. The
common-mode signal is correctly terminated by a resistor
of value zcm to ground from each line. The differentialmode signal is correctly terminated by a resistor whose
value may be calculated from Equation 1.
>
R2 = 2(zdm (zcm)
Rl =Zdm x VCC
2
VIO
(2)
R3 = -zdm x VEE
2
VIO
(3)
The resistor values R4 and R5 are chosen so that the
parallel combinations of R 1 and R4 and also R3 with R5
each equal zcm:
(1)
2 zcm - zdm
Additional information regarding common-mode and differential-mode characteristic impedance may be found in
References 1 and 2. (In the References zcm = zoe, the
"even" mode characteristic impedance, the zdm = 2z oo ,
the "odd" mode characteristic impedance.)
R4=zcm (Rl)
Rl - zcm
(4)
R5=zcm (R3)
R3 - zcm
(5)
The choice of offset voltage, VIO, depends upon the differential mode characteristic impedance. Since the minimum total differential signal produced by the MC75113L
onto a properly terminated transmission path is:
USE WITH POPULAR DIFFERENTIAL RECEIVERS
The differential·output signal of the MC75113L is zero
when the output is "off". However, popular differential
line receivers such as the MC75107, which have thresholds
of approximately ±25 mV, require a positive differential
signal to turn "on" and a negative differential signal to
turn "off." Therefore, when using the MC75113L (which
has no negative output signal) with th is type of line receiver the line must be offset in voltage to provide the
required negative differential signal. This is easily accomplished using the termination scheme shown in
Figure 18.
.
.
18mA
V driver min = -2--x (Zdm) (volts)
The amount of offset voltage for equal noise margin on
both sides of the receiver's zero volt threshold should be:
V
10 =
V driver min
4.5 mA x zdm (volts)
2
FIGURE 18 - TERMINATION SCHEME FOR USE WITH
POPULAR DIFFERENTIAL RECEIVERS
Vcc
R1
II R4 =
(6)
zem
MC75113L
Driver
R6:::: zcm
R2
A6
MC75107
Receiver
R311R5=zem
8-571
c:
zcm
(7)
MC75113L (continued)
APPLICATIONS INFORMATION (continued)
REFERENCES
1. Ivor Catt, "Crosstalk (Noise) in Digital Systems", IEEE
Transactions on Electronic Computers, Vol. EC·16,
No.6, pp. 743·763, December 1967.
2. S. B. Cohn, "Shielded Coupled-Strip Transmission
Lines," IRE Transactions Microwave Theory and Tech·
niques, Vol. MTT-3, pp. 29-38, October 1955.
3. Motorola Application Note AN-708, "Line Driver and
Receiver Considerations."
EXAMPLE OF CALCULATION OF TERMINATION
RESISTOR VALUES
Suppose the MC75113L is to be used with VCC = +5.0
volts and VEE = -6.0 volts to drive a transmission line
with zcm = 85 .12 and zdm = 112 n. The offset vo Itage
required for equal noise margin on both sides of the
receiver'szero·volt threshold isfound by Equation 7 to be:
VIO = 4.5 mA x (112) = 0.504 volts
(8)
From Figure 17 it may be seen that R6 = zcm = 85.12.
R2 is found from Equation 1:
R2
2 (112) (85) = 328.12
2 (85) -112
(9)
R 1 and R3 are found from Equations 2 and 3 to be:
R 1 = ~ x _5_ - 556 .12
2
0.504
(10)
R3=-112 -6.0 V =667.12
2 x 0.504
(11)
R3 and R5 are found from Equation 4 and 5:
R4 = 85 (556) = 100.12
556-85
(12)
R5 = 85 (667)= 97 .12
667-85
(13)
The resulting structure is shown in Figure 19.
FIGU~E
19 - EXAMPLE CALCULATION OF TERMINATION
AND RECEIVER BIASING RESISTORS
Vce = +5.0 V
+
Vcc
=
+0.252 V
R6
= 85 n
R2
= 328 n
VEE = -0.252 V
R6 - 85
MC75107
Receiver
8-572
n
MC75140Pl
"\
~
DUAL LINE RECEIVER
_ _ _ _ _ _ _-----'
MONOLITHIC DUAL LINE RECEIVER
The MC75140Pl is a dual line receiver with common Strobe and
Reference inputs. The Reference voltage is externally applied. This
voltage may range from 1.5 to 3.5 volts, thus allowing for adjustment of maximum noise immunity in a given system design. The
MC75140Pl is intended for use as a single-ended receiver in MTTL
systems. Use in a party-line (bus-organized) system is aided by the
low input current of the receiver.
• Single +5.0-Volts Power Supply
DUAL
LINE RECEIVER
MONOLITHIC 51 LICON
INTEGRATED CIRCUIT
o
8
• ±100-mV Sensitivity
• Low Input Current
• MTTL Compatible Outputs
• Adjustable Reference Voltage
(top view)
• Common Output Strobe
•
CIRCUIT SCHEMATIC
(1/2 Circuit Shown)
Vcc
PLASTIC PACKAGE
r-~--~~----~----~--~----~-o8
1.5 k
CASE 626
4k
PIN CONNECTIONS
4)0
Vcc
REFERENCE
OUTPUT
1
INPUT
REF.
LINE
INPUT INPUT 1
STR08E
INPUT
TYPICAL APPLICATION
HIGH FAN-OUT FROM A STANDARD MTTL GATE
STROBE INPUT
OUTPUT
1
STROBE
LINE
INPUT INPUT 1
GNO
N" 1
FUNCTION TABLE
LINE INPUT
OUTPUT
H
100 mV
L
Vref+ 100mV
X
L
X
H
L
Vref -
STROBE INPUT
STROBE
Positive Logic
H = High Level, L "" Low Level,
X = Nonsignificant
*Most MC5400/MC7400 devices are capable of maintaining
a2.4·volt level under loads up to 7.5mA.
See Packaging Information Section for outline dimensions.
8-573
•
MC75140P1 (continued)
MAXIMUM RATINGS IT A = 0 to +100C unless otherwise noted)
Symbol
Value
Unit
Vee
7.0
Volts
Reference Voltage
Vref
VilLi
5.5
-2.0 to +5.5
Volts
Line Input Voltage (with respect to Ground)
±5.0
5.5
Volts
830
6.6
o to +70
-65 to +150
mW
mW/oC
Rating
Supply Voltage
Line Input Voltage (with respect to VrefJ
VIILI-V ref
Strobe Input Voltage
VIIS)
Power Dissipation (Package Limitation)
Volts
Volts
PD
Plastic Dual In-Line Package
Derate above T A ::: +2SoC
Operating Temperature Range (Ambient)
TA
T stg
Storage Temperature Range
°c
°e
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage
Symbol
Min
Nom
Max
Unit
Vee
4.5
5.0
-
5.5
3.5
Volts
5.5
+70
Volts
Vref R
1.5
Input Voltage Range (Line or Strobel
VIR
Operating Ambient Temperature Range
TA
0
0
Reference Voltage Range
-
-
ELECTRICAL CHARACTER ISTICS IVee = 50 V -+10% Vref = 1.5 to 3.5 V T A = 0 to +70 0 e unless otherwise noted )
Min
Typ*
Characteristic
Symbol
Max
High-Level Line Input Voltage
Vref + 100
VIHILI
Low-Level Line Input Voltage
VILILI
High-Level Strobe Input Voltage
VIHIS)
Low-Level Strobe Input Voltage
VILIS)
High-Level Output Voltage
_.
-
2.0
-
Strobe Input Clamp Voltage
mV
Volts
0.8
-
Strobe Input Current (at max Input Voltage)
Volt
-
-
-
-
-
-
2.0
80
100
200
-
0.4
0.4
Volts
-1.5
mA
IllS)
VIIS) = 5.5 V
Volt
-
VIIS)
IllS) = -12 mA
mV
-
VOL
VIHILI = Vref + 100 mV, VILIS) = 0.8 V, 10L = 16 rnA
VILILI = Vref -100 mV, VI HIS) = 2.0 V, 10L = 16 rnA
Unit
Volts
2.4
VILILI = Vref -100 mV, VILIS) = 0.8 V, 10H = -400 ~A
°e
Vref -100
VOH
Low-Level Output Voltage
Volts
High-Level Input Currents
~A
Strobe IVIIS) = 2.4 V)
Line IVIILI = Vee, Vref = 1.5 V)
Reference IVref = 3.5 V, VilLi = 1.5 V)
IIHIS)
II HILI
IIHlrefi
-
35
70
II LIS)
IILILI
IILlrefi
-
-
-
Low-Level Input Currents
Strobe IVIIS) = 0.4 V)
Line IVIILI = 0 V, Vref = 1.5 V)
Reference IVref = 0 V, VilLi = 1.5 V)
Short-Circuit Output Current* *
-
-3.2
-10
-20
-18
Vee= 5.5 V
-
-55
-
18
30
Supply Current (output low)
-
20
35
rnA
leeL
VIIS) = 0 V, VilLi = Vref + 100 mV
~A
mA
leCH
VIIS) = 0 V, VilLi = Vre! - 100 mV
~A
mA
lOS
Supply Current (output high)
rnA
SWITCHING CHARACTER ISTICS IVce = 5.0 V, Vref = 2.5 V, eL = 15 pF, R L = 400 12, T A
=
+25 0 e unless otherwise noted.)
See Figure 1
Symbol
Characteristic
Min
Propagation Delay Time (Iow-to-high level output from Line input)
tPLHILI
-
Propagation Delay Time (high-to-Iow level output from Line input)
tPHL L
-
Propagation Delay Time (Iow-to-hlgh level output from Strobe input)
tPLHIS)
-
Propagation Delay Time (high-to-Iow level output from Strobe input)
tpHLIS)
-
* All typical values are at Vce '" 5.0 V, T A -= +250 e.
HOnly one output should be shorted at a time.
8-574
Typ
Max
Unit
22
22
12
35
30
ns
22
15
ns
8.0
ns
ns
MC75140P1
(continued)
FIGURE 1 - SWITCHING TIMES TEST CIRCUIT AND WAVEFORMS
tTLH . 10 [,,"""*'i
Vee
I--
I
OUTPUT
t-- tTHl
--+
I
I
'. 10 ns
I
~:-------------l~L'~V L:lvT\10~_'
.:
Vref
2.5 V
STROBE
INPUT
STROBE
INPUT
..._-o-j----L--"
I
MC75140Pl
I
I
I tTLH'
I
I
I
I
I
I
10% I
I
IOns ---:
I
I
="'----0 v
I
I
I
'----l_--....J 1_
~~;~~I~
eL
f---------t- tPLHILI f-.1
tPHL{L)
I
I
15pF
2.7V
2.3V
tPHL(SI
I
I
VOH
OUTPUT
(incfude stray
and jig capacitance)
FIGURE 2 - OUTPUT VOLTAGE versus
LINE INPUT VOLTAGE
5.0
Vee~5.0V
4.0
00
~
0
Vre l=2.5V
-
Vioi~: ~2~Oe
-
~ 3.0
w
co
'"
~
0
> 2.0
~
!;
0
1.0
6
>
1.0
3.0
2.0
ViolLI, LINE INPUT VOLTAGE (VOLTSI
4.0
50
FIGURE 4 - TRANSFER CHARACTERISTICS FOR
SCHMITT TRIGGER
FIGURE 3 - SCHMITT TRIGGER
~
3.0 1---+-+--+-+--+----1+---+-+---+--++----1-+----1---1
o
~
w
co
SIGNAL
INPUT
'" 2.0 f--+-+--+-+--+----1H---+-+----j--tic-lC-+-I---j
~
X>-t-
e-
O>
~
~ 1.01---+-+--+-+--+----1I+---+-+----j--++----1-+----1---I
6
>
STROBE
0.5
8-575
1.0
1.5
2.0
2.5
Vio, INPUT VOLTAG E IVO LTSI
3.0
3.5
MC75140Pl
(continued)
FIGURE 5 - GATED OSCILLATOR
OUTPUT
15 k
STRO~
tw
FIGURE 6 - GATE OSCILLATOR FREQUENCY
versus RC TIME CONSTANT
FIGURE 7 - DUAL BUS TRANSCEIVER
10 0
+5 V
t
W
0
Vrej' 1.5 V
01--
~
l -----,
Vee 5V
TA' +25 0 e
r-
V
of-- r- ~
0
Vec' 5 V
_ 0.6
f
r=
OATA IN
L"i-
RT'
OATA BUS
'50·TO·l00·0hms
Depending On line
OATA IN
STROBE
Impedance.
VCC' 5 V
Vref - 2.5 V
rl----~,
1. 0
I
+5 V
DATA OUT
1.0
0.1
0.2
0.4
1.0
1.0
RC TIME CONSTANT ipsl
4.0
10
OATA OUT
STROBE
I
I
I
I
I
I
I
L__ .2!~~~4~lJ
8-576
Vref '1.5 V
to 3.5 V
MC75450
~~__________P_E_R_I_PH__ER_A__L_D_R_I_V_E_R______
DUAL PERIPHERAL
POSITIVE "AND" DRIVER
DUAL PERIPHERAL
POSITIVE "AND" DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUITS
The MC75450 is a versatile device designed for use as a general·
purpose dual interface circuit in MDTL and MTTL type systems.
Thisdevice features two standard MTTL gates and two noncommitted,
high·current, high·voltage NPN transistors. Typical applications in·
clude relay and lamp drivers, power drivers, MOS and memory
drivers.
•
MDTL and MTTL Compatibility
•
300 mA Output Current Drive Capability
(each transistor)
•
Separate Gate and Output Transistor for Maximum Design
Flexibility
•
High Output Breakdown Voltage:
VCER = 30 Volts minimum
MAXIMUM RATINGS ITA
=
(TO·1161
0 to +70o e unless otherwise notedl
Symbol
Value
Unit
Power Supply Voltage ISee Note 11
Vee
+7.0
Vdc
Input Voltage ISee Note 11
Vi"
5.5
Vdc
Vee·to-Substrate Voltage
35
Vdc
Collector-ta-Substrate Voltage
35
Vdc
Rating
Collector-Base Voltage
VeB
35
Vdc
Collector-Emitter Voltage (See Note 2)
VCE
30
Vdc
Emitter-Base Voltage
VEB
5.0
Vdc
300
mA
Collector Current (continuous) (See Note 3)
Power Dissipation (Package Limitation)
Plastic and Ceramic Dual In-Line Packages
Derate above T A :::: +250 C
Po
830
6.6
TA
o to +70
T stg
-65 to +150
Operating Temperature Range
Storage Temperature Range
NOTES, 1.
P SUFFIX
PLASTIC PACKAGE
CASE 646
L SUFFIX
CERAMIC PACKAGE
CASE 632
mW
mW/oC
°c
°c
Voltage values are with respect to network ground terminal.
2. This value applies when the base-emitter resistance (RBE) is equal to or less
than 500 ohms.
3. Both halves of these dual circuits may conduct the rated current simultaneously.
See Packaging Information Section for outline dimensions.
8-577
Vee
2A
2Y
28
G
lA
IV
lB
Positive Logic:
2e
SUB2E STRATE
IE
GND
Y == AG (gate only)
e = AG (gate and transistor)
CIRCUIT SCHEMATIC
MC75450 (continued)
RECOMMENDED OPERATING CONDITIONS (See Note 4)
Characteristic
Supply Voltage
Note 4.
The substrate, pin 8, must always be at the most negative device voltage for proper operation.
ELECTRICAL CHARACTERISTICS (TA = 0 to +700 C unless otherwise noted.)
Characteristic
MTTL GATES
High-Level I nput Voltage
VIH
1
2.0
-
-
Vdc
Low-Level Input Voltage
VIL
2
-
-
0.8
Vdc
High-Level Output Voltage
(VCC = 4.5 V, VI L = 0.8 V, IOH = -400 /lAI
VOH
2
2.4
3.3
-
Low-Level Output Voltage
(VCC = 4.75 V, VIH = 2.0 V, IOL = 16 mAl
VOL
-
0.22
0.4
-
-
40
80
1.0
2.0
-
High-Level fnput Current
(VCC = 5.25 V, Vin = 2.4 V)
(VCC = 5.25 V, Vin = 5.5 VI
Low-Level Input Current
(VCC = 5.25 V, Vin = 0.4 VI
Vdc
1
3
IIH
Input
Input
Input
Input
Vdc
A
G
A
G
4
IlL
Input A
Input G
Short·Circuit Output Current* *
(VCC = 5.25 VI
Supply Current
High·Level Output (VCC = 5.25 V, Vin = 01
Low-Level Output (VCC = 5.25 V, Vin = 5.0 VI
-
-1.6
-3.2
-18
-
-55
-
2.0
6.0
4.0
11
-
-
-1.5
mA
rnA
6
ICCH
ICCL
Input Clamp Voltage (VCC = 4.75 V, lin - -12 rnA)
4
Vin
mA
rnA
5
lOS
/lA
V
OUTPUT TRANSISTORS
Symbol
Characteristic
Collector-Base Breakdown Voltage
(lC = 100jLA, IE = 0)
VCBO
Collector-Emitter Breakdown Voltage
(lc = 100 /lA, RBE = 500 ohms)
VCER
Emitter-Base Breakdown Voltage
(IE = l00/lA, IC = 0)
VEBO
Static Forward Transfer Ratio (See Note 51
(VCE = 3.0 V, IC = 100 rnA, TA = +25 0 C)
(VCE = 3.0 V, IC = 300 rnA, TA = +25 0 CI
(VCE = 3.0 V, IC = 100 rnA, TA = OoC)
(VCE = 3.0 V, IC = 300 rnA, TA = OoC)
hFE
Base-Emitter Voltage (See Note 51
(lB = 10 rnA, IC =.100 rnA)
(lC = 30 rnA, IC = 300 rnA)
VBE
Min
Max
35
-
-
30
-
-
5.0
-
-
25
30
20
25
-
-
-
-
-
0.85
1.05
1.0
1.2
-
0.25
0.5
0.4
0.7
Vdc
Vdc
-
Vdc
Vdc
VCE(sat)
Note 5.
These parameters must be measured using pulse techniques; tw = 300 IlS, duty cycle';; 2%_
• All typical values at VCC = 5.0 V, T A = +25 0 C.
**Not more than one output should be shorted at a time.
8-578
Unit
Vdc
-
Collector-Emitter Saturation Voltage (See Note 51
(lB = 10 rnA, IC = 100 rnA)
(lB = 30 rnA, IC = 300 rnA)
Typ
MC75450 (continued)
SWITCHING CHARACTERISTICS IVCC" 5.0 V, TA" t25 0 C unless otherwise noted.1
I
I
Characteristic
Symbol
I Test Fig, I
Min
Max
Typ
Unit
MTTL GATES
Propagation Delay Time ICL = 15 pF, RL = 4000hmsl
Low-to-High-Level Output
High-to-Low-LeveIOutput
OUTPUT TRANSISTORS "
Switching Times II C = 200 mA, I BI 1 I = 20 mA, I BI21
VBEloffl = -1.0 V, CL = 15 pF, RL = 50 ohms)
Delay Time
Rise Time
Storage Time
Fall Tim.
= -40 mA,
ns
8
td
tr
ts
tf
.-
-
9_0
11
-
14
8,0
-
GATES AND TRANSISTORS COMBINED*
Propagation Delay Time (lC = 200 mA, CL = 15 pF, RL
Low-to-High-Level Output
High-to-Low Level Output
Transition Time# IIC
= 50 ohms)
ns
9
tPLH
tPHL
= 200 mA, CL = 15 pF,
RL = 50 ohms)
Low-to-High-Level Output
High-to-Low-LeveIOutput
--
.-
21
-
16
-
7.0
8.0
ns
9
tTLH
tTHL
-
n-Voltage and current values are nominal; exact values vary slightly with transistors parameters.
DC TEST C)RCUITS FOR MTTL GATES
FIGURE 2 - VIL, VOH
FIGURE 1 - VIH, VOL
Vee
Vee
I
VOH
1t
Each input is tested separately.
Both inputs are tested simultaneously,
(Arrows indicate actual direction of current flow. Current into a terminal is a positive value.)
FIGURE 3 - IIH
Vee
4.5 V
Vee
b-+-o-_ OPE N
b-+-o-_ OPE N
Each input is tested separately.
Each input is tested separately.
8-579
MC75450 (continued)
DC TEST CIRCUITS FOR MTTL GATES (continued)
FIGURE 5 - lOS
FIGURE 6 - ICCH. ICCL
Vee
Vee
p.--I-o-.... OP E N
~'OS
Each gate is tested separately
Both gates are tested simultaneously.
(Arrows indicate actual direction of current flow. Current into a terminal is a positive value.)
FIGURE 7 - PROPAGATION DELAY TIMES. EACH GATE
+2.4 V
Vee
OUTPUT +5.0 V
RL - 400
lN3064
I
NOTES:
OR EaUIV
CL - 15 pF
(See Note B)
A. The pulse generator has the following characteristics: tw
B. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
INPUT
OUTPUT
8-580
= 0.5,.,,5,
PRR :::: 1.0 MHz, Zo
~
50
n.
MC75450 (continued)
TEST CIRCUITS (continued)
FIGURE 8 - SWITCHING TIMES, EACH TRANSISTOR
10V
-1.0 V
OUTPUT
INPUT
1.0 k
O.lI'F
50
I
r- "'1
I
I
L_
I
-1
62
SUBSTRATE
-=NOTES:
CL=15pF
(See Note B)
A. The pulse generator has the following characteristics: tw
=:
0.3 ,.,.5, duty cycle ~ 1%, zo~50
n.
B. CL includes probe and jig capacitance.
VOLTAGE WAVEFORMS
l.!c-------::=~i---- 3.0 V
INPUT
Is
OUTPUT
FIGURE 9 - SWITCHING TIMES, GATE ANO TRANSISTOR
10V
2.4 V
VCC
....- - + - -... OUTPUT
:t
l
CL=15pF
(See Note BI
I
.J
NOTES:
A. The pulse generator has the following characteristics: tw = 0.51J.5, PRR
B. CL includes probe and jig capacitance.
= 1.0 MHz,
VOL TAGE WAVEFORMS
r----- 3 .OV
INPUT
"------,;.;..;.'-'1...+------0 V
IPHL-l===:::::;-
'THL
8-581
Zo ~ 50.n.
~~__________PE_R_I_P_H_E_R_A_L_D_R__IV_E_R____~
MC75451P
DUAL PERIPHERAL
POSITIVE "AND" DRIVER
DUAL PERIPHERAL
POSITIVE "AND" DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUITS
· .. designed for use as a general·purpose interface circuit in MDTl
and MTTl type systems. The MC75451P is a dual peripheral positive
AND driver consisting of logic gate outputs internally connected to
the bases of two high·current, high·voltage NPN transistors. Typical
applications include relay and lamp drivers, power drivers, MOS and
memory drivers.
•
MDTl and MTTl Compatibility
•
300 mA Output Current Drive Capability
(each transistor)
•
High Output Breakdown Voltage;
VCER = 30 Volts minimum
PLASTIC PACKAGE
CASE 626
CIRCUIT SCHEMATIC
(1/2 circuit shown)
Vee
26
2A
2Y
.-____~----._---------oVec
Y
A
~~--------~----~~----~--OGND
Positive Logic: Y = AB
MAXIMUM RATINGS (TA=+250CI
Symbol
Value
Unit
Power Supply Voltage (See Note 11
VCC
+7.0
Vdc
Input Voltage (See Notes 1 and 21
Vin
5.5
Vdc
Output Voltage (See Notes 1 and 31
Vo
30
Vdc
Output Current (continuous)
10
300
mA
Power Dissipation (Package limitation)
Plastic Qual I n-Line Package
Po
Rating
Derate above T A = +2SoC
Operating Temperature Range
Storage Temperature Range
TA
Tstg
830
6.6
mW
mW/oC
o to +70
°c
°c
-65 to +150
NOTE 1. Voltage values are with respect to network ground terminal.
NOTE 2. Input voltage should be zero or positive with respect to device ground terminal.
NOTE 3. This is the maximum voltage which should be applied to any output when it is in
the" off" state.
See
Pa~kaging
Information Section for outline dimensions.
8-582
TRUTH TABLE
AB
L L
V
L ("on" state I
L H L ("on" state I
H L L ("on" state I
H H H ("off' statel
H = high level, L = low level
MC75451P (continued)
RECOMMENDED OPERATING CONDITIONS
Characteristic
Supply Voltage
ELECTRICAL CHARACTERISTICS (TA
=
0 to +70 0 e unless otherwise notedl
Symbol
Test Fig.
Min
Typ'
Max
Unit
High·Level Input Voltage
VIH
1
2.0
-
-
Vdc
Low·Level Input Voltage
VIL
2
-
-
0.8
Vdc
Input Clamp Voltage
(Vee = 4.75 V, lin
Vin
4
-
-
-1.5
Vdc
10H
1
-
-
100
VOL
2
Characteristic
= -12 mAl
High-Level Output Current
(Vee = 4.75 V, VIH = 2.0 V, VOH
Low-Level Output Voltage
(Vec = 4.75 V, VIL = 0.8 V, 10L
(Vee = 4.75 V, VIL = 0.8 V, 10L
= 30 VI
= 100 mAl
= 300 mAl
-
(Vee
(Vee
0.4
0.7
-
-
40
1.0
i"A
rnA
-
-1.0
-1.6
rnA
-
7.0
52
11
65
Min
Typ
Max
3
IIH
-
= 5.25 V, Vin = 2.4 VI
= 5.25 V, Vin = 5.5 VI
Low-Level Input Current
(Vee = 5.25 V, Vin = 0.4 VI
Supply Current
(Vee = 5.25 V, Vin
(Vec = 5.25 V, Vin
0.25
0.5
-
High-Level Input Current
4
IlL
mA
5
= 5.0 VI
High-Level Output
Low-Level Output
= 01
'TYPical values are at Vee
= 5.0 V,
TA
=
i"A
Vdc
leeH
leeL
+25 0 e.
SWITCHING CHARACTERISTICS (Vee
=
5.0 V, T A
=
+25 0 e unless otherwise noted.!
Characteristic
Symbol
Propagation Delay Time
Test Fig.
6
110"" 200 rnA, CL = 15 pF, RL = 500hmsl
Low-to-High-LeveIOutput
High-to-Low-Level Output
ns
-
tPLH
tPHL
Transition Time
17
18
ns
6
110"" 200 mA, eL = 15 pF, RL = 50 ohmsl
Low-to-High-Level Output
High-to-Low-Level Output
-
tTLH
tTHL
6.0
11
-
TEST CIRCUITS
FIGURE 2 - VIL, VOL
FIGURE 1 - VIH, IOH
vee
Vee
~L
VOH
VIH
VIL
=
=
=
Each input is tested separately.
8-583
Unit
J
MC75451P (continued)
TEST CIRCUITS (continued)
FIGURE 3 - IIH
FIGURE 4 - Ill. Vi"
4.5 V Vee
Vee
OPEN
IlL
Vin "'-01---4--""
Vin""'=:=-
lin
I
}~
,I '-_-'
OPEN
flUBSTRA'rE
=..i
-=Each input is tested separately.
~
Each input is tested separately.
FIGURE 5 - ICCH. leCl
Both gates are tested simultaneously.
FIGURE 6 - SWITCHING TIMES AND WAVEFORMS
2.4 V
INPUT
Vee
10V
.J;;;;;;;----3.0V
50
,l<>-+-- OUTPUT
"'"
Itw
I,:======~========~-----ov
VOH
~~-------~~~r-----VOL
ITHl
NOTES: A. Pulse generator characteristics: tw = 0.5 /JS, PRR = 1.0 MHz, 20 "= 50 U
B. CL includes probe and test fixture capacitance.
8-584
~_______________P_ER__IP_H_E_R_A_L_D_R__IV_E_R~
MC75452P
DUAL PERIPHERAL
POSITIVE "NAND" DRIVER
DUAL PERIPHERAL
POSITIVE "NAND" DRIVER
MONOLITHIC SILICON
INTEGRATED CIRCUITS
· .. designed for use as a general·purpose interface circuit in MDTL
and MTTL type systems. The MC75452P is a dual peripheral posi·
tive NAND driver consisting of logic gate outputs internally connected
to the bases of two high·current, high·voltage NPN transistors. Typi·
cal applications include relay and lamp drivers, power drivers, MOS
and memory drivers.
•
MDTL and MTTL Compatibility
•
300 mA Output Current Drive Capability
(each transistor)
•
High Output Breakdown Voltage;
VCER = 30 Volts minimum
p,...•
8
PLASTIC PACKAGE
CASE 626
CIRCUIT SCHEMATIC
(1/2 circuit shown)
r-----~~----
______ ______ __________
~
<>VCC
~
y
A
Bo---+-~
L-~~----~--~~--~---~-4---i~-oGND
1A
IB
1V
GNO
Positive Logic: Y '" AS
MAXIMUM RATINGS ITA = +2SoCI
Symbol
Value
Unit
Power Supply Voltage ISe. Note 11
Vce
+7.0
Vdc
Input Voltage {See Notes 1 and 21
Vin
5.5
Vdc
Output Voltage ISee Notes 1 and 31
Vo
30
Vdc
Output Current (continuous)
10
300
mA
Power Dissipation (Package Limitation)
Plastic:Dualln-Line Package
Derate above T A = +2SoC
Po
Operating Temperature Range
Rating
Storage Temperature Range
830
6.6
mW
mW/oC
TA
o to +70
°e
Tstg
-65 to +150
°e
NOTE 1. Voltage values are with raspect to network ground terminal.
NOTE 2. Input voltage should be zero or positive with respect to device ground terminal.
NOTE 3. This Is the maximum voltage which should be applied to any output when it is in
the" off" state.
See Packaging Information Section for outline dimensions.
8-585
TRUTH TABLE
H
A
B
Y
L
L
H ("off" state)
L
H
H ("off" state)
H
L
H ("off" state)
H
H
L ("on" state)
= high
level, L = low level
MC75452P (continued)
RECOMMENDED OPERATING CONDITIONS
Characteristic
Supply Voltage
ElECTR ICAl CHARACTE R ISTIeS (T A
~ 0 to +70 oC unless otherwise noted)
Symbol
Test Fig.
Min
Typ'
Max
Unit
High·Levellnput Voltage
VIH
1
2.0
-
-
Vdc
Low· Level Input Voltage
VIL
2
-
-
0.8
Vdc
Input Clamp Voltage
(VCC = 4.75 V. lin
Vin
4
-
-
-1.5
Vdc
10H
2
-
-
100
Characteristic
= -12 rnA)
High·Level Output Current
(VCC ~ 4.75 V. VIL = O.B V. VOH
Low·Level Output Voltage
(VCC = 4.75 V. VIH ~ 2.0 V. 10L
(VCC = 4.75 V. VIH = 2.0 V. 10L
= 30 V)
VOL
= 100 rnA)
= 300 rnA)
High·Levellnput Current
(VCC = 5.25 V. Vin ~ 2.4 V)
(VCC ~ 5.25 V. Vin = 5.5 V)
IIH
Low-Level Input Current
(VCC = 5.25 V. Vin = 0.4 V)
IlL
Supply Current
(VCC ~ 5.25 V. Vin
(VCC = 5.25 V. Vin
-
0.25
0.5
0.4
0.7
-
-
-
40
1.0
!LA
rnA
-
-1.0
-1.6
rnA
-
11
56
14
71
Min
Typ
Max
3
4
5
= 0 V)
= 5.0 V)
High·Level Output
Low·Level Output
!LA
Vdc
1
rnA
ICCH
ICCL
"TYPical values are at VCC ~ 5.0 V. TA = +25 0 C.
SWITCHING CHARACTERISTICS (VCC = 5.0 V. TA = +2S o C unless otherwise noted.)
Symbol
Characteristic
Propagation Delay Time
(10"" 200 rnA. CL ~ 15 pF. RL ~ 50 ohms)
Low·to·High·Level Output
High·to·Low·Level Output
Test Fig.
tPLH
tpHL
-
18
-
-
16
-
-
8.0
9.0
-
6
Transition Time
110"" 200 rnA. CL = 15 pF. RL ~ 50 ohms)
Low·to·High·Level Output
High·to·Low·Level Output
ns
ITLH
ITHL
TEST CIRCUITS
FIGURE 1 - VIH. VOL
FIGURE 2 - VIL. IOH
Vee
Vee
Each input is tested separately.
(Current into a terminal is shown as a positive value.
Arrows indicate actual direction of current flow.)
8·586
Unit
ns
6
MC75452P (continued)
TEST CIRCUITS (continued)
FIGURE 4 - Ill. Vin
FIGURE 3 - IIH
Vee
4.5 V
OPEN
-==-
Vee
IlL
Vin ...-QI---{-'
Vin
lin
I~
}v-,I-...._..-
OPEN
Jl'TsUBSTRA'Te
Vln~
-=-1.
~~
Each input is tested separately.
Each input is tested separately.
FIGURE 5 - ICCH. ICCl
Vee
OPEN
Both gates are tested simultaneously.
FIGURE 6 - SWITCHING TIMES AND WAVEFORMS
2.4V
INPUT
Vee
10V
1-----3 V
"'"
50
~to-.-- OUTPUT
~----------~----------1
......._--ov
VOH
NOTES: A. Pulse generator characteristics: tw = 0.514, PR R = 1.0 MHz, Zo ~ 50.n.
B. CL includes probe and test fixture capacitance.
~~----------------~f-~----VOL
'THL
8-587
MC75453P
~~______________P_E_R_I_P_H_E_R_A_L_D__R_IV_E_R~
DUAL PERIPHERAL
POSITIVE "OR" DRIVER
DUAL PERIPHERAL
POSITIVE "OR" DRIVER
. designed for use as a general-purpose interface circuit in MDTL
and MTTL type systems. The MC75453P is a dual peripheral positive OR driver consisting of logic gate outputs internally connected to
the bases of two high-current, high-voltage NPN transistors. Typical
applications include relay and lamp drivers, power drivers, MOS and
memory drivers.
•
MDTL and MTTL Compatibility
•
300 mA Output Current Drive Capability
(each transistor)
•
High Output Breakdown Voltage;
VCER = 30 Volts minimum
MONOLITHIC SI LICON
INTEGRATED CIRCUITS
o
8
PLASTIC PACKAGE
CASE 626
CIRCUIT SCHEMATIC
(1/2 circuit shown)
....-----_ovcc
r------..----~---
Uk
130
1A
~~----~--------~-~--~_oGNO
MAXIMUM RATINGS ITA
=
GND
1Y
Y '" A+ B
+25 0 CI
Symbol
Value
Unit
Power Supply Voltage (See Note 1)
VCC
+7.0
Vdc
Input Voltage (See Notes 1 and 2)
Vin
5.5
Vdc
Output Voltage (See Notes 1 and 3)
Vo
30
Vdc
Output Current (continuous)
10
300
mA
Power Dissipation (Package Limitation)
PD
Rating
830
6.6
mW
mW/oC
TA
o to +70
T stg
-65 to +150
°c
°c
Plastic Dual In-Line Package
Derate above T A '" +25 0 C
Operating Temperature Range
Storage Temperature Range
18
Positive Logic
NOTE 1. Voltage values are with respect to network ground terminal.
NOTE 2. Input voltage should be zero or positive with respect to device ground terminal.
NOTE 3. This is the maximum voltage which should be applied to any output when it is in
the "off" state.
See Packaging Information Section for outline dimensions.
8-588
TRUTH TABLE
A
B
Y
L
L
L ("on" state)
L
H
H (" off" state)
H
L
H (" off" state)
H
H
H ("off" state)
H '" hIgh level, L '" low level
MC75453P (continued)
RECOMMENDED OPERATING CONDITIONS
Characteristic
Supply Voltage
ELECTRICAL CHARACTERISTICS (T A
=
0 to +70 0 C unless otherwISe noted)
Characteristic
Symbol
Tost Fig.
Min
Typ'
Max
Unit
High· Lovel I npu t Vol tage
VIH
1
2.0
-
-
Vdc
Low·Lovel Input Voltage
VIL
2
-
-
0.8
Vdc
Input Clamp Voltage
(VCC = 4.75 V. lin
Vin
4
-
-
-1.5
Vdc
10H
1
-
-
100
VOL
2
= -12
rnA)
High·Lovel Output Current
(VCC = 4.75 V. VIH = 2.0 V. VOH
Low-Lovel Output Voltage
(VCC = 4.75 V, VIL = O.B V, 10L
(VCC = 4.75 V, VIL = O.B V, 10L
= 30 V)
= 100 rnA)
= 300 rnA)
High·Lovellnput Current
(VCC = 5.25 V, Vin = 2.4 V)
(VCC = 5.25 V, Vin = 5.5 V)
IIH
Low·Level Input Current
(VCC = 5.25 V, Vin = 0.4 VI
IlL
Supply Cu rrent
(VCC = 5.25 V, Vin
(VCC = 5.25 V, Vin
-
0.25
0.5
0.4
0.7
-
-
40
1.0
/J A
rnA
-1.0
-1.6
rnA
-
B.O
11
-
54
68
Min
Typ
Max
3
4
5
= 5.0 V)
= 0)
'TYPical values are at VCC
High·Lovel Output
Low·Lovel Output
/JA
Vdc
rnA
ICCH
ICCL
= 5.0 V, T A = +25 0 C.
SWITCHING CHARACTERISTICS IVcc
=
5.0 V. T A
=
+25 0 C unless otherwise noted.I
Characteristic
Symbol
Propagation Delay Time
(10"" 200 rnA, CL = 15 pF, RL = 50 ohms)
Low·to·High·Level Output
High·to·Low-Lovel 9utput
Test Fig.
6
ns
-
tPLH
tPHL
Transition Time
(10"" 200 rnA, CL = 15 pF, RL = 50 ohms)
Low-to-High·LeveIOutput
High·to·Low·Level Output
-
15
17
ns
-
tTLH
tTHL
5.0
8.0
TEST CIRCUITS
FIGURE 1 - VIH, 10H
-
6
(Current into terminal is shown as a positive value.
Arrows indicate direction of current floW.)
FIGURE 2 - VIL, VOL
Vee
VIL
Each input is tested .parately.
8-589
Unit
-
-
MC75453P (continued)
TEST CIRCUITS
(continued)
FIGURE 4 - IlL. Vin
FIGURE 3 - IIH
Vee
Vee
OPEN
-==-}V-TI
IlL
Vm
1m
'::'
-
I!
.biTsUBSTRA'rE
Vin"
=..i
,:;f'::'
'::'
Each input is tested separately.
OPEN
"'L..--r
'::'
Each input is tested separately.
FIGURE 5 - ICCH.ICCL
Both gates are tested simultaneously.
FIGURE 6 - SWITCHING TIMES AND WAVEFORMS
0.4 V
INPUT
Vee
10V
J.:::::--- 3.0 V
50
/"IO-....._OUTPUT
eL=15pF
10%
I::======~====~~-------OV
I-'.
'::' I(seeN.teB)
'::'
NOTES; A. Pulse generator characteristics: tw::: O.51JS. PRR;:: 1.0 MHz, zo::::: 50 n
B. Cl includes probe and test fixture capacitance.
"'f!!..-------....:.::~-I-I-tTHl
VOL
'\
PERIPHERAL DRIVER
~--------'
MC75454P
DUAL PERIPHERAL
POSITIVE "NOR" DRIVER
DUAL PERIPHERAL
POSITIVE "NOR" DRIVER
. designed for use as a general-purpose interface circuit in MDTL
and MTTL type systems. The MC75454P is a dual peripheral positive NOR driver consisting of logic gate outputs internally connected
to the bases of two high-current, high-voltage NPN transistors_ Typical applications include relay and lamp drivers, power drivers, MOS
and memory drivers.
•
MDTL and MTTL Compatibility
•
300 mA Output Current Drive Capability
(each transistor I
•
High Output Breakdown Voltage;
VeER; 30 Volts minimum
MONOLITHIC SILICON
INTEGRATED CIRCUITS
8
t~] "".'. .
~'~ri
PLASTIC PACKAGE
CASE 626
]
CIRCUIT SCHEMATIC
(1/2 circuit shown)
Vee
2B
2A
18
IY
2Y
r-----~~----~~----~--_.----._------_cvcc
16k
1k
130
IA
GND
Positive Logic: Y:::
A+B
MAXIMUM RATINGS ITA - '25 0 CI
Rating
Symbol
Value
Unit
Power Supply Voltage (See Note 1)
Vee
+7.0
Vdc
Input Voltage (See Notes 1 and 2)
Vin
5.5
Vdc
Output Voltage (See Notes 1 and 3)
Vo
30
Vdc
Output Current (continuous)
10
300
mA
Power Dissipation Wack age Limitation)
Plastic Dual In-Line Package
PD
Operating Temperature Range
Storage Temperature Range
mW
830
6.6
mw/oe
TA
o to +70
°e
Tstg
-65 '0+150
°e
Derate above T A "" +25 0 C
NOTE 1. Voltage values are with respect to network ground terminal.
NOTE 2. Input voltage should be zero or positive with respect to device ground terminal.
NOTE 3. This is the maximum voltage which should be applied to any output when it is in
the "off" state.
See Packaging Information Section for outline dimensions.
8-591
TRUTH TABLE
A
B
Y
L
H ("off" state)
L
H
L ("on" state)
H
L
L ("on" state)
H
H
L ("on" state)
H = high level, L = low level.
•
MC75454P (continued)
RECOMMENDED OPERATING CONDITIONS
Characteristic
Supply Voltage
ELECTRICAL CHARACTERISTICS (TA
=
0 to +700 C unless otherwise noted.)
Symbol
Test Fig.
Min
Typ'
Max
Unit
High-Level Input Voltage
VIH
1
2.0
-
-
Vdc
Low·Level Input Voltage
VIL
2
-
-
0.8
Vdc
Input Clamp Voltage
(VCC = 4.75 V. l.in
Vin
4
-
-
-1.5
Vdc
High-Level Output Current
(VCC = 4.75 V, VIL = 0.8 V, VOH = 30 V)
IOH
2
-
-
100
Low-Level Output Voltage
VOL
1
Characteristic
E
-12 mAl
(VCC = 4.75 V, VIH = 2.0 V, IOL = 100 mAl
(VCC = 4.75 V, VIH = 2.0 V, IOL = 300 mAl
-
High-Level Input Current
(Vec = 5.25 V, Vin = 2.4 V)
(VCC = 5.25 V, Vin = 5.5 V)
IIH
Low-Level Input Current
(Vee = 5.25 V, Vin = 0.4 V)
IlL
Supply Current
(VCC = 5.25 V, Vin = 0 V)
(Vec = 5.25 V, Vin = 5.0 V)
"TYPIcal value. are at VCC
-
0.25
0.5
0.4
0.7
-
-
40
1.0
p.A
mA
-
-1.0
-1.6
mA
-
13
61
17
79
Typ
Max
3
4
5
High-Level Output
Low- Level Output
p.A
Vdc
mA
ICCH
ICCL
= 5.0 V, T A = +250 C.
SWITCHING CHARACTERISTICS (VCC = 5 0 V TA = +25 0 C unless otherwise noted.)
Characteristic
Symbol
Propagation Delay Time
(10'" 200 mA, CL = 15 pF, RL = 50 ohms)
Low-to-High-Level Output
High·to-Low·Level Output
Test Fig.
Min
6
ns
-
tPLH
tPHL
Transition Time
25
19
-
6
(10'" 200 mA, CL = 15 pF, RL = 50 ohms)
Low-to-High-Level Output
High-to-Low-Level Output
ns
-
tTLH
tTHL
5.0
8.0
TEST CIRCUITS
(Current into terminal is shown as a positive value.
Arrows indicate actual direction of current flow.)
FIGURE 1 - VIH, VOL
FIGURE 2 - VIL, IDH
Vee
Vee
Each input is tested sap.rately.
8-592
Unit
-
MC75454P (continued)
TEST CIRCUITS (continued)
FIGURE 3 - IIH
FIGURE 4 - Ill. Vin
Vee
Vee
OPEN
-==-}'V-.,I""'L_~
IlL
Vin
lin
-
OPEN
I nUBSTRA~
=..L
~
~
Each input is tested separately.
Each input is tested separately.
FIGURE 5 - ICCH. ICCl
Vee
OPEN
Both gates are tested simultaneously.
FIGURE 6 - SWITCHING TIMES AND WAVEFORMS
0,4 V
INPUT
Vee
10V
COS.OIlS
.""
50
.""
/-"'!O-t-- OUTPUT
~--------~----------~
CL=15pF
I,seeNoteB)
NOTES: A. Pulse generator characteristics: tw = 0.5 Ill. PRR
8. Cl includes probe and test fixture capacitance.
,""----0 V
VON
1"~-------------~~~r-----VOL
=1.0 MHz. Zo ~ 50 n
ITNL
8-593
\
MC75491
MC75492
M_O_S_-_LE_D_._D_IS_P_L_A_Y_D_R_I_V_E_R_S~
......_ _ _ _ _
Specifications and Applications
Inforrrlation
QUAD LED SEGMENT DRIVER - MC75491
MULTIPLE
LIGHT-EMITTING DIODE (LED)
DRIVERS
MONOLITHIC SILICON
INTEGRATED CIRCUITS
HEX LED DIGIT DRIVER - MC75492
The MC75491 and MC75492 are designed to interface MOS logic
to common cathode light-emitting diode readouts in serially addressed multi-digit displays. Using a segment address and digit scan
LED drive method in a time mUltiplexing system results in a
minimizing of the number of required drivers.
•
•
•
•
•
•
Low Input Current Requirement for MOS Compatibility
Low Standby Power Drain
Source or Sink Current Capability of 50 rnA for MC75491
Sink Current Capability of 250 rnA for MC75492
Four High-Gain Darlington Drivers in a Single Package - MC75491
Six High-Gain Darlington Drivers in a Single Package - MC75492
MC75491 CIRCUIT SCHEMATIC
L SUFFIX
CERAMIC PACKAGE
CASE 632
ITO-"6)
PLASTIC PACKAGE
CASE
c
(1/4 Circuit Shownl
CONNECTION DIAGRAMS
4k
INPUT
I ~
~
6.8
K
......
~
l
VSS
TRUTH TABLE
INPUT
L
l
MC75491
E
6.8 k
TO OTHER
DRIVERS
I OUTPUT E I OUTPUT C
I
L
H
I
H
GNO
H
L
MC75492 CIRCUIT SCHEMATIC
(1/6 Circuit Shown)
QOUTPUT
4k
INPUT
~
t68 k
VSS
TRUTH TABLE
INPUT IOUTPUT
L
H
I
l
rh:
310
...". TO OTHER
DR IVERS
H
L
GNO
Sea Packaging Information Section for outline dimensions.
8-594
MC75492
646
MC75491, MC75492 (continued)
MAXIMUM RATINGS (TA = 0 to +700C unless otherwise noted)
V.lu.
Roting
Symbol
MC7!IiI81-
MC75482
Unit
Bias Supply Volta.. (See Note 1)
VSS
to
10
Vdc
I nput Voltage (See Note 2)
Yin
-5.0 to Vss
-5.0 to VSS
Vdc
Collector Volta.. (See Note 3)
Vc
to
10
Vdc
Collector·to-Emitter Voltage
VCE
10
-
Vdc
Collector-to-Input Voltage
VCI
to
10
Vdc
Emitter Volta.. (Vin;;;' 5.0 Vdcl
VE
<·HI
Vdc
Emitter-ta-Input Voltage
VEl
5.0
-
.50
250
200
500
rnA
rnA
Continuous Collector Current (Each Collector)
IC
(All Collectors)
Power Dissipation (Package limitation)
<>
Vdc
Po
Ceramic a"nd Plastic Dual In-line Packages
Derate above T A = +250 C
830
6.6
Operating Temperature Range
TA
Storage Temperature Range
TSllL
mW
mWPC
o to +70
°c
-65 to +150
°c
Note 1. VSS terminal voltage is with respect to any other device terminal.
Note 2. With the exception of the inputs, the GND terminal must always be the most negative device voltage for proper operation.
Note 3. Voltage values are with respect to GND terminal unless otherwise noted.
ELECTRICAL CHARACTERISTICS (Vss = 10 Vdc. TA = 0 to +70o C unless otherwise noted.)
MC75492
Characteristic
Low-Level Collector-ta-Emitter Voltage
Symbol
Min
Typ
Max
Unit
Vdc
VCEL
(Vin = 8.5 V thru 1.0 kn, IOL = 50 rnA.
VE = 5.0 VI
TA = +250 C
T A = 0 to + 700 C
High-Level Collector Current
VCH = 10 V, VE =O,lin = 40 "A
VCH = 10 V, VE = 0, Yin = 0.7 V
Low-Level Output Voltage
(Vin = 6.5 V thru loll kn, IOL = 250 mAl
TA = +250 C
T A = 0 to + 700 C
"A
Vdc
VOL
0.9
1.2
1.5
High-Level Output Current
200
200
VOH = 10V.lin=4O"A
VDH = 10 V, Yin = 0.5 V
2.2
I nput Current at Maximum I nput Voltage
3.3
rnA
1.0
rnA
Yin = 10 V, IOL = 20 rnA
Emitter Current - Reverse Bias
IC = 0, Yin = 0, VE = 5.0 V
Bias Supply Current IVSS = 10 VI
ISS
SWITCHING CHARACTERISTICS (VSS = 7.5 V, TA = +250 C unless otherwise noted.1
ns
Propagation Delay Time, H igh-to-Low Level
RL = 200n. VIH = 4.5 V. CL = 15pF. VE = 0
RL = 39n, VIH = 7.5V,CL = 15pF
40
Propagation Delay Time. Low-to-High Level
CL = 15pF, VE= O,RL = 200n, VIH= 4.5Vdc
CL = 15 pF, RL = 39 n, VIH = 7.5 Vdc
80
ns
*To collector output.
8-595
MC75491, MC75492 (continued)
TYPICAL CHARACTERISTICS
(Vss
= +10 Vdc. TA = +250 C unless otherwise noted.)
MC75492
MC75491
FIGURE 2 - OUTPUT CURRENT varsus INPUT VOLTAGE
FIGURE 1 - COLLECTOR CURRENT versus INPUT VOLTAGE
50
250
Vc J2.5 V
VE = 0
<"
~
Iz
200
I
I
if
Vc = 2.5 V
~ 150
0
0:
::>
'-'
7
I-
:=::>::> 100
0
I
I
o
E
0
./
o
o
0.5
1.0
1.5
Vin.INPUT VOLTAGE (Vdcl
2.0
50
I
1/
o
o
2.5
1.0
1.5
Vin. INPUT CUR RENT (1tA1
0.5
FIGURE 4 - OUTPUT CURRENT versus INPUT CURRENT
250
FIGURE 3 - COLLECTOR CURRENT versus INPUT CURRENT
0
Vc =12.5 V
VE = 0
<" 40
I
~
7
Vc = 2.5 V
I-
~
I
0
0
7
::>
'-'
I
0:
~
2.5
2.0
0
20
o
'-'
~
10
/
4D
50
/
160
120
80
lin. INPUT CURRENT (PAl
200
FIGURE 5 - COLLECTOR-TO-EMITTER VOLTAGE (ON)
versus COLLECTOR CURRENT
-
!
O.8
--'
~
~ o.
l\\TA=+7D"~_
~
1,,\ TA
= +25DC
TA=ODC _
w
O.2
io
0.8
--'
w
'"
~
4D0
~~
./"
-
~T~=+70!~_
t----
,,\TA =+25DC
TA=D"C _
0.6
~
'I'
j
o
T
:g
t-"
L
350
300
FIGURE 6 - OUTPUT VOLTAGE LOW versus OUTPUT CURRENT
:E
t;
150
200
250
lin. INPUT CUR RENT (PAl
1.0
6/
o
.,. O. 4
0:
o
lOll
50
I.0
w
'"j::!
7
J
I-
::>
~
VE=O
I---Input 3.5 V
thru 1.0 kll
..l
!S
'-'
10
0.4
o
20
3D
IC. COLLECTOR CURRENT (mAl
4D
50
8-596
Input = 6.5 V
0.2 I - - thru \Okll
0
50
100
150
10. OUTPUT CURRENT (mAl
200
250
MC75491, MC75492 (continued)
TYPICAL CHARACTERISTICS and
SWITCHING TIME CIRCUITS
FIGURE 7 - MC75491IMC75492 INPUT CURRENT
versus INPUT VOLTAGE
I
.1
. .1.
I--VSS=IOV
VE = 0 (MC75491)
01-- RL=220nlOIOV
FIGURE B - MC75491 SWITCHING CIRCUIT
2. 5
7.5 V
./
VCC
L
L
5
./
./
MC75491
./
O. 5
= 15 pF
CL
./
V
0
I
"""----l
Input . .
C
(MC75491
only)
8-597
MC75491, MC75492 (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 13 - MOS-TO-MTTL
FIGURE 14 - QUAD HIGH-CURRENT NPN
TRANSISTOR DRIVER
LEVEL TRANSLATOR
R2
C
MOS
Input
MC75491
Output
To MTTL
Input
VSS
C
",--o--l
01
R1
R1
FIGURE 15 - QUAD-OR-HEX HIGH-CURRENT
PNP TRANSISTOR DRIVER
FIGURE 16 - BASE-EMITTER SELECT TRANSISTOR DRIVER
VCC
R1
MC75491
or
Input
01
VSS
RL
Input
Input
VEE
-,;:
(Suitable for use with common-anode VLED displays)
FIGURE 17 - MOS CALCULATOR CHIP-TO-LED INTERFACE CIRCUIT
B 11/4 MC75491 Circuit} =
2 Packages
C
E
--1
sOP
MOS
Calculator
Chip
--1 r---::5D1b=-:------O--j
:::g :
~
--1
NI1/6 MC75492 Ci
~
\
\
~ 24
\ \
1\
f\
I
Unity Gain
Power Bandwidth
~ 8.0
"'-
~ 4.0
>
2.0 k 3.0 k
5.0 k
.......
....
10 k
RL' 10 k
~~
2\
CURVE },
o
>-
o1.0 k
1\ '
\
\
o
1\
1\
-
i'-. .......
'-
100 k
~
\
'\.
'\.
~
"- r--..
........
--
r::::::: t1.0M
-
10 M
t, FREQUENCY 1Hz)
FIGURE 5 - OPEN LOOP
VOLTAGE GAIN versus FREQUENCY
FIGURE 4 - VOLTAGE GAIN
versus FREQUENCY
+65
+6 0
100
I
CURVE 1
80
R!,l
+5 0
~
.i
"
~
z:
2
~
§!
............
a;
~
;; +40
+2 0
j
3
+1 0
lOOk
0
100
1.0M
90
'"
~
c5
.l
80
70
3
I"-
.............
1"-1"-
1'-....
1'-....
1.0k 2.0k
/
/
i
V--
fi
~
~
10
1.0 M
100 k
18
16
/'
14
./
12
-CM;/,
10
i
8.0
,.~
6. 0
8
4.0
~
2.0
//
~
I
5.0
5.0k10k
FIGURE 7 - COMMON SWING
versus POWER SUPPLY VOLTAGE
-
a;
~
0
-..!..
........ !'
2 ........
t, FREQUENCY 1Hz)
100
§
RLL
4
1.0 k 2.0 k 5.0 k 10 k
FIGURE 6 - VOLTAGE GAIN
versus POWER SUPPLY VOLTAGE
~
"
0
t. FREQUENCY 1Hz)
"
........
0
0
-5. 0
100
z:
;;:
....
1';--- ....
~
$!
I"-
60
~
+30
"
............
15
V+ and V-, POWER SUPPLY VOLTAGE IVOLTS)
20
0
.-/'
~ ';;'CMV;,
, l#"'"
5.0
10
15
V+ and V-, POWER SUPPLY VOLTAGE IVOLTS)
20
MCBC1709, MCB1709F (continued)
TYPICAL CHARACTERISTICS (continued)
= +15 Vdc, V- = -15 Vdc, T A = +25 0 C unless otherwise noted.)
(V+
FIGURE 8 - POWER OISSIPATION
.ersus POWER SUPPL V VOLTAGE
700
600
SAF~ OPER~TlNG
AREA
AT REDUCED TEMPERATURE
500
25
50
400
300
200
V
0
/
/
I
If
V
/
~
g
'"
0
z:
~
ie
3. 0
BW
•
~
V
1.0kHZI \ [ \ .
2. 0
100 H'0:I\
V~
I. 0
0
1.0
1.0 k
100
~ "-- E""
Rs. SOURCE RESISTANCE (OHMS)
"- E", QUIESCENT ~ -y..,
QUIESCENT ~ 0 V
/
10kHZI\
=
~
""j
30
4. 0
~
J
II
40
~
~
/
1/
I
0
1
/
/
FIGURE 9 - INPUT NOISE
VOLTAGE .ersusSOURCE RESISTANCE
5. 0
V
/
0
0
0
20
V
/
V
VI t
SAFE OPEJTING tEA
AT Y TErERArRE
10 4.0 6.0
8.0
10
12
14
16
18
20
V+ and V-, POWER SUPPLY VOLTAGE (Vd,)
16-LEAD
FIGURE 10 - BONOING OIAGRAM
= b====d.,J
..£
::::b. ,
NC
t
V+
+--_1--,.1. !
I'
Output lag
Ne
Ne
Ne
Ne
Ne
Ne
Ne
!
MIN
Output
MAX
l-a.oo2~
0]046
0.110251
itnput Frequency Compensation
0.0040
0.0025
MIN
16
0,0",,£1
iJ:nDilI
L
Mol""'''""
'L~::~:'MIN
MIN
.
~
MIN
OD~
~
0.054
tflID
LV'Non-invertin g Inpul
Leadslrue posilionwilhin 0.002 tOil'
Inverting Input
Input Frequency Compensation
Silicon Thickness '" 2.0 mils nominal
PACKAGING AND HANDLING
The MCBC1109 beam-lead 58aled-junction linear integrated circuit is available ,in chip form (non-encapsulated)
as shown in the outline dimensional drawing. The shipping
carrier for chips is a 2" square glass plate on which the
chips .re placed. A thin layer of polymer film covers the
plate and retains the chips in place. The chips do not adhere
to the film when it Is lifted to remove them from the
carrier. Care must be exercised when removing the chips
from the carrier to ensure that the beams are not bent.
A vacuum pickup is useful for this ouroose.
8-603
10 k
1L~
MCBC1710
MCB1710F
_______
D_I_F_F_E_R_E_N_T_IA_L__
C_O_M_P_A_R_A_T_O_R~
Advance Inforn-.ation
DIFFERENTIAL COMPARATOR
INTEGRATED CIRCUIT
MONOLITHIC SILICON
MONOLITHIC DIFFERENTIAL
VOLTAGE COMPARATOR
.... .. ~
Beam·lead sealed·junction technology and fabrication make the
MCBC1710 and MCBl710F devices excellent choices for military,
aerospace, and commercial applications. These devices are designed
for use in level detection, low·level sensing, and memory applications.
•
Differential Input Characteristics Input Offset Voltage = 1.0 mV
Offset Voltage Drift = 3.0/lVtC
•
Fast Response Time - 40 ns
"
BEAM·LEAD CHIP
• Output Compatible With All Saturating Logic Forms Vo = +3.2 V to -0.5 V Typical
•
Low Output Impedance - 200 ohms
MAXIMUM RATINGS (TA
=
MCBC1710
25°C unless otherwise noted)
Symbol
Rating
Power Supply Voltage
Differential Input Signal
Value
Unit
VCC
+14
'(de
F SUFFIX
VEE
-7.0
Vde
CERAMIC PACKAGE
CASE 606
VID
±S.O
Volts
(TO·9Il
VICR
±7.0
Volts
Peak Load Current
IL
10
mA
Power Dissipation (package limitations)
Flat Paekage
Po
500
Common Mode Input Swing
MCB1710F
3.3
mW
mW/oC
Operating Temperature Range
TA
-55 to +125
°c
Storage Temperature Range
Tstg
-65 to +150
DC
De,rate above T A
= +2SoC
I
SCHEMATIC PIN CONNECTIONS
Chip
EQUIVALENT CIRCUIT
CIRCUIT SCHEMATIC
Vee
A
Gnd
This is advance information on a new introduction and specifications are sUbject to change without notice.
See Packaging' nformation Section for outline dimensions.
8-604
VEE
MCBC1710, MCB1710F (continued)
ELECTRICAL CHARACTERISTICS (Vcc = +12 Vdc VEE = -6 0 Vdc TA - 250 C unless otherwise notedl
Characteristic
I nput Offset Voltage
(Va = 1.4 Vdcl
I nput Bias Current
(Va
MCBC1710/MCB1710F
Typ
Max
Symbol
Min
Via
-
1.0
2.0
mVdc
liB
-
12
20
/lAdc
Unit
= 1.4 Vdcl
Output Resistance
Positive Output Voltage
ro
-
200
-
Ohms
VOH
2.5
3.2
4.0
Vdc
Val
-1.0
-0.5
0
Vdc
Is
2.0
2.5
-
mAdc
CMRR
-
100
-
dB
tpd
-
40
-
ns
ID+
In-
-
6.4
5.5
9.0
7.0
mAdc
-
PD
-
115
150
mW
(Vin ;;>5.0 mV, 0';;1 0 ';;5.0 mAl
Negative Output Voltage
(Vin ;;>-5.0 mVI
Output Sink Current
(Vin ;;>-5.0 mV, V out ;;>01
Common Mode Rejection Ratio
(Va
= -7.0 Vdc,
RS ';;200 nl
Propagation Delay Time
For Positive and Negative Going I nput Pulse
Power Supply Current
(Vo';;O Vdcl
DC Quiescent Power Dissipation
Sea current MC1710/1710C data sheet for additional information.
BONDING DIAGRAM
12 - BEAM CHIP
0.0004
0.0006
NC
VCC
cr:£
NC
=w ==:b+
TIl
NC
NC
0.035
8SC
0.041
0.049
GROUND
0.0010
0.0045
PACKAGING AND HANDLING
The MCBC1710 beam-lead sealed·junction linear integrated circuit is available in chip form (non-encapsulated) as shown in the
outline dimensional drawing. The shipping carrier for chips is a 2"
square glass plate on which the chips are placed. A thin layer of
8-605
polymer film covers the plate and retains the chips in place. The
chips do not adhere to the film when it is lifted to remove them
from the carrier. Care must be exercised when removing the chips
from the carrier to ensure that the beams are not bent. A vacuum
pickup is useful for this purpose.
,--------1
MCBC1723
MCB1723F
,
VOLTAGE REGULATORS
'-------------'
Advance Inforlllation
BEAM-LEAD
VOLTAGE REGULATOR
INTEGRATED CIRCUIT
MONOLITHIC BEAM-LEAD VOLTAGE REGULATOR
~
The MCBCI723/MCBI723F is a positive or negative voltage
regulator designed to deliver load current to 150 mAdc. Output
current capability can be increased to several amperes through use of
one or more external pass transistors. Beam-lead products employ a
silicon-nitride dielectric that hermetically seals the chip, eliminating
the need for a hermetic package. The beam leads are gold cantilevered structures extending from the chip. These beams bond readily
to a gold metalized substrate providing one of the most reliable
interconnection systems known for semiconductor devices.
8EAMLEAD~
"Tr;.d'mar~ol MalorolBlllC
• Output Voltage Adjustable from 2 Vdc to 37 Vdc
• Output Current to 150 mAdc Without External Pass
Transistors
• 0.01% Line Regulation
• Adjustable Short-Circuit Protection
MAXIMUM RATINGS ITA
=
BEAM-LEAD
CHIP
+250 e unle,s otherwise noted)
Rating
Symbol
Value
Unit
Pulse Voltage from Vee to VEE (50 msl
Vinlp)
50
Vpeak
Continuous Voltage from Vee to VEE
Vin
40
Vde
Input-Output Voltage Differential
Maximum Output Current
Vin-VO
40
Vde
'L
150
mAde
Current from Vref
Iref
15
mAde
Operating Temperature Range
TA
-55 to +125
°e
Junction Temperature Range
TJ
-65 to +150
°e
MeBel723~
~/~
,
CER!,~~:~~XKAGE
MCB1723F
CASE 607
FIGURE 2 - CIRCUIT SCHEMATIC
FIGURE 1 - TYPICAL CI RCUIT CONNECTION
Vee
r-~~____'-~__1-__~____~__~__~____~K
Vo
t--------oCOMPENSAT10N
For IItst results IOk
16
~
~
12
(VOLTAGE FOLLOWER)
0
" 8.0 I--
>
4.0
a
10
11111~Ho
~
1\
1111I
1.0 k
"'"
;;:
\\
....
+8 0
~
1\
'"
«
+20
~
:t
-20
1.0
100 k
10 k
~
10
100
1.0 k
10 k
~
100 k
FIGURE 5 - OUTPUT VOL TAGE SWING
versus LOAD RESISTANCE
'"
1.0 M
f. FREQUENCY (Hz)
f. FREQUENCY (Hz)
10 M
FIGURE 6 - COMMON-MODE REJECTION
RATIO versus FREQUENCY
~ 100
0
;::
«
-"""1'-
'"z
80
~
60
0
w
"-
,.'"
0
'I'-
z
0
'"
8'"
l
40
20
100
10
+10
80
a'"
~ +5.0
--
o
....
~
..........- V
~
j
iil
:::; -5.0
,.«
1.0M
90
~
N
100 k
FIGURE 8 -INPUT BIAS CURRENT
versus TEMPERATURE
FIGURE 7 - INPUT OFFSET CURRENT
versus TEMPERATURE
....
10k
1.0 k
f. FREQUENCY (Hz)
RL. LOAO RESISTANCE (OHMS)
/""
1/
o'"
z
1
....
-
,..---
'"'"
a
::1a;
....
~
~
-25
+25
+50
+75
60
50
'""
i'-.
40
..........
i'--..
............... ....
~
SLOPE CAN BE EITHER POLARITY
30
-10
-55
70
iii
+100
+125
TA. AMBIENT TEMPERATURE (DC)
20
-55
-25
+2~
+50
---+75
TA. AMBIENT TEMPERATURE (DC)
8-610
I---
+100
+125
MCBC1741, MCB1741F (continued)
TYPICAL CHARACTERISTICS Icontinuedl
IV+ = +15 Vdc, V- = -15 Vdc, TA = +25 0 C unless otherwise noted.1
FIGURE 9 - POWER DISSIPATION versus
POWER SUPPLY VOLTAGE
FIGURE 10 -OUTPUT NOISE versus SOURCE RESISTANCE
1.4
'00
AV= 'OOor
111
70
S
50
40
0
30
;;:>=
ill
20
jO
z
'/
V
15
'"~
~
~
/
'0
V
Vout=O- f - -
25 o.8f--
V
Z
f--
t-
~ 0.6 f - -
t-
::>
/
0.4
,
0.2
O.
6.0
10
'4
18
22
Rl
fP
+
I
IIII
I III III
100
v+ and V-, POWER SUPPLY VOLTAGE (VOLTSI
II II
1.0 k
I I
7
AI~
_i-"
'0 k
RS, SOURCE RESiSTANCE (OHMSI
FIGURE 11-BONDING DIAGRAM
Silicon Thickness '= 2.0 mils nominal
PACKAGING AND HANDLING
The MCBC1741 beam-lead sealed-junction linear integrated circuit is available in chip form (non-encapsulated)
as shown in the outlina dimensional drawing. The shipping
carrier for chips is a 2" square glass plata on which the
chips are placed. A thin layer of polymer film eovers the
plate and retains the chips in place. The chips do not adhere
to the film when it is lifted to remove them from the
carrier. Care must be exercised when removing the chips
from the carrier to ensure that the beams are not bent.
A vacuum pickup is useful for this purpose.
8-611
S- 3jR'+R2
Vn
R3
f--
o
.j
I TIm
_~ ~ R, R2
AV = 1001
f--
w
AV=~
R,
L--
1.0
S
7.0
5.0
4.0
3.0
2.0
!
~
III
1.2
~
'00 k
~J
MCBC1748
MCB1748F
~~________O
__
PE_R_A_T_I_O_N_A_L__
A_M_P_L_IF_I_E_R_S~
Advance InforITIation
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
HIGH PERFORMANCE MONOLITHIC
OPERATIONAL AMPLIFIER
..... ~
Beam·lead sealed·junction technology and fabrication make the MCBC174B
and MCB1748F devices excellent choices for use as a summing amplifier,
integrator, or amplifier with operating characteristics as a function of the
external feedback components. Beam·lead products employ a silicon·nitride
dielectric that hermetically seals the chip, eliminating the need for a hermetic
package. The beam leads are gold cantilevered structures extending from the
chip. These beams bond readily to a gold metalized substrate providing one of
the most reliable interconnection systems known for semiconductor devices.
•
•
•
•
•
•
•
."
Noncompensated MCBC1741
Single 30 pF Capacitor Compensation Required For Unity Gain
Short·Circuit Protection
Offset Voltage Null Capability
Wide Common·Mode and Differential Voltage Ranges
Low·Power Consumption
No Latch Up
MAXIMUM RATINGS ITA
= +250 C unless otherwise notedl
Rating
Power Supply Voltage
Differential Input Signal
f·:~~it~c ~.'~:;,
......
,:,.:. .'!~L I"i~".·'
~
.,'1/:0'
.....
·~,.,
·".:;:L, .:
5/):'
;
,.. ,0: :;:••'.'
50<
",.---
'~D
·,150
[;f"~l-~~~:~ ki-~:;"":
. .:. .. .,;:
tf
dVout/dt
Gain
.
110
'"
tpd
= 100, no overshoot,
.~
:
,..;:.,'
dVout/dt
Gain
:.. ,.
5O.ooc:
PBW
tpd
Gain = 1000, 15% overshoot,
:1:12
'.
Power Bandwidth (Av - 1, THO.s 5%,
(V o =20Vp-p, RL = 1.0 kn)
Step Response
Gain = 1000, no overshoot,
-
Zin
CMVin
.
mW
~~_________O
__PE_R_A_T_I_O_N_A_L_A
__M_P_L_IF_I_E_R_S~
MCC1558
MCC1458
(DUAL MC1741)
DUAL
OPERATIONAL AMPLIFIER CHIP
INTEGRATED CIRCUIT
INTERNALLY COMPENSATED, HIGH PERFORMANCE
MONOLITHIC OPERATIONAL AMPLIFIER CHIP
MONOLITHIC SILICON
· .. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components.
The MCC1558 and MCC1458 employ phosphorsilicate passivation
that protects the entire die surface area, including metalization inter·
connects. All dice have a minimum gold-backed thickness of 4000
Angstroms. The interconnecting metalization and bonding pads are
of evaporated aluminum.
•
No Frequency Compensation Required
•
Short-Circuit Protection
•
Wide Common-Mode and Differential Voltage Ranges
•
Low-Power Consumption
•
No Latch Up
MAXIMUM RATINGS (T A = +25 0 C unless otherwise noted I
Rating
Power Supply Voltage
Symbol
MCC1558
V+
+22
+18
-22
-18
V
Differential Input Signal
Common-Mode I nput Swing
Output Short Circuit Duration
Operating Temperature Range
MCC1558
MCC1458
Junction Temperature Range
-
MCC1458
Unit
Vdc
Vin
.±30
Volts
CMVin
;l15
Volts
ts
Continuous
TA
-55 to +125
o to +75
°c
TJ
-65 to +150
°c
FIGURE 1 - CIRCUIT SCHEMATIC
FIGURE 2 - OFFSET ADJUST
r-~----------'---~~----------~----------~--O~
t4
OUTPUT 1
~2
25
OUTPUT
2(12)
50
v~-+----~----4---~~-+---+----~----------~~~7
8-618
14
OUTPUl2
12
50
Theletterswithoutparenthesisrepresentthepinnumbersforl/2of the dual circuit.
letters in parenthesis represent the pin numbet'sfor tneother half.
V'
SUBSTRATE
MCC1558, MCC1458 (continued)
ELECTRICAL CHARACTERISTICS (v+ = +15 Vdc, V- = -15 Vdc, T A = +2S o C unless otherwise noted)
I nput Offset Voltage
(RSS 10 k ohms)
Differential I nput Impedance
(Open· Loop, f = 20 Hz)
Parallel Input Resistance
IlVN
Power Supply Sensitivity
V- = constant, Rs S10 k ohms
V+= constant,
30
S10 k ohms
150
30
Power Su pply Cu rrent
DC Quiescent Power Dissipation
2.3
5.6
2.3
5.6
70
170·
mAde
mW
(V o =0)
See current MC1558/MC1458 data sheet for additional information.
PACKAGING AND HANDLING
MCC1558/MCC1458 BONDING DIAGRAM
The MCC1558/MCC1458 dual operational amplifiers are now
available as a single monolithic die or encapsulated in a variety of
hermetic and plastic packages. The phosphorsilicate passivation
protects the metalization and active area of the die but care must
be exercised when removing the dice from the shipping carrier to
avoid scratching the bonding pads. A vacuum pickup is useful for
the handling of dice. Tweezers are not recommended for this
purpose.
The non-spill type shipping carrier consists of a compart~
mentalized tray and fitted cover. Die are placed in the carrier
with geometry side up.
All dimensions are nominal and
in mils (10-3 inches).
Die Dimensions
Thickness = 8.0
Bonding Pads = 4.0 x 4.0
8-619
'l~
____
N_E_G_A_T_IV_E__
V_O_L_TA_G__
E_R_E_G_U_L_A_T_O_R_S~
MCC1563
MCC1463
NEGATIVE-POWER SUPPLY
VOLTAGE REGULATOR CHIP
MONOLITHIC NEGATIVE VOLTAGE REGULATOR CHIP
The MCC1563/MCC1463 is a "three terminal" negative regulator
designed to deliver continuous load current up to 500 mAdc and
provide a maximum negative input voltage of -40 Vdc. Output current capability can be increased to greater than 10 Adc through use
of one or more external transistors.
The MCC1563 and MCC1463 employ phosphorsilicate passivation
that protects the entire die surface area, including metalization interconnects. All dice have a minimum gold-backed thickness of 4000
Angstroms. The interconnecting metalization and bonding pads are
of evaporated aluminum.
•
MONOLITHIC SILICON
INTEGRATED CIRCUIT
Electronic "Shutdown" and Short-Circuit Protection
•
Low Output Impedance - 20 Milliohms typ
•
Excellent Temperature Stability - TCV o =±0.002%/oC typ
•
High Ripple Rejection - 0.002% typ
•
500 mA Current Capability
FIGURE 1 - TYPICAL CIRCUIT CONNECTION
1-3.51c5VoSI-37IVdc,I';;ILS500mA
FIGURE 2 - TYPICAL NPN CURRENT BOOST CONNECTION
(V o = -5.2 Vdc, IL = 10 Adc Imaxl)
~~----------~--~--~------~--~~-oGND
GNO
R,
Vref
RA
c,
ILl
10
RL
Co
100
"
0.001
v,
RSC
Select RA 10 Give QeSlred Vout:
RA'" (2,V ou tl-7}kU
RL
"
"
Vtn
Il=
HIAmu
~F
v,
O.060n
RA
Vo ",-J.s(J+RIi)
Vo =-5.2Vdc
FIGURE 3 - CIRCUIT SCHEMATIC
6c Shift OUtPut - - -1
2
I
DC Shift Sense 1
9
3 Noise Filter I
Unity Gain Regulator
10~--~~~~~--~----4r~--~~---+4-~~---~~~------t<
Ground
I" - - - - - -
I" - - - - Shut-D~';'; Co;t~ll
I
I
I
I
I
920
Zl
I
I
I
I
I
I
Output
~t--------<>
8
Sense
I
I
I
I
I
I
I
I(Substratel
I
60 k
4~~______+-~
L __ ..Yin _______ ...!
______
~~~
__ ____ __ __+-__
~
~
8-620
~
~
____~~~~
MCC1563, MCC1463 (continued)
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted)
MCC1563
Symbol
Rating
Input Voltage
I':'
Vin
I
";,J
,-40
MCC1463
Unit
-35
Vde
Peak Load Current
IL pk
600
mA
Current, Pin 2
Ipin 2
10
mA
Operating Temperature Range
MCC1563
MCC1463
Junction Temperature Range
TA
-55 to +125
a to +75
°c
TJ
-65 to +175
°c
ELECTRICAL CHARACTERISTICS (I L = 100 mAde, T A = +25 0 C unless otherwise noted)
MCC1463
Min
Characteristic
Max
Unit
-35
Vdc
-32
Vdc
-3.5
-3.8
Vdc
1.5
3.0
Vde
7.0
14
mAde
Typ
I nput Voltage
Output Voltage Range
-3.8
Reference Voltage (Pin 1 to Ground)
-3.2
Minimum Input-Output Voltage Differential
(RSC = 01
Bias Current
(lL= 1.0mAde.lb = lin -ILl
Output Noise
120
(C n = 0.1 "F, f = 10 Hz to 5.0 MHzl
±0.002
Temperature Coefficient of Output Voltage
Input Regulation
0.003
Load Regulation
0.7
mV
(T J = Constant [1.0 mA:::: I L-== 20 mAl I
Output Impedance (f = 1.0 kHz I
35
Shutdown Current
14
milliohms
50
(Vin = -35 Vdcl
See current MC1563/1463 data sheet for additional information
MCC1563/MCC1463 BONDING DIAGRAM
PACKAGING AND HANDLING
(Substrate) ~
5
4
3
The MCC1563/MCC1463 voltage regulator is now available as
2
1
~l
a single monolithic die or encapsulated in the Case 602A and Case
614 hermetic packages. The phosphorsilicate passivation protects
the metalization and active area of the die but care must be exercised when removing the dice from the shipping carrier to avoid
scratching the bonding pads. A vacuum pickup is useful for the
handling of dice. Tweezers are not recommended for this purpose.
The non-spill type shipping carrier consists of a compartmentalized tray and fitted cover. Die are placed in the carrier
with geometry side up.
~-----68------.~1
All dimensions are nominal and
in mils (10- 3 inches).
Die Dimensions
Thickness = 8.0
Bonding Pads = 4.0 x 4.0
8-621
~_____P_O_S_I_T_IV_E_V_O_L_T_A_G_E__R_E_G_U_L_A_T_O_R_S~
MCC1569
MCC1469
POSITIVE VOLTAGE REGULATOR
INTEGRATED CIRCUIT CHIP
MONOLITHIC VOLTAGE REGULATOR CHIP
The MCC1569 and MCC1469 are positive voltage regulators designed to deliver continuous load current up to 500 mAdc. Output
voltage is adjustable from 2.5 Vdc to 37 Vdc. Systems requiring
both a positive and negative regulated voltage can use the MCC1569
and MCC1563 as complementary regulators with a common input
ground.
The MCC1569 and MCC1469 employ phosphorsilicate passivation
that protects the entire die surface area, including metalization interconnects. All dice have a minimum gold-backed thickness of 4000
Angstroms. The interconnecting metalization and bonding pads are
of evaporated aluminum.
•
Electronic "Shut-Down" Control
•
Excellent Load Regulation (Low Output Impedance - 20 milliohms typ)
•
•
High Power Capability: Up to 17.5 Watts
Excellent Temperature Stability: ±0.002%/oC typ
•
High Ripple Rejection: 0.002%1V typ
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
FIGURE 1 - CIRCUIT SCHEMATIC
CONTROL
Vin ~----+'----"""-'--------,
I nput Voltage
Vin
Peak Load Current
Ipk
600
mA
Current, Pin 2
Ipin 2
10
mA
Current, Pin 9
Ipin 9
5,0
TA
-55 to +125
o to +75
°c
TJ
-6510 +150
°c
MCC1569
MCC1469
Operating Temperature Range
Junction Temperature Range
ELECTRICAL CHARACTERISTICS IT A
=
+250 C unless otherwise noted)
Characteristic
Vin = +14 Vdc, Va
= +10 Vdc)
Shutdown Current
I'Adc
I sci
IVin = +35 Vdc)
See currp.nt L\1C1569/1469 data sheet for additional information.
PACKAGING AND HANDLING
MCC1569/MCC1469 BONDING DIAGRAM
:i
66
(Die Center)
The MCC1569/MCC1469 voltage regulator is now available as
a single monolithic die or encapsulated in the Case 602A and Case
614 hermetic packages, The phosphorsilicate passivation protects
the metalization and active area of the die but care must be exercised when removing the dice from the shipping carrier to avoid
scratching the bonding pads.
The non-spill type shipping carrier consists of a compartmentalized tray and fitted cover. Die are placed in the carrier
with geometry side up.
(Subsnate)
_~. ._~~_.....
A vacuum pickup is useful for the
handling of dice. Tweezers are not recommended for this purpose.
_to_ _ _,-
All dimensions are nominal and
in mils 110-3 inches).
Die Dimensions
Thickness = B.O
Bonding Peds = 4.0 x 4.0
8-623
~~____________~______M_U_L_T_IP_L_I_E_R_S~
MCC1595
MCC1495
LINEAR FOUR-QUADRANT
MUL TlPLI ER INTEGRATED
CIRCUIT CHIP
MONOLITHIC FOUR·QUADRANT MULTIPLIER CHIP
· .. designed for uses where the output voltage is a linear product of
two input voltages. Typical applications include: multiply, divide",
square root', mean square', phase detector, frequency doubler,
balanced modulator/demodulator, electronic gain control.
The MCC1595 and MCC1495 employ phosphorsilicate passivation
that protects the entire die surface area, including metalization interconnects. All dice have a minimum gold-backed thickness of 4000
Angstroms. The interconnecting metalization and bonding pads are
of evaporated aluminum.
MONOLITHIC SILICON
EPITAXIAL PASSIVATED
12
11
·When used with an operational amplifier.
•
Excellent Linearity - 0.5% typ Error on X-Input, 1% typ Error on
V-Input - MCC1595
• Excellent Linearity - 1% typ Error on X-Input, 2% typ Error on
V-Input - MCC1495
•
Adjustable Scale Factor, K
•
Excellent Temperature Stability
•
Wide Input Voltage Range -± 10 Volts
MCC1595/MCC1495 Die
MAXIMUM RATINGS (TA ~ 25°C unless otherwise noted)
Rating
Applied Voltage
IV2-Vl, VI4-Vl, Vl-V9, Vl-VI2, Vl- V4.
VI-Va, v12-v7, V9-V7' va-v7' V4-V71
Differential Input Signal
Maximum Bias Current
Symbol
oV
Value
Unit
30
Vdc
V12 Vg
V4- Va
±1&+113 RXI
±16+13 Ry)
10
10
Vdc
Vdc
13
113
Operating Temperature Range
Junction Temperature Range
MCC1595
MCC1495
mA
TA
-55 to +125
o to +70
DC
TJ
-65 to +150
DC
CIRCUIT SCHEMATIC
r-t===:;::::::1===:I;::-~) 142
Output
IKX'I)
X Input
Y Input
12
~~~~11
10
13
50o-~
v- 70~-----~1----~-4---------+-~---~
(SUBSTRATE)
8·624
MCC1595, MCC1495 (continued)
ELECTRICAL CHARACTERISTICS
IV+ - +32 V. V- - -15 V. TA - 250 C. 13 - 113 - 1 mAo RX - Ry -15
RL = 11 kU unless otherwise noted 1
Symbol
Ch.rKteristic
Min
Typ
kn.
Max
Unit
Linearity:
Output Error in Percent of Full Scale:
%
-10--I MFC4010A
>-<>-+-_ OUTPUT
25,uF
17k
1.0k
.
50",F'1'
_PLAY
RECORO~
See Packaging Information Section for outline dimensions.
8-647
~D.I/JF
7.5k
MFC4010A (continued)
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Power SupplV Voltage
V+
18
Vdc
Power Dissipation @ T A = 25°C
(Package Limitation)
Derate above 25 0 C
Po
0.5
Watt
5.0
mWfJC
Operating Tamperature Range
TA
-10 to +75
°c
Unit
ELECTRICAL CHARACTERISTICS (V+ = 6.0 Vdc, T A = 25°C unless otherwise noted)
Characteristic
Open Loop Voltage Gain (F igure 31
(f~
Symbol
Min
Typ
Max
Unit
AVOL
60
68
-
dB
hll
-
1.0
-
k ohms
h12
-
10-6
-
-
h21
-
1000
-
-
h22
-
10-5
-
mhos
en(out)
-
3.0
'-
mV(rms)
10
-
3.0
-
mA
1.0kHz)
h Parameters (11
(f = 1.0 kHz)
Output Noise Voltage (Figure 31
(BW = 20 Hz to 20 kHz, RS = 1.0 k ohms)
Current Drain
HIGH FREQUENCY CHARACTERISTICS (v+
= 12 Vdc, f = 10.7 MHz, TA = 250 C unless otherwise notedl
Power Gain (Figure 11
(ein = 0.1 mVrmsl
-
-
42
-
dB
Noise Figure (Figure 11
(RS'" 740 Ohmsl
NF
-
6.0
-
dB
V Parameters( 11
Vl1
-
1.3+ i1.5
-
mmhos
Y12
-
-3.4 + is.1
-
I'mhos
Y21
-
-0.33 + iO.68
-
mhos
Y22
-
120 + iO
-
#lmhos
(f
= 10.7 MHz, 12 = 2.0 mAl
(1)Oevice only. without external passive components.
FIGURE 3 -AUDIO TEST CIRCUIT
FIGURE 4 - BIASING RECOMMENDATIONS
V+
v+
6.0Vdc
r-----
O.l F,J
IJ
I
--------l
I
I
1.8k
I
I
1.5k
I
I
I
4
3
1.5k
I
I
0.1.'
I
100
I
L _____________ -1
1
8-648
!
RI
~----------~ Ein =0.74 V
I
I
1.0k
~lo/5
12
~~~--~+-~~
I
I
>-<>--~Eo
8.2k
I
120
~---4--I
RL
33k
Select:
Solve for:
Let:
Then:
V+, Eo, and 10
10/5
Rl = (V+ - Eoilio
R2 =5 (0.741/1 0
RI = R2 (Eo - 0.74110.74
1
R2
MFC4010A (continued)
AUDIO PERFORMANCE CHARACTERISTICS
*TAPE PREAMPLIFIER PERFORMANCE
(for Test Circuit Figure 3)
(for Circuit Figure 2)
FIGURE 7 - RECORD VOLTAGE GAIN versus FREQUENCY
FIGURE 5 - VOL TAGE GAIN versus FREQUENCY
~
90
+30
0
'" +25
:s
UJ
.,..-
;;;:
~
'"
;;;:
to
70
z
to
r..,
+20
«
60
>
to
«
o
~
o
0
t
40
~ +10
>
~
«
r\
/
~ +5.0
o
/v
z
:>
«
0
20
10
40 100
400 1.0k 4.0k 10k
-5.0
0.02
40.kl00k 400k1.0M 4.0Ml0M
0.05
0.1
0.3
-
FIGURE 6 - VOLTAGE GAIN versus POWER SUPPLY
0
0
;;;:
'"
~
o
0
/
I
V
5,0
10
20
+2 5
«;
:s +20
'"
;;;:
~ +1
~
t = 1.0 kHz
51
1"-
+1 0
>
-
\.
o
~
V+=6.OV
AV 500 Hz = 35.6 dB
+5.0
1\
~
«
11'
20
o
'"
~-5.0
o
o
3.0
1.0
FIGURE 8 - PLAYBACK VOLTAGE GAIN versus FREQUENCY
>
:>
«
0.5
t, FREQUENCY (kHz)
t, FREQUENCY (Hz)
to
w
to
/
V+ = 6.0 V
Av500Hz=30dB
o~ +15
4.0
8.0
12
16
-10
0.02
20
V+,SUPPLY VOLTAGE (VOLTS)
............
0,05
0.1
0.3
0.5
1.0
3,0
5,0
10
20
t, FREQUENCY (kHz)
Note:
The record/playback characteristics shown in Figures 8 and 9
were taken with the preamplifier driven by a 50 ohm source. The
curves are typical of a desired response for the preamplifier; however, every type of tape recording and playback head is different
and this circuit will not necessarily satisfy all requirements. No particular tape head was used as a basis for circuit design. The circuit
is only an example showing the equalization network configuration.
The ideal preamplifier will have an input impedance approx·
imately 10 times the highest impedance of the tape head and every
preamplifier circuit must be designed uSi.ng a test tape to verify
the response of the design.
8-649
•
MFC4010A (continued)
10.7 MHz y PARAMETERS
FIGURE 10 - REVERSE TRANSFER ADMIT:r ANCE
FIGURE 9 -INPUT ADMITTANCE
1i
3.5
~
3.0
i
~
z
~
.sw
2.5
z
«
>>-
2.0
«
ii
c
«
1.5
...'"
ii:
1.0
c
6.0
w
..t:.
b"
>-
>
b12
B.O
~
:;;
<.>
~
10
'"~
'">-w
'"~
.-,:::"
9"
~
0.5
4. 0
1112
-
2.0
o
0.1
0.5
0.2
1.0
2.0
5.0
10
0.1
0.2
0.5
0.3
140
1.0
!w
~
~
~
~
b211
0.6
0.4
~
:;;
c
«
>ii:
c
'"
~
~
~
,/
0.2
a~
0.1
1121
/
~
c
.....
.... 1--
V
10
5.0
10
...- .
<..)
w
>-
5.0
~ 100
. / I---'"
...'"
'"z~
......-
~ 120
0.8
ii
3.0
FIGURE 12-0UTPUT ADMITTANCE
FIGURE 11 - FORWARD TRANSFER ADMITTANCE
1i
2.0
1.0
12, PIN 2 CURRENT (mA)
12, PIN 2 CURRENT (rnA)
80
0
40
922
'\.
'\.
.A
,/
'\.
E20
'\.
't
2
0.2
0.3
0.5
1.0
2.0
3.0
5.0
0.1
10
12, PIN 2 CURRENT (mA)
0.2
0.5
1.0
2.0
12,PIN 2 CURRENT (mA)
10.7 MHz PERFORMANCE
(Circuit of Figure 1)
FIGURE 13 - POWER GAIN versusSUPPL Y VOLTAGE
FIGURE 14 - VOLTAGE TRANSFER CHARACTERISTIC
400~~~~f=~~~~~~ijij~~!lIm~~~~m
200~
80
70
60
:s
"'
50 1--+--+-- 'in
«to
'";0w
40
z
.
c
=0.1 mVrms -t---+--+----I
30
20
10
4.0
2.0 t-t-t+Htttt--t--H-ttt1#-+l-H-HllIf--+-++++!Hl--+-H+IlIII
6.0
8.0
10
12
14
16
18
1.0 ~'nt-;-'-"~-'-;~~;;---"'-;I;;l.LI.Il!!;--'-:!;;I..I.IJ!!!:~l:±~!!!.
0.03
0.1
0.3
1.0
3.0
10
30
lOa
300 1000
om
20
v+,SUPPlY VOLTAGE (ValIS)
'in, INPUT VOLTAGE (mVrms)
8-650
MFC4040
\
....._ _ _ _ _
8_1N_G_L_E_T_O_G_G_L_E_F_Ll_P_-F_L_O_P-----'
SINGLE TOGGLE
FLIP-FLOP
SINGLE TOGGLE FLIP-FLOP
Silicon Monolithic
Functional Circuit
• Wide Operating Voltage Range - 6.0 to 16 Volts
• Regulated Supply Not Required
•
Economical 4-Lead Plastic Package
MAXIMUM RATINGS ITA = +250 C unless otherwise noted.}
Value
Volts
Power Supply Voltage
19
Vdc
Output Sinking Current
10
rnA
Negative Input Voltage
0.5
Vdc
Power Dissipation (Package Limitation)
Derate above T A = +250 C
1.0
10
Rating
Watt
rnWf'C
°c
-10 to +75
Operating Temperature Range
TYPICAL APPLICATION
470 pF
I-<:H~"" fout'= 1/3 fin
CASE 206A
PLASTIC PACKAGE
4.7 k
INPUT "'~Wlr<~--i
MFC4040
MFC4040
Divide-by-3 Circuit
FIGURE 1 - CIRCUIT SCHEMATIC
Vee
10k
10k
BLOCK DIAGRAM
2k
GROUND
!
INPUT
13k
Vee" Pin 2
GND" Pin 1
13k
See Packaging Information Section for outline dimensions.
8-651
MFC4040
(continued)
= 12 Vdc, Vin = 4.0 V(p-p) Square Pulse, f = 10 kHz, 50%
= +250 C unless otherwise noted.)
ELECTRICAL CHARACTERISTICS(Vee
TA
Characteristic
Min
Typ
Max
6.0
-
16
-
3.0
-
5.5
15.5
-
-
-
-
0.3
0.5
Operating Power Supply Voltage
Toggle Frequency
Output Voltage (High)
(Vee = 6.0 Vdc)
(Vee = 16 Vdc)
Duty Cycle, tpHL
= 1.0 VII's,
Unit
Vdc
MHz
Vdc
Output Voltage (Low)
(Vee = 6.0 Vdc)
(Vec = 16 Vde)
Vdc
Operating Drain Current (Vee = 16 Vde)
-
-
32
mAde
Output Sinking Current
-
2.0
-
mAde
-
250
-
ns
Storage Time
350
-
ns
Fall Time
-
60
-
ns
Input Resistance
10
-
-
kn
Output Resistance (Output High)
-
-
2.8
kn
(VO';;; 1.0 Vde)
Rise Time
INPUT PULSE REQUIREMENTS
Characteristic
VIH
~
LEADING
EDGE
VIL
0
Pulse Magnitude
TRAILING
EDGE
Min
Max
Unit
+4.0
-
Volts
+1.0
Volts
-
Zero Level
Leadi ng Edge
I
Trailing Edge
No Requirement
dv
-
-1.0
dt
FIGURE 2 - RMS CURRENT DRAIN
16
~
,
12
Max
;;:
.sz
~
'"
=>
'-'
V
/
8.0
'">~
V
. /V
V
4.0
4.0
----
r-
6.0
~
Typ
.-.-
----
8.0
10
SUPPLY VOLTAGE (VOLTS)
8-652
r-
12
~
.-.- ~
14
16
Volts
-ms
~___________________A_U_D_I_O_D__R_IV_E_R__~
MFC4050
Advance InforIllation
CLASS "A" AUDIO DRIVER
Silicon Monolithic
Functional Circuit
CLASS "A" AUDIO DRIVER
designed for driving Class "A" PNP power output transistor
stage applications.
•
Drives to 4 Watts of Output Power
•
Ideal for 12 Volt Automotive Equipment
•
No Gain Selection of Power Transistors Necessary
•
Economical 4·Lead Package
PLASTIC
~
PACKA~E ·~nII
""'".
MAXIMUM RATINGS (T A = 25 0 C unless otherwise noted)
Rating
Svmbol
Value
Power Supply Voltage
V+
18
Vdc
Power Dissipation @ T A "" 25°C
(Package Dissipation)
PD
1.0
Watt
Unit
Derate above 25°C
lfeJA
10
mWfoC
Operating Temperature Range
TA
-10to+75
°c
FIGURE 1 - TYPICAL 4·WATT AMPLIFIER CIRCUIT APPLICATION
3.3 M
22 k
1.0 k
0.33 pF 15k
----11--'\.IV'.-t---(l~
8.0
..
'"
'"..
160
120
CI
....
CI
80
0.0 5
\ 1\
\ \
\
~\
\ \
'"
40
,
~
5.0
~
10
:::>
bVi. =+3.0V
0.03
ff:
a:
20
0.02
w
z
:::;
............
15
0.04
5
TA =+250C
'""- r--r-::-
TA=+75~
I
o
o
l
~TA=+500C
:::>
X
TJ(max) = +125 0C
ReJA = +100oCIW
0.0 I
I---
25
30
35
40
o
5.0
-
r-- l"10
15
20
INPUT·OUTPUT VOLTAGE (Vdc)
INPUT·OUTPUT VOLTAGE (Vdc)
8-657
25
30
1L________________F_M__IF__A_M_P_L_IF_I_E_R~
MFC6010
FM LIMITING IF AMPLIFIER
· •. a monolithic silicon integrated circuit designed especially for
10.7 MHz I F applications.
FM IF AMPLI FI ER
Silicon Monolithic
Functional Circuit
High Iights Inelude:
• High Stable Gain @ 10.7 MHz (40 dB typ)
•
Low Feedback Capacitance (IY121 = 0.01 mmho typ)
• Non·Saturating Limiting (With Suitable Load)
• Compatible With CA3053 and jJ.A703 (See Figures 7 and 8)
MAXIMUM RATINGS (T A = +250 C unless otherwise noted.)
Rating
Power Supply Voltage
Output Collector Voltage
Input Voltage
Power Dissipation (jjI T A • 25u C
(Package Limitation)
Derate above 25°C
Operating Temperature Range
llY'mbol
V+
Value
20
Unit
Vdc
V4
V2.V",
20
±S.O
Po
1.0
Vdc
Volts
Watt
1/8JA
TA
10
-10to +75
mW/oC
uC
CASE 64JA
PLASTIC PACKAGE
• Differential Voltage Swing.
FIGURE 1 - Typical Application (10.7 MHz Limiting Amplifier)
v+
"'---1.-..,
::r:
3
O.Ol.F
.".
MFC6010
r----- -
-,4
RATIO DETECTOR
I
I
I
I
225
840
L ______ _
I
I
I
....- - - - - -. . A~~i~UT
v+
S~19 P~r..k!'l9ing Infnrmartinn SAl":til)n fo," ot!t!!ne
dimensIon!.
8-658
MFC6010 (continued)
ELECTRICAL CHARACTERISTICS (v+ ~ 12 Volts, f ~ 10.7 MHz, T A ~ +25 0 C, unless otherwise noted.)
'"'~'
,
3
5
Characteristic
~
4
1
~
6
-~~
,
3
I,
~
6
V+-12 Vdc
Circuit for iY21i
ID
-
Max
Unit
-
10
rnA
3.2
5.0
3.5
-
Typ
10
Output Saturation Voltage
Vlsat)
-
Forward Transadmittance
! Y21!
25
-
! Y12!
-
0.01
I nput Capacitance
Cin
-
I nput Conductance
Gin
Output Capacitance
Cout
Output Conductance
+--
1
Min
Output Quiescent Current
Reverse Transadmittance
4
5
Symbol
Total Current Drain
1.75
6.0
50
N
.,.
em
5
lOmVrms
6
@
50
1
mmhos
mmho
pF
0.4
mmho
24O
(e-""'~
"':
rnA
Volts
-
2.5
-
pF
Gout
-
35
-
Jlmhos
Noise Figure (RS = 750 n)
NF
-
7.0
-
dB
Max imum Stable Gain (Stern Factor = 3)
Av
-
40
-
dB
Input Voltage (3.0 dB limiting)
ein
-
60
-
mV
...
10.7 MHz
TO.O'~F
FIGURE 2 - LIMITING CHARACTERISTICS
600
500
§
I
I
r--- I-
IOJ% FJ
f- fo" 10.7 MHz
f----- fM" I kHz
I--
400
:;
.s
l-
=>
V
300
!;
/"
0
0
200
i5
=>
'"
./
--
100
2.0
1.0
3.0
5.0
V
20
10
30
50
100
200
300
500
1000
Vin (mV[rms))
FIGURE 3 - AM REJECTION
FIGURE 4 - CURRENT DRAIN AND OUTPUT CURRENT
0
10
100% FM. 30%! AM"
0
fa'" 10.7 MHz
0
:i'
6.0
i
4.0
.s
0
/
0
I~, TOT~L ORAiN CUR~ENT V V
........ V
.,.../"
V
,/
..-::::::: :..10 , AVAILABLE PEAK-
B.O
fM" 1 kHz
;"
13
OUTPUT CURRENT_
(10"
21al
0
2.0
0
o
2.0
o
5,0
10
20
50
100
200
500
1000 2000
o
4,0
B.O
12
V+, SUPPLY VOLTAGE IVdcl
Vin (mV[rms) I
8-659
16
20
MFC6010 (continued)
TEST CIRCUITS
FIGURE 5 - POWER-GAIN TEST CIRCUIT
100
100
4-30 pF
C1
550·1600 pF
C2
115·550pF
MFC6010
50" LOAD
50
20 k
20 k
-:::-
Note: C1 (1000 pF noml. C2 (420 pF noml. C3 (20 pF nom)
adjusted for maximum power gain.
FIGURE 6 - LIMITING AND AM REJECTION TEST CIRCUIT
+12 V
100
H.P.606
or Equiv
I
30% AM
-=-
O.Ol"F
O.01 "F
1.0 k
2
~f----.----<~
10 k
100
Audio
Output
100% FM
Boonton
10k
51
207H
or Equiv
- ---.I
1.0 k
47k
68
0.01 "F
-:::-
-:::-
T1 - Ratio Detector Primary Impedance"'" 1.5 kn
8-660
-=-
r"
MFC6010 (continued)
APPLICATIONS INFORMATION
chosen to ensure that current limiting occurs before the collector
voltage drops to a value low enough to forward bias the collectorbase junction. In a transformer coupled circuit, the maximum
allowable load can be derived from
Because of the low reverse transfer admittance of the MFC6010.
stability will be dependent mainly upon circuit layout.
With
careful design, very high gain (in the order of 40 dB) may be
achieved at 10.7 MHz. The bias and supply currents may be varied
from their normal values (shown in Figure 4) by shunting addi~
tional resistance from pin 6 to ground or to the supply line.
Although less gain may be realized when using the MFC6010
as a limiter, it is recommended that it be operated in a non-saturated
'0
mode. This mode of operation results in a high output impedance
at limiting. Therefore the operation of the demodulator circuit is
not subject to variable loading of the limiter output.
In order to avoid driving the amplifier transistor components
of the MFC6010 into saturation, the load resistance must be
where values for
may be determined from Figure 4 (providing
the bias currents have not been altered from their normal values).
I n order to avoid degradation of AM rejection, the input signal
should not exceed one volt (rms).
COMPATIBLE FOIL PATTERNS
FIGURE 7 -I-IA703 and MFC6010
FIGURE 8 - CA3053· and MFC6010
~'~'~
5~
4~7~3
0
2
50
o
Motorola terminal and pin number position
-FOil patterns shown are intended to show pin·for-pin interconnection.
ments of the individual design.
•
J1A703 or CA3053 terminal and pin number
position
Anv change in the number of components is dictated by the require·
8-661
~~__________D_U_A_L_T_O_G_G_L_E_F_L_I_P-_F_L_O_P__~
MFC6020
DUAL TOGGLE FLIP-FLOP
DUAL TOGGLE
FLIP-FLOP
• Wide Operating Voltage Range - 6.0 to 16 Volts
•
Regulated Supply Not Required
•
Economical 6·Lead Plastic Package
Silicon Monolithic
Functional Circuit
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted. I
Rating
Value
Volts
Power Supply Voltage
19
Vdc
Output Sinking Current
10
rnA
Negative Input Voltage
0.5
Vdc
Power Dissipation (Package Limitation)
1.0
Watts
Derate above T A == +2SoC
10
rnW/oC
Operating and Storage Junction
Temperature Range
-40 to +125
°c
Operating Temperature
-10to+75
°c
TYPICAL APPLICATION - ELECTRONIC
ORGAN DIVIDER
C4
C5
r---
C3
C2
----,
I
I
I
I
Q
I
I
OSCILLATOR
L
CASE 643A
PLASTIC PACKAGE
Cl
I
_______II
MFC6020
I
L ______
I
I
--l
MFC6020
FIGURE 1 - CIRCUIT SCHEMATIC lOne Half of Circuit Shown I
BLOCK DIAGRAM
Vee
10k
10.
T1
2k
_
2LJ
GROUND
l'
INPUT
2and5
~3Ql
u
~4Q2
T2
5
Vcc=Pin6
13'
13'
GND '" Pin 1
See Packaging Information Section for outline dimensions.
8-662
MFC6020
(continued)
ElECTR ICAl CHARACTERISTICS (Vee = 12 Vde. Vin = 4.0 V. Square Pul,e. f = 10 kHz. 50% Duty Cycle. tpHL = 1.0 VI"".
T A == +2SoC unless otherwise noted,)
Characteristic
Typ
Min
l\:'1ax
Unit
6.0
-
16
Vde
-
3.0
-
MHz
5.5
15.5
-
-
-
-
0.3
0.5
(Vee = 16 Vde)
-
-
32
Output Sinking Current
(VO';; 1.0 Vdcl
-
2.0
-
Operating Power Supply Voltage
Toggle Frequency
Output Voltage (High)
(Vee = 6.0 Vdc)
(Vee = 16 Vdc)
Vdc
Output Voltage (Low)
Vde
(Vee = 6.0 Vdc)
(Vee =16 Vde)
Operating Drain Current
mAde
mAde
Rise Time
-
250
-
n,
Storage Time
-
350
-
n,
Fall Time
-
60
-
n,
10
-
-
kn
-
-
2.8
kn
Input Resistance
Output Resistance (Output High)
INPUT PULSE REOUIREMENTS
VIH
~
LEADING
EDGE
V,L
0
TRAILING
EDGE
Characteristic
Min
Pulse Magnitude
+4.0
Max
-
-
Zero Level
+1.0
Leadi ng Edge
Volts
No Requirement
Trailing Edge dv/dt
t
Unit
Volts
-
-1.0
Volts
m,
FIGURE 2 - RMSCURRENT DRAIN versu,SUPPLY VOLTAGE
32
§
24
Max
<"
E
'"
~
'">~
'"=>
'"
~
/
V
16
V
/"
8.0
4.0
----
V
6.0
----
Typ
..--V8.0
10
f-"""
12
SUPPLY VOLTAGE IVO LTS)
8-663
v
..-- v---
14
16
MFC6030A ~~_________V_O__LT_A_G__E_R_E_G_U_L_A_T_O_R_S__~
MFC6032A
MFC6033A
MFC6034A
VOLTAGE REGULATORS
MONOLITHIC SILICON
FUNCTIONAL CIRCUITS
MONOLITHIC VOLTAGE REGULATORS
This series of voltage regulators is designed to deliver load currents
to 200 mAde. Output current capability can be increased to several
amperes through the use of external pass transistors. These devices
are industrial quality regulators intended for consumer applications
requiring high volume and low cost.
•
•
•
Excellent Line and Load Regulation
Current-Limit Feature Available
Economical Six-Lead Package
(TOP VIEW)
PLASTIC PACKAGE
CASE 643A
FIGURE 3 - CIRCUIT SCHEMATIC
FIGURE I - TYPICAL CIRCUIT CONNECTION
AND TEST CIRCUIT
~~~~g~~: t-04 _ _-,
MFC6033A
Va=
(~+
1)
25 k
:r
Vref
Rl"" (~O -2) kn
1.6 k
FIGURE 2 -IS-VOLT, 1.a·AMPERE REGULATOR
(with short·circuit protection)
6
MJE521
OR EQUIV
7.5n, lOW
INPUT
+24 V to
+32 V
O.l
IlF:J
MFC6030A
MFC6032A
1.4 k
2200
6
500
820
-:k:1
~
See Packaging Information Section for outline dimensions.
8-664
1.2 k
1.1 k
MFC6030A, MFC6032A, MFC6033A, MFC6034A (continued)
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted)
Rating
Symbol
Input Voltage
MFC6030A, MFC6032A
MFC6033A, MFC6034A
Unit
Value
Vde
Vin
38
22
Maximum Load Current
IL
200
mAde
Power Dissipation (Package Limitation)
Derate above T A = +25 0 C
Po
1.0
10
Watt
mW/oC
Operating Temperature Ranga (Ambient)
TA
-10 to +75
°c
Storaga Temperature Ranga
Tstg
-65 to +150
DC
ELECTRICAL CHARACTERISTICS (Vin = +12 Vde, Vo = +5.0 Vde, IL = 1.0 mAde, Rsc = 0, TA =
+25 0 C
unless otherwise noted.)
(See Figure 1)
0.06
%/VO
0.4
mAde
6.5
LINE REGULATION
/lVO" 100
%lVin - /lVin x Vo
LOAD REGULATION
SHORT-CIRCUIT CURRENT
VBE
0.65 (at T J = +25 0 C)
ISC = l1sC ~
100 ohms
%=/lVO x 100
Vo
TYPICAL CHARACTERISTICS
=12 Vdc, Vo = 5.0 Vdc,IL = 1.0 mAde, Rsc = 0, T A = +25 0 C unless otherwise noted.)
(Vin
FIGURE 4 - MAXIMUM LOAD CURRENT versus
INPUT·OUTPUT VOLTAGE
200
TJfm~x"+12JOC
«
'"
g
:E
::>
:E
,_
ReJA'+100oC/W
,\1\
~
'"
0.05
\
1
... 160
'"
a
FIGURE 5 - LINE REGULATION versus
INPUT-OUTPUT VOLTAGE
\
=
z
120
'"
1\ \
\ \
80
:E 40
o
"
TA '+750 C
o
5.0
0.03
~
::>
'\
\.
x
«
0.04
->
~
TA"'+25 DC
..........
. / TA'+50oC
~
r-...
10
'"~
-
r--......
15
?
IL = 1.0 to 50 mA-
z
0
>=
-
:3
=>
~
'"
0
« -0.1
::
2
10
-
-
6
5
0.01
1.0M
"F
2 k
5.3 k
Rl
-0.2
10
5.0
15
20
25
NOTE: For other output voltages:
(-9 V ';;VO';;-35 VI
21 V ol
Rl ( k n l = - - - 2
30
INPUT·OUTPUT VOLTAGE IVdcl
V,ef
IVol
V z = IVinl- - 2 - + 1
FIGURE 7 - LOAD REGULATION WITH
CURRENT LIMITING
+0.1
FIGURE 10 - 15-VOLT, 2.0-AMPERE REGULATOR
(with current foldback)
-......
(3
>
?
z
0
-0.1
Rs<- 0
.............
""
>=
:3
=>
~
-0.2
0
«
::
-0.3
-0.4
MJE521
OR EOUIV
OUTPUT
+15 V
Rsc- 3.25<1
"
\
INPUT
+24 V to
+32 V
Rs<= 10<1
2
1\
MFC6030A
MFC6032A
\
2200
\
o
20
40
60
Isc :: 0.37 A
80
OUTPUT CURRENT (mAl
10 =
Vo R2 + 0.6 (R2 + R31
Rl R3
lo.OOI
"F
820
F'IGURE 11 - 6.O-VOL T. 5.0-AMPERE HIGH
EFFICIENCY REGULATOR
FIGURE 8 - OUTPUT VOLTAGE versus Rl
MJ1000
OR EOUIV
INPUT
(POWER)
+9.0 V
10
~
8.0
"
6.0
INPUT
(RGL TR)
+18 V 2
4.0
2.0
0.1 "T'
"F~
0
0
3.0
6.0
9.0
12
15
18
21
MFC6030A
MFC6032A
MFC6033A
MFC6034A
330
5
6
680
24
OUTPUT VOLTAGE (Vdcl
8-666
MFC6030A, MFC6032A, MFC6033A, MFC6034A (continued)
TYPICAL APPLICATIONS (continued)
FIGURE 15 - VOLTAGE BOOSTED 40-VOLT,
100 rnA REGULATOR
(with short-circuit current limiting)
FIGURE 12 - CURRENT BYPASS
(Load current range, 400-to-500 rnA)
INPUT
(POWER)
OUTPUT
+5.0 V
OUTPUT
+40 V
5,1
INPUT
+15 V
MPS-A55
OR EOUIV
10k
18 k
0,1 ILFJ
3
2
MFC6030A
MFC6032A
MFC6030A
MFC6032A
MFC6033A
MFC6034A
4
:J:
5
0,001
ILF
2 k
10.001 ILF
FIGURE 13 - 100 rnA CONSTANT CURRENT SOURCE
INPUT
+28 V
27
3
INPUT
IRGLTR)
+15 V
MPS-U05
OR EQUIV
6
43
lW
FIGURE 14 - 5,0-VOL T, S,O-AMPERE REGULATOR with
REMOTE SENSING, PNP CURRENT BOOST
CONSTANT
IlL
••--------------------eo
g~~~~~T
10
to
+20 V)
MJ900
OR EOUIV
Pin 4 not connected
3
MFC6030A
MFC6032A
MFC6033A
MFC6034A
0,1
n
OUTPUT
+5 V
4
330
680
8-667
RL
~f
"
ELECTRONIC ATTENUATOR
\.._-------
MFC6040
ELECTRONIC ATTENUATOR
ELECTRONIC ATTENUATOR
Silicon Monolithic
I nt"grated Circuit
• Designed for use in:
DC Operated Volume Control
Compression and Expansion Amplifier
Applications
• Controlled by DC Voltage or External Variable Resistor
• Economical 6-Lead Plastic Package
MAXIMUM RATINGS ITA = +2SoC unless otherwise noted.)
Rating
Value
Unit
Power Supply Voltage
20
Vdc
Power Dissipation @ T A = 25°C
1.0
Watt
10
mW/oC
o to +75
°c
CASE 643A
PLASTIC PACKAGE
(Package Limitation)
Derate above T A
= 25°C
Operating Temperature Range
FIGURE 1 - TYPICAL DC "REMOTE" VOLUME CONTROL
Vee
4
1.0~F
..
Remotelv
Located , - - - ,
Pot.
::l
See Packaging Information Section for outline dimensions.
8-668
MFC6040 (continued)
ELECTRICAL CHARACTERISTICS (ein = 100 mV (RMS)
f
= 10kHz Rl = 0 VCC = 16 Vdc TA = +250 C unless otherwise noted)
Min
Typ
Mex
Unit
9.0
-
18
Vdc
Control Terminal Sink Current
(ein = 0)
-
-
2.0
mAde
Maximum Input Voltage
-
-
0.5 V(RMS)
Voltage Gain
11
13
-
dB
A ttenuation Range
(RC = 33 k ohms)
70
90
-
dB
0.6
1.0
%
Circuit
Characteristic
Operating Power Supply Voltage
Total Harmonic Distortion (Pin 2 Gnd)
(ein = 100 mV (RMS), eo = Av x ein)
FIGURE 2 - CIRCUIT SCHEMATIC
4
K
Vee
6
Iv
ROL LOFF
t...
5
OUTPUT
---{
':'
2
V
I-'
)--
V
~
':'
':'
eON TROL
':'
':'
3
-
INPUT
l
t.....
.A
~,
-
-
8-669
-
-
MFC6040 (continued)
TYPICAL ELECTRICAL CHARACTERISTICS
(Vee; 16 Vdc, T A; +25 0 C unless otherwise noted.1
-
FIGURE 4 - ATTENUATION versus CONTROL RESISTOR
FIGURE 3 - ATTENUATION versus DC CONTROL VOL TAGE
0
20
~
z
o
t--.
0
........ .........
z
~
60
I-
«
........
'"
40
~
=>
0
i'...
""
odB Reference = 13 dB Gain
1= 1.0 kHz
4.0
4.5
5.0
I'\..
'\.
l'..
0
'\.
1= 1.0 kHz
'\.
'\
0
Rc is from pin 2 to ground
100
4.0
6.0
5.5
a dB Reference = 13 dB Gain
6.0
V2, CONTROL VOLTAGE (VOLTS)
?:
8. 0
Z
~
UJ
Input voltage (ein) == 10 mV
Pin 6 uncompensated
to
o
>
4.0
~
l=>
o
2.0
I-
4. 0
1\
2. 0
1\
10k
lOOk
1.0M
---
6.0
~
1\
o
1.0 k
o
100M
10 M
8.0
9.0
V
11
10
FREQUENCY (Hz)
12
FIGURE 7 - TOTAL HARMONIC DISTORTION
D:
0
3. 0
l;;
/'
c
Z
~
2. 0
a dB Reference =13 dB Gain
1= 1.0 kHz
'. = 2.5 V(RMS)
/
-'
0
I-
I--
I
«
:r
«
l-
I-""
17
'-'
0
13
14
15
SUPPL Y VOLTAGE (VOLTSI
4. 0
~
z
0
f:
30
-
~~
to
~ 6. 0
0
100
f""-..
20
I"-
0
>
15
0
2
w
to
10
f'...
40
FIGURE 6 - OUTPUT VOLTAGE SWING
FIGURE 5 - FREOUENCY RESPONSE
~ 8. 0
8.0
"
Re, CONTROL RESISTOR (k OHMSI
14
z
,
0
80
100
3.5
r--.. r-....
I. 0
~
10
I
20
30
40
50
ATTENUATION (dB)
8·670
60
70
80
16
~
17
18
MFC60S0
~~__________D_U_A_L__T_O_G_G_L_E_F_L_I_P-_F_L_O_P__~
DUAL TOGGLE FLIP-FLOP
WITH RESET
•
DUAL TOGGLE FLIP-FLOP
WITH RESET
Silicon Monolithic
Functional Circuit
Wide Operating Voltage Range - 6.0 to 16 Volts
•
Regulated Supply Not Required
•
Ideal for Remote Control Applications
•
Economical 6-Lead Plastic Package
•
Reset (RI Available to Set Output to
History
MAXIMUM RATINGS ITA
~
a
Regardless of Previous
+25 0 C unless otherw;se noted.!
Rating
Value
Volts
Power Supply Voltage
19
Vdc
Output Sinking Current
15
mA
Negative I nput Voltage
0.5·
Vdc
Power Dissipation (Package LimItation)
1.0
10
mW/oC
+10to +75
°c
Derate above T A
= +25 0 C
Operating Temperature Range
Wan
TYPICAL APPLICATION - DIVIDE-BY-60 COUNTER
o,Equlv
Note
250
CASE 643A
PLASTIC PACKAGE
En~hle "'list he 'Imllnllen In U"r! Clam!
ENABLE
SIMPLIFIED CIRCUIT SCHEMATIC
OUTPUT
BLOCK DIAGRAM
(One-Half of Circuit Shown)
01
Vee·' Pin 6
GNO" Pill 1
GNO
See Packaging Information Section for outline dimensions.
8-671
MFC6050 (continued)
ELECTRICAL CHARACTERISTICS (Vee = 12 Vdc, Vin = 4.0 V, Square Pulse, f = 10 kHz, 50'A, Duty Cycle, tPHL = 1.0 Vilis (Mini,
TA
= +2SoC
unless otherwise noted)
Characteristic
Operating Power Supply Voltage
Toggle Frequency
Typ
Max
6.0
-
16
Vdc
-
3.0
-
MHz
3.7
-
5.5
-
-
Vdc
Output Voltage (Highl
(Vee = 6.0 Vdcl
(Vee
Unit
Min
01
02
01
Q2
= 16 Vdcl
10
15.5
-
Output Voltage (Lowl
Vdc
= 6.0 Vdel
= 16 Vdel
-
-
0.5
1.0
Operating Drain Current
-
-
32
mAde
Output Sinking Current
(VO';; 1.0 Vdcl
-
B.O
-
mAde
(Vee
(Vee
-
Rise Time
-
250
-
ns
Storage Time
-
350
-
ns
Fall Time
-
60
-
ns
Input Resistance
10
-
-
k!l
Output Resistance (Output High)
-
-
6.0
k!l
INPUT PULSE REQUIREMENTS
Symbol
Min
Max
Unit
Pulse Magnitude
VIH
+4.0
-
Volts
Zero Level
VIL
+1.0
Volts
Characteristic
VIH
~
LEADING
EDGE
VIL
0
TRAILING
EDGE
t
-
-
Leading Edge
dv
-
Trailing Edge
-
+0.1
-
-1.0
dt
§
24
;;r
Max
.sz
~
'"
16
~
'"u=>
0
/
V
V
/
B.O
o
4.0
,-
-----
6.0
...--
Typ
....- v--B.O
V
10
12
Vee. SUPPLY VOLTAGE IVOL TS)
8-672
~
-
~
I-"'"""
14
-liS
FIGURE 2 - RMS CURRENT DRAIN versus SUPPL Y VOL TAGE
32
Vilis
Volts
16
~~__________A_U_D_I_O_P_O_W_E_R__A_M_P_L_IF_I_E_R~
MFC6070
1-WATT
AUDIO POWER AMPLIFIER
1-WATT AUDIO POWER AMPLIFIER
· .. designed primarily for low·cost audio amplifiers in phonograph,
TV and radio applications.
•
Silicon Monolithic
Functional Circuit
100 mV Sensitivity for l·Watt·
•
Low Distortion - 1%@ l·Watt typO
•
Short·Circuit Proof - Short Term (10 seconds typ)
•
No Heatsink Required for l·Watt Output at T A = 55 0 C"
•
Excellent Hum Rejection
·Circuit Dependent
•• Voltage Dependent
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted I
Rating
Symbol
Power Supply Voltage
Value
Unit
V
20
Vdc
1.0
8.0
Watt
mW/oC
Operating Temperature Range
PD
l/eJA
TA
-10to+55
Storage Temperature Range
T stg
-40 to +150
°c
°c
Power Dissipation
Derate above T A
= +250 C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Ambient
*Thermal resistance is measured in still air with fine wires connected to the leads, representing
the "worst case" situation.
For a larger power requirement, pin 1 must be soldered to at least one sq. in. of copper
e
foil on the printed circuit board. The JA will be no greater than +90 0 C/W. Thus, 1.39
Watts could be dissipated at +25 0 C, which must be linearty derated at 11.1 mW/oC from
+25 0 C to +150 0 C.
FIGURE 1 -TYPICAL 1·WATTPHONOGRAPHAMPLIFIER
(Ceramic cartridge input)
v'
680k
z
390k
lOOk
INPUT
47 pF
MFC6070
1.0 M
O.OlIlF
lBOk
1.5M
510k
See Packaging Information Section for outline dimensions.
8-673
CASE 643A
PLASTIC PACKAGE
MFC6070 (continued)
ELECTRICAL CHARACTERISTICS (v+ = 16 Vdc, See Figure2 for test circuit, TA
= +25 0 C
unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Quiescent Output Voltage
Vo
8.0
-
Vdc
Quiescent Drain Current (ein = 0)
ID
5.0
18
mA
Sensitivity, Input Voltage
ein
-
100
150
mV
-
1.0
10
1.0
3.0
-
-40
-
(ein adjusted for eo = 4.0 V(rms) @ 1.0 kHz, Power Output = 1.0 Watt)
Total Harmonic Distortion
(eo = 4.0 V(rms) @ 1.0 kHz, Power Output
THD
%
= 1.0 Watt)
(ein adjusted fore a "" 1.26 vtrms)@1.0kHz,PowerOutput=100 mW)
-
Hum and Noise (I H F Standard A201, 1966)
FIGURE 2-1·WATT AUDIO POWER AMPLIFIER TESTCIRCUIT
v+
16 n LOAO
15 k
470pF
6
vo
Circuit Schematic
8-674
t
¥
d8
MFC6070
(continued)
APPLICATIONS INFORMATION (continued)
(RL = 8.0 ohms, T A = +25 0 C unless otherwise noted)
FIGURE 6 - POWER SUPPLY
RS
Motor
Overwind
1---_____ V+
Or
Transformer
RS
r--~~-~r--~--~-------_V+
1
Motor
Overwind
Or
lN4001
or Equiv
T
Transformer
AS - Sertes resistance of wmdlng
= 16 V is approximately 12 V
VAC for Vee
FIGURE 8 - TOTAL HARMONIC OISTORTION
versus OUTPUT POWER FOR FIGURE 7
FIGURE 7 -PHONOGRAPH AMPLIFIER 1 WATT -80HM
(See Figure 15 for Parts List)
5.0
~
;3
'1
r-T-'-"""'~-------""".V q13 V
~
'9
R4
TONE
4.0
0
R12
R2
~
0
R11
u
C3
f - 1.0 k z
/
3.0
/
Z
0
C11_
R3
ili
:i
C8
VOLUME
)
1.0
~
«
6fR5
g
R7
V+5p
13V
o
FIGURE 10 - FREQUENCY RESPONSE FOR FIGURE 7
11111
11111
16
~o~J~W
l;;
~
Z
12
~
f'..
8,0
'"
~.
0
.......
4. 0
f-
I'-I'--
5. 0
III
III
100
Po'" 250 mWat 1.0 kHz
V+ = 11 V
o
100
-
V
............
f-
10
_
5/
~
'~"
1.0
15
o
"'
O.B
0.6
Po, OUTPUTPOWER IWATTS!
FIGURE 9 - TOTAL HARMONIC DISTORTION
versus FREQUENCY FOR FIGURE 7
o
0.4
0.1
OPTIONAL
10
~
~
o
C4
~
z
-
LO
f-
R6
o
V
500
1.0 k
1.0 k
5.0 k
10 k
13 V
10k
t, FREQUENCY 1Hz!
0
100
100
500
1.0 k
2.0 k
t, FREQUENCY 1Hz!
8-676
5.0k
10 k
10 k
MFC6070
(continued)
APPLICATIONS INFORMATION (continued I
(R L = 16 ohms, T A = +25 0 C unless otherwise noted)
FIGURE 11-1.0WATT.160HM LOAO PHONOGRAPH AMPLIFIER
FIGURE 12-TOTAL HARMONIC DISTORTION
versus OUTPUT POWER FOR FIGURE 11
(See Figure 15 for Parts Listl
AI
g
,,[
~
TONE
RII
4
"1_
~t;;
R12
C6
_rVO_l_UM_E~__~l~~
~ 3.0 f--jl--+---+---:-I+-=":""1.0=-k-Hfz --+-+--+--1--1
~
CJ
~
~
R3=
_
R5
R7
4.0 f--jI----+---+--+-+-+---+---+---f-.--1
6
2.01---i1_-+---+--+--+--+-+---+--1_/,
g... I.ol--~I_-+--+--+-+-V+ =15 V+--b,...c.-I--j
V
-
RIO
...g
1
C4
16 V
---
°0~---L--~0.2~~--~0~.4---L--~0.~6--~~0~.8~-L--~1.0
OPTIONAL
po. OUTPUT POWER IWATTS)
FIGURE 13 - TOTAL HARMONIC DISTORTION
versus FREQUENCY FOR FIGURE 11
FIGURE 14 - FREQUENCY RESPONSE FOR FIGURE 11
20
g
'":;:"
16
20
'"t;;
0
u
12
Po
Z
:;;'"
~
=
~
1W
"~
I\.
8.0
""-
V
15f---+-j-j-++1+++__--+--~_+~H++__-__i
10 f---+-j-j-+-H+tt----t- Po = 250 mW@ 1.0 kHz -
~
«
:;
...0"
...'"
4.0 ' "
..........
5.0 f---+-j-j-++1+++__--+-~_+~H++__-__i
........
~
0
100
200
500
1.0k
2.0 k
f. FREQUENCY
5.0 k
10 k
20 k
°l LOO,------::-20!-:0.....J.....J-::5!-:00,w--':'-1.0:'-:k-----::-2-l:-.0.,-k--"----":-5.':-0:-'k--'-'-!,10:'-:k--::::'20 k
f. FREQUENcY (Hz)
1Hz)
FIGURE 15 - PARTS LIST FOR FIGURES 7 AND 11
Rl = 180 k ohms
R2 = 5.0 Megohms
R3 = 5.0 Megohms
R4 = 1.0 Megohm
R5 = 150 k ohms'
R6 = 910 k ohms'
R7 = 680 k ohms
R8 = 180 k ohms
R9 = 1.0 Megohm
RIO = 1.5 Megohms
R11 = 6.8 k ohms
R12 = 6.8 k ohms
RA = 10 ohms'*
Cl = 470 pF
C2 = O.l/.LF
C3 = 0.05/.LF
C4 = 470 pF
C5 = O.l/.LF
C6 = 470 pF
C7 =O.l/.LF
C8 = 500 /.LF*
CA = O.l/.LF**
*For Figure 11 (l6-ohm load) change R5 to 100 k ohms, R6 to 820 k ohms
and C8 to 250 /.LF.
"Optional - Not included on board. (See Applications Information Note)
8-677
MFC6070 (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 16 -PRINTED CIRCUIT BOARD (Foil Side)
(Speaker Grounded)
FIGURE 17 -COMPONENT DIAGRAM FOR FIGURE 16
FIGURE 18 - PRINTED CIRCUIT BOARD (Foil Side)
(Speaker to v+)
FIGURE 19 -COMPONENT DIAGRAM FOR FIGURE 18
FIGURE 21 - COMPLETED BOARD
FIGURE 20 - PARTS LIST FOR FIGURE 19
(Speaker Grounded)
(See Applications Information Note)
Rl
R2, R3
R4,R9
R5
R6
R7
RB
R10
Rll
RA
= 180 k ohms
5.0 Megohms
= 1.0 Megohm
= B2 k ohms
= B20 k ohms
=6BO k ohms
= lBO k ohms
= 1.5 Megohms
= 15 kohms
=10 ohms*
=
Cl,C4,C6 =470 pF
C2,C5
= 0.1 J.lF
C3
=0.05 J.lF
C7
= 250 J.lF
CA
= 0.1 J.lF*
*Optional- Not included on
board. (See Applications
I nformation Note)
8-678
MFC8020A ~__________________A_U_D_I_O_D_R_I_V_E_R_S~
MFC8021A
MFC8022A
CLASS B AUDIO DRIVERS
SILICON MONOLITHIC
FUNCTIONAL CIRCUITS
CLASS B AUDIO DRIVERS
. designed as preamplifiers and driver circuits for complementary
output transistors.
•
•
•
•
•
Driver for Auto Radios - and up to 20-Watt Amplifiers
High Gain - 7.0 mV for 1.0 Watt, R L = 3.2 Ohms
High Input Impedance - 500-Kilohm Capability
Output Biasing Diodes Included
No Special hF E Matching of Outputs Required
MAXIMUM RATI NGS ITA - t 25 0 C unless otherw,se noted I
Value
MFC8020A
MFC8021A
MFC8022A
Unit
20
1.0
10
45
1.0
10
Watt
Derate above T A = + 25°C
35
1.0
10
mW/oC
Peak Output Current (pins 5 & 8)
150
150
150
mA
~lOto+75
°c
~55to+125
°c
Rating
Power Supply Voltage
Power Dissipation
Operating Temperature ,Range
Storage Temperature Range
-10 to +75
~55to+125
~10
to +75
~55to+125
Vdc
CASE 644A
THERMAL CHARACTERISTICS
Value
Unit
Thermal Resistance
100
°C/W
Junction Temperature
125
°c
Characteristic
FIGURE 1 - CIRCUIT SCHEMATIC
See Packaging Information Section for outline dimensions.
8-679
PLASTIC PACKAGE
MFC8020A, MFC8021A, MFC8022A (continued)
ELECTRicAL CHARACTERISTICS (TA = +250 C unless otherwise noted) (See Figure 2)
Character ist ic
Min
Typ
Max
MFC8020A
MFC8021A
MFC8022A
-
10
7.0
12
30
30
30
Sensitivity (PO = 1.0 Watt, f = 1.0 kHz)
eo = 8.95 V(RMS), RL = 165 f!
eo = 3.2 V(RMS), RL = 65 f!
eo = 12.65 V(RMS), RL = 165 f!
MFC8020A
MFC8021A
MFC8022A
-
89
32
126
112
40
160
Total Harmonic Distortion (f = 1.0 kHz)
VCC = 30 V, eo = 8.95V(RMS), RL = 165 f!
MFC8020A
-
0.7
5.0
Vce = 14 V, eo = 3.2V(RMS),RL =65 f!
MFC8021A
-
1.0
5.0
VCC = 40 V, eo = 1"2.65 V(RMS), RL = 165f!
MFC8022A
-
1.5
5.0
MFC8020A
MFC8021A
MFC8022A
-
89
87
90
-
-
27
-
-
18
-
-
15
7.0
20
-
Drain Current (ein = 0)
VCC = 30 Vdc
VCC = 14 Vdc
VCC = 40 Vdc
Open~Loop
Unit
mA
mV
%
dB
Gain
Vec = 30 V, R L =165 f!
Vce=14V,RL= 65f!
VCC = 40 V, RL =165 f!
dB
Ripple Rejection
f = 60 Hz, Av '" 1 00, ein = 0, Power Supply
Ripple = 1.0 V(RMS)
I'V
Equivalent Input Noise
ein = 0, RS = 1.0 k n, BW = 100 Hz - 10 kHz
Vdc
Quiescent Output Voltage (ein = 0)
VCC = 30 V
VCC = 14 V
VCC = 40 V
MFC8020A
MFC8021A
MFC8022A
-
FIGURE 2 - TEST CIRCUIT
270 k
10l'F
---11--+----0--1
'in
t
l
-
270 k
=
or equiv
=
lOOk
1.0 k
10
8-680
MFC8020A, MFC8021A, MFC8022A (continued)
TYPICAL AUTO RADIO AUDIO APPLICATION and CHARACTERISTICS
(T A
= +2SoC unless otherwise noted.)
FIGURE 4 - TOTAL HARMONIC DISTORTION
versus OUTPUT POWER
FIGURE 3 - APPLICATION CIRCUIT FOR MFC8021A
10
81k
"
"
~,~F-r____-+__~~
68k
117
77
f = 1.0 kHz
~
100
8.0
II II
e
~
OUTPUT DEVICE hFE
IT ~FE=80
'H
e
t; 6.0
i---hFE =50
..,o
z
hFE
~ 4. 0
"'"'
~
-
2.0
e
I-
o
o
25
II I I
2.0
1.0
FIGURE 5 - TOTAL HARMONIC OISTORTION
versus FR EQUENCY
~
./ [II
'J
3.0
4.0
5.0
OUTPUT POWER (WATTS)
6.0
7.0
8.0
FIGURE 6 - FREQUENCY RESPONSE
5.0
+5.0
+4.0
iii 4.0
Z
+3.0
e
~
e
In
3.0
~ +1.0
Po = 1 WATT
hFE = 50
..,0
~
Z
e
I-
~
2.0
;i
S?
'"
-'
«
I-
1-:-~ I--
~ -1.0
1.0
-11---.---0-1
Vin"'O
75k
-=
1.0",.F
Total Harmonic Distortion
(Yo = 1.0 V, f = 1.0 kHzl
THO
I nput Impedance
Zin
75
kohm.
Output Impedance
Zout
100
ohms
Open Loop Voltage Gain
(Vin = 100I'V(,ms) @f= 1.0 kHz)
AVOL
>--1
Zin_
75 k
-=
Wideband Input Noi.e
(-3.0 dB Bandwidth,10Hzto
16 kHz,AV=60dB@1.0kHz,
620
75k
8-686
dB
80
1.0
3.0
I'V
(,m.)
MFC8040 (continued)
FIGURE 2 - CIRCUIT SCHEMATIC
FIGURE 3 - INPUT NOISE
FIGURE 4 - OPEN LOOP TOTAL HARMONIC DISTORTION
0
5.0
-O~EN LOolp
f--AV
~
L
RV 22 k ohms
4.0
J
5
= 60 dB
1/
3.0
LL
.0
/
0
Vl-""'
./
.5
1.0
a
0.1
/
,-/
V
0
0.3
0.5
1.0
3.0
5.0
30
50
100
2.0
RS, SOURCE RESISTANCE (k ohmsi
4.0
FIGURE 5 - AVAILABLE OUTPUT VOLTAGE
10
i
~
r-8.0
)=
310JdC
f=
1.0 kHz
-
'"
V
6.0
V
t-
it
t:::>
0
'"
:'5
«
>
4.0
1/
~
~
2.0
9lk
i
~~o~
:J11120V,:MSI60H,
r-~'"
9"
SW I '
: 2
Vs
I
100 360
pF
.i.
7
MFC8070
VTHP
l'Opk
~
8>
3
8
Vref
8'
VSIO
Output Leakage Current
ISw 1: A orBI
IOL
I nput Current 1
ISw 1: AI
11
I nput Current 2
ISw 1: BI
12
I nhibit Threshold Voltage
ISw 1: A or BI
VTHI
Vs with Pulse Output
ISw 1: A orBI
VSPO
Peak Output Current
ISw 1: A or BI
IOpk
Pulse Threshold Voltage
ISw 1: A or BI
Output Pulse Width
ISw 1: A or B, See Figure 21
9 lk
Output Current With Input Short
~1O'
ZW
120 VI:MSI 60 Hz
ISw 1: B;Sw 2: AI
ISw 1: A; Sw 2: BI
:JII
rp
L ~.
SWI
7
I'sc
~
8'
BSWZI MFC8070
Vs
T~1~~
B
360
..:
2
3
B
Symbol
Vs with Inhibit Output
ISw 1: A or BI
Vref
8k
9.1k
8-689
Min
Typ
Max
-
9.0
11
-
5.0
100
-
5.0
15
-
5.0
15
Vdc
I'A
IJ.A
IJ.A
Vref
Vref
+100rnV +10rnV
-
Vdc
Vdc
6.0
8.5
-
50
80
-
VTHP
Vref
-10rnV
Vref
-100rnV
TA, TB
VTA,
VTB
70
±4.5
-
ISC
Unit
rnA
Vdc
I'S
V
I'A
-
5.0
100
-
5.0
100
MFC 8070 (continued)
TEST CIRCUIT AND TYPICAL CHARACTERISTICS
FIGURE 4 - OUTPUT PULSE WIDTH
versus SOURCE RESISTANCE
FIGURE 3 - CIRCUIT WITH INCREASED PULSE
WIDTH AND TRIAC DRIVER TO CONTROL
HIGH·CURRENT SCR's
(See Figure 6.)
500
RI
10 k
Ik
lN4001
~
or equlv
400
I
e--
100
0.1 "f
400 V
"f
5 Vde
equlv
"~
w
~
~
30 o -
r--
TA=+25 DC
=>
~
~
/
20 0
!;
0
",.
i
100
...= F= I-
-
I-- l-
I---"'
/'
-
0
LOAD
(UP TO 50 AI
4.0
6.0
20
10
30
40
60
100
RS, PROGRAM RESISTOR (KI LOHMSI
TYPICAL ZERO VOLTAGE SWITCH APPLICATIONS FOR TRIAC CONTROL
FIGURE 5 - TRIAC CONTROL CIRCUIT
RI
100 jJF +
120 V(RMSI ",",15 Velc
60 Hz
FIGURE 6 - TRIAC CONTROL CIRCUIT
WITH CURRENT BOOST UTILIZING
DC SUPPLY
Rref
3
+---+-0-.1
R2
RI
BV
01
DC
SUPPL Y
Rref
I
AC
LINE
R2
LOAD
j
R 101 R2 is an external senSOI
Basic triac trigger circuit lItiiizillq tile lero crossing detector
and the input comparator to control triacs with gate current
requirements to 500 mA
Rl or R21san external sensor
Basic de trigger applicatlull
to conlrol a PNP capable of
RS
approximately 0.5 A.
Suggested CirCLIlt to vary output pulse width by value
of RS (See Figure 4)
R2 Illust be the external semor for the internal short and open protection to be operative.
FIGURE 7 - TRIAC CONTROL CIRCUIT WITH CURRENT BOOST UTILIZING AC SUPPLY
Recommended Motorola triacs for use in circuit
5 ki4W for 120 Vac
(10 k!8W for 230 Vac)
requirements to 100 mA.
8-690
Maximum Continuous
Current (A [RMSJ )
Triac
Family
10
2N6151/2N6153
2N 6346Ai2N6349A
Case
No.
90 (Plastic)
221-024 (Plastic)
10
2N6139/2N6144
86,250
25
2N6157/2N6165
174, 175,
235
40
2N5441/2N5446
237,238,
239
M Fe 8070( continued)
PIN COMPARISON OF MFC8070 AND GEl300Fl (PA424/CA3059)
VEE
•
Input
Output
R
B+
R
VEE
Input
Output
Input
Reference
B+
A eference
Collector
Ground
Ground
Collector
MFC8Q70
G E L3QOF lICA3059
COMPATIBLE PRINTED CIRCUIT FOil PATTERN
FOR MFC8070. GEl300Fl (PA424) AND CA3059
,.
/i)2
s(d
•
3
7~4
5~6~5
.6
'3,~
12 •
o
Motorola Pin
Number MFC807Q
o
~'
9
• G EL300F 1/CA3059 PIn Number
'
.~oa
4 FOI' patterns shown are Intended to show pon-for p;n
interconnection
7
8 •
IS
Any change," the number of components
dictated by the requirements of the individual design
The MF Ca070 requires two external reference reSistors,
one resistor between pin 3 and pin 5 and the other between
pin 3 and pin 8.
8-691
,-------f
~~__________O_P_E_R_A_T_IO_N_A_L_A__M_P_L_IF_IE_R_S~
MLMIOIA
MLM20lA
MLM30lA
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
MONOLITHIC SILICON
INTEGRATED CIRCUIT
A general purpose operational amplifier that allows the user to
choose the compensation capacitor best suited to his needs. With
proper compensation summing amplifier slew rates to 10 VII's can
be obtained.
•
Low I nput Offset Current - 20 nA maximum Over Temperature
Range
•
External Frequency Compensation for Flexibility
•
Class AB Output Provides Excellent Linearity
•
Output Short·Circuit Protection
•
Guaranteed Drift Characteristics
P1 SUFFIX
PLASTIC PACKAGE
CASE 626
(MLM201A and
MLM301A only)
0,
1
4
(top view)
FIGURE 1 - STANDARD COMPENSATING
AND OFFSET BALANCING CIRCUIT
P
~11~li~
INVERTING
INPUT
OUTPUT
NON·INVERTING
'.
INPUT
10Mn
30pF
G SUFFIX
METAL PACKAGE
CASE 601
5.1Mn
t----'VIIV-_VEE
8
20k
(bottom view)
FIGURE 2 - DOUBLE·ENDED LIMIT
DETECTOR
FIGURE 3 - CIRCUIT SCHEMATIC
BALANCE
VUT
1
8
COMPENSATION
e---o---i
>--o-_Vo
OUTPUT
>--<>-_Vo
Vo =4.8 V for
VLT 0;;; Vin';;;; VUl
Vo -= -0.4 V
Vin < VLT Dr Vin> VUl
PIN!; NOT
~HOWN
ARE NOT
CON~ECTED
L - - - - -_ _ _I
, - - - I_ B A L A6 _
, ' "_
Sea Packaging Information Section for outline dimensions.
8-692
_
MLM101A, MLM201A, MLM301A (continued)
MAXIMUM RATINGS ITA = +25°C unless otherwise noted.!
...
~---------------...
IMLM201AI
301A!
500 ----------------~.
6.8 ----------------.......625
ELECTRICAL CHARACTERISTICS ITA = +25 0 C unle.. otherwise noted.! Unless otherwise specified. these specifications apply for
supply voltages from ±.5.0 V to ±20 V for the MLM101A and MLM201A. and from ±.5.0 V to
±15 V for the MLM301A.
8-693
MLM101A, MLM201A, MLM301A (continued)
TYPICAL CHARACTERISTICS
tVce
= +15 V, VEE =-15 V, TA = +25 0 C unle.. otherwise noted.)
FIGURE 5 - MINIMUM OUTPUT VOLTAGE SWING
FIGURE 4 - MINIMUM INPUT VOLTAGE RANGE
~
g
16r--AF'1'LlCAEILETO'rIlE SPI~CI
.!!.
'"z
!...
'"~
g
12~-~-~~-+---+--~-'~
8.0
~
~-~-~~~~~~--~-
S 4.ol---I----II"""=-+---'H--+----'
~
Vcc.nd (-VEE), SUPflLY VOLTAGE (VOLTS)
Vce AND (-VEE), SUPPLY VOLTAGES (VOLTS)
FIGURE 7 - TYPICAL SUPPLY CURRENTS
FIGURE 6 - MINIMUM VOLTAGE GAIN
l00r---,---,----,---,---,----
1 2.0 f---f---f---I----I---+---j
~
i. 1.5t=1=j:=t;;l===t:J
>-
itiil
1.01---1----1--+---+--1--...,
W
~ 0.5
20
Vec AND (-VEE) SUPPLY VOLTAGE (VOLTS)
Vcc AND -VEE, SUPflLY VOLTAGES (VOLTS)
FIGURE 9 - LARGE·SIGNAL FREQUENCY RESPONSE
FIGURE B - OPEN·LOOP FREQUENCY RESPONSE
+lBO
SINGLE·POLE COMPENSATION
+180
~+140
315
""
C
...
"'+100
I"-...
~+80
~. 3.0,_
c~~
30.....
.i+40
f---
-20
100
S
V
135'"
90
...........
~
10
225 fB
o
180 ;:0-
PHAS~
1"-... f'.... . /
GAIN ~
+20
1.0
<;;
270~
z+l2Q
'";!:+80
~
!J
1.0k
10k
lOOk
f. FREQUENCY (Hz)
"
'"
1.0M
45
p
"'...~
!
SINGLE·PO
~
to
'\
i
... tiD
to
1\
;
g
~
Cl = 30 pi\
~
""
o
o
1.0 k
\
\
±S.O
::>
10M
~~I~OMP~NSATION
.15
11111
10k
Cl=3.0pF
~
r-..
r100 k
f. FREQUENCY (Hz)
8-694
t-.....
l.oM
10M
MLM101A, MLM201A,MLM301A (continued)
TYPICAL CHARACTERISTICS (continuedl
(VCC
= +15 V. VEE = -15 V. T A = +25"C unless otherwise noted.l
FIGURE 11 - OPEN-LOOP FREQUENCY RESPONSE
FIGURE 10 - VOLTAGE FOLLOWER PULSE RESPONSE
+1 0
+140
SINGLE·POLE COMPENSATION
FEEDFORWARD COMPENSATION
~ +8. 0
+120
o +6.0
>
t--
;- +4.0
r- r-
1\
\
z
~ +2.0
w
~ -2.0
!V
--
~ ~4, 0
-6.0
L
z
OUTPUT
V
I
I\.
~
~
"I
INPUT
'\.
.-
r--
~ +100
«
+80
'"~
+60
'"
w
f--
c(
..........
.........
.....
,
PHASE~
" b.....- ~i7
0
,.
> +40
"'-
c(
+20
GA,iN,
.....
-8.0
-10
"
10
20
30
40
t. TIME (PO)
50
60
FIGURE 12 - LARGE-SIGNAL FREQUENCY
.,8
70
80
90
FEEOFORWARO COMPENSATION
~
c5
....
~
::>
>
o
~
:tR.D
+B.O
o
~ +6.0 _
~ +4.0
iE
:
'\
~
\.
g
....
~
5
.......
.4.0
10M
100M
FEEOFORWARD COMPENSATION
~
\
w
10k
lOOk
1.0M
I. FREOUENCY (Hz)
FIGURE 13 - INVERTER PULSE RESPONSE
.li
"2
1.0k
+10
~ "6
~
100
10
RESPONS~
~
'"
-20
.- -+;- ( -
-
OUTPUT
INPiIT
+2.0
·2.0
~4.0
o -6.0
,-
-
,-
.,;
> -8.0
..........
o
lOOk
-10
1.0M
10M
1.0
2.0
I. FREDUENCY (Hz)
3.0
4.0
5.0
B.O
7.0
8.0
t,TIMEI/AI)
TYPICAL COMPENSATION CIRCUITS
FIGURE 15 - FEEDFORWARD COMPENSATION
FIGURE 14 - SINGLE-POLE COMPENSATION
C2
RZ
R2
RI
RI
>--O-........ VO
R3
+Vin e----JoJVV---o-l
>--O-........ VO
FRED
COMPEN
CI
R3
150 pF
C
RI C,
I;. RI + R2
C. = 30pF
PINS NOT SHOWN ARE NOT CONNECTED.
C2' _,_
21rfoR2
10 =3.0 MHz
PINS NOT SHOWN ARE NOT CONNECTED.
8-695
9.0
~f
MLMI04G
MLM204G
MLM304G
\
______N_E_G_A_T_I_V_E_V_O_L_T_A_G_E_R_E_G_U_L_A_T_O_R---oI
MONOLITHIC NEGATIVE VOLTAGE REGULATOR
The MLM104G. MLM204G. and MLM304G are functionally.
electrically. and pin-for-pin equivalent to the LM104. LM204 and
LM304 respecitvely.
•
Regulation No Load to Full Load - 1.0 mV
•
Line Regulation - 0.01 %IV
NEGATIVE VOLTAGE
REGULATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
•
Ripple Rejection - 0.2 mVIV
•
Temperature Stability Over Temperature Range - 0.3%
CIRCUIT SCHEMATIC
9
r--..-------1"--....,------....,--r·GROUND
NO
CONNECTION
GROuNO
~~~~~~TEO
REFERENCE '
•
REF~~~~~~
, BOOSTER
,
COMPENSATION
CURRENT LIMIT
UNREGULATED
INPUT
TOP
VIEW
Pin 5 Electrically
Connected to Case
2
REFERENCE
REFERENCE
SUPPLY
4
Through Substrate
COMPENSATION
METAL PACKAGE
CASE 603
(TO-1001
TYPICAL APPLICATIONS
FIGURE 1 - BASIC REGULATOR CIRCUIT
FIGURE 2 - SEPARATE BIAS
SUPPLY OPERATION
.------1P-:--f-----f_ GND
FIGURE 3 - HIGH CURRENT REGULATOR
r----1~-~----~--eGND
4.'1J.1Ft
Vo =-10V
lo<2A
L.....----6--.....- - . V i n
RSC
tSolidTantalum
0.2
tSolid Tantalum
Trim R1 for exact
tSolid Tantalum
scale factor.
See Packaging Information Section for outline dimensions.
8-696
Vin<-12V
MLM104G, MLM204G, MLM304G (continued)
MAXIMUM RATINGS
(T A = +2So C unless otherwise noted)
ELECTRICAL CHARACTERISTICS (See Note 2)
Characteristic
Symbol
Mal<
Unit
Input Voltage Range
Vin
-40
Volts
Output Voltage Range
Vo
-30
Volts
Output-Input Voltage Differential
10=20mA
10= S.OmA
IVin-Vol
Load Regulation
0";;;1 0 ";;;20 rnA, RSC = 15.0.
Regload
Line Regulation
Volts
mV
5.0
0.056
0.1
%
mVIV
RejR
Output Voltage Scale Factor
Rl = 2.4 k.o. (See Figures 1,2 and 3)
SF
Temperature Stability
Vo";;; -1.0V
Vo";;; -1.0 V, OoC";;; TA";;; +700 C
TCV o
Output Noise Voltage (See Figure 1)
1.0
Ragin
V o ";;;-S.OV,"'Vin=O.1 V
Ripple Rejection (See Figure 1)
(Cl = lO"F, f = 120 Hz)
Vin< -ISV
-7.0 V;;. Vin;;' -ISV
40
40
2.0
O_S
0.5
1.0
2.0
2.2
V/k .0.
1.8
l'No/"'T
0.2
0.5
%
0.3
1.0
Vn
(10 Hz";;; f";;; 10 kHz)
V o ";;;-5.0V,Cl=0
Cl = 10"F
%
0.007
15
Standby Current Drain (I L = 5.0 rnA)
Vo =0
V o = -40 V
Vo=-30V
IS
Long Term Stability
Vo";;; -1.0V
S
"V
rnA
1.7
2.5
3.6
5.0
0.1
1.0
%
Note 1.
The maximum junction temperature of the MLM104G is +150o C, for the MLM204G - +l00 o C. and for the MLM304G - +8SoC.
For operating at elevated temperatures, the package must be derated based on a thermal resistance of 150o C!W - junction to ambient,
or 45 0 C/W - j unction to case,
Note 2.
These specifications apply for junction temperatures of -5SoC to +150 o C 'for the MLM104G; -2SoC to +100 o C for the MLM204G;
and 0 to +8SoC for the MLM304G. The specifications also apply for input and output voltages within the indicated ranges (unless
otherwise specified). Load and line regulation specifications given are for constant junction temperature. Temperature drift effects
must be taken into account separately when the device is operating under conditions of high power dissipation.
8-697
...
L...--J
MLMIOSG
MLM20SG
MLM30SG
\
_____P_O_S_IT_I_V_E_V_O_L_T_A_G_E_R_EG_U_LA_T_O_R---II
MONOLITHIC POSITIVE VOLTAGE REGULATOR
The MLM1OSG, MLM205G, and MLM305G are functionally,
electrically, andpin-for-pin equivalent to the LM105, LM205, and
LM305 respectively_
• Output Voltage Adjustable from 4_5 V to 40 V
• Output Currents in Excess of 10 A Possible by Addition of
External Transistors
• Load Regulation Better than 0_1%, Full Load with Current
Limiting
• DC Line Regulation, 0_03%/V
• Ripple Rejection, 0.01 %/V
POSITIVE VOLTAGE REGULATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
REGULATED OUTPUT
8
7
BOOSTER OUTPUT 2
COMPENSATION
SHUTDOWN
6 FEEOBACf(
GROUND
NOle: Pin4 connected 10 cue
nOPVIEW/
METAL PACKAGE
CASe 601
ITO-991
TYPICAL APPLICATIONS
FIGURE 1 - BASIC REGULATOR CIRCUIT
FIGURE 3 - 1.0 A REGULATOR with PROTECTIVE OIODES
IN4DOIOREDUIVt
r-~I---""'---1----"""-""""""r--"Vo=ZBV
0.2
31'
,%
2N3D55 OR EOUIV
IN400tOR EOUlvt
FIGURE 2 - 10 A REGULATOR with FOLDBACK CURRENT LIMITING
.----.....- ....- - -......'""'\1\0-.....- - - -.....- ......-<1'10 .. 5.0'1
2.13~
,%
+-......I---......J
Vin ...
tProttclSagiliinst shorted inpul or
inductiv,lOldson unnlguleted
-"
-Pr01lCllapinstinputvoltage
""""
tPrllteclsagainnoutpulvOll1gll
rlwer.'
-::
tSolKITant,lum
eElaclrolvtic
See Packaging Information Section for outline dimensions.
8-698
MLM105G, MLM205G, MLM305G
(continued)
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted 1
ELECTRICAL CHARACTERISTICS ISee Note 21
Characteristic
Vin'V o ';; 5.0 V
Vin'V o
5.0 V
>
1.0
0.02
0.03
0.03
0.05
0.1
0.1
0.025
0.Q15
0.06
0.03
0.003
0.Q1
Temperature Stability
Tlow·* ~ TA ~ Thigh*
Output Noise Voltage (See Figure 1)
110 Hz';; I';; 10 kHzl
CRel
C
=0
> O.II1F
Standby Current Drain
Vin = 50V
Vin = 40 V
'Thigh = +125 0 C lor MLM105G
+85 0 C lor M LM 205G
+700 C lor MLM305G
"Tlow
= -55 0 C lor MLM105G
-25 0 C lor MLM205G
OOC lor MLM305G
Note 1. The maximum junction temperature 01 the MLM105G is +1500 C, lor the MLM205G - +100 0 C, and lor the MLM305G - +85 0 C.
For operating at elevated temperatures, the package must be derated based on a thermal resistance of 1500 C/W - junction to ambient,
or 45 0 C/W - junction to case.
Note 2.
These specifications apply for junction temperatures of - 550 C to +150 0 C for the MLM105G, -25 0 C to +85 0 C for the MLM205G,
and 0 to +70o C for the MLM305G. Specifications also apply for input and output voltages within the indicated ranges and for a divider
impedance sensed by the feedback terminal of 2.0 kilohms (unless otherwise specified), Load and line regulation specifications given are
for constant junction temperature. Temperature drift effects must be taken into account separately when the device is operating under
conditions of high power dissipation.
8-699
MLMI07G ~~________O_P_E_R_A_T_IO__N_A_L_A_M_P_L_IF_I_E_R_S~
MLM207G
MLM307G
INTERNALLY COMPENSATED
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
INTEGRATED CIRCUIT
A general purpose operational amplifier series well suited for
applications requiring lower input currents than are available with
the popular MC1741. These improved input characteristics permit
greater accuracy in sample and hold circuits and long interval
integrators.
•
•
Internally Compensated
Low Offset Voltage: 2.0 mV max (MLM107G)
•
Low Input Offset Current: lOnA max (MLM107G)
•
Low Input Bias Current: 75 nA max (MLM 107G)
EPITAXIAL PASSIVATED
METAL PACKAGE
CASE 601
TYPICAL APPLICATION
HIGH IMPEDANCE BRIDGE AMPLIFIER
EOUIVALENT CIRCUIT
CIRCUIT SCHEMATIC
7
Vee
INVERTING
OUTPUT
Vm
Rin
NON:
INVERTING
VEE
See Packaging Information Section for outline dimensions.
8-700
4
AVinr'---7-0
MLM107G, MLM207G, MLM307G (continued)
MAXIMUM RATINGS (T A = +2SoC unless otherwise noted.)
Characteristics
Input Offset Voltage
RSS;10kll,TA
RS ,.,0 k!!, TA
RSS; SO k!!, T A
RS S; SO kll, T A
=+2SoC
= Tlow to Thigh
= +25 0 C
2.0
7.5
10
3.0
50
70
1.8
3.0
= Tlow to Thigh
Input Offset Current
TA = +2SoC
T A = Tlow to Thigh
Input Bias Current
TA = +25 0 C
V/mV
25
15
160
Teme,enlture c,oem'"e'" of Input Offset Voltage
Average Temperature Coefficient of Input
6.0
30
0.01
0.02
0.3
0.6
Current
+250 C:5' TA 5 Thigh
Tlow';:'TA~+2SoC
Va
Output Voltage Swing (T A = Tlow to Thigh)
VS=±.IS V, RL = 10k!!
= 2.0 kH
V
+14
±.13
V
I nput Voltage Range (T A = Tlow to Thigh)
Vs = ±.20 V
= ±.15 V
dB
CMRR
VSRR
Suppllv-'volltllllO Rejection Ratio (T A = Tlow to Thigh)
dB
96
Note 1. For supply voltages less than .±.tS V, the absolute maximum input voltage is equal to the supply voltage.
Note 3. Unless otherwise noted. these specifications apply for:
Note 2. For operating at elevated temperatures. the device must
be derated based on a maximum junction temperature of
+t500C forthe MLM107G,and 100o Cfor the MLM207G
Tlow
Thigh
±5.0 VS; Vs ~±20 V, -55 0 e S;T AS; +125 0 e, MLM107G
and MLM307G. The TO-99 package is derated based on
a thermal resistance of + 150o C/W. junction to ambient,
or +4SoC/W, junction to caSB.
8-701
±5.0 V 5 Vs ~±20 V, -25 0 e ~TA S; +85 0 e, MLM207G
±5.0 VS; Vs ,,;'±15 V, OOeS;TA S;. +70o e, MLM307G
MLM107G, MLM207G, MLM307G
(continued)
TYPICAL CHARACTERISTICS
(Vee = +15 V, VEE = -15 V, TA = +25 0 C unless otherwise noted.)
FIGURE 1 - MINIMUM INPUT VOL TAGE RANGE
FIGURE 2 - MINIMUM OUTPUT VOLTAGE SWING
~c
~c
2:
>
'"
~ 12~---+----r_--;_--_+--~T---7
w
'"z
~
5!
w
'"~
B.O
~ 12~---+----r_--;_--_+----+-~~
w
~ B.O 1-----+-
1----+---:-I-:---7''''--t~'''-f----
I-
I-
ie
z
ie
l-
§: 4.0 f----t-----I""''--+----+----t----
;;, 4.0 f----t-----1f--_,,;"f----+----r_---,
c
6
;;
>
°0L--~-~5.LO--L---l~0--~--~15
°0~---L--~5.LO--~----1~0----L---~15
Vcc AND (-VEE), SUPPLY VOLTAGE (VOLTS)
Vcc AND (-VEE), SUPPLY VOLTAGES (VOLTS)
FIGURE 3 - MINIMUM VOLTAGE GAIN
FIGURE 4 - TYPICAL SUPPLY CURRENTS
2.5
:;:
.s
~
~
'"G
::;
z
«
'"w
'"~"
2.0
1.5
!l:
~ 1.0
c
>
W
.t
c
z
"uu
5.0
10
0
20
15
0.5
0
VCC AND (-VEE), SUPPLY VOLTAGES (VOLTS)
5.0
10
15
20
Vcc AND (-VEE), SUPPLY VOLTAGES (VOLTS)
FIGURE 5 - OPEN· LOOP FREQUENCY RESPONSE
FIGURE 6 - LARGE.sIGNAL FREQUENCY RESPONSE
+lBO
+160
~ 15
+140
c
>
tJ
~+120
z
«+100
'"~
+80
"~
tilO
J
+4 0
>
-
'"z
~
w
..........
c
..........
'" ""-
0
10
100
10
'"~
..........
+20
-2 0
1.0
r--r-
1.0k
10k
lOOk
>
~ 5.0
!;
o
.j>
i'.
1.0M
10M
100M
f, FREQUENCY (Hz)
o
1.0 k
\
10 k
"
100 k
f, FREQUENCY (Hz)
8-702
1.0M
10M
TYPICAL CHARACTERISTICS (continued)
FIGURE 7 - VOL TAGE FOLLOWER PULSE RESPONSE
10
~+S.O
5 +6.0
2!
~
+4.0
r--
\
~ +2.0
w
'"~
-S.O
-10
~
10
20
30
40
t, TIME
8-703
50
lit.)
60
70
SO
90
MLMI09 ~~____________V_O_L_T_A_G_E__R_E_G~U_L_A_T_O_R~
MLM209
MLM309
POSITIVE
VOLTAGE REGULATOR
MONOLITHIC POSITIVE THREE - TERMINAL
FIXED VOLTAGE REGULATOR
MONOLITHIC SILICON
INTEGRATED CIRCUIT
A versatile positive fixed +5.0-volt regulator designed for easy
application as on on-card, local voltage regulator for digital logic
systems. Current limiting and thermal shutdown are provided to
make the units extremely rugged.
In most applications only one external component, a·capacitor,
is required in conjunction with the MLM109 Series devices. Even
this component may be omitted if the power-supply filter is not located an appreciable distance from the regulator.
• High Maximum Output Current - Over 1.0 Ampere in TO-3 type
Package - Over 200 mA in TO-39 Package
• Minimum External Components Required
• Internal Short-Circuit Protection
KSUFFIX
METAL PACKAGE
• Internal Thermal Overload Protection
CASE 11
{TO-3 Typel
• Excellent Line and Load Transient Rejection
• Designed for Use with Popular MDTL and MTTL Logic
u
(81 OUTPUT
2
INPUT
(EI 1
CIRCUIT SCHEMATIC
I
r--~--~t----"""1r----~-""'-O
0
0
3 GND
(el
(BOTTOM VIEWI
INPUT
G SUFFIX
METAL PACKAGE
CASE 79
{TO-391
0.3
FIXED 5.0 V REGULATOR
INPUT
----=
50
75
100
TAo AMBIENT TEMPERATURE 1°C)
125
25
150
8-705
50
75
100
TA. AMBIENT TEMPERATURE 10C)
125
\
150
MLM109, MLM209, MLM309(continued)
TVPICAL CHARACTERISTICS (continued I
(Vin = 10 V. T A = +2S0C unless otherwise noted.)
FIGURE 3 - MAXIMUM AVERAGE POWER DISSIPATION
(MLM309K)
FIGURE 4 - MAXIMUM AVERAGE POWER DISSIPATION
(MLM309G)
100
10
50
~
~
INFINITE
HEAT SINK
......
z
0
10
::>=
0
10-
'"~
I--
Ie 1.0 I
,p
i;?gl~RAT
0
WAKE FIELD
:
HEAT SINK
680·75 OR EQUIV
-
5.0
iii
.....
>=
::
iii
'"~
Ie
f--NOHEATf - - SINK
~
0.5
15
50
25
150
75
100
115
TA, AMBIENT TEMPERATURE (DC)
4.0
$
~ 10-0
..~
IL 10 mA:::;;
z
./
:!§
....
~
50
~
~
10- 1
/
30
"
f'.:
'\..1
75
100
TA, AMBIENT TEMPERATURE (DC)
52
o
........
....
~
o
125
150
............
--
~
-....;;,;.,
-... ..::::::::---
=>
=>
r-...........
..... ~ :---.
=>
. / IL=500mA
......
7
.... 2.0
./
v- -... ..... ......
'/
.
'"
'"
=>
u
./
./
f--
I--
FIGURE 6 - PEAK OUTPUT CURRENT (K PACKAGE)
FIGURE 5 . OUTPUT IMPEDANCE versus FREQUENCY
10+ I
Ci
-
.......
I
0.1
0.1
INFINITE ,HEAT SINK -
~
0 1.0
'-
WAKE FIELD
HEAT SINK
680·75 OR EQUIV
-
z
1.0
"" ~
TA=-5r C TA' +25 0C
TA' +125 0C
TA '+rooc-
VD • 4.5 V
o
111.1
10
100
lOOk
1.0k
10k
t, FREQUENCY (Hz)
5.0
1.0M
100
/
3.0
........
(
r----
!Z
w
'"'"
~
=> 1.0
I
u
~
....
=>
o
52
r--
r--
r-- I--r--
~
1.0
.......
........
If
VO'4.5V
5.0
10
15
10
~
:: ~
BO
ri\
~
1./: ......
~
~
z
~
~
~
~
40
45
FIGURE 8 - RIPPLE REJECTION
FIGURE 7 - PEAK OUTPUT CURRENT (G PACKAGE)
_
~
Vin, INPUT VOLTAGE (V)
4.0
~
W
ffi
10
--
r.:::: ~
30
25
Vin, INPUT VOLTAGE (V)
t;
w 60
TA = -5~OC
Ul
'"
II:
TA = +1~50C
TA=+150 OC -
35
'"
I
40
~t-..
T1 '+1500C"""
~
TA=+15 0C
TA'~250C
TA'+1250?~ l'" ~
0
.......
-
N
TA .1_550C
40 I---
f-
IL'200mA
aVij' 3.0 ~p,p
~~
~
"\
20
10
45
100
1.0k
10 k
t, FREQUENCY (Hz)
8-706
100 k
1.0 M
MLM109, MLM209, MLM309(continued)
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - OROPOUT CHARACTERISTIC
(K PACKAGE)
FIGURE 9 - DROPOUT VOL TAGE
6.0
;;;
IL
:; 2.0
~
;::
'"
w
co
~
~
f" TA =-55OC-
'"
:;
1.5
§;
;:;
....
~
....
:::>
<;>
....
1.0
L
5.0
....
....~:::>
I
4.0
-75
=
+25 0 C
rli
J~ rL
-50
-25
+25
+50
+75
+100
+125
Y/I
6.0
5.0
+150 +175
TJ, JUNCTION TEMPERATURE 10C)
FIGURE 11- OUTPUT VOLTAGE
7.0
V,n, INPUT VOLTAGE IV)
9.0
8.0
FIGURE 12 - OUTPUT NOISE VOL TAGE
10
5.2
~ 5.1
~
w
r--..... ,....
~
'"
'"
:;
CL
=
0
w
co
~ 0.1
5.0
~
w
on
o
~
I
TA ~ 1500C_/.
~ 4.5 - T A ~ '125°C
~
o
- . - TA
I/O
o
~ 0.5
....>
~
....
:::>
= 1.0 A
5.5
is
z
4.9
-1'
0.01
-50
-25
'25
'50
'75 '100 '125
lJ. JUNCTION TEMPERATU RE 1°C)
10
'150.,75
100
FIGURE 13 - QUIESCENT CURRENT
6.5
IL
~
200mA
.5 6.0
....
~
'":::>'-'
....
~
~
«
.5 6.0
I
....
~
'"i3
....
TA ;25 0C
5.5
~
3
'"IE
FIGURE 14 - QUIESCENT CURRENT
6.5
I
<
5.0
~
TA
~
~
'--
5.5
~
-55°C
i3
TA 1125 0C
,.-
4.5
5.0
~
10 k
1.0 k
I, FREQUENCY 1Hz)
5.0
I
TA ~ ')150 OC
4.5
10
15
Vin, INPUT VOLTAGE IV)
20
25
-75
8-707
-50
-25
0
'25
'50
'75 '100
TJ, JUNCTION TEMPERATURE (OC)
'125
+150 +175
MLM109, MLM209, MLM309(continued)
TYPICAL APPLICATIONS
FIGURE 16 - CURRENT REGULATOR
FIGURE 15 - ADJUSTABLE OUTPUT REGULATOR
I NPUT...-
H:>--....._OUTPUT
. .--.0-_. OUTPUT
R4_R5
FiZ-R3
Av=~
See Packaging Information Section for outline dimensions.
8-709
MLMll0G, MLM210G, MLM310G (continued)
MAXIMUM RATINGS (T A = +2SoC unless otherwise noted.)
Power SupplV Voltage
Lead Temperature
(soldering, t = 10 s)
ELECTRICAL CHARACTERISTICS
(See Note 4)
Characteristic
Input Offset Voltage
TA = +2SoC
TA=Tlow*to
Ratio
Note 1. For supply voltages less than ±. 15 volts, the absolute
maximum input voltage is equal to the slJpply voltage.
Nota 2. A continuous short-circuit duration capability is specified
for M LM 11 OG and M LM21 OG as follOWS:
case tempe,a-
tures upto +1250 Cand ambient temperatures up to +70o C;
for the MLM310G up to +70o C case temperature and
+5SoC ambient temperature apply. A resistor "(greater than
2.0 kilohms) must be inserted in series with the input when
the amplifier is driven from a low impedance source, thus
preventing damage when the output is shorted.
Note 3. The maximum junction temperature of the MLM110 is
+150o C. for the MLM210G - + 100°C, and for the
M LM31 OG - +85 0 c. For operating at elevated temperatures, the package must be derated based on a thermal
resistance of 1500 C/W - junction to ambient, or 45°C junction t'O case.
Note 4. All listed specifications apply for ±. 5.0 V ~ VS:S:; ±.18 V
and T A::::; +2So c unless otherwise noted.
Note 5. Increased output swing under load'can be obtained by
connecting an external resistor between the booster and
VEE terminals (pins 4 and 51.
8-710
L------f
~~___________V_O_L_T_A_G_E_C_O_M__PA__R_A_T_O_R_S~
MLM111
MLM211
MLM311
Product Preview
HIGH PERFORMANCE
VOLTAGE COMPARATORS
HIGHLY FLEXIBLE VOLTAGE COMPARATORS
The ability to operate from a single power supply of 5.0 to 30
volts Dr ± 15·volt split supplies, as commonly used with operational
amplifiers, makes the MLM111/MLM211/MLM311 a truly versatile
comparator. Moreover, the inputs of the device can be isolated from
system ground while the output can drive loads referenced either to
ground, the Vee Dr the VEE supply. This flexibility makes it
possible to drive MDTL, MRTL, MTTL, or MOSlogic. The output
can also switch voltages to 50 volts at currents to 50 mAo Thus the
MLM111/MLM211/MLM311 can be used to drive relays, lamps Dr
solenoids.
SUGGESTED COMPARATOR DESIGN CONFIGURATIONS
MONOLITHIC SILICON
INTEGRATED CIRCUIT
F SUFFIX
CERAMI C PACKAGE
CASE 606
TO-91
GND'Bwv
INPUTS
SPLIT POWER-SUPPLY with
OFFSET BALANCE
SINGLE SUPPLY
ee
2
+
9 OUTPUT
3
-
8
NC 4
NC
7 F>ALANCE/STROBE
VEe 5
6
BALANCE
(Top View)
G SUFFIX
OUTPUT
METAL PACKAGE
CASE 601
Vee
80, , ,OU",UT
GND~O
,
,o
.
INPUTS
BALANCE/STROBE
0
3
04
BALANCE
(Top View)
LOAD REFERRED to
NEGATIVE SUPPLY
GROUND·REFERRED LOAD
L SUFFIX
CERAMIC PACKAGE
CASE 632
TO-116
Ne'B T4Ne
GND2
13NC
3
+
INPUTS 4
-
12 NC
11 Vee
NC 5
Input polarity is reversed when
GND pin is used as an output.
I nput polarity is reversed when
GND pin is used as an output.
LOAD REFERRED to
POSITIVE SUPPLY
STROBE CAPABILITY
VEE
6
BALANCE
7
10 NC
9 OUTPUT
8 BALANCl;ISTROBE
(TOp viewl
Pl SUFFIX
PLASTIC PACKAGE
CASE 626
(MLM311 Only)
OUTPUT
MTTL
STROBE
GND' B8v
ee
2
+
7 OUTPUT
INPUTS 3
-
6 BALANCE/STROBE
VEE 4
5 BALANCE
(Top Vi.twl
See Packaging Information Section for outline dimensions.
8-711
MLMlll, MLM211, MLM311 (continued)
MAXIMUM RATINGS
(T
= +25 0 e unless otherwise noted.)
Rating
Power Dissipation (Pkg. Limitation)
6BO
4.6
500
3.3
625
5.0
Metal Package
Derate above T A = +25 0 e
Flat Package
Derate above T A = +25 0 e
Plastic* and Ceramic Dual In-Line Packages
Derate above T
= +25 0 C
mW
mW/oe
mW
mW/oe
mW
mW/oe
Operating Temperatures Range
MLMlll
MLM211
MLM311
*MLM311Pl only is available in the plastic dual in-line package.
ELECTRICAL CHARACTERISTICS
Characteristic
Input Offset Voltage ISee Note 2.)
Rs <:;;50 kn. T A = +250 e
RS <:;;50 kn. Tlow' <:;;T A <:;;T
'Tlow = -55 0 e for MLM111
= -25 0 e for MLM211
= 0 for MLM311
Note 1.
Note 2.
Thigh = +125 0 e for MLMlll
= +B50 e for MLM211
= +70o e for MLM311
This rating applies for ±15-volt supplies. The positive input voltage limit is 30 volts above the negative supply. The negative input
voltage limit is equal to the negative supply voltage or 30 volts below the positive supply, whichever is less.
The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply
with a 1.0-mA load. Thus, these parameters define an error band and take into account the "worst case" effects of voltage gain and
input impedance.
Note 3.
The response time specified is for a 100-mV input step with 5.0-mV overdrive.
8-712
MLM111, MLM211, MLM311(continued)
FIGURE 1 - CIRCUIT SCHEMATIC
r-----_,~-1~----_._,---;----------_,--------_.--------------t_----oVCC
1.3 k
800
BALANCE
800
BALANCE/04~~+-------.
STROBE
OUTPUT
600
4
L---------~~GND
~----------*-----~~--~--4---~~----*-----~~--------------oVEE
TYPICAL CHARACTERISTICS
FIGURE 2 - INPUT BIAS CURRENT and INPUT OFFSET
CURRENT versus TEMPERATURE
FIGURE 3 - COMMON-MODE LIMITS vorsus TEMPERATURE
10
8.01
~
6.0~
~
4.0~
....
~
"
2.0~
-60
-40
-20
+20
+40
+60
+80
T, TEMPERATURE lOCI
+100
+120 +140
+20
+40
+60
+80
T, TEMPERATURE lOCI
FIGURE 4 - OUTPUT SATURATION VOLTAGE versus
OUTPUT CURRENT
FIGURE 5 - EQUIVALENT OFFSET ERROR versus
INPUT RESISTANCE
1.0
100
'>
~
to
~
5
MLMll1
O. 8 - -MLM211
MlM311
«
TA=+250C
§; 0, 6
..........
"o
~
g;
/""
0.4
~
il 0.2
:>
./
o
o
V
C;
0
>
~
~
0
1/
....
V
;;;
~
«
>
'3
~
20
30
10, OUTPUT CURRENT ImAI
V
/'
0
VV'
V/
~
~
. /V
10
MLM311
MAXIMUM
- TA-+250C
=VIO' Via + RSIIO
w
to
40
50
8-713
MLM111,MLM211
MAXIMUM
f--'""
I III
MLM311
TYPICAL
1.0
10 k
IU V
MLM111,MLM211
/'
IlrlCll
lOOk
1.0M
Rin, INPUT RESISTANCE In)
10M
MLMlll, MLM211, MLM311(continued)
APPLICATIONS INFORMATION
FIGURE 6 - ZERO-CROSSING DETECTOR DRIVING
MOS LOGIC
FIGURE 7 - RELAY DRIVER WITH STROBE CAPABILITY
Vcc = 5.0 V
3k
HJ
INPUT
°01
OUTPUT
;>~-1~--. OUTPUT
TO MOS LOGIC
10 k
• Zener Diode 01
protects the comparator
VEE = -10 V
MTTL
STROBE
8-714
from inductive kickback
and voltage transients
on the V CC2 supply line.
'\
MMH0026
MMH0026C
MaS CLOCK DRIVER
"------------'
Specifications and Applications
InforIIlation
DUAL MOS
CLOCK DRIVER
DUAL MaS CLOCK DRIVER
· .. designed for high·speed driving of highly capacitive loads in a
MOS system.
•
Fast Transition Times - 20 ns with 1000 pF Load
•
High Output Swing - 20 Volts
•
High Output Current Drive - ± 1.5 Amperes
•
High Repetition Rate - 5.0 to 10 MHz Depending on Load
•
MTTL and MDTL Compatible Inputs
•
Low Power Consumption when in MOS "0" State - 2.0 mW
•
+5.0,Volt Operation for N·Channel MOS Compatibility
MONOLITHIC
SILICON INTEGRATED CIRCUIT
G SUFFIX
METAL PACKAGE
CASE 601
TO·99
Vee
FIGURE 1 - CIRCUIT SCHEMATIC
11/2 CIRCUIT SHOWN)
VCCo-.---------t-------~--~----~--_,
R7
R5
fi
(Top View)
PI SUFFIX
PLASTIC PACKAGE
CASE 626
IMMH0026C Only)
~'"'::B1~ :~TPUTA
Vee
3
6
Vee
INPUT B
4
5
OUTPUT B
(Top View)
TYPICAL OPERATION
L SUFFIX
= 10 n, CL = Cin = 1000pF, f = 1.0 MHz,
PW = 500 ns, VCC = 0 V, VEE = -20 V)
IRS
CERAMIC PACKAGE
CASE 632
TO·116
+5.0
v
~
OV
o
VCC
OV
NC
o
..J
o
>
OUTPUT A
OUTPUT B
NC
q
INPUT
NC
Ar=_n=n
-20 V
(Top View)
100 ns!OIV
See Packaging Information Section for outline dimensions.
8-715
INPUT B
MMH0026, MMH0026C (continued)
MAXIMUM RATINGS (TA 0 +2Soe unless otherwise noted. I
Symbol
Value
Unit
Vee VEE
+22
Vdc
Input Current
lin
Input Voltage
Vin
+100
VEE +0.0
VOc
Rating
Differential Supply Voltage
Peak Output Current
_
Opk
Power Dissipation and Thermal Characteristics
TA 0 +250 e
Thermal Resistance, Junction to Air
PD
8JA
PD
TC" 250 e
Thermal Resistance. Junction to Case
Junction Temperature
°JC
TJ
Operating Temperature Range
TA
.0
G Pkg.
L Pkg.
PI Pkg.
680
220
2.1
70
1000
150
3.0
50
830
150
1.8
70
+175
+175
+150
T stg
Storage Temperature Range
'"
rnW
°C/W
W
°C/W
uc
ve
-55 to +125 -55to +125
o to +85
o to +85
MMH0026
MMH0026e
mA
-
o to +85
-65 to +150 -65to +150 -65 to +150
ve
ELECTRICAL CHARACTERISTICS (Vec-VEE
= 10 V to 20 V, CL 0 1000 pF, TA 0 -55 to +1250 e for MMH0026 and 0 to +850 C
for MMH0026C for min and max values; T A '" +2SoC for all typical values unless otherwise noted.)
Symbol
Characteristic
Logic "1" Level I "put Voltage
Vo 0 VEE + 1.0 Vdc
Logic "'" Level I nput Current
Vin-VEE 0 2.5 Vdc, Vo 0 VEE + 1.0 Vdc
Logic "0" Level I "put Voltage
VO" Vec 01.0 Vdc
Logic "0" Level I "put Current
Vin-VEE 00 Vdc, Vo 0 Vec -1.0 Vdc
Unit
-
Vdc
IIH
10
15
rnA
VIL
VEE + 0.6
VEE +0.4
Vdc
IlL
-0.005
-10
jlA
4.0
VCC -1.0
4.3
VCC -0.7
-
-
-11.5
VEE + 0.5
-11
VEE+l.0
-
30
40
rnA
10
100
jlA
VOH
Logic "1" Level Output Voltage
VCC 0 +5.0 Vdc, VEE 0 -12 Vdc, Vin 0 -9.5 Vdc
Vin-VEE 0 2.5 Vdc
VOL
leCL
"Off" Supply Current
VCC-VEE 020 Vdc, Vin-VEE" 0 V
Typ
Max
Logic "0" Level Output Voltage
Vee" +5.0 Vdc, VEE ~ -12 Vdc, Vin 0 -11.6 Vdc
Vin-VEE 00.4 Vdc
"On" Supply Current
VCC-VEE 0 20 Vdc, Vin-VEE 0 2.5 Vdc
Min
VEE+l.5
VIH
VEE + 2.5
Vdc
Vdc
leCH
SWITCHING CHARACTERISTICS (See Figure 2.1 (Vce-VEE" 10 V to 20 V, Cl 0 1000 pF, TA 0 -55 to +125 0 C for MMH0026
and 0 to +8SoC for MMH0026C for min and max values· T A'" +2So C for all typical values unless otherwise noted.)
Propagation Time
High to Low
Low to High
tPHL
tpLH
Transition Time (High to Low)
Vec-VEE ~ 17 Vdc, el 0250 pF
VCC-VEE 0 17 Vdc, Cl 0 500 pF
Vec-VEE 0 20 Vdc, eL 0 1000 pF
tTHL
Transition Time (Low to High)
Vee-VEE 0 17 Vdc, CL 0 250 pF
VeC-VEE 0 17 Vdc, Cl 0 500 pF
VCC-VEE 0 20 Vdc,CL 0 1000pF
tTlH
5.0
5.0
7.5
12
12
15
-
12
15
20
-
n,
-
18
35
ns
-
-
8-716
n,
10
12
17
16
25
MMH0026, MMH0026C
(continued)
TEST CIRCUIT
FIGURE2 - AC TEST CIRCUIT AND WAVEFORMS
o Vdc
+5 Vdc
~
50
-Vin
10%
90%
tpHL
-
+5'OV
tPLH
- - _..... Vo
Vin = 5.0 Vdc
PRF = 1.0 MHz
PW = 0.5 j.ls
tTLH
= tTHL
E;10 ns
Pins not shown are not connected.
-20 V
TYPICAL APPLICATIONS
FIGURE 4 - DC.cOUPLED RAM MEMORY ADDRESS
OR PRECHARGE DRIVER (POSITlve-SUPPLY ONLY)
FIGURE 3 - AC.cOUPLED MOS CLOCK DRIVER
V in
VCC=+5V
Va
Vo
VCC
:oLf---4-Hin
Two-Phase
Clock to
Shift Registers
To Address
Lines On
1103 Tvpe
Memory System
~_ CL
Or Equiv
MTTL
MC7400
Series Gates
VEE = -12 V
Pins not shown are not connected.
Pins not shown are not connected.
8-717
MMH0026, MMH0026C
(continued)
TYPICAL CHARACTERISTICS
(VCC = + 20 V. VEE = 0 V. T A = +2SoC unless otherwise noted.)
FIGURE 6 - SUPPLY CURRENT versus TEMPERATURE
FIGURE S -INPUT CURRENT versus INPUT VOLTAGE
9.0
16
..
14
I-
z
·10
a
I-
8.0
12
.§.
w
a:
a:
...
6.0
-
4.0
:::>
~
DUTY CYC LE = 20%
1=1 MHz
CL = 0 pF
-
v
V
V
./
2.0
o
0.5
1.0
5.0
-75
2.5
2.0
1.5
FIGURE 7 - OPTIMUM INPUT CAPACITANCE
versus OUTPUT PULSE WIOTH
-50
-25
0
+25
+50
T. TEMPERATURE (DC)
28
600
/
:z: 500
e
l-
I-
300
~
~
I:::>
'"
i
100
o
~
,.;::
w
/'
..
-
400
600
800
1000
Cin. OPTIMUM INPUT CAPACITANCE (pF)
1200
>~
z
'"
~
to
tt
11
10
/
I"...
9.0
.,./'"
K
-50
-25
200
V
I
V
]
22
o
1000
800
w
'"z
;::
'" 18
;::
CL = 1000 pF
~~
.. ~:bin
z
-.....
i-trLH
400
600
CL. LOAD CAPACITANCE (pF)
a:
7.0
6.0
-75
---
V
l-
tPLH
:.--
FIGURE 10 - TRANSITION TIMES versus TEMPERATURE
26
/"""
tPHL
+125
I-- VCCiVEE = 2Jv
./
~ 8.0
If
VCC-VEE = 20 V
Cin = CL = 1000 pF
RO = 50!1
12
e
.....
o
o
1400
14
w
/"
t:'
FIGURE 9 - PROPAGATION OELAY TIMES
versus TEMPERATURE
'"
;::
/"
10
l-
V
'"
200
~ 13 I - - - r-
i-"'"
z
a:
/"
.....-
trHL
~
in
.....
o
- -
20
'"
;::
./
,/
+100
VCC-VEE = 20 V
RO = 50!1
z
./
/'
200
+75
I
f---
/
]
400
r.--
FIGURE B - TRANSITION TIMES versus LOAO CAPACITANCE
700
...~
viC-VEE 1.17 V
r-
Vin.INPUT VOLTAGE (V)
iii
L---
./
....-V
o
Vcc-Vee = +20 V
t--
+25
+50
T. TEMPERATURE (DC)
t:'
r--- t-+75
+100
+125
8-718
14
10
-75
-50
-25
-
f..--
~
V
I---l ~
----
o
+25
+50
T. TEMPERATURE (DC)
V
+75
+100
+125
MMH0026, MMH0026C (continued)
TYPICAL CHARACTISTICS (continued)
(VCC = + 20 V, VEE = 0 V, TA = +25 0 C unless otherwise noted,)
FIGURE 12 - PROPAGATION DELAY TIME versus
TEMPERATURE FOR +5 VOLT DC-COUPLED
OPERATION (See Figure 4.)
FIGURE 11 - TRANSITION TIME versus TEMPERATURE
FOR +5 VOLT DC·COUPLED OPERATION (See Figure 4,i
25
23
]
w
1
~
19
'";::z
..
~
~
17
i
15
i'-1\
--
22
VCC =+4.5 V, t= I MHz, PW = 200 ns
CL =510 pF, Cin = S10pF, Rin = 1 kn
VEE =0 V
~H
-25
z
16
!;i
'"
~
~
14
0
ITHL
13
-55
if
+25
+50
T, TEMPERATURE (OCI
+100
+75
12
10
-55
+125
FIGURE 13 - DC.cOUPLED SWITCHING RESPONSE
versus R in (See Figure 4.)
38
-
~~~:~7VV
ITHL
'"
;::
30
'".:
;::
ITLH
~
10
tpLH
8.0
o
o
10
I
I
I
I
TIME o'UTP~TlS ILOW I
TOTAL J'MEI
600
I
~ 500
ill~
300
~
Q
e
I
X 100%
700
Iz
I
.....
100
/
t:.--
-
~ F10
V
..20
10-
I..--"
100
200
300
400
500
Cin, CAPACITANCE (pF)
600
700
800
I..--"
I..--"
30
40
DUTY CYCLE (%)
ill
c
J....-'
100
70
u
40
20
70
--
/
V
1/
/
1/
17'
I
60
/
1/
CL = 500 pF ~...,.
a:
..~e
l::-
VCC1-VEf = 1~ V_
50
.~
V
CL = 1000 pF
~ 200
VCC-V~
..-..-
~VCC VEE=16V
400
o
./
./
I.;'
:; 200
ITHL
/'
1000
V~C-V~E • ~O V ..... V
400
C
tli
I
I
I
tPHL
tPLH
~
~
FIGURE 16 - AC POWER DISSIPATION versus
FREQUENCY (SINGLE DRIVER)
FIGURE 15 - MAXIMUM DC POWER DISSIPATION
versus DUTY CYCLE (SINGLE DRIVER)
f--
-
20
tPHL
I- DUTY CYCLE
+125
_ITLH
w
700
+100
Rin = 1 kn
!
4.0
6.0
Rin, RESISTANCE (kn)
+75
CL =25 pFVCC =+17 V
VEE=OV -
40
-
w
2.0
-
+25
+50
T, TEMPERATURE (OCI
-25
l.--' ~
50
~
20
--
tPH ':.,..
FIGURE 14 - DC.cOUPLED SWITCHING versus Cin
(See Figure 4.)
CL=10oopF _
Cin=510pF _
30
V ~
.......
"',,--- -
l-- ~
VCC = +4.5 V, VEE = 0 V
t = 1 MHz, PW = 200 ns,
CL = 510pF, Cin = 510 pF, Rin = 1 kn
10
0.1
V
02
CL =2oopF
CL' 100 pF
l/
0.4
0.7
1.0
2.0
t, FREQUENCY (MHz)
8-719
I"",
4.0
7.0
10
MMH0026, MMH0026C (continued)
APPLICATIONS INFORMATION
OPERATION OF THE MMH0026
The simplified schematic diagram of MMH0026, shown
in Figure 17, is useful in explaining the operation of the
device. Figure 17 illustrates that as the input voltage level
goes high, diode 01 provides an 0.7·volt "dead zone"
thus ensuring that 02 is turned "on" and 04 is turned
"off" before 07 is turned "on". This prevents undesirable
"current spiking" from the power supply, which would
occur if 07 and 04 were allowed to be "on" simul·
taneously for an instant of time. Diode 02 prevents
"zenering" of 04 and provides an initial discharge path
for the output capacitive load by way of 02.
The complete circuit, Figure 1, basically creates Dar·
lington devices of transistors 07, 04 and 02 in the
simplified circuit of Figure 17. Note in Figure.1 that
when the input goes negative with respect to V EE, diodes
07 through 010 turn "on" assuring faster turn "off" of
transi$tors 01, 02, 06 and 07. Resistor R6 insures that
the output will charge to within one VBE voltage drop
of the Vee supply.
As the input voltage level goes low, the stored charge in
02 is used advantageously to keep 02 "on" and 04 "off"
until 07 is "off". Again undesirable "current spiking" is
prevented. Due to the external capacitor, the input side
of Cin goes negative with respect to VEE causing 09 to
conduct momentarily thus assuring rapid turn "off"
of 07.
SYSTEM CONSIDERATIONS
Overshoot:
In most system applications the output waveform of the
MMH0026 will "overshoot" to some degree. However,
"overshoot" can be eliminated or reduced by placing a
damping resistor in series with the output. The amount
of resistance required is given by: RS = 2.j L/CL where
L is the inductance of the line and eL is the load capac'
itance. In most cases a series of damping resistor in the
range of 1().to-50 ohms will be sufficient. The damping
resistor also affects the transition times of the outputs.
The speed reduction is given by the formula:
tTHL '" tTLH = 2.2 RS CL (RS is the damping resistor).
Crosstalk:
The MMH0026 is sensitive to crosstalk when the output
voltage level is high (VO '" Vee). With the output in· the
high voltage level state, 03 and 04 are essentially turned
"off". Therefore, negative'going crosstalk will pull the
output down until 04 turns "on" sufficiently to pull the
output back towards Vce. This problem can be min·
imized by placing a "bleeding" resistor from the output
to ground. The "bleeding" resistor should be of suf·
ficient size so that 04 conducts only a few milliamperes.
Thus, when noise is coupled, 04 is already "on" and the
line is quickly clamped by 04. Also note that in Figure 1
06 clamps the output one diode·voltage drop above Vec
for positive·going crosstalk.
FIGURE 17 - SIMPLIFIED SCHEMATIC DIAGRAM
(Raf.: Figure 11
Vcc
RS
02
Cin
V;no----i
R3
Vo
02
lC
Power Supply oecoupling:
The decoupling of Vee and VEE is essential in most
systems. Sufficient capacitive decoupling is required to
supply the peak surge currents during switching. At least
a O.l·j.lF to 1.().j.lF low inductive capacitor should be
placed as close to each driver package as the layout will
permit.
L
01
07
RS
Input Driving:
For those applications requIring split power supplies
(VEE < GNo), ac coupling, as illustrated in Figure 3,
should be employed. Selection of the input capacitor
size is determined by the desired output pulse width.
Maximum performance is attained when the voltage at
8·720
MMH0026, MMH0026C (continued)
APPLICATIONS INFORMATION (continued)
the input of the MMH0026 discharges to just above the
device's threshold voltage (about 1.5 V). Figure 7 shows
optimum values for Cin versus the desired output pulse
width. The value for Cin may be roughly predicted by:
Cin = (2 x 10- 3 ) (PWo).
(1)
For an output pulse width of 500 ns, the optimum value
for Cin is:
Cin = (2 x 10- 3 ) (500 x 10- 9 ) = 1000 pF.
If single supply operation is required (VEE = GNO), then
dc coupling as illustrated in Figure 4 can be employed.
For maximum switching performance, a speed·up capac·
itor should be employed with dc coupling. Figures 13
and 14 show typical switching characteristics for various
values of input resistance and capacitance.
TABLE' - THERMAL CHARACTERISTICS
OF "G", "L" AND "P'" PACKAGES
PACKAGE TYPE
(Mounted In Socketl
BJA IOCIWI
Still Air
BJC (OCIWI
Still Air
MAX
TYP
MAX
TYP
"G" IMetal Package)
220
175
70
40
"L" (Ceramic Package)
150
100
50
.27
"PI" (Plastic Package)
150
100
70
40
FIGURE 18 - MAXIMUM POWER DISSIPATION .ersus
AMBIENT TEMPERATURE (As related to packagel
1.4
POWER CONSIOERATIONS
Circuit performance and long·term circuit reliability are
affected by die temperature. Normally, both are improved
by keeping the integrated circuit junction temperatures
low. Electrical power dissipated in the integrated circu it
is the source of heat. This heat source increases the
temperature of the die relative to some reference point,
normally the ambient temperature. The temperature in·
crease depends on the amount of power dissipated in the
circuit and on the net thermal resistance between the
heat source and the reference point. The basic formula
for converting power dissipation into junction temper·
ature is:
en
1.2
§-
1.0
~
z
o
I
I
"L" PACKAGE
r--"PI" PACKAGE
~ 0.8
~
i5 0.6
'"
~
~
I
"G" PACKAGE
~
-
STILL AIR
~
'" '" -""
r-.....:....
0.4
~
I .....
.....
J? o.2
0
-75
PA~~~WE~OI~KET -
......
-50
-25
0
+25
+50
+75 +100 +125
TA. AMBIENT TEMPERATURE 10C)
+150
+175
(2)
or
With these maximum junction temperature values, the
maximum permissible power dissipation at a given
ambient temperature may be determined. This can be
done with equations (2) or (3) and the maximum thermal
resistance values given in Table 1 or alternately, by using
the curves plotted in Figure 18. If, however, the power
dissipation determined by a given system produces a
calculated junction temperature in excess of the recom·
mended maximum rating for a given package type, something must be done to reduce the junction temperature.
(3)
where
T J = junction temperature
T A = ambient temperature
Po = power dissipation
8 JC = thermal resistance, junction to case
8CA = thermal resistance, case to ambient
8 JA = thermal resistance, junction to ambient.
Power Dissipation for the MMH0026 MOS Clock Driver:
The power dissipation of the device (PO) is dependent
on the following system requirements: frequency of op·
eration, capacitive loading, output voltage swing, and
duty cycle. This power dissipation, when substituted into
equation (3), should not yield a junction temperature,
TJ, greater than TJ(max) at the maximum encountered
ambient temperature. T J(max) is specified for three
integrated circuit packages in the maximum ratings
section of this data sheet.
There are two methods of lowering the junction tem·
perature without changing the system requirements.
First, the ambient temperature may be reduced sufficiently to bring TJ to an acceptable value. Secondly,
the8CA term can be reduced. L,oweringthe 8CA term can
be accomplished by increasing the surface area of the
package with the addition of a heat sink or by blowing
air across the package to promote improved heat
dissipation.
8-721
MMH0026, MMH0026C
(continued)
APPLICATIONS INFORMATION (continued)
The following examples illustrate the thermal considerations necessary to increase the power capability of the
MMH0026.
using the previous formulas and constants, a new safe
operating area can be generated for any output voltage
swing and duty cycle desired.
Assume that the ceramic package is to be used at a
maximum ambient temperature (TA) of +70 0 C. From
Table 1: IIJA(max) ~ 1500 C/watt, and from the maximum rating section of the data sheet: T J(max) ~ +175 0 C.
Substituting the above values into equation (3) yields a
maximum allowable power dissipation of 0.7 watts. Note
that this same value may be read from Figure 18. Also
note that this power dissipation value is for the device
mounted in a socket.
Note from Figure 19, that with highly capacitive loads,
the maximum switching frequency is very low. The
switching frequency can be increased by varying the
following factors:
(a) decrease T A
(b) decrease the duty cycle
(c) lower package thermal resistance II JA.
In most cases conditions (a) and (b) are fixed due to
system requirements. This leaves only the thermal resistance II JA that can be varied.
Next, the maximum power consumed for a given system
application must be determined. The power dissipation
of the MaS clock driver is conveniently divided into
dc and ac components. The dc power dissipation is
given by:
Pdc
~
(VCC - VEE) x (lccU x (Duty Cycle)
Note from equation (2) that the thermal resistance is
comprised of two parts. One is the junction-to-case
thermal resistance (II JC) and the other is the case-toambient thermal resistance (IICA). Since the factor Ii JC
is a function of the die size and type of bonding employed,
it cannot be varied. However, the IICA term can be
changed as previously discussed, see Page 7.
(4)
VCC - VEE
where ICCl ~ 40 mA (
).
20V
Note that Figure 15 is a plot of equation (4) for three
values of (VCC-VEE). For this example, suppose that
the MOS clock driver is to be operated with V CC ~ + 16 V
and VEE ~ GND and with a 50% duty cycle. From
equation (4) or Figure 15, the dc power dissipation (per
driver) may be found to be 256 mW. If both drivers
withtn the package are used in an identical way, the total
dc power is 512 mW. Since the maximum total allowable
power dissipation is 700 mW, the maximum ac power
that can be dissipated for this example becomes:
FIGURE 19 - LOAD CAPACITANCE versus FREQUENCY
FOR "L" PACKAGE ONLY
(Both drivers used in identical way)
700
A: SOCKET MOUNT
B: PC BOARD MOUNT
TA=+700 C
NO HEAT SINK
I- DUTYCYCLE=50%----C ~ NO HEAT SINK
NOAIR FLOW
600 I-vcc = +16 V
- ~ c: :~C:I~F~~~NT
0: SOCKET MOUNT
THERMAL
LOY
60128
NO HEAT SINK
rVEE=OV
>
- r-- HEAT SINK OR EUUIV
SDDLFPM
AIR FLOW
" 500 I--Ar-Br:C~D- , E- NO AIR FLOW
E: SOCKET MOUNT
~
ffi
"''"
w
~
~
400
ti
300
...
z
;t
Pac ~ 0.7 - 0.512 ~ 188 mW
The ac power for each driver is given by:
Pac ~ (VCC - VEE)2 x f x Cl
where f ~ frequency of operation
Cl ~ load capacitance (including all strays and
wiring).
<:i
..."
(5)
200
" 100
d
\
I\,
\
\.\.
""'
"'
,
,
"' "'"
THERMAL LOY 60128
HEAT SINK OR EQUIV
500LFPM
AIR FLOW
I'..
r--....
......
\.
"'
........
i'-.
......
r-SAFf OPERtTING tREA
2.0
r-.., .......
..........
r--
i'--..
r-- :-- I--.
r--
i'-.
4.0
6.0
--
8.0
f, SWITCHING FREaUENCY (MHz)
Figure 16 gives the maximum ac power dissipation versus
switching frequency for various capacitive loads with
VCC ~ 16 V and VEE ~ GND. Under the above conditions, and with the aid of Figure 16, the safe operating
area beneath Curve A of Figure 19 can be generated.
Heat Sink Considerations:
Heat sinks come in a wide variety of sizes and shapes that
will accomodate almost any IC package made. Some of
these heat sinks are illustrated in Figure 20. In the
previous example, with the ceramic package, no heat sink
and in a still air environment, liJA(max) was 1500 CIW.
Since both drivers have a maximum ac power dissipation of 188 mW, the maximum ac power per driver
becomes 94 mW. A horizontal line intersecting all the
capacitance load lines at the 94 mW level of Figure 16
will yield the maximum frequency of operation for each
of the capacitive loads at the specified power level. By
For the following example the Thermalloy 6012Btype
heat sink, or equivalent, is chosen. With this heat sink, the
IICA for natural convection from Figure 21 is 44 0 C/W.
From Table 1 liJc(max) ~ 500 CIW for the ceramic
8-722
10
MMH0026, MMH0026C (continued)
APPLICATIONS INFORMATION (continued)
FIGURE 20 - THERMALLOY· HEAT SINKS
w
fi
60128
6Q07A
2230·5
• Manufactured by Thermalloy Co. of Texas.
Forced Air Considerations:
package. Therefore, the new 0JA(max) with the 60128
heat sink added becomes:
0JA(max) = 50 0C/W + 44 0 CIW = 94 0 C/W.
As illustrated in Figure 22, forced air can be employed to
reduce the JA term. Note, however, that this curve is
expressed in terms of typical JA rather than maximum
0JA. Maximum 0JA can be determined in the following
°
°
Thus the addition of the heat sink has reduced JA(max"l
from 1500 C/W down to 94 0 CIW. With the heat sink, the
maximum power dissipation by equation (3) at T A =
+70 0 C is:
manner:
From Table 1 the following information is known:
(a)
0JA(tyP) = 1000 CIW
(b) 0JC(typ) = 27 o C/W
= 1. 11 watts.
PD=
°
Since:
This gives approximately a 58% increase in maximum
power dissipation. The safe operating area under Curve C
of Figure 19 can now be generated as before with the aid
of Figure 16 and equation (5).
(6)
Then:
(7)
Therefore, in still air
0CA(tyP) = 1000 CIW - 27 0 CIW = 7JOC/W
FIGURE 21 - CASE TEMPERATURE RISE ABOVE
AMBIENT versus POWER DISSIPATED USING
NATURAL CONVECTION
From Curve 1 of Figure 22 at 500 LFPM and eq·
uation (7),
100
0CA(tyP) = 53 0 CIW - 27 0 CIW = 26 0 CIW.
THERMALLOY'#6012B OIP HEAT SINK OR EUUIV
r-- THJRMALLJV #6007~
OIP HEAT SINK OR EUUIV ....
/'
/V-
V
o
o
,.
~
~
V
./
Thus 0CA(tyP) has changed from 73 0 CIW (still air) to
26 0 CIW (500 LFPM), which is a decrease in typical 0CA
by a ratio of 1 :2.8. Since the typical value of 0CA was
reduced by a ratio of 1 :2.8, OCA(max) of 1000 CIW
should also decrease by a ratio of 1:2.8.
i--v V
V
./
./ /
:v-::::V
This yields an 0CA(max) at 500 LFPM of 36 0 CIW.
Therefore, from equation (6):
0JA(max) = 50 0C/W + 36 0 CIW = 86 0 CIW.
V.....-: ~ !--.THERMALLOY #2230·5p--
0.5
TO·99 HEAT SINK OR EaUIV
1.0
1.5
Po, POWER DISSIPATED (WATTS)
2.0
8-723
Therefore the maximum allowable power dissipation at
500 LFPM and T A = +700 C is from equation (3):
1750C - 700C
PD =
= 1.2 watts.
+860 C/W
MMH0026, MMH0026C (continued)
APPLICATIONS INFORMATION (continued)
As before this yields a safe operating area under Curve E
in Figure 19.
FIGURE 22 - TYPICAL THERMAL RESISTANCE (OJA) OF
"L" PACKAGE versus AIR VELOCITY
100
'k
\
AIR FLOW OIRECTION
,-VI
.l
J.
I
'~-
~~" , _
I
I""
PACKAGE MOUNTING #1 BARNES SOCKET OR EaUIV
#;2 PRINTEO CIRCUIT BOARO
4" x S" x 0.002" - 2 OZ. CU.
~
#;2~ t::.-.....
-
I---?JA = 100DCNlATT}NO AI R FLOW
8Jr27DCfATT 1
1
20
o
200
400
SOD
BOD
1000
1200
AIR VELOCITY (LINEAR FEET PER MINUTE)
1600
14D0
As with the previous examples, the dc power at 50% duty
cycle is subtracted from the maximum allowable device
dissipation (PD) to obtain a maximum Pac. The safe
operating area under Curve D of Figure 19 can now be
generated from Figure 16 and equation (5).
Heat Sink and Forced Air Combined:
Some heat sink manufacturers provide data and curves of
IJCA for still air and forced air such as illustrated in
Figure 23. For example the 60128 heat sink has an
IJCA = 17 oC/W at 500 LFPM as noted in Figure 23.
From equation (6):
Max IJJA = 500 C/W + 17 oC/W = 67 0 C/W
From equation (3) at T A = +700 C
With maximum (}JA known, the maximum power dissipation can be found and the safe operating area determined as before. See Curve 8 in Figure 19.
1750C - 70°C
PD =
67 0 C/W
1.57 watts.
FIGURE 23 - THERMAL RESISTANCE 8CA
versus AIR VELOCITY
.........,
'" " .......
..........
........... .......
~
..........
""""- ""-
-- -- ---
OIPWITH THERMALLOY
#6012 B HEAplNK ~R Ea~IV
1
OIPWITHOUT HEAT SINK
........... ........
><:::.
~
OIPWITH THERMALLOY
#6~07A HEtT SINf 0 R E~UIV
./
200
400
600
BOO
AIR VELOCITY (LINEAR FEET PER MINUTE)
Note from Table 1 and Figure 22 that if the 14-pin
ceramic package is mounted directly to the PC board
(2 oz. cu. underneath), that typicallJJA is considerably
less than for socket mount with still air and no heat sink.
The following procedure can be employed to determine a
safe operating area for this condition.
Given data from Table 1:
typical () JA = 1000 C/w
typical () JC = 27 0 C/W
From Curve 2 of Figure 22,IJJA(tyP) is 75 0 C/W for a
PC mount and no air flow. Then the typical IJCA is
75 0 C/W - 27 0 C/W = 48 0 C/W_ From Table 1 the typical
value of IJCA for socket mount is 1000 C/w - 27 0 C/W =
73 oC/W. This shows that the PC board mount results in
a decrease in typicallJCA by a ratio of 1 :1.5 below the
typical value of (}CA in a socket mount. Therefore, the
maximum value of socket mount ()CA of 100 0 C/W
should also decrease by a ratio of 1: 1.5 when the device
is mounted in a PC board. The maximum (}CA becomes:
1000 C/W
IJCA = - - - = 66 0 C/W for PC board mount
1.5
Therefore the maximum () JA for a PC mount is from
equation (6).
IJ JA = 50 0 C/W + 66 0 e/W = 1160 C/W.
1000
8-724
CONCLUSION
In most cases, heat sink manufacturer's publish only
IJCA socket mount data. Although IJCA data for PC
mounting is generally not available, this should present
no problem. Note in Figure 22 that an air flow greater
than 250 LFPM yields a socket mount IJ JA approximately
6% greater than for a PC mount. Therefore, the socket
mount data can be used for a PC mount with a· slightly
greater safety factor. Also it should be noted that thermal
resistance measurements can vary widely. These measurement variations are due to the dependency of IJ CA on the
type environment and measurement techniques employed_ For example, IJCA would be greater for an
integrated circuit mounted on a PC board with little or
no ground plane versus one with a substantial ground
plane. Therefore, if the maximum calculated junction
temperature is on the border line of being too high for a
given system application, then thermal resistance measurements should be done on the system to be absolutely
certain that the maximum junction temperature is not
exceeded.
LI E
INTEGRATED CIRCUITS
PACKAGING
9-1
9·2
CASE OUTLINE DIMENSIONS
The packaging availability for each device type is indicated on the individual data sheets
and the Linear Selector Guide. All of the outline dimensions for the packages are given in
this section. Outline dimensions for non-encapsulated standard linear device chips, flipchips, and beam-lead devices are found on the individual data sheets (see MCC, MCCF, or
MCBC prefix followed by type number).
CASE 11 (TO-3)
DIM MIN
-
A
B
C
Weight ~ 7.4 grems
MIN
MAX
39.37
-
1.550
21.D8
7.62
1.09
F 29.90
3.43
30.40
G 10.67
11.18
H 5.33
J 16.64
•
0.250
0.039
1.177
0.420
0.210
0.655
0.440
0.151
5.59
17.15
12.19
4.09
26.67
11.18
3.84
Q
R
lr~
r~K
MAX
6.35
0.99
D
E
CASE 79 (TO-39)
INCHES
MilliMETERS
K Suffix
Metal Package
0.83D
0.300
PLANE
DIM
A
0.043
0.135
1.197
0.440
0.220
0.675
JJ~~l:
0.480
0.161
1.050
I
4/rH~~ ~
I
E SEATING
MilliMETERS
MIN MAX
8.89 9.40
B
8.00 8.51
C
6.10 6.60
D 0.406 0.533
E
0.229 3.18
F
0.406 0.483
G
4.83
5.33
H 0.711 0.864
J
0.737 1.02
K 12.70
L
6.35
M
45 NOM
P
1.27
n
90" NOM
2.54
R
G Suffix
Metal Package
Weight ~ 0.96 gram
SEATING/
PLANE
-JI_~
INCHES
MIN
MAX
0.350 0.370
0.315 0.335
0.240 0.260
0.016 0.021
0.009 0.125
0.016 0.019
0.190 0.210
0.028 0.034
0.029 0.040
0.500
0.250
450 NOM
0.050
g~
-
0.100
1-'_
Q~ N-G
_J_
1
V"""
~H.'
---<~ I i
I ""-. . /
o
t£!~o
....3'
G
M
All JEOEC notes and dimensions apply.
IN
~y"J
H/
CASE 199-64
CASE 206A
P Suffix
Plastic Package
Weight ~ 2.48 grams
No Suffix
Plastic Package
Weight ~ 0.2 gram
t--B-I
Li
Q
,F+-
I!,::
F
A·
l~._.J=t+
DIM
A
B
C
0
F
G
H
J
K
L
M
N
n
R
S
T
U
MILLIMETERS
MAX
MIN
INCHES
MIN MAX
16.08 16.33
12.57 12.83
3.18 3.43
0.51
0.76
3.61
3.86
2.54 BSC
2.67
2.92
0.43
0.69
14.73 14.99
2.16
2.41
30 TVP
1.47
1.73
4.7B
5,03
1.91
2.16
O,Bl
0.B6
6,99
7.24
6.22
6.48
0.633 , 0.643
0.495 0.505
0.125 0.135
0.020 0.030
0.142 0.152
0.100BSC
0.105 0.115
0.017 0,027
0.580 0.590
0.OB5 0.095
30 TYP
O.O'B 0.06B
O.IBB 0.19B
0,075 0,OB5
0.032 0,034
0,275 0.285
0.24. 0.25.
·
/Tr.~
~H
K
I
D--1:tL
r--
L 51
5 =:l.JD
[E! ,={
~IG
Tr
[H
I
I
T,~r=-n
-1-5
PLANE
-I
~l-J
MILLIMETERS
-,
'-~n
I. DIM "6" IS TO CENTER LINE OF LEADS.
DIM
MIN
MAX
A
C
0
F
G
H
J
3.30
3.43
0.64
0.20
I.BB
0,64
1.50
2.92
15.75
3.81
3,94
0,89
0.30
2.18
0.B9
1.75
3.18
16.76
10
2.03
9.6.
K
L
M
N
S
9-3
1.7B
8.64
INCHES
MIN
MAX
0,130 0,150
0.135 0.155
0.025 0.035
0.008 0.012
0,074 0,OB6
0.025 0.035
0.059 0.068
0.115 0.125
0,620 0,660
10
0.070 O.OBO
0.340 0.380
-
J\.. F
K
•
CASE 601
CASE 602A
G Suffix
Metal Package
G Suffix
Metal Package
Weight ~ 0.918 gram
Weight ~ 0.92 gram
MILLIMETERS
MIN
MAX
DIM
~:~-.
A
8
e
D
E
F
G
M'
~
Ie
H
J
K
L
M
N
~~ ~ ~Lj
SEATING
PLAN'
8.51
9.40
7.75 8.51
4.19
4.70
0.41
0.48
0.25
1.02
0.25
1.02
5.08 SSC
0.71
0.86
0.74
1.14
12.70
3.56 4.06
45 0 BSC
2.41
2.67
-JL. D
0.335
0.305
0.165
0.D16
0.010
0.010
0.370
0.335
0.185
0.019
0.040
0.040
•
140 0.160
45 0 BSC
0.095 0.105
~m~
cl .,.
G
--11--0
J~o,~
"ZyJ
_I
+
:o~
V~:o'o"o
CASE 6028
CASE 603 (TO-l00)
G Suffix
Metal Package
G Suffix
Metal Package
CBI
~A~
E 1(--
INCHES
MIN
MAX
MILLIMETERS
DIM MIN
MAX
Weight ~0.918 gram
A
8
C
0
E
C
8.51
7.75
T
0.370
0.335
0.180
0.D16 0.019
0.040
0.230 BSC
0.028 0.034
0.029 0.045
0.750
36 0 sse
CBI
~A~
-
-
J
K
M
Weight ~0.918 gram
0.335
0.305
9.39
8.50
4.57
0.41 0.48
1.02
5.84 BSC
0.71 0.86
0.74 1.14
19.05
36 sse
-"-H
1~
IrE1
-
-
~
. ., , "
PLANE
NOTE:
1. LEAOSWITHINO.13mm
10.005) RAO OF TRUE
POSITION AT SEATING
PLANE AT MAXIMUM
MATERIAL CONDITION.
&
,,'
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