1978_Philips_Integrated_Circuits 1978 Philips Integrated Circuits
User Manual: 1978_Philips_Integrated_Circuits
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This information is furnished for guidance, and with no guarantee as to its accuracy or
completeness; its publication conveys no licence under any patent or other right, nor
does the publisher assume liability for any consequence of its use; specifications and
availability of goods mentioned in it are subject to change without notice; it is not to be
reproduced in any way, in whole or in part without the written consent of the publisher.
© N. V. Philips' Gloeilampenfabrieken
EINDHOVEN - The Netherlands
February 1978
CONTENTS
INTEGRATED CIRCUITS
CONSUMER
PROFESSIONAL ANALOGUE
LOGIC
MEMORIES
MICROPROCESSORS
MILITARY PRODUCTS
PACKAGES
consumer
rad io - aud io
High-frequency section of hi-fi f.m. receiver
hi-fi
equipment
portables
radios and
radio/recorders
car
radios
mains
radios
a.m. channel receivers
TDA5700
TBA570A
TBA570A
TBA700
TBA570A
TBA570A
f.m. channel receivers
TCA420A
TBA570A
TBA570A
TCA420A
TBA570A
TBA570A
TBA700
TBA570A
TBA570A
a.m./f.m. receiver circuits
stereo decoders
TDA1005
TCA290A
stabilizer for electronic tuning
TCA530
TCA750
d.c. controlled
audio circuits
B2
TDA1005
volume and balance
TCA730
TCA730
tone
TCA740
TCA740
quadruple signalsources switch
TDA1028
stereo signalsources switch
TDA1029
For detailed information
Handbook SC5b
a.f. power amplifiers
miscellaneous
Signetics circuits
2 W audio amplifier
TCA760B
5 W audio power amplifier for audio and
TDA2611A
tv sound
6 W audio power amplifier for audio and
TDA2610; TDA2610A
tv sound
6 W audio power amplifier for car radios
TDA1004A
and general audio
6 W audio power amplifier for car radios
and general audio
TDA1010
stereo audio power amplifier up to 2 x 10 W TDA 1009
hearing aid amplifier
OM200/S2
low level amplifier
integrated MOST amplifier
integrated MOST level sensor
recording preamplifier circuit
motor regulator and bias/erase
oscillator circuit
motor regulator with automatic
tape-end indicator for car c~ssettes
motor-speed regulator
bipolar frequency divider
magnetic field detector using Hall effect
gating-frequency divider for electronic
organs
TAA263
TAA320
TAA320A
TDA1002A
Dolby "8" processor
Dolby "8" processor
a.m. radio
f.m. detector/limiter
f.m. gain block
f.m. gain block
f.m. channel receiver
f.m. channel receiver
stereo decoder
dual low noise preamplifier
dual low noise preamplifier
dual low noise preamplifier
dual low noise preamplifier
power driver
a.m. channel receiver
TDA1003A
TDA1006
TDA1059B
SAJ110
TCA450A
TDA1008
NE545
NE645
NE546
ULN2111
ULN2208
ULN2209
CA3089
TBA120SR
JJ.A758
LM381; LM381A
LM382
LM387
NE542
NE541
TCA440
83
consumer
television
For detailed information
Handboo.k SC5b
vision i.f. demodulators
TCA270S
TCA540
TDA2540
TDA2541
TDA2670
signal processing circuit
synchronous demodulator
Lf. amplifier (n·p·n tuner) and signal processor
as TDA2540, but for p·n-p tuner
i.f. amplifier/demodulator
signal processors
TBA550, TBA890, TBA900, }
TDA2680A, TDA2690A
video preamplifier, automatic horizontal
sync and vertical sync separator, etc.
sound circuits
TBA750A
TDA2610(A)
TDA2790
limiter-amplifier/demodulator
output circuit
limiter-amplifier/demodulator
sync processors; horizontal,
vertical
TBA920
TBA720A
TDA2571
TDA2581
TDA2590 to 92
horizontal
horizontal
horizontal
horizontal
horizontal
vertical deflection circuit
TDA2600
switched mode
colour decoding
TBA560C, TDA2560
TCA660B
TBA540
TAA630S
TBA520, TBA990, TCA800
TDA2520, TDA2522/23
TBA530, TDA2530
luminance and chrominance control combination
contrast, saturation and brightness control for colour
difference and luminance signals
chrominance combination
chrominance amplifier for SECAM or PAL/SECAM decoders
chrominance demodulator for SECAM or PAL/SECAM
decoders
reference combination
synchronous demodulator for colour difference drive
colour demodulator
colour demodulator combination
RGB matrix preamplifier
TDA2640
TAA550
switched-mode power supply drive circuit
voltage stabilizer (electronic tuning)
TBA510, TDA2510
TCA640
TCA650
miscellaneous
B4
combination
oscillator circuit
oscillator with vertical divider
deflection stabilizer
combination
index professional analogue
page
878
878
878
879
879
LM2901
LM2902
LM2903
f.1A 709/709A/709C
f.1A710/710C
Quad comparator
Quad op amp
Dual comparator
Opamp
Comparator
page
846
830
847
832
847
G.P. NPN transistor array
Dual line receiver
Dual line receiver
Dual differential line driver
7,segment decoder/driver
879
869
869
869
880
f.1A711/711C
f.1A723/723C
f.1A733/733C
f.1A740C
f.1A741/741C
Dual comparator
Variable volt. regulator
Video amplifier
FET input op amp
General purpose op amp
B48
B56
B70
B32
B33
OS8880-1
OS3611
OS3612
OS3613
OS3ji14
7-segment decoder/driver
Dual AND peripheral driver
Dual NAN D periph. driver
Dual OR periph. driver
Dual NOR periph. driver
880
869
870
870
870
f.1A747/747C
f.1A748/748C
MC1408-8/1508-8
MC1456/1556
MC1458/1558
Dual general purp. op amp
General purpose op amp
8-bit D to A converter
Precision op amp
Dual general purp. op amp
B33
B34
B71
B34
B35
LF 155/255/355
LF 155A/255A/355A
LF156/256/356
L F 156A/256A/356A
LF157/257/357
J-FET
J-FET
J-FET
J-FET
J-FET
826
826
826
827
826
MC1488
MC1489/1489A
MC1496/1596
MC3302
NE501
Quad line driver
B71
Quad line receiver
B71
Double balanced mixer/modulatorB90
Quad voltage comparator
B48
Video amplifier
B72
LF157A/257A/357A
LH2101A/2201A/2301A
LH21 08/2208/2308
LH 21 08A/2208A/2308A
LM10l/201
J-FET input op amp
Dual high perf. op amp
Dual precision op amp
Dual precision op amp
High perf. op amp
827
827
828
B28
828
NE503
NE504
NE510
NE511
NE515
Bucket brigade delay line
Bucket brigade delay line
Dual differential amplifier
Dual differential transistor pair
Differential amplifier
B90
B90
B43
B43
B43
LM101A/201A/301A
LM 107/207/307
LM 108/208/308
LM 108A/208A/308A
LM 109/209/309
High perf. op amp
High perf. op amp
Precision op amp
Precision op amp
Fixed 5 volt regulator
B29
B29
830
830
856
NE521
NE522
NE526
NE527
NE529
Dual high-speed comparator
Dual high-speed comparator
Precision voltage comparator
High-speed comparator
High-speed comparator
B48
B49
B49
B49
B50
LM111/211/311
LMl19/219/319
LM 124/224/324
LM 124A/224A/324A
LM 139/239/339
Precision volt. comparator
Dual voltage comparator
Quad op amp
Quad op amp
Quad comparator
846
846
830
831
846
NE530
NE531
NE532
NE532A
NE535
High
High
Dual
Dual
High
B35
B36
836
B36
B37
LM 139A/239A/339A
LM 158/258/358
LM 158A/258A/358A
LM 193/293/393
LM340 series
Quad comparator
Dual low-power op amp
Dual low-power op amp
Dual comparator
Fixed pos. volt. regulators
847
831
831
847
856
NE536
NE538
NE543
NE544
NE550
FET input op amp
High slew rate op amp
Servo amplifier
Servo amplifier
Variable voltage regulator
CA3045
CA3046/3086
CA3081
CA3082
CA3083
G.P.
G.P.
G.P.
G.P.
G.P.
CA3183
OS7820/8820
OS7820A/8820A
OS7830/8830
OS8880
NPN
NPN
NPN
NPN
NPN
transistor
transistor
transistor
transistor
transistor
input
input
input
input
input
op
op
op
op
op
array
array
array
array
array
amp
amp
amp
amp
amp
slew rate op amp
slew rate op amp
low-power op amp
low-power op amp
slew rate op amp
837
837
B60
860
856
85
index professional analogue
NE555
NE556
NE558
NE559
NE560
Timer
Dual timer
Quad timer
Quad timer
Phase locked loop
page
863
863
864
864
891
SA534
SA709C
SA741C
SA747C
SA748C
Quad op amp
Opamp
General purpose op amp
Dual general purpose op amp
General purpose op amp
page
830
832
833
833
834
NE561
NE562
NE564
NE565
NE566
Phase locked loop
Phase locked loop
Digital phase locked loop
Phase locked loop
Function generator
891
891
891
892
892
SA1458
SAA1027
SAA1029
SAA1049
S05000
Precision op amp
Stepper motor driver
Industrial logic circuit
Revolution counter
Quad analogue S.P.S.T. switch
835
860
860
861
894
NE567
NE570
NE571
NE575
NE580
Tone decoder
Analogue compandor
Analogue compandor
Phase locked loop
8ar·graph driver
892
893
893
893
880
S05001
S05002
S05100
S05101
S05200
Quad analogue S.P.S.T. switch
30 V driver circuit
Four channel multiplexer
Four channel multiplexer
Quad analogue S.P.S.T. driver
895
895
895
895
896
NE582
NE584
NE585
NE586 to 589
NE590
Hex universal driver
Gas discharge cathode driver
Gas discharge anode driver
LED drivers
Peripheral driver
881
881
882
882
872
S05301
SE501
SE510
SE511
SE515
Cross point switch
Video amplifier
Dual differential amplifier
Dual differential transistor pair
Differential amplifier
896
872
843
843
843
NE591
NE592
NE593
NE5007
NE5008
Peripheral driver
Video amplifier
Sextuple latch
8-bit D to A converter
8-bit D to A converter
872
872
894
873
873
SE526
SE527
SE529
SE530
SE531
Precision voltage comparator
High-speed comparator
High-speed comparator
High slew rate op amp
High slew rate op amp
849
849
850
835
836
NE5009
NE5018
NE5501
NE5502
NE5503
8-bit D to A converter
8-bit A to D converter
Darlington transistor array
Darlington transistor array
Darlington transistor array
873
873
883
883
883
SE532
SE532A
SE535
SE538
SE550
Dual low-power op amp
Dual low-power op amp
High slew rate op amp
High slew rate op amp
Variable voltage regulator
836
836
837
837
856
NE5504
NE5530
NE5533
NE5534
NE5535
Darlington transistor array
Dual high slew rate op amp
Dual low noise op amp
High performance op amp
Dual high slew rate op amp
883
838
838
841
838
SE555/555C
SE556/556C
SE560
SE561
SE562
Timer
Dual timer
Phase locked loop
Phase locked loop
Phase locked loop
863
863
891
891
891
NE5538
NE5539
NE5551 to 55
NE5596
SA532
839
Dual high slew rate op amp
842
High slew rate op amp
857
Dual polarity regulators
Double balanced mixer/modulator894
Dual low-power op amp
836
SE564
SE565
SE566
SE567
SE592
Digital phase locked loop
Phase locked loop
Function generator
Tone decoder
Video amplifier
891
892
892
892
872
86
SE5008
SE5009
SE5018
SE5530
SE5533
8-bit D to A converter
8-bit D to A converter
8-bit A to D converter
Dual high slew rate op amp
. Dual low noise op amp
page
873
873
873
838
838
UDN5711
UDN5712
UDN5713
UDN5714
75S107
Dual AND peripheral driver
Dual NAND peripheral driver
Dual OR peripheral driver
Dual NOR peripheral driver
High-speed line receiver
page
874
874
874
874
875
SE5534
SE5535
SE5538
SE5551 to 55
SE5596
High performance op amp
841
Dual high slew rate op amp
838
Dual high slew rate op amp
839
Dual polarity regulators
857
Double balanced mixer/modulator894
75S108
75S207
75S208
78G
78LOO series
High-speed line receiver
High-speed dual sense amp
High-speed dual sense amp
Adjustable pos. voltage regulator
Fixed pos. voltage regulators
875
887
887
857
857
SU536
TAA960
TAA970
TBA673
TBA915
FET input op amp
Triple amp
Microphone amp
Ring modulator
Low-power audio amp
78MOO series
78MG
79G
79MOO series
79MG
Fixed pos. voltage regulators
Adjustable pos. voltage regulator
Adjustable neg. voltage regulator
Fixed neg. voltage regulators
Adjustable neg. voltage regulator
857
858
858
B58
859
TCA210
TCA220
TCA240
TCA280A
TCA520
Low-power audio amp
897
Triple op amp
839
Double balanced mixer/modulator897
Universal triac control
B61
General purpose op amp
839
7520
7521
7522
7523
7524
Dual
Dual
Dual
Dual
Dual
B84
884
B85
885
885
TCA580
TCA770A
TCA980
TDA0301
TDA0319
Gyrator
I F limiter amp
Microphone amp
High performance op amp
Dual voltage comparator
B98
898
898
840
B50
7525
7528
7529
7800 series
7900 series
Dual core sense amp
Dual core sense amp
Dual core sense amp
Fixed pos. voltage regulators
Fixed neg. voltage regulators
B85
B86
B86
859
859
TDA0324
TDA0358
TDA0555
TDA0723
TDA0741
Quad op amp
Dual low-power op amp
Timer
Variable voltage regulator
General purpose op amp
B40
B40
B64
859
840
55325
75232
75233
75234
75235
Memory driver
Dual core sense
Dual core sense
Dual core sense
Dual core sense
888
886
886
B87
887
TDA0748
TDA1022
TDA1023
TDA1024
TDA1034
General purpose op amp
8ucket brigade delay line
Time proportional triac control
On/off triac control
High performance op amp
841
898
861
861
B41
75324
75325
754508
75451B
754528
Memory driver
Memory driver
Dual peripheral driver
Dual peripheral driver
Dual peripheral driver
888
888
B75
876
876
TDA1060
TDA1078
TDA1092
TDA1458
TDA3060
S.M.P$. control
High slew rate op amp
Voltage indication circuit
Dual general purpose op amp
S.M.P .S. control
862
B42
B62
B42
B62
75453B
754548
Dual peripheral driver
Dual peripheral driver
877
B77
837
896
896
897
897
core
core
core
core
core
sense
sense
sense
sense
sense
amp
amp
amp
amp
amp
amp
amp
amp
amp
87
professional analogue replacement
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacement
ADIOlAD
ADlOIAH
ADlO8AH
ADlO8H
AD201AH
AD201AN
AD208AH
AD208H
AD301AH
AD301AN
AD308H
AD741H
AD741N
AD741CH
AD741CN
AD559JD
AD559K
AD559KD
AD559S
AD559SD
AM555DC
AM555DM
AM555HC
AM555HM
AM555TC
AM723DC
AM723DM
AM723HC
AM723HM
AM741DC
AM741DM
AM741HC
AM74lHM
AM747DC
AM747DM
AM747HC
AM747HM
AM748DC
AM748DM
AM748HC
AM748HM
AMLMI01AD
AMLMI01AH
AMLMI01H
AMLMI07D
AMLMI07H
AMLMI08AH
AMLMI08H
AMLMl11D
AMLMll1H
AMLM201AD
AMLM201AH
AMLM201D
AMLM201H
AMLM207D
LMlOlAF
LMIOIAT
LMlO8AT
LMI08T
LM201AT
LM20lAN
LM208AT
LM208T
LM301AT
LM301AN
LM308T
IlA741T
IlA74lN
IlA74lCT
IlA74lCN
MC1408-8F
MC1408-8F
MC1408-8F
MCl508-8F
MC1508-8F
NE555F
SE555F
NE555T
SE555T
NE555N
IlA723CF
Il A723F
IlA723CT
Il A723T
IlA74lCF
IlA741F
IlA7 4 1CT
IlA741T
IlA747CF
IlA747F
IlA747CT
IlA747T
IlA748CF
IlA748F
IlA748CT
IlA748T
LMIOIAF
LMIOIAT
LMIOIT
LMI07F
LMI07T
LMI08AH
LMI08T
LMlllF
LMlllT
LM201AF
LM201AT
LM201F
LM20lT
LM207F
AMLM207H
AMLM208AH
AMLM208D
AMLM2llD
AMLM2llH
AMLM30lAD
AMLM30lAH
AMLM307D
AMLM307H
AMLM308AH
AMLM308H
AMLM311D
AMLM3llH
CAl OlAF
CAlOIAT
CAI01F
CAI01T
CAI07F
CAI07T
CAI08AT
CAI08T
CAI11F
CAlllT
CA124F
CA139AF
CA139F
CA201AF
CA201AT
CA201F
CA201T
CA207F
CA207T
CA208T
CA211F
CA211T
CA224F
CA239AF
CA239F
CA301AF
CA301AT
CA307F
CA307T
CA308AT
CA308T
CA311F
CA311T
CA324E
CA324F
CA339E
CA339F
CA339AE
CA339AF
CA555CE
CA555CF
CA555CT
LM207T
LM208AT
LM208F
LM21lF
LM2l1T
LM30lAF
LM301AT
LM307F
LM307T
LM308AT
LM308T
LM311F
LM311T
LMIOlAF
LMlOlAT
LMlOIF
LMI0lT
LMI07F
LMlO7T
LMI08AT
LMI08T
LMlllF
LMlll T
LM124F
LM139AF
LM139F
LM201AF
LM20lAT
LM201F
LM201T
LM207F
LM207T
LM208T
LM2llF
LM211T
LM224F
LM239AF
LM239F
LM301AF
LM301AT
LM307F
LM307T
LM308AT
LM308T
LM311F
LM311T
LM324N
LM324F
LM339N
LM339F
LM339AN
LM339AF
NE555N
NE555F
NE555T
CA555F
CA555T
CA723CE
CA723CT
CA723E
CA723T
CA741CE
CA741CF
CA74lCT
CA74lF
CA74lT
CA747CF
CA747CT
CA747F
CA747T
CA748CE
CA748CF
CA748CT
CA748F
CA748T
CAl458E
CA1458F
CA1458T
CA1558T
CA3045F
CA3046E
CA3081E
CA3082E
CA3083E
CA3086E
CA3183E
DM7820AJ
DM7820J
DM7830J
DM7880J
DM8820AJ
DM8820AN
DM8820J
DM8820N
DM8830J
DM8830N
DM8880J
DM8880N
DS1488J
DS1489AJ
DS1489J
DS3611H
DS36llN
DS3612H
DS3612N
DS3613H
DS36l3N
DS36l4H
DS36l4N
DS7520J
SE555F
SE555T
IlA723CN
IlA723CT
Il A723N
Il A723T
IlA74lCN
IlA741CF
IlA74lCT
IlA741F
IlA741T
IlA747CF
IlA747CT
IlA747F
IlA747T
IlA748CN
IlA748CF
IlA748CT
IlA748F
IlA748T
MC1458N
MC1458F
MC1458T
MC1558T
CA3045F
CA3046N
CA3081N
CA3082N
CA3083N
CA3086N
CA3l83N
DS7820AF
DS7820F
DS7830F
DS7880F
DS8820AF
DS8820AN
DS8820F
DS8820N
DS8830F
DS8830N
DS8880F
DS8880N
MC1488F
MC1489AF
MC1489F
DS36llT
DS36llN
DS3612T
DS3612N
DS36l3T
DS36l3N
DS3614T
DS3614N
7520F
B8
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacement
DS7520N
DS7521J
DS7521N
DS7522J
DS7522N
DS7523J
DS7523N
DS7524J
DS7524N
DS7525J
DS7525N
DS7528J
DS7528N
DS7820AJ
DS7820J
DS7830J
DS7880J
DS8820J
DS8820AJ
DS8820AN
DS8820N
DS8830J
DS8830N
DS8880J
DS8880N
DS55450J
DS55450T
DS55451H
DS55452H
DS55453H
DS55454H
DS75107J
DS75107N
DS75108J
DS75108N
DS75207J
DS75207N
DS75208J
DS75208N
DS75324J
DS75324N
DS75325J
DS75325N
DS75450J
DS75450N
DS75451H
DS75451N
DS75452H
DS75452N
DS75453H
DS75453N
DS75454H
DS75454N
LF155AH
LF155AJ-8
7520N
7521F
7521N
7522F
7522N
7523F
7523N
7524F
7524N
7525F
7525N
7528F
7528N
DS7820AF
DS7820F
DS7830F
DS7880F
DS8820F
DS8820AP
DS8820AN
DS8820N
DS8830F
DS8830N
DS8880F
DS8880N
55450BF
55450BT
55451BT
55452BT
55453BT
55454BT
75S107F
75S107N
75S108F
75S108N
75S207F
75S207N
75S208F
75S208N
75324F
75324N
75325F
75325N
75450BF
75450BN
75451BT
75451BN
75452BT
75452BN
75453BT
75453BN
75454BT
75454BN
LF155AT
LF155AFE
LF155AL
LF155H
LF155J-8
LF155L
LF156AH
LF156AJ-8
LF156AL
LF156H
LF156J-8
LF156L
LF157AH
LF157AJ-8
LF157AL
LF157H
LF157J-8
LF157L
LF255AL
LF255L
LF256AL
LF256L
LF257AL
LF257L
LF355AH
LF355AJ-8
LF355AL
LF355AN
LF355H
LF355J-8
LF355L
LF355N
LF356AH
LF356AJ-8
LF356AL
LF356AN
LF356H
LF356J-8
LF356L
LF356N
LF357AH
LF357AJ-8
LF357AL
LF357AN
LF357H
LF357J-8
LF357L
LF357N
LH2101AD
LH2108AD
LH2108D
LH2111D
LH2201AD
LH2208AD
LH2208D
LH2211D
LH2301AD
LF155AT
LF155T
LF155FE
LF155T
LF156AT
LF156AFE
LF156AT
LF156AT
LF156FE
LF156T
LF157AT
LF157AFE
LF157AT
LF157T
LF157FE
LF157T
LF255AT
LF255T
LF256AT
LF256T
LF257AT
LF257T
LF355AT
LF355AFE
LF355AT
LF355AN
LF355T
LF355FE
LF355T
LF355N
LF356AT
LF356AFE
LF356AT
LF356AN
LF356T
LF356FE
LF356T
LF356N
LF357AT
LF357AFE
LF357AT
LF357AN
LF357T
LF357FE
LF357T
LF357N
LH2101AF
LH2108AF
LH2108F
LH2111F
LH2201AF
LH2208AF
LH220SF
LH2211F
LH2301AF
LH230SAD
LH230SD
LH2311D
LM7BL05ACH
LM78L05AGZ
LM78L05CH
LM78L05CZ
LM78L06ACH
LM78L06ACZ
LM78L06CH
LM78L06CZ
LM7BL08ACH
LM78L08ACZ
LM78L08CH
LM78L08CZ
LM78L12ACH
LM78L12ACZ
LM78L12CH
LM78L12CZ
LM78L15ACH
LM78L15ACZ
LM78L15CH
LM78L15CZ
LM78L24ACH
LM7SL24ACZ
LM78L24CH
LM78L24CZ
LMIOIAD
LMIOIAH
LMIOIAJ
LMIOIAJ-14
LMIOIAJG
LMIOIAL
LMIOIH
LMIOIJ-14
LMI07D
LMI07H
LMI07J
LMI07J-14
LMI07JG
LMI07L
LMIOSAD
LMI08AH
LMI08AJ
LMI08D
LMI08H
LMI08J
LMI09H
LMI09K
LMI09LA
LMII1D
LMll1H
LMIIIJ
LMIIIJG
LM11IL
LH2308AF
LH230BF
LH2311F
78L05~CDB
78L05~CS
78L05CDB
78L05CS
78L06~CDB
78L06~CS
78L06CDB
78L06CS
78L08~CDB
78L08~CS
78L08CDB
78L08CS
78L12~CDB
78L12~CS
78L12CDB
78L12CS
78L15~CDB
78L15~CS
78L15CDB
78L15CS
78L24~CDB
78L24~CS
78L24CDB
78L24CS
LMIOIAF
LMIOIAT
LMIOIAF
LMIOIAF
LMIOIAFE
LMIOIAT
LMIOIT
LMIOIF
LMI07F
LMI07T
LMI07F or FE
LMI07F
LMI07FE
LMI07T
LMI08AF
LMI08AT
LMI08AF
LMI08F
LMI08T
LMI08F
LMI09DB
LMI09DA
LMI09DB
LMIIIF
LMll1T
LMIIIF
LMll1FE
LMIIIT
B9
professional analogue replacement
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacement
LMl19D
LMl19H
LM119J
LM124AD
LM124AJ
LM124D
LM124J
LM139AD
LM139AJ
LM139D
LM139J
LM15SAH
LM15SH
LM15SJG
LM15SL
LM161D
LM161H
LM161J
LM193AH
LM193H
LM193JG
LM193L
LM201AD
LM201AH
LM201AJ
LM201AJ-14
LM201AJG
LM201AL
LM201AN
LM201AP
LM201H
LM201J
LM201J-14
LM207D
LM207H
LM207J
LM207J-14
LM207JG
LM207L
LM207N
LM207P
LM20SAD
LM20SAH
LM20SAJ
LM20SD
LM20SH
LM20SJ
LM209H
LM209K
LM209LA
lLM211D
LM211H
LM211J
LM219D
LM219H
LMl19F
LM119T
LMl19F
LM124AF
LM124AF
LM124F
LM124F
LM139AF
LM139AF
LM139F
LM139F
LM15SAT
LM15ST
LM15SFE
LM15ST
SE529F
SE529K
SE529F
LM193AT
LM193T
LM193FE
LM193T
LM201AF
LM201AT
LM201AF
LM201AF
LM201AFE
LM201AT
LM201AN-14
LM201AN
LM201T
LM201FE
LM201F
LM207F
LM207T
LM207F or FE
LM207F
LM207FE
LM207T
LM207N-14
LM207N
LM20SAF
LM20SAT
LM20SAF
LM20SF
LM20ST
LM20SF
LM209DB
LM209DA
LM209DB
LM211F
LM211T
LM211F
LM219F
LM219T
LM219J
LM224AD
LM224AJ
LM224D
LM224J
LM224N
LM239AD
LM239AJ
LM239D
LM239J
LM239N
LM25SAH
LM25SH
LM25SJG
LM25SL
LM258P
LM293AH
LM293H
LM293JG
LM293L
LM293P
LM301AH
LM301AJ
LM301AJ-14
LM301AJG
LM301AL
LM301AN
LM301AP
LM307D
LM307H
LM307J
LM307J-14
LM307JG
LM307L
LM307N
LM307P
LM308AD
LM30SAH
LM30SAJ
LM308D
LM308H
LM308J
LM308N
LM309H
LM309K
LM309LA
LM311D
LM311H
LM311J
LM311J-14
LM311JG
LM311L
LM311N
LM311N-14
LM311P
LM219F
LM224AF
LM224AF
LM224F
LM224F
LM224N
LM239AF
LM239AF
LM239F
LM239F
LM239N
LM258AT
LM258T
LM258FE
LM25ST
LM258N
LM293AT
LM293T
LM293FE
LM293T
LM293N
LM301AT
LM301AF or AFE
LM301AF
LM301AFE
LM301AT
LM301AN or AN-14
LM301AN
LM307F
LM307T
LM307F or FE
LM307F
LM307FE
LM307T
LM307N or N-14
LM307N
LM30SAF
LM30SAT
LM308AF
LM308F
LM308T
LM30SF
LM308N
LM309DB
LM309DA
LM309DB
LM311F
LM311T
LM311F or FE
LM311F
LM311FE
LM311T
LM311N or N-14
LM311N-14
LM311N
LM319D
LM319H
LM319J
LM319N
LM324AJ
LM324AN
LM324J
LM324N
LM339AJ
LM339AN
LM339J
LM339N
LM340K-5.0
LM340K-6.0
LM340K-8.0
LM340K-12
LM340K-15
LM340K-18
LM340K-24
LM340T-5.0
LM340T-6.0
LM340T-8.0
LM340T-12
LM340T-15
LM340T-1S
LM340T-24
LM341P-5.0
LM341P-6.0
LM341P-8.0
LM341P-12
LM341P-15
LM341P-20
LM341P-24
LM358AH
LM358AN
LM35SH
LM358JG
LM35SL
LM358N
LM358P
LM361D
LM361H
LM361J
LM361N
LM381N
LM382N
LM387N
LM393AH
LM393AN
LM393H
LM393JG
LM393L
LM393N
LM393P
LM555CH
LM319F
LM319T
LM319F
LM319N
LM324AF
LM324AN
LM324F
LM324N
LM339AF
LM339AN
LM339F
LM339N
LM340-5DA
LM340-6DA
LM340-8DA
LM340-12DA
LM340-15DA
LM340-1SDA
LM340-24DA
LM340-5U
LM340-6U
LM340-8U
LM340-12U
LM340-15U
LM340-1SU
LM340-24U
78M05CU
78M06CU
78M08CU
78M12cu
78M15CU
78M20CU
78M24CU
LM358AT
LM358AN
LM358T
LM358FE
LM358T
LM358N
LM358N
LM361F
LM361T
LM361F
LM361N
LM381N
LM3S2N
LM387N
LM393AT
LM393AN
LM393T
LM393FE
LM393T
LM393N
LM393N
NE555T
810
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacemen t
LM555CN
LM555H
LM556CD
LM556CJ
LM556CN
LM556D
LM556J
LM565CH
LM565CN
LM565H
LM566CH
LM566CN
LM566H
LM567CH
LM567CN
LM567H
LM709AJ
LM709CH
LM709CJ
LM709CN
LM709CN-14
LM709H
LM709J
LM710H
LM710CH
LM711CH
LM711CN
LM711H
LM723CD
LM723CH
LM723CJ
LM723CN
LM723D
LM723H
LM723J
LM723N
LM733CD
LM733CH
LM733CJ
LM733CN
LM733D
LM733H
LM733T
LM741CH
LM741CJ
LM741CJ-14
LM741CN
LM741CN-14
LM741D
LM741H
LM741J-14
LM747CD
LM747CH
LM747CJ
LM747D
NE555N
SE555T
NE556F
NE556F
NE556N
SE556F
SE556F
NE565T
NE565N
SE565T
NE566T
NE566N
SE566T
NE567T
NE567N
SE567T
J.LA709AF
J.LA709CT
J.LA709CF
J.LA709CN
J.LA709CN-14
J.LA709T
J.LA709F
J.LA710T
J.LA710CT
J.LA711CT
J.LA711CN
J.LA711T
J.LA723CF
J.LA723CT
J.LA723CF
J.LA723CN
J.LA732F
J.LA723T
J.LA723F
J.LA723N
J.LA733CF
J.LA733CT
J.LA733CF
J.LA733CN
J.LA733F
J.LA733T
f,lA733F
J.LA741CT
J.LA741CFE
J.LA741CF
J.LA741CN
J.LA741CN-14
J.LA741F
J.LA741T
J.LA741F
J.LA747CF
J.LA747CT
J.LA747CF
p.A747F
LM747H
LM747J
LM748CH
LM748CJ
LM748CN
LM748H
LM748J
LM1458H
LM1458J
LM1458N
LM1458N-14
LM1496H
LM1496J
LM1496N
LM1558H
LM1558J
LM1596H
LM1596J
LM2901J
LM2901N
LM2902J
LM2902N
LM2903JG
LM2903L
LM2903N
LM2903P
LM2904JG
LM2904L
LM2904N
LM2904P
LM3045D
LM3045J
LM3046N
LM3086N
LM3302N
LM7805KC
LM7805T
LM7806KC
LM7806T
LM7808KC
LM7808T
LM7812KC
LM7812T
LM7815KC
LM7815T
LM7818KC
LM7818T
LM7824KC
LM7824T
LM7905T
LM7905.2T
LM7906T
LM7908T
LM7912T
LM7915T
J.LA.747T
J.LA.747F
J.LA748CT
J.LA.748CF
J.LA748CN
J.LA748T
J.LA748F
MC1458T
MC1458FE
MC1458N
MC1458N-14
MC1496T
MC1496F
MC1496N
MC1558T
MC1558FE
MC1596T
MC1596F
LM2901F
LM2901N
LM2902F
LM2902N
LM2903FE
LM2903T
LM2903N
LM2903N
LM2904FE
LM2904T
LM2904N
LM2904N
CA3045F
CA3045F
CA3046N
CA3086N
MC3302N
7805CDA
7805CU
7806CDA
7806CU
7808CDA
7808CU
7812CDA
7812CU
7815CDA
7815CU
7818CDA
7818CU
7824CDA
7824CU
7905CU
7905.2CU
7906CU
7908CU
7912CU
7915CU
LM7918T
LM7924T
MC78L02ACG
MC78L02ACP
MC78L05ACG
MC78L05ACP
MC78L05CG
MC78L05CP
MC78L08ACG
MC78L08ACP
MC78L08CG
MC78L08CP
MC78L12ACG
MC78L12ACP
MC78L12CG
MC78L12CP
MC78L15ACG
MC78L15ACP
MC78L15CG
MC78L15CP
MC78L18ACG
MC78L18ACP
MC78L18CG
MC78L18CP
MC78L24ACG
MC78L24ACP
MC78L24CG
MC78L24CP
MC78M05CG
MC78M05CT
MC78M06CG
MC78M06CT
MC78M08CG
MC78M08CT
MC78M12CG
MC78M12CT
MC78M15CG
MC78M15CT
MC78M18CG
MC78M18CT
MC78M20CG
MC78M20CT
MC78M24CG
MC78M24CT
MC1408L6
MC1408L7
MC1408L8
MC1408P6
MC1408P7
MC1408P8
MC141lP
MC1412P
MC1413P
MC1416P
MC1455G
7918CU
7924CU
78L02A.CDB
78L02ACS
78L05ACDB
78L05ACS
78L05CDB
78L05CS
78L08ACDB
78L08ACS
78L08CDB
78L08CS
78L12ACDB
78L12ACS
78L12CDB
78L12CS
78L15ACDB
78L15ACS
78L15CDB
78L15CS
78L18ACDB
78L18ACS
78L18CDB
78L18CS
78L24ACDB
78L24ACS
78L24CDB
78L24CS
78M05CDB
78M05CU
78M06CDB
78M06CU
78M08CDB
78MOBCU
78M12CDB
78M12CU
78M15CDB
78M15CU
78M18CDB
78M18CU
78M20CDB
78M20CU
78M24CDB
78M24CU
MC140B-6F
MC140B-7F
MC140B-8F
MC140B-6N
MC140B-7N
MC140B-8N
ULN2001N
ULN2002N
ULN2003N
ULN2004N
NE555T
811
professional analogue replacement
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacement
MC1455Pl
MC1455U
MC1456CG
MC1456CL
MC1456CPl
MC1456CU
MC1456G
MC1456L
MC1456pl
MC1456U
MC1458CG
MC1458CL
MC1458CPl
MC1458CP2
MC1458CU
MC1458G
MC1458JG
MC1458L
MC1458P
MC1458Pl
MC1458P2
MC1458SG
MC1458SL
MC1458SPl
MC1458SP2
MC1458SU
MC1458U
MC1471pl
MC1472Pl
MC1473Pl
MC1474Pl
MC1488L
MC1489AL
MC1489L
MC1496G
MC1496L
MC1496P
MC1508L8
MC1555G
MC1555U
MC1556G
f-iC1556L
MC1556U
MC1558G
MC1558JG
MC1558L
MC1558SG
MC1558SL
MC1558SU
MC1558U
MC1596G
MC1596L
MC1709AG
MC1709AL
MC1709CG
NE555N
NE555FE
MC14S6T
MC1456F
MC1456N
MC1456FE
MC1456T
MC1456F
MC1456N
MC1456FE
MC1458T
MC1458F
MC1458N
MC1458N-14
MC1458FE
MC1458T
MC1458FE
MC1458F or T
MC1458N
MC1458N
MC1458N-14
NE5535T
NE5535F
NE5535N
NE5535N-14
NE5535FE
MC1458FE
UDN5711N
UDN5712N
UDN5713N
UDN5714N
MC1488F
MC1489AF
MC1489F
MC1496T
MC1496F
MC1496N
MC1508-8F
SE555T
SE555FE
MC1556T
MC1556F
MC1556FE
MC1558T
MC1558FE
MC1558F or T
SE5535T
SE5535F
SE5535FE
MC1558FE
MC1596T
MC1596F
JJ.A709AT
JJ.A709AF
JJ.A709CT
MC1709CL
MC1709CPl
MC1709CP2
MC1709CU
MC1709G
MC1709L
MC1709U
MC1710CG
MC1710CL
MC1710CP
MC1710G
MC1710L
MC1711CG
MC1711CL
MC1711CP
MC1711G
MC1711L
MC1723CG
MCl723CL
MCl723CP
MCl723G
MCl723L
MC1733CG
MC1733CL
MC1733CP
MC1733G
MC1733L
MC1741CG
MC1741CL
MC1741CPl
MC1741CP2
MC1741CU
MC1741G
MC1741L
MC1741SCG
MC1741SCPl
MC1741SCU
MC1741SG
MC1741SU
MC1741U
MC1747CG
MC1747CL
MC1747CP2
MC1747G
MC1747L
MC1748CG
MC1748CPl
MC1748CU
MC1748G
MC1748U
MC3302L
MC3302P
MC3346P
MC3386P
MC3456L
JJ.A709CF
JJ.A709CN
JJ.A709CN14
JJ.A709CFE
JJ.A709T
JJ.A709F
JJ.A709FE
JJ.A71 OCT
JJ.A710CF
JJ.A710CN
JJ.A710T
JJ.A710F
JJ.A711CT
JJ.A711CF
JJ.A711CN
JJ.A711T
JJ.A711F
JJ.A723CT
JJ.A723CF
JJ.A723CN
JJ.A723T
JJ.A723F
JJ.A733CT
JJ.A733CF
JJ.A733CN
JJ.A733T
JJ.A733F
JJ.A741CT
JJ.A741CF
JJ.A741CN
JJ.A741CN-14
JJ.A741CFE
JJ.A741T
JJ.A741F
NE535T
NE535N
NE535FE
SE535T
SE535FE
SE535FE
JJ.A747CT
JJ.A747CF
JJ.A747CN
JJ.A747T
JJ.A747F
JJ.A748CT
JJ.A748CN
JJ.A748CFE
JJ.A748T
JJ.A748FE
MC3302F
MC3302N
CA3046N
CA3086N
NE556F
MC3456P
MC3556L
MC7524L
MC7524P
MC7525L
MC7525P
MC7528L
MC7528P
MC7529L
MC7529P
MC7805CK
MC7805CT
MC7806CK
MC7806CT
MC7808CK
MC7808CT
MC7812CK
MC7812CT
MC7815CK
MC7815CT
MC7818CK
MC7818CT
MC7824CK
MC7824CT
MC7902CK
MC7902CT
MC7905CK
MC7905CT
MC7905.2CK
MC7905.2CT
MC7906CK
MC7906CT
MC7908CK
MC7908CT
MC7912CK
MC7912CT
MC7915CK
MC7915CT
MC7918CK
MC7918CT
MC7924CK
MC7924CT
MC55325L
MC75107L
MC75107P
MC75108L
MC75108P
MC75324L
MC75324P
MC75450L
MC75450P
MC75451P
MC75451U
MC75452P
MC75452U
NE556N
SE556F
7524F
7524N
7525F
7525N
7528F
7528N
7529F
7529N
7805CDA
7805CU
7806CDA
7806CU
7808CDA
7808CU
7812CDA
7812CU
7815CDA
7815CU
7818CDA
7818CU
7824CDA
7824CU
79M02CDA
79M02CU
79M05CDA
79M05CU
7905.2CDA
7905.2CU
7906CDA
7906CU
7908CDA
7908CU
7912CDA
7912CU
7915CDA
7915CU
7918CDA
7918CU
7924CDA
7924CU
55325F
75S107F
75S107N
75S108F
75S108N
75324F
75324N
75450F
75450N
75451N
75451FE
75452N
75452FE
B12
t
r
ype to be
eplaced
MC75453P
MC75453U
Mc75454P
MC75454U
MLMI01AG
MLMI0IAU
MLMI07G
MLMI07U
MLMI08G
MLMI08L
MLMI08AG
MLMI08AL
MLMI09G
MLMI09K
MLMI11G
MLMII1L
MLMlllU
MLM124L
MLM139AL
MLM139L
MLM158G
MLM158U
MLM201AG
MLM201APl
MLM201AU
MLM207G
MLM207U
MLM208AG
MLM208AL
MLM208G
MLM208L
MLM209G
MLM209K
MLM211G
MLM211L
MLM211U
MLM224L
MLM224P
MLM239AL
MLM239AP
MLM239L
MLM239p
MLM258G
MLM258pl
MLM258U
MLM301AG
MLM301APl
MLM301AU
MLM307G
MLM307Pl
MLM307U
MLM308AG
MLM308AL
MLM308G
MLM308L
replacem!,!nt
type to be
r!'!placed
replacement
type to be
replaced
replacement
75453N
75453FE
75454N
75454FE
LMI0IAT
LMI0IAFE
LMI07T
LMI07FE
LMI08T
LMI08F
LMI08AT
LMI08AF
LMI09DB
LMI09DA
LM111 T
LMIIIF
LMIIIFE
LM124F
LM139AF
LM139F
LM158T
LM158FE
LM201AT
LM201AN
LM201AFE
LM207T
LM207FE
LM208AT
LM208AF
LM208T
LM208F
LM209DB
LM209DA
LM211T
LM211F
LM211FE
LM224F
LM224N
LM239AF
LM239AN
LM239F
LM239N
LM258T
LM258N
LM258FE
LM301AT
LM301AN
LM301AFE
LM307T
LM307N
LM307FE
LM308AT
LM308AF
LM308T
LM308F
MLM308pl
MLM309G
MLM309K
MLM311G
MLM311L
MLM311Pl
MLM311U
MLM324L
MLM324P
MLM339AL
MLM339AP
MLM339L
MLM339P
MLM358G
MLM358Pl
MLM358U
MLM565CP
MLM2901P
MLM2902P
fJA7BGUIC
fJA78L02ACLP
fJA78L02CLP
fJA78L05ACLP
fJA78L05AHC
fJ A78L05AWC
fJA78L05CLP
fJA78L06ACLP
fJA78L06AHC
fJA78L06AWC
fJA78L06CLP
fJA78L08ACLP
fJA78L08CLP
fJA78L12ACLP
fJA78L12AHC
fJA78L12AWC
fJA78L12CLP
fJA 7 8L 15ACLP
fJA7BL15AHC
fJA78L15AWC
j.tA78L15CLP
j.tA78L26AWC
j.tA78L82AHC
j.tA78LB2AWC
j.tA7BM05CKC
j.tA78M05CLA
fJA78M05HC
j.tA78M05HM
j.tA78M05MLA
fJA78M05UC
LM308N
LM309DB
LM309DA
LM311T
LM311F
LM311N
LM311FE
LM324F
LM324N
LM339AF
LM339AN
LM339F
LM339N
LM358T
LM358N
LM358FE
NE565CN
LM2901N
LM2902N
78GCUl
78L02ACS
78L02CS
78L05ACS
78L05ACDB
78L05ACS
78L05CS
78L06ACS
78L06ACDB
78L06ACS
78L06cS
78L08ACS
78L08CS
78L12ACS
78L12ACDB
78L12ACS
78L12CS
78L15ACS
7BL15ACDB
78L15ACS
78L15CS
78L02ACS
78L08ACDB
78LOBACS
78M05CU
78M05CDB
78M05CDB
78M05DB
78M05DB
78M05CU
78M06CU
78M06CDB
78M06CDB
78M06DB
78M06DB
78M06CU
~A7BMOBCKC
7BMOSCU
78MOSCDB
78M08CDB
78M08DB
7BMOSDB
78M08CU
78M12CU
7BM12CDB
78M12CDB
78M12DB
78M12DB
78M12CU
7BM15CU
78M15CDB
78M15CDB
78M15DB
78M15DB
78M15CU
78M20CU
78M20CDB
78M20CDB
78M20DB
78M20DB
78M20CU
78M24CU
78M24CDB
78M24CDB
78M24DB
78M24DB
78M24CU
78MGCUl
79GCUl
79M05DB
79M05CDB
79M05CU
79M05CU
79M05CDB
79M05DB
79M06CDB
79M06CU
79M06CU
79M06CDB
79M06DB
79M06DB
79MOSCDB
79MOSCU
79MOSCU
79M08CDB
79M08DB
79MOSDB
79M12CDB
79M12CU
79M12CU
79M12CDB
79M12DB
~A78M06CKC
j.tA7BM06CLA
j.tA78M06HC
fJA78M06HM
j.tA78M06MLA
~A78M06UC
~A7BM08CLA
~A78M08HC
~A78M08HM
~A78MOBMLA
fJA7BMOBUC
fJA7BM12CKC
fJA7BM12CLA
fJA78M12HC
fJA78M12HM
fJA78M12MLA
fJA78M12UC
~A7BM15CKC
fJA7BM15CLA
~A7BM15HC
fJA78M15HM
~A7BM15MLA
~A7BM15UC
~A7BM20CKC
fJA7BM20CLA
fJA7820HC
fJA7BM20HM
~A78M20MLA
fJA78M20UC
fJA78M24CKC
fJA7BM24CLA
fJA78M24HC
fJA7BM24HM
fJA78M24MLA
fJA78M24UC
fJA78MGUIC
fJA79GUIC
fJA79M05
fJA79M05AHC
fJA79M05AUC
fJA79M05CKC
fJA79M05CLA
fJA79M05HM
fJA79M06AHC
j.tA79M06AUC
fJA79M06CKC
j.tA79M06CLA
fJA79M06HM
fJA79M06LA
~A79MOBAHC
j.tA79M08AUC
j.tA79M08CKC
fJA79M08CLA
fJA79M08HM
~A79M08LA
fJA79M12AHC
fJA79M12AUC
fJA79M12CKC
fJA79M12CLA
fJA79M12HM
813
professional analogue replacement
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacemen t
IlA79M12LA
IlA79M15AHC
ILA79M15AUC
/JA79M15CKC
/JA79M15CLA
/JA79M15HM
ILA79M15LA
79M12DB
79M15CDB
79M15CU
79M15CU
79M15CDB
79M15DB
79M15DB
79M1SCDB
79M1SCU
79M1SDB
79M20CU
79M20CDB
79M20DB
79M24CDB
79M24CU
79M24CU
79M24CDB
79M24DB
79M24DB
79MGCUl
LMI01AF
LM101AT
LMI01F
LMIOIT
LMI07T
LM10SAF
LMIOSAT
LMIOSF
LMIOST
LMI09DA
LMlllT
LM124F
LM124AF
LM124F
LM201AF
LM201AT
LM201F
LM201T
LM207T
LM20SAF
LM20SAT
LM20SF
LM20ST
LM209DA
LM224F
LM301AF
LM301AT
LM301AN
LM307T
LM307N
LM30SAF
LM30SAT
LM30SF
LM30ST
LM30SN
IlA311HC
/JA311TC
/JA324DC
/JA324PC
/JA339ADC
/JA339DC
/JA339PC
/JA555HC
/JA555HM
/JA555TC
/JA556DC
/JA556DM
/JA556PC
IlA709
IlA709ADM
p.A709AHM
/JA709AJ
IlA709AJG
p.A709AL
p.A709Cl
/JA709C2
/JA709CJ
/JA709CJG
p.A709CL
IlA709CN
/JA709CP
IlA709DC
/JA709DM
/JA709HC
p.A709HM
p.A709MJ
/JA709MJG
p.A709ML
IlA709PC
/JA709TC
/JA710
/JA710Cl
/JA710C2
/JA710CJ
p.A710CJG
/JA710CL
/JA710CN
p.A710CP
/JA710DC
/JA710DM
/JA710HC
/JA71 OHM
/JA710MJ
/JA710MJG
/JA710ML
/JA710PC
p.A711
/JA711Cl
/JA711C2
/J A711CJ
LM311T
LM311N
LM324F
LM324N
LM339AF
LM339F
LM339N
NE555T
SE555T
NE555N
NE556F
SE556F
NE556N
/JA709T
/JA709AF
/JA709AT
/JA709AF
/JA709AFE
/JA709AT
/JA709CT
/JA709CN
/JA709CF
P.A709CFE
/JA709CT
/JA709CN-14
/JA709CN
/JA709CF
/JA709F
p.A709CT
/JA709T
/JA709F
/JA709FE
/J.A709T
/JA709CN-14
/JA709CN
/JA710T
/JA71 OCT
/JA710CN
/JA710CF
/JA710CFE
/JA71 OCT
/JA710CN-14
/JA710CN
/JA710CF
/JA710F
/JA71 OCT
/JA710T
/JA71 OF
p.A710FE
/JA710T
/JA710CN-14
/JA711K
/JA711CK
pA711CN
A711 C F
IlA711CL
/JA711CN
ILA711DC
/JA711DM
/JA711MJ
/JA711ML
/JA711PC
/JA723CJ
/J.A723CL
/JA723CN
/JA723DC
/JA723DM
/JA723HC
/JA723HM
/JA723MJ
IlA723ML
IlA723PC
P.A733CJ
/JA733CL
/JA733CN
/JA733DC
/JA733DM
p.A733HC
/JA733HM
/JA733MJ
/JA733ML
/JA740HC
/JA741CJ
/JA741CJG
/JA741CL
p.A741CN
/JA741CP
/JA741DC
/JA741DM
/JA741HC
/JA741HM
/JA741MJ
/JA741MJG
/JA741ML
p.A741PC
/JA741TC
/JA747CJ
/JA747CL
/JA747CN
/JA747DC
p.A747DM
/JA747HC
/JA747HM
/JA747MJ
/JA747ML
/JA747PC
/JA74SCJ
/JA74SCJG
pA74SCL
/J A74 SCN
/JA711CT
/JA711CN
/JA711CF
/JA711F
/JA711F
/JA711T
/JA711CN
/JA723CF
/JA723CT
/JA723CN
/JA723CF
/JA723F
/JA723CT
/JA723T
/JA723F
/JA723T
/JA723CN
/JA733CF
/JA733CT
/JA733CN
/JA733CF
/JA733F
P.A733CT
/JA733T
/JA733F
/JA733T
/JA740CT
p.A741CF
/JA741CFE
/JA741CT
/JA741CN-14
/JA741CN
/JA741CF
/JA741F
/JA741C;:T
/JA741T
/JA741F
/JA741FE
p.A741T
/JA741CN-14
/JA741CN
/JA747CF
p.A747CT
/JA747CN
/JA747CF
/JA747F
/JA747CT
/JA747T
/JA747F
/JA747T
/JA747CN
/JA74SCF
/JA74SCFE
pA74SCT
A74SCN-14
~A79M1SAHC
ILA79M1SAUC
ILA79M1SHM
IlA79M20CKC
IlA79M20CLA
ILA79M20LA
IlA79M24AHC
ILA79M24AUC
ILA79M24CKC
ILA79M24CLA
IlA79M24HM
ILA79M24LA
ji,A79MGUIC
IlAl01ADM
/JA101AHM
IlAI01DM
IlAIOIHM
ILA107HM
/JAIOSADM
/JAIOSAHM
/JAI0SDM
/JAI0SHM
p.AI09KM
/JA111HM
/JA124DM
/JA139ADM
/JA1 39DM
/JA201AHD
p.A201AHM
/JA201DM
/JA201HM
/JA207HM
p.A20SADM
/JA20SAHM
/JA20SDM
/JA20SHM
/JA209KM
p.A224DM
/JA301ADC
/JA301AHC
/JA301ANC
/JA307HC
/JA307TC
/JA30SADC
/JA30SAHC
/JA30SDC
/JA30SHC
/JA3 0 STC
B14
t ype to be
replacement
type to be
replaced
replacement
type to be
replaced
replacement
J,lA748CN
J,lA748CF
J,lA748F
,uA748CT
J,lA748T
J,lA748F
,uA748FE
J,lA748T
,uA748CN
MC1496T
MC1408-8F
MC1408-7F
MC1408-6F
MC1508-8F
MC1408-8N
MC1408-7N
MC1408-6N
MC1458T
MC1458N
MC1558T
LM2901N
LM2902N
CA3045F
CA3046N
CA3086N
7805CDA
7805CU
7805CDA
7805DA
7B05DA
7805CU
7B06CDA
7806CU
7806CDA
7806DA
7806DA
7806CU
7808CDA
7808CU
7808CDA
7808DA
7808DA
7808CU
7812CDA
7812CU
7812CDA
7812DA
7812DA
7812CU
7815CDA
7815CU
7815CDA
7815DA
7815DA
7815CU
J,lA7818CKA
J,lA7818CKC
J,lA7818KC
,uA7818KM
,uA7818MKA
,uA7818UC
,uA7824CKA
J,lA7824CKC
J,lA7824KC
,uA7824KM
,uA7824MKA
,uA7824UC
,uA7905CKA
,uA7905CKC
J,lA7905KA
J,lA7905KC
,uA7905KM
,uA7905UC
J,lA7906CKA
,uA7906CKC
,uA7906KA
,uA7906KC
p.A7906KM
,uA7906UC
,uA7908CKA
p,A7908CKC
p,A7908KA
p,A7908KC
p,A790BKM
P.A7908UC
p.A7912CKA
p.A7912CKC
J,lA7912KA
p.A7912KC
p.A7912KM
,uA7912UC
/JA7915CKA
p.A7915CKC
/JA7915KA
/JA7915KC
p.A7915KM
/JA7915UC
p.A7918CKA
/JA7918CKC
p.A7918KA
p.A7918KC
p.A7918KM
p.A7918UC
p.A7924CKA
p.A7924CKC
p.A7924KA
/JA7924KC
p.A7924KM
p.A7924UC
P.AF155AHM
7818CDA
7818CU
7818CDA
7818DA
7818DA
7818CU
7824CDA
7824CU
7824CDA
7824DA
7824DA
7824CU
7905CDA
7905CU
7905DA
7905CDA
7905DA
7905CU
7906CDA
7906CU
7906DA
7905CDA
7905DA
7905CU
7908CDA
7908CU
7908DA
7908CDA
790BDA
7908CU
7912CDA
7912CU
7912DA
7912CDA
7912DA
7912CU
7915CDA
7915CU
7915DA
7915CDA
7915DA
7915CU
7918CDA
7918CU
7918DA
7918CDA
7918DA
7918CU
7924CDA
7924CU
7924DA
7924CDA
7924DA
7924CU
LF155AT
J,lAF155HM
J,lAF156AHM
,uAF156HM
J,lAF157AHM
J,lAF157HM
,uAF355AHC
,uAF355HC
,uAI:'356AHC
,uAF356HC
,uAF357AHC
,uAF357HC
NE555JG
NE555L
NE555P
NE592G
NE592L
RC709D
RC709DN
RC709DP
RC709T
RC710DC
RC710DP
RC710T
RC711DC
RC711DP
RC711T
RC723D
Rc723T
RC733D
RC733T
RC741D
RC741DN
RC741DP
RC741T
RC747D
RC747T
RC748T
RC1458DN
RC1458T
RC1488DC
RC1489ADC
RC1489DC
RC1556T
SE555JG
SE555L
SE592G
SE592L
SFC2101A
SFC2107M
SFC2111M
SFC2201A
SFC2207
SFC2208
SFC2211
SFC2301A
LF155T
LF156AT
LF156T
LF157AT
LF157T
LF355AT
LF355T
LF356AT
LF356T
LF357AT
LF357T
NE555FE
NE555T
NE555N
NE592T
NE592F
p.A709CF
,uA709CN
p.A709CN-14
p.A709CT
p.A710CF
P.A710CN
P.A710CT
p.A711CF
p,A711CN
p.A711CT
p.A723CF
P.A723CT
p.A 733CF
p,A 733CT
p.A741CF
P.A741CN
p.A741CN-14
P.A741CT
p.A747CF
p,A747CT
p.A748CT
MC1458N
MC1458T
MC1488F
MC1489AF
MC1489F
MC1456T
SE555FE
SE555T
SE592T
SE592F
LMI01AT
LMI07T
LMll1T
LM201AT
LM207T
LM208T
LM211T
LM301AT
r eplaced
J,lA748CP
J,l A748DC
P.A748DM
/JA748HC
J,l A748HM
/J A748MJ
p. A748MJG
P. A748ML
/JA748TC
p. A796HC
p. A0802DC-l
,uA0802DC-2
A0802DC-3'
,uA0802DM-l
J,lA0802PC-l
,uA0802PC-2
A0802PC-3
,uA1458HC
,uA1458TC
,uA1558HM
p.A2901PC
p.A2902PC
p.A3045DM
p.A3046TC
p.A3086TC
p.A7805CKA
p,A7805CKC
p.A7805KC
p,A7805KM
p,A7805MKA
p.A7805UC
p.A7806CKA
p.A7806CKC
p.A7806KC
p.A7806KM
/JA7~06MKA
P.A7806UC
/JA7808CKA
p,A7808CKC
p,A7808KC
P.A7808KM
p,A7808MKA
p,A7808UC
p,A7812CKA
p,A7812CKC
p.A7812KC
p.A7812KM
p..A7812MKA
.A7812UC
p.A7815CKA
p.A7815CKC
p.A7815KC
p.A7815KM
/JA7815MKA
P.A7815UC
B15
professional analogue replacement
type to be
replaced
replacement
type to be
replaced
SFC2301ADC
SFC2307
SFC2308
SFC2309
SFC2311
SFC2709C
SFC2709EC
SFC2709EM
SFC2709M
SFc2710C
SFC2710EC
SFC2710EM
SFC2710M
SFC2711C
SFC2711EC
SFC2711EM
SFC2711M
SFC2741C
SFC2741DC
SFC2741EC
SFC2741EM
SFC2741M
SFC2748C
SFC2748DC
SN7520J
SN7520N
SN7521J
SN7521N
SN7522J
SN7522N
SN7523J
SN7523N
SN7524J
SN7524N
SN7525J
SN7525N
SN7528J
SN7528N
SN52101AJ
SN52101AL
SN52107J
SN52107L
SN52108AJ
SN52108AL
SN52108J
SN52108L
SN52109LA
SN52111J
SN52111 T
SN52555L
SN52558L
SN52709AJ
SN52709AL
SN52709J
SN52709L
LM301AN
LM307T
LM308T
LM309DA
LM311T
SN52710J
SN52710L
SN52711J
SN52711L
SN52723J
SN52723L
SN52733J
SN52733L
SN52741J
SN52741L
SN52747J
SN52747L
SN52748J
SN52748L
SN52771J
SN52771L
SN55182J
SN55182N
SN55183J
SN55183N
SN55325J
SN55450BJ
SN55450BN
SN55451BJG
SN55451BL
SN55452BJG
SN55452BL
SN55453BJG
SN55453BL
SN55454BJG
SN55454BL
SN72301AJ
SN72301AL
SN72301AN
SN72301AP
SN72307J
SN72307L
SN72307N
SN72307P
SN72308AJ
SN72308AL
SN72308AP
SN72308J
SN72308L
SN72308P
SN72309LA
SN72311J
SN72311L
SN72311N
SN72311P
SN72555L
SN72555P
SN72558L
SN72558P
SN72709J
816
~A709CT
~A709CN
~A709N
~A709T
~A710CT
~A71OCN
~A710N
~A710T
~A711CK
~A711CN
~A711N
~A711K
~A741CT
~A741CV
~A741CN
~A741N
~A741T
~A748CT
~A748CV
7520F
7520N
7521F
7521N
7522F
7522N
7523F
7523N
7524F
7524N
7525F
7525N
7528F
7528N
LM101AF
LM101AT
LM107F
LM107T
LM108AF
LM108AT
LM108F
LM108T
LM109DB
LMll1F
LMll1T
SE555T
MC1558T
~A709AF
~A709AT
~A709F
IlA709T
replacement
type to be
replaced
replacement
~A710F
SN72709L
SN72709N
SN72709P
SN72710J
SN72710L
SN72710N
SN72710P
SN72711J
SN72711L
SN72711N
SN72723J
SN72723L
SN72723N
SN72733J
SN72733L
SN72733N
SN72741J
SN72741L
SN72741N
SN72741P
SN72747J
SN72747L
SN72747N
SN72748J
SN72748L
SN72748N
SN72748P
SN72771J
SN72771N
SN72771T
SN75107AT
SN75107AN
SN75108AT
SN75108AN
SN75182J
SN75182N
SN75183J
SN75183N
SN75188J
SN75188N
SN75189AT
SN75189AN
SN75189J
SN75189N
SN75207J
SN75207N
SN75208J
SN75208N
SN75324J
SN75324N
SN75450BJ
SN75451BJG
SN75451BL
SN75450BN
SN75451BP
~A709CT
~A710T
~A711F
~A711T
~A723F
~A723T
~A733F
~A733T
~A741F
~A741T
~A747F
~A747T
~A748F
~A748T
MC1556F
MC1556T
DS7820F
DS7820N
DS7830F
DS7830N
55325F
55450BF
55450BN
55451BFE
55451BT
55452BFE
55452BT
55453BFE
55453BT
55454BFE
554.34BT
LM301AF
LM301AT
LM301AN-14
LM301AN
LM307F
LM307T
LM307N-14
LM307N
LM308AF
LM308AT
LM308AN
LM308F
LM308T
LM308N
LM309DB
LM311F
LM311T
LM311N-14
LM311N
NE555T
NE555N
MC1458T
MC1458N
A709CF
~A709CN-14
~A709CN
~A710CF
~A710CT
~A710CN-14
~A710CN
~A711CF
~A711CT
~A711CN
~A723CF
~A723CT
~A723CN
~A733CF
~A733CT
~A733CN
~A741CF
~A741CT
~A741CN-14
~A741CN
~A747CF
~A747CT
~A747CN
~A748CF
~A748CT
~A748CN-14
~A748CN
MC1456F
MC1456N
MC1456T
75S107F
75S107N
75S108F
75S108N
DS8820F
DS8820N
DS8830F
DS8830N
MC1488F
MC1488N
MC1489AF
MC1489AN
MC1489F
MC1489N
75S207F
75S207N
75S208F
75S208N
75324F
75324N
75450BF
75452BFE
75451BT
75450BN
75451BN
type to be
replaced
replacement
type to be
replaced
replacement
type to be
replaced
replacement
SN75452BJG
SN75452BL
SN75452BP
SN75453BJG
SN75453BL
SN75453BP
SN75454JG
SN75454L
SN75454P
SN75466J
SN75466N
SN75467J
SN75467N
SN75468J
SN75468N
SN75469J
SN75469N
TBB0747
TBB0748
TBB0748B
TBB1458
TBB1458B
TBC0747
TBC1458
TDB0555
TDB0555B
TDB0556A
TDB0723
TDB0723A
TDB7805
TDB7805T
TDB7806
TDB7806T
TDB7808
TDB7808T
TDB7812
TDB7812T
TDB7815
TDB7815T
TDB7818
TDB7818T
TDB7824
TDB7824T
TDC0555
TDC0723
TL430JG
TL430LP
UDN5711M
UDN5712M
UDN5713M
UDN5714M
ULN2001A
ULN2002A
ULN2003A
ULN2004A
75452BFE
75452BT
75452BN
75453BFE
75453BT
75453BN
75454FE
75454T
75454N
NE5501F
NE5501N
NE5502F
NE5502N
NE5503F
NE5503N
NE5504F
NE5504N
IJ.A747CK
IJ.A748CT
IJ.A748CN
MC1458T
MC1458N
IJ.A747K
MC1558T
NE555T
NE555N
NE556N
IJ.A723CK
IJ.A723CN
7805CDN
7805CU
7806CDA
7806CU
7808CDA
7808CU
7812CDA
7812CU
7815CDA
7815CU
7818CDA
7818CU
7824CDA
7824CU
SE555T
IJ.A723K
TL430FE
TL430S
UDN5711N
UDN5712N
UDN5713N
UDN5714N
ULN2001N
ULN2002N
ULN2003N
ULN2004N
556CJ
709AE
709AL
709BE
709BL
709CE
709CJ
709CL
710BE
710BL
710CE
710CL
711BE
711BL
711CE
711CJ
711CL
723BE
723CE
723CT
723CL
733BE
733CE
733CJ
741BE
741BL
741CE
741CJ
741CP
747BE
747BL
747CE
747CJ
747CL
748BE
748BL
748CE
748CL
748CP
1458CE
1458CP
1458E
1458P
1558E
2740CE
7524DC
7524PC
7525DC
7525PC
7528DC
7528PC
9665DC
9665PC
9666DC
9666PC
NE556CN
IJ.A709AT
IJ.A709AF
IJ.A709T
IJ.A709F
IJ.A709CT
IJ.A709CN-14
IJ.A709CF
IJ.A710T
IJ.A71 OF
IJ.A71 OCT
IJ.A710CF
IJ.A711 T
IJ.A711F
IJ.A711CT
IJ.A711CN
IJ.A711CF
IJ.A723T
IJ.A723CT
IJ.A723CN
IJ.A723CF
IJ.A733T
IJ.A733CT
IJ.A733CN
IJ.A741T
IJ.A741F
IJ.A741CT
IJ.A741CN-14
IJ.A741CN
IJ.A747T
IJ.A747F
IJ.A747CT
IJ.A747CN
IJ.A747CF
IJ.A748T
IJ.A748F
IJ.A748CT
IJ.A748CF
IJ.A748CN-14
MC1458T
MC1458N
MC1458T
MC1458N
MC1558T
IJ.A740CT
7524F
7524N
7525F
7525N
7528F
7528N
ULN2001F
ULN2001N
ULN2002F
ULN2002N
9667DC
9667PC
55325DM
55450BDM
55451BHM
55451BRM
55452BHM
55452BRM
55453BHM
55453BRM
55454BHM
55454BRM
75107ADC
75107APC
75108ADC
75108APC
75207DM
75207PC
75208DM
75208PC
75325DC
75325PC
75450BDC
75450BPC
75451BDC
75451BHC
75451BRC
75451BTC
75452BHC
75452BRC
75452BTC
75453BHC
75453BRC
75453BTC
75454BHC
75454BRC
75454BTC
ULN2003F
ULN2003N
55325F
55450BF
55451BT
55451BFE
55452BT
55452BFE
55453BT
55453BFE
55454BT
55454BFE
75S107F
75S107N
75S108F
75S108N
75S207F
75S207N
75S208F
75S208N
75325F
75325N
75450BF
75450BN
75451BF
75451BT
75451BFE
75451BN
75452BT
75452BFE
75452BN
75453BT
75453BFE
75453BN
75454BT
75454BFE
75454BN
B17
operational amplifiers
selection guide
Single op amps
typ
slew rate
typical common mode
volt. range
rej. ratio
V/mV
typ BW
AV= 1
MHz
V/!1s
dB
V
25
25
15
2,5
2,5
2,5
5,0
5,0
5,0
100
100
100
± 12
± 12
± 12
50
5,0
8,0
25
25
15
5,0
5,0
5,0
12,0
12,0
12,0
100
100
100
± 12
± 12
± 12
20
1,0
2,0
50
5,0
8,0
25
25
15
20
20
20
50,0
50,0
50,0
100
100
100
± 12
± 12
± 1-2
5,0
5,0
10
1,0
25
5,0
25
15
2,5
2,5
5,0
5,0
100
100
± 12
± 12
2,50
2,30
5,0
5,0
10
1,0
25
5,0
25
15
5,0
5,0
12,0
12,0
100
100
± 12
military
commercial
2,50
2,30
5,0
5,0
10,0
1,0
25
5,0
25
15
20
20
50,0
50,0
100
100
± 12
± 12
LM10l
LM201
military
industrial
6,00
10,0
3,0.
6,0.
500
750
1500
2000
25
15
1,0
1,0
0,5
0,5
90
90
± 12
LM101A
LM201A
LM301A
military
industrial
commercial
3,00
3,00
10,0
15
15
30
20
20
70
100
100
300
25
25
15
1,0
1,0
1,0
0,5
0,5
0,5
96
96
90
± 15
LM107
LM207
LM307
military
industrial
commercial
3,00
3,00
10,0
15
15
30
20
20
70
100
100
300
25
25
15
1,0
1,0
1,0
0,5
0,5
0,5
96
96
90
± 15
± 15
± 12
LM108
LM208
LM308
military
industrial
commercial
3,00
3,00
10,0
15
15
30
0,4
3,0
3,0
10,0
25
25
15
1,0
1,0
1,0
0,3
0,3
0,3
100
100
100
± 13,5
± 13,5
± 14
LM108A
LM208A
LM308A
military
industrial
commercial
1,00
1,00
0,75
5,0
5,0
5,0
0,4
40
40
60
1,0
1,0
1,0
0,3
0,3
0,3
110
110
1,5
3,0
3,0
10,0
110
± 13,5
± 13,5
± 14
MC1456
MC1556
commercial
military
14,0
6,00
14,0
5,0
40
30
40
40
1,0
1,0
2,5
2,5
110
110
± 12
± 13
NE530
SE530
commercial
military
6,00
3,00
80
20
200
100
15
25
3,0
3,0
35
35
90
90
± 13
± 13
NE531
SE531
commercial
military
7,50
6,00
300
500
2000
1500
15
25
1,0
1,0
35
35
90
90
± 11
± 11
NE535
SE535
commercial
military
6,00
3,00
80
20
200
100
15
25
1,0
15
15
90
90
± 13
max input current min
offset
bias
AVOL
device
no.
temp.
range
max input voltage
offset
drift
mV
!1V/oC
nA
nA
LF155
LF255
LF355
military
industrial
commercial
7,00
6,50
13,0
5,0.
5,0.
5,0.
20
1,0
2,0
50
5,0
8,0
LF156
LF256
LF356
military
industrial
commercial
7,00
6,50
13,0
5,0.
5,0.
5,0.
20
1,0
2,0
LF157
LF257
LF357
military
industrial
commercial
7,00
6,50
13,0
5,0.
5,0.
5,0.
LF155A
LF355A
military
commercial
2,50
2,30
LF156A
LF356A
military
commercial
LF157A
LF357A
B18
6,0.
15
6,0.
15
0,4
1,5
0,4
1,0
±12
±12
±15
± 12
±13
Specifications guaranteed over full
temperature range unless otherwise
indicated by following marks:
• typical over full temperature range
•
guaranteed at 25 °C
• typical at 25
packages
± 12
± 12
±12
yes
yes
yes
T
T
T
826
7,0
7,0
10,0
±12
±12
± 12
yes
yes
yes
T
T
T
826
± 22
± 22
± 18
7,0
7,0
10,0
±12
± 12
± 12
yes
yes
yes
T
T
T
826
±3
±3
± 22
± 18
4,0
4,0
± 12
± 12
yes
yes
T
T
826
±3
±3
± 22
7,0
10,0
±12
±12
yes
yes
T
T
827
typ
PS R R
dB
supply voltage
typ min
max
V
V
± 40
100
100
100
±3
±3
±3
± 22
± 22
± 18
4,0
4,0
4,0
± 30
100
100
100
±3
±3
±3
± 22
± 22
± 18
± 40
± 40
± 30
100
100
100
±3
±3
±3
± 40
± 30
100
100
± 40
± 30
100
100
± 40
± 40
page
no.
internal
compensation
output
current
mA
max supply min output
volt. swing
current
mA
V
diff. input
voltage
V
± 40
± 30
°c
± 18
7,0
10,0
±12
±12
yes
yes
T
5,0
5,0
2,5
3,0·
± 12
± 12
no
no
F,FE,N,N-14,T
F,FE,N,N-14,T
828
± 22
± 22
± 18
7,5
5,0
5,0
2,5
2,5
3,0·
± 12
±12
± 12
no
no
no
F ,FE,N,N-14,T
F ,FE,N,N-14,T
F,FE,N,N-14,T
829
± 22
± 22
2,5
2,5
3.0·
± 12
± 12
± 12
yes
yes
yes
F,FE,N,T
F,FE,N,T
F,FE,N,T
829
± 18
7,5
5,0
5,0
±2
±2
±2
± 20
± 20
± 18
1,0
1,0
1,0
0,4
0,4
0,8·
± 13
± 13
±13
no
no
no
F,FE,N,T
F,FE,N,T
F,FE,N,T
830
110
110
110
±2
±2
±2
± 20
± 20
± 18
1,0
1,0
1,0
0,4
0,4
0,8·
± 13
± 13
± 13
no
no
no
F,FE,T
F,FE,T
F,FE,N,T
830
± 18
± 22
86
86
±3
±3
± 18
± 22
20
20
3,0·
1,5·
± 11
±12
yes
yes
F,N,T
F,N,T
834
± 30
± 30
110
110
±3
±3
± 18
± 22
5,0
5,0
3,0
3,0
± 12
± 12
yes
yes
FE,N,T
FE,N,T
835
± 15
±15
100
100
±5
±5
± 22
± 22
5,0
5,0
10'"
7,0·
± 10
± 10
no
no
T
± 30
± 30
110
110
±3
±3
± 18
± 22
5,0
5,0
3,0
3,0
±12
± 12
yes
yes
FE,N,T
FE,N,T
± 40
± 30
100
100
±3
±3
± 22
± 18
± 30
± 30
90
90
±3
±3
± 22
± 22
± 30
± 30
± 30
96
96
96
±3
±3
±3
± 30
± 30
± 30
96
96
96
±3
±3
±3
96
96
96
T
N,T
827
836
837
B19
operational amplifiers
selection guide
For low noise specifications of very low noise op amps
N E/SE5534 and TDA 1034 see page B41.
Single op amps
device
no.
temp.
range
max input voltage
offset
drift
p.V/oC
mV
NE536
SU536
commercial
military
30·
30
NE538
SE538
commercial
military
6,0
3,0
NE5534
SE5534
commercial
military
5,0
3,0
TDA1034
.industrial
5,0
p.A709
p.A709A
IlA709C
military
military
commercial
6,0
3,0
10,0
6,0.
25
12,0.
12,0.
max input current min
offset
bias
AVOL
nA
nA
V/mV
typ BW
AV = 1
MHz
typ
slew rate
V/p.s
typical common mode
rej. ratio
voh. range
dB
V
30.
20·
5 pA5 pA-
0,1·
3,0
25
50
1,0
1,0
6,0
6,0
80
80
± 11
± 11
6,0.
15
80
20
200
100
25
25
6,0
6,0
60
60
90
90
± 13
± 13
400
500
2000
1500
15
25
10
10
13
13
100
100
±13
± 13
500
2000
15
10
13
100
± 13
500
250
750
1500
600
1500
25
25
12
1,0
1,0
1,0
0,3
0,3
0,3
90
110
90
± 10
± 10
± 10
± 10
SA709C
ext. indo
10,0
750
1500
12
1,0
0,3
90
IlA740C
commercial
30.
0,06.
10,0
500.
1,0
6,0
80
± 12
p.A741
IlA741C
military
commercial
6,0
7,5
500
300
1500
800
25
15
1,0
1,0
0,5
0,5
90
90
± 13
± 13
SA741C
ext. indo
6,0
500
1500
15
1,0
0,5
90
± 13
IlA748
IlA748C
military
commercial
6,0
7,5
500
300
1500
800
25
25
1,0
1,0
0,5
0,5
90
90
± 13
± 13
500
1500
25
1,0
0,5
90
± 13
30·
100·
1,0·
0,3·
100·
± 11·
SA748C
ext. indo
7,5
TCA520
commercial
6,0·
TDA0301
commercial
5,0.
TDA0741
commercial
7,5
300
800
15
1,0
0,5
90
± 13
TDA0748
commercial
6·
200·
500·
15
1,0
0,5
90
± 13
TDA1078
NE5539
commercial
5,0·
2,0
800 -
85 -
820
Specifications guaranteed over full
temperature range unless otherwise
indicated by following marks:
•
typical over full temperature range
... guaranteed at 25 °C
•
diff. input
voltage
V
± 30
± 30
typ
PSRR
dB
supply voltage
max
tYP min
V
V
output
current
mA
max supply min output
current
volt. swing
mA
V
80
86
±6
±6
± 20
± 18
5,0
5,0
8,0'"
5,5 ...
± 30
± 30
110
110
±3
±3
±18
± 22
5,0
5,0
± 30
± 30
100
100
±3
±3
± 20
± 20
typical at 25
°c
internal
compensation
packages
± 12
± 12
yes
yes
T
T
837
3,0
3,0
±12
± 12
yes
yes
FE,N,T
FE,N,T
837
10
10
8,0
6,5
± 12
±12
yes
yes
FE,N,T
FE,N,T
841
page
no.
± 30
100
±3
± 20
10
8,0
± 12
yes
FE,N,T
841
±5
±5
±5
92
92
92
±9
±9
±9
± 18
± 18
± 18
5,0
5,0
5,0
5,5 ...
5,5 ...
6,6 ...
± 12
±12
±12
no
no
no
F,N,N-14,T
F,N,N-14,T
F,N,N-14,T
832
±5
92
±9
± 18
5,0
6,6'"
±12
no
F,FE,N,N-14
832
± 30
80
±5
± 22
5,0
8,0'"
± 12
yes
T
832
± 30
± 30
100
100
±3
±3
± 22
±18
5,0
5,0
2,5
2,8'"
± 12
± 12
yes
yes
F,FE,N,N-14,T
F,FE,N,N-14,T
833
± 30
100
±3
± 18
5,0
2,8'"
±12
yes
F,FE,N,N-14,T
833
± 30
± 30
90
90
±3
±3
± 22
± 18
5,0
5,0
2,8
2,8
± 12
± 12
no
no
F ,FE,N,N-14,T
F,FE,N,N-14,T
834
'± 30
90
±3
± 18
5,0
2,8
± 12
no
F,FE,N,N-14,T
834
2
22
12,0'"
1,5.
FE, N, SO-8
839
SO-8
840
±6'"
no
± 30
100
±3
± 18
5,0
2,8 ...
± 12
yes
SO-8
840
± 30
100
±3
± 18
5,0
2,8 ...
±12
yes
SO-8
841
±8
±12
4O·
15·
no
N-14
842
821
operational amplifiers
selection guide
For low noise specifications of very low noise op amps
NE/SE5533 see page 838.
Dual op amps
device
no.
temp.
range
max input voltage
offset
drift
max input current min
offset
bias
AVOL
mV
pV/oC
nA
nA
LH2101A
LH2201A
LH2301A
military
industrial
commercial
3,0
3,0
10,0
15
15
30
20
20
70
100
100
300
LH2108
LH2208
LH2308
military
industrial
commercial
3,0
3,0
10,0
15
15
30
0,4
0,4
LH2108A
LH2208A
LH2308A
military
industrial
commercial
1,0
1,0
0,75
5,0
5,0
5,0
LM158
LM258
LM358
military
industrial
commercial
7,0
9,0
9,0
LM158A
LM258A
LM358A
military
industrial
commercial
4,0
4,0
5,0
MC1458
MC1558
SA1458
commercial
military
ext. indo
7,5
6,0
7,5
NE532
SA532
SE532
commercial
ext. indo
military
7,5
7,5
7,0
NE532A
SE532A
commercial
military
NE5530
SE5530
typ BW
typ
slew rate
V/mV
AV = 1
MHz
Vips
typical common mode
volt. range
rej. ratio
dB
V
25
25
15
1,0
1,0
1,0
0,5
0,5
0,5
96
96
90
± 15
± 15
± 12
25
25
15
1,0
1,0
1,0
0,3
0,3
0,3
100
100
100
± 13,5
± 13,5
1,5
3,0
3,0
10,0
0,4
0,4
1,5
3,0
3,0
10,0
40
40
60
1,0
1,0
1,0
0,3
0,3
0,3
110
110
110
± 13,5
± 13,5
± 14
7,0.
7,0.
7,0.
100
150
150
300
25
25
15
1,9
1,0
1,0
85
85
85
V s -1,5
500
500
15,0
15,0
20,0
30
30
75
100
100
200
25
25
15
1,0
1,0
1,0
85
85
85
Vs -l,5
V s -l,5
V s -l,5
300
500
500
800
1500
1500
15
25
15
1,0
1,0
1,0
90
90
90
± 13
± 13
7,0.
7,5.
7,0.
150
150
100
500
500
300
15
15
25
1,0
1,0
1,0
85
85
85
V s -l,5
5,0
4,0
20
15
75
30
200
100
15
25
1,0
1,0
85
85
V s -l,5
Vs-l,5
commercial
military
6,0
6,0.
15
80
20
200
100
15
25
3,0
3,0
35
35
90
90
± 13
NE5533
SE5533
commercial
military
5,0
400
500
2000
1500
15
25
10
10
13
13
100
100
± 13
± 13
NE5535
SE5535
commercial
military
6,0
6,0.
15
80
20
200
100
15
25
1,0
1,0
15
15
90
90
± 13
± 13
NE5538
SE5538
commercial
military
6,0
6,0.
15
80
20
200
100
25
25
6,0
6,0
60
60
90
90
± 13
pA747
pA747C
military
commercial
6,0
7,5
500
300
1500
800
25
15
1,0
1,0
0,5
0,5
90
90
± 13
± 13
500
1500
15
1,0
0,5
90
± 13
75
200
15
1,0
85
300
800
15
1,0
V s -1,5
± 13
3,0
3,0
3.0
3,0
SA747C
ext.ind.
7,5
TDA0358
commercial
5,0
TDA 1458
commercial
7,5
B22
20
0,8
0,5
0,5
0,5
90
± 14
Vs -1,5
V s -1,5
± 13
V s -l,5
V s -l,5
± 13
± 13
Specifications guaranteed over full
temperature range un~ss otherwise
indicated by following marks:
• typical over full temperature range
• guaranteed at 25°C
• typical at 25 °c
diff. input
voltage
typ
PSRR
supply voltage
typ min
max
output
current
rnA
max supply min output
current
volt. swing
rnA
V
internal
compensation
packages
7,5
5,0
5,0
2,5
2,5
3,0·
± 12
0,4
0,4
0,8·
page
no.
no
no
no
F
±12
±12
± 13
± 13
± 13
no
no
no
F
F
no
no
no
F
F
F
828
V
dB
V
V
± 30
± 30
± 30
96
96
96
±3
±3
±3
± 22
± 22
96
96
96
±2
±2
±2
± 18
1,0
1,0
1,0
110
±2
±2
±2
± 20
± 20
± 18
1,0
0,4
110
110
1,0
1,0
0,4
0,8·
± 13
± 13
± 13
32
32
32
100
100
100
3
3
3
30
30
30
40
40
40
2,0
2,0
2,0
Vs-2
Vs-2
Vs-2
yes
yes
yes
FE,N,T
FE,N,T
FE,N,T
831
32
32
100
40
40
40
2,0
Vs-2
Vs-2
Vs-2
yes
yes
yes
FE,N,T
FE,N,T
FE,N,T
831
100
30
30
30
2,0
32
3
3
3
2,0
100
± 30
± 30
± 30
90
90
90
±3
±3
±3
± 18
± 22
5,6·
5,0·
5,6·
± 12
± 12
± 12
yes
yes
yes
F,FE,N,N-14,T
F,FE,N,N-14,T
F,FE,N,N-14,T
835
± 22
5,0
5,0
5,0
32
100
100
100
3
3
3
30
30
30
40
40
40
1,2
yes
yes
yes
FE,N,T
FE,N,T
FE,N,T
836
1,2
Vs-2
Vs-2
Vs-2
100
100
3
3
30
30
40
40
1,2
1,2
Vs-2
Vs-2
yes
yes
FE,N,T
FE,N,T
836
± 30
± 30
110
±3
±3
± 18
± 22
5,0
5,0
3,0
3,0
± 12
110
± 12
yes
yes
FE,N,T
FE,N,T
838
± 30
± 30
100
100
±3
±3
± 20
± 20
10
10
8,0
6,5
± 12
±12
yes
yes
F,FE,N,N-14,T
F,FE,N,N-14,T
838
± 30
± 30
110
110
±3
±3
± 18
± 22
5,0
5,0
3,0
3,0
± 12
± 12
yes
yes
F,FE,N,N-14,T
F,FE,N,N-14,T
838
yes
yes
F,FE,N,N-14,T
F,FE,N,N-14,T
839
32
32
32
32
± 18
± 20
± 20
1,2
± 12
F
F
827
F
828
± 30
± 30
110
110
±3
±3
± 18
± 22
5,0
5,0
± 30
± 30
90
90
±3
±3
± 22
± 18
5,0
5,0
3,3
3,3
± 12
yes
yes
F,K,N-14
F,K,N-14
833
± 30
90
±3
± 18
5,0
3,3
± 12
yes
F,K,N-14
833
32
100
3
30
40
2,0
Vs-2
yes
SO-8
B40
± 30
100
±3
± 18
5,0
2,8·
±12
yes
SO-8
B42
± 12
± 12
B23
operational amplifiers
selection guide
Triple op amps
temp.
range
device
no.
TCA220
commercial
max input voltage
drift
offset
IlV/oC
mV
max input current min
offset
bias
AVOL
nA
nA
V/mV
typ-BW
AV= 1
MHz
typ
slew rate
V/Ils
typical common mode
rej. ratio volt. range
dB
V
10,0'"
200 ...
2000'" 4,0.
5,0
0,4
90
18
100
150
150
300
500
500
25
15
15
1,0
1,0
1,0
85
85
85
Vs-l,5
Vs-l,5
Vs-l,5
Vs-l,5
Vs-l,5
Quadruple op amps
LM124
LM224
LM324
military
industrial
commercial
7,0
9,0
9,0
7,0.
7,0.
7,0.
SA534
ext. indo
9,0
7,0.
150
500
15
1,0
85
LM2902
ext. indo
15,0
7,0.
200
1000
15
1,0
85
LM124A
LM224A
LM324A
military
industrial
commercial
4,0
4,0
5,0
20
20
30
30
30
75
100
100
200
25
25
15
1,0
1,0
1,0
85
85
85
TDA0324
commercial
9,0
7,0.
150
500
15
1,0
85
B24
Vs-l,5
Vs-l,5
Vs-l,5
Vs-l,5
Specifications guaranteed over full
temperature range unless otherwise
indicated by following marks:
• tYpical over full temperature range
A
guaranteed at 25°C
• typical at 25 °c
diff. input
typ
P5RR
supply voltage
typ min
max
V
V
output
current
mA
max supply min output
current
volt. swing
mA
V
internal
com pensation
packages
page
no.
18
100
1,0.
5
no
N-16
839
3
3
3
30
30
30
40
40
40
2,0
2,0
2,0
Vs-2
Vs-2
Vs-2
yes
yes
yes
F,N-14
F,N-14
F,N-14
B30
100
3
30
40
2,0
Vs-2
yes
F,N-14
B30
100
3
26
40
2,0
Vs-2
yes
N-14
B30
32
32
32
100
100
100
3
3
3
30
30
30
40
40
40
2,0
2,0
2,0
Vs-2
Vs-2
Vs-2
yes
yes
yes
F,N-14
F,N-14
F,N-14
B31
32
100
3
30
40
2,0
Vs-2
yes
50-14
840
voltage
V
dB
5,0
66
32
32
32
100
100
100
32
26
825
operational amplifiers
abridged data
J-FET input op amp
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
•
LF155/255/355
J-FET input op amp
Temperature range:
Military
_55°C to 125 °c
Industrial _25°C to 85°C
Commercial 0 °c to 70°C
LF155T
LF255T
LF355T
•
•
•
•
•
Low supply current 4 mA(max)
Input offset voltage 3 mV(typ)
Input offset current 3 pA(typ)
Input offset voltage drift 5 IlV / ° C(typ)
LF156/256/356
LF156T
LF256T
LF356T
Fast slew rate 7,5 V/Ils(min)
Input noise voltage 12 nV /\!Hz(typ)
Input offset voltage 3 mV(typ)
Input offset current 3 pA(typ)
Input offset voltage drift 5 IlV/ °C(typ)
v-
Package T
J-FET input op amp
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
•
L F 155A/355A
LF155AT
LF355AT
Low supply current 4 mA(max)
Input offset voltage 1 mV(tvp)
Input offset current 3 pA(tvp)
Input offset voltage drift 5 IlV/ °C(max)
Package T
J-FET input op amp
Temperature range:
Military
_55°C to 125 °c
Industrial -25 °c to 85°C
Commercial 0 °c to 70°C
L F 157/257/357
LF157T
LF257T
LF357T
• Extra fast slew rate 30 VIlls (min)
• Gain bandwidth product 20 MHz
• Input noise voltage 12 nV/'I/Hi. (tvp)
• Input offset voltage 3 mV (typ)
• Input offset current 3 pA (typ)
• Input offset voltage drift 5 IlV/ °c (typ)
NC
Package T
626
Package T
J-FET input op amp
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
•
•
L F 156A/356A
LF156AT
LF356AT
Fast slew rate 7,5 V//ls(min)
Input noise voltage 12 nV 1\!Hz(typ)
Input offset voltage 1 mV(typ)
Input offset current 3 pA(typ)
Input offset voltage drift 5 /lV I °C(max)
Dual high performance op amp LH2101A/2201A/
2301A
Temperature range:
Military
_55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
LH2101AF
LH2201AF
LH2301AF
Typical gain 160 000
Input offset current 3,0 nA(typ)
Input offset voltage 2 mV(typ)
Package T
J-FET input op amp
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
•
•
•
LF157A/357A
Package F
LF157AT
LF357AT
Extra fast slew rate 30 V//ls(min)
Gain bandwidth product 20 MHz
Input noise voltage 12 nV/VHz(typ)
Input offset voltage 1 mV(typ)
Input offset current 3 pA(typ)
Input offset voltage drift 5 IlV I °C(max)
Package T
B27
operational amplifiers
abridged data
LH21 08/2208/2308
Dual precision op amp
Temperature range:
-55°C to 125 °c
Military
Industrial _25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
•
Super {3
Typical
Typical
Typical
LH2108F
LH2208F
LH2308F
input transistors
offset current 0,2 nA
off.set voltage 2 mV
gain 300000
Package F
LH2108AJ2208AJ2308A
Dual precision op amp
Temperature range:
Military
_55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
•
LH2108AF
LH2208AF
LH2308AF
Super (3 input transistors
Typical offset current 0,2 nA
Typical offset voltage 0,3 mV
Typical gain 300000
Package F
LM101/?01
High performance op amp
Temperature range:
_55°C to 125 °c
Military
Commercial 0 °c to 70°C
LM101F, FE, N, T
LM201F,FE,N,T
• Typical gain 150000
• Input offset voltage 2 mV(typ)
• Output short-circuit protection
FREO COMP B
Package T
828
Package FE, N
Package F, N-14
LM 101A/201 A/301 A
High performance op amp
Temperature range:
Military
_55°C to 125 °c
Industrial -25°C to 85°C
Commercial
0 °c to 70°C
LM101AF, FE, N, T
LM201AF, FE, N, T
LM301AF, FE, N, T
• Typical gain 160000
• Input offset current, 3,0 nA(typ)
• Input offset voltage, 2 mV(typ)
FREQ COMP B
Package T
Package FE, N
High performance op amp
Temperature range:
Military
_55°C to 125 °c
Industrial _25°C to 85°C
Commercial
0 °c to 70°C
•
•
•
Package F, N-14
LM 1 07/207/307
LM107F,FE,N,T
LM207F,FE,N,T
LM307F, FE, N, T
Internally compensated
Typical voltage gain 160000
Short-circuit protected input and output
OUT
Package T
Package FE, N
Package F
B29
operational amplifiers
abridged data
LM 108/208/308
Precision op amp
Temperature range:
Military
-55°C to 125 °c
Industrial _25°C to 85°C
Commercial 0 ° C to 70 ° C
LM108F, FE, N, T
LM208F, FE, N, T
LM308F, FE, N, T
COMP 2
•
•
Offset voltage typically 2 mV
Typical gain 300 000
INV IN
V-
Package T
Package FE, N
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
Package F
LM 108A/208A/308A
Precision op amp
LM108AF, FE, T
LM208AF, FE, T
LM308AF, FE, N, T
COMP 2
• Super ~ input transistors
• Typical offset current 0,2 nA
• Typical offset voltage 0,3 mV
• Typical gain 300 000
OUT
Package T
Ext. Ind.
_40°C to 85°C
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
Package F
LM 124/224/324/2902
SA534
Quad op amp
Temperature range:
Military
_55°C to 125 °c
Package FE, N
LM124F, N
LM2902N/SA534F, N
LM224F, N
LM324F, N
• Internally compensated
• Operation down to 3 volt supply
• Low power supply current 200 J.1A per amplifier
• Offset voltage 9 mV(max)
Package F, N-14
830
LM 124A/224A/324A
Quad op atnp
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial
0 °c to 70°C
•
•
•
•
LM124AF, N
LM224AF, N
LM324AF, N
Internally compensated
Operation down to 3 volt supply
Low power supply current 200 !J.A per amplifier
Offset voltage 3 mV(max)
Package F, N-14
LM 158/258/358
Dual low power op amp
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial
0 °c to 70°C
•
•
•
•
LM158FE, N, T
LM258FE, N, T
LM358FE, N, T
OUTAmSVCC'
Internally compensated
Operation down to 3 volt supply
Supply current typically 200 f.1A per amplifier
Offset voltage 9 mV(max)
INV IN A
2
7
OUT B
NON·INV
IN A
3
6
INV IN B
v cc -
4
5
~NO~.INV
Dual low power op amp
•
•
•
•
... -
Package FE, N
Package T
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial
0 °c to 70°C
-...
LM 158A/258A/358A
OUTAmSVCC.
LM158AFE, N, T
LM258AFE, N, T
LM358AFE, N, T
Internally compensated
Operation down to 3 volt supply
Supply current typically 200 !LA per amplifier
Offset voltage 3 mV(max)
INY IN A
2
7
~o~ INV
3
6
INv IN U
5
~)~ I~:V
Vee
4
.
(lllf, Il
Vee
Package T
Package FE, N
831
operational amplifiers
abridged data
Op amp
Temperature range:
Military
_55°C to 125 °c
• Open loop gain 45 000 typical
• Input voltage range typ ± 10 V
• Offset voltage 3 mV(max)
p.A709A
J.l.A709AF, N, T
IN COMP B
V'--
Opamp
Package T
Temperature range:
Military
_55°C to 125 °c
Ext. Ind. -40°C to 85°C
Commercial 0 °c to 70°C
p.A709F, N, T
SA709CF, FE, N
p.A709CF, N, T
• Open loop gain 45 000 typical
• Input voltage range typically
± 10 Volts
Package N
J.l.A709/709C
SA709C
IN COMP B
Package T
Package FE, N
p.A740CT
• Input bias current typically 100 pA
• Slew rate 6 VIp.s
• Input impedance 1012 n
• Internally compensated
Package T
832
Package F, N-14
p.A740C
FET input op amp
Temperature range:
Commercial 0 °c to 70°C
Package F, N·14
/-lA741/741C
SA741C
General purpose op amp
Temperature range:
Military
_55°C to 125 °c
Ext. Ind. _40°C to 85°C
Commercial 0 °c to 70°C
IlA741F,FE,N, T
SA741CF,FE,N,T
,uA741CF,FE,N,T
• Typical open loop gain 200 000
• Internal compensation
• Offset null capability
• Output impedance 75 ,Q typical
v~
Package T
Package FE, N
Package F, N·14
Dual general purpose op amp
Temperature range:
Military
_55°C to 125 °c
Ext. Ind. -40°C to 85°C
Commercial 0 °c to 70 °c
Il A 747/747C
SA747C
,uA747F,K,N
SA747CF, K, N
,uA747CF, K, N
• Typical open loop gain 200 000
• Internally compensated
• Offset null capability
• Output impedance 75 ,Q
NON·INV
INA
OFFSET
NULL A
OFFSET
NULL B
NON·INV
IN B
OFFSET
NULL B
Package K
Package F, N·14
833
operational amplifiers
abridged data
jJA748/748C
SA748C
General purpose op amp
Temperature range:
Military
_55°C to 125 °c
Ext. Ind. -40°C to 85°C
Commercial 0 °c to 70°C
jJA748F,FE,N,T
SA748CF,FE,N,T
jJA748CF, FE, N, T
• Typical open loop gain 200000
• Uncompensated
• Offset null capability
• Output impedance 75 .Q
FREQ CQMP B
v-
Package T
Package FE, N
MC1456/1556
Precision op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
Package F, N-14
MC1556F, N, T
MC1456F, N, T
• Super {3 input transistor
• Low input offset and bias currents,
typically 2,0 and 15,0 nA
• 2,5 V/jJs slew rate
• Internally compensated
v-
Package T
834
Package N
Package F
MC1458/1558
SA1458
Dual general purpose op amp
Temperature range:
Military
_55°C to 125 °c
Ext. Ind. _40°C to 85°C
Commercial 0 °c to 70°C
MC1558F, FE, N, T
SA1458F, FE, N, T
MC1458F, FE, N, T
• Typical gain 100000
• Internally compensated
• Unity gain slew rate 0,8 V/}1S
OUTAmav,
INV IN A
2
7
OUT B
NON INV
3
6
INV IN B
v-
4
5
~NO~
IN A
Package T
Package FE, N
Package T
Package F, N·14
NE/SE530
High slew rate op amp
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
INV
SE530FE,N,T
NE530FE,N,T
Package FE, N
835
operational amplifiers
abridged data
NE/SE531
High slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
SE531T
NE531N, T
• 35 VIps slew rate at unity gain
• 1 MHz small signal bandwidth
• 500 kHz large signal bandwidth
• Typical open loop gain 100000
• Pin compatible with pA708, ,uA748 or
LM101
• Compensated with a single capacitor
• Offset null capability
FREO COMP
Package T
Package N
Dual low power op amp
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial o °c to 70°C
SE532FE,N,T
SA532FE,N,T
NE532FE,N,T
•
Internally compensated
• Operation down to 3 volt supply
• Supply current typically 200,uA
per amplifier
NE/SE532
SA532
Vee +
INV
IN A
INV
IN B
o~'m",e
rNV IN A
2
7
OUT B
~O~.INV
3
6
INV IN B
v cc -
4
5
~NO~.INV
Package FE, N
NE/SE532A
Dual low power op amp
Similar to NE/SE532, however
better offset voltage
better offset current
lower input current
Vee·
SE532AFE, N, T
NE532AFE, N, T
INV
IN B
INV
IN A
•
•
•
,"Hm'' '
INV IN A
2
7
OUT B
NON·INV
IN A
3
6
rNV IN B
v cc -
4
5
~O~.II\JV
VCC-
Package T
836
+-
v cc -
Package T
Temperature range:
-55 ° C to 1 25 ° C
Military
Commercial o °c to 70°C
- +
Package FE, N
NE/SE535
High slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
SE535FE, N, T
NE535FE, N, T
15 VIlls slew rate at unity gain
Input offset voltage 2 mV (typ)
Large common mode and differential
voltage ranges
• Short-circuit protected
•
•
•
Package T
Temperature range:
Military
-55°C to 85°C
Commercial 0 °c to 70°C
Package FE, N
NE/SU536
FET input op amp
SU536T
NE536T
• Input bias current 5 pA at 20°C
• Slew rate 6 VIp.s
• Input impedance 1014 n
• Internally compensated
Package T
High slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
NE/SE538
SE530FE,N, T
NE538FE, N,T
• 2 mV max input offset voltage
• 60 nA max input offset current
• Short-circuit protected
• 60 VIlls slew rate
• 6 MHz gain bandwidth
Package T
Package FE, N
837
operational amplifiers
abridged data
NE/SE5530
Dual high slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
SE5530FE, N, T
OUT
INV
IN A
Package FE, N
•
•
•
•
2
7" OUT B
NON INV
IN A
3
6
INV.".B
v-
4
5
~o~ I~V
Package N
NE/SE5533
Dual low noise op amp
Temperature range:
Military
-55°C to 125 °c
COl'Dmercial 0 °c to 70°C
Am'·8V+
INV IN A
SE5533F,FE,N, T
NE5533F, FE, N, T
Small signal bandwidth 10 MHz
Output drive 10 V(r.m.s.) into 600
Input noise 4 nV I'llHi.
Slew rate 13 ~:J.ls
n
SV
De'TAm
l~v:"'A2
7
OUTS
+
!\JO~ INV
3
6
INV IN B
\ _
4
5
~O~.'NV
IN A
-+
.-
Package FE, N
Package T
Dual high slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
•
•
•
•
Package F, N-14
NE/SE5535
SE5535F, FE, N, T
NE5535F, FE, N, T
15 V IJ.ls slew rate at unity gain
Input offset voltage 2 mV (typ)
Large common mode and differential voltage ranges
Short-circuit protected
Vee·
INVOUTAmSV+
IN A2
7 OUT B
NON·INV
IN A
3
6
V- 4·
v
Package T
838
INV IN B
5 ~NO~'NV
Package FE, N
Package F, N-14
NE/SE5538
Dual high slew rate op amp
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
SE5538F,FE,N,T
NE5538F, FE, N, T
• 2 mV max input offset voltage
• 60 nA max input offset current
• Short-circuit protected
• 60 V/jJ.s slew rate
• 6 MHz gain bandwidth
:~VA
vcc -
Package T
Triple op amp
Temperature range:
Commercial 0 °c to 70°C
• Input offset voltage
• Input offset current
• Channel separation
• CMRR
Package FE, N
Package F, N-14 TCA220
TCA220
2 mV(typ)
200 nA(typ)
100 d8(typ)
90 d8(typ)
Package N-16
General purpose op amp
Temperature range:
Commercial _25°C to 70°C
TCA520
TCA520B
• Supply voltage range 2 to 20 V
• Output TTL compatible
• Slew rate 50 V/jJ.s
• Input offset voltage 2 nV(typ)
• Input offset current 30 nA(typ)
Package FE, N
839
operational amplifiers
abridged data
TDA0301
High performance op amp
Temperature range:
Commercial 0 °c to 70°C
TDA0358
Dual low power op amp
Temperature range:
Commercial 0 °c to 70°C
TDA0301D
TDA0358D
• Internally compensated
• Operation down to 3 V supply
• Supply current typically 200 {J.A per amplifier
• Typical gain 160000
• Input offset current, typically 3,0 nA
• Input offset voltage, typically 2 mV
O U T A m a Vee'
INV IN A 2
7 OUT a
NON·INV
"3
6
INV IN B
vcc -
4
S
~NO~-INV
IN A
Package SO-8
Package SO-8
TDA0324
Quad op amp
Temperature range:
Commercial 0 °c to 70°C
TDA0324D
• Internally compensated
• Operation down to 3 V supply
• Low power supply current 200 {J.A per amplifier
Package SO-14
840
TDA0741
General purpose op amp
Temperature range:
Commercial
0 °c to 70°C
TDA0741D
• Typical open loop gain 200000
• Offset null capability
• Output impedance 75 n typical
Package SO-8
TDA0748
General purpose op amp
Temperature range:
Commercial
a °c to 70°C
•
•
•
•
TDA0748D
Typical open loop gain 200000
Uncompensated
Offset null capability
Output impedance 75 n
Package SO-8
TDA1034
NE/SE5534
High performance op amp
Temperature range:
Military
_55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
SE5534FE, N, T
TDA1034FE, N, T
SE5534FE,N,T
OFFSET NULL
•
•
•
•
•
•
Input noise voltage 3,5 nV/VHz(typ)
Input noise current 0,4 pA/\!Hz(typ)
Input offset voltage 0,5 mV(typ)
Input offset current 20 nA(typ)
Slew rate 13 V Ins
Small signal bandwidth 10 MHz
Power bandwidth
at VOUT(p-p) = 20 V
Noise voltage at 1 kHz
at 30 Hz
Package T
Package FE, N
typ 200 kHz
3,5 nV/\!Hz
5,5 nV/\!Hz
841
operational amplifiers
abridged data
TDA1078
NE5539
High slew ratl! op amp
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
•
•
TDA1078, NE5539N
High open loop gain
High slew rate
High bandwidth
High output current
Not compensated
Power response 64 MHz
Package N· 14
Dual general purpose op amp
Temperature range:
Commercial
0 °c to 70 °c
•
•
•
TDA 1458
TDA1458D
Typical gain 100 000
Internally compensated
Unity gain slew rate 0,8 V lJis
OUTAmS
-
• -
7
2
~O~.INV
3
6
INV IN B
v-
4
5
~O~.INV
Package SO·8
642
v.
INV IN A
OUT B
differential amplifiers
abridged data
Dual differential amplifier
Temperature range:
Military
_55°C to 125 °c
Commercial
0 °c to 70°C
•
•
•
NE/SE510
SE510F,N
NE510N
Low input offset voltage -0,5 mV typical
Bandwidth greater than 100 MHz
AGC capability
Package F, N-14
Dual differential transistor pair
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
NE/SE511
SE511F,N
NE511F,N
Low input offset voltage -0,5 mV typical
Operation up to 100 MHz
AGC capability
Package F, N-14
Differential amplifier
Temperature range:
Military
_55°C to 125 °c
Commercial
0 °c to 70°C
•
•
•
•
NE/SE515
SE515K, N
NE515K, N
Differential inputs and outputs
Open loop gain 4,500 (typ)
Bandwidth (open loop) 1 MHz
Input offset voltage typical 0,5 mV
Package K
Package N-14
B43
comparators
selection guide
max inp. current
offset
bias
IlA
Il A
supply
voltage
V
response
time (typ)
ns
common mode
voltage range
V
3,00
6,50
45,0
40,0
7,00
7,50
+12, -6
+12, -6
40
40
±5
±5
military
industrial
commercial
4,00
4,00
10,0
0,15
0,15
0,30
0,02
0,02
0,07
± 15
to
+5 and GND
200
200
200
± 14
± 14
± 14
single
single
commercial
military
5,00
5,00
35,0
35,0
5,00
5,00
+5, -5
+5, -5
40
40
-3,2, +4,2
-3,2, +4,2
NE527
SE527
single
single
commercial
military
10,0
6,00
4,00
4,00
1,00
1,00
± 5 to ± 15
and GND
16
16
±6
±6
NE529
SE529
single
single
commercial
military
10,0
6,00
50,0
36,0
15,0
9,00
± 5 to ± 15
and GND
12
12
±6
±6
LM119
LM219
LM319
dual
dual
dual
military
industrial
commercial
7,00
7,00
10,0
1,00
1,00
1,20
0,10
0,10
0,30
± 15
to
+5 and GND
80
80
80
±13
± 13
±13
LM193
LM293
LM393
LM2903
dual
dual
dual
dual
military
industrial
commercial
ext. indo
9,00
9,00
9,00
15,0
0,30
0,40
0,40
0,50
0,10
0,15
0,15
0,20
± 1 to ± 18
or
+2 to +36 GND
1300
1300
1300
1300
±
±
±
±
NE521
NE522
dual
dual
commercial
commercial
10,0
10,0
40,0
40,0
12,0
12,0
+5, -5, GND
+5, -5, GND
4,5
6
±3
±3
IlA711
IlA 711C
dual
dual
military
commercial
6,00
10,0
150
150
20,0
25,0
+12, -6
+12, -6
40
40
±5
±5
TDA0319 dual
commercial
10,0
1,20
0,30
+5 and GND
80
± 13
± 1 to ± 18 or
+2 to +36
1300
1300
1300
1300
VS-2
VS-2
VS-2
VS-2
device
no.
complexity
temp.
range
IlA710
IlA710C
single
single
military
commercial
LM111
LM211
LM311
single
single
single
NE526
SE526
max inp.
offset volt.
mV
18
18
18
18
LM139
LM239
LM339
LM2901
quad
quad
quad
quad
military
industrial
commercial
ext. indo
9,00
9,00
9,00
15,0
0,30
0,40
0,40
0,50
0,10
0,15
0,15
0,20
LM139A
LM239A
LM339A
quad
quad
quad
military
industrial
commercial
4,00
4,00
4,00
0,30
0,40
0,40
0,10
0,15
0,15
+2 to +36
and GND
1300
1300
1300
VS-2
VS-2
VS-2
MC3302
quad
ext. indo
40,0
1,00
0,20
+2 to +28 GND
2000
VS-2
B44
output voltage
output
structure
voltage
gain (typ)
V/mV
2,5
2,5
TTL
TTL
1,7
1,5
0,4
0,4
0,4
Vs
Vs
Vs
open coli.
open coli.
open coli.
200
200
200
0,4
0,4
2,8
2,8
TTL
TTL
0,5
0,5
2,7
2,5
TTL
TTL
5
5
5
5
±5
±5
K, N-14
K
complementary output
gates with individual strobes
849
0,5
0,5
2,7
2,5
TTL
TTL
5
5
5
5
±5
±5
K, N-14
K
complementary output
gates with individual strobes
850
0,6
0,6
0,6
Vs
Vs
Vs
open coli.
open coli.
open coli.
40
40
40
2
2
2
±5
±5
±5
will operate from single
F,K
F,K
or dual supplies
F, K, N-14
846
0,7
0,7
0,7
0,7
Vs
Vs
Vs
Vs
open
open
open
open
200
200
200
100
2
2
2
2
T
FE,N,T
FE,N,T
FE,N
will operate from single
or dual supplies
847
0,5
0,5
2,7
TTL
open coli.
5
12
12
±6
±6
F, N-14
F, N-14
ultra-high speed
Vs
0
0
2,5
2,5
TTL
TTL
1,5
1,5
2
2
±5
±5
F, K, N-14 differential in, common out,
F, K, N-14 individual strobes
848
0,6
Vs
open coli.
40
2
±5
SO-10
850
0,7
0,7
0,7
0,7
Vs
Vs
Vs
Vs
open
open
open
open
coli.
coli.
coli.
coli.
200
200
200
100
2
2
2
2
36
36
36
36
F
F, N-14
F, N-14
F, N-14
0,7
0,7
0,7
Vs
Vs
Vs
open coli.
open coli.
open coli.
200
200
200
2
2
2
36
36
36
0,4
Vs
open coli.
30
2
28
VOLmax
V
VOHmin
V
0
0
TTL
max diff.
fan out inp. voltage
V
packages
comments
page
±5
±5
F,T
F,FE,N
N·14, T
differential input
single ended output
847
F,T
with strobe; will operate from
single supply
5
5
5
10
10
coli.
coli.
coli.
coli.
± 30
± 30
± 30
5
5
36
36
36
36
{F, FE, N
N-14, T
F, K, N-14 plus TTL output gate
F, K, N-14
846
849
848
849
will operate from single
or dual supplies
846
F
F, N-14
F, N-14
will operate from single
or dual supplies
847
N-14
will operate from single
or dual supplies
848
845
comparators
abridged data
lM111/211/311
Precision voltage comparator
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial
0 °c to 70°C
•
•
•
LM111F, T
LM211 F, FE, N, T
LM311F, FE, N, T
Operates from single 5 V supply
Voltage gain 200000 typical
Input bias current
Military 60 nA
typical
Industrial 100 nA
BALANCE/
STROBE
v-
Package T
Package FE, N
Temperature range:
Military
_55°C to 125 °c
Industrial _25°C to 85°C
Commercial
0 °c to 70°C
•
•
•
•
•
•
Package F, N-14
lM119/219/319
Dual voltage comparator
LMl19F, K
LM219F, K
LM319F, K, N
Operates from single supply
Output can be level shifted
Input bias current typically 250 nA
Minimum fan-out 2 each side
High common mode slew rate
8 ns response time (± 15 V)
v-
Package K
Quad comparator
Package F, N-14
lM 139/239/339/290 1
Temperature range:
Military
_55°C
Ext. Ind. -40°C
Industrial -25°C
Commercial
0 °c
to
to
to
to
125 °c
85°C
85°C
70°C
LM139F
LM2901F, N
LM239F, N
LM339F, N
• Single voltage supply
• Operation down to 2 V
• Offset current 3 nA(typ)
• Offset voltage 5 mV(max)
• Input bias current 35 nA(typ)
• Output TTL compatible
Package F, N-14
846
LM 139A/239A/339A
Quad comparator
Temperature range:
Military
-55°C to 125 °c
Industrial -25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
•
•
•
LM139AF
LM239AF, N
LM339AF, N
Single voltage supply
Operation down to 2 V
Offset current 3 nA(typ)
Offset voltage 2 mV(max)
Input bias current 35 nA(typ)
Output TTL compatible
Package F, N-14
Dual comparator
Temperature range:
Military
-55°C to 125 °c
LM 193/293/393/2903
LM193T
Ext. Ind. - 40°C to 85 °c
Industrial _25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
•
•
•
OUT1~8V'
Single supply voltage
Operation down to 2 V
Offset current 3 nA(typ)
Offset voltage 2 mV(max)
Input bias current 35 nA(typ}
Output TTL compatible
~
Package T
Comparator
IN 1
2
_
+ IN 1
3
+
GND
4
7
OUT 2
_
6
-IN 2
+
5
+ IN 2
Package FE, N
MA710/710C
Temperature range:
MA710F, T
Military
_55°C to 125 °c
MA710CF, FE, N, T
Commercial 0 °c to 70°C
• Typical gain 1700
• Offset voltage temperature coefficient, 3,5 MV 1°C
• Typical respo~~e time 40 ns
NON
INV IN
v-
Package T
Package FE, N
Package F, N·14
B47
comparators
abridged data
J1.A711/711C
Dual comparator
Temperature range:
Military
_55°C to 125 °c
Commercial 0 °c to 70°C
IlA711F, K, N
IlA711CF, K, N
• Typical gain 1700
• I nput strobes
• Typical response time, 40 ns
Package K
Package F, N-14
Quad voltage comparator
Temperature range:
Ext. Ind. -40°C to 85°C
MC3302
MC3302N
• TTL compatible
• Differential input voltage ± Vce
• Single supply +2 V to +28 V
• Input common mode voltage to GND
• Low current drain
Package N-14
Dual high-speed comparator
Temperature range:
Commercial
0 °e to 70°C
•
•
•
•
NE521
NE521 F, N
Schottky linear process
8 ns typical propagation delay
Typical offset voltage 6 mV
Totem-pole outputs
Package F, N·14
848
Dual high-speed comparator
Temperature range:
Commercial
DC to 70 DC
°
NE522
NE522F, N
• Schottky linear process
• 10 ns typical propagation delay
• Typical offset voltage 6 mV
• Open collector outputs
Package F, N-14
Precision voltage comparator
Temperature range:
_55°C to 125 DC
Military
D
Commercial o °c to 75 C
NE/SE526
SE526F, K, N
NE526F, K, N
V ,N
• Typical offset current 0,5 J-lA
• Typical offset voltage 2 mV
• TTLfan-outof10
Va
v,+
GND
V 2+
V ,N
Package K
Package F, N-14
High-speed comparator
Temperature ran~e:
Military
-55 C to 125 DC
Commercial o °c to 70 DC
NE/SE527
SE527K
NE527K, N
Low offset current 0,3 J-lA (typ)
• Low
offset voltage, 2 mV(typ)
• Complementary
outputs
•• Typical propagation
delay, 15 ns
v,+
v,
OUT B
Package K
Package N-14
B49
comparators
abridged data
NE/SE529
High-speed comparator
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
SE529K
NE529K, N
• Offset current 2 J.lA (typ)
• Low offset voltage 2 mV (typ)
• Complementary outputs
• Typical propagation delay 11 ns
V,
Package K
Package N-14
Dual voltage comparator
Temperature range:
Commercial 0 °c to 70°C
TDA0319
TDA0319D
• Operates from single 5 V supply
• Output can be level shifted
• Input bias current typically 250 nA
Package SO-1 0
650
voltage regulators
selection guide
max outp.
current
A
peak outp.
current
A
typ line
regulation
%
typ load
regulation
%
4,8 to 5,2
1,0
2,2
1,0
2,0
7,0 to 35
8,0 to 35
10 to 35
14 to 35
17 to 35
20 to 35
26 to 40
4,8 to 5,2
5,75 to 6,25
7,7 to 8,3
11,5 to 12,5
14,4 to 15,6
17,3 to 18,7
23 to 25
1,0
2,2
1,0
1,0
8,5 to 40
2,0 to 37
0,125
0,150
0,1
0,4
dual polarity
regulators
± 3,2
±5
±6
± 12
±15
+ 5;·-12
gA723/723C
precision
adjustable
9,5 to 40
2,0 to 37
7805
7806
7808
7812
7815
7818
7824
5 V pos.; fixed
6 V pos.; fixed
8 V pos.; fixed
12 V pos.; fixed
15 V pos.; fixed
18 V pos.; fixed
24 V pos.; fixed
7,0 to 35
8,0 to 35
10 to 35
14 to 35
17 to 35
20 to 35
26 to 40
78G *
pos.; adjustable
78 L02AC
78L05AC
78L06AC
78L08AC *
2,6 V pos.; fixed
5 V pos.; fixed
6,2 V pos.; fixed
8,2 V pos.; fixed
device
no.
polarity
and function
input voltage output voltage
range
range
V
V
LM109/309
5 V pos.; fixed
7,0 to 35
LM340-5
LM340-6
LM340-8
LM340-12
LM340-15
LM340-18
LM340-24
5 V pos.; fixed
6 V pos.; fixed
8 V pos.; fixed
12 V pos.; fixed
15 V pos.; fixed
18 V pos.; fixed
24 V pos.; fixed
NE/SE550
precision
adjustable
N6/SE5551
NE/SE5552
NE/SE5553
NE/SE5554
NE/SE5555
* Type in development.
852
0,4
0,125
0,150
0,1
0,6
4,8 to 5,2
5,75 to 6,25
7,7 to 8,3
11,5 to 12,5
14,4 to 15,6
17,3 to 18,7
23 to 25
1,0
2,2
2,2
2,2
2,2
1,0
1,0
7,5 to 40
5,0 to 30
1,0
0,75
1,0
4,3 to 30
6,7 to 30
7,9 to 30
9,9 to 30
2,5 to 2,7
4,8 to 5,2
5,95 to 6,45
7,9 to 8,5
0,15
2,0
1,0
2,1
2,1
2,1
2,1
For special voltage requirements contact us - see back cover for address
typ quiesc_
current
mA
min ripple
rejection
dB
5,0
{}j-c
page
{}j-a
°C/W
°C/W
TO-220
5,0
65
TO-3
5,5
45
856
TO-220
5,0
65
TO-3
5,5
45
856
TO-100
25
150
TO-116
65
150
856
N
25
150
T
35
95
857
2,0
-1,1
-0,8
-0,8
-1,0
-1,0
-1,0
-1,5
1,6
75
3,0
-0,015
+1,7; -5,6
4,2
4,3
4,3
4,3
4,4
4,5
4,6
{}j-a
-0,8
62
59
56
61
60
59
56
74
{}j-c
2,0
4,2
4,3
4,3
4,3
4,4
4,5
4,6
2,3
packages with corresponding max. {}
min dropout av temp_
coefficient
voltage
mVtc
V
3,0
-0,015
TO-100
25
150
TO-116
65
150
856
62
59
56
61
60
59
56
2,0
-1,1
-0,8
-0,8
-1,0
-1,0
-1,0
-1,5
TO-220
5,0
65
TO-3
5,5
45
859
3,2
62
2,5
-1,1
U1
11
80
TO-3
6,0
47
857
3,6
3,8
3,9
4,0
43
41
39
38
1,7
TO-39
40
190
TO-92
70
200
857
853
voltage regulators
selection guide
polarity
and function
device
no.
78L 12AC
78L 15AC
78L 18AC
78L24AC
*
12
15
18
24
V pos.; fixed
V pos.; fixed
V pos.; fixed
V pos.; fixed
input voltage output voltage
range
range
V
V
max outp.
current
A
13,7 to 35
16,7 to 35
19,7 to 35
25,7 to 35
11,5 to
14,4 to
17,3 to
23,1 to
0,15
12,5
15,6
18,9
14,9
peak outp.
current
A
typ line
regulation
typ load
regulation
%
%
2,0
1,0
78M05
78M06
78M08
78M12
78M15
78M20
78M24
5 V pos.; fixed
6 V pos.; fixed
8 V pos.; fixed
12 V pos.; fixed
15 V pos.; fixed
20 V pos.; fixed
24 V pos.; fixed
7,0 to 30
8,0 to 30
10 to 30
14 to 35
17 to 35
22 to 40
26 to 40
4,8 to 5,2
5,75 to 6,25
7,7 to 8,3
11,5 to 12,5
14,4 to 15,6
19 to 21
23 to 25
0,5
0,7
1,0
1,0
78MG
pos.; adjustable
7,5 to 40
5,0 to 30
0,5
0,8
0,75
1,0
7905
7906
7908
7912
7915
7918
7924
5 V neg.; fixed
6 V neg.; fixed
8 V neg.; fixed
12 V neg.; fixed
15 V neg.; fixed
18 V neg.; fixed
24 V neg.; fixed
-7,2 to -35
-8,3 to -35
-10,3 to -35
-14,5 to -35
-17,6 to -35
-20,7 to -35
-27 to -40
-4,8 to -5,2
-5,75 to -6,25
-7,7 to -8,3
-11,5 to -12,5
-14,4 to -15,6
-17,3 to -18,7
-23 to -25
1,0
2,1
1,0
1,0
79G
neg.; adjustable
-7,0 to -40
-2,23 to -30
1,0
2,2
1,0
1,0
79M05
79M06
79M08
79M12
79M15
79M20
79M24
5 V neg.; fixed
6 V neg.; fixed
8 V neg.; fixed
12 V neg.; fixed
15 V neg.; fixed
20 V neg.; fixed
24 V neg.; fixed
-7,5 to -35
-7,35 to -35
-9,4 to -35
-13,6 to -35
-16,7 to -35
-22,1 to -40
-26,1 to -40
-5,2 to -4,8
-6,25 to -5,75
-8,3 to -7,7
-12,5 to -11,5
-15,6 to -14,4
-20 to -19
-25 to -23
0,5
0,65
1,0
1,0
79MG
neg.; adjustable
-7,0 to -40
-2,2 to -30
0,5
0,65
0,75
1,0
TDA0723
precision
adjustable
9,5 to 40
2,0 to 37
0,125
0,150
0,1
0,6
* Type in development.
854
For special voltage requirements contact us - see back cover for address
typ quiesc.
min ripple
current
rejection
mA
dB
4,2
4,4
4,6
4,8
36
33 .
4,2
4,3
4,3
4,3
4,4
4,5
4,6
62
59
56
55
54
53
50
2,8
78
packages with corresponding max {}
min dropout av temp.
coefficient
voltage
mV/oC
V
page
{}j-c {}j·a
°C/W
{}j·c {}j·a
°C/W
TO·39
40
190
TO·92
70
200
B57
2,0
-1,0
-0,5
-0,5
-1,0
-1,0
-1,1
-1,2
TO·220
5,0
70
TO·39
25
185
B57
2,5
-0,5
TO·39
25
185
U1
11
80
B58
TO·3
5,5
45
TO-22O
5,0
65
B59
1,7
1,0
54
2,0
-0,4
-0,4
-0,6
-0,8
-1,0
-1,0
-1,0
0,5
50
2,3
-0,4
U1
11
80
TO·3
6,0
47
B58
1,0
60
60
60
60
60
59
58
1,0
-0,4
-0,4
-0,6
-0,8
-1,0
-1,0
-1,0
TO·220
5,0
70
TO·39
25
185
B58
0,5
60
2,3
-0,4
TO·39
25
185
U1
11
80
B59
2,3
74
3,0
-0,015
SO-lO
B59
B55
voltage regulators
abridged data
LM 109/209/309
Fixed 5 volt regulator
Temperature range:
Military
-55°C to 125 °c
Industrial _25°C to 85°C
Commercial 0 °c to 70°C
•
•
•
pA723/723C
Variable voltage regulator
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
LM109DA, DB
LM209DA, DB
LM309DA, DB
•
•
•
Fixed 5 V output
Short-circuit and thermal overload protection
1 A capability in TO-3
pA723F, K, N
pA723CK, N
Output voltage range, 2 to 37 V
150 rnA output current capability
7,15 V reference
CURRENT
CURRENT
LIMIT
LIMIT
CURRENT
SENSE
GND (CASE)
o
v-
Package DB
Package DA
Fixed positive voltage regulators
Temperatu re range (junction):
-55°C to 125 °c
Military
Commercial 0 °c to 125°C
LM340 series
LM340DA
LM340DA, U
• 1 A output
• Short-circuit and overload protection
LM340-5
LM340-6
LM340-8
LM340-12
LM340-15
LM340-18
LM340-24
5V
6V
8V
12V
15 V
18V
24 V
Package F, N-14
Package K
Variable voltage regulator
NE/SE550
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
SE550F, K
NE550F,K,N
Output voltage range, 2 to 37 V
150 rnA output current capability
1,63 V reference
CURRENT
LIMIT
CURRENT
LIMIT
CURRENT
SENSE
lNV iN
NON-INV IN
NON
INV IN
vc
V REF
v-
U10
4
ii
Vc
VOUT
z
6
9
V
7
8
NC
COMMON
Package U
B56
Package DA
Package K
Package F, N-14
NE/SE5551 to 55
Dual polarity regulators
Temperature range:
Military
-55°C to 155 °c
Commercial
0 °c to 150°C
•
•
•
•
SE5551 to 55F, N, T
NE5551 to 55F, N, T
Internally current-limited
Thermal overload protection
Continuously adjustable from 5 to 20 V, balanced or
unbalanced
No external components required
Fixed positive voltage regulators
Temperature range (junction):
Military
-55°C to 150 °c
Commercial 0 °c to 150°C
78LOO series
78LOODB
78LOOCS, DB
• 0,1 A output
• Short-circuit and overload protection
78L02
78L05
78L06
78L08
2,6V
5 V
6,2V
8,2 V
78L12
78L15
78L18
78L24
12
15
18
24
V
V
V
V
+VOUT
COMMON(0
\)"'6
ouTPUT
c\J
~ INPUT
TOP VIEW
Package DB
Package F, N-14
Package T
Adjustable positive voltage regulator
Temperature range (junction):
Military
-55°C to 150 °c
Commercial
0 °c to 150°C
78G
Fixed positive voltage regulators
Temperatu re range (junction):
Military
-55°C to 150 °c
Commercial 0 °c to 150°C
78G, DA
78GC, DA, U1
• Output current in excess of 1,0 A
• 78G positive output voltage 5 to 30 V
• Internal thermal overload protection
• Internal short-circuit current protection
• Output transistor safe area protection
• Military and commercial versions available
• Available in 4-pin TO-202 type and 4-pin TO-3
Package S
•
•
78MOO series
78MOODB
78MOOC, DB, U
0,5 A output
Short-circuit and overload protection
78M05
78M06
78M08
78M12
78M15
78M20
78M24
5V
6V
8V
12 V
15V
20 V
24 V
TOP VIEW
~
COM(M~)O~NTROL
°
o
0
ICASEI
4
03
TOP VIEW
'0
_o2
COMMON
C01]E0
4 M M CONT
O
3
OUT
2
IN
1
COMM
~
I NPUT
OUTPUT
COMMON
Package DA
Package U1
Package DB
Package U
B57
voltage regulators
abridged data
Adjustable positive voltage regulator
Temperature range (junction):
o
Military
-55- C to 150°C
Commercial 0 ° C to 150 ° C
78MG
78MGDB
78GCDB, U1
• Output current in excess of 0,5 A
• /lA78MG positive output voltage 5 to 30 V
• Internal thermal overload protection
• Internal short-circuit current protection
• Output transistor safe area protection
• Power miniature dual in-line package
IN
C@]]§OMM4CONT
O
3
OUT
2
IN
1
COMM
TOP VIEW
"'WOO""
Package U1
Package DB
CaNT
TOP VIEW
Adjustable negative voltage regulator
Temperature range (junction):
-55 ° C to 150 ° C
Military
Commercial 0 °c to 150°C
•
•
•
•
•
•
•
79G
Fixed negative voltage regulators
Temperature range (junction):
Military
_55°C to 150 °c
Commercial DoC to 150°C
79GDA
79GCDA, U1
Output current in excess of 1,0 A
79G negative output voltage -30 to -5 V
Internal thermal overload protection
Internal short-circuit current protection
Output transistor safe area protection
Military and commercial versions available
Available in 4-pin TO-202 type and 4-pin TO-3
79MOO series
79MOODB
79MOOCDB, U
• 0,5 A output
• Short-circuit and overload protection
79M05
79M06
79M08
79M12
79M15
79M20
79M24
5V
6V
8V
12V
15V
20V
24 V
TOP VIEW
COMMR~ONTROL(CASEI
'§[)E
4
N IN
3
OUT
0'2
1
TOP VIEW
CONT
COMM
~
o(
0 OJ 0
'0
B58
02
~
INPUT
Package U1
COMMON
TOP VIEW
OUTPUT
Package DA
IN
Package DB
Package U
Adjustable negative voltage regulator
Temperature range (junction):
Military
-55°C to 150 °c
Commercial 0 °c to 150°C
•
•
•
•
•
•
79MG
79MGDB
79MGCDB, U1
Output current in excess of 0,5 A
79MG negative output voltage -30 V to -2,2 V
Internal thermal overload protection
Internal short-circuit current protection
Output transistor safe area protection
Power miniature dual in-line package
'@o I[J§N4IN
3
CONT
1
COMM
OUT
Temperature range (junction):
Military
-55°C to 150 °c
Commercial DoC to 150°C
5
6
8
12
15
18
24
5V
6V
8V
12 V
15V
18V
24 V
GND (CASE)
o
TOP VIEW
7800 series
7800DA
78ooCDA, U
Package DA
V
V
V
V
V
V
V
Package U
TDA0723
Variable voltage regulator
Temperature range:
Military
_55°C to 125 °c
Commercial DoC to 70°C
•
•
•
1 A output
Short-circuit and overload protection
7805
7806
7808
7812
7815
7818
7824
7905
7906
7908
7912
7915
7918
7924
Package DB
Fixed positive voltage regulators
7900DA
79ooCDA, U
1 A output
Short-circuit and overload protection
,"',0"
Package U1
•
•
•
•
COMM
OUT
2
7900 series
Fixed negative voltage regulators
Temperature range (junction):
Military
_55°C to 150 °c
Commercial DoC to 150°C
TDAo723D
TDAo723D
Output voltage range, 2 to 37 V
150 mA output current capabil ity
7,15 V reference
TOP VIEW
GND (CASE)
o
Package DA
Package U
Package SO-lO
B59
general industrial
abridged data
NE543
Servo amplifier
Temperature range:
Commercial
0 OCto 70°C
•
•
•
Temperature range:
Industrial -20°C to 70°C
NE543K
Directly drives 11 n servo motor
Few external components
Operates from 4,5 V supply
SAA1027
Stepper motor driver
•
•
•
SAA1027
Supply range 9,5 to 18 V
Load current (each output) 350 mA(max)
Logic on chip for clockwise/counterclockwise
rotation
NO LONGER RECOMMENDED
FOR NEW DESIGN
TIMING CAP
Package K
Package N-16
NE544
Servo amplifier
Temperature range:
Industrial -20°C to 75°C
NE544N
• 500 mA load current capability
• Low stand-by power drain
• Bidirectional bridge output (single supply)
• Adjustable deadband/trigger thresholds
• High linearity 0,5% max error
• Output for external PNPs optional
• Wide supply range
SAA1029
Industrial logic circuit
Temperature range:
Industrial _30°C to 85°C
•
•
•
•
SAA1029N
High noise immunity
High max input voltage
High voltage process
Short-circuit protected
TIMING
RESISTOR
TIMING
CAP
TIMING
RESISTOR
Package N-14
B60
Package N-16
Package N -16
SAA1049
Revolution counter
Temperature range:
Ext. Ind. -40 DC to 85 DC
Time proportional triac control
Temperature range:
Industrial -20 DC to 80 DC
SAA1049N
• Temperature compensation
• Supply voltage compensation
• Positive triggering
• Adjustable output pulse duration
TDA1023
TDA1023
• Adjustable hysteresis
• Fail safe
• Linear temperature scale
• Trigger current 200 mA(max)
• Supply current less than 30 mA
• Zero crossing
TRANSLATION {
CIRCUIT
Package N-16
Package N-14
TCA280A
Universal triac control
Temperature range:
Industrial -20 DC to 80 DC
TCA280A
On/off triac control
Temperature range:
Industrial -20 DC to 80 DC
TDA1024
TDA1024
• Adjustable hysteresis
• Trigger current capability 100 mA(max)
• Supply current 10 mA(typ)
• Zero crossing
• Universal triac control
• Zero crossing
• Trigger current 200 mA(max)
• Supply current 30 mA(max)
Package N-16
Package N
B61
general industrial
abridged data
TDA1060
Switched mode power supply control
Temperature range:
Military
-55 DC to 125 DC
Industrial -25 DC to 85 DC
•
Complete SMPS control
•
•
•
•
•
8 max control
Slow start
Current limit control
Over-current protection
Over-voltage protection
TDA1060B
TDA1060
CURRENT LIMIT
5
ascI LLATOR {
RC
7
Package F, N-16
TDA1092
Voltage indication circuit
Temperature range:
Industrial -40 DC to
•
•
•
•
•
•
85°C
TDA1092N
High voltage indication
Low voltage indication
Adjustable tresholds
Temperature compensation
Spike-protection
2 W output capability
cOavv+
52
2
7
51
3
6
TEST
53
4
5
OUT
Package N
Switched mode power supply control
Temperature range:
Commercial
0 DC to
70 0 C
•
Complete SMPS control
•
•
•
•
•
8 max control
Slow start
Current limit control
Over-current protection
Over-voltage protection
TDA3060
TDA3060
Package F, N-16
B62
timers
abridged data
Timer
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
•
•
•
•
NE555
SE555/555C
SE555F,N,T/SE555CF,N,T
NE555T, N
Timing over 9 decades
Operates in monostable"and astable modes
200 mA output current capability
SE555C is industrial spec maintained over
military temperature range
RESET
Package T
Package N
Dual timer
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
Package F
NE556
SE556/556C
SE556F, N/SE556CF, N
NE556N
• Timing over 9 decades
• Operates in monostable and astable modes
• Replaces two 555 timers
• SE556C is industrial spec maintained over
military temperature range
Package F, N-14
663
timers
abridged data
NE558
Quad timer
Temperature range:
Commercial 0 °c to 70°C
NE558N
• TTL compatible inputs and outputs
• All four monostables independentlY
adjustable
• 100 mA output sink capability
Package N-16
Quad timer
Temperature range:
Commercial 0 ° C to 70 ° C
NE559
NE559N
• TTL compatible inputs
• 100 mA output source capability
• All four monostables independently
adjustable
Package N-16
TDA0555
Timer
Temperature range:
Commercial 0 °c to 70°C
TDA0555D
• Timing over 9 decades
• Operates in monostable and astable modes
• 200 mA output current capability
Package SO-8
864
interface
selection guide
Peripheral interface
Peripheral drivers (TTL compatible)
device
no.
function
switching speed
ns
754508
NAND
30
754518
754528
754538
754548
NAND
AND
NOR
OR
053611
053612
053613
053614
UON5711
UON5712
UON5713
UON5714
output voltage
comments
packages
page
30
separate output transistor
F, N-14
875
25
35
25
35
30
output transistor is internally
connected
F,N,T
876·877
AND
NAND
OR
NOR
130
110
125
220
80
inputs compatible with
TTL and MOS
N
869·870
AND
NAND
OR
NOR
750
80
all devices have suppression
diodes on output
N
874
sink current
source current
F, N·16
F, N-18
872
NE590
NE591
V
100
70
Line receivers (TTL compatible)
device
no.
complexity
supply
voltage
V
common
mode voltage
V
propag.
delay
ns
diff.
input
output
enable
packages
page
85
no
no
F, N·14
871
F, N-14
875
MC1489
MC1489A
quad
+ 10
755107
755108
dual
± 5
± 3
17
yes
yes
057820
058820
057820A
058820A
dual
± 5
± 15
40
yes
yes
F
F, N·14
F
869
F, N-14
865
interface
selection guide
Peripheral interface
Data conversion products
device
function
MC1408-8
MC1508-8
temperature
range
number
of bits
settling time
typ
accuracy
packages
page
DAC
commercial
military
8
300 ns
±0,19%
F, N-16
B71
NE5007
NE5008
SE5008
DAC
commercial
commercial
military
8
100 ns
0,39%
0,19%
0,19%
F, N-16
B73
NE5009
SE5009
DAC
commercial
military
8
60 ns
±0,1%
F, N-16
F
B73
NE5018
SE5018
ADC
commercial
military
8
F, N-22
B73
21ls
±0,19%
function
bandwidth
packages
page
broadband video amplifier
differential input video amplifier
differential input video amplifier
14
120
120
K, N-14
F, K, N-14
F, K, N-14
872
872
870
F
Video amplifiers
NE/SE501
NE/SE592
IlA733/733C
Line drivers (TTL compatible)
device
no_
MC1488
OS7830
OS8830
866
complexity
quad
dual
supply
voltage
V
VOH
VOL
IOH
'Ol
V
V
rnA
rnA
propag_
delay
ns
±9
-7,0
6,8
-12
12
+5
-3,3
0,5
-40
40
packages
page
300
F,N-14
B71
12
F
F,N-14
B69
Display interface
Display drivers
device
no.
dispiay
function
OS8880
OS8880-1
gas disch.
7-segment
decoder
drivers
NE580
bar-graph
driver
NE582
LED
NE584-9
NE584-8
input
com pat.
BCD
ripple
output
decoder blanking current
mA
TTL
yes
yes
no
no
hex universal
driver
MOS/TTL no
no
gas disch.
cath. driver
MOS/TTL no
NE585-9
NE585-6
gas disch.
anode driver
NE586
NE588
LED
NE587
NE589
LED
output comments packages
voltage
V
80
100
constant
current
output
page
F, N-16
880
3,5
F, N-22
880
10
F, N-16
881
no
100
F,N-24
F, N-22
881
MOS/TTL no
no
100
F, N-22
F, N-16
882
fixed current
driver
microprocessor
yes
yes
25
0,7 to 3
F, N-16,
N-18
882
current programmable
driver
microprocessor
yes
yes
o to 15
-0,7 to-3
F, N-16,
N-18
882
0,2 to 1,5
400
displays
Transistor arrays
device
no.
function
CA3045
CA3046/86
transistor array
5 transistor array
CA3081
CA3082
CA3083
7 transistor array
7 transistor array
5 transistor array
CA3183
transistor array
NE5501
NE5502
NE5503
NE5504
7 n-p-n
Darlington pairs
VCBO
V
VCEsat IC
mA
V
current
gain
comments
packages
page
V
50
35
0,4
100
350
n-p-n transistors
N-14
878
878
50
35
0,8
100
300
common emitter
common collector
separate transistor
N-16
VCEO
878
879
879
B79
6
100
1,6
350
1000
general purpose
use with PMOS
with TTL/CMOS
PMOS/CMOS
N-16
883
867
interface
selection guide
Memory interface
Memory drivers (TTL compatible)
device
no.
supply
voltage
function
55325/75325
memory driver
75324
+14
+7,+25
output current
mA
td max
ns
packages
page
400
600
90
25
F, N·16
N·14
888
Dual memory sense amplifiers (TTL compatible)
device
no.
VTH
mV
VCM
V
output
configuration
typ tpd
ns
features
packages
page
7520
7521
19
22
±3
common collector
20
perform as flip-flops
F, N·16
884
7522
7523
19
22
±3
open collector
20
single ended output
F,N·16
885
7524
7525
19
22
± 2,5
common collector
25
separate outputs
F,N-16
885
7528
7529
19
22
± 2,5
common collector
25
output available as test points
F, N-16
B86
75232
75233
19
22
± 2,5
open collector
25
inverted outputs
F, N-16
B86
75234
75235
19
22
± 2,5
common collector
25
inverted outputs
F, N-16
B87
±3
active pull-up
open collector
17
F, N-14
B87
75S207
75S208
B68
peripheral interface
abridged data
Dual line receiver
DS7820/8820
Temperature range:
Military
_55°C to 125 °c
Commercial 0 °c to 70°C
DS7820F
DS8820F,N
• Operates from single 5 V supply
• Response time typically 50 ns
• Input voltage range, ± 15 V
• Fan-out of 2 with DTL or TTL
Dual differential line driver
DS7830/8830
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
•
•
•
DS7830F
DS8830F,N
Operates from single 5 V supply
Short-circuit protected outputs
Differential propagation delay typically 12 ns
Package F, N-14
Dual line receiver
DS7820A/8820A
Temperature range:
-55°C to 125 °c
Military
Commercial 0 °c to 70°C
DS7820AF
DS8820AF, N
• Operates from single 5 V supply
• Response time typically 50 ns
• Input voltage range, ± 15 V
• Fan-out of 10 with DTL or TTL
Package F, N-14
Dual AND peripheral driver
DS3611
Temperature range:
Commercial 0 °c to 70°C
DS3611 N
• 300 mA capability per driver
• High voltage output (80 V)
• TTL!DTL compatible
• Input clamping diodes
• Typical delay 125 ns
lA~.
Package F, N-14
18
2
aVec
7 2B
lY
3
6
2A
GNO
4
5
2Y
Package N
869
peripheral interface
abridged data
Dual NAND peripheral driver
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
•
DS3612
Dual NOR peripheral driver
Temperature range:
Commercial
0 °c to 70°C
DS3612N
DS3614N
• 300 mA capability per driver
• High voltage output (80 V)
• TIL!DTL compatible
• Input clamping diodes
• Typical delay 150 ns
300 mA capability per driver
High voltage output (80 V)
TTL!DTL compatible
Input clamping diodes
Typical delay 110 ns
lA~avcc
182
72B
lA~avcc
18
2
7
28
lY
3
6
2A
lY
3
6
2A
GND
4
5
2Y
GND
4
5
2Y
Package N
Package N
DS3613
Dual OR peripheral driver
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
•
DS3614
DS3613N
300 mA capability per driver
High voltage output (80 V)
TIL/DTL compatible
Input clamping diodes
Typical delay 125 ns
J.lA733/733C
Video amplifier
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
J.lA733F,K,N
J.lA733CF, K, N
120 MHz bandwidth
Gain adjustable from 10 to 400
No frequency compensation required
G2A GAIN SELECT
lA~'
aVec
182
72B
lY
3
6
2A
GND
4
5
2Y
Package N
870
Package F, N-14
8-bit D to A converter
MC1408-8
MC1508-8
Temperature range:
Military
-55°C to 125 °c
MC150S-SF, N
Commercial O°Cto 70°C
MC140S-SF,N
• Relative accuracy ± 0,19% error(max)
• Settling time 300 ns(typ)
• Non-invert liP TTL/CMOS compatible
• Output swing +0,5 to -5,0 V
• Multiplying input slew rate 4,0 mAills
• Standard supply voltages +5,0 V and -5,0 V to -15 V
Temperature range:
Commercial
0 °c to 70°C
Package F, N-14
•
•
•
•
MC1488
MC14SSF, N
Complies with CCITT recommendation V24
Current limited output at ± 10 mA typical
Simple slew rate control
Typical power dissipation, 440 mW at ± 12 V
Package F, N-14
MC14S9F, N
• Complies with CCITT recommendation V24
• 250 mV of input hysteresis
• Typical power dissipation 100 mW
Package F, N-16
Quad line driver
MC1489
Quad line receiver
Temperature range:
Commercial
0 °c to 75°C
MC1489A
Quad line receiver
Temperature range:
Commercial 0 °c to 75°C
MC14S9AF, N
• Complies with CCITT recommendation V24
• 1 V of input hysteresis
• Typical power dissipation 100 mW
Package F, N-14
B71
peripheral interface
abridged data
NE/SE501
Video amplifier
Temperature range:
Military
-55°C to 125 °c
Commercial
0 ° C to 70 ° C
SE501K, N
NE501K, N
•
•
•
•
•
NE591
Peripheral driver
Temperature range:
Commercial
0 °c to 70°C
NE591F, N
TTL compatible
Adjustable gain and impedance characteristics
Unity gain frequency 150 MHz
Typical gain 24 dB
Bandwidth 14 MHz (-3 dB)
V+
Package K
NE590
Peripheral driver
Temperature range:
Commercial
0 °c to 70°C
•
Package F, N-18
Package N-14
NE590F,N
NE/SE592
Video amplifier
Temperature range:
Military
_55°C to 125 °c
Commercial 0 °c to 70°C
SE592F,K,N
NE592F,K,N
TTL compatible
•
•
•
Package F, N-16
B72
120 M Hz bandwidth
Gain adjustable from 0 to 400
Suitable for high, low or bandpass filters
Package K
Package F, N-14
8-bit 0 to A converter
Temperature range:
Military
-55°Cto125°C
Commercial 0 °c to 70°C
NE5007
NE/SE5008
SE5008F, N
NE5007/8F, N
• Fast settling output current 85 ns
• Full scale current pre-matched to ± 1 lSB
• Direct interface to TTL, CMOS, ECl, HTl, PMOS
• Wide power supply range ± 4,5 V to ± 18 V
• Relative accuracy to 0,1% maximum over full temp_ range
Package F, N-16
8-bit 0 to A converter
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
•
NE/SE5009
SE5009F
NE5009F, N
Fast settling output current -60 ns typ; 135 ns max
Relative accuracy ± 0,1% max
Differential non-linearity ± 0,19% max
low scale current drift, ± 10 ppm/ °c typ
Package F, N-16
8-bit A to D converter
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
•
•
SE5018F
NE5018F, N
8-bit resolution
Input latches
Accurate to ± Y:, lSB
Amplifier and reference both short-circuit protected
Microprocessor compatible
Package F, N-22
873
peripheral interface
abridged data
Dual AND peripheral driver
UDN5711
Temperature range:
Commercial
0°Cto70°C
Dual OR peripheral driver
UDN5713
Temperature range:
Commercial
DoC to 70°C
UDN5711N
UDN5713N
• 300 mA capability per driver
• High voltage output (80 V)
• High voltage PNP inputs
• Output suppression diodes
• Input clamping diodes
• DTL/TTL compatible
• Typical delay 300 ns
• 300 mA capability per driver
• High voltage output (80 V)
• High voltage PNP inputs
• Output suppression diodes
• Input clamping diodes
• DTL/TTL compatible
• Typical delay 300 ns
STROBE~8
lA
Vee
2
7
lY
3
6
2Y
Gr-\O
4
5
SUPPRESSION
STAOBEmB
DIODE
2
7
1Y
3
6
2Y
GND
4
5
SUPPRESSION
DIODE
Package N
Dual NAND peripheral driver
•
•
•
•
•
•
•
Dual NOR peripheral driver
UDN5714
Temperature range:
Commercial
0 °c to 70°C
UDN5712N
•
•
•
•
•
•
•
300 mA capability per driver
High voltage output (80 V)
High voltage PNP inputs
Output suppression diodes
Input clamping diodes
DTL/TTL compatible
Typical delay 300 ns
STROBE~B
Vee
lA
2
7
lY
3
6
2Y
GNO
4
5
SUPPRESSION
2A
UDN5714N
300 mA capability per driver
High voltage output (80 V)
High voltage PNP inputs
Output suppression diodes
Input clamping diodes
DTL!TTL compatible
Typical delay 300 ns
STROBEmS
B74
Vee
lA
2
7
1Y
3
6
2Y
GND
4
5
SUPPRESSION
2A
DIODE
DIODE
Package N
2A
Package N
UDN5712
Temperature range:
Commercial
0°Cto70°C
Vee
lA
2A
Package N
755107
High-speed line receiver
Temperature range:
Commercial
0 °c to 70°C
75S107F, N
• Typical offset voltage 6 mV
• 8 ns typical propagation delay
• Totem-pole outputs
Package F, N-14
755108
High-speed line receiver
Temperature range:
Commercial
0 °c to 70°C
75S108F, N
• Typical offset voltage 6 mV
• 10 ns typical propagation delay
• Open-collector outputs
Package F, N-14
754508
Dual peripheral driver
Temperature range:
Commercial
0 °c to 70°C
75450BF, N
•
Dual NAND function plus uncommitted
transistors
• 30 V and 300 rnA output rating
• Typical delay 20 ns
Package F, N-14
875
peripheral interface
abridged data
75451B
Dual peripheral driver
Temperature range:
Commercial
0 °c to 70°C
•
•
•
75451BF, N, T
Dual AND function
30 V and 300 mA output rating
Typical delay 20 ns
Vee
lA~8vee
182
728
IV
3
6
2A
GND
4
5
2V
GND
Package T
Package N
Package F
Dual peripheral driver
75452B
Temperature range:
Commercial
0 °c to 70°C
•
•
•
75452BF,N,T
Dual NAND function
30 V and 300 mA output rating
Typical delay 20 ns
Vee
lA~8vee
2A
18
2
7
28
IV
3
6
2A
GND
4
5
2Y
GND
Package T
B76
Package N
Package F
754538
Dual peripheral driver
Temperature range:
Commercial 0 °c to 70°C
75453BF, N, T
• Dual OR function
• 30 V and 300 mA output rating
• Typical delay 20 ns
Vee
'A~8vee
182
72B
lY
3
6
2A
GND
4
5
2Y
Package T
Package F
Package N
754548
Dual peripheral driver
Temperature range:
Commercial
0 °c to 70°C
75454BF, N, T
• Dual NOR function
• 30 V and 300 mA output rating
• Typical delay 20 ns
Vee
'A~8vee
Package T
182
728
lY
3
6
2A
GND
4
5
2Y
Package N
Package F
B77
display interface
abridged data
For other transistor array requirements contact us - see back cover for address.
General purpose NPN transistor array
CA3045
General purpose NPN transistor array
CA3046
CA3086
Temperature range:
Military
-40°C to 125 °c
•
•
3 single transistors
2 common emitter transistors
•
•
•
•
VCEO
VCBO
VEBO
VCEsat
CA3046N, CA3086N
35V
50V
6V
0,4 V
Package N-14
General purpose NPN transistor array
Temperature range:
-55°C to 125 °c
Military
•
•
•
•
•
•
CA3081
CA3081N
Current 100 mA{max)
VCEsat 0,4 V at 50 mA(typ)
VCEO
16 V(max)
VCBO
20 V(max)
VEBO
5 V(max)
Common emitter
Package N-16
878
CA3082
General purpose NPN transistor array
Temperature range:
Military
_55°C to 125 °c
•
•
•
•
•
•
CA3082N
Current 100 mA(max)
VCEsat 0,4 V at 50 mA(typ)
VCEO
16 V(max)
VCBO
20 V(max)
VEBO
5 V(max),
Common collector
Package N-16
CA3083
General purpose NPN transistor array
Temperature range:
Military
-55°C to 125 °c
•
•
•
•
•
CA3083N
Current 100 mA(max)
VCEsat 0,4 V at 50 mA(typ)
VCEO
16 V(max)
VCBO
20 V(max)
VEBO
5 V(max)
Package N-16
General purpose NPN transistor array
CA3183
B79
display interface
abridged data
OS8880
7-segment decoder/driver
Temperature range:
Commercial
0 °c to 70°C
DS8880N
•
Directly drives high voltage gas discharge
displays
• Ripple blanking facility
• TTL compatible inputs
• 135 mW typical power dissipation
Package F, N-16
7-segment decoder/driver
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
•
OS8880-1
DS8880-1 F, N
Directly drives high voltage gas discharge
displays
Ripple blanking facility
TTL compatible inputs
135 mW typical power dissipation
100 V interface
Package F, N-16
Bar-graph driver
Temperature range:
Commercial 0 °c to 70°C
PHASE 2
1
NE580
22 PHASE 3
NE580F,N
• Dual channel device
• Easily expandable to handle more channels
• Single 5 V supply
• 3, 5 or 6-phase operation
• Can be custom masked for different cathode
segment counts (max 240)
• Overrange indication outputs
Package F, N-22
B80
NE582
Hex universal driver
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
NE582F, N
Low saturation voltage 0,5 V(typ)
Output sink capability
- each output 400 mA
- all outputs 1200 mA
Low input current loading
Suitable for 3 V battery operation
Package F, N-16
Gas discharge cathode driver
Temperature range:
Commercial
0 °c to 70°C
NE584
NE584F, N
•
•
•
Segment current programmability up to 5 mA
Integral current limiting
Minimum component count
for system cost effectiveness
•
•
•
•
I nternal feedback network
High output breakdown 90 V
Internal output pull-up
8 or 9 segment versions
NE584-9
NE584-8
Package F, N-22
Package F, N-24
881
display interface
abridged data
NE585
Gas discharge anode driver
Temperature range:
Commercial
0 0 C to 70 0 C
•
•
•
NE585F, N
Segment current programmability
Internal current limiting
Minimum component count
for system cost effectiveness
•
I nternal feedback network
•
•
•
•
Automatic loop control of firing voltage
6 or 9 digit versions
High output breakdown 90 V
Internal output pull-down
NE585-9
NE585-6
Package F, N-16
NE586 to 589
LED drivers
Temperature range:
Commercial
0 °c to 70°C
•
•
•
•
•
Package F, N-22
NE586 to 589F, N
Input microprocessor compatible
NE586, NE588 fixed current
NE587, NE589 current programmable
NE586, NE587 current sinking outputs
NE588, NE589 current sourcing outputs
NE587; NE589
NE586; NE588
Package F, N-16
B82
Package F, N-18
NE5501
Darlington transistor array
Temperature range:
Commercial
0 °c to 85
•
•
•
•
°c
NE5501N
•
•
•
•
•
High current 350 mA(max)
VCEsat 1,6 V at 350 mA(max)
Output breakdown voltage 100 V(min)
Input voltage
VIN 30 V(max)
°c
Darlington transistor array
•
•
•
•
•
°c
Package N-16
NE5502
NE5502N
High current 350 mA(max)
VCEsat 1,6 Vat 350 mA(max)
Output breakdown voltage 100 V(min)
Input voltage
VIN 30 V(max)
Each input has zener diode and resistor
current limiting
Package N-16
NE5503N
High current 350 mA(max)
VCEsat 1,6 V at 350 mA(max)
Output breakdown voltage 100 V(min)
Input voltage VIN 30 V(max)
Each input has series resistor
Package N-16
Temperature range:
Commercial
0 °c to 85
NE5503
Darlington transistor array
Temperature range:
Commercial
0 °c to 85
Darlington transistor array
Temperature range:
Commercial
0 °c to 85
•
•
•
•
•
°c
NE5504
NE5504N
High current 350 mA(max)
VCEsat 1,6 Vat 350 mA(max)
Output breakdown voltage 100 V(min)
Input voltage V IN 30 V(max)
Each input has series resistor
Package N-16
883
memory interface
abridged data
7520
Dual core sense amp
Temperature range:
Commercial
0 °c to 70°C
7520F,N
• Typical propagation delay 25 ns
• Complementary outputs with strobes
• No external stabilizing capacitor necessary
• ± 4 mV threshold uncertainty
Package F, N-16
Dual core sense amp
Temperature range:
Commercial
0 °c to 70°C
7521
7521F,N
• Typical propagation delay 25 ns
• Complementary outputs with strobes
• No external stabilizing capacitor necessary
• ± 7 mV thresehold uncertainty
Package F, N-16
B84
7522
Dual core sense amp
Temperature range:
0 °c to 70°C
Commercial
•
•
•
•
7522F, N
Package F, N-16
Package F, N-16
7523
Dual core sense amp
7523F, N
• Typical propagation delay 25 ns
• Open collector output
• No external stabilizing capacitor necessary
• ± 7 mV threshold uncertainty
Package F, N-16
7524F, N
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabilizing capacitor necessary
• ± 4 mV threshold uncertainty
Typical propagation delay 25 ns
Open collector output
No external stabilizing capacitor necessary
± 4 mV threshold uncertainty
Temperature range:
0 °c to 70°C
Commercial
7524
Dual core sense amp
Temperature range:
0 °c to 70°C
Commercial
Dual core sense amp
Temperature range:
Commercial 0 °c to 70°C
7525
7525F, N
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabil izing capacitor necessary
• ± 7 mV threshold uncertainty
Package F, N-16
B85
memory interface
abridged data
7528
Dual core sense amp
Temperature range;
0 °c to 70°C
Commercial
7528F,N
•
•
•
•
•
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabilizing capacitor necessary
• Amplifier output available as a test point
• ± 4 mV threshold uncertainty
-----
Dual core sense amp
•
•
..
•
•
Typical propagation delay 25 ns
Independent outputs with gating
No external stabilizihgcapacitor necessary
Amplifier output available as a test point
± 7 mV threshold uncertainty
Package F, N-16
B86
-----
Package F, N-16
7529
7529F, N
75232F, N
Typical propagation delay 25 ns
Independent outputs with gating
No external stabilizing capacitor necessary
Open collector output
± 4 mV threshold uncertainty
Package F, N-16
Temperature range:
0 °c to 70°C
Commercial
75232
Dual core sense amp
Temperature range:
Commercial
0 °c to 70°C
75233
Dual core sense amp
Temperature range:
Commercial 0 °c to 70°C
75233F,N
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabilizing capacitor necessary
• Open collector output
• ± 7 mV threshold uncertainty
Package F, N-16
75234
Dual core sense amp
Temperature range:
0 °c to 70°C
Commercial
75234F,N
•
•
•
•
•
•
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabilizing capacitor necessary
• ± 4 mV threshold uncertainty
Package F, N-14
75235
Dual core sense amp
75235F, N
• Typical propagation delay 25 ns
• Independent outputs with gating
• No external stabilizing capacitor necessary
• ± 7 mV threshold uncertainty
Package F, N-16
75S207F,N
17 ns guaranteed propagation delay
20 t-tA(max) input bias current
STTL compatible strobes and outputs
Large common mode input voltage range
Standard supply voltages
Function and pin compatible with SN75207
Package F, N-16
Temperature range:
Commercial
0 °c to 70°C
75S207
High-speed dual sense amp
Temperature range:
Commercial
0 °c to 70°C
75S208
High-speed dual sense amp
Temperature range:
0 °c to 70°C
Commercial
•
•
•
•
•
•
•
75S208F,N
17 ns guaranteed propagation delay
20 pA(max) input bias current
STTL compatible strobes and outputs
Large common mode input voltage range
Standard supply voltages
Function and pin compatible with SN75208
Open collector outputs
Package F, N-14
887
memory interface
abridged data
55325/75325
Memory driver
Temperature range:
Military
-55°C to
Commercial 0 ° C to
125 °c
70 ° C
55325F
75325F,N
•
•
•
•
•
600 mA output capability
Propagation delays 25 ns(typ)'
Output short-circuit protected
Dual sink and source outputs
Minimum time skew between address
and output current rise
• 24 V output
SOURCE
CONNECTORS
capability
75324
Memory driver
Temperature range:
Commercial
0 °c to 70°C
75324N
• 400 mA output capability
• Internal decoding and timing
• Output short-circuit protection
• Dual sink/source outputs
~ND~RESS
ADDRESS
IN B
ADDRESS
IN C
TIMING
IN E
T~M~NG
TIMING
IN G
~NDgRESS
Package F, N-16
B88
Package N-14
telecommunications
survey
page
MC1496/1596
NE503
NE504
Double balanced mixer/modulator
Bucket brigade delay line
Bucket brigade delay line
890
NE/SE560
NE/SE561
NE/SE562
NE/SE564
Phase locked
Phase locked
Phase locked
Digital phase
B91
NE/SE565
NE/SE566
NE/SE567
Phase locked loop
Function generator
T one decoder
NE570
NE571
NE575
Analogue compandor
Analogue compandor
Phase locked loop
NE593
NE/SE5596
S05000
Sextuple latch
Double balanced mixer/modulator
Quad analogue S.P.S.T. switch
894
S05001
SD5002
S05100
S05101
Quad analogue S.P.S.T. switch
30 V driver circuit
Four channel multiplexer
Four channel multiplexer
895
S05200
S05301
TAA960
TAA970
Quad analogue S.P.S.T. driver
Cross point switch
Triple amp
Microphone amp
896
TBA673
TBA915
TCA210
TCA240
Ring modulator
Low power audio amp
Low power audio amp
Double balanced mixer/modulator
897
TCA580
TCA770A
TCA980
TOA1022; NE502
Gyrator
IF limiter amp
Microphone amp
Bucket brigade delay line
898
loop
loop
loop
locked loop
B92
B93
889
telecommunications
abridged data
MC1496/1596
Double balanced mixer/modulator
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
MC1596F, K, N
MC1496F, K, N
Package F, N-14
Package K
NE503
Bucket brigade delay line
Temperature range:
Industrial -20°C to 85°C
•
•
•
•
NE503N
Clock frequency 5-100 kHz
1536 buckets
Signal delay 153,6 JlS ~ 7,68 ms
Attenuation 0 dB
CLOCK
'Os
SUSSTRATE
CLOCK2
2
7
V7
SAMPLE IN
3
6
OUT 1536
OUT 1537
4
5
Voo
Package N
NE504
Bucket brigade delay line
Temperature range:
Industrial -20°Cto 85°C
•
•
•
•
NE504N
Clock frequency 5-500 kHz
2 x 256 buckets
Signal delay 256 JlS - 25,6 ms
Attenuation 3,5 dB
IAI
161
Package N -16
B90
NE/SE560
Phase locked loop
Temperature range:
Military
-55 OCto 125°C
Commercial
0 °c to 70°C
•
•
•
SE560F
NE560F, N
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
FM demodulation without tuned circuits
Bandpass adjustable down to ± 1%
Operating frequency up to 30 MHz typical
NE/SE562
Phase locked loop
SE562F
NE562F, N
FM demodulation without tuned circuits
Frequency multiplication and division
Operating frequency up to 30 MHz typical
Vco
PH COMP
IN 1
TIMING CAP
Vco
TIMING CAP
Vco
TIMING CAP
Vco
TIMING CAP
Package F, N-16
NE/SE561
Phase locked loop
Temperature range:
Military
-55°C to 125 °c
Commercial
0 °c to 70°C
•
•
•
SE561F
NE561F,N
FM demodulation without tuned circuits
Synchronous AM detection
Operating frequency up to 30 MHz typical
Package F, N-16
Package F, N-16
NE/SE564
Phase locked loop
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
SE564F
NE564F, N
Operation with 5 V supply
• TTL compatible inputs/outputs
•
•
•
Reduced carrier feed-through
External loop gain control
Operation to 50 MHz
Package F, N-16
891
telecommunications
abridged data
NE/SE565
Phase locked loop
Temperature range:
Military
-55°C to 125 °c
Commercial
0 °c to 70°C
•
•
•
SE565K
NE565K, N
Frequency range 0,001 Hz to 500 kHz
High linearity of demodulated output,
0,2% typical
Bandpass adjustable from ± 1% to ± 60%
PHASE COMP
Veo IN
EXTERNAL
C FOR Veo
DEMODULATED
OUT
EXTERNAL
R FOR Veo
PHASE COMPARATOR
Veo IN
Package
t<
Package N-14
Function generator
Temperature range:
Military
_55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
NE/SE566
SE566T
NE566N, T
High linear triangle wave output
Temperature stability typically 200 ppm/DC
Frequency range from 0,01 Hz to 1 MHz.
GND~8V+
NC
2
SOURCE
7
C1
SO WAVE OUT
3
""GGeR
6
R1
~~I0:Ng~~
4
5
MOD IN
TRIANGLE WAVE OUT
Package T
Package N
NE/SE567
Tone decoder
Temperature range:
Military
-55°C to 125 °c
Commercial 0 °c to 70°C
•
•
•
SE567T
NE567N, T
Wide frequency range 0,01 Hz to 500 KHz
Independently controlled bandwidth,
up to 14%
Logic compatible open collector output.
OUT
SUPPLY
VOLTAGE +V
Package T
B92
Package N
NE570
Analogue compandor
Temperature range:
Industrial -4.0 °c to 70°C
•
•
•
•
•
NE570F, N
Complete IC compressor expandor
110 dB dynamic range
Operates down to 6 V
Typical noise 15 IlV
Full audio bandwidth
Package F, N-16
Analogue compandor
Temperature range:
Industrial _40°C to 70°C
•
•
•
•
•
NE571
NE571F,N
Complete IC compressor expandor
110 dB dynamic range
Operates down to 6 V
Typical noise 10 IlV
Full audio bandwidth
Package F, N-16
NE575
Phase locked loop
Temperature range:
Commercial 0 °c to 70°C
•
•
•
•
NE575N
Single crystal
Binary input
ROM-programmed
Supply 8 to 16 V
Package N-16
893
telecommunications
abridged data
NE593
Sextuple latch
Temperature range:
Industrial _25°C to 85°C
•
•
•
•
NE593N
Driving loads from 30 V supply
100 mA output
TTL inputs
Chip enable
Package N-16
NE/SE5596
Double balanced mixer/modulator
Temperature range:
Military
_55°C to 125 °c
Commercial 0 °c to 70°C
•
•
SE5596F,K,N
NE5596F, K, N
POS
SIGNAL IN
Carrier suppression 65 dB typical at 0,5 MHz
Common mode rejection 85 dB
GAIN ADJUST
2
GAIN ADJUST
4
NEG
SIGNAL IN
10
~!~RIER
IN
POS
CARRIER IN
BIAS
Package K
Package F, N-14
Quad analogue S.P.S.T. switch
Temperature range:
Commercial
0 °c to 85°C
•
•
•
•
•
•
SD5000
SD5000F, N
Analogue signal range ± 10 V
Ultra·fast td(ON) 1 ns(max)
Isolation (at 3 kHz) 105 dB (typ)
ON resistance 30 Q (typ)
Low feed-through and feedback transients
Zener diode protected
Package F, N·16
B94
Quad analogue S.P.S.T. switch
Temperature range:
Commercial
0 °c to 85°C
•
•
•
..
•
•
SD5001
Four channel multiplexer
Temperature range:
Commercial
0 °c to 85°C
SD5001 F, N
Package F, N-16
Temperature range:
Commercial 0 °c to 85°C
Package F, N-14
SD5002
SD5002F, N
• Analogue signal range ± 7,5 V
• Ultra-fast td(ON) 1 ns (max)
• Isolation (at 3 kHz) - 105 dB (typ)
• ON resistance 30 n (typ)
• Low feed-through and feedback transients
• Zener diode protected
Package F, N-16
SD5100F, N
• Analogue signal range ± 10 V
• Ultra-fast td(ON) 1 ns(max)
• Isolation (at 3 kHz) - 105 dB (typ)
• ON resistance 30 n (typ)
• Low feed-through and feedback transients
• Zener diode protected
Analogue signal range ± 5 V
Ultra-fast td(ON) 1 ns (max)
Isolation (at 3 kHz) - 105 dB (typ)
ON resistance 30 n (typ)
Low feed-through and feedback transients
Zener diode protected
30 V driver circuit
SD5100
SD5101
Four channel multiplexer
Temperature range:
Commercial
0 °c to 85°C
SD5101F,N
• Analogue signal range ± 5 V
• Ultra-fast td(ON) 1 ns(max)
• Isolation (at 3 kHz) -105 dB (typ)
• ON resistance 30 n (typ)
• Low feed-through and feedback transients
• Zener diode protected
Package F, N-14
B95
telecommunications
abridged data
Quad analogue S.P.S.T. driver
Temperature range:
Commercial 0 ° C to 85 ° C
SD5200
Temperature range:
Ext. Ind. -55°C to 65°C
SD5200F, N
• Drive capability ± 15 V
• Ultra·fast td(ON) 1 ns(max)
• Isolation (at 3 kHz) - 105 dB (typ)
• ON resistance 30 n (typ)
• Low feed-through and feedback transients
• Zener diode protected
Temperature range:
Commercial 0 °c to 70°C
Package K
•
•
•
•
•
•
SD5301
S05301 F, N
Insertion loss
0,1 dB (typ)
Crosstalk
-120 dB (typ)
Isolation
-120 dB (typ)
Supply current
4 rnA (typ)
VOO
10-15 V
TTL/C-MOS compatible controls
TAA960
• Input resistance 25 kn (min)
• Supply current 2 mA (typ)
• Voltage gain 39 dB (typ)
• Emitter follower output stage
Package F, N-16
Cross point switch
TAA960
Triple amp
TAA970
Microphone amp
Temperature range:
Industrial _35°C to 75°C
•
•
•
TAA970
Reversible polarity
Line current 10 to 100 mA
Voltage drop 4,8 V (typ)
NC
Package F, N-16
B96
Package K
Ring
TBA673
mod~lator
Temperature range:
Industrial -25°C to 75°C
Low power audio amp
TCA210
Temperature range:
Military
-55°C to 125 °c
TBA673
• Closely matched transistors
• ICBO less than 100 nA
• fT 160 MHz (typ)
TCA210
•
•
•
•
•
Separate pre-amp
Power output 500 mW
Total harmonic distortion less than 5%
Quiescent current 8 rnA (typ)
Pre-amp voltage gain 10000
noise figure typo 4 dB
• Supply 12 V
INV
PRE-AMP IN
PRE-AMP
SOUElCH
GNO
PRE-AMP OUT
3
AMP
SOUElCH
AMP
GNO
MOD
OUT
Package N-16
Package K
Low power audio amp
TBA915
Temperature range:
-55°C to 125 °c
Military
•
•
•
•
TBA915
Quiescent current 2 rnA (typ)
Output power 500 mW
Total harmonic distortion less than 5%
Supply voltage 12 V
Double balanced mixer/modulator
Temperature range:
Industrial -20°C to 70°C
TCA240
TCA240
• VBE match less than 2,5 mV
• hFE 23 to 190
GNO
IC
Package K
Package N-16
B97
telecommunications
abridged data
TCA580
Gyrator
Temperature range:
Industrial _20°C to 70°C
TCA580
•
Frequency range DC to 10 kHz
•
Q factor over 500
•
Very high simulated inductance
•
•
•
Temperature range:
Industrial -30°C to 70°C
• Total current consumption 450 JJ.A
• Supply voltage 7,5 V
• Frequency range 100-500 kHz
• AM rejection 50 dB (typ)
Package N-16
B98
Package DE
TCA770A
TCA770A
TDA980
Reversible polarity
Line current 10 to 100 nA
Voltage drop 4,5 V (typ)
Package N-16
IF limiter amp
TCA980
Microphone amp
Temperature range:
Military
_55°C to 125 °c
TDA1022
NE502
Bucket brigade delay line
Temperature range:
Industrial -20°C to 85°C
TDA1022,NE502N
• Clock frequency 5 to 500 kHz
• 512 buckets
• Signal delay 0,5 to 50 ms
• Frequency range 0 to 45 kHz
• Attenuation 4 dB (typ)
Package N-16
LOCMOS
HE4000B tam iIy
For detailed information
Handbook Se6
The LOCMOS HE4000B range is a fully buffered digital integrated circuit family which meets the
Jedec-B specification. The members of this family are plug-in replacements for the well-known
C-MOS 4000 and 14500 ranges. The HE family has the same advantages as conventional C-MOS
circuits, plus the additional LOCMOS advantages. Recommended supply voltage range 3 to 15 V.
LOCMOS means Local Oxidation Complementary MOS.
Inputs and outputs are protected against electrostatic effects in a wide variety of device-handling
situations. However, to be totally safe, it is desirable to take handling precautions into account.
Advantages of the C-MOS:
• low power dissipation - typically 10 nW per gate (static)
• wide operating supply voltage range
• wide operating temperature range from -40 to +85 °c
• high d.c. fan-out
• inputs and outputs are protected against electrostatic voltages
In
•
•
•
•
addition to these, the LOCMOS HE4000B range has:
buffered outputs on ali circuits
higher speed
higher packing density- essential for MSI/LSI
excellent noise immunity
The HE family is designed with standardized output drive characteristics which, combined with
relative intensitivity to output capacitance loading, simplify system design.
Family ratings
Limiting values in accordance with the Absolute Maximum System (IEC 134)
supply voltage
VOO
voltage on any input
VI
current into any input
± II
-0,5 to +18
max.
V
-0,5 to (VDD + 0,5)
V*
10
rnA
power dissipation per package
for Tamb = -40 to +60 °c
for T amb = + 60 to +85 °C
max.
Ptot
400
derate linearly with 8 mWfC to 200 mW
mW
operating ambient temperature
Tamb
storage temperature
Tstg
°c
°c
-40 to +85
-65 to +150
* VOO + 0,5 V should not exceed 18 V.
899
LOCMOS
HE4000B family
Type numbers have a suffix which signifies the type
of·package: P = plastic OIL; 0 = ceramic OIL
Family characteristics (d.c.) at VSS = 0
parameter
symbol
Quiescent device
current for gates
IDD(~A)
Quiescent device
current for buffers,
and flip·flops
Quiescent device
current for MSI
Quiescent device
current for lSI
Output voltage lOW
I10f< 1 ~A
IDD(~A)
IDD(~A)
IDD(~A)
VOl(V)
Tamb = -40°C Tamb = +25 °c
min
min
max
max
Tamb = +85 °c
min
max
VDD
V
-
-
5
10
15
-
-
4,0
8,0
16,0
-
4,0
8,0
16,0
0,05
0,05
0,05
Input voltage lOW
1101< l~A
-
Output (source)
current HIGH
1,0
2,0
4,0
50
100
200
4,95
9,95
14,95
Output (sink)
current lOW
-
20
40
80
Output voltage HI G H
VOH(V)
1101< lp.A
Input voltage HIGH
1101< 1 ~A
1,0
2,0
4,0
1,5
3,0
4,0
VIH(V)
3,5
7,0
11,0
-
-
10LlmA)
-
-IOH(mA)
0,52
1,3
3,6
-
-
-
50
100
200
-
1,5
3,0
4,0
-
0,44
1,1
3,0
-
-
30
60
120
5
10
15
150
300
600
5
10
15
375
750
1500
5
10
15
-
0,05
0,05
0,05
VI
5
10
15
VI = VSS or VOD
5
10
15
Vo=0,50r 4,5V
Vo = 1,00r 9,0 V
Vo = 1,5 or 13,5 V
-
5
10
15
Vo = 0,5 or 4,5V
Vo = 1,0 or 9,0 V
Vo = 1,5 or 13,5 V
-
5
10
15
VO=O,4;V,=Oor 5V
Vo = 0,5; V, = 0 or 10 V
Vo = 1,5; V, = 0 or 15 V
5
10
15
VO= 4,6;VI = 0 or 5V
VO= 9,5; VI = 0 or 10 V
VO= 13,5; VI =Oor 15V
-
-
-
-
1,5
3,0
4,0
-
0,36
0,9
2,4
-
-
0,36
0,9
2,4
-
all valid input
combinations;
V, = VSS or VDD
5
10
15
-
3,5
7,0
11,0
-
0,44
1,1
3,0
-
4,95
9,95
14,95
-
-
-
-
-
-
-
-
20
40
80
0,05
0,05
0,05
3,5
7,0
11,0
-
0,52
1,3
3,6
-
4,95
9,95
14,95
-
Vll(V)
-
7,5
15,0
30,0
-
conditions
-
-
= VSS or VOD
Input leakage current ± IIN(~A)
-
0,3
-
0,3
-
1,0
15
VI = 0 or 15 V
Three·state output
10ZH(~A)
leakage current; HIGH
-
1,6
-
1,6
-
12,0
15
output returned to VOD
Three·state output
_I
(p.A)
leakage current; LOW OZl
-
1,6
-
1,6
-
12,0
15
output returned to VOD
Input capacitance
per unit load
-
-
7,5
-
-
-
any input
Bl00
C,N(pF)
-
*CP= clock input to output
I = input to output
one figure means equal delays
propagation
delay *
conditions for tPLH; tPHL; f max ; dissipation:
VDD = 10 V; CL = 50 pF
tPLH; tPHL
ns
maximum dyn~mic
clock pulse dissipation
frequency at 1 MHz
MHz
mW
NAND gates
HEF4011B
HEF4012B
HEF4023B
HEF4068B
quadruple 2-input NAND gate
dual 4-input NAND gate
triple 3-input NAND gate
8-input NAND gate
(I)
(I)
(I)
(I)
25
30; 25
30; 25
35;40
26
14
20
AND gates
HEF4073B
HEF4081B
HEF4082B
triple 3-input AND gate
quadruple 2-input AND gate
dual 4-input AND gate
(I)
(I)
(I)
20; 25
20;25
30
18
24
17
NOR gates
HEF4000B
HEF4001B
HEF4002B
HEF4025B
HEF4078B
dual 3-input NOR gate and inverter
quadruple 2-input NOR gate
dual 4-input NOR gate
triple 3-input NOR gate
8-input NOR gate
(I)
(I)
(I)
(I)
(I)
35
25
25
25
35
23
25
14
19
8
OR gates
HEF4071B
HEF4072B
HEF4075B
quadruple 2-input OR gate
dual 4-input OR gate
triple 3-input OR gate
(I)
20;25
35
30
25
15
19
(I)
(I)
(I)
(I)
(I)
(I)
(I)
20
20
30;20
25; 20
20
45
25;30
30;35
35
53
46
42
34
55
55
53
25
25
25
13
8
I nverters and HEF4007UB dual complementary pair and inverter
quadruple true/complement buffer
HEF4041B
buffers
hex inverting buffers
HEF4049B
hex non-inverting buffers
HEF4050B
HEF4069UB hex inverter
strobed hex inverter/buffer
HEF4502B
HEF40097B 3-state hex non-inverting buffer
HEF40098B 3-state hex inverting buffer
(I)
(I)
(I)
Complex
gates
HEF4030B
HEF4070B
HEF4077B
HEF40858
HEF4086B
quadruple EXCLUSIVE-OR gate
quadruple EXCLUSIVE-OR gate
quadruple EXCLUSIVE-NOR gate
dual 2-wide 2-input AND-OR-invert gate
4-wide 2-input AND-OR-invert gate
(I)
(I)
(I)
(I)
(I)
30;35
30;35
30;35
30
40
Flip-flops
HEF4013B
HEF4027B
HEF4076B
HEF40174B
HEF40175B
dual D-type flip-flop
dual JK flip-flop
quadruple D-type flip-flop with 3-state outputs
hex Ootype flip-flop
quadruple D-type flip-flop
(CP)
(CP)
(CP)
(CP)
(CP)
40
50
65;60
30
30;35
Specials
HEF4046B
HEF4738V
HEF4739V
phase-locked loop
IEC/IEEE bus interface
digital voltmeter circuit
8
25
15
22
30
30
15
14
19
31
28
6101
LOCMOS
HE4000B family
*CP= clock input to output
I = input to output
one figure means equal delays
propagation
delay *
conditions for tPLH; tPHL; f max ; dissipation:
VDD= 10V;CL=50pF
Counters
Registers
HEF4017B
HEF4018B
HEF4020B
HEF4022B
HEF4024B
HEF4029B
HEF4040B
HEF4510B
HEF4516B
HEF4518B
HEF4520B
HEF4521B
HEF4522B
HEF4526B
HEF4534B
HEF4737B; V
HEF40160B
HEF40161B
HEF40162B
HEF40163B
HEF40192B
HEF40193B
(CP)
95; 75
5-stage Johnson counter
(CP)
55; 65
presettable divide-by-n counter
50;45
(CP)
14-stage binary counter
95;75
(CP)
4-stage divide-by-8 Johnson counter
(CP) 45:40
7-stage binary counter
(CP)
60;55
synchronous up/down counter, binary/decade counter
(CP)
50;45
12-stage binary counter
(CP)
65;60
BCD up/down counter
(CP) 65;60
binary up/down counter
(CP)
65;75
dual BCD up counter
(CP) 65; 75
dual binary counter
(I)
400
24-stage frequency divider
programmable 4-bit BCD down counter
programmable 4-bit binary down counter
(CP) 750
real time 5-decade counter
(CP) 450
quadruple static decade counters
45
4-bit synchronous decade counter with asynchronous reset (CP)
45
4-bit synchronous binary counter with asynchronous reset (CP)
45
4-bit synchronous decade counter with synchronous reset (CP)
45
4-bit synchronous binary counter with synchronous reset (CP)
(CP)
70;85
4-bit up/down decade counter
(CP)
70;85
4-bit up/down binary counter
HEF4006B
HEF4014B
HEF4015B
HEF4021B
HEF4031B
HEF4035B
18-stage static sh ift register
8-bit shift register
dual 4-bit static shift register
8-bit static sh ift register
6~-stage static sh ift register
4-bit universal shift register
quadruple D-type register with 3-state outputs
(CP)
(CP)
(CP)
(CP)
(CP)
(CP)
(CP)
8-stage shift-and-store bus register
dual 64-bit static sh ift register
l-to-64-bit variable length shift register
quadruple 64-bit static shift registers
4-bit bidirectional universal shift register
4-bit universal shift register
quadruple 2-input multiplexer
8-input multiplexer with 3-state output
quadruple 2-input multiplexer
dual 4-input multiplexer
HEF4076B
HEF4094B
HEF4517B
HEF4557B
HEF4731 B; V
HEF40194B
HEF40195B
Digital
multiplexers
B102
tPLH;tPHL
ns
HEF4019B
HEF4512B
HEF4519B
HEF4539B
maximum dynamic
clock pulse dissipation
frequency at 1 MHz
mW
MHz
16
11
25
16
25
25
25
24
24
15
15
25
7
8
8
7
8
10
9
10
10
13
13
10
6
10
25
25
25
25
18
18
11
11
11
11
40
50;60
55; 60
55;65
80;85
65; 70
30
22
23
25
14
25
18
13
28
13
19
15
65;60
120
80;85
80;85
80; 85
35;40
45;50
22
19
(CP)
(CP)
(CP)
(CP)
(CP)
(CP)
8
14
14
14
30
28
45
17
60
17
21
(I)
(I)
(I)
(I)
25;30
40;35
40;45
50; 45
8
25
7
26
13
*A
D
I
R/S
= address to output
= data to output
= input to output
= reset/set input to output
tACC = read access time
ST
= strobe input to output
one figure means equal delays
propagation
delay *
ON-state
frequency
response
MHz
dynamic
dissipation
at 1 MHz
mW
conditions for tpLH; tPHL;f max ; dissipation:
VDD= 10V;CL=50pF
tPLH; tPHL
ns
Decoders
1-of-l0 decoder
BCD to 7-segment latch/decoder/driver
1-of-16 decoder/demultiplexer .with input latches
1-of-16 decoder/demultiplexer with input latches
BCD to 7-segment latch/decoder driver
for liquid crystal and LED displays
dual 1-of-4 decoder/demultiplexer
dual 1-of-4 decoder/demultiplexer
(A)
(A)
(A)
(A)
(A)
45; 50
55; 60
95
95
60;70
13
44
11
11
46
(A)
(A)
55;45
40;50
29
28
Analogue
HEF4016B
switches and HEF4051B
multiplexers/ HEF4052B
demultiplexers H E F4053B
HEF4066B
HEF4067B
quadruple bilateral switches
8-channel analogue multiplexer/demultiplexer
dual 4-channel analogue multiplexer/demultiplexer
triple 2-channel analogue multiplexer/demultiplexer
quadruple bilateral switches
16-channel analogue multiplexer/demultiplexer
(I)
(I)
10
5
5
5
5
10;15
Latches
HEF4042B
HEF4043B
HEF4044B
HEF4508B
HEF4724B
quadruple D-Iatch
quadruple R/S latch with 3-state outputs
quadruple R/S latch with 3-state outputs
dual 4-bit latch
8-bit addressable latch
(D)
40
(R/S) 25; 35
(R/S) 40
(ST)
50
(D)
35
36
14
15
19
24
Translator
HEF4104B
quadruple low to high voltage translator
with 3-state outputs
(I)
52
HEF4028B
HEF4511B
HEF4514B
HEF4515B
HEF4543B
HEF4555B
HEF4556B
Memories
HEF4505B
64-bit, l-bit per word read/write RAM
HEF4720B; V 256-bit, l-bit per word RAM
(I)
(I)
(I)
(I)
(tACc)
(tACc)
80
90
40
40
40
90
40
21
11
16
27
24
10
100
130
Multivibrators HEF4047B
HEF4528B
(I)
monostable/astable multivibrator
dual retriggerable-resettable monostable multivibrator (I)
60
60; 50
Arithmetic
circuits
HEF4008B
HEF4531B
HEF4532B
HEF4585B
4-bit binary full adder
13-input parity checker/generator
8-input priority encoder
4-bit magnitude comparator
(D)
(I)
35
(I)
(I)
50; 55
80
70
55;60
HEF4093B
HEF4583B
HEF40106B
quadruple 2-input NAND Schmitt trigger
dual Schmitt trigger
hex Schmitt trigger
(I)
40
26
(I)
40
40
Schmitt
triggers
30
12
B103
Eel
Eel 10000 (GX family)
The GX family of ECL silicon monolithic integrated circuits is designed for high speed
central processors and digital communication systems.
With 2,0 ns typical propagation delay and only 25 mW power dissipation per gate,
this family offers an excellent speed·power product and so is recommended for high
speed large system design.
Basic gate circuit
VCC2 }. ground
VCC1
OR output
NOR output
~-+--4~-~~-t--4----~-----'-Z6-6-8'-9.1- -VEE (-S,2V)
GX family ratings
Limiting values in accordance with the Absolute Maximum System (I EC 134)
supply voltage (d.c.)
VEE
max
input voltage
VI
o to VEE
-8,0 V
output current
10
max
storage temperature
Tstg
-55 to +125
junction temperature
Tj
max
B104
50
125
mA
°c
°c
GX family characteristics (d.c.) at Vee
= ground; VEE =-5,2 V
Each GX circuit has been designed to meet the d.c. specifications shown in the test table
below, after thermal equilibrium has been established. The circuit is in a test socket or
mounted on a printed-circuit board and transverse air flow> 2,5 m/s is maintained.
Outputs are terminated via a 50 n. resistor to -2,0 V. Test values for applied conditions
are given in the table and defined in the figure.
Vo
Test table
Tamb
o °c
25°C
75 °c
VIHmax
-0,840
-0,810
-0,720
V
VIHT
-1,145
-1,105
-1,045
V
VILT
-1,490
-1,475
-1,450
V
VILmin
-1,870
-1,850
-1,830
V
VI
7Z55963.1
VIHmin
VILma.
Tamb
symbol
output voltage
HIGH
output voltage
LOW
VOH
VOL
min
typ
max
O°C
25°C
75 °c
-1000
-960
-880
-810
-900
-840
min
typ
max
-1,870
-720
conditions
mv} .mputs at
mV
mV VIHmax
-1,830 V
-1,665
-1,850
-1,720
-1,650
V
-1,625 V
output threshold
voltage HIGH
VOHT
min
-1020
-980
-920
output threshold
voltage LOW
VOLT
max
-1,645
-1,630
-1,605 V
input current
HIGH
IIH
max
265
input current
LOW
IlL
min
10
} inputs at
VILmin
mV { inputs at
VIHT
{ inputs at
VILT
J1
A { VIHmax for
input under test
J1
A { VILmin for
input under test
8105
Eel
Eel 10 000 (GX family)
Gates
GXB10100
GXB10101
GXB10102
GXB10103
GXB10104
GXB10105
GXB10106
GXB10107
GXB10108
GXB10109
GXB10110
GXB10111
GXB10113
GXB10117
GXB10118
GXB10119
GXB10121
GXB10210
GXB10211
quadruple 3-input NOR gate (1 input common)
quadruple 2-input OR/NOR gate (1 input common)
quadruple 2-input, 3 NOR and 1 OR/NOR gate
quadruple 2-input, 3 OR and 1 OR/NOR gate
quadruple 2-input, 3 AND and 1 AND/NAND gate
triple 2-3-2 input OR/NOR gate
triple 4-3-3 input NOR gate
triple 2-input EXClUSIVE-OR/EXClUSIVE-NORgate
dual 3-input AND/NAND gate
dual 4-5 input OR/NOR gate
dual 3-input/3-output OR gate (line driver)
dual 3-input/3-output NOR gate (line driver)
quadruple EXCLUSIVE-OR gate (with enable)
dual 2-wide 2-3 input OR-AND/OR-AND-invert gate
dual 2-wide 3-input OR-AND gate
4-wide 4-3-3-3 input OR-AND gate
4-wide OR-AND/OR-AND-invert gate
high speed dual 3-input/3-output OR gate
high speed dual 3-input/3-output NOR gate
Interfaces
GXB10112
.GXB10114
GXB10115
GXB10116
GXB10124
GXB10125
GXB10129
GXB10188
GXB10189
GXB10212
GXB10216
dual 3-input/3-output (1 OR and 2 NOR) line driver
triple line receiver
quadruple line receiver
triple line receiver
quadruple TTL to ECl translator
quadruple ECl to TTL translator
quadruple TTL/I BM bus receiver/latch
hex buffer (non-inverting)
hex inverter
high speed dual 3-input/3-output (1 OR and 2 NOR) line driver
high speed triple line receiver
Flip-flops
GXB10130
GXB10131
GXB10133
GXB10135
GXB10175
GXB10176
GXB10231
dual D-type latch
dual D-type master-slave flip-flop
quadruple latch with D-typeinputs and enable outputs
dual JK master-slave flip-flop
quint D-Iatch with common reset and two wired-OR common clock inputs
hex D-type master-slave flip-flop
high speed dual D-type master-slave flip-flop
Counters and registers
GXB10136
GXB10137
GXB10141
universal hexadecimal counter
universal decade counter
4-bit universal shift register
8106
Type numbers have a suffix which signifies the type
of package: P = plastic DIL; D = ceramic DIL;
E = metal-ceramic (for memories only)
Complex
GXB10132
GXB10134
GXB10158
GXB10159
GXB10160
GXB10161
GXB10162
GXB10164
GXB10165
GXB10170
GXB10171
GXB10172
GXB10173
GXB10174
GXB10179
GXB10180
GXB10181
GXB10190
GXB10191
dual 2-iriput multiplexer with clocked D-type latches and common reset
dual 2-input multiplexer with clocked D-type latches
quadruple 2-to-l multiplexer (non-inverting)
quadruple 2-to-l multiplexer (inverting)
12-bit parity checker/generator
3-bit decoder with two enable inputs (1 of 8 lines LOW)
3-bit decoder with two enable inputs (1 of 8 lines HIG~O
8-input multiplexer with enable input
8-input priority encoder
9-bit parity checker/generator
dual 2-bit decoder (one of four lines LOW)
dual 2-bit decoder (one of four lines HIGH)
quadruple 2-input multiplexer with latched outputs
duaI4-to-' multiplexer (with enable)
look-ahead carry block
dual 2-bit adder/subtractor
4-bit arithmetic logic unit
quadruple differential receiver/MST-ECL translator
hex ECL-MST translator
Memories
GXB10139
GXB10140
GXB10142
GXB10144
GXB10145
GXB10146
GXB10148
GXB10149
256-bit, 8-bits per word PROM
64-bit, l-bit per word RAM (90 n output)
fast 64-bit, l-bit per word RAM
256-bit, l-bit per word RAM
64-bit, 4-bits per word RAM
1024-bit, l-bit per word RAM
64-bit, '-bit per word RAM (50 n output)
1024-bit, 4-bits per word PROM
_
16-bit, 2-bits per word CAM (content addressable memory)
128-bit, l-bit per word RAM
256-bit, l-bit per word RAM
1024-bit, '-bit per word RAM
GXB10155
GXB10405
GXB10410
GXB10415
8107
Eel
u.h.f. dividers
Type numbers have a suffix which signifies the type
of package: P = plastic OIL, E = metal-ceramic
Temperature range: -40 to 85 °c
SAF1034E
4-to-1 divider 1,05 GHz
4-to-l divider 1,5 GHz
SAF1534E
Temperature range: 0 to 75 °c
SAB1034P
4-to-l divider 1,05 G Hz
SAB1534P
4-to-l divider 1,5 G Hz
•
•
•
•
•
•
dividers by four
supply voltage: -5,2 V ± 5%
power consumption: 250 mW (typ)
output levels: ECL 10000
differential inputs
packages: plastic and metal-ceramic 01 L 14 pins
Applications
• high speed instrumentation (counters and frequency
meters, synthesizers, oscilloscopes, nuclear instrumentation)
• telecommunications
Bl08
TTL
survey
Military types
Commercial types
S54 •• series
S54H •• series
S54S •• series
S54LS •• series
S82 •• series
N74 .• series
N74H .. series
N74S .. series
N74LS .• series
N82 .• series
N82S .. series
N8T •. series
S8T .. series
page
standard-range gold doped TTL
high-speed gold doped TTL
high-speed Schottky TTL
low·power Schottky TTL
proprietary Schottky TTL
proprietary Schottky TIL
TTL interface
8110-Bl12
B113
8114·B115
8116·B118
8119·B120
B121
B122
For military products see also pages 8231-8237
Ratings
Commercial types
N74,N74H,N74S,N74LS
Commercial types
N82,N82S
Military types
supply voltage VCC
min
nom
max
4,75
5,0
5,25
4,75
5,0
5,25
4,5
5,0
5,5
V
V
V
ambient temperature
min
max
0
70
0
75
-55
125
°c
°c
storage temperature
min
max
-65
150
-65
175
-65
150
S82 and S8T max 200
°c
°c
°c
Characteristics
S54/N74
S54H/N74H
S54S/N74S
typ power dissipation per gate
10
23
20
2
10
20
mW
typ gate propagation delay
10
6
3
10
10
3
ns
S54LS/N74LS S82/N82
N82S
Packages
Military types are generally available in both hermetic dual in-line (CERDIP) and hermetic flat package (CERPAC).
Commercial types are predominantly supplied in plastic dual in-line package.
Bl09
TTL
S54/N74 .. series
Gates
S54/N7400
S54/N7401
S54/N7402
S54/N7403
S54/N7408
S54/N7409
S54/N7410
S54/N7411.
S54/N7412
S54/N7420
S54/N7421
N7425
S54/N7426
S54/N7427
S54/N7430
S54/N7432
S54/N7450
S54/N7451
S54/N7453
S54/N7454
S54/N7460
S54/N7486
quadruple 2-input positive NAND gate
quadruple 2-input positive NAN D gate with open collector output
quadruple 2-input positive NOR gate
quadruple 2-input positive NAN D gate with open collector output
quadruple 2-input positive AND gate
quadruple 2-input AND gate with open collector output
triple 3-input positive NAND gate
triple 3-input positive AND gate
triple 3-input NAND gate with open collector output
dual 4-input positive NAND gate
dual 4-input positive AND gate
dual 4-input positive NOR gate (with strobe)
quadruple 2-input NAND gate with open collector output
triple 3-input NOR gate
a-input positive NAND gate
quadruple 2-input positive OR gate
expandable dual 2-wide 2-input AND-OR-invert gate
dual 2-wide 2-input AND-OR-invert gate
4-wide 2-input AND-OR-invert gate (expandable)
4-wide 2-input AND-OR- invert gate
dual 4-input expander
quadruple 2-input EXCLUSIVE-OR gate
Buffers, inverters
S54/N7404
S54/N7405
S54/N7406
S54/N7407
S54/N7416
S54/N7417
S54/N7428
S54/N7433
S54/N7437
S54/N7438
S54/N7440
hex inverter
hex inverter with open collector output
hex inverter buffer/driver with open collector output
hex buffer/driver with open collector output
hex inverter buffer/driver with open collector output
hex buffer/driver with open collector output
quadruple 2-input positive NOR buffer
quadruple 2-input positive NOR buffer
quadruple 2-input positive NAND buffer
quadruple 2-input positive NAND buffer with open collector output
dual 4-input positive NAND buffer
Bus drivers transceivers S54/N74125
S54/N74126
S54/N74128
S54/N74365A
S54/N74366A
S54/N74367A
S54/N74368A
B110
quadruple bus buffer gate with three-state outputs
quadruple bus buffer gate with three-state outputs
quadruple 2-input positive NOR buffer
hex three-state buffer
hex three-state inverter
hex three-state buffer
hex three-state inverter
Flip-flops
S54/N7413
S54/N7414
S54/N7470
S54/N7472
S54/N7473
S54/N7474
S54/N7476
S54/N74107
S54/N74109
S54/N74121
N74122
S54/N74123
S54/N74132
S54/N74173
S54/N74174
S54/N74175
N74221
dual NAND Schmitt trigger
hex Schmitt trigger
JK flip-flop
JK master-slave flip-flop
dual JK master-slave flip-flop
dual D-type edge-triggered flip-flop
dual JK master-slave flip-flop
dual JK master-slave flip-flop
dual JK positive edge-triggered flip-flop
monostable multivibrator
retriggerable monostable multivibrator
retriggerable monostable multivibrator
quadruple Schmitt trigger
quadruple D-type flip-flop (three-state) (8T10)
hex Ootype flip-flop with clear
quadruple D-type edge-triggered flip-flop
dual monostable multivibrator
Shift registers
S54/N7491
S54/N7494
S54/N7495
S54/N7495A
S54/N7496
S54/N74164
S54/N74165
S54/N74166
S54/N74170
N74178
N74179
S54/N74194
S54/N74195
S54/N74198
S54/N74199
8-bit shift register
4-bit sh ift register parallel-in/serial-out
4-bit left-right sh ift register
4-bit left-right sh ift register
5-bit sh ift register
8-bit parallel-out serial shift register
parallel-load 8-bit shift register
8-bit sh ift register
4 x 4 register file
4-bit parallel access shift register
4-bit parallel access shift register
4-bit bidirectional universal shift register
4-bit parallel-access shift register
8-bit shift register
8-bit shift register
Counters
S54/N7490
S54/N7492
S54/N7493
S54/N74160
S54/N74161
S54/N74162
S54/N74163
N74176
N74177
N74190
N74191
S54/N74192
S54/N74193
N74196
N74197
decade counter
divide-by-twelve counter
4-bit binary counter
synchronous 4-bit decade counter
synchronous 4-bit binary counter
synchronous 4-bit decade counter
synchronous 4-bit binary counter
presettable decade counter/latch
presettable binary counter/latch
synchronous up/down counter (BCD)
synchronous up/down counter (binary)
synchronous decade up/down counter
synchronous 4-bit binary up/down counter
presettable decade counter/latch
oresettable binarv counter/latch
B111
TTL
S54/N74 .. series
Latches
S54/N7475
S5477
S54/N74100
S54/N74116
S54/N74279
quadruple bistable latch
quadruple bistable latch
4-bit bistable latch (dual)
dual 4-bit latch with clear
quadruple S-R latch
Decoders-drivers
S54/N7445
S54/N7446A
S54/N7447A
S54/N7448
S54/N74145
BCD-to-decimal decoder/driver with open collector output
BCD-to-7 segment decoder/driver
BCD-to-7 segment decoder/driver
BCD-to-7 segment decoder/driver
BCD-to-decimal decoder/driver with open collector output
Decoder-multiplexers
S54/N7442
S54/N7443
S54/N7444
S54/N74147
S54/N74148
S54/N74150
S54/N74151
S54/N74152
S54/N74153
S54/N74154
S54/N74155
S54/N74156
S54/N74157
S54/N74158
S54/N74298
BCD-to-decimal decoder
excess 3-to-decimal decoder
excess 3-gray-to-decimal decoder
10-line to 4-line priority encoder
B-line to 3-line priority encoder
l6-line to l-line multiplexer
B-line to l-line multiplexer
B-line to l-line multiplexer
dual 4-line to l-line multiplexer
4-line to l6-line decoder/demultiplexer
dual 2-line to 4-line decoder/demultiplexer
2-line to 4-line decoder demultiplexer
quadruple 2-input data selector (non-inverting)
quadruple 2-input data selector (inverting)
quadruple 2-input multiplexer with storage
Arithmetic units
S54/N7480
S54/N7483
N7483A
S54/N7485
S54/N74180
S54/N74181
S54/N74182
N74280
N74283
gated full adder
4-bit !Jinary full adder
4-bit binary full adder
4-bit magnitude comparator
B-bit odd/even parity checker
4-bit arithmetic logic unit
look-ahead carry generator
9-bit odd/even pari~y generator/checker
4-bit adder
B112
S54H/N74H . .series
Gates
S54H/N74HOO
S54H/N74H01
S54H/N74H08
S54H/N74H10
S54H/N74H11
S54H/N74H20
S54H/N74H21
S54H/N74H22
S54H/N74H30
S54H/N74H50
S54H/N74H51
S54H/N74H52
S54H/N74H53
S54H/N74H54
S54H/N74H55
S54H/N74H60
S54H/N74H61
S54H/N74H62
quadruple 2-input positive NAND gate
quadruple 2-input positive NAND gate with open collector output
quadruple 2-input positive AND gate
triple 3-input positive NAND gate
triple3-input positive AND gate
dual 4-input positive NAND gate
dual 4-input positive AND gate
dual 4-input positive NAND gate with open collector output
8-input positive NAND gate
expandable dual 2-wide 2-input AND-OR- invert gate
dual 2-wide 2-input AND-OR-invert gate
expandable 4-wide 2-2-2-3 input AND-OR
4-wide 2-input AND-OR-invert gate (expandable)
4-wide 2-input AND-OR-invert gate
2-wide 2-input AND-OR-invert gate
dual 4-input expander
triple 3-input expander
3-2-2-3-input AND-OR expander
Buffers, inverters
S54H/N74H04
S54H/N74H05
S54H/N74H40
hex inverter
hex inverter with open collector output
dual 4-input positive NAND buffer
Flip-flops
S54H/N74H71
S54H/N74H72
S54H/N74H73
S54H/N74H74
S54H/N74H76
S54H/N74H101
S54H/N74H102
S54H/N74H103
S54H/N74H106
S54H/N74H108
JK master-slave flip-flop with AND-OR
JK master-slave flip-flop
dual JK master-slave flip-flop
dual D-type edge-triggered flip-flop
dual JK master-slave flip-flop
JK negative edge-triggered flip-flop
JK negative edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
8113
TTL
S548/N748 .. series
Gates
S54S/N74S00
S54S/N74S02
S54S/N74S03
S54S/N74S08
S54S/N74S09
S54S/N74S10
S54S/N74S11
S54S/N74S15
S54S/N74S20
S54S/N74S22
S54S/N74S32
S54S/N74S51
S54S/N74S64
S54S/N74S65
S54S/N74S86
S54S/N74S133
S54S/N74S134
N74S135
S54S/N74S260
quadruple 2-input positive NAND gate
quadruple 2-input positive NOR gate
quadruple 2-input positive NAND gate with open collector output
quadruple 2-inputpositive AND gate
quadruple 2-input AND gate with open collector output
triple 3-input positive NAND gate
triple 3-input positive AND gate
triple 3-input AND gate with open collector output
dual 4-input positive NAND gate
dual 4-input positive NAND gate with open collector output
quadruple 2-input positive OR gate
dual 2-wide 2-input AND-OR- invert gate
4-2-3-2-input AND-OR-invert gate
4-2-3-2-input AND-OR-invert gate
quadruple 2-input EXCLUSIVE-OR gate
13-input NAND gate
12-input NAN D gate with three-state outputs
quadruple EXCLUSIVE-OR/NOR gate
dual 5-input NOR gate
Buffers, inverters
S54S/N74S04
S54S/N74S05
N74S37
N74S38
S54S/N74S40
hex inverter
hex inverter with open collector output
quadruple 2-input positive NAND buffer
quadruple 2-input positive NAND buffer with open collector output
dual 4-input positive NAND buffer
S5~/N74S74
S54S/N74S112
S54S/N74S113
S54S/N74S114
S54S/N74S174
N74S175
dual D-type edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
dual JK positive edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
hex D-type flip-flop with clear
quadruple D-type edge-triggered flip-flop
Shift registers
N74S172
N74S178
N74S179
N74S194
N74S195
16-bit multiple port register file
4-bit parallel access sh ift register
4-bit parallel access shift register
4-bit bidirectional universal shift register
4-bit parallel-access shift register
Counters
N74S196
N74S197
presettable decade counter/latch
presettable binary counter/latch
Flip-flops
Bl14
Decoders-multiplexers
Decoders-drivers
Arithmetic units
N74S138
S54S/N74S139
S54S/N74S151
S54S/N74S153
S54S/N74S157
S54S/N74S158
N74S251
S54S/N74S253
N74S257
N74S258
S54S/N74S140
3 to 1 of 8 line decoder/demultiplexer
dual 2 to 10 of 4 line decoder/demultiplexer
8-line to l-line multiplexer
dual 4-line to l-line multiplexer
quadruple 2-input data selector (non-inverting)
quadruple 2-input data selector (inverting)
data selector/multiplexer with three-state outputs
dual 4-line to l-Iine data selector/multiplexer
quadruple 2-line to l-line data selector/multiplexer
quadruple 2-line to l-line data selector/multiplexer
S54S/N74S85
S54S/N74S181
N74S182
N74S280
S54S/N74S350
4-bit magnitude comparator
4-bit arithmetic logic unit
look-ahead carry generator
9-bit odd/even parity generator/checker
4-bit shifter with three-state outputs
dual 4-input NAND line driver
8115
TTL
S54LS/N74LS .. series
Gates
S54LS/N74LSOO
S54LS/N74LS01
S54LS/N74LS02
S54LS/N74LS03
S54LS/N74LS08
S54LS/N74LS09
S54LS/N74LS10
S54LS/N74LS11
S54LS/N74LS12
S54LS/N74LS15
S54LS/N74LS20
S54LS/N74LS21
S54LS/N74LS22
S54LS/N74LS26
S54LS/N74LS27
S54LS/N74LS30
S54LS/N74LS32
S54LS/N74LS51
S54LS/N74LS54
S54LS/N74LS55
S54LS/N74LS86
S54LS/N74LS136
S54LS/N74LS260
S54LS/N74LS266
S54LS/N74LS386
quadruple 2-input positive NAND gate
quadruple 2-input positive NAND gate with open collector output
quadruple 2-input positive NOR gate
quadruple 2-input positive NAND gate with open collector output
quadruple 2-input positive AND gate
quadruple 2-input AND gate with open collector output
triple 3-input positive NAND gate
triple 3-input positive AND gate
triple 3-input NAND gate with open collector output
triple 3-input AND gate with open collector output
dual 4-input positive NAND gate
dual 4-input positive AND gate
dual 4-input positive NAND gate with open collector output
quadruple 2-input NAND gate with open collector output
triple 3-input NOR gate
8-input positive NAND gate
quadruple 2-input positive OR gate
dual 2-wide 2-input AND-DR-invert gate
4-wide 2-input AND-DR-invert gate
2-wide 4-input AND-DR-invert gate
quadruple 2-input EXCLUSIVE-OR gate
quadruple EXCLUSIVE-OR with open collector output
dual 5-input NOR gate
quadruple EXCLUSIVE-NOR
EXCLUSIVE-OR gate
Buffers, inverters
S54LS/N74LS04
S54LS/N74LS05
S54LS/N74LS28
S54LS/N74LS33
S54LS/N74LS37
S54LS/N74LS38
S54LS/N74LS40
hex inverter
hex inverter with open collector output
quadruple 2-input positive NOR buffer
quadruple 2-input positive NOR buffer with open collector output
quadruple 2-input positive NAND buffer
quadruple 2-input positive NAND buffer with open collector output
dual 4-input positive NAND buffer
Bus drivers,
transceivers
S54LS/N74LS125
S54LS/N74LS126
N74LS240
N74LS241
S54LS/N74LS242
S54LS/N74LS243
S54LS/N74LS365
S54LS/N74LS366
S54LS/N74LS367
S54LS/N74LS368
quadruple bus buffer gate
quadruple bus buffer gate
octal line driver receiver
octal line driver receiver
quadruple bus transceiver
quadruple bus transceiver
hex 3-state buffer
hex 3-state inverter
hex 3-state buffer
hex 3-state inverter
B116
with three-state output
Flip-flops
S54LS/N74LS13
S54LS/N74LS14
S54LS/N74LS73
S54LS/N74LS74
S54LS/N74LS76
S54LS/N74LS78
S54LS/N74LS107
S54LS/N74LS109
S54LS/N74LS112
S54LS/N74LS113
S54LS/N74LS114
N74LS123
S54LS/N74LS132
S54LS/N74LS173
S54LS/N74LS174
S54LS/N74LS175
S54LS/N74LS221
N74LS273
N74LS377
dual NANO Schmitt trigger
hex Schmitt trigger
dual JK master-slave flip-flop
dual Ootype edge triggered flip-flop
dual JK master-slave flip-flop
dual JK negative edge-triggered flip-flop
dual JK master-slave flip-flop
dual J K positive edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
dual JK positive edge-triggered flip-flop
dual JK negative edge-triggered flip-flop
dual retriggerable monostable multivibrator
quadruple Schmitt trigger
quadruple Ootype flip-flop
hex Ootype flip-flop with clear
quadruple Ootype edge-triggered flip-flop
dual monostable multivibrator
octal O-tYRe flip-flop with clear
octal Ootype flip-flop with clear
Arithmetic units
S54LS/N74LS83A
S54LS/N74LS85
S54LS/N74LS181
S54LS/N74LS261
S54LS/N74LS283
S54LS/N74LS670
4-bit binary full adder
4-bit magnitude comparator
4-bit arithmetic logic unit
2 x 4 parallel binary multiplier
4-bit adder
4 x 4 register file (three-state)
Shift registers
S54LS/N74LS95B
S54LS/N74LS96
S54LS/N74LS164
S54LS/N74LS170
S54LS/N74LS194A
S54LS/N74LS195A
S54LS/N74LS295A
S54LS/N74LS395
4-bit right-shift left-shift register
5-bit shift register
8-bit parallel-out serial shift register
4 x 4 register file
4-bit bidirectional universal shift register
4-bit parallel-access shift register
4-bit right-shift left-shift register
4-bit cascadable shift register
B117
TTL
S54LS/N74LS .. series
Counters
S54LS/N74 LS90
S54LS/N74LS92
S54LS/N74LS93
S54LS/N74LS161
S54LS/N74LS163
S54LS/N74LS190
S54LS/N74LS191
S54LS/N74LS192
S54LS/N74LS 193
S54LS/N74LS196
S54LS/N74LS197
S54LS/N74LS290
S54LS/N74LS293
decade counter
divide-by-twelve counter
4-bit binary counter
synchronous 4-bit binary counter
synchronous 4-bit binary counter
synchronous up/down counter (BCD)
synchronous up/down counter (binary)
synchronous decade up/down counter
synchronous 4-bit binary up/down counter
presettable decade counter/latch
presettable binary counter/latch
decade counter
4-bit binary counter
Latches
S54LS/N74LS75
N74LS273
S54LS/N74LS279
S54LS/N74LS375
S54LS/N74LS42
S54LS/N74LS138
S54LS/N74LS139
S54LS/N74LS151
S54LS/N74LS153
S54LS/N74LS154
S54LS/N74LS155
S54LS/N74LS156
S54LS/N74LS157
S54LS/N74LS158
S54LS/N74LS251
S54LS/N74LS253
N74LS254
S54LS/N74LS257
S54LS/N74LS258
S54LS/N74LS298
quadruple latch
octal latch
quadruple S-R latch
quadruple latch
BCD-to-decimal decoder
3 to 1 of 8 line decoder/demultiplexer
dual 2-line to 4-line decoder/demultiplexer
8-line to 1-line multiplexer
dual 4-line to 1-line multiplexer
4-line to 16-line decoder/demultiplexer
dual 2-line to 4-line decoder/demultiplexer
dual 2-li.ne to 4-line decoder/demultiplexer
quadruple 2-input data selector (non-inverting)
quadruple 2-input data selector (inverting)
data selector/multiplexer with three-state outputs
dual 4-line to 1-line data selector/multiplexer
4 to 16 decoder/demultiplexer with three-state output
quadruple 2-line to 1-line data selector/multiplexer
Quadruple 2-line to 1-line data selector/multiplexer
quadruple 2-input multiplexer with storage
S54LS/N74LS145
high-voltage BCD-to-decimal decoder/driver with open collector output
Decodersmultiplexers
Decoders-drivers
8118
MSI - S82/N82 and other series
Arithmetic units
S82/N8260
S82/N8261
S82/N8268
arithmetic logic unit
fast carry extender
gated full adder
Buffers/inverters
S80/N8095
S80/N8096
S80/N8097
S80/N8098
hex 3-state
hex 3-state
hex 3-state
hex 3-state
Counters
S82/N8280
S82/N8281
S82/N8284
S82/N8285
S82/N8288
S82/N8290
S82/N8291
S82/N8292
S82/N8293
S93/N9310
S93/N9316
presettable decade counter
presettable binary counter
binary up/down counter
decade up/down counter
divide-by-12 counter
high-speed presettable decade counter
high-speed presettable binary counter
presettable low power decade counter
presettable low power binary counter
4-bit decade counter
4-bit binary counter
Decoders/display
drivers
S82/N8250
S82/N8251
S82/N8252
binary-to-octal decoder
BCD-to-decimal decoder
BCD-to-decimal decoder
Flip-flops
S96/N9601
S96/N9602
retriggerable monostable multivibrator
dual monostable multivibrator
Multiplexers
S82/N8230
S82/N8231
S82/N8232
S82/N8233
S82/N8234
S82/N8235
S82/N8263
S82/N8264
S82/N8266
S82/N8267
S93/N9309
S93/N9312
S93/N9322
8-input digital multiplexer
8-input digital multiplexer
8-input digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
3-input, 4-bit digital multiplexer
3-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
dual 4-input multiplexer
8-input digital multiplexer
data selector multiplexer
buffer
inverter
buffer
inverter
8119
TTL
MSI- S82/N82 and other series
Parity functions
S82/N8241
S82/N8242
S82/N8262
S82/N8269
S93/N9324
quadruple EXCLUSIVE-OR
quadruple EXCLUSIVE-NOR
9-bit parity generator and checker
4-bit comparator
5-bit comparator
Registers/latches
S82/N8200
S82/N8201
S82/N8202
S82/N8203
S82/N8270
S82/N8271
S82/N8273
S82/N8274
S82/N8275
S82/N8276
S82/N8277
S93/N9300
S93/N9308
S93/N9314
S93/N9334
dual 5-bit buffer register
dual 5-bit buffer register with 0 complement
10-bit buffer register
10-bit buffer register with 0 complement
4-bit shift register
4-bit shift register
10-bit serial-in, parallel-out shift register
10-bit parallel-in, serial-out shift register
quadruple bistable latch
8-bit serial shift register
dual 8-bit shift register
4-brt shift register
dual 4-bit latch with clear
quadruple latch
8-bit addressable latch
Scaler
(Asynchronous shift
register)
8120
S82/N8243
8-bit position scaler
N82S .. series
Decoders/drivers
N82S50
N82S52
N82S90
N82S91
binary-to-octal decoder
BCD-to-decimal decoder
high-speed presettable decimal/binary decoder
high-speed presettable decimal/binary decoder
Multiplexers
N82S30
N82S31
N82S32
N82S33
N82S34
N82S66
N82S67
8-input digital multiplexer
8-input digital multiplexer
8-input digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
2-input, 4-bit digital multiplexer
Parity functions
N82S41
N82S42
N82S62
quadruple EXCLUSIVE-OR element
4-bit quadruple EXCLUSIVE-NOR
9-bit parity generator/checker
Shift registers
N82S70
N82S71
high-speed 4-bit shift register
high-speed 4-bit shift register
Arithmetic units
N82S82
N82S83
4-bit BCD arithmetic unit
4-bit BCD adder
B121
TTL
interface -
S8TIN8T ..series
Translators/buffers
S8T/N8T18
S8T/N8T80
S8T/N8T90
high voltage to TTL translator
quadruple 2-input NAND gate (high voltage)
hex inverter (high voltage)
Timing circuits
S8T/N8T20
S8T/N8T22/9601
N8T363
S96/N9602
bidirectional one shot
retriggerable monostable multivibrator
dual zero crossing detector
dual retriggerable monostable multivibrator
Line drivers
receivers
transceivers
S8T/N8T09
S8T/N8T10
S8T/N8T13
S8T/N8T14
S8T/N8T15
S8T/N8T16
N8T23
N8T24
N8T25
S8T/N8T26A
S8T/N8T28
N8T30
S8T/N8T31
N8T34
S8T/N8T37
N8T38
N8T93
S8T/N8T94
S8T /N8T95/97
S8T/N8T96/98
N8T380
quadruple three-state bus driver
quadruple three-state D-type bus flip-flop
dual low impedance line driver
triple line receiver/Schmitt trigger
dual communications line driver
dual communications line receiver
dual IBM 360/370 line driver
triple IBM 360/370 line receiver
dual MOS to TTL interface
quadruple three-state bus transceiver (inverting)
quadruple three-state bus transceiver (non-inverting)
dual DTL/TTL to MOS transceiver/port controller
8-bit bidirectional input/output port
quadruple bus transceiver (three-state outputs)
hex bus receiver/Schmitt trigger
quadruple bus transceiver (open collector)
high-speed hex inverter
high-speed hex inverter (open collector)
high-speed hex three-state buffer
high-speed hex three-state inverter
quadruple bus receiver with hysteresis/Schmitt trigger
Decoder drivers
S8T/N8T04
S8T/N8T05
S8T/N8T06
7-segment decoder display driver
7-segment decoder display driver
7-segment decoder display driver
B122
memories
type index
Bipolar
technology
TTL
Eel
8124
For military products
see also pp B231 to B237
RAM
capacity
type
page
16
16
16
16
256
x4
x4
x4
x4
xl
N3101A
N74S89
N74S189
N82S25
N74S200
B132·B133
256 xl
256 xl
256 xl
256 xl
256 xl
256
64
lk
lk
lk
PROM
capacity
type
32
32
256
256
256
x8
x8
x4
x4
x4
N82S23
N82S123
N82S27
N82S126
N82S129
N74S201
N74S301
N82S16
N82S116
N82S17
256
512
512
512
512
x8
x4
x4
x8
x8
N82S114
N82S130
N82S131
N82S115
N82S140
xl
x9
xl
xl
xl
N82S117
N82S09
N82S10
N93415A
N82S11 0
512 x8
512 x8
512 x8
lkx4
lk x4
N82S141
N82S146
N82S147
N82S136
N82S137
lk
lk
1k
lk
lk
xl
x1
xl
xl
xl
N82lS10
N82S11
N93425A
N82S111
N82lS11
lk x8
lk x8
1kx8
2k x4
2k x4
N82S180
N82S181
N82S2708
N82S184
N82S185
256
256
4k
4k
x8
x9
x1
xl
N82S208
N82S210
N82S400
N82S401
2k x8
2k x8
N82S190
N82S191
16 x 4
64x 1
64x 1
64 xl
128 xl
GXB10145
GXB10140
GXB10142
GXB10148
GXB10405
256 x 1
256 xl
1k xl
GXB10144
GXB10410
GXB10415
B136·B137
32 x8
256x4
page
B134·B135
GXB10139 B136·B137
GXB10149
When ordering please quote the ordering code to specify device,
temperature range if applicable (prefix N or S), and package
(suffix 0, E, F, I, K, N, P, T or TAl.
Examples:
N82S25N commercial temperature range, plastic OIL package
S82S16F military temperature range, cerdip OIL package
N74S89N commercial temperature range, plastic OIL package
S54S89F military temperature range, cerdip 01 L package
ROM
technology
capacity
type
page
TTL
256
256
256
512
512
x4
x4
x 8
x4
x4
N82S226
N82S229
N82S214
N82S230
N82S231
8136-8137
512 x B
512 x 8
512 x 8
1k x 4
lk x 8
lk x 8
2k x 8
2k x 8
Eel
specials
capacity
type
8x4
8x4
32 x 2
16x48x8
16 x 48 x 8
SAM
SAM
WWRM
FPLA
FPLA
N82S12
N82S112
N82S21
N82S100
N82S101
N82S215
N82S240
N82S241
N8228
N82S280
16 x 9
16 x 9
16x48x8
16x48x8
16x48x8
FPGA
FPGA
FPLA
FPLA
PLA
N82S102
N82S103
N82S106
N82S107
N82S200
N82S281
N82S290
N82S291
16x48x8 PLA
8x2
CAM
page
8136-B137
N82S201
GXB10155
8136-8137
8125
memories
type index
MOS
technology
MOS
B126
RAM
capacity
type
static
256 x 1
256 x 1
256 x 1
256 x4
256 x4
2501
B138-B139
25L01
HEF4720B(V)
2101
2111
256
256
256
1k
1k
2112
2606
2606-1
2102
21F02
x4
x4
x4
x 1
x 1
1k x 1
1k x 1
1k x 1
1kx 1
1k x4
21L02
2102A/AL
2115
2125
2614
1k x4
4k x 1
4k x 1
2624
2613
2623
dynamic
4k x 1
4k x 1
4k x 1
16k x 1
2627
2660
2680
2690
page
B138-B139
EPROM
capacity
type
4k
8k
2704
2708
page
B138-B139
When ordering please quote the ordering code to specify device,
temperature range if applicable (prefix N or S), and package
(suffix D, E, F, I, K, N, P,T or TA).
Examples:
N82S25N commercial temperature range, plastic DIL package
S82S16F military temperature range, cerdip DI L package
N74S89N commercial temperature range, plastic 01 L package
S54S89F military temperature range, cerQip DI L package
technology
capacity
MOS
ROM
512
lk
lk
2k
2k
x
x
x
x
x
type
8
8
8
4
8
2530
2607
2608
2580
2600
2k x 8
2k x 8
2616
2617
character generators
64 x 8 x 5
2513
64 x 6 x 8
2516
64 x 9 x 9
2526
2609
128 x 7 x 9
page
8138-8139
8138-8139
shift registers
capacity
type
page
static
2 x 50
6 x32
2 x 100
6 x40
2 x 128
2509
2518
2510
2519
2521
8140
2x
4x
2x
2x
2x
132
80
200
240
250
2522
2532
2511
2529
2528
2 x 256
1 x lk
2527
2533
dynamic
2 x 100
2 x 100
2 x 100
1 x 512
1 x 512
2506
2507
2517
2505
2524
4x
2x
1x
1x
1x
2502
2503
2504
2512
2525
256
512
lk
lk
lk
8140
8127
memories
cross reference
Bipolar
AMD
Signetics
Fairchild
Signetics
Harris
Signetics
2700/27 LSOO
2701/27LS01
27S08/27 LS08
27S09/27 LS09
27S10
82S16
82S17
82S23
82S123
82S126
10405
10410
10415
10145A
10149
GXB 10405
GXB10410/10144
GXB10415
GXB10145
GXB10149
0064
1024/HM7610
1024A/HM7611
2048
2048A
82S25
82S129
82S126
82S131
82S130
27S11
2952
2953
2980
2981
82S129
82S 10/93415A
82S11/93425A
82S101
82S100
93403
93406
93410
93411
93411A
82S25
82S226
74S301
82S17
82S117
HM7602/8256
HM7603
HM7615
HM7620
HM7621
82S23
82S123
GXB10149
82S130
82S131
3101
3101A/27S02
82S25
3101A
93415
93415A
93415B
93L415
93417
82S10
93415A
82S110
82LS10
82S126
HM7640
HM7641
HM7642
HM7643
HM7644
82S140
82S141
82S136
82S137
82S115**
93419
93421
93421A
93425
93425A
82S09
82S16
82S116
82S11
93425A
HM7699
82S115 **
Intel
Signetics
93425B
93L425
93427
93431
93436
82S111
82LSll
82S129
82S230
82S130
2708
3101
310lA
31 06/31 06A
31 07/31 07A
82S2708
82S25
3101A
82S16
82S17
93438
93441
93442
93446
93448
82S140
82S231
82S241
82S131
82S141
3301A
3302
3304
3322
3601
82S226
82S230
82S215 **
82S231
82S126
93452
93453
93454
93457
93464
93467
82S136
82S137
82S280
82S226
82S281
82S229
3602
3604
3605
3621
3622
82S130
82S140
82S136
82S129
82S131
3624
3625
82S141
82S137
** Not pin-for-pin compatible.
B128
Intersil
Signetics
MMI
Signetics
5501
5503
55508(A)
55518(A)
5523A
82525
745301
82S10
82S11
82S16
10149
6200
6201
6205
6206
GXB10149
825226
825229
825230
825231
5533A
5600
5603
5604A
5605
82S17
82S23
82S126
82S130
82S140
6275
6276
6280
6281
6300-1
825290
825291
825280
825281
825126
56506
5610
5623A
5624
5625
82S136
82S123
82S129
82S131
82S141
6301-1
6305-1
6306-1
6330
6331
825129
825130
825131
82523
825123
56526
82S137
Motorola
Signetics
6335
6340
6341
6348
6349
825114 **
825140
825141
825146
825147
10139
10140
10142
10144
10145
GXB10139
GXB10140
GXB10142
GX810144/10410
GX810145
6352
6353
6380
6381
6385
825136
82S137
825180
825181
8252708
10146/10415
10147
10148
10149
4004A
GX810415
GX810405
GX810148
GX810149
825226
6530
6531
6555
6560
6561
82517
82516
82509
82S25/3101A
745189
4064
4256
5005
68708
82525
82516
825126
8252708
82S100
825101
825100
825101
National
Semiconductor
Signetics
74187
8573
8574
8582
8588
86L99
825226
825126
825129
82517
82S23
82525
TI
Signetics
2708
10142
8252708
825400
82S401
GXB10142
10144
10147
74187
74S188
745189
GXB10144/10410
GXB10405
82S226
82S23
74S189
74589
745200
745201
74S209
745270
74S89
74S200
74S201
82S11/93425A
82S230
745287
745288
745289
745301
745309
82S129
82S123
3101A
74S301
82S 10/934 15A
745370
745387
745472
745473
82S231
82S126
82S146
82S147
** Not pin-for-pin compatible,
8129
memories
cross reference
MOS
AMD
Signetics
Fairchild
Signetics
Intel
Signetics
2102
2102
3343
3344
2102
21F02
21L02
2521
2522
2101
9216
AM 1402APC
2102
21F02
21L02
2617
2502
2102A
2101
2102
21F02
21L02
AM1403A
AM1404A
AM1507
AM 1507T
AM2505K
2503
2504
2517
2506
2505
3347
3349
3533
F4720
2532
2518
2533
HEF4720B
2102AL
21078
2111
2112
2102A
2102AL
2680
2111
2112
AM2806HC
AM2807PC
AM2808PC
AM2809
AM2833PC
2512
2524
2525
2521
2533
2114
2115
2116A
2125
2308
2614
2115
2690
2125
2607
AM9060
P1101
2680
2501
2316E
2704
2708
C1402A
2616
2704
2607
2708
2502
C1403A
M1404A
M1405A
P1101
2503
2504
2505
2501
Electronic
Arrays
Signetics
4600
4900
2600
2600
B130
General
Instruments
Signetics
2509
2510
2511
2513
2516
2509
2510
2511
2513
2516
2530
2533
2580
2530
2533
2580
Intersil
Signetics
Motorola
Signetics
Synertex
Signetics
IM7501
IM7552
6570
6830
2609
2608
2316B
4600
2616
2600
National
Semiconductor
Signetics
Texas
Instruments
Signetics
MM1101
MM1402A
MM1403A
MM1404A
MM1506H
2501
2502
2503
2504
2506
TMS3112NC
TMS3120NC
TMS3128NC
TMS3129NC
TMS3133NC
2518
2532
2521
2522
2533
MM1507H
MM2102
TMS4035
MM2521
2517
2102
21F02
21L02
2521
2102
21F02
21L02
2680
2680
MM2522
MM5058
MM5280
2522
2533
2680
IM7712C
2501
2102
21F02
21 L02
2512
IM7722C
IM7780C
2525
2532
Mostek
Signetics
29000
MK1007P
MK4007
2600
2532
2501
25L01
2627
MK4027
MK4096
MK4102
MK4116
2660
2102
21F02
21L02
2690
TMS4030
TMS4060
8131
memories
technical data
Bipolar
Output structure: OC open collector
TS three-state
capacity
TTL-RAM
16 x 4
16 x 4
16 x 4
16 x 4
output
structure
no. of
pins
tAA
max
input
current
ns
pA
N3101A *
N74S89
N74S189
N82S25
OC
OC
TS
OC
16
16
16
16
35
50
35
50
100
100
250
100
supply
voltage
packages
V
max
supply
current
mA
5
5
5
5
105
105
110
105
N,F
N,F
N,F
N,F
256
256
256
256
256
xl
xl
xl
xl
xl
N74S200
N74S201
N74S301
N82S16
N82S17
TS
TS
OC
TS
OC
16
16
16
16
16
50
50
50
50
50
100
100
100
100
100
5
5
5
5
5
130
130
130
115
115
N,F
N,F
N,F
N,F
N,F
256
256
64
1024
1024
xl
xl
x9
xl
xl
N82S116
N82S117
N82S09
N82S10
N82S11
TS
OC
OC
OC
TS
16
16
28
16
16
40
40
45
45
45
100
100
100
100
100
5
5
5
5
5
115
115
190
170
170
N,F
N,F
N, I
N,F
N,F
1024 xl
1024 xl
1024 xl
1024 xl
1024 xl
N82S110
N82S111
N93415A
N93425A
N82lS10 *
OC
TS
OC
TS
OC
16
16
16
16
16
35
35
45
45
60
100
100
100
100
100
5
5
5
5
5
170
170
170
170
60
N,F
N,F
N,F
N,F
N., F
1024
256
256
4096
4096
N82lS11
N82S208
N82S210
N82S400
N82S401
*
TS
TS
TS
OC
TS
16
22
24
18
18
60
60
60
70
70
100
100
100
150
150
5
5
5
5
5
60
185
185
155
155
N,F
N,F
N,F
I
* I n development.
8132
type
xl
x8
x9
xl
xl
*
*
Military versions of industrial les with prefix N have S as a prefix.
Example: industrial version N82S25, military version S82S25.
The specifications shown below apply to industrial versions.
There is generally some derating in specification for military
versions due to the extended temperature range.
Temperature ranges
e
M
0 to 75 °e
-55 to +125
°c
pin diagram
on page
pin compatible types
compatible
second sourced by
M,e
M,e
M,e
M,e
82S25,74S89
N3101A,82S25
8148
N3101A,74S89
AMD, Intel, MMI, TI
TI
MMI, TI
AMD, Fch, Harris, Intel, Intersil, MMI, Mot, National
3
3
3
3
3
M,e
M,e
M,e
M,e
M,e
82S16,82S116,74S201'"
82S16, 82S116, 74S200'"
82S 17 , 82S 117
825116, 74S200, 74S201
82S117,82S301
TI
TI
Fch, Intersil, TI
AMD, Fch, Intel, Intersil, MMI, Mot
AMD, Fch, Intel, Intersil, MMI
8146
3
3
e
e
M,e
M,e
M,e
82S16, 74S200, 74S201
82S17,74S301
82S110, 93415A"', 82LS10
82S111,93425A,82LS11
Fch
Fch
Fch, MMI
AMD, Fch, Intersil, TI
AMD, Fch, Intersil, TI
8146
8146
8149
8147
8147
e
e
e
e
e
82S10, 93415A,82LS10
82S11, 93425A, 82LS11
82S10"', 82S110, 82LS10
82S11 ..., 82S111, 82LS11
82S10, 93415A,82S110
Fch
Fch
AMD, Fch, TI
AMD, Fch, TI
Fch
8147
e
e
C
C
C
82S11,93425A,82S111
Fch
chip
enable
lines
temp.
range
... = fully
TI
TI
8147
8149
8149
8147
8147
8133
memories
technical data
Bipolar
Output structure: OC open collector
TS three-state
capacity
TTL-PROM
output
structure
no. of
pins
tAA
max
input
current
supply
voltage
max
supply
current
mA
packages
ns
/J. A
V
32
32
256
256
x8
x8
x4
x4
N82S23
N82S123
N82S27
N82S126
OC
TS
OC
OC
16
16
16
16
50
50
40
50
100
100
1600
100
5
5
5
5
77
140
120
N, F
N,F
F
N,F
256
256
512
512
x
x
x
x
4
8
4
4
N82S129
N82S114
N82S130
N82S131
TS
TS
OC
TS
16
24
16
16
50
60
50
50
100
100
100
100
5
5
5
5
120
180
140
140
N, F
N,F
N,F
N,F
512
512
512
512
512
x
x
x
x
x
8
8
8
8
8
N82S115
N82S140
N82S141
N82S146
N82S147
24
24
24
20
20
60
60
60
45
45
100
100
100
5
5
5
5
5
180
175
175
*
*
TS
OC
TS
OC
TS
N,F
N, F
N, F
N
N
1024 x
1024 x
1024 x
1024 x
1024 x
4
4
8
8
8
N82S136
N82S137
N82S180
N82S181
N82S2708
OC
TS
OC
TS
TS
18
18
24
24
24
60
60
70
70
70
100
100
100
100
100
5
5
5
5
5
140
140
150
150
150
F
F
F
F
F
2048
2048
2048
2048
4
4
8
8
N82S184
N82S185
N82S190
N82S191
OC
TS
OC
TS
18
18
24
24
100
100
80
80
100
100
100
100
5
5
5
5
120
120
175
175
I
N, F
N,F
* I n development.
B134
type
x
x
x
x
77
Military versions of industrial ICs with prefix N have S as a prefix.
Example: industrial version N82S25, military version S82S25.
The specifications shown below apply to industrial versions.
There is generally some derating in specification for military
versions due to the extended temperature range.
Temperature ranges
C
M
0 to 75°C
-55to+125°C
pin compatible types
second sourced by
pin diagram
on page
chip
enable
lines
temp.
range
1
1
2
2
M,C
M,e
e
M,e
82S126,82S226
82S226 ., 82S27
AMD, Fch, Harris, Intel, Intersil, MMI, Mot, National, TI
8143
8143
8141
8141
2
2
M,e
M,e
M,e
M,e
82S229·
82S214·
82S230·
82S231·
AMD, Fch, Harris, Intel, Intersil, MMI, National, TI
MMI **
Fch, Harris, Intel, Intersil, MMI
Fch, Harris, Intel, Intersil, MMI
8141
8143
8141
8141
2
M,e
M,e
M,e
e
e
82S215·
82S240·
Harris **
Fch, Harris, Intel, Intersil, MMI
Fch, Harris, Intel, Intersil, MMI
MMI, TI **
MMI, TI **
8144
Fch, Harris, Intel, Intersil, MMI
Fch, Harris, Intel, Intersil, MMI
MMI
MMI
MMI, (EPROM - Intel, Mot, TI)
8142
8142
8145
8145
8145
4
4
1
2
2
4
4
M,e
M,e
M,e
M,e
M,e
1
1
3
3
M,C
M,e
e
e
• = fully compatible
AMD, Harris, Intersil, MMI, National, Tr
AMD, Harris, Intersil, MMI, TI
82S241 •
82S280·
82S281·
82S290·
82S291·
8142
8142
8145
8145
** Not pin-far-pin compatible.
8135
memories
technical data
Bipolar
DC open collector
TP totem pole
Dutput structure:
capacity
TTL-ROM
DE open emitter
TS three-state
type
output
structure
no. of
pins
DC
16
16
24
16
tAA
max
input
current
supply
voltage
packages
V
max
supply
current
mA
ns
IlA
50
50
60
50
100
100
100
100
5
5
5
5
120
120
175
135
N,F
N,F
F
F
16
24
24
24
16
50
60
60
60
70
100
100
100
100
400
5
5
5
5
5
135
175
175
175
170
F
F
F
F
F, I
24
24
24
24
70
70
70
70
100
100
100
100
5
5
5
5
150
150
170
170
I
F
F
24
24
35
35
250
250
5
5
160
160
N,F
N,F
256
256
256
512
x
x
x
x
4
4
8
4
N82S226
N82S229
N82S214
N82S230
512
512
512
512
1024
x
x
x
x
x
4
8
8
8
4
N82S231
N82S215
N82S240
N82S241
N8228
1024
1024
2048
2048
x
x
x
x
8
8
8
8
N82S280
N82S281
N82S290
N82S291
8x4
8x4
N82S12
N82S112
TS
TTl-WWRM 32 x 2
N82S21
TTl-FPlA 16 x 48 x 8 N82S100
DC
16
50
1600
5
130
N,F
TS
28
28
28
28
50
50
50
50
100
100
100
100
5
5
5
5
170
170
170
170
N, I
N, I
N, I
N,I
28
28
30
30
100
100
5
5
170
170
N, I
N, I
DC
28
28
50
50
100
100
5
5
170
170
N, I
N, I
TTL-SAM
TTl-FPGA
TTl-PlA
ECl-RAM
ECl-PROM
DC
TS
TP
DC
TS
DC
TS
DC
DC
DC
TS
N82S102
N82S103
TS
16 x 9
16 x 9
DC
16x48x8 N82S200
16x48x8 N82S201
TS
64
64
64
16
xl
xl
xl
x4
GXB10140
GXB10142
GXB10148
GXB10145
DE
DE
DE
DE
16
16
16
16
15
10
15
265
265
265
220
5,2
5,2
5,2
5,2
80 (typ)
100
80 (typ)
145
D,P
D,P
D,P
D,P
128
256
256
1024
xl
xl
xl
xl
GXB10405
GXB10144
GXB10410
GXB10415
DE
DE
DE
DE
16
16
16
16
15
30
35
25
200
200
220
5,2
5,2
5,2
5,2
110
112
125
E
D,E
E
E
32 x 8
256 x 4
GXB10139
GXB10149
DE
DE
16
16
20
20
265
265
5,2
5,2
145
150
D
D,E
8x2
GXB10155
DE
18
13
220
5,2
140
E
I n development.
B136
DC
TS
TS
16x48x8 N82S101
16x48x8 N82S106
16 x 48 x 8 N82S107
ECl-CAM
*
TS
TS
*
Military versions of industrial ICs with prefix N have S as a prefix.
Example: industrial version N82S25, military version S82S25.
The specifications shown below apply to industrial versions.
There is generally some derating in specification for military
versions due to the extended temperature range.
Temperature ranges
TTL - C- Ot075°C
TTL - M- '-55 to +125 °c
Eel - e- -30 to + 85°C
pin compatible types
second sourced by
chip
enable
lines
temp.
range
... = fully compatible
2
2
2
M,e
M,e
M,e
M,e
N82S126 ... , N82S27
N82S129 ...
N82S114
N82S130 ...
Fch, Intel, MMI, Mot, National, TI
Fch, MMI
1
2
4
4
M,e
M,e
e
e
e
N82S131 ...
N82S115 ...
N82S140 ...
N82S141 ...
Fch, Intel, MMI, TI
4
4
3
3
M,e
M,e
e
e
N82S180 ...
N82S181 ...
N82S190'"
N82S191 ...
Fch, MMI
Fch, MMI
MMI
MMI
2 wr. en.
2wr.en.
Fch, Intel, MMI, TI
Fch
e
e
2
2
2
3
3
e
e
e
e
e
e
e
e
e
e
e
8141
8144
8144
8144
8142
8145
8150
N82S200 ...
N82S201 ...
AMD, MMI
AMD,MMI
M,e
M,e
M,e
M,e
8141
8141
8143
8141
8150
e
M,e
M,e
e
e
pin diagram
on page
B151
B151
N82S100
N82S101
GXB10142, GXB10148
G'XB10140, GXB10148
GXB10140, GXB10142
GXB10410
GXB10144
8151
Mot
Mot, TI
Mot
Fch, Mot
8146
8146
8146
8148
Mot, TI
Fch, Mot, TI
Fch, Mot, TI
Fch, Mot
8146
8146
8146
8147
Mot
Fch, Harris, MMI, Mot
8143
8141
8150
8137
memories
technical data
MOS
type
no. of
pins
tAA
typ
ns
supply
voltage
V
256 xl
256 xl
256 x 4
256 x 4
256 x 4
2501
25L01
2101
2111
2112
16
16
22
18
16
1000
1000
450 -1000
450 -1000
450 - 1000
+5,-9
+5,-12
+5
+5
+5
256 x 4
256 x 4
1024 xl
1024 xl
1024 xl
2606
2606-1
2102
21F02
21L02
16
16
16
16
16
750
500
500 - 1000
250 - 450
400 -1000
+5
+5
+5
+5
+5
1024 xl
1024 xl
1024 xl
1024 x 4
1024 x 4
2102A/AL
2115
2125
2614 *
2624 *
16
16
16
18
18
150 - 650
35 75
35- 75
+5
+5
+5
+5
+5
4096 xl
4096 xl
2613 *
2623*
18
18
capacity
Static RAM
LOCMOS static RAM
+5
+5
HEF4720B(V)
16
150 -
450
+3 to +15
Dynamic RAM
4096 xl
4096 xl
4096 xl
16384 xl
2660
2680
2627
2690 *
16
22
16
16
200
200
150
150
350
350
250
250
+12, +5,-5
+12, +5,-5
+12, +5,-5
+12, +5,-5
ROMs and character
generators
p-channel
512 x 8
2048 x 4
64x8x5
64x6x8
64x9x9
2530
2580
2513
2516
2526
24
24
24
24
24
700
950
600
600
700
+5,-12
+5,-12
+5,-12
+5,-12
+5,-12
1024 x 8
1024 x 8
2048 x 8
2048 x 8
2048 x 8
2607
2608
2600
2616
2617
24
24
24
24
24
450
550
300
300
450
+5
+5
+5
+5
+5
2632 *
2633 *
2609
24
24
24
500
+5
+5
+5
2704
2708
24
24
450
450
+12, +5,-5
+12, +5,-5
n-channel
256 xl
4096 x 8
4096 x 8
128 x 7 x 9
EPROM
* In development.
B138
4096
8192
-
Temperature range
C=Oto+70°C
XC = -40 to +85 °c
chip
enable
lines
1
2
2
temp.
range
pin
compatible
types
second sourced by
C
C
C
C
C
25LOl
2501
AMD, Intel, Intersil, Mostek, National
Mostek
Intel
Intel
Intel
C
C
C
C
2102,21F02,21l02
2125
2115
2624
2614
Intel
Intel
Intel
Intel
Intel
8152
8153
8153
8155
8155
C
C
2623
2613
Intel
Intel
8153
Fch
8152
C
C
C
C
Mostek
AMD, Intel, National, TI
Mostek
Intel, Mostek
B156
C
C
C
C
C
GI
GI
GI
GI
8157
8158
8160
8160
B160
C
8157
8157
8158
8159
8159
3
C
C
Intel
Motorola
Electronic Arrays, Mostek, Synertex
Intel, Synertex
AMD
4
C
C
C
will be industry standard
Motorola
C
C
Intel
Intel
3
8155
8155
B152
8152
8152
C
C
C
C
C
XC
2
4
2
8152
8152
8154
8154
8155
2606-1
2606
21F02,21L02,2102A/AL)
2102,21 L02, 2102A/AL
AMD, Fch, Intel, Intersil, Mostek, National, TI
2102,21 F02, 2102A/AL
c
4
pin diagram
on page
C
C
8159
8161
8161
8139
memories
technical data
MOS
Several types can be made available
in Cerdip (F package) and metal ceramic
(I package).
Static shift registers - one clock (TTL compatible)
- power supplies +5 and -12 V; 2509/10/11 also -5 V
pin diagram
on page
capacity
type
output
structure
on-chip
recirculate
package
leads
typ
speed
MHz
second sourced by
hex 32 bits
hex 40 bits
dual 50 bits
quad 80 bits
2518
2519
2509
2532
bare drain
bare drain
three-state
push·pull
yes
yes
yes
yes
N-16
N·16
N·14, K
N-16
3,0
3,0
3,0
3,0
Fch, TI
GI
Fch, I ntersil, Mostek, TI
8162
8162
8162
8163
dual 100 bits
dual 128 bits
2510
2521
th ree-state
push-pull
yes
yes
N-14, K
N·8
3,0
3,0
GI
AMD, Fch, National, TI
8162
8163
dual 132 bits
dual 200 bits
dual 240 bits
dual 250 bits
dual 256 bits
1024 bits
2522
2511
2529
2528
2527
2533
push·pull
three-state
push-pUll
push-pull
push-pull
push-pUll
yes
yes
yes
yes
yes
jumper
N-8
N-14, K
N-8
N·8
N·B
N·B
3,0
3,0
3,0
3,0
3,0
2,0
Fch, National, TI
GI
8163
8162
8163
8163
8163
8163
no
no
no
T,N-B
T,N-B
T,N-B
4,0
4,0
4,0
AMD, National
AMD, Fch,GI, National, TI
Oynamicshift registers - two clocks (not TTL compatible)
- power supplies +5 and -5 V
dual 100 bits
dual 100 bits
dual 100 bits
2517
2507
2506
20 kil PD
7,5 kil PO
bare drain
quad 256 bits
2502
bare drain
no
N-16
10,0
AMD, Intel, National
8164
512 bits
512 bits
dual 512 bits
2524
2505
2503
bare drain
bare drain
bare drain
yes
yes
no
N-8
K
TA,N-8
5,0
3,0
10,0
AMD
AMD, Intel
AMD, Intel, National
8164
8165
8165
1024 bits
1024 bits
1024 bits
2525
2512
2504
bare. drain
bare drain
bare drain
yes
yes
no
N·B
K
TA,N·B
5,0
3,0
10,0
AMD,lntersil
AMD,lntersii
AMD, Intel, National
8164
8165
8165
8140
8164
AMD, National
pin diagrams - second sources
Bipolar
ROMs and PROMs 4 bits wide
type
capacity/output structure
second source
82S27
82S126
256 x 4 PROM/OC
256 x 4 PROM/OC
82S129
256 x 4 PROM/TS
82S226
256 x 4 ROM/DC
82S229
256 x 4 RDM/TS
GXB10149
256 x 4 PROM/OE
Fch 10149, Harris HM7615,
MMI 10149, Mot 10149
82S130
512 x 4 PROM/OC
Fch 93436, Harris HM7620,
AMD 27S10, Fch 93417,
Harris 1024A/7611, Intel 3601,
Intersil5603, MMI 6300-1,
Mot 5005, National 8573, TI 74S387
AMD 27S11, Fch 93427,
Harris 1024/HM7610, Intel 3621,
Intersil5623A, MMI 6301-1,
National 8574, TI 74S287
Fch 93406, Intel 3301A,
MMI 6200, Mot 4004A, National 74187,
TI74187
Fch 93467, MMI 6201
Inte13602~
82S131
512 x 4 PROM/TS
82S230
512 x 4 ROM/DC
82S231
512 x 4 ROMITS
Intersil 5604A, MMI 6305-1
Fch 93446, Harris HM7621,
Intel 3622,
Intersil 5624, MMI 6306-1
Fch 93431, Intel 3302,
MMI 6205, TI 74S270
Fch 93441, Intel 3322,
MMI 6206, TI 745370
8141
memories
pin diagrams - second sources
Bipolar
ROMs and PROMs 4 bits wide
B142
type
capacity/output structure
8228
1024 x 4 ROM/TP
82S136
1024 x 4 PROM/OC
82S137
1024 x 4 PROM/TS
82S184
82S185
2048 x 4 PROM/OC
2048 x 4 PROM/TS
second source
Fch 93452, Harris HM7642,
Intel 3605, Intersil 56S06,
MMI6352
Fch 93453, Harris HM7643,
Intel 3625, Intersil 56S26,
MMI6353
ROMs and PROMs 8 bits wide
type
capacity/output structure
82S23
32 x 8 PROM/OC
82S123
32 x 8 PROM/TS
GXB10139
32 x 8 PROM/OE
82S114
82S214
256 x 8 PROM/TS
256 x 8 ROM/TS
second source
AMD 27S08/27LS08,
Harris HM7602/8256,
Intersil 5600, MMI 6330,
Nation~858a,TI 74S188
AMD 27S09/27LS09,
Harris HM7603, Intersil 5610,
MMI 6331, TI 74S288
Mot 10139
MMI6335**
** Not pin-for-pin compatible.
8143
memories
pin diagrams- second sources
Bipolar
ROMs and PROMs 8 bits wide
type
capacity/output structure
second source
825115
825215
512 x 8 PROM/TS
512 x 8 ROM/TS
Harris HM7644**/HM7699**
825140
512 x 8 PROM/OC
825141
512 x 8 PROM/TS
Fch 93438, Harris HM7640,
Intel 3604, Intersil 5605,
MMI6340
Fch 93448, Harris HM7641,
Intel 3624, Intersil 5625,
MMI6341
825240
825241
512 x 8 ROM/OC
512 x 8 ROM/TS
Fch 93442
825146
825147
512 x 8 PROM/OC
512 x 8 PROM/TS
MMI 6348, TI 74S472**
MMI 6349, TI 74S473**
** Not pin-for-pin compai:ible.
8144
type
capacity/output structure
second source
82S180
82S181
82S280
82S281
1024 x
1024 x
1024 x
1024 x
PROM/OC
PROM/TS
ROM/OC
ROM/TS
MMI6380
MMI6381
Fch 93454, MMI 6280
Fch 93464, MM I 6281
82S2708
1024
x 8 PROM/TS
MM16385,
EPROM - Intel 2708,
Mot 68708, TI 2708
82S190
82S191
82S290
82S291
2048 x 8
2048 x 8
2048 )( 8
2048)( 8
8
8
8
8
PROM/OC
PROM/TS
ROM/OC
ROM/TS
MMI6275
MMI6276
8145
memories
pin diagrams - second sources
Bipolar
RAMs 1 bit wide
type
capacity/output structure
second source
64 x 1/0E
64 x 1/0E
64 x 1/0E
Mot 10140
Mot 10142, TI 10142
Mot 10148
GXB10405 128 x 1/0E
Mot 10147, TI 10147
74S200
74S201
74S301
256 x l/TS
256 x l/TS
256 x 1/0e
82S16
256 x l/TS
82S116
82S17
256 x l/TS
256 x 1/0e
82S117
256 x 1/0e
TI74S200
TI74S201
Fch 93410, Intersil 5503,
TI74S301
AMD 2700/27LSOO, Fch 93421,
Intel 31 06/31 06A,
Intersil 5523A, MMI 6531,
Mot 4256
Fch 93421A
AMD 2701/27LS01, Fch 93411,
Intel 3107/3107A, Intersil5533A,
MMI6530
Fch93411A
GXB10140
GXB10142
GXB10148
A2
GXB10144 256 x 1/0E
GXB10410 256 x 1/0E
8146
Fch 10410, Mot 10144, TI 10144
Fch 10410, Mot 10144, TI 10144
RAMs 1 bit wide
type
capacity/output structure
second source
82S10
1024 x 1/0C
82S110
82S11
1024 x 1/0C
1024 x l/TS
82S111
82LS10
82LS11
93415A
1024 x
1024 x
1024 x
1024 x
93425A
1024 x l/TS
AMD 2952, Fch 93415,
IntersiI55S08(A), TI 74S309
Fch 93415B
AMD 2953, Fch 93425,
Intersil 55S18(A), TI 74S209
Fch 93425B
Fch 93L415
Fch 93L425
AMD 2952, Fch 93415A,
TI 74S309
AMD 2953, Fch 93425A.
TI74S209
GXB10415
1024 x 1/0E
Fch 10415, Mot 10146/10415
82S400
82S401
4096 x 1/0C
4096 x l/TS
TI2708
TI2708
l/TS
1/0C
l/TS
1/0C
B147
memories
pin diagrams - second sources
Bipolar
RAMs 4 bits wide
type
8148
capacity/output structure
second source
GXB10145
16x4/0E
Fch 10145A, Mot 10145,
82S25
16 x 4/0C
74S89
74S189
3101A
16 x 4/0C
16 x 4/TS
16 x 4/0C
AMD 3101, Fch 93403,
Harris 0064, Intel 3101,
Intersil 5501, MM I 6560,
Mot 4064, National 86L99
TI74S89
MMI 6561, TI 74S189
AMD 3101A/27S02,lnte13101A,
MMI 6560, TI 74S289
RAMs 1 byte (8 or 9 bits) wide
type
82S09
capacity/output structure
64 x 9/0e
82S208
256 x 8ITS
82S210
256 x 9/TS
second source
Fch 93419, MMI 6555
8149
memories
pin diagrams-second sources
Bipolar
Specials (SAM, WWRM, CAM)
type
82512
828112
capacity/output structure
second source
8 x 4 SAM/OC
8 x4 SAM/TS
A Simultaneous Addressable Memory or multi port memory is one in
which different locations can be selected at the same time.
The 82S12/112 SAM-element has two independent sets of address-decoders
and outputs.
82521
32 x 2 WWRM/OC
A Write While Read Memory element is a RAM provided with output latches,
in such a way that (read out) data may be retained in the latches either when
the chip is disabled or when new information has to be written in the memory.
GXB10155
8 x 2 CAM/OE
In a Content Addressable Memory or association memory the address information
is associated with the memory content to search whether and/or in which location
this information is stored; data is searched in parallel.
The normal functions of read-out and write-in can also be performed.
8150
Specials (PLA, FPLA, FPGA)
type
capacity/output structure
second source
82S100
82S101
82S200
82S201
82S106
82S107
16 x
16 x
16 x
16 x
16 x
16 x
AMD 2981, MMI 82S100
AMD 2980, MMI 825101
48
48
48
48
48
48
x
x
x
x
x
x
8
8
8
8
8
8
FPLA/TS
FPLA/OC
PLA/TS
PLA/OC
FPLA/OC
FPLA/TS
In the 82S106/107, the chip enable input is replaced by a "flag" output
indicating whether a programmed product term is activated.
The Programmable Logic Array is a two level AND-OR/AND-NOR combinational
logic element, consisting of a system of logic gates with programmable inputs
and outputs in order to generate series of product-terms according to customer
requirements. Programming can either be done during production (PLA)
or by the customer in the field (FPLA).
82S102
82S103
16 x 9 FPGA/OC
16 x 9 FPGA/TS
The Field Programmable Gate Array is a one-level AND/NAND logic element
with programmable inputs and outputs to generate several AND/NAND functions
according to customer requirements.
8151
memories
pin diagrams - second sources
MOS
Static RAMs '-bit wide
type
capacity
2501
256 x 1
25L01
256 x 1
HEF4720B(V)
6152
second source
AMD P1101, Intel P1101,
Intersil IM7501, Mostek MK4007,
National MM1101
Mostek M K4007
Fch F4720
256 x 1
2102
21F02
21L02
1024 x 1 ')
1024 x 1 l
1024 x 1
2102A
2102AL
1024 x 1
1024 x 1
J
(
AMD 2102, Fch 2102, Intel 2102A,
IntersillM7552, Mostek MK4102,
National MM2102, TI TMS4035
Intel 2102A
Intel 2102AL
type
capacity
second source
2115
2125
1024 x 1
1024 xl
Intel 2115
Intel 2125
2613
2623
4096 xl
4096 xl
Intel
Intel
8153
memories
pin diagrams- second sources
MOS
Static RAMs 4-bits wide
type
8154
capacity
second source
2101
256 x 4
Intel 2101
2111
256 x 4
Intel 2111
type
capacity
2112
256 x 4
2606
2606-1
256 x 4
256 x 4
2614
2624
1024 x 4
1024 x 4
second source
Intel 2112
Intel 2114
Intel
8155
memories
pin diagrams - second sources
MQS
Dynamic RAMs 1-bit wide
B156
type
capacity
second source
2627
2660
4096 x 1
4096 x 1
Mostek M K4027
Mostek M K4096
2680
4096 xl
AMD 9060, Intel 2107B,
National MM5280,
TI TMS4060, TMS4030
2690
16384 x 1
Intel 2116A,Mostek MK4116
ROMs 8-bits wide
type
capacity
second source
2530
512 x 8
2607
1024 x 8
Intel 2308,
EPROM - Intel 2708
2608
1024 x 8
Motorola 6830
General 2530
8157
memories
pin diagrams - second sources
MOS
ROMs 4 and 8-bits wide
type
capacItY
second source
2580
2048 x 4
General 2580
2600
8158
2048 x 8
Electronic Arrays 4600
and 4900, Mostek 29000,
Synertex 4600
type
capacity
second source
2616
2048 x 8
Intel 2316E, Synertex 2316B
2617
2632
2048 x 8
AMD 9216
4096 x 8
8159
memories
pin diagrams-second sources
MOS
Character generators
type
B160
capacity
second source
2513
64x8x5
General 2513
2516
64x6x8
General 2516
2526
64 x 9 x 9
EPROMs
type
capacity
second source
2609
128 x 7 x 9
Motorola 6570
2704
4096
Intel 2704
2708
8192
Intel 2708
8161
memories
pin diagrams - second sources
MOS
Static shift registers
type
B162
capacity
6 x 32
2518
2519
6 x 40
2509
2510
2511
2 x 50
2 x 100
2 x 200
second source
Fch 3349, TI TMS3112NC
General 2509
General 2510
General 2511
type
"W"'' ' 'D"tt
1,2
capacity
4 x 80
Fch 3347, Intersil IM7780C
Mostek MK1007P, TI TMS3120NC
2521
2 x 128
2522
2 x 132
AMD AM2809, Fch 3343,
National MM2521, TI TMS3128NC
Fch 3344, National MM2522,
TI TMS3129NC
2529
2528
2527
2 x 240
2 x 250
2 x 256
712
0,
3
6
02
VGG
4
5
¢lIN
oDs
Vee
VGG
2
7
12
STREAM SELECT
3
6
¢lIN
V DO (GNO\
4
5
I,
second source
2532
2533
1024
AMD AM2833PC, Fch 3533,
General 2533,
National MM5058,
TI TMS3133NC
B163
memories
pin diagrams - second sources
MOS
Dynamic shift registers
type
OUTPUT CLOCK 01
02
DB
Vee
2
7
INPUT CLOCK 02
12
3
6
0,
VOO
4
5
I,
capacity
second source
2506
2507
2517
2x 100
2 x 100
2 X 100
AMD AM.1507T, National MM1506H
2502
4 x 256
AMD AM1402APC, Intel C1402A,
National MM1402A
AMD AM1507, National MM1507H
,
122
7
"'23
6
11
5
0,
Voo
4
°Oa
AMD AM1403A, Intel C1403A,
National MM1403A
2504
vcc
<,)2
2
7
N.C
N.C.
3
6
~'Jl
Voo
4
5
I
1024
AMD AM1404A, Intel M1404A,
National MM 1404A
B165
microprocessors
cross reference
type index
Bipolar
Type index
MOS
AMO
2901A
Signetics
N2901-1
Intel
Signetics
3001
3002
N3001
N3002
National
2650
Signetics
2650
page
technology
description
type
Bipolar
Cyclic Redundancy Check generator/checker
Control Store Sequencer
Microprocessor
Designers evaluation kit
Synchronous Input/Output Port - three-state
8XOl
8X02
8X300
8X300KT100SK
N8T32
B170
B171
B167
B168-B169
B172
Synchronous I/O Port - open collector
Asynchronous I/O Port - open collector
Asynchronous I/O Port - three-state
Interface Vector Byte address programming kit
Bus Expander
N8T33
N8T35
N8T36
8T32KT1000SK
N8T39
8172
8172
8172
8173
8174
Microprocessor Central Processing Element
Microprogram Control Unit
Central Processing Element
Prototyping kit
Emulator kit
N2901-1
N3001
N3002
3000 KT1 000
3000KT8080SK
8175
8176
8177
8177
B178-B179
8-bit Microprocessor
8-bit Microprocessor
Programmable Communications Interface (PCI)
Multi Protocol Communications Controller (MPCC)
Programmable Peripheral Interface (PPI)
System Memory Interface (SMI)
Emulator 80ard for 2656
Microprocessor Prototyping Card
Adaptable Board Computer (A8C) assembled
Adaptable Board Computer (ABC) kit
2650
2650A
2651
2652
2655
2656
2650PC4000
2650PC100l
2650PC1500
2650KT9500
2650PC1600
2650PC2000
26500S2000
2650PC3000
2650KT9100
2650AS1000/1100
2650SM1000/1100
2650PL1000
TWIN
B180-8185
B180-8185
8186-8189
8190-8192
B193-8195
B196-8199
B200-8202
B203-8205
8206-8210
B206-B210
B211
B212-B213
8214·8216
B217-8220
8221-8222
B223-8224
B225-8226
8227
8228-B230
MOS
Resident Assembler Board
4k Memory Card
Microprocessor Demonstration System
Intelligent Typewriter Controller
Microprocessor Prototyping Kit
2650 Assembler version 3.2
2650 Simulator version 1.2
Signetics Higher Level Language (PL,uS)
Microcomputer Prototype Development System
8166
technical data -
bipolar
8X300 fixed instruction set bipolar microprocessor
The Signetics 8X300 is a monolithic, high-speed microprocessor implemented with bipolar Schottky technology. As the
central processing unit, CPU, it allows 16-bit instructions to be fetched, decoded and executed in 250 ns. A 250 ns instruction
cycle requires maximum memory access of 65 ns, and maximum I/O device access of 35 ns.
Instructions operate on an 8-bit byte. Input data can be rotated and masked before being subjected to an arithmetic or logic
operation. Output data can be shifted and merged with the input data before being applied to external logic. This allows
1 to 8-bit I/O and data memory fields to be accessed and the resulting data to be processed in a single instruction cycle.
Features
8X300 Instruction Set
•
•
•
•
•
•
•
•
•
•
185 ns instruction decode and execute delay (with Signetics
8T32/33 I/O port)
Eight 8-bit working registers
Single instruction access to 1-bit, 2-bit, 3-bit ... or 8-bit field
on I/O bus
Separate instruction address, instruction, and I/O data busses
On-chip oscillator
Bipolar Schottky technology
TTL inputs and outputs
Three-state output on I/O data bus
+5 V operation from 0 to 70°C
General purpose instruction set with substantial
capabilities in arithmetic, byte and bit manipulation
and I/O processing
• 16-bit instruction word
• 13 bits allow 8k program words
• Eight instruction classes: MOVE, ADD, AND, XOR,
XEC, NZT, XMIT and JMP
Typical system configuration
Pin configuration - I package
AS
+5 V
-
~,-
PROGRAM STORAGE
AIO
All
AI2
ST32
AD - A12
vee
VR
VCR
10 - 115
>-rSC
ROM, PROM/RAM
WC
TTL COMPATIBLE
SX300
MCLK
UP TO Bk x 16 BITS
IS2S1151
IVBO - IVB7
LB
XI
..e-
RB
=
LRESET
-.----l
1
.1
RESET
MCLK
r--
IVBO
r~
rr-r-r-r- -rr-r-
r-~
f--
IVBI
.....,.........
1 L-~
BOC
-
IVB2
IVB3
USER
CONNECTION
VCC
IVs4
IVB5
ST33
GND
~
r-r--
X2
HALT
HALT
--
IVB6
~
IVB7
LB
>-r---
IS
wc
112
113
r-- .....,.........
1 L-~
BOC
7Z73919
8167
microprocessors
technical data -
bipolar
8X300KT100SK designer's evaluation kit for
fixed instruction bipolar microprocessor
The Signetics 8X300 Fixed Instruction Bipolar Microprocessor provides new levels of high performance to microprocessor applications not previously possible with MOS
technology.
In the majority of cases, the choice of a bipolar microprocessor slice, as opposed to a MOS device, is based on
speed. The 8X300 processor, combined with high-speed
memory and I/O devices, is capable of executing all
instructions in 250 ns.
The 8X300 is optimized for control and data movement
applications. It has a 13-bit address bus for selecting
instructions from program storage and a separate input bus
for entering 16-bit instruction words. Data handling and
I/O device addressing are accomplished via the B-bit
Interface Vector (IV) bus. The IV bus is supported by four
additional control lines and a clock.
The addition may include memory, additional interfaces, or
special circuits which meet specific user requirements.
Controls are also provided for diagnostic and instructional
purposes by allowing various operating modes. In the WAIT
mode, the program may be single-stepped for ease of
checkout. The one-shot instruction jamming allows control
of the program start location, changes of program flow,
changing or examining the internal registers, or testing of
simple sequences. The repeated instruction jamming
provides a means of repetitive execution of an instruction
so that the I/O bus and the control lines may be examined
without software changes. In both of these jam cases, the
jammed instruction is selected by board-mounted switches.
The unique features of the BX300 IV bus and instruction
set permit B-bit parallel data to be rotated or masked before
undergoing arithmetic or logic operations. Then, the data
may be shifted and merged into any set of from 1 to 8
contiguous bits at the destination. The entire process of
input, shifting, processing and output is done in 1 instruction
cycle time. The 250 ns cycle time makes the 8X300 ideally
suited for high-speed applications.
The evaluation board contains all the elements which a
designer needs to judge the suitability of the 8X300 for his
systems applications. Included with the BX300 are 4 I/O
ports for external device interface, 256 bytes of temporary
(working) data storage, and 512 words of program storage,
all properly connected to the 8X300 to allow immediate
exercising of the board. For this purpose, the PROMs are
preprogrammed with the I/O control, RAM control, and
RAM integrity diagnostic programs. With the remaining
PROM space, the designer may enter his own benchmark,
test, or development routines_
The board design allows complete flexibility in access to the
address, instruction and IV busses as well as all controls and
signals of the 8X~00. The IV bus, I/O port user connection,
clock signals control lines, address bus and instruction bus
are wired to output pins, the board edge connector and flat
cable connectors.
The board layout permits variations and/or expansions of the
basic design. In addition to the access to all signals for
transfer off the board, a wire wrap area is provided so that
the designer may add to the board circuitry as he desires.
B168
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
250 ns CPU with crystal
4 I/O ports (32 lines)
256 bytes data storage
512 words program storage
run/wait control
single step
instruction jamming, one-shot instruction jam
repeated jam
all busses to output pins
firmware diagnostics
wire wrap area
edge connector
flat cable connectors
wire wrap posts for bus lines
Assembled kit 8X300KT100SK
SIGNETICS
8T32/33 IV BYTES
-
~
Vce VRI ~
SIGNETICS
825115
512x8
PROM
-=::::
ME~~________~~
==
-
~-------------o
AD-A3
MCLK,
SC, we
-
f---
~
-
IV BYTE2
BOc
UDD-UD7
>--
MELC
SIGNETICS
BOc
825115
512x8
PROM
1==18-="=5==~
UDO-U07
IV8YTE 3
f--- I----
7.
f--t--
l
L
UDO-UD7
256X8
+5
~
IV BYTE 4
RAM
~
""---'"
~
ME
I
I
8X300 KIT CONFIGURATION
Contents
1 each
8 each
2 each
4 each
1 each
2 each
4 each
2 each
2 each
1 each
1 eacH
8X300
82S116 (256 x 1 RAM)
82S115 (512 x 8 PROM)
8T32 (addressable bidirectional I/O port)
8T31 (bidirectional I/O port)
8T26A (quad bus transceiver)
74157 (quad 2-input data selector}
7474 (dual D flip-flop)
7400 (quad NAND gate)
7427 (3-input NOR gate)
p.c. board
miscellaneous parts
1 each introductory manual, assembly instructions, code
listings and schematics
8169
microprocessors
technical data -
bipolar
8X01 CRC generator/checker
Objective specification
The CRC Gen~rator/Checker circuit is used to provide an
error detection capability for serial digital data handling
system. The serial data stream is divided by a selected
polynomial and the division remainder is transmitted at the
end of the data stream as a Cyclic Redundancy Check
Character (CRCC), When the data is received, the same
calculation is performed. If the received message is errorfree, the calculated remainder should satisfy a predetermined
pattern. I n most cases, the remainder is zero except in the
case where Synchronous Data Link Control type protocols
are used whereby the correct remainder is checked for
1111000010111000 (XO - X15).
8 polynomials are provided and can be selected via a 3-bit
control bus. Popular polynomials such as CRC-16 and
CCITT are implemented. Polynomials can be program,med to
start with either all zeros or all ones.
Automatic right justification for polynomials of degree less
than 16 is provided.
Features
•
•
•
•
•
•
•
•
•
12 L technology
TTL inputs/outputs
5 MHz (max) data rate
total power dissipation = 175 mW (max)
VCC = 5,0 V
VJJ = 1,0 V
separate preset and reset controls
SO LC specified pattern match
automatic right justification
Typical applications
• floppy and other disc systems
• digital cassette and cartridge systems
• data communication systems
8170
Pin configuration - F, N packages
8X02 control store sequencer
Objective specification
The Signetics 8X02 is a Low-Power Schottky LSI device
intended for use in high performance microprogrammed
systems to control the fetch sequence of microinstructions_
When combined with st~ndard ROM or PROM, the 8X02
forms a powerful microprogrammed control section for
computers, controllers, or sequenced logic.
Pin configuration - N, I packages
Features
•
•
•
•
•
•
•
•
•
•
•
•
low-power Schottky process
50 ns cycle time (typ)
1024 microinstruction addressability
N-way branch
4-level stack register file (LIFO type)
automatic push/pop stack operation
"test & skip" operation on test input line
3-bit command code
three-state buffered outputs
auto-reset to address 0 during power up
conditional branching, pop stack and push stack
positive edge trigger (low-to-high transition)
Block diagram
1'21 1'01 lSI
lSI
131
1'31 1,,1 191
lSI
141
AgAs A7ASASA4A3A2A,AO
121
t-o
I
TEST
1251
B171
microprocessors
technical data -
bipolar
8-bit latched addressable bidirectional 1/0 ports
8T32
8T33
8T35
8T36
Three-state, synchronous user port
Open collector, synchronous user port
Open collector, asynchronous user port
Three-state, asynchronous user port
The interface vector (IV) byte is an 8-bit bidirectional data register designed to function as an I/O interface element in
microprocessor systems. It contains 8 data latches accessible from either a microprocessor (IV) port or a user port. Separate
I/O control is provided for each port. The 2 ports operate independently, except when both are attempting to input data into
the IV byte: In this case, the user port has priority.
A unique feature of the 8T32/33/35/36 IV byte is the way in which it is addressed. Each IV byte has an 8-bit, field programmable address, which is used to enable the microprocessor port. When the SC control signal is HIGH, data at the microprocessor
port is treated as an address. If the address matches the IV byte's internally programmed address, the microprocessor port is
enabled, allowing data transfer through it.
Features
• A field-programmable address allows 1 of 512 IV bytes on a bus to be selected, without decoder
• Each byte has 2 ports, one to the user, the other to a microprocessor. IV bytes are comploetely
bidirectional
• Ports are independent, with the user port having priority for data entry
• A selected IV byte de-selects itself when another IV byte address is sensed
• User data input available as synchronous (8T32, 8T33) or as asynchronous (8T35, 8T36) function
• The user data bus is available with three-state (8T32, 8T36) or open collector (8T33,8T35) outputs
• At power up, the IV byte is not selected and the user port outputs are HIGH
• Three-state TTL outputs for high drive capability
• Directly compatible with the 8X300 interpreter
r~~~~-------------,
I
I
• Operates from a single 5 V power supply over a
I
I
I
I
temperature range of 0 to 70°C
I
F, N packages
6172
8T32KT1000SK programming kit for 8T32 addressable I/O port
This kit provides signals and levels required for programming
the select addresses of the 8T32, 8T33, 8T35 and 8T36 I/O
ports. Controls are provided for programming, testing and
isolating the nichrome fuses which determine the device address.
Contents
1 x NE556A timer
2 x 74LS74 latch
1 x 74 LS93 counter
1 x 74LS154 decoder
4 x 8T26AB transceiver
2 x 74LS08 AND gate
1 x 8T80A NAND gate
1 x 74LS04 inverter
6 x 75450BA driver
2 x LM309DA regulator
printed circuit board and associated components
Block diagram
OSCILLATOR
8173
microprocessors
technical data -
bipolar
8T39 bus expander
The Bus Expander is specifically designed to increase the
I/O capability of 8X300 systems previously limited by
fan-out considerations. The bus expander serves as a buffer
between the 8X300 and blocks of I/O devices. Each bus
expander can buffer a block of 16 I/O ports wh ile only
adding a single load to the 8X300.
Features
•
.,
•
•
15 ns propagation delay
bidirectional
three-state outputs on both ports
pre programmed address range
Applications
The bus expander is not limited to use with the 8X300,
but may be applied in any system which uses a combined
address/data bus.
B174
Pin configuration - I, N packages
N2901-1 bipolar microprocessor processing element
Objective specification
The 4-bit bipolar microprocessor slice is designed as a
high-speed cascadable element intended for use in CPUs,
peripheral controllers, programmable microprocessors and
numerous other applications. The microinstruction
flexibility of the 2901-1 will allow efficient emulation of
almost any digital computing machine.
Pin configuration - I, N packages
The device, as shown in the block diagram below, consists
of a 16-word by 4-bit 2-port RAM, a high-speed ALU, and
the associated shifting, decoding and multiplexing circuitry.
The 9-bit microinstruction word is organized into 3 groups
of 3 bits each and selects the ALU source operands, the
ALU function, and the ALU destination register. The
microprocessor is cascadable with full look-ahead or with
ripple carry, has three-state outputs, and provides various
status flag outputs from the ALU. Advanced low-power
Schottky processing is used to fabricate this 40-lead LSI
chip.
Block diagram
DESH~AlIO:5A:Ul2Al~O
~
CONTROL
FUNCTION
SOURCE
-."",.,,~~,-;,o~~;,oo-,
-
,-------------------------,
Features
• 80 ns cycle time
• 2-address architecture
independent simultaneous access to 2 working
registers saves machine cycles
• 8-function ALU
performs addition, 2 subtraction operations, and 5 logic
functions on 2 source operands
• flexible data source selection
ALU data is selected from 5 source ports for a total of
203 source operand pairs for every ALU function
• left/right shift independent of ALU
add and shift operations take only 1 cycle
• 4 status fl ags
carry, overflow, zero, and negative
• expandable
connect any number of 2901-1s together for longer
word lengths
• microprogrammable
3 groups of 3 bits each for source operand, ALU function,
and destination control
8175
microprocessors
technical data -
bipolar
Microprogram control unit N3001
The N3001 MCU is one element of a bipolar microcomputer
set. When used with the 3002, 74S182, ROM or PROM,
a powerful microprogrammed computer can be implemented.
The 3001 MCU controls the fetch sequence of microinstructions
from the microprogram memory. Functions performed by the
3001 include:
- maintenance of microprogram address register
- selection of next microinstruction address
- decoding and testing of data supplied via several input busses
saving and testing of carry output data from the central
processing (CP) array
control of carry/shift input data to the CP array
control of microprogram interrupts
Features
• Schottky TTL process
• 45 ns cycle time (typ)
• direct addressing of standard bipolar PROM or ROM
• 512 microinstruction addressability
• advanced organization:
9-bit microprogram address register and bus organized to
address memory by row and column
4-bit program latch
2 flag registers
• 11 address control functions
• flight flag control functions:
4 flag input functions
4 flag output functions
8176
Pin configuration - I, N packages
Central processing element N3002
3000KTTOOO
pro to typing kit.
The N3002 central processing element (CPE) is one part
of a bipolar microcomputer set. The N3002 is organized as
a "2-bit slice an.d. performs the logical and arithmetic functions
required by microinstructions. A system with any number
of bits in a data word can be implemented by using multiple
N3002s, the N3001 microcomputer control unit, the
N74S182 carry look-ahead unit and ROM or PROM.
Pin configuration - I, N packages
Features
• 45 ns cycle time (typ)
• easy expansion to multiple of 2 bits
• 11 general purpose registers
• full function accumulator
• useful functions include:
2's complement arithmetic
logical AND, OR, NOT, EXCLUSIVE-NOR
increment, decrement
shift left/shift right
bit testing and zero detection
carry look-ahead generation
masking via K-bus
conditioned clocking allowing non-destructive
testing of data in accumulator and scratch pad
• 3 input busses
• 2 output busses
• control bus
3000KT1000 - 12 package prototyping kit
Central processing unit
•
•
•
microprogram control unit
central processing element
carry look-ahead
N30011
N30021
N74S182B
(1 x)
(4 x)
(1 x)
N82S1141
(3 x)
Microprogram memory
•
256 x 8 PROM
Input/output
• 8-bit bidirectional I/O port with latches
N8T31N
(1 x)
•
N8T26AB
(2 x)
4-bit bus transceiver
8177
microprocessors
technical data -
bipolar
3000KT8080SK bipolar emulation kit for the 3000 series
8080A system emulator
The 8080 Emulation Kit is a microprogram mable, microprocessor utilizing Schottky LSI components to implement
an emulation of an Intel 8080A microcomputer system.
The emulation is functionally equivalent to a microprocessor
system incorporating the following Intel devices: 8080A,
8228, 8224 and 8212. The kit provides the standard address,
data, status and control busses as defined in the Intel 8080
Microcomputer System Manual. Since the kit uses bipolar
LSI elements, the emulator lacks the two-phase nonoverlapping clock. Furthermore, those signals emanating
from the 8080 during SYNC time are not provided, but
rather the useful status signals provided by the 8228 system
controller are implemented. The emulation also provides an
extension of the 8228 operation during multi-byte interrupts.
This is realized by allowing any 8080 program branch
instruction to be inserted during interrupts rather than
restricting multi-byte instructions to CALL during interrupts.
Finally, a non-standard status signal, RTRAP, is provided
which indicates that the present instruction is a reserved or
undefined instruction. After this indication, the processor
will enter the normal HALT routine and await an interrupt.
(Intel 8080A operation during undefined instructions is
undefined.) Thus all 12 of the unused instructions in the
8080 instruction set are reserved for future instruction set
expansion. These unused codes may be used at any time to
extend the usual instruction set without requiring any
reprogramming of the bipolar PROMs used for microprogram
memory. Finally, the emulator is fully static so that the clock
may be adjusted from a typical cycle time of 150 ns to d.c.
The kit contains all the parts necessary to construct the
emulator and includes preprogrammed PROMs. The kit is
designed to be assembled by a skilled technician in about
8 hours.
8178
F~atures
•
•
•
•
•
•
•
•
•
full emulation of 8080A system
speed increase by factor of 2 to 9,2 over 8080A system
static operation; microcycle time d.c. to 150 ns
operation from single +5 V supply
executes all 8080 instructions
hardware multiply and divide
microprogram expandable
includes single-phase clock
full vectored interrupt to any location within 64k memory
Kit contents
1 each
1 each
8 each
7 each
1 each
2 each
2 each
3 each
3 each
1 each
2 each
1 each
11 each
2 each
3 each
1 each
2 each
1 each
1 each
3 each
1 each
1 each
1 each
2 each
1 each
1 each
1 each
1 each
plus:
N74123
N3001
N3002
N82S115
N82S23
N82S123
N82S126
N8263
N74S182
N74S280
N7475
DM8613
N74S174
N8T28
N8T97
N74S153
N74S157
N7400
N74S02
N74S04
N74S08
N74S10
N74S133
resistor networks 1 kn, 16 pin
P.C. board
manual
schematic
set of microprogram listings
over 25 miscellaneous resistors, capacitors and
other parts
Block diagram
MEMR
MEMW
iOR
;ow
INTA
[
RITA
ATRAP
-_HLDA
-_INTE
8179
microprocessors
technical data -
MOS
8-bit MOS microprocessors 2650, 2650A
The 2650 processor is a general purpose, single chip, fixed
instruction set, parallel 8-bit binary processor. It can perform
any data manipulations through execution of a stored
sequence of machine instructions. The processor has been
designed to closely resemble conventional binary computers,
but executes variable length instructions of one to three
bytes in length. BCD arithmetic is made possible through
use of a special "DAR" machine instruction.
The most complex direct instruction is three bytes long
and takes 9,6 JJS to execute assuming that the processor is
running at its maximum clock rate and has an associated
memory with cycle and access times of 620 ns or less. The
minimum instruction execution time is 4,8 JJS-
The 2650 is manufactured using Signetics' n-channel
silicon gate MOS technology. N-channel provides high
carrier mobility for increased speed and also allows the use
of a single 5 V power supply. Silicon gate provides for
better density and speed. Standard 40-pin dual in-line
packages are used for the processor.
The Data Bus and Address signals are three-state to provide
convenience in system design. Memory and I/O interface
signals are synchronous so that Direct Memory Access
(DMA) and multiprocessor operations are easy to implement.
The 2650 contaips a total of seven general purpose
registers, each eight bits long. They may be used as a source
or destination for arithmetic operations, as index registers
and for I/O transfers.
The processor can address up to 32 768 bytes of memory
in four pages of 8192 bytes each. Processor instructions
are one, two or three bytes long, depending on the
instruction. Variable length instructions tend to conserve
memory space since a one or two-byte instruction may
often be used rather then a three-byte instruction. The
first byte of each instruction always specifies the operation
to be performed and the addressing mode to be used. Most
instructions use six of the first eight bits for this purpose,
with the remaining two bits forming the register field. Some
instructions use the full eight bits as an operation code.
B180
The clock input to the processor is a single phase pulse
train and uses only one interface pin_ It requires a normal
TTL voltage swing, so no special clock driver is required.
The interrupt mechanism is implemented as a single level,
address vectoring type. Address vectoring means that an
interrupting device can force the processor to execute code
at a device-determined location in memory.
The 2650A is a functional equivalent of the 2650 with a new
mask design which provides improved device-operating
margins. Both versions are pin-for-pin compatible.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Pin configuration - I package
general purpose processor
single chip
fixed instruction set
parallel 8-bit binary operations
40-pin dual in-line package
n-channel silicon gate MOS technology
TTL compatible inputs and outputs
single power supply of +5 V
seven general purpose registers
return address stack, 8 deep, on chip
32k byte addressing range
separate address and data lines
variable length instructions of 1, 2 or 3 bytes
75 instructions
machine cycle time of 2,411s at clock frequency
of 1,25 MHz
direct instructions take 2, 3, or 4 cycles
single phase TTL level clock input
static logic
th ree-state output buses
register, immediate, relative, absolute, indirect, and
indexed addressing modes
vector interrupt format
8181
microprocessors
technical data -
MOS
Addressing modes
The 2650 processor can develop addresses in eight ways:
• register addressing
• immediate addressing
• relative addressing
• relative, indirect addressing
• absolute addressing
• absolute, indirect addressing
• absolute, indexed addressing
• absolute, indirect, indexed addressing
Interface signal definition
ADRO-ADR12 - The low order 13 bits of address for
memory access are on these pins. ADRO-ADR7 are also used
in two-byte I/O instructions. These outputs are three·state
buffers controlled by ADREN.
ADR13-E/NE - This multiplexed output signal delivers the
AD R 13 address bit when M/IO is in the M phase or
discriminates between Extended and Non-Extended I/O
instructions when M/IO is in the I/O phase.
ADR14-D/C - Address 14 or Data/Control is a multiplexed
output signal. This pin delivers the AD R 14 address bit when
M/IO is in the M phase or discriminates between Data and
Control I/O instructions when M/IO is in the I/O phase.
R/W - This output signal describes an I/O or memory
operation as Read or Write, and defines whether the
bidirectional DBUS is transmitting or receiving.
WRP - This Write Pulse is generated during write sequences
and may be used to strobe memory or I/O devices.
SENSE - Is an input, independent of the other I/O signals,
that provides a direct input to the processor.
FLAG - This pin provides a direct output signal that is
completely independent of the other I/O signals.
INTREO - Interrupt Request. This input is used by external
devices to force the processor into the interrupt sequence.
ADREN - Address Bus Enable is an input providing the
external control for the ADRO-ADR12 three-state buffer
drivers.
INTACK - Interrupt Acknowledge is the signal used by the
processor to inform external devices that it has entered an
interrupt sequence.
DBUSO-DBUS7 - This is the B-bit, bidirectional three-state
bus over which data is communicated into or out of the
processor.
PAUSE - Pause is used to temporarily stop the processor at
the end df the current instruction. It may stop processing
for an indefinite length of time and is available to use for
DMA (Direct Memory Access).
DBUSEN - Data Bus Enable is an input that controls the
three-state buffer drivers for DBUSO to DBUS7.
OPREO - Operation Request is an output signal that informs
external devices that the information on other output pins
is valid.
OPACK - Operation Acknowledge is an input which is used
by external devices to end an I/O or memory signalling
sequence.
M/iO - Memory/Input-Output. This output informs external
devices whether Memory or Input/Output functions are
being performed.
B182
RUN/WAIT - Informs external circuits as to the RunlWait
status of the 2650 processor.
RESET - Is an input that resets the program counter to
zero and clears the interrupt inhibit bit.
CLOCK - This is the only clock input to the processor.
It accepts standard TTL levels.
Vee -
+5
V power.
GND - The logic and power supply ground for the processor.
Processor hardware architecture
A block diagram of the processor is shown below. The first,
second, and third bytes of instructions are read into the
processor on the data bus and loaded into the Instruction
Register, Holding Register, and Data Bus Register, respectively. The instructions are decoded through a combination
of ROM and random logic.
The ALU performs arithmetic, Boolean, and combinatorial
shifting functions. It operates on eight bits in parallel and
utilizes carry-look-ahead logic. A second adder is used to
increment the instruction address register and to calculate
operand addresses for the indexed and relative addressing
modes. This separate address adder allows complex
addressing modes to be implemented with no increase in
instruction execution time.
The General Purpose Register Stack and the Subroutine
Return Address Stack are implemented with static RAM
cells. The Register Stack consists of seven 8-bit registers.
The Subroutine Stack can contain eight 15-bit addresses,
thereby allowing eight levels of subroutine nesting. Placing
the Subroutine Stack on the chip allows efficient ROMonly systems to be implemented in some applications.
Separate 15-bit Instruction Address and Operand Address
Registers are provided. The 2650 is an 8-bit binary
processor with BCD capability.
Block diagram
Program Status Word
The Program Status Word (PSW) increases the flexibility
and processing power of the 2650. The PSW is a special
purpose register within the processor that contains status
and control bits.
It is divided into two registers called the Program Status
Upper (PSU) and Program Status Lower (PSL). The PSW
bits may be tested, loaded, stored, preset, or cleared using
the instructions which affect the PSW. The bits are utilized
as follows:
PSU
S
Sense
Flag
Interrupt Inhibit
SP2
SP 1
SPO
Stack POinter Two
Stack POinter One
Stack POinter Zero
CC 1
CCO
IDC
RS
Condition Code One
Condition Code Zero
Interdigit Carry
Register Bank Select
WC With/Without Carry
OVF Overflow
COM Logical/Arith. Compare
C
Carry/Borrow
B183
microprocessors
technical data -
MOS
I nstruction set
description of operation
affects
Z
I
R
A
000000 lZ
000 001 21
000010 2R
000011 3A
Load
Load
Load
Load
CC
CC
CC
CC
Z
R
A
110000 lZ
110 010 2R
110 all 3A
Store Register Zero (r
Store Relative
Store Absolute
Z
100 000
100 001
100 010
100 all
Add
Add
Add
Add
mnemonic
~
LOO \
~
"
.3 STR
ADD
\
1
R
A
u
',..
GI
Z
E
.c
,~ SUB
<{
DAR
R
A
1
1
'ii
u
'BIIOR
0
...J
l!!
aECOM
0
()
lZ
21
2R
3A
101000 1Z
101001 21
101010 2R
101011 3A
Register Zero
Immediate
Relative
Absolute
*- 0)
to Register Zero w/wo Carry
Immediate w/wo Carry
Relative w/wo Carry
Absolute w/wo Carry
Subtract from Register Zero w/wo Borrow
Subtract Immediate w/wo Borrow
Subtract Relative w/wo Borrow
Subtract Absolute w/wo Borrow
1)
1)
3
4
CC (Note 1)
2
3
4
C, CC
C, CC
C, CC
C, CC
(Note
(Note
(Note
(Note
1),
1),
1),
1),
IDC,
IDC,
IDC,
IDC,
OVF
OVF
OVF
OVF
2
2
3
4
C,
C,
C,
C,
(Note
(Note
(Note
(Note
1),
1),
1),
1),
IDC,
IDC,
IDC,
IDC,
OVF
OVF
OVF
OVF
2
2
CC
CC
CC
CC
3
4
3
2
2
4
to Register Zero
Immediate
Relative
Absolute
CC
CC
CC
CC
(Note
(Note
(Note
(Note
1)
1)
1)
1)
2
3
4
to Register Zero
Immediate
Relative
Absolute
CC
CC
CC
CC
(Note
(Note
(Note
(Note
1)
1)
1)
1)
2
2
3
4
CC
CC
CC
CC
(Note
(Note
(Note
(Note
3)
4)
4)
4)
2
3
4
R
A
Z
I
R
A
011000
011001
011010
011011
lZ
21
2R
3A
Inclusive OR
Inclusive OR
Inclusive OR
Inclusive OR
Z
R
A
001000 lZ
001001 21
001010 2R
001011 3A
Exclusive OR
Exclusive OR
Exclusive OR
Exclusive OR
Z
I
R
A
111000 lZ
111 001 21
111010 2R
111011 3A
Compare
Compare
Compare
Compare
~ RRL
2
1)
(Note 1)
(Note 1)
(Note 1)
(Notel)
Decimal Adjust Register
AND
AND
AND
AND
GI
1)
CC (Note 2)
lZ
lZ
21
2R
3A
!9 RRR
cycles
(Note
(Note
(Note
(Note
CC
CC
CC
CC
100 101
1
EOR \
format*
010 000
010001
010010
010011
Z
AND
op code
to Register Zero (r
Immediate
Relative
Absolute
*- 0)
to Register Zero Arithmetic/Logical
Immediate Arithmetic/Logical
Relative Arithmetic/Logical
Absolute Arithmetic/Logical
010100
110100
lZ
lZ
Rotate Register Right w/wo Carry
Rotate Register Left w/wo Carry
C, CC, IDC, OVF
C, CC, IDC, OVF
3
2
2
BCT
R
A
000110
000111
2R
3B
Branch On Condition True Relative
Branch On Condition True Absolute
3
3
~ BCF
R
A
100110 2R
100111 3B
Branch On Condition False Relative
Branch On Condition False Absolute
3
3
R
A
010 110 2R
010111 3B
Branch On Register Non-Zero Relative
Branch On Register Non-Zero Absolute
3
3
{ AR
110110 2R
110111 3B
Branch On Incrementing Register Relative
Branch On Incrementing Register Absolute
3
3
c
en'" BRN
BIR
B184
mnemonic
op code
format*
{:
111110
111111
2R
3B
Branch On Decrementing Register Relative
Branch On Decrementing Register Absolute
BDR
&.
u
cC\l
description of operation
affects
cycles
3
3
ZBRR
10011011
2ER
Zero Branch Relative, Unconditional
3
BXA
100111 11
3EB
Branch Indexed Absolute, Unconditional
(Note 5)
3
001 110
2R
001111
3B
fR
101110
2R
lA
101 111
3B
011 110
2R
011111
3B
Branch To Subroutine
Relative
Branch To Subroutine
Absolute
Branch To Subroutine
Relative
Branch To Subroutine
Absolute
Branch To Subroutine
Relative
Branch To Subroutine
Absolute
ZBSR
101 11011
2ER
BSXA
10111111
3EB
000 101
001 101
i REDD
; WRTC
g REDC
a
WRTE
c
_ HALT
J~ Nap
:E TMI
m
BST
E BSF
!
(:
On Condition True,
SP
3
On Condition True,
SP
3
On Condition False,
SP
3
On Condition False,
SP
3
On Non-Zero Register,
SP
3
On Non-Zero Register,
SP
3
Zero Branch To Subroutine Relative,
Unconditional
Branch To Subroutine, Indexed, Absolute
Unconditional (Note 5)
SP
3
SP
3
lZ
lZ
Return From Subroutine, Conditional
Return From Subroutine and Enable
Interrupt, Conditional
SP
SP,II
3
111100
011100
101100
001 100
110101
010101
lZ
lZ
lZ
lZ
21
21
Write Data
Read Data
Write Control
Read Control
Write Extended
Read Extended
010000 00
110 000 00
111101
lE
lE
21
Halt, Enter Wait State
No Operation
Test Under Mask Immediate
lE
lE
Load Program Status, Upper
Load Program Status, Lower
F, II, SP
CC, IDC, RS, WC,
OVF,COM,C
2
&.
u
cC\l
ii BSN
CI)
c
.+:
(:
::I
I:
.g
(/)
RET
{~
WRTD
-
REDE
3
CC (Note 1)
2
2
2
2
3
3
CC (Note 6)
2
2
3
CC (Note 1)
CC (Note 1/
LPS
{~
100100 10
100100 11
SPS
{~
00010010
000100 11
lE
lE
Store Program Status, Upper
Store Program Status, Lower
CC (Note 1)
CC (Note 1)
2
1;; CPS
{~
01110100
01110101
2EI
2EI
Clear Program Status, Upper, Masked
Clear Program Status, Lower, Masked
F,II,SP
CC, IDe, RS, we,
OVF, COM,e
3
PPS
{~
01110110
all 101 11
2EI
2EI
Preset Program Status, Upper, Masked
Preset Program Status, Lower, Masked
F,II,SP
CC, IDC, RS, we,
OVF, COM, C
3
TPS
{~
10110100
10110101
2EI
2EI
Test Program Status, Upper, Masked
Test Program Status, Lower, Masked
CC (Note 6)
ee (Note 6)
3
'"
~
E
f?
C)
0
a':
2
2
3
3
3
* Format code: The number indicates the number of bytes_ The letter(s) indicate the format type(s).
Notes:
1. Condition code (CC1, CCOI: 01 if positive, 00 if zero, 10 if negative.
2. Condition code is set to a meaningless value.
3. Condition code (CC1, CCO): 01 if RO > r, 00 if RO = r, 10 if RO < r.
4. Condition code (CC1, CCO): 01 if r > V, 00 if r = V, 10 if r < V.
5. Index register must be register 3 or 3'.
6. Condition code (CC1, CCO): 00 if all selected bits are 1s,
10 if not all selected bits are 1s.
B185
microprocessors
technical data -
MOS
Programmable Communications Interface (PCI)
2651
Applications
• intelligent terminals
• network processors
• front end processors
• remote data concentrators
• computer to computer links
• serial peripherals
The Signetics 2651 PCI is a universal synchronous/
asynchronous data communications controller chip designed
for microcomputer systems. It interfaces directly to the
Signetics 2650 microprocessor and may be used in a polled
or interrupt driven system environment. The 2651 accepts
programmed instructions from the microprocessor and
supports many serial data communication disciplines,
synchronous and asynchronous, in the full or half-duplex
mode.
The PCI serializes parallel data characters received from the
microprocessor for transmission. Simultaneously, it can
receive serial data and convert it into parallel data characters
for input to the microcomputer.
The 2651 contains a baud rate generator which can be
programmed to either accept an external clock or to generate
internal transmit or receive clocks. Sixteen different baud
rates can be selected under program control when operating
in the internal clock mode.
The PCI is constructed using Signetics' n-channel silicon
gate depletion load technology and is packaged in a 28-pin
DIP.
Features
• Synchronous operation
5 to 8-bit characters
single or double SYN operation
illternal character synchronization
transparent or non-transparent mode
automatic SYN or DLE-SYN insertion
SYN or DLE stripping
odd, even, or no parity
local or remote maintenance loop back mode
baud rate: d.c. to 0,8M baud (lx clock)
• Asynchronous operation
5 to 8-bit characters
1,1% or 2 stop bits
odd, even, or no parity
parity, overrun and framing error detection
line break detection and generation
false start bit detection
automatic serial echo mode
local or remote maintenance loop back mode
baud rate: d.c. to O,8M baud (lx clock)
d.c. to 50k baud (16x clock)
d.c. to 12,5k baud (64x clock)
Pin configuration - I package
Pin designation
pin no.
symbol
name and function
type
27,28,1,2,5-8
21
12,10
13
11
22
24
23
17
16
18
9
25
19
3
15
14
20
26
4
DO-D7
RESET
AO-A1
8-bit data bus
Reset
Internal register select lines
Read or write command
Chip enable input
Data set ready
Data terminal ready
Request to send
Clear to send
Data carrier detected
Transmitter empty or data set change
Transmitter clock
Receiver clock
Transmitter data
Receiver data
Transmitter ready
Receiver ready
Baud rate generator clock
+5 V supply
Ground
I/O
6186
R/W
CE
DSR
DTR
RTS
CTS
DCD
TxEMT/DSCHG
TxC
RxC
TxD
RxD
TxRDY
RxRDY
BRCLK
VCC
GND
I
o
o
I
o
I/O
I/O
o
I
o
o
Block diagram
The PCI consists of six major sections. These are the
transmitter, receiver, timing, operation control, modem
control and SYN/D LE control. These sections communicate
with each other via an internal data bus and an internal
control bus. The internal data bus interfaces to the microprocessor data bus via a data bus buffer.
Other features
• internal or external baud rate clock
• 16 internal rates - 50 to 19 200 baud
• double buffered transmitter and receiver
• full or half-duplex operation
• fully compatible with 2650 CPU
• TTL compatible inputs and outputs
• single 5 V power supply
• no system clock required
• 28-pin dual in-line package
REseT
...
A,
(12)
MODE REGISTER 2
RIW
CE
(11)
9RClK
TiC
MODE REGISTER 1
(10)
(13)
TxRDY
COMMAND REGISTER
STATUS REGISTER
(20)
(9)
BAUD RATE
GENERATOR
AND
CLOCK CONTROL
R.ROY
RiC
(25)
OSR
(22)
DCD
(16)
ffi
(17)
RTS
(23)
OTR
(2')
~Vcc
(18)
~GND
TxEMTI
MODEM
CONTROL
DSCHG
B187
microprocessors
technical data -
MOS
Programmable Communications Interface (continued)
Table 1 Baud rate generator characteristics - crystal frequency = 5,0688 MHz
baud
rate
theoretical
frequency
16x clock
actual
frequency
16x clock
50
75
110
134,5
150
300
600
120O
180O
200O
2400
360O
4800
7200
9600
19200
0,8 kHz
1,2
1,76
2,152
2,4
4,8
9,6
19,2
28,8
32,0
38,4
57,6
76,8
115,2
153,6
307,2
0,8 kHz
1,2
1,76
2,1523
2,4
4,8
9,6
19,2
28,8
32,081
38,4
57,6
76,8
115,2
153,6
316,8
percentage
error
0,016
0,253
3,125
duty
cycle
%
divisor
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
50/50
48/52
50/50
6336
4224
2880
2355
2112
1056
528
264
176
158
132
88
66
44
33
16
Note
16x clock is used in asynchronous mode. In synchronous mode clock multiplier is 1x and duty cycle is 50% for any baud rate.
8188
Table 2 CPU-related signals
pin name
pin no.
VCC
26
GND
4
Ground.
RESET
21
A high on this input performs a maste .... reset on the 2651. This signal
asynchronously terminates any device activity and clears the Mode,
Command and Status registers. The device assumes the idle state and
remains there until initialized with the appropriate control words.
10,12
Address lines used to select internal PCI registers.
input/output
function
+5 V supply input.
13
Read command when low, write command when high.
11
Chip enable command. When low, indicates that control and data
lines to the PCI are valid and that the operation specified by the R/W,
Al and AO inputs should be performed. When high, places the DO·D7
lines in the three-state condition.
8,7,6,5
2,1,28,27
I/O
8-bit, three-state data bus used to transfer commands, data and status
between PCI and the CPU. DO is the least significant bit; D7 the
most significant bit.
15
o
This output is the complement of Status Register bit SRO. When low,
it indicates that the Transmit Data Holding Register (THR) is ready to
accept a data character from the CPU. It goes high when the data
character is loaded. This output is valid only when the transmitter is
enabled. It is an open drain output which can be used as an interrupt
to the CPU.
14
o
This output is the complement of Status Register bit SR 1. When low,
it indicates that the Receive Data Holding Register (RHR) has a
character ready for input to the CPU. It goes high when the R H R is
read by the CPU, and also when the receiver is disabled. It is an open
drain output which can be used as an interrupt to the CPU.
18
o
This output is the complement of Status Register bit SR2. When low,
it indicates that the transmitter has completed serialization of the last
character loaded by the CPU, or that a change of state of the DSR or
DCD inputs has occurred. This output goes high when the Status
Register is read by the CPU, if the TxEMT condition does not exist.
Otherwise, the THR must be loaded by the CPU for this line to go
high. It is an open drain output which can be used as an interrupt to
the CPU.
8189
microprocessors
technical data -
MOS
Multi-Protocol Communications Controller (MPCC)
2652
The 2652 Multi-Protocol Communications Controller
(MPCC) is a monolithic n-channel MaS LSI circuit that
formats, transmits and receives synchronous serial data while
supporting bit-oriented or byte control protocols. The chip
is TTL compatible, operates from a single +5 V supply, and
can interface to a processor with an 8 or 16-bit bidirectional
data bus.
Features
• d.c. to 500k bps data rate
• protocol management
bit-oriented protocols (BOP): SDLC, ADCCP, HOLC
byte-control protocols (BCP): BI-SYNC, DDCMP
• programmable operation
8 or 16-bit three-state data bus
protocol selection - BOP or BCP
error control -eRC or VRC or no error check
character length - 1 to 8-bits for BOP or 5 to 8 bits for
BCP
SYNC or secondary station address comparison for
BCP-BOP
idle transmission of SYNC/FLAG or MARK for BCP-BOP
• automatic detection and generation of special BOP control
sequences, i.e., FLAG, ABORT, GA
• zero insertion and deletion for BOP
• short character detection for last BOP data character
• SYNC generation, detection, and stripping for BCP
• maintenance mode for self-testing
• common parameter control registers
• independent status and data registers for receive and
transmit
• status indicator signals can be used as CPU interrupts
• TTL compatible
• 40-pin package
• single +5 V supply
Applications
• intelligent terminals
• network processors
• front end communications
• remote data concentrators
• communication test equipment
• computer to computer links
B190
Pin configuration - I package
MPCC block diagram
+---16BITS--DQ15-
DB.
TOSR
INTERNAL
BUS
RECEIVER
LOGIC AND
CONTROL
TRANSMITTER
LOGIC AND
CONTROL
Pin designation
mnemonic
pin no.
type
name and function
OB15-DBOO
17-10
24-31
I/O
Data Bus. DB07-DBOO contain bidirectional data while DB15-DB08 contain control
and status information to or from the processor. Corresponding bits of the high and
low order bytes can be WIRE OR'ed into an 8-bit data bus.
A2-AO
19-21
Address Bus. A2-AO select internal registers. The four 16-bit registers can be
addressed on a word or byte basis. See Register Address section.
BYTE
22
Byte. Single byte (8-bit) data bus transfers are specifjed when this input is high. A
low level specifies 16-bit data bus transfers.
CE
Chip Enable. A high input permits a data bus operation when DBEN is activated.
R/W
18
Read/Write. R/W controls the direction of data bus transfer. When high, the data is
to be loaded into the addressed register. A low input causes the contents of the
addressed register to be presented on the data bus.
DBEN
23
Data Bus Enable. After A2-AO, CE, BYTE and R/W are set up, DB EN may be
strobed. During a read, the three-state data bus (DB) is enabled with information
for the processor. During a write, the stable data is loaded into the addressed
register and TxBE will be reset if TDSR was addressed.
RESET
33
40
Reset. A high level initializes all internal registers and timing.
MM
Maintenance Mode. MM internally gates TxSO back to RxSI and TxC to RxC for
off-line diagnostic purposes. The RxC input is disabled when MM is asserted.
B191
microprocessors
technical data -
MOS
Multi-Protocol Communications Controller (continued)
Pin designation
type
name and function
mnemonic
pin no.
RxE
g
RxA
5
0
Receiver Active. RxA is asserted when the first data character of a message is ready
for the processor. In the BOP mode this character is the address. The received
address must match the secondary station address if the MPCC is a secondary station.
In BCP mode, if Strip-SYNC (PCSAR 13) is set, the first non-SYNC character is the
first data character; if Strip-SYNC is zero, the character following the second SYNC
is the first data character. In the BOP mode, the closing F LAG resets RxA. In the
BCP mode, RxA is reset by a low level at RxE.
RxDA*
6
0
Receiver Data Available. RxDA is asserted when an assembled character is in RDSRL
and is ready to be presented to the processor. This output is reset when RDSR L is
read.
RxC
2
S/F
4
RxSA*
Receiver Enable. A high level input permits the processing of RxSI data. A low level
disables the receiver logic and initializes all receiver registers and timing.
Receiver Clock. RxC (1x) provides timing for the receiver logic. The positive-going
edge shifts serial data into the RxSR from RxSI.
0
SYNC/FLAG. S/F is asserted for one RxC clock time when a SYNC or FLAG
character is detected.
0
Receiver Status Available. RxSA is asserted when there is a zero to one transition of
any bit in RDSRH except for RSOM. It is cleared when RDSRH is read.
= '1', space = '0'.
RxSI
3
Receiver Serial Input .. RxSI is the received serial data. Mark
TxE
37
Transmitter Enable. A high level input enables the transmitter data path between
TDSRL and TxSO. At the end of a message, a low level input causes TxSO = 1 (mark)
and TxA = 0 after the closing F LAG (BOP) or last char.acter (BCP) is output onTxSO.
TxA
34
0
TxBE*
35
0
TxU*
36
0
TxC
39
Transmitter Underrun. TxU is asserted during a transmit sequence when the service
of TxBE has been delayed for more than one character time. This indicates the
processor is not keeping up with the transmitter (TxSO depends on PCSAR 11).
TxU is reset by RESET or setting of TSOM (TDSRg).
Transmitter Clock. TxC (1x) provides timing for the transmitter logic. The positivegoing edge shifts data out of the TxSR to TxSO.
TxSO
38
0
Transmitter Serial Output. TxSO is the transmitted serial data.
VCC
GND
32
PS
GND
+5 V power supply.
o V reference ground.
9
* Indicates possible interrupt signal.
B192
Transmitter Active. TxA is asserted when TxE is high and TSOM (TDSRg) is set.
This output will reset when TxE is low and the closing F LAG (BOP) or last
character (BCP) has been output on TxSO.
Transmitter Buffer Empty. TxBE is asserted when the TDSR is ready to be loaded
with new control information or data. The processor should respond by loading the
TDSR which resets TxBE.
Programmable Peripheral Interface (PPI)
2655
The 2655 PPI is designed for 2650 microcomputer systems.
It consists of three ports (24 I/O pins). which can be
individually programmed to function as input, output or
bidirectional ports. Interface with the 2650 is via an eight·
bit bidirectional data bus.
The PPI may be programmed for five major modes of
operation: static I/O, strobed I/O, bidirectional I/O, serial
I/O, or serial/timer I/O. In the serial/timer mode, parallelto-serial or serial-to-parallel conversion of data operates
simultaneously with the timer on one of the three ports.
Features
• five selectable major operating modes:
static I/O
strobed I/O
bidirectional I/O
serial I/O
serial/timer I/O
• three ports (A, B and C) with 24 programmable I/O pins
• completely TTL compatible
• 3 MHz programmable timer or event counter
• fully compatible with the 2650 microprocessor
• direct bit set/reset capability of each bit for all three ports
• abil ity to source 1 mA at 1,5 V
• 300 ns port read/write access time
• operates in a polled or interrupt driven system
environment
• 40-pin dual in-line package
• single +5 V supply
Pin configuration - , package
Block diagram
8193
microprocessors
technical data -
MOS
Programmable Peripherallnteriace (continued)
Operation
The following is a functional description of the five operating
modes of the PPI. Each mode is selected via a mode control
word. Interrupt generation and interrupt enable/disable
functions are available with each mode except the static
mode which operates entirely under program control.
Static mode
All three ports can operate in the static I/O mode. This mode
allows each pin of each port to be either an input pin or an
output pin. A logic '1' written to a pin of a selected port
from the 2650 will condition that pin to be an input or
output pin. Writing a logic '0' to the pin conditions that
pin to be an output pin only. Outputs are latched while
inputs are not. Each pin may be set or reset on an individual
basis by a "set/reset" command.
Strobed I/O mode
In this mode, data may be transferred to or from a specified
port in conjunction with strobe or "handshaking" signals.
Ports A and B can operate in the strobed I/O mode and
port C bits are used as control and status bits. In this mode
both inputs and outputs are latched, and each port can be
either an input or output.
Bidirectional I/O mode
This mode provides a means for communicating with a
peripheral device over a single eight-bit bus with both
transmitting and receiving capability. Port A operates in this
mode with Port C pins providing "handshaking" signals for
8194
status and control. Both inputs and outputs are latched and
port direction is determined by a control signal from the
peripheral.
Serial I/O mode
This mode provides a means for communicating with a
peripheral device on a bit serial basis through Port B.
Parallel data from the CPU will be shifted out to the
peripheral over the least significant bit of Port B (PBO).
Eight clocks will be required for a complete character
transfer. The eight-bit character will be repeatedly shifted
out until the CPU presents another character to Port B.
For the serial in mode, data is input from the peripheral at
the most significant bit of Port B (PB7). Eight clocks will be
required to assemble the eight-bit character. An interrupt
request will signal the CPU for character transfer.
Timer mode
This mode enables the PPI to perform time interval
measurements, pulse width measurements, and event counting.
This timing function is performed during the serial/timer
mode, and is restricted to Port B only. The mode is initiated
by selecting the desired operation and loading a l6-bit down
counter with an initial value. The counter does not start
counting until the upper eight bits have been loaded. An
interrupt can be generated to signal the CPU when the timer
reaches a zero count.
Pin definitions
pin no.
pin name
type
function
27-34
07-00
I/O
Eight-bit three-state bidirectional data bus. All data and command transfers are made using
this bus. DO is the least-significant bit; 07 is the most-significant bit.
35
Reset
Resets all internal storage elements, including the data latches and command registers.
Resets ports A, Band e to accept input data, and operating mode to static mode. A
functionally equivalent on-chip power-on reset is also provided.
8,9
A1,AO
Address lines used to select internal PPI modes or registers. Indicates control or data words
to be placed on the data bus. Used in conjunction with the R/W line.
5
R/W
When low, gates the selected register to the data bus. When high, gates the contents of the
data bus into the selected register.
6
CE
When low, identifies that control and data lines to the PPI are valid.
36
SCLK
Provides a serial clock for the parallel-to-serial or serial-to-parallel conversion.
37-40
1-4
PA7-PAO
I/O
An eight-bit three-state quasi-bidirectional port.* PAO is the least-significant bit; PA7 is the
most-significant bit.
25-18
PB7-PBO
I/O
An eight-bit quasi-bidirectional port. * PBO is the least-significant bit; PB7 is the mostsignificant bit.
Port B also has parallel-to-serial or serial-to-parallel conversion capability with PBO, 7 being
either the serial output or input respectively. Data is double buffered.
Port B can also operate as a 16-bit binary timer, as an event counter, or as a pulse width
indicator. An output is generated whenever the counter is decremented to the all-zero state.
10-17
PC7-PCO
I/O
A eight-bit quasi-bidirectional port. * PCO is the least-significant bit; PC7 is the mostsignificant bit. Port C bits are also used as control and.status signals in conjunction with.
ports A and B. When the pin bit is used as a strobe input, the line receives an external strobe
input which clocks information from port A or port B into the port A or port B data
latches.
When the pin is used as a status line, the line indicates port A or port B status condition
which may be used as an interrupt input to the 2650.
26
Vce
+5 V supply.
7
GNO
Ground.
* A quasi-bidirectional port allows each bit to be designated as input or output under program control. If any bit of the port
is set to a '1', that bit becomes an input or output depending on the usage of the port pin. If the peripheral is driving the port
bit (i.e. overriding the Logic '1' condition produced by the internal port pull-up resistor), then the bit is an input. If the
peripheral is receiving from the port bit, then a '0' or '1' written to the port will be transmitted to the peripheral.
6195
microprocessors
technical data -
MOS
System Memory Interface (SM!)
2656
The 2656 System Memory Interface (SMI) is a mask
programmable circuit with on·chip memory, I/O, and timing
(clock) functions. It is usable either in 2·chip or multi-chip
microcomputer systems. Used with the 2650 microprocessor,
it provides a 2·chip microcomputer. This 2·chip microcomputer offers the user 2kx8 bits of ROM, 128x8 bits of
RAM, and an 8-bit multi-function I/O port.
Used as a system interface in a multi-chip microcomputer,
with large memory and/or additional peripheral requirements,
the programmable versatility of the SMI provides decoded
chip enable outputs. These outputs connect directly to other
memory or I/O functional blocks with few, if any,
requirements for additional interfacing chips. This reduces
both chip count and cost in complex microcomputer systems.
The 2656 is processed using Signetics' n·channel silicon gate
technology. Only a single power supply of +5 V is needed.
Features
• 2kx8 mask programmable ROM
• 128x8 static RAM
• 8 multi·purpose pins for either chip enables or I/O bits
• 8·bit latch for either I/O or MPU storage
• internal clock generator with crystal, Re, or external
timing source
• system power-on reset
• 40-pin dual in-line package
• single +5 V supply
• 2-chip microcomputer
• system control for multi-chip microcomputers eliminates or reduces TTL support circuitry for memory
and I/O device selection
• from small (2k-2 chip) to 32k microprocessor·based systems.
8196
Pin configuration - I package
Pin definitions
pin no.
pin name
function
38-40,1-5
DBO-DB7
8-bit bidirectional data bus. All data transfers between the MPU and ROM, RAM,
Latch and X pins are made using this bus.
15-32
PGA inputs
18 PGA inputs that are used to determine SM I operation during the current MPU
cycle. These inputs should include:
18-32
AO-A14
•
MPU address bus. Address bus inputs occupy contiguous bit positions with AO
as the least-significant address bit.
16
OPREQ
•
A control signal that specifies the valid state of address and control bus.
15,17
M/iD, WRP
•
Optional signals. Possibilities include Memory or I/O (M/iO), Write Pulse
(WRP), external control signals, or additional high order address bits.
14
R/W
A control signal from the MPU that indicates whether the requested operation is
to be a Read or Write (0 or 1 respectively). This signal must not change while
OPREQ is true.
10
CLOCK
Output clock to the MPU. The frequency is determined by the timing element
and the mask programmable divisor (divided by 1,2,3,4).
11,12
CK1/RST, CK2
Connections for the timing element. Only CK2 is necessary for an RC or external
timing source. The CK1/RST pin then becomes a power-on RESET output.
Two pins are necessary for direct connection of a crystal.
33,13
VCC, GND
Power supply connection and ground.
34-37,9-6
XO-X7
Multi-purpose I/O pins. These pins can be mask programmed as external memory
or I/O Chip Enables, or bidirectional I/O Port data bits, or any combination of
the two.
8197
microprocessors
technical data -
MOS
System Memory Interface (continued)
r--
~
~
ADRLSB's
tt
A
~
'f
:::>
:::>
"
co
c
T
~J:
co~trol
{
signals
R/W
A
II
7
CONTROL
---
X-TAL,RC
or
CLOCK
-X2
r.Il
z
DATA IN
8
"-
I
EXTERNAL V
CHIP ENABLES
-
J
&
CLOCK
~
w -X3
'---
'f
1
L. ~
"
-
f-----
_XO
~ ~ -Xl
u
~~IV~
...J
u
GATE
ARRAY
(PGA)
.....-
;t-----J\ .---
-
RAM
R/W
~ I-
lBX11
l28X8
v
.---
I
PROGRAMMABLE
----
.~
RAM ENABLE
10
~
==--"
'A
DBUS
_X4
0
~
u -X5
z
2
multi~ purpose
pins
_Xs
T-"
ROM ENABLE
A
204BXB
"
ADRLSB's
ROM
==~
~
~
EXTERNAL CLOCK
X-TAL
or
RESET OUT
6198
+5 V
GND
7Z74646
Functional block descriptions
Data Bus Buffer
A three-state bidirectional 8-bit bus transceiver for data
transfer between the SMI and MPU.
Programmable Gate Array (PGA)
Provides select signal outputs for the internal ROM, RAM,
Latch, and up to 8 multi-purpose I/O pins that are maskprogrammed as Chip Enables. A PGA output is active when
the input variables match anyone of 11 corresponding maskprogrammed product terms. The 18 input variables are
normally address and control bus signals from the MPU and
may be programmed as '1' , "'0' ,and 'don't care' . Each
product term is a specified combination of the input
variables.
Control and Clock
Generates the CLOCK output signal to the MPU and control
signals for the ROM, RAM, and LATCH. A mask programmable frequency divider provides input frequency division by
1,2,3 or 4. The timing source is mask programmable and
may be a crystal, RC, or external oscillator. If either of the
latter two are designated as a timing source, the second
timing pin becomes a RESET output to the MPU.
ROM
2 048 bytes of mask-programmable Read Only Memory for
storage of instructions and constants. The ROM base address
is PGA mask programmable over the entire MPU address
range. The ROM can be disabled by a mask option.
RAM
128 bytes of Read/Write Memory for MPU data storage and
retrieval. The RAM base address is PGA mask programmable
over the entire MPU address range. RAM dominates over
ROM if address overlap is intentionally mask programmed.
The RAM can be disabled by a mask option.
Function Select (FS)
A 1 x 8 Function Select array of mask-programmable contacts
determine the function of each of the multi-purpose I/O pins
(XO-X7). Two modes exist:
1. CE - The X pin is an active low Chip Enable (CE) for
either external memory or an I/O port. PGA inputs
receive the external address and MPU control signals
required to generate the CE output.
2. P - The X pin is a bidirectional I/O Port Data bit.
A portion of the PGA provides the control signal to
select the Port.
Latch
Holds output data for the multi-purpose I/O pins mask
programmed as a mode P. The latch continues to function as
a read/write element even if all mUlti-purpose I/O pins are
programmed as chip enables. Thus, any X pin that is
programmed as an external chip enable can have corresponding latch bits available for temporary data storage or software flags. To read an input pin, the corresponding latch
bit must first be written to a '1' by the MPU program.
This is done to disable all active outputs, changing them to
passive pull-up outputs. This permits inputs to be sensed on
the same pin. Subsequent reads of the same pin do not have
to be preceded by a write if the state of the latch pin
remains a '1 '.
B199
microprocessors
technical data -
MOS
2650PC4000 Emulator board for 2656
The PC4000 is a circuit emulation of the 2656, a 40-pin
NMOS-LSI system memory interface chip. The PC4000, in
circuit board form, offers the engineer a system design aid.
By designing with the PC-board emulator, specific ROM and
PGA (programmable gate array) patterns can be determined
for the user's application.
chip. Functionally the PC4000 replaces the 2656 in the user's
prototyping system through a pin-for-pin compatible plug
and its 40-wire ribbon cable attached to the PC4000. Identical
circuit functionality of the 2656 chip is provided to the
user by the functions of the PC Board.
In utilizing the PC4000. the engineer-designer is able to implement the same functions as the 2656. Through a cable
and 40-pin plug with a pin configuration identical to the
2656, the user connects the PC4000 directly into his prototype system. He can access the 128x8 RAM, the preprogrammed ROM, and the gate array. The user can simulate the
eight multi-function ports either as I/O ports or chip enables,
the power-on reset, and the clock generator and divider.
The PC4000 emulator contains the same circuits that are
available to the user on the 2656 Systems Memory Interface
In emulating the 2656, the speed of the board circuitry is
equivalent to or faster than the on-chip circuitry. ROM is
implemented with bipolar PROMs and on-chip RAM is
implemented with the bipolar RAM packages. The
programmable gate array (PGA) for the selection of the ROM
and RAM enables and the I/O function selects are implemented
with field programmable logic arrays (FPLAs).
The oscillator provided on the PC4000 has the same
frequency dividers available as on the 2656. The oscillator
divide ratio is implemented by the toggle switch settings.
ex:
w
~tt
;:)
en
FPLA 1 & 2
FPLA3&4
l-
ii:z
EXTRES~
en
~
o
B200
Functional block descriptions
Input Buffer
This circuitry buffers the incoming signals from the MPU
(specifically for the 2650 MPU, the addresses, AO-A 14, and
the 4 control signals, OPREQ, WRP, R/W and MIra).
Data Bus Transceiver
This circuitry buffers the incoming 8-bit data bus from the
MPU, and provides output drivers to the data bus.
FPLAs 1 and 2
FPLAs 1 and 2 represent a portion of the programmable gate
array of the 2656 SM I chip. These 2 FP LAs decode the ch ip
enable signals.
FPLAs 3 and 4
These FPLAs represent the remainder of the gate array.
FPLA 3 and a portion of FPLA 4 generate the on-board ROM,
RAM and port enable signals. The remainder of FPLA 4 is
used to generate the data bus control signals.
Function Select and I/O Port Logic (via FPLAs 1-4)
The function select and I/O port logic allow the multipurpose pins of the 2656 to be individually selected as
either an I/O port or a chip enable via eight switches, FSO-FS7.
When assigned as chip enables, they must be programmed in
FP LAs 1 and 2. When a multi-purpose pin is assigned as I/O
or as an input port, the port address is programmed in FPLAs
1 and 2. When the FS switch is ON, the corresponding pin of
the 2656 is selected as an I/O port. 'When the FS switch is
OF F, the corresponding pin is selected as a chip enable.
Memory
Both ROM and RAM memory functions are implemented in
bipolar PROM and RAM respectively. The memory chip
enables are programmed in FPLAs 3 and 4. (See the
PROGRAMMING section.)
Clock Divider, Reset Logic, and Internal Oscillator
This circuitry provides an internal oscillator with switches for
frequency divide by 1, 2, 3 or 4. Reset logic is provided on the
PC4000 to allow the user to reset the system during debug via
an external switch closure, without the need for powering
down. The reset logic is used when the RC or external
oscillator modes are selected.
Part list
part number
quantity
description
7403
7404
7405
74LS14
7432
74 LS86
74109
74116
74126
74163
8T28B
2
3
2
Open Collector Quad Nand
Hex Inverter
Open Collector Hex Inverter
Hex Schmitt Trigger Inverter
Quad 2-lnput OR gate
Quad 2-lnput XOR
Dual JK Flip-Flop
Dual Quad D Latch with Clear
Quad Three-state Buffer
4-bit Binary Counter
Bidirectional Data Bus Driver
Receiver
Three-state Hex Buffer
Three-state Hex Inverter Buffer
Open Collector FPLA
512x8 PROM
64x9 BIPOLAR RAM
Timer
Resistor Dip Pak
10 kD Resistor
100 kD Resistor
220 D Resistor
Note: All Resistors % watt
150 pF Capacitor
0,01 flF Capacitor
4,7 j1F Capacitor
0,1 j1F Capacitor
Edge Connector AMP
225-21021-401-117
8-Position Dip Switch
PC Board 2650/PC4000
24-pin Dip Socket
28-pin Dip Socket
40-pin Dip Socket
Cable Assembly
8T97B
8T98B
82S101
82S115
82S09
NE555
761-1-51,0 kD
4
1
2
5
2
4
4
2
4
2
5
14
1
2
4
4
Required but not supplied:
Timing element for oscillator.
If the RC or crystal internal oscillator mode is desired, the
frequency determining components must be installed on the
emulator PCB. The pins on the header that correspond to the
RC and Crystal pins are not used in this mode, and only the
external Reset function is provided.
B201
microprocessors
technical data -
MOS
Emulator board for 2656 (continued)
40-core cable pin configuration
The interface from the PC4000 to the user's system is a 40-core cable with 40-pin DIP plugs at both ends.
function
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
X7
X6
X5
X4
ClK OUT
ClK 1
ClK2
VSS GNO
R/W
MillO
OPREQ
WRP
ADDRO
ADDR1
ADDR2
pin no.
pin no.
function
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
DBUS2
DBUS1
DBUSO
X3
X2
>\1
XO
NC*
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADOR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
* VDD for chip, no connection for board.
Note: Timing Element pins have alternative functions determined by connections W on the printed circuit board.
ClK 1 is external reset out. To use, connect W (4) to W (5).
ClK 2 is external clock in. To use, connect W (2) to W (3).
ClK 2 not used: To use internal RC oscillator connect W (1) to W (2).
To use internal XTAl oscillator connect W (2) to W (8).
Edge connector
The edge connector for the 2650PC4000 is an AMP 225·21021-4-01-117 edge connector. This edge connector has 20 pins on
0,156 inch centres with the following pin configuration:
GND
GND
CK
VCC
VCC
2
3
4
5
6
7
8
9
10
A
B
C
D
E
F
H
K
l
GND
GND
C2X
RESET OUT**
ClK OUT**
RESET IN**
OSc**
VCC
VCC
** Factory test only - do not use.
8202
Microprocessor prototyping card
2650PC1001
The 2650PC1001 is a complete microcomputer on a single
printed circuit board. The heart of this computer is
Signetics' 2650 Microprocessor; a single chip, n-channel
MOS Integrated Circuit which contains the CPU and control
sections of the classical general purpose computer architecture.
Serial I/O
The serial I/O capability of the 2650PC1001 utilizes a unique
serial I/O feature of the basic 2650 microprocessor. This
feature allows serial data to be transferred directly into the
2650 under program control by using the sense and
flag pins on the microprocessor.
In addition to the Microprocessor, the 2650PC1001 contains
both control and read/write memory, I/O ports, clock, and
all the necessary buffering and interface circuits to permit
data transfer both on and off the p.c.b.
Two types of serial I/O ports are available. The first is a
teletype interface which can be directly connected to a
teletype 20 mA current loop. The second is an RS232
interface which provides a connection for voltage-driven
peripheral equipment. The selection of the particular interface
to be used is made by connecting a jumper wire directly from
the microprocessor flag and sense lines to the appropriate
output port. If the RS232 interface is used, +12 and -12 V
supplies are required in addition to the +5 V supply which
operates the rest of the board.
Features
• 2650 Microprocessor
• 1k bytes of ROM with PIPBUG*
• 1k bytes of RAM (off-board expandable)
• 1 MHz crystal oscillator
• serial I/O (either TTY 20 mA current loop or
RS232 - selectable by jumper wire)
• 2 eight-bit output ports
• 2 eight-bit input ports
• DMA capability
• LED display indicators
• data bus and address bus test points
• buffered data and address outputs
• single power supply (+5 V)**
* Signetics' Loader and Debugging Program. (See appl.
note SS50)
** Assumes RS232 I/O port is not used.
Parallel I/O
Parallel I/O channels using the 2650's unique Non-Extended
I/O mode are also provided. This mode allows a single byte
instruction to select one of two distinct I/O devices. On the
2650PC1 001, these·two devices are represented by four
separate data channels; two for reading and two for writing.
The output (or write) channels are fully latched and buffered.
The input (or read) channels are fully buffered. One read and
one write channel represent a single I/O device. In addition
to the Non·Extended I/O ports, the data and address buses,
plus the appropriate control signals, are also available to
provide the full extended I/O capabiiity.
Memory
The memory of the 2650PC1001 is divided into two
segments:
a. ROM with PIPBUG
b. RAM (ReadIWrite Memory)
The Read-Only Memory supplied with the card is the
82S129 Field Programmable type (PROM). Eight of these
256x4 devices are arranged to provide a 1 kx8 memory array.
The 2650PC1001 is supplied with the PIPBUG loader and
debugger already programmed into the ROM. Since the
devices are loaded into sockets, however, they can be easily
replaced with other ROMs or PROMs programmed by the
user.
The 1kx8 array is constructed with 2606 NMOS RAM
devices. Since the 2606 isa 256x4 device, again 8 devices
are used in the array.
B203
microprocessors
technical data -
MOS
Microprocessor prototyping card (continued)
Other I/O
A complete listing of the I/O pins, plus a brief description
of any I/O signal not detailed above, is as follows:
1,2
Ground
4-11
Processor Data Bus*
12
Strobe to Enable Input Oata Port
O/COutput*
13
14
OMA Control Input
15
Extended/Non-Extended Output*
16
Interrupt Acknowledge Output*
17
R/W Output*
18
Write Pulse Output*
19
Run/Wait Output*
20
Operation Request Output*
21
Memory/IO Output*
22
Operation Acknowledge Input*
23
Clock Output (or Input if on-board clock not used)
24
Operation Request Input for OMA
25
Reset Input*
26
Interrupt Request Input*
27
Pause Input*
28-32
Unused
33-47
Address Bus*
48
+12 V for RS232
49
-12 V for RS232
50
+5 V
A, B
Ground
C
Not used
O-M
Non Extended Output Port "0"
N
Clock to load data into Output Port "0"
P
TTY serial data input (+)
R
TTY serial data input (-)
S
TTY serial data Output pull-up resistor (current loop +)
T
TTY serial data Output; TTL Level, open collector (current
loop return)
RS232 ground
U
V
RS232 Output
W
TTY tape reader Output; TTL Level, open collector (+)
X
TTY tape reader Output pull-up resistor (-I
Y
RS232 Input
Z
Clock to load data into Output Port "c"
a-h
Non-Extended Output Port "C"
Strobe to enable Input Port Control
k-u
Non-Extended Input Port "D"
v-c
Non-Extended Input Port "C"
d
+12 V for RS232
-12 V for RS232
+5V
B204
Summary
The above is intended to provide a brief
description of Signetics' 2650PC1001
Prototyping Board. More detailed information
can be obtained from the following:
SS50
PIPBUG Application Note
SP50
2650PC1001 Manual (Oetailed
Description)
AS50
Serial I/O using Sense and Flag
Application Note
2650BM 1000 Basic 2650 Microprocessor Manual
* Buffered" 2650 microprocessor outputs.
I
'I
PC1001 Block diagram
I
I
TTV '/0
1K
ROM"
RS232 1/0
1K
RAM
""C1
j
(NTREO
PAUSE
~CK
OUTPUT
PORTe
OUfPUT
PORTO
INPUT
PORTe
INPUT
PORT D
8205
microprocessors
technical data -
MOS
Adaptable Board Computer (ABC) prototyping system
2650PC1500
2650KT9500
The Adaptable Board Computer, ABC 1500,is a modular
microcomputer containing a CPU, memory, I/O ports and
support circuitry. It is designed to cover a broad range of
applications from software development to system hardware
prototyping. Cost performance trade-offs have been carefully
considered to achieve maximum flexibility and allow the
card to be tailored to a variety of individual requirements.
Features
• expandable printed circuit card:
unused area on card filled with plated-through holes on
7,5 mm centres for wire-wrap sockets
• 1k bytes of PIPBUG* ROM (in socket)
• 512 bytes of RAM
• two latched I/O ports
- four non-extended I/O read/write user strobes
The basic configuration consists of the 2650 8-bit micro• three-state buffers on data, address and control lines
processor, 512 bytes of read/write memory (four 2112 static
• serial input/output port
RAMs), 1k bytes of 2608 ROM with PIPBUG*, two 8T31
• single +5 V supply requirement (1,7 A max) for card and
I/O ports and buffering on data, address and control lines.
20 mA current loop interface (±12 V supply for RS232
A ~ingle +5 V supply will be required to power the card and
interface)
communicate with a serial 20 mA current loop terminal.
• simple memory and I/O port decoding with two 16·pin
Modifications to the basic system can be easily made to
DIPs
allow for various memory configurations and operating modes. • interrupt and single step capability
Unused plated-through holes are provided for the PROM
• simple clock configured from dual monostable multivibrator
memory chips (82S115s). Other options are jumper selectable.
• 24k memory expansion capability
The area on the card associated with each jumper is identified
.' directly compatible- with 4k RAM card (2650PC2000) and
with a 'Wx" mnemonic.
power supply demonstration base (26500S2000)
The ABC 1500 is sold either as a completely assembled and
• card dimensions: 20 em by 17,5 cm with a 100-pin
connector along the 20 cm dimension
tested card (2650PC1500) or in kit form (2650KT9500).
* PIPBUG is a loader, editor, and debug program. See Table 1.
ADDRESs
MICRO~~~CESSOR
~:..:....--< WBAIS, RBAD, CKD
' - - - - - - - - - - - - < W B A C . RBAC,CKC
'-------------c.,.-~RPD.RPC.WPD.WPC
'---------------"-~ CONTROL'
L---_ _ _ _ _ _~------~~
OPACK
iN'I'REQ
~
·OPREO, RUNIWATi. INTACK. WRP. R:IW; MIlO, RESET
B206
Options
• 1 k bytes of PROM in place of ROM
• 512 bytes of PROM or ROM in place of RAM
• asynchronous operation capability
• external clock input
• interrupt vector from port C
Memory configuration
All of page 0 is reserved for on-card memory (0 to 819110).
Address lines A9, All and A 12 are not decoded (Don't care
signals) allowing two ICs to perform not only memory
decoding but also I/O port decoding. As an added benefit,
usable memory space exists at the top of page 0 (see memory
map) due to the interleaving effect between the ROM and
RAM memories. This memory space can be used as interrupt
vector address locations in a negative direction from address
location "0" (a negative relative instruction from address
location "O"wraps around the first 8k page).
Interface
• terminal interface jumper selectable
a. W4 to W5 and W6 to W7 jumpers select the 20 mA.
current loop mode
b. W3 to W4 and W7 to W8 jumpers select the RS232 mode There is a total of two blocks in the RAM structure, each of
• normally high input lines (10 kn pull·up resistor on each): which contains 256 bytes of RAM. Since PIPBUG uses the
~,PAUSE,RESET,WBAC,WBAD,CKC,CKD
first 63 RAM locations for temporary storage, the first actual
• plated·through holes are available at each connector pin to user location is 108710 (43F16) (there are seven other address
allow for insertion of wire·wrap pins
locations corresponding to the first user location - see memory
• edge connector supplied with card
map). Starting at 43F 16 , the range for on card RAM extends to
• to allow for external clock input, remove jumper W9-W10
address 153510 (5F F 16), giving a total usable on-card space of
• asynchronous operation by removing jumper W1 to W2 and 449 bytes.
driving OPACK
• during vectored interrupts, it is possible to allow port C to The first external memory location for add-on memory is
819210 (200016). All of page 1,2, and 3 are available,
place the interrupt address on the data bus by removing
giving a total memory expansion capability of 24k.
jumper W21-W22 and jumpering W22-W23
Table 1 PIPBUG commands
alpha character input
command
A
alter memory
set breakpoint
clear breakpoint
dump memory to papertape
go to address
load memory from papertape
see and alter registers
B
C
o
G
L
S
Note: The program is entered by resetting the card. The
terminal will then respond with an asterisk (*).
Memory options
Modifications to the basic configuration can be made to
provide a mix of RAM/PROM/ROM memories. PROM
memories can be used in place of the PIPBUG ROM by
removing the ROM from its socket and adding one or two
82S115 PROMs (512x8). Area and plated-through holes are
provided on the card for insertion of sockets for the PROMs
or the PROMs themselves. Decoding for the PROMs has been
provided by ABC 1500 logic.
Data and address lines for 2112 RAMs and 825129 PROMs
or 82S229 ROMs are identical. It is, therefore, possible to use
PROMs and/or ROMs in place of RAM. This option will
require removal of the RAMs (two per block), and changing
the jumper for each 256 byte block of PROM or ROM added.
The jumper needed for each block of memory is as follows:
memory section
RAM jumper
PROM/ROM jumper
first block
second block
W12-W13
W15-W16
W11-W13
W14-W16
B207
microprocessors
technical data- MOS
Adaptable Board Computer (ABC) prototyping system (continued)
I/O Port configuration
Two ports (C and OJ are implemented with 8T31 bidirectional
ports and can be used for general purpose I/O. Each consists of
8 clocked latches with two sets of bidirectional inputs/outputs.
Data written into one side of the port will appear inverted at
the other side.
One side of each port (Bus B of the 8T31 j is tied to the
external data bus (DBUSXj. The 2650 communicates with
each port over this bus with one byte, non-extended I/O
instructions. During 2650 activity with the ports, the
ABC 1500 will provide four output stropes indicating the
nature of the operation.
Table 2 Page 0 memory map
DECIMAL
ADDRESS
ADDRESS LINES
A14
A13
A12
A11
X
X
X
A10
ORGANIZATION
A9
8k
1 FFF
7k
1BFF
X
X
PIPBUG ROM
6k
X
X
X
X
X
X
17FF
5k
X
X
X
X
13FF
PIPBUG ROM
4k
OFFF
3k
OBFF
X
PIPBUG ROM
X
2k
X
07FF
06FF
05FF
04FF
03FF
X
1k
X
X
HEX
ADDRESS
PIPBUG ROM
X
0000
Notes
1. * = Don't care for ROM and RAM; **
2. Each block of RAM = 256 bytes.
B208
= Don't care for
RAM.
strobe
function
strobe pulse width
WPC
WPO
RPC
RPO
write to Port C
write to Port 0
read Port C
read Port 0
duration
duration
duration
duration
If no external logic is connected each port will be in the
"read" mode (WBAX lines pulled high). The RBAX lines are
tied to ground to allow read/write control of the buses with
just the WBAX lines. To allow control for three-stating the
buses, the following jumpers must be removed:
of WRP
of WRP
of OPREQ
of OPREQ
The other side of each port (Bus A of the BT31) is
controlled by the user. Four control lines are used to read,
write or three-state the buses.
control line
WBAO
WBAO
WBAO
WBAC
WBAC
WBAC
(1)
(0)
(1)
(1 )
(0)
(1)
line
Jumper
W19-W20
W17-W1B
function
RBAO
RBAO
RBAO
RBAC
RBAC
RBAC
(0)
(0)
(1)
(0)
(0)
(1)
Read Port 0
Write to Port 0
Three-state 0 Bus
Read Port C
Write to Port C
Three-state C Bus
The clock for each port (CKC-Port C clock, CKO-Port 0
clock) is available at a connector pin for external control.
These normally "high" lines can be pulled low to disable
writing to the ports from either the 2650 or the external
device.
ABC 1500 edge connector signal list
pin no.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
function
GND
GND
NC*
DSUSO
DBUSl
OBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
NC*
A14-D/C
NC*
A13-E/NE
INTACK
R/W
WRP
RUN/WAIT
OPREQ
M/iO
OPACK
CLOCK
TS
RESET
I pin no.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
function
pin no.
function
pin no.
function
INTREQ
PAUSE
NC*
RBAD
NC*
A
B
C
D
E
F
H
J
K
L
GND
GNO
NC*
OPOO
OPO 1
OPD 2
OPD 3
OPD 4
OPD 5
OPD 6
OPD 7
NC*
TTY serial in +
TTY serial in TTY serial out +
TTY serial out RS232 ground
RS232 output
NC*
NC*
RS232 input
NC*
OPCO
OPC 1
OPC 2
d
e
f
g
h
j
k
m
n
p
r
s
t
u
v
w
x
y
OPC3
OPC4
OPC5
OPC6
OPC7
NC*
RPD
WBAD
WPD
CKD
NC*
NC*
NC*
NC*
RPC
WBAC
WPC
CKC
NC*
NC*
NC*
NC*
+12 V
-12 V
+5 V
RsAC
NC*
All
A13-E/NE
A12
A14-D/C
A9
Al0
AB
A7
A6
A5
A3
AO
Al
A4
A2
+12 V
-12V
+5 V
M
N
P
R
S
T
U
V
W
X
Y
Z
a
b
c
z
a
b
C
d
e
f
8209
microprocessors
technical data -
MOS
Adaptable Board Computer (ABC) prototyping system (continued)
ABC 1500 parts list
quantity
4
2
4
4
1
4
13
3
2
6
2
1
S
8210
description
PC1500 printed circuit board
edge connector - AMP 225-S04-50
2650 S-bit static microprocessor
N7402 quad 2-input NOR gate - I/O strobe logic
N7416 hex inverter buffer - current loop interface
N74123 monostable multivibrator - clock for 2650
N74S13S 3 line to 8 line decoder - control decode
ST15 - EIA line driver - R232 driver
ST26 quad three-state driver/receiver - data and memory data buffer
ST31 - bit latched bidirectional I/O port
ST97 hex three-state driver - address and control line buffer
260S static ROM (1024xS) - PIPBUG ROM - CN0035
2112 static RAM (256x4) - organized as 512 byte RAM
82S123 PROM (32x8) coded PROM CD 1500 - control decode
1N914 diode
2N2222 transistor
50 pF capacitor
300 pF capacitor
0,1 JJ.F capacitor
4,7 JJ.F capacitor
220 !1 resistor
1 k!1 resistor
2 k!1 resistor
3,3 k!1 resistor
10 k!1 resistor
20 k!1 resistor
24-pin 260S ROM socket - Robinson-Nugent ICN 246-54
Resident Assembler Board
2650PC1600
The 2650PC1600 is a resident assembler to be used with the
PC100l or ABC1500 prototyping boards. It also fits into the
OS2000 power supply base.
The system consists of a printed-wiring board on which 11
PROMs containing the assembler program are mounted,
together with 16 RAM ICs for use as storage during program
assembly. The assembler has been designed for use with paper
tape and so input and output are transmitted via a teletype.
Alternatively, a fast paper tape reader may be used to advantage.
An extra socket has been included on the PC1600 board for
PROM containing a tape-reader control program.
The PC 1600 resident assem bier accepts a program written in
2650 Assembly Language as input and produces a tape
containing a hexadecimal translation of the program. This
hexadecimal tape has a format suitable for input to the
PC100l or ABC1500 prototyping boards via the PIPBUG
control program which is included on both these boards.
The assembler is a three-pass type, that is the entire assembly
language program is scanned three times by the assembler.
On the first pass all the symbols defined by the user (up to a
maximum of 365) are assigned values and stored in the RAMs
on the PC 1600 board and simple errors such as invalid
symbols detected. During the second pass the internal logic
of the program is checked and any further errors detected,
the line-by-line assembly is performed and a full listing of the
program, including any error messages, is printed out. On the
third pass the hexadecimal tape is punched and a corresponding'
hexadecimal listing produced for reference.
The assembler program introduces several additional features
over the cross assembler, the most important being four new
error messages, 20 pre-defined symbols and a new assembler
directive lIBR. This directive enables the user to assemble
several tapes into one hexadecimal tape as part of the same
program, this facilitates the creation of subroutine "libraries".
The assembler also makes patching of a program in RAM
easier by assembling the correct number of bytes for a line
containing an error, so that these bytes may be altered
without changing the memory locations of the rest of the
bytes of the program.
Features
• 3-pass Resident Assembler
• 5,5k bytes assembler program
• socket for 512 bytes user defined PROM
• 2k bytes RAM
• 365 user-definable symbols
• 20 pre-defined symbols
• generation of error messages
• LI BR directive to create subroutine libraries
• compatible with PC100l, ABC1500 and OS2000
• paper tape editor facility
• single +5 V supply requirement (4 A max)
• card dimensions 20 cm by 17,5 cm with a 100-pin
connector along the 20 cm dimension
PC1600 edge connector signal list
pin no.
function
1
2
4
5
6
7
8
9
10
11
17
18
20
21
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
50
A
B
GND
GND
OBUSO
OBUS1
OBUS2
OBUS3
OBUS4
OBUS5
OBUS6
OBUS7
R/W
WRP
OPREQ
MilO
ABUS11
ABUS13
ABUS12
ABUS14
ABUS9
ABUS10
ABUS8
ABUSl
ABUS6
ABUS5
ABUS3
ABUSO
ABUSl
ABUS4
ABUS2
+5 V
GNO
GNO
B211
microprocessors
technical data- MOS
4k Memory Card
2650PC2000
The 2650PC2000 is a 4k Memory Card designed to be
compatible with the 2650 microprocessor. It is composed of
32 NMOS, 1 k by 1 bit static RAMs, 21 L02, and organized in
four groups of one kilobyte each. Decoding is provided to
select one of the four groups and also distinguish the card in
multi-card configurations. In a system application utilizing
up to 8 cards (32k), each card is uniquely identified by
hardwired jumpers. No external decoding is required.
The decoding logic is sectioned into two blocks. The first
block determines if the address identifies that card as being
part of the 8k page address. (The 2650 memory scheme is
organized into 4 pages of 8k each.) The second block
uniquely locates lk bytes of memory on the board in the
8k bytes of memory of the selected page. Each 1k bank is
individually selected by hardwired jumpers to the decoder.
Features
• requires only single +5 V supply
• industry standard 21 L02 memories
• fully decoded for 32k memory organization
• data bus buffered with three-state drivers/receivers
• accessable from microproces;sor or DMA controller
• TTL compatible
• dimensions are 20 x 17,5 cm with a 50-pin edge connector
along 20 cm dimension
• typical power consumption of 4,5 W
Signal definition
Memory control signals and address lines between the 2650
microprocessor and the 2650PC2000 are indicated in the
block diagram. The OPEX control line is reserved for use with
DMA controllers. Its function is similar to that of the OPREQ
line from the 2650. When either of these lines are true and a
memory operation is specified (M/iCi = High) the memory
card is enabled to decode address lines AO-A14. When a bank
is selected, the selected card control logic block allows the
read-write line (R/W) and write pulse (WRP) to pass to the
memory array and also enable the external data bus drivers.
When the operation is complete the memory card responds
with a true condition on OPACK.
8212
Jumper address decoding
Jumpers are applied to designated plated-through holes
identified by a 'Wn" mnemonic. To identify the card to be
part of a particular page, jumper point W5 to one of the
following:
W1 for page 0
W2 for page 1
W3 for page 2
W4 for page 3
To locate each of the 1k bytes of the memory card in the
selected memory page, four bank jumpers are required. The
outputs of the decoder used to select one of eight 1k byte
memory segments (W6-W13) must be connected to the
selected 1k bytes of memory on the 2650PC2000 (W14-W17).
Factory installed jumpers allow for immediate connection to
a Demo System (DS1000/2000) which has 2k of memory.
These jumpers have been connected as follows:
W1 to W5 (page 0)
W8 to W14
W9 to W15
W10 to W16
W11 toW17
2650PC2000 edge connector
2650PC2000 block diagram
M/iO
OPEX"
pin no.
function
pin no.
function
1,2, A, B
4
5
6
7
8
GROUND
DBUSO
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
34
35
36
37
38
39
40
41
42
43
44
45
46
47
50, f
ABUS13
ABUS12
ABUS14
ABUS9
ABUS10
ABUS8
ABUS7
ABUS6
ABUS5
ABUS3
ABUSO
ABUS1
ABUS4
ABUS2
VCC +5 V
9
4kXB
MEMORY
ARRAY
10
11
17
18
20
21
22
RIW
24
33
AM
RIW
WRP
OPREQ
MliG
OPACK
OPEX
ABUS11
DATA BUS CONTROL
OPACK
"DMA CONTROLLER ACCESS
EXTERNAL
DATA BUS
B213
microprocessors
technical data -MOS
Microprocessor Demonstration System
2650052000
The Demo System 2000 (26500S2000) is a hardware base
for use with the 2650 CPU printed circuit board (PC1 001)
and allows the exercising of this card with user defined
options. When the OS2000 is combined with a CPU board
(PC1001) and a teletype (TTY), the user is equipped with
everything he needs to exercise any of the software or
hardware features of the 2650. The OS2000 has a built-in
power supply.
Features
• user-defined expansion capability from connector supplying
address, data and control lines
• RS232 and TTY interface
• two extended and two non-extended I/O ports
• single step capability for program debugging
• display of address bus, data bus and the two non·extended
I/O ports
Connectors
The 2650 CPU Board (PC1 001) is inserted into the J8
connector to complete the demo system. The user printed
circuit board is inserted into the J7 connector. Both connectors
are the same type (100 Pin Amphenol, series 225) and the
numbered pins J7 and J8 have the same signals (except pin 12).
The lettered pins of J7 (pins A to g) are not used.
Displays
The address and data bus led displays reflect the information
on these buses during each OPREQ (beginning of an external
operation). Latches store the information until another OPREQ
is received. The two non·extended port displays represent
data on channel C (port 2) and channel 0 (port 1) during the
OPREQ for each I/O operation. A logic one on these displays
will turn "on" the leds and a logic zero will turn them "off".
082000 hardware base
RS232
INTERFACE
TTY
INTERFACE
O+12V
PC20Q00R
USER B o A R D - - + - - - - - - - . . . . /
CONNECTOR
L -_ _ _ _ _ _L-_ _ _ _ _ _--J.~_
___,~-NON-E~6ENDED
:~~~ __-~-------J
<-_ _ _ _ _ _L -_ _ _ _ _ _--J._ _---,~-EXT~~DED
IC BANK
I :;UN /
6 RUN
o
DISPLAY ADDRESS
DISOPLAY
O
RESET
sw
B214
/
DISPLAY DATA
Controls
The pause and step logic allows one instruction to be
executed at a time by pushing the 'step' button when the
Run/Pause switch is in the pause position. In this mode the
Run/Wait display led will go off. The reset switch will reset
the display latches and place all zeros in the 2650 instruction
address register.
Connections to sockets J7 and J8
pin no.
function
(J7 and J8)
pin no.
function
(J7 and J8)
pin no.
function
(J80nIY)*
pin no.
function
(J8 only )*
1
2
3
4
5
6
7
8
9
10
11
12*
13
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
NC**
DBUSO
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
OBUS7
EIPD
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
INTREO
PAUSE
NC
NC
NC
NC
NC
ABUS11
ABUS13
ABUS12
ABUS14
ABUS 9
ABUS10
ABUS8
ABUS 7
ABUS6
ABUS5
ABUS 3
ABUS 0
ABUS 1
ABUS4
ABUS 2
+12 V
-12V
+5 V
A
B
C
D
E
GND
GND
NC
OPD 0
OPD 1
OPD 2
OPD 3
OPD 4
OPD 5
OPO 6
OPO 7
COPO
TTY serial in +
TTY serial in TTY serial out +
TTY serial out RS232 ground
RS232 output
TTY tape reader out +
TTY tape reader out RS232 input
COPC
ope 0
OPC 1
OPC 2
d
e
f
g
h
j
k
m
n
p
r
s
t
u
OPC3
OPC4
OPC5
OPC6
OPC7
EIPC
IPD 0
IPD 1
IPO 2
IPO 3
IPO 4
IPO 5
IPO 6
IPO 7
IPC.o
IPC 1
IPC 2
IPC 3
IPC 4
IPC 5
IPC 6
IPC 7
+12 V
-12
+5 V
o/e
OMA
E/NE
INTACK
R/W
WRP
RUN/WAIT
OPREO
M/iO
OPACK
CLOCK
OPEX
RESET
F
H
J
K
L
M
N
P
R
S
T
U
V
W
X
Y
Z
a
b
c
v
w
x
y
z
a
b
ed
e
9
v
* J7 has no connections to these pins.
** NC = No Connection.
B215
microprocessors
technical data- MOS
Microprocessor Demonstration System (continued)
Extended I/O OIL sockets
Non-extended I/O 01 L sockets
pin no.
function J5
function J6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
OBUSO
OBUS1
OBUS2
OBUS3
OBUS4
OBUS5
OBUS6
OBUS7
OPACK
M/iO
OPREQ
RUN/WAIT
WRP
ABUS 0
ABUS 1
ABUS 2
ABUS 3
ABUS 4
ABUS 5
ABUS 6
ABUS 7
ABUS 8
ABUS9
ABUS10
ABUS 11
ABUS12
ABUS13
ABUS14
PAUSE
INTREQ
CLOCK
R/W
INTACK
E/NE
OMA
D/C
TTY interface 01 L socket
pin no.
1
2
8
9
13
14
function J1
TTY serial in +
TTY serial in TTY tape reader out TTY tape reader out +
TTL serial out TTL serial out +
pin no
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
function J4
(Output Port C) 0
OPC 1
OPC2
OPC 3
OPC4
OPC5
OPC6
OPC 7
Clock Output Port C
Enable Input Port C
(Input Port C) 7
IPC6
IPC5
IPC4
IPC 3
IPC2
IPC 1
IPCO
(Output Port 0) 0
OPO 1
OPO 2
OPO 3
OPO 4
OPO 5
OPO 6
OPO 7
Clock Output Port 0
Enable Input Port D
(Input Port 0) 7
IPO 6
IPO 5
IPO 4
IPO 3
IPO 2
IPO 1
IPD 0
RS232 interface connector
pin no.
1
2
3
5
6
7
8
20
8216
function J3
function J2
RS232 ground
RS232 input
RS232 output
jumper
jumper
RS232 ground
jumper
jumper
Intelligent Typewriter Controller
2650PC3000
The 2650PC3000 is a basic text generating system requiring
only six integrated circuits including one 2650 microprocessor.
The serial communication link between the 2650 and the
users terminal is accomplished with the flag and sense lines
on the microprocessor. The 2650PC3000 is used to control
the storage of characters entered from a terminal with either
a current loop or voltage swing capability (±7,5 V min).
Control Characters allow the text to be printed out on the
terminal with the capability for inserting unique characters
at locations identified during text generation. When the text
is printed out the entire text will be output unless a control
character is detected. The microprocessor then stops the
print-out and the operator enters the desired unique information. Another control character is then given to continue
printing the text until all characters stored in memory are
printed or until another stop character is detected_ The stop
character is recorded in memory just like any other character; however, it is not printed during text print-out.
Additional control characters allow for the erasure of the
previous character typed or the erasure of the entire' memory.
Features
• total of six IC packages
• operates at +5 V at a max of 500 mA
• interface to either current loop or device capable of
sending and receiving a minimum voltage swing of ±7,5 V
referenced to signal ground
• 250 character storage capability
• card size less than 7,5 x 10 cm with four screwed-on
stand-offs at corners
• 1 MHz clock implemented with 74123 one-shot
• variable baud rate between 110 and 300 baud by trimmer
pot adjustment of clock
• PROM mounted in 24-pin socket
• card edge connector supplied with each card
• inputs provided for an external system reset
Parts descriptions
2650
8-bit TTL compatible N-Channel Microprocessor incorporating a serial I/O Port.
(See 2650 Hardware Specification Manual
for complete description - 2650BM1000.)
1024-bit static MaS, TTL compatible RAM
2606
memory organized as 256 words by 4 bits/
word
82S115
4096-bit Bipolar TTL compatible PROM
organized as 512 words by 8 bits/word
N7426
Quad 2-input high voltage NAND gate with
open collector capable of driving voltage
and current loop interfaces (20 mA max)
Dual retriggerable monostable multi74123
vibrator with clear configured as a clock
for 2650
Potentiometer
Helipot series 91C 50 kn, 9,5 mm cermet
trimming potentiometer
PC edge
Amphenol - 225-21021-401-117
connector
Ci nch - 251-10-30-160
Miscellaneous components consist of eleven y.. Wand two Y, W
resistors, and two mica, one ceramic and one tantalum
capacitor.
The following are required to make the board functional but
are not supplied with the card:
RS232 type connector for voltage swing interface: DB25P or
DB25S
Reset switch - (normally open, connected to +5 V)
Power supplies: +5 V
±15 V
B217
microprocessors
technical data -
MOS
Intelligent Typewriter Controller (continued)
Terminal interface
voltage mode terminal connection
The voltage mode interface is very similar to the standard
RS232 interface except that the "signal" ground cannot be
connected to "protective" ground. When a Cinch type 25-pin
connector (DB25P or DB25S) is used on an RS232 compatible
terminal. the PC3000 should be connected as follows:
DB25P (DB25S) PC3000 edge
PC3000
pin no.
connector pin no. signal name
no connection
1
6
3
J
2
7
K
connect together
5.6,8,20
on card - jumper point A to C
and point D to E.
VS out +
VS in +
VS out - (signal GND)
current loop terminal connection
When a terminal is used that employs current loop
transmission techniques the four wires from the terminal
should be connected to the corresponding four pins on the
PC3000 card: TTY out +, TTY out -, TTY in +, and TTY in-.
on card - jumper point A to B
and point D to F.
PC3000 command summary
key
function
Rubout (delete) Erase last character in memory and echo
the erased character. Additional preceding
characters can be erased by continuing to
depress the delete key.
Control and E
Erase entire memory.
Control and B
Used to indicate beginning of inserted
message. Is not printed but stored in
memory. Stops print-out when read from
memory. Required once from each unique
information entry.
Control and C
Continues print-out of memory after entry
of unique information.
Control and P
Prints out contents of terminal memory.
Software reset.
Control and R
Note:
Bell will ring if any of the following are true
1. Entering more than 250 characters in memory.
2. Requesting print-out of an empty buffer.
3. Attempting to delete more characters than there are in
memory.
PC3000 connector pin assignment
pin no,
1
2
3
4
5
6
7
8
function
pin no.,
function
GND
+5
+15
-15
A
B
C
D
E
VS out +
TTY in +
F
H
GND
+5
+15 V
-15
TTY inTTY out +
TTY out VS in+
VS out - (Signal Ground)
GND
RESET
9
GND
10
VS - Voltage Swing
B218
K
L
Intelligent typewriter controller
r-
4_
6
~.2k
+5VO---4
~ Rfii
2k
CE
~
2322 24
~
GNO
0
Q.
M
~ ~
Ie:
A2 12
iffiii
~
OPACK
.1!-
GNO
A6
,..!.
--
_
N
~
19
22 Al
23
A2
1 A3
2 A4
3
A5
4 A6
7
33
04
FLAG
05
SENSE
i:J
38
I~ I~
9 02
30
10
29
14
28
15
26
07
'"
lk
N
4
0 ~ 8
Rfii
~
74123
I
y3
Q
13
°1
24
c
z
"12
8
+5V GNO
10k-30k
+5V
+SV
15
114
~
14
GNO
SOp
07~
~
2606
5/.
y
04
18
Vcc
CE
150p
11
~
~<~~~~~~
+5V
f=1MHz
In-
--
'" .... '" "'
03
05
16 06
I
I I
27
06
17 137
8 01
31
03
82S115
700
32
02
Vec
5 A7
2: A8
CEl
5
A9
RST
CE2
21 AO
6
AS
01
~
og 8
"
9
DO
~
'"
0
8
A7
+5V
N
A3 11
10
A5
26SO
01.~
'" '" '"'" ...~ '"~ "'~
....
A4
lk
RESET
~
r!-t-
I I
1
Al 13
A
:;;:
N
AO 14
o--~ i l l
VCC
GNO
2606
3
1 7426
p3
16
'F
1 1
17
O~
4.7"1
74123
0
+5V
1on
o
1
1.10.A. L
3.C
'(
11
2 B
.
4.0
0
+15V
0
-15V
:::L
2k
l·
F~'"
15V
_
2k ~~
11
12
742613
'--
A
7
2k
e
10~.
8
0
E
.'
0
9
2k
+5V
B
•• JJ
E
OF
+5V
J
+15V
r·
GNO
=P:
TTY IN+
VS IN +
VSOUT -
G
HO
TTY OUT-
TTV OUT+
B219
microprocessors
technical data -
MOS
Intelligent Typewriter Controller (continued)
Intelligent typewriter controller board layout
8220
Microprocessor Prototyping Kit
2650KT9100
The KT9100 kit contains a 2650 microprocessor and enough
chips to implement a small development system. Since the
interface requirements of the 2650 are completely TTL
compatible, no attempt has been made to limit the user's
flexibility by dictating a fixed logic configuration. There is
complete freedom in using standard SSI or MSI logic to
adapt the microprocessor to the memory, I/O devices, or clock.
Several simple system examples are presented to enable quick
set up and evaluation. Other configurations to adapt to
individual requirements should become evident from these
examples.
Parts list
qty
part no.
2650
2112
82S1151
8T311
8T26B
4
2
4
description
CPU
256 x 4 RAM
4k PROM (Unprogrammed) 512 x 8
8-bit Bidirectional I/O Port
Quad Bus DR/REC
One-shot clock oscillator circuit
Parts descriptions
2112: The 2112 is a static 1024-bit RAM organized as 256
words by 4 BitslWord. It is manufactured with n-channel,
silicon gate, MOS technology and achieves an access time of
less than 800 ns. No clocks are required, and the chip is
powered from a single 5 V source.
+5
+5
1MHz OUTPUT
82S1151: The 82S1151 is a 4096-bit Schottky-Clamped,
bipolar PROM incorporating on-chip data output registers.
It is field-programmable and fully TTL compatible with
on-chip decoding and two chip enable inputs for easy
memory expansion. Inputs to the device are pnp
transistors with a maximum current requirement of 100 /lA.
8T31: The 8T31 is an 8-bit Bidirectional I/O Port designed
to function as a general purpose I/O interface element. It
consists of 8 clocked latches with two sets of bidirectional
Inputs/Outputs allowing master control from either the
microprocessor or from the I/O device.
8T26B: The 8T26B consists of four pairs of inverting
three-state logic elements configured as Quad Bus Drivers/
Receivers with separate buffered receiver enable and driver
enable lines. Both the driver and receiver gates have threestate outputs and low-current pnp inputs.
Circuit examples
Two circuit configurations are presented to indicate a possible
program checkout approach. The first allows the use of RAM
for program debugging. The second figure represents a possible
final system configuration with the program fixed in PROM.
Both circuits use the 8T26s as bus buffers.
Crystal oscillator circuit
4.434MHz CRYSTAL
1/6N7404
1/6 N7404
1/2N7474
1/2N7474
8221
microprocessors
technical data- MOS
Microprocessor Prototyping Kit (continued)
Example of initial program checkout configuration
+5
8T26
EXTERNAL
MEMORY/IO
BUS
Finalized configuration with program fixed in PROM
B222
2650 Assembler Version 3.2
2650AS1000/1100
The 2650 assembly language (PIPHASM) is a symbolic
language designed specifically to facilitate the writing of
programs for the 2650 microprocessor.
elements include symbols, instruction mnemonics, constants
and expressions which make up the individual program
statements that comprise a source program.
The AS1000 is for 32·bit or larger machines and the AS1100
is for 16-bit mach ines.
A. Characters
A-Z
alphabetic:
numeric
0-9
special characters blank
( left parenthesis
) right parenthesis
+ add or positive value
- subtract or negative value
* asterisk
, single quote
,comma
/ slash
$ dollar sign
< less than sign
> greater than sign
The 2650 assembler is a program which accepts symbolic
source code as input and produces a listing and/or an object
module "Hexadecimal" format compatible to the two tape
punching programs PIPHTAP (for acceptance by PIPBUG),
PIPSTAP (for PROMs) and also to the simulator, PIPSIM.
The assembler is written in standard Fortran IV and is
approximately 1 250 Fortran card images in length. It is
modular and may be executed in an overlay mode should
memory restrictions make that necessary. It operates in a
two-pass mode to build a symbol table, to issue helpful error
messages, produce an easily readable program listing and
output a computer-readable object module. This version of
the assembler compiles into a 12k word load module on the
PDP-11/40 (16-bit words) and executes under DOS (8k)
within a 28k memory.
Availability
The 2650 assembler is available on both NCSS and GE
timeshare. It is also available from Signetics on 9-track
magnetic tape written in EBCDIC in BO-character unblocked
records at a density of BOO bpi.
B. Symbols
Symbols are formed from combination of characters.
Symbols provide a convenient means of identifying program elements so they can be referenced by other elements.
C. Constants
A constant is a self-defining language element. Unlike a
symbol, the value of a constant is its own "face" value and
is invariant. Internal numbers are represented in 2s
complement notation. There are two forms in which constants may be written: the Self-Defining Constant and the
General Constant.
Features
• forward references
• pseudo-ops to aid programming
• self-defining constants
• symbolic machine operation codes
• free format source code
• syntax error checking
• symbolic address assignment and references
• data creation statements
• storage reservation statements
• assembly listing control statements
• addresses can be generated as constants
• character codes may be specified as ASCII or EBCDIC
• comments and remarks may be encoded for documentation D.
Language requirements
L Input requirements
Input to the assembler consists of a sequence of characters
combined to form assembly language elements. These language
Self-Defining Constant
The self-defining constant is a form of constant which is
written directly in an instruction and defines a decimal
value.
General Constant
The general constant is also written directly in an instruction, but the interpretation of its value is dictated by a
code character and delimited by quotation marks. Its
form can be binary, octal, decimal, hexadecimal, EBCDIC
or ASCII.
Expressions
An expression is an assembly language element that
represents a value. It consists of a single term or combination of terms separated by arithmetic operators. A term
may be a valid symbolic reference, a self-defining constant
or a general constant.
B223
microprocessors
technical data -
MOS
2650 Assembler Version 3.2 (continued)
II. Fields
A statement prepared for processing by the assembler is
logically divided into four fields, as indicated below. They
are free form and are separated by at least one blank character.
The name must begin in logical column 1.
Label
name
Operation
opcode
Operand
operand(s)
Comments
Where:
Label field contains an oPtional label which the assembler
will assign as the symbolic address of the first
byte of the instruction.
Operation contains any of the 2650 processor mllemonic
field
operation codes or any assembler Directive. This
field may include an expression which specifies
a register or value as required by the instruction.
All symbols used in this field must have been
previously defined, i.e. no symbolic forward
references are allowed.
Operand
contains one or more operand elements such as
indirect address indicator, operand expression,
field
index register specification, auto-increment/
auto-decrement indicator, constant specification,
etc. depending on the requirements of the
particular instruction.
Comments any characters following the operand field will
field
be reproduced in the assembly listing without
processing. The Comments Field must be separated from the argument field by at least one
blank.
8224
III. Directives
There are eleven directives which the assembler will recognize.
These assembler directives, although written much like processor instructions, are simply commands to the assembler
instead of to the processor. They direct the assembler to
perform specific tasks during the assembly process, but have
no meaning to the 2650 processor. These assembler directives
are:
Set location counter
ORG
Specify a symbol equivalence
EQU
Define address constant
ACON
Defines memory data
DATA
Reserve memory storage
RES
End of assembly
END
Eject the listing page
EJE
Printer control
PRT
Space control
SPC
Title
TITL
Punch control
PCM
2650 Simulator Version 1.2
2650SM 1000/11 00
The 2650 Simulator (PIPSIM) is a Fortran IV program which
allows a user to simulate the execution of his program without
utilizing the 2650 processor. The simulator executes the 2650
program via host computer software by maintaining its own
internal Fortran storage registers to describe the 2650 program,
the microprocessor registers, the ROM/RAM memory configuration, and the input data to be read dynamically from I/O
devices. Inputs to the simulator are the object module (or the
2650 program in object format) produced by the 2650
assembler and a deck of user commands. The simulator can
accommodate an object module of up to 8192 Bytes.
The output consists- of a listing of the user's commands and a
print out of both static and dynamic information as requested
by the commands. The user may request traces of the processor status, dumps of the contents of memory, and recording
of program timing statistics. Multiple simulations of the same
program with different parameters may be executed during
one simulation run.
The SM 1000 is configured to operate on 32-bit or larger
machines and executes under DOS (8k) within a 28k memory.
The SMll 00 is configured for 16-bit machines and compiles
into a 16k word load module on a PDP-ll/40.
Availability
The 2650 Simulator is available on both NCSS and GE
timeshare. It is also available from Signetics on a 9-track
magnetic tape written in EBCDIC in 80-character unblocked
records at a density of 800 bpi.
Features
• cycle counter for timing estimates
• instruction fetch break points
• operand fetch break points
• trace facilities
• snapshot dumps
• patching facility
• statistical information generated
• easy-to-use command language
• optionally selected start and end addresses
• simulated registers may be displayed while the simulation
program is executed
• simulated registers may be altered while the program is
executing
• maintains a 2k cell (easily modified to 8k) to simulate a
read/write RAM
• capability exists for configuring parts of simulator memory
to look like ROM
• incorporates a 200-byte first in, first out (FIFO) buffer
to store the data read from a simulated input device
• establishes initial program conditions
• monitors execution sequences
User commands
Commands specify how the program is to run and what data
is to be recorded. The simulator accepts information in card
image form. The entire card is read in Fortran "A" format,
and one command must be complete on one card. Comments
may appear in any order within a command set.
The basic manual set (2650BM 1000) contains a complete
description of the user commands and the general operation
of the simulator.
B225
microprocessors
technical data -
MOS
2650 Simulator Version 1.2 (continued)
command name
parameters
description
DUMP
LOC, FWA-LWA(; .... ;LOC, FWA-LWA)
REND
NONE
INPUT
VALUE (; .... ;VALUE)
INSTR.
LOC(; .... ;LOC)
LIMIT
PATCH
REFER.
NO
LOC, VALUE(; .... ;LOC,VALUE)
LOC(; .... ;LOC)
SETP.
LOC(,PSL=VALUE), (,PSU=VALUE)
SETR.
LOC (9, RO=VALUE) ... (R6=VALUE)
SROM
START
STAT
FWA-LWA
LOC
None
STOP.
LOC(; .... ;LOC)
TEND
None
TRACE.
FWA-LWA(; .... ;FWA-LWA)
Display the area of memory, FWA-LWA, whenever
the instruction at LOC executes.
Execute the last simulation and terminate the entire
run.
Define the data to be read by simulated I/O
instructions.
Display the processor state whenever the instruction
at LOC executes.
Specify the total number of instructions executed.
Initialize each memory location, LOC, to VALUE
Display the processor state whenever the instruction
at LOC is referenced by another instruction.
Set the program status byte (lower and/or upper)
to VALUE whenever the instruction at LOC executes.
Set the general purpose registers to V A LU E whenever
the instruction at LOC executes.
Specify the boundaries of Read-Only Memory.
Start the simulated program execution at LOC.
Display instruction statistics at end of program
execution.
Terminate the program execution when the
instruction at LOC executes.
Execute the last simulation and prepare to read the
User Commands for the next simulation.
Display the processor state whenever an instruction
executes, which lies within the area of memory,
FWA-LWA.
B226
Higher Level Language (PL,uS)
2650PL1000
The higher level language is designed for use with the 2650
microprocessor. This language allows the programmer to
reduce programming effort while retaining the control and
efficiency of assembly language. It is written in ANSI
standard Fortran IV and will execute on most machines
without alteration. Programs written in this language tend to
be self·documenting and are easily altered.
The higher level language is a sequence of "Declarations" and
"Executable Statements".
The declarations allow the programmer to control allocation
of storage, define simple textual substitutions (Macros), and
define procedures. The language is "Block Structured":
procedures may contain further declarations which control
storage allocation and define other procedures.
The procedure definition facility of the language allows
modular programming: a program can be divided into
sections (e.g. teletype input, conversion from binary to
decimal forms, and printing output messages). Each of these
sections is written as a language procedure. Such procedures
are conceptually simple, easy to formulate and debug and
easily incorporated into a large program. They may form a
basis for a procedure library, if a family of similar programs
is being developed. Procedures may be individually compiled.
The language handles two kinds of data, its two basic "Data
Types": byte and address. A byte variable or constant is one
that can be represented as an 8·bit quantity; an address
variable or constant is a 16·bit or double·byte quantity. The
programmer can declare variable names to represent byte or
address values. One can also declare vectors (or arrays) or
type byte or address.
that take advantage of the block·structured nature of the
language. Input and output statements read and write 8-bit
values from and to input and output ports. Procedures can be
defined which use these basic input and output statements to
perform more complicated 1/0 operations.
A method of automatic text-substitution (more specifically,
a "compile·time macro facility") is also provided. A programmer can declare a symbolic name to be completely equivalent
to an arbitrary sequence of characters. As each occurrence of
the name is encountered by the compiler, the declared
character sequence is substituted, so the compiler actually
processes the substituted character string instead of the
symbolic name.
The compiler supports compile time expression evaluation
and conditional compilation which allows selective
compilation of code depending on an input parameter at
compile time.
The language generates absolute and/or relocatable code.
The relocatable modules may be linked by a powerful linkage
editor at load time.
Additionally the language contains all machine independent
features of the P LIM language as a subset, thereby enhancing
portability of programs.
Availability
The higher level language is available on NeSS timeshare.
It is also available from Signetics on magnetic tape for 16 and
32·bit machines.
Features
• written in free·form
• adaptable to both 16 and 32-bit machines
• block structured
• employs procedure calls
• byte and address data elements
• based variables
• in·line assembly language
• Macro capability
A simple statement form is the assignment statement, which
• generates relocatable code supported by a relocating loader
computes a result and stores it in a memory location defined
• includes PLiM as a subset
by a variable name. Other statements in the language perform • allows separate compilation of program modules
conditional tests and branching, loop control, and procedure
• has improved control structure over PL/M
invocation with parameter passing. The flow of program
• conditional compilation
execution is specified by means of powerful control structures • compile time expression evaluation
In general, executable statements specify the computational
processes that are to take place. To achieve this, arithmetic,
logical (Boolean), and comparison (relational) operators are
defined for variables and constants of both types (BYTE and
ADDRESS). These operators and operands are combined to
form EXPRESSIONS, which resemble those of elementary
algebra. Expressions are a major component of language
statements.
B227
microprocessors
technical data -
MOS
Microcomputer Prototype Development System
TWIN
The Microprocessor Prototype Development System is a
modular system designed to support development and implementation of 2650 microcomputer systems.
In-circuit emulation/hardware debug and powerful debug
software provides extensive emulation and diagnostic
facilities for the user system.
A typical system consists of three hardware elements: a
Prototype Development Computer (PDC), a floppy disk
storage subsystem, and a system console (typically an ASR33
teletype). The PDC includes an integral MOS and bipolar
PROM programmer and an in-circuit emulation/hardware
debug facility. A wide range of PDC cards and system
peripherals are available.
Integral MOS and bipolar PROM programmers.
System software includes an Operating System, File
Management, Debug Software, Text Editor, and 2650
Resident Assembler. These programs provide the user with
User/Common memory of 16k bytes, expandable to 64k bytes.
Two universal bus structures with multiprocessor and DMA
capabilities.
Eight-level maskable priority interrupt system available to the
user.
Software features
System software provided with the Prototype Development
System includes the Signetics Disk Operating System (SDOS),
text editor, debug package, 2650 assembler and linkage editor.
the tools to perforlTl his software development easily and
quickly. These software capabilities, together with the capacity
and performance of the floppy disk subsystem, and the in·
circuit emulation/hardware debug capabil"ity significantly
The Signetics Disk Operating System (SDOS) provides
reduce the time and cost of a microcomputer system
complete control over operation of all portions of the Prototype Development System. All functions relating to-file
development project.
The Microprocessor Prototype Development System introduces
a unique new Multiprocessor architecture for prototyping
systems. This architecture provides users with the benefits of
maximum availability of common (user) memory space and
a Master processor/Operating System that is isolated and
independent from the user system in the in-circuit emulation/
hardware debug mode.
handling, loading and execution are included, as well as
provision for invoking the debug system and PROM programming functions.
The Microprocessor Prototype Development System will have
a long life cycle, since it is designed with the capability of
supporting future microprocessors, additional peripherals
and expanded software support and hardware debug capabilities.
SO OS provides a powerful procedure capability which gives
the user the capability of creating powerful and customized
operating system commands dynamically.
Hardware features
Modular microprocessor prototype development system to
support development, implementation and check out of 2650
microcomputer systems.
Powerful new Multiprocessor architecture provides maximum'
memory space to user and a protected environment for the
Master processor/Operating System at all times.
The 2650 microprocessor -5 V only, fully TTL compatible,
2,4 JIS cycle time, easy-to-Iearn instruction set - is used for
the Master and Slave microprocessors.
Hardware interfaces and software drivers provided for floppy
disk storage subsystem, TTY, CRT terminal, paper tape
reader, line printer and EIA RS232 terminals.
8228
The SDOS software has been designed to allow the user to
create, edit, and assemble files; obtain object and listing
outputs; load and execute programs; and through the debug
system, check out programs in a most efficient manner.
Programs may be read and written in either hexadecimal or
SMS (Signetics Memory Services) format for (P)ROM
programming.
The SDOS software provides a flexible input/output system
which is organized through logical channels allowing the user
to dynamically assign any logical channel to any physical
device or file within the system. Thus, system I/O devices
may be dynamically assigned using SDOS commands either
from the console or from within a user's program.
Typical system
r---..,
I
,
I
I
I
_...J
U~~R
I
L_
PERIPHERALS
AND ACCESS
HARDWARE
r- - ,
I USER I
I CONFIGURED I
I CARD I
L:"~~°...J
., r
PDC
CARDS
_ _ --I
L_--h
- -
WS --v >
;-A~
NOTE
SOUD LINES ARE TYPICAL SYSTEM AS IllUSTRATED
DASHED LINES SHOW EXPANSION CAPABILITY
SDOS assumes a dual CPU environment with one CPU
designated as a master and the other as a slave. SDOS resides
in a dedicated memory consisting of y,. k P ROM and 16k of
RAM running under the master CPU.
SDOS will control a multidrive floppy disk subsystem (up to
8 drives), a line printer. a high speed paper tape reader and
an ASR·33TTY compatible console. Drivers are provided
within SDOS for these I/O devices. In addition, the user may
write his own driver for other peripheral devices and easily
link them into the SDOS system.
The Prototype Development System Resident Assembler
translates symbolic 2650 assembly language instructions
into appropriate machine language code.
B229
microprocessors
technical data -
MOS
Microcomputer Prototype
Dev~lopment
System (continued)
The Assembler produces absolute object code. The absolute
object code produced is in hexadecimal format which may be
converted by an SDOS command to SMS format for PROM
or ROM programming.
The Text Editor is a comprehensive software package which
allows the user to enter and modify text files. The Text
Editor is line oriented and accepts inputs from an input file,
performs modifications in a work space and outputs the
revised text to an output file.
The Debug System is a software program which will provide
the user with run·time program debug capabilities within a
hardware environment. It utilizes special hardware features
built into the program development system to control the
execution of the user's program. User programs operating
under the debug system will have dynamic program trace,
breakpoint capabilities, memory modification capabilities,
and status reporting on the memory, program, and internal
processor status.
All of the above-described software will be supplied in
object format on diskette and is provided with each
Prototype Development System.
PDC cards
Master CPU
System Crystal Clock
Master 2650
UART /TTY Interface
Real Time Clock
Disk/Paper tape Port
Control/debug
Debug Logic
Master/Slave Interaction
Interrupt Logic
Front Panel Interface
General purpose I/O
EIA Interface
Four Output Ports
Four Input Ports
8 Interrupt Lines
1702 PROM programmer
82S115 PROM programmer
User configurable card
For interfacing directly with users own I/O devices.
Extender card
Peripherals
Slave CPU
Slave 2650
User Cable Interface
Floppy disk subsystem
Expandable to 8 drives
Master memory
4k·Byte Static NMOS RAM
2k·Byte 1702A Erasable PROM
High speed paper tape reader (optional)
Line printer (optional)
Teletype (optional)
Common memory - 4k RAM
4k·Byte Static NMOS RAM
CRT terminal (optional)
Common memory - 16k RAM
16k·Byte Dynamic NMOS RAM
A.C. power requirements
50 Hz or 60 Hz, 115/230 VAC
B230
military products
process levels
The Signetics Mil 38510/883 program is organized to
provide a broad selection of processing options, structured
around the most commonly requested customer flows.
The program is designed to provide our customers:
• Standard processing flows to help minimize the need for
custom specs.
• Cost savings realized by using standard processing flows in
lieu of custom flows.
• Better delivery lead times by minimizing spec negotiation
time, plus allows customers to buy product off·the-shelf
or in various stages of production rather than waiting for
devices started specifically to custom specs.
The following explains the different processing options
available to you. Special device marking clearly distinguishes
the type of screening performed. Refer to tables.
JAN qualified (JB)
JAN qualified product is designed to give you the optimum
in quality and reliability. The JAN processing level is offered
as the result of the government's product standardization
programs, and is monitored by the Defense Electronic Supply
Center (DESC), through the use of industry-wide procedures
and specifications.
JAN qualified products are manufactured, processed and
tested in a government certified facility to MiI-M 38510, and
appropriate device slash sheet specifications. Design
documentation, lot sampling plans, electrical test data and
qualification data for each specific part type has been
approved by the Defense Electronic Supply Center (DESC)
and products appear on the OESC qualified products list
(QPL-38510).
Group B testing, per Mil-Std-883 method 5005, is performed
on each six weeks of production on each slash sheet for each
package type. Group C, per Mil-Std-883 method 5005, is
performed every ninety days for each microcircuit group.
Group 0 testing, per Mil-Std-883 method 5005, is performed
every six months for each package type.
/883B(RB)
Processing to this option is ideal when no JAN slash sheets
are released on devices required. Product is processed to
Mil-Std-883 method 5004, and is 100% electrically tested
to industry data sheets.
Group B, C and D testing is performed per Mil-Std-883
method 5005, in accordance with the Signetics military
generic data program. Offshore assembly is allowed.
MIL temp/883e (S/Re)
If you need a Military temperature range device, but do not
require all the high reliability screening performed in the
other processing options, our Mil-Temp. product is ideal.
Mil-Temp. parts are the standard full Mil-Temperature range
product guaranteed to a 1% AQL to the Signetics data sheet
parameters.
In addition to the common specs used throughout the industry
for processing and testing, JAN qualified products also possess
a requirement for a standard marking used throughout the
IC industry.
8231
military products
military generic data
Signetics has a new program for those customers who require
quality conformance data on their products. This program
allows our customers to obtain reliability information
without the necessity of running Groups B, C and D
inspections for their particular purchase order. It provides
for the customer something that has not been readily
available before in the semiconductor industry in that all
military generic data is controlled and audited by both
government inspection in the case of JAN data and
Signetics quality assurance.
• Allows our customers to qualify Signetics products based
on existing quality conformance data performed at
Signetics.
• Allows our customers to reduce costs and improve
deliveries.
• Provides assurance that all Signetics die function families
and packages meet MiI·M-38510 and customer reliability
requirements.
• Provides an attributes summary to the customer backed
by lot identity and traceability.
Signetics military generic data is compiled by the Military
Products Division based on data from:
1. JAN quality conformance lots.
2. Data generated by quality conformance lots run for
other reliability programs. Refer to table.
A military generic family is defined as consisting of die
function and package type families.
Definition and qualifying manufacturing periods for generic data
qualified
sub-groups
qualifies
option 1
option 2
A
Electrical Test
Group A is performed on
each lot or sublot of
Signetics devices.
Group A is performed on
each lot or sublot of
Signetics devices.
B
Package
Same package construction and
lead finish.
Data selected from devices manufactured
within 6 weeks of the manufacturing
period on the same production line
through final seal.
Data selected from devices
manufactured within 24
weeks of manufacturing
period.
C
Die/Process
Devices representing the same
process families.
Data selected from representative
devices from the same microcircuit
group and sealed within 12 weeks of the
manufacturing period.
Data selected from the
representative devices from
the same microcircuit group
and sealed with,in 48 weeks
of the manufacturing period.
D
Package
Same package construction and
lead finish.
Data selected from the devices representing
the same package construction and lead
finish manufactured within the 24 weeks
of manufacturing period.
Data selected from the
devices representing the
same package construction
and lead finish manufactured within the 52 weeks
of manufacturing period.
If specific data not available, Option 2
will be supplied.
B232
Summary
Package availability
Products processing matrix
x = applicable
Military summary
JB
JAN
qualified
54/54H
54LS
54S
82/8T
93xx
96xx
Linear
Bipolar Memory
Microprocessor
RB
X
X
X
X
X
X
planned
/883
S
Mil
temp.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Military package availability
JAN
case outline
and
lead finish
CB
EB
JB
DB
FB
ZC
GC
IC
Signetics military package types
metal can
8-pin
10-pin
dual-in-line
14-pin
16-pin
24-pin
F
F
I/F
W
W
Q
T
K
Military products processing matrix
process level
and marking
pre-cap
visual
burn-in
functional
test
d.c./a.c.
at 25°C
d.c.!a.c.
at temp.
QPL
offshore
assembly
JB
JM38510/xxxxx
883B
yes
100%
100%
100%
yes
no
RB
Sxxxx/883B
883B
yes
100%
100%
100%
no
yes
sample
d.c. only
no
yes
RC/S
Sxxxx/883C
883B
no
100%
100% d.c.
sample a.c.
8233
military products
requirements and screening flows
description of
requirements
and screens
MI L-M-38510 and
MI L-STD-883 requirements,
methods and test conditions
requirement
General MiI-M-38510
1 Pre-certification The manufacturer shall establish
a Prod. assurance and implement a products
program plan
assurance program plan and
provide for a manufacturer survey
b Manufacturer's by the qualifying activity,
certification
Para. 3.4.1.1
Received after manufacturer has
2 Certification
completed a successful survey,
Para. 3.4.1.2
Device qualification shall consist
3 Device
of subjecting the desired device
qualification
to groups A, B, C and D of
method 5005 to tightened LTPD,
Para. 3.4.1.2
Traceability maintained back to a
4 Traceability
production lot, Para. 3.4.6
Devices must be manufactured,
5 Country
of origin
assembled, and tested within the
U.S. or its territories, Para. 3.2.1
Screening per method 5004 of Mil-Std-883
2010. condo A or B
6 Internal visual
(pre-cap)
1008. condo C min;
7 Stabilization
(24 h at 150°C)
bake
1010. condo C
8 Temperature
cycling
(10 cycles, -65 to +150 °C)
For class Band C
devices thermal shock
may be substituted,
1011, condo A; (15
cycles, 0 to +100 °C)
9 Constant accele- 2001, condo E;
(30 OOOg in VI plane)
ration
There is no test method for this
10 Visual
screen; it is intended only for the
inspection
removal of 'Catastrophic Failures'
defined as 'Missing Leads, Broken
Packages or Lids Off'.
11 Seal
1014
(hermeticity)
condo A or B (5,0 x 10-s cm 3 /s)
a Fine
condo C2 min.
bGross
12 Interim electri- Per applicable device specification
cals (pre-bum-in)
13 Burn-in
B234
1015. condo as specified (min
160 hat 125°C)
processing levels
class A
JAN
qualified
(JB)
/883B
/883C
(RB)
(RC)
X
X
n.a.
n.a.
X
X
n.a.
n.a.
X
X
n.a.
n.a.
X
X
X
X
X
X
n.a.
n.a.
100%
XA
XB
XB
XB
100%
X
X
X
X
100%
X
X
X
X
100%
X
X
X
X
100%
X
X
X
X
100%
100%
100%
optional
X
X
100%
read &
record
X
X
slash
sheet
X
X
data
sheet
X
X
100%
100%
240h
X
X
n.a.
n.a.
x
descri pti on of
requirements
and screens
MIL·M·38510 and
MI L·STD-883 requirements
methods and test conditions
require·
ment
Screening per method 5004 of Mil-Std-883 (cont.)
14 Final electricals Per applicable device specification 100%
Sub·group 1
a Static tests,
at 25°C
b Static tests,
Sub·group 2
at +125 °c
Sub.group 3
c Static tests,
at -55°C
d Dynamic test, Sub·group 4 (for linear product
at 25°C
mainly)
e Functional test, Sub·group 7
at 25°C
f Switching test, Sub·group 9
at 25°C
15 Percent Defec· A PDA of 10% is a normal
tive Allowable requirement applied against the
(PDA)
static test at 25°C (A·1). This is
controlled by the slash sheets
for JB & JBX products. For RBX
& RB 10% is standard.
Fungus inhibiting paint
16 Marking
(between
brackets
meaning of
xxxx)
2012
17 X·ray
18 External visual 2009
processing levels
class A
JAN
qualified
(JB)
n.a.
= applicable
= not applicable
/883B
/883C
(RB)
(RC)
100%
read &
record
X
slash
sheet
data
sheet
data
sheet
X
X
X
X
X
X
n.a.
X
X
X
n.a.
X
X
X
X
X
X
X
X
X
X
X
n.a.
10%
100%
5%
as req'd
X
JM38510
/xxx
(slash
sheet no)
X
Sxxxx
/883B
(Sig.
basic no)
n.a.
Sxxxx
/883C
(Sig.
basic no)
100%
100%
X
n.a.
X
n.a.
X
n.a.
X
X
X
X
Quality conformance inspection per method 5005 of Mil-Std-883
Electrical tests - final electricals each lot X
19 Group A
(no 14 above) repeated on a
sample basis. (Sub.groups 1 to 12
as specified).
20 Group B
Package functional and construc· every 6 X
weeks per
tiona I related test i.e. package
dimensions, resistance to solvents, package
type
internal visual and mechanical,
bond strength and solderability.
n.a.*
every 3
Die related tests i.e. 1000 h
21 Group C
operating life, temperature cyclin months
per
and constant acceleration.
microcircuit
group
every 6 X
,Package related tests i.e.
22 Group D
physical dimensions, lead fatigue, months
thermal shock, temperature cycle, per
moisture resistance, mechanical
package
type
shock, vibration variable
frequency constant acceleration
and salt atmosphere.
X
generic data available
X
generic data available
X
generic data available
* For class A devices these tests are included in Group B.
B235
military products
JAN 38510 type numbers-what they mean
The following chart is offered for your reference to help
take some of the mystery out of JAN part number marking.
For an example, we wtll take the marking for a 5400F
processed to JAN and explain its meaning as well as other
options.
J M3 8 5 1 0
MILITARY
DESIGNATOR
DETAIL
SPECI FICATION
DEVICE
TYPE
calls out
refers to detail
slash sheet spec
001,002,003 --..
refers to a
specific part
type under the
detail spec.
MI L-M-38510
JANIC
The "J" in the
marking is very
important.
If it's not
there it's not a
JAN device.
DO NOT be
confused by
JAN equivalents
marked M38510.
A slash sheet
detail spec will
usually represent
a family of devices
with similar
functions.
detail spec
represents many
positive NAND
gates such as the
5400, 5401, 5403,
5410, 5420 and 5430
etc.
The /002 detail
spec on the other
hand represents
many flip-flop
functions such
as the 5472, 5473,
54107,5476,5474,
5470 and so on for
the rest of the
slash sheets.
8236
This, plus the
detail spec no.
will denote
a part type.
i.e.:
dev.
detail
+
type
spec
001
001
001
01
02
03
001
04
generic
type
5430
5420
5410
5400
detail + dev.
type
spec
generic
type
002
002
002
5472
5473
54107
01
02
03
and so on for the
rest of the slash
sheets.
Actual marking for our 5400F
as it appears on the device.
!iAAAA - f - - - - date code
JM38510
00104
BeB
CDKB --I---~ Signetics
manufacturer's
code (per
MiI-M-38510)
DEVICE
CLASS
CASE OUTLINE
calls out
processing
to either
class A
orC of
MIL-STD-883
A '" y.. " x y.. " flat pack 14 pin
This code denotes the package Le.:
B '" y.. "x Xi" flat pack 14 pin
C '" y.."
:r. . "
X
14 pin
dual in-line
E '" y.." x %" 16 pin
dual in-line
%" flat pack
A = Kovar or
alloy 42 with
hot solder dip
B
D = y.. " x %" flat pack 14 pin
F '" y.. " x
LEAD
FINISH
16 pin
= Kovar or
alloy 42 with
tin plate
C = Kovar or
alloy wit"
gold plate
G '" 8 lead metal can
H
=y.." x y.. "
10 pin
flat pack
= 10 lead metal can
=)I,"xly.."24pin
dual in-line
K = ~" x )I, " 24 pin
flat pack
L
= %" x)l," 24 pin
flat pack
Z = y.. " x %" 24 pin
flat pack
B237
packages
PLASTIC: Standard Dual-In-Line
Number of pins N Package: 8, 14, 16,20,22,24,28,40
P Package: 16
o:t
N·I~::: :~~~
NP8Ctj_
o
I.
::~:=!
9.~13~) .~
9.21 1.3651
J
F~~
---.
I
~
j
1
~
3.43 (.,351
3.05(.120)
2.79 (.110J
2.291.0901
1.32UI62)
1.12(.044)
PLASTIC: Miniature Dual-In-Line
~
-[:3.<11,'' '
0.63(.0211"
;:::::: I ill ~
0.>",015,4''''
_~ZOI
2..29 {.otOl---l
2.18(.0851
1.1561.0661
025(010)
I
'P(~"
8.26(.325)
Number of pins SO Package: 6,8,10,14,16
~~
~''';I' lttt::~
'g,ii'~~
1,45 175
dimensions a
SO-6 SO-8
min. 3,55 4,8
max. 3,75 5,0
SO-10
6,05
6,25
SO-14
8,55
8,75
SO-16
9,8
10,0
S Package
I~
"."1175)
I
:J:;-rn-
i-·-- 4m-d-L~~~
"'J""_"_ 0 0 [].3~:::::
""~' --~rH""·"r
~
.,,'"'\1 ,:::::::
ti
:::::~
I
w_
4.44l.0801
- 1- 0,45.,,,
'g;;:
J,;IL~
M,""';"
W
PLASTIC: Power
::,
__
2.!)l 1080)
~-~
~E
8238
~,::::''',w''f9;,~
1.14 (.045J
0.&1.(.025)
SO Package (SO-8 as example)
U1 Package
,~
~t.'151
3.17(.125)
2.921.115)
T
I
1_,-.)m,,~l.
I
HERMETIC: Cerdip Number of pins
F
F Package: 14,16,18,22,24
Package 14 pin
HERMETIC: Metal ceramic Dual-in-Line
F
Number of pins
Package 22-pin
E Package: 16,18
I Package: 16,18,24,28,40,50
E or I package 16 pin
B239
packages
HERMETIC: Metal Headers
DA Package
DB Package
.... ,.....
4.7Bt •• H)R.MAX
2MOUNTlHG
HOLES~:TsnDIA.
DE Package
K Package
OIA.
r~l'ffiH
lQ
4.J.:
5.33(.210)
4.32"i:17oi
t
j
I
14.22~.560) nnn
12.70 iSOOi
UU U
_5.84 1.2301__
__f
;:;OIToiic:::~::::;:;:::;:;:;~
0.76(.030)
MAX.
~
+w~~~-
4 .LEADS
0.48(.019)
0Ai iJ)"i6)
~Ipooi
10 LtADS
~~OIA
I
TA package
'·"'1325) OIA. -iCiOfJiSi
1
T-~
~1.18SI
4.19[i6s)
Q2!~
[0.511.0201
-1~~~
I
0.0 . 0 0 0 . .fdi~.:
-
~~
t
INSUL"TOR
0481019)
9COfJ701
~E~DIA
-i.(ijilSSi D1A, - -
B240
Aluminium deposition equipment for
Ie wafers.
Electronic components
and materials
....' ' ),-
~~
~.l"'#
.........
~
~' ,p~II~~·'
.
..iJ.~,
for professional, industrial
and consumer uses
••",.)14-
J ,"'• • •,.----.....\
~
\."j.
..
_I. "111 ,_
from the world-wide
.i...'1""~lt
Philips Group of Companies _ . .
1II1~'"
j • • •'_~1
".11.,',
,.
~'r~
~......---
Argentin.: FAPESA l.y.C., Av. Crovara 2550, Tablada, Prov. de BUENOS AIRES, Tel. 652-7438/7478.
Austr.II.: PHlLlPS INDUSTRIES HOLDINGS LTD., Elcoma Division, 67 Mars Road, LANE COVE, 2066, N.S.W., Tel. 42708 88.
Au....I.: OSTERREICHISCHE PHILIPS BAUELEMENTE Industrie G.m.b.H., Trlester Str. 64, A-1101 WIEN, Tel. 62 91 11.
Belgium: M.B.L.E., 50, rue des Deux Gares"B-l070 BRUXELLES, Tel 5230000.
Brazil: IBRAPE, Caixa Postal 7383, Av. Paulista 2073-S I Loja, SAO PAULO, SP, Tel. 284-4511.
Canada: PHILIPS ELECTRONICS LTD., Electron Devices Dlv., 601 Milner Ave., SCARBOROUGH, Ontario, M1B lM8, Tel. 292-5161.
Chile: PHILIPS CHILENA S.A., Av. Santa Maria 0760, SANTIAGO, Tel. 39-4001.
Colombl.: SADAPE SA, P.O. Box 9805, Caile 13, No. 51 + 39, BOGOTA D.E. 1., Tel. 600 600.
Denmark: MINIWATT AIS, Emdrupvej 115A, DK-2400K0BENHAVN NV., Tel. (01) 691622.
Finland: OY PHILIPS AB, Elcoma Division, Kaivokatu 8, SF-00100 HELSINKI 10, Tel. 1 7271.
Fr.nce: RT.C. LA RADIOTECHNIQUE-COMPELEC, 130 Avenue Ledru Rollin, F-75540 PARIS 11, Tel. 355-44-99.
Germ.ny·, VALVO, UB Bauelemente der Philips G.m.b.H., Valvo Haus, Burchardstrasse 19, 0-2 HAMBURG 1, Tel. (040) 3296-1.
GI'4!8C8: PHILIPS S.A. HELLENIQUE, Elcoma Division, 52, Av. Syngrou, ATHENS, Tel. 915311.
Hong Kong: PHILIPS HONG KONG LTD., Compo Dept., Philips Ind. Bldg., Kung YipSt., K.C.T.L. 289, KWAI CHUNG, N.T. Tel. 12-2451 21:
Indl.: PHILIPS INDIA LTD., Elcoma Div., Band Box House, 254-0, Dr. Annie Besant Rd., Prabhadevi, BOMBAY -25-00, Tel. 457311-5.
Indoneal.: P.T. PHILIPS-RALIN ELECTRONICS, Elcoma Division, 'Timah' Building, JI. Jen. Gatot Subroto, JAKARTA, Tel. 44163.
Ireland: PHILIPS ELECTRICAL (IRELAND) LTD., Newstead, Clonskeagh, DUBLIN 14, Tel. 6933 55.
Italy: PHILIPS S.p.A., Sezione Elcoma, Piazza IV Novembre 3,1-20124 MILANO, Tel. 2-6994.
J.pan: NIHON PHILIPS CORP., Shuwa Shinagawa Bldg., 26-33 Takanawa3-chome, Minato-ku,TOKYO (108), Tel. 448-5611.
(IC Products) SIGNETICSJAPAN, LTD., TOKYO, Tel. (03) 23()"1521.
Korea: PHILIPS ELECTRONICS (KOREA) LTD., Philips House, 260-199ltaew!ln-dong, Yongsan-ku, C.P.O. Box 3680, SEOUL, Tel. 44-4202.
Mexico: ELECTRONICA SA de C.V., Varsovia No. 36, MEXICO 6, D.F., Tel. 5-33-11-80.
Netherl.nda: PHILIPS NEDERLAND B. V., Afd. Elonco, Boschdijk 525, NL-4510 EINDHOVEN, Tel. (040) 793333.
N,_ Zeal.nd: Philips Electricallnd, Ltd., Elcoma Division, 2 Wagener Place, Sl Lukes, AUCKLAND, Tel. 867119.
Norw.y: ELECTRONICA A/S., Vitaminveien 11, P.O. Box 29, Gretsen, OSLO 4, Tel. (02) 1505 90.
Peru: CADESA, Jr. 110, No. 216, Apartado 10132, LIMA, Tel. 277317.
Philippines: ELDAC, Philips Industrial Dev.lnc., 2246 Pasong Tamo; MAKATI-RIZAL, Tel. 88-89-51 to 59.
Portugal PHILIPS PORTUGESA S.A.R.L., Av. Eng. Duharte Pacheco 6, L1SBOA 1, Tel. 68 31 21.
Singapore: PHILIPS SINGAPORE PTE LTD., Elcoma Div., POB 340, Toa Payoh CPO, Lorong 1, Toa Payoh, SINGAPORE 12, Tel. 53 8811.
South Africa: EDAC (Pty.) Ltd., South Park Lane, New Doornfontein, JOHANNESBURG 2001, Tel. 24/6701.
Spain: COPRESA SA, Balmes 22, BARCELONA 7, Tel. 3016312.
Sweden: A.B. ELCOMA, Udingoviigen SO, S-l 02SO STOCKHOLM 27, Tel. 08/679780.
Swltzerl.nd: PHILIPS A.G., Elcoma Dept., Edenstrasse 20, CH-8027 ZORICH, Tel. 01/44 22 11.
T.lw.n: PHILIPS TAIWAN LTD., 3rd Fl., San Min Building, 57-1, Chung Shan N. Rd, Section 2, P.O. Box 22978, TAIPEI, Tel. 5513101-5.
Turkey: TORK PHILIPS TICARET A.S., EMET Department, Inonu Cad. No. 78-80, ISTANBUL, Tel. 43 5910.
United Kingdom: MULLARD LTD., Mullard House, Torrington Place, LONDON WCl E 7HD, Tel. 01-5806633.
United States: (Active devices & Materials) AMPEREX SALES CORP., Providence Pike, SLATERSVILLE, R.I. 02876, Tel. (401) 762-9000.
(Passive devices) MEPCO/ELECTRA INC., Columbia Rd., MORRISTOWN, N.J. 07960, Tel. (201) 539-2000.
(IC Products) SIGNETICS CORPORATION, 811 East Arques Avenue, SUNNYVALE, California 94086, Tel. (408) 739-7700.
Uruguay: LUZILECTRON SA, Rondeau 1567, plso 5, MONTEVIDEO, Tel. 94321.
Venezuel.: IND. VENEZOLANAS PHILIPS SA, Elcoma Dept., A. Ppal de los Ruices, Edit. Centr,o Colgate, Apdo 1167, CARACAS, Tel. 360511.
AS
Printed in The Netherlands
@1978N.V.Phlllps'Gloeliampenfabrleken
25
26
36
46
9399 553 20801
Source Exif Data:
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