1982_IND502_Sprague_Integrated_Circuits 1982 IND502 Sprague Integrated Circuits
User Manual: 1982_IND502_Sprague_Integrated_Circuits
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a Penn Central unit
INTEGRATED
CIRCUITS
DATA BOOK
IND·502
Second Printing
SPRRGUE PRODUCTS COmPRny
DISTRIBUTORS '
DIVI~ION
OF SPRAGUE ELECTRIC COMPANY
NORTH ADAMS , MASSACHUSETTS 01247
Executive Offices : 413/664-4481
SPRAGUE®
THE MARK OF RELIABILITY
INTEGRATED CIRCUITS DATA BOOK
INTERFACE CIRCUITS
• High Voltage
• High Current
• SiMOS and Complex Arrays
LINEAR CIRCUITS
• Radio
• Television
• Audio
HALL EFFECT DEVICES
TRANSISTOR ARRAYS
SPRAGUE ELECTRIC COMPANY
SEMICONDUCTOR DIVISION
INTERFACE AND LINEAR INTEGRATED CIRCUITS
115 Northeast Cutoff. Worcester, Mass. 01606 • 6171853-5000
DISCRETE SEMICONDUCTORS AND HALL EFFECT ICs
70 Pembroke Road. Concord, N.H. 03301 • 6031224-1961
Copyright © 1982, Sprague Electric Company, North Adams, Mass.
Contents
SECTION 1 - GENERAL INFORMATION
Product Index ..................................................................
Part Numbering System ...........................................................
Cross-Reference (Competitive to Sprague) ..............................................
How To Place An Order. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Sprague Facilities ...............................................................
Engineering Bulletins. . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
1-2
1-5
1-7
1-15
1-16
1-18
See Also:
Sales Offices ............................................................ Back Cover
SECTION 2 - HIGH-VOLTAGE INTERFACE DRIVERS
Selection Guide ...............................................................-.. 2-2
UHP-480 through 482 Gas-Discharge Display Segment Drivers ...............................
UHD/UHP-490 and 491 Gas-Discharge Display Digit Drivers .................................
UHP-495 Gas-Discharge Display Digit Driver ............................................
UDN-6116A through 6128A-2 Fluorescent Display Drivers ...................................
UDN-6116R through 6128R-2 Hermetic Fluorescent Display Drivers ............................
UDN-6138A through 6148A-2 Fluorescent Display Drivers ...................................
UDN-6164A and 6184AGas-Discharge Display Digit Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . ..
UDN-7180A through 7186A Gas-Discharge Display Segment Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . ..
2-3
2-5
2-8
2-10
2-10
2-10
2-14
2-16
Application Notes:
A Monolithic IC Series for Gas-Discharge Displays .................................... 2-22
Trends in IC Interface for Electronic Displays. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-28
SECTION 3 - HIGH-CURRENT INTERFACE DRIVERS
Selection Guide ................................................................. 3-2
UHP-400 through 433-1 Quad Power and Relay Drivers ....................................
UHP-500 through 533 Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . ..
UlN-2001A through 2025A 7-Channel Darlington Drivers ...................................
UlN-2061M and 2062M Dual 1.5 A Darlington Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UlN-2064B through 2077B Quad 1.5 A Darlington Switches .................................
UDN-2540B Quad NAND Power Driver .................................................
UDN-2580A through 2588A B-Charinel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-2595A 8-Channel Sink Driver ...................................................
UlN-2801A through 2825A 8-Channel Darlington Drivers ...................................
UDN-2841B through 2846B Quad 1.5 A Darlington Drivers ..................................
UTN-2886B SCR Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UTN-2888A SCR Array ............................................................
UDN-2949Z 2 A Half-Bridge Motor Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-2952B and 2952W Full-Bridge Motor Drivers ........................................
UDN-2956A and 2957A Negative Supply, 5-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-2981A through 2984A 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-3611M through 3614M Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-5703A through 5707A Quad Peripheral and Power Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-5711M through 5714M Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDN-5733M Quad NOR Peripheral and Power Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
3-3
3-3
3-14
3-24
3-24
3-35
3-37
3-44
3-46
3-57
3-63
3-63
3-66
3-70
3-72
3-76
3-83
3-87
3-91
3-90
Application Notes:
Series UlN-2000A Darlington Arrays ..............................................
Interface Integrated Circuits for Motor Drive Applications ................................
Expanding The Frontiers Of Integrated Circuit Interface .................................
Sprague High-Power Interface ICs ...........•.....................................
3-95
3-102
3-109
3-119
SECTION 4 - BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS
UCN-4202A
UCN-4401A
UCN-4805A
UCN-4810A
UCN-4815A
UCN-4821A
Stepper Motor Translator/Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
and 4801A BiMOS latched/Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
and 4806A BiMOS latched Decoder/Drivers ....................................
10-Bit Serial-In, Latched Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
BiMOS latch/Source Driver ................................................
through 4823A B-Bit Serial-In, Latched Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
4-2
4-9
4-12
4-16
4-19
4-22
Application Note:
Sprague BiMOS - Muscle for the Microprocessor .................................... 4-26
SECTION 5 - INDUSTRIAL, MILITARY, AND AEROSPACE DEVICES
UHC/UHD-400 through 433-1 Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UHC/UHD-500 through 533 Quad Power and Relay Drivers ..................................
UlS-2001H through 2015H 7-Channel Darlington Drivers ....................................
ULQ-2001R through 2015R 7-Channel Darlington Drivers ...............•...................
UlS-2021H through 2025H 7-Channel Darlington Drivers ...................................
UlS-2064H through 2077H Quad 1.5 A Darlington Switches .................................
UlS-2801H through 2815H 8-Channel Darlington Drivers ...................................
UlQ-2801R through 2815R 8-Channel Darlington Drivers ...................................
UlS-2821H through 2825H 8-Channel, 95 V Darlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDQ-2956R and 2957R Negative Supply, 5-Channel Source Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-2981H through 2984H 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-3611H through 3614H Dual Peripheral and Power Drivers ...............................
UCS-440IH and 480lH BiMOS latched/Drivers ........... ,..............................
UDS-5703H through 5707H Quad Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-5711H through 5714H Dual Peripheral and Power Drivers ...............................
UDS-5733H Quad NOR Peripheral and Power Driver .......................................
UDS-5790H and 5791H Quad PIN Diode Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5-2
5-2
5-7
5-7
5-7
5-17
5-26
5-26
5-26
5-36
5-39
5-44
5-48
5-54
5-60
5-59
5-66
See Also:
UHD-490 and 491 High-Voltage Display Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UlS-2045H NPN Transistor Array .................................................
UlS-2083H Independent NPN Transistor Array .......................................
UlS-2140H Quad Current Switch ........ ' ..... , .. ',' ..... , ..................... : ...
UGS-3019T/U Digital Hall Effect Switch ........................................... ,
UGS-3020T/U Digital Hall Effect Switch ............... , . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UGS-3030T/U Bipolar Hall Effect Switch ...........................................
UGS-3075T/U Bipolar Hall Effect Switch ...........................................
UGS-3076T/U Bipolar Hall Effect Switch ...........................................
UlQ/UlS-8126R (SG2526!l526J) SMPS Controllers ....................................
UlS-8160R (SE5560F) Switched-Mode Power Supply Controller ...........................
2-5
10-4
10-12
10-16
9-5
9-7
9-9
9-2
9-2
10-37
10-42
Quality Assurance Flow Chart. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. 5-70
Double-Deuce Program for High-Reliability Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-72
High-Reliability Screening to Mll-STD-883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-75
iii
SECTION 6 - RADIO INTEGRATED CIRCUITS
Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-2
ULN-211lA F-M, I-F Amplifier/Limiter and Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2136A F-M, I-F Amplifier/Limiter and Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2204A A-M/F-M Radio System ...................................................
ULN-2240A A-M/F-M Signal Processing System with Tuning Error and Level Muting ................
ULN-2241A A-M/F-M Signal Processing System ..........................................
ULN-2242A (TDA1090) A-M/F-M Signal Processing System with Level Muting .....................
ULN-2243A Mixer/I-F for F-M Radios ..................................................
ULN-2245A Phase-locked Loop Stereo Decoder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2249A A-M Radio System ......................................................
ULX-3804A A-M/F-M Signal Processor .................................................
ULN-3809A Low-Voltage Phase-Locked Loop Stereo Decoder .................................
ULN-3810A Phase-Locked Loop Stereo Decoder. . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . ..
ULX-3840A A-M/F-M Signal Processing System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-3859A Low-Power, Narrow-Band, F-M I-F ...........................................
ULN-3889A (TDA3189) I-F System for F-M Receivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
6-3
6-8
6-14
6-22
6-29
6-36
6-44
6-49
6-52
6-57
6-63
6-66
6-69
6-76
6-79
Application Notes:
ULN-2204A Applications and Operation ............................................
A-M/F-M Radio Design Using the ULN-2240/41142A ...................................
A Complete A-M/F-M Signal Processing System .......................................
The Development of High-Quality Receivers for A-M Stereo ...............................
6-86
6-97
6-108
6-116
SECTION 7 - TELEVISION INTEGRATED CIRCUITS
Selection Guide ....................................... . . . . . . . . . . . . . . . . . . . . . . . . .. 7-2
ULN-2211B 2-Watt TV Sound Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2224A Chroma Demodulator ....................................................
ULN-2260A AGC Control, Sync Separator, and Scan Processor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2261A Luminance Processor ....................................................
ULN-2270B and 2270Q (TDA1170) Vertical Deflection System ................................
ULN-2290B (TDA3190) and 2290Q (TDA1190Z) 4-Watt TV Sound Channel .......................
ULN-3914A Chroma/luma Processor ..................................................
7-3
7-8
7-12
7-15
7-19
7-25
7-32
See Also:
ULN-3702Z for use as Vertical Output Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-22
Application Notes:
ULN-2211B F-M Sound System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-34
ULN-2260A Signal, Sync, and Scan Processor ....................................... 7-50
iv
SECTION 8 - AUDIO INTEGRATED CIRCUITS
Selection Guide ................................................................. 8-2
ULN-223lA Dual Audio Preamplifier ..................................................
ULN-2280B 2.S-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2283B Low-Power Audio Amplifier ................................................
ULN-370lZ (TDA2002) 5 to lO-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-3702Z (TDA2002A) l2-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-3703Z (TDA2003) lO-Watt Audio Power Amplifier .....................................
ULX-3777W Dual lO-Watt Audio Power Amplifier .........................................
ULX-3788W 20-Watt Audio Power Amplifier .............................................
8-3
8-5
8-11
8-19
8-22
8-27
8-29
8-31
SECTION 9 - HALL EFFECT DEVICES
Selection Guide ................................................................. 9-2
UGN-30l3T/U Ultra Low-Cost Digital Switch ............................................ ,
UGN/UGS-30l9T/U Low-Cost Digital Switch .............................................
UGN/UGS-3020T/U Low-Cost Digital Switch .............................................
UGN/UGS-3030T/U Bipolar Digital Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UGN-3040T/U Ultra-Sensitive Digital Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UGN/UGS-3075T/U Bipolar Latch ................................................... "
UGN/UGS-3076T/U Bipolar Latch .................................................... ,
UGN-320lM Dual Output Digital Switch ............................................... ,
UGN-3203M Dual Output Digital Switch. . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . ..
UGN-3220S Dual Output Digital Switch ............................................... ,
UGN-350lM Linear Output Hall Effect Sensor ............................................
UGN-350l T/U Linear Output Hall Effect Sensor ..........................................
UGN-3604M Hall Effect Sensor Element. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UGN-3605M Hall Effect Sensor Element. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
9-3
9-5
9-7
9-9
9-11
9-2
9-2
9-14
9-14
9-17
9-19
9-22
9-25
9-25
Application Note:
Hall Effect Integrated Circuit Application Guide ....... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-27
SECTION 10 - TRANSISTOR ARRAYS AND MISCEWNEOUS DEVICES
ULN-2031A NPN 7-Darlington Array .........................•...•.............•..•...•. 10-2
• ULN-2032A PNP 7-Dar1ington Array ............... , ...........•.................•.... , 10-2
ULN-2033A PNP 7-Dar1ington Array ................................, ...... , ............ 10-2
ULS-2045H Hermetic NPN Transistor Array .......................•..... : ................ 10-4
ULN-2046A NPN Transistor Array ....................................•............•... 10-4
ULN-2046A-1 NPN Transistor Array ................................................... 10-6
ULN-2047A Triple Differential Amplifier Array ............................................ 10-7
ULN-2054A Dual Differential Amplifier Array ............................................ 10-8
ULN-2081A NPN Common-Emitter NPN Transistor Array ................... , .. " , . , ........... 10-11
ULN-2082A NPN Common-Collector NPN Transistor Array .............. :.~ ... :. :"....... ;' ...... 10-1I
ULN-2083A Independent NPN 5-Transistor Array .......................................... 10-12
ULN-2083A-1Independent NPN 5-Transistor Array ........................................ 10-14
ULS-2083H Hermetic Independent NPN Transistor Array ............................... , .... 10-12
, ULN-2086A NPN 5-Transistor Array ........................................ , ... , ...... 10-15
ULH-2140A Quad Current Switch ........................ : .......... :.................. 10-16
ULS-2140H Hermetic Quad Current Switch .............................................. 10-16
ULN-2401A Lamp Monitor ........................................ .' ................. ,10-18
ULN-2429A Fluid Detector .......................................................... 10-20
ULN-2430M Timer ............................................................... 10-23
ULN-3304M Schmitt Trigger ........................................................ 10-26
ULN-3305M Dual Schmitt Trigger ......................................... , .......... 10-29
ULN-3306M Dual Schmitt Trigger ......................•.......... ; .. , ....... ', .. , .... 10-31
ULN-3330Y Optoelectronic Switch ........•........................... : ............... 10-34
ULN-8126A/R (SG3526J) Switched-Mode Power Supply Control Circuits ............... ~ .......... 10-37
ULQ-8126A/R (SG2526J) Switched-Mode Power Supply Control Circuits .......................... 10-37
ULS-8126R (SG1526J) Hermetic Switched-Mode Power Supply Control Circuit ............ :......... 10-37
ULN-8160A/R (NE5560FIN) Switched-Mode Power Supply Control Circuit ............... : ......... 10-42
ULS-8160R (SE5560F) Hermetic Switched-Mode Power Supply Control Circuit ..................... 10-42
ULX-8161M (NE5561N) Switched-Mode Power Supply Control Circuit ........................... 10-45
TPP-Series of Medium-Power Darlington Arrays ............................................ 10-47
TPQ-Series of Quad Transistor Arrays ................................................. 10-48
Applications Note:
ULN-3300M Series Schmitt Triggers ......................................... : .... 10-50
vi
SECTION 11 - CUSTOM DEVICES
Custom Circuit Design Ca pability ....................................................
Semi-Custom, High-Voltage, Integrated Circuits ..........................................
ULN-2350C and 2351C Tuff Chip@) Semi-Custom Integrated Circuits ..........................
Optional Package Capabilities ......................................................
SECTION 12 -
11-2
11-3
11-4
11-6
PACKAGE INFORMATION
Package Thermal Characteristics ....................................................
Thermal Design for Plastic Integrated Circuits ...........................................
Computing Integrated Circuit Temperature Rise ..........................................
Operating and Handling Practices for MOS Integrated Circuits ...............................
12-2
12-3
12-9
12-13
Package Drawings:
Suffix 'A' Plastic Dual In-Line ................................................... 12-14
Suffix 'B' Plastic Dual In-Line with Heat Sink Semi-Tabs ............................... 12-16
Suffix 'C' Unpackaged Chip or Wafer .................................................. .
Suffix 'H' Glass/Metal Hermetic Side-Brazed Dual In-Line ............................... 12-17
Suffix 'J' Glas~/Metal Hermetic 14-Lead Flat-Pack .................................... 12-19
Suffix 'M' Plastic Mini 8-Pin Dual In-Line .......................................... 12-20
Suffix 'Q' Plastic Quad In-Line with Heat Sink Tabs ................................. " 12-20
Suffix 'R' Glass/Ceramic Hermetic Dual In-Line ...................................... 12-21
Suffix'S' Plastic Mini Single In-Line .............................................. 12-22
Suffix 'T' Plastic 3-Pin Single In-Line ............................................. 12-23
Suffix 'W' Plastic 12-Pin Single In-Line Power Tab .................................... 12-23
Suffix 'Y' Plastic 3-Lead TO-92 Transistor .......................................... 12-24
Suffix 'Z' Plastic 5-Lead TO-220 Single In-line Power Tab .............................. 12-24
vii
[/.1
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GENERAL INfORMATION
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SECTION 1 - GENERAl INFORMATION
Product Index ......•.............. ; .........
Part Numbering System ........................
Cross Reference . . . . . . . . . . . . . ... . . . . . .• . ... . . ..
How To Place An Order .........' .•... : .... , ......
Sprague Facilities ............................
Engineering BuHetins ..........................
1-2
1-5
1-7
1-15
1-16
1-18
See Also:
Sales. Offices .• , ............•......... Back Cover
1-1
GENERAliNFORMAlION° .
Product Index in Numerical Order
TPQA-05 through 56
UHCIUHD~400 through 433-1
UHP-400 through 433-1
. UHP-480 through 482
UHD/UHP-490 and 491
UHP-495
UHC/UHD-500 through 533
UHP-500 through 533
TPP-I000 and 2000
ULN-2001A through 2015A
ULS-2001H through 2015H
ULQ-2001R through 2015R
ULN-2021A through 2025A
ULS-2021H through 2025H
UlN-2031A through 2033A
ULS-2045H
ULN"2046A
ULN-2046A-l
ULN,2047A·
ULN-2054A
ULN-2061M and 2062M
ULN-2064B through 2077B
UlS-2064H through 2077H
ULN-2D81A
ULN-2Q82A
ULN-2083A
ULN-2083A-1
ULS-2083H
ULN-2086A
ULN-2111A
ULN-2136A
ULN-2140A
ULS-2140H
ULN-2204A
ULN-2211B
TPQ-2221 and 2222
ULN-2224A
ULN-22.31A
ULN-2240A
ULN-2241A
ULN-2242A
ULN-2243A
ULN-2245A
ULN-2249A
Quad Transistor Arrays ................................. 10-48
Hermetic Quad Power and Relay Drivers ..................... 5-2
Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . •. 3-3
High-Voltage Display Drivers ..............•.............. 2-3
High-Voltage Display Drivers ............................. 2-5
High-Voltage Display Driver . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. 2-8
Hermetic Quad Power and Relay Drivers ..................... 5-2
Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-3
Medium-Power Darlington Arrays ...............•.......... 10-47
High-Current Darlington Drivers ............ . . . . . . . . . . . . . .• 3-14
Hermetic High-Current Darlington Drivers •.............•..... 5-7
Hermetic High-Current Darlington Drivers ..•................. 5-7
High-Current, 95 V Darlington Drivers . . . . . . . . . . . . . . . . . . . . . .. 3-14
Hermetic High-Current Darlington Drivers ...............•.... 5-7
Darlington Arrays ............................... : ..... 10-2
Hermetic NPN Transistor Array ...................•........ 10-4
NPN Transistor Array ................................... 10-4
NPN Transistor Array ..... ; .•........................... 10-6
Triple Differential Amplifier Array .......................... 10-7
Dual Differential Amplifier Array ........................... 10-8
Dual 1.5 A Darlington Switches ........................... 3-24
Quad 1.5 A Darlington Switches ........•.............. , • .. 3-24
Hermetic Quad 1.5 A Darlington Switches . . . . . . . . . . . . . . . . . . .• 5-17
Common~Emitter NPN Transistor Array ...................... 10-11
Common-Collector NPN Transistor Array ..................... 10-11
Independent NPN Transistor Array .......................... 10-12
Independent NPN Transistor Array; ........ ; ..... , .......... 10-14
Hermetic Independent NPN Transistor Array ................... 10-12
NPN Transistor Array ................................... 10-15
F-M, I-FAmplifier/Limiter and Detector ............ ; . . . . . . . .. 6-3
F-M, I-FAmplifier/Limiter and Detector .......... , ........... ·6-8
Quad Current Switch ...............•................... 10-16
Hermetic Quad Current Switch ...•.......................• 10-16
A-M/F-M Radio System ................................. 6-14
2-Watt TV Sound Channel ............................... 7~3
Quad NPN Transistor Arrays ..................•........... 10-48
Chroma Demodulator. .. . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-8
Duat Audio Preamplifier ................. ; ............ : .• 8-3
A-M/F-M Signal Processing System ... : ............... : . ; • .. 6-22
A-M/F-M Signal Processing System. . . . . . . . . . . . . . . . . . • . . . . .. 6-29
(TDAI090) A-M/F-M Signal Processing System . . . . . . . . . . . . . . ... 6-36
Mixer/l-F for F-M Radios ........•....•.• , . . . . . . . . . .. . . .. 6-44
Phase-Locked Loop Stereo Decoder . . . . . . . • . . . . • . . . . . . . . . . •. 6-49
A-M Radio System .......... , ............... ; ....... '" 6-52
1-2
GENERAL INFORMATION (Continued)
ULN-2260A
ULN-2261A
ULN-2270B and 2270Q
ULN-2280B
ULN-2283B and 2283B-1
ULN-2290B and 2290Q
ULN-2350C and 2351C
ULN-2401A
ULN-2429A
ULN-2430M
TPQ-2483 and 2484
UDN-2540B
UDN-2580A through 2588A
UDN-2595A
ULN-2801A through 2815A
ULS-2801H through 2815H
ULQ-2801R through 2815R
ULN-2821A through 2825A
ULS-2821H through 2825H
UDN-2841B through 2846B
UTN-2886B and 2888A
TPQ-2906 and 2907
UDN-2949Z
UDN-2952B and 2952W
UDN-2956A and 2957A
UDQc2956R and 2957R
UDN-2981A through 2984A
UDS-2981H through 2984H
TPP-3000
UGN-3013TIU
UGN/UGS-3019T/U
UGN/UGS-3020T/U
UGN/UGS-3030T/U
UGN-3040T/U
UGN/UGS-3075T/U
UGN/UGS-3076T/U
UGN-3201M and 3203M
UGN-3220S
ULN-3304M
ULN-3305M
ULN-3306M
ULN-3330Y
UGN-3501M
UGN-350lT/U
UGN-3604M and 3605M
UDN-3611M through 3614M
UDS-3611H through 3614H
AGC, Sync, and Scan Processor ...........................
Luminance Processor. . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . ..
(TDAl170) Vertical Deflection System .......................
Audio Power Amplifier ....... , . . . . . . . . . . . . . . . . . . . . . . . . ..
Low-Power Audio Amplifier ....................... ; . . . . . ..
(TDA3190 and TDA1190Z) 4-Watt TV Sound Channel ............
Tuff Chip Semi-Custom Circuits .. ' .........................
Lamp Monitor . ; ......................................
Fluid Detector ........................................
Timer ..............................................
Quad NPN Transistor Arrays ..............................
Quad NAND Power Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
8-Channel High-Current Source Drivers. . . . . . . . . . . . . . . . . . . . ..
8-Channel Medium-Current Sink Driver. . . . . . . . . . . . . . . . . . . . ..
High-Current Darlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . ..
Hermetic High-Current Darlington Drivers ....................
Hermetic High-Current Darlington Drivers ....................
High-Current, 95 V Darlington Drivers . . . . . . . . . . . .. . . .. . . . . ..
Hermetic 95 V Darlington Drivers ..........................
Quad 1.5 A Darlington Drivers ............................
SCR Arrays .................•
Quad PNP Transistor Arrays ..............................
High-Current, Half-Bridge Motor Driver ........ ;.............
Full-Bridge Motor Drivers .............. , . . . . . . . . . . . . . .. ..
High-Current-Source Drivers ............................._.
Hermetic HighcCurrent Source Drivers. . . . . . . . . . . . . . . . . . .•. . ..
High-Current Source Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . .•..
Hermetic High·CUrrent Source Drivers. . . . . . . . . . . . . . . . . . . . . ..
Triple Medium-Power Darlington Switch ................. __ ..
UltraLow-Cost Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . . . . ..
Low-Cost Digital Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . . ..
Low-Cost Digital Hall Effect Switch ........................
Bipolar Digital Hall Effect Switch.. . . . . . . . . . . . . . . . . . . . . . . ..
Ultra-Sensitive Digital Hall Effect Switch ....................
Bipolar Latch .....
Bipolar Latch ..... ;..................................
Dual Output Digital Hall Effect Switches. . . . . . . . . . . . . . . . . . . ..
Dual Output Digital Hall Effect Switch ......................
Schmitt Trigger ., .....................................
Dual Schmitt Trigger .................................. ,
Dual Schmitt Trigger ...................................
Optoelectron ic Switch ..................................
Linear Output Hall EffectSensor ..........................
Linear OutpLlt Hall Effect Sensor ..........................
Hall Effect Sensor Elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Dual Peripheral and Power Drivers .........................
Hermetic Peripheral and Power Drivers ................... : ..
< ••••
1-3
,
•
••
• •
>
•
•
•
•
•
• •
•
•
• •
•
•
• •
•
•
•
•
•
• •
•
••
•
•
• •
•
•
•
•
•
•
•
••
• •
•
•
• •
•
••
7-12
7-15
7-19
8-5
8-11
7-25
11-4
10-18
10-20
10-23
10-48
3-35
3-37
3-44
3-46
5-26
5-26
3-46
5-26
3-57
3-63
10-48
3-66
3-70
3"72
5-36
3-76
5-39
10-47
9-3
9-5
9-7
9-9
9-11
9-2
9-2
9-14
9-17
10-26
10-29
10-31
10-34
9-19
9-22
9-25
3-83
5-44
GENERAL IN FORMATION. (Continoed)
UlN-3701Z
ULN-3702Z
ULN-3703Z
TPQ-3724 through 3725A
ULX-3777W
ULX-3788W
TPQ-3798 and 3799
ULX-3804A
ULN-3809A
ULN-3810A
ULX-3840A
ULN-3859A
UlN-3889A
TPQ-3904
TPQ-3906
UlN-3914A
TPP-4000
UCN-4202A
TPQ-4258 and 4354
UCN-4401A and 4801A
UCS-4401H. and 4801H
UCN-4805A and 4806A
UCN-4810A
UCN-4815A
UCN-4821A through 4823A
TPQ-5400 through 5551
UDN-5703A through 5707A
UDS-5703H through 5707H
UDN-5711M through 5714M
UDS-5711H through 5714H
UDN-5733M
UDS-5733H
UDS-5790H and 5791H
TPQ-6001 through 6100A
UDN-6116A through 6128A-2
UDN-6116R through 6128R-2
UDN-6138A through 6148A-2
UDN-6l6~A and 6184A
TPQ-6OO1 through 6700
UDN-7180A through 7186A
ULN-8126A
UlN-8126R
ULQ-8126A
ULQ-8126R
UlS-8126R
ULN-8160A
UlN-8160R
UlS-8160R
ULX-8161M
(TDA2002) 5- to 10-Watt Audio Power Amplifier ............... 8-19
(TDA2002A) 12-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . .. 8-22
(TDA2003) 10-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . .. 8-27
Quad NPN Transistor Arrays. , ............................ 10-48
Dual 10-Watt Audio Power Amplifier. . . . . . . . . . . . . .. . . . . . . . .. 8-29
20-Watt BTL Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . .. 8-31
Quad PNP Transistor Arrays .............................. 10-48
A"M/F-M Signal Processor ............................... 6-57
Phase-locked Loop Stereo Decoder ............... , . . . . . . . .. 6-63
Phase-locked Loop Stereo Decoder . . . . . . . . . . . . . . . . . . . . . . . .. 6-66
A-M/F-M Signal Processing System . . . . . . . . . . . . . . . . . . . . . . . .. 6-69
Low-Power, Narrow-Band F-M I-F ....................... ;.. 6-76
(TDA3189) I-F System for F-M Receivers. . . . . . . . . . . . . . . . . . . .. 6-79
Quad NPN Transistor Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-48
Quad ,PNP Transistor Array ............................... 10-48
Chroma/luma Processor ....•........................... 7c32
Medium-Power Quad Darlington Array ....................... 10-47
Stepper Motor Translator/Driver ......................... ;. 4-2
Quad PNP Transistor Arrays ........................ " .... 10-48
BiMOS Latch/Drivers ................................... 4-9
Hermetic BiMOS latched Drivers .......................... 5-48
BiMOS latched Decoder/Drivers ........................... 4-12
lO-Bit Serial-In, Latched Driver ........................... 4-16
BiMOS Latch/Source Driver. . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. 4-19
8-Bit Serial-In, latched Drivers ........................... 4-22
Quad Transistor Arrays ................................. 10-48
Quad Peripheral and Power Dri,vers . . . . . . . . . . . . . . . . . . . ... . .. 3-87
Hermetic PeripheraJ and Power Drivers . . . . . . . . . . . . . . . . . . . . .. 5-54
Dual Peri pheral and Power Drivers ......................... 3-91
Hermetic Peripheral. and. Power Drivers ...................... 5-60
Quad NOR Peripheral and Power Driver. . . . . . . . . . . . . . . . . . . . .. 3-90
Hermetic Peripheral and Power Driver. . . . . . . . . . . . . . . . . . . . . .. 5-59
Hermetic Quad PIN Diode Drivers .......................... 5-66
Dual Complementary-Pair Transistor Arrays ................... 10-48
Fluorescent Display Drivers ...................... ... . . . .. 2-10
Hermetic Fluorescent Display Drivers ....................... 2-10
Fluorescent Display Drivers .............................. 2-10
Gas-Discharge Display DigitDrivers ........................ 2.-14
Dual Complementary~Pair Transistor Arrays .................. , 10-48
GascDischarge Display SegmentDrivers ..................... 2-16
Switched-Mode Power Supply Controller ..................... 10-37
(SG3526J) Hermetic SMPS Controller ........................ 10-37
Switched-Mode PowerSupply Controller ..................... 10-37
(SG2526J) Hermetic SMPS Controller ........................ 10"37
(SG1526J) Hermetic SMPS Controller ........................ .10-37
(NE5560N) Switched-Mode Power Supply Controller ............. 10-42
(NE5560F) Hermetic SMPS Controller ....................... 10-42
(SG5560F) Hermetic SMPS Controller ....................... 10-42
(NE5561N) Switched-Mode .flower Supply Controller ....... , . . . . .. 10-45
1-4
GENERAL fNFORMATION (Continued)
Sprague Part Numbering Systems
D
UL
N - 2046
A- 1
l.·
---.---.---_INSTRUCTIONS.
1 = SELECTED VERSION, SEE DETAIL SPECIFICATIONS
BU = BURNED-IN PARTS TO DOUBLE-DEUCE PROGRAM
. ,MIL = MILITARY GRADE WITH SCREENING TO MIL"STD-883,
CLASS B (PACKAGES H, J, AND R ONLY)
'------..,..,;..; PAC~GE .DESIGNATION.
A = PLASTIC, 14- THROUGH 2S-PIN DUAL IN-LINE
B = PLASTIC, 14- OR IS-PIN WEBBED DUAL IN-LINE
C.= UN PACKAGED CHIP
, CW = PROBED WAFER
H = GLASS/METAL HERMETIC, S- THROUGH IS-PIN .DUAL IN-LINE
J = GLASS/METAL HERMETIC, 1HIN FLAT PACK
.M :" PLASTIC, 8-PIN ,DUAL IN-LINE
P = DIRECTLY REPLACED BY B PACKAGE
Q = PLASTIC, 16-PIN QUAD IN-LINE
R = CERAMIC/GLASS HERMETIC, 14- THROUGH 18-PIN DUAL IN-LINE
S = PLASTIC, HEAD SINGLE IN-LINE
T = PLASTIC, 3-LEAD SINGLE IN-LINE
U = PLASTIC, HEAD THIN SINGLE IN-LINE
W = PLASTIC, 12-LEAD SINGLE IN-LINE POWER TAB
Y = PLASTIC, 3-LEAD (T0-92)
Z = PLASTIC, 5-LEAD SINGLE IN-LINE POWER TAB (T0-220l
ZH = Z PACKAGE WITH FORMED LEADS FOR HORIZ. MOUNT
ZV = Z PACKAGE WITH FORMED LEADS FOR VERT. MOUNT
' - - - - - - - DEVICE TYPE (FOUR DIGITS) .
.....----OPERATING AMBIENT TEMPERATURE RANGE.
N = COMMERCIAL/INDUSTRIAL, SEE DETAIL SPECIFICATIONS
Qc=,EXTENDED (-40°C TO +85°C)
S = FULLMIUTARY (-SSOC TO +125°C)
X = SPECIAL SIGNIFIER FOR PRE-PRODUCTION DEVICES
.....----FAMILy (UC, UD, UG, UL, OR
un,
1-5
GENERAL INFORMATION (Continued}
Sprague Part Numberi,ng Systems
UH
D - 4DD -
l1------_____
,NsTRUCTIONs.
I = SELECTED VERSION, SEE DETAil SPECIFICATIONS
Mil = MILITARY GRADE WITH SCREENING TO Mll-STD-883,
CLASS B (PACKAGES C AND D ONLY)
L...-o.---...,.--------_ _ _ _ DEVICE TYPE (THREE DIGITS).
'--------------'-'---PACKAGE,DESIGNATION.
C = GLASS/METAL HERMETIC, 14-PIN FLAT PACK
D = GLASS/METAL HERMETIC, 14 OR 16-PIN DUAL IN-LINE
K = UNPACKAGED CHIP OR PROBED WAFER
P = PLASTIC, 14-, 16-, OR 18-PIN DUAL IN-LINE
' - - - - - - - - - - - - - - - - - - F A M I L Y (UH ONLY)
00
TPP -
T1..._ _--,-_ _ _ _--,-_ _ _ _ _ DEVICE TYPE (FOUR DIGITS OR FOUR DIGITS AND lEDER)
L...-o.--------------....,.-FAMILY.
TPP = DARLINGTON ARRAY
TPQ = QUAD TRANSISTOR ARRAY
1-6
GENERAL INFORMATION (Continued)
CROSS-REFERENCE in Numerical Order
o
The suggested Sprague replacement devices are based on similarity as
shown in currently published data. Exact replacement in all applications is
not guaranteed and the user should compare the specifications of the
competitive and recommended Sprague replacement.
Mfr. Abbreviations:
CS
DI
EXR
FER
FSC
GE
HIT
ITT
MIT
MOT
NEC
NS
OKI
PE
PLS
RCA
RFA
SANY
SG
SIG
SGS
SPC
SPR
TI
TLF
TOKO
TOS
Cherry Semiconductor
Dionics, Inc.
Exar Integrated Systems
Ferranti limited
Fairchild Semiconductor
General Electric*
Hitachi Ltd.
ITT Semiconductors
Mitsubishi Electric Corp.
Motorola Semiconductor
Nippon Electric Co.
National Semiconductor
Oki Semiconductor
Pro-Electron :j:
Plessey Semiconductor
RCA
Rifa
Sanyo
Silicon General Inc.
Signetics Gorp.
SGS/ATES
Sprague Products Co. *
Sprague Electric Co.
Texas Instru ments
AEG-Telefunken
RCL Toko
Toshiba Corp.
Com petitive
Part
Number
Mfr.
Suggested
Sprague
Replacement
CA758E
CA1190E
CAl190Q
CA1310E
CA1391E
CA1394E
CA1398E
CA2002
CA2002M
CA2004
CA2004M
CA21l1AE
CA2136AE
CA3045
CA3045F
CA3046
CA3054
CA3064E
CA3065
CA3066
CA3067
CA3070
CA3071
CA3072
CA3075
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
ULX-3811A§
UlN-2290B
ULN-2290Q
ULN-3810A
ULN-2291M*
ULN-2294M*
ULN-2298A*
ULN-3701Z
ULN-3701ZH
ULN-3702Z
ULN-3702ZH
ULN-2I11A
ULN-2136A
ULS-2045H
ULS-2045H
ULN-2046A
ULN-2054A
ULN-2264A*
ULN-2165A*
ULN-2266A*
ULN-2267A*
ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2129A*
*European registration; manufactured by various companies including ITT, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
~Sprague device includes internal pUll-down resistors.
"No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation .
1-7
~/
.
GENERALINF-oRMATION(Continued)
Competitive
Part
Number
CA3081E
CA3082E
CA3083E
CA3086
CA3089E
CA3120E
CA3121E
CA3123E
CA3126Q
CA3135G
CA3146E
CA3153G
CA3170E
CA3172G
CA3183AE
CA3183E
CA3189E
CA3195
CA10806A
CS102
CS122
CS166
DI302
01502
01507
01509
01510
01512
01514
OS3611N
OS3612N
OS3613N
OS3614N
OVR-01
HA1137W
HA1156W
Mlr.
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
CS
CS
CS
DI
01
01
Suggested
Sprague
Replacement
Competitive
Part
Number
ULN-2081A
ULN-2082A
ULN-2083A
ULN-2086A
ULN-2289A
ULN-2125A*
ULN-2269A*
ULN-2137A*
ULN-2262A*
ULN-2261A
ULN-2046A-1
ULN-2297A*
ULN-2268A*
ULN-2229A*
ULN-2083A-1
ULN-2083A-1
ULN-3889A
ULN-2245A
ULN-3914A
ULN-3304M
ULN-3306M
ULN-2429A
UON-7183A
UON-6144A t*
HA1199
HA1364
HAl377A
HA1388
HA12402
1TI512
1TI552
1TI554
1TI556
1TT652
1TT654
1TT656
1TT3064
1TT3065
KB4402
KB4409
L119
U80
L201
L202
L203
L204
L601
L602
L603
L604
LA705PC
LA758PC
LA1160
LAl230
LA1364
LAl368
LA1369
LA3045
LA3046
LA3086
UON-6116A-1~
DI
UON~6116A-2~
DI
DI
01
NS
NS
NS
NS
UON-651OA§
UON-6118A-1 ~
HIT
HIT
UONc6118A-2~
UON-36l1M
UON-3612M
UON-3613M
UON-3614M
UHP-480
ULN-2289A*
ULN-3810A-1
Mlr.
HIT
HIT
HIT
HIT
HIT
ITT
ITT
ITT
ITT
ITT
ITT
ITT
ITT
ITT
TOKO
TOKO
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
*European registration; manufactured by various companies including In, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
~Sprague device includes internal pull-down resistors.
"No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
1-8
Suggested
Sprague
Replacement
ULN-2249A
ULN-2290Q
ULX-3777W
ULX-3788W
ULN-2204A
UHP-491
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2264A*
ULN-2165A*
ULN-2289A
ULN-3810A
ULX-3908Q*
ULX-380W*
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-2821A
ULN-2822A
ULN-2823A
ULN-2824A
ULX-3811A§
ULX-3811A§
ULN-2243A
ULN-2289A*
ULN-2264A*
ULN-2298A*
ULN-2224A
ULS-2045H
ULN-2046A
ULN-2086A
GENERAtlNFORMATION (Continued)
Competitive
Part
Number
LA3089
LA3301
LA3350
LM377N
LM378N
LM380N
LM383AT
LM383T
LM384N
LM746N
LM1304
LM1305
LM1307N
LM1310N
LM1391N
LM1394N
LM1800N
LM1820N
LM1827N
LM1828N
LM1829N
LM1841N
LM1848N
LM1877N
LM2002T
LM2002AT
LM2!11N
LM2113N
LM3045D
lM3046N
lM3053N
LM3054N
lM3064N
lM3065N
LM3066N
lM3067N
Mlr.
Suggested
Sprague
Replacement
Competitive
Part
Number
Mlr.
Suggested
Sprague
Replacement
SANY
SANY
SANY
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
ULN-2289A*
ULN-3810A-1
ULN-38lOA
ULN-2274B*
ULN-2278B-l*
ULN-2280B
ULN-3702Z
ULN-3701Z
ULN-2281B*
ULN-2228A*
ULN-2120A *
ULN-2122A*
ULN-2128A*
ULN-3810A-1
ULN-2291M*
ULN-2294M*
ULX-381lM
ULN-2137A*
ULN-2224A
ULN-2228A*
ULX-2262A*
ULN-2136A
ULN-2229A*
ULN-2274B*
ULN-3701Z
ULN-3702Z
ULN-2111A
ULN-21l1A
UlS-2045H
ULN-2046A
ULN-2209M*
UlN-2054A
ULN-2264A*
ULN-2165A*
ULN-2266A*
UlN-2267A*
LM3070N
LM3071N
LM3072N
LM3075N
LM3086N
LM3089N
LM3611N
LM3612N
LM3613N
LM3614N
M54523
M54524P
M54525P
M54526P
M54532P
M54562P
M54563P
MC1304
MC1305
MC1307P
MC1309
MC1310P
MC1310EP
MC131lP
MC1320P
MC1324P
MC1326P
MC1327P
MC1328P
MC1329P
MC1339P
MC1344P
MC1356P
MC1357P
MC1358P
MC1364P
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
MIT
MIT
MIT
MIT
MIT
MIT
MIT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2129A*
ULN-2086A
ULN-2289A*
UDN-3611M
UDN-3612M
UDN-3613M
UDN-3614M
ULN-2003A
ULN-2001A
ULN-2002A
ULN-2004A
ULN-2064B
UDN-2982A
UDN-2981A
ULN-2120A*
ULN-2122A*
ULN-2128A*
ULN-3809A
ULN-381DA
ULN-3810A
ULX-3811A§
ULN-2137A*
ULN-2224A
UlN-2226A*
UlN-2217A*
ULN-2228A*
ULN-2229A*
UlN-21Z6A*
ULX-3811M
ULN-2136A
ULN-211lA
ULN-2165A*
ULN-2264A*
*European registration; manufactured by various cornpanies including ITT, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
IISprague device includes internal pull-down resistors.
"No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
1-9
0
GENERAL· INFORMATION (Continued)
Competitive
Part
Number
MC1370P
MC137lP
MC1375P
MC1389P
MC1391P
MC1394P
MC1398P
MCI411L
MCI411P
MC1412L
MC1412P
MC14l3L
MC1413P
MCI413TP
MC1416L
MC1416P
MC1417P
MCl471Pl
MCI472Pl
MC1473Pl
MC1474Pl
MC3346
MC3386P
MFC4050
ML3045
ML3046
ML3086
MSL912R
N2211A
N2212A
N5065A
N5070B
N5071A
N5072A
N5111A
NA30S6
Mfr.
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
OKI
SIG
SIG
SIG
SIG
SIG
SIG
SIG
Suggested
Sprague
Replacement
Competitive
Part
Number
ULN-2124A*
ULN-2127A*
ULN-2129A*
ULN-2289A*
ULN-2291M*
ULN-2294M*
ULN-2298A*
ULN-2001R§
ULN-2001A
ULN-2002R§
ULN-2002A
ULN-2003R§
ULN-2003A
ULQ-2003A§
ULN-2004R§
ULN-2004A
UDN-2580A
UDN-57l1M
UDN-5712M
UDN-5713M
UDN-5714M
ULN-2046A
ULN-2086A
ULN-2135E*
ULS-2045H
ULN-2046A
ULN-20S6A
UDN-611SA-2
ULN-2211B
ULN-2212B*
ULN-2165A*
ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2111A
ULN-2086A
NE5501N
NE5502N
NE5503N
NE5504N
NE5560F
NE5560N
NE5561N
NE5601N
NE5602N
NE5603N
NE5604N
PA239
PBD352301J
PBD352301N
PBD352302J
PBD352302N
PBD352303J
PBD352303N
PBD352304J
PBD352304N
PBD352311N
PBD352312N
PBD352313N
PBD352314N
PBD353S0lJ
PBD353802J
PBD353803J
PBD353804J
SA594
SE5560F
SFC2046E
SFC2054EC
SFC2086E
SG1526J
SG200lJ
SG2001N
Mlr.
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
GE
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
SIG
SG
SG
SG
:j:European registration; manufactured by various companies including ITT, SGSJATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Va Ivo.
~Sprague device includes intemal pUll-down resistors.
*No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
1-10
Suggested
Sprague
Replacement
ULN-2021A
ULN-2022A
ULN-2023A
ULN-2024A
ULN-8160R
ULN-SI60A
ULX-8161M
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-2126A*
ULN-2001R§
ULN-2001A
ULN-2004R§
ULN-2004A
ULN-2003R§
ULN-2003A
ULN-2002R§
ULN-2002A
ULN-2021A
ULN-2024A
ULN-2023A
ULN-2022A
ULN-2S01R§
ULN-2S04R§
ULN-2S03R§
ULN-2S02R§
UDN-611SA
ULS-SI60R
ULN-204£A
ULN-2054A
ULN-2086A
ULS-8126R
ULQ-2001R
ULN-2001A
GENERAL INFORMATION (Continued)
Competitive
Part
Number
SG2002J
SG2002N
SG2003J
SG2003N
SG2004J
SG2004N
SG2526J
SG2841N
SG3045J
SG3081N
SG3082N
SG3086N
SG3146N
SG3183N
SG3526J
SG382lJ
SG3821N
SG3822N
SG385lJ
SG3851N
SG3852J
SG3852N
SG3853J
SG3853N
SG3854N
SG3886N
SG6118N
SL3045C
SL3046C
SL3054
SL3081C
SL3082C
SL3083E
SL3086
SL3145E
SL3146E
Mfr.
Suggested
Sprague
Replacement
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
PLS
PLS
PLS
PLS
PLS
PLS
PLS
PLS
PLS
ULQ-2002R
ULN-2002A
ULQ-2003R
ULN-2003A
ULQ-2004R
ULN-2004A
ULQ-8126R
UDN-28418
ULS-2045H
ULN-2081A
ULN-2082A
ULN-2086A
ULN-2046A-l
ULN-2083A-l
ULN-8126R
ULS-2045H
ULN-2046A
ULN-2054A
ULQ-2011R
ULN-2021A
ULQ-2012R
ULN-2022A
ULQ-2013R
ULN-2023A
ULN-2024A
ULN-2086A
UDN-6118A
ULS-2045H
ULN-2046A
ULN-2054A
ULN-2081A
ULN-2082A
ULN-2083A
ULN-2086A
ULS-2045H
ULN-2046A-1
Com petitive
Part
Number
SL3183E
SN75064NE
SN75065NE
SN75066NE
SN75067NE
SN75068NE
SN75069NE
SN75074NE
SN75075NE
SN75437ND
SN75466J
SN75466N
SN75467J
SN75467N
SN75468J
SN75468N
SN75469J
SN75469N
SN75471P
SN75472P
SN75473P
SN75474P
SN75476P
SN75477P
SN75478P
SN75479P
SN76104N
SN76105N
SN76110N
SN76111N
SN76113N
SN76115N
SN76116N
SN76130N
SN76177ND
SN76226N
Mfr.
PLS
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
tEuropean registration; manufactured by various companies inc/uding ITT, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
1ISprague device inc/udes internal pull-down resistors.
"No longer manufactured - listed for reference nnly.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
1-11
Suggested
Sprague
Replacement
ULN-2083A-l
ULN-20648
ULN-20658
ULN-20668
ULN-20678
ULN-20688
ULN-20698
ULN-20748
ULN-2075B
UDN-25418§
ULN-2021R§
ULN-2021A
ULN-2022R§
ULN-2022A
ULN-2023R§
ULN-2023A
ULN-2024R§
ULN-2024A
UDN-3611Mt
UDN-3612Mt
UDN-3613Mt
UDN-3614Mt
UDN-571lMt
UDN-5712Mt
UDN-5713Mt
UDN-5714Mt
ULN-2120A*
ULN-2122A*
ULN-2128A*
ULN-2121A*
ULN-2128A*
ULN-3810A
ULX-3811A§
ULN-2126A*
ULN-22788*
ULN-2216A*
0
·GENERAL INFORMATION ((ontinued)
Competitive
Part
Number
SN76227N
SN76228N
SN76242N
SN76243AN
SN76246N
SN76266N
SN76267N
SN76298N
SN76564N
SN76565N
SN76591P
SN76594P
SN76635N
SN76642N
SN76643N
SN76665N
SN76669N
SN76675N
SN76678P
SN76688ND
SN76689N
SN76883N
TA7070P
TA7103P
TA7141AP
TA7157P
TA7613P
TAA930
TBA395
TBA396
TCA3089
TCA3189
TD62001P
TD62002P
TD62003P
TD62Q04P
TD62064P
Mfr.
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TOS
TOS
TOS
TOS
TOS
PE:j:
PE:j:
TOS
TOS
TOS
TOS
TOS
Suggested
Sprague
Replacement
ULN-2217A*
ULN-2218A*
ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2266A*
ULN-2267A*
ULN-2298A*
ULN-2264A*
ULN-2264A*
ULN-2291M*
ULN-2294M*
ULN-2137A*
ULN-2l11A
ULN-2111A
ULN-2165A*
ULN-2136A
ULN-2129A*
ULN-2209M*
ULN-22l1B
ULN-2289A*
ULX-2230A*
ULN-2264A*
ULN-2224A
ULN-2217A*
ULN-3810A
ULN-2204A
ULN-2l11A
ULN-2218A*
ULN-2219A*
ULN-2289A*
ULN-3889A
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-2064B
Competitive
Part
Number
TD62074P
TD62101P
TD62103P
TD62104P
TD62705P
TDA1060
TDA1083
TDA1090
TDA1170
TDA1190
TDA1190P
TDA1190Z
TDA1200
TDA1230
TDA1327
TDA2002
TDA2002A
TDA2002H
TDA2002V
TDA2003H
TDA2003V
TDA3189
TDA3190
TDA3190P
TDA3950A
TVCM-1
TVCM-2
TVCM-3
TVCM-4
TVCM-5
TVCM-6
TVCM-7
TVCM-8
TVCM-9
TVCM-10
TVCM-ll
TVCM-12
Mfr.
TOS
TOS
TOS
TOS
TOS
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
D~+
'L.,.
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
PE:j:
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
:l=European registration; manufactured by various companies including ITT, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
~Sprague device includes internal pull-down resistors.
"No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
ind uctive loads.
§Sprague engineering bulletin in preparation.
1-12
Suggested
Sprague
Replacement
ULN-2074B
ULN-2001A
ULN-2003A
ULN-2004A
UHP-491
ULN-8160A
ULN-2204A
ULN-2242A
ULN-22700
ULX-39080*
ULN-2290B
ULN-22900
ULN-2289A*
ULX-3801Q*
ULN-2217A*
ULN-3701Z
ULN-3702Z
ULN-3701ZH
ULN-3701ZV
ULN-3703ZH
ULN-3703ZV
ULN-3889A
ULN-2290B
ULN-2290B
ULN-2220A*
ULN-2l14W*
ULN-2114A*
ULN-2114K*
ULN-2111A
ULN-2111A
ULN-2120A*
ULN-2122A*
ULN-2124A*
ULN-2127A*
ULN-2128A*
ULN-2165A*
ULN-2121A*
GENERAL INFORMATION (Continued)
Competitive
Part
Number
TVCM-13
TVCM-14
TVCM-15
TVCM-16
TVCM-17
TVCM-18
TVCM-19
TVCM-20
TVCM-21
TVCM-22
TVCM-23
TVCM-24
TVCM-25
TVCM-26
TVCM-27
TVCM-28
TVCM~29
TVCM-30
TVCM-33
TVCM-34
TVCM-35
TVCM-36
TVCM-37
TVCM-38
TVCM-39
TVCM-40
TVCM-62
TVCM-65
TVCM-66
TVCM-67
TVCM-68
TVCM-73
U417B
UA704PC
UA705PC
UA720PC
UA729PC
UA732PC
UA737EC
UA739PC
Mfr.
Suggested
Sprague
Replacement
Competitive
Part
Number
Mfr.
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
TlF
FSC
FSC
FSC
FSC
FSC
FSC
FSC
ULN-2126A*
UlN-2131M*
ULN-2125A*
ULN-2129A*
ULN-2135E*
ULN-2136A
ULN-2137A*
UlN-2209M*
UlN-2224A
ULN-2228A*
UlN-2274B*
UlN-2276P*
UlN-2278B*
UlN-2278B*
ULN-2298A*
ULN-2211B
UlX-3811A§
UlN-2264A*
ULN-2267A*
UlN-2269A*
ULN-2280B
ULN-2281B*
UlN-2285A*
UlN-2285P*
UlN-2289A*
ULN-2298A*
ULX-3811A§
UlN-2278B*
UlN-2046A
UlN-2054A
UlN-220BM*
UlN-3810A
UlN-2289A*
UlN-22J1B
UlX-3811A§
UlN-2137A*
UlN-2122A*
UlN-2120A*
UlN-2114K*
UlN-2126A*
UA746PC
UA753TC
UA758PC
UA767PC
UA780PC
UA781PC
UA787PC
UA139ITC
UA1394TC
UA2136PC
UA3045DM
UA3046PC
UA3054PC
UA3064PC
UA3065PC
UA3075PC
UA3066PC
UA3067PC
UA3086PC
UA3089PC
UA7327
UCN4810N
UDN2841NE
UDN2845NE
UDN5711N
UDN5712N
UDN5713N
UDN5714N
UDN-6164A
UDN-6184A
UGN-3600M
UGN-3601M
UlN2001AJ
UlN2001AN
UlN2002AJ
UlN2002AN
UlN2003AJ
UlN2003AN
UlN2004AJ
UlN2004AN
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
TI
TI
TI
TI
TI
TI
TI
SPR
SPR
SPR
SPR
TI
TI
TI
TI
TI
TI
TI
TI
Suggested
Sprague
Replacement
UlN-2228A*
ULN-2209M*
UlX-3811A§
ULN-2128A*
ULN-2124A*
UlN-2127A*
UlN-2262A*
ULN-2291M*
UlN-2294M*
ULN-2136A
UlS-2045H
ULN-2046A
UlN-2054A
UlN-2264A*
ULN-2165A*
ULN-2129A*
UlN-2266A"
UlN-2267A*
ULN-2086A
ULN-2289A*
ULN-2270B
UCN-4810A
UDN-2841B
UDN-2845B
UDN-5711M
UDN-5712M
UDN·5713M
0
UDN~5714M
UDN-6116A-l
UDN-6118A-l
UGN-3604M
UGN-3605M
UlN-20QIR§
ULN-2001A
UlN-2002R§
ULN-2002A
UlN-2003R§
UlN-2003A
UlN-2004R§
UlN-2004A,
*European registration; manufactured by various companies including ITT, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
~Sprague device includes internal pull-down resistors.
"No longer manufactured - listed for reference only.
tSome differences in specified switching speed with the Sprague -device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
, _______"_-=-_____ J
GENERALINF6RMA'fI6N{ Continued}
Co mpetitive
Part
Numller
ULN2005AJ
ULN2005AN
ULN2064NE
ULN2065NE
ULN2066NE
ULN2067NE
ULN2068
ULN2068NE
ULN2069NE
ULN2074NE
ULN2075NE
ULN-2110A
UlN-2113A
ULN-21l4A
ULN-2209V
ULN-2210A
ULN-2225P
ULN-2226A
ULN-2244A
ULN-2275P
ULN-2277P
ULN~2287A
ULN-2301M
ULN-3006M
ULN-3006T
ULN-3007M
ULN-3008M
ULN-3008T
ULN-3100M
ULN-3101M
ULN-3330Y-2
ULN~3905A
ULS-3006T
UPA2001C
UPA2002C
UPA2003C
UPA2004C
XRl3l0CP
XR1800P
Mfr.
TI
TI
TI
TI
TI
TI
MOT
TI
TI
TI
TI
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
NEC
NEC
NEC
NEC
EXR
EXR
Suggested
Sprague
Replacement
ULN-2005R§
ULN-2005A
ULN-2064B
ULN-2065B
ULN-2066B
ULN-2067B
ULN-2068B
ULN-2068B.
ULN-2069B
ULN-2074B
ULN-2075B
ULN-3810A
ULN-21llA
ULN-2228A*
ULN-2209M*
ULN-3810A
ULN-2211B
ULN-2224A
ULX-3811A§
ULN-2274B*
ULN-2278B*
ULN-2289A*
ULN-2300M*
UGN-3201M
UGN-30l9T
UGN-3203M
UGN-3501M
UGN-350lT
UGN-3604M
UGN-3605M
ULN-3330Y
ULN:3914A
UGSc3019T
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-381OA
ULX-3811A§
Competitive
Part
Number
XR2001CN
XR2001P
XR2002CN
XR2002P
XR2003CN
XR2003P
XR2004CN
XR2004P
XR2011CN
XR2011CP
XR2012CN
XR2012CP
XR2013CN
XR2013CP
XR2014CN
XR2014CP
XR2201CP
XR2202CP
XR2203CP
XR2204CP
XR2205CP
XR6118P
XR6128P
ZN1060
512
552
554
556
652
654
656
9665DC
9665PC
9666DC
9666PC
9667DC
9667PC
9668DC
9668PC
Mfr.
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXT
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
FER
In
In
In
In
In
In
In
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
:j:European registration; manufactured by various companies. including lIT, .SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, & Valvo.
~Sprague device includes internal pull-down resistors.
"No longer manufactured - listed for reference only.
tSorne differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.
1-14
Suggested
Sprague
Replacement
ULN-2001R§
ULQ-2001A§
ULN-2002R§
ULQ-2002A§
ULN-2003R§
ULQ-2003A§
ULN-2004R§
ULQ-2004A§
ULN-2011R§
ULN-2011A
ULN-2012R§
ULN-2012A
ULN-2013R§
ULN-2013A
ULN-2014R§
ULN-2014A
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-2005A
UDN-6118A
UDN-6128A
ULN-8160A
UHP-491
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2001A
ULN~2002A
ULN-2003A
ULN-2001R§
ULN-2001A
ULN-2002R§
ULN-2002A
ULN-2003R§
ULN-2003A
ULN-2004R§
ULN-2004A
GENERAL INFORMATION (Continued)
HOW TO ORDER
TOery,PLACE
AN ORDER, obtain price and delivor request additional technical literature,
call or write your local sales office (see inside back
cover) or:
From U.S.A. Sprague Electric Co.
Marsh,dl Street
North Adams, MA 01247
413-664-4411
From Asia
Sprague World Trade Corp.
G.P.O .. Box 4289
EastetnBranch, Hong Kong
5-626231-4
FromEu{ope Sprague World Trade Corp.
CasePostale 436
1215 Geneva Airport 15
Geneva, Switzerland
. 022-98-4021
REQUESTS FOR additional technical information
on standard or custom devices (also see Section
6) may be sent to the appropriate manufacturing
facility:
For all monolithic integrated circuits except Hall
effect devices,
Sprague Electric Co.
115 Northeast Cutoff
Worcester, MA 01606
617-853-5000
For discrete semiconductors and Hall effect devices,
Sprague Electric Co.
70 Pembroke Road
Concord, NH 03301
603-224-1961
1-15
o
GENERAL INFORMATION
SPRAGUE FACILITIES
Sprague Electric Company manufactures active
and passive components in 17 locations in the United
States and in five countries in Europe and the Far
East. Headquarters of the Semiconductor Division is
located in Worcester, Mass. All semiconductor
wafer fabrication is done in the Worcester plant, as
are all services integral to its support. Volume assembly operations are located both in Worcester and
in Manila, Philippines. Marketing and sales offices
and sales representatives are located throughout the
United States and Canada, Latin America, Europe,
Japan, Africa, and the Far East.
INTEGRATED CIRCUIT OPERATIONS, Worcester, Massachusetts
Sprague Electric is a leading manufacturer of volume integrated circuits serving the consumer, industrial controls, and peripherals markets. Production
process technologies include complementary
metal-gate MOS, high-voltage and high-current
pipolar, and high-performance bipolar linear. This
breadth of process technology makes it possible for
Sprague Electric to manufacture optimal costperformance integrated circuits.
Semiconductor Operations
The integrated circuits operation of the Sprague
Electric Semiconductor Division is located in a
modern 115,000-square-foot plant in Worcester,
Mass. Discrete components, such as transistors and
diodes, and Hall effect integrated circuits are manufactured at the division's Concord, N.H., plant,
which occupies some 30,000 square feet of floor
space.
1-16
GENERAL INFORMATION (Continued)
o
monitored for compliance to engineering specifications. Electrical tests are made on 100% of .the
. parts by automatic test systems. Lot sampling assures meeting customer A.Q.L. requirements.
Calibration of test standards and yquipment is performed at,Periodic intervals in order to maip,tain test
accuracy.
How Integrated Circuits are Shipped
Integrated circuits are shipped in one of these
carriers:
A-Channel Anti-Static Plastic Tubing
TO-220 Plastic Magazine.
Individual Plastic Box
Integrated circuit chips are shipped ineifuer unscribed wafedorm or individuaJly partitioned in a
plastic Qox.
Sprague Electric Company conductl! a continuing
reliability assurance program to detect deviations, in
device characteristics. Test samples are takeu.at.random from each lot and are subjected to testing for
performance evaluation and specification compliance. Routinely, finished samples are subjected to
all electrical performance tests. A copy of the quality
control inspection plan used for specific integrated
circuits is available on request.
Quality Control and Reliability ,
All critical points in the manufacturing processes;
of Sprague Electric integrated circuits are carefully
1-17
~,
..... )
GENERAl INFORMA'TION (Continued)
ENGINEERING BULLETINS
The infonnation in this data book is equivalent to the Sprague Engineering Bulletins listed below. If an individual bulletin and this data book are
compared, the latest revision takes precedence. For example, the ULQ2801R, described on page 5-26 (Bulletin 29304.4A), supersedes Bulletin
29304.4, which is presently in print. If that bulletin is revised identical to
this data book, it will receive the 'A ' revision letter. If additional revisions
beyond what appear here are incorporated, the bulletin would then receive a
'B' revision letter.
Part Number
Bulletin Number
UHC/UHD-400 through 433-1
UHP-400 through 433-1
UHP-480 through 482
UHD/UHP-490 and 491
UHP-495
UHC/UHD-500 through 533
UHP-500 th rough 533
TPP-I000 and 2000
UlN-2001A through 2015A
UlS-2001H through 2015H
UlO-2001R through 2015R
UlN-2021A through 2025A
UlS-2021H through 2025H
UlN-2031A through 2033A
UlS-2045H
UlN-2046A
UlN-2046A-l
UlN-2047A
UlN-2054A
UlN-2061M and 2062M
UlN-2064B through 2077B
UlS-2064H through 2077H
UlN-2081A and 2082A
UlN-2083A
UlN-2083A-l
UlS-2083H
ULN-2086A
UlN-2111A
ULN-2136A
UlN-2140A
UlS-2140H
UlN-2204A
UlN-2211B
TPO-2221 and 2222
29300.l
29300B
29301C
29302
29303A
29300.l
29300B
29714
29304B
29304.lB
29304.1B
29304B
29304.1B
29710A
29707
29707
3P
2P
2P
2P
29712
29708A
29305B
29305B
29305.1
29709
29713
2P
2P
2P
2P
29713
2P
3P
2P
2P
2P
2P
2P
2P
2P
2P
27102E
27102.40B 2P
29015.210A 2P
29015.2lOA 2P
27.121.50A
27110.30B
29711
Part Number
Bulletin Number
ULN-2224A
ULN-2231A
ULN-2240A
ULN-224iA
ULN-2242A
ULN-2243A
UlN-2245A
ULN-2249A
UlN-2260A
UlN-2261A
UlN-2270B and 22700
UlN-2280B
UlN-2283B and 2283B-l
UlN-2290B and 22900
UlN-2350C and 2351C
UlN-2401A
UlN-2429A
ULN-2430M
TPQ-2483 and 2484
UDN-2540B
UDN-2580A through 2588A
UDN-2595A
UlN-2801A through 2815A
UlS-2801H through 2815H
UlQ-2801R through 2815R
UlN-2821A through 2825A
UlS-2821H through 2825H
UDN-2841B through 2846B
UTN-2886B and 2888A
TPQ-2906 and 2907
UON-2949Z
UON c2952B and 2952W
UON-2956A and 2957A
UOQ-2956R and 2957R
27103.12B
27115.20
27121.62
27121.61
2712 l.6 OA
27105.1
27109.101
27121.10
27119.2
27104.10
27124.10
27117.11A
27117.21
27110.32
27405
27460
27461
27462
29711
NOTE: 2P (2nd printing) indicates minor changes and/or corrections not normally affecting device performance.
1-18
29316
29320
29304.3A
29304.4A
29304.4A
29304.3A
29304.4A
29314
29401
29711
29318
29319
29309A
29309.1A
2P
2P
2P
2P
2P
2P
2P
2P
GENERAL INFORMATION (Continued)
ENGINEERING BULLETINS
(Continued)
o
Part Number
8ulletin Number
Part Number
8u IIetin Nu mber
UDN-2981A through 2984A
UDS-298IH through 2984H
TPP-3000
UGH-30I3T
UGN/UGS-3019T
UGN/UGS-3020T
UGN/UGS-3030T
29310A
29310.1
29714
27603A
27601A
27602A
27606
UGN-3201M and 3203M
UGN-3220S
UlN-3304M
UlN-3305M
UlN-3306M
UlN-3330Y
UGN-3501M
UGN-350lT
27604
27605
27450.01
27450.10
27450.12
27480A
27500.1
27500
TPQ-3906
UlN-3914A
TPP-4000
UCN-4202A
UCN-4401A
UCS-4401H
UCN-4801A
UCS-4801H
UCN-4805A an d 4806A
UCN-4810A
UCN-4815A
UCN-4821A through 4823A
29711
27125
29714
26184
26180A
26180.1
26180A
26180.1
26181
26182
26183
26185
27120C
29308
29308.1
27117.31
27117.33
27117.34
29711
27117.60
27117.61
29306
29306.1
29307A
29307.1
29306
29306.1
29315.1
29711
2P
2P
2P
UGN-3604M and 3605M
UDN-3611M through 3614M
UOS-3611H through 3614H
UlN-3701Z
UlN-3702Z
UlN-3703Z
TPQ-3724 through 3725A
UlJ(-3777W
UlX-3788W
UDN-5703A through 5707A
UDS-5703H through 5707H
UON-5711M through 5714M
UDS-5711H through 5714H
UDN-5733M
UDS-5733H
UDS-5790H and 5791H
TPQ-6001 through 6100A
29711
27121.52
27109.112
27109.113
27121.64
27105.10
27102.62
29711
293138
293138
293138
293128
29711
29311A
2P
2P
2P
TPQ-3798 and 3799
UlX-3804A
UlN-3809A
UlN-3810A
UlX-3840A
UlN-3859A
UlN-3889A
TPQ-3904
UDN-6116A through 6128A-2
UDN-6116A through 6128R-2
UDN-6138A through 6148A-2
UDN-6164A and 6184A
TPQ-6501 through 6700
UDN-7180A through 7186A
UlN-8126A and 8126R
UlQ-8126A and 8126R
UlS-8126R
UlN-8160A and 81GOR
UlS-8160R
UlX-8161M
27466.10
27466.10
27466.10
27466
27466
27466.1
2P
2P
2P
2P
2P
NOTE: 2P (2nd printing) indicates minor changes and/or corrections not normally affecting device periormance.
1-19
2P
2P
2P
2P
2P
2P
2P
2P
HIGH-VOLTAGE INTERFACE DRIVERS
II
SECTION 2 Selection Guide
0
0
0
0
0
0
0
HIGH-VOLTAGE INTERFACE DRIVERS
0
0
0
0
0
00
0
0
0
0
0
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
UHP-480 through 482 Gas-Discharge Display Segment Drivers
UHO/UHP-490 and -491 Gas-Discharge Display Digit Drivers
UHP-495 Gas-Discharge Display Digit Driver
UDN-6116A through 6128A-2 Fluorescent Display Drivers
UDN-6116Rthrough 6128R-2 Hermetic Fluorescent Display Drivers
UDN-6138A through 6148A-2 Fluorescent Display Drivers
UDN-6164A and 6184A Gas-Discharge Display Digit Drivers
UDN-7180A through 7186A Gas-Discharge Display Segment Drivers
0
0
0
0
0
0
Application Notes:
A Monolithic IC Series for Gas-Discharge Displays
Trends in IC Interface for Electronic Displays
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000
0
0
0
0
0
0
0
0
0
000
000
0000000
0
0000000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2-2
2-3
2-5
2-8
2-10
2-10
2-10
2-14
2-16
2-22
2-28
2-1
oj
· HIGH-VOLTAGE INTIRFACE DRIVERS
SELECTION GUIDE TO HIGH-VOLTAGE INTERFACE DRIVERS
Device Type
Absolute Maximum Ratings
VOUI
loUT
Outputs
UHP-480
UHP-481
UHP-482
UHD/UHP-490
UHD/UHP-491
UHP-495
UDN-6116A1R
UDN-6116A-1
UDN-6116A1R-2
UDN-6118A/R
UDN-6118A-1
UDN-6118A1R-2
UDN-6126A/R
UDN-6126A-1
UDN-6126A1R-2
UDN-6128A1R
UDN-6128A-1
UDN-6128A1R-2
UDN-6138A
UDN-6138A-2
UDN-6148A
UDN-6148A-2
UDN-6164A
UDN-6184A
UDN-7180A
UDN-7183A
UDN-7184A
UDN-7186A
15 rnA
15 rnA
15 rnA
-30 rnA
-30 rnA
-30 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
20 rnA
3.25 rnA
2.0 rnA
1.0 rnA
Sink 5
Sink 7
Sink 8
Source 5
Source 6
Source 6
Source 6
Source 6
Source 6
Source 8
Source 8
Source 8
Source 6
Source 6
Source 6
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Source 6
Source 8
Sink 8
Sink 8
Sink 8
Sink 8
2-2
130 V
130 V
130 V
-80 V
-80 V
-80 V
85 V
ll5V
65 V
85 V
115 V
65 V
85 V
115 V
65 V
85 V
115 V
65 V
±40 V
±30 V
±40 V
±30V
115 V
115 V
-115 V
-115 V
-115 V
-115 V
SERIES UHP-480
HIGH-VOLTAGE DISPLAY DRIVERS
SERIES UHP·480
HIGH.VOLTAGE DISPLAY DRIVERS
Featur..:
UHP-480
14-Lead Dual In-Line
• Reliable Monolithic Integrated. Construction
• Low-Output Leakage Current
• High-Voltage Output Capability
• Small Size
• 130 Volt Breakdown
Description
SERIES UHP-480 display drivers are bipolar monolithic integrated circuits - high-voltage switches designed for interface
applications between MOS or open-collector TTL logic and gas
discharge displays. They are packaged in industry standard
dual-in-line plastic packages and are available with 5
(UHP-480), 7 (UHP-481), or 8 (UHP"482) switches per
package.
UHP-481
16-Lead Dual In-Line
Applications
Sprague Series UHP-480 drivers may be used with gas
discharge displays, such as Burroughs Panaplex"', Cherry
Plasma-Lux'" and Beckman SP Series devices, intended for use
in the cathode portion of the displays. Applications include
calculators, DVM's, DMM's, DPM's, mini-computers, clocks,
etc. These drivers replace the major portion of discrete components typically required to interface between aMOS
calculator or counter/decoder circuit and a gas discharge
display. Their high reliability and small size make them an excellent choice for applications where space is at a premium.
~~,
0)
Panaplex is a registered trademark of the Burroughs Corporation
Plasma-Lux is a registered trademark of Cherry' Electrical Products Corporation
UHP-482
18-Lead Dual In-Line
ABSOLUTE MAXIMUM RATINGS
Output Voltage.
Output Sink Current.
Input Voltage
Diode Forward Current ..
Package Power Dissipation at +25°C (UHP-480/481) .
(UHP-482) .
Operating Temperature Range.
Storage Temperature Range.
.... 135V
. ......... 10 rnA
.... 30 V
. ............ 30 rnA
. .... 1.00 W*
. .... 1.l4W··
-20°C to +85°C
-65°C to + 150°C
OUTPUT
INPUT
O-----r--.AV'---r-l
EMITTER
'Derate at the rate of 8.0 mW/OC above +25°C.
"Derate at the rate of 9.1 mW/oC above +25°C.
UHP·480, 481 and 482 (I Driver)
2-3
SERIES UHP-48_0
HIGH-VOLTAGE DISPLAY DRIVERS
ELECTRICAL CHARACTERISTICS @ TA - 25°C unless otherwise specified
Characteristic
Output Sink Current
Symbol
Test Cond itions
VIN = 4V, VeE = SV
VIN - SV, VeE - SV
VIN - 6V, VCE - SV
VJt{ - 7V, Vcr - SV
VIN = OV, VeE = 130V
VIN - OV, VCE - l30V, TA - lO°C
VIN - 7V
VIN - ISV
lOUT = S.SmA, VIN = 9V
RL = S6kQ, VCC = 130V
RL - S6kQ, Vec - 130V
lOUT
Output Leakage Current
1m
Input Current
liN
Output Saturation Voltage
Turn-on Delay Time
I urn-ott Delay lime
VCE(SAD
toN
tOFF
Limits
TYD.
Max.
S.5
7.0
-
Min.
2.0
3.0
4.0
S.O
,
-
8.0
-
9.0
0.2
I.S
200
490
1.3
2
2
I.S
IS
3S0
700
2.S
5
S
TYPICAL CLOCK APPLICATION
-=0 r _ £
~
D
u,
Cl..
,-------,
x
0
:I:
~
:I:
11
i!
':l'
-!J
3~
tX~
'---
,
1
I
1____ - ... 1
J:
;;;,
,, ---
,
~
~
,, ,- ----
, ,
I
I
~;,
I
216CK393X9NRA
:I
'1
L
VDD
-' ,-
•
-,
,I
3::g'
NI.
5
Sa
Se
>0
ISE
- 2i6C K393 X9NRA -'
rtr
1>(
--
,' ,,
_I 1_
-50V
,...---
-90V
,
,,
-
~
- - - - -- -,,
"
"
"
~
~i-
~
___
_T~
,
,,
,
-'
~ r--
Cl..
:x:
=>
f-
r--
twa
b -200V
Type 206Cand 216C are single in-line networks
Because af the high Input Impedance of these devices, they
are susceptable to static discharge damage sometimes
associated with handling and testing. Therefore. technique. similar to those used for handling MOS devices should
be employed.
2-4
-40V
:
216CH394X9PM
>,- - -
~
Vss
MOSTEK MK5017
5;,
"- '-=- '-'
-16 to
-Iav
I
,r
J
~
UI
,, ::. ,
I
"g
~~
:x:
=>
D:
-200V
Units
.. rnA
rnA
rnA
rnA
,.,A
~
,..A
,..A
V
1lS
IlS
SERIES 490 and 491
HIGH-VOLTAGE DISPLAY DRIVERS
SERIES 490 and 491
HIGH-VOLTAGE DISPLAY DRIVERS
FEATURES
•
•
•
•
Reliable Monolithic Integrated Construction
Low Output Leakage Currents
High Output Breakdown Voltages
Small Size
Description
The Series 490 and 491 high-voltage display drivers are bipolar monolithic
integrated circuits designed for interfacing MOS or other low-voltage circuitry with high-voltage gas discharge displays or loads. These drivers replace most of the discrete components normally required to drive multiplexed
gas discharge displays from MOS calculator or clock circuits. The Series
490 and 491 high-voltage display drivers are intended for use in the anode
portion of the display and are available with either 5 (Series 490) or 6
(Series 491) drivers per dual in-line package.
Applications
The Series 490 and 491 may be used in a variety of low-VOltage to highvoltage interfacing applications such as are found in MOS calculators, digital
clocks, etc. Their high reliability and small size make them an excellent
choice. for those applications where space is at a premium.
Packages
Package
Part
Number
Drivers/
Package
14·lead Hermetic
Dualln·line
UHD·490
5
14·lead Plastic
Dual In· line
UHP·490
5
16·Lead Hermetic
Dualln·line
UHD·491
6
16·lead Plastic
Dualln·line
UHP·491
6
ABSOLUTE MAXIMUM RATINGS
(referenced to Vss)
Output Voltage .......................................................... -BOV
Output Sou rce Cu rrent.. .................................................. 30mA
Voo Supply Voltage ...................................................... -30V
Input Voltage ........................................................... -30V
Input Diode Forward Current. . . .. . ....................................... 20mA
Operating Temperature Range:
UHP.490, UHP-491 .......................................... -20°C to +85°C
UHD·490, UHD·491. ........................................ -55°C to +125°C
Storage Temperature Range ................................... -65°C to + 150°C
2-5
SERlES _490 and 49J
HIGH~VOLTAGE DISPLAY DRIVERS
ELECTRICAL CHARACTERISTICS @ TA
25°C Vss
=
0 V (unless otherwise specified)
=
Limits
Characteristic
Test Conditions
Min.
....
"1" Input Voltage
,
"0" Input Voltage
-
Voo +6
= Voo +2.5 V, VOUT = -80 V
= Voo +2.5 V, VOUT = . . . 80 V, TA = 70°C
VIN = Voo +6 V, lOUT = 5 rnA
VIN = Voo +6 V, loUT = 15 rnA
VIN = Vss , lOUT = 15 rnA, Voo = -15 V
VIN = Vss , lOUT = 15 rnA, Voo = -15 V
10 = 20 rnA
RL = 4k!1
RL = Ak!1
Output leakage Current
Output Saturation Voltage
Input Current
100 Supply Current
Input Diode Forward Voltage
Turn-on Delay Time
Turn-off Delay Time
Max.
Units
Voo +2.5
V
-
V
VIN
--:'
1.5
VIN
-
15
!LA
!LA
-
2
V
5
V
400
!LA
2
rnA
2
V.
3
5
!LS
-
NC
Voo
NC
Voo
SUBSTRATE
VSS
SUBSTRATE
VSS
0'118.110.10-9302
DWG.IIO .....9303
UHD·490
UHp·490
UHD·491
UHp·491
50K
INPUT
C>-r--NV'--r--I
10K
T
SUBSTRATE
OUTPUT
OI1G.1I0. A-q'j(ll
Series 490 and 491 (1 Driver)
2-6
!LS
OUTPUTS
INPUTS
OUTPUTS
INPUTS
-
SERIES 490 and 491
HIGH-VOLTAGE DISPLAY DRIVERS
TYPICAL
SMAL~ C~LCUt.ATOR
APPLIPATION
II
,
SPRAGUE UHP-490 UHP-491
l
~
~
L
L
..;.
"! )
•
-,....
n.
,
.J.
Lr< J
)
n
SP.RAGUE Z16C
SPRAGUE
SPRAGU~
904C-Q-/900vQ SPRAGUE UHP·480/481
--';:.
.~
DIGITS
,~
SEGMENTS
-t~
JIIOSTEk MK' 5020
r.
r .*
•
~
h
216C
-"-
'4-
......
BURROUGHS PANAPlEX
OR SPERRY SP300 DISPlAY
-"-
",
;i.'
I
...-
'"
.'
'~~y
220K
80K
40K
lOOK
-20DV
DWi. Ito. 8-1'27,f,
-
UHP-495 HIGH-VOLTAGE DISPLAY DRIVER
UHP-495
HIGH-VOLTAGE DISPLAY DRIVER
FEATURES
•
•
•
•
INPUTS
Reliable Monolithic Integrated Construction
Low Output-Leakage Currents
High Output-Breakdown Voltages
14-Pin Dual In-Line Plastic Package
Vss
SUBSTRATE
OWI.1. NO.
THIS MONOLITHIC integrated circuit is
designed for use as an interface between MOS
or other low-voltage circuitry and high-voltage
gas-discharge displays or similar loads.
Type UHP-495 replaces most of the discrete
components normally required to drive
multiplexed gas-discharge displays with MOS
calculator or clock circuits. The high-voltage
bipolar interface is designed for use in the anode
portion of a display. It has six drivers per
package.
2--8
A-9~17A
ABSOLUTE MAXIMUM RATINGS
(Refereneed to Vss )
Output Voltage.
Output Source Current .
Input Voltage.
Input Diode Forward Current ..
Operating Temperature Range.
Storage Temperature Range.
· .-80 V
. ..... -30 rnA
· .-30 V
· .20 rnA
.-20°C to +85°C
.' -65°C to + 150°C
NOTE: Positive (negative) current is defined as current going into (coming
out on the specified device pin.
UHP-49S HIGH-VOLTAGE DISPLAY DRIVER
EI
PARTIAL SCHEMATIC
(One of six drivers)
DIr'G. NO. A-9560B
ELECTRICAL CHARACTERISTICS at TA = +25°C, Vss = 0 V, VSUB= -80 V
(unless otherwise specified)
Limits
Characteristic
Voltage
Current
Output Saturation Voltage
Output leakage Current
Substrate Current
Substrate leakage Current
Diode Forward Voltage
Diode Breakdown Voltage
Turn-on Delay Time
Turn·off Delay Time
Symbol
Input
YIN
I nput
'iN
VwsAn
'm
ISUB
Test Cond itions
'OUT = -15 rnA, YOUT ~ -5 V
VIN - -'12 V'
VIN - ~S V, 'OUT - -15 rnA
Vour = -80 V
VIN = -S V, 'OUT = -1 rnA
Your = 0 V, Vss = open
VF
BV R
IF
tpHL
tpLH
RL
RL
=
20 rnA
Min.
400
-
30
= 6.8
= 6.8
kQ
kQ
-
-
Typ.
Max.
-3.5
SOO
2.0
-S.O
850
5.0
-1.5
-1.5
-1.5
2.0
-
-0.4
I.S
50
3.0
3.0
Units
V
~
V
/-lA
rnA
~
V
-
V
7.0
7.0
/-lS
/-lS
SERIES UDN-6100A and UDN-6100R
FLUORESCENT DISPLAY DRIVERS
-
---
-
-
-
--
SERIES UDN·6100A and UDN·6100R
FLUORESCENT DISPLAY DRIVERS
FEATURES
-Digit or Segment Drivers
-Low Input Current
-Integral Output Pull-Down Resistors
-High Output Breakdown Voltage
-Single or Split Supply Operation
Dwg. Nc.
A~9643A
UDN·6116*
UDN·6126*
CONSISTING of six or eight NPN Darlington output stages and
the associated common-emitter input stages, these drivers are
designed to interface between low-level digital logic and vacuum
fluorescent displays. All devices are capable of driving the digits
and/ or segments of these displays and are designed to permit all outputs to be activated simultaneously. Pull-down resistors are incorporated into each output and no external components are required
for most fluorescent display applications. The highest voltage parts
(suffix A-I) are also used in gas-discharge display applications as
anode (digit) drivers.
Twenty-four standard devices are listed, so that a circuit designer
may select the optimum device for his application. Input
characteristics, number of drivers, package style, and output voltage
are tabulated for each device in the Device Type Number Designation
chart. With any device, the output load is activated when the input is
pulled towards the positive supply (active 'high'). All units operate
over the temperature range of -20 o e to +85°e.
UDN·6118*
UDN·6128*
*Alway••peclfy complete part number, such as:
UD
N - 6116
L
A -
2
"'L'NSTRUCT'ONS: SELECTED VERSION. SEE
. TYPE NUMBER DESIGNATION, NEXT PAGE.
PACKAGE: A = PLASTIC DIP
R = CERAMIC DIP
'-------DEVICE TYPE.
"------OPERATING TEMPERATURE RANGE. N =
'------FAMILy. UD
= DIGITAL DRIVERS
~20°C
to +85°C
DWG, ;..10. A-ll,222
UDN·6138*
UDN·6U8*
2-10
SERIES UDN-6100A and UDN-6100R
FLUORESCENT DISPLAY DRIVERS
DEVICE TYPE NUMBER DESIGNATION
Input Compatibility
No. of
Drivers
6
5V TTl, CMOS
8
6
6-15V CMOS, PMOS
8
VOUT
60 V
80 V
110 V
60 V
80 V
110 V.
±30 V
±40 V
60 V
80 V
110 V
60 V
80 V
nov
±30 V
±40 V
No. of
Pins
Type Number
Plastic DIP
Ceramic DIP
UDN-6116A-2 UDN-6116R-2
UDN-6116A
UDN-6116R
UDN-6116A-I UDN-6118A-2 UDN-6118R-2
UDN-6118A
UDN-6118R
UON,6118A-I UDN-6138A,2 UDN-6138A
UDN-6126A-2 UDN-6126R-2
UDN-6126A
UDN-6126R
UDN-6126A-I . UDN-6128A-2 UDN-6128R-2
UDN-6128A
UDN-6128R
UDN-6128A-I UDN-6148A-2 UDN-6148A
-
16
16
16
18
18
18
20
20
16
16
16
18
18
18
20
20
o
.
2. 5 r-~-'---~--'--~-r~-----'r-~-r--~-'
ABSOLUTE MAXIMUM RATINGS at TA
= +25°C
(Voltages are with reference to ground unless otherwise shown)
.85 V
Supply Voltage, VBB (all devices, suffix Aor R).
. ........ .
... 85 V
(UDN-6138/48A or R, ref. VEE) ...
(all devices, suffix A-I).
. .......... 115 V
(all devices, suffix A-2 or R-2) ....
. .. 65 V
.65 V ~~
(UDN-6138/48A-2 or R-2, ref. VEE) .
. ... -40 V C>~ 1.5
Supply Voltage, VEE (UDN-6138/48 all suffixes) .
... 20 V . ~
Input Voltage, VIN (all devices) ....
(UDN-6138/48 all suffixes, ref. VEE) ...
. .. 55 V <:>
. ..... -40 rnA
Output Current, lOUT ...
. . . . . . . . . .. . See Graph
Allowable Package Power Dissipation, Po ....
Operating Temperature Range, TA .
. ... -20 oe to +85°C
Storage Temperature Range, Ts .
. ... -55°C t~ +150°C
~
~
«
'"
~
::: O. 5 ~~+--~-+-r----'
«
AMBIENT TEMPERATURE. TA IN'C
OWG. rIO. A-ll.n4
2-11
-SERIES
UDN~6100A
UDN~6100R
and
iiuORESC'ENT !lISPLAY:DRIVE~RS
ELEaRICAL CHAUaERISTICS (over operating temperature range)
Note: All Valu.. Specified At hffIx••
A
R
10
10
0
0
·UDN·6131 . . UDN·6141
A·1
118
IIA
V•• ·Vu -
Choroeterl.tle
Output Leakage Current
Output OFF Voltage
Output Pull·Oown Current
Output ON Voltage
Input ON Current
A·2
1·2
60
0
60
0
,,-
Voltt I
Voltl J
"
-
,
Appllcobl. Device.
Symbol ao.le Port No.
Suffix
All
All
lOUT
All
All
Vour
All
A or R
lOUT
A·I
A·2 or R·2
VOIII
UDN-6ll6/18/38
A or R
A·I
A-2 or R·2
UDN-6126/28/48
A or R
A·I
A·2 or R·2
UON·6116118/38
All
I'N
Supply Current
Iss
UDN-tilzti128/48
All
All
UDN-ti116
All
A or R
A·I
A-2 or_R.z
A or R
A·I
A·2 or R·2
A or R
UUI1-CHI~/j~
UDN-li126
A~l
UDN·6128/48
A-2 or R·2
·A or R
A·I
A·2 or R·2
T••t Condition.
V'N = 0.4 V
V, - O.H
. Input Open,
VOIII - Vss
V'N" 2.4 V,
lour - -25 mA
V'N" 4.0 V,
lOUT = -25 mA
VIII - 2.4 V
V'N - ~.U V
V'N - 4.0 V
V'N" 15 V
All Inputs Open
All Inputs'" 2.4 V
Two Inputs .. 2.4 V
~AII Inputs -2.~ V
All IlI£uts .. 2.4 V
Two Inputs ,., 2.4 V
Ali Inputs = 2.4 V
All Inputs = 4.0 V
Two inputs = 4.0 V
All Inputs .. 4.0 V
All Inputs .. 4.0 V
Two Inputs .. 4.0 V
All Inputs - 4.0 V
Min.
450
600
350
77
107
57
77
107
57
-
Limit.
Typ.
Max.
15
1.0
650
llOO
900
1500
500
175
78
108
58
78
108
58
120
225
375
650
130
250
675
1150
10
100
5.0
7.5
2.5
4.5
4.0
6.0
6.0
9.0
2.5
4.5
5.5
8.0
5.0
7.5
2.5
4.S
4.0
6.0
6.0
9.0
2.5
4.5
5.5
8.0
-
-
-
Units
jJ.
V
IIA
IIA
jJ.
V
V
V
V
V
V
~-
,J.IA
jJA
jJ.
jJ.
mA
rnA
rnA
rnA
rnA'
rnA
mA
mA
mA
mA
rnA
rnA
RECOMMENDED OPERATING CONDITIONS
Supply Voltage
..Vss .
UDN-6ll6/181
26/28
UDN·6138/48
Input ON Voltage
.Output ON Current
-
..
NOTE: Pos,tlve (negat,ve) current
VEE
UDN·6138/48
V'N
UDN·6116118138
UDN-6126128/48
. All
lOUT
IS
A or R
A·I
A·2 or R·2
A
A·2
A
A-2
All
All
All
defined as gOing Into (coming out of) the spec,fled dev,ce pm.
2-12
5.0
5.0
5.0
5.0
5.0
0
0
2.4
4.0
-
~
-
-
70
100
50
40
30
-40
-30
IS
IS
-25
V
V
V
V
V
V
V
V
V
mA
SERIES UDN-6100A and UDN-6100R
FLUORESCENt DISPLAY DRIVERS
PARTIAL SCHEMATIC
One Drlv.r
(All Type.)
I NP UTCr--.Nv---'-""---"'-1""-I
Type (All Suffixes)
U[)N·6116/18/38
U[)N·6126/28/48
...
lOkQ
20.kQ
'--'--t---'C OUTPUT
RB
30 kQ
20 kQ
125K
(UDN-6138/4S~
VEE
DWG.NO.
TYPICAL MULTIPLEXED FLUORESCENT. DISPLAY
SEG.MENT SELECT
UDN-6118/28A
2-13
A~lO.~92C
ONLY)
lJDN-6164A AND UDN-6184A
GAS.DISCHARGE DISPLAY DRIVERS
UDN·6164A AND UDN·6184A
GAS·DISCHARGE DISPLAY DRIVERS
FEATURES
• TTl/MOS Compatible Inputs
• High Output Breakdown Voltage
• High Output Current Capability
• Low Power
• Reliable Monolithic Construction
THESE monolithic high-voltage bipolar integrated circuits dramatically
reduce the number of discrete components required to link MOS, or
other low-voltage circuitry, with the anodes of gas-discharge display
panels.
Dwg. No. A-9643A
Types UDN-6164A and UDN-6184A are used with multiplexed gasdischarge display panels, such as the Burroughs Panaplex®, the Cherry
Plasma-Lux®, and the Beckman SP series, in calculator, clock, or instrumentation applications.
UDN-6164A
(SIX DRIVERS)
Each driver has appropriate level shifting, signal amplification, output
off-state voltage bias, and 40 rnA output current sourcing for sequential
addressing of display panel anodes. The inputs include pull-down resistors
for direct connection to open-drain PMOS logic.
Type UDN-6164A contains six drivers; Type UDN-6l84A contains
eight drivers. Applications with a greater number of digits \TIay use any
combination of units for minimum package count.
The devices can be used in a wide variety of low- to high-voltage
applications. High reliability, small size, ease of installation, and low cost
make them an ideal choice for many applications.
®
®
Panaplex is a registered trademark of the Burroughs Corporation
Plasma· Lux is a registered trademark of Cherry Electrical Products Corporation
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Supply Voltage, VBB . • • • • •• • • • • • • • • • .
. .•• + 115 V
Input Voltage, V,N ••••••••••••••••••••••••••••. " + 20 V
Output Current, lOUT . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40 mA
Power Dissipation, Po
UDN-6164A ................................. 2.1 W'
UDN-6184A ................................ 2.3 W"
Operating Temperature Range, TA ........... -20°C to +85°C
Storage Temperature Range, Ts ............ -WC to + 150°C
UDN-6184A
'Derate at the rate of 16.7 mW/OC above 25°C
"Derate at the rate of 18.2 mW/oC above 25°C
(EIGHT DRIVERS)
2-14
UDN-6164A AND UDN-6184A
GAS-DISCHARGE DISPLAY DRIVERS
PARTIAL SCHEMATIC
ONE OF SIX DRIVERS (UDN-6164A)
ONE OF EIGHT DRIVERS (UDN-6184A)
VBB
o
INPUT
L..-_-t--u OUTPUT
8K
GROUND
DwG.NO. A-ll,364
The high input impedance of these devices makes them susceptible
to static discharge damage associated with handling and testing. Techniques similar to those used for handling MOS devices should be
employed.
ELECTRICAL CHARACTERISTICS at T. = +25°C. Vaa = 110 V(unless otherwise specified)
Characteristic
Output Leakage Current
Output orr Voltage
Output Pull-Down Current
output ON Voltage
Input ON Current
Symbol
InllT
Vour
lour
Vour
liN
Test Conditions
Y'N = 0.4 V, T = 70°C
VIN = 0.4 V
Input Open, Vour - VBB
VIN - 2.4 V, loUT - -25 rnA
VIN- 2.4 V
VIN = 5.0V
All Inputs Open
Two Inputs = 2.4 V
'.,
Supply Current
IBB
. Min.
-
600
107
-
-
limits
Max.
15
1.0
900
1500
108
120
225
375
650
100
10
2.5
4.5
Typ.
Units
JLA
V
!LA
V
!LA
JLA
JLA
rnA
RECOMMENDED OPERATING CONDITIONS
Supply Voltage
Input ON Voltage
output oN Current
-
VJlB
VIN
lIN
) 2.4
-
NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.
2-15
-
-
100
15
-25
V
V
rnA
SERIES UDN· 7180A
G~'S"1)ISCHARGE
DISPLAY SEGMENT DRIVERS
SERIES UQN·7180A
GAS DISCHARGE DISPLAY SEGMENT DRIVERS
FEATURES
• Reliable Monolithic Construction
• High Output Breakdown Voltage
• Low Power
• nUMOS Compatible Inputs
Description
Series UDN-7180A segment drivers are monolithic high-voltage bipolar
integrated circuits for interfacing between MOS or other low-voltage
circuits'and the cathode of gas-discharge display panels.
The.se drivers reduce substantially the number of discrete components
required with panels (Beckman, Burroughs, Dale, Matsushita, NEe, Pantek, etc) in calculator, clock and instrumentation applications.
The UDN-7183A, UDN-7184A, and UDN-7186A drivers contain appropriate level shifting, signal amplification, current limiting, and output
OFF-state voltage bias. The UDN-7180A driver requires external current
limiting and is intended for higher-current applications or where individual
outputs are operated at different current1evels (i.e. with alpha-numeric
displays). All inputs have pull-down resistors for direct connection to
open-drain PMOS logic.
These devices provide output currents suitable for display segments ina
wide variety of display sizes and number of display digits. Either a fixed
split supply operation or a feedback-controlled scheme is allowed.
Applications
The Series UDN-7180A drivers can be used ina wide variety oflowlevel to high-voltage applications utilizing gas discharge displays such as
those found in calculators, clocks, point-of-sale terminals, and instruments. Their high reliability combined with minimum size , ease of installation, and the cost advantages of a complete monolithic interface make them
the ideal choice in many applications. A typical applicationsh6wing the
use of these devices, and their counterpart anode drivers, is shown.
2-16
SERIES UDN"7180A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS
ABSOLUTE MAXIMUM RATINGS AT 25°C
Supply Voltage, V'M ............................................ -115 V
Input Voltage, VIN .............................................. +20 V
Output Current, 'ouT: UDN-7180A ..................................... 20 mA
UDN-7183A ................................... 3.25 mA
UDN-7184A .................................... 2.0 mA
UDN-7186A .................................... 1.0 mA
Power Dissipation, Po .......................................... 1.13 W·
Operating Temperature Range, TA •••• , • • • • • • • • • • • • • • • • • • • • • • -20°C to +85°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
fJ
'Derate at the rate of 9.1 mW/oC above 25°C
Due to the high input impedance of these devices, they are susceptible to static
discharge damage sometimes associated with handling and testing. Therefore,
techniques similar to those used for handling MOS devices should be employed.
ELECTRICAL CHARACTERISTICS: TA = +25°C, VKK = -110 V (unless otherwise specified)
Characteristic
Symbol
Test Conditions
Output ON Voltage VON
All inputs at 4.5 V
UON-7183/84/86A
All Inputs at 4.~ v, VKK - ·/U V
uutput UN Voltage VON
All Inputs at 4.5 V,
UON-7180A
!itH = 14 mA
Uutput UH Voltage VOFF
All Inputs at U.4 V,
Reference V'M
uutput ~urrent
All Inputs at 15 V, VKK - -llO V,
ION
Test output held at -60 V
(lUMITINGl
uutput \,;urrent
All mputs at U.4 V, V'M - -110 V,
ION
Test output held at -66 V
(lSENSE)
Input Hlgn ~urrent IIH
lest Input at 15 V,
Other inputs at 0 V
Input low ~urrent
Test input at 0.4 V, One input
III
at 4.5 V, Other inputs at 0.4 V
supply ~urrent
All inputs at 0 V
I'M
Test
Fig.
1
UDN-7180/83A
Min. IYp· Max.
-100 -104 -
I
-lU~
-bb
lUH
-
2
76
84
UDN-7183A only
3A 1475 1850 2450
38
UDN-7184A
Min. Iyp. Max.
-98 -102
- -65 -
-
76
910
-95 -120 -155 -65
4
-
5
6
-
200
1
10
-125 -175
NOTES:
1. All voltage measurements are referenced to pin 9 unless otherwise specified.
2. All voltage measurements made with 10M!!, DVM Dr VTVM.
3. Recommended VKK operating range: -85to -110 V.
4. Positive (negative) current is defined as going into (coming out 00 the specified device pin.
2-17
275
UON-7186A
Min. Iyp. Max.
-97 -100 - -63 -
Units
V
V
V
76
84
-
V
440
550
725
!LA
-85 -115 -50
-65
-90
!LA
-
200
275
uA
-
1
10
-125 -17
uA
!LA
84
-
1140 1520
-
200
-
1
10
-125 -175
275
-
SERIES UDN· 7180A
GAS~DISCHARGEDISPLAY
SEGMENT· DRIVERS
TEST CIRCUITS
DWG. NO. A-9737A'
-l1OV
-llOY
OWG. NO. A-9738B
FIGURE 1
DWG. NO. A-9739B
FIGURE3A
FIGURE 2
-110V
-110V
DWG. 110.
~97"IA
DWG. NO. A-9740B
FIGURE3B
FIGURE 4
OPEN
DWG. NO. A-9742S
-llOV
FIGURES
FIGURE 6
SERIES UDN-7180A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS
PARTIAL SCHEMATIC
7110
7113
7114
7186
I,
12
(kQ)
(kQ)
350
350
480
620
40
10
~~U-; -
25
I
1
-
-
-O~T~T
18
i
I
I
27 K
VKK
10
I
COMMON BIASING NETWORK
L
_O~I~!-n.JR:::E~
O.!:'E
TYPICAL APPLICATION
2-19
_-1
SERIES UDN-71S0A
GAS-DISCHARGE DISPLAY SfGMENT .DRIVERS
TYPICAL SIX-DIGIT CLOCK
IN5852
(2)
...
"""'
....
.,
0CO 0 4
10 5
~
~f
OIM
r'
II
60Hz
VSS
f3N:
"06
05
f=! -
«
:g
......
-.0
u4
03
u2
01
TEN MII;!'t.,!t~
HOURS
-L- SET
I
r-::..::
......
lVl
I
:z
0
-L-1ET
I
-
-
VOO
N
«
00
""
......
r-
U"'I
:z
0
U"'I
0
I
0
:::J
:E ::..::
:E
0
:::J
IGN
'----
'---
OISPLA
COUNT
-&l.NHIBIT -L...
ANfRICAN
MA. GNETI CS
>AM6612
....,
...
11"'"1
]
......,
A
111"'"1
V
;1SE
So
Sc
58
SA
--
vKK
~
...
.A
~v
T
T
I I
U
BURROUGHS
-? >CD60733CM
MEDo
BRIGHT
O2
03
I_I
I
PM
~
..-:-' ~ ~
,,--,.. -,-, , -',- ,10 6
~
~
~
IN5859
-:....
......
>-
...
+100V
..h
T
~
........
T
$
-?
-100V~
~
DWG. NO. A-9751 A
2-20
01
SERIES UDN-71S0A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS
ACTUAL OUTPUT CI RCU ITS
~
DIGIT 2
"'00"1
"'
ON
DIGIT 3
EQU I VALENT CI RCU ITS
~--jr----1-oV'BB
ONE SCAN CYCLE
118 UDN-61B4A
UDN-6118A-[
ON
DI GIT SWITCH-
DI GIT 4
SEG
a
SEG
b
[25 K
EI
[25 K
SEG c
SEG d
SEG
350 K
-V REF - -
e
--1'0';---<>
(-26VI -
-
--JV\/'--oO
25 K
SEG f
SEG g
a
f
/g'b
e/d'C
"'''''' ;w,
1-' ,-,
1-' 1_'
'-'
,=,
-
(-IOOVI
DWG. NO. A-ll,096
OWG.NO. A-ll,094A
ANODE AND CATHODE WAVEFORMS
ANODE ON VOLTAGElJ
''''I """
""r.-
",1 /""
OFF BIAS VOLTAGEY: .
1 PANEL VOLTAGE DROP
OFF BIAS VOLTAGE
CATHODE SELECT SIGNAL
--!-
CATHODE ON VOLTAGE
REIONIZATION TliVIE--j
1-
I---
1
--'
1
I_CATHODE
DIGIT PERIOD -+I
BLANKING
INTERVAL
DWG. NO. A-ll ,095
2-21
HIGH-VOlTAGE lNTERFAtE DRIVERS (CCrntinued)
A Monolithic Ie Series
for Gas-Discharge Display Interface
Introduction
The switching of the high voltages necessary for
display panels such as the Burroughs Panaplex@ has
long presented difficulties to the semiconductor industry - particularly to IC manufacturers. It is difficult
to fabricate devices capable of sustaining 200 volts or
greater with standard IC processes of today. Solutions
to the high voltage gas discharge display interface also
must be inexpensive as well as functional; this cost/
simplicity factor prohibits most unusual or exotic circuit designs and/or IC processes.
The earliest (and a great many recent) gas discharge
interface schemes used discrete components, but that
has been an increasingly cumbersome and expensive
solution. Competition at the system level has largely
come from LEDs, and a great many standard ICs are
available for the smaller LEDs. In most instances, the
small displays have gone to LEDs. However, the larger
display applications are still an opportunity for gas
discharge since character size and cost are not directly
related. The cost impact upon the potential for gas
discharge displays in many systems is a function of
interface complexity and cost, and it was to this end
that a joint Sprague/Burroughs effort was launched.
Early Sprague/Burroughs meetings were held to define the relevant factors involved in such a program
and provide the necessary insight for both parties into
Vss
Figure 1
the capabilities of diode isolated ICs, the voltage and
current requirements of the Panaplex displays, the need
for minimization of power (battery systems), packaging of the circuits, component count and cost, etc.
Add to this the potential for use with feedback controlled supplied, poorly regulated doc supplies, the
wide variety of numbers of display digits, the range
of digit sizes (in use or contemplated), etc., and our
task was not to be an easy one.
Our direction was determined by two factors: a history of fabricating 130-140 volt PN diode isolated
display circuits, and a more recent effort to utilize
compatible thin-film resistor technology. These factors, coupled with considerable expertise in designing
and processing high voltage ICs, dictated an approach
utilizing a split (± 100 V) supply. The split supply
would provide the 200 volts needed to ionize the display and the resistor capability would greatly aid the
incorporation of functions previously done by discrete
components - including both input and output (segment) current limiting, pulldown (open drain PMOS),
pullup and pulldown reference for IC outputs, and a
high impedance voltage divider for the output OFF
bias. All level shifting is accomplished via use of PNP
or NPN transistors, and the capacitors previously required were negated.
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
Basic Scheme
Digit Interface
Replacing discrete components through incorporating their function into this IC series results in
the block diagram of Figure 1 with its .basic requirement for a single digit and single segment
driver; a scheme capable of driving as many as eight
digits and the eight segments. Additional digits or
segments beyond the eight provided in an I8-lead
DIP may be driven by combinations of packages
beyond the minimum two necessary. Example:
three ICs - two digit and one segment - will
fulfill the needs of a 12 to 16 digit calculator.
Included in this series of high voltage interface
are two digit driver packages: UDN-6I64 (6-digit),
and UDN-6l84 (8-digit). Segment drivers include
the UDN-7I80, UDN-7I83, UDN-7I84, and
UDN-7I86, and the four offer current ranges compatible with display sizes from 0.250" to 1"
panels, and others will be made available as needs
are defined.
The digit driver is the more complex of the two
and its schematic is shown in Figure 2. Input address polarity is positive (active high in TTL parlance) and the circuit is designed to interface from
TTL (4.5 volts from open collector - or using
pull-up to Vee), CMOS, PMOS, etc. Input currentlimiting and one-half of the pull-down for open
drain PMOS is the function of Rs; R6 adds the
second half of the pull-down to the ground bus.
The protective value of R. and Rs must be noted; a
junction failure in Q, has the two resistors as a
current limiter to the MOS (or TTL) output and will
minimize the likelihood of destroying the low level
logic outputs.
Input transistor Q. is a high voltage inverter and
sinks the base current of PNP Q3' A positive input
(4.5 to 20 V) will turn on Q. and this base current
(65 11A typ.) for PNP Q3 will tum on the output
Darlington (Q, and Q,) and source digit current.
ELECTRICAL CHARACTERISTICS: TA = +25°C, V KK = -110 V
(unless otherwise specifted)
Characteflstlc
Output ON Voltage
UDN·7183/84/86A
Uutput UN Voltage
UDN7180A
Output OFF Voltage
Symbol
VON
VON
VOFF
Output Cu rrent
(lliMITING)
Output Current
(lsENsE)
Input High Current
ION
Input Low Current
I,l
Supply Current
1«
ION
I,H
Test ConditIOns
All Inputs at 6 V'
All Inputs at 6 V'. VKK ~ ··70 V
All Inputs at b V'.
ION = 14 mA
All Inputs at 0 5 V,
Reference VKK
All Inputs at 15 V, VKK - -1l0 V,
Test output held at - 60 V
110 v,
All Inputs at 0.5 V, VKK Test output held at -66 V
Test input at 15 V,
'Other Inputs at 0 V
Test Input at 0.5 V, One Input
at 6 V', Other Inputs at 0.5 V
All inputs at a V
Test
Fig.
UDN·7180/83A
Min'. Typ. Max.
I
I
2
3A
-100 -104
-66
105 108
-
76
84
UDN·7183Aonly
1475 1850 2450
-120 -155
-97
-
76
84
76
84
440
550
-
910 1140 1520
-100 -63 -
-
V
V
V
V
725 "A
-1J5 -50 -65 -90 "A
-
200
275
-
200
275 "A
10
-
1
125
10
175
-
175
-
1
125
10 ~A
175 "A
4
-
200
275
5
6
-
1
125
2-23
-98 -102 -65 -
-85
-95
'Specify Input voltage = 4.5 V for deVices With "·5" suffIX.
NOTES: '
1. All voltage measurements are referenced to pin 9 unless otherWise specified.
2. All voltage measurements made With 10M '!, DVItl or VTVM.
3. Recommended VKK operating range: -85 to -110 V.
UDN·7186A
Min. Typ. Max. Units
-65
38
-
UDN·7184A
Min. Typ. Max.
D
· HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
PARTIAL SCHEMATIC
INPUT
L----+---I.J OUTPUT
GROUND
DWG.NO. A-ll,364
Figure 2
counterpart pull-up resistor R) is also changed to
some known ratio of R2 • The ground terminal (#9) is
referenced near, or connected directly to ground, and
the VKK line is typically a - 90 to -100 volts.
Consistent ionization and extinguishing of the
display panel is the result of the 60-75 volt swings
available from both digit and segment ICs. The conditions that previously created problems for the
'direct MOS drive with minimal swings at the output
have been very adequately handled with the increased
output swings of the 610017100 series. Problems
from leading zero blanking, low temperature, low
ambient light, etc. which previously gave difficulty
are well taken care of with this series of ICs.
The input PNP (Q)} serves as a level translator and
provides d-c level shifting to the output Darlington
(Q2 and Q3)· Emitter resistor (R 3) both limits the input current and furnished pUll-down for open drain
PMOS. An added intent is the measure of protection
furnished the MOS by the very high impedance of
R3 •
The basic switching function is the combination of
PNP Q), Darlington Q2 and Q3' and the associated
resistors R" R2, and R 3• Address polarity is again
active high. The input may be raised a maximum of
20 volts above ground and will function with input
levels obtained from CMOS and open collector TIL
(4.5 V).
Segment Interface
The segment driver circuit is shown in Figure 3 and
the value of R2 (segment limiting) is determined via
masking for the appropriate display current. Its
2-24
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
PARTIAL SCHEMATI C
~~u-;
- - - -O~T;T i
I
Figure 3
TYPI CAL APPLI CAT! ON
Figure 4
2-25
18
I
I
HIGH~ VOLTAGE
INtERFACE1lRIVERS (Continued)
The OFF output biasing network is common to all
the individual drivers with the level of bias determined by the ratio of R7 to the total of R7 and Rs.
As in the digit driver, the value of output bias is ::::213
the voltage across VKK and ground - thus insuring
sufficient 'on to off' swings to properly fire, and effectively extinguish unaddressed segments during a
scan. Emitter follower Q, and Qs sources current to
the pull-up bus connected to the various outputs as
they are turned on during the display scan.
pieces, and the board layout is straightforward and
uses single-sided board.
Many calculator interface schemes use considerable numbers of components (70 to 100
typically) to drive gas discharge panels. As one
example: a twelve digit/eight segment machine uses
85-90 discretes while the new IC version uses only
three packages,' and results in less space along with
considerable simplification. Other applications will
benefit similarly with this series of circuits.
Minimum Component Interface
Summary
The impact of this new product family may be seen
in the typical digital clock of Figure 5. This a-c
powered clock uses a Mostek 50250 clock IC, a
UDN-6164 digit driver, and a UDN-7183 segment
driver. Total component count is approximately 30
Display technology and usage has emerged at a
mind boggling rate in the past several years - largely
due to the fantastic growth rate of calculators. The
planar gas panels have been an integral portion of
this burgeoning market, but like all the other displays
10 6
1--
0
5
loco
1'~;~52
04
D3
.
L
BURROUGHS
CD60733CM
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DIM
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Figure 5
2-26
D1
,- 1'::10
1 _I· _, LI
- I 1
1 '-
PM
ti
NO. A-9751A
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
available does not meet the requirements for an ideal
display.
Gas discharge panels are a fine combination of
aesthetics, reliability, low cost, large character size,
mUltiplexing capability, etc., but have been impacted
to some degree by the lack of an available and inexpensive, totally monolithic interface. The move
toward Ie interface for displays has stifled some
potential - largely in favor of LEDs; although many
applications requiring large characters and/or .in
high ambient light turn toward gas panels. The
planar gas discharge display is a long way from obscurity, and the availability of this family of les
should open up new areas as well as satisfying
existing systems.
The intent from the inception of this program has
been to produce and provide a standard, inexpensive
and easy to use interface for gas discharge displays.
A great many potential applications exist for these
circuits in consumer and commercial products. From
the calculator and digital clock areas this product
also win find use in automotive dashboards, pointof-sale systems,' electronic cash registers and scales,
and instrumentation. The market for displays is still
very elastic, and many applications for gas discharge
panels. are continuing to appear. The Sprague contribution to this market is this series of state-of-theart interface les.
2-27
o
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
TRENDS IN IC INTERFACE
FOR ELECTRONIC DISPLAYS
Introduction
Display technology was truly set into high gear by the explosion of the electronic calculator
business. Expansion at a phenomenal pace continues, encompassing a multitude of products,
particularly high-volume consumer products (calculators, clocks, games, and watches). Recently, further stimulated by the "microprocessor revolution," with its far-reaching effects,
and the resulting changeover to solid state design from electromechanical, mechanical, fluidic,
or electrical systems, the vistas for displays have expanded well beyond the horizon. Products
have been and are being developed, using microprocessors and displays, that never previously
existed.
To augment this microprocessor revolution, semiconductor manufacturers are developing
many new interface circuits useful with displays, although some of these will not be exclusively for display systems. To accomplish this, the present boundaries of device design,
process, packaging, and electrical parameters will require continual extension and expansion.
Display Buffers
A continuing evolution of standard interface ICs is needed to buffer low-level logic from
high-voltage and/or high-current loads. Some of this buffer development will serve display
systems. Since there already is a broad assortment of buffers (particularly for low- to
medium-current LED applications), the ongoing development in simple or low-order interface
will mainly concentrate upon further reduction in discrete component count, package improvement (particularly for high-current/high-power devices), improvements in device current, voltage, switching speed, and greater reliability.
Figures 1, 2, and 3 show some Sprague interface ICs that represent buffer circuits; other
vendors supply similar, or identical, high-current or high-voltage buffers to allow operation of
displays from low-level logic. Two basic changes have occurred relatively recently:
1. Greater use of I8-pin DIPs for eight driver channels (Source Driver, Figure 2).
2. Creation of sourcing functions (Figures 2 and 3; useful for LED, gas-discharge, vacuum
fluorescent, incandescent, and electromagnetic displays, depending upon device
ratings). While further buffer designs are needed (particularly in high-current ( > 2 A)
and high-voltage ( > 100 V) circuits), the main emphasis will be toward the incorporation of logic and control circuitry with output buffers.
Complex Interface
Paralleling (though lagging) the microprocessor LSI revolution is the area of greatest future
for IC display circuits: The need for complex, smart or high-order interface. This will be MSI
to LSI logic (with perhaps some linear functions) combined with suitable output buffers.
2-28
HIGH·VOLTAGE INTERFACE DRIVERS (Continued)
POS. ADDRESS
OUTPUT
INPUT
NC
INPUT
NC
Q---r-----IVV'---r---1
30K
10K
NC
o
EMITTER
COMMON
EMITTERS
DWG. NO. A-92l!~ A
D\'IG.HO.A-9236A
Flgur.1A
Flgur.1B
UHp·oi.O GAS DISCHARGE DRIVER
v,
ONE OF EIGHT DRIVERS
3K
OUTPUT
Dwg. No.A-l0,242A
Flgur.2A
Flgur.2B
SERIES UDN·2980 SOURCE. DRIVER
Display interface ICs (similar to the MOS I/O control chips), both custom and standard
product, are becoming available in this category. High-volume applications may justify
custom ICs, but the more general trend will be toward standard, off-the-shelf designs chiefly due to the high costs of developing custom ICs.
The higher voltage displays (gas-discharge, vacuum fluorescent, a-c plasma, and doc
electroluminescent) may share some circuits (if appropriately planned and designed), particularly in the area of matrix displays. It is difficult to imagine, however, much commonality
between high-current LEDs, high-voltage gas-discharge or a-c plasma, and low-power LCDs,
2-29
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
+V
-I
--1
-l
-l
-l
---1
-l
-l
Figure 3
a-DIGIT la-SEGMENT HIGH-CURRENT LED INTERFACE
although they should share considerably the development of cellular CAD circuit designs.
Basic shift registers, latches and decoders do have considerable commonality.
In Figure 4 is a pinout and logic diagram of the first B iMOS Sprague IC combining logic and
output drive. Although not expressly intended for display applications, this BiMOS (CMOS
logic and bipolar outputs) IC has a great deal of utility to engineers working with lower
voltages and high currents (LEDs, incandescent and electromagnetic displays). Type UCN480lA is a parallel-in Iparallel-out unit composed of eight 'D' latches and eight 350 rnA 150 V
bipolar Darlington outputs.
2-30
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
OUTPUT
ENABLE
OUT,
OUT,
OUT,
OUT,
OUT,
'>-Ft---ff.41
OUT,
OUT,
~~. . . . . . . . . . . .~r-COMMON
DWG.NO. A-IO.49BA
Figure4A
COMMON
GROUND
OUTPUT
ENABLE
TYPICAL M05 LATCH
TYPICAL BIPOLAR DRIVER
DWG.NO.
A-~O.495A
Flgure"'B
UCN-480IA BIMOS LAtCH/DRIVER
More recently, Sprague has designed a serial-in !parallel-out BiMOS interface IC expressly
for use with vacuum fluorescent displays. Figure 5 shows the UCN-481OA lO-bit serial-in!
parallel-out interface for use with VF displays; the use of serial data allows 10 output lines,
data in and data out in a standard 18-lead DIP. It makes possible both fewer IC packages and
simpler PC board wiring, although it is slower than a parallel data approach. It uses only a
.
single pin of the I/O ports.
2-31
H1GH~VOLTAGE
INTERFACE DRlVERS (Continued)
CLOCK
IN
10 BIT SERIAL IN PARAllEl OUT
SHIFT REGISTER
OATA
IN
•
•
•
10 PARAllel IN
STROBE
IN
PARALLEl OUT LATCHES
•
•
•
•
•
•
•
•
•
•
•
•
.LANKING
OUT
a
QUl7
L..:....---------.
~..----_-,
.-----,.,:;:.J OUT 9
OUT )0
SERIAL DATA
OUT
Va.
SERIAL DATA
IN
'LANKING
OUT I
__--........., OUT 2
OUT lOUT 2
Flgur.5A
UCN·4810A PINOUT
OUT 9
OUT 10
Flgur.SB
UCN·4810A VF DRIVER BLOCK DIAGRAM
A slightly more recent design for vacuum fluorescent displays is the Sprague UCN-4815A.
This is a 22-lead, 8-bit parallel-in /parallel-out BiMOS unit. The unit may have data inputs and
a strobe bus (see Figure 6). The chip enablelb~anking pin provides control of VF buffers. A
power-on-c1ear is internally.incorporated.
2-32
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
D
INPUTS
BLANKING
STROBE
Figure 6
UCN-4815A PARALLEL 8-BIT VF INTERFACE
2-33
~IGH-VOLTA~E
IN-TERFACE DRIV£RS (Continued)
Device Technologies
With the exception of LCD displays (which at least until recently have been largely, if not
entirely, driven by MOS) the display and interface technologies in high-volume use are mainly
associated with bipolar semiconductors. Early display interface ICs (particularly devices such
as the 7447 and 7448) were aimed at LED technology and represent MSI with modest output
capability. The increasing use of higher voltage displays, multiplexed high-current applications, and the need for greater circuit complexity and low pin count will dictate other
technologies, such as 12L, BiMOS, CMOS/DMOS, and possibly DMOS.
Standard Bipolar
Standard bipolar technology, long associated with TTL or linears (early op amps), appears
very limited in scope for the future. Circuit density and supply power requirements will dictate
other processes for functions beyond the simple MSI level. The advantages .of standard bipolar
ICs appear to be in the areas of simple high-current, high-power or high-voltage interface. In
particular, applications requiring the combination of high voltages ( '" ioo V) or multiple
high-current outputs ( '" 2 A) will restrict the logic Icontrol circuitry to a low level. Cost, chip
size and package power dissipation will restrict this circuitry largely to versatile, simple
buffers.
Anticipated to increase significantly is the use of 12L for systems of low to modest voltages
(LEDs through VF). The present limits oftL appear to be limited to applications below the 50to 60-volt level. 12L, with its combination of circuit density, low power and reasonable
switching speeds should make a fine match for LEDs or other low-voltage display applications. For higher voltages ( > 25 or30 V), prospects the penalty of reduced circuit density may
diminish its cost effectiveness. Some increase in standoff voltage may be afforded by the uses
of cascaded output transistors or p'rocess improvements, thus reducing the need to sacrifice
logic density. Without a standard 12L logic family, the main market penetration would appear
to be custom designs although there is a definite opportunity for standard interface for lower
voltage applications, particularly LEDs and vacuum fluorescent.
2-34
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
BiMOS
BiMOS, a combination of CMOS and bipolar for interface ICs, seems to fit a technology
niche of higher breakdown voltages than tL, especially where logic power and supply voltage
range (5 to 15 V) is important. BiMOS or BiFET ICs, which are presently on the market, are
largely related to operational amplifiers, although other uses, such as the Sprague application
of BiMOS to interface, are emerging.
.
Currently, it is fea~.ible to design and manufacture BiMOS interface with breakdown
voltages in the 80 to 100 V range. With additional timeand greater concentration on increasing
BV, it appears that higher voltages ( ,. 150 V) for output buffers could be obtained. By
obtaining breakdowns in the 120 V to 160V range, BiMOS then becomes a viable IC
technology for interface for the higher voltage displays: doc gas-discharge with ±100 to
±130 V; a-c plasma with 160 to 170 V, and glowtransfer or doc electroluminescent (DCEL)
opportunities with a range of 120-150 volts.
Switching speeds and output configurations(active pull-dowrlor resistive) are critical to
matrix displays (particularly a-cplasma) with large numbers of drive lines. Adding active
pull-down or pull-up will fend to increase <;hip size (and cost), thus adding to the potential
overall difficulty of BiMOS with its greater process complexity and slightly longer manufacturing cycle. This does appear to be a very key technology for the near future. Its product niche
will include for applications requiring 60 to 100 V (or more) breakdowns, low-power l()gic,
wide supply range, modest speeds, and MSI to small LSI.
CMOSIDMOS
Chiefly beingcarril?d on by Texas Instruments, CMOS /DMOS aisplayinterfaceappears to
be intended for much of the same display market as BiMOS. Product information now
available indicates 60 to 100 V breakdown (DMOS outputs), CMOS logic, low to modest
output currents ( '" 25 rnA), and logic speedsJo 4 MHz. Designs now being promoted are
targeted toward a-c plasma and vacuum fluorescent panels.
Two apparent disadvantages now appear to exist:
1. Logic operates from 12 V ±1O% (may be done to provide maximum speed).
2. Output drive current is insufficient for high-current displays (without 100 rnA, or
more, the larger matrix panels will use discretes or another technology).
These shortcomings may be modified with time, although it is doubtful if 500 rnA to 1 A
DMOS outputs are practical.
2-35
D
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
Dielectric Isolation
Affording the highest breakdown voltage capability of present technologies is dielectric
isolation. Since there is no collector-to-substrate PN junction, nor a collector-to-isolation wall
PN junction, considerable improvement in collector-to-base and collector-to-emittervoltage is
possible. Additionally, transistor sizes are considerably smaller than their PN-isolated counterparts. The dielectric ally isolated devices offered by Dionics span a spectrum of approximately 100 volts to 280 volts (a-c plasma driver). DI affords the maximum breakdown voltage
capability currently available.
Opposing this great advantage in breakdown voltage, however, is the increased process
complexity of dielectrically isolated Ies. Definite improvements are needed in the area of
process simplification, cost reduction, and alternate sources. Large-volume use of DI circuits
will be restrained until these problems (particularly alternate sources) can be overcome. DI
interface, with its potential for 300 V transistors, has a great promise if the barriers can be
overcome.
Packaging
Semiconductor design and process have greatly outstripped packaging currently in use,
particularly in the area of power~handling capability. Greater concentration and resources are
required to solve some of the following display interface related problems:
1. DIP power dissipation.
2. Greater number of leads (and smaller package sizes).
3. Improved plastic DIP resistance to moisture and corrosive environments.
4. Lower package manufacturing costs.
5. Smaller module or display subassemblies.
2-36
HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
Power dissipation difficulties (strobed high currents) are most associated with LEDs. Use of
very low duty-cycle and bright LEDs (particularly alphanumeric and matrix) dictates a need for
multiplexing with peak currents as high as 3 A. Nothing currently on the, market exceeds
I. 75 A per output, and DIP ratings preclude doc operation at such currents. However, many of
the high-current applications are within the capability of standard bipolar ICs now offered.
For LSI ICs containing many I/O lines, the 24-,28-, and 40-lead DIPs are standard. Since
package size and cost increase together, it may be desirable to constrain many newer ICs to
18-,20-, or 22-lead DIPs (with 0.300" spacing, 22 also in use with 0.450" width). Printed
wiring board real estate is increasingly dictating smaller size. Solutions such as the quad in-line
(Rockwell) or less than 0.100" centers are possible. There are problems associated with a
non-standard configuration (lack of sockets and higher prices) and the smaller physical size
will not aid the quest for higher power (LEDs).
Improvements in plastic DIP moisture resistance and reliability are already underway; uses
of tri-metal schemes (such as RCA's), silicon nitride or quartz passivation will continue to
improve resistance to moisture and corrosive fumes. For display applications, these reliability
improvements are of greatest concern in high-voltage devices.
Lower package costs are necessary to further increase the use of ICs in areas such as flat
panel matrix displays. Currently, much of the cost of such a system is related to drive
electronics, and much of the cost of the interface is the assembly cost of the DIPs (or hybrids).
Increased use of automated assembly, film-carrier techniques and solder bumps will enhance
the choice of ICs over discretes, and flat panel over CRT.
Also of concern is the possible mating of IC chips, solder-bump chips, or film-strip chips
into the display assembly. Candidates for such a treatment would include doc and a-c plasma,
LEDs (already being done to a degree), DCEL, ACEL, LCD, and VF. Panel technologies
using thick or thin-film techniques could benefit from such an approach. The biggest barrier to
such. an integrated assembly is the market data needed to justify tooling and lead time. It will
only require one manufacturer willing to be a pioneer to further swing display technology into
integrated systems. Prospects for purchasing a display complete with all drive electronics,
such as a flat panel a-c plasma matrix (chips mounted via hybrid techniques on the rear of the
glass envelope), are improving with time.
2-37
o
HIGH·VOLTAGE INTERFACE DRIVERS (Continued)
Summary
A bright future exists for IC interface in display systems; the combination of logic (from
MSI to small LSI) with suitable output buffers will further assist display designs. The
following IC Technology-Display Interface matrix lists the key characteristics and primary
display applications of various semiconductor technologies. Since many of these characteristics are changing, the table lists the device characteristics either now available or for the near
future.
The most dynamic technologies for the immediate future appear to be BiMOS, I'L,
CMOS/DMOS, and, perhaps soon, DMOS. Sprague, Dionics, RCA, Texas Instruments,
National Semiconductor, .and others are using these device technologies to carve market niches
where suitable. The dynamics of the IC market make for an uncertain future for any supplier of
display circuitry unable or unwilling to continue the technological advancement necessary to
meet the ch~nging demands of the display market.
IC TECHNOLOGY - DISPLAY INTERFACE
Technology
Breakdown V
Output 1
Speed
Complexit~
Range
Supply
Power
Primary Display
Suitability
(max)
Linear Process 10 to =170 V
Bipolar
11L
20 to =60 V
jc ..•••••..•.•..••.•••••.••..•.••.••.....•.••..•.••.••.••.••.••.••••••••.••..••••.••••••• 40°CjW
Junction to still air, <1>;0' •..••.••.•..•.••.•••...••••••.••.••••.••.•••••.•••••..•.•••••..•..••••..•.••.•••.. 60°CjW
*<1>;0 of 60·C/W p~rmits operation of four outputs continuously and simultaneously at 250mA with a junction temperature which will not exceed +150·C (<1>;)
at a +85·C ambient.
3-4
SERIES UHP·400, UHP·400·1 and UHP·SOO
POWER and RELAY DRIVERS
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Driven
Other
Input
Input
Vee
Characteristic
Symbol
"I" Input Voltage
"0" Input Voltage
"0" Input Current at all Inputs
except Strobe
"0" Input Current at Strobe
"I" Input Current at all Inputs
except Strobe
"I" Input Current at Strobe
V·" 1
V'"IO)
Temp.
M[N
M[N
['"'0'
MAX
MAX
MAX
MAX
MAX
MAX
lin 0
1;"(11
1;"111
Limits
Output
Min.
Typ.
Max.
Units
2.0
0.8
0.4V
0.4V
2.4V
5.5V
4.5V
4.5V
OV
OV
OV
OV
2AV
5.5V
Notes
V
V
-0.55
-0.8
-1.1
-1.6
mA
mA
I'A
mA
IJ.A
mA
40
I
100
I
2
2
2
SWITCHING CHARACTERISTICS at Vcc= 5.0V, TA = 25°C
Characteristic
Turn-on De[ay Time
Series UHP-400
Series UHP-400-1
Series UHP·500
Turn·off De[ay Time
Series UHP-400
Series UHP-400-1
Series UHP-500
Symbol
tpdO
Test Conditions
Vs
Vs
Vs
Min.
Typ.
Limits
Max.
Units
200
500
ns
3
3.0.0
750
ns
3
= 40V, Rl = 265 Q (6 Watts)
= 70V, Rl = 465 Q (10 Watts)
= 100V, Rl = 670 Q (IS Watts)
Notes
Cl=lSpF
tpdl
Vs = 40V, Rl = 265 Q (6 Watts)
Vs = 70V, Rl = 46511 (10 Watts)
Vs = 100V, Rl = 670 n (15 Watts)
Cl.= lSI'F
NOTES:
1. Typica[ values are at Vee = 5.0V, TA = 25°C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.
INPUT PULSE CHARACTERISTICS
V,"(O) = OV
V'"111
= 3.5V
tf = 7ns
t, = 14ns
3-5
tp = II'S
PRR = 500kHz
o
SERIES UHP-400, UHP-400-1 and UHP-SOO
POWER and RELkY DRIVERS
Type UHP-400, UHP·400-1, and UHP-500
Quad 2·lnput AND Power Drivers
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Temp.
Symbol
Test Conditions
Driven
Input
Vee
Limits
Other
Input
Output
Min.
Typ.
Max.
Units
Notes
"I" Output Reverse Current
Type UHP-400
"I" Output Reverse Current
Type UHP-400-1
"I" Output Reverse Current
Type UHP-500
"0" Output Voltage
"I" Level Supply Current
"0" Level Supply Current
loll
MIN
2.0V
2.0V
40V
50
p.A
loff
MIN
2.0V
2.0V
70V
50
p.A
loff
MIN
MIN
MIN
MAX
MAX
2.0V
0.8V
0.8V
5.0V
OV
2.0V
Vee
Vee
5.0V
OV
IOOV
50
0.5
0.7
6
24.5
p.A
V
V
rnA
rnA
Vo"
NOM
NOM
!celli
lee(ol
150mA
250rnA
4
17.5
I 2
1,2
NOTES:
1. Typical values are at Vee = 5.0V, TA = 25'C.
2. Each gate.
3. Capacitance values specified include probe and test fixture capacitance.
OUT-
PUTriV~ I
- _,
Rl
I
I
)
I
)
I
(
I
I
I
INPUT
I
I
,
,
I
tpdl
ISpF
OUTPUT
: -:: LOAD
I
CIRCUIT
I
I
II
.J tpdO
I~_ _ _---,: - -
-r---------1
,
lIN,,""
1
50%
.
I
"' ______ .J
~"G.
.~,oe;;:Yo~_ _ _ Vin(O)
10%
50%
L
OWG.
NO. A-7876D
3-6
u
V oc ,lI)
Vo,,)O)
No.
A-7628C
SERIES UHP-400, UHP-400-1 and UHP-SOO
POWER and RELAY DRIVERS
Type UHP-402,UHP-402-1, and UHP-S02
Quad 2-lnput OR Power Drivers
D
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Limits
Vee
Driven
Input
Other
Input
Output
loff
MIN
2.0V
OV
40V
50
p.A
lofl
MIN
2.0V
OV
70V
50
p.A
loff
Vo,
MIN
MIN
MIN
MAX
MAX
2.0V
OV
O.SV
O.SV
O.SV
O.SV
100V
150mA
250mA
50
0.5
0.7
5.0V
OV
5.0V
OV
p.A
V
V
mA
mA
Symbol
Temp.
Min.
Typ.
Max.
Units
Notes
"I" Output Reverse Current
Type UHP-402
"I" Output Reverse Current
Type UHP-402-1
"I" Output Reverse Current
Type UHP-502
"0" Output Voltage
"I" Level Supply Current
"0" Level Supply Current
NOM
NOM
leCl! )
leClo)
4.1
6.3
IS
25
1,2
1,2
NOTES:
1. Typical values are at Vee = 5.0V, TA = 25°C.
2. Each gate.
3. Capacitance values specified include probe and test fixture capacitance.
INPUT
VCc=5V
OUTPUT
Vs
INPUT
1
I
,
I
I
I
I
:
I
I
ISpF
,
'pdl
:lNO'.3) :
-:
t '=
LOAD
:
I
CIRCUIT
L
____
.J
I
OUTPUT
I
I
-r----+I
1
I
r-
-\
50%
•
50%
'pdO
L
'r-----..,~
--
--Vout(1)
VOD'(O)
DWG. Mo. A-7628C
DWG.
Ho:A-7377A
3-7
SERIES UHP~400, UHP-400-1 and UHP-500
POWER and RELAY DRIVERS
Type UHP-403, UHP-403-1, and UHP-S03
Quad OR Relay Drivers
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Cha racteristic
Limits
Vee
Driven
Input
loff
MIN
2.0V
OV
loff
MIN
2.0V
loff
MIN
MIN
MIN
NOM
NOM
MAX
MAX
2.0V
0.8V
0.8V
OV
Vee
S.OV
OV
Symbol
Temp.
Other
Input
Output
Min.
Typ.
Max.
Units
40V
100
p.A
OV
70V
100
p.A
OV
0.8V
0.8V
OV
Vee
5.0V
OV
100V
150mA
250mA
OPEN
100
0.5
0.7
200
1.75
6.3
2S
p.A
V
V
p.A
V
mA
mA
Notes
"I" Output Reverse Current
Type UHP-403
"I" Output Reverse Current
Type UHP-403-1
"I" Output Reverse Current
Type UHP-503
"0" Output Voltage
Voo
Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current
ILK
Vo
ICell )
lee(o)
NOM
NOM
NOM
NOM
1.5
4.1
18
3
4
1,2
1,2
NOTES:
1. Typical values are at Vee ~ S.OV. TA ~ 2SoC.
2. Each gate.
3. Diode leakage current measured at V. ~ Vof!(m;o).
4. Diode forward voltage drop measured at If ~ 200mA.
5. Capacitance values specified include probe and test fixture capacitance.
INPUT
OPEN OUTPUT
,---
----I
I
RL
.....--4-_;....'-+
:
I
I
I
I
I
I
I
,
15pF
INPUT
:
,
tpd\
...I150%.
"=:"lOAD I
O_U_T_PU_T_ _ _ _
L.s:I~C~I:' _:
NO. A-9123A
.:
tpdO
1,-----....,: __
I
]Note5)1
[J~.
I
~
50°;
LV
--VouH]1
OWG. No.
3-8
ooHm
A-762BC
SERIES UHP-400, UHP-400-1 and UHP-500
POWER and RELAY DRIVERS
Type UHP-406, UHP-406-1, and UHP-S06
Quad AND Relay Drivers
o
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
Temp.
Vee
Test Conditions
Driven
Other
Input
Input
Limits
Min.
Output
Typ.
Max
Units
100
)LA
Notes
"I" Output Reverse Current
Type UHP-406
"1" Output Reverse Current
Type UHP-406-1
"I" Output Reverse Current
Type UHP-506
"0" Output Voltage
Oiode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current
ILK
Vo
!cell!
!celo)
loff
MIN
2.0V
2.0V
40V
loti
MIN
2.0V
2.0V
70V
100
)LA
loll
Vo,
MIN
MIN
MIN
NOM
NOM
MAX
MAX
2.0V
0.8V
0.8V
OV
Vee
5.0V
OV
2.0V
Vee
Vee
OV
Vee
5.0V
OV
WOV
150mA
250mA
OPEN
100
0.5
0.7
200
1.75
6
24.5
)LA
V
V
)LA
V
mA
mA
NOM
NOM
NOM
NOM
1.5
4
17.5
3
4
1,2
1,2
NOTES:
I. Typical values are at Vee ~ 5.0, TA ~ 25'C.
2. Each gate.
3. Diode leakage current measured at VR ~ Vofflm;,).
4. Diode forward voltage drop measured at II ~ 200mA.
5. Capacitance values specified include probe and test fixture capacitance.
)NPLIT
10%
I
I
tpdl
I
OUTPUT
I
~
I
'1
'pdo
jrsO-%---sO'%'-o""'
--L
_ _ _ _ _-.l~
OWl). ;;0.
I"
--Vout(l)
vout(O)
A-7C78A
O'llG. 110. A-7628C
3-9
SERIES UHP-400,UHP-400-1 and UHP-SOO
POWER and RHAYDRIVERS
Type UHP·407, UHP·407·1, and UHP·S07
Quad NAND Relay Drivers
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
Temp.
..Test Conditions
Driven
Input
Vee
Other
Input
Limits
Output
Min.
Typ.
Max.
Units
JJ.A
Notes
"I" Output Reverse Current
Type UHp·407
"I" Output Reverse Current;
Type UHp·40)·1
"I" Output Reverse Current
Type UHp·507
"0" Output Voltage
Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current
loll
MIN
0.8V
Vcc
40V
100
Iff
MIN
0.8V
Vcc
70V
100
"A
loff
MIN
MIN
MIN
NOM
NOM
MAX
MAX
0.8V
2.0V
2.0V
Vee
OV
OV
5V
Vcc
2.0V
2.0V
Vee
OV
OV
5V
100V
150mA
250mA
OPEN
100
0.5
0.7
200
1.75
7.5
26.5
JJ.A
V
V
JJ.A
V
mA
mA
Von
NOM
NOM
NOM
NOM
ILK
Vo
icelll
icCiol
1.5
6
20
4
5
1,2
1,2
NOTES:
I. Typical values are at Vee ~ 5.0V, TA ~ 25°C.
2. Each &ate.
3. Capacitance values specified include probe and test fixture capacitance.
4. Diode leakage current measured at VR ~ Voff{mlnl.
5. Diode forward voltage drop measured at If ~ 200mA.
INPUT
2.4V VCC=5V 0 EN
o~;:
Vs
rj----l
RL
INPUT
....." - - - - - Vin(O)
,,
I
lSpF
:TNo,.3)
OUTPUT
: -=
I
LOAD
CIRCUIT
ow.,;,
NO. A-7SG9A
L _____
1
J
3-10
SERIES UHP-400, UHP-400-1 and UHP-500
POWER and RELAY DRIVERS
Type UHP-408, UHP-408-1, and UHP-S08
Quad 2-lnpul NAND Power Drivers
o
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
Temp.
Test Conditions
Driven
Input
Vee
Limits
Other
Input
Output
Min.
Typ.
"I" Output Reverse Current
Type UHP-40S
"I" Output Reverse Current
Type UHP-40S-1
"I" Output Reverse Current
Type UHP-50S
"0" Output Voltage
"I" Level Supply Current
"0" Level Supply Current
Max.
Units
loff
MIN
O.SV
Vee
40V
50
)J.A
loff
MIN
O.SV
Vee
70V
50
)J.A
Inff
Vo,
MIN
MIN
MIN
MAX
MAX
O.SV
2.0V
2.0V
OV
5.0V
Vee
2.0V
2.0V
OV
5.0V
100V
150mA
250mA
50
0.5
0.7
7.5
26.5
"A
V
V
mA
mA
NOM
NOM
leell)
lee(o)
6
20
Notes
1,.2
I, 2
NOTES:
1. Typical values are at Vee = 5.0V, TA = 25'C.
2. Each gate.
3. Capacitance values specified include probe and test fixture capacitance.
4. Diode leakage current measured at V. = Vofl(m;,).
5. Diode forward voltage drop measured at If = 200mA.
OUT-
PUT
Vs
INPUT
Ui:l!.... _ _ _ _
V;,(O)
I
iI
I
I
lSpF
Vovt(T}
(Note 3)
OUTPUT
: -=-
LOAD
I'- ______
CIRCUlT .J
--- - -- OWG. 110.
D'I/G. No. A-~638
3-11
Vout(O)
~-1900A
SERIES UHP·400, UHp·400·1 and UHP·SOO
CPOWER and RELAY DRIVERS
Type UHP-432, UHP-432-1, and UHP-S32
Quad 2-lnput NOR Power Drivers
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Test Conditions
Driven
Input
Vcc
Other
Input
Output
loll
MIN
0.8V
0.8V
40V
50
p.A
loff
MIN
0.8V
0.8V
70V
50
p.A
loff
MIN
MIN
MIN
MAX
MAX
0.8V
Z.UV
2.0V
5.0V
OV
0.8V
UV
OV
5.0V
OV
100V
SOmA
250mA
50
0.5
0.7
25
7.5
p.A
V
V
mA
mA
Symbol
"1" Output Reverse Current
Type UHP-432
"1" Output Reverse Current
Type UHP-432-1
"1" Output Reverse Current
Type UHP-532
"0" Output Voltage
YO"
"0" Level Supply Current
"1" Level Supply Current
ICCIOI
ICCI1I
Temp.
NOM
NOM
Limits
Min.
Typ.
20
6
Max.
Units
Notes
12
1,2
NOTES:
1. Typical values are at Vcc ~ 5.0V. TA ~ 25°C.
2. Each gate.
3. Diode leakage current measured at V. ~ Volllml"l·
4. Diode forward voltage drop measured at II ~ 200mA.
5. Capacitance values specified include probe and test fixture capacitance.
OUlINPUT
Vce=5V
PUT
Vs
INPUT
"'-".....- - - - vI"IOI
I
I
:
15pF
~--VQUt(l)
: 1(Note 5)
I
I
J
LOAD:
CIRCUIT I
L ____
D~!G.
OUTPUT
'--_-J.___ - - - - Vout(O)
.J
OWG. NO. A-1900A
i'l0. A-79024
3-12
SERIES UHP-400, UHP-400-1 and UHP-SOO
POWER and RELAY DRIVERS
Type UHP-433, UHP-433-1, and UHP-S33
Quad NOR Relay Drivers
II
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise' noted)
Test Conditions
Characteristic
Symbol
Temp.
Vcc
Other
Input
Output
MIN
0.8V
0.8V
"I" Output Reverse Current
Type UHP-433
"I" Output Reverse Current
Type UHP-433-1
"I" Output Reverse Current
Type UHP-533
"0" Output Voltage
Von
Diode Leakage Cu rrent
Oiode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current
ILK
VD
Icc 1
KeClo)
loff
Limits
Driven
Input
Max.
Units
40V
100
p,A
VCC=5V
OPEN
Typ.
loff
MIN
O.8V
0.8V
70V
100
p,A
loff
MIN
MIN
MIN
NOM
NOM
MAX
MAX
0.8V
2.0V
2.0V
Vee
OV
OV
5V
0.8V
OV
OV
Vee
OV
OV
5V
10DV
150mA
250mA
OPEN
100
0.5
0.7
200
1.75
7.5
25
p,A
V
V
p,A
V
mA
mA
NOM
NOM
NOM
NOM
1.5
6
20
NOTES:
L Typical values are at Vee ~ 5.0, TA = 25°C.
2. Each gate.
3. Diode leakage current measured at VR = Voff(m;n).
4. Diode forward voltage drop measured at If = 200mA.
5. Capacitance values specified include probe and test fixture capacitance.
INPUT
Min.
OUTPUT
Vs
INPUT
OUTPUT
3-13
Notes
3
4
I, 2
1,2
SERIES ULN-2000A
HIGH· VOLTAGEi~HIGH-CURRENTI)ARLINGTON TRANSISTOR ARRAYS
SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON TRANSISTOR ARRAYS
THESE high-voltage, high-current Darlington arrays are comprised of seven silicon NPN Darlington pairs on a common monolithic substrate. All
units feature open collector outputs and integral
diodes for inductive load transient suppression. Peak
inrush currents to 600 mA (Series ULN-2000A and
ULN-2020A) or 7S0 mA (Series ULN-2010A) are
permissable, making them ideal for driving tungsten
filament lamp loads.
The Series ULN-200IA devices are general purpose
arrays which may be used with standard bipolar digital
logic using external current limiting, or with most
PMOS or CMOS directly. All are pinned with outputs opposite inputs to facilitate ease of circuit board
layout and are priced to compete directly with discrete
transistor alternatives.
D~'G.
MO.
A-959~
pole" logic output. Typical voltage and current
levels for both the Series ULN-2003A and ULN200SA are shown in the graphs.
The Series ULN-2000A is the original high-voltage,
high-current Darlington array. The output transistors
are capable of sinking SOO mA and will sustain at
least SO V in the OFF state. Outputs may be paralleled for higher load current capability. The Series
ULN-2010A devices are similar except that they will
sink 600 mA. The Series ULN-2020A will sustain
9S V in the OFF state.
The Series ULN-2002A was specifically designed for
use with 14 to 2S V PMOS devices. Each input has a
Zener diode and resistor in series to limit the input
current to a safe value in that application. The Zener
diode also means excellent noise immunity for these
devices.
The Series ULN-2003A has a 2.7 k rl series base resistor to each Darlington pair, and thus allows operation directly with TTL or CMOS operating at a supply voltage of S V. These devices will handle numerous interface needs - particularly those beyond the
capabilities of standard logic buffers.
All Series ULN-2000A Darlington arrays are furnished in a 16-pin dual in-line plastic package.
Device Type Number Designation
VCE(MAX) =
IC(MAX) =
The Series ULN-2004A features a 10.5 k rl series
input resistor to permit their operation directly from
CMOS or PMOS outputs utilizing supply voltages of
6 to IS V. The required input current is below that of
the Series ULN-2003A while the required input voltage is less than that required by the Series ULN-2002A.
General Purpose
PMOS, CMOS
14 - 25 V
PMOS
5V
TTL, CMOS
6 - 15 V
CMOS, PMOS
High Output
TTL
The Series ULN-200SA is especially designed for
use with standard and Schottky TTL where higher
output currents are required and loading of the logic
output is not a concern. These devices will sink a
minimum of 3S0 mA when driven from a "totem
3-14
50 V
500 mA
50 V
600 mA
Type Number
95 V
500 mA
ULN-200IA
ULN-2011A
ULN-2021A
ULN-2002A
ULN-2012A
ULN-2022A
ULN-2003A
ULN-2013A
ULN-2023A
ULN-2004A
ULN-2014A
ULN-2024A
ULN-2005A
ULN-2015A
ULN-2025A
SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
ABSOLUTE MAXIMUM RATINGS at 25°C Free-Air Temperature
for anyone Darlington pair (unless otherwise noted)
Output Voltage, VCE (Series ULN-2000, 2010A) ........................................................... 50 V
(Series ULN-2020A) ............................................................... 95 V
Input Voltage, VIN (Series ULN-2002, 2003, 2004A) ....................................................... 30 V
(Series ULN-2005A) ................................................................. 15 V
Continuous Collector Current, Ic (Series ULN-2000, 2020A) ............................................... 500 rnA
(Series ULN-201OA) .................................................... 600 rnA
Continuous Input Current, liN' ..................................................................... 25 rnA
Power Dissipation, PD (one Darlington pair) ........................................... , ................ 1.0 W
(total package) ............................................................... 2.0 W·
Operating Ambient Temperature Range, TI .................................................... -20°C to +85°C
Storage Temperature Range, Ts ........................................................... -55°C to + 150°C
'Derate at the rate of 16.67 mW/OC above 25°C.
Under normal operating conditions, these devices will sustain 350 mA per output with VCE(SATI = 1.6 Vat 70°C with a pulse width of 20 ms and a duty cycle of 34%.
PARTIAL SCHEMATICS
rl~~ COM
.---*--0 COM
7V
,
10. SK
i,
,
,,,
,,,
___ I
___ I
0101(0. Mo.
ow,;.
~O'.
A-965 1
A-9595
Series ULN-2001 A
(each driver)
Series ULN-2002A
(each driver)
Series ULN-2003A
(each driver)
.---*--0 COM
.----+1---0 COM
to. SK
1. OSK
OWCi. liD.
(>'G. NO. A-IO,22S
A-9898A
Series ULN-200SA
(each driver)
Series ULN-2004A
(each driver)
3-15
II
SERIES ULN-2000A
HIGFI~VOLTAGE; HIGH-CURRENT DARUNGTONTRANSISTOR ARRAYS
SERIES ULN-2000A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
leEx
Test
Fig.
Applicable
Devices
1A
All
1B
Collector-Emitter
Saturation Voltage
VeEISAT)
Input Current
IINION)
Input Voltage
ULN-2002A
ULN-2004A
2
All
IINIOFF)
VINION)
3
4
5
ULN-2002A
ULN·2003A
ULN-2004A
ULN·2005A
All
ULN-2002A
ULN-2003A
ULN·2004A
D-C Forward Current
Transfer Ratio
I nput Capacitance
Turn-On Delay
Turn·Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
hFE
2
CIN
t plH
t pHl
IR
-
VF
-
6
7
ULN-2005A
ULN·2001A
All
All
All
All
All
Test Conditions
VeE = 50 V, TA = 25°C
VeE = 50 V, TA = 70°C
VeE = 50V, TA = 70 u C, VIN = 6.0V
VeE = 50 V, TA = 70°C, VIN = 1.0V
Ie = 100 mA, Is = 250 llA
Ie = 200 mA, Is = 350 llA
Ie = 350 mA, Is = 500llA
VIN =17V
VIN = 3.85 V
VIN = 5.0V
VIN = 12 V
VIN = 3.0V
Ie = 500 JJ.A, TA = 70°C
VeE = 2.0 V, Ie = 300 mA
VeE = 2.0 V, Ie = 200 mA
VeE = 2.0 V, Ie = 250 mA
VeE = 2.0 V, Ie = 300 mA
VeE = 2.0 V, Ie = 125 mA
VeE = 2.0 V, Ie = 200 mA
VCE = 2.0 V, Ie = 275 mA
VeE = 2.0V, Ie = 350 mA
VeE = 2.0 V, Ie = 350 mA
VeE = 2.0 V, Ie = 350 mA
0.5 E,o to 0.5 Eoo,
0.5 E,o to 0.5 Eo",
VR= 50 V, TA = 25°C
VR= 50 V, TA = }O°C
IF = 350 mA
3-16
Limits
Min. Typ. Max.
Units
-
Il A
-
-
-
-
-
-
50
100
500
500
-
0.9
1.1
-
1.1
l.3
-
1.6
1.25
l.35
0.5
1.45
2.4
50
l.3
0.82
0.93
0.35
1.0
1.5
65
-
-
-
-
-
-
-
-
-
-
-
13
2.4
2.7
3.0
5.0
6.0
7.0
-
-
8.0
-
-
2.4
1000
-
-
-
25
1.0
1.0
50
100
2.0
-
-
-
-
-
-
-
15
0.25
0.25
-
-
-
-
-
1.7
-
Il A
Il A
Il A
V
V
V
mA
mA
mA
mA
mA
JJ.A
V
V
V
V
V
V
V
V
V
pF
JJ.s
JJ.s
JJ.A
Il A
V
SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULN-2010A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic,
OutpufLeakage Current
Symbol
IcEx
Test
Fig.
Applicable
Devices
1A
All
1B
Coliector'Emitter
Saturation Voltage
VCE(SAT)
Input Cu rrent
IIN(ON)
Input Voltage
IIN(OFF)
VIN(ON}
2
3
4
5
Test Conditions
VCE = 50V,TA = 25°C
VCE =50'V, TA = 7O' OC
ULN-2O'12A VCE =50V; TA = 70°C, VIN = 6.0' V
ULN-2O'14A V~E = 50' V, TA =lO'oC, VIN = 1.0' V
Ic = 2O'OmA, IB, = 35O'/LA
All
Ic = 35O'mA, IB = 50'0' /LA
Ic ;= 50'0' rnA, 18 = 60'0' /LA
ULN·2O'12A Vito( = 17 V
ULN·2O'13A VIN = 3.85)1
ULN-2O'14A VIN ;';5.O'V
VIN = 12V
ULN-2O'15A V,N '= 3.0V
All
,I e =50O';uA, TA = 7O'·C
ULN-2012A VCE == 2.0V, Ic =500' rnA
ULN·2O'13A. VC,E =2.0' V, Ie "" ,250' rnA
VeE =2.0' V, le= 30'0' rnA
VCE =2.0' V, Ic = 50'0' rnA
ULN·2O'I4A VCE ",,2.O'V, Ic = 275mA
VeE = 2.0 V, Ic = 35O'mA
VCE = 2.0' V, Ic = 50'0 rnA
ULN-Z015A VCE = 2.0 V, Ie = 500 rnA
ULN·2DllA VcE ,=2.0V, Ie =' 350l]1A
VCE '= 2.0' V, Ie = 500' rnA
All
All
0.5 Ein to 0.5 Eo••
0.5 E1n to 0.5 Eou•
Ail
All
VR= 50 V, TA = 25°C
VR= 50' V, TA = 7O' oC
All
IF = 350' rnA
IF = 5O'O"mA
,
D·C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn·Off Delay
Clamp Qiode
Leakage Current
I Clamp[}iode
Forward Voltage
hFE
CIN
t pLH
t pHL
IR
VF
2
6
7
"
3-17
Limits
Min. Typ. Max. Units
-
50'
-
-
-
1.1
1.3
1.7
-
-
1.6
1.9
0'.82 1.25
0'.93 1.35
0'.35 0'.5
1.0 1.45
1.5 2.4
65
17
- 2.7
3.0'
- 3.5
7.0'
8.0
9.5
2,6
-
1000' 900' 15
0.25
0.25
-
50
100
50'0'
50'0'
1.3
1.7
2.1
pA
/LA
/LA
/LA
V
V
V
rnA
rnA
rnA
rnA
rnA
/LA
V
V
V
V
V
V
V
V
-
pF
25
LO'
/LS
l.O' • /LS'
50 "/LA
100 /LA
V
2.0
2.5
V
HI
SERIES ULN-2000A
HIGH-VOlTAGE,HIGH-CURRENTDARlINGTON TRANSISTOR ARRAYS
SERIES ULN·2020A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Lea kage Cu rrent
Symbol
IcEx
Test
Fig.
Applicable
Devices
1A
All
1B
Collector-Em itter
Saturation Voltage
VCE(SAT)
Input Current
IIN(ON)
Input Voltage
I'N(oFF)
VIN(ON)
2
3
4
5
ULN-2022A
ULN-2024A
All
ULN-2022A
ULN-2023A
ULN-2024A
ULN-2025A
All
ULN-2022A
ULN-2023A
ULN-2024A
D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
hFE
2
CIN
t plH
t pHl
I.
-
VF
6
7
ULN-2U25A
ULN-2021A
All
All
All
All
All
Test Conditions
VCE = 95V, TA = 25°C
VCE = 95 V, TA = 70°C
VCE = 95V, TA = 70°C, VIN = 6.0V
VCE =95 V, TA = 70°C, VIN = 1.0 V
Ie = 100 mA, I. = 250}J.A
Ic = 200 mA, I. = 350}J.A
Ic = 350 mA, I. = 500}J.A
VIN = 17 V
VIN = 3.85 V
VIN = 5.0 V
VIN = 12 V
VIN = 3.0 V
Ic = 500 }J.A, TA = 70°C
VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 250 mA
VCE = 2.0 V, Ic = 300 mA
c
VCE = 2.0 V, Ic = 125 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ic = 350mA
....
Limits
Min. Typ. Max. Units
-
3-18
-
50
100
500
500
-
-
-
-
-
0.9
1.1
-
1.1
-
50
1.3
0.82
0.93
0.35
1.0
1.5
65
1.3
1.6
1.25
1.35
0.5
1.45
2.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1000
-
0.5EI" to 0.5 Eo"
0.5 E1" to 0.5 Eo"
V. = 95 V, TA = 25°C
V. = 95 V, TA = 70°C
IF = 350 mA
-
-
15
0.25
0.25
-
-
-
-
-
-
1.7
13
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4
}J.A
}J.A
}J.A
}J.A
V
V
V
mA
mA
mA
mA
mA
}J.A
V
V
V
V
V
V
V
V
V
-
25
1.0
1.0
50
100
2.0
pF
}J.s
}J.s
}J.A
}J.A
V
SERIE~ ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
TEST FIGURES
OPEN
VeE
OPEN
VeE
OPEN
Dwg. No. A-9729A
FIGURE IA
FIGURE 18
OPEN
OPEN
~
____-OOPEN
Dwg. No. A-9732
Owg. No. A-9731
FIGURE 3
FIGURE 2
OPEN
CPEN
VeE
Dwg. No. A-9733A
Dwg. No. A-9734A
FIGURE 5
FIGURE 4
v,
Dwg. No. A-9735A
FIGURE 7
FIGURE 6
3-19
·SERIESULN·2000A
HIGH.VOLTAGE, HIGH-CURRENT DARLINGtONTRANSrSTO~ ARRAYS
COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLT AGE
COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT
,
600
l
I'
i
~
/
,., ,J?'v)..."
400
~
I.'G~
"~
0
-?
200
u
o
o
0.5
..-'
,~
,
,
,
,,
=>
~' ~""
~#
'A~·
"'I
u
2 200
~
ou
,,"
V
/
VL
""
IlL
2.0
,,
"',
,,
....i;'
""E 400
4, 'v
~~'< ,0""
::>
u
o~
o
"
600
~
,/
V
/
V
/
MAXIMUM REQUIRED
INPUT CURRENT
400
200
INPUT CURRENT IN f.lA - liN
SATURATION VOLTAGE - VeE {SAn
DWG.NO. A-97SIIB
600
!)W(l.1'IO. A-IO.S7ZA
ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
0
\EVICELIMIT
u
o~
:;:
""E
"~
5
450
400
=>
u
2
~
0
u
~"
\
\,
0
350
\
300
\'<>0
~~
250
:i
~
""
200
""
150
"g
~\
20
50
60
70
PER CENT DUTY CYCLE
so
90
50
100
AMBIENT TEMPERATURE IN
100
°c
150
DWG.NO. A-97S3B
DWG.HO.A-97S2A
3-20
SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
2.0
~ ....-'-
J.
~
E
1.5
~
~
1.0
~
O.
::l
U
~
-'
~
J.~ .-.-'-
V
2.0
loS
~}~\C.~~_
'",.
,'"
'"
E
.-1-'-
~
~
::l
u
~.-
12
~
14
16
18
20
22
~
24
~
1.0
0.5
---
~
~--
-- --"
~
...-- ?
~~C!.\.
INPUT VOLTAGE - VIN
--
__
10
26
INPUT VOLTAGE - VIN
II
~W-.l.
NO. HI809A
D~. NO, A-97S7A
SERIES ULN-2004A
SERIES ULN-2002A
3.01--+--+--+--A.1»----.I
2,5
z
2.0
'~"
J.
2,5J---+--+---Io~~~---.I
2.01-_+-_4 "J~M\~~~~-l
~E 1,5
~ 1.51-_+----.l~~>,;;.~~~~~
~
u
::l
~
1,0
~
0.5
::l
U
HI
~
.--
z~ 1.0 1-_#-~~~~~__1I----.I
~
oL-__L-~L-__~---L--~
1.5
INPUT VOLTAGE - Y,N
2.0
2.5
3,0
3.5
INPUT VOLTAGE --V 1N
~O.
SERI.ES ULN-2003A
SERIES ULN-200SA
3-21
4.0
;... 10. 258
12
SERIES ULN-2000A
HIGH-VOLTAGE,· HIGH-CURRENT DARLINGtON tRANSISTOR ARRAYS
TYPICAL APPLICATIONS
ULN·2002A
ULN·2003/05A
+V
ll----t
PMOS
OUTPUT
OWG. Mo. 0\-9652
TTL
OUTPUT
PMOS TO LOAD
TTL TO LOAD
ULN·2004A
ULN·2003A
+Vee
+V
Rp
c~j
OUTPUT
OI\'G. MO • •-10.175
TTL
OUTPUT
USE OF PULL-UP RESISTORS
TO INCREASE DRIVE CURRENT
BUFFER FOR HIGHER CURRENT LOADS
3-22
SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
TYPICAL PRINTER INTERFACE
F
1
r./\A
~ I ~ECIMAL
FEED
pco
5/4 '0
PCI
STRO
STRl
PC2
PC3
ST'2
PC4
STR3
;;
pe5
STR4
~~
PC6
0
STR5
:t
Sl
~
STR6
STR7
KBRI
gj
o~
:JA
80°C/W
45°C/W
375°C/W
27.5°CIW
2.0 ~--+--t-''Ir--"""",,----''r---Ir---I
GJA
12.5
22.2
26.7
36.4
mW/oC
mW/oC
mW/oC
mW/OC
1.'
AMBIENT TEMPERATURE IN
Type Number
°c
1l'II'6. JIG ....... IO,M2
UlN-2061M
UlN-2062M
VCEX(MAX)
50 V
80 V
VCE(SUSXMIN)
35 V
50 V
VII'I(MAX)
30 V
60 V
Application
TTl, OTl, Schottky TTl,
and 5 V CMOS
UlN-2064B
UlN-2065B
50 V
80 V
35 V
50 V
15 V
15 V
TTl, OTl, Schottky TTl
and 5 V CMOS
UlN-2066B
UlN-20678
50 V
80 V
35 V
50 V
30 V
30 V
6 to 15 V CMOS
and PMOS
UlN-20688
UlN-20698
50 V
80 V
35 V
50 V
15 V
15 V
TTl, OTl, Schottky TTl,
and 5 V CMOS
UlN-20708
UlN-2071B
50 V
80 V
35 V
50 V
30 V
30 V
6 to 15 V CMOS
and PMOS
UlN-2074B
UlN-2075B
50 V
80 V
35 V
50 V
30 V
60 V
General Purpose
UlN-2076B
UlN-2077B
50 V
80 V
35 V
50 V
30 V
60 V
6 to 15 V CMOS
and PMOS
NOTES:
1. Input voltage is with reference to the substrate (no connection to any other pins) for the UlN·206l!62M and UlN·2074/75/76/77B; reference is ground for all other types.
2. Input current may be limited by maximum allowable input voltage.
3-25
II
ULN-2061 Mthrough ULN-2077B
1,5 A DAR.LINGTON SWITCHES
ULN·2061 M and ULN·2062M
PARTIAL SCHEMATIC
350
,,
f
7.2K
...L
SUB
DWl3 . •0.4-IO,3S2A
DWIl.ttO.
A-IO.23QA
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output leakage Current
Symbol
Test
Fig.
Applicable
Devices
ICEX
1
UlN-2061M
UlN-2062M
Output Sustaining Voltage
VCE(SUS)
2
VCE(SAn
3
,
Collector-Emitter
Saturation Voltage
Input Current
Input Voltage
Turn-On Delay
Turn-Off Delay
Clamp Diode
leakage Current
UlN-2061M
UlN-2062M
Both
IIN(ON)
4
UlN-2062M
Both
VIN(ON)
5
Both
tpLH
tpHL
IR
6
Both
Both
UlN-2061M
UlN-Z06ZM
Clamp Diode
Forward Voltage
VF
7
Both
'Pulse-Test
3-26
Test Conditions
VCE = 50 V
VCE = 50 V, TA = 70°C
VCE = 80 V
VCE - 80 V, TA - 70°C
Ic = 100 rnA, VIN = 0.4 V
Ic - 100 rnA, VIN - 0.4 V
Ic = 500 rnA, 18 = 625 ,J.
Ic - 750 rnA, 18 - 935 ,J.
Ic = 1.0 A, 18 - 1.25 rnA
Ic - 1.25 A', 18 - 2.0 rnA
Ic - 1.5 A*, Is 2.25 rnA
VIN = 2.4 V
VIN = 3.75 V
VCE = 2.0 V, Ic = 1.0 A
VCE - 2.0 V, Ic - 1.5 A
0.5 Ein to 0.5 Eout
0.5 Ein to 0.5 Eout
VR = 50 V
VR - 50 V, TA - 70 0 e
VR - 80 V
VR = 80 V, TA - 70 0 e
IF - 1.0 A
IF - 1.5 A
Min.
35
50
-
1.4
3.3
-
-
-
Limits
Max.
100
500
100
500
-
1.1
1.2
1.3
1.4
1.5
4.3
9.6
2.0
2.5
1.0
1.5
50
100
50
100
1.75
2.0
Units
,J.
,J.
,J.
,J.
V
V
V
V
V
V
V
rnA
rnA
V
V
lAs
lAs
,J.
,J.
,J.
j.iA
V
V
ULN·2061 M through ULN·20778
1.5 A DARLINGTON SWITCHES
ULN·2064B through ULN·2067B
PARTIAL SCHEMATIC
____--t---<>c
,,
i,
I
7.2K
,,
th
DWG.NO. '-10.353
II
ULN.2064B} RJN = 350 Q
UlN·2065B
ULN.2066B} RIN
ULN·2067B
= 3kQ
DWG.MO ..... 9765A
(SIMILAR TO ULN-2074B through UlN-2077B)
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
ICEX
Test
Fig.
1
Applicable
Devices
ULN·2064/66B
ULN·2u65/67B
Output Sustaining Voltage
VCE{SUS)
2
Coliector·Emitter
Saturation Voltage
VeE{SAD
3
Input Current
IIN(ON)
4
ULN·2064/66B
ULN·2065/67B
All
ULN·2065/67B
ULN·2064/65B
ULN·2066/67B
Input Voltage
.
VIN(ON)
5
ULN-2064/65B
ULN·2066/6tB
Turn-On Delay
Turn·Off Delay
Clamp Diode
Leakage Current
tpLH
fpHL
IR
-
6
All
All
ULN·2064/66B
ULN·2065/67B
Clamp· Diode
Forward Voltage
VF
7
All
3-27
Test Conditions
VCE = 50 V
VCE = 50 V, TA = 70°C
VCE - 80 V
VCE - 80 V, TA - 70°C
Ie = 100 mA, VIN = 0.4 V
Ie = 100 mA, VIN = 0.4 V
Ic = 500 mA, 18 = 625 ,..A
Ie - 750 mA, 18 = 935 ,..A
Ie = 1.0 A, Is_ = 1.25 mA
~ = 1.25 A, . Ia = 2.0 mA
Ie = 1.5 A, 18 = 2.25 mA
VIN = 2.4 V
. VIN = 3.75 V
VIN - 5.0 V
VIN - 12 V
VCE = 2.0 V, Ie == 1.0 A
VeE - 2.0 V, Ic = 1.5 A
VCE - 2.0 V, Ie - 1.0 A
VCE - 2.0 V, Ie - 1.5 A
0.5 Ein to 0.5 Eoul
0.5 Ein to 0.5 Eoul
VR = 50 V
VR - 50 V, TA - 70°C
VR - 80 V
VR - 80 V, TA = 70°C
IF = 1.0 A
IF - 1.5 A
Min.
-
Limits
Max.
100
500
100
500
35
50
-
-
Ll
1.2
1.3
1.4
1.5
4.3
9.6
1.8
5.2
2.0
2.5
6.5
10
1.0
1.5
50
100
50
100
1.75
2.0
-
1.4
3.3
0.6
1.7
-
-
-
-
Units
,..A
,..A
,..A
,..A
V
V
V
V
V
V
V
mA
mA
mA
mA
V
V
V
V
fols
fols
~
JlA_
.lI!
,..A
V
V
ULN-2061Mthrough ULN-2077B
1.5 A DARLINGTON SWITCHES
ULN·2068B through ULN·2071 B
PARTIAL SCHEMATIC
Vs
RS
~-+---<>c
DWG.NO. A-10,354B
RIN
= 2.5kQ, Rs = 900 Q
UlN-2070B} RIN
ULN-2071B
= 11.6kQ, Rs = 3.4kQ
ULN-2068B)
ULN-2069B,
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Vs = 5.0 V (ULN-2068/698) OR Vs = 12 V (ULN-2070171 B)
Characteristic
Output Leakage Current
Symbol
Test
Fig.
leEx
1
Applicable
Devices
UlN-2068170B
ULN-206917l B
Output. Sustaining Voltage
Collector-Emitter
Saturation Voltage
VeE(SUS)
VeE(SAl)
2
2
ULN-2068170B
ULN-206917l B
ULN-2068/69B
ULN-2069B
ULN-207017lB
ULN-207lB
Input Current
IIN(ON)
4
UL~-2068/69B
ULN-2070171 B
.,
Input Voltage
VIN(ON)
5
Supply Current
Is
8
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
tpLH
tpHL
IR
-
6
ULN-2068/69B
ULN-207017l B
ULN-2068/69B
ULN-207017lB
All
All
ULN-2068/70B
ULN-206917lB
Clamp Diode
Forward Voltage
VF
7
All
Test Cond itions
Min.
VeE = 50 V
VeE - oU V, IA - fU°1;
VeE - 80 V
VeE = 80 V, TA - 70°C
Ie = 100 rnA, VIN = 0.4 V
Ie = 100 rnA, VIN = 0.4 V
Ie = 500 rnA, VIN = 2.75 V
Ie - 750 rnA, VIN - 2.75 V
Ie - 1.0 A, VIN - 2.75 V
Ie = 1.25 A, VIN - 2.75 V
Ie - 1.5A, VIN - 2.75 V
Ie = 500 rnA, VIN - 5.0 V .
Ie - 750 rnA, VIN = 5.0 V
Ie = 1.0 A, VIN = 5.0 V
Ie = 1.25 A, VIN = 5.0 V
Ie = 1.5 A, VIN = 5.0 V
VIN = 2.75 V
VIN= 3.75 V
VIN = 5.0 V
VIN = 12 V
VeE = 2.0 V, Ie = 1.5 A
VeE - 2.0 V, Ie - 1.5 A
Ie = 500 rnA, VIN =2.75 V
Ie - 500 rnA, VIN - 5.0 V
O.5Ein to 0.5 Eout
O.Hin to 0.5 Eout 'Ie =1.25A
VR = 50 V
VR == 50 V, TA = 70°C
VR = 80 V
VR = 80 V, TA = 70°C
IF = 1.0 A
IF = 1.5 A
-
limits
Max.
Units
100
500
100
500
!-IA
35
50
-
-
1.1
1.2
1.3
1.4
1.5
1.1
1.2
1.3
1.4
1:5
550
1000
400
V
V
V
V
V
V
V
V
V
V
V
V
-
-
-
-
-
-
-
-
-
1.250
2.75
5.0
6.0
4,5
1.0
1.5
50
100
50
J.IA
!-IA
!-IA
!-IA
!-IA
!-IA
!-IA
V
V
rnA
rnA
Ils
IlS
J.IA
lOa
!-IA
!-IA
!-IA
1.75
2.0
V
V
ULN-2061 M through ULN-2077B
1.S A DARLINGTON SWITCHES
ULN·2074B through ULN·2077B
PARTIAL SCHEMATIC
/"""""-~-oc
,,
i
7.2K
I
,
I
I
..J...
SUB
3K
DWG. MO. A-10.355
ULN-2074B } RIN = 350Q
ULN-2075B
I)
ULN-2076B} RIN = 3kQ
ULN-2077B
DWG.MO. A-9755A
(SIMILAR TO ULN-2064B through ULN-2067B)
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
ICEX
Test
Fig.
I
Applicable
Devices
ULN-2074176B
ULN-2075177B
Output Sustaining Voltage
Collector-Emitter
Saturation Voltage
Input Current
VCE(SUS)
VCE(SAl)
IIN(ON)
2
3
4
ULN-2074176B
ULN-2075177B
All
ULN-2075177B
UlN-2074175B
ULN-2076177B
Input Voltage
VIN(ON) .
5
ULN-2074175B
ULN-2076177B
Turn-On Delay
Turn-Off Delay
tpLH
tpHL
-
-
All
All
3-29
Test Cond itions
VCE=50V
VCE - 50 V, TA -lOoC
VCE - 80 V
VCE = 80 V, TA = 70°C
Ir = lOa rnA VIN = 0.4 V
Ic = 100 rnA, VIN = 0.4 V
Ic = 500 rnA, IB = 625 ~
Ic - 750 rnA, 18 - 935 ~
Ic - 1.0 A, IB - 1.25 rnA
Ic = 1.25 A, 18- 2.0 rnA
Ic_ = l.5A, IB = 2.25 rnA
YIN = 2.4 V
VIN = 3.75 V
VIN - 5.0 V
VIN - 12V
VCE = 2.0 V, Ic = 1.0 A
VCE - 2.0 V, Ic - 1.5 A
VCE - 2.0 V, Ic - 1.0 A
VCE - 2.0 V, Ic - 1.5 A
0.5 Ein taO.5 Eout
0.5 Ein to 0.5 Eout
Min.
Limits
Max.
Units
-
100
500
100
500
~
~
~
~
35
50
-
-
l.l
l.2
V
V
V
V
V
V
V
rnA
rnA
rnA
rnA
V
V
V
V
/-lS
/-ls
-
-
1.4
3.3
0.6
1.7
-
-
1.3
1.4
1.5
4.3
9.6
1.8
5.2
2.0
2.5
6.5
10
1.0
1.5
ULN-2061 M through UlN-2077B
1.5 A DARLINGTON SWITCHES
TEST FIGURES
OPEN
VeE
OPEN
OPEN
I
DWG. MI), 10.350
OWG. MO . ./1-10,311-9
Figure 3
Figure 2
Figure 1
OPEN
V,
OPEN
:>0-4.--.0 OPEN
D\II1"i. MO.
A-973~A
Figure 6
Figure ..
FigureS
Vs
OPEN
OPEN
DI'IG. MO. A-9736
Figure 7
OWG.tlD. A-IO,351
Figure'
3-,30
ULN-2061 M through ULN-2077B
1.5 A DARLINGTON SWITCHES
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
AT 250 C
14
12
ULN-2066!678
.,,-
ULN-2076/77B
10
,
-~
.;
J
E
~
~
.,
:J
U
i4
8
~
. /~
Z
~3
6
a
~
i-'
/
./
~
""............. ......
V"
......
......
::;~;;."
L
...............
~
~~
5.0
INPUT VOLTAGE - VIN
/
......
~~
~
V"
....... .........
----
INPUT VOLTAGE - VIN
Owg. No. A-JO,357A
Dwg. No. A-IO,363A
UlNLM
U'N.
7V
.5
......
-
--.",. ...
ULN-2065/678
2rJ75
, ....... .--
%K
i8
.0
~
;f
f"'"
COLLECTOR CURRENT AS A FUNCTION
OF INPUT CURRENT AT 25 0 C
/
5
ULN-2061M
ULN-2064/66B
ULN-2074;76B
If
o
o
!
J
1.0
2.0
INPUT CURRENT IN mA - IB
3-31
3.0
DW9. No. A-IO,358A
o
ULN-2061 M through ULN-2077B
1.5 ADARLiN-GTON SWITCHES·
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
OJICE
,,,'
1.5
'\.
u
1.0
R
.,
"
~
'co/Yo
J
uc" '---
,l
~r--~'sco
/You
--...~--
ULN-2061M
ULN-2062M
~~
r\' \.. 1'\
~" ••.o/YE
"-~
uJIT
"
.........
.... I'000o.. r--...
i'... ~ ..... .......
~
2
,/
~ """
I
NUMBER OF OUTPUTS
CONDUCTING
r
SIMULTANEOUSLY
U'T
o
40
20
80
60
PER CENT DUTY CYCLE
, "..... i'...
"~"'"
DEVI
~
::>
u
"
~~
~~
.......
,/
~
NUMBER OF OUTPUTS
CONDUCTING
SIMUl TANEOUSL Y
WW
0.5
Ulr207~B
40
60
PER CENT DUTY CYCLE
~
80
100
DWG. NO.
A~IO,360
1"
~~
o~
~::;
20
RU
---
IMIT
~
1.0
~~
.
o
!mG.ND, A-IQ,3f>(l
1.5
2
100
2064
r--.. r--""-
...,..
.......'"
.........
""'" .........
........r--"""-
UlN-2064 THRU UlN-2~77B
g~
.
40
20
60
80
PER CENT DUTY CYCLE
1
,
OEv,lE
LIM)
........ ......
~
.......
r---..
.......
........
2
.....
~ ...... r--.. ........ ~~
8<
'"" "-
1.0
o~
-..
UlN-2064 thru ULN-2077B
.
~
0.5
WITH STAVER V-8 HEAT SINK
3(C
'"
20
1
40
[
60
80
DEvJE LIM)
1.5
......
i' ........
i'...
::>
2
u
~
4
:;
1
--
100
DWG. NO. A-IO,361
~
1.0
Uu
~~
.
~~
~
4
UlN-2064 thru ULN-20778
WITH STAVER V-7 HEAT SINK
~ .......
1
~ .......
.........
~
........
27.soe/W
0.5
"z
g.
100
20
40
60
PER CENT DUTY eye LE
PER CENT DUTY CYCLE
3-32
100
80
"'-IO.OWO
ULN-206 TM through ULN-2077B
1.5 A DARLINGTON SWITCHES
TYPICAL APPLICATION
+V
+V
ULN-2061/62M
o
BIDIRECTIONAL MOTOR CONTROL
(The Serle. ULN·2000A, Serle. UDN·2980A. and the other device. In thl •
• erle. are recommended for u.e with multlple.wlndlng .tepplng motor.)
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
DEviCE LIMIIT
1.5
"'""'- .........
""
~
ULN~2064 t ru ULN-2077B
WITH STAVER V-7
27.Soem
20
40
60
1
2 .....
i"oo;..
3
'"
·lEVICE IUMIT
1.5
~,
r--...
........ r--.
r--
80
100
"""'"
""""" ~
-
PER CENT DUTY CYCLE
~ ........
\
........
r--.... " .........
-r--. r-"""'-
v-a
I 37.5TW I
20
40
60
PER CENT DUTY CYCLE
3-33
~
~
UlN-2064 thru ULN-2077B
WITH STAVER
1
80
I)Wo.
~O.
100
ULN-2061 M through ULN-2077B
1. SA DARLINGTON SWITCHES
TYPICAL APPLICATIONS
ULN-2074;76B
ULN-206IM
OIiG. MO.
B-136~
COMMON·ANODE LED DRIVERS
(The Series UDN-2980A devices can also be used in similar applications for currents to 500 mAl
COMMON·CATHODE LED DRIVERS
(Types ULN-2068/70B are also applicable)
3-34
UDN-2S40B QUAD NAND POWER DRIVER
UDN·2540B
QUAD NAND POWER DRIVER
Replaced by UDN-2541 B
DESIGNED for use in extremely harsh electrical
environments, Type UDN-2540B quad NAND
driver links low-level signal processing circuits and
medium-power inductive loads.
OUT4
IN4
Vs
IN3
ENABLE
The inputs are compatible with most TTL, DTL,
LS TTL, 5 V to 15 V CMOS, and PMOS logic. The
outputs include transient suppression diodes for inductive loads such as relays, solenoids, d-c and stepping motors. This device can also be used to drive
incandescent or heater loads.
GROUND
GROUND
GROUND
GROUND
Vee
Vs
IN2
Dwg. No. A-II,561
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Output Voltage, VOU! .............................................. 60 V
Output Sustaining Voltage, VCE(SUS) .................................... 35 V
Output Current, lOUT .............................................. 1.5 A
Logic Supply Voltage, Vcc .......................................... 18 V
Input Voltage, VIN ., •••••••••••••••••••••••••••••••••••••••••••••• 30 V
Power Dissipation, Po (each driver) ................................... 2.5 W
(total package) ............................... 2.77W'
Operating Temperature Range, TA ........................... -20°C to +85°C
Storage Temperature Range, Ts ........................... -55°C to +150°C
'Derate at the rate of
n2 mWI'C above 25°C.
3-35
D
UDN-2540B QUAD NAND POWER DRIVER
RECOMMENDED OPERATING CONDITIONS
Supply Voltage Range, Vee ............................... + 10.5 V to + 17 V
Collector Current, Ie ......................................... < 500 mA
High-Level Input Voltage, VINIlI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. > 2.0 V
Low-Level Input Voltage, VIN(oI .................................... < 0.4 V
Output Diode Reverse Voltage, Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. < 65 V
ELECTRICAL CHARACTERISTICS at Vee = 10 V to 15 V, over operating temperature range
(unless otherwise noted)
Characteristic
"1" Output Reverse Current
Symbol
Output Sustaining Voltage
VeElsusl
VON
"0" Output Voltage
IOff
Test Conditions
VOUT = 50 V, VIN = 0.4 V, VENABLE = 2.0 V
VOIII = 50 V, VIN = 2.0 V, VENABLE = 0.4 V
10111 = 50 mA, VIN = VENABLE = 0.4 V
lOUT = 500 mA, VIN = VENABLE = 2.0 V
lOUT = 750 mA, VIN = VENABLE = 2.0 V
lOUT = 1.0 A, VIN = VENABLE = 2.0 V
10111 = 1.25 A, VIN - VENABLE = 2.0 V, Vee = 12 V
Min.
-
500
500
35
-
-
1.1
1.25
1.4
1.6
-
-
"1"
"0"
"1"
"0"
Input Voltage
Input Voltage
Input Current
Input Current
Input Clamp Voltage
Supply Current
VINIlI
2.0
VINIOI
IINIlI
IINIOI
VIK
lee
-
Clamp Diode Forward Voltage
VF
Clamp Diode Leakage Current
IR
VIN = 15 V
VIN = 0.4 V
liN = -10 mA
10111 = 500 mA, VIN = VENABLE = 2.0 V, Vee = 15 V
VOIII - 50 V, VIN - VENABLE - 0.4 V, Vee - 15 V
IF = 1.0 A
IF = 1.25 A
VR= 50 V, VIN = VENABLE = 2.0 V, D1 +D2 or D3 +D4
3-36
Limits
Max.
-
-
0.5
20
-200
-1.5
33
7.0
2.1
2.5
1.0
Units
p..A
p..A
V
V
V
V
V
V
V
p..A
p..A
V
mA
rnA
V
V
mA
SERIES UDN-2580A 8-CHANNEL SOURCE DRIVERS
SERIES UDN-2580A
8-CHANNEL SOURCE DRIVERS
FEATURES
• TTL, CMOS, PMOS, NMOS Compatible
• High Output Current Ratings
II
• Internal Transient Suppression
• Efficient Input/Output Pin Structure
THIS versatile family of integrated circuits, originally designed to
link NMOS logic with high-current inductive loads, will work with
many combinations of logic- and load-voltage levels, meeting interface requirements beyond the capabilities of standard logic buffers.
Series UDN-2580Asource drivers can drive incandescent, LED, or
vacuum fluorescent displays. Internal transient-suppression diodes
permit the drivers to be used with inductive loads.
Type UDN-2580A is a high-current source driver used to switch the
ground ends of loads that are directly connected to a negative supply.
Typical loads are telephone relays, PIN diodes, and LEDs.
OWG.NU. A-l1.359
UDN·2580A
UDN·2585A
Type UDN-2585A is a driver designed for applications requiring
low output saturation voltages. Typical loads are low-voltage LEDs
and incandescent displays. The eight non-Darlington outputs will
simultaneously sustain continuous load currents of - 120 rnA at ambient temperatures to + 70°C.
Type UDN-2588A, a high-current source driver similar to Type
UDN-2580A, has separate logic and driver supply lines. Its eight
drivers can serve as an interface between positive logic (TTL, CMOS,
PMOS) or negative logic (NMOS) and either negative or split-load
supplies.
Types UDN-2580A and UDN-2588A are rated for operation with
output voltages of up to 50 V. Selected devices, carrying the suffix
"-I" on the Sprague part number, have maximum ratings of 80 V.
Types UDN-2580A and UDN-2585A are furnished in 18-pin dual
in-line plastic packages; Type UDN-2588A is supplied in a 20-pin
dual in-line plastic package. All input connections are on one side of
the packages, output pins on the other, to simplify printed wiring
board layout.
3-37
DWG.NO. A-ll,357
UDN·2588A
SERIES UDN-2S80AS-CHA-NNEL SOURCE DRIVERS
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for Any One Driver
(unless otherwise noted)
Output Voltage, VCE
Supply Voltage, Vs (ref. sUb.)
Supply Voltage, Vcc (ref. sUb.)
Input Voltage, VIN (ref. Vs)
Total Current, Icc + Is
Substrate Current, ISUB
UDN-2580A
UDN-2580A-I
UDN-2585A
UDN-2588A
UDN-2588A-I
50 V
50 V
80 V
80 V
25 V
25 V
-30 V
-500 mA
3.0 A
-30 V
-500 mA
3.0 A
-20 V
-250 mA
2.0 A
50 V
50 V
50 V
-30 V
-500 mA
3.0 A
80 V
80 V
80 V
-30 V
-500 mA
3.0 A
Allowable Power Dissipation, Po (single output) ......................................................... 1.0 W
(total package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. ............. 2.2 W*
Operating Temperature Range, TA .......................................................... -20°C to +85°C
Storage Temperature Range, Ts ........................................................... -55°C to + 150°C
'Derate at the rate of 18 mW;oC above 25°C
For simplification, these devices are characterized on the following
pages with specific voltages for inputs, logic supply (Vs), load supply
(VEE)' and collector supply (Vee)' Typical use of the UDN-2580A and
UDN-2580A-l is with negative referenced logic. The more common application of the UDN-2585A, UDN-2588A, and UDN-2588A-I is with
positive referenced logic supplies. In application, the devices are capable of
operation over a wide range of logic and supply voltage levels:
TYPICAL OPERATING VOLTAGES
Vs
OV
VINIDNJ
VIN(Off)
-15 V to -3.6 V
-0.5 V to 0 V
Vee
NA
+5V
oV to + 1.4 V
+4.5 V to +5 V
NA
,;5 V
+12 V
oV to
+8.4 V
+11.5V to +12V
NA
,;12 V
+15 V
OVto +11.4V
+ 14.5 V to + 15 V
NA
,;15 V
VEE(MAXJ
-25V
-50V
-80 V
-20V
-45 V
-75 V
-45V
-75 V
-13V
-38 V
-68 V
-38 V
-68V
-IOV
-35 V
-65 V
-35 V
-65 V
Device Type
UDN-2585A
UDN-2580A
UDN-2580A-I
UDN-2585A
UDN-2580A
UDN-2580A-I
UDN-2588A
UDN-2588A-I
UDN-2585A
UDN-2580A
UDN-2580A-I
UDN-2588A
UDN-2588A-I
UDN-2585A
UDN-2580A
UDN-2580A-I
UDN2588A
UDN-2588A-l
NOTE: The substrate must be tied to the most negative point in the external circuit to
maintain isolation between drivers and to provide for normal circuit operation.
3-38
SERIES UDN-2580A 8-CHANNEI. SOURCE DRIVERS
UDN-2580A
UDN-2580A-l
+Vs
7.1K
PARTIAL SCHEMATIC
10K
7.1K
o
'------l~·OUT
SUB
OOlG.NU.
A~ll.359
OillG.NO. 11-11,358
ELECTRICAL CHARACTERISTICS at TA = +25°C,
VIS = 0 V, V
lEE = - 45 V (unless otherwise noted)
Characteristic
Output Leakage
Current
Symbol
IcEX
Applicable
Devices
UDN-2580A
UDN-2580A-l
Output Sustaining
Voltage
Output Saturation
Voltage
VCEISUS)
VCEISAT)
UDN-2580A
UDN-2580A-1
Both
Test Conditions
VIN = -0.5 V, VOUT = VEE = -50 V
VIN - -0.4 V, VOUI - VEE - -50 V, TA - 70°C
V'N --0.5 V, VOIJ[ - VEE - -80 V
VIN = -0.4 V, VOUI = VEE = -80 V, TA = 70°C
VIN = -0.4 V, IOLIT = -25 rnA, Note 1
VIN = -0.4 V, VEE = -75 V, 10UI ;= -25 rnA, Note 1
V" = -2.4 V, InlIT = -100 rnA
VIN = -3.0 V, loul = -225 rnA
VIN = -3.6 V, loul = -350 rnA
VIN = -3.6 V, lOUT = -35Q rnA
VIN = -15 V, lOUT = -350 rnA
lOUT - -500 /LA, TA - 70°C, .Note 3
Input Current
I'NION)
Both
Input Voltage
I'NIOFF)
VINION)
Both
Both
VINIOFFI
In
Vf
Both
UDN-2580A
UDN-2580A-1
Both
lOUT = -100 rnA,
loUT = -225 rnA,
lOUT - -350 rnA,
lOUT = - 500 /LA,
V, = 50 V, T VR = 80 V, TA =
IF = 350 rnA
CIN
tPHl
tPlH
Both
Both
Both
0.5 E'N to 0.5 EoUT
0.5 EIN to 0.5 EouT
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
Input Capacitance
Turn-On Delay
Turn-Off Delay
NOTES: 1.
2.
3.
4.
5.
.
VCE s1.8 V, Note 4
VCE s1.9 V, Note 4
VCE s2.0 V, Note 4
TA = 70°C
70°C
70°C
Pulsed test, tp 5300 /LS, duty cycle s2%.
Negative curre~t is defined as coming out of the specified device pin.
The IINIOFF) current limit guarantees against partial turn-on of the output.
The VINION) voltage limit guarantees a minimum oufput source current per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs.
3-39
Min.
35
50
-
-50
-
limits
Max.
50
100
50
100
1.8
1.9
2.0
-500
-2.1
-
/LA
/LA
V
V
V
V
V
/LA
rnA
/L"A
-
V
V
V
V
-
50
50
2.0
/LA
/LA
It
-
25
5.0
5.0
/LS
-0.2
-
-2.4
-3.0
-3.6
Units
/LA
/LA
pF
JLS
SERIES. UDN~2580A8·CHANNEL SOURCE DRIVERS
UDN·2585A
ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vs = 0 V, VEE = -20 V (unless otherwise noted)
Characteristic
Output Leakage
Current
Symbol
IcEx
Test Conditions
Min.
limits
Max.
Units
/loA
/loA
V'N = -0.5 V, VOUI = VEE = -25 V
V'N = -0.4 V, VOUI = VEE = -25 V, TA = 70°C
-
50
100
Output Sustaining
Voltage
VCEISUS)
V'N = -0.4 V, lOUT = - 25 mA, Note 1
15
-
V
Output Saturation
Voltage
VCElSATJ
V'N = -4.6 V, lOUT = -60 mA
V'N - -4.6 V, lOUT - -120 mA
1.1
1.2
V
V
Input Current
I'NIONI
V'N = -4.6 V, loUT = -120 mA
Y'N = -14.6 V, lOUT = -120 mA
-
-1.6
-5.0
mA
mA
Input Voltage
V'NION)
loUT = -120 mA, VCE ,,;1.2 V, Note 3
-
-4.6
V'NIOFF)
loUT = -100 /loA, TA = 70°C
-0.4
V
V
-
Clamp Diode
Leakage Current
IR
VR= 25 V, TA = 70°C
-
50
/loA
Clamp Diode
Forward Voltage
Vf
If = 120 mA
-
2.0
V
Input Capacitance
C'N
tpHl
pF
0.5 E'N to 0.5 EOUT
5.0
/loS
Turn-Off Delay
tPlH
0.5 E'N to 0.5 EOUT
-
25
Turn-On Delay
5.0
/loS
NOTES: I.
2.
3.
4.
Pulsed test, tp ,,;300 /loS, duty cycle ,,;2%.
Negative current is defined as coming out of the specified device pin.
The ViNION) voltage limit guarantees a minimum output source current per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs'
'VS
7.2K
PARTIAL SCHEMATIC
4.8K
'--"-+--<>OUT
SUB
OWG.1I0. A-ll,3bO
DWG.NO. A-ll,359
3-40
SERIES UDN-2S80A 8-CHANNEL SOURCE DRIVERS
UDN·2588A
UDN·2588A·l
+Vs
Vee
7.2K
'N_-./VII'-4---I
PARTIAL SCHEMATIC
10K
JK
'----+---0 OUT
II
SUB
DWG.NQ.A-ll,J57
0IIG.NQ.A-I1,351
ELECTRICAL CHARACTERISTICS at TA = + 25°C,
Vs = 5.0 V, Vee = 5.0 V, VEE = -40 V (unless otherwise noted)
Characteristic
Output Leakage
Current
Symbol
Applicable
Devices
ICE!
UDN-2588A
UDN-2588A-1
Min.
Test Conditions
Limits
Max.
-
50
100
50
100
V'N 2:4.6 V, louT = - 25 rnA, Note 1
V'N 2:4.6 V, VEE = -70 V, louT = -25 rnA, Note 1
35
50
-
V'N
V'N
V'N
V'N
2:4.5 V,
2:4.6 V,
2:4.5 V,
2:4.6 V,
VOUT =
VOUT =
VOUT=
VOUT =
VEE
VEE
VEE
VEE
=
=
=
=
-45 V
-45 V, TA = 70°C
-75 V
-75 V, TA = 70°C
-
-
Units
pA
pA
/J-A
/J-A
V
V
Output Sustaining
Voltage
VCE(SUS}
UDN-2588A
UDN-2588A-1
Output Saturation
Voltage
VCE(SAT}
Both
V'N = 2.6 V, lOUT = - 100 rnA, Ref. Vcc
V'N = 2.0 V, louT = -225 rnA, Ref. Vce
V'N = 1.4 V, louT = -350 rnA, Ref. Vec
-
1.8
1.9
2.0
V
V
V
Input Current
I'N(oN}
Both
V'N = 1.4 V, lOUT = -350 rnA
Vs = 15 V, VEE = -30 V, V'N = 0 V, lOUT = -350 rnA
lOUT = -500 A, TA = 70°C, Note 3
-
-500
-2.1
pA
rnA
Input Voltage
I'N(OFFI
Both
V'N(ON}
Both
-50
-
-
2.6
/J- A
V
-
4.8
2.0
1.4
-
V
V
V
VR= 50 V, TA == 70°C
VR= 80 V, TA = 70°C
-
50
50
/J- A
pA
IF = 350 rnA
-
2.0
V
lOUT = -100 rnA, VCE "'1.8 V, Note 4
lOUT = -225 rnA, VCE "'1.9 V, Note 4
loUT = -350 rnA, VCE "'2.0 V, Note 4
lOUT = -500/J-A, TA = 70°C
V'N(OFF}
Both
Clamp Diode
Leakage Current
IR
UDN-2588A
UDN-2588A-1
Clamp Diode
Forward Voltage
VF
Both
Input Capacitance
C'N
t pHl
Both
-
25
pF
Turn-On Delay
Both
0.5 E'N to 0.5 EouT
-
5.0
/J-S
Turn -Off Del ay
t plH
Both
0.5 E'N to 0.5 EOUT
-
5.0
/J-S
NOTES: 1.
2.
3.
4.
5.
6.
Pulsed test, tp "'300 /J-S, duty cycle "'2%.
Negative current is defined as coming out of the specified device pin.
The I'N(OFF} current limit guarantees against partial turn-on of the output.
The V'NCON} voltage limit guarantees a minimum output source current per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs.
Vcc must never be more positive than Vs.
3-41
SERIES-UDN-2S80A 8-(HANNEL .SOURCE DRIVERS
ALLOWABLE PEAK COLLECTOR CURRENT
AT 50 0 C AS A FUNCTION OF DUTY CYCLE
50 0
45 0
40 o
.
o RECOMMENDED
3S
MAXIMUM OUTPUT CURRENT
\' ~\ \
300
'~
I'" ~
\~"""
,,~
i'... ~ "-
25 0
~
......
~ ........
........
~
20 0
NUMBER OF OUTPUTS..AI'
..........
CONDUCTING
SIMULTANEOUSLY
'5
'0
~
VS = lSV
UDN·2580A
°H
UDN-2588A
I
r----::: ~ ~ ............
r----... ...:::::
I
0
0
'0
10
20
I
40
50
60
PER CENT DUTY CYCLE
70
80
90
'00
ALLOWABLE PEAK COLLECTOR CURRENT
AT 70 0 C AS A FUNCTION OF DUTY CYCLE
500
450
400
RECOMMENDED MAXIMUM OUTPUT CURRENT
350
"'~
1\\~l'"""" ~
\ [\\ \
300
~ ~;:...........
250
200
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
'SO
'00
J
Vs = 15V
UDN·2580A
UDN·2588A
SO
o
o
'0
20
~
'"
40
SO
60
PER CENT DUTY CYCLE
.......
........::::
r......
70
~~
...........
80
Dwg
3-42
i'-..
t.:: ~ ~ ~
I
30
3.........
90
~o.
'00
A-11.10B8
SERIES UDN-2580A 8-CHANNEL SOURCE DRIVERS
TYPICAL APPLICATIONS
UDN-258OA-l
-48V
VEE
DWG.NO. A.-l1,356
COMMON·CATHODE LED DRIVER
TELECOMMUNICATIONS
RELAY DRIVER
(Negative Logic)
UDN-2588A-l
UON-2588A
SEGMENT
SELECT
111
01 GIT
SELECT
DWG.NO. A-l1,362
TELECOMMUNICATIONS RELAY DRIVER
(Positive Logic)
VACUUM FLUORESCENT DISPLAY DRIVER
(Split Supply)
3-43
o
UDN·159SA· 8-CHANNEL CtJRRENT-StNKDRIVER
UDN·2595A
a·CHANNEL CURRENT·SINK DRIVER
FEATURES
• 200 mA Current Rating
• Low Saturation Voltage
• TTL, CMOS, NMOS Compatible
• Efficient Input/Output Pin Format
• IS-Pin Dual In-Line Plastic Package
DEVELOPED for use with low-voltage LED and
incandescent displays requiring low output saturation voltage, Type UDN-2595A meets many
other interface needs, including those exceeding the
capabilities of standard logic buffers.
Owg. No. A-1I,407
The eight non-Darlington outputs of this driver
can simultaneously sink load currents of 200 rnA at
ambient temperatures of up to +85°C.
The eight-channel driver's active low inputs can
be linked directly to TTL, Schottky TTL, DTL, 5 to
16 V CMOS, and NMOS logic. All input connections are on one side of the package, output connections on the other, for simplified layout of printed
wiring boards.
Type UDN-2595A is supplied in an 18-pin dualin-line plastic package with a copper lead frame that
maximizes the driver's power-handling capabilities.
A hermetically sealed version of Type UDN-2595A,
with reduced package power dissipation ratings, is
available on special order.
This device complements Sprague Type UDN2585A, an eight-channel source driver.
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for anyone driver
(unless otherwise noted)
Output Voltage, VCE ........................... 20 V
Supply Voltage, Vs ............................ 20 V
Input Voltage, VIN ............................. 20 V
Output Collector Current, Ic ....
. ........ 200 mA
Ground Terminal Current, IGND .................... 1.6 A
Allowable Power Dissipation, Po
(single output) .......................... 1.0 W
(total package) ......................... 2.2 W*
Operating Temperature Range, TA ........ -20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to + 150°C
-Derate at the rate of 18 mW/'C above + 25'C.
UDN-2595A 8-CHANNEL CURRENT-SINK DRIVER
ELECTRICAL CHARACTERISTICS at TA
Characteristic
Output Leakage
Current
Output Saturation
Voltage
Input (;urrent
Input Voltage
Input Capacitance
Supply Current
Symbol
IcEX
VCElSAT)
IINIONI
VIN ONI
VINIom
C'N
Iss
=
+ 25°C, Vs = 5.0 V (unless otherwise noted).
Test Conditions
VIN '"' 4.5 V, VOUT = 20 y, TA = 25°C
VIN '"' 4.6 V, VOUT - 20 V, TA - 70°C
VIN - 0.4 V, lOUT - 50 rnA
VIN = 0.4 V, lOUT = 100 rnA
VIN - 0.4 V, lOUT - 100 rnA
VIN = 0.4 V, lOUT = 100 rnA, Vs = 15 V
lOUT - 100 rnA, VOUT "0.6 V, Vs - 5 V
lOUT = 100 !LA, TA = 70°C
Min.
-
-
-
4.6
VIN = 0.4 V, lOUT = 100 rnA
VIN - 0.4 V, lOUT - 100 rnA, Vs - 15 V
NOTES:
1. Negative current is defined as coming out of the specified device pin.
2. The VINIONI voltage limit guarantees a minimum output sink current per the specified conditions.
3. Iss is measured with anyone of eight drivers turned ON.
UDN-2595A
ONE OF EIGHT DRIVERS
Vs
IN
____- - - 0 OUT
Dwg. No. A-ll,408
3-45
-
Limits
Max.
50
100
0.5
0.6
1.6
-5.0
0.4
25
6.0
20
Units
p.A
p.A
V
V
rnA
rnA
V
V
pF
rnA
rnA
II
SERIES ULN-2800A
HIGH-VOL TAGE;HIGH-CURRENT DARlINGTON· TRANSISTOR ARRAYS
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON TRANSISTOR ARRAYS
IDEALLY SUITED for interfacing between lowlevel digital logic circuitry and high-power peripheral loads, the Series ULN-2800A high-voltage, highcurrent Darlington transistor arrays feature peak load
current ratings of 600 rnA (Series ULN-2800A and
ULN-2820A) or 750 rnA (Series ULN-2810A) for
each of the eight drivers in each device. Under the
proper conditions, high-power loads of up to 4 A at
50V (200 W at 23% duty cycle) or 3.2 A at 95 V (304 W
at 33% duty cycle) can be controlled. Typical loads
include relays, solenoids, stepping motors, multiplexed
LED and incandescent displays, and heaters. All devices feature open collector outputs and integral diodes for inductive load transient suppression.
D"G.NO. A-IO.322
The Series ULN-280IA devices are general purpose
arrays which may be used with standard bipolar digital
logic using external current limiting, or with most
PMOS or CMOS directly. All are pinned with outputs opposite inputs to facilitate ease of circuit board
layout and are priced to compete directly with discrete
transistor alternatives.
output is not a concern. These devices will sink a
minimum of 350 rnA when driven from a "totem
pole" logic output.
The Series ULN-2800A is the standard highvoltage, high-current Darlington array. The output
transistors are capable of sinking 500mA and will
withstand at least 50 V in the OFF state. Outputs may
be paralleled for higher load current capability. The
Series ULN-281OA devices are similar except that
they will sink 600mA. The Series ULN-2820A will
withstand 95 V in the OFF state.
The Series ULN-2802A was specifically designed for
use with 14 to 25 V PMOS devices. Each input has a
Zener diode and resistor in series to limit the input
current to a safe value in that application. The Zener
diode also means excellent noise immunity for these
devices.
All Series ULN-2800A Darlington arrays are furnished in an I8-pin dual in-line plastic package.
The Series ULN-2803A has a 2.7 kn series base resistor to each Darlington pair, and thus allows operation directly with TTL or CMOS operating at a supply voltage of 5 V. These devices will handle numerous interface needs - particularly those beyond the
capabilities of standard logic buffers.
Device Type Number Designation
VCE(MAX) =
IC(MAx) =
General Purpose
PMOS, CMOS
14 . 25 V
PMOS
5V
TTL, CMOS
6· 15 V
CMOS, PMOS
High Output
TTL
The Series ULN-2804A features a 10.5 kn series
input resistor to permit their operation directly from
CMOS or PMOS outputs utilizing supply voltages of
6 to 15 V. The required input current is below that of
the Series ULN-2803A while the required input voltage is less than that required by the Series ULN-2802A.
The Series ULN-2805A is especially designed for
use with standard and Schottky TTL where higher
output currents are required and loading of the logic
3-46
50 V
500 mA
50 V
600 mA
Type Number
95 V
500 mA
ULN·2801A
ULN·281lA
ULN·2821A
ULN·2802A
ULN·2812A
ULN·2822A
ULN·2803A
ULN·2813A
ULN·2823A
ULN·2804A
ULN·2814A
ULN·2824A
ULN·2805A
ULN·2815A
ULN·2825A
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
ABSOLUTE MAXIMUM RATINGS at 25°C Free-Air Temperature
for anyone Darlington pair (unless otherwise noted)
. .. 50 V
... 95 V
... 30 V
. .. 15 V
... 500 mA
..... 600 mA
. ... 25 mA
.., .1.0 W
... . ... . ... ..
. ... 2.25 W*
. . - 20°C to +85°C
. .................. --55°C to +150°C
Output Voltage, VeE (Series ULN-2800, 2810A).
(Series ULN-2820A)
Input Voltage, VIN (Series ULN-2802, 2803, 2804A)
(Series ULN -2805A).
Continuous Collector Current, Ie (Series ULN-2800, 2820A)
(Series ULN-2810A)
Continuous Base Current, I•...............
Power Dissipation, Po (one Darlington pair) ........ .
(total package) ...
Operating Ambient Temperature Range, TA .••.•
Storage Temperature Range, Ts ............................ .
'Derate at the rate of 18.18mW/oC above 25°C.
Under normal operating conditions. these devices will sustain 350 rnA per output with VCE(SAD = 1.6 V at 50°C with a pulse width of 20 ms and aduty cycle of 40%.
PARTIAL SCHEMATICS
COM
...--+1--<> COM
...---. . . .---0 COM
7V
10. 5K
,
i
,,
I
I
---'
r>WG. No.
{)Irt",
A-9650
~O . • -9S9~
Series ULN-280IA
(each driver)
Series ULN-2802A
(each driver)
Series ULN-2803A
(each driver)
~*---oCOM
~+!---oCOM
,
i,
,
I
I
---,
OWG. NO.
I"G. MO. A-IO.228
A-9898A
Series ULN-280SA
(each driver)
Series ULN-2804A
(each driver)
3-47
D
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULN-2800A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
IcEx
Test
Fig.
Applicable
Devices
1A
All
1B
Collector -Emitter
Satu ration Voltage
VCE(SAT)
Input Current
I'N(ON)
Input Voltage
ULN-2802A
ULN-2804A
2
All
I'NiOFF)
V,N(ON)
3
4
5
ULN-2802A
ULN-2803A
ULN-2804A
ULN-2805A
All
ULN-2802A
ULN-2803A
ULN-2804A
D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
elamp Diode
Leakage Current
Clamp Diode
Forward Voltage
hFE
e'N
tON
tOFF
IR
VF
2
ULN-2805A
ULN-2801A
6
All
All
All
All
7
All
-
-
Test Conditions
VCE = 50 V, TA = 25°e
VCE = 50 V, TA = 70 0 e
VCE = 5UV, fA = IUue;, Y'N = O.UV
VCE = 50 V, TA = 70°C, Y'N = l.OV
Ic = 100 mA, I. = 250 I'A
Ic = 200 mA, I. = 350 I'A
Ic = 350 mA, I. = 5OOl'A
Y'N = 17V
Y'N = 3.85 V
Y'N = 5.0 V
Y'N = 12 V
Y'N = 3.0 V
IC = 500 I'A, TA = 70 0 e
VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 250 mA
VCE = 2.0 V, Ie = 300 mA
VCE = 2.0 V, Ic = 125 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0V, Ic = 350mA
Limits
Min. Typ. Max.
-
-
-
-
-
-
-
-
0.9
1.1
1.3
0.82
0.93
0.35
1.0
l.5
65
-
-
-
-
-
50
-
Series ULN·2800A and ULN·2810A devices are also available (with
reduced package power capability) in industrial-grade hermetic
packages. To order. change the last letter of the part number from 'A'
to 'R', Note that the high· voltage devices (BV CE ;;,,; 95 V) are not
presently available with this packaging option.
3-48
-
13
-
-
-
-
1000
-
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4
-
-
-
15
0.25
0.25
-
-
--
1.7
25
1.0
1.0
50
100
2.0
-
-
-
-
-
-
-
0.5 E;, to 0.5 Eo"t
0.5 E;, to 0.5 Eool
V. = 50V, TA = 2SOC
V. = 50V, TA = 70 0 e
IF = 350 mA
50
100
5UU
500
1.1
1.3
1.6
1.25
1.35
0.5
1.45
2.4
-
-
Units
I'A
I'A
I'A
I'A
V
V
V
mA
mA
mA
mA
mA
}1A
V
V
V
V
V
V
V
V
V
pF
}1S
I'S
}1A
}1A
V
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULN-2810A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
Test
Fig.
Applicable
Devices
1A
All
IcEx
IB
Collector-Emitter
Saturation Voltage
Input Current
Input Voltage
VCE(SAT)
2
3
I,NION!
I,N(OFF!
V,NION!
4
5
ULN-2812A
ULN-2814A
All
ULN-2812A
ULN-2813A
ULN-2814A
ULN-2815A
All
ULN-2812A
ULN-2813A
ULN-2814A
D-C Forward Current
Transler Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
ULN-2815A
ULN-2811A
hFE
2
C'N
tON
tOFF
I.
-
6
All
All
All
All
VF
7
All
-
Test Conditions
VCE = 50V, TA = 25°C
VCE = 50V, TA = WC
VCE = 50 V, TA = 70°C, Y'N = 6.0 V
VCE = 50 V, TA = 70°C, Y'N = 1.0 V
Ic = 200 mA, I. = 350/lA
Ic = 350 mA, I. = 500/lA
Ic = 500 mA, I. = 600/lA
Y'N = 17V
Y'N = 3.85 V
Y'N = 5.0 V
Y'N = 12 V
V,N = 3.0 V
IC = 500 /lA, TA = 70 0 e
VCE = 2.0 V, Ic= 500 mA
VCE = 2.0 V, Ie = 250 mA
VeE = 2.0 V, Ie = 300 mA
VCE = 2.0 V, Ic = 500 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ie = 500 mA
VCE = 2.0 V, Ic = 500 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0V, Ic = 500 mA
Limits
Min. Typ. Max. Units
~
~
~
~
..-
~
~
~
~
~
~
-~
~
~
50
~
1.1
1.3
1.7
0.82
0.93
0.35
1.0
1.5
65
-
--
_.
-
~
~
~
~
~
~
-
---
1000 900 15
0.25
0.25
~
0.5 EiD to 0.5 Eo,'
0.5 EiD to 0.5 Eo,t
V. = 50V, TA = 25°C
V. = 50 V, T.. = 70°C
IF = 350 mA
IF = 500 mA
Series UlN-2800A and UlN·2810A devices are also available (with
reduced package power capability) in industrial-grade hermetic
packages. To order, change the lastleller of the part number from 'A"
to 'R'. Note that the high·voltage devices (BV CE "'" 95 V) are not
presently available with this packaging option.
3-49
~
~
~
~
~
~
-
1.7
2.1
50
100
500
500
1.3
1.6
1.9
1.25
1.35
0.5
1.45
2.4
~
17
2.7
3.0
3.5
7.0
8.0
9.5
2.6
/lA
/lA
/lA
/lA
V
V
V
mA
mA
mA
mA
mA
/lA
V
V
V
V
V
V
V
V
~
~
25
1.0
1.0
50
100
2.0
2.5
pF
/lS
/lS
/lA
/lA
V
V
D
SERIES ULN~2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSIS'FOR ARRAYS
SERIES ULN-2820A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
Test
Fig.
Applicable
Devices
1A
All
IcEx
18
Collector· Emitter
Saturation Voltage
Input Current
Input Voltage
VCEISAT)
I,NION)
I'NIOFF)
V,NION)
2
3
4
5
ULN·2822A
ULN·2824A
All
ULN·2822A
ULN·2823A
ULN·2824A
ULN·2825A
All
ULN·2822A
ULN·2823A
ULN·2824A
D·C Forward Current
Transfer Ratio
Input Capacitance
Turn·On Delay
Turn·Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
h"
C'N
tON
tOFF
I,
VF
2
-
-
6
7
ULN·2825A
ULN·2821A
All
All
All
All
All
Test Conditions
VCE = 95 V, TA = 25°C
VCE = 95V, TA = 70°C
VCE = 95 V, TA = 70°C, V,N = 6.0 V
VCE = 95 V, TA = 70°C, V,N = 1.0 V
Ie = 100 mA, I, = 250 !LA
Ic = 200 mA, I, = 350 !LA
Ic = 350 mA, I, = 500 !LA
V,N = 17V
V,N = 3.85 V
V,N = 5.0 V
V,N = 12 V
V,N = 3.0 V
Ic = 500 !LA, TA = 70°C
VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0V, Ic = 250 mA
VCE = 2.0 V, Ie = 300 mA
VCE = 2.0V, Ie = 125mA
VeE = 2.0 V, Ie = 200 mA
VeE = 2.0 V, Ie = 275 mA
VeE = 2.0 V, Ie = 350 mA
VeE = 2.0 V, Ie = 350 mA
VeE = 2.0 V, Ie = 350 mA
0.5 Ei" to 0.5 Eo"
0.5 Ein to 0.5 Eo"
V, = 95V, TA = 25°C
V, = 95V, TA = 70°C
IF = 350 mA
3-50
Limits
Min. Typ. Max. Units
-
-
-
-
-
-
-
-
-
50
0.9
1.1
1.3
0.82
0.93
0.35
1.0
1.5
65
-
-
-
-
-
-
--
50
100
500
500
1.1
1.3
1.6
1.25
1.35
0.5
1.45
2.4
13
-
-
-
-
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4
1000
-
-
-
-
15
0.25
0.25
-
--
25
1.0
1.0
50
100
2.0
-
-
-
-
-
-
-
-
-
-
-
-
1.7
!LA
!LA
!LA
!LA
V
V
V
mA
mA
mA
mA
mA
!LA
V
V
V
V
V
V
V
V
V
pF
!L S
!L S
!LA
!LA
V
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
TEST FIGURES
OPEN
VeE
OPEN
VeE
OPEN
O'IIG. ~O.
A-9729A
FIGURE lA
FIGURE lB
OPEN
.;»---<~--o
ow~.
MO.
1
OPEN
A-9731
FIGURE 3
FIGURE 2
OPEN
o
OPEN
VeE
OPEN
I>WG. MO. A-9733A
DWG. NO.
A-973~A
FIGURE 5
FIGURE 4
'F
OWG. 140. A-9735A
FIGURE 7
FIGURE 6
3-51
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH,CURRENT DARLINGTON TRANSISTOR ARRAYS
COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT
COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE
600
"
y
"';;;
600
1
1
1
~
~
.~
:J
V
o
o
~~~ov
leo'
V
o
0.5
---'
1
1
1
"i
V
2
.'
200
~
V
1/
2.0
A-9754B
ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
2.5
DEVICE1 LIMIT
1\
2. 0
\
\\
J. 5
~
\\
\
1.0
\
\
i'\
\
\
0.5
\
\
\
\
\
o
o
V
L
V
./
50
100
AMBIENT TEMPERATURE IN
3-52
O(
\
\.\
\
\
\
\
150
OWG.tlo. A-IO,379A
~
MAXIMUM REQUIRED
INPUT CURRENT
400
200
INPUT CURRENT IN f.1A - liN
SATURATION VOLTAGE - VeE (SAD
D~. NO.
/
VL
""
o
if'''' JV
./
1
~
~o
" c,",-"""
, 'ft"'"'I
~ 200
cJ'1
b'
1
"'ZE 400
,'~0",-"
400
o
y
'''1/
E
600
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
600
u
OR
500
~
«
E
~
400
~
::J
U
300
12
~
0
u
"~
«
200 r------+------~----NUM8ER OFOUT~TS~L-r------t--~=-~~~~~~~~=---~
CONDUCTING
SIMULTANEOUSLY
"g«
100
0
0
5.00
20
10
30
40
5
PER CENT DUTY CYCLE
Dwg. No. A-11,037
..
.----~---:-r------_,_-..--.
,,:__--.rt--~_,_---,__'L-__r:----_,_---,___.::__....,
~
a
2
-r___
300~_ _~_ _ _
+-_~~
___~:--~~+-~~~__-3~:____-+--~~
~
ou
"~
NUMBER OF OUTPUTS
CONDUCTING
f------+----j----If- SIMU LTANEOU5LY
:i«
" 200f-----+----r---r_---+----r---r_---+----f-~-.~r_~-.~
g
«
20
40
60
PER CENT DUTY CYCLE
3-53
BO
100
Dwg, rJo. A-1O,380A
II
SERIES ULN·2800A
HIGH·VOLTAGE, HIGH.CURRENT DARLINGTON TRANSISTOR ARRAYS
INPUT CURRENT
AS A FUNCTION OF INPUT VOLTAGE
2.0
j
~ 1.5
.,V
~
Z
~
1,0
::l
V
~ O.
Z
J.100'". ~~I".........
'"~ .........
2.0
.....
}
"\'f~\C.~~ •
... i-'"
~
~
...... 1...
~'
::l
V
~
14
16
18
20
22
24
1.0
......... ~
0.5
~
....
""
26
INPUT VOLTAGE - YIN
~~
p
E
0
12
1.5
<:
~
....
.....
~~C!.l~
11
10
INPUT VOLTAGE - YIN
.. -
__
tJW"J. HO.
j)~. t~o. A~97')7A
SERIES ULN·2804A
SERIES ULN·2802A
3.5,-.,--..,---,---,r:;!,...-,
3.01---1--+---+--#/.1\'\'---1
2.5
} 2.5 I--+--+--il~~k\'<--;
«
2.0
E 2.0
Z
i-'-j----1 ~'ffl~~~_;
Z
~ 1.5 1---I--JffiWl~''''''''''i¥''---I
a
~E 1.5
~
~
~~
1.0
::l
1.0 I--""~!\k'~--+--t---I
V
"
0.5
0.5 i-''f't--t--
Z
o~_~_~_~
1.5
INPUT VOLTAGE - VIN
2.0
2.5
__
3,0
~
3.5
__
4,0
INPUT VOLTAGE - YIN
DWG. NO. A·9756B
~W(l.
SERIES ULN·2803A
NO. A-10.258
SERIES ULN·2805A
3-54
A-98~19A
12
SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
+260V
o
PMOS
OUTPUT
TIL
OUTPUT
OFF VOLTAGE BIAS FOR
HIGH-VOLTAGE LOADS
TTL TO LOAD
ULN-2804A
ULN-2813A
tVee
Rp
TIL
OUTPUT
OUTPUT
USE OF PULL-UP RESISTORS
TO INCREASE DRIVE CURRENT
BUFFER FOR HIGHER CURRENT LOADS
3-55
SERIES ULN-2800A
HIGHNOLTAGE, HIGH-CURRENT· DARLINGTON TRANSISTOR ARRAYS
TYPICAL DISPLAY INTERFACE
l'
~
DIGIT DRIVER,
1/2 ULN-2061M or
1/4 ULN-2074;76B or
liB UDN-29B1/82A
I
7-SEGMENT DISPLAY
I
~
WITH DECIMAL POINT,
COMMON-ANODE LED or
~
HOT -WIRE. READOUT
TO OTHER
DIGITS
r--
~
SEGMENT DRIVER,
SERIES U LN-2800A or
SERIES ULN-2810A
-.L
DWG. MO. A-IO,378
3-56
TYPE UDN-28418 through UDN-28468
QUAD 1.5 AMPERE DRIVERS
TYPE UDN-2841 B through UDN-2846B*
QUAD 1.5 AMPERE DRIVERS
FEATURES
• Inputs Compatible with OTL/TTL/LS
TTL/CMOS/PMOS
• High Voltage Output: -50 V
• High Current Gain
• Sink from Negative Supply: UON-284IB and
UON-2842B
• Source to Negative Supply: UON-2843B and
UON-2844B
• Sink & Source Combination: UON-2845B and
UON-284GB
o
THIS SERIES of quad Darlington switches is especially designed for high-current, high-voltage
peripheral driver applications_ It is intended to provide solutions to interface problems involving electronic. discharge printers, doc motor drive (bipolar or
unipolar), telephone relays, PIN diodes, LEDs, and
other high-current loads operating from negative supplies.
OWG.NO. A-IO,323A
UDN-2841B, UDN.2842B,*
UDN·2845B, UDN·2846B·
Types UDN7284lB and UDN-2842B are intended
for sinking applications in which the load is connected
to ground and the IC output switches the negative supply. The input PNP transistor in each driver serves
as a level translator and the first NPN stage provides
sufficient current gain to drive the output Darlingtons.
Type UDN-2843B and UDN-2844B quad drivers
are primarily intended for switching the ground end
of loads which utilize negative supply voltages. The
NPN Darlington outputs are operated as emitter followers in this application.
UDN.2843B: UDN.2844B·
Type UDN-2845B and UDN-2846B devices are
sink-and-source combinations in a single dual in-line
package. Either device can be used for bipolar switching applications in which both ends of the load are
floating.
UDN2844B, and UDN-2846B feature a higher input
impedance and are intended for use with 8 V to
15 V PMOS and CMOS logic.
The UDN-284IB, UDN-2843B, and UDN-2845B
I.C.s are intended for use with 5 V TTL, Schottky
TTL, DTL, and CMOS logic. The UDN-2842B,
Al! types reduce component count, lower system
cost, reduce circuit and board complexity,and provide
solutions for many interface requirements.
*UDN·28428, UDN-2843B, UDN-2844B, and UDN-2846B
Available Until Current Stock Depleted
3-57
lYPEUDN-28418 thrDugh UDN-28468
QUAD 1.5 AMPERE DRIVERS
SCHEMATIC (each driver)
v,
Type Number
I
UDN-2841B
UDN-2842B
UDN-2843B
UDN-2844B
UDN-2845B
UDN-2846B
I N o----rl~'N_---.
,
!
SUB
Resistor Values in ku
Amplifier 1 & 3
Amplifier 2 & 4
RIN
Rs
RIN
Rs
33
10.5
3.3
10.5
3.3
10.5
15
15
1
1
15
15
3.3
10.5
3.3
10.5
3.3
10.5
15
15
1
1
1
1
10K
DW~.
~O.
NOTE: The substrate terminals must be tied to the most negative point
in the external circuit to maintain isolation between transistors and to
provide for normal device operation.
A-IO.4S3A
ABSOLUTE MAXIMUM RATINGS at +25°C
Free-Air Temperature for anyone Darlington
Output (unless otherwise noted)
Output Voltage, VCE(OFF) ............................. 50 V
Output Sustaining Voltage, VCE(SUS) ................... 35 V
Substrate Voltage, Vsus ........................... -50 V
Continuous Output Current, louT .................... 1.75 A
Supply Voltage, Vs ............................ See Table
I nput Voltage, V.N................. ~ ........... See Table
Power Dissipation, PD (one output). . . .
. .. 2.25 W*
(total package) .............. 2.77 W*
Operating Temperature Range, TA .•••..••. -20°C to +85°C
Storage Temperature Range, Ts .. " ...... -55°C to +150°C
'Derate linearly to 0 W at +150°C.
Type Number
VSIMAXI
V;NIMAXI
Application
UDN-2841B
UDN-2842B
UDN-2843B
UDN-2844B
UDN-2845B
UDN-2846B
lOY
lOY
15 V
lOV
15 V
10 V
lOV
15 V
10 V
15 V
10 V
15 V
TTL, DTL, 5 V CMOS; current sink
8-15 V PMOS & CMOS; current sink
TIL, DTL, 5 V CMOS; current source
8e15 V PMOS & CMOS; current source
TIL, DTL, 5 V CMOS; source & sink
8-15V PMOS & CMOS; source & sink
t)l
-v
0\>1::>.
,~O.
A-IO,4-89
-v
D'!/G. NO. A-IO.I!80
Current Sink
3-58
~
Current Source
TYPE UDN·2841B through UDN·28468
QUAD 1.5 AMPERE DRIVERS
ELECTRICAL CHARACTERISTICS at TA = 25°C (unless otherwise noted),
See Applicable Test Figure for Conditions not Specified
Characteristic
Output Leakage
Current
Symbol
··l cEX
VEE
VEE
Test Conditions
-50 V, VIN = 0.4 V, TA = 25°C
- 50 V, VIN = 0.4 V, TA = lO°C
=
=
= - 50 V,
VEE
VCEISAT)
Input Current
IINION)
Input Voltage
(Note 1)
Supply Current
(Note 1)
Turn-On Delay
Turn-Off Delay
VIN(ON)
loUT = 500 mA
lOUT = 1.0 A (Note 1)
loUT = 1.5 A (Note 1)
lOUT = 500 mA, UDN-2841143/458, VIN = 2.4 V
loUT = 500 mA, UDN-2842/44/468, VIN = 5.0 V
lOUT = 1.5 A, UDN-2841143/458
loUT = 1.5 A, UDN-2842/44/468
lOUT = 500 mA, UDN-28411428, UDN-2845/468 (Note 2)
lOUT = 500 mA, UDN-2843/448, UDN-2845/468 (Note 3)
RL = 390, 0.5 VIN to 0.5 VOUT
RL = 390, 0.5 VIN to 0.5 VOUT
tpdlON)
tpdlOff)
0.4 V, loUT
=
VCEISUS)
Is
VIN
=
Output Sustaining
Voltage
Output Saturation
Voltage
100 mA
NOTES,
I.
Each driver tested separately.
2. Drivers 1 & 3 (sink drivers) only. Vs = 0 V. VEE = -40 V.
3. Drivers 2 & 4 (source drivers) only, Vs = 5 V. VEE = -40 V.
5.0
4.0
3.0
v;II-
0«
~
""
~
3: 2.0
0
----++-LL..r-:::I
-40V
3-62
UTN-2886Band UTN-2888A
MONOLITHICSCR ARRAYS
UTN-2886B and UTN-2888A
MONOLITHIC SCR ARRAYS
FEATURES
•
•
•
•
•
Low Input Current
TIL, LSTIL and CMOS Compatible
Momentary Inrush Current Capability to 2 A
Minimum Forward Blocking Voltage 35 V
Use with Full-Wave or Half-Wave Sources
FOR USE with microprocessors that
I NTENDED
are strobing power loads, these monolithic SCR
arrays will interface to high-current loads including
lamps, relays, and solenoids. The use of multiple
SCRs in a single package reduces component count,
insertion costs, assembly time, and circuit space,
while improving overall circuit reliability.
Each array contains multiple SCRs with integral
current limiting and gate-to-cathode resistors. In all
cases, the maximum allowable SCR current rating at
+ 2SoC is 800 rnA continuous or 2 amperes nonrecurring peak. Outputs may be paralleled for higher
load current capability within the limits ofthe allowable package power dissipation rating.
The UTN-2886B array contains four individual
SCRs and two pairs of paralleled SCRs (pins 8-9 and
1-16). Each SCR is capable of continuous and simultaneous operation at 2S0 rnA (SOO rnA at pins 9 and
16) at an ambient temperature of +SO°C. The 16lead package with heat-sink contact tabs allows
maximum power dissipation with standard cooling
methods. Further increases in power dissipation can
be obtained by attaching an external heat sink to the
webbed leads.
The UTN-2888A SCR array contains eight isolateddevices, each capable of continuous and simul~
taneous operation at 200 rnA at an ambient tempera c
ture of +SOOC.
These· SCR arrays operate from an unfiltered
half-wave (SO or 60 Hz) or full-wave (100 or
120 Hz) rectified source. They are not intended for
use with a-c sources, and will not sustain commercial
a-c line voltages (liS VAC).
*' Two Parall.1 SCRI
Dwg. No. A--11,092
UTN·2886B
Dwg. No., A-ll,093
UTN,2888A
3-63
UTN-2886B and UTN-2888A
MONOLITHIC SCR ARRAYS
ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
ABSOLUTE MAXIMUM RATINGS
for anyone individual SCR*
Forward Blocking Voltage (Input Open), VAK .......... 35 V
Reverse Blocking Voltage, Vi
V>
2.0 r-----+-""
c;
C>:
~<>.
~
'"
«
~
1.0/---+---+--+--.......
«
100
50
AMBIENT TEMPERATURE IN
°c
Dwg. No. A-11,090
ELECTRICAL CHARACTERISTICS
for anyone individual SCR*
.
Characteristic
Forward Blocking Current
liate-to-Anode
leakage Current
Forward ON Voltage
Symbol
IA
liN
VAKIDN)
Gate Trigger Current
Gate Trigger Voltage
liate Utt VOltage
Gate Off Current
HOldmg Current
I'NION)
V'NION)
V'N(Off)
I'NlDff)
IH
Anode OFF Voltage
VAKIOff)
Test
Temp.
+70°C
Test Conditions
VAK = 35 V, Y'N = 100 mV
Min.
+70°C
+25°C
+55°C
+25°C
+25°C
+WC
+70°C
O°C
+SSOC
+55°C
VAK = OV, Y'N = 5.0V
I = 275 mA, Y'N = 2.5 V
IA = 275 mA, Y'N = 2.5 V
VAK = 7.0 V, Y'N = 2.5 V, RL = 50n
VAK = 1.7 V, t t = 20 !Ls, RL = 50n
VAK = 35 V, RL = 50n
VAK - 35 V, RL = 50n
I,NtNIT - 20 mA
I'NIINI1) = 20 mA
Y'N - 5.0 V, RL - 50n
-
-
100
250
1.2
1.15
300
2.5
-
-
-
10
10
5.0
400
-
-
'lA, liN, and IH test conditions and limits for the paralleled SCRs at pin 8-9 or pin 1-16 of the UTN-2886B are twice the value shown.
3-64
Limits
Max.
50
Units
!LA
!LA
V
V
!LA
V
mV
!LA
rnA
mA
mV
UTN-2886B and UTN"2888A
MONOLITHIC SCR ARRAYS
-
I. 210 35 V
:0:
See Applicalion Noles
'"
]--
I
I
I
I
I
I
-~-l
o. 4V
-[''''
-
I-lgI ~ 20 ~s
I
I
I
I
~
Dwg. No. A-H,091
DW,g. No. A-ll,089
TYPICAL LAMP APPLICATION
TYPICAL WAVEFORMS
APPLICATION NOTES
1. These devices norm/illy operate from an unfiltered half-wave or full-wave rectified source. They
cannot be operated with a bidirectional (unrectified)
a-c source.
supply voltage above the anode OFF voltage and
prevent proper tum-OFF. To insure proper operation, resistor R should be used as shown in the typical
application. The maximum resistor value is determined from:
400 mV
VAK{Off)
R = ----'--'--(n-.]) IGA
(n-l) 250/LA
where n is the number of SCRs being used in the
system. Note that n = 2 for pin 8-9 and pin 1-16 of
the UTN.2886B.
4. Various combinations of number of outputs
conducting, duty cycle, and. ambient temperature
must be held within the allowable package power
dissipation limits shown.
2. During operation, the SCR is tumed ON by
application of a positive voltage to the input. The
SCR will remain ON, even. though the input voltage
is removed or made slightly negative, until the
anode-to-cathode voltage is reduced to below the
anode OFF voltage.
3. When using multiple SCRs and a common sup)ly, gate-to-anode leakage currents can hold the
3-65
UDN·2949Z
HIGtHURRENT BIPOLAR HALF-BRIDGE MOTOR DRIVER
UDN-2949Z
HIGH-CURRENT BIPOLAR HALF-BRIDGE MOTOR DRIVER
FEATURES
•
•
•
•
•
•
•
o
3.5 A Peak Output
32V Output Breakdown
Output Transient Suppression
TTL, CMOS, PMOS, NMOS Compatible Inputs
High-Speed Chopper (to 100 kHz)
Low Standby Current (10 rnA)
TO-220 Style Package
THE UDN-2949Z is a monolithic half-bridge
motor driver supplied in a power-tab TO-220
style package. The circuit combines sink and
source drivers with diode protection, gain and
level shifting systems, and a voltage regulator
for single-supply operation. The unit is specifically designe<;\ for servomotor drive applications
using pulse-width modulation (chopping).
>VI
+
I-
Cl
l-
I-
Il.
:::>
Il.
I-
Il.
:::>
~
z
0
:::>
:::>
:::>
~
'"'"
The chopper drive mode is characterized by a
'"z
v;
:::>
'"
0
minimum power dissipation requirement, low
VI
DWG. NO. A-ll,l77
saturation voltages, and low chopper storage
times for the NPN sink driver. Predriver stages
reduce input drive requirements while allowing
the output to switch currents of 2 amperes. OutSingle-chip construction and the power-tab
put doc current accuracies of better than 10070 at
TO-220 style package provide'improved cost ef- .
100 kHz can be obtained.
fectiveness and reliability over discrete compoThe PNP sourcing driver is turned ON by an nent motor drive systems with excellent power
active high input while the NPN sinking driver is dissipation capability, minimum size, ease of inactivated with a low input. These inputs are stallation, and heat sinking.
completely compatible with TTL, low-voltage
CMOS, PMOS, and NMOS.
The package heat tab is at ground potential.
Multiple
devices may share a common heat sink
The UDN~2949Z may be used in pairs (fullwithout
insulating
hardware.
bridge) for doc stepper motor or brushless a-c
motor drive applications. Such applications may
The UDN-2949Z power driver may be used in
require an external ground clamp diode stepper-motor bipolar bridge-driver circuits, for
(lN4000) connected at the output of each device example, with the Sprague UCN-4202A Stepper
in order to minimize package power dissipation. Motor Translator IDriver.
UJ
<.)
3-66
0
UDN-2949Z
HIGH-CURRENT BIPOLAR HALF-BRIDGE MOTOR DRIVER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Range, Vs ................. IS V to 30 V
InputVoltage Range, VIN .............. -0.3 V to +7.0 V
Peak Output Current, (100 ms, 10% d.c.), lop ....... ±3.S A
Continuous Output Current, 10111 •••.••••••••••••• ±2.0 A
Package Power Dissipation, PD ••••••••••••••• See Graph
Operating Temperature Range, TA ........ -20°C to +85°C
Storage Temperature Range, Ts ........ -SsoC to + 150°C
LOGIC TRUTH TABLE
Source Driver
Input, V2
Sink Driver
Input, V5
Low
Low
High
High
Low
High
High
Low
Output,
V4
Low
Open
High
Disallowed
ELECTRICAL CHARACTERISTICS at TA = 25°C, Ys = 24 V (unless otherwise noted).
Characteristic
Output leakage Current
Output Sustaining Voltage
Output Saturation Voltage
Output Source Current
Output Sink Current
Input Open-Circuit Voltage
Input Current
Propagation Delay
Clamp Diode Forward Voltage
Supply Current
Source Driver
Input, Pin 2
Test Cond itions
Sink Driver
Output
Input, Pin 5
Pin 4
0.8 V
0.8 V
0.8 V
2.4 V
0.8 V
2.4 V
0.8 V
-250,..A
2.4 V
0.8 V
0.8 V
0.8 to 2.4 V
NC
NC
2.4 V
2.4 V
0.8 to 2.4 V
2.4 V
0.8 V
2.4 V
0.8 V
-250,..A
2.4 V
0.8 V
0.8 to 2.4 V
2.4 V
NC
NC
OV
28 V
2.0A
-2.0 A
2.0 A
Vs = 28 V
Vs - 28 V
Test Fig. 1
NC
NC
NC
NC
2.0 A
NC
Min.
-
-
Limits
Max.
-500
500
-
~
-2.0
2.0
-
-
7.5
-700
-5.0
mA
-
750
5.0
uS
2.2
35
V
rnA
Test Fig, 2
Units
,..A
V
V
V
A
A
V
uA
30
22
2.0
-
Note: Positive (negative) current IS defined as gomg mto (commg out of) the specified deVice pm.
3-67
Other
-
ns
UDN-2949Z
HIGH-CURRENT BIPOLAR
HAlF~BRIDGE
3
MOTOR
DRIVE~
•
lout~
L...-1'If'Io..--J\M....fYY'-J
lQ.n..
3.5 mH
r
2 •4V
O.8~
OWG. NO. A-ll.179
miG. Nfl. A-11.178
TEST FIGURE
TEST FIGURE 2
APPLICATION NOTES
not be pulled low (turned ON) for at least 5 IJS
(max. source tpo) after the source driver input is
pulled low (turned OFF). The sink driver should
be allowed to go high (turned OFF) at least 750
ns (max. sink tpo) before the source driver goes
high (turned ON).
1. The source and sink outputs should not
be ON simultaneously (V2 High, Vs Low). High
"crossover" currents could degrade or destroy
the device.
2. Do not assume from the Logic Truth
Table that both inputs can be connected (V4
High or Low only). The sink driver is considerably faster than the source driver. An input
shift from high-to-Iow levels could produce a
condition where both drivers are ON, and that
condition could occur for as long as 5 IJS.
SOURCE
INPUT, Vz - - - - - - ,
SINK
INPUT, V5
--l 5 ~s I- ---I
l _____ J
3. It is recommended that the inputs be
driven separately, and that the sink driver input
DWG.NO. A-ll,242
Timing Conditions
DIRECTION
lOUT
f.-750 ns
_ICD,
DWG.NO. A-ll.241
3-68
UDN-2949Z
HIGH-CURRENT BIPOLAR HALF-BRIDGE MOTOR DRIVER
PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
V)
I-I-<{
~
z
eL MEA)SI NK
3
0
010
""
0..
z
0
;:::
~
....... ............
~
Vi
'"
Cl
w
""
~ 5
0..
W
<'
<{
~
u
;t.
W
....I
-
lO·C/l.y
~~k1-..
30·C;W
. HEATSINK
...
.
cc
"
-.. ........
....
-- -- --
<{
~
....I
....I
<{
0
30
40
70
60
50
80
AMBIENT TEMPERATURE, lA' IN ·C
DWG. NO. A-l1i183
SINGLE·WINDING D·C OR STEPPER MOTOR
FULL·BRIDGE D·C SERVO MOTOR APPLICATION
+26V
+ 24 V o--~_t_--+-_t_~--~
cw-----'
ccw ~--'-~-----'
DWG.NO. A-ll,181
D I R ED Ti 0 N o-----+--1>--+-j---~--+---1
SPEED o---'-------,-<-~-~-------'
(PWM)
3-69
OliG. NO. A-ll,l82
UDN·2952B and UDN-2952WFULL·BRIDGE.MOTORDRIVERS
UDN-2952B AND UDN-2952W
FULL-BRIDGE MOTOR DRIVERS
FEATURES
• High Output Current
• Adjustable Short-Circuit Protection
UDN-2952B
• Thermal Shutdown
• Internal Clamp Diodes
• TIL, DTL, PMOS, CMOS Compatible
• DIP or SIP Packaging
pULL-BRIDGE motor driver IC Types
UDN-2952B and UDN-2952W have both the
logic circuitry and Darlington-pair power drivers
for bidirectional control of doc motors operating
at currents of up to 2 A.
UDN-2952W
ABSOLUTE MAXIMUM RATINGS
at TTAB =
The integrated circuits carry extensive circuit
protection. Output current-limiting is determined by the user's selection of sensing resistors.
Both drivers have thermal shutdown networks
that disable motor drive if the circuits' power
dissipation ratings are exceeded. Internal transient suppression is built into both.
+ 70°C
Motor Supply Voltage, VBB ....................... 36 V
Logic Su pply Voltage, VDO • • • . . • . • . • • • . . • • . • • • • . • 7.0 V
Substrate Voltage, VSUB .
. .... .,..24 V
Input Voltage, VIN or VENABLE
... 30 V
Output Current, lOUT (UDN·2952B) Continuous ...... ±1.0 A
100 ms, 10% duty cycle .. ±3.5 A
(UDN-2952W) Continuous.
. ±2.0 A
Type UDN-2952B is in a 16-pin dual in-line
package with heat-sink contact tabs. The lead
100 ms, 10% duty cycle .. ±5.0 A
configuration enables easy attachment of a heat Package Power Dissipation, Po (UDN·2952B) . . .. 6.7 W"
sink while fitting a standard integrated circuit
(UDN·2952W) .. . .. 27 W**
socket or printed wiring board layout. Type Operating Temperature Range, TA ....... -20°C to +85°C
UDN-2952W, for higher power requirements, is Storage Temperature Range, Ts .
. .. -55°C to + 150°C
in a 12-pin single in-line power tab package.
Both drivers have tab temperature ratings of
+ 70°C and require external heat sinks.
'Derate at the rate of 83.3 mWfOC above TIAB = +70°C.
·"Derate at the rate of 333 mW/OC above TIAB = +70°C.
3-70
UDN-2952B and UDN-2952W FULL-BRIDGE MOTOR DRIVERS
UDN·2952W
UDN·2952B
o
o
vBBI
VDD
PHASE
SUB
SUB
SUB
SUB
VA
GROUND
«
>
N
V)
V)
>
N
~
:;)
0
0
z
:;)
0
::l
«
'"
'"
<.:l
'"
>'"
~
w
V)
0
0
«
:I: >
'"
:;)
V)
~-
~
V)
V)
:;)
0
>
Owg. No. A-ll ,3688
>
"-
Dwg.No. A-ll,369A
FUNCTIONAL BLOCK DIAGRAM
PHASE
ENABLE
~
: SUBSTRATE
,
~
,:GROUNO
I
I
.,j,.
.,j,.
2
6
7
II
VI
A,
2
VSS2 :
VSSI~
?
L ______
~
~
: SUBSTRATE
~
l:_______ ~---l
I
I
o
o
~
UDN-2952B 10 IPI
UON-2952W 151 PI
3-71
Dwg.No. A-l1.367B
II
UDN-2956A and UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
UDN·2956A and UDN·2957A
HIGH·VOLTAGE, HIGH·CURRENT SOURCE DRIVERS
COMPRISED of five common collector NPN
Darlington output stages, the associated common base PNP input stages, and a common "enable" stage, the UDN-2956A and UDN-2957 A
high-voltage, high-current source drivers are used to
switch the ground end of loads which are directly
connected toanegative supply. Typical loads include telephone relays, PIN diodes, and LEDs. Both
devices will sustain output OFF voltages of -80 V
and will source currents to -500 rnA per driver.
Under normal operating conditions, these units will
sustain load currents of - 200 rnA on each of the five
drivers simultaneously at ambient temperatures up to
+70°C.
The UDN-2956A driver is intended for use with
MOS (PMOS or CMOS) logic input levels operating
with supply voltages from 6 V to 16 V. The UDN- TO-116 (MO-OOIAA). Hermetically-sealed ver2957 A driver has appropriate input current limiting sions of these devices (with reduced package power
resistors for operation from TTL, Schottky TTL, dissipation capability) are available.
DTL, and 5 V CMOS. With either device, theinput
and enable levels must both be biased towards the
positive supply to activate the output load.
ABSOLUTE MAXIMUM RATINGS at 25°C
Integral transient suppression diodes allow these
devices to be used with inductive loads without the
Free-Air Temperature (reference pin 7)
need for discrete diodes. In order to maintain iSQla- Supply Voltage, VEE ......................... -SO V
tion between drivers, the substrate should be con- Input Voltage, V (UDN-2956A) ................. +20 V
IN
nected to the most negative supply applied.
(UDN-2957A) ................. +10 V
Input connections are on one side of the dual
in-line package, output cQnnections on the other side
to simplify printed wiring board layout.
The UDN-2956A and UDN-2957A high-voltage,
high-current drivers are supplied in 14-lead dual
in-line packages conforming to JEDEC outline
Output Current, lOUT ....................... -500 mA
Power Dissipation, Po (anyone driver) ............. 1.0 W
(total package) ............ 2.0 W'
Operating Temperature Range, TA ....... -20°C to +S5°C
Storage Temperature Range, Ts ........ -55°C to +150°C
'Derate at the rate of 16.67 mW/oC above 25°C.
3-72
UDN~29S6A and UDN-29S7A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS at T.
Characteristic
Output leakage Current
Symbol
Applicable
Devices
leEx
UDN-2956A
UDN-2957A
Collector-Emitter
Saturation Voltage
VeEISAT}
UDN-2956A
UDN-2957A
Input Current
IINION)
UDN-2956A
UDN-2957A
I"IO'~
Output Source Current
lOUT
All
UDN-2956A
UDN-2957A
=
+ 25°C,
VENABLE
=
V IN
(unless otherwise specified)
Test Conditions
V"
VIN
VIN
VIN
VIN
VIN
=
=
=
=
=
VIN
VIN
VIN
VIN
VIN
VIN
= 6.0 V, louT =
= 7.0 V, lOUT =
== 10 V, lOUT =
- 2.4 V, lOUT = 2.7 V, lOUT =
= 3.9 V, lOUT =
VIN
V"
VIN
VIN
lOUT
= 6.0 V, VOU! = -2.0 V
= 15 V, VOUT =' -2.0 V
= 2.4 V, VOUT = -2,0 V
= 185V, VOUT= -2.0 V
= ~500 /LA, T, = +70°C
VIN
VIN
VIN
. VIN
VIN
VIN
VIN
VIN
VIN
VIN
VENABLE = 0.4 V, VOIff = -80 V, T, = + 70°C
0.4 V, VENABLE = 15 V, VOUT = -80 V, T, = + 70°C
15 V, VEtI'BLE = 0.4 V, VOUT = -80 V, T, = + 70°C
VENABLE - 0.4 V, VOUT = -80 V, T, = +70°C
0.4 V, VEN'BLE = 3.85 V, VOUT = -80 V, T, = +70°C
3.85V, VENABLE = 0.4 V, VOUT = -80 V, T, = 70°C
= 5.0 V,
= 6.0 V,
= 7.0 V,
= 8.0 V,
= 9.0 V,
= 2.4V,
= 2.7 V,
= 3.0 V,
= 3:3 V,
= 3.6 V,
VOUT
VOUT
VOUT
VOU!
VOU!
VOU!
VOUT
VOUT
VOUT
yOU!
100 mA
175mA
-350 mA
- 100 rnA
- 175 rnA
-350 mA
=
=
=
=
=
=
=
=
-2.0 V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
= -2.0 V
= -2.0 V
Output Sustaining
Voltage
VeEISUS)
Clamp Diode
leakage Current
Clamp Diode
forward Voltage
I,
All
V, = 80 V
V,
All
I, - 350 mA
tON
ALL
ALL
0.5 E;, to 0.5 Eout RL = 400 n CT = 25 pf
0.5 E;, to 0.5 Eout RL = 400 n CT = 25 pf
Turn-On Delay
Turn-Off Delay
to"
UDN-2956A
UDN-2957A
VIN - .0.4 V, lOUT - -25 mA
VIN = 0.4 V, 101ff = -25 mA
Limit
- 200 /LA
- 200 /LA
- 200 /LA
- 200 /LA
- 200 /LA
-200/LA
-
Max.
Max.
Max.
Max.
Max.
Max.
1.20 V Max.
1.35 V Max.
1.70 V Max.
1.20 V Max.
1.35 V Max.
1.70 V Max.
650/LA Max..
1.85 mA Max.
675 /LA Max.
1.40 mA Max.
50/LA Min.
-125 mA
-200 mA
-250 mA
-300 mA
-350 mA
-125 mA
-200 mA
-250 mA
-300 mA
-350 mA
Min.
Min.
Min .
Min.
Min.
Min.
Min.
Min.
Min.
Min.
50 V Min.
50 V Min.
50/LA Max.
2.0V Max.
3--73
4.0/Ls Max.
10/Ls Max.
o
Ul>N-29S6Aand UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
INPUT CURRENT
AS A FUNCTION OF INPUT VOLTAGE
2.0
.#
<
E1.5
~
~r'
UDN-2956A
.....
::>
0
l/
Cl.
z
o. 5 /
V
~
V
V"
I'"
~
V
I'"
I'"
~
V "'"
5
6
9
10
11
8
I NPUT VOLTAGE IN VOLTS
7
V
V
~
i-"""'"
1
.4
1
Owg. No. A-U.060
1.5
Vr'
UDN-2957A
~ 1.0
!:
~
co::
co::
a
MAX"
..... 0.5
::>
V
trY P , . V-
Cl.
z
V
V
--'V
I-"""""
./
V
~
~
0
2.0
2.5
3.0
INPUT VOLTAGE IN VOLTS
3-74
3.5
0.9· No. A-ll.061
4.0
UDN-2956A and UDN-2957A
HIGH-VOLTAGE, HIGH"CURRENT SOURCE DRIVERS
ALLOWABLE PEAK OUTPUT CURRENT
AS A FUNCTION OF DUTY CYCLE
.
~
l
AB sOLUTI MAxiMUM
-500
~~
co
u
u
~o
-=>
"-
0
~
~
-400
~
1'5 «
'"
~
« -300
~URRE~T
t'.... ~
I '~ ~ r-
--r-
~ -200
so
~
~
~ ~ -3001~-+--+-+--b-1--':oo;....: -'l""'~"=:--+.::30'"
« «
1;:' E
~ ::: -200
~
«
SOOIf-~--+",,::~~r~.l:iii.~~oi.!oI::-+-~I-"'"
~ ~ -4001~-+--+-+---301.::--''''Io;:--f'''''d---r--r=.....
';
1--
~~~~0~T~~GO~i~~~~ANEOUSL Y
E
s;:
~
12'lo
«
-100
§IOOI~-+--+--+--b-1~-+-+--+--t--j
~
«
!O
2G
30
40
50
00
70
PER CENT DUTY CYCLE
80
90
100
10
ONE OF FrVE DRIVERS
r--------,
I
R 'liO.5 k-".. for UDN-2956A
I
R"" 2.5 k.l'l. for UDN,..2957A
I
INPUT
ENABLE
2.4,K
OUTPUT
SUBSTRATE
8;}------...,...---'--~_ _ _ __ , _ _ , _ , _ - - -
L __________ -'
SUB
DWG.NO. A-1O,241C
3-75
II
SERIES UDN"2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
SERIES UDN·2980A
HIGH·VOLTAGE, HIGH·CURRENT SOURCE DRIVERS
FEATURES
• TTL, OTL, PMOS, or CMOS Compatible Inputs
• 500 rnA Output Source Current Capability
• Transient-Protected Outputs
• Output Breakdown Voltage to 80 V
RECOMMENDED for applications requiring separate logic and load grounds, load supply voltage to +80 V, and load currents to 500 rnA, Series
UDN-2980A source drivers are used as interfaces
between standard low-power digital logic and relays,
solenoids, stepping motors, and LEDs.
Under normal operating conditions, these devices of 6 to 16 V. Types UDN-2981A and UDN-2982A
will sustain 120 rnA continuously for each of the will sustain a maximum output OFF voltage of
eight outputs at an ambient temperature of +50°C + 50 V, while Types UDN-2983A and UDN-2984A
and a supply of + 15 V. All devices in this series will sustain an output voltage of +80 V. In all cases,
incorporate input current limiting resistors and out- the output is switched ON by an active high input
put transient suppression diodes.
level.
Type UDN-298IA and UDN-2983A drivers are
for use with +5 V logic systems - TTL, Schottky
TTL, DTL, and 5 V CMOS. Type UDN-2982A and
UDN-2984A drivers are intended for MOS interface
(PMOS and CMOS) operating from supply voltages
Series UDN-2980A high-voltage, high-current
source drivers are .supplied in I8-lead dual in-line
packages. On special order, hermetically-sealed versions of these devices (with reduced package power
dissipation capability) can also be furnished.
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Output Voltage, Range VcdUON-2981A & UDN-2982A) ............................... +5 V to +50 V
(UDN-2983A & UDN-2984A) .............................. + 35 V to + 80 V
Input Voltage, VIN (UDN-2981A & UDN-2983A) ........................................... + 15 V
(UDN-2982A & UDN-2984A) ........................................... + 30 V
Output Current, loUT ........................................................... - 500 rnA
Power Dissipation, Po (anyone driver) .................................................. 1.1 W
(total package) ................................................... 2.2 W*
Operating Temperature Range, TA ............................................ -20°C to +85°C
Storage Temperature Range, Ts ............................................ -SSOC to + 150°C
*Derate at the rate of 18 mW/"C above +25"C.
SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
ONE OF EIGHT DRIVERS
51\.
\
~
z
0 2. 0
..
~
i=
«
20 K
~
C
'"~
1. 5
..
,
~~
0
\
"
2983/84 ONLY
;2 1. 0
u
~
3 K
\ -,
~ o. 5
OUTPUT
,,
~
;(
0
DWG.NO. A-10,242B
o
,
w
50
150
100
AMBIENT TEMPERATURE IN °C
Dwg. No.A-1I,112A
ELECTRICAL CHARACTERISTICS at TA = + 25°C (unless otherwise specified)
Characteristic
Output leakage Current
Collector-Emitter
Saturation Voltage
Input Current
Output Source Current
Symbol
IcEx
VCE1SAT)
Applicable
Devices
VIN = 0.4 V', Vs = 50 V, TA = + 70°C
VIN - 0.4 V', Vs - 80 V, TA - + 70°C
1
1
VIN
VIN
VIN
=
All
=
2.4 V, lOUT
2.4 V, louT
2.4 V, louT
2
2
2
UDN-2981 /83A
VIN
=
2.4 V
UDN-2982/84A
VIN = 3.85 V
VIN = 2.4 V
VIN - 12 V
UDN-2981183A
UDN-2982/84A
VIN
VIN
=
UDN-2981!82A
UDN-2983/84A
VIN
VIN
=
UDN-2981/82A
UDN-2983/84A
VR= 50 V, VIN
VR= 80 V, VIN
IF = 350 mA
UDN-2981!82A
UDN-2983/84A
IINIONI
lOUT
Supply Current
(Outputs Open)
Is
Clamp Diode
leakage Current
IR
Clamp Diode
FOlWard Voltage
Vf
All
Turn-On Delay
tON
All
Turn-Off Delay
-
tOff
Test
Fig.
Test Conditions
All
=
=
=
-100 mA
225 rnA
-350 mA
=
= =
3
3
3
3
2.4 V, VCE
2.4 V, VCE
=
=
2.4 V*, Vs
2.4 V*, Vs
=
=
=
=
Limit
Max.
Units
-
-
-
-
200
200
}LA
}LA
1.6
1.7
1.8
1.8
1.9
2.0
V
V
V
140
200
}LA
310
140
1.25
450
200
1.93
}LA
}LA
mA
-
-
-
-
mA
mA
-
2
2
50 V
80 V
4
4
-
-
10
-
10
mA
mA
5
5
-
-
50
50
}LA
}LA
6
-
1.5
2.0
V
-
1.0
2.0
}LS
5.0
10
}LS
0.4 V'
0.4 V'
=
lOOn,
=
35 V
0.5 EIN to 0.5 EouT' RL
VS
=
lOon,
=
35 V
3-77
Typ.
2.0 V
2.0 V
0.5 EIN to 0.5 EouT' RL
VS
• All Inputs Simultaneously
Min.
-
-
-350
-350
SERIES UDN-2980A
HIGH-CURRENT SOURCE DRIVERS
~HrGH=VOLTAGE,
TEST FIGURES
OWG. NO.A-ll ,083
DWG.NO. A-ll,084
Figure 2
Figure 1
OPEN
OPEN
DWG. NO. A-ll,086
DWG. NO. A-11,D85
Figure 4
Figure 3
OPEN
OWG. NO. A-ll , 088
OWG. NO. A-II/D87
Figure 6
Figure 5
3-78
SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
TYPE· UDN-2981 Al82A
SOO~--~--~---r--~----r---~--~---r--~--~
4S01f---+---+---+-~---I-~-+---+---+----I----I
II
50~--+---+---+----I----I--+---+----+-----I--~
~~--~'0~~2~0--~30~~4~0-~S~0-~5~~77-~8=0---790~~100
PER CENT DUTY CYCLE
Dwg. No. A-II,I07B
500
450
u 400
g
....
RECOMMENDED MAXIMUM OUTPUT CURRENT
« 350
~
\ l\\ .\
a
~
~~
250
gu 200
~
;
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
150
~
~
~
100
50
'"
;::.,
"
~
~
I'"
~
!t 300
~
J
V,
= 15 V
r--...
~
"-
~
~~~
~8
......
I
r-...
3"...
~
~ ......
k' "
r--...::: ~
";::::
...........
I
0
10
20
30 ..•
40
50
50
70
80
90
100
PER CENT DUTY CYCLE
Dwg. No. A-ll,lOBB
3-79
SERIES UON-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
SERIES UDN-29BOA
500
450
~
400
<
~ 350
",
~~~
RECOMMENDED MAXIMUM OUTPUT CURRENT
\\\ ,\
..
300
'"~
250
~
"- ~
'" "" " "
I-
::>
u
~
8 200
NUMBER OF OUTPUTS ....
CONDUCTING
SIMULTANEOUSLY
..~
~ 150
~
~ 100 H
V. = '35 V
)..
~ ~ ........ ~ ~
..............
~ ~ ~ r-....
.... .......:::
~
50
I
10
20
30
40
50
60
70
80
90
100
PER CENT DUTY CYCLE
Owq. No. A-ll,106B
500
450
u 400
~
<350
«
RECOMMENDED MAXIMUM OUTPUT CURRENT
\' ~\ \
E
~
..'"
300
ipSO
200
..
'"~
NUMBER OF OUTPUTS"
CONDUCTIN.G
SIMULTANEOUSLY
~ 150
~
g
:;(
100
50
'"
"
~
8
3,
'"
~\ ~" ~ ~
.......
~') ~~ "-...........
...........
~ t::::: .............1'-0..
::>
u
l
o
o
V. = 35 V
10
20
..........
II
'=
~:;::
~
~
30
40
50
60
PER CENT DUTY CYCLE
3-80
70
80
90
100
Dwg. No. A-ll.llIB
SERIES UDN-2980A
. HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
TYPES UDN-2983A184A
500
450
~ 400
...Sl«
RECOMMENDED MAXIMUM OUTPUT CURRENT
~ 350
~\1\
~ k.
\ ~',-"i'... ~ .............. """""
~ ~ ~ .... ~
" '"
...
~
300
'"
'"
250
:::l
U
g
"
8 200
.~
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
~ 150
~~
"""""
/~~ ~ ...........
"'-
~
100
V.
::::::: ;:::
-
= 60V
50
o
o
10
20
30
50
60
40
PER CENT DUTY CYCLE
70
80
90
100
Dwg. No. A-ll,109B
500
.
450
u
g,
...
400
"
«
~ 350
RECOMMENDED MAXIMUM OUTPUT CURRENT
\ ,\ l\
~
...Z
~
300
\
a'"
g'"
250
"
"""
~ l\.." '\.. "~
~
~~ "'-.." ~ ~ r--.
ou zoo
~
..'"
~
~
NUMBER OF OUTPUtS--'" .'
CONDUCTING
SrULTANEOUSLY
~ 150
10
-.....;
= 60 V
20
30
~
~
~~~~
50
o
o
.......
~~~~
;;( 100
V,
4
50
60
40
PER CENT DUTY CYClE
70
80
~
90
100
Owg. No. A-ll,llOB
3-81
o
SERIES UDN-2980.A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPES UDN-2981/83A
INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPES UDN-2982/84A
2. S
1.5
1.2
1
z
= 0.9
,.:
~
'"'"~
:::J
0.6
:::J
Q.
;!;
~,
~
2.0
V
v
:(
E-
Ei.5
~
,.:
~
~
'"'":::J
LJfl
l.0
U
1
>-
V
:::J
Q.
;!;
0.3
~
~i,\
L
~~
O. S
~J
~~
4
-t---j--j
IN4
INS
I N6
IN7
I N8 o---l§.J------t:>-t-:-:-t-{Ifr----.Nv--.(
Vs
Dwg. No. A-ll,113
TYPICAL VALUES: Vs = 50 V
lOUT = 200-300 mA
3-82
SERIES UDN-3600M
DUAL 2-INPUT PERIPHERAL and POWER DRIVERS
SERIES UDN·3600M
DUAL 2·INPUT PERIPHERAL and POWER DRIVERS
FEATURES
•
•
•
•
•
•
•
Four Logic Types
DTL/TTL/PMOS/CMOS Compatible Inputs
Low Input Current
300 mA Continuous Output Current
Sustaining Voltage of 80 V
Pin-for-Pin Replacement for Series LM3600N
Pin-for-Pin Replacement for SN7545lBP thru SN75454BP and
75461 thru 75464
Description
These "mini-DIP" dual 2-input peripheral and power drivers are bi-polar
mo.nolithic integrated circuits incorporating AND, NAND, OR, or NOR
logic gates, and high-current switching transistors on the same chip_ The
two· output transistors are capable of simultaneously sinking 300 mA continuously at ambient temperatures of up to +70°C. In the OFF state, these
drivers wjll sustain at least 80 V.
Applications
The Series UDN-3600M dual drivers are ideally suited for interface between
low-level or high-level logic and high-current/high-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting dIOdes, memories, heaters, and other non-inductive loads of
up to 600 mA (both drivers in parallel).
With appropriate external diode transient suppression, the Series UDN3600M drivers can also be used with inductive loads such as relays, solenoids,
and stepping motors.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .............................................. 7.0 V
Input Voltage, VIN ................................................ 30 V
Output Off-State Voltage, VOFF ....................................... so V
Output On-State Sink Current, ION .................................. 600 rnA
Power Dissipation, PD • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1.5 W
Each Driver ................................................. 0.8 W
Derating Factor Above TA = 25°C ..................... 12.5 mW/oC or 80°C/W
Operating Free-Air Temperature Range, TA ..................... -20°C to +S5°C
Storage Temperature Range, Ts ........................... - 55°C to + 150°C
3-83
o
SERIES UDN-3600M
DUAf2~INPUT PERIPHERAL and POWER DRIVERS
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee)
Operating Temperature Range
Current into any output (ON state)
Min.
NOI]l.
Max.
4.75
5.0
+25
5.25
+85
300
a
Units
V
°C
mA
INPUT PULSE CHARACTERISTICS
V',lol ~ OV
v',(1! ~ 3.5V
\f
~
t,
~
tp
PRR
7ns
14ns
~
~
II's
500kHz
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
''1'' Input Voltage
Symbol
Temp.
Driven
Input
Vee
Limits
Other
Input
V',(l}
MIN
V',(OI
1',(0)
"1" Input Current
1,,(11
Input Clamp Voltage V,
MIN
MAX
0.4 V
30 V
MAX
30 V
OV
"0" I nput Voltage
"0" Input Current
Output
Min.
Max.
Typ.
Units
2.0
MIN
50
5.0 V, TA
=
=
0.8
100
V
I'A
I'A
V
10
-1.5
-12 rnA
SWITCHING CHARACTERISTICS at Vee
Notes
V
2
2
25°C
Limits
Characteristic
Symbol
Turn-on Delay Time
tpdo
Turn-off Delay Time
tpdl
Test Conditions
Vs ~ 70 V, Rl
Cl ~ 15 pF·
Vs ~ 70 V, Rl
Cl ~ 15 pF
Min.
Typ.
Max.
Units
Notes
~
46511 (10 Watts)
200
500
ns
3
~
465!1 (10 Watts)
300
750
ns
3
NOTES:
1. Typical values are at Vee ~ 5.0V, TA ~ 25"C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. CapaCitance values specified include probe and test fixture capaCitance.
3-84
SERIES UDN·3600M
DUAL 2·INPUT PERIPHERAL and POWER DRIVERS
Type UDN-3611M Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" Output Reverse Current
loff
"0" Output Voltage
YO"
"1" level Supply Current
"0" Level Supply Cu rrent
lee(1)
lee(o)
Test Conditions
Driven
Other
Input
Input
Vee
Temp.
MIN
OPEN
MIN
MIN
MAX
MAX
NOM
NOM
2.0 V
2.0 V
O.SV
0.8 V
5.0 V
OV
2.0V
2.0 V
Vee
Vee
5.0V
limits
Output
Min.
Typ.
80 V
80 V
100mA
300mA
0.25
0.5
8.0
35
UV
Max.
Units
100
100
0.4
0.7
12
Jl.A
Jl.A
V
V
mA
mA
49
Notes
."
1,2
1,2
OUTPUT Vs
:t·: --:
INPUT
I
10%
I
I
'pdl
I
'
~
.----~·I-Ipdo
, 'r-------,: --
OUTPUT
/50%
50%
•
D"G. NO.
L
.
A-7B76D
--Vout(1)
VO"'(O)
OWG. No. A-7628C
Type UDN-3612M Dual NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
..
Symbol
Characteristic
"1" Output Reverse Current
loff
"0" Output Voltage
Von
''l'' Level Supply Current
"U" Level ~uPPIY t;urrent
lee(1)
leC(o)
INPUT 2.4V
Test Conditions
other
~nven
Input
Input
Vee
Temp.
NOM
MIN
OPEN
MIN
MIN
MAX
0.8 V
0.8 V
2.0V
2.0V
OV
Vee
Vee
2.0V
2.0V
OV
NUM
MAX
O.UV
o.U V
Limits
Output
Min.
80 V
80V
100mA
300mA
ryp.
Max.
Units
0.25
0.5
12
100
100
0.4
0.7
14
Jl.A
Jl.A
V
V
mA
1,2
oj
rnA
T,T
4U
OUTPUT Vs
INPUT
=""-----
I
I
Vin(O)
I
I
I
iI
I
I
'pdO
15pF
(Not,3)
50%
OUTPUT
- - - -
: ':" LOAD
I'-_ ....CIRCUIT
____ .J
- -
-
D'I/G, 'NO.
V ~vt(O)
A-J900A
D':'I6. NO. A-9638
NOTES:
I. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.
3-85
Notes
o
SERIES UDN,3600M
DUA12-INPUT PERIPHERAL aM POWER DRIVERS
Type UDN-3613M Dual OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
loll
"0" Output Voltage
Von
"1" Level Supply Current
"0" Level Supply current
lee(ll
lee(ol
INPUT
VCC~5V
OUTPUT
Test Conditions
Driven
Other
Input
Input
Vee
Temp.
NOM
NOM
MIN
OPEN
MIN
MIN
MAX
MAX
2.0V
2.0 V
O.S V
O.S V
5.0V
OV
OV
OV
O.S V
O.S V
5.0 V
OV
Limits
Output
Min.
SO V
SO V
100 rnA
300mA
Typ.
Max.
Units
Notes
0.25
0.5
S.O
36
100
100
0.4
0.7
13
50
I'A
I'A
V
V
rnA
rnA
1,2
1,2
Vs
INPUT
RL
:
I
I
I
:
I
tpd]
I
I
15pF
i INot'31
-=
I
LOAD
~'O:;,:%,--_ _ _ _ Vin(O)
10%
I
I
I
:
OUTPUT
:
I
-,.---.I
I
...---'-I-I-tpdo
jr5Q<1-~---5-0%"L~
--
--Vout(l)
_ _ _ _ _--'_
I CIRCUIT I
L
____ J
Vout(O)
(MG,~.
,1,.9795
DWG. No. A-7628C
D'IIG. MO. A-7a77S
Type UDN-3614M Dual NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" Output Reverse Current
loll
"0" Output Voltage
Von
"1" Level Supply Current
"0" Level Supply Current
lec(lI
lee(ol
INPUT
VCc=-5V
OUTPUT
Test Conditions
Driven
Other
Input.
Input
Vee
Temp.
NOM
NOM
MIN
OPEN
MIN
MIN
MAX
MAX
O.SV
O.S V
2.0 V
2.0 V
OV
5.0V
O.S V
O.SV
OV
OV
OV
5.0 V
Limits
Output
Min.
SOV
SO V
100 rnA
300mA
Vs
INPUT
I
I
I
:I
(Note 3) I
1 ':"
tOAD:
I
:
I
ISpF
I
CIRCUIT
L
_____
DWG. NO.
:
J
OUTPUT
i
A-99'42
NOTES:
l. Typical values are at Vee ~ 5.0 V, TA ~ 25°C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.
3-86
Typ.
Max.
Units
Notes
0.25
0.5
12
40
100
100
0.4
0.7
15
50
"A
I'A
V
V
rnA
rnA
1,2
1,2
SERIES UDN-S700A
QUAD 2-INPUT PERIPHERAL and POWER DRIVERS
SERIES UDN·5700A
QUAD 2·INPUT PERIPHERAL and POWER DRIVERS
-
TRANSIENT PROTECTED OUTPUTS
FEATURES:
•
•
•
•
•
Four Logic Types
DTljTTLjPMOSjCMOS Compatible Inputs
Low Input Current
300 rnA Continuous Output Current
Sustaining Voltage of 80 V
Description
These 16-lead quad 2-input peripheral and power drivers l,!re bi-polar monolithic integrated circuits in:corporating AND, NAND, OR, and NOR logic
gates, high-current switching transistors, and transient suppression diodes on
the same chip. The four output transistors are capable of simultaneously
sinking 300 mA continuously at ambient temperatures of up to +70°C. In
the OFF state, these drivers will sustain at least 80 V.
Applications
The Series UDN-5700A quad drivers are ideally suited for interface between
10w;level or high-level logic and high-currentfhigh-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, and heaters.
The integral transient suppression diodes allow their use with inductive
loads such as relays, solenoids, or stepping motors without the need for discrete diodes. For non-inductive loads, the diode common bus can be used
as a convenient lamp test.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .............................................. 7.0 V
Input Voltage, VIN ................................................ 30 V
Output Off-State Voltage, VOFF ....................................... 80 V
Output On-State Sink Current, ION .................................. 600 mA
Suppression Diode Off-State Voltage, VOFF ............................... 80 V
Suppression Diode On-State Current, ION' ............................. 600 mA
Power Dissipation, Po ............................................ 2.0 W
Each Driver ................................................. 0.8 W
Derating Factor Above 25°C ......................... 16.7 mW;oC or 60°C/W
Operating Free-Air Temperature Range, TA ••.......•.•..•.•.... -20°C to +85°C
Storage Temperature Range, Ts ........................... -55°C to + 150°C
3-87
o
SERIES UDN·S700A
QUAD2.• INPUTPERIPHERA1«ndPOWE-RDRllJERS
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee):
Operating Temperature Range
Current into any output (ON state)
Min.
Nom.
Max.
4.75
5.0
5.25
+85
300
o
+25
Units
V
°C
mA
INPUT PULSE CHARACTER'ISTICS
V',IO} ~ OV
V',i1! ~ 3,SV
,,~
7ns
~
14ns
t,
tp ~ II's
PRR ~ SOOkHz
ElECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Symbol
Temp.
Driven
Input
Vee
Limits
Other
Input
Output
V',(1)
"0" Input Voltage
V',IO)
MIN
"0" Input Current
"I" Input Current
1',(0)
MAX
(;,11 )
MAX
0.4 V
30 V
MIN
-12 rnA
MIN
Input Clamp Voltage VI
Typ,
Min.
Max,
Units
2,0
"I" Input Voltage
SWITCHING CHARACTERISTICS at Vee
=
30 V
OV
50
0.8
V
100
!'A
2
10
JlA
V
2
-1.S
5.0 V, TA
=
Notes
V
25°C
Limits
Min,
Symbol
Test Conditions
Turn·on Delay Time
tpdO
Turn·off Delay Time
tpd1
Vs ~ 70 V, RL - 46512 (10 Watts)
CL ~ IS pF
Vs ~ 70 V, RL ~ 46512 (10 Watts)
CL ~ 15pF
Characteristic
Typ,
Max,
Units
Notes
200
SOO
ns
3
300
7S0
ns
3
NOTES:
1. Typical values are at Vee ~ S.OV, TA ~ 2S'C.
2, Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with. respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance,
3-88
SERIES UDN-S700A
QUAD 2-INPUT PERIPHERAL and POWER DRIVERS
Type UDN-S703A Quad OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
loll
"0" Output Voltage
Von
Diode Leakage Current
DiodeForward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
INPUT
V CC - 5V
icell}
leelo}
OPEN
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
2.0 V
2.0 V
O.B V
0.8 V
OV
OV
OV
0.8 V
O.B V
OV
Vee
5.0 V
OV
Vee
5.0 V
OV
limits
Dutput
Min.
BOV
BOV
150 rnA
300 rnA
OPEN
Typ.
0.35
0.5
1.5
16
72
Max.
Units
100
100
0.5
0.7
200
1.75
25
p.A
Notes
JLA
V
V
JLA
V
rnA
rnA
3
4
1,2
1,2
Max.
Units
Notes
100
100
0.5
0.7
200
1.75
24
9B
JLA
JLA
V
V
..c.:..100
OUTPUT
-it'
i~
.-------1
RL
I
INPUT
SO%
10% ~
I
--':'::'::'~t--- "
,
~ t--'f
96%-;- - - - - - - -- Ym(1)
SO%
'
j,O%
V,,'O)
,
,
)
a !- 'pdO
rr--c-":I
SO%
c:::::::
Type UDN·S706A Quad AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
loll
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
leell}
leC(o}
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
2.0 V
2.0V
2.0V
2.0 V '.
O.B V
0.8 V
OV
Vee
Vee
OV
Vee
5.0 V
OV
,
,
1
t -=- LOAD
I
CIRCUIT
L _____
;~o.
,
t pel I
I
J
0.35
0.5
1.5
16
70
j ,
SO%
1
l5pF
Typ.
~ t--'f
,
: TNo,.S)
Min.
80 V
BOV
150 rnA
300 rnA
OPEN
96%-;- - - -,- - - - -- Vin(l)
RL
OWG.
Output
Vee
5.0V
OV
- - --1
I
Limits
--r--------1
'
, 10%
VloiO)
r---_t_'pdO
'_...J1"'s",,-.---sO%""""'\C:::::::
_OU_T_PU_T _ _
,A-7878A
NOTES:
1. Typical values are at Vce= 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR= Voff{mln).
4. Diode forward voltage drop measured at if = 300 rnA.
5. Capacitance values specified include probe and test fixture capacitance.
3-89
JLA
V
rnA
rnA
3
4
1,2
1,2
o
SERIES UDN-5700A
QUADc2-INPU'J' ~ERIPHERAl i1nd POWER nRIVERS
Type UDN-5707A Quad NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" Output Reverse Cu rrent
loff
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
INPUT
!cell)
leelO)
o~;:
2.4V V(C""5V 0 EN
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
O.S V
O.SV
2.0 V
2.0 V
Vee
Vee
2.0 V
2.0 V
Vee
OV
OV
5.0 V
Vee
OV
OV
5.0 V
Limits
Output
Min.
SO V
SOV
150 mA
300 mA
OPEN
Typ.
0.35
0.5
1.5
24
SO
Max.
Units
Notes
100
100
0.5
0.7
200
1.75
30
106
"A
p.A
V
V
p.A
V
mA
mA
3
4
1,2
1,2
Max.
Units
Notes
100
100
0.5
0.7
200
1.75
30
100
p.A
p.A
V
V
p.A
V
mA
mA
3
4
1,2
1,2
Vs
r l'- ---1
RL
INPUT
,
,,,
-="'-----
I
V;n(O)
15pF
i }No'e3)
:
~
LOAD
OUTPUT
IL _____
CIRCUIT JI
~-~--- - - - -
DWu. NO. A-769:9A
Vout(O)
OWG. NO. A"1900A
Type UDN-5733A Quad NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" Output Reverse Current
loff
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
!ce(1)
lee(o)
INPUT
VCC=5V
OPEN
OUTPUT
Temp.
Test Conditions
Driven
other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
O.S V
O.SV
2.0 V
2.0V
O.S V
O.SV
OV
OV
Vee
OV
OV
5.0 V
Vee
OV
OV
S.OV
Limits
Output
SOV
SOV
150 mA
aDO mA
OPEN
Min.
Typ.
0.35
0.5
1.5
24
SO
Vs
INPUT
~"----- Vlo(O)
,
'pdO
15pF I
I(Note5)~
":"lOAD I
L.C:~':':"
DIIG. HO.
OUTPUT
_J
~---'-
- - - - - - vout{O)
A-~135A
NOTES:
1. Typical values are at Vee = 5.0 V, TA = 25'C.
2. Per package.
3. Diode leakage current measured at VR = Vof/(m;n).
4. Diode forward voltage drop measured at If = 300 mAo
5. Capacitance values specified includ~ probe and test fixture capacitance.
3-90
SERIES UDN-S700M
DUAL PERIPHERAL and POWER DRIVERS
SERIES UDN·5700M
DUAL PERIPHERAL and POWER DRIVERS
-
TRANSIENT PROTECTED OUTPUTS
FEATURES
•
•
•
•
•
Four Logic Types
DTL/TTL/PMOS/CMOS Compatible Irrputs
Low Input Current
300 rnA Continuous Output Current
Sustaining Voltage of 80 V
Description
These "mini-DIP" dual peripheral and power drivers are bi-polar monolithic
integrated circuits incorporating AND, NAND, OR, or NOR logic gates,
high-current switching transistors, and transient suppression diodes on the
same chip. The two output transistors are capable of simultaneously sinking
300 rnA continuously at ambient temperatures of up to +70°C. In the OFF
state, these drivers will sustain at least 80 V.
Applications
The Series UDN-5700M dual drivers are ideally suited for interface between
low-level or high-level logic and high-currentfhigh-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, and heaters with a load current of up to
600 rnA.
The integral transient suppression diodes allow the use of these drivers
with inductive loads such as relays, solenoids, or stepping motors without
the need for discrete diodes. When not required for transient suppression,
the diode common bus can be used to perform the "lamp test" function.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee............................................... 7.0 V
I nput Voltage, Vin................................................. 30 V
Output Off-State Voltage, Voff ' ................•....................... 80 V
Output On-State Sink Current, Ion' ................................... 600 rnA
Suppression Diode Off-State Voltage, Voff' ................................ 80 V
Suppression Diode On-State Current, lOR' ............................... 600 rnA
Power Dissipation at TA = 25°C, Po.................................... 1.5 W
Each Driver. . . . . . . . . . . ...................................... 0.8 W
Derating Factor................................. 12.5 mW/oC or 80°C/W
Operating Free-Air Temperature Range, TA........................-20°C to +85°C
Storage Temperature Range, Ts .............................. -55°C to +150 oC
3-91
II
SERIES UDN·S700M
DUAL PERIPHERAL and ,POWER DRIVERS
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee):
Operating Temperature Range
Current Into any output (ON state)
Min.
Nom.
Max.
4.75
5.0
+25
5.25
+85
300
0
Units
V
°C
mA
INPUT PULSE CHARACTERISTICS
V'olo) ~ OV
tf
~
7ns
V'ol1! ~ 3.5V
t,
~
14ns
tp ~ II'S
PRR ~ 500kHz
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Symbol
Characteristic
"1" Input Voltage
V'nl11
"0" Input Voltage
V'olol
Temp.
Driven
Input
Vee
Other
Input
Limits
Output
MIN
Min.
Typ.
Units
0.8
V
"0" Input Current at all Inputs
except Strobe
1'0101
MAX
0.4 V
30 V
50
100
I'A
"0" Input Current at Strobe
l'nlOI
MAX
0.4 V
30 V
100
200
I'A
"1" Input Current at all Inputs
except Strobe
"1" Input Current at Strobe
Input Clamp Voltage
Notes
V
MIN
;
Max.
2.0
l'nlll
MAX
30V
OV
10
1'0111
VI
MAX
30 V
OV
20
I'A
p.A
MIN
-12 rnA
-1.5
V
2
2
2
SWITCHING CHARACTERISTICS at Vee
Limits
Charactenstic
Symbol
Tu rn·on Delay Time
tpdO
Turn·off Delay Time
tpdl
Test Conditions
Vs ~ 70 V, RL
CL ~ 15 pF
Vs ~ 70 V, RL
CL ~ 15 pF
Min.
Typ.
Max.
Units
Notes
~
465 £2 (10 Watts)
200
500
ns
3
~
465 H (10 Watts)
300
750
ns
3
NOTES:
1. Typical values
u
IX
0
0u
W
200
...J
...J
0
U
OL-__~~~__~~~L-__~__~
0200
400
,'INPUl: CURRENT
""
'owl,. ~D.
Fig~re 8 -
Figure 7'
Typ.e,~LN-2004A $CijEM~TIC 'AND APPLICATION
600
iN:",A -, liN
A·9755A
i.
COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT
3-99
iHIGH·WRREN-f·1N-TtRFA{£-1)RIVERS-{eontinued) .
The input current as a function of input voltage is
shown in Figure 9 for theULN-2002A. ULN-2003A.
and the ULN-2004A. .TheType ULN-2001A Darlington array is not shown ' since input current is more
a function of the external circuitry. Systems utilizing·
either CMOS or PMOS logic.should be evaluated for
intrinsic current limiting as was shown in ,Figure 4.
z
2.0
.
V
"'~
I
1
loS
Z
0-
~
'"'"
::>
u
i2
~
1.0
~
,
o. sV "
V
~
......... ,-
....
,
20
22
INPUT VOLTAGE - V1N
14
16
Under worst case conditions with a low logic 1 voltage (2.4 V), and a high input resistor value (3.51 k D),
the available load current is reduced to only 145 rnA.
Compounding this problem'would be the effect that a
high drive current requirement would have on the
logic output voltage since that is normally specified at
only 400 p.A. If the gate output is connected to additional logic elements,. a minimum logic 1 voltage of
2.0 V must be maintained and at that level the worst
case Darlington load current would be reduced, to only
31mA!
,~
,
0
12
Occasionally, applications featuring minimum available input drive current and a high output load current
have shown the Type ULN-2003A and ULN-2004A
Darlipgton arrays to be in"dequate for the partiGular
requirement under worst case conditions .. This usually results from the restricted drive current available
from a TTL or CMOS gate operating from a nominal
supply of 5 volts.
'flV\c.~.. "
,;-'
""'"
100''''
z
Low Available Drive Current Operation
24
18
26
D'r«l. NO. A-9757A
A simple solution to this problem is through the
use of inexpensive pull-up resistors as shownin Figure
10. The minimum resistor value is determined by the
maximum allowable sink current (16 rnA for TIL,
360p. A for CMOS), the minimum logic 0 output voltage, and the maximum supply voltage as per the following equation:
2.5r---~--'----r---.----r---~--'---~
z
2.0
t---t---+---+---t----t---t;ooo.,;...+---;
1.5
I---+----i----+---t,'--t-::-.,,+-:::'""'"'''I----i
I
~
z
Vs -
VOUT(O)
Rp > ---;--- · l oUT
F
INPUT VOLTAGE - VIN
For standard TIL, the minimum value' for Rp is
about 316 D with values between 3000 D and 5000 D
being used customarjly. Multiple pull-up resistors in
a single in-lin,e 'package are shown in Sprague Engineering Bulletin No; 7041 ; resistors in a dual in-line
package are shown in Bulletin N~. 7042. .
DIIG. NO • .11-97568
2.0
z
I
'"
1.5
«E
z
':
1.0
0-
~
~
,...
... '.-_.-'
.
----
a '0.5 1-.-•
0-
i2
z
o
'~ ~
s
"""",..- ~ ~-
6
7
8
'l'(VlC.~\.~ • •
9
10
~
Conclusion
Since .the Series'ULN-2000A high-voltage, highcurrent .Darlington transistor arrays are quite conservatively designed, the basic product is fully capable of
being ordered to higher voltages and/or higher currents
than the standard specifications. Presently, parts are
available to withstand up to 95 volts on the output.
Parts with this higher voltage rating would create a
potential for switching,loads far in excj:ss of q5 watts!
Aside from the higher power handling Capability, 'the
higher voltage rating is required for driving plasma or
gas-discharge displays .
~.-.
11
12
DWil. NO. A -9899A
Figure 9
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
.3-100
HIGH-CURRENT INTERFACE DRIVERS (Continued)
Although not intended for high power applications, there is also. available a Series ULS-2000H
with hermetic sealing and an operating temperature"
range to + 125°C. These parts are recommended for
military and aerospace applications as well as commercial and· industrial c()ntrol applications where
severe .i:nvironments may be encountered.
Cer-DIP, industrial-grade hermetic devices, Series ULQc2000R, are Qlted for use oyer .the temper~.c
ture range of-40°C.to +85°C, perinitting their use
in commercial andindustr;ial applications requiringa
moderate·package power dissipation (1 W at TA =
+85°C).
.
.
ULN-2003A
+Vcc
Rp
All of these Darlington transistor arrays offer a
common solution to a great many interface needs.
The minImal component count and straightforward
printed wiring board layout offer benefits in cost
reduction, simplicity of board layout, and savings in
space. Other benefits are a reduction in insertion
costs, and lower handling a'qd i1l.ventorycoststhan
other alternatives. Cost benefits from some of these
factors are not very tangible. However, fewer components, less complex boards, etc. usually result in
lower systeW. ~a!lufac~rin~ cpsts. ,
II
TTL
OUTPUT
Figure 10
T~sfNg~~~~LO~~V~E~~~~::T
3--lO1
HlGH-CURRENT ~INTERFAGE DRIVERS
{Cont~nued}
INTERFACE IC MOTOR DRIVE APPLICATIONS
and cost economy are some of the benefits to be
derived from the use of Sprague Interface ICs.
An increasing number of these Sprague devices
are especially designed for or are easily adapted
to motor drive applications. The availability of
these devices is especially significant in view of
the increasing use of microprocessor-based controls for servo and stepper motors.
INCORPORATION OF LOGIC
systems and power drivers into a monolithic
mtegrated circuit requires special skill and experience" Sprague Electric Company has
developed such skill, and has long been a leader
in solid-state interface technology and devices.
Improved systems reliability and performance, lower component counts, space savings
THE
UCN-4202A STEPPER MOTOR TRANSLATOR/DRIVER
UCN-4202A will drive permanent
magnet (PM) stepper motors rated to 500 rnA
and 15 V with a minimum of external components required, or, the device may be used as a
logic translator to drive discrete high-power
transistors or the Sprague UDN-2949Z HalfBridge Motor Driver.
THE
RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage, VeE ... .
Output Current, lOUT ..... .
Supply Voltage, Vee .... .
Supply Voltage, VK .
Input Voltage, VIN ..... .
With the MONOST ABLE RC timing pin (Pin
11) tied to Vee (Pin 16) the circuit performs a
full-step function. States Band D are stationary
states and a separate input pulse is required to
move through elich of four output states.
.13.5 V
.... 500 rnA
...... 5.5 V
.........
. ... 13.5 V
................ 5.5 V
Timing Conditions· Double·Step Mode
STEP ENABLE
The UCN-4202A internal step logic activates
one of four output sink drivers to step the load
from one position to the next. The logic is activated when the STEP INPUT (Pin 10) is pulled
low for at least 1 /-Is and then allowed to return
high. The sequence of states is determined by the
DIRECTION CONTROL (Pin 12), either A-BCoD, or A-D-C-B.
In the double-step mode states Band Dare
transition states with durations determined by
the MONOSTABLE RC timing (Pin ll). Improved motor torque is obtained at double the
nominal motor step angle, and motor stability is
improved for high step rates.
~
111-'s Min
STEP INPUT
DIRECTION CONT"RQL::]
11-'sMin
I+-\f;~ j 1+-'-------
OUTPUT A
OUTPUT B
OUTPUT C
OUTPUT D
TIME/OUT
MONOSTABLE
MONOSTABLE
R/C
D~·Ir;.
NO. A-ll, 186
NOTE: State B and State 0 Output pulse duration is typically 11.5
ms, with R = 510 kQ, and C = 0.02 I/F
3-102
HIGH-CURRENT INTERFACE DRIVERS (Continued)
L/R DRIVE CIRCUIT
Used to Drive A 12-Volt
500 rnA Unipolar Stepper Motor
(Double-Step Mode)
o
oUTP UT o--1H-+-++--fTI--{>oENABLE
R
':::J-4Hm--t-----" 01 RECTION
CONTROL
+ 12 V 0.-.......-----171
«1}HjQJ--t----o STEP 1NPUT
i----,=1]}---t---oSTEP ENABLE
Dwg. No. A-II, 187
UDN-2949Z
UDN-2949Z
TYP'CAL A-C MOTOR APPLICATION
+5V
STOP
+5V
+5V
UCN-4202A
CD4049AE
10K
+24V
{;JH,
MQT
SPEED,
~o
-,
"" 80 Hz
\
1- - "
'3.6
510
IOK~---fm--'r
, K
K',
r 5.1
, K
,
:-IZPF
=
DEAD TIME,
'" 501"'
Dwg. No, 8.1441
3-103
HIGH-CURREN-TINTERFACE DRIVERS (Continued}
UDN·2949Z HIGH·CURRENT BIPOLAR HALF· BRIDGE MOTOR DRIVER
THE UDN-2949Z is a monolithic half-bridge
motor driver supplied in a power tab TO-220
style package. The circuit combines sink and
source drivers with diode protection, gain and
level shifting systems, and a voltage regulator
for single-supply operation. The unit is
specifically designed for servo motor drive
applications using pulse width modulation
(chopping).
RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage Range, Vs """, .......... 15 Vto 28 V
Input Voltage, VIN ........ '......
. ....... 5.5 V
Continuous Output Current, lOUT ................ ±2.0 A
The chopper drive mode is characterized by a
minimum power dissipation requirement while
allowing the output to switch currents of 2
amperes. Output doc current accuracies of better
than 10070 at 100 kHz can be obtained.
The UDN-2949Z may be used in pairs (fullbridge) for doc stepper motor or brushless doc
motor drive applications. High load currents or
step rates will usually require an external ground
clamp diode (lN4000) connected at the output
of each device.
+ 24 V <>-------t-----t---t---~
D I RECTi 0 N <>----+--1 )>o----+-t------+-1;x>~
The UDN-2949Z power driver may be also be
used in stepper motor bipolar bridge drive circuits for example, with the Sprague UCN-4202A
Stepper Motor Translator/Driver, as shown.
SPEED < > - - - - - - " - - - - - - - - - - - - '
(PWM)
DWG. NO. A-ll,182
FULL-BRIDGE D-C SERVO MOTOR APPLICATION
DIRECTIO~
I
-I
r-
> 5~s
--! ~ >750~s
::1l r- > 5~s
l
I/->
75(\1s
SPEED(P~~
'OO'~L
+28V
cwo-----'
ccw
0 - -_ _ _ _ _- '
,,1,
Dwg. No. A-ll,181A
Timing Condition.
SINGLE-WINDING D-C OR STEPPER MOTOR
3-104
:"-11.2<11
HIGH-CURRENT INTERFACE DRIVERS (Continued)
TYPICAL 3·PHASE BRUSHUSS D·C MOTOR DRIVE
D
ULN·370U andULN·3702Z HIGH·CURRENT DRIVERS
THESEHIOH-CURRENT drivers are suitable
for driving doc motors rated to ±2.5 A and 18
V witllminimum external components. Internal
voltage, current, and temperature shut-down
circuitry protect these devices under the most
severe operating conditions. The ULN-3702Z
doesnpt include the high-voltage shutdown,
allowing operation with supply voltages up to 28
V. The high-gain, high-impedance operational
amplifier "onfiguration 200 V transistors)
and both digit and segment drivers incorporate all
pull-up, pull-dowlJ, current limiting, off-bias
reference, etc. which wen; formerly required in
discrete and/or hybrid systems .. With the combination of. the digit and segment drivers (each
capable of withstanding. 120 V), the split power supply approach affords PN diode IC technology
suitable for driving a display usually requiring a ISO
V minimum ionization voltage (equivalent to ± 90 V
in the split system).
GAS DISCHARGE DISPLAY IC.
.,";;
Early in 1972,Sprague ~uccessfully produced its
first. high-voltage IC designed for gas discharge
displays· - a five channel, 130 V unit for· cathode
(segment) interface. Subsequently, other circuits"
both' cathode and anode drivers, were produced;
most of which were used in. calculator applications
with the ,Burroughs Panaplex@ II. In Figure 3 is
shown a display interface system utilizing the UHP481 and U,l:JP-491 di~play drivers, associated thick~
film networks, and discretes. This was a step forward, but still required external discrete components.
Through a collaborative effort begun late in 1973
between Sprague Electric and Burroughs Corp. a
newer, more efficient interface scheme evolved.
Featured in "Electronic' Displays '75", this series of
monOlithic IC interface devices for the high"voltage
gas discharge panels has been one of the trailblazers
in the world of display interface ICs. Intended for
use in multiplexed display systems, these ICs present
one of the easiest and least expensive solutions to a
,
The use of the Series UDN-61ooI7100A gas
discharge display drivers shows the need for ocly two
monolithic ICs for displays of up to eight digits and
eight segments as shown in Figure 4. Systems
requiring digit or segment counts greater than eight
employ additional driver ICs, and with the exception
of theTypeUDN-7180A segment driver, the segment
ICs. all have outputs with internal current~limiting
resistors for the display segments. The UDN-7180A
device, for reasons of package power dissipation
and/or dissimilar segment currents (certain 14 or 16
segment alphanumeric panels) can also be used, but
must have external, discrete current-limiting
resistors.
0.40
0.36
0.32
0.2 8
0.2 4
Cf)
W
0::
~
0.2 0
0.16
,
::;;
'.
lOUT
... ,
VOUT(OFF)
UON~28A21
,
I.SA
'I.SA
-SOY
";'SOV
UDN.i28A3B
UDN·28A4B
UDN·28A5B
UDN·28A6B
I.SA
I.SA
I.SA
1.5 A
-SOY
.... SOV
TTL, DTL
Outputs
Sink
Source
.
.
-SOY
-SOY
SVMOS
IO·ISVMOS
X
X
.
.
2
X
X
X
2
2
2
X
APPLICATIONS
UDN-2Ule,lectrolle"sltJvePrlnter•• Motor Drives.·General Purpos'e"lgh-Current
UDN-2U2 e,lectro.ensltlve Printers. Motor Drives. General Purpose High-Current
UDN-2U3Motor.l)rive, Solenoids, other General Purpose High-Current Loads
UDN-2a.uMotorDrlve, Solenoids. other General Purpose Hlgh-CurrenHoads
UDN-2U5 Bidirectional D-C and Stepping Motors, Oth.r High-Current Loads
UDN-2U' Bidirectional D-C and Stepping Motors, Other High-Current Loads
PRINT ELECTRODES
I
4
PRINT ELECTRODES
3
2
1'-++-+--0 IN 4
.IN I
II-+++--ovs or GND
O--~-.,--~
1-1=:1'-+-+---0 ,IN
IN 2°--+-+-0F-i
3-120
3
HIGH·CURRENT INTERFACE DRIVERS (Continued)
When switching inductive loads, the output transistor should be protected by a suitable clamping
technique. The simplest approach is to use diode
clamps to the supply; in Figure 2A the UDN2H.+l /42B uses a discrete diode on each output. Also
in Figure 3A and Figure 4, a straight diode clamp is
shown for the UDN-2843/44B (Figure 3A) and for
the UDN-2845/46B (Figure 4).
ITsistor value might be also substituted; a IA load
operating with a l5Q resistor will produce similar
results to a 15 V Zener diode. In F~gure 5, the combination Zener/damp diode is shown for a 'bridge'
configuration such as Figure 4.
The allowable output current and duty cycle as a
function of the number of drivers activated is shown
in Figure 6A. This graph is for a + 70°C ambient
and will insure that the device junction temperature
will not exceed a + 150°C level. Figure 6A is for the
'B' package without any heat sinking; package rating
is 45°C/W or a derating of 22.2 mW/oC for this
copper alloy plastic DIP.
For improved turn-off', it may be possible to usc a
combination diode/Zener diode scheme; in Figures
2B and 3B the Zener diode will allow the flybaek
voltage to rise above the supply voltage, thm
speeding lip the turn-oil of the load. An appropriate
II
tN
IN
2841/42
v-
vFigure2B
Figure2A
IN
IN
OUT
OUT
2843/44
2843/44
v-
vFigure3B
Figure3A
3-121
HIGH-CURRENT INTERFACE .DRIVERS (Continued)
Figure 4
v-
Figure 5
v-
3-122
HIGH-CURRENT INTERFAC E DRIVERS (Continued)
.
UON 2841- 28468
1.5
1.0
IOUT
A
II
- - - - - + 7 0 · C AMBIENT
INK
"B"DIP-NO HEATS
0.5
Vs :S -40V
o
20
40 DUTY CYCLE-%
60
80
100
Flgure6A
UON 2841-468
1.5
1.0
lOUT
A
+~~;~E:M~~~N:EAT SINK
Vs :S -40_V_ _ _, 0.5
L---L~~~loo
o
20
40 DUTY CYCLE-%
Figure 6B
3-123
60
80
. HIGH-CURRENT INTERFACE DRIVERS (Continued)
Through the use of a Staver V-7 heat sink, the
package rating may he improved nearly twice that of
Figure 6A; the rating of this package with the V-7
heat sink drops to a maximum of 27.5°C/W or a
derating of 36.4 mW IDe. In figure 6B the allowable
output current and duty cycle at + 70°(, with the addition of the Staver V-7 heat sink is shown. Both
Figures 6A and 6B assume worst case limits of VON,
IS, DIP rating, etc.
offers a new high in breakdown voltage (120 V) for
monolithic power Iperipheral drivers.
Supplied in a fully hermetic 16-lead, side-brazed
ceramic DIP, the PIN diode drivers are subjected to
the screening procedures specified in MIL-STD-883
method 5004, class B, paragraphs 3.1.1 through
3.1.6. Also made available is a 168 hour burn-in per
method 1015, condition A if so required and
speci fied.
No doubt other applications will arise in the
future, but these figures arc representative or power
interfa.:e applications which may be simplified
through the use of these Sprague power integrated
circuits to replace discrete components.
Additionally, cost and space reductions should be
achieved with the Series UDN-2840B quad 1.5 A
switches.
In Table 2, the Absolute Maximum Ratings and
the Recommended Operating Conditions are
specified. The 5.0 V (nom) supply allows the use of
the UDS-5790191 H with TTL, LS TTL, DTL, and 5
V ('MOS. The UDS-5790H is a non-inverting type
while the UDS-579IH is an inverting type which
more frequently corresponds to the discrete or hybrid
circuits in usc.
Figures 7 A and 7B indicate the device pinouts; the
in 101lt configuration tends to simplify PCB layouts
alld the outputs arc separated (isolated) from the inputs. All pins labelled RX require a discrete resistor
tll determine base current for the output NPN;
suitable external resistors should be based upon the
minimum output transistor gain of 30 (across the full
operal ing temperat ure range).
UDS·5790H and UDS-5791H Quad Peripheral Drivers
far PIN Diodes
These monolithic, high-voltage ICs are a natural
evolution from the several years of Sprague expertise
with high-voltage and high-current power and
display ICs. Designed for driving PIN diode phase
shifters for radar antenna systems, this quad 300 mA
Table 2
ABSOLUTE MAXIMUM RATINGS over free-air operating temperature range
.+6.0V
. .. -6.0V
. .Vcc
.+120 V
. .. 500 rnA
. .. -55°C to + 125°C
. .. -6SOC to + 150°C
Supply Voltage, Vce ......... .
Supply Voltage, VEE.
Input Voltage, V,N ..
Output OFF-State Voltage, VOFF (ref. VEE) .
Output ON-State Current, ION ..
Operating Ambient Temperature Range, TA .
Storage Temperature Range, Ts ...
RECOMMENDED OPERATING CONDITIONS
. .. . ..... .
Supply Voltage, Vcc
Supply Voltage, VEE ........... ..
Output ON-State Current, ION.
Operating Ambient Temperature Range, TA ..
Min.
4.0
-1.5
-55
3-124
Nom. Max.
5.0
5.5
-3.0 -5.5
300
+85 +125
Units
V
V
mA
°C
HIGH-CURRENT INTERFACE DRIVERS (Continued)
Vee
RX'
RXI
OUT,
OUT2
OUT,
OUT,
NC
DWt ic
DI P and O°C to + 85°(') if required.
10K
UDN·2580A 8-Channel High:Voltage, High-Current
Source Driver.
~------1~-o
0
This 8-Channcl IC design originates from a need to
prmide all interface from NMOS to high current inductive loads. The device functions like a PNP; but
an NPN Darlington has been added to provide
suitable current gain. By switching the input low the
output is turned ON and t.Jlc.load current is sourced
from the compound PNP INPN INPN output.
Maximum ratings are shown in Table 3.
OUT
-v
Figure 12
for improved thermal capacity and device electrical
performance.
In Figure 12, the basic circuit diagram is shown; a
typical NMOS interface mightinvolve ~5 Y, GND,
and solenoid,loadsof 0-20010 -30 Y. The UDN2580A affords an interface to these higher voltages
and offers high current outputs of - 500 rnA (mas).
With 0NMOS logic operating from negative supplies, the interface to high current inductive loads
(solenoids, relays, etc.) is depicted in Figure 14.
1\10st NMOS includes depletion load and is capable
of pulling the input of the UDN-2580A sufficiently
high to turn off the device. For those few instances
where either open drain NMOS is to be used, or the
depletion load is excessively high, external pull-up
resistors may be employed.
As is usually done with devices of this type, the
pinout is the in-opposite-out version shown in Figure
13. The unit is packaged in an 18-lead plastic DIP
utilizing Sprague copper alloy lead frame technology
Table 3
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature for Any One Driver
(unless otherwise noted)
o
Output Voltage, VCE
Supply Voltage, Vs (ref. SUb.)
Supply Voltage, Vcc (ref. SUb.)
Input Voltage, Y'N (ref. Vs)
Total Current, Icc + Is
Substrate Current, IsuB
UDN-2580A
UDN-2580A-l
UDN-2585A
UDN-2588A
UDN-2588A-l
50 V
50 V
80V
80 V
25 V
25 V
~3Q V
-500 mA
3.0 A
-30 V
-500 mA
3.0 A
-20 V
-250 mA
2.0 A
50 V
50 V
50 V
-30 V
-500 mA
3.0 A
80 V
80 V
80 V
-30 V
-500 mA
3.0 A
Allowable Power Dissipation, Po (single output) ......................................................... 1.0 W
(total package) ............................•........................... 2.2 W'
Operating Temperature Range, TA ............. , ............................................ -20°C to +85°C
Storage Temperature Range, Ts ........................................................... -55°C to + 150°C
'Derate at the rate of 18 mW;oC above 25°C
3-127
o
HIGH~(URRENT
INTERfACE DRIVERS (Confinued)
INDUCTIVE
LOAD
-30V
Figure 13
Figure 14
Although the UDN-2580A is chiefly intended for
high voltage inductive loads, it will help solve hil\hcurrent, low-voltage designs as well. In Figure 15,
the UDN-2580A is used as a source driver for
multiplexed common-cathode LEDs; the UDN2580A is a high current segment driver, while the
ULN-20688 quad is the high current (1.5 A max)
digit driver.
----l
----l
Figure 15
3-128
Figure 16
.
Ahl;rnatively, th~iJON-2580A may be ernployeil
as a digitdriyc(for common-anodeLEbs; shown fn
Figure 16 is tht:UDN~2~80A,sourcing ClIrre~tf{)r (In
eight digit applkatiol1. Combined with this iSlhc
ULN-2804 Darlington array for a segment switch;
This pair of units affords aneighl dig.it'cight
Sl'gl11Cllt solutiont6 high"currentMUXcd LED l)ril1~
"ll1dc.,n~lit displays.
For most of .thcJ.EDap-
.
plicatioiis; it WQuldbli! ne<;essaryto Use a supply of '1
to 8 volts.toeffectivelyswitch the.LEOs; thus it
(nakes t~e l.,JDNk2580~and~th~r high current interface attractlve, for 'CMOS applications. The combinationofV f(J:,EJ» and sourceartd sink driver
VON Preclude the use of su~h ICs much below the 7
volt level., since some portion of the supply must ,be
across the segment limiting resistor (R[).
3-:-129
HIGH-CURRENT .INTERFACE DRIVERS ((ontinued)
output voltage, package rating, and + 70°C ambient;
under these conditions the chip junction temperature
will be less than + 150°C.
It is also possible to employ the UDN-2580A as a
predriver for power semiconductors for very high:
current loads, thus considerably reducing the need
for discretes in many MOS-based systems. Shown in
Figure 17 A is the UDN-2580A source driver
providing base current for a power NPN; with it,
- 350 rnA output capability (NPN base dri\e) a load
current of 3 to 5 amps is quite readily a\"ailabk. For
higher currents, the use of a power Darlington may
be the solution.
Conclusion
Three new, high performance Sprague interface integrated circuits have recently been developed. They
tend to simplify certain system designs while offering
size and cost reductions. The UDN-2841 Band UDN2842B will greatly simplify an emerging printer
technology; the UDS-5790/91 H will replace hybrids
and discrctes for PIN phase shifter arrays; and the
U DN-2580A will further augment the usc of NMOS
LSI in a variety of systems. All of this is the result of
custoiller andsa"les inquiries along with an understanding of the industry needs for improved power
interface ICs. Custom interface designs arc also
becoming a greater factor, and Sprague Electric will
also help to lead the way in solving these problems.
For a-c loads, it is possible to use the UDN-2580A
source driver for providing gate current for pown
thyristors. Shown in Figure 17B is an interface to a
high current Triac; this is a scheme ming a pulse
transformer for isolation and some current limiting
should be provided.
For allowable duty cycle, output currents, and
number of outputs activated, the + 70°C limits arc
shown in Figure 18. This graph assumes worst case
+5V
r-----------,
I
r-----------,,
.5V 10....---,.-----,
DC
LOAD
~,,
,
UDN 2580A
,I
,..;-,- - - '
L ___________
...J
UDN 2580A
L.. _ _ _ _ _ _ _ _ _ _ _
Flgure17A
Figure17B
3-130
,
'j
'
..J
HIGH·CURRENT INTERFACE DRIVERS (Continued)
300~-----t---
3
II
rOUT
mA
200
UDN-2580A
+70°C AMBIENT
100
----~~~~~-----+----------~-------1r-------~
o
20
40
60
DUTY CYCLE-Of.
Figure 1.
3-131
80
100
r\.
II """"'----------BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS
SECTION 4 -
BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS
UCN-4202A Stepper Motor Translator/Driver ...............
UCN-4401A and 4801A BiMaS Latch/Drivers ..............
UCN-480SA and 4806A BiMaS Latched Decoder/Drivers ......
UCN-4810A IO-Bit Serial-In, Latched Driver· ..............
UCN-481SA BiMaS Latch/Source Driver ..................
UCN-4821A through 4823A 8-Bit Serial-In, Latched Drivers ...
Application Note:
Sprague BiMaS -
4-2
4-9
4-12
4-16
4-19
4-22
Muscle for the Microprocessor ... , .... 4-26
4-1
II
UCN-4202A STEPPER MOTOR TRANSLATOR/DRIVER
UCN·4202A
STEPPER MOTOR TRANSLATOR/DRIVER
FEATURES
-600 rnA Power Drivers
-15 V Sustaining Voltage
-20 V Output Breakdown
-Full-Step or Double-Step Operation
-Single-Input Direction Control
-Power-On Reset
-Transient Suppression Diodes
-Schmitt Trigger Inputs
OUTPUT C
OUTPUT 0
THE UCN-4202A Translator/Driver is
specifically designed for driving small-tomedium permanent magnet (PM) stepper
motors rated to 500 rnA and 15 V. This
monolithic integrated circuit employs a full-step,
double pulse drive scheme that produces up to
90070 utilization of the available PM stepper
motor torque.
GROUND
11
MONOSTABLE
RC
STEP
ENABLE
DWG. "NO. A-ll,184
In the full-step mode the MONOSTABLE RC
timing pin is tied to Vee, making states Band D
The UCN-4202A is a unique bipolar I2L stationary states. A separate input pulse is redesign containing approximately 100 logic gates, quired to move through each of the four output
suitable input/output circuitry for TTL com- states.
patibility, and 600 rnA outputs with internal inThe UCN-4202A will also perform a doubleductive load suppression. The circuit operates
step
function. In the double-step mode, states B
with a minimum of external components, and
and
D
are transition states with duration deterprovides an additional uncommitted driver.
mined by the MONOSTABLE RC timing. ImThe PM stepper motor is controlled by the in- proved motor torque is obtained at double the
tegral step logic. To step the load from one posi- nominal motor step angle, and motor stability is
tion to the next, the STEP INPUT is pulled improved for high step rates.
down to a logic low for at least 1 /AS, then allowed to return to a logic high. The step logic is
Higher current ratings, or bipolar operation
activated on the positive-going edge, which in can be obtained by using the UCN-4202A as a
turn activates one of four output sink drivers. logic translator to drive discrete high-power
The DIRECTION CONTROL determines the transistors or the Sprague UDN-2949Z HalfBridge Motor Driver.
sequence of states (A-B-C-D, or A-D-C-B).
4-2
UCN-4202A STEPPER MOTOR TRANSLATOR/DRIVER
ABSOLUTE MAXIMUM RATINGS
at TA
+25°C
=
Supply Voltage, Vee ........... .
. ... .7.0V
. ........ 20V
VK (Pin 7) ..
Output Voltage, VeE ....... .
. ........ 20V
Input Voltage, VIN .................. .
. ... .7.0V
Output Sink Current, lOUT. . ........ .
. ..... 600mA
ELECTRICAL· CHARACTERISTICS at TA
Symbol
Characteristic
Supply Current
Icc
Power Dissipation, Po (One Driver) ............... 0.8 W
(Total Package)
2.0 W*
Operating Temperature Range, TA.
. . -20°C to +85°C
Storage Temperature Range, Ts .
. . -55°C to +150°C
"Derate 16.6 mw/oe above +25°e.
= + 25°C, Vee = + 5.0 V unless otherwise noted
Test Cond it ions
2 Drivers ON
Min.
Limits
Max.
-
85
I Units
I rnA
TIL Inputs (pins 1,9, and 15), TTL Outputs (pins 13 and I"')
High-level Input Voltage
low-level Input Voltage
High-level Input Current
Low-Level Input Current
Input Clamp Voltage
High-level Output Voltage
Low-Level Output Voltage
Short-Circuit Output Current
Second Step
Monoltabl~
Time Constant
Reset Voltage
Reset Current
VIN(l)
VIN(U)
IIN(I)
IIN(O)
IIN(CLMP)
VUUT(l)
VOUT(O)
10UT(SC)
Vcc = 4.5V
Vec = 5.5 V
Vec = 5.5 V, VIN = 2.4 V
Vee = 5.5 V, VIN = 0.4 V
IIN= -12 rnA
Vee = 4.5 V, lOUT = 80 iJA
Vce = 4.5 V, lOUT = 3.2 rnA
Vce = 5.5 V
2.0
-
-
V
V
0.8
40
-1.6
-1.5
/AA
rnA
V
2.4
-
V
-
0.4
38
V
rnA
0.95
1.3
50
slRC
40
-
1.3
0.6
2.1
1.1
-
-
IC Input (pin .11)
tRC
VMR
IMR
R = 200 kQ, liN
VIN = 2.0 V
= 25 iJA
mV
/AA
SchmlH Trigger Inputl (plnllO and 12)
Threshold Voltage
Hysteresis
High-Level Input Current
Low-Level Input Current
Input Clamp Voltage
VT+
VTAVT
IIN(l)
IIN(O)
VIN(CLMP)
Vee = 4.5 V, VIN = 2.4 V, TA = 2Soc
Vec= 4.5 V, VIN"" 2.4 V, TA = 70°C
Vee = 5.S V, VIN = 0.4 V
liN = ..:...12 rnA
V
V
V
0.2
-
-
iJA
-
5.0
40
-1.6
-1.5
-
500
/AA
rnA
mV
mV
mV
V
/AS
/As
-
-
/AA
rnA
V
Open CollectorOutputl(plnl 2, 3, "', 5, and 6)
Output Leakage Current
Output Saturation Voltage
Output Sustaining Voltage
Turn-On Delay
Turn-Off Delay
Clamp Diode Leakage Current
Clamp Diode forward Voltage
1m
VeE(SAT)
VCE(SUS)
tpdO
~pdl
IR
VF
Vec = 5.S V, K = Open, VOUT= 20 V, TA= 25°C
Vec = 5.S V, K = Open, Your = 20 V, TA"" lOOC
Vee - 4.5 V, lOUT - 300 rnA
Vee;" 4.S V,IOUT= 400 rnA
Vcc = 4.5 V,lo UT = sao rnA
lOUT = 30 rnA, t~ 300 /As, Duty Cycl~2%
O.S Ein (pin 10) to O.S Eo"!
0.5 Ein (pin 10) to O.S Eo"!
VR - 20 V
IF = 500 rnA
4-3
1.0
-
-
oUU
750
900
15
-
-
10
10
50
3.0
-
iJA
V
II
UCN·4202ASTEP~ER
MOTOR TRANSLATOR/DRIVER
RECOMMENDED OPERATING CONDITIONS
u
Characteristic
Min.
Typ.
Max.
Units
Supply Voltage, Vcc
VK
4.5
-
5.0
12
5.5
13.5
V
V
Output Voltage, VCE
-
-
13.5
V
Output Sink Current, lOUT
-
-
500
rnA
Operating Temperature, TA
10
25
55
°C
600
°0
"+ 500
~
....
z
~ 300
::>
u
~ 200
....
::>
0
~
'"~
100
0
-'
-'
«
0
0.5
2.0
2.5
3.0
3.5
4.0
4.5. 5.0
MOTOR TIME CONSTANT LlR
IN ms
OWG. NO. A-Il,185
MAXIMUM COLLECTOR CURRENT AS A FUNCTION OF
MOTOR TIME CONSTANT AND STEP RATE
Notes: 1.
2.
Values shown take into account static d·c losses (VSATIOUT and Vcclcc) as well as
switching losses induced by inductive flyback through the clampdiodes with
VK = 12 volts. Maximum package power dissipation isassumed to be 1.33
watts at +70°C. Higher package power dissipation may be obtained at lower
operating temperatures.
Use of external discrete flyback diodes will eliminate power dissipation
resulting from switching losses and will allow the full 500 mA output
capability (Output A, B, C, or D and the Driver Output) under all conditions.
4-4
UCN-4202A STEPPER MOTOR TRANSLATOR/DRIVER
FUNCTIONAL DESCRIPTION
Power-On Re.et
Output Enable
An internal RS flip-flop sets the Output A
"ON" with the initial application of power.
This state occurs approximately 30 /AS after the
logic supply voltage reaches 4 volts with supply
rise times of up to 10 ms/V. Once reset, the circuit functions according to the logic input conditions.
Outputs A through D are inhibited (all outputs "OFF") when pin I(Output Enable) is at
high level. This condition creates a potential for
wire-ORing of device outputs, or other potential
control functions such as chopping or bi-Ievel
drive.
Step Enable
Tran.lent Suppression
Pin 9 (Step Enable) must be held high to
enable the step pulses for advancing the motor
to reach the translator logic clock circuits. Pulling this pin low inhibits the translator logic.
All five power outputs are diode protected
against inductive transients. However, Zener
diode or resistor "flyback" voltage techniques
are not allowed.
Step Input
Pin 10 (Step Input) is normally high. The logic
will advance one position on the positive transition after the input has been pulled low for at
least 1 /AS. The Step Input current specification is
compatible with NMOS and CMOS.
Full-Step /Double-Step
Full-Step operation is the most commonly
used drive technique. The UCN-4202A is
capable of unipolar drive without external active
devices, either in a full-step mode (pin 11
Monostable RC tied high), or in a double-step
mode (pin 11 connected to RC timing). The
double-step mode provides improved torque
characteristics, while the specified angular increment is doubled.
Direction Control
The direction of output rotation is determined
by the logic level at pin 12. If the input is held
high the rotation is A-D-C-B; if pulled low the
rotation is A-B-C-D. This input is also NMOS
and CMOS compatible.
STEP ENABLE.....,:j
STEP INPUT
DIRECTION
I+-
1fLs Min"
1fLsMin
CONT~ 1+-1~~ j r-F=-------
OUTPUT A
OUTPUT B
OUTPUT C
OUTPUT D
TIME/OUT
MONOSTABLE
MONOSTABLE
R/C
1):.1(;.
NO. A-Il.lB6
TIMING CONDITIONS
(Double·Step Mode)
Note: State B and State D output pulse duration is typically 11.5
ms when R = 510 kQ and C = 0.02 j.lF.
4-5
o
UCN·4202ASTEPPER MOTOR
TRANStATORlDR~VER
TYPICAL STEPPER MOTORS
Manufacturer
Eastern Air
Devices
Model
LA23ACK-2
LA23ACY-l
LA34ADK-S
L/R
1.4 ms
1.2 ms
2.S ms
Sigma
Instru ments
18-2013D24-F32
18-2013D48-F32
20-2220D200-F23
K82701-P2
K83701-P2
MOSI-FD-301
1.5
1.5
1.5
1.5
1.5
0.8
North American
Phillips
Superior
Electric
ms
ms
ms
ms
ms
ms
Typical
Ratings
440 mA/12V
440 mA/12V
530 mA/14V
340 mA/12V
340 mA/12V
500 mA/12V
330 mA/12V
330 mA/12V
440 mA/12V
Step
Angle
1.8°
7.5°
1.8°
15°
7.5°
1.8°
7.5°
15°
1.8°
TYPICAL APPLICATIONS
oUTP UT <>-I-t-t-t-t--[i}---[:>o---ENABLE
R
1i-'J-_j---00IRECTION
"'CONTROL
+ 12 V o,--+----m
[jQJ--j---oSTEP INPUT
J---t---oSTEP ENABLE
OlIG. NO. 11-11,187
L/R DRIVE CIRCUIT
Used to Drive A 12-Volt 500 rnA
Unipolar Stepper Motor (Double-Step Mode)
4--6
UCN-4202A STEPPER MOTOR TRANSLATOR/DRIVER
TYPICAL APPLICATIONS
UDN-2949Z
UDN-2949Z
UDN-2949Z
UDN-2949Z
o
STEPPER MOTOR
BIPOLAR BRIDGE
DRIVE CIRCUIT
(Full-Step Mode)
~
__~~____~__-+~____+-~-+-+____+-__-+-+__~Vs
7416
+5V
'+' +5 V
"""'='1-'" STEP INPUT
STEP ENABLE
DWG. NO.
A~1l.189
-15 V
+5V
+5V
+5V
CD4049AE
10K
--,
IOK~_ _ _ffiPN
+24V
SPEED,
",120Hz \
510,
K,
I
I
1- - - - - I
' 3.6
: K
I
I
I
15.1
I
K
Dwg. No, 8-1447
A.C MOTOR DRIVE CIRCUIT
4-8
UCN-4401A and UCN-4801A BiMOSLATCH/ORIVERS
J"'-I'-I~-"_ OUTPUT
ENABLE
UCN-440 1 A and UCN-480 1A
BiMOS LATCH/DRIVERS
FEATURES
•
•
•
•
•
High-Voltage, High-Current Outputs
Output Transient Protection
CMOS, PMOS, NMOS, TTL Compatible Inputs
I nternal Pull-Down Resistors
low-Power CMOS latches
DWG.NO. A-lO,499A
TYPE UCN-4401 A
OUTPUT
ENABLE
THESE high-voltage, high-current latch Idrivers
are comprised of four or eight . CMOS data
latches, a bipolar Darlington transistor driver for
each latch, and CMOS control circuitry for the
common CLEAR, STROBE, and OUTPUT ENABLE functions. The bipolar /MOS combination provides an extremely low-power latch with maximum
interface flexibility. The UCN-4401A contains four
latch Idrivers while the UCN -480 lA contains eight
latch /drivers.
The CMOS inputs are compatible with standard
CMOS, PMOS, and NMOS circuits. TTL or DTL
circuits may require the use of appropriate pull-up
resistors. The bipolar outputs are suitable for use
with relays, solenoids, stepping motors, LED or
incandescent displays, and other high-power loads.
OUT,
OUT,
OUT,
OUT,
_-_..
....
-.
OUT,
OUT,
COMMON
DWG,NO. A-IO,498A
TYPE UCN-4101A
Both units feature open-collector outputs and integral diodes for inductive load transient suppression. The output transistors are capable of sinking
500 rnA and will sustain at least 50 V in the OFF
state. Because of limitations on package power dissipation, the. simultaneous operation of all drivers at
maximum rated current can only be accomplished by
a reduction in duty cycle. Outputs may be paralleled
for higher load current capability.
The UCN-4401A 4-latch device is furnished in a
standard 14-pin dual in-line plastic package. The
UCN-4801A 8-latch device is furnished in a 22-pin
dual in-line plastic package with lead centers on
0.400" (10.16 mm) spacing. All outputs are pinned
opposite their· respective inputs to simplify circuit
board layout.
'N,
COMMON
STROBE
,
CLEAR "1:1/>O---~~
I
I
I
i
I
GROUND
I
OUTPUT
ENABLE
,
I
COMMONMOS
TYPICAL MOS LATCH
: TYPICAL BIPOLAR DRIVER
CONTROL
FUNCTIONAL BLOCK DIAGRAM
4--9
D
·UC~440'lA anctUCN~4801A-BiMOS tATCHIDRIVERS .-
ABSOLUTE.
MAxIMUM RATINGS
.,
,
Output Voltage, Va; ............................... , ............................................................ 50 V
Supply Voltage,. VD,D ........................ c, . . . . . . . . . . . . . . . . . . . . . . . . . . .
.HLV
Input Voltage Rapge,VIN ....................................... ; ................................ -0.3 VtoVI)D +0.3 V
Continuou~ Collecro.rCurrent, Ie .•. " ................................. "" .•,.. ';" .......... ", ............. ',' .500 rnA
Package Power Dissipation, PD (UCN-4401A) .................•..........................•...... ; ........... ;: .. 1.6lW*
_" '
.(UCN'-M!OlA) .............................................•..... ; ...........•... 2.0 W**
Operating AmbientTemperatureRange, TA............................... ., ........................... -20°C to +85°C
Storage Temperature Range, Ts ..................................................................... -55°C to + 125°C
<0
••
,
.................................
"
'.'
'Derate at the rate of 16.7 mW/"C above TA = 25°C.
"Derate at the rate of 20 mW/oC above TA· = 25°C.
ELECTRICA~
CHARACTERISTICS at TA == + 25°C, VDO = 5 V, Vss
-
Characteristic
Output Leakage Current
Symbol
VeE(SAT)
Input Voltage
VINIO)
VINI1 )
I nput Resistance
-
VDD = 15 V
VDD = lOY
VDD = 5.0 V (See note)
VDD = 15 V
VDD =10V
VDD = 5.0V
VDD =15V
VilD = 10 V
VDD = 5.0V
All Drivers OFF, All Inputs = 0 V
VR = 50 V, TA = +25°C
VR= 50V, TA = +70°C
IF=350mA
IDDIOfF)
IR
VF
-
-
-
0.9
1.1
.l.3
-
13.5
8.5
3.5
50
50
50
-
..
Typ.
-
-
IDDION}
(Each stage)
Clamp Diode
Lea kage Cu rrent
~Iamp Diode
Forwa rd Voltage
Min.
Vr.=50V TA=+25°C
VeE = 50 V, TA = +70°C
Ie = lOU rnA
Ie = 200 mA
Ie = 350 mA VDD - 7.0V
RIN
Supply Curr~nt .
0 V (unless otherwise specified)
Test Conditions
IcEX
Collector-Emitter
Saturation Voltage
=
-
,-
-
-
200
300
600
1.0
0.9
0.7
50
-
1.7
l'mits
Max.
50
,100
1.1
1.3
1.6
", 1.0
,
'
-
2.0
1.7
1.0
Units
'.
uA
p.A
V
V
V.
V
V
V
V
.ko
kil
ko
mA
mA
mA
100
p.A
50
p.A
p.A
V
100
2.0
'Note: Operation of these devices with standa,rd TTL orDTl may require the use of appropriate pull-up resistors to insure the minimum logic "I".
TRUTH TABLE
"
INN
STROBE
CLEAR
0
1
X
X
X
X
1
1
X
X
a
0
'01
X
x
x
X
1
X
X
ON
OFF
a
a
-0
0
0
0
0
Information present at an input is ·transferred to its
latch when the STROBE is high. A high CLEAR
input will set al11!ltches to the putput OFF condition
regardless.of,th~ data or STROBE input·levels. A
high OUTPUT ENABLE wil(&et all outputs to the
OFF conditionJ'egardless of any other input conditions. Whentl;1e OUTP,UT ENABLE is low, the
outputs depend. on the state ·of their. respective
latches.
OUTN
t-l
t
OUTPUT
ENABLE
OFF
ON
OFF
OFF'
ON
OFF
x = irrelevant
t-1 = previous output state
t = present output state
4-10
UCN-4401A and UCN-4B01A BiMOS LATCH/DRIVERS
TIMING CONDITIONS
(Logic Levels are Voo and VsJ
DWG.NO. A-10,895A
A. Minimum data active time before strobe enabled (data set·up time) .
. ....... 100 ns
B. Minimum data active time after strobe disabled (data hold time) .. . ............... 100 ns
C. Minimum strobe pulse width .......... .
. .. 300 ns
D. Typical time between strobe activation and output on to off transition
..... 500 ns
E. Typical time between strobe activation and output off to on transition
..... 500 ns
F. Minimum clear pulse width .. .
.300 ns
G. Minimum data pulse width .. .
.500 ns
" 450
0
'"tt
~ 450
..
!ci
r- r- -
UCN-44OJA
400
<{
r--..
E
f".,
~ 350
z>-
w
r-....
~ 300
<3
~
!
150
I
I I
100
o
10
20
30
E
"\
~
4'
'\
r-...
.......
,
......
r-....
~
"- r-..... f',6 ....... ......
~
1,,-
INUM8ER
....... r--.
I
100
70
80
~~.
90
100
.......
.......
20
30
.......
r--..
-
.......
,.... ,.... .....
OF OUTPUTS
I I
10
.......
:;-..
ICONDUCTING
SIMULTANEOUSLY
40
50
60
PERCENT DUTY CYCLE
lor 2
3
I,
\.r-....
-
I
.......
\. '\
1\
\.\.
I\.
II NUMBER OF OUTPUTS
II ~?.;'S~~~~gUSLY
200
':J
: ..:-0.3 V to Voo +0.3 V
Continuous. Output Currimt,l oUT . . . . . . . i .. . :' ... ',' -40 mA
Package Power Dissipation,Po' .........".' ........ ~ 2..0W·
O~erating Temperaturlf~ahge;.TA;;' ": . ~2()'~C to:+85°C
Storage Templ!ratureRange, Ts .. , , ..". -55°C to +- l25°C
"Delate at the .rate of 20
The bipolaroutput~may be used as segment, dot
(matrix), bar, or digit drivers in vacuum fluorescent
displays. All eight J>utputs can be activated simultaneously at ambienuemperatures up to 6QoC. To
simplify circuit board laYQut,' all, outputs are pinned
opposite their respective inputs. '
A minimum cOlllponentdisplay SUbsystem, re.:
quiringfew or no discrete components, may be
reali:zed by using ~e UCN4815A BiMOS Latch/
Source priver with either a UCN~4805A or .UeN48Q6Alatched hexadecimal decoder/drivers or a
UCN-4810A serial-to-parallel latch/driver•.
Num~er of
.Outputs ON
(lOUT =..,. 25 mAl
8
7
6
mW/~C
above TA
=
25"C.
Max. Allowable Duty Cycle
at Ambient Temperature of
50°C
60°C]ODC
100% .
It
IIJ'O%
Caution: Sprague CMOS devicei feature input static protection but are still
susteptible to d~m~e when exposed toex"emely high static electrical charges.
4-19
UCN-481SA
'SiMOS [AtCH/SOURCE DRIVEf-
ELECTRICAL CHARACTERISTICS at TA ~: 25°C, Vaa = 60 V, VDD
(unless otherwise noted)-
=
4.75 Vto 15.75 V, Vss
-,
.,'
"
Characteristic
Output. OFF Voltage
Outpul ON Voltage
Output Pul,l-Down Current
Output leakage Current
Input Voltage
.
'
Symbol
VOUT
"
,
VINIOI
IINIlI
Input Impedance
Supply Current
liN
IBB .
"
~
..
-
.,
NOTE: Positive (negative) current
Min.
57.5
400
loUT = - 25 rnA
VOUT = VSB
TK = 70·C
Voo =5.0V
Voo = 15 V
VINIlI
Input Current -
1
1
X
X
X
X
1
X
,1
1,
'voo -
VIN -5.0 V
Voo - VIN - 15 V
.:' VOO - 5.0 V
AIf outputs ON, All outputs open
All 'outputs OFF
' Voo = 5.0 V, All outputs OFF, All inputs = 0 V
Voo' = 15 V, All outputs OFF, All inputs = 0 V
Voo - 5.0 V, One output ON, All inputs - 0 V
Voo = 15 V, One output ON, All jnputs = 0 V
~'
IS
defined as gOing Into (coming out of) the' specified deVice pin .
X
X
X
X
X
' -0
•. 0
o
o
X
o
O.
1
o
o
o
o
-
850
-15
3.5
5.3
13.5
15.3
-0.3
+0.8
100
300
50
10.5
100
100
200
1.0
3.0
-
100
Inputs
STROBE ENABl~ .•,~I.;ANK,.
limits
Max.
1.0
-
..
UCN-4815A TRUTH TABLE
-0
"~
Test Conditions
louT
.
,
, Dwg .. No: A-lO,9ao
,OUTN
T-1,
T
x
X
X
1
o -,.,
I
o
TYPICAL INPUT CIRCUIT
,0
1
0
1
0
1
0
x'= irrelevant
lOOK
T-1=· previous output 'state
1 '" present output $tate
TYPICAL OUTPUT DRIVER
4-20
= 0V
Units
V
V
pA
pA
V
V
V
pA
pA
kO
rnA
pA
pA
pA
rnA
rnA
UCN-481SA
BiMOS LATCH/SOURCE DRIVER
TIMING CONDITI()NS
(Logic levels are VDD and Vss )
ENA BLE
---.l
____~+_----~------~------~r--l~--------------~
OUT N ---------,L--_ _ _ _ _--.J
o
Owg. No. A-lO,991
A.
B.
C.
D.
E.
F.
Minimum Data Active Time Before Strobe Enabled (Data Set-Up Time) .................................... 100 ns
Minimum Data Active Time After Strobe Disabled (Data Hold Time) .......... , ......' ...................• : 100 ns
Typical Strobe Pulse Width For Power-Up Clear Disable .................•............................. 500 ns
Minimum Strobe Pulse Width After Power-Up Clear Disabled ................................ ' .............300 ns
Typical Time Between Strobe Activation and Output On to Off Transition ..•.... : ..................
1.0 iJ-S
Typical Time Between Strobe Activation and Output Off to On Transition .................................. 1.0 iJ-S
Minimum Data Pulse Width ....................................................... : .......... 5~0 ns
0> • • • • • • • • •
BLANKING input low, the outputs are controlled
by the state of the latches.
Infonnation present at an input is transferred to its
latch when the STROBE and ENABLE are high.
The latches will continue to accept new data as long
as both STROBE and ENABLE are held high. With
either STROBE or ENABLE in the low state, no
infonnation can be loaded into the latches.
When the BLANKING input is high, all of the
output buffers are disabled (OFF) without affecting
the information stored in the latches. With the
On first applying V DD to the device, all latch
outputs assume a low state (Power-Up Clear) resulting in all outputs being OFF~ The latches will remain
in the low condition until the Clear is disabled by a
STROBE.high input. Da~ may be entered into the
latches during Power-Up Clear disable if the ENABLE input is also high.
4---21
SERIES UCN-4820A
BiMOS 8-BtT' SERIAL-INPU1LATe HEDDRIVERS
SERIESUCN-4820A
BiMOS 8-BIT SERIAL-INPUT, LATCHED DRIVERS
FEATURES
OUT,
• High-Voltage Current-Sink Outputs
SERIAL DATA IN
2
SERIAL DATA OUT
5
OUTS
OUTPUT ENABLE
7
OUT,
• CMOS, PMOS, NMOS, TTL Compatible
• Low-Power CMOS logic and Latches
• Internal Pull-Up/f'ull-Down Resistors
• 16-Pin Dual In-Line Plastic Packages
A
COMB INA nON of bipolar and MOS technology gives Sprague's Series UCN -4820A an
interface flexibility beyond the reach of standard
logic buffers and power driver arrays.
The three devices in this series each have eight
bipolar current-sink Darlington drivers, a CMOS
. data latch for each of the eight open-collector outprits, an eight-bit CMOS shift register and CMOS
control circuitry. Except for maximum driver voltage
ratings, Types UCN-4821A, UCN-4822Aand
UCN-4823A are identical.
The bipolar outputs can drive multiplexed LED
displays, incandescent lamps, thermal print heads,
and (with appropriate clamping techniques) relays,
solenoids and other high-power inductive loads.
The CMOS shift register and latches, which
operate over a 5- to 15-volt supply range, minimize
loading and are compatible with CMOS, PMOS
and NMOS logic. Use of the drivers with TTL and
DTL may require a pull-up resistor to ensure an
input logic high. By using the serial data ()utput, the
drivers can be cascaded for interface applications
•requiring additional drive lines.
These devices are also available in il1dustrialgrade ceramic packages (Series UCQ-4820R) and in
military" side-brazed, hermetically sealed "packages
(Series UCS-4820H).
4-22
Dwg. No. A-l1,3i)(':
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
and Vss = 0 V
Output Voltage, VOUT (UCN-4821A . . . . . . . . . . . . . . . .. 50 V
(UCN-4822A) .•.............. 80 V
(UCN"4823A) ................ 100 V
Logic Supply Voltage,V oo ....................... 18 V
Input Voltage Range, V" ........... -OJ V to Voo +0.3 V
Continuous Output Current; louT' .. ".............. 500 mA
Package Power Dissipation, Po. , ............... 1.67 W'
Operating Temperature Ra~ge, TA ... '•.... - 20°C to +85°C
Storage Temperature Range, Ts ........ ..,...55°C to + 125°C
'Derate at the rate 01 16.7 mwrc above TA =+25'C
SERIES UCN-4820A
BiMOS 8-BIT SERIAL-INPUT LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS at TA
Characteristic
Output leakage Current
Symbol
IcEX
=
+25°C, Vou = 5 V, Vss
Applicable
Devices
UCN-4821A
UCN-4823A
Collector-Emitter
Saturation Voltage
ilnput Voltage
I
Input Resistance
Supply Current
VCElSAT}
All
V'NIO)
V'N(l)
All
All
R'N
All
IOOWN)
IOOIOFFI
Voo = 15V
Voo = 10 V
Voo =5.0V
Voo - 15 V
Voo - lOV
Voo = 5.0 V
One Driver ON, Voo
One Driver ON, Voo
One Driver ON, Voo
All Drivers OFF, V'N
All
ALL
Number of
Outputs ON
(lOUT = 200 mAl
8
0 V (unless otherwise specified)
Test Conditions
VOUT = 50 V
VOUT - 50 V, TA - +/U°[;
VoUT -80V
VOUT = 80 V, TA = + 70°C
VOUT - 100 V
Your = 100 V, TA = + 70°C
louT = 100 mA
loUT = 200 mA
lOUT - 350 mA, Voo - 7.0 V
UCN-4822A
I
=
=
=
15 V
10 V
5.0 V
0V
Max. Allowable Duty Cycle
at Ambient Tem~erature of
25°C 40°C 50°C 60°C 70ce
67%
76%
89%
100%
56%
64%
74%
89%
50%
57%
66%
80%
1 T%
4-23
-
13.5
8.5
3.5
. oU
50
50
36%
41%
48%
5
58%
4
72%
r%
3
95%
2
100%
1
100% 100% 100% 100% 100%
Caution: Sprague CMOS devices have input static protection but are still suscepti·
ble to damage when exposed to extremely high static electrical charges.
7
6
Min.
-
43%
49%
57%
69%
75%
I~O%
limits
Max.
50
100
50
100
50
100
1.1
1.3
1.6
0.8
-
-
-
2.0
-
1.7
-
1.0
100
-
Units
JJA
JJA
JJA
JJA
JJA
f-LA
V
V
V
V
V
V
V
~
kO
kO
mA
mA
rnA
JJA
SERIES U~N-4820A
BiMOS 8-BIT. SERIAL-INPUT LATCHED DRIVERS
CLOCK
I
~I_______
iAi-C--l
"". "---rq~·-D-I-·-E-I----r--'lL--__-..,_
STROBE _ _ _ _ _ _ _.....
k~
OOT N _._______________~I~------~
_ __'r___
Dwg. No. A-IO,990A
TIMING CONDITIONS
(Logic Levels are Voo and Vss)
A.
B.
C.
D.
E.
F.
Voo
Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) .......... , .............. .
Minimum Data Pulse Width ..................................................... .
Minimum Clock Pulse Width .. : .................................................. .
Minimum Time Between Clock Activation and Strobe ................................... .
Minimum Strobe Pulse Width .................................................... .
Typical Time Between Strobe Activation and Output Transition ............................. .
=
5.0V Voo
250 ns
500 ns
1.0 p.,s
1.0 p.,s
500 ns
1.0 p.,s
=
15 V
150ns
300 ns
250 ns
400 ns
300 ns
1.0 p.S
tinue to accept new data as long as the STROBE is
held high. Applications where the latches are bypassed (STROBE tied high) will require that the
ENABLE input be high during serial data entry.
SERIAL DATA present at the input is transferred
to the shift register on the logic "0" to logic "I"
transition of the CLOCK input pulse. On succeeding
CLOCK pulses, the registers shift data infonnation
towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the
rising edge of the CLOCK input waveform.
Infonnation present at any register is transferred to
its respective latch when the STROBE is high
(serial-to-parallel conversion). The latches will con-
When the ENABLE input is high, all of the output
buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With
the ENABLE input low, the outputs are controlled
by the state of the latches.
SERIES UCN-4820A TRUTH TABLE
Serial
Data
Input
L
H
X
Shift ReRister Contents
Clock
Input
J
.r
1.
1,1 213 ......... Is
H H, R2 ..... , . R)
L R, R2 ....... R)
R, R2 R3 ...... Rs
Serial
Data
Output
R)
R)
Rs
XXX ......... X
X
P, P2 P3 ....... Ps
Ps
Output Contents
Latch Contents
Strobe
Input
I, 12 13 ......... Is
L
H
l = low logiC level
H = High Logic level
X = Irrelevant
P = Present State
R = Previous State
4-24
Output
Enable
1,1 213 ......... Is
R R2 R ...... R,
PI P2P3 ....... Ps
L
XXX .........
H
X
P, P2P3 ....... Ps
.. H
H H H ... ....
SERIES UCN·4820A
BiMOS 8·BIT SERIAL·INPUT LATCHED DRIVERS
FUNCTIONAL BLOCK DIAGRAM
CLOCK
I
SERIAL
DATA IN
SERIAL
DATA OUT
7
OUTPUT ENABLE
HI
BIPOLAR
o
GROUND
TYPICAL INPUT CIRCUITS
4
TYPICAL OUTPUT DRIVER
Voo
0DK
STROBE
OUTPUT
ENABLE
CLOCK
SERIAL DATA
IN
..
.1'105.· .
~
~1ODK
GROUND
Owg. No. A-U,390
V
Vss
Dwg. No. A-l1,389
4-25
Sprague BiMOS
SPRAGUE BiMOS MUSCLE FOR THE MICROPROCESSOR
Sprague Electric offers solutions to users' interface problems through a fusion of bipolar and CMOS
technologies in BiMOS to create innovative interface
devices.
The company's ability to shape technology to
meet the specific needs of users is based on a commitment to provide versatile and practical interface
products for systems design.
Sprague BiMOS devices are available with:
- Output breakdown voltage ratings of up to
100 V;
- Output current ratings as high as 600 mA;
- A logic voltage-supply range of 5 V to 15 V
(±5%);
- Logic switching speeds of up to 1 MHz at 5 V
and up to 2 MHz at 12 V;
- And up to 10 channels per dual in-line package.
Among advantages of BiMOS technology are
microprocessor compatibility, low-power logic, a
wide logic-supply range, component-count reduction, bipolar output capability, CMOS noise immunity, and space-saving integration.
UCN-4401A and UCN-4801A
These four- and eight-bit BiMOS latch Idrivers are
the first Sprague IC's to incorporate CMOS logic
(data latches) and bipolar drivers (NPN Darlingtonpair outputs). Functionally, the eight-bit device is the
equivalent of an octal latch and an octal NPN Darlington array.
Figure 1 depicts the use of the eight-bit latch I
driver as an interface between a microprocessor and
incandescent lamps. The device can also link a microprocessor with LEDs, high-power discrete
semiconductors, relays or small stepper motors. Applications with inductive loads require connection of
the internal transient-suppression diodes to the
load's voltage supply, or use of discrete diodes.
Inductive load applications should be limited to output voltages of +35 V.
Figure 2 shows use of Type UCN-4401A as an
interface between a microprocessor and a stepper
motor. Input signals to the four-bit device, for both
unipolar wave drive and unipolar two-phase drive,
are shown in Figures 3 and 4.
APPLICATIONS
The following pages make up a sampler of applications for Sprague BiMOS interface devices. Performance specifications, truth tables and timing
charts for these integrated circuits appear on previous
pages. Additional applications are described in the
Sprague brochure WR-185, "Interface ICs for
Motor Drive Applications," and in Sprague engineering bulletins covering these BiMOS devices.
Type UCN-4401A can also be used to control
discrete PNP transistors providing a high-power
motor interface (Figure 5). Use of either singleended or split supplies is possible with this approach.
The four-bit device can be paired with a quad PNP
DIP to implement full-bridge drive for a stepper
motor (Figure 6).
4---26
Sprague BiMOS (Continued)
OUTPUT ENABLE
CLEAR
tV
STROBE
p.p
INS
IN 6
INa
TYPE UCN-4801A
4
I- LAMP
TEST
DWG.NO. A-l1,444
Figure 1
tV
p.p
UCN-4401A
Figure 2
4-27
D~G.NO.
A-ll.44S
Sprague· BiMOS (Continued)
UNIPOLAR WAVE DRIVE
UNI POLAR 2 - PHASE DRIVE
STROBE
IN 1
J1
n
~
IN 1
n
IN 2
n
IN 3
--,
___--'n'-__-'
IN 3
!l.-
IN 4
OUT 1
OUT 2
SIL...-_ _ _ _ _ _ _ _~
--,
OUT 2
r--
OUT 3
OUT 4
~
_ _---' L...-_---'n
JI
IN 2
IN 4
OUT 1
n
OUT 3
L--
--.l
OUT 4
DWG.NO. A-ll,447
OWG.NO. A-ll.446
Figure 3
Figure 4
+y
-y
TYPE UCN-4401A
- V
04--~'VV'--'
DWG.NO. A-ll,448
Figure 5
4-28
Sprague BiMOS (Continued)
+v
TPQ 2906
o
TYPE UCN-4401A
DWG.NO. A-ll.449
Figure 6
Since blanking (20 f-LS minimum) is required between characters, and since the minimum ON time
for each digit or character is 100 f-LS, the maximum
number of characters in a display is 80 (8 kHz clock,
125 f-LS ON and blanking time per character).
The typical ON time for vacuum fluorescent
characters is 200 f-LS (40-character panel) to 500 f-LS
(20-character display). Failure to provide proper
blanking time can cause ghosting or flicker.
UCN-4810A
This integrated circuit functionally replaces a
lO-bit serial-in, parallel-out shift register, a 1O-bit
data latch, and 10 high-voltage buffers (including
output pull-down resistors). It is designed for use
with vacuum fluorescent displays, but has been put
to many other uses, including control of thermal
print heads.
Connecting a data-out line from one device to a
data-in pin of a second device minimizes the number
of input/output lines required for a system. A 20character 5 x 7 vacuum fluorescent dot matrix display, for instance, requires only six Type UCN4810s (two as grid drivers and four as dot drivers).
An example of cascaded data control is given in
Figure 7. The arrangement cascades two devices for
grid selection and four as dot drivers.
A faster method of loading matrix data, shown in
Figure 8, requires more I /0 lines. This technique
loads shift registers during a blanking period
(greater than 20 f-Ls). Each dot driver has a separate
data-input line, but uses common clock, strobe and
blanking lines. A second clock is used with the grid
drivers.
A typical data-input timing chart for this configuration is shown in Figure 9. With a 20-character
vacuum fluorescent display having a 2 kHz scan
frequency, 10 bits of data are loaded during the first
blanking period; succeeding lO-bit data blocks are
loaded during blanking periods at 400 f-LS intervals.
A more unusual application of Type UCN -481OA
is shown in Figure 10: The device is used with a
thermal printer. In production, the drivers (in chip
form) were built into a hybrid assembly.
Data sent to the four dot drivers can be loaded in
less than 80 f-LS using this configuration. The shiftrate limit ofthe dot drivers is 500 kHz at VDD = 5 V.
The two units that function as grid drivers are
loaded with a single "1" during each scan cycle.
The minimum recommended scan frequency is
100 Hz per character (a clock frequency of2 kHz for
a 20-character display).
4-29
Sprague BiMOS (Continued)
SERIAL DATA
CLOCK 1
o--t-~1====t~==~~==J=::_...,
STROBE
O-i-r====:l:,--r====::!==i"i
CLOCK 2
o-l-~1====t~==~~==J=::]J
BLANKING
o-J=~!:==I~==~~==]~-J
DWG.NO. A-ll ,450
Figure 7
GRID OATA
CLOCK 1
STROBE
DATA 1
CLOCK 2
DATA 2
DATA 3
DATA
~
BLANKING
[1WG.NO. A-ll,451
Figure 8
CLOCK
DATA
STROBE---------~----~---------------------~
BLANKI NG ----------------------------~--------__,
~ACTIVATED
TtMING CONDITIONS UCN -4810A
DWG.NO. A-ll,452
Figure 9
4--30
Sprague BiMOS (Continued)
----
ri=+=========~~~
ISOLATION DIODES (FWD)
DOT PRINT RESISTORS
(STROBE)
So
ll-l
T
Lli
0, 0203
r l SO IN
L .S
0,0
SO OUT
B
"OOVss Vee
5,---5n
SPRAGUE TYPE UCN-461O
10-BfT SERIAL INPUT
LATCHED DRIVERS
w
~'"
03
- - - - - - - j SO °2
IN
L 5
IlL
r-!:-
OIJ
8 '100
'Iss VSB
.1
.
~~
J.
~
+
=
I
J
:;0
+
LOGIC
S~PPlY
I
DWG.NO. A-ll,453
Figure 10
STROBE
DATA IN
DATA OUT
STROBE
Figure 11
4-31
DWG.NO. A-ll,454
o
Sprague BiMOS (Continued)
STROBE
BLANKING
A
B
C
D
SEGMENT DECODE
dp
DATA OUT
DATA IN
DATA IN
DATA OUT
UCN-481~A
DIGITS 1-10
DIGITS 11-20
STROBE
DWG.NO. A-ll,455
Figure 12
UCN-4805A is used as a seven-segment decoder /
driver. A pair of Type UCN-481OAs is used for
grid-select.
UCN-4815
Type UCN-4815A provides an eight-bit parallelin, parallel-out interface for vacuum fluorescent displays. A typical application appears in Figure 11. A
pair of Type UCN-481OAs are used for grid control.
The two Type UCN-4815As drive a 16-segment alphanumeric display.
SERIES UCN-4820A
The drivers in this series were designed for use in
printers. Each integrated circuit has an eight-bit
serial-input shift register, an eight-bit data latch, and
eight NPN Darlington-pair outputs. The data entry
rate for this series is 500 kHz (minimum) at VDO =
UCN-480SA and UCN-4806A
Each of these devices has eight high-voltage
source outputs, latched inputs, and both the hexadecimal decoding and speed capabilities for
microprocessor-based designs.
Type UCN-4805A is used to decode and drive
seven-segment displays. Its eighth source output is
used to generate a colon or decimal point.
Type UCN-4806A is used with nine-segment
(centered "1 ") displays. It has an I /0 input that can
be used to check for errors by interrogating input data
latches.
A typical application with a 20-character vacuum
fluorescent display is shown in Figure 12. Type
5 V.
A typical application appears in Figure 13; although the drawing depicts use with an electrosensitive printer, the device can also control inductive
loads such as print hammers and solenoids, or thermal print heads.
Use of Types UCN-4823A and UCN-481OA-l is
combined in the planar gas-discharge display application shown in Figure 14. Type UCN-481OA-l
signal inputs are level-shifted (floated to the VBB
supply level). The application requires external segment limiting and pull-up resistors and use of Zener
diodes.
4-32
Sprague BiMOS (Continued)
+V
UCN-4820A
DWG.NO. A-1l.4~6
Figure 13
VBS
BLANKING
O-----;:=!:L====~~;=t~
DATA 0 - - - - - ;
CLOCK
Vz ~
VLOGIC
O----=TT-::=::=::lrt=---~ (5V
TYPICALI
LEVEL SHIFT
SIGNAL
INPUTS
Vss::::::: VOISPLAY
Rp
RSEG
DATA 0 - - - - - 1
UCN-4823A (100V)
VSEG IOFF)
DWG.NO. A-ll.457
Figure 14
4-33
II
INDUSTRIAL, MILITARY, AND AEROSPACE DEVICES
,
~
,
SECTION 5 - INDUSTRIAL, MILITARY, and AEROSPACE DEVICES
UHC/UHD-400 through 433-1 Quad Power and Relay Drivers . . . . . . . . . . . . . . .. 5-2
UHC/UHD-500 through 533 Quad Power and Relay Drivers. . . . . . . . . . . . . .. . .. 5-2
ULS-2001H through 2015H 7-Channel Darlington Drivers. . . . . . . . . . . . . . . . . .. 5-7
ULQ-2001R through 2015R 7-Channel Dar1in~on Drivers .................. 5-7
ULS-2021H through 2025H 7-Channel; 95 V Darlington Drivers .............. 5-7
ULS-2064H through 2077H Quad 1.5 A Darlington Switches ... ; ......... :.. 5-17
ULS-2801H through 2815H 8-Channel Darlington Drivers ..... , . . . . . . . . . . . .. 5-26
ULQ-2ilOlR through 2815R 8-Channel Darlington Drivers .................. 5-26
ULS-2:321H through 2825H 8-Channel, 95 V Darlington Drivers .............. 5-26
UDQ-2956R and 2957R Negative Supply, 5-Channel Source Drivers ........ .... 5-36
UDS-2981H through 2984H 8-Channel Source Drivers ........ ,. . . . . . . . . . .. 5-39
UDS-361lH through 3614H Dual Peripheral.and Power i:lri~rs ......••.•..... ',5-44
UCS-4401H and UCS-4801H.Hermetic BiMOS Latched Drivers ................ ' 5-48
UDS-5103Hthrough 5707H Quad Peripheral and. Power Drivers. . . . . .. . . .. . .. 5-54
UDS-5711H through 57VfH Dual Peripheral and Power Driliers ............ : .. 5-60
. UDS-5733H Quad NOR Peripheral and Power Driver .... : . : ..... " ....... , .. 5-59
UDS-5790H and 5791H Quad PIN Diode Drivers .......................... 5-66
See Also:.. .
.
.,
.
UHD-490 and 491 High-Voltage Display Drivers .........•.......•...... 2-5
ULS-2045H .NPNJransistor Array .................................. 10.4
ULS-2083H Independ.ent NPN Transistor Array .......................... IP-12
ULS-2140H Quad Current Switch ...... " ......................... ; 10-16
UGS-3019T/UDigital Hall Effect Switch . . . . . . . . . . . . . . . . .. . . . . . . . . . .. 9-5.
UGS-3020T/U Digital Hall Effect Switch ............................. 9-7
UGS-3030T/U Bipolar Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . . .. . . . . .9.9
. UGS-3075T/U Bipolar Hall Effect Switch ................... , . . . . . . . .. 9~.2
UGS~3076T/U Bipolar Hall Effect Switch ... ,. : ................ , . . . . .. 9~2
ULQ-8126R and ULS-8126R (SG2526/1526) SMPS Controllers ............. 10-37
ULS-8160R (SE5560) Switched-Mode Power Supply Controller ... , ......... 10-42
Quality Assurance Flpw Chart .....................................• 5-70
Double-Deuce Program for High-Reliability Devices ..... . . . . . . . . . . . . . . . . .. 5-72
High-Reliability Screening to MIL-STD-883 ............................. 5-75
NOTE: Most devices described in Sections 2, 3, and 4 can also be supplied in extended-temperature
hermetic packages. Contact the local sales office or factory for add.itional information.
5--1
II
SERIES 400, 400-1, and 500
H£RMET1CALLY SEALED POWER arid RELAY DRIVERS
SERIES 400, 400·1 and 500
HERMETICAlLY SEALED POWER and RELAY DRIVERS
FEATURES
•
•
•
•
•
•
500mA Output Sink Current Capability
DTLiTIl Compatible Iilputs
Transient Protected Outputs on Relay Drivers
High Voltage Output - lOOV Series 500, lOV Series 400-1, and 40V Series 400
Hermetically Sealed Packages to MIL-M-38510
High-Reliability Screening to MIL-STO-883, Class B
Description
These Series 400, 400-1, and 500 hermetically sealed power and relay
drivers are bipolar monolithic circuits incorporating both logic gates and
high-current switching transistors on the same chip. Each device contains
four drivers capable of sinking 500mA in the ON state. In the OFF state,
Series 400 devices will sustain 40V, Series 400-1 devices will sustain 70V,
and Series 500 devices will sustain 1OOV .
All devices are available in either a 14-pin hermetic flat-pack package
(Types UHC-) or a 14-pin hermetic dual in-line package (Types UHD-).
These packages conform to the dimensional requirements of Military
Specification MIL-M-38510 and meet all of the processing and environmental requirements of Military Standard MIL-STD-883, Method 5004
and 5005. These devices are also furnished in a plastic 14~pin dual in-line
package (Types UHP-) for operation over a limited temperature range.
Applications
The UHC- and UHD- Series 400,400-1, and 500 power an!! relay drivers
are ideally suited for drivinginc/llldescent lamps, relays, solenoids, and
other interface devices with up to lA output current per package. Hermetic
sealing and an operating temperature range of - 55°C to + 125°C recommend them for military and aerospace applications as, well as commercial
,and industrial control applications w~ere sever,eenvironments may be
encountered.
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee)
Operating Temperature Range
Current into any output (ON state)
Min.
4.5
-55
Nom.
5.0
+25
5--2
Max,
5.5
+ 125
250
Units
V
mA
SERIES 400, 400-1, and 500
HERMETICALLY SEALED POWER and RELAY DRIVERS
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, vcc ..
I nput Voltage, V;":
Output Off-state Voltage, VOff:
Series UHC-400 and UHD-400.
Series UHC-400·! and UHD·400·! ..
Series UHC·500 and UHD·500.
Output On-State Sink Current, 100' .
Suppression Diode Off-State Voltage, Voll '
" .7V
.. 5.5V
.40V
.70V
.IOOV
.SOOmA
.40V
.70V
Series UHC-400 and UHD-400 ..
Series UHC-400-! and UHD-400-! .
Series UHC-500 and UHD-500 ..
Suppression Diode On-State Current, 10"" .
Operating Free-Air Temperature Range, TA
Storage Temperature Range, Ts
IOOV
..500mA
-55°C to +125°C
. -65°C to + !50°C
II
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Driven
Other
Input
Input
Vcc
Cha racte ristic
Symbol
"1" Input Voltage
"0" Input Voltage
"0" Input Current at all Inputs
except Strobe
"0" Input Current at Strobe
"1" Input Current at all Inputs
except Strobe
"1" Input Current at Strobe
V;nl1
V;n(O)
MIN
MIN
hn{D)
MAX
MAX
MAX
MAX
MAX
MAX
"1" Output Reverse Current
Series 400
Series 400-1
Series 500
"0" Output Voltage
Diode Leakage Cu rrent
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
Temp.
hn(O
l;n(l )
I;n(1)
loff
Von
ILK
Vo
!cCIl)
Icc(o)
NOM
NOM
MAX
MAX
NOM
NOM
NOM
NOM
Limits
Output
Min.
Typ.
Max.
2.0
O.4V
0.4V
2.4V
5.5V
2.4V
5.5V
4.5V
4.5V
OV
OV
OV
OV
-0.55
1.1
40V
70V
MIN
MIN
MIN
MIN
MIN
MIN
MIN
NOM
NOM
MAX
MAX
IOOV
150mA
250mA
150mA
250mA
OPEN
1.5
NOTES:
1. Each input.
2. Typical values are at Vcc ~ 5.0V, TA ~ 25°C.
3. Measured at VR ~ Voll(m;n).
4. Measured at II ~ 200mA.
5. Each gate.
6. Input test conditions are listed in Table IV.
5-3
Units
0.8
V
V
-0.8
1.6
40
1
100
1
mA
mA
p.A
mA
p.A
mA
100
100
100
0.5
0.7
0.6
0.8
200
1.75
7.5
26.5
MA
p.A
p.A
V
V
V
V
p.A
V
mA
mA
Notes
1,2
2
1
1
6
6
6
6
6
6
6
3
2,4
5,6
5,6
SERIES 400, 400-1, and SOO
HERMniCALLY SEALEDPOWfRlind RELAY DRIVERS
Table IV
INPUT CONDITIONS FOR OUTPUT CHARACTERISTIC MEASUREMENTS
Type UHC- or UHD-
"1" Output Reverse
Current (loll)
Driven
Other
Input
Input
400,400-1, SOO
402,402-1, S02
403,403-1, S03
406, 406-1, 506
407,407-1,507
40B, 408-1, 50B
432, 432-1, 532
433,433-1,533
2.0V
2.0V
2.0V
2.0V
O.BV
0.8V
0.8V
O.BV
"1" Level Supply
Current (l wll )
Driven
Other
Input
Input
"0" Output Voltage
01 on)
Driven
Other
Input
Input
2.0V
2.0V
OV
2.0V
Vee
Vee
O.BV
O.BV
O.BV
0.8V
0.8V
O.BV
2.0V
2.0V
2.0V
2.0V
S.OV
S.OV
5.0V
5.0V
OV
OV
OV
OV
Vee
0.8V
O.BV
Vee
2.0V
2.0V
OV
OV
"0" Level Supply
Current (Icc ,)
Driven
Other
Input
Input
S.OV
5.0V
5.0V
5.0V
OV
OV
OV
OV
OV
OV
OV
OV
5.0V
5.0V
5.0V
5.0V
OV
OV
OV
OV
5.0V
5.0V
5.0V
5.0V
SWITCHING CHARACTERISTICS at Vee = 5.0V, TA = 25°C
limits
Characteristic
Symbol
Turn-on Delay Time
Series 400
Series 400-1
Series 500
t,dO
Turn-off Delay Time
Series 400
Seri es 400-1
Series 500
t,dl
Test Conditions
Min.
Typ.
Max.
Units
Vs
Vs
Vs
= 40V, Rl = 265 n (6 Watts)
= 70V, Rl = 465 n (10 Watts)
= lOOV, Rl = 670 n (15 Watts)
750
750
750
ns
ns
ns
Vs
Vs
Vs
=
=
=
40V, Rl = 265 n (6 Watts)
70V, Rl = 465 n (10 Watts)
100V, Rl = 670 n (15 Watts)
500
500
500
ns
ns
ns
Typical Switching Test Circuit
INPUT
2.4V VCC=5V
a
EN
o~;:.
Vs
r~----l
:
INPUT
Rl
I
~"'----- Vjn(O)
,
I
I
I
iI
I
I
ISP '
(Note 3)
I
I
:
-: LOAD
I
CIRCUIT
L _____
tpdQ
-+----!
:
I
~.tpd'
I
I
OUTPUT
I
I
- - - - - - -
I
J
owe.
OWIl. HO. A-789SA
INPUT PULSE CHARACTERISTICS
VinlOj - OV
tf -
Vin 1 = 3.SV
tr
=
7. ns
14 ns
S-4
tp -
Ips
PRR = 500kHz
V out(O)
HO. 1.·19001.
SERIES 400, 400-cl, and 500
HERMETICALLY SEALED POWER and RELAY DRIVERS
Device Pinning
UHC-400
UHC-400-1
UHC-500
UHC-402
UHC-402-1
UHC-502
II
UHC-403
UHC-403-1
UHC-503
UHC-406
UHC-406-1
UHC-506
UHC-407
UHC-407-1
UHC-507
UHC-408
UHC-408-1
UHC-508
UHC-432
UHC-432-1
UHC-532
UHC-433
. UHC-433-1
UHC-533
5-5
SERIES 400, 400-1, and 500
HERMETICALLY SEALED POWER and REbAY DRIVERS
Device Pinning
(Continued)
UHD·400
UHD·400·1
UHD·500
UHD·403
UHD·403·1
UHD·503
UHD·408
UHD·408·1
UHD·508
UHD·402
UHD·402·1
UHD·502
UHD·406
UHD·406·1
UHD·506
UHD·407
UHD·407·1
UHD·507
UHD·432
UHD·432·1
UHD·532
UHD·433
UHD·433·1
UHD·533
5-6
HIGH-VOLTAGE~
SERIES ULS-2000H and ULQ-2000R
HIGH·CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2000H and ULQ·2000R
HIGH·VOLTAGE, HIGH·CURRENT
DARLINGTON TRANSISTOR ARRAYS
FEATURES
•
•
•
•
•
•
•
TTL, DTL, PMOS, or CMOS Compatible Inputs
Peak Output Current to 600 mA
Transient Protected Outputs
Side-Brazed Hermetic Package, or
Ger-DIP Package
High-Reliability Screening Available
Wide Operating Temperature Ranges
of seven silicon NPN Darlington
COMPRISED
power drivers on a common monolithic sub-
01'G. NO.
strate, the Series ULS-2000H and ULQ-2000R arrays are ideally suited for driving relays, solenoids,
lamps, and other devices with up to 3.0 A output
current per package. The side-brazed, hermetically
sealed Series ULS-2000H devices are rated for operation over the temperature range of - 55°C to
+ 125°C, recommending them for military and aerospace applications. The Cer-DIP, industrial-grade
hermetic Series ULQ-2000R devices are rated for
use over the operating temperature range of -40°C
to +85°C, allowing their use in commercial and
industrial applications where severe environments
may be encountered.
The twenty-five integrated circuits permit the circuit designer to select the optimum device for his
application. There are two packages, five input
characteristics, two output voltages, and two output
currents covered by the listings. The appropriate part
for use in specific applications can be determined
from the Device Type Number Designation chart.
Note that the high-voltage devices (BVCE ",95 V) are
available in the Series ULS-2000H only. All units
feature open collector outputs and integral diodes for
inductive load transient suppression.
All Series ULS-2000H arrays are furnished in a
16-pin side-brazed dual in-line hermetic package
o
A~9594
that conforms to the dimensional requirements of
Military Specification MIL-M-3851O and meets the
processing and environmental requirements of Military Standard MIL-STD-883, Methods 5004 and
5005.
o
Device Type Number Designation
0
VCEIMAX} =
IclMAX} =
50 V
SOO mA
Genera I Pu rpose
PMOS, CMOS
14 - 25 V
PMOS
5V
TTL, CMOS
6 - 15 V
CMOS, PMOS
High Output
ULQ-2001R
ULS-2001H
ULQ-2002R
ULS-2002H
ULQ-2003R
ULS-2003H
ULQ-2004R
ULS-2004H
ULQ-200SR
ULS-2005H
TTL
5-7
50 V
600 mA
Type Number
ULQ-2011R
ULS-2011H
ULQ-2012R
ULS-2012H
ULQ-2013R
ULS-2013H
ULQ-2014R
ULS-2014H
ULQ-2015R
ULS-2015H
95 V
500 mA
ULS-2021H
ULS-2022H
ULS-2023H
ULS-2024H
ULS-2025H
SERIES ULS-2000H and ULQ-2000R
HIGH-VOLTAGEiJIIGH-CURRIiNT DARLINGTON TRANSISTOR ARRAYS
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE (Series 2000*, 2010*) .............................. 50 V
(Series ULS-2020H) ................................ 95 V
Input Voltage, VIN (Series 2002*, 2003*, 2004*) ......................... 30 V
(Series 2005*) ..................................... 15 V
Peak Output Current, 101lT (Series 2000*, ULS-2020H) .................... 500 mA
(Series 2010*) ............................. 600 mA
Ground Terminal Current, IGNO ....................................... 3.0 A
Continuous Input Current, liN' ...................................... 25 mA
Power Dissipation, Po (one Darlington pair) .................. '.' ......... 1.0 W
(total package) ............................. See Graphs
Operating Temperature Range, TA (Series ULS-2000H) ........... -SSOC to + I25c C
(Series ULQ-2000R) ............ -40°C to +SSCC
Storage Temperature Range, Ts ........................... -65 c C to + I50c C
PARTIAL SCHEMATICS
Series 2001 *
(each driver)
Series 2002*
(each driver)
rl~--o
COM
Series 2003'
(each driver)
.--*---0 COM
.--.r----<> COM
,
,
i
i
,
,,,
___ I
DWG. No. A-965 I
DWG, tio. A-9650
Series 2004 *
(each driver)
Series 2005'
(each driver)
.--*--0 COM
.--""'--0 COM
1O.5K
1. 05K
,,
I
I
___ I
'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
5-8
SERIES ULS-2000H and UlQ-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2000H and ULQ·2000R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
ICE!
(;ollector-Emitter
Saturation Voltage
Ve£(SAT)
Applicable
Devices
All
2002*
2004*
All
Test Conditions
I Temp.
Min.
+25°C
Max.
Input Current
Input Voltage
IINION)
I)Nom
VINtON)
2002"
2003*
2004*
2005*
All
2002"
2003-
Max.
Min.
Max.
Min.
Max.
2004-
Min.
Max.
2005D-C forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode Leakage
Current .
Clamp Diode Forward
Voltage
hFE
2001-
CIN
tPLH
tpHI
IR
All
All
All
All
VF
All
Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C
Fig. Min.
IA VeE - 50 V
IB VeE = 50V, VIN =6V
IB V.£L - 50 V, V, - I V
Ie - 350 mA, I, - 850 iJ.A 2
2
Ie = 200 mA, I, =550 iJ.A
Ie = 100 mA, I, = 350 iJ.A 2
Ie = 350 mA, I, = 500 iJ.A
2
2
Ie - 200 mA, I, - 350 iJ.A
Ie - 100 mA, I, - 200 iJ.A 2
Ie = 350 mA, I, = 500 iJ.A 2
2
Ie - 200 mA, I, - 350 iJ.A
Ie = 100 mA, I, = 250 p.A 2
480
VIN = 17 V
3
VIN - 3.85 V
3
650
3
240
VIN = 5 V
650
VIN -~2 V
I
3 1180
VIN -3 V
4
25
Ie = 500 iJ.A
5
VeE = 2V, Ie - 300mA
5
VeE - 2 V, Ie - 3UU mA
5
VeE - 2V, Ie - 200mA
5
VeE = 2 V, le= 250 mA
5
VeE - 2 V, Ie - 300 mA
5
VeE = 2V, Ie = 200 mA
VeE = 2 V, Ie = 250 mA
5
VeE - 2V, Ie - 300mA __ 5
-5 VeE = 2 V, Ie = 125 mA
VeE = 2 V, Ie = 200 mA
5
5
VeE - 2 V, Ie - 275 mA
5
VeE =2 V, Ie = 350 mA
VeE = 2 V, Ie = 125 mA
5
VeE = 2V, Ie = 200 mA
5
5
VeE = 2 V, Ie = 275 mA
5
VeE = 2 V, Ie = 350 mA
VeE - 2 V, Ie - 350 mA
5
VeE = 2 V, Ie = 350 mA
5
2
500
VeE = 2 V, Ie = 350 mA
2 1000
V" = 2V, 1= 350mA
-
-
0.5 Ein to 0.5 Eout
0.5 Ein to 0.5 Eout
VR= 50 V
IF = 350 mA
"Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
Note 1: All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2: The 11N(0f~ current limit guarantees against partial turn-on of the output.
Note 3: The VINIONI voltage limit guarantees a minimum output sink current per the specified test conditions.
5---9
Umits
Typ.
Max.
100
500
500
1.6
1.8
1.5
1.3
1.1
1.3
1.25
1.6
1.1
1.3
0.9
1.1
1.6
1.8
1.5
1.3
1.3
1.1
850
1300
1350
930
500
350
1450
1000
1500 . 2400
50
18
13
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4
-
-
6
-
IS
250
250
-
7
-
1.7
-
-
Units
iJ.A
iJ.A
!1A
V
V
V
V
V
V
V
V
V
iJ.A
iJ.A
p.A
p.A
!1A
p.A
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-
25
1000
1000
50
pF
ns
ns
p.A
2.0
V
o
SERIES ULS-2000H and ULQ-2000R
HIGH~VOLTAGE; HIGH-CURRENT DARl:INGTONTRANSISTORARRAYS
SERIES ULS·20 1 OH and ULQ·2010R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
ICE!
Collector-Emitter
Saturation Voltage
VCE{SAl)
Applicable
Devices
All
2012*
2014 *
All
Min.
+25°C
Max.
Input Current
2012*
2013*
2014*
I'N'ON}
".
Input Voltage
2015*
All
2012*
I"'OFF!
V'N(ON}
2013*
Max.
Min.
Max.
Min.
Max.
2014*
Min.
Max:
2015'
Min.
Max.
.'
D-C Forward Current
Transfer Ratio
Injlut Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode leakage
Current
Clamp Diode Forward
Voltage
hE[
2011*
C'N
t.,
t,..,
I,
All
All
All
All
VF
All
Min.
+25°C
+25°C
+25OC
+25°C
Limits
Typ.
Max.
100
500
500
2.1
1.8
1.8
1.6
1.5
1.3
1.7
1.9
1.25
1.6
l.l
1.3
1.8
2.1
1.6
1.8
1.5
1.3
850
1300
930
1350
500
350
1000
1450
1500
2400
5u
23.5
17
3.6
1:9
6.0
2.7
3.0
-
Test Cnnditions
r;;p:-
Fig. Min ..
IA IB IB 2
2
2
2
2
2
2
2
2
480
3
650
3
240
3
3
650
3 1180
4
25
5
5
5
5
5
5
5
5
5
0
5
5
5
5
5
5
5
-
Vcr = 50V
VCE = 50 V, VIN = 6 V
VeE =50V, V'N = I V
Ie - 500 rnA, I, - 1100/LA
I = 350 mA,I, = 850/LA
Ie = 200 rnA, I, = 550/LA
Ie = 500 rnA, I, = 600/LA
Ie = 350 rnA, I., = 500/LA
Ie = 200 rnA, I, = 350/LA
Ie - 500 rnA, I, - 600/LA
Ie = 350 rnA, I, = 500/LA
I - 200 rnA, !a - 350/LA
V'N = 17 V
V,. = 3.85 V
V'N = 5 V
V'N = 12 V
VIN - 3 V
I - 500/LA
VeE = 2 V, Ie = 500 rnA
VeE = 2 V; Ie = 500 rnA
VeE - 2 V, Ie - 250 rnA
VeE =2 Vi Ie = 300 mA
VeE = 2 V, Ie .~ 500 mA
VeE - 2 y, Ie ~ 250 mA
VeE - 2 V, Ie - 300 mA
VeE - 2 V, Ie - 50umA
VeE = 2 V, Ie - 275 mA
VeE '-, 2 V, Ie - 30u mA
VeE = 2 V, Ie '" 500 mA
VeE - 2 V, Ic- 275 rnA
VeE - 2 V, Ie - 350 mA
. VeE =2 V, le- 500 mA
VeE - 2 V, Ie - 350 mA
VCE - 2V, Ie - 500 mA '.
VeE - 2V, Ie -·350 mA
Vr.,-'- Z V, Ir. - oOO.mA
VeE =2 V, le'= 500mA
VeE =2 V, Ie = 500 mA
0
-
2
2
450
900
-
-
.'
0.5 E" to 0.5 E'"t
0.5 E .to 0.5 E.ut
V, - 50 V
-
6
-
~.
'i
l~
-
17
7.0
.'i
'.
Units
/LA
/LA
/LA
V
V
V
V
V
V
V
V
V
/LA
p,A
/LA
/LA
/LA
/LA
V
V
V
V
V
V
V
-
-
10
~u
9.5
3.0
j.5
2.4
Z.ti
-
V
V
V
!
V
V
V
V
V
L.-""
-
-
-
50
pF
ns
ns
/LA
-
1.7
-
-
2.0
2.5
V
V
15
250
250
25
JuOO
1000
....
IF - 350 mA
IF = 500mA
'Complete part number includes a prefix to indicate temperature range and a suflix to indieate package style. See
following part number description.
Note L All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 1, The I'N(OFF) current limit guarantees against partial turn-on of the output.
Note 1 The V'N(ON) voltage limit guarantees a minimum output sink current per the specified test conditions.
5-10
7
7
SERIES ULS-2000H and ULQ-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2020H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Collector-Emitter
Saturation Voltage
Symbol
1m
V"ISATI
Applicable
Devices
All
ULS-2022H
ULS-2024H
All
Temp.
Min.
+25°C
Max.
Input Current
Input Voltage
IINION)
l"Off
V'NION}
ULS-2022H
ULS-2023H
ULS-2024H
ULS-2025H
All
ULS-2022H
ULS-2023H
Max.
Min.
Max.
Min.
Max.
ULS-2024H
Min.
Max.
ULS-2025H
D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clarnp Diode Leakage
Current
Clarnp Diode Forward
Voltage
h"
ULS-202IH
C'N
tPiH
tPHl
I,
All
All
All
All
V,
All
Test Conditions
I-.:--
Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C
VeE -95V
VeE = 95 V, V~ - 6 V
VeE - 95 V, VIN - 1 V
Ie - 350 mA, 18 - 850 pA
Ie - 200 mA, 18 - 550 pA
Ie = 100 mA, 18 = 350 JJA
Ie - 350 mA, 18 - 500 pA
Ie = 200 rnA, 18 = 350 JJA.
Ie = 100 rnA, 18 = 250 JJA
Ie - 35U rnA, 18 - !lOU IJA
I = 200 mA, I = 350 JJA
I = 100 rnA, I = 250 JJA
V,N = 17 V
V,N = 3.85 V
V, - 5V
V,N = 12V
V,N = 3 V
Ie - 500 JJA
VeE - 2V, Ie - :lOOmA
VeE = 2 V, Ie = 300 mA
VeE - 2 V, Ie - 200 rnA
VeE = 2 V, Ie = 250 mA
VeE = 2V, Ie = 300 rnA
VeE - 2 V, Ie - 200 rnA
V E= 2 V, Ie = 250 mA
VeE = 2 V, Ie = 300 rnA
VeE - 2 V, Ie - 125 mA
VeE = 2 V, Ie = 200 mA
VeE - 2 V, Ie - 275 rnA
VeE ~ 2V, Ie - 350 rnA
VeE = 2 V, Ie = 125 rnA
VeE = 2 V, I = 200 mA
VeE = 2V, Ie = 275mA
Vcr = 2 V, I = 350 mA
VeE = 2 V, Ie = 350 mA
V" = 2 V, Ie = 350 mA
VeE = 2 V,le = 350 mA
VeE = 2 V, Ie - 350 rnA
0.5 E," to 0.5 Eout
0.5 E," to 0.5 Eout
V, - 95 V
I,
=
350 rnA
Note L All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2, The I'NIDFf} current limit guarantees against partial turn-on of the output.
Note 3, The V'NION} voltage limit guarantees a minimum output sink current per the specified test conditions.
5-11
Fig. Min.
IA IB III 2
2
2
2
2
2
2
2
2
3
480
3
650
3
240
650
3
3
1180
4
25
!l
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
500
2 1000
-
Umits
Typ.
Max.
lOa
500
500
1.6
1.8
J.3
1.5
J.J
J.3
1.25
1.6
J.J
1.3
1.1
0.9
1.6
UI
J.3
1.1
1.5
850
930
350
1000
1500
50
1300
1350
500
1450
2400
-
-
-
-
-
6
-
15
250
250
-
7
-
1.7
-
J.3
Units
JJA
JJA
/lA
V
V
V
V
V
V
V
V
V
JJA
JJA
/lA
JJA
JJA
-
p.A
HI
V
13
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-
-
25
1000
1000
50
pF
ns
ns
2.0
V
/lA
o
SERIES ULS-2000H and ULQ-2000R
HIGH-VOLTAGE;HIGH"CURREN.T DARLINGTON TRANSISTOR ARRAYS
TEST FIGURES
OPEN
VeE
OPEN
VeE
OPEN
FIGURE 1A
FIGURE 1B
OPEN
OPEN
;;.o.--'~-o
OWG. "0.
ow::;.
MO.
FIGURE 2
OPEN
FIGURE 3
VeE
OPEN
FIGURE 4
FIGURE 5
OPEN
0'1«> • ..0. 4-97354
FIGURE 7
FIGURE 6
5--12
OPEN
~-~732
SERIES ULS-2000H and ULQ~2000R
HIGH-VOLTAGE, .HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2000H
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
AT +50°C
AT +75°C
600r----r--~----r_---r--_r----r_--._--_r--_,--__,
o~
NUM8ER OF OUTPUTS
NUMBER OF OUTPUTS
CONDUCTING
CONDUCTING
o SIMULTANEOUSLY
o
20
40
60
80
PER CENT DUTY CYCLE
0~;~IM~U~L~TA~N~E~O~~~~~Y--~--~4O~---L--~60~--L---~80~--~--~100
100
PER CENT DUTY CYCLE
D\'IG. NO. A-IO,197A
llWG.MO. A-IO,199A
AT + 125'C
AT + 100°C
~600r---'----r----r---'----r---'----r----r---'---;
u600r----r--_,----~---r--~----r_--,_--_r--~r_--,
'8
"+
«
«
~400
+
~
~
i3
g200'r---~~~~~~~-=2~~--t---t---~-=~--__
u
~
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
20
o
u
"
40
6D
PER CENT DUTY CYCLE
80
~
100
A-IO,200A
40
60
PER CENT DUTY CYCLE
80
100
O\llG. HO. A-IO.20IA
5--13
o
SERIES ULS-2000H and ULQ-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARUNGTON TRANS1STORARRAVS
SERIES ULQ·2000R
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
AT +50"C
AT +75°C
600
u
u
'\'
~
~
""
~
""~
~
iii
E
E
~
z
~
8
~
0
u
~"
600
~
°0
"
u
2
200
~
200
0
u
NUMBER OF OUTPUT-S
CONDUCTING
~"
o SIMULTANEOUSLY
0
20
AO
60
PER CENT DUTY CYCLE
80
100
NUMBER OF OUTPUTS
o
CONDUCTING
SIMULTANEOUSLY
0
20
AO
60
PER CENT DUTY CYCLE
Dwg. No. A-IO,BB3A
ALLOWABLE PACKAGE POWER DISSIPATION
SERIES ULS-2000H and ULQ-2000R
2,
1\
\
5~~\
~~~
X)-+
r---:s-..,
'19
~~
-'
Iii
0'0
v
o
('
.., ":'b;;
~
~ r-... \.
"\1\'"
5
~ ,:"
~
\,
0
50
100
AMBIENT TEMPERATURE, TA IN
15 o
°c
D1'IG. NO. A-IO.B84.
5-14
!
80
100
Dwg. No. A-IO,887ft
SERIES ULS-2000H and ULQ-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE
COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT
,
,,
600
L~'
"'Z
E 400
,
,,
~g;
=>
u
2u
600
200
~
/ /
o
u
"
'/
,
,h"
V
/
V
L
,/
"'
L
E
,-"
~~~ov
i
u
.J \;C
o
INPUT CURRENT
o
600
'A+·'~i"'-
I
MAXIMUM REQUIRED
400
200
INPUT CURRENT IN fiA - liN
o
0.5
..--' "
~
'{"
OWG. NO.
sERI.Es ULs-2000H and ULQ-2000R
PART NUMBERING SYSTEM
r-
Q - 20
L
3 H - MIL
~-
20
SATURATION VOLTAGE - VCE (SAD
DWG.1I0. A-IO.snA
UL
",0
I' "",, ,
o
~ -200
U
V\'"
~
,'kl'''-
Z 400
V
"
/
INSTRUCTIONS.
MIL == MILITARY GRADE WITH SCREENING TO
MIL-STD-883, CLASS B
PACKAGE· DESIGNATION.
C = UN PACKAGED CHIP
H = GLASS/METAL HERMETIC, DUAL IN-LINE
A = PLASTIC, DUAL IN-LINE
R = CERAMIC/GLASS HERMETIC, DUAL IN-LINE
DEVICE INPUl CHARACTERISTICS
1 = GENERAL PURPOSE PMOS/CMOS
2 = 14-25 V PMOS
3 = 5 V TTUCMOS
4 = 6-15 V CMOS/PMOS
5 = HIGH-OUTPUT TTL
L---'--DEVICE OUTPUT CHARACTERISTICS
a = 50 V AND 500 rnA MAXIMUM
1 = 50 V AND 600 rnA MAXIMUM
2 = 95 VAND 500 rnA MAXIMUM (PACKAGE HOR A ONLY)
I.----DEVICE TYPE NUMBER (4 DIGITS IN 2000 SERIES)
L..---OPERATING AMBIENT TEMPERATURE RANGE.
N = COMMERCIAL (-20°C TO +85°C)
Q = EXTENDED (-40°C TO +8n)
S = FULL MILITARY (-55°C TO + l25°C)
L--FAMILY.
5-15
A-975~B
o
SERIES ULS-2000H and ULQ-2000R
HIGH-(URRENl DARLINGTON -TRANStSTOR ARRAYS
KIGH~VOLTAGE,
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
SERIES 2003'
SERIES 2002'
2.5
2 ••
-"?,
E
.;
•
"?,
2
~
1.5
I ••
~
~
~
;!:
•
12
"
I.
18
2.
INPUT VOLTAGE - VIN
•• 5
22
O"",IIO.A-IO.225
•
2••
2.5
3 .•
3.5
5.0
INPUT VOLTAGE - VIN
SERIES 2005'
SERIES 2004"
3.5
2.
3.0
E 2.5
.f
<{
E
.::
~
E
~
2.0
~
1.5
~
1.0
~v
v
~
~
::>
::>
~
0.5
0
0
II
10
5
INPUT VOLTAGE - VIN
~O.
12
A- 10. 226
1.5
2.0
2.5
3.0
3.5
4.0
INPUT VOLTAGE - VIN
DWG.IIO. A-IO,8714
'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
previous par! number description.
5-16
5.5
ULS-2064H THROUGH ULS-2077H
1.2S A QUAD DARLINGTON SWITCHES
ULS·2064 H through ULS·2077H
1.25 A QUAD DARLINGTON SWITCHES
FEATURES
•
•
•
•
TIL, DTL, PMOS, or CMOS Compatible Inputs
Transient-Protected Outputs
Hermetically Sealed Package to MIL-M-38510
High-Reliability Screening to MIL.STD-883, Class B
INTENDED FOR MILITARY, aerospace, and related applications,
ULS-2064H through ULS-2077H high-voltage high"currentintegrated
circuit switches will interface from low-levellogictoa variety peripheral
loads such as relays, solenoids, d-c and stepping motors, multiplexed LED
and incandescent displays, heaters, and similar loads up to 400 W (1.25 A
per output, 80 V, 12.5% duty cycle, +50°C).
.
of
Dwg. No. A-ll,02S
ULS-2064H
through ULS-2067H
The devices are specified with a minimum output breakdown of 50 volts,
and VCF,SUS) minimum of35 volts measured at 100 rnA, or a minimum output
breakdown of 80 volts, VCE(SUS) minimum of 50 volts, and an output current
specification of 1.25 A (saturated).
Types ULS-2064H, ULS-2065H, ULS-2068H and ULS-2069H are
designed for use with TTL, DTL, Schottky TTL, and 5 V CMOS logic.
Types ULS-2066H, ULS-2067H, ULS-2070H and ULS-2071H ,are
intended for use with 6 V t6 15 V CMOS and PMOS input circuits: .
All eight of these devices include' integral transient suppression diodes
for use with inductive loads:
Owg. No, A-ll.026
Types ULS-2068H and ULS-2069H incorporate a pre-driver stage requiring a5 V supplyrail. Types ULS-2070H andULS-2071H include an
added gain stage requiring a 12 V (nominal) supply rail. The input drive
requiiemi:mts for these devices are reduced, while the output can switch
currents up to 1.5 A.
'
ULS-2068H
through ULS-2071 H
Types ULSc2074H through ULS-2077H are intended for use in emitterfollower or similar isolated Darlington applications where common-emitter
versions cannot be used. These circuits are identical with the ULS-2064H
through ULS-2067Htypes except for the isolated Darlington pin-out and
the omission of the suppression diodes.
All twelve Quad Darlington Switches are supplied in 16-pin hermetic
dual-in-line packages. They meet the processing and environmental requirementsofMIL-STD"883 Methods 5004 and 5005, and the dimensional
requirements of MIL-M-3851O.
Dwg. No, A-11,027
ULS-2074H
through ULS-2077H
5---17
o
ULS-2064H THROUGH ULS-2077H
1. 25 A QUAD- DARLINGTON SWITCHES
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for anyone driver
(unless otherwise noted)
output Voltage, VCEX ••••••••••••••••••••••• See Below
Output Sustaining Voltage, VCEISUSI ............. See Below
Output Current, IOllT (Note 1) .................... 1.5 A
Input Voltage, VIN (Note 2) .................. See Below
Input Current, 18 (Note 3) ...................... 25 rnA
Supply Voltage, Vs (ULS-2068/69H) ................ 10 V
(ULS-2070I7lH) ................ 20 V
Total Package Power Dissipation .............. See Graph
Power Dissipation, Po/Output .................... 2.2 W
Operating Ambient Temperature Range, TA -55°C to + 125°C
Storage Temperature Range, Ts ........ -65°C to + 150°C
PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
~~L
'V~£
I'
(' '<'00
R
I : 't'-..
NORMAL
~BIEN~ rEMPE~A1U~E
o
SYSTEM LIMIT
I
I
I
I
25
50
I
flJA~90QJ
-
75
TEMPERATURE IN
"-DEVICE"'-..
~.""
- .... - ...
100
125
150
°c
D'IIIl.NO,A.-ID,I98A
Type Number
ULS-2064H
ULS-2065H
ULS-206SH
UlS-20S7H
ULS-20S8H
ULS-20S9H
UlS-2070H
ULS-2071H
UlS-2074H
UlS-2075H
UlS-207SH
ULS-2077H
VGEX (max.)
50 V
80 V
50 V
80 V
50V
80 V
50 V
80 V
50 V
80 V
50 V
80 V
VWSUSl (min.)
35 V
50 V
35 V
50V
35 V
50 V
35 V
50 V
35 V
50 V
35 V
50 V
VIN (max.)
15 V
15 V
30V
30 V
15 V
15 V
30 V
30V
30V
SOV
30 V
SOV
Application
TTL, DTL, Schottky TTL,
and 5 V CMOS
S to 15 V CMOS
and PMOS
TTL, DTl, Schottky TTL,
and 5 V CMOS
S to 15 V CMOS
and PMOS
General Purpose
S to 15 V CMOS
and PMOS
Notes:
1. For allowable combinations of output current, number of outputs conducting, and duty cycle, see graphs following.
2. Input voltage is with reference to the substrate (no connection to any other pins)forthe ULS-2074/75!76/77H, reference is ground foral! other types.
3. Input current may be limited by maximum allowable input voltage.
5-18
ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES
ULS·2064H through ULS·2067H
PARTIAL SCHEMATIC
_____-+---oc
I
I
i
7.2K
1
I
I
I
m
O'I/G.MO. A.-IO,353
ULS-2064H
ULS-2065H
RIN =
ULS-2066H
ULS-2067H
RIN =
n
350
NC
3 I,n
"..
Dwg. No. A-ll.025
ULS·2068H through ULS·2071 H
PARTIAL SCHEMATIC
ULS-2068H
ULS-2069H
ULS-2070H
UlS-2071H
RIN
= 2.5 kn,
RIN =
~s
D
= 900 n
11.6 kn, Rs = 3.4 k!l
·S
...__--+---oC
I
i
I
I
I
7.2K
:
rh
DWIl.MO. A-10.3S"
Dwg. No. A-Q,026
ULS·2074H through ULS·2077H
PARTIAL SCHEMATIC
,I
i
I
7.2K
I
I
I
...L
SUB
ULS-2074H
UlS-2075H
ULS-2076H
ULS-2077H
OWG. NO. A-IO.355
RIN =
R
IN =
350 n
I,n
3 "..
Owg. No. A-ll,027
5-19
ULS-2064H THROUGH ULS-2077H
1.2SA QUAD DARLINGTON SWITCHES
ULS.2064H through ULS·2067H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
Output Leakage Current
leEx
output sustaining voltage
Collector-Emitter
Saturation Voltage
VeE(SUS)
Applicable
Devices
Temp.
UlS-2064/66H
ULS-2065/67H
ULl)-2Ub4/bbH
ULS-2065/67H
VeE(SAT)
-SSOC
All
+25°C
+125°
Input Current
1,,(oN)
UlS-2064/65H
UlS-2066/67H
Input Voltage
Vrt{ONI
UlS-2064/65H
UlS-2066/67H
Turn-On Delay
Turn-Off Delay
Clamp Diode leakage
Current
Clamp Diode
Forward Voltage
ioN
10"
I,
V,
-55OC
+25°C
-55°C
+25OC
All
All
UlS-2064/66H
ULS-2065/67H
All
!}-20
limits
Min.
Max.
Test Conditions
Fig.
VCE = 50 V
VeE - 80 V
Ie - IOU mA, Vw - U.4 V
Ie - 100 mA, VIN - 0.4 V
Ie - 500 mA, I. - 1.1 mA
Ie - 750 mA, I. - 1.7 mA
Ie - 1.0 A, I. - 2.25 mA
Ie - 1.25 A, I. - 3.75 mA
Ie - 500riJA, I. - 625 !LA
I = 750 mA, I. = 935 !LA
Ie = 1.0 A, I. = 1.25 mA
Ie - 1.25 A, I. - 2.0 mA
Ie - 500 mA, I. - 625 !LA
I - 750 mA, I. - 935 !LA
Ie - 1.0 A, I. - 1.25 mA
Ie = 1.25 A, I. - 2.0 mA
V. - 2.4 V
V'N - 3.75 V
VIN - 5.0 V
V'N - 12V
VeE - 2.0 V, Ie - 1.0 A
VeE - 2.0 V, Ie - 1.0 A
VfJ. - 2.0 V, Ie - 1.0 A
VeE - 2.0 V, Ie - 1.0 A
u.5 Ein to U.~ tool
0.5 Ein to 0.5 Eool
V, = 50 V
V, - 80 V
I, - 1.25A
I
I
-
Z
j~
500
500
-
50
-
2
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
5
5
5
5
-
6
6_
7
-
-
-
-
-
-
-
-
-
-
-
Units
l.U
!LA
!LA
V
V
V
V
V
V
V
V
V
V
V
V
V
. V
mA
mA
mA
mA
V
V
V
V
!L S
1.5
100
!LA
.!lJl)
~
1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.75
1.35
1.55
1.75
1.95
4.3
9.6
1.8
5.2
3.1
2.0
11.5
6.5
2.1
!L S
V
ULS-2064H THROUGWULS-2077H
1. 2SA· QUAD DARLINGTON SWITCHES
ULS.2068H through ULS·2071 H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted),
Vs = 5.0 V (ULS-2068169H) or Vs = 12 V (ULS-207oI71H)
Characteristic
Output Leakage Current
Output Sustaining Voltage
Collector-Emitter
Satu.ration Voltage
Symbol
1m
VCE{SUS)
Applicable
Devices
ULS-2.o68/7.oH
ULS-2.o69/71H
ULS-2.o68/7.oH
ULS-2069i71H
Temp.
VwSAn
-55'C
ULS-2068/69H
+25'C
+125'C
-55'C
ULS-2070/71H
+25'C
+125'C
Input Current
I""N'
-55'C
ULS-2068/69H
+25'C
+125'C
ULS-2070/7IH
Input Voltage
V.IONI
ULS-2068/69H
ULS-2.o7.o/71H
Supply Current
Is
Turn-On Delay
Turn-Off Oelay
Clamp Diode
Leaka2e Current
Clamp Diode
Forward Volla2e
t~
Inn
I,
V,
-55'C
+25'
-55'C
+ ~5'
ULS-2068/69H
ULS-207.o/7IH
All
All
ULS-2.o68/70H
ULS-2.o69/7IH
All
5--21
Test Conditions
Vcr = 5.0 V
VCE - 8.0 V .
Ie = 1.0.0 mA, V. = .0.4 V
Ie - 100mA, V" - 0.4 V
Ie = 5.0.0 mA, V. = 3.2 V
Ie - 750 mA, V. - 3.2V
Ie - 1..0 A, V. - 3.2 V
Ie - 1.25 A, V. - 3.2 V
Ie = 50.0 mA, V" - 2.9 V
Ie = 75.0 mA, Vw - 2.9 V
I = 1.0 A, V,. = 2.9 V
I = 1.25 A, Vw = 2.9 V
I = 5.0.0 mA, V" = 2.8 V
Ie = 750 mA, V" = 2.8 V
Ie '" 1.0 A, V,. = 2.8 V
I = 1.25 A Vw = 2.8 V
Ie = 5.0.0 mA, V. = 5.5 V
Ie = 750 mA, VIN = 5.5 V
Ie - 1.0 A,V" - 5.5 V
Ie = L25 A, V" = 5.5 V
le= 500 mA, VIN = 5.1 V
Ie = 75.0 mA, V,. = 5.1 V
Ie = 1.0 A, V'N = 5.1 V
Ie = 1.25A, V~ = 5.1 V
Ie = 5.0.0 mA, V'N = 5.0 V
Ie = 750 mA, V'N = 5.0V
Ie = 1.0 A, V. = 5.0 V
Ie = 1.25 A, V,. = 5.0 V
V. = 3.2 V
VIN = 2.75 V
V" = 2.75 V
V" =.3.75 V
VIN = 5.0 V
V" = 12 V
VCE = 2..0 V, Ie = 1..0 A
V" - ~.U V, k - .0 A
VCE = 2..0 V, Ie = 1.0 A
~.O V I
.0 A
V"
I = 50.0 mA, V.. = 3.2 V
I = 5.00 mA Vw = 5.0 V
0.5 E" to .0.5 E,~
.0.5 E to .0.5 E
V = 5.oV
V - S.oV
I, = 1.25 A
Fig.
I
I
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
5
5
5
limits
Min.
Max.
5.0.0
-
-
SOO
35
1.35
1.55
1.75
1.95
1.2.0
1.35
1.55
1.75
1.35
1.55
1.75
1.95
1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.75
1.35
1.55
1.75
1.95
60.0
550
85.0
1000
400
125.0
3.2
50
-
5
8
8
6
6
7
-
-
US
5..0
5.
6..0
4.5
1..0
1.5
1.0.0
1.0.0
2.1
Units
/LA
J,iA
V
V .
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
/LA
/LA
/LA
/LA
/LA
/LA
V
V
V
V
mA
mA
p.S
uS
uA
uA
V
D
ULS.2064HTHROUGH ULS~2077H
1.25 A QUAD DARLiNGTON SWITCHES
ULS·2074H through ULS·2077H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
I",
Output Sustaining Voijage
VCEiSU~
Collector-Emitter
Saturation Voltage
VCEiSATI
Applicable
Devices
ULS-2074/76H
ULS-2075/77H
ULS-2074176H
ULS-2075/77H
Temp.
-SSOC
All
+25°C
+125OC
IAput Current
IIN(ON)
UlS-2074/75H
ULS-2076/77H
Input Voltage
VIN1OH1
UlS-2074/75H
ULS-2076/77H
Turn-On Delay
Turn-Of! Delay
tON
to"
-55°C
+25OC
-SSOC
+25OC
All
All
5-22
Test Conditions
Fig.
V" = 50 V
V" = 80 V
I - 100 mA, VIN - 0.4 V
= 100 mA, VIN = 0.4 V
- 500 mA, I - 1.1 mA
= 750 mA, I. = 1.7 mA
= 1.0 A, I = 2.25 mA
- 1.25 A I - 3.75 mA
=500mAI = 625 /l-A
= 750 mA, I = 935/l-A
= 1.0 A, I = 1.25 mA
= 1.25 A I, = 2.0 mA
= 500 mA, I = 625/LA
= 750 mA, I = 935J,l.A
= 1.0 A, I = 1.25 mA
= 1.25 A, I, - 2.0 mA
VIN = 2.4 V
Vw = 3.75 V
VIN = 5.0 V
V. = 12 V
V" = 2.0 V I, = 1.0 A
V" = 2.0 V, I, = 1.0 A
V" = 2.0 V, Ie = 1.0 A
V = 2.0 V I = 1.0 A
0.5 Em to 0,5 E'"t
0.5 Em to 0.5 E'"t
1
1
2
2
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
5
5
5
5
-
limits
Max.
Min.
500
500
35
50
1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.75
1.35
1.55
1.75
1.95
4.3
9.6
1.8
5.2
3.1
2.0
11.5
6.5
1.0
1.5
Units
A
/LA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
V
V
V
V
JJ-~
JLS
ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES
TEST FIGURES
OPEN
VCE
D\\Il. NO.
Figure 1
OPEN
OPEN
10.350
O\IIG. NO. Aw 10, 3~9
Figure 2
OPEN
Figure 3
v,
OPEN
:><>----"~--o
OPEN
D'IIG. MO.
Figure ..
~973I4A
Figure'
Figure 5
Vs
OPEN
Figure 7
1)\oI(i,
NO. A-IO.J51
FigureS
NOTE: Diodes not applicable to Type ULS-2074H through ULS-2077H.
5-23
D
ULS·2064H THROUGH ULS-2077H
L2S AQUADDARUHGTORSWrTCflES
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
i4
12
UlS-2066167H
UlS-2076177H
~
V
1O
-~
~
~
a
V
~.
E
~
8
~E
~
•
;::
~
6
~
./
a:1'
~
~
./
~
",
",.
/
,\,<'i'\c~ ....
"Jo,
--------~
------
..------.--- ;:-.-
INPUT VOLTAGE - YIN
~
~
__ fl/lllJfI/IIIJ"'--
----------
~
A-ll,03~,
10
INPUT VOLTAGE - YIN
COLLECTOR CURRENT AS A FUNCTION
OF INPVT CURRENT
UlS-2064H thru UlS-2067H
UlS-2074H thru UlS-2077H
'.' 1-----1I-------j-----4-----+----l
~
~ 1.0 ----~-.~---+~~---+-----+-~
~.
a
e~ O.51--~~_1~---_+----_+----_+-~
,,
,/
/,
1.0
~
-------
0,
8
---
----"
2.0
'.0
INPUT CURRENT IN MILLIAMPERES - liN
5-24
Dwg
No. A-ll ,030
"
12
Dj,!G. fW. A-ll,034
ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
AT +50°C
~
;! J
.s0f--....T'....r--....,-..;,'\:'t
1.251---+-\-T+--"<;-t--+-..3oo,~--+--+~-I---+----i
20
30
5
PER CENT DUTY CYCLE
Owg. No. A-l1,031
AT +75°C
~
: ' 1.5 I-..,~.,_+_~
~
~
1.251---\-f\-4r1---i-i-3ioorl---+----t-:-+--t_--+-___i
~
~
I----t~~+~~-i--+-~~~--t--+--t_--+-___i
1.0
§ 0.75 I----t--~--"~I--".....:c_-+----t--+-"-t...=-+-___i
o 0.501----t--+--I--"....d
....=_:t_--+-___i
~
'-_±:-----t~-
u
~
~ I_~~~~~~~~~--+==::~~~;;=+::::~~
~ 0.251-
"<
60
70
AT +100°C
~
:'
~
o
1.5
1.25
'1\
'~
___ .:8J~'~AL~-"u~'::!. _____ _
10
20
30
40
SO
60
PER (tNT DUTY CYCLE
5--25
70
80
90
10.
~-lI.O])
100
D
SERIES ULS-2800H and ULQ-2800R
HIGH-VOLTAGE, HIGH~CURRENTDARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2800H and ULQ·2800R
HIGH·VOLTAGE, HIGH·CURRENT
DARLINGTON TRANSISTOR ARRAYS
FEATURES
•
•
•
•
•
•
•
TTL, OTL, PMOS, or CMOS Compatible Inputs
Peak Output Current to 600 mA
Transient Protected Outputs
Side-Brazed Hermetic Package, or
Cer-DIP Package
High-Reliability Screening Available
Wide Operating Temperature Ranges
DESIGNED for interfacing between low-level
logic circuitry and high-power loads, the Series ULS-2800H and ULQ-2800R arrays consist of
eight silicon NPN Darlington power drivers on a
common monolithic substrate. The choice of five
input characteristics, two output voltage ratings (50
or 95 V), two output current ratings (500 or
600 rnA), and two package styles (suffix 'H' or 'R ')
allow the circuit designer to select the optimum device for any specific application.
The side-brazed, hermetically sealed Series
ULS-2800H devices are rated for operation over the
temperature range of - 55°C to + 125°C, recommending them for military and aerospace applications. The cer-DIP, industrial grade hermetic Series
ULQ-2800R devices are rated for use over the operating temperature range of -40°C to +85°C, permitting their use in commercial and industrial applications where severe environmental conditions may be
encountered.
The appropriate specific part number for use in
standard logic applications can be determined from
the Device Type Number Designation chart. Note
that the high-voltage devices (BVCE "'95 V) are
available in the Series ULS-2800H only. All units
feature open collector outputs and integral diodes for
inductive load transient suppression.
All Series ULS-2800H Darlington power drivers
are furnished in an 18-pin side-brazed dual in-line
O"G.
~O.
A-IO.32?
hermetic package that meets the processing and environmental requirements of Military Standard
MIL-STD-883, Methods 5004 and 5005.
Device Type Number Designation
so V
so V
9S V
SOO mA
VCE{MAX) =
IC{MAX) =
SOO mA
General Purpose
PMOS, CMOS
ULQ-2801R
ULS-2801H
ULQ-2811R
ULS-2811H
ULS-2821H
14- 2S V
PMOS
ULQ-2802R
ULS-2802H
ULQ-2812R
ULS-2812H
ULS-2822H
SV
TIL, CMOS
ULQ-2803R
ULS-2803H
ULQ-2813R
ULS-2813H
ULS-2823H
6 - IS V
CMOS, PMOS
ULQ-2804R
ULS-2804H
ULQ-2814R
ULS-2814H
ULS-2824H
High Output
TIL
ULQ-280SR
ULS-280SH
ULQ-281SR
ULS-281SH
ULS-282SH
600 mA
Type Number
5-26
SERIES ULS-2BOOH and ULQ-2BOOR
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE (Series 2800', 2810*) .............................. 50 V
(Series UlS-2820H) ................................ 95 V
Input Voltage, VIN (Series 2802', 2803', 2804*) ......................... 30 V
(Series 2805*) ..................................... IS V
Peak Output Current, lOUT (Series 2800*, UlS-2820H) .................... 500 mA
(Series 2810*) ............................. 600 mA
Ground Terminal Current, IGNO ....................................... 3.0 A
Continuous Input Current, liN' ...................................... 25 mA
Power Dissipation, Po (one Darlington pair) ............................. 1.0 W
(total package) . : ........................... See Graphs
Operating Temperature Range, TA (Series UlS-2800H) ........... -WC to + 125°C
(Series UlQ-2800R) ............ -40°C to +85°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
PARTIAL SCHEMATICS
Series 2801'
(each driver)
..---I~_ COM
..--.-t----<>COM
7V
o
Series 2803'
(each driver)
Series 2802'
(each driver)
lQSK
.---.-t---oCOM
2.7K
i,
,,,
___ I
aWIi. Mo.
Series 2804*
(each driver)
DW(.i. Mo.
",)6~O
Series 2805'
(each driver)
.---.r---o COM
..--.r--<>COM
'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
foilowing part number description.
5--27
A-96!>1
SERIES ULS-2800H and ULQ-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARUNGTONTRANSISTOR ARRAYS
SERIES ULS·2800H and ULQ·2800R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Collector-Emitter
Saturation Voltage
Symbol
ICE,
VeE(SAT}
Applicable
Devices
All
2802'
2804'
All
Test Conditions
Min.
+25°C
Max.
Input Current
IIN(ONI
l"IOFfI
Input Voltage
V1N(ON)
2802'
2803'
2804*
2805*
All
2802*
2803*
Max.
Min.
Max.
Min.
Max.
2804*
Min.
Max.
2805'
D-C Forward Current
Tra nsfer Ratio
. Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode Leakage
Current
Clamp Diode Forward
Voltage
h"
2801 *
C,N
tPlH
tPHI
I,
All
All
All
All
V,
All
0.5 E" to 0.5 E",
0.5 E" to 0.5 E",
V, = 50 V
Fig. Min.
IA IB IB 2
2
2
2
2
2
2
2
2
3
480
3
650
240
3
3
650
3 ll80
4
25
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
500
2 1000
6
-
I, = 350 mA
7
Temp
Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C
Vcr = 50 V
VCl = 50 V, V,N = 6 V
VeE = 50 V, VIN = I V
Ie = 350 mA, I, = 850 pA
Ie = 200 mA, I, = 550 pA
Ie = 100 mA, I, = 350 pA
Ie = 350 mA, I, = 500 pA
Ie = 200 mA, I, = 350 pA
Ie = 100 mA, I, - 250 pA
Ie = 350 mA, I, = 500 pA
Ie = 200 mA, I, = 350 pA
Ie = 100 mA, I, = 250 pA
VIN = 17V
VIN = 3.85 V
Y'N = 5 V
V" = 12 V
V,. = 3 V.
Ie = 500 pA
VeE = 2 V, Ie = 300 mA
VeE = 2 V, Ie = 300 mA
VeE = 2 V, Ie = 200 mA
Ve = 2V, Ie = 250mA
VeE - 2V, Ie = 300mA
Ve'"( = 2 V, Ie = 200 mA
V" = 2V, I = 250 mA
Ve, = 2 V, Ie = 300 mA
V E= 2 V, Ie = 125 mA
VeE = 2 V, Ie = 200 mA
VeE - ZV, Ie - Z75mA
VeE = 2 V, Ie = 350 mA
V E= 2 V, Ie = 125 mA
VeE = 2 V, Ie = 200 mA
V" = 2 V, Ie = 275 mA
VeE - 2 V, Ie - 350 mA
V" = 2 V, I = 350 mA
VeE = 2 V, Ie = 350 mA
VeE = 2 V, I, = 350 mA
Vr., = 2 V, Ie = 350 mA
'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
Note I: All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2: The I'NIOff) current limit guarantees against partial turn-on of the output.
Note 3: The V'NIONI voltage limit guarantees a minimum output sink current per the specified test conditions.
5-28
-
Limits
Typ.
Max.
100
500
500
1.6
L8
1.3
1.5
l.l
1.3
1.25
1.6
l.l
1.3
0.9
l.l
l.b
1.3
l.l
850
930
350
1000
1500
50
15
250
250
-
1.7
T~
1.5
1.3
TIna
1350
500
1450
2400
18
Units
J1li..
pA
pA
V
V
V
V
V
V
V
V
V
pA
pA
pA
pA
/.i.A
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4
25
1000
1000
50
pA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
pF
ns
ns
pA
2.0
V
13
SERIES ULS-2800H and ULQ-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·281 OH and ULQ·281 OR
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Collector-Emitter
Saturation Voltage
Symbol
1m
VWSATI
Applicable
Devices
All
2812'
2814'
All
Test Conditions
Temp
I
Min.
+25°C
Max.
Input Current
I"(ONI
Input Voltage
I'N/OFF!
VIN(ONI
2812'
2813'
2814'
2815'
All
2812'
2813'
Max.
Min.
Max.
Min.
Max.
2814 •
Min.
Max.
2815'
Min.
Max.
D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode Leakage
Current
Clamp Diode Forward
Voltage
hfE
2811'
CIN
tPl.H
t,,,
I,
All
All
All
All
Vf
All
. Min.
+25°C
+25°C
+25°C
+25°C
VeE = 50 V
VCE ~ 50 V, VIN ~ 6 V
Vcf = 50 V, VIN = 1 V
Ie = 500 mA, 16 = 1100 /-LA
Ie ~ 350 mA, 16 ~ 850/-LA
Ie = 200 mA, I = 550/-LA
I = 500 mA, I = 600/-LA
Ie = 350 mA, I = 500/-LA
I = 200 mA, I = 350/-LA
I = 500 mA, I = 600p.,A
I = 350 mA I = 500/-LA
I = 200 mA I = 350/LA
VIII = lTV
VIN = 3.85 V
~= 5V
VIN = 12 V
V" = 3 V
Ie = 500 IJ,A
V" = 2 V, Ie = 500 mA
VCE ~ 2 V, Ie = 500 mA
Vn = 2 V, Ic = 250 mA
V" = 2 V, Ie = 300 mA
VCE = 2 V,~ = 500 mA
VCE = 2 V, Ic = 250 mA
V" = 2 V, Ie = 300 mA '
VCE = 2 V, Ic = 500 mA
Vef = 2 V, I = 275 mA
VCE = 2 V, I = 350 mA
VCE = 2 V, Ie = 500 mA
VCE = 2 V, Ic = 275 mA
V E= 2 V, I = 350 mA
V" = 2 V, I = 500 mA
V E = 2 V, Ic = 350 mA
Vr.f ~ 2 V, I ~ 500 mA
VCE = 2 V, Ic = 350 mA
VCE = 2 V, I = 500 mA
VCE = 2 V, I ~ 500 mA
VCE =2 V, I = 500 mA
Fig. Min.
lA
1B 1B 2
2
2
2
2
2
2
2
2
480
3
650
3
240
3
3
650
1180
3
4
25
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
450
2
900
-
0.5 E to 0.5 E
0.5 Em to 0.5 E"t
V, = 50 V
-
-
6
-
If = 350 mA
If = 500 mA
7
7
-
'Complete part number includes a prefix to indicate temperature range and asuffix to indicate package style. See
following part number description.
Note \, All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2, The I(NIOFf) current limit guarantees against partial turn-on of the output.
Note 3, The VINION) voltage limit guarantees a minimum output sink current per the specified test conditions.
5-29
Limits
Typ.
-
1.8
1.6
1.3
1.7
1.25
1.1
1.8
1.6
1.3
850
930
350
1000
1500
50
-
-
-
-
-
-
15
250
250
1.7
-
Max.
100
500
500
2.1
1.8
1.5
1.9
1.6
1.3
2.1
1.8
1.5
1300
1350
500
1450
2400
-
Units
/-LA
/-LA
/-LA
V
V
V
V
V
V
V
V
V
/-LA
/-LA
/-LA
/-LA
/LA
IJ,A
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
23.5
17
3.6
3.9
6.0
2.7
3.0
3.5
10
12
17
7.0
8.0
9.5
3.0
3.5
2.4
2.6
-
-
-
-
25
1000
1000
50
pF
ns
ns
/-LA
2.0
2.5
V
V
II
SERIES ULS-2800H and UlQ-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
SERIES ULS·2820H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Collector-Emitter
Saturation Voltage
Symbol
1m
VCl(SATI
Applicable
Devices
All
2822H
2824H
All
Test Conditions
Temp
Min.
+25°C
Max.
Input Current
I'NION'
Input Voltage
lIN OFF
V'NION )
2822H
2823H
2824H
28"5H
All
2822H
2823H
Max.
Min.
Max.
Min.
Max.
2824H
Min.
Max.
2825H
D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
IClamp Diode Leakage
Current
Clamp Diode Forward
Voltage
hFE
2821H
CIN
tPlH
t pHl •
IR
All
All
All
All
VF
All
Min.
Max.
Min.
+Z5°C
+25°C
+25°C
+25°C
Vel = 95V
Vel = 95 V. VIN = 6 V
Vel = 95 V, VIN = I V
Ie = 350 mA, I, = 850 J1A
Ie - "00 mA, I, - JJO !J.A
Ie - luO mA, I, - 350 J1A
Ie = 350 mA, I, = 500 J1A
Ie = 200 mA, I, = 350 J1A
Ie - 100 mA, I, - 250 J1A
Ie = 350 mA, I, = 500 J1A
Ie - 200 mA, I, - 350 J1A
Ie - 100 mA, 18 - 250 J1A
VIN = 17 V
VIN = 3.85 V
VIN = 5 V
VIN = 12 V
VIN - 3 V
Ie - 500 J1A
VCE = 2 V, Ie = 300 mA
VeE - 2 V, Ie - 300 mA
VeE = 2 V, Ie = 200 mA
VeE = 2 V, Ie = 250 mA
VeE - 2 V, Ie - 300 mA
VeE - "V, Ie - 200mA
VeE = 2 V, Ie = 250 mA
VeE = 2V, Ie = 300mA
VeE = 2 V, Ie = 125 mA
VeE - 2 V, Ie - 200 mA
VeE - "V, Ie - ZiJ mA
VeE = 2 V, Ie = 350 mA
VCE = 2 V,le = 125 mA
VeE - 2 V, Ie = 200 mA
VeE = 2 V, Ie = 275 mA
VeE - 2V, Ie ~ 350 mA
VeE = 2 V, Ie = 350 mA
VeE = 2 V, Ie = 350 mA
VC[ - 2 V, Ie - 350 mA
VeE - 2 V, Ie - 35D mA
Fig.
IA
IB
IB
2
"
2
2
2
2
2
2
2
3
3
3
3
3
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2
Min.
-
Limits
Typ.
-
1.6
-
1.3
1.1
-
1.25
1.6
-
1.1
-
0.9
1.6
1.3
1.1
480
650
240
650
1180
25
-
-
-
1.3
1.1
850
930
350
1000
1500
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5 E," to 0.5 Eool
0.5 E," to 0.5 Eoo ,
VR = 95 V
-
-
15
250
250
6
-
-
IF
7
-
17
=
350 mA
Note L All Ii mits stated apply to the complete Darlington series except as specified for a single device type.
Note 2, The l"IOFf} current limit guarantees against partial turn-on of the output.
Note 3, The VINION) voltage limit guarantees a minimum output sink current per the specified test conditions.
5-30
Max.
100
500
500
1.8
1.5
500
1000
1.3
1.8
1.5
1.3
1300
1350
500
1450
2400
18
13
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4
25
1000
1000
50
2.0
Units
J1A
J1A
J1A
V
V
V
V
V
V
V
V
V
J1A
J1A
J1A
J1A
J1A
J1A
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
pF
ns
ns
J1A
V
SERIES ULS-2800Hand ULQ-2800R
HIGH"VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
TEST FIGURES
OPEN
VeE
OPEN
VeE
OP£N
FIGURE lA
FIGURE lB
OPEN
OPEN
~~_-ClOPEN
DWG. MO. A-S7l2
FIGURE 3
OP£N
D'f«i~
FIGURE:. 4
NO.
","973~A
FIGURE 5
""". 110. ~973-'jA
FIGURE .6
FIGURE 7
5-31
D
SERIES ULS-2800Hai'ld ULQ-2800R
HiGH-VOlTAGE, HIGH~CURRENT DARLINGTON TRANSI$TOR ARRAYS
SERIES ULS·2800H
PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE
AT +50"C
AT +75°C
WOr---r---~--~--'---'---'----.---r---r--.,
z
~
a
82"'t:::J::::t:::J~::~~r:::~~~~§!~~~~
~
o
U
NUMBER OF OUTPUTS
CONDUCTING
o SIMULTANEOUSLY
NUMBfR OF OUTPUTS
~
-
20
40
PER CENT DUTY CYCLE
CONDUCTING
0 SIMULTANEOUSLY
o
100
20
40
PER CENT DUTY CYCLE
OWG.II0.A-IO.876
AT + 100"C
BO
100
ilMO.NO.A--IO.1376
AT + 125°C
0E
600
+
~::;
::>
u
g200 I--+--+----'~~~~~F." .....=,---'IP"-.j.;;;=+---!
u
o
0
u
~
8 200
~
~
~
~
o
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
PER CENT DUTY CYCLE
«
"
it
W
40
PER CENT DUTY CYCLE
A-Io.sn
5-32
80
1lII\i. NO. A-IO.37S
100
SERIES ULS-2800Hand ULQ-2800R
HIGH-VOLTAGE, HIGH-(URRENIDARLINGTON TRANSISTOR ARRAYS
SERIES ULQ·2800R
PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE
AT +50°C
AT +75°C
NUMBER OF OUTPUTS
CONDUCTING
o
SIMULTAN
LV
40
60
8.
100
40
PER CENT DUTY CYCLE
P~R
ALLOWABLE PACKAGE POWER DISSIPATION
SERIES ULS-2800H and ULQ-2800R
5
~
1=
"z'"
2.
0\
~~
~
"'
-
u
I
0,200
~
I
o
"//(~
.. I:.
o
~t»:
,>
..
~I
b-
I
.'. .
./
I
./
/
l ./
ou
0{
E .•
,.
,"
I
MAX1MWM REQUIRED
:" iN'PUT .C()~RENT '.
.
",,'
0
0.5
600
l~P\)TpJ.RRENT}N·.i"'"liN
4
,
\.0
,,>'<'
2.0
1.5
S'ATURATlON VOLTAGE - VeE (SAl)
~.kO.'''':'IO.872A
M. MO.
SERIESULS.i2800H and U.LQ·2800R
PART NUMBERING SYSTEM
l
UL
~
" ~~
,. 'fl'
.....
~
.
...'<'
.,4 ~ .::;.0
V-
,. Ailtl.
/
I
~400
~
~
"
',1'0"-I!V"" ","
:
H - MIL
L
INSTRUCTIONS,
. .......
. .
.:. MIL = MILITARY GRADE WITH SCREENING TO
MIL-STD"883, CLASS B
PACKAGE DESIGNATION,
C=
H=
A=
R.=
UNPACKAGED CHIP.
GLASS/METAL HERMETIC, DUAL IN-LINE
PLASTIC, DUAL IN-LINE
CERAMIC/GLASS HERMETIC, DUAL IN-LINE
DEVICE INPUT CHARACTERISTICS
1 = GENERAL PURPOSE PMOS/CMOS
2== 14·25 VPMOS
.
3.= 5 V TTL/CMOS'
4 = 6-15 V CMOS/PMOS
5 = HIGH-OUTPUT TTL .
DEVICE .OUTPUT CHARACTERISTICS
o = 50V AND 500 rnA MAXIMUM
1 = 50 V AND 60a rnA MAXIMUM
2 = 95 VAND 500mA MAXIMUM (PACKAGE H ORA ONLY)
1..-__.......:... DEVICE TYPE NUMBER (4 DIGITS IN 2800 SERIES)
OPERATING AMBIENT TEMPERATURE RANGE,
N = COMMERCIAL (-20°C TO +85''C)
Q = EXTENDED (-40°C TO +85°C)
S = FULL MILITARY (-55°C TO + 125°C)
FAMILY,
5-34
A-97S~B
SERIES ULS-2800H and ULQ-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
SERIES 2803*
SERIES 2802'
25
2.0
2.0
-"
1c
1.5
i
z
0
u
~
10
0.5
0
0
5
2.0
INf'UT VOLTAGE -'Y IN
II
SERIES 2805*
3.5
r--,---....--,---,--.r--,
SERIES 2804*
3.0 r--+--+--t---,~'?--i
z
2.5~-4---+_-~~~~-i
~
i
2.0
f--+---+
~
1.5
~-4--,jf'f~.",..~W'<'lli~-i
"
"JWM""'''''':'I<\--l
v
O.5r-f~~+20
INPUT VOLTAGE - v lN
OLI.-5-2~.LO--2~.-5-~3L.0-~3L.5--4~.0
INPUT vOLTAGE - VIN
DWl>. NO.
*Complete part number includes a prefix to indicate temperature range and a suffix to indicate package
style. See previous part number description.
5-35
A-IO.87~
UDQ-2956R and UDQ-2957R
HIGH-VOlTAGE, HtGH-CURRENT SOURCE DRIVERS
UDQ.2956R and UDQ·2957R
HIGH·YOLTAGE, HIGH·CURRENT SOURCE DRIYERS
EACH OF THESE SOURCE-DRIVER
arrays has five NPN Darlington-pair outputs
and five PNP common-base inputs controlled by
a single ENABLE stage.
Types UDQ-2956R and UDQ-2957R are
typically used to switch the ground ends of loads
such as telephone relays, PIN diodes, LEDs and
similar devices directly connected to negative
supplies. Internal transient-suppression diodes
allow use of the drivers with inductive loads.
Each output stage of both integrated circuits
will withstand output OFF voltages of - 80 V
and load currents as high as - 500 rnA. Under
normal operating conditions, the five drivers will
simultaneously handle load currents of - 170
rnA at ambient temperatures of up to + 70°C.
Type UDQ-2956R is designed for use with
PMOS or CMOS logic input levels operating
with supply voltages of 6 V to 16 V. Type UDQ2957R has input current-limiting resistors that
permit its operation with TTL, Schottky TTL,
DTL and 5 V CMOS.
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
(reference pin 7)
Both devices are supplied in industrial-grade,
hermetically sealed 14-pin dual in-line ceramic
packages rated for use over the temperature
range of - 40°C to + 85°C. Input connections
are on one side of the packages, output connections on the other, to simplify applications
designs.
Supply Voltage, VEE ......................... -SO V
Input Voltage, V1N (UDQ-2956R) ................ +20 V
(UDQ-2957R) • . ............... + 10 V
Output Current, louT ....................... -500 rnA
Power Dissipation, PD (anyone driver) ............. 1.0 W
(total package) ........... 1.67 W'
Operating Temperature Range, TA ....... -40°C to +S5°C
Storage Temperature Range, Ts ........ -65°C to + 150°C
The substrate oj Type UDQ-2956R and Type
UDQ-2957R should be tied to the most negative
supply available in order to maintain isolation
between drivers.
"'Derate at the rate of 13.3 mW/oC. above +25°C.
5-36
UDQ-29S6R and UDQ-29S7R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current
Symbol
ICEX
Applicable
Devices
UDQ-Z956R
Temp.
Test Conditions
VIN
= VENABlE = 0.4 V, VOUT = -80 V
vlN - 0.4 V, VENABlE - 15 v, VOUT UDQ-Z957R
Collector-Emitter
Saturation Voltage
VWSAT)
UDQ-Z956R
-40°C
VIN
V,.
V,.
V,.
VIN
vlN
+Z5°C
V,.
V,.
vlN
v,.
+85°C
UDQ-Z957R
-40°C
+Z5°C
+85°C
Input Current
1'.(0.1
V,. = 6.0 V, VOUT = -Z.O V
V,. - 15 V, VOOT - -Z.O V
VIN - 2.4 V, VOUT ...: -2.0 V
VIN - j.H!> v, vmrr - -LU
loUT = -500 !LA
UDQ-Z956R
UIJU-29SIH
I,.(OF~
Output Source Current
ALL
I,
ALL
VIN = 5.0 V, VOUT =
V,. - 6.0 V, VOUT VIN - 7.0 V, VOUT V,. - 8.0 V, VOUT V,. - 9.0 V, VOUT V,. - 5.0 V, VOUl V,. = 6.0 V, VOUT =
VIN - ':0 V, VOUT V,. - 8.0 V, VOUT V,. - 9.0 V, Va T VIN = Z.4 V, VOUT =
V,. = Z.7 V, VOUT =
V,. - 3.U V, VOUT V,. - 3.3 V, VOUT V,. - 3.6 V, VOUT V,. - Z.4 V, VOUT V,. - Z./ v, VOUT V,. - j.O V, VOUT V,. - 3.3 Y, VOUT V,. - 3.6 V, VOUT V, - 80 V
V,
ALL
I,
10•
ALL
ALL
0.5 E,• to 0.5 EouT, R, - 400 H CT - Z5 pF
0.5 EIN to 0.5 EouT. Rl - 400 n CT - Z5 pF
lOUT
UDQ-Z956R
-40°C
+85°C
UDQ-Z957R
-40°C
+85°C
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
Turn-On Delay
I urn-un Delay
V,.
V,.
V,.
VIN
V,.
VIN
V,.
V,.
VIN
V,.
V,.
V,.
-HOV
15 V, VENABlE - 0.4 V, VOUT - -80 V
VENABLE - 0.4 V, VOUT - -80 V
0.4 V, VE•.,LE - 3.85 V, VOUT - -80 V
3.85 V, VENABlE - 0.4 V, Vour - -80 V
= 6.0 V, louT = -100 rnA
- /.U V, louT - -110 rnA
- 10 V, louT - -350 rnA
- 6.0 V, lour - -100 rnA
- I.U v, louT - 175 rnA
- IU V, lOUT - -j5U rnA
= 6.0 V, lOUT = -100 rnA
- 7.0 V, lOUT - -175 rnA
- 10 V, lOOT - -350 rnA
- Z,4 V, lOUT - -100 rnA
- Z.7 V, loUT - -175 rnA
-joU rnA
~ 3.9 V, lOOT - Z.4 V, lOUT - -100 rnA
- 2.7 V, lOUT - -115 rnA
- .3.9 V, lOUT - -350 rnA
- Z.4 V, lOOT - -100 rnA
- Z.7 V, loUT - -175 rnA
= 3. 9 V, lOUT = -350 rnA
-
-Z.O V
-Z.O V
-Z.O V
-Z.O V
Z.O V
-2.0 V
-Z.O V
-Z.O V
-Z.O V
-2.0 V
-Z.O V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
-Z.O V
-Z.U v
-2,0 V
-2.u V
-2.0 V
= 350 rnA
Limit
-ZOO j.LA Max.
- ZUU!LA Max.
-ZOOj.LA Max.
- ZOO !LA Max.
- ZOO !LA Max.
ZOO !LA Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
-1.Z0 V Max.
1.35 V Max.
1.70 V Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
-1.40 V Max.
-1.55 V Max.
1.90 V Max.
-1.Z0 V Max.
-1.35 V Max.
-1.70 V Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
0.8 rnA Max.
2.25 rnA Max.
1.0 rnA Max.
z.umA Max.
50 !LA Min.
-75 rnA Min.
-lZ5 rnA Min.
-175 rnA Min.
-Z50 rnA Min.
·300 rnA Min.
-125 rnA Min.
-zOO rnA Min.
-200mAMIn.
-300 rnA Min.
-350 rnA Min.
-50 rnA Min.
-125 rnA Min.
-200 rnA Min.
-250 rnA Min.
-300 rnA Min.
-IZ5 rnA Min.
-ZUU rnA Min.
-250 mAMIn.
-300 rnA Min.
-350 rnA Min.
50j.LA Max,
2.0 V Max.
,
IOff
5-37
4.Uj.LS Max.
IU j.LS Max.
II
UDQ-29S6R and UDQ-29S7R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
r--------,
PARTIAL SCHEMATIC
I
INPUT
1
R'" 10,5 kn. for UDO-2956R
R '" 2.5 Iv.. for UDQ-2957R
I
ENA8LE
OUTPUT
SUBSTRATE
8 1 } - - - - - " ? - - - - - . ! . - - 4 -_ _ _ _- ; ._ __
L __________ ..J
SUB
Dwg. No. A-ll,047A
ALLOWABLE PEAK OUTPUT CURRENT
AS A FUNCTION OF DUTY CYCLE
-100 t___+-_+_~+_-t--+-+_-t___+-_+_-__1
80
Dwg
90
100
rio_ fI-ll,046
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
at TA = +25 0 C
1.5
2.0
V
.J~
IUDQ-2956R I
-
15 l.0
.",.
'"
:::>
'"
u
,/
>:::>
./
0.5
"."
0.25
5
,.;'
.,.V
".
6
7
'"
8
V ,'" ~
~
I'"
V
'"
u
.,V
9
l.0
~
>-
>-
MAX';
0.5
iii:
z
10
11
INPUT VOLTAGE IN VOLTS
12
1
4
YP ,..
~
/"
IUDQ-2957RI
./
1.5
<>~
./
./
V
/ ' ."..."..........
",-
~
i--"
,.,-
o
15
2.0
2.5
3.0
INPUT VOLTAGE IN VOLTS
Dwg. No. A-11,044A
5--38
3.5
4.0
DW9. No. A-ll,04SA
SERIES UDS-2980HHERMETICALLY SEALED
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
SERIES UDS·2980H HERMETICALLY SEALED
HIGH·VOL TAGE, HIGH·CURRENT SOURCE DRIVERS
FEATURES:
• TTL, DTt.. PMOS or CMOS Compatible Inputs
• -500 rnA Output Source Current Capability
.Transient-Protected Outputs
• High-Reliability Screening to MIL-STD-883, Class B
• Operating Temperature -55°C to +125°C
UDS-2980H HERMETICALL Y
S. ERIES
SEALED source drivers interface between
standard low-power digital logic, and relays, solenoids, stepping motors, LEDs, lamps, etc., in applications requiring separate logic and load grounds,
load 'SUpply voltages to +80V, and lor load currents
to 500 rilA.
II
Under normal operating conditions the~e devices
Will sustain 50 rnA continuously on each of the eight·
outputs, at.an ambient tempen¢ureof 85°C, witha
supply of + 15 V. All four devices incorporate inJlUt
current limiting resistors and ,output .suppression diodes.
DDS-2981H and UDS~2983Hdrivers. are intend~ for use with + 5 .V logic systems (T'I'L,
Schottky TIL: DTL'and5 V CMOS). UDS~2982H
and UDS,2984H drivers are intended for MOS
inteiface(pMOS and CMOS) operating from supply
voltages Of from +6 to +.16 V.
UDS-2981H and UDS-2982H drivers will sustain
it maximUIlloutput OFF voltage of +50 V;UDS2983H .andUDS-2984H drivers. a maximum output
OFF voltage of + 80 V.
'. In' all cases the output is switched ON by an active
hlgh)nput level.
Note.tlmi the maximum .current rating may not be
obtained at .-55°C because' of beta fall-off,. or:' at
+125°C because of package power .limitations . .
+
Series UDS-2980H drivers are furnished in
18-pin hermetic dual-in-line packages, and are
processed. to the requirements of MIL-STD-883,
Methods 5004 and 5005.
ABSOLUTE MAXIMUM RATINGS
afTA == +25.°C
Outputvoltage Range, VCE
(UDS~2981H & UDS-2982H) ............. + 5 to + 50 V
(UDS-2983H& UDS-2984Hl ............ +35 to +80 V
Input' Voltage, VIN (U[)S~2981H & UDS:2983Hl ....... + 15 V
(UDSc2982H & UDS-2984H) . . . . . .. + 30 V
Output Current, lOUT .............,.: ...•.... -sOQmA
Power Di$~pation, PD (any ane driver) ........ : . . .. 1.1 W
(total package). . •. ... . • . . . . . . 1.67W·
Operating Temperature Range, T" ... : ... -'55°0 to' +125°C
Storage Temperature Range, Ts ......•. -65°C to '+ 150°C
"Derate .at 13.3ml'l/?C above 25°C.
5-39
SERIES UDS·2980H HERMETICALLY SEAlED
-HIGH;VOL1'AGE; HIGH·-CURRENT SOURCE DRIVERS
v,
ONE OF EIGHT DRIVERS
2983/2984 ONLY
3K
OUTPUT
DWG.NO. A-ll.130B
ELECTRICAL CHARACTERISTICS from -55°C to +125°C (unless otherwise specified)
Characteristic
Output Leakage
Current
Symbol
Collector-Emitter
Saturation Voltage
VCE(SAn
ICEl
,
Applicable
Devices
UDS-2981/82H
UD5-2983184H
Temp.
-55"C
UDS-2981/83H
+25°C
+125°C
.', UDS-2982/84H
-55°C
+25"C
+125"C
Input Current
IIJi(ONI
UDS-2981/83H
UD5-2982/84H
IIN(Om
" ,UDS-2981/82H
UDS-2983/84H
Test Conditions
Fig.
VIN = 0.25 V·, Vs = 50 V
VIJi - 0.25V*, Vs - 80V
1
1
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
2
2.4 V, lOUT = -100 mA
l.4 V, lOUT
"lUU mA
2.4 V, lour - -350 mA
2.4 V, loUT - -100 mA
2.4 v, lOUT - -200 mA"
5.0 V, lour = -100 mA
5.0 V, lour~ -200 mA
5.0 V, loUT - -350 mA
5.0 V, lOUT = -100 mA
5.0 V, lOUT = -200 mA··
2.4 V
= 3.85 V
= 5.0 V
~IN ='12,V
'l.
2.0 V Max.
Max.
2.0 V Max.
1.8 V Max.
UI v Max.
2
2
2
2
2
2.o.V Max.
2.1 V Max.
2.0 V Max.
1.8 V Max.
1.9 V Max.
3
3
3
3
575 /LA- Max.,
1.26 rnA Max.
640/LA Max.
1.8 mA Max.
VIN.=;OV, Vs = 50V
VIN = OV, Vs = 80V
3
3
10 p.A Max.
10 /LA Max.
2
2,
-200mA Min.
-200 mAMin
4
4
4
4
10
10
10
10
5
5
50 /LA Max.
50 /LA Max.
S
1.75 V Max.
=
,:"
=
=
=
Output Sou rce
Current
lour
UDS-2'981/83H
UDS-2982/84H
Supply Current,
(outputs Open)
Is
UQS-2981H
UDS-2982H
UDS-2983H
UDS-2984H
Clamp Diode
Leakage Current
IR
UDS-2981/82H
UDS-2983/84H
V. = 2.4 V, VCE = 2.2 V
V" - 5.0 V, VCE - 2.2V
VI = 2.4 V·, V, = 50 V
VIN ,::- 5.0 V*, Vs - 50 V
VIN - 2.4 V*, V. = 80 V
VIN = 5.0 V·, Vs = 80 V
Vs - 50 V (All Inputs VIN - 0.25 V}
VS - 8U V (All Inputs VIN - U.25 V)
Clamp Diode
Forward Voltage
VF
ALL
IF
,
+25°C
"All inputs simultaneously.
•• Pu Ised test.
5-40
Limit
200 p.A Max.
200 /LA Max.
= 200 mA
l
2
2
l.r v
I)lA Mllx.
mA Max.
mA ,Max.
mA Max.
SERIES UDS-2980H HERMETICALLY SEALED
HIGH-VOLTAGEt HIGH-CURRENT SOURCE DRIVERS
TEST F'IGURES
DIAG. NO.A-1J,083
DWG.NO. A-ll.084
Figure 1
Figure 2
vs
o
OPEN
DWG. NO. A-ll,086
OWG. NO. A-II,08S
Figure 3
Figure 4
OPEN
owe;.
DIIVG. NO. A-1l,08?
Figure 5
NO. A-l1,08B
Figurjl 6
5-41
>
SERIES UDS-2980H HERMETICALLY SEALED
HIGH"VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
UDS-2981/82H
UDS·2981/82H
..--~--~~~
~350r-~--~~~~~~
~350r-~"~~r--~--~~--~--~~--.,
::':300r--+-+--~H:-l\;--T---t-->"'I:--t--t---l
z
tz
~ 250 Vs
=
15V
TA
=
50°C
a
~300r--+~~~~-+~-t----t~~--t--t~
15
r--I'~~-IL-~..--t-- ;'~t--
""a250r--t--~~~~'-~~--r~~~~
~200r--+--~~~~~~~~~~t--t~
t;
~200~~-~-r-~~~~~~~~-t--
t;
~ ISO
o
~150r--+-+---r--+--~~~~~~~~
u
o
u
~ 100
~Ioot==~~~~~~~~~t:~~~~~~
~
~ 50
~ 50r--+-+-~--r-t--t-~-r--t~
c(
c(
~ O~~
__~~~~_-;;;--~;--~---;~~~
0
~ °0~~;--~~,-~-.~-t,;--~70o-'~~~9~0~100
c(
c(
PER CENT DUTY CYCLE
DWG. NO. A-ll,078
D~JG.
ALL DEVICES
c(
NO. A-ll,076
ALL DEVICES
~ 350r-~~~"r--~--~~--~--r-~--"
~350r--r--~~-,~~~~--~--~~~
z
~300r--+--t-'\-\lT+--'r-t-'ct---r--r~
a~250r--+-+-~~~~t-~~~-T~-+~
~
t;
200
~150r-~-+-~---r~~~~~-~~~~
o
u
~ 100
c..
~50t--t-+-~---+--t--+--+--t--t~
c(
~ 0:;--7,;--~~;---1;;~-;;;--~;--*---;~~~
0
c(
PER CENT DUTY CYCLE
DWG. NO. A-ll,079
DWG. NO. A-ILoao
UDS·2983!84H
UDS·2983/84H
~ 35or-""--"'II''I'''I'Mt'''''T'~''I''''''If'''''r--...,._~..,...,..,
::':
§ 300~-+~~~~~--+-~~-r--r--+---I
""a250~-+~~~-~~~---t--~..-r--+---I
~ ~--r-~~~~~---P~-t----t-~~
15
""~
u
25
§""
2~-t--+--~~~~~d-~~-+-~~
~
8 15'Uf---I--+--+--+~~nk::-f""'d----"""""::-i
""~
""~IOOr--+--+-~~~~~~~~~~~~
1
~
'"
c(
~
c(
~
90 100
PER CENT DUTY CYCLE
DWG. NO. A-ll,077
DWG.
5-42
rw. A-U.D8l
SERIES UDS-2980H HERMETICALLY SEALED
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPE UDS-2982/84H
INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPE UDS-2981!83H
1. 25
1.00
UDS-2981183H
;;:
.§
z
0. 75
0.5 0
~
00-
.§
z
!Z
~
a....
0.2 5
Z
o
l.0
2.0
l. 5
UDS-2982/84H
l.
:::>
Q.
0
3.0
/
;;:
/
/
....
::>
:::
2.
I-
2S
'"'"u::>
I
if
2. 5
4.0
5.0
.5
6.0
, V
/'
V /
~
4
6
8
I NPUT VOLTAGE (VOLTS)
I NPUT VOLTAGE (VOLTS)
OWG. NO.
~
A~1l,074
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE
TEMPERATURE IN
°c
DWG. NO. ,A-ll,082
5-43
W
12
SERIES UDS.3600H
'DlIAl-1-fNPU'fcPERIPHfRAlal'ld POWER· DRIVfRS
SERIES UDS-3600H DUAL 2-INPUT
PERIPHERAL and POWER DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•
•
UDS-3611H
Four Logic Types
DTUTTUPMOS/CMOS Compatible Inputs
Low Input Current
Sustaining Voltage pf 80 V
Hermetically Sealed Package
High-Reliability Screening to MIL-STD-883, Class B
Description
These "mini-DIP" dual 2-input peripheral and power drivers are
bi-polar monolithic integrated circuits incorporating AND, NAND, OR,
or NOR logic gates, and high-current switching transistors on the same
chip. The two output transistors are capable of simultaneously sinking
250 rnA continuously at an ambient temperature of +75°C. In the OFF
state, these drivers will sustain at least .80 V.
UDS·3612H
Applications
The Series UDS-3600H dual drivers are ideally suited for interface
between low-level or high-level logic and high-currentlhigh-voltage
loads. Typical applications inclildedriving peripheral loads such as
incandescent lamps, light-emitting diodes, memories, and heaters.
With appropriate external diode transient suppression, the Series
UDS-3600H drivers can also be used with inductive loads such as relays,
solenoids, and stepping motors.
DWG.110. A-9795
UDS·3613H
ABSOLUTE
MAXI~UM
RATINGS
Supply Voltage, Vee ............................................. 7.0 V
Input Voltage, Vln • • • • • • • • • • • • • • • • • • • • • • • • , • • • • • • • • • • • • • • • • • • • • • • 30 V
Output Off-State Voltage, Voff ...................................... 80 V
Output On-State Sink Current, Ion ...............................•. 600 rnA
Power Dissipation, PD (one output) .................... , ............. 1.0 W
(total package) ............................ See Graph
Ambient Temperature Range (operating), TA ................. -55°C to + I25°C
Storage Temperature Range, Ts .......................... -65°C to + ISO°C
5---44
UDS·3614H
SERIES UDS·3600H
DUAL2·INPUT PERIPHERAL and POWER DRIVERS
PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
TEMPERATURE IN
°c
DWG. MO. A-IO.978
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vcc )
Operating Temperature Range
Current into any output (ON state)
Min.
Nom.
Max.
Units
4.5
-55
5.0
+25
5.5
V
°C
+125
300
II
mA
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Symbol Temp.
"1" Input Voltage
"0" Input Voltage
Vi nil)
VinlQ)
Vcc
MIN
MIN
"0" Input Current
linlO)
MAX
"1" Input Current
linll)
V,
MAX
Input Clamp Voltage
Driven
Input
Output
Min.
Typ.
Max.
Units
2.0
=
5.DY, TA
=
Notes
V
0.4 V 30 V
30V
OV
-,12 mA
MIN
SWITCHING CHARACTERISTICS at Yee
Limits
Other
Input
0.7
100
10
-1.5
50
V
/LA
/LA
V
2
2
25°C
Limits
Characteristic
Turn-on Delay Time
Symbol
Turn-off Delay Time
tpd )
tpdQ
Test Conditions
Vs = 70 V, Rl = 465
Cl = 15 pF
Vs = 70 V, Rl = 465
Cl = 15 pF
Min.
Typ.
Max.
-
200
500
Units
ns
Notes
n (10 Watts)
n (10 Watts)
-
300
750
ns
3
NOTES:
I. Typical values are at Vcc = 5.0V, TA = 25°C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.
5-45
VinlO) = OV
Vinll ) ~ 3.5V
INPUT PULSE CHARACTERISTICS
tf = 7ns
t,
=
14"s
3
tp
PRR
= IlLS
=
500kHz
SERIES UDS·S69QH
DUAL2~lNPUt'PIRIPHERALand
POWER DRIVERS
Type UDS.. 3611 H Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"I" output Reverse Current loff
"0" Output Voltage
Von
"I" Level SUpply Current
Icem
Icc(ol
"a" teve.l$upply Current
Temp.
Vee
MIN
OPEN
MIN
MIN
MAX
MAX
NOM
NOM
Limits
Test Conditions
Driven Other
Input Input
2.0V 2.0V
2.0V
2.0 V
O.SV Vee
Q.SV Vee
5.0 V 5.0V
OV
OV
Output
SOV
SOV
150 rnA
300 rnA
Typ.
Min.
Max.
100
100
0.5
O.S
12
0.4
0.6
8.0
35
49
Units
Notes
JJ-A
JJ-A
V
V
rnA
rnA
1,2
I, 2
OIJ·TINPUT 2.4V VCC=5V
PUTriV~ -
- _,
INPUT
,
Rl
I
F:.:::...----Vin(O)
I
I
,
,,
,
I
I
-I
-------,'
I
I
'pdO
5~L::::~
OUTPUT
I
CIRCUIT I
,,------~
.
DwG. Mo. A-7628C
I)'·'G. NO. A-7816D
,TypeUDS-3612H Dual NAND Driver
ELECTRIC.AL CKARACTERISTICS over operating temperature range'(unless otherwise noted)
Charact~istiC' ,.
Symbol
"1"OUlllutfteve.rse Current loff
Temp.
Vee
MIN
OPEN
MIN
MIN
MAX
MAX
....
, "0" Output Voltage '.'
.
"I" Level Supply Current
"0" Level Supply Current
,Von ,
'l ecUl .;
ICe(OI
NOM
NOM
Test Conditions
Driven Other
Input Input
O.SV Vee
O:SV Vee
2.0V' '·2.a,V
2.0 V 2,OV
OV
OV'
5.0V
5.0V
Limits
Output Min.
SOV
SOV
150 rnA
.300 mA
Typ,'
Max:
lOa
Units
Notes
JJ-A
JJ-A
V
,V
mA
rnA
1,2
1, 2
100
0,4
0.6
12
40
0:5.'
,
0.8
15
53
OUT-
INPUT' 2.4V
PUT Vs
r - - -7'';'',
"RL
I
"
I
-uI"'-_ _ _ _
I
I.(
. 15Pi"
'pdO
:
i No te3j ,I
,.
!.,,:"
I
v'n(OI
I
I
:
I
I
lOAD
OUTPUT
:
'-------.I...: - -
CIRCUIT"
"._ ... _._ ... ~.J
~'c - -
Vou'(O)
DIIG."NO. A...1900A
DIfG. No} ),-!l638
NOTES:
I. Typical varues are at Vee =
5.0 V, TA =25'(;.
2. Per package.
3. Capacitance valUes specified include probe and test fiXture capacitance ..
5-,.-46
'
"
SEIIES UDS-3600H
DUAL 2-INPUT PERIPHERAL and POWER DRIVERS
Type UDS-3613H Dual OR Driver
ELECTRICAL CHARACTERISTICS over operathtg temperature rlmge(ilnlessotherwise noted)
Characteristic
Symbol
"I" Output Reverse Current loff
"0" Output Voltage
"IW Level Supply Current
"0", Level Supply Current
Test GQridition~
Driven other
'v'CC'
I"put " ,Il)p"f
MIN, 2.0 V OV
OPEN 2.0 V OV
MIN
D.SV O.SV
MIN
O.SV O.SV
MAX
5.0 V S.DV
MAX
OV
OV
Temp.
Von
I' ,
ICC(1}
ICeIO)
NOM
NOM
,Limits
, ,OiqPut
Va;<;,V,
r ____ '
Rl
10%: __
I
I
I
I
I
:
ISpF
1
I 1(Note 3)
Max.
100
100
0.5
Units
p.A
}LA
O.S
V
' rnA,
rnA
V
13
50
l.2
1,2
-.j J-- If
I,
90%1' ---------v;nll)
90%
50%
50%'
I
--...j
,
I
_ _ Ip
10%
V;n(O)
I
o
'L'
:
.". :J LOA~
Notes
'~I ~'I IpdO
,
Ir _ _ _
-" .-'...,/-.- - ... -Vout(l)
,I
I
i-
i
INPUT
:
0.6
S.O
36
-t
Vs
PUT
Typ.
0.4
t'
OUT~
INPUT
~Min.
c
SOV
SOV
ISO rnA
300 mA
O_U...;,T_PU_r'______,...../5o% ."
•
:
IL _____
CIRCUIT J I
'50%
' ' '
Vo.,IO)
OWG. 110. l-7$28.C
1W(j, 110. /4-78718
Type UDS:"~614f:1,Dual NOR Driver "
",
;;.: '{'<'r"
,,;,",.:,.-
'.
'c'
, " .,': "
"
y.-
•EL~CIRtCAL CHARActERISTICS Qveroperating temperature 'range (unless otherwise noted)
c'
Symbol
Charact~ristic
"1 Output Reverse Current loff
;~
·1,'
Temp.
V""
'T l.evel$upply Current
Iccill
ICCID)'
.
"0" Level;SlIPplyCurrent
.
Vcc
MIN
OPEN
MIN
MIN
MAX
MAX
;
"0" Output Voltage
Test Conditions
Driven Other
Input Input oUtput
O.SV O.S V 180Y;
O.SV O,SV SOV
,2.0 V OV
I~O rnA
2.0V OV
300 rnA
OV
OV
S.OV
~,OV
"
NOM'
NOM
limits
0.4
0·6
12
40
.
,
"
V~C·5V
Typ.
Min.
::'
,.:
Max.
100
lOa
0.5
0.8
15
50
units
p.A
p.A
V
V
rnA
rnA
OUTPUT, Ys
'""L
INPlJI
;Rt",
I
I
I
I
I
I
:
I
I
',ISpf
IT'Note3) :
-=- :
J.'
LOAO'I
I
J
1, CIRCUIT
L~
____
DlfG.IlO. -'-1900A
OWB. 110'. A-''99i2
,
NOTES:
1. .Typical values all! at Vcc
= 5,O,V,JA = 25'C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance. '
5.-47
Notes
1,2
I, 2
UCS-4401 H (lnd' UCS-4801 H
HERME:TlCliiMOS LATCHED DRIVERS:' .'
,UCS~4401 Hand,UCS~4801
H
,liMOS LATCHED DRIVERS
~ :H,rmeth:ally, S~aled
FEATURES
•
•
•
•
•
rJ~~~~~!il ENABLE
OUTPUT
High-Voltage, High-Current Qutputs
Output TransientProtection
CMOS, PMOS, NMOS, TIL Compatible
Internal Pull-Down Resistors
Low-Power CMOS Latches
OUT,
HIGH-CURRENT interface
H IGH-VOLTAGE,
for military, aerospace and related applications
is supplied by these l!\tched drivers. Type UCS440lH contains four pairs of latches and drivers;
Type UCS-480IH has- eight pairs of latches and
drivers.
'
The integrated circuits' CMOS inputs work with
standard CMOS, PMOS and NMOS logic levels and
(with appropriate pull-up resistors) with TTL or DTL
circuits. The bipolar 9penccoUet;:tor outputs CaJ;l be
used with relays, solenoids, motors, LED or incan"
descent displays, and other high-power loads.
The output. transistors can sink ,500 rnA and will
withstand a VCE of 50· V in the OFF state. OutPUt~
can be paralleled for'higher current capabiiity; Be~·
cause of limitations on package power dissipation,;
simultaneous' operation of all drivers at maximum
rated current can only be ac~omplished with a,reduc~.;
tion of duty cycle.
,OWG.NO. A-1O.499A
UCS-4401H
OUTPUT
ENABLE
OUT,
OUT,
Type UCS-440IH, the four-latch device:, is furnished in a standard 14-pin side-brazed hermetic
package. Type UCS-480IH, the eight-latch device,
is furnished in a 22-pin side-braze.d hermenc pack"
age with row centers OADO-inch (10.16 mm)apart.
Both devices meet all processing, and environmental requirements of Military Stalldaro:.MIL,STD-.
883, Methods 5004 and 5Q05.
OUT,
OUT,
UCS-4801H
5-48
UCS-4401 Hand UCS-4801H
HERMETIC BiMOS LATCHED DRIVERS
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE .............................. : ...............• 50 V
Supply Voltage, Voo ............................................... 18 V
Input Voltage Range, VIN •••••••••••••••••••••••••••••• -0.3 V to Voo +0.3 V
Continuous Collector Current, Ic ................................... 500 rnA
Package Power Dissipation, Po ................................... See Graph
Operating Ambient Temperature Range, TA ................... -55°C to + 125°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
CAUTION: Sprague, GN!0S'd(~yices: have i'J'iput ~taticprotection but are still
susceptible to damage 'H;I/lenexpose110 extremely high-static eleftrical charges.
II
FUNCTIONAL BLOCK DIAGRAM
GROUND
OUTPUT
ENA8LE
,1. COMMON MOS
TYPICAL MOS LATCH
TYPICAL BIPOLAR DRIVER
CONTROL
DWG.ND. A-ID,495A
5-49
UCS·4401 Hand UCS·4801 H
HERMETIC BiMOS LATCHED DRIVERS
ALLOWABLE AVERAGE
PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
~
'" ~
?<-"'At:
""i?
""<- (e
~c/'"
'!
~
~
BIENT T'MP,
1~
a
25
RATUR,
AT
l
lENT TEMPER
so
NORMA~~
SYSTEM LIMIT
(8
I [
JA "65"C1W)
I 8JA ~
AfURE (
~
90'I C/ W)
I
i
"-
14 L'ADs
100
75
~
~.
125
150
TEMPERATURE IN "C
Dwg. No. A-ll,464
5--50
UCS-4401 Hand UCS-4801 H
HERMETIC BiMOS LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS at TA = + 25°C, Voo = 5V (unless otherwise specified)
Limits
Characteristic
Output Leakage Current
Collector -E mitter
Saturation Voltage
Input Voltage
Input Resistance
Supply Current
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
Symbol
1m
VCElSATI
V,NO
V'N(l1
Test Conditions
VCE - 50V
Ic - 100 rnA
Ic -200 rnA
Ic - 350 rnA, Voo -
rov
Min.
Typ.
-
-
-
0.9
1.1
1.3
-
1.3
-
-
1.6
1.0
13.5
8.5
3.5
50
50
50
IOOIOFFI
IR
- IS V
= 10 V
- 5.0 V (See note)
- 15V
= 10 V
Vo~ - 5.0 V
Vo~ - IS V, Outputs Open
Voo - 10 V, Outputs Open
Voo - 5.0 V, Outputs Open
All Drivers OFF, Y'N = 0 V
vR- 50V
VF
IF - 350 rnA
-
R'N
IOOIONI
(Each stage)
Von
Voo
Voo
Voo
Voo
-
-
-
-
2.0
1.7
1.0
100
5U
Units
pA
V
V
V
V
V
V
V
k!l
k!l
k!l
rnA
rnA
rnA
pA
pA
1.7
2.0
V
200
300
600
1.0
0.9
0.7
50
Max.
50
1.1
-
Note: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure the minimum logic "I".
5-51
D
UCS-4401H and UCS-4801 H
H£RMETlCBiMOS LATCHED. DRIVERS
ELECTRICAL CHARACTERISTICS at TA = - 55°C, VDD = 5V (unless otherwise specified)
Limits
Characteristic
Output leakage Current
Collector-Emitter
Saturation Voltage
Input Voltage
Symbol
ICl ,
VCE(SATJ
V'N'OI
1000FFI
I,
Voo ~ 15V
Voo = 10 V
V 0 - 5.0 V (See note)
Voo - 15 V
Voo= lOY
Voo = 5.0V
Voo - IS V. Outputs Open
Voo - 10 V, Outputs Open
Voo - 5.0 V, uutputs Open
All Drivers OFF, VIN - V
V, - 50 V
V,
I, - 350 rnA
V1N(l1
Input Resistance
Supply Current
Clamp Diode
leakage Current
Chimp Diode
Forward Voltage
Test Conditions
Vcl - 50V
Ie = 100 mA
Ie - 200 mA
Ic - 350 mAo VOD - 7.0V
R"
1001ON)
(Each stage)
a
Min.
-
-
-
-
-
1.0
0.9
0.7
50
-
2.0
17
1.0
100
50
Units
pA
V
V
V
V
V
V
V
kO
kO
kO
mA
mA
mA
pA
pA
-
-
2.1
V
Max.
500
Units
pA
V
V
V
V
V
V
V
kH
14
9.0
3.6
35
35
35
-
Typ.
-
Max.
50
1.3
1.5
1.8
1.0
-
-
-
-
ELECTRICAL CHARACTERISTICS at TA = + 125°C, VDD = 5V (unless otherwise specified)
limits
Chara.cteristic
output leakage Current
.Gollector-Emitter
Saturation Voltage
Input vOltage
Input Resistance
Supply Current
Clamp Diode
leakage Current
Clamp Diode
Forward Voltage
Symbol
1m
VCE.-10. IS8A
RECOMMENDED OPERATING COND.lTION$
Supply Voltage (Vee)
Operating Temperature Range
Current into any output (ON state)
Min.
Nom.
Max.
4. 5
-55
5.0
+25
5.5
+125
300
Units
V
°e
rnA
ELECTRICAl CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Chanicteristic
"1" Input Voltage
"0" Input Voltage
"0" InputCurrent
"I" InputCurrent
Symboi
Temp.
Driven
Input
Vee
Limits
Other
Input
Output
MIN
VinP)
Vin(O)
,',
lin(l )
Input Ciamp Voltage V,
Typ.
MIN
0.4 V
30V
~12 rnA
. MAX
MAX
hn(O)
Min.
MIN
SWITCHING CHARACTERISTICS atV ce
=
30 V
frV
50
Symbol
0.7
100
10
-,-1.5
",
Units
Notes
V
V
p.A
p.A
2
2
V
50V , TA = 25°C
,"
Characteristic
Max.
2.0
limits
Min.
'. Test COIidihpns
Turn-on Delay Time
tpdO
Vs ~.YO V,Rt,~ 45511 (10 Watts)
Ct ~ 15.pF
Turn·()ff Delay Time
tpd1
Vs~ 70 V,
Ct = 15 pF
Rl '"
465 R (10 Watts)
NOTES:
1. Typical varuesare at Vee ~ 5.0V,T A ~ 25°0.
2. Each Input tested separately.
1 Voltage values shown in the test circuit waveforms are ';lith respect tonetwork ground terminal.
4. Capacitance values specifiedlncludeprobe and test fixture capaCitance.·
5-55
Typ.
Max.
Units
Notes
200
500
ns
3
300
750
ns
3
INPUT PULSE CHARACTERISTICS
VinlOI ~ OV
Vinlll = 3.5V
tf ~ 7ns
t, ~ 14ns
tp ~ II'S
PRR ~ 500kHz
1,....;..:....:...'--_ _---'____.,...._ _ _ _ _ _---'
o
SERIES UDS-5700H
QUAD2-INPUT PERIPHERAL and POWER DRIVERS
Type UDS·5703H Quad OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
'0ll
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
leel1l
lee(ol
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
INPUT
2.0V
2.0 V
0.8V
O.S V
OV
OV
OV
O.S V
O.S V
OV
Vee
5.0 V
OV
Vee
5.0 V
OV
Vee", 5V
limits
Output
Min.
SO V
SOV
150 mA
300 mA
OPEN
Typ.
Max.
Units
0.4
0.6
100
100
0.5
O.S
p.A
p.A
V
V
p.A
V
mA
mA
1.5
16
72
OPEN OUTPUT
1--I
----I
RL
........-+_Ir--+
:
:
I
I
1
I
1
1
I
I
. 15pF I
]NoteS)1
I
-: LOAD I
L.::'!.C:!'~ _:
OWG.frlO.A-912JA
NOTES:
I. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR = VoII(m'"'.
4. Diode forward voltage drop measured at If = 300 mA.
5. Capacitance values specified include probe and test fixture capacitance.
5-56
200
1.75
25
100
Notes
3
4
1,2
1,2
SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL and POWER DRIVERS
Type UDS·5706H Quad AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
loll
"0" Output Voltage
Vo•
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
lee(l}
Ice(o}
Temp.
Test Conditions
Driven
Other
Input
' Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
.MIN
MIN
NOM
NOM
MAX
MAX
2,OV
2.0 V
0.8V
0.8 V
OV
2.0V
2.0V
Vee
5.0 V
OV
Vee
5.0 V
OV
Limits
Output
80V
80V
150 rnA
300 rnA
OPEN
Vee
Vee
OV
Min. __ Typ.
Max.
Units
I'A
I'A
V
V
1.5
16
100
100
0.5
0.8
200
1.75
24
70
98
0.4
0.6
r ----,
'L
,
"
,,
I
15pF
: INoles)
: -=
LOAD
I ____
CIRCUIT
L
_
OWG. ito. A-7878A
tpdl
OUTPUT
__~
'
I,"'"
NOTES:
1. Typical values are at Vee = 5.0 V, T" = 25°C;
2. Per package.
3. Diode leakage current measured at VR = V"II(m'.}.
4. Diode forward voltage . drop measu,:ed at Jf = 300 rnA.
5. Capacitance values specified include.probe and test fixture capacitance.
5-57
I'A
V
rnA
rnA
Notes
3
4
1,2
1,2
o
SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL and POWER'DRIVERS,
Type UDS·5707H Quad NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" Output Reverse Current
loff
"0" Output Voltage
Vo•
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
lee(1)
lee(o)
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
INPUT
O.S V
O.S V
2.0 V
2.0 V
Vee
Vee
2.0V
2.0V
Vee
OV
OV
5.0 V
Vee
OV
2.4V YCC=5V
limits
Output
Min.
80 V
SOV
150 mA
300 mA
OPEN
Typ.
0.4
0.6 :
1.5
24
80
Ov
5,0 V
EN OU;:
Vs
r~----l
'L
,
I
I
•I
15pF
!}NO.• S)
: ;: LOAD
I _____
CIRCUIT
L
.J
OWG. MO. A-7899A
lNPUJ
" - " " " - - - - - V;.IO)
'pdQ
r---'{Qut(l)
OUTPUT
50%
'"-_....J._ - - - - - -
Vout(O)
DWG. "0. A-1900"
NOTES:
I. Typical values are at Vee = 5.0 V,l A = 25'{:, .
2. Per package.
3. Diode leakage current measured at V. '= Voff(m'.).
4. Diode forward voltage drop measured at I, = 300 rnA.
5. Capacitance'values specified include probe and test fixture c~pacitance.
5-58
Max.
Units
100
100
0.5
0.8
200
1.75
30
106
..J!cA
il A
V
V
il A
V
mA
mA
Notes
3
4
1,2
1,2
SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL and POWER DRIVERS
Type UDS·5733H Quad NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"1" Output Reverse Current
loll
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current
ILK
Vo
!cC(1)
Icc(o)
Temp.
Test Conditions
Driven
Other
Input
Input
Vcc
0.8 V
0.8V
2.0 V
2.0 V
O.8V
0.8V
OV
OV
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
Vcc
OV
OV
5.0 V
Vcc
OV
OV
5.0 V
INPUT
VCC=5V
OPEN
limits
Output
Min.
80 V
SOV
150 mA
300 mA
OPEN
Typ.
0.4
0.6
1.5
24
80
OUTPUT
Max.
Units
100
100
0.5
0.8
200
1.75
30
100
p.A
p.A
V
V
p.A
V
mA
mA
Notes
3
4
1,2
1,2
Vs
-- - - - I
Rl
:
,
lSpF I
I(NOfeS):
":"lOAD I
L<:~~I~
_1
OWG. NO; A-9t35A
INPUT
OUTPUT
'---~-
- - - - -
-
Vout(O)
OWG. NO. A-7900A
NOTES:
1. Typical values are at Vcc = 5.0 V, TA = 25'C.
2. Per package.
3. Diode leakage current measured at V. = Vofl(m;.).
4. Diode forward voltage drop measured at II = 300 mAo
5. CapaCitance values specified include probe and test fixture capacitance.
5--59
II
SERIES UDS-5110H
DUAL PERI P-H ERAL and POWER.DRlVERS
SERIES UDS·571 OHDUAL
PERIPHERAL and POWER DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•
•
j)~
110. A_9791
Type UDS-5711H
Dual AND Driver
Four Logic Types
DTLITIL/PMOS/CMOS Compatible Inputs
Low Input Current
Sustaining Voltage of 80 V
Transient-Protected Outputs
High-Reliability Screening to MIL-STD-883, Class B
Description
These dual peripheral and power drivers are bipolar monolithic integrated
circuits incorporating AND, NAND, OR, or NOR logic gates, highcurrent switching transistors, and transient suppression diodes on the same
chip. The two output transistors are capable of simultaneously sinking
200 rnA continuously at ambient temperatures of up to +S5°C. In the OFF
state, these drivers will sustain at least SO V. Units are supplied in S-pin
hermetically sealed mini-DIP packages.
Type UDS-5712H
Dual NAND Driver
Applications
The Series UDS-571OH dual drivers are ideally suited for interface between
low-level or high-level logic and high-current/high-voltage loads. Typical
applications include driving peripheral loads sucJ:t as incandescent lamps,
light-emitting diodes, memories, and heaters with a load current ~f up to a
500 rnA peak value.
The integral transient suppression diodes allow the use of these drivers
with inductive loads such as relays, solenoids, or stepping motors without
the need for discrete diodes. When not required for transient suppression,
the diode common bus can be used to perform the "lamp test" function.
Type UDS-5713H
Dual OR Driver
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .
Input Voltage, Vin ..
Output Off-State Voltage, Vott ..
Output On-State Sink Current, Ion.
Suppression Diode Off-State Voltage, Voff
Suppression Diode On-State Current, Ion.
Power Dissipation, PD (one output)
(total package) ..
Ambient Temperature Range (operating), TA
Storage Temperature Range, Ts ....
.. ... 7.0 V
.30 V
.80 V
.500 mA
.80 V
. ........................... 500 mA
.... l.OW
.. . . . . . . . . . . . . ..
.See Graph
... -55°C to +12S o C
. .. -65°C to + Isoac
5-60
~.NO.A_9788
Type UDS-571 ..H
Dual NOR Driver
SERIES UDS-5710H
DUAL PERIPHERAL and POWER DRIVERS
.,
~
"
~ 3
Z
o;::
£
Bi
~
2
t-----t---"
~
POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
"
:2
~l
TEMPERATURE IN
°c
llll'G.
~O.
A- 10.978
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (V cc)
Operating Temperature Range
Current into any output (ON state)
~tn.
~om.
~ax.
4.5
-55
5.0
+25
5.5
+125
300
Omts
V
°C
rnA
IJ
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Symbol
"1" Input Voltage
"0" I nput Voltage
Temp.
Vee
"1" Input Current at all Inputs
except Strobe
"1" Input Current at Strobe
Input Clamp Voltage
Symbol
Turn-on Delay Time
tpdO
lurn-off Delay Time
Tpdl
Limits
Output
Min.
Typ.
Max.
Units
Notes
VlolOI
11,(0)
11,(0)
MAX
0.4 V
30 V
50
100
p.A
MAX
0.4 V
30 V
100
200
p.A
11,(11
MAX
30V
OV
10
p.A
2
11,111
VI
MAX
MIN
30V
-12 mA
OV
20
p.A
2
-1.5
V
SWITCHING CHARACTERISTICS at Vee
Characteristic
Other
Input
MIN
MIN
VI,(l)
"0" Input Current at all Inputs
except Strobe
"0" Input Current at Strobe
Driven
Input
=
2.0
0.8
5.DV, TA
=
V
2
25°C
Test Conditions
Vs - 70 V, RL
CL = 15 pF
Vs - 70 V, RL
CL = 15 pF
V
Limits
Typ.
Min.
-
465
n
(10 Watts)
200
Max.
500
Units
ns
Notes
3
-
465
n (10 Watts)
300
750
ns
3
NOTES,
1. Typical values are at Vcc = S.OV, T, = 25°C.
2. Each inp'Jt tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.
5-61
INPUT PULSE CHARACTERISTICS
7ns
V"IOI
=
OV
tl
=
V"II!
= 3.5V
t,
= 14ns
tp = IlLS
PRR
= 500kHz
SERIES UDS-S710H
DUAL PERIPHERAL and POWER DRIVERS
UDS·5711 H Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"I" Output Reverse Current
'olf
"0" Output Voltage
Von
Diode. leakage Current
Diode Forward Voltage Drop
"1" level Supply Current
"0" level Supply Current
ILK
Vo
lee(1)
leClo)
Temp.
Test Conditions
Driven
Other
Input
Input
Vee
NOM
NOM
NOM
NOM
MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX
INPUT
2.0 V
2.0 V
0.8 V
0.8 V
OV
2.0V
2.0V
Vee
5.0 V
OV
Vee
5.0 V
OV
Limits
Output
Min.
80 V
80V
150 rnA
300 mA
OPEN
Vee
Vee
OV
Typ.
Max.
Units
Notes
0.4
06
100
100
0.5
0.8
200
1.75
p.A
p.A
V
V
p.A
V
mA
rnA
3
4
1,2
1,2
1.5
8.0
35
2.4V Vce=5V a EN OUi:
Vs
r ----,
RL
15pF
IINo .. S)
-=
LOAD
CIRCUIT
L _____
.J
DWG. "0. A-7878A
INPUT
~'O%::.:::..
10%
'pdl
I
OUTPUT
I
~
I
_ _ _ _ V'oIO)
I
r-----.,..,-'pdO
I
l'"s()<)-ro---SD'li-o""'L·- --Voo'll)
•
Voo,{O)
OWG. Ii').
A-7628C
NOTES:
1. Typical values are at Vcc = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR = Vofflm'o).
4. Diode forward voltage drop measured at If = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.
5-62
12
49
SERIES UDS-5710H
DUAL PERIPHERAL and POWER DRIVERS
UDS·5712H Dual NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Symbol
Characteristic
"I" Output Reverse Current
loff
"0" Output Voltage
Von
Diode Leakage Current
Diode Forward Voltage Drop
ILK
Vo
"I" Level Supply Current
"0" Level Supply Current
lee(ll
Ice(o)
Temp.
Vee
MIN
OPEN
MIN
Limits
Driven
Input
Other
Input
0.8 V
0.8 V
2.0 V
2.0 V
Vee
Vee
2.0 V
Typ.
Max.
Units
Jl.A
150 rnA
0.4
lOa
lOa
0.5
2.0 V
300 rnA
0.6
Vee
OV
OPEN
NOM
MIN
NOM
NOM
NOM
Vee
OV
NOM
MAX
OV
OV
NOM
MAX
5.0 V
5.0 V
INPUT
Output
2.4V V(C-,,5V 0 EN
Min.
80 V
80 V
ou;:
'.
3
15
rnA
1.2
53
rnA
1.2
Vs
I
o
15pF
i TNOI.51
: ":: LOAD
I
CIRCUIT
L _____
JI
INPUT
10%
'.pdQ
OUTPUT
DWG. NO. A-979 I
'-19001
NOTES:
1. Typical values are at Vee ~ 5.0 V. T. ~ 25°C.
2. Per package.
3. Diode leakage current measured at V. ~ Vofflminl.
4. Diode forward voltage drop measured at I, ~ 300 rnA.
5. Capacitance values spOCIfied Include probe and test fIXture capacitance.
5-63
4
12
40
I
Voot(O)
V
1.75
1
1
OWG.1I0
0.8
200
1.5
'L
- - - - - -
"A
V
"A
V
r~----l
~_ _.J_
Notes
SERIES UDS-5710H
DUAl PERIPHERAL ond POWER DRIVERS
UDS·5713H Dual OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Symbol
Temp.
Vee
Limits
Driven
Input
Other
Input
OV
OV
80 V
0.8 V
ISO mA
Output
"I" Output Reverse Current
loff
MIN
OPEN
2.0 V
2.0V
"0" Output Voltage
Von
MIN
0.8 V
MIN
0.8 V
0.8 V
300 mA
Diode Leakage Cu rrent
ILK
Vo
NOM
NOM
OV
OV
OPEN
NOM
NOM
lee(l)
NOM
NOM
MAX
MAX
Vee
S.OV
Vee
S.OV
OV
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current
leelo)
INPUT
OV
Vee
5V
Min.
Typ.
80 V
0.4
0.6
15pF
-! 1-',
NP\J1:,5'"
-1
f-
8.0
13
36
50
I
A-ginA
If
5"'" :---------.v,.'nnl
,'.
~ '~
---i
Ipdl~
,
OU',,"'
15"'"
V,n(()l
I
r------;
IpdQ
5",C::::::
NOTES:
1. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at V. = Vofflm;n).
4. Diode forward voltage drop measured at I, = 300 mAo
S. Capacitance values specified Include probe and test fixture capacitance.
5--64
0.5
0.8
1.75
~
too..
10'1\,
I'A
1.5
I ]Note 5)1
I
-=-lOAD I
I
IL _____
CIRCUIT
~Q
Units
100
100
200
OPEN OUTPUT
0",,",
Max.
Notes
I'A
V
V
I'A
V
3
mA
mA
1,2
4
1,2
SERIES UDS-S710H
DUAL PERIPHERAL and POWER DRIVERS
UDS·5714H Dual NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic
Symbol
Temp.
Limits
Driven
Input
Other
Input
O.S V
OPEN
O.S V
O.S V
O.S V
SO V
SOV
MIN
2.0 V
OV
150 rnA
Vee
MIN
Output
lolf
"0" Output Voltage
Vo ,
MIN
2.0 V
OV
300 rnA
Diode Leakage Current
ILK
NOM
NOM
Vo
NOM
NOM
"1" Level Supply Current
leell)
NOM
MAX
OV
"0" Level Supply Current
lee{o)
NOM
MAX
5.0 V
Vee
OV
OV
5.0 V
OPEN
Diode Forward VoLtage Drop
Vee
OV
INPUT
VCC~5V
OPEN
Min.
Typ.
,
"1" Output Reverse Current
0.4
0.6
I
"A
V
0.8
200
V
3
4
1.5
1.75
12
40'
15
rnA
1,2
50
rnA
1,2
15pF
I
~lOAD
I
CIRCUIT
I
!.:.._:..< ___ J
INPUT
10%
'pdQ
OUTPUT
Voul(O}
OWG. MO.l-1900A
NOTES:
L Typical values are at Vee ~ 5.0 V, TA ~ 25°C.
2. Per package.
3. Diode leakage current measured at V. e, Voff{m',I.
4. Diode forward voltage drop measured at I, ~ 300 mA
5. Capacitance values speCified Include probe and test fIXtur€ capacitance.
5-65
100
0.5
Notes
"A
OUTPUT
I
-
Units
"A
V
ICNote5):
'----'- - - - - -
Max.
'. 100
D
UDS-S790H and UDS-S791 H
QUAD PIN DIODE POWER DRIVERS
UDS-5790H and UDS-5791 H
QUAD PIN DIODE POWER DRIVERS
FEATURES
•
•
•
•
•
Inverting or Non·lnverting
Low Input Current
TTL, DTL, MOS Compatible
Wide Operating Voltage Range
High Output Breakdown Voltage
our,
of four high-voltage NPN output
CONSISTING
stages and associated logic and level shifting,
/'
L.=J
these monolithic, planar integrated circuits offer an
easy solution to many PIN diode driving applications.
The UDS-5790H and UDS-579lH quad power
drivers are designed to replace discrete or hybrid PIN
diode drivers. They provide significant reductions in
cost and space with improved reliability. The UDS5790H driver uses a grounded-base input stage for
non-inverting operation while the UDS-579IH driver
uses a common-emitter input stage for inverting operation. Both devices are capable of sustaining OFF
voltages of 120V and will switch currents to 500 rnA.
OWG.MO, A. 10. ltn
UDS-5790H
The input buffer circuitry has been designed to
utilize external discrete resistors. The one-resistorper-driver effectively reduces total package power dissipation and junction temperature while allowing user
selection of output base drive current, power supply
voltages, and output current.
All devices are rated for operation over an extended
temperature range of· _55°C to +125°C. They are
customarily supplied in 16-pin hermetic dual in-line
packages. All units are subjected to the 100% production screen tests specified inMIL-STD-883, Method
5004, Class B, paragraphs 3.1.1 through 3.1.6. On
special order, 160 hours of burn-in to Method 1015,
Condition A, can also be performed.
5-66
OWG. MO. A-IO.lt78
UDS-5791H
OUTa
UDS-5790H and UDS-5791 H
QUAD PIN DIODE POWER DRIVERS
ABSOLUTE MAXIMUM RATINGS
over free-air operating temperature range
Supply Voltage, Vee...
. .......................................................................... +6.0 V
Supply Voltage, VEE .. : .......................... : .................................................. ; ........ -6.0 V
Input Voltage, V,N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vee
Output OFF-State Voltage, VOFF (ref. VEE) ...................................................................... + 120 V
Output ON-State Current, ION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA
Package Power DisSipation, Po ................................................................ See Graph
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature Range, Ts ................................................. : ................... -65°C to +150°C
PARTIAL SCHEMATICS
,-----,
9
,
V..,
.V,
Vee
R,
""T
..-----..,
~
~
,
,,
R,
I
I
I
I
16
I
,
,
I
I
:
I
--~PIN
I
IN
C1.~
,
~OI00E
,,
I
~Rl
I
tRL
I
:
I
~
'*'
IN
'*'
• • 110.... 10 . •
ONE OF FOUR DRIVERS
UDS·5791H
ONE OF FOUR DRIVERS
UDS·5790H
RECOMMENDED OPERATING CONDITIONS
Min. Nom.' Max. Units
Supply Voltage, Vee..................................................................... 4.5
5.0
5.5 V
Supply Voltage, VEE .... :; ......................... ; .............................. : .... ; . .,..1.5 ..,..3.0 -5.5 V
Output ON-State Current, ION . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . ;. .. . • • • • • • • .. • .. • .. • .. • • • . . . • • • • •• -55 +85 +125 ·C
5-67
o
UDS-5790H and UDS"5791 H
QUADRJN DIODE POWER DRIVERS
~L
'U~~
" 'R
C '\'0 0
POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
I :"
NORMAL
SYSTEM LIMIT
I
~IENT TEMPER
ATURE
"'-
I
~
"""
DEVICE.....,
~T,
o
50
25
75
TEMPERATURE IN
100
_-
.... .... , ... ...
125
150
°c
()WI.;.
~o.
A· 10. ISSA
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Vee VEE Y'N VOII or ION
rnA
+V -V +V +V
4.5
4.5
5.5 3.0 5.0
5.5 3.0 5.0
5.5 3.0 0.4
5.5 3.0 0.4
4.5 3.0
115
4.5 3.0
115
4.5 1.5
150
300
4.5 1.5
150
300
4.5 1.5
150
300
4.5 1.5
150
300
Rx
n
los
4.5
3.0
510
Icc
5.5
5.5
Icc
5.5
5.5
5.0
5.0
5.0
3.0
3.0
3.0
510
510
510
Characteristic
"1" Input Voltage
"0" Input Voltage
"1" Input Current
Symbol
VIN!I)
VIN!O}
IIN!I}
"0" Input Current
"N!O}
OFF-State
Reverse Current
ON·State
Output Voltage
(ref. VEE)
1011
VON
Temp.
·C
+25
+125
-55
+85
+125
Predriver
Collector Voltage
(ref. VEE)
Output Short·Circuit
Current
OFF·State
Supply Current
ON·State
SllJlIliy Current
Turn'On Delay
Storage Delay
Fall Time
Vx
t..
t.
tf
-
-
-2.3
-
-
-
-
NOTES:
1. Type UDS·5790H only.
2. Type UDS-5791H only.
3. VIN = 2.4 Vfor UDS-5790H or 0.4 Vfor UDS-5791H.
4. VIN = 0.4 Vfor UDS-5790H or 2.4 Vfor UDS-5791H.
5. Each output tested separately.
5--68
-
-
720
360
720
360
720
360
720
360
Max.
4.0
0.8
1.0
50
50
1.0
50
100
400
600
400
700
500
850
1.3
1.5
Limits
Units
V
V
rnA
uA
J,lA
rnA
uA
J,lA
mV
mV
mV
mV
mV
mV
V
V
20
50
rnA
3,5
-
3.4
rnA
3
4.1
rnA
4
500
5.0
100
/LS
Min.
2.0
-
-
ns
ns
Notes
1
2
1
2
3
3
45
45
45
4ci
45
45
4,5
4,5
UDS-S790H and UDS-S791 H
QUAD PIN DIODE POWER DRIVERS
SWITCHING TEST CIRCUIT
AND WAVEFORMS
Vee
+5V
VOUT
DWG. MO. A-IO.
UDS-5790H
+lOOV
65~
UDS-5791H
'tI
0%
I
.
I
I
I
I
..(0010I
90% I:
50%
10%
:2.4VFL·
50%
190%
'
N
.
,
<04V
I
.
- .
I
I
I
I
-ofook-
-*I t, J-""
I
-It, l-
I
I
::: ' 5 0 % : I
!$-2.3V~ :~'o%
I I
-frr0.;, 10. ~IO.655
GENERAL DESIGN NOTES
where
B "" 30, the minimum output current gain over the operating temperature range
Vx"" 1.5, the maximum predriver voltage
It is recommended that a minimum overdrive of 25% to be used (1.25 IRX or 0.8 RX).
5--69
INDUSTRIAL, MILITARY, AEROSPACE DEVICES (Continued)
QUALITY ASSURANCE FLOW CHART
CHEMICALS, GASES, HARDWARE
WAFERS
RAW MATERIALS
MASKS
NEW PRODUCT DESIGNS
AND CURRENT DESIGNS,
NEW-CURRENT PROCESSES,
NEW MATERIALS
DOCUMENTATION OF:
CHEMICALS, HARDWARE
GASES, MASKS
PROCESSES, DESIGNS, ETC.
-
~
QUALITY ASSURANCE
PROCUREMENT REVIEW
VENDOR CONTROL
INCOMING INSP.
~
RELIABILITY ENGINEERING
DESIGN INTRODUCTION
(SEM) EVALUATION,
QUALIFICATION
~
PRODUCT ASSURANCE
DOCUMENTATION CENTER
PRODUCT-PROCESS
AND PROCUREMENT SPECS.
QA IN-PROCESS
AUDIT
QA IN-PROCESS
AUDIT
S.E.M. INSPECTION
I
I
WAFER
FABRICATION
~
~
METALLIZATION
TOLLGATE
INSP.
HERMETIC PKG.
QA AUDIT
TEMP. CYCLE
CENTRIFUGE
GROSS LEAK, FINE LEAK
QUALIFICATION
OF CONFORMANCE
MIL-STO-883
METHOD 5005.3 OR
CUSTOMERS REQ.
MIL-STO-883
METHOD 5004.3
OR CUSTOMER REQ.
SHIP
5-70
STOCK
INDUSTRIAL, MILITARY, AEROSPACE DEVICES (Continued)
PROBE
100% VISUAL
INSPECTION
QA IN. PROCESS
AUDIT
"SCRIBE
SORT
DIE AnACH
WIRE BOND
D
OWG.
5-71
NO.
B·1474
INDUSTRlAL,.:M1LlTARY; AEROSPACE. DEVICES .(Continued)
THE SPRAGUE ELECTRIC
'DOUBLE-DEUCE' BURN-IN PROGRAM
FOR INTEGRATED CIRCUITS
Electric Company's "Double-Deuce"
screening program removes marginal
. devices before shipment. Improved
customer satisfaction with performance
and reliability is an immeasurable but certain bonus of the program.
THE EXPENSE OF DEVICE FAILURE is
more than the .time and money spent
locating and replacing. a defective in-.
tegrated circuit. The total cost can include
the price·of assembly. rework, system
downtime, service calls, war.ranty.claims
and lost customer goodwill.
"Double-Deuce" screening is done during the last stage of production. Because
Sprague does the screening, only qualified
devices are received by the user.
Costs of $25 for each in-house failure
and $250 for each field failure are· not uncommon. At a relatively low cost, Sprague
QUALITY AND RELIABILITY
Quality and reliability are terms that are
often used interchangeably. Quality implies reliability, but a product's merit
should always be defined by both.
lifetime probability curve, is often used to
project time-to-failure for integrated circuits. Because the "Double-Deuce" program eliminates early failures, Sprague integrated circuits delivered after the screening process have a higher degree of
reliability.
Quality is the extent to which a device
conforms to specifications when it is shipped to the user. Quality is verified by
testing. Inspections at every step of production of Sprague integrated circuits ensure the devices meet demanding standards for workmanship and materials.
Inspections of integrated circuits under
the "Double-Deuce" program have been
made even more stringent to secure a
higher level of quality.
PROBABILITY OF FAILURE
AS A FUNCTION OF TIME
Reliability is the measure of an integrated circuit's ability to meet specifications over time. Reliability is a product of
design and process control. Acceleratedlife tests provide the manufacturer and
user with an indication of the reliability of a
device. Normally, a small number of integrated circuits exhibit signs of early
failure or infant mortality. This statistic,
taken from the steepest part of the IC
DOUBlE-OEUC~
------
WEAR
OUT
RANDOM FAILURES
TIME
5-72
Dwg. No. A-ll.417
INDUSTRIAL, MILITARY, AEROSPACE DEVICES (Continued)
OUTLINE OF THE 'DOUBLE.DEUCE' PROCESS
The "Double-Deuce" burn-in program
uses high stress levels to accelerate the
failure mechanisms associated with infant
mortality. These normally occur within the
first few hours of user application.
Although typically less than 1 per cent of a
lot will be rejected, user confidence in lot
integrity is greatly improved. The screening
program is designed to eliminate the
following failure modes:
Stress
Failure Mode
High-Temp. Bake
Temp. Cycling
Burn-In
High-Temp. Testing
Contamination
Package-Related
Process-Related
Electrical Degradation
L-=~==-' MILITARY PRODUCT
PROCESSING
o
The majority of early integrated circuit
failures (infant mortality or ionic contamination) can be attributed to manufacturing defects, package or assembly
defects, or final test escapes. The."DoubleDeuce" program is designed to eliminate
weaker parts, reduce or eliminate user
shipment inspection, assembly rework,
system checkout, and warranty returns.
SHIP
SHIP
OWG.NO. A-ll,418A
TEST PROCEDURES
Potential failures are seal or bond failure,
cracked packages. or chips.
The "Double-Deuce" burn-in program includes five test .procedures:
1. High·Temperature Bake
This is aproce.ss designed to stabilize
electrical drift and to accelerate chemical
degradation such as surface contamination. It is a four-hour bake at + 175°C
without electrical stress (similar to MILSTD-883, Method 1008).
The process has 10 cycles with 10
minutes of dwell at - 65°C and 10 minutes
of dwell at + 150°C (air to air), with a maximum transfer time of five minutes (MILSTD-883, Method 1010, Condition C). At
Sprague's option; this process may be
changed to thermal shock (liquid to liquid)
for 10 cycles,five minutes at O°C and five
minutes at + 100°C with a transfer time of
10 seconds (MIL-STD-883, Method 1011,
Condition A).
2. Temperature Cycling
This is a screening process designed to
mechanically stress the integrated circuit
by alternately heating and cooling it.
5-73
INDUSTRIAL, MILITARY, AEROSPACE DEVICES (Continued)
TEST PROCEDURES
3. Burn·ln
The burn·in, or accelerated·life test, is
performed to screen out marginal devices,
those with inherent defects, or defects
resulting from manufacturing deviations
that can cause time-dependent or stressdependent failures. Without this conditioning, marginal circuits that initially meet all
specifications could exhibit early lifetime
failures under normal operating conditions. The test is conducted for 96 hours at
a junction temperature of + 150°C under
electrical stress conditions (similar to MILSTD-883, Method 1015) such as:
Type of Device
Electrical Stress
Bipolar Interface
Linear Devices
12L and MOS Logic
Steady·State Reverse Bias
Steady·State Forward Bias
Clocked
TJ = + 125°C for ionic contamination (E A
= 1.0eV)orfor192hoursatTJ = +125°C
for infant mortality defects (E A = 0.4 eV).
4. High·Temperature Test
Every device is subjected to complete
electrical tests at + 70°C for function and
doc parameters (similar to MIL-STD-883,
Methods 3001 through 3014 and 4001
through 4007, as appl icable). Relaxed
+ 25°C limits or published hightemperature limits, are used to remove
devices with circuit anomalies such as
beta mismatch, high leakage current, and
intermittent bonds, which may only affect
the circuit at higher temperatures.
5. Outgoing Quality Control Inspection
All "Double-Deuce" product is inspected
to an outgoing sampling plan which
guarantees that the product will meet an
acceptable quality level of 0.25%.
The burn-in conditions (96 hours at TJ
= + 150°C) are equivalent to 525 hours at
HOW TO ORDER
All standard Sprague integrated circuits
are branded with the Sprague registered
trademark,
part subjected to the screening program
for extra reliability.
®.
Devices processed in the "DoubleDeuce" burn-in program are specified by
adding the suffix "BU" to the end of the
part number. For example, to order ULN2023A with this processing, specify ULN2023ABU; to order UDN-6116R-2, specify
UDN-6116R-2BU.
Integrated circuits screened to the
added requirements of the "Double-Deuce"
program are marked:
®®
The double "circle-deuce" identifies a
5-74
INDUSTRIAL, MILITARY, AEROSPACE DEVICES (Continued)
INTERFACE DRIVERS WITH MIL·STD·883
HIGH·RELIABILITY SCREENING
Interface drivers with high-reliability screening can be ordered by adding the suffix "MIL" to the part number, for
example, ULS-2064H -MIL. If marking with the customers part number is necessary in place of the Sprague Electric
part number, this must be stated on the purchase order with the marking desired.
Table I - 100% Production Screen Tests (All Hermetic Parts)
MIL-STO-883, Method 5004, Class B, Paragraphs 3.1.1 through 3.1.6
~~--~~-
MIL-STO-883
Test Method
Screen
Internal Visua I
Stabilization Bake
Thermal shock
Constant Acceleration
Fine Seal
Gross Seal
Electrical
Marking
2010.
1008.
1011.
2001.
1014.
1014.
Condo
Condo
Condo
Condo
Condo
Condo
Conditions
B
C
A
E
A
C
150°C. 24 Hours
100°C. 15 Cycles
30.000 G's, Yl Plane
5 x 10"7 atm·cm 3;s Maximum
oto
Per Specification
Sprague or customer part number, date code,
lot identification. index point
~~~~~~~--
Table II - 100% High-Reliability Screening ("MIL" Suffix Parts Only)
MIL-STO-883, Method 5004, Class B, Paragraphs 3.1.9 through 3.1.15 & 3.1.18
MIL-STO-883
Test Method
Screen
Interim Electrical
Burn-In
Static Electrical
Dynamic & Functional Electrical
Fine Seal
Gross Seal
External Visual
Table III -
Subgp.
A
Subgp. 1
Subgp. 2 & 3
Subgp. 4. 7 & 9
A
C
A Subgp 1-4. 7 & 9
B
C
D
25°C per Specification
12SOC, 160 Hours
2SOC per Specification
- WC & + 125°C per Specification
25°C per Specification
5 x 10. 7 atm·cm 3:s Maximum
High-Reliability Qualification and Quality Conformance Inspection
MIL-STO-883, Method 5004, Class B, Paragraph 3.1.17
MIL-STO-883
Test Method
Test
Group
Group
Group
Group
5005. Gp A.
lOIS. Condo
5005. Gp A.
5005. Gp A.
5005. Gp A,
1014. Condo
1014. Cond.
2009
Conditions
5005.
5005.
5005.
5005.
Table
Table
Table
Table
Description
I
II
III
IV
Each production lot
Each production lot
End points. Gp. A. Subgp. 1. every 90 days
End points. Gp A. Subgp. 1. every 6 months
--~~~~~~~~~~~~~~~~~~~~--
Some of this material has been taken from Military Specification MIL-M-38510D and Military Standard MIL-STO-8838, Methods 1008.1, 1011.2, 1014.3, 1015.2,
2001.2, 2009.2, 201D.4, 5004.4, and 5005.6.
Unless otherwise specified, the latest issues of these military documents shall apply to the extent specified herein.
5--75
o
1/ I
RADIO INTEGRATED CIRCUITS
n
SECTION & - RADIO INTEGRATED CIRCUITS
Sjlle~ion
GUide,.,...................................................... 6-2
~tN-21llAf~M, I-f AIllPtifier/limiter and Detector ......... , ....•................ 6-3
14 Ar1lPlifier/Limiter and ,Detector .............................. ' 6-S
U~N-2204AA~Mif.MRadio System .......................•.................. 6-14
UlN·2240kJ\.M!F-M Signal Processing System with Tuning Error and level Muting ....... 6-,22
ULN~.2241}\}\~Mlf~MSignal PiQce~sing System ................ , ........ :; .... , . 6-29
ULN:<2242}\(IOAJ,,090)AoMlF-MSignaLProcessing System with Level Muting ......•..... 6-36
ijlN:'2243A Mixer/I-F for:f-M Radio$; ....... , ............................ ; ... 6-44
:,VLN;~245A:Phase~lockedilo9P StereoOecoder ................. ;................ 6-49
utN.~24'9M·M RadiuSystem .•.. , .: ............. , .......................• 6-52
ULX-aS04AA.M/F.M Sfg~al Processor .... ': .... : ............ ,' ................ 6-57
uLN4?09A:J.OI'I~Voltage Phase-locl!id Loop Stere~ Decode.r •....... " .' ............. 6-63
Ull'l-3SIOA Phs.se.locked :LDQP Swreo Decoder ; ........................•....... 6-66
ULX.384QA,A.~MtF-.MSignarp~ocessing System .......................... ; ...... 6.69
ULN,·~59}\lQWiP0'lle~ Narrow.Band,f.M I-F , ........ " .... : .. : ............... 6-76
ULN·~889A(l:DA3189) I-f System for f-M Receivers ...... ; ............... j •••••• 6-79
liHi~213QAt~M,
Application NoteS:
Q~~2Q4AApplications arid Operation .....................•...............
. A~M?F-MRaijio D~jgn Using theUlN~2240/4l/42A .....•..........•. " ........
MQl)1pfflteA-M/F-M Signal Processing System .. : ' ...........................
T,h~pevelqpment of+lfgh.Quality ,Receivers for A-M Stereo .......................
6-86
6-97
6-108
6-116
II
RADIO INTEGRATED CIRCUITS
SELECTION GUIDE TO RADIO INTEGRATED CIRCUITS
Device
Type
ULN-211lA
ULN-2136A
ilLN-2204A
ULN-2240A
ULN-2241A
ULN-2242A
ULN-2243A
ULN-2245A
ULN-2249A
ULX-3804A
ULN-3809A
ULN-3810A
ULX-3840A
ULN-3859A
ULN-3889A
R-F
Mixer
F-M
I-F
X
X
X
X
X
X
X
X
F-M
Del.
,X
X
X
X
X
X
Mutel
Squelch
F-M
Meter
X
X
X
X
X
X
X
Stereo
Decode
A-M
Radio
A-M
Meter
X
X
X
X'·
X
X
-
X
X
,~
X
X
X
X
X
X
X
X
Audio
Amp.
-
X
~f
Mute
X
X
X
X
X
X
X
NOTE: Additional devices for use as F-M radios may be found in Section 7; audio amplifiers may be found in Seciion 8.
&-2
X
ULN-2111A
F-M I-F AMPLIFIER/LIMITER and QUAORATURE DETECTOR
ULN·2111 A F·M I·F AMPL'FIER/UMITER
and QUADRATURE DETECTOR
FEATURES
•
•
•
,•
•
•
•
•
•
Good Sensitivity
Excellent A"M Rejection
Low Harmonic Distortion
Single-Adjustment Tuning
High Gain to 50 MHz
500 mV Recovered AlHlio at 10.7 MHz
Wide Operating Voltage Range
Direct Replacement for ULN-2l13A, MC1357, SN76643
14-Pin Dual In-Line Plastic Package
pROVIDING a multi-stage wideband amplifier/
limiter, an F-M quadrature detector, and an emitter-follower audio output stage, the Type ULN-211IA
is designed for use in F-M receivers or in the sound
I-F of TV receivers:
The Type ULN-211IA amplifier/limiter and quadraturedetector is a. Sprague-originated design, This
circuit was the original monolithic integrated circuit
'F-M detector and' was thefirs't 'integrated circuit to be
used in entertainment electronics, Its outstanding feature is that only a single low-cost tuned circuit is required instead of the previous triple-winding transformer.
'
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee " " " " " " " " " " " ; , , ,,15 V
Package PowerDissipation'PD ' , , , , , , , , " " ' " 670 mW*
Operating Temperature Range, TA , , , , , , " -20°C to +SSOC
Storage Temperature Range, Ts ' " , , , , ,-65°C to +150°(;
'Derate at the rate of 8.3 mW/OC above TA = + 70°C,
NO
DETECTOR
BIAS
CONNECTION
@
FUNCTIONAL
BLOCK DIAGRAM
I-F
DETECTOR
OUT
IN
1- F
BIAS
~
II
I-F
TEST
POINT
DECOUPLE
DE - EMPHASIS
D'IKl.MO. A-IO,186A
6-3
GND
ULN-2111A
F-M I-F AMPLlFIERILlMITER and QUADRATURE DETECTOR
STATIC ELECTRICAL CHARACTERISTICS atTA = +25°C, Vce = +12 V
,
Symbol
Characteristic
Supply Current
Terminal Voltage
Resistance, Detector Output
I·Flnput
I·F,Output
Detector Input
De· Emphasis
Capacitance, I·Flnput '. '."
Detector Input
Icc
VI
V2
V6
V9
VIO
Rl
R,
RIo
R12
Rl, ,
C,
Cl2
.'
,
Test
Pin
13
1
2
6
9
10
1
4
10
12
14
4
12
Test Conditions
Characteristic
Amplifier Voltage Gain
Amplifier Output Voltage
Input Limiting Threshold
Recovered Audio Output
Output Distortion
A·M Rejection
Symbol
A.
V..,
VTH
Vo'"
THD
AMR
Test
Pin
10
10
4
1
1
1
Test
Figure
1
1
2
2
2
3
Typ.
12
4.3
17
5.0
3.65
1.45
150
1.45
200
5.0
60
70
9.0
27
6.3
11
-
-
6.0
-
DYNAMIC ELECTRICAL ~HARACTERISTICS at TA = +25°C, Vcc
fm = 400 Hz, at = ±75kHz,Peak Separation = 550 kHz
Test Conditions
V;n < 300/lV,m.
V;n = 10 mV,m.
V12 = 60 mV,...
100% F·M Modulation
Vin = 10 mV,...
Limits
Max.
Mm.
=
Min.
-
2.7
+12 V, fo
'
Limits
Typ. Max.
53
1.45 400
800
500
1.0
40
-
-
12
L - Inductance
Unloaded Q
D·C Resistance
Type
Cl - Capacitance.
Tee
C2 - Capacitance
R- Resistance
Loaded Network Q
Component Value
TV (4.5 MHz)
F-M (10.7 MHz)
7;0 • 14pH
1.5.3.0pH
50
50
<500
<500
Miller #9050
Miller#9052
120 pF
120 pF
NPO
NPO
4.7 pF
3.0 pF
~.~ KO
20 ko
20
30
6--4
rnA
V
V
V
mV
V
0
ko
0
ko
ko
pF
pF
10.7 MHz,
Units
dB
Vpp
/lV,m.
mV,...
%
dB
NOTES:
1. The input limiting threshold is the F-M input voltage for a recovered audio output which is 3 dB less\!1an the ,recovered audio output for
an F·M input voltage of 200 mV,....
2. The amplitude modulation rejection is determined by: AMRdB = 20 log Vou' for 100% F·M Vln
,
Vou' for 30% A·M Vln
3. See also, General Design Note No.9.
COMPONENT CHART
Units
Notes
1,3
3
3
2
ULN-2111A
F-MI-F AMPLIFIER/LIMITER and QUADRATURE D.ETECTOR
BOONTON 91H
TEST FlGU~E 1
R
BOONTON
1020
A·M/F·M
1----H--1r--f4J--C>-
GENERATOR
TEST FIGURE 2
Ff
vrVM'
~:~O~~F~~~~~~~~~~~
2K
...
1'--:---,
,..
TEST FIGURE 3
6-5
o
ULN·2111A
F·M I·F AMPLIFIER/LIMITER and QUADRATURE DETECTOR
TYPICAL APPLICATION
+12V
0.01
AUDIO
OUT
1- F
IN
o.q
T
o-J
C,
GENERAL DESIGN NOTES
1. Phase shift network is aligned by applying F-M signal through decoupling network to pin 4 (Y4 = 5 mYrms). Tune for maximum re-
covered audio at pin 1 or maximum I-F voltage at pin 11.
2. A doc path of less than 100 0 must be provided between pins 2 and
12. No other biasing provisions are required.
3. A doc path of less than 300 0 must be provided between pins 4 and 6.
No other biasing provisions are required.
4. The maximum a-c load current can be increased by adding an external resistor between pin 1 and ground. The minimum value for this
resistor is 800 0, giving a maximum load current of 4 mArml•
5. All decoupling capacitors should be of the ceramic type with minimum
inductance at the operating frequency.
.
6. Decoupling capacitor leads at pins 2, 5, and 6 should be as short as
possible.
7. Keep appropriate distance between the input (pin 4 and the input
network) and the phase shift network (pins 9, 10, and 12, and the
phase shift inductor).
8. If a high impedance power supply is used (voltage dropping resistor),
decouple pin 13 for the lowest audio frequency.
.
9. The linear detection mode (low signal level at pin 12),.as shown, is
preferred for communications and other commercial applications, due
to the preservation of the tuned circuit bandwidth and better rejection of Gaussian noise. The combination of coupling capacitor (C2)
and .I-F amplifier output (pin 9) was chosen for optimum quieting.
The bandwidth of the phase shift network (peak separation) is primarily defined by the Damping resistor (R). A higher value resistor
will decrease bandwidth, increase the recovered audio output, reduce
the capture ratio, and increase harmonic distortion.
10. The switching detection mode (high signal level at pin 12) features a
greater linear range, increased insensitivity to amplitude variations,
and is recommended for AFC applications or where side responses
must be avoided. Limiting in the quadrature detector will produce
slightly more audio output, but will increase the noise bandwidth and
degrade quieting.
TRANSFER CHARACTERISTICS
LINEAR DETECTION MODE (VII to 80mv,,,,.) - - - SWITCHING DETECTION MODE IVIt .. 600mv..... ) -
6--6
-
-
-
-
ULN-2111A
F-M I-F AMPLIFIER/LIMITER and QUADRATURE DETECTOR
I-F AMPLIFIER GAIN
AS A FUNCTION OF FREQUENCY
70
I I
IIII
e T A ' O·C.
TA • +25 C
~ 60
t::-
-
;;;.--
,-
"!:
z 50
:;;
~ITA
·+70·C
-. r-::_
.............
'"
~ 40
I"'--
::;""
o
>
30
...
~~20
::E
SEE TEST FIGURE I
"""-
.!.. 10
V1n .. IOOfLV rml
Vee' 12 V
o
IK
10K
1M
lOOK
FREQUENCY
IN
10M
100M
A-IO,181
Hz
o
SCHEMATIC
NO
DETECTOR
CONNECTION
BIAS
@
2
DE - EMPHASIS
8.8K
20011
3<
2000
IO.5K
I-F IN
1- F BIAS
I-F DECOUPLE
(~5~---+-"""'+--MIVV-+-+-..,..+-+-+---h
4<
50011
2<
!!DOll
I
DETECTOR
2<
'---.....- ......- -..........I---/.......--''-t.................+---+-.----*--+-CC7r)
PHASE
SHIFT
PHASE
SHIFT
&-7
TEST
POINT
GROUND
OUT
ULN·2136A
F·M I·F AMPLIFIER/LIMITER and QUADRATURE DETECTOR
ULN·2136A F·M I·F AMPLIFIER/LIMITER
and QUADRATURE DETECTOR
FEATURES
• Single Tuning Coil Design
• Good Line and Load Regulation
• Low Harmonic Distortion
• Good Sensitivity
• Excellent A-M Rejection
.400 mV Recovered Audio at 10.7 MHz
• Pin-for-Pin Replacement for MC1356P, LM1841, SN76669
FEATURING improved detector temperature stability, the Type ULN-2136A F-M, I-F amplifier/
limiter and quadrature detector is used wherever AFC
stability and off-station noise are important considerations. These devices consist of a three-stage I-F amplifier/limiter, a quadrature F-M detector, an emitterfollower audio output stage, and a regulated power
supply capable of furnishing up to 20 rnA to external
circuitry. Except for the voltage regulator, the Type
ULN-2136A is similar to the original Type ULN2111A amplifier/limiter and detector.
The Type ULN-2136A is housed in a standard 14pin dual in-line plastic 'A' package.
ABSOLUTE MAXIMUM RATINGS
Package Power Dissipation, Po (Note I) .......... 670 mW
Operating Temperature Range, TA . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts ........ -65°C to + 150°C
Maximum Voltage and Current Ratings at TA = +25°C:
Pin
I
2
3
4
5
6
7
8
9
10
11
l-F
DECOJPL£
Pt1ASE SHIFT
12
13
14
TEST
Voltage Range
in Volts
oto +7.0
-6.0 to +4.0
-1.0 to +20
-6.0 to +2.0
-6.0 to +2.0
-6.0 to +2.0
reference
no connection
-1.0 to +1.0
-6.0 to +2.0
oto +3.0
-6.0 to +7.0
-1.0 to +15
-6.0 to +7.0
Current in rnA
Output
Input
20
5.0
22
1.0
0.5
1.0
1.0
&---8
-
10
10
5.0
1.0
2.0
5.0
10
0
20
3.0
22
1.0
NOTES:
1. Derate at the rate of 8.3 mW/,C above TA =
FUNCTIONAL BLOCK DIAGRAM
IS
10
1.0
0
2.0
0
22
+70°C.
ULN-2136A
F-M I-F AMPUFIERIUMITER and QUADRATURE DETECTOR
STATIC ELECTRICAL CHARACTERISTICS at TA = +25°£,
Characteristic
Symbol
Supply Current
Terminal Voltage
Icc
VI
V2
V6
V9
VIO
VREG
RI
R4
RIO
RI2
R13
R14
C4
CI2
Keslstance, Detector Output
I-F Input
I-FOutput
Detector Input
Power Supply
De-Emphasis
Capacitance, I-F Input
Detector Input
Voltage Regulation
Load Regulation
Voltage Temp. Coefficient
Test
Pin
3
1
2
Vee = +12 V, Test Figure 4.
Min.
Typ.
No Load at Pin 13
12
3.0
-
17
3.8
3.65
1.45
150
1.45
7.8
200
5.0
60
70
4.0
10.5
11
-
-
2.7
-
-
5.0
-30
+1.5
+1.5
-
-
6
9
10
13
1
4
10
12
13
14
4 -.
12
13
13
1
13
Limits
Max.
Test Conditions
125
1.25
7.2
it3 =5 rnA
-
-
8.4
113
20 rnA
ita = 0 to 20 rnA
=
-
-
113 = 0
DYNAMIC ELECTRICAL CHARACTERISTICS at TA = +25°C,
23
4.6
180
1.65
8.3
Units
rnA
V
V
V
mV
V
V
-
0
-
ko
0
-
ko
12.6
ko
pF
pF
mV/V
mV
mV;oC
mV;oC
0
10
-
Vee = +12 V, fo = 10.7 MHz,
fm = 400 Hz, t..f = ± 75 kHz, Peak Separation = 600 kHz
Characteristic
Amplifier Voltage Gain
Amplifier Output Voltage
Input Limiting Threshold
Recovered Audio Output
Output Distortion
A-M Rejection
Test
Pin
Test
Figure
A.
10
Vovt
10
4
1
1
1
1
1
2
Symbol
VTH
Vout
THD
AMR
2
2
3
Yin
Vin
Test Conditions
Min.
Typ.
<300!LV,m.
10 mV,m.
-
53
1.45
400
400
1.0
40
=
-
VI2 = 60 mV;m,
100% F-M Modulation
Vin = 10 mV,m.
300
-
Limits
Max.
800
500
3.0
-
Units
dB
Vpp
!LV,m.
mV,m.
%
dB
NOTES:
1. The input limiting threshold is the F-M input voltage for a recovered audio output which is 3 dB less than the recovered audio output for
an F-M input voltage of 200 mV,m •.
2. The amplitude modulation rejection is determined by: AMRdB ~ 20 log
3. See also, General Design Note NO.9.
6-9
Vo", for 100% F-M Vin
Vo,' for 30% A-M Vin
Notes
1,3
3
3
2
ULN-2136A
F-MI-F AMPLIFIER/LIMITER lind QUADRATURE DETECTOR
Vee
JO.1
BOONTON
102D
A-M/F-M
GENERATOR
O~.
MO. A-9C620
TEST FIGURE 1
Vee
120
3.9K
BOONTON
l02D
A-M/F-M
GENERATOR
DWG.II0.A-9063D
TEST FIGURE 2
ULN-2136A
F-M I-F AMPLIFIER/LIMITER and QUADRATURE DETECTOR
VTVM ...
~
40,:
.
-::
'.
2K
-::
0.1
BOONTON
102D
G~-~fR~:OR r------i \
·r
'....:...J
O~'G.
tEST F.IGURE3
TEST FIGURE 4
6-11
"0. A--906I.1-D
UlN-2136A
F-M I-FAMPlIFIERlUMlnR and QUADRATURE DETECTOR
GENERAL DESIGN NOTES
1. Phase shift network is aligned by applying F·M signal through de·
2.
3.
4.
5.
6.
7.
phase shift inductor).
8. If a high impedance power supply is used (voltage dropping resistor),
decouple pin 13 for the lowest audio frequency.
9. The linear detection mode (low signal level at pin 12), as shown, is
preferred for communications and other commercial applications, due
to the preservation of the tuned circuit bandwidth and better rejec·
tion of Gaussian noise. The combmatlon of coupling capacitor (C2)
and I·F amplifier output (pin 9) was chosen for optimum quieting.
The bandwidth 01 the phase shift network (peak separatIOn) IS Prl'
marily defined by the Damping resistor (R). A higher value resistor
will decrease bandwidth, increase the recovered audio output, reduce
the capture ratio, and increase harmonic distortion.
10. The switching detection mode (high signal level at pin 12) features a
greater linear range increased insensitivity to amplitude variations,
and is recommended for AFC applications or where side responses
must be avoided. Limiting in the quadrature detector will produce
slightly more audio output, but will increase the noise bandwidth and
degrade quieting.
coupling network to pin 4 (V. ~ 5 mV,m.). Tune for maximum reo
covered audio at pin 1 or maximum I·F voltage at pm 11.
A d·c path of less than 100 I) must be provided between pins 2 and
12. No other biasing provisions are requi red.
A d·c path of less than 300 I) must be provided between pins 4 and 6.
No other biasing provisions are required.
The maximum a·c load current can be increased by adding an exter·
nal resistor between pin 1 and ground. The minimum value for this
resistor is 800 I), giving a maximum load Cllrrent of 4 mArm•.
All decoupling capacitors should be of the ceramic type with minimum
inductance at the operating frequency.
Decoupling capacitor leads at pins 2, 5, and 6 should .be as short as
possible.
Keep appropriate distance between the input (pin 4 and the input
network) and the phase shift network (pins 9, 10, and 12, and the
TRANSFER CHARACTERISTICS
LINEAR DETECTION
MODE (V,• •
60mv,mll - - - - - - -
SWITCHING DETECTION MODE (V 12 .600fnVrm .1 ~...,;.
6-12
MO. A_ 10. lao
ULN-2136A
F-M I-F AMPLIFIER/LIMITER and QUADRATURE QETECTOR
SCHEMATIC
PHASE
SHIFT
PHASE
SHIFT
6-13
UlN-2204A A-M/F-M RADIO SYSTEM
ULN·2204A A·M/F·M RADIO SYSTEM
FEATURES
•
•
•
•
•
•
•
Low Harmonic Distortion
Wide Operating Voltage Range
Low Power Drain
D·C A·M/F·M Switching
30 fAV Limiting Threshold
Excellent A·M Rejection
Interchangeable With HA12402,
T1\7613 , TDAI083, U417B
Type ULN-2204A will work with a wide range
of supply voltages, and is suitable for use in a-c
powered table radios and in battery-powered (6
or 9 V) portable radios.
This system will operate at supply voltages as
low as 2 V at reduced volume without significant
increase in distortion. Brown-outs or weak batteries need no longer be a major concern.
Type ULN-2204A is housed in a 16-pin dual
in-line plastic package with a copper lead frame
that eliminates many decoupling problems and
allows maximum power dissipation.
pROVIDING ALL radio functions except VHF
tuning, Type ULN-2204A A-M/F-M radio
system excels in low-cost applications requiring a
minimal parts count and high performance.
In the A-M mode of operation, the device is a
complete single-conversion superheterodyne
broadcast or shortwave receiver with AGC and
peak envelope detection. In the F-M mode, Type
ULN-2204A operates as a high-gain I-F
amplifier/limiter and phase-shift detector. A
simple doc switch is used to change mode of
operation.
A single external capacitor at pin 16 provides
the A-M AGC time constant, the F-M AFC time
constant, and R-F decoupling. A single resistor
at the same pin will adjust the A-M gain for optimal system performance.
The audio power amplifier will work into any
speaker load of 8Q or greater. Class B operation
of the audio power amplifier yields high efficiency at rated output with very low quiescent power
drain. The amplifier exhibits little crossover
distortion. Its output impedance is significantly
less than one ohm.
ABSOLUTE MAXIMUM RATINGS
. ...... (Note 1)
Supply Voltage, Vee ..
. ..... 60 mA
Zener Current, IREG .
Package Power Dissipation, PD (Note 2) .
. .1.0 W
Operating Temperature Range, TA .
.-20°C to +85°C
Storage Temperature Range, Ts .
.. -65°C to + 150°C
NOTES:
I. Dependent on value of external current limiting resistor, 13 Vat QQ.
2. Derate at the rate of 15 mW/oe above TA = +70°C.
6-14
UlN-2204A A-M/F-M RADIO SYSTEM
ELECTRICAL CHARACTERISTICS at TA = + 25°C,
Vee = 6.0 V, Rs = 00, R16 = 1.2 kQ (unless otherwise noted)
Limits
Characteristic
F·M MODE: fo
Test Conditions
= 10.7 MHz, fm
Input Limiting Threshold
Detector Recovered Audio
Detector Output DistortIOn
I·F Input Impedance
I·F Input Capacitance
Quiescent Terminal Voltage
A·M MODE: fo
= 1 MHz
Sensitivity
Detector Recovered Aud io
Overload Distortion
Usable Sensitivity
Mixer Input Impedance
Mixer Input Capacitance
Mixer Output Impedance
Mixer Output Capacitance
I-F Input Impedance
I-F Input Capacitance
Quiescent Terminal Voltage
Quiescent Supply Current
-
V" = 10 mV rms
Vin = 10 mV rms . 30% A·M.
I,.m = 400 Hz
Icc
fil
35
-
Vee = 6.0 V
Vee = 9.0 V
= 455 kHz, fm = 400 Hz, 30%
Max.
30
250
1.0
60
50
40
4.0
2.1
-
/-IV
mV
%
-
dB
-
kQ
-
pF
V
V
mA
mA
1.7
-
20
-
14
18
-
5.0
150
10
10
-
25
4.5
5.5
25
3.0
100
3.0
35
/-IV
-
kQ
-
kQ
1.3
1.7
-
A·M
Vout(B) = 20 mVrms
Vo
Zo
Co
Z4
C4
Zz
Cz
Vi
VB
Icc
-
-
Z2
C2
Vi
VB
Quiescent Supply Current
Typ.
= 400 Hz, fd = ±75 kHz, Peak Separation = 550 kHz
Vth
Vo
THDD
AMR
A·M ReJection
Min.
80% A-M, also see "ULN-2204A
Variations"
20 dB S+N/N
See Note
-
-
-
/-IV
mV
mV
pF
-
pF
-
kQ
-
pF
V
V
mA
mA
-
10
13
-
36
40
44
-
50
350
650
-
dB
mW
mW
mW
%
-
Vee = 6.0 V
Vee"; 9.0 V
-
-
AUDIO AMPLIFIER: fo = 400 Hz, Rl = 8Q
Aud io Gain
Output Power
Output Distortion
A-F Input Impedance
Quiescent Terminal Voltage
Ae
Po
THO
Zg
Vee = 3.0 V, 10% THD
Vee = 6.0 V, 10% THD
Vee = 9.0 V, 10% THD
Po - 50 mW
250
500
-
VlO
-
ViZ
NOTE' For optimum nOIse match, source Impedance should be 2.5 kQ.
&---15
2:0
250
-
kQ
1.1
-
2.6
-
V
V
UlN-2204AA·M/F·M RADIO SYSTEM
TEST CIRCUIT
A-M
F-M IN
~J-~~
A-M INo-j...,....",----~-I
_____
+--_~>-oVcc
f-=-to----lJeJ--oLMi:'J
'See "UlN-2204A Variations"
COIL WINDING INFORMATION
~WG.
HO. A- 10. 3l{l
Tl A-M First I-F
455 kHz
Qu = 120
NI:N2:N3 = 15.5:2.8:1
Ct = 180 pF
General Instrument
Part No. EX 27835
Toko Part No.
RMC-2A764IA
T2 A-M Second I-F
455 kHz
Qu = 70
NI:N2 = 2:1
Ct = 430 pF
General Instrument
Part No. EX 27836
Toko Part No.
RLE-4A7642GO
T3 F-M Detector
10.7 MHz
Qu = 50
Ct = 100 pF
T4 F-M Detector
10.7 MHz
Qu = 50
Ct = 100 pF
Generallnstrument
Part No. EX 27640
General Instrument
Part No. EX 27640
Toko Part No.
BKAC-K3651 HM
Toko Part No.
BKAC-K365IHM
LI A-M Oscillator
1455 kHz
Qu = 50
NI:N3 = 10.7:1
Ct = 39 pF
General Instrument
Part No. EX 27641
Toko Part No.
RWO-6A7640BM
6-16
ULN-2204A A-M/F-M RADIO SYSTEM
FUNCTIONAL BLOCK DIAGRAM
A-M
I-F
OUT
OSc.
I-F
IN
A-M GAIN ADJ.
AGC/AFC
II
R-F
DECOUPLE
LOW-LEVEL I-F
I-F DETECTOR DETECTOR HIGH-LEVEL
GND
DECOUPLE OUT
IN
OUT
G ND
ow;.;.
~~
~l
A-F
IN
A-F
DECOUPLE
-NO. A+ IO.12E
PIN 16 OUTPUT VOLTAGE, VI6
A-M
Operation
Complete Part Number Including Suffix
F-M Operation
2.20-2.65 V 2.55-3.05 V 2.95-3.40 V
ULN-2204A-11 UlN-2204A-21 UlN-2204k31
UlN-2204A-12 UlN-2204A-22 UlN-2Z04A-32
UlN-2204A-13 UlN-2204A-23 UlN-2204A-33
1.40-1.75 V
1.65-2.00 V
1.90-'2.25 V
,
TYPICAL AUDIO POWER OUTPUT
TYPICAL QUIESCENT SUPPLY CURRENT
1.2
24
/
0
«
E
;; 16
0'0'<-
2
,/
/'
,
,
f""
V
... ~ V
/
'"
>!'-0'O'<-
V
THD=lO%
~,'"
10
6
":=
o" o.4
'"
~
.. 0,
I
o
o
/ /'/
,~i.
I
..:
,"
....
10
2
12
SUPPLY VOLTAGE; Vee' IN VOLTS
~
~V
If
V
SUPPLY VOLTAGE. Vee. IN VOLTS
&-17
/
10
12
ULN-2204A VARIATIONS
FOR OPTIMAL SYSTEM
'PERFORMANCE
.
.
In addition, some system designs derive the
F-M tuner supply, tuner bias, or AFCvoitage
from pip 16 output of Type ULN-2204A. For
example, if the tuner design requires 2.4 V at 2.0
mA (an equivalent R16 of 1200Q) , th~ graph
below indicates a Type ULN-2204A-IX is required. A -2X or -3X device could also ,be used
by paraiIeling the equivalent l200Q tuner load
with a fixed resistance for an 830Q load or a
520Q load, respectively. For AFC applications,
note that as frequency increases, V16 'voltage
decreases. The amount of change is a factor of
load impedance, detector coil characteristics,
and part grouping.
In A-M operation, stability is seldom a problem. However, large-signal overload can be op; ..' timized (to typically 30 mV) by matching the
particular part group with an appropriate load
resistor at pin 8. The A-M grouping of a device
.,
is identified by the sec'ond digit of the partnumber suffix (the "I" in ULN-2204A-3l).
The receiver system's performance can be
kept within tighter performance limits by match- .
ing bias groupings and appropriate external
resistors (Rg and RI6). With proper matching of
parts and lots, consistent. device p~rformance
can be obtained, Bias groups for Type ULN"
2204A are shown in the table below. There are
three selections for each mode of operation and
nine possible combinations.
Sprague. Electric Company recommends that
customers do not specify particular selections
except in unusual circumstances. All parts
manufactured with Sprague part numbers· are
branded with appropriate part-number suffixes.
Any shipment to a customer will consist of parts
from a single selection (single suffix).
The first digit of the suffix (the "3" in ULN2204A-31) refers to F-M performance. ,It In-.
dicates F-M gain and pin 16 output voltage as
functions of the pin 16 load resistance, (See
graph on next page.)
.
For ~x 1, Rs should be 00.
For-X2, Rg should be 47 kQ.
Fw -X3, Rg should be 33 kQ.
F-M circuit stability is inversely related to gain
or sensitivity and is affected by sQUI'ce and load
impedances, decoupling, ". and printed wiring
board layout. After an optimal F-M I-F gain is
determined for a particular circuit design, that
gain can be attained by matching the partnumber suffix and the pin, 16 10114,
Additional loading may raise the overload
point slightly, but AGC and sensitivity will be
compromised. For any fixed value of Rg, -X3
parts will exhibit slightly higherA-M gain, while
-Xl pa~ts will hayeslightly lower A-M~ain.
TYPI<;:AL F-M I·F GAIN CHARACTERISTIC
F-M GAIN (dB)
3.2
73
3,0
72
2.8
71
...0
II'
~v J/ / .
1
> 2.6
70
2.4
'.
.
69
~
~ ~z~~i/
~,j'
;
~
'>'"
;v
~
II>
I-
/
~;V
}j
1;.~
~ ~'v~~
V
10'
".
~
$'j
.
:/ V V
J V
200
300
500
~
800
R16 IN OHMS
6---18
:
1K 1.2K
2K
3K
5K
DWG. NO. A-II. 351.1-
ULN-2204A A-M/F-M RADIO SYSTEM
TYPICAL APPLICATION
radiating R-F noise in the A-M spectrum.
An A-M/F-M radio using the ULN-2204A
receiver system, designed for a usable F-M sensitivity of about 4 IAV and an A-M sensitivity of
350 IAV1m, appears on the next page.
The two-stage F-M tuner is operated at about
4 V. Reducing the pin 16 voltage to 1.8 V (by
changing R 16) reduces interstation noise and the
F-M I-F gain. An inductor at pin 12 (L6)
prevents the wide-band audio amplifier from
The tuning indicator below may be added to
the radio circuit to provide an LED indication
when the received signal strength exceeds 7 IAV in
the F-M mode or 700 IAV 1m in the A-M mode.
The tuning indicator cir-cuit reduces the I-F gain
by about 2 dB. The sensitivity may be adjusted
by changing the value of Cl or C2.
TUNING INDICATOR
. - - - - - - - - - - - - + - - - _ - - 0 + 6V
lK
D\','6. 110.
A~II,
355
COIL AND TRANSFORMER INFORMATION
FOR TYPICAL APPLICATION
II
F·M Antenna Coil
417 turns, #20 AWG (0.8 mm), 0.216" (5.5 mm) 0
l2
F·M R·F Coil
317 turns, 1120 AWG (0.8 mm), 0.177" (4.5 mm) 0
l3
l4
l5
l6
F·M I·F Trap
16'1, turns, 1124 AWG (0.5 mm), 0.177" (4.5 mm) 0
F·M Oscillator Coil
217 turns, 1120 AWG (0.8 mm), 0.177" (4.5 mm) 0
F·M Detector Coil
15 iJH, Qu = 120
Audio Choke
l7
A·M Antenna Coil
Tl
T2
F·M
F·M
A·M
F·M
A·M
A·M
10 iJH, Qu = 2 @ 2.52 MHz;
3 turns through ferrite bead
Qu = 250, 110:10 turns ratio;
Q2B core, 3.5" (90 mm) x 0.394" (10 mm) 0
82 pF, Qu = 90 @ 10.7 MHz, 11:3 turns ratio
390 pF, Qu = 75 @ 10.7 MHz, 5:2 turns ratio
390 pF, Qu = 130 @ 455 kHz, 100 turns center·tapped
150 pF, Qu = 90 @ 10.7 MHz
460 iJH, Qu = 120 @ 796 kHz, 110:11 turns ratio
180 pF, Qu = 145 @ 455 kHz, 155:10 turns ratio;
primary tapped at 127 turns
T3
T4
T5
T6
I·F Transformer
I·F Transformer
Detector Coil
Detector Coil
Oscillator
I·F Transformer
6---19
@
2.52 MHz
c±
r"!'
Z,.
I
""
to.)
F-M ANT.
4~7 47
0
150K
ED-1502B/C
ED-1S02B/c
/"'-. 221l
10
""
)Iio
T2
~
"
330
L1
~
3.3
K
Il
30
~.
3;
:a
330
:I>
E
L4
I
I
I
....
.01
**
°1
~'680Jl
Vee
+6V
1K
'R16 .2
470-
~
2.2
K
'-
I
I
I
I
I
r
'-
/
0
.02T
. . 1~
OA-M :04J...
l,
..H-
It
~
I
I
I
c:::>
20
220
J
loa
1
02
I
I
I
A-M ANT.
I
I
8Jl
140
tlJ"L7
::
l.
I
........
-v
::
/
'-
• II
'-
1K
'-
'- '-
'
'-......
-""'1<'-'--"
......
...... /
I
T
1
02
"Required only for
Dw9. N·:). D-I107
Vcc~9V.
··I·F gain·dependent: See "UlN-2204A Variations".
TYPICAL APPLICATION
I
'"
i
DETECTOR
OUT
Vcc
"
'+I-~
400
REGULATOR
Q
62
DETECTOR
r'"
R-F
DECOUPLE
Vcc
500
210
1.2K
750
I
- - - - -I
I
I
SHUNT
REGULATOR:
13
Vee / VREG
....c::Z
I
I
La.v-lEVEl
GROUND
70
I_t
~
~
I
___ -.l
)
i'.:I
@
A-F
OUT
A-F
o
t
~
~
IN
7'
rI
@
HIGH- LEVEL
GROUND
D'f/G. MO. C_1263A
SCHEMATIC
==
~
C
o
~
V>
-I
'"
==
CI
ULN-2240AA-MlF-M SIGNAL PROCESSOR
ULN-2240A A-M/F-M SIGNAL PROCESSOR
FEATURES
• 12 /LV Limiting Threshold
• Tuning-Error and Signal-level Muting
• Zero-Tune Meter Drive
• Balanced A-M Mixer
• 5 /LV A-M Sensitivity
• D-C Mode Switch ing
• Internal Voltage Regulator
• Meets Dolby® Noise Requirements
• 20-Pin Dual In-Line Plastic Package
The signal processor combines F-M I-F receiver
functions and all A-M radio functions in a single
monolithic integrated circuit. The system's audio
output stage uses low-noise biasing that meets
Dolby® receiver noise requirements.
pREMIUM PERFORMANCE features such as delayed AGC for the R-F stage, an AFC drive
circuit, interstation (signal level) muting, and offchannel (tuning error) muting, are offered by Type
ULN-2240A.
®Registered Trademark, Dolby Laboratories, Inc.
DETECT
I-F
MUTE ADJ.
IN~
BIAS
DELAYED
AGe
AllDIO
OUT
l-F IN
lOW-LEVEL
GROUND
l
Q:6)
A-M
MIXER
AFC/
MIXER BIAS/Ave
~
SUB.
HIGH-LEVEL
GROl'ND
A-M
DECOl'PLE
METER
DWG: ~O. A_ 10796
OUT
FUNCTIONAL BLOCK DIAGRAM
&--22
ULN-2240A A.M/F-M SIGNAL PROCESSOR
The A-M mixer is a balanct: 55
6
See Note
40
-1.0
6
V;, = 100 /.LV, max. mute
-45
Vin - 5.0 /.LV, max. mute
I1f;. .
. Max. mute
100
Mute Bandwidth
6
3.5
I-F Input Voltage
V,
No Signal
2
3.6
No Signal
4.2
Mute .Outpot Voltage
14
V[4
No Signal
4.2
5.5
4.S .
AGCQutput .Voltage
15
V[5
,0.5
V;, = 10 mVrms
0.5
Mute OutDut Cu rrent
I
14
No SlIwal
No Signal
1.0
Avail. AGC Output Current
115
15
No Signal
26
40
Supply Cu rrent
Icc
..
A-M MODE· f -- 1 MHz, flf - 455 kHz , fm - 400 Hz, 30°Yo A-M, VI, -- 1 0 mVrms (unless otherWise speCified)
S.5
V;,
lS
V,", = 50 mVrms
5.0.
Sensitivity
6.0
20 dB S+N/N
Usable Sensitivity
lS
600
250
325
Recovered Audio
6
SO% A-M
Voul
SO% A-M, THO = 10%
25
50
lS
Il1!utOverload
Yin
No Signal
1.0
A-M Decoupling Voltage
V
1
No Signal
3.7
I-F Input Voltage
V
2
0.5
No Signal
Mute Output Voltage
V14
14
No Signal
0.5
AGC Output Vpltage
15
VIS
No Signal
1.6
1.S
2.1
A-M Bias Voltage
V17
17
16
30
No Signal
Supply Current
Icc
Characteristic
Symbol
Operating Voltage Range
Vee
V,
Audio Output Voltage
Regulator Output Voltage
VREG
Avail. Reg: Output Current.
IREG
F-M MODE: f, = 10:7 MHz; f" '= 400 Hz, fd
Input Limiting Threshold
V"
Recovered Audio
V
Output DistOrtion ..
THO
OutDut Noise
S +N/N
A-M Reiection
AMR
Mute
I1V,uI
Units
V
V
V
rnA
/.LV
mV
.%
dB
dB
dB
dB
kHz
V
V
V.
V
rnA
rnA
rnA
-
..
Note:
Amplitude Modulation Rejection is specified as 20 log
VOU!
/.LV
/.LV
mV
mV
V
V
V
V
V
rnA
for.. loo% F.M·Vi•
f 30. A MV
VoLlt or Yo· - in
COIL WINDING INFORMATION
Tl
A·M 1-F
455 kHz
au = 45
Ct := 1000 pF
T2
F-M Detector
10.7 MHz
au
Ct
Ll A-M Oscillator
1455 kHz
L2
F-M Detector
10.7 MHz
'=
60
= S2pF
au = 50
N1:N2 = 11:1
Ct = 39 pF
L = lS /.LH
au = 55
General Instrument
Toko Part .No.
Part No. .EX 27765 . RXN-6A6909HM
·Gen~rat Instrument
Part No. .E~ 27975
Toko Part No.
TKAC·17044Z
General Instrument
Part No. EX 27641
Toko Pa rt No.
RWO-6A7640BM
Coilcraft Type V
6-24
J~:;.
~O.
A-IO.
~2~
ULN-2240A A·Mlf-M SIGNAL PROCESSOR
SMALL-SIGNAL A-C CHARACTERISTICS at TA='~ +25:~C ,
Characteristic
I-F Input Capacitance
I-F Output Resistance
I-F output Capacitance;J
Audio Output Impedance
Test
Pin
Symbol
Cz
Rlz'
CIZ
2
12
12
6
Z.
-
F M MODE:'• - 107 MHz
I-F Input Resistance
R~
gm
RlI
cll
'I~F Transcondifct~nce
Detector Input Resistance
uetector Input !;apacltance,
.
susceptance.
,
..
..
,
; <.
".:
'
.
Typ.
-
250
2.5
6.2
-
kU
-
kn
,10
8.0
100
1.5
-
mho·
-
kn
-
pF
mrnho·
-
,
,
-
,"
-
'.
11
,
Limits
Max:
6.0
-
Min,
-
-
2
2-12
11
A-M MODE·'• = 1 MHz ,,'I = 455 kHz
A-M Input Resistance
RIg
A-IV\ mput capacitance
GIS
IVIlxer ltansconauctance
gm
RI9 "
Mixer Output Resistance
Mixer uutput Capacitance
Cl9
I-F Input Resistance
Rz
I-F Transcond~ctance
gm ,"
"'R]]
Detector Input Re~l$tance
Detector Input Capacitance,
Cll
I·
·Th~ tntern~tlOnal
Test ,Conditiorrs
,
,;
-
Units
pF
pF
kfi
kn
pF
(t
l8
liS
llS-19
19
19
-
.
'-
-
,
-
2
2-12
.{i
..•.
11
'.
11
:.~
,
'.'
,.
"
-
. 5:0
20
15
Spa.
5.0
15
160
250
1.0
-
kH
pF
kn
-
mmho·
-
kfi
-
pF
EtectroteehOlCllt CommiSSIOn recommends,tM ose' of ,Siemens (S),as tbe standard internatIOnal umt of conductance, ad mlttance and
.
' . '.
D
~J--i>---II-~+--o
"
TEST Cl,RCUtT
AUDIO OUT O--+--'--_>-V'vv---\
,liFe i M'ETER
.OUT
~U-..,.....,----i--+-O AGe OUT
o--f---+--'-....._--'--,---cn
i
~25
A- MIN
Filte.:iAssembly:
.
Tako Part' No. CFU455C~82BR
ULN-2240A A;M/F-M SIGNAL PROCESSOR
A-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
10
I I IIIIIII
II
RECOVERED
o
~
-10
L
-20
~
""
V
i
I
1
j
I
~
-30
~~
,i
i
11
~
i 1~~
-40
I
I
-50
--
THO
"'~"'
I
-60
AUDIO, Vou •
I'"
~
I
1
10
A-M
MODE
o dB
• 325mV
S+N
'I'. t-.
I
VV
II
II<
100
I
10K
lOOK
INPUT VOLTAGE, Vm IN flV
F-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
o
IV
-10
I--'"
RECOVERED
AUDIO, Vou •
F-M
-20
-30
!I
MODE
o dB
II
• 425 mV
l/
V
--..... 1\
OUTPUT NOISE
-40
I
1\1\
i
J
1\
-50
~ ~
i"-
J
II
1
A-M REJECTION
/,1""-
-60
\
10
100
I
1'\
If
1\
I
r l'r-,I'
TO ctldS
INPUT VOlTAGE, Vi,
6-26
i
I
IK
IN~V
10K
lOOK
ULN-2240A A-M/F-M ·SIGNAL PROCESSOR
A-M CONTROL VOLTAGES
AS FUNCTIONS OF INPUT VOLTAGE
2.0
T~'N~ ~~TIJ~ IlvOLTA~', I Jf~';
,....
&
.1/
......
K
V
F0-
5
r- t-
ve
If
1/
0
V
-O.!S
IK
100
INPUT VOLTAGE, V.,. IN JAV
10
I
VOLTAGE~ ~11
lOOK
10K
F-M CONTROL VOLTAGES
AS FUNCTIONS, OF INPUT VOLTAGE
5 .0
I I III
,
'-M MODE
[\
.or-
~
.
.0
\
~
.0
I,t
\
.
.-:.
.0
I\~
~
~
,~
0
"
10K
IK
100
10
, INPUT VOlTAGE, VI~,55
-
%
dB
",V
mV
Output Distortion
THO
5
A-M Rejection
AMR
5
See Note 2
I-F Input Voltage
VI
VIO
1
No Signal
-
3.5
-
V
10
No Signal
4.2
4.8
-
-
V
V
10
V" = 10 mV rms
No Signal
5.5
0.5
1.0
-
-
mA
No Signal
-
23
35
..
mA
",V
AGC Output Voltage
Avail. AGC Output Current
110
Supply Current
lec
A·M MODE: f.
= I MHz, fij = 455 kHz, fm
Sensitivity
- 400 Hz, 30% A·M, Vin
13
V"
Useable Sensitivity
VOUI
Input Overload
V"
VI6
1.0 mV,... (unless otherwise speCified)
V"I = 50 mV rms
20 dB S + N/N
13
Recovered Audio
-
-
5.0
8.5
-
6.0
-
",V
325
550
mV
mV
V
5
13
80% A-M
250
80% A-M, THO - 10%
25
50
16
No Signal
1.0
3.7
-
1
No Signal
AGC Outpu' Voltage
VI
VIO
10
No Signal
-
-
0.5
A-M Input Voltage
Vl2
12
No Signal
1.6
1.8
2.1
V
No Signal
-
16
30
mA
A-M Decoupling Voltage
I-F Input Voltage
Supply Current
Icc
Notes: I. Differential Audio Output is specified as 20 log
2.
V
V
V for 10 mV F-M V
in
out
Vout for 1.0 mV A-M Yin
Amplitude Modulation Rejection is specified as 20 log
V for 100% F-M V
in
oul
Vout for 30% A-M Yin
COIL WINDING INFORMATION
Tl A-M I-F
455 kHz
Qu = 45
Ct = 1000 pF
General Instrument
Part No. EX 27765
Toko Pari No.
RXN-6A6909HM
T2 F-M Detector
10.7 MHz
Qu = 60
Ct = 82 pF
General Instrument
Part No. EX 27975
Toko Part No.
TKAC-17044Z
Ll A-M Oscillator
Qu = 50
Nl:N2 = 11:1
Ct = 39 pF
General Instrument
Part No. EX 27641
Toko Part No.
RWO-6A7640BM
L = 27 ",H
Qu = 55 @ 2.5 MHz
General Instrument
Part No. EX 27764
Toko Pari No.
154AO-7A6115HM
1455 kHz
L2 F-M Detector
10.7 MHz
v\'.\i.
6--31
~O.
11._ 10. 428
UlN-2241A A-MiF-M SIGNAL PROCESSING SYSTEM
SMALL-SIGNAL A-C CHARACTERISTICS at TA - +25°C
Symbol
Test
Pin
I-F Input Capacitance
CI
I
I-F Output Resistance
I-F Output Capacitance
Rs
Cs
Audio Output Impedance
Zs
8
8
5
Characteristic
F·M MODE: '.
Test Conditions
Min.
-
-
Max.
6.0
250
2.5
860
-
10
8.0
100
1.5
-
Units
pF
kQ
pF
Q
= 10.7 MHz
I-F Input Resistance
RI
I
-
I-F Transcond'uctance
gm
Detector Input Resistance
R7
C7
1-8
7
7
-
-
Detector Input Capacitance
A·M MODE: '.
Limits
Typ.
= 1 MHz. 'M ""
kQ
mho'
kQ
pF
455 kHz
A-M Input Capacitance
RI3
CI3
Mixer Transconductance
gm
Mixer Output Resistance
Mixer Output Capacitance
Rl4
Cl4
13
13
13-14
14
14
I-F Input Resistance
Rl
I
I-F Transconductance
gm
1-8
7
7
A-M Input Resistance
-
5_0
-
kQ
20
15
500
5.0
15
160
250
1.0
-
mmho'
pF
kQ
-
pF
-
kQ
-
mmho'
kQ
R7
Detector Input Capacitance
pF
C,
*The InternatIOnal Electrotechnlcal Commission recommends the use of slernens (S) as the standard international Unit of conductance, admittance and
Detector Input Resistance
-
susceptance.
470
'·M
IN
~~-----+--O~~M
TEST CIRCUIT
A~~~O Q-----7----.L------./\N--t-\
vcc
Q----L--------____+-4
'~{gu-~~--------+_-o~~;
:t
O~(j.
Filter Assembly:
Toko Part No. CFU455C·82BR
6--32
M:l. 4-10.718
0.05
ULN-2241A A-MlF-M SIGNAL PROCESSING SYSTEM
F-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
vr
-10
RECOVEREO
AUDIO,
VOlt
11
F-M MODE
o dB. 425mV
-20
-30
I
,,/
V
I
..........
OUTPUT NOISE
-40
-50
-60
A-III REJECTION
II
\
-70 ,
r-..
J
I
I
10
100
1\ lo
-8~dB
/'~IIIIII
IK
Ittffl
V- i'
lOOK
10K
INPUT VOLTAGE, 'lin' IN JAY
II
A-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
0
I I 1III1II
RECOVERED
0
AUDIO,
VOllt
V
-I 0
V
-2 0 /
1"i\
-3 0
I
0
-40
"I'
-50
-60
THO
_r-
"
10
V
A-M
MODE
o dB •
S+N
I
I"
I
v
100
IK
INPUT VOLTAGE. V,n' IN jJ.V
6--33
10K
32~mV
II
lOOK
AGC OUTPUT VOLTAGE
AS A FUNCTION OF INPOT VOLTAGE
,
5.0
JI
F-M MODE
r\
4.0
,.
Gl
"g
3.0
%
<:
2.0
0
~
~
1;
1.0
~
100
10
IK
INPUT VOLTAGE, V", IN
I OK
lOOK
~V
D'II'G. NO. A-IO.721
AVC VOl.TAGE
AS A FUNCTION OF INPUT VOLTAGE
2. 0
~
I'r-
I. 5
~
I. 0
....
r--
..
O. 5
0
~
Ave
VOlTAg~,
V l2
A-M MODE
11111
-0. 5
10
100
lK
INPUT VOLTAGE, V", IN
6-34
~V
10K
DWG ...~. A-10.720
lOOK
I-F OUT
Vee
V REG
Vee
A-M
I,
Mc'fu\R @
A-M
OSC.
LOW-LEVEL
GNO
@
MIXER
BIAS
••
t
I
DETECT IN
. .;.,
@I---~-------••-~
.. ., ...
~~!l r=J I
AJ
JI ~
I
I
~
Vee
r
<..n
c:
r-
~
N
,...---@
,f,
HIGH-LEVEL
GNO
N
....
l>
.j::o
'i'"
~
7'
SCHEMATIC
"10'
DELAYED
3:
r-'g
OWG.NO.D-I099A
~
t"'I
m
55
-
-
-
-1.0
-45
220
-
-
-
600
3.6
4.2
3.5
4.2
4.8
-
-
-
5.5
0.5
0.5
1.0
-
-
-
-
-
23
35
dB
dB
dB
mV
V
V
V
V
mA
mA
mA
350
-
See Note
Vin = 100/LV, max. mute
Vin = 5/LV, max. mute
No Signal
No Signal
No Signal
Vin = 10 mVrms
No Signal
No Signal
No Signal
30% A-M, Vin
=
1.0 mVrms (unless otherwise specified)
= 50 mVrms
20 dB S+N/N
80% A-M
80% A-M, THD - 10%
Vou
No Signal
No Signal
No Signal
No Signal
No Signal
No Signal
Note:
VoutV out for 100% F-M Vin
Amplitude Modulation Rejection is specified as 20 log
Vout for 30% A-M Yin
&-38
-
%
-
-
250
25
-
-
1.6
-
5.0
6.0
325
50
1.0
3.7
-
1.8
16
8.5
-
600
-
0.5
0.5
2.1
30
/LV
/LV
mV
mV
V
V
V
V
V
mA
ULN-2242AJTDA1090
A-MlF-M SIGNAL PROCESSING SYSTEM
SMALL-SIGNAL A-C CHARACTERISTICS at TA
Characteristic
I-F Input capacitance
I-F Output Resistance
I-F Output Capacitance
Audio Output Impedance
Symbol
G,
Rl1
GI,
Ze
= +25°C
Test
Pin
Limits
Test Conditions
Min.
z
-
12
12
6
-
2
2-12
11
-
!I
-
-
Typ.
6.0
250
2.5
860
Max.
-
Units
pF
k!1
-
pF
-
!1
F-M MODE: t, =10.7 MHz
I-F Input Resistance
I-F Transconductance
Detector Input Resistance
uetector Input Capacitance
A-M MODE: I,
=
R,
gm
Rll
ell
-
10
18
100
1.5
-
k!1
-
mho'
-
pF
5.0
20
15
500
5.0
15
300
250
1.0
-
k!1
k!1
1 MHz, I" = 455 kHz
A-M Input Resistance
A-M Input Capacitance
Mixer Transconductance
Mixer Output Resistance
Mixer Output Capacitance
.-':.~ Input Kesistance
I-F Transconductance
uetector Input Resistance
Detector Input Capacitance
-
RI9
Cig
18
18
18-19
19
19
R,
z
-
gm
2-12
11
11
-
RI8
G li
gm
Rli
Gil
-
-
-
-
pF
mmho'
-
k!1
--
k!1
pF
mmho'
-
k!1
-
pF
*The International Electrotechnical Commission recommends the use of siemens (S) as the standard international unit of conductance, admittance and
susceptance.
~39
ULN-2242A/TDA1090
A·MIF-M SIGNAL PROCESSING SYSTEM
TEST CIRCUIT
ULN 2242A
~,
~:~:
LI
F· M IN
o--+-Ip......'-/---Q
0117
U!!.]--_-·H--+--O A- M IN
AllOICl OUT 0 - l . - - - -....VV\,...-{
~]--""'--+--+--o
5K
500K
0.05
MUTE
Dwg. No. A-10,427A
COIL WINDING INFORMATION
{I][~
Tl
A-M I-F
455 kHz
T2
F-M Detector
10.7 MHz
II
A-M Oscillator
1455 kHz
L2
F-M Detector
10.7 MHz
= 45
= 1000 pF
Qu = 60
Ct = 82 pF
Qu = 50
Nl:N2 = 11:1
Ct = 39 pF
L = 18 JLH
Qu
Ct
General Instrument
Part No. EX 27765
Toko Part No.
RXN-6A6909HM
General Instrument
Part No. EX 27975
Toko Part No.
TKAC-17044Z
General Instrument
Part No. EX 27641
Toko Part No.
RWO-6A7640BM
Coilcraft
Type V
Qu = 55
Filter Assembly:
Taka Part No. CFU455C-82BR
6-40
AGe OUT
ULN-2242A1TDA1090
A-M/F-M SIGNAL PROCESSING SYSTEM
A-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
10
I I I IIIIIII
RECOVERED
o
-10
/
-20
'/
'\."
-30
---
V
\
~
-40
"-
-50
THO
~
"
S+N
10
I
100
-
,/
V
-
A-M
o
~
-60
AU 010, Vou•
..-
/
MODE
dB • 325mV
I
II
10K
IK
1001<
D'/IG. NO. 8-136H
D
F-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
o
/
I--'"
RECOVERED
AUDIO, Vo••
-10
I
o dB
V
-20
-30
F-M
MODE
• 425 mV
V
V
./
..........
OUTPUT NOISE
-40
\
,\1\
,1\
1\
-50
I"..,
J
A-M REJECTION
/'-
-60
\
10
/
'\.
1\
.,.,,-- r--.- ... 1-'
TO -BOdS
IK
100
INPUT VOLTAGE, V"' IN ~V
6---41
lOOK
10K
DilG. MO.
8-13~8A
ULN-2242AVTDA1090
A;"MfF-MSIGNAL PROCESSING SYSTEM
A-M CONTROL VOLTAGES
AS FUNCTIONS OF INPUT VOLTAGE
TU~INJ U)EI~
........
"vOLT}GE,1
J7~'~
~
~,.
,/
o
V-
i'--
......
r-
-
Ave
,7
VOLTAGE, V
V~
A-M MODE
V
-0.5
, 10
I
III
IK
100
10K
INPUT VOLTAGE, V,"' IN ~V
lOOK
DWG.MO.B-1369
F-M CONTROL VOLTAGES
AS FUNCTIONS OF INPUT VOLTAGE
«
0
4,or-- r-..
~
,
1\
z
IIII
MODE
\1;
;-..
n
Z
;;; 3.0
~
:<
I F-M
0
c....
~....
."
C
'"c
....
0
2.0
~
0
<:
....
0
\~
."
c;.
_\~
10
~
~
IK
100
lOOK
10K
INPUT VOLTAGE, Vi"' IN ~V
DWG.1I0.8-1366
6-42
I-F OUT
V REG
v'"
A-M
asc.
DETECT IN
r
'"'''~
'U.~.~
rJl
~~_~
I §
AI ~ ~ '.
I
w
:r
MUTE
OUT
~
7'
3:
HIGH-LEVEL
GNO
DELAYED
'"
(5
Z
~
AGC
."C
Dwg. No. D-1094A
!!Z
n'
m~
SCHEMATIC
"'~
"'~
Z~
....
0
",e
-<>
~ ....
mO
3:8
ri:I
ULN;;2243A~M1X~Rtt.. fFOR-F~M
RADIO APPLICATIONS
ULN·2243A
MIXER/I·F FOR F·M RADIO APPLICATIONS
FEATURES
• Doubly-Balanced linear Mixer
• Very-High I-F Rejection
• 32 mmho (miliisiemens) Conversion Gain at
lao MHz
• 330 Q I-F Input/Output Impedance
• 46 dB I-F Gain at 10.7 MHz
• AGC Detector for MOSFET R-F Stage
• low External Component Count
• 16-Pin Dual In-line Plastic Package
pROVIDING AN IMPORTANT basic building
block for use in F-M radio applications, the ULN2243A mixer/I-F minimizes spurious responses from
strong off-channel signals while providing an ex~
cellent noise figure, maximum desired signal gain and
very-high I-F rejection.
gain set at typically 46 dB. Input and output impedances are 330Q to allow the use or" inexpensive
ceramic filter coupling.
Both bias and AGe voltages, for use with a dualgate MOSFET R-F stage, are provided by the wideband AGe detector. An inhibit connection (pin 14)
allows for maximum wide-band R-F gain up to the
signal level at which the AGe action of the following
narrow-band I-F amplifier/limiter and detector
(ULN-3840A or ULN-3889A) starts operating. For
strong on-channel signal levels, the wide-band R-F
gain is determined by the strongest in-band signal.
The linear fully-balanced mixer is an analog
multiplier which will outperform discrete mixers. The
low local oscillator and received frequency feedthrough greatly reduces. the outband rejection requirements.
I-F gain is furnished by a i-stage amplifier withthe
MIXER
Vee
AGC/R-F BIAS
our
,-,
'N'H~~r
Vee
@
I-F
GROUND
I-F
DeCOUPLE
I-F
IN
Ow". HO.
"~IO. ;9~
FUNCTIONAL BLOCK DIAGRAM
6-44
ULN-2243A MIXER!I"F FOR F-M RADIO APPLICATIONS
ELECTRICAL CHARACTERISTICS at TA = +25°C
CharacteristiC
Quiescent Supply Current
Test
Fig
Test
Pin
Test Conditions
5 + 6 Vee = +12V
12 + 15 Vee = +8 V
110.7 MHz, fout = 10.7 ·MHz
9 or 10 V," = 25 mV
9.or 10 V" = 25 mV
7 or 8 V" - 0
7 or 8 V" - 0
5 or 6 V" - 0
5 or 6 V" = 0
V" = 1.0 mV
Symbol
Icc
MIXER: flO = 100 MHz, Vosc =200 mV, fose =
Input Impedance
I
Z,"
Input Capacitance
I
Coo
Osc. Impedance
I
lose
Osc. Capacitance
I
Case
Output Impedance
2
Zoo,
Output Capacitance
2
Cout
Conversion Gain
3
gm
I-F AMPLIFIER: V'n = 100 /LV,f'n "" 10.7 MHz
Input Resistance
R'N
Output Resistance
RouT
I-F Gain
A
AGC DETECTOR: f," = 10.7 MHz, V,n = Pin 4, VIN
Detector Threshold
V,
Inhibit Threshold
VIN
Quiescent Output Voltage
VOUT
Output Voltage
YOU]
Ill.'
=
Min.
50
18
Typ
-
-
525
9.0
170
10
120
-
I
I
16
16 .1
Pin 14
4
VIN - 3.5 V
14
V" - 350 mV, VOUT -2,0 V
13
V" = 0 and/or VIN - 0
13
V" = 350 mV, VIN = 3.5 V
Figure 3
&--45
pF
kn
-
pF
32
-
mmho
-
-
n
n
-
330
280
46
-
dB
-
150
-
0.8
7)
2.0
mV
V
V
V
-
-
Figure 2
.,v
n
...ef
n
3.2
0.02
+12V
-
-
-.
j
Figure I
-
Units
rnA
mA
-
'2V
8V
-
Limits
Max.
II
38
0)
-
APPLICATIQN INFORMATION
lite ULN-2243A mixer/I·F performs a variety of
fun);:tilms especially suitaile fOf. automobile radios
and other r,eceivers required to Itl!.n4le an extremely
wide range of input signal levels. It has been designed
to use some of the inherent advantages of an integratec!' circUit to improve -F-M fro-nt end designs
instead of simply attempting to repiace discrete
devices \vith integrated oneS. This allows the tuner
designer to select anR-F amplifier arid oscillator circuit best~suited to the particufarapplication.
amplifier/detector integrated circuit. The resistive
matching pad between ceramic filter elements
prevents interactions which can cause undersirable
group delay variations.
The AGC, detector between pins 4,13, and 14 has
some unique properties which can be used in different ways. If the R-F amplifier is a dual-gate
MOSFET (Figure 5), only the minimum in external
discrete components is required.
The AGC detector input (pin 4) is connected
through a small coupling capacitor to the mixer output. Internally is an R-F peak detector (Q20) and doc
amplifier (Q21 through Q24). If the AGe inhibit
voltage (pin 14) is greater than approximately 1 volt,
the AGC output voltage (pin 13) will change from
'typically 7.7 V with no applied signal to 0.5 V if an
R-F signal of more than 150 mV is present at the input, This allows the tuner designer several design
possibilities:
'
The double-balanced mixer (Qr through Q7, Figure
4) is internally 'biased so that all inputs can be
capacitively coupled: this mixer possesses several advantages oyer discrete devices.: '
1. High inherent I-F rejection, '
2. Oood I~FI2 rejeCtion;
3.Less 'oscillator drive reqlj.iredthan with FET
mixers,
4. Low oscillator (eed through,
5. Less-oscillator modulation with large signals, and,
6. Balanced inputs eliminate ground loops which can
cause stray coupling paths in discrete mixers.
1. Connecting the AGC inhibit to the meter drive
output of the limiter/detector (pin 13, ULN3840A or ULN-3889A), the R-F stage will be
AGC'd when tuned to a strong signal or when
tuned to a weak signal with a strong adjacent
channel signal, or
2. Pin 14 can be connected to a fixed bias voltage
(typically + 5 V). The R-F stage would then be
AGC'd by any signal falling within the mixer coil
bandpass, or
3. Combinations. of fixed bias and signal-dependent
levels (AFC, deviation mute, Qrdelayed AGC) will
then allow almost an unlimited number of AGC
possibilities.
The AGC characteristics of the ULN-2243A
mixer/I-F can be used with many other types of R-F
amplifier. By adding a discrete transistor amplifier at
pin 13, the AGC signal can be inverted and/or
amplified to drive a bipolar R-F stage into forward
AGC or to drive a PIN diode attenuator. A
simplified graphical illustration of the most common
AGC characteristic is shown in Figure 6.
Note that the oscillator input can be to either pin 7
or pin 8, the R-F input to either pin 9 or pin 10, to
suit the circuit board layout.
The I-F transformer used with the ULN-2243A has
been made to utilize both output-s of the mixer and
was wound ona bobbin type'coil form (Toko Type
IOEZ) to maintain close couplings between windings.
This eliminates the high cost of. a bifilar-wound
transformer. A conventional tuner with two R-F
tuned circuits will typically have an I-F/2 rejection of
at least 100 dB and a low noise figure. A single-ended
output from either pin 5 or pin 6 could have been
used (with degradation in rejection and noise figure)
with the remaining output connected directly to Vee.
The limiting amplifier consists of transistors Qs
through QIS and has about 46 dB of gain at 10.7
MHz. The input and output impedances are 3302 for
easy ceramic filter connection. The differential input
again avoids the low-impedance ground loops
associated with discrete common emitter I-F input
stages. This makes the construction of a stable
amplifier much easier. Since the I-F amplifier an
independent element, various combinations of fHters
before and after the amplifier are possible.
A typical application of the ULN-2243A mixer/I-F
in an F-M tuner was shown in Figure 5. Note that an
output from the high-frequency oscillator has been
,provided with no increase in cost. This is one advan- tage to having the oscillator external to the integrated
circuit. Also, by not including the R-F amplifier
within the device, a wide variety of R-F amplifiers
can be used depending on the wishes of the designer
or the particular constraints of the application.
is
The relatively high gain of the ULN-2243A I·F
amplifier allows the circuit designer to use surfat:e
wave or cascaded' ceramic filters between it and the
6-46
j
1
I-F
MIXER
VCC
MIXER OUT
VCC
15
27K
ll.5K
13) AGC/R-F
BIAS OUT
r
.....
c
%
I
1.:1
1.:1
UK
3~,
....
UK
~
;:
...l!I!><
11
Mi!fER
AGC DEl.
IN
GROUND
!lwq. 110. 8-1441
....'i'"
a
:11:1
Figure ..
SCHEM~TIC
7'
3:
s:
o
o
l>
"'U
"'U
....
E
o
z
~
'"
UlN-2243A MlxERlI-F FOR F-M RADIO APPLICATIONS
+12V
27 ~H
1. 1 ~H
R-F
r
IN 2.2
OK
I
~COMPOSI1[
lK
~
1~ AUDIO
OUTPUT
lJwg. No. B-J44?
Figure 5
TYPICAL AP!,LlCATION
WEAK OR NO ADJACENT CHANNEL
SIGNAL, PIN 14 HELD HIGH OR
CONN[CTED TO METER OUTPUT OF
LI MI TER/DETECTOR
STRONG ADJACENT
CHANNEL SIGNAL WITH
PIN 14 CONNECTED TO
METER OUTPUT OF
LlMI TERIDETECTOR
RELATIVE DESIRED IN-BAND SIGNAL LEVEL
Owq. No: A~~1.• 039
Figure 6
AGC CHARACTERISTICS
6-48
ULN· 2245A .PHASE· LOCKED .LOOP. STEREO. DECODER
ULN·2245A
PHASE-LOCKED LOOP STEREO DECODER
FEATURES
• Excellent Channel Separation
• Low Total Harmonic Distortion
• Power Supply Decoupling
• VCO Frequency Stable
• High Gain
• Operating Voltage -
10.5 to 16V
• 70 dB SeA Rejection
• 16-Pin Dual In-Line Plastic Package
multiplexed F-M signals are decoded by
STEREO
Sprague TypeULN-2245A without the use of
tuning coils required for operation of previous stereo
processors inF-M receivers.
The monolithic integrated circuit creates a signal
in phase with and exactly twice the frequency of the
19 kHz pilot signal provided by stereo transmissions. This 38 kHz subcarrieris used to demodulate
F-M stereo broadcast information.
The stert.
~
-U
,
~
01
.J
•
§
~
~
-W
~
~
~
0
§
•
•
.;
•
6-51
,
,.
i:;'?'
ULN-2249A A-M RADIO SYSTEM
fOR-AUTOMOTWr-APpl1CATlONS···~
V','
- ..
ULN·2249A A·M RADIO SYSTEM
FOR AUTOMOTIVE.APPLICATIONS
FEATURES
• Low External Parts Count
• Internal Bias Regulator
• High AGC Ratio
• Low Distortion
• Good Sensitivity
• Direct Replacement for HAl199
DESIGNED for automotive
SPECIFICALLY
A-M radio applications, the ULN-2249A A-M
satisfactorily under wide variations in signal leveL A
typical AGC ratio of 63 dB, a usable sensitivity of
approximately 8 /LV, and an overload point in excess of 3 V, all contribute to the excellent performance of these devices under real conditions.
Moreover, the ULN-2249A A-M radio system is
rated for operation over the broad supply. voltage
rangeof 10.8 V to 15.6 V although the selfcontained local oscillator will continue to function at
much lower voltages.
radio system consists of an R-F amplifier, converter,
I-F amplifier, A-M detector, AGC amplifier, and
bias voltage regulator. The low-level audio output
can be used to drive a standard audio power
amplifier, such as the Sprague Type ULN-3701Z.
Of particular significance in automotive applications is the ability of this integrated Circuit to perform
FUIliCTIOf\lAL BLOCK DIAGRAM
R-F I"
I
......
oJ
,::>
-=M
o
oJ
OJ
>
OJ
oJ
I
•
o
oJ
6--,52
ULN-2249A A-M RADIO SYSTEM
FOR AUTOMOTIVE APPLICATIONS
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Package Power Dissipation, PD • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 670 mW*
Operating Temperature Range, TA ........................... -20°C to +85°C
Storage Temperature Range, Ts ......
. ............. -65°C to + 150°C
'Derate at the rate of 8.3 mWrC above TA = + 70'C.
ELECTRICAL CHARACTERISTICS at TA = + 25°C, Vee = 13.5 V, fo = 1 MHz,
fm = 400 Hz, 30% A-M, Figure 2 (unless otherwise noted)
Characteristic
Symbol
Quiescent Supply Current
Sensitivity
Detector Output Voltage
Output Distortion
Signal-to-Noise Ratio
AGC Ratio'
Icc
Vin
Va
THO
S+N/N
Test Conditions
Figure 1
Vout = 20 mV
ViR = 5.0 mV
Yin 500 mV
V,,= 5O /J-V
Yin 20 mV
= 262.5 kHz,
fif
Min.
Limits
Typ.
Max.
Units
-
15
3.0
-
50
-
-
mA
p.V
mV
-
0.4
30
63
-
26
60
6.0
5.0
%
dB
dB
'AGG Ratio is defined as the ratio of the input voltages for a reduction in output voltage of 10 dB with the high level input as specified.
SMALL-SIGNAL A-C CHARACTERISTICS at TA = +25°C, Vee = 13.5 V, fo = 1 MHz, fit = 262.5 kHz,
fm = 400 Hz, 30% A-M, Vin ,; 27 mVrms
.
Limits
Characteristic
Symbol
R-F Input Impedance
R-F Output Impedance
R-F Transconductance
Conv. Input Impedance
Osc. Input Impedance
Conv. Output Impedance
Conv. Transconductance
Zl
Zl6
gm
Z14
Zl3
Zl2
gm
Osc. Input Voltage
I-F Input Impedance
I-F Output Impedance
I-F Gain
Del. Input Impedance
Del. Output Impedance
Del. Gain
V
ZlO
Test Conditions
Also, see note
fose = l.262 MHz
Pin 14-12, Vl3 = 300 mVrms
Pin 13-12, VI ~ 27 mVrms
For optimum conv. performance
Min.
Typ.
Max.
-
-
-
6.0
100
16
12
3.6
100
0.2
1.4
300
-
-
-
-
-
Zs
Ae
Z6
Z,
Ae
-
NOTE, For optimum noise match, source impedance should be 1.2 kll
6---53
2.8
50
24
310
100
25
-
-
-
-
-
Units
kll
kll
mmho
kll
kll
k!l
mmho
mmho
mVrms
kll
II
dB
II
II
dB
ULN-2249A A-M RADIO SYSTEM
-FOR AUTOMOTIVE APPLICATIONS
TEST CIRCUITS
120n
D'''''.IIO.
FIGURE 1
FIGURE 2
6--54
A-IO."~
ULN-2249A A-M RADIO SYSTEM
FOR AUTOMOTIVE APPLICATIONS
COIL WINDING INFORMATION
Tl First I-F
262.5 kHz
Qu, = 80, Qus = 75
T2 Second I-F
262.5 kHz
Qu,
Taka Part No.
Nt:Np:Ns = 13:2.3:1 BI24FCS-I013PYGI
Ct = 150 pF··
BI24FCS-I014STB
= 80,
Qus
=
75
Taka Part No.
Nt:Np:Ns = 13:5.6:1 BI24FCS-60001PYGI
Ct = 150 pF
BI24FCS-I014STB
SCHEMATIC
AGC
DECOUPLE
........+--tI"""'-""""-------+-+-_----
c::;
w
0
I
-10
~
-' -20
w
>
w
-'
w
...«~
J
-'
w
'"
~
-30
-40
II
R
INOISE
V
tilll
llill
-50
NOISE
~
"\
V
+ THO
l1llill 1
IILV
ImV
R - F SIGNAL
IOmV
IOOmV
IV
IOV
OIl'G. NO. A-IO,l\37
INPUT VOLTAGE
OUTPUT VOLTAGE
AS A FUNCTION OF INTERFERENCE FREQUENCY
50
%
l
t-
40
~
5
...
>
• 30
2
V.
g
IIff
O"'v
)
~"'v
...
20
;)
~
r".~",1
§
2:
~
1"'1'
I'"
1'1'
10
100
so
60
"
>-
l~~
~
>'":2
>
E
...
'"
I'~
\
II~~
,
I'
iI"iI"
...
~
~r"'"
~r"
"
40
- 20
0
20
INTERFERING SIGNAL FREQUENCY, i1fis IN kHz
6-56
rnf
I,~\ _I~()O,"~~~
-r"r"
~
II"
I'~
1"1"1-
'4\<0
;;.'".!!
;;
I'"
o
I~g
fo
V
40
60
=:
1 MHz
= 500 tJV
11111
PO
100
ULX-3804A A-M/F-M SIGNAL PROCESSOR
ULX-3804A
A-M/F-M SIGNAL PROCESSOR
FEATURES
• Good Sensitivity
• Low Harmonic Distortion
• Wide Operating Voltage Range
• Excellent A-M Rejection
• Low Power Drain
• D-C A-MiF-M Switching
.30 /LV Limiting Threshold
• 16-Pin Dual In-Line Plastic Package
DESIGNED for use in battery-powered portable
,
radios or line-driven table radios, Type ULX3804A works well in low-cost applications requiring
high performance with few external parts. An entire
A-M IF-M stereo receiver can be built with a Type
ULX-3804A, a Type ULN-3809A stereo decoder,
and two Type ULN -2283B audio amplifiers, for
operation over a supply range of 4.5 to 12 V.
The signal processor includes the A-M oscillator
and mixer and the A-M IF-M I-F amplifier and detector from the popular radio system, Sprague Type
ULN-2204A. Radio designs using Type ULN2204A can be revised for greater power output or for
stereo operation (without reworking the printed wiring board layout) by replacement of Type ULN2204A with Type ULX-3804A and addition of appropriate stereo decoders and audio power
amplifiers.
In the A-M mode of operation, Type ULX-3804A
provides all high-frequency circuitry, including
AGC and envelope peak detection, for a singleconversion superheterodyne broadcast or shortwave
receiver. In the F-M mode, the signal processor
operates as a high-gain amplifier Ilimiter and phaseshift detector. A d-c switch is used to change modes.
A single external capacitor at pin 16 provides the
A-M AGC time constant, the F-M AFC time constant, and R-F decoupling.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage. Vee
Package Power Dissipation, PD'
Operating Temperature Range. T, .
Storage Temperature Range.Ts
16 V
....... 640mW*
- 20°C to + 85°C
-WC to + ISaaC
'Derate at the rate of 8,0 mW °C above T,- ·IWC
The ULX prefix to the part number denotes an integrated circuit presenlly in development and undergoing
engineering.evaluation. If and when the device becomes a production item, theprefix will be changed to ULN.
Sprague Electric assumes no obligation for future manufacture of any products presently in development
unless such obligation is specifically undertaken in writing by authorized Sprague personnel.
6--57
ULX-3804A A-M/F-M SIGNAL PROCESSOR
FUNCTIONAL BLOCK DIAGRAM
OSC.
R-F
DECOUPLE
A-M
I-F
OUT
I-F
IN
A-M GAIN ADJ.
AGC/AFC
LOW-LEVEL I-F
I-F DETECTOR DETECTOR HIGH-LEVEL
GND
DECOUPLE OUT
IN
OUT
CROUND
DW9. ~o. A-J1.06R
ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vee = 6.0 V, Ra = 00 , R16 = 1.2 kD (unless otherwise noted)
Limits
Characteristic
F-M MODE: t, = 10.7 MHz, I m
Input Limiting Threshold
Detector Recovered Audio
Detector Output Distortion
A-M Rejection
I-F Input Impedance
I-F Input Capacitance
Quiescent Terminal Voltage
,
VIh
Vo
THO
AMR
Min.
Typ.
Max.
-
30
250
1.0
-
,
-
-
Vin = 10 mV,ms
Vin = 10 mV,ms' 30% A-M,
f,m = 400 Hz
-
-
50
40
4.0
2.1
-
1.7
-
-
10
15
-
-
5.0
150
10
25
4.5
5.5
25
3.0
100
3.0
1.3
-
1.7
-
3.8
35
-
Z2
C2
VI
VB
Quiescent Supply Current
Icc
A-M MODE: I, = 1 MHz, IH = 455 kHz, 1m = 400 Hz, 30% A-M
Sensitivity
Maximum Volume
Detector Recovered Audio
Vo
Overload Distortion
80% A-M
Usable Sensitivity
Mixer Input Impedance
See Note
Z6
Mixer Input Capacitance
C6
Mixer Output Impedance
Z4
Mixer O~tput Capacitance
C4
I-F Input Impedance
Z2
I-F Input Capacitance
C2
Quiescent Terminal Voltage
VI
VB
Quiescent Supply Current
Icc
NOTE: For optimum nOise match. source Impedance should be 2.5 kil.
&--58
60
-
-
-
-
-
10
-
-
35
-
-
-
-
/J-V
mV
%
dB
kD
pF
V
V
rnA
/J-V
mV
mV
MV
kD
pF
kD
pF
kD
pF
V
V
rnA
ULX-3804A A-M/F-M SIGNAL PROCESSOR
TEST CIRCUIT
A-M
\13\----'-...---_--+-_ _-+-0 vee
COIL WINDING INFORMATION
Tl A-M First I-F
455 kHz
au = 120
NI:N2:N3 = 15.5:2.8:1
Ct == 180 pF
General Instrument
Part No. EX 27835
lako Part No.
RMC-2A764IA
T2 A-M Second I-F
455 kHz
au = 70
NI:N2 ~2:1
Ct = 430 pF
General Instrument
Part No. EX 27836
. Toka Part No.
RtE-4A7642GO
T3 F-M Detector
10.7 MHz
au = 50
Ct = 100 pF
General Instrument
Part No. EX 27640
Toko Part No.
BKAC-K365IHM
T4 F-M Detector
1O.? MHz
au = 50
Ct = 100 pF
General.lnstrument
pint No. EX 27640
Toko Part No.
II A-M Oscillator
1455 kHz
au = 50
NI:N3 = 10.7: I
Ct = 39 pF
General Instrument
Part No. EX 27641
'foka. Part No.
RWO-6A7640BM
6-59
~KAC-K365IHI.1
ULX-3804AA-M/F~M
SIGNAL PROCESSOR
Device Classification and Design Considerations
The A-M IF-M receiver system's operation can be kept within
tighter performance limits by matching bias groupings and
appropriate external resistors (R8 and R16). With proper matching of parts and lots, consistent device performance can be
obtained. The groupings, shown in the table below, are based
on A-M and F-M operation. There are three selections for each
mode and nine possible combinations:
PIN 16 OUTPUT VOLTAGE, V16
A-M
Operation
1.40 1.65 1.90 -
Complete Part Number Including Suffix
f-M Operation
2.20 - 2.65 V 2.55 - 3.05 V 2.95 - 3.40 V
1.75 V ULN-3804A-ll
ULN-3804A-21
ULN-3804A-31
2.00 V ULN-3804A-12 ULN-3804A-22
ULN-3804A-32
2.25 V ULN-3804A-13
ULN-3804A-23
ULN-3804A-33
Sprague recommends that customers not specify particular
selections except in unusual circumstances. All parts manufactur~d with the Sprague part number will be marked with the
complete number, including the appropriate suffix ..In addition,
anyone shipment to a customer will consist of a single selection
(single suffix).
The first digit of the. suffix (such as the "3" in "-31")
applies to F-M performance. It indicates the F-M gain and pin
16 output voltage as functions of the pin 16 load resistance, as
. shown in the graph on the next page.
F-M circuit stability is inversely related to gain or sensitivity
and is also affected by source and load impedances, decoupling,
. and printed wiring board layout. After an optimal F-M I-F gain
is determined for a particular circuit design, the gain can be
controlled with proper matching of the suffix and the pin 16
load.
6-60
ULX-3804A A-M/F-M SIGNAL PROCESSOR
Design Considerations (Continued)
In addition, certain system designs derive the F-M tuner
supply, tuner bias, or AFe voltage at pin 16 of Type ULN3804A. As an example, if the tuner design requires 2.4 V at
2.0 rnA (an equivalent Rl6 of 1200!1), Type ULN-3804A-IX
is required. A - 2X or - 3X device can also be used by paralleling the equivalent 1200n tuner load with a fixed resistor to
present an 830!1load or a 520!110ad.
For AFe applications, note that as the frequency is increased,
the V 16 voltage will decrease. The amount of change is a
function of load impedance, detector coil characteristics, and
part grouping.
TYPICAL F-M I-F GAIN CHARACTERISTICS
f-M GAIN (dB)
3.2
73
3.0
72
2.8
71
> 2.6
70
/
/
~vy
~
iJ
V
i"
)LII
I
~
0
,
}J
~
~
-0
:>
24
69
2 2
-67
20
64
100
~
~
V~
~~~
y
-- -
~qs
~v
$J
II V I
/
J
200
300
500
V
800
1K UK
2K
3K
5K
R'6 IN OHMS
Stability is seldom a problem with A-M operation. However,
large-signal overload can be held to typically 30 mV by matching the particular part group with an appropriate load resistor at
pin 8. The A-M grouping is identified by the second digit of the
part number suffix (such as the "2" in "-32 ").
For -X I, R8 should be an open circuit;
for -X2, R8 should be 47 kH;
for -X3, R8 should be 33 kn.
Additional loading may raise the overload point slightly, but
AGe and sensitivity will be compromised. For any fixed value
of R8. the -X3 parts will exhibit slightly higher A-M gain. the
-Xl parts slightly lower A-M gain.
6---61
c
~
Col
co
iJ>
DETECTOR
J>
OUT
~
7'
IK
3:
«n
C5
Z
~'
. . -... . . . 1-
~-,MOUT
.
J>
....
."
--~;:.
~
n
7.5K
1ft
1----
Vee
400
r
~
o;:0
REGULATOR
Q
""
190
62
DETECTOR
A-M
U
1
R_,
DECOUPLE
'I
II I
_I
Dwg. No. 0-1104
Vee
500
1.33K
1.2K
SCHEMATIC
750
LOW-LEVEL
GROUND
g.
HIGH-LEVEL
GROUND
ULN-3809A PHASE-LOCKED LOOP STEREO DECODER
ULN-3809A PHASE-LOCKED LOOP STEREO DECODER
FEATURES
•
•
•
•
•
•
•
•
•
•
Unity Voltage Gain
12L and Ion Implant Technology
Wide Dyna mic Range
Low Distortion
Excellent Channel Separation
No Tuning Coils
Automatic Stereo/Mono Switching
Stereo Indicator La mp Driver
Direct Replacement for MC1309
14-Pin Dual In-Line Plastic Package
Type ULN-3809A phase-locked loop
SPRAGUE
decoder demodulates standard composite F-M
stereo input signals within the range of 0.25 to 1.7
Vpp without the use of tuning coils.
Integrated. circuit design allows tuning with a
single resistive adjustment. The decoder automatically switches between stereo and monaural operation by detection and evaluation ofthe 19-kHz pilot
carrier signal.
Type ULN-3809A exhibits 35 dB suppression of
the 19-kHz pilot and 45 dB rejection of the regenerated 38-kHz subcarrier at demodulator output terminals. Stereo channel separation is typically 47 dB.
With a composite input signal of 850 mV, total harmonic distortion for the unit is typically 0.06%.
Type ULN-3809A is designed to work within a
range of supply voltages from 4.5 to 16 V.
r""'----1(-: LOOP
,.---K----+ FILTER
r-~--: veo
r--1C---i
TUNE
FUNCTIONAL
BLOCK DIAGRAM
38kHz
Vee
6--63
Dwn. NO . A-9~~IB
II
ULN-3809ApHASE~LOtKED
LOOP STEREO :DECODER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
Nominal Lamp Current, ILAMP ••••••••••••••••••••••••••••••••••••••• 50 mA
Package Power Dissipation, Po ................................... 670 mW·
operating Temperature Range, TA ........................... -20°C to +85°C
Storage, Temperature Range, Ts ... ; ....................... -65°C to + 150°C
'Derale at IMrale of S.l mW/G above TA
=
+ looG.
ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 9.0 V,
= 1.7 Vpp, fm = 1.0 kHz (L or R only), Pilot Level = 10% unless otherwise specified
Vin
Characteristic
Max. Standard Composite Input Signal
Max. Monaural Input Signal
Input Impedance
Stereo Channel Separation
Monaural Gain
Channel Balance
Total Harmonic Distortion
Ultrasonic Frequency Rejection
SeA Rejection
Stereo Switch Level
Mono/Stereo Switch Transient
Capture Range
Supply Current
Test Conditions
Vee "" 6.0 V, 0.5% THD
Vee = 9.0 V, 0.5% THD
Vee - 6.0 V, 1.0% THD
Vee = 9.0 V, 1.0% THD
Min.
0.85
1.7
0.85
1.7
15
f
f
f
= 100Hz
= La kHz
= 10 kHz
-
30
0.6
Stereo, Yin = 850 mVpp
Mono, Yin = 850 mVpp
19 kHz
38 kHz
a
-
0.06
0.08
35
45
75
9.0
4.5
0
7.0
11
-
NOTE: THO and channel separation are measured after a. bandpass filter (200 HZ 10 10 kHz).
2.0
....
Limits
Max.
-
-
Lamp ON
Lamp OFF
No Lamp
Pilot = 60 mVrms
Typ.
1.7
2.1
1.7
2.2
30
45
47
40
0.9
-
-
-
-
-
-
La
-
-
12
-
-
Units
Vpp
Vpp
Vpp
Vpp
kfl
dB
dB
dB
VN
dB
%
%
dB
dB
dB
mV
mV
mV
%
mA
ULN-3809A PHAsE~LOCKED LOOP STEREO DECODER
APPLICATIONS INFORMATION
Vee
R4
16K
0.05
ing cs, and decreasing the value of C6 while
increasing the values of R. and Rs (increases
capture-range:and beat-note distortion).
COMPOSITE
INPUT
O.S
1-+-,--4---'
C4
2. Typical I-F amplifier frequency response restricts
channel separation to about 32 dB. This restriction can be counteracted by the netwollk shown
below. Exact circuit values will be determined by
the I-F amplifier design.
fROM
DEMODULATOR
<10K
:""TO
~
":,
":." 0.001',
CI
27K
TES-rCIRCUIT AND TY ..ICA.!- APPLICATION
DWG. MO. A-IO.656
3. To manually .disable the stereo decoder, ground
pin 8 and connect pin 14 to ground through a
resistance of 3.3 kil. '
.
I. If relaxed performance is acceptable, the external
circuit can be simplified by decreasing the value
of C1(redl,l,ces,.separatil?n at low frequencies),
decreasing the values ofC. and R3 while eliminat-
4. Capacitor C6 should be temperature-stable
(NPO).
":F-,,...---U-lN-_2-204A----.-.4I--,.,-,--I-..,...-oV CC
MINIMUM-COST APPLICATION.
IN'A-M/F"M STEREO RADIO ..
OWG.NO.6-1457
19"KHz
OUTPUT
:6---65
U-,*,3&}OA,-pHA-SE·tOCK~P.,L-oOP -Sl~~-DEC-09ER
ULN·3810A
PHASE.LOCKED LOOP STEREO DECODER
FEATURES
•
~
•
•
•
•
•
No Tuning Coils Required
and Ion Implant Technology
Single-Adjustment Tuning
Automatic Stereo/Mono Switching
Stereo Indicator lamp Driver
Excellent SCA, Rejection
Direct Replacement for TA7l57, KB4409, CAl310,
XRl310, lM13.10, SN76115, MCl3l0 & UlN-2110A
• 14-Pin Dual In'line Plastid Package
'q"
12l
.ABSOLUTE MAXIMUM RATINGS
of left- and right-c\lannel audio from
R ECOVERY
the standard F-M composite signal by this
phase-locked loop decoder yields stereo channel
separation of 40 dB and total harmonic. distortion of
less than 0 . 3 % . '
.
Supply Voltage, Vee ........................... 16 V
Nominal lamp Current, lUMP .................... 75 rnA
Package Power Dissipation, Po' ............... 670 mW*
Operating Temperature Range, TA ....... -20 oe to +85°e
Storage, Temperature Range, Ts' ........ -65°C to +150°C
Type ULN-381OA is designed to opetateover a
supply voltage range of 6 to 16 V.
.
·Oerate at the rate of 8.3 mW/C above TA= +70°C.
r""----K-l LOOP
"---i(-":-1 ALTER
2
FUNCTIONAL
BLOCK DIAGRAM
r--+--~
t--K---;
VCO TUNE
ULN-3810A PHASE-LOCKED LOOP STEREO DECODER
=
=
ELECTRICAL CHARACTERISTICS at TA
+25°C, VCC
+ 12V,
Yin
560 lllVrms (2.8Vpp ),fm
1.0 kHz (L or R only),
Pilot Level
100 mVrms (10 %) unless otherwise specified
=
=
=
Limits
Characteristic
Test Cond itions
Min.
Typ.
Max.
Units
Max. Standard Composite InputSignal
Max. Monaural Input Signal
Input Impedance
Stereo Channel Separation
Audio Output Voltage
Monaural Channel Balance
Total Harmonic Distortion
Ultrasonic Freqency
Rejection
SCA Rejection
Stereo Switch Level
THO = 0.5%
THO = 1.0%
Pin 2
2.8
2.8
20
30
-
-
~
Desired Channel
Pilot Level = 0 V
-
19 kHz
38 kHz
67 kHz, No Modulation, Measure 9 kHz Beat
Pilot Only, Lamp ON
Pilot Only, Lamp OFF
Permissible Tuning Error
Lamp OFF
Capture Range
Supply Current
25
40
485
-
-
1.5
00
SWITCH r.:-.
FILTER
STEREO
INDICATOR
15K
~15K
r'l(
I
I
I!SK
181(1
1
~~W:~(9) ,
m
.J
L
.-DI'7
m
I'K~
I I
l
~.
-
II
~
I
11 ~:;,:
Vee
'K
Dwg. No. 0-1110
SCHEMATIC
010
o"'
n
~
'"
ULX-3840A
HIGH-PERFORMANCE A-MiF-M SIGNAL PROCESSING SYSTEM
ULX-3840A HIGH-PERFORMANCE
A-M/F-M SIGNAL PROCESSING SYSTEM
FEATURES
• 12 JAV Limiting Threshold
• Tuning-Error/Level Muting
•
•
•
•
•
•
•
Meter Drive
Balanced A-M Mixer
5 JAV A-M Sensitivity
D-C Mode Switching
Internal Voltage Regulator
Meets Dolby® Noise Requirements
20-Pin Dual In-Line Plastic Package
IDEALL Y SUITED FOR TOP-NOTCH
A-MI F-M radios, Type ULX-3840A provides
sophisticated operating features highly desired
by the modern consumer at a price that allows it
to be used in budget receivers.
A combination of inter-station (signal-level)
muting and off-channel (tuning-error) muting is
useful in signal-seeking or scanning applications.
The circuit design eliminates annoying lowfrequency thump and noise tail when the system
is manually tuned through a strong signal.
Outputs are available for directly driving a
peak reading meter and a zero-tune meter. The
peak meter output also is useful in controlling
external system functions, such as blending
multiplexers, stereo decoders, noise blankers, or
in providing positive-going AGC for the tuner.
All standard F-M I-F functions and all A-M
functions are provided by this single monolithic
integrated circuit. The low-level audio output
stages have been designed to meet stringent
Dolby® noise requirements.
The A-M mixer is a balanced low-current
analog multiplier with very-low local oscillator
feedthrough, high I-F rejection, and freedom
from spurious responses. This mixer can be used
in the long-wave, medium-wave, and shortwave
bands.
A fully-balanced, four-stage differential I-F
amplifier gives maximum gain with freedom
from common mode signals. It is used in both
the A-M and F-M modes of operation with approximately 82 dB of gain in the F-M mode and
controlled AGC gain of 26 dB in the A-M mode.
The detector in the F-M mode is a fourquadrant analog mutliplier operating in the
high-level injection mode. Common mode
signals are rejected through the use of balanced
current-mirror outputs.
In the A-M mode of operation, the detector is
configured as a balanced peak detector for low
audio distortion. A-M gain control is achieved
with AVC applied to the I-F and delayed AVC
applied to the mixer.
(Continued next page)
'" Registered Trademark, Dolby Laboratories, Inc.
The ULX prefix to the part number denotes an integrated circuit presently in development and undergoing engineering
evaluation. If and when the device becomes a production item, the prefix will be changed to ULN. Sprague Electric assumes nQ
obligation for futUre manufacture of any products presently in development unless such obligation ;s specifically undertaken in
writing by authorized Sprague personnel.
6-69
ULX-3840A
HIGH~ PERFORMANCE
A:"MfF-M· SIGNAL PROCESSING SYSTEM
Switching between modes can be accomplished with a simple single-pole d-c switch. The
common low-level audio output can be used to
drive an audio power amplifier .(Type ULN3703Z) or stereo decoder (Type ULN-381OA).
Internal voltage regulators and bias supplies
assure premium performance despite variations
in external supply voltage (8.5 to 16 V) or
temperature (- 20°C to + 85°C). Separate
ground leads minimize decoupling problems.
ABSOLUTE MAXIMUM RATINGS
.. IS V
Su pply Voltage, Vee
Mute Input Voltage, VB
Regulator Current, IREG .
Package Power Dissipation, Po
Operating Temperature Range, TA .
Storage Temperature Range, Ts.
~t 9.4 mWloC above T,
... 5.0 V
.5.0 mA
750 mW"
... -20°C to +S5°C
-65°C to +150°C
= +70°C
FUNCTIONAL BLOCK DIAGRAM
I-F
BIAS
I-F
OUT
DETECT
IN
MUTE ADJ.
r--"-----.
12
I-F
DECOUPLE
A-F
>--..---{ 6
AUDIO
OUT
AVCI-+---~---------1
LOW-LEVEL
GROUND
p.
@
J,
A-M
MIXER
OUT
SUB.
MIXER
BIAS
s:
YI GH-LEVEL
GROUND
A-M
DECOUPLE
DWG . ~IO. A- II ,2 61
6-70
ULX-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM
ELECTRICAL CHARACTERISTICS at TA Characteristic
Symbol
Operating Voltage Range
Vee
Audio Output Voltage
~fL
Regulator Output Voltage
VREG
Avail. Reg. Output Current
'REG
F-M MODE: f.
=
10_7 MHz, fm
VTH
Recovered Aud io
Vout
THD
S + N/N
Output Noise
A-M Rejection
AMR
Mute
flV out
AFC Output Voltage
I-F Input Voltage
Vale
V
Mute Output Voltage
V14
Mute Output Current
Supply Current
A-M MODE: f.
=
1 MHz, fil
Sensitivity
1'4
Icc
Vin
Recovered Aud io
Vout
Input Overload
Vin
A-M Decoupling Voltage
VI
V1
Mute Output Voltage
Peak Meter
2
6
6
6
12
6
7
2
14
14
+25°C, Vee Test Cond itions
No Signal
VI4
VI5
A-M Input Voltage
V17
Supply Current
Icc
17
Min.
Typ.
8.5
12.8
5.8
6.4
-
2.0
±75 kHz, Vin
=
350
-
74
40
See Note
Vin = 100 !-IV, Max. Mute
Vin = 5.0 !-IV, Max. Mute
-
-45
220
No Signal
-
No Signal
3.6
0.5
No Signal
A-M, Vln
=
Vou! = 50 mVrms
20 dB S+N/N
80"lo A-M
80"lo A-M, THD
= 1O"lo
-
250
25
-
No Signal
-
No Signal
No Signal
Vin - 10 mV
-
No Signal
1.6
No Signal
-
6-71
Units
16
V
-
V
-
V
-
mA
12
425
0.3
80
>55
25
600
0.7
-
dB
-
-1.0
-
dB
dB
JiV
mV
"lo
dB
-
600
mV
3.5
4.2
-
V
-
V
-
-
mA
23
35
mA
1.0 mVrms (unless otlierwise specified)
No Signal
Note: Amplitude Modulation Rejection is specified as 20 log Vo" for 100% F-M Von
Voo ' for 30% A-M Von
-
Limits
Max.
10 mVrms, Non-Muted (unless otherwise specified)
No Signal
18
18
6
18
1
2
14
15
12.8 V
-
No Signal
= 455 kHz, fm = 400 Hz, 30%
Usable Sensitivity
I-F Input Voltage
10
6
13
13
= 400 Hz, fd =
Input Limiting Threshold
Output Distortion
Test
Pin
5.0
6.0
325
50
1.0
3.7
-
<0.5
3.0
1.8
16
8,5
!-IV
-
J!j
600
mV
-
mV
-
V
-
V
0.5
V
-
V
V
2.1
30
mA
V
o
ULX-3840A
HlGH"PERFORMANC1: A-MlF-M SIGNAL PROCESSING SYSTEM
SMALL-SIGNAL A-C CHARACTERISTICS at TA - +25°C
Characteristic
Test
Pin
Symbol
I·F Input Capacitance
C2
I·F Output Resistance
Test Cond itions
Min.
-
I·F Output Capacitance
RI2
CI2
2
12
12
Audio Output Impedance
Z6
6
-
I-F Input Resistance
R2
-
I-F Transconductance
gm
Detector Input Resistance
Rll
CII
2
2-12
11
11
-
-
Limits
Typ.
Max.
6.0
250
2.5
350
Units
-
pF
-
kQ
-
pF
-
kQ
F·M MODE: fo =:= 10.7 MHz
Detector Input Capacitance
A·M MODE: fo
=
1 MHz, fil
A-M Input Resistance
RI8
CI8
Mixer Transconductance
gm
Mixer Output Resistance
RI9
CI9
I-F Input Resistance
R2
I-F Transconductance
grn
Detector Input Resistance
Detector Input Capacitance
-
-
kQ
-
mho'"
-
kQ
-
kQ
pF
= 455 kHz
A-M Input Capacitance
Mixer Output Capacitance
-
10
8.0
100
1.5
18
18
18-19
19
19
2
2·12
11
11
RII
Cll
-
-
-
5.0
20
15
500
5.0
15
160
250
1.0
-
pF
-
mmho"
-
kQ
-
pF
-
kQ
-
mmho'"
-
kQ
-
pF
'The International ElectrotechOical Commission recommends the use of siemens (S) as the standard international Unit of conductance, admittance and
susceptance.
F·M TUNING·ERROR DETECTOR RESPONSE
6. 0
~
..............
0
\
\
\\
::>•
~-
o>
...
"
"o
~ 2. 0
0
-200
L
1\
-100
/
II
J
1
1
CHANGE IN FREQUENCY, LIf,", IN kHz
6-72
F-/V fI.'ODEJ
ULX-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM
TEST CIRCUIT
~:...
--L1
F-M IN
0.47
~J--~>---H--+--O
AU 010 OUT
1---4--+-+--0
o--+------<;.....;,N"v--1
A-M IN
A-M/F-M
LE VE L DET.
OUT
AFC~~~ TER 0--+--_---<0------1
100,11
500K
MUTE
Dwg. No. A-ll,262
"In application, R = OQ, C = O.008jlF for 50jls de-emphasis (Europe) or O.012jlF for 75 jlS de-emphasis (U.S.A.)
o
Filter Assembly:
Toko Part No. CFU455C·82BR
COIL WINDING INFORMATION
Tl A-M I-F
455 kHz
Qu = 45
Ct = 1000 pF
General Instrument
Part No. EX 27765
Toka Part No.
RXN-6A6909HM
T2 F-M Detector
107 MHz
Qu = 60
Ct = 82 pF
General Instrument
Part No. EX 27975
Toko Part No.
TKAC-17044Z
LI A-M Oscillator
1455 kHz
Qu = 50
Nl:N2 = III
Ct = 39 pF
General Instrument
Part No. EX 27641
Toko Part No.
RWO-6A7640BM
L2 F-M Detector
107 MHz
L = 18 jlH
Qu = 55 @ 2.5 MHz
Coilcraft
Type V
6-73
ULX-3840A
HIGH-PERFORMANCE A"M/F-M SIGNAL PROCESSING SYSTEM
A-M CONTROL VOLTAGES AS FUNCTIONS OF INPUT SIGNAL
3.5
~"'"
V I-""
3.0
LEVEL DETECTOR
OUT, VIS
V ~'"
2.5
V'
-r--I'
5
'"
V
/
ILA-M MODE
~
I'i'"
V
j
O. 5
too.Ave VOLTAGE, V17
V
0
10
lK
100
10K
INPUT VOLTAGE, V;"' IN ~V
lOOK
Owg. No. 8-1455
F-M CONTROL VOLTAGES AS FUNCTIONS OF INPUT SIGNAL
6, 0
5, 0
I
r- r--I'
Vce -
1~'8vl
TA=+2SC
,..
4. 0
V
i"'"
V'
~El
MUTE OUT,
DETECTOR
OUT, V15
VI4
3, 0
2. 0
;.L ~
I. 0
10
10
~
~
1-'--
I"
"'"
100
lK
. INPUT VOLTAGE, V;"' IN
6-74
~v
10K
lOOK
DWG.NO.A-II.263
ULX-3840A
HIGH-PERFORMANCE A-MlF-M SIGNAL PROCESSING SYSTEM
A-M CHARACTERISTICS AS FUNCTIONS OF INPUT SIGNAL
10
I I 1111111
II
o
f..-
-10
. /
RECOVERED AUDIO, Vou •
-
i-"
I
."
~
-20
~,
V
.....
~~
-40
--
THO
""r-.,
-50
,/
V
/
A-M MODE
• 325mV
o dB
S+N
~ ,....
I
-60
10
I
I
II
IK
100
10K
lOOK
ll'/IG.IIO.8-I367A
II
F·M CHARACTERISTICS AS FUNCTIONS OF INPUT SIGNAL
o
v
~IO
"..
RECOVERED
AUOI9., Voul
F-M
-20
-30
/
MODE
• 425 mV
I
V
OU~PUT
-40
o dB
V
NOISE
............
1\
1\1\
I',
-50
.....
J
i
A-M REJECTION
/r'
i
-60
\
10
100
1\
'\
TO
6--75
-Hd:
IK
V- ........
10K
i-"
lOOK
ULN-3859A F-MCOMMUNICATIONS I-FSYSTEM
ULN·3859A
F·M COMMUNICATIONS I·F SYSTEM
FEATURES
•
•
•
•
•
•
Dual Conversion
Low Current Drain
Wide Operating Voltage Range
High Sensitivity
Replaces MC3359P
I8-Pin Dual In-Line Plastic Package
THIS low-power, narrow-band F-M I-F system
provides the second converter, second I-F,
demodulator and squelch circuitry for communications and scanning receivers.
a high gain stage with excellent common-mode
rejection.
Audio is recovered by a quadrature F-M
detector that requires only a single low-cost
tuned circuit.
Type ULN-3859A's double-balanced mixer
permits low-noise operation while eliminating
spurious responses, effectively rejecting tweet
and I-F feedthrough, and reducing local
oscillator radiation. The mixer's high input impedance matches popular 10.7 MHz crystal
filters while its output impedance matches most
455 kHz ceramic filters. Although designed for.
use with a 10.7 MHz first I-F and a 455 kHz
second I-F, the mixer operates at other R-F or
I-F input frequencies through 30 MHz.
Type ULN-3859A has both a low-impedance
emitter-follower audio output and an AFC output. Few external components are needed for
operation with noise-activated or tone squelch.
This communications I-F system meets the
stability requirements of many automotive applications, and also meets the low-power
demands of portable radio design. Internal
voltage regulators and bias supplies ensure stable
performance despite variations in external
supply voltage (4 to 9 V) or temperature (-20°C
to +85°C).
A multi-stage 1 MHz differential amplifier/
limiter following the second I-F filter operates as
6--76
ULN-38S9A F-M COMMUNICATIONS I-F SYSTEM
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................................... 12 V
Mixer Terminal Voltage, Vin •••••••••••••••••••.••••••••••••••••••••• 1.0 V
Mute Terminal Voltage Range, VI6 . . . . . . . . . . . . • . . . . . • • • . • . . . -0.5 V to + 12 V
Operating Temperature Range, TA .......................... -20°C to +85°C
Storage Temperature Range, Ts ........................... -55°C to + 150°C
ELECTRICAL CHARACTERISTICS at TA
fo = 10.7 MHz, fm = 1.0 kHz, fd
Characteristic
Operating Voltage Range
Quiescent Supply Current
. Input limiting Threshold
Mixer Conversion Gain
Mixer Input Resistance
Mixer Input Capacitance
Mixer Output Impedance
limiter Input Impedance
Quiescent D-C Output Voltage
Audio Output impedance
Recovered Audio Output
Amplifier Gain
Quiescent D-C Output Voltage
Mute Switch Resistance
Scan Source Current
Test
Pin
4
4
18
3
18
18
3
5
10
10
10
13
13
16
15
= +25°C, Vee = 8.0 V,
= + 3.0 kHz (unless otherwise noted)
Test Conditions
VI4
= 0,
Mute OFF
VI4~0.7 V, Mute ON
-3 dB limiting
See Note I, Next Page
Min.
Typ.
4.0
-
8.0
3.0
4.0
2.0
24
3.6
2.2
1.8
1.8
3.6
500
700
53
!.7
4.0
4.0
-
See Note 2, Next Page
-
Vin
=0
Vin = 3.0 mV
f = 4.0 kHz, Vin
Vin ==
°
= 5.0
mV
2.4
450
40·
-
= 2.5 mA, V14>0.7 V
VI4 = VI5 = 0, Mute OFF
116
5-77
2.0
limits
Max.
9.0
6.0
7.0
6.0
-
Units
V
rnA
mA
JAY
dB
kQ
pF
kQ
kQ
4.4
V
-
Q
mV rms
dB
V
10
Q
-
mA
ULN·38S9A F·M COMMUNICATIONS I·F SYSTEM
TEST CIRCUIT
Vee
\---+-0 I-F INPUT
I----~-o
ffil------.,.-o
MUTE
SCAN· CONTROL
1 - - - - - - 0 SQUELCH INPUT
1 - - _ - - - 0 AMPLIFIER OUTPUT
1---+-----0 AMPLIFIER INPUT
1 - - - - _ - 0 AFC OUTPUT
fOl----\---o AUDIO OUTPUT
100K
lOOK
Dwg. No. A-II ,372
APPLICATION INFORMATION
1. In a typical application, with a 3.6 kQ crystal filter sourc:e,
Type ULN-3859A will give 23 dB conversion gain.
2. Because crystal filters are extremeiysensitive to reactive
loading, radio designers frequently have added a coil and/or
capacitor at pin 18 to cancel the input reactance component. This
practice is not required with Type ULN-3859A, since its input is
designed to match typical 10.7 MHz crystal filters. However, if an
external reactive component is used,it is important to adjust it for
optimal passband shape and not simply to peak it for maximum
sensitivity.
3. Pin 11 provides AFC. If AFC is not required, pin 11 should be
grounded, or tied to pin 9 to double the available recovered audio.
---11--_--1
I-F·
INPUT
47K
AUDIO o--tt--l-_---I
OUTPUT
**
Dwg. No. 1\-11.387
Figure 1
*Decoupling capacitors should be of the ceramic type with minimum inductance at the operating frequency.
··Capacitor value is 0.01 /J.F for 50 /J.S de-emphasis (Europe) or 0.015 /J.F for 75 /J.S de-emphasis (U.S.A.).
6---81
1.0
Units
/-LV
mV
%
%
dB
dB
V
V
V
V
dB
dB
V
V
V
kHz
UlN-3889AI-F SYSTEM
FOR F.MREEEIVER APPLICATIONS
PHASE SHIFT NETWORKS
100
pF
3Kffi\
100
pF
DWG. MO. A-91138,6,
Dw9. No. A-94398
. Figure2B
Figure 2A
L is selected to resonate with Cat 10.7 MHz and has an unloaded
Q of approximately 75. R(approximately 3.9 kil) is selected for a
voltage across L of 160 mV with an input signal of 100 /LV.
L is selected to resonate with Cat 10.7 MHz and has an unloaded
Q of approximately 75. R (approximately 8.2 kil) is selected for a
voltage across Lp of 150 mV with an input signal of 100 /LV; kQ, or
per cent of critical coupling (approximately 70%), is adjusted for
minimum output distortion.
GENERAL DESIGN NOTES
1. The phase shift network is aligned by applying an
F-M signal through a dec()upling network to pin I
and tuning for maximum recovered audio at pin
6.
5. If a high-impedance power supply is used (voltage dropping resistor), decouple pin 11 for the
lowest audio frequency.
2. A low-resistance path must be provided between
pins 9 and 10. No other biasing provisions are
required.
3. A low-resistance path must be provided between
pins 1 and 3. No other biasing provisions are
required.
6. The level of recovered audio increases with
higher values of loaded Q and higher values of
resistance between pins 6 and 10. It decreases
with lower values of loaded Q and lower values of
resistance between pins 6 and 10.
7. Mute bandwidth decreases with higher values of
loaded Q and higher values of resistance between
pins 7 and 10. It increases with lower values of
loaded Q and lower values of resistance between
pins 7 and 10.
4. Keep appropriate distance between the input (pin
1 and the input network) and the phase shift
network (pins 8, 9, and 10, and the phase shift
inductor).
RECOVERED AUDIO
;"",'"
10
20
RECOVERED AUDIO
AND A-M REJECTION LEVELS
AS FUNCTIONS OF I-F SIGNAL INPUT
~~
30
\
[\
40
so
~
60
A-M REJECTION
mmr
10
100
'"
10K
100K
I·F INPUT SIGNAL VOLTAGE. VIA' IN MICROVOLTS
Owg.
6---82
No
11-10,419
ULN-3889A I-F SYSTEM
FOR F-M RECEIVER APPLICATIONS
OUTPUT VOLTAGE LEVELS
AS FUNCTIONS OF I-FSIGNAL INPUT
-
...
~
...
~\"
S
~,S~
'"
0';'-<'
0
-<.,,-,<-
~~S
y.."-"
.",
L
o
1.0
10
~
~~
100
10K
lK
lOOK
I·F INPUT SIGNAL VOlTAGE. V,o' IN ~V
Dwg. No. A-II, 381
ATTENTUATION
AS A FUNCTION OF MUTE VOLTAGE
-20~1+++~HK++~~++++HHHK++~HK~~~1+~HH11
-40~1+++rH~+++rHH++++HH~+++r~+++r~1++rHH~
- 80 O\...I..J....L..I..L.J....L...UUO."""S..J....L.L.J....U-1..J...L
l .0.L.J...J....L.J....L..I..J..J...I.L.SI...W..J....L.L.J...J....L.J2-'.0..w..u...L..LI.J..J
2 .5
~UTE
VOLTAGE, V" If-j VOLTS
Dwg. No. A-l1,383
F-M TUNING ERROR RESPONSE
~
o>
5~++++HH++++~~+++r~++++HH++++rHH
~
?
4HH++++HH++++~~+++rHH++++HH++++rHH
~
~
3~++++HH++++~~+++rHH++++HH+++++rH
g
...
~
2HH++++HH++++~+++++rHH++++HH·++++rHH
is
~
":!;
NOTE: Outside the I-F filter
passband, pin 12 voltage will be
10.9' reduced as a function of system
gain.
o.':':'U-1...LL,.L...U~..w..u...I.LI~-!:-'-'LUU-1..J....L~u..J...LJ..L.J...':-:!
10.5
10.6
10.7
INPUT FREQUENCY, i,", IN MHz
10.8
Dwg. Nn. A-II,382
!}-83
ULN.3889AI-F SYSTEM
FOR F-M RECEIVER APPliCATIONS
AFC OUTPUT
AS A FUNCTION OF FREQUENCY SHIFT
'50
~ 50
0
/V
IX
IX
:>
~
V
/
«
~
V
/
100
-50
«
L
-,00
/
-150
-100
-80
-60
V
V
-40
-20
20
40
60
CHANGE IN FREQENCY, M m, IN kHz
80
,00
Dwg. No. A-ll,385
AGC AMPLIFIER RESPONSE
10
8
m:l++;j+l::l+l:l+l:I:++I:l+ttitmtttttHtmt1
> 8HH~++~~++~HH++++~++++HH~++~H
1::
,;...:
"
~
8 4HH~++~~+t~HH++++~++++HH~++~H
".«
u
OLU~LLLU~~LLLU~LLLU~
o
0.5
1.0
__
~~
____W
1.5
2.0
AGC INPUT, V", IN VOLTS
Dwg. No. A-l1.386
TUNING· ERROR MUTE THRESHOLD
AS A FUNCTION OF LOAD RESISTANCE
140
N
120
:t
'"Z
.: 100
::;
IX
0
IX
ffi
0z
Z
40
20
2
o
o
\
\
\
"
...........
j'.....
....
-.......
,0
IS
20
25
LOAD RESISTANCE, R7.'O, IN K2
Dwg. No. A-ll,384
6---84
b'TECTOR
, I,N
DETECTOR
BIAS
I-F OUT
!
<.n
i
7'
'00
~
~C
Q!Z
A~C
AGC
OUT
CONTROL
LEVEL DETEClOR/METER
MUTE1SQUELCH
OUT
..0
-.:1:1>
-.:1I
....
'"
Zm
-
...
"'",
~-<
-
O~
"'~
ri:I
RADIO INJEGRAIEDClRCUlTS (Continued)
ULN·2204A A·M/F·M RECEIVER SYSTEM
- TYPICAL APPLICATIONS AND OPERATION
of peak-to-peak voltage swings approaching the
available supply. To meet these performance objectives a new power amplifier design was required
having no more than one VBE of swing restriction.
Introduction
Through the relatively short history of bipolar
monolithic circuits, several revolutionary new circuits have been developed for a-m/f-m receiver
design. A. Bilotti pioneered the original monolithic
f-m-quadrature detector/I-F gainblock in the form
of the Sprague ULN-2111A.
As shown in Figure I, the output stage is comprised of 2 NPN transistors (Q42 and Q49) plus a
phase inverter (Q54). Quiescent operating current is
set up by the current source (I).
Subsequent devices have included gain-control
stages, output drivers, and voltage regulators.
During this same period a-m integrated circuitry
showed far less inspiration. Numerous a-m circuits
were developed which in essence attempted to combine the active elements of a discrete bipolar a-m
receiver in a monolithic circuit. To no surprise, the
resulting chips were at best capable of performance
no better than the parent discrete design, and with
the uneconomical displacement of three discrete
transistors with one integrated circuit. In addition to
the a-m-only circuits and f-m-only circuits, a-m/f-m
circuits were also attempted using the same design
approaches used for the a-m-only circuit, that of
combining an existing discrete receiver circuitry in a
monolthic device. The results were much like the
a-m only efforts, a bewildering collection of
economically unattractive circuits of modest performance.
DWG. "0.1.-10.628
Figure I
To achieve useful cost and performance objectives,
the ULN-2204A was designed with careful attention
to the cost and performance objectives of the modern
portable and table model broadcast receiver. Concern for low external component count, low power
consumption, wide supply voltage range, and versatility remained foremost as design objectives.
Assuming Voq = VCCI2 then the collector
current of Q54 = I, ignoring base currents, and if
Q54 is matched to Q49 as is possible in a monolithic
circuit, then the collector current of Q49 equals the
collector current of Q54. The circuit in Figure 1
achieves an excellent voltage swing capability of VCC
- VBE - 2VCE(SAT)' This totally NPN configuration also has good freedom from the highfrequency problems that often occur with quasicomplementary composite NPN-PNP configurations.
Power Amplifier
To achieve the desired performance objectives of
high power output and efficiency from a 2 to 12 V
supply requires that the power amplifier be capable
6-----86
RADIO INTEGRATED CIRCUITS (Continued)
Although the circuit in Figure I has been incorporated in production monolithic circuits in essentially the form shown, in practice it has unacceptable design restrictions. Since I is also the base drive
current for Q42, the ratio of available base drive
current I to idling current is proportional to the ratio
of the emitter areas of Q49 to Q54. For practical
values of IQ54/IQ49, i.e. one, the circuit has a
serious implementation problem; it requires three
output transistors (Q42, Q49, and Q54).
Vee
To reduce the size of Q54, an additional transistor
(Q48) is added to the circuit as shown in Figure 2.
Transistor Q48 divides I by its beta + I allowing Q54
to be reduced in area by a similar value. In the practical realization of the ULN-2204A, Q54 is chosen as
115 the emitter area of Q49 with a typical beta for
Q480f6.
Figure 3
capacitor. Overall negative feedback, set by the ratio
of R33 to R32, is applied to the inverting input Q45
through an NPN emitter follower (Q46) which also
provides d-c level shifting.
25
R32
7K
R41
J-+-t~--N'>"-i-- F~~~ 6~~ 12
DWiJ.1I0. f>,-IO.€2'l
3.9K
R33
. r - r - - - - r - - TO
Figure 2
Figure 3 illustrates other refinements in the practical realization of the output circuit. The drive and
idling current I is derived from a VCC dependent
source allowing maximum drive under maximum
supply conditions while affording reduced drive and
associated current conservation under minimum
supply conditions. In addition, the Q48 divider circuit is refined to reduce PNP beta dependence.
Finally with the addition of an input emitter follower
(Q53) and a local negative feedback loop (R36), the
output is completed as it appears in the ULN-2204A.
NEXT STAGE
DWG. NO. A-IO,627A
Figure 4
The VCCI2 output tracking is achieved by summing the current flow through R33 and R32, with the
current through R41 "reflected off of ground".
Thus VCC/2 tracking is maintained by the voltage
drop across 2 resistors. This allows the current from
R41 to be bypassed at Pin 10, thereby combining the
ripple bypass capacitor with the audio feedback
capacitor.
The input stage of the power amplifier (Figure 4) is
comprised of a PNP differential pair (Q44 and Q45)
preceded by a PNP emitter follower (Q43) which
allows d-c referencing of the source signal to ground.
This eliminates the need for an input coupling
6-87
RADIO INTEGRATED CIRCUITS (Continued)
Figure 5 illustrates the complete power amplifier as
realized in the ULN-2204A, including the external
components. The remarkably-low external component count, (only two capacitors including the
output coupling) reflects concern for simplicity in
implementation, yet the device achieves excellent performance. Typical output power can be as high as
850 mW from a 9 volt supply and useful output
power at supply voltages of as low as 2 volts, with
minimum of distortion as the curves in Figure 6
illustrate.
I. 2
1.0
~
"
~
of
THD=JO%
«
Q
,,~,
4 "1/
G.: "
~/~"'-;-qy
i
0.6
il
~
~
Q4;~
"tf;
I (.,"t,
,~'"
"
,.
-""/
~~I
I
,
I
0.4
:{
''V
5)<';"1
...}:_ _ _
q..'v
cq..'r-
~' '~.G.NO.,'\-IO.G31t
Figure 6
r-------4r------------4r--------~--~------------~13
Vee VRE('
10
210
037
50
50
VOLUME
~--4-~~~~~--~---+--~--~----~+_--4-------~--~.IIr_--_1
HIGH LEVEL
CROUND
11\":(;,:(1.
FigureS
6-88
14
RADIO. INTEGRATED CIRCUITS (Continued)
Receiver
For a-m the gain is lowered by reducing stage
current. This is accomplished by reducing the
current applied to the I-Famplifier by the current
source Q17. The fifth I-F stage (Q9 and QIO) is
operated at maximum gain and current to provide
full signal to the a-m and f-m detector.
The a-m signal is processed from the antenna to
the detector output via the traditional blocks of
mixer, I-F, and detector enclosed in a reverse A-G-C
loop. However, closer examination reveals certain
very important advantages that can be afforded only
by the monolithic design.
The a-m mixer is a fully-balanced mixer based on a
four-quadrant multiplier as shown in Figure 7. This
affords rejection of both the oscillator. and .input
signal as observed at the output. In addition, an
analog multiplier is (as the name implies) a true linear
device. Balanced operation of the mixer provides
typically 25 dB of I-F rejection at the input, with a
similar rejection of the associated noise passband.
Also, the linear operation of the circuit affords good
freedom from intermodulation product responses.
A:M/F-MDetector
The detector is also a combination circuit. It
recovers a-m audio by peak detection and f-m audio
by phase discrimination.
The a-m signal from the I-F output appears at Pin
15 across T2 as shown in Figure 9. The signal is applied to the base of Q18 and after phase inversion by
T2 is applied also to the base of Q19. Full wave
detection occurs at the emitter of QI8 and Q19,
utilizing the on-chip junction .capacity for integration. This requires only that the stage current be
chosen at a low value (typically I iJA) to produce the
desired integration.
I-F gain is provided for both a-m and f-m by a
common I-F amplifier (Figure 8) using "stacked"
selectivity. In f-m operation the gain of stages I, 2,
3, and 4 (QI thru Q8) is set at typically 76 dB
providing a typical limiting threshold of 40 !lV.
The f-m detection process relies on the
phase/ frequencY relationship of a tuned external circuit for demodulation. The device converts phase
A-M
~I
L2K
750
D'IIG. NO.. A-lOb))
LOW LEVEL
GROUND
Figure 7
&-89
RADIO, INTEGRATED CIRCUITS.(Confiiiued)
variation, as observed across the tuned network, to a
proportional voltage. The basic phase detection
process combines the positive-going portions of the
quadrature and reference signals (Pin 14 and 15,
respectively), and. evaluating the duty cycle of the
rc;:sulting waveform!ls shown in Figure 10. The combining action occurs at the emitters of QI8 and QI9
resulting in the waveform shown. Subsequent processing involves squaring up the signal in a limiter,
compris'eo of Q24 and Q27, resulting in the
constant-amplitude plus train which is also shown.
This pulse train is then applied to a PNP gain stage
which, owing to the PNP's low f1 of typically
I MHz, integrates the pulse train into an average d-c
voltage which appears at Pin 8, the detectQr audio
output. Figure II illustrates the complete a-m If-m
detector of the ULN-2204A, including the external
components.
To complete the circuit, the a-m stages also require A-G-C. This is implemehted in the ULN2204A by internally setting the I-F supply voltage
(Pin 16) equal to the voltage at the detector audio
output. As carrier appears, a corresponding reduction in the d-c voltage occurs at the audio output
terminal and at Pin 16, where an external bypass
capacitor removes audio from the A-G-C line and
sets the time constant.
A-M GAIN ADJUST
15 I-F
AGC/AFC
OUT
IK
FROM PIN 8
D~'(j.
NO. S-1376
Figure 8
Figure 9
Figure 10
6-90
RADIO 'INTEGRATED CIRCUITS (Continued)
.------'-t-_---ll--.._--._-+-+---+--H13
8:~f--f-- TO F-M TUNER
9.1V
Dwg. No. 8-1450
DUMMY ANTENNA
Figure 9
6-104
F-M IN
RADIO INTEGRATED CIRCUITS (Continued)
PARTS LIST FOR FIGURE 9
FI
F2
T1
T2
T3
SFEIO.7MA, F-M I-F Filter
CFZ455C, A-M I-F Filter
RWO-6A7640BM, A-M Ose., Qu = 50,11:1 tUflls ratio
RLCS-4A7893GO, A-M Det., 256 !ill, Qu = 75, 5.4:1 tUfllS ratio
BKAC-K365IHM, F-M Det., Qu = 65
LOW·COST AUTO RADIO PERFORMANCE CHARACTERISTICS
(Figure 9)
A-M
10dB (S + N)/N = J() f.lV with 30070 modulation
Maximum Signal = 300 mV with 80070 modulation
Automobile Tuner With A·MR·FStage
Improved sensitivity and excellent overload
performance with the radio tuner illustrated in
Figure 9 may be obtained by adding the R.F
stage of Figure 10. A secondary winding has
been added to L53 to couple it to the mixer of
Type ULN-2241A. The emitter of the R-F stage
is biased up to 0.5 V when it is turned OFF to im-
prove the overload. This condition causes the
R-F stage to be turned OFF at a 10weiR-F level.
Large signals are not rectified in the R-F stage.
This circuit will handle input signals to 1 volt
into the 30 pF/30 pF dummy antenna.
4.7K
MIX BIAS
17
,=-'--"----+--118
A-M
INPUT
Dwg. Nil. A-ll,J?S
Flgur. 10
6--105
RADIO INTEGRATED CIRClIITS (Continued)
Varactor·Tuned Automobile Radio
As 'the receiver is tuned off a strong station,
the AGC supplied by Q2 is normally removed
from the R-Fstage QL Large signals applied to
the 0.--'"
07
33K
05
~~R
. 33K
08
A-M
)>-.- - . " , - - - - . , - - - ,
AGe'
lOOK
Dwg. No. 8-1452
Figure 11
PARTS LIST FOR FIGURE 11
Dl-3
D4-7
Fl
F2
Tl
T2
T3
T4
T5
QI
Q2-5
Toko KV1215 or Sanyo SVC311 A-M Varaetor Diode (3)
IN914 or IN4148 General Purpose Diode (4)
SFJIO.7MA, F-M I-F Filter
CFU455C, A-M I-F Filter
RWOS-6A7894AO, A~M R-F, 178 "H, Qu = 120, 10:1 turns ratio
RWOS-6A7894AO, A-M R-F, 178,..H, Qu = 120, 10:1 turns ratio
RWOS-6A7892AO, A-M Ose., Qu = 120, QI = 80, 5:1 turns ratio
RLCS-4A7893GO, A-M Det., 256 "H, Qu = 75,5.4:1 turns ratio
BKAC-K3651HM, F'M Det., Qu = 65
MPF820 A-M R-F Amplifier
2N4124 General Purpose Amplifier
6-107
AUDIC
'6UT
STOP
SIGNA'I.
(·6Vl
RADIO INTEGRATED CIRCUITS (Continued)
THE ULN·2242A,
A COMPLETE AM/FM
SIGNAL PROCESSING SYSTEM
automotive and high quality home entertainment
. broadcast receivers. In addition to providing stateof-the-art receiver performance, this "one-chip"
receiver also provides for meter drive, interstation
muting, delayed AGe (for control of external AM
and FM RF stages), and simple AM/FM switching.
Introduction
This paper describes a monolithic integrated circuit
which makes possible substantial simplification of
AM/FM receiver design, while at the same time improving system performance.
Prior attempts at monolithic implementation
started with the quadrature detector/IF gain block
which was first described by A.Bilotti in 1967.'
Other devices were developed for AM circuits which
in essence attempted to combine the active elements
of a descrete bipolar AM receiver. The resulting
monolithic devices were capable of performance no
better than the original discrete design, and with the
very uneconomical displacement of three discrete
transistors with One integrated circuit.
Circuit Description-AM Mixer
An analog multiplier is used for the AM mixer.
It substantially outperforms discrete mixers in the
areas of noise and spurious response rejection. As an
AM mixer this circuit provides both local oscillator
and received frequency rejection. The local oscillator
is suppressed by approximately 40 dB and the intermediate frequency feedthrough is down by 26 dB.
Spurious response suppression is important as a
receiver performance objective, and also the
receiver's ability to reject undesired noise passbands. The mixer's freedom from oscillator signal in
To achieve useful cost and performance objectives,
a new monolithic AM/FM signal processing system 2
was designed with careful attention to the total
system costs and performance objectives of modern
['C, OUT
V+
AM
ANTENNA
r
500
DWG.1I0. A-I0635
Figure 1
NOTE: This paper was originally presented at the IEEE Fall Conference on Broadcast and Television Receivers in Chicago, December 1977.
6---108
RADIO INTEGRATED CIRCUITS (Continued)
the IF also reduces the outbandrejection requirement
for the IF selectivity elements, simplifying the use of
low-cost ceramic filters. The mixer current is chosen
to provide 20 mmho of gain with an acceptable output overload capability.
Combined AM/FM IF
Stacking of the AM and FM selectivity components allows the use of a common IF amplifier.
The IF (Figure 5) is a fully-balanced amplifier
having each stage differentially coupled to the succeeding stage. Inaddition to providing a 6 dB per
stage increase in gain over single-ended coupling,
this ma,intains constant stage and emitter follower
currents to prevent signal current from appearing in
on-chip grounds or supplies. Attendant signals or
noise appearing on ground or supplies will be rejected as common mode by the balanced stages.
The differential coupling approach also balances
capacitive effects to minimize phase delay
modulation with various signal levels. To further
control AC effects and reduce device input
capacitance, the first IF stage is a cascode configuration to reduce Miller effect.
The AM Detector
The AM signal is peak detected, recovering audio
and a d-c voltage to control AGC. Low audio distortion of 1070 is achieved by maintaining a relatively
constant current and resistance load, presented by
the emitter-base junction of Q82 as shown in Figure
2. The recovered audio is taken off in a balanced
configuration and summed at a node to cancel stage
current.
AMAGC
AM gain control is achieved by reverse AGC of the
first IF by cutting off stage current to the first IF
stage. AGC to the mixer is by the same method, but
with a 14 dB delay to optimize gain distribution for
noise considerations, and allow a better match to the
input to the mixer. Gain reduction as a function of
signal level is shown in the graph of Figure 3.
In the FM configuration, the IF stages are
operated as limiters and provide 76 dB of gain with a
corner frequency of 36 MHz. Coupled with the
detector section, the combination achieves a 3 dB
limiting threshold of 15 /AV.
r-----~------~------~------~----~
AM
I-F
Figure 2
&-109
Vee
RADIO INTEGRATED CIRCUITS (Continued)
o
10
,
CIl
""
~
i
z 20
o
;::
(J
::>
c
~ 30
""
~ ~ ....
~
l:/<
!
I,
I
Ii
i
I
i
l'"
1, lliL
I,
!A-MMODE! •
'
1+ I , ' "
I
I'"
,,'
&4
-e
i
'
i
i i
I,
IJ-
:i,ill
IiI
III
!
~i'l
I ,
,
z
~~
iI
Iii
\
....
:i
~,
,
r
40
10
INPUT
I
I
100
IK
VOLTAGE,
Vin IN
I
II
10K
lOOK
}LV
OWG. MO. A-I0637
Figure 3
2,0
I I 1111111
r--....
V ...
TUNING
~
--
......
0,5
/
v
11
I III
V 7 _/3
-.; Ave
VOLTAGE, V'7
MODE
IA-M
7
III
-0.5
I
I
VOLTAGE,
..--
/
o
METER
10
IK
100
INPUT
VOLTAGE,
Vin
Figure 4
6-110
IN
lOOK
10 K
}LV
OW(,
NO. 6-1169
RADIO INTEGRATED CIRCUITS (Continued)
AM
~
OWG.NO.
A-I0638
osc.~
Figure 5
AM operation utilizes the same IF section as used for
FM with a gain reduction and redistribution. To accomplish this, stage current is reduced in the second,
third, and fourth IF stages. This puts 20 dB of gain
in the first, and only 6 dB total in the remaining three
stages, and also maintains a reasonably low input
impedance to the IF.
Recovered audio is processed through the same
current mirrors, summing resistor, and output pin as
was used for AM. AFC and meter information is
provided open collector for use with an external load.
This allows the AFC to be used with any reference
voltage between V + and ground, and also permits
adjustment of AFC gain by the choice of load
resistor value.
The FM Detector
FM Mute and AGe Detectors
The FM detector (Figure 6) is an analog multiplier
operating in the high-level injection mode. In this
mode, a multiplier provides high recovered audio
with low audio distortion. Like the IF, the detector is
also driven differentially. In addition, the inphase
and quadrature signals are passed through the same
number of stages. This assures good freedom from
a-c offset, i.e. detector d-c offset caused by unequal
phase delay in the two applied signals.
The mute and AGC provide d-c voltages for control of signal level related functions. The basic detector (Figure 7) is biased as a triple Darlington current
source, with a quiescent state value of 10 iiA. Detector operation is accomplished by applying an a-c
signal to C3 which forms a voltage doubler with the
emitter-base junctions of Q61 and Q62 plus the
smoothing Miller capacitors of convenient size for
integration.
6-111
RADIO INTEGRATED CIRCUITS (Continued)
r---~------~------~----~-------OVcc
RFC
I}-----t----+---+------------------------'----o V'EG
t I
Figure 6
0.2
061
I
...L
..,.. C4
I
I
m
Figure 7
5--112
RADIO INTEGRATED CIRCUITS (Continued)
Signal for the mute detector is taken out of the
quadrature coil to limit bandwidth and allow mute
detector operation at the approximate limiting
threshold of the device. The mute attenuation is obtained by cutting off the current mirrors to the
audio. This achieves greater than 60 dB of attenuation with a minimum disturbance in d-c levels.
All AM signal processing is performed within the
device. The gain AGe and noise performance of the
device in the AM mode is sufficient to achieve a
useable sensitivity of 150 JolV 1m While featuring an
overload capability of 2 V1m with a 15 cm ferrite
antenna.
Conclusion
The AGe detector is basically the same as the mute
detector, with the exception of the source of the a-c
signal. This detector responds with a 2 mV signal input. Both detectors are biased to a no-signal value of
4.7 volts, and approach zero with increasing signal
input as shown in Figure 8.
Much of the original design for this new device was
to define its operation as a system rather than as a
To achieve the same
simple component.
revolutionary impact in AM/FM radio receivers as
the design by A. Bilotti did for FM only, the new
device required' more than simple assembly of
discrete components into an integrated circuit. Despite the integrated circuit's limitations on pin count
and component values, the monolithic process with
ion implantation is capable of fabricating superior
circuit implementations such as fully-balanced
mixers, multi-rate AGe systems, linear AM detectors, etc. at costs comparable to inferior circuits constructed with discrete components.
Typical Application
Figure 9 illustrates a typical home entertainment
receiver application for this new AM/FM signal
processing system.
Sufficient FM IF gain is provided by the device to
eliminate the need for any additional external gain
besides that of the tuner. A 3 dB limiting sensitivity
of about 2 JolV is easily achieved.
5.0
r\
r-- r4.0
I F- M
IIII
MODE
\!;
('>
3.0
0
c....
~
"
'"'"
~
0
2.0
c:.....
...
~
0
I\t
-~
10
~
IK
100
INPUT VOLTAGE.
v;,.
100K
10K
IN ~v
DWG.
Figure 8
6---113
~O.
B-1366
RADIO INTEGRATED CIRCUITS (Continued)
FM ANTENNA
10K
MPX.05C.
DEFEAT
FM
AGe
Pia TUNER
HEAD
~U--r~'~~
FM
TUNER
HEAD
Gj1-L-O---- -1
:
I
IF
OUT
I
AM
ANTENNA
I
U§}---r--t--~jj~,;
~LUJ---+~-+-~--JII
~
100
500K
7,5K
47K
,----,r-----f71
*,01
MUTE
4.7K
+12.5\1
:~ i~~~~
AUDIO
OUT
'-----------'
OWG. MO.
B~1380
Figure 9
The device is most often specified in a standardized
test fixture, eliminating as many variables as possible
including AM antenna and FM tuner characteristics.
Typical overall performance in such a fixture is
illustrated in the following curves.
the "one-chip" radio receiver without the performance tradeoffs so common with previous AM/FM
integrated circuits.
This new monolithic AM/FM signal processing
system which has been described, provides the radio
designer with a modern cost-effective approach to
6-114.
(I)
A. Bilotti and R. S. Pepper, A Monolithic
Limiter and Balanced Discriminator for FM
AND TV Receivers, National Electronics
Conference, October (1967).
(2)
Sprague Electric part number ULN-2242A.
RADIO INTEGRATED CIRCUITS (Continued)
10
I
....--
o
/
/""
[\,
UJ
...J
/
{i~ "- ,......
i=
q
-40
I
, I
~
-50
f..-- fo-
"-
A-M
o
I'I
/V
V
THO
,
-60
AUDIO, Vou '
II
~ -30
...J
UJ
Ct:
I 1111 HII
RECOVERED
S+N
r::--
II
100
10
MODE
dB • 325mV
IK
I
lOOK
10K
DW(;.
~o,
B -1367
INPUT VOLTAGE,
Figure 10
II
,
0
/'
~
RECOVERED
AUDIO, Vou '
-10
F-M
,
..,
al
-20
I
~
...J
UJ
-30
>
UJ
o dB
I
MODE
, 425 mV
V
V
...J
UJ
>
i=
q
...J
UJ
Ct:
............
OUTPUT NOISE
-40
i\
,\1\
1\
-50
~
J
-60
\
10
100
\ I
A-M REJECTION
/"r-.
v
1\
INPUT VOLTAGE,
Figure 11
6--115
1\
V-- ........
I
TO -BOdS
IK
Vin
IN
lOOK
10K
!'-V
Dw(;. ~O. 8-1368
.RADIO INTEGRATED CIRCUITS (Continued)
DEVELOPMENT OF HIGH-QUALITY RECEIVERS
FOR A-M STEREO
As a guide, the following receiver parameters have
been chosen: (The modulation is 30% at I kHz unless otherwise noted.)
Introduction
Almost all current designs for A-M receivers or
tuners use a ferrite antenna and lor a tuned R-F stage
with one or two separate tuned R-F circuits. These
are basically just slight modifications of the old fivetube radio. Because of this, almost all literature
written on the subject of A-M receiver design was
written when large tube-type receivers were popular.
When a receiver must have an audio-frequency
response greater than about 4 kHz, this arrangement
is not satisfactory and a new approach is required.
This does not, however, necessitate the design of
new integrated circuits for the R-F and I-F portions
of high-quality A-M stereo tuners. Presently available integrated circuits can be used (with minor circuit variations) to produce A-M tuners with performance that compete with that of the receiver's F-M
section.
1.
2.
3.
4.
5.
6.
7.
20 dB S+N IN '" 200 ~V 1M
Adjacent Channel Attenuation'" 35 dB
Image Rejection '" 50 dB
Maximum Input Signal 1 V 1M
THD < 0.5% and 1% at 80% Modulation
Maximum SIN", 50 dB
Audio Response: 20 Hz - 15 kHz
Unfortunately, items 2 and 7 are incompatible
with channel spacings of 10 kHz, so either a dualbandwidth I -F or poorer frequency response must be
accepted.
Design Parameters
I-F Filters
A-M stereo testing of many different types of A-M
receivers indicates that receivers performing well
with monophonic signals also perform well with
stereophonic signals. A good criterion appears to be
total harmonic distortion and audio frequency response. In addition to the usual requirements of good
sensitivity, selectivity, image rejection, and the ability to handle large signals, distortion, signal-to-noise
ratio, and audio fidelity are important parameters
when designing A-M receivers for stereo or mono.
Fortunately, if the I-F filter response can be kept
symmetrical, current A-M integrated circuits will
give very low distortion for a large range of signal
levels. In addition, most of them have also had their
gains apportioned properly so that under AGC conditions, signal-to-noise ratios are not degraded and
high ultimate S+ N IN ratios can be reached. This
eliminates some problems for the designer, but does
not solve all of the possible problems.
The audio distortion and receiver selectivity are
essentially determined by the I-F filter of a receiver.
(Some other factors degrading the audio frequency
response will be discussed under R-F circuits.) The
traditional approach of using LC networks in a good
quality receiver becomes very difficult because of Q
limitations.
As an example, consider a transitional filter with a
40 dB bandwidth of20 kHz and center frequency of
455 kHz.
Number of
Sections
3
4
5
6
7
8
Max.
3 dB BW
3.2 kHz
5.0 kHz
6.7 kHz
8.0 kHz
9.1 kHz
10.5 kHz
Min.
Coil Q
211
180
238
322
411
483
Zdv~~~:, ?91~~O IEEE. Reprinted by permission. This paper was originally presented at the IEEE Fall Conference on Consumer Electronics, Chicago, III.,
6-116
RADIO INTEGRATED CtRCUITS (Continued)
The maximum available coil Q is only about 140,
so it is almost imperative that the I-F filter be a
ceramic filter designed specifically for that purpose.
Suitable communications ceramic filters are available, but at a cost 3 to 10 times greater than that of
standard I-F transformers; There is, however, a good
compromise available. Reasonably priced cerlimic
ladder filters with zeros in their transfer function, are
available with the following response (Figure 1):
frequency response. A few calculations will demonstrate the problem:
If the R-F circuit loaded Q is 60:
1400 kHz - 3 dB BW= 23 kHz, Audio =
12 kHz
At 600 kHz -3 dB BW = 10 kHz, Audio = 5 kHz
600 kHz Image rejection = 48 dB
If the Q of the ferrite antenna or R-F'tuned circuit
is reduced to improve the .audio response, the image
rejecijon suffers, In the case of the ferrite antenna,
the sensitivity also suffers:
E
g
v
DWG.NO. A·ll,510
Figure 1
The zeros can be selected to fall at ±1O kHz· for
narrow-band I-Fs, and at ±20 kHz for wide-band
I-Fs. The minimum littenuation beyond the zeros of
only 27 dB is too small, but this falls within a range
where supplemental inductive 'filters can .be used.
This requires buffers between the..coil and ceramic
filters, but, as We shall see later, som,e integrated
circuit designs. e!\sily accommodate' thIs arrangement.
'
It has been foundbyexperiment that a full 20 kHz
or even 15 kHz audio response is not necessarily
desirable in a high quality A-M tuner, and might
even be undesirable. So much background noise and
interference from other stations. is present even during local da~time listening that a .narrower
bandwidth is more acceptable. A good compromise
appears to JJe' abOut 20 kHz for 3 dB, bandwidth.
This is degraded by other fi~tering: in the set plus the
necessary 10 kHz notch filter in the audio output to
give an overall audio frequency response of ab out. 7
to 8 kHz. In the narrow bandwidth mode for nighttime listening, the ±1O kHz attenuation must be
greater than 40 dB, restricting the audio response to
about4 kHz. It should be noted that this is considerably better than'the 1.6 kHz to 3 kHz audio response
of current receivers.
R-F Circuits
The R-F circuits of a high.-quality A-M tuner present difficult challenges. The first occurs becau~e the
R-F stage bandwidth should not degrade the audio
n
It·
A
f
Q
E
Eg
=
nltAf E
60
y oltage Across Antenna Circuit
= Number of Turns
=' Antenna: Permeability
= Antenna Cross Sectional Area
:;: Received Frequency
= Antenna Q
= Electric Field Strength
= Induced Voltage
This situation can. be improVed by. using a large
loop ofa few turns of wire, In this case, the formula
is the same with It being replaced with Ito' This
antenna must, however, be very .large in crosssectional area (typically 1 m 2) before!t is effective,
It is also directionaL
The only othel' alternative is the old-fashioned
wire antenna which turns out to be much better in
terms of signal reception. For this type:
e
Eg=yE
e=
Antenna Length
Now, the received SIgnal can be increased to offset
reduced Q simply by inaking'the wire longer,
This stillieaves the problem of how to d~al with
the loss in image rejection when the R-F circuit Q is
reduced, The most obvious solution is. to. use a
double-tuned R-F circuit. This caD be manipulated to
have constant bandwidth with different. center fre-.
quencies so almost any desired iesult (without severe
loss in image rejection) can be obtained.
Additionally, the wider R-F bandwidth reduces
tracking problems which are not usually serious for
A-M mono signals, but which will cause problems
with A-M stereo signals because of the group delay
variations they produce,
6--117
II
RADIO INTEGRATED CIRCUITS (Continl,led)
This leaves two possibilities for antenna' input
circuits:
The audio output terminal (pin 4) includes a
10 kHz notch filter and a 15 kHz low-pass filter to
reduce unwanted noise in wideband operation. Note
the simplicity of the double-tuned R -F filter. The two
coils are identical and a mutual coupling capacitor is
used to give greater coupling at low frequencies.
1. Couple the antenna directly to the double-tuned
circuit and suffer a 6 dB msertion loss. '
2. Use an untuned FET input and put the doubletuned circuit between the FET and the mixer.
,
.
, The sec?ndtun~t shown in Figure 3 uses a very
popular A-M-only hltegrated circuit (2). This IC,
while not having a balanced mixer, has a separate I-F
stage perfectly suited to driving the ceramic I-F filter. The R-F stage is slightly different here but retains the double-tuned interstage filter. The required
R-F gain is higher because of the lower overall gain
of the IC.
'
Option 2 also eliminates the need for an antenna
trimming capacitor. This can be a significant cost
savings in automobile receivers. In both cases however, ~e Q of the antenria circuit will be quite iow at
the low end of the A-M band" and tl)e receiver will
have somewhat poor I-F rejection. This can easily be
solved by using an integrated circuit with a doublebalanced mixer.
Instead of two double-tuned I-F filters, a 3-section
filter is used and transistors are. again used for
bandwidth switching. The lowpass and notch filters
are also retained in the audio output.
Receiver Designs
Illustrations of two high quality A-M tuned designs which use currently availab,le parts are shown
' '.
,
in Figures 2 and 3.,
Both achieve the following performance levels.
S+N
20 dB -W- 100 pV 1m
Conclusion
(depends on antenna length) ,
Image Rejection = 55 dB
-.3 dB audio frequency response from 550 to
1600 kHz:
wide - 7.5 kHz'
narrow ---.: 4 kHz
THD < 0.5% at 30% modulation
Maximum signal level > I V 1m
Max signal-to-noise at ,30% modulation = 47 to
50 dB
The first design'shown in Figure 2 uses a combina- '
tion A-M/F-M integrated circuit (I) with a balanced
mixer for A-M. AjunctionFET must be used for the
R-F stage to obtain a reasonable sensitivity
(MOSFETs are very noisy at these low frequencies),
but since it has a high feedback capacitance, a transistor is also used to form a .cascode stage. AGC ,is
derived from the IC and is used to reduce the current
of the R-F stage. Since the IChas enough gain, the
R-F stage gain can be kept low to reduce overloading. The ceramic filters iilthe IF stage are separated
by low-cost buffer transistor stages which also perform the bandwidth switching . Added to the ceramic
filters are double-tUned input' (pin 14) and output
coils (pin I )to suppress the spurious responses of the
.
'
filters.
It has been shown that high-quality A-M tuners
using existing monolithic integrated circuits can be
designed and thefr cost is reasortable. They are suitable for driving A-M stereo decoders and should
produce very good A-M mono or stereo results. In
the case of the first tuner, the 455 kHz signal to the
decoder can be taken from the last I~F collector, or
from a secondary winding on the detector coil. A
455 kHz signal of high-enough level is somewhat
harder to obtain from the second tuner . The easiest
approach appears to be to amplify the approxhnately
5 m V detector input signal. The internal detector
then serves to generate AGC signals.
The advent of A-M stereo may hopefully serve as a
catalyst for the re-development ofgooo A-M tuners
which died out when the "all-American" five-tube
table radio was first introduced.
.References
(I) Sprague Type ULN2240,41,42A, or TDA1090.
(2) Sprague Type ULN2249A or HAl 199 •
6--118
RADIO INTEGRATED CIRCUITS (Continued)
....
100
,----.. ~
W ~.lU~
I -- ,
r --
II
..
"'"
.:
1
I.
'"
DWG.NO. B-1469
Figure 2
QI-J503
TlS1!!
AUDIO
02-062N4124
OUT
DWG.NO. 8-1470
Figure 3
6--119
Q
,,", !fI""'''
,4
TELEVISION I.NTEGllATED CIRCUITS
,¥ Fi'I'*
";;;,$Of'
SECTION 7 - TELEVISION INTEGRATED CIRCUITS
Selection Guide ................................................. 7-2
UlN-2211B
UlN-2224A
UlN-2260A
UlN-2261A
UlN-2270B
UlN-2290B
ULN-3914A
2-Watt TV Sound Channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Chroma Demodulator .....................................
AGC Control, Sync Separator, and Scan ProcessQr ................
luminance Processor .....................................
and 22700 (TDA1170) Vertical Deflection System ....... , ........
(TDA3190) and 22900 (TDA1190Z) 4-Watt TV Sound Channel ........
Chroma/luma Processor ..................................
7-3
7-8
7-12
7-15
7-19
7-25
7-32
See Also:
UlN-3702Z for use as Vertical Output Driver .......................... 8-22
Application Notes:
UlN-2211B F-M Sound System .................................... 7-34
UlN-2260A Signal, Sync, and Scan Processor ......................... , 7-50
7-1
o
TELEVISION INTEGRATED CIRCUITS
SELECTION GUIDE TO TELEVISION INTEGRATED CIRCUITS
Device Type
ULN-22l1B
ULN-2224A
ULN-2260A
ULN-2261A
ULN-2270B/Q
ULN-2290B/Q
ULN-3702Z'
ULN-3914A
Chroma
Luma
Sound
X
Defl.
X
X
X
X
X
Sync
X
X
X
X
NOTE: Additional devices for use as sound channels may be found in Section 6 and audio amplifiers may
be found in Section 8.
'See page 8-22.
7-2
ULN-2211BTV SOUND CHANNEL
ULN-2211B TV SOUND CHANNEL
-- 2-WATT OUTPUT
FEATURES
•
•
•
•
•
•
•
•
Low Limiting Threshold
Low External Parts Count
Wide Operating Voltage Range
70 dB Limiter Gain
70 dB D-C Volume Control Range
Automatic Thermal Shutdown
Output Current Limiting
20 dB Ripple Rejection
DESIGNED for use as the entire sound function in
television receivers or F-M table radios, the
ULN-221IB sound channel will directlydrivea 160hm
spe;aker with more than 2 watts output. This monolithic integrated circuit will operate from a single 18 V
to 28 Vpowet supply and can also function (with
reduced power output) with supplies as low as 12 V
if additional decoupling is provided.
power dissipation with standard cooling methods.
The unique lead configuration allows easy attachment
of a heat sink and yet permits the use of a standard
I.e. socket or printed wiring board layout.
The ULN-2211B is supplied in an improved 16-lead
plastic dual in-line package with heat-sink contact
tabs. A copper alloy lead frame allows maximum
REGULATOR
OUT
Vee
8
LOW-LEVEL
GROUND
.~'::~~
I-F INPUT
I- F
DECOUPLING
16
GROUND
OE-EMPHASIS
DoC
OET
IIOl.lM. our
CONTROL
~
AMP
IN
FUNCTIONAL ·BLOCK ·DIAGRAM
7-3
(U) .
GROUND
!l'III3. 110.
A-IO,5~
o
ULN-2211 BTV SOUND CHANNEL
~
~
1!:
.P
ABSOLUTE MAXIMUM RATINGS
t
'~"
Supply Voltage, VCC .. " . " . " ... ' .... " .... ' " " ••• +28V
Regulator Output Current, IREG ..................... 10 rnA
Input Voltage (Pin lO), VIN ..................... : . +4:0 V
Package Power Dissipation, PD ................. See Graph
Operating Temperature Range, TA.. " .... -20°C to +B5°C
Storage Temperature Range, "Ts- ......... -65°C to + 150°C
~~.
6
5
4
i1i
0
ac"
:r
~
2
~
I
~
~"
'
.,.-,.,'
~
~
<
0
20
30
40
50
60
70
AMBIENT TEMPERATURE. TA IN ·c
STATIC ELECTRI~ALCHAflA(HERISTICS at TA
"
.' Characteristic
Symbol
Quiescent SupplY Curr~t
Terminal Voltage
"
Icc·
V2
, V3
VOlit
VREG
VIN
V14 15
V16
' Test
Pin
=
+25°C, Vee
=
Test Conditions
7
25
2, ' ' I
3
Typ.
Limits
Max.
45
'lO
2.6 •
12
15
1.4
4.0
"-
-
6
B
10, 11
14, 15
16
90
~IO.5O!i
24 V
Min.
V;n =0
80
OWG.IIO.
14
-
-
-
V
V
V"
v
. 16
.-
8.0
-
Units
rnA
V
60
-
V
-
V
DYNAMIC ELECTRICAL CHARACTERISTlCSat\ 0;:: +25°C, Vee = 24 V, fo = 4.5 MHz,
fm = 400 Hz, fd = 25 kHz, Vin = 10 mV (unless otherwise specified)
Characteristic
Input Limiting Threshold
A·M Rejection
Recovered Audio
Output Distortion
VOlume Gontrol VOltage
Playth rough
Power Amp. Voltage Gain
Output Distortion
Output Current Limiting
Uutput I racKing
Output Noise
Power Amp. Input Impedance
Symbol
VTH
AMR
Vout
IHDo
VI
A.
TH,Do
lOUT
Vour/Vcc
en
Z;n
Test
Pin
6
6
16
Limits
Tesl Conditions
Note 1
Note 2
6
3·6
6
6
6/7
3"
Typ.
Max.
Units
-
150
>50
700
<1.0
7.5
2.B
1.2
5.0
27
2.5
BOO
0.5
5.0
50
400
p.V
dB
mV
30
500
-
Hi
1
Min.
":"3 dB, Note 3
-20 dB, Note 3
-40 dB. Note 3
VI = OV
V.,;, = 1.0 V
POUT = 2.0W
RL = a (}
,'"
Vcc = IB V to 27 V
V;n = OV, VI = lOV
f = 1.0 ~Hz
NOTES:
1. Adjust VI for VOO! = 2.0 V. then reduce V;n until VOUI = 1.4 V (-3 dB).
2. Adjust VI for VOU! = 2.0 V.
3, Reference is VOU! at pin 6 with VI = 12 V.
7--4
.,
"
6.0
2.0
0.75
-
25
-
-
900
3.0
10
4.0
I.B
25
29
10
-
25
-
%
V
V
V
mV
dB
%
rnA
V/v
mV
KD
ULN-2211 BTV SOUND CHANNEL
TEST CIRCUIT AND
nPICAl APPLICATION
Vee =+24V
S.6K
l~F
CAPACITOR IS
REQUIRED FOO
:--11-'--,
I
I
~
VOLUME
OPERATION WITH-
Vee < laV
D"'G. NO. 1.-10,518
L
fo
4.5 MHz
10.7 MHz
C
10-14 H 120 DF
120 pF
1-3 ~H
R
"
5k
D
A-M REJECTION
AS A FUNCTION OF INPUT VOLTAGE
SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE
70
00
-10
-'
OPERATION REQUIRES
DECOUPLING AT PIN 8
J! 40
~
"'::>~ 30
...
."
~"
.,!g
---
...
5
IT•. 250CI
1\1'\
-30
;::
o
Vin • 0
"'lJa: -40
o
~
-20
20
'.i" -50
10
-60
10
,.
~
~
SUPPLY
~
W
VOLTAGE.
U
fbUT' IW
1\
Vee" 24V
I"--r--.
-70
~
~
28
30
Vee IN VOLTS
ilWG.1I0.
7-5
1001-'
=4.5MHz
fd = 25kHz
fm "400Hz
RL "Isn
'"
~
o
10
1m
3m
10m
INPUT VOLTAGE, Vin IN VOLTS
30m
DWG. NO. f..IO.510
100m
ULN·2211 B TV SOUND CHANNEl
OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
ATTENUATION AS A FUNCTION
OF VOLUME CONTROL VOLTAGE
,.,f--
fa ::: 4.5 MHz
"'."
fd • 25kHz
6
10
20
/
!!;
z
030
~
/1
V
i!l
~ 40
to
fm ::: 400Hz
Vin" IOmV
V
5
4 - OPERATION IN THIS AREA
REQUIRES OEfUPLING CAPACITOR
AT PIN 8
~",,,,,,,[
fm = 400Hz
Vin" IOmV
.0
/
80
~
70
0.1
V
0.2
.....
Vcc"~V
'"
.
2
RL ·160
o.s
1.0
2.0
5.0
O-C VOLUME CONTROL VOLTAGE, V, IN VOLTS
I ' RL -16n
THO '2.5%
~C.
A~
o
10
10
W
12
ffi
~
~
~
M
SUPPLY VOLTAGE, Vee IN VOLTS
~
28
1>\1'",.110.10-10.513
10. ')Ot,
THO AS A FUNCTION
OF DETUNING FREQUENCY
7
10
IJJ~~J WJ,WtTI
o
/'
I
I111111
-10
!!;
10 • 4.5MHz
uJ
Id • 7.5kHz
1m • 400Hz
RL • 160 .
~
~
'6~""
~\. .. ""'"
~~'
.,.~ ",'
RECOVERED AUDIO AND NOISE
AS FUNCTIONS OF INPUT VOLTAGE
"'
./
~
u~:6.
""0
y.J;;?
.......
.. ..
1
./
~~"
<'~~I--.\~'
V ....
I
.1
fo =4.5MHz
fd ·7.5kHz
-20
•
::: 7.5kHz
1m • 400Hz
3
\
2
1
-50
OUTPUT N9ISE j en
o-40
-80
lOlL
lOOIL
lOm
10m
INPUT VOLTAGE, Vin IN VOLTS
100m
O'I:~.
::: 4.5MHz
fd
Vin :: IOmV
OdB ::: 2Vrms
Vee" 24V
t::
10
110.
1D
~-IO.
'"
-30
i'-.. r-..
-20
OWl>. 110.
0
....
.
2'
I V'n • lcomVl
I
RL "60
Vcc ·24V
I
6
8
jl 11111
100
_/
-
2
II
/
/
10010203040
OETUNING FREQUENCY, Alo IN kHz
509
AUDIO OUTPUT
AS A FUNCTION OF FREQUENCY
•
I
Vee' 24V
IK
10K
FREQUENCY, 1m IN Hz
1\
lOOK
DIIQ.IIO ...... IO.SI2
7-6
1M
A-IO.IjI~
50
ULN-2211B TV SOUND CHANNEL
POWER DISSIPATION AND EFFICIENCY
AS FUNCTIONS OF OUTPUT POWER
3.'
./
•
V
P"'"-I'--./
/k
II
THO AS A FUNCTION
OF OUTPUT POWER
10
14
60
2
50
~
fd = 25kHz
fm = 400Hz
Yin = 10mV
Rl" 160
Vee = 24V
/'"
1/
1
1
V
10 = 4.5 MHz
RL~
y~
• /
I
1o
0.5
1.0
1.!5
OUTPUT POWER,
2.0
POUT
2.5
3.0
IN WATTS
~
o
o
OJ
3.'
0.2
0.5
OUTPUT
1
10
POWER,
fbUT
!
VI
2,0
IN WATTS
5.0
10
DWG. MO. ,"'(0,;,07
SCHEMATIC
o
DE-EMPHASIS
REGULATOR OUT
B
TONE CONTROL
"
05
-@
AUDIO
OUT
,.,
oew"",
"
0,
"" " "
00
(
'~
~
'"
6K
0"
i
l4
~
15
cb
LOW-LEVEL GROUND
7-7
CD
AUDIO IN
4
GROUNO
2
GROUND
ULN·2224A CHROMA DEMODULATOR WITH RGB OUTPUT
ULN-2224A CHROMA DEMODULATOR
WITH RGB OUTPUT
• Lum'
• Good
.3 mVfC TYPlca
• 600 mV Maxim
• 10 Vpp Typical
~
• Output Short-Circuit P
• Pin-for-Pin Replacemen
pROVIDING direct red-green-blue (RG
the Sprague ULN-2224A Chroma Dem
contains two doubly-balanced demodulators, a re
tor matrix to derive the G-Y signal, luminance a
blanking stages, and three high-level output emitter
follower stages.
ABSOLUTE MAXIMUM RATINGS
at TA= +25°C
r Dissipation, Po (Note 1) .......... 670 mW
ature Rangll, TA ........ -20°C to +85°C
ange, Ts ........ - 60°C to + 150°C
The ULN-2224A Chroma Demodulator is supplied
in a 14-pin dual in-line plastic 'A' package.
Current in rnA
I nput
Output
Pin
o
o
Note 2
Note 2
o
Note 2
10
reference
oto +8.0
oto +8.0
oto +8.0
no connection
oto +10
to +10
oto +30
o
FUNCTIONAL BLOCK DIAGRAM
Note 3
1.0
NOTES:
1. Derate at the rate of 8.3 mWrC above TA ~ +70·C.
2. Maximum continuous current output is 20 mA and is limited by
package po,!!er dissipation .. Short circuit current is typically 50 mAo
3. limited by package power dissipation.
7-8
ULN-2224A .cHROMA DEMODULATOR WITH RGB OUTPUT
STATIC ELECTRICAL CHARACTERISTICS at TA = 25°C, Vee = +24V, RL
Reference Input Voltage = 1.0 V, Figure 1 (unless otherwise noted)
Characteristic
-Quiescent Output Voltage
Quiescent Input Current
Reference Input Voltage
Chroma Input Voltage
Differential Output Voltage
Output Temperature Coefficient
Test
Pin
Test Conditions
1,2,4
RL = co, chroma and reference
input voltage = o.
Chroma and reference Input
voltage = O.
Min.
Limits
Typ. Max.
14.3
-
16.3
V
-
5.0
-
mA
16.5
12,13
8, 9, 10
1,2,4 Figure 2.
1,2,4 No output differential voltage. Figure 2.
-
-
19
25
6.2 3.4 300 600
3.0 -
DYNAMIC ELECTRICAL CHARACTERISTICS at TA = 25°C, Vee = +24V, RL
Reference Input Voltage = 1.0 V, Figure 3 (unless otherwise noted)
Characteristic
Test
Pin
Detector Output Voltage (B)
Chroma Input Voltage
Detector Output Voltage (G)
Detector Output Voltage (R)
Relative Output Phase (B to R)
Relative Output Phase (B to G)
Demodulator Unbalance Voltage
4
8
1
2
4-2
4-1
1,2,4
Residual Carrier and Harmonics
1,2,4
Reference Input Resistance
Reference Input Capacitance
Chroma I nput Resistance
Chroma I nput Capacitance
Luma Input Resistance
12, 13
12, 13
9,10
9,10
3
Test Conditions
B output = 5.0 Vpp
Adjust B output to 5.0 Vpp
Adjust B outputto 5.0 Vpp
B output = 5.0 Vpp
B output = 5.0 Vpp
No chroma input voltage and
normal reference signal input
voltage
With input signal voltage, normal
reference signal voltage and
B = 5.0 Vpp
Chroma input = 0
Chroma input = 0
Min.
Typ.
8.0
0.75
3.5
101
248
10
300
1.0
3.8
106
256
-
-
100
3.3kn
=
=
Units
mA
V
V
mV-,,mVrC
1
1
3.3kn
Limits
Max.
Units
Notes
264
Vpp
mV pp
Vpp
Vpp
Degrees
Degrees
2
3
4
4
5
5
250
500
mV pp
6
0.7
2.0
6.0
1.0
2.0
1.5
Vpp
7
-
kg
-
kg
-
700
1.25
4.2
111
pF
kg
pF
NOTES:
1. With chroma input signal voltage = 0 and normal reference input signal voltllge = 1.0 Vpp, all output voltages will be within specified
limits and will not differ from each other by greater than 600 mV.
2. With normal reference input signal voltage,adjust chroma input signal voltage to 1.2 VPp.
3. With normal reference input signal voltage, adjust chroma input signal voltage until the B output voltage = 5 Vpp: The chroma input
voltage at this point should be equal to or less than 700 mVpp.
4. With normal reference input signal voltage, adjust the chroma input signal until the B output voltage = 5 VPP. At this point, the Rand
G voltages will fall within the specified limits. Luma voltage = 23 V.
5. Tested With B output = 5.0 Vpp, luma voltage = 23 V.
6. No chroma input voltage and normal reference signal input voltage.
7. Tested with input signal voltage, normal reference signal voltage and B output = 5.0 Vpp.
7-9
Notes
o
ULN-2224ACHROMA DEMODULATOR WITH RGB OUTPUT
'-----~O_--o
Vee
'---_ _ _ _--'-----,~ B-Y REFERENCE IN
'--_ _ _ _ _ _ _~ R-Y REFERENCE IN
ow,;.
OWG. NO A-926/8
NG A - 92608
Figure 1
Figure 2
BLUE OUT
GREEN
OUT
3.3K
01~LUMA
1
50
IN
2.2K
lIlJOV
'-----e---_-o+24V
3.58MHz
REFERENCE IN
lOVpp
D\'I3.KO • .4--9262B
Figure 3
7-10
ULN-2224A CHROMA DEMODULATOR WITH RGB OUTPUT
VECTOR DIAGRAM
106"
DW'Ii. NO. A -"$A
Figure 4
CIRCUIT SCHEMATIC
14.2K
2K
+CHR
von
10~~~----~r-------~--~-r---t
270.0.
B -Y -CHR
'-VW'-1--,1IN'-8)--------1
- ......+-.A~_.N~,
2K
2K
9
R-Y -CHR
OWG. NO. 8-14SIC
1.8K
7}---------------+---------~--------~-------~---.NV---~
GND
7-11
o
ULN-2260A AGC CONTROL,
SYNC SEPARATOR and SCAN PROCESSOR
ULN·2260A AGC CONTROL,
SYNC SEPARATOR and SCAN PROCESSOR
FEATURES
•
•
•
•
•
Excellent AGe Noise Immunity
High Output Sync Level
Balanced Phase Detector
Stable Master Oscillator
16-Pin Dual-In-Line Plastic Package
The sync separator uses an ex;ternal passive
network. The designer chooses the sampling
level and time constants. The 10 Vpp output is
short-circuit limited at approximately 25 rnA.
TELEVISION-CIRCUIT SIMPLIFICATION
and high performance are primary advantages
of designs using Type ULN-2260A. NTSC or
PAL television receivers, color or monochrome,
with countdown or conventional synchronization, can be flexibly and efficiently partitioned
through use of this device.
The phase detector of Type ULN-2260A compares the sync separator's output to the integrated horizontal flyback pulse. Its output is a
voltage proportional to the phasing error. Static
phase error attributable to detector imbalance is
minimized.
The AGC detector of Type ULN-2260A
employs a coincidence gate approach that
minimizes noise effects. The circuit maintains
constant AGC levels despite temporary losses of
synchronization and temporary horizontal
timing disturbances. The AGC-synchronization
loop has both the high gain and high slew rate
needed for fast channel-to-channel gain
equalization and reduction of airplane flutter.
Both forward and reverse delayed AGC currents
are developed.
The designer is able to define the free-running
frequency, control sensitivity and temperature
compensation of the integrated circuit's
oscillator. A wide range of frequencies can be
generated, accomodating any of several TV or
video display terminal deflection systems.
7-12
ULN-2260A AGC CONTROL,
SYNC SEPARATOR and SCAN PROCESSOR
TYPICAL APPLICATION
+12 V
FLYBACK
IN
r-----~----~A_~---_+~
SYNC OUT
-t-----t---t--L.:!..J"t1
503.5 kHz
CLOCK OUT _-------~-L.!1..J
DWG. NO. A-ll.225
TYPICAL VCO CHARACTERISTIC
VIDEO IN
~ 535
AGC PRI. FILTER
z
VERT. SYNC
ti
z
~
515
I-F GAl N CLAMP
I-F AGC
505 - - - - - - - - - - - -
'" 495
~
~
~ 485
FL YBACK IN
'.
U
GROUND
TNR REV. AGC
OSC. IN
TNR FWD AGC
OSC. IN
APC FI LTER
Vl
o
iO
iO
7.0
Vec
CONTROL VOLTAGE, VlO, IN VOLTS
OWG. NO. A-ll.223
OWG. NO. A-ll,221
7-13
~c
-< ...
ZZ
n I
t..:t
~t..:t
'"0-
»"'1:10
!:>
~Q
On
l'a
a
:::II
n
0
Z
a..~
~ l'a
no
>
....
z~
"'1:1
~
n
~
~
o
l'a
I...
n
AGe
i-F
PRI
GAIN
J-F
AGe
TNR
TNR
REV
AGe
FWG
AGe
2-
GND
SCHEMATIC
ULN-2261 A LUMINANCE PROCESSOR
ULN-2261 A LUMINANCE PROCESSOR
•
•
•
•
Single D-C Gain Contr
Low External Componen
Direct Replacement for C
16-Pin Dual In-Line Plastic Packa
A SINGLE doc picture. control adjusts HI
both the low-level vIdeo and chroma \
tion in color TV receivers which employ th~
2261A Luminance Processor. Automatic bright
limiting (ABL) and vertical blanking also take pia
on both channels while maintaining a constant black
level. During the horizontal blanking interval, the
black level is determined by clamping the black-level
reference (the "back porch"). This allows for 100%
doc restoration.
ABSOLUTE MAXIMUM RATINGS
Voltage, Vee ........................... 15 V
k Current, 19 ........................ 30 rnA
Dissipation, Po ................ 670 mW*
perature Range, TA ....•..• - 20°C to +85°C
re Range, Ts ........ - 65°C to + 150°C
D
ABL OR
GROUND
GROUND
CHROMA
IN
CHROMA
OUT
VERTICAL
PULSE IN
0Wll. HO. A-IO, SOl
FUNCTIONAL BLOCK DIAGRAM
7-15
ULN-2261 A LUMINANCE PROCESSOR
STATIC ELECTRICAL CHARACTERISTICS at TA
..
:'
Test
Pin
14
.15
13.
Characteristic
Supply Current
Lumal nput Current
LumacOutput Voltage
Luma. Blanking Current
Video putput
Short Circuit Current
Clamp~d Video Level '
Clamp Lea~age Current
Chro~aOutput Voltage
.'
Gate Lea kageCu rrent
Loop Filter Voltage
,,9
., 11
.
1~
6
6 .
10
1
Min.
15
425
1.8
5.3
11.6
14.1
Limits
Max.
Units
5.0
30
570
4.5
7.5
13.0
. 15.7
1.0
14
rnA
p,A
V
V
V
V
p,A
mA
2.5
0
7.3
10.3
0
5.0
3.9
365
9.1
11.6
400
5.8
V
nA
V
V
nA
V
'"
\2
,
25°C, Test Figure 1
Position of Test Switches'
A B C 0 E F G
1 4 2 1 5 2 3
1421523
1 4 2 1 5 2 2
2 2 2 2 3 1 1
2 3 2 2 3 1 1
2 1 2 2 1 1 1
3 1 2 2 3 1 1
1 4 1 1 5 2 2
g., '
9.
9
.
"
=
"
1
1
2
3
1
1
4
4
4
1
4
4
2
2
2
2
2
2
1
1
1
2
1
1
1
4
5
3
2
2
1
1
2
1
1
1
1
1
3
1
1
1
DYNAMIC ELECTRICAL CHARACTERISTICS at TA = 25°C, Test Figure 2
Video OlJtput,
Minimum
Mid
Maximum
Video Gam Ratio
Video Frequency Response
Lili1ited Video Gam
Chroma Output, Minimum
Mid
Maximum
Chroma Gain Ratio
Limited Chroma Gain
Video/Chroma Gain Ratio
9
9
9 "
-
9
9
6
6
6
-
6
-
1 1 1 2 (Test 1)
2 1 1 2
3 1 1 2 (Test2)
I est z/Test 1 (Test A)
3 1 1 2 f ";3.58 MHz
3 1 2 2
1 2 1 1 (Test 3)
221 1
3 2 1 1 (Test 4)
Test 4/Test 3 (Test B)
322 1
Test A/Test B
7-16
0.20
0.80
1.50
5.0
1.0
0.2
50
260
400
5.0
35
0.85
0.56
1.50
2.60
8.5
2.6
0.4
150
440
750
8.5
150
1.15
Vrms
Vrms
Vrms
-
Vrms
Vrms
mVrms
mVrms
mVrms
-
mVrms
-
ULN·2261 A LUMINANCE PROCESSOR
TEST FIGURE 1
6o--~r_o'12V
TEST FIGURE 2
r-~il---1 f~~III-O 'i6DoE~H~N
70mVrms
CHROMA IN
3.58 MHz
530mVrms
CHROMA o----------j
OUT
+
lav o--~MI~-----1
o
'-----QVIOEQ
OUT
OWG.NO.A-IO.503
TYPICAL APPLICATION
PICTURE
ULN -2261A
CONTROL
BRIGHTNESS o-f-----::~2H
+12V
LUMA
LIMITER
IN
CHROMA
IN
HORIZ PULSE
IN
A
=--.;
'--
+18V
,
LUMA
,
OUT
L_-1I-__ .J
39pF
PICTURE PEAK1NG
7-17
V '-'A VI
"\ . - -
...c:z
N
1..:1
Vee
LUMA
OUT
14
13
~51<
500n
Q4
:4.4K
'Q~
CLAMP
r.
QI8
.
...c:
l>
~
~
51<
3.3K
015
0.....
HORIZ
PULSE'
IN
VIDEO
OUT
Z
l>
Z
t""l
'"
"V
10K
;:II:J
at""l
!h:CiOn
v'"
v-
a;:II:J
~IK
QI9
Q24
263n
I
'I
ex;
D-C
PICTURE
CONTROL
I~
•
III
,
,
1
Vee
I
11.9K
rim
!ssc
n
Q31
I
Q29
l:
. II
~
VIDEO
PEAK
r----~ce:
051
,..,..--_....-J9
!.-
550n
IK
Q46
16
200n"""
,Q34
::8=
.....
~~:~Ii~
1.5
K
IK
IOn
100
2"2~
n
t I i I fIffI fn I
K
200
"K
!J
~
~
VOLT
REF.
ABL
ABL
CHROMA
OR
IN
GROUND
~
~
GROUND
~ cb
CHROMA
OUT
m
llMl. NO. 8-1375A
VERT
PULSE
IN
SCHEMATIC
ULN-2270B and ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
ULN·2270B AND ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
FEATURES
•
•
•
•
•
•
Internal Reference
Positive or Negative Sync Input
Vertical Ramp Generator
Vertical Driver
Flyback Generator
Single-Supply Operation
A S A SINGLE DEVICE containing a vertical os-
cillator, a flyback generator and a power
amplifier, this vertical deflection system can greatly
simplify design of black-and-white and small-screen
color television receivers.
The oscillator of Types ULN-2270B and ULN2270Q is directly synchronized by positive or negative sync pulses. A current feedback loop makes
yoke current independent of yoke resistance changes
caused by operating temperature variations. The
flyback generator develops the high voltage required
by the yoke for short flyback time and high efficiency.
Type ULN-2270B is supplied in a 16-pin dual
in-line plastic package with heat sink contact tabs. Its
copper alloy lead frame gives enhanced power dissipation ratings with standard cooling methods.
Greater package power dissipation is available with
attachment of an external heat sink to the webbed
center leads of the device. The lead configuration
makes possible easy attachment of a heat sink and
use of a standard integrated circuit socket or printed
wiring board layout.
Type ULN-2270Q ITDA1170 is supplied in a
16-pin quad in-line plastic package. It uses the
printed wiring board on which it is mounted as a heat
sink. Small heat sinks can also be attached to the
center tabs of the device. The device carries the
Sprague Electric Company part number (ULN2270Q) unless the Pro-Electron marking (TDAI170)
is requested.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ........................... 27 V
Peak Flyback Voltage, V6-V 7 •••••••.•.••••••••••• 58 V
Sync Input Voltage, VlO ....................... ±12 V
Amp. Input Voltage Range, V14 . • • . . . . . . . -0.5 V to + 10 V
Peak Output Current, 16 (50 Hz, ,;;10 f.Ls) ............ 2.5 A
(50 Hz, >10 f.Ls) ............ 1.5 A
(non-repetitive, 2 ms) ......... 2.0 A
Package Power Dissipation, Po ....... , ....... See Graph
Junction Temperature Range, TJ ••••' •••• -40 aC to + ISaaC
7-19
o
ULN~2270B
and ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
ELECTRICAL CHARACTERISTICS at TA
Characteristic
Operating Supply Voltage Range
=
25°C, Vee = 25 V, f = 50 Hz (unless otherwise specified)
Test
Test
Pin
Fig.
Limits
Test Conditions
2
_.
Min.
Typ.
Max.
10
-
27
V
1.0
-
-
3.5
-
Vp
k!1
Units
Sync Input Voltage
10
3
Positive or negative
Sync Input Resistance
10
3
VlO
Oscillator Bias Current
11
1
-
0.2
1.0
IlA
Oscillator. Voltage
11
3
-
2.4
-
Vp,
7.0
-
Hz
-
0.01 0.015 -
=
1.0 V
Oscillator Pull-In Range
10-11
3
Below 50 Hz
Oscillator Frequency Drift
11
3
Vee = 10 V to 27 V
TlAB = 40°C to 120°C
Hz/V
HzrC
Ramp Generator Bias Current
16
1
-
50
500
nA
Amplifier Input Current
14
2
-
0.15
1.0
IlA
Quiescent Output Voltage
6
1
4.0
8.0
4.4
8.8
4.8
9.6
V
V
-
51
-
V
-
0.6
0.8
ms
-
1.6
App
6.0
6.5
7.0
-
1.5
-
mV/V
140
-
mA
Flyback Voltage
3
Flyback Time
3
Yoke Current
3
Regulator Voltage
8 or 9
2
Line Regulation
8 or 9
2
Supply Current
= 10 V, R2 = 10 k!1
= 25V, R2 = 30k!1
IYOKE = 1.0 A
IYOKE = 1.0 A
Vee
Vee
= IOV to
IYOKE = 1.0 A
Vee
27V
V
NOTE: Pin numbering shown is in accordance with U.S. (JEDEC) practice where all
positions are numbered (1 thru 16). European (Pro-Electron) practice is to skip
the tab positions.
JEDEC
1
Pro-Electron 1 2
4 5 6
TAB TAB 4
8
6
10 11 12 13 14 15 16
8 9 TAB TAB 10 11 12
4.'
ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF'
AMBIENT TEMPERATURE
2.5
20
1.5
-+-+-~~---\-t----1
10
1_-r-__
I
0.5
-
00 -
25
50
75
-Ickioo,----m
AMBIENT TEMPERATURE IN
7-20
°c
llwg. No
A-IO,431A
ULN-2270B and ULN"2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
TEST FIGURES
Dwg. No. A-IO,993
Dwg. No. A-I0.992
Figure 1
Figure 2
LI NEARITY
47K
47K~
o
220K
3, 3 Q
100 K
I
I
HOLD
20K'
r
251Jf +
lOV
'TOLERANCE ±2%
Figure 3
7-21
Dwg. No. A-IO,999
ULN-2270B· and ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
TYPICAL APPLICATION IN
LARGE-SCREEN BLACK-AND-WHITE TV
Supply Current, Icc ..................... , ............. 140 mA
Flyback Time ...... ' .... , ................. ' ......... 0.75 ms
Yoke Current, lyoK£ • • • . . . • . • • • . . ,
. , ..•••• , 1.2 A"
Operating Supply Voltage Range, Vcc . , ................ , 20 V to 24 V
Package Power Dissipation, PD ••••••••••• , •••••••••••••••• 2.2 W
LI NEAR ITY
+22V
47K
-Ii
150K
~
100 K I
I
R2A
15K'
HOLD
3.3"
47K
r
251lF +
10V
YOKE
20 mH
IOn
Dwg. No. A-1O,99B
'TOLERANCE ±5%
Flyback Time = 2 L YOKE IYOKE
3 Vee
Icc =
IY~KE +
0.02
+ R,
V 6 -~ V1R,
4-RI
Where:
Flyback Time is in seconds;
L YOKE is in henries;
I YOKE is the peak-to-peak current in amperes;
Vee and V6 are in volts;
Icc is in amperes;
V I4 is approximately 2.0 V.
7-22
ULN-2270B and ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
TYPICAL APPLICATION IN
SMALL-SCREEN BLACK-AND-WHITE TV
Supply Current, Icc ................................... 150 mA
Flyback Time . .' ...................................... 0.7 ms
Yoke Current, IYOKE •••..••••••••••••.••••••••••••••••• 1.15 App
Package Power Dissipation, Po ............................ 1.3 W
+[0.8V
R2A
56K'
I
56K'
R2B
+
71Jf
4.lOY
"TOLERANCE ±5%
Flyback Time
= 2 LYOKE IYOKE
3 Vee
Ice
=
v
=
6
Iyo;E
+ 0.02
V R,+ R,
14~
Where:
Flyback Time is in seconds;
LYOKE is in henries;
I YOKE is the peak-to-peak current in amperes;
Vee and V6 are in volts;
lee is in amperes;
V l4 is approximately 2.0 V.
7-23
o
ULN-2270B and ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEM
CIRCUIT SCHEMATIC
FUNCTIONAL BLOCK DIAGRAM
i~~C~--
--
:------------f------<> VCC
----I
,:
i----H---~
2
3
,
fl
7
1~
,:-;lo.
~-ll
..J....
SYNC
INPUT
=
cmD
:
i
~
9
16
~HEIGHT:--.i
r
..L
-=-
~
1
14
!:
~:h
T-- -'YJlv..1. ..~'-VvV-."
I
, ::r:: LINEARITY
..L.....L
-=--=-
,
~---~
:
'··-VvV---l---l
..J....
.,...
, ,
I
I
I
"*
"*"
DW9. No. A-IO,997
7-24
ULN-2290B and ULN-2290Q TV SOUND CHANNEL
ULN·2290B and ULN·2290Q TV SOUND CHANNEL
(TDA3190 and TDAl190Z) - 4 WATT OUTPUT
FEATURES
•
•
•
•
•
•
•
High Sensitivity
High A-M Rejection
D-C Volume Control
High Power Output
Low Distortion
Wide Operating Voltage Range (9 to 28 V)
Low Quiescent Current Drain
OF CARRYING OUT all of the funcCAPABLE
tions of a TV sound channel, the ULN -2290
silicon monolithic integrated. circuit consists of a
six -stage 1-F amplifier !limiter, low -pass filter, differential peak detector, doc volume control, regulated
power supply, audio preamplifier and output stage.
Type ULN-2290B is furnished in an improved
16-lead plastic dual in-line package with heat-sink
contact tabs. The webbed lead configuration, originated by Sprague Electric, .allows an inexpensive
heat sink to be easily attached for increased power
dissipation capability and yet permits the use of a
standard IC socket or printed wiring board hole layout This device is identical to European Type
TDA3190.
The audio power amplifier will deliver 4 W of
low-distortion audio to a 16n load with a supply of
24 V. When used with a 12 V supply, such as is
found in many portable TV sets, these ICs will furnish 1.5 W to an Sn loud speaker.
This TV sound channel is available in either of two
package configurations. Type ULN-2290Q is
supplied in a quad in-line plastic package with a
copper lead frame. This device is designed to use the
printed wiring board on which it is mounted for heat
dissipation and is identical to European Type
TDA1190Z. It is marked with its Pro-Electron registration unless otherwise specified on production
orders.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ...
......... +28V
Repetitive Peak Output Current, lOUT
.......... 1.5 A
Package Power Dissipation, Po.
. ...... See Graph
Junction Temperature Range, TJ . . . . . . . -40°C to +150°C
FUNCTIONAL BLOCK DIAGRAM
DE-EMP.
DECOUPLE
D-C
VOLUME
FEEDBACK
GROUND
J~ 1
I-F IN I'>---..t-...
DECOUPLE
.r---'VII"v-----'
cU5l
GROUND
PHASE
SHIFT
7-25
COMPENSATiON
II
ULN-2290B and ULN-2290Q TV SOUND CHANNEL
ELECTRICAL CHARACTERISTICS at TA = 25°C, fo = 4.5 MHz, fm = 400 Hz, fd = ±7.5 kHz,
Vee = 12 V, RL = a11, Vin = 1 mV (unless otherwise specified)
Characteristic
UUlescent uutput voltage
UUlescent :supply (;urrent
InPut Limiting Inresnolo
A-M Rejection
Signal-to-Noise Ratio
Recovered. Aud 10
Output Distortion
Output Power
Power Supply Rejection
Input Resistance
Input Capacitance
Symbol
VOUT
Icc
vrH
AMR
S+N/N
Test
Pin
11
14
1
VOU!
16
THO
POUT
11
11
PSR
RIn
1
(;in
1
Test Cond itions
V -U
R - ZZ kn, Vi, ~ U
R - U
T, - ±25 kHz, m - 0.3
Pour = 0.5 W, fd = ±25 kHz
R - 0
POUT - 50 mW
THO - 2%, fd - ±25 kHz
THO = 10%, fd = ±25 kHz
f - 120 Hz, R - 22 kn, R - 4n
Limits
Max.
Min.
Typ.
!l.1
b.U
b.~
V
-
19
40
55
65
120
1.0
1.4
1.5
46
33
100
mA
/J-V
dB
dB
mV
%
W
W
40
50
-
jU
!l.U
-
-
Units
dB
kn
p~
ELECTRICAL CHARACTERISTICS atTA = 25°C, to = 4.5 MHz, fm = 400 Hz, fd = ±7.5 kHz, Vee = 24 V, RL = 1611,
Vin = 1 mV (unless otherwise specified), Heat Sinking is Required
Characteristic
Quiescent Output Voltage
Quiescent Supply Current
Input Limiting Threshold
A-M Rejection
Signal-lo-Noise Ratio
Recovered Audio
Output ~istortion
Output Power
Power Su pply Rejection
Input Resistance
Input Capacitance
Symbol
VOl.
Icc
VrH
AMR
S+N/N
V
THO
POUT
PSR
R
Cin
Test
Pin
11
14
1
16
11
11
Test Cond itions
V - 0
R, = 22 kn, Yin = 0
R, = 0
fd = ±25 kHz, m = 0.3
Pour = 1.0 W, fd = ±25 kHz
R, - 0
Pollr - 50 mW
THD = 2%, f = ±25 kHz
THD - 10%, f - +25 kHz
f = 120 Hz, R, = 22 kn, R
1
1
a
Min.
11
11
40
50
-
-
= 4n
-
-
Typ.
12
22
40
55
65
120
0.75
3.5
4.2
46
30
5.0
I
501
+
~-----+
TEST CIRCUIT
7-26
l':'
Limits
Max.
13
35
100
-
-
Units
V
mA
/J-V
dB
dB
mV
%
W
W
dB
kn
pF
ULN·2290Band ULN·2290Q TV SOUND CHANNEL
TYPICAL APPLICATION
(Heat Sink Required)
,
"
ULN 22908
DW&. 110.
"~IO,~2
NOTE: Pin numbering shown is in accordance with U.S. UEDEC) practice where all positions are
numbered p thru, 16). European (Pra-:Electron) practice is to skip the tab positions.
JEDEC
Pro-Electron
2
345
TAB TAB
23
8
6
6
4
10
8
11 12 13 14
9 TAB TAB 10
15
11
16
12
ALLOWABLE POWER DISSIPATION
AS A FUNCTION, OF AMBIENT TEMPERATURE
Applications
D
Inform~tir;1D
1., Types ULN-2290B and ULN-2290d have high inputimpedances, allowing them to be used with a ceramic filter or tuned
circuit to provide the necessary input selectivity.
2. The electrical ch,aracteristics of these devices will remain
relatively constant oVer the I-F frequency range of 4.5,MHz to
6 MHz. They can therefore be used with all common television
standards.
3. The a-c gain of the audio amplifier is determined by the
resistor raHoat pin 9. The gain should be defined in relationlo the
frequency deviation at which the output stage of the audio
amplifier begins clipping.
'
4. The resistor between pins 9 and 11 can be replaced with
various combinations of resistance and capacitance to provide
bass boost or treble atten uation.
5. De-emphasis is determined by the capacitor connected at
pin 16 and,an intemall0k!lresistor.This pin can also,be used to
provide a treble-cut type of tone contrpl.
6. The high-frequency audio cutoff is determined by the capacitors connected at pin 10. To increase the audio bandwidth, reduce
the values of th,ese capacitors, keeping their ratio constant.
~
15
~
3.0
:l
is
;
2.5
..
Ii:
~ 2.o~-+--
~
~
50
---r5- ~--..!'O"O_-'!.-~!"'_---.J
AMBIENT TEMPERAtURE IN
7-27
°c
[1wq.
No. A-10,431A
ULN:2290B and ULN-2290Q TV SOUND CHANNEL
at TA
TYPICAL CHARACTERISTICS
MHz, fm;=: 400 Hz, fd = ±25 kHz, Yin
(unless otherwise shown)
= 25°C, fa = 4.5
AUDIO OUTPUT and NOISE
AS A FUNCTION OF INPUT VOLTAGE
A·M REJECTION
AS A FUNCTION OF INPUT VOLTAGE
'II
20
= 1 mY
20
RECOVE~ED < ~D10, Vour·.
-20
~il-
-40
r--...
-60
II
-80
30...
lOOf'
30011-
1.0·111.
3.0
m
"'r--.
-60
S+ N/N
10..
~~
~2P
\",00
r--
-40
'0
I
~
-80
10m
30m
100m
1~
l~
301'
INPUT VOLTAGE, Vin,IN VOLTS
30011
I.Om
I
3.Om
INPUT VOLTAGE, Yin,IN VOLTS
SOUND CHANNEL OUTPUT
AS A FUNCTION OF MODULATING FREQUENCY
30m
10m
100m
OWG. MO. A-IO.6&1
A·M REJECTION
AS A FUNCTION OF TUNING ERROR
10
.....
,
RL
m
=- I
'" 0.3
·10
"'r----....
'l"'l6n.
·20
\
·30
1
--
~
·40
20
50
100
200
500
lK
2K
5K
10K
10K
o'lWI," ~O. A-IO.6'11
·2
7-28
-30
-20
0
W
·10
, DETUNING, ,Ho I~ kHz
20
30
UlN-2290B and ULN-2290QTV SOUND CHANNEL
TYPICAL CHARACTERISTICS (Continued)
ATTENUATION
AS FUNCTION OF RESISTANCE
AUDIO AMPLIFIER OUTPUT
AS A FUNCTION OF FREQUENCY
v
~ -2
IIII
f'~ ~LR:!az...
i---'
CC' l2Y
""-..
20
Vee. 24V"'{
\
RL • Ibn.
-4
If'" 47h.
V
-6
40
\
'" ",
0
-8
0
100
"'" "
..
20
50
IK
500
200
100
10K
5K
2K
120
20K
2K
FREQUENCY, f IN Hl
3K
4K
5K
7K
10K
RESISTANCE, Rx' IN OHMS
15K
[)\(;. HO,
20K
~-IO. 6~7
DISTORTION
AS A FUNCTION OF TUNING ERROR
~
\\
I'l
.16.
/
I
o
/
DISTORTION AS A FUNCTION
OF FREQUENCY DEVIATION
V
I
f\
\\
/
V
~
\ I
/
L
/
'10
-30
-20
-10
10
20
DEVIATION, At IN kHz
30
DEruNING, 0. fl) IN kHl
7-29
,'0
'30
i}W(i,
,,0.
A-IO,6~1
ULN-2290B and ULN-2290Q TV SOUND CHANNEL
TYPICAL CHARACTERISTICS (Continued)
DISSIPATION and EFFICIENCY
AS FUNCTIONS OF OUTPUT POWER
DISTORTION
AS A FUNCTION OF OUTPUT POWER
II
12
~
Vee - 12
10
RL "'i3.n-
-
Rf "82A
Vee" 24V
<
Rl =l6.t>.
:e
Rf = 47r...
z'
3 .•
"l
'z"
0
~
,
/'
2.5
0
t5
/"
2 .•
/
1.5
/ V/
1.0
~
V
0.1
0.2
u 0.5
~
.-'
2.0
0.5
1.0
OUTPUT POWER, POUT IN WATTS
5.0
o
10
V
-
v
/
o
V
7.
60
5.
Po
;;;
"
~
/'
/'
/
I
1.0
0.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
OUTPUT POWER, POlJT IN WAflS
1lWG. 110 ..... 1o,6....
OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
DISSIPATION
AS A FUNCTION OF SUPPLY VOLTAGE
3.0
:;:
/
2.5
'"
;,
,p
,,Q
2.0
~
1.5
is
1.0
~
0,5
:;:
t5
;l
u
::
•
h
/' /
/
/--10
~
15
20
SUPPLY VOLTAGE, Vee IN VOLTS
SUPPLY VOLTAGE, Vee IN VOLTS
7-30
-
~
,------1
C2
L ________ _
BIAS
'l'
DWG.NO.
B~1467
Figure 4
QUADRATURE DETECTOR
. -_______-< FROM
II
REGULATOR
f-- p;~ 3
Cc
DWG.NO. A-11,501
Figure 5
D-C VOLUME CONTROL
7-37
(Fig. 9)
TELEVISION INTEGRATED CIRCUITS (Continued)
Vss 250
200
150
100
The slope, linearity, polarity and control range are
different in each system proposed. However, a consensus among designers is that a control offering
both a wide operating range and independence of
device loading is desirable. In addition, the shape of
the output voltage versus control setting curve should
be'S' shaped. Type ULN-2211 control circuit results in an approximately linear response over most
ofthe operating range, with a cubic response at low
levels.
The control circuit used to generate this characteristic is shown in Figure 7. An external potentiometer sets the input voltage (V c).
The control uses a PNP input stage (Q66 and Q67) to
guarantee an input impedance of greater than
500 kil. If the control impedance is significantly
less than the input impedance, the loading factor is
negligible. The base-emitter voltages of Q66 and Q67
are cancelled by Qn and DIS, causing the input voltage (V c) to appear across the resistor combination
R43 and R44 and establish a current in Q45 that is
defined as the control current:
mV
SO
50
100
150
200
250
90
~
80
\
70
1\
60
\
~
50
1\\
40
1\
-.
~
3
\
-1
6- t---t-~z
20
"
-2
Vss
"
~
0
UNITS OF KT q
2
.
"
DWG.NO. A-ll,505
Figure 6
ATTENUATION AS A FUNCTION OF Vss
I
-£
C -\R.3
J (R44)
R45
Vc
+ R..)
(2)
FROM
REGULATOR
BIAS
'H'
.v
VB
BIAS
'L'
V B2
VB,
DWG.NO. A-l1,503
Figure 7
O-C VOLUME CONTROL INPUT CIRCUIT
7-38
TELEVISION INTEGRATED CIRCUITS (Continued)
This control current directly affects the current in
Q43' D 17 , and D17A causing the. base-emitter voltage
(3V BEe) to vary according to the familiar relation:
_
(qVBEe'\
_
(qVBEe \
Ie - ISe e ~r 1 - ISe e ~J
If the control resistance is defined as
(3)
and (2) is reduced to
Ie =
Similarly, current source Q46 sets up a reference
current (IR) in D 16 , D l6M and Q42' The control function can be developed as follows:
Ie -_ ISe e (qvBEe)
~
Re = (R4' + R..)
(15)
v BEe -
(5)
Ve
~'
(16)
then (14) can be further simplified to
(4)
and
~4'44
10 _
V e3
-,;-- V e3 + (Re 1.)3
KT
Ie
-q- £,. -1Se
(17)
The parameter ReIR will be a constant, independent of resistor variations, since IR is determined by
the regulated voltage and another internal resistor.
Similarly,
I = I e (qVBER \
R
SR· KT")
(6)
Let
and
(18)
Therefore,
(7)
Since
(19)
(8)
substituting (5),
V BI = V BIAS
-
3KT
q
Ie
Se
- - . tn -1-
(9)
Similarly,
(lO)
and substituting (7),
V B2 =
V BIAS
(11)
The characteristic will be affected by variations in
the internal regulator voltage and by the matching of
internal resistors (R." R44 , and R4,). A maximum
spread in C I of about ±lO% is to be expected. The
nominal and expected spread of the gain-control
characteristic is shown in Figure 8. The actual output
variations of the sound system, for a fixed V e , will
also be affected by changes in the detector output (Is)
and gain variation of the output amplifier. Worstcase system variations under actual operating conditions are described in the applications section (see
Figure 15).
Since
(12)
Output-Amplifier Description
substituting (9) and (11) and simplifying,
3KT
IR
V BB =-q-.tnT
(13)
Returning to (1), substituting (13), and simplifying,
Io
1;
(14)
(Ie /I R)3
(Ie fIR)' + 1
The audio output amplifier of the ULN -2211
sound system is a high-gain amplifier with internal
feedback that sets the closed loop gain at 25 (or 28
dB). The biasing is such that the output d-c level (pin
6) is maintained at approximately Vcc 12. The relationship for determining a more accurate d-c output
voltage level is:
VOQ =[VRee- 3V
R BE x -R50
R x (R56+ R 54 ~ + 3V BE
48+ 50
56
(20)
7-39
II
TELEVISION .INTEGRATED CIRCUITS (Continued)
>:;
O.sr------rl::p"'r~~-+--_:_--+_----~
...,0
10
20
15
CONTROL VOLTAGE - V
DWG.NO. A-ll,504
Figure 8
D-C VOLUME-CONTROL CHARACTERISTIC
Inserting the resistor values, this simplifies to
V OQ = 0.45 Vcc
+
then
V, =
V'o
1.6 V BE
(21)
R.8
R49
w,C,
25 Rso .
(27)
The unique input .biasing (pat. u.s. 3,896,383)
provides internal ripple rejection without the use of a
separate large external decoupling capacitor. Supply
ripple voltage appears at the amplifier input via divider R48 and Rso and divider R49 and Cc + ROUT'
where ROUT is the output impedance of the attenuator
at pin 2. The amplifier input therefore sees only a
greatly attenuated ripple component. The following
expressions define the ripple rejection.
Inserting the component values and simplifying, the
ripple rejection at 120 Hz becomes
SIT = 20 log 39.8 = 32 dB
(28)
and at 60 Hz
SIT = 20 log 19.9 = 26 dB
(29)
The input ripple voltage is:
V,
= V; L
Rso
)
(ROUT'
' \ R48 +R so
+ (1 iw,CY ) 1,6
R.9
The amplifier input stage is a Darlington differential stage biased by Q64' A diode-connected current
mirror (Q54) converts the differential output of Q5I
and Q52 to a single-ended output for the final
amplifier. The final amplifier's idling currentis set
by a 3V BE diode network consisting of D 19 , Q", and
Q'6'
The output stage is a quasi-c9mplementary class B
design. The drivers are Q58 and Q61' while the output
power transistors
Q'9 and Q62' Transistor Q60 is a
unity gain PNP that provides the phase reversal function. The internal closed loop gain is set by R'4 and
R'6' A dominant pole is introduced in the amplifier's
open-loop response by means of R 5" C 3 , and C 4 • This
pole can be determined by
f =
1
d
2rr AVOL C3 R"
(30)
(22)
The outputripple voltage is:
V'o = V'i AV CL
(23)
The ripple rejection is:
SIT
=20Iog~
V'o
(24)
are
Assuming
(25)
and
(26)
7-40
TELEVISION INTEGRATED CIRCUITS (Continued)
TO
REGUlATOR_-r--..,....------+-~------------_....,
1<48
055
23.SK
'49
50K
~----.,
I
(FIG. 5\
DWG.NO. 8-1468
Figure 9
OUTPUT AMPLIFIER
30
This puts the pole at approximately 500 Hz, limiting the amplifier's closed-loop response (fH) to about
50 kHz.
The low-frequency pole (fi), defined by the input
coupling capacitor and ~91 is specified as:
1
fL =
27T Cc ~9
25
/
20
--
-"
II
...
15
10
(31)
It should be noted that the output-load coupling
capacitor will also influence the low-frequency response.
10
30
100
300
IK
3K
10K
30K
lOOK
3
FRI:QUENCY - Hz
DWG.NO. A-ll,500
A plot of the output amplifier's frequency response is shown in Figure 10.
Figure 10
OUTPUT-AMPLIFIER FREQUENCY RESPONSE
Overload protection for the output amplifier is
accomplished by limiting the output-transistor current and by removing the. bias from the amplifier
input wheri chip temperature exceeds 150°C. Transistors Q57 and Q63 perform the current-limiting function while Q21 senses chip temperature and acts to
ground the input to the amplifier, removing bias from
the output devices.
Current limiting is defined by the emitter ballast
resistors (R57 and Roo) as simply
I
(32)
7-41
SC
- ~BE
-
R
TELEVISION INTEGRATED CIRCUITS (Continued)
R21
6D BIAS
5D BIAS
BIAS 'H'
OUTPUT
AMPLIFIER
BIAS
BIAS 'l'
lD BIAS
D14
D~G,
NO. A-ll ,502
Figure 11
INTERNAL REGULATOR
circuit. The first stage of the regulator consists of
resistor R21 and diodes D14 and D21 to provide a stable
voltage for current source Q20. The emitter resistor
(R I9 ) is tapped to establish the thermal shutdown
reference. The current source is mirrored in Q18'
which drives diodes DIO through D13 to set the regulator output voltage. Transistor Q17 is the series-pass
output of the regulator. It is capable of driving all of
the internal bias loads and is available at pin 8 for
driving up to 10 rnA (at 15 V) into an external load.
The short-circuit current is typically 1 A at
+25°C, decreasing by approximately 3500ppmrC
due to the reduction of V BE and the increase ofR'7 and
R60 with temperature. At the maximum chip temperature (150°C), the short-circuit current will be about
560 rnA.
Thermal shutdown is programmed by the voltage
divider, R 18 and R 19 . The base-emitter bias of transistor Q21 is related to the shutdown temperature as
Ts = TA (2 _ VBES
V BEA
)
Characteristics and Applications
(33)
A typical application of Type ULN-2211 is shown
in Figure 12. The input selectivity network can be
any of several types. However, the total network
impedance (pin lO-pin 11) must be less than 500
ohms to guarantee stable operation. The bypass capacitor on pin 11 should be as close to the pin as
possible to assure good bypassing. It is also advisable to keep the input grounds (pin 9) separate from
the output grounds (tabs) to prevent ground-current
interaction at low input levels.
The detector characteristics can be varied by
changing the values of R, L, and C in the quadrature
tuning network. The output level and THD of the
detector will depend on the Q of the network. The
loaded Q «(>L) of the network can be found from
Q _.
Qc
L - 1 + W o L Qc
where:
Ts = chip shutdown temperature in oK;
TA = reference temperature (293 OK);
V BES = shutdown bias voltage;
VBEA = bias at reference temperature (600 mY).
If Ts is 423 oK (150°C), then VBES is equal to
334 mV. The circuit design actually requires a temperature of about 180°C to produce complete shutdown. This ensures a smooth, stable transition.
Internal Regulator Description
The internal voltage regulator in Type ULN-22 I 1
provides bias stabilization necessary for critical input, detector, and control functions. In addition, the
regulator provides stabilization of the output bias
currents and provides bias for the thermal shutdown
R
(34)
7-42
TELEVISION INTEGRATED CIRCUITS (Continued)
OPTIONAL TONE CONTROL
0.22
25K
~if--~
Vee
I
.,!,-
t1 f - - : - .. ~~;,~E~~~~~
1
I
VOLUME
I..!!J---t--..,---,
\.!!.I---+-_-+-_-'
0
12.5"" NOM.
l
160
Vee
o---.,.--;-:n
ll~
10~
1
"~f----o
10J
IF INPUT NETWORKS
Figure 12
TYPICAL APPLICATION
where:
Qc = the unloaded coil Q;
R = the parallel combination of the equivalent
20 kil internal resistance and any additional
external resistance.
Lower Q results in lower THD and recovered
audio. The output of the detector is given by:
V.
=;'
arc tan (
2~~fd)
(35)
The detector THD is given by:
THD
= 8.4e~~fdy
(36)
By substituting and solving for Qc = 50 (R = 20 kil,
f. = 4.5 MHz, and fd = 25 kHz), QL = 30 and THD
= 1%. By adding an external resistor to reduce QL to
20, the THD is reduced to about 0.4% and the detector output is reduced by about 35%.
The capacitor at pin 16 provides system deemphasis. The internal impedance at pin 16 is
10 kil. A 0.01 /-tF capacitor sets de-emphasis at
100 /-tS or 1.6 kHz. A high-cut (low-pass) tone control can be added at pin 16. Typical values would be
25 kil and 0.22 /-tF. Alternatively, the tone control
can be added between the attenuator output and the
audio input with some degradation in ripple rejection, as discussed previously.
A volume-control value between 10 kil and
100 kil is recommended. The control can be returned to Vee or returned to the regulated output on
pin 8. In the former case, some decoupling may be
necessary to prevent ripple feedthrough.
The output amplifier requires only the output load
capacitor and a 0.1 /-tF output bypass to suppress any
tendency for the composite output current-sinking
transistor to oscillate with inductive loads.
The input coupling capacitor (Cc) is selected in
accordance with previous discussions. A small capacitor, typically 0.01 /-tF, is used at pin 2 to remove
any residual high-frequency content.
7-43
o
TELEVISION INTEGRATED CIRCUITS (Continued)
The three curves in Figure 16 show the system's
residual output under conditions of30% A-M signal,
continuous unmodulated carrier, and no-input signal
as a function of the volume-control voltage. The
curves are very similar to that of the volume-control
characteristic shown in Figure 8, illustrating the uniform A-M rejection andsignai-to-noise performance
of the sound system as the control is varied over its
full range.
The supply voltage for Type ULN-2211 may
range from 12 to 27 V. However, in order to obtain a
nominal 2 W output with the recommended 24 V
supply, the supply impedance must be kept below
250 (19 V minimum full-load supply voltage).
The most important typical characteristics of the
sound system are summarized in Table 1.
Figure 13 shows the input-limiting threshold and
signal-to-noise performance for the entire system (IF
inputto audio output). As shown, the typicailimiting
threshold is at Yin = 150 ""V.
Figures 17 and 18 illustrate the output capabilities
of Type ULN-2211 over a wide variety of supply
voltage and load conditions. As shown, a power
output of up to 4 W can be obtained with a 27 V
supply while a more nominal 24 V supply will allow
up to 3.6 W at 10% total harmonic distortion. Care
should be taken to allow for supply-voltage sag when
calculating maximum output power. For example,
the typical 24 V supply, with an equivalent impedance of 250, will sag to 19.5 V at full audio power
output (approximately 2 W). Figure 19 shows device
dissipation and efficiency curves for the nominal
24 V supply.
Figure 14 shows the excellent A-M rejection
characteristics of the sound system over three decades of input signal variation. The performance for
the entire system is shown. The output level is set by
the volume control to produce 4 V across the 160
load (1 W) with an input voltage of 10 mV,m,'
Figure 15 shows the output volume-control
characteristic with 30% F-M modulation.
TABLE I
TYPICAL ELECTRICAL CHARACTERISTICS at fa = 4.5 MHz, Vee
Cha ra cteri sti c ,
Standby Current
limiting Threshold
Deviation Sensitivity
A-M Rejection
Play-through
THD
Signal-to-Noise Ratio
=
24 V, TA = +25°C
Test Conditions
..
-'
Po Vin VI =
Vin Vin -
1 W, VI - 12 V
10 mV, fd = 25 kHz, m = 0.3
0, fd= 25 kHz
10 mV, fd - 25 kHz, Rl - 160, Po - 2 W
10 mV, fd - 25 kHz
7-44
Value
40 rnA
150/LV
3.5 kHz
55 dB
5 mV
1%
65 dB
TELEVISION INTEGRATED CIRCUITS (Continued)
10
IJJ~~EREb IJJ.l~t)-
o
V
CD
11111111
-10
"0
;;;
fo :: 4.5MHz
fd - 7.5kHz
fm -.400Hz·
oJ
~ -~O
~
RL - 160
OdS" 2Vrms
. Vee= 24V
~' -30
~
~ -40
-50
OUTPUT NOISE, en
-60
100fL
lOP.
10m
1.0(1'1
100m
INPUT VOLTAGE, Vin IN VOLTS
ut'~.
~O.
1.0
4-10.509
Figure' 13
OUTPUT AND NOISE AS AF.UNCTION OF SIGNAL INPUT
-10
~
"'"
-20
;;;
Z -30
~.
<)
"'L3
- 4.5MHz
fd • 25kHz
fm = 400Hz
RL -160
fbUT'IW
Vee:: 24V
fo
1\
1\,
-40
D
0::
"-
'"
"" -SO
'"
-60
,
' ....
".
'.
-70
100",
1m
.,3m,
10m
30m
INPUT VOLTAGE" Vi. IN VOLTS
DWll.KO.I\.-IO.SIO
Figure 14
AM REJECTIONASA FUNCTION OF SIGNAIANPUT
7-45
100m
TELEVISION .INTEGRATED CIRCUITS (Continued)
o
10
/
irr IN
Figure 17
.
10
~.o
WATTS
".. HO.
A-I"'''
.
THDAS A FUNCTION OF OUTPUT POWER
~~O'~~lt2---t14--~16~.-.~~~~~~~~~~~~
. SUPPLY
!:---'-::!':-'--'-::!::-'-:':-'-'-:~---,!-:--'-::~-:!o
"'
2.'
3.0
3:"
1111 WAfTS
DIKl.
Figure 18
O.UTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE.
·~o.
•
"-IO.SOZ,
Figure 19
DISSIPATION AND EFFICIENCY
AS.A FUN.CTION OF OUTPUT POWER
TELEVISION INTEGRATED CIRCUITS (Con.tinued)
~~::-----1 ~
~6~
rr;t=
__
16 15 14 13 12" 10 9
1NDEX~~::::~ ~L-'I
0.065
0.035
~ 21 3 4 5 ~
~ ~O.785
~
--r-
0.100:1: 0,010
NOTE 1
/
0.735
0.200 MAX.
1¢'''"~ ~~,
0.020
MIN.
Owg. No.' A-IO.3UB IN
NOTES:
1. LEAD SPACING TOLERANCE IS NON -CUMULATIVE
2. EXACT BODY AND LEAD CONFIGURATION AT
VENDOR'S OPTION WITHIN LIMITS SHOWN.
3. LEADS MISSING FROM THEIR DESIGNATED POSITIONS
SHALL ALSO BE COUNTED WHEN NUMBERING LEADS.
4. TERMINAL LEAD STANDOFFS MAY BE OMITTED AND
REPLACED BY BODY STANDOFFS:
5. LEAD GAUGE PLANE IS 0.030 MAX. BELOW
SEATING PLANE.
Figure 20
16-LEAD DUAL IN-LINE 'B' PACKAGE
5.0
Package Design
Type ULN-2211 is furnished in a modified 16lead plastic dual in-line 'B' package shown in Figure
20. The tabs (pins 4, 5, 12, and 13) allow easy
attachment of various inexpensive heat sinks or can
be directly soldered into the printed wiring board for
low power applications.
The power dissipation of the package is ultimately
limited by the chip-to-tab thermal resistance (err) of
approximately 15°C/W, and the absolute maximum
chip temperature of +J50°C. The allowable power
dissipation can be determined from the following
equation:
'-::'0
,~
4.0
,.it
,~
3.0
'"~
~
,~
2.0
1.0
(37)
o 0~~~~50~~--~'00~~--~
TEMPERATURE (DC)
Figure 21 shows the allowable power dissipation
as a function of ambient temperature for various
tab-to-ambient thermal· resistances (eTA)' The two
extremes are for an infinite heat sink, which is ideal
but impossible to attain, and normal unsinked
printed wiring board mounting.
In practice, an intermediate coridition usually
exists. This is illustrated with the Staver Type V-8
heat sink. An approximate equivalent can be constructed by allowing about .two square inches of
excess ground foil on the printed wiring board in
close proximity to the tabs.
Figure 21
POWER DISSIPATION vs AMBIENT TEMPERATURE
Reliability
Extensive reliability testing has been performed
on the single-chip sound system. These tests have
included pressure-cooker, temperature, dynamic
operation, and power cycling at elevated ambient
temperatures. These tests have shown an excellent
reliability for use in all expected environments.
7---48
TELEVISION INTEGRATED CIRCUITS (Continued)
Conclusion
References
Type ULN-2211 sound system is designed to
provide all functions required for consumer television and FM radio applications. It combines high
performance with the lowest possible cost in both
manufacture and application. It is capable of operating over a broad range of supply and load conditions,
including repeated output short-circuits. The device
has a highly stable remote d-c volume control and a
superior front end performance. The output stage
provides more-than-adequate power output and high
ripple rejection, without the need for a separate
bypass capacitor and pin.
1. Bilotti, A. and Pepper, R.S.,A Monolithic Limiter and Balanced Discriminator for FM AND TV
Receivers, Sprague Technical Paper TP-67-21.
2. Bilotti, A., Application of Monolithic Analog
Multiplier, Sprague Technical Paper TP-68-43.
3. Mack, P. H. and Palazzini, N. S., Characteristics and Applications of the Type ULN-2111 A FM
Detector and Limiter, Sprague Technical Paper
TP-69-3.
4. Bilotti, A. and Lutz, R. W., An lntegrated Two
Watt Sound System for Television Applications,
Sprague Technical Paper TP-n-5.
5. Dewey, R. and Marshall, S. B., ThermalDesign
for Plastic lntegrated Circuits, Sprague Technical Paper TP-74-1.
TABLE II
RELIABILITY TEST RESULTS
Sample
Size
180
83
50
60
12
Test
Pressure Cooker
Temperature Cycle
Thermal Shock
Dynamic Operating
Life at 60°C
Power Cycling
Test Conditions
15 psig
-WC to + 150°C
-WC to + 150°C
10 @ 1/4W
10 @ 1I2W
1O@ 1 W
30@ 2 W
2W
Test Duration
24 Hours
25 Cycles
25 Cycles
1000 Hours
21,614 Cycles
7~9
Number of
Failures
1
Cause of Failure
Lifted Ball Bond
0
0
0
0
1
0
0
Oxide Defect
o
TELEVISION INTEGRATED CIRCUITS (Continued)
THE ULN·2260A
SIGNAL, SYNC, and SCAN PROCESSOR
Introduction
AGC
The monolithic integrated circuit provides high
performance by ·careful selection of circuit techniques, and efficient partitioning of the AGC, sync
separator, and master-scan phase-locked loop.
This grouping of circuit functions is particularly
efficient. Since the video input is common to both
AGC and sync separator, the separated sync can be
internally coupled to the phase detector of the scan
phase-locked loop; the flyback waveform is required
for AGC gating and the phase detector.
When the scan is synchronized, current is supplied
to the AGC detector (comparator) during the separated sync. The negative-going sync video waveform
at pin 1 is compared with a 4.0 V level during this
time. As a result of the A GC loop, the tip of the sync
is clamped to 4.0 V.
+
+
RF a I-F
SOUND
SIGNAL
PROCESS
'C---------'C---...l.
...l..
~
-:"'
DWG.NO. A-ll.484
Figure 3
RECEIVER PARTITIONING
AGC DETECTOR
FLYBACK
The AGC detector is a high gain comparator with
an asymetrical active load (Figures 3 and 4). The
active load provides approximately 3.2 mA of primary filter capacitor charge current and 1.0 rnA of
discharge current.
FLY BACK IN
AGC PRI. FILTER
SYNC. SEP.
a
COINCIDENCE
GATING
DWG.NO. A-ll,486
Figure 1
VIDEO IN
SYNC
I-F GAIN CLAMP
VERT. SYNC.
+32mA
I-F AGC
SAWTOOTH
GROUND
TNR REV. AGC
OSC. IN
TNR fWD. AGC
OSC. IN
APC FILTER
40V
VPtNI
-lmA
OSC. OUT
DWG.NO. A-ll,487
Figure 4
DWG.NO. A-ll,485
AGC DETECTOR CHARACTERISTICS
Figure 2
7-50
TELEVISION INTEGRATED CIRCUllS (Continued)
The high AGC-loop gain provides the high slew
rate necessary for fast channel-to-channel gain
equalization and response to airplane flutter variations.
The AGE detector is gated ON by a pulse defined
by coincidence of horizontal flyback and sync.
Coincidence-gating provides improved AGC noise
immunity over systems only are flyback-gated.
Coincidence-gating maintains AGC levels in. the
event of temporary loss ofhoriwntal sync or disturbance of horiwntal timing.
Coincidence-gating demands the use. of two
additional internal circuits to compensate for two
extremes of video input level at pin 1. The first is a
sync recovery system (Figure 5).
Figure 6
I-F OVERLOAD DETECTOR
OWG.NO.
DWG,N~.
A,-Jl.488
Figure 5
.
SYNC RECOVERY SYSTeM
Extremes occur in the transition from a strong to a
weak signal. The AGC iooprequires time to respond
to new signal level. In the meantime, system gain is
too low, and the video amplitude at pin 1 is too low
for the sync separator to provide sync pulses for
coincidence-gating. The resulting condition would
be lockout of the signal. However, a threshold detector composed of Q35 and Q36 senses sync-separatQ~
(pin 2) voltages less than 3.8 V. When this occurs,
the AGC detector is gated by flyback only, allowing
theAGC system to respond to the new signal level.
As the video amplitude at pin 1 increases to its
nominal value, the AGe detector returns to .the
coincidence7gating mode.
The second extreme of video input level occurs in
the transition from a weak to a strong signal. In the
transition, the I-F amplifier overloads, resulting in a
low doc level at pin 1, Figure 6. The sync separator at
pin 2 charges to a higher doc level, and no sync pulses
are generiltedfor coincidence-gating. Lockout of'the
. signal is again possible, being dependent on both
AGC-loop response and sync-separator time constants.
The. threshold. detector, Q6 and Q4' senses when
the doc level at pin 1 is below 3.4 V. When this
occurs, the AGC detectoris gated by flybackonly,
allowing the AGC system to respond to the new
signal level. As th!l video.le\!elat pin 1 decreases.to
its nominal value, the AGe detector returns to the
coincidence-gating. mode..
The AGC primary filter at pin 15 integrates the
AGC-detector output into a doc voltage, which drives
the AGC control Circuit. A low doc level at pin 15
corresponds to a low received-signal level. Conversely, a high doc level at pin 15 corresPonds to a
high received-signal level.
Figure 7 is a simplification ofthe I-F portion ofthe
AGC control circ.uit As is common practice, the I-F
amplifier is gain7reduced prior to the tuner under
increasing signal levels.
r..
VlEf .....
VX~
MAX. if' GAIN
REDUCTION
OWG.NO. A-ll.490
Figure 7
I·F AGC CONTROL CIRCUIT
7-51
4,4,," "Pi,
fO :\~
1\
A-.11~4g9
o
TELEVISION INTEGRATED CIRCUITS (Continued)
The maximum-gain voltage of the AGC primary
filter is defined by the circuit designer as
buffered and applied to the base of Q33' which has as
its emitter load a dual time-constant sync-separator
network (Figure 9). Since this network is external to
the device, the circuit designer has freedom to
choose the sampling level and sync-separator time
constants.
V I4 - 0.7 V
since this level is internally clamped by Q18' Under
gain reduction, QI§and Qi7 force the voltage at pin 14
to follow 1.4 V below the primary filter voltage.
Produced by a series of emitter-followers, the I-F
AGC output has a gain of 1, referenced to the AGC
primary filter.
Choice of the external voltage-dividerlevel, V x, at
pin 13 (I-F AGC output) defines the maximum I-F
gain-reduction level, orAGC delay point, at which
the tuner is called upon for further gain reduction. As
there is a finite dead zone in the cross-over between
I-F AGC and tuner AGC, a capacitor between pin 14
(a buffered primary AGC filter a-c voltage source)
and pin 13 will decrease AGC recovery time in the
transition between I-F and tuner AGe.
L.J
A/
I
At the maximum I-F AGC level, V x, the values of
resistors R27 and R30 are such that the voltage at the
base ofQ27 is 1.4 V (Figure 8). This defines the point
at which tuner AGC action is initiated. The collector
current of Q27 is mirrored to provide forward-tuner
AGe with a trans-conductance gain of 2.1 mA N;
referenced to the AGC primary filter. The emitter
current of Q27 is mirrored to provide reverse-tuner
AGC with a gain of 3.1 mAN.
I
DWG.NO. A-ll,492
Figure 9
SINGLE PIN SYNC SEPARATOR
The separated sync-voltage waveform at the collector of Q33 is clamped to 7.3 V by Q38, and is
amplified by approximately 20 dB (Figure 10).
Complementary emitter-followers buffering the
sync waveform have an amplitude of 10 V pp. The
sync output is provided at pin 3, protected by shortcircuit current-limiting of approximately 25 mAo It
is internally coupled to the scan-phase detector. In
addition to protecting the device against accidental
shorts, grounding pin 3 also provides a convenient
method of adjusting the oscillator's free-run frequency.
IpIN- 11
121~
SEPARATED
SYNC
POSITIVE SYNC
VIDEO
I
~VIFAGC
TUNER FWO. AGC.
TUNER REV. AGC.
~VIFAGC
131~
\ .
SEPARATED
~ --.l_~~'WV--"-t
..JL
S'/NC
OUTPUT
DWG.NO. A-ll,491
K>Vpp
Figure 8
TUNER CONTROL CIRCUIT
DWG.NO. A-l1,493
Figure 10
SYNC OUTPUT CIRCUIT
Sync Separator
Since Q4' (Figure 6), clamps the video waveform
to 0.5 V below the level of the sync tip, noise accompanying the incoming video is prevented from
severely altering the sampling level of the sync
separator.
Scan Processi;"g
The scan-phase detector consists of a differential
amplifier that is gated ON by separated sync. An
integrated flyback waveform is applied to the input
of the differential amplifier (Figure 11). The differential amplifier has an active load, providing singleended output of the phase-detector currents.
The negative-going sync video waveform at pin 1
is inverted and amplified by 6 dB. This waveform is
7-52
TELEVISION INTEGRATED CIRCUITS (Continued)
n
~
11
3
SYNC OUTPUT
10Vpp
--
10
+
--
CONTROL
VOLTAGE
TO Veo
4
DWG.NO. A-11,494
jFLYBACK
functions are external to the device. This provides the
circuit designer with freedom to define the characteristics of the oscillator: Free-run frequency, control
sensitivity and temperature compensation. Control
of free-run frequency allows operation of the circuit
in both countdown-synchronized and conventionally
synchronized receivers.
The oscillator is controlled by weighted summing
of quadrature components of feedback-signal current. Tbe quadrature is inherently defined by the
external resistor and capacitor of the tank circuit at
the input of each of the two differential amplifiers.
These external components are series connected.
Therefore, the capacitor voltage waveform lags that
of the resistor by 90°. V CO characteristics for a
S03.S-KHz L-C oscillator, vertical countdown receiver, are shown in Figure 13.
Figure 11
PHASE DETECTOR CIRCUIT
The positive and negative-output currents
(SOO /LA) of the phase detector are internally balanced to within approximately S% of the absolute
value of these currents. This limits the static phaseerror attributable to phase-detector imbalance. Since
the phase-detector output filter is external to the
device, pull-in characteristics can be defined by the
choice of external filter components at pin 10.
A simplification of the master-scan V CO of Type
ULN-2260A is shown in Figure 12. The VCO is
designed to minimize the effects of device parameter
variations on free-run frequency and VCO characteristics. Components defining phase-shift and filter
535
525
~.
515
/1.
25kHzIV
505
495
--i
485
I
5.0.
6.0.
7.0.
VPlN 10
DWG.NO. A-ll,496
Figure 13
VCO CHARACTERISTICS
+
Because it is a low-impedance source-point, pin 8
is internally short-circuit current-limited to approximately 70 rnA.
I
Conclusions
CONTROL
VOLTAGE
~-----+---46~----~
+
DWG.NO. ,1\-11,495
Figure 12
MASTER SCAN VCO
The device presented above was designed to
provide, with as much flexibility as possible, efficient partitioning of AGe, sync, and scan-control
functions. Coincidence AGC-gating was utilized to
improve AGC noise immunity. The circuit provides
a high-level separated-sync output for sync integrators. The scan-phase detector is accurately balanced internally. The scan VCO was chosen to
minimize the effects of device-parameter variations
on oscillator characteristics, and is adaptable to both
countdown-synchronized and conventionally synchronized receivers.
7-53
o
~ ~_A_UD_IO
__IN_T_EG_AA
__
TE_D_C_IR_C_U_IT_S__________________
SECTION 8 - AUDIO INTEGRATED CIRCUITS
Selection Guide
...... 8-2
ULN-2231A Dual Audio Preamplifier ...................................
ULN-2280B 2.S-Watt Audio Power Amplifier .............................
ULN-2283B Low-Power Audio Amplifier .................................
ULN-3701Z (TDA2002) Sto 10-Watt Audio Power Amplifier ..................
ULN-3702Z (TDA2002A) 12-Watt Audio Power Amplifier .....................
ULN-3703Z (TDA2003) lO-Watt Audio Power Amplifier ......................
ULX-3777W Dual 10-Walt Audio Power Amplifier ..........................
ULX-3788W 20-Walt Audio Power Amplifier .............................
8-3
8-S
8-11
8-19
8-22
8-27
8-29
8-31
II
8-1
AUDIO INTEGRATED CIRCUITS
SELECTION GUIDE TO AUDIO INTEGRATED CIRCUITS
Device Type
ULN-2231A
ULN-2280B
ULN-2283B
ULN-3701Z
ULN-3702Z
ULN-3703Z
ULX-3777W
ULX-3788W
Monophonic
Stereo
POUT
X
X
X
X
X
X
X
X
8--2
2.5 W
1.2 W
lOW
12 W
10 W
10 + 10 W
18 W
Vee
10.5-16 V
8-26 V
3-18 V
8-18 V
8-26 V
8-18 V
8-18 V
8-18 V
UlN-2231A DUAL PREAMPLIFIER
ULN-2231 A DUAL PREAMPLIFIER
OFFERING OUTST A
low-noise amplification 0
Type ULN-2231A is a reliable
sumer and industrial products
tape players, microphone am
phonograph preamplifiers and stereo
ABSOLUTE MAXIMUM RATINGS
This dual preamplifier has an internal v
regulator. Internal feedback resistors are pr
vided for NAB equalization.
Power Supply, Vee .
perating Temperature Range ...
S
Temperature Range.
P
·pation. Po .
Type ULN-2231A is supplied in a 14cpin dual
in-line plastic package.
. .... +16 V
. ." -20 o e to +85°e
. .~65°e to + 150 0 e
. ....... 670mW*
e of 8.3 mW/oC at TA above +25°C.
II
S-3
ULN-2231A DUAL PREAMPLIFIER
ELECTRICAL CHARACTERISTICS at TA =
+ 25 °C, + 10.5 V
.$ Vee .$
+ 16 V
(unless otherwise noted)
Parameter
Test Conditions
Voltage Gain
Figure 1, f
Total Harmonic Distortion
f = 1 kHz
Voul = 500mV rms
Noise Out
R,
= 1 kHz
Min.
Limits
Typ.
Max.
Units
40
-
46
dB
0.5
1.0
%
1.5
-
mV
2.0
dB
-
dB
kQ
Gain Balance
-
Channel Separation
40
-
Input Impedance
-
40
Ripple Rejection
= 620Q
= 1 kHz
-
35
-
dB
Input Bias Current
-
-
3.0
/AA
Turn-On Delay
-
1.0
-
s
Icc
-
-
12
rnA
f
TYPICAL RESPONSE CURVE
TEST CIRCUIT
AND TYPICAL APPLICATION
3300,,'
NAB
NAB
EQUALIZATION
EQUALIZATION
rl...!!l----t---<
OUTPUT
10,.'
OUTPUT
+
Owg. No. A-98ll
Figure 1
TURN-ON CAP
'"~ 5°r---+-~~crHtr---L-~~LL~r-~
!il
~ ~~--r-II11I1Mtr-=-r-"~fFAT~~
~ 3°r---+--r~HrHtr---+--ri-HrHtr-~
:i
~
20
t---t---t--t-I-t-HTt---t---t--t-t--r-HTt----I
w
~ 10C---t--r+i-HH+r---r-i--t-I-HH+r-~
NOISE
FREQUENCY. f, IN Hz
Owg. No, A-9554A
ULN-2280B AUDIO POWER AMPLIFIER
ULN·2280B AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
Low Distortion
Low Quiescent Current
A-C Short-Circuit Protection
34 dB Internally Fixed Gain
High Input Impedance
Thermal Overload Protection
• Replaces LM380N
SUPPLEMENTAL discrete components are
F EWneeded
to use Sprague Type ULN-2280B audio
The audio amplifier is supplied in an improved
14-pin dual in-line plastic package with heat sink
contact tabs. The webbed lead configuration, origi~
nated by Sprague Electric, permits attachment of an
inexpensive heat sink for increased power dissipation capability and use of a standard integrated circuit socket or printed wiring board layout.
power amplifier in automotive, communication and
consumer designs.
With an 18 'v supply, the amplifier delivers 2.5 W
of low-distortion audio into an 8D load. Output
power with a 24 V supply is 2.5 W into a 16D load.
~
@
NC
200K
SIGNAL 7 r-------<'-----r--+----~
GROUND
8-5
.oW9. No. A-'1l77A
ULN-2280B AUDIO POWER AMPLIFIER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage. Vcc . . . . .
. ..... 26 V
Peak Output Current. lOUT
..................................... 1.2 A
Package Power Dissipation. Po .................................. See Graph
Operating Temperature Range. TA .
. ..... - 20°C to +85°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vee = 18 V, Rl == 80, fin = 1 kHz (unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Output Voltage Swing
Voltage Gain
Tota I Ha rmon ic Distortion
Audio Power Output
Input Impedance
Power Supply Rejection
Equiv. Input Noise
Bandwidth (-3 dB)
Symbol
Vee
lee
Voo
Vout
Test Conditions
Min.
8.0
Vin = 0 V
-
Vin = 0 V, See Note 1
poot = 2 W
Pout = OW
Po~ = 50 mW, Rl ~ 80, Vee = 18 V
Pout = 50 mW, Rl = 160, Vee = 24 V
Pout = 2W, Rl = 80, Vee = 18V
Rl = 80, Vee = 18 V, THD = 2%
Rl = 160, Vee = 24 V, THD = 2%
Each Input
Pout = aW, f = 120 Hz
f = 20 Hz to 20 kHz
Pout = 1 W, See Note 2
Au
THD
Pout
lin
PSRR
BW
NOTES: 1. The quiescent output voltage typically equals Y2 the supply voltage.
2. Unity gain typically occurs between 10 MHz and 100 MHz.
TEST CIRCUIT
'0.1
o-J f--f---I
INPUT
+
5f1.F
DW9. No. A-ll,396
&-6
31
2.0
2.0
140
-
Limits
Typ.
Max.
18
26
15
9.0
12
37
34
<0.2
1.0
0.5
<1.0
2.0
2.5
2.5
170
35
60
100
-
Units
V
mA
V
Vpp
dB
%
%
%
W
W
kO
dB
p..V,ms
kHz
UlN·2280B AUDIO POWER AMPLIFIER
TYPICAL CHARACTERISTICS
DISTORTION AS A FUNCTION
OF OUTPUT POWER
DISTORTION AS A FUNCTION
OF FREQUENCY
..
3
.
~s
~
~
.
;s
VCC" 22V
f ,.1kHz
RL=
I
3!
,;
~ 2
en
~
3
I!: 2
YCC,,18V
Rl=Sn
'I ,
§
...
j
S
8
~~.1::==~O.;2==t:~0~.5dd~~,~==~~~~~~llllJ,,0.
0
'00
OUTPUT POWER, POUT. IN W
~.
~rP\.'!.
1000300
1K
~~
IIII
3K
PSRR AS A FUNCTION
OF FREQUENCY
VOLTAGE GAIN AS A FUNCTION
OF. FREQUENCY
II
.01-+++++ttH--1-t-t+ttttr---++++tIttt--H+ttttH
l:I
I
f 50
t:I .0
30K
Dwg.Ifo.A-ll.398
Dwg,No. A-ll,J97
•
10k
FREQUENCY, f. IN Hz
CI"",'J.Lf
i~Q
~F
"'- ......
o
'0
30
,Vet=22V
Yin'"' tl'lVrms
II .
II,
CI';O
100
300
'REqUENCY; f. -IN Hz
1K
~3K
~~00~-3~00~~'~K~~3K~~'~OK~~30~K~·~1O~0~K~;~3=Q~OK~~'M
10K
FflEqUEt4CY. f. IN Hl
Dwg,No.A-ll.400
8--7
UEN-2280B AUDIO POWERAMP1IFIER
THERMAL FACTORS
t',
,",:
.
"
ANDULN-2280B OPERATION
Thermal factors must be considered in achieving reliable operation of
Type ULN-22S0B. Guidelines given here provide the circuit design en.' ~.' gineer wi th infoffilation on maintaining Ie junction temperature below safe
limits when the audio power amplifier is operated at maximum ambient
temperature and power dissipation.
The graphs below show package power dissipation as a func,lion of
'output power over a wide range of supply voltage with a load resistance of
SO or 160. Lines indicating 3'7cdistortion and 10% distortion are Shown as
guides to trade-offs between supply voltages, package'power dissipation
and upper~limit distortion.
As the power supply voltage increases for any output power requirement, distortion decreases and package power dissipation increases. Package power dissipation figures must be taken from the highest point on the
supply voltage curve.
DISSIPATION AS A FUNCTION
OF OUTPUT POWER (160 LOAD)
DISSIPATION AS A FUNCTION
OF OUTPUT POWER (SO LOAD)
,
vee l= 24V
',.
~
,
2
, /i""'vC}·22V'
~
:£ ,
~
~
.
,'/0""~ r---
'
JI'
"
~
i"'"
/ ' "0".9 ::>'
Vee I. IBV
~"6V '
-,c; ~
Vee = I"V
1
velc'" 20V
--
.;7
~ "..-
~ ".,
"'"
V"
I
-
".
2
Vee - 26V
/
ved '2,V
Vee'
~
':> <:
,,?,
"~
~o 7E:>~
~~
,,,Q
RI. =8....
•
f= 1 kHz
2
0
,
OUTPUT POWER. POUT. IN WATTS
I
2
,
OUTPUT POWER, POUT. IN WATTS
Dwg. No, A-9839A
s-;g
~
RL'·tbn.
,(fie
"
0
/
1 kHz
V
•. 1'
ULN-2280B AUDIO POWER AMPLIFIER
CIRCUIT DESIGN
If design valu~s of audio output power, distortion and maximum ambient
temperature have been selected, optimal speaker impedance and supply
voltage. as well as heat-sink requirements, can be determined from curves
below and on page 4.
For an output of 2.S W with 3'k distortion and a maximum ambient
temperature of + SODe:
an
R
THO
16n
3%
2.5 W
22 V
1.75 W
4.25 W
193 rnA
3%
2.5 W
16.7 V
1.9W
4.4 W
263 rnA
POUT
Vee .
Po (max)
p + Po",
Icc
The preceding appears to indicate the best choice is an output impedance
of 16D with a 22 V supply. However, if an unregulated supply is used, the
designer may prefer an 8D load with a 16 V supply, since the absolute
maximum Vee rating of Type ULN-2280B is 26 V and since maximum
package dissipation must be calculated using the no-load voltage level.
The graph below (left) shows that the Staver V -8 heat sink would be just
adequate for design conditions outlined above at an ambient temperature of
sODe. The Staver V-7 heat sink would provide a wider margin of safety.
DISSIPATION AS A FUNCTION
OF AMBIENT TEMPERATURE
5.0.-..-,--,--,--.-,--,.....--,---,
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
~
~
l!: 4.0
20
..
ci
z·
o
i=
«
~ 3.0r~+-"
«
15
E
Q
"'
l!:
~ 2.0 1---+--'
~ 10
g
u
~
"'
~
;:
9
~
.",
"'"':::>
.
~
1.0 I---+--+--+--N~..-\-+_--l
,,"
i;l
/
/"
,., /
D
/
/'
Vin:; 0
;(
0~--~~2~5--~50~~75~~~~~~
10
Dwg. No.
15
25
20
SUPPLY VOLTAGE. Vee. IN V
AMBIENT TEMPERATURE. TA. IN 'C
A~
",'I
11,459
8-9
',(',
·--11,
ULN-2280BAUD.IO POWER AMPLIFIER
TYPICAL APPLICATIONS
1H
0.002
220K
I N PUT
80
pF
47K
0.005
AMPLIFIER WITH COMPLETE TONE CONTROLS
Dwg. No, A-ll,403
f-_---ovcc
LOW-COST PHONOGRAPH
f-~_~-<>vcc
AMPLIFIER WITH BASS BOOST NETWORK
82pF
4.7H
llwq.
~~o.
A-ll,4():,
ULN"2283B LOW POWER AUDIO,.AMPUftER
ULN·2283B LOW POW.ER AUDIO AMPLIFIER
FEATURES
-Wide Operating Voltage Rangf(3 to .18 V)
-Low Quiescent Current Drai n
-A-C Short Circuit Protected',
-Low External Parts Count .'
-Low Distortion
-42 dB Voltage Gain
DESIGNED primarily for use in low-cost
'. phonqgraphs and radio req:ivers, the ULN2283B audio.power amplifier is well-suited for
use in battery-operated portable equipment. It
will function with supply ~6ltages as low as 2
volts (at reduced volume) without any signifi~
cant increase in distortio~. Weak batteries need
no longer be a major concerJl for users in sets
with this device. The class AD audio amplifier
also features low quiescent current drain for
maximum battery life.
The VLN-2283B is; rated for operation' over
the supply voltage range of 3.0 to 15 volts.
Selected devices, for operation'with supply
voltages of up to 18 volts, are aviilableas ULN2283B-1. Except for the. maximum allowable
supply voltage specification, the ULN-2283B
and the ULN"2283B-l are identical.
The ULN-2283B audi.~ power amplifier is supplied in an improved 8~lead dualiil-line. plasticpackage with two webbed tabs. A copper alloy
lead frame results' in' maximum power dissipation without need for an external heat.sink. Lead
configuration. is ,compatible with standard Ie
sockets or printed wirihg p(),rd hole layouts.
II
ABSOlUTE MAXIMUM 'RATINGS
~upply
'•
Voltage, Vcc(QLN-2283B)., ........ : ... : .•. 15 V
,.
(ULN-2283B-l) .' .. , .. ,1.," • • • • '•• I&V
Pac,ka~e Power Dissipation, Pp, ..•.. ;'..~ ..• ::~~,~! Graph
Operating Temperature'Range; TA .....•. -:-20°C:tQ +SSOC
Storagp TemperatqreRange,.T;s ......... -65t~Ct~ ~'150~C
-
8--11
.'
"
.
"
.~~ ; ";" ~'
,
ULN"22838. LOW POWER'AUDIO AMPLIFIER
ELECTRICAL CHARACTERISTICS at TA
Characteristic
Supply Voltage Range
Symbol
Vee
Quiescent Supply Current
lee
Voltage Gain
Audio' Power, Output
A,
,POUT
Input Resistance
Power Supply Rejection
Ilw
" PSRR
= +25°C, fin = 400 Hz
Test Conditions
ULN-2283B
ULN-2283B-l
Vee = 6.0 V
Vee - 12 V
POUT - OW
~ = 6.0V, R = 8n, THO = 10%
Vee = 9.0 V, Rl = 8 n, THO = 10%
Vee - 12 V, Rl -16 n, THO - 10%
Pin 8
Co = 500 f.LF, friP,I. = 120 Hz
Limits
~
Min.
3.0
3.0
Max.
15
18
16
28
46
-
-
-
~
12
24
42
0.35
tl
1.2
250
34
39
0.25
0.80
0.80
28
-
Units
V
V
mA
mA
dB
W
w
-
W
kn
dB
-
rEST CIRCUIT
ALLOWABLE PACKAGE POWER DISSIPATION
Vee
Printed Wiring Board Copper
is 2 oz.lft2 , 2.5 sq. in.
(610 91m2; 16.1 cm 2)
0.001
INPUT
O-"N~
1\
,~
~
"'"
3
,*,
j;
~
,~
\%
,~
0",
,~
2r-">~
Wo
'£
"'0
TYPICAL FREQUENCY RESPONSE
,~
"1b,.~
l"v,,~
T,
C
25
\
\
\
\
,
,,
.... ' ,
~~~'
§..., ~;>
,
So
0
,,"
\
.l
....
75
AMBIENT TEMPERATURE, T..... IN
-~1~O---*30--~1~OO~~30~O--~'K~--~3K---'1~OK--~O~K--"I~K
FREQUENCY, fin IN HERTZ
8--12
'\
'~
125
O(
ULN-2283B LOW POWER AUDIO AMPLIFIER
TYPICAL CHARACTERISTICS
60
50
,
.,
QUIESCENT SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE
::::
»
~~
/~
~~ 30
'"a'" 20
::;
,~
"
.
0..
0..
~IO
/'
-----
E
V
./
/
f
~
N
F=
'7'
el
z
::::l
w
'"
!O
b
c
12
14
III
18
20
SUPPLY VOLTAGE, VCC,IN VOLTS
A~1l,233
OWG.NO.
2,8
,;"~
2,4
2.0
II
I
i)I<
....\
;,-
jrf V ---\ ~X ~~,
~vJ:v' ~7
•
<$-'?lr
/ 1'. V Y
THO - 10%
f
=400 Hz
1,6
l>
\
x
;,
OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
c
~-
1,2
~
0,8
...~
0.4
~
o
o
~
!-
~ ~~
6
8
JO
12
14
SUPPLY VOLTAGE, Vee/IN VOLTS
16
18
20
DWG.NO. A-1O,839A
.g 0
"
g 10
;>
Z
g 20
POWER SUPPLY REJECTION
AS A FUNCTION OF FREQUENCY
~
~
CD ~ 100
~F
~
..............
~'-
30
a
:::s 40
~
10
20
50
100
FREQUENCY IN HERTZ
8---13
200
-
..............
500
lK
II
ULN-2283B LOW POWER AUDIO AMPLIFIER
PACKAGE POWER DISSIPATION
AS A FUNCTION OF OUTPUT POWER
2
,
I, 0
0, 8
61
o.
0,
"
~~
v cc
4/
0,
/
---""'
Vee::O 9 V
..". ~
~
6V
_
....
.........
.,
,-Slo...
.........
Rl
4-,,-
-I, =400H,1
Jr
o
o
0,2
0,4
0.6
0.8
1.2
1"0
1,4
1.6
1,8
OUTPUT POWER IN WATTS
AT "Q LOAD
1.2
Vee
10
.........
/
0,8
I
0,6
o4
12 V
=0
i"'-. ~~
....
'flO ....
......
......... ~.. ....
1//
(
~,,<)
Il
.,
V~6V
0,2
o
o
.......... y'-Slo
...'
"'¢2.._
Vee "'9\1"- f--~"<) ...
0,25
0.:)
0.75
I,D
1_25
'L
f
-8~
I
1.75
2,0
"'400Hz
1.5
2,25
~.o.
OUTPUT POWER IN WATTS
;"'10.317
AT 8Q LOAD
0,6
0.4
0,3
0,2
"c
.......... ~2"
V"
0.5
~
/
I
"
~c
~c.
.....
... 10......
1,°1°......
¢.,
7~"'-s!:. ...
",,< ... ..... ...
I'L
~9"_
,~
V
1~16V
f
Ih,l
'" 400 Hz
0,1
o
o
0.15
0,3
0.4)
0.6
0.75
0.9
OUTPUT POWER IN WATTS
AT 16Q LOAD
8--14
1.05
1.2
1.35
ULN-2283BLOW POWER AUDIO AMPLIFIER
TOTAL HARMONIC DISTORTION
AS A FUNCTION OF OUTPUT POWER
'.
,
0
8
.'"
>
>
'""
u
6
i" -;"
u
"u
$'
u
u
~.
>U
4
2
~
.
'.
~
/
0
1O,m
'30m
100 m
I
,'- 1.0
300 m
I
I~t
= 400Hz •
3;P
III
-
8~
10
OUTPUT POiIER IN WATTS,
ATe" LOAD
Z
o
>
~
(j
I;;
•
'".
"8
,~t- - >
6
'"
N
0-
u
>H
/I
>U
H
i5
"u
'U
>
II
:~
§
4
~
r
..:"""- ,-1.1
10m
30 m,
~
lOI).m
~II
300 m,
OUTPUT POiIER IN WATTS
.AT 16" LOAD
,
i
8-:15
1.0
,..400 Hz
3.0
II
10
ULN·2283B LOW POWER AUDIO AMPLIFIER
CIRCUIT DESCRIPTION
To achieve the desired perfonnance objectives of
high power output and efficiency from a 2 to 18 V
supply requires that the amplifier be capable of
peak-Io-peak voltage swings approaching the avail~
able supply. To meet these perf'onnance objectives,
a power amplifier design is required. having no more
than one VBE of swing restriction.
As shown in Figure 1, the output stage is comprised of 2 NPN transistors (Q17 and Q18) plus a
phase inverter (Q15). Quiescent operating current is
set up by the current source (I).
,
~
DWGII:I.A-IO.897
Assuming Voq = Vcc/2 then the collector current
of Q15 = I, ignoring base currents, and if Q15 is
matched to Q18 as is possible in a monolithic circuit,
then the collector current of Q 18 equals the collector
curr,::nt of Q 15.
.
.llure2
To reduce the size ofQl5, an additional transistor
(Q16)is added to the circuit as shown in Figure 2.
Transistor Q16 divides I by its beta + 1 allowing
Q15 to be reduced in area by a similar value. In the
practical realization of the ULN-2283B, Q 15 is chosen as 115 the emitter area of Q18 with a typical beta
for Q16 of 6.
The circuit in Figure 1 achieves an excellent volt"
age swiQ.g capability of Vee - VBE - 2VCE(SAT)' This
to~ally NPN configuration also has good freedom
from the high-frequency problems that often occur
with quasi-complementary composite NPN-PNP
configurations,
Vee
7K
· -~f-t(
'*
,
I
D'lfJNO.A-IO.896
Fllure'
.llure3
Figure 3 illustrates other refinements in the practical realization of the output circuit. The drive and
idling current I is derived from a Vcc dependent
source allowing maximum drive under maximum
supply conditions while affording reduced drive and
associated current conservation under minimum
supply conditions. IIi addition, the Q16 divider circuit is refme4 to reduce PNP beta dependence.
Finally with the addition of an input emitter follower
(Qll) and a local negative feedback loop (R8), the
output is completed as it appears in the ULN-2283B.
Although the circuit in Figure 1 has been incorporate4 in production monolithic circuits in essentially
the fonn shown, in practice it has unacceptable
design restrictions. Since I is also the base drive
current for Q17, the ratio of available base drive
current I to idling current is proportional to the ratio
of the emitter areas of Q18 to Q15. For practical
values of ~15/~18' i.e. one, the circuit has a serious
implementation problem; it requires three output
transistors (QI5, Q17, and Q18).
&--16
ULN-2283B LOW POWER AUDIO AMPLIFIER
r- j f+~
~ :
The Vcc12 output tracking is achieved by summing the current flow through R4 and R5, with the
current through R13 "reflected off of ground."
Thus VcJ2 tracking is maintained by the voltage
drop across 2 resistors. This allows the current from
R13 to be bypassed at Pin 1, thereby combining the
ripple bypass capacitor with the audio feedback capacitor.
Figure 5 illustrates the complete power amplifier
as realized in the ULN-2283B, including the external components. The remarkably-low external component count, (only two capacitors including the
output coupling) reflects concern for simplicity in
implementation, yet the device achieves excellent
performance. Typical output power can be as high as
2.1 W from a 12 volt supply and useful output power
at supply voltages of as low as 2 volts.
7K
R13
l-+--t--..-'VV'.,--j--
FROM PIN 4
(A-' OUT)
3.9K
R4
Flgur.4
The input stage ofthe power amplifier (Figure 4)
is comprised of a PNP differential pair (Q2 and Q3)
preceded by a PNP emitter follower (Ql) which
allows doc referencing of the source signal to
ground_ This eliminates the need for an input coupling capacitor. Overall negative feedback, set by the
ratio ofR4 to R5, is applied to the inverting input Q3
through an NPN emitter follower (Q7) which also
provides doc level shifting.
APPLICATIONS
Selection of power supply voltage and speaker impedance allow the designer to choose audio power
levels. No unique precautions are necessary when
designing with the ULN-2283B power amplifier. The
device is stable and a-c short-circuit immune.
~-----~----------~------~----~------~-{5
10
no
vee
Q6
50
50
VOLUME
---~
GROUND
S-17
ULN-2283BLOW POWER AUDIO AMPLIFIER
Ripple rejection is not practical to calculate due to
the large number of mechanisms involved. A
500 f.LF capacitor at Pin 1 achieves typically 34 dB
rejection.
The selection of amplifier load impedance involves more consideration than just the desired
power output. Ideally a low speaker impedance
would produce the highest power outputs for any
one supply voltage as the curves illustrated. However, operation with a 160, load can produce as
much power as with an 8!1 load. The higher impedance load will also furnish a significant reduction in
harmonic distortion and improvement in overall repeatability in power output capacity. In applications
which allow the selection of the power supply voltage it is therefore recommended that a 160, load
impedance be utilized in applications up to 1.2 watt.
The high gain of typically 42 dB and the high
input impedance (250 ill) of the power amplifier
allow utilization of this device for applications such
as ceramic cartridge phono amplifiers.
PRINTED WIRING BOARD LAYOUT
& SPECIAL CONSIDERATIONS
External component choice for the power
amplifier involves only two capacitors; one for the
speaker coupling and one for the feedback and ripple by-passing. The coupling capacitor value should
be selected to provide the desired low-frequency
cutoff with the chosen speaker impedance. The
feedback and ripple bypass capacitor at Pin 1 should
be chosen for both low-frequency audio rolloff and
supply ripple rejection.
Typical ceramic phono cartridges develop approximately 400 mY. However, the recommended
load impedance for the most economical cartridges
is usually 1 Mil. This poses no problem with the
250 kO input impedance of the ULN-2283B since
the cartridge manufacturer specifies the load impedance for full low-frequency response to less than
40 Hz. Decreasing the load impedance produces an
increased low end cutoff frequency.
Special on-chip considerations for. minimizing
tendencies towards. instabilities of all types were
taken in the design of the ULN-2283B. However,
like all high-gain circuits, care. and forethought
should still be given to a printed wiring board layout
to avoid undesirable effects. Input and output should
be well separated and should avoid common mode
impedances wherever possible. The ground return
for the audio bypass atPin 1 should be kept reasonably close to the volume control ground as Pins 1 and
8 represent the inverting and non-inverting inputs to
the amplifier and enjoy about 40 dB of common
mode rejection.
In a ULN-2283B based application employing a
cost and space conscious loudspeaker, 40 Hz program material capability is not only unnecessary but
undesirable, and therefore a mismatch of the cartridge to increase the lower cutoff frequency to a
value more in keeping with the other components of
the system is recommended.
Device dissipation vs. output power and supply
voltage for 4,8, and 16 ohm loads is shown in the
curves on page 4. With no heat sinking (free air), the
ULN-2283B audio power amplifier will withstand
the worst case conditions(4 nat 9 V) for ambient
temperatures to +42 .5°C. For conditions not shown,
for higher ambient temperatures, or for improved
device reliability, a minimum heat sink is recommended. As illustrated in the allowable package
power dissipation curves, with the heat sink tabs
(Pins 2, 3, 6, and 7) soldered into a 2.5 square inch
(16.13 cm 2 ) copper area of a printed circuit board,
adequate heat sinking is easily obtained.
The ULN-2283B audio amplifier stage has other
input considerations to be taken into account for best
results. The input is referenced to ground for internal biasing and must be provided with a d-c path to
ground. A current of typically 0.1 f.LAflows from
Pin 8 through the volume control producing an IR
drop which is multiplied by the closed loop d-c gain
of the amplifier (1), and appears as an error in output
centering at Pin 4. This recommends a value of
200 kfl or less for the volume control, with values
of less than 100 ill. preferred.
&-18
ULN-3701 ZlTDA2002Z AUDIO POWER AMPLIFIER
ULN-370 1Z/TDA2002
5- to 10-WATT AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
•
•
•
Low External Parts Count
Low Distortion
Class B Operation
Short-Circuit Protected
Thermal Overload Protected
Low Noise
High Output-Voltage Swing
TO-220 Style Package
Direct Replacement for LM383 and CA2002
o
DESIGNED specifically for driving lowimpedance loads down to 1.60, the ULN3701Z/TDA2002 audio power amplifier is. ideal for
automotive radio, tape player, and CB applications
and can deliver 15 W of audio in the bridge configuration or 5 W to 10 W single-ended. Operating in
the extremely harsh automotive environment, these
devices are capable of withstanding high ambient
temperatures, output overloads, and repeated power
supply transient voltages without damage.
The ULN-3701Z/TDA2002 is supplied in a
modified 5-lead JEDEC Style TO-220 plastic package. The heat sink tab is at ground potential and
therefore no insulation is required. Lead forming for
either vertical or horizontal mounting (suffix letter
"V" or "H," respectively) is available on special
order.
t::>
Q.
~
t::>
Q.
~
o
z
::>
0
'"z ;:'"z "''"
;:
"''"> "''">
~.
, '!'
These integrated circuits will be marked with their
U.S. part number unless the European TDA number
is specified on production orders.
t::>
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u
>u
::>
0
z
0
Z
Dwg. No. A-IO,464
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .. , . , , , , . , ' , , , , . , . ' , . , , .. ' , , , , , .. ' , , , , .. ' , ' , , . , , ' , , , , , , ' ,. , , , , , ' , , , . , , , ' , , , , , • 28 V
Peak Supply Voltage (50 ms) , , .. , . , , . , , , , , ,
, , , , , , . " ",."""., .. " " " " " " " " . " , 40 V
Peak Output Curtent, lOUT ." .. " " , . , . " " " " " " " . , . " " , . " " " .. " . " " " " " .. " " " " . " " . 3,5 A
Non-Repetitive Peak Output Current, ' , , , , ' , , , ... , ' , , , .... , , , , , .... , ........ , ..... , .... ' . ' , , , , ' ....... 4,5 A
Package Power Dissipation, Po ,.", .. ,."" ... , ... , ... " " , ... ,." ... " .. " ... ".".", .. ", .. ,." 15 W'
Storage Temperature Range, Ts ' , ' ... , , . , .. , .... , : ..... ' , , ..... , ...... , ....... ' . , ... , ... " -40°C to + 150°C
'Derate at the rate of 0,25 wrc above TTAB
~
90'C
8--19
II
ULN·3701ZlTDA2002AUDIO POWER AMPLIFIER
ELECTRICAL CHARACTERISTICS at TA = 25°C, Vee = 14.4 V, RL = 411, f = 1 kHz
(unless otherwise noted)
...
Characteristic
Symbol
Supply Voltage Range
QuiescentSupply Curre'nt
Quiescent Output Voltage
Open Loop Gain
Closed Loop Gain
Total Harmonic Distortion
Test Conditions
Vee
lec
V.
A.
A.
THD
..•
Audio Power Output
POUT =
POUT =
THD =
THD =
THD =
THD =
POUT =
POUT =
'1
'.
6.4
-
0.05 to 3.5 W
0.05 to 5.0 W, R, = 2 n
10%
10%, R, = 2 n
10%, Vee = 16 V
10%, R, = 2 n, Vee = 16 V
5.2 W
8.0W, R, = 2 n
4.8
7.0
-
Z,
PSR
eN
iN
ein
I nput Saturation Voltage
Frequency Response (-3 dB)
Thermal Resistance
14.4
45
7.2
80
40
0.2
0.2
5.2
8.0
6.5
10
68
58
150
35
4.0
60
15
11
55
50
600
39.5
.
Input Impedance
Power Supply Rejection
I:quiv. Input Noise Voltage
Equiv. Input Noise Current
Input Sensitivity
8-.0
-
POUT
tTlIClency
Typ.
-
No signal applied
No signal applied
70
30
fdool • = 120 Hz, Vdool • = 0.5 V
f = 40 Hz to 15 kHz
f = 40 Hz to 15 kHz
POUT = 0.5 W
POUT = 0.5W, R, = 2 n
POUT = 5.2 W
POUT = 8.0W, R, = 2 n
-
Cfb = 0.D39I'F, Rfb = 391l
40
-
·ein
ReJT
Limits
Max.
Min.
18
80
8.0
-
=
TA
f
•
iI:lO
25·C
1kHz
•
Y
1O"t.
;::
J
6
r£
w
~
o
Il.
...::>
/
/
4
... ~ ~
V-o 2
Il.
::>
- -9
10
V
---
II
SUPPLY
/'"
~
.v
V
12
13
8-20
14
-
-
-
-
15 k
4.0
Z
V'
15
16
W
.W
W
W
%
-
A~/
VOLTS
-
-
"
VOLTAGE, Vee' IN
%
%
-
~"./
V
~
-
TYPICAL OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
10
40.5
V
rnA
V
dB
dB
-
-
17
Units
%
kn
dB
uV
pA
mV
mV
mV
mV
mV
Hz
°C/W
ULN-370 1ZITDA2002AU910:P()WER'AMPLIFIER
TEST CIRCUIT
AND
TYPICAL
APPLICATION
. TYPICAL
LOW-COST'
APPLICATION
INPUT
o
R"-:IOO
0Wg. No. A-IO,465A
Dwg. No. A-I0.466A
II
470
220n
8--21
ULN·3702~DA2002A
12·WATTAUDIO
POWER AMPLIFIER
ULN-3702ZITDA2002A
12-WATT AUDIO POWER AMPLIFIER
FEATURES
• Low EXternal Parts Count
• Low Distortion
• Class B Operatibn:
• Short-Circuit Protected ,
• Therma,1 Overload Pro~ected
• Low Noise
.T()-220 Style Package
ABIUTY:TO DRIVE high-power loads in
THEconsumer
andindustiUli electronics expands the
o
field of application for Type ULN-3702Z /
TDA2002A.
The high-gain power amplifier can be used as a
vertical output driver in television receivers and video
terminals or as a linear doc motor driver. Its
operational-amplifier configuration, with high input
impedance and low output impedance, makes it
adaptable to many input, output and feedback arrangements.
One modification sets this audio power amplifier
apart from Sprague Type ULN -370 lZ ITDA2002:
The integrated circuit's interrial high-voltage shutdown has been disabled. Thethange allows conti\1uous operation with supply voltages of up to 26 V.
With a doc load current rating of 2.5 A, Type ULN3702Z ITDA2002A can handle up to 60 wattS of
power with an appropriate l)eatsin~.It is abIeto
withstand high ambient temperatu'r:~oJltputQv¢r
loads, and repeated power supply trarisients without
'
damage.
. ..
t::>
1;
~
~
Ii
~
;::
0:
~
.
;::
>
~
0
Z
:>
0
o:
co
..
t-
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u
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t-
:::J
0
~
I
Z
0
Z
Dw9- No. A-1O.464
The amplifier is supplied in, a modified five-lead
JEDEC Style TO·220 plastic package. The heat sink
tab is at ground potential; no inSUlation is reqUired.
ABSOLUTE MAXIMUM RATINGS
Special lead configurations for vertical mounting
(ULN-3702ZV) and for horizontal mounting
(ULN-3702ZH) are available on speciai order. Parts
are br,anded with the Sprague Electric part number
(ULN-3702Z) unless PrQ~Electron markihg
(TDA2002A) is requested.
'
Supply Voltage, Vee ........ ,., ................ 28 V
Peak Supply Voltage (50 ms) ..... , ............ , , . 40 V
Peak Output Current, lour ... , . , ....... , , ..... , .. 3.5 A
,Non~Repetitive Peak Output Current ...... " .... , .. 4.5 A
Package Power DiSSipation, Po ..... , ............ 15 W·
Storage Temperature Range, Ts ..... ,', -40°C to + 150°C
·Oerate at the rate of 0,25 W/'C above TTAIj = go'C
.8-22
ULN-3702ZITDA2002A
12-WATT AUDIO POWER AMPLI FIER
ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vee = + 24 V, RL = ao, f = 1kHz
(unless otherwise noted)
..
Limits
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Open loop Gain
Closed loop Gain
lotal Harmonic Distortion
Audi 0 Power Output
Input Impedance
Power Supply Rejection
Equiv. Input Noise Voltage
Equiv. Input Noise Current
Input Sensitivity
Input saturation Voltage
Frequency Response (-3 dB)
Thermal Resistance
Symbol
Vee
Icc
V~
A
Ae
IHO.
POUT
Zj
PSRR
eN
iN
ein
Test Conditions
Min.
8.0
No signal applied
N() signal applied
- 0.05 to.3.5W, R - SO
POUT = 0.05 to 5.0 W, R = 40
THO - 10%, R - an
THO- lQ%, R = 40
... fnDDle = 120 Hz, VnDDle = 0.5 V
f - 40Hz to 15 kHz
f - 40 Hz to 15kHz.
..
POIJl - 0.5W, R = 40
POUT = 0.5 W, Rl = 80
POUT = 8.0 W, Rl = 40
eiri
Clb
-
0.039ILF,
RIb -
-
-
80
39.5
40
0.2
0.2
8.0
12
150
35
4.0
60
15
21
71
600
40.5
390
-
15 k
4.0
-
10
70
30
-
400
40
-
RaJ!
TEST CIRCUIT AND
TYPICAL APPLICATION
Max.
26
120
24
80
12
-
~
!YQ.
Units
V
mA
V
dB
dB
-
%
%
-
-
-
-
W
W
kG
dB
.1:!:.Y
~A
mV
mV
mV
mV
Hz
°C/W
TYPICAL LOW-COST APPLICATION
o
o
INPUT
uwg. No. A-1O,465A
Dwg. No. A-IO,466A
8--23
ULN~3102Z/TDA2002A
12-WATT AUDIO POWER AMPLIFIER
OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
5r----,-----,----,-----r----,-----,----,----,
°1~O~--~12~--~1~4----~16~--~I~B----~20~--~2~2----~24~--~26·
SUPPLY VOLTAGE. Vee. IN VOLTS·
Owg. No. A-ll.4Q9
POWER DISSIPATION
AS A FUNCTION OF OUTPUT POWER
10
/
V
./
- r-
Rl=4S?
~
-...... ~
10"
./
...............
T.=25OC
f'l kHz
Vee = 24V
2
4
6
8
10
OUTPUT POWER. POUT. IN WATTS
8-24
12
14 .
16
Dwg. No. A-ll,410
ULN-3702Z/TDA2002A
12-WATT AUDIO POWER AMPLIFIER
TYPICAL D-C MOTOR DRIVE APPLICATIONS
+
101lFI..
"
--
--
+24 V
+
10 IlFI..
--
-
-
+
10 IlFI
+24 V
VIN
2 kA
10
+24 V
-
k";'I
+12 V
0.,001*
1. 5 kA'
-=Dwg. No. A-H,334A
TYPICAL MOTOR CONTROL CURVE
ow
w
Il..
III
0.::
oIo
~
INPUT VOLTAGE, VIN
Dwg. No. A-ll,411
8-25
#ReQuired for a-c stability
with some loads
....,
...
C
'%
:e.
);oW
.........
.... 0
);o~
C--
C ....
O~
....,
"V 0
00
Vee
l.
l
La
Q;"
f~8
K
0
?~20
l..
Q16,A
QI}-I
2.ZK
87 Sl
'A ~IZV
13K
Qii
;;-J
..
35K
150K
r
2K
2K
300Sl
Q6
Q7 360
SI
360 Q8
SI
Q9
IK
~r
QIO
""
1.4K
1.9K:
'.j~6V
1.9K
f--T~~~.
,,*~1
c:
c:
~
on
'"'" '"
0
0
c:
62.K
J
OUTF
~
Q19~24
180Sl
11K
17K
3
GROUND
~
-.GROUND
I'
NON-INVERTI NG
INPUT
::a
84Sl
Q~
QII
~~
13K
300Sl
5.3K
1Q5
3:
'"
300Sl
" '• • ~
INVERTING
INPUT
SCHEMATIC
".
..
4'~ . .
);0
"V
~
....
~Ir
0
0
I!
~
::a
....
;;;
VaZ3
c:
Q~
35K
0">
~I
.
~t
')
:t
~
\;
ULN-3703Z / TDA2003 AUDIO POWER AMPLIFIER
ULN·3703Z / TDA2003
10-WATT AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
•
•
Low Extema I Parts Count
LoW Distortion
Class B Operation
Short-Circuit Protected
Thermal Overload Protected
Low Noise
High Output-Voltage Swing
TOc 220 Style Package
DESIGNED to drive low-impedance loads down
to 1.60, Type ULN c3703Z / TDA2003 audio
power amplifier is ideal for automotive radio, tape
player, and CB applications and can deliver 15 Wof
audio in the bridge configuration or 5 W to 10 W
single-ended:
Operating in the harsh automotive environment,
this device is capable of withstanding high ambient
temperatures, output overloads, and repeated power
supply transient voltages without damage. It is
protected against a-c/d-c short-circuits, polarity inversions, or open grounds.
Type ULN-3703Z/TDA2003 is supplied in a
modified five-lead JEDEC Style TO-220 plastic
package. The heat sink tab is at ground potential; no
insulation is required. Lead forming for either vertical or horizontal mounting (suffix letter "V" or
"H," respectively) is standard.
These integrated circuits will be marked with their
Pro-Electron registrations (TDA2003H or
TDA2003V) unless U.S. part-number marking is
specified on production orders.
o
II
ABSOLUTE MAXIMUM RATINGS
..
l-
:>
Supply Voltage, Vee ........................... 28 V
Peak Supply Voltage (50 ms) .................... 40 V
Peak Output Current, lOUT' ....... , .............. 3.5 A
Non-Repetitive Peak Output Current ............... 4.5 A
Package Power Dissipation, PD •••••••••••••••••• 20 W'
Storage Temperature Range, Ts ........ -40°C to + 150°C
'Derate at the rate of 0.33 W;oC above TTAB
~
i!!
fi
;:
a:
>
I-
e
z
I-
11.
:>
0
11.
t:>
0
:>
i!!
(!)
z
;:
:>
a:
(!)
u
>u
a:
'" '">~
.~
,
z
0
Z
+90'C
8---27
Dwg.
'0.
A-IO,464
ULN-3703Z / TDA2003 AUDIO POWER AMPLIFIER
ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = + 14.4 V, RL = 40, f = 1 kHz
(unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Open Loop Gain .
Closed Loop Gain
Total Harmonic Distortion
Audio Power Output
Efficiency
Input Impedance
Power Supply Rejection
Equiv; Input Noise Voltage
Equiv.lnpufNoise Current
Input Sensitivity
Symbol
Vcc
Icc
V4
A.
A.
THO
POUT
'Y/
Test Conditions
No signal applied
No signal applied
POUT
POUT
THO
THO
THO
THO
POUT
POUT
= 0.05 to 4.5 W
= 0.05 to 7.0 W, RL = 20
= 10%
ZI
PSR
eN
iN
ein
Input Saturation Voltage
Frequency Response (-3 dB)
ein
Thermal Resistance
RelT
f'iDDI. = 120 Hz, VriDDI• = 0.5 V
f - 22 Hz to 22 kHz
f = 22 Hz to 22 kHz
POUT - 0.5 W
POUT - 0.5 W, RL = 20
POUT = 6.0 W
POUT = lOW, RL = 20
Cfb
Typ.
8.0
44
6.9
80
40
0.15
0.15
6.0
7.5
10
12
69
65
150
36
1.0
60
14
10
55
50
-
6.1
39.5
-
5.5
RL = 3.20
RL = 20
= 10%, RL = 1.60
= 6.0 W
= 10 W, RL = 20
= 10%,
= 10%,
= 0.039 !LF, RIb = 390,
POUT = 1.0 W
-
9.0
-
-
70
30
-
300
40
-
o
TEST CIRCUIT
AND
TYPICAL
APPLICATION
INPUT
Dwg. No. A-10,465A
8---28
Limits
Max.
Min.
-
-
18
7.7
40.5
-
-
-
-
-
-
-
5.0
200
-
-
-
15 k
3.0
Units
V
mA
V
dB
dB
%
%
W
W
W
W
%
%
kO
dB
!LV
pA
mV
mV
mV
mV
mV
Hz
°C/W
t:JLX·3777WDt:JAL lO·WATT AUDIO POWER AMPLIFIER
ULX-3777W ...
DUAL lO-WAn AUDIO POWER AMPLIFIER
FEATURES'
•
•
•
•
•
•
High:Voltag~ Pro ec
Operating. Voltage
Thermal Shutdown
loW Distortion
Excellent Channel Separation
Replacement for HAI377A
Dwg. No.A.ll,332
DELIVERING up to 10 watts per channel in
low impedance loads, Type ULX-3777W
designed for the demanding domain of
automobile stereo sound systems.
This monoli' hi<.: integrated circuit carries
built-in protection from temporary high
voltages, automotive transients and excessive
power dissipation.
An internal voltage regulator allows amplifier
operation with power supply levels between 8.0
and 18 V. As supply voltages . exceed that maximum, a protective circuit shuts down the device
until the supply level falls below the 18 V limit.
Frequency response of Type ULX-3777Wis
flat from 40 Hz to 25 kHz. Channel separation is
typically 58 dB.
"
Type ULX-3777W is supplied in a 12-pin
single in-line power tab plastic package that permits dissipation of up to .18 W.
ix to the part number denotes an integrated
in dev~/ofJment and undergoing engineerwhen the device becomes a production
be changed to ULN. Sprague Electric
future manufacture of any prodment unless such obligation is
iting by authorized Sprague
Supply Voltage, Vcc= 300
.....
...--
V>
z
~200
x
:3
OFF,
t!
u.
1
R.P.I
1
MAGNETIC FLUX DENSITY IN GAUSS
~OINT
.
",..,..- ~P\CA\.RE
Vee ~ 4.5V
100
o
~_~'~::+.:::~~~
L_~100__200
300
400
500
600
00
POINT
-50
-25
+25
+50
+75 +100 +125 +150
TEMPERATURE IN °e
Dwg:. No. A-ll,D04
Owg. No. A-9015C
These Hall effect devices are also available in a miniature 3 -pin plastic
"U" package. The "T" package is 0.080" (2.03 mm) thick; the "U"
package is 0.061" (1.54 mm) thick. All other dimensions are identical.
9-6
UGN-3020T and UGS-3020T
HALL EFFECT DIGITAL SWITCHES
UGN·3020T and UGS·3020T
SOLlD·STATE LOW-COST HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•
•
Operate from 4.5 V to 24 V D-C Power Source
Operable With a Small Permanent Magnet
High Reliability-Eliminates Contact Wear, Contact Bounce
No Moving Parts
Small Size
Constant Amplitude Output
Output Compatible With All Logic Families
Dwq. NO. A-ll.OO2
THE TYPE UGN-3020T and UGS-3020T are lowcost magnetically-activated electronic switches
utilizing the Hall effect for sensing a magnetic field.
Each circuit consists of a voltage regulator , Hall cell,
signal amplifier, Schmitt trigger, and current sinking
output stage integrated in a single monolithic silicon
chip.
FUNCTIONAL BLOCK DIAGRAM
These devices are packaged in the 3-pin single output. plastic "T" pack.
These devices were originally introduced with ULN
and ULS prefixes.
The on-board regulator permits stable operation
over a wide variation of supply voltages. Operation
over an extended temperature range is made possible
by the careful matching of components which can be
done economically only on a monolithic circuit.
Both devices will typically operate up to a 100 kHz
repetition rate.
ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ............................. 25 V
Magnetic Flux Density, B..................... Unlimited
Output "OFF" Voltage, VOUTlom ............ , ....... 25 V
Output "ON" Current,I~NK . '.................... 25 mA
Storage Temperature Range, Ts ........ -65°C to + 150°C
Operating Temperature Range, TA
UGS-3020T ..................... -40°C to + l25°C
UGN-3020T ........................ O°C to + 70°C
The circuit output can be interfaced directly with
bipolar or MOS logic circuits.
ELECTRICAL CHARACTERISTICS at Vee = 4.5 V to 24 VDC, TA = +25°C
Characteristic
Magnetic Flux Density
"Operate Point"
"Release Point"
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current
Symbol
Bo,
BRP
BH
VSAT
10FF
Icc
Output Rise Time
t,
Output Fall Time
tf
Test Conditions
Min.
50
20
B 2: 350 Gauss, ISINK = 15 rnA
B :$ 50 Gauss, VOUT = 24 V
Vee = 4.5 V, output open
Vee = 24 V, output open
Vee = 12 V, Rl = 820 n,
Cl = 20 pF
Vee 7 12 V, Rl = 820 n,
C =20 pF
9-7
-
Limits
Typ.
220
165
55
85
Max.
Units
350
5
6
15
-
Gauss
Gauss
Gauss
mV
/LA
rnA
mA
ns
100
-
ns
OJ
400
20
9
14
o
UGN-3020T and UGS-3020T
HALL EFFECT DIGITAL SWITCHES
OPERATION
The output transistor is nonnally "off" when the
magnetic field perpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," the
output transistor switches "on" and is capable of
sinking 25 rnA of current. Selections to 50 rnA are
available.
The output transistor switches "off" when the
magnetic field is reduced below the' 'release point"
which is less than the "operate point." This is
illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at the pole
surfaces.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss.
The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" ±0.002" (0.81 ±0.05 mm)
below the branded surface of the T package and
0.012" ±0.002" (0.30 ±0.05 mm) below the
branded surface of the U package.
The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet of 0.031" (0.79 mm).
For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
Note: Switching point variations with temperature should be considered in applications covering a
wide temperature range.
SWITCHING POINT VARIATION WITH TEMPERATURE
TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
600
12 1"--=,,-,.---,
,0. P.
I
,I
, :1'ON
,I
,I
,
500
V>
I
~ 400
~
>- 300
l-
V>
Z
:=:
200
x
:3
Uo
100
o-50
--- --25
11
I
-
l'IPICAL OPERA1E POIN1
L
CAt [RELEASE POI N1
I
I
OFF I
Ii
VCC =4.5V
o
R. Pj
oL-~~~~~~~.
o 100 200 300 400 500 600
I
+25
+50
TEMPERATURE IN
+75
°c
+100
+125 +150
MAGNET! C FLUX DENSITY I N GAUSS
Dwg. No. A-l1,Oll
Dwg. No. A-ll.OlO
These Hall effect devices are also available in a miniature 3 -pin plastic
"U" package. The "T" package is 0.080" (2.03 mm) thick; the "U:'
package is 0.061" (1.54 mm) thick. All other dimensions are identical.
9-8
UGN-3030T and UGS-3030T
LOW-COST BIPOLAR HALL EFFECT DIGITAL SWITCHES
UGN-3030T and UGS-3030T
LOW-COST BIPOLAR HALL EFFECT DIGITAL SWITCHES
fEATURES
•
•
•
•
•
Operable With Inexpensive Multi-Pole Ring Magnets
High Reliability- Eliminates Contact Wear, Contact Bounce
No Moving Parts
Small Size
Constant Amplitude Output - Compatible With All Digital
Logic Families
UGN-3030T and UGS-3030T solid-state
T YPE
switches are designed for use with inexpensive
multi-pole ring magnets. Both switches operate
within the magnetic field range of +250 to -250
Gauss.
Dwg. NO. A-ll,002
FUNCTIONAL BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
The UGN-3030T operates over the temperature
range ofO°C to + 70°C with supply voltages (Vcc)of
4.5 to 24 V.
The UGS-3030T, intended for more severe automotive environments, operates from -40°C to
+ 125°C.
Power Supply, Vcc ............................ 25 V
Magnetic Flux Density, B .................... Unlimited
Output OFr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .. 25 V
Output ON Current, ISINK ....................... 25 mA
Storage Temperature Range, Ts ........ -65°C to + 150°C
Operating Temperature Range, TA
UGN-3030T ..... . . . . . . . . . . . . . . . . . . . O°C to + 70°C
UGS-3030T ..................... -40°C to + l25°C
Circuit output can be interfaced directly with bipolar or MOS logic circuits. These switches provide a
constant amplitude output at frequencies to
100 MHz.
Type UGN-3030T and UGS-3030T switches are
supplied in a rugged 3-pin plastic 'T' pack.
These Hall effect devices are also available in a
miniature 3-pin plastic "U" package. The "T'
package is 0.080" (2.03 mm) thick; the "U" package is 0.061" (1.54 mm) thick. All other dimensions
are identical.
ELECTRICAL CHARACTERISTICS at Vee = 4.5 V to 24 VDC, TA == O°C to + 70°C (UGN-303OT)
at Vee ==: 4.5 V to 24 VDC, TA = -40°t: to + 125°C (UGS-3030T)
Characteristic
"Operate !'oint'"
"Release Point"
liysteresis
Output Saturation Voltage
Output Leaka2e Current
Supply Current
Output Rise Time
OUlput Fa II Ti me
Symbol
B
Test Conditions
Bop
BH
VSAT
10 f
Icc
Ir
tf
B ~250 Gauss, ISWK = 15 mA
B .;; -250 Gauss
Vrc = 4.5 V, output ooen
UGN-3030T V" = 16 V, output open
UGS-3030T Vcc = 24 V, output open
Vcc = 12 V, Rl = 820 n, Cl = 20 pF
Vcc= 12 V, Rl = 820 n, Cl = 20 pF
Min.
-250
20
-
-
Typ.
160
110
50
85
0.1
4.5
5.5
6
15
100
Max.
250
-
400
-20
9
12
13
-
-
Units
Gauss
llauss
Gauss
mV
!LA
mA
mA
mA
ns
ns
'Magnetic flux density is measured at most sensitive area of device located 0.032" ±0.002 (0.81 ±0.05 mm) below the branded face ofthe Tpackage and 0.012" ±0.002"
(0.30 ±0.05 mm) below the branded surface of the Upackage.
9-9
II
UGN·3030T and UGS·3030T
LOW~COST BIPOLAR HALL EFFECT DIGITAL SWITCHES
OPERATION
The output transistor is nonnally OFF when the
magnetic field perpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," the
output transistor switches ON and is capable of sinking 25 rnA of current.
Selections to 50 rnA are
available.
The output transistor switches OFF when the
magnetic field is reduced below the "release point"
which is less than the "operate point. " This is illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.
TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
I
12V
c:;
I
o
I
>
::=
- -- lO.P.
I
I
Vl
+12V
OFF:
0.:
I
0.:
d
oi
--'
--'
-
0::
>-
~
I
~
MIN.'
R.p.L
-300
-200
-100
H NORTH POLE
+100
GAUSS
I
ION
~
:: l
'om
+200
+300
SOUTH POLE (+1
MAGNETIC FLUX DENSITY
Owg. No. A-11,040
The simplest fonn of magnet which will operate
the Hall effect bipolar digital switch is a multiple
pole ring magnet as shown. Such magnets are commercially available and are quite inexpensive.
The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" .±0.002" (0.81 ±0.05 mm)
below the top surface of the Tpackage and 0.012"
±0.002" (0.30 ±0.05 mm) below the top surface of
the U package. The magnetic circuit must provide a
+250 Gauss to -250 Gauss magnetic flux density
range at this point for all conditions to insure reliable
operation; + Gauss illdicates the South pole is toward the branded face of the package; - Gauss
indicates the North pole is toward the branded package face.
BASIC MODES OF ACTIVATION USING A
MULTIPLE-POLE RING MAGNET
NOTE: A rotary magnet may be constructed with poles either on the rim (axial) or on the face
(radial) but not both.
9-10
UGN-3040T
ULTRA;SENSITIVE HALL EFFECT DIGITAL SWITCHES
UGN-3040T
ULTRA-SENSITIVE HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•
Operate from 4.5 V to 24 V D-C Power Source
Operable With Small Permanent Magnets
Solid-State Reliability - No Moving Parts
Small Size
Constant Amplitude Output
Output Compatible With All Digital logic Families
THE SPRAGUE TYPE UGN-3040T is a
magnetically-activated electronic switch with
extreme sensitivity for use with small, inexpensive magnets, or with relatively large magnet-toswitch distances.
Each circuit consists of a voltage' regulator,
Hall voltage generator, signal amplifier, Schmitt
trigger circuit, and an open collector output
driver integrated in a single silicop. chip.
The on-board regulator permits operation
over a wide range of supply voltages. Circuit
output can be interfaced directly with bipolar or
MOS logic circuits, and will typically operate up
to a 100 kHz repetition rate.
o.g. NO. A-ll.OO2
FUNCTIONAL BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ............................. 25 V
Magnetic Flux Density, B.................... Unlimited
Output "OFF" Voltage, VOUT(OFf) .................. 25 V
Output "ON" Current, ISINK .................... 25 mA
. Storage Temperature Range, Ts ........ -65°C to +150°C
Operating Temperature Range, TA .......... O°C to +70o C
The UGN-3040T is packaged in a miniature
3-pin single-output plastic "T'; pack.
ELECTRICAL CHARACTERISTICS at Vee
Characteristic
Magnetic Flux Density
"Operate Point"
"Release Point"
.,
Hysteresis
Output Saturation Voltage
Output leakage Current
Supply Current
Output Rise Time
Output Fall Time
=
4.5 V to 24 VDC, TA
Symbol
Bop
BRP
BH
VSAT
. IOFF
Icc
t~
t,
=
+25°C
Test Conditions
Min.
limits
Typ.
Max.
Units
-
150
200
Gauss
. liauss
Gauss '
mV
50
20
B~200
Gauss, ISINK:" 20 inA'
BoS 50 Gauss, VOUT - 24 V
Vee - 4.5 V, output open,
Vee - 24 V, output open
. Vee = 12 V, RL = 820Q,
CL=20pF
Vee - 12 V, RL = 820 Q,
CL=20pF
9-11
-
85
-
0.1.
,,'-
-
-
IUU
·50
400
20
!AA
-
,rnA
mA
ns
.-
ns
9
14.
5
6
15
"
-
100
II
UGN"3040T
ULTRA-SENSITIVE HALL EFFECT DIGITAL SWITCH
GUIDE TO INSTALLATION
1. All Hall effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell, heat sink the leads
during hand soldering. For wave soldering, the part should not experience
more than 230°C for more than five seconds and solder should be no closer
than 0.125" to the epoxy package.
SWITCHING POINT
AS A FUNCTION OF TEMPERATURE
250
'" 225
~200
;!!:175
~15O
is
Q
x
125
2 UXl
u
;::: 75
!it!
i
50
25
-- --1,..000
- ""'"
!"""" ~
~
!""""
lTv, ,rll
!"""'"
!""""
I--'"
~o,
A
l~PICAl Rlll,;O.. ~ I-'"
..... ~
~
~
-""..
i.ooo" ~
!""""
~
"",.
25
TEMPERATURE IN DC
50
70
Dwg. No. A-l1,198
These Hall effect devices are also available in a miniature 3 -pin plastic
"U"package. The "T" package is 0.080" (2.03 mm) thick; the "U"
package is 0.061" (1.54 mm) thick. All other dimensions are identical.
OPERATION
The simplest form of magnet which will
operate the Hall Effect· digital sensor is a bar
magnet as shown. Other methods are possible.
~-
In the illustration, the magnet's axis is on the
center line of the packaged device and the
magnet is moved toward and away from the
device. Also, note the orientation of the
magnet's south pole in relation to the branded
face of the package.
Dwg. No. A-ll ,200
BASIC 'HEAD·ON' MODE OF OPERATION
9-12
UGN-3040T
HALL EfFECT· DIGITAL SWITCHES
ULTRA~SENSITIVE
SENSOR CENTER LOCATION
r·'
~l~
0.092
TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
12
0.1lI6
2.1~
Dii
1------.----,
r-----7-,
1
SENSOR
,
,,I
!
1
+12V
I
I
."
0.178
,,'
$Lv~,
rl
• DOT
CENTER
c.: 1
",I
no
.
.....1
51
I
;;:1
l'~·~~~;='~T£~~~--r--~--r--~";-r-~.~
~I
I
I
,
I
25
INCH
MM
50
75
100 125 150
175 200
MAGNETIC FLUX DENSITY IN GAUSS
Owg. No. A-11,J99
OPERATION
(Continued)
The output transistor is normally "off" when
the magnetic field perpendicular to the surface
Of the chip is below the threshold or "operate
point." When the field exceeds the "operate
point," the output transistor switches: "on"and
is capable of sinking 25 rnA of cufrenf. A 50 rnA
unit is available upon special order.
The magnetic flux density is indicated for the
most sensitive. area of the device. This area is
centrally located 0.032" ±0.005" (0.81
± O.127mm) below the b~anded surface of the
T package andO,012±O.005,i (0.30 ±0.127 mm)
belowtbe branded surface, of the U package.
A variety of,; magnets . are coriunetcially
available, each ';exhibiting unique field
characteristics. The curves presented belOw are
flux density values for the magnets measured for
switchactivatiori inahead.on mode (along the'
magnet axis). The curves are also pertinent for
peak flux density for a given clearance in the
slide-by mode of actuation.
The OQtp\lttransistor switches"off" when
the mJignetic field is reduced below the "release
point" which is less than the "operate poinL~'
This is illustrated graphically in the transfer
characteristics curve. The ' hystereSis
characteristic proVidesfor'unambiguous or nonoscillatory switching.
FLUX DENSITY AS A FUNCTION OF AIR GAP
m.250': CU BE, RU BBER
(21.1" x .1" x . 125" "'SAMARIUM COBALT
. (3).212"0 x .187" L,' AL,NI C08 '
(4) .240" D x . 4OQ" L,CERAMI C
(5) ::f88" CU BE, SAMARIUM COBALT
(6) .250" CU BE, SAMARIltM~cbBALT
II
~
,..
.'",>
Vi
',3
c
'X
.•..~ 1.00 t------;-~;:--~~:----"'~-+---'~-'7"-+""""I;;;;;:'"'"-~+_~~-___"_I
u·'
~
~:
0.1
0.2
0.3
AIR GAP IN INCHES
,9--13
F(,1i
0.4
0.6
0.5
Dwg. No.
~-1446
UGN-3201M and UGN-3203M
DUAL-OUTPUT HALL EFFECT DIGITAL· SWITCHES
UGN·3201 M and UGN·3203M
DUAL OUTPUT HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•
Operate from 5 V to 16 V D-C Power Supply
Operate With a Small Permanent Magnet
High Reliability - No Contact Wear or Bounce
Small Size - 8-Pin DIP
Constant Amplitude Output
Dual Open-Collector Outputs
INTENDED for use in position sensing and contactless switching applications, the Types UGN3201Mand UGN-3203M switches utilize the Hall
Effect for detecting a magnetic field.
Both devices feature identical electrical and environmental charact\!ristics. However, the UGN3201M has a typical Operate Point of 450 gauss and
Release Point 'of 300 gauss; the UGN-3203M is
more sensitive, with a typicalOperate Point of 235
gauss and Release .Point of 100 gauss. The UGN3203M may be activated by smaller magnets, or at a
greater magnet-device spacing.
The UGN-3201M and UGN-3203M Hall Effect
digital switches are suppl;ed in 8-pin dual in-line
plastic packages. These switches were originally
introduced as device numbers ULN-3006M and
ULN-3007M, respectively.
ELECTRICAL CHARACTERISTICS at Vee
Characteristic
"Operate Point"
"Release Point"
Hysteresis
"Operate Point"
"Release Poi nt"
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current
Symbol
Bop
BRP
BH
Bop
BRP
BH
VSAT
IOFF
ICC(1)
IcC(o)
=
12 VDC, TA
Dwg. No. A-ll.013
FUNCTIONAL BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ............................. 20 V
Magnetic Flux Density, B .................... Unlimited
Output "OFF" Voltage, VOUI(OF~ .................... 20 V
Output "ON" Current, ISINK , .................... 25 mA
Storage Temperature Range, Ts ...... -65°C to + 150°C
Operating Temperature Range, TA ...... O°C to + 70°C
= +25°C
Test Conditions
UGN-3201M
UGN-3201M
UGN-3201M
UGN-3203M
UGN-3203M
UGN-3203M
B ;::: 350 Gauss, ISINK = 20 mA
B ::::;25 Gauss, VOUT = 12 V
B ::::; 25 Gauss, outputs open
B ;::: 350 Gauss, outputs open
9-14
Min.
-
100
-
25
-
Limits
Typ.
Max.
450
300
150
235
100
135
750
-
400
100
25
25
20
20
-
350
-
Units
Gauss
Gauss
Gauss
Gauss
Gauss
Gauss
mV
lolA
mA
mA
UGN-3201M and UGN-3203M
DUAL-OUTPUT HALL EFFECT DIGITAL SWITCHES
GUIDE TO INSTALLA nON
1. All Hall effect integrated circuits are
susceptible to mechanical stress effects. Caution
should be exercised to minimize the application
of stress to the leads or the epoxy package.
2. To prevent permanent damage to the Hall
cell I.C., heat sink the leads during hand
soldering. For wave soldering, the part should
not experience more than 230°C for more than 5
seconds and no closer than 0.125" to the epoxy
package.
'M' PACKAGE
DIMENSIONS IN INCHES
INDEX (PINtDNOO
I.)
4 3 2 1
1-1-
0.085
"'--_=]fJ1
1- T
~~.--
0.310
0.290
6' 7
~.~g
,
~~.-
~
_.L
8
NSSN.O'I)
4 :3 2 1
--r-
0 •. 375
0.325
.
j
5
INDEX. (PI
±0.:5
~ c'
~
DIMENSIONS IN MILLIMETRES
Based on 1 in. = 25.4 mm
-r-3fJT
7.87
7.37
2.16
_±O.13
_
L__
5
0,015
1-1-
I\
6 17
8
0.38
0,.20
0.008
r-
0.125 Gt,(J-{HHle......:LMAXOoOl5
SEATING PLANE
9.53
8.26
__-*-
,"f)---Q-I,Kl~*--- SEATING PLANE
MIN
MIN
0,58
0.38
2.54± 0.25 NON-CUMULATIVE
7.62:1: 0.25 @' SEATING PLANE
O.100·±O:010 NON- CUMULATIVE
0.300 ±D.OIO
SEATING PLANE
0..'(,. MO. A_9000AIM
O'IIG. NO. A-9000A "-I
9-15
UGN-3201M and UGN-3203M
DUAL-OUTPUT HALL EFFECT DIGITAL SWITCHES
OPERATION
The output transistors are nonnally "off" when
the magnetic field perpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," the
output transistors switch "on" and will each typically sink 20mA.
The output transistors switch "off" when the
magnetic field is reduced below the' 'release point"
which is less than the "operate point." This is
illustrated graphically in the transfer characteristic
curves. The hysteresis characteristic provides for
unambiguous or non-oscillatory switching regardless of the rate of change of the magnetic field.
For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at its surface.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss (0.032" below the package surface).
The magnetic flux density is indicated for the
most sensitive area of the device. This area is centrally located and 0.037" ±0.001" (0.94 ±0.05
mm) below the top surface of the package.
The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet of 0.031" (0.79 mm).
TYPICAL TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
TYPE UGN-3201M
~
~
0> 12
:
Z
- 9
(5
a
>
~
3
is
0
~
I
I
-<
~ 6
~
IO.P.
toI
I
~:
I
I
I
I
R.P.:
0 100 200 300 400 500 600
MAGNETIC FLUX DENSITY
IN GAUSS
~12
>
z
:
9
o>
§
::>
a
6
--:
,,
t;
I
3
I
0
'HEA~-ON'
MODE OF OPERATION
TYPE UGN-3203M
I
I
0
;0
BASIC
R.P.I
a.p.
I
I
I
I
I
~:
I
I
I
I
I
I
+ 12V
~
:
z
Your
,
1
MAGNETIC FLUX DENSITY
IN GAUSS
t>1¥G.
-~:
,
MO. A-IO.307
ll"'G. N
600
Owg. No. ·A~ll~OO6
9-18
UGN-3S01M
SOLID-STATE LINEAR HALL EFFECT SENSORS
UGN-3501M
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSORS
FEATURES
•
•
•
•
Excellent Sensitivity
Flat Response to 25 kHz (typ.)
Internal Voltage Regulation
Excellent Temperature Stability
UTILIZING THE HALL EFFECT for sensing
a magnetic field, Type UGN-3501M ICs provide a
linear differential output which is a function of
magnetic field intensity.
GND
These devices are intended for. applications
requiring accurate measurement and/or control of
position, weight, thickness, velocity, etc.
DWG. MO.
The Type UGN-3501 M Hall Effect IC includes a
monolithic Hall cell, linear differential amplifier,
differential emitter follower output, and a voltage
regulator. Integrating the Hall cell and the amplifier
into one monolithic device minimizes problems
related to the handling of millivolt analog signals.
Supply Voltage, Vce ...
Output Current. lOUT
Magnetic Flux Density, B ..
Operating Temperature Range, TA ..
Storage Temperature Range, TS.
ELECTRICAL CHARACTERISTICS at Vee = 12 VDC. TA
Operating Voltage
Supply Current
Output Offset Voltage
Output Common Mode
Voltage
'. Sensitivity
Sensitivity
Frequency Response
Broadband Output Noise
Output Offset Voltage
vs T(OC)
=
Symbol
Vee
Ice
VOFF
Vcc - 16V
B = 0 Gauss, R-S-6-7 = OQ
IIVOFF/ liT
~26~
. +16V
..... 2mA
. . No Limit
. . O°C to +70°C
. . -65°C to + lSO°C
+25°C (unless otherwise specified)
.Test Conditions
VCM
llVOUT
IIVOUT
f(-3dB)
en
10.
ABSOLUTE MAXIMUM RATINGS
Provisions are included for output offset null.
This sensor is supplied as a 8-pin dual in-line plastic
package and is rated for continuous operation over
the temperature range of O°C to + 70°C and a
voltage range of 8 to 16 volts d-c.
Characteristic
~
FUNCTIONAL BLOCK DIAGRAM
B = 0 Gauss
B = 1000 Gauss, RS-6-7 = OQ
B = 1000 Gauss, RS-6 = ISQ
R5-6-7 - OQ
3dB B.W. 10 Hz to 10kHz
RS-6-7 = OQ
RS-6-7 = OQ
Min.
Typ.
Max.
Units
8.0
10
100
16
18
400
V
mA
mV
-
-
V
mV
mV
kHz
mV
1
1,2
-
3.6
1400
1300
2S
O.IS
-
-
0.2
-
mV/oC
-
700
6S0
Notes
1
1.2
NOTE 1. All output voltage measurements are made with a voltmeter having an input impedance of 10 kQ or greater and a common mode reiection ratio greater than 60 dB.
2. Magnetic flux density is measured at the most sensitive area of the device. which is on the top center. 0.037 ±0.001" (0.94 ±0.03mm) below the surface.
9-19
II
UGN·3S01M
SOLlD·STATE LINEAR HALL EFFECT SENSORS
NORMALIZED SENSITIVITY
AS A FUNCTION OF VCC
NORMALIZED SENSITIVITY
AS A FUNCTION OF TEMPERATURE
1.00
~
........-
,/
5
-
Vee'" 12 V
......
B '" 1000 GAUSS
r......
1.00
R
5-6 =15-A.
~
./
0.95
Rl
.....
r......
/
J
0.90
B" 1000 GAUSS
TA " 25°C
V
..... ..........
0.95
-
">
101u-..
......
_
.
R5-6-7=O
Rl "Z101w-..
I I
0.85
12
10
14
Vee (VOLTS)
1)'11(,
~O.
~-IO.
0.90
16
o
25
TEMPERATURE (DC)
50
75
D1\'(;. MO.
A-IO.~30
,29
RELATIVE OUTPUT VOLTAGE
AS A FUNCTION OF LOAD RESISTANCE
OUTPUT VOLTAGE
AS A FUNCTION OF MAGNETIC FLUX DENSITY
2.50',---r--,---.--,---,---.--::_""::;"
Vee
.. 12V
Vee = 12V
B
;: 1000 GAUSS
TA '" 2So,
TA
RS_6
"'2Soc
2.00
-Is.".
Rl'" 10 Iu,. -+--+--+-~r".~+---+--:-i
1.0
0.8
0.6
-I~
..""'.'
Alternotive O\Jlput
Circuit for Low /
Impedonce loads
0.4
o. 2
o
/'
:::.100
V'
V
200
L
~~
.... ~~
1.501--+---t---t---,fSI"
/
I~?
II
1.0°1--+---t;tr-t--;;'F--+--+--t-----i
t
500
IK
2K
LOAD RESISTANCE (OHMS)
O;501--~<-:"""=----l--+--+_,_-+--t-----i
5~
10K
800
1200
1600
2000
FLUX DENSITY (GAUSS)
9-20
2400
2800
3200
UGN-3S01M
SOLID-STATE LINEAR HALLEFFECl SENSORS
OUTPUT VOLTAGE
AS A FUNCTION OF AIR GAP
,
14
.-
ALN,cl :szm Rt MAJNE~
vc~
TA
',..,
0.212" Oiarllefer
of'.
"-f'
...
•
,Iv
~ 2sOC
12
",15 .... -
R1 ~ lkA
O.l87'length
2
.80
NOISE SPECTRAL DENSITY
10
~
~I'
UGN-3501M
......
~
-- t"- r-..
1'0.
.08
.06
.10
.12
AIR GAP 0, (INCHES)
.J<
.....
Vee -12 vom
i'~
r---.
r-o
0
.0<
~
--rlfE',=
.20
.02
\
.18
.20
.16
OW9. No. A-10,531A
100
10
TA : 25°C
R5 - 6 - 7 =On.
1900
10000
FREQUENCY IN Hz
GUID~
TO INSTALLATION
1.. All Hall Effect integrated circuits are susceptible to mechanical stresseff¢cts .. Cautiortshould be
exercised to minimize the application of stress to the
leads or the epoxy package.
put leads if possible. In'some cases, it may be 'more
practical to limit the frequency response with an output .RCnetwork'toprevent 'oscillatiqn:
.
2. To prevent permanent damage to the Hall cell
IC, heat sink the leads during hand soldering. For
wave soldering, the part should Qot experience more
than 230°C for more than 5 seconds and no closer
than 0.125" to the epoxy package.
3. If a zeroing potentiometer is used •. minimize
lead lengths from It and isolate these leads from out-
01<'01.1'10,'0\0010.536
DIMEN510NSIN INCHES
DIMENSIONS IN MILLIMETRES
Based 'on I in. = 25.4 mm
INDEJ(.(PIN~NO'I).
4
--r-
32 1
.
8:j3!
't~.5
6
INDEX
4
.--r'
-r6.50
0.310
0.290
~
..L __
1
..
6',7" 8
0.20
g'
0M/>..I25X
3 2
't~.-
5
7' &.
D
(PI.NS~O'I)
,.:
.t. IH-i:HHt=.....L-,-,SEATING PLANE
0.015
':lIN
0023
.~.·MO.A-.9000ANM
9---21
UGN-3S0lT
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSORS
UGN·3501T
SOLlD·STATE LINEAR OUTPUT HALL EFFECT SENSORS
FEATURES
•
•
•
•
Excellent Sensitivity
Flat Response to 25 kHz (typ.)
Internal Voltage Regulation
Excellent Temperature Stability
UTILIZING THE HALL EFFECT for sensing
a magnetic field, Type UGN-3501T integrated circuits provide a linear single-ended output which is a
function of magnetic field intensity.
FUNCTIONAL BLOCK DIAGRAM
These devices are used principally to sense
relatively small changes in a magnetic field changes which are too small to operate a Hall effect
switching device. They are customarily capacitively
coupled to an amplifier, which boosts the output to a
higher level.
The Type UGN-3501 T Hall Effect IC includes a
monolithic Hall cell, linear amplifier, emitter
follower output, and a voltage regulator. Integrating
the Hall cell and the amplifier into one monolithic
device minimizes problems related to the handling of
millivolt analog signals.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC ........................... + 16V
Output Current, lOUT ........................... 4mA
Magnetic Flux Density, B ...................... No Limit
Operating Temperature Range, TA ............ O°C to +70°C
Storage Temperature Range, TS ............ -65°C to +150°C
These Hall effect devices are also available in a
miniature 3 -pin plastic "U" package. The "T"
package is 0 .080/1 (2.03 mm) thick; the "U" package is 0.061" (1.54 mm) thick. All other dimensions
are identical.
This sensor is supplied a a 3-pin plastic package
and is rated for continuous operation over the temperature range of O°C to + 70°C and a voltage range
of 8 to 12 volts doc.
ELECTRICAL CHARACTERISTICS at Vee
Characteristic
Symbol
Operating Voltage
Supply Current
Quiescent Output Voltage
Sensitivity
Frequency Response
Broadband Output Noise
Output Resistance
VCC
ICC
VOUT
IivOUT
f(.3dB)
en
RO
= 12 VDC. TA = +25°C
Test Conditions
VCC = 12V
B = 0 Gauss
B = 1000 Gauss
Min.
Typ.
8.0
-
-
10
3.6
700
25
0.10
100
2.5
350
3dB B.W. 10 Hz to 10 kHz
-
Max.
12
20
5.0
-
-
Q
-
Notes
Units
V
mA
V
mV
kHz
mV
-
I
1,2
-
-
NOTE 1. All output voltage measurements are made with a voltmeter having an input impedance of 10 kO or greater.
NOTE 2. Magnetic flux density is measured atthe most sensijive area of the device, which is centered on the branded side ofthe Tpackage, 0.042 ±O.OOI" (1.07 ±0.03 mm)
below the surface and 0.022" ±0.001" (0.56 ±0.03 mm) below the branded side of the U package.
9-22
UGN-350lT
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSORS
NORMALIZED SENSITIVln AS A FUNCTION OF TEMPERATURE
NORMALIZED SENSITIVln AS A FUNCTION OF Vee
1,0
/ 'V
,95
I
,90
,S
/
~
/
,I
-
1,05
~~
~
....
I" r---.
..... ......
."
.......... ..;.;
.....
..... ......
......
B'" 1000 GAUSS
TA·2~C
-
'l= 1,1"'"
10
. "Vee
12
"
B = 1000 GAUSS -
"l ~'0"i
0,90
ilW6.ttO. \-!0.':>22
(VOLTS)
VCC ·12V
..
o
I
25
7,
TEMPERAtURE,OC
OUTPUT VOLTAGE AS A FUNCTION OF MAGNme FLUX DENSm
~4.0
+5.6
+4.6
+3,6
+2.6
OUTPUT VOLTAGE AS A FUNCTION OF AIR GAP
~/
-.,."'......
~
/:
II
~
/'
~
/'
+3.9
\
.. 3.8
\
2000
SOUTH POLE
1000
1000
+3.7
MAG.I\IETlC FLUX DENSITY (GAUSS)
'f-.-
+3.6
2000
3000
NORTH POLE
'" 2SoC_
k..n..
I
'\..
?'"
"
o
UGN-350lT
.40
.30
AIR GAp 0 (INCHES)
.
\.
"
.
"~
........
,
Vee" 12 VOLTS
TAtlCll1
o
10
1000
100
FREQUENCY,
9-23
H~
.50 '
D
12
\,
-
"- .........
.20
1lWIl. 110. ""0.523
NOISE SPECTRAL DENSm
.1
/ .. -~--'=
i'...
3000
= 10
;J0~
\
Vee '" ~2V
+1.6
.. 12V
RL
I I
TA '" 25°C
RL'" 10 k..n..
Vq::
TA
0.187" lengtfol
/
--""'" V"
A'NIJ:lZIlI'1o
M.JNET
0.212" Diameter
lIftl;. 110. '-'O.~20
10,000
UGN-3501T
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSORS
Typical Applications
of Hall Effect Linear Sensors
SENSITIVE PROXIMITY DETECTOR
FERROUS METAL SENSOR
FERROUS
~
ll(N 4Vo~lQ
mV
D= 0.250'
LOBi! OR COG SENSOR
NOTCH OR HOLE SENSOR
For reference only - an Alnico VIII permanent magnet, 0.212"
(5.38 mm) in diameter and 0.187" (4.75 mm) long is approximately 800 gauss at the surface. A samarium cobalt perma-
nent magnet, 0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick is approximately 1200 gauss at its surface.
GUIDE TO INSTALLATION
1. All 'Hall Effect' integrated circuits are susceptible to mechanical stress effects. Caution should be
exercised to minimize the application of stress to the
leads or the epoxy package_
2. To prevent permanent damage to the Hall cell
IC, heat sink the leads during hand soldering. For
wave soldering, the part should not experience more
than 230°C for more than 5 seconds and no closer
than 0.125" to the epoxy package.
9-24
UGN-3604M and UGN-360SM
HALL EFFECT SENSORS
UGN·3604M and UGN-3605M
HAll EFFECT SENSORS
THE MOST BASIC Hall Effect magnetic field
sensors are the Type UGN-3604M and UGN360SM. The differential output of the devices is a
function of the magnetic flux density present at the
sensor. Sensitivity is a function of the control current: sensitivity increases as the control current increases.
The UGN-3604M and UGN-360SM are most
often used for magnetic circuit design, analysis,
testing and alignment, and for calibrating magnetic
sensing devices.
Gnd.
The UGN-3604M is supplied in an 8-pin DIP
package, with a calibration chart. The UGN-360SM
is the same device without the calibration chart.
DW(J. 110. A-901~8
The UGN-360SM is intended to be used primarily
as a sensing device. When operated from a constant
current source of 3 rnA the device provides a typical
sensitivity of 60 mY per 1000 gauss. This is the
preferred biasing method, to achieve the most stable
output voltagevs. temperature.
Each Type UGN-3604M Hall Effect sensor is
individually calibrated at a temperature of + 2SoC
using a supply voltage of S-volts. The calibration
chart supplied indicates differential output values
for a magnetic flux density range from 0 gauss to
1000 gauss. Sensitivity at this supply voltage level is
typically 40 mY per 1000 gauss.
ABSOLUTE MAXIMUM RATING
Supply Voltage, Vee
Supply Current, Icc.
Magnetic Flux Density, B.
Operating Temperature Range, TA
Storage Temperature Range, Ts
Since the differential output voltage is a linear
function of the magnetic flux density, otherreadings
are easily interpolated.
, .+7V
. ... lOmA
. .. No Limit
.... O°C to + 70°C
... -65°C to + 150°C
ELECTRICAL CHARACTERISTICS at TA = +25°C
Characteristic
ContrQI Current
Control Resistance
Control Resistance vs. Temperature
Differential Output Resistance
Output Offset Voltage
Output Offset Voltage vs. Temperature
Sensitivity
Sensitivity vs. Temperature
Product Sensitivity
Symbol
Test Condition
Icc
RI.3
ilRI.)il T
R,.,
-
VOff
ilVofffM
ilVouTfilB
il VourfilB
ill
VfA x kG
B-
aGauss
Min.
lk!l
2k!l
Typ.
3 mA
2.2 k!l
Max.
7 mA
4.5 k!l
+.8%rC
4.4 k!l
9k!l
:55 mV
:5(±30 /LVrC)
60 mV flOOD Gauss
-
B= 0 Gauss
Icc = 7V fR I. 3
-
Icc = 1.5 mA
-
+.1%rC
-
Icc = 7V fR I.3
-
20
-
1. Icc is limited to a maximum value which produces a 7-volt drop across the Control Resistance RJ.32. Terminal 1 must always be positive in relation to terminal 3.
9-25
-
Notes
1, 2
o
UGN-3604M and UGN-360SM
HALL EFFECT SENSORS
APPLICATION NOTES
1. All Hall effect integrated circuits are susceptible to mechanical stress effects. Caution should be
exercised to minimize the application of stress to the
leads or to the epoxy package.
2. To prevent permanent damage to a Hall cell
I.e., heat sink the leads during hand soldering. For
wave soldering, the part should not experience more
than 230°C for more than 5 seconds and no closer
than 0.125" (3.28 mm) to the epoxy package.
3. The magnetic flux density is indicated for the
most sensitive area of the device. This area is centrally located and 0.037" ±0.001" (0.94 ±0.03 mm)
below the top surface of the package.
4. For reference purposes, an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long or a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, is approximately 1200 gauss at its surface.
Note that the flux density decays at a high rate as
the distance from a pole increases. In most cases,
this is a relatively linear decrease in the region of
interest, and it may range from 5 to 20 gauss/mil.
DIMENSIONS IN MILLIMETRES
Based on 1 in. = 25.4 mm
DIMENSIONS IN INCHES
INDEX
~
(PlN~NO.
1)
4
-r0.256
3
2
,
c~.-
~~
5
J:.
0.290
0.085
±O,005
7
8
-r-
0.375
0.325
~.
Is; - _ .T
(PIN~NO'I)
.
4
~1T_1
..
-.L___
6
INDEX
~:~g
-L-
2
2.'6
JtJ
±O.13
1
't~--
7.37
9.53
8.26
L__
5
0.015
3
6
7
8
0.38
0.20
0.008
3
M'AX'8
,I,f)-{}-U-([!,!.......L-SEATING PLANE
__1
8U-~Jrl}~~~~ SEATING
':'1.
0.38
3.05
MIN
MIN
..jl~
PLANE
0.58
0,38
2.54± 0.25 NON-CUMULATIVE
7,62 ± 0.25 @ SEATING PLANE
O,JOO ±O.OlO NON- CUMUlATIVE
0,300 ±D.OlO (9 SEATING PLANE
DWG. 110. A--9000A IN
DWG.MO • .4--9000AI4M
9-26
HALL EFFECT DEVICES (Continued)
Hall Effect
Ie Application
ELECTRIC uses the latest linear inteSPRAGUE
grated circuit technology in combination with
Guide
HALL EFFECT SWITCH OUTPUT WAVEFORM
I
the 100+ year old Hall Effect to produce Hall Effect
ICs. These are magnetically activated switches and
sensors with the potential to simplify and improve
systems designed for switch and sensor applications.
Simplified Switching At Low Cost
Simplified switching is a Hall switch feature.
Sprague Hall Effect ICs combine Hall voltage
generators, signal amplifiers, Schmitt trigger circuits and transistor output circuits on an IC chip.
Output is clean, fast, and switched with no bounce,
an inherent problem in mechanical contact switches.
A Sprague Hall Effect IC switch costs less than many
common electromechanical switches.
•
REED RELAY OUTPUT WAVEFORM
Efficient, Effective Low-Cost Sensors
A Hall Effect sensor detects the motion, position,
or change in field strength of an electromagnet, a
permanent magnet, or a ferromagnetic material with
an applied magnetic bias. Output is linear and temperature stable. Energy consumption is significantly
low. Response is independent of the velocity of the
field being sensed.
A Sprague Hall Effect IC sensor can be more
efficient and effective than inductive or optoelectronic sensors and at lower cost.
HALL EFFECT SENSOR LINEAR OUTPUT
+5.6
+4,6
Sensitive Circuits For Rugged Service
The Hall Effect IC is virtually immune to environmental contaminants, is particularly rugged,
anti is suitable for use under severe service conditions. These circuits are very sensitive, providing
reliable, repetitive operations in close tolerance applications. The Hall Effect IC can "see" precisely
through dirt and darkness.
Sprague Hall Effect IC switches and sensing systems cost less than most optoelectronic switch and
sensor circuit~.
+3.6
+2.6
---'
V
/
V
/'
V
./
~
o
Vee'" 12V
TA '" 25 O (
RL'" 10 Iv..
+\,6
NOTE: NORTH POLE IS WITH
THE NORTH POLE FACING
THE SRANDED SIDE ,OF THE
PACKAGE'I
3000
2000
SOUTH POLE
9--27
1000
1000
I
2000
3000
NORTH ,POLE
MAGNETIC FLUX OENSITY (GAUSS)
DWG. MO. A-IO.S23
HAll EFFECT DEVICES (Continued)
HISTORY AND THE HALL EFFECT
v+
E. H. Hall, at Johns Hopkins University in 1879,
first noted the effect that bears his name. A magnetic
field applied to a conductor carrying current produces a voltage across the conductor as shown in
Figure 6.
I
I
I
I
The effect is caused by electron deflection within
the solid, concentrating the negative charges to one
side orthe other depending on the influence of the
magnetic lines of force. The difference in potential is
called the Hall voltage.
The ratio Vt/IHis the Hall Coefficient. (V is the
Hall voltage, t the material thickness, I the primary
current flow, .and H the magnetic field.) This ratio is
a constant for a given material.
H. A. L6rentzapdJ>aul Drude developed theories
of conduction which apparently accounted for the
Hall Effect early in this century. Subsequently the
Hall Effect was widely used to study conductivity of
materials, with a Hall Coefficient assigned as a
means of classification.
Attempts to classify some specific materials such
as lead sulphide and silicon produced baffling, contradictory data. Tlie introduction of quantum
mechanics in 1926 provided a means for clarification
of tliese problems and other difficu.lties associated
with semieonductor materials.
A proper understanding of semiconductor theory ,
impurity conduction, junction theory and the fundamental approaches to semiconductor device design
did evolve out of studies using the Hall Effect.
The Hall voltage is proportional to the crossproduct I x H (Current x Field). A device that exhibits the Hall Effect is a multiplier: if current flow is
constant, the Hall voltage will be proportional to the
magnetic field applied; if the magnetic field is constant, the Hall voltage will be proportional to the
current flow.
I
" . . _--- -
+
+
,,
Early Hall Effect devices found limited application as wattmeters or gaussmeters. Such devices
were complex, expensive, and susceptible to noise
and temperature variations. It was difficult to
achieve useful Hall voltage levels.
,,------ +---
DI'kJ. NO. A- to. £1(,7
Production of Hall Effect integrated circuits have
eliminated the problems associated with discrete
component circuit designs. The Hall Effect ICs are
simple, inexpensive, virtually immune to noise, and
are temperature stable. Amplifier circuits integral to
the devices produce useful electrical output levels.
A MAGNETIC FIELD IS APPLIED TO THE CONDUCTOR
CARRYING CURRENT. THE NEGATIVE CHARGES ARE
DEFLECTED BY THE MAGNETIC FIELD PRODUCING A
DIFFERENCE IN POTENTIAL CALLED THE HALL VOLTAGE (VHALJ. THIS PRINCIPLE IS APPLIED IN HALL EFFECT Ie'S TO PRODUCE MAGNETICALLY ACTIVATED
SWITCHES AND SENSORS.
9-28
HALL EFFECT DEVICES (Continued)
SOME CURRENT HALL EFFECT IC
APPLICATIONS -
HALL EFFECT SWITCH and SENSOR
APPLICATIONS AREAS-
Ignition Systems
Speed Controls
Speedometer Pickups
Security Systems
Alignment Controls
Appliances
Automotive OEM
Automotive· Aftermarket
Business Ma.chines
Communications
Computers /Peri pherals
Controls
Entertainment Products
Industrial and Commercial Switches
Instrumentation
Keyboa rd IKeyswitch
Machinery
Machine Tools
Military Systems and Equipment
.Power Supplies
Test Equi pment
Mechanical Limit Switches
(computers)
(printers)
(floppy discs)
(sewing machines)
(record players)
(machine tools)
Current Sensors
Current Limit Switches
Linear Potentiometers
Position Detectors
Keyboard/Keyswitch
Selector Switches
Pushbutton Switches
Micrometers
TYPICAL APPLICATIONS
VANE INTERRUPTER
(ignition sWitch, etc,)
LIMIT SWITCH
(pressure monitor. etc·J
ANGLE SENSING
(tilt switCh, etc.)
CHANGe IN FLux PATH
(notch sensor, etc)
F_ERROUS METAL
SENSOR
(pinball detector, etc
J
ANGLE OF ROTATION
(antenna POSition, etc)
What Does A Hall E.ffect Switch Do?
Switch d~signershave obtained high performance
switching characteristics with the useofphotoelectric switching, ca.pacitive circuits, mercury wetting
switches, proximity devices and magnetic pickup
techniques. Suchdesigns have unique characteristics
suitable for one or mores~cificapplications.In
general these· designs are uS\lally more complex and
more expensive than Hall Effect ICswitches performing. similar functions.
Snap-action. or .reed switches have •been used
wherever the switch life., speed and reliability per-
mitted, primarily because of th~ir low cost. Some
applications require perfofII.lance standards not
available in electro-mechanical switches.
Sprague Electric Hall Effect Ie switches provide
switching characteristics at costs
comparable with snap-action or reed switches.
high-~rformance
The devices arevery small. The 3-lead "T"pack
units are 0.18" x 0.18" x 0.08". The cost is as low
as the devices are small.
9-29
HALL EFFECT DEVICES (Continued)
'Whatever Turns Them On •••
The application of Hall Effect switches is not very
different from other switching methods. A means for
mounting and making electrical connections must be
provided. Supply voltage, load, environment and
ambient temperature range. must fall within limits
specified in the applicable engineering bulletin.
Hall Effect swit<;h€fs incorporate a voltage regulator, a Hall voltage generator,' a s~gnal amplifier,
trigger circuits and output drivers on a single silicon
chip.
The magnetic characteristics of the Hall Effect
switch are specified in ~erms of magnetic flux density
(in gauss). Typical, maximum, and minimum operate and release points and hysteresis factors are
specified.
A built-in hysteresis feature insures that stray
magnetic fields from transformers, solenoids, or
other associated circuitry will not cause unwanted
switch operation. The graph below shows typical
hysteresis characteristics for the VGN -30 19T
switch.
TRANSFER CHARACTERISTICS
SHOWING HYSTERESIS
FUNCTIONAL BLOCK DIAGRAM
O.P.
12
I
I
g
I
I
1
I
I
I
9
~
I
(5
+12V
~
~
~
"
0
6
I
!IONl
I
I
I
I
1
1
I
I
I
1
OFFI
I
I
tI
R,P.!
I
I
I
I
I
I
I
I
I
I
I
1
I
Q~:!::--:::~~~~
o
100
200
300
400
500
600
Dwg. No. A-ll,007
MAGNETIC FLUX DENSITY IN GAUSS
Dwg. No. A-9015C
Switching is dependent on the proximity of an
external magnet whose field passes perpendicularly
through the Hall voltage generator on the chip face.
The Hall generator produces an analog voltage
amplified and converted by the trigger circuit to a
digital output.
.
.
The maximum operate point for the VGN-3019T
switch is specified at 500 gauss and the minimum
release point at 100 gauss. The maximum hys~eresis
factor forthis switch, however, is 275 gauss. Should
the operate poi,nt fall near the maximum, the release
point will mOYe up as well. Similarly,' if the release
point falls near .the minimum, the operate point will
have a' correspondingly lower value. The hysteres~s
fac1.or will remail! close to a typical value.
Hall Effect Ie switches featUre such characteristics as high-speed response and very high cycle rates.
Typical rise time (turn-on) is 15 nanoseconds, fall
time (turn-off) 100 nanoseconds. These units have
the capability for cycling at 100,000 l{z(cyclesper-second).
, .
'Basic fixed element switch designs will. take the
maximum and minimum operate and release points
into account. llowever, a configuration which permits adjustment of switch and magnet element~ in
assembly or operation can take advantage of the
closer tolerance hysteresis limits to achieve even
more precise switching characteristics.
Hall Effect Ie switches feature constant amplitude
output without the bounce characteristics of electromechanical switches. Hall Effect les also feature
low power consumption: 7 mA is typical.
9-30
HALL EFFECT DEVICES (Continued)
Head-On Mode of Operation
The simplest form of magnet which will operate
the Hall Effect switch is a rod or bar. The curves
below illustrate typical flux density (in gauss) as a
function of air gap distance for two rod magnets.
In each case, the magnet is oriented with its axis
perpendicular to, and on the center line of, a Hall
Effect IC switch. Flux density and air gap distance
are measured along the magnet axis and switch centerline.
The switch used is the Sprague UGN-3019T. The
typical operate and typical release points are420 and
300 gauss, respectively.
An ALNICO V rod magnet 0.25" in diameter by
1.25" in length must be 0.18" or less from the
switch to insure operation at the 420 gauss typical
operate point. The magnet must be moved to a distanceO.25" from the switch to insure release, an
"operate-release" distance of 1/16 " .
The UGN-3019T can be switched with a larger or
stronger magnet over greater distances. Or, the device can be switched with a smaller or weaker magnet provided the air gap between the magnet and the
switch is properly decreased.
An ALNICO VIII rod magnet 0.212" in diameter
by 0.187" in length must be 0.05" or less from the
switch to insure operation at the 420 gauss typical
operate point. The magnet must be moved to a distance 0.085" from the switch to insure release at the
300 gauss typical release point.
Use of the smaller ALNICO VIII rod magnet
reduced the on-to-off motion from approx. 1/ 16 " to
The magnet is moved toward the switch to activate
it and away to release it. This method of operation is
commonly referred to as the head-on mode.
1/32".
MAGNETIC FLUX DENSITY AS A FUNCTION OF AIR GAP
Head-On Mode of Operation
1000
1000r---'r---r--...--...--~-~-'T"""-"
ALNlco
900
SOO
v>
'"
:::>
v>
v>
(j
(j
~
~
700
J
...:
x
3u..
s
50 0
u
u
400
;::
;::
z
(j
Z
(j
~
~
w
...:
...:
300
\.
\
'\
0
0.2
0.3
0.4
0.5
0.6
'I'
...:
Rod
i"-i'oo-
0.2
-
0.3
0.4
0.5
0.6
DISTANCE (D) INCHES
0.7
0.8
Ohl. NO. A-IO.U6(l
9-31
HALL EFFECT DEVICES (Continued)
Slide-By Mode of Operation
Slide-By With Actuator
Hall Effect switches are often activated by means
of a slide-by movement of the magnet past the switch
as illustrated below.
The axis of the magnet remains perpendicular to
the face of the switch, the air gap remains constant,
and the magnet passes close enough to the switch to
activate it. The maximum flux density is obtained
when the magnet axis is on the switch centerline.
Magnetic fields may be distorted, interrupted,
squeezed, squashed, or focused by various ferromagnetic concentrators, shunts, vanes, flux returns, and actuators. The magnetic circuit improves
the efficiency of the magnet by concentrating the
magnetic field.
The extent of field distortion can be seen in a
comparison of flux density at the switch for a magnet
with and without the actuator. Flux density is plotted
in a slide-by mode, with a 0.05" air gap for an
ALNICO VIII rod magnet 0.188" in diameter by
0.938" in length.
The graph at bottom left shows slide-by characteristics for the same magnet used in the previous
head-on mode example. The air gap is 0.01". Flux
density at the switch is a function of the distance
between the magnet axis and the switch centerline.
Movement from the operate point to the release
point covers only 0.018". Movement continuing
past the switch covers an "operate-release" distance
of 0.24", but no change in direction is required.
"'~//
MOTtON
D
Without the actuator, the flux density across the
0.05" air gap is not sufficient to activate a UGN3019T, as illustrated in the graph at bottom right.
With the actuator, the 420 gauss operate point is
obtained with the magnet axis 0.15" from the switch
centerline.
Ci.
........ ", ....
-1
410-../'
D.......
,07/~
,,/
.....
,~:" ~~
"" ...v:..).......
.......
Dwg. No. A-1O.957
miG. NO. 1l,U7-A
MAGNETIC FLUX DENSITY AS A FUNCTION OF MAGNET AXIS-TO-CENTERLINE DISTANCE
Slide-By Mode of Operation
1000
1000
~O :szrr1:. Rod Jagnet
0.212" Diameter
'0.137" Length
~-A1RGAP
Air Gap = 0.01"
1
A LN I
900
800
700
~
::>
«
600
~
500
}
(:!
400
;::
"::E
'
.......
300
«
«
~
",
'V
x
"
2
'=!
....
Z
RELJSE
"::E«
a
SLIDE-BY MODE
,
0.2
0.3
WITHOUT ACTUATOR----
400 l!o"
300
",.,
\
. . OPERATE
\
t....
JLEASE
'
" ,\
\.,
~
.".
0.4
0.5
0.6
0.7
a
0.8
DISTANCE (D) OF MAGNET FROM CENTERLINE (
V>
::>
:szm:
H
700
.-
.-
'<,
D~;~
\+ OPERATEI /
U
Z
,L ''-''
~
,
s
">
~'
,
x
2
,
'-
I
I.
~
900
a
0.1
0.2
~~
0.3
0.4
0.5
0.6
07
0 8
DISTANCE (0) OF MAGNET FROM CENTERLINE I,\:I INCHES
Dwg. No. A-10,956
Dwg. No. A-galle
9--32
HALL EFFECT DEVICES (Continued)
Vane Activation
all affect the slope of the flux density curve. A
steeper curve will minimize the effect of switching
point tolerance and temperature and voltage variation. A stronger magnet reduces the vane travel required to switch the Hall Effect switch.
Switch designers have utilized strong magnets
with efficient magnetic circuit design in a fixed element molded assembly to provide a very high flux
density and a steep curve. This approach minimizes
operate-release point variations with changes in
temperature.
A ferromagnetic plate or vane moved between the
magnet and switch will shunt the field, shielding the
switch from the magnet. A movable vane, as shown
below, is a most practical device for switching a Hall
Effect IC.
Vane activation is often accomplished in a fixed
assembly incorporating a magnetic conductor to
concentrate and focus the magnetic field through the
switch. A ferrous vane is used to shunt the flux,
turning the switch off. The magnet, switch and
magnetic conductor may be molded in place,
eliminating alignment problems, and often producing an extremely rugged completed switch.
A fixed assembly designed for vane activation
lends itself to a wide variety of possible switch configurations.
Note the curve at bottom left is an approximation.
Several factors influence the switching characteristics of a vane activated Hall Effect switch. The relative position of the vane leading and trailing edges
and the strength of the magnet used are of primary
importance.
The flux density, vane dimensions, and material
A different design approach has used an adjustable
air gap, permitting use of a smaller magnet in the
magnetic circuit design. This design approach produces a shallow flux density curve, and places severe
operate-release point restrictions on the Hall switch
required. Vane material is typically greater than
1/32 " thick to result in a minimum flux density. This
leaves little clearance.
Generally, the physical position of the vane leading and trailing edges, (which determine switch
points), the switch characteristics, and the magnet
specifications should all be considered as part of an
overall switch design. Independent selection of any
element can severely restrict the possibilities for
designing an effective switch.
The graph at bottom right is a generalization of the
principle involved in reducing switching distances
and tolerances for vane activated switches. A
stronger magnet produces a higher initial flux density and a steeper curve. Note that a steep slope
minimizes the effect of temperature changes on the
operate point.
~I ~_~:I,'t;:f~'(;N_3019T
liognet/
Alnico Vlli
0.1880
O.938L
Ferromagnetic
~ I/Vone
e./
Owg. No. A-IO,955
FLUX DENSITY AS A FUNCTION OF VANE POSITION
VANE EDGE MOVEMENT REQUIRED
FOR SWITCHING
HI
'iHALlOY., SLOPE DISTANCE
1--------I
I
R.P.
01
o2
VANE TRAVEL
0,3
0.4
0.5
lRftlLlNC EDGE
IN INCHES
(0) i, measured from the point where the vone firs! effect> the flux density at
the switch.
9-33
HALL EFFECT DEVICES (Contrnued)
Ring Magnets and Bipolar Switches
The curves shown are approximations. Actual
magnetic field exposure at the switch depends on the
field. strength available and themagnet-to-switch
spacing.
Multiple-pole ring magnets and Hall Effect bipolar switches are used to monitor or measure rotary
motion and are especially useful in high-speed applications: speedometer pickups, rpm indicators, angle
indicators, etc.
Rugged inexpensive ceramic or plastic ring magnets incorporate up to 20 magnetic pole pairs per inch
of ring diameter. The useful field strength available
in this type of magnet construction is approximately
250 gauss to 1000 gauss.
Ring magnets are available with radially-oriented
poles or with axially-oriented poles.
The output voltage wave form will be determined
by the specific distribution of the operate and release
points within the switching range. As with other Hall
Effect s~itches, both points move together within
the switching range so that the hysteresis factor remains close to the typical value in all cases, as
illustrated in the graph at bottom.
Sprague UGN-3030T and UGS-3030T bipolar
digital switches operate in the magnetic field range
of 250 gauss (South) to -250 gauss (North) and are
intended specifically for operation with multiplepole ring magnets.
RADIAL OR AXIAL ORIENTED POLES FOR
SWITCH ACTUATION WITH A RING MAGNET
Note below that exposure to a single pair of opposite magnetic poles accomplishes a single switching
cycle.
A SINGLE SWITCHING CYCLE FOR A MULTIPLE POLE
RING MAGNET USING A UGN-3030T SWITCH
2
~iE
~:::>
:::>0
,,~
"
50
TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
I
MAX.
12V
,O.P.
VI
~
o
>
z
L..U
c.!)
;o
I
I
I
I
I
OFF I
I
6
>
I--
::::l
0...
::::l
o
a.:
ci
c:i
-'
«
u
-'
«
u
0...
I
I
I--
c.:
>-
I--
I
ION
0...
>-
I--
MIN.I
R.p.L
-300
-200
-100
(-) NORTH POLE
o
+100
GAUSS
9-34
+200
+300
SOUTH POLE (+)
Dwg. No. A-JJ,040
HALL EFFECT DEVICES (Continued)
MODEL OF A MAGNET
MAGNETIC FIELD MODEL OF AN ALNICO VIII
SINTERED ROD MAGNET
An inexpensive commercially available standard
ALNICO VIII magnet* is shown in the scale drawing. The solid lines are maximum operate and
minimum release points for a Sprague UGN-3019T
switch. The field strength levels indicated by dotted
lines are maximum operate and minimum release
points for other Sprague Hall Effect IC switches.
The field is unique to this magnet, and is a function of the material used and the geometry and dimensions of the magnet. Increasing the diameter
would tend to spread the field. Extending the length
of the magnet would strengthen the field.
A variety of magnet materials are commercially
available, each exhibiting unique field characteristics. A samarium-cobalt magnet only 0.085" square
by 0.04" long will produce up to 1200 gauss at its
pole surface, more than adequate field strength to
operate all Sprague Hall Effect IC switches. The
strongest known field available in a permanent magnet is that generated by an ALNICO V magnet
capped with a samarium-cobalt rare earth magnet.
The curves below left are flux density values for
the magnet measured for switch activation in a
head-on mode (along the magnet axis), and for
slide-by modes with air gaps of 0.01" and 0.025".
FLUX DENSITY CURVES
1000
900
r---~---r---r---r---r---.---r---'
ALNICO lZIII Rod M g g n e t --I
0.212" Diameter _
~D
. 1
u..
0.187" Length
~--
I
s
800
700
"":::>
.:
600
~
500
~
_~"'
.,\
HEAD-ON M b D E -
:.?
:
~ /'t
~"'~'>
-'-
>(
~
,!.
l.
:.?
400
"
'ov'
ot
~
~
1.to~"'
D
300
/'
'v
SLIDE-BY MODE
200
100 1--+-----"'. .-
0.1
0,2
0.3
0.4
0.5
D IN INCHES
0.6
OJ
0.8
!i.
FLUX DENSITY (GAUSSI
1
...---
__ 11- _
//
I
1
/
/
I
I
/
I
I
\{
'"
R~~i'C,~
\\
MAX.
~
/ "
I'()\I\,
:
I
",\\<.
/"
100
\
\
I
\
/
\
_L_~o
//' ~OO'
I
I
\~
1/
/,
/~_:..15~'
OPERA~
"
--1"----...20
/
\ \
\\
/
--~
/1
SOUTH
UGN-3019T
POI NT
LENGTH
NORTH
f.---: - - - . j
1
~
O. 187"
DIA. : 0.212"
!i.
DWI""!. No.
A-ll,O(j~
The slide-by curves cross each other, reflecting the
fact that the field strength contours are not concentric
circles.
The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" ±0.002" below the branded
surface of the Tpackage and 0.012" ±0.002" below
the_branded face of the U package.
Note that Sprague Hall Effect ICs are designed to
be activated by the field generated by a magnetic
South pole, applied to the face or branded side of the
switch package. The Hall Effect switches will operate with a magnetic North pole of sufficient strength
applied to the back of the switch.
A magnetic South pole at the face, and a magnetic
North pole at the back of the switch at the same time
produce a concentrated field through the switch. A
magnetic South pole applied to the reverse side of the
switch will offset the effects of a South pole applied
to the switch face. Conversely, a North pole may be
applied to the back side ofthe switch so the device is
normally on, and a North pole approaching the
switch face will turn it off.
Dwg. No. A-ll,065
'Indiana General Magnet Products Co. SR8522.
9-35
~
HALL EFFECT DEVICES (Continued)
LOW-COST HALL EFFECT DIGITAL SWITCHES
Sprague offers 10 different Hall Effect switches
from its automated high-volume production, packaging and test facilities in Concord, N.H. These
rugged solid-state switches operate with small lowcost commercially available permanent magnets.
Hall voltage generator, signal amplifier, trigger circuit and output transistors on a single silicon chip.
Output transistors are normally OFF until a
magnetic activating field exceeds a specified operate
point. Switched ON the transistors will sink up to
25 rnA. See Electrical Characteristics below.
The devices feature "no-bounce" contactless
switching to 100,000 Hz, circuit operation over a
wide range of specified supply voltages (4.5 to
25 V), and constant amplitude output. Output stages
are easily interfaced with a variety of output loads.
The output transistors switch OFF when the activating field drops below a specified release point
that is a lower value than the operate point. This
switching hysteresis characteristic insures unambiguous, non-oscillatory switching.
Each Hall Effect switch is a plastic-packaged
monolithic integrated circuit: a voltage regulator,
FUNCTIONAL BLOCK DIAGRAM
TYPE UGN-3013, UGN-3019, UGN-3020, and
UGN-3030 "T" Pack
FUNCTIONAL BLOCK DIAGRAM
TYPE UGN-3201 and UGN-3203 8-Pin DIP and
UGN-3220 "S" Pack
Vee
~\\G.
MO. A-IO.898
ELECTRICAL CHARACTERISTICS
UGN-3019T/U
Characteristics UGN-30I3T/U UGS-30l9T/U
Vce Max.
Vom Max.
(Logical 1)
17V
ISINK Max.
(Logical 0)
Operate Max.
Point-Gauss Typ.
Release Typ.
Point-Gauss Min.
Package
UGN-3201M
25V
20V
--
500
-
750
17V
2(25) rnA'
25 rnA
350
350
250
200
--
--
--
--
--
300
420
450
235
220
160
150
225
300
300
100
165
110
100
-25
100
3-Pin "T" or "U" Pack
UGN-3220S
25V
2(25) rnA*
25 rnA
450
UGN-3020T/U UGN-3030T/U
UGN-3203M UGS-3020T/U UGS-3030T/U UGN-3040T/U
--
--
100
25
8-Pin DIP
-
50
--
--
-250
50
3-Pin "T" or "U" Pack
TA Ma~ Operating Temperature for UGN prefix devices is O'C to + 70'C,
TA Max, Operating Temperature for UGS prefix devices is -40'C to +125'C,
'Dual Outputs
9-36
350
~'
220
160
-
50
4-Pin "S" Pack
HALL EFFECT DEVICES (Continued)
SUGGESTED OUTPUT LOADS FOR HALL EFFECT SWITCHES
The output of each Sprague Hall Effect switch is a
grounded-emitter, open-collector structure. In the
absence of a magnetic field the output transistor is
OFF and switches ON when the proper field is
applied to the associated Hall voltage generator.
The graph at bottom left illustrates the typical output
ON voltage level as a function of temperature for the
UGN-3019T.
Below are some suggested interfacing approaches .. Many techniques can be used and are
discussed in the following pages.
f Vee
I
;~
:
y
;)"'[>1,
VOUT
___ I
~,
,
,
,
, ----+-----'
Jill.,. "0 . .1.-10.966
With a simple extemal resistor network the output
can be interfaced with transistors, triacs,. SCRs or
common DTL, TTL, RTL and MOS logic circuits.
Any type of load within specified current and voltage
limitations is possible. Transient suppression may be
required on all inductive loads.
Output is specified in the engineering bulletins in
terms of positive logic: low or ON voltage level = 0;
high orOFF voltage level = 1. In the logic' '1" state,
the output is guaranteed to sustain a specified voltage
level. The UGN-3019T is capable of sinking up to
15 mA with a voltage drop of less than 400 mY.
DI
"
Specific device type numbers are referenced in
this section in discussion of applications, loads. and
interfacing techniques. However, all Sprague Hall
Effect switches may be used in the same way provided the total sink current and maximum OFF voltage levels do not exceed values specified for each
device.
20
AMBIENT TEMPERARlRE ('C)
9-37
HALL EFfECT DEVICES (Continued)
Switching Common Loads With The UGN-3020T
The UGN-3020T is supplied in a 3-pin plastic
"T" Pack. The branded side of the package is the
face. Tenninals are,. from left-ta-right facing the
package, the input (Vee) tenninal, common ground
and output tenninals.
the + 12 volt supply common ground is connected to
the low side ofthe a-c line. Be careful. If the high and
low are mixed up the Hall switch could be hot!
Supply voltage is any value between +4.5 and
+24 volts applied between the Vee tenninal and
common ground. The absolute maximum output
tenninal sink current is 25 mAo Voltage drop at
25 mA is typically 0.2 volts.
Note that the voltage on the output terminal must
always be positive (+ ).
--+_ _O--O
L -_ _ _ _ _ _ _
A-C ond
~
12Y
Common
The South pole of the magnet shown below will
activate the UGN-3020T in a head-on mode, at a
typical distance of 0.12" from the switch face (typical operate point is 220 gauss). The switch is turned
OFF by removing the magnet to a distance of 0.16"
from the switch (typical release point is 165 gauss).
D-C Load 4 Amperes
When the UGN-3030T is activated, base drive is
pulled away from the 2N5812. Collector current then
flows to the base of the 2N3055. A 4 ampere load can
be activated.
Light-Emitting-Diode
Let's connect a load, a light-emitting-diode. We
have a + 12 volt supply. We must connect a currentlimiting resistor in series with the diode to keep the
ON current under 50 rnA maximum, as illustrated
below.
If the LED drops 1.4 volt, we need a resistor of
12 v - 14 V = 212 ohms. The closest standard value is
+12V
.05 A
220 ohms.
22Q".
/,
'/
/The branded side,
, o r foe e I tow ards
~c-:l_~.
12V
+
~\~
O\"G. NO. A-IO.961.1.
the South pole.
TIL/DTL
The popular TTL 7400 series is quite simple to
drive. The UGN-3020T, switched ON, will sink the
1.6 rnA maximum to operate the 7400.
+5V
40669 Triac
The RCA 40669 triac is often used to control a-c
loads upto 8 amperes nns maximum. We.must add a
current gain stage between the UGN-3020T and the
40669 triac.
When the Hall switch is turned on, it supplies
9 rnA of base current to the 2N5811 which turns on
and supplies 80 rnA of drive to the triac. Note that
10 kn-
L-_-+___•
TO TTL/DTL
INPUT
DING. NO. A-IO,965
9-38
HALL EFFECT DEVICES (Continued)
Isolating The Switch From The A-C Line
Vee - VF(LED)
R=-----
It is desirable to isolate the Hall Effect switch from
the a-c line for many control applications driving
line-operated loads. A Fairchild MC-232 photoisolator may be used to accomplish this design.
5V-l.4V
.05 A
= 72 ohms.
The resistor selected is the closest standard value ---,68 ohms. The LED drives the detector which
supplies 70 rnA to drive the triac. Note that the 10
volt power supply, consisting of the 6.3-volt transformer, diode and capacitor, can supply detector bias
for several of these control circuits.
The activated UGN-3020T will draw current
through the LED. The current must be limited to
50 rnA. A 5-volt supply is used. The calculation is
MC-232
r-----------------~--~AC
High
+lOV
-
~F
AC
~~--~------~~-{)Low
OwG. H0. A-IO.061
Types UGN-3 013 T. UGN-3019T. UGS-3019T. UGN-3020T, UGS3020T, UGN-3030T, UGS-3030T, UGN-3040T, and UGN-3501T are
supplied in 3 -pin plastic "T" packages 0 .080/1 (2.03 mm) thick. These
Hall effect devices are also available in 3-pin plastic "U" packages
0.061/1 (1.54 mm) thick. The "U" package is specified by replacing the
"T" suffix to the part number with a "U" (UGN-3013U).
9-39
HALL EFFECT DEVICES (Continued)
LINEAR OUTPUT HALL EFFECT SENSORS
TYPE UGN-350lT
TYPE UGN-3501 M
Utilizing the Hall Effect for sensing a magnetic
field, Type UGN-3501 T integrated circuits provide a
linear single-ended output which is a function of
magnetic field intensity. Integrating the Hall cell and
the amplifier into one monolithic device minimizes
problems related to the handling of millivolt analog
signals.
The Type UGN-350IM Hall Effect Ie includes a
monolithic Hall cell, linear differential amplifier,
differential emitter follower output, and a voltage
regulator.
Provisions are included for output offset null. This
sensor is supplied in an 8-pin dual in-line plastic
package and is rated for continuous operation over
the temperature range of ooe to + 700 e and a voltage
range of 8 to 16 volts doc.
This sensor, supplied in a 3-pin plastic package, is
rated for continuous operation over the temperature
range of ooe to + 700 e and a voltage range of 8 to 12
volts doc.
The figure below shows the functional block diagram for the UGN-3501M Hall Effect Sensor.
The functional block diagram for the UGN-350 I T
is shown below.
FUNCTIONAL BLOCK DIAGRAM
FUNCTIONAL BLOCK DIAGRAM
GND
Owg. No. A-ll,1l9
OUTPUT VOLTAGE AS A FUNCTION OF AIR GAP FOR HEAD-ON MODE OF OPERATION
+4.0
~
.1
ALNfJ1ZIII.L MJNET
Vee
TA
'L
0.212" Diametflf
0.187" length
+3.9
\
\
+3.8
\
'
""
+3.6
a
.10
I
<
I
I
1.0
"-
"-i'.
40
~.
Dwg.
........
""-
9-40
'"
lOk.l'.-
1
,04
0-1£--,=
--r-....r-.
06.08
10
AIR GAP D, (INCHES)
No.
lL
UGN-350IM
..
02
.50
eo
'" 2Soc
015 ... -
-tl:;' ,
20
.40
~
1
-
.30
AIR GAP 0, (INCHES)
S 6
RL
r-..... r--.20
TAR _
0.212" Diameter
0.187" length
1Oi'' -
UGN-350lT
~
I
Vee
ALNIJ = RL MJNET
t--
-
'
~"
\1\.
+3.7
"" 25°C _
G--' -
:J'~
,
\
l.6
.1
'" 12V
12
14
.16
-
.18
20
D~jG.NO. A-IO,531B
HALL EFFECT DEVICES (Continued)
APPLICATIONS FOR TYPE UGN-350lT SENSORS
These devices are used principally to sense relatively small changes in a magnetic field - changes
which are too small to operate a 'Hall Effect' SWitching device. They are customarily capacitively
coupled to an amplifier, which boosts the output to a
higher level.
The UGN-3501T is a single output linear device
having a sensitivity of7oo mV/lOoo gauss, and output offset which is typically +3.6 volts, at a Vee of
+ 12 volts.
OUTPUT VOLTAGE AS A FUNCTION OF MAGNETIC
FLUX DENSITY
+5.6
+4.6
--'"
/'
vcc
=
12V
TA = 25°C
RL :;;: 10 k.n.
+1.6
M~net ~m
~-
Magnet
Nc:::=:::J 5
Nc=::::J 5 -
DECREASE
V
./
-'-2.6
BRANDED FACE
FIELD INCREASE
PRODUCES
/"~
+3.6
The device will respond to magnetic North and
South poles directed to the face or reverse side of the
3-pin "T" package, as illustrated below.
VOLTAGE
~/
.~
./V
3000
2000
1000
1000
2000
SOUTH POLE
~
3000
NORTH POLE
MAGNETIC FLUX DENSITY (GAUSS)
DWG.
NO.
A.-IO,!i23'
BRANDED FACE"
FIELD INCREASE
PRODUCES - -
~ ~~-- sC:J N
ABSOLUTE MAXIMUM RATINGS
S'------.J N-
VOLTAGE
INCREASE
.............. +16V
Supply Voltage, Vce ..... .
. ............. 4mA
Output Current, lOUT .. : .. .
. ....... No Limit
Magnetic Flux Density, B ..... .
. ...... O°C to +70°C
Operating Temperature Range, TA ..
Storage Temperature Range, TS ... , , ..... ·65°C to + 150°C
n'o\'G.N0. A-IO.971
ELECTRICAL CHARACTERISTICS at Vee = 12 VDC, TA = +25°C
Characteristic
Symbol
Operating Voltage
Supply Current
Quiescent Output Voltage
Sensitivity
Frequency Response
Broadband Output Noise
Output Resista nce
Vee
ICC
VOUT
l\VOUT
f(·3dB)
en
RO
Test Conditions
Vee =12V
B = aGauss
B = 1000 Gauss
Min. Typ.
8.0
-
-
-
10
3.6
700
25
0.10
-
100
2.5
350
3dB B.W. 10 Hz to 10 kHz
Max.
Units
Notes
12
20
5.0
V
rnA
V
mV
kHz
mV
-
-
Q
1
1,2
-
-.'
NOTE 1. All output voltage .measurements are made w~h a voltmeter having an input impedance of 10 kO or greater.
NOTE 2. Magnetic flux density is measured afthe most sensttive area ofthe device, which is centered on the branded side o!the package, 0.042 ±O.OOI" (1.07 ±O.03 mm)
below the surface of the T package or 0.022" ±O.OOI" (0.56 £0.03 mm) below.the surface of the U package.
9-41
HALL EffECl DEViCES' (Continued)
Ferrous Metal Detector
Two similar detector designs are illustrated below. One senses the presence of a ferrous metal, the
other senses an absence of the metal. The two sensing modes are accoml'lisbeq'simply by reversing the
magnet poles relative to the UGN-3501T. The pole
of the magnet is fixed in contact with the reverse side
of the UGN-350IT in both cases.
Frequency response characteristics of this circuit
are easily controlled by changing the input decoupIing capacitor value for the low-frllquency breakpoint. If high~frequency attenuation is desired a capacitor may be used to shunt the feedback resistor.
1--------- - - -------,
1" STEEL BALL
0-
I
I
I
I
I
I
MAGNET
~.:12~F'
350lT
+12V
-=-
Rf
I
+V
I
470""'Rr
1
LOAD
I
I
I
10k~
1
":"
":"
L _______________ J
I
Metal Sensor
The North pole of the magnet is fixed to the
reverse side of the UGN-350lT. The sensor is in
contact with the bottom of a 3/32 " epoxy board. A
20 mV peak output change (decrease) is produced as
I~
the 1" steel ball rolls over the sensor. This signal is
amplified by thelLA 741C to drive the 2N8512 ON to
carry a 0.5 A collector current.
- -
-;;A;;;ET- -
-
-
-
-
-
-
":"
1Ok~
-
LOAD
I
I
>----.."1\1'-1
I
I
I-----.----. -- - - -
+V
i:~Jit, ~ :~
1
-
I
I
-
I
I
---
Notch Sensor
The South pole ()f the· m~gnet isflxed to the
reverse' side ofthe.UGN-3501T. The sensor is 1/32 "
from the edge ofthe steel rotor. A 1/16 " wide by tAr II
deep slot in the rotor edge passing the sensor causes a
10 mV peak output change (decrease). This signal is
amplified by thelLA 741C to drive the 2N5812oN,
carrying a 0.5 A collector current.
Note that ill both examples the branded side of the
UGN-350lT faces the material (or lack of material)
to be sensed. In both cases the presence. (or absence)
of the ferrous metal changes the flux density at the
Hall Effect sensor so as to produce a negative going
output pulse. Thjs pulse is inverted by the amplifier
. to drive the transistor ON.
9-42
HALL EFFECT DEVICES (Continued)
Printer Application. For The UGN-3501 T
=
=
3 /16" apart around the circumference, are
lJi"
long and rise 10 to 15 mils from the surface of the
drum.
The application below is for a sensor that will
sense lobes on the character drum. Lobes are spaced
T\. FLUX
U
3501TE]
A UGN-3501THall Effect linear IC sensor was
used with an Indiana General Magnet i>roducts Co.
SR8522 magnet. The North pole is fixed to the
reverse side of the "T" pack. A flux concentrator is
fixed to the branded face of the' 'T" pack. Though it
does not provide a flux return path, a concentrator
will "focus" the magnetic field through the switch.
MAGNET
O\I\l. NO. A-II072
The concentrator "blade" at right is aligned with
the drum lobe at an air gap distance of 0.01". The
output change is 10 m V peak, amplified as shown to
develop a +3 volt output from the operational
amplifier, driving the transistor ON.
., 1--°.
031
CiE25
o
Sensitivity is so great in this configuration the
UGN-3501T output signal base line tracked the eccentricities in the drum quite closely . This affected
the lobe resolution, but the lobe position may still be
measured.
~.
0.062
OWG.
lMn.
'
t
NO.
A.".071
+15V
.,27
>
~
.~
C>
."
60
.::1
"z
.<0
.1
.
""-
1D\:;' .. ' _
-.
~
it<;
.04
D-fE--~UGN-350IM
.......
"'-
,06.08
- -
The rate of change is, of course, a function of the
flux density gradientacrossthe magnetic field for the
particulartnagnet usea. Asamarium-cobaltmagnet,
with its relatively compact field, c·an produce voltage
change, rates to 30 inY/O.Oql" movement;
r---.... r-.....
.20
.02
For example, in !l slide-by mode pf operation with
an 0.03" air gap, movement to be measured could be
centered at a "zero" of 0.1" from the centerline.
The voltage rate of change would be linear at 5
mY /0.00 }" movement, for a movement distance of
±0.02" .
1
10
12
14
AIR GAP 0, (INCHES)
.16
.18
.20
OWG.NO. A-lO,53tB
00
1200
.........
"00
·1000
00
.....
"-
"' \.
~
00
"
\
~
",
.......
00
~,~/
"13mvlool"
1\
00
". ~·nln n
..
\
/1 "'-,
r WjW
..
~
W
~5mV/0.00l"
I
~
I~
~
2 mV/O.OOI"'
. . ~N...
Air Gap
~ ~ !"'-- 0=0.100"
"" l" ~: 0~030"
00
.02
.?4
~MAGNETS
~ 0:0.000"
.O~ ... 08
.10
.12
.14
.16 .• 18 .20
AX1S.FROM CENTERLINE DISTANCE IN INCHES
DWIl."O.
9--45
'i.
~IO.9S8
HALL EFFECT DEVICES (Continued)
UGN·3501M Output Circuit Design
Note that the emitter-followers have no voltage
gain. The output voltage differential is essentially
the same as that of the UGN-3501M.
The output current handling capability of the
UGN-3501M is 0.5mA. In tbe differential connection one output pin sources load current, tbeotber
must sink it. A simple method for increasing drive
capability is illustrated below.
An operational amplifier will supply a voltage
gain and a current gain, and transform the differential output of the UGN-3501M to a single-ended
output. (The circuit will drive a load which has one
side grounded.)
"
+8to+16V
"
010\1. NO. :\-10.959
'0 kJ..
A 4.3 kn resistor is connected from each output
pin to ground. The quiescent bias current of the
output stage is increased, and the sinking capability
is increased to 1 mAo
If even higher current drive capability is required,
the simplest solution is the addition of a pair of
emitter-followers:
The LM-324 quad operational amplifier will operate from a single power supply if the output does not
swing in the negative direction. Pin 1 of the UGN3501M does swing negative when a magnetic South
pole approaches the device surface. Pin 1, therefore,
is 'connected to the negative or inverting input of the
LM-324, and its output swings in the positive direction. Reversing connections to pins 1 and 8 allows
the output to respond to a magnetic North pole. If the
application requires the output be capable of swing
both negative and positive, then a dual ± power
supply would have to be used.
82..
R2
Voltage amplification = Rl
with
Up to 30 rnA ofload current can be sourced by the
circuit as shown, and this can be increased considerably by using Darlington power transistors and lower
resistance in the emitter circuits.
Rl
= Ra
R2
=
R4
The LM-324 can source 40 rnA. Other operational amplifiers suitable for single supply operation
are MC-3403P, MC-3458Pl, CA-3160E.
9-46
HALL EFFECT DEVICES (Continued)
Current Sensing Applications
The UON-3501M is ideally suited for current
measurement applications. Typical applications are
overload detectors for electric motors, current limiters for high-current power supplies, clamp-on current probes for high-current d-c loads, etc.
A 470 ±5% resistor in series with pins~, and 6
extends .the useful linear range to 3000 gauss:
The standard toroid is typical of small
commercially-available electromagnetic devices
which can be used with the UON-3501M:
Voltmeter
10 ko>/V
Min.
UGN350lM
I" 0.0.,5/8" 1.0.
1/4" H., 0.08" GAP
Calibrating The UGN-3501M Gaussmeter .
With this toroid, the UON-3501M, fixed in the
gap, would "see" 5.6 gauss per ampere-turn; To
"read" from zero to 20 amperes, 9 turns would
develop 9 x 20 x 5.6 = 1008 gauss. The UON3501M would have a 1.4 volt output with a 20
ampere activating current.
Where applications require the differential output
voltage at pins 1 and 8 be calibrated,dualprecision
100 ohm variable resistors may be used:
VOLTMETER
10k0>/V
Min.
Gaussmeter Applications
•
•
ft
A typical UON-3501M has a differential output of
1400 mV in a 1000 gauss field. Using a 100 /J-A
movement, with a: series calibrating trimmer potentiometer, a simple gaussmeter suitable for many applications can be easily produced:
Voltmeter
10 kA/V M~n.
~Wti.
~C.
A- 10.;)1<9
A calibrati\>n field can be constructed using
standard Stancor Cc2709 filter chokes, with the pole
pieces removed and the center magnetic path completed with a section of the pole piece removed.
Brass stock 1/16 " x lh" x4%" was used for mechanical support, 2 pieces in the front and 2 pieces in the
rear, plus 41,4" x I" No. 6-32 threaded standoffs;
The air gap was set at %" as depicted below.
+8 to +.l6V
DWq.IIO. A-IO,952
The UON-3501M is quite linear to= 1000 gauss.
The input differential stage gain must be reduced to
maintain linearity beyond this range.
9-47
HALL EFFECT· DEVICES (Continued)
The chokes are wired in series opposing, and are
driven from a constant current source. Initial calibrationmay be accomplished with a UON-3600 Hall
generator supplied with a calibration curve. The current is fixed at the value which produces 1000 gauss.
The UON-350lM to .be calibrated is "zeroed"
and placed in the 1000 gauss field. The dual precision variable resistor is adjusted until the output is 1
volt. The UON-350lM circuit is re-zeroed out of the
field and the calibration rechecked.
The value of the precision variable resistor is then
measured. Two 1% resistors of the closest standard
value replace these in the final circuit configuration.
Check Oscillation Problems
NORMALIZED SENSITIVITY AS A FUNCTION
OF TEMPERATURE
1.05
Vee _'12 V
..........
I'.
Solutions to oscillation problems are: 1) cut the
zero control lead leng~s; 2) separate the zero control
and output leads; and 3) (in extreme cases) use a
low-pass filter on the output:
'" ...... "'" ......
1.00
'" ......
0.95
0.90
The UON-350lM has a relatively wide band
width. Oscillation is the most common problem encountered in applications for the device, caused by
excessive lead lengths (2") on the zero control, and
couPlmg b~tweenthe zero control leads and the
output leads from pins 1 ~d 8. (If moving your hand
near the zero control changes the output voltage there are oscillation problems.)
8,. 1000 GAUSS
o
R5C6~ 15~
-
RL =:> 10 k...
_
100...
......
.....
75
50
Z5
TEMPERATURE ("C)
NORMALIZED SENSITIVITY AS A FUNCTION OF Vee
I
1.00
[.....00"
",." ~
V
./
0.95
/
/
0.90
B = 1000 GAUSS
TA =
V
25°C
.
RL=~lOk...
I I
0.85
10
14
12
Vec iVOlTS)
-
16
lJ'i/IJ.NO.A-IO.529
RELATIVE OUTPUT VOLTAGE AS A FUNCTION
OF LOAD RESISTANCE
+Vcc
!l\O\l:
-
R 5-6-7 = 0
MO. ~!O.9!17
Sensitivity Variations ,
Note that the UON-350IM is specified, with a
typical sensitivity of 1.4 m V / gauss and a minimum
sensitivity of .7 mY/gauss. Unless a special "sort"
is ordered, plan on this variation.
-
t?q
0,
."
~.,
_~lternQti~e Output
Note also that the "0" output varies typically
1 mV/oC, a major factor in determiJ]ing a minimum
detectable long term signal.
~I
Circuit For lO'W
Impedance LDodS/
/
V"
:::--
The sensitivity varies with temperature and V CE'
The output voltage is a function of the load resistance. These factors are illustrated in the graphs at
right.
= 25°C
V
11
0
1
II
500
lK
2K
LOAD RESISTANCE (OHMS)
9-48
·15A
.., .,,~ [}=J"
~
200,
'" 12V
= 1000 GAUSS
~/
"
~i
Vee
B
TA
RS_6
5K
'OK
HALL EFFECT >DEVICES (Continued)
Type UGN-3604M/UGN-360SM Hall Cells
PACKAGE INFORMATION
Sprague's Hall Effect IC's are packaged in a special epoxy material formulated to handle severe service environments. It is impervious to all commercially available consumer and industrial solvents and
degreasing compounds, oils and alkaline chemicals.
It is susceptible only to hot (+ lSO"C) concentrated
fuming red nitric acid applied under pressure.
The UGN -3604 M is a basic Hall voltage generator
in an 8-pin DIP package, supplied with a calibration
chart. Intended for use as a design or production test
aid, the UGN-3604M permits accurate measurement
of magnetic field inlensity as a means of aligning
magnetIHall switch positions, and for calibrating
Hall Effect sensor circuits.
A UGN -360SM is the same Hall voltage generator
without a calibration chart. Supply voltage for these
units is S volts. Below is the terminal pinning diagram for UGN-360SM.
The'material has a continuous thermal rating of
and a hot-spot rating (100 hours) of
. + 170°C. It is classed by Underwriters'
Laboratories, Inc. as a self-extinguishing material.
Its resistivity is 101,5 ohms. Thermal coefficient of
expansion (To) is 30 x lO-~pm/oC.
+ISO°C,
Device leads will meet solderability requirements
of Military Standard MIL-STD-202 (9S% or better
solder-wetting without special preparation).
Dwg' .. No. A-Q.122
Catalog Numbering System
Applications at Sprague Electric Co.
rNe use them ... and love them}
UG
N - 3501
M
L
Hall Effect ICs are designed into Sprague's own
production and test equipment. Position-sensing digital switches control and monitor high-speed automatic machine operations. Hall Effect switch output
provides direct input to a microprocessor-based control I1nit.
Data is compiled continuously from critical points
in the production process. The control informs the
machine operator, makes automatic adjustments, indicates manual adjustments which may be necessary,
and reports on production.
PaellaleStyle
C = Chip
H = Hermetic DIP
M= Plastic DIP
S = Plastic 4-Pin SIP
T = Plastic 3-Pin SIP
U= Plastic 3-Pin SIP
' - - - - - - Device Number
' - - - - - - - - Temperature Ranp
N = DOC to +70°C
S = -40°C to + 125°C
Hall Effect ICs perform simultaneous control and
reporting functions. Extremely reliable precise repetitive operation of these switches helps to achieve
and maintain very high levels of process control and
product quality.
' - - - - - - - - - - - Semiconductor Family
UG = Hall Effect Device
9--49
HALL EFFECT DEVICES (Continued)
3-Pin "T" Pack or "U" Pack*
LOCATION OF SENSOR CIRCUIT
. TERft'\INAl LEAD DESIGNATION
.0.092
0,1116
ill
Tl4
UGN-3013T/U
UGN-3019T/U
UGS-3019T/U
UGN-3020T/U
UGS-3020T/U
1- Vee
z- GND
3- VOOT
nUn
UGN-3030T/U
UGS-3030T/u
UGN-350lT/u
UGN-3075T/U
UGS-3075T/U
UGN-3076T/U
UGS-3076T/U
0.118
r
<52
SENSOR
r----- ; r - l CENI£'
I
f
1
I
'
1
0061
rio
¥'---t-:-----1ft-+
t
0,118
4 52
I
I
!
INTEGRAI£6)---------J
• III
~,_CIR,ru~ITT~I~P~~~_.~~
DWG.NO.A-Il,OOSA
"The "r' package is 0.080" (Z.03 mm) thick; the "U" package is 0.061" (1.54 mm) thick; All other
dimensions are identical.
4-Pin "S" Pack
LOCATION OF SENSOR CIRCUIT,
TERMINAL LEAD DESIGNATION
Ii
--,I
I
I
.-~-.
2
i3
;os
I
I
--t:-t1-1
.002
I
UGN-3220S
4
SENSOR
.,CENTER
:
~
1 =GND
2 = VOUll
3 = YOUTz
owg. No. A-ll.105
4=YCC
IN
MM
Owg. No. A-ll.009
9--50
HALL EFFECT DEVICES (Continued)
8-Pin "M" Package
TERMINAL LEAD DESIGNATION
SENSOR CIRCUIT LOCATION
I NDEXIPI N NO. II
tt
UGN-3201M
UGN-3203M
Owg. No. A-Il,120
OUT l
7
CURRENT
SOURCE
IN
MM
UGN-3501M
SENSOR CENTER
Dwg.
Dwg. N(1. A-II,012
No. A-II,121
Magnet Marketplace
A representative listing:
A strong field of magnetic components manufacturers can supply parts suitable for use in virtually any
conceivable Hall Effect IC application. Comprehensive listings of these suppliers are presented in reference documents such as the Thomas Register.
Many of these firms are familiar with Hall Effect ICs
application.
Indiana General Magnet Products Co.
405 Elm SI.
Valparaiso, Indiana 46383
(219) 462-3131
Hitachi Magnetics Corporation
Edmore, Michigan 48829
(517) 427-5151
Xolox Corporation
3111 Covington Rd.
Ft. Wayne, Indiana 46804
(219) 432-4532
Magnetic components available from these manufacturers include ALNICO, rare-earth, ceramic, and
plastic permanent magnets in a variety of form factors such as rods, bars, rings, sheets, etc. Ferromagnetic components for use as electro-magnets,
concentrators, actuators, etc. are also available.
The Electrodyne Company, Inc.
4188 Taylor Rd.
Ontavia, Ohio 45103
(513) 732-2822
Stackpole Carbon Company
Magnet Division
Kane, Pennsylvania 16735
(814) 837-7000
Spectra-Flux, Inc.
124 Manfre Rd.
Watsonville, California 95076
(408) 722-8133
The Arnold Engineering Co.
Railroad Ave. & West, Box G
Marengo, Illinois 60152
(815) 568-2000
9-51
TRANSISTOR ARRAYS AND MISCELLANEOUS DEVICES
SECTION 10"--' TRANSISTOR ARRAYS AND MISCELLANEOUS DEVICES
ULN-203IA NPN 7-Darlington Array .................................. 10-2
ULN-2032A PNP 7-Darlington Array .................................. 10-2
ULN-2033A PNP 7-Darlington Array .................................. 10-2
ULS-2045H Hermetic NPN Transistor Array ............................. 10-4
ULN-2046A NPN Transistor Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-4
ULN-2046A-1 NPN Transistor Array .................................. 10-6
ULN-2047A Triple Differential Amplifier Array ........................... 10-7
ULN-2054A Dual Differential Amplifier Array ............................ 10-8
ULN-208IA NPNCommon-Emitter 7-Transistor Array. " " ................. 10-11
ULN-2082A NPN Common-Collector 7-Transistor Array ..................... 10-11
ULN-2083A Independent NPN 5-Transistor Array ......................... 10-12
ULN-2083A-1 Independent NPN 5-Transistor Array ........................ 10-14
ULS-2083H Hermetic Independent NPN Transistor Array .................... 10-12
ULN-2086A NPN 5-Transistor Array .................................. 10-15
ULN-2140A Quad Current Switch .....................................10-16
ULS-2140H Hermetic Quad Current Switch ............................. 10-16
ULN-2401ALamp Monitor ......................................... 10-18
ULN-2429A Fluid Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-20
ULN-2430M Timer ............................................... 10-23
ULN-3304M Schmitt Trigger ....................................... 10-26
ULN-3305M Dual Schmitt Trigger .................................... 10-29
ULN-3306M Dual Schmitt Trigger .................................... 10-31
ULN-3330Y Optoelectronic Switch ................................... 10-34
ULN-8126A Switched-Mode Power Supply Controller ....................... 10-37
ULN-8126R (SG3526J) Switched-Mode Power Supply Controller ............... 10-37
ULQ-8126A Switched-Mode Power Supply Controller ....................... 10-37
ULQ-8126R (SG2526J) Hermetic Switched-Mode Power Supply Controller ........ 10-37
ULS-8126R (SG1526J) Hermetic Switched-Mode Power Supply Controller ........ 10-37
ULN-8160A (NE5560N) Switched-Mode Power Supply Controller .............. 10-42
ULN-8160R (NE5560F) Hermetic Switched-Mode Power Supply Controller ........ 10-42
ULS-8160R (SE5560F) Hermetic Switched-Mode Power Supply Controller ........ 10-42
ULX-8161M (NE5561N) Switched-Mode Power Supply Controller .............. 10-45
TPP - Series of Medium-Power Darlington Arrays ....................... 10-47
TPQ - Series of Quad Transistor Arrays .............................. 10-48
Application Note:
ULN-3300M Series Schmitt Triggers ................................ 10-50
10-1
ULN-2031A, ULN-2032A, and ULN-2033A
HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
ULN·2031 A, ULN·2032A, and ULN·2033A
HIGH·CURRENT DARLINGTON TRANSISTOR ARRAYS
TYPE ULN-2031A, ULN-2032A, and
SPRAGUE
ULN-2033A High-Current Darlington Transistor Arrays are comprised of seven silicon Darlington pairs on a common moilOlithic substrate. The
Type ULN-203IA consists of 14 NPN transistors
connected to form seven Darlington pairs with NPN
action. The Type ULN-2032A (hFE = 500 min.) and
the Type ULN-2033A (hFE = 50 min.) consist of
seven NPN and seven PNP transistors connected to
form seven Darlington pairs with PNP action. All
devices feature a common emitter configuration.
ULN-2031A
These devices are especially suited for interfacing
between MOS, TTL, or DTL outputs and 7-segment
LED or tungsten filament indicators. Peak inrush
currents to 100mA are allowable. They are also
ideal for a variety of other driver applications such
as relay control and thyristor firing.
Type ULN-2031A, ULN-2032A, and ULN-2033A
transistor arrays are housed in l6-lead DIP plastic
packages which include a separate substrate connection for maximum circuit design flexibility.
ULN-2032A
ULN-2033A
10-'--2
ULN-20l1A, ULN-20l2A, and ULN-20llA
HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
(unless otherwise noted)
Power Dissipation (anyone Darlington pair).
(total package).
Derating Factor Above +2SoC...... . ..
. ..
Ambient Temperature Range (operating), TA.
Storage Temperature Range, Ts ....
Individual Darlington Pair Ratings:
Collector·to·Emitter Voltage, VeEO ..
Collector-to· Base Voltage, Veso ...
Collector·to·Substrate Voltage, Velo .
Emitter·to·Base Voltage, Veso
Type ULN·2031A
..
Type ULN·2032A and ULN·2033A ..
Continuous Collector Current, Ie.
Continuous Base Current, Is
. .................... SOOmW
. ....................... 7S0mW
.. .6.67mWrC
. .. - 20°C to +BSoC
. ..-5SoC to + 125°C
. ......... 16V
. ..... AOV
. ...... 40V
. ...... SV
.. .......... AOV
..
. ............ BOmA
..................................... SmA
NOTE:
The substrate must be connected toa voltage which is more negative than any collector or base voltage so as to maintain isolation between
transistors, and to provide normal transistor action.
ELECTRICAL CHARACTERISTICS at TA
=
+ 25°C
Cha racteristic
Symbol
Test Conditions
Collector· Base Breakdown Voltage
Coliector·Substrate Breakdown Voltage
Coliector·Emitter Breakdown Voltage
Emitter·Base Breakdown Voltage
Type ULN·2031A
Type ULN·2032A and ULN·2033A
D·C Forward Current Transfer Ratio
Type ULN·2031A and ULN·2032A
Type ULN·2033A
Base- Emitter Saturation Voltage
Type ULN·2031A
Type ULN·2032A and ULN·2033A
Collector· Emitter Saturation Voltage
Type ULN·2G31A and ULN·2032A
BVeso
BVeio
BV eEo
BVEso
Ie =
Ie =
Ie =
IE =
hFe
VSE(SATI
Ie = 20mA, Is = SOO}LA
leEO
leso
Ie = 20mA,
Ie = 80mA,
Ie = 20mA,
Ie = 80mA,
VeE = 8V
Ves = lOV
10--3
Is
Is
Is
Is
=
=
=
=
40}LA
ImA
400}LA
2mA
Units
40
40
16
-
-
-
-
V
V
V
S
40
-
-
V
V
500}LA
SOO}LA
ImA
SOO}LA
VeE = 2V, Ie = 20mA
Limits
Typ.
Max.
-
-
SOO
SO
-
SOO
-
-
2
1
V
V
-
1.2
1.5
1.2
1.S
100
10
V
V
V
V
}LA
}LA
VeE(SATI
Type ULN·2033A
Collector Cutoff Current
Min.
-
-
-
-
-
ULS-204SH and ULN-2046ATRANSISTOR ARRAYS
ULS·2045H and ULN·2046A TRANSISTOR ARRAYS
(Three Isolated Transistors
and One Differential Amplifier)
ULS-2045H and ULN-2046A are general-purT HE"
pose transistor arrays each consisting of five silicon N-P-N transistors on a single monolithic chip.
Two transistors are internally connected t9 form a differential pair. Integrated circuit construction provides close electrical and thermal matching between
each transistor.
These arrays are well-suited for a wide range of applications such as: DC to VHF signal processing
systems; temperature-compensated amplifiers; custom
designed differential amplifiers and discrete transistors
in conventional circuits.
Two package configurations are available. Type
ULS-2045H is supplied in a hermetic l4-1ead dual inline ceramic package and is rated for operation over
the military temperature range of _55°C to +125°C.
Type ULN-2046A is electrically identical to the ULS2045H but is supplied in a dual in-line plastic package
rated for - 20°C to +85°C ambients.
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
(unless otherwise noted)
ULS-2045H'
Power Dissipation:
TA to+55°C ... .
TA to +75°C .......... .
Derating Factor:
TA >+55°C ..
TA >+75°C ...
EACH
TRANSISTOR
300
-
ULN-2046A
TOTAL
PACKAGE
750
8
EACH
TRANSISTOR
300
TOTAL
PACKAGE
750
-
-'
-
6.67
-
UNITS
mW
mW
mW;oC
mW/oC
............... 3,OV
Collector-Base Voltage, VlsRleso .....
Collector-Emitter Voltage, VlsoleEo
Collector-Substrate Voltage, VIBOICIO (See note 2)
Emitter-Base Voltage, VIBRIEBO ..
Collector Current, Ie ....
Operating Temperature Range, TA:
Type ULS-2045H.
Type ULN-2046A.
Storage Temperature Range, T5 :.
............
. ........... 20V
.......... 20V
. ........... 6V
............ 50mA
............ -55°C to + 125°C
. ..............-200( to +85°(
.. -65°C to + 150°C
Notes:
1.
The maximum ratings are limiting absolute values above which the serviceability may be impaired from the viewpoint of life or satisfactory performance. The breakdown voltages may be far above the maximum voltage ratings. To ovoid permanent damage to the transistor, do not
attempt to measure these characteristics above the maximum ratings.
2.
Pin 13 is connected to the substrate. This terminal must be tied to the most negative point in the external circuit to maintain isolation between
transistors and to provide for normal transistor action.
10-4
ULS-2045H and lILN-2046A TRANSISTOR ARRAYS
STATIC ELECTRICAL CHARACTERISTICS at TA
Characteristic
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage,
Emitter-Base Breakdown Voltage
Collector Cutoff Current
Static Forward Current
Transfer Ratio
Collector-Emitter. Satu ration
Voltage
Base-Emitter Voltage
Input Offset Current for
Matched Pair 01 and O2
Magnitude of I~put Offset
Voltage for Differential Pair
Magnitude of Input Offset , .
Voltage for Isolated Transistors
Temperature Coefficient of
Base-Emitter Voltage
Temperature Coefficient
Magnitude of Input.Offset Voltage
= +25°C
Symbol
VSR eso
VISRleEO
VSRlelO
V1SR)ESO
leso
leEO
hFE
VeElSATI
Characteristic
Small-Signal Common-Emitter
Forward Current Transfer Ratio
Small-Signal' Common"Emitter
Short-Circuit Input Impedance
Small-Signal Common-Emitter
Open-Circuit Output Impedance
Small-Signal Common-Emitter
Open-Circuit Reverse
Voltage-Transfer Ratio
Gain-Bandwidth Product
Emitter-to-Base Capacitance
Collector-to-Base Capacitance
Collector-to-Substrate
Capacitance
Noise Figure
Min.
20
15
20.
5
limits
Typ.
60
24
60
7
Max.
4U
0.5
40
54
100
100
0.23
Units
V
V
V
V
nA
pA
-
-
V
"
1101-1102
I - ImA, VeE - .3V
IE - lOrnA, VeE - 3V
Ie - ImA, VeE - 3V
0.715
0.800
0.3
2
V
V
pA
VSEI -VBE2
Ie - lmA, VCE - 3V
0.45
5
,mY
VSEl-VSE4
VsE4-V m
Vm-VBE3
/lV sE
Ie - lmA, VeE Ie - lmA, VeE Ie = ImA, VCE =
Ie - lmA, VeE -
0;45
0.45
0.45
5
mV
mV
mV
mY/DC
VSE
3V
3V
3V
3V
5
5
-1.9
"3T
/lV IO
Ie
aT
DYMAMIC ELECTRICAL CHARACTERISTICS at TA
.
Test Conditions
Ie - 10pA, IE - 0
Ie = ImA, Is = 0
Ie , 10pA, lei - 0
IE -' rOpA, Ie - O.
Ves - luV, IE - U
VeE - lOY, Is - 0
Ie - 10pA, VeE - 3V
Ie - lmA, Ve, - 3V
Ie - lOrnA, V E- 3V
Ie = lOrnA, Is = lmA
Symbol
hI;
=
lmA, VCE
n'
= 3V
iLV/bC
= +25°C ;
Test Coilditions
Ie - lmA, VeE - 3V, f - 1kHz
hie
Ie - ImA, VeE - 3V, f - 1 KHz
hoe
Ie ,= lmA, VeE
h~
Ie
fT
CES
CeR
Cel
Ie = 3mA, VeE = 3V
VES - 3V; I[ - 0, f - lMHz
VeR - 3V, Ie - 0, f - lMHz
Ves - 3V, Ie - 0, f - lMHz
NJ.
Ie - 100pA, VeE - 3V, Rg - lkfl
f = 1 kHz BW = 15.7 kHz
=
lmA, VCE
NOTE:
Characteristics apply for each transistor unless otherwise specified.
10-5
Min.
limits
Typ.
no
Units
-
3.5
kfl
p,mho
= 3V, f =
1kHz
15.6
= 3V, f ==
1kHz
1.8 x 10-4
300
Max.
-
550
0.6
0.6
2.8
MHz
pF
pF
pF
3.25
dB
UlN·2046A·1TRANSISTOR ARRAY
ULN .. 2046A·l TRANSISTOR ARRAY
"
TYPE ULN-2046A-l general-purpose transistor
.
array consists of five silicon NPN transistors,
two of which are connected as a differential
amplifier. The monolithic construction provides
close electrical and thermal matching between all
transistors .
Except as shown in the following electrical
characteristics, Type ULN-2046A-I transistor array
is identical to Type UI;,N-2046A.
ELECTRICAL CHARACTERISTICS at TI = + 25°C
Characteristic
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage
Collector Cutoff Current
Static Forward Current
Tra nster Ratio
Symbol
BVcao
BVcEO
BV 10
IcBO
IcEO
hfE
Test Conditions
Ic '- 10 lolA, IE - 0
Ic - 1 rnA, la - 0
Ic - 10 lolA, ICI - 0
Vca -10V,I E-0
VCE - 10 V, la - 0
Ic - 1 rnA; VCE - 3 V
NOTE:
Pin 13 is connected to the substrate, This terminal must be tied to the most negative point in the
external circuit to maintain isolation between transistors and to provide for normal transistor action,
10--6
Min.
40
30
40
Typ.
60
-
-
30
100
-
60
Limits
Max.
-
100
5.0
-
Units
V
V
V
nA
lolA
ULN-2041A TRANSISTOR ARRAY
ULN-2047A TRANSISTOR ARRAY
(Three Differential Amplifiers)
ULN -204 7 A is a silicon NPN multiple tranT YPE
sistor array comprising three independent differential amplifiers. It is specifically intended for use
in switching applications such as ekctronic organ
keyboards. All base leads are brought out on one side
of the l6-1ead plastic dual in-line package to simplify
printed wiring board layout. A separate substrate
connection permits maximum circuit design flexibility.
Type ULN -204 7 A is supplied in a 16-pin dual
in-line plastic package.
ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Power Dissipation, PD (anyone transistor) .. , ......................... 300 mW
(total package) ............................... 750 mW*
Operating Temperature Range, TA .•..•.••.••.••..•.••.•••..• -20°C to +85°C
Storage Temperature Range, Ts ............................ -55°C to +150°C
• Derate at the rate of 6.67 mW;oC above 25°C.
ELECTRICAL CHARACTERISTICS at 25°C Free-Air Temperature
Collector-Emitter Breakdown Voltage, BVcEo (note 1)
at Ic = 5 rnA ...................................................... 30 V Min.
Emitter Cutoff Current, IEso (note 2)
at VES = 5 V .........................................•.......... 100 nA Max.
Collector Cutoff Current, ICES (note 1)
at VCE = 25 V................................................... 100 nA Max.
D-C Forward Current Transfer Ratio, hFE (note 1)
at VCE = 2 V, Ic = 0.1 rnA ............................................ 30 Min.
at VCE = 2V, Ic = 10 rnA ............................................ 75 Min.
Differential Input Offset Voltage, VIO (note 1)
at VCE = 2 V, IC1 = IC2 = 1 rnA ................................... 5 mV Max.
---
NOTES:
1. All other pins common to emitter of transistor under test.
2. Base and collector of associated transistor connected to emitter, all other pins common to base of transistor under test.
10--7
ULN-20S4A TRANSISTOR ARRAY
ULN·2054A TRANSISTOR ARRAY
(Dual Independent Differential Amplifiers)
THE ULN-2054A is a transistor array consisting of
six silicon NPN transistors on a single monolithic
chip. The transistors are internally interconnected to
form two independent differential amplifiers.
The ULN-2054A is intended for a wide range of applications requiring extremely close electrical and thermal matching characteristics. Some applications are:
cascade limiter circuits; balanced mixer circuits; balanced quadrature/synchronous detector circuits; balanced (push-pull) cascade/sense/IF amplifier circuits;
or in almost any multifunction system requiring RF /
Mixer/Oscillator, converter/IF functions.
Other features are:
Available in a 14-lead dual in-line plastic package
the ULN-2054A is rated for operation over a -20 0 e
to +85°C ambient temperature range.
•
Input Offset Voltage - SmV max.
•
Input Offset Current - 2 MA max.
•
Voltage gain (single-stage double ended output)
- 32 dB typo
•
Common-Mode Rejection Ratio (each amplifler)
- 100 dB typ.
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
(unless otherwise noted)
Power Dissipation TA to +SsoC:
Each Transistor .......................................................................... 300mW
Total Package ......................................................................... . 7S0mW
Derating Factor, Total Package, TA~SSoC ................................................... 6.67mW;oC
Collector-Base Voltage, V(BRICBO ................................................................... 20V
Collector-Substrate Voltage, V(BRICIO (See note 2) ..................................................... 20V
Collector-Emitter Voltage, V(BRlceo ................................................................... ISV
Emitter-Base Voltage, V(BRIEBO ..................................................................... SV
Collector Current, Ic ........................................................................... SOmA
Base Current IB . . . . .. . ......................................................................... SmA
Operating Temperature Range, TA . . ... . . . . . .
. .....................................-20°C to +85°C
Storage Temperature Range, Ts ...................................................... -6SoC to
IS0°C
+
Notes:
1.
2.
.
The maximum ratings are limiting absolute values above which the serViceability may be impaired from the viewpoint of life or satisfactory
performance. The breakdown voltages may be far above the maximum voltage ratings. To avoid permanent damage to the transistor, do
not attempt to measure these characteristics above the maximum ratings.
Pin 5 is connected to the substrate. This terminal must be tied to the most negative point in the external circuit to maintain isolation between
transistors and to provide for normal transistor action.
10-8
ULN-20S4A TRANSISTOR ARRAY
STATIC ELECTRICAL CHARACTERISTICS at TA
Chara cteri stic
Collector-Base Breakdown Voltage
Collector-Substrate Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Cutoff Current
Base-Emitter Voltage
+ 25°C
=
Symbol
VIBRICBO
VIBRICIO
VBRICEO
VIBR£BO
ICBO
VB£
Temperature Coefficient of Base-Emitter ~VB£
Voltage
""Xl
Input Offset Voltage
VIO
Input Offset Current
Of 0
Input Bias Current
If
Quiescent Operating Current Ratio
Iclo !)
1;;"
IC(Q~
Test Conditions
Ic = 10 1lA, 1£ = 0
Ic = 10 1lA, ICI = 0
Ie - 1 rnA, I - 0
1£ - 10 1lA, Ic - 0
VCB - 10 V, 1£ - 0
Ic = 50 1lA, V~ = 3 V
I = 1 rnA, VCB = 3 V
Ic - 3 rnA, VCB - 3 V
Ic - 10 rnA, VCB - 3 V
Ic - 1 rnA, VCB - 3 V
l£f03 1£1031 1£I03L 1£1031 =
Min.
20
20
15
5
Limits
Typ.
60
60
24
7
0.630
0.715
0.750
0.800
-1.9
0.45
0.3
10
0.98-1.02
1£(04 - 2 rnA, VCB - 3 V
1£1041 - 2 rnA, VCB - 3 V
111041 - 2 rnA, VCB - 3 V
2 rnA, VCB = 3 V
1£1041 - 2 rnA, VCB - 3 V
0.98-1.02
1£1031
= 1£1041 = 2 rnA,
1.1
=
+ 25°C
Max.
100
0.700
0.800
0.850
0.900
5
2
24
Units
V
V
V
V
nA
V
V
V
V
mVrC
mV
IlA
IlA
-
-
1;;"
Temperature Coefficient
Magnitude of Input-Offset Voltage
~VIO
TT
DYNAMIC ELECTRICAL CHARACTERISTICS at TA
Characteristic
Common-Mode Rejection Ratio
For Each Amplifier
AGC Range, One Stage
Voltage Gain, Single Stage
Dou ble-Ended Output
AGC Ra nge, Two Stage
Voltage Gain, Two Stage
Dou ble-Ended Output
Small-Signal Common-Emitter
Forward Current Transfer Ratio
Small-Signal Common-Emitter
Short-Circuit Input Impedance
Small-Signal Common-Emitter
Open-Circuit Output Impedance
Small-Signal Common-Emitter
Open-Circuit Reverse
Voltage-Tra nsfer Ratio
Gain-Bandwidth Product
(for Single Transistor)
Noise Figure (for Single Transistor)
Noise Figure (for each Amplifier)
Symbol
CMR
VCB - 3 V
Limits
Typ.
100
hie
hie
Ie
1kHz
3.5
kO
hoe
Ic - 1 rnA, Vcr - 3 V, f - 1kHz
15.6
/1-mh O
hre
Ic
f]
Ic - 3 rnA, VCE - 3 V
550
MHz
N.F.
VeE = 3 V, f = 1kHz, Ie = 100 1lA,
R, = lkO, BW = 15.7 kHz
f - 100 MHz
3.25
dB
8
dB
A,
AGC
A,
N.F.
=
=
1 rnA, Vcr
1 rnA, VCE
NOTE:
Characteristics apply for each transistor unless otherwise specified.
10-9
= 3 V, f =
=
3 V, f
=
1kHz
Max.
Units
dB
Test Conditions
Vcc - 12 V, V££ - -6 V, Vx - 3.3 V,
f = 1kHz (See figure 1)
Vcc - 12 V, V££ - 6 V, Vx - 3.3 V,
f = 1kHz (See figu re 2)
Vcc = 12 V, V££ = -6 V, Vx = 3.3 V,
f = 1kHz (See figure 2)
Vcc = 12 V, V££ = -6 V, Vx - 3.3V,
f = 1kHz (See figure 3)
Vcc = 12 V, V££ = -6 V, Vx = 3.3 V,
f = 1kHz (See figure 3)
Ic - 1 rnA, VC£ - 3 V, f - 1kHz
AGC
Min.
/1-VrC
75
dB
32
dB
105
dB
60
dB
110
-
1.8 x'lO'
-
ULN-20S4A TRANSISTOR ARRAY
Vee
10---1 vou,
VjN=().3Vrms
AMPLIFIER TEST CIRCUITS
1
COMMON MODE REJECTION RATIO
Figure 1
Vee
0.1"'1
Vee
IK
IK
IK
IK
1o-_ _ tVOUT
IK
IK
IK
Vx
VeE
SINGLE-STAGE VOLTAGE GAIN
TWO-STAGE VOLTAGE GAIN
Figure 2
Figure 3
10-10
IK
ULN-20S1A and ULN-20S2A
GENERAL PURPOSE HIGH-CURRENT TRANSISTOR ARRAYS
ULN-2081Aand ULN-2082A
GENERAL PURPOSE HIGH-CURRENT TRANSISTOR ARRAYS
TYPE ULN-208IA and ULN-2082A
SPRAGUE
Transistor Arrays are comprised of seven highcurrent silicon NPN transistors on a common monolithic substrate. The Type ULN-208IA is connected
in a common-emitter configuration and the Type
ULN-2082A isc()nnected in a common-collector configuration.
Both arrays are capable of directly driving seven
segment displays and LED displays. They are ideal
for a variety of other driver applications such as relay
control and thyristor firing.
Type ULN-208IA and ULN-2082A are housed in
l6-lead DIP plastic packages which include a separate substrate connection for maximum circuit design
flexibility.
DWG. NO. A-90lI-2B
DWG. NO. A-901.13B
ULN-2081A
ULN-2082A
ABSOLUTE MAXIMUM RATINGS
Power Dissipation (anyone transistor) ... .
(total package) .......... .
Ambient Temperature Range (operating).
Individual Transistor Ratings:
Collector-to-Emitter Voltage, VCEO
Collector-to-Base Voltage, VCBO
Collector -to-Substrate Voltage, VCIO ..
Emitter-to-Base Voltage, VEBO .
Collector Current, Ic.
Base Cu rrent, Is. . ................................. .
. ...... 500mW
. .. 750mW
-20°C to +85°C
........ , ... 16V
............ 20V
. ......•.. 20V
.. : .......... 5V
. ........ 200mA
. .......... 20mA
NOTE:
The collector of each transistor in the Type ULN·2081A and ULN-2082A is isolated from the substrate by an integral diode. The substrate must be
connected to a voltage which is more negative than any collector voltage so as to maintain isolation between transistors, and to provide normal transistor action. Undesi red coupling between transistors is avoided by mai ntai ning the substrate terminal (5) at either doc or signal (a·c) ground. An apprupriate bypass· capacitor can be us~d to establish a signal ground.
ELECTRICAL CHARACTERISTICS atTA =
+ 25°C
Symbol
Characteristic
Collector -Emitter Breakdown Voltage
Collector -Substrate Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Forward Current Transfer Ratio
BVcEs
BV CIE
BV CEO
BVEso
h'E
...
Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
V.EISAll
VCEISAT!
Collector Cutoff Current
ICEO
ICBO
Test Conditions
Ic = 500,uA
ICI= 500,uA
Ie = ImA
Ic= 500,uA
VCE = 0.5V,lc = 30mA
VCE = 0.8V,Ie =0 50mA
.
Ie = 30mA
Ic = 30m A
Ic =50mA
VCE = lOV
Vcs'= lOV
10-11
Min.
'.'
20
20
16
5
30
40
Limits
Ty.p. Max.
80
80
40
7
80
85
0.75
0.l3
02
Units
V
V
V
V
1
0.5
0.7
10
1
V
V
V
,uA
p.A
.
ULN-2083A and ULS-2083H TRANSISTOR ARRAYS
ULN·2083A and ULS·2083H TRANSISTOR ARRAYS
(Five Independent NPN Transistors)
for use in general purpose, medium
D ESIGNED
current (to 100 mAl switching and differential
amplifier applications, the ULN-2083A and ULS2083H transistor arrays each consist of five NPN
transistors on a single monolithic chip. Two transistors are matched at low currents (I mAl making them
ideal for use in balanced mixer circuits, push-pull
amplifiers, and other circuit functions requiring close
thermal and offset matching.
A separate substrate connection permits maximum
circuit design flexibility. I n order to maintain isolation between transistors and provide normal transistor action, the substrate must be connected to a voltage which is more negative than any collector voltage.
The substrate terminal (pin 5) should therefore be
maintained at either doc ground or suitably bypassed
to a-c ground to avoid undesired coupling between
transistors.
CWG. NO. A-IO.232
JEDEC style MO-OOIAC. The Type ULS-2083H is
electrically identical to the ULN-2083A but is supplied
in a hermetic dual in-line package for operation over
the temperature range of _55°C to +125°C. This
package conforms to the dimensional requirements of
Military Specification MIL-M-38510 and can meet
all of the applicable environmental requirements of
Military Standard MIL-STD-883.
Two package configurations are available. The
Type ULN-2083A is supplied in a 16-lead dual in-line
plastic package for operation over the temperature
range of -20o to +85°C. This package is similar to
e
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Power Dissipation, PD (anyone transistor) .................................................................... 500 mW
(total package) ........................................................................ 750 mW*
Operating Temperature Range, TA(ULN-2083A) ....................................................... -20°C to +85°C
(ULS-2083H) ...................................................... -55°C to + 125°C
Storage Temperature Range, T5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +150°C
"Derate at the rate of 6.67 mW/,C above 25'C.
ELECTRICAL CHARACTERISTICS at + 25°C Free-Air Temperature
Characteristic
Symbol
Test Conditions
Min.
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Cutoff Current
BV cBo
BV cEo
BV clo
BV EBo
ICEO
IcBO
VBE
VCEISATJ
hFE
Ic = 100 JlA
Ic - 1 mA
ICI = 100 JlA
IE =5UO JlA
VeE = lOV
VcB =10V
VCE = 3V, Ic = IOmA
Ic = 5U mAo IB = 5 mA
VCE = 3 V, Ic = 10 mA
VCE = 3V, Ic = 50mA
VCE = .3 V, Ic = 1 mA
VCE = j V, Ic = 1 mA
20
15
20
5.0
Base-Emitter Voltage
Collector -Emitter Saturation Voltage
D-C Forward Current Transfer Ratio
Differential Input OffsefVoltage*
Differential Input Offset Current*
VIO
110
"Applies only to transistors Ql and Q, when connected as a differential pair.
10-12
650
40
40
-
Limits
Typ.
Max.
60
24
60
6.9
740
400
76
75
1.2
0.7
-
10
1.0
850
700
-
Units
V
V
V
V
JlA
JlA
mV
mV
5.0
2.5
mV
JlA
ULN·2083A and ULS·2083H TRANSISTOR ARRAYS
COLLECTOR· EMITTER SATURATION VOLTAGE
AS A FUNCTION OF COllECTOR CURRENT
D·C FORWARD CURRENT TRANSFER RATIO
AS A FUNCTION OF COLLECTOR CURRENT
.....--....
VV
~
•
V
V
V
/
V/ /",
V
50
01
7
/W
-UJ
---- -i--ll
....-
V
4
0.3
1.0
3
3.0
30
10
aJRRENT, Ie, IN mA
100
20
~
1.0
--
~V
~ i 7
50
10
0.9
~
L
7".,
.".
~
.".
6
.........
./"
.........
li.O
10
20
COLLECTOR CURRENT, Ie IN mA
50
......-
OJ
100
03
()\\\l.NO.A-1O.237
I
I~
I
I
30
1.0
30
10
:COLLECTOR CURRENT, Ie IN rnA
100
DIFFERENTIAL INPUT OFFSET CURRENT
AS A FUNCTION OF COLLECTOR CURRENT
I
~1IcE'3V
TA .. 25"(;
--G""3V
Q,"aturatlon vOltage
Latch Voltage
Trigger Threshold
Reference
Temp. Coeff. of
Trigger Threshold·
Trigger Input Current
Capacitor Discharge Time
Su pply Cu rren t
Test
Pin
=
+25°C (unless otherwise noted), Fig. 1
Test Conditions
5
2
2
4
7
8
ILEAK = 100 pA
lOUT - 400 rnA
1010 - 250 rnA
Over Op. Temp. Range
VN5
VJV
7
7
5
Typ.
10
8.4
30
9.0
16
10.1
-
-
2.5
7.0
0.63
0.63
8.0
0.67
0.68
-4.0
mV;oC
200
2.0
10
nA
s
rnA
5.5
0.60
0.58
-2.0
I
-
C = 220 ILF, ±10%
Vee = 16 V
Limits
Max.
Min.
-
20
-
-
1.3
Units
V
V
V
V
V
V
CIRCUIT OPERATION
The basic system shown in Figure 1 provides
power for the timer after the momentary closure of
the "rear window heater switch" S.. Momentary
closure provides an input to pin 4 which turns ON the
outpu~ driver, energizes the relay, and (through the
relay contacts) provides power to the timer and the
heater element. Wavefonns, are shown in Figure. 2.
The output remains ON, supplying power to the
heater until V7 = 62% V~, which ocCurs at time t =
R. X C•. The time delay can be adjusted from several
microseconds to approximately 10 minutes by the
choice of R. and C•. When t = R. X C., the comparator changes state and the relay de-energizes,
returning the circuit to the quiescent condition.
Timing accuracy is primarily a function of capacitor leakage for long time delays. Hard switching of
the comparator necessitates low input bias currents
on the comparator and low capacitor leakage current. The worst case comparator input is 200 nA and
the charge current at V7 = 62% V~ is approximately
1.7 IJ-A for R. = 2 MO. For these reasons, it is
recommended that R. not exceed 2 M!l and C1 leakage be less than 500 nA.
Diode D. and the circuitry associated with pin 4
provide start-stop capability for the timer. When the
voltage at pin 4 is larger than 8 V timing is initiated.
When less.than 5.5 V, timing is stopped. Transient
protection against load dump and other automotive
environmental hazards is provided by the integrated
circuit design and discrete components Z., C2 , R3 ,
~,and
10-24
D•.
ULN-2430M TIMER
TYPICAL APPLICATION
{Figure 1)
TIMER WAVEFORMS
V4
"'J
9.0 V
L
,.,
I
Vs
D\'f.t.NO.A-IO.8ltll
10-25
U1N-3304M SCHMITT TRIGGER
ULN·3304M SCHMITT TRIGGER
- ZENER CLAMPED OUTPUT
FEATURES
.2.2 to 6V Supply Voltage Range
• Wide Operating Temperature Range
• Stable Predictable Switching Levels
• Input to Output Isolation
• 10% Hysteresis
DII'Q.HO.A-SII-25A
INTENDED for driving inductive loads, the Type
ULN-3304M is a threshold detector with a Zener
diode clamped output. The high gain. circuitry can
control a lS0mA load with less than SOnA input current. This monolithic integrated circuit is often used
as a low voltage relay driver in battery operated consumer electronic equipment. An . important feature
for these applications is that the Type ULN-3304M
Schmitttrigger will sustain battery reversal indefinitely
without damage.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ................................. S.5V
Output Current, lour ............................. .160mA
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vee
Power Dissipation, PD ............................ 750mW
. Operating Temperature Range, TA •••••••. -40·C to +100·C
Storage Temperature Range, Ts .... , .... -55·C to +125·C
SCHEMATIC
10-26
ULN-3304M SCHMITT TRIGGER
ELECTRICAL CHARACTERISTICS at Vee = 2.2 to 6.0V and TA = +2S oC
(Unless Otherwise SpeciAed)
Characteristic
Symbol
"Off" Inout Voltaoe
"On" Input Voltage
Outout Clamo Voltaoe
Output Saturation Voltage
Input Current
Supply Current
Output Fall Time
Output Rise Time
PropagatiJn Delay Time
Threshold Stability
Test Pin
V,~'u,
Test Conditions
7
7
3
3
V,NIL)
Vz
VeEISAT)
Y,N Vee
Y,N - 0, lOUT = 100mA
Y,N 0, lOUT 150mA
Y'N Vee
Y'N Vee 5.0V
5.0V
Y,N 0, Vee
7
6
liN
leelH
leelLi
tf
t,
t.d
6
Min.
Typ.
a.56
0.50
12
0.62
0.55
14
10
3
3
= -40·C to +lOO·C
0.66
0.58
16
0.5
0.8
50
5
13
3
TA
Limits
Max.
±2
0.2
0.2
2.0
±5
Units
VINlVrr
Y,N/Vee
V
V
V
nA
mA
mA
J.lS
J.lS
J.lS
%
TYPICAL APPLICATIONS
1.
VIN(H) ~VIN(l) (typically 70mV) will cause the output
to switch ON and OFF producing a square wave.
The symmetry of the square wave can be changed by
varying the ratio of the input biasing resistors.
Sine Wave To Square Wove Converter
The input is biased to within the hysteresis region.
An input with a peak-to-peak voltage greater than
+5V
r
R
7
L
ULN~3304M
3
OUTPUT
INPUT
1.4R
1
10-27
ULN-3304M SCHMITT· TRIGGER
TYPICAL APPLICATIONS
(Continued)
2.
H2V
ULN-3304M
r---4-----
'.4R
10-32
.JLJL
OUTPUT
ULN-3306M DUAL SCHMITT TRIGGER
TYPICAL APPLICATIONS
(Continued)
2.
+5V
Light-Actuated Switch
Light falling on the photo~sensitive resistor reduces
its resistance and lowers the input bias voltage causing
the output to switch ON. The sensitivity can be varied
by adjusting the value of the fixed resistor. For the
output to switch OFF in the presence of light, interchange the two resistors.
7
ULN-3306M
+12V
f---4---o
OUTPUT
O'liG. NO. A-9424
3.
prior to. opening St, the self-latching contact of the
relay will apply power to the headlights for the time
determined by the values of Rand C. For example,
if R is 3.6M nand Cis IOO.uF, then t is 6 minutes.
Automotive Headlight Timer
Switch Sl controls the headlights in the normal fashion. However, if momentary switch S2 is operated
r---1--""
ULN-3306
F-------'
DWG. NO.
10-33
ULN·3330Y OPTOELECTRONIC SWITCH
ULN·3330Y OPTOELECTRONIC SWITCH
FEATURES
•
•
•
•
•
•
•
On-Chip Photodiode
On-Chip Amplifier
On-Chip Trigger
On-Chip Power Driver
On-Chip Regulator
Operation to 30 kHz
TO-92 Clear Plastic Package
tion increases by approximately 18%. For comparative purposes, twilight is about 1 Im/ft2 while an
overcast day is about 100 1m 1ft 2. Typical loads include an incandescent lamp, LED, sensitive relay,
doc motor, TTL or CMOS (with appropriate pull-up
resistor).
pROVIDING all of the necessary circuitry in a
single 3-lead clear plastic package, Type ULN3330Y Optoelectronic Switch is a monolithic integrated circuit containing a photodiode, low-level
amplifier, level detector, output power driver, and
voltage regulator. It can be used as a low-cost
photo-detector in consumer or industrial applications
and requires only the absolute minimum in external
components for operation.
The photodiode has an enhanced blue response for
improved sensitivity to visible light. The switch typically turns ON as illumination of the device falls
below 51m 1ft 2 • An internal latch provides hysteresis
so that the output will not turn OFF until the illumina-
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ........................... 15 V
Output Voltage, Vour ........................... 15 V
Output Current, loUT .......................... 50 rnA
Package Power Dissipation, Po ............... See Graph
Operating Temperature Range, T, .......... O°C to +70°C
Storage Temperature Range, Ts ........ -60°C to + 150°C
FUNCTIONAL BLOCK DIAGRAM
DWI}. No. A-ll,l27A
10-34
ULN-3330Y OPTOELECTRONIC SWITCH
ELECTRICAL CHARACTERISTICS at T, = +25°C, Vee
Characteristic
Supply Voltage Range
Supply Current
Light Threshold Level
Symbol
Vce
Ice
EON
EOFF
00 a
e
--
0
ABSOLUTE MtoX. ~
.I.DUT -150fllA-
-
~f-
Vc:c.
2Y
\
Vee.
4~.
I
Yee • IV
~
100
+40
.80
::
.80
i/
..
....
AT T, • +100"1:
If~«
///
IIv
o~ V
+100
IN ·C
-Io.,-CD
0
0
+20
Ii
cf
~
~
AMBIENT TEMPERATURE, TA
~
2 20 0
" I.
/ II
~'~.!
1· ..-
Z
i
ZoUT • IOOmA
20
I /
I
0
~.
100
0
II
AT· 'rio S +7.Q"C
VI. ·0
-40
I
I
I
'00
-
{
a
l---
r:::::=-( )-~ ~~
~
~
a
I
550
8
12
16
20
SUPPLY VOLTAGE, Vee IN VOI.TS
Figure 4
TYPICAL oUlPUT VOLTAGE AS A FUNCTION OF
TEMPERATURE, SUPPLY VOLTAGE, AND OUTPUT CURRENT
Figure 5
TYPICAL POWER DISSIPATION (EACH TRIGGER)
AS A FUNCTION OF SUPPLY VOLTAGE
Output saturation voltage is customarily specified
as a function of load current. However, the Type
ULN-330SM Schmitt trigger also incorporates a
base-emitter voltage drop and a SOO-ohm resistor as
part of the non-inverting output. In this case, the
output voltage can be shown. as:
RlVCC
V
7
CElSAn = O. + 500 + Rl
Operating Characteristics·
These devices have several important. operating
characteristics.
One of the most useful of these features is the
reverse voltage handling capability of the entire series. These devices will withstand reverse voltages of
up to -20 V indefinitely without damage. Where
exact timing is not required (±8 ms), they can be
operated directly from a low-voltage a-c supply
without rectification or filtering and thus save a considerable amount in circuit cost.
The output load can be of any form: Resistive,
inductive, capacitive, tungsten, LED, etc. For
switching inductive loads, Type ULN-3304M or
ULN-3306M triggers with their internal Zener diode
clamps are recommended. Tungsten or capacitive
loads can be handled by any of the devices provided
the peak (one-cycl~) load current is limited to about
300 mAo
Thresh91d Detection
Voltage level detection is easily accomplished
with any of the Schmitt triggers in the Series ULN3300M. Shown in Figure 6A is the basic threshold
detector. Resistor R J Or R2 can be replaced with a
transducer such as a thermistor or photocell. The
circuit of Figure 6B is used when the input voltage is
greater than 0.62 Vcc. The circuit of Figure 6C is
10--52
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
V,N
V,N
DWJ.
V,N1H)
Rl + R2 '"
V,N1l)
<
R~-
Figure 6A
BASIC DETECTOR
hO.
A-IO.07D
0.62 Vee
R2
0.55 Vee
R2
Figure 6B
HIGH V,N DETECTOR
Figure 6C
LOW V,N DETECTOR
used for input voltages less than 0.55 Vee. For the
case where R, = R2 and Vee = 10 V, the input
voltage switching points for Figure 6B are 12.4 and
11.0 volts and for Figure 6C, 2.4 and 1.0 volts.
Switching errors are caused by component tolerc
ances (including V 1N1H) and V 1N1L)), temperature
changes (typically only ±30 ppm fC), and the effect
ofIm. Under worse case conditions this should not be
more than 50 nA. If the values of Rl and R2 are
chosen such that the current through them is at least
5 rnA under V1N(H) conditions, the effect OfIIN can be
ignored. Typical values for Rl and R2 are usually
between 10 kDand 10 MD. ResistorRL is normally
between 1 kD and 100 kD.
S IS OPENED AT T= 0
VCC------~
O.62\{,c
Timing
Series ULN-3300M Schmitt triggers can be used
in timing applications by connecting an RC integrator to the input as shown in Figure 7. Typical
values for R are 10 kD to 10 mD; C is between
100 pFand 10 JLF; RLis between 1 kDand 100 kD.
Timing accuracy· arid maximum time delay obtainable are defined by the input characteristics of the
device, component tolerances, and the leakage current of the capaci tor. Assuming ideal external timing
components, the minimum, typical, and maximum
switching times are shown as a function of the RC
time constant.
o -L--H----_
1.02 RC MAX.
V
CCJ.
VCE(SAT)O-+·- - - j - - - - -
O;;O:97RC TYP.
0.62RC MAX.
l
oI
I
0.60 RC TYP,
Figure 7
RC INTEGRATING TIMERS
10-53
t
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
10M
(\2=.
-I--- -
'"
~
It-~
c--1'('
~
1M
o
---
('
t:'s:= 1=
~
W
u
.
2
-1'('
'"to
"00
~ lOOK
a:
r----'
t-----
('
.
t"'~ /0
".I'>
~" /0
(°ot
/0
0.."
~.
~('.
IVo
a:
.
.
".."
"I"
-~
I
10K
lOOp
IOOOp
lOlL
CAPACITANCE, C IN FARADS
O"J~.
hO.
A-Io.on
Figure 8
RC TIME CONSTANTS
Astable Multivibrators
From the equations several points are evident:
Positive feedback from the inverting output (Vom )
to the RC network will form a relaxation oscillator or
astable multivibrator. This connection is possible
with Type ULN-3305M.
The basic astable multivibrator illustrated in Figure 9 can be used for the condition where the period tl
is less than the period t2. In this configuration, the
following design equations apply:
tl = 0.12 Rl C
3.45
t2 =
V"
VOUT
VCE(UTI
0.17 (R 1
f
+ R2) C
A. Within limits, the supply voltage will have
no effect on.the frequency,
B. The period t2 can be adjusted, without affecting t l , by varying resistor R,.
C. If Rl is made very large with respect to R"
the effect of R2 can be minimized or ignored.
With the typical values shown for Figure 7 , frequencies of between 4 Hz and 100 kHz are possible.
=
U U U U
"
"
I
R,
R,
ULN-330SM
RL
Vour
Your
V,.
DWG.NO. A-10,074A
Figure 9
ASTABLE MULTIVIBRATORS
10-54
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
R,
c
c
OWG.NO. A-IO.075A
DWG.NO. A-lO.076A
Figure IDA
If it is desired to have period tl equal to or greater
than period 1" a slight circuit change is required as
shown in Figures lOA and lOB. In either of these
configurations the following design equations apply:
tl
t2
0.12(R, + R3) C
R2) C
f _
3.45 ...
- (Rl + 0.58 R2 + 0.41 R3)
The output will be symmetrical (tl~= .1,) wben
R3 = 0.42 R, +1;42 R2
=
= 0.17 (R, +
In each of these astable multivibrators certain limitations should be noted.
A. Any d-c load connector to VOUT will change
the period tl because of the loading effect on R2 •
Fo~ this reason, the output should probably be
taken from VOUT.
B. The circuit of Figure lOA has a diode voltage
drop in the RC timing network and is therefore
not recommended for use with very low supply
voltages.
C. The capacitor leakage current can be significant for large values of R, and, as an extreme, can cause the trigger ·to "latch up."
Figure lOB
Monostable Multivibrators
The basic monostable multivibratoris shown in
Figure 11. In the quiescent state, the itiput and the
output are both "low." If a trigger is applied that
raises the input to the Schmitt trigger threshold, V oU'!'
will go "high," applying V cc back to the input fora
period t = 0.6 RC if resistor R is much greater in
value than R L. The 1 Mil resistor prevents loading of
the network by the trigger.
In this circuit, the output loading of RL is desirable, provided the device output current rating is not
exceeded. The trigger input voltage should be between 0.66 Vee +0.7 V and Vee' and the trigger
pulse width must be less than the output pulse width.
Output pulse widths of lO~s to 100 seconds are
possible. The input pulse width should be at least
10 ns.
Where output pulse ~~thJI are shorter than the
trigger pulse width, the cUellit shown in Figure 12 is
used. In this application, only the lea4ing edge of the
trigger pulse is used after being differentiated by one
Schmitt trigger. The . time constantS of the differentiated leading edgethen determine the output pulse
width as tl = 0.6 Re.
As before, resistorR is much 'greater in value than
RL, the trigger input voltage must be between 0.66
Vee and Vee' the trigger pulse width must be greater
than the output pulse width. In addition, to insure
that the timing cap.llcitor completely discharges,
period 1, should be at least'five times period t l .
10-55
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
o
V,.
"n
L-.J.--w,.---........--o VOUT
',-"
Vee
I
-
DWG.NO. A-IO,a77A
V,.
Figure 11
MONOSTABLE MULTIVIBRATOR
V"
Vee
v,
RL
VCIIUTI
RL
v,_
Veo
VOUT
O.55Vce
V,
V,
V
TRIGGER
Figure 12
MONOSTABLE MULTIVIBRATOR
10-56
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
DWELL
ImA
Number of
Cylinders
1
2
4
TACH
ImA
Approximate Resistor Values in Ohms
.6
8
-~
~
~
. 120
240
240
240
240
1000
2000
4000
6000
8000
400 k
400 k
200 k
133 k
100 k
DW6. "0. A-IO,082
Figure 13
TACHOMETER/DWELL
METER
!
V.
10K
10K
V,
'loUT
10K
VOUT
c
O"'B.kO.A-IO,083
Figure 14
MISSING PULSE DETECTOR
10--57
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
Vee. 2.2 - 10V
'Adjust to Obtain Bistable Operation
Figure 15
TOUCH-CONTROLLED SWITCH
VCC ·2.2-8V
10K
ULN-330SM
V.
IK
270
~
j.--t .60ms_1
~
f'3136Hz
.Il.
D\I/G. NO. A-tO.086
3.45
C1 (R 1 + R2)
C2 is chosen for burst duration, t = 0.6 R2 C2
C1 is chosen for burst frequency, f =
lOOK
R.
OWG.
~O.
A-IO.087
Figure 16
TONE-BURST GENERATOR
Vee
=2..5-8V
SHUTTER
SOLENOID
Choose
Choose
Choose
At t =
Figure 17
PHOTO INTEGRATOR
10-58
C1 to match photocell characteristics.
Rl to match shutter characteristics.
R2 for desired flash timing (S2 closes in flash mode).
0, shutter is released, Sl opens.
TRANSISTOR ARRAYS
and MISCEllANEOUS DEVICES (Continued)
~
Vee
Vee • 2.2 -IOV
2.2 -IOV
1M
OWG. NO.
t
=
A~
~WG.
10, 089
0.97 R C Typical (see Figure 7).
:.0.
A-IO.092
R, and R2 may be interchanged for opposite logic (see Figure GA).
Figure 18
BASIC RC TIMER
Figure 20
LIGHT-ACTUATED SWITCH
Vee = 2.2 - 12V
f '" 31.4kHz
DUTY
CYCLE
%
DWG,NO. A-10,09QA
50
50
95
D~'''.
Note: Add resistor at "X" for symmetry (see Figure lOB) when
VIN
=
O.
The peak-to-peak signal input must be less than
VIN!H) VIN!l) or clipping will occur.
Figure 19
PULSE-WIDTH MODULATOR/CLASS 0 AMPLIFIER
10-59
50
NO.
TRANSISTOR ARRAYS
and MISCELLANEOUS DEVICES (Continued)
Vee
' 2.2 - 8V
10K
3450 Hz
Note: A-C coupling to probe is used to prevent electrolysis. Output
duty cycle is 50% unless peak detector is inserted at "X."
10K
10K
~I
1M
11J '
-=
0,001 fJF
100mA
INDICATOR
=
Figure 21
LIQUID-LEVEL DETECTOR
Vee
=2..2 -7V
VIN
D"'G. MO. A_IO.09 0!
I
-
VCr;-VCE
R
OUT -
Output current temperature coefficient:
A loUT
=
0.002 AT
R
Where lour is in amperes, Tis in °C, and Ris in ohms. Pins 5 and 7
are tied together for single control input. If separated, the VIN(51 and
V1N(7) must both go "low" to obtain lour.
D"G. NO. A-IO,095
Figure 22A
Figure 228
CURRENT MIRROR
CURRENT MIRROR
10-60
r\.
L(~CUSTOM DEVICES
SECTION 11 -
CUSTOM DEVICES
Custom Circuit Design Capability ........... , ..... 11-2
Semi-Custom, High-Voltage, Integrated Circuits ....... 11-3
ULN-2350C and 2351C Tuff Chip@ Sem!~Custom
Integrated Circuits . . . . . . . . . . . . . . . . . .• .• . . . .. 11-4
Optional Package Capabilities ................... 11-6
m
11-1
CUSTOM CIRCUIT DESIGNS
Sprague is active in the design of standard and
custom high-volume integrated circuits and subassemblies for both linear and digital applications. A
wide range of semiconductor technologies is available to optimize cost and performance. Often, new
processes or innovative circuit designs are required.
The first concern of a designer of a custom device
is generally one of cost, though performance, reliability, size, and process are also important considerations.
Integrated Component Capability
Production Volume: Unit cost is dependent on quantity. A minimum volume of $250,000 per year is
required after the initial design and development.
Chip Size: Unit cost is directly affected by chip
size, which is related to circuit complexity, outputcurrent and output-voltage ratings.
Test Requirements: Logic, d-c. and static measurements are simple, fast, and inexpensive to perform, while linear measurements such as those for
distortion, phase and noise affect production rates
and increase cost.
Specifications: Well-defined specifications can
expedite circuit design. Excessive or arbitrarily tight
specifications will reduce yields and increase cost.
NPN - Beta to 300, BVCES to 120 V, fl to 500 MHz
PNP - Beta to 40, BVcEs to 100 V, fl to 4 MHz
CMOS - V1H 0.8 to 2.5 V, BVos to 18 V
Resistors:
Diffused -
MOS -
0.1 pF/mil 2, to 30 pF, 100 V
0.3 pF/mil 2, to 100 pF, 12 V
0.9 pF/mil 2, to 300 pF, 6 V
0: 1 pF/mil 2, to 30 pF, 50 V
0.2 pF/mil 2, to 50 pF, 20 V
Diodes:
Zener - 5.7 or 7.0 V, ±0.3 V
Photo - 0.5 AlW or > 300 nA/fc at 800 nm
Schottky-O.l toM Vat 1pA, 0.3to 0.6 Vat 1rnA
Small Signal - BV = 7.0 V
Varactor - Co/Cs "" 2
Other:
SCRs - to 1 A, to 60 V
PUTs - to 1 A, to 60 V
12l - Propogation delay typically 100 ns
BiMOS - High-power bipolar plus low-power MOS
Hall Cells - 35 mV/kG
Time in Weeks
Define Specifications
Circuit Design
Breadboard Construction
Breadboard Approval
Circuit layout
Prototype Construction
Production Pilot Run
Production Volume
5fl1D, to 1000, 100 V
175n/D, to 100 kO, 100 V
Ion Implant- 500fllDto 4 kO/o, to 4 MO, 20 V
Thin Film - 2kO/o, to 2 MO, 250 V
Aluminum - 0.025fl1o, to l.OO, 150 V
Capacitors: Junction -
Typical Custom Design Schedule
Task
TranSistors:
2 to 10
2 to 8
3 to 4
2 to 8
3 to 8
8 to 12
12 to 16
Total 32 to 66 weeks at an engineering cost of between $20,000
and $50,000, not including special test hardware or assembly
tooling.
Application Areas of Sprague Expertise
TV - NTSC or PAL, video, chroma, sound, sync,
I-F
Toy - sound generators and amplifiers, optolinear,
timers, controls
Camera -
Schmitt triggers, timers, Hall cells,
switching regulators, motor drivers
Radio - A-M, F-M, F-M stereo, A-M stereo
Safety - GFl, smoke detectors, burglar alarms
Audio - 250 mW to 10 W, mono and stereo
Automotive - controls, monitoring, safety, radio
Interface - display drivers, Hall cells, optolinear
Military - communications, fuze, interface
Computer - interface to ±115 V or 2 A
Control -
photodiodes, light integrators, timers,
controls
Transistor Arrays -
small-signal, control, high-
current, SCR
11-2
SPRAGUE SEMI-CUSTOM,
HIGH-VOLTAGE INTEGRATED CIRCUITS
Spragu~ semi-custo.m integrated circuits fo.r
transient-pro.ne. enviro.rtments· such as automo.biles
and industrial co.ntro.ls include co.mpo.nents that can
be used to. pro.tect o.peratio.nal circuitry from vo.ltage
surges o.f up to. 500 V.
'
can be used to. limit peak transieJ;H ,currents.
Because these polysilicon resisto.rs are no.t po.larity
sensitive (no. PN junctio.n is fo.rmed by the thin-fIlm
manufacturing pro.cess), they are inherently protected fro.m damage by vo.ltage-supply reversal. The
high values o.f resistance available with these co.m"
po.nents are particularly useful in applicatio.ns requiring lo.w levels o.f po.wer dissipatio.n and standby cur.
rent.
Fabricatio.n o.f a semi-custow. integrated circuit
begins with the user's design for interco.nnecting
metal that transfo.rms unco.mmitted co.mpo.nents o.n a
finished wafer into. a dedicated and lSoginal circuit.
Amo.ng co.mpo.ne~ts available to. users o.f Sprague
semi-custo.m arrays are po.wer transisto.rs with a
B VCBS o.f mo.re than 80 V, a minimum o.f 53 diffused
resisto.rs and 140 thin-fIlmpblysiliconresisto.rs, capacito.rs fo.rmed by buried-Iayetand iso.latio.n diffusio.ns, vertical P~ transistors as well .as NPN and
lateral PNP transis.tors,andemitter~iso.latio.n Zener
dio.des with a nominal breakdowlivoltage o.f5.8 V.
The arrays alSo. have capacitive elem,ents with typical values o.f 80 pF fo.r use in applicatio.ns requiring
supply stabilizatio.n o.r no.ise suppressio.n:
Vertical PNP transisto.rs, with (lurrent~gain typically two. o.r three times greater than the. hFE oflateral
PNPs, co.mplement the arrays' standard set o.f NPN
and PNP transisto.rs. Vertical PNPscan'be used in a
current-mirro.r (Figures 1 and 2) to reduce erro.r introducedby base currents froID: 20% to. lesS. than 1%.
The devices can alSo. be 'used in a'iHfferential
amplifier co.nfiguratio.n (Figure 3)to decrease basecurrenLrequirements.
,. .'
Po.wer transisto.rs in the compo.nent arrays can
withstand lo.ad-disconnect transients o.f auto.mo.bile
alternato.rs (80 V, 200 ms) witho.ut the use o.f Zener
dio.de clamping circuits.
The greater part o.f the resistive element o.f the
arrays is ma<4;: up o.f dielectri.callY is()lated thin-film
resisto.r.s that~. with their' high resistive values and
their ability ~thstandtra~sientsashighas 500 V,
Mo.reco.mpiete info.rmatio.n on dwelo.pment of
these semi-custom,. high-vo.ltage integrated circuits
is presented.inSprague Technical Paper. TP 81-3.
to
+v
Figure 1
+v
. Figure 2
HI
IB'~
111112
Figure 3
11-3
Dwg. No. A·11,441
ULN·2350C and ULN·2351C
ULN.2350C and ULN.2351C
TUFF CHlpTM SEMI·CUSTOM INTEGRATED CIRCUITS
PRELIMINARY INFORMATION
(Specifications Subject to Change Without Notice)
FEATURES
- BVCES = SO V Min.
- 250 mA. Outputs
• 500 Volt Resistors
- High·Gain PNP Transistors
-SO 'pFCapacito~
- Time and Cost Savings
TUFF CHIP SEMI-CUSTOM integrated circuits offer substantial time and cost' savings
for custom circuit .applications requiring from
5,000 to 200,000 pieces. This is an area that
previously was met by hybrid circuits and, in
some cases, by printed wiring boards ..
89
:x
104 mils
2.26 x 2.64 mm
ULN·2351C
The TUFF CHIP. $emi~custom approach
utilizes a standard array of components
fabricated on a single silicon chip: the ULN2350C contains'· 480 separate elements; the
ULN-2351C provides 276. Besides the traditional complement. of NPN and lateral PNP
transistors, high-gain vertical PNP 'transistors
are included.
The user lays out the interconnecting circuit,
similar to a printed wiring board layout, on
sheets provided by Sprague Electric. The artwork is checked by Sprague engineers, and used
to generate the customer's proprietary metal
mask. Finished circuits' are electrically probed
and visually inspected. Chips are tray-packed for
hybrid circuit manufacturers or are mounted in
plastic, ceramic, or hermetic dual in-line
packages with from 8 to 28 pins.
104 x 150 mils
2.64 x 3.81 mm
ULN·235OC
components utilizes deposited film resistors with
breakdown voltages higher than 500 volts. On. chip capacitors may be used for noise suppression or filtering.
TUFF CHIP components are optimized for a
minimum BVCBS of 80 volts. Two or four 250
rnA power transistors are provided, and these
may be paralleled for high current requirements.
On-chip transient protection of sensitive circuit
Circuit users can expect prototypes six to ten
weeks after submitting initial artwork; production quantities can be shipped eight to ten weeks
after prototype approval.
11-4
ULN·2350C and ULN·2351C
ELECTRICAL CHARACTERISTIG atTJ =
LIMITS
TYP.
MIN.
+ 25°C
MAX.
50
150
10
46
100
200
20
-
7.7
-
300
500
-
0.1
-
10k
30
80
6.9
....
±%
-
..
-
-
'.
V
V
V
Q
MHz
,..A
NPN Power Transistors
hFE at Ic == 200 mA
BVCEO at Ic - 100 ,..A
BVCES at Ic = 100 ,..A
VCE(SAT) at Ic = 250 mA
Useful Current Range
50
..
'
30
80
2.0
........
150
40
100
200
-
-
-
1.4
250
V
V
V
mA
Lateral PNP Transistors
hFE at Ic = 100 ,..A
BVCEO at Ic = 10 ,..A
Cutoff Frequency
15
60
-
30 :
80
3.0
-
V
MHz
Vertical PNP Transistors
hFE at Ic = 100 ,..A
BVCEO at Ic = 10 ,..A
30
50
60
-
-
V
Passive Components
Resistor Tolerance
Resistor Matching
(1:1) Tol.
BV - Base Resistor to
Substrate
BV - Deposited Film
Resistor to Substrate
Capacitance Tolerance
BV - Capacitors
Number of Devices
UlN-2350C
UlN-2351C
UNITS
Small·Sls nal NPN Transistors
hFE at Ic = 1.0 rnA
Matching of hFE
BVCEO at Ic = 100 ,..A
BVCES at Ic - 100 ,..A
BVEBO at IE =100 ,..A
RSAT at 16 = 100,..A .
(with plug)
Cutoff Frequency
Useful Current Range ..
COMPONENT LIST
-
-
30
±%
-
1.0
3.0
±%
-
80
-
V
500
-
-
40
±%
12
-
-
Small-Signal
NPN Transistors
NPN Power
Transistors
lateral
PNP Transistors
Vertical
PNP Transistors
5.8 V
Zener Diodes
80 V
Zener Diodes
Base Resistors:
200Q
450Q
900Q
1.8 kQ
3.6kQ
D.eposited. Film
Resistors:
2.0 kQ
4.5 kQ
9.0 kQ
18 kQ
36 kQ
80 pF
Capacitors
Bonding Pads
70
38
4
2
27
14
10
7
.
2
5
:
20
..
15
10
20
20
20
20
5
12
12
12
12
16
58
48
50
72
8
33
28
29
42
10
28
5
19
V
V
ID
11-5
Optional Package CCipabilities
Standard integrated circuits from Sprague Electric Company are most
··often furnished in packages meeting indllstry or military standards (JEDEC
TOe87, TO-91, TO-99~TOclOO, or TO-116, orMIL-M-3851O). However,
on special order, other packages or assemblies of packaged devices cah also
be supplied. A few special order devices are illustrated above, including
special heat sink tabs, subminiature plastic packages, printed wiring boards,
flexible circuits, and complex assemblies. Devices with photodiodes are
furnished in clear plastic cases.
1/ I
PACKAGE INFORMATION
IF)
">~
':.'
SECTION 12 -
PACKAGE INFORMATION
Package Thermal Characteristics ...................... 12-2
Thermal Design for Plastic Integrated Circuits ............. 12-3
Computing Integrated Circuit Temperature Rise ............ 12-9
Operating and Handling Practices for MOS Integrated Circuits 12-13
Package Drawings:
SuJfix 'A' Plastic Dual In-Line ...................... 12-14
Suffix 'B' Plastic Dual In-Line with Heat Sink Semi-Tabs .. 12-16
Suffix 'C' Unpackaged Chip or Wafer ..................... .
Suffix 'H' Glass/Metal Hermetic Side-Brazed Dual In-Line .. 12-17
Suffix 'J' Glass/Metal Hermetic 14-Lead Flat-Pack ....... 12-19
Suffix 'M' Plastic Mini 8-Pin Dual In-line ............. 12-20
Suffix 'Q' Plastic Quad In-Line with Heat Sink Tabs ...... 12-20
Suffix 'R' Glass/Ceramic Hermetic Dual In-Line ......... 12-21
Suffix'S' Plastic Mini Single In-Line ................. 12-22
Suffix 'T' Plastic 3-Pin Single In-line ................ 12-23
Suffix 'W' Plastic 12-Pin Single In-Line Power Tab ....... 12-23
Suffix 'Y' Plastic Head TO-92 Transistor ............. 12-24
Suffix 'Z' Plastic 5-Lead TO-220 Single In-Line Power Tab . 12-24
12-1
PACKAGE INFORMATION (Continued)
Package Thermal Characteristics
Package
Designator
Package Type
Frame
Material
R8JA t
(OC/W)
Copper
Copper
Copper
Copper
Copper
Copper
60
60
55
55
50
40
38
38
25
25
21
16
A
A
A
A
A
A
14-Lead
16-Lead
18-Lead
20-Lead
22-Lead
28-Lead
B
B
B
8-Lead Webbed
14-Lead Webbed
16-Lead Webbed
Copper
Copper
Copper
75
45
45
l3*
13*
13*
H
H
H
H
8-Lead
14-Lead
16-Lead
18-Lead
Kovar
Kovar
Kovar
Kovar
120
90
90
75
40
20
20
20
J
14-Lead Flat Pack
Kovar
140
80
M
8-Lead Mini DIP
Copper
80
55
13*
Plastic
Plastic
Plastic
Plastic
Plastic
Plastic
DIP
DIP
DIP
DIP
DIP
DIP
Hermetic
Hermetic
Hermetic
Hermetic
Q
16-Lead Quad In-Line
Copper
45
R
R
R
14-Lead CerDIP
16-Lead CerDIP
18-Lead CerDIP
Kovar
Kovar
Kovar
75
75
65
W
y
12-Lead Power Tab SIP
3-Lead Transistor
Copper
310
170
Z
5-Lead Power Tab SIP
Copper
40
4.5*
Copper
3.0*
The data given is intended as a general reference only and is based on certain simplifications such as constant chip size, standard bonding methods, and
an allowable + ISOaC junction temperature. Where differences exist, the detail specification takes precedence.
tG8JA = lIR8JA and G8 JC = l/R8JC
-R8J1
12-2
PACKAGE INFORMATION (Continued)
THERMAL DESIGN FOR
PLASTIC INTEGRATED CIRCUITS
+50°C is specified. The maximum allowable chip
temperature is usually + 150°C for silicon.
Thermal resistance is the all-important design factor. It is composed of several individual elements,
some of which are determined by the integrated
circuits manufacturer, and some by the user.
pROPER THERMAL DESIGN is essential for reliable operation of many electronic circuits.
Under severe thermal stress, leakage currents increase, materials decompose, and components drift
in value or fail. Present-day linear integrated circuits
are capable of delivering 5 to 10 watts of continuous
power. Previously, such· power levels came only
with discrete metal can power transistors. It was
relatively easy to determine the thermal resistance of
these devices and attach a massive heat sink. However, in many markets, economic factors now dictate
the use of molded dual in-line plastic packaged
monolithic circuits. The guidelines to be discussed
will provide the circuit design engineer with information on maintaining junction temperature below a
safe limit under worst case conditions.
Chip Power Dissipotion
The chip power dissipation should be obtainable
from·the manufacturer's specifications. In most applications it is a variable and determined by the user
when he specifies the circuit variables.
A typical example is the Sprague Type ULN -2277
dual 2-watt audio. power amplifier. Power dissipation is determined by the load impedance, the requiredpeak output power, the acceptable amount of
total harmonic distortion (THD), and the supply
voltage (Vee). This is illustrated in Figures 1-3. Note
that for a given supply voltage, the chip dissipation
may be greatest at some point below the peak output
power rating and must be considered.
As shown in the figures, a peak output power of 2
watts per channel with 3% maximum THD wOlild
mean a chip power dissipation of about 2.7 Wand a
V cc of 15 V with a load impedance of 4il, or 1.8 W
and 15 V at 8il, or 1.4 Wand 19 V at 16il. In
general, the highest load impedance for a given output power is the most desirable (within the output
voltage capability of the device).
Design Considerotions
Four factors must be considered before the required heat-sinking can be determined. These are:
I. Maximum ambient temperature
2. Maximum allowable chip temperature
3. lunction-to-ambient thermal resistance
4. Continuous chip power dissipation
Maximum ambient temperature for the integrated
circuit is normally between + 70°C and +85°C and is
usually dependent on the Case material. In most
applications, however, the limiting factor is the associated discrete components and a limit of about
12-3
PACKAGE INFORMATION (Continued)
o~o--------f--------+--------+-------~--------~
OUTPUT POWER PER CHANNEL IN WA"115
Dwg No. A·ll,419
Figure 1
OUTPUT POWER PER CHANNEL I N WATTS
Figure 2
Dwg No. A·ll,430
OLO--------~--------~--------~----------~------~
OUTPUT POWER PER CHNmEl IIIJ WI\TTS
Dwg No. A·ll.431
Figure 3
12--4
PACKAGE INFORMATION (Continued)
being altered from the standard 14-pin or 16-pin
designs.
Rapidly becoming an industry standard is the
"bat-wing" package. This package is the same size
as a 14-pin dual in-line package, but the center portion of the frame is left as tabs, measuring about ~ /I
square. These tabs can be soldered, welded, or
bolted to a heat sink, or inserted directly into some
sockets. The worst case thermal resistance of various
lead frames (SJc) is given below.
Heat Dissipation
In any circuit involving power, a major design
objective is to reduce the temperature of the components in order to improve reliability, reduce cost, or
improve operation. The logical place to start is with
the heat-producing component itself. First, keep the
amount of heatgenerated to a minimum. Second, get
rid of the heat that must be generated.
Heat generation can be minimized through proper
circuit design. Heat dissipation is a function of thermal resistance.
With the typical discrete component, heat dissipation can be accomplished by fastening it directly to
the chassis. Dual in-line plastic packaged integrated
circuits, however, are quite a bit different. Their
shape is not conducive to fastening directly to the
chassis, they are normally installed in a plastic socket or on a printed wiring board, and the heat producing chip is not readily accessible.
Some users specify unusual packages so as to get
the heat sink as close as possible to the chip and lor
provide an attachment point for an external heat sink.
A common factor in many of these special designs is
that the lead frame is an integral part of the heat sink.
Since the plastic package may have a thermal
resistance of between 50 and 100°C IW and the lead
frame a thermal resistance of only 10 to 20°C IW,
this would seem like the best route to go.
Lead Frame
Thermal Resistance
14-pin Kovar
14-pin copper
"Bat-wing"
47°C/W
19°C/W
lloC/W
Which Heat Sink?
If the integrated circuit manufacturer has done his
job well, the chip-to-ambient thermal resistance will
be minimized for maximum chip power dissipation.
It would appear that even the Kovar lead frame would
be adequate for most applications. However, the
total thermal resistance (8JA ) is also dependent on a
stagnant layer of air at the lead frame-ambient interface which will support a temperature gradient. The
total thermal resistance of a non-heat sinked dual
in-line plastic package is therefore much higher.
Since air is a natural thermal insulator, maximum
heat transfer is througLl convection and the total
thermal resistance will decrease some at high power
levels.
Standard Packages
The most common lead frame material has been
Kovar (an iron-nickel-cobalt alloy). Its coefficient of
expansion is close to that of silicon thereby minimizing mechanical stresses. However, Kovar has a relatively high thermal resistance and consequently is
not suitable for standard lead frames in high power
dissipation circuits. For these applications, copper or
copper-alloy lead frames should be used.
Additionally, some type of added heat sinking may
be necessary. Thus lead frame configurations are
Lead Frame
Total
Thermal
Resistance
14-Pin Kovar
14-Pin Copper
"Bat-Wing"
120°C/W
72°C/W
50°C/W
Max. Power Diss. (W)
at 50°C TA, 150°C TJ
0.83
1.39
2.0
Ignoring any safety margin and deviceperformance, even the "bat-wing" is now only barely
adequate for most applications. The obvious solution
is the use of an external heat sink.
12-5
PACKAGE INFORMATION (Continued)
Heat sinks for plastic dual in-line packages can be
of almost unlimited variety in design, material, and
finish. Economics will normally playa very important role in the selection of any heat sink.
Referring to Figures 4 and 5, the thermal resistance requirement of the· heat sink is found at the
junction of the specified chip power dissipation and
maximum ambient temperature. These curves are
typical of those furnished in many monolithic integrated circuit data sheets. Actual performance in a
specific situation depends on factors such as the
proximity of objects interfering with air flow, heat
radiated or convected from other components, atmospheric pressure, and humidity. A good safety
factor is therefore in order.
The least expensive and easiest to fabricate heat
sink is the plain copper sheet. It is also very effective
in reducing the total thermal resistance. The necessary dimensions can be obtained from Figure 6.
These heat sinks are square in geometry, 0.015 inches thick, mounted vertically on each side of the lead
frame, and with a dull or painted surface (Figure 7).
The heat sinks should be soldered directly to the lead
frame (approximately 0.3°e /W interface thermal
resistance).
l1f---+--+----!--+---+----+--I-----l
The plain copper sheet heat sink is also available
commercially and may be less expensive than inhouse manufacture. Two standard types are the
Staver V7 and VS.
lOI~--+---+--I----+--~-~--~~
lH'lN COPPER LEAD FRAN(
GJc: 190CIW
10
w
""
~
~
~
'"
u
~
~
z
~
I
0
~
~
AMBIENT TEMPERATURE IN 0e
5
Owg No. A·ll,432
"z
".,
Figure 4
'l! o. 1
0,1
I
10
100
eCA in °C PER WATT
Owg No. A-ll,434
Figure 6
CASE 0 - 50 - 1000 C/W
~JUNCTION
SILICON Y o 1 5 0 C
AMRIENT
AMBIENT TEMPERATURE IN
°c
Owg No_ A-I 1,435
Owg No. A·ll,433
Figure S
Figure 7
12-6
PACKAGE INFORMATION (Continued)
The circuit manufacturer must optimize his chip
design so that component drift is minimized and lor
equalized so that rated performance can actually be
obtained under maximum thermal stress.
Heat Sink Finishes
Although plain copper is an effective heat sink, it
is sometimes qesirable to have something that is
more appealing to the eye. For this reason, and
others, many heat sinks are either painted or
anodized.
Note in Figures 8 and 9 that the Darlington input
differential pairs are cross-connected so as to
minimize differences in gain as a function of output
transistor power dissipation. Transistor Q., being
closest to the output power transistors is naturally the
hottest; Q3 is a degree or two cooler; Q[ and Q, are about
equal and midway between Q3 and Q•. The gain of the
Q[-Q, Darlington pair is about equal to the gain ofQrQ. at
all output power levels because of careful thermal design.
The most common finish is probably black anodizing. It is economical and offers a good appearance.
The black finish will also increase the performance
of the heat sink, due to radiation, by as much as 25%.
However, since anodizing is an electrical and thermal insulator, the heat sink should have an area free
of anodize where the heat-generating device is attached.
Other popular finishes for heat sinks· are irridite
and chromic acid dips. They are economical and
have negligible thermal and electrical resistances.
These finishes, however, do not enjoy the 25% increase in performance that a dull black finish has.
Forced Air Cooling
The performance of many heat sinks can be increased by as much as 100% by forcing air over the
fins. Where space is a problem, the cost of a small
fan can often be justified. If a fan is required for other
purposes, it is advantageous to place the semiconductor heat source in the air flow. A rule-of-thumb is
that semiconductor failure rate is halved for each
lOOC reduction in junction operating temperature.
Figure 8
Chip Design
Proper thermal design by the integrated circuit
user can reduce the operating temperature of the
semiconductor junction. However, the minimum
chip temperature at any power level is determined
solely by the device manufacturer. For this reason,
care must be taken in choosing the manufacturer.
"Exact equivalent" integrated circuits are not necessarily identical. Electrically and mechanically they
may be the same, but thermal differences can mean
that' 'identical" audio power amplifiers will not put
out the same power without exceeding the rated
junction temperature.
Figure 9
12-7
PACKAGE INFORMATION (Continued)
In certain specialized applications, thermal coupling can be used to a distinct advantage. Experimentally, thermal coupling has been used to provide a
low-pass feedback network which otherwise could
be obtained only with very large values of capacitance.
'
The foregoing discussion has covered the average
thermal characteristics oftoday's dual in-line plastic
integrated circuits. The specific devices will vary
with the different packages and bonding techniques
employed, but the concepts will remain the same.
APPENDIX
The following is intended to review terminology
and compare thermal circuits with the more familiar
electrical quantities.
The first law of thermodynamics states that energy
cannot be created or destroyed but can be converted
from one form to another. The second law of thermodynamics states that energy transfer will occur
only in the direction of lower energy. In the
semiconductor junction, the electrical energy is converted to thermal energy. Since no heat will be stored
at the junction, the heat will flow to a lower temperature medium, air. The rate of heat flow is dependent
on the resistance to that flow and the temperature
difference between the source and the sink.
eLECTRICAL
CIRCUlf
r
. ,R
;---Q i~g~~:LO~~~E~N I~A~W;S
=
,,
,
THERMAL RESISTANCE
OF PLASTIC CASE
TJ ~ JUNCTION TEMPERATURE
B JC = THERMAL RESISTANCE
~
JUNCTION - LEAD fRAME
'?,
''
,
i
THERMAL RESISTANCE
OF PRINTED WIRING
BOARD OR SOCKET
:'
_~'
I
'
f)cs
~
6SA
(WA~TSlj
THERMAL RESISTANCE
HEAT SINK - AMBIENT
TA-AMBIENT TEMPERATURE
(oCI
(OHMSI
THERMAL RES ISTANCE
LEAD fRAME - HEAT SINK
!L _____..! __ _
THERMAL
CI RCUIT
(VOLTSI
(AM~ERESI j
thermal resistance of the lead frame-heat sinkambient is shown as a variable resistor, because this
is under the control of the user and may be varied
over a considerable range.
Dwg No, A-ll,438
l'
Figure 11
8 (DC/WI
T, (oCI
E, (VOLTS I
EI - £, = IR
TI - T,
=
Qe
Material
Dwg No, A-ll,437
Silver
Copper, Annealed
Gold
Beryllia Ceramic
Aluminum
Brass (66 Cu, 34 Zn)
Silicon
Germanium
Steel, SAE 1045
Solder (60 Sn. 40 Pb)
Alumina Ceramic
Kovar (54 Fe, 29 Ni, 17 Co)
Glass
Epoxy
Mica
Teflon PTFE
Air
Fig~re 10
This thermal electrical analogy is convenient only
for conduction problems where heat flow and temperature obey linear equations. The analogy becomes much more complex for situations involving
heat flow by convection and radiation. Where these
two modes are not negligible, they can be approximated by an equivalent thermal resistance. If ignored, the error introduced will only improve the
device reliability.
A simplified thermal flow diagram of a molded
dual in-line package and heat sink is shown. The
12-8
Thermal Resistance in °C/W
for Unit Area/Unit Length
0.09
0.10
0.12
0.20
0.20
0.40
0.50
0.70
0.80
1.5
2.0
3.0
40
40
50
200
2000
PACKAGE INFORMATION (Continued)
Computing IC Temperature Rise
Heat is the enemy of integrated circuits-particularly power devices. Here's how to use thermal ratings
to determine safe Ie operation.
Why Ie Temperatures Rise
Ie temperature T,f is determined
Reprinted by permission from the June 9, 1977
iS$ue of MACHINE DESIGN, Copyright © 1977 by
Penton/lPC Inc., Cleveland, Ohio.
EXCESSIVE heat shortens the
life of an IC and reduces its
operating capability. Until recently, ICs were capable of
operating only in low-power applications requiring perhaps a
few milliwatts of power. But
now, new ICs handle several
hundred milliamperes and
drive devices such, as. relays,
solenoids, stepping motors, and
incandescent lamps. These high
power levels may increase IC
temperatures substantially and
are capable of destroying devices unless appropriate precautions are taken.
Thermal Characteristics
The thermal characteristics
of any IC are determined by four
parameters. Maximum allowable IC chip junction temperature
T J and thermal resistance R.
are specified by the IC manufacturer. Ambient temperature TA
and the power dissipation PlJ
are determined by the user.
Equation 1 expresses the rela-
by ambient temperature T"
heat disSipated P", and total
thermal resistance Re. This
total thermal resistance is
comprised of three individual
component resistances:
chip Re , lead frame RI.,
and heat sink Rs.
tion of these parameters.
TJ
= TA + PlJR,
(1)
Junction temperature T J
usually is limited to 150°C for
silicon ICs. Devices may operate
momentarily at slightly higher
temperatures, but device life
expectancy decreases exponentially for extended hightemperature operation. Usually, the lower the junction
operating temperature, the
greater the anticipated .life of
the IC.
Ambient temperature T. is
12-9
traditionally limited either to
70°C or 85°C for plastic dual inline packages (DIPS) or 125°C for
hermetic devices. Again, the objective is to operate at as Iowa
junction temperature as practical.
Thermal resistance Ro is the
basic thermal characteristic for
ICs. It is usually expressed in
terms of °C/W and represents
the rise injunction temperature
with a unit of power applied in
still air. (The reciprocal of
thermal resistance is thermal
conductance, or derating factor,
PACKAGE INFORMATION (Continued)
What the Curves Show
The junction temperature of an IC depends on several factors. including tha thermal resistance of the IC and the
operating duty cycle. Graphs showing the relationship of these factors are often useful in specifying an IC.
Thermal Ratings
3.0.-~-·~
".
~
c
e
'[ 2.0
~
<5
~
&.
~
~
~ 1.0
~
~ 05
;;;
O~
-75
____
-50
~~~
-25
0
__
,25
. .__
~
+50
~~~
+75 +100
Ambient Temperatura.
r
I
("C)
Typical thermal· resistance ratings for ICs in stili air range
from 60"C/W to 140"C/W. The slope of each curve on this
graph is equal to the derating factor GH, which is the
reciprocal of thermal resistance All. For an ambient
temperature of SO"C. a typical 14-lead flatpack with an AH of
140"C/W can dissipate about 0.7 W. A typical DIP, however.
with 14 copper-alloy leads can dissipate almost 1.7 W at
SO·'C.
The highest allowable package power dissipation shown
here is 2.S W. Other special-purpose DIP packages are
available with power dissipation ratings as high as 3.3 W at
O"C (AH 4S"C/W). If not for package limitations. IC chip
dissipation might be greater than 9 W at an ambient
temperature of up to 70"C.
Although the curve for plastic DIPs goes all the way to
IS0"C. they ordinarily are not used in ambients above 85"C
because of traditional package limitations. Hermetic DIPs
are specified to temperatures of 12S"C. and at IS0"C the
device should be derated to 0 W. The higher
specification limits for hermetic devices is the result of
their design for use in rigorous, high-reliability military
applications.
Duty Cycle
<400r------r.------~·~~·--·~~~~·-·····-···
.. -·--,
S
Duty cycle is important in calculating IC junction
temperature because average power-not instantaneous
power-is responsible for heating the IC. To convert from
peak power to average power, multiply the peak power
dissipation by the duty cycle. The average-powllr rating is
then used with the thermal-resistance rating to calculate
the IC Junction temperature. Thus. short dutycycles allow
peak power to be high without exceeding the IS0"C
Junction-temperature limit. However. this consideration
applies only to ON times of less than 0.5 sec.
(;
~
.3
~
200
Q>
Q,.
Q>
'is
'"~
52
;;; 100 . . . . . . . . . . . . . .~. . . .__~. . . .__~. .. .
40
60
80
20
IDa
Duty Cycle, 0 (ptHCtmt)
'---------,--------------G. expressed as W/"C.) Tht>rmal
resistance of an Ie consists of
several distinct (!omponl'nts,
the sum of which is thl' spl't'itit>d
thermal rl'sistance. ~'or II typical IC, these compont>nts of
thermal resistance lire 0.5"C/W
per unit thicknt'sS of the sili('on
chip, 0.1 to 3"C/W pt>r unit
length of the ll'ad frame, lind up
to 2,OOO"C/W per unit thit'kllt'ss
of still lIir surrounding 1.Ilt' !l'.
01 Ps lire used mon' t ha n n ny
oth(,r type of Pllt'kagi ng for
I(,s Ilnd IH'Wt'r t'oppt'r-alloy
ll'ad franlt's providl' a supt'rior
tht>rmal 'rating OVl'r tilt' standard iron-nit'kt'l-cobalt alloy
(Kovar) lead fran\('s. Howt'ver,
pow!'r I\'s an' also availahle
in otlll'r pack,lgl's such as flatpacks and 'I'O-typl' cans.
TIlt' pOWl'r /'/> that an II' can
SlIfl'ly dissipatt' usually dt'pt'nds on till' sizl' of tilt' II' chip
and tilt' tYPI' ofpackag-ing-. Most
12-10
common ('opper-frame DIPs can
dissipatp about 1.5 W, although
sonw spt'cial-purpose types
havt' I'I\tings as high as 5 W.
Power Dissipation
Total ((' pow,>r to b,> dissipatl'd dt'pt'nds on input curn'nt,
output cUITl'nt, voltag., drop,
and duty cyell'. Thus, 1'01" many
industrial digital-l'ontrol (('s,
logie-gatt' powt'1' 1', (typieally
11'''s than 0.1 W) and output
PACKAGE INFORMATION (Continued)
power Po must be determined to
find the total power to be dissi'pated. Total power dissipation
for these logic devices is the sum
of PI andP
(2)
Pi == n (V cclcC>
Q •
Po
~ n(VCR,S!T)Ic )
(3)
where Vee = logic-gate supply
voltage, Icc == logic-gate ON
current, VCE(SATJ = output saturation voltage, Ie = output
load current, and n = number of
logic gates. Manufacturers
usually list typical and maximum values for these voltages
and currents. For thermal considerations it is best to use the
maximum values so that
worst-case power dissipation is
determined.
If the duty cycle of the device
is longer than 0.5 sec, the peak
power dissipation is the sum of
the logic-gate power PI and output power Po for the logic ON
state alone. If the ON time is
less than 0.5 sec, however, average power dissipation must be
calculated from instantaneous
ON and OFF power P ON and
Measuring
POET
Pn
from
== DPON +
(I -
D)POFF
(4)
Corrective Actions
Ifthejunction temperature or
the required power dissipation
of the Ie is calculated to be
greater than the maximum
values specified by the manufacturer, device reliability and
,operating characteristics possi-
Ie Temperature
Sometimes IC junction temperature cannot be calculated
readily and instead must be measured. Measurement should
be made when there is insufficient data with which to
calculate. when the effects of external variables such as
forced-air cooling orenclosure size must be determined, or as
a check on the manufacturer's specifications regarding
package thermal resistance.
The,most popular technique for measuring IC temperature
uses the characteristic of a diode to reduce its forward voltage
with temperature. Many IC chips have some sort of accessible
diode-parasitic, input protection, base-emitter junction, or
output clamp. With this technique, a "sense" diode is
calibrated so that forward voltage is a direct indicator of diode
junction temperature. Then, current is applied to some other
component on the chip to simulate operating conditions and
to produce a temperature rise. Since the thermal resistance of
the silicon chip is low, the temperature of the sense diode is
assumed to be the same as the rest of the monolithic chip.
The sense diode should be calibrated over at least the
expected junction operating temperature chamber. Apply an
accurately measured, low current of about 1 mA through the
sense diode and measure the forward voltage in 25°C
increments after stabilization at each temperature. This
calibration provides enough data for at least six points to
construct a diode-forward-voltage versus
junction-temperature graph at the specified forward current.
A typical 25°C forward voltage is between 600 and 750 mV and
decreases 1.6 to 2.0 mV/oC.
For power levels above2W, it may be necessary to use more
than a single transistor if only the device saturation voltage
and sink current are used. When higher power is desired, keep
the output out of saturation.
Measuring the sense-diode forward voltage may require a
considerable waiting period (10 to 15 minutes) for thermal
equilibrium. In any event, at the instant of measurement, the
heating power may have to be disconnected since erroneous
readings may result from IR drop in circuit common leads.
Various circuit connections (such as four-point Kelvin) may be
arranged to reduce or eliminate this source of error.
The IC junction temperature can be determined by
comparing the voltage measurement with the internal power
source against the voltage measurement with the temperature
chamber.
12-11
....,.""''''' ,.....
~~,-.-----~~-~
PACKAGE INFORMATION (Continued)
bly will be reduced. Possible
solutions are: 1. Modify or partition the circuit design so the Ie
is not required to dissipate as
much power. 2. Reduce the
thermal resistance of the Ie by
using a heat sink or forced-air
cooling. 3. Reduce the ambient
temperature by moving heatproducing components such as
Setting Up the Circuit
Resistors control
output transistor
power dissipation
transformers and resistol
away from the Ie. 4. Specify
different Ie with improve
thermal or electrical charal
teristics (if available).
Calibrating the Sense Diode
Constant cu rrent
sou ree of about 1 rnA
I
,;
"'E
~ 500
o
u..
Transient
suppression
ICdevice
diode used
as sense diode
Q)
"0
o
is
400
300L-__. .____
Input power is negligible compared to output
power and is therefore not measured.
12-12
25
50
~
75
__
~
100
__. .__
~~~
125.
150
Junction Temperature, TJ (UC)
175
PACKAGE INFORMATION (Continued)
Operating and Handling Practices
for MOS Integrated Circuits
Handling Practices - Packaged Devices
Automatic Handling Equipment
Grounding alone may not be sufficient and feed
mechanisms should be insulated from the devices under test at the point where the devices are connected
to the test equipment. Ionized air blowers can be of
aide here and are available commercially. This
method is very effective in eliminating static electricity problems.
Sprague Electric incorporates input protection
diodes in all of its MOS/CMOS devices. Because of
the very high input resistance in MOS devices, the
following practices should be observed for protection
against high static electrical charges:
1. Device leads should be in contact with a conductive material except when being tested or in
actual operation.
Ambient Conditions
Dry weather with accompanying low humidity
tends to intensify the accumulation of static charges
on any surface. In this atmosphere, proper handling
procedures take on added importance. If necessary,
steam injectors can be procured commercially.
2. Conductive parts of tools, fixtures, soldering
irons and handling equipment should be
grounded.
3. Devices should not be inserted into or removed
from test stations unless the power is off.
Alert Failure Modes
4. Neither should signals be applied to the inputs
while the device power supply is in an off condition.
The common failure modes that appear when
static energy exists and when proper handling practices are not used are:
S. Unused input leads should be committed to
either VSS or VDD.
1. Shorted input protection diodes.
2. Shorted or 'blown' open gates.
3. Open metal runs.
Handling Practices - Ole
Simple diagnostic checks with curve tracers or
similar equipment readily identifies the above failure
modes.
A conductive carrier should be used in order to
avoid differences in voltage potential.
12-13
PACKAGE INFORMATION (Continued)
'A' PACKAGE: 14-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.014
0.008
~
'4 13 12 II 10 9 8
INDE~~I-id ::::::~II ~~15'
ll
2
I-
.0065
0.035
3
4
5
0.785
6
-I
7
0075 REF
----,- 0 0
J
0100:1:0010
0,735
NOTE 1
5.08 MAX
0200 MAX
#tr~"'"'m
tWJi +
0020
MIN
---.JLO.023
l i 0015
l--i;EATING PLANE
-4=L¥Amiiif-.+
Dwg. No. A-5496G ill
Owg. No. A-5496G mm
1
0. '51 MIN
--II
0.100 MIN
0.58
2.54 MIN
lr-039
'A' PACKAGE: 16-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
I!
0,044
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
~:,~~'----i ~
0.014
0.008
O.028~ )
1615141312 II 10 9
~
.w"q:::::JJj-:l ILL~
INDEX:~~~:::: ~ ~lJL j
0.065
~ 21 3
0.035
_
4
1-- 0 •785
5
~
_
0100 ± 0.010
NOTE 1
----I
1.65
0.89
/
1
21 3 4 5
I-- 19.93
6
7
8
254±O.25
NOTE 1
----,-/
18.67
0.735
0.200 MAX.
5.08 MAX
_~_+rSEATING
UrSEATING PLANE
PLANE
- ¥ = - m m W : 0.100 MIN.
0.020
MIN.
g:~~
~
16 15 14 13 12 II 10 9
JLO.023
0.015
-II
IJ
-¥=-~2.54MIN'
Owg. No. A-6402C in
~.
0.51 MIN
0025 REF.
+_~;~
-1
f ' 6 4 RE,
NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendors option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-14
Dwg.No.A-6402Cmm
PACKAGE INFORMATION (Continued)
'A' PACKAGE: l8-Pin Plastic Dual In-Line
DIMENSIONS IN MILLlMHRES
Based on 1" = 25.4 mm
DIMENSIONS IN INCHES
rrrt=
~
Q..Q..1.!
0.008
18 17 I. 15 14 13 12 "
~
10
INDE~~~::::::: :4- ~L--L.
-----r
11
l~
~',b;~
~
4
5
g::~55
6
7
8
9
0°
~'6~~ ~1 0.010
-I
/
INDEX
A~~~ ~L2 :3.~4
3
0.89
0.200 MAX.
0.21
U::::::::II
18 17 I. 15 14 13 12
•
7
"
10
J
9
LllL~
-----r
254' 0.,25
22.48
NOTE 1
/
5.08 MAX.
~
~
SEATING
~~
SEATING
PLANE
0.100
'N
0.020
MIN. --lL0023
I
-,
l,
6
2.5.15
26.42
7
8
9
---I
10
I 52.REF
.
)
254':025
NOTE 1
MAX
1¢"HOO "~,
0.020
/
20 19 18 17 16 15 14 13 12 "
mwmw+
--.JLO.023
----n--- 0015
Owg. No. A-IO,430 mm
Dwg. No. A-I0.430 in
O.lDO MIN
NOTES:
1. Lead spacing tolerance is non-cu mulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12--15
PACKAGE INfORMATION (Continued)
I
A' PACKAGE: 22-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.014
0,008
1r~f:::::::::11 f( 7~".
INDEX AREA"'"
Iiii '2
O.065~
3 4 5 6 7 8 9 10
MIN.
~I
O.045REF.
------
0"
O.lOO'±O.OIO
NOTE 1
5.08 MAX.
~SEATING
O~O
~
1.110
1.050
0,035
0.200 MAX.
~,
mwmvw+
I~
---.--,
PLANE
0.023
__ f;EATING PLANE
~wv-wwww
.-+-II-
Dwg. No. A-I0536 in
0.51
0.100 MIN,
g.~~
MIN.
0.015
Dwg. No. A-10536 mm
2.54 MIN.
IB' PACKAGE: a-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.014
0008
T rt ·
. - 87.,
.-- ,
, - 87.,
---
'"~:~=4~"~ ~~
0260
0240
0310
0290
l
0035
-.l
OIOO.t 0010
NOTE!
.0
bO
--rI
6,60
6.10
INOEX
---.
./
0200 MAX
165
'L2 -I
089
.91
3
4
787
7~
---L!
102 R.E'
.
.
15"
- - - . , 0"
254 t 025
_
NOTE 1
I
5.08 MAX
~SEATING PLANE
±tirEATING PLANE
0020
MIN
L
035
021
WI
---J La 023
~II-
0015
DWG.NO. A-IO.474A IN
051
MIN
DIDO
MIN
~I
-1H~~
DWG.NO. A-1O,474A MM
254 MIN
NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits, shown. '
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-16
PACKAGE INFORMATION (Continued)
'8' PACKAGE: 14-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
DIMENSIONS IN INCHES
Based on 1"
25.4 mm
=
0.014
0.008
~
.. ,,1211109.
~A:::)
~G
AREA~\L2
7~_075 R~
-"4
0.065
:3
0.785
0,035
0.735'
INDEX
-5
6
~
0.100
- " Ig:
* 0,010
,
NOTE 1
5.08 MAX
0.200 MAX
~SEATING
~SEATING PLANE
PLANE
0.020
MIN.
0.51 MIN9iWWWl=
9iWWW=+-
-1\--- g'gf~
1~.-9843C ~
OWG.NO.
DWG.NO. A-9843C IN
0J~O
-1r-g.,~~
2.54 MIN
'8' PACKAGE: 16-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MllLiMETRES
Based on 1"
II
0,044
O.028~
~:~~--i ~
0.014
0.008
I
16 15
I.
~
13 12 I' 10 9
-r--
INDEX:~~=::~ ~L-1
~ 213 :,4, 5. ~
0.065
0.035
_
~
!--0.785
I.
~21 3
1.65
0.89
/
~
_
25.4 mm
g:~r
_~2
13
INDExj:~~/': : :
~
0100tO.010
NOTE 1
16 15
=
r-~
11 10 9
:8:}:
)1
~
• 5
19.93
_
LllL.-3
~
2.5"0.25
NOTE 1
/
18.S7
0.735
0.200 MAX
5.08 MAX
-1-_~-!}EATING
0rSEATING PLANE
PLANE
-¥=-~O"OO MIN
0.020
J
l
JL
0.023
-II 0.015
,MIN.
~.
~o.
Owg.
-¥=-¥WfAfff ~5' MIN.
MIN lH:;~ -1
REF
A-10,311B ·IN
0.51
0025 REF
Dwg'. No. A-IO.31lB MM
f..6.
'H' PACKAGE: 8-Pin Hermetic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MllliMETRES
Based on 1"
~
0.220
-L
D
l~ 2
INDEX AREAJ
0.070
0.030
3
1
4
I
I
~
0.320
0.290
5.59
-'-_ _ L
L......J-L 0.100±0.010
0.528'
MAX
[[---.-
5
NOTE 1
-L
1:;
INDEX AREAJ
1.78
0.76
0.008
~O'200~AX,-0.005
-r---r
~L
0.015
I
11 2
25.4 mm
0= ----.-
5
8,13
7.37
1
3
I-
4
I
1--I---+-2.54±0.25
NOTE I
MAX
13.41
-'- _ _ L-
k
0.20
5'08M~X
Fr
MIN
~
0
=
bt
Dwg, No. A-IO,31JA in
.j~ ~:~~~ T ~:~~~
0.38
,--0.13
,MIN
I
~
~II ~:~!' T;:~~
NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-17
Dwg. No, A-I0,313A mm
IE
PACKAGE INFORMATION (Continued)
'H' PACKAGE: 14-Pin Hermetic Dual In-Line
DIMENSIONS IN INCHES
14 13 12 J 1 JO 9
8
14 13 12 II JO 9
~~[~~~J]
~I~
I
INDEX
4
AREA
5
0.070
0.030 0.785
MAX
6 7
i--++- 0.100.0.010
~AX
..,
rr=-~~
~
AREA
"1r-~~Z5
2 _3
4
0.76
19.94
MAX
~
5
6 7
i--++- 2.54NOTE
± 0.25
1
Dwg. No.
A~9767B
L
in
1.52
0.38
0.125
[I+~~
k
g:~~
mm-L
"1 r- ~~~
D08 MAX
~
0.023
0.014
8
~~[~~~J]
II
I
INDEXJ
0:008
NOTE 1
::=~-L
II.
0.015
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
-l~
Owg. No. A-9767B mm
~
0.36
3,18
'H' PACKAGE: 16-Pin Hermetic Dual In-Line
DIMENSIONS IN INCHES
~~~:::~[~I
I~'
~7
I~~~~
~ ~ .J
121
3
•
5
0.030
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
[L~~~=t=-t::"
8
~~:::~r~1
8
/~~2~' 563-
~
O.IOO±O.OIO
NOTE 1
INDEX
AREA
0.008
0.840 MA
~O'OO~MIN' LEADS
!.i....
0,060
0.015
_11 .. 0.023
....,
0.014
~
1.78
0.76
21.34 MAX
J
+
[[~~~
4-'L
b
2.54 - 0.25
NOTE I
0.20
~~'~P161, !f 9,
I, 8, 9,
ANO 16 AT
VENDOR'S OPTION
VENDOR'S
OPTION
~o
0.125
Dwg. No. A-IO,210B in
Dwg. No. A·1O,211B mm
NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-18
PACKAGE INFORMATION (Continued)
'H' PACKAGE: l8-Pin Hermetic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm
DIMENSIONS IN INCHES
~':r:::J~:1
~,:r:::J ~:I
I
1'1}""3
INDEX/""
4 5
AREA
..j ~o
0.030
_0.200 MAX
.,
I'l ?
' 03
..j ~
AREA
r-0M~::;
4 5
~A~
0.76
8.13
.1
.,
0.38
-I~
0.125
0.20
NOTE I
r-
Ef~L
Owg. No, A-IO,3IlA in
~
k
I
6 7 8 9
H + 2.54±O.25
- 5.08 MAX
~YRKR]fJ11~}lL
I~
-J 0,014
INDEX
NOTE 1
~~l{
0.015
/
6 7 8 9
H+O.l00±O.OlO
0,927
MAX
-.
0=.Ly
Owg. No. A-IO,3I2A mm
~
0.36
3.18
'J' PACKAGE: 14-Pin Hermetic Flat-Pack
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
~:::
O.15 TYP
~-
1.02
~1'.25
=F=j
~~===::::J=-i
7.11 MAX
!
NOTE I
NOTES:
I i'NCLUDES OFF-CENTER LID, MENISCUS,
t
GLASS OVERRUN
2 ALL LEADS WELDABLE AND SOLDERABLf
Dwg. No. A-IO,252A in
Dwg. No. A-IO,252A mm
NOTES:
I. Lead spacing tolerance is non-cu mulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-19
IE
PACKAGE INFORMATION (Continued)
'M' PACKAGE: 8-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm
t~,.
0.014
,_,~
--.
8765
0.260
0.065
0.035
J
I...
2
3
-.I
4
-'LJ
0.040 REF
0100' 0.010
NOTE I
g~
0.21
,-
tr
0310
I
I
7.87
8765
6.60
SJO
7.37
L2
INDEX l R E A : : J I Q
I
00
J,65
/
0.89
0,200 MAX
3
~
4
1.02 REF.
*,5.
- - - - . 00
2.54 :!:O.25
9.91
/
NOTE 1
5.08 MAX.
~SEATING PLANE
tilEATING PLANE
0020
MIN,
t
~
0.35
0.008
WI
Dwg. No.
A~5842B
in
0.51
0.100
MIN.
---lLO.023
-11- 0.015
MIN,
ffiff=r
Dwg, No. A-5842B mm
2.54 MIN
--lLo.58
--11
0 .39
'Q' PACKAGE: 16-Pin Plastic Quad In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm
~0012
INDEX AREA
~
Z 3
6
-I0.• '7i<-
lE
0.0J.-~
I--I 0,400
-I
j
~M'FiAFT"ffi'i;;!!
0.617
INDEX AREA
~WBm£09.
!
3 ____ 6
j 8'
11.2.0
19.55 MAX.
0.232 MAX.
II
C2
-16.27 i<-
r7~EATING
HSEATING PLANE
Ir a.ou
...j,.0.~1.-1
l£~IO.16~
MAX.
0.770 MAX
MIN.
~O"O
6~~~~~~~
f
0.100
H - NOTE
Dwg. No. A-I0,434 in
MIN
1.'0
± 0.010
MtN.
I
PLANE
Dwg. No. A-IO,434mm
W B m £ ' O MIN.
~I--O.6!5
w-
2.54
NOTE
± 0.25
I
NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-20
PACKAGE INFORMATION (Continued)
'R' PACKAGE: 14-Pin Ceramic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
rL
0.35
0.014
0.008
0.21
~~:~::::l i~,"
INDEX
AREA~~'I
,-;
0,065
~
o 035
O.2~O MAX.
5
0,785
6Uf7
0.075 REF.
0.100 ±a.OlD
--r
7
141312111098
-.------~
0°
INDEX
~-=;=
MIN. -.JLO.023
~II~ 0,015
19.93 5
~
15°
~:~5~~.25
,0°
NOTE 1
5.08 MAX.
b-F;EATING PLANE
1¢SEATING PLANE
0.020
T~~ l
18.67
NOTE J
0.735
7.87
Ti
7.37
7.11
6.10'
-*-
~~T
VVllllf-+
Dwg. No. A-7894B in
Dwg. No. A-7894Bmm
0.51 MIN.-V
--.JL 0.58
-11- 0.39
D.lOOMIN.
2.54 MIN.
'R' PACKAGE: 16-Pin Ceramic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
DIMENSIONS IN INCHES
-rnL
~:~~--1 ~
r-~'6'51413
1211 109
g:~r
7. II
7.87
7.37
6.10 I
INDEXA~~21
O.89-p
,
4
5
1- 19.93
~!~ 2.54'~
~NOTE
1
15°
0°
--r
/
18.67
0.200 MAX
5.08 MAX
1¢~'"~ ~~,
WtSEATING PLANE
-¥=-~0.'00 MIN.
0.020
MIN.
---It--
0023
0:015
-1 ~
Dwg. No. A·I0,549 mm
Dwg. No. A-IO,549 in
0.51 MIN
0,025 REF.
.JL
-11-
~'.;~
J
l
0.64 REF
NOTES,
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.
12-21
PACKAGE INFORMATION (Continued)
'R' PACKAGE: l8-Pin Ceramic Dual In-Line
DIMENSIONS IN INCHES
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.35
Q.Q.!.i
Q.2f
.,.fi:::::::i ~L,~
~
~
0.035
~
0.915'
0.885
0,100-0.010
NOTE 1
T~
INDEX
---,..
/
---,..
/
5.08 MAX.
~
SEATING
SEATING
~
PLANE
~O"OO
MIN
.'N.
"'L....r='-'='---;:<7.;-~"-.q-2.54:1:
0.25
NOTE 1.
0,89
0,200 MAX.
0.020
-1-~
AREA
IT
051 .'N.
--I "]::i\ e
-JI-%St!
PLANE
~
•
MIN
.
-l1-
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