1982_NEC_Microcomputer_Catalog 1982 NEC Microcomputer Catalog

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t\'EC

1982 CATALOG

NEe
Electronics U.S.A. Inc.
Microcomputer Division

r-~......-;o!,"",,"",,"-......,....,..rt:'!"9_.,----------

__

Western Microtecbnology
10040 Bubb Road
Cupenino, CA 95014
Phone (408) 715-1660
TWX 910.338-0013

This 1982 Microcomputer Division catalog includes specifications for the current product
lines marketed by the Microcomputer Division of NEC Electronics U.S.A. Inc. In addition, it contains a special section of specifications for the ROM product line marketed
by the Electronic Arrays Division. Both product lines are sold through the NEC Electronics U.S.A. sales network (see last page and back covers for listing).
NEC Electronics U.S.A. Inc., with corporat€! headquarters in San Mateo, California, is a
subsidiary of Nippon Electric Company. NEC Electronics U.S.A. Inc. consists of four
product divisions. The Microcomputer Division, founded in 1975 and now located in
Natick, Massachusetts, markets a wide variety of leading-edge LSI semiconductor
memories and microprocessors. The Electronic Arrays Division, acquired by NEC in
1978, manufactures ROMs and RAMs in Mountain View, California. The Electron Division, founded in 1976 and headquartered in Sunnyvale, California, markets a broad
range of products including linear ICs, vacuum fluorescent displays, tantalum capacitors, discrete semiconductors including optoelectronics and fiber optics. The Board Division is also located in Natick, Massachusetts; it designs, manufactures, and sells
sophisticated board and system products.

NEe Electronics U.S.A. Inc.
Corporate Headquarters
3055 Clearview Way, Suite 310
San Mateo, California 94402
NEe Electronics U.S.A. Inc.
Electron Division
252 Humboldt Court
Sunnyvale, California 94086
NEe Electronics U.S.A. Inc.
Electronic Arrays Division
550 East Middlefield Road
Mountain View, California 94043

NEe Electronics U.S.A. Inc.
Microcomputer Division
One Natick Executive Park
Natick, Massachusetts 01760

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

1982 CATALOG

The information in this document is subject to change without notice. NEC Electronics
U.S.A. Inc. makes no warranty of any kind with regard to this material, including, but
not limited to, the implied warranties of merchantability and fitness for a particular
purpose. NEC Electronics U.S.A. Inc. assumes no responsibility for any errors that may
appear in this document. NEC Electronics U.S.A. Inc. makes no commitment to update
nor to keep current the information contained in this document.
No part of this document may be copied or reproduced in any form or by any means
without the prior written consent of NEC Electronics U.S.A. Inc.
© 1982 by NEC Electronics U.S.A. Inc.
Printed in the United States of America
Additional copies of this catalog or other NEe literature may be obtained from your
local representative or distributor (addresses in section 10 of this catalog) or by
writing to:
Communications Department
NEC Electronics U.S.A. Inc.
Microcomputer Division
One Natick Executive Park
Natick, MA 01760 U.S.A.
3

ttlEC

NEe Electronics U.S.A. Inc.
Microcomputer Division

CONTENTS
GENERAL INFORMATION

MEMORIES

RANDOM ACCESS MEMORIES
FIELD PROGRAMMABLE READ ONLY MEMORIES

ELECTRONIC ARRAYS MASK PROGRAMMED READ ONLY MEMORIES

MICROCOMPUTERS

II
fl

11
II

m

SINGLE CHIP 4-BIT MICROCOMPUTERS

m

SINGLE CHIP a-BIT MICROCOMPUTERS

6

MICROPROCESSORS

PERIPHERALS
REPRESENTATIVES & DISTRIBUTORS

m
m
IE

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

FUNCTIONAL INDEX
RANDOM ACCESS MEMORIES
Selection Guide. • . . . . . • • . . . . . ••
Dynamic NMOS RAMs
jAPD416.....................
jAPD4164........... .••....••
Static NMOS RAMs
jAPD4104. . . .. . . . . . • . • . . •. . ..
jAPD2114L. . . . . • • . . . . . . . • • . ..
jAPD2147 ... " . •.. . . . • . .•• . ..
jAPD2149. . . . . . .. . . . . . .. . . • ..
jAPD2167. . . .. . . . . . . . . . . . . • ..
jAPD4016......... ....•..•.•.
Static CMOS RAMs
jAPD5101L .•.......••.•.....•
jAPD444 .....................
jAPD446 ............•....•...
jAPD449 ..•......••..........

SINGLE CHIP
a-BIT MICROCOMPUTERS

11

Selection Guide. . . . • • • . . . . . . . ..
Alternate Source Guide ...•.....
ROM-Based Products
Ordering Procedure. . . • . . . • . ..
jAPD7800 . . . . . . . . . . . . . . • . . • . .
jAPD7801 . . . . . . . . . • . . • . . . . . . •
jAPD7802 . . • . . . • . • • . • • • . • . • . .
jAPD78C06 ...•.•........•.•..
jAPD7811G .....•.....•.•....
jAPD8021 •....•.•......... , ..
jAPD8022 •.....•...•.........
jAPD8041 A/8741 A ...•.••.•....
jAPD8048/8748/8035L . ....•...•
jAPD80C48/80C35 . . . . . . . . . . . • .
jAPD8049/8039L . . . . . . . . . . . . . .
jAPD80C49/80C39 ....... " ....

21
31
37
43
47
53
59
63
69
75
79
85

FIELD PROGRAMMABLE
READ ONLY MEMORIES
Selection Guide. • . . • . . . . . . . • . •.
Bipolar
jAPB406/426 ..•.... . . . . . • . . ..
jAPB409/429 .•..... . . . . . • . • ..
jAPB450 .....................
U.V. Erasable
jAPD2716 ...............•....
jAPD2732 . . . . . . . . . . . . . . . . . . .•
jAPD2732A. . . . . . • . • • . . . • . . . ..
jAPD2764 . . . . . . . . . . . . • . • . . . .•

Selection Guide. . . . . . . . • • . . . . ..
Alternate Source Guide .........
jAPD780 ............•.•..•.•.
jAPD8080AF ...•....••.......
jAPD8085A ....•......•...•..•
jAPD8086 . . . . . . . . . . . . • . . . • . • .
jAPD8088 ............••......

93
97
103
105
111
115
119

Selection Guide. . . . . . . . . . . . . • ..
Alternate Source Guide •....•...
ROM-Based Products
Ordering Procedure. . . • . . . • . .•
jAPD765A. . . . • . . . . . . . . . . • . . . .
jAPD7001 ••.....•...........•
jAPD7002 . . . • . . . . . • . . . . . . . . . .
jAPD7201 . . . • . • . . . • . . . . . • . . . .
jAPD7210 ....................
jAPD7220 .•..........•......•
jAPD7225 . . . . . . . . . . . . . . . • . . . .
jAPD7227 . . . . . . . . . . . . • . . . . . . .
jAPD7720 . . . . . . . . . . . . . . . . . . ..
jAPD8155/8156 .......•.......
jAPB8212 .•..........••..•...
jAPB8214 ....... , ....•. '" ., .
jAPB8216/8226 ...... . . . . • . . . .
jAPB8224 . . . . • • . . . • . . . . . • . . . .
jAPB8228 . . . . . . . . . . . . . . . . • . . .
jAPD8237 A-5 . . . . . . . . . • . . . . . . .
jAPD8243 .•...•....• " ....•...
jAPD82C43. . . . . . . . . . . . • . . . . . .
jAPD8251/8251A ..............
jAPD8253-5 ..................
jAPD8255A-5 . . . • . . . . . . • . . . . . .
jAPD8257-5 ......•...•.......
jAPD8259A. . . . . . . . . . . . . . . . . . .
jAPD8279-5 ...•...... . . . . . . . .
jAPB8282/8283 . . . . . . . . . . . . . . .
jAPB8284 . . . . . . . . . . . . . . . . . . . .
jAPB8284A ...................
jAPB8286/8287 . . . . . . . . . . . . . . .
jAPB8288 . . • . . . . . . . . . . . . . . . . .
jAPB8289 . . . . . . . . . . . . . . . . . . . .
jAPD8355/8755A ..............

125
129
133
137

12
15
17
143
157
159
161
163
165
167
169
171
173
177
193
199
205
211
219
225
233
235
241
249

12
15
391
407
421
435
447

.PERIPHERALS

SINGLE CHIP
4-BIT MICROCOMPUTERS
Selection Guide. . . . . . . . . . . • . . ..
Microcomputer Alternate
Source Guide. . . . . . . . • . . . . . ..
ROM-Based Products
Ordering Procedure. . . • . . . . . ..
jACOM-4 ...•............••.•.
jAPD546/547 ....•.......•....
jAPD557L . . . . . . . . . . . . . . . . . . •.
jAPD650/651 .•.......•.......
jAPD547L •.............••....
jAPD552/553 . . . . . . . . . . . . . . . ..
jAPD550/554 ...... . . . . . . . . . . .
jAPD550Ll554L • . . . . . • . . . . . . . .
jAPD652 ........... " ........
jAPD556B Evaluation Chip . . . . . .
jAPD7500 Series Introduction ...
jAPD7501 . . • . . . . • . . . . . . . . . . ..
jAPD7502/7503 .... . . . . . . . . . ..
jAPD7506 . . . . . . . . . . . . . . . . . . . .
jAPD7507/7508 ...............
jAPD7507S ............•.. " ..
jAPD7508A. . . • . . . . . . . • . . . . . . .
jAPD7519 ....................
jAPD7520 . . . . . . . . . . . . . . . . . . . •
jAPD7500 Evaluation Chip ......
MC-430P . . . . . . . . . . . . . . . . . . . .

17
257
269
295
321
325
329
335
341
351
363
371
381

MICROPROCESSORS
11

ELECTRONIC ARRAYS
MASK PROGRAMMED ROMs
EA Ordering Procedure ......•..
jAPD2316E/EA8316E ........•.
jAPD2332A/B/EA8332A/B. . . . • ..
jAPD2364/EA8364 . . . . . . . . . . . . .

12
15

5

12
15
17
459
479
483
487
499
515
537
545
551
569
577
583
591
595
601
607
619
625
631
649
657
665
675
693
703
707
715
723
729
737
745

II

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division
PRODUCT

NUMERICAL INDEX
PRODUCT

PAGE

"'COM-4 ..................•......
MC-430P . . . . . . . . . . . . . . . . • . . . . • . .
"'PB406 .........................
",PB409 .........•...............
",PD416 .........................
",PB426 .........................
",PB429 .........................
"'PD444 .........................
",PD446 ..............•..........
"'PD449 .........•...............
",PB450 .........................
",PD546/547 .....................
",PD547L ........................
",PD550 .....•...................
",PD550L . . . . . . . . . . . . . . . . . . • . . . . .
",PD552/553 .....................
",PD554 .........................
",PD554L . . . . . . . . . . . • . . . . . . . . . . . .
",PD556B ........................
",PD557L . . . . . . . . . . . . . . . . . . . . . . . .
",PD650/651 •....................
",PD652 ...........••.......•....
",PD765A ..........•........•....
",PD780 .........................
",PD2114L . . . . . . . . . . . . . . • . . . . • . •.
",PD2147 . . . . . . . . . . . . . . . . . . . . . . •.
",PD2149 ....................... ,
",PD2167 .......... ........ ......
",PD2316E .......................
",PD2332A/B . . . . . . . . . . . . . . . . . . . ..
",PD2364 ........•.............•.
",PD2716 . . . . . . . . . . . . . . . . . . . . . . . .
",PD2732 . . . . . . . . . . . . . . . . . . . . . . . .
",PD2732A .......................
",PD2764 . . . . . . . . . . . . . . . . . . . . . . . .
",PD4016 .. ........ .........•....
",PD4104 . . . . . . . . . . . . . . . . . . . . . . ..
",PD4164 .. ................. .....
",PD5101L . . . . . . . . . . . . . . . . . . . . . ..
",PD7001 ........................
",PD7002 . . . . . . . . . . . . . . . . . . . . . . . .
",PD7201 ........................
",PD7210 ........................
",PD7220 ........................
",PD7225 . . . . . . . . . . . . . . . . . . . . . . . .
",PD7227 . . . . . . . . . . . . . . . . . . . . . . . .
",PD7500 . . . . . . . . . . . . . . . . . . . . . . . .
",PD7501 ........................
",PD7502/7503 ...................
",PD7506 . . . . . . . . . . . . . . . . . . . . . . . .
",PD7507/7508 ...................
",PD7507S .......................
",PD7508A .......................

PAGE

",PD7519 ........................ 233
",PD7520 . . . . . . . . . . . . . . . . . . . • . . . . 235
",PD7720 .......................• 551
",PD7800 . . . . . . . . . . . . . . . . . . . . . . . . 257
",PD7801 . . . . . . . . . . . . . . . . . . . . . . . • 269
",PD7802 . . . . . . . . . . . . . . . . . . . . . . . . 295
",PD7811G ....................... 325
",PD78C06 . . . . . . . . . . . . . . . . . . . . . . . 321
",PD8021 ........................ 329
",PD8022 . . . . . . . . • . . . . . . . . . . . . . . . 335
",PD8035L ....................... 351
",PD80C35 . . . . . . . . . . . . . . . . . . . . . • . 363
",PD8039L . . . . . . . . . . . . . . . . . . . . . . . 371
",PD80C39 ....................... 381
",PD8041A ....................... 341
",PD8048 ........................ 351
",PD80C48 . . . . . . . • . . . . . . . . . . . . . . . 363
",PD8049 . . . . . . . . . . . . . . . . . . . . . . . . 371
",PD80C49 ......................• 381
",PD8080AF .................•...• 407
",PD8085A ....................... 421
",PD8086 . . . . . . . • . . . . . . . . . . . . . . . • 435
",PD8088 ........•..............• 447
",PD8155/8156 •.................. 569
",PB8212 ........................ 577
",PB8214 ......•................. 583
",PB8216 ........................ 591
",PB8224 . . . . . . . . . . . . . . . . . . . . . . . . 595
",PB8226 . . . . . . . . . . . . . . . . . . . . . . . . 591
",PB8228 ........................ 601
",PD8237A-5 .............•....... 607
",PD8243 .......•................ 619
",PD82C43 . . . . . . . . . . . . . . . . . . . . . . . 625
",PD8251/8251A .................. 631
",PD8253-5 ...................... 649
",PD8255A-5 . . . . . . . . . . . . . . . . . . . . . 657
",PD8257-5 ...................... 665
",PD8259A . . . . . . . . . . . . . . . . . . . . . . . 675
",PD8279-5 ...................... 693
",PB8282/8283 ................... 703
",PB8284 . . . . . . . . . . . . . . . . . . . . . . . . 707
",PB8284A . . . . . . . . . . . . . . . . . . . . . . . 715
",PB8286/8287 ................... 723
",PB8288 . . . . . . . . . . . . . . . . . . . . . . . . 729
",PB8289 . . . . . . . . . . . . . . . . . . . . . . . . 737
EA8316E ........................ 129
EA8332A1B . . . . . . . . . . . . . . . . . . . . . . 133
EA8364 ......................... 137
",PD8355 ........................ 745
",PD8741A ....................... 341
",PD8748 ........................ 351
",PD8755A ....................... 745

143
249
93
97
21
93
97
75
79
85
103
157
163
167
169
165
167
169
173
159
161
171
459
391
43
47
53
59
129
133
137
105
111
115
119
63
37
31
69
479
483
487
499 .
515
537
545
241
193
199
205
211
219
225

7

II

t-IEC

NEe Electronics U.S.A. Inc.
Microcomputer Division

GENERAL INFORMATION

I

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MEMORY SELECTION GUIDE
DEVICE

SIZE

PROCESS

PACKAGE

ACCESS
TIME

CYCLE

SUPPLY
VOLTAGE

450 ns
200 ns
150 ns
150 ns
150 ns
200 ns
150 ns
25 ns
35 ns
55 ns

450 ns
200 ns
150 ns
150 ns
150 ns
310 ns
150 ns
25ns
35 ns
55 ns

+5
+5
+5
+5
+5
+5
+5
+5
+5
+5

C
C/D
C/D
C/D
C/D
C
C
D
D
D

22
18
24
24
24
18
18
18
18
20

ns
ns
ns
ns

50 ns
50 ns
50 ns
50 ns

+5
+5
+5
+5

C/D
C/D
C/D
C/D

18
18
24
24

200 ns

200 ns

+5

D

48

450
450
250
250

450
450
250
250

ns
ns
ns
ns

+5
+5
+5
+5

D
D
D
D

24
24
24
28

MATERIALI PINS

DYNAMIC RANDOM ACCESS MEMORIES
MPD416
MPD4164
STA TIC RANDOM ACCESS MEMORIES
MPD5101L
MPD444
MPD446
MPD449
MPD4016
MPD4104
MPD2114L
MPD2147
MPD2149
MPD2167

256 x
1K x
2K x
2K x
2K x
4K x
1K x
4K x
1K x
16K x

4 TS
4 TS
8 TS
8 TS
8 TS
1 TS
4 TS
1 TS
4 TS
1 TS

CMOS
CMOS
CMOS
CMOS
NMOS
NMOS
NMOS
NMOS
NMOS
NMOS

FIELD PROGRAMMABLE READ ONL Y MEMORIES
(Bipolar)
1K x 4 OC BIPOLAR
MPB406
1K x 4 TS BIPOLAR
MPB426
2K x 8 OC 'BIPOLAR
MPB409
2K x 8 TS BIPOLAR
MPB429
(Bipolar Logic Array)
9216 bit
BIPOLAR
MPB450
(U.V. Erasable)
2K x 8 TS
NMOS
MPD2716
4K x 8 TS
MPD2732
NMOS
4K x 8 TS
NMOS
MPD2732A
8K x 8 TS
NMOS
MPD2764

50
50
50
50

ns
ns
ns
ns

MASK PROGRAMMED READ ONL Y MEMORIES
MPD2316E/
EA8316E
MPD2316E/
EA8316E-1
MPD2332A/B/
EA8332A/B
MPD2332A/B-1/
EA8332A/B-1
MPD2364/
EA8264
MPD23128/
EA8364

2K x 8 TS

NMOS

450 ns

450 ns

+5

C

24

2K x 8 TS

NMOS

350 ns

350 ns

+5

C

24

4K x 8 TS

NMOS

450 ns

450 ns

+5

C

24

4K x 8 TS

NMOS

350 ns

350 ns

+5

C

24

8K x 8 TS

NMOS

450 ns

450 ns

+5

C

24

16K x 8 TS

NMOS

250 ns

350 ns

+5

C

28

Notes: OC = Open Collector; C = Plastic Package; D

11

= Hermetic Package; TS = 3-State

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MICROCOMPUTER SELECTION GUIDE
SINGLE CHIP 4-81T MICROCOMPUTERS
DEVICE

FAMILY

ROM

RAM

I/O

PROCESS

OUTPUT

~PD546

~COM-43

2000 x 8

96 x 4

35

PMOS

~PD553

~COM-43H

2000 x 8

96 x 4

35

~PD557L

~COM-43SL

2000 x 8

96 x 4

21

~PD650

~COM-43C

2000 x 8

96 x 4

35

CMOS

push-pull

~PD547

~COM-44

1000 x 8

64 x 4

35

PMOS

FEATURES

SUPPLY
VOLTAGE

PINS

-10

42

PMOS

0.0.
0.0.

A

-10

42

PMOS

0.0.

A

-8

28

~PD547L

~COM-44L

1000 x 8

64 x 4

35

PMOS

0.0.
0.0.

~PD552

~COM-44H

1000 x 8

64 x 4

35

PMOS

0.0.

~PD651

~COM-44C

1000 x 8

64 x 4

35

CMOS

push-pull

A

+5

42

-10

42

-8

42

-10

42

+5

42/52

~PD550

~COM-45

640 x 8

32 x 4

21

PMOS

0.0.

A

-10

28

~PD550L

~COM-45L

640 x 8

32 x 4

21

PMOS

A

-8

28

~PD554

~COM-45

1000 x 8

32 x 4

21

PMOS

0.0.
0.0.

A

-10

28

~PD554L

~COM-45L

1000 x 8

32 x 4

21

PMOS

0.0.

A

-8

28

~PD652

~COM-45C

1000 x 8

32 x 4

21

CMOS

push-pull

+5

28

~PD556

~COM-43

External

96 x 4

35

PMOS

0.0.

B

-10

64

MC-430P

~COM-43

2000 x 8
UV EPROM

96 x 4

35

PMOS

0.0.

G

-10

42

iJPD7500

~PD7500

Series

External

256 x 4

46

CMOS

0.0.

C

+2.7 to 5.5

64

~PD7501

~PD7500

Series

1024 x 8

96 x 4

24

CMOS

0.0.

0

+2.7 to 5.5

64

~PD7502

~PD7500

Series

2048 x 8

128 x 4

23

CMOS

0.0.

0

+2.7 to 5.5

64

0

+2.7 to 5.5

64

~PD7503

~PD7500

Series

4096 x 8

224 x 4

23

CMOS

0.0.

iJPD7506

~PD7500

Series

1024 x 8

64 x 4

22

CMOS

iJPD7507

iJPD7500 Series

2048 x 8

128 x 4

32

CMOS

+2.7 to 5.5

28

+2.7 to 5.5

40/52

+2.7 to 5.5

40/52

iJPD7508

~PD7500

Series

4096 x 8

224 x 4

32

CMOS

0.0.
0.0.
0.0.

iJPD7508A

~PD7500

Series

4096 x 8

208 x 4

32

CMOS

0.0.

A

+2.7 to 5.5

40

~PD7519

~PD7500

Series

4096 x 8

256 x 4

28

CMOS

0.0.

F

+2.7 to 5.5

64

~PD7520

~PD7500

Series

768 x 8

48 x 4

24

PMOS

0.0.

E

Notes:

= -35V VF Display Drive

A
B
C

o
E
F
G

= ~COM-4 Evaluation Chip
= iJPD750X Evaluation Chip
= LCD Controller/Driver

= LED

Display Controller/Driver

= VF Display Controller/Driver

= Pin-Compatible with

iJPD546

0.0.= Open Drain

12

-6 to -10

28

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MICROCOMPUTER SELECTION GUIDE
SINGLE CHIP 8·BIT MICROPROCESSORS
DEVICE

SPECIAL FEATURES

ROM

RAM

I/O

PROCESS

OUTPUT

CYCLE

SUPPLY
VOLTAGE

PINS

J.lPD8021

Zero·Cross Detector

1024 x 8

64 x 8

21

NMOS

BD

3.6 MHz

+5

28

J.lPD8022

On.Chip A/D Converter

2048 x 8

64 x 8

NMOS

BD

3.6 MHz

+5

40

J.lPD8035L

J.lPD8048 w/External Memory

External

64 x 8

26
27

NMOS

TS,BD

6 MHz

+5

40

J.lPD8039L

J.lPD8049 w/External Memory

External

128 x 8

27

NMOS

TS,BD

11 MHz

+5

40

J.lPD8041

Peripheral Interface w/Slave Bus

1024 x 8

64 x 8

18

NMOS

TS,BD

6 MHz

+5

40

J.lPD8041A

Enhanced J.lPD8041

1024 x 8

64 x 8

18

NMOS

TS,BD

6MHz

+5

40
40

J.lPD8048

Expansion Bus

1024 x 8

64 x 8

27

NMOS

TS,BD

6MHz

+5

J.lPD8049

High Speed J.lPD8048

2048 x 8

128 x 8

27

NMOS

TS,BD

11 MHz

+5

40

J.lPD8741A

UV.EPROM J.lPD8041A

1024 x 8

64 x 8

18

NMOS

TS,BD

6 MHz

+5

40

J.lPD8748

UV.EPROM J.lPD8048

1024 x 8

64 x 8

27

NMOS

TS,BD

6 MHz

J.lPD80C35

CMOS 8035

External

64 x 8

27

CMOS

TS,BD

6MHz

+5
+2.7 to 5.5

40
40

J.lPD80C48

CMOS 8048

1024 x 8

64 x 8

27

CMOS

TS,BD

6 MHz

+2.7 to 5.5

40

J.lPD80C39

CMOS 8039

External

128 x 8

27

CMOS

TS,BD

6 MHz

+2.7 to 5.5

40

J.lPD80C49

CMOS 8049

2048 x 8

128 x 8

27

CMOS

TS,BD

6 MHz

+2.7 to 5.5

40

J.lPD7800

Development Chip
8080 Expansion Bus
64K Memory Address Space

External

128 x 8

48

NMOS

TS,BD

4 MHz

+5

64

4096 x 8

128 x 8

48

NMOS

TS,BD

4 MHz

+5

64

J.lPD7801
J.lPD7802

Expanded J.lPD7801

6144 x 8

64 x 8

48

NMOS

TS,BD

4 MHz

+5

64

J.lPD78C05

CMOS Microprocessor

External

128 x 8

46

CMOS

TS,BD

4 MHz

+5

64

J.lPD78C06

CMOS Microcomputer

4096 x 8

128 x 8

46

CMOS

TS,BD

4MHz

+5

64

J.lPD7810

Powerful Microprocessor

External

256 x 8

44

NMOS

TS,BD

10 MHz

+5

J.lPD7811

8 Channel AID

4096 x 8

128 x 8

44

NMOS

TS,BD

10 MHz

+5

64
64

MICROPROCESSORS
DEVICE

SUPPLY
VOLTAGES

PRODUCT

SIZE

PROCESS

OUTPUT

CYCLE

f,LPD780

Microprocessor

8·bit

NMOS

3·State

4.0 MHz

+5

PINS
40

f,LPD8080AF

Microprocessor

8·bit

NMOS

3·State

2.0 MHz

+12 ± 5

40

j.lPD8080AF·2

Microprocessor

8·bit

NMOS

3·State

2.5 MHz

+12 ± 5

40

j.lPD8080AF.1

Microprocessor

8·bit

NMOS

3·State

3.0 MHz

+12 ± 5

40
40

j.lPD8085A

Microprocessor

8·bit

NMOS

3·State

3.0 MHz

+5

~lPD8085A·2

Microprocessor

8·bit

NMOS

3·State

5.0 MHz

+5

40

j.lPD8086

Microprocessor

16·bit

NMOS

3·State

5.0 MHz

+5

40

13

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MICROCOMPUTER SELECTION GUIDE
SYSTEM SUPPORT
DEVICE

PRODUCT

SIZE

PROCESS

OUTPUT

CYCLE

SUPPLY
VOLTAGES

PINS

,uPD765AC

Double Sided/Double Density
Floppy Disk Controller

8-bit

NMOS

3-State

8 MHz

+5

40

,uPD781

Dot Matrix Printer
Controller-Epson 500 Printer

8-bit

NMOS

3-State

6 MHz

+5

40

,uPD782

Dot Matrix Printer
ControJler-Epson 200 Printer

8-bit

NMOS

3-State

6 MHz

+5

40

/tPD7001

8-Bit A/D Converter

8-bit

CMOS

Open
Collector
Serial

10 kHz
Conversion
Time

+5

16

/tPD7002

1O-Bit A/D Converter

8-bit

CMOS

3-State

400 Hz
Conversion
Time

+5

28

/tPD7201

Multi-Protocol Serial
Controller

8-bit

NMOS

3-State

4 MHz

+5

40

/tPD721 0

lEE E Controller (Tal ker,
Listener, Controller)

8-bit

NMOS

3-State

8 MHz

+5

40

/tPD7220

Color Graphic Display
Controller

8-bit

NMOS

3-State

5 MHz

+5

40

/tPD7225

Alpha Numeric LCD
Controller /Driver

8-bit

CMOS

-

-

2.7 to 5.5

52

/tPD7227

Dot Matrix LCD
Controller/Driver

8·bit

CMOS

-

-

2.7 to 5.!;

64

,uPD7720

Signal Processor

16-bit

NMOS

3-State

8 MHz

+5

28

/tPD8155

256 x 8 RAM with I/O Ports
and Timer

8-bit

NMOS

3-State

-

+5

40

/tPD8155-2

256 x 8 RAM with I/O Ports
and Timer

8-bit

NMOS

3-State

-

+5

40

,uPD8156

256 x 8 RAM with I/O Ports
and Timer

8-bit

NMOS

3-State

-

+5

40

/tPD8156-2

256 x 8 RAM with I/O Ports
and Timer

8-bit

NMOS

3-State

-

+5

40

/tPB8212

I/O Port

8-bit

Bipolar

3-State

/tPB8214

Priority Interrupt Controller

3-bit

Bipolar

Open
Collector

/tPB8216

Bus Driver Non-Inverting

4-bit

Bipolar

3-State

/tPB8224

Clock Generator Driver

2 phase

Bipolar

High Level
Clock

/tPB8226

Bus Driver Inverting

4-bit

Bipolar

3-State

/tPB8228

System Controller

8-bit

Bipolar

3-State

-

+5

24

3 MHz

+5

24

-

+5

16

+12 ± 5

16

3 MHz

-

+5

16

+5

28

/tPD8243

I/O Expander

4 x 4 bits

NMOS

3-State

-

+5

24

/tPD8251

Programmable Communications
Interface (Async/Sync)

8-bit

NMOS

3-State

A-9.6K baud
S,56K baud

+5

28

/tPD825.1A

Programmable Communications
Interface (Async/Sync)

8-bit

NMOS

3-State

A-9.6K baud
S-64K baud

+5

28

/tPD8253-5

Programmable Timer

8-bit

NMOS

3-State

4.0 MHz

+5

24

/tPD8255A-5

Peripheral Interface

8-bit

NMOS

3-State

-

+5

40

/tPD8257-5

Programmable DMA Controller

8-bit

NMOS

3-State

4 MHz

+5

40

/tPD8279-5

Programmable Keyboard/
Display Interface

8-bit

NMOS

3-State

-

+5

40

/tPB8282/
8283

8-Bit Latches

Bipolar

3-State

5 MHz

+5

20

/tPB8284

Clock Driver

Bipolar

3-State

5 MHz

+5

18

/tPB8286/
8287

8-Bit Bus Transceivers

Bipolar

3~State

5 MHz

+5

20

/tPB8288

Bus Controller

Bipolar

3-State

5 MHz

+5

20

/tPD8355

2048 x 8 ROM with I/O Ports

8-bit

NMOS

3-State

-

+5

40

/tPD8755A

2048 x 8 EPROM with
I/O Ports

8-bit

NMOS

3-State

-

+5

40

14

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MICROCOMPUTER ALTERNATE SOURCE GUIDE

J

MANUFACTURER
AMD

INTEL

PART NUMBER

DESCRIPTION

NEC REPLACEMENT

AMBOBOAl90~OA

Microprocessor (2.0 MHz)

/JPD8080AF

AMB080A-2/90BOA-2

Microprocessor (2.5 MHz)

/JPD8080AF-2

AM8080A-1/90BOA-1

Microprocessor (3.0 MHz)

/JPD8080AF-l

AMB085A

Microprocessor (3.0 MHz)

/JPD8085A

AMB155

Programmable Peripheral Interface
with 256 x B RAM

/JPD8155

AMB156

Programmable Peripheral Interface
with 256 x B RAM

/JPD8156
/JPB8212

AMB212

I/O Port (B-Bit)

AM8214

Priority Interrupt Controller

/JPB8214

AMB216

Bus Driver, Inverting

/JPB8216
/JPB8224

AMB224

Clock Generator/Driver

AMB226

Bus Driver, Non-Inverting

/JPB8226

AMB228

System Controller

/JPB8228

AM8251

Programmable Communications
Interface

/JPD8251

AM8255

Programmable Peripheral Interface

/JPD8255

AMB257

Programmable DMA Controller

/JPD8257

AMB355

Programmable Peripheral Interface
with 204B x B ROM

/JPD8355

AM804B

Single Chip Microcomputer

/JPD8048

8080A

Microprocessor (2.0 MHz)

/JPD8080AF

8080A-2

Microprocessor (2.5 MHz)

/JPD8080AF-2

B080A-1

Microprocessor (3.0 MHz)

/JPD8080AF-l

8021

Microcomputer with ROM

/JPD8021

8022

Microcomputer with A/D Converter

/JPD8022

8035L

Microprocessor

/JPD8035L

8039L

Microprocessor

/JPD8039L

8041A

Programmable Peripheral Controller
with ROM

/JPD8041A

B048

Microcomputer with ROM

/JPD8048

B049

Microcomputer with ROM

/JPD8049

8085A

Microprocessor (3.0 MHz)

/JPD8085A

B085A-2
8086
8155/8155-2

/JPD8085A-2
/JPD8086
/JPD8155/8155-2

8212

Microprocessor (5.0 MHz)
Microprocessor (16-Bit)
Programmable Peripheral Interface
with 256 x 8 RAM
Programmable. Peripheral Interface
with 256 x B RAM
I/O Port (B-Bit)

8214

Priority Interrupt Controller

/JPB8214

B216

Bus Driver, Non-Inverting

/JPB8216

8224

Clock Generator/Driver

/JPB8224

8226

Bus Driver, Inverting

/JPB8226

8228

System Controller

/JPB8228

8243
8251

I/O Expander
Programmable Communications
Interface (Async/Sync)

/JPD8243
/JPD8251

8156/8156-2

15

/JPD8156/8156-2

/JPB8212

J

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

MICROCOMPUTER ALTERNATE SOURCE GUIDE

I

MANUFACTURER
INTEL (CONT.)

NATIONAL

T.I.

PART NUMBER

DESCRIPTION

NEC REPLACEMENT

8251A

Programmable Communications
Interface (Async/Sync)

j.LPD8251A

8253·5

Programmable Timer

j.LPD8253-5

8255A-5

Programmable Peripheral lriterface

j.LPD8255A-5

8257-5

Programmable DMA Controller

j.LPD8257-5

8259A

Programmable Interrupt Controller

j.LPD8259A

8272

Double Sided/Double Density
Floppy Disk Controller

j.LPD765

8279-5

Programmable Keyboard/Display
Interface

j.LPD8279-5

8282/8283

8-Bit Latches

j.LPB8282/8283

8284

Clock Driver

j.LPB8284

8286/8287

8-Bit Transceivers

j.LPB8286/8287

8288

Bus Controller

j.LPB8288

8355

Programmable Peripheral Interface
with 2048 x 8 ROM

j.LPD8355

8741A

Programmable Peripheral Controller
with EPROM

j.LPD8741A

8748

Microcomputer with EPROM

j.LPD8748

8755A

Programmable Peripheral Interface
with 2K x 8 EPROM

j.LPD8755A

8274

Multiprotocol Serial Controller

j.LPD7201

INS8048

Microcomputflr with ROM

j.LPD8048

I NS8049

Microcomputer with ROM

j.LPD8049

I NS8080A

Microprocessor (2.0 MHz)

j.LPD8080AF

INS8080A-2

Microprocessor (2.5 MHz)

j.LPD8080AF-2

INS8080A-1

Microprocessor (3.0 MHz)

j.LPD8080AF-1

8212

I/O Port (8-Bit)

j.LPB8212

8214

Priority Interrupt Controller

j.LPB8214

8216

Bus Driver, Non.lnverting

j.LPB8216

8224

Clock Generator/Driver

j.LPB8224

8226

Bus Driver, Inverting

j.LPB8226

8228

System Controller

j.LPB8228

INS8251

Pro!:lrammable Communications
Interface

j.LPD8251A

INS8253

Programmable Timer

j.LPD8253-5

INS8255

Programmable Peripheral Interface

j.LPD8255A-5

INS8257

Programmable DMA Controller

j.LPD8257-5

INS8259

Programmable I nterrupt Controller

j.LPD8259A

TMS8080A

Microprocessor (2.0 MHz)

j.LPD8080AF

TMS8080A·2

Microprocessor (2.5 MHz)

j.LPD8080AF-2

TMS8080A-1

Microprocessor (3.0 MHz)

j.LPD8080AF-1

SN74S412

I/O Port (8-Bit)

j.LPB8212

SN74LS424

Clock Generator/Driver

j.LPB8224

SN74S428

System Controller

j.LPB8228

16

J

NEe

NEe Electronics U.S.A. Inc.
Microcomputer Division

ROM-BASED PRODUCTS ORDERING PROCEDURE
The following NEC products fall under the guidelines set by the ROM-Based Products Ordering Procedure:
IlPD7801
IlPD7802
IlPD7811
IlPD8021
IlPD8022
Il PD8041A
IlPD8048
IlPD80C48
IlPD8049

IlPD80C49
IlPD8355
IlPD546
Il P D547
Il P D547L
Il P D550
IlPD550L
Il P D552
IlPD553

IlPD554
Il PD554L
IlPD557L
IlPD650
IlPD651
IlPD652
Il P D7501
IlPD7502
IlPD7503

IlPD7506
IlPD7507
IlPD7507S
IlPD7508
IlPD7508A
IlPD7519
IlPD7520
IlPD7720

NEG Electronics U.S.A., Inc., Microcomputer Division is able to accept mask patterns in a variety of formats to facilitate
the transferral of ROM mask information. These are intended to suit various customer needs and minimize the turnaround
time. Always enclose a listing of the code and the code submittal form. The following is a list of valid media for code
transferra I.
•
•
•
•
•
•

PROM/EPROM equivalent to ROM parts
Sample ROMs or ROM-based microcomputers
Paper Tape
Timesharing Files
ISIS-II compatible disks
Other (Contact NEC Electronics U.S.A., Inc., Microcomputer Division for arrangements.)

Thoroughly tested verification procedures protect against unnecessary delays or costly mistakes. NEC Electronics U.S.A.,
Inc., Microcomputer Division will return the ROM mask patterns to the customer in the most convenient format.
Unprogrammed EPROMs, if sent with the ROM code, can be programmed and returned for verification.
Earth satellites and the world-wide GE Mark III timesharing systems provide reliable and instant communication of ROM
patterns to the factory. Customers with access to GE-TSS may further reduce the turnaround time by transferring files
directly to NEG Electronics U.S.A., I nc., Microcomputer Division.
The following is an example of a ROM mask transferral procedure. The IlPD8048 is used here; however, the process is the
same for the other ROM-based products.
1. The customer contacts NEG Electronics U.S.A., Inc., Microcomputer Division's Sales Representative, concerning
a ROM pattern for the IlPD8048 that he would like to send.
2. Since an EPROM version of that part is available, the IlPD8748 is proposed as a code transferral medium, or a
paper tape and listing may be used.
3. Two programmed IlPD8748's are sent to NEG Electronics U.S.A., Inc., Microcomputer Division with a listing, a
code submittal form, and a paper tape as back-up.
4. NEC Electronics U.S.A., Inc., Microcomputer Division compares the media provided and enters the code into
GS-TSS. The GE-TSS file is accessed at the NEC factory and a copy of the code is returned to NEG Electronics
U.S.A., Inc., Microcomputer Division for verification. One of the IlPD8748's is erased and reprogrammed with the
customer's code as the NEC factory has it. Both IlPD8748's and a listing are returned to the customer for his final
verification.
5. Once the customer notifies NEC Electronics U.S.A., Inc., Microcomputer Division in writing that the code is
verified and provides the mask charge and hard copy of the purchase order, work begins immediately on
developing his IlPD8048's.
Please contact your local Sales Representative for assistance ~ith all ROM-based product orders, Mask Programmed ROM
products other than those listed above are marketed by Electronic Arrays Division; refer to Section 5 for Electronic Arrays'
ordering procedures.

17

~

NOTES

18

ttiEC

NEe Electronics U.S.A. Inc.
Microcomputer Division

MEMORIES

RANDOM ACCESS MEMORIES

IJ

NEe

",PD416
",PD416-1
",PD416-2
",PD416-3
",PD416-5

NEe Electronics U.S.A. Inc.
Microcomputer Division

16384 X 1 BIT DYNAMIC MOS
RANDOM ACCESS MEMORY
DESCR I PTION

The NE;C J,lPD416 is a 16384 words by 1 bit Dynamic MOS RAM. It is designed for
memory applications where very low cost and large bit storage are important design
objectives.
The J,lPD416 is fabricated using a double-poly-layer N channel si licon gate process
which affords high storage cell density and high performance. The use of dynamic
circuitry throughout, including the sense amplifiers, assures minimal power dissipation.
Multiplexed address inputs permit the f,lPD416 to be packaged in the standard 16 pin
dual-in-line p,!ckage. The 16 pin package provides the highest system bit densities and
is available in either ceramic or plastic. Noncritical clock timing requirements allow
use of the multiplexing technique while maintaining high performance. '

FEATURES

• 16384 Words x 1 Bit Organization
• High Memory Density - 16 Pin Ceramic and Plastic Packages
• Multiplexed Address Inputs
• Standard Power Supplies +12V, -5V, +5V
• Low Power Dissipation; 462 mW Active (MAX), 20 mW Standby (MAX)
• Output Data Controlled by CAS and Unlatched at End of Cycle
• Read-Modify-Write, R'AS-only Refresh, and Page Mode Capability
• All Inputs,TTL Compatible, and Low Capacitance
• ,128 Refresh Cycles
• 5 Performance Ranges:

PIN CONFIGURATION

ACCESS TIME

RIW CYCLE

J,lPD416

300 ns

510 ns

575 ns

J,lPD416-1

250 ns

410 ns

465 ns

J,lPD416-2

200 ns

375 ns

375 ns

J,lPD416-3

150 ns

320 ns

320 ns

J,lPD416-5

120 ns

320 ns

320 ns

"

RMW CYCLE

VBB

VSS
CAS

AO-A6

Address Inputs

DIN

CAS

Column Address Strobe

WRITE

DOUT

DIN

Data In

RAS

Data Out

A6

DOUT
RAS

AO

A3

WRITE
VBB

Read/Write
Power (-5V)

VCC

Power (+5V)

A4

A2
A1

A5

VDD

Vcc

Rev/3

21

--

---

---_.._---

Row Address Strobe

VDD

Power (+12V)

VSS

Ground

,--

flPD416
BLOCK
DIAGRAM
'0
COL

.,~'--------I.~~:.

~T
~s~

-~
"~
.~

~

Operating Temperature.
Storage Temperature .. .
All Output Voltages CD ...........
All Input Voltages CD ............
Supply Voltages VDD, VCC, VSS CD..
Supply Voltages VDD, VCC ~ ...
Short Circuit Output Current
Power Dissipation . . . . . . . .
Notes:

CD

O°C to +70°C
-5SoC to +lS0°C
-O,S to +20 Volts
-O.S to +20 Volts
-O.S to +20 Volts
-1.0 to +1S Volts
" .SOmA
. . . . . . . . 1 Watt

.
.
.

ABSOLUTE MAXIMUM
RATINGS*

Relative to VBB

(2) Relative to Vss
Ta= 2SoC
*COMMENT: Stress above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or
any other conditions above those indicated in the oporational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.

T a = O°C to 70°C, VDD
VSS = OV
PARAMETER
I nput Capacitance
(AO·A6), DIN
I nput Capacitance
RAS. CAS. WRITE
Output Capacitance
(DOUT)

= +12V

± 10%. VBB

SYMBOL

MIN

=-SV ±

10%, VCC

LIMITS
TYP MAX

=+SV ± 10%,

UNIT

Cll

4

S

pF

CJ2

8

10

pF

Co

S

7

pF

22

TEST
CONDITIONS

CAPACITANCE

IlPD416
DC CHARACTERISTICS

Ta

= O°C

to +70°CQ), VOO

= +12V

± 10%, VCC

= +5V

± 10%, VSS

= -5V

± 10%, VSS

LIMITS
PARAMETER

SYMBOL

UNIT

TYP

MAX

Supply Voltage

VOO

10.8

12.0

13.2

V

Supply Voltage

VCC

4.5

5.0

5.5

V

MIN

= OV

TEST
CONDITIONS

0

0

V

-5.0

-5.5

V

@
--------@ @
@
@

2.7

7.0

V

@

VIH

2.4

7.0

V

@

Input Low (Logic 0)
Voltage, all inputs

VIL

1.0

0.8

V

@

Operating VOO Current

1001

Supply Voltage

VSS

Supply Voltage

VSS

I nput Hi~o~)
Voltage, RAS, CAS,

VIHC

WRiTE
Input High (Logic 1)
Voltage, all inputs
except RAS, CAS

0
-

4.5

WRiTE

--_._-

Standby VOO Current

1002

RefreshlAIl Speeds
VOO
except "P0416-5

1003

Currentl

1003

"P0416-5

35

1004

Operating VCC
Current

ICCl

Standby V CC Current

ICC2

-10

Refresh VCC Current

ICC3

-10

cycling;

= tRC Min.

tRC

®

mA

RAS
VIHC,OOUT
= High Impedance

25

mA

RAS cycling, CAS

27

mA

1.5

Page Mode VOO
Current

RA"S, CAS

mA

27

=

375 ns

VIHC; tRC

®

RAS = VIL.CAS
cycling; tpc
225 ns@

mA

----

IJA

10

I

JRAS

10

._ICC4

Operating VSS
Current

ISSl

200

Standby VSS
Current

ISS2

Refresh VSS
Current

ISS3

-----.----

RAS = VIHC,
00UT = High
Imptdance

IJA

--"'--'.- ~-----

Page Mode V CC
Current

RAS, CAS cycling.
tRC 375 ns ®

IJA

-

CAS

,,,,,00
VIHC

tRC

375 ns

RAS

.---

--

VIL CAS -

"A

cyclmg tpc

IJA

R AS.Ci'iS cyclmy
tRC 375ns

100

"A

Dour

200

"A

CAS - VIHr:.

"A

RAS· VI L, CAS
cycling;
tpc = 225 ns

Vee - 5V, OV <:
VIN " +7V,
all other pins not
under test = OV

225.':'.:..®.

_.

- - - _...

-

_-

RAS

VIHC.
I-I,qh
Impedance
----~

I

RAS cycling.
tRC

Page Mode Vee
Current

200

lee4

=

375 ns

--

Input Leakage
(any input)

II!Ll

-10

10

IJA

Output Leakage

IO(Ll

-10

10

"A

Output High Voltage
(Logic 1)

VOH

Output Low Voltage
(L.ogic 0)

VOL

Notes:

2.4
0.4

00UT is disabled,
OV

<;;

V

lOUT

V

lOUT

VOUT " +5.5V
-5mA@

= 4.2 mA

CD T a is specified here'for operation at frequencies to tRC ~ tRC

(min). Operation at higher cycle rates with reduced
ambient temperatures and high power dissipation is permissible, however, provided AC operating parameters are met.
See Figure 1 for derating curve.

@AII voltages referenced to

@
@)

®

Vss.

Output voltage wit swing from VSS to Vee when activated with no current loading: For purposes of maintaining
data in standby mode, VGC may'be reduced tD.VSS without affecting refresh operations or data retention. However,
the VOH (min) specification is not guaranteed In this mode.

1001, '003, and 1004 depend on cycle rate. See Figures 2, 3 and 4 for too limits at other cycle rates.

19

leC1 and
C4 de'pend upon output loading. During readout of high level data Vee is connected through a low
impedance 1350 typ) to data out. At all other times ICC consists of leakage currents only.

23

flPD416
AC
CHARACTERISTICS
T•• O'C

'0 +70'C, VOO • +12V • 10%, VCC· +6V ± 10%, Vaa • -SV ± 10%, VSS· OV
jOPD41 I
MIN
MAX

I'PD411-1
MIN
MAX

LIMITS
I'PD411·2
MIN
MAX

'RC

510

410

'RWC

575

465

Page mode cycle time

tpc

330

275

Access ti,ne from
RAS

'RAC

PARAMETER

Random read or write
cvcle time
Read·writl

cycl. time

SYMBOL

300

Access time from

jAPD411-3
MIN
MI>,X

jAPD416-6
MIN
MAX

375

320

320

375

375

320

225

170
200

250

120

CAs

'CAC

200

165

135

100

Output buffer
turn-off delay

'OFF

60

60

50

40

35

Transition time
(rise and fait)

'T

50

50

50

35

RAS precharge time

tAP

200

RASpul.ewid,h

'RAS

300

10.000

250

10,000

rl'iMi
__A=-h_OI_d_'im_'_ _-+-_'~RS",-H,--+-20_0-+_ _-+_1.6:.:.5-+

200

32,000

150

35

32,000

120

10,000

10,000
40

'CAS

200

10.000

165

10,000

135

10,000

100

10,000

60
60

time

'RCO

40

100

35

85

25

65

20

50

15

~,ol'iMi
precharge time

'CRP

-20

Row address
set·uptime

'ASR

Row address
hold time

'RAH

40

35

25

20

15

-10

-10

-10

-10

m

pu I.. wid,h

FfASto ~ delav

Column address
set-up time

-20

135

100

-20

'ASC

hold time

'CAH

90

75

55

45

40

Column address hold
time referenced to

'AR

190

160

120

95

80

40

RAS

®

-20

-10

Column address

®@
®®

100

100

120

TEST
CONDITIONS

160
150

80

150

UNIT

Read command
set-uptime

'RCS

Read command
hold time

'RCH

Write command
hole time

'WCH

90

75

55

45

Write command
hold tim.
referenced to 'FiAS

'WCR

190

160

120

95

80

40

Write command

75

55

45

RAS lead time

'RWL

120

85

70

50

50

Write command to
CAS lead time

'CWL

120

85

70

50

50

90

75

55

45

40

pulse width

'WP

Write command to

90

Data-in set-up time

'os

Data-in hold time

'OH

Data-in hold time
referenced to R AS

'OHR

190

160

120

95

80

(for page mode
cycle only)

'CP

120

100

80

60

60

Refresh period

tREF

®
®

CAS precharge time

WRITE command

set-up time
CAS

'0 WRITE

delay

RAS
delay

Notes:

CD
@

'0 WRITE

-20

-20

20

20

'cwo

140

125

95

70

80

'RWO

240

200

160

120

'20

'WCS

@

AC measurements assume tT = 5 ns.
VIHC (min) or VIH Imin) and VIL (max) are reference levels for measuring timing of Input signals. Also. transItion times are rreasured between VIHC or VIH and VIL

®

The specifications for tRC (min) and IAWC (mini are used only to indicate cycle time at which proper operation over the full temperature range (O°e " T a';; 70°Cl
is assured.

@

Assum~s that tRCD c;;: tRCD (max). If tACO is greater than the maximum recommended value shown in this H·ble, tRAC will increase by the amount that tACO
exceeds the values shown.

®
®

Assumes that tRCD ;;. tRCD (max).
Measured with a load equivalent to 2 TTL loads and 100 pF.

(1) tOFF {maxi defines the time at which the output achieves the open circuit condition and is not referJ!.'nced to output voltage levels.
@ Operation within the tACO Imsxllimit ensures that tRAC (maxi can be met, tRCD (maxi is specified as a reference point only. If tRCD is greater

®
@

than the specified

tACO (max) limit, then access time is controlled exclusively by tCAC
These parameters are referenced to

'CA'S leading edge in early write cycles and to"WR'iTE leading edge in delaye:d write or read-modify-write cycles,

tWCS. tCWD and tAWD are not restrictive operating parameters. They are included in the data sheet 85 ele(;.tricSI characteristics only. If twcs :... twcs (min), the cycle
IS an early write cycle and the data out pin will remain open circuit (high impedance) ;:. tRWD {minI. the cycle is a read-write cycle and the data out Will contain data
read from the selected cell; if neither of the above sets of conditions is ,satisfied the condition of the data out (at access time) is indeterminate.

24

",PD416
CYCLE TIME tRC (ns)

DERATING CURVES

320
1000
I I

50 mA

I

500 400
I

375

300

250
I

/lPD416· 5

..§

320

500
1000
.1 II I
70 --Ta(MAX)

40~ 1375 I~OO

:2

~
z
UJ

iii

:2

«

50

o

1.0

2.0

3.0

SPEC LIMIT

zUJ

250

:J

(J

I 9'"
+c,e~
q \.~,.
/

0

/"

0

2

4.0

~/'

10mA

I'

{l, /

'/

~' /"
~

/

/'

/'

CYCLE RATE (MHz) = 10 3 /tRC (ns)
0

FIGURE 1

o

Maximum ambient temperature versus cycle
rate for extended frequency operation. T a
(max) for operation at cycling rates greater
than 2.66 MHz (tCYC < 375 ns) is deter·
mined by Ta (max) [DC] = 70 - 9.0 x
(cycle rate [MHz] -2.66). For /lPD416·5,
it is Ta (max) [DC] = 70 - 9.0 (cycle rate
[MHz] - 3.125).

320
1000
500 400
300
375 I
II I I

3.0

2.0

1.0

CYCLE RATE (MHz)

=

4.0

10 3 /tRC (ns)

FIGURE 2
Maximum I DDl versus cycle rate for device
operation at extended frequencies.

CYCLE TI ME t RC (ns)

50 mA

,

-<"Y /

20 rnA

X

«

~

((:)'0/

;r;:.

30 mA

c..
c..

:J

//,~

b.'((:) ' / ,,"''/

>..I

(/)

,
0'

(L
(L

"

60

.....

40 mA

.....

"

.....'"
c..

~~

;;(

CYCLE TIME t RC (ns)

CYCLE TIME tpc (ns)
250

1000

I

500

400

300

I

50 mA

250

200

160

I

1/

/lPD416· 5;;(
40 mA

..§

40mA

.....
z·
UJ
CC

cc

30 mA
SPEC LIMIT

I

20 mA

,

10mA

~-.(

...

~/)\ ..."./
0."(,,;
,'"
i-c,e\>;" "ro-~\,

'?'.:.:;~ ,?,o./

,'"
,~

(J

30mA

SPEC LIMIT

>..I

c..
c..

::::l

"

(/) 20mA
'(~

.....

-

o
o

1.0

2.0

3.0

o

4.0

1.0

2.0

3.0

4.0

5.0

CYCLE RATE (MHz) = 10 3 /tRC (ns)

CYCLE RATE (MHz) = 10 3 /tRC (ns)
FIGURE 3

FIGURE 4

Maximum I DD3 versus cycle rate for device
operation at extended frequencies.

Maximum IDD4 versus cycle rate for device
operation in page mode.

25

6.0

",PD416
READ CYCLE

TIMING WAVEFORMS

~------------------tRC------------~3-----~
RAS

V 1HC

v ,L

t------------tRAS----t
- - - - . . I 1 - - - - - - - tAR
:

~--

=-tt~RP

V,HC

CAS

V,L

ADDRESSES

V,H
V,L

V

,HC _ ~i7?,77i.7liIt7J;7J.r--I----------I-_,~7J;7};~;?,

-_:J-

f------tAAC - - - - - - - - l r -_ _

----------OPEN------