1984_IND503_Sprague_Integrated_Circuits 1984 IND503 Sprague Integrated Circuits

User Manual: 1984_IND503_Sprague_Integrated_Circuits

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SPRAGUE® INTEGRATED
CIRCUITS

THE MARK OF RELIABILITY

Power
Interface

•

Linear

•

Hall-Effect

DATA
BOOK
IND-503

• Transistor
Arrays

INTEGRATED CIRCUITS
INTERFACE
• High Voltage
• High Current
• BiMOS and Complex Arrays

LINEAR
• Radio/Communications
• Video and Television
• Audio

HALL EFFECT DEVICES
TRANSISTOR ARRAYS

D

D

D

SPRAGUE ELECTRIC COmPAny
INTERFACE AND LlNEAR.INTEGRATED CIRCUITS
115 Northeast Cutoff. Worcester, Mass. 01606 • 617/853-5000
DISCRETE SEMICONDUCTORS AND HALL EFFECT ICs
70 Pembroke Road • Concord, N.H. 03301 • 603/224-1961
Copyright © 1984, Sprague Electric Company, North Adams, Mass.

Contents

SECTION I-GENERAL INFORMATION
Part-Numbering System .............................................................
Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
How To Place An Order ..............................................................
Sprague Facilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Engineering Bulletins ...............................................................

1-2
1-4
1-16
1-17
1-19

Sales Offices ............................................................... Back Cover

SECTION 2-HIGH-VOLTAGE INTERFACE DRIVERS
Selection Guide ................................................................... 2-2
UDN-6116A through 6128A Fluorescent Display Drivers ........................................
UDN-6116R through 6128R-2 Hermetic Display Drivers ........................................
UDN-6138A through 6148A-2 Fluorescent Display Drivers ......................................
UDN-6510A and 6510R Display Anode/Grid Drivers ...........................................
UDN-6514A and 6514R Display Anode/Grid Drivers ...........................................
UDN-7180A through 7186A Gas-Discharge Segment Drivers ....................................

2-3
2-3
2-3
2-7
2-7
2-10

Application Notes:
AMonolithic IC Series for Gas-Discharge Displays ......................................... 2-16
Trends in IC interface for Electronic Displays ............................................. 2-22
Reliability of Series UDN-6100A ...................................................... 2-33

SECTION 3-HIGH-CURRENT INTERFACE DRIVERS

Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-2
UHP-400 through 433-1 Quad Power and Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .. 3-3
UHP-500 through 533 Quad Power and Relay Drivers ........................................ 3-3
ULN-2001A through 2025A 7-Channel Darlington Drivers ..................................... 3-14
ULN-2061M and 2062M Dual 1.5 ADarlington Switches ...................................... 3-24
ULN-2064B through 2077B Quad 1.5 ADarlington Switches ................................... 3-24
UDN-2541B and 2541W Quad NAND Drivers ......................... ,..................... 3-35
UDN-2542B and 2542W Quad NAND Drivers .............................................. 3-35
UDN-2580A through 2588A 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-38
UDN-2595A 8-Channel Sink Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-45
ULN-2801A through 2825A 8-Channel Darlington Drivers ..................................... 3-47
UDN-2841B and 2845B Quad 1.5 ADarlington Drivers ....................................... 3-58
UDN-2878W and 2879W Quad 4 ADarlington Drivers .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-64
UTN-2886B SCR Array ............................................................. 3-70
UTN"2888A SCR Array .............................................................. 3-70
UDN-2933B and 29348 3-Channel Half-Bridge Motor Drivers ....... ............ " . . . . . . . . . . . . . . . .
*
UDN-2935Z Bipolar Half-Bridge Motor Driver .............................................. 3-73
UDN-2949Z 2 AHalf-Bridge Motor Driver ................................................. 3-79
UDN-2950Z Bipolar Half-Bridge Motor Driver .............................................. 3-73
UDN-2952B and 2952W Full-Bridge Motor Drivers .......................................... 3-83
UDN-2956A and 2957A Negative Supply, 5-Channel Source Drivers .............................. 3-89
UDN-2975W and 2976W Dual 4 ASolenoid Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-92
UDN-2981A through 2984A 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .. 3-96
UDN-3611M through 3614M Dual Peripheral and Power Drivers ................................. 3-103
UDN-5703A through 5707A Quad Peripheral and Power Drivers ................................. 3-107
UDN-5711M through 5714M Dual Peripheral and Power Drivers ................................. 3-111
UDN-5722M Dual Peripheral and Power Driver ............................................. 3-115
UDN-5732M Dual Peripheral and Power Driver .................................... : . . . . . . .. 3-118
UDN-5733A Quad Peripheral and Power Driver ............................................. 3-110
UDN-5742M Dual Peripheral and Power Driver ............................................. 3-118
Application Notes:
Series ULN-2000A Darlington Arrays. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Interface Integrated Circuits for Motor Drive Applications ...................... , , , , , , , , , . , "
Expanding The Frontiers of Integrated Circuit Interface, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , "
Interface ICs for Current-Sourcing Applications, , , , , , , . , , , , , , , , . , , , . , , , , , , , , , , , , , , , , , , , "
New Power-Interface ICs, , , , , , , , . , , , , , , .. , , , , , , , . , , , , , , , , , , , , . , , , , , , , , , . , , , , , , , . "
*New product, Contact factory for detailed information,

3-l21
3-128
3-135
3-145
3-155

SECTION 4-BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS
UCN-4202A and 4203A Stepper-Motor Translator/Drivers ..................................... 4-2
UCN-4204A 1.25A, 2-Phase Stepper Motor Translator/Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
UCN-440lA and 480lA BiMaS Latched Drivers ............................................ 4-9
UCN-4805A BiMaS Latched Decoder/Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-12
UCN-4807 A and UCN-4808A Addressable Latched Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-16
UCN-4810A 10-Bit, Serial-In, Latched Driver .............................................. 4-22
UCN-48l5A BiMaS Latch/Source Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-25
UCN-482lA through 4823A 8-Bit Serial-In, Latched Drivers .................................... 4-28
UCN-5800A through 5895A BiMaS II High-Speed Interface Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-32
UCN-58l0A 10-Bit BiMas II Serial/Parallel Source Driver ......................................
*
UCN-58l2A 20-Bit BiMas II Serial/Parallel Source Driver ..................................... .
*
UCN-58l8A 32-Bit BiMas II Serial/Parallel Source Driver ..................................... .
*
UCN-5832A 32-Bit BiMas II Serial/Parallel Sink Driver ....................................... .
*
Application Note:
Sprague BiMaS - Muscle for the Microprocessor ........................................ 4-33

SECTION 5-MILITARY AND AEROSPACE DEVICES
UHC/UHD-400 through 433-1 Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UHC/UHD-500 through 533 Quad Power and Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-200IH through 20l5H 7-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-200lR through 20l5R 7-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-202IH through 2025H 7-Channel, 95 VDarlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-2064H through 2077H Quad 1.5 ADarlington Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-280IH through 2815H 8-Channel Darlington Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-280lR through 28l5R 8-Channel Darlington Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULS-282lH through 2825H 8-Channel, 95 V Darlington Drivers .... . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDQ-2956R and 2957R Negative Supply, 5-Channel Source Drivers ................ . . . . . . . . . . . . ..
UDS-298lH through 2984H 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-3611H through 36l4H Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . ..
UCS-440lH and 480lH BiMaS Latched Drivers ............................................
UCS-48l0H Hermetic BiMaS 10-Bit, Serial-Input, Latched Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UCS-48l5H Hermetic BiMaS Latch/Source Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UCS-482lH through 4823H Hermetic BiMaS 8-Bit, Serial-Input, Latched Drivers .....................
UDS-5703H through 5707H Quad Peripheral and Power Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-5711H through 5714H Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UDS-5733H Quad NaR Peripheral and Power Driver .........................................
UDS-579IH Quad PIN Diode Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

5-2
5-2
5-7
5-7
5-7
5-17
5-26
5-26
5-26
5-36
5-39
5-44
5-48
5-53
5-58
5-63
5-68
5-74
5-73
5-80

Quality Assurance Flow Chart ........................................................ 5-84
Double-Deuce Program for High-Reliability Devices ......................... . . . . . . . . . . . . . . .. 5-86
High-Reliability Screening to MIL-STD-883 ............................................... 5-89
Application Note:
BiMaS Power Drivers to MIL -STD-883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
*New product. Contact factory for detailed information.

iii

5-90

SECTION 6-RAOIO/COMMUNICATIONS INTEGRATED CIRCUITS
Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-2
ULN-21llA F-M, I-F Amplifier/Limiter and Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-3
ULN-2204A A-M/F-M Radio System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-8
ULN-2240A A-M/F-M Signal Processing System with Tuning Error and Level Muting ................... 6-15
ULN-2241A A-M/F-M Signal Processing System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-21
ULN-2242A (TDAI090) A-M/F-M Signal Processing System with Level Muting. . . . . . . . . . . . . . . . . . . . . . .. 6-27
ULN-2243A Mixer/l-F for F-M Radios. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-34
ULN-2249~ A-M Radio System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-38
ULX-3803A Low-Voltage A-M/F-M/Shortwave Signal Processor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULN-3804A A-M/F-M Signal Processor .................................................. 6-42
ULN-3809A Low-Voltage Phase-Locked Loop Stereo Decoder ................................... 6-47
ULN-3810A Phase-Locked Loop Stereo Decoder ............................................ 6-50
ULN-3812A Phase-Locked Loop Stereo Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-52
ULN-3838A A-M Radio System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-55
ULN-3840A A-M/F-M Signal Processing System ............................................ 6-61
ULN-3859A Low-Power, Narrow-Band, F-M I-F ......................... : . . . . . . . . . . . . . . . . . .. 6-68
Application Notes:
ULN-2204A Applications and Operation ...............................................
A-M/F-M Radio Design Using the ULN-2240/41142A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
A Complete A-M/F-M Signal Processing System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
The Development of High-Quality Receivers for A-M Stereo ..................................

6-71
6-81
6-92
6-100

SECTION 7-VIDEO AND TELEVISION INTEGRATED CIRCUITS
Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . . .. 7-2
ULN-2260A AGC Control, Sync Separator, and Scan Processor .................................. 7-3
ULN-2270B and 2270Q (TDA1170) Vertical Deflection Systems .................................. 7-6
ULN-2290B (TDA3190) and 2290Q (TDA1l90l) 4-Watt TV Sound Channels ......................... 7-12
Application Note:
ULN-2260A Signal, Sync, and Scan Processor ........................................... 7-19
*New product. Contact factory for detailed information.

SECTION a-AUDIO POWER AMPLIFIERS

Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-2
ULN-2280B 2.5-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
ULN-2283B Low-Power Audio Amplifier ...................................................
ULN-370lZ (TDA2002) 5 to 10-Watt Audio Power Amplifier .....................................
ULN-3702Z (TDA2008) l2-Watt Audio Power Amplifier .........................................
ULN-3703Z (TDA2003) 10-Watt Audio Power Amplifier .........................................
ULN-3705M Low-Voltage Audio Amplifier ..................................................
ULN-3783M Dual Low-Voltage Audio Power Amplifier .........................................
ULN-3784B 4-Watt Audio Power Amplifier .................................................
ULN-3793W 20-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8-3
8-9
8-17
8-22
8-26
8-28

*
8-35

*

SECTION 9-HALL EFFECT DEVICES

Selection Guide ................................................................... 9-2
UGN-30l3T and 30l3U Low-Cost Digital Switches ...........................................
UGN-30l9T and 30l9U Low-Cost Digital Switches ...........................................
UGS-30l9T and 30l9U Extended-Temperature Digital Switches ..................................
UGN-3020T and 3020U Low-Cost Digital Switches ...........................................
UGS-3020T and 3020U Extended-Temperature Digital Switches ..................................
UGN-3030T and 3030U Bipolar Digital Switches .............................................
UGS-3030T and 3030U Extended-Temperature Bipolar Digital Switches ............................
UGN-3035U Magnetically-Biased Bipolar Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UGN-3040T and 3040U Ultra-Sensitive Digital Switches .......................................
UGN-3075T and 3075U Bipolar Latches ..................................................
UGS-3075T and 3075U Extended-Temperature Bipolar Latches ..................................
UGN-3076T and 3076U Bipolar Latches ..................................................
UGS-3076T and 3076U Extended-Temperature Bipolar Latches ..................................
UGN-320lM and 3203M Dual Output Digital Switches ........................................
UGN-3220S Dual Output Digital Switch ...................................................
UGN-350lM Linear Output Hall Effect Sensor ..............................................
UGN-350lT and 350lU Linear Output Hall Effect Sensors ......................................
UGN-3604M and 3605M Hall Effect Sensor Elements .........................................

9-3
9-5
9-5
9-7
9-7
9-9
9-9
*
9-11
9-14
9-14
9-17
9-17
9-20
9-23
9-25
9-28
9-31

Application Note:
Hall Effect Integrated Circuit Application Guide ......................................... 9-33
New product. Contact factory for detailed information.

v

SECTION IO-TRANSISTOR ARRAYS AND MISCELLANEOUS DEVICES
ULN-2031A NPN 7-Darlington Array .................................................... 10-2
ULN-2032A PNP 7-Darlington Array .................................................... 10-2
ULN-2033A PNP 7-Darlington Array .................................•.................. 10-2
ULS-2045H HermeticNPN Transistor Array ............................................... 10-4
ULN-2046A NPN Transistor Array ...................................................... 10-4
ULN-2046A-1 NPN Transistor Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-6
ULN-2047A Triple Differential Amplifier Array .............................................. 10-7
ULN-2054A Dual Differential Amplifier Array .............................................. 10-8
ULN-2081A NPN Common-Emitter 7-Transistor Array ........................................ 10-11
ULN-2082A NPN Common-Collector 7-Transistor Array .................................. ; .... 10-11
ULN-2083A Independent NPN 5-Transistor Array ........................................... 10-12
ULN-2083A-1Independent NPN 5-Transistor Array .......................................... 10-14
ULS-2083H Hermetic Independent NPN Transistor Array ...................................... 10-12
ULN-2086A NPN 5-Transistor Array ..................................................... 10-15
ULN-2140A Quad Current Switch ...................................................... 10-16
ULS-2140H Hermetic Quad Current Switch ............................................... 10-16
ULN-2401A Lamp Monitor ........................................................... 10-18
ULN-2429A Fluid Detector ........................................................... 10-20
ULN-2430M Timer ................................................................ 10-23
ULN-2435A Automotive Lamp Monitor ................................................... 10-26
. ULN-2445A Automotive Lamp Monitor .................... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-26
ULN-2450A and ULN-2451M Precision Power Timer/Oscillators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULN-2455A General-Purpose Quad Comparator ............................................ 10-26
ULN-331OD and ULN-3310T Precision Light Sensors ......................................... 10-32
ULN-3330D, ULN-3330T, and ULN-3330Y Optoelectronic Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-38
ULX-8125A Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULN-8126A Switched-Mode Power Supply Controller ......................................... 10-41
ULN-8126R (SG3526J) Switched-Mode Power Supply Controller ................................. 10-41
ULQ-8126A Switched-Mode Power Supply Controller ......................................... 10-41
ULQ-8126R (SG2526J) Hermetic Switched-Mode Power Supply Controller ........................... 10-41
ULS-8126R (SG1526J) Hermetic Switched-Mode Power Supply Controller ........................... 10-41
ULX-8127A Switched-Mode Power Supply Controller . ..... " ................... '. . . . . . . . . . . . . . . .
*
ULN-8160A (NE5560N) Switched-Mode Power Supply Controller .................. " ............. 10-46
ULN-8160R (NE5560F) Hermetic Switched-Mode Power Supply Controller .......................... 10-46
ULS-8160R (SE5560F) Hermetic Switched-Mode Power Supply Controller ........................... 10-46
ULN-8161M (NE5561N) Switched-Mode Power Supply Controller ................................. 10-49
ULX-8163A Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULX-8194A Switched-Mode Power Supply Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULX-8195A Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
UlN-8564A (NE564N) High-Frequency Phase-locked Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULN-8564R (NE564F) High-Frequency Phase-Locked Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
ULS-8564R (SE564F) Hermetic High-Frequency Phase-Locked Loop ...............................
*
TPP Series of Medium-Power Darlington Arrays ............................................ 10-51
TPQ Series of Quad Transistor Arrays ................................................... 10-52
Application Note:
An Electronic Lamp Monitor ........................................................ 10-56
*New product. Contact factory for detailed information.

vi

SECTION 11-CUSTOM DEVICES
UlN-2350C and 2351C Tuff Chip® Semi-Custom Integrated Circuits ..............................
High-Voltage, Semi-Custom Component Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Custom Bipolar ICs for Automotive Applications ............................................
Custom Circuit Design Capability ............' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Optional Package Capabilities. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

11-2
11-4
11-7
11-17
11-18

SECTION 12-PACKAGE INFORMATION
Package Thermal Characteristics ......................................................
Thermal Design for Plastic Integrated Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Computing Integrated Circuit Temperature Rise ............................................
Thermal Resistance---A Reliability Consideration ..........................................
Operating and Handling Practices for MOS Integrated Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

12-2
12-3
12-9
12-13
12-22

Package Drawings:
Suffix 'A' Plastic Dual In-Line ................... ,.................................. 12-23
Suffix 'B' Plastic Dual In-Line with Heat Sink Semi-Tabs .................................... 12-26
Suffix 'C' Unpackaged Chip or Wafer ...................................................... .
Suffix '0' Metal 3-Pin TO-521T0-206AC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-27
Suffix 'H' Glass/Metal Hermetic Side-Brazed Dual In-line ............. . . . . . . . . . . . . . . . . . . . . .. 12-28
Suffix 'J' Glass/Metal Hermetic 14-lead Flat-Pack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-30
Suffix 'M' Plastic Mini 8-Pin Dual In-line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-30
Suffix 'Q' Plastic Quad In-line with Heat Sink Tabs ........................................ 12-31
Suffix 'R' Glass/Ceramic Hermetic Dual In-Line .......................................... 12-31
Suffix'S' Plastic Mini Single In-line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-33
Suffix'T' Plastic 3-Pin Single In-Line ................................................. 12-33
Suffix 'U' Plastic 3-Pin Thin Single In-line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-34
Suffix 'W' Plastic 12-Pin Single In-Line Power Tab ........................................ 12-34
Suffix 'Y' Plastic Head TO-92 Transistor .............................................. 12-35
Suffix 'Z' Plastic 5-lead TO-220 Single In-Line Power Tab ................................... 12-35

vii

Product Index in Numerical Order
TPQA-05 through 56
UDS-0400H through 0433-1
UDS-0500H through 0533H
UHC/UHD-400 through 433-1
UHP-400 through 433-1
UHC/UHD-500 through 533
UHP-500 through 533
TPP-1000 and 2000
UlN-2001A through 2015A
UlS-2001H through 2015H
UlS-2001R through 2015R
UlN-2021A through 2025A
UlS-2021H through 2025H
UlN-2031A through 2033A
UlS-2045H
UlN-2046A
UlN-2046A-1
UlN-2047A
UlN-2054A
UlN-2061M and 2062M
UlN-2064B through 2077B
UlS-2064H through 2077H
UlN-2081A
UlN-2082A
UlN-2083A
UlN-2083A-1
UlS-2083H
UlN-2086A
UlN-21l1A
UlN-2140A
UlS-2140H
UlN-2204A
TPQ-2221 and 2222
UlN-2240A
UlN-2241A
UlN-2242A
UlN-2243A
UlN-2249A
UlN-2260A
UlN-2270B and 2270Q
UlN-2280B
UlN-2283B and 2283B-1
UlN-2290B and 2290Q

Quad Transistor Arrays ................................. 10-52
.................................. See UHD-400 through 433-1
.................................... See UHD-500 through 533
Hermetic Quad Power and Relay Drivers. . . . . . . . . . .. . . . . . . . . .. 5-2
Quad Power and Relay Drivers ............................ 3-3
Hermetic Quad Power and Relay Drivers. . . . . . . . . . . . . . . . . . . . .. 5-2
Quad Power and Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-3
Medium-Power Darlington Arrays .......................... 10-51
High-Current Darlington Drivers . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-14
Hermetic High-Current Darlington Drivers .................... 5-7
Hermetic High-Current Darlington Drivers .................... 5-7
High-Current, 95 VDarlington Drivers. . . . . . . . . . . . . . . . . . . . ... 3-14
Hermetic High-Current Darlington Drivers .................... 5-7
Darlington Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-2
Hermetic NPN Transistor Array ............................ 10-4
NPN Transistor Array ................................... 10-4
NPN Transistor Array ................................... 10-6
Triple Differential Amplifier Array .......................... 10-7
Dual Differential Amplifier Array ................. '.......... 10-8
Dual 1.5 ADarlington Switches. . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-24
Quad 1.5 ADarlington Switches ........................... 3-24
Hermetic Quad 1.5 ADarlington Switches. . . . . . . . . . . . . . . . . . . .. 5-17
Common-Emitter NPN Transistor Array ....................... 10-11
Common-Collector NPN Transistor Array ...................... 10-11
Independent NPN Transistor Array .......................... 10-12
Independent NPN Transistor Array .......................... 10-14
Hermetic Independent NPN Transistor Array . . . . . . . . . . . . . . . . . .. 10-12
NPN Transistor Array ................................... 10-15
F-M, I-F Amplifier/limiter and Detector ...................... 6-3
Quad Current Switch ................................... 10-16
Hermetic Quad Current Switch ............................ 10-16
A-M/F-M Radio System .................................. 6-8
Quad NPN Transistor Arrays .............................. 10-52
A-M/F-M Signal Processing System . . . . . . . . . . . . . . . . . . . . . . . .. 6-15
A-M/F-M Signal Processing System. . . . . . . . . . . . . . . . . . . . . . . .. 6-21
(TDA1090) A-M/F-M Signal Processing System ................. 6-27
Mixer/I-F for F-M Radios. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-34
A-M Radio System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-38
AGC, Sync, and Scan Processor. . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-3
(TDA1l70) Vertical Deflection System ....................... 7-6
2.5 WAudio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-3
low-Power Audio Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-9
(TDA3190 and TDA1190Z) 4-Watt TV Sound Channels. . . . . . . . . . .. 7-12

viii

Product Index (Continued)
ULN-2350C and 2351C
ULN-2401A
ULN-2429A
ULN-2430M
ULN-2435A
ULN-2445A
ULN-2450A and 2451M
ULN-2455A
TPQ-2483 and 2484
UDN-2541B and 2541W
UDN-2542B and 2542W
UDN-2580A through 2588A
UDN-2595A
ULN-2801A through 281SA
ULS-2801H through 2815H
ULS-2801R through 2815R
ULN-2821A through 2825A
ULS-2821H through 2825H
UDN-2841B and 2845B
UDN-2878W and 2879W
UTN-2886B and 2888A
TP6-2906 and 2907
UDN-2933B and 2934B
UDN-2935Z
UDN-2949Z
UDN-2950Z
UDN·29~2B and 2952W
UDN-2956A and 2957A
UDQ-2956R and 2957R
UDN-2975W and 2976W
UDN-2981A through 2984A
UDS-2981H through 2984H
TPP-3000
UGN-3013T and 3013U
UGN-3019T and 3019U
UGS-3019T and 3019U
UGN-3020T and 3020U
UGS-3020T and 3020U
UGN-3030T and 3030U
UGS-3030T and 3030U
UGN-3035U
UGN-3040T and 3040U
UGN-3075T and 3075U

Tuff Chip® Semi-Custom Integrated Circuits ................... 11-12
Lamp Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-18
Fluid Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-20
Timer ............................................. 10-23
Automotive Lamp Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-26
Automotive Lamp Monitor ................................ 10-26
Precision Power Timer/Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . .
*
General-Purpose Quad Comparator. . . . . . . . . . . . . . . . . . . . . . . .. 10-26
Quad NPN Transistor Arrays .............................. 10-52
Quad NAND Drivers ..................................... 3-35
Quad NAND Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-35
8-Channel High-Current Source Drivers . . . . . . . . . . . . . . . . . . . . .. 3-38
8-Channel Medium-Current Sink Driver . . . . . . . . . . . . . . . . . . . . .. 3-45
High-Current Darlington Drivers . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-47
Hermetic High-Current Darlington Drivers .................... 5-26
Hermetic High-Current Darling Drivers. . . . . . . . . . . . . . . . . . . . . .. 5-2fi
High-Current, 95 VDarlington Drivers . . . . . . . . . . . . . . . . . . . . . .. .3·47
Hermetic 95 VDarlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . .. 5-26
Quad 1.5 ADarlington Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-58
Quad 4 ADarlington Drivers .................... , . . . . . . . .. 3-64
SCR Arrays. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-70
Quad PNP Transistor Arrays .............................. 10-52
3-Channel Half-Bridge Motor Drivers. . . . . . . . . . . . . . . . . . . . . . . .
*
Bipolar Half-Bridge Motor Driver. . . . . . . . . . . . . . . . . . . . . . . . . .. 3-73
High-Current, Half-Bridge Motor Driver .. . . . . . . . . . . . . . . . . . . .. 3-79
Bipolar Half-Bridge Motor.Driver . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-73
Full-Bridge Motor Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-83
High-Current Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-89
Hermetic High-Current Source Drivers . . . . . . . . . . . . . . . . . . . . . .. 5-36
Dual 4 ASolenoid Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-92
High-Current Source Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-96
Hermetic High-Current Source Drivers . . . . . . . . . . . . . . . . . . . . . .. 5-39
Triple Medium-Power Darlington Switch ...................... 10-51
Low-Cost Digital Hall Effect Switches ....................... 9-3
Low-Cost Digital Hall Effect Switches ....................... 9-5
Extended-Temperature Low-Cost Hall Effect Switches. . . . . . . .. . .. 9-5
Low-Cost Digital Hall Effect Switches ............ ,.......... 9-7
Extended-Temperature Digital Hall Effect Switches. . . . . . . . . . . . .. 9-7
Bipolar Digital Hall Effect Switches. . . . . . . . . . . . . . . . . . . . . . . .. 9-~
Extended-Temperature Bipolar Digital Hall Effect Switches. . . . . . . .. 9-9
Magnetically-Biased Hall Effect Bipolar Latch. . . . . . . . . . . . . . . . . .
*
Ultra-Sensitive Digital Hall Effect Switches .................•. 9-11
Bipolar Hall Effect Latches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-14

*New Product. Contact factory for detailed information.

ix

Product Index (Continued)
UGS-3075T and 3075U
UGN-3076T and 3076U
UGS-3076T and 3076U
UGN-3201M and 3203M
UGN-3220S
ULN-3310D and 3310T
ULN-3330D, 3330T, 3330Y
UGN-3501M
UGN-350lT and 350lU
UGN-3604M and 3605M
UDN-3611M through 3614M
UDS-3611H through 3614H
ULN-3701Z
ULN-3702Z
ULN-3703Z
ULN-3705M
TPQ-3724 through 3725A
ULN-3783M
ULN-3784B
ULN-3793W
TPQ-3798 and 3799
ULX-3803A
ULN-3804A
ULN-3809A
ULN-3810A
ULN-3812A
ULN-3838A
ULN-3840A
ULN-3859A
TPQ-3904
TPQ-3906
TPP-4000
UCN-4202A and 4203A
UCN-4204A
TPQ-4258 and 4354
UCN-4401A and 4801A
UCS-4401H and 4801H
UCN-4805A
UCN-4807A and 4808A
UCN-4810A
UCS-4810H
UCN-4815A
UCS-4815H

Extended-Temperature Bipolar Hall Effect Latches .............. 9-14
Bipolar Hall EffectLatches . . .. . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-17
Extended-Temperature Bipolar Hall EffectLatches .............. 9-17
Dual Output Digital Hall Effect Switches ..................... 9-20
Dual Output Digital Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . .. 9-23
Precision Light Sensors . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-32
Optoelectronic Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... 10-38
Linear Output Hall Effect Sensor. . . . . . . . . . . . . . . . . . . . . . . . . .. 9-25
Linear Output Hall Effect Sensors .. , . . . . . . . . . . . . . . . . . . . . . .. 9"28
Hall Effect Sensor Elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-31
Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . .. 3-103
Hermetic Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . .. 5-44
(TDA2002) 5- to 10-Watt Audio Power Amplifier. . . . . . . . . . . . . . . .. 8-17
(TDA2008) 12-Watt Audio Power Amplifier .................... 8-22
(TDA2003) 10-Watt Audio Power Amplifier .................... 8-26
Low-Voltage Audio Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . .. 8-28
Qoad NPN Transistor Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-52
Dual Low-Voltage Audio Power Amplifier . ......... ,"; . . . . . . . . . .
*
4-Watt Audio Power Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8~35
20-Watt Audio Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*
Quad PNP Transistor Arrays ...................... ; ....... 10-52
Low-Voltage A..M/F-M/Shortwave Signal Processor . .......... ~ . . . .
*
A-M/F-M Signal Processor ............................... 6-42
Phase-Locked Loop Stereo Decoder . . . . . . . . . . . . . . . . . . . . . . . .. . 6-47
Phase-Locked Loop Stereo Decoder . . . . . . . . . . . . . . . . . . . . . . . .. 6-50
Phase-Locked Loop Stereo Decoder . . . . . . . . . . . . . . . . . . . . . . . .. 6-52
A-M Radio System.. . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-55
A-M/F-M Signal Processing System . . . . . . . . . . . . . . . . . . . . . . . .. 6-61
Low-Power, Narrow-Band F-M I-F .......................... 6-68
Quad NPN Transistor Array ............................... 10-52
Quad PNP Transistor Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-52
Medium-Power Quad Darlington Array . . . . . . . . . . . . . . . . . . . . . .. 10-51
Stepper Motor Translator/Drivers. . . . . . . . . . . . . . . . . . . . . . . . . .. 4-2
BiMOS 1.25A," 2-Phase Steppet Motor Translator/Driver ...........
*
Quad PNP Transistor Arrays .............................. 10-52
BiMOS Latched Drivers ................................. 4-9
Hermetic BiMOS Latched Drivers. . . . . . . . . . . . . . .. . .. . . . . . . .. 5-48
BiMOS Latched Decoder/Driver . . . .. . . . . . . . . . . . . . . . . . . . . . .. 4-12
BiMOS Addressable Latched Drivers ........................ 4-16
BiMOS 10-Bit, Serial-In, Latched Driver . . . . . . . . . . . . . . . . . . . . .. 4-22
Hermetic BiMOS lO-Bit, Serial-In, Latched Driver ............... 5-53
BiMOS Latch/Source Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-25
Hermetic BiMOS Latch/Source Driver . . . . . . . . . . . . . . . . . . . . . . .. 5-58

*New product. Contact factory for detailed information.

x

Product Index (Continued)
UCN-4821A through 4823A
UCS-4821H through 4823H
TPQ-5400 through 5551
UDSN-5703A through 5707A
UDS-5703H through 5707H
UDN-5711M through 5714M
UDS-5711H through 5714H
UDN-5722M
UDN-5732M
UDN-5733A
UDS-5733H
UDN-5742M
UDS-5791H
UCN-5800A through 5895A
UCN-5810A
UCN-5812A
UCN-5818A
UCN-5832A
TPQ-6001 through 6100A
UDN-6116A through 6128A-2
UDN-6116R through 6128R-2
UDN-6138A through 6148A-2
TPQ-6501 through 6700
UDN-6510A and 6510R
UDN-6514A and 6514R
UDN-7180A through 7186A
ULX-8125A
ULN-8126A
ULN-8126R
ULQ-8126A
ULQ-8126R
ULS-8126R
ULX-8127A
ULN-8160A
ULN-8160R
ULS-8160R
ULN-8161M
ULX-8163A
ULX-8194A
ULX-8195A
ULN-8564A
ULN-8564R
ULS-8564R

BiMOS 8-Bit Serial-In, Latched Drivers. . . . . . . . . . . . . . . . . . . . . .. 4-28
Hermetic BiMOS 8-Bit, Serial-In, Latched Drivers ............... 5-63
Quad Transistor Arrays ................................. 10-52
Quad Peripheral and Power Drivers . . . . . . . . . . . . . . . . . . . . . . .. 3-107
Hermetic Periphereal and Power Drivers. . . . . . . . . . . . . . . . . . . .. 5-68
Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . . . . .. 3-111
Hermetic Peripheral and Power Drivers. . . . . . . . . . . . . . . . . . . . .. 5-74
Dual Peripheral and Power Driver . . . . . . . . . . . . . . . . . . . . . . . .. 3-115
Dual Peripheral and Power Driver .. . . . . . . . . . . . . . . . . . . . . . .. 3-118
Quad NOR Peripheral and Power Driver ..................... 3-110
Hermetic Peripheral and Power Driver ...................... 5-73
Dual Peripheral and Power Driver . . . . . . . . . . . . . . . . . . . . . . . .. 3-118
Hermetic Quad PIN Diode Driver . . . . . . . . . . . . . . . . . . . . . . . . .. 5-80
BiMOS II High-Speed Interface Drivers. . . . . . . . . . . . . . . . . . . . .. 4-32
IO-Bit BiMOS II Serial/Parallel Source Driver. . . . . . . . . . . . . . . . . . .
*
20-Bit BiMOS II Serial/Parallel Source Driver .................. .
*
32-Bit BiMOS II Serial/Parallel Source Driver .................. .
*
32-Bit BiMOS II Serial/Parallel Sink Driver ................... .
*
Dual Complementary-Pair Transistor Arrays . . . . . . . . . . . . . . . . .. 10-52
Fluorescent Display Drivers ............................. 2-3
Hermetic Fluorescent Display Drivers. . . . . . . . . . . . . . . . . . . . . .. 2-3
Fluorescent Display Drivers ............................. 2-3
Dual Complementary-Pair Transistor Arrays . . . . . . . . . . . . . . . . .. 10-52
Display Anode/Grid Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-7
Display Anode/Grid Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-7
Gas-Discharge Display Segment Drivers. . . . . . . . . . . . . . . . . . . .. 2-10
Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . .
*
Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . .. 10-41
(SG3526J) Hermetic SMPS Controller, . . . . . . . . . . . . . . . . . . . . .. 10-41
Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . .. 10-41
(SG2526J) Hermetic SMPS Controller. . . . . . . . . . . . . . . . . . . . . .. 10-41
(SG1526J) Hermetic SMPS Controller. . . . . . . . . . . . . . . . . . . . . .. 10-41
Switched-Mode Power Supply Controller . . . . . . . . . . . . . . . . . . . . . .
*
(NE5560N) Switched-Mode Power Supply Controller. . . . . . . . . . . .. 10-46
(NE5560F) Hermetic SMPS Controller. . . . . . . . . . . . . . . . . . . . . .. 10-46
(SG5560F) Hermetic SMPS Controller. . . . . . . . . . . . . . . . . . . . . .. 10-46
(NE5561N) Switched-Mode Power Supply Controller. . . . . . . . . . . .. 10-49
Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . .
*
Switched-Mode Power Supply Controller ..................... .
*
Switched-Mode Power Supply Controller ..................... .
*
(NE564N) High-Frequency Phase-Locked Loop ................. .
*
(NE564F) High-Frequency Phase-Locked Loop ................. .
*
(SE564F) Hermetic High-Frequency Phase-Locked Loop .......... .
*

*New product. Contact factory for detailed information.

xi

QI

GENERAL INFORMATION

-u

D

SECTION 1-GENERAL INFORMATION
Part Numbering System ........................
Cross-Reference .............................
How To Place An Order .........................
Sprague Facilities ............................
Engineering Bulletins ..........................

1-2
1-4

1-16
1-17
1-19

See Also:
Sales Offices .......................... Back Cover

1-1

GENERAL INFORMATION

Sprague Part Numbering Systems

UL

N - 2046

A- 1

r

IL..-_____ INSTRUCTIONS.
1 = SELECTED VERSION, SEE DETAIL SPECIFICATIONS
BU = BURNED-IN PARTS TO DOUBLE-DEUCE PROGRAM
MIL = MILITARY GRADE WITH SCREENING TO MIL-STD-883,
CLASS B (PACKAGES H, J, AND RONLY)
~---- PACKAGE DESIGNATION.

A = PLASTIC, 14- THROUGH 40-PIN DUAL IN-LINE
B = PLASTIC, 8- THROUGH 22-PIN DUAL IN-LINE SEMI-TAB
C = UNPACKAGED CHIP
CW = PROBED WAFER
D = METAL CAN, 3-LEAD (TO-52)
E = LEADLESS CHIP CARRIER (CONTACT FACTORY)
H = GLASS/METAL HERMETIC, 8- THROUGH 40-PIN DUAL IN-LINE
J = GLASS/METAL HERMETIC, 14-LEAD FLAT PACK
L = PLASTIC SOIC (CONTACT FACTORY)
M = PLASTIC, 8-PIN DUAL IN-LINE
P = DIRECTLY REPLACED BY BPACKAGE
Q = PLASTIC, 16-PIN QUAD IN-LINE
R = CERAMIC/GLASS HERMETIC, 14- THROUGH 40-PIN DUAL IN-LINE
S = PLASTIC, 4-LEAD SINGLE IN-LINE
T = PLASTIC, 3-LEAD SINGLE IN-LINE
U = PLASTIC, 3-LEAD THIN SINGLE IN-LINE
V = METAL FLANGE MOUNT, ll-LEAD (T0-3)
W = PLASTIC, 12-1EAD SINGLE IN-LINE POWER TAB
Y = PLASTIC, 3-LEAD (T0-92)
Z = PLASTIC, 5-LEAD SINGLE IN-LINE POWER TAB (T0-220)
ZH = Z PACKAGE WITH FORMED LEADS FOR HORIZONTAL MOUNT
ZV = Z PACKAGE WITH FORMED LEADS FOR VERTICAL MOUNT

&00-.----- DEVICE TYPE (FOUR DIGITS).
'------OPERATING AMBIENT TEMPERATURE RANGE.
N = COMMERCIAL/INDUSTRIAL, SEE DETAIL SPECIFICATIONS
Q = EXTENDED ( - 40°C TO + 85°C)
S = FULL MILITARY ( - 55°C To + l25°C)
X = SPECIAL SIGNIFIER FOR PRE-PRODUCTION DEVICES
~---- FAMILY

(UC, UD, UG, UL, OR UT).

1-2

GENERAL INFORMATION

Sprague Part Numbering Systems
UH

D-400 - tL..----------INSTRUCTIONS.
1 = SELECTED VERSION, SEE DETAIL SPECIFICATIONS
MIL = MILITARY GRADE WITH SCREENING TO MIL-STD-883,
CLASS B (PACKAGES C AND D ONLY)

' - - - - - - - - - - - - - DEVICE TYPE (THREE DIGITS).

' - - - - - - - - - - - - - - - P A C K A G E DESIGNATION.
C = GLASS/METAL HERMETIC, 14-PIN FLAT PACK
D = GLASS/METAL HERMETIC, 14-PIN DUAL IN-LINE
K = UNPACKAGED CHIP OR PROBED WAFER
P = PLASTIC, 14-PIN DUAL IN-LINE
R = CERAMIC/GLASS HERMETIC, 14-PIN DUAL IN-LINE
' - - - - - - - - - - - - - - - - - F A M l l y (UH ONLY).

OO
TPP -

TL._ _ _ _ _ _ _ _ _ _ _ _ _ DEVICE TYPE (FOUR DIGITS OR FOUR DIGITS AND LETTER).

'-----------------FAMlly.
TPP = DARLINGTON ARRAY
TPQ = QUAD TRANSISTOR ARRAY

1-3

o

GENERAL INFORMATION

CROSS-REFERENCE in Numerical Order
The suggested Sprague replacement devices are based on similarity as shown in currently published data. Exact replacement in all
applications is not guaranteed. The user should compare the specifications of the competitive and recommended Sprague replacement.

Competitive
Part
Number

Manufacturers' Abbreviations:
AMI

CS
DI
EXR
FER
FSC
FUJ
GE
HIT
IR
In
MAL
MAT
MIT
MOT
NEC
NS
OKI
PE
PLS
RAY
RCA
RFA
SANY
SG
SIG
SIL
SGS
SPC
SPR
SYL
THM
TI
TLF
TOKO
TOS
UNI

American Microsystems
Cherry Semiconductor
Dionics, Inc.
Exar Integrated Systems
Ferranti Limited
Fairchild Semiconductor
Fujitsu
General Electric*
Hitachi Ltd.
International Rectifier*
In Semiconductors
P. R. Mallory*
Matsushita
Mitsubishi Electric Corp.
Motorola Semiconductor
Nippon Electric Co.
National Semiconductor
Oki Semiconductor
Pro-Electron:!:
Plessey Semiconductor
Raytheon Co. *
RCA
Rifa
Sanyo
Silicon General Inc.
Signetics Corp.
Siliconix
SGAIATES
Sprague Products Co.*
Sprague Electric Co.
Sylvania
Thomson-CSF
Texas Instruments
AEG-Telefunken
RCL Toko
Toshiba Corp.
Unitrode

Manufacturer

AD741CH
AD741CN

Suggested
Sprague
Replacement
ULN-21SlO*
ULN-21S1M*

AN206

MAT

ULN-216SA*

CAl24E
CA224E
CA324E
CA741CE
CA741CT
CA7S8E
CA1l90E
CA1l90Q
CA1310E
CA1391E
CA1394E
CA1398E
CA1724G
CAl725G
CA2002
CA2002M
CA2004
CA2004M
CA2111AE
CA2136AE
CA304S

RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA

ULN-4336A*
ULN-4336A*
ULN-4336A*
ULN-21S1M*
ULN-21S1D*
ULN-3812A
ULN-2290B
ULN-2290Q
ULN-3810A
ULN-2291M*
ULN-2294M*
ULN-2298A*
TPQ-3724
TPQ-3725
ULN-3701Z
ULN-3701ZH
ULN-3702Z
ULN-3702ZH
ULN-2111A
ULN-2136A*
ULS-204SH

tEuropean registration; manufactured by various companies including
In, Philips, SGSIATES, Siemens, Thomson-CSF, AEG-Telefunken, and
Valvo.
*No longer manufactured. listed for reference only.

1-4

GENERAL INFORMATION

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

CA3045F
CA3045L
CA3046
CA3054
CA3064E
CA3065
CA3066
CA3067
CA3070
CA3071
CA3072
CA3075
CA3081E
CA3082E
CA3083E
CA3086
CA3089E
CA3120E
CA3121E
CA3123E
CA3126Q
CA3135G
CA3146E
CA3153G
CA3170E
CA3172G
CA3183AE
CA3183E
CA3189E
CA3l95
CA3209E
CA3217E
CA3219E
CA3724G
CA3725G
CA10806A

RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA

ULS-2045R
ULS-2045H
ULN-2046A
ULN-2054A
ULN-2264A*
ULN-2165A*
ULN-2266A*
ULN-2267A*
ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2129A*
ULN-2081A
ULN-2082A
ULN-2083A
ULN-2986A
ULN-2289A*
ULN-2125A*
ULN-2269A*
ULN-2137A*
ULN-2262A*
ULN-2261A*
ULN-2046A-1
ULN-2297A*
ULN-2268A*
ULN-2229A*
ULN-2083A-1
ULN-2083A-1
ULN-3889A*
ULN-3812A*
ULX-3888A*
ULN-3914A
UDN-2541B
TPQ-3724
TPQ-3725
ULN-3914A

DH3724CN
DH3725CN

NS
NS

TPQ-3724
TPQ-3725

DI302
DI502
DI507
DI509
DI510
DI512
D1514

DI
DI
DI
DI
DI
DI
DI

UDN-7183A
UDN-6144A*t
UDN-6116A-1 ~

DM3724CN
DM3725CN
DS3611N
DS3612N
DS3613N
DS3614N

NS
NS
NS
NS
NS
NS

CS102
CS122
CS166

CS
CS
CS

ULN-3304M*
ULN-3306M*
ULN-2492A

DVR-01

UDN-6118A-2~

TPQ-3724
TPQ-3725
UDN-3611M
UDN-3612M
UDN-3613M
UDN-3614M
UHP-480*

FPQ2222
FPQ2907
FPQ3724
FPQ3725
FSA2619P
FSA2719P

FSC
FSC
FSC
FSC
FSC
FSC

TPQ-2222
TPQ-2907
TPQ-3724
TPQ-3725
TND-908
TND-903

GEL2113

GE

ULN-2111A

HA1137W
HA1l56W
HAl199
HA1364
HAl377A
HA1388
HA12402

HIT
HIT
HIT
HIT
HIT
HIT
HIT

ULN-2289A*
ULN-3810A-1
ULN-2249A
ULN-2290Q
ULX-3777W*
ULX-3788W*
ULN-2204A

ITIS12
ITIS52

In
In

UHP-491 *
ULN-2001A

~Sprague device includes internal pUll-down resistors.
*No longer manufactured. Listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.

1-5

UDN-6116A-2~

UDN-6510A
UDN-6514A

D

GENERAL INFORMATION

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

lIT
lIT
lIT
lIT
lIT
lIT
lIT

ULN-2002A
ULN-2003A
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2264A*
ULN-2165A*

KB4402
KB4409

TOKO
TOKO

ULN-2289A*
ULN-3810A

U19
U80
L201
L202
L203
L204
L601
L602
L603
L604

SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS
SGS

ULX-3908Q*
ULX-3801Q*
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
ULN-2821A
ULN-2822A
ULN-2823A
ULN-2824A

LM124N
LM148N
LM224N
LM324N
LM377N
LM378N
LM380N
LM383AT
LM383T
LM384N
LM741CH
LM741CN
LM746N
LM1304
LM1305
LM130lN
LM1310N
LM1391N
LM1394N

NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS

ULN-4336A*
ULN-4336A*
ULN-4336A*
ULN-4336A*
ULN-2274B*
ULN-2278B-1 *
ULN-2280B
ULN-3702Z
ULN-3701Z
ULN-3784B
ULN-215ID*
ULN-2151M*
ULN-2228A*
ULN-2120A*
ULN-2122A*
ULN-2128A*
ULN-3810A-1
ULN-2291M*
ULN-2294M*

LA705PC
LA758PC
LA1160
LA1230
LA1364
LA1368
LA1369
LA3045
LA3046
LA3086
LA3089
LA3301
LA3350
LB1231
LB1232
LB1233
LB1234
LB1294

SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY
SANY

ULN-3812A
ULN-3812A
ULN-2243A
ULN-2289A*
ULN-2264A*
ULN-2298A*
ULN-2224A*
ULS-2045H
ULN-2046A
ULN-2086A
ULN-2289A*
ULN-3810A-l
ULN-3810A
ULN-2001A
ULN-2002A
ULN-2003A
ULN-2004A
UHP-491*

LM1800N
LM1820N
LM1827N
LM1828N
LM1829N
LM1841N
LM1848N
LM1877N
LM2002T
LM2002AT
LM2111N
LM2113N
LM3045D
LM3046N
LM3053N
LM3054N
LM3064N
LM3065N
LM3066N
LM3067N

NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS

ULN-3812A
ULN-2137A*
ULN-2224A*
ULN-2228A*
ULN-2262A*
ULN-2136A*
ULN-2229A*
ULN-2274B*
ULN-3701Z
ULN-3702Z
ULN-2111A
ULN-2111A
ULS-2045H
ULN-2046A
ULN-2209M*
ULN-2054A
ULN-2264A*
ULN-2165A*
ULN-2266A*
ULN-2267A*

Competitive
Part
Number
1TI554
1TI556
1TI652
IIT654
1TI656
Im064
Im065

*No longer manufactured. Listed for reference only.

1-6

GENERAL INFORMATiON

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

LM3070N
LM3071N
LM3072N
LM3075N
LM3086N
LM3089N
LM3611N
LM3612N
LM3613N
LM3614N

NS
NS
NS
NS
NS
NS
NS
NS
NS
NS

ULN-2124A*
ULN-2127A*
ULN-2228A*
ULN-2129A*
ULN-2086A
ULN-2289A*
UDN-3611M
UDN-3612M
UDN-3613M
UDN-3614M

MC1356P
MC1357P
MC1358P
MC1364P
MC1370P
MC137lP
MC1375P
MC1389P
MC1391P
MC1394P
MC1398P

MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT

ULN-2136A*
ULN-2111A
ULN-2165A*
ULN-2264A*
ULN-2124A*
ULN-2127A*
ULN-2129A*
ULN-2289A*
ULN-2291M*
ULN-2294M*
ULN-2298A*

M54523
M54524P
M54525P
M54526P
M54532P
M54562P
M5463P

MIT
MIT
MIT
MIT
MIT
MIT
MIT

ULN-2003A
ULN-2001A
ULN-2002A
ULN-2004A
ULN-2064B
UDN-2982A
UDN-2981A

MB3759C
MB3759P
MB3760C
MB3760P

FUJ
FUJ
FUJ
FUJ

ULQ-8194R§
ULQ-8194A§
ULQ-8195R§
ULQ-8195A§

MC1304
MC1305
MC1307P
MC1309
MC1310EP
MC1310P
MCl311P
MC1320P
MC1324P
MC1326P
MC1327P
MC1328P
MC1329P
MC1339P
MC1344P

MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT

ULN-2120A*
ULN-2122A*
ULN-2128A*
ULN-3809A
ULN-381OA
ULN-3810A
ULN-3812A
ULN-2137A*
ULN-2224A*
ULX-2226A*
ULN-2217A*
ULN-2228A*
ULN-2229A*
ULN-2126A*
ULN-3812A

MC1411L
MC1411P
MC1412L
MC1412P
MC14l3L
MC1413P
MC1413TP
MC1416L
MC1416P
MC1417P
MC1439G
MC1439Pl
MC147lP1
MC1472Pl
MC1473Pl
MC1474Pl
MC1741CG
MC1741CPl
MC3346
MC3357P
MC3386P
MC3403P
MFC4050

MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT

ULN-2001R
ULN-2001A
ULN-2002R
ULN-2002A
ULN-2003R
ULN-2003A
ULQ-2003A
ULN-2004R
ULN-2004A
UDN-2580A
ULN-2139G*
ULN-2139M*
UDN-5711M
UDN-5712M
UDN-5713M
UDN-5714M
ULN-21S10*
ULN-2151M*
ULN-2046A
ULX-3857A*
ULN-2086A
ULN-4336A*
ULN-2135E*

Competitive
Part
Number

ML3045
ML3046
ML3086

*No longer manufactured. Listed for reference only.
§Sprague engineering bulletin in preparation.

1-7

ULS-2045H
ULN-2046A
ULN-2086A

0

GENERAL INFORMATION

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

MPQ2221
MPQ2222
MPQ2369
MPQ2483
MPQ2484
MPQ2906
MPQ2907
MPQ3724
MPQ3725
MPQ3725A
MPQ3798
MPQ3799
MPQ3904
MPQ3906
MPQ6001
MPQ6002
MPQ6100
MPQ6100A
MPQ6501
MPQ6502
MPQ6600
MPQ6600A
MPQ6700

MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT
MOT

TPQ-2221
TPQ-2222
TPQ-2369
TPQ-24S3
TPQ-2484
TPQ-2906
TPQ-2907
TPQ-3724
TPQ-3725
TPQ-3725A
TPQ-3798
TPQ-3799
TPQ-3904
TPQ-3906
TPQ-6001
TPQ-6002
TPQ-6100
TPQ-6100A
TPQ-6501
TPQ-6502
TPQ-6600
TPQ-6600A
TPQ-6700

NE594F
NE594N
NE550lN
NE5502N
NE5503N
NE5504N
NE5560F
NE5560N
NE5561N
NE5562F
NE5562N
NE5563F
NE5563N
NE5601N
NE5602N
NE5603N
NE5604N

SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG

UDN-6118R-2
UDN-6118A-2
UlN-2021A
UlN-2022A
UlN-2023A
UlN-2024A
UlN-8160R
UlN-8160A
UlN-8161M
UlN-B162R§
UlN-8162A§
UlN-8163R§
UlN-BI63A§
UlN-2001A
UlN-2002A
UlN-2003A
UlN-2004A

PA239

GE

UlN-2126A*

MSl912R

OKI

UDN-6118A-2

N2211A
N2212A
N5065A
N5070B
N507lA
N5072A
N5111A
N574lT
N574lV

SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG

UlN-2211B*
UlN-2212B*
UlN-2165A*
UlN-2124A*
ULN-2127A*
UlN-222BA*
UlN-2l11A
UlN-2151D*
UlN-2151M*

PBD35230lJ
PBD352301N
PBD352302J
PBD352302N
PBD352303J
PBD352303N
PBD352304J
PBD352304N
PBD3523l1N
PBD352312N
PBD352313N
PBD352314N
PBD353BOlJ
PBD353802J
PBD353803J
PBD353804J

RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA
RFA

UlN-2001R
UlN-2001A
UlN-2004R
UlN-2004A
UlN-2003R
UlN-2003A
UlN-2002R
UlN-2002A
UlN-2021A
UlN-2024A
UlN-2023A
UlN-2022A
UlN-2BOIR
UlN-2804R
UlN-2S03R
UlN-2S02R

PWM25BK
PWM25CK
PWM27BK
PWM27CK

Sil
Sil
Sil
Sil

UlQ-SI25R§
UlN-SI25R§
UlQ-SI27R§
UlN-SI27R§

NA30S6
NE564F
NE564N

UlN-20S6A
SIG
SIG

UlN-8564R§
UlN-S564A§

*No longer manufactured. listed for reference only.
§Sprague engineering bulletin in preparation.

I-S

GENERAL INFORMATION

Co mpetitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Q2T2222
Q2T3725

TI
TI

TPQ-2222
TPQ-3725

RC741DN
RC741TE
RC4136DP
RC4236DP
RC4336DP
RC4436DP

RAY
RAY
RAY
RAY
RAY
RAY

ULN-2151M*
ULN-2151O*
ULN-4136A*
ULN-4236A*
ULN-4336A*
ULN-4436A*

SG2002N
SG2003J
SG2003N
SG2004J
SG2004N
SG2524BJ
SG2524BN

SG
SG
SG
SG
SG
SG
SG

ULN-2002A
ULS-2003R
ULN-2003A
ULS-2004R
ULN-2004A
ULQ-8124R§
ULQ-8124A§

SG2524F
SG2524N

SIG
SIG

ULQ-8124R§
ULQ-8124A§

S4534
S4535

AMI
AMI

UCN-481OA
UCN-5818A

SA594N
SE5560F
SE5560N
SE5561N
SE5562F
SE5562N
SE5563F
SE5563N

SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG

UDQ-6118A-2§
ULS-8160R
ULS-8160A
ULS-8161M
ULS-8162R§
ULS-8162A§
ULS-8163R§
ULS-8163A§

SFC2046E
SFC2054EC
SFC2086E

THM
THM
THM

ULN-2046A
ULN-2054A
ULN-2086A

SG2525AJ
SG2525AN
SG2526J
SG2526N
SG2527AJ
SG2527AN
SG2841N
SG3081N
SG3082N
SG3083N
SG3086N
SG3146N
SG3183N
SG3524BJ
SG3524BN

SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG
SG

ULQ-8125R§
ULQ-8125A§
ULQ-8126R
ULQ-8126A
ULQ-8127R§
ULQ-8127A§
UDN-2841B
ULN-2081A
ULN-2082A
ULN-2083A
ULN-2086A
ULN-2046A-1
ULN-2083A-1
ULN-8124R§
ULN-8124A§

SG741CT
SG741CM
SG1524BJ

SG
SG
SG

ULN-2151O*
ULN-2151M*
ULS-8124R§

SG3524N

SIG

ULN-8124A§

SG1524F

SIG

ULS-8124R§

SG1525AJ
SG1526J
SG1527AJ
SG200lJ
SG2001N
SG2002J

SG
SG
SG
SG
SG
SG

ULS-8125R§
ULS-8162R
ULS-8127R§
ULS-2001R
ULN-2001A
ULS-2002R

SG3525AJ
SG3525AN
SG3526J
SG3526N
SG3527AJ
SG3527AN
SG3635P
SG382lJ
SG3821N
SG3822N

SG
SG
SG
SG
SG
SG
SG
SG
SG
SG

ULN"8125R§
ULN-8125A§
ULN-8126R
ULN-8126A
ULN-8127R§
ULN-8127A§
UDN-2935Z
ULS-2045H
ULN-2046A
ULN-2054A

*No longer manufactured. Listed for reference only.
§Sprague engineering bulletin in preparation.

1-9

0

GENERAL INFORMATION

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

SG385lJ
SG3851N
SG3852J
SG3852N
SG3853J
SG3853N
SG3854J
SG3854N
SG3886N
SG6118N

SG
SG
SG
SG
SG
SG
SG
SG
SG
SG

ULS-2011R
ULN-2011A
ULS-2012R
ULN-2012A
UlS-2013R
ULN-2013A
ULS-2014R
UlN-2014A
ULN-2086A
UDN-6118A

SL3045C
Sl3046C
SL3054
SL3081D
SL3082D
Sl3083E
SL3086
SL3145E
SL3146E
SL3183E

PLS
PlS
PlS
PlS
PlS
PlS
PlS
PlS
PLS
PLS

ULS2045R
UlN-2046A
UlN-2054A
ULN-2081A
ULN-2082A
ULN-2083A
UlN-2086A
UlS-2045H
UlN-2046A-l
UlN-2083A-l

SN72741l
SN72741P
SN75064NE
SN75065NE
SN75066NE
SN75067NE
SN75068NE
SN75069NE
SN75074NE
SN75075NE
SN75407P
SN75437ND
SN75466J
SN75466N
SN75467J
SN75467N
SN75468J
SN75468N

TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI

UlN-21S1D*
UlN-2151M*
UlN-2064B
ULN-2065B
UlN-2066B
UlN-2067B
ULN-2068B
UlN-2069B
UlN-2074B
ULN-2075B
UDN-5732M
UDN-2541B
ULN-2021R
ULN-2021A
ULN-2022R
ULN-2022A
ULN-2023R
ULN-2023A

SN75469J
SN75469N
SN75471P
SN75472P
SN75473P
SN75474P
SN75475P
SN75476P
SN75477P
SN75478P
SN75479P
SN75518N
SN75605
SN76104N
SN76105N
SN76110N
SN76111N
SN76113N
SN76115N
SN76116N
SN76130N
SN76177ND
SN76226N
SN76227N
SN76228N
SN76242N
SN76243AN
SN76246N
SN76266N
SN76267N
SN76298N
SN76564N
SN76565N
SN76591P
SN76594P
SN76635N
SN76642N
SN76643N
SN76665N

TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI

ULN-2024R
ULN-2024A
UDN-3611Mt
UDN-3612Mt
UDN-3613Mt
UDN-3614Mt
UDN-5712Mt
UDN-5711Mt
UDN-5722Mt
UDN-5713Mt
UDN-5714Mt
UCN-5818A§
UDN-2950Z
UlN-2120A*
UlN-2122A*
UlN-2128A*
ULN-2121A*
UlN-2128A*
UlN-3810A
UlN-3812A
UlN-2126A*
ULN-2278B*
UlN-2216A*
UlN-2217A*
UlN-2218A*
UlN-2124A*
UlN-2127A*
ULN-2228A*
UlN-2266A*
UlN-2267A*
UlN-2298A*
ULN-2264A*
ULN-2264A*
ULN-2291M*
ULN-2294M*
ULN-2137A*
ULN-2111A
ULN-21l1A
ULN-2165A*

Competitive
Part
Number

*No longer manufactured. Listed for reference only.
tSome differences in specified switching speed with the Sprague device being superior for use with
inductive loads.
§Sprague engineering bulletin in preparation.

1-10

GENERAL INFORMATION

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

SN76669N
SN76675N
SN76678P
SN76688ND
SN76689N
SN76883N
SP3724QD
SP3725QD

TI
TI
TI
TI
TI
TI
TI
TI

ULN-2136A*
ULN-2129A*
ULN-2209M*
ULN-2211B*
ULN-2289A*
ULX-2230A*
TPQ-3724
TPQ-3725

TD62104P
TD62479P
TD62703P
TD62705P
TD62781AP
TD62782AP

TOS
TOS
TOS
TOS
TOS
TOS

ULN-2004A
UDN-5714M
UHP-495*
UHP-491*
UDN-6118A-2
UDN-6128A-2

PH
PH

TA7070P
TA7103P
TA7141AP
TA7157P
TA7613P

TOS
TOS
TOS
TOS
TOS

ULN-2264A*
ULN-2224A*
ULN-2217A*
ULN-3810A
ULN-2204A

TDAI060
TDAI083
TDAI090
TDA1170
TDA1190
TDA1190P
TDA1190Z
TDA1200
TDA1230
TDA1327
TDA2002
TDA2002A
TDA2002H
TDA2002V
TDA2003H
TDA2003V
TDA2008V
TDA3189
TDA3190
TDA3190P
TDA3950A

PEt

ULN-8160A
ULN-2204A
ULN-2242A
ULN-2270Q
ULX-3908Q*
ULN-2290B
ULN-2290Q
ULN-2289A*
ULX-3801Q*
ULN-2217A*
ULN-3701Z
ULN-3702Z
ULN-3701ZH
ULN-3701ZV
ULN-3703ZH
ULN-3703ZV
ULN-3702ZV
ULN-3889A*
ULN-2290B
ULN-2290B
ULN-2220A*

TID121
TID122
TID123
TID124
TL494CJ
TL494CN
TL4941J
TL4941N
TL494MJ
TL495CJ
TL495CN

TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI

TND-933
TND-940
TND-938
TND-939
ULN-8194R§
ULN-8194A§
ULQ-8194R§
ULQ-8194A§
ULS-8194R§
ULN-8195R§
ULN-8195A§

Com petitive
Part
Number

TAA930
TBA395
TBA396

ULN-2111A
ULN-2218A*
ULN-2219A*

TCA3089
TCA3189

PH
PEt

ULN-2289A*
ULN-3889A*

TD62001AP
TD62001P
TD62002AP
TD62002P
TD62003AP
TD62003P
TD62004AP
TD62004P
TD62064AP
TD62064P
TD62074AP
TD62074P
TD62081AP
TD62082AP
TD62083
TD62084AP
TD62101P
TD62103P

TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS
TOS

ULN-2001A
ULN-2001A
ULN-2002A
ULN-2002A
ULN-2003A
ULN-2003A
ULN-2004A
ULN-2004A
ULN-2064B
ULN-2064B
ULN-2074B
ULN-2074B
ULN-2801A
ULN-2802A
ULN-2803A
ULN-2804A
ULN-2001A
ULN-2003A

PEt
PEt
PEt
PEt
PEt
PEt
PEt
PEt

PEt
PEt
PEt
PEt
PEt
PEt
PH
PEt
PH
PH

tEuropean registration; manufactured by various companies including lIT, Philips, SGS/ATES, Siemens,
Thomson-CSF, AEG-Telefunken, and Valvo.
"No longer manufactured. Listed for reference only.
§Sprague engineering bulletin in preparation.

1-11

0

GENERAL INFORMATION

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Com petitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

TL4951J
TL4951N
TL594CJ
TL594CN
TL5941J
TL5941N
TL594MJ
TL595CJ
TL595CN
TL5951J
TL5951N
TL595MJ

TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI

ULQ-8195R§
ULQ-8195A§
ULN-8194R§
ULN-8194A§
ULQ-8194R§
ULQ-8194A§
ULS-8194R§
ULN-8195R§
ULN-8195A§
ULQ-8195R§
ULQ-8195A§
ULS-8195R§

TVCM-1
TVCM-2
TVCM-3
TVCM-4
TVCM-5
TVCM-6
TVCM-7
TVCM-8
TVCM-9
TVCM-10
TVCM-ll
TVCM-12
TVCM-13
TVCM-14
TVCM-15
TVCM-16
TVCM-17
TVCM-18
TVCM-19
TVCM-20
TVCM-21
TVCM-22
TVCM-23
TVCM·24
TVCM-25
TVCM-26

SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC

ULN-2114W*
ULN-2114A*
ULN-2114K*
ULN-21l1A
ULN-21l1A
ULN-2120A*
ULN-2122A*
ULN-2124A*
ULN-2127A*
ULN-2128A*
ULN-2165A*
ULN-2121A*
ULN-2126A*
ULN-2131M*
ULN-2125A*
ULN-2129A*
ULN-2135E*
ULN-2136A*
ULN-2137A*
ULN-2209M*
ULN-2224A*
ULN-2228A*
ULN-22748*
ULN-2276P*
ULN-22788*
ULN-22788*

TVCM"27
TVCM-28
TVCM-29
TVCM-30
TVCM-33
TVCM-34
TVCM-35
TVCM-36
TVCM-37
TVCM-38
TVCM-39
TVCM-40
TVCM-62
TVCM-65
TVCM-66
TVCM-67
TVCM-68
TVCM-73

SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC
SPC

ULN-2298A*
ULN-22118*
ULN-3812A
ULN-2264A*
ULN-2267A*
ULN-2269A*
ULN-22808
ULN-3784B
ULN-2285A*
ULN-2285P*
ULN-2289A*
ULN-2298A*
ULN-3812A
ULN-22788*
ULN-2046A
ULN-2054A
ULN-2208M*
ULN-3810A

U5E737394
U5E7746394
U6A758394
U6A7704394
U6A7720394
U6A7729394
U6A7732394
U6A7746394
U6A7767394
U6A7781394
U687780394
U6E7729394
U7F7064394
U7F7065354
U7F7065394
U7F7075394
U7F7729394
U7F7732394
U7F7746394
U7F7767394

FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC

ULN-2114W*
ULN-2114W*
ULN-3812A
ULN-22118*
ULN-2137A*
ULN-2122A*
ULN-2120A*
ULN-2114A*
ULN-2128A*
ULN-2127A*
ULN-2124A*
ULN-2122A*
ULN-2264A*
ULN-2165A*
ULN-2165A*
ULN-2129A*
ULN-2122A*
ULN-2120A*
ULN-2114A*
ULN-2128A*

*No longer manufactured. Listed for reference only.
§Sprague engineering bulletin in preparation.

1-12

GENERAL INFORMATION

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

U7F7780394
U7F7781394
U8F7746394
U9A7746394
U9A7781394
U9B7780394
U9C7065354

FSC
FSC
FSC
FSC
FSC
FSC
FSC

ULN-2124A*
ULN-2127A*
ULN-2114W*
ULN-2l14A*
ULN-2127A*
ULN-2124A*
ULN-2165A*

UA3089PC
UA7327

FSC
FSC

ULN-2289A*
ULN-2270B

U417B

TLF

ULN-2204A

UA704PC
UA705PC
UA720PC
UA729PC
UA732PC
UA737EC
UA739PC
UA741CT
UA741CV
UA746PC
UA753TC
UA758PC
UA767PC
UA780PC
UA781PC
UA787PC
UA139ITC
UA1394TC
UA2136PC
UA3045DM
UA3046PC
UA3054PC
UA3064PC
UA3065PC
UA3067PC
UA3075PC
UA3066PC
UA3067PC
UA3086PC

FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC

ULN-22l1B*
ULN-3812A
ULN-2137A*
ULN-2122A*
ULN-2120A*
ULN-2114K*
ULN-2126A*
ULN-2151O*
ULN-2151M*
ULN-2228A*
UlN-2209M*
ULN-3812A
UlN-2128A*
ULN-2124A*
ULN-2127A*
ULN-2162A*
UlN-2191M*
ULN-2294M*
ULN-2136A*
ULS-2045H
ULN-2046A
ULN-2054A
ULN-2264A*
ULN-2165A*
UlN-2267A*
UlN-2129A*
UlN-2266A*
UlN-2267A*
ULN-2086A*

UC1524AJ
UC1525AJ
UC1526J
UC1527AJ
UC2524AJ
UC2524AN
UC2525AJ
UC2525AN
UC2526J
UC2526N
UC2527AJ
UC2527AN
UC3524AJ
UC3524AN
UC3525AJ
UC3525AN
UC3526J
UC3526N
UC3527AJ
UC3527AN
UC494ACJ
UC494ACN
UC494AJ
UC495ACJ
UC495ACN
UC495AJ

UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI
UNI

ULS-8124R§
ULS-8125R§
ULS-8126R
ULS-8127R§
ULQ-8124R§
ULQ-8124A§
ULQ-8125R§
ULQ-8125A§
ULQ-8126R
ULQ-8126A
ULQ-8127R§
ULQ-8127A§
ULN-8124R§
ULN-8124A§
ULN-8125R§
ULN-8125A§
ULN-8126R
UlN-8126A
ULN-8127R§
ULN-8127A§
ULN-8194R§
ULN-8194A§
ULS-8194R§
UlN-8195R§
UlN-8195A§
UlS-8195R§

UCN4810N
UDN2841NE
UDN2845NE
UDN5711N
UDN5712N
UDN5713N
UDN5714N

TI
TI
TI
TI
TI
TI
TI

UCN-4810A
UDN-2841B
UDN-2845B
UDN-5711M
UDN-5712M
UDN-5713M
UDN-5714M

UDN-6164A

SPR

UDN-6116A-1

*No longer manufactured. Listed for reference only.
§Sprague engineering bulletin in preparation.

1-13

0

GENERAL INFORMATION

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

UDN-6184A

SPR

UDN-6118A-l

ULN-2114A

SPR

ULN-2228A*

ULN2001AJ
ULN2001AN
ULN2002AJ
ULN2002AN
ULN2003AJ
ULN2003AN
ULN2004AJ
ULN2004AN
ULN200SAJ
ULN200SAN

TI
TI
TI
TI
TI
TI
TI
TI
TI
TI

ULN-2001R
ULN-2001A
ULN-2002R
ULN-2002A
ULN-2003R
ULN-2003A
ULN-2004R
ULN-2004A
ULN-200SR
ULN-200SA

ULN-2209V

ULN2064NE
ULN206SNE
ULN2066NE
ULN2067NE

TI
TI
TI
TI

ULN-2064B
ULN-206SB
ULN-2066B
ULN-2067B

ULN2068

MOT

ULN-2068B

ULN2068NE
ULN2069NE
ULN2074NE
ULN207SNE

TI
TI
TI
TI

ULN-2068B
ULN-2069B
ULN-2074B
ULN-207SB

ULN-2110A
ULN-2113A

SPR
SPR

ULN-3810A
ULN-21l1A

Competitive
Part
Number

*No longer manufactured. Listed for reference only.

1-14

ULN-2209M*

ULN-221OA
ULN-222SP
ULN-2226A
ULN-2244A
ULN-224SA
ULN-227SP
ULN-2277P
ULN-2281B
ULN-2287A
ULN-2301M

SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR

ULN-381OA
ULN-2211B*
ULN-2224A*
ULN-3812A
ULN-3812A
ULN-2274B*
ULN-2278B*
ULN-3784B
ULN-2289A*
ULN-2300M*

ULN-3006M
ULN-3006T
ULN-3007M
ULN-3008M
ULN-3008T
ULN-3100M
ULN-3101M
ULN-3330Y-2
ULN-390SA
ULS-3006T

SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR
SPR

UGN-3201M
UGN-3019T
UGN-3203M
UGN-3S01M
UCN-3S0lT
UGN-3600M
UGN-3601M
ULN-3330Y
ULN-3914A
UGS-3019T

UPA2001C

NEC

ULN-2001A

GENERAL INFORMATION

Manufacturer

Suggested
Sprague
Replacement

Competitive
Part
Number

Manufacturer

Suggested
Sprague
Replacement

NEC
NEC
NEC
NEC

UlN-2002A
UlN-2003A
UlN-2004A
UlN-4336A*

XR2204CP
XR2205CP
XR6118P
XR6128P

EXR
EXR
EXR
EXR

UlN-2004A
ULN-2005A
UDN-6118A
UDN-6128A

XR1310CP
XR1800P

EXR
EXR

UlN-3810A
UlN-3812A

IN1060

FER

UlN-8160A

XR2001CN
XR2001P
XR2002CN
XR2002P
XR2003CN
XR2003P
XR2004CN
XR2004P
XR2011CN
XR2011CP
XR2012CN
XR2012CP
XR2013CN
XR2013CP
XR2014CN
XR2014CP
XR2201CP
XR2202CP
XR2203CP

EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR
EXR

UlN-2001R
UlQ-2001A
UlN-2002R
ULQ-2002A
UlN-2003R
UlQ-2003A
UlN-2004R
ULQ-2004A
UlN-2011R
ULN-2011A
UlN-2012R
UlN-2012A
UlN-2013R
UlN-2013A
UlN-2014R
UlN-2014A
UlN-2001A
UlN-2002A
UlN-2003A

512
552
554
556
652
654
656

In
In
In
In
In

UHP-491*
UlN-2001A
UlN-2002A
UlN-2003A
ULN-2001A
ULN-2002A
ULN-2003A

FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC
FSC

ULN-2001R
ULS-2001R
ULN-200lA
ULN-2002R
UlS-2002R
ULN-2002A
UlN-2003R
UlS-2003R
UlN-2003A
UlN-2004R
UlS-2004R
UlN-2004A

Competitive
Part
Number
UPA2002C
UPA2003C
UPA2004C
UPC324

9665DC
9665DM
9665PC
9666DC
9666DM
9666PC
9667DC
9667DM
9667PC
9668DC
9668DM
9668PC

*No longer manufactured. Listed for reference only.

1-15

In
In

0

GENERAL INFORMATION

HOW TO ORDER
TO PLACE AN ORDER, obtain price
and delivery, orrequest additional technical
literature, call or write your local sales office
(see inside back cover) or:
From U.S.A. Sprague Electric Co.
Marshall Street
North Adams, MA 01247
(413) 664-4411
Telex: 710-369-1360
From Asia
Sprague World Trade Corp.
Eastern Branch
G.P.O. Box 4289
Hong Kong
3-7440010
Telex: 78043395
From Europe Sprague World Trade Corp.
3 Chemin de Tavernay
1218 Grand Saconex
Geneva, Switzerland
022-98-4021
Telex: 23469

FOR additional technical inR EQUESTS
formation on standard or custom devices
may be sent to the appropriate manufacturing
facility:
For all monolithic integrated circuits except
Hall effect devices,
Sprague Electric Co.
115 Northeast Cutoff
Worcester, MA 01606
(617) 853-5000
Telex: 710-340-6304
For discrete semiconductors and Hall Effect
devices,
Sprague Electric Co.
70 Pembroke Road
Concord, NH 03301
(603) 224-1961
Telex: 710-361-1495

1-16

GENERAL INFORMATION

SPRAGUE FACILITIES
Sprague Electric Company manufactures active
and passive components in 15 locations in the
United States and in five countries in Europe and the
Far East. Headquarters of the Semiconductor Division is in Worcester, Mass. All semiconductor wafer
fabrication is done in the Worcester plant, as are all

services integral to its support. Volume assembly
operations are located both in Worcester and in Manila, Republic of the Philippines. Sales offices and
sales representatives are located throughout the
United States and Canada, Latin America, Europe,
Japan, Africa, and the Far East.

INTEGRATED CIRCUIT OPERATIONS, Worcester, Massachusetts

Sprague Electric is a leading manufacturer of volume integrated circuits serving the consumer, industrial controls, and peripherals markets. Production
process technologies include complementary metalgate MOS, high-voltage and high-current bipolar,
and high-performance bipolar linear. This breadth of
process technology enables Sprague Electric to
manufacture optimal cost-performance integrated
circuits.

Semiconductor Operations

The integrated circuit operation of the Sprague
Electric Semiconductor Division is located in a modern 115,000 square-foot plant in Worcester, Mass.
Discrete components, such as transistors and
diodes, and Hall Effect integrated circuits are manufactured at the division's Concord, N.H., plant,
which occupies 30,000 square feet.

1-17

0

GENERAL INFORMATION

TRANSISTOR OPERATIONS, Concord, New Hampshire

How Integrated Circuits are Shipped

Integrated circuits are shipped in one of these
carriers:
A-Channel Anti-Static Plastic Tubing
TO-220 Plastic Magazine
Individual Plastic Box
Integrated circuit chips are shipped in either unscribed wafer form or individually partitioned in a
plastic box.

Quality Control and Reliability

All critical points in the manufacturing processes
of Sprague Electric integrated circuits are carefully

monitored for compliance to engineering specifications. Electrical tests are made on 100% ofthe parts
by automatic test systems. Lot sampling assures
meeting customer A.Q.L. requirements. Calibration
of test standards and equipment is performed at periodic intervals in order to maintain test accuracy.
Sprague Electric Company conducts a continuing
reliability assurance program to detect deviations in
device characteristics. Test samples are taken at
random from each lot and are subjected to testing
for performance evaluation and specification compliance. Routinely, finished samples are subjected
to all electrical performance tests. A copy of the
quality control inspection plan used for specific integrated circuits is available on request.

GENERAL INFORMATION

ENGINEERING BULLETINS
The information in this data book is equivalent to the Sprague Engineering Bulletins listed below. If an individual bulletin and this data book are
compared, the latest revision takes precedence. For example, data on the
UCN-4805A, described in Chapter 4, supersedes Bulletin 26181, which is
presently in print. If that bulletin is revised to match this data book, it will
carry the 'A' revision letter. If revisions beyond what appear here are later
incorporated, the bulletin would then bear a 'B' revision letter.

0

Part Number

Bulletin Number

Part Number

Bulletin Number

UHC/UHD-400 through 433-1
UHP-400 through 433-1
UHC/UHD-500 through 533
UHP-500 through 533
TPP-I000 and 2000
SG 1526J
ULN-2001A through 2015A
ULS-2001H through 2015H
ULS-2001R through 2015R
ULN-2021A through 2025A
ULS-2021H through 2025H
ULN-2031A through 2033A
ULS-2045H
ULN-2046A
ULN-2046A-l
ULN-2047A
ULN-2054A
ULN-2061M and 2062M
ULN-2064B through 2077B
ULS-2064H through 2077H
ULN-2081A and 2082A
ULN-2083A
ULN-2083A-l
ULS-2083H
ULN-2086A
ULN-2111A
ULN-2140A
ULS-2140H
ULN-2204A
TPQ-2221 and 2222
ULN-2240A
ULN-2241A
ULN-2242A
ULN-2243A

29300.1
29300B
29300.1
29300B
29714A
27466.10
29304C
29304.1B
29034.1B
29304C
29304.1B
29710A
29707
29707

ULN-2249A
ULN-2260A
ULN-2270B and 2270Q
ULN-2280B
ULN-2283B and 2283B-l
ULN-2290B and 2290Q
ULN-2350C and 2351C
ULN-2401A
ULN-2429A
ULN-2430M
ULN-2435A and 2445A
ULN-2455A
TPQ-2483 and 2484
SG 2526J
UDN-2541BIW and UDN-2542BIW
UDN-2580A through 2588A
UDN-2595A
ULN-2810A through 2815A
ULS-2801H through 2815H
ULS-2801R through 2815R
ULN-2821A through 2825A
ULS-2821H through 2825H
UDN-2841B and 2845B
UDN-2878W and 2879W
UTN-2886B and 2888A
TPQ-2906 and 2907
UDN-2935Z
UDN-2949Z
UDN-2950Z
UDN-2952B and 2952W
UDN-2956A and 2957A
UDQ-2956R and 2957R
UDN-2975W and 2976W

27121.10
27119.2
27124.10
27117.11A
27117.21
27110.32
27405
27460
27461
27462
27460.10
27460.10
29711A
27466.10
29317
29316
29320
29304.3A
29304.4A
29304.4A
29304.3A
29304.4A
29314A
29305.10
29401
29711A
29318.3
29318A
29318.3
29319
29309A
29309.1A
29319.10

3P
2P
3P
2P

2P
2P
2P
2P
2P

29712
29708A
29305C
29305C
29305.1
29709
29713

2P

29713

2P

27l02E
29015.210A
29015.210A
27121.50A
29711A
27121.62
27121.61A
27121.60A
27105.1

2P
2P
2P

NOTE: 2P (2nd printing) indicates minor changes and/or corrections not normally affecting device performance.

1-19

2P
2P

2P

2P

2P

2P

GENERAl'INFORMATION

ENGINEERING BULLETINS (Continued)
Part Number

Bulletin Number

Part Number

Bulletin Number

UDN-2981A through 2984A
UDS-2981H through 2984H
TPP-3000
UGN-3013T
UGN/UGS-3019T/U
UGN/UGS-3020T
UGN/UGS-3030T/U
UGN-3040T
UGN/UGS-3075T/U
UGN/UGS-3076T/U
UGN-3201M and 3203M
UGN-3220S
ULN-3310DIT
ULN-3330DITIY
UGN-3501M
UGN-350lT
SG 3526J ,
UGN-3600M and 3601M
UDN-3611M through 3614M
UDS-3611Hthrough 3614H
ULN-3701Z'
ULN-3702Z
ULN-3703Z
ULN-370SM
TPQ-3724 through 3725A
ULN-3784B
TPQ-3798 and 3799
ULN-3804A
ULN-3809A
ULN-381OA
ULN-3B12A
ULN-383BA
ULN-3B40A
ULN-3859A
TPQ-3904 and 3906
TPP-4000
UCN-4202A and 4203A

29310A
29310.1
29714A
27603B
27601B
27602A
27606A
27607
27608
27609
27604
27605
27481
27480B
27500.1
27500
27466.10
27120B
29308
29308.1
27117.31
27117.33
27117.34
27117.23
29711A
27117.12
29711A
27121.52
27109.112
27109.113
27109.114
27121.53
27121.64
27105.10
29711A
29714A
261B4A

UCN-4401A
UCS-4401H
UCN-4801A
UCS-4801H
UCN-480SA
UCN-4807A and 4808A
UCN-4810A
UCS-4810H
UCN-4815A
UCN-4815H
UCN-4821A through 4823A
UCS-4821H through 4823H
NEiSE 5560F and 5560N
NE 556lF
UDN-5703A through 5707A
UDS-5703H through 5707H
UDN-5711M through 5714M
UDS-5711H through 5714H
UDN-5722M
UDN-S732M
UDN-S733M
UDS-5733H
UDN-5742M
UDS-5791H
TPQ-6001 through 6100A
UDN-6116A through 6128R-2
UDN-6138A through 6148A-2
TPQ-6S01 and 6502
UDN-6510AlR and 6S14A1R
TPQ-6600 through 6700
UDN-71BOA through 7186A
ULN-8126A and 8126R
ULQ-B126A and B126R
ULS-8126R
ULN-8160A and B160R
ULS-8160R
ULN-B161M

26180A
26180.1
26180A
26180.1
26181A
26186
26182A
26182.1
26183
26183.1
26185
26185.1
27466A
27466.1
29306
29306.1
29307A
29307.1
29307,2
29307.4
29306
29306.1
29307.4
29315.1A
29711A
29313B
29313B
29711A
29313.3
29711A
29311A
27466.10
27466.10
27466.10
27466A
27466A
27466.1

2P

2P
2P

2P

NOTE: 2P (2nd printing) indicates minor changes and/or corrections not normally affecting device performance.

1-20

2P
2P

2P
2P

2P
2P
2P

2P
2P

2P
2P

2P
2P
2P
2P

NOTES

HIGH-VOLTAGE INTERFACE DRIVERS

SECTION 2 - HIGH-VOLTAGE INTERFACE DRIVERS
Selection Guide ................................... 2-2
UDN-6116A through 6128A Fluorescent Display Drivers ........
UDN-6116R through 6128R-2 Hermetic Display Drivers ........
UDN-6138A through 6148A-2 Fluorescent Display Drivers ......
UDN-6510A and 6510R Display Anode/Grid Drivers ...........
UDN-6514A and 6514R Display Anode/Grid Drivers ...........
UDN-7180A through 7186A Gas-Discharge Segment Drivers .....

2-3
2-3
2-3
2-7
2-7
2-10

See Also:
UHP-500 through 533 Quad Power and Relay Drivers. . . . . . . . .. 3-3
UCN-4821A through 4823A 8-Bit Serial-In, Latched Drivers .... 4-28
Application Notes:
AMonolithic IC Series for Gas-Discharge Displays .......... 2-16
Trends in IC Interface for Electronic Displays ............. 2-22
Reliability of Series UDN-6100A ...................... 2-33

/

2-1

HIGH-VOLTAGE INTERFACE DRIVERS

SELECTION GUIDE TO HIGH-VOLTAGE INTERFACE DRIVERS

Device Type

Absolute Maximum Ratings
lour
Your

Outputs

UHP-500 through 533
UCN-4823A
UDN-61l6A1R
UDN-6116A-I
UDN-6116A1R-2
UDN-6118A1R
UDN-6118A-I
UDN-6118A1R-2
UDN-6126A1R
UDN-6126A-l
UDN-6126A1R-2
UDN-6128A1R
UDN-6128A-l
UDN-6128A1R-2
UDN-6138A
UDN-6138A-2
UDN-6148A
UDN-6148A-2
UDN-6510AlR
UDN-6514A1R
UDN-7180A
UDN-7180A
UDN-7183A
UDN-7184A
UDN-7186A

500 rnA
500 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
-40 rnA
20 rnA
20 rnA
3.25 rnA
2.0 rnA
1.0 rnA

Sink4
Sink 8
Source 6
Source 6
Source 6
Source 8
Source 8
Source 8
Source 6
Source 6
Source 6
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Source 8
Sink8
Sink 8
Sink 8
Sink 8
Sink 8

2-2

100V
lOOV
85 V
ll5V
65 V
85 V
ll5V
65 V
85 V
115 V
65 V
85 V
115 V
65 V
±40V
±30V
±40i[
±30V
200V
140 V
-115V
-115 V
-115 V
-115 V
-ll5V

SERIES UDN-6100A AND UDN-6100R
FLUORESCENT DISPLAY DRIVERS

SERIES UDN-6100A AND UDN-6100R
FLUORESCENT DISPLAY DRIVERS

FEATURES
-Digit or Segment Drivers
-low Input Current
-Integral Output Pull-Down Resistors
-high Output Breakdown Voltage
-Single or Split Supply Operation
UDN-6116*
UDN-6126*

CONSISTING of six or eight NPN Darlington output stages and
the associated common-emitter input stages, these drivers are
designed to interface between low-level digital logic and vacuum
fluorescent displays. All devices are capable of driving the digits
and/or segments of these displays and are designed to permit all outputs to be activated simultaneously. Pull-down resistors are incorporated into each output and no external components are required
for most fluorescent display applications. The highest voltage parts
(suffix A-I) are also used in gas-discharge display applications as
anode (digit) drivers.
Twenty-four standard devices are listed, so that a circuit designer
may select the optimum device for his application. Input
characteristics, number of drivers, package style, and output voltage
are tabulated for each device in the Device Type Number Designation
chart. With any device, the output load is activated when the input is
pulled towards the positive supply (active 'high'). All units operate
over the temperature range of -20°C to +85°C.

UDN·6118*
UDN-6128*

*Always specify complete part number, such as:

UD

N - 6116

L
A -

2

"L'NSTlumoNS: SELECTED VERSION. SEE
TYPE NUMBER DESIGNATION, NEXT PAGE.
PACKAGE: A = PLASTIC DIP
R = CERAMIC DIP

'------_DEVICE TYPE.
------OPERATING TEMPERATURE UNGE. N = -20oe to
L-----FAMILY. UD = DIGITAL DRIVERS

+ssoe
DWG. NO. A-ll,222

UDN·6138*
UDN·61"8*

2-3

SERIES UDN-6100A AND UDN-6100R
FLUORESCENT DISPLAY DRIVERS

DEVICE TYPE NUMBER DESIGNATION
Input 'Compatibility

No. of
Drivers
6

5V TIL, CMOS
8

6
6-15V CMOS, PMOS
8

VOUT
60 V
80 V
110 V
60 V
80 V
110 V
±30 V
±40 V
60 V
80 V
110 V
60 V
80 V
110 V
±30 V
±40 V

No. of
Pins
16
16
16
18
18
18
20
20
16
16
16
18
18
18
20
20

Type Number
Plastic DIP
Ceramic DIP
UDN-6116A-2 UDN-6116R-2
UDN-6116A
UDN-6116R
UDN-6116A-I UDN-6118A-2 UDN-6118R-2
UDN-6118A
UDN-6118R
UDN-6118A-I UDN-6138A-2 UDN-6138A
UDN-6126A-2 UDN-6126R-2
UDN-6126A
UDN-6126R
UDN-6126A-I -UDN-6128A-2 UDN-6128R-2
UDN-6128A
UDN-6128R
UDN-6128A-I UDN-6148A-2 UDN-6148A
-

2.5,---.,.---,---,--,----.,.-----,

ABSOLUTE MAXIMUM RATINGS at TA = +25°C
(Voltages are with reference to ground unless otherwise shown)
Supply Voltage, Vaa (all devices, suffix Aor R) .......................... 85 V
(UDN-6138/48A or R, ref. VEE> ...................... 85 V
(all devices, suffix A-I) ........................... 115 V
(all devices, suffix A-2 or R-2) ....................... 65 V
(UDN-6138/48A-2 or R-2, ref. VEV ................... 65 V
Supply Voltage, VEE (UDN-6138/48 all suffixes) ....................... -40 V
Input Voltage, VIN (all devices) ..................................... 20 V
(UDN-6138/48 all suffixes, ref. VEE) ................... 55 V
Output Current, lOUT .......................................... -40 mA
Allowable Package Power Dissipation, Po ......................... See Graph
Operating Temperature Range, TA ......................... -20 o e to +85°e
Storage Temperature Range, Ts .......................... -55°C to +150°C

z'

o

!;i1.5
"V>
V>

c;

""
~
"-

~ l.0

~
u
«

"~

00

«
~
::::j

«

0.5r---+--+----,

~\

',~

0~0-~-~50~-~-~lOO~-~-1~50

AMBIENT TEMPERATURE, TA IN'C
DWG. tID. A-I1,224

2-4

SERIES UDN-6100A AND UDN-6100R
FLUORESCENT DISPLAY DRIVERS

ELECTRICAL CHARACTERISTICS (over operating temperature range)
Note: All Value. Specified At - Suffix..

=
·v•• =
VI.

A
80

I
80

A·l
110
NA

0
0
·UDN·6138 and UDN·6141
Characlerl.tlc
Output leakage Current
Output OFF Voltage
Output Pull·Oown Current

Output ON Voltage

A·2
60

1·2
60

0

0

I
I

Vohl
Vohl

Appllcabl. D.vlc••
Symbol Ba.lc Part No.
SuHlx
All
All
lOUT
VOUT
All
All
All
A or R
lOUT
A·I
A·2 or R·2
UDN·6ll6/18138
A or R
VOU!
A·I
A·2 or R·2
UDN·6126128/48
A or R
A·I
A·2 or R·2

Input ON Current

liN

Supply Current

laa

UDN·6ll6/18138

All

All
A or R
A·I
A·2 or R·2
A or R
A·I
A·2 or R·2
A or R
A·I
A·2 or R·2
A or R
A·I
A·2 or R·2

UDN-tilz~

UDN·6 I 28/48

VIN = 2.4 V,
lOU! = -25 mA
VIN = 4.0 V,
lOUT = -25 mA
V~ =

All

UDN·6118/38

VIN = 0.4 V
VIN = 0.4 V
Input Open,
VOUT = Vaa

All

UDN·6126128/48

uUI'l-bll~

T••t Condition.

2.4 V
VIN = ~ V
VIN - 4.0 V
VIN - IS V
All Inputs Open
All Inputs 2.4 V
Two Inputs - 2.4 V
All Inputs = 2.4 V
All Inputs = 2.4 V
Two Inputs = 2.4 V
All Inputs - 2.4 V
All Inputs - 4.0 V
Two inputs = 4.0 V
All I~puts - 4.0 V
All Inputs - 4.0 V
Two Inputs - 4.0 V
All Inputs - 4.0 V

Min.

-

450
600
350

77
107
57

77
107
57

-

-

-

LImit.
Typ.
Max.
15
1.0
650
llOO
900
1500
500
775
78
108
58
78
108
58

-

-

Unit.

~
V

A
A
!AA
V
V
V
V
V
V

120
375
130
675

225
650
250
ll50

~

10
5--"2.5
4.0
6.0
2.5
5.5
5.0
2.5
4.0
6.0
2.5
5.5

100
7.5
4.5
6.0
9.0
4.5
8.0
7.5
4.5
6.0
9.0
4.5
8.0

~
rnA
mA
rnA
mA
mA
rnA
mA
mA
rnA
mA
mA
rnA

-

70
100
50
40
30
-40
-30
15
IS
-25

V
V
V
V
V
V
V
V
V
mA

!AA
!AA
!AA

RECOMMENDED OPERATING CONDITIONS
Su pply Voltage

Vaa

UDN-6ll6/181
26128
UDN·6138/48

Input ON Voltage
Output ON Current

..

NOTE: PosItive (negative) current

VEE

UDN·6138/48

VIN

UDN·6ll6/18138
UDN-6126128/48
All

lOUT
IS

5.0
5.0
5.0
5.0
5.0
0
0
2.4
4.0

A or R
A-I
A-2 or R·2
A
A·2
A
A·2
All
All
All

..

defined as gOing Into (coming out of) the specified deVice Pin.

2-5

-

-

-

SERIES UDN-6100A AND UDN-6100R
FLUORESCENT DISPLAY· DRIVERS

PARTIAL SCHEMATIC

One Driver
(All Typ•• )

I NPUTO--.N~-..--~-I

RB

Type (All Suffixes)

UDN·SllS/18/38
UDN·SI2SI28/48

10 kQ
20 kQ

L---+-_<> OUTPUT

125K

30 kQ
20 kQ

GND O---+---+-----i

(UDN-613B/4S' ONl Yl

VEE
DWG.NO. A-IO,592C

TYPICAL MULTIPLEXED FLUORESCENT DISPLAY

SEGMENT SELECT
UDN·611B/28A

~~~~~----------~----------;------~
=4~4=t=====;::::+=~
-~+----,

- -- --

(L-----

VBIAS

OWG. NO. A-IO.261B

2-6

UDN-6S10AlR AND UDN-6S14A/R
HIGH-W~TAGE SOURCE DRIVERS

UDN-651 OA/R AND UDN-6514A/R
HIGH-VOLTAGE SOURCE DRIVERS
FEATURES

EI

• TIL/MOS-Compatible Inputs
• High Output-Breakdown Voltage
.40 rnA Output-Current Capability
• Low Power Dissipation
• Reliable Monolithic Construction

EFFECTIVE INTERFACE for low-level
EASY,
TTL or MOS circuitry and high-voltage loads is
available with Sprague UDN-65IOA IR and UDN6514AIR bipolar integrated circuits. These eightchannel devices drive the anodes of gas-discharge
displays or the grids and anodes of large, multiplexed dot-matrix vacuum-fluorescent display
panels.
Types UDN-6510A and UDN-65IOR supply an
output-voltage swing of up to 100 V with a
maximum VBS of 200 V. Typically, the output is
switched between + 100 V and + 180 V.
Types UDN-6514A and UDN-6514R can switch
output-voltage levels from ground to + 135 V with
appropriate pull-down circuitry and a maximum
supply voltage of + 140 V.
Each device in the series has eight independent
drivers made up of switched constant-current level

shifters and PNP INPN driver stages. Driver inputs
operate with open-drain PMOS or CMOS, or with
open-collector or standard TTL.
Types UDN-651OR and UDN-6514R are furnished in 18-pin dual in-line industrial-grade, hermetically sealed ceramic packages. Types UDN6510A and UDN-6514A are supplied in inexpensive
18-pin dual in-line plastic packages. To simplify
applications designs, all units have input connections
on one side of the package and output pins on the
other. All devices are rated for operation over the
temperature range of -20°C to +85°C.

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
(VREF = GROUND unless otherwise specified)
Supply Voltage, Vaa (UDN-65l0A/R) ................................. 200 V
(UDN-6514A/R) ................................. 140 V
Output OFF Voltage (VREf = Vaa), VOUT (UDN-6Sl0AlR) .................. -100 V
Input Voltage, VIN ••••••••••••••••••••••••••••••••••••••••••••••• 20 V
Output Current, loUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40 rnA
Package Power Dissipation, Po ................................. See Graph
Operating Temperature Range, TA .......................... -20°C to +85°C
Storage Temperature Range, Ts .......................... -55°C to +150°C

2-7

UDN-6510A/R AND UDN-6514A/R
HIGH-VOLTAGE SOURCE DRIVERS

PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
2.5 ....
· ---,-----.----,,----.------,

PARTIAL SCHEMATIC
~

One Driver (All Types)

;;:
~

2. 01----30~+_--_+_--_+_--_+--_I

'"

Q..

Z

o

;::

~ l. 51-_----''''''''"--'''~

on
on

Q
0:

~

Q..

l. 0 ' 1 - - - - + _ - -....

10K
I NP UTo---.N'.I'o---!'--f""""I

'---+---0 OUTPUT

30K

No. A-ll,657

GND 0---+---+---+
25

50
75
100
AMBIENT TEMPERATURE. TA. IN

125

°c
Owg. No. A-ll,658

Caution: The high input impedance of these devices makes them susceptible to static discharge damage associated with handling and testing.
Techniques similar to those used for handling MOS devices should be
employed.

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vaa = 200 V 
-z!>

mA

15
10

-

-

19]
137
120
375
10

-

-

55
55

-

2.4
-

-

-

195
135

-

Units
p.A
p.A
V
V
p.A
p.A
p.A
p.A

-

-

RECOMMENDED OPERATING CONDITIONS
Supply Voltage
Output OFF Voltage
Input ON Voltage
uutput ON Current

VBB

UDN-6510AlR
UDN-6514A/R
UDN-6510AlR
All
All

Reference VBB
Vour
Y'N
lour
NOTE: Negative current is defined as coming out of the specified device pin.

2-8

-

V

UDN-651 OAiR AND UDN-6514AIR
HIGH-VOLTAGE SOURCE DRIVERS

TYPICAL PLASMA GAS-DISCHARGE DISPLAY APPLICATION

EQUIVALENT CIRCUIT

+lBOV

TTL/CMOS DI GI T SELECT

I

+180V

rn=ml~+1l0V

+1l0V

BOV
lllmlf+

+BOV

t~ci!'
":"

TTL/CMOS SEGMENT SELECT

Owg. No. A-ll.656

Dwg. No. A-ll.655

MULTIPLEXED DOT-MATRIX VACUUM-FLUORESCENT DISPLAY APPLICATION
UON-6514A

~ ~--'---"J--,

)>----L!!J

:::>
Cl.

:z
V1

!ill
u

~ ~---..~--, )----\.fU

+l40V
Dwg. No. A-l1.659

2-9

o

SERIES UDN-7180A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS

SERIES UDN·7180A
GAS DISCHARGE DISPLAY SEGMENT DRIVERS

FEATURES
- Reliable Monolithic Construction
- High Output Breakdown Voltage
-low Power
- TTUMOS Compatible Inputs

Dwg. No. A-9640A

Description

Series UDN-7I 80A segment drivers are monolithic high-voltage bipolar
integrated circuits for interfacing between MOS or other low-voltage
circuits and the cathode of gas-discharge display panels.
These drivers reduce substantially the number of discrete components
required with panels (Beckman, Burroughs, Dale, Matsushita, NEC, Pantek, etc) in calculator, clock and instrumentation applications.
The UDN-7183A, UDN-7184A, and UDN-7186A drivers contain appropriate level shifting, signal amplification, current limiting, and output
OFF-state voltage bias. The UDN-7180A driver requires external current
limiting and is intended for higher-current applications or where individual
outputs are operated at different current levels (Le. with alpha-numeric
displays). All inputs have pull-down resistors for direct connection to
open-drain PMOS logic.
These devices provide output currents suitable for display se~ments in a
wide variety of display sizes and number of display digits. Either a fixed
split supply operation or a feedback-controlled scheme is allowed.
Applications

The Series UDN-7180A drivers can be used in a wide variety of lowlevel to high-voltage applications utilizing gas discharge displays such as
those found in calculators, clocks, point-of-sale tenninals, and instruments. Their high reliability combined with minimum size, ease of installation, and the cost advantages of a complete monolithic interface make them
the ideal choice in many applications. A typical application showing the
use of these devices, and their counterpart anode drivers, is shown.

2-10

SERIES UDN-71BOA
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS

ABSOLUTE MAXIMUM RATINGS at + 25°C
Supply Voltage, VKK • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • • • • • • • • -115 V
Input Voltage, VIN . • • • • • • • • • • • • • • • • • . • . • • • . . . . . . . . . • • • • • . . • . • • • • +20 V
Output Current, louT: UDN-7180A ..................................... 20 rnA
UDN-7183A ................................... 3.25 rnA
UDN-7184A .....
. ................... 2.0 rnA
UDN-7186A .................................... 1.0 rnA
Power Dissipation, Po .......................................... 1.13 W'
Operating Temperature Range, TA ........................... -20°C to +85°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
*Oerate at the rate of 9.1

o

mwrc above 25°C

Due to the high input impedance of these devices, they are susceptible to static
discharge damage sometimes associated with handling and testing. Therefore,
techniques similar to those used for handling MOS devices should be employed.

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Output ON Voltage
UDN-7183!84!86A

Symbol

Output ON Voltage
UDN-7180A
Output OFF Voltage

VON
VOff

Output Current

ION

VON

(lliMITING)

Output Current

ION

(lsENSE)

Input High Current

I"

Input Low Current

III

Supply Current

I",

= + 25°C, V = 110 V (unless otherwise specified)
KK

Test Conditions
All inputs at 2.4 V
All inputs at 2.4 V, V", = - 70 V
All inputs at 2.4 V,
ION = 14mA
All inouts at 0.4 V,
Reference V",
All inputs at 2.4 V, V", = -110 V,
Test output held at - 60 V
All inputs at 0.4 V, V", = -110 V,
Test output held at - 66 V
Test input at 2.4 V,
Other inputs at 0 V
Test input at 0.4 V, One input
at 2.4 V, Other inputs at 0.4 V
All inputs at 0V

Test
Fig.
1
1

2

UDN-7180!83A
Min. Typ. Max.
-100 -104 -66 -105 -108 -

UDN-7184A
Min. Typ. Max.
-98 -102 - -65 -

UDN-7186A
Min. Typ. Max.
-97 -100 -63 -

-

-

-

-

-

5
6

-

-

NOTES:
I. All voltage measurements are referenced to pin 9 unless otherwise specified.
2. All voltage measurements made with 10M!! DVM or VTVM.
3. Recommended V" operating range: - 85 to -110 V.
4. Positive (negative) current is defined as going into (coming out of) the specified device pin.

2-11

100

200

-

1
10
-125 -175

-

100

200

-

1
10
-125 -175

-

550

V

-95 -120 -155 -65 -85 -115 - 50 -65 -90

910 1140 1520

440

-

38

-

84

V
V

3A

84

76

-

76
84 UDN-7183A only
1475 1850 2450

4

76

-

Units
V

725

floA
floA

200

floA

1
10
-125 -175

floA
floA

100

SERIES UDN-71S0A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS

TEST CIRCUITS

-I1OV

-110V

DWG. NO. A-973BB

FIGURE 1

DWG. NO. A-9739B

FIGURE3A

FIGURE 2

-110V

-I1OV

DWG. NO. A-9740B

FIGURE3B

FIGURE 4

OPfN

DWG. NO. A-9742B

-I1OV

owe.

FIGURES

FIGURE 6

2-12

110. A-9711S

SERIES UDN-71S0A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS

PARTIAL SCHEMATIC

7110

II

12

(kQ)

(kQ)

350

7113

350

7114

410

25
40

7116

620

10

I
I
I
I
I
I
I
I

700K

27 K

vKK

w

I
I

I

COMMON BIASING NETWORK L O~E_OF....!'I~:!·n3R!::E~ .. -1

Dwg. No. A-9644C

TYPICAL APPLICATION

2-13

o

SERIES UDN-7180A
GAS-DISCHARGE DISPLAY SE.GMENT. DRIVERS

TYPICAL SIX-DIGIT CLOCK·

,,,--,.-",
. -, -,
DCO 04

...,
,..,
......--1
+4--......-....J

..

PM

,- ,-

_, l ,

L

BURROUGHS
~ >C060733CM

:> ~
r-----

-100V>

*
2-14

D'A'G. NO. A-9751A

SERIES UDN-7180A
GAS-DISCHARGE DISPLAY SEGMENT DRIVERS

r~

ON

DIGIT 2

~

ONE SCAN CYCL£

ACTUAL OUTPUT CIRCUITS

"I

EQUIVAL£NT CIRCUITS

"-'I

"'BB

ON

DIGIT 3

ON

118 UDN-611SA-l

01 GIT SWITCH-

-

DIGIT 4
SEG a
SEG
SEG

b

125 K

c

0

125 K
0:-

":"

SEG d
Rl
SEG

e

SEG

f

-v

350 K
(-26V) -

REF - -

-

R2

25 K

SEG 9

a

f/9,b
e/T,c

,-,
1-' ,-,
,=,
-

'£G'

COUNT

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,

HOURS

ro....L. SET I

II

01

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BURROUGHS
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2-20

1l'/.'G,NO.A-97SIA

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

available does not meet the requirements for an ideal
display.
Gas discharge panels are a fine combination of
aesthetics, reliability, low cost, large character size,
multiplexing capability, etc., but have been impacted
to some degree by the lack of an available and inexpensive, totally monolithic interface. The move
toward Ie interface for displays has stifled some
potential-largely in favor of LEOs; although many
applications requiring large characters and/or in
high ambient light turn toward gas panels. The
planar gas discharge display is a long way from obscurity, and the availability of this family of Ies
should open up new areas as well as satisfying
existing systems.

The intent from the inception of this program has
been to produce and provide a standard, inexpensive
and easy to use interface for gas discharge displays.
A great many potential applications exist for these
circuits in consumer and commercial products. From
the calculator and digital clock areas this product
also will find u~e in automotive dashboards, pointof-sale systems, electronic cash registers and scales,
and instrumentation. The market for displays is still
very elastic, and many applications for gas discharge
panels are continuing to appear. The Sprague contribution to this market is this series of state-of-theart interface Ies.

2-21

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

TRENDS IN IC INTERFACE
FOR ELECTRONIC DISPLAYS
Introduction

Display technology was truly set into high gear by the explosion of the electronic calculator
business. Expansion at a phenomenal pace continues, encompassing a multitude of products,
particularly high-volume consumer products (calculators, clocks, games, and watches). Recently, further stimulated by the "microprocessor revolution," with its far-reaching effects,
and the resulting changeover to solid state design from electromechanical, mechanical, fluidic,
or electrical systems, the vistas for displays have expanded well beyond the horizon. Products
have been and are being developed, using microprocessors and displays, that never previously
existed.
To augment this microprocessor revolution, semiconductor manufacturers are developing
many new interface circuits useful wit11 displays, although some of these will not be exclusively for display systems. To accomplish this, the present boundaries of device design,
process, packaging, and electrical parameters will require continual extension and expansion.
Display Buffers

A continuing evolution of standard interface ICs is needed to buffer low-level logic from
high-voltage and/or high-current loads. Some of this buffer development will serve display
systems. Since there already is a broad assortment of buffers (particularly for low- to
medium-current LED applications), the ongoing development in simple or low-order interface
will mainly concentrate upon further reduction in discrete component count, package improvement (particularly for high-current/high-power devices), improvements in device current, voltage, switching speed, and greater reliability.
Figures I, 2, and 3 show some Sprague interface ICs that represent buffer circuits; other
vendors supply similar, or identical, high-current or high-voltage buffers to allow operation of
displays from low-level logic. Two basic changes have occurred relatively recently:
1. Greater use of 18-pin DIPs for eight driver channels (Source Driver, Figure 2).
2. Creation of sourcing functions (Figures 2 and 3; useful for LED, gas-discharge, vacuum
fluorescent, incandescent, and electromagnetic displays, depending upon device
ratings). While further buffer designs are needed (particularly in high-current ( > 2 A)
and high-voltage ( > 100 V) circuits), the main emphasis will be toward the incorporation of logic and control circuitry with output buffers.
Complex Interface

Paralleling (though lagging) the microprocessor LSI revolution is the area of greatest future
for IC display circuits: The need for complex, smart or high-order interface. This will be MSI
to LSI logic (with perhaps some linear functions) combined with suitable output buffers.

2-22

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)
UDN-6116A-l GAS-DISCHARGE DRIVER

J NPUTo-""'-"'V>---r--,-f

L--+---oOUTPUT

RB

125K

GNO~----~-+--~

(UDN-6l3B/4S' ONLY)

VEE

Owg. No. A-9643A

DWG.NO. A-1O.592C

FllurelA

Fllurel.
SERIES UDN-2980 SOURCE DRIVER
v,
ONE OF ElGHT DRIVERS

3 K

OUTPUT

Dwg. No. A·l0,242A

Flgur.2A

Fllure2.

Display interface ICs (similar to the MOS I/O control chips), both custom and standard
product, are becoming available in this category. High-volume applications may justify
custom ICs, but the more general trend will be toward standard, off-the-shelf designs chiefly due to the high costs of developing custom ICs.
The higher voltage displays (gas-discharge, vacuum fluorescent, a-c plasma,. and doc
electroluminescent) may share some circuits (if appropriately planned and designed), particularly in the area of matrix displays. It is difficult to imagine, however, much commonality
between high-current LEDs, high-voltage gas-discharge or a-c plasma, and low-power LCDs,

2-23

o

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

+V

-I

-I

Flgur.3
I· DIGIT II·SEGMENT HIGH· CURRENT LED INTERFACE

although they should share considerably the development of cellular CAD circuit designs.
Basic shift registers, latches and decoders do have considerable commonality.
In Figure 4 is a pinout and logic diagram of the ftrstBiMOS Sprague IC combining logic and
output drive. Although not expressly intended for display applications, this BiMOS (CMOS
logic and bipolar outputs) IC has a great deal of utility to engineers working with lower
voltages and high currents (LEDs, incandescent and electromagnetic displays). Type UCN480lA is a parallel-in Iparallel-out unit composed of eight 'D' latches and eight 350 rnA 150 V
bipolar Darlington outputs.

2-24

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

OUTPUT
ENABLE

OUT,

>_+---lJ!lJ

OUT,

o

OUT.
OUT,
OUT,

OUT,

---..1IIiiiIIIII_ _ _.-

COMMON

DWG.NO. A-IO.49SA

Figure4A

GROUND

OUTPUT
ENABLE
TYPICAL MOS LATCH

TYPICAL BIPOLAR DRIVER
OWG.NO. A-1O.495A

Figure4B
UCN-4801A BIMOS LATCH/DRIVER

More recently, Sprague has designed a serial-in /parallel-out BiMOS interface IC expressly
for use with vacuum fluorescent displays. Figure 5 shows the UCN4810A lO-bit serial-in/
parallel-out interface for use with VF displays; the use of serial data allows 10 output lines,
data in and data out in a standard I8-lead DIP. It makes possible both fewer IC packages and
simpler PC board wiring, although it is slower than a parallel data approach. It uses only a
single pin of the I/O ports.

2-25

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

CLOCK
IN

CK

OATA
IN

IN

10 BIT SERIAL IN PARAllEl OUT
SHIfT REGISTER

•
STROBE
IN

•

OUT

•

10 PARAllEL IN

ST

PARAllEl OUT LATCHES

•

•

•

•

•

•

•

•

•

•

•

•

BLANKING

OUT lOUT 2

OUT 9

OUT 10

FlgureSB
UCN-4810A VF DRIVER BLOCK DIAGRAM

OUT 8 L O " ' - - - ,
OUT7

~

,--,-",,-,

____,

OUT 9

our

10

SERIAL DATA

OUT 6

OUT

SERIAL DATA
IN

BLANKING
OUT 1
OUT 5

~ ~---L.!c'-' OUT 2

Figure SA
UCN·4810A PINOUT

2-26

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

A slightly more recent design for vacuum fluorescent displays is the Sprague UCN-4815A.
This is a 22-lead, 8-bit parallel-in /parallel-out BiMOS unit. The unit may have data inputs and
a strobe bus (see Figure 6). The chip enable /blanking pin provides control of VF buffers. A
power-on-clear is internally incorporated.

o
INPUTS

BLANKING

STROBE

4

Figure 6

UCN-4815A PARALLEL 8-BIT VF INTERFACE

2-27

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

Device Technologies

With the exception of LCD displays (which at least until recently have been largely, if not
entirely, driven by MOS) the display and interface technologies in high-volume use are mainly
associated with bipolar semiconductors; Early display interface ICs (particularly devices such
as the 744 7 and 7448) were aimed at LED technology and represent MSI with modest output
capability. The increasing use of higher voltage displays, multiplexed high-current applications, and the need for greater circuit complexity and low pin count will dictate other
technologies, such as 12L, BiMOS, CMOS/DMOS, and possibly DMOS.

Standard Bipolar

Standard bipolar technology, long associated with TTL or linears (early op amps), appears
very limited in scope for the future. Circuit density and supply power requirements will dictate
other processes for functions beyond the simple MSI level. The advantages of standard bipolar
ICs appear to be in the areas of simple high-current, high-power or high-voltage interface. In
particular, applications requiring the combination of high voltages ( '" 100 V) or multiple
high-current outputs ( '" 2 A) will restrict the logic Icontrol circuitry to a low level. Cost, chip
size and package power dissipation will restrict this circuitry largely to versatile, simple
buffers.

12L

Anticipated to increase significantly is the use of I~ for systems of low to modest voltages
(LEDs through VF). The present limits on2L appear to be limited to applications below the 50to 60-volt level. 12L, with its combination of circuit density, low power and reasonable
switching speeds should make a fine match for LEDs or other low-voltage display applications. For higher voltages ( > 25 or 30 V), prospects the penalty of reduced circuit density may
diminish its cost effectiveness. Some increase in standoff voltage may be afforded by the uses
of cascaded output transistors or process improvements, thus reducing the need to sacrifice
logic density. Without a standard I~ logic family, the main market penetration would appear
to be custom designs although there is a definite opportunity for standard interface for lower
voltage applications, particularly LEDs and vacuum fluorescent.

2-28

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

BiMOS

BiMOS, a combination of CMOS and bipolar for interface ICs, seems to fit a technology
niche of higher breakdown voltages than I~, especially where logic power and supply voltage
range (5 to 15 V) is important. BiMOS or BiFET ICs, which are presently on the market, are
largely related to operational amplifiers, although other uses, such as the Sprague application
of BiMOS to interface, are emerging.
Currently, it is feasible to design and manufacture BiMOS interface with breakdown
voltages in the 80 to 100 V range. With additional time and greater concentration on increasing
BV, it appears that higher voltages ( '" 150 V) for output buffers could be obtained. By
obtaining breakdowns in the 120 V to 160 V range, BiMOS then becomes a viable IC
technology for interface for the higher voltage displays: doc gas-discharge with ±100 to
±130 V; a-c plasma with 160 to 170 V, and glow transfer or doc electroluminescent (DCEL)
opportunities with a range of 120-150 volts.
Switching speeds and output configurations (active pull-down or resistive) are critical to
matrix displays (particularly a-c plasma) with large numbers of drive lines. Adding active
pull-down or pull-up will tend to increase chip size (and cost), thus adding to the potential
overall difficulty of BiMOS with its greater process complexity and slightly longer manufacturing cycle. This does appear to be a very key technology for the near future. Its product niche
will include for applications requiring 60 to 100 V (or more) breakdowns, low-power logic,
wide supply range, modest speeds, and MSI to small LSI.

CMOSIDMOS

Chiefly being carried on by Texas Instruments, CMOS /DMOS display interface appears to
be intended for much of the same display market as BiMOS. Product information now
available indicates 60 to 100 V br~akdown (DMOS outputs), CMOS logic, low to modest
output currents ( s 25 mA), an~ logic speeds to 4 MHz. Designs now being promoted are
targeted toward a-c plasma and vacuum fluorescent panels.
Two apparent disadvantages now appear to exist:
1. Logic operates from 12 V ±1O% (may be done to provide maximum speed).
2. Output drive current is insufficient for high-current displays (without 100 mA, or
more, the larger matrix panels will use discretes or another technology).
These shortcomings may be modified with time, although it is doubtful if 500 mA to 1 A
DMOS outputs are practical.

2-29

D

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

Dielectric Isolation

Affording the highest breakdown voltage capability of present technologies is dielectric
isolation. Since there is no collector-to-substrate PN junction, nor a collector-to-isolation wall
PN junction, considerable improvement in collector-to-base and collector-to-emittervoltage is
possible. Additionally, transistor sizes are considerably smaller than their PN-isolated counterparts. The dielectrically isolated devices offered by Dionics span a spectrum of approximately 100 volts to 280 volts (a-c plasma driver). DI affords the maximum breakdown voltage
capability currently available.
Opposing this great advantage in breakdown voltage, however., is the increased process
complexity of dielectrically isolated les. Definite improvements are needed in the area of
process simplification, cost reduction, and alternate sources. Large-volume use of DI circuits
will be restrained until these problems (particularly alternate sources) can be overcome. DI
interface, with its potential for 300 V transistors, has a great promise if the barriers can be
overcome.

Packaging

Semiconductor design and process have greatly outstripped packaging currently in use,
particularly in the area of power-handling capability. Greater concentration and resources are
required to solve some of the following display interface related problems:
1. DIP power dissipation.
2. Greater number of leads (and smaller package sizes).
3. Improved plastic DIP resistance to moisture and corrosive environments.
4. Lower package manufacturing costs.
5. Smaller module or display subassemblies.

2-30

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

Power dissipation difficulties (strobed high currents) are most associated with LEDs. Use of
very low duty-cycle and bright LEDs (particularly alphanumeric and matrix) dictates a need for
multiplexing with peak currents as high as 3 A. Nothing currently on the market exceeds
1.75 A per output, and DIP ratings preclude d-c operation at such currents. However, many of
the high-current applications are within the capability of standard bipolar ICs now offered.
For LSI ICs containing many I/O lines, the 24-,28-, and 40-lead DIPs are standard. Since
package size and cost increase together, it may be desirable to constrain many newer ICs to
18-,20-, or 22-lead DIPs (with 0.300" spacing, 22 also in use with 0.450" width). Printed
wiring board real estate is increasingly dictating smaller size. Solutions such as the quad in-line
(Rockwell) or less than 0.100" centers are possible. There are problems associated with a
non-standard configuration (lack of sockets and higher prices) and the smaller physical size
will not aid the quest for higher power (LEDs).
Improvements in plastic DIP moisture resistance and reliability are already underway; uses
of tri-metal schemes (such as RCA's), silicon nitride or quartz passivation will continue to
improve resistance to moisture and corrosive fumes. For display applications, these reliability
improvements are of greatest concern in high-voltage devices.
Lower package costs are necessary to further increase the use of ICs in areas such as flat
panel matrix displays. Currently, much of the cost of such a system is related to drive
electronics, and much of the cost of the interface is the assembly cost of the DIPs (or hybrids).
Increased use of automated assembly, film-carrier techniques and solder bumps will enhance
the choice of ICs over discretes, and flat panel over CRT.
Also of concern is the possible mating of IC chips, solder-bump chips, or film-strip chips
into the display assembly. Candidates for such a treatment would include d-c and a-c plasma,
LEDs (already being done to a degree), DCEL, ACEL, LCD, and VF. Panel technologies
using thick or thin-film techniques could benefit from such an approach. The biggest barrier to
such an integrated assembly is the market data needed to justify tooling and lead time. It will
only require one manufacturer willing to be a pioneer to further swing display technology into
integrated systems. Prospects for purchasing a display complete with all drive electronics,
such as a flat panel a-c plasma matrix (chips mounted via hybrid techniques on the rear of the
glass envelope), are improving with time.

2-31

D

HIGH-VOLTAGE INTERFACE DRIVERS (Continued)

Summary

A bright future exists for IC interface in display systems; the combination of logic (from
MSI to small LSI) with suitable output buffers will further assist display designs. The
following IC Technology-Display Interface matrix lists the key characteristics and primary
display applications of various semiconductor technologies. Since many of these characteristics are changing, the table lists the device characteristics either now available or for the near
future.
The most dynamic technologies for the immediate future appear to be BiMOS; I2L,
CMOSIDMOS, and, perhaps soon, DMOS. Sprague, Dionics, RCA, Texas Instruments,
National Semiconductor, and others are using these device technologies to carve market niches
where suitable. The dynamics of the IC market make for an uncertain future for any supplier of
display circuitry unable or unwilling to continue the technological advancement necessary to
meet the changing demands of the display market.

IC TECHNOLOGY - DISPLAY INTERFACE

Technolos~

Breakdown V

Linear Process 10 to -170 V
Bipolar

Output I

Speed

jc ••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• 40°C/W
Junction to still air, cI1•.•..•.....•..••••....•...•........•.....•.....•........•.••..•..•...•....•.. " .•.•. 6Q°C/W
"<1>;. of 60·C/W permits operation of four outputs continuously and simultaneously at 250mA with a junction temperature which will not exceed +150·C(·)
at a +85·C ambient.
.I

At manufacturer's option, these devices may be marked with the original Series UHP-400,
UHP-400-1, or UHP-500 part numbers and/or part numbers in the new Series UDN-0400A,
UDN-0400A-l, or UDN-0500A, respectively. Similar devices using the original and new part
numbering systems are identical in all respects. For example: UHP-40S is exactly the same
as the UDN-040BA.

3-4

SERIES UHP-400, UHP-400-1 AND UHP-SOO
POWER AND RELAY DRIVERS

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"1" Inout Volta2e
"0" Input Voltage
"0" Input Current at all Inputs
exceot Strobe
"0" Input Current at Strobe
"1" Input Current at all Inputs
except Strobe
"1" Input Current at Strobe

V'

1

VinO
1'0/01

hn 0
l'n(l )
I;n(l )

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

Limits
Output

MAX
MAX
MAX
MAX
MAX
MAX

Min.

Typ.

Max.

Units

2.0

MIN
MIN
0.4V
0.4V
2.4V
5.5V
2.4V
5.5V .

-0.55

4.5V
4.5V
OV
OV
OV
OV

-1.1

0.8

V
V

-0.8
-1.6
40
1
100
1

rnA
rnA
!LA
rnA
"A
rnA

Notes

2
2
2

SWITCHING CHARACTERISTICS at Vcc= 5.0V, TA = 25°C
Characteristic

Symbol

Turn·on Delay Time
Series UHP·400
Series UHP·400·1
Series UHP·5oo
Turn·off Delay Time
Series UHp·4(J0
Series UHp·4oo·!
Series UHP·500

tpdO

tpdl

Test Conditions
CL-1SpF
Vs = 40V, RL = 2650 (6 Watts)
Vs = 70V, RL = 4650 (10 Watts)
Vs = 10OV, RL = 6700 (15 Watts)
CL-1SpF
Vs = 40V, RL = 2650 (6 Watts)
Vs = 70V, RL = 4650 (10 Watts)
Vs.. = lOOV, RL = 6700 (15 Watts)

Min.

Typ.

Limits
Max.

Units

200

500

ns

3

3.00

750

ns

3

NOTES:
1. Typical values are at Vee = 5.0V, TA = 25°C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

INP!)T PULSE CHARACTERISTICS
V'n(OI = OV
Vln(l) = 3.5V

tf = 7ns
t, = 14ps

3-5

tp = l!Ls
PRR = 500kHz

Notes

SERIES UHP-400, UHP-400-1 AND UHP-SOO
POWER AND RELAY DRIVERS

Type UHP·400, UHP-400-1, and UHP-SOO
Quad 2-lnput AND Power Drivers

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic

Limits

Vee

Driven
Input

loll

MIN

2.0V

2.0V

40V

SO

p.A

loll

MIN

2.0V

2.0V

70V

SO

-E.A

loll

MIN
MIN
MIN
MAX
MAX

2.0V
0.8V
0.8V
S.OV

2.0V
V"
V"

100V
ISOmA
2S0mA

SO
O.S
0.7

p.A
V
V
mA
mA

Symbol

"I" Output Reverse Current
Type UHP-400
"I" Output Reverse Current
Type UHP-400-1
"I" Output Reverse Current
Type UHP-SOO
"0" Output Voltage

Von

"I" Level Supply Current
"0" Level Supply Current

Icwi
IcC(o)

Temp.

NOM
NOM

OV

Other
Input

Output

Min.

Typ.

S.OV
OV

Max.

4
17.S

6
24.5

Units

Notes

12
1,2

NOTES:
1. Typical values are at Vcc = 5.0V, TA = 25°C.
2. Each gate.
3. Capacitance values specified include probe and test fixture capacitance.

INPUT 2AV

VCC=5V

OUTPUT Vs

rtR~

--;

INPUT
10%

I
I

,,
,
I

'pd'

,
I

OUTPUT

CIRCUIT I
'- ______ .J
MO.

1

'1

'pdO

L

',._ _ _ _.,~ __ --Vout(1)

50%

•

A~7e760

V;n(OI

,

~
I

I

~"G.

10%
Jr-.;.;;.;;;..----

,
,

I

SO%

Voot(OI

OWG, 110. A-7628C

3-6

SERIES UHP-400, UHP-400-1 AND UHP-SOO
POWER AND RELAY DRIVERS

Type UHP-402, UHP-402-1, and UHP-S02
Quad 2-lnpul OR Power Drivers

II
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Test Conditions
Driven
Input
Vcc

Other
Input

Output

loff

MIN

2.0V

OV

40V

50

/'A

Symbol

Temp.

Limits
Min.

Typ.

Max.

Units

"I" Output Reverse Current
Type UHP-402
"I' Output Reverse Current
Type UHP-402-1
"1" Output Reverse Currerit
Type UHP-502
"0" Output Voltage

loff

MIN

2.0V

OV

70V

50

/,A

loff
Von

OV
0.8V
0.8V
5.0V
OV

50
0.5
0.7

ICCIII
ICCIOI

2.0V
0.8V
0.8V
5.0V
OV

lOOV
lSOmA
250mA

"I" Level Supply Current
"0" Level Supply Current

MIN
MIN
MIN
MAX
MAX

/'A
V
V
rnA
rnA

NOM
NOM

4.1

6.3

18

25

Notes

1,2
1,2

NOTES:
I. Typical values are at Vcc = 5.0V, TA = 25°C.
2. Each gate.
3. Capacitance values specified include probe and test fixture capacitance.

INPUT

VCC=5V

OUTPUT

Vs

- - --,

INPUT

Rl

~JO%;.;:;.._ _ _ _ Vin(O)
I

I

'pdJ

I

OUTPUT

\

'1

.,.....----.-t

'pdO

J~_ _ _........ '

lO%

50%

L:::::~:
DW6. No. A-7628C

O\llG. NO. A-7877B

3-7

SERIES UHP-400, UHP-400-1· AND UHP-500
POWER. AND RELAY DRIVERS

TJlle UHP-403, UHP-403-1, and· UHP-503
Quad OR Relay Drivers

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Test Conditions
Driven
Input
Vee

Other
Input

Output

loll

MIN

2.0V

OV

Symbol

Temp.

"I" Output Reverse Current
Type UHP·403
"I" Output Reverse Current
Type UHp·403·1
"I" Output Reverse Current
Type UHP·503
"0" Output Voltage

loll

MIN

2.0V

loli
Von

Diode leakage Current
Diode Forward Voltage Drop
"I" level Supply Current
"0" level Supply Current

ILK
VD
leen
lee(o)

MIN
MIN
MIN
NOM
NOM
MAX
MAX

2.0V
O.SV
O.SV
OV
Vee
5.0V
OV

NOM
NOM
NOM
NOM

limits
Min.

Typ.

Max.

Units

40V

100

p.A

OV

lOV

100

p.A

OV
O.SV
O.SV
OV
Vee
5.0V
OV

lOOV
150mA
250mA
OPEN

100
0.5
0.7
200
1.75
6.3
25

I'A
V
V

1.5
4.1
IS

Notes

3
4
I 2
1,2

p.A

V
mA
mA

NOTES:
1. Typical values are at Vee = 5.0V. T.. = 25°C.
2. Each gate.
3. Diode leakage current measured at VR = Voff(mln).
4. Diode forward voltage drop measured at I, = 200mA.
5. Capacitance values specified include probe and test fixture capacitance.

INPUT

vee: sv

OPEN OUTPUT

Vs

.--- ----I
I

RL

...;-~_;-'-+

i

INPUT

F::!..----V;n(D)

I
I

I
. lSpF

I
I

I

]Note5)1

I

,:,LOAD I

L.:'~~'!. J

DWG.MO,A-9123"

,
tpd 1
OUTPUT

I

--r---"'I
'

1 " - - -...1- tpdO

l'-sO%-'---s-O%.....L
- - --V
' ou t(1)
•

Vout(O)
OWG.1l0. A-7628C

SERIES UHP-400, UHP-400-1 ANDUHP-SOO
POWER AND RELAY DRIVERS

Type UHP-406, UHP-406-1, and UHP-S06
Quad AND Relay Drivers

II
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"I" Output Reverse Current
Type UHP·406
"I" Output Reverse Current
Type UHP-406-1
"I" Output Reverse Current
Type UHP-506
"0" Output Voltage
Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
Vo
lee(1)
Ice(o)

Temp.

Vee

Test Conditions
Driven
Other
Input
Input

limits
Min.

Output

Typ.

Max.

Units

loff

MIN

2.0V

2.0V

40V

100

uA

loti

MIN

2.0V

2.0V

70V

100

p.A

loff
Von

MIN
MIN
MIN
NOM
NOM
MAX
MAX

2.0V
O.SV
O.SV
OV
Vee
5.0V
OV

2.0V
Vee

100V
150mA
250mA
OPEN

100
0.5
0.7
200
1.75

,.A
V
V
,.A
V
rnA
rnA

NOM
NOM
NOM
NOM

Vrr

OV
Vee
5.0V
OV

1.5
4
17.5

6
24.5

Notes

3
4
1,2
1,2

NOTES:
1. Typical values are at Vee ~ 5.0, TA ~ 25°C.
2. Each gate.
3. Diode leakage current measured at VR ~ Vofl(m;n).
4. Diode forward voltage drop measured at II ~ 200mA.
5. Capacitance values specified include probe and test fixture capacitance.

INPUT

2.4V VCC=5V

r ----.,
Rl

INPUT

10%

~10%::.:::..

____

V;n(O)

I
15pF

INol.5)
'2

Ipdl

LOAD

O_U_T_PU_T_ _ _

CIRCUIT J
'- _____

r----ot'l- IpdO

~ r----5-0%.,L::::~:

DWG. aD. 0\-7C7811

OWO.lla.II-762.8C

3-9

SERIES IIHP·400, UHP·400·1 AND UHp·500
POWER AND RELAY D~IVERS

Type UHP-407, UHP-407-1, and UHP-S07
Quad NAND Relay Drivers

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Cha racte tistic

Symbol

Temp.

Test Conditions
Driven
Input
Vee

Other
Input

Limits
Output
40V

"I" Outvut Reverse Current
Type UHP-407
"I" Output Reverse Current;
TVDe UHP-401-1
"I" Output Reverse Current
Type UHP-S07
"0" Output Voltage

loff

MIN

O.SV

Vcc

I .

MIN

O.SV

Vcc

loff
Von

Diode Leakage Cu rrent
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
Vo
lee(lI
lee(o)

MIN
MIN
MIN
NOM
NOM
MAX
MAX

O.SV
2.0V
2.0V
Vee
OV
OV
SV

Vcc
2.0V
2.0V
Vee
OV
OV
SV

NOM
NOM
NOM
NOM

Min.

Typ.

Max.

Units

100

I'A

70V

100

I'A

looV
ISOmA
250mA
OPEN

100
O.S
0.7
200
I.7S
7.S
26.S

,.A
V
V
I'A
V
rnA
rnA

I.S
6
20

Notes

4
S
1,2
1,2

NOTES:
I. Typical values are at Vee = S.OV, TA = 2SD C.
2. Each ~ate.
3. Capacitance values specified include probe and test fixture capacitance.
4. Diode leakage current measured at VR = Vofl(mln).
S. Diode forward voltage drop measured at " = 200mA.

INPUT

2.4V VCC=-5V 0 EN

o~;:

Vs

r~----l

I,

_

tC

--"10..
"'....

I

'(ooI-lf
"

tP

~'10%

v.In(O)

I

I

I

IpdQ

I

I

!

_

Jt: ~\r-------- -VI~1)

-lo-ot

INPUT

'L

11'>'--0\-'

15pF

}NOle3)

: -=

OUTPUT
LOAD

'--_....J._ - - - - - -

IL.. ____
CIRCUIT
_

ow",

Vou,(O)

DWG. 110. A-1900A
MO. '\-7809A

3-10

SERIES UHP-400, UHP-400-1 AND UHP-SOO
POWER AND RELAY DRIVERS

Type UHP-408, UHP-408-1, and UHP-S08
Quad 2-lnput NAND Power Drivers

o
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Limits

Test Conditions
Driven
Input
Vcc

Other
Input

Output

loff

MIN

0.8V

Vcc

40V

50

p.A

Symbol

Temp.

Typ.

Min.

Max.

Units

"I" Output Reverse Current
Type UHP·408
"I" Output Reverse Current
Type UHP-408·1
"I" Output Reverse Current
Tv De UHP·5OB
"0" Output Voltage

'oft

MIN

0.8V

Vcc

70V

50

p.A

I ,If
Von
!cerl)
Icero)

O.BV
2.0V
2.0V
OV
5.0V

Va
2.0V
2.0V
OV
5.0V

100V
150mA
250mA

"I" Level Supply Current
"0" Level Supply Current

MIN
MIN
MIN
MAX
MAX

50
0.5
0.7
7.5
26.5

"A
V
V
rnA
rnA

NOM
NOM

6
20

Notes

1,.2
1,2

NOTES:
1. Typical values are at Vcc = 5.0V, h = 25'C.
2. Each ~ate.
3. Capacitance values specified include probe and test fixture capacitance.

INPUT 2.4V

OUTPUT Vs

tr ~

INPUT

,

I
I

_ _~10%~

I

50%

I..-

I

I

I

t-+-tf
% 9O'lb-t-. - - - - - - - - - -V1n (1)

~
:

'pdO

50%

tp

I

19%

---:

Vin(O)

'

I

---1-

1"-1'

, - - - - VQut(l)

15pF

(Note 3)
OUTPUT

':' LOAD

CIRCUIT
L __
____

J
OWG.NO . .1.-1900.1.

0\116. No. A-9638

3-11

SERIES UHP-400, UHP-400-1 AND UHP-500
POWER AND RELAY DRIVERS

Type UHP-432, UHP-432-1, and UHP-S32
Quad 2-lnput NOR Power Drivers

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Test Conditions
Driven
Input
Vce

Other
Input

Output

loff

MIN

0.8V

0.8V

40V

50

loff

MIN

0.8V

O.BV

70V

50

~

loff
Von

MIN
MIN
MIN
MAX
MAX

0.8V

0.8V
uV
OV
5.0V
OV

100V

50
0.5
0.7
25
7.5

p.A
V
V
rnA
rnA

Symbol

Temp.

"I" Output Reverse Current

Type UHp·432
"I" Output Reverse Current
Type UHp·432·1
"I" Output Reverse Current
Type UHP-532
"0" Output Voltage
"0" level Supply Current

"I" level Supply Current

NOM
NOM

!cCIOI
ICCI1I

~.uv

2.0V
5.0V
OV

limits
Min.

Typ.

Max.

l~umA

250mA
20

6

Units

Notes

~

12
1,2

NOTES:
1. Typical values are at Vcc = 5.0V. TA = 25"C.
2. Each gate.
3. Capacitance values specified include probe and tesi fixture capacitance.

ooTINpUT

Vcc=5V

PUT

Vs
tr

Rl

19% 150%
---''''''--''
r--'P

:
I
I

"t-I--tf

~~

VinO)

ro\'O!

-----l ,.,.,...'------

Vin(O)

I

I

'pdO

I
lSpF

Jt% r----------

---*"-t

INPlIl

"'I'---..f-'

~--Vout(1)

I

I(Note31 :

OlllPlIl

-=- LOAD:
CIRCUIT I
L ____
J

~---I.- - - - - - -

Vout(O)

OWG. 110. 4-1900.

DWG. "0.A-7902A

3-12

SERIES UHP-400, UHP-400-1 AND UHP-500
POWER AND RELAY DRIVERS

Type UHP-433, UHP-433-1, and UHP-S33
Quad NOR Relay Drivers

o
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Test Conditions
Driven
Input
Vcc

other
Inpur

Output

loff

MIN

O.SV

O.SV

40V

1.11

MIN

O.SV

O.SV

1.11
Von

MIN
MIN
MIN
NOM
NOM
MAX
MAX

O.SV
2.0V
2.0V
Vee
OV
OV
5V

O.SV
OV
OV
Vee
OV
OV
5V

Symbol

Temp.

"I" Output Reverse Current

Type UHp·433
"I" Output Reverse Current
T~pe UHp·433·1
"I" OUtput Reverse Current
Type UHp·533
"0" Output Voltage
Diode leakage Current
Diode Forward Voltage Drop
"I" level Supply CUrrent
"0" level Supply Current

NOM
NOM
NOM
NOM

ILK
VD

Icc I
KeelO)

limits
Min.

Typ.

Max.

Units

100

iJA

70V

100

iJA

lOOV
150mA
250mA
OPEN

100
0.5
0.7
200
1.75
7.5
25

~

1.5
6
20

Notes

V
V
iJA
V
mA
mA

3
4

I 2
1,2

NOTES:
1. Tvpical values are at Vee = 5.0, TA = 25°C.
2. Each gate.
3. Diode leakage current measured at VR = V.lllmin).
4. Diode forward voltage drop measured at If = 200mA.
5. Capacitance values specified include probe and test fixture capacitance.

INPUT

Ve C=5V • OPEN

OUTPUT

Vs

--

--,

Rl

:

:
F
--.. . . . . r--'P
tr~

INPUT

I

I

19%

'pdO

lSpF I

I

19% _ _ _ _ Vin(O)
--! ~3-I

~
I

CNote5):

-

SO%

I

,

I

I

500/0

I

I

~tf

"
9O%:xi
--- ---- - - - Vin(l)
I

I

1-"1'--.), - - - Vout(1)

I
I

-LOAD I

OUTPUT

_~~~I~_J

--- - -- -

DWG. NO. A-!)l3SA

ow.

3-13

Vout(O)

110. A-1900A

SERIES ULN~2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS
HIGH-VOLTAGE,HIGH-CURRENT
T HESE
Darlington arrays are comprised of seven silicon
NPN Darlington pairs on a common monolithic substrate. All units have open-collector outputs and integral diodes for inductive load transient suppression.
Peak inrush currents to 600 rnA (Series ULN2000A and ULN-2020A) or 750 rnA (Series ULN20 lOA) are permissible, making them ideal for driving tungsten filament lamps.
Series ULN-2001A devices are general purpose
arrays that may be used with standard bipolar digital
logic using external current limiting, or with most
PMOS or CMOS directly. All are pinned with outputs opposite inputs to facilitate printed wiring board
layout and are priced to compete directly with discrete transistor alternatives.
Series ULN-2002A is designed for use with 14 to
25 V PMOS devices. Each input has a Zener diode
and resistor in series to limit the input current to a
safe value in that application. The Zener diode also
gives these devices excellent noise immunity.
Series ULN-2003A has a 2.7 kil series base
resistor for each Darlington pair, allowing operation
directly with TTL or CMOS operating at a supply
voltage of 5 V. These devices will handle numerous
interface needs - particularly those beyond the
capabilities of standard logic buffers.
Series ULN-2004A has a 10.5 kil series input
resistor that permits operation directly from CMOS
or PMOS outputs utilizing supply voltages of 6 to
15 V. The required input current is below that of
Series ULN-2003A, while the required input voltage
is less than that required by Series ULN-2002A.
Series ULN-2005A is designed for use with
standard TTL and Schottky TTL, with which higher
output currents are required and loading of the logic

O\"G. 110. A-959~

output is not a concern. These devices will sink a
minimum of 350 rnA when driven from a "totem
pole" logic output.
Series ULN-2000A is the original high-voltage,
high-current Darlington array. The output transistors
are capable of sinking 500 rnA. and will sustain at

Type Number

3-14

General Purpose
PMOS, CMOS

ULN-2001A

ULN-2011A

ULN-2021A

14-25 V
PMOS

ULN-2002A

ULN-2012A

ULN-2022A

5V
TIl, CMOS

ULN-2003A

ULN-2013A

ULN-2023A

6-15 V
CMOS, PMOS

ULN-2004A

ULN-2014A

ULN-2024A

High-Output
TIl

ULN-2005A

ULN-2015A

ULN-2025A

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

All Series ULN-2000A Darlington arrays are furnished in a 16-pin dual in-line plastic package. These
can also be supplied in a hermetic dual in-line package for use in military and aerospace applications.

least 50 V in the OFF state. Outputs may be paralleled for higher load-current capability. Series
ULN-201OA devices are similar, except that they
will sink 600 rnA. Series ULN-2020A will sustain
95 V in the OFF state.

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
for any.one Darlington pair
(unless otherwise noted)
Output Voltage, VCE (Series UlN-2000, 201OA) ........................... 50 V
(Series UlN-2020A) ................................ 95 V
Input Voltage, Y'N (Series UlN-2002, 2003, 2004A) ........................ 30 V
(Series UlN-2005A) ................................. 15 V
Continuous Collector Current, Ic (Series UlN-2000, 2020A) ................ 500 mA
(Series UlN-2010A) ..................... 600 mA
Continuous Input Current, liN' ...................................... 25 mA
Power Dissipation, Po (one Darlington pair) ............................. 1.0 W
(total package) ................................ 2.0 W·
Operating Ambient Temperature Range, TA .................... -20°C to +85°C
Storage Temperature Range, Ts ........................... -55°C to + 150°C
"Derate at the rate of 16.67 mW/'C above +25'C.
Under normal operating conditions, these devices will sustain 350 rnA per output with VCE(SATJ
with a pulse width of 20 ms and a duty cycle of 34%.

ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
2.0
\:EVICE LIMIT

,

........on
«

3:
?;

\

1.5

Z
0
;::

«

"-

~
0

'"w
~"-

\

\

1.0

\

()

"(I.

«

\'b

'"«

o

u

"-

w

--'

~

,

\~

a,s

'"«

\

3:
0

--'

;t

-",

\\
0

o

50

100

AMBIENT TEMPERATURE IN

°c

150

OWl). No. A-9753C

3-15

= 1.6 V at +70'C

o

SERIES lILN-2()()OA
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

Series ULN-2001A
(each driver)
r--t+--~ COM

PARTIAL SCHEMATICS

·

i·
··
J

J

___ I

Olllli, hO.

Series ULN-2003A
(each driver)

Series ULN-2002A
(each driver)
,--;~-oCOM

7V
J
J

I

r--lM--oCOM

.
t

10. SK

··
t________________

~

___ _

A-95~'i

..
i

2.7K

I

I
I

J

---~

___ II

D'II6.lIo.o\-9651

DWt'I.lIo, .\-06S0

Series ULN-200SA
(each driver)

Series ULN-2004A
(each driver)

r--lM--oCOM

,--;~-oCOM

.
t

10.SK

l.OSK

·
··
J

··
I

I
I

t ________________

___ JI

owo.

~

___ _

h'o.,IIO.A-IO.228

liD. A-9898A

3-16

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

SERIES ULN·2000A
ELECTRICAL CHARACTERISTICS AT +25°C (unless otherwise noted)
Characteristic
Output Leakage Current

Symbol

1m

Test
Fig.
IA

IB
Collector-Emitter
Saturation Voltage

VeEISAT)

2

Input Current

IINION)

3

Input Voltage

IINIOFF)
VINION)

4
5

hFE

2

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

CIN
t plH
t pHl
IR
VF

Applicable
Devices
All

Test Conditions
VeE = 50 V, TA = 25°C
VeE = 50 V, TA = 70°C
ULN-2002A VeE = 50 V, TA = 70°C, VIN = 6.0 V
ULN-2004A VeE = 50 V, TA = 70°C, VIN = 1.0 V
Ie = 100 rnA, 18 = 250 fJ-A
All
Ie = 200 rnA, 18 = 350 fJ-A
Ie = 350 rnA, 18 = 500 fJ-A
ULN-2002A VIN = 17 V
ULN-2003A VIN = 3.85 V
ULN-2004A VIN = 5.0V
VIN = 12 V
ULN-2005A VIN = 3.0 V
All
Ie = 500 fJ-A, TA = 70°C
ULN-2002A VeE = 2.0 V, Ie = 300 rnA
VeE = 2.0 V, Ie = 200 rnA
ULN-2003A V" = 2.0 V, I = 250 rnA
VeE = 2.0 V, Ie = 300 rnA
VeE = 2.0 V, Ie = 125 rnA
ULN-2004A V" = 2.0 V, I, = 200 rnA
V" = 2.0 V, I = 275 rnA
VCF = 2.0 V, Ie = 350 rnA
ULN-2005A VeE = 2.0 V, Ie = 350 rnA
ULN-200IA VeE = 2.0 V, Ie = 350 rnA

6

All
All
All
All

7

All

-

-

0.5 Ein to 0.5 Eout
0.5 Ein to 0.5 Eout
VR= 50 V, TA = 25°C
VR= 50 V, TA = WC
IF = 350 rnA

3-17

Limits
Min. Typ. Max.
50
100
500
500
0.9 1.1
1.1 1.3
1.3 1.6
0.82 1.25
0.93 1.35
0.35 0.5
1.0 1.45
1.5 2.4
50 65
13
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4
1000 -

15
25
0.25 1.0
0.25 1.0
50
100
1.7 2.0

Units
fJ-A
fJ-A
fJ-A
fJ-A
V
V
V
rnA
rnA
rnA
rnA
rnA
fJ-A
V
V
V
V
V
V
V
V
V

pF
fJ-s
fJ-s
fJ-A
fJ-A
V

o

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

SERIES ULN·2010A
ELECTRICAL CHARACTERISTICS AT +25°C (unless otherwise noted)
Cha racteristic
Output Leakllge Current

Symbol
ICEl(

Test
Fig.
lA

Applicable
Devices
All

18

ULN-2012A
ULN-2014A
All

Collector-Em itter
Saturation Voltage

VCElSATI

2

Input Current

IINIONI

3

4

Input Voltage

I[NIIIFFI
VINIONI

5

ULN-2012A
ULN-2013A
ULN-2014A
ULN-2015A
All
ULN-20l2A
ULN-2013A

ULN-2014A

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forwaro Voltage

2

hFE
CIN
tPLH
tpHL
IR
VF

-

6
7

ULN-2015A
ULN-2011A
All
All
All
All
All

Test Conditions
VCE = 50 V, TA = 25·C
VCE = 50 V, TA = 70·C
VCE = 50 V, TA = 70·C, VIN = 6.0 V
VCE = 50 V, TA = 70·C, VIN = 1.0 V
Ic = 200 mA, I = 350/LA
Ic = 350 mA, 18 = 500/LA
Ic = 500 mA, 18 = 600 pA
VIN = 17 V
VIN = 3.85 V
VIN = 5.0 V
VIN = 12 V
VIN = 3.0 V
lk = 500 /LA, 1. = 70·C
VCE = 2.0 V, Ic = 500 mA
k = 2.0 V,I~ = 250 mA
VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 500 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ic = 500 mA
VCE = 2.0 V, I~ = 500 mA
VCE = 2.0 V, Ic = 350 mA
VCE = 2.0 V, Ic = 500 mA
0.5 Ein to 0.5 Eout
0.5 Ein to 0.5 Eout
VR= 50 V, TA = 25·C
VR= ~O V, TA = 70·C
IF = 350 mA
IF = 500 mA

3--18

Limits
Min. Typ. Max. Units
pA
50
- 100 /LA
500
/LA
500
/LA
1.1 1.3
V
1.3 1.6
V
1.7 i.9
V
0.82 1.25 mA
0.93 1.35 mA
0.35 0.5
mA
1.0 1.45 mA
1.5 2.4
mA
50 65 pA
17
V
V
- 2.7
- - 3.0 V
3.5
V
- - 7.0 V
8.0
V
9.5
V
2.6
V
1000 900 pF
15
25
0.25 1.0
/LS
0.25 1.0
/Ls
50
pA
100
pA
1.7 2.0
V
V
2.1 2.5

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

SERIES ULN·2020A
ELECTRICAL CHARACTERISTICS AT +25°C (unless otherwise noted)
Characteristic
Output Leakage Current

Collector-Emitter
Saturation Voltage
Input Current

Input Voltage

SYmbol
ICE)(

Test
Fig.
1A

Applicable
Devices
All

18

ULN-2022A
ULN-2024A
All

2

VCEISAT)

3

IINION)

4
5

liN OFF
VINION)

ULN-2022A
ULN-2023A
ULN-2024A
ULN-2025A
All
ULN-2022A
ULN-2023A

ULN-2024A

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

2

ULN-2025A
ULN-2021A

6

All
All
All
All

7

All

hFE
CIN
tpLH
t pHL
IR
VF

-

1000 -

0.5 Ein to 0.5 Eout
0.5 EIn to 0.5 Eout
VR= 95 V, TA = 25°C
VR= 95 V, TA = 70°C
IF = 350 mA

-

3-19

Min.

limits
Typ. Max.
50
100
500
500
0.9 1.1
1.1 1.3
1.3 1.6
0.82 1.25
0.93 1.35
0.35 0.5
1.0 1.45
1.5 2.4
65 13
2.4

Test Conditions
VCE = 95 V, TA = 25°C
VCE = 95 V, TA = 70°C
VCE = 95 V, TA = 70°C, VIN = 6.0 V
VCE = 95 V, TA = 70°C, VIN = 1.0 V
Ic = 100 mA, 18 = 250/LA
Ic = 200 mA, 18 = 350/LA
Ic = 350 mA, 18 = 500/LA
VIN = 17V
VIN = 3.85 V
VIN = 5.0 V
VIN = 12 V
VIN =3.0V
Ic = 500/LA, TA = 70°C
VrL = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 250 mA
VCE = 2.0 V, Ic = 300 mA
VCE = 2.0 V, Ic = 125 mA
VCE = 2.0 V, Ic = 200 mA
VCE = 2.0 V, Ic = 275 mA
VCE = 2.0 V, Ic = 350 mA
V" = 2.0 V, I, = 350 mA
VCE = 2.0 V, Ic = 350 mA

-

-

-

-

-

50
-

-

2.7

-

3.0
5.0
6.0
7.0
8.0
2.4
-

-

-

-

-

-

-

-

15
0.25
0.25
1.7

25
1.0
1.0
50
100
2.0

Units
/LA

!LA
!LA
/LA
V
V
V
mA
mA
mA
mA
mA
/LA
V
V
V
V
V
V
V
V
V

pF
/LS
/LS
/LA

!LA
V

o

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

OPEN

VCE

OPEN

VeE

TEST FIGURES

FIGURE 1A

OPEN

FIGURE 1B

OPEN

OPEN

VCE

»--''----0 OPEN

OWG. MO. A-Q732

OW:.>. 110. A-9731

FIGURE 2

FIGURE 3

OPEN

FIGURE 4

VR

IF

OPEN

VIN

owe.

KG. A-9735A

[)W6.MO.A-973I1A

FIGURE 5

FIGURE 6

3-20

FIGURE 7

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
U6oor------r-----,r_----,-----~--------r_----_r----_,r_----~----~----~

J-!

'b

'"

~

"-I

.....
«
«

.....

«
«

E

E

~ 400

~

.....

Z
w
""""

zw

""""

a

:)

u

II

0""
.....
u
w
-'
-'

a

0
u

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

a

'"«
w

0-

20

40

60

100

80

PER CENT DUTY CYCLE
Dwg.No. A-9752B

COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT

COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE

,, ,

600
600

,,'

.Y

,~

I

<0:
E

Z 400

....

,

~
'"::>
u
1'\

"

~

V

,,'<

~l~}p~

g

~'<

"

ou

~

~,

o

o

0,5

.."

j,'

4

V

1.0

E 400
Z

.....

,, ,

3S
gz

o.....
~
ou

'\-'

200

1.5

SATURATION VOLTAGE - VCE (SAD

l41

/

o

/

,2:"',-

=>
u

, ,~A~f

200

,,

i",

~,

I

«

':#,0":.p"

;.~i"

y

o

"

I.' /

/

VL

V

/

V

MAXIMUM REQUIRED
INPUT CURRENT

200
400
INPUT CURRENT IN ~A - liN
[)WG.

DWG. NO. A-97SI!.B

3-21

/

/

~Q.

600
A- 10, 872A

SERIES ULN-2000A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS

INPUT CURRENT
AS A FUNCTION OF INPUT VOLTAGE

SERIES ULN-2002A
2.5

2.0
Z

,

~~

«

e 1.5

/~

~

....
Z

~

~

1.0

~

~
~

~,,-

~ ,"

:;)

U

....

SERIES ULN-2003A

0.5

V

..,-

,
~V\c."~- "

z

r--Y--,--,---,--,---,r--,---.

2.0 r--t---t--+--r-_
----:......""'-+_-_1

,

~ 1.5 ~-+--+---t---t:.JII""-/--::f:

..i-,r-'

1-

~

a

.-'-

~

1.0

r--t---t.~~~... I"~_I--r--+_-_1

0.5 r-~~~i'to"u:..:.+--+­

z
12

14

16

18

20

22

26

24

0~~~--,~-~-~~_7~~~--,~--,~
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0

INPUT VOLTAGE - V IN

INPUT VOLTAGE - VIN

0... NO. A-9757A

OW:;. KO. A-975!i8

SERIES ULN-200SA
3.5 r - - - y - - - , - - , - - . . , ............-,

3.0

SERIES ULN-2004A

I-_+_......__+-_~~--I

z

2 . 5 1 - - + -......---\jl\~M~--I

~
::1

1.5 ~--t--.,..w.NO.A-9766A

(SIMILAR TO UlN-2064B THROUGH UlN-2067B)

ELECTRICAL CHARAOERISTICS at + 25°C (unless otherwise noted)
Characteristic
Output leakage Current

Symbol
IcEx

Test
Fig.
I

Applicable
Devices
UlN-2074176B
UlN-2075177B

Output Sustaining Voltage

VCEISUS)

2

Collector-Emitter
Saturation Voltage

VeEiSAT)

3

Input Current

4

I'NION)

UlN-2074/76B
UlN-2075177B
All

UlN-2075177B
UlN-2074175B
UlN-2076177B

Input Voltage

Turn-On Delay
Turn-Off Delay

5

V'.(QN)

tpLH
tpHL

-

UlN-2074175B
UlN-2074B
UlN-2075B
UlN-2076177B
UlN-2076B
UlN-2077B
All
All

3-29

Test Conditions
VcE =50V
VCE = 50 V, TA = 70°C
VcE =80V
VCE = 80 V, TA = 70°C
Ie = 100 rnA, Y'N = 0.4 V
Ie = 100 rnA, Y'N = 0.4 V
Ie = 500 rnA, Is = 625 ).LA
Ie = 750 rnA, Is = 935 ).LA
Ie = 1.0 A, Is = 1.25 rnA
Ie = 1.25 A, I, = 2.0 rnA
Ie = 1.5 A, Is = 2.25 rnA
V,. = 2.4 V
V,. = 3.75 V
V,. = 5.0 V
Y'N = 12 V
VeE = 2.0 V, Ie = 1.0 A
VeE = 2.0 V, Ie = 1.25 A
VeE = 2.0V, Ie = 1.5A
VeE = 2.0 V, Ie = 1.0 A
VeE = 2.0 V, Ie = 1.25 A
VeE = 2.0 V, Ie = 1.5 A
0.5 Ein to 0.5 Eou'
0.5 Ein to 0.5 E,.,

Min.
-

-

35
50

-

-

1.4
3.3
0.6
1.7

-

-

-

-

limits
Max.
100
500
100
500

1.1
1.2
1.3
1.4
1.5
4.3
9.6
1.8
5.2
2.0
2.5
2.5
6.5
10
10
1.0
1.5

Units
).LA
).LA
).LA
).LA
V
V
V
V
V
V
V
rnA
rnA
rnA
rnA
V
V
V
V.
V
V
).Ls
).LS

ULN-2061M THROUGH ULN-2077B
1.S A DARLINGTON SWITCHES

TEST FIGURES
OPEN

VCE

OPEN

OPEN

IC

0IIIG.1IQ.IO.3SO

1Mi. 110. A-IO.3119

Figure 3

Figure 2

Figure 1

OPEN

OPEN

>0--''---0 OPEN

DWG.1I0. "9732

Figure 4

Figure 6

Figure 5

Vs

OPEN

IF

OWG.MO. A-IO,3!i1

Figure 8

Figure 7

3-30

ULN-2061M THROUGH ULN-2077B
1.S A DARLINGTON SWITCHES

PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE

uJr

DEjCE

\''\ \.

""'"

,"

~

.....

~

'"

"~
~

NUMBER OF OUTPUTS
CONDUCTING

~~
~
2

"'" ......

.......... ..........

i"--r-..
..... -.... -...

---

I

SIMULTANEOUSLY

UIN-2 M THRrGH IN-201'

o

°0~---L--~20~~--~4~0--~--~6~0--~---a~0--~---,oo~
PERCENT DUTY CYCLE

ao

60

100

Dwg. No. A-lO,360A

liMIT

DEVIC

"' \."'",,

"

1.0

Vv

g~

f'

.......
.......

V~

,,"'

~

.....

NUMBER OF OUTPUTS

0.5

~ .......

~ ~ r-....

"

"'~

n

40

PERCENT DUTY CYCLE

~

~fj

20

lJwg. No. A-IO.356

1.5

~
g

o

CONDUCTING

-

.........

..........
r-- -.... -...

SIMULTANEOUSLY
UiN-20M THROUGH UlN-2077'

g~

"'
40
60
PERCENT DUTY CYCLE

20

1.5

~

~
:;

~

"'~

0.5

""

........

~

1.0

:li

DEvJE LIM)
~ 1"-0...

-

~g~~~RC~J~~UT~TS
_

2 .........

r--..

~ ~ """- r-..

--... -...

"

SIMULTANEOUSLY
UlN-2D64 THROUGH UlN-2077B
WljH STAVERV-S HEAT SINK

l5

20

0

::J

V

g

LIM)

f' ................. r--.....

~

~

1.0

~a->

4

~o

O~

V:;

;~

'"

NUMBER OF OUTPUTS
CONDUCTING

,,~

O:w

I

1

~ r---.....

~ r--....
..........

i"--r-..

SIMULTANEOUSLY
UlN-2064 THROUGH UlN-2077B

0.5

WITH(TAVER V-7 HEAT SINK
27 .~OC/N

I

~"'
"Z
g-

C;W

40

100

DEVI1E
1.5

1

......... .......
.....
4

ao

Dwg. No. A-IO,361

I

o:
60

PERCENT DUTY CYCLE

ao

100

Dwg. No. A-IO,398A

3-31

20

40

60

PERCENT DUTY CYCLE

aD

100

Dwg. No. A-1O.400A

o

ULN-2061M THROUGH ULN-2077B
U A DARLINGTON SWITCHES

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE (Continued)

DE CE UMI1T

1.5

"

" ""

.... ~

~
~

""-

2 ....

'EVICELMIT

1.5

I

'\
I"

"""

........

" r--- ~
)- ""'r-.....
3

........

NUMIER OF OUTPUTS

CONDUCTING I
SIMULTANEOUSLY

~

~

I

.......
~

~~

""
""r-- ::::

OUT~I~

NUMSI(. OF
CONDUCTING

~I~=~~~GH ~LN-2077-B

ULN-206' THROUGH ULN-2017B

WITH STAVERV-7HEAT jlNK
27.S o C/W

.......

~

-I

WITH STAvER V-8 HEAT SINK

37rC/W
60
PERCENT DUTY CYCLE

20

80

100

60

20

PERCENT DUTY CYCLE

Dwg. No. A-IO.399A

80

100

0Wg. No. A-IO.401A

COLLECTOR CURRENT AS A FUNCTION OF INPUT CURRENT AT +25°C

.... ."..---..

ULNLM
UlN-2065/678
ULN. 2015

7 V........-..

5

~ /(

I. 0

f

,f,~

#'

~

I
I

5

o

o

/

1.5

/

UlN-2061M
UlN-2064!668
UlN-2cr74/168

V-

,;

Jf

II-~
4.>'
N'~

r--

I
o
1.0

2.0
INPUT CURRENT IN ",A - 18

3.0

/
o

/

~

~

50
INPUT CURRENT IN

DW\I. No. A·10.35IlA

3-32

100
~A

• IB

150

ULN-2061M THROUGH ULN-2077B
1.5 A DARLINGTON SWITCHES

INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE AT +25°C

I.

r-----r---~----~----~--_,----~~~

12
UlN-2066/678
UlN-2076/778

~

10 ~____~__~--~~--__~~~-----+--~

_?o

....

/
./

./

~
3.0

2.5

2.0

1.5

5.0

3.5

INPUT VOLTAGE - V,N

Dwg. No. A-IO.3638

1. 4

UlN-1068I69B

1.0

c(

JY

0.8

E

~
a

....

0.1

/
o

1.5

/
.;1
1.0

/

1.5

:;~~-

......

~>--

~

~~~

~

12
Dwg.NIl. A-IO,3S7B

+V

/'

/'

/
3.0

3.5

INPUT VOLTAGE - VIN

4.0

4. 5

9. o----{IJ-I

5.0

oW';!. No.A·12,306

DWG.NO.A-lO,859

BIDIRECTIONAL MOTOR CONTROL

3-33

~~

~~

10
INPUT VOLTAGE - VIN

+V

./

/

0.4

.

~~

UlN-2061/62M

,,/

0.6

~
~

!?i

/

--

/

TYPICAL APPLICATION

/
/

I. 1

0

~

~~

"".......... ........~.-

,.." ,

p

~

o

ULN·2061M THROUGH ULN·2077B
1.5 A DARLINGTON SWITCHES

TYPICAL APPLICATIONS (Continued)

ULN-2074j76B
ULN-2061M

DWG.ItD.B--1361l

COMMON·ANODE LED DRIVERS
(Series UDN-2980A devices can be used in similar applications at currents of up
t0500mA)

D'IIG. MO. 11+1365

COMMON·CATHODE LED DRIVERS
(Types ULN-2068/70B are also applicable)

3-34

UDN-2541BIW AND UDN-2542B/W
QUAD NAND-GATE POWER DRIVERS

UDN·2541 B/w AND UDN·2542B/w
QUAD NAND·GATE POWER DRIVERS

FEATURES
•
•
•
•
•

TIL, CMOS, PMOS, NMOS Compatible
1.5 AContinuous Output Current
Efficient Input/Output Pin Structure
Low Output Saturation Voltage
SN75437NE Equivalent

GROUND
GROUND

NAND LOGIC GATES and highCOMBINING
current bipolar outputs, the four power and

INZ

relay drivers in this series can provide interface between low-level signal-processing circuits and
medium-power loads in extremely harsh environments. Each of the four independent outputs of these
devices can sink up to 1.5 A in the ON state.

Dwg_ No. A-ll,561

UDN-2S41B
UDN-2S42B

Type UDN-254IB/W and UDN-2542B/W integrated circuits differ only in output-voltage ratings
and high-current saturation limits. Types UDN2541B and UDN-254IW are rated at 60 V and
1.25 A. Types UDN-2542B and UDN-2542W are

o

o
....
=>
0

rated at 1.0 A with a breakdown voltage of greater
than 80 V. All devices have a minimum output sustaining voltage of 35 V. Inputs are compatible with
most TTL, DTL, LSTTL, and 5 V to 15 V CMOS
and PMOS logic.
Types UDN-254IB and UDN-2542B are supplied
in 16-pin dual in-line packages with heat-sink contact tabs. This configuration enables easy attachment of an inexpensive heat sink and fits a standard
integrated circuit socket or printed wiring board layout. The outputs include transient suppression
diodes for inductive loads such as relays, solenoids,
and d-c and stepping motors.

z

~

z

u
U

>

~

."

«
z

.....

Z

'" Z " ....
=>"
0
Owg.

;z

....

0

0

Types UDN-254IW and UDN-2542W, with
higher power-dissipation ratings, are in 12-pin single
in-line power-tab packages that allow efficient attachment of external heat sinks for maximum allowable package power dissipation. The tab is at ground
potential and needs no insulation. These devices are
used to drive high-current incandescent lamps,
LEDs, heaters, and (with external transient suppression) high-voltage inductive loads.

c
~
=> =>

'"

'"
No. A-ll,797

UDN-2S41W
UDN-2S42W

3-35

D

UDN-2541 B/W AND UDN-2542B/W
QUAD NAND-GATE POWER DRIVERS

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
Output Voltage, VeE (UDN-2541BIW)
. . . . . . . . . . . . . . . . .. 60 V
(UDN-2542BIW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 80 V
Output Current, louT ..................
. . . . . . . . . . . . . . . . .. 1.5 A
Supply Voltage, Vee. . . .. .................... . . . . . . . . . . . .
. . .. 18 V
Input Voltage, V,N . . . . . . . . . . . . . . . • . . . . . . . . .
. . . . . . . . . . . . . . . .. 18 V
Power Dissipation, Po (Each Driver). . . . . . . . . . . . . . . . . .
2.5 W
(Total Package) .............................. See Graph
Operating Temperature Range, T,. . . . . . . . . . . . . .
. . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts . . . . . . . . . . . . . . . . . . . . .. ... - 55°C to + 150°C

RECOMMENDED OPERATING CONDITIONS
Supply Voltage Range, Vee. . . . . . . . . . . . . . . . .
Input Voltage, V,NOI . • • • . . . . . • .

VINIOI ·

. . . . . . . . .. 4.5 Vto 7 V
2 Vto 7 V
• • • . . . . • . . •.
<0.8 V

. . . . . • . • • • .

. . . . • • • • . • • • • • . . . • • . . . . . • • • . . . .

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
UDN-2541B
UDN-2542B

UDN-2541W
UDN-2542W

......
en

en

1=

=

15

"-

2'0

5

>=

;t

"OUT

SUB

pWG.NO.A-ll.359

DWG.NO.A-ll.358

ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vrs= 0 V, VlEE = - 45 V (unless otherwise noted)
Cha racteristic
Output leakage
Current

Symbol
IcEx

Applicable
Devices
UDN-2580A
UDN-2580A-l

Output Sustaining
Voltage
Output Saturation
Voltage

VCEISATi

UDN-2580A
UDN-2580A-l
Both

Input Current

I'NIONI

Both

Input Voltage

I'NIOfFI
V'NION)

Both
Both

V'NIOfFI
IR

Both
UDN-2580A
UDN-2580A-l
Both

Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage
Input Capacitance
Turn-On Delay
Turn-Off De lay
NOTES: 1.
2.
3.
4.
5.

VCEISUSI

VF
C'N
tPHl
tPlH

Both
Both
Both

Test Conditions
V'N = ~0.5 V, Vo T = VEE = -50 V
V'N - -0.4 V, VOUT = VEE = -50 V, TA = 70°C
V'N = -0.5 V, Vou! = VEE = -80 V
V'N = -0.4 V, VOUT = VEE = -80 V, TA = 70°C
V'N = - 0.4 V, loUT = - 25 rnA, Note 1
V'N = -0.4 V, VEE = -75 V, lOUT = -25 rnA, Note 1
V'N = -2.4 V, lno. = -100 rnA
V'N = -3.0 V, louT = -225 rnA
V'N = -3.6 V, louT = -350 rnA
V'N = -3.6 V, loUT = -350 rnA
V'N - -15 V, loUT - -350 rnA
loUT = -500 MA, TA = WC, ,Note 3
louT = -100 rnA, VCE ,;;1.8 V, Note 4
loUT = -225 rnA, VCE 51.9 V, Note 4
loUT = -350 rnA, VCE 52.0 V, Note 4
loUT = -500 pA, TA = 70°C
V. = 50 V, TA = 70°C
VR= 80 V, TA = 70°C
IF = 350 rnA

0.5 E'N to 0.5 EOUT
0.5 E'N to 0.5 EoUT

Pulsed test, tp 5300 MS, duty cycle ,;;2%.
Negative current is defined as coming out of the specified device pin.
The I'NIOFFI current limit guarantees against partial ,turn-on of the output.
The V'NIONI voltage limit guarantees a minimum oufput source current per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs.
3-40

Min.
-

-

35
50
-

-

-50
-

Limits
Max.
50
100
50
100

1.8
1.9
2.0
-500
-2.1

-2.4
-3.0
-3.6

-0.2

-

-

50
50
2.0

-

-

25
5.0
5.0

Units
pA
pA
pA
pA
V
V
V
V
V
pA
rnA

!iA
V
V
V
V
pA
pA
V
pF
p.S
p.S

SERIES UDN-2S80A 8-CHANNEL SOURCE DRIVERS

UDN·2585A
ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vs = 0 V, VEE = - 20 V (unless otherwise noted)

Characteristic
Output Leakage
Current

Symbol
ICEX

Test Conditions
VIN
VIN

Output Sustaining
Voltage

VCE(SUS)

VIN

Output Saturation
Voltage

VCE(SAT)

Input Current

IIN(ON)

=
=
=

-0.5 V, Vom
-0.4 V, Vom
-0.4 V, lOUT

= VEE = -25 V
= VEE = -25 V, TA =
= -25 rnA, Note 1

Clamp Diode
Leakage Current

IR

= -4.6 V, loUT = -60 rnA
= -4.6 V, 10m = -120 rnA
VIN = -4.6 V, 10m = -120 rnA
VIN = -14.6 V, lOUT = -120 rnA
lOUT = -120 rnA, VCE sl.2 V, Note 3
10m = -100 pA, TA = 70 C
VR= 25 V, TA = 70 C

Clamp Diode
Forward Voltage

VF

IF

Input Capacitance
Turn-On Delay

CIN
tpHl

Turn-Off Delay

tPlH

Input Voltage

VIN(ON)
VIN(OFF)

NOTES: I.
2.
3.
4.

limits
Max.

Units

-

50
100

pA
pA

15

-

V

-

1.1
1.2

V
V

-

-1.6
-5.0

rnA
rnA

-

-4.6

V
V

Min.

VIN
VIN

D

70 D C

-0.4

-

-

50

pA

-

2.0

V

-

25

pF

0.5 EIN to 0.5 Eom

-

5.0

f-tS

0.5 EIN to 0.5 EoUT

-

5.0

f.LS

D

= 120 rnA

Pulsed test, tp s300 f-tS, duty cycle "'2%.
Negative current is defined as coming out of the specified device pin.
The VIN(ON) voltage limit guarantees a minimum output source current per the specified conditions.
The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs.

+VS

7.2K

PARTIAL SCHEMATIC

48K

'---+--oQUT

SUB
OWG.NO.A-ll,JbO

OWG.NO.A-ll.J59

3-41

D

SERIES UDN-2580A 8-CHANNEL SOURCE DRIVERS

UDN-2588A
UDN-2588A-l
+Vs

Vee

7.2K

I.o---/IN'.......-I

PARTIAL SCHEMATIC

10K

UK

3K

L.....--+--oooT
SUB
IlIIG.NO.A-I1.361

DWG,ND. A-U.3S7

ELECTRICAL CHARACTERISTICS at TA = +25°C,
Vs = 5.0 V, Vee = 5.0 V, VEE = -40 V (unless otherwise noted)
Characteristic
Output Leakage
Current

Symbol

Applicable
Devices

IcEX

UDN-2588A
UDN-2588A-1

Output Sustaining
Voltage

VCE(SUS)

UDN-2588A
UDN-2588A-1

Output Saturation
Voltage

VCE(SAl)

Both

Input Current

Input Voltage

Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

I'N(oN)

Both

I'N(OFF)

Both

V'N(ON)

Both

V'N(OFF)
IR

Both
UDN-2588A
UDN-2588A-1

Test Conditions

= VEE = -45 V
= VEE = -45 V, TA = 70°C
= VEE = -75 V
= VEE = -75 V, TA = 70°C
V'N "'4.6 V, lOUT = -25 rnA, Note 1
V'N "'4.6 V, VEE = -70 V, louT = - 25 rnA, Note 1
V,. = 2.6 V, loUT = -100 rnA, Ref. Vcc
V'N = 2.0 V, louT = -225 rnA, Ref. Vcc
V'N = 1.4 V, louT = -350 rnA, Ref. Vcc
V'N = 1.4 V, louT = -350 rnA
Vs = 15 V, VEE = -30 V, V'N = 0 V, loUT = -350 rnA
lOUT = -500 A, TA = 70°C. Note 3
loUT = -100 rnA, VCE :;;1.8 V, Note 4
louT = -225 rnA, VCE :;;1.9 V, Note 4
lOUT = -350 rnA, VCE 52.0 V, Note 4
loUT = -500 pJ., TA = 70°C
VR - 50 V, TA = 70°C
VR = 80 V, TA = 70°C
IF = 350 rnA
V'N
V'N
V'N
V'N

"'4.5 V,
"'4.6 V,
"'4.5 V,
"'4.6 V,

VOUT
VOUT
VOUT
VOUT

Limits
Max.

Units

-

50
100
50
100

pJ.
pJ.
pJ.
pJ.

35
50

-

V
V

-

-

1.8
1.9
2.0

V
V
V

-

-500
-2.1

pJ.
rnA
pJ.

Min.

-

-

-50

-

-

2.6

V

-

2.0
1.4

4.8

-

V
V
V

-

-

50
50

pJ.
pJ.

-

2.0

V

VF

Both

Input Capacitance

C'N

Both

-

25

pF

Turn-On Delay

tPHL
tpLH

Both

0.5 E'N to 0.5 EoUT

-

5.0

p,s

Both

0.5 E'N to 0.5 EoUT

-

5.0

p,s

Turn-Off Delay

NOTES: 1. Pulsed test, tp :;;300 p,s, duty cycle 52%.
2. Negative current is defined as coming out of the specified device pin.
3. The I'N(OFF) current limit guarantees against partial turn-on of the output.
4. The V'N(ON) voltage limit guarantees a minimum output source current per the specified conditions.
5. The substrate must always be tied to the most negative point and must be at least 4.0 V below Vs.
6. Vcc must never be more positive than Vs.
3-42

SERIES UDN-2S80A 8-CHANNEL SOURCE DRIVERS

ALLOWABLE PEAK COLLECTOR CURRENT
AT 500 C AS A FUNCTION OF DUTY CYCLE
so 0
4S 0

40 0

3S

o

RECOMMENDED MAXIMUM OUTPUT CURRENT

'

\ \\ \ ""-

30 0

\~"l'"
"0

2S 0

'"
~

......

20 0

NUMBER OF OUTPUTS'" B
CONDUCTING
SIMULTANEOUSLY

01

Vs = 15V
UDN-2580A
UDN·2588A

~ .......
'"
......... i'-.... r-..
~ .......

.......:: ~ ~ i'-....

r--.. r::::

lS

10

.....

~

I

I

0

0

10

20

30
I

so

40

60

70

BO

90

100

PER CENT DUTY CYCLE
Jwg. No. A·ll.l:..;7B

ALL OWABLE PEAK COLLECTOR CURRENT
AT 70 0 C AS A FUNCTION OF DUTY CYCLE
SOO

4S0

400

,
"
I\,\~l"

RECOMMENDED MAXIMUM OUTPUT CURRENT

3S0

\ l\\ \

300

2S0

]

o
o

Vs = ISV

UDN-25BOA
UDN-2588A

10

20

3'...

~

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

lS0

so

"-

"-...

~ ~ ~ i'-...... "'-i"o...
~ :::-::: ~ ~ ~
.......
~
~
-....

200

100

"'-..,

I
30

40

:::::

50

60

70

BO

90

100

PER CENT DUTY CYCLE
Jwq. ",0. A-ll.IOB8

3-43

o

SERIES

UDN~2S80A

8-CHANNEL SOURCE DRIVERS

TYPICAL APPLICATIONS
UDN-2580A-i

DWG.NO.A-11,35b

COMMON·CATHODE LED DRIVER

TELECOMMUNICATIONS
RELAY DRIVER
(Negative Logic)

UON-2588A-l

UON-2588A

SEGMENT
SELECT

111

01 GIT
SELECT

-48V
VEE
DWG.rw. A-ll,363
DWG.NO. A-1I.362

TELECOMMUNICATIONS RELAY DRIVER
(Positive Logic)

VACUUM FLUORESCENT DISPLAY DRIVER

(Split Supply)

3-44

UDN·2595A 8·CHANNEL CURRENT·SINK DRIVER

UDN·2595A
a·CHANNEL CURRENT-SINK DRIVER

FEATURES

II

• 200 rnA Current Rating
• Low Saturation Voltage
• TTL, CMOS, NMOS Compatible
• Efficient Input/Output Pin Format
• 18-Pin Dual In-Line Plastic Package

DEVELOPED for use with low-voltage LED and
incandescent displays requiring low output saturation voltage, Type UDN-2595A meets many
other interface needs, including those exceeding the
capabilities of standard logic buffers.

Dwg. No. A-l1,407

The eight non-Darlington outputs of this driver
can simultaneously sink load currents of 200 rnA at
ambient temperatures of up to +85°C.
The eight-channel driver's active low inputs can
be linked directly to TTL, Schottky TTL, DTL, 5 to
16 V CMOS, and NMOS logic. All input connections are on one side of the package, output connections on the other, for simplified layout of printed
wiring boards.
Type UDN-2595A is supplied in an I8-pin dualin-line plastic package with a copper lead frame that
maximizes the driver's power-handling capabilities.
A hermetically sealed version of Type UDN-2595A,
with reduced package power dissipation ratings, is
available on special order.
This device complements Sprague Type UDN2585A, an eight-channel source driver.

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for anyone driver
(unless otherwise noted)
Output Voltage, VCE ........................... 20 V
Supply Voltage, Vs ............................ 20 V
Input Voltage, VIN ............................. 20 V
Output Collector Current, Ic ................... 200 rnA
Ground Terminal Current, IGND .................... 1.6 A
Allowable Power Dissipation, PD
(single output) . . . . . . . . . . . . . . . . . . . . . . . . .. 1.0 W
(total package) ......................... 2.2 W·
Operating Temperature Range, TI ........ -20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to + 150°C
"Derate at the rate of 18 mW/'C above + 25'C.

3-45

UDN-2S9SA 8-CHANNEL CURRENT-SINK DRIVER

ELECTRICAL CHARACTERISTICS at YA = + 25°C. Vs = 5.0 V (unless otherwise noted).
Characteristic
Output Leakage
Current
output Saturation
Voltage
Input Current
Input Voltage
Input Capacitance
Supply Current

Symbol
IcEx
VCE(SATI
IIN(ON)
VINON
VIN(OFF)
CIN
Iss

Test Conditions
VIN ,,4.5 V, VOIIT = 20 V, TA = 25°C
VIN "4.6 V, VOIIT - 20 V, TA - 70°C
VIN - 0.4 V, louT - 50 rnA
VIN - 0.4 V, 101lT - 100 rnA
VIN - 0.4 V, 101lT - 100 rnA
VIN - 0.4 V, lOUT - 100 rnA, Vs = 15 V
101lT - 100 rnA, VOIIT "0.6 V, Vs - 5 V
louT - 100 !LA, TA - 70°C
VIN
VIN

= 0.4 V, 101lT =
= 0.4 V, lOll! =

100 rnA
100 rnA, Vs

=

15 V

NOTES:
1. Negative current is defined as coming out of the specified device pin.
2. The VIN(ON) voltage limit guarantees a minimum output sink current per the specified conditions.
3. Iss is measured with anyone of eight drivers turned ON.

UDN-2595A
ONE OF EIGHT DRIVERS

Vs

IN

._---{] OUT

Dwg. No. A-ll,40B

3-46

Min.

-

-

-

Limits
Max.
50
100
0.5
0.6
-1.6
-5.0
0.4

4.6

-

-

25
6.0
20

-

Units
pA
pA
V
V
rnA
rnA
V
V
pF
rnA
rnA

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON TRANSISTOR ARRAYS
IDEALLY SUITED for interfacing between lowlevel digital logic circuitry and high-power peri pheralloads, the Series ULN-2800A high-voltage, highcurrent Darlington transistor arrays feature peak load
current ratings of 600 rnA (Series ULN-2800A and
ULN-2820A) or 750 rnA (Series ULN-2810A) for
each of the eight drivers in each device. Under the
proper conditions, high-power loads of up to 4 A at
50V (200 W at 23% duty cycle) or 3.2 A at 95 V (304 W
at 33% duty cycle) can be controlled. Typical loads
include relays, solenoids, stepping motors, multiplexed
LED and incandescent displays, and heaters. All devices feature open collector outputs and integral diodes for inductive load transient suppression.

II
O"i3. NO. A-IO.l21.

The Series ULN-2801A devices are general purpose
arrays which may be used with standard bipolar digital
logic using external current limiting, or with most
PMOS or CMOS directly. All are pinned with outputs opposite inputs to facilitate ease of circuit board
layout and are priced to compete directly with discrete
transistor alternatives.

output is not a concern. These devices will sink a
minimum of 350 rnA when driven from a "totem
pole" logic output.
The Series ULN-2800A is the standard highvoltage, high-current Darlington array. The output
transistors are capable of sinking 500mA and will
withstand at least 50 V in the OFF state. Outputs may
be paralleled for higher load current capability. The
Series ULN-28IOA devices are similar except that
they will sink 600mA. The Series ULN-2820A will
withstand 95 V in the OFF state.

The Series ULN-2802A was specifically designed for
use with 14 to 25 V PMOS devices. Each input has a
Zener diode and resistor in series to limit the input
current to a safe value in that application. The Zener
diode also means excellent noise immunity for these
devices.

All Series ULN-2800A Darlington arrays are furnished in an 18-pin dual in-line plastic package.

The Series ULN-2803A has a 2.7 kn series base resistor to each Darlington pair, and thus allows operation directly with TTL or CMOS operating at a supply voltage of 5 V. These devices will handle numerous interface needs - particularly those beyond the
capabilities of standard logic buffers.

Device Type Number Designation
VCE!MAXI
IC!MAXI

=
=

General Purpose
PMOS, CMOS
14 - 25 V
PMOS
5V
TTL, CMOS
6 - 15 V
CMOS, PMOS
High Output
TTL

The Series ULN-2804A features a 10.5 kn series
input resistor to permit their operation directly from
CMOS or PMOS outputs utilizing supply voltages of
6 to 15 V. The required input current is below that of
the Series ULN-2803A while the required input voltage is less than that required by the Series ULN-2802A.
The Series ULN-2805A is especially designed for
use with standard and Schottky TTL where higher
output currents are required and loading of the logic

3-47

50 V
500 mA

50 V
600 mA
Type Number

95 V
500 mA

ULN-2801A

ULN-2811A

ULN-2821A

ULN-2802A

ULN-2812A

ULN-2822A

ULN-2803A

ULN-2813A

ULN-2823A

ULN-2804A

ULN-2814A

ULN-2824A

ULN-2805A

ULN-2815A

ULN-2825A.

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

ABSOLUTE MAXIMUM RATINGS at 25°C Free-Air Temperature
for anyone Darlington pair (unless otherwise noted)
. .. 50 V
.95 V
.. 30 V
...... 15 V
.. 500 rnA
.... 600 rnA
....... 25 rnA
... 1.0 W
. ... 2.25 W*
. ....... -20°C to +85°C
. . -SSOC to + IS0°C

Output Voltage, VCE (Series ULN-2800, 2810A).
(Series ULN-2820A).
Input Voltage, V'N (Series ULN-2802, 2803, 2804A)
(Series ULN-2805A)
Continuous Collector Current, Ic (Series ULN-2800, 2820A)
(Series ULN-2810A)
Continuous Base Current, Ie
Power Dissipation, Po (one Darlington pair) .....
(total package). . . .. . . . .. ... ...
Operating Ambient Temperature Range, TA ••.•.
Storage Temperature Range, Ts ............. .
'Derale al Ihe rale of JB.JBmW/oC above 15°C.
Under normal operaling condilions, Ihese devices will suslain 350 mA per oulpul wilh

VCE(SAD

= 1.6 V al 50°C with a pulse widlh of 10 ms and a duly cycle of 40%.

PARTIAL SCHEMATICS
COM

,........+I-~COM

,.--*~COM

7V

,

\Q 5K

,

1.7K

i

i

,,
I
I

___ I

OW!;.

Series ULN-2801 A
(each driver)

Series ULN-2802A
(each driver)

Series ULN-2803A
(each driver)

.--++---oCOM

I, G NO. A-IQ,llH

1-9898A

Series ULN-280SA
(each driver)

Series ULN-2804A
(each driver)

3-48

Mo.

A-9651

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULN-2800A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current

Symbol
IcEx

Test
Fig.

Applicable
Devices

1A

All

1B
Collector-Emitter
Saturation Voltage
Input Current

Input Voltage

ULN-2802A
ULN-2804A

2

VeElsAT)

All
3

I'NIONI

I'NIOFFI
V,NIONI

4
5

ULN-2802A
ULN-2803A
ULN-2804A
ULN-2805A
All
ULN-2802A
ULN-2803A

ULN-2804A

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

hFE
C'N
tON
tOFF
I.
V,

2
-

-

6
7

ULN-2805A
ULN-2801A
All
All
All
All
All

Test Conditions
VCE = 50V, TA = 25°C
VeE = 50 V, TA = 70°C
VCE = 5U V, I A = IUuc, Y'N = b.U V
VeE = 50V, TA = 70°C, Y'N = 1.0V
Ie = 100 rnA, I. = 250 fJ.A
Ie = 200 rnA, I. = 350 fJ.A
Ie = 350 rnA, I. = 500 fJ.A
Y'N = 17 V
Y'N = 3.85 V
Y'N = 5.0 Y
Y'N = 12 V
Y'N = 3.0 V
Ie = 500fJ.A, TA = 70°C
VeE = 2.0 V, Ie = 300 rnA
VeE = 2.0 V, Ie = 200 rnA
VCE = 2.0 V, Ie = 250 rnA
VCE = 2.0 V, Ie = 300 rnA
VeE = 2.0V, Ie = 125 rnA
VeE = 2.0V, Ie = 200 rnA
VeE = 2.0 V, Ie = 275 rnA
VeE = 2.0 V, Ie = 350 rnA
VCE = 2.0V, Ie = 350 rnA
VeE = 2.0V, Ic = 350 rnA

Limits
Min. Typ. Max.
-

-

-

-

-

-

-

-

-

0.9

-

1.1

50

1.3
0.82
0.93
0.35
1.0
1.5
65

-

-

-

-

-

-

Series ULN·2800A and ULN-2810A devices are also available (with
reduced package power capability) in industrial-grade hermetic
packages. To order. change the lost letter of the port number from 'A'
to 'R', Note that the high-voltage devices (BY CE === 95 Y) are not
presently available with this packaging option.

3-49

-

-

-

13
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4

1000

-

-

15
0.25
0.25

25
1.0
1.0
50
100
2.0

-

-

--

-

-

-

-

-

-

-

-

-

-

-

-

0.5 E," to 0.5 Eoo,
0.5 E," to 0.5 Eoo,
V. = 50V, TA = 25°C
V. = 50V, TA = 70°C
I, = 350 rnA

50
100
5UU
500
1.1
1.3
1.6
1.25
1.35
0.5
1.45
2.4

-

-

-

-

-

-

1.7

Units
fJ. A
fJ.A
fJ. A
fJ. A
V
V
V
rnA
rnA
rnA
rnA
rnA
fJ.A
V
V
V
V
V
V
V
V
V

pF
fJ.s
fJ.S
fJ. A
fJ. A
Y

o

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULN-2810A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current

Symbol
IcEx

Test
Fig.

Applicable
Devices

1A

All

1B
Collector- Emitter
Saturation Voltage
Input Current

Input Voltage

VCEISAT)

I'NION)

I'NIOFF)
V'NION)

2

3

4
5

ULN-2812A
ULN-2814A
All

ULN-2812A
ULN-2813A
ULN-2814A
ULN-2815A
All
ULN-2812A
ULN-2813A

ULN-2814A

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

hFE
C'N
tON
toFF
IR
VF

2

-

6
7

ULN-2815A
ULN-2811A
All
All
All
All
All

Test Conditions
VCE = 50 V, TA = 25°C
VCE = 50V, TA = 70°C
VCE = 50 V, TA = 70°C, Y'N = 6.0V
VCE = 50V, TA = 70°C, Y'N = 1.0 V
Ic = 200 rnA, I. = 350 p.A
Ic = 350 rnA, I. = 500 p.A
Ic = 500 rnA, I. = 600 p.A
Y'N = 17 V
Y'N = 3.85 V
Y'N = 5.0V
Y'N = 12 V
V,N = 3.0 V
Ic = 500 p.A, TA = 70°C
VCE = 2.0 V, Ic = 500 rnA
VCE = 2.0 V, Ic = 250 rnA
VCE = 2.0 V, Ic = 300 rnA
VCE = 2.0 V, Ic = 500 rnA
VCE = 2.0 V, Ic = 275 rnA
VCE = 2.0 V, Ic = 350 rnA
VCE = 2.0 V, Ic = 500 rnA
VCE = 2.0 V, Ic = 500 rnA
VCE = 2.0 V, Ic = 350 rnA
VCE = 2.0 V, Ic = 500 rnA
0.5 E;n to 0.5 Eo,'
0.5 E;n to 0.5 Eo,'
VR= 50 V, TA = 25°C
VR = 50 V, TA = 70°C
IF = 350 rnA
IF = 500 rnA

Series UlN·2800A and UlN·2810A devices are also available (with
reduced package power capability) in industriol.grade hermetic
packages. To order. change the lost leller of the part number from 'A"
to ·R'. Note that the high·valtage devices (BVCE 2: 95 V) are not
presently available with this packaging option.

3-50

Limits
Min. Typ. Max. Units
-

-

-

-

50

-

-

-

50
100
500
500
l.l
1.3
1.3 1.6
1.7 1.9
0.82 1.25
0.93 1.35
0.35 0.5
1.0 1.45
1.5 2.4
65
-17
2.7
3.0
3.5
7.0
8.0
9.5
2.6
-

-

1000 900 15
0.25
0.25
-

-

-

1.7
2.1

p.A
p.A
p.A
p.A
V
V
V
rnA
rnA
rnA
rnA
rnA
p.A
V
V
V
V
V
V
V
V

-

-

25
1.0
1.0
50
100
2.0
2.5

pF
p's
p's
p.A
p.A
V
V

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CUItRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULN-2820A
ELECTRICAL CHARACTERISTICS at 25°C (unless otherwise noted)
Characteristic
Output Leakage Current

Symbol
IcEx

Test
Fig.

Applicable
Devices

1A

All

1B
Collector-Em itter
Saturation Voltage
Input Current

Input Voltage

VCEISAT)

IINION}

2

3

IIN(OFF}

4

VIN(ON}

5

ULN-2822A
ULN-2824A
All

ULN-2822A
ULN-2823A
ULN-2824A
ULN-2825A
All
ULN-2822A
ULN-2823A

ULN-2824A

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

h"

2

CIN
tON
tOFF
I.

-

V,

6
7

ULN-2825A
ULN-2821A
All
All
All
All
All

Test Conditions
VCE = 95 V, TA = 25°C
VCE = 95 V, TA = 70°C
VCE = 95V, TA = 70°C, VIN = 6.0V
VCE = 95 V, TA = 7Q°C, VIN = 1.0 V
Ie = 100 rnA, I. = 250 p.A
Ic = 200 rnA, I. = 350 p.A
Ic = 350 rnA, I. = 500 p.A
VIN = 17V
VIN = 3.85 V
VIN = 5.0V
VIN = 12 V
VIN = 3.0 V
Ic = 500p.A, TA = 7Q°C
VCE = 2.0 V, Ic = 300 rnA
VCE = 2.0 V, Ie = 200 rnA
VCE = 2.0 V, Ic = 250 rnA
VCE = 2.0 V, Ie = 300 rnA
VCE = 2.0 V, Ic = 125 rnA
VCE = 2.0 V, Ic = 200 rnA
VCE = 2.0 V, Ie = 275 rnA
VCE = 2.0 V, Ic = 350 rnA
VCE = 2.0 V, Ie = 350 rnA
VCE = 2.0 V, Ic = 350 rnA

0.5 E" to 0.5 Eo",
0.5 E" to 0.5 Eo",
V. = 95 V, TA = 25°C
V. = 95V, TA = 70°C
I, = 350 rnA

3-51

Limits
Min. Typ. Max.

-

-

50
100
500
500

--

0.9

1.1

-

1.1
1.3

1.3
1.6
1.25
1.35
0.5
1.45
2.4

-

-

-

-

-

-

-

50

0.82
0.93
0.35
1.0
1.5
65

-

-

-

-

-

-

--

-

-

-

-

13
2.4
2.7
3.0
5.0
6.0
7.0
8.0
2.4

1000

-

-

-

15
0.25
0.25

25
1.0
1.0
50

-

-

-

-

-

-

-

-

_.

-

-

-'

-

,--

lOa

-

1.7

2.0

Units
p.A
p.A
p.A
p.A
V
V
V
rnA
rnA
rnA
rnA
rnA
p.A
V
V
V
V
V
V
V
V
V

pF
p's
p's
p.A
p.A
V

II

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

TEST FIGURES
OPEN

VeE

OPEN

VeE

OPEN

I

DWG.NO. A-9729'\

FIGURE 18

FIGURE 1A

OPEN

OPEN

»---41---0 OPEN

OWG. 110. A-9132

DWG. 110. A-9731

FIGURE 3

FIGURE 2

OPEN

VeE

OPEN

OWG.IIO.0\-9733A

DWG.1I0.A-973I1A

FIGURE 5

FIGURE 4

v,

DWG.t«I. A-9735A

FIGURE 7

FIGURE 6

3-52

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE

COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT

600

,~

"'!

z

600

~' ~

V

" ...'"
,'!£"-

400

~
og

"',
,,
~~.

«

E 400

~

~/ov

:J

",

,/

.' <' ...,0
....~

U

"

200

,'ft':'

a
u

i

,r
.-,'
",~

o

o

0.5

I.,

1.0

2.0
A-975~B

DEVICE1UMIT

\

!~

~

5

\~
\,,

,

0

,
\,

O. 5

,,
,,
,

,,

,,

\.

o

'\
o

./

/

50
AMBIENT TEMPERATURE IN

3-53

100

oc

150
D'Ifil.IIO.A-IO,379A

./

MAXIMUM REQUIRED

INPUT CURRENT

lWIlJ. !':U.

2. 5

\

V

V

V

400
200
INPUT CURRENT IN f,lA - 'iN

ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

2. 0

/

l V'-''/

SATURATION VOLTAGE - VeE (SAn
D'I«i. NO.

,
,,

600
~-IO.

:l2A

SERIES ULN-2800A
HIGH-VOLTAGE, HIGH.CURRENT DARLINGTON TRANSISTOR ARRAYS

PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
600

u

OR

500

~

«
«

E

~

400

~

~
g 300
~

0
u

"~

200

NUMBER OF OUTPUTS
CONDUCTlNG
SIMULTANEOUSLY

""

"
'"
u
....::::>

Q5

e:

::::>
0

iii

""

~

""

o

~o-----~~~-----~~----~~~----~~~----~I~OO
PERCENT DUTY CYClE

:JWG. NO. A-IO,583

WITH STAVER V·7 HEAT SINK

u

~

+-

""t:]

1.0

ffi
0..

!Ii:

""
::=
....z

~

'"
::::>

u

50..
50

Q5

iii
;:
""

~

""

80

100

PERCENT DUTY CYClE
DWG. NO. A-IO,584

3-61

UDN·2841 BAND UDN·2845B
QUAD DARLINGTON 1.5 A DRIVERS

OUTPUT ·STAGE TRANSIENT PROTECTION
When switching inductive loads, the output transistors of UDN2841B and UDN-2845B drivers should be protected by a suitable
clamping technique. The simplest approach is to clamp each output
with a discrete diode, as shown in Figures 1 and 2.
IN A

IN B

IN
Vs or GNO

IN B

IN A

vDWG. NO. A-ll.790A

Figure 1
UDN·2841B

v-

OWG. NO. A-ll.792A

Figure 2
UDN·2845B

IN

For improved turnoff, a combination
diode/Zener diode scheme can be used. The
Zener diode in the clamp circuit of Figure 3
allows the flyback voltage to rise above the supply voltage, speeding turnoff of the load. An appropriate resistor can be substituted for the
Zener diode. With a 1A load, substitution of a
15Q resistor results in operation similar to that
of the Zener diode circuit.

vDUG. NO. A-1I.787A

Figure 3
UDN·2841B

3-62

UDN·28418 AND UDN·2845B
QUAD DARLINGTON 1.5 A DRIVERS

TYPICAL APPLICATIONS

BIPOLAR MOTOR DRIVER
UDN·28458

\----I--oIN A
IN

Ao--+----t

-30 V

1----+--01<1',

o--+----<~-L::..J--'

1----+--OIN 8
IN8o--+----L~-,

_IA

- 18
DWG. NO. A-1O.586A

ELECTROSENSITIVE PRINTER INTERFACE

PRINT ELECTRODES
39~

UDN·28418

~.H_t_+OIN

I N 10--_ _--(

~~J___I-+-+OV,

4
or GND

l!!.H~+01 N 3

IN

2o----+-+-L!....r--,

DWG. NO. A-10.585A

-40V

3-63

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON SWITCHES

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON SWITCHES

•
•
•
•
•
•
•

Output Currents to 4 A
Output Voltages to 80 V
loads to 1280 W
TTl, DTl, or CMOS Compatible Inputs
Internal Clamp Diodes
Plastic Single In-line Package
Heat-Sink Tab

OWG. NO. A-1I,974

THESE QUAD DARLINGTON ARRAYS are
designed to serve as interface between lowlevel logic and peripheral power devices such as
solenoids, motors, incandescent displays, heaters,
and similar loads of up to 320 W per channel. Both
integrated circuits include transient-suppression
diodes that enable use with inductive loads. The
input logic is compatible with most TTL, DTL, LS
TTL, and 5 V CMOS logic.
Type UDN-2878W and UDN-2879W 4 A arrays
are identical except for output-voltage ratings. The
former is rated for operation to 50 V (35 V sustaining), while the latter has a minimum output breakdown rating of 80 V (50 V sustaining). The

Device
UDN-2878W
UDN-2878W-2
UDN-2879W
UDN-28"79W-2

o

o

FEATURES

economical Type UDN-2878W-2 and Type UDN2879W-2 are recommended for applications requiring load currents of 3 A or less. These less expensive
devices are identical to the basic parts except for the
maximum allowable load-current rating.
For maximum power-handling capability, all drivers are supplied in a 12-pin single in-line power-tab
package. The tab is at ground potential and needs no
insulation. External heat sinks are usually required
for proper operation of these devices.

Output
Voltage

Sustaining
Voltage

Output
Current

50 V
50V
80 V
80V

35 V
35 V
50 V
50V

4A
3A
4A
3A

3-64

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON SWITCHES

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
for any driver
(unless otherwise noted)
Output Voltage, VCEX (UDN-2878W & UDN-2878W-2) . . . . . . . . . . . . . . . . . . . . . . .. 50 V
(UDN-2879W &UDN-2879W-2) . . . . . . . . . . . . . . . . . . . . . . .. 80 V
Output Current, Ie (UDN-2878W & UDN-2879W) ........................... 5.0 A
(UDN-2878W-2 &UDN-2979W-2) ........................ 4.0 A
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Input Current, liN ............................................... 25 rnA
Supply Voltage, Vs ..... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10 V
Total Package Power Dissipation, PD • • • • • • • • . • • • • • • • • • • • • • • • • • • • • • • See Graph
Operating AmbientTemperature Range, TA • • • • • • • • • • • • • • • • • • • •• - 20°C to + 85°C
Storage Temperature Range, Ts ............................ - 55°C to + 150°C

D

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

PARTIAL SCHEMATIC
One of 4 Drivers
~

151---+~-+---I-\---+----I

'"

c..

zo

;:::

«
c..

v>
v>

c

,---.t---o K
2.5 K

/"---+---0(1 C

I

I

i

I
I
I

I

I
I

m
DWG. NO. A-12,037

50

75

100

TEMPERATURE IN

°c

125
Owg. No. A-ll,794

3-65

UDN-2878W AND UDN·2879W
QUAD .HIGH·CURRENT DARLINGTON SWITCHES

ELECTRICAL CHARACTERISTICS at Vs = 5.0 V, TA = + 25°C (unless otherwise noted)
Symbol
leEX

Test
Fig.
1

Output Sustaining
Voltage

VeEtSUS)

2

Collector-Emitter
Saturation Voltage

VeEtSAD

2

Characteristic
Output leakage Current

Input Current

I,.

3

Input Voltage

V,NtON)

4

Supply Current per Driver
Turn-On Delay
Turn-Off Delay
Clamp Diode
leakage Current

Is
tpLH
tpHL
IR

Clamp Diode
Forward Voltage

Vf

7

-

5

6

Applicable
Devices
UDN-2878W/W-2

Test Conditions
VeE = 50 V
VeE = 50 V, TA = + 70°C
UDN-2B79W/w-2 VeE = BOV
VeE = BO V, TA = + 70°C
UDN-2878W/W-2 Ie = 100 rnA, V,N = 0.4 V
UDN-2879W/W-2 Ie = 100 rnA, V,N = 0.4 V
All
Ie = 500 rnA, V,N = 2.75 V
Ie = 1.0 A, V,. = 2.75 V
Ie = 2.0 A, V,N = 2.75 V
Ie = 3.0 A, V,. = 2.75 V
UDN-2878/2879W Ie = 4.0 A, V,N = 2.75 V
All
V,. = 2.75 V
V,. = 3.75 V
All
VeE = 2.2 V, Ie = 3.0A
UDN-287B12879W VeE = 2.2V, Ie = 4.0A
Ie = 500 rnA, V,N = 2.75 V
All
All
0.5 Ein to 0.5 Eout
All
0.5 Ein to 0.5 Eout> Ie = 3.0 A
VR= 50 V
All
VR= 50 V, TA = + 70°C
UDN-2879W/W-2 VR= 80V
VR= BOV, TA = + 70°C
All
If = 3.0A
UDN-287812879W If = 4.0A

Min.
-

Limits
Max.
100
500
100
500

35
50

-

-

1.1
1.3
1.5
1.9
2.2
550
1000
2.75
2.75
6.0
1.0
1.5
50
100
50
100
2.5
3.0

-

-

-

-

-

-

Units
/-LA
/-LA
/-LA
/-LA
V
V
V
V
V
V
V
/-LA
/-LA
V
V
rnA
/-Ls
/-LS
/-LA
/-LA
/-LA
/-LA
V
V

CAUTION: High-current tests are pulse tests or require heat sinking.

OPEN

OPEN

VeE

TEST FIGURES

D'I/G.MO.10.35O

Figure 1

3-66

Figure 2

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON SWITCHES

TEST FIGURES (Continued)
OPEN

;»--4-_-<) OPEN

DW(;.

Figure 3

Figure 4

DWG.MO. A-9735A

Figure 5

Figure 6

OWl). NO. A-IO,351

Figure 7

3-67

~O.

A_973~A

II

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON'SWITCHES

TYPICAL APPLICATIONS
STEPPER-MOTOR DRIVER

UDN-2878W

o

o

x

X +5V

y

+28V

DWG. NO. A-ll.975

INPUT WAVEFORMS

x
y

Dwg. No. A-ll.79S

3-68

UDN-2878W AND UDN-2879W
QUAD HIGH-CURRENT DARLINGTON SWITCHES

TYPICAL APPLICATIONS (Continued)

o

UDN-2879W

o

PRINT-HAMMER DRIVER

II

IN.

'---.........."-----+-"'-o+36V
IlWG. NO.A-1I.976

UDN-2879W

o
DIGIT DRIVER
FOR MULTIPLEXED INCANDESCENT LAMP DISPLAY

,~. ~,1Jl.n.n7n.n.~nn.

~

•

o

~NI

NclJI
1N.z IN. +5V

NC

INo

----_-+l-~
(jjl~IDI~IT

---_t-+--+l-~
(j.il~

ro
(jjl
SEGMENT ------r-+-t-+--+l--':""~
SELECT __-~t-t-++
-'!:'H':---+
(jjl

~

......

Owg.No. 8-1512

3-69

TO

M~

DIGITS

UTN-2886B AND UTN-2888A

MONOLITHIC SCR ARRAYS'

UTN-2886BAND UTN-2888A
MONOLITHIC SCR ARRAYS
FEATURES
•
•
•
•
•

Low Input Current
TTL, LSTIL and CMOS Compatible
Momentary Inrush Current Capability to 2 A
Minimum Forward Blocking Voltage 35 V
Use with Full-Wave or Half-Wave Sources

FOR USE with microprocessors that
I NTENDED
are strobing power loads, these monolithic SCR
arrays will interface to high-current loads including
lamps, relays, and solenoids. The use of multiple
SCRs in a single package reduces component count,
insertion costs, assembly time, and circuit space,
while improving overall circuit reliability.
Each array contains multiple SCRs with integral
current limiting and gate-to-cathode resistors. In all
cases, the maximum allowable SCR current rating at
+25°C is 800 rnA continuous or 2 amperes nonrecurring peak. Outputs may be paralleled for higher
load current capability within the limits of the allowable package power dissipation rating.
The UTN-2886B array contains four individual
SCRs and two pairs of paralleled SCRs (pins 8-9 and
1-16). Each SCR is capable of continuous and simultaneous operation at 250 rnA (500 rnA at pins 9 and
16) at an ambient temperature of +50°C. The 16lead package with heat-sink contact tabs allows
maximum power dissipation with standard cooling
methods. Further increases in power dissipation can
be obtained by attaching an external heat sink to the
webbed leads.
The UTN-2888A SCR array contains eight isolated devices, each capable of continuous and simultaneous operation at 200 rnA at an ambient temperature of + 50°C.
These SCR arrays operate from an unfiltered
half-wave (50 or 60 Hz) or full-wave (100 or
120 Hz) rectified source. They are not intended for
use with a-c sources, and will not sustain commercial
a-c line voltages (115 VAC).

• Two Parall.1 seRa
Owg. No. A-11,092

UTN·2886B

Owe. No. A-l1,093

UTN·2888A

3-70

UTN-2886B AND UTN-2888A

MONOLITHIC SCR ARRAYS

ABSOLUTE MAXIMUM RATINGS

ALLOWABLE AVERAGE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

for anyone individual SCR'
Forward Blocking Voltage (Input Open), VAK .......... 35 V
Reverse Blocking Voltage, V'I}. .................. 300 mV
Continuous Forward Current, IA ................. 800 mA
Peak Forward Surge Current, IA ................... 2.0 A
Gate Input Power, PIN ........................ 10 mW
Peak Gate Input Power, PIN .................... 50 mW
Gate Input Current, liN ........................ 50 mA
Reverse Gate Input Voltage, VIN .................. 5.0 V
Total Package Power Dissipation, PD ••••••••••• See Graph
Operating Temperature Range, TA ........ -20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to + 150°C

3. 5 r - - - - . . - - r - -....,-----r----,---y---,

Vl

~

:=
z

o

D

~

~ 2. 0 t---+----''Ii..

Vl
Vl

i5

'"
~"-

.
.
~

co

~

l.0t----+---+---+--..a

50
100
AMBIENT TEMPERATURE IN °c
Dwg. No. A-ll,090

ELECTRICAL CHARACTERISTICS for anyone individual SCR*

I

Characteristic
Forward Blocking Current
Gate-to-Anode
Leakage Current
Forward ON vOltage

Symbol
IA

Gate Trigger Current
Gate Trigger Voltage
Gate OFF Voltage
Gate un (;urrent
HOlding Current

IINION)
VINION)
VINIDFF)
IINIOFF)
IH

Anode OFF Voltage

liN
vAKIDN)

VAKIOFF)

Test
Temp.
+70°C

Test Cond itions
VAK = 35 V, VIN - 100 mV

Min.

+7O"C
+z5"1,;
+55°C
+25°C
+25OC
+70°C
+/UOC
UOC
+55°C
+55°C

VAK = 0 V, VIN = 5.0 V
I - 275 mA, Y'N - 2.5 V
IA = 275 mA, VIN = 2.5 V
VAK - 7.0 V, VIN - 2.5 V, Rl - 500
VAK = 1.7 V, tgt - 20 /LS, Rl - 50!}
VAK = 35 V, Rl = 50!}
VAK - 35 V, Rl - 50!}
IINlINIT. - ZU rnA
IINIINIT.) - 20 mA
VJN = 5.0 V, Rl - 500

-

-

100

-

250
1.2
1.15
300
2.5
10
10

-

~.O

400

-

"lA' liN' and IH test conditions and limits for the paralleled SCRs at pin 8-9 or pin 1-16 of the UTN-2886B are twice the value shown.

3-71

Limits
Max.
50

Units
/LA
/LA
V
V
/LA
V
mV
/LA
mA
mA
mV

UTN-2886B AND UTN-2888A

MONOLITHIC SCR ARRAYS

-

-1- V
See Application Noles

'ON ] - -

-

1

I

I
I

I
I

-~-

1.21035V

sO.4V

n[,,,,

-I l-igi '" 20 IlS I
I

I

I
1

D f'L
Dwg. No. A-ll.089

TYPICAL LAMP APPLICATION

TYPICAL WAVEFORMS

APPLICATION NOTES
1. These devices nonnally operate from an unfiltered half-wave or full-wave rectified source. They
cannot be operated with a bidirectional (unrectified)
a-c source.

supply voltage above the anode OFF voltage and
prevent proper tum-OFF. To insure proper operation, resistor R should be used as shown in the typical
application. The maximum resistor value is determined from:

2. During operation, the SCR is turned ON by
application of a positive voltage to the input. The
SCR will remain ON, even though the input voltage
is removed or made slightly negative, until the
anode-to-cathode voltage is reduced to below the
anride OFF voltage. .

V!K(Off)

R =--:--:'-:-'---

400 mV

(0-1) IGA

where n is the number of SCRs being used in the
system. Note that n = 2 for pin 8-9 and pin 1-16 of
the UTN-2886B.
4. Various combinations of number of outputs
conducting, duty cycle, and ambient temperature
must be held within the allowable package power
dissipation limits shown.

3. When using multiple SCRs and a common supply, gate-to-anode leakage currents can hold the

3-72

UDN-293SZ AND UDN-29S0Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

UDN-2935Z AND UDN-2950Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

o

FEATURES
•
•
•
•
•
•
•
•
•
•

3.5 APeak Output
37 VMin. Output Breakdown
Output Transient Protection
Tri-State Outputs
TIL, CMOS, PMOS, NMOS Compatible Inputs
Internal Thermal Shutdown
High-Speed Chopper (to 100 kHz)
UDN-2935Z Replaces SG3635P
UDN-2950Z Replaces UDN-2949Z, SN75605
TO-220 Style Packages

BOTH Type UDN-2935Z and UDN-2950Z
integrated circuits are designed for servomotor applications using pulse-width modulation.
These two high-current, monolithic half-bridge
motor drivers combine a sink-and-source driver
with diode transient protection, input gain, level
shifting, logic stages, and a voltage regulator for single-supply operation.
The UDN-2935Z output goes high with an active
low input at pin 2; it is especially desirable in NMOS
microprocessor applications. The UDN-2950Z output goes high with an active high input at pin 2; its
inputs can be tied together for single-wire control.
The input circuitry of both devices is compatible
with TTL and low-voltage CMOS, PMOS, and
NMOS logic. Both ICs have logic lockout (tri-state
output) that prevents source and sink drivers from
turning ON simultaneously.
In typical applications, the chopper-drive mode is
characterized by low power-dissipation levels, low
saturation voltages, and short chopper-storage

>'"
+

.
I-

0

~

0
0:

::>

'"

z

::>

<0

o

l-

::>

eo

::>
0

u

0:

::>

5l

I;

Dwg.Ho. A-12.116

UDN-2935Z

>'"
+

..
I-

0

~

0

::>

'"::>

z

::>

ffi

l-

::>

eo

::>
0

U

0:
0

'"

D
I;

OWG. NO. A-ll.l77

UDN-2950Z

times for the sink drivers. The motor drivers can be
used in pairs for full-bridge operation, or as triplets
in three-phase brushless doc motor-drive applications. They can also be teamed with the Sprague
Electric UCN-4202A stepper motor translator/
driver for bipolar doc stepper motor control
The motor drivers' single-chip construction and
power-tab TO-220 package enable cost-effective
and reliable system designs supported by excellent
power-dissipation ratings, minimum size, and ease
of installation; because the package's heat tab is at
ground potential, several devices can share a common heat sink without insulating hardware.

3-73

UDN-2935Z AND UDN-2950Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

ABSOLUTE MAXIMUM RATINGS
Supply Voltage Range, Vs ..................................... 8.0 Vto 35 V
Output Voltage Range, VOUT .............................. - 2.0 Vto Vs + 2.0 V
Input Voltage Range, Y'N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.3 Vto + 7.0 V
Peak Output Current(lOO ms, 10% d-c), lop ............................ ± 3.5 A
Continuous Output Current, louT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ± 2.0 A
Package Power Dissipation, Po ................................... See Graph
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to + 85°C

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
20r---....,...---r--rT"'""-""""-"""T---'

DWG. NO. A-12.000A

TRUTH TABLE
Output, Pin 4

Source Driver,
Pin 2

Sink Driver,
Pin 5

UDN-2935Z

UDN-2950Z

low
Low
High
High

Low
High
Low
High

High
High
Low
High Z

Low
High Z
High
High

3-74

UDN-293SZ AND UDN-29S0Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

FUNCTIONAL BLOCK DIAGRAMS

UDN-293SZ

o

SOURCE
INPUT

Dwg.No. A-12,113

UDN-29S0Z

SOURCE
INPUT

SINK
INPUT

Dwg.No. A-12.112

3-75

UDN-2935Z AND UDN-2950Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

ELECTRICAL CHARACTERISTICS at TA = + 25°C, TTAB = + 70°C, Vs = 35 V (unless otherwise noted)
Source Driver Input, Pin 2
UDN-2950Z
UDN-2935Z
0.8 V
2.4 V
0.8 V
2.4 V
2.4 V
0.8 V
0.8 V
2.4 V
2.4 V
0.8 V
0.8 V
2.4 V
2.4 V
0.8 V
-250 fJ.A
-250 fJ.A
2.4 V
2.4 V
0.8 V
0.8 V
2.4 V
0.8 V
0.8 to 2.4 V
2.4 to 0.8 V
NC
NC
0.8 V
2.4 V

Characteristic
Output Leakage Current
Output Sustaining Voltage
Output Saturation Voltage
Output Source Current
Output Sink Current
Input Open-Circuit Voltage
Input Current

Propagation Delay
Clamp Diode Forward Voltage
Supply Current

Sink Driver
Input, Pin 5
2.4 V
2.4 V '
0.8 to 2.4 V
2.4 V
0.8 V
2.4 V
0.8 V
-250 fJ.A
2.4 V
2.4 V
0.8 V
0.8 to 2.4 V
2.4 V
NC
NC

Output,
Pin 4
OV
35 V
2.0 A
-2.0A
2.0 A
-

Other

Fig. 1

-

-

Limits
Max.
-500

-

500

35
33

-

Min.

-

-2.0
2.0

-

-

-

-

-

-

-

-

-

NC
NC
NC
2.0 A
2.0 A
2.0 A
NC

Fig. 2

-

-

-

2.0
-

7.5
-700
10
-1.6
750
2.0
2.2
35

NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.

TEST FIGURE 1

TEST FIGURE 2

o

o

v,
+V

VIN
loul_

j2.4V

Dwg.No. A-12,llB

0.8 V

3.5 mH

Dwg.No. A-12,1l7

3-76

Units
!-LA
!-LA
V
V
V
A
A
V
!-LA
!-LA
rnA
ns
!-LS
V
rnA

UDN-293SZ AND UDN-29S0Z

BIPOLAR HALF-BRIDGE MOTOR DRIVERS

APPLICATION NOTES
It should be noted that an additional power dissipation component may
arise from crossover currents flowing from supply to ground when current
direction through the load is reversed. This is due to differences in the
switching speeds between the source and sink drivers. Although the internallogic lockout protects these devices from catastrophic failure, the
crossover power component can cause device operation at substantially
higher junction temperatures.
If timing conditions are ignored, the magnitude of this power can be
approximated as:

Po = Vs x Ie X t X f
where Vs = supply voltage
Ie = crossover current (= 3.5 A max.)
t = crossover current duration (= lj.Ls)
f = frequency of direction change
In some applications (high switching speeds or high package power dissipation), it is recommended that the inputs be driven separately, and that
the sink driver not be turned ON for at least 2 j.LS (maximum source tpo)
after the source driver input is turned OFF. The sink driver should be
turned OFF at least 750 ns (maximum sink tpo) before the source driver is
turned ON.

RECOMMENDED TIMING CONDITIONS
(UDN-2950Z shown)

DIRECTlO~
V2

-l

!-------!I
11->750

ns

r->21JS

SPEED (PWMI
V5

Owg.No. A-12.120

SOURCE
INPUT, V2 - - - - - . ,

SINK
INPUT, V5

--l

2 ~s

I- --I

L ___ J

1---750 ns
Dwg.No. A-12.119

3-77

o

UDN-2935Z AND UDN-2950Z
BIPOLAR HALF-BRIDGE MOTOR DRIVERS

TYPICAL APPLICATIONS
3-PHASE BRUSH LESS D-C MOTOR DRIVE
7400

BlI

~

...1
~
~

SENSE
1

UGN-3030T

UDN-2950Z

"

fa 51 ~-

'5V

~

~

0

~

12

rcJ CJ
rm
~
-

~

UDN-2950Z

1

~

~

0

~

~

nJ

8

UDN-2950Z

0 2

~
nJ

nJ

-:!::

SENSE

2

VS

1

~~
;.

UGN-3030T
SENSE
3

::;:.

~

k,'5V

~~

lA
C

PHASE
A

~~ ~ ~
?~;;w
11

~

PHASE B

Owg. No. 8-1523

7402

FULL-BRIDGE D-C
SERVO MOTOR DRIVE

SINGLE-WINDING D-C
OR STEPPER MOTOR DRIVE

UDN-2950Z

UDN-2935Z

I

+28V
DIRECTION 0-.........- - - '

2

3

4

UDN-295OZ

5

+14V
+30V o-.......i---=-+--+-----.J
DIRECTION o----<~-I--+----.J

Dwg.No. A-12,114

SPEED
(PWM)

o--.,..--.........-----.....J
Dwg.No. A-12.115

3-78

UDN·2949Z
HIGH·CURRENT BIPOLAR HALF· BRIDGE MOTOR DRIVER

UDN·2949Z HIGH·CURRENT BIPOLAR
HALF·BRIDGE MOTOR DRIVER

o

FEATURES
•
•
•
•
•
•
•

3.5 APeak Output
30 VOutput Breakdown
Output Transient Suppression
TIL, CMOS, PMOS, NMOS Compatible Inputs
High·Speed Chopper (to 100 kHz)
Low Standby Current (10 rnA)
TO-220 Style Package

THE UDN-2949Z is a monolithic half-bridge
motor driver supplied in a power-tab TO-220
style package. The circuit combines sink and
source drivers with diode protection, gain and
level shifting systems, and a voltage regulator
for single-supply operation. The unit is specifically designed for servomotor drive applications
using pulse-width modulation (chopping).

V>

>

+

f-

::>
Q.

""
u
w

IX

::>

a

o

f-

z

::>

0
IX

f-

::>

(!)

f-

::>

Q.

Q.

::>

'"""Vi

0

Z

0

V>

The chopper drive mode is characterized by a
minimum power dissipation requirement, low
saturation voltages, and low chopper storage
times for the NPN sink driver. Predriver stages
reduce input drive requirements while allowing
the output to switch currents of 2 amperes.

DWG. NO. A-ll.l77

Single-chip construction and the power-tab
TO-220 style package provide improved cost effectiveness and reliability over discrete component motor drive systems with excellent power
dissipation capability, minimum size, ease of installation, and heat sinking.

The PNP sourcing driver is turned ON by an
active high input while the NPN sinking driver is
activated with a low input. These inputs are
completely compatible with TTL, low-voltage
. CMOS, PMOS, and NMOS.
The UDN-2949Z may be used in pairs (fullbridge) for doc stepper motor or brushless a-c
motor drive applications. Such applications may
require an external ground clamp diode
(lN4000) connected at the output of each device
in order to minimize package power dissipation.

The package heat tab is at ground potential.
Multiple devices may share a common heat sink
without insulating hardware.
The UDN-2949Z power driver may be used in
stepper-motor bipolar bridge-driver circuits, for
example, with the Sprague UCN-4202A Stepper
Motor Translator/Driver.

3-79

UDN·2949Z
HIGH·CURRENT BIPOLAR HALF· BRIDGE MOTOR DRIVER

ABSOLUTE MAXIMUM RATINGS
Supply Voltage Range, Vs ................ 15 Vto 30 V
Input Voltage Range, VIN .. . . . . . . . .. - 0.3 Vto + 7.0 V
Peak Output Current (100 ms, 10% d.c.), lop ..... ± 3.5 A
Continuous Output Current, louT .............. ± 2.0 A
Package Power Dissipation, Po ............. See Graph
Operating Temperature Range, TA . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts ..... - 55°C to + 150°C

LOGIC TRUTH TABLE
Source Driver
Input, V2

Sink Driver
Input, V5

Low
Low
High
High

Low
High
High
Low

Output,
V4
Low
Open
High
Disallowed

ELEORICAL CHARACTERISTla at TA = 25°C, Vs = 24 V (unle•• otherwi.e noted).

Characteristic
Output Leakage Current
Output Sustaining Voltage
Output Saturation Voltage
Output Source Current
Output Sink Current
Input Open-Circuit Voltage
Input Current
Propagation Delay
Clamp Diode Forward Voltage
Supply Current

Source Driver
Input, Pin 2
0.8 V
0.8 V
0.8 V
2.4 V
0.8 V
2.4 V
0.8 V

Test Conditions
Sink Driver
Output
Input, Pin 5
Pin 4
2.4 V
oV
2.4 V
28 V
0.8 to 2.4 V
2.0 A
2.4 V
-2.0 A
0.8 V
2.0 A
2.4 V
0.8 V
-

-250 !AA
2.4 V
0.8 V
0.8 V
0.8 to 2.4 V

-250 !AA
2.4 V
0.8 V
0.8 to 2.4 V
2.4V

NC
NC

NC
NC

-,

Vs = 28 V
Vs = 28 V
Test Fig. 1

Min.

Limits
Max.

Units

-

-500
500

!AA

30
22

-

uA

7,.5
-700 '

V
V
V
A
A
V
JA

fiC.

-~_n

rnA

NC
NC
2.0 A
NC

7~n

~

5.0
2.2
35

--"i.

-

2.0

-2.0
2.0

-

-

NC

-- deVice pm,
Note: Positive (negative) current IS defmed as gomg mto (commg out 01) the specified

3-80

Other

Test Fill. 2

-

-

'1.
mA

UDN-2949Z
HIGH-CURRENT BIPOLAR HALF-BRIDGE MOTOR DRIVER

Vs=
+29 V

1

,
lout~
L-1VtI\~'N\.JV~

10..,.

2

J

4

,2.4V

O.8~

DWG. NO. A-ll.179

3.5 mH

DlIG. NI'). A-ll,178

TEST FIGURE

TEST FIGURE 2

APPLICATION NOTES
1. The source and sink outputs should not
be ON simultaneously (V2 High, Vs Low). High
"crossover" currents could degrade or destroy
the device.

not be pulled low (turned ON) for at least 5 /AS
(max. source tpD) after the source driver input is
pulled low (turned OFF). The sink driver should
be allowed to go high (turned OFF) at least 750
ns (max. sink tpD) before the source driver goes
high (turned ON).

2. Do not assume from the Logic Truth
Table that both inputs can be connected (V4
High or Low only). The sink driver is considerably faster than the source driver. An input
shift from high-to-Iow levels could produce a
condition where both drivers are ON, and that
condition could occur for as long as 5 I-Is.

SOURCE
INPUT, V2 - - - - - ,

SINK
INPUT, V5

--l 5 ~s I- --I

l ____ J

3. It is recommended that the inputs be
driven separately, and that the sink driver input

OW&.NO. 0·11.242

Timing Condition.

DIRECTIO~
I
--I I-- > 5~s

1---750 ns

-I r.- > 750 ns
=-111:'- > 5~s

I
ll-

> 150 ns

SPEEUIP~~

'C"'~
DWG.NO. A-ll,241

3-81

o

UDN·2949Z
HIGH· CURRENT BIPOLAR HALF·BRIDGE MOTOR DRIVER

PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

I I

.

v.
....
....
~

~
~o

,

3'C!W HEAT SINK

10

z'

0

r-..... r--.....

;::

~

~
0

~

"."

r--.......

5

--

v

~

..

~

~-'

30

"

lQ·C/l.v

~~~
'''10 .......

3D'CI1N

. HEAT SINK

.

0

'",-

40

50

60

- -- -70

80

AMBIENT TEMPERATURE. TA. IN'C
D\~G.

FULL·BRIDGE D·C SERVO MOTOR APPLICATION

SINGLE·WINDING D·C OR STEPPER MOTOR

+Z6V

cw----'
ccw _ _ _ _ _ _

NO. A-ll,183

+24 Vo-~-+--+-I----==---~
~

oI RECTI ON 0----+-1')_.......+-___-+--1
SPEEDo---~--~-----~-~

Dwg. No. A-U,lBIA

(PWM)

3-82

DWG. NO. A-ll.t82

UDN-29S2B AND UDN-29S2W
FULL-BRIDGE MOTOR DRIVERS

UDN-2952B AND UDN-2952W
FULL-BRIDGE MOTOR DRIVERS

FEATURES
•
•
•
•
•
•

vBB

VK

High Output Current
Adjustable Short-Circuit Protection
Thermal Protection
Internal Clamp Diodes
TIL, DTL, PMOS, CMOS Compatible
DIP or SIP Packaging

VDD
OUT l

PHASE

SUB

SUB

SUB

SUB

VA
PULL-BRIDGE MOTOR-DRIVER integrated
circuits, Types UDN-2952B and UDN-2952W
combine low-level logic circuitry and Darlington
output power drivers for bidirectional control of d-c
motors or solenoids operating with continuous load
currents of up to 2A and peak start-up currents as
highas3.5A.

GROUND

Dwg.No. A-ll,368B

UDN-2952B

cost devices are identical to the basic parts, except
for the maximum allowable load-current rating.

For applications requiring load currents of I A or
less (2A peak), the economical Type UDN-2952B-2
and UDN-2952W-2 are recommended. The lower-

These monolithic integrated circuits have extensive circuit protection. Both drivers have thermal
shutdown networks that disable motor drive if the
package power dissipation ratings are exceeded. Internal diode transient suppression is provided onchip. Output-current limiting is determined by the
user's selection ofa sensing resistor.

o

o
co
co

>

""« >'"
:c '"

V>

"-

co
::::>

V>

>-~

::::>
0

V>
V>

>

ENABLE

The Type UDN-2952B full-bridge power driver is
supplied in a 16-pin dual in-line plastic package with
copper heat-sink contact tabs. The lead configuration enables easy attachment of a heat sink while
fitting a standard integrated circuit socket or printed
wiring board layout. Type UDN-2952W, for higher
power requirements, is in a 12-pin single in-line
power tab package. The tab is at ground potential
and needs no insulation. For output currents above
700 rnA at normal ambient temperatures, both drivers require an external heat sink.

'"

>

Dwg.No. A-ll.369A

UDN-2952W

3-83

0

UDN-2952B AND UDN-2952W
FULL-BRIDGE MOTOR DRIVERS

ABSOLUTE MAXIMUM RATINGS
at TTAI
+ 70°C

=

TRUTH TABLE

Motor Supply Voltage Range, VBB ............. 4.5Vt040V
logic Supply Voltage Range, Voo .............. 4.5V to 15V
Substrate Voltage Range, VSUB .............. OV to - 20V
logic Input Voltage, VPllASE or VENABII' ................ 30V
Output Current, loUT (UDN-2952B and UDN-2952W) . . .. ± 3.5A
(UDN-2952B-2 and UDN-2952W-2) ... ± 2A
Package Power Dissipation, Po ................ See Graphs
Operating Temperature Range, TA........ - 20°C to + 85°C
Storage Temperature Range, Ts ......... - 55°C to + 150°C

ELECTRICAL CHARACTERISTICS at TA
Figure 1 (unless otherwise noted)
Characteristic

Output Drivers (OUTI or OUT2)
Output leakage Current
Output Saturation Voltage
Output Sustaining Voltage
Motor Supply Current
Clamp Diode Forward Voltage

ENAiill

PHASE

High
low
low

X
High
low

X
X

X
X

VCE(SAn
VCE(SUS)
IBB(ON)
IBB(OFF)
VF

OUTI

OUT2

X

X

<0.8V
<0.8V
>0.9V

>4.5V
>4.5V
>4.5V
OV

Open
High
low
Open
Open

Open
low
High
Open
Open

X

X= Irrelevant.

= + 25°C, VII = 40V, V = 5V, TTu:S + 70°C,
DD

Min.

limits
Typ.
Max.

VENABLE = 5V, VOUT

-

-

VENABLE
VENABLE
VENABLE
loUT = 1A, Figure 2, Notes 1 and 2
loUT = 2A, Figure 2, Notes 1 and 3
VENABLE = 0.8V, Outputs Open, Note 1
VENABLE = 2.4 V, Outputs Open, Note 1
IF = lA, Note 2
IF = 2A, Note 3

-

-

-

1.2
1.5

Test Conditions
ICEl(

Voo

Vss

= VBB, Note 1
= 5V, VOUT = OV, Note 1
= OV, loUT = lA, Notes 1 and 2
= OV, lOUT = 2A, Notes 1 and 3

-

500
-500
1.5
2.0

40
40

-

-

-

15
3.0
1.0
1.8

30
5.0
1.5
2.2

-

-

f1.A

fI.A
V
V
V
V
mA
mA
V
V

Control Logic (PHASE or ENABLE)
logic Open-Circuit Voltage
logic Input Current
logic Input Voltage
logic Supply Current
Sense Trigger Voltage
Turn-On Delay Time
Turn-Off Delay Time

VIN
IIN(l)
IIN(o)
VIN(1)
VIN(O)
IDD
Vss
tpdO
tpdl

IPHASE or IENABlE = - 250 fI.A
VPliASE or VENABLE = 2.4 V
VPtlASE or VENABLE = 0.8V

VENABII = 0.8V
Source Drivers
Sink Drivers
Source Drivers
Sink Drivers

-

7.5
-50 -100
-1.0 -1.6

2.4

-

-

-

-

-

15
850
1.0
0.5
2.0
1.0
175

0.8
30

-

-

-

Thermal Shutdown
TJ
NOTES: 1. Test is performed with VPIIASE = O.BV and then repeated for V""" = 2.4 V.
2. Output measurement at lA are applicable to the UDN-2952B, UDN-2952B-2, UDN-2952W, and UDN-2952W-Z.
3. Output measurements at 2A are applicable only to the UDN-2952B and UDN-2952W.

3-84

-

-

V
~
mA
V
V
mA
mV

f1.s
f1.s
f1.S
f1.S
°C

UDN-29S2B AND UDN-29S2W
FULL-BRIDGE MOTOR DRIVERS

FUNCTIONAL BLOCK DIAGRAM

PHASE
ENABLE

(I\AN
: SUBSTRATE

~

2

V

: GROUND

I

,

I

I

."l.

."l.

o

~

7

l!lJ

i

Vi
Ai

11

2

SSI~
vSS2
lSUBSTRATE
:_______ .. _______ . . _--l
I

o
o

."l.
Dwg. No. A-l1,367C

UDN-2952B 101 PI
UDN-2952W lSI PI

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE
UDN-29S2W

UDN-29S2B

VI
II-

VI

«
;;=

1=
«
;;=

z

z

'"

'"

"-

"-

z0

>=
«
C-

z0

5

>=
«
"o:;
VI

VI
VI

0

0

ffi

'"
~

15

C-

C~

c.o

15

~

c.o

3

«

;:2
u
«
C-

'"
«
C-

~

'"
«

u

~

«
'";;=

~«

~

«

°2~5-----5*0----~75~---1~00~--~~--~

50

75

100

125

150

TEMPERATURE IN DC

TEMPERATU RE I N DC

Dwg. No. A-ll,794

Owg. No. A-ll,793A

3-85

UDN·2952B AND UDN·2952W
FULL·BRIDGE MOTOR DRIVERS

TEST FIGURES
VBB=40V

PHASE o-ti'll'!>---I-Hl......
ENABLE

Vss=OV

O=UDN-2952B

o =UDN-2952W

Dwq.No. A-II.9S0

FIGURE 1

VBB=40V

PHASE

~

T'
..".

O=UDN-2952B
Dwq.No. A-II.981

D=UDN-2952W

FIGURE 2

3-86

UDN-2952B AND UDN-2952W
FULL-BRIDGE MOTOR DRIVERS

TYPICAL APPLICATIONS
UDN-2'I52W

0

0

0

~r£~
P",--ro-:

~

~r£~

~,

I
oF

UDN-2952W

,.,

~ J1

~

r"1

0
"";;I,

r"1r"1 r"1

,...

r"1 r"1r"1

I ....

If' -

I

.....

-r

+5V

+36V

~

,.,,., ...... 1""1

D

+36 V

+5V

+5V

Rs
<

5

....:::>

"-

OUTPUT B

!""'t-

...

<

0

UCN-4202A

l-r~ ~ ~

~~~~~
A

I I

4 ...,

0J

INPUT A

[

~~

...,

L

A

STEP

SLOGIC
12
C
c~~

ID~~
ECONO
STEP
I-SHOT

...

Dwg.No.

~I-l

B~1511

+5V
STEP INPUT

0

J

INPUT A

+5:

INPUT B

+5: 1

L

+
OUTPUT A

i
i
i
_...J

i

0

L

I

+----,
OUTPUT B

,

I
I

0

I

I

,

I

i

I

,
~

Owg.No. A-ll.9a2

NOTES:
1. This is not a bipolar chopper application.
2. Resistor Rs sets the maximum allowable output current for protection against crossover currents
and short circuits. Rs = O.6/1 UMIT '

3-87

+5 v
10K

13

~O

[

P

~

DIRECTION
STEP INPUT
STEP ENABLE

UDN·2952B AND UDN·2952W
FULL·BRIDGE MOTOR DRIVERS

TYPICAL APPLICATIONS (Continued)
FULL-BRIDGE D-C SERVO MOTOR APPLICATION

~-----------------'--~VBB=36V

UDN-29528

[w---+---o Voo =5 V
r1.!:!J-----+---O

01 RECTI ON

1---+--+---0 SPEED (PWM)

Dwg.No. A-ll,984

DIRECTlO~
j

r->5j.1S

SPEED (PWM)

lOUT

Dwg. No. A-11,9B3

3-88

UDN-29S6A AND UDN-29S7A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

UDN-2956A AND UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
COMPRISED of five common collector NPN
Darlington output stages, the associated common base PNP input stages, and a common "enable" stage, the UDN-2956A and UDN-2957A
high-voltage, high-current source drivers are used to
switch the ground end of loads which are directly
connected to a negative supply. Typical loads include telephone relays, PIN diodes, and LEDs. Both
devices will sustain output OFF voltages of -80 V
and will source currents to -500 rnA per driver.
Under normal operating conditions, these units will
sustain load currents of - 200 rnA on each of the five
drivers simultaneously at ambient temperatures up to
+70°C.
The UDN-2956A driver is intended for use with
MOS (PMOS or CMOS) logic input levels operating
with supply voltages from 6 V to 16 V. The UDN2957 A driver has appropriate input current limiting
resistors for operation from TTL, Schottky TTL,
DTL, and 5 V CMOS. With either device, the input
and enable levels must both be biased towards the
positive supply to activate the output load.
Integral transient suppression diodes allow these
devices to be used w.ith inductive loads without the
need for discrete diodes. In order to maintain isolation between drivers, the substrate should be connected to the most negative supply applied.
Input connections are on one side of the dual
in-line package, output connections on the other side
to simplify printed wiring board layout.
The UDN-2956A and UDN-2957A high-voltage,
high-current drivers are supplied in 14-lead dual
in-line packages conforming to JEDEC outline

o
0\11'6.110.1.·10,229

TO-116 (MO-OOIAA). Hermetically-sealed versions of these devices (with reduced package power
dissipation capability) are available.

ABSOLUTE MAXIMUM RATINGS at 25°C
Free-Air Temperature (reference pin 7)
Supply Voltage, VEE ......................... -80 V
Input Voltage, VIN (UON-2956A) ................. +20 V
(UON-2957A) ................. + 10 V
Output Current, lOUT ....................... -500 rnA
Power Dissipation, Po (anyone driver) ............. 1.0 W
(total package) ............ 2.0 W'
Operating Temperature Range, TA ....... -20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to + 150°C
'Derate at the rate of 16.67 mW/oC above 25°C.

3-89

UDN-2956A AND UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Output Leakage Current

Symbol

Applicable
Devices

ICEX

UDN-2956A

UDN-2957A

Collector-Emitter
Saturation Voltage

VCE(SAII

UDN-2956A

UDN-2957A

Input Current

I'N(ON'

UDN-2956A
UDN-2957A

1'N(om
Output Source Current

ALL

=

+ 25°C, VENABLE

=

VIN (unless otherwise specified)

Test Conditions
V'N = VENABLE = 0.4 V, VOUT = -80 V, TA = + 70°C
V'N = 0.4 V, VENABLE = 15 V, VOUT = -80 V, TA = + 70°C
V'N = 15 V, VENABLE = 0.4 V, Your = -80 V, TA = + 70°C
V'N - VENABLE - 0.4 V, Your - -80 V, TA - +70°C
V'N - 0.4 V, VENABLE - 3.85 V, Your - -80 V, TA - +70°C
V'N = 3.85 V, VENABLE - 0.4 V, Your = -80 V, TA = 70°C
V'N
V'N
V'N
V'N
V'N
V'N

= 6.0 V, loUT = - 100 mA
lour = -175 mA
= 10 V, lour = -350 mA

= 7.0 V,

- 2.4 V, lour - -100 mA

= 2.7 V, lour = -175 mA
= 3.9 V, loUT = -350 mA
V~ = 6.0 V, Your = -2.0 V
V'N = 15 V, VOUT = -2.0 V
V'N = 2.4 V, Your - -2.0 V
V'N = 3.85 V, Your = -2.0 V
lour

=

-500/LA, TA

=

+ 70°C

Output Sustaining
Voltage

VCE'SUS)

Clamp Diode
Leakage Current
Clamp Diode
FOlWaro Voltage

IR

ALL

= 5.0 V, VOUT = -2.0 V
= 6.0 V, Your = -2.0 V
= 7.0 V, Your = -2.0 V
= 8.0 V, Your - -2.0 V
= 9.0 V, VOUT = -2.0 V
= 2.4 V, VOUT = -2.0 V
= 2.7 V, VOUT = -2.0 V
V~ = 3.0 V, Your = -2.0 V
V'N = 3.3 V, Your - -2.0 V
V~ = 3.6 V, Your = -2.0 V
V~ = 0.4 V, lour -' -25 mA
V'N = 0.4 V, lour = -25 mA
VR = 80 V

VF

ALL

IF - 350 mA

Turn-On Delay
Turn-Off Delay

tON
tOFF

ALL
ALL

0.5 E'n to 0.5 Eou' RL = 400 n Cr = 25 pF
0.5 E'n to 0.5 Eout. Rl = 400 n Cr = 25 pF

loUT

UDN-2956A

UDN-2957A

UDN-2956A
UDN-2957A

V'N
V'N
V'N
V'N
V'N
V'N
V'N

3-90

Limit
-200/LA
-200/LA
- 200 /LA
- 200 /LA
- 200 /LA
- 200 /LA
-

Max.
Max.
Max.
Max.
Max.
Max.

1.20 V Max.
1.35 V Max.
1.70 V Max.
1.20 V Max.
1.35 V Max.
1.70 V Max.
650 /LA Max.
1.85 mA Max.
675 /LA Max.
1.40 mA Max.
50/LA Min.

-125 mA
-200 mA
-250 mA
-300 mA
-350 mA
-125 mA
-200 mA
-250 mA
-300 mA
-350 mA

Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.
Min.

50 V Min.
50 V Min.
50/LA Max.
2.0 V Max.
4.0...l:':.s Max.
10/Ls Max.

UDN-2956A AND UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

INPUT CURRENT
AS A FUNCTION OF INPUT VOLTAGE

2.0
.#

Vl

~

1.5

LU

0:::

UDN-2956A

LU

c..

:E

«

~
I-

zLU

1.0

V

V

./ ~
V / """
./

0:::
0:::

,

~

~

".

""

~ "'" V
~

~

D

~

~

a
I-

~ 0.5

~

z

""

5

~

6

10
11
9
8
I NPUT VOLTAGE I N VOLTS

7

U

12

4

15

Dwg. No. A-ll,060

1.5

./
UDN-2957A

Vl

~

~ 1.0
LU
c..

:E

«

~
I-

Z

0:::

MAX~

I-

YP~

LU

B 0.5

V
V'"

/ "'"

,/

/
~

~

;

"",-

~

~

:::I

c..
Z

o
2.0

3.0
2.5
INPUT VOLTAGE IN VOLTS

3-91

3.5
Dwg. No. A-ll,061

4. {)

UDN-2956A AND UDN-2957A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ALLOWABLE PEAK OUTPUT CURRENT
AS A FUNCTION OF DUTY CYCLE
....
a::
'"'":::>

u

~~.

~

-400

5'" -300

'" '"
==

~

'"
~
'"

--r-

""""--

NUMBER OF OUTPUTS
..~
CONDUCTING SIMULTANEOUSLY

E

""

~

I ' c;:::~ ....... """"--

........
~
"-

~URRE~T
~ ~ ["'... r--.....

AB'SOLUJ MAxiMUM

-500

u

-200

-100
0

10

20

30

40

50

60

70

PER CENT DUTY CYCLE

!z

80

90 100

Dwg. No. A-ll,062

~

-500't--+-+~FIitIT~.r.::~+,Iol:oloi;j~-+-:"+--I

5 u
~~

-4001r--+--I--+-....3\I~""k:::---F"~c--r-+'=--I

a

.~
< -300Ir--+--I--+---t--+-"'"",,"~""":I=-......=---t==--I
",,,,
""'
"- E
~ ==

""

'"~
""

-200
-10011---+--+--+--t--t--+--1---r--+----i
10

20
PER CENT DUTY CYCLE
ONE OF FIVE DRIVERS

r--------,
R = 10.5 kA for UDN-2956A
R = 2.5 kA for UDN-2957 A

-----,----~

I
I
I
I

INPUT

ENABLE

GROUND

7)-------+---i--+---1---t-----::....-.--_

OUTPUT

SUBSTRATE

8)------_-----'--+---------r---_
L __________ ..J
SUB

Dwg.No. A-1D.24lD

3-92

UDN·2975W AND UDN·2976W
DUAL 4A SOLENOID DRIVERS

UDN-2975W AND UDN-2976W
DUAL 4A SOLENOID DRIVERS

o

FEATURES
•
•
•
•
•
•
•
•

5APeak Output
TTUPMOS/CMOS Compatible Inputs
Low Input Current
Output Voltage to 60 V
Single-Ended or Split Supply
Adjustable Short-Circuit Protection
Internal Clamp Diodes
Plastic SIP With Heat-Sink Tab

CONTROL for operation of a pair of
CURRENT
print solenoids is provided by both Type UDNOJ
OJ

2975W and UDN-2976W. Each IC's dual driver sections operate directly from the printer control line.
The two devices differ only in output-voltage ratings. They can be used at currents of up to 4 A.
Type UDN-2975W is rated at 50 V. Type UDN2976W is rated at 60 V or ± 30 V. Inputs are compatible with most TTL, DTL, LSTTL, and 5 V to
15 V CMOS and PMOS logic.
Current is controlled by a current-sensing latch
method that uses only one external sensing resistor
for each driver. The load current is compared with
the reference voltage and, at the level fixed by the
system designer (V RE~lO = hOAD x RSENsE), a latch
is set, shutting OFF one of the output transistors.
The internal flyback diode then maintains the flux
without further input from the power supply, resulting in maximum efficiency. The latch is reset by pulling the input high.
For the maximum in power-handling capability,
the integrated circuits are supplied in 12-pin single

>

o

. . "".
""
. ""

~



.Dwg.No. A-12,105

in-line power tab packages. For proper operation,
an external heat sink is required. The tab is at VEE
potential and must be insulated from ground when
Type UDN-2976W is used with it split supply.

ABSOLUTE MAXIMUM RATINGS
at TTAB
+ 700 (

=

Supply Voltage, Vee (Ref. VEE, UDN-2975W) . . . . . . . . . . .. 50 V
(Ref. VEE, UDN-2976W) . . . . . . . . . . .. 60 V
VEE (Ref. GND, UDN-2975W) . . . . . . . . . . .. 0 V
(Ref. GND, UDN-2976W) . . . . . . . .. - 30 V
Peak Output Current, loUT' . . . . . . . . . . . . . . . . . . . . . . .. 5A
Input Voltage, VIN • • • • • • • • • • • • • • • • • • • • • • • • • • • • •• 7 V
Reference Voltage, VREF • • • • • • • • • • • • • • • • • • • • • • • • •• 5 V
Package Power Dissipation, PD • • • • • • • • • • • • • • • • See Graph
Operating Temperature Range, TA • • • • • • •• - 20°C to + 85°C
Storage Temperature Range, Ts ......... - 55°C to + 150°C

3-93

UDN·2975W AND UDN·2976W
DUAL 4 A SOLENOID DRIVERS

FUNCTIONAL BLOCK DIAGRAM
(ONE OF TWO DRIVERS)
Vee

SOURCE

"'--+--..---0 - )

LOAD

SINK
SENSE

•......--....-+--0 - -,
~ SENSE

RESISTOR

~ (TYPICALLY 0.1 S2)

VEE_...I

Dwg. No. A-12,106A

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

To maintain isolation between integrated circuit
components and to provide for normal transistor operation, the substrate (pin I) must be connected to
the most negative point in the external circuit.

V>

1=
«
;;::

:::

15

6
a..

z·
0
;:::

«
a..

Vi

V>

C

ffi

TRUTH TABLE

25

a..

LU

'"u

«
><

VIN
High
low
low

«
a..
~

«
'"

~
50

75

100

TEMPERATURE IN

°c

125
Dwg. No. A-ll,794

3-94

VSENSE

NA
VREF/lO

Source
Driver

Sink
Driver

Function

Off
On
Off

Off
On
On

Off
On
Flyback

UDN·2975W AND UDN·2976W
DUAL 4 A SOLENOID DRIVERS

maRICAl (HARAaERISTI(S at TA = + 25°(, T'AB:5 + 70°(, Vee
= VSENSE = 0 V (unless otherwise noted)

= 45 V (UDN.2975W) or 55 V (UDN-2976W),

VEE

limits
Characteristic

Output Drivers
Output Leakage Current

Output Saturation Voltage

Test Conditions
IcEx

VCEISAT)

= 2.4 V, Vcc = 50 V, VSOURCE = 0V
VIN = 2.4 V, VSINK = Vcc = 50 V
UDN-2976W VIN = 2.4 V, Vcc = 60 V, VSOURCE = 0 V
VIN = 2.4 V, VSINK = Vee = 60 V
Both
Source Drivers, ILOAD = 4 A

UDN-2975W

VIN

Sink Drivers, ILOAD
UDN-2975W

IlOAD

UDN-2976W

ILOAD

= 4A

= 4 A, L = 3.5 mH
= 4 A, L = 3.5 mH

Min.

Max.

-

100

-

100

-

100

fIA
fIA
fIA
fIA

3.5

V

-

2.5

V

100

50

-

V

60

-

V

-

2.0

V

Output Sustaining Voltage
(Source drivers only)

VCEISUS)

Clamp Diode Forward Voltage

V,

Both

I,

Output Rise Time

t,

Both

Output Fall Time

t,

Both

ILOAD
ILOAD

VIN(1)
VINIO)

Both
Both

See Notes

IINIl)

Both

VIN

IINIO)

Both

VIN

IRE'Il)

Both

-

Both

= 2.4 V
= 0.4 V
VRE, = 6.0V
VRE, = 2.0 to 5.0 V

Icc

Both

Outputs Open

-

25

mA

lEE

Both

Outputs Open

-

-20

mA

tpd

Both

50% V;, to 50% Vou," Resistive Load

-

3.0

IJ.s

100% V..,.. to 50% Vou,*, Resistive Load

-

3.0

IJ.s

-

1.0

IJ.s

= 4A
= 4 A, 10% to 90%, Resistive Load

-

2.0

IJ.s

= 4 A, 90% to 10%, Resistive Load

-

2.0

IJ.s

2.0

-

V

-

0.5

V

-

20

-

-20

fIA
fIA
fIA

Control Logic
Logic Input Voltage
Logic Input Current

Reference/Sense Ratio
Supply Current
Propagation Delay Ti me
Minimum Reset Pulse Width

t;,

Both

*Where V~".. = V,Ef/lO.5
NOTES: Negative current is defined as coming out of (sourcing) the specific device pin.
For improved noise immunity, hysteresis insures VIN", of 0.8 Vmax. after VIN is 0.5 Vor less.

3-95

9.5

20
10.5

-

II

SERIES UDN-2980A
HIGH,VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

SERIES UDN·2980A
HIGH.VOLTAGE, HIGH·CURRENT SOURCE DRIVERS
FEATURES
• TTL, DTL, PMOS, or CMOS Compatible Inputs
• 500 mA Output Source Current Capability
• Transient-Protected Outputs
• Output Breakdown Voltage to 80 V

RECOMMENDED for applications requiring separate logic and load grounds, load supply voltage to +80 V, and load currents to 500 rnA, Series
UDN-2980A source drivers are used as interfaces
between standard low-power digital logic and relays,
solenoids, stepping motors, and LEDs.
Under normal operating conditions, these devices
will sustain 120 rnA continuously for each of the
eight outputs at an ambient temperature of +50°C
and a supply of + 15 V. All devices in this series
incorporate input current limiting resistors and output transient suppression diodes.

of 6 to 16 V. Types UDN-298IA and UDN-2982A
will sustain a maximum output OFF voltage of
+ 50 V, while Types UDN-2983A and UDN-2984A
will sustain an output voltage of +80 V. In all cases,
the output is switched ON by an active high input
level.

Type UDN-2981A and UDN-2983A drivers are
for use with +5 V logic systems - TTL, Schottky
TTL, DTL, and 5 V CMOS. Type UDN-2982A and
UDN-2984A drivers are intended for MOS interface
(PMOS and CMOS) operating from supply voltages

Series UDN-2980A high-voltage, high-current
source drivers are supplied in I8-lead dual in-line
packages. On special order, hermetically-sealed versions of these devices (with reduced package power
dissipation capability) can also be furnished.

ABSOLUTE MAXIMUM RATINGS

at 25°C Free-Air Temperature
Output Voltage Range, VCE (UDN-298IA & UDN-2982A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. + 5Vto + 50 V
(UDN-2983A & UDN-2984A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. + 35 Vto + 80 V
Input Voltage, VIN (UDN-2981A & UDN-2983A) ............................................. + 15 V
(UDN-2982A & UDN-2984A) .............................. :.............. + 30 V
Output Current, loUT ............................................................. - 500 mA
Power DiSSipation, PD (anyone driver) ..................................................... 1.1 W
(total package) ...................................................... 2.2 W*
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts ............................................... - 55°C to + 150°C
'Derate at the rate of 18 mW/oC above + 25°C.

3-'-96

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

ONE OF EIGHT DRIVERS

v,

\
~

\

,

~~

\

II

\

\.

3K
OUTPUT

\.

\

o
o
OWG.NO. A-IO.242B

\
150

100

50

AMBIENT TEMPERATURE IN ·C
Dwg. No.A·l1,112A

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Output Leakage Current
Collector-Emitter
Saturation Voltage

Symbol
ICEX

VCEISATI

=

Applicable
Devices
UDN-2981/82A
UDN-2983/84A
All
UDN-2981/83A

Input Current

+25°C (unless otherwise specified)

IINIONI
UDN-2982/84A

= 0.4 V·, Vs = 50 V, TA =
= 0.4 V·, Vs = 80V, TA =
= 2.4 V, loUT = -100 mA
= 2.4 V, loUT = - 225 mA
= 2.4 V, loUT = -350 mA
= 2.4 V
VIN = 3.85 V
VIN = 2.4 V
VIN = 12 V
VIN = 2.4 V, VCE = 2.0 V
VIN = 2.4 V, VeE = 2.0 V
VIN = 2.4 V·, Vs = 50 V
VIN - 2.4 V*, Vs = 80 V
VR= 50 V, VIN = 0.4 V·
VR= 80 V, VIN = 0.4 V·
IF = 350 mA
VIN
VIN
VIN
VIN
VIN
VIN

Output Source Current

loUT

UDN-2981/83A
UDN-2982/84A

Supply Current
(Outputs Open)

Is

UDN-2981/82A
UDN-2983/84A

Clamp Diode
Leakage Current

IR

Clamp Diode
Forward Voltage

VF

All

Turn-On Delay

tON

All

0.5 EIN to 0.5 Eour, RL
VS

Turn-Off Delay

tOfF

All

0.5 EIN to 0.5 EOUl , RL
Vs

UDN-2981/82A
UDN-2983/84A

Test
Fig.

Test Conditions

*Allinputs Simultaneously

3-97

= 1000,
= 35 V
= 1000,
= 35 V

+ 70°C
+70°C

Min.

Typ.

1
1

-

-

-

-

2
2
2

-

1.7

3

-

3
3
3

-

2
2

-350
-350

Limit
Max.

Units

200
200

IlA
IlA

1.8

1.8
1.9
2.0

V
V
V

140

200

310
140
1.25

450
200
1.93

IlA
IlA
IlA

-

-

mA
mA

10
10

mA
mA

1.6

mA

4
4

-

5
5

-

-

50
50

IlA
IlA

6

-

1.5

2.0

V

-

-

1.0

2.0

/LS

-

-

5.0

10

/Ls

-

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

TEST FIGURES

DWG. NO.A-ll,OB3

DWG. NO. A-ll ,084

Figure 2

Figure 1

OPEN

OPEN

DWG. NO. A-11,OB6

DWG. NO. A-ll,085

Figure 4

Figure 3

OPEN

DWG. NO. A-ll,OB8

DWG. NO. A.1I,087

Figure 6

Figure 5

3-98

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
TYPE UDN-2981 A/82A
500

45 0

~ 400

:;:
«

RECOMMENDED MAXIMUM OUTPUT CURRENT

350

E

\' \.\ \ "
",,~ ~

\,'\c" ,'"

....

~ 300

:!

a

~

~250

~~

15 0

~
~

100

......

~

~ 200

NUMBER OF OUTPUTS - '
CONDUCTING
SIMULTANEOUSLY

......

~

~~

V, = 15V

~
.............

.......

r---

::::::r........

""r::::

50

o

o

10

20

30

40
50
60
PER CENT OUTY CYCLE

70

80

90

100

Owg. No. A-ll.1078

500

450

u 400

~
«
~

....

350

RECOMMENDED MAXIMUM OUTPUT CURRENT

\ l\\ \

"
~
~
I'"
~~

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

50

0

V. = 15 V

~

", '"
, '"

"-

i'..

~

3'...

~ ~ ~ ......
X ~...... ~ ~ .............

,8

::::::: ;:::::
............

1
I

10

20

30

50
60
40
PER CENT DUTY CYCLE

70

80

90

lOa

Dwg. No. A-ll.lOBB

3-99

o

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
SERIES UDN-2980A
500

450

~

400

<
~ 350

\\ \ '\. "'-.
~

t-

ill

300

3

~ "- ...........
"~ ~
~ ~ ......""-,

'" 250
g

~

",

RECOMMENDED MAXIMUM OUTPUT CURRENT

"

200

NUMBER OF OUTPUTS'"
CONDUCTING
SIMULTANEOUSLY

~

~ 150

i'

~ 100

V. = '35 V

.......

"

.............

~ :::...... ........

I'" :::::::

50

o

o

10

20

30

40

50

60

70

I
80

90

100

PER CENT DUTY CYCLE
Owg. No. A-ll.1068

500

450

~ 400

<
« 350

RECOMMENDED MAXIMUM OUTPUT CURRENT

\ i\\1\ '\.

E

3!:

1
u

~ 250

"~ ~~
~

9

8

200

...~"'

i9
;;(

"
"
,
;:::

\.\ l'\.~ ~ ~

300

')

NUMBER OF OUTPUTS"
CONDUCTING
SIMULTANEOUSLY

150

i

100

50

o

o

V. = 35 V

10

20

30

~

'"

....... ....

............
1'-0..

~
'" ~ ~ r-...;;:::

50
60
40
PER CENT DUTY CYCLE

3-100

3~

70

80

1'-0..

90

100

Dwg. No, A-11.111B

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
TYPES UDN-2983A184A
500

450

1;' 400

:il
!;(

RECOMMENDED MAXIMUM OUTPUT CURRENT

1 350

,
'"
" ::::::"";:::

1\\1\ ~ ~ .....
\ \: ~'" I~ .......

~

...

~

300

'"...,

:J

.......

e'" 250
~

8 200
"~
...~

..........

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

150

~

:;( lOa

Vs

~ ~ r'-....... .... ........
)'~ ~ ~
r----...:

--

= 60 V

50

a

o

10

20

30

50

40

70

60

90

80

lOa

PER CENT DUTY CYCLE
Dwg. No.

A~11.109B

500

450
u
~ 400

!;(
RECOMMENDED MAXIMUM OUTPUT CURRENT

1 350

,~
\

~

!Z
~

300

\ 1\

i\." ~ """\~ ~ ~

'"
a

'"
g

250

g
u 200
"~

~

NUMBER OF OUTPUTS ......
CONDUCTING
SIIMULTANEOU5LY

~ 150

~

Vs

10

20

""

"-

~
-.............
1-0..

........

~

~

" ~~f=:::::~
~

= 60 V

50

o

4

f:S ~ ~

:;( 100

a

'\

~

30

40

50

60

70

80

90

lOa

PER CENT DUTY CYCLE
Dwg. No. A-ll.lIDB

3-101

o

SERIES UDN-2980A
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

INPUT CURRE"T
AS A FUNCTION OF INPUT VOLTAGE

2.5

2.0

1E1.5
~

~/
~~ .

~

.",

:>

...

u 1.0

~

~

~

lL

0.5

V ~ .....

~'"

v

. / io"""'"

~l'\'?\~ ~

;...

~

"~

10

12

INPUT VOLTAGE (VOLTS)
Dwg.No. A-ll,115A

TYPICAL ELECTROSENSITIVE PRINTER APPLICATION

'Nl

'N2

'N3
'N4
'N5

'N6
'N7 ~L-'--"--' >1~-t---L!tl--0/V'-4(
, N8

Vs
Dwg. No. A-ll.113

TYPICAL VALUES: Vs

=

SO V
200·300 mA

lOUT =

3-102

SERIES UDN-3600M
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

SERIES UDN-3600M
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS
FEATURES
•
•
•
•
•
•
•

Four Logic Types
DTUTTUPMOS/CMOS Compatible Inputs
Low Input Current
300 mA Continuous Output Current
Standoff Voltage of 80 V
Pin-for-Pin Replacement for Series LM3600N
Pin-for-Pin Replacement for SN75451BP through SN75454BP
and 75461 through 75464

Description

MINI-DIP dual2-input peripheral power drivers are bipolar monolithic integrated circuits with AND, NAND, OR, or NOR logic gates
and high-current switching transistors on the same chip. The two output
transistors are capable of simultaneously sinking 300 rnA continuously at
ambient temperatures of up to + 70°C. In the OFF state, these drivers will
withstand at least 80 V.
THESE

Applications

Series UDN-3600M dual drivers are ideally suited for interface between
low-level or high-level logic and high-currentlhigh-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, heaters, and other non-inductive loads of
up to 600 rnA (both drivers in parallel).
With appropriate external-diode transient-suppression, Series UDN3600M drivers can also be used with inductive loads such as relays, solenoids, and stepping motors.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .............................................. 7.0 V
Input Voltage, V1N ................................................ 30 V
Output Off-State Voltage, VOFF ....................................... 80 V
Output On-State Sink Current, ION .................................. 600 mA
Power Dissipation, PD • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1.5 W
Each Driver ................................................. 0.8 W
Derating Factor Above TA = 25°C ..................... 12.5 mW/oC or 80°C/W
Operating Free-Air Temperature Range, TA ..................... -20°C to +85°C
Storage Temperature Range, Ts ........................... -55°C to +150°C

3-103

II

SERIES UDN·3600M
DUAL 2·INPUT PERIPHERAL AND POWER DRIVERS

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (V cc>
Operating Temperature Range
Current into any output (ON state)

Min.

Nom.

Max.

4:75
0

5.0
+25

5.25
+85
300

Units
V
°C
rnA

INPUT PULSE CHARACTERISTICS
tp = II's
PRR = 500kHz

tf = 7ns
t, = 14ns

V;nIO, = OV
V;nll) = 3.5V

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
"1" Input Voltage
"0" Input Voltage
"0" Input Current
"1" Input Current
Input Clamp Voltage

Symbol

Temp.

Vee

Test Conditions
Driven
Other
Input
Input

MIN
MIN
MAX
MAX
MIN

V'n(lI
V;nIOI
I;n(OI
';n(lI
V,

Limits
Output

Min.

Typ.

Max.

Units

2.0
0.4 V
30V

30V

50

OV

-12 mA

SWITCHING CHARACTERISTICS at Vee

=

5.0 V, TA

Notes

V
V

0.8
100
10
-1.5

I'A
I'A

2
2

V

= 25°C
limits

Symbol

Test Conditions

Turn·on Delay Time

tpdo

Turn·off Delay Time

tpd'

= 70 V, Rl = 465!l (10 Watts)
Cl = 15 pF
Vs = 70 V, Rl = 465!l (10 Watts)
CL = 15 pF

Characteristic

Min.

Vs

Typ.

Max.

Units

Notes

200

500

ns

3

300

750

ns

3

NOTES:

1. Typical values are at Vee = 5.0V, TA = 25'C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

3-104

SERIES UDN-3600M
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDN-3611M Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Symbol

Characteristic
"1" Output Reverse Current

1.11

"0" Output Voltage

Von

"1" Level Supply Current
"0" level Supply \;urrent

lee(1)
lee(o)

Temp.

NOM
rlUIYI

Test Conditions
Driven
Other
Input
Input
Vee
2.0 V
2.0V
O.SV
O.SV
5.0V
uv

MIN
OPEN
MIN
MIN
MAX
IYI~A

2.0V
2.0V
Vee
Vee
5.0V

Limits
Output

Min.

SOV
SOV
100mA
300mA

U

Typ.

Max.

Units

0.25
0.5
S.O

100
100
0.4
0.7
12

I'A
I'A
V
V
mA
m"

••

00

Notes

1,2
l,l

II

OUTPUT Vs

:tR: --~

INPUT

I

10%

I

~'O%::"::"'---_Vin(O)

I

I

•

I
I

i

'pd'

15pF

I

•

INo.o3)

: -::- LOAD
CIRCUIT

,,-------'
D'·'G. MO. AM7876D

I

--r----I

!"---·otl-'pdQ

I,..-___~'

_OU_T_PU_T_ _ _....IfsO%

50%

L::~::::
DWG. No. A-7628C

Type UDN-3612M Dual NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol

Characteristic
"1" Output Reverse Current

1.11

"0" Output Voltage

Von

"1" level Supply Current
'V Level ~uPPIY l;urrent

lee(l)
lee(o)

INPUT 2.4V

Test Conditions
Driven
ther
9Input
Input
Vee

Temp.

NOM
IWIYI

MIN
OPEN
MIN
MIN
MAX
IYIAA

O.SV
O.SV
2.0V
2.0 V
OV

Vee
Vee
2.0V
2.0 V
OV

O.U V

O.U V

Limits
Output
SOV
SOV
100mA
300mA

Min.

fyp.

Max.

Units
I'A

0.25
0.5
12

100
100
0.4
0.7
14

4U

OUTPUT Vs

INPUT

•

I
I

•I

iI

I
I

'pdQ
15pF

(No'o3)

OUTPUT

: ':" LOAD
I,,_ ...CIRCUIT
____ .J

OW!>. MO. A-1900A

DIIIG. Mo. A-963&

NOTES:
1. Typical values are at Vee = 5.0 V, T.. = 25°C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.

3-105

o,j

Notes

~

V
V
rnA
rnA

1,2
1,2

SERIES UDN-3600M
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDN·3613M Dual OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"1" Output Reverse Current

loff

"0" Output Voltage

Von

"1" Level Supply Current
"0" Level Supply Current

lee(l)
lee(OI

INPUT

Vce=5V

OUTPUT

Test Conditions
Driven
Other
Input
Input
Vee

Temp.

NOM
NOM

MIN
OPEN
MIN
MIN
MAX
MAX

2.0V
2.0 V
O.SV
O.SV
5.0 V
OV

Output

OV
OV
O.SV
O.SV
5.0 V
OV

t.-t

-----i

Vs

limits
Min.

SOV
SOV
100 rnA
300 rnA

-...j ~

Typ.

Max.

Units

Notes

0.25
0.5
S.O
36

100
100
0.4
0.7
13
50

v.A
p.A
V
V
rnA
rnA

1,2
1,2

tf

I~ 1;"::""%"""-9O%""5.,..~-i\)- - - - - - - - -- V;n(l)
INPUT

Rl

:

_ _"':'::::::...J 10-- tp

I
I

I
I
15pF
lNote3)

I
I

tpdl,..---.1

I

V;n(O)
I

1I""---'>\-I-tpdO

'_.J)"'5~----S-~""'\C::~::::

:

I

_OU_T_PU_T_ _ _

.". LOAD
CIRCUIT J I
L _____

wo.

--i\I~

I
I

OWG.IIO ....979f1

DWG. No. A-7628C

MO. i-78778

Type UDN·3614M Dual NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"1" Output Reverse Current

loff

"0" Output Voltage

Von

"1" Level Supply Current
"0" Level Supply Current

lee(1)
lee(ol

Temp.

NOM
NOM

Test Conditions
Driven
Other
Input.
Input
Vee
MIN
OPEN
MIN
MIN
MAX
MAX

O.SV
O.SV
2.0 V
2.0 V
OV
5.0V

O.SV
O.SV
OV
OV
OV
5.0V

limits
Output

Min.

SOV
SOV
100 rnA
300 rnA

Typ.

Max.

Units

Notes

0.25
0.5
12
40

100
100
0.4
0.7
15
50

v.A
p.A
V
V
rnA
rnA

1,2
1,2

OUTINPUT

VCC=-5V

PUT

Vs

INPUT

I

I
:

15pF

: }tNote3)
I .".

LOAD I
JI

OUTPUT

I
CIRCUIT
L
_____
0'110. NO.

0\116.140 . .I.-1900A

"99~2

NOTES:
I. Typical values are at Vce = 5.0 V, TA = 25°C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.

3-106

SERIES UDN-S700A
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

SERIES UDN-5700A
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS
-Transient-Protected Outputs
FEATURES:
•
•
•
•
•

Four Logic Types
DTUTTUPMOS/CMOS Compatible Inputs
Low Input Current
300 rnA Continuous Output Current
Standoff Voltage of 80 V

Description

2-input peripheral and power drivers are bipolar
monolithic integrated circuits containing AND, NAND, OR, or NOR
logic gates, high-current switching transistors, and transient-suppression
diodes on the same chip. The four output transistors are capable of simultaneously sinking 300 mA continuously at ambient temperatures of up to
+ 70°C. In the OFF state, these drivers will withstand at least 80 v.
THESE 16-LEAD QUAD

Applications

Series UDN-5700A quad drivers are ideally suited for interface between
low-level or high-level logic and high-current/high-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, and heaters.
The integral transient-suppression diodes allow their use with inductive
loads such as relays, solenoids, or stepping motors without the need of
discrete diodes. For non-inductive loads, the diode-common bus can be
used for a convenient lamp test.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .............................................. 7.0 V
Input Voltage, VIN ................................................ 30 V
Output Off-State Voltage, VOfF ....................................... 80 V
Output On-State Sink Current, ION .................................. 600 rnA
Suppression Diode Off-State Voltage, VOFF ............................... SO V
Suppression Diode On-State Current, ION .............................. 600 rnA
Power Dissipation, Po ............................................ 2.0 W
Each Driver ................................................. O.S W
Derating Factor Above 25°C ......................... 16.7 mW/oC or 60°C/W
Operating Free-Air Temperature Range, TA ..................... -20°C to +S5°C
Storage Temperature Range, Ts ........................... -55°C to + 150°C

3-107

II

SERIES UDN-S700A
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

RECOMMENDED OPERATING CONDITIONS
Supply Voltage {Vee>:
Operating Temperature Range
Current into any output (ON state)

Min.

Nom.

Max.

4.75

5.0

5.25

o

+25

Units
V

+85

300

mA

INPUT PULSE CHARACTERISTICS
tf = 7ns
t, = 14ns

VlnlOI = OV
Vln(ll = 3.SV

tp = l"s
PRR = SOOkHz

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

"I" Input Voltage

Symbol

Temp.

Test Conditions
Driven
Other
Input
Input
Vee'
MIN
MIN
MAX
MAX
MIN

Vlnll)
VinlO)

"0" I nput Voltage
"0" Input Current
1;'(0)
"I" Input Current
!;nll)
Input Clamp Voltage VI

Limits
Output

Min.

Typ.

Max.

Units

2.0
0.4 V
30V
-12 rnA

SWITCHING CHARACTERISTICS at Vee

30 V
OV

-SO

Notes

V
V

0.8
-100

"A

10

~

-1.S

V

2
2

= 5.0 V, TA = 25°C
Limits

Symbol

Test Conditions

Turn·on Delay Time

IpdO

Turn·off Delay Time

Ipd1

Vs =70 V, RL = 4650 (10 Watts)
CL = 15 pF
Vs = 70 V, RL = 465!l (10 Watts)
CL = 15 pF

Characteristic

Min.

Typ.

Max.

Units

Notes

200

500

ns

3

300

750

ns

3

NOTES:
1. Typical values are al Vee = S.OV, TA = 2SoC.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are with. respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

3-108

SERIES UDN-S700A
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

T,pe UDN-S703A Quad OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"1" Output Reverse Current

loll

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current

ILK
VD
lee(l)
lee(o)

INPUT

Vee -5V

OPEN

Temp.

Test Conditions
Driven
other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

2.0 V
2.0 V
0.8 V
0.8 V
OV
Vee
S.OV
OV

Limits
Output

OV
OV
0.8 V
0.8V
OV

Min.

Typ.

80V
80V
150 mA
300mA
OPEN

0.35
0.5
1.5
16
72

Vee
5.0 V
OV

Max.

Units

100
100
0.5
0.7
200
1.75
25
100

"A
"A
V
V

Notes

"A
V
mA
mA

3
4
1.2
1.2

Max.

Units

Notes

100
100
0.5
0.7
200
1.75
24
98

"A
,.A
V
V

OUTPUT

-------1
'l

I

I

1

15pF

.

1

1

Ipdl

I

-r---'1

1"---oI'lf--1pdO

-c:::::
1

ENota 5):
~lOAD

~ <:~C~I~
JIO.'';'. "0.

A_~

I

OUTPUT

1

/''''''

_J

DWG.1l0,A0.7128C

123A

Type UDN-S706A Quad AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"I" Output Reverse Current

loll

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
VD
ice(l)
leClo)

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

2.0 V
2.0 V
0.8 V
0.8 V
OV
Vee
5.0 V
OV

2.0 V
2.0 V
Vee
Vee
OV
Vee
5.0 V
OV

i--.
ita

--t

Limits
Output

1
1

'pdl

.,. LOAD
DWG.

~O.

-r---'1

OUTPUT
1

A-787SA

----~

1~

--uv,,(I)

10%

Vi,,(O}

1

l(NoteS)
CIRCUIT
L ____
_

0.35
0.5

....j I-- If
«i%

_ _';';';';;....l t - - tp

15pF

Typ.

1.5
16
70

' ' ' ~'''''' ''''''
--1

INPUT

Min.

80V
80V
150 mA
300mA
OPEN

/''''''

1

1

rr----oI·lf-- 'pdO

s""'c:~::
DWG.llo.A"-'I2IC

NOTES:
1. Typical values are at Vee = 5.0 V. TA = 2SD C.
2. Per package.
3. Diode leakage current measured at VR = VoII(m;n~
4. Diode forward voltage drop measured at if = 300 mAo
5. Capacitance values specified inc.lude probe and test fixture capacitance.

3-109

"A
V
mA
mA

3
4
1.2
1.2

o

SERIES UDN-S700A
QUAD2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDN·5707A Quad NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"1" Output Reverse Cu rrent

loff

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
VD
leell}
leelo}

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX

NUM

MAX

O.SV
O.SV
2.0V
2.0 V
Vee
OV
OV
5.uV

limits
Output

Vee
Vee
2.0V
2.0V
Vee
OV
OV
5.0 V

Min.

SOV
SOV
150 mA
300 mA
OPEN

Typ.

0.35
0.5
1.5
24
SO

Max.

Units

Notes

100
100
0.5
0.7
200
1.75
30
106

/JA
/JA
V
V
/JA
V
mA
mA

3
4
1,2
1,2

INPUT
"l:ll!~

JSpF

_ _ _ _ Vln(O}

'pdQ

lIND.eJ}

... LOAD
CIRCUIT
L _____

OUTPUT

.JI

' -_ _J._ - - - - - - Voo,(O}
DWG. MO. A-1900A

Type UDN·5733A Quad NOR Driver

DWG.NO.A-9I67

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol

Characteristic

"I" Output Reverse Current

loll

"0" Output Voltage

Von

Diode J.eakage Current
Diode Forward Voltage Drop
"1" Level Supply Current
"0" Level Supply Current

ilK
VD
leell}
leelo}

INPUT

VeC' 5V

OPEN

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

OUTPUT

O.SV
O.SV
2.0 V
2.0 V

O.S V
O.SV
OV
OV

Vee
OV
OV
5.0 V

Vee
OV
OV
5.0V

Limits
.output
SOV
SOV
150mA
300mA
OPEN

Min.

Typ.

0.35
0.5
1.5
24
SO

Max.

Units

100
100
0.5
0.7
200
1.75
30
100

JJA

Vs

,------,
:

Rl

......~-_i'i__;

:

INPUT

:
" " " ' " " - - - - - Vln(O)

,
lSpF I

I
u

""
0....
u

...0...
w

200

u

INPUT CURRENT IN

~A

- liN
DWG. NO. A-9755A

Figure 8
Figure 7

COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT

Type ULN-2004A SCHEMATIC AND APPLICATION

3-125

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)
The input current as a function of input voltage is
shown in Figure 9 for the ULN-2002A, ULN-2003A,
and the ULN-2oo4A. The Type ULN-200lA Darlington array is not shown since input current is more
a function of the external circuitry. Systems utilizing
either CMOS or PMOS logic should be evaluated for
intrinsic current limiting as was shown in Figure 4.

Low Available Drive Current Operation

Occasionally, applications featuring minimum available input drive current and a high output load current
have shown the Type ULN-2003A and ULN-2004A
Darlington arrays to be inadequate for the particular
requirement under worst case conditions. This usually results from the restricted drive current available
from a TTL or CMOS gate operating from a nominal
supply of 5 volts.
Under worst case conditions with a low logic 1 voltage (2.4 V), and a high input resistor value (3.51 kO),
the available load current is reduced to only 145 rnA.
Compounding this problem would be the effect that a
high drive current requirement would have on the
logic output voltage since that is normally specified at
only 400 /LA. If the gate output is connected to additional logic elements, a minimum logic 1 voltage of
2.0 V must be maintained and at that level the worst
case Darlington load current would be reduced to only
31 mAl

2.0
Z

,
-

~ 1.0

'"

'"
::>

~
,..,.-r .,..,.'"

u

>-

~
~

0.5

12

14

/

.,.~V\CJ>.~
~.,.

..

..,."

.,..,..,.

.-,,, Ir

18
20
22
INPUT VOLTAGE - V,N

16

26

24

0\'113. NO. A-9757A

A simple solution to this problem is through the
use of inexpensive pull-up resistors as shown in Figure
10. The minimum resistor value is determined by the
maximum allowable sink current (16 rnA for TTL,
3601' A for CMOS), the minimum logic 0 output voltage, and the maximum supply voltage as per the following equation:

2.5 .----r--'T"'-"'T"-""'T--r--.,---,---,

z

2.0 1--+--+---+---+--+_--botfC-_t_-_1

,

'Ii

1 ,5

I--+--+-+-----:\;.".~t--;,.

1.0

1--+---b!~ItWM!I_,-=--+_--+--_t_-_1

~

~
~

a
...

it

Vs -

~~~~~~~

0.5

VOllT(O)

Rp > --:---'--'--

lOUT

z

For standard TTL, the minimum value for Rp is
about 316 0 with values between 3000 0 and 5000 0
being used customarily. Multiple pull-up resistors in
a single in-line package are shown in Sprague Engineering Bulletin No. 7041; resistors in a dual in-line
package are shown in Bulletin No. 7042.

o~~~-~-~~~~~~~~-~-~,
2.0

2.5

3.0

3.5

4.0

4.5

5.0

INPUT VOLTAGE - VIN

5.5

6.0

DI'IG.HO. A-9756B

2.0

z
,

1.5

-

1.0

~

a'"
2
Z

0.5

'-"" ~
,-'
~---

o
5

6

~
t. . _ _

"",..

Conclusion

---- --- --p

"",..

Since the Series ULN-2000A high-voltage, highcurrent Darlington transistor arrays are quite conservatively designed, the basic product is fully capable of
being ordered to higher voltages and/or higher currents
than the standard specifications. Presently, parts are
available to withstand up to 95 volts on the output.
Parts with this higher voltage rating would create a
potential for switching loads far in excess of 125 watts!
Aside from the higher power handling capability, the
higher voltage rating is required for driving plasma or
gas-discharge displays.

1'IfIC/>.I.__ -

10

7

,INPUT VOLTAGE - V,N

11

12

0'113. NO. A-fl8!J9A

Figure 9
INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE

3-126

HIGH-CURRENT INTERFACE DRIVERS (Continued)
Although not intended for high power applications, there is also available a Series ULS-2000H
with hennetic sealing and an operating temperature
range to + 125°C. These parts are recommended for
military and aerospace applications as well as commercial and industrial control applications where
severe environments may be encountered.
Cer-DIP, industrial-grade hermetic devices, Series ULQ-2000R, are rated for use over the temperature range of -40°C to +85°C, permitting their use
in commercial and industrial applications requiring a
moderate package power dissipation (1 W at TA =
+85°C).
All of these Darlington transistor arrays offer a
common solution to a great many interface needs.
The minimal component count and straightforward
printed wiring board layout offer benefits in cost
reduction, simplicity of board layout, and savings in
space. Other benefits are a reduction in insertion
costs, and lower handling and inventory costs than
other alternatives. Cost benefits from some of these
factors are not very tangible. However, fewer components, less complex boards, etc. usually result in
lower system manufacturing costs.

ULN-2003A

+Vcc

Rp

DWG.NO. A-10, 115

TTl
OUTPUT

Figure 10
USE OF PULL·UP RESISTORS
TO INCREASE DRIVE CURRENT

3-127

3

HIGH-CURRENT INTERFACE DRIVERS (Continued)

INTERFACE IC MOTOR DRIVE APPLICATIONS
INCORPORATION OF LOGIC
systems and power drivers into a monolithic
mtegrated circuit requires special skill and experience. Sprague Electric Company has
developed such skill, and has long been a leader
in solid-state interface technology and devices.
Improved systems reliability and performance, lower component counts, space savings
THE

and cost economy are some of the benefits to be
derived from the use of Sprague Interface ICs.
An increasing number of these Sprague devices
are especially designed for or are easily adapted
to o;.otor drive applications. The availability of
these devices is especially significant in view of
the increasing use of microprocessor-based controls for servo and stepper motors.

UCN·4202A STEPPER MOTOR TRANSLATOR/DRIVER

UCN-4202A will drive permanent
magnet (PM) stepper motors rated to 500 rnA
and 15 V with a minimum of external components required, or, the device may be used as a
logic translator to drive discrete high-power
transistors or the Sprague UDN-2949Z HalfBridge Motor Driver.
THE

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage, VeE .......................... 13.5 V
Output Current, lOUT ......................... 500 rnA
Supply Voltage, Vee ........................... 5.5 V
Supply Voltage, VK •••••••..•.•.•.•.••••••.••. 13.5 V
Input Voltage, VIN .........•...•........•..... 5.5 V

With the MONOSTABLE RC timing pin (Pin
II) tied to Vee (Pin 16) the circuit performs a
full-step function. States Band D are stationary
states and a separate input pulse is required to
move through each of four output states.
The UCN-4202A internal step logic activates
one of four output sink drivers to step the load
from one position to the next. The logic is activated when the STEP INPUT (Pin 10) is pulled
low for at least 1 /As and then allowed to return
high. The sequence of states is determined by the
DIRECTION CONTROL (Pin 12), either A-BCoD, or A-D-C-B.
In the double-step mode states B and D are
transition states with durations determined by
the MONOSTABLE RC timing (Pin 11). Improved motor torque is obtained at double the
nominal motor step angle, and motor stability is
improved for high step rates.

FULL-STEP MODE
STEP
ENABLE
STEP
INPUT

~ rillS MIN. ~~r
~

~kr~ I

~6~~~~~N _
OUTPUT
A
OUTPUT
B
OUTPUT
C
gUTPUT
TIME/OUT
MONOSTABLE

I I

JJ-t-t--i

ill-+-t

-H--i-H
I I H
1

I
I

II

.-!.......J

II
L

L...J

I

MONOSTABLE ~
RC
~
Dwg.No. A-12.353

3-128

HIGH-CURRENT INTERFACE DRIVERS (Continued)

L/R DRIVE CIRCUIT
Used to Drive A 12-Volt
500 rnA Unipolar Stepper Motor
(Double-Step Mode)

o

OUTPUT~~+i~iD-D~~~~__~__~__~+5V
ENABLER

L':::J-<~~--t---O DIRECTION
CONTROL
+12VO--~----~~

"--i=':''-'1 ~>G!H:,o}----"I----O STEP INPUT

'li--,I----oSTEP ENABLE

Dwg. No. A-II,IS7

UDN-2949Z

TYPICAL A-C MOTOR APPLICATION

+5V

+5V

+5V

UGN-4202A

CD4049AE

10K

-,
10K ~------fm----'N

SPEED,
'" 80 Hz
\
1- -

+24V

-- -

'3.6
, K

510,

K,
I

,

I

15.1
, K

:-I~tF
-=-

DEAD TIME.
'" 50!'s

Dw9. No. 6-14<11;

3-129

HIGH-CURRENT INTERFACE DRIVERS (Continued)

UDN-2949Z HIGH-CURRENT BIPOLAR HALF· BRIDGE MOTOR DRIVER

THE UON-2949Z is a monolithic half-bridge

RECOMMENDED MAX. OPEUTING CONDITIONS

motor driver supplied in a power tab TO-220
style package. The circuit combines sink and
source drivers with diode protection, gain and
level shifting systems, and a voltage regulator
for single-supply operation. The unit is
specifically designed for servo motor drive
applications using pulse width modulation
(chopping).

Supply Voltage Range, Vs ................. 15 Vto 28 V
Input Voltage, VIN ............................ 5.5 V
Continuous Output Current, lOUT ................ ±2.0 A

The chopper drive mode is characterized by a
minimum power dissipation requirement while
allowing the output to switch currents of 2
amperes. Output doc current accuracies of better
than 10"70 at 100 kHz can be obtained.
The UDN-2949Z may be used in pairs (fullbridge) for doc stepper motor or brushless doc
motor drive applications. High load currents or
step rates will usually require an external ground
clamp diode (IN4000) connected at the output
of each device.
The UDN-2949Z power driver may be also be
used in stepper motor bipolar bridge drive circuits for example, with the Sprague UCN-4202A
Stepper Motor Translator/Driver, as shown.

1

2

3

..

5

+ 24 V 0---+.--1--+-+-----'
DIRECTION 0----4--1")01--+-+-----+----1::»-'
SPEED o__--~-. . . .- - - - - - - - '
(PWM)
DWG. NO. A-ll,182

FULL-BRIDGE D-C SERVO MOTOR APPLICATION

~I
li->150ns
SPEED IPWMI

lOUT

+zsv
CWo------'
CCW o - - - - - - - - - - - J
DWG.NO. A-11,241

Owg. No. A-ll.181A

SINGLE-WINDING D-C OR STEPPER MOTOR

Timing Condition.

3-130

HIGH-CURRENT INTERFACE DRIVERS (Continued)

TYPICAL 3·PHASE BRUSHLESS D·C MOTOR DRIVE

II
ULN.3701Z and ULN·3702Z HIGH·CURRENT DRIVERS
THESE HIGH-CURRENT drivers are suitable
for driving d-c motors rated to ± 2.5 A and 18
V with minimum external components. Internal
voltage, current, and temperature shut-down
circuitry protect these devices under the most
severe operating conditions. The ULN-3702Z
does not include the high-voltage shutdown,
allowing operation with supply voltages up to 28
V. The high-gain, high-impedance operational
amplifier configuration allows many specialized
input, output, and feedback arrangements.

Yin

SK

5000

Yin
,0 K

3-131

D .... 'I. t . . f_.II, !'4

HIGH-CURRENT INTERFACE DRIVERS (Continued)

SERIES ULN·2800A DARLINGTON ARRAYS and
SERIES UDN·2980A HIGH·CURRENT SOURCE DRIVERS
THE COMBINATION of separate 8-channel

(max lOUT
rnA max).

source and sink driver ICs provides a single or
twin motor drive interface solution for
"crossover" currents which may occur during
switching transitions. No timing provisions are
necessary provided the external resistance limits
"crossover" currents to the maximum specified
for the ICs (± 500 rnA).

=

± 1.0 A; DIP rating allows:::: 350

Stepper motor bridge driver circuits using
techniques such as that illustrated below should
achieve greater reliability and space economy,
cost reduction and improved performance.

Flyback voltage should not exceed the recommended Vs level (+ 35 V or + 50 V). With a
UDN-2982A/ULN-2803A combination and a
+ 24 V supply the flyback voltage should not exceed + 35 V IV s(max) + VZener(max) +
Vclamp(max)~35 VI.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, Vs
UDN-2982A and ULN-2803A ............... 35 V
UDN-2984A and ULN-2823A ............... 50 V
Peak Output (l00 ms), lop ............... ± 350 mA
Continuous Output Current, lOUT
Single Motor ...................... ± 300 mA
Independent Operation Twin Motors ...... ± 300 mA
Simultaneous Operation Twin Motors ..... ± 150 mA

Single motor drives may be accomodated by
paralleling both inputs and outputs of each IC

UDN·2982A and ULN·2803A Twin Motor Combination

UON- 2982A

~
MOTOR 1
INPUT A

I
MOTOR 1
INPUT B

~

MOTOR 2
INPUT A

~
~
~

~

tt
vLJ.-.

11;,

~.'v.y....

II;;
~
~

~ j:.LJ.-.
LJ.-.
~

.24V~

l,:~

vLJ.-.

J
t-

-

~

INA

JYYYI.....-

INB

MOTOR 1

11;,

~-

UDN- 2803 A

~

MOTOR 2
INPUT B

•

-;,
-;,
"

:;-:--~

~

v~

~

~

vt.t-

;::;-.

;;~

~

JYYYI.....-

.;;

~

~

~
l,;

;- :--~~ J"
v
I.
J,o
~ t-rn

~
MOTOR 2

(..

J"gV

3-132

Dwg. No. A-II, 192

·24V

HIGH-CURRENT INTERFACE DRIVERS (Continued)

UDN-2580A SOURCE DRIVER
THE UDN-2580A SOURCE DRIVER serves as
a direct interface from the Cybernetic Micro
Systems CY500 Motor Controller, utilizing
paralleled inputs and outputs. This IC is most
useful with supplies of up to - 35 V. A selected
version (UDN-2580A-l) is available for operation to - 50 V.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage, VCE ........................... 35 V'"
Output Current, lOUT ....................... -350 rnA
"'Referenced to -V (+5 V and -30 V shown)

D

CY500

ASCII- DECIMAL DATA BUS

Cybernetic
Stepper
Motor
Controller

UDN·2580A Source Driver With Cybernetic CY500

-lOV
DWG. NO. A-ll,195

UDN-2845B and UDN-2846B QUAD DRIVERS
THESE QUAD DRIVERS are designed to
handle high current loads operating from
negative supplies. The doc motor interface
shown uses external diodes for clamping and
commutation. A 10 /AS interval between input
transistions is recommended to prevent "crossover" current damage to the IC.

;::;.

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t----o ccw

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-JOV

Output Voltage, VCE .......................... -35 V
Output Current, lOUT ......................... -1.5 A
Supply Voltage, Vs ............................ 5.0 V
Input Voltage, VIN
UDN·2845B ................................ 5.0 V
UDN·2846B ................................ 12 V

~ ~
15

L; f-IstB

;:;.

RECOMMENDED MAX. OPERATING CONDITIONS

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DWG. NO. A-ll.193

DC MOTOR INTERFACE

3-133

HIGH-CURRENT INTERFACE DRIVERS (Continued)

UCN-4401A and UCN-4801A BiMOS LATCH/DRIVERS

THESE HIGH-VOLTAGE, high-current
latch/drivers are comprised of four or eight
CMOS data latches, a Darlington transistor
driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and
DUTY CYCLE CONTROL functions. Data bits
can be sent to the latch/drivers at rates from 500
kHz (Voo = 5 V) to 1 MHz (Voo = 12 V).

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage, VeE ....
Output Current, lOUT
Supply Voltage, Voo.
Input Voltage, VIN.

Microprocessor power can be utilized more effectively in motor drive systems incorporating
UCN-4401A or UCN-4801A latch/drivers. The
appropriate motor windings can be activated
(usually at millisecond rates) while the microprocessor spends nearly 100070 of its time performing other functions.
A full-step drive scheme implemented with the
4-latch UCN-4401A provides 350 rnA for each
output. The 8-latch UCN-4801A may be used
for systems operating more than one motor,
with 300 rnA available for each output.

. .......... 35 V
... 350 rnA
.15 V
. ......... Voo

STROBE

~~------------------------

A
B
C
o
E

MinImum
Minimum
Minimum
M'n>mum
Minimum

strobe pulsew'dtt' ____ _
data pulse wldth __
data .et-up tlme _____________ 100I'ls
data hold tlme _________ _
duty cycle contr<>j pulsewidll' _____ 300ns

Timing Conditions (Voo = 5.0 V)

·30V

DUTY CYCLE CONTROL

MICROPROCESSOR

Dwg, No.A-ll,191A

3--134

HIGH-CURRENT INTERFACE DRIVERS (Continued)

EXPANDING THE FRONTIERS OF IC INTERFACE
FOR ELECTRONIC DISPLAYS
INTRODUCTION

The original monolithic high-voltage/high-current
power drivers from Sprague were capable of
sustaining 100 V and sinking load currents of 250 rnA
on each of four outputs. That 1970 peripheral driver
capability has since been expanded and improved on
to solve many of the most difficult display interfaces.
Our newest devices are rated for operation to 130 V,
sourcing or sinking to 1.5 A, and as many as eight
drivers per package (not all together) with inputs for
TTL, Schottky TTL, DTL, CMOS, and PMOS.
LAMP (INCANDESCENT) INTERFACE

Utilizing marketing inputs that related to existing
hybrid interface circuits, a group at Sprague designed
and manufactured monolithic ICs which initially
were largely used for aircraft indicator lamp interface. Although not widely known, these quad driver
units were developed quite independently (and
simultaneously) to the ubiquitous TI 75451 series of
high-speed, low-voltage peripheral drivers. A concentration upon circuit design factors, improvements
in DIP packaging (copper alloy lead frames), and
tighter, tougher control of diffusion-related

parameters has allowed the manufacture of quad
power drivers rather than the dual mini-DIPs offered
byTI.
An increased awareness for improvements in
reliability and space and power reductions provided a
rather successful military market for Sprague lamp
and relay interface; early success was evident in
military aircraft indicator lamp interface, a tough
application for TTL type ICs due to severe inrush
currents resulting in secondary breakdown during
"turn on". The increased current sinking capability
of the Sprague ICs offers a solution to lamp interface
that usually obviates the need for "warming"
resistors (across the output) which slightly warm the
lamp filament and thus mmtmtze problems
associated with cold lamp filaments.
The relay driver types of Sprague IC drivers
(and. other similar transient-protected ICs) are
somewhat more useful than the so-called general
purpose types, since the diode common terminal may
be switched for a system lamp test. As shown in'
Figure 1, only a single connection to each DIP is
required.

TIL
OUTPUT

Figure 1

3-135

II

HIGH-CURRENT INTERFACE DRIVERS (Continued)
to a difficult interface problem. A combination of
high-voltage bipolar techniques with thin-film
resistor technology (circuit resistors sputtered over
the IC dielectric) has provided both digit (anode)
and segment (cathode) interface.

The high current-sinking capability of the Sprague
ICs allow such loads as the #327 or #387 lamps to
be driven without difficulty of secondary breakdown. The device beta will usually not allow sinking
of the 10 to 13 times (nominal value) inrush current
of cold lamps; but the lamp rapidly reaches a current
level within the device output limitations (Figure 2
shows current as a function of time for a single #327
lamp). Sustaining this instantaneous inrush current
and its peak power has been a key element in the
success of many lamp interface circuits.

To facilitate a minimum component interface, a
split supply (± 100 V) is employed to allow doc levelshifting (rather than capacitors or >200 V transistors) and both digit and segment drivers incorporate
all pull-up, pull-down, current limiting, off-bias reference, etc. which were formerly required in discrete and/or hybrid systems. With the combination
of the digit and segment drivers (each capable of
withstanding 120 V), the split power supply approach affords PN diode IC technology suitable for
driving a display usually requiring a 180 V minimum
ionization voltage (equivalent to ± 90 V in the split
system).

GAS DISCHARGE DISPLAY ICs

Early in 1972, Sprague successfully produced its
first high-voltage IC designed for gas discharge displays-a five channel, 130 V unit for cathode (segment) interface. Subsequently, other circuits, both
cathode and anode drivers, were produced; most of
which were used in calculator applications with the
Burroughs Panaplex® II. In Figure 3 is shown a display interface system utilizing the UHP-481 and
UHP-491 display drivers, associated thick-film networks, and discretes. This was a step forward, but
still required external discrete components.
Through a collaborative effort begun late in 1973
between Sprague Electric and Burroughs Corp. a
newer, more efficient interface scheme evolved.
Featured in "Electronic Displays '75," this series of
monolithic IC interface devices for the high-voltage
gas discharge panels has been one of the trailblazers
in the world of display interface ICs. Intended for
use in multiplexed display systems, these ICs present one of the easiest and least expensive solutions

The use of the Series UDN-610017100A gas discharge display drivers shows the need for only two
monolithic ICs for displays of up to eight digits and
eight segments as shown in Figure 4. Systems requiring digit or segment counts greater than eight
employ additional driver ICs, and with the exception
of the Type UDN-7180A segment driver, the segment ICs all have outputs with internal current-limiting resistors for the display segments. The UDN7180A device, for reasons of package power dissipation and/or dissimilar segment currents (certain 14
or 16 segment alphanumeric panels) can also be
used, but must have external, discrete current-limiting resistors.

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Type206C .... 216C_llngl.l .... nn.n.twar!q

MILLISECONDS

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3-136

HIGH-CURRENT INTERFACE DRIVERS (Continued)

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Higher current applications are difficult for both
programmable current and switching type display
drivers. Segment currents beyond 2.5 or 3 rnA
present package power dissipation limitations to
By using external
most dual in-line packages.
resistors, the Type UDN-7IS0A driver allows
segment currents of up to 14 mAo

also minimizes problems associated with gas panel
arcing which can destroy programmable current circuits.
Some of the gas display manufacturers
recommend the use of series resistors in each segment
line to prevent destruction to the semiconductor interface circuit should such a panel arc occur.
Without these series resistors (internal thin-film
resistors in Sprague devices) the Ie can be destroyed
by the high voltage and resulting high current should
the panel voltage drop to a very-low level during an
arc.

The transistor switch with current -limiting resistor
scheme used in Sprague gas discharge display drivers

3-137

HIGH.CURRENT INTERFACE DRIVERS (Continued)
Many of the Sprague les used in high-current LED
applications were originally designed for use with
electro-mechanical loads (relays, solenoids, motors,
etc.) although the high-voltage ratings of the drivers
are obviously not a concern. A combination of highcurrent, high-voltage Darlington drivers is shown in
FigureS.

LED INTERFACE

With the obvious abundance and variety of LED
interface integrated circuits it would seem unlikely
that there are still systems in search of an Ie hardware solution to further minimize cost, component
count, space, etc.; but this is definiteiy the case.
The deficiencies are chiefly related to the limited
number of current-sourcing circuits and/or highcurrent drivers.

The ULN-2074B source driver is utilized as a
modified emitter-follower. Through the use of
discrete diodes in the common collector line,
allowing the base to be switched to a potential higher
than the collector, it is then possible to obtain a
saturated output. This prevents the usual emittetfollower problems associated with gain, the MOS
output impedance, and power. It is also possible to
now better define the voltage at the emitter output
and to then provide suitable segment current-limiting
resistors for the LEOs.

The efficiency of LED displays has improved, but
with the larger digit~ (up to 1" presently) most of the
Ie drivers are unable to switch the higher currents
required iii mUltiplexed systems. The rule-of-thumb
generally applied uses the suggested d-c current multiplied by the number of digits in the display.
For example, a multiplexed display of 160 rnA peak
current will give approximately the same light intensitY. output as a steady 20 rnA in each of eight digits.
Of particular difficulty is the switching of currents
associated with the lower efficiency yellow and green
LEDs. Sprague has provided monolithic integrated
circuit solutions to applications requiring segment
currents of 350 rnA and digit currents of up to 1.5
amperes!

The ULN-2oo2A sink driver is a high-current
Darlington array with the capability of switching
multiplexed LEOs with an available limit of 155 rnA
for each of the seven drivers when used at a 100%
duty cycle. Even the more inefficient yellow or green
LEDs can be driven with higher output currents at
lower duty cycles (400 rnA at a 286,10 duty cycle).

rI

I

-f----------

L

I

1/2

ULN-2074A

DWG. NO. A-9n6B

FigureS

3-138

I
J

HIGH-CURRENT INTERFACE DRIVERS (Continued)

DIGIT

SELECT

o
1-- SEGMENT
SELECT

-

-1---------

I
I

I

I

I

I

I
I

1

I
1__ -

II

_ _I

1_-

1;7 ULN-2031A

...!

1_ _ _ _ _ _ _

1/lULN-2081A -or-.

J

ULN-2003A
DII'G.NO.B-1361

FIgure 6

A new eight-channel source driver is shown as a
digit switch for common anode LEDs in Figure 6.
The Series UDN-2980A drivers will handle output
currents to a maximum of 500 rnA. Two basic versions of the driver will allow interface from TTL,
Schottky TTL, DTL, PMOS, and CMOS levels.
Other versions of the ULN-2003A driver are also
available for use with the various logic levels.

The three examples that have been shown for LED
interface represent only a very-small portion of the
total applications area. The high-current capabilities
and high gain of the Sprague drivers represent potential solutions to many difficult LED display systems alphanumeric, seven-segment, or matrix; commoncathode or common-anode; continuous or
multiplexed.

Of the three sink drivers shown, the ULN-2003A is
probably the better choice from a standpoint of both
pinout and component count. It also has straight. forward in-out pinning. The ULN-203IA and ULN2081A devices offer lower cost. They are also interchangeable from a pinning aspect although the output ON voltage will be dissimilar.

A-C PLASMA DISPLAY INTERFACE

Plasma displays, such as those manufactured by
National Electronics/NCR (USA) and NEC or Fujitsu (Japan), all have one common element with their
gas discharge cousin - both types use a neon gas mixture. The plasma panels emit an orange glow when
switched at rather high frequencies, and light output
intensity is a function of frequency. The a-c term for
the plasma display is something of a misnomer since
these panels actually operate from a toggled doc supply (usually in the area of 20 kHz).

A common-cathode LED configuration is shown
in Figure 7 for currents of up to 1.5 A per digit!
A series UDN-2980A source driver is used to switch
the segment side, the ULN-2064B or ULN-2074B to
switch the digit side. As has been shown with Figure
5, the Ie::: package power dissipation must be considered with high-current applications.

The panel is basically a neon-filled capacitor, and
has plates (electrodes) which are covered with the
dielectric - between which is the neon mixture.
Switching this capacitive load presents a problem

3-139

HIGH-CURRENT .INTERFACE DRIVERS (Continued)

PMOS logic levels while the UHP-506 is intended for
use with TTL.
The high-current diodes that are internal to the
Sprague arrays are utilized in the unipolar drive
scheme connected to a suitable OFF reference.
In one POS application, a set of 14 ULN-2023A
Darlington drivers replaced more than 400 discrete
components. The cost and space savings in such a
machine are considerable, and a very complex printed wiring board was greatly simplified.

with high peak currents in addition to the older
problem of the high voltages which are associated
with gas displays. Drive circuits use supply voltages
of 150 to 260 V (depending on unipolar or bipolar
drive), and the semiconductors used must switch instantaneous currents in the order of several hundred
milliamperes for the larger displays.
Several high-voltage, high-current arrays made at
Sprague Electric can provide an answer to one side of
the a-c plasma display interface. The Series ULN2020A Darlingtons are rated at 95 V while the Series
UHP-5oo power drivers are rated at 100 V. They are
both able to handle the application shown in Figure 8
(a basic doc, non-multiplexed clock interface rather
than a more complex multiplexed system). The
ULN-2022A is specifically designed for 14 to 25 V

1-- - - -

-

-

Further improvements in interface and plasma
displays will no doubt evolve, and thus benefit all
concerned - display and interface vendor along with
the end user. Plasma displays are well-suited to
custom panels (particularly those with various sizes
of characters) and with improvements in Ie breakdown voltages some further simplification of interface should evolve.

r---,------,----------,.--+----'-,

1
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1/4 ULN-2064;748

1/4 U LN-2064;7 48
DWG.IIO.B-1363

Flgur.7

3-140

HIGH-CURRENT INTERFACE DRIVERS (Continued)

260 Vp ot 20 kHz

+260 V

liiiiii

Iii i I I i
100 K

.-----------1----....---4 +82 V
1- - - - -

-

-

-

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1/4 UHP-506

OIllG.KO.A-IO.Z90

Flgur••

Another mUltiplexed configuration is shown in
Figure 10; the difference being that a push-pull type
of MOS output is in use, and the pull-down rail does
not allow the UHP-491 substrate, VOO, and output
potentials to be the same. The substrate and output
are tied to the most-negative rail, while the VOO
terminal connects to the - 12 V line for the MOS.

FLUORESCENT DISPLAY INTERFACE

Although the vast majority of fluorescent displays
are directly driven from MOS logic (handheld and
low-cost desk calculators), there is an emerging need
for interface integrated circuits for use with the larger
characters (higher currents) and the higher voltages
coming into use. These blue-green display panels
originated in Japan, and the manufacturers are quite
aggressively pursuing markets such as POS systems,
clocks, cash registers, appliances, automotive
displays, etc. Larger and/or more complex styles are
being made, including displays with alphanumeric
capability (a starburst 14 or 16-segment pattern).

Since these solutions using the older gas discharge
digit driver circuits require the use of appropriate
pull-down resistors, either in discrete or thick-film
network form, a more suitable solution employs the
circuit shown in Figure 11. The UON-611S/2SA
devices are designed specifically for use with
fluorescent displays and include internal pull-down
resistors so that up to eight segments and eight digits
will require only two packages and a greatly simplified power supply. The Type UON-6118A driver
is compatible with TIL, SchottKY TIL, OTL, and 5
volt CMOS. The Type UON-612SA driver is for use
with 6 to 15 volt PMOS or CMOS logic.
The future of fluorescent displays looks rather
strong, particularly if competition further reduces
prices. For the moment at least, these displays will
not seriously tax the capability of IC interface except,
perhaps, from a price/cost standpoint.

Modest voltage capability (60 or 70 volts) is all that
is required of a semiconductor device to drive these
panels, and the currents are in 20 to 30 rnA region.
These electrical requirements are well within the
capability of many gas discharge digit drivers.
In Figure 9, the UHP-491 is shown used with pulldown resistors connected to each output. When both
the segment (equivalent to a vacuum tube anode) and
the digit (controlled by the grid) are switched sufficiently positive with respect to the cathode
(filament), the appropriate display digit/segment are
energized.

3-141

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)
UHP-491
b",,-\

.-d
f----.1VV'--T-l

,-- - - I
SEGMENT
SHEeT

I

I
I

I(7ULN-20Jl;

Figure 12

currents required in brightly lighted applications.
As described, multiplexed schemes can be cumbersome because of the great number of discrete diodes
required. One avionics system using a 16-character,
16-segment alphanumeric panel required 256 discrete
diodes.

The hot wire readouts are available in both sevensegment and alphanumeric (16-segment) versions and
are quite well-suited to high ambient light applications. They do not wash out in sunlight,
although their reliability diminishes with the higher

3-143

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)

DWIJ.NO.A-IO,291

Figure 13

GLOW TRANSFER - BAR GRAPH & MATRIX PANELS

Neon-based display technology has shifted into
many new market areas. The Burroughs Self-Scan®
is a solution to many alphanumeric applications;
the newer bar graph is a solid state replacement for
analog instrumentation. Both use the glow transfer
principle of the dot matrix Self-Scan display.

As illustrated in Figure 13, the bar graph cathode is
easily driven with a Series UHP-480 driver. Signal
level shifting is inexpensively accomplished with
capacitors; the OFF reference, pull-up, and pulldown is done with a few discretes. The anodes are
driven with two discrete transistors (BV CES2:120 V).
By utilizing a negative supply, the level shifting is
easily done in the cathode side. If a positive supply
were used, relatively complex d-c level shifting would
be required in the anode side. The few discretes
necessary in the circuit shown are generally a viable
solution when faced with cost and space parameters
for the system.

The nominal voltage for this type of panel is 250 V.
High-voltage gas discharge drivers (Series UHP-480)
or Darlington arrays (Series ULN-2020A) afford a
cathode iriterface to the glow transfer panel. With a
typical display current of 3 to 5 rnA, the gas
discharge drivers are perfectly adequate. For higher
current applications, the Darlington arrays are a
solution.

SUMMARY

The phenomenal growth in display technology has largely come as a
result of the electronic calculator, and electronic displays will pervade all
our lives in an ever-increasing number of products. The use of digital
displays in appliances, gasoline pumps, electronic games (even pinball
machines), etc., etc., etc., will also require that a continuing evolution of interface integrated circuits meet the challenges of higher brightness, increased currents, improved reliability, and lower system costs.
Both the display and semiconductor industries have demonstrated that
they will meet the challenges of today, and these challenges then become
routine with tomorrow.

3-144

HIGH-CURRENT INTERFACE DRIVERS (Continued)

INTEGRATED CIRCUITS FOR
CURRENT-SOURCING APPLICATIONS
vacuum-fluorescent). They can also be used to
provide multi-channel buffers for discrete power
semiconductors.
The advantages of source drivers for display interface are quite evident. The X- Y addressing of most
readouts requires both source and sink functions to
minimize pin count, interconnections, and package
count.
A more subtle advantage of source drivers is related to their use with inductive loads or incandescent
lamps. Both types of load generate troublesome transients and noise currents on common logic /load
ground lines. In addition, high ground currents can
shift the ground rail, affecting logic input levels,
thresholds, and noise immunity. The use of source
drivers can minimize many of these concerns by
separating the logic and power returns.

DURING RECENT YEARS, the appearance of
·many new low-power monolithic devices (LSI
and microprocessors) has created an increased need
of peripheral power driver integrated circuits. Interface drivers are typically categorized in terms of their
output-drive functions. When current flows out of
the driver output terminal and into the load, the
device is said to "source" current. Conversely, current flows from a load into a "sink" driver.
Sprague integrated source drivers usually consist
of high-voltage PNP devices and high-power NPN
Darlington outputs (which provide PNP-type action), with input-level shifting. These power ICs are
useful for interfacing low-level logic (TTL, CMOS,
NMOS, PMOS) and high-current or high-voltage
relays, solenoids, lamps (incandescent, LED, neon),
motors, and displays (gas-discharge, LED,
FLOATING LOGIC-GROUND LEVEL

(Sink Driver)
tV

LOAD

t5V

LOGIC

INPUT
f----ICONDITIONING

SEPARATE GROUND RETURNS

DWG.NO. A-11,532

(Source Driver)
+V

HIGH
CURRENT

t5V

LOGIC

INPUT
CONDITIONING

LOGI C GROUND

LOAD

!
POWER
GROUND

DWG.NO. A-ll,531

3-145

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)

RELAY-DRIVER APPLICATIONS
UDN-2580A, eight-channel source drivSERIES
ers, and Types UDN-2956A and UDN 2957A,

(+5 V swing) or CMOS (+ 12 V swing) levels. The
active-high input Type UDN-2956A is similar to
Type UDN-2588A-l, but it also has a chip-enable
function that requires a minimum number of drive
lines to control outputs from several packages in a
simple mUltiplex scheme.

c

five-channel source drivers, provide current /voltage
translation from TTL, positive CMOS, or negative
CMOS logic to -48 V telecommunication relays
requiring less than 350 rnA. All devices have internal inductive-load transient-suppression diodes.
Type UDN-2580A-1 is best driven from
negative-reference CMOS or NMOS logic (-5 Vor
- 12 V swing) in order to provide a -48 V swing at
the output. The active-low input Type UDN2588A-1 can be driven from positive logic TTL

RECOMMENDED MAX. OPERATING CONDITIONS
Su pply Voltage, VEE . . . . . . . . . . . . . . . . . . . . . . . . .. - 50 V
Continuous Output Current, lOUT (per output) . . . . .. -350 rnA

TELECOMMUNICATIONS
RELAY DRIVER
(Positive Logic)

TELECOMMUNICATIONS
RELAY DRIVER
(Negative Logic)

UDN·2588A·l

UDN·258OA·l

DWlG.NO. A-ll,538
DWG. NO. A-U,S24

MULTIPLEXED RELAY DRIVER
ENABLE

+5V

TTl

·48V

OUTPUT
nWG. NO. A-ll,5?5

TO OTHER
DRIVERS

3-146

HIGH-CURRENT INTERFACE DRIVERS (Continued)

PRINTER APPLICATIONS

SPRAGUE SOURCE DRIVERS have been used

RECOMMENDED MAX. OPERATING CONDITIONS

extensively in electrosensitive, thennal, and impact printer applications. Multi-channel devices in
the Series UDN-2580A and UDN-2980A reduce
parts count and provide up to 350 rnA per output at
voltages up to 75 V (resistive load). Copper lead
frames make these devices capable of simultaneously delivering up to 125 rnA continuously from all
eight channels at an ambient temperature of +50°C.

Supply Voltage Range, Vs
UDN-2588A-1 .. , , ........................ to 75 V
UDN-2981A and UDN-2982A .............. 5 V to 45 V
UDN-2983A and UDN-2984A .. , ......... 35 V to 75 V
Logic Voltage, VIN ............................. 12 V
Continuous Output Current, loUT (per output) ...... -350 rnA
Peak Output Current, lop .................... - 500 rnA

THERMAL PRINTER APPLICATION

ELECTROSENSITIVE PRINTER APPLICATION

UDN-2588-1

-50V
DWG NO.

I~-

DWG.NO. A-ll.S29

11, S111

3-147

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)

ELECTRO·MECHANICAL DISPLAY APPLICATIONS
DRIVERS in the Series UDN-2580A
SOURCE
and UDN-2980A, when combined with the

input level. All drivers have internal inductive-load
transient-suppression diodes and copper lead frames
for improved package power dissipation capability.

Type ULN-2804A sink driver, provide a simple interface between 12 V CMOS logic and a multiplexed
electro-mechanical display. As shown, the need for
additional inverter packages is eliminated since Type
UDN-2580A is activated by a low input level and
Type UDN-2982A is turned ON by a high input

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, Vs ............................ 35 V
Continuous Output Current, lour (per output) ...... -350 rnA

MULTIPLEXED ELECTRO-MECHANICAL DISPLAY DRIVERS
SEGNfNT
SElECT

a

UDN-2982A

i

1

";J

9
dp

18

..... 44-

"}

~Y+

~

'::}

44..... 44-

':}

~.~

;:)

v 44Vs vy.,.

~

+12V~

~44-

~

rt . . . Lwrt ~~
.-: ::: Y+~ J:-~

).

i:::LJ+
.;:} K~
..K~
LJ+
+12V~

vt

-----

t

ef.;:

-------

f:

~

~-~1

b

b

~---

a

a
b

~

,.
.,;
~~

;r"
II

TO
OTHER
SEGNfNTS

~

6

DIGIT
SElECT
01 ,,"

---} TO
---____
OTHER

--~==

SEGNfNTS

----

O2

03

°4
°5
06
D]
Os

U~2~
1

~

J'oo..

~

;}
~
~
J

:]

~ 7!!

11

:::
"

l+I-

::

~

.....

~

~
~

,:::~C
~ I,;

r: .---}
---~----

~

IE

----

L

t'

.~~;;

DWG.NO. 8-1476

3-148

____

TO
OTHE
DIGI TS

HIGH-CURRENT INTERFACE DRIVERS (Continued)

VACUUM-FLUORESCENT / GAS-DISCHARGE DISPLAY APPLICATIONS

S PRAGUE SERIES

UDN-6100A and UDN25S0A source drivers provide solutions to problems encountered in driving higher-voltage vacuumfluorescent and planar gas-discharge displays. Both
series of parts provide TTL, CMOS, and NMOS
input-logic compatibility. Series UDN-6100A devices are active high (non-inverting) drivers. Series
UDN-25S0A drivers are active low (inverting) devices.

down resistors and provide operation from singleended positive supplies.
Operation from a split-supply allows the user to
bias the V-F filament at ground potential or to utilize
a system-supply voltage above ground (±40 V instead of +SO V). Either Type UDN-613SA or Type
UDN-614SA source drivers are recommended.
For vacuum-fluorescent display applications requiring a higher current capability (operating several
displays with common drive circuitry), Type UDN25SSA can be used with appropriate external output
pull-down resistors to provide up to 350 rnA per
output.

At minimum cost, Series UDN-6100A-2 devices
offer 60 V output breakdowns for vacuumfluorescent displays typically utilizing less than 32
characters. Featuring a minimum SO V output
breakdown voltage, standard Series UDN-6100A
drivers (no additional suffix) guarantee 25 rnA per
output. Suffix -I devices provide for a 110 V breakdown, recommending them for 40 to SO-digit or
dot-matrix V -F applications or gas-discharge
anode-drive applications requiring the higher output
voltage. All of these drivers include internal pull-

GAS-DISCHARGE DISPLAY DRIVERS

MAXIMUM OPERATING VOLTAGES
Vs V,,

VIN ON

+~

<1.4

>4.5

+12

<8.4

>11.5

0

+30

2.4
<0.4
4.0
<0.4
2.4
<0.4
4.0
'<0.4
TTL or CMOS
TTL or CMOS
TTL or CMOS

NA
NA
NA
NA
NA
NA
NA

+40
+SO
+80
+110

VIN Off

Vee

0 ..

V's

Device Type
UDN-2588A
UDN-2588A-1
UDN-l5HHA
UDN-2588A-1
UDN-SI38A-2
UDN-SI48A-2
UDN-SI38A
UON-SI48A
Series UON-SIOOA-2
Series UDN-SIOOA
Series UDN-SIOOA-I

VEElMAXI

-45
75
45
5
-30
-30
40
-40
0
0
0

MOS

LOGIC

MULTIPLEXED VACUUM-FLUORESCENT DISPLAY DRIVERS
+36V

UDN-6118/28A-2

~~~~---------------------------~
~:::::::t=+====~=t=
~r=t=~

-----

,
dp

~

_~U~DN;_;61~18/~28~A~_2J

__

D2 ---{:O--!>--~J--I-D3

~~~~~+-__

~; :~~=-t-=--=-1~-:t---

~~~~~~~-----=
=:::: =~~~~~~~=L
~

! . L- - - - - -

g~ -:~i=!:=i~~~:::::::::::V:BI:AS::~:::::::::::~____.J

DB

DWG. NO. A-ll.522

3-149

II
'

HIGH-CURRENT INTERFACE DRIVERS (Continued)

VACUUM·FLUORESCENT /GAS·DISCHARGE DISPLAY APPLICATIONS
(Continued)
VACUUM-FLUORESCENT DISPLAY DRIVERS
(Split Supply)
+5V

111
01 GIT
SELECT

• FOR ±36V SUPPLY.
USE UON-6138A

DWG. NO. 8-1472

-24V
UON-2588A

SEGMENT
SELECT

111

DIGIT
SELECT

DWG. NO. A-ll,526

3-150

HIGH·CURRENT INTERFACE DRIVERS (Continued)

INCANDESCENT LAMP DRIVER APPLICATIONS

to ten times the nominal operating currents have been
observed. Multiplexed lamps must also incorporate
diodes to prevent series /parallel paths to unaddressed elements.

DRIVING MULTIPLEXED incandescent lamps
at voltages up to 75 V with peak currents approaching 500 rnA per segment, Series UDN-2980A
eight-channel source drivers, when combined with
Type ULN-2069B sink drivers, provide for a very
cost-effective approach. Multiplexed lamps must
typically be operated at a voltage IN (N = the
number of digits) times the nominal doc voltage, to
obtain sufficient brightness. For example, a fourdigit, 28 V display requires 56 V to operate satisfactorily. In addition, care must be taken to select a
proper driver to withstand the substantial inrush currents created by cold filaments. Peak currents of up

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage Range, Vs
UDN-2981A and UDN-2982A .............. 5 V to 45 V
UDN-2983A and UDN-2984A ............. 35 V to 75 V
Continuous Output Current, loUT (per output) ...... -350 rnA
Peak Output Current, lop .................... -500 rnA

MULTIPLEXED LAMP DRIVER, TIL· OR MOS·COMPATIBLE
SEGMENT SELECT
UDN-2983/84A

DIGIT SELECT
ULN-2069/7IB

OWG.NO. B-1475

3-151

o

HIGH-CURRENT INTERFACE DRIVERS (Continued)

LlGHT·EMlnING DIODE APPLICATIONS

SERIES UDN-2580A and Series UDN-2980A
8-channel source drivers provide monolithic solutions to problems associated with driving multiplexed LED displays in common-cathode or
common-anode configurations.

Per output. Outputs may be paralleled for higher
current capability. Type UDN-2982A is logiccompatible with 2.4 V output levels of TTL and
CMOS. Similar high output current ratings, for use
in inverting applications, are offered by the Type
UDN-2580A driver.
Combining Sprague source drivers with multichannel, high-current sink drivers (such as Type
ULN-2068B, UDN-2595A, or ULN-2814A)
provides simple, compact, and economical solutions
to driving high-current multiplexed LED displays.

Type UDN-2585A is a non-Darlington inverting
(input low = output high) source driver that is frequently used as a segment or dot driver in a
common-cathode LED display where multiplexed
segment or dot currents do not exceed 120 rnA. This
device features input logic-level compatibility with
open-collector TTL, standard TTL, CMOS, and
NMOS, as well as low output saturation voltages.

RECOMMENDED MAX. OPERATING CONDITIONS
Supply Voltage, Vs
UDN-2585A ............................... 15 V
UDN-2982A ............................... 45 V
Continuous Output Current, loUT (per output)
UDN-2585A ... ;....................... -120 rnA
UDN-2982A ........................... -350 rnA
In put Voltage, VIN . . . . . . . . . . . . . . . . . . . .. . . . . . . . . 15 V

For common-cathode applications requiring
higher segment currents, or for common-anode digit
drive applications, Series UDN-2980A is recommended. This non-inverting (input high = .output
high) series features 350 rnA per output continuous
current ratings with peak currents reaching 500 rnA

COMMON-CATHODE LED DISPLAY
TO OTHER
SEGMENTS

SEGMENT
SELECT

-1,

rr--<'+5V

~IGIT

SELECT

COMMON-CATHODE LED DI SPLAY

3-152

Owg. No. B-1473A

HIGH-CURRENT INTERFACE DRIVERS (Continued)

LIGHT ·EMlnING DIODE APPLICATIONS
(Continued)

COMMON-CATHODE LED DISPLAY

COMMON-ANODE LED DISPLAY

TO OTHER
SEGMENTS
UDN-1585A

UDN-1981A

~

II I II 1/ II II II 1/

TIL
OUTPUT

+5V

UON-1595A

ULN-1814A

TO
OTHER
DIGITS

OWG.NO.8-1481

3-153

HIGH·CURRENT INTERFACE DRIVERS (Continued)

MULTI·CHANNEL INTERFACE TO HIGH·POWER LOADS

SOURCE DRIVERS can be employed
SPRAGUE
as multi-channel pre-drivers for discrete high-

obtained by using power NPN Darlington devices.
For a-c loads, it is possible to use any of the
Sprague source drivers to provide gate current (with
appropriate current-limiting) to a power SCR or
triac. This scheme can provide an economical solution to many applications such as driving incandescent lamps or a-c motors at up to 20 A.

current or high-voltage semiconductors, thus reducing the need for many discrete components. For
instance, a UDN -2580A 8-channel source driver can
provide up to 350 rnA of pre-drive current into the
base of power NPN devices, making 5 A load currents readily available. Higher load currents can be

DRIVER FOR HIGH·POWER DISCRETE DEVICES

r-----------,
+5V +-+_._-_-----,

I
I

D-C
LOAD

I

UDN-2585A
IL. ___________
.J

r-----------,
+5V~~--.----,

DWG.NO. A-ll.S33

"-'--..:..-------DWG.NO. P.-ll.534

3-154

HIGH-CURRENT INTERFACE DRIVERS (Continued)

NEW POWER-INTERFACE ICs
Introduction

In a continuing effort to maintain industry leadership as a producer of
innovative power-interface chips, Sprague Electric Company recently introduced four new monolithic interface integrated circuits intended for
medium-power switching applications. These power ICs provide integrated multi-channel interface between low-level TTL, CMOS, NMOS,
and PMOS logic families, or microprocessor output ports, and mediumpower peripheral loads such as relays, solenoids, displays, and motors at
currents of up to 1.5 A and at voltages of up to 140 V. 1
The four new integrated circuits are:
UDN-2585A Octal Source Driver (20 V, 120 rnA per channel)
Primarily used as a segment/dot driver in common-cathode multiplexed LED display applications.
UDN-2595A Octal Sink Driver (20 V, 100 rnA per channel)
Primarily a segment/dot driver in common-anode multiplexed LED
display applications or as a medium-power buffer circuit to provide
interface between various logic families and loads (voltage step-up,
voltage step-down, current step-up).
UDN-6514A Octal Source Driver (140 V, 25 rnA per channel)
Primarily for use in high-voltage display applications such as driving
the grids or anodes of the newer large matrix vacuum-fluorescent
display panels used for graphics.
UDN-254IB Quad NAND Sink Driver (60 V, 1.5 Aperchannel)
Primarily a general-purpose high-current, high-voltage interface between TTL, CMOS, PMOS, and NMOS logic and stepper motors,
incandescent lamps, or relays.

All of these drivers add a level of system integration that offers these benefits:

UDN-2585A
Octal Source Driver

Parts-Count Reduction
Printed Wiring Board Area Reduction
Insertion-Cost Reduction
System-Reliability Improvement
Performance Improvement
Overall System-Cost Reduction

The UDN-2585A evolved from a need to drive
segments/dots of multiplexed (common-cathode)
LED displays. Typical multiplexed LED segment!
dot currents range from 50 mA to 100 mA, depending on LED digit size, number of multiplexed digits,
and required display brightness. Frequently, these
displays must operate with 5 V supplies. Moderate
output-current requirements, combined with a need
for low output-saturation voltage. suggest that a
non-Darlington approach would provide an adequate solution for this application. It should be noted
here that source functions are inherently more difficult to integrate.

The success of devices such as those described in
this paper reaffirms customer needs to simplify designs, reduce costs, and improve overall system performance and reliability through the use of power
integrated circuits.
'Simultaneous operation at these voltage and current limits is not
available with a single device.

3-155

HIGH·CURRENT INTERFACE DRIVERS (Continued)

In the multiplexed mode, the supply voltage ( + 5
V) can be broken down into four components:
I. Source Driver Output ON voltage
2. Sink Driver Output ON Voltage
3. LED Forward Voltage
4. Current-Limiting Resistor Voltage Drop

A schematic for one of the eight UDN-2585A
channels is shown in Figure I. This source driver is
an active-low, inverting device with input-drive requirements consistent with TTL, CMOS, and opendrain NMOS levels. The PNP input requires only 1.6
rnA at 0.4 V ( + 5 V logic system, Vs = 5 V) to switch
the output fully to the 120 rnA output-current level.
Input-limiting resistors as well as pull-up resistors
are internal to the device.

A red LED running in saturation (for uniform display brightness) should be driven at approximately
2.0 V with the remaining voltage divided between
the other three elements. Operating from a 5.0 V
supply dictates that driver voltage drops be kept to a
minimum so that adequate display brightness can be
achieved and sufficient "headroom" voltage remains for the required current-limiting resistors.
A 4-digit, 7-segment plus decimal point LED display drive is shown in Figure 2 and requires only two
IC drivers. Typical segment currents might be as
high as 120 rnA, with peak digit currents approaching I A (7-segment plus dp x 120 rnA). The UDN2585A source driver features a guaranteed 1.2 V
maximum saturation voltage at 120 rnA; the ULN2068B sink driver has a guaranteed 1.3 V maximum
at I A (see Sprague Electric Engineering Bulletins
29316 and 29305, respectively). With the LED operating at 2.0 V, this leaves 0.5 V across the 4.3!l current-limiting resistor.

+VS

7.2K

4.8K

L . . -.....-ooOUT

SUB
OWG.NO. A-ll.360

Figure 1

UDN·2585A PARTIAL SCHEMATIC

+VOD

Dwg. No. 8-1514

~igure

2

COMMON-CATHODE LED DRIVER

3-156

HIGH-CURRENT INTERFACE DRIVERS (Continued)

R

-

Vs -

VSAHSOURCE) -

LIMIT -

VSAHSINK) -

UDN-2595A
Octal Sink Driver
As with the UDN-2585A source driver. the UDN-·
2595A current-sink driver is intended for use as
a segment/dot driver in multiplexed (commoncathode) LED display applications. A two-chip approach for driving an 8-digit, 8-segment red LED
display is shown in Figure 4. Combining the UDN2595A sink driver with the UDN-2982A source
driver provides an interface between 5 V TTL,
CMOS, or NMOS, and a 50 mA/segment, 400 mAl
digit LED display. The UDN-2595A sink driver features a guaranteed 0.5 V saturation voltage at 50
mA; the UDN-2982A source driver has an approximate 2.0 V saturation rating at 400 mA (see Sprague
Electric Engineering Bulletins 29320 and 29310, respectively). The 8il current-limiting resistor's value
is determined from the same equation as used for the
previous application.
Currents of up to 120 mA per segment or 1 A per
digit can be obtained by paralleling outputs.
In addition to its LED display applications, the
UDN-2595A can also be used as a logic translator
(NMOS/CMOS, CMOS/TTL, or NMOS/TTL) or
low-level current booster. These applications are
shown in Figure 5.

VF(OIOOE)

IF(DlODE)

If source-sink drivers with higher saturation voltages are used. display brightness and uniformity will
be somewhat reduced. The UDN-2585A is supplied
in a plastic dual, in-line package with copper lead
frame that permits all eight output drivers to be ON
simultaneously and continuously at 120 mA and a
+ 70°C ambient.
This device can also be used to drive discrete
semiconductors such as a power NPN or SCR (Figure 3). With a current-sourcing capability of 120 mA,
load currents up to approximately 2.5 A can be handled with a vanilla-grade NPN and up to 20 A using
a power SCR. These schemes provide economical
solutions to many peripheral-power applications
such as driving incandescent lamps or a-c motors, at
20 A or greater, with Darlingtons and sensitive-gate
SCRs.
The UDN-2585A can be defined as an evolutionary device rather than revolutionary product. Although the device does not break any technological
barriers (in terms of semiconductor processing or
electrical capabilities). it does have merit in many
applications where an economical current-source
function is needed.

r-----------,

r-----------.,
+5V~~----~--------~

+5V~-.--~~------~

D-C

--l

LOAD

--l

l~
UDN-2585A

UDN-2585A

_ _ _ _ _ _ _ _ _ _ _ ..J

Dwg, No. A-12.064

DWG.NO. A-ll.533

Figure 3
DRIVER FOR HIGH-POWER APPLICATION,S

3-157

,

II

HIGH-CURRENT INTERFACE DRIVERS (Continued)
UDN-29B2A

TTl
OUTPUT

'5V
UDN-2595A

Dwg:.

~o.

8-1515

Figure 4
COMMON-ANODE LED DRIVER
12V

--I

5V

12V

5V

i---- ---:- ---------1

i---- -- - - ---------1

I
I
I

I
I
I
I

I

TTl

I UK

I
I
I
I
UDN-2595A
IL _____________
_
Owg. No. A-12,046

Dwg. No. A-12.045

5V

5V

i---- -- - - ---------1
I
I
I
I

Figure 5
UDN-2595A LOGIC TRANSLATOR
OR CURRENT BOOSTER

ADDITIONAL

-=- TIL INPUTS
owg. No. A-12.047

3-158

HIGH-CURRENT INTERFACE DRIVERS (Continued)

Combining the UDN-2595A sink driver with the
UDN-2585A source driver can also provide a lowvoltage (15 V, maximum) bipolar stepper-motor
drive circuit as shown in Figure 6. Paralleling the
outputs of each device provides 200 mA to 400 mA
of drive capability. The non-Darlington outputs of
both devices enable low-voltage operation and
maintain low power dissipation at reasonable current levels. For inductive load transient protection,
external f1yback diodes must be used for the UDN2595A. Clamp diodes are internal to the UDN2585A.
Input-drive requirements for the UDN-2595A are
consistent with TTL, CMOS, and NMOS logic families. Only 1.6 mA (at 0.4 V) of logic sink current is
required to turn the UDN-2595A output ON at the
100 mA level (V s = 5 V). A schematic for one of the
UDN-2595A sink-driver channels is shown in Figure
7. The UDN-2595A is supplied in a plastic dual inline package with a copper lead frame providing
package power dissipation capability of up to 2.2 W
at + 25°C. All eight output drivers are allowed ON

:=

,r

IN O--¥.IIr-----11151

::::J

~

--L:"_r---,

>----1151

UDN-2541B
Quad NAND High-Current Sink Driver
The UDN-2541B quad NAND high-current sink
driver is a 60 V, 1.5 A per output device with nonDarlington saturated outputs. This driver is primarily intended as a general-purpose, high-power, fourchannel driver for incandescent lamps, relays, and
stepper motors. Its most important features are a
non-Darlington saturated output driven by a variable current source operating from the logic-supply
voltage. This provides a much more efficient approach to handling load-inrush currents associated
with incandescent and inductive loads, and minimizes drive-current/power requirements.

+l40V
Dwg:. No. A-ll.6S9

FigureS
MULTIPLEXED DOT-MATRIX
VACUUM-FLUORESCENT DISPLAY DRIVER

3-160

HIGH-CURRENT INTERFACE DRIVERS (Continued)
The typical Darlington driver, with a constantcurrent first stage, although capable of high output
currents, tends to have high output-saturation voltage levels. It also usually requires approximately
6 rnA of first 'stage drive supply current, regardless
of output-current level.

The output structure of the UDN-254IB sjnk
driver is illustrated in Figure 10. Current source II
supplies drive current to a Darlington drive circuit,
QI and Q2, which drives output transistor Q4. With
the collector voltage ofQ4 equal to or less than 0.7
V, transistor Q3 is partially ON. Transistor Q3 bypasses a portion of the II current source from the
first stage Darlington and steers it through Q4 to
ground. Should the Q4 collector rise above approximately 0.7 V (indicating the need for more base
drive), Q3 begins to turn OFF and a greater portion
of the II current is driven through QI and Q2 and
amplified to provide more base drive to output transistor Q4. Thus, supply current is optimized to the
amount of base drive required to keep Q4 in saturation.
Input-drive requirements for the UDN-254IB are
well below TTL, CMOS, PMOS, or NMOS drive
capabilities (20 f.LA source at 2.0 V, 10 f.LA sink at
0.8 V). The modified bat-wing package allows all
four drivers to be operated simultaneously and continuously at 750 rnA output current at + 25°C with a
supply voltage of 5 V. Higher package power dissipation can be achieved through the use of a heat sink
attached to the center webbed leads of the package.
Typical applications for this device include driving
incandescent lamps and doc stepper motors. Incandescent lamps with steady-state current ratings up
to 125 rnA can be driven with no current-limiting or
warming resistors (assumes 1.5 A peak inrush). The
internal diodes can be used to perform a "lamp test"
function as shown in Figure II. Bifilar (unipolar)
stepper motors running at up to 35 V, 1.5 A per
phase, can be driven directly with the UDN-254IB
device. Internal transient-suppression diodes prevent damage to the output transistor from positive
high-voltage inductive spikes as the output switches
OFF. Figure 12 depicts a typical drive circuit with
input waveforms to control a 35 V, 1.5 A per phase
unipolar stepper motor using the ENABLE pin of
the UDN-254IB as a simple STOP/GO function.

The non-Darlington constant-current drive
method features a relatively low output-saturation
voltage, but requires approximately 20 rnA of first
stage drive supply current, regardless of outputcurrent level.
The UDN-254IB uses a non-Darlington output
and a variable-output base-drive current that is a
function of output current. Therefore, operating at
low output current requires minimum base-drive
current (approximately I rnA to 2 rnA). At high output currents, the base-drive current will rise only to
the level required to keep the output driver in saturation (less than 19 rnA drive for 750 rnA output).
Complete specifications are given in Sprague Electric Engineering Bulletin 29317. This technique combines the high-current capability of a Darlington
output with the low saturation voltage of a nonDarlington, and reduces the circuit power dissipation by limiting the base-drive current to what is required to drive the output into saturation.

The UDN-254IB quad NAND-gate power driver
represents a continued effort to improve the performance of power interface integrated circuits by
developing techniques to deal with problems associated with device and packaging power limitations.
At the same time, these new techniques do not significantly add to overall device cost. The user is.
therefore. offered a proposition not frequently encountered in today's marketplace: The opportunity
to get more for less.

OUT

Dwg. No. A-12,049

Figure 10
UDN-2541B PARTIAL SCHEMATIC

3-161

o

HIGH·CURRENT INTERFACE DRIVERS (Continued)

Vee

+5V

INlcr-+-[~~~~~~~r--------1J[--j
I N2 -..r--,--,.,,=--n

ENABLE
I N3 ,-,-~",,"-rL.--'

r

I-

LAMP
TEST

Dwg. No. A-12,048

Figure 11
INCANDESCENT LAMP DRIVER

+5V

INPUT WAVEFORMS

A
A

ENABLE

"--_~r:-:~ ,,~. J

A
Dwg. No. A-ll,79S

il

Figure 12
STEPPER-MOTOR DRIVER

3-162

+28V

BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS

SECTION 4 - BiMOS AND COMPLEX ARRAY INTERFACE DRIVERS
UCN-4202A and 4203A Stepper-Motor Translator/Drivers .......
UCN-4204A 1.25A, 2-Phase Stepper Motor Translator/Driver. . . . .
UCN-4401A and 4801A BiMOS Latch/Drivers ...............
UCN-4805A BiMOS Latched Decoder/Driver ................
UCN-4807A and UCN-4808A Addressable Latched Drivers ......
UCN-4810A 10-Bit. Serial-In. Latched Driver ...............
UCN-4815A BiMOS Latch/Source Driver ...................
UCN-4821A through 4823A 8-Bit Serial-In. Latched Drivers .....
UCN-5800 through 5895A BiMOS II High-Speed Drivers ........
UCN-5810A 10-Bit BiMOS II Serial/Parallel Source Driver. . . . . . .
UCN-5812A 20-Bit BiMOS II Serial/Parallel Source Driver. . . . . . .
UCN-5818A 32-Bit BiMOS II Serial/Parallel Source Driver. . . . . . .
UCN-5832A 32-Bit BiMOS II Serial/Parallel Sink Driver ........

4-2

*
4-9
4-12
4-16
4-22
4-25
4-28
4-32

*
*
*
*

Application Note:
Sprague BiMOS - Muscle for the Microprocessor .......... 4-33
See Also:
BiMos Power Drivers to MIL-STO-883 . . . . . . . . . . . . . . . . . . . 5-90
"New Product. Contact factory for detailed information.

4-1

o

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

FEATURES
•
•
•
•
•
•

600 rnA Output Current
Full-Step or Double-Step Operation
Single-Input Direction Control
Power-On Reset
Internal Transient Suppression
Schmitt Trigger Inputs

g~l~~~

1 r-,,----, IP\\/R-i)NI-----1

DRIVER
OUTPUT

2

13

TIME/OUT
MONQSTABLE

OUTPUT C

DESIGNED TO DRIVE permanent-magnet stepper motors with current ratings of up to
500 rnA, these integrated circuits employ afull-step,
double-pulse drive scheme that allows use of up to 90
percent of available motor torque. The two devices
differ only in output-voltage ratings: Type UCN4202A has a 20 V breakdown-voltage rating and a
15 V sustaining voltage rating; Type UCN-4203A
has a 50 V breakdown-voltage rating and a 35 V
sustaining voltage rating.
Both drivers are bipolar IlL designs containing
approximately 100 logic gates, TTL-compatible
input/output circuitry, and 600 rnA outputs with
internal transient suppressors. The devices operate
with a minimum of external components.
The four-phase stepper-motor load is controlled by
step-Iogicfunctions. To step the load from one position tg the next, STEP INPUT is pulled down to a
logic low for at least 1 I.ts, then allowed to return to a
logic high. The step logic is activated on the
positive-going edge, which in turn activates one of
the four current-sink outputs. DIRECTION CONTROL determines the sequence of states (A-B-C-D
or A-D-C-B).
In the full-step mode, the MONOS TABLE RC
timing pin is tied to Vce, making states Band D
stationary. A separate input pulse is required to move
through each of the four output states.

11

OUTPUT D

GROUND

MONOS TABLE

RC

STEP
ENABLE

DWG. NO. A-11,lB4

tained at double the nominal motor step angle, and
motor stability is improved for high step rates.
Higher current ratings, or bipolar operation, can
be obtained by using Type UCN-4202A or UCN4203A as a logic translator to drive integrated motor
drivers (Sprague Type UDN-2949Z or UDN2952B /W) or discrete high-power transistors.

ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Supply Voltage, Vee ........................... 7.0 V
VK (UCN-4202A) .................. 20 V
(UCN-4203A) .................. 50 V
Output Voltage, VOUT (UCN-4202A) ................. 20 V
(UCN-4203A) .. .. . .. .. . .. .. ... 50 V
Input Voltage, VIN • • • • • • • • • • • • • • • • • • • • • • • • • • • • 7.0 V
Output Sink Current, lOUT ..................... 600 rnA
Power Dissipation, Po (One Driver) ................ 0.8 W
(Total Package) ............ 2.0 W·
Operating Temperature Range, TA ........ -20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to +150"C

In the double-step mode, states Band D are transition states with duration determined by MONOSTABLE RC timing. Improved motor torque is ob-

Derate at the rate of 16.6

4-2

mwrc above +25°C.

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

RECOMMENDED OPERATING CONDITIONS
Min.
4.5

Characteristic
Supply Voltage, Vee
VK
Output Voltage, VeE
Output Sink Current, loUT
Operating Temperature, TA

-

UCN-4202A
TYD.
5.0
12

Max.
5.5
13.5
13.5
500
70

-

0

25

Min.
4.5
-

UCN-4203A
TYD.
5.0
30

-

-

-

0

Max.
5.5
35
35
500
70

25

MAXIMUM COLLECTOR CURRENT
AS A FUNCTION OF MOTOR TIME CONSTANT

t-

z

~300r-~~--r-~~--+---~~~--~--~--+-~

::0

<.>

....::0~200~--~~~--~--+-~~--~--~--~~-=~1
o

~
~

100r---f-

o

...J

:;l

0

0.5

2.0

2.5

MOTOR TIME CONSTANT L1R

3.0

3.5

4.0

4.5

5.0

IN ms
OWG. NO. A-ll.185

Notes: 1. Values shown take into account static d-c losses (VSATl oUT and Veelcel as well as
switching losses induced by inductive flyback through the clamp diodes at VK =
12 V. Maximum package power dissipation is assumed to be 1.33 Wat +70'C.
Higher package power dissipation may be obtained at lower operating temperatures.
2. Use of external discrete flyback diodes will eliminate power dissipation resulting
from switching losses and will allow the fuliSOO mA output capability (Output A, B,
C, or D and the Driver Outputl under all conditions.

4-3

Units
V
V
V
mA

'c

o

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = +5.0 V (unless otherwise noted)
Applicable
Symbol
Devices
Test Conditions
All
2 Drivers ON
lee
TTL Inputs (Pins 1, 9, and 15), TTL Outputs (PIAS 13 and 14)
In put Voltage
All
Yee= 4.5 V
VIN(l)
All
. Vee - 5.5 V
V~IO)
Input (;urrent
All
Vee - 5.5 V, VIN - 2.4 V
IIN(1)
All
Vee - 5.5 V, VIN - 0.4 V
IINIO)
Input Clamp VOltage
VIK
All
liN - -12 mA
Output Voltage
All
Vee - 4.5 V, lour - 80 p.A
VOUTil)
U(;N-4ZUZA Vee - 4.5 V, lour - 3.2 mA
vourlO)
U(;N-4zUJA Vee = 4.5 V,!our. - Ui lilA
Output cu rrent
All
Vee - 5.5 V, Your - 0
lourlsc)
Second-Step Monostable RC Input (Pin 11)
Time Constant
t Re
All
I Reset Voltage
VMR
All
R = 200 kn, liN - 25 p.A
i Heset (;u rrent
All
VIN - 2.0 V
IMR
Schmitt Tnner Inputs (Pins 10 and 12)
Threshold Voltage
All
VT+
VT_
All
Hysteresis
AVT
All
Input Current
All
Vee - 4.5 V, VIN - 2.4 V, TI - 25°C
IIN(1)
All
Vee - 4.5 V, VIN - 2.4 V, TI - 700C
All
Vee - 5.5 V,.'{IN - 0.4 V
lIN~
I Input Clamp Voltage
VIK
All
liN - -12 mA
Open Collector Outputs (Pins 2, 3, 4, 5, and 6)
Output Leakage Current
UCN-4202A Vee = 5.5 V, K = Open, Your = 20 V
1m
UCN-4203A Vee - 5.5 V, K - Open, Your - 50 Y
I Output Satu ration Voltage
UCN-4202A Vee = 4.5 V, lour - 300 mA
VeElSAT)
Vee = 4.5 V, lour - 400 mA
Vee - 4.5 V, lour - 500 mA
UCN-4203A Vee - 4.5 V, lour - 300 mA
Vee - 4.5 V, lour - 400 mA
Vee - 4.5 V, lour - 500 mA
I uutput ~ustammg vOltage
UCN-4202A lour -30 mA, t :$ JUU p.s, Duty Cycle
VeEISUS)
UCN-4203A lour - 30 mA, 1-- :s 300.1l-s, Duty Cycle
Turn-On Delay
0.5 Ein (Pin 10) to 0.5 Eo,!
All
tol~
Turn-Off Delay
All
0.5 Ein (Pin 10) to 0.5 Eo,!
toll
I Clamp Diode Leakage Current IR
UCN-4202A VR= 20 V
UCN-4203A VR= 50 V
I Clamp Diode ~orward VOltage
VF
All
IF - 500 mA

Limits
Min. Max. I Units
85.1 mA

Characteristic
Supply Current

4-4

2.0

-

0.8
40
-1.6
-1.5

2.4

-

-

0.4
0.4
38

V
V
p.A
mA
V
V
V
V
mA

0.95

1.3

slRC

50

mV
p.A

-

-

-

40

-

1.3
0.6
0.2

2.1

-

-

5.0
40
-1.6
-1.5

15
35

-

-

10
10
50
50
3.0

-

:$

-

-

-

2%
2%

1.1

500
500
500
750
900
850
1100
1350

-

:$

-

-

-

V
V
V
p.A
p.A
mA
V
p.A
p.A
mV
mV
mV
mV
mV
mV
V
V
.1l-s
p.s
p.A
p.A
V

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

FUNCTIONAL DESCRIPTION
Power-On Reset

Output Enable

An internal RS flip-flop sets the Output A "ON"
with the initial application of power. This state occurs approximately 30 p,s after the logic supply voltage reaches 4 V with supply rise times of up to
10 ms N. Once reset, the circuit functions according
to the logic input conditions.

Outputs A through D are inhibited (all outputs
OFF) when pin 1 (OUTPUT ENABLE) is at high
level. This condition creates a potential for wiredOR device outputs, or other potential control
functions such as chopping or bi-Ievel drive.

Step Enable

Transient Suppression

Pin 9 (STEP ENABLE) must be held high to
enable the step pulses for advancing the motor to
reach the translator logic clock circuits. Pulling this
pin low inhibits the translator logic.

All five power outputs are diode protected against
inductive transients. Zener diode or resistor
"flyback" transient suppression is often used,
provided the peak output voltage does not exceed the
sustaining voltage rating of the device (15 V for
Type UCN-4202A or 35 V for Type UCN-4203A).

Step Input

Pin 10 (STEP INPUT) is normally high. The logic
will advance one position on the positive transition
after the input has been pulled low for at least 1 MS.
The STEP INPUT current specification is compatible with NMOS and CMOS.

Full-StepiDouble-Step

Full-step operation is the most commonly used
drive technique. The devices are capable of unipolar
drive without external active devices, either in a
full-step mode (pin 11, Monostable RC, tied high),
or in a double-step mode (pin 11 connected to RC
timing). The double-step mode provides improved
torque characteristics, while the specified angular
increment is doubled.

Direction Control

The direction of output rotation is determined by
the logic level at pin 12. If the input is held high the
rotation is A-D-C-B; if pulled low the rotation is
A-B-C-D. This input is also NMOS and CMOS
compatible.
FULL-STEP MODE

DOUBLE-STEP MODE

STEP
ENABLE
STEP
INPUT
DI RECTI ON
CONTROL
OUTPUT

A
OUTPUT

B
OUTPUT
C
OUTPUT
D
TI ME/OUT
MONOSTABLE _:---J
I

MONOSTABLE ~
RC
~
Dwg. No. A-ll ,844

4-5

o

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

STEPPER MOTORS
(Representative List)
LlR

Typ. Ratings

Step

Eastern Air
Devices

LA23ACK-2
LA23ACK-3
LA23ACY-l
LA34ADK-6

1.4 rns
1.25 rns
1.2 rns
2.6 rns

440
220
440
530

rnA,
rnA,
rnA,
rnA,

12
24
12
14

V
V
V
V

1.8°
1.8°
7.5°
1.8°

IMC
Hanson

S-114
S-115
S-382
S-406
S-451

1.6
1.9
1.6
4.3
3.9

340
130
171
280
280

rnA,
rnA,
rnA,
rnA,
rnA,

12
12
24
24
24

V
V
V
V
V

7.5°
7.5°
7.5°
15°
7S

North Arnerican
Phillips

K82701-P2
K83701-P2

1.5 rns
1.5 rns

330 rnA, 12 V
330 rnA, 12 V

7.5°
15°

Manufacturer

Model

rns
rns
rns
rns
rns

Septor

S-0912A

1.5 rns

340 rnA, 12 V

9°

Superior
Electric

M061-FD-30 1
M061-FD-311

0.8 rns
1.5 rns

440 rnA, 12 V
220 rnA, 20 V

1.8°
1.8°

TYPICAL APPLICATIONS
CHOPPER DRIVE CIRCUIT
Used to Drive a 12 V, 500 rnA
Unipolar Stepper Motor
DISC DRIVE
APPLICATIONS

18-20V
rlt-~+---I---4+-------()+12V

UCN-4203A

liiir-----o
=:r.-J-----o

STEP INPUT
STEP ENABLE

4-6

These stepper-motor translator /
drivers provide additional specialpurpose logic for use in disc drive
applications. Pin 14 (STATE A) is
high with OUTPUT A activated and
is used with other drive logic in determining Track 0 Position on the
disc. Pin 13 (TIME/OUT
MONOSTABLE) in disc drive applications is called ON TRACK and
is low with either OUTPUT A or
OUTPUT C activated. It is used as a
WRITE ENABLE condition with
other drive logic.
An independent driver (pins 2
and 15) is used to control the head
load solenoid.

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

TYPICAL APPLICATIONS (Continued)
BIPOLAR DRIVE CIRCUIT
Used to Drive a 500 rnA Stepper Motor

OUTPUT
ENABLE

UDN-2580A

+5V

l'::f--4-{~I-O DIRECTION

""'

¥

Rs ~ 0.6/1 OUTIMAX. )

Y:

I 1

0J

:J
~

4-7

UCN-4202A

~:i
~

~

-

~
RESET
~l~

~::to
H4-.

;;;ts

'DI~::L-f'> ~

IlE f
fr>o~ r-

~~

i4-

~

A

~v
10K

STEP

SLOGIC
-«JiI.
C
Cf--'

~

DI RECTI ON

II

----;:;

SECOND
STEP
I-SHOT

~

Owg. No. B-1497

STEP INPUT
STEP ENABLE

UCN-4202A AND UCN-4203A
STEPPER-MOTOR TRANSLATORS AND DRIVERS

TYPICAL APPLICATIONS (Continued)

A-C MOTOR DRIVE CIRCUIT

Used to Drive a 2 A Synchronous Motor

+sv

+sv

+sv

UCN-4202A
10K

~O

10K

Owg. No. '11-1400'

UNIPOLAR TWO-PHASE DRIVE CIRCUIT

+12V IUCN-4202A)
+30V I.UCN-4203A)

n

I

Used to Drive a 500 rnA
U'lSt
o or
mpo ar epper Mt

(

G'-v
[2

[ r
[

-

3
4

~

""':jQ
....,

::to

6....,~
7

'-----'3
4

1

A

14

STEP
B

13

LOGIC

12

C

~

"

~.,;
~~

~:jQ~tE
::!!::
ASTE :
~:
~

BLOGIC
odi\C
C~
D

Et

~

~

~

t
13

f

~

r

Dwg.

4-8

01 RECTI ON
CONTROL

,... STEP

CLK~ 10

,~JRr;T

8

+5V

10K

l

C

-v-~
::!!:l.
RESET

5 ....,
6
7

~

SECOND
STEP
"SHOT

.r8f--;

rr:

~

IfID

RESET

~,.' ~
"""PtD
DI~~ ~

5

I

~

No.

8-1499

INPUT

UCN-4401A AND UCN-4801A BiMOS LATCH/DRIVERS

~~~,~~~~ OUTPUT
ENABLE

UCN-4401A AND UCN-4801A
BiMOS LATCH/DRIVERS

OUT,
OUT,

FEATURES
•
•
•
•
•

High-Voltage, High-Current Outputs
Output Transient Protection
CMOS, PMOS, NMOS, TTL Compatible Inputs
I nternal Pull-Down Resistors
Low-Power CMOS Latches

OWG.NO. A-IO.499A

TYPE UCN-4401A
OUTPUT
ENABLE

THESE high-voltage, high-current latch /drivers
are comprised of four or eight CMOS data
latches, a bipolar Darlington transistor driver for
each latch, and CMOS control circuitry for the
common CLEAR, S1ROBE, and OUTPUT ENABLE functions. The bipolar /MOS combination provides an extremely low-power latch with maximum
interface flexibility. The UCN-4401A contains four
latch/drivers while the UCN-4801A contains eight
latch /drivers.
The CMOS inputs are compatible with standard
CMOS, PMOS, and NMOS circuits. TTL or DTL
circuits may require the use of appropriate pull-up
resistors. The bipolar outputs are suitable for use
with relays, solenoids, stepping motors, LED or
incandescent displays, and other high-power loads.
Both units feature open-collector outputs and integral diodes for inductive load transient suppression. The output transistors are capable of sinking
500 rnA and will sustain at least 50 V in the OFF
state. Because of limitations on package power dissipation, the simultaneous operation of all drivers at
maximum rated current can only be accomplished by
a reduction in duty cycle. Outputs may be paralleled
for higher load current capability.
The UCN-4401A 4-latch device is furnished in a
standard 14-pin dual in-line plastic package. The
UCN-4801A 8-latch device is furnished in a 22-pin
dual in-line plastic package with lead centers on
0.400" (10.16 mm) spacing. All outputs are pinned
opposite their respective inputs to simplify circuit
board layout.

OUT,
OUT,
OUT,
OUT,

>~+--H!LI OUT,
OUT,
OUT,
OUT,

--......_ _.....r

COMMON

OWG.NO. A-1O.498A

TYPE UCN-4801A

CLEAR

OUTPUT
ENABLE

OWG,NO.A-l0,495A

FUNCTIONAL BLOCK DIAGRAM

4-9

D

UCN-4401A AND UCN-4801A BiMOS LATCH/DRIVERS
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 50 V
Supply Voltage, Voo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Input Voltage Range, VIN ............................... - 0.3 Vto Voo + 0.3 V
Continuous Collector Current, Ic ............................. ; . . . ... 500 rnA
Package Power Dissipation, Po (UCN-4401A) ........................... 1.67 W*
(UCN-4801A) ........................... 2.0 W**
Operating Ambient Temperature Range, TA. . . . . . . . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts ............................ - 55°C to + 125°C
'Derate at the rate of 16.7 mW/oC above T, = 25°C.
**Derate at the rate of 20 mWrC above T, = 25°C.

ELEORICAL CHARAOERISTICS at TA = + 25°C, VDD = 5 V, Vss = 0 V (unless otherwise specified)
Limits
Characteristic
Output Leakage Current

Symbol
ICE)(

Collector-Emitter
Saturation Voltage

VCE(SAn

Input Voltage

VINO
VIN(1)

Input Resistance

RIN

Supply Current

loo(oN)
(Each stage)
loo(oFF)

Clamp Diode
Leakage Current
Clamp Diode
Forward Voltage

IR
VF

Test Conditions
VCE = 50V, TA = +25°C
VCE = 50 V, TA = + 70°C
Ic = 100 rnA
Ic = 200 rnA
Ic = 350 rnA, Voo = 7.0 V

Min.

Typ.

-

-

-

-

Max.
50
100
1.1
1.3
1.6
1.0

Voo = 15 V
Voo = 10 V
Voo = 5.0 V(see note)
Voo = 15 V
Voo=10V
Voo = 5.0 V
Voo=15V
Voo=10V
Voo = 5.0 V
Voo = 5.0 V, All Drivers OFF, All Inputs = 0 V
Voo = 15 V, All Drivers OFF, All Inputs = 0 V
VR= 50 V, TA = + 25°C
VR= 50 V, TA = + 70°C
IF = 350 rnA

13.5
8.5
3.5
50
50
50

-

-

-

-

-

0.9
1.1
1.3

200
300
600
1.0
0.9
0.7
50

-

1.7

2.0

1.7
1.0
100
200
50
100
2.0

Units
j.l.A
j.l.A
V
V
V
V
V
V
V
kO
kO
kO
rnA
rnA
rnA
j.l.A
j.l.A
j.l.A
~

V

*Note: Operation of these devices with standard TIL or DTL may require the use of appropriate pull-up resistors to insure the minimum logic "I".

TRUTH TABLE
OUTPUT
ENABLE

INN

STROBE

CLEAR

0
1

1
1

0
0

X
X
X
X

X
X

0
0
1

X

1
0
0

0
0

0
0

X

t-1

Information present at an input is transferred to its
latch when the STROBE is high. A high CLEAR
input will set all latches to the output OFF condition
regardless of the data or STROBE input levels. A
high OUTPUT ENABLE will set all outputs to the
OFF condition regardless of any other input conditions. When the OUTPUT ENABLE is low, the
outputs depend on the state of their respective
latches.

OUTN
t

X
X
X
X
ON
OFF

OFF
ON
OFF
OFF
ON
OFF

X = irrelevant
t -1 = previous output state
t = present output state

4-10

UCN-4401A AND UCN-4801A SiMOS LATCH/DRIVERS

TIMING CONDITIONS
(Logic Levels are Voo and Vss)

DWG.NO. A-IO,895A

A.
B.
C.
D.
E.
F.
G.

P

(,450

l- t- I-

«

400

1\

l"-

~ 350

I'..

J'..

W

['.,

~ 300

41'-

II NUMBER

OJ

acr

150

9

-

~

iii

4

:=

L

.,:,

~

----@ OUT3

-+Vs

CHI P SELECT

---@

OUT4

-.-@ OUT5

CLEAR
OUTPUT ENA BlE

lOOK

UNUSED I NPUTS SHOULD
BE TIED TO VDO OR GROUND
4

DW9. No. A-l1.913

OUTPUT
ENABU

Dwg. No. A-ll,784

Terminal Designation

Function

ADDRESS

A3-bit binary address on these pins defines which one of the 8 latches is to receive the data.
CIN is the most-significant bit; A'N is least significant.

CHIP SELECT

When th is input is low, the addressed output latch will accept data. When CHIP SELECT is high,
the latches will retain their existing state, regardless of ADDRESS or DATA input conditions.
This input should be held high while ADDRESS is being changed. CHIP SELECT also allows an
additional level of address decoding.

DATA INPUT

When CHIP SElECT is low, the data bit present here is transferred to the addressed latch and
output such that (when OUTPUT ENABLE is high) "1" turns the output ON and "0" turns the
output OFF.
When CLEAR goes from high to low, all latches are reset and outputs are turned OFF.
~y their

OUTPUT ENABLE

When this in put is high, the outputs are controlled
ENABLE is low, all outputs are OFF.

OUTPUTS

These are the 8 open-collector NPN outputs.

DRIVER SUPPLY

This is the supply voltage for the first stage ofthe bipolar output drivers. The nominal supply is
5.0 V.

lOGIC SUPPLY

This is the CMOS logic supply voltage input. Typically it is between 4.75 Vand 15.75 V.

4-17

respective latches. When OUTPUT

o

UCN-4S07A AND UCN-4S0SA

BiMOS

ADDRESSAB~E

LATCHED DRIVERS

ELECTRICAL CHARACTERISTICS atT. = + 25°C, Voo = 5 V(unless otherwise specified)
Characteristic
Symbol
Output Leakage Curent ICEl<
Collector-Emitter
VCEISA!)
Saturation Voltage

Input Voltage

V'NIOI
V"IlI

Input Current

I'NI1I

Input Resistance
Supply Current

UCN-4B07A
Min. Max.
50
0.2
0.3
0.4

Test Conditions
Voul =50V
louT = 50 mA
loul = 100 mA
louT = 150 mA
louT - zuu mA
loul = 350 mA
louT - 500 mA

R'N
10010NI
10010FFI
ISIONI
ISIOFFI

UCN-4BOBA
Min.
Max.
50

-

-

-

-

-

-

-

-

0.8

-

0.5
0.7
1.0
O.B

Voo = 15 V
Voo = 5 V
V'N = Voo = 15 V
V'N = Voo = 5 V

13.5
3.5

-

13.5
3.5

-

-

300
100

-

-

-

300
100

50

-

50

-

One Driver ON, Voo = 15 V
One Driver ON, Voo = 5 V
CLEAR = 0 V, SELECT = Voo = 15 V
CLEAR = 0 V, SELECT = Voo = 5 V
One Driver ON, VS= 5 V
All Drivers ON, Vs = 5 V
ENABLE = 0 V, Vs = 5 V

-

5.0
1.0
300
100
5.5
45
0.1

-

5.0
1.0
300
100
50
160
35

-

-

-

-

-

Units
!LA
V
V
V
V
V
V
-V
V
V
!LA
!LA
kO
mA
mA
!LA
!LA
mA
mA
mA

Note: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure the minimum logic "I".

CAUTION: Sprague CMOS devices have input static protection but
are still susceptible to damage when exposed to extremely high static
electrical charges.

TRUTH TABLE

emJ5

SELECT

X
H
L
L
L
L
L
L
L
L

X
X

CIN

BIN

AIN

CLEAR

DATA

L

X
X

X X X
X X X

D
D
D
D
D
D
D
D

L
L
L
L

H
H
H
H
H
H
H
H
H
X
X

X
X

H
H
H
H
X
X

L
L

L

H

H L
H H
L
L

H
H
X
X

L

H
L

H
X
X

OUTPUT
ENABLE

X
H
H
H
H
H
H
H
H
H
L

H

OUT I OUT, OUTs OUT4 OUT3 OUT, OUT, OUTo

H

H

H

H

H

H

H

H

Clear

R

R

R

R

R

R

R

R

Memory

R
R
R
R
R
R
R

R
R
R
R
R
R

R
R
R
R
R

R
R
R
R

R
R
R

R
R

R

1i

1i

0

1i

R

R
R

R
R
R

R
R
R
R

R
R
R
R
R

D
R
R
R
R
R
R
R

Address Latch 0
Address Latch 1
Address Latch 2
Address Latch 3
Address Latch 4
Address Latch 5
Address Latch 6
Address Latch 7
Blanking

'Ii

H

R

0

H

H

R

R

= Low Logic Level
= High Logic Level
D = Data (High or Low)
X = Irreleva nl
R = Previous Slate
L

H

4-1B

1i

H

R

H
R

R
R
R
R
R
R

H

H

H

R

R

R

UCN-4S07A AND UCN-4S0SA
BiMOS ADDRESSABLE LATCHED DRIVERS
I/O WAVEFORMS

L

CHIPSELECT~ D---tl-'~l
I
-.j!--E
II I ~

OUTPUT '::A~
CIN

BIN

~IIII

ti
~
II, In
F

I '

~~~Ii--I~I~I~~N
I I I

.11

~
,
I

~

I'

I II ~I I~
I

I

AIN~I~~

I

aUTO

0::

«
LLI

-'
U

Vl:I:

~CI

......

'"

Vl
Vl:I:

0:: -

LLlCI
0:: -

0

0

o:I:

«

o:I:

«

I

I

r--

I

r

I

l
......

I

I

---:""1---.
OPERATI ON

I

Vl

~;s:

0:: 0
0-'
0

«

0

Vl:I:

~
co

LLI;s:

~CI

1-0

o:I:

a...

0:: -

0

«

I

I
«
z

:::> -'

I-

:::>

o

II

I

IU

~
LLI:I:
VlCl
a..._:I:
:I:
U

Dwg. No. A-ll, 785

Logic Level
Irrelevant

Allowable
Transition Time

TIMING CONDITIONS
(Logic Levels are Voo and Ground)
A.
B.
C.
D.
E.
F.

Minimum CITi\RPulse Width ................................................................. .
Minimum CHIP SELECT Pulse Width ..................... .
Typical OUTPUT ENABLE (Blanking) Pulse Width .................................................... .
Minimum DATA or ADDRESS Setup Time. . . . . . . . . . . . . . . . . . .. . ........ .
Minimum DATA or ADDRESS Hold Time ...... .
Minimum DATA or ADDRESS Pulse Width .............................. .

4-19

300 ns
500 ns
5.0 fLS
100 ns
100 ns
700 ns

UCN-4S01A AND UCN-4S0SA
BiMOS ADDRESSABLE LATCHED DRIVERS

TYPICAL APPLICATIONS
A typical application for Type UCN-4S0SA, driving a common-cathode
LED display, is shown below. Many multi-character LED displays can
make use of the high-current capability of this device. With the DATA
input held high, the proper address code may be furnished by a 3-bit
counter. Note that with DATA held constant and the ADDRESS sequenced
through the binary code, setup and hold times associated with CHIP
SELECT may be ignored.
The second application illustrates the use of Type UCN-4S07 A or
UCN-4S0SA as a multiplexed power driver. A wide variety of peripheral
loadsincluding lamps, relays, solenoids, LEDs, and stepper motors can be
accommodated. Inductive loads require external transient suppression.
These devices can also be employed as multi-channel drivers for discrete
high-current or high-voltage semiconductors.

Common-Cathode LED Display Driver

+5V

+5V

+5V

~- - - UCN-4808A
V>

'"Gl-;::
'"....z
}>

is

'"'"

V>
V>
V>

'"
'"

r

CLEARo---------~~

()

-i

Owg. No. B~1494

4-20

UCN-4S07A AND UCN-4S0SA
BiMOS ADDRESSABLE LATCHED DRIVERS

TYPICAL APPLICATIONS (Continued)
Multiplexed Power Driver

+14V

+5V

+24V

+24V

+24V

UCN-4807/08A

+5 V O--,..-UJ

LOAD SELECT
(BINARY ADDRESS)
CLOCKo-----i

AL~~~e;,.TDS o - - - - { ] r - '

,lRIr-----o+5 v

(OFF)

'-----L1.!j-- - - - - - -IL

Dwg. No. 8-1495

_______ _

Multichannel Driver
for Discrete Power Semiconductors

-------,
I

I

PNP
POWER

I

D-C

UCN-4807A
OR
UCN-4808A

LOAD

TO
SA

______ -1

Dwg. No. A-ll,786

4-21

II

UCN-4810A
BiMOS 10-BII

SERIAL~INPUT,

LATCHED DRIVER

UCN-4810A
BiMOS la-BIT SERIAL-INPUT, LATCHED DRIVER
FEATURES
•
•
•
•
•

OUT9

High-Voltage Source Outputs
CMOS, PMOS, NMOS, TIL Compatible Inputs
Low-Power CMOS Logic and Latches
Internal Pull-Down Resistors
Wide Supply-Voltage Range

OUT lO
SERIAL DATA OUT

VBB
SERIAL DATA IN
BLANKI NG
OUT I

low-power CMOS logic with biCOMBINING
polar source drivers, the Type UCN-48tOA integrated circuit simplifies many display systems.
This BiMOS to-bit serial-input, latched driver is primarily designed for use with vacuum-fluorescent
displays, but can also be used with LED and incandescent displays within its output limitations of 60 V
and 40 rnA per driver.
Selected devices (UCN-4810A-l) have maximum
output ratings of 80 V and 40 rnA per driver. In all
other respects, Type UCN-48tOA-I is identical to
Type UCN-48tOA.
The CMOS 10-bit shift register and associated
latches are designed for operation over a supplyvoltage range of 5 V to 15 V. They cause minimal
loading and are compatible with standard CMOS,
PMOS, and NMOS logic. When used with standard
TTL or low-speed TTL, appropriate pull-up resistors may be required to ensure an input-logic high.
A CMOS serial data output allows cascading these
devices in multiple drive-line applications required
by many dot matrix, alphanumeric, and bar graph
displays.
The to bipolar outputs are used as segment or digit
drivers in vacuum-fluorescent displays. Under normal operating conditions, the devices will source 25
rnA per output at + 50°C and a duty cycle of 85%.
Other combinations of number of outputs conducting and duty cycle are shown in the specifications.

Dwg. No. A-lO,988

ABSOLUTE MAXIMUM RATINGS
at

+ 25°C Free-Air Temperature and Vss

=0V

Output Voltage, VOUT (UCN-4810A) ................. 60 V
.
(UCN-48IOA-l) .. . . . . . . . . . . . . .. 80 V
Logic Supply Voltage Range, Voo .............. 4.5 Vto 18 V
Driver Supply Voltage Range, VB.
(UCN-48 lOA) ............ 5.0 Vto 60 V
(UCN-48IOA-I) ........... 5.0 Vto 80 V
Input Voltage Range, V1N • • • • • • • • • • •• - 0.3 Vto Voo + 0.3 V
Continuous Output Current, lOUT . . . . . . . . . . . . . . .. - 40 mA
Package Power Dissipation, Po .................. 1.82 W*
Operating Temperature Range, TA • • • • • • •• - 20°C to + 85°C
Storage Temperature Range, Ts ......... - 55°C to + 125°C
*Derate at the rate of 18.18 mWI'C above T.

Number of
Outputs ON
(lOUT = - 25 mAl
10

9
8
7
6
1

= + 25°C.

Max. Allowable Duty Cycle
at Ambient Temperature of
+ 25°C + 40°C + 50°C + 60°C + 70°C

100%
100%
100%
100%
100%
100%

97%
100%
100%
100%
100%
100%

85% 73% 62%
94% 82% 69%
100% 92% 78%
100% 100% 89%
100% 100% 100%
100% 100% 100%

Caution, Sprague Electric CMOS devices have input static protection but are
susceptible to damage when exposed to extremely high static electrical charges.

4-22

UCN-4810A
BiMOS 10-BIT SERIAL-INPUT, LATCHED DRIVER

mORICAlCHARACTERISTlCSatT. = +25°C,V•• = 60V,VDD = 4.75 Vto 15.75V,Vss = OV
(unless otherwise noted)
Characteristic
Output OFF Voltage
Output ON Voltage

Symbol
Your
Your

Output Pull-Oown Current

lour

Output Leakage Current
Input Voltage

V'NIl)

Input Current

V'NIO)
I'NIl)

Input Impedance
Serial Oata Output Resistance
Supply Current

lOUT

l'N
ROUT
IBB
100

Test Conditions

Min.
-

lour = -25 rnA, VBB = GOV
lour = - 25 rnA, VBB = 80 V, UCN-4810A-1 only
VOUT = VBB
VOUT = 80 V, UCN-481OA-1 only

57.5
77.5
400
550

TA = + 70°C
Voo = 5.0V
Voo = 15V

-

3.5
13.5
-0.3

Voo = V'N = 5.0 V
Voo = V'N = 15V
Voo = 5.0 V
Voo = 5.0V
Voo = 15V
All outputs ON, All outputs open
All outputs OFF, All outputs open
Voo = 5.0 V, All outputs OFF, All inputs = 0 V
Voo = 15 V, One output ON, All inputs = 0 V
Voo
Voo

= 5.0 V, One output ON, All inputs = 0 V
= 15 V, One output ON, All inputs = 0 V

-

Limits
Max.
1.0
-

850
1150
-15
5.3
15.3
+0.8
100
300

50

-

-

-

20
G.O
13
200
100
200
1.0

-

3.0

-

-

Units
V
V
V
~
J.LA
~
V

V
V
J.LA
~
kfl
kfl
kfl
rnA
~
J.LA
J.LA
rnA
rnA

NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.

TYPICAL INPUT CIRCUIT

FUNCTIONAL BLOCK DIAGRAM

6 SERIAL
DATA OUT
Dwg. No. A-IO,980

TYPICAL OUTPUT DRIVER

vss
MOS

27K

15K

lOOK
OUT8 OUTq OUTIO

VSS

Dwg. No. A-10.989

Dwg. No. A-1O.98l

4-23

II

UCN-4810A
BiMOS 10-BIT SERIAL-INPUT, LATCHED DRIVER

CLOCK

I

!-I____~__

. thC-l
DATA IN

----'~ ~-D-I--E- , - - - - -

E:::~

~ ,L.-l-----------------

OUT N

Ir------:._--Jr---

1

Dwg. No.

A~10,990A

TIMING CONDITIONS
(Logic Levels are Voo and Vss )

Voo = 5.0V
A.
B.
C.
D.
E.
F.

Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ......................... .
Minimum Data Pulse Width ............................................. , ...... .
Minimum Clock Pulse Width .................................................... .
Minimum Time Between Clock Activation and Strobe ............................ .
Minimum Strobe Pulse Width ................................................... .
Typical Time Between Strobe Activation and Output Transition ............................ .

250 ns
500 ns
600 ns
1.0 fLs
500 ns
1.0 fLs

Voo = 15 V
150 ns
300 ns
250 ns
400 ns
300 ns
1.0fLs

tinue to accept new data as long as the STROBE is
held high. Applications where the latches are bypassed (STROBE tied high) will require that the
BLANKING input be high during serial data entry.

SERIAL DATA present at the input is transferred
to the shift register on the logic "0" to logic" I"
transition of the CLOCK input pulse. On succeeding
CLOCK pulses, the registers shift data information
towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the
rising edge of the CLOCK input waveform.

When the BLANKING input is high, all of the output buffers are disabled (OFF) without affecting the
information stored in the latches or shift register.
With the BLANKING input low, the outputs are
controlled by the state of the latches.

Information present at any register is transferred
to its respective latch when the STROBE is high
(serial-to-parallel conversion). The latches will con-

UCN-4810A TRUTH TABLE
Serial
Data
Input
H
L
X

Shift Register Contents
Clock
Input
J"J"-

L-

111,13 ..... 181,110
HRl R, ... R, R8 R,
L Rl R, ... R, R8 R,
Rl R, R3 .. R8 R, RID
XXX ...... XXX
PI P, P, .. P8P, PID

Serial
Data
Output
R,
R,
RID
X
PID

Output Contents

Latch Contents
Strobe
Input

L
H

111,13 ..... 181,110

Blanking
Input

111,1 3", .. 18 1,110

Rl R, R3 .. R8 R, RID
P, P, P, .. P8P, PIO
XXX ...... XXX

L
H

PI P, P, .. P8P, PID
LLL ....... LLL

L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State

4-24

UCN-4815A
BiMOS LATCH/SOURCE DRIVER

UCN·4815A
liMOS LATCH/SOURCE DRIVER

L-'-'----'

r-----l..l:!J BLANKI NG
.YDD

FEATURES
•
•
•
•
•

High-Voltage Source Outputs
CMOS, PMOS, NMOS, TTL Compatible Inputs
Low-Power CMOS Latches
Internal PUll-Down Resistors
Wide Supply Voltage Range

II

primarily for use with high-voltage
D ESIGNED
vacuum fluorescent displays, the UCN-481SA

Dwg. No, A-1O.987

BiMOS latch/source driver consists of eight NPN
Darlington source drivers with pull-down resistors,
a CMOS latch for each driver, and common strobe,
blanking, and enable functions.
The CMOS inputs provide for minimum loading
and are compatible with standard CMOS, PMOS,
and NMOS logic commonly found in microprocessor designs. The use of CMOS latches also allows
operation over a supply voltage range of S V to
IS V. When employed with either standard TTL or
low speed TTL logic, the UCN-481SA may require
the use of appropriate pull-up resistors.

ABSOLUTE MAXIMUM RATINGS at 25°C
Free-Air Temperature and Vss = 0 V
Output Voltage, VOUT ........................... 60 V
Logic Supply Voltage Range, Voo ............ 4.5 V to 18 V
Driver Supply Voltage Range, VBB ••••••••••• 5.0 V to 60 V
Input Voltage Range, VIN ........... -0.3 V to Voo +0.3 V
Continuous Output Current, loul ................ -40 mA
Package Power Dissipation, Po .................. 2.0 W·
Operating Temperature Range, T. . ....... - 20°C to + 85°C
Storage Temperature Range, Ts ........ -55°e to + 125°e
"Delate at the late of 20 mW/oC above T. = 25°C.

The bipolar outputs may be used as segment, dot
(matrix), bar, or digit drivers in vacuum fluorescent
displays. All eight outputs can be activated simultaneously at ambient temperatures up to 60°C. To
simplify circuit board layout, all outputs are pinned
opposite their respective inputs.
A minimum component display subsystem, requiring few or no discrete components, may be
realized by using the UCN-481SA BiMOS Latch/
Source Driver with either a UCN-480SA or UCN4806A latched hexadecimal decoder/drivers or a
UCN-481OA serial-to-parallel latch/driver.

Number of
Outputs ON
(lOUT = - 25 mAl

8
7
6

Max. Allowable Duty Cycle
at Ambient Temperature of
50°C
we
70 0 e
100%

100%

11

86%
98%
100%

J()'O%

Caution: Sprague CMOS devices feature input static protection but are still
susceptible to damage when exposed to extremely high static electrical charges.

4-25

UCN·4815A
BiMOS LATCH/SOURCE DRIVER

ELECTRICAL CHARACTERISTICS at T,
(unless otherwise noted)
Characteristic
Output. OFF Voltage
Output ON Voltage
Output Pull-Down Current
Output Leakage Current
Input Voltage

Symbol

IoU! = - 25 rnA
VOUT = Vee
TA = 70·C
Voo = 5.0 V
Voo = 15 V

louT
VINIl)
VINIO)
IINII)

Input Impedance
Supply Current

lIN
lee

IS

850
-15
3.5
5.3
13.5
15.3
-0.3
+0.8
100
300
50
10.5
100
100
200
1.0
3.0
-

-

..

defined as gOing mto (coming out of) thtf specified device Pin .

UCN-4815A TRUTH TABLE
Inputs
STROBE ENABLE

o

1
X
X
X
X
X

1
1

X

o
o

X
X

1
1

X
X
X

0
0

-

57.5
400

Voo - VWl -5.0 V
Voo = VIN = 15 V
Voo = 5.0 V
All outputs ON, All outputs open
All outputs OFF
Voo = 5.0 V, All outputs OFF, All inputs = 0 V
Voo = 15 V, All outputs OFF, All inputs = 0 V
Voo = 5.0 V, One output ON, All inputs = 0 V
Voo = 15 V, One output ON, All inputs = 0 V

100

NOTE: Positive (negative) current

Limits
Max.
1.0

Min.

Test Conditions

VOU!

Input Current

..

= 25°C, Vaa = 60 V, VDD = 4.15 Vto 15.15 V, Vss = 0 V

Owg. No. A-1O.980

TYPICAL INPUT CIRCUIT
BLANK

T-l

T

o
o
1
o
o
o
o

X
X
X
1

0
1
0
1
0
1
0

o
1
o

27K

x

15K

= irrelevant
1-1 = previous output state
1 = present output state

lOOK

~wg.

'j("

:.-1", ,'1" 1

TYPICAL OUTPUT DRIVER

4-26

Units
V
V
,J.
,J.
V
V
V
,J.
,J.
kG
rnA
,J.
,J.
,J.
rnA
rnA

UCN-4815A
BiMOS LATCH/SOURCE DRIVER

TIMING CONDITIONS
(logic levels are Vee and Vss)
ENABLE

----1

-----~

------~

0Wg. No. A-IO.991

A.
B.
C.
D.
E.
F.

Minimum Data Active Time Before Strobe Enabled (Data Set-Up Time) ....................................
Minimum Data Active Time After Strobe Disabled (Data Hold Time) ......................................
Typical Strobe Pulse Width For Power-Up Clear Disable ...............................................
Minimum Strobe Pulse Width After Power-Up Clear Disabled ...........................................
Typical Time Between Strobe Activation and Output On to Off Transition ..................................
Typical Time Between Strobe Activation and Output Off to On Transition ..................................
Minimum Data Pulse Width ..................................................................

II
100 ns
100 ns
500 ns
300 ns
1.0 JLS
1.0 JLS
500 ns

BLANKING input low, the outputs are controlled
by the state of the latches.
On first applying VDD to the device, all latch
outputs assume a low state (Power-Up Clear) resulting in all outputs being OFF. The latches will remain
in the low condition until the Clear is disabled by a
STROBE high input. Data may be entered into the
latches during Power-Up Clear disable if the ENABLE input is also high.

. Infonnation present at an input is transferred to its
latch when the STROBE and ENABLE are high.
The latches will continue to accept new data as long
as both STROBE and ENABLE are held high. With
either STROBE or ENABLE in the low state, no
infonnation can be loaded into the latches.
When the BLANKING input is high, all of the
output buffers are disabled (OFF) without affecting
the information stored in the latches. With the

4-27

SERIES UCN-4820A
IUMOS 8-BIT SERIAL-INPUT LATCHED DRIVERS

SERIES 'U~N-4820A
BiMOS 8-BIT SERIAL-INPUT, LATCHED DRIVERS

FEATURES
CLOCK

1

OUT,

SERIAL DATA IN

2

OUT2

• High-Voltage Current-Sink Outputs
• CMOS, PMOS, NMOS, TIL Compatible
OUT,

• Low-Power CMOS Logic and Latches
• Internal Pull-Up/Pull-Down Resistors
• 16-Pin Dual In-Line Plastic Packages

A COMBINATION
of bipolar and MOS technology gives Sprague's Series UCN-4820A an
interface flexibility beyond the reach of standard
logic buffers and power driver arrays.
The three devices in this series each have eight
bipolar current-sink Darlington drivers, a CMOS
data latch for each of the eight open-collector outputs, an eight-bit CMOS shift register and CMOS
control circuitry. Except for maximum driver voltage
ratings, Types UCN-4821A, UCN-4822A and
UCN-4823A are identical.
The bipolar outputs can drive multiplexed LED
displays, incandescent lamps, thermal print heads,
and (with appropriate clamping techniques) relays,
solenoids and other high-power inductive loads.
The CMOS shift register and latches, which
operate over a 5- to 15-volt supply range, minimize
loading and are compatible with CMOS, PMOS
and NMOS logic. Use of the drivers with TTL and
DTL may require a pull-up resistor to ensure an
input logic high. By using the serial data output, the
drivers can be cascaded for interface applications
requiring additional drive lines.
These devices are also available in industrialgrade ceramic packages (Series UCQ-4820R) and in
military side-brazed, hermetically sealed packages
(Series UCS-4820H).

4-28

SERIAL DATA OUT

5

OUTPUT ENABLE

7

Dwq. No. A-11,3B8

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
and Vss = 0 V
Output Voltage, VOUT (UCN-482IA) . . . . . . . . . . . . . . .. 50 V
(UCN-4822A) ................. 80 V
(UCN-4823Al ................ 100 V
Logic Supply Voltage, Voo ....................... 18 V
Input Voltage Range, VIN ........... -0.3 V to Voo +0.3 V
Continuous Output Current, loUT' ................ 500 rnA
Package Power Dissipation, Po" . . . . . . . . . . . . . . .. 1.67 W*
Operating Temperature Range, TA ........ - 20°C to +85°C
Storage Temperature Range, Ts ........ -55°C to +- 125°C
'Derate at the rate of 16.7 mW/oCabove TA

=

+25°C

SERIES UCN-4820A
BiMOS 8-BIT SERIAL-INPUT LATCHED DRIVERS

ELECTRICAL CHARACTERISTICS atTA
Characteristic
Output Leakage Current

Symbol
ICE,

= + 25°C, VDD = 5V, Vss = 0 V (unless otherwise specified)
Applicable
Devices
UCN-4812A
UCN-4822A
UCN-4823A

Collector-Emitter
Saturation Voltage

VCEISATl

ALL

Input Voltage

V,NO
V,NII)

ALL
ALL

Input Resistance

Supply Current

ALL

R'N

10010N)

10010FF)

ALL

ALL

Number of
Outputs ON
(lOUT = 200 rnA)

Test Conditions
VouT=50V
VOUT = 50 V, TA = + 70°C
VouT=80V
VOUT = 80 V, TA = + 70°C
VOUT = 100 V
VOUT = 100 V, TA = + 70°C
louT = 100 mA
louT = 200 rnA
louT = 350 rnA, Voo = 7.0 V
Voo=15V
Voo=10V
Voo = 5.0 V
Voo = 15V
Von = 10VV
Voo =5.0V
One Driver ON, Voo = 15 V
One Driver ON, VDO = 10 V
One Driver ON, Voo = 5.0 V
Voo = 5.0 V, All Drivers OFF, Y'N = 0 V
Voo = 15 V, All Drivers OFF, Y'N = 0 V

Max. Allowable Duty Cycle
at Ambient Tem~erature of
25°e 40 0 e 50 0 e 60 0 e 70 0 e

8
67% 56% 50% 43% 36%
7
76% 64% 57% 49% 41%
6
89% 74% 66% 57% 48%
5
100% 89% 80% 69% 58%
4
100% 75% 72%
T%
3
I~O% 95%
2
100%
1
100% 100% 100% 100% 100%
Caution, Sprague CMOS devices have input static protection but are still susceptible to damage when exposed to extremely high static electrical charges.

1

4-29

t

-

Limits
Max.
50
100
50
100
50
100

-

1.1
1.3

Min.
-

-

-

1.6

-

-

13.5
8.5
3.5
50
50
50

-

-

-

-

2.0

-

1.7

-

1.0
100
200

-

Units
f.LA
f.LA
f.LA
f.LA
f.LA
f.LA
V
V
V
V
V
V
V
kG
kG
k!l
rnA
rnA
rnA
f.LA
f.LA

o

SERIES UCN-4820A
BiMOS 8-BIT SERIAL-INPUT LATCHED DRIVERS

aoc<
DATA IN

~c~
-1-----

----'~ ~-D-I--E

l,l.

,:::~

DUTN - - - - - - - - - - - . . . ,
OWg. No. A-IO.9908

TIMING CONDITIONS
(Logic Levels are Voo and Vss )
A.
B.
C.
D.
E.
F.

Voo

Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ......................... .
Minimum Data Pulse Width ..................................................... .
Minimum Clock Pulse Width ..................................................... .
Minimum Time Between Clock Activation and Strobe ................................... .
Minimum Strobe Pulse Width .................................................... .
Typical Time Between Strobe Activation and Output Transition ............................. .

=

5.0 V Voo

250 os
500 os
1.0 !J.S
1.0 p.s
500 os
1.0 p.s

=

15 V

150 ns
300 ns
250 ns
400 ns
300 os
1.0 !J.S

tinue to accept new data as long as the STROBE is
held high. Applications where the latches are bypassed (STROBE tied high) will require that the
ENABLE input be high during serial data entry.

SERIAL DATA present at the input is transferred
to the shift register on the logic "0" to logic "I"
transition of the CLOCK input pulse. On succeeding
CLOCK pulses, the registers shift data infonnation
towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the
rising edge of the CLOCK input waveform.
Infonnation present at any register is transferred to
its respective t'atch when the STROBE is high
(serial-to-parallel conversion). The latches will con-

When the ENABLE input is high, all of the output
buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With
the ENABLE input low, the outputs are controlled
by the state of the latches.

SERIES UCN-4820A TRUTH TABLE
Serial
Data
Input
L
H
X

l
H
X
P
R

=
=
=

=
=

Shift Register Contents
Clock
Input

J

..r
""l

11 12 13 ......... Is
H RI R2 ....... R7
L R, R2 ....... R7
RI R2 R3 ...... Rs
X X X ......... X
PI P2 P3 ....... Ps

Serial
Data
Output
R7
R7
Rs
X
Ps

Output Contents

Latch Contents
Strobe
Input

L
H

11 12 13 ......... Is

Output
Enable

R R R ...... R
PI P2P3 ....... Ps
X X X ......... )(

L

PI P2P3

H

H H H ......... H

Low logiC level
High logic level
Irrelevant
Present State
Previous State

4-30

11 12 13 ......... Is

...•...

Ps

SERIES UCN-4820A
BiMOS 8-BIT SERIAL-INPUT LATCHED DRIVERS

FUNCTIONAL BLOCK DIAGRAM

CLOCK

I
SERIAL
DATA OUT

SERIAL
DATA IN

7

OUTPUT ENABLE

II

BIPOLAR

(!)GROUND

Dwg. No. A-ll.391B

TYPICAL INPUT CIRCUITS
TYPICAL OUTPUT DRIVER

Voo

STROBE
OUTPUT
ENABLE

CLOCK
SERIAL DATA
IN

4

00K

MOS
.

~
~100K

GROUND
Dwg. No. A-ll,390

V

Dwg. No. A-ll.389

4-31

SPRAGUE BiMOS (Continued)

GROUP UCN-5800 SIMOS II
HIGH-SPEED INTERFACE DRIVERS
.~

UCN-4400 and UCN-4800 SiMOS interface inteSPRAGUE
grated circuits have evolved into new and improved designs.
The CMOS sections of the original BiMOS devices have been reduced in size, resulting in faster switching speeds. Second-generation BiMOS devices also provide new and improved functions, as
shown in the table below.
BiMOS II
Type Number

Description*

Original BiMOS
Type Number

UCN-5800A
UCN-5801A
UCN-5810A
UCN-5810A-1
UCN-5812A
UCN-5812A-1
UCN-5813B
UCN-5814B
UCN-5815A
UCN-5815A-1
UCN-5818A
UCN-5818A-1
UCN-5821A
UCN-5822A
UCN-5823A
UCN-5825A
UCN-582SA
UCN-5832A
UCN-5890A
UCN-5895A

Quad Latch, 350 rnA/50 VSink Driver
8-Bit Latch, 350 rnA/50 VSink Driver
10-Bit Serial/Parallel, -- 25 rnA/SO VSource Driver
10-Bit Serial/Parallel, - 25 rnA/80 VSource Driver
20-lm Serial/Parallel, - 25 rnA/60 VSource Driver
20-Bit Serial/Parallel, - 25 rnA/80 VSource Driver
Quad Latch, 1.5 A/50 VSink Driver
Quad Latch, 1.5 Al50 VSink Driver
8-Bit Latch, - 25 rnA/SO VSource Driver
8-Bit Latch, - 25 rnA/80 VSource Driver
32-Bit Serial/Parallel, - 25 rnA/SO VSource Driver
32-Bit Serial Parallel, - 25 rnA/80 VSource Driver
8-Bit Serial/Parallel, 350 rnA/50 VSink Driver
8-Bit Serial/Parallel, 350 rnA/80 VSink Driver
8-Bit Serial/Parallel, 350 rnA/lOO VSink Driver
4-Bit Serial/Parallel, 1.5 A/50 VDriver
4-Bit Serial/Parallel, 1.5 A/SO VDriver
32-Bit Serial/Parallel, 100 rnA/40 VSink Driver
8-Bit Serial/Parallel, - 350 rnA/50 VSource Driver
8-Bit Serial/Parallel, -150 rnA/50 VSource Driver

UCN-4401A
UCN-4801A
UCN-4810A
UCN-4810A-1
None
None
None
None
UCN-4815A
UCN-4815A-1
None
None
UCN-4812A
UCN-4822A
UCN-4823A
None
None
None
None
None

*Current ratings are maximum tested condition, voltage ratings are absolute maximum allowable.

These are new products. Detailed information, applications engineering
assistance, samples, price, and delivery can be obtained directly from the
factory in Worcester, Mass., Tel. (617) 853-5000.

4-32

SPRAGUE BiMOS (Continued)

SPRAGUE BiMOS MUSCLE FOR THE MICROPROCESSOR

Sprague Electric offers solutions to users' interface problems through a fusion of bipolar and CMOS
technologies in BiMOS to create innovative interface
devices.
The company's ability to shape technology to
meet the specific needs of users is based on a commitment to provide versatile and practical interface
products for systems design.

UCN-4401A and UCN-4B01A

These four- and eight-bit BiMOS latch /drivers are
the first Sprague IC's to incorporate CMOS logic
(data latches) and bipolar drivers (NPN Darlingtonpair outputs). Functionally, the eight-bit device is the
equivalent of an octal latch and an octal NPN Darlington array.

Sprague BiMOS devices are available with:
- Output breakdown voltage ratings of up to
100 V:
- Output current ratings as high as 600 mA;
- A logic voltage-supply range of 5 V to 15 V

Figure I depicts the use of the eight-bit latch/
driver as an interface between a microprocessor and
incandescent lamps. The device can also link a microprocessor with LEDs, high-power discrete
semiconductors, relays or small stepper motors. Applications with inductive loads require connection of
the internal transient-suppression diodes to the
load's voltage supply, or use of discrete diodes.
Inductive load applications should be limited to output voltages of +35 V.

(±5%);

-

Logic switching speeds of up to 1 MHz at 5 V
and up to 2 MHz at 12 V;
- And up to 10 channels per dual in-line package.
Among advantages of BiMOS technology are
microprocessor compatibility, low-power logic, a
wide logic-supply range, component-count reduction, bipolar output capability, CMOS noise immunity, and space-saving integration.

Figure 2 shows use of Type UCN-440IA as an
interface between a microprocessor and a stepper
motor. Input signals to the four-bit device, for both
unipolar wave drive and unipolar two-phase drive,
are shown in Figures 3 and 4.

APPLICATIONS

The following pages make up a sampler of applications for Sprague BiMOS interface devices. Performance specifications, truth tables and timing
charts for these integrated circuits appear on previous
pages. Additional applications are described in the
Sprague brochure WR-185, "Interface ICs for
Motor Drive Applications," and in Sprague engineering bulletins covering these BiMOS devices.

Type UCN-440IA can also be used to control
discrete PNP transistors providing a high-power
motor interface (Figure 5). Use of either singleended or split supplies is possible with this approach.
The four-bit device can be paired with a quad PNP
DIP to implement full-bridge drive for a stepper
motor (Figure 6).

4-33

~
I1.1III

SPRAGUE BiMOS (Continued)

OUTPUT ENABLE

CLEAR

'1"

STROBE

,....

~

=;u-~
,....

IN1

;:;
...

IN2
IN3

~

---10

'::} 3 ~
::J
:1---10 r~ :=----D

+

INs
IN6
IN7

~ hn"--t>i

INS

,..,

r- ~
r-:::

I-;;;--V
'1;-~~

IN4

p,p

+V

11 Voo

0....:

L-

~

fij)
fij)

19'

.,;

- ~

fiL

~

'--

f-

fij)

~

(Ql

t:
~

1

TYPE UCN-4801A

fij)

Q:L

!JI-

LAMP
TEST

DWG.NO. A-ll.444

Figure 1

+v

p,p

UCN-4401A

Figure 2

4-34

DWG.NO. A-ll.445

SPRAGUE BiMOS (Continued)

UNIPOLAR WAVE DRIVE
UNIPOLAR 2-PHASE DRIVE
STROBE
IN 1

Jl
JI

n

-ln

f'LIN 1

n

IN 2

IN 2

n

IN 3
IN 4
OUT 1

n

IN 4
OUT 1

OUT 2

OUT 2

OUT 3

OUT 4

--.J

______

~nL__

__

~

IN 3

~

---,

rL-

' - - _ - ' L-_ _

r____

OUT 3

L-

OUT 4

J !--------~~

---,

L - -_ _ _ _ _ _ _ _ _ _~r____

OWG.NO. A-ll,447

OWG.NO, A-ll.446

Figure 4

Figure 3

+v

-v

TYPE UCN-4401A

OWG.NO. A-ll.448

Figure 5

4-35

SPRAGUE BiMOS (Continued)
+v

TPQ 2906

TYPE UCN-4401A

DWG.NO. A-ll.449

Figure 6
UCN-4810A

This integrated circuit functionally replaces a
lO-bit serial-in, parallel-out. shift register, a lO-bit
data latch, and 10 high-voltage buffers (including
output pull-down resistors). It is designed for use
with vacuum fluorescent displays, but has been put
to many other uses, including control of thermal
print heads.
Connecting a data-out line from one device to a
data-in pin of a second device minimizes the number
of input/output lines required for a system. A 20character 5 x 7 vacuum fluorescent dot matrix display, for instance, requires only six Type UCN4810s (two as grid drivers and four as dot drivers).
An example of cascaded data control is given in
Figure 7. The arrangement cascades two devices for
grid selection and four as dot drivers.
Data sent to the four dot drivers can be loaded in
less than 80 I.ts using this configuration. The shiftrate limit of the dot drivers is 500 kHz at VDO = 5 V.
The two units that function as grid drivers are
loaded with a single "1" during each scan cycle.
The minimum recommended scan frequency is
100 Hz per character (a clock frequency of 2 kHz for
a 20-character display).

Since blanking (20 I.ts minimum) is required between characters, and since the minimum ON time
for each digit or character is 100 I.ts, the maximum
number of characters in a display is 80 (8 kHz clock,
125 I.ts ON and blanking time per character).
The typical ON time for vacuum fluorescent
characters is 200 I.ts (40-character panel) to 500 I.ts
(20-character display). Failure to provide proper
blanking time can cause ghosting or flicker.
A faster method ofloading matrix data, shown in
Figure 8, requires more I/O lines. This technique
loads shift registers during a blanking period
(greater than 20 I.ts). Each dot driver has a separate
data-input line, but uses common clock, strobe and
blanking lines. A second clock is used with the grid
drivers.
A typical data-input timing chart for this configuration is shown in Figure 9. With a 20-character
vacuum fluorescent display having a 2 kHz scan
frequency, 10 bits of data are loaded during the first
blanking period; succeeding lO-bit data blocks are
loaded during blanking periods at 400 I.ts intervals.
A more unusual application of Type UCN4810A
is shown in Figure 10: The device is used with a
thermal printer. In production, the drivers (in chip
form) were built into a hybrid assembly.

SPRAGUE BiMOS (Continued)

SERIAL DATA
CLOCK 1

o--1~=t===l=~_~::::r---,-l

STROBE

o--t~r=======t:,--~======:j~~

CLOCK 2

o-i~=t===E~=~:::==J~jJU

OWG.NO. A-ll.450

Figure 7

II

GRID DATA

CLOCK 1
STROBE
OATA 1
CLOCK 2

DATA 2

DATA 3

DATA.

BLANKING
OWG.NO. A-ll,4S1

Figure 8

CLOCK
DATA

STROBE----------------------------------~
BLANKING---------------------~

~ACTIVATED

TIMING CONDITIONS UCN -4810A
DWG.NO. A-ll.452

Figure 9

4-37

SPRAGUE BiMOS {Continued}

ISOLATION DIODES (FWD)

DOT PRINT RESISTORS

(STROBEl

So s'---Sn

I

J-i

SPRAGUE TYPE UCN~4e10
1O-81T SERIAL. INPUT

I II

rlI~~~OO
L 5 B

50 ~~
Yoo¥ss VB8

II

LATCHED DRIVERS

-- -

-------I SO

~~i
'"'-':0

~J

2

IN
L 5

-!:gVl
+

B3 Voo VSSVSB

1

I

-

!

..

...

I

~

+

LOGIC

SUPPLY

I

DWG.NO. A-ll.4S3

Figure 10
STROBE

DATA IN

DATA OUT

STROBE

Figure 11

4-38

OWG.NO. A-ll.454

SPRAGUE BiMOS (Continued)

STROBE

BLANKING

A
B
C

o

SEGMENT DECODE

dp

1_1_2.£.-£I~"£I"~/l::S~~E.!:!.T-'_1

I_I.

ALPHANUMERIC DISPLAY

DATA OUT

DATA IN

I_I.

DATA IN

DATA OUT

UCN-4810A
DIGITS 1-10

DIGITS 11-20

STROBE
OWG.NO. A-ll.455

Figure 12

UCN-4815

SERIES UCN-4820A

Type UCN-4815A provides an eight-bit parallelin, parallel-out interface for vacuum fluorescent displays. A typical application appears in Figure 11. A
pair of Type ICN-481OAs are used for grid control.
The two Type UCN-4815As drive a 16-segment alphanumeric display.

The drivers in this series were designed for use
in printers. Each integrated circuit has an eight-bit
serial-input shift register, an eight-bit data latch,
and eight NPN Darlington-pair outputs. The data
entry rate for this series is 500 kHz (minimum) at
VDD = 5V.
A typical application appears in Figure 13; although the drawing depicts use with an electrosensitive printer, the device can also control inductive
loads such as print hammers and solenoids, or thermal print heads.
Use of Types ICN-4823A and UCN-4810A-l is
combined in the planar gas-discharge display application shown in Figure 14. Type UCN-4810A-l signal inputs are level-shifted (floated to the VDD supply
level). The application requires external segment
limiting and pull-up resistors and use of Zener
diodes.

UCN-4805A

Type UCN-4805A has eight high-voltage source
outputs, latched inputs, and both the hexadecimal
decoding and speed capabilities for microprocessorbased designs. The device is used to decode and
drive seven-segment displays. Its eighth source output is used to generate a colon or decimal point.
A typical application with a 20-character vacuum
fluorescent display is shown in Figure 12. Type
UCN-4805A is used as a seven-segment decoder/
driver. A pair of Type UCN-4810As is used for gridselect.

4-39

SPRAGUE BiMOS(Continued)

tV

CLOCK

1

DATA IN

DATA OUT

BLANKING
GND
PRINT ELECTRODES

UCN-4820A

OWG.NO. A-Il.456

Figure 13

Vaa

BLANKING
DATA
CLOCK

o------;~i=====t::;=T~
0-----1

o----~::::JT:::::_:==It:::=---~

VZ~VLOGIC

(5V TYPICAL)

LEVEL SHIFT
SIGNAL
INPUTS

Rp
RSEG

DATA 0 - - - - - 1

UCN-4823A (100V)

VS EG (OFF)

OWG.NO. A-Il.457

Figure 14

4-40

NOTES

I
I
I
I

I
I
I
I
I

,
I

I
I
I
I
I
I
I

I
I
I
I
I
I
I
I
I
I
I
I

I

QI

MILITARY AND AEROSPACE DEVICES

n

I

I

I
I

I

I

I
I
I

I
I
I

SECTION S-MILITARY AND AEROSPACE DEVICES
UHC/UHD-400 through 433-1 Quad Power and Relay Drivers ..................
UHC/UHD-500 through 533 Quad Power and Relay Drivers . . . . . . . . . . . . . . . . . . ..
ULS-2001H through 2015H 7-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . ..
ULS-2001R through 2015R 7-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . ..
ULS-2021H through 2025H 7-Channel, 95 V Darlington Drivers. . . . . . . . . . . . . . . ..
ULS-2064H through 2077H Quad 1.5 ADarlington Switches. . . . . . . . . . . . . . . . . ..
ULS-2801H through 2815H 8-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . ..
ULS-2801R through 2815R 8-Channel Darlington Drivers. . . . . . . . . . . . . . . . . . . ..
ULS-2821H through 2825H 8-Channel, 95 V Darlington Drivers ............... "
UDQ-2956R and 2957R Negative Supply, 5-Channel Source Drivers. . . . . . . . . . . . ..
UDS-2981H through 2984H 8-Channel Source Drivers. . . . . . . . . . . . . . . . . . . . . ..
UDS-3611H through 3614H Dual Peripheral and Power Drivers . . . . . . . . . . . . . . . ..
UCS-4401H and 4801H Hermetic BiMOS Latched Drivers. . . . . . . . . . . . . . . . . . . ..
UCS-481OH Hermetic BiMOS 10-Bit, Serial-Input, Latched Driver . . . . . . . . . . . . . ..
UCS-4815H Hermetic BiMOS Latch/Source Driver. . . . . . . . . . . . . . . . . . . . . . . . ..
UCS-4821H through 4823H Hermetic BiMOS 8-Bit, Serial-Input, Latched Drivers. . . ..
UDS-5703H through 5707H Quad Peripheral and Power Drivers. . . . . . . . . . . . . . . ..
UDS-5711H through 5714H Dual Peripheral and Power Drivers. . . . . . . . . . . . . . . ..
UDS-5733H Quad NOR Peripheral and Power Driver. . . . . . . . . . . . . . . . . . . . . . . ..
UDS-5791H Quad PIN Diode Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

5-2
5-2
5-7
5-7
5-7
5-17
5-26
5-26
5-26
5-36
5-39
5-44
5-48
5-53
5-58
5-63
5-68
5-74
5-73
5-80

See Also:
ULS-2045H NPN Transistor Array ...................................
ULS-2083H Independent NPN Transistor Array ..........................
ULS-2140H Quad Current Switch ...................................
UGS-3019T/U Digital Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
UGS-3020T/U Digital Hall Effect Switch. . . . . . . . . . . . . . . . . . . . . . . . .. . . . ..
UGS-3030T/U Bipolar Hall Effect Switch ..............................
UGS-3075T/U Bipolar Hall Effect Switch ........ ,.....................
UGS-3076T/U Bipolar Hall Effect Switch ..............................
ULQ-8126R and 8126R (SG2526!1526) SMPS Controllers ...................
ULS-8160R (SE5560) Switched-Mode Power Supply Controller ...............

10-4
10-12
10-16
9-5
9-7
9-9
9-14
9-17
10-41
10-46

Quality Assurance Flow Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Double-Deuce Program for High-Reliability Devices. . . . . . . . . . . . . . . . . . . . . . . ..
High-Reliability Screening to MIL -STD-883 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

5-84
5-86
5-89

Application Note:
BiMOS Power Drivers to MIL-STD-883 ................................ 5-90
NOTE: Most devices described in Sections 2, 3, and 4 can also be supplied in extended-temperature
hermetic packages. Contact the local sales office or factory for additional information.

5-1

SERIES 400, 400-1, AND 500
HERMETICALLY SEALED POWER AND RELAY DRIVERS

SERIES 400,400-1, AND 500
HERMETICALLY SEALED POWER AND RELAY DRIVERS

FEATURES
•
•
•
•
•
•

SOOmA Output Sink Current Capability
DTlJTTL Compatible Inputs
Transient Protected Outputs on Relay Drivers
High Voltage Output - 100V Series SOO, 70V Series 400-1, and 40V Series 400
Hermetically Sealed Packages to MIL-M-38S10
High-Reliability Screening to Mll-STD-883, Class B

Description

These Series 400, 400-1, and 500 hermetically seal~ power and relay
drivers are bipolar monolithic circuits incorporating both logic gates and
high-current switching transistors on the same chip. Each device contains
four drivers capable of sinking 500mA in the ON state. In the OFF state,
Series 400 devices will sustain 40V, Series 400-1 devices will sustain 70V,
and Series 500 devices will sustain lOOV.
All devices are available in either a 14-pin hermetic flat-pack package
(Types UHC-) or a 14-pin hermetic dual in-line package (Types UHD-).
These packages conform to the dimensional requirements of Military
Specification MIL-M-3851O and meet all of the processing and environmental requirements of Military Standard MIL-STD-883, Method 5004
and 5005. These devices are also furnished in a plastic 14-pin dual in-line
package (Types UHP-) for operation over a limited temperature range.
Applications

The UHC- and UHD- Series 400,400-1, and 500 power and relay drivers
are ideally suited for driving incandescent lamps, relays, solenoids, and
other interface devices with up to lA output current per package. Hermetic
sealing and an operating temperature range of -55°C to + 125°C recommend them for military and aerospace applications as well as commercial
and industrial control applications where severe environments may be
encountered.

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee)
Operating Temperature Range
Current into any output (ON state)

Min.
4.S

Nom.

Max.

5.0

5.5

-55

+25

+125

250

5-2

Units
V
°C
rnA

SERIES 400, 400-1, AND 500
HERMETICALLY SEALED POWER AND RELAY DRIVERS

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, vcc ................. .
Input Voltage, V;n: ...... .
Output Off-state Voltage, VOIf:
Series UHC-400 and UHD-400 ..
Series UHC-400-1 and UHD-400-1.
Series UHC-500 and UHD-500.
Output On-State Sink Current, Ion ...
Suppression Diode Off-State Voltage, VOIf.
Series UHC-400 and UHD-400 ..
Series UHC-400-1 and UHD-400-1 ..... .
Series UHC-500 and UHD-500 ........ .
Suppression Diode On-State Current, Ion ..
Operating Free-Air Temperature Range, TA .
Storage Temperature Range, Ts ........... .

.7V
. .... 5.5V
. .. 40V
. .. 70V
.100V
. .500mA
. .. 40V
. .70V
. .100V
. ... 500mA
. -55°C to +125°C
... -65°C to + 150°C

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"I" Input Voltage
"0" Input Voltage
"0" Input Current at all Inputs
except Strobe
"0" Input Current at Strobe
"I" Input Current at all Inputs
except Strobe
"1" Input Current at Strobe

V;n(11
VlnJol

MIN
MIN

Iln(OI
I;n(OI
Iln(1 I

MAX
MAX
MAX
MAX
MAX
MAX

"I" Output Reverse Current
Series 400
Series 400-1
Series 500
"0" Output Voltage

Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

I;n(11

lofl

Von

ILK
Vo
ICC(11
Icc(OI

NOM
NOM
MAX
MAX
NOM
NOM
NOM
NOM

Limits
Output

Min.

Typ.

Max.

2.0

O.4V
0.4V
2.4V
5.5V
2.4V
5.5V

4.5V
4.5V
OV
OV
OV
OV

-0.55
-l.l

40V
70V
100V
150mA
250mA
lSOmA
250mA
OPEN

MIN
MIN
MIN
MIN
MIN
MIN
MIN
NOM
NOM
MAX
MAX

1.5

NOTES:
I. Each input.
2. Typical values are at Vcc ~ 5.0V, TA ~ 25°C.
3. Measured at VR ~ Voll(mlnl.
4. Measured at It ~ 200mA.
5. Each gate.
6. Input test conditions are listed in Table IV.

5-3

Units

Notes

0.8

V
V

-0.8
-1.6
40
1
100
1

rnA
rnA
/loA
rnA
/loA
rnA

1,2
2
1
1

100
100
100
0.5
0.7
0.6
0.8
200
1.75
7.5
26.5

"A
/loA
/loA
V
V
V
V
/loA
V
rnA
rnA

6
6
6

6
6
6
6
3
2,4
5,6
5,6

SERIES 400, 400-1, AND 500
HERMETICALLY SEALED POWER AND RELAY DRIVERS

Table IV
INPUT CONDITIONS FOR OUTPUT CHARACTERISTIC MEASUREMENTS

Type UHC- or UHD-

"a" Output Voltage

"1" Output Reverse
Current (loll)
Driven
Other
Input
Input

400,400-1,500
402,402-1,502
403,403-1,503
406, 406-1, 506
407,407-1,507
40B, 408-1, 50B
432, 432-1, 532
433, 433-1, 533

2.0V
2.0V
2.0V
2.0V
O.BV
0.8V
0.8V
0.8V

(Von)

2.0V
2.0V
OV
2.0V
Vee
Vee
O.BV
O.BV

Driven
Input

Other
Input

O.BV
0.8V
0.8V
O.BV
2.0V
2.0V
2.0V
2.0V

Vee
0.8V
O.BV
Vee
2.0V
2.0V
OV
OV

"a" Level Supply

"1" Level Supply
Current (lCC/lI)
Driven
Other
Input
Input
5.0V
5.0V
5.0V
5.0V
OV
OV
OV
OV

Current (Icc ,)
Driven
Other
Input
Input
. OV
OV
OV
OV
OV
OV
OV
OV
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V

5.0V
5.0V
5.0V
5.0V
OV
OV
OV
OV

SWITCHING CHARACTERISTICS at Vee = 5.DV, TA = 25°C
Limits
Characteristic

Symbol

Turn-on Delay Time
Series 400
Seri es 400-1
Series 500

tpdO

Turn-off Delay Time
Senes 400
Series 400-1
Series 500

tpdj

Test Conditions

Typ.

Max.

Units

Vs = 40V, Rl = 265 n (6 Watts)
Vs = 70V, RL = 465 n (10 Watts)
Vs = 100V, RL = 670 n (15 Watts)

750
750
750

ns
ns
ns

= 40V, RL = 265 n (6 Watts)
= 70V, RL = 465 n (10 Watts)
= 100V, RL = 670 n (15 Watts)

500
500
500

ns
ns
ns

Vs
Vs
Vs

Min.

Typical Switching Test Circuit

I
I

INPUT

I

,

I

I

I

:

I

I

'5PF
{Note 3) :I

:l
I

I

LOAD

I

tL _____
CIRCUIT

JI

;

"%

OW6. MO.

~:L-

'pdQ

, , - - - VQut(1)

OUTPUT
~-.,.I.---

INPUT PULSE CHARACTERISTICS
VI 1

= 3.SV

- -- OWG. "0.

A~781l9A

V,,(O) - OV

_ _ _ Vln(O)

1/ 7. ••
I, = 14.s

5-4

Ip - I,..
PRR = 500kHz

V~ut(O)
A~1900A

SERIES 400, 400-1, AND SOO
HERMETICALLY SEALED POWER AND RELAY DRIVERS

Device Pinning

UHC-400
UHC-400-1
UHC-SOO

UHC-402
UHC-402-1
UHC-502

II
UHC-403
UHC-403-1
UHC-503

UHC-406
UHC-406-1
UHC-506

UHC-407
UHC-407-1
UHC-507

UHC-408
UHC-408-1
UHC-508

UHC-432
UHC-432-1
UHC-532

UHC-433
UHC-433-1
UHC-533

5--5

SERIES 400, 400-1, AND 500
HERMETICALLY SEALED POWER AND RELAY DRIVERS

Device Pinning
(Continued)

UHD-400
UHD-400-1
UHD-SOO

UHD-403
UHD-403-1
UHD-503

UHD-408
UHD-408-1
UHD-508

UHD-402
UHD-402-1
UHD-502··

UHD-406
UHD-406-1
UHD-506

UHD-407
UHD-407-1
UHD-507

UHD-432
UHD-432-1
UHD-532

UHD-433
UHD-433-1
UHD-533

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON TRANSISTOR ARRAYS
'FEATURES
•
•
•
•
•
•
•

m, OTl, PMOS, or CMOS Compatible Inputs
Peak Output Current to 600 rnA
Transient Protected Outputs
Side-Brazed Hermetic Package, or
Cer-OIP Package
High-Reliability Screening Available
Wide Operating Temperature Ranges

COMPRISED of seven silicon NPN Darlington
power drivers on a common monolithic substrate, the Series ULS-2000H and ULS-2000R arrays are ideally suited for driving relays, solenoids,
lamps, and other devices with up to 3.0 A output
current per package. Both hermetically sealed package styles are rated for operation over the temperature range of - 55°C to + 125°C, recommending
them for military and aerospace applications or in
commercial and industrial applications where
severe environments may be encountered.

All series ULS-2000H arrays are furnished in a 16pin side-brazed dual in-line hermetic package that
conforms to the dimensional requirements of Military Specification MIL-M-3851O and meets the processing and environmental requirements of Military
Standard MIL-STD.-883, Methods 5004 and 5005.

Device Type Number Designation

The 25 integrated circuits permit the circuit designer to select the optimum device for any application. There are two packages, five input
characteristics, two output voltages, and two output
currents covered by the listings. The appropriate
part for use in specific applications can be determined from the Device Type Number Designation
chart. Note that the high-voltage devices (BY CE 2:
95 Y) are available in the Series ULS-2000H only.
All units feature open collector outputs and integral
diodes for inductive load transient suppression.

5-7

VCE(MAX) =
Ic(MAXl =

50V
500 rnA

General-Purpose
PMOS, CMOS
14-25 V
PMOS
5V
m,CMOS
6-15 V
CMOS, PMOS
High-Output
m

UlS-2001R
UlS-2001H
UlS-2002R
UlS-2002H
UlS-2003R
UlS-2003H
UlS-2004R
UlS-2004H
UlS-2005R
UlS-2005H

50V
600 rnA
Type Number
UlS-2011R
UlS-2001H
UlS-2012R
UlS-2012H
UlS-2013R
UlS-2013H
UlS-2014R
UlS-2014H
UlS-2015R
UlS-2015H

95 V
500 rnA

UlS-2021H
UlS-2022H
UlS-2023H
UlS-2024H
UlS-2025H

o

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE (Series 2000*, 2010*) ...... " . . . . . .. . . . . . . . . . .. . . . .. 50 V
(Series ULS-2020H) ................................ 95 V
Input Voltage, VIM (Series 2002*, 2003*, 2004*) ........................... 30 V
(Series 2005*) ..................................... 15 V
Peak Output Current, lour (Series 2000*, ULS-2020H) ..................... 500 rnA
(Series 2010*) .............................. 600 rnA
Ground Terminal Current, IGNo ........................................ 3.0 A
Continuous Input Current, liN ....................................... 25 rnA
Power Dissipation, Po (one Darlington pair) .............................. 1.0 W
(total package) .............................. See Graphs
Operating Temperature Range, TA ........................... - 55°C to + 125°C
Storage Temperature Range, Ts ............................ - 65°C to + 150°C

PARTIAL SCHEMATICS
Series 2001'
(each driver)

Series 2002'
(each driver)

Series 2003'
(each driver)
.--+1---0 COM

7V

,
,,
~---

10. 5K

.--*--<>COM

,

,

i,

i,,

,

I

I
I

--- ----------~---- ---~

OWG. No. A-gu51

0'11",110. A-96S0
OW.,.

r.o.

1\-(15:l~

Series 2004'
(each driver)

Series 200S'
(each driver)
.--+1---0 COM

.--~--oCOM

1O.5K

,

,

,,,
,
,,

~-

1. 05K

,

i,

,,
,

I

,

I

,,
t. _______________ jo4II _______ :

,

,

-- --- - -- -------~- ---

---~

I

G. HO.

OWG. MO. A-98984

'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.

5-8

~·IO.U~

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIESULS-2000H AND ULS-2000R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output leakage Current

Collector-Emitter
Saturation Voltage

Symbol
leEX

VeE'SATi

Applicable
Devices
All
20022004All

Test Conditions
I Temp.

Min.

+25°C
Max.

Input Current

I'NIONI

1'",OfF)

Input vOltage

V'NlONI

20022003*
2004*
2005All
2U022003*

Max.
Min.
Max.
Min.

Max.

2004-

Min.

Max.

2005*
O-C forward Current
Transfer Ratio
Input Capacitance
Tum-On Delay
Tum-Off Delay
Clamp Diode leakage
Current
Clamp Diode Forward
Voltage

hFE

2001 -

C'N
to.
tPlll
IR

All
All
All
All

VF

All

Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C

VeE - 50V
VeE = 50V, V'N = 6V
V" - 50 V, V,. - 1 V
Ie = 350 rnA, 18 = 850 pA
k - 200 rnA, " -550pA.
Ie = 100 rnA, lit = 350 pA
Ie - 350 rnA, - 500 pA
Ie - 200 rnA, - 350 pA
Ie - luU rnA, I, - ~~O pA
Ie = 350 rnA, = 500 pA
Ie - 200 rnA, - 3~0 pA
I = 100 rnA, 18 = 250 pA
V'N-17V
Y'N - 3.85 V
V'N = 5 V
V'N - 12 V
V, -3 V
Ie - 500 pA
VeE - 2 V, Ie - 300 rnA
VeE - ~ v'-'e -_300 rnA
VCE - 2 V, Ie - 200 rnA
VeE = 2 V, Ie = 250 rnA
VeE = 2 V, Ie = 300 rnA
VeE - 2 V, Ie - 200 rnA
VeE - 2V, Ie - 250 rnA
VCE = 2 V, Ie = 300 rnA
VeE - 2 V, Ie - 125 rnA
VeE = 2V, Ie = 200 rnA
VeE = 2 V, Ie = 275 rnA
VeE - 2 V, Ie - 350 rnA
VeE = 2V, Ie = 125 rnA
VeE - 2V, Ie - 200 rnA
Vc{ - 2 V, Ie - 275 rnA
Vc{ = 2 V, Ie = 350 rnA
VCE - 2 V, Ie - 350 rnA
VeE = 2 V, Ie = 350 rnA
Vc{ = 2 V, Ie = 350 rnA
Vr., = 2 V, I, = 350 rnA
0.5 Ein to 0.5 Eoul
0.5 Ei, to 0.5 Eou'
VR= 50 V
IF = 350 rnA

-Complete part number includes a prefix to indicate temperature range and a suffix to indieatepaekage style. See
following part number description.
Note 1: All limits stated apply to the complete Oa~ington series except as specified for a single device type.
Note 2: The I'NiOfF) current limit guarantees against partial turn-on of the output.
Note 3: The V'.,ONI vottage limR guarantees a minimum output sink current per the specified test conditions.

5--9

Fig. Min.
lA -

IB
IB
2
2
2
2
2
~

2
2
2
3
3
3
3
3
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2

-

480
650
240
650
1180
25

-

500
1000

Limits
Typ.
Max.
100
500
500
1.6
1.8
1.3
1.5
1.1
1.3
1.25
1.6
1.3
1.1
0.9
1.1
1.6
1.8
1.3
1.5
1.1
1.3
850
1300
930
1350
350
500
1000
1450
1500· 2400
50
111
13
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4
-

-

6

-

15
250
250
-

7

-

1.7

-

-

-

Units
pA
pA
pA

V
V
V
V
V
V
V
V
V
pA
pA

pA
pA
pA

pA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-

-

25
1000
1000

50

pF
ns
ns
pA

2.0

V

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIESULS-2010H AND ULS-2010R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output Leakage Current

SYmbol
I",

Collector-Emitter
Saturation Voltage

VeEISAn

Applicable
Devices
All
20122014All

Test Conditions
I Temp.

Min.

+25°C
Max.

Input Current

IINION)

Input Voltage

I'NIn'"
V'NION)

20122013'
2014'
2015'
All
2012'
2013'

Max.
Min.
Max.
Min.

Max.

2014-

Min.

Max.

2015-

Min.
Max.

D-C Forward Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Turn-Off Delay
Clamp Diode Leakage
Current
Clamp Diode Forward
Voltage

hFE

2011'

C'N
tAN
tPill
IR

All
All
All
All

VF

All

Min.
+2SoC
+25°C
+25°C
+25°C

Fig. Min.
1A 18 18 2
2
2
2
2
2
2
2
2
480
3
3
650
240
3
3
650
3 1180
25
4
5
5
5
5
5
5
5
5
5
-

V" = 50V
V" = 50 V, V'N = 6V
VeE = 50 V, V'N = 1V
Ie - 500 mA, 18 - 1100/LA
I = 350 mA, I = 850/LA
I = 200 mA, 18 = 550/LA
Ie = 500 mA, 18 = 600/LA
Ie = 350 mA, l8 = 500/LA
Ie =200 mA, 18 = 350/LA
Ie - 500 mA, 18 - 600/LA
Ie = 350 mA, 18 = 500/LA
I - 200 rnA, 18 - . 350JL_A
V'N - 17 V
V" =3.85 V
Vw =5 V
VIN - 12 V
VIN - 3V
I - 500/LA
VCE = 2 V, Ie = 500 mA
VeE = 2V, Ie = 500mA
VeE - 2 V, Ie - 250 mA
VeE = 2 V, Ie = 300 mA
VeE = 2 V, Ie = 500 mA
VeE - 2Y, Ie - 250 mA
VeE - 2 V, Ie - 300 mA
VeE - 2 V, Ie - 5UlJmA
VeE - 2V, Ie - 275mA
0
VeE - 2 V, Ie -30U mA
5
VeE - 2 V, Ie - 500 mA
5
VeE - 2 V, Ie -'- 275 mA
5
VeE - 2 V, Ie - 350 mA
5
VeE - 2 V, Ie - 500 mA
5
VeE - 2 V, Ie - 350 mA
'5
VCE = 2 V, Ie = 500 mA
5
VeE - 2 V, Ie - ,350 mA
VCE - Z V, Ie - OUU mA
0
2
VeE = 2V, Ie = 500mA
2
V" - 2 V, I - 500 mA
O.S Em to O.S E,~
0.5 E to 0.5 E
VR = 50 V
IF = 350 mA
IF = SOO mA

'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
Note 1: All limits stated apply to the complete Darlington series except as specified for a single device type.'
Note 2: The 1"'OFf) current limit guarantees against partial turn-on of the output.
Note 3: The V'N{ON) voltage limit guarantees a minimum output sink current per the specified test eonditions.

5--10

-

6
7
7

-

-

4S0
900
-

-

Limits
Typ.
Max.
100
500
500
1.8
2.1
1.6
1.8
1.3
1.5
1.9
1.7
1.6
1.25
1.1
1.3
1.8
2.1
1.8
1.6
1.3
1.5
850
1300
930
1350
350
500
1000
1450
1500
2400
5u
23.5
17
3.6
3.9
6.0
2.7
3.0
".0
10
-

Units
/LA
/LA
/LA
V

V
V
V
V
V
V
V
V
/LA
/LA
/LA
/LA
/LA
/LA
V
V
V
V
V
V
V
V

V

-

1Z

V

-

17
7.0

V
V

H.U

V

-

9.5
3.0
3.5
2.4

V
V
V
V

Z.O

V

IS
2S0
2S0
-

-

-

-

1.7

-

zS
1000
1000
50

pF
ns
ns
/LA

2.0
2.S

V
V

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS·2020H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output leakage Current

Symbol
ICEI

Collector-Emitter
Saturation Voltage

VCElSAn

Applicable
Devices
All
UlS-2022H
UlS-2024H
All

Min.

Max.

I'N(ON}

~---

Input Voltage

l"lV"
V'NWN'

UlS-2022H
UlS-2023H
ULS-2024H

...ULS-2025H
--Ail --ULS-2022H
ULS-2023H

.. -

.--

Max.
Min.
Max.
Min.

Max.

UlS-2024H

Min.

Max.

ULS-2025H
D-C Forward Current
Transfer Ratio
Input Capacitance
[urn-On Delay
Turn-Off Delay
Clamp Diode leakage
Current
Clamp Diode Forward
Voltage

h"

UlS-2021H

C'N
t".
tPHl
IR

All
All
All
All

V,

All

Fig. Min.
lA 1B 1B 2
2
2
2
2
2
-

Temp.

+25°C

Input Current

Test Conditions

-:--

Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C

VCE = 95V
VCE - 95V, VIN - 6V
V" - 95 V, V'N - 1 V
Ic - 350 mA, 18 - 850 p.A
Ic - 200 mA, 18 - 550 p.A
Ic = 100 mA, 18 = 350 p.A
k - 350 mA, 18 - 500 p.A
Ie = 200 mA, 18 = 350 p.A
Ic = 100 mA, 18 - 250 p.A
Ic - ~!JU mA, 18 - !JUU f.AA
Ic = 200 mA, 18 = 350 p.A
I, = 100 mA I. = 250 pA
V'N = 17 V
VIN=3.85V
Vw - 5V
V'N = 12 V _ .. _--. __..
V~ -- 3 V

'(5OOMA
V~,

VOl
VCE
VCE
VCE
VCE
VCE
VCE
VCE
VCE
VeE
VCE
VCE
VCE
V"
VeE
VCE
V"
VCE
V"

~

=
=
=
=
-

=
=
=
=

2 V, II2 V, Ie 2V, Ic =
2V, Ic 2 V, Ic 2 V, Ic =
2V, Ic 2V, Ic =
2 V, Ic 2 V, Ic 2 V, Ic =
2V, Ic 2 V, Ic 2 V, Ie 2 V, I, 2V, Ie =
2 V, Ic =
2 V I, 2V, I, =
2 V, Ic =

300 mA
JUO mA
200mA
250mA
300 mA
200 mA
250mA
300mA
125 mA
200 mA
275 mA
350mA
125 mA
200 mA
275 mA
350mA
350 mA
350 mA
350mA
350 mA

0.5 Ein to 0.5 E,..
0.5 Ein to 0.5 Eout
VR- 95 V
I, - 350 mA

Note 1, All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2, The "NCOff) current limit guarantees against partial turn-on of the output.
Note 3, The V'O(ON} voltage limit guarantees a minimum output sink current per the specified test conditions.

5--11

~

-

2
2
480
3
3
650
3
240
650
3
3._ !l80
4 . 25

-?_. ~

-

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2

6

7

-

-

500
1000

-

Limits
Typ.
Max.
100
500
500
1.6
1.8
1.3
1.5
1.3
1.1
1.25
1.6
1.1
1.3
0.9
1.1
1.1i
1.11
1.3
1.5
1.1
1.3
850
1300
930
1350
350
500
1000
1450
1500
2400
50
18
13
3.3
3.6
.3.9
2.4
2.7
3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4

-~--.

-

15
250
250

1.7

-

Units
p.A
p.A
p.A
V

V
V
V
V
V
V

V
V
p.A
p.A
p.A
p.A

.PA
p.A
V
V
V
V
V
V
V
V

V
V
V
V
V
V
V
V
V
V

-

25
1000
1000
5u

pF
ns
ns
f.AA

2.0

V

SERIES ULS-20()OH AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

TEST FIGURES
OPEN

VeE

OPEN

VCE

I
FIGURE 1A

FIGURE 1B

OPEN

OPEN

;.0----4---<1 OPEN

OW". 110.

~-9731

FIGURE 2

OPEN

FIGURE 3

VCE

OPEN

D'IIG.IIO ....... 973I4A

FIGURE 4

OWG. 110.

FIGURE 5

o\-973~'"

FIGURE 6

FIGURE 7

5---12

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS·2000H
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
AT +75°C

AT +50°C

600r--~-'---r--.--;r--r--'---r--.--'

~

g200 1--+-+--+----j--1-7 i;::;;:1:::==l:::;~;S
~

o
~
~

NUMBER OF OUTPUTS
CONDUCTING
OOSIMUlTANEOU~tY

NUMBER OF OUTPUTS
CONDUCTING

40

60

80

PER CENT DUTY CYCLE

o SIMULTANEOUSLY
o
20

100

60

80

100

~.KO.A-IC,199A

AT +125°C

AT + 100°C

40
60
PER CENT DUTY CYCLE

40

j)ER CENT DUTY CYCLE

1lWli.ItO.A-IO,197A

80

40
60
PER CENT DUTY CYCLE

100

OWG.MO.A-IO.200A

5-13

80

100
il\'IG. HO. A-IO.201

~

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2000R
PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE

600,---.-----;.-----;.-----;-----.-----.-----.---,----,----,

NUMBER OF OUTPUTS

NUMBER OF OUTPUTS

CONDUCTING

o SIMULTANEOUSLY
o
20

o
40

60

80

100

CONDUCTING

SIMULTANEOUSLY
o
20

PER CENT DUTY CYCLE

40

60

PER CENT DUTY CYCLE

Dwg. No. A-IO,B83A

ALLOWABLE PACKAGE POWER DISSIPATION
SERIES ULS-2000H AND ULS-2000R
2.

1\
I\.

\

,,~

~>~t\.
X)-+

r---

'19

:s-~

~~

,

-'

6)

~ ""bo

~

"'0

I'\.

~~

~
~

0

50

100

AMBIENT TEMPERATURE, TA IN

"

15

o(

Dwg.No. A-IO,884A

5-14

80

100

Dwg. No. A-1O,887P

SERIES ULS-2000H AND ULS-2000R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

COLLECTOR CURRENT
AS A FUNCTION OF INPUT CURRENT
600

",
1;'

.,

~=>
U

o
~
o
u

200

,
,,

,,
~

E 400

~

,
,,

"

/

V

,"/VL

/

COLLECTOR CURRENT
AS A FUNCTION OF SATURATION VOLTAGE

V

/

600

,,'
," V
,'#,0"-.....

.J

V

<:

/

E

~ 400

~

I.'u~

oo
o

200

~

u

MAXIMUM REQUIRED

INPUT CURRENT

200
400
INPUT CURRENT IN fJA - 'IN

o
600

o

0.5

.,'

~,,,

,

' fi+'"'I:'

,V'

20

SATURATION VOLTAGE - VeE {SAD

DWG.t:l!. A-IO.Il72A

O'IIG. NO. A-975~B

SERIES ULS-2000H AND ULS-2000R
PART NUMBERING SYSTEM
UL 5 - 20
-,

'40'v

'"

~,\;\~" ",,0
~' ~,;r

::J
U

1T

1 3 H - MIL

"SIIUtT""

MIL = MILITARY GRADE WITH SCREENING TO
MIL-STO-883, CLASS B

PACKAGE DESIGNATION.
C = UNPACKAGED CHIP
H = GLASS/METAL HERMETIC, DUAL IN-LINE
A = PLASTIC, DUAL IN-LINE
R = CERAMIC/GLASS HERMETIC, DUAL IN-LINE
DEVICE
1=
2=
3=
4=
5=
L---DEVICE

o=

1=
2=
L-----DEVICE

INPUT CHARACTERISTICS
GENERAL PURPOSE PMOS/CMOS
14-25 V PMOS
5 VTTUCMOS
6-15 V CMOS/PMOS
HIGH-OUTPUT TTL
OUTPUT CHARACTERISTICS
50 V AND 500 rnA MAXIMUM
50 V AND 600 rnA MAXIMUM
95 V AND 500 rnA MAXIMUM (PACKAGE H OR A ONLY)
TYPE NUMBER (4 DIGITS IN 2000 SERIES)

L..---oPERATlNG AMBIENT TEMPERATURE RANGE.
N = COMMERCIAL (-20°C TO +85°C)
Q = EXTENDED (-40°C TO +85°C)
S = FULL MILITARY (-55°C TO + mac)
-FAMILY.

5-15

D

SERIES ULS-2000H·AND ULS-2000R
HIGH-VOLTAGE, HIGH-CORRENTDARLINGTON TRANSIST~R ARRAYS

INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE

SERIES 2002*

SERIES 2003·
2.5

2.0

J

.::

1.5

E

:!O

~

a

1.0

~

:!O

0.5

0~12~--7"~--~1.~----~'8-----f.20~--~2'2----~----~
INPUT VOLTAGE - VIN

~.IIO.O\-IO.225

0

2.0

2.5

3.0

3,5

5 ••

INPUT VOLTAGE - VIN

SERIES 2005'
SERIES 2004*
3.5
2.

3 ••

J. 2.5

5

~

-

5 ------

~---,......

0

5

•

~

---7

~

---------- ---_ ---~

~

1'IPlC~l

..

..,IN.

,

'~"

E

z

!!!:::l

2 ••

1.5

u

~
~

1.0

0.5

8

9

INPUT VOLTAGE - YIN

10

I

II
l)III(l.r.o.A-IO.2.2.6

3.0
3.5
INPUT VOLTAGE - V,N
DWG. MO.

'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
previous part number description.

~16

5.5
D'tI'i.NO.A-IO.m

4.0

A-IO.87~

ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES

ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES

FEATURES
•
•
•
•

TIl, DTl, PMOS, or CMOS Compatible Inputs
Transient-Protected Outputs
Hermetically Sealed Package to Mll-M-38510
High-Reliability Screening to Mll-STO-883, Class B

INTENDED FOR MILITARY, aerospace, and related applications,
ULS-2064H through ULS-2077H high-voltage high-current integrated
circuit switches will interface from low-level logic to a variety of peripheral
loads such as relays, solenoids, doc and stepping motors, multiplexed LED
and incandescent displays, heaters, and similar loads up to 400 W (1.25 A
per output, 80 V, 12.5% duty cycle, +50°C).

ULS-2064H
THROUGH ULS-2067H

The devices are specified with a minimum output breakdown of 50 volts,
and VCE(SUS) minimum of 35 volts measured at 100 rnA, or a minimum output
breakdown of 80 volts, VCE(SUS) minimum of 50 volts, and an output current
specification of 1.25 A (saturated).
Types ULS-2064H, ULS-2065H, ULS-2068H and ULS-2069H are
designed for use with TTL, DTL, Schottky TTL, and 5 V CMOS logic.
Types ULS-2066H, ULS-2067H, ULS-2070H and ULS-2071H are
intended for use with 6 V to 15 V CMOS and PMOS input circuits.
All eight of these devices include integral transient suppression diodes
for use with inductive loads.
Dwg. No. A-U.026

Types ULS-2068H and ULS-2069H incorporate a pre-driver stage requiring a 5 V supply rail. Types ULS-2070H and ULS-2071H include an
added gain stage requiring a 12 V (nominal) supply rail. The input drive
requirements for these devices are reduced, while the output can switch
currents up to 1.5 A.

ULS-2068H
THROUGH ULS-2071 H

Types ULS-2074H through ULS-2077H are intended for use in emitterfollower or similar isolated Darlington applications where common-emitter
versions cannot be used. These circuits are identical with the ULS-2064H
through ULS-2067H types except for the isolated Darlington pin-out and
the omission of the suppression diodes.
All twelve Quad Darlington Switches are supplied in 16-pin hermetic
dual-in-line packages. They meet the processing and environmental requirements ofMIL-STD-883 Methods 5004 and 5005, and the dimensional
requirements of MIL-M-3851O.

Owg. No. A-ll,on

ULS-2074H
THROUGH ULS-2077H

5--17

o

ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
for anyone driver
(unless otherwise noted)
Output Voltage, VCEX ....................... See Below
Output Sustaining Voltage, VCEISUSI ............. See Below
Output Current, loUT (Note 1) .................... 1.5 A
Input Voltage, VIN (Note 2) .................. See Below
Input Current, 18 (Note 3) ...................... 25 mA
Supply Voltage, Vs (ULS-206S/69H) ................ 10 V
(ULS-2070I71H) ................ 20 V
Total Package Power Dissipation .............. See Graph
Power Dissipation, Po/Output .................... 2.2 W
Operating Ambient Temperature Range, TA -55°C to + 125°C
Storage Temperature Range, Ts ........ -65°C to + 150°C

PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

~L

I'R
'U"f"

C' ">..?oo

I

~IENT TEMPERA TURE

I " .........

NORMAL

SYSTEM LIMIT

I

""'-

.• - - --r---- .
I

flJA'9O"J

DEVICE' ...

LIMIT

25

50

75

TEMPERATURE IN

100

......,

125

150

°c
0'IIii.1I0.0\.-10.198l

Type Number
ULS-20S4H
ULS-20S5H
ULS-20SSH
ULS-20S7H
ULS-20S8H
ULS-20S9H
ULS-2070H
ULS-2071H
ULS-2074H
ULS-2075H
ULS-207SH
ULS-2077H

Vm (max.)
50 V
SO V
50V
80 V
50V
SO V
50 V
80 V
50 V
SOV
50 V
80 V

VCEISUS! (min.)
35 V
50 V
35 V
50V
35 V
50 V
35 V
50 V
35 V
50 V
35 V
50 V

VIN (max.)
15 V
15 V
30V
30 V
15 V
15 V
30 V
30V
30 V
SOV
30 V
SOV

Application
TIL, DTL, Schottky TIL,
and 5 V CMOS
S to 15 V CMOS
and PMOS
TTL, DTL, Schottky TIL,
and 5 V CMOS
S to 15 V CMOS
and PMOS
General Purpose
S to 15 V CMOS
and PMOS

Notes:
I. For allowable combinations of output current, number of outputs conducting, and duty cycle, see graphs following.
2. Input voltage is with reference to the substrate (no connection to any other pins) forthe ULS-2074175/76/77H, reference is ground for all other types.
3. Input current may be limited by maximum allowable input voltage.

5-1S

ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES

ULS-2064H THROUGH ULS-2067H
PARTIAL SCHEMATIC

..,.--+---oc
I
I

i

I

7.2K

I
I

I

rh
DWG.MO..... IO.353

ULS-2064H
ULS-2065H

RIN

ULS-2066H
ULS-2067H

RIN =

=

350

n

..

3 en
....
Dwg. No. A-ll.02S

ULS-2068H THROUGH ULS-2071 H
PARTIAL SCHEMATIC

ULS-2068H
ULS-2069H
ULS-2070H
ULS-2071H

RIN

= 2.5 kO,

RIN =

D

"5

11.6 kil,

D

= 900 n
RS

3.4 kO

Rs =

.,.----+---oc

,

i

I
I

7.2K

I
I
I

,f,
OWO.NO. A-IO.lSI'

Dwg. No. A-ll.026

ULS-2074H THROUGH ULS-2077H
PARTIAL SCHEMATIC

,,

i

I

7.2K

I
I

I
....l..

3K

SUB

ULS-2074H
ULS-2075H
ULS-2076H
ULS-2077H

DWG.NO.A-IO,lf>5

R
IN

=

RIN

=

350

n

..

3 I.n

....

Dwg. No. A-l1,027

5--19

ULS·2064H THROUGH ULS·2077H
1.25 A QUAD DARLINGTON SWITCHES

ULS-2064H THROUGH ULS-2067H

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

Output Leakage Current

leEX

output sustammg vOltage

VeEisus)

Collector-Emitter
Saturation Voltage

VeEiSAn

Applicable
Devices

Temp.

UlS-2064/66H
UlS-2065/67H
ULS-ZUti4/titiH
ULS-2065/67H
-55OC

All

+25OC

+125°

Input Current

IlNCool
UlS-2064/65H
ULS-2066/67H

Input Voltage

V'N100I
UlS-2064/65H
UlS-2066/67H

Turn-On Delay
Tum-Off Deiai
Clamp Diode leakage
Current
Clamp Diode
Forward Voltage

to.
to"
IR

-55OC
+25OC
55°C
+25OC

All
All
UlS-2064/66H
ULS-lUb~/b/H

V,

All

5---20

Test Conditions

Fig.

VeE = 50 V .
VeE - 80 V
Ie - IUU mA, Vw - 0.4 V
Ie - 100 mA, Vw - 0.4 V
Ie - 500 mA, 19 - 1.1 mA
Ie - 750 mA, 19 - 1.7 mA
Ie - 1.0 A, 19 - 2.25 mA
Ie - 1.25 A, 19 - 3.75 mA
Ie - 500 ~Ia- 625 f.£A
I = 750 mA, I = 935/LA
Ie = 1.0 A, 19 = 1.25 mA
Ie - 1.25 A, 19 - 2.0 mA
Ie - 500 mA, 19 - 625 /LA
I - 750 mA, I" - 935/LA
Ie - 1.0 A, 19 - 1.25 mA
Ie = 1.25 A, 19 = 2.0 mA
V. - 2.4 V
VIN - 3.75 V
Vw - 5.0 V
Vw - 12 V
VeE - 2.0 V, Ie - LOA
VeE - 2.0V, Ie - LOA
VI'> - 2.0 V, Ie - 1.0 A
VCE = 2.0 V, Ie - 1.0 A
0.5 E" to U.~ ~.ut
0.5 E" to 0.5 E..,
VR - 50 V
vR- ~u V
I, = 1.25A

1
1
Z
2
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
5
5
5
5
-

-

6
b
7

Limits
Min.
Max.

Units

-

p.J.

35
50
-

_.

-

-

-

-

500
500

1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.15
1.35
1.55
1.75
1.95
4.3
9.ti
1.8
5.2
3.1
2.0
11.5
6.5
I.U
1.5
100
lUU
2.1

/LA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
V
V
V
V
/LS
/LS
/LA
/LA
V

ULS-2064H THROUGH ULS-2077H
1.25 A QUAD DARLINGTON SWITCHES

ULS-2068H THROUGH ULS-2071 H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted),
Vs = 5.0 V (ULS-2068/69H) or Vs = 12 V (ULS-2070I71H)
Characteristic

Symbol

Output Leakage Current

leu

Output Sustaining Voltage
Collector-Emiller
Saturation Voltage

VWSUS)

Applicable
Devices

Temp.

ULS-2068170H
ULS-2069/7IH
ULS-2068 17 OH
UL~-2ub91 tlH

VeE(SAn

-55°C

ULS-2068/69H

+25°C

+ 125°C

-55°C

ULS-2070/71H

+25°C

+125°C
Input Current

IINION)

ULS-2068/69H

-55°C
+25OC
+ 125°C

ULS-2070/71H
Input Voltage

VINION)

ULS-2068/69H

-55°C

ULS-2070/71H

-55OC

+2~O~
+Z~o

Supply Current

Is

Turn-On Delav
Turn-Off Delav
Clamp Diode
Leakal!e Current
Clamp Diode
Forward Volta2e

t
t
I,
V,

ULS-2068/69H
ULS-2070/71H
All
All
ULS-2068/70H
ULS-2069/71H
All

5-21

Test Conditions
VCE = 50 V
VCE - 80 Y .
Ie - 100 rnA, Vw - 0.4 V
Ie - I UU rnA, VIN - U.4 V
Ie = 500 rnA, VIN = 3.2 V
Ie - 750 rnA, VIN - 3.2 V
Ie - 1.0 A, VIN - 3.2 V
Ie - 1.25 A, VW - ;J.Z V
Ie = 500 rnA, VIN = 2.9 V
Ie - I~O rnA, VIN - Z.9 Y
I = 1.0 A, VIN = 2.9 V
I = 1.25 A, Vw = 2.9V
I = 500 rnA, Y'N = 2.8 V
Ie - 750 rnA, Y'N - 2.8 V
I - 1.0 A, Y'N - 2.8 V
I - 1.25 A V - 2.8 V
I = 500 rnA, V" = 5.5 V
Ie = 750 rnA, VIN = 5.5 V
I = 1.0 A, V" - 5.5 V
I = 1.25 A, VIII = 5.5 V
Ie = 500 rnA, Y'N = 5.1 V
I = 750 rnA, Y'N = 5.1 V
Ie = 1.0 A, Y'N = 5.1 V
Ie = 1.25A, Y'N = 5.1 V
Ie - 500 rnA, Y'N - 5.0 V
Ie - 750 rnA, Y'N - 5.0V
I - 1.0 A, VIN - 5.0 V
I = 1.25 A, VIN - 5.0 V
VIII = 3.2 V
VIN - 2.75 V
V" = 2.75 V
V" - 3.75 V
VJ!J. = 5.0 V
V,. = 12 V
VCE = 2.0 V, Ie = 1.0 A
VeE - Z.U V, It - !.U A
VCE = 2.0 V, Ie = 1.0 A
Z.O V I
1.0 A
V"
I = 500 rnA, V,. = 3.2 V
I = 500 rnA V,. = 5.0 V
0.5 E" to 0.5 E,",
0.5 E to 0.5 E
V = 50V
V = 80 V
I, = 1.25 A

Fig.
I
I
2
Z

3
3
3
3
3

Limits
Min.
Max.

35
50

-

-

1.35
1.55

3

-

3

-

3

-

3

500
500

l.t~

1.95
1.20

1.35

-

1.55
1.75
1.35
1.55
1.75
1.95
1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.75
1.35
1.55
1.75
1.95
600
550
850
1000
400
1250
3.2

~

-

Z.I~

5

-

~.U

3
3
3
3
3
3

3
3
3

3
3
3
3
3
3
4
4
4
4
4
4
5

~

-

-

-

-

-

-

-

-

-

-

8
8

6
6
7

-

5.0
6.0
4.5
1.0
1.5
100
100
2.1

Units
/LA
/LA
V

'i

V
Y
V
V
V

"-V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Y
/LA
/LA
/LA
/LA
/LA
/LA
V
V
V
V
rnA
rnA
Jl-S
/LS
/LA
A
V

o

ULS·2064H THROUGH ULS,2077H
1.25 A. QUAD DARLINGTON SWITCHES

ULS-2074H THROUGH ULS-2077H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

Output Leakage Current

ICEX

Output Sustaining Voltage

Vc",u~

Collector-Emitter
Saturation Voltage

Applicable
Devices

Limits.
Temp.

ULS-2074/76H
ULS-2075/77H
ULS-2074/76H
ULS-2075/77H

VC"'An
-55"C

All

+25°C

+125"C
IRput Current

I.(ON)

ULS-2074/75H
ULS-2.076/77H

Input Voltage

Tum-On Delay
Turn-Off Delay

VIIIION'

10.
t""

ULS-2074/75H

-we

ULS-2076/77H

+25"C
-55"C
+25"C

All
All

5--22

Test Conditions

Fig.

Min.

Max.

Units

Vcr = 50 V
Ve• = 80 V
- 100 mA, V. - 0.4 V
- 100 mA, ~ = 0.4 V
- 500 mA, I, - 1.1 mA
- 750 mA, lL = 1.7 mA
= 1.0 A, I = 2.25 mA
= 1.25 A I '" 3.75 mA
=500mAI = 625~A
= 750 mA, I = 935/LA
- 1.0 A, I - 1.25 mA
= 1.25 A _Ill = 2.0 mA
= 500 mA, I = 625/LA
- 750 mA I - 935/LA
= 1.0 A, I - 1.25 mA
= 1.25 A, Is = 2.0 mA
V. = 2.4 V
V.. = 3.75 V
V. = 5.0 V
V. = 12 V
V" = 2.0 V -"'- = 1.0 A
k = 2.0 V, -"'- = 1.0 A
Vcr = 2.0 V, Ie = 1.0 A
'!cr. - 2.0 V -"'- - 1.0 A
0.5 E to 0,5 E
0.5 E to 0.5 E

I
I
2
2
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
5
5
5
5
-

-

500
500

35
50

-

..J!,.A
/LA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
rnA
V
V
V
V
/LS
/LS

-

-

-

-

-

-

-

-

1.35
1.55
1.75
1.95
1.20
1.35
1.55
1.75
1.35
1.55
1.75
1.95
4.3
9.6
1.8
5.2
3.1
2.0
U.S
6.5
1.0
1.5

ULS-2064H THROUGH ULS-2077H
1.2S A QUAD DARLINGTON SWITCHES

TEST FIGURES

OPEN

VCE

OPEN

OPEN

DI«i. MO. "'10,3..9

Figure 1

Figure 2

OPEN

Figure 3

o

v,

OPEN

;;»----<'----0 OPE N
OPEN
D~.

D'IIG.ItO....... 973'4A

Figure"

Figure'

Figure 5

Vs

OPEN

'F

'e

Figure 7
D\oI6.HO. A-IO.3SI

Figure 8
NOTE: Diodes not applicable to Type ULS-2074H through ULS-2077H.

!>-23

NO. A-9735A

ULS-2064H THROUGH ULS-2077H
1.2S A QUAD DARLINGTON SWITCHES

INPUT CURRENT AS A 'UNCTION OF INPUT VOLTAGE

14

12

UlS-2066167H
UlS-2076177H

~

10

-"~
e

"~
::>

u

~

.

E

8

«e'

"Z

•

IP

a

"

~

"V
2

10-'-'-.-'_
~
INPUT VOLTAGE - VIN

['I~!r..

NO. A-ll

~

V
./

~
./
",.\G~.

.-'-

.-.-"

c:..-

~

~

~

~

V
._.-.-'

.-'-

.-'-~

~

.-.-'-

----

~

COLLECTOR CURRENT AS A FUNCTION
OF INPUT CURRENT

UlS-2064H thru UlS-2067H
UlS-2074H thru UlS-2077H

ut-----+-----+-----+-_---I---l

~ Lat-----+~~--~~~--+_---_I-~

0.5

f----J~___i.,....---+----+_---__1-­

ou
,,'

"
/,

La

J,.......---"

11

10

~

.-.-'-

,03~·

INPUT VOLTAGE - VIN

I<

.-'-

4.

2.0
INPUT CURRENT IN MILLIAMPERES - liN

5-24

OW{]. No. A-ll.030

OWG.

~lO.

12
A-ll ,034

ULS-2064H THROUGH ULS-2077H
1.2S A QUAD DARLINGTON SWITCHES
ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
AT +50°C

~ 1.25r---+-\-~+-"""---1---+--""01::-----1--+--t---+---i
~
~

10

20

3D

40

PER CENT DUTY CYCLE
Dwq. No. A-l1,031

AT +75°C

~

~-r""""'-+--'"

1.5

,. 1.25 f---\fl~~d----1-.3oo,.t--+--~--+--+-----+---f

~

~

~

1.0

a

g

0.75

"
u

O.50r---+--+-----1---""....;;cr-_±----f=-....=-t---t---i

PER CENT DUTY CYCLE

AT +100°C

,

0

l~

5

\.

~\

~\
5

.,,llUTE
- -MJMUM
--cuLNT- - - -- - - ---

.----~

"

~ ...........

'-

,,~,

...........

~~
NUMBER OF OUTPUTS I
~

:f:: ::::::

o

: CONour "TANEOr

Y

G

10

20

3D

40

50

-

60

PER CENT DUTY CYCLE

5--25

-

"""- r0-

70

80

90
A-ll,rJiJ

100

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT
DARLINGTON TRANSISTOR ARRAYS

FEATURES
•
•
•
•
•
•
•

TIL, DTL, PMOS, or CMOS Compatible Inputs
Peak Output Current to 600 rnA
Transient Protected Outputs
Side-Brazed Hermetic Package, or
Cer-DIP Package
High-Reliability Screening Available
Wide Operating Temperature Ranges

DESI?~ED. for inte~acing between low-level

logic circUitry and high-power loads, the Series
ULS-2800H and ULS-2800R arrays consist of eight
silicon NPN Darlington power drivers on a common
monolithic substrate. The choice of five input characteristics, two output voltage ratings (50 or 95 V),
two output current ratings (500 or 600 rnA), and two
package styles (suffix 'H' or 'R') allow the circuit
designer to select the optimum device for any specific application.

V··G. NO. A-IO,32?

All Series ULS-2800H Darlington power drivers
are furnished in an 18-pin side-brazed dual in-line
hermetic package that meets the processing and environmental requirements of Military Standard
MIL-STD-883, Methods 5004 and 5005.

Both hermetically sealed package styles are rated
for operation over the temperature range of - 5SOC
to + 125°C, recommending them for military and
aerospace applications or commercial and industrial
applications where severe environmental conditions
may be encountered.

VCE(MAXl IC(MAX)

Device Type Nu mber Designation
so V
so V

=

General-Purpose
PMOS, CMOS
14-2S V
PMOS
SV
TTL, CMOS
6-1S V
CMOS, PMOS
High-Output
TTL

The appropriate specific part number for use in
standard logic applications can be determined from
the Device Type Number Designation chart. Note
that the high-voltage devices (BV CE 2:: 95 V) are
available in the Series ULS-2800H only. All units
feature open collector outputs and integral diodes
for inductive load transient suppression.

5---26

SOO mA

ULS-2801R
ULS-2801H
ULS-2802R
ULS-2802H
ULS-2803R
ULS-2803H
ULS-2804R
ULS-2804H
ULS-280SR
ULS-280SH

600 mA
Type Number
ULS-2811R
ULS-2811H
ULS-2812R
ULS-2812H
ULS-2813R
ULS-2813H
ULS-2814R
ULS-2814H
ULS-281SR
ULS-281SH

9S V
SOO mA

ULS-2821H
ULS-2822H
ULS-2823H
ULS-2824H
ULS-282SH

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE (Series 2800*, 2810*) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 50 V
(Series ULS-2020H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 95 V
Input Voltage, V'N (Series 2802*, 2803*, 2804*) . . . . . . . . . . . . . . . . . . . . . . . . . . .. 30 V
(Series 2805*) ...................................... 15 V
Peak Output Current, louT (Series 2800*, ULS-2820H) ...................... 500 rnA
(Series 2810*) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 600 rnA
Ground Terminal Current, IGNO ......................................... 3.0 A
Continuous Input Current, liN ........................................ 25 rnA
Power Dissipation, Po (one Darlington pair) ............................... 1.0 W
(total package) ............................... See Graphs
Operating Temperature Range, T•............................ - 55°C to + 125°C
Storage Temperature Range, Ts ............................. - 65°C to + 150°C

PARTIAL SCHEMATICS
Series 2801"
(each driver)

Series 2802"
(each driver)

D

Series 2803"
(each driver)

.---M---oCOM

..---M---oCOM

,

,
,

2.7K

t

X
,
I

_._'I
0111•• 10. A-96SI

Series 2805'
(each driver)

.-+1---0 COM
1. 05K

,
I
I

- --,

"G 110. A-IO.1211

OWG. 10. '.9I,.A

'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.

':r-27

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE~HrGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2800H AND ULS-2800R
ELECTRICAL CHARACTERISTICS over operating temperature range {unless otherwise noted)
Characteristic
Output leakage Current

Collector-Emitter
Saturation Voltage

Symbol
ICEX

VCE(SAI)

Applicable
Devices
All
2802'
2804'
All

Test Conditions
Temp

Min.

+25°C

Max.

Input Current

Input Voltage

I(N(ON)

I(N(OfF)
VIN(ON)

2802'
2803'
28042805'
All
2802'
2803'

Max.
Min.
Max.
Min.

Max.

2804-

Min.

Max.

2805'
D-C Forward Current
Transfer Ratio
. Input Capacitance
Tum-On Delay
Tum-Off Delay
Clamp Diode Leakage
Current
Clamp Diode Forward
Voltage

hFE

2801'

C'N
tPlH
tPHl
I,

All
All
All
All

VF

All

Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C

Vr., - 50 V
VeE = 50 V, VIN = 6 V
VCE - 50 V, VIN - 1 V
Ic - 350 rnA, 18 - 850 pA
I - 200 rnA, 18 ~ 550 p.A
Ic - 100 rnA, 18 - 350 p.A
I~ - 350 rnA, 18 - 500 p.A
Ic - 200 rnA, 18 - 350 p.A
Ic - lUU mil, 18 - z~u p.A
Ic - 350 rnA, 18 - 500 p.A
Ic - 200 rnA, 18 - 350 pA
Ic = 100 rnA, 18 = 250 p.A
V(N - 17 V
VIN - 3.85 V
VIN -5V
VIN - 12 V
VJJ!- 3 V.
Ic = 500 p.A
VeE - 2V,lc - }OOmA
VCE = 2 V, Ic = 300 rnA
VCE - 2V,Ic - 200 rnA
VCE = 2V,Ic = 250 rnA
VCE = 2V,Ic = 300 rnA
Vc-; - 2 V, Ic - 200 rnA
VCE - 2 V, Ic - 25u rnA
VCE ='2V,l c = 300 rnA
VeE - 2 V, Ic - 125 rnA
VCE = 2 V, Ic = 200 rnA
VCE - 2 V, Ic - 275 rnA
VCE - 2V,Ic - 350 rnA
VCE = 2 V, Ic = 125 rnA
VCE - 2V,Ic - 200 rnA
VCE - 2 V, Ic - 275 rnA
VCE = 2 V, Ic - 350 rnA
Vr., - 2V,I - 350 rnA
VCE = 2 V, Ic = 350 rnA
VCE = 2 V, I, = 350 rnA
VCE - 2 V,lc - 350 rnA
0.5 Ein to 0.5 Eout
0.5 Ein to 0.5 E",
V. - 50 V
IF = 350 rnA

-Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
Note1: All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2: The I)N(OFf) current limit guarantees against partial turn-on of the output.
Note 3: The VIN(ON) voltage limit guarantees a minimum output sink current per the specified test conditions.

5-28

Fig. Min.
lA -

IB
IB

2
2
2
2
2

z
2
2
2
3
3

3
3
3

4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2
2

-

-

-

-

480
65u
240
650
1180
25

-

500
1000

-

Limits
Typ.
Max.
100
500
500
1.6
1.8
U

l.!l

1.1
1.25
1.1
0.9
1.6

1.3

u
1.1
850
930
350
1000
1500
50

-

-

-

-

-

6

-

15
250
250
-

7

-

1.7

1.6
1.3

1.1
1.8
1.:>
1.3
13UO
1350
500
1450
2400
'-

18
13
3.3
3.6
3.9
2.4

Units

JJA
pA
pA
V
V
V
V
V
V
V
V
V
pA

p.A

EA
pA

A
p.A
V
V
V
V
V
V

Z./

V

3.0
6.0
8.0
10
12
5.0
6.0
7.0
8.0
3.0
2.4

25
1000
1000
50

V
V
V
V
V
V
V
V
V
V
V
pF
ns
ns
p.A

2.0

V

-

-

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2810H AND ULS-2810R
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic
Output Leakage Current

Syrnbol
I",

Collector-Ern itter
Saturation Voltage

VellS")

Applicable
Devices
All
2812'
2814'
All

Test Conditions
Ternp

Min.

+25°C

Max.

Input Current

I'NION)

Input Voltage

IlNlom
VINION)

2812'
2813'
2814'
2815'
All
2812'
2813'

Max.
Min.
Max.
Min.

Max.

2814'

Min.

Max.

2815'

Min.
Max.

D-C Forward Current
Transfer Ratio
Input Capacitance
Tum-On Delay
Turn-Off Delay
Clamp Diode Leakage
Current
Clarnp Diode Forward
Voltage

hFE

2811 '

C'N
tPL.
tpHL
IR

All
All
All
All

VF

All

Min.
+25°C
+25°C
+25°C
+25°C

Fig. Min.
1A V" = 50 V
Vel ~ 50V, V,N - 6V
1B 1B V" = 50 V, V,N = 1 V
Ie - 500 rnA, IB - 1100 IJ-A 2
Ie - 350 rnA, IB - 850 IJ-A 2
I = 200 rnA, I, = 550 JJ,A 2
I = 500 rnA, IB = 600 IJ-A 2
Ie = 350 rnA, IB = 500 IJ-A 2
I = 200 rnA, IB = 350 IJ-A 2
I = 500 rnA, IB = 600ILA 2
I = 350 rnA I. = 500JJ,A 2
I = 200 rnA I. = 350 A 2
480
3
V'N=17V
650
3
Y'N = 3.85 V
240
3
V. = 5 V
VIN = 12 V
3
650
3 1180
Y'N = 3 V
I = 500/LA
4
25
VeE = 2 V, I, = 500 rnA
5
VeE = 2 V, I = 500 rnA
5
V E = 2 V, Ie = 250 rnA
5
Vr., = 2V, Ir. = 300 rnA
5
VeE =2V,1 = 500 rnA
5
5
VeE = 2 V, Ie = 250 rnA
Vr., = 2 V, I = 300 rnA
5
V,,=2V,1 = 500 rnA
5
Vr., = 2 V, I = 275 rnA
5
VeE = 2 V, I = 350 rnA
5
5
VeE = 2 V, Ie = 500 rnA
VeE - 2 V, Ie - 275 rnA
5
VeE =2V,1 = 350 rnA
5
5
V" = 2V, I = 500 rnA
VeE = 2 V, Ie = 350 rnA
5
5
V" - 2 V, Ir. - 500 rnA
5
VeE = 2 V, Ie = 350 rnA
VCE = 2 V, I = 500 rnA
5
VCE = 2 V, I =500 rnA
2
450
2
900
V" = 2V, I = 500 rnA
0.5 E to 0.5 E
0.5 E,• to 0.5 E",
VR= 50 V
6
IF = 350 rnA
IF - 500 rnA

'Complete part number includes a prefix to indicate temperature range and a suffix to indicate package style. See
following part number description.
Note 1: All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2: The 1,,(0Ff) current limit guarantees against partial turn-on of the output.
Note 3: The VIN(ON) voltage limit guarantees a minimum output sink current per the specified test conditions.

5--29

7
7

-

lirnits
Typ.
1.8
1.6

-

23.5
17
3.6
3.9
6.0
2.7
3.0
3.5
10
12
17
7.0
8.0
9.5
3.0
3.5
2.4
2.6
-

Units
IJ-A'
IJ-A
JL_A
V
V
V
V
V
V
V
V
V
JJ-A
uA
JJ,A
IJ-A
JJ,A
JJ,A
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-

-

-

-

15
250
250

25
1000
1000
50

pF
ns
ns
IJ-A

2.0
2.5

V
V

l.3

J.7
1.25
l.l
1.8
1.6
1.3
850
930
350
1000
1500
50
-

-

-

-

-

J.7
-

Max.
100
500
500
2.1
1.8
1.5
1.9
1.6
l.3

2.1
1.8
1.5
1300
1350
500
1450
2400

-

o

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS·2820H
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output leakage Current

Symbol

Collector-Emitter
Saturation Voltage

VeEISATi

1m

Applicable
Devices
All
21S22H
2824H
All

Test Conditions
Temp

Min.

+25°C

Max.

Input Current

IInput Voltage

IINION)

I'NOf~
V'NION)

2822H
2823H
2824H
ZIS20H
All
2822H
2823H

Max.
Min.
Max.
Min.

Max.

2824H

Min.

Max.

2825H

Iu-c ~orward

Current
Transfer Ratio
Input Capacitance
Turn-On Delay
Tu rn-Off Delay
IClamp Diode leakage
Current
Clamp Diode.Forward
Voltage

h'E

2821H

C'N
tPlH
t PIII ,
I,

All
All
All
All

V,

All

Min.
Max.
Min.
+25°C
+25°C
+25°C
+25°C

VeE -95V
VeE - 95 V, V,. - 6 V
VeE - 95 V, VIN - 1 V
Ie - 350 mA, 18 - 850 ~
Ie - ZUU mA, 18 - !l!lU IlA
Ie - 100 mA, 18 - 350 ~
Ie - 350 rnA, 18 - 500 ~
Ie = 200 rnA, 18 = 350 ~
Ie = 100 rnA, 18 = 250 pA
Ie - 30U rnA, 18 - 500 IlA
Ie = 200 rnA, 18 = 350 ~
Ie = 100 rnA, 18 - 250 ~
Y'N - 17V
V'N = 3.85 V
VIN = 5V
V'N _. 12 V
V'N - 3 V
Ie = 500 pA
VeE - 2 V, Ie - 300 rnA
VeE - LV, Ie - 300 mA
VeE - 2V,Ie - 200 mA
VeE - 2 V, Ie - 250 rnA
VeE - Z V, Ie - 3uO mA
_VeE = ",,-V,le = 200 rnA
VeE - 2 V, Ie - 250 mA
VeE - 2 V, Ie - 300 mA
VeE = 2 V, Ie = 125 rnA
VeE = 2 V, Ie = 200 rnA
VeE - LV, Ie -Z~ rnA
VeE = 2 V, Ie = 350 rnA
VeE - 2 V, Ie - 125 rnA
VeE - 2V,Ie - 200 mA
VeE - 2 V, Ie - 275 mA
VeE = 2 V, Ie = 350 rnA
VeE = 2 V, Ie = 350 mA
VeE = 2 V, Ie = 350 rnA
VeE - 2 V, Ie - 350 mA
VeE - Z V, Ie - 30u mA
0.5 E," to 0.5 E",
0.5 E," to 0.5 Eout
V, - 95V
I,

= 350 mA

Note 1: All limits stated apply to the complete Darlington series except as specified for a single device type.
Note 2: The I'NIOFf) current limit guarantees against partial turn-on of the output.
Note 3: The V'N'ON) voltage limit guarantees a minimum output sink current per the specified test conditions.

5-30

Fig. Min.
1A 1B 1B 2
Z
2
2
2
2
2
2
2
3
480
3
650
3
240
3
650
3
1180
4
25
5
5
5
5
5
5
5
5
5
5
~

5
5
5
5
5
5
5
2
2
6
7

-

-

500
lUOu

-

-

Limits
Typ.

1.6

u
1.1
1.25
1.1
0.9
1.6

1.3
1.1
850
930
350
1000
1500
50
-

-

-

-

15
250
250

-

-

-

1.7

Max.
100
500
500
1.8
1.0
1.3
1.6
1.3
1.1
1.8
1.5

1.3

Units
~
IlA
~
V
V
V
V
V
V
V
V
V

1300
1350
500
1450
2400

pA
pA
pA
pA

18
13
3.3
3.6
3.9
2.4
2.7
3.0
6.0
8.0
lU
12
5.0
6.0
7.0
8.0
3.0
2.4
-

IlA

~

25
1000
1000
50

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
pF
ns
ns
pA

2.0

V

-

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

TEST FIGURES
OP£N

VeE

OP£N

VeE

OP£N

FIGURE 1A

FIGURE 18

OPEN
OPEN

' ; - - 6 . _ - 0 OPEN

DIIG. 110, ... ·9732

OW3. 10 .... ~9731

FIGURE 2

OPEN

FIGURE 3

VeE

OPEN

FIGURE 4

FIGURE 5

M.IIO. A-973!:1A

FIGURE 6

FIGURE 7

5-31

D

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS·2800H
PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE

AT +50"C

~

::1

a
~

o8200[:::r:::J[:::r:~~~:t:::I~~~~!§~~~~
U
NUMBER OF OUTPUTS
~

NUMBER OF OUTPUTS
CONDUCTING
o SIMULTANEOUSLY

~
~

20

40

60

PER CENT DUTY CYCLE

eo

CONDUCTING

0 SIMULTANEOUSLY

o

100

1lWG..IIO. ""'10.875

AT + 100"C

20

40
60
PER CENT DUTY CYCLE

80

100

O'MG.IIO. A-lo.a7&

AT +125°C

z
a

ili

g2OOr---~~~~~~~~~~~b---+--~----r---;

~200~--+----r~~~~~~~'__~~~--~~~----l

;o

~
'"

~

:!l

o
U

NUMBER OF OUTPUTS
CONDUCTING

'"~

0 SIMULTANEOUSLY

PER CENT DUTY CYCLE

lJWIj. ~O.

60
40
PER CENT DUTY CYCLE

A-IO,sn

5-32

80
1lWIl. MO. A-IO.878

100

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

SERIES ULS-2800R
PEAK COLLECTOR CURRENT AS A FUNCTION OF DUTY CYCLE
AT +SO°C

AT +7SoC

6OOr---.---r--.,.--.-,.---.,.--.--.--.,.---,

o

NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY

20

40
60
PER CENT DUTY CYCLE

,0

"'0

PER CENT DUTY CYCLE

ALLOWABLE PACKAGE POWER DISSIPATION
SERIES ULS-2800H AND ULS-2800R
.5

0\

~~
~

'"v"%



~

"

200

,.~

MAXIMUM REQUIRED

400

200

o
600

o

INPUT CURRENT IN !-LA - 'IN
1l\'IG. I'Iil.

0.5

...'

",~

~

'I'

1.0

5 - 28

2.0

SATURATION VOLTAGE - VeE (SAT)
A~

DIIG.HO.A-975I1B

10. 872A

SERIES ULS-2800H AND ULS-2800R
PART NUMBERING SYSTEM
UL

.,'~~
"

, 'fl'

o
u

INPUT CURRENT

0' < -

~. ~ .:::-0

u

o~

1 3

l

H - MIL

.

L

INSTRUCTIONS.
Mil = MILITARY GRADE WITH SCREENING TO
Mll-STD-883, CLASS B

PACKAGE DESIGNATION.
C = UNPACKAGED CHIP
H = GLASS/METAL HERMETIC, DUAL IN-LINE
A = PLASTIC, DUAL IN-LINE
R = CERAMIC/GLASS HERMETIC, DUAL IN-LINE

- DEVICE INPUT CHARACTERISTICS
1 = GENERAL PURPOSE PMOS/CMOS
2 = 14-25 V PMOS
3 = 5V TIl/CMOS
4 = 6-15 V CMOS/PMOS
5 = HIGH-OUTPUT TIl
DEVICE OUTPUT CHARACTERISTICS
o = 50 V AND 500 rnA MAXIMUM
1 = 50 V AND 600 rnA MAXIMUM
2 = 95 V AND 500 rnA MAXIMUM (PACKAGE H OR A ONLY)
' - - - - DEVICE TYPE NUMBER (4 DIGITS IN 2800 SERIES)
OPERATING AMBIENT TEMPERATURE RANGE.
N = COMMERCIAL (-20°C TO +85°C)
= EXTENDED (-40°C TO +85°C)
S = FUll MILITARY (-SSOC TO + 125°C)

a

FAMILY.

5-34

j

SERIES ULS-2800H AND ULS-2800R
HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
SERIES 2803*
SERIES 2802*

. i'

2.5

2.0

2.

I. 5

I.

.... ~ V
..--- ..--V ~
.--- .-..- ~
I'"

o. 5 . . . . - '

't'I'I'IC.Al.

.---

-

---

..--- ~
I'--"

0

I
5

6

7

•

,

10

II

-~
~

1.5

~

~
~

a

1.0

~
~

0.5

0

12

2.0

2.5

3.0

3.5

INPUT VOLTAGE "V IN

5.0

5.5

6.0

INPUT VOLTAGE - VIN

o

SERIES 2805*
3.5,.---,---.,-----.----,..-,..--,

SERIES 2804"
3.01----1-----+----+---#<""'---1

J. 2.51-----t---+----j,~~1IMr_~

i"'

2.0 I-----t---__t ~W~.w.IJ....~__t

~ 1.51-----t-,N'i~~,~~~~~

::>

u

z~ 1.0 I--__.,...~~~~....:..--+---~
0.51-~':ioo"<--+

__

0~12~~~--~16~--~----~2~0----~22'---~--~

oL-__L -__

INPUT VOLTAGE - VIN

1.5

2.0

~

2.5

__

~

3.0

__- L__-J

3.5

4.0

INPUT VOLTAGE - VIN
DWG. NO. ""10.8711

"Complete part number includes a prefix to indicate temperature range and a suffix to indicate package
style. See previous part number description.

5--35

UDQ-2956R ANDUDQ-2957R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

UDQ-2956R AND UDQ-2957R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

EACH OF THESE SOURCE-DRIVER
arrays has five NPN Darlington-pair outputs
and five PNP common-base inputs controlled by
a single ENABLE stage.
Types UDQ-2956R and UDQ-2957R are
typically used to switch the ground ends of loads
such as telephone relays, PIN diodes, LEDs and
similar devices directly connected to negative
supplies. Internal transient-suppression diodes
allow use of the drivers with inductive loads.
Each output stage of both integrated circuits
will withstand output OFF voltages of - 80 V
and load currents as high as - 500 rnA. Under
normal operating conditions, the five drivers will
simultaneously handle load currents of - 170
rnA at ambient temperatures of up to + 70°C.
Type UDQ-2956R is designed for use with
PMOS or CMOS logic input levels operating
with supply voltages of 6 V to 16 V. Type UDQ2957R has input current-limiting resistors that
permit its operation with TTL, Schottky TTL,
DTL and 5 V CMOS.
Both devices are supplied in industrial-grade,
hermetically sealed 14-pin dual in-line ceramic
packages rated for use over the temperature
range of - 4Q°C to + 85°C. Input connections
are on one side of the packages, output connections on the other, to simplify applications
designs.
The substrate oj Type UDQ-2956R and Type
UDQ-2957R should be tied to the most negative
supply available in order to maintain isolation
between drivers.

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
(reference pin 7)
Supply Voltage, VEE ......................... -SO V
Input Voltage, VIN (UDQ-2956R) ................ + 20 V
(UDQ-2957R) •................ + 10 V
Output Current, lOUT ....................... -500 mA
Power Dissipation, PD (anyone driver) ............. 1.0 W
(total package) ........... 1.67 W·
Operating Temperature Range, TA ....... -40°C to +S5°C
Storage Temperature Range, Ts ........ -65°C to + 150°C
·Derate at the rate of 13.3 mW/°C. above +25°C.

These devices can be ordered with an extended temperature range
of - 55°C to + 125°C by changing the prefix from 'UDQ' to 'UDS'.

5--36

UDQ-29S6R AND UDQ-29S7R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Output leakage Current

Symbol
ICE'

Applicable
Devices
UDQ-2956R

Temp.
V~

UOQ-2957R

Collector-Emitter
Saturation Voltage

VCE(SAT)

UOQ-2956R

-40°C

+25°C

+85°C

UDQ-2957R

-40°C

v,.
V,.
V,.
V,.
V,.
V,.
v,.
.V'N
V,.
Y'N
VIN
V,.
V,.
V,.
V~

V,.
Y'N
+25°C

V~

+S5°C

V,.
Y'N
V,.
V~

V,.
Input Current

I'Nlott)

Test Conditions
VENABLE - 0.4 V, VoU! - -SO V
0.4 V, VENABLE - l~ V, vom - -HO V
SO V
15 V, VENABLE - 0.4 V, VOUI VENABLE - 0.4 V, VoU! - -SO V
0.4 V, VENABIi - 3.85 V, VoU! - -SO V
= 3.S5 V, VENA8l£ = 0.4 V, VOUT = -SO V
= 6.0 V, loul = -100 mA
I/~ mA
- I.U v, loul - 10 V, lOUT - -3~U mA
= 6.0 V, lOUT = -100 mA
- 7.0 V, 10UI - -175 mA
- 10 V, InlIT - -350 mA
- 6.0 V, loul - -100 mA
175 mA
- 7.0 V, IoU! - 10 V, 1001 = -350 mA
= 2.4 V, loul = -100 mA
- 2.7 V, IoU! - -175 mA
- 3.9 V, IoU! - ~OmA
- 2.4 V, IoU! - -100 mA
1t5 mA
- 2.1 V, 10UI - 3.~ v, 10UI - -3~U mA
= 2.4 V, lOUT = -IOO!llA
175 mA
- 2.7 V, loul - 3.9 V, loul - -350 mA
-

= 6.0 V, VoU! = -2.0 V
= 15 V, VoU! = -2.0 V
.\i. - 2.4 V, VOUI - 2.U V

UOQ-2956R

V~

V,.

UUU-l~~1K

Output Source Current

1"10ff)
IoU!

VIN - 3.85 V, VOUT - -2.0 V
IoU! - -500,..A

All

I,

All

V,. = 5.0 V,
V,. - 6.0 V,
VI. - 7.0 V,
V,. - S.O V,
VII - 9.0 V,
VIN - 5.0 V,
VIN - 6.0 V,
VIN - I.UV,
V,. - HoU V,
V. = 9.0V,
V,. - 2.4 V,
V,. - 2.7 V;
v,. - 3.U V,
V,. - 3.3 V,
V" - 3.6 V,
V,. - 2.4 V,
V,. - 2.7 V,
V,N - 3.0V,
Y'N - 3.3 V,
v,. - 3.b v,
V, - 8U V

V,

All

I, - 350 mA

10•

All
All

0.5 E,• to 0.5 Eoul R, - 400 n CI - 25 pF
u.5 E,• to 0.5 tour. K, - 4uu n C, - 25 pF

UOQ-2956R

-40°C

+S5°C

UOQ-2957R

-40°C

+S5°{;

{;Iamp Diode
leakage Current
{;Iamp Oiode
Forward Voltage
Tum-On Oelay
Tum-Off Delay

lo"

5--37

VOUI
VoU!
VoU!
VOUI
VoU!
VOUI
VOUI
VoU!
VoU!
VOUI
VOUI
YoUr
VOUI
VOUI
VOUI
Vom
VoU!
VOUI
VoU!
VOul

= -2.0 V
-

=
~

-

-2.0 V
2.0V
-2.0 V
-2.0 V
-2.0 V
-2.0 V
2.0V
2.0V
-2.0V
-2.0 V
-2.0 V
-l.UV
-l.U V
2.0V
2.0V
-~.

-:-2.0 V
- -2.0 V
- -l.U V
~

Limit
-200,..A Max.
2UU,..A JI'IIIx.
200,..A Max.
-200,..A Max.
-200,..A Max.
-200,..A Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
-1.20 V Max.
-1.35 V Max.
-1.70 V Max.
-1.40 V Max.
1.55 V Max.
-1.90 V Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
-1.20 V Max.
-1.35 V Max.
-1.70 V Max.
-1.40 V Max.
-1.55 V Max.
-1.90 V Max.
0.8 rnA Max.
2.25 mA Max.
1.0 mA Max.
2.0mA Max.
50,..A Min.
-75 mA Min.
-125 mA Min.
175 rnA Min.
-250 mA Min.
-300 mA Min.
-125 mA Min.
-200 mA Min.
250 mA Min.
-3UU mA .MIn.
-350 mA Min.
-50 mA Min.
-125 mA Min.
-lUU mA Min.
-l~U mA Min.
300 mA Min.
125 mA Min.
-200 rnA Min.
.... 250 rnA .Min.
-300 mA Min.
-3~U mA Min.
~U,..A Max.
2.0 V Max.
4.U,..S Niax.
10 ,..s Max.

UDQ-29S6R AND UDQ-29S7R
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

r--------,

PARTIAL SCHEMATIC

I

INPUT

I
I

R = 10.5 k.t.. for UDQ-2956R
R = 2.5 k.....·for UOQ-2957R

ENABLE

SUBSTRATE 8 ! ) - : - - - - - - r - -L- - ' - - - . . - - - -..J- , , - - _
__________
SUB

Dwg. No. A-ll,047A

ALLOWABLE PEAK OUTPUT CURRENT
AS A FUNCTION OF DUTY CYCLE

-1001--t--t---/--I--t-+-t---i--+--f
80

90

100

Dwg. No. A-ll ,046

INPUT CURRENT AS A FUNCTION OF INPUT VOLTAGE
atTA = +25 0 C
1.5

2.0

,/

1.5

IUDQ-2956R I

«

E

~

"" ""

>-

15 1.0

'"'"u=>

./
".
=>
~/
~ 0.5 . /
".
/
0.25
>-

0-

V

~

10'""

V

~, V

/

L
E

~
>-

~

15

'"
'"=>
u

>-

=>

MAX,,-

0.5

6

7

8

9

10

~

11

I NPUT VOLTAGE I N VOLTS

12

4

V

yp , .

Co.

~

5

~V"

IUDQ-2957RI
« 1.0

~

"""

~

V
""".

/"

..~

~

~

o

15

2.0

OW9. No. A-ll,044A

5--38

2.5
3.0
INPUT VOLTAGE IN VOLTS

3.5

4.0

Dwg. No. A-ll.045A

SERIES UDS-2980H
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

SERIES UDS-2980H
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS
- Hermetically Sealed

FEATURES:
•
•
•
•
•

TIL, DTL, PMOS or CMOS Compatible Inputs
-500 rnA Output Source CUrrent Capability
Transient-Protected Outputs
High-Reliability Screening to MIL-STD-883, Class B
Operating Temperature -55°C to +125°C

SERIES UDS-2980H HERMETICALL Y
SEALED source drivers interface between
standard low-power digital logic, and relays, solenoids, stepping motors, LEDs, lamps, etc., in applications requiring separate logic and load grounds,
load supply voltages to +80V, and lor load currents
to 500 rnA.

II

Under normal operating conditions these devices
will sustain 50 rnA continuously on each of the eight
.outputs, at an ambient temperature of + 85°C, with a
supply of + 15 V. All four devices incorporate input
current limiting resistors and output suppression diodes.
UDS-2981H and UDS-2983H drivers are intended for use with +5 V logic systems (TTL,
Schottky TTL, DTL and 5 V CMOS). UDS-2982H
and UDS-2984H drivers are intended for MOS
interface (PMOS and CMOS) operating from supply
voltages of from + 6 to + 16 V.
UDS-2981H and UDS-2982H drivers will sustain
a maximum output OFF voltage of +50 V; UDS2983H and UDS-2984H drivers a maximum output
OFF voltage of + 80 V.
In all cases the output is switched ON by an active
high input level.
Note that the maximum current rating may not be
obtained at -55°C because of beta fall-off, or at
+125°C because of package power limitations.

Series UDS-2980H drivers are furnished in
18-pin hermetic dual-in-line packages, and are
processed to the requirements of MIL-STD-883,
Methods 5004 and 5005.

ABSOLUTE MAXIMUM RATINGS

atTa

=

+25°C

Output Voltage Range, VeE
(UDS-2981H & UDS-2982H) ............. + 5 to + 50 V
(UDS-2983H & UDS-2984H) . . . . . . . . . . .. + 35 to + 80 V
Input Voltage, V1N (UDS-2981H & UDS-2983H) ....... + 15 V
(UDS-2982H & UDS-2984H) . . . . . .. + 30 V
Output Current, loUT ....................... - 500 rnA
Power Dissipation, Po (anyone driver) ............. 1.1 W
(total package) .............. 1.67W·
Operating Temperature Range, TA ....... -55°C to + 125°C
Storage Temperature Range, Ts ........ -65°C to + 150°C
"Derate at 13.3 mW/"C above 25"C.

5--39

SERIESUDS-2980H
HIGH-VOLTAGE,· HIGH-CU.RRENT SOURCE DRIVERS
v,
ONE OF EIGHT DRIVERS

2983/2984 ONLY

3K
OUTPUT

OWG.NO. A-II.130B

ELECTRICAL CHARACTERISTICS from - 55°C to + 125°C (unless otherwise specified)
Characteristic

Symbol

Output leakage
Current

IcEX

Collector-Emitter
Saturation Voltage

VCElSAl)

Applicable
Devices
UDS-2981/82H
UDS-2983/84H
UDS- 2981/83H

Test Conditions

Fig.

= 0.25 V·, Vs = 50 V

1
1

200p.A Max.
2UO /LA Max.

2
Z
2
2
2

2.0 V Max.
Z.l V Max.
2.0 V Max.
1.8 V Max.
1.9 V Max.

2
2
2
2

Temp.
VIN

'YIN -

-55"C

VIIt

0.25V*, Vs - 80V

= 2.4 V, lOUT = -100 rnA

vlN - Z.4 v, lOUT - -ZUU rnA
H5"G
+l25"C
UDS-2982/84H

-55"C
+25"C
+125°C

;

Input Current

IIiION)

UDS-2981/83H
UDS-2982/84H

IINlom

VIN - 2.4 V, 10UT - -350 rnA
v,. - 2.4 V, lOUT - -IOU rnA
VIN - 2.4 V, lOUT - -200 mAu
VII = 5.0 V, lOUT = -100 rnA
VIN - 5.0 V, 100T~ -200 rnA
VIN - 5.0 V, lOUT --350 rnA
VIN - 5.0V, lOUT - -100 rnA
VIN - 5.0V, lOUT - -200mA**
VIN - 2.4V
VII - 3.85 V
VIN - 5.0V
VIIt - 12 V
VIN = OV, Vs = 50V
VIN - OV, Vs - 80V
V,. = 2.4 V, VCE = 2.2 V
VII - 5.0 V, VCE - 2.2 V

UDS-2981/82H
UDS-2983/84H

Output Source
Current

lOUT

UDS-2981/83H
UDS-2982/84H

Supply Current
(Outputs Open)

Is

UDS-2981H
UDS-2982H
UDS-2983H
UDS-2984H

Clamp Diode
leakage Current

IR

UDS-2981/82H
UDS-2983/84H

VIN = 2.4\1*, Vs = 50V
VIN - 5.0 V*, Vs - 50 V
VIN = 2.4 V·,V = 80 V
VIN = 5.0 VO, Vs =- 80 V
Vs - 50 V (All Inputs VIN - 0.25 V)
Vs - 80 V (All Inputs VIIt - 0.25 V)

Clamp Diode
Forward Voltage

VF

All

IF

+25"C

*AII inputs simultaneously.
"Pulsed test.

5-40

= 200 rnA

Limit

z

2.o.V Max.
2.1 V Max.
2.0 V Max.
1.8 V Max.
UI v Max.

3
3
3
3

575/LA Max.
1.26 rnA Max.
640/LA Max.
1.8 rnA Max.

3

10/LA Max.
10/LA Max:

3
. 2
Z
4
4
4
4
5
5
6

-200 rnA Min.
..,..200 rnA Min

rnA Max.
rnA Max.
rnA Max.
rnA Max.
50/LA Max.
50/LA Max.
1.75 V Max.
10
10
10
10

SERIES UDS-2980H
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

TEST FIGURES

m. . ·G.

NO.A-ll,083

DWG. NO. A-II ,084

Figure 1

Figure 2

OPEN

OWG. NO. A-II,OB6

DWG. NO. A-Il,085

Figure 3

Figure 4

OPEN

OPEN

DWG. NO. A-ll,088

DWG. NO. A-ll,OS!

Figure 5

Figure 6

5---41

II

SERIES UDS-2980H
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

ALLOWABLE PEAK COLLECTOR CURRENT
AS A FUNCTION OF DUTY CYCLE
UDS-2981/82H

UDS-2981/82H

<3~~~--~~~rT~~"--~--~~~

~350~~~~~~~--~~--~--T-~~

E

z

~~~-+--~~~~r-~~~~--+--;~

~3OO~-+~~~~-r~+--;~~--+--;--~

!Z

is

a250

~ 250 V5 = 15V ~-I'~~:--"k-~OE:""""+-- ......,..t----1

a

TA

=

~

soOc

:52oor--+--4-~~~~~-1~~~+--1--~

~2oo~~--~--r-~~~~~~~~-1--~

13

t;

u

u

~
o

~150~-+--+-~r--+--~~~-P~~~~
o
~

It

150

~ 100 ~-+--~--I---+~"""'i\"!l~!~~~~

100

~ 50

~ 50r--+--~--r--+--4-~r--r--+--1--~
<

<

<

<

J~

~ OL-~--~~~~--=-~::--~~=--t~~
0

~ °0~~~~~~~~~-7.'-'7~0-'~~~~~loo
PER CENT DUTY CYCLE
DWG. NO. A-H,078

miG. NO. A-ll,076

ALL DEVICES

ALL DEVICES

<

~ 350~~~~"--~--~~--~--T-~--~

~350r--r--~~~~~~~--~--~~~~
z
-~r--r--~~~r-~--~~--r-~~

ffi

~250r--+--4-~~~~+-~~-r~~~--~
u

:5200

t;

~150r-~--4-~r--+~~~i~~~~~~~
o
u
~loo
Q.

~ 50 r--+--4-~r--+--+-~---r--+--t--~

~ O~~--=-~~-!::---;!;;----!::---:!;;-.=--t~~
0

<

PER CENT DUTY CYCLE

OWG. NO. A-ll,079

DWG. NO. A-ll.080

UDS-2983/84H

UDS-2983!84H

~z 350~~~~-r~rT--~~~-r--~~--~
ffi3oor--+~Hr~~-\~4-~~-+--+--1----1

'"a250~-+~~~:--"~~rr-~--~~+--;--~
~

~

13

2~--+--t---r~~~~~~~-+--~~

~

8 1~--+--;---r--~~~~~r-~~~~
'"
~

""~lOO~-+--~~I--~~~~~~~~~~--1

1

~

~

~

00

~

<

~

~

50

..:

90 100

PER CENT DUTY CYCLE

DWG. NO. A-ll,077

DWG, NO. A-11,OB!

5-42

SERIES UDS-2980H
HIGH-VOLTAGE, HIGH-CURRENT SOURCE DRIVERS

INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPE UDS-2981!83H

INPUT CURRENT AS A FUNCTION
OF INPUT VOLTAGE FOR TYPE UDS-2982/84H

1. 25

.5

/

1.00
UDS-2981183H

<
.§
zOo 75

/~V

as

a
'"

(~

0.50

V

z
UDS-2982I~H

/

I-

::>
Q..

,/

z

0.25

o
o

."

1.0

4.0
2.0
3.0
I NPUT VOLTAGE (VOLTS)

6.0

5.0

~~

~".""",
(0

RI

I

..........

NciRMAL

o

50

.........

SYSTEM LIMIT

I

~

- - """ ----....

.7SoCAv)

.......-. ,,

25

~

W

12

II

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

e

~

V V

4
6
8
I NPUT VOLTAGE (VOLTS)

DWG. NO. A-ll,D74

~/ENIJlMPERATURE (

~

75

DEViCE........

~.

100

TEMPERATURE IN

'

125

°c
DWG. NO. A-11.082

5-43

"150

SERIES UDS·3600H
DUAL 2·INPUT PERIPHERAL AND POWER DRIVERS

SERIES UDS-3600H DUAL 2-INPUT
PERIPHERAL AND POWER DRIVERS
- Hermetically Sealed

FEATURES
UDS·3611H

•
•
•
•
•
•

Four Logic Types
DTUTTL'PMOS/CMOS Compatible Inputs
Low Input Current
Sustaining Voltage of 80 V
Hermetically Sealed Package
High-Reliability Screening to MIL-STD-883, Class B

Description

These "mini-DIP" dual 2-input peripheral and power drivers are
bi-polar monolithic integrated circuits incorporating AND, NAND, OR,
or NOR logic gates, and high-current switching transistors on the same
chip. The two output transistors are capable of simultaneously sinking
250 rnA continuously at an ambient temperature of +75°C. In the OFF
state, these drivers will sustain at least 80 V.

UDS·3612H

Applications

The Series UDS-3600H dual drivers are ideally suited for interface
between low-level or high-level logic and high-current/high-voltage
loads. Typical applications" include driving peripheral loads such as
incandescent lamps, light-emitting diodes, memories, and heaters.
With appropriate external diode transient suppression, the Series
UDS-3600H drivers can also be used with inductive loads such as relays,
solenoids, and stepping motors.

DWG.NO,A-979&

UDS·3613H

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................................. 7.0 V
Input Voltage, Vin •. • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 30 V
Output Off-State Voltage, Voff ...................................... 80 V
Output On-State Sink Current, Ion ................................. 600 rnA
Power Dissipation, PD (one output) .......... '. . . . . . . . . . . . . . . . . . . . . . .. 1.0 W
(total package) ............................ See Graph
Ambient Temperature Range (operating), TA ................. -55°C to + 125°C
Storage Temperature Range, Ts .......................... -65°C to + 150°C

5-44

UDS·3614H

SERIES UDS-3600H
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

TEMPERATURE IN DC

DWG.IIO.o\-IO,978

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vcc)
Operating Temperature Range
Current into any output (ON state)

Min.

Nom.

Max.

Units

4.5

5.0
+25

5.5
+125
300

V
°C

-55

rnA

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol Temp.
"I" Input Voltage
Vinll)
"0" Input Voltage
VinlO)
"0" Input Current
linlO)
"I" Input Current
linll)
Input Clamp Voltage VI

Vcc
MIN
MIN
MAX
MAX
MIN

Test Conditions
Driven Other
Input
Input

0.4 V

30V

30V
-12mA

OV

limits
Output

Typ.

Min.
2.0

Max.
0.7
100
10
-1.5

50

Units

Notes

V
V
2

/LA
/LA
V

2

SWITCHING CHARACTERISTICS at Vee = 5.DV, TA = 25°C
Characteristic
Turn-on Delay Time

Symbol

Turn-off Delay Time

t,dl

tpdO

Vs =
CL =
Vs =
CL =

Test Conditions
70 V, RL = 465 n (10 Watts)
15 pF
70 V, RL = 465 n (10 Watts)
15 pF

-

limits
Typ.
200

Max.
500

Units
ns

Notes
3

-

300

750

ns

3

Min.

NOTES:
INPUT PULSE CHARACTERISTICS
I. Typical values are at Vee = 5.0V. TA = 25'C.
2. Each input tested separately.
VinlO) - OV
It - 7ns
tp - IJLs
3. Vottage values shown in the test circuit waveforms are with respect to networll ground terminal. Vin(l) = 3.5V
t, = 14/1S
PRR = 500kHz
4. Capacitance values specified include probe and test fixture capacitance.
.....;;""------'-----------"-

5--45

II

SERIES UDS-3600H
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDS-3611 H Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol
Characteristic
"1" 0utput Reverse Current loff
"0" Output Voltage

Von

"1" Level Supply Current
"0" Level Supply Current

Icc{l)
Icc(D)

Temp.

Vee
MIN
OPEN
MIN
MIN
MAX
MAX

NOM
NOM

limits

Test Conditions
Driven Other
Input Input
2.0V
2.0V
2.0 V 2.0V
0.8V Vcc
O.BV
Vcc
5.0 V 5.0V
OV
OV

Output
BOV
BOV
150 rnA
300 rnA

OUTPUT Vs

i--

sO%

10% •

SO%

I

'tadl
OUTPUT

I

--t
I

I

I

~

I

Notes

1,2
1, 2

---------V'n(l)

I

I

_ _":':':'::..."1 to-- Ip

I

Units
p..A
p..A
V
V
rnA
rnA

-..j I-- If

I,

' 90% 90%\'
/:
i

INPUT

I

Max.
100
100
0.5
O.B
12
49

0.4
0.6
8.0
35

-+I

:tR: --~

Typ.

Min.

10%

V'n(O)

I

r--r--....·!f-IpdO

jr-sO%---s-O%,c:::::
DWG.lto. A-7628C

Type UDS-3612H Dual NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Symbol

Characteristic

Temp.

Vcc
MIN
OPEN
MIN
MIN
MAX
MAX

"I" Output Reverse Current I'ft
"0" Output Voltage

Von

"I" Level Supply Current

Icc(l)
ICC(DI

"0" Level Supply Current

NOM
NOM

Test Conditions
Driven Other
Input Input
O.BV
Vcc
0.8V Vee
2.0V -2.0 V
2.0V
2.0 V
OV
OV
5.0V
5.0 V

limits
Output Min.
80V
80V
150 rnA
300 rnA

Typ.

0.4
0.6
12
40

Max.
100
100
0.5
O.B
15
53

Units
p..A
p..A
V
V
rnA
rnA

Notes

1, 2
1, 2

ooTINPUT 2.4V

Vcc'SV

PUT

Vs

INPUT
~il!.-.

I

_ _ _ _ V'n(O)

ISpF

(Nole3)
OUTPUT

':" LOAD
CIRCUIT
L ______

'--_-J.___ - -- -

.J

Vout(O)

DWG. NO. A-1900A

D!fG.llo. A-9638

NOTES:
1. Typical values are at Vcc = 5.0 V, TA = 25'C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.

5--46

SERIES UDS-3600H
DUAL 2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDS-3613H Dual OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
Symbol
"I" Output Reverse Current loff
"0" Output Voltage

Von

"I" Level Supply Current
"0" Level Supply Current

ICC{l)
IcclO)

INPUT

VCC=5V

Temp.

Vcc
MIN
OPEN
MIN
MIN
MAX
MAX

NOM
NOM
OUTPUT

Test Conditions
Driven Other
Input
Input
2.0 V OV
2.0 V OV
O.B V O.B V
O.B V O.B V
5.0 V 5.0 V
OV
OV

limits
Output
BO V
BO V
150 mA
300 mA

Min.

Typ.

0.4
0.6
B.O
36

Max.
lao
lOa
0.5
O.B
13
50

Units

Notes

iJ- A
iJ- A

V
V
mA
mA

I, 2

l.2

Vs

----,
Rl

INPUT

:

10%

]F'O'l:.::Yo'--_ _ _

I
I

I

I

:

I

Ipd 1

I

I

lSpF

I

I
-I 'pdO
I~_ _ _- - , : _ _ .... -V ou t(1)

-,.-------+I
I

: INO"3) :
I ':'

Yin(O)

I

OUTPUT

LOAD:

/50%

50%

.

I
CIRCUIT I
L
_____
...J

L

II

Vou,(O)

DWl>. 110. A-7628C

Type UDS-3614H Dual NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic
Symbol
"I" Output Reverse Current loff
"0" Output Voltage

Von

"I" Level Supply Current
"0" Level Supply Current

Iccll)
Icc{o)

INPUT

VCC=5Y

Temp.

Vcc
MIN
OPEN
MIN
MIN
MAX
MAX

NOM
NOM
OUTPUT

Test Conditions
Driven Other
Input
Input
O.B V O.B V
O.B V O.B V
2.0 V OV
2.0 V OV
OV
OV
5.0 V 5.0 V

.

limits
Output
BO V
BOV
150 mA
300 mA

Min.

Typ.

0.4
0.6
12
40

Max.
100
lOa
0.5
O.B
15
50

Units
iJ- A

V
V
mA
mA

Vs

r ----,

INPUT

Rl
I

I

I

I

I

:1

'5PF
(Note 3)

:
I

'pdO

:I

OUTPUT

-=

50%

'--_.....J._ - - - - - -

I.DAD :
CIRCUIT I

I
L
____ ...J

Vout(O)

DWG. ~O. ~-1900A

NOTES:
1. Typical values are at Vcc = 5.0 V, TA = 25°C.
2. Per package.
3. Capacitance values specified include probe and test fixture capacitance.

5-47

Notes

iJ- A

1, 2
1, 2

UCS·4401 HAND· UCS·4801 H
HERMETIC BiMOS LATCHED DRIVERS

UCS-4401 HAND UCS-4801 H
BiMOS LATCHED DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•

OUTPUT

ENABLE

High-Voltage, High-Current Outputs
Output Tra nsient Protection
CMOS, PMOS, NMOS, TIl Compatible
Internal Pull-Down Resistors
low-Power CMOS latches

OUT,

HIGH-VOLTAGE, HIGH-CURRENT interface
for military, aerospace and related applications
is supplied by these latched drivers. Type UCS4401H contains four pairs of latches and drivers;
Type UCS-480lH has eight pairs of latches and
drivers.
The integrated circuits' CMOS inputs work with
standard CMOS, PMOS and NMOS logic levels and
(with appropriate pull-up resistors) with TTL or DTL
circuits. The bipolar open-collector outputs can be
used with relays, solenoids, motors, LED or incandescent displays, and other high-power loads.
The output transistors can sink 500 mA and will
withstand a VCE of 50 V in the OFF state. Outputs
can be paralleled for higher current capability. Because of limitations on package power dissipation,
simultaneous operation of all drivers at maximum
rated current can only be accomplished with a reduction of duty cycle.

DWG.NO. A-1O.499A

UCS-4401H

OUTPUT

ENABLE

OUT,
OUT,
OUT,
OUT,

Type UCS-4401H, the four-latch device, is furnished in a standard 14-pin side-brazed hermetic
package. Type UCS-4801H, the eight-latch device,
is furnished in a 22-pin side-brazed hermetic package with row centers O.4DO-inch (10.16 mm) apart.
Both devices meet all processing and environmental requirements of Military Standard MIL-STD883, Methods 5004 and 5005.

OUT,
OUT,

DWG.NO. A-IO,498A

UCS-4801H

5-48

UCS-4401H AND UCS-4801H
HERMETIC BiMOS LATCHED DRIVERS

ABSOLUTE MAXIMUM RATINGS
Output Voltage, VCE ............................................... 50 V
Supply Voltage, Voo ............................................... 18 V
Input Voltage Range, V,N ••••••••.••.•••••••••••••••••• -0.3 V to Voo +0.3 V
Continuous Collector Current, Ic ................................... 500 mA
Package Power Dissipation, Po ................................... See Graph
Operating Ambient Temperature Range, TA ................... - 55°C to + 125°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
CAUTION: Sprague CMOS devices have input static protection but are still
susceptible to damage when exposed to extremely high static electrical charges.

o

FUNCTIONAL BLOCK DIAGRAM

GROUND

OUTPUT
ENABLE

J..

COMMON MOS
CONTROL

TYPICAL MOS LATCH

TYPICAL BIPOLAR DRIVER
DWG.NO. A-IO,49SA

5-49

UCS~4401H AND UCS-4801H
HERMETIC BiMOS LATCHED DRIVERS

ALLOWABLE AVERAGE
PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

""'-

""'-

~

~~'";o~..
SYSTEM LIMIT

T4
C,WJ

I

r--

)

25

50

75
TEMPERATURE IN

01'09. No. A-IO,9BI

ELECTRICAL CHARACTERISTICS at TA
(unless otherwise noted)
Characteristic
Output OFF Voltage
Output ON Voltage
Output Pull-Down Current
Output Leakage Current
Input Volta ge

Input Current
Input Impedance
Serial Data Output Resistance
Supply Current

Symbol
VOirr
louT

= +25°C, Vaa =

"-- ~,

100

°c

125

60 V, Voo = 4.15 V to 15.15 V, Vss

Test Conditions

V,N1O)
I'NIl)

Min.

loUT = -25 mA
VOUT = Vgg

57.5
400

Voo =5.0V
Voo - 15 V

3.5
13.5
-0.3

liN

RoUT
188
100

Voo - Y'N - 5.0V
Voo = Y'N = 15 V
Voo = 5.0 V
Voo =5.0V
Voo = 15 V
All outputs ON, Outputs open
All outputs OFF, Outputs open
Voo = 5.0 V, All outputs OFF, All inputs = 0 V
Voo = 15 V, All outputs OFF, All inputs = 0 V
Voo = 5.0 V, One output ON, All inputs = 0 V
Voo == 15 V, One output ON, All inputs = 0 V

Limits
Max.
1.0

850
-15

-

-

+0.8
100
300

50

-

-

20
6.0
13
100
100
200
1.0
3.0

-

-

II

= 0V

V'NllJ

150
Dwg. r-4o. A-ll.622

Units
V
V
JA-A
JA-A
V
V
V
JA-A
JA-A
kfi
kfi
kfi
rnA
JA-A
JA-A
JA-A
mA
mA

NOTES: Positive (negative) current is defined as going into (coming out of) the specified device pin.
Operation of this device with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure an input-logic high.

5-55

UCS-4810H HERMETIC BiMOS
lO-BIT, SERIAL~INPUT, LATCHED DRIVER

ELECTRICAL CHARACTERISTICS at TA = -55°C. Vaa = 60 V. VDD = 4.75 Vto 15.75 V. Vss = 0 V
(unless otherwise noted)
Characteristic
Output OFF Voltage
Output ON Voltage
Output Pull-Down Current
Output leakage Current
Input Voltage

Input Current
Input Impedance
Serial Data Output Resistance
Supply Current

Symbol

Test Conditions

VOUT
lOUT

lOUT = -25 rnA
VOUT = VBB

Min.

Limits
Max.

-

1.0

57
300

VIN (1)
VIN(O)
IIN(1)
liN

ROUT
IBB
100

Voo
Voo

= 5.0 V
= 15 V

3.6
14
-0.3

Voo = VIN = 5.0 V
Voo = VIN - 15 V
Voo - 5.0 V
Voo = 5.0 V
Voo = 15 V
All outputs ON, Outputs open
All outputs OFF, Outputs open
Voo = 5.0 V, All outputs OFF, All inputs = 0 V
Voo = 15 V, All outputs OFF, All inputs = 0 V
Voo = 5.0 V, One output ON, All inputs = 0 V
Voo = 15V, One output ON, All inputs = 0 V

ELECTRICAL CHARACTERistiCS at TA = + 125°C. Vaa
(unless otherwise noted)

=

60 V. VDD

=

-

35
-

-

-

850
-15

Units
V
V
/-LA

/-LA

-

V
V
V

+0.8
145
430
20
6.0
13
100
100
200
1.0
3.0

/-LA
/-LA
kG
kG
kG
rnA
/-LA
/-LA

/-LA
rnA
mA

4.75 Vto 15.75 V. Vss = 0 V

- -

Characteristic
Output OFF Voltage
Output ON Voltage
Output Pull-Down Current
Output leakage Current
Input Voltage

Symbol

Test Conditions

Min.

loUT = -25 rnA
VOUT - VBB

57
400

VOUT
lOUT

-

VIN (1)

Input Current

VINIO)
IIN(1)

Input Impedance
Serial Data Output Resistance

lIN
ROUT

Supply Current

IBB
100

Voo
Voo

= 5.0 V
= 15 V

3.5
13.5
-0.3

Voo - VIN - 5.0 V
Voo = VIN = 15 V
Voo = 5.0 V
Voo - 5.0 V
Voo = 15 V
All outputs ON, Outputs open
All outputs OFF, Outputs open
Voo = 5.0V, All outputs OFF, All inputs = 0 V
Voo = 15 V, All outputS OFF, All inputs = 0 V
Voo = 5.0 V, One output ON, All inputs = 0 V
Voo '= 15 V, One output ON, All inputs = 0 V

-

Limits
Max.

1.0
1400
-30

+0.8
100
300

50

-

27
8.0
15
100
100
200
1.5
4.5

-

-

/-LA
/-LA

-

-

Units
V
V

V
V
V

/-LA
/-LA
kG
kG
kG
rnA
/-LA

/-LA
/-LA
rnA
rnA

NOTES: Positive (negative) current is defined as going into (coming out of) the specified device pin.
Operation of this device with standard TTL or DTl may require the use of appropriate pull-up resistors to ensure an input-logic high.

5-56

UCS-4810H HERMETIC BiMOS
10-BIT, SERIAL-INPUT, LATCHED DRIVER

no"

th

,-~~--------------

DATA IN ~~ ~-D-T--E-I---~-------------

1

STROBE

BLANKING

1...._ _ _ __

-------,1----------'
FF-l

OUT N _ _ _ _ _ _ _ _ _ _.......r-I------,'---_~r__
Dwg. No. A-ID,990

TIMING CONDITIONS
TA = +25°C; Logic Levels are VDD and Vss
VDD
A.
B.
C.
D.

Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) . . . . . . . . . . . . . . . . . . . . . . . . ..
Minimum Data Pulse Width ......................................................
Minimum Clock Pulse Width ......................................................
Minimum Time Between Clock Activation and Strobe ............................... :....
E. Minimum Strobe Pulse Width .....................................................
F. Typical Time Between Strobe Activation and Output Transition .............................

SERIAL DATA present at the input is transferred
to the shift register on the logic "0" to logic "1"
transition of the CLOCK input pulse. On succeeding
CLOCK pulses, the registers shift data information
towards the SERIAL DATA OUTPUT. TheSERIAL DATA must appear at the input prior to the
rising edge of the CLOCK input waveform.

= 5.0 V VDD = 15 V

250 ns
500ns
1.0 p.s
1.0 p.s
500 ns
1.0 p.s

150 ns
300 ns
250 ns
400 ns
300 ns
1.0 p.s

tinue to accept new data as long as the STROBE is
held high. Applications where the latches are bypassed (STROBE tied high) will require that the
BLANKING input be high during serial data entry.
When the BLANKING input is high, all of the
output buffers are disabled (OFF) without affecting
the information stored in the latches or shift register.
With the BLANKING input low, the outputs are
controlled by the state of the latches.

Information present at any register is transferred to
its respective latch when the STROBE is high
(serial-to-parallel conversion). The latches will con-

UCS-4810H TRUTH TABLES
Serial
Data
Input
H
L
X

L
H
X
P
R

Shift Register Contents
Clock
Input

.r

..r

"'L

11 12 13 ..... la 19 110
H Rl R2 ... R) Ra R
L Rl R2 ... R) Ra Rg
Rl R2 R3 .. Ra R9 RIO
XXX ...... XXX
1'1 1'2 1'3 .. I'a 1'9 1'10

Serial
Data
Output
R9
R,
RIO
X
1'10

Latch Contents
Strobe
Input

L
H

,112 ,3 ..... laI9110

Rl R2 R3· . Ra R9 RIO
1'11'21'3 .. PaP9 1'10
XXX ....•. XXX

L
H

= Low logiC Level
= High logic Level
=

Irrelevant

= Present State
=

Output Contents
Blanking
Input

Previous State

5-57

11

h_ '3 .....

'8Igh~

PI P2P3 .. Pa P9 PIO
LLL ....... LLL

D

UCS-4815H
HERMETIC BiMOS LATCH/SOURCE DRIVER

UCS·4815H
liMOS LATCH/SOURCE DRIVER
- Hermetically Sealed

FEATURES
•
•
•
•
•
•
•

L'-r----,

r------L.!:!.I BLANK I NG

High-Voltage Source Outputs
CMOS, PMOS, NMOS, TTL Compatible Inputs
Low-Power CMOS Latches
Internal Pull-Down Resistors
Wide Supply-Voltage Range
High-Reliability Screening to MIL-STD-883, Class B
Operating Temperature -55°C to + 125°C

VDD

primarily for use with high-voltage
D ESIGNED
vacuum-fluorescent displays, the Type UCS4815H BiMOS integrated circuit has eight NPN Darlington source drivers with pull-down resistors, a
CMOS latch for each driver, and common strobe,
blanking, and enable functions.

Dwg. No. A-1O.987

sembled by using a Type UCS-4815H BiMOS
latch Isource driver with a Type UCS-481OH serialto-parallel latch Idriver.
Type UCSA815H is furnished in 22-pin hermetic
dual-in-line packages, and is processed to the requirements of MIL-STD-883, Methods 5004 and
5005. To simplify printed wiring board layout, output pins on the package are opposite respective input
pins.
The same circuit is also available, with increased
allowable package power dissipation, in plastic or
glass Iceramic (cer-DIP) hermetic packages for operation over the extended temperature range of
-40°C to +85°C (Type UCQ-4815A or UCQ4815R, respectively). Devices for use over a
commercial/industrial temperature range are designated Type UCN-4815A or UCN-4815R, respectively.

The CMOS inputs cause minimum loading and are
compatible with standard CMOS, PMOS, and
NMOS logic commonly found in microprocessor
designs. The use of CMOS latches also allows operation over a supply-voltage range of 5 V to 15 V.
When employed with either standard TTL or lowspeed TTL, Type UCS-4815H may require the use of
appropriate pull-up resistors.
The bipolar outputs may be used as segment, dot
(matrix), bar, or digit drivers in vacuum-fluorescent
displays. Under normal operating conditions, these
devices will sustain 25 rnA per output at 50°C and a
duty cycle of 89%. Other combinations of numbers
of conducting outputs and duty cycle are shown in
the specifications in this bulletin.
A minimum component display subsystem, requiring few or no discrete components, may be as-

5-58

UCS-481SH
HERMETIC BiMOS LATCH/SOURCE DRIVER

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
and Vss = 0 V
Output Voltage, VOUT .............................................. 60 V
Logic Supply Voltage Range, Voo ............................... 4.5 V to 18 V
Driver Supply Voltage Range, VBB ••••••••••••••••••••••••••••••• 5.0 V to 60 V
Input Voltage Range, VIN •••••••••••••••••••••••••••••• -0.3 V to Voo +0.3 V
Continuous Output Current, loUT .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -40 rnA
Package Power Dissipation, Po . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1.6 W"
Operating Temperature Range, TA .......................... -55°C to + 125°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
"Derate at 15.4 mwrc above +25°C.

Number of
Outputs ON
(lour = -25 rnA)

Maximum Allowable Duty Cycle
at Voo = 5 V and TA of:

8
7
6
5
4

100%

89%
98%
100%

56%
57%
66%
80%
100%

Caution: Sprague CMOS devices have input-static protection but are
susceptible to damage when exposed to extremely high static electrical
charges.
.

ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATUR~

""

" ~~
'f"~

4?pl'-?

~ ~
E. Typical Time Between Strobe Activation and Output Off to On Transition ................................... 1.0 /J.S
F. Minimum Data Pulse Width .................................................................... 500 ns

Infonnation present at an input is transferred to its
latch when the STROBE and ENABLE are high. The
latches will continue to accept new data as long as
both STROBE and ENABLE are held high. With
either STROBE or ENABLE in the low state, no
information can be loaded into the latches.
When the BLANKING input is high, all of the
output buffers are disabled (OFF) without affecting
the infonnation stored in the latches. With the

BLANKING input low, the outputs are controlled by
the state of the latches.
On first applying Vnn to the device, all latch outputs assume a low state (Power-Up Clear) resulting
in all outputs being OFF. The latches will remain in
the low condition until the Clear is disabled by a
STROBE high input. Data may be entered into the
latches during Power-Up Clear disable if the ENABLE input is also high.

UCS-4815H TRUTH TABLE
In~uts

OUTN

INN

STROBE

ENABLE

BLANK

T-l

T

0
1
X
X
X
X
X

1
1
X
0
0
X
X

1
1
X
X
X
0
0

0
0
1
0
0
0
0

X
X
X
1
0
1
0

0
1
0
1
0
1
0

X= irrelevant
T-l = previous output state.
T = present output state

5-62

SERIES UCS-4820H HERMETIC BiMOS
8-BIT, SERIAL-INPUT, LATCHED DRIVERS

SERIES UCS-4820H
BiMOS 8-BIT, SERIAL-INPUT, LATCHED DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•
•

OUT,

High-Voltage Current-Sink Outputs
CMOS, PMOS, NMOS, TIl Compatible
low-Power CMOS logic and latches
Internal Pu II-Up/Pull-Down Resistors
Hermetically Sealed Packages to Mll-M-38510
High-Reliability Screening to Mll-STD-883, Class B

INTENDED FOR MIUTARY, aerospace, and related applications, Series UCS-4820H 8-bit,
serial-input, latched drivers combine bipolar Darlington drivers with MOS logic circuitry (BiMOS) to
provide an interface flexibility beyond the reach of
standard logic buffers and power driver arrays. Except far the maximum allowable driver outputvoltage ratings, Types UCS-4821H (50 V), UCS4822H (80 V), and UCS-4823H (100 V) are identical.
Each driver contains a CMOS shift register and
associated latches designed for operation over a 5 V
to 15 V supply-voltage range. High-impedance inputs cause minimal loading of data lines and are
compatible with standard CMOS, PMOS, and
NMOS logic. When used with standard TTL or
Schottky TTL, appropriate pull-up resistors may be
required to ensure an input-logic high. The CMOS
serial-data output allows cascading these devices for
interface applications requiring additional drive
lines.
The eight high-current bipolar outputs can drive
multiplexed LED displays, incandescent lamps,
thermal print heads, and (with appropriate clamping
techniques) relays, solenoids and other high-power
inductive loads. Under normal operating conditions,

SERIAL DATA IN

2

SERIAL DATA OUT

5

OUTPUT ENABLE

7

OUT,

DWG.NO. A-ll.388A

and without heat sinking, these devices can sustain
200 rnA per output at 50°C at a 42% duty cycle.
Other combinations of number of conducting outputs, temperature, and duty cycle are shown on the
following page.
Series UCS-4820H is furnished in 16-pin sidebrazed dual in-line hermetic packages that meet the
processing and environmental requirements of Military Standard MIL-STD-883, Methods 5004 and
5005.
These same circuits are also available, with increased allowable package power dissipation, in
glass /ceramic (cer-DIP) hermetic packages or plastic packages for operation over the extended temperature range of -40°C to +85°C (Series UCQ-4820R
or UCQ-4820A, respectively). Devices for use over a
commercial/industrial temperature range are designated Series UCN-4820R or UCN-4820A, respectively.

5-63

D

SERIES UCS-4820H HERMETIC BiMOS
8-BIT, SERIAL-INPUT, LATCHED DRIVERS

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
and Vss =0 V
Output Voltage, VOIlT (UCS-4821H) .................................... 50 V
(UCS-4822H) .................................... 80 V
(UCS-4823H) ................................... 100 V
Logic Supply Voltage, Voo .......................................... 18 V
Input Voltage Range, VIN .............................. -0.3 V to Voo +0.3 V
Continuous Output Current, IOIlT .................................... 500 rnA
Package Power Dissipation, Po .................................. See Graph
Operating Temperature Range, TA .......................... -55°C to +125"C
Storage Temperature Range, Ts ........................... -65°C to +150°C

Number of
Outputs ON
(lOIlT =200 rnA)
8
7
6
5
4
3
2
1

Maximum Allowable Duty Cycle
at Voo = 5 V and TA of:
+25°C
+50OC
+85"C
50%
63%
74%
88%
100%

42%
48%
56%
67%
84%
100%

18%
21%
25%
300/0
37%
50%
75%
100%

Caution: Sprague CMOS devices have input-static protection but are
susceptible to damage when exposed to extremely high static electrical
charges.
FUNCTIONAL BLOCK DIAGRAM

CLOCK

I

SERIAL
DATA IN

SERIAL
DATA OUT

7

OUTPUT ENABLE

MOS
BIPOLAR

------------

® GROUND
Dwg. No. A-ll ,3918

5-64

SERIES UCS-4820H HERMETIC BiMOS
8-BIT, SERIAL-INPUT, LATCHED DRIVERS
TYPICAL INPUT CIRCUITS
ALLOWABLE AVERAGE PACKAGE POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

Voo

STROBE
OUTPUT ENABLE

4

CLOCK
SERIAL DATA
IN

,

00K

MOS
6

7

,I'-..
..........
MOS

4

~>~"

~-I'-f

~

~ 1(9

'OOK

~

C'1f,

3

~~

2

NORMA<~

TYPICAL OUTPUT DRIVER

SYSTEM LIMIT

,r--

I

l

AT'ENT TEMPER

o

=~
ATURi le)A

.gOi eM) TI"--

so

I

15

"" ~

~,

125

100

150

TEMPERATURE IN °C
DWG.MO. A-ll.677

GROUND
Dwg. No. A-ll.390

ELECTRICAL CHARACTERISTICS at TA

= + 25°C, Voo = 5V, Vss = 0V(unless otherwise specified)

Applicable
Devices
UCS-4821H
UCS-4822H
UCS-4823H
ALL

Characteristic
Output Leakage
Current

Symbol

Collector-Emitter
Saturation Voltage

VCElSAn

Input Voltage

V,NIO)
V,NIl)

ALL
ALL

R'N

ALL

Input Resistance

Supply Current

1GEl(

IOOION)

IOOIOFF)

ALL

ALL

Test Conditions
VOUT = 50 V
VouT =80V
VOUT = 100 V
louT = 100 rnA
louT = 200 rnA
louT = 350 rnA, Voo = 7.0 V

Min,
-

-

-

Voo = 15 V
Voo = lOV
Voo = 5.0 V(See note)
Voo=15V
Voo = 10V
Voo = 5.0V
One driver ON, Voo = 15 V
One driver ON, Vo~ = 10 V
One driver ON, Vo~ = 5.0 V
Vo~ = 5.0 V, All drivers OFF, All inputs = 0 V
Vo~ = 15 V, All drivers OFF, All inputs = 0 V

13.5
8.5
3.5
50
50
50
-

-

Limits
Max,
50
50
50
1.1
1.3
1.6
0.8

-

2.0

1.7
1.0
100
200

Units
,...A
,.,.,A
,.,..A
V
V
V
V
V
V
V
kfl
kfl
kfl
rnA
rnA
rnA
,.,..A
,...A

Note: Operation of these devices with standard TIL or DTL may require the use of appropriate pull-up resistors to ensure an input-logic high.
5-65

II

SERIES UCS-4820H HERMETIC BiMOS
8-BIT, SERIAL-INPUT, LATCHED DRIVERS

ELECTRICAL CHARACTERISTICS at TA = - 55°C, Voo = 5V, Vss
Applicable
Devices
UCS-4821H
UCS-4822H
UCS-4823H
All

Characteristic
Output leakage
Current

Symbol
IcEX

Collector-Emitter
Saturation Voltage

VCEISATI

Input Voltage

VINIO)
VIN (1)

All
All

Input Resistance

RIN

All

Supply Current

10010N)

All

All

10010FF)

ELECTRICAL CHARACTERISTICS at TA

Applicable
Devices
UCS-4821H
UCS-4822H
UCS-4823H
All

Symbol
IcEX

Collector-Emitter
Saturation Voltage

VCEISATI

Input Voltage

VINIO)
VINIll

All
All

RIN

All

Supply Current

10010N)

10010FF)

Test Conditions

Min..

Limits
Max.
50
50
50

VOUT = 50 V
VOIIT = 80V
VOUT = 100 V
loUT = 100 rnA
lOUT = 200 rnA
loUT = 350 rnA, Voo = 7.0 V

-

Voo=15V
Voo = 10 V
Voo = 5.0 V(See note)
Voo = 15 V
Voo = 10 V
Voo = 5.0V
One driver ON, Voo = 15 V
One driver ON, Voo = 10 V
One driver ON, Voo = 5.0 V
Voo = 5.0 V, All drivers OFF, All inputs = 0 V
Voo = 5.0 V, All drivers OFF, All inputs = 0V

14
9.0
3.6
35
35
35

-

-

2.5
1.9
1.2
100
200

1.3
1.5
1.8
0.8

-

Units
!LA
!LV
!LV
V
V
V
V
V
V
V
kG
kG
kG
rnA
rnA
rnA
!LA

!LA

= + 125°C, Vou = 5V, Vss = 0 V(unless otherwise specified)

Characteristic
Output leakage
Current

Input Resistance

= 0 V(unless otherwise specified)

All

All

Test Conditions

Min.

Limits
Max.
500
500
500

VOUT = 50V
VOUT = 80V
VOUT = 100 V
loUT = 100 rnA *
lOUT = 200 mA*
loUT = 350 mA*, Voo = 7.0 V

-

Voo = 15 V
Voo = 10 V
Voo = 5.0 V (See note)
Voo = 15V
Voo = 10 V
Voo = 5.0V
One driver ON, Voo = 15 V
One driver ON, Voo = 10 V
One driver ON, Voo = 5.0 V
Voo = 5.0 V, All drivers OFF, All inputs = 0 V
Voo = 5.0 V, All drivers OFF, All inputs = 0 V

13.5
8.5
3.5
50
50
50

-

-

2.0

-

1.7

-

1.0
100
200

-

1.3
1.5
1.8
0.8
-

-

Units

!LA
!LV
!LV
V
V
V
V
V
V
V
kG
kG
kG
rnA
rnA
rnA

!LA
!LA

Note: Operation of these devices with standard TTL or DTl may require the use of appropriate pull-up resistors to ensure an input-logic high.
*Pulsed test.
5-66

SERIES UCS-4820H HERMETIC BiMOS
8-BIT, SERIAL-INPUT, LATCHED DRIVERS

Dwg. No. A-IO,990A

TIMING CONDITIONS
TA = +25"C; Logic Levels are Voo and Vss

Voo
A.
B.
C.
D.

Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Minimum Data Pulse Width ...........................................................
Minimum Clock Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Minimum Time Between Clock Activation and Strobe .........................................
E. Minimum Strobe Pulse Width ..........................................................
F. Typical Time Between Strobe Activation and Output Transition ..................................

=

5.0 V Voo

250 ns
500 ns
1.0 ILs
1.0 ILS
500 ns
1.0 ILS

=

150 ns
300 ns
250 ns
400 ns
300 ns
1.0 ILS

tinue to accept new data as long as the STROBE is
held high. Applications where the latches are bypassed (STROBE tied high) will require that the
ENABLE input be high during serial entry.

SERIAL DATA present at the input is transferred
to the shift register on the logic "0" to logic "1"
transition of the CLOCK input pulse. On succeeding
CLOCK pulses, the registers shift data information
towards· the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the
rising edge of the CLOCK input waveform.
Information present at any register is transferred to
its respective latch when the STROBE is high
(serial-to-parallel conversion). The latches will con-

When the ENABLE input is high, all of the output
buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With
the ENABLE input low, the outputs are controlled
by the state of the latches.

SERIES UCS-4820H TRUTH TABLE
Serial
Data
Input
L
H

X

.I

I
""L

Serial
Data Strobe
Ijl2 13 .......... Is Output Input
H Rj R2 ........ R7
R7
L Rj R2 ........ R7
R7
Rj R2 R3 ........ Rs
Rs
XXX .......... X
X
L
Pj P2 P3 ........ Ps
Ps
H

Output Contents

Latch Contents

Shift Register Contents
Clock
Input

15 V

Ijl2 13 .......... Is

Rj R2 R3 ........ Rs
Pj P2P3 ........ Ps

XXX .; ........ X
l = low logic level
H = High logic level
X = Irrelevant
P = Present State
R = Previous State

5-67

Output
Enable

Ijl2 13 .......... Is

L
H

Pj P2 P3 ........ Ps
H H H .......... H

SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•
•

Four Logic Types
DTLITTUPMOS/CMOS Compatible Inputs
Low Input Current
Sustaining Voltage of 80 V
Hermetically Sealed Package to MIL·M·38510
High·Reliability Screening to MIL·STD-883, Class B

Description

These 16-Lead quad 2-input peripheral and power drivers are bi-polar
monolithic integrated circuits incorporating AND, NAND, OR, and NOR
logic gates, high-current switching transistors, and transient suppression
diodes on the same chip. The four output transistors are capable of
simultaneously sinking ISO mA continuously at an ambient temperature of
+ 70°C. In the OFF state, these drivers will sustain at least 80 V.
Applications

The Series UDS-S700H quad drivers are ideally suited for interface between
iow~level or high-level logic and high-current/high-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, and heaters.
The integral transient suppression diodes allow their use with inductive
loads such as relays, solenoids, or stepping motors without the need for
discrete diodes. For non-inductive loads, the diode common bus can be
used as a convenient lamp test.

ABSOLUTE MAXIMUM UTINGS
Supply Voltage, Vee............ , . '.................................. 7.0 V
Input Voltage, Vin................................................. 30 V
Output Off.State Voltage, Voll................. ; ....................... 80 V
Output On~State Sink Current, Ion........................•........... 600 mA
Suppression Diode Off·State Voltage, Voll................................. 80 V
Suppression Diode On·State Current, Ion...•.........•................. 600 mA
Power Dissipation, PO.......................................•..... 1.0 W
Package Power Dissipation, PD' ..... ; ............................• See Graph
AmbientTemperature Range (operating), TA...................... -55°Cto +12S4C
Storage Temperature Range, TS...........................•.. -65°C to +I500 C

5-68

SERIES UDS-S700H
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

,

~

r.
C'

""<0 0

~

I I"' ........
NORMAL

~MPERAlURE
50

25

SYSTEM LIMIT

I

I

I~

75
TEMPERATURE IN

"

DEViCE .....,

~

100

°c

LIMIT
"",
--e--.....
125

D'IIG. HO.

150
A~ 10, 19aA

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (VCe)
Operating Temperature Range
Current into any output (ON state)

Min.

Nom.

Max.

Units

4.5
-55

5.0
+25

5.5
+125
300

V

°c

rnA

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic
"I" Input Voltage

Symbol

Temp.

Vee
MIN
MIN
MAX
MAX
MIN

V;n111
V;nIOI

"0" I nput Voltage
"0" Input Current
hnlOI
"I" Input Current
"nil I
I nput Clamp Voltage VI

SWITCHING CHARACTERISTICS at Vee

Test Conditions
Driven
Other
Input
Input

Limits
Output

Min.

Typ.

Max.

2.0
0.4 V
30 V
-12mA

30 V
OV

-50

0.7
-100
10
-1.5

Units

Notes

V
V
I'A
I'A
V

2
2

= 5.0V, TA = 25°C
Limits

Characteristic

Test Conditions

Symbol

Turn·on Delay Time

tpdo

Turn·off Delay Time

tpdl

Vs =
CL =
Vs =
CL =

Min.

70 V. RL = 465!1 (10 Watts)
15 pF
70 V, RL = 46511 (10 Watts)
15 pF

NOTES:
1. Typical values are at Vee = 5.0V, TA = 25°C.
2. Each input tested separately.
3, Voltage values shown in the test circuit waveforms are with, respect to network ground terminal.
4, Capacitance values specified include probe and test fixture capaCitance,

5-69

Typ.

Max.

Units

Notes

200

500

ns

3

300

750

ns

3

INPUT PULSE CHARACTERISTICS
V'nIO) = OV
Vlnll! = 3.5V

tf = 7ns
t, = 14ns

t p - II'S
PRR = 500kHz

L.;.::;::';':"'--=-~_ _--"":_ _ _ _ _ _ _ _ _.J

SERIES UDS·5700H
QUAD 2·INPUT PERIPHERAL AND POWER DRIVERS

Type UDS·5703H Quad OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"I" Output Reverse Current

1.11

"0" Output Voltage

V••

Diode Leakage Cu rrent
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

VD
leell)
leelo)

ILK

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

INPUT

2.0V
2.0V
O.SV
O.S V
OV

OV
OV
O.S V
0.8 V
OV

Vee
5.0 V
OV

Vee
5.0 V
OV

Vee

=:

5V

Limits
Output

Min.

SOV
SOV
150 mA
300 mA
OPEN

Typ.

Max.

Units
p.A

0.4
0.6

100
100
0.5
0.8

1.5
16

72

OPEN. OUTPUT

Vs

1---

-:---,

I

Rl

.,.6----"-+'- i

:
I
I
I

,
. lSpF

I

]NoteS)1
... LOAD I

UI~C~I!..J
DWG.NO. ,l..9123A

NOTES:
1. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR = Volllm;.~
4. Diode forward voltage drop measured at I, = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.

5-70

200
1.75
25
100

/loA
V
V
/loA
V
mA
mA

Notes

3
4
1,2
1,2

SERIES UDS·S700H
QUAD 2·INPUT PERIPHERAL AND POWER DRIVERS

Type UDS·5706H Quad AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic
"I" Output Reverse Current

Symbol

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

10 "

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
Vo
!celli
lee(ol

2.0V
2.0 V
O.S V
O.S V
OV
Vee
5.0 V
OV

Limits
Output

2.0V
2.0V

Min.

SOV
SOV
150 mA
300 mA
OPEN

Vee
Vee
OV

0.4
0.6
1.5
16
70

Vee
5.0V
OV

EN

Typ.

au;:

Vs

r ----,
'l

,
I
I
I

I

15pF

i INoI.5)
: -:"

LOAD

IL _____
CIRCUIT
DWG. ~O.

JI

0\-7878A

NOTES:
1. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at V. = Vofl(m;.I.
4. Diode forward voltage drop measured at " = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.

5-71

Max.

Units

100
100
0.5
0.8
200
1.75
24
9S

JIoA
/loA
V
V
JIoA
V
mA
mA

Notes

3

4
1,2
1,2

SERIES

UDS~5700H

QUAD2~INPUTPER1PHERAL. AN.D

POWER DRIVERS

Type UDS·5707H Quad NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
9haracteristic

Symbol

"1" Output Reverse Current

loll

"0" Output Voltage '

Von

Diode leakage Current
Diode Forward Voltage Drop
"1" level Supply Current
"0" level Supply Current

ILK
VD
leell)
!eelo)

TemP. ,

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

0.8V
0.8V
2.0 V
2.0V
Vee
OV
OV
5.0 V

Vee
Vee
2.0 V
2.0V
Vee
OV
OV
5.0 V

limits
Output

Min.

80V
80V
150 rnA
300 rnA
OPEN

Typ.

0.4
0.6
1.5
24
80

,
I

I
I

I

!

lSpF

I(NOIoS)

: ';

LOAD

I _____
CIRCUIT J
'DWIi. NO. A-7899A

INPUT

OUTPUT
'---~- - - - - - -

vout(O)

DWG. 110. A-1900A

NOTES:
1. Typical values are at Vee = 5.0 V. T" = 25°C.·
2. Per package.
3. Diode leakage current measured·at VR = V.Hlm;.).
4. Diode forward voltage drop measured at " = 300 rnA.
5: Capacitance values specified include probe and test fixture capacitance.

5-72

Max.

Units

100
100
0.5
0.8
200
1.75
30

v.A
/loA
V
V
/loA
V
rnA
rnA

106

Notes

3

4
1,2
1,2

SERIES UDS-5700H
QUAD 2-INPUT PERIPHERAL AND POWER DRIVERS

Type UDS·5733H Quad NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"I" Output Reverse Current

'oll

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop
"I" Level Supply Current
"0" Level Supply Current

ILK
VD
lee(l)
lee(o!

Temp.

Test Conditions
Driven
Other
Input
Input
Vee
O.SV
O.SV
2.0V
2.0 V

0.8 V
O.SV
OV
OV

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

Vee
OV
OV
s.o V

Vee
OV
OV
5.0 V

INPUT

Vee• 5V

OPEN

Limits
Output

Min.

80V
80V
ISO rnA
300 rnA
OPEN

Typ.

0.4
0.6
I.S
24
SO

O\JTPUT

Vs

-Rl

Max.

Units

Notes

100
100
O.S
0.8
200
1.7S
30
100

I'A
,.A
V
V
I'A
V
rnA
rnA

3
4
1,2
I, Z

--.

:

,I
,
lSpF I

I(Note5):
I

'="LOAO I

~~~~I~_J

owe;.

MO. A-9135A

INPUT
11-1"....._ _ _ _

V;n(O!

'pdQ

, . . - - - Vout(l)
OUTPUT

50%

' - _ _...J_ - - - - - -

Vout(O)

DWG. NO. '·1900A

NOTES:
I. Typical values are at Vee = S.O V, T... = 2SoC.
2. Per package.
3. Diode leakage current measured at VR = Volll m;.!.
4. Diode forward voltage drop measured at I, = 300 rnA.
S. Capacitance values specified include probe and test fixture capacitance.

5-73

o

SERIES UDS-S710H
DUAL PERIPHERAL AND POWER DRIVERS

SERIES UDS-5710H
DUAL PERIPHERALAND POWER DRIVERS
- Hermetically Sealed
FEATURES
•
•
•
•
•
•

Type UDS·57I1H
Dual AND Driver

Four Logic Types
DTL/TIL/PMOS/CMOS Compatible Inputs
Low Input Current
Sustaining Voltage of 80 V
Transient-Protected Outputs
High-Reliability Screening to MIL-STD-883, Class B

Delcrlptlon

These dual peripheral and power drivers are bipolar monolithic integrated
circuits incorporating AND, NAND, OR, or NOR logic gates, highcurrent switching transistors, and transient suppression diodes on the same
chip. The two output transistors are capable of simultaneously sinking
200 rnA continuously at ambient temperatures of up to +85°C. In the OFF
state, these drivers will sustain at least 80 V. Units are supplied in 8-pin
hermetically sealed mini-DIP packages.

Type UDS·5712H
Dual NAND Driver

Appllcatlonl

The Series UDS-S710H dual drivers are ideally suited for interface between
low-level or high-level logic and high-current/high-voltage loads. Typical
applications include driving peripheral loads such as incandescent lamps,
light-emitting diodes, memories, and heaters with a load current of up to a
500 rnA peak value.
The integral transient suppression diodes allow the use of these drivers
with inductive loads such as telays, solenoids, or stepping motors without
the need for discrete diodes. When not required for transient suppression,
the diode common bus can be used to perform the "lamp test" function.

Type UDS·5713H
Dual OR Driver

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ..................................................... 7.0 V
Input Voltage, Vin ....................................................... 30 V
Output Off-State Voltage, Vo" ................. . ........................... 80 V
Output On-State Sink Current, Ion ......................................... 500 rnA
Suppression Diode Off-State Voltage, Vo" ..................................... 80 V
Suppression Diode On-State Current, Ion .................................... 500 rnA
Power Dissipation, PD (one output) ......................................... 1.0 W
(total package) .................................... See Graph
AmbientTemperature Range (operating), TA ........................ -55°C 10+125°C
Storage Temperature Range, Ts .................................. -65°C to +150°C

5-74

Type UDS·571 ..H
Dual NOR Driver

SERIES UDS·5710H
DUAL PERIPHERAL AND POWER DRIVERS

POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

TEMPERATURE IN

°c

ilWti. 110.

,\~

10.978

RECOMMENDED OPERATING CONDITIONS
Supply Voltage (Vee)
Operating Temperature Range
Current into any output (ON state)

Film.

Rom.

Filax.

DOlts

4.5
-55

5.0
+25

5.5
+125
300

V
°C
mA

IJ

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Characteristic

Symbol

"1" Input Voltage
"0" Input Voltage
"0" Input Current at all Inputs
except Strobe
"0" Input Current at Strobe

Vlnlll
VIn(OI

MIN
MIN

IlnlOI
IlnlOI

MAX
MAX

0.4 V
0.4 V

Ilnlll
Ilnlll
VI

MAX
MAX
MIN

30V
30V
-12 mA

"1" Input Current at all Inputs
except Strobe
"1" Input Currenl al Sirobe
Input Clamp Voltage

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

SWITCHING CHARACTERISTICS at Vee
Characteristic
Turn-on Delay Time
Ifurn-ott D.elay Time

Symbol
tpdO
Tpdl

Vs
Cl
Vs
Cl

=

=

=

Limits
Output

Min.

Typ.

Max.

Units

0.8

V
V

2.0

30 V
30 V

-50
-100

OV
OV

-100

I'A

-ZOO

I'A

10
20

I'A
I'A
V

-1.5

Notes

2

2
2

5.0V, TA = 25°C

Test Conditions
70 V, Rl - 465 n (10 Watts)
15 pF
70 V, Rl - 465 n (10 Watts)
15 pF

NOTES,
I. Typical values are at Vcc = 5.0V. T, = 25°C.
2. Each input tested separately.
3. Voltage values shown in the test circuit waveforms are wilh respect to network ground terminal.
4. Capacitance values specified include probe and test fixture capacitance.

Min.

Limits
Typ.
200

Max.
500

Units
ns

Notes

300

750

ns

3

3

INPUT PULSE CHARACTERISTICS
V"IOI = OV
V"111 = 3.5V

I,

= 7ns

Ip

t,

= J4ns

PRR

= II'S

= 500kHz

~--------------------------~

5-75

SERIES UDS-5710H
DUAL PERIPHERAL AND POWER DRIVERS

UDS·5711 H Dual AND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"I" Output Reverse Curren!

loll

"0" Output Voltage

Von

Diode leakage Current
Diode Forward Voltage Drop
"I" level Supply Current
"0" level Supply Current

ILK
VD
leell)
lee(o)

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

INPUT

2.0 V
2.0V
O.S V
O.SV
OV
Vee
5.0 V
OV

limits
Output

2.0 V
2.0V

Min.

SOV
SO V
150 mA
300 mA
OPEN

Vee
Vee
OV

Typ.

0.4
0.6
1.5
S.O
35

Vee
5.0 V
OV

2.4V VeC=5V

,,,
,
I

!

15pF

TNoteS)

: "'%
LOAD
IL. _____
CIRCUIT

.J

DW6.itO. Ao-7678A

I--~
S~

-+II:'
INPUT

:
10% •

I

--";';'~_'p

,
I

'pd,.,..----.t
OUTPUT

-...j I-- If

96%;- - - - - - - - -- Vin(l)

50%\

----it'~

V;n(O)

:

I

I

'I

'pdO

, jr:~----s-~"'c::::::
OWG. No. A-1628C

NOTES:
1. Typical values are at Vee = 5.0 V, T" = 25°C.
2. Per package.
.
3. Diode leakage current measured at VR = Voff(m;n).
4. Diode forward voltage drop measured at I, = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.

5-76

Max.

Units

Notes

100
100
0.5
O.S
200
1.75
12
49

I'A
I'A
V
V
I'A
V
mA
mA

3
4
1,2
1,2

SERIES UDS·5710H
DUAL PERIPHERAL AND POWER DRIVERS

UDS·5712H Dual NAND Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Test Conditions
Characteristic

Symbol

"I" Output Reverse Current

loll

"0" Output Voltage

Von

Diode leakage Current
Diode Forward Voltage Drop
"I" level Supply Current
"0" level Supply Current

ILK
Vo
leell!
leeio!

Temp.

NOM
NOM
NOM
NOM

Limits

Vee

Driven
Input

Other
Input

MIN
OPEN
MIN
MIN

O.B V
O.B V
2.0 V
2.0 V

Vee

NOM
NOM
MAX
MAX

Vee
OV

Vee
2.0 V
2.0 V
Vee
OV
OV
S.OV

OV
5.0 V

Output

Min.

BO V
BOV
150 mA
300 mA
OPEN

Typ.

0.4
0.6
1.5
12
40

lINOI05!
':'

1).1>.

LOAD

MO.

J

1-78:196

INPUT
~:.l:...

_ _ _ _ Vin(O)

IpdO

, - - - - - voul(l)

OUTPUT

50%
'-----'- - - -

- -

-

vout(O)

OWG. "0. '-19001

NOTES:
1. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR = Vofllm'.}.
4. Diode forward voltage drop measured at if = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.

5-77

Units
...Il.A

1.75
15
53

Notes

/loA
V
V
/loA
V

4

3

mA
mA

1,2
1,2

o

15pF

CIRCUIT
L _____

Max.
100
100
0.5
0.8
200

SERIES UDS-S710H
DUAL PERIPHERAL AND POWER DRIVERS

UDS·5713H Dual OR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

"1" Output Reverse Current

loff

MIN
OPEN

"0" Output Voltage

Von

Diode Leakage Current
Diode Forward Voltage Drop

ILK
Vo

NOM
NOM

MIN
MIN
NOM
NOM

"1" Level. Supply Current
"0" Level Supply Current

leel11
lee(ol

NOM
NOM

MAX
MAX

INPUT

2.0 V
2.0V
O.B V
O.B V

limits
Output

Min.

OV
OV
O.B V

BO V
BOV
150 mA

OV

O.B V
OV

300 mA
OPEN

Vee
5.0 V
OV

Vee
5.0V
OV

Vee

sv

Typ.

Max.

Units

0.4
0.6

100
100
0.5
O.B

I'A
I'A
V
V

1.5

200
1.75

B.O
36

13
50

I'A
V
mA
mA

OPEN OUTPUT

1---

----I

I

'l

...-'--4_;-.I-i

:

I
I

I
I

I
I

15pF I
]Note5)1
,:,lOAD I

L~'~C~'!..

O~.

HO

J

A-ginA

Ipdl~.
_OU_TPU_T_ _

---'I,~
DWG.IIo.I..:rUIC

NOTES:
I. Typical values are at Vee = 5.0 V, TA = 25°C.
2. Per package.
3. Diode leakage current measured at VR = V.fllmi.,.
4. Diode forward voltage drop measured at I, = 300 mAo
5. Capacitance values specified include probe and test fixture capacitance.

5-78

Notes

3

4
1,2
1,2

SERIES UDS-5710H
DUAL PERIPHERAL AND POWER DRIVERS

UDS·5714H Dual NOR Driver
ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)

Characteristic

Symbol

"I" Output Reverse Current

I.ff

"0" Output Voltage

V••

Diode leakage Current
Diode Forward Voltage Drop
"I" level Supply Current
"0" level Supply Current

ILK
Vo
leCII )
leClO)

Temp.

Test Conditions
Driven
Other
Input
Input
Vee

NOM
NOM
NOM
NOM

MIN
OPEN
MIN
MIN
NOM
NOM
MAX
MAX

INPUT

0.8 V
0.8V
2.0 V

0.8 V
0.8V
OV
OV

2.0 V
Vee
OV
OV
5.0 V

VCC:=5V

Vee
OV
OV

limits
Output

Min.

80V
BOV
150 rnA
300 rnA
OPEN

0.4
0.6

5.0 V

OPEN

Typ.

0.8
200
1.75

12
40

15
50

--

--.

Rl

:

INPUT

50%
Vovl(O)

DWG. MO. 1-1900A

NOTES:
1. Typical values are at Vee ~ 5.0 V, TA ~ 25°C.
2. Per package.
3. Diode leakage current measured at VA ~ VoH(m'.).
4. Diode forward voltage drop measured at I, ~ 300 mAo
5. Capacitance values specified Include probe and test fixture capacitance.

5-79

p.A
p.A
V
V
p.A

1.5

I

'--_--1._ - - - - - -

Units

V
rnA
rnA

Notes

3
4
1,2
1,2

OUTPUT
-

OUTPUT

Max.
100
100
0.5

o

UDS-S791H QUAD PIN DIODE POWER DRIVER

UDS-5791H
QUAD PIN DIODE POWER DRIVER

FEATURES
•
•
•
•

Low Input Current
TTL, DTL, MOS Compatible
Wide Operating Range
High Output Breakdown Voltage

of four high-voltage NPN output
CONSISTING
stages and associated logic and level shifting,
the Type UDS-5791H monolithic integrated circuit
offers an easy solution to many problems associated
with driving PIN diodes.
The UDS-5791H quad power driver is designed to
replace discrete or hybrid PIN diode drivers. It provides significant reductions in cost and space with
improved reliability. The driver uses a commonemitter input stage for inverting operation. It is
capable of sustaining OFF voltages of 120 V and
will switch currents to 500 rnA.
The input buffer circuitry has been designed to
utilize external discrete resistors. The one resistor
per driver effectively reduces total package power
dissipation and junction temperature while allowing
user selection of output base drive current, power
supply voltages, and output current.

DWG.NO.A-IO,II78

UDS-5791H

The device is rated for operation over an extended
temperature range of - 55°C to + 125°C. It is customarily supplied in 16-pin hermetic dual in-line
package. The unit is subjected to the 100% production screen tests specified in MIL-STD-883, Method
5004, Class B paragraphs 3.1.1 through 3.1.6. On
special order, 160 hours of burn-in to Method 1015,
Condition A, can also be performed.

5-80

UDS-S791 H QUAD PIN DIODE POWER DRIVER

ABSOLUTE MAXIMUM RATINGS
over free-air operating temperature range
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. + 6.0 V
Supply Voltage, VEE' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 6.0 V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. Vee
Output OFF-State Voltage, VOFF (ref. VEE)' .............................. + 120 V
Output ON-State Current, ION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 500 rnA
Package Power Dissipation, Po ................................... See Graph
Operating Ambient Temperature Range, TA • • • • • • • • • • • • • • • • • • • • • - 55°C to + 125°C
Storage Temperature Range, Ts ............................ - 65°C to + 150°C

PARTIAL SCHEMATIC
Vee

T

I'

+-!:.---.,
16

I
I
I

R.

I

,I

D

I
I

I
I
I

tI
I

I
I
I
I

-...:

4~
I
I

I

t RL
~

:u

IN

I
I

-+

• . 10."'10. •

ONE OF FOUR DRIVERS
UDS-5791H

RECOMMENDED OPERATION CONDITIONS
Min.
Supply Voltage, Vee ...........................
4.5
Supply Voltage, VEE' .......................... -1.5
Output ON-State Current, ION ....................
Operating Ambient Temperature Range, TA ••••••••••• -55

5-81

Nom.

Max.

Units

5.0
-3.0

5.5
-5.5
300
+ 125

V
V
rnA
°C

+85

UDS~5791 H QUAD

PIN DIODE POWER DRIVER

s
;0

,

7

~

~"~"i'L
io ~
~

6

5

~•

POWER DISSIPATION
AS A FUNCTION OF TEMPERATURE

~

r,

(' '\>00

R

3

"
';i

I

2

~

.
~
~

I

~

"

I
I

~CIW)

1

;;(

o

I'

NORMAL

SYSTEM LIMIT

AMBIENT
...;;.;;::::;.
TEMPERATURE_ (I

DEVIC~..

~T,""

I
I

50

25

75
TEMPERATURE IN

---- ,

125

100

150

°c
~.NO.A-IO.I93A

ELECTRICAL CHARACTERISTICS over operating temperature range (unless otherwise noted)
Temp.
(OC)

Vcc
(+V)

Characteristic

Symbol

"1" Input Voltage

4.5

"0" Input Voltage

VINU)
VINIO)

"1" Input Current

IIN(1)

5.5

"0" Input Current

IINIO)

OFF-State
Reverse Current

IOfF

ON-State
Output Voltage
(ref. VEE)
(See Note)

VON

VEE
(-V)

VIN
(+V)

VOFF or ION
(+V) (rnA)

4.5
5.0

5.5

3.0
3.0

+25
+ 125
-55

4.5

3.0

0.4

115

4.5

3.0

0.4

115

4.5

1.5

2.4

+85

4.5

1.5

2.4

+ 125

4.5

1.5

2.4

4.5

0.4

150

Limits

Rx
(0)

300

720
360

150

720

Min.

Max.

Units

2.0

4.0

V

-

0.8

V

-

j.l.A

-

50
1.0

rnA

-

50

j.l.A

-

100

j.l.A

-

mV

-

400
600

-

400

mV

mV

300

360

-

700

mV

150

720

500

300

360

850

mV
mV

150

720

-

1.3

V

300

360

-

1.5

V

510

20

50

rnA

Predriver
Collector Voltage
(ref. VEE) (See Note)

Vx

Output Short -Circuit
Current (See Note)

los

4.5

3.0

0.4

OFF-State
Supply Current

Icc

5.5

5.5

0.4

-

4.1

rnA

ON-State
Supply Current

Icc

5.5

5.5

2.4

-

3.4

rnA

Turn-On Delay

1."

-

5.0

3.0

-

-

510

-

500

ns

Storage Delay

ts

-

5.0

3.0

-

-

510

-

5.0

j.l.s

Fall Time

4

-

5.0

3.0

-

-

510

-

100

ns

1.5

2.4

NOTE: Each output tested separately.

5-82

-2.3

-

UDS-S791H QUAD PIN DIODE POWER DRIVER

SWITCHING TEST CIRCUIT
AND WAVEFORMS
Vee

+5V

VOUT

llWIl. NO.

+100v

A-IO.65~

"'2'4V~
V

I

50%

I
I

IN

",O.4V

I

I

I

I

-I', t--

+j\>nloo-

I

I

"'00V~1
v
I
II
OUT
'" -2.3V-

I

I

50%

:

10%

10%

I I

-ffrDMl, 110. ""'10.655

GENERAL DESIGN NOTES

where
B = 30, the minimum output current gain over the operating temperature range
Vx = 1.5, the maximum predriver voltage
It is recommended that a minimum overdrive of 25% to be used (1.25 IRX or 0.8 RX)'

5-83

II

MILITARY AND AEROSPACE DEVICES (Continuea)

QUALITY ASSURANCE FLOW CHART
CHEMICALS. GASES. HARDWARE
WAFERS
RAW MATERIALS
MASKS

NEW PRODUCT DESIGNS
AND CURRENT DESIGNS.
NEW·CURRENT PROCESSES.
NEW MATERIALS

DOCUMENTATION OF:
CHEMICALS. HARDWARE
GASES. MASKS
PROCESSES. DESIGNS. ETC.

~

QUALITY ASSURANCE
PROCUREMENT REVIEW
VENDOR CONTROL
INCOMING INSP.

~

RELIABILITY ENGINEERING
DESIGN INTRODUCTION
(SEM) EVALUATION.
QUALIFICATION

PRODUCT ASSURANCE
DOCUMENTATION CENTER
PRODUCT·PROCESS
AND PROCUREMENT SPECS.

QA IN-PROCESS
AUDIT

QA IN-PROCESS
AUDIT
S.E.M. INSPECTION

I

I

WAFER
FABRICATION

~

@

METALLIZATION

TOLLGATE
INSP.

~

HERMETIC PKG.

QA AUDIT

TEMP. CYCLE
CENTRIFUGE
GROSS LEAK. FINE LEAK

QUALIFICATION
OF CONFORMANCE
MIL·STD-883
METHOD 5005 OR
CUSTOMERS REQ.

MIL·STD·883
METHOD 5004
OR CUSTOMER REQ.

SHIP

5-84

STOCK

MILITARY AND AEROSPACE DEVICES (Continued)

PROBE

100% VISUAL
INSPECTION

QA IN PROCESS
AUDIT

SCRIBE
SORT

DIE ATTACH
WIRE !lONO

100% VISUAL
PRE·CAP
INSP.

II
----tl___,_--'

OWG.

5-85

NO.

8·1474

MILITARY AND AEROSPACE DEVICES (Continued)

THE SPRAGUE ELECTRIC
'DOUBLE-DEUCE' BURN-IN PROGRAM
FOR INTEGRATED CIRCUITS
THE EXPENSE OF DEVICE FAILURE is
more than the time and money spent
locating and replacing a defective integrated circuit. The total cost can include
the price of assembly rework, system
downtime, service calls, warranty claims
and lost customer goodwill.

Electric Company's "Double-Deuce"
screening program removes marginal
devices before shipment. Improved
customer satisfaction with performance
and reliability is an immeasurable but certain bonus of the program.
"Double-Deuce" screening is done during the last stage of production. Because
Sprague does the screening, only qualified
devices are received by the user.

Costs of $25 for each in-house failure
and $250 for e~ch field failure are not uncommon. At a relatively low cost, Sprague

QUALITY AND RELIABILITY
Quality and reliability are terms that are
often used interchangeably. Quality implies reliability, but a product's merit
should always be defined by both.

lifetime probability curve, is often used to
project time-to-failure for integrated circuits. Because the "Double-Deuce" program eliminates early failures, Sprague integrated circuits delivered after the screening process have a higher degree of
reliability.

Quality is the extent to which a device
conforms to specifications when it is shipped to the user. Quality is verified by
testing. Inspections at every step of production of Sprague integrated circuits ensure the devices meet demanding standards for workmanship and materials.
Inspections of integrated circuits under
the "Double-Oeuce" program have been
made even more stringent to secure a
higher level of quality.

PROBABILITY OF FAILURE
AS A FUNCTION OF TIME

Reliability is the measure of an integrated circuit's ability to meet specifications over time. Re,iability is a product of
design and process control. Acceleratedlife tests provide the manufacturer and
user with an indication of the reliability of a
device. Normally, a small number of integrated circuits exhibit signs of early
failure or infant mortality. This statistic,
taken from the steepest part of the Ie

DOUBLE'DEUC~
WEAR

-----RANDOM FAILURES
TIME

5-86

OUT

Dwq. No. A·ll.417

MILITARY AND AEROSPACE DEVICES (Continued)

OUTLINE OF THE 'DOUBLE.DEUCE' PROCESS
The "Double-Deuce" burn-in program
uses high stress levels to accelerate the
failure mechanisms associated with infant
mortality. These normally occur within the
first few hours of user application.
Although typically less than 1 per cent of a
lot will be rejected, user confidence in lot
integrity is greatly improved. The screening
program is designed to eliminate the
following failure modes:
Stress

Failure Mode

High-Temp. Bake
Temp. Cycling
Burn-In
High-Temp. Testing

Contamination
Package-Related
Process-Related
Electrical Degradation

L--:':::::::':i===-. MILITARY
PRODUCT
PROCESSING

o

The majority of early integrated circuit
failures (infant mortality or ionic contamination) can be attributed to manufacturing defects, package or assembly
defects, or final test escapes. The "DoubleDeuce" program is designed to eliminate
weaker parts, reduce or eliminate user
shipment inspection, assembly rework,
system checkout, and warranty returns.

SHIP

SHIP
OWG.NO. A-ll,41BA

TEST PROCEDURES
Potential failures are seal or bond failure,
cracked packages or chips.

The "Double-Deuce" burn-in program includes five test procedures:
1. High·Temperature Bake
This is a process designed to stabilize
electrical drift and to accelerate chemical
degradation such as surface contamination. It is a four-hour bake at + 175·C
without electrical stress (similar to MILSTD-883, Method 1008).

The process has 10 cycles with 10
minutes of dwell at - 65·C and 10 minutes
of dwell at + 150·C (air to air), with a maximum transfer time of five minutes (MILSTD-883, Method 1010, Condition C). At
Sprague's option, this process may be
changed to thermal shock (liquid to liquid)
for 10 cycles, five minutes at O·C and five
minutes at + 100·C with a transfer time of
10 seconds (MIL-STD-883, Method 1011,
Condition A).

2. Temperature Cycling
This is a screening process designed to
mechanically stress the integrated circuit
by alternately heating and cooling it.

5-87

MILITARY AND AEROSPACE DEVICES (Continued)

TEST PROCEDURES
3. Burn·ln
The burn-in, or accelerated-life test, is
performed to screen out marginal devices,
those with inherent defects, or defects
resulting from manufacturing deviations
that can cause time-dependent or stressdependent failures. Without this conditioning, marginal circuits that initially meet all
specifications could exhibit early lifetime
failures under normal operating conditions. The test is conducted for 96 hours at
a junction temperature of + 150°C under
electrical stress conditions (similar to MILSTD-883, Method 1015) such as:
Type of Device

Electrical Stress

Bipolar Interface
Linear Devices
12L and MOS Logic

Steady-State Reverse Bias
Steady-State Forward Bias
Clocked

TJ

=

+ 125°C for ionic contamination (EA

= 1_0eV)orfor192hoursatTJ = +125°C
for infant mortality defects (EA = 0.4 eV).
4. Hlgh·Temperature Test
Every device is subjected to complete
electrical tests at + 70°C for function and
doc parameters (similar to MIL-STD-883,
Methods 3001 through 3014 and 4001
through 4007, as applicable). Relaxed
+ 25°C limits or published hightemperature limits, are used to remove
devices with circuit anomalies such as
beta mismatch, high leakage current, and
intermittent bonds, which may only affect
the circuit at higher temperatures.
5. Outgoing Quality Control Inspection
All "Double-Deuce" product is inspected
to an outgoing sampling plan which
guarantees that the product will meet an
acceptable quality level of 0.25%.

The burn-in conditions (96 hours at TJ

= + 150°C) are equivalent to 525 hours at

HOW TO ORDER
All standard Sprague integrated circuits
are branded with the Sprague registered
trademark,

part subjected to the screening program
for extra reliability.

®.

Devices processed in the "DoubleDeuce" burn-in program are specified by
adding the suffix "BU" to the end of the
part number. For example, to order ULN2023A with this processing, specify ULN2023ABU; to order UDN-6116R-2, specify
UDN-6116R-2BU_

Integrated circuits screened to the
added requirements of the "Double-Deuce"
program are marked:

®®
The double "circle-deuce" identifies a

5-88

MILITARY AND AEROSPACE DEVICES (Continued)

INTERFACE DRIVERS WITH MIL·STD·883
HIGH-RELIABILITY SCREENING
Interface drivers with high-reliability screening can be ordered by adding the suffix "MIL" to the part number, for
example, ULS-2064H-MIL. If marking with the customers part number is necessary in place of the Sprague Electric
part number, this must be stated on the purchase order with the marking desired.

Table I - 100% Production Screen Tests (All Hermetic Parts)
MIL-STD-883, Method 5004, Class B, Paragraphs 3.1.1 through 3.1.6
MIL-STD-883
Test Method
Conditions
------------------------------------------------------------------Internal Visual
2010. Condo B
Stabilization Bake
1008. Condo C
150°C. 24 Hours
Thermal Shock
lOll. Condo A
oto 100°C. 15 Cycles
Constant Acceleration
2001. Condo E
30.000 G·s. Yl Plane
Fine Seal
5 x 10- 7 atm o cm 3 js Maximum
1014. Condo A
Gross Seal
1014. Condo C
Electrical
Per Specification
Marking
Sprague or customer part number. date code.
lot identification. index point
Screen

Table" - 100% High-Reliability Screening ("MIL" Suffix Parts Only)
MIL-STD-883, Method 5004, Class B, Paragraphs 3.1.9 through 3.1.15 & 3.1.18
MIL-STD-883
Test Method

Screen
Interim Electrical
Burn-In
Static Electrical
Dynamic & Functional Electrical
Fine Seal
Gross Seal
External Visua I

Table III -

Gp A,
Condo
Gp A,
Gp A,
Gp A,
Condo
Condo

Conditions
Subgp.
A
Subgp.
Subgp.
Subgp.
A
C

1
1
2& 3
4, 7 & 9

A Subgp. 1-4, 7 & 9
B
C
D

25°C per Specification
12SOC, 160 Hours
25°C per Specification
- 55°C & + 125°C per Specification
25°C per Specification
5 x 10- 7 atm o cm 3;s Maximum

High-Reliability Qualification and Quality Conformance Inspection
MIL-STD-883, Method 5004, Class B, Paragraph 3.1.17
MIL-STD- 883
Test Method

Test
Group
Group
Group
Group

5005,
1015,
5005,
5005,
5005,
1014,
1014,
2009

5005,
5005.
5005,
5005,

Table
Table
Table
Table

Description
I
II
III
IV

Each production lot
Each production lot
End points, Gp. A, Subgp. 1. every 90 days
End points, Gp. A, Subgp. 1. every 6 months

--~----------------------------------------

Some of this material has been taken from Military Specification Mll-M-3851OE and Military Standard Mll-STD-883B, Methods 1008.2, 1011.4, 1014.5, 1015.4,
2001.2, 2009.4, 2010.7, 5004.6, and 5005.8.
The above conditions may not comply with Mll-M-3851OF and Mll-STD-883C.

5-89

II

MILITARY AND AEROSPACE DEVICES (Continued)

BiMOS POWER DRIVERS TO MIL-STD·883
devices required to link low-level (TTL, CMOS,
NMOS, PMOS) LSI or microprocessor functions with power loads such as relays, LEDs,
solenoids, lamps, gas-discharge or vacuumfluorescent displays, and motors.
In addition to providing space-saving singlechip solutions to many peripheral power interface problems, Sprague BiMOS devices with an
extended temperature range also improve system
reliability and lower both component count and
system cost.
Detailed engineering bulletins for the
hermetic, extended temperature BiMOS integrated circuits described here are available
from Sprague district sales offices, or from
Technical Literature Service, Sprague Electric
Company, Marshall Street, North Adams,
Mass. 01247.

CONTINUING in its leadership role in interface integrated circuits, Sprague Electric
Company has added hermetic BiMOS power
drivers to its long list of innovations.
These high-current and high-voltage drivers
with MIL-STD-883 screening provide a new
level of interface flexibility and versatility for
military, aerospace, avionics, and other applications requiring high reliability. They are supplied
in either glass/metal side-brazed hermetic
packages (suffix letter 'H') or ceramic/glass cerDIP hermetic packages (suffix letter 'R').
BiMOS monolithic devices combine CMOS
logic and control functions with four, seven,
eight, or ten bipolar output, power-interface
buffers. Reliable, single-chip solutions are now
available for a wide variety of peripheral power
interface problems. No longer are two or three

S-BIT SERIAL-INPUT/PARALLEL-OUTPUT LATCHED DRIVERS
UCS-4820H BiMOS 8-Bit Serial-In I
SERIES
Parallel-Out Latched Drivers augment the origi-

for a variety of peripheral loads . including incandescent lamps, LEDs, thermal or electrosensitive printers, and (with appropriate clamping techniques) relays, solenoids, and other high-power inductive
loads.

nal Type UCS-4401H and UCS-480IH devices. All
of the devices in this series contain an octal shift
register, octal latch, and octal high-current, opencollector Darlington outputs. They improve systems
designs through a reduced package count and a reduction in I 10 line requirements. By using the serial
data output, the drivers can be cascaded for interface
applications requiring more than eight drive lines.
The three devices in this series are functionally
identical, but differ in the maximum allowable output voltage ratings. The bipolar outputs are suitable

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage (UCS-4821H) " " " " " " " , " ' " 45 V
(UCS-4822H) " " " " " " " " " " 75 V
(UCS-4823H) " " " " " " , ' , " ' " 95 V
Logic Supply Voltage " " " " " " " " " " , " ' " 12 V
Continuous Output Current, , , , , , , , , , , , , , , , , ' , , 350 rnA

ELECTROSENSITIVE PRINTER APPLICATION
UCS-4822H

+60V

CLOCK
SERIAL DATA IN

/lP

+5V
SERIAL
DATA OUT
STROBE

Dwg. No. A-ll,742

5-90

MILITARY AND AEROSPACE DEVICES (Continued)

10-BIT SERIAL-INPUT/PARALLEL-OUTPUT LATCHED SOURCE DRIVER

THE TYPE UCS-481OH BiMOS

anodes (segments or dots) and lor grids (character or
digit) of typical vacuum-fluorescent panels. The
high-voltage version is often used with larger and
more complex alphanumeric or graphics panels, or
gas-discharge displays. With suitable signal-level
shifting, it may also be used as an anode driver for
planar gas-discharge applications.

lO-Bit Serial-

In IParallel-Out Latched Source Driver is

primarily designed as interface between logic circuitry and vacuum-fluorescent dtsplays but may also
be used with LED displays or thermal printers within
its output limitations of 60 V and -40 mA per
driver. A selected version, Type UCS-.481 OH-l , has
a maximum operating-voltage rating of 80 V.
The CMOS shift register and latches will operate
over a wide supply-voltage range and are compatible
with standard MaS logic families. When used with
TTL or low-speed TTL, pull-up resistors may be
needed to ensure an input-logic high.
The 10 high-voltage outputs are used to switch the

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage (UCS-4810H) ..................... 55 V
(UCS-4810H-l) ................... 75 V
Logic Supply Voltage Range ............... 5.0 V to 12 V
Continuous Output Current ................... -25 rnA
UCS-4810H-l
ANODE
DRIVER

-L..!

v

+5

------0
~

~

CLOC~ OUT

,.,
'-'

~

":'

~

~

~

+5V
(

ENABLE

~

n
41-

I

I

i

t-

--

I

I

i !

I

I

-- -- t--

--

I

~

o-------U
~

~

~Ii
.; -N>

:n.

'--

~

I

,I

I

t-'5.1

11--

~-

'---

':

r~ ~--'

.- -- .-

t'43

v

I
: SPRAGUE
I RESISTO R
[! NETWOR K.
TYPE 21 6C
I OR 420C

II
I - - - - ___ ~I

':l~62V

".,

r

~

'3li2J.

r--~ ~

Owg.No. C·1271

5-91

BLANKING

v

t!

f-

"--'-_J'o SERIAL
DATA IN

I
I

r__

iD. ., r ~ ~

?~

+5 v

r'

"

I
I
I
I
I

UCS-4823H
CATHODE
DRIVER

STROBE

c,.,
r'

-{>

I

I
I
I
I
I
I

yJ

SERIAL DATA OUT

""
""

~

I

r t- 1-

SERIAL DATA OUT

~

F'

'j

---

SERIAL DATA IN

ii

.190 V

~---

L

PLANA R
GAS-DISCH ARGE
DISPLAY DRIVER

CLOCK 0---

~---

III

MILITARY AND AEROSPACE DEVICES (Continued)
a-BIT LATCHED SOURCE DRIVER

T

HE TYPE UCS-4815H BiMOS 8-Bit Latched
Source Driver is designed primarily for use with
high-voltage vacuum-fluorescent displays. It contains an 8-bit type D latch and eight source outputs
with pull-down resistors, a common strobe, blanking, and enable functions. 1be standard output voltage rating is 60 V, with a selected version (Type
UCS-4815H-l) available for operation to 80 V.

digits of vacuum-fluorescent displays. The highvoltage version is often used with larger and more
complex gas-discharge alphanumeric or graphics
panels.

RECOMMENDED MAX. OPERATING CONDITIONS
Output Voltage (UCS-4815Hl .................... 55 V
(UCS-4815H-ll ................... 75 V
logic Supply Voltage Range ............... 5.0 V to 12 V
Continuous Output Current ................... -25 rnA

The eight high-voltage outputs are generally used
to drive the segments, dots (matrix panel), bars, or

ENABLE

JI

STROBE

V

~

-

I
!

I!

+5 V

r'"
lI-

ff

lI-

.,p

~

+50 V

r---

I

If

r--

I~ri
~!3 0

20
SEE TEST FIC;URE I
10

VI,. • IOO",V rm •
Vee· 12 V

0

IK

10K

lOOK

1M

FREQUENCY

6----7

IN Hz

10M
OWG.JtO.A-IO,181

100M

ULN-2204A

A-M/F~M

RADIO SYSTEM

ULN·2204A A.M/F.M RADIO SYSTEM

FEATURES
•
•
•
•
•
•
•

Low Harmonic Distortion
Wide Operating Voltage Range
Low Power Drain
D-C A-M/F-M Switching
30 /-IV Limiting Threshold
Exce"ent A-M Rejection
Interchangeable With HA12402,
TA7613, TDAI083, U4178

pROVIDING ALL radio functions except VHF
tuning, Type ULN-2204A A-M/F-M radio
system excels in low-cost applications requiring a
minimal parts count and high performance.
In the A-M mode of operation, the device is a
complete single-conversion superheterodyne
broadcast or shortwave receiver with AGC and
peak envelope detection. In the F:-M mode, Type
ULN-2204A operates as a high-gain I-F
amplifier/limiter and phase-shift detector. A
simple doc switch is used to change mode of
operation.
A single external capacitor at pin 16 provides
the A-M AGC time constant, the F-M AFC time
constant, and R-F decoupling. A single resistor
at the same pin will adjust the A-M gain for optimal system performance.
The audio power amplifier will work into any
speaker load of 8Q or greater. Class B operation
of the audio power amplifier yields high efficiencyat rated output with very low quiescent power
drain. The amplifier exhibits little crossover
distortion. Its output impedance is significantly
less than one ohm.

Type ULN-2204A will work with a wide range
of supply voltages, and is suitable for use in a-c
powered table radios and in battery-powered (6
or 9 V) portable radios.
This system will operate at supply voltages as
low as 2 V at reduced volume without significant
increase in distortion. Brown-outs or weak batteries need no longer be a major concern.
Type ULN-2204A is housed in a 16-pin dual
in-line plastic .package with a copper lead frame
that eliminates many decoupling problems and
allows maximum power dissipation.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vce .......................... (Note I)
Zener Current, IREG .
. ..................... 60 rnA
Package Power Dissipation, Po (Note 2). .
. .... 1.0 W
Operating Temperature Range, TA ....... -20°C to +85°C
Storage Temperature Range, Ts ........ -65°C to +150°C
NOTES:
1. Dependent on value of external current limiting resistor, 13 Vat OQ.
2. Derate at the rate of 15 mW/oC above TA = +70°C.

6-8

ULN-2204A A-M/F-M RADIO SYSTEM

+ 25°C,

ELEORICAL CHARACTERISTICS at TA =
Vee

= 6.0 V, R8 =

00,

= 1.2 kQ (unle•• otherwi.e noted)

R16

Limits
Characteristic
F-M MODE: fo

Test Cond itions

Vth
Vo
THDD
AMR

I·F Input Impedance
I·F Input Capacitance
Quiescent Terminal Voltage

Z2
C2
VI
Vs
lee

Quiescent Supply Current

Max.

-

-

30
250
1.0

60

Yin = 10 mV rms
Yin = 10 mV rms , 30% A-M,
la.m = 400 Hz

35

-

Vee
Vee

= 6.0 V
= 9.0 V

50
40
4.0
2.1

-

fAV
mV
%

-

dB

-

kQ

-

pF
V
V
mA
mA

-

1.7

-

14
18

20

-

5.0
150
10

10

-

25
4.5
5.5
25
3.0
100
3.0

35

fAV

-

kQ

-

kQ

-

kQ

1.3
1.7

-

-

= 1 MHI:, fif = ..55 kHI:, fm = ..00 HI:, 30% A-M
Vou~s)

Sensitivity
Detector Recovered Audio
Overload Distortion

Audio Gain
Output Power

Output Distortion
A·F Input Impedance
Quiescent Terminal Voltage

mVrms

80% A-M, also see "UlN-2204A
Variations"
20 dB S+N/N
See Note

Z6
C6
Z4
C4
Z2
C2
VI
Vs
lee

Quiescent Supply Current
AUDIO AMPLIFIER: fo

= 20

Vo

Usable Sensitivity
Mixer Input Impedance
Mixer Input Capacitance
Mixer Output Impedance
Mixer Output Capacitance
I-F Input Impedance
I-F Input Capacitance
Quiescent Terminal Voltage

NOTE:

Typ.

= 10.7 MHI:, fm = ..00 HI:, fd = ±75 kHI:, Peak Separation = 550 kHI:

Input limiting Threshold
Detector Recovered Audio
Detector Output Distortion
A-M Rejection

A-M MODE: fo

Min.

= ..00 HI:,

RL

-

Vee
Vee

=

-

= 6.0 V
= 9.0 V

10

13

-

-

fAV
mV
mV

pF
pF
pF
V
V
mA
mA

8Q

Ae
Po

THO

36
Vee = 3.0 V, 10% THO
Vee - 6:0 V, 10% THO
Vee - 9.0 V, 10% THO
Po - 50 mW

Z9
VIO
VI2

For optimum noise match. source impedance should be 2.5

kQ.

6-9

250
500

-

40
50
350
650
2.0
250
1.1
2.6

44

-

dB
mW
mW
mW
%

-

kQ

-

V
V

-

ULN-2204A A-M/F-M RADIO SYSTEM

TEST CIRCUIT
A-M

F-M IN

l.!l.~-~o:---------""+--oVcc

DWG.MO.A-IO,328B

'See "ULN-2204A Variations"

COIL WINDING INFORMATION

Tl A-M First I-F
455 kHz

Qu = 120
Nl:N2:N3 = 15.5:2.8:1
Ct = 180 pF

General Instrument
Part No. EX 27835

Toko Part No.
RMC-2A7641A

T2 A-M Second I-F
455 kHz

Qu = 70
Nl:N2 = 2:1
Ct = 430 pF

General Instrument
Part No. EX 27836

Toko Part No.
RlE-4A7642GO

T3 F-M Detector
10.7 MHz
T4 F-M Detector
10.7 MHz
II A-M Oscillator
1455 kHz

Qu = 50
Ct = 100 pF
Qu = 50
Ct = 100 pF
Qu = 50
~l:f:43 = 10.7:1
Ct = 39 pF

General Instrument
Part No. EX 27640
General Instrument
Part No. EX 27640
General Instrument
Part No. EX 27641

Toko Part No.
BKAC-K3651HM
Toko Part No.
BKAC-K3651HM
Toko Part No.
RWO-6A7640BM

6-10

ULN-2204A A-MlF-M RADIO SYSTEM

FUNCTIONAL BLOCK DIAGRAM
A-M
I-F
OUT

OSe.

I-F
IN

A-MGAIN ADJ.
AGC/AFC

II
R-F
DECOUPLE

LOW-LEVEl I-F
I-F DETECTOR DETECTOR HIGH-LEVEL
GND
DECOUPLE OUT
IN
OUT
GND

~~~~
~l
A-F
IN

A-F
DECOUPLE

OW ... HO. A-IO.12t

PIN 16 OUTPUT VOLTAGE, VI6

A-M
Operation

Complete Part Number Including Suffix
F-M Operation
2.20-2.65 V 2.55-3.05 V 2.95-3.40 V
1.40-1.75 V ULN-2204A-ll ULN-2204A-21 ULN-2204A-31
1.65-2.00 V ULN-2204A-12 ULN-2204A-22 ULN-2204A-32
1.90-2.25 V ULN-2204A-13 ULN-2204A-23 ULN-2204A-33

TYPICAL QUIESCENT SUPPLY CURRENT

TYPICAL AUDIO POWER OUTPUT
1.2

24

/

20

/
.... ~ /
;'
r:;v~

~-

~

,

2

,

"u
~

8

D

I

i>l

"
I

~

/
,r

THD=10%

~ 0.8

~~

tJ..o 0.6

~'"

/bY'

~-

"

o!5

O. 4

~

4
6
8
10
SUPPLY VOLTAGE. Vee. IN VOLTS

O. 2

~

12

/

I

/

/ '/

i

I

I

/

,~V...

;!;

v-.OO~

•

V

1.0

Y

4
6
8
10
SUPPLY VOLTAGE, Vee, IN VOLTS

12

1)W!i.MD ...... IO.S27

D\I'G. NO ...... 10.325.

6-11

ULN-2204A A-MiF-Nl RADIO SYSTEM

ULN-2204A VARIATIONS
FOR OPTIMAL SYSTEM PERFORMANCE
The receiver system's performance can be
kept within tighter performance limits by matching bias groupings and appropriate external
resistors (Rs and RI6). With proper matching of
parts and lots, consistent device performance
can be obtained. Bias groups for Type ULN2204A are shown in the table below. There are
three selections for each mode of operation and
nine possible combinations.

In addition, some system designs derive the
F-M tuner supply, tuner bias, or AFC voltage
from pin 16 output of Type ULN-2204A. For
example, if the tuner design requires 2.4 V at 2.0
rnA (an equivalent R16 of 1200Q) , the graph
below indicates a Type ULN-2204A-lX is required. A -2X or -3X device could also be used
by paralleling the equivalent l200Q tuner load
with a fixed resistance for an 830Q load or a
520Q load, respectively. For AFC applications,
note that as frequency increases, V16 voltage
decreases. The amount of change is a factor of
load impedance, detector coil characteristics,
and part grouping.
In A-M operation, stability is seldom a problem. However, large-signal overload can be optimized (to typically 30 mY) by matching the
particular part group with an appropriate load
resistor at pin 8. The A-M grouping of a device
is identified by the second digit of the partnumber suffix (the "I" in ULN-2204A-31).

Sprague Electric Company recommends that
customers do not specify particular selections
except in unusual circumstances. All parts
manufactured with Sprague part numbers are
branded with appropriate part-number suffixes.
Any shipment to a customer will consist of parts
from a single selection (single suffix).
The first digit of the suffix (the "3" in ULN2204A-3l) refers to F-M performance. It indicates F-M gain and pin 16 output voltage as
functions of the pin 16 load resistance. (See
graph on next page.)

For -Xl, Rs should be 00.
For -X2, Rs should be 47 kQ.
For -X3, Rs should be 33 kQ.

F-M circuit stability is inversely related to gain
or sensitivity and is affected by source and load
impedances, decoupling, and printed wiring
board layout. After an optimal F-M I-F gain is
determined for a particular circuit design, that
gain can be attained by matching the partnumber suffix and the pin 16 load.

Additional loading may raise the overload
point slightly, but AGC and sensitivity will be
compromised. For any fixed value of Rs, -X3
parts will exhibit slightly higher A-M gain, while
-Xl parts will have slightly lower A-M gain.

TYPICAL F-M I-F GAIN CHARACTERISTIC
F-M GAIN (dB)

3.2

73

3.0

72

2.8

71

2.6

70

J /

/
~I
~i/
~ if P

~

<5

>

~

2.4

69

2.2

67

2.0

64
100

R)

I~'
.::,-S'
/ I V
~

I

~IV" $J

~

>"'"

"""

1>~

C$"'?"

rv

~

/

/

/
200

300

500

,

V
800

R16 IN OHMS

6-12

1K 1.2K

2K

3K

5K
DWG. NO. A-II, 354.

ULN-2204A A-MlF-M RADIO SYSTEM

TYPICAL APPLICATION
An A-M/F-M radio using the ULN-2204A
receiver system, designed for a usable F-M sensitivity of about 4 /-IV and an A-M sensitivity of
350 /-IV lm, appears on the next page.

radiating R-F noise in the A-M spectrum.
The tuning indicator below may be added to
the radio circuit to provide an LED indication
when the received signal strength exceeds 7 /-IV in
the F-M mode or 700 /-IV 1m in the A-M mode.
The tuning indicator cir{!uit reduces the I-F gain
by about 2 dB. The sensitivity may be adjusted
by changing the value of Cl or C2.

The two-stage F-M tuner is operated at about
4 V. Reducing the pin 16 voltage to 1.8 V (by
changing R 16) reduces interstation noise and the
F-M I-F gain. An inductor at pin 12 (L6)
prevents the wide-band audio amplifier from

TUNING INDICATOR
,------------.---_._---O+6V
1K

1

04

OWG.HO . .1.-11,355

COIL AND TRANSFORMER INFORMATION
FOR TYPICAL APPLICATION
LJ

F-M Antenna Coil

4% turns, #20 AWG (0.8 mm), 0.216" (5.5 mm) 0

L2

F-M R-F Coil

3th turns, #20 AWG (0.8 mm), 0.177" (4.5 mm) 0

L3

F-M I-F Trap

16% turns, #24 AWG (0.5 mm), 0.177" (4.5 mm) 0

L4

F-M Oscillator Coil

2% turns, #20 AWG (0.8 mm), 0.177" (4.5 mm) 0

L5

F-M Detector Coil

15 ",H, Qu

L6

Audio Choke

L7

A-M Antenna Coil

T1
T2
T3
T4
T5
T6

F-M
F-M
A-M
F-M
A-M
A-M

10 ",H, Qu = 2 @ 2.52 MHz;
3 turns through ferrite bead
Qu = 250, 110:10 turns ratio;
Q2B core, 3.5" (90 mm) x 0.394" (10 mm) 0
82 pF, Qu = 90 @ 10.7 MHz, 11:3 turns ratio
390 pF, Qu = 75 @ 10.7 MHz, 5:2 turns ratio
390 pF, Qu = 130 @ 455 kHz, 100 turns center-tapped
150 pF, Qu = 90 @ 10.7 MHz
460 ",H, Qu = 120 @ 796 kHz, 11 0: 11 turns ratio
180 pF, Qu = 145 @ 455 kHz, 155:10 turns ratio;
primary tapped at 127 turns

I-F Transformer
I-F Transformer
Detector Coil
Detector Coil
Oscillator
I-F Transformer

= 120 @

6-13

2.52 MHz

c:

Z
I

I

N

F-M ANT.

4~7 47•

N
C

150K
ED-1502 BIC

ED-1502BIC
/ " . . 22.11

10

:t

T2

~

330

L1

~

3.3
K

.11

30

7'

330

,,

/
I

/

/

I
I
I
I
I

t--,,_
01

V
;

'I~

OA-M '04..L

.li-

rt

I

r:;;;:

H

20

r-'.;:.",III

11

j

:1,",

I

J

~,
0·"

,,,Ji
220

IOO

I
I
I
I
I

.

I
I

A-M ANT.

l ,m!jL7
.......

",

8n

140

.

I

1

02

II

'-

,
'- ' -

'-,

--====~~
1K

I

-7/''----

,I

'/

1

A-M

!F-M

1°2
0.....9. N;). D-1107

*Required only for

"'-f gain-dependent:

Vcc~9V.

See "ULN-2204A Variations".

TYPICAL APPLICATION

3:
~
c
is
'"
-<

'"
;;:I
3:

ULN-2240A A-M/F-M SIGNAL PROCESSOR

ULN-2240A A-M/F-M SIGNAL PROCESSOR
FEATURES
• 12 !'-V Limiting Threshold
• Tuning-Error and Signal-level Muting
• Zero-Tune Meter Drive
• Balanced A-M Mixer
• 5 !'-V A-M Sensitivity
• D-C Mode Switching
• Internal Voltage Regulator
• Meets Dolby@> Noise Requirements
• 20-Pin Dual In-Line Plastic Package

pREMIUM PERFORMANCE features such as delayed AGC for the R-F stage, an AFC drive
circuit, interstation (signal level) muting, and offchannel (tuning error) muting, are offered by Type
ULN-2240A.

The signal processor combines F-M I-F receiver
functions and all A-M radio functions in a single
monolithic integrated circuit. The system's audio
output stage uses low-noise biasing that meets
Dolby® receiver noise requirements.

'"Registered Trademark, Dolby Laboratories, Inc.

1-'

BIAS

1-'

OUT

DETECT
IN

MUTE ADJ.

~

DELAYED
AGC

ALIOIO

OUT

I-F IN

LOW-LEVEl
GROUND

l

@
A-M MIXER
MIXER BIAS/AVC
OUT

A'C/
ME.TER

~
SUB.

HIGH-LEVEL
GROL'ND

A-M
DECOL'PlE
D'IfJ. MO. A--10796

FUNCTIONAL BLOCK DIAGRAM

6-15

ULN-2240A A-M/F-MSIGNAL PROCESSOR

The A-M mixer is a balanced low-current analog
mUltiplier with very low local oscillator feedthrough, high I-F rejection and freedom from spurious responses. It can be used in the long, medium,
and shortwave bands.

power amplifier (ULN-3701Z) or stereo decoder
(ULN-3810A).
A-M gain is controlled with AVC to the I-F and
delayed A VC to the mixer. Switching between
modes is done with a single-pole d-c switch.
Type ULN-2240A signal processor excels in
signal-seeking or scanning applications. False triggers on adjacent channels or strong mistun~d signals
are eliminated since off-tune mute voltage changes
are more pronounced than the usual signal-level voltage changes. In standard F-M radio applications,
tuning-error muting eliminates the low-frequency
"thump" and noise-tail associated with tuning
through a strong signal.
Internal voltage regulators assure consistent performance with wide variations in supply voltage (8.5
to 16 V) and temperature.

A balanced four-stage differential I-F amplifier is
used in both A-M and F"M modes. It gives maximum
gain without common-mode interference and noise.
The delayed AGC output (pin 15) can be used for a
discrete R-F stage or for stereo switching logic.
In the F-M .mode of operation, the detector is a
high-level, four-quadrant analog multiplier. In the
A-M mode, the detector is operated as a balanced
peak detector.
The low-level audio output is common to both
operating modes and can be used to drive an audio

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .............................................................................. 18 V
Mute Input Voltage, Vg • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 5.0 V
Regulator Current, IREG .......................................................................... 5.0 mA
Package Power Dissipation, Po (see note) ........................................................... 750 mW
Operating Temperature Range, TA .......................................................... -20°C to +85°C
Storage Temperature Range,T s ...............................•........................... -65°C to + 150°C
Note: Po is derated at the rate of 9.4 mW/'C above TA = + 70'C.

TYPICAL A-M/F-M STEREO RECEIVER
FOR AUTOMOTIVE APPLICATIONS

A-M TUNING

F-M MI X.II-F
F-M

R-F

ULN-2243A

F-M
OSC.
F-M TUNER _

I
I SIGNAL PROC
I
ULN-224OA
I

STEREO DECODE.
ULN-381OA
ULN-2245A

I

-.J

Dwq. :10. A-ll,020

6-16

ULN-2240A A-M/F-M SIGNAL PROCESSOR

ELECTRICAL CHARACTERISTICS at TA

=

+ 25°C, Vee

=

12.8 V

Limits
Test
Min.
Typ.
Max.
Pin
Test Conditions
8.5
12.8
16
10
No Signal
5.8
6
No Signal
6.4
13
2.0
13
.. = ±75 kHz, Vin = 10 mVrms, Non-Muted (unless otherwise speCified)
25
2
12
600
350
425
6
0.3
0.7
6
80
6
74
> 55
6
See Note
40
-1.0
6
V = 100 /.LV, max. mute
-45
Yin = 5.0 /LV, max. mute
Max. mute
Mute Bandwidth
6
100
Afw
No Signal
3.5
I-F Input Voltage
V,
2
No Signal
3.6
4.2
Mute Output Voltage
V
14
No Signal
4.2
4.8
5.5
AGC Output Voltage
15
VIS
0.5
Vln = 10 mVrms
No Signal
0.5
Mute Output Current
14
I"
Avail. AGC Output Current
No Signal
1.0
15
lis
26
40
Supply Current
No Signal
Icc
A-M MODE: f, = 1 MHz, fif = 455 kHz, fm = 400 Hz, 30% A-M, Vln = 1.0 mVrms (unless otherwise specified)
8.5
5.0
Sensitivity
18
Vou' = 50 mVrms
Vi
6.0
18
20 dB S+N/N
Usable Sensitivity
325
600
80% A-M
250
Recovered Audio
V,,,,
6
80% A-M, THD - 10%
25
50
Input Overload
18
Vi'
No Signal
1.0
A-M Decoupling Voltage
V
1
3.7
I-F 11'IJlUt Voltage
V
2
No SiRnal
0.5
Mute Output Voltage
V14
14
No Signal
0.5
No Signal
AGC Output Vpltage
V
15
1.8
2.1
No Signal
1.6
A-M Bias Voltage
17
VI7
16
30
No Signal
Supply CUrrent
Icc
Characteristic
Symbol
Operatin[ Voltage Range
Vee
Audio Output Voltage
V
Regulator Output Voltage
VREG
Avail. Reg. Output Current
IREG
F-M MODE: f, = 10.7 MHz, fm = 400 Hz, fd
Input Limiting Threshold
VIIt
Recovered Audio
V,,,,
Output Distortion
THD
Output Noise
S + NIN
A-M Rejection
AMR
AVou,
Mute

Units
V
V
V
rnA

Nole:
Vou' for 100% F·M Vin
Amplilude Modulalion Rejection is specified as 20 log Vou' for 30% A-M Vin

COIL WINDING INFORMATION
Tl

A-M I-F
455 kHz

au = 45
Ct = 1000 pF

General Instrument
Part No. EX 27765

Toko Pa rt No.
RXN-6A6909HM

T2

F-M Detector
10.7 MHz

au = 60
Ct = 82 pF

General Instrument
Part No. EX 27975

Toko Part No.
TKAC-17044Z

L1 A-M Oscillator
1455 kHz

au = 50
N1:N2 = 11:1
Ct = 39 pF

General Instrument
Part No. EX 27641

Toko Part No.
RWO-6A7640BM

L2 F-M Detector
10.7 MHz

L = 18 /LH
au = 55

Coilcraft Type V

6-17

c.

T]

1
[~
l1- T
J¥'.i.hO.A-IO.'12t1

/.LV
mV
%
dB
dB
dB
dB
kHz
V
V
V
V
rnA
rnA
rnA
/LV
/LV
mV
mV
V
V
V
V
V
rnA

ULN-2240A A-M!F-M SIGNAL PROCESSOR
SMALL-SIGNAL A-C CHARACTERISTICS at TA
Characteristic
I-F Input Capacitance
I.~F Output Resistance
H uutput capacitance
Audio Output Impedance
F-M MODE: f, - 10.7 MHz
I-F Input Resistance
I-F Iransconductance
Detector Input Resistance
uetector Input capacitance

Symbol
C2
R12
C12

R2

2
2-12

.

..

Test Conditions

2
12
12
6

Rll
cll
A·M MODE· f, = 1 MHz flf = 455 kHz
A-M Input Resistance
R18
. A-M Input (;apacltance
C18
Mixer Transcomluctance
gm
Mixer Output Resistance
R19
Mixer Output Capacitance
C19
I-F Input Resistance
R2
I-F Iransconductance
gm
Detector Input ReSistance
Rll
Detector Input Capacitance
Cll

.

Test
Pin

Z6

gm

+25°C

=

Min.

Typ.

-

6.0
250
2.5.
6.2

-

11

-

11

-

18
18
18-19
19
19
2
2-12

-

-

-

-

11
11

-

10
8.0
100
1.5
5.0
20
15
500
5.0
15
160
250
1.0

Limits
Max.
-

Units
pF

-

kf!

-

pF
kf!

-

kf!

-

-

mho'
kU
pt

-

kf!

-

pF
mmho*

-

-

kf!
pF

kf!
mmho'

-

kf!

-

pF

'The InternatIOnal ElectrotechOlcal CommiSSIOn recommends the use of siemens (S) as the standard international UOlt of conductance, admittance and
susceptance.

F-M IN

UQ.I---55

dB

I-F Input Voltage

VI
VIO

I

No Signal

-

3.5

-

10

No Signal
Vin = 10 mV rms

4.2

4.8

-

-

5.5
0.5

V
V

No Signal

1.0

-

-

rnA

No Signal

-

23

35

rnA

VOUI = 50 mV rm ,
20 dB S + N/N

-

5.0

8.5

IJ.V

6.0

-

325

550

IJ.V
mV
mV

V

AGC Output Voltage
Avail. AGC Output Current

110

Supply Current

lee

A·M MODE: f.

= I MHz, fK = 455 kHz, fm = 400 Hz, 30%

Sensitivity

Vin

Useable Sensitivity

10

13
13

Recovered Aud io

A·M, Vin

IJ.V
mV

V

..
= 1.0 mV... (unless otherwIse speCifIed)

5
13

80% A-M

250

Input Overload

VOUI
Vin

80% A-M, THD - 10%

25

50

A-M Decoupling Voltage

VI6

16

No Signal

1.0

I-F Input Voltage

VI

I

No Signal

3.7

-

AGC Output Voltage

10

No Signal

-

0.5

A-M Input Voltage

VIO
VI2

-

12

No Signal

1.6

1.8

2.1

V

Supply Current

Icc

No Signal

-

16

30

mA

Notes: I. Differential Audio Output is specified as 20 log

T2 F-M Detector
10.7 MHz

L1 A-M Oscillator
1455 kHz
l2 F-M Detector
10.7 MHz

V

V for 10 mV F-M V
oul

In

Vout for 1.0 mV A-M Vi'

2. Amplitude Modulation Rejection is specified as 20 log

T1 A-M I-F
455 kHz

V

V for 100% F-M V
oul
in
V'UI for 30% A·M Vin

COIL WINDING INFORMATION
General Instrument
Qu = 45
Ct = 1000 pF
Part No. EX 27765
General Instrument
Qu = 60
Ct = 82 pF
Part No. EX 27975
General Instrument
Qu = 50
NI:N2 = 11:1
Part No. EX 27641
Ct = 39 pF
General Instrument
l = 27 IJ.H
Qu = 55 @ 2.5 MHz
Part No. EX 27764

Taka Part No.
RXN-6A6909HM
Toko Part No.
TKAC-17044Z
Toko Part No.
RWO-6A7640BM
,)'/I\j.

Toko Part No.
154AO-7A6115HM

6-23

~O.

A_ 10.

~2g

ULN-2241A A-M/F-M SIGNAL PROCESSING SYSTEM

SMALL·SIGNAL A·C CHARACTERISTICS at TA - +25°C
Characteristic

Symbol

I·F Input Capacitance
I·F Output Capacitance

Cl
Rg
Cg

Audio Output Impedance

Z5

I·F Output Resistance

Test
Pin

Test Conditions

limits
Typ.

Min.

1
8
8
5

-

Max.

Units

-

pF

-

kQ

-

pF

-

6.0
250
2.5
860

-

Q

1
1·8
7
7

-

10
8.0
100
1.5

-

13
13
13-14
14
14
1
1-8
7
7

-

5.0
20
15
500
5.0
15
160
250
1.0

-

kQ

-

mmho'

-

kQ

'·M MODE: f • .,. 10.7 MHz

I·F Input Resistance

Rl

I·F Transconductance

gm

Detector Input Resistance
Detector Input Capacitance
A·M MODE: f. - 1 MHz, fN

=

R7
C7
455 kHz

A-M Input Resistance
A-M Input Capacitance

Rl3
Cl3

Mixer Transconductance

gm

Mixer Output Resistance
Mixer Output Capacitance
I-F Input Resistance

Rl4
Cl4
Rl

I-F Transconductance

gm

Detector Input Resistance
Detector Input Capacitance

R7
C7

.

-

kQ
mho'

kQ
pF

pF

-

pF

-

kQ

-

mmho'

kQ
pF

The InternatIOnal Electrotechnocal Commission recommends the use of siemens (S) as the standard international unot of conductance, admittance and
susceptance.
470

f-,,-;;;-=-_ _+---o~;,M

TEST CIRCUIT
A~~?o--7-----,~--.;vV'-t-l
vcco--~--------'~~I~~

~0.05
1I11G. MO.

PINK CORE

COLLECTOR

Filter Assembly:
Toko Part No. CFU455C-82BR

A.~

10. 718

BLACK CORE

-cr01;]--a:--

["i":H- I

-.15 - I
I

I
VCq2

I
I

I

NC~

______

-7":NC

I

I
I

81 BASE

I

I

J______ ~ _______ 381A5
':-

6-24

-UliO - I
I

':"

lroo\;,IIO.4-IO.ij29

ULN-2241A A-M/F-M SIGNAL PROCESSING SYSTEM

F-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
o

/~

RECOVERED AUDIO. V...

II

-10

'-M MODE
Od8·4UmY

-20

I

V

-30

,/

.........

OUTPUT NOI

-40

-50

.....

V

A-M REJECTION

/-..

-60

\
10

\

r r--.

TO -aDd

IK

100

INPUT VOLTAGE,

I

lOOK

10K

v.... IN flY

A-M CHARACTERISTICS
AS FUNCTIONS OF INPUT VOLTAGE
10

I IIIIIIII
RECOVERED AUDIO, V,ut

o

f.-

-10

/

-20

/

,

'\'
-30

~

-40

'\

-50

THD

\,

-

~

-60

10

IK

100
INPUT VOLTAGE, V1", IN JJV

6-25

---A-M MODE
o dB • 321mY

I

~II

,,)'

10K

II
lOOK

ULN-2241A A-M/F-M SIGNAL PROCESSING SYSTEM

AGC OUTPUT VOLTAGE
AS A FUNCTION OF INPUT VOLTAGE

S.O

,

Jl
f-M MODE

i\

4.0

>-

Gl

3.0

n

2-

%
'"

2.0

0

'~"

'"

1.0

0

~
100

10

lK

100 K

10K

INPUT VOLTAGE, V;"' IN ~V

O\llG.HO.A-tO,721

AVC VOLTAGE
AS A FUNCTION OF INPUT VOLTAGE

2, 0

--t"r-

I. 5

I, 0

~

-- r-I-

~

A

I"'---

0, 5

0

""'"

Ave VOLTAGE, V 12

A-M MODE

-0, 5
10

100

1K

INPUT VOLTAGE, V;"' IN ~V

6-26

IIII

10K
DlrI(;. ~(\,

lOOK
~-

10 72G

ULN-2242A1TDA1090
A-M/F-M SIGNAL PROCESSING SYSTEM

ULN-2242A1TDA 1090
A-M/F-M SIGNAL PROCESSING SYSTEM
FEATURES
•
•
•
•
•
•
•
•
•

Low External Parts Count
D-C A-M/F-M Switching
12 fLV Limiting Threshold
5 fLV A-M Sensitivity
Low Harmonic Distortion
Balanced A-M Mixer
Meter Drive
Internal Regulator
Self-Contained Muting (Squelch)

SIMPLIFICATION
of
SUBSTANTIAL
A-M/F-M receiver design is possible with Type

The use of an analog multiplier as a balanced
low-current mixer results in freedom from spurious
responses, high tweet rejection, low feedthrough
(I-F rejection), and low noise, as well as very low
local oscillator radiation.

ULN-2242A signal processing system with improved system performance and a minimal external
parts count. All F-M I-F functions and all A-M
functions are provided by this monolithic integrated
circuit.

Vee

I-F
BIAS

I-F
I-F
IN DECOUPLE

I-F DETECT
OUT
IN
MUTE ADJ.

A-II
DSC.

i(J6)

LOW-LEVEL
GROUND

A·II

IIIXER
OUT

MIXER
BIAS

AFC/METER

SUB

HIGH-LEVEL
GROUND

FUNCTIONAL BLOCK DIAGRAM

6-27

A·II
DECOUPLE

6

ULN-2242A1TDA1090
A-M/F-M SIGNAL PROCESSING SYSTEM

Although primarily intended for use in A-M
broadcast reception, the A-M mixer is also suitable
for use at long-wave or short-wave frequencies. Delayed AGC is available for use with an optional,
discrete R-F stage.
A fully-balanced, four-stage differential I-F
amplifier gives maximum gain with freedom from
common-mode signals. It is used in both the A-M
and F-M modes of operation with approximately
82 dB gain in the F-M mode and controlled AGC
gain of 26 to 82 dB in the A-M mode.
The detector in the F-M mode is a four-quadrant
analog multiplier operating in the high-level injection mode. Interference and noise are rejected. AFC
and meter-drive signals (pin 7) are generated for use
with any reference voltage between Vee and ground,
with AFC gain determined by the choice of load
resistor.
The mute and delayed AGC outputs provide d-c
voltages for control of signal-level-related functions.
Both detectors are biased to a no-signal value of

4.7 V and approach zero with increasing signal input.
In the A-M mode of operation, the detector is
configured as a balanced peak detector for low audio
distortion. A-M gain control is achieved with AVC
applied to the I-F and delayed AVC applied to the
mixer.
Switching between modes can be accomplished
with a simple single-pole d-c switch. The common
low-level audio output can be used to drive any
suitable audio power amplifier or stereo decoder
(Sprague Type ULN-3703Z and ULN-38 lOA, respectively).
Internal voltage regulators and bias supplies assure premium performance despite variations in external supply voltage (8.5 to 16 V) or temperature
(-20°C to +85°C). Separate ground leads minimize
possible decoupling problems.
Type ULN-2242A A-M/F-M signal processing
system is housed in a 20-pin dual in-line plastic
package. Parts are marked with the Sprague Electric
part number (ULN-2242A) unless the Pro-Electron
marking '(TDA1090) is requested.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................................... 18 V
Mute Input Voltage, Vs ............................................ 5.0 V
Package Power Dissipation, PD (see note) ............................ 750 mW
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts ........................... -65°C to + 150°C
Note: PD is derated at the rate of 9.4 mW/"C above TA = + 70"C.

6-28

ULN-2242AJTDA1090
A-M/F-M SIGNAL PROCESSING SYSTEM

ELECTRICAL CHARACTERISTICS at T,
Symbol
Vcc
Vs
VREG
IREG
10.7 MHz, fm = 400 Hz, fd

Characteristic
Operating Voltage Range
Audio Output Voltage
Regulator Output Voltage
Regulator Output Cu rrent
F-M MODE: f,

=

Input Limiting Threshold
Recovered Audio
Output Distortion
A- M Rejection
Mute

VTH
VOUj
THD
AMR
AV,m

AFC Output Voltage
I-F Input Voltage
Mute Output Voltage
AGC Output Voltage

Vale
V2
VI4
VIS

Mute Output Current
AGC Output Current
Supply Current
A-M MODE: f,

= 1MHz, fif =

Sensitivity
Usable Sensitivity
Recovered Audio
Input Overload
A-M Decoupling Voltage
I-F Input Voltage
Mute Output Voltage
AGC Output Voltage
A-M Input Voltage
Supply Current

114
115
Icc
455 kHz, fm
V
VOUj
Yin
VI
V2
VI4
VIS
V17
Icc

=

+25°C, Vee
Test
Pin
10
6
13
13

= ±75 kHz,
2
6
6
6
6

7
2
14
15
14
15

=

12.8 V

Test Conditions
No Signal
No Signal
VI.

Min.
8.5

-

2.0
= 10 mVrms, Non-Muted (unless otherwise specified)

-

12
425
0.3
>55

25
600
0.7

-

-

-1.0

-45
220

-

600

-

3.5
4.2
4.8

350
-

See Note
Yin = 100 p.V, max. mute
Yin = 5 p.V, max. mute
No
No
No
Yin
No
No
No

Signal
Signal
Signal
= 10 mVrms
Signal
Signal
Signal

40

3.6
4.2

0.5
1.0

-

= 400 Hz, 30% A-M, Vln = 1.0 mVrms (unless otherwise
18
18
6
18
1
2
14
15
17

Limits
Typ.
Max.
12.8
10
5.8
6.4
-

V". = 50 mVrms
20 dB SHIN
80% A-M
80% A-M, THD - 10%
No Signal
No Signal
No Signal
No Signal
No Signal
No Signal

Note:
V V for 100% F·M V·
Amplitude Modulation Rejection is specified as 20 log 016.;16. 0
In
VOUj or 30 Yo A·M Vin

6-29

-

250
25

-

-.

-

23

-

-

5.5
0.5

-

35

p.V
mV
%
dB
dB
dB
mV
V
V
V
V
rnA
rnA
rnA

specified)

5.0
6.0
325
50
1.0
3.7

-

-

-

-

1.6

1.8
16

-

-

Units
V
V
V
rnA

8.5

600

-

0.5
0.5
2.1
30

p.V
p.V
mV
mV
V
V
V
V
V
rnA

ULN-2242A1TDA 1090
A-M/F-M SIGNAL,PROCESSING SYSTEM

SMALL-SIGNAL A-C CHARACTERISTICS at TA = +25°C
Characteristic
Symbol
C2 .
H Input capacltanGe
I-F Output Resistance
RI2
I-F Output Capacitance
CI2
AuOio Output Impedance
Z6
F M MODE. f, = 10.7 MHz
I-F Input Resistance
R2
I-FTranscondu ctance
gm
uetector Input Keslstance
KII
Detector Input capacitance
Cll
A-M MODE: f, -1 MHz, fil - 455 kHz
A-M Input Resistance
Rls
A-M Input Capacitance
CIS
Mixer Transconductance
gm
Mixer Output Resistance
RI9
Mixer Output Capacitance
CI9
I-F Input ReSistance
R,
I-F Transconductance
gm
Detector Input Resistance
KII
Detector Input Capacitance
Cll

-

Test
Pin
2

Test Conditions

Min.
.-

-

12
12
b

Typ.

limits
Max.

6.0
250
2.5
860

-

-

Units
pF
kO
pf
0

2
2-12

-

10
18

-

-

-

11

-

kO
mho'

IOU

-

,kn

-

1.5

-

p~

-

5.0
20
. 15
500
5.0
15
300
250
1.0

-

kO
pF
mmho'
kO
pF
kO
mmho'
kO
pF

11
18
18
18-19
19
19

-

z
2-12
1!
1!

-

-

~

-

'The International Electrotechnical Commission recommends the use of siemens (S) as the standard international unit of conductance, admittance and
susceptance.

6-30

ULN-2242A1TDA1090
A-M!F-M SIGNAL PROCESSING SYSTEM

TEST CIRCUIT
ULN 2242A

~,

*:~:
LI
F- M IN o---+-iE-'''''''''-t--Q

0~7

U!!.J-_ _~I_-+_O A- M IN

AUDIO OUTo---+------

..J

~..J

6-38

M.1I0.A--IO.1l1IO

ULN-2249A A-M RADIO SYSTEM
. FOR AUTOMOTIVE APPLICATIONS

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ............................................... 18 V
Package Power Dissipation, Po ., ................................. 670 mW·
Operating Temperature Range, TA .......................... , -20°C to +85°C
Storage Temperature Range, Ts ........................... -65°C to +150°C
'Oerate at the rate of 8.3 mW/'C above TA = + 70'C.

ELECTRICAL CHARACTERISTICS at TA = +25°C, Vee = 13.5 V,
fm = 400 Hz, 30% A-M, Figure 2 (unless otherwise noted)
Characteristic
Quiescent Supply Current
Sensitivity
Detector Output Voltage
Output Distortion
Signal-to-Noise Ratio
AGC Ratio·

Symbol

fo

= 1 MHz, fil = 262.5 kHz,

Test Conditions

-

Figure 1
VOU! = 20 mV
Yin - 5.0 mV
Yin - 500 mV
Yin - 50 p.V
Yin = 20 mV

Icc
Yin

VB
THO
S+N/N

Limits
Typ.

Min.

Max.
6.0

50

-

-

-

0.4
30
63

-

-

26
60

Units

-

15
3.0

mA
p.V
mV
%
dB
dB

5.0

-

'AGe Ratio is defined as the ratio 01 the input voltages lor a reduction in output voltage 01 10 dB with the high level input as specified.

SMALL-SIGNAL A-C CHARACTERISTICS at TA = +25°C, Vee = 13.5 V,
fm = 400 Hz, 30% A-M, Vin "" 27 mVrms
Characteristic
R-F Input Impedance
R-F Output Impedance
R-F Transconductance
Cony. Input Impedance
Osc. Input Impedance
Cony. Output Impedance
Cony. Transconductance
Osc. Input Voltal!e
I-F Input Impedance
I-F Output Impedance
I-F Gain
Det. Input Impedance
Det. Output Impedance
Det. Gain

Symbol

ZI
ZIG

Test Conditions
Also, see note

gm

Z14
Z13
ZI2
gm
V"

fo

= 1 MHz,

Pin 14-12, V13 - 300 mVrms
Pin 13-12, V13 ::a 27 mVrms
For oDtimum cony. Derformance

Typ.

-

6.0
100
16
12
3.6
100
0.2
1.4

-

-

300

-

ZlO
Zs

-

Ae

-

ZG
Z

-

Ae

NOTE: For optimum noise match. source impedance should be 1.2 kD.

6-39

= 262.5 kHz,

Min.

-

f", = 1.262 MHz

fil

-

2.8
50
24
310
100
25

limits
Max.

-

-

Units

k!l
k!l
mmho

k!l
k!l
k!l

-

mmho
mmho
mVrms

-

k!l
!l

-

dB

-

!l
!l
dB

ULN-2249A A-M RADIO SYSTEM
FOR AUTOMOTIVE APPLICATIONS

TEST CIRCUITS
r-------·
II

T
60

I 'c.~~~~

7~ I

12Q..

...... I
I
I

120n

I
I

I
I
I

I
I
TUNE I

I
I

I
I
I

,
DUMMY

,

ANTENNA

I

"

3~'

S.H

Iq'OOO0.0'[

V;n~~1

1)\!iQ.1IO.A-IO,II39

SOn:

FIGURE 1

I

;30t4582

lK

...

...
FIGURE 2

COIL WINDING INFORMATION

T1 First I-F
262.5 kHz
T2 Second I-F
262.5 kHz

a = 80, a = 75
up

us

Nt:Np:Ns = 13:2.3:1
Ct = 150 pF
aup = 80, aus = 75
Nt:Np:Ns = 13:5.6: 1
Ct = 150 pF

6-40

Toko Part No.
BI24FCS-I013PYGI
BI24FCS-I014STB
Toko Part No.
BI24FCS-60001PYGI
BI24FCS-I014STB

ULN-2249A A-M RADIO SYSTEM
FOR AUTOMOTIVE APPLICATIONS

RECOVERED AUDIO, NOISE, AND DISTORTION
AS FUNCTIONS OF SIGNAL INPUT
+10

II

11111111
I 11111111
RECOVERED

-

0

'".......J
II>
<>
....
c

/

-10

~

I II
AUDIO

~
...J
....
>
....
...J

-20

V

....

~ -30

~

I

(.f)J

"'~

~

>E

"

"
}'

;::.!!'!.

"'''' '"

~ ~\~\

E

'"

"
>-

"
,;.-

~

~~

10

o

-100

-80

~

~

~

6-41

"
w

0

INTERFERING SIGNAL FREQUENcY,

~fis

I'

';t<"
~~

~

I'

+-

.I~(jl/

~~

'"

rr

(jl"'~

>

~

IN kHz

fo:= 1 MHz
V "" 500 tJV

I°1 I II
~

60

80
!)\'/ii.

h:l.

100
A~IO.9kj.G

ULN·3804A A-M/F-M SIGNAL PROCESSOR

ULN-3804A
A-M/F-M SIGNAL PROCESSOR
FEATURES
•
•
•
•
•
•
•
•

Good Sensitivity
Low Harmonic Distortion
Wide Operating Voltage Range
Excellent A-M Rejection
Low Power Drain
D-C A-MlF-M SWitching
30 ltV Limiting Threshold
16-Pin Dual In-Line Plastic Package

In the A-M mode of operation, Type ULN-3804A
provides all high-frequency circuitry, including
AGe and envelope peak detection, for a single-conversion superheterodyne broadcast or shortwave receiver. In the F-M mode, the signal processor
operates as a high-gain amplifier/limiter and phaseshift detector. A d-c switch is used to change modes.
A single external capacitor at pin 16 provides the
A-M AGe time constant, the F-M AFe time constant, and R-F decoupling.

DESIGNED for use in battery-powered portable
radios or line-driven table radios. Type ULN3804A works well in low-cost applications requiring
high performance with few external parts. An entire
A-M/F-M stereo receiver can be built with a Type
ULN-3804A, a Type ULN-3809A stereo decoder,
and two Type ULN-2283B audio amplifiers, for operation over a supply range of 4.5 to 12 V.
The signal processor includes the A-M oscillator
and mixer and the A-M/F-M I-F amplifier and detector from the popular radio system, Sprague Type
ULN-2204A. Radio designs using Type ULN-2204A
can be revised for greater power output or for stereo
operation (without reworking the printed wiring
board layout) by replacement of Type ULN-2204A
with Type ULN-3804A and addition of appropriate
stereo decoders and audio power amplifiers.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . .. 16 V
Package Power Dissipation, PD • • • • • • • • • • • • • • • • • 640 mW*
Operating Temperature Range, TA • • • • • • •• - 20°C to + 85°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C
*Derate at the rate of 8.0 mwre above TA = + 70 oe.

FUNCTIONAL BLOCK DIAGRAM
OSC.

A-M
I-F
OUT

I-F
IN

A-M GAIN ADJ.
AGC/AFC

I

R-F
DECOUPLE

LOW-LEVel I-F
I-F DETECTOR DETECTOR HIGH-LEVEL
GND DECOUP'LE OUT
IN
OUT
GROUND
OW9, No. A-l1,068

6-42

ULN·3804A A·M/F·M SIGNAL PROCESSOR

=

ELECTRICAL CHARACTERISTICS at TA + 25°C
Vee = 6.0 V, R. = 00, RI6 = 1.2 kn (unless otherwise noted)
Limits
Characteristic
F-M MODE: fo 10.7 MHz. fm
Input limiting Threshold
Detector Recovered Audio
Detector Output Distortion
A-M Rejection

=

Test Conditions

Quiescent Supply Current
A-M MODE: fo 1 MHz. f.
Sensitivity
Detector Recovered Audio
Overload Distortion
Usable Sensitivity
Mixer Input Impedence
Mixer Input Capacitance
Mixer Output Impedance
Mixer Output Capacitance
I-F Input Impedance
I-F Input Capacitance
Quiescent Terminal Voltage

=

Quiescent Supply Current

Max.

-

30
250
1.0

-

fLV
mV
%

-

kfl

= 400 Hz. fd = ± 75 kHz. Peak Separation = 550 kHz
V'h
Vo
THO
AMR

Yin

=

Yin

=
=

fam
I-F Input Impedance
I-F Input Capacitance
Quiescent Terminal Voltage

Min.

Typ.

10 mVrm•
10 mV",,, 30% A-M.
400 Hz

35

Z2

-

C2

-

VI
Va
Icc

-

50
40
4.0
2.1

60

-

1.7

-

-

10

15

-

-

5.0
150
10
25
4.5
5.5
25
3.0
100
3.0
1.3

-

1.7

-

3.8

-

dB
pF
V
V
rnA

= 455 kHz. fm = 400 Hz. 30% A-M
Maximum Volume

-

Vo

-

80%A-M
Zs

See Note

-

Cs
Z4

-

C4

-

Z2

-

C2
V
Va
Icc

NOTE: For oplimum noise match, source impedance should be 2.5 k!1.

6-43

10

-

fLV
mV
mV

35

fLV

-

kfl

-

pF

-

kfl
pF

kfl
pF
V
V
rnA

ULN·38'04A,' A·M/F·M SIGNAL PROCESSOR

TEST CIRCUIT
A-M

F-M IN

LWf---~r----"""'-~""""'vcc

"-M IN ~""""",---""H---,---i

COIL WINDING INFORMATION

DK>.IIO. A-10.310

T1 A-M First I-F
455 kHz

Qu = 120
N1:N2:N3 = 15.5:2.8:1
Ct = 180 pF

Generai Instrument
Part No. EX 27835

Toko Park No,
RMC-2A7641A

T2 A-M Second I-F
455 kHz

Qu = 70
N1:N2 = 2:1
Ct = 430 pF

General Instrument
Part No. EX 27836

Toko Part No.
RLE -4A7642GO

T3 F-M Detector
10.7 MHz
T4 F-M Detector
10.7 MHz

Qu = 50
Ct=100pF
Qu = 50
Ct = 100 pF

General Instrument
Part No. EX 27640
General Instrument
Part No. EX 27640

Toko Part No.
BKAC-K3651HM
Toko Part No.
BKAC-K3651HM

L1 A-M Oscillator
1455 kHz

Qu = 50
N1:N3 = 10.7:1
Ct = 39 pF

General Instrument
Part No. EX 27641

Toko Part No.
RWO-6A7640BM

6-44

ULN-3804A A-M/F-M SIGNAL PROCESSOR

Device Classification
and Design Considerations
The A-M/F-M receiver system's operation can be kept within tighter
performance limits by matching bias groupings and appropriate external
resistors (R8 and RI6). With proper matching of parts and lots, consistent
device performance can be obtained. The groupings, shown in the table
below, are based on A-M and F-M operation. There are three selections
for each mode and nine possible combinations:

PIN 16 OUTPUT VOLTAGE, VI6
A-M
Operation
l.40-1.75 V
l.65-2.00 V
l.90-2.25 V

Complete Part Number Including Suffix
F-M Operation
2.20-2.65 V
2.55-3.05 V
2.95-3.40 V
ULN-3804A-ll
ULN-3804A-21
ULN-3804A-31
ULN-3804A-12
ULN-3804A-22
ULN-3804A-32
ULN-3804A-33
ULN-3804A-13
ULN-3804A-23

Sprague recommends that customers not specify particular selections
except in unusual circumstances. All parts manufactured with the Sprague
part number will be marked with the complete number, including the appropriate suffix. In addition, anyone shipment to a customer will consist
ofa single selection (single suffix).
The first digit of the suffix (such as the "3" in "- 31") applies to F-M
performance. It indicates the F-M gain and pin 16 output voltage as functions of the pin 16 load resistance, as shown in the graph on the next page.
F-M circuit stability is inversely related to gain or sensitivity and is also
affected by source and loan impedances, decoupling, and printed wiring
board layout. After an optimal F-M I-F gain is determined for a particular
circuit design, the gain can be controlled with proper matching of the suffix
and the pin 16 load.

6-45

U.LN-3804A

A~M/F-M

SIGNAL PROCESSOR

Design Considerations (Continued)
In addition, certain system designs derive the F-M tuner supply, tuner
bias, or AFC voltage at pin 16 of Type ULN-3S04A. As an example, if the
tuner design requires 2.4 Vat 2.0 rnA (an equivalent R16 of 1200 il), Type
ULN-3S04A-lX is required. A -2X or -3X device can also be used by
paralleling the equivalent 1200 il tuner load with a fixed resistor to present
an S30 il load or a 520 il load.
For AFC applications, note that as the frequency is increased, the V ,6
voltage will decrease. The amount of change is a function of load impedance, detector coil characteristics, and part grouping.

TYPICAL F-M I-F GAIN CHARACTERISTICS
F·M GAIN (dB)

3.2

73

3.0

72

2.8

71

§ 2.6

70·

>

/
~~j
~ Y ~

~

2.4

69

2.2

-67

2.0

6A
100

~

~

r;:;,"'~

"'l'bf-.."C8

f7

~ oil
~.$'j ,,"

~

:>'"

k('~

J /

II

I /
200

300

500

V

I
I

800 lK 1.2K

2K

3K

R'6 IN OHMS
Dwg. No.

5K
A-l1.4~ll

Stability is seldom a problem with A-M operation. However, largesignal overload can be held to typically 30 m V by matching the particular
part group with an appropriate load resistor at pin S. The A-M grouping is
identified by the second digit ofthe part number suffix (such as the "2" in
"- 32").
For - Xl, RS should be an open circuit;
for - X2, RS should be 47 kil;
for - X3, RS should be 33 kil.
Additional loading may raise the overload point slightly, but AGe and
sensitivity will be compromised. For any fixed value ofRS, the - X3 parts
will exhibit slightly higher A-M gain, the - Xl parts slightly lower A-M
gain.

6-46

ULN-3809A PHASE-LOCKED LOOP STEREO DECODER

ULN-3809A PHASE-LOCKED LOOP STEREO DECODER
FEATURES
•
•
•
•
•
•
•
•
•
•

Unity Voltage Gain
11L and Ion Implant Technology
Wide Dyna mic Range
Low Distortion
Excellent Channel Separation
No Tuning Coils
Automatic Stereo/Mono Switching
Stereo Indicator Lamp Driver
Direct Replacement for MC 1309
14-Pin Dual In-Line Plastic Package

Type ULN-3809A phase-locked loop
SPRAGUE
decoder demodulates standard composite F-M
stereo input signals within the range of 0.25 to 1.7
Vpp without the use of tuning coils.
Integrated circuit design allows tuning with a
single resistive adjustment. The decoder automatically switches between stereo and monaural operation by detection and evaluation of the 19-kHz pilot
carrier signal.

Type ULN-3809A exhibits 35 dB suppression of
the 19-kHz pilot and 45 dB rejection of the regenerated 38-kHz sub carrier at demodulator output terminals. Stereo channel separation is typically 47 dB.
With a composite input signal of 850 mV, total harmonic distortion for the unit is typically 0.06%.
Type ULN-3809A is designed to work within a
range of supply voltages from 4.5 to 16 V.

,-----1(--: LOOP
t---K---~ FILTER

:--~---: veo

TUNE

t---lC---i

FUNCTIONAL
BLOCK DIAGRAM
38kHz

GROUND
Vee

6-47

owo.

~o

A-91t~IB

o

ULN-3809A PHASE-LOCKED LOOP STEREO DECODER

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................................... 16 V
Nominal Lamp Current, ILAMP ••••••••••••••••••••••••••••••••••••••• 50 rnA
Package Power Dissipation, Po ................................... 670 mW·
Operating Temperature Range, TA ........................... -20°C to +85°C
Storage, Temperature Range, Ts ........................... -65°C to + 150°C
-Derate at the rate of 8.3 mW/C above TA

=

+ lO·C.

ELECTRICAL CHARACTERISTICS at TA == +25°C, Vee = 9.0 V,
Vin = 1.7 Vpp, fm = 1.0 kHz (L or R only), Pilot Level = 10% unless otherwise specified
Characteristic
Max. Standard Composite Input Signal
Max. Monaural Input Signal
Input Impedance
Stereo Channel Separation

Monaural Gain
Channel Balance
Total Harmonic Distortion
Ultrasonic Frequency Rejection
SCA Rejection
Stereo Switch Level
Mono/Stereo Switch Transient
Capture Range
Supply Current

Test Conditions
Vee = 6.0 V, 0.5% THD
Vee = 9.0 V, 0.5% THD
Vee - 6.0 V, 1.0% THD
Vee = 9.0 V, 1.0% THD

Typ.

1.7

-

-

1.7

2.1

0.85

1.7

1.7

2.2
30
45
47
40
0.9
0
0.06
0.08
35
45
75
9.0
4.5
0
7.0
11

15
f=100Hz
f = 1.0 kHz
f = 10 kHz

30

0.6

Stereo, Yin = 850 mVpp
Mono, Yin = 850 mVpp
19 kHz
38 kHz

-

Lamp ON
Lamp OFF
No Lamp
Pilot = 60 mVrms

-

-

-

NOTE: THO and channel separation are measured after a bandpass filter (200 Hz to 10 kHz).

6-48

Umits
Max.

Min.
0.85

2.0
-

-

-

1.0

12

-

-

Units
Vpp
Vpp
Vpp
Vpp
ill
dB
dB
dB
VIV
dB
%
%
dB
dB
dB
mV
mV
mV
%
rnA

ULN-3809A PHASE-LOCKED LOOP STEREO DECODER

APPLICATIONS INFORMATION
R4
16K

0.05

5K

R5

COMPOSITE
INPUT

05
C4

ing C" and decreasing the value of C6 while
increasing the values of R. and R, (increases
capture-range and beat-note distortion).
2. Typical I -F amplifier frequency response restricts
channel separation to about 32 dB. This restriction can be counteracted by the network shown
below. Exact circuit values will be determined by
the I-F amplifier design.
FROM
DEMODULATOR

<10K

~

~~

0,001

Dwg. No. A-l1.460

27K

TEST CIRCUIT AND TYPICAL APPLICATION

D'l'G. MO. A-IO.6S6

3. To manually disable the stereo decoder, ground
pin 8 and connect pin 14 to ground through a
resistance of 3.3 kil.

1. If relaxed performance is acceptable, the external
circuit can be simplified by decreasing the value
of C 1 (reduces separation at low frequencies),
decreasing the values of C. and R3 while eliminat-

4. Capacitor C 6 should be temperature-stable
(NPO).

o
Vee

MINIMUM-COST APPLICATION
IN A-MiF-M STEREO RADIO

6-49

ULN-3810A PHASE-LOCKED LOOP STEREO DECODER

ULN-3810A
PHASE-LOCKED LOOP STEREO DECODER
FEATURES
•
•
•
•
•
•
•

No Tuning Coils Required
12L and Ion Implant Technology
Single-Adjustment Tuning
Automatic Stereo/Mono Switching
Stereo Ind icator Lamp Driver
Excellent SCA Rejection
Direct Replacement for TA7157, KB4409, CAI3IO,
XRI3IO, LMI3IO, SN76115, MCl3l0 & UlN-2110A
• I4-Pin Dual In-line Plastic Package

ABSOLUTE MAXIMUM RATINGS
of Ieft- and right-channel audio from
R ECOVERY
the standard F-M composite signal by this

Supply Voltage, Vee ........................... 16 V
Nominal Lamp Current,l LAMP ••••••' •••••••••••••• 75 mA
Package Power Dissipation, PD' ............... 670 mW*
Operating Temperature Range, TA ....... -20 c Cto +85°C
Storage, Temperature Range, Ts ......... -65°C to + 150°C

phase-locked loop decoder yields stereo channel
separation of 40 dB and total harmonic distortion of
less than 0.3%.
Type ULN-381OA is designed to operate over a
supply voltage range of 6 to 16 V.

·Derate at the rate of 8.3 mW/C above TA= +70°C.

i--+--"'\ vee

t--K---;

FUNCTIONAL
BLOCK DIAGRAM
38kHz

6-50

TLNE

ULN-3810A PHASE-LOCKED LOOP STEREO DECODER

=

=

ELECTRICAL CHARACTERISTICS at TA
+25°C, VCC
+12V,
Yin = 560mVrms (2.8V pp ),fm = 1.0 kHz (L or R only),
Pilot Level = 100 mVrms (10 %) unless otherwise specified
Limits
Characteristic

Test Conditions

Min.

Typ.

Max.

Units

Max.. Standard Composite Input Signal
Max. Monaurai Input Signal
Input Impedance
Stereo Channel Separation
Audio Output Voltage
Monaural Channel Balance
Total Harmonic Distortion
Ultrasonic Freqency
Rejection
SCA Rejection
Stereo Switch Level

THO = 0.5%
THO = 1.0%
Pin 2

2.8
2.8
20
30

-

-

Desired Channel
Pilot Level = 0 V

-

Vyp
Vpp
kQ
dB
mVrms
dB
%
dB
dB
dB
mVrms
mVrms
%
rnA

-

19 kHz
38 kHz
67 kHz, No Modulation, Measure 9 kHz Beat
Pilot Only, Lamp ON
Pilot Only, Lamp OFF
Permissible Tuning Error
Lamp OFF

Capture Range
Supply Current

-

-

5.0
-

25
40
485
<0.3
34.4
45
75
18
9.0
3.5
12

-

1.5
-

25
22

II

APPLICATION INFORMATION
and decreasing the value of C 6 while increasing the values of R4 and R5 (increases
capture-range and beat-note distortion).
2. Typical I-F amplifier frequency response
restricts channel separation to about 32 dB.
This restriction can be counteracted by the
network shown below. Exact circuit values
will be determined by the I-F amplifier
design.
FROM
DEMODU LAlOR
DWG.

~O.

A-94'12C

<10K

~

~~

0,001

27K

TEST CIRCUIT AND TYPICAL APPLICATION

DWG. MO. A-IO.656

3. To manually disable the stereo decoder,
ground pin 8 and connect pin 14 to ground
through a resistance of 3.3 kQ.

1. If relaxed performance is acceptable, the
external circuit can be simplified by
decreasing the value of C 1 (reduces separation at low frequencies), decreasing the
values of C4 and R3 while eliminating C 5 ,

4. Capacitor C 6 should be temperature stable
(NPO).

6--51

ULN-3812A PHASE-LOCKED LOOP STEREO DECODER

ULN-3812A PHASE-LOCKED LOOP STEREO DECODER
FEATURES
•
•
•
•
•
•
•
•

Internal Temperature Compensation
Single-Adjustment Tuning
Automatic Stereo/Mono Switching
Stereo Indicator Lamp Driver
70 dB SCA Rejection
Operating Voltage - 9 to 16 V
Low Harmonic Distortion
Replaces ULN-2245A, CA3145, ULN-2244A, p.A758,
LM1800, and MCI311
• 16-Pin Dual In-Line Plastic Package

only a single, non-critical resistive
R EQUIRING
tuning adjustment, the Type ULN-3812A inte-

eration is accomplished automatically by the presence of the pilot signal.
Low-impedance emitter-follower oUlputs and an
internal voltage regulator for increased stability
make Type ULN-3812A suitable for both lineoperated and aUWmotive applications. It is designed
to operate over a wide supply-voltage range and will
function with supplies as low as 9 V.
Type ULN-3812A is functionally and pin compatible with the Type ULN-2245A decoder and, except
for a reduced audio-oulput impedance;-is also interchangeable with Type ULN-2244A.

grated circuit derives left and right audio channels
from the standard composite stereo signal. This
phase-locked loop stereo decoder can also be used in
a number of subscription TV decoder schemes or in
various proposed TV stereo systems.
Using phase-lock techniques, the sub carrier (38
kHz for F-M stereo) is regenerated in phase with and
at exactly twice the frequency of the transmitted pilot
signal. Switching between monaural and stereo op-

,rHO:,

r......... ----i h
t-

LClOt'

---~ {o---.. FlLT'"

COMPOSITE
INPUT

FUNCTIONAL
BLOCK DIAGRAM

38kHz

DE-EMPHASIS
LEFT
RIGHT_,
OUTPUT OUTPUT ~ ~

.Jr~

1-

6-52

!Mg. No. A-908SE

ULN-3812A PHASE-LOCKED LOOP STEREO DECODER

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee (Continuous) ................................... +16 V
( <15s) ....................................... +22 V
Lamp Supply Voltage, VLPMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +22 V
Lamp Current, ILAMP • • • • • • • • • • • . • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 150 rnA
Output Current, 14 or 15 ..........................................• 10 rnA
Package Power Dissipation, PD • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 670 mW*
Operating Temperature Range, TA ........................... -20·C to +85OC
Storage Temperature Range, Ts ........................... -65OC to + 150·C
"Derate at the rate of B.3 mW/oC above TA =

+ 70°C.

ELECTRICAL CHARACTERISTICS at TA = + 25°C, Vee = + 12V, Composite Input = 300 mVrms (L = R, Pilot OFF),
Pilot Level = 30 mVrms, fm = 400 Hz or 1 kHz, unless otherwise specified.
Characteristic

Test Conditions

Min.

Input Imoedance
Output Impedance
Audio Voltage Gain
Stereo Channel Separation

Pin 2
Pin 4 or 5
Desired Channel
f,. - 100 Hz
fm = 400 Hz
fm - 10 kHz
Pilot Level = 0 V
Multiplex Level - 600 mV
19 kHz
38 kHz
67 kHz
Pilot Only, Lamp ON
Pilot Only, Lamp OFF
Pin 15
-20OC wg. No. A-ll.521

·See "Optimizing System Performance."

COIL WINDING INFORMATION

D\IG. MO. A-IO.330

Tl A-M First I-F
455 kHz

au = 120
N1:N2:N3 = 15.5:2.8:1
Ct = 180 pF

General Instrument
Part No. EX 27835

Toko Part No.
RMC-2A7641A

T2 A-M Second I-f
455 kHz

au = 70
N1:N2 = 2:1
Ct = 430 pF

General Instrument
Part No. EX 27836

Toko Part No.
RlE-4A7642GO

11 A-M Osci lIator
1455 kHz

au = 50
N1:N3 = 10.7:1
Ct = 39 pF

General Instrument
Part No. EX 27641

Toko Part No.
RWO-6A7640BM

6-57

ULN·3838A

A~M

RADIO SYSTEM

OPTIMIZING SYSTEM PERFORMANCE
priate suffix. Anyone customer shipment will consist of a single selection (single suffix).

Type ULN-3S3SA receiver system's performance
can be kept within tighter limits by matching the bias
group with an appropriate external resistor (RS).
With proper matching, consistent device performance between parts and lots can be obtained. The
bias groups, shown in the table are based on A-M
operation; three selections are possible.
VI6
1.40 - 1.75 V
1.65 - 2.00 V
1.90 - 2.25 V

In A-M operation, large-signal overload can be
optimized (to typically 30 mY) by matching the particular part group with an appropriate load resistor at
pin S. The group is identified by the part number
suffix (ULN-3S3SA-l).

Complete Part Number
ULN-3838A-1
ULN-3838A-2
ULN-3838A-3

Sprague recommends that customers not specify
particular selections except in unusual circumstances. All parts manufactured with Sprague part
number marking will be branded with the appro-

For -I, RS should be 00;
for -2, R8 should be 47 kil;
for -3, RS should be 33 kil.
Additional loading may rp.ise the overload point
slightly, but AGe and sensitivity will be compromised. For any fixed value ofRS, the -3 parts will
exhibit slightly higher A-M gain, while the -I parts
will have slightly lower A-M gain.

TYPICAL QUIESCENT SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE

TYPICAL AUDIO POWER OUTPUT
AS A FUNCTION OF SUPPLY VOLTAGE

20

2.0

6

2

4

,

,l

V

~

V

~
<{

V

II

1.6

THO = 10%
f=400Hz

~

,,?

1.2

V

0-'

20-

B

0.8

~~

ffi

~
2

6

8

10

12

0.4

o

SUPPLY VOLTAGE, Vee, IN VOLTS

RL = a...

I

~

~~~
o

4

Rl = 16..

RL = 32A

10

12

SUPPLY VOLTAGE,Vee, IN VOLTS

Owg. No. A-11.517

Owg. No. A-ll.518

6-58

ULN-3838A A-M RADIO SYSTEM

AUDIO AMPLIFIER
.
TOTAL HARMONIC DISTORTION
AS A FUNCTION OF OUTPUT POWER
AUDIO AMPLIFIER
WITH sn LOAD

10

.

>

>

M

>

'"

6

u

~

u"
>u

u
>u

:i:'

I

t--...
~
10 m

30

m

100 m
300 m
OJTPUT POWER, POUT' IN WATTS

RL - 8.rL
f

400 Hz

3,0

1,0

I

III

10

0\119. No. A-Il,519

AUDIO AMPLIFIER
WITH 16n LOAD

10

.

>

~'- - >

M

"U

...--.
10m

r-.1,1
30m

0-

"I:i

U

>u

>u

I

I

l/
100m

RL •

16~

f-400Hz

~
300m

OUTPUT POWER, POUTI IN WATTS

6-59

I,D

3,0
Dwg. No. A-ll.520

10

ULN-3838A A-M RADIO SYSTEM

TYPICAL APPLICATION
150K

+6V

.r
04

+

220

+

]20

140

/
/

/

.
A-M ANT

m::

::

L_______ .____ ./

L2

1K
,..-_--+-____
--'

)'-----------+

-=-

"Required only for Vcc = 9 v.
""I-F gain-dependent; see
"Optimizing System Performance."

OWG. NO. 8-1471

1_ .02

NOTE: Dress speaker wires as far as possible from antenna. 11 and 0.04 JLF speaker bypass capacitor may be
deleted, depending on speaker location.

COIL AND TRANSFORMER INFORMATION
L1

Audio Choke

10 IA-H, au = 2 @ 2.52 MHz,
3 turns through ferrite bead

L2

A-M Antenna Coil

au = 250, 110:10 turns ratio,
a2B core, 3.5" (90 mm) x 0.394" (10 mm) cf>

Tl

A-M Detector Coil

390 pF, au = 130 @ 455 kHz, 100 turns, center-tapped

T2

A-M Oscillator

T3

A-M I-F Transformer

460 IA-H, au = 120 @ 796 kHz, 110: 11 turns ratio
180 pF, au = 145 @ 455 kHz, 155:10 turns ratio,
primary tapped at 127 turns

6-60

ULN·3840A
HIGH·PERFORMANCE A·M/F·M SIGNAL PROCESSING SYSTEM

ULN-3840A HIGH-PERFORMANCE
A-M/F-M SIGNAL PROCESSING SYSTEM
FEATURES
•
•
•
•
•
•
•
•
•

12 fLV Limiting Threshold
Tuning-Error/Level Muting
Meter Drive
Balanced A-M Mixer
5 fLV A-M Sensitivity
D-C Mode Switching
Internal Voltage Regulator
Meets Dolby'" Noise Requirements
20-Pin Dual In-Line Plastic Package

IDEALLY SUITED FOR TOP-NOTCH A-M/F-M
radios, Type ULN-3840A provides sophisticated
operating features highly desired by the modern consumer at a price that allows it to be used in budget
receivers.

The A-M mixer is a balanced low-current analog
multiplier with very low local oscillator feedthrough, high I-F rejection, and freedom from
spurious responses. This mixer can be used in the
long-wave, medium-wave, and shortwave bands.

A combination of inter-station (signal-level) muting and off-channel (tuning-error) muting is useful in
signal-seeking or scanning applications. The circuit
design eliminates annoying low-frequency thump
and noise tail when the system is manually tuned
through a strong signal.

A fully-balanced, four-stage differential I-F amplifier gives maximum gain with freedom from common-mode signals. It is used in both the A-M and FM modes of operation with approximately 82 dB of
gain in the F-M mode and controlled AGC gain of
26 dB in the A-M mode.

Outputs are available for directly driving a peak
reading meter and a zero-tune meter. The peak
meter output also is useful in controlling external
system functions, such as blending multiplexers,
stereo decoders, noise blankers, or in providing positive-going AGC for the tuner.

The detector in the F-M mode is a four-quadrant
analog multiplier operating in the high-level injection mode. Common-mode signals are rejected
through the use of balanced current-mirror outputs.
In the A-M mode of operation, the detector is configured as a balanced peak detector for low audio
distortion. A-M gain control is achieved with A VC
applied to the I-F and delayed AVC applied to the
mixer.

All standard F-M I-F functions and all A-M functions are provided by this single monolithic integrated circuit. The low-level audio output stages
have been designed to meet stringent Dolby® noise
requirements.

(Continued next page)

®Registered Trademark, Dolby Laboratories, Inc.

6-61

ULN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

Switching between modes can be accomplished
with a simple single-pole d-c switch. The common
low-level audio output can be used to drive. an audio
power amplifier (Type ULN-3703Z) or stereo decoder (Type ULN-3810A).

Internal voltage regulators and bias supplies assure premium performance despite variations in external supply voltage (8.5 to 16 V) or temperature
( - 20°C to + 8S°C). Separate ground leads minimize
decoupling problems.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 18 V
Mute Input Voltage, Va ............................................ 5.0 V
Regulator Current, IREG ........................................... 5.0 rnA
Package Power Dissipation, PD • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 750 mW*
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts .............................. - 65°C to 150°C

*Oerated at 9.4 mW/oC above T,

=

+ 70°C.

FUNOIONAL BLOCK DIAGRAM
I-F
BIAS
. 4

MUTE ADJ.

I-F
OUT

I-F
DECOUPLE
>-.,----{.6
I-F IN

2

AU DI a
OUT

A-M OSC.
AVC~~--~-------~

A-M IN

LOW-LEVEL@
GROUND ,},

1

7

A-M
MIXER
OUT

MIXER
BIAS

p.
SUB.

T

YIGH-LEVH

1
A-M
DECOUPLE

GROUND

.DWG.NO. A-ll,261

6-62

UlN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

ELEaRICAl (HARAaERISTI(S atTA = + 25°(, Vee

= 12.8 V

Limits
Test
Characteristic
Symbol
Typ.
Pin
Test Conditions
Min.
Max.
Operating Voltage Range
8.5
12.8
10
16
Vcc
Audio Output Voltage
No Signal
6
5.8
Vs
Regulator Output Voltage
No Signal
VREG
13
6.4
Avail. Reg. Output Current
13
2.0
IREG
F-M MODE: fo = 10.7 MHz, fm = 400 Hz, f, = ± 75 kHz, Vin = 10 mVrms, Non-Muted (unless otherwise specified)
Input Limiting Threshold
VrH
2
12
25
Recovered Audio
6
350
425
600
Your
Output Distortion
THD
0.3
6
0.7
Output Noise
6
80
S + N/N
74
A-M Rejection
12
See Note
AMR
40
>55
-1.0
Mute
t:.Vout
6
Yin = 100 /J-V, Max. Mute
-45
Yin = 5.0 /J-V, Max. Mute
AFC Output Voltage
220
600
7
V",
I-F Input Voltage
No Signal
V2
2
3.5
Mute Output Voltage
V14
14
No Signal
4.2
3.6
No Signal
Mute Output Current
14
0.5
114
Supply Current
No Signal
23
35
Icc
A-M MODE: fo = 1 MHz, fll = 455 kHz, fm = 400 Hz, 30% A-M, Vln = 1.0 mVrms (unless otherwise specified)
Sensitivity
18
5.0
8.5
VOU! = 50 mVrms
Yin
Usable Sensitivity
18
6.0
20 dB S+ N/N
Recovered Audio
80% A-M
6
250
325
600
YOU!
Input Overload
18
80% A-M, THD = 10%
25
50
Yin
A-M Decoupling Voltage
No Signal
1
1.0
VI
I-F Input Voltage
No Signal
V2
2
3.7
Mute Output Voltage
14
No Signal
VI4
0.5
No Signal
Peak Meter
V15
15
<0.5
Yin = 10 mV
3.0
A-M Input Voltage
No Signal
V17
17
1.6
1.8
2.1
Supply Current
No Signal
16
30
Icc
. d M d I ' R' . .
'f' d 20 I V,"' for 100% F-M Vin
Nole: Amplltu
e 0 u atlOn ejectIOn IS speci Ie as
og V,", for 30% A-M Vin

6-63

Units
V
V
V
mA
/J-V
mV

%
dB
dB
dB
dB
mV
V
V
mA
mA
fLV
fLV
mV
mV
V
V
V
V
V
V
mA

ULN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

SMALL-SIGNAL A-C CHARAOERISTICS at TA

= + 25°C
Limits

Test
Pin

Characteristic
Symbol
I-F Input Capacitance
C2
I-F Output Resistance
RI2
I-F Output Capacitance
CI2
Audio Output Impedance
Zs
F-M MODE: fa 10.7 MHz
I-F Input Resistance
R2
I-F Transconductance
gm
Detector Input Resistance
RII
Detector Input Capacitance
CII
A-M MODE: fa = 1 MHz, fn = 455 kHz
A-M Input Resistance
Ris
A-M Input Capacitance
CIS
Mixer Transconductance
gm
Mixer Output Resistance
Rig
Mixer Output Capacitance
Clg
I-F Input Resistance
R2
I-F Transconductance
gm
Detector Input Resistance
RII
Detector Input Capacitance
CII

Test Conditions

Min.

Typ.

Max.

-

6.0
250
2.5
350

-

Units
pF

-

kll

2
12
12
6

=

-

-

2
2-12
11
11

-

10
8.0
100
1.5

-

-

18
18
18-19
19
19
2
2-12
11
11

-

5.0
20
15
500
5.0
15
160
250
1.0

-

-

-

-

-

pF

-

kll

-

kll

-

mho*

-

kll

-

pF

-

kll

-

pF
mmho*

-

kll

-

pF

-

kll

-

mmho*

-

kll

-

pF

*The International Electrotechnical Commission recommends the use of siemens (S) as the standard international unit of conductance, admittance
and susceptance.

F-M TUNING-ERROR DETECTOR RESPONSE
6. 0

...............

§>

4.0

~
;;

;;

:g
~

o

...>

~

2. 0

:J

o
~

:J

:::;

0
-200

I

1\
\
-100

~

/

\
\
\

I

F-/Ii MODE

I

J

I

CHANGE IN FREQUENCY. 61". IN kHz

6-64

+200

'100
ilW.i,[IO ..... I0791

ULN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

TEST CIRCUIT

___ ...J

L1

F-M IN

0.47
~J--_--ll---+-{)

AUDIO OUT

A-M IN

A-M/F-M

o--j-----+-JVV"::-!

L~j--+-+----1--o LEVEL DET.

OUT

500K
MUTE
Dwg. No. A-1I,262

*In application, R = on, C = 0.008 ~F for 50 ~s de-emphasis (Europe) or 0.012 ~F for 75 ~S de-emphasis (U.S.A.)
Filter Assembly:
Toko Part No. CFU455C·82BR
PINK CORE

COLLECT:'

C(12
I
I
NC

-7 --

BLACK CQRf

!~:B- - -cr-O
-U;lOl J----fE- - - ~ NC
I
I
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I
I
I

81eAS{

I

I
J ______ ~ _______ ~IBIAS

-=-

-::-

D....

~o

t·IO '<19

COIL WINDING INFORMATION

T1 A-M I-F
455 kHz

au = 45
Ct = 1000 pF

General Instrument
Part No. EX 27765

Toko Part No.
RXN-6A6909HM

T2 F-M Detector
10.7 MHz

= 60
= 82 pF
au = 50
Nl:N2 = 11:1
Ct = 39 pF
L = 18 f.'.H
au = 55 @ 2.5 MHz

General Instrument
Part No. EX 27975

Toko Part No.
TKAC-17044Z

General Instrument
Part No. EX 27641

Toko Part No.
RWO-6A7640BM

L1 A-M Oscillator
1455 kHz
L2 F-M Detector
10.7 MHz

au
Ct

Coilcraft
Type V

6-65

ULN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

A-M CONTROL VOLTAGES AS FUNCTIONS OF INPUT SIGNAL
3.5

V

3.0

V

2.5

........ f.-'

LEVEL DETECTOR
OUT, V,5

~i-'

V
1/

20

V

~t""'1'"
1.5

Y

10

0.5

/

/

V
IIA-M MODEj

~
~

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~C VOLTAGE, V17

-

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1

10

10K

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100

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Dwg.

No. B-1465

F-M CONTROL VOLTAGES AS FUNCTIONS OF INPUT SIGNAL

6.0

I-5.0

I

Vee ~ 1~.8V

TA=+25C

r--i'

LEvlL DlTECL,

MUTE OUT,
V,4

0

V
\

10 0

l .....

10

V""

OUT, Vl 5

2, 0

0

~j.oo

I

4. 0

~

V

~

~~

f-"""
100

lK

INPUT VOLTAGE, V;o' IN ~v

6-66

1OK

lOOK
Dwg.No. A-l1,263A

ULN-3840A
HIGH-PERFORMANCE A-M/F-M SIGNAL PROCESSING SYSTEM

A-M CHARACTERISTICS AS FUNCTIONS OF INPUT SIGNAL
10

I I IIIIIII

II

RECOVERED

....-

o

....

f-'

/~

-10

/

-20

/'

""

-30

-40

1/

0,
"-

......-

THO

,~

A-M MODE
dB • 325mV

I'

o
S+N

~ I--I

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f.--- r-

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-50

-60

AUDIO, You,

II

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100

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INPUT VOLTAGE, V;"' IN ~V

F-M CHARACTERISTICS AS FUNCTIONS OF INPUT SIGNAL
o

/'"

",.

RECOVERED

AUDIO, You,

-10
F-M

MODE

o dB-20

-30

425mV

V

V

V

...........

OUTPUT NOISE

-40

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\1\

:"I
-50

~

J

A-M REJECTION

/"i"'

-60

\
10

100

V

"-

:"I

r

......... ~

TO -BOdS

INPUT VOlTAGE, V,"' IN

6-67

IK
~V

10K

lOOK
0'fI!J. MO.

B-13~8A

UlN-3859A F-M COMMUNICATIONS I-F SYSTEM

ULN-3859A
F-M COMMUNICATIONS I-F SYSTEM

FEATURES
•
•
•
•
•
•

Dual Conversion
low Current Drain
Wide Operating Voltage Range
High Sensitivity
Replaces MC3359P
18-Pin Dual In-Line Plastic Package

a high gain stage with excellent common-mode
rejection.

THIS low-power, narrow-band F-M I-F system
provides the second converter, second I-F,
demodulator and squelch circuitry for communications and scanning .receivers.

Audio is recovered by a quadrature F-M
detector that requires only a single low-cost
tuned circuit.

Type ULN-3859A's double-balanced mixer
permits low-noise operation while eliminating
spurious responses, effectively rejecting tweet
and I-F feedthrough, and reducing local
oscillator radiation. The mixer's high input impedance matches popular 10.7 MHz crystal
filters while its output impedance matches most
455 kHz ceramic filters. Although designed for
use with a 10.7 MHz first I-F and a 455 kHz
second I-F, the mixer operates at other R-F or
I-F input frequencies through 30 MHz.

Type ULN-3859A has both a low-impedance
emitter-follower audio output and an AFC output. Few external components are needed for
operation with noise-activated or tone squelch.
This communications I-F system meets the
stability requirements of many automotive applications, and also meets the low-power
demands of portable radio design. Internal
voltage regulators and bias supplies ensure stable
performance despite variations in external
supply voltage (4 to 9 V) or temperature (-20°C
to +85°C).

A multi-stage 1 MHz differential amplifier/
limiter following the second I-F filter operates as

6-68

ULN-3859A F-M COMMUNICATIONS I-F SYSTEM

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12 V
Mixer Terminal Voltage, Vin •••••••••••••••••••••••••••••••••••••• 1.0 Vrms
Mute Terminal Voltage Range, VI6 ••.••••••.•••••••••••••••••• - 0.5 Vto + 12 V
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. -20°C to + 85°C
Storage Temperature Range, Ts ............................ - 65°C to + 150°C

=

=

ELECTRICAL CHAUCTERISTIQ at TA
+25°C, Vee
8.0 V,
fo = 10.7 MHz, fm = 1.0 kHz, fd = ± 3.0 kHz (unless otherwise noted)

Characteristic

Test
Pin

Operating Voltage Range
Quiescent Supply Current

4
4

Input limiting Threshold
Mixer Conversion Gain
Mixer Input Resistance
Mixer Input Capacitance
Mixer Output Impedance
limiter Input Impedance
Quiescent D·C Output Voltage
Audio Output Impedance
Recovered Audio Output
Amplifier Gain
Quiescent D·C Output Voltage
Mute Switch Resistance
Scan Source Current

18
3
18
18
3
5
10
10
10
13
13
16
15

Test Conditions
VI 4 = 0, Mute OFF
VI42:0.7 V, Mute ON
-3 dB limiting
See Note 1, Next Page

Typ.

4.0

8.0
3.0
4.0
2.0
24
3.6
2.2

9.0
6.0
7.0
6.0

-

pF

1.8

-

kQ

-

See Note 2, Next Page

Yin = 0

-

2.4

Yin = 3.0 mV
f = 4.0 kHz, Yin = 5.0 mV
Yin = 0
116 = 2.5 rnA, VI42:0.7 V
VI4 = VIS = 0, Mute OFF

6-69

Limits
Max.

Min.

450
40

2.0

1.8
3.6
500
7ilo
53

1.7
4.0
4.0

-

Units
V
rnA
rnA
IAV
dB
kQ

kQ

4.4

V

-

Q

-

mV,ms
dB
V

-

-

10

Q

rnA

D

UlN-3859A F-M COMMUNICATIONS I-F SYSTEM

TEST CIRCUIT

I--~-<> I-F INPUT

1------<>

MUTE

1------<>

SCAN CONTROL

}-----o

SQUELCH INPUT

I--~---<> AMPLIFIER OUTPUT

L----fT21--4---<>

AMPLIFIER INPUT

1----._-<>

AFC OUTPUT

I----+--<>

AUDIO OUTPUT

100K
100K
Dwg. No.A-l1,372

APPLICATION INFORMATION
1. In a typical application, with a 3.6 kQ crystal filter source,
Type ULN-3859A will give 23 dB conversion gain.

2. Because crystal filters are extremely sensitive to reactive
loading, radio designers frequently have added a coil and/or
capacitor at pin 18 to cancel the input reactance component. This
practice is not required with· Type ULN-3859A, since its input is
designed to match typical 10.7 MHz crystal filters. However, if an
external reactive component is used, it is important to adjust it for
optimal passband shape and not simply to peak it for maximum
sensitivity.
3. Pin 11 provides AFC. If AFC is not required, pin 11 should be
grounded, or tied to pin 9 to double the available recovered audio.
4. Pin 10 may require an external resistor (2 kQ minimum) to
ground to prevent audio rectification with some capacitive loads.

6-70

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

ULN-2204A A-M/F-M RECEIVER SYSTEM
-TYPICAL APPLICATIONS AND OPERATION
of peak-to-peak voltage swings approaching the
available supply. To meet these performance objectives a new power amplifier design was required having no more than one VBE of swing restriction.
As shown in Figure 1, the output stage is comprised of 2 NPN transistors (Q42 and Q49) plus a
phase inverter (Q54). Quiescent operating current is
set up by the current source (I).

Introduction

Through the relatively short history of bipolar
monolithic circuits, several revolutionary new circuits have been developed for a-mlf-m receiver design. A. Bilotti pioneered the original monolithic
f-m quadrature detector/l-F gainblock in the form
ofthe Sprague ULN-2111A.
Subsequent devices have included gain-control
stages, output drivers, and voltage regulators. During this same period a-m integrated circuitry showed
far less inspiration. Numerous a-m circuits were developed which in essence attempted to combine the
active elements of a discrete bipolar a-m receiver in
a monolithic circuit. To no surprise, the resulting
chips were at best capable of performance no better
than the parent discrete design, and with the uneconomical displacement of three discrete transistors
with one integrated circuit. In addition to the a-monly circuits and f-m-only circuits, a-m/f-m circuits
were also attempted using the same design approaches used for the a-m only circuit, that of combining an existing discrete receiver circuitry in a
monolithic device. The results were much like the
a-m only efforts, a bewildering collection of economically unattractive circuits of modest performance.
To achieve useful cost and performance objectives, the ULN-2204A was designed with careful attention to the cost and performance objectives of
the modem portable and table model broadcast
receiver. Concern for low external component
count, low power consumption, wide supply voltage
range, and versatility remained foremost as design
objectives.

'1d
DWG.IIO.

~IO.628

Figure 1

Assuming VOq = VCCI2 then the collector current
of Q54 = I, ignoring base currents, and if Q54 is
matched to Q49 as is possible in a monolithic circuit,
then the collector current ofQ49 equals the collector
current of Q54. The circuit in Figure 1 achieves an
excellent voltage swing capability of Vcc - V Be 2VCE(SAT). This totally NPN configuration also has
good freedom from the high-frequency problems
that often occur with quasi-complementary composite NPN-PNP configurations.

Power Amplifier

To achieve the desired performance objectives of
high power output and efficiency from a 2 to 12 V
supply requires that the power amplifier be capable

6-71

D

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Although the circuit in Figure 1 has been incorporated in production monolithic circuits in essentially the form shown, in practice it has unacceptable design restrictions. Since I is also the base drive
current for Q42, the ratio of available base drive
current I to idling current is proportional to the ratio
of the emitter areas of Q49 to QS4. For practical
values of IQS4/1Q49, i.e. one, the circuit has a
serious implementation problem; it requires three
output transistors (Q42, Q49, and QS4).
To reduce the size of QS4, an additional transistor
(Q48) is added to the circuit as shown in Figure 2.
Transistor Q48 divides I by its beta + 1 allowing QS4
to be reduced in area by a similar value. In the practical realization of the ULN-2204A, QS4 is chosen as
liS the emitter area of Q49 with a typical beta for
Q480f6.
DI"I... NC.

~-

10. t2{.

Figure 3

capacitor. Overall negative feedback, set by the ratio
of R33 to R32, is applied to the inverting input Q4S
through an NPN emitter follower (Q46) which also
provides d-c level shifting.

25
R32

7K
R41

J--+--~~~¥-~--~~~6~

DW(j.1I0.A-1O.62,)

3.9K
.33

. . , ) - - t - - - - t - - TO

FIgure 2

Figure 3 illustrates other refinements in the practical realization of the output circuit. The drive and
idling current I is derived from a VCC dependent
source allowing maximum drive under maximum
supply conditions while affording reduced drive and
associated current conservation under minimum
supply conditions. In addition, the Q48 divider circuit is refined to reduce PNP beta dependence.
Finally with the addition of an input emitter follower
(QS3) and a local negative feedback loop (R36), the
output is completed as it appears in the ULN-2204A.
The input stage of the power amplifier (Figure 4) is
comprised of a PNP differential pair (Q44 and Q4S)
preceded by a PN'" Amitter follower (Q43) which
allows d-c referencin!; _ .he source signal to ground.
This eliminates the need fOf an input coupling

NEXT

DWG. KO. -,,"10,6771.

Figure 4

The VCCI2 output tracking is achieved by summing the current flow through R33 and R32, with the
current through R41 "reflected off of ground".
Thus VCC/2 tracking is maintained by the voltage
drop across 2 resistors. This allows the current from
R41 to be bypassed at Pin 10, thereby combining the
ripple bypass capacitor with the audio feedback
capacitor.

6-72

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Figure 5 illustrates the complete power amplifier as
realized in the ULN-2204A, including the external
components. The remarkably-low external component count, (only two capacitors including the
output coupling) reflects concern for simplicity in
implementation, yet the device achieves excellent performance. Typical output power can be as high as
850 mW from a 9 volt supply and useful output
power at supply voltages of as low as 2 volts, with
minimum of distortion as the curves in Figure 6
illustrate.

1.2

1.0

~

.r

THD=IO%

II ' , '

"'~,

;<

!

!

.--,

,
,

0.2

""

,"?-~

'~Q

"r"

o

o

10

12

SUPPLY VOLTAGE, Vee IN VOLTS
U'I/G.NO.A-IO.63l1-

Figure 6

r-------~------------~--------~----~----------~~13
VCCVREG

10
210

50

50

VOLUME

~--~-4--~~-+----~---+--~--r-----~-+--~--------~--{111~----4
HIGH LEVEL
GROUND
Dt'G IW.

FigureS

6--73

8-1379A

14

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Receiver

For a-m the gain is lowered by reducing stage
current. This is accomplished by reducing the
current applied to the I-F amplifier by the current
source Q17. The fifth I-F stage (Q9 and QIO) is
operated at maximum gain and current to provide
full signal to the a-m and f-m detector.

The a-m signal is processed from the antenna to
the detector output via the traditional blocks of
mixer, I-F, and detector enclosed in a reverse A-G-C
loop. However, closer examination reveals certain
very important advantages that can be afforded only
by the monolithic design.
The a-m mixer is a fully-balanced mixer based on a
four-quadrant mUltiplier as shown in Figure 7. This
affords rejection of both the oscillator and input
signal as observed at the output. In addition, an
analog mUltiplier is (as the name implies) a true linear
device. Balanced operation of the mixer provides
typically 25 dB of I-F rejection at the input, with a
similar rejection of the associated noise passband.
Also, the linear operation of the circuit affords good
freedom from intermodulation product responses.

A-M/F-M Detector

The detector is also a combination circuit. It
recovers a-m audio by peak detection and f-m audio
by phase discrimination.
The a-m signal from the I-F output appears at Pin
15 across T2 as shown in Figure 9. The signal is applied to the base of Q18 and after phase inversion by
T2 is applied also to the base of Q19. Full wave
detection occurs at the emitter of Q18 and Q19,
utilizing the on-chip junction capacity for integration. This requires only that the stage current be
chosen at a low value (typically 1 J.IA) to produce the
desired integration.

I-F gain is provided for both a-m and f-m by a
common I-F amplifier (Figure 8) using "stacked"
selectivity. In f-m operation the gain of stages 1, 2,
3, and 4 (Ql thru Q8) is set at typically 76 dB
providing a typical limiting threshold of 40 JAV.

The f-m detection process relies on the
phase/frequency relationship of a tuned external circuit for demodulation. The device converts phase

750
DWG.HO. A·IO.611

Figure 7

6-74

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)
voltage which appears at Pin 8, the detector audio
output. Figure 11 illustrates the complete a-m If-m
detector of the ULN-2204A, including the external
components.

variation, as obseIVed across the tuned network, to a
proportional voltage. The basic phase detection
process combines the positive-going portions of the
quadrature and reference signals (Pin 14 and 15,
respectively), and evaluating the duty cycle of the
resulting waveform as shown in Figure 10. The combining action occurs at the emitters of Q 18 and Q 19
resulting in the waveform shown. Subsequent processing involves squaring up the signal in a limiter,
comprised of Q24 and Q27, resulting in the
constant-amplitude plus train which is also shown.
This pulse train is then applied to a PNP gain stage
which, owing to the PNP's low fT of typically
1 MHz, integrates the pulse train into an average d-c

To complete the circuit, the a-m stages also require A-G-C. This is implemented in the ULN2204A by internally setting the J-F supply voltage
(Pin 16) equal to the voltage at the detector audio
output. As carrier appears, a corresponding reduction in the d-c voltage occurs at the audio output
terminal and at Pin 16, where an external bypass
capacitor removes audio from the A-G-C line and
sets the time constant.

A-M GAIN ADJUST

15 I-F
OUT

AGC/AFC

{)'j,'(j.NO. B--IJ76

Figure I

Figure 9

Figure 10

6-75

RADIOICOMMUNICATIONS INTEGRATED CIRCUITS (Continued)

r------~-t--Ir-1--r__-----1----t"----_{l13

Vee / VREG.

lK

1.25K

~UME

+1.2V REF.

FROM

A-M

190

PIN 1

Figure 11

selected to provide the desired low-frequency cutoff
with the chosen speaker impedance. The feedback
and ripple bypass capacitor at Pin 10 should be
chosen for both low-frequency audio rolloff and
supply ripple rejection.

Application

The primary application, but certainly not the only
application, for the ULN-2204A is the broadcast
band a-m/f-m table or portable radio as illustrated in
Figure 12.
Power Amplifier

Ripple rejection is not practical to calculate due to
the large number of mechanisms involved. The 220
,.u; capacitor indicated in Figure 12 achieves typically
35 dB rejection.

Selection of power supply voltage and speaker impedance allow the designer to choose audio power
levels up to almost I watt as the curves in Figure 6
illustrated. No unique precautions are necessary
when designing with the ULN-2204A power amplifier. The device is stable and short-circuit immune.

The high gain of typically 43 dB and the high input
impedance (200 kQ) of the power amplifier allow
utilization of this stage for other applications such as
ceramic cartridge phono amplifiers.

External component choice for the power amplifier involves only two capacitors; one for the
speaker coupling and one for the feedback and ripple
by-passing. The coupling capacitor value should be

Typical ceramic phono cartridges develop approximately 400 mY. However, the recommended

6-76

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

load impedance for the most economical cartridges is
usually 1 MQ. This poses no problem with the
200 kQ input impedance of the ULN-2204A since the
cartridge manufacturer specifies the load impedance
for full low-frequency response to less than 40 Hz.
Decreasing the load impedance produces an increased low end cutoff frequency.

The ULN-2204A also provides a regulated and
decoupled doc bias voltage to be used as the VCC
supply for the tuner head. This bias voltage is obtained at Pin 16 and provides typically 2.5 mAo
The current drain loads Pin 16 significantly and must
appear for Pin 16 to operate at the correct voltage of
2.2 V. The voltage at Pin 16 determines the gain of
the f-m intermediate frequency with higher values
producing increased gain. The voltage at Pin 16 also
varies with the voltage at Pin 8 (the detector output
voltage), and therefore applies some A-F-C to the
tuner head through the oscillators' VCC supply.

In a ULN-2204A based application employing a
cost and space conscious loudspeaker, 40 Hz
program material capability is not only unnecessary
but undesirable, and therefore a mismatch of the cartridge to increase the lower cutoff frequency to a
value more in keeping with the other components of
the system is recommended.
The ULN-2204A audio amplifier stage has other
input considerations to be taken into account for best
results. The input is referenced to ground for internal biasing and must be provided with a doc path to
ground. A current of typically 0.1 lolA flows from Pin
9 through the volume control producing an IR drop
which is multiplied by the closed loop doc gain of the
amplifier (1), and appears as an error in output centering at Pin 12. This recommends a value of 200 kQ
or less for the volume control, with values of less
than l00kQ preferred.
The selection of power amplifier load impedance
involves more consideration than just the desired
power output. Ideally an 8Q speaker impedance
would produce the highest power outputs for anyone
supply voltage as the curves in Figure 6 illustrated.
However, operation with a 16Q load can produce as
much power as with an 8Q load as is also shown in
Figure 6. The higher impedance load will also furnish a significant reduction in harmonic distortion
and improvement in overall repeatability in power
output capacity. In applications which allow the
selection of the power supply voltage it is therefore
recommended that a l6Q load impedance be utilized
in applications up to 0.7S watt. For applications
having fixed power supply values, i.e. batteries,
device selections can be had that produce the
maximum power level into 8Q.

As described earlier, the f-m detector is a phase
detector which detects the phase shift of an external
network appearing between Pin 14 and Pin 15. The
preferred network is a double-tuned transformer as
shown in Figure 10. This network is selected to
provide the correct recovered audio and minimum
distortion by choosing the loaded and coupled
"Q"s. In Figure 12, T3 (the primary) and T. (the
secondary) are loaded by resistors of 2.2 kil and
4.7 kil, respectively, and top coupled by a 4.7 pF
capacitor giving an S curve peak to peak separation
of 400 kHz. Coupling factor (Qk) is slightly greater
than 1 to improve harmonic distortion. The
bandwidth has been selected to place the carrier of an
adjacent channel interfering station (standard f-m
broadcasting) on the peaks of the S curve, thereby
improving selectivity. Using the circuitry shown, a
typical recovered audio value of 250 millivolts at Pin
8 and total harmonic distortion value of 0.7 percent
are achieved with 7S kHz deviation. It should be
noted that the network, particularly the coupling
capacitor value, is affected by layout and may require optimization for a particular application. Extremely high values of coupling factor should be
avoided as this produces an undesirable voltage gain
from Pin 15 to Pin 14 which manifests itself as S
curve inbalance at low signal levels.
The f-m de-emphasis is formed by the 0.01 ~
capacitor connected at Pin 8 with an internal 7.S kQ
resistor.

Receiver Section - F·M

Receiver Section - A·M

The f-m intermediate frequency input transformer,
comprised of TS and T6, provides both selectivity
and coupling. TS should present a source impedance
to the device of approximately SOOQ for optimal
stability. T6, the primary, is governed primarily by
the characteristics of the tuner head feeding it, and
should be selected for those considerations. TS and
T6 comprise a double tuned section which for
monaural f-m should have a bandwidth of ISO kHz.

The a-m section requires two external coils for I-F
matching and selectivity, plus the local oscillator coil.
The a-m detector transformer (T2) and mixer load
coil (Tl) are stacked with the corresponding f-m
components to form the composite. The selection of
bandwidth for the two-coil system shown in Figure
12 is restricted primarily by the practical coil Qs
available. The unloaded Q of the first transformer
(Tl) being selected as 120 and loaded to ap-

6-77

6

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

113r-----~+~,0-0------~----~VCC

~,~
22K
~WU.

110. to.- !O. 329A

COIL WINDING INFORMATION
General Instrument Toko
au = 120
7MC-A4018A or
Nl:N2:N3 = 15.5:2.8:1 Part No. 27835
Ct = 180 pF
RMC2A7641A

T1

A-M First I-F
455 kHz

T2

A-M Second I-F au = 70
455 kHz
Nl:N2 = 2:1
Ct = 430 pF

T3

F-M Detector
10.7 MHz

T4

F-M Detector
10.7 MHz

Ll

A-M Oscillator
1455 kHz

= 50
= 100 pF
au = 50
Ct = 100 pF
au = 50
Nl:N3 = 10.7:1
Ct = 39 pF
au
Ct

General Instrument Toko
Part No. 27836
7BO-A4017BM or
RLE4A7642GO
General Instrument Toko
Part No. EX 27639 BKAC-K3651HM

O'IIG. 110. A·IO.330

General Instrument Tako
Part No. EX 27640 BKAC-K3651HM
General Instrument Tako
Part No. EX 27641 7BO-A4017BM or
RWO-6A7640BM

150 mW OUTPUT

8 .A. SPEAKER - 1.0 W OUTPUT
16.1\. SPEAKER - 0.7 W OUTPUT

I

r

6V BATTERY (4'AA' CELLS) - 250 mW OUTPUT
9V BATTERY (NEDA 1604) - 750 mW OUTPUT

Figure 12

6-78

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)
proximately 90 in the circuit, and the second transformer T2 as 70 with virtually no load presented by
the circuit. Impedances are selected based on two
constraints: a-m gain and overload. One additional
point to consider is the behavior of the a-m component when the receiver is in the f-m mode.

complex high-gain circuits, considerable care and
forethought should still be given to a printed wiring
board layout to avoid undesirable effects. Inputs
and outputs should be well separated and should
avoid common mode impedances wherever possible.
Much of the signal-processing circuitry is referenced
off of the supply line, and this should avoid being in
a common mode loop caused by current drain of the
power amplifier through Pin 13. Reference points
for the local oscillator, a-m mixer, and the detector
coils should be connected to Pin 13 very close to the
device and away from the VCC connection to the
power supply bypass capacitor.

The available I-F current at Pin 15 is 200 I-IA peak,
100 I-IA at its quiescent point. (See Figure 9). Maximum permissable swing at Pins 14 and 15 is limited
to 0.5 volt positive with respect to Pin 13. This
restricts peak voltage swing at Pin 15 to I VPP' considering the inverting action of T2' This restricts the
impedance of T2, as seen by the I-F output, to values
greater than 15 kQ to permit maximum dynamic
range. Including all worst case conditions, a value of
18kQ is chosen for T2 in the example. Considered
were temperature variations and internal device
tolerances. In addition, a 470 pF capacitor has been
added to assure an adequate a-c return for the f-m
coil.
Transformer TI (Figure 7) is chosen for the correct
overload characteristics of the mixer. It also features
a 100 I-IA quiescent state and a 0.5 volt peak swing
restriction for primary impedance considerations,
and the secondary winding chosen as the lowest practical impedance for desired system gain. Unlike T2
which is not loaded to any degree by the circuit, T I is
loaded by both the mixer output impedance of approximately 50 kQ and the I-F input impedance of
approximately 30 kQ. Both must be taken into consideration in calculating the loaded Q of the transformer. In addition, the effect of the a-m components on the f-m I-F stability must be considered
- the device must be stable at both the intermediate
frequencies in both modes of operation. Although no
practical method exists for evaluating stability
criteria for an integrated circuit as is commonly done
for discrete circuits, the practical ground rules are
much the same - mismatching of the input at the
first transformer to achieve stability.
The oscillator coil (Ll) has a secondary impedance
selected to be approximately 80QQ at resonance. This
provides typically 150 millivolts of injection voltage
to the mixer driving the upper differential pairs of the
four-quadrant multiplier into hard limiting. The
oscillator is also restricted to a 1 Vpp swing and
operates with a quiescent current of 0.5 rnA.

The Pin 13 common mode resistance will also interfere with device operation in a socket. In the f-m
mode of operation, current drawn by the power amplifier will cause the Pin 13 voltage to drop slightly
with respect to the reference for Pin 14 and 15. This
will cause a variation in gain of the f-m detector.
The effect also causes an apparent increase in distortion when the power amplifier is loaded, with distortion figures approaching several percent under worst
case conditions. The effect is negligible, however,
when the device is soldered into a printed wiring
board.
Connections between Pins 14, 15, and transformers T2, T3, and T4 should be kept as short as
possible as should connections for Pins 1 and 2, those
associated with the transformers. The ground return
for the audio bypass at Pin 10 should be kept
reasonably close to the volume control ground as Pin
9 and 10 represent the inverting and non-inverting
inputs to the amplifier and enjoy about 40 dB of
common mode rejection.

Other Applications - TV Sound Channel

Beyond the obvious applications of the ULN2204A as an a-m/f-m receiver it has much to offer as
a sound system for television. The device offers exceptionally-low current consumption and a wide
operating supply voltage range. Its high a-m rejection and low external component count will make it
practical for use in many power conscious applications. Most of the comments which apply to the
f-m application of the ULN-2204A also apply to its
application at 4.5 MHz or 5.5 MHz with suitable
adaptations of the external selectivity components.
(See Figure 13)

Printed Wiring Board Layout and Special Considerations

Multlband Receiver

Special on-chip considerations for minimizing tendencies towards instabilities of all types were taken in
the design of the ULN-2204A. However, like all

The ULN-2204A A-Mcircuitry is not restricted to
conventional broadcast band applications. The

6-79

o

RADIOICOMMUNICATIONS INTEGRATED CIRCUITS (Continued)
ULN-22~

4.5 MHz

SOUND

TAKEOFF

:J]

.-------i16~------~+~

~t----l.!J-I

1131-----..--0+2 TO+1OV

10K
01«1. NO. "'10.632

Figure 13

ULN-2204A mixer and oscillator are both capable of
operation from the very-long wave band to well
above the medium wave bands. Only the antenna
and oscillator coils need to be switched or adapted

for use at other frequencies. The useful limits of the
mixer-oscillator combination extend to approximately 50 MHz with excellent performance up
through and including the citizens' band at 28 MHz.

+7.5V

TUNE

- - - - - - - - - -

I
...
I
_1- __ _ _ _ _ __ ,

6

1

7

I

1

ULN-2204A

1

I
I

I
I

I
I
ElECTOR

I
I

IK
470
IMl.NO.B-137 7

I
I
-----------------,

6-80

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

A-M/F-M RECEIVER DESIGNS USING
ULN-2240A. ULN-2241 A, and ULN-2242A
INTEGRATED CIRCUITS
THREE MONOLITHIC INTEGRATED
circuits, Types ULN-2240A, ULN-2241A and
ULN-2242A, each contain all the active circuit
elements required for the A-M tuner, F-M I-F
amplifier and detector functions. Only an F-M
tuner, filter elements, and a minimum of additional external components are necessary for a
complete A-M/F-M receiver.
This Application Note discusses several circuits and options for a number of A-M/F-M
receiver applications. Each of the three Sprague
integrated circuits used provides performance
characteristics equivalent to or better than
systems using discrete components for A-M and
F-M functions.
The circuits are ideal for special receivers such
as scanners which must be able to detect A-M
and F-M signals at one I-F frequency. Also, the
three devices lend themselves to shortwave
receiver designs because of the simplicity of their
A-M oscillator systems.
The various receiver designs covered here include an A-M tuner using a ferrite antenna, and
a permeability-tuned automobile radio. Enhanced sensitivity and overload performance is
obtained with the addition of an R-F amplifier,
easily accomplished using the AGC voltage for
the A-M mixer to control an R-F amplifier stage.
The discussion covers a table model receiver
with a ferrite antenna and R-F stage, and an R-F
stage for an automobile receiver. The concept is
extended to varactor-tuned automobile radios
with the addition of an FET-bipolar cascode R-F
stage and an AGC driver.

A-M

osc.

MIXER OUT
A-M IN

MIXER BIAS
lOW-LEVEL GNO
DELAYED AGe

MUTE OUT

I-F OUT

HIGH-LEVEL GND

DWG. NO, A-l0,426

ULN-2240A
ULN-2242A

Dwg. No.

A~1l.126

ULN-22"IA

6-81

II

c

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

General Performance Considerations

and noise. A-M gain control is achieved with
A VC applied to the I-F and delayed A VC applied to the mixer.
The differences in these three circuits are
found in the F-Msections, with packaging variations to accomodate the different features. Type
ULN-2241A is supplied in a 16-pin plastic dual
in-line package. This circuit has no mute, and no
AFC/tuning meter output (the audio output can
be used for AFC). Type ULN-2242A, in a 20-pin
package, incorporates the F-M mute and
AFC/tuning meter output. Type ULN-2240A,
also in a 20-pin package, adds tuning-error
mute, and higher F-M SIN.

Internal voltage regulators and bias supplies
assure consistent performance despite variations
in external supply voltage (8.5 to 16 V) or
operating temperature (- 40°C to + 85°C).
Separate ground leads minimize decoupling
problems.
The A-M sections of all three devices are the
same. Use of an analog multiplier as a balanced
low-current mixer results in freedom from
spurious responses, high tweet rejection, low
feed through, and low noise and very low local
oscillator feedthrough. A fully-balanced fourstage differential amplifier gives maximum gain
with freedom from common-mode interference

Input-Filter Coupll~g

depends entirely on the type of filters used. For
example, coils placed in series may be used for
A-M and F-M connected as shown in Figure 1.
A ceramic filter may be used for F-M with an
A-M filter incorporating a tuned coil in its output. This arrangement is illustrated in Figure 2.

The common A-M and F-M I-F inputs for all
three devices are basically the same. Note that
terminals 1, 2 and 3 for Type ULN-2241A correspond to terminals 2, 3 and 4 respectively for
Types ULN-2240A and ULN-2242A.
The method of arranging the I-F filters

455B

MH,

---+"-I
OW(]. No.

Dwg. No. A-ll.319

Fllure2

Fllurel

6-82

A~11.320

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

The I-F input impedance is very high (10 kQ
10.7 MHz; 15 kQ at 455 kHz) and can be
ignored when selecting loading resistors for different types of I-F filters. Additionally, the input stage bias currents are very low, therefore a
relatively high-value resistor can be connected
between pins 1 and 3 of Type ULN-2241A, or
pins 2 and 4 of Type ULN-2240A or ULN2242A, without significantly affecting the limiter
balance.
These characteristics simplify the input filter
coupling to accomodate ceramic filters used for
both A-M and F-M I-Fs as shown in Figure 3.
Most 455 kHz filters are terminated by a 1 to 3
kQ resistor in parallel with a capacitor of less

than 50 pF. The 10.7 MHz filter requires a 330 Q
termination. If the capacitance of the 455 kHz
filter is high at 10.7 MHz, the circuit will work
properly as shown. However, if the capacitance
of the 455 kHz filter is low, it would be advantageous to add an inductance in series with the
330 Q resistor to form a series resonant circuit
with the output capacitance of the 455 kHz
filter. Such a modification is shown in Figure 4.

@

If the inductance required is very small, it
might be possible to incorporate it as an integral
part of the printed wiring board.

10.7 MHz

Dwg. No. A-ll.322

OW9. No. A-l1,321

Figure ..

Figure 3

A·M Detector Considerations

Passive diode detectors are still used in many
low-cost receiver designs. The A-M detector
functions of Types ULN-2240A, ULN-2241A
and ULN-2242A, however, are entirely selfcontained. Several drawbacks to the passive
diode detector design are overcome; the load
presented to the detector coil does not change
with signal level, the detected output is not
distorted at low signal levels, and the detector
coil is not loaded down, so overall receiver selectivity is unaffected.
The self-contained detector design produces
excellent A-M performance without external
filtering elements. There is virtually no 910 kHz
and 1365 kHz tweet. Distortion at 300/0 modula-

tion is only 0.3%, and at 80070 modulation the
distortion is still under 1%.
The design of the detector coil is strictly
dependent on the type of receiver desired. The
detector input impedance is about 250 kQ. For
optimum detector operation, the coil should present an impedance of 4.7 kQ. An inexpensive
detector coil can be loaded with an external
resistor or tapped to obtain' the 4.7 kQ
impedance.
It should be noted that the A-M detector
works very well at 455 kHz and also at 10.7
MHz. Switching from A-M to F-M is as simple
as grounding one pin of the integrated circuit.

6-83

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

F·M Detector Options

The F-M detector functions in these three integrated circuits are very similar to those of Type
ULN-3889A and the same type of circuit arrangements may be used. For low-cost receivers
where distortion up to 0.40/0 at 100% modulation can be tolerated, the single-tuned coil detector illustrated in Figure 5 is most appropriate.

12
ulN-2240ilt-----+--:-+--..~
UlN-2242A

13

Dwg. No. A-ll,324

Flgur.6

Usually the primary coil is adjusted for the
maximum audio output while the secondary coil
is adjusted for minimum distortion. Perfect
detector balance at minimum distortion is
desirable; however, a signal lag caused by excess
parasitic capacitance from the I-F output to
ground could prevent this.
The parasitic capacitance of the A-M detector
coil may effectively compensate for this signal
lag or it can be eliminated by placing a small inductance (0.1 to 1.0 ",H) in series with the 220 Q
load resistor.

10.7

L_----li!.l-J~~~.=-..---2J

MH,

Dwg. No. A-ll,323

Figure 5

Note that terminals 7, 8 and 9 of Type ULN2241A correspond respectively to terminals 11,
12 and 13 for both Type ULN-2240A and Type
ULN-2242A.

Any of the three signal processing systems can
be used as phase-locked F-M detectors. An external, voltage-controlled oscillator signal must
be applied to the F-M detector. If the audio output is used, the phase detector constant KD =
4.8 volts/radian. If the AFC output is used,
then:

Types ULN-2240A and ULN-2242A require
165 mV injection level at pin 11 to insure proper
mute detector operation.
Lower interstation noise levels can be obtained in applications using Type ULN-2241A
by using a lower value resistor than the 220 Q I-F
load resistor shown (typically 82 Q) and thus
reducing the injection level.
The double-tuned detector shown in Figure 6
provides signal distortion levels as low as 0.1 %.
In addition, the double-tuned detector
minimizes distortion as a function of tuning,
when the receiver is tuned away from a strong
signal.

KD = 785

X

10- 6 x Rv

RL is the value of the resistor connected to
V REO •

The AFC output is preferred because the
audio can then still be muted without affecting
the loop operation. More detailed information
can be found in a paper published by Jon P.
Grosjean. See Reference 2.

6-84

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

High·Performance A·M/F·M Tuner

input signal and 0.6 V with large input signals.
The circuit also includes mute, a tuning meter,
and an AFC output to the F-M tuner.

A high·performance A-M/F-M tuner illustrated in Figure 7 uses an R-F stage controlled
by the mixer bias on pin 17. This is 1.7 V with no
F-M AGe

1M
I-_~Wv--+-_

1:' .leF

4JK

AFe

, - 1 - - - - - - - - + - - - - 1 > - - - " - - . r~~~BIT
11

10

HT-I-==---+--t--IHI2

9

14
15

500K .1fJF

l

'--~I/V'v-++-+-HI3

+13V

MUTE

100

THRESHOLD

ULN-2242A

16

r*--I-"''----I17
,,-,-vv"v--, ' - - - - ) - - - - 1 1 8

.-+------119

tqT2

20

A-M

ANTENNA
100

Dwg. No, 8-1451

Figure 7

PARTS LIST FOR FIGURE 7

FI
F2
QI
Q2
T1
T2
T3
T4
T5

SFEIO.7MA, F-M I-F Filter
CFZ455C, A-M I-F Filter
MPS3563, F-M Converter
MPSH-04, A-M R-F Amplifier
Ferrite Loop, 571 I'H, Qu = ISO, 17:1 turns ratio
RWO-6A7640BM, A-M Osc., Qu = 50, 11:1 turns ratio
RLCS-4A7893GO, A-M Det., 2561'H, Qu = 75,5.4:1 turns ratio
BKAC-K365IHM, F-M Det., Qu = 65
BKACS-K455IAO, F-M Input, Qu = 90,7:1 turns ratio

6-85

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Low-Cost Receiver Design

A simplified receiver design illustrated in
Figure 8 can produce excellent performance at
very low cost using Type ULN-2241A. This simple A-M/F-M system uses a Type ULN-2283B
audio amplifier and a Toko CY2-22124 PT
Polyvaricon type of tuning capacitor.

with the output of F2, the 455 kHz filter. At 10.7
MHz, this inductance will form a series resonant
circuit with the F2 output capacitance.
The single-tuned detector coil T4 is easily
aligned by simply tuning for maximum audio
output. Note that AFC has been included even
though Type ULN-2241A has no AFC output
pin. It is only necessary to filter the audio output
at pin 5 with a 1 MQ resistor and a 0.05 J.lF
capacitor for AFC.
The F-M tuner design is relatively straightforward, except: the auto dyne converter is
designed so that the F-M oscillator signal does
not appear across the primary of the mixer coil
T5, and the oscillator coil is grounded. This circuit configuration prevents the F-M oscillator
signal from coupling across T5 through F1 into
the ULN-2241A (pin 1). Excessive oscillator input would cause the limiters to be driven by the
oscillator producing undesirable offsets with
weak signals.

The A-M section tunes from 540 to 1610 kHz.
The ferrite antenna T1 has an inductance of 571
JAH, and 6 turns on the secondary. Twenty dB
quieting sensitivity is 180 f.lV 1m and the maximum signal is about 1.0 V1m. The A-M
oscillator is a negative resistance type needing
only an impedance greater than 1.5 kQ across
pins 9 and 15 to oscillate. The oscillator coil T2
has been designed for a secondary impedance of
about 5 kQ.
In order to obtain good A-M selectivity, a
low-cost ceramic I-F filter F2 and a relatively
high-Q detector coil T3 are used. The tap impedance T3 is 4.7 kQ.
The CFZ455C filter F2 contains a tuned circuit and ceramic resonator and has sufficient
input impedance for a good mixer gain. It must
be loaded with 2 kQ. The output capacitance of
250 pF at 10.7 MHz is large enough to terminate
the F-M I-F filter F1 through 330 Q. A slightly
better termination for F1 can be produced using
a small inductance (0.88 f.lH) placed in series

Note the AGe output of Type ULN-2241A is
used to drive the R-F amplifier Ql. This
eliminates any problems with large signals overdriving the converter Q2. Consequently, the
oscillator frequency in this tuner will not change
even when the input voltage rises as high as
300,000 f.lV.

LOW-COST TUNER PERFORMANCE CHARACTERISTICS
(Figure 8)
F-M

A-M

20 dB (8 + N)/N = 5 "'V
fo + I-FI2 = 64 dB
Image = 27 dB
1 dB Limiting = 10 ",V
Interstation Noise = 20 dB below 30"70
20 dB (8 + N)/N = 180 ",Vim

6-86

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

AGe
F-M

ANTENNA

r
-11"

87-109 MHz

15

'4

220

4.7K

100

'

+12V

I.

.01J

I':~~~uF
1M

~.015

A-M

ANTENNA
540-1610
kH,

MHz

A~~~F

,..--+---,

~5""

rrt_. . +

~....

.... No • •-1449

Figure 8

PARTS LIST FOR FIGURE 8
DI
FI
F2
QI
Q2
TI
T2
T3
T4
T5

Siemens TA314, F-M Varaetor Diode
SFEJO.7MA, F-M I-F Filter
CFZ455C, A-M I-F Filter
MPS3563, F-M R-F Amplifier
MPS3563, F-M Converter
Ferrite Loop, 571 ,..H, Qu = 150, 17:1 turns ratio
RWO-6A7640BM, A-M Ose., Qu = 50, 11:1 turns ratio
RLCS-4A7893GO, A-M Det., 256,..H, Qu = 75, 5.4:1 turns ratio
BKAC-K365IHM, F-M Det., Qu = 65
BKACS-K455IAO, F-M Input, Qu = 90, 7:1 turns ratio

6-87

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Low-Cost Automobile Radio
Automobile radios usually have two tuned
R-F circuits in addition to the local oscillator. In
this case Type ULN-2242A can be used in an
A-M/F-M automobile radio without an A-M
R-F amplifier. The R-F circuit can be doubletuned with minimal loss in sensitivity. The
inductive tuning circuit is easily connected to the
mixer of Type ULN-2242A as shown in Figure 9.
Note that L51 and L53 are not tapped and
only the oscillator coil L55 needs a secondary
winding. The 150 1M coil L54 forms an inductive
tap with L53 to provide a desired sensitivity and

overload level. The A-M sensitivity of the tuner
with the 30 pF/30 pF dummy antenna shown is
10 IAV for 10 dB (8 + N)/N, and the maximum
input at 800/0 modulation is 300 mV.
The I-F uses a ceramic filter and a singletuned high-Q detector coil. The I-F collector
load resistor of 150 Q on pin 13 has been reduced
from the usual 220 Q (pin 9, Figure 8) to reduce
the interstation noise and to increase the limiting
level for better tuning feel. An F-M tuner of the
designer's choice can be added to this circuit to
form a complete A-M/F-M tuner.

F-M AGe

4.7K
+13V

11
A-M
ANTENNA

10
9

~h-~~----t----r~2

.:rr- L --""Nv---++--HI3
15
16

ULN-2242A

;------+-------117

220

1t---'WIrlI----<

~~~~~~-1~--~--~18

4700

r-+--------,l19

20

61

2.7

---1{D
T

.
AlTE.RNATE
INPUT

~.05

1

:t:!±:t :::

~~I
-

I
-

33a..

1/2W
.47

+13VO--'V'>Ar-+----<_~

~oT

l' 1 I
50

TO F-M TUNER

9.IV

30

Dwg. No. B-1450

DUMMY ANTENNA

Figure 9

6-88

F-M IN

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

PARTS LIST FOR FIGURE 9
FI
F2
Tl
T2
T3

SFEIO.7MA, F-M I-F Filter
CFZ455C, A-M I-F Filter
RWO-6A7640BM, A-M Osc., Qu = 50, 11:1 turns ratio
RLCS-4A7893GO, A-M Det., 256 jodi, Qu = 75, 5.4:1 turns ratio
BKAC-K365IHM, F-M Det., Qu = 65

LOW·COST AUTO RADIO PERFORMANCE CHARACTERISTICS
(Figure 9)
A-M

10 dB (S + N)/N = 10 /Joy with 30070 modulation
Maximum Signal = 300 mY with 80070 modulation

Automobile Tuner With A·M R·F Stage

Improved sensitivity and excellent overload
performance with the radio tuner illustrated in
Figure 9 may be obtained by adding the R-F
stage of Figure lO. A secondary winding has
been added to L53 to couple it to the mixer of
Type ULN-2241A. The emitter of the R-F stage
is biased up to 0.5 V when it is turned OFF to im-

prove the overload. This condition causes the
R-F stage to be turned OFF at a lower R-F letlel.
Large signals are not rectified in the R-F stage.
This circuit will handle input signals to 1 volt
into the 30 pF /30 pF dummy antenna.

·12V

4.7K

MIX BIAS

11

.-='--"-'--+--;18
A-M
INPUT

2.7K

~:,

CC 10

Dwg. No. A-ll.325

Figure 10

6-89

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

Varactor·Tuned Automobile Radio

The tuner in Figure 11 was specifically designed for a digital synthesized A-M/F-M
automobile radio. A large area, low-noise JFET,
Ql, provides a reasonable broad-band match to
the antenna. Tuning the antenna with a varactor
diode would require a capacitance change of 9
times the total of antenna, input cable,
minimum diode and stray capacitance. Because
Ql has about 5 pF feedback capacitance, Q3 is
added to form a cascode input.
Q2 provides the interface between the AGC of
Type ULN-2242A and Ql, reducing the gm of
Q 1 by dropping the drain current as the signal
level increases. This arrangement produces excellent large-signal and cross-modulation
characteristics. Ll and Rl provide a static current discharge path for the antenna while L2
reduces interference from VHF signals.

As the receiver is tuned off a strong station,
the AGC supplied by Q2 is normally removed
from the R-F stage Q1. Large signals applied to
the diodes will cause oscillations heard as
whistles when the receiver is tuned in and out of
a strong station. Local AGC is therefore required, and is provided by Q4 and associated
components.
Q4 is coupled to Tl by C2 and C3 so
minimum additional capacitance is added to Tl.
The output of Q4 is rectified by a voltage
doubler and filtered to remove audio frequencies
produced by the voltage doubler. This arrangement coupled with the very good AGC
characteristics of Type ULN-2242A, results in a
receiver with large-signal capabilities better than
most conventional automobile radios.
An A-M oscillator signal of about 200 mV at
pin 20 can be used to drive a synthesizer if
desired. Most synthesized radios mute the audio
when changing stations. Since A-M and F-M are
common in Type ULN-2242A, the mute works
for both. A 3 to 4-volt signal applied to pin 8 will
mute either A-M or F-M.
The A-M AGC and F-M mute signals applied
to Q5 provide a stop signal for use with signalseeking receivers. The collector of Q5 goes high
when a signal is reached and is limited to 6.5 V to
interface with 5 V digital logic circuits.

Tl, T2 and L4 form a double-tuned R-F circuit, an arrangement with several advantages
over single-tuned circuits. The bandwidth is
greater, especially at the low end of the band, so
that receiver bandwidth is not determined by the
R-F stages and image rejection is maintained.
Mistracking caused by the matched tuning
diodes is much less of a problem with the wider
R-F bandwidth. The primary voltage of Tl increases as the receiver is tuned off a station, producing better local AGC action.

REFERENCES

1. Bilotti, Alberto. "Application of a
Monolithic Analog Multiplier," IEEE
Journal oj Solid-State Circuits, December
1968.
2. Grosjean, Jon P. "Phase-Locked Loops
Using Quadrature Detector Integrated Circuits," IEEE Transactions on Consumer
Electronics, February 1976, pp. 94-100.
3. Poel, W.S. "Dorchester All-Band
Receiver," Practical Wireless Magazine,
December 1978 and January 1979.

4. Richards, Oliver. "A Complete A-M/F-M
Signal Processing System," Sprague
Technical Paper TP77-6.
5. Grosjean, Jon P. and Richards, Oliver.
"The Development of High-Quality
Receivers for A-M Stereo," Sprague
Technical Paper TP80-5.

6-90

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

r-------V,EG

Figure 2

6-93

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

0

'"

10


20

.........
~

i' ~

~

~~~I
i
~+,

:r"

~~

l:!

11
I

r---.. r--.

;j

0

I A-M MODEl

,I

!

. . 1'

z



k"i-"

~

"!J

1.0

V



2.0

~
~

1.0

.

0

...

c:

t....

'"

g
~

I--

II

1111

I F- M' MODE

~

..c:.

~

""0

\~

I\~
-""
10

~

~

IK

100
INPUT VOLTAGE.

lOOK

10K

vin • IN ~V
DWG. MO. B-1366

Figure 8

6-97

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

FM ANTENNA

10K

. FM

AM

MPX.

osc .

DEFEAT
FM
AGe:

FM
TUNER
HEAD

IF

OUT

100

47K

~.01

4.7K

+12.5V

FM TUNING
AM SIGNAL ' - - - - - - - - - - - '

AUDIO
OUT

DWQ. 110. B-I380

Figure 9

The device is most often specified in a standardized
test fixture, eliminating as many variables as possible
including AM antenna and FM tuner characteristics.
Typical overall performance in such a fixture is
illustrated in the following curves.

the "one-chip" radio receiver without the performance tradeoffs so common with previous AM/FM
integrated circuits.
(1)

This new monolithic AM/FM signal processing
system which has been described, provides the radio
designer with a modern cost-effective approach to

(2)

6.,-98

A. Bilotti and R. S. Pepper, A Monolithic
Limiter and Balanced Discriminator for FM
AND TV Receivers, National Electronics
Conference, October (1967).
Sprague Electric part number ULN-2242A.

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

10

I

I 1111111

RECOVERED

...-

o

'"

-20

>

/

/

V

'"

1\'

...J

~ -30

J

f=

C[

,//

""'~,

...J

'"a:: -40

I

V

--

THD

r-

"

-50

-60

I-"

/

-10

-0

iil

AUDIO, Voul

A-M

o

MODE

dB • 325mV

S+N

r!- r-

I

II

100

10

IK

INPUT VOLTAGE,

10K

,.V

Vin IN

lOOK
OWG.NO.8-1367

Figure 10

0

/

.,.

RECOVERED

AUDIO, Voul

-10
F-M

-20
m
."

/

~
...J

'"
'"
'">f=

-30

>

o dB

I

V

V

...J

OUTPUT NOISE

-.....

-40

~

\1\

C[

~

...J

'"a::

MODE
• 425 mV

-50

r-.

V

1\

A-M REJECTION

/-

1\

-60

\
10

/

~

IK

Figure II

6-99

r

I"'-.

TO -BOdB

100
INPUT VOLTAG E,

1\

Vin

IN ,.V

10K

lOOK
OW(J. 110. 8¥1368

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

DEVELOPMENT OF HIGH-QUALITY RECEIVERS
FOR A-M STEREO
As a guide, the following receiver parameters have
been chosen: (The modulation is 30% at 1 kHz unless otherwise noted.)

Introduction

Almost all current designs for A-M receivers or
tuners use a ferrite antenna and lor a tuned R-F stage
with one or two separate tuned R-F circuits. These
are basically just slight modifications of the old fivetube radio. Because of this, almost all literature
written on the subject of A-M receiver design was
written when large tube-type receivers were popular.
When a receiver must have an audio-frequency
response greater than about4 kHz, this arrangement
is not satisfactory and a new approach is required.
This does not, however, necessitate the design of
new integrated circuits for the R-F and I-F portions
of high-quality A-M stereo tuners. Presently available integrated circuits can be used (with minor circuit variations) to produce A-M tuners with performance that compete with that of the receiver's F-M
section.

1.
2.
3.
4.
5.
6.
7.

20 dB S+N IN" 200 p.,V 1M
Adjacent Channel Attenuation", 35 dB
Image Rejection '" 50 dB
Maximum Input Signal 1 V 1M
THD < 0.5% and 1% at 80% Modulation
Maximum SIN", 50 dB
Audio Response: 20 Hz - 15 kHz

Unfortunately, items 2 and 7 are incompatible
with channel spacings of 10 kHz, so either a dualbandwidth I-F or poorer frequency response must be
accepted.

Design Parameters
I-F Filters

A-M stereo testing of many different types of A-M
receivers indicates that receivers performing well
with monophonic signals also perform well with
stereophonic signals. A good criterion appears to be
total harmonic distortion and audio frequency response. In addition to the usual requirements of good
sensitivity, selectivity, image rejection, and the ability to handle large signals, distortion, signal-to-noise
ratio, and audio fidelity are important parameters
when designing A-M receivers for stereo or mono.
Fortunately, if the I-F filter response can be kept
symmetrical, current A-M integrated circuits will
give very low distortion for a llirge range of signal
levels. In addition, most of them have also had their
gains apportioned properly so that under AGC conditions, signal-to-noise ratios are not degraded and
high ultimate S + N IN ratios can be reached. This
eliminates some problems for the designer, but does
not solve all of the possible problems.

The audio distortion and receiver selectivity are
essentially determined by the I -F filter of a receiver.
(Some other factors degrading the audio frequency
response will be discussed under R-F circuits.) The
traditional approach of using LC networks in a good
quality receiver becomes very difficult because of Q
limitations.
As an example, consider a transitional filter with a
40 dB bandwidth of 20 kHz and center frequency of
455 kHz.
Number of
Max.
Min.
Sections

3
4
5
6
7
8

3 dB BW
3.2 kHz
5.0 kHz
6.7 kHz
8.0 kHz
9.1 kHz
10.5 kHz

Coil Q
211
180
238
322

411
483

Z0t.;t;/!t:r rp9~b~O IEEE. Reprinted by permission. This paper was originally presented at the IEEE Fall Conference on Consumer Electronics, Chicago, III.,

6-100

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

The maximum available coil Q is only about 140,
so it is almost imperative that the I-F filter be a
ceramic filter designed specifically for that purpose.
Suitable communications ceramic filters are available, but at a cost 3 to 10 times greater than that of
standard I-F transformers. There is, however, a good
compromise available. Reasonably priced ceramic
ladder filters with zeros in their transfer function are
available with the following response (Figure 1):

J..!

1

frequency response. A few calculations will demonstrate the problem:
If the R-F circuit loaded Q is 60:

1400 kHz - 3 dB BW = 23 kHz, Audio =
12 kHz
At 600 kHz-3 dB BW = 10 kHz, Audio = 5 kHz
600 kHz Image rejection = 48 dB
If the Q of the ferrite antenna or R-F tuned circuit
is reduced to improve the audio response, the image
rejection suffers. In the case of the ferrite antenna,
the sensitivity also suffers:

:!: 50dB

I~
L J
40d• •W
:12-50 Khz

DWG.NO. A-ll,510

Figure 1

The zeros can be selected to fall at ± 10 kHz for
narrow-band I-Fs, and at ±20 kHz for wide-band
I-Fs. The minimum attenuation beyond the zeros of
only 27 dB is too small, but this falls within a range
where supplemental inductive filters can be used.
This requires buffers between the coil and ceramic
filters, but, as we shall see later, some integrated
circuit designs easily accommodate this arrangement.
It has been found by experiment that a full 20 kHz
or even 15 kHz audio response is not necessarily
desirable in a high quality A-M tuner, and might
even be undesirable. So much background noise and
interference from other stations is present even during local daytime listening that a narrower
bandwidth is more acceptable. A good compromise
appears to be about 20 kHz for 3 dB bandwidth.
This is degraded by other filtering in the set plus the
necessary 10kHz notch filter in the audio output to
give an overall audio frequency response of about 7
to 8 kHz. In the narrow bandwidth mode for nighttime listening, the ±1O kHiattenuation must be
greater than 40 dB, restricting the audio response to
about 4 kHz. It should be noted that this is considerably better than the 1.6 kHz to 3 kHz audio response
of current receivers.
R-F Circuits

The R-F circuits of a high-quality A-M tuner present difficult challenges. The first occurs because the
R-F stage bandwidth should not degrade the audio

E = npA~E
g
60

v=

QEg

V
Voltage Across Antenna Circuit
n = Number of Turns
f.L
Antenna Permeability
A = Antenna Cross Sectional Area
f
Received Frequency
Q
Antenna Q
E
Electric Field Strength
Eg
Induced Voltage
This situation can be improved by using a large
loop of a few turns of wire. In this case, the formula
is the same with f.L being replaced with f.Lo. This
antenna must, however, be very large in crosssectional area (typically 1 m 2) before it is effective.
It is also directional.
The only other alternative is the old-fashioned
wire antenna which turns out to be much better in
terms of signal reception. For this type:

e

Eg=T E

V = QEg

e = Antenna Length
Now, the received signal can be increased to offset
reduced Q simply by making the wire longer.
This still leaves the problem of how to deal with
the loss in image rejection when the R-F circuit Q is
reduced. The most obvious solution is to use a
double-tuned R-F circuit. This can be manipulated to
have constant bandwidth with different center frequencies so almost any desired result (without severe
loss in image rejection) can be obtained.
Additionally, the wider R-F bandwidth reduces
tracking problems which are not usually serious for
A-M mono signals, but which will cause problems
with A-M stereo signals because of the group delay
variations they produce.

6-101

RADIO/COMM.UNICATIONS INTEGRATED CIRCUITS (Continued)

This .leaves two possibilities for antenna input
circuits:
I. Couple the antenna directly to the double-tuned
circuit and suffer a 6 dB insertion loss.
2. Use an untuned PET input and put the'doubletuned circuit between the PET and the mixer.
Option 2 also eliminates the need for an antenna
trimming capacitor. This can be a significant cost
savings in automobile receivers. In both cases, however, the Q of the antenna circuit will be quite low at
the low end of the A-M band, and the receiver will
have somewhat poor I-F rejection. This can easily be
solved by using an integrated circuit with a doublebalanced mixer.

The audio output terminal (pin 4) includes a
10 kHz notch filter and a 15 kHz low-pass filter to
reduce unwanted noise in wideband operation. Note
the simplicity of the double-tuned R -F filter. The two
coils are identical and a mutual coupling capacitor is
used to give greater coupling at low frequencies.
The second tuner shown in Figure 3 uses a very
popular A-M-only integrated circuit (2). This IC,
while not having a balanced mixer, has a separate I-F
stage perfectly suited to driving the ceramic I-F filter. The R-F stage is slightly different here but retains the double-tuned interstage filter. The required
R-F gain is higher because of the lower overall gain
of the IC.
Instead of two double-tuned I -F filters, a 3-section
filter is used and transistors are again used for
bandwidth switching. The lowpass and notch filters
are also retained in the audio output.

Receiver Designs

Illustrations of two high quality A~M tuned designs which use currently available parts are shown
in Figures 2 and 3.
Both achieve the following performance levels.
S+N
20 dB ~- 100 IN 1m

Conclusion

(depends on antenna length)
Image Rejection = 55 dB
- 3 dB audio frequency response from 550 to
1600 kHz:
wide - 7.5 kHz
narrow - 4 kHz
THD < 0.5% at 30% modulation
Maximum signal level > 1V 1m
Max signal-to-noise at 30% modulation = 47 to
50 dB
The first design shown in Figure 2 uses a combination A-M /F-M integrated circuit (1) with a balanced
mixer for A-M. A junction PET must be used for the
R-F stage to obtain a reasonable sensitivity
(MOSFETs are very noisy at these low frequencies),
but since it has a high feedback capacitance, a transistor is also used to form a cascode stage. AGC is
derived from the IC and is used to reduce the current
of the R-F stage. Since the IC has enough gain, the
R-F stage gain can be kept low to reduce overloading. The ceramic filters in the IF stage are separated
by low-cost buffer transistor stages which also perform the bandwidth switching. Added to the ceramic
fil~ers ~e double-tuned input (pin 14) and output
cOlis (pm 1) to suppress the spurious responses of the
filters.

It has been shown that high-quality A-M tuners
using existing monolithic integrated circuits can be
designed and their cost is reasonable. They are suitable for driving A-M stereo decoders and should
produce very good A-M mono or stereo results. In
the case of the first tuner, the 455 kHz signal to the
decoder can be taken from the last I-F collector or
from a secondary winding on the detector coil: A
455 kHz signal of high-enough level is somewhat
harder to obtain from the second tuner. The easiest
approach appears to be to amplify the approximately
5 mV detector input signal. The internal detector
then serves to generate AGC signals.

The advent of A-M stereo may hopefully serve as a
catalyst for the re-development of good A-M tuners
which died out when the "all-American" five-tube
table radio was first introduced.

References

(1) Sprague Type ULN2240,41,42A, or TDA-

1090.
(2) Sprague Type ULN2249A or HAl 199

6-102

RADIO/COMMUNICATIONS INTEGRATED CIRCUITS (Continued)

21••

100
100

1000

,
I

•• 1

: : :7...
,... "'

...
OWG.NO. 8-1469

Figure 2

+IZV

If t

2711H

+12V

"HH--.--+--=-=:'-::::::::";
05

82.

QL-,L!O'l

TlS75

> I -_ _ _ _ _ _ _ _ _ _ _ _

Q2-Q62N4124

lOOk

'8K

DWG.NO. 8-1470
'OK
Fo-IOIIMl

Figure 3

6-103

A~~O

r\
l;I~VIDEO AND TErnllSION INTEGRATED CIRCUITS

SECTION 7-VIDEO AND TELEVISION INTEGRATED CIRCUITS
Selection Guide ................................................. 7-2
ULN-2260A AGC Control, Sync Separator, and Scan Processor ................. 7-3
ULN-2270B and 2270Q (TDA1l70) Vertical Deflection System .................. 7-6
ULN-2290B (TDA3190) and 2290Q (TDA1l90l) 4-Watt TV Sound Channel ......... 7-12
See Also:
ULN-3702l as Vertical Output Driver ................................ 8-22
Application Note:
ULN-2260A Signal, Sync, and Scan Processor ........................... 7-19

7-1

o

VIDEO AND TELEVISION INTEGRATED CIRCUITS

SELECTION GUIDE TO VIOEO AND TELEVISION INTEGRATED CIRCUITS
Device Type

Chroma

Luma

Sound

Sync

Defl.

X

ULN-2260A
ULN-2270B/Q
ULN-2290B/Q
ULN-3702Z*

X

X
X

X

NOTE: Additional devices for use as sound channels may be found in Section 6. Audio amplifiers are
described in Section 8.
*See page 8-22.

7-2

ULN-2260A AGC CONTROL,
SYNC SEPARATOR, AND SCAN PROCESSOR

ULN-2260A AGC CONTROL,
SYNC SEPARATOR, AND SCAN PROCESSOR

FEATURES
•
•
•
•
•

Excellent AGe Noise Immunity
High Output Sync Level
Balanced Phase Detector
Stable Master Oscillator
I6-Pin Dual-In-Line Plastic Package

TELEVISION-CIRCUIT SIMPLIFICATION
and high performance are primary advantages
of designs using Type ULN-2260A. NTSC or
PAL television receivers, color or monochrome,
with countdown or conventional synchronization, can be flexibly and efficiently partitioned
through use of this device.

The sync separator uses an eJl;ternal passive
network. The designer chooses the sampling
level and time constants. The 10 Vpp output is
short-circuit limited at approximately 25 rnA.
The phase detector of Type ULN-2260A compares the sync separator's output to the integrated horizontal flyback pulse. Its output is a
voltage proportional to the phasing error. Static
phase error attributable to detector imbalance is
minimized.

The AGC detector of Type ULN-2260A
employs a coincidence gate approach that
minimizes noise effects. The circuit maintains
constant AGC levels despite temporary losses of
synchronization and temporary horizontal
timing disturbances. The AGC-synchronization
loop has both the high gain and high slew rate
needed for fast channel-to-channel gain
equalization and reduction of airplane flutter.
Both forward and reverse delayed AGC currents
are developed.

The designer is able to define the free-running
frequency, control sensitivity and temperature
compensation of the integrated circuit's
oscillator. A wide range of frequencies can be
generated, accomodating any of several TV or
video display terminal deflection systems.

7-3

7

ULN~2260A AGC CONTROL,
SYNC SEPARATOR, AND SCAN PROCESSOR

TYPICAL APPLICATION
+12 V

r -__________________~3~.9AK~~----+_oFL~ACK

SYNC OUT -t--""--+-+-L~

l..!!J-t_---4'-IV\I'-f---i

5.6K
16.5K

5.6K
1---<~-t-'V\"v-t4 5.1 K

L--f--++~~C
503.5 kHz

CLOCK OUT _----O-------.....-L.!U

Dwg.No.

TYPICAL VCO CHARACTERISTIC

VIDEO IN'

~ 535

SYNC SEP.

:z

--ti-

:z
....

SAWTOOTH

S 505
""~

FLYBACK IN
2

AGC PR I. FI LTER
I-F GAl N CLAMP

VERT, SYNC

515

A-ll.225~

4

ICF AGC

GROUND

TNR REV. AGC

OSC. IN

TNR FWD AGC

OSC. IN

APC FI LTER

495

g
::5485
.....
U

VI

0

5.0

7.0

6.0

OSC. OUT

VCC

CONTROL VOLTAGE. VUl' I N VOLTS
DWG. NO. A-ll.223

OWG. NO. A-ll.221

7-4

I

c..n

-<
'"
Z
n

'"
'"

Dwg. No. C-1269

AGC

PRI

I-F
GAIN

I-F
AGC

~
GNO

::
'"~c...Z

~

l>~

Z...,

co-

",0

SCHEMATIC

nl>
l>l>

ZG')
-.:lIn

",n

00
-nz
'"-I

a

~o
"''''
"'...-

ULN-2270B AND ULN-2270Q/TDA1170

VERTICAL ;DEFLECTION SYSTEMS

ULN-2270B AND ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEMS

FEATURES
•
•
•
•
•
•

Internal Reference
Positive or Negative Sync Input
Vertical Ramp Generator
Vertical Driver
Flyback Generator
Single-Supply Operation

A S A SINGLE DEVICE containing a vertical os-

cillator, a flyback generator and a power
amplifier, this vertical deflection system can greatly
simplify design of black-and-white and small-screen
color television receivers.
The oscillator of Types ULN-2270B and ULN2270Q is directly synchronized by positive or negative sync pulses. A current feedback loop makes
yoke current independent of yoke resistance changes
caused by operating temperature variations. The
flyback generator develops the high voltage required
by the yoke for short flyback time and high efficiency.
Type ULN-2270B is supplied in a 16-pin dual
in-line plastic package with heat sink contact tabs. Its
copper alloy lead frame gives enhanced power dissipation ratings with standard cooling methods.
Greater package power dissipation is available with
attachment of an external heat sink to the webbed
center leads of the device. The lead configuration
makes possible easy attachment of a heat sink and

use of a standard integrated circuit socket or printed
wiring board layout.
Type ULN-2270QITDA1170 is supplied in a
16-pin quad in-line plastic package. It uses the
printed wiring board on which it is mounted as a heat
sink. Small heat sinks can also be attached to the
center tabs of the device. The device carries the
Sprague Electric Company part number (ULN2270Q) unless the Pro-Electron marking (TDAl170)
is requested.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ........................... 27 V
Peak Flyback Voltage, VS-V7 ..................... 58 V
Sync Input Voltage, VlO ....................... ±12 V
Amp. Input Voltage Range, V14 • • • • • • • • •• - 0.5 V to + 10 V
Peak Output Current, 16 (50 Hz, "10 J.Ls) ............ 2.5 A
(50 Hz, >10 J.Ls) ............ 1.5 A
(non-repetitive, 2 ms) ......... 2.0 A
Package Power Dissipation, Po ............... See Graph
Junction Temperature Range, TJ ••• .- •••• -40°C to + 150°C

For increased power-handling capability, these devices can
be ordered in a 12-lead single in-line power-tab package by
changing the part-number suffix from 'B' or 'Q' to 'W'.

7-6

ULN-2270B AND ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEMS
ELECTRICAL CHARACTERISTICS at TA = 25°C, Vee = 25 V, f = 50 Hz (unless otherwise specified)
Cha racteristic

Test

Test

Pin

Fig.

Limits
Test Conditions

Operating Supply Voltage Range

2

Sync Input Voltage

10

3

Positive or negative

Sync Input Resistance

10

3

VIO

Oscillator Bias Current

11

1

i---

Oscillator Voltage

=

1.0 V

Min.

Typ.

Max.

10

27

1.0

-

-

-

3.5

-

V,
kD

-

0.2

1.0

pA
V"
Hz

Units
V

11

3

-

2.4

-

Oscillator Pull-In Range

10-11

3

Below 50 Hz

-

7.0

Oscillator Frequency Orift

11

3

Vee = 10 V to 27 V
TTAB = 40°C to 120°C

-

0.01
0.015

-

Ramp Generator Bias Current

16

1

-

50

500

nA

Amplifier Input Current

14

2

Quiescent Output Voltage

6

1

= 10 V, R2 =
= 25 V, R2 =
IYOKE = 1.0 A
IYOKE = 1.0 A
Vee
Vee

10 kD
30 kD

Hz/V
HzrC

-

0.15

1.0

pA

4.0
8.0

4.4
8.8

4.8
9.6

V
V

-

51

-

V

-

0.6

0.8

ms
A"
V

Flyback Voltage

3

Flyback Time

3

Yoke Current

3

-

-

1.6

6.0

6.5

7.0

-

1.5

-

mV/V

-

140

-

rnA

Regulator Voltage

8 or 9

2

Line Regulation

8 or 9

2

Supply Current

Vee
IYOKE

= 10Vt027V
= 1.0 A

NOTE: Pin numbering shown is in accordance with U.S. (JEDEC) practice where all
positions are numbered (1 thru 16). European (Pro-Electron) practice is to skip
the tab positions.
JEDEC
Pro-Electron 1 2

4 5 6
TAB TAB 4

8
6

10 11 12

D

13 14 15 16

8 9 TAB TAB 10 11 12

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF'
AMBIENT TEMPERATURE

~~-'2~.--~.O'-~7.~~IO~O--~1~2.~~'-~
AMBIENT TEMPERATURE IN ·C

7-7

Dwg.No. A-lO.431B

ULN-2270B AND ULN-2270Q/TDA 1170

VERTICAL DEFLECTION SYSTEMS

TEST FIGURES

Owg. No. A-IO,993

Dwg. No, A-IO,992

Figure 1

Figure 2

220K

100 K

I
I
HOLD

20K'

Dwg. No. A-IO,999

'TOLERANCE ±2%

Figure 3

7-8

ULN-2270B AND ULN-2270QITDA1170
VERTICAL DEFLECTION SYSTEMS

TYPICAL APPLICATION IN
LARGE-SCREEN BLACK-AND-WHITE TV
Supply Current, lee ................................... 140 rnA
Flyback Time ....................................... 0.75 ms
Yoke Current, IYOKE •••••••••••••••••••••••••••••••••••• 1.2 App
Operating Supply Voltage Range, Vee ................... 20 V to 24 V
Package Power Dissipation, Po ............................ 2.2 W

+22V
47 K

...,
150K

100 K I
1

HOLD

R2A
15K"

LOn
Dwg. No. A-I0,99B

'TOLERANCE ±5%

Flyback Time = 2 LYOKE IYOKE
3 Vee
Icc =

IyosKE

+ 0.02

Where:
FJyback Time is in seconds;
LYOKE is in henries;
IYOKE is the peak-to-peak current in amperes;
Vee and V6 are in volts;
lee is in amperes;
V 14 is approximately 2.0 V.

7-9

D

ULN-2270B AND ULN-2270Q/TDA 1170
VERTICAL DEFLECTION SYSTEMS

TYPICAL APPLICATION IN
SMALL-SCREEN BLACK-AND-WHITE TV
Supply Current, Icc ................................... 150 rnA
Flyback Time ........................................ 0.7 ms
Yoke Current, IYOKE ••••••••••••••••••••••••••••••••••• 1.15 App
Package Power Dissipation, Po ............................ 1.3 W

+lo.8V

3.30

R2A

561<'

..

YOKE
7.5 mH

40

4.7~I
lOY

DW(]. No. A-ll.OOO

'TOLERANCE ±5%

Flyback Time = 2 LYOKE IYOKE
3 Vee
lee =

IYg(E

+ 0.02

Where:
Flyback Time is in seconds;
LYOKE is in henries;
IYOKE is the peak-to-peak current in amperes;
Vee and V6 are in volts;
Icc is in amperes;
V l4 is approximately 2.0 V.

7-10

ULN-2270B AND ULN-2270QITDA 1170
VERTICAL DEFLECTION SYSTEMS

CIRCUIT SCHEMATIC
VREG

HEIGHT

OUTPUT

ADJ 5T

vC

•

8

2

FUNCTIONAL BLOCK DIAGRAM

,-------- - -- -;1;'------0 VCC
I

!

f~C~--------'

~.

r--- i ~---~
3

.p
t

7

~-ll
-''T'

~YOKE

15-

*

SYNC

.....
-=

INPUT

~)

:

:
~

9

16

«
-=-

~

14

:

.---~

i: ~ l.
T-.
..1. -.~.-'IIII\r-... T
I~

~HEIGHT :--.1
..l..

1

'

L-'IIII\r-'i---l
, .
**

I

, :;:: LINEARITY
-=--=-

...L......

I '

-'-

'T'

Dwg. No. A-1O.997

7-11

D

ULN-2290B AND ULN-2290Q TV SOUND CHANNELS

ULN-2290B AND ULN-2290Q
(TDA3190 AND TDAl190Z)

4-WATT TV SOUND CHANNELS
FEATURES
•
•
•
•
•
•
•

High Sensitivity
High A-M Rejection
D-C Volume Control
High Power Output
Low Distortion
Wide Operating Voltage Range (9 to 28 V)
Low Quiescent Current Drain

OF CARRYING OUT all of the funcC APABLE
tions of a TV sound channel, the UlN-2290
silicon monolithic integrated circuit consists of a
six -stage I -F amplifier !limiter, low -pass filter, differential peak detector, doc volume control, regulated
power supply, audio preamplifier and output stage.
The audio power amplifier will d~liver 4 W of
low-distortion audio to a 16.0. load with a supply of
24 V. When used with a 12 V supply, such as is
found in many portable TV sets, these ICs will furnish 1.5 W to an S.o. loud speaker.
This TV sound channel is available in either of two
package configurations. Type ULN-2290Q is
supplied in a quad in-line plastic package with a
copper lead frame. This device is designed to use the
printed wiring board on which it is mounted for heat
dissipation and is identical to European Type
TDAl190Z. It is marked with its Pro-Electron registration unless otherwise specified on production
orders.

Type ULN-2290B is fumished in an improved
16-lead plastic dual in-line package with heat-sink
contact tabs. The webbed lead configuration, originated by Sprague Electric, allows an inexpensive
heat sink to be easily attached for increased power
dissipation capability and yet permits the use of a
standard IC socket or printed wiring board hole layout. This device is identical to European Type
TDA3190.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................... +28 V
Repetitive Peak Output Current, lOUT ................. 1.5 A
Package Power Dissipation, Po .................. See Graph
Junction Temperature Range, TJ .....•.••. -40°C to +150°C

FUNCTIONAL BLOCK DIAGRAM
DE-EMP.

DECOUPLE

i~

DECOUPLE 3r-_-.JV\,'V------J

@J,

8

GROUND

D-C
VOLUME

I

FEEDBACK

COMPENSATION
1>'1111."0.,",/0.'133

7-12

ULN-2290B AND ULN-2290Q TV SOUND CHANNELS

ELECTRICAL CHARACTERISTICS at TA = 25°C, fo = 4.5 MHz, fm = 400 Hz, fd = ±7.5 kHz,
Vee = 12 V, RL = 80, Vin = 1 mV (unless otherwise specified)
Characteristic
UUlescent uutput VOltage
UUlescent :supply (;urrent
Input Limiting IhreshOld
A-M Rejection
Signal-to-Noise Ratio
Recovered Audio
uutput ulstortlon
Output Power
Power Supply Rejection
Input Resistance
Input (;apacltance

Symbol
vour
Icc
VrH
AMR
S+N/N

Test
Pin
11
14
1

Vou'
IHO
Pour

10
11
11

PSR
Kin
(;in

1
1

Test Conditions

v, -

U

K - ZZ kO, Vi' ~ U
R - 0
- ±25 kHz, m - 0.3
Pour = 0.5 W, fd = ±25 kHz
K, - U
I'OUI - 5U mW
THO - 2%, fd - ±25 kHz
THO = 10%, fd = ±25 kHz
f - 120 Hz, R, - 22 kO, R - 40

Limits
Max.

Min.

Typ.

!l.1

O.U

0.9

V

-

33

rnA

100
-

/LV
dB
dB
mV

-

19
40
55
65
120
1.0
1.4
1.5
46

-

jU
!l.U

40
50

-

-

-

Units

%

-

W
W

-

ko
pt

-

-

dB

ELECTRICAL CHARACTERISTICS atTA = 25°C, fo = 4.5 MHz, fm = 400 Hz, fd = ±7.5 kHz, Vee = 24 V, RL = 160,
= 1 mV (unless otherwise specified). Heat Sinking is Required

Vin

Characteristic
Quiescent Output Voltage
Quiescent Supply Current
Input Limiting Threshold
A-M Rejection
Signal-to-Noise Ratio
Recovered Audio
Output ~istortion
Output Power
Power Supply Rejection
Input Resistance
Input Capacitance

Symbol
Vour
Icc
Vr"
AMR
S+N/N
Vou'

THO
Pour
PSR
R
Cin

Test
Pin

11
14
1
16
11
11

Test Conditions
Vin = 0
R, - 22 kO, Vin - 0
R, - 0
td - +25 kHz, m - 0.3
Pour = 1.0 W, fd = ±25 kHz
R, - 0
Pour - 50 mW
THO = 2%, fd = ±25 kHz
THO = 10%, fd = ±25 kHz
f = 120 Hz, R, = 22 ko, R

Min.

Typ.

11
11
40
50

12
22
40
55
65
120
0.75
3.5
4.2
46
30
5.0

-

-

= 40

1
1

-

50~
+

TEST CIRCUIT

()\'/G,

7-13

kG. t.-IO.

~119

l

-=-

Limits
Max.

13
35
100
-

-

-

-

Units
V
mA
/LV
dB
dB
mV

%
W
W
dB
ko
pF

D

ULN-2290B AND ULN-2290Q TV SOUND CHANNELS

TYPICAL APPLICATION
(Heat Sink Required)

DWa.IIO.4-IO.'432

NOTE: Pin numbering shown is in accordance with U.S. OEDEC) practice where all positions are
numbered (1 thru 16). European (Pro-Electron) practice is to skip the tab positions.
JEDEC
Pro-Electron

1
1

3 4 5
3 TAB TAB

6

8
6

4

10
8

11 12 13 14
9 TAB TAB 10

15
11

16
12

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

Applications
Information
1. Types UlN-2290B and UlN-2290a have high input impedances, allowing them to be used with a ceramic filter or tuned
circuit to provide the necessary input selectivity.
2. The electrical characteristics of these devices will remain
relatively constant over the I-F frequency range of 4.5 MHz to
6 MHz. They can therefore be used with all common television
standards.
3. The a-c gain of the audio amplifier is determined by the
resistor ratio at pin 9. The gain should be defined in relation to the
frequency deviation at which the output stage of the audio
amplifier begins clipping.
4. The resistor between pins 9 and 11 can be replaced with
various combinations of resistance and capacitance to provide
bass boost or treble attenuation.
5. De-emphasis is determined by the capacitor connected at
pin 16 and an internal 10 k!l resistor. This pin can also be used to
provide a treble-cut type of tone control.
6. The high-frequency audio cutoff is determined by the capacitors connected at pin 10. To increase the audio bandwidth, reduce
the values of these capacitors, keeping their ratio constant.

4~'~--~----+----+----+----+----+----1

OJ

:: 2.0'1-"...--+---

:"
i
OJ

I~I-_-+-~~

~..


.oi_--_
_----t_---1"...---.p..cT-\t---1r-t_---i

o~.i_--_I_----t_---+----+_~~~~+_--_;

~~--"2~5---.5~O---,7~5---.I~OO,--.,~25.-~~---J
AMBIENT TEMPERATURE IN ·C

7-14

Dwg.',.

'-10.4318

ULN·2290B AND ULN·2290Q TV SOUND CHANNELS

TYPICAL CHARACTERISTICS
at TA = 25°C, fa = 4.5 MHz, fm = 400 Hz, fd = ±25 kHz, Yin = 1 mY
(unless otherwise shown)

AUDIO OUTPUT and NOISE
AS A FUNCTION OF INPUT VOLTAGE
20

A-M REJECTION
AS A FUNCTION OF INPUT VOLTAGE
20

I

I

RECOVERED AUDIO, Vour

~
-20

~

RL ,,00

-40

.

~""

-20

...

"I'-

-40

'I--.

~60

II

-80
10~

30fl

100...

3001-1

-w

S+ N/N

I.Om

3.0 m

-80
lOrn

30m

1~

100m

30f.'

1001-1

INPUT VOLTAGE, Vin,IN VOLTS

SOUND CHANNEL OUTPUT
AS A FUNCTION OF MODULATING FREQUENCY

~

300",

1.Om

I

3.Om

10m

30m

INPUT VOLTAGE, Vin,IN VOLTS

100m

!l'oIIl. MO ..... rO.6!>1

A-M REJECTION
AS A FUNCTION OF TUNING ERROR

D

10

~
;

>"

0

r---I'

tt<
~.... -20
-10

-GO

'"

0.3

I

;-.-.I---

l :;-""

~

1\

=>

~

Rl
m

-30

5 -40

-I

--

~

~

20

50

100

500
II<
200
FREQUENCY, f", IN Hz

21<

5K

101(

20K

J\II{o.Mo ...... rO.6'11

-2
-30

7-15

-20

-10
10
DEWNING, .6 fo IN kHz

20

30

tlLN·2290B AND ULN·2290Q TV SOUND CHANNELS

TYPICAL CHARACTERISTICS (Continued)

AUDIO AMPLIFIER OUTPUT
AS A FUNCTION OF FREQUENCY

./

i-"'"

ATTENUATION
AS FUNCTION OF RESISTANCE

IIII

cc· ,,.

i""1'-

r...... r--..

~LR~!a2A

·2-4V"

VCC
Rl ·16....

20

"'I'-

~

Rf=I;lA

.......

40

\

60

80

'"

100

50

20

100

200

500

lK

5K

2K

10K

120

20K

2K

FREQUENCY. f IN Hz

3K

4K

5K

10K

7K

RESISTANCE, Rx IN OHMS

i'
15K

20K

DISTORTION
AS A FUNCTION OF TUNING ERROR

/

\

\\

I"l •

1""-

/
;;

I

\

\\

/
\

\ /

/

DISTORTION AS A FUNCTION
OF FREQUENCY DEVIATION

/

-

J

:110

o
-30

-20

-10
DETUNING,lt,fo IN kHz

10

20

DEVIATION, 6f IN kHz

30

lI'/IG. ,to ..... IQ.6~

7-16

:120

L

±30

ULN-2290B AND ULN-2290Q TV SOUND CHANNELS

TYPICAL CHARACTERISTICS (Continued)

DISTORTION
AS A FUNCTION OF OUTPUT POWER

II

"

Vee - 12

10

RL,a.,.

!

DISSIPATION and EFFICIENCY
AS FUNCTIONS OF OUTPUT POWER

E
<

Vee'" 24V

-

Rf =82.....

z

~ 2.5

Rl = IbA

'/
0.2

./

Po

i

Rf = 47.1\.

0

2.0

Q

1.5

~

1.0

II /

u

0.5

J

~
~

"

0.5
1.0
2.0
OUTPUT POWER, POUT IN WATTS

£

5.0
lI\IIG.

N~.

V

o

,
3

,
1
0

0.5

1.5
2.0
2.5
3.0
3.S
OUTPUT POWER. POUT IN WATTS

1.0

_110.

1.-10.6,)

OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE

60

/

I

o

10

.L.

V
/"'

7

/'

/""

~
~

0.1

3.0

;0

,...... -..,/

4.0

4.S

"'IO."'~

DISSIPATION
AS A FUNCTION OF SUPPLY VOLTAGE

3.0
~

<
0<
~

\(

~

4~------+------4-------+-­

0<
~

.P
z·

2.0

0

1.5

~

~5

~

Q

1.0

~----~~~---r------+-------r-----~

~

0.5

30

~

~.

2~---+-

~

I

~

2.5

~
~

§

0

,~"

/

.,~"

.~

,<1-

,~,,;...

-7

'"'

/'

L /
v--10

15

20

SUPPLY VOLTAGE, Vee IN VOLTS

SUPPLY VOLTAGE, Vee IN VOLTS
~. NO. "IO.6~6

7-17

-

25

30

o

c:
r-

.

Z

~

~

..0

o

IIlCI

l>
BIAS

PHASE
SHIFT

D-C
VOLUME

DE-EMP.

Z

PHASE
SHIFT

VCC

DECOUPLE

c
c:
rZ

~

~

..0

o

/0


Z
Z

/77

Oft

r-

Ut

r00

3K

H

750

DECOUPLE

~130~
FEEDBACK

GROU~--o'

COMPENSATION
OWG. ~O. 9-138IA

SCHEMATIC

VIDEO AND TELEVISION INTEGRATED CIRCUITS (Continued)

THE ULN-2260A
SIGNAL, SYNC, AND SCAN PROCESSOR
Introduction

AGC

The monolithic integrated circuit provides high
performance by careful selection of circuit techniques, and efficient partitioning of the AGC, sync
separator, and master-scan phase-locked loop.
This grouping of circuit functions is particularly
efficient. Since the video input is common to both
AGC and sync separator, the separated sync can be
internally coupled to the phase detector of the scan
phase-locked loop; the flyback waveform is required
for AGC gating and the phase detector.

When the scan is synchronized, current is supplied
to the AGC detector (comparator) during the separated sync. The negative-going sync video waveform
at pin 1 is compared with a 4.0 V level during this
time. As a result of the AGC loop, the tip of the sync
is clamped to 4.0 V.

+

+

RF a I-F

SOUND

SIGNAL

PROCESS

\/IDEO

'C---------\.~---

...L

...1.

~

-:"'

DWG.NO. A-ll.484

a

FLYBACK

COINCIDENCE
GATING

OWG.NO. A-ll,486

Figure 1

Figure

RECEIVER PARTITIONING

3

AGC DETECTOR

The AGC detector is a high gain comparator with
an asymetrical active load (Figures 3 and 4). The
active load provides approximately 3.2 rnA of primary filter capacitor charge current and 1.0 rnA of
discharge current.

FLY BACK IN

VIDEO IN

SYNC

SYNC. SEP.

AGC PRI. FILTER

VERT. SYNC.

I-F GAIN CLAMP

+32mA
I-F AGe

SAWTOOTH
GROUND

TNR REV. AGC

OSC. IN

TNR FWD. AGC

OSC.IN

APC FILTER

IplN IS

-+---------'r--:,:-:--------40V

VP1 • I

-lmA

OSC. OUT
DWG.I'iO. A-U,487

Figure 4

DWG.NO. A-ll.485

AGC DETECTOR CHARACTERISTICS

Figure 2

7-19

D

VIDEO AND TELEVISION INTEGRATED CIRCUITS (Continued)
The high AGC-loop gain provides the high slew
rate necessary for fast channel-to-channel gain
equalization and response to airplane flutter variations.
The AGC detector is gated ON by a pulse defined
by coincidence of horizontal flyback and sync.
Coincidence-gating provides improved AGC noise
immunity over systems only are flyback-gated.
Coincidence-gating maintains AGC levels in the
event of temporary loss of horizontal sync or disturbance of horizontal timing.
Coincidence-gating demands the use of two
additional internal circuits to compensate for two
extremes of video input level at pin 1. The first is a
sync recovery system (Figure 5).
Figure 6
I-F OVERLOAD DETECTOR
OWG.NO. A-ll.489

DWG.NO. A-ll.488

Figure 5
SYNC RECOVERY SYSTEM

Extremes occur in the transition from a strong to a
weak signal. The AGC loop requires time to respond
to new signal level. In the meantime, system gain is
too low, and the video amplitude at pin 1 is too low
for the sync separator to provide sync pulses for
coincidence-gating. The resulting condition would
be lockout of the signal. However, a threshold detector composed of Q35 and Q36 senses sync-separator
(pin 2) voltages less than 3.8 V. When this occurs,
the AGC detector is gated by flyback only, allowing
the AGC system to respond to the new signal level.
As the video amplitude at pin 1 increases to its
nominal value, the AGC detector returns to the
coincidence-gating mode.
The second extreme of video input level occurs in
the transition from a weak to a strong signal. In the
transition, the I-F amplifier overloads, resulting in a
low d-c level at pin 1, Figure 6. The sync separator at
pin 2 charges to ahigherd-c level, and no sync pulses
are generated for coincidence-gating. Lockout of the
signal is again possible, being dependent on both
AGC-loop response and sync-separator time constants.

The threshold detector, Q6 and Q4' senses when
the d-c level at pin 1 is below 3.4 V. When this
occurs, the AGC detector is gated by flyback only,
allowing the AGC system to respond to the new
signal level. As the video level at pin 1 decreases to
its nominal value, the AGC detector returns to the
coincidence-gating mode.
The AGC primary filter at pin 15 integrates the
AGC-detector output into a d-c voltage, which drives
the AGC control circuit. A low d-c level at pin IS
corresponds to a low received-signal level. Conversely, a high d-c level at pin 15 corresponds to a
high received-signal level.
Figure 7 is a simplification ofthe 1-F portion of the
AGC control circuit. As is common practice, the I-F
amplifier is gain-reduced prior to the tuner under
increasing signal levels.

MAX.H GAIN

REDUCTION

DWG.NO. A-ll.490

Figure 7
I-F AGC CONTROL CIRCUIT

1-20

VIDEO AND TELEVISION INTEGRATED CIRCUITS (Continued)
The maximum-gain voltage of the AGC primary
filter is defined by the circuit designer as
V I4 - 0.7 V

buffered and applied to the base ofQ33' which has as
its emitter load a dual time-constant sync-separator
network (Figure 9). Since this network is external to
the device, the circuit designer has freedom to
choose the sampling level and sync-separator time
constants.

since this level is internally clamped by Qlg. Under
gain reduction, QI6 and QI7 force the voltage at pin 14
to follow 1.4 V below the primary filter voltage.
Produced by a series of emitter-followers, the I-F
AGC output has a gain of 1, referenced to the AGC
primary filter.

+

Choice ofthe external voltage-divider level, Vx, at
pin 13 (I-F AGC output) defines the maximum I-F
gain-reduction level, or AGC delay point, at which
the tuner is called upon for further gain reduction. As
there is a finite dead zone in the cross-over between
I-F AGC and tuner AGC, a capacitor between pin 14
(a buffered primary AGC filter a-c voltage source)
and pin 13 will decrease AGC recovery time in the
transition between I-F and tuner AGC.

SEPARATED
SYNC

POSITIVE SYNC
VIDEO

-u-

/\/

1 1

At the maximum I-F AGC level, Vx, the values of
resistors R27 and R30 are such that the voltage at the
base of Q27 is 1.4 V (Figure 8). This defines the point
at which tuner AGC action is initiated. The collector
current of Q27 is mirrored to provide forward-tuner
AGC with a trans-conductance gain of 2.1 rnA N,
referenced to the AGC primary filter. The emitter
current of Q27 is mirrored to provide reverse-tuner
AGC with a gain of 3.1 mAN.

DWG.NO. A-ll,492

Figure 9
SINGLE PIN SYNC SEPARATOR

The separated sync-voltage waveform at the collector of Q33 is clamped to 7.3 V by Q3g, and is
amplified by approximately 20 dB (Figure 10).
Complementary emitter-followers buffering the
sync waveform have an amplitude of 10 V pp. The
sync output is provided at pin 3, protected by shortcircuit current-limiting of approximately 25 rnA. It
is internally coupled to the scan-phase detector. In
addition to protecting the device against accidental
shorts, grounding pin 3 also provides a convenient
method of adjusting the oscillator's free-run frequency.

I pIN "

121IDJ /

Lt-VIFAGC
TUNER FWD. AGe.

~\FAGC
131~ \
IptN 12

SEPARATED

~ -l_---j~-'\Moo-~

OWG.NO. A-ll.491

.JL
SYNC

OUTPUT
IOV"

Figure 8
TUNER CONTROL CIRCUIT

DWG.NO. A-ll.493

Sync Separator

Figure 10
SYNC OUTPUT CIRCUIT

Since Q., (Figure 6), clamps the video waveform
to 0.5 V below the level of the sync tip, noise accompanying the incoming video is prevented from
severely altering the sampling level of the sync
separator.
The negative-going sync video waveform at pin 1
is inverted and amplified by 6 dB. This waveform is

The scan-phase detector consists of a differential
amplifier that is gated ON by separated sync. An
integrated flyback waveform is applied to the input
of the differential amplifier (Figure 11). The differential amplifier has an active load, providing singleended output of the phase-detector currents.

Scan Processing

7-21

7

VIDEO AND TELEVISION INTEGRATED CIRCUITS (Continued)

n

""""10 IJ
3

SYNC OUTPUT
10Vpp

--

10

+

-

CONTROL
'.ULTAGE
TO VCO

4

DWG.NO. A-ll,494

!FLYBACK

functions are external to the device. This provides the
circuit designer with freedom to define the characteristics of the oscillator: Free-run frequency, control
sensitivity and temperature compensation. Control
of free-run frequency allows operation of the circuit
in both countdown-synchronized and conventionally
synchronized receivers.
The oscillator is controlled by weighted summing
of quadrature components of feedback-signal current. The quadrature is inherently defined by the
external resistor and capacitor of the tank circuit at
the input of each of the two differential amplifiers.
These external components are series connected.
Therefore, the capacitor voltage waveform lags that
of the resistor by 90°. V CO characteristics for a
503.5-KHz L-C oscillator, vertical countdown receiver, are shown in Figure 13.

Figure 11
PHASE DETECTOR CIRCUIT

The positive and negative-output currents

535

(500 /J-A) of the phase detector are internally bal-

525

anced to within approximately 5% of the absolute
value of these currents. This limits the static phaseerror attributable to phase-detector imbalance. Since
the phase-detector output filter is external to the
device, pull-in characteristics can be defined by the
choice of external filter components at pin 10.
A simplification of the master-scan VCO of Type
ULN-2260A is shown in Figure 12. The VCO is
designed to minimize the effects of device parameter
variations on free-run frequency and VCO characteristics. Components defining phase-shift and filter

M
• 25kHzIV
/j.,

515
505
495

---;

485

I

5.0v

6.0v

7.0,

VPlN 10

DWG.NO. A-ll,496

Figure 13
VCO CHARACTERISTICS

+

Because it is a low-impedance source-point, pin 8
is internally short-circuit current-limited to approximately 70 rnA.
1

Conclusions

CONTROL
VOLTAGE

DWG.NO. A-ll,495

Figure 12
MASTER SCAN VCO

The device presented above was designed to
provide, with as much flexibility as possible, efficient partitioning of AGC, sync, and scan-control
functions. Coincidence AGC-gating was utilized to
improve AGC noise immunity. The circuit provides
a high-level separated-sync output for sync integrators. The scan-phase detector is accurately balanced internally. The scan VCO was chosen to
minimize the effects of device-parameter variations
on oscillator characteristics, and is adaptable to both
countdown-synchronized and conventionally synchronized receivers.

7-22

r\
1.1'-----AUDIO POWER AMPLIAERS

SECTION 8-AUOIO POWER AMPLIFIERS
Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-2
ULN-2280B 2.5-Watt Audio Power Amplifier .............................. 8-3
ULN-2283B Low-Power Audio Amplifier ................................. 8-9
ULN-3701Z (TDA2002) 5 to lO-Watt Audio Power Amplifier .................... 8-17
ULN-3702Z (TDA2008) 12-Watt Audio Power Amplifier ....................... 8-22
ULN-3703Z (TDA2003) lO-Watt Audio Power Amplifier ....................... 8-26
ULN-3705M Low-Voltage Audio Power Amplifier ........................... 8-28
ULN-3783M Dual Low-Voltage Audio Power Amplifier ........................... *
ULN-3784B 4-Watt Audio Power Amplifier ............................... 8-35
ULN-3793W 20-Watt Audio Power Amplifier ................................. *
*New product. Contact factory for detailed information.

~1

AUDIO INTEGRATED CIRCUITS

SELECTION GUIDE TO AUDIO POWER AMPLIFIERS

Device Type

Monophonic

ULN-2280B
ULN-2283B
ULN-370IZ
ULN-3702Z
ULN-3703Z
ULN-3705M
ULN-3783M*
ULN-3784B
ULN-3793W*

X
X
X
X
X
X

Stereo

X
X
X

*New product. Consult factory for information.

8----2

POUT

2.5W
1.2W
lOW
12W
lOW
600 mW
520mW
4.0W
20W

Vee
8.0-26 V
3.0-18 V
8.0-18 V
8.0-26 V
8.0-18 V
1.8-9.0 V
2.4-9.0 V
9.0-28 V
8.0-18 V

ULN-2280B AUDIO POWER AMPLIFIER

ULN·2280B AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
•

Low Distortion
Low Quiescent Current
A-C Short-Circuit Protection
34 dB Internally Fixed Gain
High Input Impedance
Thermal Overload Protection
Replaces LM380N

FEWneeded
SUPPLEMENTAL
components are
to use Sprague Type ULN-22S0B audio
discret~

The audio amplifier is supplied in an improved
14-pin dual in.line plastic package with heat sink
contact tabs. The webbed lead configuration, originated by. Sprague Electric, permits attachment of an
inexpensive heat sink for increased power dissipation capability and use of a standard integrated circuit socket or printed wiring board layout.

power amplifier in automotive, communication and
consumer designs.
With an IS V supply, the amplifier delivers 2.5 W
of low-distortion audio into an S11 load. Output
power with a 24 V supply is 2.5 W into a 16!1 load.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee' .............................................. 26 V
Peak Output Current. lOUT .......................................... 1.2 A
Package Power Dissipation, Po .................................. See Graph
Operating Temperature Range, TA ........................... -20°C to +8SoC
Storage Temperature Range, Ts ........................... -6SoC to + lS0°C

~
@
NC

200K
200K
SIGNAL 7 )---+-~~-4_"""'_+-_-4_~....J
GROUND

8-3

o

ULN-2280B AUDIO POWER AMPLIFIER

ELECTRICAL CHARACTERISTICS at TA·:;: +25°C,
Vee = 18 V, RL = 80, fin = 1 kHz (unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Output Voltage Swing
Voltage Gain
Total Harmonic Distortion

Audio Power Output
Input Impedance
Power Supply Rejection
Equiv. Input Noise
Bandwidth (-3 dB)

Symbol
Vee
lee
Voa
Vout
A,
THO

Pout
lin

PSRR
BW

Test Conditions

Min.
8.0

Vin = OV
Vin = 0 V, See Note 1
Pout = 2W
Pout = OW
Pout = 50 mW, Rl ' sn, Vee = 18 V
Pout - 50 mW, Rl - lSn, Vee - 24 V
Pout = 2 W, Rl = 8n, Vee = 18 V
Rl = 8 n, Vee = 18 V, THO = 2%
Rl = 16 n, Vee = 24 V, THO = 2%
Each Input
Pout = 0 W, f = 120 Hz
f = 20 Hz to 20 kHz
Pout = 1 W, See Note 2

-

31
-

2.0
2.0
140
-

NOTES: I. The quiescent output voltage typically equals 1j2 the supply voltage.
2. Unity gain typically occurs between 10 MHz and 100 MHz.

TEST CIRCUIT

0.1

o--J f---1f---f
INPUT

OUTPUT
OWg. No. A-ll,396A

8-4

Limits
Typ.
Max.
18
26
15
9.0
12
37
34
<0.2
1.0
0.5
<1.0
2.0
2.5
2.5
170
35
60
100
-

Units
V
mA
V
Vpp
dB
%
%
%
W
W
kn
dB
f.LVrms
kHz

ULN-2280B AUDIO POWER AMPLIFIER

TYPICAL CHARACTERISTICS

DISTORTION AS A FUNCTION
OF OUTPUT POWER

DISTORTION AS A FUNCTION
OF FREQUENCY

3

I----+--+-+++- P'"

"

~

3

~

2

:J;c'16V

Vee = 14V
1

I

"'VCC ",22V

1

Rl-a....
f= I kHz

~

~~
~

-

Vee - 26V

./ .c::..

vcd

24V

Vcc .,

22::r ':)

"~

-".. ~. 7»"

,

0

~~

8-6

RL " 16",.
f

2

3

OUTPUT POWER, POUT, IN WATTS
Dwg. No. A-9839A

~

K'

,~o

OUTPUT POWER, POUT. IN WATTS

,/

1 kHz

",

ULN-2280B AUDIO POWER AMPLIFIER

CIRCUIT DESIGN
If design values of audio output power, distortion and maximum ambient
temperature have been selected, optimal speaker impedance and supply
voltage, as well as heat-sink requirements, can be determined from curves
below and on page 4.
For an output of 2.5 W with 3'7c distortion and a maximum ambient
temperature of + 50°C:
R
THD

80
3%
2.5 W
16.7 V
1.9 W
4.4W
263 rnA

POUT

V"

Po (max)

P + POIIT
Icc

160
3%
2.5 W
22 V
1.75 W
4.25W
193 rnA

The preceding appears to indicate the best choice is an output impedance
of 160 with a 22 V supply. However, if an unregulated supply is used, the
designer may prefer an 8D load with a 16 V supply, since the absolute
maximum Vee rating of Type ULN-2280B is 26 V and since maximum
package dissipation must be calculated using the no-load voltage level.
The graph below (left) shows that the Staver V -8 heat sink would be just
adequate for design conditions outlined above at an ambient temperature of
50°C. The Staver V-7 heat sink would provide a wider margin of safety.
ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
20

V

5

V

'/

/

,./

/'

Vin ~ 0

~,.

~~5----~50----~75~--~IOO~--~--~

o
o

10
SUPPLY VOLTAGE.

TEMPERATURE IN DC
Owg. No. A-ll.793A

8-7

vee.

15
IN

20

v

25

ULN-2280B AUDIO POWER AMPLIFIER

TYPICAL APPLICATIONS
1M

0.002

220K

INPUT

1----11--<> Vee

80
pF
3M

0.1

0.005

+

rrn~F

AMPLIFIER WITH COMPLETE TONE CONTROLS

O.l

l

f

Dwg. No. A-ll,403B

1M

.J---.---{) Vee

LOW-COST PHONOGRAPH

0.1

1
Dwg. No. A-ll,404B

j-~..-_--oVee

0.1

AMPLIFIER WITH BASS BOOST NETWORK

82pF

4.7M
Dwg. No. A-ll,40S8

8-8

ULN-2283B LOW POWER AUDIO AMPLIFIER

ULN·2283B LOW POWER AUDIO AMPLIFIER

FEATURES
-Wide Operating Voltage Range (3 to 18 V)
-Low Quiescent Current Drain
-A-C Short Circuit Protected
-Low External Parts Cou nt
-Low Distortion
-42 dB Voltage Gain

DESIGNED primarily for use in low-cost
phonographs and radio receivers, the ULN2283B audio power amplifier is well-suited for
use in battery-operated portable equipment. It
will function with supply voltages as low as 2
volts (at reduced volume) without any significant increase in distortion. Weak batteries need
no longer be a major concern for users in sets
with this device. The class AB audio amplifier
also features low quiescent current drain for
maximum battery life.
The ULN-2283B is rated for operation over
the supply voltage range of 3.0 to 15 volts.
Selected devices, for operation with supply
voltages of up to 18 volts, are available as ULN2283B-1. Except for the maximum allowable
supply voltage specification, the ULN-2283B
and the ULN-2283B-l are identical.

DWG.ItO.A-ID.lI13

The ULN-2283B audio power amplifier is supplied in an improved 8-lead dual in-line plasticpackage with two webbed tabs_ A copper alloy
lead frame results in maximum power dissipation without need for an external heat sink. Lead
configuration is compatible with standard Ie
sockets or printed wiring board hole layouts.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee (ULN-2283B) "',"',','."'" 15 V
(UlN-2283B-l) .. , ...... , ...... 18 V
Package Power Dissipation, Po ' , , ' , , , , , , , ,. , , See Graph
Operating Temperature Range, T~ " , , , , , -20°C to +85°C
Storage Temperat~re Range, Ts ' , , , , , , , ,-65°C to +'150°C

8-9

ULN·22838 LOW POWER AUDIO AMPLIFIER

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Supply Voltage Range

Symbol
Vee

Quiescent Supply Current
Voltage Gain
Audio Power Output

Test Conditions
ULN-2283B
ULN-2283B-l
Vee = 6.0 V
Vee = 12V
Pour = 0 W
Vee = 6.0 V, Rt = 80, THO = 10%
Vee = 9.0 V, RL = 80, THO = 10%
Vee - 12 V, R - 160, THO - 10%
Pin 8
Co = 500 t-tF, f'iP~' = 120 Hz

Icc
A.
POUT

Input Resistance
Power Supply Rejection

= +25°C, fin = 400 Hz

RIN

PSRR

Limits
Typ.

Min.
3.0
3.0

Max.
15

-

-

39
0.25
0.80
0.80

l.a

-

12
24
42
0.35
1.1

16
28
46

-

'II

-

250
34

28

W
W

-

1.2

-

Units
V
V
mA
rnA
dB

k.{l

-

dB

TEST CIRCUIT
ALLOWABLE PACKAGE POWER DISSIPATION

Vec

Printed Wiring Board Copper
is 2 oz.lft2 , 2.5 sq. in.
(610 g/m2, 16.1 cm 2)
0.001

INPUT

o--"N~

Il
\~...

lOOK
VOWME
COUT

+

"

'"
,lii

500 IlF

\;ft-

~

DWG.MO • .\·IO.II70"

,,:

\

,.

\~

~

~~\,
.'"

~

,"£"

1>

,

'~

TYPICAL FREQUENCY RESPONSE

~

r---""-?~~

..
m

~?

"-3-~

~~~' ,
'f}

;'.., ~ >So

~

~ -I0l--.,~~~:...-..r--t---+--t--+--+---I

~

o

!:l

g

l ..

C

25

....

\
\
...l
\
\

,\
....

\
\
\\

.... ~

125

75
AMBIENT TEMPERATURE, TA • IN

~

\

O(

li'Io'l. Nu, A-J!.4U

§
-~~10-~30~-dlOO~~3~00~-'I~K-~3K~--~IOK~~~--~11K
FREQUENCY, fin IN HERTZ

8-10

ULN-2283B LOW POWER AUDIO AMPLIFIER

TYPICAL CHARACTERISTICS
60

«

50

,'s:

., " ~

E

z
-.40
tl

~-

s:

/~

QUIESCENT SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE

/"

---

~

c:::

I~

V
./

V~

f'

s:

N

1:=
z

!

~

~
co

'"
10

12

14

10

18

20

SUPPLY VOLTAGE, VCC,IN VOLTS
OWG.NO. A-ll,238

2.8

~

2.4

V

2.0

~
<{

"

1.6

~

1.2

~

OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE

= 400 Hz

f

~

:::>

0

0.8

/

--

0.4

~

o

o

.J:~~

VV

,,

~

I

j'rf

THD - 10%

,,~

~ ~,

~

"
c

",-

~

IY~

~-

'.

~-

~~~
8

6

10

12

14

SUPPLY VOLTAGE, VCC,IN VOLTS

16

18

20

DWG.NO. A-IO,839A

10

20

POWER SUPPLY REJECTION
AS A FUNCTION OF FREQUENCY

CD

.'00

~F

",.-

C

30

~

~~

40

10

20

50

100

FREQUENCY IN HERTZ

8-11

~
500

200
",",U. H!).

A·IO.~.3$

lK

ULN-22838 LOW POWER AUDIO AMPLIFIER

PACKAGE POWER DISSIPATION
AS A FUNCTION OF OUTPUT POWER

2

1.0

1/

o. 8

Vee = 9 V

,

o.

1

.
...
....

<-,~,

Vee,::~

10-..'

W
f

2f/

0

......

~

o. 6 /
o. 4

-....

"""'"

0.2

0.4

0.8

0.6

=400Hz

1.0

1.4

I.

OUTPUT POWER IN WATTS

1.6

1.8

U!'!I3.ttO. A-IO.S\l2

AT "Q LOAD

1.2

Vee

1.0

/

0,6

0.2

o

-.... ..........

/'

0.8

0,4

=12 V

Vee

1/
(

Vee

......... ~

=

····.l

-,f""
- 9 \ 1 ' - _,-,l'-;'''

.. ,....

.......... y ..~'o

"\"o"~-+"--

I =8~ I
RL
f ::: 400 Hz

6V

Ir
o

0,25

0,5

0,75

1.0

1.25

1.5

1.75

OUTPUT POWER IN WATTS

2.0
,)"'i,. HO.

2.25
~IO.837

ATIQLOAD

-

0,6

V'

0.5

0.4

0.3

0.2

vc

~

g6

>

M

"

>"

~

>"

B4

~

-;

"

>"

"

>"

I I;t ":O~ H, I
/
III

~
~
10m

30 m

100m

>

>

~

"

Q

300m

3.0

1.0

OUTPUT POWER IN WATTS

0"'.. ,

~O.

10

\-10 ('l1!C

AT 8Q LOAD

1fi.
~

10

0'

j!:

z'
o

>

8

,~'- 1->
"
"
>"
""

M

n

~
t;;

>

N

0-

"

>"

Q

"

J1

~

§

r

4

l

........ ~~

"'-10m

30 m

I

l..I
100m

f

II

= 16~
=400 Hz

-",-'
300m

OUTPUT POWER IN WATTS

AT 16Q LOAD

8-13

1.0

3.0
D'11J.hO.A-IO.841

10

ULN~2283B

LOW POWER AUDIO AMPLIFIER

CIRCUIT DESCRIPTION
To achieve the desired performance objectives of
high power output and efficiency from a 2 to 18 V
supply requires that the amplifier be capable of
peak-to-peak voltage swings approaching the available supply. To meet these performance objectives,
a power amplifier design is required having no more
than one VBE of swing restriction.
As shown in Figure 1, the output stage is comprised of 2 NPN transistors (Q17 and Q18) plus a
phase inverter (Q15). Quiescent operating current is
set up by the current source (I).
Assuming Voq = Vcd2 then the collector current
of Q15 = I, ignoring base currents, and if Q15 is
matched to Q18 as is possible in a monolithic circuit,
then the collector current of Q 18 equals the collector
current of Q15.
The circuit in Figure 1 achieves an excellent voltage swing capability ofVcc - VBE - 2VCE(SAn. This
totally NPN configuration also has good freedom
from the high-frequency problems that often occur
with quasi-complementary composite NPN-PNP
configurations.

,
~

DWG 11:1 • • ~ 10. 897

Figure 2

To reduce the size of Q 15, an additional transistor
(Q16) is added to the circuit as shown in Figure 2.
Transistor Q16 divides I by its beta + 1 allowing
Q15 to be reduced in area by a similar value. In the
practical realization ofthe ULN-2283B, Q15 is chosen as 1/5 the emitter area of Q18 with a typical beta
for Q16 of 6.
Vee

:NI,l1t(\.,...IO.896

Figure'

'lgure3

Figure 3 illustrates other refinements in the practical realization of the output circuit. The drive and
idling current I is derived from a Vee dependent
source allowing maximum drive under maximum
supply conditions while affording reduced drive and
associated current conservation under minimum
supply conditions. In addition, the Q16 divider circuit is refined to reduce PNP beta dependence.
Finally with the addition of an input emitter follower
(Q11) and a local negative feedback loop (R8), the
output is completed as it appears in the ULN-2283B.

Although the circuit in Figure 1 has been incorporated in production monolithic circuits in essentially
the form shown, in practice it has unacceptable
design restrictions. Since I is also the base drive
current for Q 17, the ratio of available base drive
current I to idling current is proportional to the ratio
of the emitter areas of Q18 to Q15. For practical
values of loIs/loIS' i.e. one, the circuit has a serious
implementation problem; it requires three output
transistors (Q15, Q17, and Q18).

8-14

ULN-2283B LOW POWER AUDIO AMPLIFIER

r-l ~+~

~

:

25
R5

7K
RI3
FROM PIN 4
OUT)

l-+--+~--\IV\r+-- (A-F
3.9K
R4

'lgure4

The input stage of the power amplifier (Figure 4)
is comprised of a PNP differential pair (Q2 and Q3)
preceded by a PNP emitter follower (Q1) which
allows doc referencing of the source signal to
ground. This eliminates the need for an input coupling capacitor. Overall negative feedback, set by the
ratio ofR4 to R5, is applied to the inverting input Q3
through an NPN emitter follower (Q7) which also
provides doc level shifting.

The Vcc/2 output tracking is achieved by summing the current flow through R4 and R5, with the
current through R13 "reflected off of ground."
Thus Vcc/2 tracking is maintained by the voltage
drop across 2 resistors. This allows the current from
R13 to be bypassed at Pin I, thereby combining the
ripple bypass capacitor with the audio feedback capacitor.
Figure 5 illustrates the complete power amplifier
as realized in the ULN-2283B, including the external components. The remarkably-low external component count, (only two capacitors including the
output coupling) reflects Concern for simplicity in
implementation, yet the device achieves excellent
performance. Typical output power can be as high as
2.1 W from a 12 volt supply and useful output power
at supply voltages of as low as 2 volts.

APPLICATIONS

Selection of power supply voltage and speaker impedance allow the designer to choose audio power
levels. No unique precautions are necessary when
designing with the ULN-2283B power amplifier. The
device is stable and a-c short-circuit immune.

5

43

210

Vee

II
4 -±j (---·1
I
I
I

~
I

----4
GROUND

'lgureS

8-15

~

ULN·2283B LOW POWER AUDIO AMPLIFIER

Tl).e selection of amplifier load impedance involves more consideration than just the desired
power output. Ideally a low speaker impedance
would produce the highest power outputs for any
one supply voltage as the curves illustrated. However, operation with a 16fl load can produce as
much power as with an 8{! load. The higher impedance lOad will also furnish ,a significant reduction in
harmonic distortion and improvement in overall repeatability in power output capacity. In applications
which allow the selection of the power supply voltage it is therefore recommended that a 160 load
impedance be utilized in applications up to 1.2 watt.

External component choice for the power
amplifier involves only two capacitors; one for the
speaker coupling and oneJor the feedback and ripple by-passing. The coupling capacitor value should'
be selected to provide the desired low-frequency
cutoff with the chosen speaker impe!iance. The
feedback and ripple bypass capacitor at Pin 1 should
be chosen for both low-frequency audio rolloff and
supply ripple rejection.
Ripple rejection is not practical to calculate due to
the large number of mechanisms involved. A
500 JLF capacitor at Pin 1 achieves typically 34 dB
rejection.
The high gain of typically 42 dB and the high
input impedance (250 ill) of the power amplifier
allow utilization of this device for applications such
as ceramic cartridge phono amplifiers.
Typical ceramic phono cartridges develop approximately 400 mY. However, the recommended
load impedance for the most economical cartridges
is usually 1 Mil. This poses no problem with the
250 ill input impedance of the ULN-2283B since
the cartridge manufacturer specifies the load impedance for full low-frequency response to less than
40 Hz. Decreasing the load impedance produces an
increased low end cutoff frequency.
In a ULN-2283B based application employing a
cost and space conscious loudspeaker, 40 Hz program material capability is not only unnecessary but
undesirable, and therefore a mismatch of the cartridge to increase the lower cutoff frequency to a
value more in keeping with the other components of
the system is recommended.
The ULN-2283B audio amplifier stage has other
input considerations to be taken into account for best
results. The input is referenced to ground for internal biasing and must be provided with a d-c path to
ground. A current of typically O.J JLA flows from
Pin 8 through the volume control producing an IR
drop which is multiplied by the closed loop d-c gain
of the amplifier (1), and appears as an error in output
centering at Pin 4. This recommends a value of
200 ill' or less for the volume control, with values
of less than 100 ill preferred.

PRINTED WIRING BoARD LAYOUT
& SPECIAL CONSIDERATIONS
Special on-chip considerations for minimizing
tendencies towards instabilities of all types were
taken in the design Of th,~ ULN-2283B. However,
like all high-gain Circuits, care and forethought
should still be given to a printed wiring board layout
to avoid undesirable effects. Input and output should
be well separated and should avoid common mode
impedances wherever possible. The ground return
for the audio bypass at Pin 1 should be kept reasonably close to the volwpe control ground as Pins 1 and
8 represent the inverting and non-inverting inputs to
the amplifier and enjoy about 40 dB of common
mode rejection.
Device dissipation vs. output power and supply
voltage for 4, 8, and 16 ohm loads is shown in the
curves on page 4. With no heat sinking (free air), the
ULN-2283B audio power amplifier will withstand
the worst case conditions (4 .0 at 9 V) for ambient
temperatures to +42. 5°C. For conditions not shown,
for higher ambient temperatures, or for improved
device reliability, a minimum heat sink is recommended. As illustrated in the allowable package
power dissipation curves, with the heat sink tabs
(Pins 2, 3, 6, and 7) soldered into a 2.5 square inch
(16.13 cm 2 ) copper area of a printed circuit board,
adequate heat sinking is easily obtained.

8-16

ULN-3701 Z/TDA2002 AUDIO POWER AMPLIFIER

ULN-3701Z/TDA2002
5 TO lO-WATT AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
•
•
•

Low External Parts Count
Low Distortion
Class B Operation
Short-Circuit Protected
Thermal Overload Protected
Low Noise
High Output-Voltage Swing
TO-220 Style Package
Direct Replacement for LM383 and CA2002

DESIGNED specifically to drive low-impedance
loads down to 1.6 fl, the Type ULN-3701Z /
TDA2002 audio power amplifier is ideal for automotive radio, tape player, and CB applications.
It can deliver 5W to 10 W of audio in the singleended mode. Operating in the extremely harsh au-

to motive environment, this device is capable of
withstanding high ambient temperatures, output
overloads, and repeated power supply transient
voltages without damage.
The Type ULN-37OJZITDA2002 amplifier is rated
for continuous operation with supply voltages of up
to 18 V. With the application of increased voltages
(to 28 V, maximum), a high-voltage protective circuit becomes operative, disabling the device. Devices without this internal high-voltage shutdown
are available as Type ULN-3702ZITDA2008 and are
recommended for use where more than 10 W of
audio power is required with higher impedance loads
and supply voltages to 28 V. In all other respects,
Types ULN-3701Z and ULN-3702Z are identical.
Type ULN-3701ZITDA2002 is supplied in a modified 5-lead JEDEC Style TO-220 plastic package.
The heat-sink tab is at ground potential; no insulation is required.
Lead configurations for vertical mounting (ULN3701V) and for horizontal mounting (ULN-3701H)
are available. Parts are branded with a partial
Sprague Electric part number (ULN370l) and the
basic Pro-Electron marking (TDA2002)

o

0..

f-

a

0..

::>

::>

;!;

;!;

<.0

<.0

;!;

Z

f-

;::

OJ

OJ

a:
>

:!:,

z

0

a:

<.0

f-

::>
0..

on

>u

f-

::>

0

a:
>

:!:

z

0

Z

l)wq. No. A-1O,46'l

8-17

II

ULN-3701 Z1TDA2002 AUDIO POWER AMPLIFIER

ABSOLUTE MAXlMU~ RATINGS
Supply Voltage, Vee. . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .. 28 V*
Peak Supply Voltage (50 ms) .. . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. 40 V*
Peak Output Current, loUT' .......................................... 3.5 A
Non-Repetitive Peak Output Current ................................... 4.5 A
Package Power Dissipation, Po ................................... See Graph
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. - 20°C to + 85°C
Storage Temperature Range, Ts . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40°C to + 150°C
*Internal high-voltage shutdown above 18 V.

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE

2or-----~----~--_.~----~----~----~

VI

~

z

O~O----~25~--~5~O----~7~5----~1~OO~--~~~~
AMBIENT TEMPERATURE, TA' IN

°c
DWG. NO. A-12.00OA

8-18

ULN-3701 ZlTDA2002 AUDIO POWER AMPLIFIER

mORICAL CHARACTERISTICS at TA = + 25°C, Vee = 14.4V, RL = 40, f = 1 kHz, R.. =

00

(unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Open Loop Gain
Closed Loop Gain
Total Harmonic ~istortion
Audio Power Output

Symbol
Vee
lee
V4
A,
A,
THO
POUT

Efficiency

"IJ

Input Impedance
Power Supply Rejection
Equiv. Input Noise Voltage
Equiv. Input Noise Current
Input Sensitivity

Zl

Input Saturation Voltage
Frequency Response ( - 3dB)
Thermal Resistance

PSR
VN

iN
Vin

Test Conditions

Min.
8.0

No signal applied
No signal applied

-

6.4
-

39.5
POUT
POUT
THO
THO
THO
THD
POUT
POUT

= 0.05 to 3.5W
= 0.05 to 5.0W, R, = 2!l
= 10%
= 10%, R, = 2!l
= 10%, Vee = 16V
= 10%, R, = 2!l, Vee = 16V
= 5.2W
= 8.0W, R, = 2!l

frippl• = 120Hz, Vrippl• = 0.5V
f = 40Hz to 15 kHz
f = 40Hz to 15kHz
Pour = 0.5W
POUT = 0.5W, R, = 2!l
Pour = 5.2W
POUT = 8.0W, R, = 2!l

Vin

C"

= 0.039 fJ.F, RIb = 39!l

ReJT

-

4.8
7.0
-

70
30
-

11
55
50
600

40

-

-

-

o

-

15k
4.0

Units
V
rnA
V
dB
dB
%
%
W
W
W
W
%
%
k!l
dB
fJ. V
pA
mV
mV
mV
mV
mV
Hz
°CIW

II

TEST CIRCUIT
All Capacitor
Values in fJ.F

INPUT
Dwg. No. A-1O.46SA

8-19

Limits
Typ.
Max.
14.4
18
45
80
7.2
8.0
80
40
40.5
0.2
0.2
5.2
8.0
6.5
10
68
58
150
35
4.0
60
15
-

ULN-3701Z I TDA2002 AUDIO POWER AMPLIFIER

APPLICATIONS INFORMATION
Cs- The large electrolytic can be considered to be
part of the power supply and may be reduced in capacitive value or eliminated, depending on the particular supply. The low-value capacitor is usually a
monolithic ceramic capacitor. It provides for highfrequency bypass and should have a low series resistance and a high self-resonant frequency.

AUDIOo--li
IN
10K --I

-=

R 2 • R 4- The output resistive divider sets the closedloop gain of the amplifier according to Av = (R2 +
R 4 )/R2 • The values shown provide for a gain of 100
and a typical PSRR of35 dB. Connecting this divider
to the d-c side of the output capacitor increases
the supply current drain (by 32 mA for a supply of
14.4 V and R2 + R4 = 222 ll) but will reduce any
tendency toward crossover distortion.

1+--:C49 8 TO 18V

+

CI

+

10

1000

RII
Lon

1Cll1
+ CSA

1000

All q!pacitor values
are In /.IF.

R2
2.20

8n

Rib, CIb-High-frequency roll-off can be controlled

0.1

with the addition of this series RC combination. Values are approximately Rib = 20 X R2 and CIb = 11
(2'lTR.fH )·

OW9. No. A-ll,997

FIGURE 1

A typical application using Type ULN-370IZ I
TDA2002 is shown in Figure 1. Component values
other than those shown will affect circuit performance as follows:

R", Cll-This network is chosen to suppress spurious oscillation. The values shown should work for
loads between 2ll and 16ll. Some changes may be
required depending on factors such as circuit layout,
load reactances, and lead length. A factor of 2 x
should be worst-case variation.

C,-The value of the input capacitor may be reduced
with the lower limit determined by the device' s input
impedance and the required low-frequency performance. For a 20 Hz low-frequency cutoff, and a minimum input impedance of 70 kll, the minimum
recommended value is O.ljLF. This capacitor's
value is normally very large so that transients (tumon, tum-oft) are inaudible. Common IjLF to 2 jLF
electrolytic capacitors will work quite well.

CIRCUIT MUTING

A simple muting circuit is shown in Figure 2. In
this circuit, the a-c input signal is attenuated without
affecting any d-c levels. The 47 jLF capacitor and the
18 kll resistor can be eliminated if signal-level ramping is not desired.

C2- The negative feedback capacitor affects the
power supply rejection ratio; the capacitive value is
therefore usually very large. If the power supply has
low ripple, the feedback capacitor value can be reduced. Increasing the value of this capacitor above
the recommended 470 jLF will not have a large effect
on PSRR, due to the terminating impedl!11ce of the
output resistive divider.


~

lil

I-

::>
Go

~

C!>
Z

;:::

;:::

0::

0::

OJ

OJ

~

!!

>

0

z

I-

0

I-

::>

0::
C!>

...
::>

0
>0

::>

0

>

I

Z
Z

0

Owg. No. A-1O.464

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ........................... 28 V
Peak Supply Voltage (50 ms) ..................... 40 V
Peak Output Current, loUT ....................... 3.5 A
Non-Repetitive Peak Output Current ............... 4.5 A
Package Power Dissipation, Po .................. 15 W*
Storage Temperature Range, Ts ........ -40°C to + 150°C
"Derate at the rate of 0.25 W/'C above Tm = 90'C

Lead configurations for vertical mounting (ULN3702V) and for horizontal mounting (ULN-3702ZH)
are available. Parts are branded with a partial
Sprague Electric part number (ULN3702) and the
basic Pro-Electron marking (TDA2008).

8--22

ULN-3702ZITDA2008
l2-WATT AUDIO POWER AMPLIFIER

ELECTRICAL CHARACTERISTICS at T, = +25°C,
Vee = +24 V, RL = ao, f = 1 kHz (unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Open Loop Gain
Closed loop Gain
lotal Harmonic Distortion

Symbol
Vee
Icc
V4

Test Conditions

Min.
8.0

-

No signal applied
No signal applied

A.
A,
THO

Audio Power Output

POUT

Input Impedance
Power Supply Rejection
Equlv. Input Noise Voltage
Equiv. Input Noise Current
Input Sensitivity

POlII POUT =
THO THO =

0.05 to.3.5 W R - an
0.05 to 5.0 W, R = 4n
10% R - Bn
10%, R = 4!l

ZI
PSRR
eN
iN

ein

Input Saturation Voltage
Frequency Response (-3 dB)
Thermal Resistance

f'iDDle = 120 Hz, VriDD~ = 0.5 V
f - 40 Hz to 15 kHz
f - 40 Hz to 15 kHz
P"IT = 0.5W, R = 4n
POUT = 0.5 W, Rl = Bn
POUT - B.O W, Rl - 4n

ein

Cfh = 0.039MF, Rfh = 39n

39.5

-

10
70
30

-

-

400
40

-

RaJ!

TEST CIRCUIT AND
TYPICAL APPLICATION

TyIJ.
24
80
12
80
40
0.2
0.2
B.O
12
150
35
4.0
60
15
21
71
600

limits
Max.
26
120

-

Units
V
rnA
V
dB
dB
%
%
W
W
kn
dB
J!.V
IlA
mV
mV
mV
mV
Hz
°C/W

-

40.5

-

-

-

-

-

-

15 k
4.0

TYPICAL LOW-COST APPLICATION

o

o
t-II-+.:---o

INPUT

INPUT
Owg. No.

Vee

RL."'IOO

A~1O,465A

Dwg. No. A-IO.466A

8--23

ULN-3702lITDA2008
12-WA'tT .AUDIO POWER AMPLIFIER

OUTPUT POWER
AS A FUNCTION OF SUPPLY VOLTAGE
15~---.--~~-----.-----r----~~--'-----~---'

~

12~--~----~-----+----~----~----~--~~---4

T,,=250C

~

z
-

~

f=lkHz
THO =100;.

9~--~-----.-----+----~----~~--~----+-~~

Iff

~ 6~--~----~----~~--~--~~~-+----~--~

o~--~----~----~----~----~----~----~--~
10
12
14
16
18
20
22
24
26
SUPPLY VOLTAGE. Vee. IN VOLTS

1lw9. No. A-ll.409

POWER DISSIPATION
AS A FUNCTION OF OUTPUT POWER
10

./

/v

ci

0.

./

~

- --

Rl=4.Q

"..--

- -.......~

r--.......
T,,·25°C
f'l kHz
Vcc=24V

o

o

2

4

6

8

10

OUTPUT POWER. POUT. IN WATTS

S-24

12

14

16

Dwg. No. A-ll,410

ULN-3702Z/TDA2008
l2-WATT AUDIO POWER AMPLIFIER

TYPICAL D-C MOTOR DRIVE APPLICATIONS

+
10 ~FI

--

VIN
2

--

+24 V

+

10 ~FI

--

+24 V

10 ~F I

+

-

+24 V

-+12 V

kA

10

kAI

-=

0.001'

l.5

kA"

"Required for a-c stability
with some loads

Dwg. No. A-ll,334A

TYPICAL MOTOR CONTROL CURVE

II

ow

W
lI..

en
D::

oIo
~

INPUT VOLTAGE, VIN
Dwg. No. A-ll,411

8--25

ULN·3703ZITDA2003 AUDIO POWER AMPLIFIER

ULN·3703Z / TDA2003
10-WATT AUDIO POWER AMPLIFIER
FEATURES
•
•
•
•
•
•
•
•

Low External Parts Count
Low Distortion
Class B Operation
Short-Circuit Protected
Thermal Overload Protected
Low Noise
High Output-Voltage Swing
TQ-220 Style Package

to drive low-impedance loads down
D ESIGNED
to 1.6 n, Type ULN-3703Z/TDA2003 audio
power amplifier is ideal for automotive radio, tape
player, and CB applications and can deliver 15 W of
audio in the bridge configuration or 5 W to 10 W
single-ended.
Operating in the harsh automotive environment,
this device is capable of withstanding high ambient
temperatures, output overloads, and repeated
power supply transient voltages without damage. It
is protected against a-c/d-c short-circuits, polarity
inversions, or open grounds.
Type ULN-3703ZITDA2003 is supplied in a modified five-lead JEDEC Style TO-220 plastic package.
The heat sink tab is at ground potential; no insulation
is required. Lead forming for either vertical or horizontal mounting (suffix letter "V" or "R," respectively) is standard.
Parts are branded with both a partial Sprague
Electric part number (ULN3703) and the basic ProElectron marking (TDA2003).

o

ABSOLUTE MAXIMUM RATINGS

·Oerate at the rate of 0.33 W/oC above llAB

=

Q

I-

o

l-

'"

0

~

Su pply Voltage, VGG • • • • • • • • • • • • • • • • • • • • • • • • • • • 28 V
Peak Supply Voltage (50 ms) .................... 40 V
Peak Output Current, lOUT ....................... 3.5 A
Non-Repetitive Peak Output Current ............... 4.5 A
Package Power Dissipation, Po .................. 20 W·
Storage Temperature Range, Ts ........ -40°C to + 150°C

II:

~
=>

u

>u

Dwg. No. A-lO,464

+90"C

8-26

ULN-3703Z/TDA2003 AUDIO POWER AMPLIFIER

ELECTRICAL CHARACTERISTICS at TA
(unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Open Loop Gain
Closed Loop Gain
Total Harmonic Distortion
Audio Power Output

Efficiency
Input Impedance
Power Su pply Rejection
Equiv. Input Noise Voltage
Equiv. Input Noise Current
Input Sensitivity

=

Symbol
Vee
lee
V4
A,

+25°C, Vee

=

+ 14.4 V, RL = 40, f = 1 kHz

Test Conditions
No signal applied
No signal applied

POUT

71

ein

Input Saturation Voltage
Frequency Response (-3 dB)

e"

Thermal Resistance

Rerr

-

44
6.9
80
40
0.15
0.15
6.0
7.5
10
12
69
65
150
36
1.0
60
14
10
55
50

6.1
39.5

POUT - 0.05 to 4.5 W
PmIT = 0.05 to 7.0 W, Rl = 2!l
THD = 10%
THD = 10%, Rl = 3.2!l
THD - 10%, Rl - 2!l
THD = 10%, Rl - 1.6!l
Pom=6.0W
POUT = lOW, Rl = 2!l

ZI
PSR
eN
iN

Typ.

-

A.
THD

fO,"I' - 120 Hz, VO,"I, - 0.5 V
f - 22 Hz to 22 kHz
f = 22 Hz to 22 kHz
POUT = 0.5 W
POUT = 0.5 W, Rl = 2!l
POUT = 6.0 W
POUT - lOW, R - 2!l
Cfb = 0.039 {.LF, Rfb = 39!l,
POUT = 1.0 W

5.5

8.0
-

-

70
30
-

-

-

-

7.7
-

40.5

-

-

5.0
200

-

-

300

-

-

40

-

15 k
3.0

-

-

o

Units
V
rnA
V
dB
dB
%
%
W
W
W
W
%
%
k!l
dB
{.LV
pA
mV
mV
mV
mV
mV
Hz
°C/W

II

TEST CIRCUIT
AND
TYPICAL
APPLICATION

INPUT
Owg. No, A-lO,465A

8-27

Limits
Max.
18

Min.
8.0

ULN-370SM
LOW-VOLTAGE AUDIO POWER AMPLIFIER

ULN-3705M
LOW-VOLTAGE AUDIO POWER AMPLIFIER

FEATURES
• Wide Operating Voltage Range
• Low Quiescent Current
• A-C Short-Circuit Protection
• Low External Parts Count
• Low Oistortion
.42 dB Voltage Gain
• Low Noise

pROVIDING a low-cost, compact alternative to
discrete transistor amplifiers, the Type ULN3705M integrated circuit is ideal for application as a
headphone driver in portable radios, tape players,
and other battery-operated equipment. The lowpower audio amplifier's wide frequency response
and low noise ensure premium performance.
The amplifier will operate (at reduced volume)
with supply voltages as low as 1.8 V without. a
significant increase in distortion. This feature allows
operation with a 3 V battery supply and minimizes
concern about weak batteries. The class AB audio
amplifier has low quiescent current drain for
maximum battery life.
This device is rated for operation with supply
voltages up to 12 V. Similar devices for operation up
to 18 V (ULN-2283B) are described in Sprague Engineering Bulletin 27117.21.
The Type llLN-3705M audio amplifier is
supplied in an 8-pin mini-DIP plastic package. A
copper alloy lead frame gives the amplifier enhanced
power dissipation ratings.

DECOUPLE 1
POWER GROUND 2
SIGNAL GROUND 3

Dwg. No. A-ll.715

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ........................... 12 V
Package Power Dissipation, Po ............... See Graph
Operating Temperature Range, TA •••••••• -20'C to +85'C
Storage Temperature Range, Ts ........ -65'C to +150'C

8-28

ULN-370SM
LOW-VOLTAGE AUDIO POWER AMPLIFIER

ELECTRICAL CHARACTERISTICS at TA = +25OC,
Vee = 6 V, RL = 320, fin = 400 Hz (unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current

Voltage Gain
Audio Power Output

~istortion

Symbol

Vee
lee

Av
POUT

THO

Outp ut Noise
Input Resistance
Power Supply Rejection

Test Conditions

Vout

R1N
PSRR

Vee
Vee
Vee

Min.

Typ.

1.8

6.0
6.0
7.0
10
42
220
430
125
240
600
60
110
310
0.4
0.5

-

= 4.5 V
= 6.0 V
= 9.0 V

-

R = 80, V" = 4.5 V, THO = 10%
R = 80, V" = 6.0 V THO = 10%
R = 160, Vee = 4.5 V, THO = 10%
R = 160, V" = 6.0 V, THO = 10%
R = 160, V" = 9.0 V, THO = 10%
R = 320, V" = 4.5 V, THO = 10%
R = 320, Vee = 6.0 V, THO = 10%
Rl = 320, V" = 9.0 V, THO = 10%
PnllT = 50 mW, R = 320
POIIT = 50 mW, R = 160
Input Shorted, BW = 80 kHz
Pin 8
CD (Pin 1) = 500 J.LF, f = 120 Hz

250
150
85
-

-

limits
Max.

9.0
-

15
20
-

-

-

-

1.0

Units

V
mA
mA
mA
dB
mW
mW
mW
mW
mW
mW
mW
mW

225

-

250
34

-

%
%
V
kO

-

dB

-

INPUT

0.1

II

TEST CIRCUIT
AND TYPICAL APPLICATION

POWER
~--t---oSUPPLY

GROUND
DW9, No. A-ll.716A

8-29

ULN-370SM
LOW-VOLTAGE AUDIO POWER AMPLIFIER
~~Or-----~r-------,-------Ir-------r-------,


c..
0-

::::>
0

0.4

0

4

2

0

10

6

12

14

SUPPLY VOLTAGE, Vee- IN VOLTS
0Wg. No. A-H.720A

TYPICAL FREQUENCY RESPONSE
'~----+----i---I Vce =3 to 9 V
Rl

Co

3D

100

= 80

=100 to 250 iJI'

300

30K

lOOK

FREQUENCY, 'in' I N Hz
Dwg. No. A-ll.717

8-30

ULN-3705M
LOW-VOLTAGE AUDIO POWER AMPLIFIER
TYPICAL CHARACTERISTICS
10

I

I

ci

:I:

.....

RL
'in

8~

:
400 Hz

=
=

I
~

Z 6

....'"

o
i=

TOTAL HARMONIC DISTORTION
AT all LOAD

'"

~
V>

o

.....
::::>
CL
.....
::::>
o

~

u"

2

o

~j

~u

4

J
../ j

...
10

~~7

20

50

100

200

500

OUTPUT POWER. POUT' IN mW

Dwg. No. A-I1.7I8

0

I

8

c:i

RL
'in

16 ~
400 Hz

=
=

I

~

....'"

..... 6

:I:

II

u

2'

TOTAL HARMONIC DISTORTION
AT 1611 LOAD

~f-

r--:

~

u

o
i=

'"~

,

I

u
u

~

u

:>

~u

4

V>

j

C

1

':;
CL
.....
::::> 2

.J

o

0
10

20

)

)

50
100
700
OUTPUT POWER. POUT' IN mW

1
500

Owg. No. A-ll.719

10

I

~

I

ci

:I:

..... 6

g
TOTAL HARMONIC DISTORTION
AT 3211 LOAD

32 ~
400Hz

;".
'0

;".
0-

1
'
1
)
)

2

o

=

"

"

4

c

.....
::::>
CL
.....

5

=

1

i=

'"o
:;;

RL
'in

I

II

I

... 8

10

20

50

100

~7
~

I

200

500

OUTPUT POWER. POUT' IN mW
Dwg. No. A-ll.990

&-31

ULN--3705M
LOW-VOLTAGE AUDIO POWER AMPLIFIER

TYPICAL CHARACTERISTICS (Continued)
300
s:
250
200

,~
"V>
V>

PACKAGE POWER DISSIPATION
ATSn LOAD

/

150

'

Vee

4.5V

,

<

/

c

'" 100
~

,

-*'

~

/

6
";z-

o

,.

Vee. 6V

E

:=

1-"''''
..., ...

f;)'~
".
'\~ \'I>~",
,\~~

,

_.' "
-,', ",

r--

•

I Rl •

SA

I fin· 400Hz

"-

o
o

200
300
OUTPUT POWER, POUT' IN mW

100

500
Dwg. No.

300
s:

250

6

"-

z· 200
o

PACKAGE POWER DISSIPATION
AT 16n LOAD

>=
«

"-

;;:; 150

/

0

""'
«

<..::>

""
u

~

/'

,...,

9V

r--..- .....

..
,\~~".
-*,'

'V ee ·4.5V

50

<

'/.

Vee ·6V

c

"-

Vee

/

V>

'" 100
~

~

/

E

:=

, ,"" "

"" ...,.
...'

.,,'
,

,

I Rl • 16A

.""

~

I fin· 400Hz

,- Y"

,721

,,~

10"'"
""\~....\'1>'10,
"

,."..-

A~ll

«

"-

o
o

200
300
OUTPUT POWER, POUT' IN mW

100

500
Dwg. No. A-ll,722A

300
s:
E

::: 250
6

Vee ·9V

"-

:Z 200
o

~

"-

PACKAGE POWER DISSIPATION
AT32n LOAD

o~
I

,.'

't,"f','
1:>9 ~ '-

;;:; 15
V>

_Vee

/'

" " ..~

,.

-

, '- .

'\~,' ,'~"f'
,~''\~<;;

6V

I Rl - 32A

,~

fin· 400 Hz

,,;,

-'-i'
V e· 4. 5V
e

lIIU

tlO
310
OUTPUT POWER, POUT' IN mW

IJ

'I

Dwg. No. A-12,025A

8-32

· ULN·370SM
LOW·VOLTAGE AUDIO POWER AMPLIFIER

TYPICAL CHARACTERISTICS (Continued)
QUIESCENT SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE

I

L

10
<

E

~

U
u

....z -.....
5
0<
0<

~V

::::J

U

>-

....J

c..
c..

::::J
VI

V

V
./
It""

"

o
o

2

4
6
8
10
SUPPLY VOLTAGE. VCC. I N VOLTS

12

14

Dwg. No. A-ll.728

POWER SUPPLY REJECTION RATIO
AS A FUNCTION OF FREQUENCY

~~---+------4-----~--~~~-.~--~

10

20

50
100
200
FREQUENCY I N HERTZ

8-33

500
Dwg. No. A-1O.838

1K

ULN·3705M
LOW·VOLTAGE AUDIO POWER AMPLIFIER

APPLICATIONS INFORMATION
Selection of power-supply voltage and speaker
impedance allows a designer to choose audio power
levels within the allowable package power dissipation rating for any maximum operating temperature.
No unique precautions are necessary when designing
with this device. It is stable and a-c short-circuit
immune.

trol. This produces an IR drop that is multiplied by
the closed loop d-c gain of the amplifier and appears
as an error in output centering. This recommends a
value of 200 kO or less for the volume control;
values of less than 100 kO are preferred.
The selection of amplifier load impedance involves more than just consideration of the desired
power output. A low load impedance will produce
the highest power output for any given supply voltage. Higher impedances will furnish significant reduction in harmonic distortion and improvement in
overall repeatability in power output capacity.

External component selection for this low-power
amplifier involves only two capacitors - one for
output coupling and one for feedback and ripple
decoupling. The coupling capacitor value should be
selected to provide the desired low-frequency cutoff
with the chosen load impedance. The decoupling
capacitor should be chosen for both low-frequency
audio roll off and supply-ripple rejection.
Ripple rejection is not practical to calculate due to
the large number of mechanisms involved. A
500 p,F capacitor achieves typically 34 dB rejection
at 120 Hz.
The high gain and the high input impedance of the
power amplifier recommend use of this device in
many diverse applications. However, the input stage
does have other characteristics that should be taken
into account for best results. The input is referenced
to ground for internal biasing and must be provided
with a d-c path to ground. A current of typically
1 p,A flows from the input through the volume con-

Special steps toward minimizing tendencies towards instabilities of all types were taken in the
design of this device. However, as with all high-gain
circuits, care should be given to printed wiring board
layout to avoid undesirable effects. Inputs and outputs should be well separated and should avoid
common-mode impedances wherever possible. For
best performance, connect low-level input-signal
ground terminals and the decoupling capacitor
ground terminal together at pin 3 (signal ground);
connect the high-level speaker ground terminal and
the power supply ground terminal together at pin 2
(power ground). The signal ground and the power
ground should be interconnected at only one point.

8-34

ULN-3784B AUDIO POWER AMPLIFIER

ULN-3784B
4-WATT AUDIO POWER AMPLIFIER

FEATURES
• Low External Parts Count
• Wide Supply-Voltage Range (To 32 V)
• Single Power Supply
• 34 dB Internally Fixed Gain
• High Input Impedance
• Bandwidth Limited
• A-C S~ort -Circuit Protection
• Thermal Overload Protection
• Directly Replaces LM384N

A MINIMUM of external components is needed

the LM380N, LM384N, and Sprague Types ULN2280B and ULN-2281B with a wider margin of
protection against supply transients. Internal bandwidth limiting provides a significant immunity to r-f
not found in many other integrated amplifiers.

to obtain high-quality audio from the Type
ULN-3784B integrated circuit in communications,
automotive, and consumer applications.
The audio power amplifier is supplied in a 14-pin
dual in-line plastic package with heat-sink contact
tabs. The lead configuration enables attachment of
an inexpensive heat sink for increased power dissipation capability, and use of a standard integrated
circuit socket or printed wiring board layout.
With a 24 V supply, Type ULN-3784B delivers a
minimum of 4 W of audio into an 8!l load. Output
power with a 28 V supply is typically 4.8 W of lowdistortion audio into a 16!l load.
Type ULN-3784B is pin-compatible with, and
significantly improves upon, several older designs.
Its higher supply-voltage rating allows it to replace

NC

POWER

nt'
u

4

GROUND

GROUND

7

Dwg.No. A-ll ,6alA

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee ............................................... 32 V
Peak Output Current, lOUT ....... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 A
Package Power Dissipation, Po .................................. See Graph
Operating Temperature Range, TA . . . . . . . . . . .. . ............. -20°C to +85°C
Storage Temperature Range. Ts .................
-6SoC to + 150°C

8-35

ULN-3784B AUDIO POWER AMPLIFIER

ELEORICAL CHARACTERISTICS at TA
(unless otherwise noted)
Characteristic
Supply Voltage Range
Quiescent Supply Current
Quiescent Output Voltage
Voltage Gain
Total Harmonic Distortion

Audio Output Power

Symbol
Vee
lee
VOQ
Av
THO

Pout

= + 25°C, Vee = 24 V, RL =ao, fin = 1kHz
Test Conditions
Vi. = OV
Vi. = 0 V, See Note 1
Pout = OW
Pout = 50 mW, R[ = 80, Vee = 24 V
Pout = 50 mW, R[ = 160, Vee = 28 V
Pout = 4 W, R[ = 80, Vee = 24 V
R[ = 80, Vee = 24 V, THO = 5%
R[ = 160, Vee = 28 V, THO = 5%
Each Input
Pout = OW, f = 120Hz
f = 20 Hz to 20 kHz
Pout = 1W, See Note 2

Input Impedance
li.
PSRR .
PowerSupply Rejection
Equiv. Input Noise Voltage
Bandwidth ( - 3 dB)
BW
NOTES: 1. The qUiescent output voltage tYPically equals V, the supply voltage.
2. Unity gain typically occurs between 10 MHz and 100 MHz.

Min.
9.0

31

4.0
4.0
140

-

-

Limits
Typ.
Max.
24
28
20
12
37
34
0.2
<0.2 <0.3 5.0
5.0
4.8
170
30
60
100
-

Units
V
rnA
V
dB
%
%
%
W
W
kO
dB
....VIOlS
kHz

ALLOWABLE POWER DISSIPATION
AS A FUNCTION OF AMBIENT TEMPERATURE
8r----r~--~----~----~----_,

TEST CIRCUIT

0.1
<>-:l~f---!

~ 5 ~-_I---+-4

INPUT

;;:>=
V'I
V'I

C

4~~~--~----~-----+-----~

c::

~

c..

t5

~
u

;;:

Owg. No. A-ll.396A

~ 2t----

~

~~5----~5~O----~75~--~1~OO~--~1~~~~~
TEMPERATURE IN

°c
Dwg. No. A-ll.793A

8-36

ULN-3784B AUDIO POWER AMPLIFIER

TYPICAL CHARACTERISTICS

DISTORTION AS A FUNCTION

DISTORTION AS A FUNCTION

OF OUTPUT POWER

OF FREQUENCY

I
3

,
Z

-

VCC~2"'V

Rl =8n

'in' 1kHz
Rl • 8~
Vee' 24V
WITH STAVER V-I HEAT SINK

I

o

0.1

0.'

1.0

O\J\~
IIII

~

,.0

2.0

~

'q~'\~

7
0.2

j

1

J
10

o100

OUTPUT POWER, POUT' I N WAITS

1K

300

3K

10K

30K

FREQUENCY, f, IN Hz

Dwg. No. A_ll,6H3A

PSRR AS A FUNCTION

VOLTAGE GAIN AS A FUNCTION'

OF FREQUENCY

OF FREQUENCY

40

,

0

0

CI,,4.7IJ,F

0

~

VCC=24V

Vin=lmVrm•

or"0

0

r-...

r.... .......

,

r

VCC - 24V

Rl

=

VOUT

00
=

4V rms

,

CP'O

0
10

30

100

300

lK

3K

100 200

'OK

FREQUENCY, f, IN Hz
Dwg.No.A-12.355

SIlO

IK

2K
,K 10K 20K
FREQUENCY, I, IN Hz

SDK lOOK 200K

SIlOK 1M

Dwg. No. A-IL400A

8-37

ULN-3784B AUDIO POWER AMPLIFIER

THERMAL FACTORS
AND ULN·3784B OPERATION
Thermal factors must be considered in achieving reliable operation of
Type ULN-3784B. Guidelines given here provide the circuit-design engineer with information on maintaining Ie junction temperature below safe
limits.
The graphs below show package power dissipation as a function of output power over a wide range of supply voltage with a load resistance of 80
or 160. Lines indicating 3% distortion and 5% distortion are shown as
guides to trade-offs between supply voltages, package power dissipation,
and upper-limit distortion. As the power supply voltage increases for any
output power requirement, distortion decreases and package power dissipation increases.
Package power dissipation figures must be taken from the highest point
on the supply voltage curve. Note that although supply voltage is normally
specified at the rated audio-output power, it will usually increase for reduced audio-output levels.
4

Vee' 24V

J

/'

£ ."..

~
~

v!:~: 16V

V~'14V

.,.....,.

-'\~.

vek .tov

...... v~ '18V

-- -

/'

',P ......... .........

V~'22~

I"

./

./

V

-

POWER DISSIPATION AS A FUNCTION
OF OUTPUT POWER (an LOAD)

V-

I

I

Rl • 8 ~,I
'in' 1kHz

I

2

4

5

6

OUTPUT POWER, POUT, IN WA TIS
Owg. No.A-12,OI6

4

,;:. ~

3

POWER DISSIPATION AS A FUNCTION
OF OUTPUT POWER (160 LOAD)

2

I

~V

~

VC/26V

~~.24V

~

'!.k.e·22~
ee' 2OV~r--...

~

V" ~..

V
./

Vee' lOV
• • .,". ~,:;'~28V'!!a,

J7l> V-

"

-~ ~ ......

/r-- ~ P< ~

r::> l<'

~

I

RL • 16A,
'in' I kHz

I

0
OUTPUT POWER. POUT, IN WATTS
Dwg. No.A-12.01S

8-38

L

V

ULN-3784B AUDIO POWER AMPLIFIER

CIRCUIT DESIGN
If design values of audio output power, distortion, and maximum ambient temperature have been selected, optimal speaker impedance, supply
voltage, as well as heat-sink requirements can be determined from the
curves below and on the previous page.
For an output of 4.S W at S% distortion and a maximum ambient temperature of + SO°C:

Rl
Vee

80

160

22.5 V

26.5 V

PD{ma~)

3.2W
3.1 W
7.6W
338 mA

2.6W
2.2W
6.7 W
253 mA

Po
Po

+

POUT

Icc

Specified
From Graph
From Graph (determines heat sink)
From Graph at Vee and POUT
Calculated
Calculated (determines supply current)

The Allowable Package Power Dissipation graph shows that the Staver
V-7 heat sink is required for the SO, 22.S V design. while the smaller Staver
V-S heat sink is just adequate for the 160, 26.S V design.
The preceding appears to indicate that the best choice is an output
impedance of 160 with its higher efficiency and smaller heat sink requirements. If lower distortion is required, the higher impedence load with the
higher supply voltage becomes even better. However, if an unregulated
supply is used, the designer may prefer the SO load. since the absolute
maximum supply voltage rating is 32 V.

QUIESCENT SUPPLY CURRENT
AS A FUNCTION OF SUPPLY VOLTAGE
50

..::

40

E

~
0

-'"

30

...:

i:"i

'"'"=>
u

20

~

0..
0..

=>

V>

10

,"

",

,

/

~

V

,v'
IV in

: 0

~"

I

10-'

1

1

'U

j>

SUPPLY VOLTAGE, Vcc' IN VOLTS
Dwg. No. A-l1.682

8-39

ULN-3784B AUDIO POWER AMPLIFIER

TYPICAL APPLICATIONS
AMPLIFIER WITH COMPLETE TONE CONTROLS
1M

0.002

220K

INPUT

80
pF
3M

0.1

+

rrn~F

LOW-COST PHONOGRAPH

O.l

1M

l

r

Dwg. No. A-1l.4038

1-_..----0 Vee

Dwg. No. A-1I.404B

AMPLIFIER WITH BASS-BOOST NETWORK

l..!!J-__,.----oVee

0.1

/5~0~F
1st

82pF

8-40

4.7M

:t o.

l

-=-

Owg. No. A-ll.405B

I) I

HAI1EmCT DEVICES

IJ

SECTION 9-HALL EFFECT DEVICES
Selection Guide .................................................. 9-2
UGN-30l3T/U Low-Cost Digital Switch .................................. 9-3
UGN/UGS-3019T/U Low-Cost Digital Switch .............................. 9-5
UGN/UGS-3020TlU Low-Cost Digital Switch .............................. 9-7
UGN/UGS-3030TlU Bipolar Digital Switch ................................ 9-9
UGN-3035U Magnetically-Biased Bipolar Digital Latch. . . . . . . . . . . . . . . . . . . . . . .. *
UGN-3040T/U Ultra-Sensitive Digital Switch .............................. 9-11
UGN/UGS-3075T1U Bipolar Latch ...................................... 9-14
UGN/UGS-3076T/U Bipolar Latch ...................................... 9-17
UGN-3201M and 3203M Dual Output Digital Switches ....................... 9-20
UGN-3220S Dual Output Digital Switch ................................. 9-23
UGN-3501M Linear Output Hall Effect Sensor ............................. 9-25
UGN-3501T/U Linear Output Hall Effect Sensor ............................ 9-28
UGN-3503U Linear Output Hall Effect Sensor .............................. *
UGN-3604M and 3605M Hall Effect Sensor Elements ........................ 9-31
Application Notes:
Hall Effect Integrated Circuit Application Guide ........................ 9-33
*New Product. Contact factory in Concord, N.H., for information.

II

9-1

HALL EFFECT DEVICES

SELECTION GUIDE TO HALL EFFECT DEVICES
Device Type
UGN-3013T/U
UGN/UGS-30 19TIU
UGN/UGS-3020T/U
UGN/UGS-3030T/U
UGN-3035U
UGN-3040T/U
UGN/UGS-3075T/U
UGN/UGS-3076T/U
UGN-3201M
UGN-3203M
UGN-3220S
UGN-3501M
UGN-3501T/U
UGN-3503U
UGN-3604M
UGN-3605M

Switch Points (Gauss)
225
300
165
110
- 25
100
-100
-100
300
100
160

300
420
220
160
+ 25
150
+100
+100
450
235
220
Linear
Linear
Linear
Linear
Linear

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

9-2

Outputs
1
1
1
1
1
1
1
1
2
2

2
Push-Pull
1
1
Push-Pull
Push-Pull

UGN-3013T HALL EFFECT DIGITAL SWITCH

UGN-3013T SOLID-STATE
LOW-COST HALL EFFECT DIGITAL SWITCH
FEATURES
• Operate from 4.5 V to 16 V D-C Power Source
• Activates With Small, Commercially Available
Permanent Magnets
• Solid-State Reliability - No Moving Parts
• Small Size
• Constant Amplitude Output
• Output Compatible With All Digital Logic Families

THE SPRAGUE TYPE UGN-3013T is a low-cost
magnetically-activated electronic switch. Each
device consists of a voltage regulator, a Hall voltage
generator, amplifier, Schmitt trigger, and an open
collector output stage integrated in a single
monolithic silicon chip.
The on-board regulator permits operation over a
wide variation of supply voltages. The circuit output
can be interfaced directly with bipolar or MOS logic
circuits.
UGN-3013T integrated circuits are packaged in
the miniature 3-pin single output plastic' 'T" pack.

ELECTRICAL CHARACTERISTICS at Vee

Owg. NO. A-ll.002

FUNCTIONAL BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 17 V
Magnetic Flux Density. B ..................... Unlimited
Output OFF Voltage, VOl/nOFf) . . . . . . . . . . . . . . . . . . . . .. 17 V
Output ON Current, ISINK •••••••••••••••••••••••• 25 rnA
Operating Temperature Range, TA ••••••••••• O°C to + 70°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C

= 4.5 V to 16 VDC, TA =

+25°C
Limits

Characteristic
Operate Point
Release Point
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current

Symbol

Test Conditions

10FF

Icc

Output Rise Time

tr

Output Fall Time

tf

Max.
450

-

-

Units
Gauss
Gauss
Gauss
mV
J.loA
rnA
rnA
ns

-

100

-

ns

-

Bop
BRP
BH
VSAT

Typ.
300
225
75
120
0.1
7.0
12
15

Min.
25
30

B 2: 450 Gauss, ISINK = 15 rnA
B :5 25 Gauss, Vour = 16 V
Vee = 5 V, Output open
Vee = 12 V, Output open
Vee = 12 V, Rl = 820 n,
Cl = 20 pF
Vee = 12 V, Rl = 820 n,
Cl = 20 pF

9-3

-

-

400
20
9.0
16

UGN-3013T HALL EFFECT DIGITAL SWITCH

OPERATION
The output transistor is nonnally "off" when the
magnetic field perpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," the
output transistor switches "on" and is capable of
sinking 25 rnA of current.
The output transistor switches "off" when the
magnetic field is reduced below the "release point"
which is less than the "operate point." This is
illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.

For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at its surface.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss.

The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" ±0.002" (0.81 ±0.05 mm)
below the branded surface of the T package and
0.012" ±0.002" (0.30 ±0.05 mm) below the
branded surface of the U package.

The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet. of 0.031" (0.79 mm).

TRANSFER CHARACTERISTICS SHOWING HYSTERESIS

121---='--~--,

:O.P.1300

OFF

I

I

II

iI

II Ii

I
I
I

I
I
I
I
I
I

I

I
I
I

I
I
I
I
I
I

I

:1

liON

225 iR. P.

I

I
I

I
I

°o~-7.10~O-~2~OO':~~OO~=;~~==~500~~~
MAGNET! C FLUX DENSITY IN GAUSS
Dwg. No. A-ll.003

These Hall effect devices are also available in a miniature 3 -pin plastic
"U" package. The "T" package is 0.080" (2.03 mm) thick; the "U"
package is 0.061" (1.54 mm) thick. All other dimensions are identical.

9-4

UGN-3019T/U AND UGS-3019T/U
LOW-COST HALL EFFECT DIGITAL SWITCHES

UGN-3019T/U AND UGS-3019T/U
LOW-COST HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•

D-C Operation from 4.5 V to 24 V
Operable with a Small Permanent Magnet
High Reliability - No Moving Parts
Small Size
Constant Amplitude Output
Output Compatible with All Digital logic Families

low-cost, magnetically-activated elecT HESE
tronic switches use the Hall Effect to sense a
magnetic field. Each circuit consists of a voltage
regulator, Hall cell, signal amplifier, Schmitt trigger, and current-sinking output stage on a monolithic
silicon chip.
The switches' outputs can be used directly with
bipolar or MOS logic circuits. The on-board regulator ensures stable operation over a wide range of
supply voltages. Operation over an extended temperature range is made possible by carefully matching
integrated circuit components.

o.g.

NO. A-1I.002

FUNCTIONAL BLOCK DIAGRAM

Type UGN-3019T/U and UGS-3019T!U digital
switches are available in two three-pin single-output
plastic packages: The ''T'' package is 80 mils (2.03
mm) thick; the "U" package is 60.5 mils (1.54 mm)
thick.

ABSOLUTE MAXIMUM RATINGS
Power Su pply, Vee . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Magnetic Flux Density, B ....................................... Unlimited
Output OFF Voltage, Vom ........................................... 25 V
Output ON Current, ISINK • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 25 mA
Storage Temperature Range, Ts ........................... -65ac to + 150ac
Operating Temperature Range, TA
UGS-3019T/U ...................................... -55°C to + 150ac
UGN-3019T/U ....................................... -20ac to +85"C

ELECTRICAL CHARACTERISTICS at Vee
Characteristic

=

Symbol

4.5 Vto 24 V, TA

=

+25°C (unless otherwise noted)

Test Conditions

Min.

Typ.

Limits
Max.

Units

420

500

Gauss

300

-

Gauss

120

-

Gauss

-

100

400

mV

-

0.1

1.0

p.A

Operate Point·

Bop

-

Release Point·

BRP

125

Hysteresis

BH

50

Output Saturation Voltage
Output leakage Current
------Supply Cu rrent

VSAT

B ~ 500 Gauss,

10FF

B '" 125 Gauss, Vom

Icc

Vee

-

2.5

5.0

mA

Vee

-

3.5

7.0

mA

-

100

-

ns

-

500

-

ns

Output Rise Time

t,

Output Fall Time

tl

------.---

= 20 mA
= 24 V

-

ISINK

= 4.5 V, Output Open
= 24 V, Output Open
Vee = 12 V, Rl = 820n,
Cl = 20 pF
Vee = 12 V, Rl = 820n,
Cl = 20 pF

'Magnetic flux density is measured at most sensitive area of device. located 0.032" ±0.002 CO.8! ±0.05 mm) below the branded face of the "T" package and
0.012" ±0.002" (0.305 ±0.05 mm) below the branded face of the "U" package.

9-5

o

UGN-3019T/U AND UGS-3019T/U
LOW-COST HAll EFFECT DIGITAL SWITCHES

OPERATION

TRANSFER

CHARACT~RISTICS

SHOWING HYSTERESIS

The output transistor is normally OFF when the
magnetic field perpendicular to the surface of the
chip is below the threshold or Operate Point. When
the field exceeds the Operate Point, the output transistor switches ON and is capable of sinking 25 rnA
of current. Selections to 30 rnA are available.
The output transistor switches OFF when the
magnetic field is reduced below the Release Point
(which is less than the Operate Point). This is illustrated in the transfer characteristics graph. The hysteresis characteristic provides for unambiguous or
non-oscillatory switching.

o~~~~~~
o
100
200
300
0400
500
600

The simplest form of magnet that will operate the
Hall Effect digital switch is a bar magnet as shown.
Other methods are possible.

MAGNETIC FLUX DENSITY IN GAUSS
Dwg. No. A-901SC

at the active Hall-sensing area of the device would be
approximately 850 gauss (0.032" (0.81 mm) below
the package surface).

In the illustration, the magnet's axis is on the
centerline of the packaged device and the magnet is
moved toward and away from the device. Also, note
the orientation of the magnet's south pole in relation
to the branded surface of the package.

The flux density would drop to approximately 600
gauss with an rur gap between the package and the
magnet of 0.031" (0.79 mm).
Switching-point .variations with temperature
should be considered in applications covering a wide
temperature range.

The magnetic flux density is indicated for the most
sensitive area of the device. This area is 0.032"
±0.002" (0.81 ±0.05 mm) below the branded surface of the "T" package, 0.012" ±0.002" (0.305
±0.05 mm) below the branded surface of the "U"
package.

SWITCHING POINT VARIATION WITH TEMPERATURE
600

For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at their surfaces.

500

TVPIJ,L OPERATE POINT

~400
=>
<
<.!)

.--

>=300

I-

VI

...",.

z

The flux density decays at a high rate as the distance from a pole increases. As an example, using
the Alnico VIII magnet referenced above in good
alignment and with the pole surface in contact with
the branded surface of the package, the flux density

~

_
kAsrtOltlT
~I'\CA\.RE

~200

x

Vee

:3

..... 100

o
-50

-25

o

+25

+50

+15

TEMPERATURE IN

BASIC 'HEAD-ON' MODE OF OPERATION

DI!'G. MO. A-9762

-

De

i 4.5V

+100 +125 +150
Dwg. No. A-ll.004

Guide to Installation
1. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sink the leads during hand-soldering. For wave soldering, the part
should not experience more than 260°C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.

9-6

UGN-3020T AND UGS-3020T
HALL EFFECT DIGITAL SWITCHES

UGN-3020T AND UGS-3020T
LOW-COST HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•
•

Operate from 4.5 V to 24 V D-C Power Source
Operable With a Small Permanent Magnet
High Reliability- Eliminates Contact Wear, Contact Bounce
No Moving Parts
Small Size
Constant Amplitude Output
Output Compatible With All Logic Families

0wQ. NO. A-ll.OO2

THE TYPE UGN-3020T and UGS-3020T are lowcost magnetically-activated electronic switches
utilizing the Hall effect for sensing a magnetic field.
Each circuit consists of a voltage regulator, Hall cell,
signal amplifier, Schmitt trigger, and current sinking
output stage integrated in a single monolithic silicon
chip.

FUNCTIONAL BLOCK DIAGRAM

These devices are packaged in the 3-pin single output plastic "T" pack.
These devices were originally introduced with ULN
and ULS prefixes.

The on-board regulator permits stable operation
over a wide variation of supply voltages. Operation
over an extended temperature range is made possible
by the careful matching of components which can be
done economically only on a monolithic circuit.
Both devices will typically operate up to a 100 kHz
repetition rate.

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ............................. 25 V
Magnetic Flux Density, B ..................... Unlimited
Output OFF Voltage, VOUT(Off) . . . . . . . . . . . . . . . . . . . . .. 25 V
Output ON Current, ISINK ' ....................... 25 rnA
Operating Temperature Range, TA
UGS-3020T ..................... - 40°C to + l25°C
UGN-3020T . . . . . . . . . . . . . . . . . . . . . . .. DoC to + 70°C
Storage Temperature, Range, Ts ......... - 65°C to + 150°C

The circuit output can be interfaced directly with
bipolar or MOS logic circuits.

ELECTRICAL CHARACTERISTICS at Vee = 4.5 Vto 24 VDC, TA =

+ 25°C
Limits

Characteristic
Operate Point
Release Point
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current

Symbol
Bop
BRP
BH
VSAT
IOff
Icc

Output Rise Time

t,

Output Fall Time

tf

Test Conditions

Max.
350

-

Typ.
220
165
55
85
0.1
5.0
6.0
15

-

Units
Gauss
Gauss
Gauss
mV
/LA
rnA
rnA
ns

-

100

-

ns

Min.
-

50
20
B2: 350 Gauss, ISINK = 15 rnA
Bs 50 Gauss, yOU! = 24 V
Vee = 4.5 V, Output open
Vee = 24 V, Output open
Vee = 12 V, RL = 820 n,
CL = 20 pF
Vee = 12 V, RL = 820 n,
CL = 20 pF

9-7

-

-

-

400
20
9.0
14

UGN-3020T AND UGS-3020T
HALL EFFECT DIGITAL SWITCHES

OPERATION
The output transistor is nonnally "off" when the
magnetic field perpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," the
output transistor switches "on" and is capable of
sinking 25 rnA of current. Selections to 50 rnA are
available.
The output transistor switches "off" when the
magnetic field is reduced below the' 'release point"
which is less than the "operate point." This is
illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.

(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at the pole
surfaces.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss.

The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" ±0.002" (0.81 ±0.05 mm)
below the branded surface of the T package and
0.012" ±0.002" (0.30 ±0.05 mm) below the
branded surface of the U package.

The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet of 0.031" (0.79 mm).

For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"

Note: Switching point variations with temperature should be considered in applications covering a
wide temperature range.

SWITCHING POINT VARIATION WITH TEMPERATURE

TRANSFER CHARACTERISTICS SHOWING HYSTERESIS

600
12

500

t-..:::::==---,-.,
1°· P.

:1'ON

v;
~

400

~,

~

> 300
>Vl

Z

~ 200
x

3

'"-100

o-50

----

I

~CAL IRELEASE POINl

---

-25

-

1YPICAL OPERA1E POINl

OFF I
VCC =4.5V

o

R.

+75

°c

+100

I:

p~

oL-~~==~~~~

I

+25
+50
TEMPERATURE IN

+12V

o

+125 +150

Dwg. No. A-ll,Oll

100
200
300
400
500
600
MAGNETIC FLUX DENSITY IN GAUSS
Dwg. No. A-11.010

These Hall effect devices are also available in a miniature 3 -pin plastic
"U" package. The "T" package is 0.080" (2.03 mm) thick; the "U"
package is 0.061" (1.54 mm) thick. All other dimensions are identical.

9-8

UGN-3030T/U AND UGS-3030T/U
BIPOLAR HALL EFFECT DIGITAL SWITCHES

UGN-3030T/U AND UGS-3030T/U
BIPOLAR HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•

Operable with Inexpensive Multipole Ring Magnets
High Reliability - No Moving Parts
Small Size
Compatible with All Digital Logic Families

LOW-COST HALL EFFECT switches are
THESE
designed for use with inexpensive multipole
ring magnets. Both devices operate with supply voltages of 4.5 V to 24 V.
Type UGN-3030T /U operates over the temperature range of -20°C to +S5°C. Type UGS-3030T /
U, intended for use in more severe automotive environments, operates over the temperature range of
-55°C to + 125°C.
Circuit output of both Hall Effect ICs can be
directly linked to bipolar or MaS logic circuitry. The
switches provide a constant amplitude output at
switching frequencies of up to 100 kHz.

Dwg. No. A-ll.002A

FUNCTIONAL BLOCK DIAGRAM

Types UGN-303OT and UGS-3030T are supplied
in a three-pin plastic package SO mils (2.03 mm)
thick. Types UGN-3030U and UGS-3030U are furnished in a magnetically optimized 60.5-mil (1.54
mm) plastic 3-pin package.

ABSOLUTE MAXIMUM RATINGS
Power Supp~, Vcc ................................................ 25 V
Magnetic Flux Density, B ....................................... Unlimited
Output OFF Voltage, VOUT ••••••••••••••••••••••••••••••••••••••••••• 25 V
Output ON Current, ISINK .......................................... 25 rnA
Storage Temperature Range, Ts ........................... -65°C to + 150°C
Operating Temperature Range, TA
UGS-3030T/U ..................................... - 55°C to + 125°C
UGN-3030T/U ....................................... -20°C to +85°C

ELECTRICAL CHARACTERISTICS at Vee

=

4.5 Vto 24 V, TA r +25°C (unless otherwise noted)
Limits

Characteristic
Operate Poi nt *
Release Point·
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current

Symbol

Test Conditions

Max.
250

-

Typ.
160
110
50
100
0.1
2.5
3.5
100

-

500

-

Min.
-

Bop

-250
20

BRP
BH

VSAT

B '" 250 Gauss, I~NK = 20 rnA

-

IOFF
Icc

B s -250 Gauss, VOUT = 24 V

-

Vcc = 4.5 V, Output Open
Vcc = 24 V, Output Open
Vcc = 12 V, Rl = 820 n,
Cl = 20 pF
Vcc = 12 V, Rl = 820 n,
Cl = 20 pF

-

Output Rise Time

tr

Output Fall Time

tf

-

-

400
1.0
5.0
7.0
-

Units
Gauss
Gauss
Gauss
mV
p,A
rnA
rnA
ns
ns

'Magnetic flux density is measured at most sensitive area of device, located 0.032" ±0.002 (0.81 ±0.05 mm) below the branded face of the "T" package and
0.012" ±0.002" (0.305 ±0.05 mm) below the branded face of the "U" package.

9-9

UGN·3030T/U AND UGS-303()T/U
iUPOLAR.HALl EFFECT DIGITAL SWITCHES

OPERATION
The output transistor is normally OFF when the
magnetic field perpendicular to the surface of the
chip is below the threshold or Operate Point. When
the field exceeds the Operate Point, the output transistor switches ON and is capable of current-sinking
25mA.

The magnetic flux density is indicated for the most
sensitive area of the device. This area is centrally
located and 0.032" ±0.002" (0.81 ±0.05 mm)
below the branded surface of the "T" package,
0.012" ±0.002" (0.305 ±0.05 mm) below the
branded surface of the "U" package.
The magnetic circuit must provide a +250 gauss
to - 250 gauss magnetic flux density range at this
point for all conditions to ensure reliable operation;
+ gauss indicate~ a South pole is toward the branded
face of the package; - gauss indicates a North pole is
toward the branded package face.
The simplest form of magnet that will operate the
Hall Effect bipolar digital s~tch is a multipole ring
magnet as shown. Such magnets are commercially
available and inexpensive.

The output transistor switches OFF when the
magnetic field is reduced below the "release point"
which is less than the "operate point. " This is illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.

SENSOR·CENTER LOCATION

SWITCH ACTIVATION
WITH MULTIPOLE RING MAGNET

NOTE,
PACKAGE OUTLI NE
0.178 x 0.178
~

INCH

Dwg. No. A-II,899

MM

TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
MAX.
---,O.P.

1V

'"

!::i
0
>
~

~

!:3
0
>

I-

:::>

"-

l-

:::>

0

I
I
I

I

OFF I

J

.,:

6

-

-

-

.,:
d

oi
--'
<
u
c;:

5c;:

i!:

I-

>

I
I
I
I
I
I

+12V

ION
I
I
I

R.p.L - -300
-200
-100
0
+100
+200
H NORTH POl[
GAU SS
SOUTH POl[
MAGNETIC FWX DENSITY

~
': ' "

UT

+300
(+ I
Dwg. No. A-ll,040

9-10

GUIDE TO INSTALLATION
1. All Hall Effect integrated circuits are susceptible to mechanical
stress effects. Caution should be
exercised to minimize the application of stress to the leads or the
epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit, heat-sink the leads during
hand-soldering. For. wave soldering, the part should not experience
more than 260°C for more than five
seconds. Solder flow should be no
closer than O. 125" (3.18 mm) to the
epoxy package.

UGN-3040T
ULTRA-SENSITIVE HALL EFFECT DIGITAL SWITCH

UGN-3040T
ULTRA-SENSITIVE HALL EFFECT DIGITAL SWITCH
FEATURES
•
•
•
•
•
•

Vee

Operate from 4.5 V to 24 V D-C Power Source
Operable With Small Permanent Magnets
Solid-State Reliability - No Moving Parts
Small Size
Constant Amplitude Output
Output Compatible With All Digital Logic Families

THE SPRAGUE TYPE UGN-3040T is a
magnetically-activated electronic switch with
extreme sensitivity for use with small, inexpensive magnets, or with relatively large magnet-toswitch distances.
Each circuit consists of a voltage regulator,
Hall voltage generator, signal amplifier, Schmitt
trigger circuit, and an open collector output
driver integrated in a single silicon chip.
The on-board regulator permits operation
over a wide range of supply voltages. Circuit
output can be interfaced directly with bipolar or
MOS logic circuits, and will typically operate up
to a 100 kHz repetition rate.

Owg. NO. A-ll.OO2

FUNCTIONAL BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ............................. 25 V
Magnetic Flux Density, B.................... Unlimited
Output "OFF" Voltage, VOUT(OFf) .................. 25 V
Output "ON" Current, ISINK .................... 25 mA
Storage Temperature Range, Ts ........ -65°C to +150 oC
Operating Temperature Range, TA .......... O°C to +70°C

The UGN-3040T is packaged in a miniature
3-pin single-output plastic "T" pack.

ELECTRICAL CHARACTERISTICS at Vee

= 4.5 Vto 24 VDC, TA = + 25°C
Limits

Characteristic
Operate Point
Release Point
Hysteresis
Output Saturation Voltage
Output Leakage Current
Supply Current

Symbol

Test Conditions

10FF

lee

Output Rise Time

tf

Output Fall Time

it

Max.
200

-

-

Units
Gauss
Gauss
Gauss
mV
ILA
rnA
rnA
ns

-

100

-

ns

Min.

-

Bop
BRP
BH
VSAT

Typ.
150
100
50
85
0.1
5.0
6.0
15

50
20

B2: 200 Gauss, ISIN• = 20 rnA
B:s 50 Gauss, VOUT = 24 V
Vee = 4.5 V, Output open
Vee = 24 V, Output open
Vee = 12 V, RL = 820 n,
CL = 20pF
Vee = 12 V, RL = 820 n,
CL = 20 pF

9-11

-

-

-

400
20
9.0
14

UGN·3040T
ULTRA· SENSITIVE HALL EFFECT DIGITAL SWITCH

Guide to Installation
1.. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sink the leads during hand-soldering. For wave soldering, the part
should not experience more than 260°C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.

SWITCHING POINT
AS A FUNCTION OF TEMPERATURE
250

- -- ...
--- --.......

~

~ i""""

r-'

,

~

--

l~ ~

I--

-~

p'~1

"".,.

!"""

.,.",.

25
TEMPERATURE IN ·C

50
Owg.

70
No. "'-11,198

These Hall effect devices are also available in a miniature 3 -pin plastic
"U" package. The "T" package is 0.080" (2.03 mm) thick; the "U"
package is 0.061" (1.54 mm) thick. All other dimensions are identical.

OPERATION
The simplest form of magnet which will
operate the Hall Effect digital sensor is a bar
magnet as ,shown. Other methods are possible.
In the illustration, the magnet's axis is on the
center line of the packaged device and the
magnet is moved toward and away from the
device. Also, note the orientation of the
magnet's south pole in relation to the branded
face of the package.

Owe. No. A-ll,200

BASIC 'HEAD·ON' MODE OF OPERATION

9-12

UGN-3040T
ULTRA-SENSITIVE HALL EFFECT DIGITAL SWITCH
SENSOR CENTER LOCATION

' ' 1I

TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
12

TIl"

.""

I
I

V>

:;

Tif

~9

,IT5...

rl

~

~

.,:1
""I
.... 1
51
<>:1

~6
0

>

....
:::>
0..

~I

~ 3

I
I

0

..

I
I

INCH

25

50

75

+12V

[$lv~

I ....

I~
Is;!

1'-

IP

1:C

:l

100 125 150

175 200

MAGNETIC FLUX DENSITY IN GAUSS
Dwg. No.

A~Il.199

OPERATION (Continued)
The output transistor is normally "off" when
the magnetic field perpendicular to the surface
of the chip is below the threshold or "operate
point." When the field exceeds the "operate
point," the output transistor switches "on" and
is capable of sinking 25 rnA of current. A 50 rnA
unit is available upon special order.

The magnetic flux density is indicated for the
most sensitive area of the device. This area is
centrally located 0.032" ± 0.005" (O.SI
±0.127mm) below the branded surface of the
T package and 0.012'±0.005" (0.30 ±0.127 nun)
below the branded surface of the U package.
A variety of magnets are commercially
available, each exhibiting unique field
characteristics. The curves presented below are
flux density values for the magnets measured for
'switch activation in a head-on mode (along the
magnet axis). The curves are also pertinent for
peak flux density for a given clearance in the
slide-by mode of actuation.

The output transistor switches "off" when
the magnetic field is reduced below the "release
point" which is less than the "operate point."
This is illustrated graphically in the transfer
characteristics curve. The hysteresis
characteristic provides for unambiguous or nonoscillatory switching.

FLUX DENSITY AS A FUNCTION OF AIR GAP
300r-----__rTr-~----~r--,~--~--------_.--------_r--------,
(U.250': CU BE, RU BBER
(2) .1" x .1" x .125", SAMARIUM COBALT
(3).212"0 x .187" L. ALNI CO 8
(41. 240" D x .400" L. CERAMI C
(5).188" CUBE, SAMARIUM COBALT
(6).250" CUBE, SAMARIUM COBALT

V>
V>

~200r---------~~~~~~--~--~~--~~-T~~~~~~~----~
~

>....
V>

i::'o i

~100~--------~--~.-~~.-~~~--~-----+~~-----r--------~
u
;::
~

'"~
0.1

0.2

0.3
AIR GAP IN INCHES

9-13

0.4

0.5
Dwg, No. 8-1446

0.6

UGN-307ST/U AND UGS-307ST/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

UGN-3075T/U AND UGS-3075T/U
BIPOLAR HALL EFFECT DIGITAL LATCHES
FEATURES
•
•
•
•
•
•

Operable with Inexpensive Multipole Ring Magnets
High Reliability - No Moving Parts
Small Size
Output Compatible with All Digital Logie Families
Symmetrical Output
High Hysteresis Level Minimizes Stray-Field Problems

MAGNETICALLY-ACTIVATED,
T HESE
solid-state latches are designed for use with inexpensive multipole ring magnets and brushless doc
motors. They provide effective, reliable interface
between clectromechanical equipment and bipolar or
MOS logic circuits at switching frequencies of up to
100 kHz.
The bipolar output of these devices saturates when
the Hall cell is exposed to a lllagnetic flux density
greater than the oN threshold (100 G typical, 250 G
maximum). The output transistor remains in the ON
state until magnetic field reversal exposes the Hall
cell to. a magnetic flux density below the OFF
threshold (-100 G typical, -250 G minimum).
Because the operating state switches only with
magnetic field reversal, and not merely with a
change in its strength, theSe integrated circuits qualifyas true Hall Effect latches.

0Wg. No. A-ll,002A

FUNPIONAL BLOCK DIAGRAM

Type UGN-3075T!U is rated for operation over
the temperature range of -20°C to +S5°C. For applications in more severe environments, Type
UGS-3075T!U has an operating temperature range
of -55°C to + 125°C. Both types work with supply
voltages of 4.5 to 24 V.
Both Hall Effect latches are supplied in either the
SO-mil (2.03 mm) three-pin plastic "T" package or
the magnetically optimized 60.5-mil (1.54 mm)
three-pin plastic "U" package.

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ................................................ 25 V
Magnetic Flux Density, B ....................................... Unlimited
Output OFF Voltage .............................................. 25 V
Output ON Current, ISINK .......................................... 50 mA
Operating Temperature Range, TA
UGS-3075T/U· ..................................... -SSOC to + 125"C
UGN-3075T/U ....................................... -20"C to +85"C
Storage Temperature Range, Ts ...•....................... -65°C to + I50"C
·Selected devices are available with a maximum TA rating of

9-14

+ 150"C.

UGN-307ST/U AND UGS-307ST/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

Catalog Numbering System

L=

UG

N - 3075

T

PACKAGE STYLE. T = PLASTIC HEAD SIP 0.080" (2.03 mm) THICK
U = PLASTIC HEAD SIP 0.061" 0.54 mm) THICK
DEVICE NUMBER. 3000 -

3199 = DIGITAL, SINGLE OUTPUT

' - - - - - OPERATING TEMPERATURE RANGE.
N = -20"C to +85"C
S = -55"C to + 125°C
'----SEMiCONDUCTOR FAMILY. UG = HALL EFFECT DEVICES

ELECTRICAL CHARACTERISTICS at TA = +25°C. Vee = 4.5 V to 24 V (unless otherwise noted)
Characteristic
Operate Point*
Release Point*
Hysteresis *
Output Saturation Voltage
Output Leakage Current
Supply Current
Output Rise Time
Output Fall Time

Symbol
Bop
BRP
BH
VSAT

Test Conditions

Min.
50
-250
100

B " 250 Gauss, I~NK = 20 rnA
B s -250 Gauss, VOUT = 24 V
B s -250 Gauss, Vcc = 24 V, Output Open
Vcc = 12 V, Rl = 820n, Cl = 20 pF
Vee = 12 V, Rl = 820n, Cl = 20 pF

10FF

Icc
t,
tr

-

-

Typ.
100
-100
200
85
0.2
3.0
100
200

Max.
250
-50
-

400
1.0
7.0

Units
Gauss
Gauss
Gauss
mV

-

-

/LA
rnA
ns
ns

·Magnetic flux dens~y is measured at most sens~ive area of device located 0.032" ±O.002" (0.81 mm ±0.05 mm) below the branded face of the 'T'
package and 0.012" ±0.002" (0.31 mm ±0.05 mm) below the branded face of the 'U' package.

SENSOR-CENTER LOCATION

GUIDE TO INSTALLATION

NOTE,
PACKAGE OUlll NE
0.118 X 0.118
U2XU2

1. All HaIl Effect integrated circuits are susceptible to mechanical
stress effects. Caution should be
exercised to minimize the application of stress to the leads or the
epoxy package.
2. To prevent permanent damage to the HaIl cell, heat sink the
leads during hand soldering. For
wave soldering, the part should not
experience more than 260°C for
more than five seconds. Solder flow
should be no closer than 0.125"
(3.18 mm) to the epoxy package.

INCH

MM
DII&.1I0. A·ll,896

9-15

UGN-307ST/U AND UGS-307ST/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

OPERATION

TYPICAL TRANSFER CHARACTERISTICS

The output transistor is normally OFF when the
strength of the magnetic field perpendicular to the
surface of the chip is below threshold or the Operate
Point. When the field strength exceeds the Operate
Point, the output transistor switches ON and is capable of current sinking 50 rnA of current.
The output transistor switches OFF when magnetic field reversal results in a magnetic flux density
below the OFF threshold. This is iliustrated in the
transfer characteristics graph.

20
V>

::;
0

>
z

15

I vcc =12V I

....
r.!>

~

10

is

5.0

I

....
:::>
"....

The simplest form of magnet that will operate
Types UGN-3075T IU and UGS-3075T IV is a ring
magnet, as shown in Figure 1. Other methods of
operation are possible.

OPERATE
IPOINT

OFFt

,
I
I

I

I

o

-250

,,,
,

RELEASE,
POINT i
-125

iON
125

North Pole

250

South Pole

MAGNETIC FLUX DENSITY IN GAUSS
Dwg.No. A-ll.739

PEAK FLUX DENSITY AS A FUNCTION
OF TOTAL EFFECTIVE AIR GAP

Plastic 20-Pole Pair Ring (Radial Poles)
1" (25.4 mm) in diameter
and 0.2" (5.1 mm) long
with 0.01" (0.25 mm) clearance
Dwg. No. A-ll.899
400r---r----r------~r-------~

Figure 1

Note that the device latches; that is, a south pole of
sufficient strength will tum the device ON. Removal
of the south pole will leave the device ON. The
presence of a north pole of sufficient strength is
required to turn the device OFF.

V>
V>

:::>

300

c(

r.!>

~

>....
Vl

i'S. 200
c

ACTIVE AREA DEPTH (AAOl

x

~

The magnetic flux density is indicated in the
operating-points graph for the active area of the device, which is located 0.032" (0.81 mm) below the
branded surface of the "T" package and 0.012"
(0.31 mm) below the branded surface of the "U"
package. Note that, as shown in the plot of magnetic
flux density as a function of total effective air gap,
the "U" package offers a significant advantage in
marginal flux density conditions for certain magnetic
configurations.

u

UGN-3075T, 167 G
(0.032" AAD)

;::
::!;!
r.!>

~ 100

0.05
0.10
0.15
TOTAL EFFECTI VE AI R GAP I N INCHES
(ACTI VE AREA DEPTH PLU S CLEARANCE)
Dwg.No. A-ll.738

9-16

UGN-3076T/U AND UGS-3076T/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

UGN-3076T/U AND UGS-3076T/U
BIPOLAR HALL EFFECT DIGITAL LATCHES
FEATURES
•
•
•
•
•
•

Operable with Inexpensive Multipole Ring Magnets
High Reliability - No Moving Parts
Small Size
Output Compatible with All Digital Logic Families
Symmetrical Output
High Hysteresis Level Minimizes Stray-Field Problems

THESE SOLID-STATE, magnetically-activated
latches, designed for use with brushless d-c
motors and in~xpensive multipole ring magnets, operate as effective, reliable interface between electromechanical equipment and bipolar or MOS logic
circuits at switching frequencies of up to 100 kHz.
The bipolar output of these devices saturates when
the Hall cell is exposed to a magnetic flux density
greater than the ON threshold (l00 G typical, 350 G
maximum). The output transistor remains in the ON
state until magnetic field reversal exposes the Hall
cell to a magnetic flux density below the OFF
threshold (-100 G typical, -350 G minimum).
Because the operating state switches only with
magnetic field reversal, and not merely with a
change in its strength, these integrated circuits qualify as true Hall Effect latches.

OW9. No. A-ll.002A

FUNCTIONAL BLOCK DIAGRAM

Type VGN-3076T IV is rated for operation over
the temperature range of -20°C to +85°C. For applications in more severe environments, Type
VGS-3076T IV has an operating temperature range
of - 55°C to + 125°C. Both types work with supply
voltages of 4.5 to 24 V.
Both Hall Effect latches are supplied in either the
80-mil (2.03 mm) three-pin plastic "T" package or
the magnetically optimized 60.5-mil (1. 54 mm)
three-pin plastic "V" package.

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ................................................ 25 V
Magnetic Flux Density, B ....................................... Unlimited
Output OFF Voltage .............................................. 25 V
Output ON Current, ISINK .......................................... 50 rnA
Operating Temperature Range, TA
UGS-3076T/U' ..................................... -SSOC to + 125°C
UGN-3076T1U ....................................... - 20°C to +85°C
Storage Temperature Range, Ts ........................... -65OC to + 150°C
'Selected devices are available with a maximum TA rating of + 150°C.

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

9-17

UGN-3076T/U AND UGS-3076T/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

Catalog Numbering System

t. ._____

PACKAGE STYLE. T = PLASTIC HEAD SIP 0.080" (2.03 mm) THICK
U = PLASTIC 3-LEAD SIP 0.061" (1.54 mm) THICK

......- - - - DEVICE NUMBER. 3000 L.-_ _ _

3199

= DIGITAL, SINGLE OUTPUT

OPERATING TEMPERATURE RANGE. N = -20"C to +85"C
S = -55"C to + 125"C

' - - - - SEMICONDUCTOR FAMILY. UG = HALL EFFECT DEVICES

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Operate Point*
Release Point·
Hysteresis *
Output Saturation Voltage
Output Leakage Current
Supply Current
Output Rise Ti me
Output Fall Time

=

+25°C, Vee = 4.5 V to 24 V (unless otherwise noted)

Symbol

Test Conditions

Min.
50
-350
100

Bop
BR
BH
VSAT
IOff
Icc
t,
tf

-

B '" 350 Gauss, ISINK = 20 rnA
B "" -350 Gauss, VOUT = 24 V
Vee
Vee
Vee

= 24 V, Output Open, B "" -350 Gauss
= 12 V, Rl = 8200, Cl = 20 pF
= 12 V, Rl = 8200, Cl = 20 pF

-

-

Typ.
100
-100
200
85
0.2
3.0
100
200

Max.
350
-50
-

400
1.0
7.0
-

-

Units
Gauss
Gauss
Gauss
mV
J.LA
rnA
ns
ns

*Magnetic flux density is measured at most sensitive area of device located 0.032" ±O.002" (0.81 mm ±0.05 mm) below the branded face of the T
package and 0.012" ±0.002" (0.31 mm ±0.05 mm) below the branded face of the 'U' package.

SENSOR-CENTER LOCATION

GUIDE TO INSTALLATION
1. All Hall Effect integrated circuits are susceptible to mechanical
stress effects. Caution should be
exercised to minimize the application of stress to the leads or the
epoxy package.
2. To prevent permanent damage to the Hall cell, heat sink the
leads during hand soldering. For
wave soldering, the part should not
experience more than 260°C for
more than five seconds. Solder flow
should be no closer than 0.125"
(3.18 mm) to the epoxy package.

0.001

'[D3

NOTE,
PACKAGE DUTLI NE
0.178 X 0.178
02X02

INCH
MM

OIlG. NO. A·ll.896

9-18

UGN-3076T/U AND UGS-3076T/U
BIPOLAR HALL EFFECT DIGITAL LATCHES

OPERATION
The output transistor is normally OFF when the
strength of the magnetic field perpendicular to the
surface of the chip is below threshold or the Operate
Point. When the field strength exceeds the Operate
Point, the output transistor switches ON and is capable of sinking 50 rnA of current.
The output transistor switches OFF when magnetic field reversal results in a magnetic flux density
below the OFF Threshold. This is illustrated in the
transfer characteristics graph.
The simplest form of magnet that will operate
Types UGN-3076T!U and UGS-3076T!U is a ring
magnet, as shown in Figure 1. Other methods of
operation are possible.

TYPICAL TRANSFER CHARACTERISTICS
20
on

!:i
0
>

15

I VCC ·12V I

::::
~

~
0

~OPERATE

OFF!

IPOINT

,i
!
,

10

I

>

....
=>

,
I

....
0-

:

55.0

o

-250

I

RELEASE,
POINT i
-125

iON
125

North Pole

250

South Pole

MAGNETIC FLUX DENSITY IN GAUSS
Dwg.No. A-ll.739

PEAK FLUX DENSITY AS A FUNCTION
OF TOTAL EFFECTIVE AIR GAP

Plastic 20-Pole Pair Ring (Radial Poles)
1" (25.4 mm) in diameter
and 0.2" (5.1 mm) long
with 0.01" (0.25 mm) clearance
Dwg.No."'-1l.899

Figure 1

Note that the device latches; that is, a south pole of
sufficient strength will tum the device ON. Removal
of the south pole will leave the device ON. The
presence of a north pole of sufficient strength is
required to tum the device OFF.

~
<§

3001---t--+-----t---___i

::::
~

on

~ 2001----++-----t---___i

x

ACTIVE AREA DEPTH (AAD)
The magnetic flux density is indicated in the
operating-points graph for the active area of the device, which is located 0.032" (0.81 mm) below the
branded surface of the "T" package and 0.012"
(0.31 mm) below the branded surface of the "U"
package. Note that, as shown in the plot of magnetic
flux density as a function of total effective air gap,
the "U" package offers a significant advantage in
marginal flux density conditions for certain magnetic
configurations.

~

u

;

UGN-3076T. 167G
(0.032" AADI

'"

~ lOOI-------------~~--------~--------___i

0. 05
Q.l0
0.15
TOTAL EFFECTIVE AIR GAP IN INCHES
(ACTIVE AREA DEPTH PLUS CLEARANCEI
Dwg. No. A-ll.741

9-19

UGN·3201 M AND UGN·3203M
DUAL OUTPUT HALL EFFECT DIGITAL SWITCHES

UGN-3201M AND UGN-3203M
DUAL OUTPUT HALL EFFECT DIGITAL SWITCHES
FEATURES
•
•
•
•
•
•

Operate from 5 V to 16 V o-c Power Supply
Operate With a Sma II Permanent Magnet
High Reliability - No COntact Wear or Bounce
Small Size - 8-Pin DIP
Constant Amplitude Output
Dual Open-COllector Outputs

for use in position sensing and contactI·NTENDED
less switching applications, the Types UGN3201M and UGN-3203M switches utilize the Hall
Effect for detecting a magnetic field.
Both devices feature identical electrical and environmental characteristics. However, the UGN3201M has a typical Operate Point of 450 gauss and
Release Point of 300 gauss; the UGN-3203M is
more sensitive, with a typical Operate Point of 235
gauss and Release Point of 100 gauss. The UGN3203M may be activated by smaller magnets, or at a
greater magnet-device spacing.
The UGN-3201M and UGN-3203M Hall Effect
digital switches are supplied in 8-pin dual in-line
plastic packages. These switches were originally
introduced as device numbers ULN-3006M and
ULN-3007M, respectively.

ELECTRICAL CHARACTERISTICS at Vee

Ilwg, No. A-I1.013

FUNCTIONAL BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee ...................... , . . . . .. 20 V
Magnetic Flux Density, B.......... , . , ...... , . Unlimited
Output OFF Voltage, VOUTIOFF) ..... , . . . . . . . . . . . . . . .. 20 V
Output ON Current, ISINK ' , ...................... 25 rnA
Operating Temperature Range, TA • • • • • • • • • •• O°C to + 70°C
Storage Temperature Range, Ts .. , ...... - 65°C to + 150°C

= 12 VDC, TA = + 25°C
Limits

Characteristic
Operate Poi nt

Symbol
Bop

Release Point

BRP

Hysteresis

BH

Output Saturation Voltage
Output Leakage Current
Supply Current

VSAT
IOFF
leem
Icc(o)

Test Conditions
UGN-3201M
UGN-3203M
UGN-3201M
UGN-3203M
UGN-3201M
UGN-3203M
B 2= 350 Gauss, ISINK = 20 rnA
B :S 25 Gauss, VOI/T = 12 V
B :S 25 Gauss, Outputs open
B 2= 350 Gauss, Outputs open

9-20

Min.

-

100
25

-

-

-

-

Typ.
450
235
300
100
150
135

Max.
750
350

-

400
100
25
25

20
20

-

-

-

Units
Gauss
Gauss
Gauss
Gauss
Gauss
Gauss
mV

f!A
rnA
rnA

UGN-3201M AND UGN-3203M
DUAL OUTPUT HALL EFFECT DIGITAL SWITCHES

Guide to Installation
1. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sink the leads during hand-soldering. For wave soldering, the part
should not experience more than 260°C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.

'M' PACKAGE

DIMENSIONS IN INCHES

DIMENSIONS IN MILL/METRES
Based on 1 in. = 25.4 mm

4

---r0.256

c

~

2

J

WT.JfJT

1

I

5

6

7

4

-r6.50

-

~~.

!t

2.16
>0.13

INDEX (PIN NO.l)

INDEX (PINmNO.
I)

2

1

7.81
7.37

~~._

~

8

3

•

L__

5

6 17

8

9.53
8.26

_L

0.38
0.20

U

r-:;-.!:flf-O-{}-~-L_
MAX~
.

0.125

0.015
MIN

tJ

3. 18
MAX 0.3;T!,f.-Hl~-{I:!.-3i.05-SEATING PLANE
MIN

MIN

..1----

058

O.2g·~~N-CUMULATlVE

0.100 :to.010 NCN~ CUMULATIVE

2.54 ±

0.300 %0.010 " SEATING PLANE

7.62' 0.25 @ SEATING PLANE
DWG. 110. A-9000A 14M

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

9-21

UGN·3201M AND UGN·320.3M
DUAL·OUTPUT HALL EFFECT DIGITAL SWITCHES

OPERATION
The output transistors are nonnally "off" when
the magnetic field·petpendicularto the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point, " .the
output transistors switch "on" and will eachtypically sink 20mA.
The output transistors switch "off" when the
magnetic field is reduced below the' 'release point"
which is less than the "operate point." This is
illustrated graphically in the transfer characteristic
curves. The hysteresis characteristic provides for
unambiguous or non-oscillatory switching regardless of the rate of change of the magnetic. field.

For reference putposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at its surface.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss (0.032" below the package surface).

The magnetic flux density is indicated for the
most sensitive area of the device. This area is centrally located and 0.037" ±O.OOl" (0.94 ±0.05
mm) below the top surface of the package.

The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet of 0.031" (0.79 mm).

TYPICAL TRANSFER CHARACTERISTICS SHOWING HYSTERESIS

VI

!:i 12

g

~ 9

~
!:;

0

6

>

...~

3

50

-

lYPE UGN-3201M

,,

,,
i
to,

,

~

,O.P.
,,

,,
~

I
I
I

R.P.!
0 100 200 300 400 sao 600
MAGNETIC FlUX DENSllY
IN GAUSS

lYPE UGN-3203M

g12

Z
;;; 9

g~

6

...~:::>

3

0

BASIC 'HEAD-ON' MODE OF OPERATION

-,,

,,
,
,,,
t: ~:,
,,
I

I
I
I

I
I
I
I

,
I

R.P.'

I

O.P.

+12V

@:
:

VOUT

,
:

MAGNETIC FLUX DENSITY
IN GAUSS
OWG. NO. A~IO. 307

9-22

UGN-3220S
LOW-COST DUAL OUTPUT HALL EFFECT DIGITAL SWITCH

UGN-3220S
LOW-COST DUAL OUTPUT HALL EFFECT DIGITAL SWITCH
FEATURES
•
•
•
•
•
•
•
•

Operate from 4.5 V to 16 V D-C Power Source
Operable With a Sma II Permanent Magnet
High Reliability-Eliminates Contact Wear, Contact Bounce
No Moving Parts
Small Size
Outputs Compatible With All Logic Families
Operation to 100 kHz
Dual Output Transistors Can Drive Independent Loads

UGN-3220S INTEGRATED CIRCUITS,
T YPE
are low-cost magnetically-activated electronic!

Dwg. No. A-ll.OO7

FUNCTIONAL BLOCK DIAGRAM

switches which utilize the Hall Effect for sensing a
magnetic field.
Each circuit consists of a voltage regulator, Hall
sensor, signal amplifier, Schmitt trigger, and current
sinking output stage, integrated onto a single·
monolithic silicon chip.
The on-board regulator permits operation over a
wide variation of supply voltages. Operation over an
extended temperature range is made possible by the
careful matching of circuit components - something which can be done economically only on a
monolithic circuit.
The circuit output can be interfaced directly with
bipolar or MOS logic circuits.

These devices are supplied in a 4-pin single inline molded package.

ABSOLUTE MAXIMUM RATINGS
Power Supply, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 17 V
Magnetic Flux Density, B ..................... Unlimited
Output OFF Voltage, Vourcom . . . . . . . . . . . . . . . . . . . . .. 17 V
Output ON Current, ISINK ........................ 25 mA
Operating Temperature Range, TA • • • • • • • • • •• O°C to + 70°C
Storage Temperature Range, Ts ......... - 65°C to + 125°C

ELECTRICAL CHARACTERISTICS at Vee = 4.5 Vto 16 VDC, TA = + 25°C
limits
Characteristic
Operate Poi nt
Release Point
Hysteresis
Output Saturation Voltage
Output leakage Current
Supply Current

Symbol
Bop
BRP
BH
VSAT
IOFF
lee

Test Conditions

Min.
-

50
20
B ;:=: 350 Gauss, ISINK = 15 mA
B :5 50 Gauss, Vour = 16 V
Vee = 5 V, B :5 50 Gauss

9-23

-

Typ.
220
160
60
110
0.1
3.5

Max.
350

-

400
20
9.0

Units
Gauss
Gauss
Gauss
mV

tJ.A
rnA

UGN-3220S
LOW-COST DUAL OUTPUT HALL EFFECT DIGITAL SWITCH

OPERATION
The output transistors are normally "off" when
the magnetic field petpendicular to the surface of the
chip is below the threshold or "operate point."
When the field exceeds the "operate point," each
output transistor switches "on" and is capable of
sinking 25 rnA of current. Selections to 30 rnA are
available.
The output transistors switch "off" when the
magnetic field.is reduced below the "release point"
(which is less than the "operate point"). This is
illustrated graphically in the transfer characteristics
curve. The hysteresis characteristic provides for unambiguous or non-oscillatory switching.

For reference purposes, both an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"
(4.75 mm) long and a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, are approximately 1200 gauss at its surface.
The flux density decays at a high rate as the
distance from a pole increases.
As an example, using the Alnico VIII magnet
referenced above in good alignment and the pole
surface in contact with the branded surface of the
package, the flux density at the active Hall sensing
area of the device would be approximately 850
gauss (0.032" below the package surface).

The magnetic flux density is indicated for the
most sensitive area of the device. This area is centrally located and 0.032" ±0.002" (0.81 ±0.05
mm) below the branded surface of the package.

The flux density would drop to approximately 600
gauss with an air-gap between the package and the
magnet of 0.031" (0.79 mm).

BASIC 'HEAD-ON' MODE OF OPERATION
TRANSFER CHARACTERISTICS SHOWING HYSTERESIS

12
I

I
I

I
In

I
I
I
I

9

!::;
0

>

I
I
I
I
I

:::
..,


OFF

~

I

t!

~
~

:::J

I
R. P.,

0

00

10. P.

i!

ION
I
I
I
I
I
I
I
I

Owq. No. A-ll,OOB

+12V

~T

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301

I
I
I
I
I

I

100
200
300
400
500
MAGNETIC FLUX DENSITY IN GAUSS

600

(603) 224-1961

Owg. No. A-ll.OO6

9-24

UGN-3501M
SOLID-STATE LINEAR HALL EFFECT SENSOR

UGN-3501M
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSOR
FEATURES
•
•
•
•

Excellent Sensitivity
Flat Response to 25 kHz (typ.)
Internal Voltage Regulation
Excellent Temperature Stability

UTILIZING THE HALL EFFECT for sensing
a magnetic field, Type UGN-3501M ICs provide a
linear differential output which is a function of
magnetic field intensity.
GND

These devices are intended for applications
requiring accurate measurement and/or control of
position, weight, thickness, velocity, etc.

Ot«J.H(}. A-IO.S26A

FUNCTIONAL BLOCK DIAGRAM

The Type UGN-350IM Hall Effect IC includes a
monolithic Hall cell, linear differential amplifier,
differential emitter follower output, and a voltage
regulator. Integrating the Hall cell and the amplifier
into one monolithic device minimizes problems
related to the handling of millivolt analog signals.

ABSOLUTE MAXIMUM RATINGS

Provisions are included for output offset null.
This sensor is supplied as a 8-pin dual in-line plastic
package and is rated for continuous operation over
the temperature range of O°C to + 70°C and a
voltage range of 8 to 16 volts d-c.

Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . .. + 16 V
Output Current, loUT ........................... 2 rnA
Magnetic Flux Density, B..................... Unlimited
Operating Temperature Range, TA . . . . . . . . . .. O°C to + 70°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C

ELECTRICAL CHARACTERISTICS at Vee

= 12 VDC, TA = + 25°C (unless otherwise specified)
limits

Characteristic
Operating Voltage
Supply Current
Output Offset Voltage
Output Common Mode Voltage
Sensitivity

Symbol
Vee

Test Conditions

Icc

Sensitivity

I1VouT

Vee = 16 V
B = 0 Gauss, R-5-6-7 = 0 n, Note 1
B = 0 Gauss, Note 1
B = 1000 Gauss, R5-6-7 = 0 n,
Notes 1,2
B = 1000 Gauss, R5-6 = 15 n,
Notes 1, 2
R5-6-7 = on, fH - flat -3dB
f = 10 Hz to 10 kHz,
R5-6-7 = 0 n
R5-6-7 = 0 n

Frequency Response
Broadband Output Noise
Output Offset Voltage
vs. Temperature

VOFf
VeM
I1VOUT

BW
en
I1VoFF/l1T

Min.
8.0

Typ.

700

10
100
3.6
1400

650

-

Units
V
rnA
mV
V
mV

1300

-

mV

-

25
0.15

-

kHz
mV

-

0.20

-

mVioC

-

-

Max.
16
18
400

-

NOTE 1. All output voltage measurements are made with a voltmeter having an input impedance of 10 kO or greater and a common-mode rejection ratio greater than 60 dB.
2. Magnetic flux density is measured at the most sensitive area of the device, which is on the top center, 0.037 ± 0.001" (0.94 ± 0.03mm) below the surface.

9-25

UGN-3501M
SOLID-STATE LINEAR HALL EFFECT SENSOR

NORMALIZED SENSITIVITY
AS A FUNCTION OFVCC

NORMALIZED SENSITIVITY
AS A FUNCTION OF TEMPERATURE

I. 05

Vce' 12 V
1.00

~...

g'
~

/

0.95

a

B" 1000 GAUSS

i'.
I. 00

RS-6'" 15.11.

..... ......

/

~

~

~

.".

......

",..,. i""""'"

B '" 1000 GAUSS

fA'" 25°'

I(

Z

......

0. 95

-

-

-

..... ~
...... 100.

J

0.90

RL = :; 10,,",

..... ........

R 5-6-7 '" 0

RL=rO""'I 0. 9(

0.85
10
Vee (VOLTS)

12

14

25

16

50

TEMPERATURE ("C)

DW6.110. A_IO.!>29

RELATIVE OUTPUT VOLTAGE
AS A FUNCTION OF LOAD RESISTANCE

75
DWG.IIO.A-IO.S30

OUTPUT VOLTAGE
AS A FUNCTION OF MAGNETIC FLUX DENSITY

2.S0',.---,.--.---r-....,.----,r---,...--,...--",.....
8

·12V
= 1000 GAUSS

TA

'" 25°C

R5-6

-Is..

Vce

~

!:i 1.0

~

g

0.8

~

0.6

a

.
~
r-

r-I

~Iternati~.

o
~

~

,... ....
Output

Circuit For Low
Impedance locds

l:!

It

"

I

/

l:!

°

~

~i

~~

~~

100

200

2.00

1""'"/

0.4

0.2

Vee - 12V
TA '" 25°C

500

1.50't---+---+---+~~

V

I~"
II
IK

RL = 10""' - t - - + - - - + - - 7 I f - . " " - t - - I I - - - : - I

2K

LOAD RESISTANCE (OHMS)

I.oo't---+---h,"-+-"""'!::.--II--t--+---I

0.501t---.~rIF-~-+--f--II--t--+---I

SK

10K
800

D'G.IIO ...... IO.533

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

9-26

1200
1600
2000
FWX DENSITY (GAUSS)

UGN-3501M
SOLID-STATE LINEAR HALL EFFECT SENSOR

OUTPUT VOLTAGE
AS A FUNCTION OF AIR GAP

.

14

I.

Au. ncb :szm

'-

I.

I.

Vc~

RL MAJNET

0,"

~

.60

"- .......

."

0
0

.02

.04

,06

"'

l~V

TA

= 25"c
• I5A-

"1"-

.1

'...

0.212" OJ .........
0.187" Length

,

.00

NOISE SPECTRAL DENSITY

12

1. .

\

10

~

--Jff--~=

~6

UGN-3501M

........

\

~,

~

"-......

";4

........

......... r--

.08
.10
.12
AIR GAP 0, (tNCHES)

.14

5Z

~~

Vee -12 VOLTS

r-.-.

r-

I

o

.16
.18
.20
Owg. No. A-l0,S31"

TA == 25°C
R5 - 6 - 7 =a...

10

100

1000

FREQUENCY IN H.

Guide to Installation
1. All Hall Effectintegrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sink the leads during hand-soldering. For wave soldering, the part
should not experience more than 260·C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.
3. If a zeroing potentiometer is used, minimize
lead lengths from it and isolate these leads from output leads if possible. In some cases, it may be more
practical to limit the frequency response with an output RC network to prevent oscillation.
DIMENSIONS IN INCHES

--r-0.256

3

2 I

't~--

~

6

7

l.aK

TlooopF

a o----.I'N....

VOUT
0

~.MO.It-IO.536

INDEX (PINwNb'l)

4

-r-

--:-r:6.50

0.310
0.290

3 2

I

,,~__

~1:

...L __

5

o----.I'N'-...,l>-----oO

DIMENSIONS IN MILLIMETRES
Based 'on 1 in. = 25.4 mm

INDEX (PINwNO'
I)

4

l.aK
I

a

5 6·7

a

IHHlI--O:L..JL-SEATING PLANE

o
0.38

2.540 0.25 NON-CUMULATIVE
7.62 :I: 0.25 @ SEATING PLANE
_1IO.A-9OOOA11I

9-27

10000
DWQ.IIO.A-IO,5S2

UGN-350lT
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSOR

UGN-3501T
SOLID-STATE LINEAR OUTPUT HALL EFFECT SENSOR

FEATURES
•
•
•
•

Excellent Sensitivity
Flat Response to 25 kHz (typ.)
Internal Voltage Regulation
Excellent Temperature Stability

UTILIZ~N~

THE HALL EFFEC~ for sensi~g
a magnetic field, Type UGN"350lT mtegrated circuits provide a linear single-ended output which is a
function of magnetic field intensity.
These devices are used principally to sense
relatively small changes in a magnetic field changes which are too small to operate a Hall effect
switching device. They are customarily capacitively
coupled to an amplifier, which boosts the output to a
higher level.
The Type UGN-3501 T Hall Effect IC includes a
monolithic Hall cell, linear amplifier, emitter
follower output, and a voltage regulator. Integrating
the Hall cell and the amplifier into one monolithic
device minimizes problems related to the handling of
millivolt analog signals.

FUNCTIONAL BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . .. + 16 V
Output Current, loUT ........................... 4 mA
Magnetic Flux Density, B ..................... Unlimited
Operating Temperature Range, TA ••••••••••• O°C to + 10°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C

These Hall effect devices are also available in a
miniature 3 -pin plastic "U" package. The "T'
package is 0.080" (2.03 mm) thick; the "U" package is 0.061 "(1.54 mm) thick. All other dimensions
are identical.

This sensor is supplied a a 3-pin plastic package
and is rated for continuous operation over the temperature range of O°C to + 70°C and a voltage range
of 8 to 12 volts doc.

ELECTRICAL CHARACTERISTICS at Vee

= 12 VOC, TA = + 25°C
limits

Characteristic
Operating Voltage
Supply Current
Quiescent Output Voltage
Sensitivity
Frequency Response
Broadband Output Noise
Output Resistance

Symbol
Vee
lee
VOUT
f::.VOUT
BW
en
Ro

Test Conditions
Vee = 12 V
B = 0 Gauss, Note 1
B = 1000 Gauss, Notes 1, 2
fH - fl at - 3 dB
f = 10 Hz to 10 kHz

Min.
8.0

Typ.

-

10
3.6
100
25
0.1
100

2.5
350

-

-

-

Max.
12
20
5.0

-

-

Units
V
mA
V
mV
kHz
mV

n

NOTE I. All output voltage measurements are made with a voltmeter having an input impedance of 10 kO or greater.
NOTE 2. Magnetic flux density is measured at the most sensitive area ofthe device, which is centered on the branded side ofthe Tpackage, 0.042 ± 0.001" (1.07 ± 0.03mm)
below the surface and 0.022" ± 0.001" (0.56 ± 0.03mm) below the branded side of the Upackage.

9-28

UGN·350lT
SOLlD·STATE LINEAR OUTPUT HALL EFFECT SENSOR

NORMALIZED SENSITIVITY AS A FUNCTION OF nMPERATURE

NORMALIZED SENSITIVITY AS A FUNCTION OF Vee
1.0

~

/
./

. 95

~

....-

1.05

.....

~
1.00

/'f'

...... .....

""'" ~ .....

V

.90

/

.85

i" r-...

V

'l"
10

8

T'' '

-

~IIG.

r-...

Vee· 12 V
B = 1000 GAUSS -

RL • 10 k.....

12

II

Vee (VOLTS)

..... .....

0.95

B = 1000 GAUSS
TA Ilt2S0C

r-..

~

11

0.90

MO • .1.-10,522

o

25

50

{III\".

7

NO. '-10.52'

TEMPERATURE, DC

OUTPUT VOLTAGE AS A FUNCTION OF MAONOIe FLUX DENSITY
~4.0

+5,6

+4.6

§'

""
~~
V

f---

.;,,".'"

~

V

~

,/'

3000

2000
SOUTH POLE

\
\

+3,8
Yee::: 12V

Rl .. 10k....

1000

+3.7

+3,6

1000

2000
3000
NORTH POLE
MAGNETIC FlUXDENSITV (GAUSS)
DWG. 110. ~-IO.523

0.212" Ditnleter
0.187" L.ngtfol

o

Vee

TA
'l

I

I " lOt'

-

'

S'

-

~..

UGN-350lT

"'

~

I'

""-

,20

.10

.30

AIR GAP 0

(INCHES)

: ;~,-.

.-40

12

10

NOISE SPECTRAL DENSITY

_

8

~

6

r\

,~

i'

~

:::6

..........

z

Yee = 12 VOLTS
TA _2S D C

" , 'II

o
10

1000

100

FREQUENCY, Hot

9-29

J

'" 12V

:: 2Soc _

:J,-:11 1_
Q--'

i\

"

TA '" 25°C

+1.6

AlNIJ :lZlIl ,10 M.JNET

\

+3,9

./

+2.6

~
8

./~

r/

~

+3.6

~

a>~

OUTPUT VOLTAGE AS A FUNCTION OF AIR GAP

ll'IIi;. hO. A-IO.~XI

10,000

.50

-.-:. '-'.l ;:

o

UGN-350H
. SOLID-STAlE liNEAR OUTPUT HALL.EFFECT ·SENSOR

Typical Applications
of Hall Effect Linear Sensors
SENSITIVE PROXIMITY DETECTOR

FERROUS METAL SENSOR

FERROUS

~

rr(N AVo~10 mV
0=0.250'

NOTCH OR HOLE SENSOR

LOBE OR COG SENSOR

nent magnet, 0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick is approximately 1200 gauss at its surface.

For reference only - an Alnico VIII permanent magnet, 0.212"
(5.38 mm) in diameter and 0.187" (4.75 mm) long is approximately 800 gauss at the surface. A samarium cobalt perma-

Guide to Installation
1. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sInk the feads dunng hand-soldering. For wave soldering, the part
should not experience more than 260°C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.

9-30

UGN-3604M AND UGN-360SM
HALL EFFECT SENSORS

UGN-3604M AND UGN-360SM
HALL EFFECT SENSORS
MOST BASIC Hall Effect magnetic field
THEsensors
are the Type UGN-3604M and UGN3605M. The differential output of the devices is a
function of the magnetic flux density present at the
sensor. Sensitivity is a function of the control current: sensitivity increases as the control current increases.
The UGN~3604M and UGN-3605M are most
often used for magnetic circuit design, analysis,
testing and alignment, and for calibrating magnetic
sensing devices.

Gnd.

The UGN-3604M is supplied in an 8-pin DIP
package, with a calibration chart. The UGN-3605M
is the same device without the calibration chart.

The UGN-3605M is intended to be used primarily
as a sensing device. When operated from a constant
current source of 3 rnA the device provides a typical
sensitivity of 60 mY per 1000 gauss. This is the
preferred biasing method, to achieve the most stable
output voltage vs. temperature.

Each Type UGN-3604M Hall Effect sensor is
individually calibrated at a temperature of + 25°C
using a supply voltage of 5-volts. The calibration
chart supplied indicates differential output values
for a magnetic flux density range from 0 gauss to
1000 gauss. Sensitivity at this supply voltage level is
typically 40 mY per 1000 gauss.

ABSOLUTE MAXIMUM RATING
Supply Voltage, Vcc. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Supply Current, Icc ........................... 10 rnA
MagnetiC Flux Density, B..................... Unlimited
Operating Temperature Range, TA • • • • • • • • • • • O°C to + 70°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C

Since the differential output voltage is a linear
function of the magnetic flux density, otherreadings
are easily interpolated.

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Control Current
Control Resistance
Control Resistance vs. Temperature
Differential Output Resistance
Output Offset Voltage
Output Offset Voltage vs. Temperature
Sensitivity
Sensitivity vs. Tern perature
Product Sensitivity

DWG. 110. A-90111B

= + 25°C
Symbol
Icc
RI_3
dRI_/dT
R2-4
VOFf
dVOF~dT

dVou/dB
dVou/dB
dT
VIA x kG

B = 0 Gauss
B = 0 Gauss
Note 1

-

Limits
Typ.
Max.
3.0
7.0
2.2
4.5
+0.8
4.4
9.0
5.0
30
0.06
-

Icc = 1.5 rnA

-

+0.1

-

Note 1

-

20

-

Test Conditions
Notes 1, 2

I. Icc is limited to a maximum value which produces a 7 Vdrop across the control resistance, RI.,.
2. Terminal! must always be positive in relation to terminal 3.

9-31

Min.

-

-

1.0

-

2.0
-

Units
rnA
k!l
%rC
k!l
mV
/LVrC
mVlG
%I"C

-

UGN-3604M AND UGN"3605M
HALL. EFFECT SENSORS

Guide to Installation
1. All Hall Effect integrated circuits are susceptible to mechanical stress
effects. Caution should be exercised to minimize the application of stress to
the leads or the epoxy package.
2. To prevent permanent damage to the Hall cell integrated circuit,
heat-sink the leads during hand-soldering. For wave soldering, the part
should not experience more than 260°C for more than five seconds. Solder
flow should be no closer than 0.125" (3.18 mm) to the epoxy package.
3. The magnetic flux density is indicated for the
most sensitive area of the device. This area is centrally located and 0.037"±0.OOl" (0.94 ±0.03 mm)
below the top surface of the'package.
4. For reference purposes, an Alnico VIII magnet, 0.212" (5.38 mm) in diameter and 0.187"

(4.75 mm) long or a samarium cobalt magnet,
0.100" (2.54 mm) square and 0.040" (1.02 mm)
thick, is approximately 1200 gauss at its surface.
Note that the flux density decays at a high rate as
the distance from a pole increases. In most cases,
this is a relatively linear decrease in the region of
interest, and it may range from 5 to 20 gauss/mil.

DIMENSIONS IN MILLIMETRES
Based on 1 in. = 25.4 mm

DIMENSIONS. IN INCHES

INDEX ( P
NO.1)
INe

INDEX (PINWNO.'
1)
.

4

~

3

2 1

4

~

c~.-

0.256

5

8

125
0.
MAX
0.015
MIN

~~.-

--'-6

7

8

1
,

::;~

~"

3 2

rt

2• 16
±C.13

-r'JfJ'T
7.87
7.37

•

L__

5 6

7

8

9.53
8.26

_1

0.38
0.20

=i-,n,n,nl=--L.--SEATiNG PLANE

0.38
2.54 ± 0.25 NON-CUMULATIVE
_ _~ 7.62" 0.25 @ SEATING PLANE

, 0.100 :0.010 NON- CUMUlATIVE
0.300 ±C.Ol0 (a SEATING PLANE

1---......,

DWG. NO.

~9000A

IN

DIIIG. NO. .....90001 MM

Additional information on all
Hall Effect devices is available from:
Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

9-32

HALL EFFECT DEVICES (Continued)

Hall Effect

Ie Application

ELECTRIC uses the latest linear inteSPRAGUE
grated circuit technology in combination with

Guide

HALL EFFECT SWITCH OUTPUT WAVEFORM

the 100+ year old Hall Effect to produce Hall Effect
ICs. These are magnetically activated switches and
sensors with the potential to simplify and improve
systems designed for switch and sensor applications.
Simplified Switching At Low Cost
Simplified switching is a Hall switch feature.
Sprague Hall Effect ICs combine Hall voltage
generators, signal amplifiers, Schmitt trigger circuits and transistor output circuits on an IC chip.
Output is clean, fast, and switched with no bounce,
an inherent problem in mechanical contact switches.
A Sprague Hall Effect IC switch costs less than many
common electromechanical switches.

REED RELAY OUTPUT WAVEFORM

EHicient, EHective Low-Cost Sensors
A Hall Effect sensor detects the motion, position,
or change in field strength of an electromagnet, a
permanent magnet, or a ferromagnetic material with
an applied magnetic bias. Output is linear and temperature stable. Energy consumption is significantly
low. Response is independent of the velocity of the
field being sensed.
A Sprague Hall Effect IC sensor can be more
efficient and effective than inductive or optoelectronic sensors and at lower cost.

HALL EFFECT SENSOR LINEAR OUTPUT
+5.6

./

+4.6

Sensitive Circuits For Rugged Service
The Hall Effect IC is virtually immune to environmental contaminants, is particularly rugged,
and is suitable for use under severe service conditions. These circuits are very sensitive, providing
reliable, repetitive operations in close tolerance applications. The Hall Effect IC can "see" precisely
through dirt and darkness.

+3.6

/

+2.6

~

V

.,-

/'

/

Vee'" 12V
TA := 25°C
RL = 10 Iv..

V

+1.6

NOTE: NORTH POLE IS WITH
THE NORTH POLE FACING

Sprague Hall Effect IC switches and sensing systems cost less than most optoelectronic switch and
sensor circuits.

THE BRANDED SIDE OF THE
PACKAGE"

3000

9-33

2000
SOUTH POLf

1000

1000

I

2000
3000
NORTH POLE
MAGNETIC FLUX DENSITY (GAUSS)
DM3. ft". A-IM23

HALL EFFECT DEVICES (Continued)

v+

HISTORY AND THE HALL EFFECT
E. H. Hall, at Johns Hopkins University in 1879,
flI'St noted the effect that bears his name. A magnetic
field applied to a conductor carrying current produces a voltage across the conductor as shown in
Figure 6.

I

I

I

I

The effect is caused by electron deflection within
the SQlid,concentrating the negative charges to one
side or the other depending on the influence of the
magnetic lines of force. The difference in potential is
calle4the Hall voltage.
The ratio VtllH is the Hall Coefficient. (V is the
Hall voltage, t the material thickness, I the primary
current flow, and H the magnetic field.) This ratio is
a constant for a given material.
H. A. Lorentz and Paul Drude developed theories
of ~onduction which apparently· accounted for the
Hall Effect ,early in this century .. Subsequently the
Hall Effect waswide}y used to study conductivity of
materials, with a Hall Coefficient assigned as a
means of classification.
Attempts to classify some specific materials such
as lead sulphide and silicon produced baffling, contradictory data. The introduction of quantum
mechanics in 1926 provided a means for clarification
of these problems and other difficulties associated
with semiconductor materials.
A proper understanding of semiconductor theory ,
impurity conduction, junction theory and the fundamental approaches to semiconductor device design
did evolve out of studies using the Hall Effect.
The Hall voltage is proportional to the crossproduct I x H (Current x Field). A device that exhibits the Hall Effect is a mUltiplier: if current flow is
constant, the Hall voltage will be proportional to the
magnetic field applied; if the magnetic field is constant, the Hall voltage will be proportional to the
current flow.
Early Hall Effect devices found limited application as wattmeters or gaussmeters. Such devices
were complex, expensive, and susceptible to noise
and temperature variations. It was difficult to
achieve useful Hall voltage levels.
Production of Hall Effect integrated circuits have
eliminated the· problems associated with discrete
component circuit designs. The Hall Effect ICs are
simple, inexpensive, virtually immune to noise, and
are temperature stable. Amplifier circuits integral to
the devices produce useful electrical output levels.

I

... ,,---- - +

+

,

-----',
VHALL

""

(-)

,------ +--.

"

+

,'>

,"
------,
,,

A MAGNETIC FIELD IS APPLIED TO THE CONDUCTOR
CARRYING CURRENT. THE NEGATIVE CHARGES ARE
DEFLECTED BY THE MAGNETIC FIELD PRODUCING A
DIFFERENCE IN POTENTIAL CALLED THE HALL VOLT·
AGE (VHALU. THIS PRINCIPLE IS APPLIED IN HALL EFFECT IC'S TO PRODUCE MAGNETICALLY ACTIVATED
SWITCHES AND SENSORS.

9-34

HALL EFFECT DEVICES (Continued)

SOME CURRENT HALL EFFECT IC
APPLICATIONS -

HALL EFFECT SWITCH and SENSOR
APPLICATIONS AREAS-

Ignition Systems
Speed Controls
Speedometer Pickups
Security Systems
Alignment Controls

Appliances
Automotive OEM
Automotive Aftermorket
Business Machines
Communications
Computers !Peripherals
Controls
Entertainment Products
Industrial and Commercial Switches
Instrumentation
Keyboard /Keyswitch
Machinery
Machine Tools
Military Systems and Equipment
Power Supplies
Test Equipment

Mechanical Limit Switches
(computers)
(printers)
(floppy discs)
(sewing machines)
(record players)
(machine tools)
Current Sensors
Current Limit Switches
Linear Potentiometers
Position Detectors
Keyboard/Keyswitch
Selector Switches
Pushbutton Switches
Micrometers

TYPICAL APPLICATIONS

~.. ~l ~ ~

O~
!

Q)

L'-"

VANE INTERRUPTER
(Ignition sWitch, etc,)

UMITSWITCH

(pressure monitor. etc.)

ANGLE SENSING
(tih switch, etc.)

CHANGE IN FLUX PATH
(notch sensor, etc)

r

!

F£AROUS METAL
SENSOR
(pmball detector, etc)

~O~
ANGLE OF ROTATION
(antenna position, etc)

What Does A Hall Effect Switch Do?

Switch designers have obtained high perfonnance
switching characteristics with the use of photoelectric switching, capacitive circuits, mercury wetting
switches, proximity devices and magnetic pickup
techniques. Such designs have unique characteristics
suitable for one or more specific applications. In
general these designs are usually more complex and
more expensive than Hall Effect IC switches perfonning similar functions.
Snap-action or reed switches have been used
wherever the switch life, speed and reliability per-

mitted, primarily because of their low cost. Some
applications require perfonnance standards not
available in electro-mechanical switches.
Sprague Electric Hall Effect IC switches provide
high-perfonnance switching characteristics at costs
comparable with snap-action or reed switches.
The devices are very small. The 3-lead "T" pack
units are 0.18" x 0.18" x 0.08" . The cost is as low
as the devices are small.

9-35

HALL EFFECT DEVICES (Continued)

Whatever Turns Them On •••

The application of Hall Effect switches is not very
different from other switching methods. A means for
mounting and making electrical connections must be
provided. Supply voltage, load, environment and
ambient temperature range must fall within limits
specified in the applicable engineering bulletin.
Hall Effect switches incorporate a voltage regulator, a Hall voltage generator, a signal amplifier,
trigger circuits and output drivers on a single silicon
chip.

The magnetic characteristics of the Hall Effect
switch are specified in terms of magnetic flux density
(in gauss). Typical, maximum, and minimum operate and release points and hysteresis factors are
specified.
A built-in hysteresis feature insures that stray
magnetic fields from transformers, solenoids, or
other associated circuitry will not cause unwanted
switch operation. The graph below shows typical
hysteresis characteristics for the UGN-3019T
switch.
TRANSFER CHARACTERISTICS
SHOWING HYSTERESIS

FUNCTIONAL BLOCK DIAGRAM
12 I------':::=:::;----,--.....,O.P.
I

!l

ION

+12V

OFF 1

t!

R.P.!
ooL_~
100

I

__200~_;'~::~::~~~
- 600
300
400
500

Dwg. No. A-H,007

MAGNETIC FLUX DENSITY IN GAUSS
Dwg. No. A-901SC

Switching is dependent on the proximity of an
external magnet whose field passes perpendicularly
through the Hall voltage generator on the chip face.
The Hall generator produces an analog voltage
amplified and converted by the trigger circuit to a
digital output.

The maximum operate point for the UGN-3019T
switch is specified at 500 gauss and the minimum
release point at 100 gauss. The maximum hysteresis
factor for this switch, however, is 275 gauss. Should
the operate point fall near the maximum, the release
point will move up as well. Similarly, if the release
point falls near the minimum, the operate point will
have a correspondingly lower value. The hysteresis
factor will remain close to a typical value.

Hall Effect Ie switches feature such characteristics as high-speed response and very high cycle rates.
Typical rise time (turn-on) is 15 nanoseconds, fall
time (turn-off) 100 nanoseconds. These units have
the capability for cycling at 100,000 Hz (cyclesper-second).

Basic fixed element switch designs will take the
maximum and minimum operate and release points
into account. However, a configuration which permits adjustment of switch and magnet elements in
assembly or operation can take advantage of the
closer tolerance hysteresis limits to achieve even
more precise switching characteristics.

Hall Effect Ie switches feature constant amplitude
output without the bounce characteristics of electromechanical switches. Hall Effect Ies also feature
low power consumption: 7 mA is typical.

9-36

HALL EFFECT DEVICES (Continued)
Head-On Mode of Operation

The simplest form of magnet which will operate
the Hall Effect switch is a rod or bar. The curves
below illustrate typical flux density (in gauss) as a
function of air gap distance for two rod magnets.
In each case, the magnet is oriented with its axis
perpendicular to, and on the center line of, a Hall
Effect IC switch. Flux density and air gap distance
are measured along the magnet axis and switch centerline.

The switch used is the Sprague UGN-3019T. The
typical operate and typical release points are 420 and
300 gauss, respectively.
An ALNICO V rod magnet 0.25" in diameter by
1.25" in length must be 0.18" or less from the
switch to insure operation at the 420 gauss typical
operate point. The magnet must be moved to a distance 0.25" from the switch to insure release, an
"operate-release" distance of 1/16 ".
The UGN-3019T can be switched with a larger or
stronger magnet over greater distances. Or, the device can be switched with a smaller or weaker magnet provided the air gap between the magnet and the
switch is properly decreased.
An ALNICO VIII rod magnet 0.212" in diameter
by 0.187" in length must be 0.05" or less from the
switch to insure operation at the 420 gauss typical
operate point. The magnet must be moved to a distance 0.085" from the switch to insure release at the
300 gauss typical release point.
Use of the smaller ALNICO VIII rod magnet
reduced the on-to-off motion from approx. 1/16" to

:1'I'.i.N0.A-IO.970

The magnet is moved toward the switch to activate
it and away to release it. This method of operation is
commonly referred to as the head-on mode.

1/32 " .

MAGNETIC FLUX DENSITY AS A FUNCTION OF AIR GAP
Head-On Mode of Operation
1000

1000

-

ALN!CO

900

800

Vl

Vl
Vl

~Cl

::::>

~

~

g::~ID'1

700

'> -

I~"

«

Cl 600

x

x

2

::::>

u
;:::

U

\....
\,

;::: 400

z

Z

«

«
:;:

Cl

Cl

~

300
200

0.2

0.3

0.4

0.5

DISTANCE (D) INCHES

0.6

,,.,. ,0.

0.7

o
o

0.8

A-IO,068

-

OPERiTE
RE!EASE

~

100

0.1

~--~

500

u:

w

I

~ Rod Lagn.!

0.1

""""'"
0.2

......

r-

0.3
0.4
0.5
0.6
DISTANCE (D) INCHES
I)~·U.

9-37

0.7

0.8

NO. A-IO.960

HALL EFFECT DEVICES (Continued)
Slide-By Mode of Operation

Slide-By With Actuator

Hall Effect switches are often activated by means
of a slide-by movement of the magnet past the switch
as illustrated below.
The axis of the magnet rema,ins perpendicular to
the face of the switch, the air gap remains constant,
and the magnet passes close enough to the switch to
activate it. The maximum flux density is obtained
when the magnet axis is on the switch centerline.
The graph at bottom left shows slide-by characteristics for the same magnet used in the previous
head-on mode example. The air gap is 0.01". Flux
density at the switch is a function of the distance
between the magnet axis and the switch centerline.
Movement from the operate point to the release
point covers only 0.018". Movement continuing
past the switch covers an "operate-release" distance
of 0.24", but no change in direction is required.

Magnetic fields may be distorted, interrupted,
squeezed, squashed, or focused by various ferromagnetic concentrators, shunts, vanes, flux returns, and actuators. rhe magnetic circuit improves
the efficiency of the magnet by concentrating the
magnetic field.

G.

I

:

AIR
GAP

Without the actuator, the flux density across the
0.05" air gap is not sufficient to activate a UGN3019T, as illustrated in the graph at bottom right.
With the actuator, the 420 gauss operate point is
obtained with the magnet axis 0.15" from the switch
centerline.

.,..I-AIR GAP

i-'" I
: '.I.,

l-q:-' --. -R., . . ,,"
.L _____ ~
~

The extent of field distortion can be seen in a
comparison of flux density at the switch for a magnet
with and without the actuator. Flux density is plotted
in a slide-by mode, with a 0.05" air gap for an
ALNICO YIn rod magnet 0.188" in diameter by
0.938" in length.

'I...,

5

~

' , ....

'>

" .... G.

,<~'"

.s)
. . ...

MOTION

°1

D,,~O~'

I

./

[Mg. No. A-IO.957

"" ...."':.)..........

.......
DWG. NO. 1l.117-A

MAGNETIC FLUX DENSITY AS A FUNCTION OF MAGNET AXIS-TO-CENTERLINE DISTANCE
Slide-By Mode of Operation
1000

0.212" Diameter
0.187" Length
Air Gop 0.01"

900

I

I

I

I
700

600

~

500

x
3u..
u
;::

""",,, 'rIO",

,

\
400

'"
::;)
'"
«

l!)

~

.. ,

I .....

,

,"OPERATE

o

o

0.1

u

400 ~

Z

l!)

«

300

~

200

\

100

500

;::

\-

200

600

X

~

"'"- RELJSE

300

r-

700

,~~:> -

«

~

800

'~', ~ ~

"\

w

Z

\!)

'---

'l

I

"

900 -'

...---"!- AIR GAP

=

800

'"
::;)
'"
«
(:)

1000

ALNI~O :smI. Rod Jognet

100

'-..

0.2

0.3

0.4

0.5

0.6

0.7

o
a

0.8

DISTANCE (OJ OF MAGNET FROM CENTERLINE (

~~
~

~

O'--------...:\------~--

!~-':~'" .'
ii~

o
-200
Z
-250

TRANSFER CHARACTERISTICS SHOWING HYSTERESIS
I

MAX.

12V

,O.P.

VI

~

o
>
z

L&.J
(.!)

I

I

I
I

OFF I
I

~
o

6

>

c..:
d

--l

--l

0«:

0«:

U

I--

~

0...

I
I

0...

I-~

o

c..:
0::

:>
I--

u

I

ION

0...

:>

I--

MIN.I

R.p.L
-300

-200
-100
(-) NORTH POLE

o

+100

GAUSS
;9-40

+200
SOUTH POLE

+300
(+)

Dwg. No. A-ll,040

HALL EFFECT DEVICES (Continued)
MODEL OF A MAGNET

MAGNETIC FIELD MODEL OF AN ALNICO VIII
SINTERED ROD MAGNET

An inexpensive commercially available standard
ALNICO VIII magnet* is shown in the scale drawing. The solid lines are maximum operate and
minimum release points for a Sprague UGN-3019T
switch. The field strength levels indicated by dotted
lines are maximum operate and minimum release
points for other Sprague Hall Effect IC switches.
The field is unique to this magnet, and is a function of the material used and the geometry and dimensions of the magnet. Increasing the diameter
would tend to spread the field. Extending the length
of the magnet would strengthen the field.
A variety of magnet materials are commercially
available, each exhibiting unique field characteristics. A samarium-cobalt magnet only 0.085" square
by 0.04" long will produce up to 1200 gauss at its
pole surface, more than adequate field strength to
operate all Sprague Hall Effect IC switches. The
strongest known field available in a permanent magnet is that generated by an ALNICO V magnet
capped with a samarium-cobalt rare earth magnet.
The curves below left are flux density values for
the magnet measured for switch activation in a
head-on mode (along the magnet axis), and for
slide-by modes with air gaps of 0.01" and 0.025".
FLUX DENSITY CURVES
I 000
900

'"
::0
'"
\l. NO. A-II072

The concentrator "blade" at right is aligned with
the drum lobe at an air gap distance of 0.01". The
output change is 10 mV peak, amplified as shown to
develop a +3 volt output from the operational
amplifier, driving the transistor ON.

-11-°.

CiE25

Sensitivity is so great in this configuration the
UGN-3501T output signal base line tracked the eccentricities in the drum quite closely. This affected
the lobe resolution, but the lobe position may still be
measured.

Q

3 01.....
-.,....,5.....

L....

0..... _ - _1

0.062

f
OWG.

lMn.

+15V

031

fD

NO.

A.l1.07!

+15V

27 On..

IL.-~_ _-fl '--_~

I

_....
DWG. tWo A-11073

9-49

HALL EFFECT DEVICES (Continued)

APPLICATIONS FOR TYPE UGN-3501M SENSORS
Type UGN-3501M sensors are well-suited for accurate measurement and/or control of position,
weight, thickness, velocity, current, etc. The device
provides a linear differential output which is a function of magnetic field intensity, with a typical sensitivity of 1.4 volts/lOoo gauss.

OUTPUT VOLTAGE

AS A FUNCTION OF MAGNETIC FLUX DENSITY

Vee = 12V
fA'" 2SoC

2.00

Either magnetic pole can be used. Pins 1 and 8 are
sinking and sourcing terminals for· the differential
output. Changing poles inverts the output. Connections may be reversed to account for this change.

"l = 10 ... -t---t---+--,II7"'''--t---t---::-i

1.50t--+_-_+_-_+~y

The figure below shows a 200 trimmer potentiometer being used for output offset nUlling. Pins 5,
6, and 7 may be shorted if an output offset voltage of
up to ±400 m V can be tolerated.

1.00,t----t----t:;;,.--+-~F--+_-_+_-_+-__I

0.5o't--il<-::'.,IF~--t-"""'I--+--+--+--l

800

1200

1600

2000

2400

2800

3200

lmIl.NO.A·IO.528

flUX DENSITY (GAUSS)

,!'.,!lIt............,

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC ........................... + 16V
Output Current, lOUT ........................... 2mA
Magnetic Flux Oensity, B ...................... No Limit
Operating Temperature Range, TA ............ O°C to +70°C
Storage Temperature Range, TS ............ ·6SoC to +IS0°C
DWil.HO. ""10.972

ELECTRICAL CHARACTERISTICS at Vee = 12 VDC, TA
Characteristic

Symbol

Operating Voltage
Supply Current
Output Offset Voltage
Output Common Mode
Voltage
Sensitivity
Sensitivity
Frequency Response
Broadband Output Noise

VCC
ICC
VOFF

Output Offset Voltage
vs T(OC)

ilVOFF/ilT

VCM
ilVOUT
ilVOUT
f(-3dB)
en

= +25°C (unless otherwise specified)

Test Conditions

Min.

Typ.

Max.

Units

Notes

8.0

-

16
III
400

V
mA
mV

-

-

V
mV
mV
kHz
mV

1
1,2
1,2

-

3.6
1400
1300
25
0.15

-

0.2

-

mV/oC

-

VCC-16V
B= 0 Gauss, R-S-6-7 - OQ

-

B = 0 Gauss
B= 1000 Gauss, RS-6-7 = OQ
B= 1000 Gauss, R5-6 - 15Q
R5-6-7 -OQ
3dB B.W. 10 Hzlo 10kHz
R5-6-7 =OQ
R5-6-7 =OQ

700
650

10
100

-

1

NOTE I. All output voltage measurements are made with a voltmeter having an input impedance of 10 kQ or greater and a common mode rejection ratio greater than 60 dB.
2. Magnetic flu~density is measured at the most sensitive area of the device, which is on the top center, 0.037 ±0.001" (0.94 ±0.03mm) below the surface.

9-50

HALL EFFECT DEVICES {Continued}

Motion Measurement With 'ermanent Magnets

The UON-3501M, properly biased, will produce
the output voltage values shown below when activated in a head-on mode of operation.
Note the output voltage curve is almost linear over
the first 0.04" of travel. The change rate here is 10
mV/0.OO1" air gap change.

1.0

1.4

-

ALNlci llIIl.LMAG1NET
0.212" OiClll'leter
0.187" Length

vc~

,

TA

= 2SoC

Movement measurements would generate the
largest outputs and most accurate readings where
they are centered on the steepest portion of each
curve, and are confined to the linear segment of that
curve. This is the case for the head-on and the slideby curves.

IL

's-o '

15A -

Itlla:

J_Ju..

=

The same magnet used in a "slide-by" mode of
operation will produce the three curves presented at
bottom.

For example, in a slide-by mode of operation with
an 0.03" air gap, movement to be measured could be
centered at a "zero" of 0.1" from the centerline.
The voltage rate of change would be linear at 5
mV/0.OO1" movement, for a movement distance of
±0.02" .

1.2

1.0

.80

60

.40

'""

f'

-[rrf~-'=
UGN·3501M

.......

I'-...

........

20

.02

.04

.06.08

10

r-..... r--...
12

.14

The rate of change is, of course, a function of the
flux density gradient across the magnetic field for the
particular magnet used. A samarium-cobalt magnet,
with its relatively compact field, can produce voltage
change rates to 30 mV/0.001" movement.

-

.16

.18

.20

OWG.NO. A~lO.5318

AIR GAP D, (INCHES)

1300

1200

........ ......

11 00

"\.

1000
900

00
00

..........

""

,

,

M

...J

--

~

b

2 mV/O.OOI"

'M

mV/I·COI"

~5 mV/O.OOI"

00

00

,"13

I
S

\.

'"'"~

n

~,~/
~/ 1"--,

~

~

600

400

t'nln

\

"-

....

~~ ~

LJ'

Ii

I

~
Air Gap

D = 0.100"

"- ~

D - 0.030"
D =0.000"
.12
.14
.16
.18.20
.02
.04 .06
.08
.10
'MAGNETS AXIS FROM CENTERLINE DISTANCE IN INCHES
DWG.MO.A-IO.958

9-51

WJL....I

o

HALL EFFECT DEVICES (Continued)

UGN-3501M Output Circuit Design
Note that the emitter-followers have no voltage
gain. The output voltage differential is essentially
the same as that of the UGN-350IM.

The output current handling capiibility of the
UGN-3501M is 0.5 mAo In the differential connection one output pin sources load current, the other
must sink it. A simple method for increasing drive
capability· is illustrated below.

An operational amplifier will supply a voltage
gain and a current gain, and transform the differential output of the UGN-3501M to a single-ended
output. (The circuit will drive a load which has one
side grounded.)

+8 to +16V

Ol'\l. NO. t,.. 10. 9~9

106

A 4.3 k!l resistor is connected from each output
pin to ground. The quiescent bias current of the
output stage is increased, and the sinking capability
is increased to I rnA.
If even higher current drive capability is required,
the simplest solution is the addition of a pair of
emitter-followers:

The LM-324 quad operational amplifier will operate from a single power supply if the output does not
swing in the negative direction. Pin I of the UGN3501M does swing negative when a magnetic South
pole approaches the device surface. Pin 1, therefore,
is connected to the negative or inverting input of the
LM-324, and its output swings in the positive direction. Reversing connections to pins 1 and 8 allows
the output to respond to a magnetic North pole. If the
application requires the output be capable of swing
both negative and positive, then a dual ± power
supply would have to be used.

a2A

R2
Voltage amplification

=-

Rl

with
Rl = Ra

R2 = R4
Up to 30 mA ofload current can be sourced by the
circuit as shown, and this can be increased considerably by using Darlington power transistors and lower
resistance in the emitter circuits.

The LM-324 can source 40 mAo Other operational amplifiers suitable for single supply operation
are MC-3403P, MC-3458PI, CA-3160E.

9-52

HALL EFFECT DEVICES (Continued)

Current Sensing Applications

The UGN-3501M is ideally suited for current
measurement applications. Typical applications are
overload detectors for electric motors, current limiters for high-current power supplies, clamp-on current probes for high-current d-c loads, etc.

A 47fi ±5% resistor in series with pins 5 and 6
extends the useful linear range to 3000 gauss:

The standard toroid is typical of small
commercially-available electromagnetic devices
which can be used with the UGN-3501M:

Voltmeter
10 k.VY
Min.

UGN350lM
I" 0.D.,5/B" 1.0.
1/4" H •• 0,08" GAP

lYIIG.MO.A-IO.9!>IA

Calibrating The UGN-3501M Gaussmeter

Where applications require the differential output
voltage at pins 1 and 8 be calibrated, dual precision
100 ohm variable resistors may be used:
With this toroid, the UGN-3501M, fixed in the
gap, would "see" 5.6 gauss per ampere-turn. To
"read" from zero to 20 amperes, 9 turns would
develop 9 x 20 x 5.6 = 1008 gauss. The UGN3501M would have a 1.4 volt output with a 20
ampere activating current.

VOLTMETER
1Ok../V
Min.

Gaussmeter Applications

A typical UGN-3501M has a differential output of
1400 mY in a 1000 gauss field. Using a 100 p,A
movement, with a series calibrating trimmer potentiometer, a simple gaussmeter suitable for many applications can be easily produced:
"CAL"

Voltmeter
10 k.r./V Min.

A calibration field can be constructed using
standard Stancor C-2709 filter chokes, with the pole
pieces removed and the center magnetic path completed with a section of the pole piece removed.
Brass stock 1/16" x t,,2" x4%" was usedformechanical support, 2 pieces in the front and 2 pieces in the
rear, plus 41,4" x 1" No. 6-32 threaded standoffs.
The air gap was set at %" as depicted below.

+Bto+16V
D'IIG.MO. A-IO.952

The UGN-3501M is quite linear to = 1000 gauss.
The input differential stage gain must be reduced to
maintain linearity beyond this range.
:J\'!3.t!O. A-IO.:l118

9-53

HALL EFFECT DEVICES (Continued)
The chokes are wired in series opposing, and are
driven from a constant current source. Initial calibration may be accomplished with a UGN-3600 Hall
generator supplied with a calibration cllnTe. The current is fixed at the value which produces 1000 gauss.
The UGN-3501M to be calibrated is "zeroed"
and placed in the 1000 gauss field. The dual precision variable resistor is adjusted until the output is 1
volt. The UGN-350lM circuit is re-zeroed out of the
field and the calibration rechecked.
The value of the precision variable resistor is then
measured. Two 1% resistors of the closest standard
value replace these in the final circuit configuration.
Check Oscillation Problems

NORMALIZED SENSITIVITY AS A FUNCTION
OF TEMPERATURE
1.05
Vcc = 12 V
B"" 1000 GAUSS

........

'5_6 = 15 ~

......

...... """-

1.00

=> 1O",,'

'L

......
1""'-0.

......

~

1""'00.

0.95

...

0.90

The UGN-3501M has a relatively wide band
width. Oscillation is the most common problem encountered in applications for the device, caused by
excessive lead lengths (2") on the zero control, and
coupling between the zero· control leads and the
output leads from pins 1 and 8. (If moving your hand
near the zero control changes the output voltage there are oscillation problems.)
Solutions to oscillation problems are: 1) cut the
zero control lead lengths; 2) separate the zero control
and output leads; and 3) (in extreme cases) use a
low-pass filter on the output:

75

50

25
TEMPERATU'E ("C)

°

[)W("

A-lO.~30

NO.

NORMALIZED SENSITIVITY AS A FUNCTION OF Vee
!
1.00

/

0.95

V

. /~

~

/
0.90

I

J

B = 1000 GAUSS
TA "" 25°C

R 5-6-7 =

°

-

'L=ro""l -

0.85
12

10
Vcc (VOLTS)

Sensitivity Variations

Note also that the "0" output varies typically
1 m Vfoe, a major factor in detennining a minimum
detectable long tenn signal.
The sensitivity varies with temperature and VCE'
The output voltage is a function of the load resistance. These factors are illustrated in the graphs at
right.

~O.

~-IO.5Z9

RELATIVE OUTPUT VOLTAGE AS A FUNCTION
OF LOAD RESISTANCE

OW\3.NO. A-IO.9117

Note that the UGN-3501M is specified with a
typical sensitivity of 1.4 mY/gauss and a minimum
sensitivity of ~7 mY/gauss. Unlessa special "sort"
is ordered, plim on this variation.

16

14
1lI'1\l.

g~
~
5

Vcc
B

• 12V

TA

"" 25°C

'5_6

.'~

'" 1000 GAUSS

1.0

.,
~

0,8 - I

.,.

~

0.6

~tt

0.4

lOadsl

,

~~

Circuit For low
Impedance

/

~

0.2

°

~

~

100

9--'-54

-"

~~Iternati~e Output

i5

~

i"""'/

"

,."

200.

~"'"

V

IN"
II

500
lK
2K
LOAD RESISTANCE (OHMS)

5K

HALL EFFECT DEVICES (Continued)

Type UGN-3604M1UGN-360SM Hall Cells

PACKAGE INFORMATION

Sprague's Hall Effect IC's are packaged in a special epoxy material formulated to handle severe service environments. It is impervious to all commercially available consumer and industrial solvents and
degreasing compounds, oils and alkaline chemicals.
It is susceptible only to hot (+ 150°C) concentrated
fuming red nitric acid applied under pressure.

The UGN-3604M is a basic Hall voltage generator
in an 8-pin DIP package, supplied with a calibration
chart. Intended for use as a design or production test
aid, the UGN-3604M permits accurate measurement
of magnetic field inlensity as a means of aligning
magnetlHall switch positions, and for calibrating
Hall Effect sensor circuits.
A UGN-3605M is the same Hall voltage generator
without a calibration chart. Supply voltage for these
units is 5 volts. Below is the terminal pinning dia- .
gram for UGN-3605M.

The material has a continuous thermal rating of
+150c C, and a hot-spot rating (100 hours) of
+ I 70 c C. It is classed by Underwriters'
Laboratories, Inc. as a self-extinguishing material.
Its resistivity is 1015 ohms. Thermal coefficient of
expansion (To) is 30 x 1O-')lpm/c C_
.
Device leads will meet solderability requirements
of Military Standard MIL-STD-202 (95% or better
solder-wetting without special preparation)_

Owg'. No. A-ll.122

Catalog Numbering System

Applications at Sprague Electric Co.
(We use them ... and love them)

UG

Hall Effect ICs are designed into Sprague's own
production and test equipment. Position-sensing digital switches control and monitor high-speed automatic machine operations. Hall Effect switch output
provides direct input to a microprocessor-based control unit.
Data is compiled continuously from critical points
in the production process. The control informs the
machine operator, makes automatic adjustments, indicates manual adjustments which may be necessary,
and reports on production.
Hall Effect ICs perform simultaneous control and
reporting functions. Extremely reliable precise repetitive operation of these switches helps to achieve
and maintain very high levels of process control and
product quality.

N - 3501

M

L

Package Style
C = Chip

H = Hermetic DIP
M = Plastic DIP
S = Plastic 4-Pin SIP
T = Plastic 3-Pin SIP
U = Plastic 3-Pin SIP
' - - - - - - Device Number

' - - - - - - - - TempClrature Range

N= oce to + lOce
S = - 40c eto + 125c e

' - - - - - - - - - - Semiconductor Family
UG = Hall Effect Device

9-55

HALL EFFECT .DEVICES (Continued)

3-Pin "T" Pack or "U" Pack*
LOCATION OF SENSOR CIRCUIT

, TERMINAL LEAD DESIGNATION

·. .1
m

'i

A·.

·~·ri--3

1- Vee

nUn

2- GND

3- YOUl

UGN-3013T/U
UGN·3019T/U
UGS·3019T/U
UGN-3020T/U
UGS-3020T/U
UGN·3030T/U
UGS·3030T/U
UGN·3501 T/U
UGN-3075T/U
UGS-3075T/U
UGN-3076T/U
UGS-3076T/U

...
"'[t3

NOTE;
PACKAGEotJTlI~

INCH

0.118)(0.178

1.lM

4:1fXUf"

·The "T' package is 0.080" (2.03 mm) thick; the "U" package is 0.061" (1.54 mm) thick; All other
dimensions are identical.

4~Pin

"S" Pack
LOCATION OF SENSOR CIRCUIT

TERMINAL LEAD DESIGNATION

ct
--,I

I

I

A·.
--t:-t---1

2

I3

.002

:os

r
r

UGN-32~OS

4

I

SENSOR
CENTER

I
:

\i ______________ t_
• 0045

+---~----~----------+-,--ct

1-GND

2 = YOUl1
3 = VOUl2
Dwg. No. A-ll,I05

4=Vee

IN
MM
Dwg. No.

9-56

A~1l.009

HALL EFFECT DEVICES (Continued)

8-Pin "M" Package
TERMINAL LEAD DESIGNATION

SENSOR CIRCUIT LOCATION

INDEX(PIN NO. II

Ii

UGN-3201M
UGN-3203M
Owg. No. A-ll.120

7

CURRENT
SOURCE

IN

MM

UGN-3501M
SENSOR CENTER

OWg. No. A-l1,012

Dwg. No. A-ll.121

Magnet Marketplace

A representative listing:

A strong field of magnetic components manufactur-.
ers can supply parts suitable for use in virtually any
conceivable Hall Effect IC application. Comprehensive listings of these suppliers are presented in reference documents such as the Thomas Register.
Many of these finns are familiar with Hall Effect ICs
application.

Indiana General Magnet Products Co.
405 Elm St.
Valparaiso, Indiana 46383
(219) 462-3131
Hitachi Magnetics Corporation
Edmore, Michigan 48829
(517) 427-5151
Xolox Corporation
3111 Covington Rd.
Ft. Wayne, Indiana 46804
(219) 432-4532

Magnetic components available from these manufacturers include ALNICO, rare-earth, ceramic, and
plastic permanent magnets in a variety of form factors such as rods, bars, rings, sheets, etc. Ferromagnetic components for use as electro-magnets,
concentrators, actuators, etc. are also available.

The Electrodyne Company, Inc.
4188 Taylor Rd.
Ontavia, Ohio 45103
(513) 732-2822
Stackpole Carbon Company
Magnet Division
Kane, Pennsylvania 16735
(814) 837-7000

Additional information on all
Hall Effect devices is available from:

Spectra-Flux, Inc.
124 Manfre Rd.
Watsonville, California 95076
(408) 722-8133

Sprague Electric Company
Hall Effect IC Marketing
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

The Arnold Engineering Co.
Railroad Ave. & West, Box G
Marengo, Illinois 60152
(815) 568-2000

9-57

TRANSISTOR ARRAYS AND MISCELLANEOUS DEVICES

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I
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I
I
I
I
I
I
I
I
I
I
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I
I
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I
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SECTION IO-TRANSISTOR ARRAYS AND MISCELLANEOUS DEVICES
ULN-2031A NPN 7-Darlington Array .................................. 10-2
ULN-2032A PNP 7-Darlington Array .................................. 10-2
ULN-2033A PNP 7-Darlington Array .................................. 10-2
ULS-2045H Hermetic NPN Transistor Array .............................. 10-4
ULN-2046A NPN Transistor Array .................................... 10-4
ULN-2046A-1 NPN Transistor Array ................................... 10-6
ULN-2047A Triple Differential Amplifier Array ............................ 10-7
ULN-2054A Dual Differential Amplifier Array ............................ 10-8
ULN-2081A NPN Common-Emitter 7-Transistor Array ...................... 10-11
ULN-2082A NPN Common-Collector 7-Transistor Array ..................... 10-11
ULN-2083A Independent NPN 5-Transistor Array .......................... 10-12
ULN-2083A-1Independent NPN 5-Transistor Array ........................ 10-14
ULS-2083H Hermetic Independent NPN Transistor Array .................... 10-12
ULN-2086A NPN 5-Transistor Array ................................... 10-15
ULN-2140A Quad Current Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-16
ULS-2140H Hermetic Quad Current Switch ............................. 10-16
ULN-2401A Lamp Monitor ......................................... 10-18
ULN-2429A Fluid Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-20
ULN-2430M Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-23
ULN-2435A Automotive Lamp Monitor ................................. 10-26
ULN-2445A Automotive Lamp Monitor ................................. 10-26
ULN-2450A Precision Power Timer/Oscillator ................................ *
ULN-2455A General-Purpose Quad Comparator .......................... 10-26
ULN-3310D and ULN-3310T Precision Light Sensors ....................... 10-32
ULN-3330D, ULN-3330T, and ULN-3330Y Optoelectronic Switches ............. 10-38
ULX-8125A Switched-Mode Power Supply Controller ........................... *
ULN-8126A Switched-Mode Power Supply Controller ....................... 10-41
ULN-8126R (SG3526J) Switched-Mode Power Supply Controller ............... 10-41
ULQ-8126A Switched-Mode Power Supply Controller. . . . . . . . . . . . . . . . . . . . . .. 10-41
ULQ-8126R (SG2526J) Hermetic Switched-Mode Power Supply Controller ......... 10-41
ULS-8126R (SG1526J) Hermetic Switched-Mode Power Supply Controller ......... 10-41
ULX-8127A Switched-Mode Power Supply Controller ........................... *
ULN-8160A (NE5560N) Switched-Mode Power Supply Controller . . . . . . . . . . . . . .. 10-46
ULN-8160R (NE5560F) Hermetic Switched-Mode Power Supply Controller. . . . . . . .. 10-46
ULS-8160R (SE5560F) Hermetic Switched-Mode Power Supply Controller. . . . . . . .. 10-46
ULN-8161M (NE5561N) Switched-Mode Power Supply Controller ............... 10-49
ULX-8163A Switched-Mode Power Supply Controller ........................... *
ULX-8194A Switched-Mode Power Supply Controller ... : ....................... *
ULX-8195A Switched-Mode Power Supply Controller ........................... *
ULN-8564A (NE564N) High-Frequency Phase-Locked Loop ....................... *
ULN-8564R (NE564F) High-Frequency Phase-Locked Loop ....................... *
ULS-8564R (SE564F) Hermetic High-Frequency Phase-Locked Loop ................. *
TPP-Series of Medium-Power Darlington Arrays. . . . . . . . . . . . . . . . . . . . . . . .. 10-51
TPQ-Series of Quad Transistor Arrays ................................ 10-52
Application Note:
An Electronic Lamp Monitor ...................................... 10-56
*New Product-Contact Factory for Information.

10-1

ULN-2031A, ULN-2032A, AND ULN-2033A
HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

ULN-2031A, ULN-2032A, AND ULN-2033A
HIGH-CURRENT DARLINGTON TRANSISTORS ARRAYS

TYPE ULN-2031A, ULN-2032A, and
SPRAGUE
ULN-2033A High-Current Darlington Transistor Arrays are comprised of seven silicon Darlington pairs on a common monolithic substrate. The
Type ULN-2031A consists of 14 NPN transistors
connected to form seven Darlington pairs with NPN
action. The Type ULN-2032A (hFE = 500 min.) and
the Type ULN-2033A (hFE = 50 min.) consist of
seven NPN and seven PNP transistors connected to
form seven Darlington pairs with PNP action. All
devices feature a common emitter configuration.

ULN·2031A

These devices are especially suited for interfacing
between MOS, TTL, or DTL outputs and 7-segment
LED or tungsten filament indicators. Peak inrush
currents to lOOmA are allowable. They are also
ideal for a variety of other driver applications such
as relay control and thyristor firing.
Type ULN-2031A, ULN-2032A, and ULN-2033A
transistor arrays are housed in 16-lead DIP plastic
packages which include a separate substrate connection for maximum circuit design flexibility.

ULN·2032A
ULN·2033A

lQ..c..-2

ULN-2031A, ULN-2032A, AND ULN-2033A
HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS

ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
(unless otherwise noted)
Power Dissipation (anyone Darlington pair) ......................................................... " ... 5OOmW
(total package) ...................................................................... .750mW
Derating Factor Above +25°C ........................................................................6.67mW/"C
Ambient Temperature Range (operating), TA ••.••.••••.••••••••••••••••••• " ••••••••••••• " •••••• -200C to +85°C
Storage Temperature Range, Ts ................................................................-55°C to +125°C
I ndividual Darlington Pair Ratings:
Collector-to-Emitter Voltage, VeEO ............................................•....................•..•.... 16V
Collector -to- Base Voltage, VeBo ...........................................................................4OV
Collector-to-Substrate Voltage, Velo .......................................................................4OV
Emitter-to-Base Voltage, VEao
Type ULN-2031A ......................................................................................5V
Type'ULN-2032A and ULN-2033A .......................................................................40V
Continuous Collector Current, Ie ........................................................................ SOmA
Continuous Base Current, la ...............•.............................•............................... 5mA
NOTE:
The substrate must be connected to a voltage which is more negative than any collector or base voltage so as to maintain isolation between
transistors, and to provide normal transistor action.

ELECTRICAL CHARACTERISTICS at T.

= + 25°C

Characteristic

Symbol

Test Conditions

Collector-Base Breakdown Voltage
Collector-Substrate Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Type ULN-2031A
Type ULN-2032A and ULN-2033A
D-C Forward Current Transter Ratio
Type ULN-2031A and ULN·2032A
Type ULN-2033A
Base-Emitter Saturation VOltage
Type ULN-2031A
Type ULN-2032A and ULN-2033A
Collector-Emitter Saturation Voltage
Type ULN-2031A and ULN-2032A

BVeBo
BVClo
BVeEo
BVEBO

Ie = 5OO/lA
Ie = 5OO/lA
Ie = lmA
Ie = 500/lA

hFE
VBEISAT)
VeEiSAT)

Type ULN-2033A
Collector Cutoff Current

leEO
'eBO

Min.
40
40
16
5
40

VeE = "-V, Ie .:... ,,-umA
500
50
Ie

= zUmA, la -

5OO/lA

Ie = 20mA, I. = 4O/lA
Ie = SOmA, I. = lmA
Ie = 20mA, I. = 400/lA
Ie = SOmA II = 2mA
VeE = 8V
Vel = 10V

10-3

-

-

Limits
Typ.
Max.

-

-

-

-

-

Units
V
V

V
V
V

500

-

2
1

V
V

1.2
1.5
1.2
1.5
100

V
V
V
V
pA
/lA

10

'ULS"204SH ANDULN-2046A TRANSISTOR ARRAYS

ULS-2045H AND ULN-2046A TRANSISTOR ARRAYS
. (Three Isolated Transistors
and One Differential Amplifier)
and ULN-2046A are general-purT HEposeULS-2045H
transistor arrays each consisting of five silicon N-P-N ·transistors on a single monolithic chip.
Two transistors are internally connected to form a differential pair. Integrated circuit construction provides close electrical and thermal matching between
each transistor.
These arrays are well-suited for a wide range of applications such as: DC to VHF signal processing
systems; temperature-compensated amplifiers; custom
designed differential amplifiers and discrete transistors
in "conventional circuits.
. Two package configurations are available. Type
is supplied in a hermetic 14-lead dual inline c.eramic package and is rated for operation over
the military temperature range of _55°C to +l25°C.
ULS~2045H

Type ULN-2046A is electrically identical to the ULS2045H but is supplied in a dual in-line plastic package
rated for - 20°C to +85°C ambients.

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
(unless otherwise noted)
ULS-2045H
Power Dissipation:
TA to +55°C ......................... .
fA to +75°C .......................... .
Derating Factor:
TA >+55°C .......................... .
TA >+75°C .......................... .

EACH
TRANSISTOR
300

-

ULN-2046A

TOTAL
PACKAGE

EACH
TRANSISTOR
300

TOTAL
PACKAGE
750

750

-

-

-

-

6.67

8

-

UNITS
mW
mW
mW;oC
mW;oC

Collector-Base Voltage, V(BRICBO ............................................................... " .. 30V
Collector-Emitter Voltage, V(BRICEO ................................................................. 20V
Collector-Substrate Voltage, V(BRICIO (See note 2) ......................................•............. 20V
Emitter-Base Voltage, V(BRIEBO ..................................................................... 6V
Collector Current, Ic ........................................................................... SOmA
Operating Temperature Range, TA:
Type ULS-2045H ........ , ..................................................... -55°C to + 125°C
Type ULN-2046A .................................................................-20°C to +85°C
Storage Temperature Range, Ts: .................................................. " . -65°C to + 150°C
Notes:
1.

The maximum ratings are limiting absolute values above which the serviceability may be impaired from the viewpoint of life or satisfactory performance. The breakdown voltages may be for above the maximum voltage ratings. To avoid permanent damage to the transistor, do not
attempt to measure these characteristics above the maximum ratings.

2.

Pin 13 is connected to the substrate. This terminal must be tied to the most negative point in the externa I circuit to maintain isolation between
transistors and to provide for normal transistor action.

10-4

ULS-204SH AND 2046A TRANSISTOR ARRAYS
STATIC ELECTRICAL CHARACTERISTICS at TA
Characteri stic
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Cutoff Current
Static Forward Current
Transfer Ratio
Collector-Emitter Saturation
Voltage
Base-Emitter Voltage
Input Offset Current for
Matched Pair 01and O2
Magnitude of Input Offset
Voltage for Differential Pair
Magnitude of Input Offset
Voltage for Isolated Transistors
Temperature Coefficient of
Base-Emitter Voltage
Temperature Coefficient
Magnitude of Input-Offset Voltage

Symbol
VIBRleBo
VBRJeEO
VIBRlelo
VIBRIEBO
leBo
leEo
hFE

= +25°C
Test Conditions
Ie - 10pA, IE - 0
Ie = ImA, IB = 0
Ie - 10pA, lei - 0
IE - 10f/A, Ie - 0
VeB - lOY, IE - 0
VeE - lOY, IB - 0
I~ - 10pA, V~ = 3V
Ie = lmA, VeE = 3V
Ie - 10mA, VeE - 3V
Ie = 10mA, IB = lmA

Min.
20
15
20
5

Limits
Typ.
60
24
60
7

Max.

4U

0.5

Units
V
V
V
V
nA
pA

54
100
100
0.23

-

1101-1102

IE - lmA, VeE - 3V
IE = 10mA, VeE - 3V
Ie - lmA, VeE - 3V

0.715
0.800
0.3

2

V
V
pA

VBECVBE2

Ie - lmA, VeE - 3V

0.45

5

mV

VBE3-VBE4
VBE4-VBE5
VBE5-VBE3
.1VBE

Ie - lmA, VeE - 3V
Ie - lmA, VeE - 3V
Ie - lmA, VeE - 3V
Ie = ImA, VeE = 3V

0.45
0.45
0.45
-1.9

5
5
5

mV
mV
mV
mVrC

.1V lO

Ie - lmA, VeE - 3V

1.1

VeEISATi
VBE

""KT

40

V

/-tV/DC

M

DYNAMIC ELECTRICAL CHARACTERISTICS at TA = + 25°C
Characteristic
Small-Signal Common-Emitter
Forward Current Transfer Ratio
Small-Signal CommOfl-Emitter
Short-Circuit Input Impedance
Small-Signal Common-Emitter
Open-Circuit Output Impedance
Small-Signal Common-Emitter
Open-Circuit Reverse
Voltage-Transfer Ratio
Gain-Bandwidth Product
Emitter-to-Base Capacitance
Collector-to-Base Capacitance
Collector-to-Substrate
Capacitance
Noise Figure

Symbol
hfe

Test Conditions
Ie - lmA, VeE - 3V, f - 1kHz

Min.

Limits
Typ.
11u

Max.

Units

-

h.

Ie

= lmA, VeE = 3V, f = 1kHz

3.5

kfl

hoe

Ie - ImA, VeE - 3V, f - 1kHz

15.6

/-tmho

hre

Ie

f1
CEB
CeB
Cel

Ie - 3mA, VeE - 3V
VEB - 3V; IE - 0, f - IMHz
VeB - 3V, Ie - 0, f - IMHz
Ves - 3V, Ie - 0, f - 1MHz

N.F.

Ie - 100pA, VeE - 3V, R. - lkn
f = 1kHz BW = 15.7 kHz

= ImA, VeE = 3V, f = 1kHz

NOTE:
Characteristics apply for each transistor unless otherwise specified.

10-5

1.8 x 10"

300

-

550
0.6
0.6
2.8

MHz
pF
pF
pF

3.25

dB

ULN-2046A-l TRANSISTOR ARRAY

ULN·2046A·l
TRANSISTOR ARRAY

TypE
ULN-2046A-l general-purpose transistor
. array consists of five silicon NPN transistors,
two of which are connected as a differential
amplifier. The monolithic construction provides
close electrical and thermal matching between all
trarisistors .
Except as shown in the following electrical
characteristics, Type ULN-2046A-l transistor array
is identical to Type ULN-2046A.

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage
Collector Cutoff Current
Static Forward Current
Transfer Ratio

= + 25°C
Symbol
BVc80
BVcEo
BVClo
ICBO
IcEO
hFE

Test Conditions
Ic'= 10 J.«A, IE - 0
Ic - 1 rnA, 18 - 0
Ie = 10 J.«A, ICI - 0
VC8 - 10 V, IE - 0
VCE - 10 V, 18 - 0
Ic - 1 rnA, VCE - 3 V

NOTE:
Pin 13 is connected to the substrate. This terminal must be tied to the most negative point in ihe
external circuitto maintain isolation between transistors and to provide for normal transistor action.

10-6

Min.
40
30
40

Typ.
60

30

-

60
100

Limits
Max.
-

100
5.0

-

Units
V
V
V
nA

!LA

ULN-2047A TRANSISTOR ARRAY

ULN·2047A TRANSISTOR ARRAY
(Three Differential Amplifiers)

ULN -204 7A is a silicon NPN multiple tranT YPE
sistor array comprising three independent differential amplifiers. It is specifically intended for use
in switching applications such as electronic organ
keyboards. All base leads are brought out on one side
of the 16-lead plastic dual in-line package to simplify
printed wiring board layout. A separate substrate
connection permits maximum circuit design flexibility.
Type ULN-2047A is supplied in a 16-pin dual
in-line plastic package.

ABSOLUTE MAXIMUM RATINGS
at 25°C Free-Air Temperature
Power Dissipation, PD (anyone transistor) ............................ 300 mW
(total package) ............................... 750 mW*
Operating Temperature Range, T.............................. -20°C to +85°C
Storage Temperature Range, Ts ............................ -55°C to +l50°C
• Derate at the rate of 6.67 mW/"C above 25°C.

ELECTRICAL CHARACTERISTICS at 25°C Free-Air Temperature
Collector-Emitter Breakdown Voltage, BVcEO (note 1)
at Ic = 5mA ...................................................... 30V Min.
Emitter Cutoff Current, lEBO (note 2)
at VB = 5V .........................................•.......... 100 nA Max.
Collector Cutoff Current, ICES (note 1)
at VCE = 25 V.................................................. .100 nA Max.
D-C Forward Current Transfer Ratio. hFE (note 1)
at VCE = 2 V, Ic = 0.1 mA ............................................ 30 Min.
atVcE = 2V.lc = 10mA ............................................ 75 Min.
Differential I nput Offset Voltage, VIO (note 1)
at VCE = 2V, ICI = IC2 = 1 mA ................................... 5 mV Max.

---

NOTES:
1. All other pins common to emitter of transistor under test.
2. Base and collector of associated transistor connected to emitter, all other pins common to base of transistor under test.

10-7

ULN:.2054A TRANSISTOR ARRAY

ULN.2054A TRANSISTOR ARRAY
(Dual Independent Differential Amplifiers)
THE ULN-2054A is a transistor array consisting of
six silicon NPN transistors on a single monolithic
chip. The transistors are internally interconnected to
form two independent differential amplifiers.
The ULN-2054A is intended for a wide range of applications requiring extremely close electrical and thermal matching characteristics. Some applications are:
cascade limiter circuits; balanced mixer circuits; balanced quadrature/synchronous detector circuits; balanced (push-pull) cascade/sense/IF amplifier circuits;
or in almost any multifunction system requiring RF/
Mixer/Oscillator, converter/IF functions.

Other features are:

Available in a 14-lead dual in-line plastic package
the ULN-2054A is rated for operation over a -20°C
to +85°C ambient temperature range.

•

Input Offset Valtage - 5mV max.

•

Input Offset Current - 2 pA max.

•

Voltage gain (single-stage double ended output)
- 32 dB typo

•

Common-Mode Rejection Ratio (each amplifier)
- 100 dB typo

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
(unless otherwise noted)
Pawer Dissipatian TA to +SsoC:
Each Transistor .......................................................................... 300mW
Total Package ............................................ " ................•........... 7S0mW
Derating Factor, Total Package, TA~SSoC ................................................... 6.67mW /oC
Collector-Base Voltage, V(BR)CBO ................................................................... 20V
Collector-Substrate Voltage, V(BR)CIO (See note 2) ..................................................... 20V
Collector-Emitter Voltage, V(BR)CEO .........•......................................................... 15V
Emitter-Base Valtage, V(BR)EBO ........... ; ......................................................... SV
Collector Current, Ic ...........................................................................50mA
Base CiJrrent 18 •.......•..............•.......................•.....•..........•....•.....•.... SmA
Operating Temperature Range, TA .......................................................-200C
+8SoC
Storage Temperature Range, Ts ...................................................... -6SoC to + ISO°C

to

Notes;

1. The maximum ratings are limiting absolute values above which the serviceability may be impaired from the viewpoint of life or satisfactory
performance. The breakdown voltages may be far above the maximum voltage ratings.
not attempt to measure these characteristics above the maximum ratings.

2.

To avoid permanent damage to the transistor, do
.

Pin 5 is connected to the substrate. This terminal must be tied to the most negative point in the external circuit to maintain isolation between
transistors and to provide for normal transistor action.

10-8

ULN-20S4A TRANSISTOR ARRAY

STATIC ELECTRICAL CHARACTERISTICS at TA
Characteristic
Collector-Base Breakdown Voltage
Collector-Substrate Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Cutoff Current
Base-Emitter Voltage

Temperature Coefficient of Base-Emitter
Voltage
Input Offset Voltage
Input Offset Current
Input Bias Current
Quiescent Operating Current Ratio

= +25°C

Symbol
VIBRlCBO
VIBRlCIO
VIBRlCEO
VBRIEBO
ICBO
VBE

ilVaE

"lI
VIO
010

II

i=Q1)
lelQ5)

Test Conditions
Ic = 10 1lA, IE = 0
Ic = 10llA,IcI = 0
Ic - 1 mA, la - 0
IE - 10 1lA, Ic - 0
VcB-lOV,IE-O
Ic - 50 1lA, V,. - 3 V
I - 1 mA, V,. = 3 V
Ir. - 3 mA, Vr.R - 3 V
I, - 10mA, Vea - 3V
Ic - 1 mA, VCB - 3 V

Min.
20
20
15
5

Limits
Typ.
60
60
24
7
0.630
0.715
0.750
0.800
-1.9

IEIQ3) - 1[1(t4 - 2 mA, Vr.. - 3 V
IEIQ3) = IE1(4) = 2 mA, VCB = 3 V
IEQ3 -I E04 - 2mA, Vea - 3V
IEIQ3) - 2 mA, Vea - 3 V

0.45
0.3
10
0.98-1.02

IEI(4) = 2 mA, Vea

0.98-1.02

= 3V

Max.

100
0.700
0.800
0.850
0.900

5
2
24

Units
V
V
V
V
nA
V
V
V
V
mVrC
mV

IlA
IlA
-

l;;"
Temperature Coefficient
Magnitude of Input-Offset Voltage

ilV IO

Tr

DYNAMIC ELECTRICAL CHARACTERISTICS at TA
Characteristic
Common-Mode Rejection Ratio
For Each Amplifier
AGC Range, One Stage
Voltage Gain, Single Stage
Double-Ended Output
AGC Range, Two Stage
Voltage Gain, Two Stage
Double-Ended Output
Small-Signal Common-Emitter
Forward Current Transfer Ratio
Small-Signal Common-Emitter
Short-Circuit Input Impedance
Small-Signal Common-Emitter
Open-Circuit Output Impedance
Small-Signal Common-Emitter
Open-Circuit Reverse
Voltage-Transfer Ratio
Gain-Bandwidth Product
(for Single Transistor)
Noise Figure (for Single Transistor)
Noise Figure (for each Amplifier)

Symbol
CMR

IEIQ3 ) - IEI(4) - 2 mA, Vea - 3 V

=

/LVrC

1.1

+ 25°C

hie
hi.

Ie - 1 mA, VeE - 3 V, f - 1kHz

3.5

kO

hoe

Ie

= 1mA, VeE = 3 V, f = 1kHz

15.6

/LmhO

hre

Ie

= 1 mA, VCE = 3 V, f = 1kHz

1.8 x 10-'

fl

Ie

= 3 rnA, VCE = 3 V

N.F.

VeE = 3 V, f = 1kHz, Ie = 100 1lA,
R, = 1kO, BW = 15.7 kHz

N.t.

T - lUU MHZ

AGC

A.,
AGC

A.,

NOTE:
Characteristics apply for each transistor unless otherwise specified.

10--9

Min.

Limits
Typ.
100

Test Conditions
Vee - 12 V, VEE - -6 V, Vx - 3.3 V,
f = 1kHz (See figure 1)
Vee - 12 V, VEE - -6 V, Vx - 3.3 V,
f = 1kHz (See figure 2)
Vee - 12 V, VEE - -6 V, Vx - 3.3 V,
f = 1kHz (See figure 2)
Vee = 12 V, VEE = -6 V, Vx = 3.3V,
f = 1kHz (See figure 3)
Vee - 12 V, VEE - -6 V, Vx - 3.3 V,
f = 1kHz (See figure 3)
Ie - 1 mA, VeE - 3 V, f - 1kHz

Max.

Units
dB

75

dB

32

dB

105

dB

60

dB

110

-

-

550

MHz

3.25

dB

8

dB

ULN-20S4A TRANSISTOR ARRAY

Vc;c

t-_ _ !VOUT

AMPLIFIER TEST CIRCUITS

COMMON MODE REJECTION RATIO
Figure 1

0.11-11

Vee

1K

I.

t--_ _ !VOUT

lK

lK

'---+----,_-t----- !VOUT
O

1K

Vx

1K

I.

.00..

VEE

SINGLE-STAGE VOLT AGE GAIN

TWO-STAGE VOLTAGE GAIN

Figure 2

Figure 3

10--10

ULN-20S1A AND ULN-20S2A
GENERAL-PURPOSE HIGH-CURRENT TRANSISTOR ARRAYS

ULN-2081A AND ULN-2082A
GENERAL-PURPOSE HIGH-CURRENT TRANSISTOR ARRAYS
TYPE ULN-208IA and ULN-2082A
SPRAGUE
Transistor Arrays are comprised of seven highcurrent silicon NPN transistors on a common monolithic substrate. The Type ULN-208IA is connected
in a common-emitter configuration and the Type
ULN-2082A is connected in a common-collector configuration.
Both arrays are capable of directly driving seven
segment displays and LED displays. They are ideal
for a variety of other driver applications such as relay
control and thyristor firing.
Type ULN-208IA and ULN-2082A are housed in
16-lead DIP plastic packages which include a separate substrate connection for maximum circuit design
flexibility.

DWG. MO.

A-90~2B

DWG.MO.A-90'43B

ULN-2081A

ULN·20S2A

ABSOLUTE MAXIMUM RATINGS
Power Dissipation (any one transistor) ........................ , .......................................... 500mW
(total package) ............................ , .......................................... 750mW
Ambient Temperature Range (operating) .............................. , ... " .. ,', ... ,., ... ,., ... -20°C'to +:85°C
Individual Transistor Ratings:
Collector-to-Emitter Voltage, VCEo "" ........ , ............. ,., ... ", .. " ...... " ...... , ............ , ... , . .16V
Collector-to-Base Voltage, VCBO." ........................................................................ 20V
Collector -to-Substrate Voltage, VCIO ....................................................................... 20V
Emitter-to-Base Voltage, VEBO . " " ........................................................................ 5V
Collector Current, Ic ................................................................................. 200mA
Base Cu rrent, IB " .............................. , . , . , ... , , , ... , . , ... , ... , ............................. 20mA
NOTE:
The collector of each transistor in the Type ULN-20B1A and ULN-20B2A is isolated from the substrate by an integral diode. The substrate must be
connected to a voltage which is more negative than any collector voltage so as to maintain isolation between transistors, and to provide normal transistor action. Undesired coupling between transistors is avoided by maintaining the substrate terminal (5) at either d-c or signal (a-c) ground. An apprupriate bypass'capacitor can be us.ed to establish a signal ground.

ELECTRICAL CHARACTERISTICS at TA = +25°C
Characteristic

Symbol

Collector-Emitter Breakdown-Voltage
Collector-Substrate Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Forward Current Transfer Ratio

BV cEs
BVclE
BV cEo
BVEBo
hFE

Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage

VBEISATI
VCEISATI

Collector Cutoff Current

ICEO
ICBO

Test Conditions
Ic = 500M
A.
ICI = 500,uA
Ic = 1mA
Ic = 500,uA
VCE = 0.5V, Ic = 30mA
VCE = 0.8V, Ic = 50mA
Ic = 30mA
Ic = 30m A
Ic = 50mA
VCE = 10V
VCB = 10V

10--11

Min.
20
20
16
5
30
40

Limits
Typ. Max.
80
80
40
7
80
85
0.75
0.13
0.2

Units
V
V
V
V

1
0.5

OJ
10
1

V
V
V
,uA
,uA

ULN.2083A AND ULS·2083H TRANSISTOR ARRAYS

ULN-2083A AND ULS-2083H TRANSISTOR ARRAYS
(Five Independent NPN Transistors)
for use in general purpose, medium
D ESIGNED
current (to \00 rnA) switching and differential
amplifier applications, the ULN-2083A and ULS2083 H transistor arrays each consist of five N PN
transistors on a single monolithic chip. Two transistors are matched at low currents (I rnA) making them
ideal for use in balanced mixer circuits, push-pull
amplifiers, and other circuit functions requiring close
thermal and offset matching.
A separate substrate connection permits maximum
circuit design flexibility. I n o~der to maintain isolation between transistors and provide normal transistor action, the substrate must be connected to a voltage which is more negative than any collector voltage.
The substrate terminal (pin 5) should therefore be
maintained at either d-c ground or suitably bypassed
to a-c ground to avoid undesired coupling between
transistors.

DWIl.ItO. A-IO.232

JEDEC style MO-OOIAC. The Type ULS-2083H is
electrically identical to the ULN-2083A but is supplied
in a hermetic dual in-line package for operation over
the temperature range of _55°C to +125°C. This
package conforms to the dimensional requirements of
Military Specification MIL-M-38510 and can meet
, all of the applicable environmental requirements of
Military Standard MIL-STD-883.

Two package configurations are available. The
Type ULN-2083A is supplied in a 16-lead dual in-line
plastic package for operation over the temperature
range of -20°C to +85°C. This package is similar to

ABSOLUTE MAXIMUM RATINGS
at + 25°C Free-Air Temperature
Power Dissipation, Po (anyone transistor) .................................................................... 500 mW
,
.(total package), ............................... , ....................................... 750 mW*
Operating Temperature Range, TA (ULN-2083A) ................................... , ................... -20°C to t85°C
(ULS-2083H) ...................................................... -55°C to +125°C
Storage Temperature Range, Ts ..................................................................... -55°C to +150°C
'Derate at the rate of 6.67 mWrC above 25°C.

ELECTRICAL CHARACTERISTICS at
Characteristic
Coliector~Base

Breakdown Voltage
Collector-Emitter Breakdown Voltage
Collector-Substrate Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Cutoff Current
Base-Emitter Voltage
Collector-Emitter Saturation Voltage
D-C Forward Current Transfer Ratio
Differential Input Offset Voltage*
Differential Input Offset Current*

+ 25°C Free-Air Temperature
Symbol

Test Conditions

Min.

Limits
Typ.
Max.

BV cBo
BV cEo
BV clo
BV EBo
Icw
ICBO
VBE
VCE(SAT)
hFE

Ic = 100 p.A
Ic =1 rnA
ICI = 100 p.A
IE - 5uu p.A
VCE = lUV
VCB = lOY
VCE = 3 V, Ic = 10 mA
Ic - 5u mAo IB - 5 rnA
VCE - 3 V, Ic - 10 mA
VCE = 3V, Ic = 50mA
VCE = 3 V, Ic = 1 mA
VCE - 3 V, Ic - 1 mA

20
15
20
5.0

60
24
60
6.9

VIO
110

'Applies only to transistors Q, and Q, when connected as a dlfferenllal Pair.

10--12

-

-

-

-

650

740
400
76
75
1.2
0.7

40
40

-

-

10
1.0
850
700

Units
V
V
V
V
J,tA
J,tA
mV
mV

-

5.0
2.5

mV
p.A

ULN-2083A AND ULS-2083H TRANSISTOR ARRAYS

COLLECTOR-EMITTER SATURATION VOLTAGE
AS A FUNCTION OF COLLECTOR CURRENT

D-C FORWARD CURRENT TRANSFER RATIO
AS A FUNCTION OF COLLECTOR CURRENT

...............
To 1•

~
I-

10

iil

65

V
V

,/
0.0-

,,- -NJ

,/

/
,/

&0.7

'til

.,...

i.""
~

50 . /
0..1

J

1.0
3.0
10
COUECTOR .CURAEHf, Ie, IN RIA

30

0

100

BASE-EMITTER SATURATION VOLTAGE
AS A FUNCTION OF COLLECTOR CURRENT

Vj /
' i ii

--

.1

0..3

TA

50
10
20
COLLEl:TOR CURRENT, Ie IN mA

2.D

z 0.8

:!
~
iii

.....V

D. 7

il"'

1.0.

1-

V~

.....V

V

....
..".,..50
DMi. NO.

0.1

10.0.

6

Hllct:I

~

30

I

100

DWIO. 110. "10.2)8

------Get:'
I
T~~
~

.....

,0

V

0.5

/"
0.5
1.0
2.D
COU.ECTOA CURRENT, Ie IN mA

..".,..-

1
~
;

VV

3

0..2

10
Ie IN tnA

3V

~

0.
0..1

30

ClR£NT.

12.0

4

I

1.0
~ COlLECTOR

iiS-O

5

I

I~

~

I

0
3V
TA .2SOC
Q, - 00 ONLY

2

I

DIFFERENTIAL INPUT OFFSET CURRENT
AS A FUNCTION OF COLLECTOR CURRENT

DIFFERENTIAL INPUT OFFSET VOLTAGE
AS A FUNCTION OF COLLECTOR CURRENT
7

03

A.. 10. 231

~7O'C

~

,.....

V
V

.....
........

5.0.
10.
20
COLLECTOR CURRENT, Ie IN mA

~~

,.,...- ..... '"

i--""

2D

100

~~

V

i

50

BASE-EMITTER VOLTAGE
AS A FUNCTION OF COLLECTOR CURRENT

TA~

9

I

1NG.1I)...... O.236

0.9

-iID

V

/

3

o

I

! 7DlC'

4

II OO'C

i.""

V ..

~

5

~i

I

TA

~ 0.2

!iO

V

V

.1
00.1

10

D'It(I.IIO."IO.291

10-13

....-

02

0.5
10
2.0.
COLLECTOR CURRENT, Ie IN mA

5.0

"""'.11) .... 10.2'10

10

ULN-2083A-l TRANSISTOR ARRAY

ULN-2083A-1TRANSISTOR ARRAY

This device is a general-purpose transistor array
for use in medium-current switching and differential
amplifier applications. With the exception of the
increased breakdown voltages shown below, Type
ULN-2083A-l is identical to Type ULN-2083A
transistor array.

-D'/IG.MO.fJ.-IO,232

ELECTRICAL CHARACTERISTICS at +25°C Free-Air Temperature
Limits
Characteristic
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage

Symbol
BV cBo
BV cEo

Test Conditions
Ir. = 100 pA
Ic - 1 rnA

10-14

Min.

Typ.

40
30

60

-

Max.
-

-

Units
-V
V

ULN-2086A TRANSISTOR ARRAY

ULN·2086A TRANSISTOR ARRAY

Type ULN-2086A general-purpose transistor
array consists of five silicon NPN transistors, two of
which are connected as a differential amplifier. The
monolithic construction provides close electrical and
thermal matching between all transistors.
With the exception of the collector cutoff current
specifications listed below and the omission of
guaranteed limits on input offset voltage and input
offset current, Type ULN-2086A is identical to Type
ULN-2046A transistor array.

ELECTRICAL CHARACTERISTICS at T,

=

+ 25°C
Limits

Characteristic
Collector Cutoff Cu rrent

S~mbol

Test Conditions

IcBo
IcEO

VCB - 10 V, IE - 0
VCE = 10 V, IB = 0

Min.

-

Typ.

Max.

-

100
5.0

Units
nA

IlA

NOTE: The substrate terminal must be tied to the most negative point in the external circuit to maintain isolation between transistors and to provide for
normal transistor action.

10-15

SERIES 2140

HIGH· PERFORMANCE QUAD CURRENT SWITCHES

SERIES 2140
HIGH·PERFORMANCE QUAD CURRENT SWITCHES

FEATURES
•
•
•
•

Variable Reference: -3 to -10 Volts
Low Temperature Coefficient: 5 ppmf'C
Fast Settling: 300 ns to 0.01%
nUCMOS Compatible Inputs

SERIES 2140 quad current switches are high precision monolithic integrated circuits for use in digital-to-analog converters. Each device contains
four logic-controlled current switches and a reference transistor. Continuously running current sources and superior thermal layout, maximize speed
and accuracy by reducing transitional anomalies. Series 2140 switches
accept a wide range of d-c references or an a-c reference for two-quadrant
mutiplying D fA applications. Inputs may be driven from TTL, or similar
sources and are independent of reference voltage level.
Type ULN-2140A switches are rated for operation over the temperature
range of -20°C to +85°C; the 'A' suffix indicates a 14-pin dual in-line
plastic package. Type ULS-2140H s witches are rated for operation over the
extended temperature range of - 55°C to + 125°C; the 'H' suffix indicates a
dual in-line hermetic package to Military Specification MIL-M-3851O.
Devices in unpackaged, chip form, for use in hybrid circuit applications,
are designated by changing the suffix letter from A or H to C.
On special order, hermetically sealed quad current switches with highreliability screening to MIL-STD-883 are available by adding the suffix
'MIL' to the part number, for example, ULS-2140H -MIL. Also, on special
order, devices with improved linearity and drift can be supplied.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. + 18 V
VEE' ............................................ -18 V
Input Voltage, VIN ••••••••••••••••••••••••••••••••••••••••••••••• + 6 V
Reference Voltage Range, VREf .................................. - 3 V to VEE
Operating Temperature Range, TA (ULN-2140AJ ................. - 20°C to +85°C
(ULS-2140H) ................ -55°C to + 125°C
storage Temperature Range, Ts ........................... -65°C to + 150°C

10-16

SERIES 2140
HIGH-PERFORMANCE QUAD CURRENT SWITCHES

ELECTRICAL CHARACTERISTICS atTA = +25°C, Vee = +5 to + 15 V, VEE = -15 V, IMsB
Operational Amplifier Summing Junction Load (unless otherwise noted)

=

1 mA,

Limits
Characteristic
"0" Input Voltal!e
"1" Inout Voltage
"0" Input Current
"1" Input Current
Output Voltage
Output Voltage Swinl!
Output Current

Settling Time
Output Leakage Current
Ref. Transistor Static
Forward Current Gain
Non-Linearity
Te of Non-Linearity
Scale Factor Drift
Supply Current

Symbol
V,•,m
VINW
liN 0
liN 1
VOU!
!:J.V nllT
IM'B
IBIT 2
IBIT 3
11SB
IoU!
hFE

Test Conditions

TYJl.

-

-

2.0
VIN = 0.8 V
VIN = 2.4 V
R = 1 kfi
R = 1 kfi LOl!ic = 0000 to 1111
Logic = Olll
,
Logic = 1011
Lolic - 1101
Logic R[ = 1 kfi, To 0.01%, Logic - 1000 to Olll
Logic = 1111
Ic = 125 pA

mo

Over Operating Temperature Range
O°C to + 70°C (UlN-2140 Devices)
-55°C to + 125°C (ULS-2140 Devices)
Over Operating Temperature Ran~e
Vcr. = +15 V

Icc
lEE

Min.

-

Max.
0.8
-

-1.0
10

J!A

-

-

V

-

-

1.0
0.5
0.25
0.125
300

-

-

10

pA

100

-

-

-

-

-

0.5
20
10

-

5.0
8.0
-8.0

-

TYPICAL APPLICATION
15K

5K

LOGIC INpUTS

ANALOG
OUTpUT
VOLTAGE

75K

D'IiIl.J«l.A-Kl,805

10K

REFERENCE
• CONTACT FACTORY

10-17

pA

See Note
-2.0
2.0
1.0
0.5
0.25

Note: Output voltage with a resistive load will be a negative voltage.

+1OV O---YVv----.;y,'/J'-.+--1+'_

Units
V
V

rnA
rnA
rnA
rnA
ns

%
JlIlm/oC
~ml"C
~m1'C

rnA
rnA

ULN-2401A AUTOMOTIVE LAMP MONITOR

ULN-2401A AUTOMOTIVE LAMP MONITOR
FEATURES
• No Standby Power
• Completely Integral to Wiring Assembly
• Monitor 1 to 8 Lamps per Channel
.• Fail-Safe
• Reverse Voltage Protected
• 14-Pin Dual In-Line Plastic Package

OFFERING SEVERAL ADVANTAGES for a
lamp monitoring system, the ULN-2401A
monolithic integrated circuit is versatile, easily connected, and does not affect normal lamp operation.
Little additional wiring is required for installation
since the system is completely integral to the wiring
assembly.
The ULN-2401A electronic lamp monitor was
specifically designed for application in the severe
automotive environment. Lateral PNP transistors
provide high-frequency noise immunity and differential transient voltage protection. Reverse voltage
protection, internal voltage regulators, and temperature compensation are all incorporated in the design.
A failure within the device will not affect lamp
operation. As a quad comparator, the ULN-2401A.
can also be used to monitor multiple low-voltage
power supplies or, with appropriate sensors, industrial processes.
This lamp monitor operates by sensing the voltage
drop in the wiring (50 to 100 mV) for each lamp
circuit. If any of the four comparators sees a differential input voltage of greater than 26 m V, a failure
iamp is turned on. Lamp and wiring tolerances causing differential input voltages of up to
7 mV are permitted. Each comparator is capable of
monitoring a mixture of one to eight similar lamps.
No standby power is required because the operating
voltage is obtained from the sense leads and is energized only when the lamps are turned on.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vcc ..............•............ IS V
Peak Reverse Voltage (30 s) .................... S.O V
(0.1 s) .................... 30 V
Output Current, IOU! ......................... 500 mA
Operating Temperatu.re Range, TA ........ -35·C to +70·C
Storage Temperature Range, Ts ........ -S5·C to +150·C
EQUIVALENT LOGIC CIRCUITRY

10--18

ULN-2401A AUTOMOTIVE LAMP MONITOR

ELECTRICAL CHARACTERISTICS at TA = 25°C
Symbol

Characteristic
Operating Voltage Range

Vee

Output Satu ration Voltage

Output Leakage Current

Test Conditions

VOUT10N)

IOUTlOm

Vee
Vee
Vee
Vee
Vee
Vee

- 10 V,
= 13 V,
- 16 V,
- 16 V,
= 16 V,
- 16 V,

I:.V1N
I:.V 1N
I:.V1N
I:.V 1N
I:.V1N
I:.V1N

Mm.

Limits
Typ.

10

13

= 26 mV

-

26 mV
0 mV

-

-

-

-

-

-

26 mV

= 7 mV
-

0 mV (all inputs)

Max.

16
2.2
2.4
2.6
6.0
10
15

-

-

Units
V
V
V
V
mA
mA
mA

NOTE: Electrical characteristics (unless otherwise specified) apply to anyone pair of comparator inputs (pins 1 & 2, or 9 & 10, or 1J & 12) with all remaining
comparator inputs (including pins 3 & 4) open-circuited. To testthe comparator at pins 3 & 4, pins 9, la, 11 & 12 must be connected to Vee. In application,
pins 10 and 11 must both be at or near Vee for the comparator at pins 3 & 4 to be operative.
r-------------------------------~

50mV

APPROX.

TEST CIRCUIT

DWG.NO.A-IO.713

SCHEMATIC

OWG.NO.

10--19

8-1384

ULN-2429A FLUID DETECTOR·

ULN-2429A FLUID DETECTOR
FEATURES
•
•
•
•
•
•
•

High Output Current
A-C or D-C Output
Single-Wire Probe
low External Parts Count
Internal Voltage Regulator
Reverse Voltage Protection
14-Pin Dual In-tine Plastic Package

pRIMARILY DESIGNED for use as an automotive low coolant detector, the ULN-2429A
monolithic bipolar integrated circuit is ideal for
detecting tlie presence or absence of many different types of liquids in automotive, home, or
industrial applictions. Especially useful in harsh
environments, reverse voltage protection, internal voltage regulation, temperature compensation, and high-frequency noise immunity are
all incorporated in the design.
A simple probe, immersed in the fluid being
monitored, is driven with an a-c signal to
prevent pillting problems. The presence, absence, or condition of the fluid is determined by
comparing the loaded probe resistance with an
internal (pin 8) or external (pin 6) resistance.
Typical conductive fluids which can be sensed
are tap water, sea water, weak acids and bases,
wet sQil, wine, beer, and coffee. Non-conductive fluids include most petroleum products,
distilled water, dry soil, and vodka. The probe
can be replaced with any variable-resistance
element such as a photodiode. or photoconductive cell, rotary or linear position sensor, or
thermistor for detecting solids, non-conducting
liquids, gases, etc.

The ULN-2429A is rated for operation with a
load voltage of up to 30 volts. Selected devices,
for operation up to 50 V are available as the
ULN-2429A-1. In all other respects, the
ULN-2429A and the ULN-2429A-l fluid detectors are identical.
These devices are furnished in an improved
14-lead dual in-line plastic package with a copper alloy lead frame for superior thermal
characteristics. However, in order to realize the
maximum current-handling capability of these
devices, both of the output pins (1 and 14) and
both ground pins (3 and 4) should be used.

Vee

OSCILIATOI

NC

7

The high-current output is typically a square
wave signal for use with an LED, incandescent
lamp, or loudspeaker. A capacitor can be connected (pin 12) to provide a doc output for use
with inductive loads such as relays and
solenoids.

@

DICOUPLIHG

..........'"

FUNCTIONAL BLOCK DIAGRAM

10-20

ULN-2429A

FLUID DETECTOR

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee (continuous) ............... + 16 V, -SO V
(1 hr. at +2S°C) .................. +24 V
(10 j.IS) ......................... +SO V
Output Voltage, VOUT (ULN-2429A) .................... +30 V
(ULN-2429A-1) .................. +SO V
Output Current, lOUT (continuous) ................... 700 mA
(1 hr. at +25°C) .................. 1.0 A
Package Power Dissipation, Po ...................... 1.33 W"
Operating Temperature Range, TA............ -40oC to +SsoC
Storage Temperature Range, Ts ............ -6SoC to +lS0oC
"Derate at the rate of 16.67 mW/oC above TA ... +70°C.

ELECTRICAL CHARACTERISTICS

at T, = -

25°C, Vee

=

= + 12 V

Vour

(unless otherwise specified)
Characteristic
Supply Voltage Range
Supply Current
Oscillator Output Voltage
Output ON Voltage
Output OFF Current
Oscillator Frequency

Symbol

Test
Pin

Vee
lee
Vuse
Vour
lOUT
fuse

13
13
6
1,14
1,14
6

Limits
Min.

Typ.

Max.

Units

-

10

-

Vee - +16V
RL - IS kQ
Rl 2 30 kQ,loUT .. SOO mA
Rl ~ 10 kQ,VOUT '" Vouy(max)
Rl =- 18 kQ

-

V
mA

-

-

16
10

-

V"p_
V

Test Cond itions

TEST CIRCUIT

OWG.IIO.A-IO.707

10-21

-

3.0
0.9

2.4

1.S
100

-

JlA
kHz

ULN·2429A FLUID DETECTOR

CIRCUIT SCHEMATIC
OSCILLATOR

NC

®
4.7 K

• . NO. "'10,825

TYPICAL APPLICATIONS
lo-16V

lo-16V

,.----=~

- - - - -

tL.

____ OPTIONAL FOR
'!:l..P-c OUTPUT

OPTIONAL FOR
D-C OUTPUT
O• F

:D
...

~O.F

HIGH-RESISTANCE (AIR)
TURNS OUTPUT LAMP ON.
18K

HIGH-RESISTANCE (AIR)
TURNS OUTPUT LAMP OFF •

• . • . "10.701

IJI/IG. "0. Itt-tO,711

10-22

ULN-2430M TIMER

ULN.2430M TIMER
FEATURES
•
•
•
•

Microseconds to Minutes
Temperature Compensated
400 rnA Output
8-Pin Dual In-Line Plastic Package

time delays from several miP ROVIDING
croseconds to approximately 10 minutes, the

ABSOLUTE MAXIMUM RATINGS

ULN-2430M timer was originally designed for use
as a rear window heater timer in automotive applications. In typical system designs, this deVice will
meet all of the stringent automotive environmental
and transient requirements, including' 'load dump".
The rugged design, the high output current rating,
and an internal voltage regulator and reference allow
the ULN-2430M timer to be used in many industrial
applications.

Regulator Current, IREG ........................ 15 rnA
Latch Current, 14 .........•..•................ 3 rnA
Output Current, 10111 ••••••••••••••••••••••••• 400 rnA
Package Power Dissipation, Po ................ 330 mW'
Operating Temperature Range, TA ........ -40°C to +85°C
Storage Temperature Range, Ts ........ -65°C to +150°C
"Derate at the rate of 4.2 mW/'C above TA = +70'C.

TC ADJ.
V REF

TRIGGER

START/STOP

OUTPUT

2

DWG. NO. A-IO. SQ6

GROUND

10-23

ULN-2430M TIMER

ELECTRICAL CHARACTERISTICS at TA
Characteristic
Operating Voltage Range
Regulator Voltage
Output Breakdown Voltage
output saturatIOn Voltage
Latch Voltage
Trigger Threshold
Reference
Temp. Coeff. of
Trigger Threshold
Trigger Input Current
Capacitor Discharge Time
Supply Current

Test
Pin

=

+25°C (unless otherwise noted), Fig. 1
Test Conditions

5

2
2

4
7
8
7
7
7
5

ILEAK = 100 pA
lOUT - 400 rnA
loUT - 250 rnA
Over Op. Temp. Range
V7N 5
VJV5

C1 = 220 J.LF, ±10%
Vee = 16V

Min.

Typ.

10
8.4
30

-

5.5
0.60
0.58
-2.0

limits
Max.

9.0

16
10.1

-

-

-

7.0
0.63
0.63

-

-

20

-

-

Units
V
V
V
V
V
V

2.5
1.3
8.0
0.67
0.68
-4.0

mY/DC

200
2.0
10

nA
s
rnA

CIRCUIT OPERATION
The basic system shown in Figure 1 provides
power for the timer after the momentary closure of
the "rear window heater switch" SI. Momentary
closure provides an input to pin 4 which turns ON the
output driver, energizes the relay, and (through the
relay contacts) provides power to the timer and the
heater element. Waveforms are shown in Figure 2.
The output remains ON, supplying power to the
heater until V7 = 62% Vs , which occurs at time t =
R, X C 1 • The time delay can be adjusted from several
microseconds to approximately 10 minutes by the
choice of R, and C1 • When t = R, X C1, the comparator changes state and the relay de-energizes,
returning the circuit to the quiescent condition.
Timing accuracy is primarily a function of capacitor leakage for long time delays. Hard switching of

the comparator necessitates low input bias currents
on the comparator and low capacitor leakage current. The worst case comparator input is 200 nA and
the charge current at V7 = 62% Vs is approximately
1.7 p.A for R, = 2 Mfl. For these reasons, it is
recommended that R, not exceed 2 Mfl and C1 leakage be less than 500 nA.
Diode D, and the circuitry associated with pin 4
provide start-stop capability for the timer. When the
voltage at pin 4 is larger than 8 V timing is initiated.
When less than 5.5 V, timing is stopped. Transient
protection against load dump and other automotive
environmental hazards is provided by the integrated
circuit design and discrete components Z" C2 , R3 ,
~, and D,.

10-24

ULN-2430M TIMER

TYPICAL APPLICATION
(Figure 1)

TIMER WAVEFORMS

J

11.7 V

V.

9.0 V

L

+--..,,-- ' - - - - - - - - - - - - - - - 1I

J

~

••,.C,

L
-1
!}~.

10-25

MO. A.-IO.8lJ.II

ULN..2435A, .ULN-2445A, ULN-2455A AUTOMOTIVE LAMP MONITORS

ULN-2435A, ULN-2445A, AND ULN-2455A
AUTOMOTIVE LAMP MONITORS
FEATURES
•
•
•
•
•
•

No Standby Power
Integral to Wiring Assembly
Fail-Safe
Reverse Voltage Protected
Internal Transient Protection
Dual In-line Plastic Packages

CAPABLE of monitoring all types of automotive
lamps, Type ULN-2435A, ULN-2445A, and
ULN-2455A lamp monitors provide multiple LED
outputs to pinpoint the area in which a lamp has
failed. Types ULN-2435A and ULN-2445A feature
an additional output that triggers an alarm if any of
the comparators detects a lamp failure. This output
can be used to drive an audible signaling device or
centrally located warning indicator.

All three integrated circuits are designed for use
in the severe automotive environment. Lateral PNP
transistors provide high-frequency noise immunity
and differential transient-voltage protection. Reverse voltage protection, internal regulators, and
temperature compensation are all embodied in the
circuit design. A failure within the device will not
affect lamp operation.
'Types ULN-2435A and ULN-2445A are supplied
in I8-pin dual in-line plastic packages. The Type
ULN-2455A lamp monitor is supplied in a I4-pin
dual in-line plastic package.

The Type ULN-2435A lamp monitor has interconnected comparator ouputs and logic to monitor the
ignition circuit and fuses, making it uniquely applicable to automotive applications. Type ULN-2445A
is similar, but has no interconnected comparators.
Type ULN-2455A is a general-purpose quad comparator that can be used to monitor automotive
lamps, mUltiple low-voltage power supplies, or, with
appropriate sensors, industrial processes.

ABSOLUTE MAXIMUM RATINGS
+ 25°( Free-Air Temperature

at

Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . .. 30 V
Peak Supply Voltage, Vee (0.1 s) , . . . . . . . . . . . . . . . . .. 80 V
Peak Reverse Voltage, VR•••• , • • • • • • • • • • • • • • • • • •• 30 V
Output Current, loUT .......................... 35 rnA
Package Power Dissipation, Po (UlN-2435/45A) ...... 2.3 W*
(UlN-2455A) ........ 2.0 W**
Operating Temperature Range, TA • • • • • • •• - 40°C to + 85°C
Storage Temperature Range, Ts ...... , . : - 65°C to + 150°C

Installation and operation of these quad lamp
monitors has no effect on normal lamp operation.
Comparators sense the normal voltage drop in the
lamp wiring (approximately 20 mY) for each of the
monitored lamp circuits. Little additional wiring is
necessary for installation because the system can
be completely integral to the wiring assembly. No
standby power is required: The operating voltage is
obtained from the sense leads; the system is energized only when the lamps are turned ON.

*Derate at the rate of 18.18 mW/oC above T,
*·Derate at the rate of 16.67 mW/oC above T,

10-26

=
=

+ 25°C.
+ 25°C.

ULN-2435A, ULN-2445A, ULN-2455A AUTOMOTIVE LAMP MONITORS

PRINCIPLE OF OPERATION
Operation of these lamp monitors is similar to that of a simple bridge
circuit in which the top two legs of the bridge are formed by the wiring
assembly resistance or discrete low-value resistors. The bottom legs of the
bridge are the monitored lamps. Four differential amplifier circuits sense
the voltage drops in the wiring assemblies (approximately 20 mV) for each
of the lamp circuits. When the system detects a difference in voltage due
to an open filament, the appropriate output driver is turned ON.
Sprague Electric Technical Paper TP 81-7 discusses the requirements of
automotive lamp monitoring systems and presents a more detailed description ofthe operation of these differential sense amplifiers (page 10-56).

BASIC BRIDGE MONITORING SYSTEM
FEED

TYPICAL SWITCH CHARACTERISTICS
30V

---,I

Vec

5

~

"i



i

0I-

:>

7.0mV

ELEORICAL CHARAOERISTICS at TA

Output Saturation Voltage
Differential Switch Voltage
Input Current

x

«

1:

...-

0

VCE (SAT!

20 mY

DIFFERENTIAL SWITCH VOLTAGE, 6YIN
Owv· No. A-12.187

Dwg. No. A-ll.473A

Characteristic
Output leakage Current

CJ)

I
I

0

SIGNAL
OUTPUT

J:

~
§

~

= + 25°(, V(( = VIN = 10 to 16 V (unless otherwise shown)

Test Pins
ULN-2435/45A
ULN-2455A
1,7,10,
1,4,8,11
13, 15, 16
1,7,10,
1,4,8,11
13, 15, 16
2-3,8-9,
11-12,17-18
4
5
6
2,8,11,17
3,9, 12, 18

2-3,5-6,
9-10,12-13
NA
NA
NA
2,5,9, 12
3,6,10,13

Test Conditions
VOUT = 80 V, 6. VIN < 7 mV
loUT= 5 rnA, 6. VIN > 20 mV
loUT = 30 rnA, 6. VIN > 20 mV
Absolute Value V(2) - V(3)
VIN = Vee = 16 V
VIN =Vee =16V
VIN =; 0 V, Vee = 16 V
6. Vld = V(2) - V(3) = + 30 mV
6. VIN = V(2) - V(3) = - 30 mV

10-27

Min.

-

-

Limits
Typ.
Max.
100
-

7.0

0.8
1.4
13

-

-

-

-

150
1.0

300
2.5

-

Units
!LA

1.0
2.0
20

V
V
mV

500
15
-1.0
800
4.0

!LA
rnA
rnA

!LA
rnA

ULN-2435A, ULN-2445A, ULN·2455A. AUTOMOTIVE LAMP MONITORS
ULN-243SA
FUNCTIONAL BLOCK DIAGRAM
STOp· FUSE

4

IGNITION
MASTER
INDICATOR
TEST

L PARK

I

L PARK

L.. TAIL

L. STOP
L. TAIL

L STOP

R. STOP
R. TAIL

R. STOP

R. TAIL
R. PARK
R. PARK

..... 110. A-12.031A

ULN-2435A and ULN-2445A TRUTH TABLES
OUTPUT PINS
INPUT PINS
CONDITIONS
Normal
L. Park tamp Failure
L. Tail Lamp Failure
Marker Lamp Failure
Marker Lamp Failure
R. Stop Lamp Failure
L. Stop Lamp Failure
R. Park Lamp Failure
R. Tail Lamp Failure
Stop Lamp Fuse Failure
Indicator Lamp Test
= -

2/3

=

>
<

=
=

=
=
=
=
=

X

8/9

=
=
=
>
<

=

=
=
=

=

X

ULN-2435A

11112 17118 6 4
= = 0 H
= = 0 H
= = 0 H
= = 0 H
= = 0 H
>
= 0 H
<
= 0 H
= > 0 H
= < 0 H
= = 0 L
X
X L X

HL-

oX-

1 7 10 13 15 16

X
X
X
X
X
X
X
X
X

H
L
H
H
H
H
H
H
H
H
L

H
H

less than 7mV offset between a pair of inpui pins

> ~ Greater than· + 20 mV differential between a pair of input pins [V(2J
< - Greater than - 20 mV differential between a pair of input pins [VI2J

-

V~

V"T (outputs) or GROUND (inputs)
Open or Vee
Irrelevant

10-28

ULN-2445A

5

V,,)l
V(3)l

H
H
H
L
L
H
H
H
H
H
L

H
H
H
H
H
L
H
H
L
L
L

H
H
L
H
H
H
L
H
H
L
L

H
L
L
L
L
L
L
l
L
L
L

H
H
H
H
H
H
H
L
H
H
L

1 7
H H
l H
H H
H L
H L
H H
H H
H H
H H
H H
L L

10 13 15 16
H
H
H
H
H
L
H
H
H
L
L

H
H
H
H
H
H
l
H
H
L
L

H
L
L
l
L
L
L
L
L
L
L

H
H
H
H
H
H
H
L
H
H
L

ULN-2435A, ULN-2445A, ULN-2455A AUTOMOTIVE LAMP MONITORS
ULN-2445A FUNCTIONAL BLOCK DIAGRAM
STOP FUSE

4

IGNITION
MASTER
INDICATOR
TEST

L. PARK

L. TAIL

L. STOP
L. STOP
R. STOP

R. STOP

R. TAIL
R. PARK
R. PARK

MARKERS

MARKERS
Dog. 110. A-I2.032A

ULN·2455A
FUNCTIONAL BLOCK DIAGRAM

@ NC

INI·~OUTI

INI.~

~

_
8 OUTs
INIA~
INs.

+

Owg. No. A-12.0JJA

10-29

ULN-2435A, ULN-2445A, ULH-2455A AUTOMOTIVE LAMP MONITORS

TYPICAL 'APPLICATIONS
AUTOMOTIVE LAMP MONITOR
...--..,.---_----.._---------------roBATTERY
IGNITION

ULN-2445A
r------------- ----,
MASTER

R

R

R

R

R

330 ~

R

L. PARK

R

330 ~
L. STOP
330 ~
330

~.STOP
R. PARK

330 ~

... ... "
~ e ~

0:

...J

~

~

...i

...i

iii

'".j '"iii

'"
" l:!0:
0:

...J

0:

~
iii

«

l:

MARKERS

0:

~

1:

. . . . . . .-151.

QUAD LAMP MONITOR
Vee

Vee

ULN-2455A

IK

IK

IK

DIog. 110. A-12,03511

10-30

ULN·2435A, ULN·2445A, ULN·2455A AUTOMOTIVE LAMP MONITORS

TYPICAL APPLICATIONS (Continued)
POWER SUPPLY SUPERVISORY CIRCUIT

VOLTAGE FOLLOWER SUPPLIES
DETECTOR OPERATING CURRENT
VOFFSET
VSWllCH

«

Rl

=

IF

THEN

R2 (VIN - VREF)
VREF

VREF = 10V
VIN = 15V
R2 = 15 kS2

IF

tWIN =250 mV
VSWITCH = 13 mV

THEN

.".

Rs=423S2

Rl = 7.5 k~

illig.

No. 8-1524

SIMPLIFIED SCHEMATIC
(One of 4 differential
sense amplifiers)

IE
10 MASTER INDICATOR DRIVER
Owg.No. A-12.036

10-31

ULN~3310D

ANDULN"3310TPRECISION LIGHT SENSORS

ULN-3310D AND ULN-3310T
PRECISION LIGHT SENSORS
FEATURES
•
•
•
•
•

Two-Terminal Operation
Linear Over a Wide Range
Precalibrated
Wide Operating-Voltage Range
High Output

REPLACEMENTS for photocells and
D IRECT
phototransistors, Type ULN-331OD and ULN33 lOT Precision Light Sensors are two-terminal
monolithic integrated circuits that linearly convert
light level into electrical current. The light-controlled current sources are linear over a wide range
of supply voltages and light levels and require no
external calibration.
Each Precision Light Sensor (PLS) consists of a
photodiode and a calibrated current amplifier. The
design of the amplifier allows derivation ofits supply
current from the same terminal as the photodiode
cathode and the amplifier output. Since this supply
current is a linear function of the photodiode current, it acts as part of the signal current. Each PLS
is calibrated during manufacture for an output currentof40ILAat 100 ILW/cm2 at 880 nm.

Type ULN-3310D is furnished in a hermetically
sealed metal package with glass end cap conforming
to JEDEC outline TO-52 (TO-206AC). Type ULN3310T is supplied in an inexpensive clear plastic
package. Both devices are rated for operation over
the temperature range of - 40°C to + 70°C.

ABSOLUTE MAXIMUM RATINGS
Supply Voltage .............................. 24 V
Operating Temperature Range. . . . . . . . .. - 40°C to + 70°C
Storage Temperature Range
(ULN-33IOO) ............ - 55°C to + 150°C
(ULN-33IOn ............ - 55°C to + 1l0°C

FUNCTIONAL BLOCK DIAGRAM

Owg. No. A-ll.991

10-32

ULN-3310D AND ULN-3310T PRECISION LIGHT SENSORS

APPLICATIONS INFORMATION
Type ULN-33IOD and ULN-33lOT precision light sensors can be used
to replace several types of light sensors:
Photocells exhibit a change in resistance proportional to light intensity.
However, they are highly inaccurate. They exhibit light memory, which
makes their response dependent on the previous light level.
Phototransistors exhibit no light memory, but show as much as 50%
variation in sensitivity among parts of the same type due to process and
beta variations. Output current as a function of light level is linear only
over a very small range.
Photodiodes have an output current that is a linear function of illumination, but the output is very small. The output current is typically in the
range of tens of narioamperes. These devices also show wide unit-to-unit
sensitivity variations.
Sprague Electric precision light sensors are two-terminal replacements
for photocells, phototransistors, and photodiodes. They are internally calibrated, have relatively high output currents, and are linear over a very
wide range of light levels. Low-level amplifiers and adjustable controls can
be eliminated. The ULN-3310DIT Precision Light Sensors are also ideal
for use in arrays where matched characteristics are often required. Unpackaged chips are available on special order.
Both the hermetically sealed Type ULN-33IOD sensor, and the low-cost
Type ULN -33 lOT plastic-encapsulated sensor, are cost-effective solutions to precise light-sensing or light-measurement applications.

mORICAL CHARAOERISTICS at TI
Characteristic
Initial Accuracy at 100 ....W/cm 2
Sensitivity
Operating Voltage Range
Output Linearity, 10 to 10k ....W/cm 2
Dark Current
Power Supply Rejection, (alallo)/av
Temperature Coefficient of Sensitivity

= + 25°(, Vcc = 12 V
Min.

Typ.

-

-

380
2.7

400
12

-

-

40

-

50
3500

NOTE: Light source is an infrared LED with a peak output wavelength of 880 nm.

10-33

Limits
Max.
±5.0
420
24
±5.0
100

-

Units

%
nAl....W/cm 2
V

%
nA
dB
ppMrC

ULN-3310D AND ULN-3310TPRECISION LIGHT SENSORS

TYPICAL CHARACTERISTICS
RELATIVE SPECTRAL RESPONSE
AS A FUNCTION OF WAVELENGTH OF LIGHT
z

1.2

z

.

i

1.0.

!

:•

••
'1..01""

6

/1

0.
300

8

,~

~ C.B

c. 2

"gy:t

)\

500

i

~~
RESPONSE
lSI LICON
PHOTOD1ooE I

EMISSION

A =BBclnm
TA= +25°C

1.0.

~

~

\

PHarDPIC
RESPONSE I HUMAN EYE I

!il

~ \~
~

PEAK LED

3.0.

I

600

.J

f

V
•i

10.

~ ~"!
~~

I

I
" ,f'l. i

400

....

OUTPUT CURRENT
AS A FUNCTION OF ILLUMINANCE

~"

700

~!!;
800.

900.

?:

0..3

!z

~:> C.1

"1000

U

~

~ 0.03

o

110.0.

0..0.

'V

WAVELENGTH I N NANOMETERS
Dwg. No. A-12.135A

V

V

V

V

1

V

0..003

PROPAGATION DELAY

0.0.0.1
10.

AS A FUNCTION OF ILLUMINANCE

100

30

30.0.

LIGHT LEVEL IN

lK

3K

lCK

~W/cm'

OUTPUT qJRRENT
AS A FUNCTION OF !;UPPLY VOLTAGE
10.

lC.ooo~W/cJ.

'"Z
Q

§

3.0.

:::;
'"

A= aBcnm

..J

:t

~

?:
l(

?:

TA= +25°C

1.0.
1,000~W/cm

!zw

g

~

O.

3

....

it

8

0..1
lCC~W/cm'

'O.CC31---+--i,----t---i--+---i

0..0.3

C.C01,LC--3OL--""'100L....-3...100--...
,KL-_..I3K--,....
CK

0..0.1
0.

5

10.

15

20.

25

SUPPLY VOLTAGE IN VOLTS

LIGHT LEVEL IN ~W/cm'

!lw9.Jto

10-34

A-Il',137A

ULN·3310D AND ULN·3310T PRECISION LIGHT SENSORS

TYPICAL APPLICATIONS
Figure I shows a Type ULN-3310D or ULN-3310T integrated circuit
replacing a photocell or phototransistor for the precise detection of a light
level. Use of the precision light sensor eliminates the need for external
calibration because it is calibrated to an initial accuracy of better than 5%
during manufacture.

-~ PHOTOTRANSISTOR

::t.J

OR PHOTOCELL

VCC
ULN-331OD
OR
ULN-331OT

DWG. NO. A-11,80B

Figure lA
LIGHT-LEVEL DETECTOR
REQUIRING EXTERNAL CALIBRATION

=

Figure 1 B
LIGHT-LEVEL DETECTOR USING PLS

In Figure 2. two precision light sensors are used in a differential configuration to detect the edge of an object. When the light level on the first
sensor is half of that on the second. the circuit switches. This circuit
operates over a wide range of ambient light levels. No external calibration
is required.

10-35

ULN·3310D AND ULN·3310T PRECISION LIGHT SENSORS

Vr:.r:.

130K

65K
400

I!lOK

lOOK

Dw9. No. A-ll.995

Figure 2
DIFFERENTIAL EDGE DETECTOR

SCHEMATIC
Vee
3

I

GROUND
DW9. No. A-ll.996

10-36

ULN-3310D AND ULN-3310T PRECISION LIGHT SENSORS

ULN-3310D
SENSOR-CENTER LOCATION

Dwg. No. A-ll.993A

ULN-3310T

SENSOR-CENTER LOCATION

RELATIVE RESPONSE
AS A FUNCTION OF THE ANGLE OF INCIDENCE

PHOTO-SENSITIVE AREA,

0.041" Dia. (1.04mml

1. 0

/

9

8

,/

V

I T' ~

V

~-

I

..

0

e= 0
7

o.

100

80

60

40

20

I
o

I
20

40

"

,

60

80

I

Center on PIN 2 within

'0.010" ( 0.254mm I

100

-r

0.130" (3.30mml
0.110" (2.19mml

~I-r--r--r--I-'l

INCIDENT ANGLE, 6 IN DEGR£ES

Dwg.No. A-IZ,134

10-37

Ilwq. No. A-l1.9948

ULN-3330D, ULN-3330T, ULN-3330Y

OPTOELECTRONIC SWITCHES

ULN-3330D, ULN-3330T, AND ULN-3330Y
OPTOELECTRONIC SWITCHES

FEATURES
• Photodiode with:
On-Chip Amplifier
On-Chip Level Detector
On-Chip Power Driver
On-Chip Regulator
• Operation to 30 kHz
• Plastic or Hermetic Package

tion increases by approximately 12%. Typical loads
include an incandescent lamp, LED, sensitive relay,
or d-c motor. For applications requiring interface to
TTL or CMOS, Series ULN-3360 integrated circuits
are similar devices that include an internal pull-up
resistor.
Type ULN-3330D is furnished in a hermetically
sealed metal package with a glass end cap. The 'D'
package conforms to JEDEC outline TO-52 (TO206AC). The miniature Type ULN-3330T is supplied in a clear plastic package only 0.080" (2.0 mm)
thick. Type ULN-3330Y is furnished in an inexpensive clear plastic package meeting the JEDEC
TO-92 (TO-226AA) outline.

pROVIDING complete light detection and lowlevel signal-processing circuitry in a single 3lead package, Type ULN-3330D, ULN-3330T, and
ULN-3330Y optoelectronic switches are monolithic
integrated circuits containing a photodiode, lowlevel amplifier, level detector, output power driver,
and voltage regulator. The three devices are costeffective solutions to light-sensing consumer or
industrial applications. They require no external
components for operation.
The optoelectronic switches typically tum ON as
illumination of the photodiode falls below 55 fJ,W/
cm2 at 880 nm. An internal latch provides hysteresis:
The output will not tum OFF until the iIlumina-

FUNCTIONAL BLOCK DIAGRAM

O.g. Nu. A-U,l27A

10-38

ULN-3330D, ULN-3330T, ULN-3330Y
OPTOELECTRONIC SWITCHES

ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 15 V
Output Current, louT ............................................. 50 mA
Package Power Dissipation, Po ................................. " See Graph
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . .. - 40°C to + lO°C
Storage Temperature Range, Ts
ULN-3330D .................................... - 55°C to + 150°C
ULN-3330T .................................... - 55°C to + 1WC
ULN-3330Y .................................... - 55°C to + 1l0°C

TYPICAL TRANSFER CHARACTERISTICS

8

>

w

~o
...>
...a..
::I

::I

o

ILLUMINATION, E
Dwg. No .• A-ll,128

ELECTRICAL CHARACTERISTICS alTA

= + 25°C, Vee = 6.0 V, A = 880 nm
limits

Characteristic

Min.

Typ.

Max.

Supply Voltage Range

Vee

4.0

6.0

15

V

Supply Current

Icc

-

4.0

8.0

mA

light Threshold Level

EON

Output ON

45

55

65

ILW/cm 2

Output OFF

-

62

-

ILW/cm 2

Hysteresis

EOff
aE

(E Off - EON)/Eoff

10

12

14

%

Output ON Voltage

VOUT

= 15 mA
louT = 25 mA
VOUT = 15 V

-

300

500

mV

-

500

800

mV

-

-

1.0

90% to 10%

-

200

500

ILA
ns

10% to 90%

-

200

500

ns

Output OFF Current

Symbol

Output Fall Time

lOUT
tf

Output Rise Time

t,

Test Conditions

louT

:

10-39

Units

ULN-3330D, ULN-3330T, ULN·3330Y

OPTOELEORONIC SWITCHES

RELATIVE SPECTRAL RESPONSE
AS A FUNCTION OF WAVELENGTH OF LIGHT
z

1.2

N

.•

til

w
Vl

~

#'r

I

Z

rr

:
••
.,

Vl

w 0.8

0:

...J

«0:

I-

0.6

W

/;

~

r

frl

Q.

Vl

> 0.4

...J

on

Q.
...

~

on

CIt

g-'"<'5 '"
'i

Q.

1.0

,
~D..ID

Z

0

~

c'-I

NVl

~'" '"~

PEAK LED
EMISSION

-v

v.::O~
RESPONSE
(SILICON
PHOTOOIODE I

\

Ii
I

•!

\

PHOTOPIC
. \ RESPONSE (HUMAN EYE I

W

"

0:

c

0.2

I

. . ,,1-~

o
300

400

500

z
w
w

'"'"

~

...J

~

600

w

\fil
\'"

""'II

...
e:'"

\'"700

1!:

900

800

1000

WAVELENGTH IN NANOMETERS

1100

Dwg. No. A-12,135A

RELATIVE SWITCH RESPONSE
AS A FUNCTION OF THE ANGLE OF INCIDENCE

I

0.9t--+---i7'--+--+--

::: 0.8 .....--j1'---+---+---1---

i

o

6= 0

0.7t---t---t----t--f---

100

80

60

40

20

o

20

40

60

80

INCIDENT ANGLE. 8 IN DEGREES
Dwg.No. A-IO.853A

10-40

100

SERIES 8126
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

SERIES 8126
(SG3526J, SG2526J AND SG1526J)
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS
FEATURES
• 8 Vto 35 VOperation
• Dual 100 mA Source/Sink Outputs
• Internal Regulator
• Current Li miting
• Temperature-Compensated
Reference Source
• Sawtooth Generator
• Low Supply-Voltage Protection
• External Synchronization
• Double-Pulse Suppression
• Programmable Dead-Time
• Programmable Soft-Start

THESE INTEGRATED CONTROLLERS
of fixed-frequency switching regulators and
similar power devices can be used with
transformerless or transformer-coupled supplies
with single-ended or push-pull, positive or
negative output.
Types ULN-8126A/R, ULQ-8126A1R, and
ULS-8126R have a temperature-compensated
voltage reference, a sawtooth waveform
generator, an error amplifier, a pulse-width
modulator, pulse metering and steering logic
and two 100 mA source/sink drivers. The
devices perform housekeeping functions such as
soft-start, low-voltage lockout, digital current
limiting and double-pulse suppression. Other
features include a data latch for single pulse
metering, adjustable dead time and provision
for symmetry correction.
(Continued on next page)

UlN·8126A
UlQ-8126A

UlN·8126RISG3526J
UlQ·8126RISG2526J
UlS-8126RISG1526J

ABSOLUTE MAXIMUM RAT,NGS
at TA

= +25~C

Supply Voltage, Vs ............................. 40 V
Collector Supply Voltage, Vc...................... 40 V
logic Input Voltage Range, VIN .......... -0.3 Vto +5.5 V
Analog Input Voltage Range, VIN ............ -0.3 Vto Vs
Output Current, '0 ......................... ±200 rnA
Reference load Current, .I REF ••.•••...•••..•••.•. 50 mA
logic Sink Current, 'iN ........................ 15 mA
Package Power Dissipation, Po (Plastic 01 P) ....... 2.3 W*
(Cer-DIP) .......... 1.9 W*
Operating Temperature Range, TA ....... See Ordering Data
Storage Temperature Range, Ts ........ -65°C to +150°C
• Derate Ii nearly to 0 walts at TA = + 150°C.

10-41

SERIES 8126
SWITCHED·MODE POWER SUPPLY CONTROL CIRCUITS

Low-cost Types ULN"-SI26A and ULN-SI26R
are rated for continuous operation over a
temperature range that recommends them for
commercial use (O°C to + 70°C).
Control circuits with commercial and extended temperature ranges are available in both
the hermetically sealed cer-DIP package (suffix
"R") and a dual in-line plastic package (suffix
"A") with a copper alloy lead frame that gives
them enhanced power dissipation ratings.
Cer-DIP packaged parts normally are marked
with original source part numbers shown below.
Sprague part numbers appear on plastic
packages. Sprague part numbers should be used
on orders and correspondence concerning all
Series S126 devices.

All digital inputs are TTL and CMOS com"
patible. Active-low logic allows use of wired-OR
connections.
Type ULS-SI26R is supplied in an IS-pin
glass/ceramic hermetically sealed (cer-DIP)
package. It is rated for operation over a
temperature range that recommends its use in
military and aerospace applications (- 55°C to
+ 125°C).
Types ULQ-8126A and ULQ-8126R operate
over an extended temperature range of - 40°C
to + 85°C that meets the demands of many industrial applications.

ORDERING INFORMATION
Operating
Temperature Range
Commercial
O°C to +70°C
Extended
-40°C to +85°C
Full
-55°C to + 125°C

-

Sprague
Part Number
UlN-S126R
UlN-S126A
UlO-S126R
UlQ-8126A

SG1526J

UlS-S126R

Original Source
Part Number
SG3526J

Package
Car-DIP
Plastic
Cer-DIP
Plastic

SG2526J

Cer-DIP

10-42

SERIES 8126
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

RECOMMENDED OPERATING CONDITIONS
Logic Supply Voltage, Vs ....... , ............................... 8 Vto 35 V
Collector Voltage, Vc ........................................ 4.5 Vto 35 V
OutputLoad Current, 10 ..................................... 0 to ±100 mA
Reference Load Current, Il ..................................... 0 to 20 mA
Oscillator Frequency, f ..................................... I Hz to 400 kHz
Oscillator Timing Resistance, RT ............................. 2 kQ to 150 kQ
Oscillator Timing Capacitance, Cr ........................... O.OOl,..F to 20 ,..F
Programmed Deadtime ........................................ 3% to 50%
Operating Temperature Range, TA ........................... See Ordering Data

FUNOIONAL BLOCK DIAGRAM

Vc

REsEr
CSOFT-START

5
4·}--L-.--J

FEEDBACK
VOLTAGE

CURRENT
SENSE

Dwg. No. A-ll.427

10-43

SERIES 8126
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

ELECTRICAL CHARACTERISTICS over operating temperature range, Vs
(unless otherwise noted)
Extended & Full
Temperature Devices·
Min.
Typ.
Max.

Characteristic

Test
Pins

REFERENCE SECTION (lL

=

Reference Voltage

18

T = +25°C
Over recommended conditions

Reference Voltage
Regulation

18

Short Circuit Current
Standby Current

Test Conditions

=

15 V

Limits
Commercial Temperature
Devices·
Min.
Typ.
Max.

Units

0 mAl

4.95
4.90

5.00
5.00

5.05
5.10

4.90
4.85

5.00
5.00

5.10
5.15

V
V

Vs :: 8 to 35 V
I[ - 0 to 20 mA
Over operating temperature range

-

10
10
15

20
30
50

-

10

10
15

30
50
50

mV
mV
mV

18

VREf = 0 V

25

50

100

25

50

100

mA

17

Vs = 35 V, RT = 4.22 kQ, V8 = 0.4 V

-

18

-

-

18

-

mA

400

-

1.0

-

-

400

-

1.0
-

Hz
kHz

OSCILLATOR SECTION (f = 40 kHz, IIy = 4.22 kQ, CT = 0.01 ",F, RD = OQ)

Oscillator Frequency

9,10

RT = 150kQ,

Cr =

20 ",F

RT = 2 kQ, CT= 0.001 ",F
Initial Oscillator
Accuracy

9,10

TA = +25°C

-

3.0

-

-

3.0

-

%

Oscillator Stability

9,10

Vs = 8 to 35 V
Over operating temperature range
Over recommended conditions

-

-

-

0.5
1.0
2.0

-

-

-

0.5
1.0
2.0

-

%
%
%

Vs = 35 V

-

3.0

3.5

-

3.0

3.5

V

Sawtooth Peak
Voltage

10

Sawtooth Valley
Voltage

10

Vs = 8.0 V

0.5

1.0

-

0.5

1.0

-

V

Sync Pulse Width

12

C[ = 15 pF

-

500

-

-

500

-

ns

logic HIGH, IsouRcE·= -40 iAA
logiC luw, ISINK - J.t) mA

2.4
-

4.0

-

-

V

U.4

2.4
-

4.0

U.2

U.2

U.4

v

VIN = 2.4 V
VIN 0.4 V

-

-125

-

-125

-200

",A

-225

-200
-360

-zz~

-jbU

",II

100 mV step, 5mv overdrive, Rs = 50Q

-

300

-

-

HOUSEKEEPING FUNCTIONS

logic Voltage levels

5,8,12

Input Current

5,8,12

Shutdown Delay

8-13,
16

NOTES: Negative current is defined as coming out of (sourcing) the specified device pin.
·Commercial, extended, and full temperature-range devices are defined in preceding text and "Ordering Information" table.

10-44

300

-

ns

SERIES 8126
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

ELECTRICAL CHARACTERISTICS (Continued)

Test
Pins

Characteristic
ERROR AMPLIFIER (V CM

-

Input Offset Voltage

1,2

Input Bias Current

Extended & Full
Temperature Devices·
Min.
Typ.
Max.

Test Cond it ions

Limits
Commercial Temperature
Devices·
Min.
Typ.
Max.

Units

0 to 5.2 VI

-

2.0

5.0

1,2

-

-350

-1000

Input Offset Current

1,2

-

35

Error Amplifier Gain

1-3

Open loop, Rl = 10 MQ

64

Small Signal
Bandwidth

1-3

Cl = 30 pF

Output Voltage Swing

3

Positive limit, Rl - 50 kQ
Negative limit, Rl - 50 kQ

2.0

5.0

mV

-350

-2000

nA

100

-

35

200

nA

72

-

60

72

-

dB

0.7

1.0

1.0

3.6

0.4

-

4.2
0.2

-

MHz

4.2
0.2

-

0.7

3.6
-

0.4

V
V

Rs = 2 kQ

Common Mode Range

1,2

Vs =.8.0 V

0

-

5.2

0

-

5.2

V

Common Mode
Rejection

1.2

Rs = 10 kQ

70

94

-

70

94

-

dB

Error Amplilier
Vs Rejection

3

I = 120 Hz, fl Vs = 1.0 V,m,

66

80

-

66

80

-

dB

CURRENT LIMITING
Common Mode Range

6,7

Vs = 18 V

0

-

15

0

-

15

V

Sense Voltage

6,7

VCM = 0 to 15 V

-

100

-

100

-

mV

Input Current

6,7

VCM = 0 to 15 V

-

-3.0

-

-3.0

Voltage Gain

7-8

18 = 360 JAA

-

68

-

-

68

-

JAA
dB

-

100

400

-

400

mV

100

I
-1

100

-

100

-

JAA

12.5
-

13.5
13
0.2
1.2

13.5
13
U.l
1.2

-

V
V

0.3
-

12.5
-

son·START SEalON
Error Clamp Voltage
Cs Charging Current

I - I Vs = 0.4 V
I 4 I Vs = 2.4 V

I
I

OUTPUT DRIVERS (VC = 15 VI
Output Voltage

13,16

lOUT
lOUT
lOUT
lOUT

=
=
=
-

-20 mA
-100 mA
20 mA
100 mA

-

-

leakage Current

13,16

Vc = 40 V

-

0.1

100

Rise Time

13,16

-

300

-

Fall Time

13,16

Cl = 1000 pF
Cl = 1000 pF

-

-

200

-

-

-

NOTES: Negative current is defined as coming out of (sourcing) the specified device pin.
'Commercial, extended, and full temperature-range devices are defined in preceding text and "Ordering Information" table.

10-45

.. U.;1

V

-

V

0.1

100

300

-

JAA
ns

200

-

ns

SERIES 8160
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

SERIES 8160
(NE5560N, NE5560F AND SE5560F)
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUITS

FEEOFORWARD R C

SYNC
INPUT

DEMAGNETIZATION.
HIGH-VOLTAGE PROTECTION

FEATURES
• Internal Voltage Regulator
• Current Limiting
• Temperature-Compensated
Reference Source
• Sawtooth Generator
• Pulse-Width Modulator
• Remote ON/OFF Switching
• low Supply-Voltage Protection
• loop-Fault Protection
• Demagnetization/High-Voltage
Protection
• Maximum Duty-Cycle Adjustment
• Feed-Forward Control
• External Synchronization

GROUND
Dwg.No.B-1463A

FUNCTIONAL BLOCK DIAGRAM

CONTROL of state-of-theCOMPREHENSIVE
art power supplies is offered by Sprague Type

Types ULN-8160R and ULS-8160R are furnished
in 16-pin hermetically sealed glass/ceramic packages. These devices will withstand severe environmental contamination.

ULN-8160A, ULN-8160R, and ULS-8160R integrated circuits. Each control circuit has its own temperature-compensated reference source, an internal
error amplifier, a sawtooth waveform generator, a
pulse-width modulator, an output driver, and a variety of protection circuitry.

In addition, the extended temperature range of
Type ULS-8160R (- 55°C to + 125°C) recommends
it fOF use in military and aerospace applications.

Type ULN-8160A is supplied in a 16-pin dual inline plastic package with a copper lead frame that
gives the device enhanced power dissipation ratings.
It is rated for operation over a temperature range of
O°C to +70°C.

These devices are normally branded with both the
original source part number and the Sprague part
numbers; however, the Sprague part number should
be used on orders and in correspondence.

10-46

SWITCHED~MODE

SERIES 8160
POWER SUPPLY CONTROL CIRCUITS

ABSOLUTE MAXIMUM RATINGS
ATTA = +25°C
Supply Voltage, Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. (See Note)
Supply Current, IREG ............................................. 30 rnA
Output Current, 10 ..................•........................... 40 rnA
Package Power Dissipation, Po (ULN-8160A) ............................ 2.1 W*
(ULN-8160R/ULS-8160R) .................... 1.7 W*
Operating Temperature Range, TA (ULN-8160AlR) ................... O°C to + 70°C
(ULS-8160R) ................. - 55°C to + 125°C
Storage Temperature Range, Ts ............................ - 65°C to + 150°C
'Derate linearly to a Wat T, = + 15aoC.
Note: Maximum allowable supply voltage is dependent on value of external current limiting resistor;

18V@aO.

ORDERING INFORMATION
Original Source*
Part Number

Sprague
Part Number

Operating
Temperature Range

Package

NE5560N

ULN-8160A

O°C to + 70°C

Plastic

NE5560F

ULN-8160R

O°C to + 70°C

Cer-DIP

SE5560F

ULS-8160R

- WC to + 125°C

Cer-DIP

'These devices are manufactured under a cross-license with Signetics Corp. (a subsidiary of U.S. Philips Corp.)

ELECTRICAL CHARACTERISTICS alTA

=

+ 25°C, Vs

= 12 V (unless otherwise noted)
Limits

Characteristic
Supply Clamp Voltage

Test
Pin

Supply Current

ULN-8160AlR

ULS-8160R
Test Conditions

Min.

Typ.

Max.

Min.

-

23

19

Typ.

Max.

Units

-

24

20

-

30

V

-

-

10

rnA

I

Is = 10 rnA

20

Is = 30 rnA
Vs = 12 V, Iz = 0

20

-

30

I

-

-

10

3.69

3.72

3.81

3.95

-

3.85

3.57
3.53

3.72

3.65

-

4.00

-

± 100

V

REFERENCE SECTIONS
Internal Reference, VREF
Temperature Coefficient
of VREF

TA = +25°C
Over operating temperature range

-

Zener Reference, Vz

2

Temperature Coefficient
of Vz

2

12 = -7.0mA

-

± 100

-

7.8

8.4
-200

9.0

7.8

-

-

lOOk

50
-

-

8.4
-200

9.0

-

V
V
ppm/oC
V
.ppm/oC

OSCILLATOR SECTION

I

Oscillator Frequency Range
Initial Oscillator Accuracy

7,8
7,8

Duty-Cycle Range

7,8

MODULATOR
Modulator Input Current

-

R) = 5 kU

50
-

5.0

-

fo = 20 kHz

0

-

98

0.2

20

5 I V5=1.0V

10-47

0

-

lOOk

5.0

-

Hz
%

-

98

%

0.2

20

jJ.A

SERIES 8160
SWITCHED·MODE POWER SUPPLY CONTROL CIRCUITS
ELECTRICAL CHARACTERISTICS (Continued)
Limits
Test
Characteristic
Pin
HOUSEKEEPING FUNCTIONS
Duty-Cycle Control
6
Duty-Cycle Control Current
6
Protection Thresholds
1
3
13
Sense-Input Current
3
Input Current
13
Duty-Cycle Control
Input Current

16
16

EXTERNAL SYNCHRONIZATION
Sync Input OFF Voltage
9
Sync Input ON Voltage
9
Sync Input Current
9
REMOTE
Remote OFF Voltage
Remote ON Voltage
Remote Input Current
CURRENT LIMITING
Input Current
Inhibit Delay
Trip Levels

ERROR AMPLIFIER
Error-Amplifier Gain
Error-Amplifier Feedback
Resistance
Small-Signal Bandwidth
Output-Voltage Swing
OUTPUT STAGE
Output Current
Output-Saturation Voltage
Output Voltage

ULS-8160R
Typ.
Min.
Max.

Test Conditions
V6 = 0.41 Vz
Over operating temperature range
Low supply-voltage protection
Feedback-loop protection ON
Demagnetization/high-voltage protection
Over operating temperature range
TA = +25°C
Over operating temperature range
VI6 = 2Vz, Percent of original duty cycle
TA = + 25°C
Over operating temperature range

V9
V9

= 0 V, TA = + 25°C
= 0 V, over operating temp. range

10
10

10

11
11
11

3-4

TA = +25°C
Over operating temperature range
Vu = 250 mV, TA = + 25°C
Vu = 250 mV, Over operating temp. range
One pulse, 20% overdrive @ 10 = 40 mA
Shutdown/slow start
Current limit
Open loop

4
3-4
4

Positive limits
Negative limits

15
15
14

VCElSAn @ Ie

= 40 mA

NOTE: Negative current is defined as coming out of (sourcing) the specified device pin.

10-48

40

8.0
400
470
-7.0
-

50
0.2
9.0
600
600
-15
-3.0

-

-

30

-

40
0.2

-

-

0
2.0

-

-

-65

-

-

0
2.0

-

-

-85

-

-

-

0.8
Vz
-100
-125
0.8
Vz
-100
-125

I Min.
40

8.0
400
470
-7.0
-

50
0.2
9.0
600
600
-15
-3.0

-

-

30
-

40
0.2

-

-

0
2.0

-

-

-65

-

-

0
2.0

-

-

-85

-

-

-

-

-40
-80
800
700
560

560
400

60

-

54

60

-

-

10

3.0

-

-

9.5
0.7

40

-

-

5.0

-

-6.0

60
20
10.5
720
720
-35
-20
-40
50
5.0
10

ULN-8160AlR
Typ.
Max.

1

0.8
Vz
-125
-125
0.8
Vz
-125
-125

Units
%

fAA
V
mV
mV
f-LA
f-LA

fAA
%
f-LA
f-LA
V
V
f-LA
f-LA
V
V
f-LA
f-LA

-40
-80
800
700
560

f-LA
ns
mV
mV

-

-

dB
kn

-

3.0

-

6.2
-

-

9.5
0.7

MHz
V
V

-

40

-

-

-

500

-

-

500

6.0

-

5.0

6.0

-

-

-

-

560
400

700
600
480

54
10
-

6.2

-

-

-6.0

60
20
10.5
720
720
-35
-20
-40
50
5.0
10

I
I

-

-

-

700
600
480

fAA

mA
mV
V

ULN-8161M
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUIT

ULN-8161 M (NE5561 N)
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUIT
FEATURES
• Stabilized Power Supply
• Current limiting
• Temperature-Compensated
Reference Source
• Sawtooth Generator
• Pulse-Width Modulator
• Double-Pulse Protection
• Applications in
-Switched-Mode Power Supplies
-Motor Controller-Inverters
-D-C/D-C Converters

ULN-8161M/NE5561N

DESIGNED AS A CONTROLLER for low-cost
switched-mode power supplies, Sprague Type
ULN-8161M excels in applications requiring only
limited housekeeping functions.

This device is normally branded with both the
original source part number and the Sprague part
number; however, the Sprague part number should
be used on orders and in correspondence.

The integrated circuit has its own temperaturecompensated reference source, an internal Zener
reference, a sawtooth waveform generator, an error
amplifier, pulse-width modulator, output driver,
current-sensing and low-voltage protection.

ABSOLUTE MAXIMUM RATINGS
atTA = +2S0(
Supply Voltage, Vs (Voltage Sourced) ............... 18 V
Output Current, 10 ............. . ............ 40 rnA
Output Duty Cycle ............................ 98%
Package Power Dissipation, Po ................... 1.5 W*
Operating Temperature Range, TA ••••••••••• O°C to + 70°C
Storage Temperature Range, Ts ......... - 65°C to + 150°C

Type ULN-8161M is supplied in an 8-pin dual inline plastic package with a copper lead frame that
gives it enhanced power dissipation ratings. It is
rated for continuous operation over the temperature
range ofO°C to + 70°C. Similar devices are available
for operation over extended temperature ranges.

*Derate at the rate of 12.5 mWI'C above T,

=

ORDERING INFORMATION
Original Source*
Part Number

Sprague
Part Number

NE5561N

ULN-8161M

Operating
Temperature Range
O°C to

+ 70°C

Package
Plastic

*This device is manufactured in accordance with a cross-license with Signetics Corp. (a subsidary of U.S. Philips Corp.)

10-49

+ 25°C.

ULN-8161M
SWITCHED-MODE POWER SUPPLY CONTROL CIRCUIT

ELECTRICAL CHARACTERISTIO at TA Characteristic
Supply Voltage Range
Internal Reference, VREF
Temperature Coefficient of VREF
Zener Reference, Vz
Temperature Coefficient of Vz
Oscillator Frequency Range
Initial Oscillator Accuracy
Duty·Cycle Range
Protection Threshold
Input Current
Inhibit Delay
Trip level
Error Amplifier Gain
Error Amplifier Feedback Resistance
Small-Signal Bandwidth
Output·Voltage Swing
Output Current
Output Saturation Voltage
Supply Current

Test
Pin
I

-

+ 25°C, Vs

- 12 V (unless otherwise noted)

Test Conditions

Min.

Typ.

Is = 10 rnA, current·fed
Over operating temperature range
TA - +25°C

19
3.55
3.57

-

2
2
5
5
5
I

6
6
6
3·4
4

3-4
4
7
7
I

12 = -7.0 rnA

7.8

Over operating temperature range
fo = 20 kHz
low supply·voltage protection
V6 = 250 mY, over operating temperature range
V6 l)U mY, IA +Z)"I;
Single pulse, 20% overdrive at 10 - 20 rnA
Current limit
Open loop

3.76
±IOO
8.4
±150

24
3.98
3.96

9.0

-

50

-

lOOk

-

5.0

-

0
8.5

9.1

98
10.5
-20

-

-l.U

'!U

800
600

-

700
520
60

10

-

-

400

-

3.0

Positive limit
Negative limit
Over operating temperature range

6.2

VCE(SAl)@ Ic = 20 rnA
Iz - 0, over operating temp. range, voltage-fed
Iz - U, IA - +Z)UI;, voltage·led

-

-

20

FUNCTIONAL BLOCK DIAGRAM
RT. CT

0Wg. No. A-ll.424

10-50

limits
Max.

-

0.6

0.5
IS
~.U

Units
V
V
V
ppm/oC
V
ppm/oC
Hz
%
%
V
j.iA
#All
ns
mV
dB
kQ
MHz
V
V
rnA

V
rnA
rnA

SERIES TPP MEDIUM-POWER DARLINGTON ARRAYS

SERIES TPP
MEDIUM·POWER DARLINGTON ARRAYS

DWG.NO. A-1O,779A

TPP-1OOO

TPP-3000

TPP-2000

grated circuits. It offers superior mechanical protection for circuit elements during automatic insertion
into printed wiring boards.

THESE SPRAGUE MEDIUM-POWER arrays
consist of one, two, three, or four Darlingtonpairs in a single 14-pin dual in-line plastic package.
Features of Series TPP, which complements the
Sprague TPQ Series of quad transistor arrays, includes a collector-current rating of 4 A, a minimum
hFE of 2,000, and a 2 W package power dissipation
rating.

ABSOLUTE MAXIMUM RATINGS
Collector Current, Ie ........................... 4.0 A
Power Dissipation, Po (total package) .............. 2 W*
Operating Temperature Range, TA ....... -55°C to + IS0°C
Storage Temperature Range, Ts ........ -65°C to + 150°C

The standard molded dual in-line package for Series TPP is identical to the type used for many inte-

ELECTRICAL CHARACTERISTICS at TA

TPP-4000

-Derate at the rate of 16 mWf'C above TA = +25°C

= +25°C
limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Collector-Emitter
Breakdown Voltage

BVeES

Ic = 100 ILA

40

50

-

V

Collector-Base
Breakdown Voltage

BVcoo

Ic = 100 ILA

50

60

-

V

Emitter-Base
Breakdown Voltage

BVEoo

IE = 100/LA

12

14

-

V

CollectorCutoff Current

IcBO

Vco = 30 V

-

10

100

nA

VEo =10V

-

10

100

nA

10 = 1.0 mA, Ie = 1.0 A

-

1.0

t5

V

Emitter-Cutoff
Current

lEBO

Collector-Emitter
Saturation Voltage

VeE (.at)

Base-Emitter
Saturation Voltage

VOE(.at)

10 = 1.0 mA, Ic = 1.0 A

Static Forward

hFE

VCE = 5.0 V, Ic = 500 mA

2000

Current-Transfer

VCE = 5.0 V, Ic = 1.0 A

2000

Ratio

VeE = 5.0 V, Ic = 2.0 A

2000

10-51

-

1.6

2.0

-

-

-

-

-

-

-

V

SERIES TPQ QUAD TRANSISTOR ARRAYS

SERIESTPQ
QUAD TRANSISTOR ARRAYS
SERIES TPQ quad transistor arrays
SPRAGUE
are general-purpose silicon transistor arrays
consisting of four independent devices. Shown are
12 NPN types, 12 PNP types, and nine NPNIPNP
complementary pairs.
All of these devices are furnished in a 14-pin dual
in-line plastic package. The molded package is identical to that used in most consumer integrated circuits and offers superior mechanical protection
during insertion into printed wiring boards.

DWe\: NO. A·10,05OA

TPQ2221
TPQ2222
TPQ2483
TPQ2484
TPQ3724
TPQ3725

TPQ3725A
TPQ3904
TPQ5550
TPQ5551
TPQA05
TPQA06

DWG. NO. A·10,051A.

TPQ2906
TPQ2907
TPQ2907A
TPQ3798
TPQ3799
TPQ3906

TPQ4258
TPQ4354
TPQ5400
TPQ5401
TPQA55
TPQA56

ABSOLUTE MAXIUMUM RATINGS
Power Dissipation, Po (Each Transistor), , .......... 500 mW
(Total Package) . , •........... 2.0 W*
Operating Temperature Range, TA ........ - 55°C to + 150°C
Storage Temperature Range, Ts ..•...... - 65°C to + 150°C

"Derate at the rate of 16 mwrc above T,

=

+ 25°C

DWG. NO. A·10,052A

TPQ6001
TPQ6002
TPQ6100
TPG6100A

Additional information on
TPP and TPQ Transistor arrays is available from:
Sprague Electric Company
Discrete Semiconductor Operation
70 Pembroke Road
Concord, New Hampshire 03301
(603) 224-1961

la-52

DWG. NO. A·10,053A

TPQ6501
TPQ6502
TPQ6600
TPQ6600A
TPQ6700

SERIES TPQ QUAD 'TRANSISTOR ARRAYS

mORICAL CHARAOERISTICS at T,

Part
Number

Min. Min. Min.
BVCBO BVCEO BVEBO
(V)
(V)
(V)

= + 25°C
D-C Current Gain
Conditions

ICBo
Max. @VCB Min.
(nA)
(V)
hFE

TPQ2221

60

40

5.0

50

50

TPQ2222

60

50

5.0

50

50

TPQ2483

60

40

6.0

20

45

TPQ2484

60

40

6.0

20

45

TPQ3724

60
(Note
2)
60

30

5.0

500

40

40

5.0

500

40

TPQ3725
TPQ3725A

50

5.0

500

40

TPQ3904

70
(Note
2)
60

40

6.0

50

40

TPQ5550

160

140

6.0

100

100

TPQ5551

180

160

6.0

50

120

TPQA05

60

60

4.0

100 (Note 3)

TPQAQ6

80

80

4.0

100 (Note 4)

35
40
20
75
100
30
100
150
150
200
300
300
35
25

Saturation Voltage
Max.
VCE
(V)

Max.
VBE
Ic
VCE
(V)
(V)
(rnA)
Four NPN Devices
10
10
0.40 1.30
150
10
1.60 2.60
10
300
10
10
0.40 1.30
150
10
1.60 2.60
300
10
5.0
0.35 0.70
0.1
1.0
5.0
0.50 0.80
(See Note 1)
5.0
10
5.0
0.35 0.70
0.1
1.0
5.0
0.50 0.80
(See Note 1)
5.0
10
1.0
100
0.45 1.00
500
2.0

fT
@Ic Min.
(rnA) (MHz)

@Ic
(rnA)

Max.
Cob
(pF)

Similar
Discrete
Devices

150
300

200

20

8.0

2N2221

150
300

200

20

8.0

2N2222

1.0
10

50

0.5

6.0

2N2483

1.0
10

50

0.5

6.0

2N2484

500

250

50

10

2N3724

35
25
40
30

100
500
100
500

1.0
2.0
1.0
2.0

0.45

1.00

500

250

50

10

2N3725

0.45

1.00

500

200

50

10

2N3725A

30
50
75
60
60
20
80
80
30
50
50
50
50

0.1
1.0
10
1.0
10
50
1.0
10
50
10
100
10
100

1.0
1.0
1.0
5.0
5.0
5.0
5.0
5.0
5.0
1.0
2.0
1.0
2.0

0.20

0.85

10

250

10

4.0

2N3904

0.15
0.25

1.00
1.20

10
50

100

10

6.0

2N5550

0.15
0.25

1.00
1.20

10
50

100

10

6.0

2N5551

0.25

-

100

-

-

10

MPSA05

0.25

-

100

-

-

10

MPSA06

NOTES:
1. Base-emitter voltage shown is V"(oNI at indicated Ie, V" = 5.0 V.
2. BV",
3. IcES at V" = 50 V, V" = O.
4. I", at V" = 60 V, V" = O.

10-53

SERIES TPQQUAD

T~NSISTORARRAYS

ELECTRICAL CHARAaERISTICS al TA = + 250(

Part
Number

Min. Min. Min.
BVCBO BVCEO BVEBO
(V) (V)
(V)

TPQ290S

-SO -40 -5.0

TPQ2907

-60 -40 -5.0

TPQ2907A

-60 -SO -5.0

TPQ3798

-60

TPQ3799

-60 -SO -5.0

TPQ3906

-40 -40 -5.0

TPQ4258
TPQ4354

-12 -12 -4.5
-SO -SO -5.0

~40

-5.0

TPQ5400

-130 -120 -5.0

TPQ5401

-160 -150 -5.0

TPQA55

-60 -60 -4.0

TPQA5S

-80 -80 -4.0

NOTES:
1. C..
2. lcu at V"
3. I", at V"
4. IcuatV"
S. I". at V"

= 100 V, V.. =

Saturation Voltage
D-C Current Gain
Conditions
Icso
fr
Max. Max.
Max. @Vca Min.
V
Min.
@Ic
Ic
Vee
BE
VCE
(V)
(V)
(rnA) (V)
(V)
(rnA) (MHz)
(nA)
hFE
Four PNP Devices
35
10 -10 -0.40 -1.30 150 200
50 -30
40 .150 -10 -1.60 -2.60 300
30 300 -10
-30
75
10 -10 -0.40 -1.30 150 200
50
100 150 -10 -1.60 -2.60 300
50 300 -10
10 -10 -0.40 -1.30 150 200
50 -30
75
100 150 -10 -1.60 -2.60 300
50 300 -10
SO
10 -50 100 0.01 -5.0 -0.20 -0.70 0.1
-5.0 -0.25 -0.80 1.0
150 0.1
-5.0
150 0.5
125
10 -5.0
10 -50 225 0.01 -5.0 -0.20 -0.70 0.1
SO
-5.0 -0.25 -0.80 1.0
300 0.1
-5.0
300 0.5
250
10 -5.0
-1.0 -0.25 -0.85 10 200
40 0.1
50 -30
60 1.0 -1.0
75
10 -1.0
10 -6.0 30
10 -3.0 -0.15 -0.95 10 700
25 0.1 -10 -0.15 -0.90 150 100
50 -50
40 1.0 -10
50
10 -10
40 100 -10
100 (Note 2) 30 1.0 -5.0 -0.20 -1.00 10 100
40
10 -5.0 -0.50 -1.00 50
40
50 -5.0
100 (Note 3) 50 1.0 -5.0 -0.20 1.00
10 100
10 -5.0 -0.50 1.00
50
60
50 -5.0
50
100 (Note 4) 50
10 -1.0 -0.25 100 50 100 -2.0
100 (Note 5) 50
10 -1.0 -0.25 100 50 100 -2.0

o.

= 120 V, V.. =0.
= SO V, VBE = O.
= 60 V, V" = o.

10-54

(pF)

Similar
Discrete
Devices

50

8.0

2N290S

50

8.0

2N2907

50

8.0

2N2907A

1.0

4.0

2N3798

1.0

4.0

2N3799

10

4.5

2N3906

10
50

3.0
30
(Note

2N4258
2N4354

@Ic
(rnA)

Max.
COb

1)

10

S.O

2N5400

10

S.O

2N5401

-

15

MPSA55

-

15

MPSA5S

SERIES TPQ QUAD TRANSISTOR ARRAYS

mORICAL CHARAOERISTICS at TA

= + 25°C
D-C Current Gain

Part
Min. Min. Min.
Number BVCBO BVCEO BVEBO
(V)
(V)
(See Note) (V)

ICBo
Max. @VCB
(nA)
(V)

Conditions
Min.
hFE

Ie
(rnA)

VeE
(V)

Saturation Voltage
Max.
VeE
(V)

fT

Max.
COb

Similar
Discrete
Devices

Max.
VBE
(V)

@Ie
(rnA)

Min.
(MHz)

@Ie
(rnA)

0.40
1.40

1.30
2.00

150
300

200

50

8.0

2N2221
and
2N2906

(pF)

Two NPNITwo PNP Devices
TPQ6001

60

30

5.0

30

50

25
35
40
20

1.0
10
150
300

10
10
10

10

TPQ6002
(Note 1)

60

30

5.0

30

50

50
75
100
30

1.0
10
150
300

10
10
10
10

0.40
1.40

1.30
2.00

150
300

200

50

8.0

2N2222
and
2N2907

TPQ6100

60

40

5.0

10

50

50
75
75
60

0.1
0.5
1.0
10

5.0
5.0
5.0
5.0

0.25

0.80

1.0

100

0.5

4.0

2N2483
and
2N3798

TPQ6100A

60

45

5.0

10

50

100
150
150
60

0.1
0.5
1.0
10

5.0
5.0
5.0
5.0

0.25

0.80

1.0

100

0.5

4.0

2N2484
and
2N3799

TPQ6501

60

30

5.0

30

50

25
35
40
20

1.0

0.40
1.40

1.30
2.00

150
300

200

50

8.0

150
300

10
10
10
10

2N2221
and
2N2906

10

TPQ6502

60

30

5.0

30

50

50
75
100
30

1.0
10
150
300

10
10
10
10

0.40
1.40

1.30
2.00

150
300

200

50

8.0

2N2222
and
2N2907

TPQ6600

60

40

5.0

10

50

50
75
75
60

0.1
0.5
1.0
10

5.0
5.0
5.0
5.0

0.25

0.80

1.0

100

0.5

4.0

2N2483
and
2N3798

TPQ6600A

60

45

5.0

10

50

100
150
150
60

5.0
5.0
5.0
5.0

0.25

0.80

1.0

100

0.5

4.0

2N2484
and
2N3799

TPQ6700

40

40

5.0

50

30

30
50
70

0.1
0.5
1.0
10
0.1
1.0
10

1.0
1.0
1.0

0.25

0.90

10

200

10

4.5

2N3904
and
2N3906

NOTE:
NPN/PNP complementary pairs. Polarity shown is for NPN devices.

10-55

TRANSISTOR ARRAYS
AND MISCELLANEOUS DEVICES (Continued)

AN ELECTRONIC LAMP MONITOR
REQUIREMENTS

LAMP FEED

There are several requirements for a lamp monitoring system. The system should be able to monitor all
types of exterior lamps on the automobile; the
number of lamps must not be critical to the design.
The system must be easy to assemble; it should be
simple in design so that it can be repaired in the field
with minimal training of personnel; it must be reliable and must be able to withstand the electrical. and
environmental conditions to which· the vehicle is
subjected. There should be minimal change from one
car line to another, and from one model year to
another. Most importantly, the unit cost should be
reasonable.

......

co-~

SI GNAL OUT

Dwg. No. A-ll,471

Figure 1
PHOTOTRANSISTOR SYSTEM

LAMP MONITORING METHODS

lamp are brought to a common switch, which controls the operation of an indicator on the dash. This
monitoring system is unattractive to the user because
of cost, difficulty in placement of the sensing devices, inability to detect a single failure in a dual
filament lamp, and the need for calibration of devices
for various types of lamps.

Several methods of detecting lamp failure have
been examined by the automotive industry. In one,
reed relays mounted close to the wiring harness are
closed by the electromagnetic force produced by the
lamp current. If a lamp fails, the relay opens, resulting in an indication on the dashboard. The system
has inherent problems, including a lack of uniformity of the relays, tight tolerances on the proximity of the relays to the wiring assemblies, and the
effects of vibration in the automobile.

One of the more frequently used systems employs
fiber optics (Figure 2). The fiber-optic system uses a
plastic or glass fiber that transmits light and gives a
positive-function indication for each of the lamps
monitored. However, this system is used only in
applications requiring the monitoring of a small
number of lamps, since the cost of materials and of
routing fiber optics is prohibitively expensive.

Another method of monitoring lamps involves the
uSe of phototransistors (Figure 1). These lightsensitive solid-state devices detect the presence of
light at each monitored lamp. The signals from each

TO DASHBOARD

FI BER OPTIC

Dwg. No. A-ll,472

LAMP
Figure 2
FIBER-OPTIC SYSTEM

10-56

TRANSISTOR ARRAYS
AND MISCELLANEOUS DEVICES (Continued)

O·o----INPUT SIGNAL - - - . . 0

SOLUTION
The Sprague Type ULN-2435A electronic lamp
monitor overcomes technical problems discussed
above while taking advantage of the low cost of
integrated circuits. This integrated circuit monitors
all types of exterior lamps and provides five outputs
capable of driving light-emitting diodes that indicate
the location of automotive lamp failure.

02

01

FEED

DIFFERENTIAL
- - - - I N P U T SIGNAL----.. I

TO LED
DRI VERS

Dwg. No. A-Jl,474

Figure 4

SIGNAL
OUTPUT

SIMPLIFIED DETECTOR
Dwg. No. A-ll,473

detectors Q3 and Q4, which drive the LEO driver
transistors. 01 and 02 perform the dual function of
level-shifting the input signal and establishing required bias currents for Ql and Q2. Since the supply
current is derived from the lamp lines, standby current is reduced to zero when the lamps are turned off.

Figure 3

BRIDGE MONITORING SYSTEM

The principle of operation is that of a simple
bridge circuit (Figure 3) in which the top two legs of
the bridge are the wiring-assembly resistance or discrete resistors. The bottom legs of the bridge circuit
are the monitored lamps. Four differential amplifiers
sense the voltage drops in the wiring assemblies
(approximately 20 mY) for each ofthe various lamp
circuits. When the system detects a difference in
voltage due to an open filament, the appropriate
output driver is turned ON.

The use of PNPs in the detectors reduces the
system's susceptibility to high-frequency noise.
Figure 5 shows a comparison of frequency response
for a monolithic NPN transistor and a monolithic
PNP transistor.
O+-----~------------

A sixth output driver gives an indication if any of
the monitored lamps fail. This output can be used to
drive an audible signaling device or a centrallylocated warning lamp.

__

II!J

-3
-6
-9 t---.----.--..--"--,----,.---,r'-

lK

CIRCUIT DESCRIPTION
A simplified detector is shown in Figure 4. Q I and
Q2 form a differential amplifier. The amplified differential signal is applied at Point A-B to threshold

10K

lOOK

1M

10M

100M looOM

FREQUENCY (Hz)
Dwg. No. A-ll,475

Figure 5

FREQUENCY RESPONSE

10-57

TRANSISTOR .ARRAYS
AND MISCELLANEOUS DEVICES (Continued)

A block diagram of a typical application of Type
ULN-2435A is depicted in Figure 6. In this application, eight lamps and three fuses are monitored. The
stop-lamp fuse (A) is monitored by the circuitry at
Pin 4. If the fuse blows, the LEDs connected to pins
10 and 13 turn ON. By using separate fuses for the
park lamps and tail Imarker-lamp circuits, detectors
I and 2 can double as fuse monitors. If, for example,
fuse B blows, detectors I and 2 tum on the LEDs
connected to pins I and 16. An additional input, pin
6, is used to test the LEDs and the master indicator
during cranking.

used as the top legs of the bridge circuit. A failure
within the integrated circuit will not affect lamp
operation or other automotive functions.

TRANSIENT PROTECTION
In laying out the integrated circuit, careful consideration was given to providing on-chip voltagetransient protection. The LED driver transistors, for
example, were designed to withstand an 80-volt
load-dump transient. The detector inputs are also
designed to withstand 80 volts. In addition, the inputs to the detectors are essentially grounded through
the low-resistance lamps being monitored, which
further protects the integrated circuit from transients.
Reverse-battery protection is included on the chip. In
the event of a battery reversal, the PNPs provide
inherent protection, while the dielectrically-isolated
resistors provide additional safeguards.

The simplistic design of this system enables easy
installation in an automobile. No external components are required, other than the LED indicators and
the voltage-dropping resistors, to complete the system. The integrated circuit may be mounted on a
printed wiring board. Depending on lamp current,
the copper runs of a printed wiring board might be

BATT

BATT
VISIBLE OR
__--+=1:.:..,5..... AUDI BLE ALARM
BATT

~

0:::

Il..

c..

IVI

VI

0

~

-'

~

0:::

-'

~ Il.. ~
r:i ...J ...J r:i

<:

Il..

<:

0:::

0:::

LU
~

LU
~

0:::

0:::

~ ~

12
11

4t

':" 14
Dwg. No. A-l1,477

Figure 6
TYPICAL APPLICATION

10-58

CUSTOM DEVICES

SECTION 11 - CUSTOM DEVICES
ULN-2350C and 2351C Tuff Chip® Semi-Custom
Integrated Circuits. . . . . . . . . . . . . . . . . . . . . . . . ..
High-Voltage, Semi-Custom Component Arrays. . . . . . . ..
Custom Bipolar ICs for Automotive Application .........
Custom Circuit Design Capability. . . . . . . . . . . . . . . . ..
Optional Package Capabilities. . . . . . . . . . . . . . . . . . ..

11-2
11-4
11-7
11-17
11-18

OJ
11-1

ULN·2350C AND ULN·2351C

ULN-2350C AND ULN-2351C
TUFF CHlp® SEMI-CUSTOM INTEGRATED CIRCUITS

FEATURES
•
•
•
•
•
•

BVcES = 80 VMin.
250 mA Outputs
500 Volt Resistors
High-Gain PNP Transistors
80 pF Capacitors
Time and Cost Savings

CHIP SEMI-CUSTOM integrated circuits
T UFF
offer substantial time and cost savings for cus-

89 x 104 mils
2.26 x 2.64 mm

tom circuit applications requiring from 2,000 to
100,000 pieces. This is an area that previously was
met by hybrid circuits and, in some cases, by printed
wiring boards.
The TUFF CHIP semi-custom approach utilizes a
standard array of components fabricated on a single
silicon chip: the ULN-2350C contains 460 separate
elements; the ULN-2351C provides 261. Besides the
traditional complement of NPN and lateral PNP
transistors, high-gain vertical PNP transistors are
included.
The user lays out the interconnecting circuit, similar to a printed wiring board layout, on sheets provided by Sprague Electric. The artwork is checked
by Sprague engineers, and used to generate the customer's proprietary metal mask. Finished circuits
are electrically probed and visually inspected. Chips
are tray-packed for hybrid circuit manufacturers or
are mounted in plastic, ceramic, or hermetic dual inline packages with from eight to 28 pins.
TUFF CHIP components are optimized for a minimum BVCBS of 80 volts. Two or four 250 rnA power
transistors are provided, and these may be paralleled for high current requirements. On-chip
transient protection of sensitive circuit components utilizes deposited film resistors with breakdown voltages higher than 500 volts. On-chip

ULN·2351C

104 x 150. mils
2.64 x 3.81 mm

ULN·2350C

capacitors may be used for noise suppression or
filtering.
Circuit users can expect prototypes six to 10
weeks after submitting initial artwork; production
quantities can be shipped eight to 10 weeks after
prototype approval.

11-2

ULN-23S0C AND ULN-23S1C

ELECTRICAL CHARACTERISTICS at TJ = + 2S C

COMPONENT LIST

D

Limits
Characteristic

Min.

Typ.

Number of Devices
Max.

Units

Small-Signal NPN Transistors
hFE at Ie = 1.0 rnA

50

150

Matching of hFE

-

10

BVe~o at Ie = 100 IJ.A

30

40

= 100 IJ.A
BVEBO at IE = 100 IJ.A
RSAT at 18 = 100 j.t.A

80

200
20

Small-Signal
NPN Transistors

-

±%

27

14

Vertical
PNP Transistors

10

7

n

5.8V
Zener Diodes

5

2

10

5

450n

20

12

V

900n

20

12

V

1.8 kn

20

12

1.4

V

3.6kn

20

12

250

rnA

-

-

7.7

(with plug)

-

300

Cutoff Frequency

-

500

-

MHz

Useful Current Range

0.1

-

10k

j.t.A

V

NPN Power Transistors

= 100 j.t.A
= 100 j.t.A
VCE(SAn at Ie = 250 rnA

-

Useful Current Range

2.0

BVeEO at Ic
BVcEs at Ie

30
80

40
100

-

200

-

-

Lateral PNP Transistors

16

8
33

V

9.0kn

48

28

MHz

18kn

50

29

30

-

BVeEO at Ic = 10 j.t.A
Cutoff Frequency

60

80

-

-

Vertical PNP Transistors

= 100 IJ.A
BVcEO at Ic = 10 j.t.A
hFE at Ic

30
50

60

-

-

V

Passive Components
Resistor Tolerance

-

-

30

±%

Resistor Matching
(1:1) Tol.

-

1.0

3.0

±%

BV-Base Resistor to
Substrate

-

80

-

BV-Deposited Film
Resistor to Substrate

500

Capacitance Tolerance

-

BV-Capacitors

12

40

-

Deposited Film
Resistors:
2.0kn

58

15

3.0

Base Resistors:
200n

4.5kn

hFE at Ie = 100 j.t.A

-

38

V

6.9

150

70

2

100

50

ULN-2351C

4

V

hFE at Ie = 200 rnA

NPN Power
Transistors

ULN-2350C

Lateral
PNP Transistors

-

BVeES at Ie

Component

36kn

72

42

80 pF
Capacitors

10

5

Bonding Pads

28

19

V

-

V

-

±%

-

V

11-3

m

CU$TOM DEVICES (Continued)

HIGH-VOLTAGE, SEMI-CUSTOM COMPONENT ARRAYS·
INTRODUCTION

Dielectrically isolated
thin-film pdlysilicon resistors
were chosen for the major
portion of th~ r~sistive
element, along with a complement
of diffused resistors.
Among
advantages of thin-film resistors are an inh~rent abil ity to
withstand voltage transients
of up to 500 volts, and high
resistance per unit area. These
two properties can be utilized
to protect sensitive circuit
elements from damage by limiting
the peak transient current.

Semi-custom integrated
circuits have been produced for
several years for the low-volume
integrated circuit market.
The semi-custom approach uses
wafers that are completely
fabricated except for· the
interconnecting metal. The user
designs the interconnecting
metal mask to convert the
uncommitted circuit components
into a unique integrated
circuit based on his original
pattern.

Since thin-film resistors do
not form a PN junction during
their manufacture and are not
polarity-sensitive, protection from inadvertant power
supply reversal is achieved
without external components.

Traditionally,
component
arrays have been limited in
voltage-handling capability to
less than 30 volts.
The
ULN-2350C and ULN-2351C component arrays overcome this
limitation, and provide features
not found in other arrays.

The total available res ist ance for the ULN-2 3 5 DC is
4 Mn
Previous component
arrays of similar chip size,
using only diffused resistors,
offered a total resistance of
approximately 400 kn •

CHIP FEATURES
One of the goals of laying
out the arrays was to enable the
user to design a semi-custom
integrated circuit without
concern over how to protect the
circui t from destructive transient voltages. For example, the
arrays' power transistors were
designed to meet present
automotive "load dump" requirements without the usual Zener
clamp diode.
Design rules for
layout and the manufactur ing
process were developed for a
BVCES of greater than 80
volts.

The availability of highvalue resistors is important in
applications requiring low
standby current and/or low power
dissipation.
Capacitors formed by buriedlayer and isolation diffusions,
with typical values of 80 pF,
were included in the arra~s for
applications requiring noise
suppression and stabilization.
The capacitors in the ULN-2350C
and ULN-2351C may be paralleled
for totals of up to 800 pF and
400 pF, respectively.

Copyright © 1981, IEEE. Reprinted by permission.

11-4

CUSTOM DEVICES (Continued)
In addition to the standard
complement of NPN and lateral
PNP transistors, vertical PNP
transistors were built into the
arrays to take advantage
of their characteristically high
current gain, which can be two
to three times greater than that
of standard lateral PNP transistors.

of 5.8V are incorporated in the
arrays.
They are particularly
useful with low supply voltage
circuits.
APPLICATION
Figure 3 depicts a hypothetical automotive application
of a low-voltage integrated
circuit that turns on an
indicator if the ignition is
turned on and the al ternator
voltage is below some predetermined value.

Figure 1 shows an example of
the utilization of a vertical
PNP in a current mirror to
decrease the error introduced by
base current from 20% to
less than 1%.
+v

SATTEfn'
01

+v

05

IGNITION ---'Wt---t

R4

Figure 3

External components protect
this circuit from damage by
transient voltages encountered
in the automotive environment.

Figure 1

Figure 2 shows application of
vertical PNP in a differential
amplifier to decrease base drive
current requirements.

AUTOMOTIVE TRANSIENTS
SOURCE

+v

SOURCE
IMPEDANCE

AirConditioninq
Compressor/
Clutch
Coil
Service
Motors

2500
600

AMPLITUDE

DURATION

~ 250 V

1 .0 jls

32 V

40 ).Is

:!:

AntiDieselinq
Solenoid

2000

~ 450 V

22 jJs

Alternator
Load
Disconnect
"Load Dump"

0.10

80 V

200 ms

Figure 2

To protect the supply pin, a
low-value resistor (R1=500n
to 1kn), and a large value
capacitor (C1 = 1 IlF to 500
pF) are used to supress the

As an aid in designing
voltage regulators, emitterisolation Zener diodes with a
nominal breakdown volt~ge
11-5

m

CUSTOM DEVICES (Continued)
Resistors R, ~ R6 limit
the current through transistors
Q; - Qs during
transient.
This protection cannot, be
achieved with diffused resistors because of their low
breakdown voltage ratings.

trans ients.
The power tran'"
sistot driving RL is normally
protected with a Zener diode.
Pins 4 and S are protected from
transients by current-limiting
~esistors
R4 and RS.
In
addition, the sense input, pin
4, requires a capacitor, C4,
to form a low-pass filter to
ensure rejection of noise
pulses.

a

The output driver Q7, Qa,
wi th a BVCES of greater than
80 volts, is capable of withstanding the load dump transient.
Voltage transients of greater
magnitude are usually accompanied by high source impedance
that limits the current.

BATTE'"

IGNITION

The load connected to pin 2
limits the current in the event
of battery reversal.

ALTERNATOR

Capacitor C, supresses
noise at pin 4 that could cause
the 1 amp, such as RL of Figure
4, to turn on erroneously.

Figure 4

Figure 4 shows the highvol tage array performing the
same f unct ion; all ex ternal
protection components have
been eliminated.

CONCLUSION
Although an automotive
appl icat ion is presented above,
the arrays' high-voltage capabilities can be used in other
noisy environments and in
interface circuits such as motor
drivers and display drivers.

The actual circuit, shown in
Figure S, demonstrates the
design's self-protective properties.

BATTERY

GROUNO

Figure 5

11-6

IGNITION

CUSTOM DEVICES (Continued)

CUSTOM BIPOLAR INTEGRATED CIRCUITS
FOR AUTOMOTIVE APPLICATION
Here is a manager's overview of how to use bipolar integrated circuits
(ICs) for a custom approach to an automotive system application.
After
selecting the IC technology and establishing the application specifications,
the project will follow a basic development cycle.
The schedule of events
that take place is basic to all custom bipolar ICs for automotive applications.
The cycle starts with selection of semiconductor supplier and ends
with a reliable cost effective, custom bipolar IC in production several
months later.
Reaching a successful conclusion requires considerable
positive interaction between systems manager and semiconductor supplier.

The f i r s t step is to
determine that customiz ing a
system is cost effective
versus using standard "off-theshelf" components.
In conjunction with this, the manager will
determine the extent of system
integration desired, the type of
int erconnect needed and, to a
broad extent, the semiconductor
packaging.

basis) at the system level.
Application in other systems has
the added advantage of lower
overall tooling costs, development times, and economics of
higher run rates.
The manager needs to
determine the amount of lead
time his project has available.
The development of a custom
Ie takes 7 to 9 months, and
another 3 months to achieve
production buildup.
This lead
time alone may force the
project to use available standard circuits.

The reliability level that
must be met should be established at the beginning of the
program.
The reliability
specifications have a direct
effect on the cost of a device.
This must be taken into consideration at the very beginning of
the design.
The phrase "reliability is designed in -- not
tested in" is as true in the
semiconductor as the vehicle
brake system.

Other questions which must
be addressed are how many
sources will be required and,
with this, what is the risk of
the parts not being interchangeable? Interchangeability can be
a problem, especially with
custom circuits where differing
semiconductor
technologies
provide substantially different
performance
characteristics.
Linear circuits, even when the
technologies are "identical",
can behave entirely different in
an application.
It is highly
desirable to stay with "identical" technologies for all

From a system point of
view, is there any advantage to
having one "large" custom
device, versus having two
or more "building block" devices
which could be used in other or
future systems?
The "building
block" approach will usually
cost more (on stand alone
Copyright

© 1979 Society of Automotive Engineers, Inc. Reprinted by permission.

11-7

m

CUSTOM DEVICES (Continued)

CMOS
Power per Gate

luW-l0mW

PMOS

luW-l0mW

2.5uW-l0mW

0.5uW-2.5mW

lA

lA - 4A

lA - 4A

Fair

Excellent

Excellent

Excellent

Excellent

5 mA

10mA

Timing Accuracy

Fair

Poor

Excellent

Fair-Good

Excellent
Excellent

Device Diversity

Fair

Poor

Supply (Max. Typ)

2QV

30V

Logic Density

Med-High

Process Complexity

6 Masks

BIPOLAR

200uW-l0mW

Output Drive

DC Noise Immunity

BIMOS

Logic 15 V
Output 85 V

35V - 100V

Lagic 10 V
Output 85 V

High

Medium

Medium

High

4 Masks

11-12 Masks

6-8 Masks

6-7 Masks

* = Design dependent, normally excellent but requires additianal circuitry
Figure 1
TECHNOLOGY COMPARISONS FOR AUTOMOTIVE ELECTRONIC SYSTEMS

suppliers of a given circuit.
Almost all suppliers have
their own process variation
within a given technology so the
term "identical" must be used
with caution. Concentrate
on defining the system's-elec=
trical, environmental, and
mechanical-riffiIts;andestahliSE
a broad specification to achieve
this end.

two or more;
and the smaller
suppl iers generally concentrate
on one technology. Today there
are two popular technolog ies
available (each having wide
variations) - MaS and bipolar.
MaS is suited for digital only
applications (see Fig. 1),
and bipolar for digital or
analog
(linear) amplification,
12L
(analogi digital) and
power handling capability.
MaS usually requires external
(to the package) buffers and
drivers.
Bipolar devices
normally interface directly with
lamps, soleno.ids, motors, relays
etc., and will have the drivers
"on chip" requiring fewer
external components.
An
al ternate choice for certain
appl ications is BiMOS which is
the combination of MaS and
bipolar on the same chip.

Once the decision has been
made to customize, the next
problem is getting the desired
function within an acceptable
schedule.
At this stage the
systems manager loses some
control over the program's
success, since there is a
"new member" in the design and
development team
the semiconductor supplier.
The supplier can be another department
or division within a vertically
integrated company, however,
most of the time this will be an
"outside" supplier.

The biggest feature of MaS
is its abil ity to perform many
functions using a very small
device. One of the main advantages to using a b~polar technology (without sacrificing
performance) is its power

The larger or older semiconductor companies doing custom
work will have several semiconductor technologies in productionithe medium sized companies,
11-8

CUSTOM DEVICES (Continued)
handling capability and high
voltage tolerance. In reality,
future vehicles will probably
have both technologies on board
since most microprocessors under
consideration use a MOS technology with the interfaces to
the microprocessor being bipolar.

can, at best, only be estimated
at the beginning of a project.
This cost is based on the
system requirements specified at
the start of the project.
Tightening of limits, addition
(or deletion) of functions, and
changes in electrical or
mechanical specifications will
have a very direct bearing on
unit cost.
The entire design
team (systems manager and
semiconductor supplier) must try
to make all system trade-offs
dUring the system design phase,
and minimize any changes
to the IC once started.
If
change s must be made, they
should be during the IC design
phase, for once beyond this
there is a heavy penalty to
schedule (and cost).
This will
be discussed to a greater extent
later.

Circuits can be designed to
handle all present transient
conditions, load dump, reverse
battery, etc.
However, most
"off-the-shelf" standard ICs
were not designed to handle
these conditions, and require
added discrete (diode and
resistor) protection. Fortunately there are bipolar circuits,
designed specifically for
automotive use, that have the
required "bullet proof process".
These devices have established a
bench mark from which future
design and reliability levels
can be accurately predicted.

If the systems manager has
selected an IC suppl ier from
previous projects, then some of
the unknowns will be eliminated.
Also, previous program successes
will give a guide as to how
long the project realistically
will take. In any event, several
key steps will take place in the

Ideally a new project will
be one of a series of previous
custom circuits with the selected supplier( s). If the custom
project is the first, then
it will be necessary to seek out
and establish a positive working
relationship with a supplier(s)
having the required expertise.
The emphasis is on a positive
relationship - for the semiconductor supplier is, as mentioned
previously, a member of the
des ign team. The success of the
project is directly related to
the relationship of the two
organizations. Each team member
knows their own disciplines
best, and when brought together
always require tradeoffs and
compromise in order to get
the best possible circuit design
at the lowest possible cost.
System cost effectiveness will
be determined by the producibility of the IC, long term
reliability, and system design.
The unit cost for any custom IC

MONTHS

m
Figure 2
TYPICAL BIPOLAR IC DEVELOPMENT CYCLE

11-9

CUSTOM DEVICES (Continued)
development of the custom
bipolar IC, each with its own
cycle and problems.

3· •
f!.E£~!!_~~~!9:!l w i I I
ultimately determine the performance of the IC, the cost and
long-term reliability.
It is
during this phase of the development that the greatest interaction should take place.
When
this stage is reached, the
system (custom IC) specification
should be "frozen". Once the IC
des ign is final ized and committed to "lay-out" (step 6)
only minor changes can be made
without impacting the entire
schedule and cost.

CUSTOM BIPOLAR IC DEVELOPMENT
(See Fig. 2)
All of the follo~ing
development steps would apply to
MOS technology with variations
only in device characteristics.
1. Selection of Semiconductor
Supplier
will be performed on many
variables, and is beyond the
scope of th is paper.
However,
previous comments on. working
reLationship and supplier
expertise in automotive circuits
should be key elements in the
selection proce·ss.
Some
other points that need to be
determined of any potential
supplier:

Trade-offs may be required
in the system due to findings
during the IC design. They will
be verif ied during the simulation or breadboard phase.
Most automotive electronic
systems can be "breadboarded"
(step 4) with discrete semiconductors ("kit parts" from the
bipolar process to be used on
final circuits). If major
trade-offs are required they
must be made here.

a. Stability - Financial and
Workforce
b. Volume Capability - for
Present and Anticipated
Quantities
c. Basic Packaging Capability IC, Module, etc.
d. Test Capability - IC
Module, etc.

The systems manager could
breadboard h is own IC with the
s'ame discretes (supplied by
supplier to do final design
analysis - do not use another
supplier's breadbOard components
as the process can be different).
This breadboarding can be
very useful during system
definition and development. The
systems manager can optimize the
system prior to committing
the project.
Here again is an
example of having a positive
working relationship with the
selected supplier(s), as
these components are not commerciallyavailable.
A review
of the IC design should be made
at this point, and any system of
IC modifidation implemented.

A full and complete review of
system, electrical and mechanical specifications along with
quality requirements should
be performed by both parties
before contract finalization.
An IC supplier unfamiliar
with automotive requirements may
unknowingly accept a contract
that has "hidden" costs which
could result in the development of an unprofitable part.
The prudent systems manager will
make certain the IC suppl ier
fully understands the system and
contract requirements.

11-10

CUSTOM DEVICES (Continued)
4.
Breadboard layout is
actually-performed- during, and
in conjunction with the IC
design (step 3). Some suppliers
may use computer simulation
from component models in conjunction with CAD (Computer
Aided Design). If the CAD method
is used, it is more difficult
for the systems manager to
review the customized design.
The cell (component models)
library is useful only when
using the same CAD. In addition,
(unl ike some MOS technolog ies)
the cells will be designed for
the supplier's bipolar process,
and therefore possibly proprietary to the semiconductor
supplier.

Therefore, the systems
manager, should determine the
semiconductor suppliers' capabilities in this area during
supplier selection. The inherent
reliability of the system is
improved with the fewest possible discrete components per
system.
Most standard "off-theshelf" ICs have breakdown
voltages in the 20V DC range,
while a bullet-proof automotive
IC should be at least 50V DC.
Note that this applies to the
interface components within the
IC.
The signal processing
section of the IC need not have
high breakdown capability. This
allows the most efficient use of
area on the layout as highvoltage breakdown components and
output drivers tend to be very
large in comparison.

A good breadboard is a very
powerful tool and has often
brought out unknown system
problems during circuit design
evaluation.

Design reviews are normally
attended by engineers from all
key facets of the semiconductor
opera t ion ~ prod uct ion, mask
making, wafer processing,
packaging, test, reliability,.
etc.
The design engineer(s)
responsible for the custom IC(s)
present the design to a critical
review by all of these departments. Each of these departments
must agree that the design is
sound, does not violate any
rules,and is manufacturable.
At this point the designer will
commit the custom design to
layout.

5.
Qes2:.9..!!_Review is the
last convenient point in the
design process to make modifications.
At this step the
design is reviewed in detail.
The performance of the circuit
is compared, via the breadboard,
to the design objectives. The
systems manager should make it a
point to attend this session.
The circuit designer will
have selected a particular
bipolar process to best meet the
system requirement.
The
interface (input or output)
component from transients,
accidental grounding, load dump,
etc. Because of these requirements the designer will
configure the component layout
to handle these conditions. Few
standard bipolar parts can meet
all of these conditions, and
will require external discrete
protective circuitry.

6.
£ir£~2:.!_~~£~! can be
performed by either hand
drafting or through the use of
computer aided design. The use
of either method generates
"artwork" (every designer
considers his work a masterpiece), which is a composite
drawing of each "mask level".
The layout artwork will be drawn

11-11

m

CUSTOM DEVICES (Continued)
The application of ICs to
the automotive electrical system
dictates special test requirements. Therefore, special wafer
and package test requirements will be "finalized" at
t h i s p 0 i n t • T his will mean
building and fixturing the
specialized interface hardware
for the automatic testers.
Since most of the general IC
testers do not have high-voltage
capability, special interface
boxes must be created to do the
required tests.
This can
cause incoming inspection
problems for systems managers,
as it is highly unlikely that
the test systems will be
exactly the same. For this
reason the special interface
boxes created by the IC supplier
will not be usable by the
systems manager. Therefore, it
is vital that there be a "good"
specification established so
that differing test equipments
will be able to do the same
tests and obtain correlatable
results.

at several hundred times
(typically 254X or 508X) the
final IC's size. The .ctual
magnification is dependent on
the "die" size (once produced,
the unpackaged individual
circuit is referred to as a die
or chip) or capability of photo
reduction equipment.
The CAD
circuit layout method closely
parall~ls the manual method but
is usually completed faster.
In order to efficiently use
CAD there first must be a
library of devices (transistors,
diodes, etc.) compatible
with the bullet-proof process.
This library can have standard
"cells" of differing functions
such as; drivers, gates, flip
flops, etc.
These will be
used, as needed, by the CAD
operator to integrate the
required function.
A CAD
circuit design is better suited
for dig i tal than linear, especially where both are part of
the circuit.
Caution:
If a cell library
is not already established, it
must be created and this is very
time consuming. If done properly, the cells will have been
life tested (usually in IC
form), and will have been
interconnected previously to
make certain that they are
compatible. If the cells do not
already exist, use the more
familiar hand layout method. If
used properly, CAD can be a
very powerful tool, or a very
expensive draftsperson.

8.
Mask Making is performed
next through one of several
methods. If a CAD system was
used, then the mask levels will
be generated directly or by
cutting Rubylith.@
(same as
doing a printed circuit board),
which will be peeled by hand.
These systems are fast, compared
to hand cutting, but are
not always available to the
designer (especially. if the CAD
was not used).
A common
approach is to use a digitizer,
with hand-drawn artwork, which
normally feeds an X-Y plotter
that cuts the Rubylith.
The Rubylith is then peeled by
hand. In addition, the digitized
artwork can be fed to a "reticle" generator which eliminates
the Rubylith and required
photo-reduction steps. A reticle
is the mask (one level master

7. Layout Review is attended
by basically the same group as
Design Review. At this juncture
the 1 ayout is subjected to a
careful examination of layout
rules, component placement, test
points (for wafer probe and
evaluation prior to packaging)
and conformity to the circuit
design.
@Rubylith is a registered trademark of
the ULANO Companies.

11-12

CUSTOM DEVICES (Continued)
and is 10X the finished die
size).
The reticle will be
"step-and-repeated" on the final
working "plates" for the individual wafer masking steps.

can be very time consuming.
However, it is essential to both
the systems manager and semiconductor partner for slightly
different reasons.

9.
Pilot Wafer Run will be
made following the mask-making
operation. The systems manager
should follow this run with
tempered enthusiasm.

The semiconductor manufacturer is looking to make certain
the custom IC meets the target
specification, or to what extent
it does not meet the spec ification.--In the first case,
the overall yeild can be projected with a much higher degree
of accuracy. In the second case
(some parameter is out of
specification) corrective action
is required.
This may entail a
simple mask or process change,
or a maj or redes ign.
However,
before this is initiated the
partners should get together to
determine if the part will work
satisfactorily within the
system.
If it will meet system
objectives, the specifications
may be relaxed (step 11), then
i t ' s possible to derive the
needed yield information.

The first run is actually a
circuit "debug" step.
For when
it is checked out there are
usually changes or error
corrections to be made in the
circuit, masks, and/or process.
Therefore a second wafer run
will be made following any
changes.
This second run is
very important, since it will
provide working parts for both
the systems manager and semiconductor partner. The supplier
will get the first "hard" yield
information against the target
specification. Up to this point
the supplier has used experience
to project yields which determine cost (this will be covered
in later sections).
The final pilot run will be
packaged, usually on an engineering assembly line, and submi tted to initial electrical
evaluation. Depending on the
relationship between the partners, advance parts may be
obtained by the systems manager.
The semiconductor supplier will
want to perform a complete
device (IC) evaluation, and will
be reluctant to provide parts
until the evaluation and characterization is complete.

The systems manager is
concerned with the custom IC' s
performance within the system.
Therefore it is essential
that the custom IC be evaluated
within the system during the
system characterization.
Differences may appear between
the breadboard's operation and
the "equivalent" IC due to
capacitance, layout, and discrete versus integrated components (parasitics). If a careful
system evaluation and design was
performed at the start of the
program, few surprises will
develop.

10.
Device Characterization
will be performed to ensure the
custom bipolar IC meets the
initial target specification.
Depending on the ci,rcu,it
complexity, the character1zat10n

Following system and IC
charactertization it is essential to review and finalize any
differences in specifications
and parametrics. Remember that
th i s i s a partnersh ip wi th a

11-13

III

CUSTOM DEVICES (Continued)
common objective of selling
systems, so approach the next
phase with compromise in
mind.

Every engineer uses guard
bands. Realistic guard bands are
prudent and necessary to take
care of a product's manufacturing variation. However, every
guard band affects yield and is
reelected in unit and system
cost.

11.
Specification Review
takes place following successful
pilot run(s) and product charact e r i z a ti 0 n •
It is very
important that the systems
manager approach this as an
opportuni ty to improve performance,
manufacturability,
reliability, and yield. As with
any system the ultimate in
performance and cost is a result
of a series of tradeoffs. This
stage in the system's development is no different.

It is not possible to give
exact comparisons of the interrelationship of parameters to
yield.
However, i t is to
the systems manager's benefit to
be flexible on "non-critical"
parameters as the final IC will
likely differ from the target
specification following characterization.
This happens
because of the layout and
interaction of active and
passive components on the custom
IC.
It is not possible to
predict with 100% confidence the
behavior of an integrated
system versus the discrete
version. This is where the
systems manager must rely
on the semiconductor partner's
experience and recommendations.

The IC characterization
provided a baseline with respect
to the parametric distribution.
Hopefully the IC comes into the
center of the specification
limits so that 100% of the
product will be usable.
In
real i ty this seldom happens.
There are so many variables in
process that any given lot
of parts will have a slightly
different distribution.
This
results in throwing'away product
that does not meet the desired
specification (yield loss), and
shipping that which meets the
limits (shippable yield).

12.
Life Test is essential
for any new IC to determine
c i rcu it integrity and es tablish
failure rates, etc.
Normal
accelerated life test procedures
are adequate for bipolar ICs.
The testing should be run only
on parts produced with production tooling and assembly
lines. Test samples should come
from the same assembly line as
will be used for the volume
production,and the parts should
be as representative of future
production as is possible. If a
common failure analysis should
be performed to determine
cause. Corrective action will be
determined following the analysis.

At the beginning of the
program the systems manager
selected a partner who projected
a satisfactory unit based
on a specification- and anticipated shippable yields.
A
product was developed and
resul ted in an IC that has a
certain character.
The semiconductor manufacturer will be
able to make recommendations,
based on the characterization
data, for ways to improve
performance and yield. Every
percentage point of yield loss
affects shipments and cost.
Therefore, it is definitely to
the systems manager's benefit to
work towards the highest practical shippable yield.

If a major change is made
(as a result of the life test)
to the mask set, the part should
be put through a new operating
life test. Changes in test
11-14

CUSTOM DEVICES (Continued)
history on similar devices which
can be used to predict system
life.

procedures or limits will not
normally require a new life
test. The systems manager must
keep in mind that a normal
life test is 1000 hours, and
takes six weeks of oven time
with two weeks on each end to
take data. This time should
be factored into the development
schedule as a normal part of any
custom program.

13. Release to Production of
the custom IC can be achieved
following, or even prior to
completion (dotted area Fig. 2)
of successful, life testing.
However, release prior to
completion of life testing is
very risky before 500 hours.
Once released, it will take
about sixteen weeks to achieve
full production.
Since the
production cycle is so long, the
system manager should consider
that any change to the IC may
affect a considerable quantity
of product.
Therefore, such
changes can be very ~ostly.

Historical data on the
bipolar process used for the
custom IC is very useful in
predicting long-term failure
rates.
This also will provide
guidance in supplier selection.
An established supplier of
automotive ICs will have a

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.

11.
12.
13.

Selection of Semiconductor
Supplier
Contract Definition and Negotiation
Circuit Design
Breadboard
Design Review
Circuit Layout
Layout Review
Mask Making
pilot Wafer Run
Device Characterization
Specification Review
Life Test
Releas.e to Production

SUMMARY
An overview of how to use
a custom bipolar approach to a
system requirement. The systems
manager needs to determine when
it is cost effective to either
customize or use standard
"off-the shelf" components. 1'he
manager needs to decide how much
of the system to integrate.

Should it be in one package, or
broken up into several packages?
What lead time is available
and when will the electrical,
environmental, and mechanical
specification limits have t~ be
frozen?
How many sources will
be required, and what is

11-15

m

CUSTOM DEVICES (Continued)

the risk that parts will not be
interchangeable? The preceding
is a partial list of questions
that have to be answered for any
tentative "custom" project. The
answers will affect the choice
of technology,device development
time, system development time,
etc., all of which affect cost
and have a direct bearing on
reliability and program success.

CONCLUSION
As previously indicated,
the semiconductor supplier
should be considered as a member
of the project team. As such it
is highly desirable to work
closely with him on an open and
frank bas is. Remember, the
circuit is a result of the
designer's
interpretation
of the specification's basic
system needs.

Once the decision has been
made to go "custom" the next
problem is getting the desired
function, within an acceptable
schedule. At this stage the
systems manager loses some
control over his program's
success, because at this
point of the program there is a
"new" member in his design
team - the semiconductor supplier.

Assuming the systems
manager has chosen the correct
supplier; defined and brought to
production a system that
the
final customer will buy;
overcome all the major and minor
problems during the development
period; the systems manager may
find it cannot be made for
the desired price (because of
low yield) and in the required
quantities.
Therefore, temper
enthusiasm for all the latest
techno log ies.
Determine at the
outset which approach is the
best - a custom IC or "discrete"
off-the-shelf design, and be
flexible on specifications that
affect yields. The advertising department will be able
to live with either, because
after all, it is SOLID STATE
ELECTRONICS! !

Ideally the program will be
one of a series of customizations, and will have had a
positive relationship with
one or more of the suppl iers
that have the required expertise. Previous program successes
will give a guide as to how
long the project will take.
In
any event, the following major
steps will take place, each with
its own cycle and problems:

11-16

CUSTOM DEVICES (Continued)

CUSTOM CIRCUIT DESIGNS
Sprague is active in the design of standard and
custom high-volume integrated circuits and subassemblies for both linear and digital applications. A
wide range of semiconductor technologies is available to optimize cost and performance. Often, new
processes or innovative circuit designs are involved.

Package: Plastic packages are the least expensive.
Cer-DIP packages are less expensive than sidebrazed hermetic packages, which are the most
costly. Cost also increases with pin count.
Specifications: Well-defined specifications can expedite circuit design. Excessive or arbitrarily tight
specifications will reduce yields and increase cost.

Generally, the first concern of a designer of a custom device is one of cost, though performance, reliability, size, and process are also important
considerations. Cost is determined by the following
factors:

Integrated Component Capability
fransistors: NPN-Beta to 300, BVcEs to 200 V, fT to 500 MHz
PNP-Beta to 60, BVcEs to 150 V, fT to 5 MHz
CMOS-VTH 0.8 to 2.5 V, BVos to 18 V

Production Volume: Unit cost is dependent on
quantity. A minimum volume of $250,000 per year is
required after the initial design and development.

Resistors:

Chip Size: Unit cost is directly affected by chip
size, which is related to circuit complexity, outputcurrent and output-voltage ratings.
Test Requirements: Logic, d-c, and static measurements are simple, fast, and inexpensive to perform,
while linear measurements such as those for distortion, phase, and noise, may affect production rates
and increase cost.

Diffused-5fl1o, to 1000, to 100 V
175fl1o, to 100 kO, to 100 V
Ion Implant-l kfllD to 4 kO/o, to 1 MO, 20 V
Thin Film-2 kO/o, to 2 MO, 250 V
Aluminum-0.0250/o, to 1.00, 150 V

Capacitors: Junction-OJ pF/miJ2, to 30 pF, 100 V
0.3 pF/miF, to 100 pF, 12 V
0.9 pF/miF, to 300 pF, 6 V
MOS-OJ pF/miF, to 30 pF, 50 V
0.2 pF/miJ2, to 50 pF, 20 V

Typical Custom Design Schedule
Time in Weeks
Define Specifications
Circuit Design
2 to 20
Breadboard Construction and Analysis
4 to 12
Circuit Layout and Maskmaking
4 to 12
Prototype Processing
3 to 10
Prototype Evaluation
4 to 8
Production Pilot Run
8 to 16
Production Volume
12 to 20
Total 37 to 98 weeks at an engineering cost of between $20,000
and $100,000, not including special test hardware or assembly
tooling.
Task

Diodes:

Zener-5.7 or 7.0 V, ± 0.3 V
Photo-0.5 A!W or >300 nAlfc at 800 nm
Schottky-OJ to 0.4 Vat 1 jJoA, 0.3 to 0.6 Vat
1 mA
Small Signal-BV = 7.0 V

Other:

SCRs-to 1A, to 60 V
PUTs-to I A, to 60 V
I'l-Propogation delay typically 100 ns
BiMOS-High-power bipolar plus low-power MOS
Hall Cells-35 mVlkG

Application Areas of Sprague Expertise
Interface-Display drivers, motorlrelay/solenoid
drivers, Hall cells, opto-sensors

Military-Communications, fuze, interface

Camputer-Peripheral power interface to 200 V or
5 A, video display drivers, SMPS
Radio-A-M, F-M, F-M stereo, communications,
A-M stereo
Audio-250 m W to 20 W, mono and stereo
Control-Timers, Hall cells, opto-sensors, switching
regulators, motor drivers, PWM

Telecommunications-SLIC, electronic telephones,
wireless telephones
Automotive-Controls, monitoring, safety, radio

Camera-Light integrators, timers, controls

Transistor Arrays-Small-signal, high-current, SCR,
control
General-Sound generators and amplifiers, timers,
controls

11-17

m

CUSTOM DEVICES (Continued)

OPTIONAL PACKAGE CAPABILITIES

Standard integrated circuits from Sprague Electric Company are most
often furnished in packages meeting industry or military standards (JEDEC
TO-87, TO-91, TO-99, TO-lOO, or TO-1l6, or MIL-M-385 10). However,
on special order, other packages or assemblies of packaged devices can al;o
be supplied. A few special order devices are illustrated above, including
special heat sink tabs, subminiature plastic packages, printed wiring boards,
flexible circuits, and complex assemblies. Devices with photodiodes are
furnished in clear plastic cases.

11-18

QI

PACKAGE INFORMATION

I~J

SECTION 12-PACKAGE INFORMATION
Package Thermal Characteristics .....................
Thermal Design for Plastic Integrated Circuits. . . . . . . . . . . ..
Computing Integrated Circuit Temperature Rise ............
Thermal Resistance-A Reliability Consideration ..........
Operating and Handling Practices for MOS Integrated Circuits..

12-2
12-3
12-9
12-13
12-22

Package Drawings:
Suffix 'A' Plastic Dual In-line ...................... 12-23
Suffix 'B' Plastic Dual In-line with Heat Sink Semi-Tabs .... 12-26
Suffix 'C' Unpackaged Chip or Wafer ..................... .
Suffix 'D' Metal 3-Pin TO-52ITO-206AC . . . . . . . . . . . . . . .. 12-27
Suffix 'H' Glass/Metal Hermetic Side-Brazed Dual In-line . .. 12-28
Suffix'J' Glass/Metal Hermetic 14-Lead Flat-Pack . . . . . . .. 12-30
Suffix 'M' Plastic Mini 8-Pin Dual In-line .............. 12-30
Suffix 'Q' Plastic Quad In-line with Heat Sink Tabs ....... 12-31
Suffix 'R' Glass/Ceramic Hermetic Dual In-line . . . . . . . . .. 12-31
Suffix'S' Plastic Mini Single In-line. . . . . . . . . . . . . . . . .. 12-33
Suffix 'T' Plastic 3-Pin Single In-line . . . . . . . . . . . . . . . .. 12-33
Suffix 'U' Plastic 3-Pin Thin Single In-line ............. 12-34
Suffix 'W' Plastic 12-Pin Single In-line Power Tab ........ 12-34
Suffix 'Y' Plastic 3-Lead TO-92 Transistor .............. 12-35
Suffix 'Z' Plastic 5-Lead TO-220 Single In-line Power Tab ... 12-35

12-1

PACKAGE INFORMATION

Package Thermal Characteristics
Package
Designator

A
A
A
A
A
A
B
B
B
D
H
H
H
H

J
M
Q
R
R
R
W
y

Z

Package Type

Frame
Material

RelAt
(OCIW)

Relet
(OCIW)

14-Lead Plastic DIP
16-Lead Plastic DIP
18-Lead Plastic DIP
20-Lead Plastic DIP
22-Lead Plastic DIP
28-Lead Plastic DIP
8-LeadSemi-Tab Plastic DIP
14-Lead Semi-Tab Plastic DIP
16-Lead Semi-Tab Plastic DIP
3-Lead Transistor
8-Lead Hermetic DIP
14-Lead Hermetic DIP
16-Lead Hermetic DIP
18-Lead Hermetic DIP
14-Lead Flat Pack
8-Lead Mini DIP
16-Lead Quad In-Line
14-Lead CerDiP
16-Lead CerDiP
18-Lead CerDiP
12-Lead Power Tab SIP
Head Transistor
5-Lead Power Tab SIP

Copper
Copper
Copper
Copper
Copper
Copper
Copper
Copper
Copper
Kovar
Kovar
Kovar
Kovar
Kovar
Kovar
Copper
Copper
Kovar
Kovar
Kovar
Copper
Copper
Copper

60
60
55
55
50
40
75
45
45
300
120
90
90
75
140
80
45
75
75
65
24
310
40

38
38
25
25
21
16
13*
13*
13*
150
40
20
20
20
80
55
13*

3.0*
170
4.5*

The data given is intended as a general reference only and is based on certain simplifications such as constant chip size, standard bonding methods, and
an allowable + 150°C junction temperature. Where differences exist, the detail specification takes precedence.
tGe" = liRe" and GeJe = 1/ReJC

"Ren

12-2

PACKAGE INFORMATION (Continued)

THERMAL DESIGN FOR
PLASTIC INTEGRATED CIRCUITS

THERMAL DESIGN is essential for rePROPER
liable operation of many electronic circuits.

+50°C is specified. The maximum allowable chip
temperature is usually + 150°C for silicon.
Thermal resistance is the all-important design factor. It is composed of several individual elements,
some of which are determined by the integrated
circuits manufacturer, and some by the user.

Under severe thermal stress, leakage currents increase, materials decompose, and components drift
in value or fail. Present-day linear integrated circuits
are capable of delivering 5 to 10 watts of continuous
power. Previously, such power levels came only
with discrete metal can power transistors. It was
relatively easy to determine the thermal resistance of
these devices and attach a massive heat sink. However, in many markets, economic factors now dictate
the use of molded dual in-line plastic packaged
monolithic circuits. The guidelines to be discussed
will provide the circuit design engineer with information on maintaining junction temperature below a
safe limit under worst case conditions.

Chip Power Dissipation

The chip power dissipation should be obtainable
from the manufacturer's specifications. In most applications it is a variable and determined by the user
when he specifies the circuit variables.
A typical example is a dual 2-watt audio power
amplifier. Power dissipation is determined by the
load impedance, the required peak output power,
the acceptable amount of total harmonic distortion
(THO), and the supply voltage (Vee). This is illustrated in Figures 1-3. Note that for a given supply
voltage, the chip dissipation may be greatest at some
point below the peak output power rating and must
be considered.
As shown in the figures, a peak output power of 2
watts per channel with 3% maximum THO would
mean a chip power dissipation of about 2.7 Wand a
Vee of 15 V with a load impedance of 40, or 1.8 W
and 15 V at 80, or 1.4 Wand 19 V at 160. In
general, the highest load impedance for a given output power is the most desirable (within the output
voltage capability of the device).

Design Considerations

Four factors must be considered before the required heat-sinking can be determined. These are:
1. Maximum ambient temperature
2. Maximum allowable chip temperature
3. Junction-to-ambient thermal resistance
4. Continuous chip power dissipation
Maximum ambient temperature for the integrated
circuit is normally between + 70°C and + 85°C and is
usually dependent on the case material. In most
applications, however, the limiting factor is the associated discrete components and a limit of about

12-3

PACKAGE INFORMATION (Continued)

o~o--------~--------~----------~--------~------~
OUTPUT POWER PER CHANNEL IN WATTS

Dwg No. A-1I,429

Figure 1

OUTPUT POWER PER CHANNEL IN WATTS

Dwg No. A-1I.430

Figure 2

o~o---------+--------~'---------~--------7---------7
OUTPUT POWER PER CHANNEL

I~

WATTS

Owg No. A-1I.431

Figure 3

12--4

PACKAGE INFORMATION (Continued)

being altered from the standard 14-pin or 16-pin
designs.
Rapidly becoming an industry standard is the
"bat-wing" package. This package is the same size
as a 14-pin dual in-line package, but the center portion of the frame is left as tabs, measuring about 1M"
square. These tabs can be soldered, welded, or
bolted to a heat sink, or inserted directly into some
sockets. The worst case thermal resistance of various
lead frames (S,c) is given below.

Heat Dissipation

In any circuit involving power, a major design
objective is to reduce the temperature of the components in order to improve reliability, reduce cost, or
improve operation. The logical place to start is with
the heat-producing component itself. First, keep the
amount of heat generated to a minimum. Second, get
rid of the heat that must be generated.
Heat generation can be minimized through proper
circuit design. Heat dissipation is a function of thermal resistance.
With the typical discrete component, heat dissipation can be accomplished by fastening it directly to
the chassis. Dual in-line plastic packaged integrated
circuits, however, are quite a bit different. Their
shape is not conducive to fastening directly to the
chassis, they are normally installed in a plastic socket or on a printed wiring board, and the heat producing chip is not readily accessible.
Some users specify unusual packages so as to get
the heat sink as close as possible to the chip and lor
provide an attachment point for an external heat sink.
A common factor in many of these special designs is
that the lead frame is an integral part of the heat sink.
Since the plastic package may have a thermal
resistance of between 50 and 100°C!W and the lead
frame a thermal resistance of only 10 to 20°C!W,
this would seem like the best route to go.

Standard

Lead Frame

Thermal Resistance

14-pin Kovar
14-pin copper
"Bat-wing"

47°C/W
19°C/W
l1°C/W

Which Heat Sink?

If the integrated circuit manufacturer has done his
job well, the chip-to-ambient thermal resistance will
be minimized for maximum chip power dissipation.
It would appear that even the Kovar lead frame would
be adequate for most applications. However, the
total thermal resistance (S'A) is also dependent on a
stagnant layer of air at the lead frame-ambient interface which will support a temperature gradient. The
total thermal resistance of a non-heat sinked dual
in-line plastic package is therefore much higher.
Since air is a natural thermal insulator, maximum
heat transfer is through convection and the total
thermal resistance will decrease some at high power
levels.

Pac~ages

The most common lead frame material has been
Kovar (an iron-nickel-cobalt alloy). Its coefficient of
expansion is close to that of silicon thereby minimizing mechanical stresses. However, Kovar has a relatively high thermal resistance and consequently is
not suitable for standard lead frames in high power
dissipation circuits. For these applications, copper or
copper-alloy lead frames should be used.
Additionally, some type of added heat sinking may
be necessary. Thus lead frame configurations are

Lead Frame

Total
Thermal
Resistance

Max. Power Diss. (W)
at 50°C TAo 150°C TJ

14-Pin Kovar
14-Pin Copper
"Bat-Wing"

120°C/W
72°C/W
50°C/W

0.83
1.39
2.0

Ignoring any safety margin and device performance, even the "bat-wing" is now only barely
adequate for most applications. The obvious solution
is the use of an external heat sink.

12-5

PACKAGE INFORMATION (Continued)

Heat sinks for plastic dual in-line packages can be
of almost unlimited variety in design, material, and
finish. Economics will normally playa very important role in the selection of any heat sink.

Referring to Figures 4 and 5, the thermal resistance requirement of the heat sink is found at the
junction of the specified chip power dissipation and
maximum ambient temperature. These curves are
typical of those furnished in many monolithic integrated circuit data sheets. Actual performance in a
specific situation depends on factors such as the
proximity 8f objects interfering with air flow, heat
radiated or convected from other components, atmospheric pressure, and humidity. A good safety
factor is therefore in order.

The least expensive and easiest to fabricate heat
sink is the plain copper sheet. It is also very effective
in reducing the total thermal resistance. The necessary dimensions can be obtained from Figure 6.
These heat sinks are square in geometry, O.Oi5 inches thick, mounted vertically on each side of the lead
frame, and with a dull or painted surface (Figure 7).
The heat sinks should be soldered directly to the lead
frame (approximately O.3°C IW interface thermal
resistance) .

14,---,--.-------.---.----,,---..--.,---,

l'I--+--+--+---+--jI---1---t---I

The plain copper sheet heat sink is also available
commercially and may be less expensive than inhouse manufacture. Two standard types are the
Staver V7 and V8.

101--+--_+-_-+_--+_--1,--_+-_-+-_-1
14·PIN COP'PER LEAD FRAME
GJc: lqOCIW

'0

....

I""

~

,
160

AMBIENT TEMPERATURE IN

°c
.'Owg No. A·ll.432

Figure 4

.. -

,

,
geA in °C PER WATT

'0

'00

Dwg No. A-ll.434

Figure 6

CASE e .. SO .. lOOoC/W

"z

..------JUNCTION

SILICON

L-J

DIE BONO
'--- lEAD fRAME
SOLDER

a.0.2SoC
a • D. DDloC/W

9 10 .. 46oC/'~,-f--a • O. JOCIW
a "ijARI~

HEAT SINK
AMBIENT

Dwg No. A·ll.435

Dwg No. A·ll,433

Figure 5

Figure 7

12-6

PACKAGE INFORMATION (Continued)

The circuit manufacturer must optimize his chip
design so that component drift is minimized and lor
equalized so that rated performance can actually be
obtained under maximum thermal stress.

Heat Sink Finishes

Although plain copper is an effective heat sink, it
is sometimes desirable to have something that is
more appealing to the eye. For this reason, and
others, many heat sinks are either painted or
anodized.
The most common finish is probably black anodizing. It is economical and offers a good appearance.
The black finish will also increase the performance
of the heat sink, due to radiation, by as much as 25%.
However, since anodizing is an electrical and thermal insulator, the heat sink should have an area free
of anodize where the heat-generating device is attached.
Other popular finishes for heat sinks are irridite
and chromic acid dips. They are economical and
have negligible thermal and electrical resistances.
These finishes, however, do not enjoy the 25% increase in performance that a dull black finish has.

Note in Figures 8 and 9 that the Darlington input
differential pairs are cross-connected so as to minimize differences in gain as a function of output
transistor power dissipation. Transistor Q4' being
closest to the output power transistors, is naturally
the hottest; Q3 is a degree or two cooler; QI and Q2
are about equal and midway between Q3 and Q4' The
. gain of the QI-Q2 Darlington pair is about equal to
the gain of QrQ4 at all output power levels because
of careful thermal design.

~~

Forced Air Cooling

t

The performance of many heat sinks can be increased by as much as 100% by forcing air over the
fins. Where space is a problem, the cost of a small
fan can often be justified. If a fan is required for other
purposes, it is advantageous to place the semiconductor heat source in the air flow. A rule-of-thumb is
that semiconductor failure rate is halved for each
10°C reduction in junction operating temperature.

Figure 8

Chip Design

Proper thermal design by the integrated circuit
user can reduce the operating temperature of the
semiconductor junction. However, the minimum
chip temperature at any power level is determined
solely by the device manufacturer. For this reason,
care must be taken in choosing the manufacturer.
"Exact equivalent" integrated circuits are not necessarily identical. Electrically and mechanically they
may be the same, but thermal differences can mean
that "identical" audio power amplifiers will not put
out the same power without exceeding the rated
junction temperature.

Figure 9

12-7

Dwg No. A·lJ ,436

PACKAGE INFORMATION (Continued)

The foregoing discussion has covered the average
thermal characteristics oftoday's dual in-line plastic
integrated circuits. The specific devices will vary
with the different packages and bonding techniques
employed, but the concepts will remain the same.

In certain specialized applications, thennal coupling can be used to a distinct advantage. Experimentally, thennal coupling has been used to provide a
low-pass feedback network which otherwise could
be obtained only with very large values of capacitance.

APPENDIX
The following is intended to review terminology
and compare thermal circuits with the more familiar
electrical quantities.
The first law of thermodynamics states that energy
cannot be created or destroyed but can be converted
from one form to another. The second law of thermodynamics states that energy transfer will occur
only in the direction of lower energy. In the
semiconductor junction, the electrical energy is converted to thennal energy. Since no heat will be stored
at the junction, the heat will flow to a lower temperature medium, air. The rate of heat flow is dependent
on the resistance to that flow and the temperature
difference between the soUrce and the sink.
ELECTRI CAL
CIRCUIT

I
(AMPERES I

If

thermal resistance of the lead frame-heat sinkambient is shown as a variable resistor, because this
is under the control of the user and may be varied
over a considerable range.
,-- Q '

r-----I

n£RMAl RESI STANCE
Of PLASTIC CASE

(OHMS I

E2 (VOLTSI

i--

I

I

I

I

~

I
I
~

·SA,

THERMAL RESI STANCE
HEAT SI NK - AMBIENT

TA'

AMBIENT TEMPERATURE

__

TJ~TA + Q

r~'

(WA~TSI 1

TJ - JUNCTION TEMPERATURE
·JC. THERMAL RESISTANCE
JUNCTI ON - LEAD FRAME
·CS. THERMAL RESISTANCE
lEAD FRAME - HEAT SINK

~

IL. _ _ _ I

(OJC + OCS + 0SAI

Owg No. A·1l,43S

Figure 11

e (DC/WI
T2 (OCI

Tl-T2,Q9

El - E2 • IR

~

THERMAL RESI STANCE:
Of PRINTED WIRING BOAR! BOARD Of SOCKET
I
I

THERMAL
CI RCUIT
IVOLTSI

!

THERMAL POWER IN WATTS •
ElECTRI CAL POW£R I N WATTS

Material

Dwl No. A·1l.437

Silver
Copper, Annealed
Gold
Beryliia Ceramic
Aluminum
Brass (66 Cu, 34 Zn)
Silicon
Germanium
Steel, SAE 1045
Solder (60 Sn, 40 Pb)
Alumina Ceramic
Kovar (54 Fe, 29 Ni, 17 Co)
Glass

Figure 10

This thermal electrical analogy is convenient only
for conduction problems where heat flow and temperature obey linear equations. The analogy becomes mqch more complex for situations involving
heat flow by convection and radiation. Where these
two modes are not negligible, they can be approximated by an equivalent thermal resistance. If ignored, the error introduced will only improve the
device reliability.
A simplified thennal flow diagram of a molded
dual in-line package and heat sink is shown. The

Epoxy

Mica
Teflon PTFE
Air

12-8

Thermal Resistance in ·C/W
for Unit Area/Unit Length
0.09
0.10

0.12
0.20
0.20
0.40
0.50
0.70
0.80

1.5
2.0

3.0
40
40

50
200
2000

PACKAGE INFORMATION (Continued)

Computing IC Temperature Rise

Heat is the enemy of integrated circuits-particularly power devices. Here's how to use thermal ratings
to determine safe Ie operation.

Why Ie Temperatures Rise
Reprinted by permission from the June 9, 1977
issue of MACHINE DESIGN, Copyright © 1977 by
Penllln/IPC Inc., Cleveland, Ohio.

EXCESSIVE heat shortens the
life of an IC and reduces its
operating capability. Until recently, ICs were capable of
operating only in low-power applications requiring perhaps a
few milliwatts of power. But
now, new ICs handle several
hundred milliamperes and
drive devices such as relays,
solenoids, stepping motors, and
incandescent lamps. These high
power levels may increase IC
temperatures substantially and
are capable of destroying devices unless appropriate precautions are taken.

Thermal Characteristics
The thermal characteristics
of any IC are determined by four
parameters. Maximum allowable IC chip junction temperature
T J and thermal resistance R.
are specified by the IC manufacturer. Ambient temperature TA
and the power dissipation Po
are determined by the user.
Equation 1 expresses the rela-

IC temperature TJ is determined
by ambient temperature T..,
heat dissipated PI)' and total
thermal resistance Ro. This
total thermal resistance is
comprised ofthree individual
component resistances:
chip Re , lead frame RI.,
and heat sinkRs '

tion of these parameters.
TJ = TA + PoR,

(1)

Junction temperature TJ
usually is limited to 150°C for
silicon ICs. Devices may operate
momentarily at slightly higher
temperatures, but devic!,! life
expectancy decreases exponentially for extended hightemperature operation. Usually, the lower the junction
operating temperature, the
greater the anticipated life of
the IC.
Ambient temperature T.. is

12-9

traditionally limited either to
70°C or 85°C for plastic dual inline packages (DIPS) or 125°C for
hermetic devices. Again, the objective is to operate at as Iowa
junction temperature as practical.
.
Thermal resistance R. is the
basic thermal characteristic for
ICs. It is usually expressed in
terms of °C/W and represents
the rise injunction temperature
with a unit of power applied in
still air. (The reciprocal of
thermal resistance is thermal
conductance, or derating factor,

PACKAGE INFORMATION (Continued)
G.expressed as wrc.) Thermal
resistance of an Ie consists of
several distinct components,
the sum of which is the specified
thermal resistance. For a typical Ie, these components of
thermal resistance are 0.5°C/W
per unit thickness of the silicon
chip, 0.1 to 3°C/W per unit
length of the lead frame, and up
to 2,000°C/W per unit thickness
of still air surrounding the Ie.
DIPs are used more than any
other type of packaging for
Ies and newer copper-alloy
lead frames provide a superior
thermal rating over the standard iron-nickel-cobalt alloy
(Kovar) lead frames. However,
power Ies are also available
in other packages such as flatpacks and To-type cans.
The power Pn that an Ie can
safely dissipate usually depends on the size of the Ie chip
and the type of packaging. Most
common copper-frame DIPs can
dissipate about 1.5 W, although
some special-purpose types
have ratings as high as 5 W.
Total Ie power to be dissipated depends on input current,
output current, voltage drop,

and duty cycle. Thus, for many
industrial digital-control Ies,
logic-gate power PI (typically
less than 0.1 W) and output
power Po must be determined to
find the total power to be dissipated. Total power dissipation
for these logic devices is the sum

of Pi and Po.
PI = n(Vcc1cc)
Po'" n(VCE(8 ..tT)Io)

sense diode and measure the forward voltage in 25°C
increments after stabilization lit each temperature. This
calibration provides enough data for at least six points to
construct a diode-forward-voltage versus
junction-temperature graph at the specified forward current.
A typical 25°C forward voltage is between 600 and 750 mVand
decreases 1.6 to 2.0 mV/oc.
For power·levels above 2W, it may be necessary to use more
than a single transistor If only the device saturation voltage
and sink current are used. When higher power is desired, keep
the output out of saturation.
Measuring the sense-diode forward voltage may require a
considerable waiting period (10 to 15 minutes) for thermal
equilibrium. In any event,at the instant of measurement, thl!
heating power may have to be disconnected since e.rroneous
readings may result from IR drop in circuit coml1'1on leads.
Various circuit connections (such as four-point Kelvin) may be
arranged to reduce or eliminate this source of error.
The IC junction temperature can be determined by
comparing the voltage measurement with the internal. power
source against the voltage measurement with the temperature
chamber.
.

12-10

(3)

where Vee = logic-gate supply
voltage, I(e = logic-gate ON
current, V~E(SAT) = output saturation voltage, Ie = output

Measuring Ie Temperature
Sometimes IC junction temperature cannot be calculated
readily and instead must be measured. Measurement should
be made when there is insufficient data with which to
calculate, when the effects of extern!!1 variables such as
forced-air cooling orenclosure size must be determined, or as
a check on the manufacturer's speci"fications regarding
package thermal resistance.
The most popular technique for measuring IC temperature
uses the characteristic of a diode to reduce its forward voltage
with temperature. Many IC chips have some sort of accessible
diode-parasitic, input protection, base-emitter junction, or
output clamp. With this technique, a "sense" diode is
. calibrated so thatforward voltage is a direct indicator of diode
junction temperature. Then, current is applied to some other
component on the chip to simulate operating conditions and
to produce a temperature rise. Since the thermal resistance of
the silicon chip is low, the temperature of the sense diode is
assumed to be the sal)1e as the rest of the monOlithic chip.
The sense diode should be calibrated over at least the
expected junction operating temperature chamber. Apply an
accurately measured, low current of about 1 mA through the

(2)

PACKAGE INFORMATION (Continued)

industrial power driver are Vee = 5.25 V,
Ice =25mA,and VCE(SAT) -O.7V,and/c =
250 rnA. From Equl[ltlons:1 and 3, worst
case logic and output power
disllipation are

PI

=
:=:

p.

Po for this
PD

Ie is

l50·C - 80°C
= ----,--100·CjW
:=:

0.65W

4(5.25 V X 25 mA)
525mW

=4(0.7 V x

250mA)

:-: 700m.W

,

th,

Thus,
totai !!'19M CI[IH .poW$i
diaaipatloA PD is _lOW plU, 700
, or 1.225 W~ ;:romequatlon 1,~IlCl:IiI'i!~;;;l:?:
lunctlpn!!I"i~re 1, is
TJ

== 70~p +(J~'W)

=fJ.t~~1 ~W:t:;l}}: .

"~

".' "',

"

load current, and n = number of
logic gates. Manufacturers
usually list typical and maximum values for these voltages
and currents. For thermal considerations it is best to use the

the logic-gate power PI and output power Po for the logic ON
state alone. If the ON time is
less than 0.5 sec, however, average power dissipation must be
calculated from instantaneous

maximum values so that
worst-case power dissipation is
determined.
If the duty cycle of the device
is longer than 0.5 sec, the peak
power dissipation is the sum of

Setting Up the Circuit

Calibrating the Sense Diode
800

Resistors control
output transistor
power dissipation

Constant current
source of about 1 mA

/"""_+_~_-+-'

Ie device

Voltmeter measures
forward voltage
across sense diode
Transient
suppression
diode used
as sense diode

Q)

'8

o
400

300~

Input power is negligible compared to output
power and is therefore not measured.

25

__

~

50

__

~

________"

75

100

125

______
150

Junction Temperature, T, (0G)

12-11

~

175

PACKAGE INFORMATION (Continued)

What the CorvesShow
The junction temperature of an IC depends on several factors, including the thermal resistance of the IC and the
operating duty cycle. Graphs showing the relationship of these factors are often useful in specifying an IC.

Thermal Ratings
3.0,......--....- - - - - - - - , - - - - - - - ,

C

.2

i
.

~

2.0

i5

1
~

'"
~

1.0

:g"
~ 0.5

;;:

o~

-75

__________
-50

-25

0

~

________

+25 +50

...

~~

+75 +100 +125 +150

Ambient Temperature, T, ('C)

Typical thermal-resistance ratings for ICs in still air range
from 60'C/W to 140'C/W. The slope of each curve on this
graph is equal to the derating factor GO, which is the
reciprocal of thermal resistance RO. For an ambient
temperature of SO'C, a typical 14,lead flat pack with an RO of
140'C/W can dissipate about 0.7 W. A typical DIP, however,
with 14 copper-alloy leads can dissipate almost 1.7 W at
SO'C .
The highest allowable package power dissipation shown
here is 2.S W. Other special-purpose DIP packages are
available with power dissipation ratings as high as3.3 W at
O'C (RO = 4S'C/W). If not for package limitations, IC chip
dissipation might be greater than 9 W at an ambient
temperature of up to 70'C.
Although the curve for plastic DIPs goes all the way to
lS0'C, they ordinarily are not used in ambients above 8S'C
because of traditional package'limitations. Hermetic DIPs
are specified to temperatures of 12S'C, and at lS0'C the
device should be derated to 0 W. The higher
specification limits for, hermetic devices is the resuit of
their design for use in rigorous, high-reliability military
applications.

Duty Cycle
i400r-----~------~------_,~--------_,

.s
Duty cycle is important in calculating IC junction
temperature because average power-not instanianeous
power-is responsible for heating the IC. To convert from
peak power to average power, multiply the peak power
dissipation by the duty cycle. The average-power rating is
then used with the thermal-resistance rating to calculate
the IC junction temperature. Thus, short duty cycles allow
peak power to be high without exceeding the IS0'C
junction-temperature limit. However, this consideration
applies only to ON times of less than O.S sec.

40

60

80

100

Duty Cycle, D (percent)

ON and OFF power P ON and
POFF from
PD

= DPON + (1 -

D)POFF

(4)

Corrective Actions
If the junetion temperature or
the required power dissipation

of the Ie is calculated to be
greater than the maximum
values specified by the manufacturer, device reliability and
operating characteristics possibly will be reduced. Possible
solutions are: 1. Modify or partition the circuit design so the Ie
is not required to dissipate as
much power, 2, Reduce the

12--12

thermal resistance of the Ie by
using a heat sink or forced-air
cooling. 3. Reduce the ambient
temperature by moving heatproducing components such as
transformers and resistors
away from the Ie. 4. Specify a
different IC with improved
thermal or electrical characteristics (if available).

PACKAGE INFORMATION (Continued)

THERMAL RESISTANCEA RELIABILITY CONSIDERATION
More and more the semiconductor component
supplier and the ultimate system user are becoming
aware of the need for reliable components. Most failure mechanisms responsible for reliability failures
are temperature dependent and the kinetics of the
failure reaction are normally described by an Arrhenius function. This dependence, therefore, demands the capability of measuring the mean
temperature which an integrated circuit die will attain during operation to realistically assess the reliability ofthe part.
The problem addressed by this paper is the inconsistency of the measurement techniques and the results used by manufacturers and users to determine
the thermal characteristics of packaged semiconductor components. Our objective is to provide insight into the considerations which must be applied
when evaluating these thermal properties of the
packaged component. These considerations are materials, geometry and environment.
Furthermore, we wish to instill uniformity in the
method of determining thermal properties of packaged semiconductors through understanding of the
variables involved which can lead to a useable industry standard.

Most reactions which can cause a failure in an
electrical parameter of an integrated circuit are
chemical in nature and are influenced by temperature. The temperature dependence of these reactions has been described very well by S. Arrhenius
in his treatment of reaction kinetics.' In 'his treatment, the reaction velocity or rate is given by the
equation.
d1nV/dT = EIR'f2
here V, is the specific reaction rate, T is the absolute
temperature, R is the Molar Gas Constant, and E is
the energy difference between a mole of active molecules and a mole of normal molecules.
This equation integrates to
InV, = EIRT + A
where A is a constant which is the value of InV, at
1fT = 0, (InV,). A more familiar expression is
InV, = InV~ - ElkT
or
V, = V~e - ElkT
where E is the activation energy per molecule
(= E/N), N = A vagado' s number and k is the gas
constant per molecule (= RlN), which is generally
known as the Boltzmann constant. It has the value
8.6 x 10- 5 eV/oK.

Reliability-The Temperature Function
The recognition of the problems one encounters
in measuring the mean temperature of a die has been
directly related to our expenences at the Sprague
Electric Co. in our Reliability Assurance Programs.
The large number of device types manufactured
require an equally large number of bum-in boards
having different functions and geometry for the
individual reliability studies. The variations in board
density and thermal environment for a device under
test have provided considerable junction temperature data from which we conclude that a "thermal
resistance" measured in one oven with its set of conditions is not transferable to another 'oven with differen.t boards, loading, etc. when the reference
tempen~ture for the measurement is the oven control
temperature. Furthermore, it has become obvious
that these same problems in measuring a mean die
temperature exist in a system environment.

VE, the time rate of change of the electrical parameter is proportional to V" i.e., VE = BV,. The
amount of change in the electrical parameter necessary to cause a normal device to fail, IlPf, is VEtr
where tris the time offailure.
RecailingthatVE = BV" then
IlPf = BV,tr
For a given device 6.PF is a constant, therefore,
tr = IlPfB-11V,

but
therefore
where

12-13

PACKAGE INFORMATION (Continued)
The acceleration factor (AF) between any two temperatures is derived from this equation, when the
activation energy for the failure reaction is known:
AF = 4/42 = eelk(11r1 - llril

produce that system in an application since the
external thermal paths are determined by the
method of mounting, the printed wiring board if
used, other heat generating components on the
board or in the vicinity, air flow patterns, etc. These
are all variable for each application. We have measured values of 6JA for the same device which vary
by a factor of two when the mounting and environmental conditions are changed. The values in the
6lA column in Tables 2 and 3 are indicative of the
variation.

Activation energies of most reactions responsible
for random failures in a normal operating period (beyond infant mortality) are nominally
(0.4 - 1.0)eV.
The importance of accurately determining the die
temperature is now clear if one considers a not unrealistic situation where a device is thought to be
operating with a die temperature of 120° and the actual temperature is 150°C. If the failure reaction has
an activation energy of 0.7 eV, then the acceleration
factor is 4.3 which means the device would fail in
less than one quarter of the time it would have taken
if the device actually operated at 120°C.

One is tempted to partition 6lA into two thermal
terms,
6JA = 6lC + 6CA
where 6lC is defined as the thermal resistance from
the source of power at TI to the boundary of the
package not including the external legs, and 6CA is
the thermal resistance from the package boundary
to that isothermal envelope at T A. However, when
one examines the thermal profile along the surface
of a plastic duai-'in-line package such as shown in
Figure 1, it is immediately obvious that a definition
of6lc

Thermal Resistance - 6JA

Quite frequently applications engineers have
made attempts to identify the temperature attained
by a die when a steady state rate of heat is being
generated by the die by applying the term called
"Thermal Resistance." This "constant," designated R6JA or simply 6JA> relates the temperature rise
of a packaged integrated circuit die above an ambient temperature when a known constant power is
generated in the die. This term is normally defined
as

cannot be applied because TC varies with position.
Similarly, the term 6CA defined by
6CA = (Tc - TA)/Po
suffers from the same variability in Tc. This being
the case it is invalid to partition 6lA when operating
on the total power to be dissipated, Po.

6JA = (TJ - TA)IPO
where T J is the mean junction or die temperature, TA
is an ambient temperature, and Po is the power generated within the die which must be conducted from
the die to the ambient. This is occasionally designated QT, the time rate of heat generation in the die.
Thermal resistance data supplied by manufacturers
may be referenced to a cubic foot of free or still air,
flowing air at some velocity, or simply no reference.
These are some of the definitions of "ambient" from
which one must determine where to measure TA.
Thermal resistance as defined by 6JA is not constant. It is made up of a constant term (or terms) in
series with a number of variable terms. The constant
terms relate to the package materials and geometry,
which we will designate 6Jc, and the variable terms
relate to the heat paths from the package boundary
to some isothermal envelope in the system which
has the temperature TA. Even if the system for measuring 6JA is defined, it is virtually impossible to re-

Figure 1

12-14

PACKAGE INFORMATION (Continued)
The Thermal Model

for each path from the geometry and material properties. For example OIC I is the resistance from the
top of the chip to the projected area on the package
surface. The value of OIeI is given by

When one examines a plastic package supplied by
an individual manufacturer it is found that the geometry of the lead frame, its position within the
package boundary, its composition, the composition
of the plastic and its filler, the internal wire bonding
are very carefully controlled and constant in time.
This being the case one can readily build a model of
the package which can be as invariant as the package
material properties. If one considers all possible
heat flows, a very complex model emerges. However, if the thermal conductivities of the package
materials and the orders of magnitude difference in
the values of these conductivities are considered, a
simplified workable model can be generated by neglecting heat paths where heat flows are minimal.
The simplified model shown in Figure 2 has ignored
the heat flow between leads and assumes that the
large difference between the thermal conductivity of
the loaded plastic and the metals in the package define the specified heat paths. For example, the heat
flow between leads would be a shunting resistor between heat paths in the model. The thermal conductivity of most plastics range between 1.5 and 3 x
10- 3 calories/cm - °C while copper based materials
range between 0.5 and 0.82 calories/cm - °C and
nickel based alloys are about 0.03 calories/cm - DC.

OICI = (TI - Tci)/ql = LlKpA
where L is the length of the heat path (thickness of
the plastic above the die), A is the cross-sectional
area of the heat path (are of the die or the pad), Kp is
the thermal conductivity of the loaded plastic and ql
is the heat/second flowing in the path defined by A
andL.
OJC2 is the thermal resistance from the top of the
die through the silicon, through the pad and through
the plastic to the bottom surface. The value of OJC2 is
given by
OJC2 = (TJ - T c2)/q2 =

[lIA]

n = Si, Metal, Plastic
Similar expressions can be derived for each of the
leads and they have the form
OJCi = (TJ - Tc)/q =
[lit] [(LlKpWp)

+ (1/K~ L LjWn]
n

T

-

L Ln/Kn

= 1,2 ..... .

where t is the thickness of the lead frame, Kp is the
thermal conductivity of the loaded plastic, KM is the
thermal conductivity of the frame metal, Ln is the
mean length of each connected portion of a leg segment having a mean width, Wn • In accord with the
model, each internal path characterized by a thermal
resistance, OJCi' is in series with an external thermal
resistance, 0CiA, which completes the path to T A. The
value of OCiA can be calculated from the amount of
heat, q" flowing through the internal package path
and the temperature difference, (Tci - T~, with the
equation

l'

- ----

OCiA = (Tci - T~ / qi·
Values ofO ciA are variable and depend upon the specific environment.

Figure 2
The heat paths defined by OICi' where i refers to a
particular path, radiate from the chip to an area on
the package periphery defined by the projected chip
or pad area as well as the mean cross-sectional area
of each of the leads within the plastic package
boundary (see Figure 1). Because of package symmetry, a 16 lead isolated pad package may have
seven different heat paths which can be characterized. The thermal resistance, OJCi' can be calculated

We at Sprague Electric Company identify the heat
paths in our calculations and data as follows: a)
when i = I the path is from die to case surface directly above, b) when i = 2 the path is from die to
the case surface directly below and c) when i = 3,4,
5 ... the path is from die through an identified
metal lead to the intersection with the plastic
surface.

12-15

PACKAGE INFORMATION (Continued)
Verification of Model
From the model one can derive the minimum thermal resistance which is characteristic of the package. This can be calculated for the condition when
all case temperatures are equal and at TA. This is
equivalent to shorting all external thermal resistances so that Tc. = TA. When all Tc. are equal, the
reciprocal of the'sum of the reciproc~s of all OlCj is
the minimum thermal resistance for the package.
This is realized experimentally by placing the unit in
an infinite heat sink such as a rapidly stirred, lowviscosity controlled temperature bath. The case
temperature is now forced to be the same over all
surfaces and by definition it is TA. OlC is the minimum
limit of OlA' Table 1 shows the agreement between
the values of OJC calculated from the model when the
case temperatures are shorted together and the values experimentally measured in a controlled temperature liquid bath. The agreement between calculated
and experimental values for packages constructed
from different materials enhance the validity of the
model.

If the fraction of total heat, Po generated by the die

which passes through path 1 is defined as k, then
ql = klPo
Substituting into the previous equation, TJ is now
referenced to TCl by
TJ = TCI + klOJclo
where TJ, Tc \, and Po are experimentally measureable quantities. Values ofklOJCl can be determined.
This term can be used to determine TJ in any environment by measuring TCI and the total heat generated by the die. This equation applies for any path,
i., i, e.
TJ ~ TCI + kjOJCjPo
Experimental results are presented in Table 2
which establish that kjOJcj is a constant, the magnitude of which is determined by the heat path chosen.
In our notation, k.OJC4 is the thermal resistance of
the path determined by measuring the temperature
of pin 4 at the point of intersection with the case
body. Further data are presented in Table 3 for a
copper tab package where the pad on which the die
is mounted extends to the outside of the package.
The values of ksOJcs remain constant over a large
change in environment. When i = 5, the heat path is
from the die through the heat tab to the intersection
with the case surface.
Figure 3 shows the outline of the frame in the 16
pin isolated pad package which is designated the
"A" package. The "B" package or tab package
frame outline is also shown.

Applying The Model To Measure TJ

Having verified the model, anyone of the identified heat paths, which has a constant thermal resistance, oJCj' can now be used to determine quite
accurately the die temperature, TJ. If one chooses to
measure the case temperature directly above the
die, the difference between die temperature and case
temperature is related to the heat flow, qj, through
that path by the thermal conductivity equation:
 therefore by substitution and rearrangement

TCI Measurement
The numerical values of ki6JCi which we have
shown experimentally to be constant over a large
variation in environmental conditions are functions
of the measuring system for determining the case or
leg temperature, Tcr This can be shown by considering heat path 1 in the Model shown in Figure 2. In
this case ql = (TJ - T A )/(6Jc, + 6c,~. 6Jc, is defined
as L/ktA, where AI is determined by the die area.
When a thermocouple is attached to the surface directly over the die it also functions as a heat sink.
This changes the effective area A of the internal heat
path and also changes the external thermal resistance, 6CIA . The changes are functions of the thermocouple composition and size. The value of 6Jc, is
now determined by the effective area of contact of
the thermocouple and its value remains constant
when the attached thermocouple's size is held constant. k" (= q/Q.), also changes because ql is determined by the sum of 6Jc, and 6c, A- The term (TJ TA) is essentially constant within experimental error
because ql is small compared to Qt and the variations
in ql do not measureably change the die temperature.
6CIA decreases as the wire size of a copper-constantan thermocouple increases and it increases as
the composition is changed from copper-constantan
to iron constantan. The thermal conductivities of
copper, iron, and constantan are respectively 0.9,
0.16, and 0.054 caIfC-cm.
Data in Table 4 confirm the direction and change
in k,6Jc, with change in measuring system. Data were
taken in the same oven ambient.
When the physical system for Tc measurement
and the conditions for measurement are specified
and held constant, values for k,6Jc, are constants.

~6JCi = 6JA - ki6ciA
where experimentally 6JA is the slope of a plot of TJ
versusPD and Ki6ciA is the slope of the plot of Tci ,
versus PD. Figures 4, 5, and 6 are representative of
the experimental plots for evaluation of ki6Jcr
16 PIN DIP - COPPER FRAME ~ ISOLATED PAD
I CUBIC FOOT STILL AIR

2003 -3

80

~A. 84,7-C/W

-

70

.4

0.5

0.6

0.7

O.B

0.9

1.0

POWER (WATTS)

Figure 4
16 PIN DIP - COPPER FRAME - ISOLATED PAD

110

OVEN #', 60 CFM
2003 - 2 WITH AAvlO "E" TYPE SERIES 5010 HEAT
SINK ATTACHED TO CASE

100
~ 90

.

k.'"C.· '.. A- kle.A -

55.2-C/W

kl,'.lC 1J " ' ... - kl,Ci,A" H.O·CIW

::>

: 80

It'

:I
~ 70

6O~~~==CW~1
50
o

ru

~

~

M

M

M

~

M

M

~

POWER (WATTS)

FigureS

110

v

II!

90

i?

16 PIN DIP - COPPER FRAME - ISOLATED PAD
FLUOROCARBON 40 BATH
2003 - 3 IN SOCKET

k.'"e l • 8". - klt.A • :58.4-C/W
""''''1,. BJA - kllC;.A • 38.0-cJW

TJ Measurement For k,9Jc, Determination
An accurate measurement of the value of ~6Jc.
requires a method of measuring the mean tempera~
ture of the die, TJ. Techniques to make this measurement have been discussed elsewhere. (See Ref. 2, 3,
4) They involve measurement of a temperature sensitive parameter of an element on the die. The forward voltage drop across a diode measured at
constant current is a commonly used parameter.
One must observe caution when applying the cali-

~ 80

It'

:I
~. 70

r K.:s6c"A.

60

:;.3~C/W

50~~~~~9--<------~~~~~k,~~~,A~.~2~.'.~C/~W~
o

0.1

02

03

0.4

0·5

0.6

0.7

08

0.9

1.0

POWER (WATTS)

Figure 6

12-18

PACKAGE INFORMATION (Continued)
TABLE 4

VARIATIONS IN k l9JC1 WITH MEASUREMENT SYSTEM
(All measurements in °CIW)
Device
Test device
Test device
2125-linear
TV Circuit

Condition of
Measurement
.005" Type "J"
thermocouple
.012" Type "J"
thermocouple
.005" Type "T"
thermocouple

127.6
123.5

31.5

92.0

123.3

75.0

48.3

bration data for an element in an unpowered die to
the measured values of that element when the die is
powered. It is rather unique if a parasitic voltage or
current from the powered portion ofthe die does not
interact with the temperature measuring element.
This interaction leads to an inaccurate indication of
the true temperature.
A test chip with a number of temperature sensitive
elements is valuable. Figure 7 is a photo micrograph
of a test chip designed by personnel at the Sprague
Electric Company to evaluate thermal resistance
values for various packages as well as packagesurface interactions. The die contains 3 heat generators, and 6 primary temperature sensors, which are
either diodes or special resistors. Parasitics normally interact differently with different elements because oflocation or structure variations. Agreement
in the value of temperatures measured simultaneously for different elements on the chip normally
indicates a correct measurement.

mal resistance and the offsets of the curves indicate
a varying interaction at different power levels. Although calculation of thermal resistance by the slope
method would introduce a similar error for all three
diodes, the single power point method for calculating k;6Jc., where k;6Jc . = (TJ - Tc)lPn, would introduce co~siderable and different levels of error in the
calculated values for each diode measurement.

80

-'4

51 ;

§

Ib PIN DIP - KOVAR FRAME
ISOLATED PAD - OVEN-I, 60CFM
TEST CHIP
8JAu:2A) • 126-C/W

50~

55

50~0~M~2~~~0~~~~~0+-.,0~~~ob'4~~"O~I8~~0"'.2~2
POWER (WATTS)

FigureS

For example, if temperature measurements were
made at a power level of 0.22 Watts, one would calculate a value of 44.6°CIW for k,6Jc , using TJ from
diode 7-15. 57.1°C/W usingTJ from diode 7-5, and
63.8°C/W using TJ from diode 7-6. The true value
which was verified by pulsed measurements was
97°CIW.
To eliminate interactions between the powered
portion of a circuit and the temperature sensing elementduring measurement, the circuit shown in Figure 9 was developed. This circuit was designed for
thermal evaluation of packages in which the function
could be a linear circuit, a digital circuit, or the standard test chip which has a number of different power
sources and temperature sensing elements.

Figure 7

Figure 8 illustrates errors which can be introduced
when making static steady state measurements of
temperature during power application. Observe the
plots of Tj (from Veb calibration) versus Pn for three
different diodes on the chip. Although the slopes of
the plots after initial power agree within 10%, the
initial portion ofthe curve indicates a negative ther12-19

IE

PACKAGE INFORMATION (Continued)

+ v

+IOV

Rio c~. TIMING CONSTANT

Td • TIME DELAY
IC-I- SE555
IC-2- 74121
IC- 3- UDN2983

Vee

-15Y

Yp - POWER

+15V

Figure 9

In operation, the circuit applies power at a measured level to the device under test for approximately one second, interrupts power for 40
microseconds, and continues this cycle throughout
the test period. At the beginning of the 40-microsecond power off interval, a to-microsecond delay
allows circuit transients to decay before the diode
current is activated. A 6-microsecond delay allows
the current to settle before a sample and hold circuit

samples the diode voltage to determine the chip temperature. This sequence allows the package under
test to come to thermal equilibrium with the environment which approaches that for continuous power
input. The power down sequence and temperature
measurement interval are short enough to insure
that the actual temperature drop when power is removed is less than the sensitivity of the temperature
sensitive element.

12-20

PACKAGE INFORMATION (Continued)

ment can be standardized and provides an accurate,
inexpensive method for the applications engineer or
the reliability engineer to determine a reference temperature to which the temperature rise across the
package path, (ki6Jc)PD , can be applied in order to
determine a true TJ •

The case temperature measurements, TCi' can be
made by thermocouple or by infra-red measurements. 4 In theory the infra-red measurements would
be preferred since a conductive contact is not made
to the surface which is to be measured. In practice a
number of difficulties with I.R. measurements are
encountered. The emissivity of the surface to be
measured must be controlled to give accurate measurements. This normally requires painting the surface with a "proprietary" film. When the emissivity
is mastered, tWQ larger difficulties must be overcome; a) physically placing the infra-red measuring
instrument into the system to view a package surface
when the unit may be buried in a maze of printed
wiring boards and circuitry and b) the cost of available instrumentation.
The thermocouple technique to measure case
temperature is a practical and reliable method when
the composition of the thermocouples, its physical
size, its location on the package, and the method of
its attachment are defined. The method of measure-

REFERENCES
1. S. Glasstone, Textbook of Physical Chemistry,

2nd Edition, D. Van Nostrand Co. Inc., New
York,1946
2. P. E. Roughan, Thermal Resistance of Integrated Circuit Packages, Technical Paper TP727, Sprague Electric Co., 1972
3. F. R. Dewey and P. R. Emerald, Computing IC
Temperature Rise, Machine Design, pp 98-101,
June 1977
4. C. A. Lidback, Scanning I. R. Microscopy Techniques for Semiconductor Thermal Analysis.
17th Annual Proceedings Reliability Physics 1979
IEEE Catalog No. 79CH1425-8 Phy.

12-21

PACKAGE INFORMATION (Continued)

Operating and Handling Practices
for MOS Integrated Circuits
Handling Practice. - Packaged Device.

Autamatlc Handling EqulprHnt

Grounding alone may not be sufficient and feed
mechanisms should be insulated from the devices under test at the point where tl;le devices are connected
to the test equipment. Ionized air blowers can be of
aide here and are available commercially. This
method is very effective in eliminating static electricity problems.

Sprague Electric incorporates input protection
diodes in all of its MOS/CMOS devices. Because of
the very high input resistance in MOS devices, the
following practices should be observed for protection
against high static electrical charges:
1. Device leads should be in contact with a conductive material except when being tested or in
actual operation.

Ambient Condition.

Dry weather with accompanying low humidity
tends to intensify the accumulation of static charges
on any surface. In this atmosphere, proper handling
procedures take on added importance. If necessary,
steam injectors can be procured commercially.

2. Conductive parts of tools, fixtures, soldering
irons and handling equipment should be
grounded.
3. Devices should not be inserted into or removed
from test stations unless the power is off.

Alert Failure Mode.

4. Neither should signals be applied to the inputs
while the device power supply is in an off condition.

The common failure modes that appear when
static energy exists and when proper handling practices are not used are:

S. Unused input leads should be committed to
either VSS or VDD.

1. Shorted input protection diodes.
2. Shorted or 'blown' open gates.
3. Open metal runs.

Handling Practice. - Die

Simple diagnostic checks with curve tracers or
similar equipment readily identifies the above failure
modes.

A conductive carrier should' be used in order to
avoid differences in voltage potential.

12-22

PACKAGE INFORMATION (Continued)

'A' PACKAGE: 14-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.35
0.21

0.014
0.008

'. 13 12 11

10 9

~

•

~L

~,:::::) ~~'5'
J

'NOEX

AREA~ 'I

,D.ose

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2

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0.035

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0.785

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7~0.Q75 REF.
_

7.37

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0'

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1.90 REF.

O.7'3S

NOTE 1

~~"~~~'
0.020
MIN.

/

5.08 MAX.

0.200 MAX.

~"W~'

Owl. No. A-5496G in

DWI. No. A-5496G mm

0.51 M 1 N i W " V f f l +
.-lLO.58
2.54 MIN.

iW"Vffl+
-.JLO.023

0.100 MIN.

--11-- 0 .015

--lio.39

'A' PACKAGE: 16-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

t

~~~~~

g:~r

16 15 14 13 12 "

10 9

INDEXA~~:::::~ E
1•• 5
0,89

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3

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I- 19,93

5 ~
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2.5"0.25
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--'I
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/

18.67
0.200 MAX.

5.08 MAX.

:#it"'" ~,
0.020
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JLO.023

11

0.015

~~"'~~'

Owl. No. A-6402C in

0.5'

0,025 REF.

M'N1H:;~

Owl. No. A-6402C mm

-j

0.64 REF.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-23

15'

- - , 0-

.

5:a.~!...!::=---¥.~-=-....!;'-~~; ~25

0.100 :t0010

PACKAGE INFORMATION (Continued)

'A' PACKAGE: l8-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES
2.2a

~~
--L-~'5.

18 17 1& 15 14 13 12 II

~

456789
1:W:::-.-_,*,0''!i9Iii5_ _-I::!.....!:;r.
r
0.885

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;0"

AM.
0.21

i-~~~nn~~' ~ L
456789W-

""...!=-_-=:23~.2~4;---=-I::!......q
r-

0.200 MAX.

;

2M • 0.25

22.48

NOTE l.

5008 MAX.

¥

SEATING

~

+-t:-:EATING PLANE.

~~~
0.100

PLANE

~1-0'58
~

Owg. ",. A-9649 in

MIN

Owg. flo. A-9649 mm

0.151 MIN.

--.

0.39

--II

1.27
REF.

'A' PACKAGE: 20-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm
0.35
0.21

~L

•.60
6.10

7.37

~

INDEX AREA

1.52 REF.

O[ll~~i9' -,.,c..:::..--~~---=---'-"i
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!S.08 MAX.

~r~~M'
0.020
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mwmw+.

--.J1-0.023
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¥~

Dw,. ",. A-IM30 In

0.51 MIN.

0.100 MIN.

---l1-0.58
1
0.39

+.

2.54 MIN.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-24

Dwg.N'.A-IO.430mm

/

PACKAGE INFORMATION (Continued)

'A' PACKAGE: 22-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

!fL
0.35

0.014
08

or.:-

0410

0·300

0:390

L 1M 'i' ~ ...

INDEX ARE r'

g~~;~

•
0.200 MAX.

MIN.

9-9(

•

9.91

L
AREA~l.~
J:33

---,.. •
/
0

INDEX

-.LJ

15·

~ o·

3 4 5 • 7 8 I 10 ,*.21REE

~:::~

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l¥iEATING PLANE

PLANE

wmmffi:::;=
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5 6 1 8 , 10 lilo.050REF.
1.120
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NOTE 1

O 21

-r-

5.08 MAX.

~SEATING
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Lo.o

0.023

wmmffl+

0."MIN. _11-_

0.100 MIN.

0.015

g:~

2.54 MIN.
Dwg.No.A·lD,536BM4

Owg. No. A-IO,5JIiBIN

'A' PACKAGE: 28-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

0.36
0.20

0.014

,-"'i:::::::::::Lft~
0035

1.460

0.200 MAX.

1.380

~SEATING

-I

0.100:t: 0.010

:u:::::::::::) IL~

INDEX AR~II z ~

~

1.65

/

0.89
5.0BMAX.

NOTE I

4

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7

...

37.08
35.05

,a

II 12 II

-I

'~90REF.

2.":1:0.25
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~EATING PLANE

PLANE

0.020~+
~I ~.~~:

0.51

O.IOOMIN.

mmmwYW+
g:::

-11

2.54 NIN.

Dwg,ffO.A.12,IOlIN

NOTES:
1. lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-25

--,00

/

PACKAGE INFORMATION (Continued)

'B' PACKAGE: 8-Pin Plastic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
(Based on 1 in. = 25.4 mm)

t

0.014

-.

---

tr

'~If:~
8765

0.260

0.065
0.035

I

2 3
I..%.~
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0.310

iJ

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MIN.

3

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1.65
0.89

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7.37. \

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2.54 '0.25
NOTE I

f

5.08 MAX.

~SEATING PLANE

Pl.ANE

YmI

0.020

7.~

6.10

0.200 MAX.

~EATING

TI

---

8765

8~

0"

0.040 REf
0100' 0.010
NOTE I

t

0.35
0.21

0.008

---l1......0.023
-W O.ol 5

0.51

DWG.NO. A-IO.474A IN

0.100
MIN.

MIN.

YmI

2.54 MIN.

DWG.NO. A-IO.474A If1

--ILJ>.58
- l io.39

'B' PACKAGE: 14-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
(Based on 1 in. = 25.4 mm)

DIMENSIONS IN INCHES

L
IF
0.014

0.008

141312111098

~::::II
~.:~

INDEX A

~I

~

2

~

~

3----4 5 6 7 0075 REF.
0.785
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0.735
NOTE 1

15°
o·

--,
/
5.08 MAX.

0.200 MAX.

~~~~

0'020~+
-IIMIN.

0,023
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0.100
MIN.

~~"~~'
0.51 M I N ¥ m W = +

-11-

DWG.NO. A-9B43C IN

°.58
0.39

2.54 MIN.

NOTES:
1. Lead spacing tolerance is non-cu mulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-26

DWG.NO. A-9843C MM

PACKAGE INFORMATION (Continued)

'B' PACKAGE: 16-Pin Plastic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

~g::~~

%Z~~

~~~~~

~

16 15 14 13 12 11 10 9

INDEx:~~:::;a £L-J
-70.065
0.035

~ 2~ 4 5 6 7 8

~:~:

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I

g:~~

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16 15 I. 13 12 11 10 9

,~,~:::~ LL-J
~~:~----p21219~35 ~ ~;:~25

0.100:1: O.QJO
NOTE T

/

18.67

Ur5EATING PLANE
0.200 MAX.

¥-~r.o.'00MIN.
-W Y¥Y¥~ ¥]:
0.020
MIN.

JLo.023

II

0.015

Jl

Dwg. No. A-IO.3118 MM

Owg. No. A-lO , 3llS IN

0.025 REF.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

'0' PACKAGE: 3-Pin Metal TO-S2ITO-206AC
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

0.500
MIN.

12.70
MIN.

~-

~

-I~
0.016

-I~
0.41

"\
4SO·
0.046
0.036

::r~

1.16
0.92

Q048 MEASURED FROM MAX. DIA.
0D28 OF ACTUAL DEVICE
Dwg. No. A·18938 IN

Ilwg.Mo. A-389381t1

NOTE: Lead diameter is controlled in the zone between 0.050" (0.13 mm) and 0.250" (6.35 mm) from the seating plane. Between 0.250"
(6.35 mm) and 0.500" (12.7 mm) from the seating plane, a maximum lead diameter of 0.021" (0.53 mm) is specified. Outside of
these zones the lead diameter is not controlled.

12-27

PACKAGE INFORMATION (Continued)

'H' PACKAGE: 8-Pin Hermetic Dual In-Line
DIMENSIONS IN MILLIMETRES

DIMENSIONS IN INCHES

rr=-----.-

~o
0.220

--L-

I
I

0.528'
MAX

5.59

--L-

~
0.008

11 2 3 4
I- ~0.10OrO.Ol0

INDEX AREA--'
0.070
0.030

~

0.320
1
0.290
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NOTE 1

INDEX AREAJ

2

.L- _ _
___
8.13

7.37

1

3

13.41
MAX

4

I

k

I--++- 2.54< 0.25

0.20

NOTE I

t·08~~I~

o!Q}_lf1fW--L

MIN

--II. 0.023
0.014

11

[[ ----.-

5

I-

1.78
0.76

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0.015

0

Based on 1" = 25.4 mm

~Llf1fW--L

Owg. No. A-10.313A in

~

--I~

0.38

~

0.36

0.125

Owg. No. A-10,31lA mm

3.18

'H' PACKAGE: 14-Pin Hermetic Dual In-Line
DIMENSIONS IN INCHES

14 13 12 11 10 9

14 13 12 11 10 9

8

JE~[~~~J]
II :3 ••
I
~

INDEX

~o

AREA

4

5

L-

NOTE I

INDEX...J

0.015
0.008

AREA

'1.0.023'
0.014

'"1

~
0.125

11

2 __3 4

~

5

rrt-7~
l.1..__ .L-

6 7

H+2.S4±O.25
NOTE 1

D
1'52L~.-L

-II-~:::'

0.76

0.38

Dwg. No. A-97618 in

19.94
MAX

--I~
0.36

~
3.18

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-28

0.38
0.20

'1 r-- ~~~

08 MAX

O.06:-~--L

0.015

8

]I~[~~~J]I

n=t-~~
LL
__

6 7
H+0.100r0.010

0.030 0.785
MAX

t:r~.

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

Owg. No. A-9IGIS mm

PACKAGE INFORMATION (Continued)

'H' PACKAGE: l6-Pin Hermetic Dual In-Line
DIMENSIONS IN INCHES

'-~:::~[~I
I~' -~-' !B-7
·

'f~~~

'~"I~
...I
0.030

a.loota.Ole

DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm

[[~~~_
=4=-*=b

NOTE I

O.OOB

840 MA

~.OO5MIN' LEADS

~

0.060

~I . . ~~~:

O.OI:t

I, 8, 9.

AND 1&

AT

VENDOR'S

OPTION

~~
OWl No A-IO,21DB

In

Owg. No. A-lO.2118 mm

'H' PACKAGE: l8-Pin Hermetic Dual In-Line
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm

DIMENSIONS IN INCHES

JE': [:::J~:I
Ill! _}

INDEX?
AREA
...j

~o

0.030

4 5

0.927
MAX

6 7

8

9

I

f..-++- O.lOOrD.OID
NOTE 1
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,0.200 MAX

r-

~

(:~:O

/

INDEX

0.008

AREA

?__

111
3 4 5
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0.76

23.55

6 7

0' ; ' :

0.023

~

0.014

0.125

r

5.08 MAX

~

[[ 8.13
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8 9

f..-++- 2.54±0.25
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MAX

~~~
'I.
0.015

~':[:::J~:II

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k

0.20

r-

fF-~~
0.38

Owg. No. A-IO,3IlA. in

II. 0.58

-"r-0:36

~
3.18

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-29

Owg. No.lrlO.312A mm

PACKAGE INFORMATION (Continued)

'J' PACKAGE: 14·Pin Hermetic Flat·Pack
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4.mm

DIMENSIONS IN INCHES

t~:=n.~=®
I ~
1I=-:lI=:::I@
1I=-:lI=:::I@
I=~I==@

11=:t1==@)
11::.;11== 0

~(~~~~~~~~=®

, .8:8@ NOTE I

~~----~--r-=========~Jdt~~PjjO'~
~::

===tF=9===='
1-

c:====fr='t-=

0.2BOMAX
NOTE 4

I--

0.010

2.16
0.76

+

-,

--I

~15~p

1-

+

-I
--I

7.11 MAX

I--

Owg. No. A-IO.252B IN

1.02

~,=:=:::.~13·25

===t.=:=!=-==,

NOTE 4

0Wg. No. A-IO.2S2B MM

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Includes off-center lid, meniscus, and glass overrun.
5. All leads weldable and solderable.

'M' PACKAGE: 8·Pin Plastic Dual In·Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

t

0.014
0,008

'-rf::~
,-

8765

0.260

O.06!5
1 2 '3
0,0351......1

4

tr
0.310

iJ

0.040 REF.
0.100'0,010
NOTE 1

%,~

0,200 MAX,

~EATING
M20
MIN.

PLANE

YITrI~
0.100
MIN.

...J L.0,023

li°.o IS

'

rt
0,35
0.21

~~

,-

8765

1RE"""'
'L2 0

t •I

6.60
6.10
lNOEX

oe

1.65
0.89

/

'3

7.87
7.37

~.
. 1

0~1

MIN.

Owg. No. A-58420 IN

LEADS I, 4, 5,

WI 9f

""H:~

ANO 8 AT

VENDOR'S OPTION

2.54 MIN.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12--30

15"

2.54 *0.25
NOTE I

5.0B MAX.
itilSEAT1NG PLANE

LEAOS 1, 4, S,
AND B AT
VENDOR'S OPTION

-,0"
\

-..L...!
102 REF.

Owg.NO. A·58420 toM

PACKAGE INFORMATION (Continued)

'Q' PACKAGE: 16-Pin Plastic Quad In-Line
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm

DIMENSIONS IN INCHES

INDEX AREA

~o.o12
I ~ 000.~.2:,:-,j I

6~.

I 2 3

~O"O

~:j

2

17.20

19.!O MAX.

0.770 MAX
0.232 MAX.

-r.WBm£O'.

r7~'EATING

HSEATING PLANE

PLANE

~12"OMI.'

MIN.

1-1- ~~~~ ~

1~O.021

.~.

•

-16.2, I<-

..,0.24'1<-

MIN.

-.j •. o.~1-1
~~IO.II~

1.'0
MI..

Dwg. No. A-1O,434 in

0.010

II

-H-a.11S

I

I

I

H - 2.54 :!:
NOTE

OWl. No. .1-10.434 mm

0.25
I

'R' PACKAGE: 14-Pin Ceramic Dual In-line
DIMENSIONS IN MILLIMETRES
Based on I" = 25.4 mm

DIMENSIONS IN INCHES

L

0.014
0.008
14.13 12 II 10

9

0.35
0.21

~

8

14131211109B

-.--~

,"".~~~:::~..,~~,;
o 035 _
O.2~O MAX.

0.785
0.735

~SEATlNG

_

7.11
6.10

-*--..
INDEX

0.100 <0.010
NOTE I

5.08 MAX.

--.lL 0.023
I f 0.015

19,93 5

~

~~5~~'25

18.67

15°
- , 00

NOTE I

~EATlNG PLANE

PLANE

0'020~-+
MIN.

A~~~~ ~

7.B7
TI
7.37

0'5IMIN'~-+
--.II-

0.100 MIN.

-I

Owg. No. A-7894B in

0.58
0.39

2.54 MIN.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-31

Ows. No• .l-7894B mm

PACKAGE INFORMATION (Continued)

'R' PACKAGE: l6-Pin Ceramic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

L

~~~~~

~~~

161514131211109

~c:J -:;n
INDEXA;~~/0J21
m
2.54'~
~NOTE
6.10

15·0
0

7.31

3 4 5

O.89-p 1--'9.93
18.67

0.200 MAX.

--I--!~SEATING

1l--

/

5.08 MAX,

PLANE

-4=b-~O"OO
0.020
MIN.

----...

1

.

0.023
0.015

.

-1~

MIN.

0.025 REF.

--I

DWI. No. A-IO,549 in

0.64 REF.

Owg. No. A-IO,549 mm

'R' PACKAGE: l8-Pin Ceramic Dual In-Line
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

0.200 MAX.

SEATING

~

5.08 MAX.

+--t~ATING

PLANE.

0.020

MIN.

...,1---

-, ITh~5FO

PLANE

¥~;::;;:~;:;~~~~~

~~IOO
MIN

J

0." MIN.

-lLo.'.

Dwg. No. A·[O,548 in

--liD.39

-.J

1.27
REF.

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within Ii'mits shown.
3. leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-32

Dwg. No. A·[O,548 mm

PACKAGE INFORMATION (Continued)

'5' PACKAGE: 4-Pin Molded Single In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

J
0.380 I
1I. 0.410

INDEx;g'060~
336
~N 0:296

(PIN NO. 1)

~

:

I

2

0,300 ±O.OlO·
SEATING PLANE

3~~ O.120MIN
0.100 ±O.OIO
~

INDEX

NON-CUMU LATIVE

J

10.4

0

Jl

1

@SEATING

2 3

4
L
,I
3.DMIN

i l-.l-

PlANE~

7.600.3

0.00£.1

6.0

t=;---L-5EATING PLANE

I

0.015

..~
I Its

7:5

~P~

T

2 200 1-t-1

~I
9.71~
--.1

(PIN NO. I)

0:236

n--t-5EATING PLANE

TYP.

1

~O 256

0

0.030

(l

. .005~
I 1-.1

0 085±0

2.500.3
NON-CUMULATIVE

T

Jl

0 4
0.2
•

Dwg. No. A-9002C mm

Dwg. No. A-9002C in

NOTES:
1. Lead spacing tolerance is non-cumulative
2. Exact body and lead configuration at vendor's option withJn limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

'T' PACKAGE: 3-Pin Plastic Single In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

4.52

0.178
"' 0.183

SEATING
PLANE-

Pi·

l*-

i

SEATING
PLANE-

,78

0.500NIN.

52

12.7NIN.

0.022
0.016

0.55
0.41

0.105
0.095

2.66
2.42

iii
I

--,

I

I

I ~.40

0.64REF.~.36
I 2 •

0.025 REF.

T

c

C CI

2.08
1.98

~.No.A-12.1J91N

Owg.NO.A-12,139MM

NOTE: Lead diameter is controlled in the zone between 0.050" (0.13 mm) and 0.250" (6.35 mm) from the seating plane. Between 0.250"
(6.35 mm) and 0.500" (12.7 mm) from the seating plane, a maximum lead diameter of 0.021" (0.53 mm) is specified. Outside of
these zones the lead diameter is not controlled.

12-33

PACKAGE INFORMATION (Continued)

'U' PACKAGE: 3-Pin Plastic Single In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

1

10.,7S+0 .001

~i:~OOO.0.010R

o.t,.

,-

... II.

_

t

5'1,... '~
TYP. I.- 0 I

r- r
I

h

0.178

~~g:'

J

,~~

-+\,+,1
++-,

f

-

1- 1--0.01 6

2.70 MIN.
---0-0.014

!

I--- 1-0.050
1--0.100·
Owg •• jlo,A-i1,901IN

2'

-+ +-+-- I-

t-E-

~I--o.obl

4.12

,. . . t . .\

4.52!g:~~

.0

'\'~O.OI

--.1*'--_ _

!

f

'/J.r...·

2'

L--

,I- ,10-0.0 18

NOTE I

I

f-

-. -. -- ,.,
~
T~~. L i
---1I
I·

,r

,f,

o~ ,

0.500MIN.

f
2'

.162

I--I 4.52+!-o.oo --1~ O.2SR
0 . 13

~
0.46

O.06ltO.OOZ

'. . +, ./

,

,1- ,10-0.46

,- I-- 0.4
2.~

---0-0.36
1-1.27

NOTE: lead diameter is controlled in the zone between 0.050" (0.13 mm) and 0.250" (6.35 mm) from the seating plane. Between 0.250"
(6.35 mm) and 0.500" (12.7 mm) from the seating plane, a maximum lead diameter of 0.021" (0.53 mm) is specified. Outside of
these zones the lead diameter is not controlled.

'w' PACKAGE: 12-Pin Plastic Single In-Line
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES

1

1.40
1.14

~~-------~-?4-~hr4-H

Ii====~~

r 0.570

''Mern=TFi'i=n=r;=n=;n=rrTFi'i=y!1
AREA
INDEX.£

I

l

~============~~.~

Dfo.I [.

--L

~

INDEX

AREA

~=n=rFf'FFi"'TFrFrr;dI,~:
7.37
MIN.

5j67 8 9 10 111112
NOTE l-H
~ 2.54 ± 025

I __

0.080
0.070

0

l

~.
2.03
1.78

Dwg.No. A-ll,13BB r+1

Owg.No. A-ll.138B IN

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-34

PACKAGE INFORMATION (Continued)
'V' PACKAGE: 3-Pin TO-92/T0 - 226AA
DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

DIMENSIONS IN INCHES
0.205

5.20
4.45

'6:i75

135
~
H
MIN.

1
1 ""
0.210

SEATING

PLANE -

0.500 MIN.

0.022

o:oi6

0.105

~

I

o:4i

'-.".
, ,
I Ii

~-1

I

016
I r-0.0.014

0.105

[iiii ....L.----"_~--L

5.33

4:32

12.7 MIN.

0.55

~
III
I

~~~I
J
1

0.165
0,l25

~
2.04 ....L.----"_!!:....---L

0Wg. No. A-IO.852A IN

Dwg. No. A-IO.852A JfII

NOTE: Lead diameter is controlled in the zone between 0.050" (0.13 mm) and 0.250" (6.35 mm) from the seating plane. Between 0.250"
(6.35 mm) and 0.500" (12.7 mm) from the seating plane, a maximum lead diameter of 0.021" (0.53 mm) is specified. Outside of
these zones the lead diameter is not controlled.

'I' PACKAGE: S-Lead TO-220
DIMENSIONS IN INCHES
0.420
0.580

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

k

O·l9O
0.14

--.I

-,

0.055
0.020

0·850

f-~
0.580
0.500'

1

1.. 51
14.2!

+-~

0.115
0.080

14.71
12.70

0.045
0.012

1

I 2 54 Ii1I

0.020
0'154f,:~"/1~

2.92
2.04
1·14

I 254m

5IIO~~~I~
0.51

0.288

8.80

Owl. No. A-IO,460 mm

Owl. No. A-I0,460 in

NOTES:
1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. Leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. Lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-35

PACKAGE INFORMATION (Continued)

'IH' PACKAGE: 5-Lead TO-220
(Horizontal Mount)
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES
Based on 1" = 25.4 mm

~:~~
~
I

4.0S
3.54

I

---..------x----;3~.4"'2

T

2
6.S5 . 54
5.S5

-

+

~~:~~I-

--.I~
0.51

-IT -

~I-----i

0.650
0.560

:::;~

~

i

*
Dwg. No. A-10,462B MM

Dwg. No. A-IO.462B IN

'IV' PACKAGE: 5-Lead TO-220
(Vertical Mount)
DIMENSIONS IN INCHES

DIMENSIONS IN MILLIMETRES

Based on 1"

9::1g~055

1 -mT-I 11 ~

~

o 134-B::B'

.

R

0.0!'

~

0.268

1

i

0.

N

~~

10.045
-.l0.

11
•

l(')

R

3.40J1JJ1~

o.012
1f

~.~

0.34

Dwg. No. A-IO,461B IN

NOTES:
1. lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor's option within limits shown.
3. leads missing from their designated positions shall also be counted when numbering leads.
4. Terminal lead standoffs may be omitted and replaced by body standoffs.
5. lead gauge plane is 0.030" (0.76 mm) max. below seating plane.

12-36

4'S2~
--.J ~:;i

3.56

-mT-- I III

16.51
14.23

~~1b

25.4 mm

4.0S
3.54

~~

0.650
0.560

=

1 1.14

-.14.9
8.6

L·

31

~

Dwg. No. A-1O,461B MM

NOTES

In the construction of the components described, the full
intent· of the specification will be met. The Sprague Electric
Company, however, resetVes the right to make, from time to
time, such departures from the detail specifications as may be
. required to permit lmprovements in the design of its products.
Components made under military approvals will be in accordarice with the approval requirements.
The information included herein is believed to be accurate
and reliable. However, the Sprague Electric Company assumes
no responsibility for its use; nor for any infringements of patents
or other rights of third parties which may result from its use.

SPR~GUE

PRODUCTS

COmp~nY

Distributors' Division of Sprague Etectric Company

North Adams, Massachusetts 01247
Tel. 413/ 664-4481

tND-503 C/EFBF

Printed in U.S. Amer.



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