1985_TI_The_TTL_Data_Book_Vol_2 1985 TI The TTL Data Book Vol 2

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,•.

The TTL
·Data Book

I

Volume 2
1985

Standard TTL, Schottk)!,
Low-P()wer Schottk)! Circuits

."

TEXAS

INSTRUMENI'~~
,

The TTL Data Book

General Information

Functional Index

TTL Devices

Mechanical Data

,I

The TTL Data Book
VolUllle2

TEXAS

INSTRUMENTS

IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes in the
devices or the device specifications identified in this publication
without notice. TI advises its customers to obtain the latest version
of device specifications to verify, before placing orders, that the
information being relied upon by the customer is current.

TI warrants performance. of its semiconductor products, including SNJ
and SMJ devices, to current specifications in accordance with TI's
standard warranty. Testing and other quality control techniques are
utilized to the extent TI deems such testing necessary to support this
warranty. Unless mandated by government requirements, specific
testing of all parameters of each device is not necessarily performed.
In the absence of written agreement to the contrary, TI assumes no
liability for TI applications assistance, customer's product design, or
infringement of patents or copyrights of third parties by or arising from
use of semiconductor devices described herein. Nor does TI warrant
or represent that any license, either express or implied, is granted
under any patent right, copyright, or other intellectual property right
of TI covering or relating to any combination, machine, or process in
which such semiconductor devices might be or are used.
Specifications contained in this data book supersede all data for these
products published by TI in the US before January 1985.

ISBN 0-89512-096-8
.Library of Congress No. 83-51810

Copyright © 1985, Texas Instruments Incorporated

INTRODUCTION
In this volume, Texas Instruments presents pertinent technical information on the industry's broadest families
of TTL integrated circuits.
You'll find complete specifications on the following product types:
o

•

Standard TTL circuits
Series 54174
- Series 54174H
- Series 54L
Schottky TTL circuits
- Schottky-clamped t Series 54LS174LS and 54S174S

This edition is designed for ease of circuit selection with an alphanumerical index as well as a functional index
to all bipolar digital device types available or under development showing the available technologies for each
type (Standard TTL, Schottky and Advanced Schottky, Low-Power Schottky and. Advanced Low-Power
Schottky). Included in the general information section is an explanation of the function tables, parameter
measurement information, and typical characteristics related to the TTL products listed in this volume.
Package dimensions given in. the Mechanical Data section of this book are in metric measurement (and
parenthetically in inches) to simplify board layout for designers involved in metric conversion and new designs.
This volume is one in a series of Digital Bipolar data books available from Texas Instruments. The complete
series is listed below:
o
•
•
o
•
•

The TTL Data Book, Volume 1
- Indexes, Product Guide, General Information
The TTL Data Book, Volume 2
- Standard TTL, Schottky, Low-Power Schottky
The TTL Data Book, Volume 3
- Advanced Low-Power Schottky, Advanced Schottky
TTL Data Book, Volume 3 Supplement
The TTL Data Book, Volume 4
- Bipolar Programmable Logic and Memory
The TTL Data Book, Volume 5
- Bipolar LSI & Special Functions

Complete technical data for any TI semiconductor/component products are available from your nearest TI field
sales office, local authorized TI distributor, or by writing direct to: Marketing Information Services, Texas
Instruments Incorporated, P.O. Box 225012,' MS 308, Dallas, Texas 75265.
We sincerely hope you will find the new TTL Data Book, Volume 2, a meaningful addition to your technical library.

tlntegrated Schottky-Barrier diode-clamped transistor is patented by Texas Instruments. U.S. Patent Number 3.463.975.

v

vi

The TTL Data Book

General Information

Functional Index

TTL Devices

Mechanical Data

1 -1

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ALPHANUMERICAL INDEX

Device Type

SN5400
SN54HOOt
SN54LOOt
SN54LSOO
SN54S00
SN5401
SN54H01 t
SN54LS01
SN5402
SN54L02 t
SN54LS02
SN54S02
SN5403
SN54L03 t
SN54LS03
SN54S03
SN5404
SN54H04 t
SN54L04 t
SN54LS04
SN54S04
SN5405
SN54H05 t
SN54LS05
SN54S05
SN5406
SN5407
SN5408
SN54LS08
SN54S08
SN5409
SN54LS09
SN54S09
SN5410
SN54H10 t
SN54L10 t
SN54LS10
SN54S10
SN54H11 t
SN54LS11
SN54S11
SN5412.
SN54LS12
SN5413
SN54LS13
SN5414
SN54LS14
SN54H15 t
SN54LS15
SN54S15
SN5416
SN5417

SN5420
SN54H20 t
SN54L20 t
SN54LS20
SN54S20
SN54H21 t

Page No.
SN7400 .......................... 3-3
SN74HOO ......................... 3-3
................................. 3-3
SN74LSOO ......... ,. . . . . . . . . . . . . .. 3-3
SN74S00 ......................... 3-3
SN7401 ......................... 3-11
SN74H01 ........................ 3-11
SN74LS01 ....................... 3-11
SN7402 ......................... 3-17
................................ 3-17
SN74LS02 ....................... 3-17
SN74S02 ........................ 3-17
SN7403 ......................... 3-23
3-23
SN74LS03 ....................... 3-23
SN74S03 ........................ 3-23
SN7404 ......................... 3-29
SN74H04 ........................ 3-29
................................ 3-29
SN74LS04 ....................... 3-29
SN74S04 ........................ 3-29
SN7405 ......................... 3-37
SN74H05 ........................ 3-37
SN74LS05 ....................... 3-37
SN74S05 ........................ 3-37
3-43
SN7406
SN7407 ......................... 3-45
SN7408 ......................... 3-47
SN74LS08 ....................... 3-47
SN74S08 ........................ 3-47
SN7409 ......................... 3-52
SN74LS09 ....................... 3-52
SN74S09 ........................ 3-52
SN7410 ......................... 3-57
SN74H10 ........................ 3-57
................................ 3-57
SN74LS10 ....................... 3·57
SN74S10 ........................ 3-57
SN74H11 ........................ 3-65
SN74LS11 ....................... 3-65
SN74S11 ........................ 3-65
SN7412 ......................... 3-70
SN74LS12 ....................... 3-70
SN7413 ......................... 3-75
SN74LS13 ....................... 3-75
SN7414 ......................... 3-85
SN74LS14 ....................... 3-85
SN74H15 ........................ 3-95
SN74LS15 ....................... 3-95
SN74S15 ........................ 3-95
SN7416 ......................... 3-43
SN7417 ......................... 3-45
SN74LS18 ..................... 3-100
SN74LS19 ..................... 3-100
SN7420 ....................... 3-105
SN74H20 ...................... 3-105
3-105
SN74LS20 ..................... 3-105
SN74S20 ...................... 3-105
SN74H21 ...................... 3-112

Device Type

SN54LS21
SN5422
SN54H22 t
SN54LS22
SN54S22
SN5423
SN5425
SN5426
SN54LS26
SN5427
SN54LS27
SN5428
SN54LS28
SN5430
SN54H30 t
SN54L30 t
SN54LS30
SN54S30
SN54LS31
SN5432
SN54LS32
SN54S32
SN5433
SN54LS33
SN5437
SN54LS37
SN54S37
SN5438
SN54LS38
SN54S38
SN5439
SN5440
SN54H40 t
SN54LS40
SN54S40
SN5442A
SN54L42 t
SN54LS42
SN5443A
SN54L43 t
SN5444A
.SN54L44 t
SN5445
SN5446A
SN54L46 t
SN5447A
SN54L47 t
SN54LS47
SN5448
SN54LS48
SN5449
SN54LS49
SN5450
SN54H50 t
SN5451
SN54H51 t
SN54L51 t
SN54LS51
SN54S51

Page No.
SN74LS21
SN7422 .......................
SN74H22 ......................
SN74LS22 .....................
SN74S22 .................. ,...
SN7423 .......................
SN74LS24 ................. ,...
SN7425 ................... ,...
SN7426 ................... ,...
SN74LS26 ................. ,...
SN7427 .......................
SN74LS27 .....................
SN7428 .......................
SN74LS28 .....................
SN7430 .......................
SN74H30 ......................
SN74LS30 .....................
SN74S30 ......................
SN74LS31 .....................
SN7432 .......................
SN74LS32 .....................
SN74S32 ......................
SN7433 .......................
SN74LS33 .....................
SN7437 .......................
SN74LS37 .....................
SN74S37 ......................
SN7438 .... : ..................
SN74LS38 .....................
SN74S38 ......................
SN7439 .......................
SN7440 ........... ;...........
SN74H40 ......................
SN74LS40 .....................
SN74S40 ......................
SN7442A ......................
.......................... ,...
SN74LS42 .....................
SN7443A ......................
SN7444A ......................
SN7445 .......................
SN7446A ......................
SN7447A ......................
..............................
SN74LS47 .....................
SN7448 .......................
SN74LS48 .....................
SN74LS49 .....................
SN7450 .......................
SN74H50 ......................
SN7451 .......................
SN74H51 ......................
SN74LS51 .....................
SN74S51 ......................

3-112
3-117
3-117
3-117
3-117
3-123
3-100
3-123
3-126
3-126
3-130
3-130
3-134
3-134
3-139
3-139
3-139
3-139
3-139
3-147
3-151
3-151
3-151
3-156
3-156
3-161
3-161
3-161
3-167
3-167
3-167
3-172
3-175
3-175
3-175
3-175
3-181
3-181
3-181
3-181
3-181
3-181
3-181
3-190
3-193
3-193
3-193
3-193
3-193
3-193
3-193
3-193
3-193
3-208
3-208
3-213
3-213
3-213
3-213
3-213

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tFor information only, not recommended for new design.

TEXAS

"'J}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

1-3

ALPHANUMERICAL INDEX

Device Type
SN54H52 t
SN5453
SN54H53 t
SN5454
SN54H54t
SN54L54 t
SN54LS54
SN54H55 t
SN54L55 t

G')

m
2
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SN54LS55
SN54LS56
SN54LS57
SN5460
SN54H60 t
SN54H61 t
SN54H62 t
SN54LS63
SN54S64
SN54S65
SN54LS68
SN54LS69
SN5470
SN54H71 t
SN54L71 t
SN5472
SN54H72 t
SN54L72 t
SN5473
SN54H73 t
SN54L73 t

2

SN54LS73A
SN5474
SN54H74t
SN54L74 t
SN54LS74A
SN54S74
SN5475
SN54L75 t
SN54LS75
SN5476
SN54H76 t
SN54LS76A
SN5477
SN54L77 t
SN54LS77
SN54H78 t
SN54L78 t
SN54LS78A
SN5480
SN5482
SN5483A
SN54LS83A
SN5485
SN54L85 t
SN54LS85
SN54S85
SN5486
SN54L86 t
SN54LS86A
SN54S86

Page No.
SN74H52 ......................
SN7453 .......................
SN74H53 ......................
SN7454 .......................
SN74H54 ......................

..............................

SN74LS54 .....................
SN74H55 ......................

..............................

SN74LS55 .....................
SN74LS56 .....................
SN74LS57 .....................
SN7460 .......................
SN74H60 ......................
SN74H61 ......................
SN74H62 ......................
SN74LS63 .....................
SN74S64 ......................
SN74S65 ......................
SN74LS68 .....................
SN74LS69 .....................
SN7470 .......................
SN74H71 ......................

..............................
SN7472 .......................
SN74H72 ......................
..............................
SN7473 .......................
SN74H73 ......................

..............................

SN74LS73A ...................
SN7474 .......................
SN74H74 ......................

...............................

SN74LS74A ...................
SN74S74 ......................
SN7475 .......................

..............................

SN74LS75 .....................
SN7476 .......................
SN74H76 ......................
SN74LS76A ...................

..............................
..............................
..............................
SN74H78 ......................
..............................
SN74LS78A ...................
SN7480 .......................
SN7482 .......................
SN7483A ......................
SN74LS83A ...................
SN7485 .......................
..............................
SN74LS85 .....................
SN74S85 ......................
SN7486 .......................
..............................
SN74LS86A ...................
SN74S86 ......................

3-221
3-224
3-224
3-229
3-229
3-229
3-229
3-237
3-237
3-237
3-242
3-242
3-245
3-245
3-249
3-251
3-254
3-256
3-256
3-261
3-261
3-267
3-271
3-275
3-279
3-279
3-279
3-285
3-285
3-285
3-285
3-295
3-295
3-295
3-295
3-295
3-305
3-305
3-305
3-311
3-311
3-311
3-305
3-305
3-305
3-319
3-319
3-319
3-327
3-330
3-333
3-333
3-339
3-339
3-339
3-339
3-349
3-349
3-349
3-349

Device Type
SN74H87
SN7490A

SN54LS90
SN5491A
SN54L91 t
SN54LS91
SN5492A
SN54LS92
SN5493A
SN54L93 t
SN54LS93
SN5494
SN5495A
SN54L95 t
SN54LS95B
SN5496
SN54L96 t
SN54LS96
SN5497
SN54L98 t
SN54L99 t

SN74LS90
SN7491A ................... ,

SN54100
SN54H101 t
SN54H102 t
SN54H103 t
SN54104
SN54105
SN54H106 t
SN54107
SN54LS107A
SN54H108 t
SN54109
SN54LS109A
SN54110
SN54111
SN54LS112A
SN54S112
SN54LS113A
SN54S113
SN54LS114A
SN54S114
SN54116
SN54120
SN54121
SN54L121 t
SN54122
SN54L122 t
SN54LS122
SN54123
SN54L123 t
SN54LS123
SN54S124
SN54125
SN54LS125A
SN54126
SN54LS126A
SN54128
SN54130
SN54132

tFor information only. not recommended for new design.

1-4

Page No.

......................

SN54H87 t
SN5490A
SN54L90 t

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

......................

..............................

.....................
..

..............................

SN74LS91 . ....................
SN7492A . .....................
SN74LS92 ....................
SN7493A .

.
.....................

..............................

SN74LS93 . ....................
SN7494 . ......................
SN7495A .....................

.

. .............................
SN74LS95B . ..................
SN7496 . ...... .................
...............................
SN74LS9/3 . ....................
SN7497 .......................
. .............................
. .............................
SN74100 . .....................
SN74H101 . ....................
SN74H102 . ....................
SN74H103 . ....................
SN74104 . .....................
SN74105 . .....................
SN74H106 . ....................
SN74107 . .....................
SN74LS107A . .................
SN74H108 .....................
SN74109 . .....................
SN74LS109A . .................
SN74110 . .....................
SN74111 . .....................
SN74LS112A . .................
'

SN74S112 . ....................
SN74LS113A .
SN74S113 . ....................
SN74LS114A . .................
SN74S114 .
SN74116 . .....................
SN74120 . .....................
SN74121 . .....................

.................

....................

. .............................
......................
..............................
SN74LS122 . ...................
SN74122

SN74123

......................

..............................
SN74LS123 . ...................

.....................
.

SN74S124
SN74125 . .....................
SN74LS125A .................
SN74126 . .....................
SN74LS126A . .................
SN74128 . .....................
SN74130 . .....................
SN74132 .....................

.

3-354
3-357
3-357
3-357
3-369
3-369
3-369
3-357
3-357
3-357
3-357
3-357
3-374
3-377
3-377
3-377
3-385
3-385
3-385
3-393
3-400
3-402
3-407
3-410
3-413
3-416
3-419
3-419
3-422
3-425
3-425
3-430
3-433
3-433
3-438
3-441
3-444
3-444
3-449
3-449
3-455
3-455
3-461
3-465
3-471
3-471
3-477
3-477
3-477
3-477
3-477
3-477
3-487
3-493
3-493
3-493
3-493
3-498
3-477
3-501

ALPHANUMERICAL INDEX

Device Type

SN54LS132
SN54S132
SN54S133
SN54S134
SN54S135
SN54136
SN54LS136
SN54LS137
SN54LS138
SN54S138
SN54LS139A
SN54S139
SN54S140

SN54143
SN54144
SN54145
SN54LS145
SN54147
SN54LS147
SN54148
SN54LS148
SN54150
SN54151A
SN54LS151
SN54S151
SN54152A
SN54LS152
SN54153
SN54L153 t
SN54LS153
SN54S153
SN54154
SN54L154 t
SN54155
SN54LS155A
SN54156
SN54LS156
SN54157
SN54L157 t
SN54LS157
SN54S157
SN54LS158
SN54S158
SN54159
SN54160
SN54LS160A
SN54161
SN54LS161A
SN54162
SN54LS162A
SN54S162
SN54163
SN54LS163A
SN54S163
SN54164
SN54L164 t
SN54LS164
SN54165

Page No.
SN74LS132
SN74S132
SN74S133
SN74S134 .....................
SN74S135 .....................
SN74136 ......................
SN74LS136 ....................
SN74LS137 ....................
SN74LS138 ....................
SN74S138 .....................
SN74LS139A ..................
SN74S139 .....................
SN74S140 .....................
SN74141
SN74142
SN74143
SN74144
SN74145
SN74LS145 ....................
SN74147 ......................
SN74LS147 ....................
SN74148 ......................
SN74LS148 ....................
SN74150 ......................
SN74151A ..•..................
SN74LS151 ....................
SN74S151 .....................

SN74153 ......................
..............................
SN74LS153 ....................
SN74S153 .....................
SN74154 ......................
SN74155 ......................
SN74LS155A ..................
SN74156 ......................
SN74LS156 ....................
SN74157 ......................
..............................
SN74LS157 ....................
SN74S157 .:...................
SN74LS158 ....................
SN74S158 .....................
SN74159 ......................
SN74160 ......................
SN74LS160A ..................
SN74161 ......................
SN74LS161A ..................
SN74162 ......................
SN74LS162A ..................
SN74S162 .....................
SN74163 ......................
SN74LS163A ..................
SN74S163 .................. : ..
SN74164 ......................
SN74LS164 ....................
SN74165 ......................

3-501
3-501
3-512
3-515
3-518
3-520
3-520
3-523
3-527
3-527
3-532
3-532
3-536
3-539
3-541
3-545
3-545
3-552
3-552
3-555
3-555
3-555
3-555
3-561
3-561
3-561
3-561
3-561
3-561
3-569
3-569
3-569
3-569
3-577
3-577
3-583
3-583
3-583
3-583
3-589
3-589
3-589
3-589
3-589
3-589
3-596
3-599
3-599
3-599
3-599
3-599
3-599
3-599
3-599
3-599
3-599
3-621
3-621
3-621
3-629·

Device Type

SN54LS165A
SN54166
SN54LS166A
SN54167
SN54S168
SN54LS169B
SN54S169
SN54170
SN54LS170
SN54LS171
SN54173
SN54LS173A
SN54174
SN54LS174
SN54S174
SN54175
SN54LS175
. SN54S175
SN54176
SN54177
SN54178
SN54179
SN54180
SN54181
SN54LS181
SN54S181
SN54182
SN54S182
SN54H183 t
SN54LS183
SN54184
SN54185A
SN54190
SN54LS190
SN54191
SN54LS191
SN54192
SN54L192 t
SN54LS192
SN54193
SN54L193 t
SN54LS193
SN54194
SN54LS194A
SN54S194
SN54195
SN54LS195A
SN54S195
SN54196
SN54LS196
SN54S196
SN54197
SN54LS197
SN54S197
SN54198
SN54199
SN54221
SN54LS221
SN54S226

Page No.
SN74LS165A ..................
SN74166 ......................
SN74LS166A ..................
SN74167 ......................
SN74S168 .....................
SN74LS169B ..................
SN74S169 .....................
SN74170 ......................
SN74LS170......... ............
SN74LS171 ....................
SN74172 ......................
SN74173 ......................
SN74LS173A ..................
SN74174 ......................
SN74LS174 ....................
SN74S174 .....................
SN74175 ......................
SN74LS175 ....................
SN74S175 .....................
SN74176 ......................
SN74177
SN74178
SN74179
SN74180
SN74181
SN74LS181 ....................
SN74S181 .....................
SN74182 ......................
SN74S182 .....................
SN74H183 .....................
SN74LS183 ....................
SN74184 ......................
SN74185A.....................
SN74190 ......................
SN74LS190 ....................
SN74191 ......................
SN74LS191 ....................
SN74192 ......................
..............................
SN74LS192 ....................
SN74193 ......................
SN74LS193 ....................
SN74194 ......................
SN74LS194A ..................
SN74S194 .....................
SN74195 ......................
SN74LS195A ..................
SN74S195 .....................
SN74196 ......................
SN74LS196 ....................
SN74S196 .....................
SN74197 ......................
SN74LS197 ....................
SN74S197 .....................
SN74198
SN74199 ......................
SN74221 ......................
SN74LS221 ....................
SN74S226 .....................

3-629
3-637
3-637
3-645
3-651
3-651
3-651
3-665
3-665
3-675
3-679
3-685
3-685
3-689
3-689
3-689
3-689
3-689
3-689
3-695
3-695
3-701
3-701
3-705
3-709
3-709
3-709
3-721
3-721
3-727
3-727
3-731
3-731
3-741
3-741
3-741
3-741
3-755
3-755
3-755
3-755
3-755
3-755
3-769
3-769
3-769
3-779
3-779
3-779
3-787
3-787
3-787
3-787
3-787
3-787
3-795
3-795
3-805
3-805
3-813

II
2:

o

i=


r2:
"T1

0

:J:J

S

l>

:::!

0

2:

1-6

SN54LS240
SN54S240
SN54LS241
SN54S241
SN54LS242
SN54LS243
SN54LS244
SN54S244
SN54LS245
SN54246
SN54247
SN54LS247
SN54248
SN54LS248
SN54249
SN54LS249
SN54251
SN54LS251
SN54S251
SN54LS253
SN54S253
SN54LS257B
SN54S257
SN54LS258B
SN54S258
SN54259
SN54LS259B
SN54S260
SN54LS261
SN54265
SN54LS266
SN54S268
SN54273
SN54LS273
SN54276
SN54278
SN54279
SN54LS279A
SN54LS280
SN54S280
SN54S281
SN54283
SN54LS283
SN54S283
SN54284
SN54285
SN54290
SN54LS290
SN54LS292
SN54293
SN54LS293
SN54LS294
SN54LS295B
SN54LS297
SN54298
SN54LS298
SN54LS299
SN54S299
SN54LS320
SN54LS321

Page No.
SN74LS240 ....................
SN74S240 .....................
SN74LS241 ....................
SN74S241 .....................
SN74LS242 ....................
SN74LS243 ....................
SN74LS244 ....................
SN74S244 " " " " " " " " " " " " " " " " " " ~ " ,
SN74LS245 ....................
SN74246 ......................
SN74247 ......................
SN74LS247 ....................
SN74248 ......................
SN74LS248 ....................
SN74249 ......................
SN74LS249 ....................
SN74251 ......................
SN74LS251 ....................
SN74S251 .....................
SN74LS253 ....................
SN74S253 .....................
SN74LS257B ..................
SN74S257 .....................
SN74LS258B ..................
SN74S258 .....................
SN74259 ......................
SN74LS259B ..................
SN74S260 .....................
SN74LS261 ....................
SN74265 ......................
SN74LS266 ....................
SN74S268 ......................
SN74273 ......................
SN74LS273 ....................
SN74276 ......................
SN74278 ......................
SN74279 ......................
SN74LS279A ..................
SN74LS280 ....................
SN74S280 .....................
SN74S281 .....................
SN74283 ......................
SN74LS283 ....................
SN74S283 .....................
SN74284 ......................
SN74285 ......................
SN74290 ......................
SN74LS290 ....................
SN74LS292 ....................
SN74293 ......................
SN74LS293 ....................
SN74LS294 ....................
SN74LS295B ..................
SN74LS297 ....................
SN74298 ......................
SN74LS298 ....................
SN74LS299 ....................
SN74S299 .....................
SN74LS320 ....................
SN74LS321 ....................

3-817
3-817
3-817
3-817
3-823
3-823
3-817
3-817
3-826
3-829
3-829
3-829
3-829
3-829
3-829
3-829
3-843
3-843
3-843 .
3-851
3-851
3-857
3-857
3-857
3-857
3-863
3-863
3-867
3-871
3-878
3-883
3-885
3-888
3-888
3-892
3-895
3-899
3-899
3-903
3-903
3-909
3-917
3-917
3-917
3-922
3-922
3-927
3-927
3-933
3-927
3-927
3-933
3-940
3-945
3-951
3-951
3-957
3-957
3-963
3-963

Device Type
SN54LS322A
SN54LS323
SN54LS347
SN54LS348
SN54S350
SN54LS352
SN54LS353
SN54LS354
SN54LS355
SN54LS356
SN54LS357
SN54365A
SN54LS365A
SN54366A
SN54LS366A
SN54367A
SN54LS367A
SN54368A
SN54LS368A
SN54LS373
SN54S373
SN54LS374
SN54S374
SN54LS375
SN54376
SN54LS377
SN54LS378
SN54LS379
SN54LS381A
SN54S381
SN54LS382
SN54LS384
SN54LS385
SN54LS386A
SN54390
SN54LS390
SN54393
SN54LS393
SN54LS395A
SN54LS396
SN54LS398
SN54LS399
SN54S412
SN54LS422
SN54LS423
SN54425
SN54426
SN54S436
SN54S437
SN54LS440
SN54LS441
SN54LS442
SN54LS443
SN54LS444
SN54LS445
SN54LS446
SN54LS447
SN54LS448
SN54LS449

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

Page No.
SN74LS322A ...................
SN74LS323 ....................
SN74LS347 ....................
SN74LS348 ....................
SN74S350 .....................
SN74351 ......................
SN74LS352 ....................
SN74LS353 ....................
SN74LS354 ...................
SN74LS355 ...................
SN74LS356 . ..................
SN74LS357 ...................
SN74365A ....................
SN74LS365A .................
SN74366A . ...................
SN74LS366A .................
SN74367A ....................
SN74LS367A . ................
SN74368A ....................
SN74LS368A .................
SN74LS373 . ..................
SN74S373 . ...................
SN74LS374 ...................
SN74S374 . ...................
SN74LS375 ...................
SN74376 . ....................
SN74LS377 . ..................
SN74LS378 . ..................
SN74LS379 . ..................
SN74LS381A . ................
SN74S381 ....................
SN74LS382 . ..................
SN74LS384 . ..................
SN74LS385 . ..................
SN74LS386A . ................
SN74390 . ....................
SN74LS390 . ..................
SN74393 . .....................
SN74LS393 . ..................
SN74LS395A . ................
SN74LS396 . ..................
SN74LS398 . ..................
SN74LS399 ...................
SN74S412 ....................
SN74LS422 ...................
SN74LS423 ...................
SN74425 . ....................
SN74426 .....................
SN74S436 ....................
SN74S437 ....................
SN74LS440 ...................
SN74LS441 ...................
SN74LS442 ...................
SN74LS443 ...................
SN74LS444 ...................
SN74LS445 ...................
SN74LS446 ...................
SN74LS447 ...................
SN74LS448 ...................
SN74LS449 ...................

3-969
3-974
3-977
3-980
3-985
3-991
3-995
3-998
3-1001
3-1001
3-1001
3-1001
3-1011
3-1011
3-1011
3-1011
3-1011
3-1011
3-1011
3-1011
3-1021
3-1021
3-1021
3-1021
3-1029
3-1031
3-1033
3-1033
3-1033
3-1037
3-1037
3-1037
3-1045
3-1050
3-1053
3-1055
3-1055
3-1055
3-1055
3-1065
3-1069
3-1073
3-1073
3-1077
3-1083
3-1083
3-1089
3-1089
3-1093
3-1093
3-1097
3-1097
3-1097
3-1097
3-1097
3-1103
3-1105
3-1109
3-1097
3-1105

ALPHANUMERICAL INDEX

Device Type
SN54LS465
SN54LS466
SN54LS467
SN54LS468
SN54490
SN54LS490
SN54LS540
SN54LS541
SN54LS589
SN54LS590
SN54LS591
SN54LS592
SN54LS593
SN54LS594
SN54LS595
SN54LS596
SN54LS597
SN54LS598
SN54LS599

SN54LS604
SN54LS605
SN54LS606
SN54LS607
SN54LS608
SN54LS610
SN54LS611
SN54LS612
SN54LS613
SN54LS620
SN54LS621
SN54LS622
SN54LS623
SN54LS624
SN54LS625
SN54LS626
SN54LS627
SN54LS628
SN54LS629
SN54LS630

Page No.

...................

SN74LS465
SN74LS466 ...................
SN74LS467 ...................
SN74LS468 ...................
SN74490 .....................
SN74LS490 ...................
SN74LS540 ...................
SN74LS541 ...................
SN74LS589
SN74LS590 ....................
SN74LS591 ...................
SN74LS592 ...................
SN74LS593 ....................
SN74LS594 •...............•..
SN74LS595 ...................
SN74LS596
SN74LS597 ...................
SN74LS598 ...................
SN74LS599 ...................
SN74LS600A .................
SN74LS601A .................
SN74LS602A .................
SN74LS603A .................
SN74LS604 ...................
SN74LS605 ...................
SN74LS606 ...................
SN74LS607 ...................
SN74LS608 ...................
SN74LS610 ...................
SN74LS611
SN74LS612 ...................
SN74LS613
SN74LS620 ...................
SN74LS621
; ................
SN74LS622 ...................
SN74LS623 ...................
SN74LS624 ...................
SN74LS625 ...................
SN74LS626 ...................
SN74LS627 ...................
SN74LS628
SN74LS629 ...................
SN74LS630 ...................

...................

...................

...................
...................

..

...................

3-1113
3-1113
3-1113
3-1113
3-1117
3-1117
3-1127
3-1127
3-1131
3-1137
3-1137
3-1141
3-1i41
3-1149
3-1153
3-1153
3-1159
3-1159
3-1149
3-1167
3-1167
3-1167
3-1167
3-1175
3-1175
3-1175
3-1175
3-1181
3-1187
3-1187
3-1187
3-1187
3-1197
3-1197
3-1197
3-1197
3-1203
3-1203
3-1203
3-1203
3-1203
3-1203
3-1213

Device Type
SN54LS631
SN54LS636
SN54LS637
SN54LS638
SN54LS639
SN54LS640
SN54LS641
SN54LS642
SN54LS643
SN54LS644
SN54LS645
SN54LS646
SN54LS647
SN54LS648
SN54LS649
SN54LS651
SN54LS652
SN54LS653
SN54LS654
SN54LS668
SN54LS669
SN54LS670
SN54LS671
SN54LS672
SN54LS673
SN54LS674
SN54LS681
SN54LS682
SN54LS683
SN54LS684
SN54LS685
SN54LS686
SN54LS687
SN54LS688
SN54LS689
SN54LS690
SN54LS691
SN54LS692
SN54LS693
SN54LS696
SN54LS697
SN54LS698
SN54LS699

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

Page No.
SN74LS631
SN74LS636
SN74LS637
SN74LS638
SN74LS639
SN74LS640
SN74LS641
SN74LS642
SN74LS643
SN74LS644
SN74LS645
SN74LS646
SN74LS647
SN74LS648
SN74LS649
SN74LS651
SN74LS652
SN74LS653
SN74LS654
SN74LS668
SN74LS669
SN74LS670
SN74LS671
SN74LS672
SN74LS673
SN74LS674
SN74LS681
SN74LS682
SN74LS683
SN74LS684
SN74LS685
SN74LS686
SN74LS687
SN74LS688
SN74LS689
SN74LS690
SN74LS691
SN74LS692
SN74LS693
SN74LS696
SN74LS697
SN74LS698
SN74LS699

. ..................
...................
. ..................
. ..................
. ..................
. ..................
. ..................
...................
. ..................
...................
. ..................
...................
...................
...................
...................
...................
...................
...................
...................
. ..................
...................
...................
. ..................

...................
...................
...................
...................
...................
...................
. ..................
...................
...................
...................
. ..................
...................
. ..................
...................
...................
...................
. ..................
...................
...................
...................

3-1213
3-1221
3-1221
3-1229
3-1229
3-1233
3-1233
3-1233
3-1233
3-1233
3-1233
3-1241
3-1241
3-1241
3-1241
3-1251
3-1251
3-1251
3-1251
3-1259
3-1259
3-1269
3-1277
3-1277
3-1283
3-1283
3-1289
3-1295
3-1295
3-1295
-3-1295
3-1295
3-1295
3-1295
3-1295
3-1303
3-1303
3-1303
3-1303
3-1315
3-1315
3-1315
3-1315

Z

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2

1-8

GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS
INTRODUCTION
These symbols, terms, and definitions are in accordance with those currently agreed upon by the JEDEC Council of the
Electronic Industries Association (EIA) for use in the USA and by the International Electrotechnical Commission (lEC)
for international use.

PART I - OPERATING CONDITIONS AND CHARACTERISTICS (IN SEQUENCE BY LETTER SYMBOLS)
f max

Maximum clock frequency
The highest rate at which the clock input of a bistable circuit can be driven through its required sequence
while maintaining stable transitions of logic level at the output with input conditions established that should
cause changes of output logic level in accordance with the specification.

ICC

Supply current
The current into* the VCC supply terminal of an integrated circuit.

ICCH

Supply current, outputs high
The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the
outputs are at the high level.

ICCl

Supply current, outputs low
The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the
outputs are at the low level.
High-level input current
The current into* an input when a high-level voltage is applied to that input.

z

o

j::


r-

low-level input voltage
An input voltage level within the less positive (more negative) of the two ranges of values used to represent
the binary variables.
NOTE: A maximum is specified that is the most-positive value of low-level input voltage for which operation
of the logic element within specification limits is guaranteed.

2:

."

o

:a
S
l>

::!

VOH

High-level output voltage
The voltage at an output terminal with input conditions applied that, according to the product specification,
will establish a high level at the output.

Val

low-level output voltage
The voltage at an output terminal with input conditions applied that, according to the product specification,
will establish a low level at the output.

ta ,

Access time
The time interval between the application of a specific input pulse and the availability of valid signals at an
output.

tdis

Disable time (of a three-state output)
The time interval between the specified reference points on the input and output voltage waveforms, with the
three-state output changing from either of the defined active levels (high or low) to a high-impedance (off)
state. (tdis = tpHZ or tPLZ).

ten

Enable time (of a three-state output)
The time interval between the specified reference points on the input and output voltage waveforms, with the
three-state output changing from a high-impedance (off) state to either of the defined active levels (high or
low). (ten = tpZH or tpzU.

o

2:

* Current out of a terminal is given as a negative value.

1-10

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS
th

Hold time
The time interval during which a signal is retained at a specified input terminal after an active transition occurs
at another specified input terminal.
The hold time is the actual time interval between two signal events and is determined by the
NOTES: 1.
system in which the digital circuit operates. A minimum value is specified that is the shortest
interval for which correct operation of the digital circuit is guaranteed.
2.

The hold time may have a negative value in which case the minimum limit defines the longest
interval (between the release of the signal and the active transition) for which correct operation
of the digital circuit is guaranteed.

Propagation delay time
The time between the specified reference points on the input and output voltage waveforms with the output
changing from one defined level (high or low) to the other defined level. (ted = tpHL or tPLH).
Propagation delay time, high-to-Iow-Ievel output
The time between the specified reference points Of') the input and output voltage waveforms with the output
changing from the defined high level to the defined low level.
Disable time (of a three-state outputl from high level
The time interval between the specified reference points on the input and output voltage waveforms with the
three-state output changing from the defined high level to a high-impedance (off) state.
Propagation delay time, low-to-high-Ievel output
The time between the specified reference points on the input and output voltage waveforms with the output
changing from the defined low level to the defined high level.
Disable time (of a three-state outputl from low level
The time interval between the specified reference points on the input and output voltage waveforms with the
three-state output changing from the defined low level to a high-impedance (off) state.
tpZH

Enable time (of a three-state outputl to high level
The time interval between the specified reference points on the input and output voltage waveforms with the
three-state output changing from a high-impedance (off) state to the defined high level.

tpZL

Enable time (of a three-state output) to low level
The time interval between the specified reference points on the input and output voltage waveforms with the
three-state output changing from a high-impedance (off) state to the defined low level.

tsr

Sense recovery time
The time interval needed to switch a memory from a write mode to a read mode and to obtain valid data
signals at the output.

tsu

Setup time
The time interval between the application of a signal at a specified input terminal and a subsequent active
transition at another specified input terminal.
NOTES: 1.
The setup time is the actual time interval between two signal events and is determined by the
system in which the digital circuit operates. A minimum value is specified that is the shortest
interval for which correct operation of the digital circuit is guaranteed.
2.

tw

2

o

i=
2
a:


r-

A concept whereby a complete subsystem or system function is fabricated as a single microcircuit. The subsystem or
system is smaller than for LSI, but whether digital or linear, is considered to be one that contains 12 or more equivalent
gates or circuitry of similar complexity.

2

"T1

o

:c

Small-Scale Integration, SSI

3:

Integrated circuits of less complexity than medium-scale integration (MSI).

l>

::!

o

Very-Large-Scale Integration, VLSI

2

The description of any IC technology that is much more complex than large-scale integration (LSI), and involves a much
higher equivalent gate count. At this time an exact definition including a minimum gate count has not been
standardized by JEDEC or the IEEE.

1-12

"-!}

, TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

EXPLANATION OF FUNCTION TABLES

The following symbols are used in function tables on TI data sheets:
(ste~dy

H

high level

L

low level (steady state)

state)

t

transition from low to high level

-l-

transition from high to low level
value/level or resulting value/level is routed to indicated destination
value/level is re·entered

x

irrelevant (any input, including transitions)

z

off (high·impedance) state of a 3-state-output

a .. h

the level of steady-state inputs at inputs A through H respectively

00

level of 0 before the indicated steady-state input conditions were established

00

complement of 00 or level of

On

JL
LJ
TOGGLE

n before the indicated steady·state input conditions were established

level of 0 before the most recent active transition indicated by -l- or t

2

o
i=

«
~

a:

oLL
2
...J

«
a:
w
w

one high-level pulse

2

one low-level pulse
each output changes to the complement of its previous level on each active transition indicated by
-l- or t.

"

If, in the input columns, a row contains only the symbols H, L, and/or X, this means the indicated output is valid whenever the input configuration is achieved and regardless of the sequence in which it is. achieved. The output persists so
long as the input configuration is maintained.
.
If, in the input columns, a row contains H, L, and/or X together with t and/or -l-. this means the output is valid whenever the input configuration is achieved but the transition(s) must occur following the achievement of the steady-state
levels. If the output is shown as a level (H, L, 00, or 00), it persists so long as the steady-state input levels and the
levels that terminate indicated transitions are maintained. Unless otherwise indicated, input transitions in the opposite
direction to those shown have no effect at the output. (If the output is shown as a pulse,rL or LJ, the pulse
follows the indicated input transition and persists for an interval dependent on the circuit.)

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

1-13

EXPLANATION OF FUNCTION TABLES

Among the most complex function tables in this book are those of the shift registers. These embody most of the
symbols used in any of the function tables, plus more. Selow is the function table of a 4-bit bidirectional universal
shift register, e.g., type SN74194.

FUNCTION TABLE

II

OUTPUTS

INPUTS
CLEAR

I MODE
Sl
SO

CLOCK

PARALLEL

SERIAL
A

B

C

D

QB

Qc

QD

L

X

X

X

X

X

X

X

X

X

L

L

L

L

G')

H

X

X

L

X

X

X

X

X

X

QAO

QBO

m

H

H

H

X

a

b

c

d

a

b

H

L

H

X

H

X

X

X

X

H

QAn

QBn

QCn

m

H

L

H

t
t
t

X

:2

X

L

X

X

X

X

L

QAn

QBn

:D

H

H

L

t

H

X

X

X

X

X

QBn

QCn

OOn

QCn
H

r-

H

H

L

t

L

X

X

X

X

X

O'Bn

°Cn OOn

H

L

L

X

X

X

X

X

X

X

OAO °BO

:r>

LEFT RIGHT

QA

QCO QOO
c
d

L

OCO °DO

:2

"T1
o

:D
~

:r>
::::!

o

:2

The first line of the table represents a synchronous clearing of the register and says that if clear is low, all four outputs
will be reset low regardless of the other inputs. In the following lines, clear is inactive (high) and so has no effect.
The second line shows that so long as the clock input remains low (while clear is high). no other input has any effect

' and the outputs maintain the levels they assumed before the steady-state combination of clear high and clock low was

established. Since on other lines of the table only the rising transition of the clock is shown to be active, the second line
implicitly shows that no further change in the outputs will occur while the clock remains high or on the high-to-Iow
transition of the clock.
The third line of the table represents synchronous parallel loading of the register and says that if Sl and SO are both
high then, without regard to the serial input, the data entered at A will be at output OA, data entered at S will be at
OS, and so forth, following a low-to-high clock transition.
The fourth and fifth lines represent the loading of high- and low-level data, respectively, from the shift-right serial input
and the shifting of previously entered data one bit; data previously at OA is now at OS, the previous levels of Os and
Oc are now at Oc and OD respectively, and the data previously at OD is no longer in the register: This entry of serial
data and shift takes place on the low-to-high transition of the clock when Sl is low and SO is high and the levels at
inputs A through D have no effect.
The sixth and seventh lines represent the loading of high· and low-level data, respectively, from the shift·left serial input
and the shifting of previously entered data one bit; data previously at Os is now at OA, the previous levels of Oc and
0D are now at Os and OC, respectively, and the data previously at OA is no longer in the register. This entry of serial
data and shift takes place on the low-to-high transition of the clock when Sl is high and SO is low and the levels at
inputs A through D have no effect.
The last line shows that as long as both mode inputs are low, no other input has any effect and, as in the second line,
the outputs maintain the levels they assumed before the steady-state combination of clear high and both mode inputs
low was established.

1-14

'TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

SERIES 54/74, 54H/74H, 54L, 54LS/74LS, 54S/74S
TRANSISTOR·TRANSISTOR LOGIC

PARAMETER MEASUREMENT INFORMATION

Vee
INPUT{
CONDITIONS
(See Test Table
and Notel

TEST TABLE

OPEN·
COLLECTOR
OUTPUTS

IOH
FUNCTION

4--(+)

VOH

TOTEM·POLE
OUTPUTS

NAND

INPUT CONDITIONS
Input under test at VIL max, all others at 4.5 V

AND

All inputs at VIH min

NOR

All inputs at VIL max

OR

Input under test at VIH min, all others at GND

AND·OR

Inputs under test (a set including one input of

INVERT

each AND gate) at VIL max, all others at 4.5 V
All inputs of AND gate under test

AND·OR

at VIH min, all others at GND

z
o
t=

«

NOTE: For functions having three·state outputs, input conditions
are maintained which will cause the outputs to be enabled
(Iow·impedance) .

:E
a:

oLL.
Vee

TEST TABLE
FUNCTION
IOL

INPUT {
CONDITIONS
(See Test Table
and Notel

NAND

+-(+)

All inputs at VIH min

AND

Input under test at VIL max, all others at 4.5 V

NOR

Input under test at VIH min, others at GND

OR

All inputs at VIL max
All inputs of AND gate under test

AND·OR·
INVERT
NOTE: For functions having three· state outputs, input conditions
are maintained which will cause the outputs to be enabled
(low-impedance).

INPUT CONDITIONS

at VIH min, all others at GND

-Z

..J

«
a:
w

zw

CJ

Inputs under test (a set including one input of

AND·OR

each AND gate) at VIH min, all others at 4.5 V

FIGURE 2. VIH. VIL. VOL

Vee

liar IIH

(+1---.

VI--....;..----f

Tl

REMAINING{
INPUTS
OPEN

NOTE: Each input is tested separately.

FIGURE 3. VI

OUTPUT(S)
OPEN

REMAINING
INPUTS
(See Note BI

NOTES:

OUTPUT(S)
OPEN

A. Each input is tested separately.
B. When testing AND-OR-INVERT or AND-OR gates,
each AND gate is tested separately with inputs of AND
gates not under test open when testing II and
grounded when testing IIH'

FIGURE 4. II. IIH

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

1-15

SERIES 54/74, .54H/.74H, 54L, 54LS/74LS, 54S/74S
TRANSISTOR·TRANSISTOR LOGIC

PARAMETER MEASUREMENT .INFORMATION

REMAINING
INPUTS

III

OUTPUT(S)
OPEN

IlL
4-(-)

NOTES: A. Each input is tested separately.
B. When testing AND-DR-INVERT or AND-OR gates. each AND
gate is tested separately with input of AND gates not under test
open.

VI------------~

G)

=

m

FIGURE 5. IlL

:2:
m

:xl

TEST TABLE

l>

r-

Vce

2
."

FUNCTION

INPUT CONDITIONS

NAND

All inputs at GND

AND

All inputs at 4.5 V

o

:xl

1-1

3:

~IOS

l>
-I

o
:2:

All inputs at GND

OR

All inputs at 4.5 V

AND-DR-INVERT

All inputs at GND

AND-OR

All inputs at 4.5 V

NOTE: For functions having three-state
outputs. input conditions are maintained which will cause the outputs
to be enabled (low-impedance).

=

=

NOR

FIGURE 6. lOS. 10
TEST TABLE
(+)

Vee

FUNCTION

lee~
INPUT{
CONDITIONS
(See Test Table
and Note)

OUTPUT(S)
OPEN

INPUT CONDITIONS FOR ICCl

All inputs at GND

All inputs at 4.5 V

AND

All inputs at 4.5 V

All inputs at GND

NOR

All inputs at GND
One input at 4.5 V

OR

all others at GND

AND-DR-INVERT
AND-OR

=

INPUT CONDITIONS FOR ICCH

NAND

All inputs at GND
All inputs of one AND gate
at 4.5 V. all others at GND

One input at 4.5 V.
all others at GND
All inputs at GND
All inputs of one AND gate
at 4.5 V. all others at GND
All inputs at GND

NOTE: ICC is measured simultaneously for all functions in a package. The average-per-gate values are calculated
from the appropriate one of the following equations.:
total ICC. 'CCH. or ICCl
ICC. 'CCH. or ICCl (average per gate or flip-flop)

ICC (average per gate. 50% duty cycle)

(number of gates or flip-flops in package)
ICCH + ICCl

2 (number of gates in package)

FIGURE 7. ICC

1-16

TEXAS

-1!1

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

SERIES 54/74, 54H/74H, 54L, 54LS/74LS, 54S/74S
TRANSISTOR·TRANSISTOR LOGIC
PARAMETER MEASUREMENT INFORMATION

VT+ -----L_~

VT------4

-1

z

o

FIGURE 8. VT +. IT +. VOL
(FOR NAND SCHMITT TRIGGERS)

FIGURE 9. VT -. IT -. VOH
(FOR NAND SCHMITT TRIGGERS)

i=

«
2

a:

Vcc
OPEN

IOL

02

+--(+1

NOTES: A. Switches are in position 1 for SN54'/SN74', position
2 for SN54H'/SN74H'.
B. The IX limit for SN54' and SN74' circuits may be
verified by an alternate equivalent procedure. The VXX
source is replaced by a resistor (see table below) in
parallel with a voltmeter between the X and X pins.
If the measured voltage, VXX., is less than 0.4, the
specified limit for IX is met.

RESISTANCE VALUE TABLE
SN5423

ou..
Z

..I

«
a:
w
w

z

~

114 [}

SN5450, SN5453

138 [}

SN7423

105 [}

SN7450, SN7453

130 [}

FIGURE 10. IX (FOR EXPANDABLE GATES)

Vcc

Vcc
IOL

IOH

~(+I

H-+

(-I

~IX
VBE (01

*

.. 27 kn
(Adjust

FIGURE 11. VBE(Q) (FOR EXPANDABLE GATES)

Ixi

IT

FIGURE 12. VOH (FOR EXPANDABLE GATES)

TEXAS . .
INSTRUMENlS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

1-17

SERIES 54/74, 54H/74H, 54L, 54LS/74LS, 54S/74S
TRANSISTOR· TRANSISTOR LOGIC

PARAMETER MEASUREMENT INFORMATION
Vee

Vee

4.SV

IOH

IOl

~(+)

H-+

G')

m
2:
m

Vx -4----(-_..J)

:IJ

»
r-

Vx

IX

IX

FIGURE 13. VOH (FOR EXPANDABLE GATES)

2

4--(_)

-n

FIGURE 14. VOL (FOR EXPANDABLE GATES)
IX

IX

o:IJ

~(+)

s:

»
-I

~(+)

vee

Vx

VIH
Vx

o2:

VIl

FIGURE 15. ON-STATE CHARACTERISTICS
FOR EXPANDERS

RX

FIGURE 16. OFF-STATE CHARACTERISTICS
FOR EXPANDERS -

Vee

Vee
IX
+-(+)
~---Vx

VIl

-.1
FIGURE 17. ON-STATE CHARACTERISTICS
FOR EXPANDERS

(See Notes {
2 and 3)

IO(off)

4 - (+)
(-)--+

NOTES:

(See Note 2)
(See Note 3)

Va
To VIH or VIl {
(See Note 1)

FIGURE 18. OFF-STATE CHARACTERISTICS
FOR EXPANDERS

1. Input conditions are maintained which will ensure that
the three-state output(s) is (are) disabled to the highimpedance state. See function table or logic for the
particular device.
2. When testing for current into the output with a high-level
output voltage, input conditions are applied that would
cause the output to be low if it were enabled.
3. When testing for current out of the output with a lowlevel output voltage, input conditions are applied that
would cause the output to be high if it were enabled.

FIGURE 19. 10(off) (THREE-STATE OUTPUTS)

1-18

-I./}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

SERIES 54/74, 54H/74H, 54S/74S, AND SPECIFIEDt SERIES 54L DEVICES

PARAMETER MEASUREMENT INFORMATION
TEST
POINT

TEST
POINT

Vee

Vee

FROM OUTPUT
UNDER TEST

FROM OUTPUT
UNDER TEST

FROM OUTPUT
UNDER TEST

TEST
POINT

1

(See Note BI

eL
(See Note A)

2

o

eL

''''N'~AII

i=
~

~

a::

LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
NOTES:

oLL

LOAD CIRCUIT FOR
THREE-STATE OUTPUTS

LOAD CIRCUIT FOR
OPEN-COLLECTOR OUTPUTS

2
..J
~

A. CL includes probe and jig capacitance.
B. All diodes are 1 N3064 or equivalent.

f!+-~5~

TIMING
INPUT

a::

3V
_ _ _ _ OV

HIGH·LEVEL
PULSE

--.J: ..

~

LOW·LEVEL
PULSE

1.5 V

.

OV

VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES

\

---"
IN·PHASE
OUTPUT

I
I

/1

.

1.5V

tpHL~

eONTRO~

II

VOH

I

VOL

WAVEFORM 1 I
(See Note el
I

~;-.5-:

~

(Low-level

V

enabling)

Tl.5 V

(Sea Note FI

VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES

VOL

WAVEFORM 2
(See Note el

---I.~~V_ _ _ _ _ OV

I4--tPZL--+t

+__

"'4.5 V

1.5 V

~tpLZ
I
I
Sl and
I
I
S2 closed
I
I
"1.5 V

I
I

I
14-- tpZH--~
I

rVOH

1.5 V

3V

1\) '-.1.5
V
_ _ _ _ _ __

°

~tpLH

1
\

CJ

\1.5 V t · ! 1 . 5 V

OUTPUT:--\.

1'-'- - - -

I·

I

~~~~/HASE

1.5 V

~tPHL

tPLHH

2:

VOLTAGE WAVEFORMS
PULSE WIDTHS
-3V

.Ll .5 V

INPUT

"L.:...

v

w

:+---3V

1.5 V

J

i't---tw~

tS8tup~thOld
DATA
INPUT

w
w

~1.5V

Sl open,
'S2 closed

I- i~--- VOL

tPHZ-I4---+!
I

I

I

_______.__ - .. °V
1.5V

0.5 V

V
:£.0.5
--

"l

VOH

"'1.5 V
Sl and
S2 closed

VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS

NOTES: C .. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
E. All input pulses are supplied by generators having the following characteristics: PRR s 1 MHz, Zout '" 50 nand:
For Series 54174 and 54H174H, tr s 7 ns, tf S 7 ns;
.
For Specified t Series·54L174L devices: tr S 10 ns, tf S 10 ns;
For Series 54S174S, tr S 2.5 ns, tf S 2.5 ns.
F. When measuring propagation delay times of 3-state outputs, switches S1 and S2 are closed.
G. The outputs are measured one at a time with one input transition per measurement.
t'L42, 'L43, 'L44, 'L46, 'L47, 'L75, 'L77, 'L96, 'L121, 'L122, 'L 123, 'L 153, 'L154, 'L157, 'L164

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

1-19

SERIES 54LS/74LS AND MOSTt SERIES 54L DEVICES

PARAMETER MEASUREMENT INFORMATION
TEST
POINT
TEST
POINT

Vcc

VCC

RL

-----.....

- --,I

-

UNDER TEST

~--.(See Note BI

POINT

1

I

FROM OUTPUT
UNDER TEST

TEST

(See Note BI

CL

I

C1~

(See Note AI

(See Note CI I

I

-4LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS

2

"o

NOTES:

:Jl
~

A. CL includes probe and jig capacitance.
B. All diodes are 1 N3064 or equivalent.
C. C1 (30 pFI is used for testing Series 54L devices only.

l>

::!

f

TIMING

INPUT,+-~3~ _ _ _ _

o

LOAD CIRCUIT FOR
THREE-STATE OUTPUTS

LOAD CIRCUIT FOR
OPEN-COLLECTOR OUTPUTS

3V
OV

HIGH-LEVEL
PULSE

1.3

V

LOW-LEVEL
PULSE

1.3 V

0

v'

VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES

' \ 1.3 V

--"

I""·- - - -

tPLHh
IN PHASE

O~TPUT

f'

0 V

i~3-:

~

VOH

:
1.3 V :
I
I
VOL
tpHL ~
I4---*-tPLH

1

OUT-OF-PHASE1.3 V

~~:~~:a G)

\

!r.':':' Vo H
T,.3

----.I

VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES

1.3 V

OUTPUT:---\.
CONTRO;
1.3 V
(Low-level
)""_ _ _ _ _ __

1\

enabling)

/4"--+rtPHL

I

~
1.3 V

VOLTAGE WAVEFORMS
PULSE WIDTHS

--3V

..1 , .3 V

INPUT

~

l4---tw--+:

.~:+---3V

DATA
INPUT

~

I4---tw~

tS8tup~thold

2

--.J:~1.3V
.. .

V

VOL

\4--tpZL---t1

)

WAVEFORM 1 )
(See Note D)
I

+--

3V

--4~~-----ov
"'4.5 V

1.3 V

I
14-- tpZH---tJt
I

~tpLZ
S1 and
I
I
I
I
S2 closed

)I
I

I
i
"".5 V
Il:,--- VOL

tpHZ~

I
WAVEFORM 2
S1open,
(See Note D)
S2 closed
1.3 V
- - - - - - - . - - - .. 0 V

I

I

0.5 V

ro. 5 V

L

_ _ VOH

...

"'.5 V
S1 and
S2 closed

VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS

NOTES: D. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
E. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
F. All input pulses are supplied by generators having the following characteristics: PRR :5 1 MHz, Zout '" 50 nand:
For Series 54L/74L gates and inverters, tr = 60 ns, tf = 60 ns;
For Series 54L/74L flip-flops and MSI, tr :5 25 ns, tf :5 25 ns;
For Series 54LS/74LS, tr =::: 15 ns, tf :5 6 ns.
G. When measuring propagation delay times of 3-state outputs, switches S1 and S2 are closed.
H. The outputs are measured one at a time with one input transition per measurement.
t'L42, 'L43, 'L44, 'L46, 'L47, 'L75, 'L77, 'L96, 'L121, 'L122, 'L 123, 'L 153, 'L 154, 'L 157, 'L 164

1-20

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

SERIES 54/74
TRANSISTOR·TRANSISTOR LOGIC

TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE

HIGH·LEVEL OUTPUT VOLTAGE

INPUT VOLTAGE
4.0

~A ~ 12~oC
3.5

VCC

~"~

:r

3.0 TA' _55°C

~

2.5

~;

2.0
TA

&

!l
"0

~r-...

1.5

>

Ii

"r\-- ~ \

TA·125°C~

0.5

o

0.2 0.4 0.6 O.S

n

1

~

!~
II

1\ 1\

1.5
1.0

>

0.5

!.:0

00

2

i'\.."-

TA' _55°C

~

VI-Input Voltage-V

VCC 5V
VI' 0.4 V-

s:.~TA' 25°C

~~

2.0

0

1.2 1.4 1.6 1.S

3.0
2.5

;

\

\

1.0

o

3.5

>I

RL "tOOln-

~ 25~C-

L

5V

2

TA' _55°C

9-

~
o
>

HIGH·LEVEL OUTPUT CURRENT
4.0

-,-~

TA'125°C

~'\..

'"

-5

-10

:2

o

~

~

-15

&L-

-20

-25

-30

IOH-High-Level Output Current-rnA

FIGURE A1

~

~

a:

ou.

FIGURE A2

-

:2
LOW·LEVEL OUTPUT VOLTAGE

AVERAGE PROPAGATION OELAY TIME

"

LOW·LEVEL OUTPUT CURRENT
VCC· 5 V
VI' 2.4 V

:r&

0.5

i

.
0.4

~

0.3

!l
"0

TAl.

~~
::::.--

....I

~

0.2

.:.,
~ 0.1

../

~~

15

20

25

;::

35

~

30

.,o

./

~~
~p.*'l:_

35

w

CL' 150 pF

15

clL -

o

o 25 50 75 100 125
lA-free-Air Temperature-OC

FIGURE A4
PROPAGATION DELAY TIME,
HIGH·TO·LOW·LEVEL OUTPUT
FREE·AIR TEMPERATURE
40

J

r

35

E

I

5
CL

1
r-r

Sf-- f- CL
0

-

~ 150 pF
50J

fCL"':.15~F

VC~·5J
RL - 400 n

C

;::.!.

0

0

_f--- +-l--

-75 -50 -25

FREE·AIR TEMPERATURE

RL - 400

5~ pF

CL· 15 pF

PROPAGATION DELAY TIME,
LOW·TO·HIGH LEVEL OUTPUT

5

e,:,
-'"

10

FIGURE A3

VC~ -

w

25

lot -Low-Level-Output Current-rnA

0

«
a:
:2:

20

~"

40

VCC- 5V
RL· 400 n

g>

~

30

r--~

!


r-

a

CL"! 25

."

V

V V

...................

,../'

............

20

;:

18

~

-

0

I-- ~-150PF

--

/'

I
I

-75 -50 -25

:2

~~

~

---

...--

,/'

r-- r-- -E.!:.-100PF
rCL L25 JF_
~

i
il
£

25

50

75

100 125

o

-75 -50 -25

a

11
25

50

75

lA-free-Air Temperature-OC

TA-free-Air Temperature- °c

FIGURE 81

FIGURE 82

100 125

N

~

tData for temperatures below DoC and above 70°C are applicable for Series 54H circuits only.
Data as shown are applicable specifically for the NAND gates with totem-pole outputs.

l>

-I

o:2

1-22

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

VC~ -

V

5
RL-280n

16
14
12
10

~
--

2:

0.2

::;

o. 1

E

0.4

'0

>

~ 0.3

1--1-

o

1--1--

1

-;;

3 0.2 t--+---+--:¥----:IT'''--t----t-----t,...q----li---1

!~
o
>

0.1

'1

-0.3
-0.4

2

3

4

5

7

6

8

9

10

V

~

8
7

u:
u:

~

.2
i

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VI-Input Voltage-V

FREE-AIR TEMPERATURE

VCC' 5 V
VIL clock "0.3 V
VIH clock ;>2.4 V
Duty cycle z 50%
TA-25'C

.,

~

f-RLL4~nl---

i

I,

': 4.0

is

"=
is

i

~ 2
~ 1
0.2

0.4

1

1'--t-V

'-I 3.0 >--+-----+--l---+-~-+--+­

o

J..-t"~

~

RL"4k~ffir
II~~" 30 ~F

i

1111

II

1III

II

~

0.7 1

>--+-----+-+---+---1--I----+---

35
.

./V'

K

5.0

.2 4.5 >--+---+--l---+-~-+--+----I

CL" 50 pF

/

5

0.1

Vec - S V
J-K-OV
TA - 2S'C

FREQUENCY

6

a

FRO~MASTER

AVERAGE TOTAL D-C POWER DISSIPATION
PER FLIP-FLOP

10

.9-

i'--ISOLATE SLAVE

POWER OISSIPATION PER FLIP-FLOP

.,

9

y

FIGURE C4

FIGURE C3

I

w
C!'

'1 1
a

IOL -Low-Level Output Current-mA

_~

w

("t--rAiLEIINPrS
~ -0.2

hV--+-~'---+--+--+-;;'--t-----,.----j

1

Z

«
a:

INPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT
O.S

~

a:
o
u.

2.5

>--+---+--l---+-~-+--+-

2.0 f-

~

VIH clock

&

2.4 V

1.5 f-PT(avl" PTIHI ;PT(LI

f 1'~75

7 10

~~Lec70~V" 0.3 V
-50 -25

0

25

50

75

100 125

TA-Free-Air Temperature-OC

f-Frequency-MHz

FIGURE C5

FIGURE C6

Unless otherwise noted. data as shown are applicable specifically for the NAND gates with totem-pole outputs.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

1-23

SERIES 54L
LOW·POWER TRANSISTOR·TRANSISTOR LOGIC
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIMES

AVERAGE PROPAGATION DELAY TIME

LOAD CAPACITANCE

FREE·AIR TEMPERATURE

50
VCC" 5 V
45 RL" 40 kfl
TA" 25'C
40
I

~

i=

>-

G)

m
2
m

35

25

.~

20

i

.t

::xJ

tP!H~
"I Y

,..-

I

50r-~~--.--r-'r-.-~~

i=

VCC" 5 V
45 RL" 4 kfl --~~~-+--r--l

E

--

V

k:r..- -r
I::;:;" ..-

30

~

,/

~

40

o

35

CL~ 50 pF -~1-~--+--r---j

b-...

'w

~ 30~4-~--+--r-4~1--+~

tpHL

£

25~-r~--+--r~~~-+~

[

20~-r~--+--r~~~-+~

f 15~4-~--+--r-4~1--+~
~ll0
;N

15
10

~4-~--+--r-4~1--+~

l>

o

r-

o

~

10

20

30 40

50 60

70

OL-~~

80 90 100

CL -Load Capacitance-pF

o

25

50

75

100 125

TA-Free-AirTemperature-OC

FIGURE C7

2

__L--L~L-~~~

-75 -50 -25

FIGURE C8

."

o

3:

.,

PROPAGATION DELAY TIMES

PROPAGATION DELAY TIMES

FREE·AIR TEMPERATURE

FREE·AIR TEMPERATURE

::xJ

0

l>

50

5

:::!

o
2

¥

40

~

35

;::

30

2l

25

S

'~

I

45

r-....
...

-

tpLH

'-l.

tpLH

'"\

-~

\

¥

-

~

tPHL ./

20

o

30

;;

25

.~

10 VCC" 5 V
RL"40kfl
CL" 50 pF
-75 -50 -25

0

25

50

75

35

;::
0

15

40

t\

~

r--...

r-,....

tpHL

.,.... .........

-

f-/

20

[

15

£

10

o

100 125

VCC" 5 V
RL = 4 kfl
CL "50 pF

-75 -50 -25

0

25

50

75

lA-free-Air Temperature-°c

lA-free-Air Temperature-OC

FIGURE C9

FIGURE C10

Data as shown are applicable specifically for the NAND gates With totem-pole outputs.

1-24

...........

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

100 125

SERIES 54LS/74LS
LOW·POWER SCHOTTKY·CLAMPED TRANSISTOR·TRANSISTOR LOGIC

TYPICAL CHARACTERISTICSt
OUTPUT VOLTAGE

OUTPUT VOLTAGE

LOW·LEVEL OUTPUT VOLTAGE

INPUT VOLTAGE
(DIODE INPUT)

INPUT VOLTAGE
(PNP INPUT)

LOW-LEVEL OUTPUT CURRENT
(STANDARD OUTPUT)

II

4. 0
~ l - I--

II

3. S

\
>

3.Of- I---

!!

~

2.S

~

2. 0

s-

\~TA-2SoC

I.S

!]

1.0

!l.
!l

9
0

>

I I

O.S

o
o

I
0.2 0.4 0.6 O.B

1

"A-25°C~n

~

~I

1.0

.5
~

O.S

!]

i=
F..£+-+--f--+--+--f-f-f-f--l

0.1

O~~~-L-L~~L-~~~~

0.2 0.4 0.6 O.B

VI-Input Voltage-V

1

1.2 1.4 1.6 1.8

o

2

1

VI-Input Voltage-V

FIGURE 01

2

3

4

S

6

7

8

9

10

IOL -Low·L.vel Output Current-mA

FIGURE 03

FIGURE 02

LOW·LEVEL OUTPUT CURRENT
(BUFFER OUTPUT)
0.6

.--~---r--r---r--r--....,

HIGH·LEVEL OUTPUT VOLTAGE

POWER DISSIPATION PER GATE
FREOUENCY
5

Vcc = S V
3.S

E ~~

1i>
!l

~
[

>
~

'5

.5

o

;;

;;

.5

.5
~

:;:

!]

>

.§,

!.:0

~

2.S

~

..

'~--S5°

2.0

0

+--

3.0

"0

-

loS
1.0
O.S

o

-10

-20 -30 -40

r\
-so

FIGURE 04

CL-50B/
RL =2k!l
CL-1SpF
RL - 2 k!l
II
I

II

111c.Y

[\~

0.1

-60 -70 -80

12

v1

1111

o

10

0.4

i1

CL

=0

RL

"00

40

f-Frequency-MHz

FIGURE 06

FIGURE 05

PROPAGATION DELAY TIMES
LOAD CAPACITANCE
20

16

10

~

//

1-- -

0

FREE·AIR TEMPERATURE

f

w
w

2:

-

.t--

PROPAGATION DELAY TIMES

Ii

.

IOH-High-Level Output Current-mA

IOl -Low-Level Output Current-mA

~

a:

VCC· S V
TA = 2SoC
Duty Cycle = SO%

15 t--

I~t\ TA' 2SOC
~\ f'\.
TAO 12SoC\
l\~

o

;:

a:

ou.
2

HIGH·LEVEL OUTPUT CURRENT
4.0

>I

O.S ~--f----j--+--+--+.--I

14

~

:E

-I

LOW·LEVEL OUTPUT VOLTAGE

:r

2

o

~

o
o

2

f-+--+--+--+--+-z::I:"::::"fL-f-f--l

0.3

o

;;

I.S

I

1.2 1.4 1.6 I.B

\

2.0

~

\

,

t-

2.S

~

TA -1- SSlo C

TA'12So~\

>I

SSOC

TA3.0

>I

.

II

\1

Vcc - S V
RL - 2 k!l

3.S

\ \I I I
TA -12SOC

9

4.0
Vec - S V
2k
Rr
!l

VCC=5V
CL -IS pF
RL - 2 k!l

~
0

18

¥

I
tPHL

'"

VCC' S V
RL 0 2 k!l
TA' 2S·C

.-

~

;:

;;-

tpLH

;;
0

16
14
12

.. ~ I---::'

10

a

o

o

-75 -SO -25

0

25

SO

7S

100 12S

o

yr---

V
V

....--/

tpLH

10

20

30 40

SO 60

70 80

90 100

CL -Load Capacitance-pF

T A-Free-Air Temperature- Cl C

FIGURE 07

ooe

LV

l
.t

"[
.t

tO ata for temperatures below

/'

I

r-- I-- tP~

FIGURE 08

and above 70 0 e are applicable for Series 54LS circuits only.

-I./}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

1-25

SERIES 54S174S
SCHOTTKY·CLAMPED TRANSISTOR·TRANSISTOR LOGIC

TYPICAL CHARACTERISTICS t
INPUT·CLAMPING·DIODE
FORWARD VOLTAGE

OUTPUT VOLTAGE

FREE·AIR TEMPERATURE

INPUT VOLTAGE
4.0

II

VC~- JV
~jA·k5·C t - - RL·280n

3.5

:r

3.0

f

2.5

~

!
9

G)

m
2
m
:tr

o
>

>

f -0.96

!

1\

\

\

VCC

0

-0.88

r----t--

u. -0.84

2.0

~

-0.80

g.

-0.76

o

1.5

'0.

1.0

<;l

r- -......... r-..

10L

~ -0.72

0.5

T

o

o

:2

o"

o2

b

~

I~ ¥

1
~

~
o

TA--55'C]

0.5

~

!

0.3

o
>

0.1

-;:?

00

5

"-TA -125'C

10

35

40

..

V

VCC-5V
VI-2.7V

«

i'

1:

j 0,;
1- 0.4

---

!io :'.~
t

//

0.07

-14

0.04

= 0.02

-16
-18

/'

0.01
-75 -50 -25

-1

0

25

50

75

TA-free-Air T.mperature-°c

VI-Input Voltage-V

FIGURE E6

FIGURE E5
tData for temperatures below O°C and above 70°C are applicable for Series 54S circuits only.
Data as shown are applicable specifically for the NAND gates with totem-pole outputs.

1-26

30

FREE·AIR TEMPERATURE

12

-2

25

HIGH·LEVEL INPUT CURRENT

~ -10

1-

20

FIGURE E4

~ -4

-8

15

IOL -Low-Level Output Current-rnA

10

-6

~

~~

INPUT VOLTAGE

~

~

~~
~ 0.2 / .

INPUT CURRENT

~

1-"~

TA-25·C..,

FIGURE E3

{

100 125

0.7
0.6

IOH-High·level Output Current-rnA

VCC·5V
TA - 25'C

75

0.8

3 0.4

-10 -20 -30 -40 -50 -60 -70 -SO

-2

50

0.9

-;;

~

o

25

LOW·LEVEL OUTPUT CURRENT

r\.
o

0

VCC - 5 V

~~.

~

r---+-

-25

1.0

TAO 25'C

TA' -55'C-

'i--:

It.ll0m~-

LOW·LEVEL OUTPUT VOLTAGE

/~A=i25'cl

h

-25 mA

FIGURE E2

HIGH·LEVEL OUTPUT CURRENT

»
-I

0

TA-free-Air Temperature-°c

HIGH·LEVEL OUTPUT VOLTAGE

s:

10L

r--r::::t-.L
~II

~O

FIGURE E1

:tr

-18 mA

-0.64

-> -0.60-75

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VI-Input Voltage-V

0

. . . r-

~ -0.68

»
r-

5V

~ -0.92

TA = '-55'C
I

-1.00

I

-1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

100 125

SERIES 54S174S
SCHOTTKY·CLAMPLED TRANSISTOR·TRANSISTOR LOGIC
TYPICAL CHARACTERISTICS t
PROPAGATION DELAY TIME,
LOW·TO·HIGH·LEVEL OUTPUT

PROPAGATION DELAY TIME,
lOW·TO·HIGH·LEVEL OUTPUT

SUPPLY VOLTAGE

FREE·AIR TEMPERATURE
10

-

TT-

VCC" 5 V
RL"280n

I

-

I

C~"50PF_

I
I

-75 -50 -25

0

-

2

=~

-

CL"15pF

I 25I

RL "280n
' - - ' T A " 25°C

V

CL "150pF

o --

10,----.--~_.-----.----,

~-T·---~-

o
i=

V

«
OL-__- J_ _ _ _

._'---

50

75

100

4.5

125

4.75

FIGURE E7

10

:-c~ "15b

I

VCC" 5V
pF r--RL" 280 n

-......::.:- J.

---

-75 -50

-25

-_.

CL-~OPF

0

CL "15 pF

-

25

10

~
6

'1

50

75

100

II

4.75

4.5

CL" 5h pF

I

&

r--

1=

iJ:;

+

a-

N

-50 -25

FREQUENCY
80

VCC"5V

~L" 280 n

50

~

70

4

60

t:>
...

i
~

50
40
",

30

~

20

,p

10

o
75

100

VCC"5V
CL "15 pF
TA" 25·C
Duty Cyel. " 50%

.2

r-= =

1
25

5.5

5.25

5.0

FIGURE E10

l
I

0

I
CL"15pF

POWER DISSIPATION PER GATE

CL "15 pF

2

~75

~

VCC-Supply Voltage-V

I
f-.

w
w

2

-

I
I

o

125

CL"150pF_~

6

£

«
a:

RL"280n
TA" 25°C

I

~

~

2

I

- - - _.

FIGURE E9

1;

o
LL

CL" 50 pF

AVERAGE PROPAGATION DELAY TIME
vs
FREE·AIR TEMPERATURE

j::

~

a:

..J

I

TA-F .. o·AIR TEMPERATURE-oC

f

5.5

CL "150 pF

1

o

6.25

PROPAGATION DELAY TIME,
HIGH·TO·LOW·LEVEL OUTPUT
vs
SUPPLY VOLTAGE

FREE·AIR TEMPERATURE

---

5.0

~

FIGURE E8

PROPAGATION DELAY TIME,
HIGH·TO·LOW·LEVEL OUTPUT

f--- ~

_ _ _ _- L_ _ _ _

VCC-Supply Voltogo-V

T A-Free-Air T.mperature-Cl C

10

~

125

I-- V
1

7 10

20

40

70100

f-Frequency-MHz

TA-Fre.-Air Temperatufe-OC

FIGURE E11

FIGURE E12

tData for temperatures below ooe and above 70 0 e are applicable for Series 54S circuits only,
Data as shown are applicable specifically for the NAND gates with totem-pole outputs,

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 •

DALLAS. TEXAS 75265

1-27

SERIES 54S[74S
SCHOTTKY·CLAMPED TRANSISTOR·TRANSISTOR LOGIC
TYPICAL CHARACTERISTICS FOR FLIP-FLOPS t
LOW·LEVEL OUTPUT VOLTAGE
vs
LOW·LEVEL OUTPUT CURRENT

HIGH·LEVEL OUTPUT VOLTAGE
HIGH·LEVEL OUTPUT CURRENT

D

~

II
1

:D

o

l>

r-

R

I

~ ~ TA - 2S"C
~~
TA--SS"C~ ~
~

G')

m
:2
m

1.0

~Tl-,JS"C

VCC-SV

::r

0.9

f

0.8

~

0.7

<3;;

O.S

.5

-10

/

0.4

~

~

"

3

~ 0.2

~

0.1

o

-20 -30 -40 -SO -60 -70 -80

\.TA -125"C

OSlO

15

20

25

30

35

40

IOL -Low· Ln.' Output Current-mA

IOH-High·Level Output Current -mA

FIGURE E13

:2

1..........

TA-25",,'L ~

7~
1 o. l.......- ~~

~

o

Ir TA - -5S"C

g 0.6

FIGURE E14

."

o

'S112, 'S113
INPUT CURRENT
vs
INPUT VOLTAGE

:D

,3:
l>

HIGH·LEVEL INPUT CURRENT
vs
FREE·AIR TEMPERATURE
10

VCC-5V
V,-2.7V

7

:::!
1

:2

-6

l

-10

j

I

-4

~

1

kff
VI "'-J/K 'NPUTS
ll' PRESET/CLEAR 'NPUTS

-2

o

Vi'-

-8

~

d

1

} ~::

CLOCK INPUT

3

i-

1-

12

;

/'

0.2

/

0,1
0.07

-

~ 0.04

-14
VCC -5V
TA - 25"C

-16
-18

-2

0.02

7

0.01
';'75 -60 -25

-1

0

FIGURE E15

~

~

~

a
l

YS

6

VCc-5 V
14 RL -280 n

VCC- 5V
RL -280n
TA-25"C

12
10

CL -150pF t--

I"'-

8,

I

p-

L- L-

"1

CL - 50 pF

E

<

Q)
35

'1020
Line Driver/Memory Driver

lEI
!

12 mA.24 rnA 48 rnA 64 rnA

S

VOLUME

C

::::J

12 mA 24 rnA 48 mA 64 mA
3 State

U.

Sink, True Outputs
Very Low

3 State

12 rnA 24 rnA 48 mA 64 rnA
Sink, In .... ertmg Outputs
Very Low

ac

1642

3 State

'1643

12 mA 24 rnA 48 rnA 64 rnA

OCTAL BUS TRANSCEIVERS/MOS DRIVERS

Power
Smk, True and

TECHNOLOGY
DESCRIPTION

TYPE

Inverting Outputs. 3·5tate
True Outputs. 3-State

~~

In .... ertmg Outputs
Very low

ALS

AS

LS

S

ac

VOLUME

'2620

Registered with MultlplelC

'2640

12 rnA 24 rnA 48 rnA 64 rnA

'2623

True Outputs

'2645
Registered with MultlplelCed

OCTAL BUFFERS AND LINE DRIVERS WITH INPUT/OUTPUT RESISTORS
TECHNOLOGY
TYPE

I Inverting Outputs
I Noninverting OutPUlS
Output Resistors I Inverting Outputs

Input ReSistors

. IN on inverting Outputs

~~~

ac

'649

35

ALS

AS

LS

S

VOLUME

Unl .... ersal Transcel .... er
Port Controllers

'746
'747

3 State

12 rnA 24 rnA 48 rnA 64 mA
In .... ertlng Outputs

DESCRIPTION

3 State

852
'856

CF

CF

'2540
'2541

CF Denotes contact factory
• Denotes available technology .
... Denotes planned new products,
A Denotes" AU suffix version available in the technology indicated,
S Denotes supplement to data book.

, TEXAS-II}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

2-5

FUNCTIONAL INDEX

FLIP-FLOPS
DUAL AND SINGLE FLIP·FLOPS

aUAD ANO HEX FLIP FLOPS

TECHNOLOGY
DESCRIPTION

TYPE

STD
TTL

ALS

AS

'73
'76
'78
'103

TECHNOLOGY

H

L

LS

•

•

A

•

•

A

S

VOLUME

NO. OF

DESCRIPTION

FF.

OUTPUTS TYPE
'174

STD
TTL

ALS

AS

LS

S

VOLUME

f--f--+-:+-+-+--:;----I

378

o Type

'171

'106

0, Q

'107
Dual J K Edge Triggered

'108

'113

II

'70
Single J K Edge Triggered

Dual Pulse- Trtggered

"'T1

...O·
:J

~

:J
0-

CD
.X

•

A
A

··

3S

J K

0

Single Pulse Triggered

3

Lockout
Single J K With Data

lockout
DualO-Type

TECHNOLOGY

·

DESCRIPTION

True Data

'101

NO. OF
BITS

Octal

OUTPUT' TYPE

3 State

STD
TTL

ALS

AS

LS

S

VOLUME

'374

'102

3-$tate

'574

'73

2 State

'273

3 State
3 State
3 State
2 State
3 State
3 State
3 State
3-5tate

'575

3 State

'879
'876

'76
'78

True Data With Clear

Octal

True With Enable

Octal

'72

Inverting

Octal

Inverting With Clear

Oct'al

Inverting With Preset

Octal

3 State

True

Octal

3-$tate

Inverting

Octal

3 State

'826

True

9·B,t

3-5tate

'823

Invertmg

9·Bit

3-$tate

'824

True

10·B,t

3·5tate

'821

Inverting

10Bit

3-$tate

'822

'104

'Ill
'lID
'74

·. ·
A

3S

CF Denotes contact factory,
• Denotes available technology .
... Denotes planned new products.
A Denotes "A" suffix version available in the technology indicated.
S.Denotes "S" suffix version available in the technology indicated.
S Denotes supplement to data book.

2-6

376

OCTAL, 9·BIT, AND 10BIT D·TYPE FlIP·FLOPS

'105
Dual J-K With Data

'276

2

'71

:J

(")

•

•

A

'107

c:

3S

'379

'109
'112

'175

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

'874
'878
'377
'534
'564
'576
'577

'825

CF

FUNCTIONAL INDEX

LATCHES AND MULTIVIBRATORS
OCTAL, 9-BIT, AND la-BIT LATCHES

QUAD LATCHES

TECHNOLOGY

TECHNOLOGY
OUTPUT

DESCRIPTION

2 State

Dual 2 Bit

2 State

Transparent

5 A

STD

TYPE

TTL

ALS

L

AS

LS

VOLUME

DESCRIPTION

NO, OF
BITS

'279

Transparent

Dual4-Bit

RETRIGGERABlE MONOSTABlE MUlTIVIBRATORS

Transparent

Octal

Octal

TECHNOLOGY
STD

TYPE

TTL

AlS

AS

lS

l

VOLUME

Inverting Transparent

Octal

'122

'130

Dual4-Bit

'422

Inverting Transparent

Octal

'123
'423

2-lnput Multiplexed

Octal

D-TYPE
OCTAL, 9-BIT, AND 10-BIT RAD,BACK lATCHES
TECHNOLOGY
NO, OF

DESCRIPTION

BITS

Edge·Trlggered Inverting

and Nonmverting

Transparent True

Transparent Nonmvertlng

Transparent with Clear

T rue Outputs
Transparent with Clear
Inverting Outputs

CF
•
...
S

Denotes
Denotes
Denotes
Denotes

TYPE

STD
TTL

ALS

AS

LS

S

VOLUME

'26B

'77

'375

2 State

Dual

TYPE

'75

2 State

DESCRIPTION

OUTPUT

STD
TTL

AlS

AS

lS

S

VOLUME

Addressable

Octal

3-51alo

'373

3-51a1e

'573

2-5t3te

'laO

2-5tate

'116

3-Stat.

'873

3-51ale

'533

3-Stat.

'563

3-State

'580

3-State

'880

3-Stat.

'604

OC

'60S

3-Stat.

'606

OC

'607

2-State

'259

Multi-Mode Buffered

Octal

3~State

'412

True

Octal

3-Stat.

'845

Inverting

Octal

3-Stat.

'846

True

9-81t

3-State

'843

Octal

'996

.II.

Inverting

9-Bit

3-State

'844

Octal

'990

.II.

True

10-Bit

3-State

'841

9-81t

'992

.II.

Inverting

10-Bit

3-State

'842

10'Blt

'994

.II.

Octal

'991

.II.

9-BII

'992

.II.

10-Blt

'994

Octal

'666

.II.

'667

.II.

>C

CD
"'0

.5

cac

MONOSTABlE MUlTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS

o

TECHNOLOGY
DESCRIPTION

Octal

FI

TYPE

Single

'121

Dual

'221

~~~

I AlS I AS IlS I S

• I
• I

I
I

I

L

I 1/ •
I• I I

VOLUME
2

'';::
CJ

s::
;:,
u.

contact factory,
available technology .
planned new products.
supplement to data book.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

2-7

FUNCTIONAL INDEX

REGISTERS
SIGN-PROTECTED REGISTERS

SHIFT REGISTERS
MODES

~ ~'1g

DESCRIPTION

VI en

g

TECHNOLOGY
TYPE f----.-Al-'S.;=AS:.:.;.:.::..:l

~

:;--.-s~ VOLUME

DESCRIPTION

TTL
Sign-Protected Register

Sign Protected

Parallel In.

x

Parallel-Out.

X

REGISTER FILES

'299 f---+-+--+-+-~~+-----!

TECHNOLOGY

Bidirectional

'323
't 94

t--t--t--c-+-+--'-I-+---=--I
I--+-+--I--+---':"-I-+--=--I

DESCRIPTION
8 Words x 2 Bits
4 Words )( 4 Bits

Parallel In,

Parallel·Out.

Dual 16 Words x 4 Bits

Registered

Outputs

OUTPUT

TYPE

3-State

'172

OC

'170
'670
'870
'871

3-State
3·State
3·State

STD

TTL

ALS

AS

LS

VOLUME

OTHER REGISTERS

II

TECHNOlOGY
DESCRIPTION

TYPE

'99

Paralh'I-ln,

98

Parallel Out
Quadruple MulTIplexers

"T1

wIth Storage

c:

398

::J

...
o·
::J
(')

'395 f--+--+--+-+--I--+-~-!
Quadruple Bus Buffer

'673

RegIsters
Parallel Out

Q)

Octal Storage RegIster

16

:r
Co

'674

't65 I---'-+-+--+-+-~I-I---I

Parallel In.

(t)

><
Serial In.

SenalOut

SHIFT REGISTERS WITH LATCHES
NO,
DESCRIPTION

OF

TECHNOLOGY
OUTPUTS

TYPE

3-State
3-Stat.

BITS

Serial-In, Parallel-Out

Buffered

with Output Latches

3-Stat.

Parallel-In. Serial-Out.

2-St.t.
3-Stat.

'671
'672
'673
'594
'595
'596
'599
-597
'589

3-State

'598

Parallel-In, Parallel-Out

with Output latches

16

2-State

OC
OC
with Input Latches

ALS

AS

LS

VOLUME

Parallel 110 Ports with

Input latches, Multiplexed
Serial Inputs

•
A
A
S
S

2-8

Denotes
Denotes
Denotes
Denotes
Denotes

available technology,
planned new products,
"A" suffix version available in the technology indicated,
"S" suffix version available in the technology indicated,
supplement to data book,

~

, TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 •

DALLAS, TEXAS 75265

396

STD

VOLUME

AlS

AS

l

lS

S

FUNCTIONAL INDEX
COUNTERS
ASYNCHRONOUS COUNTERS (RIPPLE CLOCK I

SYNCHRDNDUS CDUNTERS ~ PDSITIVE·EDGE TRIGGERED
TECHNOLOGY
PARALLEL I--~--'-'---r--'-.---;"::":"-~--I
LOAD'
TYPE ~~~
ALS AS
L
LS
S VOLUME

DESCRIPTlDN

Sync

'160

Sync

'162

PARALLEL

DESCRIPTION

LOAD

176

Ves

196
'290

560

Set to 9

Sync

'668

None

Sync

'690

Sync

'692

Sync

'168
'190

35

Dual Decade

Decade Rate
Multiplet,

Async

192

Sync

'568

Sync

'696

Sync

'698

1

Async

Nl0

Set to 9
Sync

4 Bit Binary

'177

Ves

'197

None

'293

None

92
'390
490

None

393

'161

OF

Sync

669

Sync

'691

Sync

'693

Sync

'169

Asynl...

'191

CF
CF

B

.

3 State

590

OC

'591

Parallel Register Inputs

2 State

592

Parallel I 0

3 State

593

Outputs

6 Bit Binary
Rate Multiplet,

8 Bit Up Down

Sync
Sync

'569

Sync

'699

Async CLR

867

Sync CLA

869

1

TYPE

STD
TTL

50·to , Frequency DIvider

'193

AS

LS

VOLUME

II

TECHNOLOGY
DESCRIPTION
35
60 to·' Frequency DIvider
60 Bit Binary Aate Multiplier.

Async

ALS

FREOUENCY DIVIDERS, RATE MULTIPLIERS

4 Bit Binary

Up Down

VOLUME

TECHNOLOGY
TYPE

OUTPUT

163

S

-A

None

TYPE

Parallel Reglstpr

561

LS

8·BIT BINARY COUNTERS WITH REGISTERS

DESCRIPTION

Sync

L

93

Ves

Set to 9

Dual 4 Bit Binary

'167

Sync

AS

69
4 Bit Binary

DIvide by 12

Decade Up Down

ALS

68

Sync

Async

STD
TTL

Yes

Decade

.

TYPE
90

CF

B

NEGATIVE·EDGE TRIGGERED
TECHNOLOGY

Set 109
CF

Decade

~

Decade Rate Multiplier"

ALS

AS

LS

VOLUME

'56
'57
97
'167

697

97

N2

CF Denotes contact factory,
• Denotes available technology .
... Denotes planned new products.
A Denotes" A" suffix version available in the technology indicated.
S Denotes "S" suffix version available in the technology indicated.
5 Denotes supplement to data book.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 •

DALLAS, TEXAS 75265

2-9

FUNCTIONAL INDEX

DECODERS, ENCODERS, DATA SELECTORS/MULTIPLEXERS AND SHIFTERS
DECODERSIDEMUL TIPLEXERS

DATA SELECTORS/MULTIPLEXERS'
TYPE
DESCRIPTION

OF

rYPE

OUTPUT

16 To 1

Dual 8 To 1

8 To 1

•

TYPE

TECHNOLOGY

.
.

STD
TTL

2·State
3 State

'150

3 State

'850

3 State
3 State

'851

2 State

'151

2 State

'152

3 State

'251

3 State

'354

2 State

'355

3 State

'356

OC

'357

2 State

'153

'250

'351

3 State

'253

2 State

'352

3 State

'353

3 State

'604

OC

'605

O·

3 State

'606

OC

'607

:J

2 State

'98

2 State

'298

2 State

'398

2 State

'399

2 State

'157

ALS

AS

L

LS

S

VOLUME

DESCRIPTION

TECHNOLOGY

OF

TYPE

OUTPUT
4 To 16
3S

4 To 10 BCD To Decimal
4 To 10 Excess 3·To
Decimal
4-To-l0 Excess 3·Gray

3S
A

To-Decimal

3 State

'154

OC

'159

··

2 State

'42

2 State

'43

A

2 State

'44

A

AS

3 To 8

Dual2To4

Dual '·ToA Decoders

2 State

'137

2 State

'138

3 State

'538

2 State

'139

2 State

'155

OC

'156

3 State

'539

L

LS

S

VOLUME

A

...
...

'131

Latches

Dual 4 To 1

ALS

TTL

3·To-8 with Address

...

STD

...

...

··

.

A

...

COOE CONVERTERS

"T1
r::::

::J

...

(')

Octal 2 To 1 with Storage

~

Quad 2 To 1 With Storage

5'
C.
ct)

><

2 State

TECHNOLOGY
DESCRIPTION

TTl

6 line-BCD to 6 Line Binary. Or 4 line to 4 Lme

3S

6 to 1 Universal
Multtplexer

3 State

'258

3 State

'857

'185

BCD to Binary Converters

'484

Binary to BCD Converters

'485
PRIORITY ENCODERS/REGISTERS
TECHNOLOGY

DESCRIPTION

'158
'257

'184

BCD 9's ' 8CO 10's Converters
6 Bit Binary to 6 Bit BCD Converters

Quad 2 To 1
3 State

VOLUME

STD

TYPE

B
B

.
.

TYPE

STD
TTL

CF

ALS

AS

LS

LS

S

VOLUME

'147

Full BCD
Cascadable Octal

'148

Case ad able Octal With 3 State Outputs

'346

4 Bit Cascadable With Registers

'278

CF
SHIFTERS

,3

TECHNOLOGY
DESCRIPTION

OUTPUT

TYPE

STD
TTl

4 Bit Shifter

3 State

'350

3 State

'897

Parallel 16 Btt
Multi Mode
Barrel Shifter

CF Denotes contact factory,
• Denotes available technology,
... Denotes planned new pr~ducts,
A Denotes" A" suffix version available in the technology indicated,
8 Denotes "8" suffix version available in the technology indicated,
S Denotes supplement to data book,

2-10

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

ALS

AS

...

L

VOLUME

FUNCTIONAL INDEX
DISPLAY DECODERS/DRIVERS, MEMORY/MICROPROCESSOR CONTROLLERS,
AND VOLTAGE-CONTROLLED OSCILLATORS
OPEN COLLECTOR OISPLAV OECODERS
OFF·STATE
OUTPUT

DESCRIPTION

TVPE

VOLTAGE

BCD To OpClm .. 1

STD

ALS

TTL

30 V

'45

60 V

'141

15 V

'145

7 V

'445

30 V

'46

MEMORV MICROPROCESSOR CONTROLLERS

AS

L

LS

DESCRIPTION

VOLUME

S¥~tt'l1l CO!1troll('rs

UIlI\it'ISdl

I Burst Modes
Cycle Stcal
I

CorHloliers

Burst Modes

III H!:H~\

I 4K

16K

30 V

'246

With Output Latches

15 V

'247

Multi Mode Latclws IBOBOA AppllcdtlonS)

5,5 V

'248

55V

'249

l,OB
• ti12
1>13

13 State
i OC

Memory Mappers

IdO

1111

CLOCK GENERATOR CIRCUITS
TECHNOLOGY
TYPE

DESCRIPTION
Quadruple Complementary Output

TECHNOLOGV
DESCRIPTION

TVPE

STD

ALS

TTL

BCD Counter/4 Bit latch:BCO-To-Declmal

AS

Latch/BCD-To-Seven-Segment

latch/SCD- T0- Seven-Segment

lOUT
Ves

ENABLE

INPUT

x

Digital Phase Lock Loop

'297

C

Programmable Frequency

'292

CO
c

294

Triple 4 Input AND NAND Drivers

600

Triple 4 Input OR NOR Drivers

802

veo

o

.~

124

(.)

c
:s
u.

TECHNOLOGV

Ru :t

'max

fI
Q)

Dual

DESCRIPTION

VCO.
Single

VOLUME

'tJ

DIViders Digital Timers

'144

RANGE

S

321

VOLTAGE·CONTROLLED OSCILLATORS

COMP'L

LS

320

Crystal Controlled OSCillators

BCD Counter/4 Bit
Decoder/Lamp Driver

AS

120

Dual Pulse Synchronizers Drivers

'143

Decoder/lad Driver

ALS

265

LogiC Elements

VOLUME

'142

Decoder/Driver

STD

I--______________I--__+-T,.T~L~ __ ~__+-_I__'+----~

OPEN COLLECTOR DISPLAV DECODERS/DRIVERS WITH COUNTERS/LATCH

No,

VOLUME

-+-+--+-_'+--1

'48

'447

S

600

11-

'49

'347

LS

jr6::':4K...::..c.-+-6:'::0-=-1--t-+--+'--t-1

55 V

7 V

AS

1 4 K, 16K
602
- '-K- ' - - t --'-0"-3
64
G

55 V

7 V

ALS

890

13 State

MI"l1Ury Mapper~

TECHNOLOGY

TVPE

Of f

Tr,Jnsprirent

~f~~rrl~:;:

'47

15 V

BCD To Seven Segment

/DRIVERS

TECHNOLOGV

TVPE

VOLUME
LS

MHz

Ves

Ves

No

20

'624

Single

Ves

Ves

Ves

Ves

20

'628

Dual

No

Ves

Ves

No

60

'124

Dual

Ves

Ves

No

No

20

'626

Dual

No

No

No

No

20

'627

Dual

No

Ves

Ves

No

20

'629

RESULTANT DISPLAYS USING '46A, '47A, '48, '49, 'L46, 'L47, 'LS47, 'LS48, 'LS49, 'LS347

o

3

2

4

5

6

7

9

8

10

11

12

13

14

RESULTANT DISPLAYS USING '246, '247, '248, '249, 'LS247, 'LS248, 'LS249, 'LS447

o

2

3

5

4

6

7

9

8

10

11

12

13

14

RESULTANT DISPLAYS USING '143, '144

o

2

3 . 4

5

6

8

9

• Denotes available technology .
... Denotes planned new products.
A Denotes "A" suffix version available in the technology indicated,

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

2-11

FUNCTIONAL INDEX
COMPARATORS AND ERROR DETECTION CIRCUITS
4-BIT COMPARATORS

PARITY GENERATORS/CHECKERS,
ERROR DETECTION AND CORRECTION CIRCUITS
NO_

P=Q

DESCRIPTION

OF

TECHNOLOGY
TYPE

TTL

BITS

Yes

STD

ALS

AS

LS

S

VOLUME

'180
Odd/Even Parity

B-BIT COMPARATORS

'280

Generators/Checkers
DESCRIPTION

INPUTS

N

P>Q

P<

TYPE

ORGANIZA TION

TYPE

VOLUME

OUTPUT

TOP28S166

2048W , 80

TBP38S165

2048W x 88

3-5tate

T8P38S166

2048W , 88

3-5tate

TBP38SA165

2048W x 88

OC

T8P38SA166

2048W x 88

OC

T8P34S162

4096W x 48

3-5tate

TBP34SA162

4096W x 48

OC

TBP24S81

2048W x 48

3-State

T8P24SA81

2048W x 48

OC

T8P28S85A

1024W x 88

3-State

T8P28S86A

1024W x 88

3-State

T8P28SA86A

1024W x 88

OC

TBP38S85

1024W X 8B

3-5tate

TBP38S86

1024W X 88

3-State

T8P38SA85

1024W X 88

3-State

OC

T8P38SA86

1024W X 88

OC

T8P24S41

1024W x 48

3-5tate

T8P24SA41

1024W x 48

...
...
...
...
...
...

RANDOM-ACCESS READ-WRITE MEMORIES IRAM'sl

512W x 88

3-5tate

T8P28SA42

512W x 88

OC

T8P28S46

512W x 88

3-5tate

T8P28SA46

512W x 8B

OC

T8P38S22

256W X 88

3-Sta'e

T8P38SA22

256W X 88

OC

T8P24S10

256W x 4B

3·5tate

T8P24SA10

256W x 48

OC

T8P34S10

256W x 48

3-State

T8P34SA10

256W x 48

OC

T8P18S030

32W x 8B

3-State

TBP18SA030

32W x 88

OC

TBP38S030

32W x 88

3-5tate

TBP38SA030

32W x 88

OC

STD
OUTPUT
256)( 1

256-8,t Arrays

64·B,t Arrays

...
...
...
...

16 81t Multiple-Port

8x2

Register File
, 6-81t Register

T8P38L 165

2048W x 8B

TBP38L166

204BW x 8B

3-State

TBP34L 162

4096W x 48

3-State

TBP28L85A

1024W x 88

3-5tate

T8P28L86A

1024W x 88

3-5tate

T8P38L85

1024W x 88

3-State

T8P38L86

1024W x 88

3-State

T8P28L42

512W x 88

3-5tate

T8P28L46

512W x 88

3-State

T8P28L22

256W x 88

T8P28LA22

256W x 88

OC

T8P38L22

256W x 88

3-State

1K-Bit Arrays

T8P34L 10

256W x 48

3-State

256-8it Arrays

T8P38L030

32W x 88

3-State

4K-Bit Arrays

2K-Bit Arrays

Denotes
Denotes
Denotes
Denotes

S

VOLUME

'3~'

DC

'89

3·5tate

'189

3-5tate

'219

DC

'289

3·5tate

3-5tate
16 x 4

Register FIles

...
...

'172

3·5ta1e

'670
'87'

FIRST-IN FIRST-OUT MEMORIES IFIFO'SI
TECHNOLOGY
DESCRIPTION

ALS

OUTPUT

...

...

TYPE

LS

DC

File~

Dual 64-81t

'225

16 Words x 5 Bits
64 Words x 5 Bits

3·5tate

'233

64 Words x 4 Bits

3-5tate

'232

VOLUME

OUTPUT

3-5tate
3-5tate

SK-Bit Arrays

2-14

ORGANIZATION
2048W x 88

16K-Bit Arrays

•
&
A
8

TYPE
TBP28L166

AS

DC

LOW-POWER PROM's

DESCRIPTION

ALS

3-5tate
OC

...

OC

T8P28S42

TECHNOlOGY

TYPE
DESCRIPTION

...
...
...

...

3-State

...
...
...

available technology,
planned new products,
"A" suffix version available in the technology indicated,
"8" suffix version available in the technology indicated.'

lj}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

AS

LS

LS

VOLUME

FUNCTIONAL INDEX
PROGRAMMABLE LOGIC ARRAYS
PROGRAMMABLE lOGIC ARRAYS
DESCRIPTION

ImpactPAL<
Q)

24

"t:S

.E
C6

'PAl20Ll0-2Q

·PAl20X4·20

Actrve-Low

Circuits

f-'::-:':;:~~"-~:-:-:-f-"---i
·PAl20R4A·2

Reo"wed

~

E)(clusIVe-OR PAL@

'PAl1(iA6A 2

·PAl20R4A

~

Half-Power PALCO)

'PAllrIR8A 2
"I'ALlIiR4A 2

4

High-Performance PAL@

'PAll(iR6A
'PAl 1!iR8A

Active-low

4

Half-Power PAL(!I

·PAl16R8·25

~

8

Exclusive-OR PAL ~

NO. OF

AlS

NO

8

High-Performance PAL(!)

TYPE

24

'PAL20XS-20

s:

J-·-PA-l2~OX~1-0.~20-+--.--1

o

'PALA19L8-35

'';;

·PAl20X4·35
Registered

(,)

s:

1--·:.;.PA;:;l2:.::.0X.:;:8-,:.3..:..5+-=--1

:::s

u.

Registered-Input PAl~

Active-Low
Reglstered·lnput PAL~

19

~

~

CirCUits

8

Active-low
4

latched-Input PAL@

r-6

rs-

Circuits

'PAlR19LB·4Q

·PALR19R4·40
Registered f-·P'-Ac:..LR-'-19'-R..;...6.....:40-+-""'---I
·PALR19R8·40
'PAL T19L8-25
'PAL T19A4-25
Registered

'PAL T19R6·25

I--·P~A~lT~19=R78.~25+~-I
·PAL T19l8·40

latched-Input PAL@

Circuits

Field-Programmable

14x32x6 Logic Arrays

19

~

+

·PALT19R4·40
Regiswed

f-::-:-~~-::_:_::4-4~-+----I

3-$tate

FPlA839

oc

FPlA840

24

®pAlls a registered trademark of Monohthic Memories Incorporated .

• Denotes available technology .
.... Denotes planned new products.

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

2-15

lEI
"C2

n
o

::!
:2

l>
r-

:2
C

m
X

2-16

The TTL Data Book

.General Information

Functional Index

TTL Devices

Mechanical Data

3-1

lEI
-I
-I

r-

C

m

:5
n
m
en

3-2

TYPES SN5400, SN54HOO, SN54LOO, SN54LSOO, SN54S00,
SN7400, SN74HOO, SN74LSOO, SN74S00
QUADRUPLE 2·INPUT POSITIVE·NAND GATES
REVISED DECEMBER 1983

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

SN5400. SN54HOO. SN54LOO ... J PACKAGE
SN54LSOO. SN54S00 ... J OR W PACKAGE
SN7400. SN74HOO •.. J OR N PACKAGE
SN74LSOO. SN74S00 .•. D. J OR N PACKAGE
(TOP VIEW)

• Dependable Texas Instruments Quality and
Reliability

1A
1B
1Y
2A
2B
2Y
GND

description
These devices contain four independent 2-input NAND
gates.
The SN5400, SN54HOO, SN54LOO. and SN54LSOO.
and SN54S00 are characterized for operation over the
full milita'ry temperature range of - 55°C to 125°C. The
SN7400, SN74HOO, SN74LSOO, and SN74S00 are
characterized for operation from ooc to 70°C.
FUNCTION TABLE
INPUTS

SN5400. SN54HOO ... W PACKAGE
(TOP VIEW)

1A
1B
1Y

(each gate)

B

Y

H

H
X

L

L

X

L

4Y
4B
4A
GND
3B
3A
3Y

VCC
2Y.
2A
2B

OUTPUT

A

VCC
4B
4A
4Y
3B
3A
3Y

H
H

SN54LSOO, SN54S00 ... FK PACKAGE
SN74LSOO. SN74S00 •.. FN PACKAGE
(TOP VIEW)

logic diagram (each gate)

co

~

U

u u co

en

...-...-Z>.;t

1Y
NC
2A
NC
2B

positive logic
Y =

A-B

or Y = A

+B

4A
NC
4Y
NC
3B

w
U

>
w

C

...I

lI-

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::S':a~il~ar~[IU~~Ot~~~~~~nor~~f:~~~~e~:~s~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-3

TYPES SN5400, SN54HOO, SN54LOO, SN54LSOO, SN54S00,
SN7400, SN74HOO, SN74LSOO, SN74S00
QUADRUPLE 2·INPUT POSITIVE·NAND GATES
schematics (each gate)
'HOO

'00, 'LOO

r-------------------~~VCC

r-------~-----.--VCC

R2

R1

A
A

B

Y

B

y

INPUT CLAMP
DIODES ARE
NOTON
'LOa CIRCUITS

GND

GND

'LSOO

'SOO
Vec

II
-I
-I
r
C

20kn
, ,

Skn

Vce

120n

2.S kn

900n

50n

A

A

B
y

B

Y

m

<

C')

m

en

1.5 kn

3kn

~.---------------e__e--~--GND

~~--------------~._~-.--GND

Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) '00, 'HOO, 'LSOO, 'sao: ............................................ 7 V
'LOa ........................................................... 8 V
Input voltage: '00, 'HOO, 'LOa, 'sao ............................................................ 5.5 V
'LSOO ......................................................... , ............... 7 V
Operating free-air temperature range: SN54'.......................... . . . . . . . . . . . . . . . . .. - 55°e to 125°e
0
SN74' ............................................... , oOe to 70 e
0
Storage temperature range ..... '--" ... "-_'_"-~_'"--""~" ..... , ....................... , .... - 65°e to 150 e
NOTE 1: Voltage values are with respect to network ground terminal.

3-4

TEXAS

~.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN5400, SN7400
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
recommended operating conditions
SN5400

SN7400
UNIT

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

IOH

High·level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low·level output current

TA

Operating free-air temperature

2

V

0.8

08

-0.4

-0.4

mA

16

mA

70

°e

16
- 55

V

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST eONDITIONS

SN7400

SN5400

t

UNIT
MIN

TYP*

2.4

3.4

MAX

MIN

TYP*

2.4

3.4

- 1.5

-1.5

VIK

Vee = MIN,

11=-12mA

VOH

Vee = MIN,

VIL = 0.8 V,

IOH = - 0.4 mA

VOL

Vee = MIN,

VIH=2V,

IOL=16mA

II

Vee = MAX,

VI = 5.5 V

0.2

MAX

0.2

0.4

0.4
1

1

V
V
V
mA

IIH

Vee = MAX,

VI = 2.4 V

40

40

/lA

IlL

Vee.= MAX,

VI = 0.4 V

-1.6

-1.6

mA

IOS§

Vee = MAX

ICCH

VCC = MAX,

VI = OV

ICCL

VCC = MAX,

VI = 4.5 V

- 55

mA

4

8

4

8

mA

12

22

12

22

mA

- 20

- 55

-18

CJ)

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.

W

U

§ Not more than one output should be shorted at a time.

switching characteristics, Vee

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

>
w

(see note 2)
TEST CONDITIONS

PARAMETER

tpLH
AorB

Y

RL =400

n,

MIN

TYP

MAX

UNIT

11

22

ns

7

15

ns

CL = 15 pF

tpHL

C

..J

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

.Jl.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-5

TYPES SN54HOO, SN74HOO
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
recommended operating conditions
SN74HOO

SN54HOO

UNIT

VCC

Supply voltage

V,H

High·level input voltage

V,L

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

0.8

V

- 0.5

- 0.5

mA

20

20

mA

70

°C'

2

IOL

Low·level output current

TA

Operating free-air temperature

- 55

V

2

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

lEI
-t
-t
r0-

C

m

MIN

TYP*

MAX

UNIT

-1.5

V

II = - 8 mA

VOH

VCC = MIN,

V,L = 0.8 V,

IOH = - 0.5 mA

VOL

VCC = MIN,

V,H = 2 V,

'OL=20mA

I,

VCC = MAX,

V, = 5.5 V

"H

VCC = MAX,

V, = 2.4 V

50

p.A

',L

VCC = MAX,

V, = 0.4 V

-2

mA

IOS§

VCC= MAX

-100

mA

ICCH

VCC = MAX,

VI = OV

10

16.8

mA

'CCL

Vee = MAX,

V, = 4.5 V

26

40

mA

2.4

V

3.5
0.2

0.4
1

-40·

V
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 C.
§ Not more than one output should be shorted at a time, and the duration of the short·circuit should not exceed one second.

switching characteristics, Vee = 5 V, T A = 25°e (see note 2)
FROM

TO

(INPUT)

(OUTPUT)

Aor B

Y

PARAMETER

(")

tPLH

en

tpHL

3-6

t

VCC = MIN,

<

m

TEST CONDITIONS

V,K

TEST CONDITIONS

RL=280n,

MIN

TYP

MAX

UNIT

5.9

10

ns

6.2

10

ns

CL = 25 pF

NOTE 2: See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPE SN54LOO
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

recommended operating conditions
SN54LOO
UNIT
Vee

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

MIN

NOM

MAX

4.5

5

5.5

V

0.7

V

2

V

IOH

High·level output current

- 0.1

mA

IOL

Low·level output current

2

mA

TA

Operating free-air temperature

125

De

- 55

electrical characteristics over recommended operating free-air
PARAMETER

TEST CONDITIONS

temperatur~

range (unless otherwise noted)
SN54LOO

t

UNIT
MIN

TYP*

MAX

VOH

Vee

VIL = 0.7 V,

IOH

= -0.1

VOL

Vee = MIN,

VIH=2V,

IOL

=2

II

Vce = MAX,

VI

= 5.5

V
V

10

J.lA

0.3 V

-0.18

mA

= MIN,

IIH

Vee

= MAX,

VI

= 2.4

IlL

Vee

= MAX,

VI

~

IOS§

Vee = MAX

leeH

Vee

= MAX,

VI

=0

leCL

Vec = MAX,

VI

= 4.5

mA

2.4

V

0.3

V

0.1

mA

-15

mA

0.44

0.8

mA

1.16

2.04

mA

-3
V

V

3.3
0.15

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical value"s are at VCC = 5 V, T A = 25°C.

C/)

§ Not more than one output should be shorted at a time.

switching characteristics, Vee
FROM

W

= 5 V, TA = 25°e

CJ

(see note 2)
TEST CONDITIONS

(INPUT)

Y

:>w

60

ns

..J

60

ns

TYP

MAX

35
31

CL = 50 pF .

RL=4kn,

tPHL
NOTE 2:

MIN

(OUTPUT)

tPLH
Aor B

UNIT

TO

PARAMETER

II
C

lI-

See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-7

TYPES SN54LSOO, SN74LSOO
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

recommended operating conditions
SN54LSOO

SN74 LSOO
UNIT

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

2

V

2

IOH

High-level output current

- 0.4

-0.4

mA

IOL

Low-level output current

4

8

mA

TA

Operating free-air temperature

70

°e

125

- 55

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54LSOO

t

SN74LSOO
UNIT

MIN TYP*
VIK

Vee = MIN,

II = -18 mA

VOH

Vee= MIN,

VIL=MAX,

IOH = -0.4 mA

Vee =-MIN,

VIH = 2 V,

IOL = 4 mA

Vee = MIN,

VIH=2V,

IOL=8mA

MAX

MIN TYP*

-1.5

-1.5
2.5

3.4
0.25

MAX

2.7
0.4

0.25

0.4

0.35

0.5

V

VOL

lEI
-t
-t
rC

m
~

n
m
en

II

Vee= MAX,

VI = 7V

0.1

0.1

IIH

Vee= MAX,

VI = 2.7 V

20

20

IJA

IlL

Vee = MAX,

VI=O.4V

-0.4

-0.4

mA

mA

IOS§

Vee = MAX

-100

mA

leeH

Vee = MAX,

VI =OV

0.8

1.6

0.8

1.6

mA

leeL

Vee = MAX,

VI = 4.5 V

2.4

4.4

2.4

4.4

mA

-20

-100

-20

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee

= 5 V, TA = 25°e

.FROM

TO

(INPUT)

(OUTPUT)

A or B

Y

PARAMETER

(see note 2)
TEST CONDITIONS

tPLH
RL = 2 kn,

MIN

TYP

MAX

9

15

ns

10

15

ns

UNIT

eL = 15 p.F

tPHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-8

V
V

3.4

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54S00, SN74S00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
recommended operating conditions
SN74S00

SN54S00

UNIT
MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

IOH

High-level output current

-1

-1

mA

IOL

Low-level output current

20

20

mA

TA

Operating free-air temperature

70

°e

2

V

2

-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)'
PARAMETER

TEST CONDITIONS
~

VIK

Vee ~ MIN,

II

VIL

VOH

Vee ~ MIN,

VOL

Vee

II

Vee ~ MAX,

~

~

MIN,

SN54S00

t

TVPt

2.5

3.4

-18 mA
~

0.8 V,

VIH~2V.

VI

~

SN74S00
UNIT

MIN

MAX

MIN

TVPt

2.7

3.4

-1.2

-1.2
IOH'~

IOL

~

-1 mA
20 mA

5.5 V

MAX
V
V

0.5

0.5

1

1

V
mA

IIH

Vee

MAX,

VI

~

2.7 V

50

50

/loA

IlL

Vee ~ MAX,

VI

~

0.5 V

-2

-2

mA

-100

mA

IOS§

Vee ~ MAX

ICCH

VCC

~

MAX,

VI

~o

ICCL

Vec

~

MAX,

VI

~

-40
V.

4.5 V

-100

-40

10

16

10

16

mA

20

36

20

36

mA

W

u

§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

:>w

switching characteristics, Vee = 5 V, T A = 25°e (see note 2)
FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

MIN

TVP

MAX

UNIT

C

-I

tpLH

3

4.5

ns

3

5

ns

CL=15pF

RL = 280 n,
tpHL
A or B

II
CJ)

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee ~ 5 V, T A ~ 25 0 e.

tt-

V

tpLH

4.5

ns

5

ns

CL = 50 pF

RL=280n,
tPHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

-1.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-9

11
-f
-f

r
C

m

<

(")

m

en

3-10

TYPES SN5401, SN54H01, SN54LS01,
SN7401, SN74H01, SN74LS01
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
REVISED APRIL 1985

SN5401 .•. J PACKAGE
SN54LS01 ... J OR W PACKAGE
SN7401 ... J OR N PACKAGE
SN74LS01 •.• D. J OR N PACKAGE
(TOP VIEW)

• Package Options Include both Plastic and
Ceramic Chip Carriers in Addition to
Plastic and Ceramic DIPS
• Dependable Texas Instruments Quality and
Reliability

1Y
1A
1B
2Y
2A
2B
GND

description
These devices contain four independent 2-input-NAND
gates. The open-collector outputs require pull-up
resistors to perform correctly. They may be connected to
other open-collector outputs to implement active-low
wired-OR or active-high wired-AND functions. Opencollector devices are often used to generate higher VOH
levels.
The SN5401, SN54H01, and SN54LS01 are characterized for operation over the full military temperature
ranges of -55°C to 125°C. The SN7401, SN74H01,
and SN74S01 are characterized for operation from O°C
to 70°C.
FUNCTION TABLE
. INPUTS

(each gate)

VCC
4Y
4B
4A
3Y
3B
3A

SN5401.SN54H01 ••. WPACKAGE
(TOP VIEW)

1A
1B
1Y
VCC
2Y
2A
2B

4Y
4B
4A
GND
3B
3A
3Y

OUTPUT

A

B

Y

H

H

L

SN54H01 ... J PACKAGE
SN74H01 ... J OR N PACKAGE

L

X

H

(TOP VIEW)

X

L

H

1A
1B
1Y
2A
2B
2Y
GND

logic diagram (each gate)

:=O-v

VCC
4B
4A
4Y
3B
3A
3Y

(J)

W

U

>
w
C

...J

SN54LS01 .•. FK PACKAGE
SN74LS01 •.. FN PACKAGE

positive logic

lI-

(TOP VIEW)

u

Y

= A· B

or Y

-uu>-

=A + B

........ Z>-=:I"

3

1B
NC
2Y
NC
2A

2

1 2019

4B
NC
4A
NC
3Y

4
5
6
7

8
9 10 111213

CCQu
w

TEST CONDITIONS

MIN

TVP

MAX

UNIT

C

..J
RL =4 k.n,

eL=15pF

35

55

ns

RL = 400.n,

eL=15pF

8

15

ns

~
~

NOTE 2: See General Information Section for load Circuits and voltage waveforms.

TEXAS"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-13

TYPES SN54H01, SN74H01
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN74H01

SN54H01

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

O.S

O.S

V

5.5

5.5

V

20

20

mA

70

°e

VOH High-level output voltage
IOL

Low-level output current

TA

Operating free-air temperature

- 55

V

2

2

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

11
-I
-I
rC
m

MIN

TEST CONDITIONSt

VIK

Vee = MIN,

11= -S mA

IOH

Vee = MIN,

VIL = O.S V,

VOH=5.5V

VOL

Vee = MIN,

VIH=2V,

IOL = 20 mA

II

Vec = MAX,

VI = 5.5 V

TYP*

0.2

MAX

UNIT

-1.5

V

0.25

mA

0.4
1

V
mA

IIH

Vec = MAX,

VI=2.4V

50

J.lA

IlL

Vee = MAX,

VI = 0.4 V

-2

mA

leCH

Vec = MAX,

VI = OV

10

16.S

mA

IceL

Vee = MAX,

VI=4.5V

26

40

mA

TYP

MAX

10

15

ns

7.5

12

ns

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.

switching characteristics, Vee

:5
nm

=5 V, T A =25°e

FROM

TO

(INPUT)

(OUTPUT)

AorB

Y

TEST CONDITIONS

PARAMETER
tpLH

en

(see note 2)

RL = 280

n.

UNIT

CL = 25 pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-14

MIN

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS01, SN74LS01
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54LS01

SN74LS01
UNIT

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

VOH High·level output voltage
IOL

Low-level output current

TA

Operating free·air temperature

0.7

0.8

V

5.5

5.5

V

4
-55

V
V

2

125

0

8

rnA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74LS01

SN54LS01
PARAMETER

UNIT

TEST eONDITIONSt
MIN

VIK

Vee = MIN,

II = -18 rnA

IOH

Vee = MIN,

VIL = MAX,

TVP*

VOH=5.5V
0.25

MAX

MIN

TVP*

MAX

- 1.5

-1.5

0.1

0.1

0.4

0.25

0.4

0.35

0.5

V
rnA

Vee = MIN,

VIH = 2 V,

IOL = 4 rnA

Vee = MIN,

VIH=2V,

IOL = 8 rnA

II

Vcc = MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

IlA

IlL

Vcc = MAX,

VI = 0.4 V

-0.4

-0.4

rnA

ICCH

Vec = MAX,

VI = 0 V

0.8

1.6

0.8

1.6

rnA

ICCl

Vcc = MAX,

VI = 4.5 V

2.4

4.4

2.4

4.4

rnA

V

VOL

rnA

(..)

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25°C.

switching characteristics, Vee
FROM

= 5 V., T A = 25°e

C

TEST CONDITIONS
(INPUT)

Y

Rl=2kO,

TVP

MAX

UNIT

17

32

ns

15

28

ns

...J

lI-

CL=15pF

tpHl
NOTE 2:

MIN

(OUTPUT)

tpLH
A or B

:>
w

(see note 2)

TO

PARAMETER

en
w

See General Information Section for load circuits and voltage waveforms.

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-15

11
-f
-f
r-

C

m

<

(')

m

en

3-16

TYPES SN5402, SN54L02, SN54LS02, SN54S02,
SN7402, SN74LS02, SN74S02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
REVISED DECEMBER 1983

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

SN5402. SN54L02 ..• J PACKAGE
SN54LS02. SN54S02 .•. J OR W PACKAGE
SN7402 ... J OR N PACKAGE
SN74LS02. SN74S02 ... D. J OR N PACKAGE
ITOPVIEWI

• Dependable Texas Instruments Quality and
Reliability

1Y
1A
1B
2Y
2A
2B
GND

description
These devices contain four independent 2-input-NOR
gates.
The SN5402. SN54L02, SN54LS02 and SN54S02 are
characterized for operation over the full military temperature range of -55°C to 125°C. The SN7402,
SN74LS02 and SN74S02 are characterized for operation from 0 °C to 70°C.

INPUTS

SN5402 ... W PACKAGE
(TOPVIEWI

1A
1B
1Y
VCC
2Y
2A
2B

(each gate)

FUNCTION TABLE

OUTPUT

A

B

Y

H
X

X
H

L

L

L

H

VCC
4Y
4B
4A
3Y
3B
3A

L

4Y
4B
4A
GND
3B
3A
3Y

SN54LS02. SN54S02 ... FK PACKAGE
SN74LS02. SN74S02 ... FN PACKAGE

logic diagram (each gate)

(TOPVIEWI
U
«>-U U>-

........ Z>.q

positive logic

Y

= A. . B

or Y

=

A + B

en

4B
NC
4A
NC
3Y

1B
NC
2Y
NC
2A
COCU«co

•
W
(J

>
W
C

...J

II-

NZZ("t)("t)
t!)

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~ea::s~~rt:r~%iu:~Ot~~~l~~nof~~f~~~~n~e~:~s~

TEXAS

-1.!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-17

TYPES SN5402, SN54L02, SN54LS02, SN54S02,
SN7402, SN74LS02, SN74S02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
schematics (each gate)
'L02

'02

r---~~---'------------'--Vcc

40 kil

20kil

500il

INPUTS
A ---1.----J
A

OUTPUT
y

B

B-+--""'"
~

1 kil

__----~~--------~--GND

~--'~-~-GND

'LS02

'S02

r---------.-----------~.--.--Vcc

20 kil

11

8kil

120il

~-.------.---------~t--Vcc

v

2.8 kil

0.9 kil

50 il

A-.-+.....~.....--I

-I
-I

OUTPUT

~~~~--.----y

r-

B

C
m

<
n
m
en

~~------

__- - - - - - -__---_.--GND

~----------~~--------.....--~~----GND

Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Note 1): '02, 'LS02, 'S02 ................................................ 7 V
'L02 ......................................................... 8 V
Input voltage: '02, 'L02, 'S02 ................................................................ 5.5 V
'LS02 ., ............. ".......................................................... 7 V
Off-state output voltage .............................................................. , ....... , 7 V
Operating free·air temperature range: SN54' ............ " .................... : ....... , .. -55°C to 125°C
SN74' ............................................... oOe to 70°C
Storage temperature range .......................................................... -65°C to 150°C
Supply voltage,

Vee (see

NOTE 1,: Voltage values are with respect to network ground terminal.

3-18

"'!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN5402, SN7402
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
recommended operating conditions
SN5402

SN7402
UNIT

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High·level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2
0.8

0.8

-0.4

-0.4

mA

16

mA

70

°e

16

IOL

Low-level output current

TA

Operating free-air temperature

- 55

V
V

2

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN5402

TEST CONDITIONS t

PARAMETER

SN7402
UNIT

VIK

Vee= MIN,

II = - 12 mA

VOH

Vee= MIN,

VIL=0.8V,

IOH=-O.4mA

VOL

Vee = MIN,

VIH=2V,

IOL=16mA

II

Vee = MAX,

VI = 5.5 V

MIN

TYP*

2.4

3.4

MAX

MIN

TYP*

2.4

3.4

-1.5

0.2

MAX
-1.5

0.4

0.2

1

V
V

0.4
1

V
mAo

IIH

Vee= MAX,

VI = 2.4 V

40

40

/lA

IlL

Vee= MAX,

VI = 0.4 V

-1.6

-1.6

mA

IOS§

Vee = MAX

leeH

Vee = MAX,

VI = 0 V

leeL

Vee= MAX;

See Note 2

- 55

mA

8

- 55
16

8

16

mA

14

27

14

27

mA

- 20

-18

w

u
5=
w

All typical values are at V CC = 5 V, T A = 25 0 C.
§ Not more than one output should be shorted at a time.
NOTE 2: One input at 4.5 V, all others at GND.

switching characteristics, Vee
FROM

= 5 V, TA =25°e (see note 3)

C

TO

PARAMETER

TEST CONDITIONS
(INPUT)

MIN

TYP

MAX

UNIT

12

22

ns

8

15

ns

(OUTPUT)

tPLH
AorB

Y

RL =400

n,

•
en

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.

t

...J

lI-

eL=15pF

tPHL
NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

3-19

TYPE SN54L02
QUADRUPLE 2-INPUlPOSITIVE-NOR GATES
recommended operating conditions
SN54L02
UNIT
Vee

Supply voltage

V,H

High·level input voltage

V'l

low·level input voltage

IOH

High·level output current

MIN

NOM

MAX

4.5

5

5.5

2
0.7

IOl

low·level output current

TA

Operating free·air temperature

V
V
V

-0.1

mA

2

mA

125

°e

- 55

. electrical characteristics over recommended operating free-air temperatur~ range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54L02

t

UNIT
MIN TYP*

II
--i
--i

r-

V

VOH

Vee = MIN,

V,l = 0.7 V,

IOH = -0.1 mA

Val

Vec = MIN,

V'H=2V,

IOL = 2 mA

Vcc = MAX,

V,=5.5.V

"H

Vce = MAX,

V, = 2.4 V

10

/loA

',L

VCC = MAX,

V, = 0.3 V

-0.18

mA

IOS§

VCC = MAX

ICCH

VCC = MAX,

V, =OV

VCC"; MAX,

See Note 2

"

'CCl

2.4

MAX

3.3
0.15

-3

,"OW""

t '0' '0""';0"'
M,N 0' MAX,"" " , " " . " , . "
t All typical values are at VCC = 5 V, T A = 25 0 C.

0.3

V

0.1

mA

-15

mA

0.8

1.6

mA

1.4

2.6

mA

,,'a, ..','"'' ""'" ,",'mm'"'" .,,,,,,",00""';'",.

§ Not more than one output should be shorted at a time.
NOTE 2: One input at 4.5 V, all others at GND.

switching characteristics, Vee

C

m

= 5 V, TA =25°e (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

Aor B

Y

PARAMETER

<

"en

TEST CONDITIONS

tpLH

m

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

TYP

MAX

UNIT

31

60

ns

35

60

ns

Cl = 50 pF

RL =4 kn,

tpHl

3-20

MIN

~

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265

TYPES SN54LS02, SN74LS02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
recommended operating conditions
SN54LS02

SN74LS02
UNIT

Vee

Supply volWge

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

V
V

2

V

0.7

0.8

-0.4

- 0.4

mA

8

mA

70

De

4
- 55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54LS02

t

SN74LS02
UNIT

MIN TYP*

MAX

MIN TYP*

-1.5

VIK

Vee = MIN,

II = -18 rnA

VOH

Vee = MIN,

VIL = MAX,

IOH = - 0.4 mA

Vee = MIN,

VIH = 2 V,

IOl = 4 mA

Vee = MIN,

VIH = 2 V,

IOl=8mA

3.4

2.5

0.25

MAX
-1.5

2.7
0.4

V
V

3.4
0.25

0.4

0.35

0.5

V

VOL

mA

II

Vee = MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

IJA

IlL

Vee = MAX,

VI=O.4V

-0.4

-0.4

mA

IOS§

Vee = MAX

-100

mA

leeH

Vee = MAX,

VI = 0 V

1.6

3.2

1.6

3.2

mA

leel

Vee = MAX,

See Note 2

2.8

5.4

2.8

5.4

mA

- 20

-100

-20

*

:;
w
C

NOTE 2: Ona input at 4.5 V, all others at GND.

FROM

= 5 V, TA = 25 e (see note 3)
D

..J

TO

PARAMETER
tplH'

en

U

§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee

•
w

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
D
All typical values are at Vee = 5 V, T A = 25 e

TEST CONDITIONS
(I NPUTI

(OUTPUT)

A or B

Y

Cl

Rl=2kn,

=

tP!-ll

MIN

TYP

MAX

UNIT

10

15

ns

10

15

ns

lI-

15 pF

NOTE 3: See General Information Section for load circuits and voltage waveforms,

TEXAS

"!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-21

TYPES SN54S02, SN74S02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
recommended operating conditions
SN54S02

SN74S02
UNIT

VCC

Supply voltage

VIH

High-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V
V

2

2

VIL

Low-level input voltage

0.8

0.8

V

IOH

High-level output current

-1

-1

mA

20

mA

70

°c

IOL

Low-level output current

TA

Operating free-air temperature

20
-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS

PARAMETER
VIK
VOH

II....
....
r0C
m

VCC = MIN,
VCC = MIN,

SN54S02

t

TYP*

2.5

3.4

11=-18mA
Vil = 0.8 V,

SN74S02
UNIT

MIN

MAX

MIN

TYP*

2.7

3.4

-1.2

-1.2
IOH = -1 mA
IOL = 20 mA

MAX
V
V

0.5

0.5

1

1

V

VOL

VCC = MIN,

VIH = 2 V,

II

VCC = MAX,

VI = 5.5 V

IIH

VCC = MAX,

VI=2.7V

50

50

IlA

IlL

VCC = MAX,

VI = 0.5 V

-2

-2

mA

-100

mA

-40

-100

-40

mA

IOS§

VCC = MAX

ICCH

VCC= MAX,

VI =0 V

17

29

17

29

mA

ICCl

VCC =MAX,

See Note 2

26

45

26

45

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25°C .
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.
NOTE 2: One input at 4.5 V, all others at GND_

switching characteristics, Vee

<

o

= 5 V, TA = 25°e (see note 3)

FROM

TO

-(INPUT)

(OUTPUT)

PARAMETER

m

en

TEST CONDITIONS

tPLH_
tpHL

MAX

UNIT

3.5

5_5

ns

3.5

5.5

ns

Y

tpLH
RL = 280.n,

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

5

ns

5

ns

CL = 50 pF

tpHL -

3-22

TYP

CL = 15pF

RL = 280.n,
Aor B

MIN

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN5403, SN54L03, SN54LS03, SN54S03,
SN7403, SN74LS03, SN74S03
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
REVISED DECEMBER 1983

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs
• Dependable Texas Instruments Quality and
Reliability

SN5403. SN54L03 •.. J PACKAGE
SN54LS03. SN54S03 •.. J OR W PACKAGE
SN7403 •.• J OR N PACKAGE
SN74LS03. SN74S03 ... D. J OR N PACKAGE
ITOPVIEW)

1A
1B
1Y
2A
2B
2Y
GND

description
These devices contain four independent 2-input NAND
gates. The open-collector outputs require pull-up
resistors to perform correctly. They may be connected to
other open-collector outputs to implement active-low
wired-OR or active-high wired-AND functions. Opencollector devices are often used to generate higher VOH
levels.

SN54LS03. SN54S03 .•. FK PACKAGE
SN74LS03. SN74S03 •.. FN PACKAGE

The SN5403. SN54L03. SN54LS03 and SN54S03 are
characterized for operation over the full military temperature range of -55°C to 125°C. The SN7403,
SN74LS03 and SN74S03 are characterized for operation from 0 °C to 70°C.

FUNCTION TABLE
INPUTS

VCC
4B
4A
4Y
3B
3A
3Y

ITOPVIEW)
U

~ ~ ~ ~~
3

2

1 20 19

4A
NC
4Y
NC
3B

lY
NC
2A
NC
2B

(each gate)
OUTPUT

A

B

Y

9 10 111213

H

L

>-ou>-«

L

H
X

X

L

NZZMM
l!)

H
H

NC - No internal connection

II
en

w
U

>
w
C

logic diagram (each gate)

-I

lI-

:=D-v
positive logic
Y=~orY=A+B

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea:eds~~Ii~arntll·u:~Ot~~~it~~nor~~f~~~~"Je~~res~

~.

TEXAS
INSTRUMENTS

POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-23

TYPES SN5403, SN54L03, SN54LS03, SN54S03,
SN7403, SN74LS03, SN74S03
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
schematics (each gate)
'03

'L03

r-----......- - - Vee

_-----41...---- Vee

A

A

OUTPUT
Y

B
OUTPUT

B

Y
'--....-.__-GN 0

'LS03

'S03
---~---------Vcc

Vee
INPUTS

II

17 k!1

Bk!1

A

INPUTS
B

A

OUTPUT
Y

B

-f
-f

OUTPUT
y

r-

C

m

<

GND

n

m

CJ)
Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1): '03, 'LS03, 'S03 ............................................... 7 V
'L03 ......................................................... 8 V
Input voltage: '03, 'L03, 'S03 ............................................................... 5.5 V
'LS03 ........................................................................ 7 V
Off-state output voltage: 'L03 ................................................................. 8 V
'LS03, 'S03 ........................................................... 7 V
Operating free-air temperature range: SN54' ............................................ _55°C to 125°C
SN74' ............................................... oOe to 70°C
Storage temperature range .......................................................... _65°C to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

3-24

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN5403, SN7403
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN·COLLECTOR OUTPUTS
recommended operating conditions
SN5403

• Vee

Supply voltage

VIH

High-level input voltage

V It_

Low-level Input voltage

SN7403

NOM

MAX

MIN

NOM

MAX

4.6

5

6.6

4.75

6

6.25

2

VOH High-level output voltage.
IOL

Low-level output current

TA

Operating free-air temperature

UNIT

MIN

0.8

0.8

V

5.6

5.6

V

16
-55

V
V

2

125

0

16

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

MIN

TEST CONDITIONSt

VIK

VCC = MIN,

II = -12 mA

IOH

VCC = MIN,

VIL = 0.8 V,

VOH=5.5V

VOL

VCC = MIN,

VIH=2V,

IOL = 16mA

II

VCC = MAX,

VI = 5.5 V

IIH

VCC = MAX,

VI = 2.4 V

IlL

VCC = MAX,

VI = 0.4 V

ICCH

VCC = MAX,

VI =OV

ICCL

VCC = MAX,

VI=4.5V

TYP*

0.2

MAX

UNIT

-1.5

V

0.25

mA

0.4

V

1

mA

40

/.LA

-1.6

mA

4

8

mA

12

22

mA

~

~ All typical values are at

tpHL

(.)

= 5 V, TA = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER
tpLH

w

Vee = 5 V, T A = 25°C.

switching characteristics, Vee

:>w

TEST CONDITIONS

Aor B

II
en

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

MIN

TYP

MAX

UNIT

C

..J

RL=4kn,

CL=15pF

35

45

ns

RL = 400 n,

CL=15pF

8

.15

ns

Y

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265

3-25

TYPES SN54L03 ,
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54L03
UNIT

Vee

Supply voltage

VIH

High-level input vol'tage

VIL

Low-level input voltage

MIN

NOM

MAX

4.5

5

5.5

VOH High -level output va Itage
IOL

Low-level output current

TA

Operating free-air temperature

V
V

2

- 55

0.6

V

5.5

V

2

mA

125

°e

electrical chara,cteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54L03
PARAMETER

UNIT

TEST CONDITIONSt
MIN

-I
-I

r-

TYP*

MAX

0.15

0.3

V

0.1

mA
IlA

50

IOH

Vcc= MIN,

VIL = 0.6 V,

VOL

Vcc = MIN,

VIH=2V,

II

Vcc = MAX,

VI

IIH

Vcc

= MAX,

VI = 2.4 V

10

IlL

Vcc = MAX,

VI = 0.3 V

-0.18

mA

ICCH

Vcc = MAX,

VI =OV

0.44

0.8

mA

ICCL

Vce = MAX,

VI = 4.5 V

1.16

2.04

mA

= 5.5

VOH =5.5 V
IOL = 2 mA

V

IlA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditlons_
All tYpical values are at Vee = 5 V, T A = 25 0 e.

*

switching characteristics, Vee

C

m
~

=5 V, T A = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

A or B

Y

PARAMETER

nm

TEST CONDITIONS

tpLH

rn

RL =4 kn,

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

TYP

MAX

UNIT

60

90

ns

33

60

ns

CL = 50 pF

tPHL

3-26

MIN

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS03, SN74LS03
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54LS03

SN74LS03
UNIT

VCC

Supply voltage

VIH

High-level input voltage

VIL

low-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2
0.7

0.8

VOH High-level output voltage

5.5

5.5

IOL

Low-level output current

4

8

TA

Operating free-air temperature

-55

125

V
V

2

0

70

V
V
mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS03
PARAMETER

SN74LS03
UNIT

TEST eONDITIONSt
MIN

TYP* MAX

MIN

TYP*

MAX

-1.5

- 1.5

0.1

0.1

V

VIK

Vee = MIN,

II = -18 rnA

IOH

Vee = MIN,

Vil = MAX,

VOH = 5.5 V

Vee= MIN,

VIH = 2 V,

IOl = 4 mA

Vee= MIN,

VIH = 2 V"

IOl=8mA

II

Vee= MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

jlA

III

Vcc = MAX,

VI = 0.4 V

-0.4

-0.4

mA

ICCH

Vee= MAX,

VI = OV

0.8

1.6

0.8

1.6

rnA

leel

Vee = MAX,

VI = 4.5 V

2.4

4.4

2.4

4.4

mA

0.25

0.4

0.25

0.4

0.35

0.5

mA
V

Val

mA

FROM

u

tpLH

:>w

= 5 V, TA = 25°e (see note 2)

C

TO
TEST eONDITIO'NS

PARAMETER
(INPUT)

(OUTPUT)

A or B

Y

Rl = 2 kn,

en
w

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 v, T A = 25°C.

switching characteristics, Vee

III

MIN

TYP

MAX

UNIT

17

32

ns

15

28

ns

...J

lI-

Cl=15pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-27

TYPES SN54S03, SN74S03
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54S03

SN74S03
UNIT

Vee

Supplv voltage

VIH

High·level input voltage

VIL

Low-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

VOH High-level output voltage
IOL

Low-level output current

TA

Operating free-air temperature

2

V

0.8

0.8

V

5.5

5.5

V

20

mA

70

°e

20
- 55

V

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

II
-4
-4
r

C
m

MIN

TEST CONDITIONSt

PARAMETER

TYP*

MAX

UNIT

VIK

Vee = MIN,

11=-18mA

-1.2

V

IOH

Vee = MIN,

VIL = 0.8 V,

VOH = 5.5 V

0.25

mA

VOL

Vee= MIN,

VIH = 2 V,

IOL = 20 mA

0.5

II

VCC= MAX,

VI = 5.5 V

1

V
mA

IIH

VCC = MAX,

VI = 2.7 V

50

v.A

IlL

VCC = MAX,

VI = 0.5 V

-2

mA

ICCH

VCC= MAX,

VI =0 V

6

13.2

mA

20

36

mA

leCL

VCC = MAX,

VI = 4.5 V

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.

switching characteristics, Vee

<

PARAMETER

n

m

tpLH

rn

tpHL

FROM
(INPUT)

= 5 V, T A = 25°e
TO
(OUTPUT)

(see note 2)
TEST CONDITIONS

RL = 280 n,
Aor B
tPLH

2

5

7.5

2

4.5

7

UNIT
ns
ns

7.5

ns

7

ns

eL = 50 pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-28

MAX

eL = 15 pF

y
RL=280n,

TYP

MIN

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN5404, SN54H04, SN54L04, SN54LS04, SN54S04,
SN7404,SN74H04,SN74LS04,SN74S04
HEX INVERTERS
REVISED DECEMBER 1983

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

SN5404. SN54H04. SN54L04 ... J PACKAGE
SN54LS04. SN54S04 ... J OR W PACKAGE
SN7404. SN74H04 ... J OR N PACKAGE
SN74LS04. SN74S04 ... D. J OR N PACKAGE
(TOPVIEWI

• Dependable Texas Instruments Quality and
Reliability

1A
1Y
2A
2Y
3A
3Y

description
These devices contain six independent inverters.
The SN5404. SN54H04. SN54L04. SN54LS04 and
SN54S04 are characterized for operation over the full
military temperature range of - 55°C to 125°C. The
SN7404. SN74H04. SN74LS04 and SN74S04 are
characterized for operation from ooe to 70°C.

GND

SN5404. SN54H04 ••. W PACKAGE
(TOPVIEWI

OUTPUT

A

Y

H

L

L

H

1Y
6A
6Y

1A
2Y
2A

FUNCTION TABLE (each inverter!
INPUTS

Vee
6A
6Y
5A
5Y
4A
4Y

GND

Vec
3A
3Y
4A

5Y

SN54LS04. SN54S04 ... FK PACKAGE
SN74LS04. SN74S04 ... FN PACKAGE

logic diagram (each inverter)

(TOPVIEWI

A-{>-Y

U

~ ~ ~ ~~

en
w

2A

4

6Y

NC

5
6
7
8

NC

2Y

NC

positive logic

3A

Y=A

II

5A

NC
5Y

u

:>w
C

..J

lI-

NC - No internal connection

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~n~:::s':a~r,~r~liu~~Ot~~~l~~nor~~f~~~~nJe~~:s~

-I!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-29

TYPES SN5404, SN54H04, SN54L04, SN54LS04, SN54S04,
SN7404, SN74H04, SN74LS04, SN74S04
HEX INVERTERS
schematics (each gate)
'H04

'04:L04

r------1~-------.--vcc

2.S kn

760n

SSn

INPl
A

CIRCUIT

R1

R2

R3

R4

'04

4kn

1.6kn

130n

1kn

'L04

40kn

20 kn

soon

12kn

'LS04

'504

r----.-----------.-vcc
20 k!

II
-f
-f

Skn

120n

INPUT

A-..----.......-L

r-

12kn

C

m

::sn

m

(J)

Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperat!-lre range (unless otherwise noted)
Supply voltage, Vee (see Note 1): '04, 'H04, 'LS04, 'S04 ............................................. 7 V
'L04 .......................................................... 8 V
Input voltage: '04, 'H04, 'L04, 'S04 ............................................................ 5.5 V
'LS04 ......................................................................... 7 V
Operating free-air temperature range: SN54' ............................................. -55 e to 125 e
SN74'. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 0° e to 70° e
Storage temperature range ... ',' ...................................................... -65 e to 150°, e
0

0

NOTE 1: Voltage values are with respect to network ground terminal.

3-30

'TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

0

TYPES SN5404, SN7404

HEX INVERTERS

recommended operating conditions
SN7404

SN5404

UNIT
Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

10H

H igh-Ievcl output current

10L

Low·level output current

TA

Operating free-air temperature

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2
0.8

0.8

- 0.4

- 0.4

16
-55

125

V
V

2

0

V
mA

16

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
UNIT
MIN TYP*
~

SN7404

SN5404

TEST CONDITIONS t

PARAMETER

VIK

Vee

MIN,

II; -12 mA

VOH

Vee; MIN,

VIL;0.8V,

10H; -0.4 mA

VOL

Vee = MIN,

VIH;2V,

10L = 16 mA

MAX

MIN

TYP*

2.4

3.4

-1.5
2.4

3.4
0.2

0.4

0.2

MAX
-1.5

V

0.4

V

V

II

Vee; MAX,

VI; 5.5 V

1

1

IIH

Vee; MAX,

VI

2.4 V

40

40

J.lA

IlL

Vee; MAX,

VI=0.4V

-1.6

-1.6

mA

~

lOS §

Vee; MAX

ICCH

VCC= MAX,

VI = 0 V

ICCL

VCC= MAX,

VI = 4.5 V

mA

- 55

mA

6

12

6

12

mA

18

33

18

33

mA

-20

- 55

-18

w

u

:>w

switching characteristics, Vee = 5 V, T A = 25°e (see note 2)
PARAMETER
tpLH

FROM
(INPUT)

TO
(OUTPUT)

A

Y

TEST CONDITIONS

MIN

TYP

MAX

12

22

ns

8

15

ns

CL=15pF

RL = 400.n,

II
en

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee; 5 V, T A ; 25 0 C.
§ Not more than one output should be shorted at a time.

tpHL

UNIT

C

...J

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-31

TYPES SN54H04, SN74H04

HEX INVERTERS

recommended operating conditions
SN54H04

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low-level input voltage

IOH

High·level output current

SN74H04

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

IOL

Low·level output current
Operating free-air temperature

V

0.8

0.8

-0.5

- 0.5

20
- 55

V

2

2

TA

UNIT

MIN

125

0

V
mA

20

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
~
~

r-

MIN

TEST CONDITIONSt

TVP*

MAX

UNIT

-1.5

V

VIK

Vee = MIN,

11= -8 mA

VOH

Vee= MIN,

VIL = 0.8 V,

IOH = -0.5 mA

VOL

Vee = MIN,

VIH=2V,

IOL = 20 mA

II

Vee= MAX,

VI = 5.5 V

IIH

Vee = MAX,

VI = 2.4 V

50

J1.A

IlL

Vee= MAX,

VI = 0.4 V

-2

mA

3.5

2.4

0.2

V
0.4
1

V
mA

loss

Vee = MAX

-100

mA

leeH

Vee= MAX,

VI = 0 V

16

26

mA

leeL

Vee = MAX,

VI = 4.5 V

40

58

mA

-40

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*All typical values are at VCC = 5 V, T A = 25°C.

§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee = 5 V, TA = 25°e (see note 2)

C

m

PARAMETER

<
nm

FROM
(INPUT)

TO
(OUTPUT)

A

y

tpLH

TEST CONDITIONS

RL

= 280 fl,

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-32

UNIT

TVP

MAX

6

10

ns

6.5

10

ns

eL = 25 pF

tpHL

en

MIN

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPE SN54L04

HEX INVERTERS
recommended operating conditions
SN54L04

UNIT

MIN

NOM

MAX

4.5

5

5.5

V

0.7

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low·level input voltage

IOH

High·level output current

-0.1

IOL

Low·level output current

2

TA

Operating free·air temperature

2

V

-55

125

mA
mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54L04
PARAMETER

TEST CONDITIONSt

UNIT
MIN

TVP*

VOH

Vee = MIN,

VIL = 0.7 V,

IOH=-0.1mA

VOL

Vee = MIN,

VIH=2V,

IOL = 2 mA

II

Vee

= MAX,

VI

= 5.5

IIH

Vee = MAX,

VI

= 2.4 V

10

/-LA

IlL

Vee

VI = 0.3 V

-0.18

mA

= MAX,

IOS~

Vee = MAX

leeH

Vee

leeL

Vee = MAX,

= MAX,

2.4

MAX
V

3.3
0.15

V .

0.3

V

0.1

mA

-15

mA

VI = 0 V

0.66

1.2

mA

VI = 4.5 V

1.74

3.06

mA

-3

t F.or conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25°C.
~ Not more than one output should be shorted at a time.

switching characteristics, Vee
PARAMETER

FROM
(INPUT)

= 5 V, T A = 25°e

TEST CONDITIONS

tpLH
A

V

en
w

(.)

(see note 2)

TO
(OUTPUT)
RL

= 4 kn,

•

MIN

TVP

MAX

UNIT

35

60

ns

31

60

ns

eL = 50 pF

tpHL

:>w
c

~

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-33

TYPES SN54LS04, SN74LS04

HEX INVERTERS

recommended operating conditions
SN74LS04

SN54LS04

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low-level input voltage

IOH

High-level output current

- 0.4

- 0.4

IOL

Low-level output current

4

8

mA

TA

Operating free-air temperature

70

°e

2

V

2

- 55

125

0

mA

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54LS04

t

MIN TYP*

VIK

Vee = MIN,

11=-18mA

VOH

Vee = MIN,

VIL = MAX,

IOH = - 0.4 mA

Vee = MIN,

VIH=2V,

IOL =4 mA

Vee = MIN,

VIH=2V,

IOL =8 mA

SN74LS04
MAX

MIN

TYP*

2.7

3.4

-1.5
2.5

3.4
0.25

-1.5

-I
-I

rC

m

S
(")
m

UNIT
V
V

0.4

0.4
V

VOL

II

MAX

0.25

0.5
mA

II

Vee = MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

IJA

IlL

Vee = MAX,

VI=O.4V

-0.4

-0.4

mA

-100

mA

-100

- 20

-20

IOS§

Vee = MAX

leeH

Vee = MAX,

VI =OV

1.2

2.4

1.2

2.4

mA

leeL

Vee= MAX,

VI=4.5V

3.6

6.6

3.6

6.6

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
~ All typical values are at Vee = 5 V, T A = 25 0 C.
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee
PARAMETER

en

= 5 V, T A = 25°e (see note 2)

FROM
(INPUT)

TO
(OUTPUT)

A

Y

tpLH

TEST CON~ITIONS

RL = 2 kn,

TYP

MAX

UNIT

9

15

ns

10

15

ns

eL=15pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-34

MIN

TEXAS . .
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54S04, SN74S04
HEX INVERTERS
recommended operating conditions
SN54S04

SN74S04

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

V

Vee

Supplv voltage

VIH

High-Iovel input voltage

VIL

Low-Iovel input voltage

0.8

0.8

2

V

2

IOH

High-level output current

-1

-1

mA

IOL

Low-level output current

20

20

mA

TA

Operating free-air temperature

70

°e

- 55

0

125

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN74S04

SN54S04

t

MIN TYP

:I:

MAX

MIN

TYP

:I:

-1.2

VIK

vee = MIN,

11=-18mA

VOH

Vee = MIN,

VIL = 0.8 V,

IOH = - 1 rnA

VOL

Vee = MIN,

VIH = 2 V,

IOL = 20 rnA

II

Vee = MAX,

VI = 5.5 V

2.5

3.4

UNIT
MAX
-1.2

2.7

V
V

3.4

0.5

0.5

1

1

V
rnA

IIH

Vee = MAX,

VI = 2.7 V

50

50

Il A

III

Vee = MAX,

VI = 0.5 V

-2

-2

rnA

IOS§

Vee = MAX

-100

rnA

leCH

Vee= MAX,

leel

= MAX,

Vee

-100 -40

-40
VI =OV

15

24

15

24

rnA

VI = 4.5 V

30

54

30

54

rnA

w
U

switching characteristics, Vee =5 V, T A= 25°e (see note 2)
PARAMETER

FROM
(INPUT I

TO
(OUTPUTI

TEST CONDITIONS

A

MAX

3

4.5

ns

3

5

ns

UNIT

eL = 15 pF

RL=280n,

tpLH

TYP

>
w
C
...I

tplH
tpHl

MIN

II
en

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

lI-

Y
RL = 280 n,

4.5

ns

5

ns

eL = 50 pF

tpHl
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-35

III
-f
-f

r-

C

m

<

nm
rJ)

3-36

TYPES SN5405, SN54H05, SN54LS05, SN54S05,
SN7405, SN74H05, SN74LS05, SN74S05
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS
REVISED DECEMBER 1983

SN5405. SN54H05 .•. J PACKAGE
SN54LS05. SN54S05 .•• J OR W PACKAGE
SN7405.SN74H05 •.. J OR N PACKAGE
SN74LS05.SN74S05 ... D. J OR N PACKAGE
(TOP VIEW)

• Package Options Include Both Plastic and
Ceramic Chip Carriers In Addition to Plastic
and Ceramic DIPs
• Dependable Texas Instruments Quality and
Reliability

lA
lY
2A
2Y
3A
3Y
GND

description
These devices contain six independent inverters .. The
open-collector outputs require pull-up resistors to perform correctly. They may be connected to other opencollector outputs to implement active-low wired-OR or
active-high wired-AND functions. Open collector
devices are often used to generate high VOH levels.
TheSN540~SN54H05.SN54LS05andSN54S05are

SN5405. SN54H05 ••. W PACKAGE
(TOP VIEW)

characterized for operation over the full military temperature range of -55°C to 125°C. The SN7405.
SN74H05. SN74LS05 and SN74S05 are characterized
for operation from 0 °C to 70°C.
FUNCTION TABLE

lA
2Y
2A
VCC
3A
3Y
4A

(each inverter)

INPUT

OUTPUT

A

Y

H
L

L
H

VCC
6A
6Y
5A
5Y
4A
4Y

lY
6A
6Y
GND

SN54LS05. SN54S05 ..• FK PACKAGE
SN74LS05.SN74S05 ... FN PACKAGE
ITOPVIEW)
()

~~~~~

en

logic diagram (each inverter)

A---{>-V

NC
2Y
NC
3A

positive logic

6Y
NC
5A
NC
5Y

w
U

>
w
C

.-....J

Y=A
NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:::s~~rl~ar~liu:~Ot~~~f~~~r~~f:!~~"Je~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-37

TYPES SN5405, SN54H05, SN54LS05, SN54S05,
SN7405, SN74H05, SH74LS05, SN74S05
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS
schematics (each inverter)
'OS, 'H05

'LS05

,-----11,.....----- Vee

~------~-----------Vee

INPUT

y

A

~-----------e_~~_4~GND

-----e~---e_-~._-GND

'S05
~---~-----------Vee

lEI

y

-I
-I

r-

C

m

<

(")

Resistor values are nominal.

m
en
absolute maximu,:" ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1): '05, 'H05, 'LS05, 'S05 ........................................... 7 V
Input voltage: '05, 'H05, 'S05 ............................................................... 5.5 V
'LS05 ........................................................................ 7 V
Off·state output voltage ...................................................................... 7 V
Operating free·air temperature range: SN54' .......... .' ................................. _55°C to 125°C
SN74' ................ '...... -" : ....................... oOe to 70°C
Storage temperature range .......................................................... _65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.

3·38

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN5405, SN7405
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS.
recommended operating conditions
SN5405

SN7405

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

0.8

V

VOH High-level output voltage

5.5

5.5

V

IOL

Low-level output current

16

16

mA

TA

Operating free·air temperature

70

°e

Vee

Supply voltage

VIH

High-level Input voltage

VIL

Low-level Input voltage

2

-55

V

2

125

0

electrical characteristics over recommended operating free-air temperature rar:tge (unless otherwise noted)
PARAMETER

t

TEST eONDITloNst

VIK

Vee = MIN,

II = - 12 mA

IOH

Vee = MIN,

VIL = 0.8 V,

VOH = 5.5 V

VOL

Vee = MIN,

VIH = 2V,

IOL = 16 mA

II

Vee = MAX,

VI = 5.5 V

MIN

TYP*

0.2

MAX

UNIT

-1.5

V

0.25

mA

0.4
1

V
mA

IIH

Vee= MAX,

VI = 2.4 V

40

).LA

IlL

Vee = MAX,

VI = 0.4 V

-1.6

mA

leeH

Vee = MAX,

VI = OV

6

12

mA

leeL

Vee = MAX,

VI = 4.5 V

18

33

mA

en

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*All typical values are at Vee = 5 V, T A = 25°C.
switching characteristics, Vee = 5 V, TAo = 25°e
FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

A
tpHL

w
U

(see note 2)

>
w

TEST CONDITIONS

tpLH

II

MIN

TYP

MAX

UNIT

C

..J

RL = 4 kn,

eL = 15 pF

40

55

ns

RL=400n,

eL = 15 pF

8

15

ns

Y

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-39

TYPES SN54H05, SN74H05
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54H05

SN74H05
UNIT

Vee

Supply voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

,V

V

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

VOH

High-level output voltage

5.5

5.5

V

IOL

Low-level output current

20

20

mA

TA

Operating free-air temperature

70

°e

2

- 55

V

2

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

lEI
-I
-I
rC

MIN

TEST eONDITIONSt

TYP*

MAX

UNIT

-1.5

V

0.25

mA

VIK

Vee = MIN,

11= -8 mA

IOH

Vee = MIN,

VIL = 0.8 V,

VOH= 5.5 V

VOL

Vee = MIN,

VIH =2 V,

IOL = 20 mA

II

Vee = MAX,

VI = 5.5 V

IIH

Vee = MAX,

VI=2.4V

50

IlA

IlL

Vee = MAX,

VI=O.4V

-2

mA

leeH

Vee = MAX,

VI =OV

16

26

mA

leeL

Vee = MAX,

VI =4.5 V

40

58

mA

0.2

0.4
1

V
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*All typical values are at Vee = 5 V, T A = 25 e.
0

switching characteristics,Vee

m

<
n
m
rn

= 5 V, T A = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

A

y

TEST CONDITIONS

PARAMETER
tPLH

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

TYP

MAX

UNIT

10

15

ns

7.5

12

ns

eL = 25 pF

RL = 280 51,

tpHL

3-40

MIN

"'!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS05, SN74LS05
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SNS4LSOS

SN74LSOS
UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.7

0,8

V

VOH

High-level output voltage

5.5

5,5

V

V

2

2

8

mA

70

°e

4

IOL

Low-level output current

TA

Operating free-air temperature

125

- 55

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SNS4LSOS
PARAMETER

SN74LSOS
UNIT

TEST eONDITIONSt
MIN

VIK

Vee = MIN,

11=- 18 mA

IOH

Vee = MIN,

VIL = MAX,

Vee = MIN,

VIH=2V,

IOL = 4 mA

Vee = MIN,

VIH=2V,

IOL = 8 mA

TYP*

VOH=5.5V
0.25

MAX

MIN

TYP*

MAX

-l.S

-1.5

0.1

0.1

0.4

0.25

0,4

0.35

0.5

V
mA
V

VOL
II

Vee = MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

mA
IJA

IlL

Vee = MAX,

VI = 0.4 V

-0.4

-0.4

mA

leeH

Vee = MAX,

VI = OV

1.2

2.4

1.2

2.4

mA

leeL

Vee = MAX,

VI = 4.5 V

3.6

6.6

3,6

6.6

mA

FROM

C

-J

TO
TEST CONDITIONS

(INPUT)

(OUTPUT)

A

Y

RL = 2 kn,

MIN

TYP

MAX

17

32

ns

15

28

ns

UNIT

....
....

CL=lSpF

tpHL
NOTE 2:

w

:>w

= 5 V, T A =25°e (see note 2)

PARAMETER

tPLH

en

u

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at V CC = 5 V, T A = 25 0 C'.

switching characteristics, Vee

II

See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 .. DALLAS, TEXAS 75265

3-41

TYPES SN54S05, SN74S05
HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS

recommended operating conditions
SN54S05

SN74S05

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

0.8

V

VOH High·level output voltage

5.5

5.5

V

IOL

Low·level output current

20

20

mA

TA

Operating free·air temperature

70

°C

VCC

Supply voltage

VIH

High.level input voltage

VIL

Low·level input voltage

2

V

2

- 55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54S05

t

lIB
-I
-I

r-

C

SN74S05
UNIT

MIN

TYP* MAX

MIN

TYP* MAX

VIK

VCC; MIN,

11;-18mA

IOH

VCC; MIN,

VIL; 0.8 V,

VOH; 5.5 V

VOL

Vec; MIN,

VIH;2V,

IOL

II

VCC; MAX,

VI; 5.5 V

IIH

Vcc; MAX,

VI; 2.7 V

50

50

p.A

IlL

Vcc= MAX,

VI = 0.5 V

-2

-2

mA

ICCH

VCC; MAX,

VI ;QV

ICCL

Vec; MAX,

VI=4.5V

=

20mA

-1.2

-1.2

V

0.25

0.25

mA

0.5

0.5

1

1

V
mA

9

19.8

9

19.8

mA

30

54

30

54

mA

TYP

MAX

2

5

7.5

2

4.5

7

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee; 5 V, T A; 25 0 e.

switching characteristics, Vee

m

<

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

n
m
rn

= 5 V, TA = 25°e

(see note 2)
TEST CONDITIONS

tpLH
RL; 280

n,

CL;15pF

tpHL
A
tpLH

RL; 280

3-42

UNIT
ns
ns

Y

tpHL
NOTE 2:

MIN

n,

CL = 50 pF

See General Information Section for load circuits and voltage waveforms.

TEXAS

-I.!I

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

7.5

ns

7

ns

TYPES SN5406, SN5416, SN7406, SN7416
HEX INVERTER BUFFERSIDRIVERS WITH
OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
REVISED DECEMBER 1983

SN5406, SN5416 ... J OR W PACKAGE
SN7406, SN7416 ... J OR N PACKAGE

• Converts TIL Voltage Levels to MOS Levels
•

High Sink-Current Capability

•

Input Clamping Diodes Simplify System
Design

(TOP VIEW)

1A

• Open-Collector Driver for Indicator Lamps
and Relays
•

Vee

1

6A
6Y
5A
5Y

1Y
2A
2Y
3A
3Y
GND

Inputs Fully Compatible with Most TIL
Circuits

description
These monolithic TIL hex inverter buffers/drivers feature high-voltage open-collector outputs for interfacing with high-level
circuits (such as MOS), or for driving high-current loads (such as lamps or relays), and are also characterized for use as inverter buffers for driving TIL inputs. The SN5406 and SN7406 have minimum breakdown voltages of 30 volts and the
SN5416 and SN7416 have minimum breakdown voltages of 15 volts. The maximum sink current is 30 milliamperes.for the
SN5406 and SN5416, and 40 milliamperes for the SN7406 and SN7416.

logic diagram

schematic
'06, '16
~--------~~--~------Vcc

A-{>-V

1.6 kn
OUTPUT

INPUT

y

A

II
en
w

U

>
w

- positive logic

C

Y=A
L......------~t_---+--~t_--......-

GND

...J

....

....
Resistor values shown are nominal.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-43

TYPES SN5406, SN5416, SN7406, SN7416
HEX INVERTER BUFFERSIDRIVERS WITH
OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ............................................................... 7 V
Input voltage (see Note 1) .................................................................... 5.5 V
Output voltage (see Notes 1 and 2): SN5406, SN7406 Circuits ....................................... 30 V
SN5416, SN7416 Circuits ...................... , ................ 15 V
Operating free·air temperature range: SN5406, SN5416 Circuits ..... ; ....................... - 55°C to 125°C
SN7406, SN7416 Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
NqTES: 1. Voltage values are with respect to network ground terminal.
2. This is the maximum voltage which should be applied to any output when it is in the off state.

recommended operating conditions
SN5406

SN7406

SN5416
Supply voltage

Vee

VIH' High-level input voltage
low-level input voltage
Vil
VOH

Ell

SN7416

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

0.8

V

2

High-level output voltage

IOl

low-level output current

TA

Operating free·air temperature

UNIT

MIN

V

2

I

'06

30

30

I

'16

15

15

30
- 55

125

40
0

70

V
mA
De

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONSt
MIN

-f
-f

SN5406

SN7406

SN5416

SN7416

TYP*

MAX

MIN

TYP*

UNIT
MAX

-1.5

-1.5

V

0.25

0.25

mA

llOl-16mA

0.4

0.4

IIOl = I;!

0.7

0.7

1

1

VIK

Vee = MIN,

11=-12mA

r

IOH

Vee = MIN,

Vil = 0.8 V,

C

VOL

Vee = MIN,

VIH = 2 V

m

<

II

Vee = MAX,

VI = 5.5 V

IIH

Vee = MAX,

VIH = 2.4 V

40

40

IJA

("')

III

Vee = MAX,

Vil = 0.4 V

-1,6

-1.6

mA

en

leeH

Vee = MAX

30

48

30

48

mA

leel

Vee = MAX

32

51

32

51

mA

m

VOH = §

V
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
.
§ VOH = 30 V for '06 and 15 V for '16.
I;! IOL = 30 mA for SN54' and 40 mA for SN74'.

t All typical values are at Vee = 5 V, T A = 25De.

switching characteristics, Vee
PARAMETER
tPlH
tPHl

= 5 V, TA = 25°e (see note 3)

FROM

TO

(lNPun

(OUTPUT)

A

y

TEST CONDITIONS
el=15pF

Rl=110n

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-44

TEXAS

-II}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

UNIT

TYP

MAX

10

15

ns

15

23

ns

TYPES SN5407, SN5417, SN7407, SN7417
HEX BUFFERSIDRIVERS WITH
OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
REVISED DECEMBER 1983

• Converts TTL Voltage Levels to MOS Levels

SN5407. SN5417 ... J OR W PACKAGE
SN7407. SN7417 ... J OR N PACKAGE

• High Sink-Current Capability

(TOP VIEW)

• Input Clamping Diodes Simplify System
Design

1A
1Y
2A
2Y
3A
3Y
GND

• Open-Collector D,river for Indicator Lamps
and Relays
• Inputs Fully Compatible with Most TTL
Circuits

VCC
6A
6Y
5A
5Y
4A
4Y

description
These monolithic TTL hex buffers/drivers feature high-voltage open-collector outputs for interfacing with high-level circuits
(such as MOS), or for driving high-current loads (such as lamps or relays), and are also characterized for use as buffers for
driving TTL inputs. The SN5407 and SN7407 have minimum breakdown voltages of 30 volts and the SN5417 and SN7417
have minimum breakdown voltages of 15 volts. The maximum sink current is 30 milliamperes for the SN5407 and SN5417,
and 40 milliamperes for the SN7407 and SN7417.
These circuits are completely compatible with most TTL families. Inputs are diode-clamped to minimize transmission-line effects which simplifies design. Typical power dissipation is 145 milliwatts and average propagation delay time is 14
nanoseconds. The SN5407 and SN5417 are characterized for operation over the full military temperature range of -,55 ° C to
125° C; the SN7407 and SN7417 are characterized for operation from 0° C to 70 0 C.

schematic

logic diagram (each gate)

'07, '17
~----~~--~'-------Vcc

A-{>-Y

1.6 kn

II
U)

W

U

INPUT
A
OUTPUT

y

>
w
C

positive logic (each gate)

.....I
L--~'---""---4~--""- GND

Y=A

tt-

Resistor values shown are nominal.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments
standard warranty. Production yrocessin g does
n,ot neces.sarily include testing 0 all parameters.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 2250,12 • DALLAS, TEXAS 75265

3-45

TYPES SN5407, SN5417, SN7407, SN7417
HEX BUFFERSIDRIVERS WITH
OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage Vcc (see Note 1) ................................................................ ] V
Input voltage (see Note 1) ................................................................... 5.5 V
Output voltage (see Notes 1 and 2): SN5407, SN7407 Circuits ...................................... 30 V
SN5417,SN7417 Circuits ...................................... 15 V
Operating free-air temperature range: SN5407, SN5417 Circuits ............................ - 55°C to 125°C
SN7407, SN7417 Circuits ................................ OoC to 70°C
Storage temperature range .......................................................... - 65°C to 150°C
NOTES: 1. Voltage values are with respect to network ground terminal.
2. This is the maximum voltage. which should be applied to any output when it is in the off state.

recommended operating conditions

Vee

SupplV voltage

VIH

High-level input voltage

VIL

Low-level input voltage

VOH

High-level output voltage

IOL

Low-level output current

TA

Operating free-air temperature

SN5407

SN7407

SN5417

SN7417

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

I
I

UNIT

MIN

'07
'17

-55

V
V

2
0.8

0.8

30

30

V
V

15

15

30

40

mA

70

°e

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

111

TEST CONDITIONS t

PARAMETER

MIN

-I
-I
r

VIK

Vee = MIN,

11=-12mA

IOH

Vee = MIN,

VIL

VOL

Vee = MIN,

VIH = 2 V

= 0.8

V,

SN5407

SN7407

SN5417

SN7417

TYP* MAX

VOH- §

MIN

UNIT

TYP* MAX

-1.5

-1.5

V

0.25

0.25

mA

I

IOL = 16 rnA

0.4

0.4

I

IOL = t;I

0.7

0.7

1

1

mA
mA

V

C

II

Vee = MAX,

VI = 5.5 V

<

IIH

Vec = MAX,

VIH = 2.4 V

40

40

IlL

Vee = MAX,

VIL=0.4V

-1.6

-1.6

mA

leeH

Vee - MAX

29

41

29

41

rnA

leeL

Vee = MAX

21

30

21

30

mA

TYP

MAX

6

10

ns

20

30

ns

m

("')

m

C/)

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V cc = 5 V, T A = 25° C.
VOH = 30 V for '07 and 15 V for '17.
IOL = 30 mA for SN54' and 40 mA for SN74'.

switching characteristics, Vee
PARAMETER
tPLH

= 5 V, T A = 25°e

FROM

TO

(INPUT)

(OUTPUT)

A

Y

(see note 3)
TEST CONDITIONS

RL=110n,

CL = 15 pF

tPHL
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-46

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MIN

'UNIT

TYPES SN5408, SN54LS08, SN54S08,
, SN7408, SN74LS08, SN74S08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
REVISED DECEMBER 1983

•

Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to
Plastic and Ceramic DIPs

SN5408. SN54LS08. SN54S08 ... J OR W PACKAGE
SN7408 ... J OR N PACKAGE
SN74LS08.SN74S08 ... D. J ORN PACKAGE
(TOP VIEW)

Dependable Texas Instruments Quality
and Reliability

VCC
4B
4A
4Y

description
2A
2B
2Y
GND

These devices contain four independent 2-input AND
gates.
The SN5408, SN54LS08, and SN54S08 are characterized for operation over the full military temperature
range of - 55 D C to 125 D C. The SN7408, SNl4LS08
and SN74S08 are characterized for operation from
ODC to lODC.

SN54LS08. SN54S08 ... FK PACKAGE
SN74LS08. SN74S08 ... FN PACKAGE
(TOP VIEW)

u

~ ~ ~ ~~
FUNCTION TABLE (each gate)
3

INPUTS

OUTPUT

A

B

Y

H

H

H

L

X

L

X

L

L

1Y
NC
2A
NC
2B

2

1 20 19

4
5
6
7

8

14

4A
NC
4Y
NC
3B

9 1011 1213

logic diagram (each gate)

:=O-v

NC - No internal connection

CJ)

W

U

>
w

positive logic
Y = A· B or Y =

,0

A+B

...J

....
....

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-47

TYPES SN5408, SN54LS08, SN54S08,
SN7408, SN74LS08, SN74S08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
schematics (each gate)
'LSOB

'08

~--~~---.----------~--Vcc

20kil
INPUTS
A_....._

10kil

8kil

120il

......

B---+-......
OUTPUT
Y

A
B

~~------'-'-~---'----""'--GND

'SOB
~----~~--~~------~,--Vcc

2kil

2.8kil

gooil

50il

A .......- - - '

OUTPUT
y

B-t--~---..J

.-t
-t

rC
m

::s

n

m
en

~-'----'--~-GND

Resistor values are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage: 'OB, 'SOB .................................................................... 5.5 V
'LSOB ........................................................................ 7 V
Operating free-air temperature range: SN54' ............................................ _55°C to 125°C
SN74' ............................................... oOe to 70°C
Storage temperature range ........................................................... -65°e to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

3-48

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN5408, SN7408
QUADRUPLE 2-INPUT POSITIVE-AND GATES
recommended operating conditions
SN740a

SN540a

UNIT

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

0.8

0.8

- 0.8

-0.8

mA

16

mA

70

°e

16
- 55

V
V

2

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS
~

Vee

VOH

Vee ~ MIN,

VOL

VCC

II

Vee ~ MAX,

VI

~

MIN,

TYP*

2.4

3.4

IOH

~

- 0.8 mA

~

IOL

~

16 mA

0_8 V,

MAX

MIN

TYP*

2.4

3.4

-1.5

VIH~2V,

VIL

SN740a
UNIT

MIN
11~-12mA

VIK

~

MIN,

SN5408

t

0.2

-1.5

0.4

0.2

1

5.5 V

MAX
V
V
0.4

V

1

mA

IIH

Vee ~ MAX,

VI

~

2.4 V

40

40

.IJA

IlL

Vee ~ MAX,

VI

~

0.4 V

-1.6

-1.6

mA

IOS§

Vee ~ MAX

-55

mA

leeH

Vee = MAX,

leeL

Vee

~

MAX,

- 20

- 55

VI = 4.5 V
VI

~

0 V

-18

11

21

11

21

mA

20

33

20

33

mA

U

§ Not more than one output should be shorted at a time.

switching characteristics, Vee

= 5 V, T A = 25°e

>
w

(see note 2)

C

.;.J

FROM

TO

(INPUT)

(OUTPUT)

AorB

Y

PARAMETER

TEST CONDITIONS

tpLH
RL

~

400 .0.,

CL

= 15 pF

tpHL
NOTE 2:

en
w

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at V CC ~ 5 V, T A = 25°C.

MIN

TYP

MAX

17_5

27

ns

12

19

ns

UNIT

lI-

See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 eDALLAS. TEXAS 75265

3-49

TYPES SN54LS08, SN74LS08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
recommended operating conditions
SN54LS08

SN74LSoa
UNIT

Vee

Supply voltage

VIH

High-level input voltage

VIL'

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

V
V

2

V

0.7

0.8

- 0.4

-0.4

mA

8

mA

70

°e

4
125

- 55

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54LSOS

t

SN74LS08
UNIT

MIN TYP*
VIK

Vee = MIN.

II = -18 mA

VOH

Vee = MIN.

VIH = 2 V.

IOH = -0.4 mA

Vee = MIN,

VIL = MAX,

IOL = 4 mA

Vee = MIN,

VIL = MAX,

IOL = 8 mA

MAX

MIN TYP*

-1.5

- 1.5
3.4

2.5

2.7
0.4

0.25

MAX

0_25

0.4

0.35

0.5

V

VOL

lEI
-I
-I

r-

C

m

S
(')

V
V

3.4

mA

II

Vee= MAX,

VI = 7 V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

J.lA

IlL

Vee = MAX,

VI = 0.4V

-0.4

-0.4

mA

IOS§

Vee = MAX

leeH

Vee = MAX,

VI = 4.5 V

leeL

Vee = MAX,

VI = OV

-100

-20
I

-20

-100

mA

2.4

4.8

2.4

4.8

mA

4.4

8.8

4.4

8.8

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
~ All typical values are at Vee = 5 V, T A = 25 0 e
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

switching characteristics, Vee

m

en

= 5 V, TA = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

Aor B

Y

PARAMETER

TEST CONDITIONS

tpLH
RL=2kn.

eL = 15 pF

tPHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-50

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TYP

MAX

UNIT

8

15

ns

10

20

. ns

TYPES SN54S08, SN74S08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
recommended operating conditions
SNS4S08

SN74S08

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

V

IOH

High·level output current

-1

-1

mA

20

mA

70

°c

2

IOL

Low-level output current

TA

Operating free-air temperature

20

electrical characteristics over

- 55

~ecommended

0

operating free-air temperature range (unless otherwise noted)

TEST CONDITIONS

PARAMETER

125

V
V

2

SN74S08

SNS4S08

t

UNIT
MIN

TYP*

MAX

MIN

TYP*

-1.2

-1.2

VIK

Vcc; MIN,

11;-18mA

VOH

VCC; MIN,

VIH;2V,

IOH; -1 mA

VOL

Vce; MIN,

VIL;0.8V

IOL

II

Vee = MAX,

VI = 5.5 V

= 20

2.5

2.7

3.4

mA

MAX
V
V

3.4

0.5

0.5

1

1

V
mA

IIH

Vee; MAX,

VI; 2.7 V

50

50

JlA

IlL

Vee; MAX,

VI = 0.5 V

-2

-2

mA

IOS§

Vee

-100

mA

ICCH
lecL

Vce; MAX,
Vee; MAX,

-100

-40

= MAX

18

VI = 4.5 V

32

VI = OV

-40

32

18

32

mA

57

32

57

mA

en
w

t For conditions shown as MIN or MAX, use the appropriate value specitied under recommended operating conditions.
t All typical values are at Vee; 5 V, T A = 25 0 e.

(.)

§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

>
W

switching characteristics, Vee = 5 V, T A = 25°e (see note 2)

C
FROM

TO

PARAMETER

TEST CONDITIONS
(INPUT)

TYP

MAX

UNIT

4,S

7

ns

5

7.5

ns

(OUTPUT)

tpLH
RL

= 280 n,

--I

l-

t-

eL:" 15 pF

tpHL
Aor B

MIN

Y

tpLH
RL; 280

n,

eL; SO pF

tpHL

6

ns

7.S

ns

NOTE 2: See General Information Section for load circuits and voltage waveforms.

1'>.

TEXAS ~
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-51

TYPES SN5409, SN54LS09, SN54S09,
SN7409, SN74LS09, SN74S09
QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
REVISED DECEMBER 1983

•

Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to
Plastic and Ceramic DIPs

•

Dependable Texas Instruments Quality
and Reliability

SN5409. SN54LS09. SN54S09 •.. J OR W PACKAGE
SN7409 •.• J OR N PACKAGE
SN74LS09. SN74S09 •.• D. J OR N PACKAGE
ITOPVIEWI

1A
1B
1Y
2A
2B
2Y
GND

description
These devices contain four independent 2-input AND
gates. The open-collector outputs require pull-up
resistors to perform correctly. They may be connected
to other open-collector outputs to implement active-low
wired-OR or active-high wired-AND functions. Opencollector devices are often used to generate higher
VOH levels.

VCC
4B
4A
4Y
3B
3A
3Y

SN54LS09. SN54S09 ••• FK PACKAGE
SN74LS09. SN74S09 ••• FN PACKAGE
ITOPVIEWI
()

~ ~ ~ ~~

The SN5409, SN54LS09, and SN54S09 are characterized for operation over the full. military temperature
range of -55°C to 125°C. The SN7409, SN74LS09
and SN74S09 are characterized for operation from ooC
to 70°C.

1Y
NC
2A
NC
2B

FUNCTION TABLE leach gatel
tNPUTS

II
-4
-4

r-

OUTPUT

A

B

H

H

H

L

X

L

X

L

L

Y

NC· No internal connection

logic diagram (each gate)

C

m

$

nm

tn

positive logic

Y = A· B or Y =

A+ B

PRODUCTION DATA

This document contains information current as
3- 5 2

~~ecffi:!~~~~~o~er ~~!eier~~OoW!~ascl~~!~~:en~~
~~~nndea::s:;;~fI~r~liu:~Ot~~~~~:nof~~f~~~'::e~:~s~

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

4A
NC
4Y
NC
3B

TYPES SN5409, SN54LS09, SN54S09,
SN7409, SN141S09, SN74S09
QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN--COLLECTOR OUTPUTS
schematics (each gate)
'LS09

'09

~--~'---~--------Vcc

~------~-------4~----Vcc

A -...--HII'--"

B-+-.....~......--l

~......------~--~--~--~~GND

'S09
~------""'--~~------------Vcc

II

A----....---J

en

w
CJ

B-+----<~

L-----4I~---....-----4I.....-

:>w

GND

C

Resistor values shown are nominal.

..J

lI-

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ...... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage: '09, 'S09 .................................................................... 5.5 V
'LS09 ........................................................................ 7 V .
Off·state output voltage .............................................................. , ....... 7 V
Operating free·air temperature range: SN54' ........................................... _55°C to 125°C
SN74' .............................................. oOe to 70°C
Storage temperature range .......................................................... -65°e to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-53

TYPESSN5409, SN7409
QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS

recommended operating conditions
SN7409

SN5409

UNIT

VCC

Supply voltage

VIH

High-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V
V

2

2

VIL

Low-level input voltage

0.8

0.8

VOH

High-level output voltage

5.5

5.5

IOL

Low-level output current

16

16

rnA

TA

Operating free-air temperature

70

°c

125

- 55

0

V
V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
-f
-f

r-

VIK

VCC; MIN,

II; -12 rnA

IOH

VCC; MIN,

VIH; 2 V,

VOH; 5.5 V

VOL

VCC; MIN,

VIL;0.8V

IOL;16mA

II

VCC; MAX,

VI = 5.5 V

0.2

V

0.25

rnA

0.4

V
rnA

VI = 2.4 V

40

pA

VCC = MAX,

VI = 0.4 V

·-1.6

rnA

ICCH

VCC = MAX,

VI=4.5V

11

21

rnA

ICCL

VCC = MAX,

VI =OV

20

33

rnA

""II'" '",.,

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

Aor B

Y

~"mm."'.'

,,...,,",00"""'"'.

(see note 2)
TEST CONDITIONS

tPLH

MIN

TYP

MAX

21

32

ns

16

24

ns

CL=15pF

RL=400n,

tPHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-54

-1.5

VCC = MAX,

PARAMETER

m

UNIT

IIH

switching characteristics, Vee

C')

MAX

IlL

0

S

TYP*

1

',<0,""",", ,h,w" .. MIN", MAX, ,""" .,,,,,d.., "I"
*t All
typical values are at Vee = 5 V, TA = 25 C.

C
m

en

MIN

TEST CONDITIONSt

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

TYPES SN54LS09, SN74LS09
QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN54LS09

SN74LS09
UNIT

Vee

Supply voltage

VIH

High-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

2

V
V

VIL

Low-level input voltage

0.7

0.8

VOH

High-level output voltage

5.5

5.5

IOL

Low-level output current

4

8

mA

TA

Operating free-air temperature

70

°e

- 55

125

0

V
V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS09
PARAMETER

SN74LS09
UNIT

TEST CONDITIONSt
MIN

VIK

Vee = MIN,

11=- 18 mA

IOH

Vec = MIN,

VIH=2V,

Vcc = MIN,

VIL = MAX,

IOL =4 mA

VCC = MIN,

VIL = MAX,

IOL =8 mA

TYP*

VOH = 5.5 V
0.25

MAX

MIN

TY~*

MAX

-1.5

-1.5

0.1

0.1

0.4

0.25

0.4

0.35

0.5

V
mA
V

VOL
II

VCC = MAX,

VI = 7 V

0.1

0.1

IIH

VCC = MAX,

VI = 2.7 V

20

20

mA
/loA

IlL

VCC = MAX,

VI = 0.4 V

-0.4

-0.4

mA

ICCH

VCC = MAX,

VI=4.5V

2.4

4.8

2.4

4.8

mA

leCL

VCC = MAX,

VI =OV

4.4

8.8

4.4

8.8

mA

en

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.

switching characteristics, Vee
PARAMETER
tPLH
tpHL

w
U

= 5 V, T A = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

Aor B

Y

>
w

TEST CONDITIONS
RL = 2 kn,

II

CL=15pF

MIN

TYP

MAX

UNIT

20

35

ns

17

35

ns

C

...J

JJ-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-55

TYPES SN54S09, SN74S09
QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN74S09

SN54S09

Vec

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

VOH High.level output voltage
IOL

Low·level output current

TA

Operating free·air temperature

V
V

2
0.8

0.8

V

5.5

5.5

V

20

mA

70

°e

20
125

- 55

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

EI
-I
-I

rC

VIK

Vee= MIN,

II =-18 mA

IOH

Vee = MIN,

VIH = 2V,

VOL

Vee = MIN,

VIL = 0.8 V,

II

Vee = MAX,

VI = 5.5 V

-1.2

V

VOH = 5.5 V

0.25

mA

IOL =20mA

0.5
1

VI = 2.7 V

50

J.lA

VI=0.5V

-2

mA

IceH

Vce = MAX,

VI=4.5V

18

32

mA

IceL

Vce = MAX,

VI =OV

32

57

mA

MAX,,~

"""",.u .",' ","",' ,p,,,

""
All typical values are at Vee = 5 V, T A = 25 0 e.

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

~"mm'p'"

"P"",,p, O"P",""P',

(see note 2)
TEST CONDITIONS

tpLH
RL = 280
Aor B

n,

MIN

TYP

MAX

UNIT

6.5

10

ns

6.5

10

ns

eL=15pF

Y

tpLH
RL = 280

n,

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

9

ns

9

ns

CL = 50 pF

tpHL

3-56

V
mA

Vee = MAX,

tPHL

(J)

UNIT

Vee = MAX,

PARAMETER

S
nm

MAX

IIH

switching characteristics, Vee

m

TYP*

IlL

t '"' O"P"""P' '""_ .. MIN",

t

MIN

TEST eONDITIONSt

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN5410, SN54H10, SN54L10, SN54LS10, SN54S10,
SN7410, SN74H10, SN74LS10, SN74S10
TRIPLE 3-INPUT POSITIVE-NAND GATES
REVISED DECEMBER 1983

•

Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

•

Dependable Texas Instruments Quality and
Reliability

SN5410. SN54H10. SN54L 10 ... J PACKAGE
SN54LS10. SN54S10 .•. J OR W PACKAGE
SN7410; SN74H10 ... J OR N PACKAGE
SN74LS10. SN74S10 ... D. J OR N PACKAGE
(TOP VIEW)

1A
1B
2A
2B
2C
2Y
GND

description
These devices contain three independent 3-input NAND
gates.
The SN5410, SN54H10, SN54L10, SN54LS10 and
SN54S10 are characterized for operation over the full
military temperature range of - 55°C to 125°C. The
SN7410, SN74H10, SN74LS10 and SN74S10 are
characterized for operation from OoC to 70°C.

FUNCTION TABLE
INPUTS

SN5410. SN54H10 '" W PACKAGE
(TOP VIEW)

1A
1B
1Y
VCC
2Y
2A
2B

(each gate)
OUTPUT

Y

A

B

C

H

H

H

L

L

X

X

H

X

L

X

H

X

X

L

H

VCC
1C
1Y
3C
3B
3A
3Y

9

1C
3Y
3C
GND
3B
3A
2C

SN54LS10. SN54S10 •.. FK PACKAGE
SN74LS10. SN74S10 ... FN PACKAGE
(TOP VIEW)
U

g".,
!~<,

'

."

.

en
w

~::: ~ ~~
logic diagram (each gate)

U
2A
NC
2B
NC
2C

1Y
NC
3C
NC
3B

>
w
C

..J

lI-

positive logic

Y=~orY=A+B+C

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea;eds~.~[I~int~iu~~Ot~~~~~nOr~~I~~~~~et~res~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-57

.'

.TYPES SN5410, SN54H10, SN54L10, SN54LS10,
SN54S10, SN7410, SN74H10, SN74LS10, SN74S10
TRIPLE 3·INPUT POSITIVE·NAND GATES
schematics (each gate)
'Hl0

,....----..---.-- Vcc

~--~~------~~VCC

2.8 kil

760il

58il

INPUTS
A
B

B

C --II--i........

c--+--+-e

CIRCUIT

Rl

R2

R3

R4

'10

4kr2

1.6 kr2

130r2

1 kr2

'LtO

40kr2

20 kr2

500 r2

12 kr2

Input clamp diodes not on SN54L 10 circuit.

'LS10

'S10
~---~'-----'--Vcc

2Okr2

11

Bkr2

120il

2.8 kil

A

-I

B
C-I--f-'

C

r-

soil

A

B

-I

900 il

C
m

~

(")

m

(J)

~~------'------'--~-GND

Resistor values shown are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) '10, 'Hl0, 'LS10, 'S10 ...................... , ...... , ... , .. , ........ 7 V
'Ll0 ........................................................... 8V
Input voltage: '10, 'Hl0, 'Ll0, 'S10 ........................................................... 5.5 V
'LS10 ........ :.' ............................................................... 7 V
Operating free·air temperature range: SN54' ............................................ -55°C to 125°C
SN74' ............................................... oOe to 70°C
Storage temperature range ......... , ...... , ................... , ...................... -65°e to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.

3-58

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • CALL·AS. TEXAS 75265

TYPES SN5410, SN7410
TRIPLE 3-INPUT POSITIVE-NAND GATES
recommended operating conditions
SN5410

SN7410
UNIT

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

V

2
0.8

0.8

-0.4

-0.4

mA

16

mA

70

°e

16
- 55

V

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN7410

SN5410

TEST CONDITIONS t

PARAMETER

MIN

TYP*

2.4

3.4

MAX

MIN

TYP*

2.4

3.4

- 1.5

-1.5

VIK

Vee= MIN,

11=-12mA

VOH

Vce= MIN,

VIL = 0.8 V,

IOH = - 0.4 mA

VOL

Vee= MIN,

VIH=2V,

IOL = 16 mA

0.2

UNIT
MAX

0.4

0.2

V
0.4

1

1

V

V
mA

II

Vce = MAX,

VI = 5.5 V

IIH

Vee = MAX,

VI = 2.4 V

40

40

jJA

VI = 0.4 V

-1.6

-1.6

mA

IlL

Vee= MAX,

IOS§

Vee = MAX

- 20

- 55

-18

lecH

Vee = MAX,

VI = OV

3

6

3

leeL

Vee = MAX,

VI = 4.5 V

9

16.5

9

- 55

mA

6

mA

16.5

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25 0 C.

= 5 V, TA = 25°e

en
w

(.)

5=

§ Not more than one output should be shorted at a time.

switching characteristics, Vee

•
w

(see note 2)

C

...I

FROM

TO

(INPUT)

(OUTPUT)

A, BorC

Y

PARAMETER

TEST CONDITIONS

tpLH
RL = 400.n,

MIN

TYP

MAX

11

22

ns

7

15

ns

UNIT

....
....

eL=15pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS . .

INSTRUMENTS .
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-59

TYPES SN54H10, SN74H10
TRIPLE 3-INPUT POSITIVE-NAND GATES

recommended operating conditions
SN54H10

SN74H10
UNIT

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low·level input voltage,

IOH

High·level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

0.8

0.8

-0.5

- 0.5

mA

20

mA

70

°c

20
- 55

V
V

2

125

0

V

electrical characteristics over· recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
--f
--f

TEST CONDITIONS

t

MIN

TVPt

MAX

UNIT

-1.5

V

VIK

Vee = MIN,

11= - 8 mA

VOH

Vce = MIN,

VIL = 0.8 V,

VOL

VCC = MIN,

VIH=2V,

II

VCC = MAX,

VI = 5.5 V

IIH

Vee= MAX,

VI=2.4V

'50

J1.A

IlL

Vee = MAX,

VI=O.4V

-2

mA

2.4

IOH=-0.5mA

3.5
0.2

IOL = 20 mA

1

-40

IOS§

Vee = MAX

lecH

Vee= MAX,

VI = 0 V

ICCL

Vee = MAX,

VI =4.5 V

V
0.4

V
mA

-100

mA

7.5

12.6

mA

19.5

30

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

r-

~ All typical val ues are at Vee = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and the duration of the short·circuit should not exceed one second.

om

switching characteristics, Vee

::::

nm

=5 V, T A = 25°e

FROM

TO

(INPUT)

(OUTPUT)

A. BorC

y

PARAMETER

tJ)

(see note 2)
TEST CONDITIONS

tPLH

RL = 280

n.

TYP

MAX

UNIT

5.9

10

ns

6.3

10

ns

eL = 25 pF

tpHL
NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-60

MIN

-I./}

TEXAS
INSTRUMENTS .
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPE SN54L10
TRIPLE 3-INPUT POSITIVE-NAND GATES

recommended operating conditions
SN54L 10
UNIT
VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

4.5

5

5.5

0.7

IOl

Low-level output current

TA

Operating free-air temperature

V
V

2

V

-0.1

mA

2

mA

125

°c

- 55

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN5~L 10

t
MIN

VOH

VCC = MIN,

VIL = 0.7 V,

IOH = -0.1 mA

VOL

VCC = MIN,

VIH = 2 V,

IOL = 2 mA

II

VCC = MAX,

VI = 5.5 V

TYP*

2.4

UNIT

MAX
V

3.3
0.15

0.3

V

0.1

mA

IIH

VCC = MAX,

VI=2.4V

10

p.A

IlL

VCC = MAX,

VI=0.3V

-0.18

mA

IOS§

VCC = MAX

-15

mA

ICCH

VCC = MAX,

VI = 0 V

0.33

0.6

mA

ICCL

VCC = MAX,

VI=4.5V

0.87

1.53

mA

-3

en

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25 0 e.
§ Not more than one output should be shorted at a time.

switching characteristics, Vee

= 5 V, T A = 25°e

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

:>w

(see note 2)
TEST CONDITIONS

tpLH
A, BorC

Y

w

(,J

. RL =4 kn,

C

MIN

TYP

MAX

35

60

ns

31

60

ns

UNIT

CL = 50 pF

tpHL

..J

lI-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-61

TYPE SN54LS10, SN74LS10
TRIPLE 3-INPUT POSITIVE-NAND GATES

recommended operating conditions
SN54LS10

SN74LS10
UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

Vee

Supply voltage

VIH

High·level input voltage

V,L

Low-level input voltage

IOH

High-level output current

- 0.4

-0.4

mA

IOL

Low-level output current

4

8

mA

TA

Operating free-air temperature

70

°e

2

2

- 55

125

V

0

electrical characteristics over recommen.ded operating free-air temperature range (unless otherwise.noted)
PARAMETER

TEST CONDITIONS

SN54LS10

t

SN74LS10
UNIT

MIN

TYP*

2.5

3.4

MAX

VIK

Vee = MIN,

I, = -18 mA

VOH

Vec = MIN,

VIL = MAX,

IOH = - 0.4 mA

Vee = MIN,

V,H = 2 V,

IOL = 4 mA

Vec = MIN,

V'H=2V,

IOL=8mA

Vee= MAX,

V, = 7 V

VCC = MAX,

V, = 2.7 V

I,L

VCC = MAX,

V, = 0.4 V

IOS§

VCC = MAX

ICCH

VCC = MAX,

V, = 0 V

0.6

1.2

ICCL

VCC = MAX,

V, = 4.5 V

1.8

3.3

MIN TYP*

-1.5

-1.5

0.25

MAX

2.7

V
V

3.4
0.4

0.4

V

VOL
0.25

0.5

0.1

0.1

20

20

IJA

"

"H

II
....,
....,
r-

- 0.4

mA

-100

mA

0.6

1.2

mA

1.8

3.3

mA

-0.4
- 20

-100

/1A

- 20

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

C

m

All typical values are at Vee = 5 V, T A = 25 0 e.
§ Not more than one output should be shorted at a time, and the duration· of the short-circuit should not exceed one second.

n

switching charact~ristics, Vee

:5

t

m

rJ)

= S V, TA = 2Soe

FROM

TO

(INPUT)

(OUTPUT)

A, BorC

Y

PARAMETER

(see note 2)
TEST CONDITIONS

tpLH
RL = 2 kn,

TYP

MAX

9

15

ns

10

15

ns

UNIT

CL = 15 pF

tpHL
NOTE 2: See Genera""formation Section for load circuits and voltage waveforms.

3-62

MIN

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TeXAS 75265

TYPES SN54S10, SN74S10
TRIPLE 3-INPUT POSITIVE-NAND GATES
recommended operating conditions
SN54S10

SN74S10

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

VCC

Supply voltage

VIH

High-level input voltage

Vil

low-level input voltage

0.8

0.8

V

IOH

High-level output current

-1

-1

mA

20

mA

70

°c

2

IOl

Low-level output current

TA

Operating free-air temperature

V
V

2

20
125

- 55

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

SN54S10

t

SN74S10
UNIT

MIN

TYP*

2.5

3.4

MAX

MIN

TVP*

2.7

3.4

MAX

VIK

VCC

~

MIN,

11~-18mA

VOH

VCC

~

MIN,

VIL

~

0.8 V,

IOH

~

-1 mA

VOL

VCC

~

MIN,

VIH

~

2 V,

IOL

~

20 mA

II

VCC

~

MAX,

VI

~

5.5 V

IIH

VCC

~

MAX,

VI

~

2.7 V

50

50

/lA

IlL

VCC

~

MAX,

VI

~

0.5 V

-2

-2

mA

~

-100

mA

-40

IOS§

VCC

ICCH

VCC~

MAX,

VI

~o

ICCl

VCC

~

MAX,

VI

~

-1.2

-1.2

MAX

V
V

0.5

0.5

V

1

1

mA

-100

-40

V

7.5

12

7.5

12

mA

4.5 V

15

27

15

27

mA

(.)

:>w

§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

(see note 2)

PARAMETER

C

TEST CONDITIONS

tplH
RL

~

280

n,

CL

~

MIN

TVP

MAX

UNIT

3

4.5

ns

3

5

ns

..J

lI-

15 pF

tPHl
A,_BorC

en
w

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee ~ 5 V, T A ~ 25 0 e.

switching characteristics, Vee

II

V

tPLH
RL

~

280

n,

CL

~

tpHl

4.5

ns

5

ns

50 pF

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-63

-I
-I

r-

C

m

$

(")

m

en

3-64

TYPES SN54H11, SN54LS11, SN54S11,
SN74H11, SN74LS11, SN74S11
TRIPLE 3-INPUT POSITIVE-AND GATES
REVISED APRIL 1985

SN54H11 •.. J PACKAGE
SN54LS11.SN54S11 •.. JORWPACKAGE
SN74H11 •.• J OR N PACKAGE
SN74LS11.SN74S11 .•. D.JORNPACKAGE
(TOPVIEWI

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs
• Dependable Texas Instruments Quality and
Reliability

1A
1B
2A
2B
2C
2Y
GND

description
These devices contain three independent 3-input AND
gates.
The SN54Hl1. SN54lS11. SN54S11 are characterized for operation over the full military temperature
range of -55°C to 125°C. The SN74H11.
SN74lS11. and SN74S11. are characterized for operation from ooC to 70°C.
FUNCTION TABLE
INPUTS
C

Y

H

H
X
L
X

H
X
X
L

H

L
X

X

1A
1B

1Y

OUTPUT

B

1Y
3C
3B
3A
3Y

SN54H11 ••. W PACKAGE
(TOPVIEWI

(each gate)

A

VCC
1C

VCC
2Y
2A
2B

L

1C
3Y
3C
GND
3B
3A
3C

L
L

SN54LS11. SN54S11 ••• FK PACKAGE
SN74LS11. SN74S11 ••• FN PACKAGE
(TOPVIEWI

logic diagram (each gate)

II
U)

W

2A
NC
2B
NC
2C

positive logic
Y = A . B . C or Y = A· + B

+ C

1Y
NC
3C
NC
3B

u

:>w
C

...J

l-

I-

NC - No internal connection

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nn~a:~S:!~f,~r;llu:~Ot~~~!~~nor~~f~~~~'::e~:~s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-65

TYPES SN54H11, SN54LS11, SN54S11
SN74H11, SN74LS11, SN74S11
TRIPLE 3-INPUT POSITIVE-AND GATES
schematics (each gate)
'H11
~----~~-------.--------~Vcc

2.S kS1

1kS1

760 S1

5sS1

INPUTS
A -D-t-I--+....,

OUTPUT
y

B-~~-+6-0

C ----~-+-ll-1- --\r-- - - -w---l,..-- -- --~--\.,-- -- --v--L- - --O.3V----- - - - - - - - - - - INPUT

OUTPUT

INPUT

OUTPUT

----INPUT

--- ----- --

OUTPUT

INPUT

OUTPUT

----INPUT

---

OUTPUT

-

'LS241, 'S241 USED AS REPEATER/LEVEL RESTORER

v
SYSTEM AND/OR MEMORY-ADDRESS BUS
'LS240l'S240 USED AS SYSTEM AND/OR MEMORY BUS DRIVER-4-BIT
ORGANIZATION CAN BE APPLIED TO HANDLE BINARY OR BCD

II
~
~

1/4 'LS241/'S241

PARTY-LINE'
MUL TlPLE-INPUT/OUTPUT BUS

r-

C

m

OUTPUT
PORTS

<

FROM
DATA
BUS

INPUT A

--+---4

t---:---INPUT B
--..---;-..... ~3~TE~~R

~3F~~~~R~-+_.-~

n
m
en

OUTPUT A

---+--+--<

BUS
CONTROL
-H--HINPUT
PORTS

H
L
L
H

TO
DATA
BUS

L
L
H
L

>---1--;-- OUTPUT B

RECEIVERS
INPUT
OUTPUT
-A--BB
A
A
NONE

B
B
A
NONE

BUS
CONTROL
-L--LH
H
L
L

L
H
H
H

PARTY-LINE BUS SYSTEM
WITH MULTIPLE INPUTS, OUTPUTS, AND RECEIVERS

INDEPENDENT 4-BIT BUS DRIVERS/RECEIVERS
IN A SINGLE PACKAGE

3-822

TEXAS

~

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS242, SN54LS243, SN74LS242, SN74LS243
QUADRUPLE BUS TRANSCEIVERS
REVISED APRIL 1985

• Two-Way Asynchronous Communication
Between Data Buses

SN54LS242, SN54LS243 ... J OR W PACKAGE
SN74LS242, SN74LS243 ... 0, J OR N PACKAGE
(TOP VIEW)

• PNP Inputs Reduce D-C Loading
GAB
Ne
A1
A2
A3
A4
GND

• Hysteresis (Typically 400 mVI at Inputs
Improves Noise Margin
description
These four-data-line transceivers are designed for asynchronous two-way communications between data
buses. The SN74LS' can be used to drive terminated
lines down to 133 ohms.

Vee
GBA
Ne
B1
B2
B3
B4

SN54LS242, SN54LS243 .•• FK PACKAGE
SN74LS242, SN74LS243 ... FN PACKAGE

The SN54' family is characterized for operation over the
full military temperature range of - 55°C to 125°C. The
SN74' family is characterized for operation from aoe to
7aoe.

(TOP VIEW)

u

CD

~

u
u u

ZI(,!JZ

GAB

GBA

'LS242

'LS243

L

L

Ato B

Ato B

H

H

B to A

B to A

H

L

Isolation

Isolation

L

H

Latch A and B

Latch A and B
. (A = B)

(A=B)

~

CD

(,!J

A1

FUNCTION TABLE (EACH TRANSCEIVER)
INPUTS

>

B2

NC-No internal connection

en
w

C,.)

>
W

schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EaUIVALENT OF EACH INPUT
- - - -.....-VCC

vcc-----o---

50

n

NOM

C
-J

lI-

INPUT

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~nnd:::s~~r{yar~liu~~Ot~~~I~~nor~~f~~~~nJe~~:s~

.J.!p

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-823

TYPES SN54LS242, SN54LS243, SN74LS242, SN74LS243
QUADRUPLE BUS TRANSCEIVERS
logic symbols
'LS243

'L.S242
GBA (13)
GAB (1)
(11) Bl

Al

(10) B2

A2

(9) B3

A3

(8) B4

A4

(3)

(4)

\7 1
IT



.IT

(11) Bl

2\7
(10) B2

(5)

(9)

(6)

(8)

B3

B4

logic diagrams (positive logic)
'LS242

'LS243

II
-I
-I
r
C

m

S
n
m
(J)

Pin numbers shown on logic notation are for 0, J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage .............................................................................. 7 V
Off-state output voltage .................................................................... 5.5 V
Operating free-air temperature range: SN54LS' ......................................... - 55°C to 125°C
SN74LS' ............................................. oOe to 70°C
Storage temperature range ......................................................... - 65°C to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

3-824

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS242, SN54LS243, SN74LS242, SN74LS243
QUADRUPLE BUS TRANSCEIVERS
recommended operating conditions
SN54LS'
Vee

Supply voltage, (see Note 1 )

V,H

High-level input voltage

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

V,L

Low-level input voltage

IOH

High-level output current

IOL

Low-level output current

TA

Operating free-air temperature

2

V
V

0.7

0.8

-12

-15

mA

24

mA

70

°e

12
- 55

UNIT

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

Aor B

V,K

Hysteresis (VT+ - VT-)

MIN

V'H=2V,

V,L = MAX,

V'H=2V,

V'L= 0.5 V,

IOH=-3mA
Vee = MIN,
IOH = MAX
Vee = MIN,

VOL

I,

V'H=2V,

V,l = MAX
Aor B
GABor GBA

I'H
A inputs
I,L
B inputs
GAB or GBA

Vee= MAX,
Vee = MAX,

V, = 2.7 V

Vee = MAX,

V, = 0.4 V,

0.2

0.4

2.4

3.1

2.4

3.1

Outputs low

Vee = MAX,

All outputs

See Note 2

0.25

0.4

0.25

0.4

0.35

0.5

V

40

JlA

VO=O.4V

JlA

- 200

- 200

V, = 5.5 V

0.1

0.1

V, = 7 V

0.1

0.1

20

20

- 0.2

-0.2

- 0.2

-0.2

- 0.2
-40

disabled

V

40

V, = 0.4 V

Outputs open,

V

V

V, = 0.4 V,

Vee = MAX,

UNIT

2

2

GAB and GBA at 4.5 V

Outputs high
lee

0.4

GAB and GBA at 0 V
Vee= MAX,

MAX
-1.5

Vo = 2.7 V

Vee = MAX

10S§

TYP*

10l = 24 mA

Vee = MAX,

IOZl

MIN

0.2

'OL=12mA

V'H=2V,

V,l = MAX

IOZH

MAX
- 1.5

Vee = MIN
Vee = MIN,

VOH

TYP*

1,=-18mA

Vee = MIN,

SN74LS'

SN54LS'

TEST eONDITIONSt

PARAMETER

- 225

mA
JlA

en

mA

w

(.)

- 0.2
7"""

- 225

40

'LS242, 'LS243

22

38

22

38

'LS242, 'LS243

29

50

29

50

'LS242

29

50

29

50

'LS243

32

54

32

54

>
W

mA

C

mA

...J

....
....

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*All typical values are at Vee = 5 V, T A = 25°C.

§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
NOTE 2: ICC is measured with transceivers enabled in one direction only, or with all transceivers disabled.

liwitching characteristics, Vee

= 5 V, T A = 25

PARAMETER

0

C

'TEST CONDITIONS

'LS242
MIN

tPLH
tpHL
tpZL

RL = 667 n
See Note 3

eL = 45 pF,

tpZH

n,

tPLZ

RL = 667

tpHZ

See Note 3

eL=5pF,

'LS243

TYP

MAX

MIN

TYP

MAX

UNIT

9

14

12

18

ns

12

18

12

18

ns

20

30

20

30

ns

15

23 ,

15

23

ns

10

20

10

20

ns

15

25

15

25

ns

NOTE 3: See General Information Section for load circuits and voltage waveforms,

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-825

TYPES SN54LS245, SN74LS245
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
OCTOBER 1976-REVISEO APRIL 1985

SN54LS245 ... J PACKAGE
SN74LS245 ... OW, J OR N PACKAGE

• Bi-directional Bus Transceiver in a HighDensity 2O-Pin Package

(TOP VIEW)

• 3-State Outputs Drive Bus Lines Directly

• Hysteresis at Bus Inputs Improve Noise
Margins
• Typical Propagation Delay Times,
Port-to-Port . . . 8 ns

lYPE

IOL
(SINK

IOH
(SOURCE

CURRENT)

CURRENT)

SN54LS245

12 rnA

-12 rnA

SN74LS245

24 rnA

-15 rnA

Vee
G

DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND

• PNP Inputs Reduce D-C Loading on Bus Lines

81
82
83
84
85
86
87
88

SN54LS245 .•. FK PACKAGE
SN74LS245 ... FN PACKAGE
(TOP VIEW)

description
These octal bus transceivers are designed for asynchronous two-way communication between data
buses. The control function implementation minimizes
external timing requirements.

II
-I
-I
r

The devices allow data transmission from the A bus to
the 8 bus or from the 8 bus to the A bus depending
upon the logic level at the direction control (DIR) input.
The enable input (G) can be used to disable the device
so that the buses are effectively isolated.
The SN54LS245 is characterized for operation over the
full military temperature range of - 55 ae to 125 ae. The
SN74LS245 is characterized for operation from Oae to

70°C.

C

m

:::;

(")

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

FUNCTION TABLE

TYPICAL OF ALL OUTPUTS

m

ENABLE

- - - - - . - - VCC

G

(J)

9 kn NOM
VCCft
-f
-·
-INPUT

.

OUTPUT

DIRECTION
CONTROL

OPERATION

DIR

L

L

B data to A bus

L

H

A data to B bus

H

X

Isolation

H = high level; L = low level. X = irrelevant

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to

3-826 specifications per the terms of Texas Instruments

~~nndea::S:'a~[I~ai~lIU:~Ot~~~f~~nof~~I~!~~':!!e~::s~

TEXAS

"'11

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265

TYPES SN54LS245, SN74LS245
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
logic diagram (positive logic)

logic symbol

r---...
r---...

G.(19)
OIR

Al

A2
\

A3
A4
AS
A6
A7
A8

(1)

L
(2)-

L

01 R ....;.11"";')-0---1

G3
3 EN1IBA)

~--------+-~---------o~~G

3 EN2IAB)

":l

1:

\71

<1

IT

IT

[>

2\7

(18)

~

(3)

(17)
~

(4)

(16)

15)

(15)

(6)

(14)
~

17l

.(13)

(8)

(12)
~

(9)

111 )

(2)

Bl

Al
(18) Bl

B2
(3)

B3

A2

B4

(17)

B2

B5
(4)

B6

A3

B7

(16)
.
1--..._--B3 .

B8
A4

15)
115)
t-"'---B4

AS

(6)

A6 (7)
(13)

B6-

tJ)

W

u

>,

A7 (8)
(12) B7

W

C

-I

A8 (9)

lI111) B8

Pin numbers shown on logic notation are for

ow. J

or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee (see Note 1)
............................................... . . . .
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-state output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free-air temperature range: SN54LS'
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. _55°C to 125°C
SN74LS'
.... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. aOe to 7aoe
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65°C to 15aoe
NOTE 1: Voltage values are with respect to network ground terminal.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-827

TYPES SN54LS245, SN74LS245
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS245

PARAMETER

MIN

Supply voltage, Vee

SN74 LS245

MAX

MIN

NOM

MAX

5

5.5

4.75

5

5.25

V

-15

mA

24

mA
De

4.5 '

High-level output current, 10H

-12

Low-level output current, 10L

12

Operating free-air temperature, T A

UNIT

NOM

-55

125

0

70

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Vee = MIN,

Hysteresis (VT+ - VT _.A or B input

Vee = MIN

High-level output voltage

TYP:t:

10H = -3 mA

Vee = MIN,

IOL=12mA

•

-I
-I
rC

n

m

(J)

V
0.8

V

-1.5

-1.5

V

0.4

0.2

0.4

2.4

3.4

2.4

3.4

V

2

2
0.4

0.4
V
0.5

IOL=24mA

G at2V

low-level voltage applied

I

AorB

I DIR or G

Vee = MAX,

VO=2.7V

20

20

Vo = 0.4 V

-200

-200

VI = 5.5 V

0.1

0.1

VI = 7 V

0.1

0.1

j.lA

mA

IIH

High-level input current

Vee = MAX,

VIH = 2.7 V

20

20

j.lA

IlL

Low-level input current

Vee = MAX,

VIL = 0.4 V

-0.2

-0.2

mA

lOS

Short-circuit output current~

Vee = MAX

-225

mA

lee

I Total, outputs high
Supply current I Total, outputs low

m

~

Off·state output current,

UNIT

0.7

VIH = 2 V,

Vee = MAX,

maximum input voltage

MAX

V
10H = MAX

high-level voltage applied

Input current at

II

TYP:t:

0.2

Off·state output current,

10ZL

MIN
2

II = -18mA

VIL = VIL max

VIL = VIL max
10ZH

SN74LS245

MAX

VIH=2V,

Low-level output voltage

VOL

MIN
2

Vee = MIN,
VOH

SN54LS245

. TEST CONDITIONSt

--

I Outputs at Hi-Z

-225

-40
48

Vee = MAX,

Outputs open

-40

70

48

70

62

90

62

90

64

95

64

95

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
D
:t:AII typical values are at Vee = 5 V, T A = 25 e.
~ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

switching characteristics,

Vee = 5 V, T A =2Soe

PARAMETER

TEST CONDITIONS

Propagation delay time,
tpLH

low-to-high-Ievel output
Propagation delay time,

n.,

MIN

TYP

MAX

8

12

UNIT
ns

8

12

ns

tPZL

Output enable time to low level

27

40

ns

tPZH

Output enable time to high level

25

40

ns

tPLZ

Output disable time from low level

15

25

ns

tpHZ

Output disable time from high level

15

28

ns

tpHL

high-to-Iow-Ievel output

eL = 45 pF,

eL = 5 pF,

RL = 667

RL = 667

n.,

See Note 2

See Note 2

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-828

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54246 THRU SN54249, SN54LS247 THRU SN54LS249,
SN74246 THRU SN74249, SN74LS247 THRU SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
MARCH 1974-REVISED DECEMBER 1983

'246, '247, 'LS247
feature

'248, 'LS248
feature

'249, 'LS249
feature

•

Open-Collector Outputs
Drive Indicators Directly

0

Internal Pull-Ups Eliminate
Need for External Resistors

0

Lamp-Test Provision

•

Lamp-Test Provision

•

Leading/Trailing Zero
Suppression

0

Leading/Trailing Zero
Suppression

•

Open-Collector Outputs
Lamp-Test Provision
Leading/Trailing Zero
Suppression

All Circuit Types Feature Lamp Intensity Modulation Capability
DRIVER OUTPUTS

TYPE

•
•
•

TYPICAL

ACTIVE

OUTPUT

SINK

MAX

POWER

LEVEL

CONFIGURATION

CURRENT

VOLTAGE

DISSIPATION

SN54246

low

open-collector

40mA

30 V

320mW

J,W

SN54247

low

open-collector

40mA

15V

320mW

J,W

PACKAGES

SN54248

high

2-kn pull-up

6.4 mA

5.5 V

265mW

J,W

SN54249

high

open-collector

10mA

5_5 V

265mW

J,W

SN54LS247

low

15V

35mW

J,W

high

open-collector
2-kn pull-up

12mA

SN54LS248

2mA

5_5 V

125mW

J,W

SN54LS249

high

open-collector

4mA

5_5 V

40mW

J,W

SN74246

low

open-collector

40mA

30V

320mW

J, N

SN74247

low

open-collector

40mA

15 V

320mW

J, N

SN74248

high

2-kn pull-up

6.4 mA

5.5 V

265mW

J, N

SN74249

high

open-collector

10mA

5.5 V

265mW

J, N

SN74LS247

low

open-collector

24mA

15V

35mW

J, N

SN74LS248

high

2-kn pull-up

6mA

5_5 V

125mW

J, N

SN74LS249

high

open-collector

8mA

5_5. V

40mW

J, N

u

:>w

(TOP VIEW)
U
U U
UIDZ> ....

(TOP VIEW)

e

en
w

SN54LS247 THRU SN54LS249 ___ FK PACKAGE
SN74LS247 nmu SN74LS249 __ . FN PACKAGE

SN54246THRUSN54249
SN54LS247 THRU SN54LS249 _. _ J OR W PACKAGE
SN74246 THRU SN74249 ___ J OR N PACKAGE
SN74LS247 THRU SN74LS249 __ . D, J OR N PACKAGE

B

II

Vee

3 2

C

1 2019

..J

f

lI-

9

b

c
d
«CUQ)"o

zz

(!)

NC - No internal connection

description
The '246 through '248 are electrically and functionally identical to the SN5446A/SN7446A, SN5447A/SN7447A, and
SN5448/SN7448, respectively, and have the same pin assignments as their equivalents. Also the 'LS247 and 'LS248 are
electrically and functionally identical to the SN54LS47/SN74LS47 and SN54LS48/SN74LS48, respectively, and have
the same pin assignments as their equivalents. They can be used interchangeably in present or future designs to offer
designers a choice between two indicator fonts_ The '249 and 'LS249 are 16-pin versions of the 14-pin SN5449 and
SN54LS49/SN74LS49, respectively. Included in the '249 and 'LS249 circuits is the full functional capability for lamp
test and ripple blanking, which is not available in the '49 and 'LS49 circuits_ The '46A, '47 A, '48, '49, .'LS47, 'LS48,
and 'LS49 compose the b and the c./ without tails and the '246 through '249 and 'LS247, 'LS248, and 'LS249
PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~n~:::s:a~[r:r~liu:~Ot~~~~~nof~~':!~~~e~~~s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

3-829

TYPES SN54246 THRU SN54249, SN54LS247 THRU SN54LS249,
SN74246 THRU SN74249, SN74LS247 THRU SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
description (continued)
compose the E, and the ':' with tails. Composition of all other characters, including display patterns for BCD inputs
above nine, is identical. The '246, '247, and 'LS247 feature active-low outputs designed for driving indicators directly,
and the '248, '249, 'LS248, and 'LS249 feature active-high outputs for driving lamp buffers. All of the circuits have full
ripple-blanking input/output controls and a lamp test input. Segment identification and resultant displays are shown
below. Display patterns for BCD input counts above 9 are unique symbols to authenticate input conditions.
All of these circuits incorporate automatic leading and/or trailing-edge zero-blanking control (RBi and RBO). Lamp test
(L T) of these types may be performed at any time when the BT/RBO node is at a high level. All types contain an
overriding blanking input (BI) which can be used to control the lamp intensity by pulsing or to inhibit the outputs.
Inputs and OUtputs are entirely compatible for use with TTL logic outputs.
Series 54 and Series 54LS devices are characterized for operation over the full military temperature range of -55°C to
125°C; Series 74 and Series 74LS devices are characterized for operation from O°C to 70°C.

r-:-',l

el-.lr
-u-

NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS

SEGMENT
IDENTI FICA TlON

'246, '247, 'LS247
FUNCTION TABLE
DECIMAL

INPUTS

OR
LT

RBI

D

C

B

0

H

H

L

L

L

L

1

H

X

L

L

L

H

2

H

X

L

L

H

3
4

H

X

L

L

H

X

L

5

H

X

6

H

7

H

8

~

9

m
en

-t
-t

rC

m

n

OUTPUTS'

8IIRBOt
A-

FUNCTION

NOTE

a

b

H

ON

ON

ON

ON

ON

ON

9
OFF

H

OFF-

ON

ON

OFF

OFF

OFF

OFF

L

H

ON

ON

OFF

ON

ON

OFF

ON

H

H

H

ON

ON

ON

ON

OFF

OFF

ON

H

L

L

H

OFF

ON

ON

OFF

OFF

ON

ON

L

H

L

H

H

ON

OFF

ON

ON

OF'F

ON

ON

X

L

H

H

L

H

ON

OFF

ON

ON

ON

ON

ON

X

L

H

H

H

H

ON

ON

ON

OFF

OFF

OFF

OFF

H

X

H

L

L

L

H

ON

ON

ON

ON

ON

ON

ON

H

X

H

L

L

H

H

ON

ON

ON

ON

OFF

ON

ON

10

H

X

H

L

H

L

H

OFF

OFF

OFF

ON

ON

OFF

ON

11

H

X

H

L

H

H

H

OFF-

OFF

ON

ON

OFF

OFF

ON

12

H

X

H

H

L

L

H

OFF

ON

OFF

OFF

OFF

ON

ON

13

H

X

H

H

L

H

H

ON

OFF

OFF

ON

OFF

ON

ON

14

H

X

H

H

H

L

H

OFF

OFF

OFF

ON

ON

ON

ON

15

H

X

H

H

H

H

H

OFF

OFF

OFF

OFF

OFF

OFF

OFF

BI

X

X

X

X

X

X

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

2

RBI

H

L

L

L

L

L

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

3

LT

L

X

X

X

X

X

H

ON

ON

ON

ON

ON

ON

ON

4

c

H = high level. L = low level. X = irrelevant
NOTES: 1. The blanking input (Bi') must be open or held at a high logic level when output functions
ripple-blanking input (RBi) must be open or high if blanking of a decimaLzero is not desired.
2. When a low logic level is applied directly to the blanking input
input.

e

d

a

f

1

through 15 are desired. The

(si), all segment outputs are,off regardless of the level of any other

3. When ripple-blanking input (RBi) and inputs A, B, C, and D are at a low level with the lamp test input high, all segment outputs
go off and the ripple-blanking output (RBO) goes to a low level (response condition).
4. When the blanking input/ripple.blanking output (BI/RBO) is open or held high and a low is applied to the lamp-test input, all
segment outputs are on.
tBi/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO).

3-830

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54248, SN54249, SN54LS248, SN54LS249,
SN74248, SN74249, SN74LS248, SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
'248, '249, 'LS248, 'LS249
FUNCTION TABLE
DECIMAL
OR
FUNCTION
0
1
2
3
4
5

6
7
8
9
10
11
12
13
14
15

INPUTS

LT
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

BI
RBI

H

LT

L

X

RBI

H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
X

D
L
L
L
L
L
L
L
L

C
L
L
L
L

H
H
H
H

L
L
L
L

H

H
H
H

H
H
H
H

X
L
X

X
L
X

H
H
H
H

OUTPUTS

BlIRBOt
B
L
L

A
L

H

H

L

H
L
L
H

H

H
L
L

L

H
L
H
L

H

H

L

H
L
L

-H

H

L
H
X
L
X

H
X
L
X

L

H

a
H

NOTE

b

c

d

e

f

H
H
H
H
H

H
H

H

H

H

L

L

L

H

H

H
L

H
H
H

H
H
H
H
H
H
H

L
L
L
H
L

L
L
L

L
L
L

L
L

H

H

H
L
L

L
L
L
L

L
L
L
L
L

L
L
L
L
L
L

H

H

H

H

H
H
H
H
H
H
H
H
H
H
H
H
H

H
H

L

H
H
L

H
H
H
H

H

L
L

H

L

H
H
L

H
H
H
H
L

H
H
L
L
L

H

H
L
H
L
L
L
H
L
L
L
H

H
H
H

9
L
L

H
H
H
H
H

L

L

H
H

H
H
H
H
H
H
H

L
L

H
H
H
L
L
L

H

1
1

L
L
L

H

1

2
3
4

H = high level, L = low level, X = irreleliant
NOTES: 1. The blanking input (131) must be open or held at a high logic level when output functions 0 through 15 are desired. The
ripple-blanking input {RBI) must be open or high if blanking of a decimal zero is not desired.
2. When a low logic level is applied directly to the blanking input (8"T), all segment outputs are low regardless of the level of any
other input.
3. When ripple-blanking input (RBi) and inputs A, B, C, and D are at a low level with the lamp test input high, all segment outputs
go low and the ripple-blanking output (RBO) goes to a low level (response condition).
4. When the blanking input/ripple-blanking output (SURBO) is open or held high and a low is applied to the lamp-test input, all
segment outputs are high.
tBi/RBO is wire-AND logic serving as blanking input

(si)

and/or ripple-blanking output

(fuio).

II
en

w
U

>
w

C

...J

....
....

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-831

TYPES SN54246, SN54247, SN54LS247,
SN74246, SN74247, SN74LS247
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
logic diagram

'246, '247, 'LS247

INPUT.;..:(7'-'-'_.r-......

A

~.-

_ _~
A+-I-+-I-I~-'"

INPUT-'-.:(1'-L'_·L-r"_

~H---~~~11U;~

B

INPUT .!.:(2::..:.'---L-.r-......

p-~--Tr~~s=,

C

INPUT (6'
D

II
-t
-t

r-'

C
m

~
m

Bl/RBO
BLANKING
(4'
INPUT OR
RIPPLE-BLANKING
OUTPUT

LAMP TEST.;..:(3::":"-+----J
INPUT
RBI
RIPPLE-BLANKING.!.:(5::..:.'-+----'
INPUT
L..-_ _ _ _ _ _ _ _

~./

Pin numbers shown on logic notation are for 0, J or N packages.

(")

en

3-832

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54248, SN54249, SN54LS248, SN54LS249,
SN74248,SN74249,SN74LS248,SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
logic diagrams
'248, '249, 'LS248, 'LS249

INPUT (7'
A ~--~~~____~.,
1~.j....j.4-+r_

INPUT...;..(1...:....'-----'--.r--......

B

P-~----4+~

I~++++H

INPUT...;..(2...:....'----'-...r-......
~H-~--+H~

C

INPUT (6'

D

BLANKING
INPUTOR

(4'

RIPPLE-BLANKING~-+------'
OUTPUT

.

II
en
w

LAMP-TEST (3'
INPUT
":":":"'-+--J

()

RIPPLE-BLANKING "'-'(5...;..'-+____-'
INPUT
'----~------------_L_../

C

..J

Pin numbers shown on logic notation are for D, J or N packages.

TEXAS

5=
w

....
....

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-833

TYPES SN54246 THRU SN54249,SN74246 THRU SN74249
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
schematics of inputs and outputs
'246, '247, '248, '249

'246, '247, '248, '249

Q

EQUIVALENT OF EACH INPUT
EXCEPT Bl/RBO

VCC

EQUIVALENT OFBl/RBO

Vee

6 kn NOM

,"eUT.

--

'246, '247

'248

TYPICAL OF OUTPUTS
a THRU 9

TYPICAL OF OUTPUTS
a THRU 9

----------~~~----VCC
----------~----.-VCC

OUTPUT

2 kn
NOM

-I
-I

OUTPUT

r-

C

m
~

C')

m

tn

'249
TYPICAL OF ALL OUTPUTS

-----------0----- Vee

OUTPUT

3-834

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

TYPES SN54LS247 THRU SN54LS249, SN74LS247 THRU SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
schematics of inputs and outputs
'LS247, 'LS248, 'LS249

'LS247, 'LS248, 'LS249

EQUIVALENT OF EACH INPUT
EXCEPT BI/RBO

EQUIVALENT OF BI/RBO

Vee

'":::q~~
IT and RBi:
e, and D:

A, B,

Req = 20 k!l NOM
Req = 25 k!l NOM

'LS247

'LS248

TYPICAL OF OUTPUTS
a THRU 9

TYPICAL OF OUTPUTS
a THRU 9

----------~----.-----Vee

----------~~---.--Vce

2kfl

NOM

OUTPUT
OUTPUT

II
en
w

()

:>w

C

..J

lI-

'LS249

TYPICAL OF OUTPUTS
a THRU 9

-----------.-----Vee

OUTPUT

TEXAS

"I}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-835

TYES SN54246, SN54247, SN74246, SN74247
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) . . . . .
Input voltage . . . . . . . . . . . . .
Current forced into any output in the off state
Operating free-air temperature range: SN54246, SN54247
SN74246, SN74247
Storage temperature range

7V
5.5 V
1 mA

-55°C to 125°C
O°C to 70°C
-65°C to 150°C

NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54246
MIN
Supply voltage, Vee

4.5

SN54247

NOM MAX
5

MIN

5.5

SN74246

NOM MAX

4.5

5

MIN
4.75

5.5

SN74247

NOM MAX

MIN

5.25

4.75

5

NOM MAX
5

5.25

UNIT
V

Off-state output voltage, VOloff)

a thru g

30

15

30

15

V

On-state output current, 1010n)

a thru g

40

40

40

40

mA

High-level output current, 10H

BI/RBO

-200

-200

-200

-200

J.lA

Low-level output current, 10L

BI/RBO

8

8

8

8

mA

70

°e

Operating free-air temperature, T A

-55

125

-55

125

0

70

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
-I
-I

r-

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

TEST eONDITIONSt

High-level output voltage

BI/RBO

Low-level output voltage

BI/RBO

1010ff)

Off-state output current

a thru g

On-state output voltage

a thru g

C

m

II

S
(")

IIH

Input current at maximum input voltage
High-level input current

m

en

TYP:j: MAX UNIT

2

VOL

VOlon)

MIN

Any input

Vee = MIN,

11= -12 mA

Vee = MIN,

VIH = 2V,

VIL = 0.8 V,

10H = -200J.lA

Vee- MIN,

VIH-2V,

VIL = 0.8 V,

10L = 8mA

2.4

V

v,

0.27

VOloff) = MAX

Vee= MIN,

VIH = 2 V,

VIL = 0.8 V,

1010n) = 40 mA

0.3

Low-level input current

lOS

Short-circuit output current
Supply current

V
0.4

V

250

J.lA

0.4

V

1

mA

Vee = MAX, VI = 2.4 V

40

J.lA

except BI/RBO Vee = MAX, VI = 0.4 V

-1.6

except Sf/RBO

BI/RBO
ICC

V

Vee = MAX, VI = 5.5V

except BI/RBO
Any input
Any input

IlL

V

1.5V
3.7

Vee - MAX, VIH - 2 V,
VIL = 0.8

0.8

BI/RBO

mA

-4
Vee = MAX
Vee = MAX, See Note 2

64

-4

mA,

103

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at Vee = 5 V, T A = 25°C.
NOTE 2: ICC is measured with all outputs open and all inputs at 4.5 V.

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER

TEST CONDITIONS

toff

Turn-off time from A input

ton

Turn-on time from A input

eL=15pF,

toff

Turn-off time from RBI input

See Note 3

ton

Turn-on time from RBI input

TYP

MAX UNIT
100

RL=120n,

100
100
100

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-836

MIN

TEXAS

~

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

ns
ns

TYPES SN54LS247, SN74LS247
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1)
...... .
Input voltage
.............. .
Peak output current (tw .:;;; 1 ms, duty cycle':;;; 10%)
Current forced into any output in the off state
Operating free·air temperature range: SN54LS247
SN74LS247
Storage temperature range

7V
7V
200mA
.
. . 1 mA
-55°C to 125°C
. O°C to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS247
MIN
4.5

Supply voltage, Vee

NOM

SN74LS247

MAX

MIN

NOM

5.5

4.75

5

5

MAX

UNIT

5.25

V

15

V
rnA

Off·state output voltage, VO(oH)

a thru g

On·state output current, 10(on)

a thru g

12

24

High·level output current, 10H

Bl/~BLi

-50

-50

J.l.A

Low·level output current, 10L

BI/RBO

1.6

3.2

rnA

70

°e

15

-55

Operating free·air temperature, T A

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage BI/RBO

VOL

Low·level output voltage BI/RBO

SN74LS247

SN54LS247

TEST CONDITIONSt

PARAMETER

MIN

TYPt

MAX

II - -18 rnA

Vee - MIN,

VIH-2V,

204

VIL = VIL max, 10H = -50JJA
Vee = MIN,

Vee - MAX,

Off·state output current

a thru g

VO(on)

On·state output voltage

a thru g

II

Input current at maximum input voltage

Vee = MAX,

VI = 7 V

IIH

High·level input current

Vee = MAX,

VI = 2.7 V

V
0.8

-1.5

-1.5

204
004

UNIT

V
V

II

V

4.2
0.25

004

0.35

0.5

V

VIH-2V,

10(off)

MAX

0.7

4.2
0.25

Ii0L = 1.6 rnA
VIH = 2 V,
VIL = VIL max IIOL = 3.2 rnA

TYP+

2

2
Vec - MIN,

MIN

250

VIL = VIL max, VO(oft) = 15 V
Vee - MIN,

0.25

110(on) = 12 rnA
VIH = 2 V,
VIL = VIL max 110(on) = 24 rnA

250

004

0.25

004

0.35

0.5

en

w
U

JJA

>
w

V
0.1
20

C

0.1

rnA

20

JJA

....I

lI-

Any input
IlL

Low·level input current

except BiIRBO Vee = MAX,

VI=Oo4V

BI/RBO
Short·circuit
lOS
lee

output current

BI/RBO

-0.3

Vee = MAX

Supply current

Vee = MAX,

See Note 2

-0.4

-0.4

-1.2

-1.2

-2
7

-2

rnA

7

13

rnA

TYP

MAX

-0.3

13

rnA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAil typical values are at Vce = 5 V, T A = 25°C.
NOTE 2: ICC is measured with all outputs open and all inputs at 4.5 V.

switching characteristics, Vee

= 5 V, T A = 25°e

PARAMETER

TEST CONDITIONS

toft

Turn·off time from A input

ton

Turn·on time from A input

CL

toft

Turn·off time from RBI input

See Note 3

ton

Turn·on time from RBI input

NOTE 3:

MIN

100

= 15pF.

RL = 665

n,

100
100
100

UNIT
ns
ns

See General Information Section for load circuits and voltage waveforms.

TEXAS

-Ii}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-837

TYPES SN54248, SN74248
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . .
Input voltage . . . . . . . . . . . . .
Operating free·air temperature range: SN54248
SN74248
Storage temperature range

7V
5.5 V
-55°C to 125°C
aOe to 7aoe
-65°C to 15aoe

NOTE 1: Voltage values are with respect to network ground terminals.

recommended operating conditions
SN54248
MIN
Supply voltage, Vee

4.5

High-level output current, 10H
Low-level output·current, 10L

SN74248

NOM MAX
5

5.5

MIN
4.75

NOM MAX
5

5.25

a thru g

-400

-400

BI/RBO

-200

-200

a thru g

6.4

6.4

BI/RBO

B

8

Operating free-air temperature, T A

-55

125

0

70

UNIT
V
/lA
rnA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
-I
-I

r-

C

m

<

(")

m

en

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

10

Output current

VOL

Low-level output voltage

TEST CONDITIONSt

MIN

TYPt MAX UNIT

2

= MIN,
Vee = MIN,
VIL = 0.8 V,
Vee = MIN,
Vee

a thru g
BI/RBO
a thru g

Vee

II

Input current at maximum input voltage

IIH

High-level input current

II

Input conditions as for VOH
VIL

Any input

=.:-12 rnA
VIH = 2V,
10H = MAX
Vo = 0.85 V,

= MIN,
= 0.8 V,

V

2.4

4.2

2.4

3.7

-1.3

-2

VIH - 2V,
10L

0.27

= MAX

lOS

Short-circuit output current
Supply current

V
rnA
0.4

V

VI

= 5.5 V

1

rnA

Vee

= MAX,

VI = 2.4 V

40

/lA

except Bi /R BO Vee = MAX, VI = 0.4 V

-1.6

except BI/RBO

BI/RBO

lee

V

= MAX,

Any input

Low·level input current

V

-1.5

Vee

except BI/RBO

Any input
IlL

0.8

BI/RBO

rnA

-4
Vee

= MAX

Vee - MAX, See Note 2

53

-4

rnA

90

rnA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at Vee = 5 V, T A = 25°e.
NOTE 2: lee is measured with all outputs open and all inputs at 4.5 V.

switching characteristics, Vee = 5 V, T A = 25°e
PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

tPHL

Propagation delay time, high-to-Iow-Ievel output from A input

tpLH

Propagation delay time, low-to-high-Ievel output from A input

CL = 15pF, .RL = 1 kn,

100

tPHL

Propagation delay time, high-to-Iow-Ievel output from RBI input

See Note 3

100

tpLH

Propagation delay time, low-to-high-Ievel output from RBI input

NOTE 3:

3-838

100

See General Information Section for load circuits and voltage waveforms.

TEXAS -II}

INSTRUMENTS
POST OFFICE BOX 225012. DALLAS. TEXAS 75265

100

ns
ns

TYPES SN54LS248, SN74LS248
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . .
Input voltage . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS248
SN74LS248
Storage temperature range

7V
7V

-55°C to 125°C
. O°C to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS248
MIN
Supply voltage, Vee

4.5

NOM

Low-level output current, 10L

MIN

NOM

5.5

4:75

5

5

a thru g

High-level output current, 10H

SN74LS248

MAX
-100

MAX
5.25

BI/RBO

-50
2

6

BI/RBO

1.6

3.2

-55

125

V

-100

a thru g

Operating free·air temperature. T A

UNIT

-50

0

70

J.l.A
rnA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

10

Output current

Vee; MIN,

11;-18mA

a thru g and

Vee- MIN.

VIH = 2 V.

B1/R"B"O

VIL = VIL max. 10H = MAX

a thru g

Vee= MIN.

Vo = 0.85 V.

Input conditions as for VOH
Vee = MIN.

Low-level output voltage

Any input

maximum input voltage

except Bl/RBO

IlL

LOW-level input current

UNIT
V

0.7

0.8

-1.5

-1.5

V
V

4.2

2.4

4.2

V

-1.3

-2

-1.3

-2

mA

0.25

0.4

0.25

0.4

0.35

0.5

0.25

10L = 1.6 mA

0.4

0.25

0.4
V

VIH=2V.
10L = 3.2 mA
VI =7 V

Vee = MAX.

VI=2.7V

except Bl/RBO Vee = MAX.

VI = 0.4 V

Any input

TYP+ MAX

2

V

Vee = MAX.

except Bl/RBO

MIN

2.4

10L = 2mA

VIL = VIL max
Input current at

High-level input current

SN74 LS248

MAX

10L = 6 mA

Vee - MIN.

IIH

TYP+

VIH=2V.
VIL = VIL max

Bl/RBO

II

MIN
2

a thru g
VOL

SN54LS248

TEST CONDITIONSt

PARAMETER

0.35

0.5

0.1

0.1

mA

20

20

J.l.A

-0.4

-0.4

-1.2

-1.2

BI/RBO
lOS
ICC

output current

8I/RBO

Supply current

en
w
U

>
w

C

Any input

Short·circuit

II

-0.3

Vee = MAX
Vee = MAX.

See Note 2

-2
25

-0.3

38

25

mA

-2

mA

38

mA

...I

lI-

tFor conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions.
0
+AII typical values are at V CC = 5 V. T A 25 C.
NOTE 2: ICC is measured with all outputs open and all inputs at 4.5 v.

switching characteristics, Vee

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

tpHL

Propagation delay time. high·to·low·level output from A input

CL = 15pF.

tpLH

Propagation delay time. low-to-high·level output from A input

See Note 3

100

tPHL

Propagation delay time. high-to-Iow-Ievel output from RBI input

CL = 15pF. RL=6kn.

100

tpLH

Propagation delay time.low-to-high-Ievel output from RBI input

See Note 3

100

NOTE 3:

RL=4kn.

100

UNIT
ns
ns

See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-839

TYPES SN54249, SN74249
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1)
.... .
Input voltage . . . . . . .
.... .
Current forced into any output in the off state
Operating free-air temperature range: SN54249
SN74249
Storage temperature range

7V

5.5 V
1 mA

-55°C to 125°C
O°C to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54149
MIN
Supply voltage, Vee

4.5

High·level output voltage, VOH

MIN

NOM

5.5

4.75

5

V

5.5

V

-200

-200

10

10

8

IBI/RBO

Operating free-air temperature, T A

UNIT

5.5

Ia thru g

Low-level output current, IOL

MAX
5.25

5

IBI/RBO

High-level output current, IOH

SN74249

NOM MAX

-55

125

8
70

0

J.LA
mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST eONDITIONSt

PARAMETER

II
-t
-t
rC

m

<
nm
rJ)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

IOH

High-level output current

VOL

Low-level output voltage

MIN

TYP+ MAX UNIT
V

2

BI/RBO
a thru g

II

Input current at maximum input voltage

IIH

High-level input current

Any input
except BI/RBO
Any input
except BI/RBO

Vee = MIN,

11=-12mA

Vee ~ MIN,

VIH = 2 V,

= MAX

204

Low-level input current

except BI/RBO

Short-circuit output current

lee

Supply current

BI/RBO

V
V

VIL = 0.8 V,

IOH

Vee= MIN,

VIH=2V,

VIL = 0.8 V,

VOH=5.5V

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

IOL = MAX

Vee = MAX,

VI = 5.5 V

1

mA

Vee= MAX,

VI=204V

40

J.LA

Vee = MAX,

VI = 004 V

0.27

250

J.LA

004

V

-1.6

mA

-4

BI/RBO
lOS

V

-1.5
3_7

Any input
IlL

0.8

Vee = MAX
Vee = MAX, See Note 2

53

-4

mA

90

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended. operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e_
NOTE 2: lee is measured with all outputs open and all inputs at 4.5 V.

switching characteristics, Vee

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

tpHL

Propagation delay time, high-to-Iow-Ievel output from A input

tpLH

Propagation delay time, low-to-high-Ievel output from A input

CL = 15 pF,

tpHL

Propagation delay time, high-to-Iow-Ievel output from RBI input

See Note 3

tpLH

Propagation delay time, low-to-high-Ievel output from RBI input

NOTE 3:

3-840

MIN

TYP MAX UNIT
100

RL = 667 .11,

100
100

See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

ns

100
ns

TYPES SN54LS249, SN74LS249
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1)
Input voltage
............. .
Current forced into any output in the offstate
Operating free·air temperature range: SN54LS249
SN74LS249
Storage temperature range

7V
7V

....

1 mA

-55°C to 125°C
. O°C to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS249
MIN
Supply voltage, Vee

4.5

NOM

SN74LS249

MAX

MIN

NOM

5.5

4.75

5

5

MAX
5.25

UNIT
V

High·level output voltage, VOH

a thru g

5.5

5.5

V

High-level output current, 10H

BI/RBO

-50

-50

IJA

Low-level output current, 10L

a thru g

4

8

BI/RBO

1.6

3.2

Operating free-air temperature, T A

-55

125

0

70

mA

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

Vil

low-level input voltage
Input clamp voltage

VOH

Vee = MIN,

II = -18 mA

Vee = MIN,

VIH = 2 V,

Vil = Vil max, 10H = -50 IJA
Vee = MIN,

High-level output current a thru g

low-level input current

0.25

0.8

V

-1.5

V

4.2

V
250

0.4

0.25

0.4

0.35

0.5

(/J

0.25

0.4

U

0.35

0.5

W
0.2.5

10l = 4 mA

0.4

VIH=2V,

V
10l = 8 mA

Any input

Y

Vee = MAX,

VI = 7

Vee= MAX,

VI=2.7V

except BlIRBO Vee = MAX,

VI = 0.4 V

except BI/RBO

IJA

V

Vil = Vil max

III

2.4

UNIT
V

250

10l = 1.6 mA

Vil = Vil max
a thru g

IIH

4.2

10l = 3.2 mA

Vee - MIN,

High-level input current

TYPt MAX

VIH = 2 V,

low-level output voltage

maximum input voltage

MIN

-1.5
2.4

Vil = Vil max, VOH = 5.5 V

BI/RBO

Input current at

SN74LS249

MAX

2

VIH = 2 V,

Vee = MIN,

II

TYPt

0.7

High-level output voltage BI/RBO

VOL

MIN
2

VIK

10H

SN54LS249

TEST CONDITIONSt

0.1

0.1

mA

20

20

IJA

>

w
C

..J

Any input
except BlIRBO

....
....

Any input
BI/RBO
Short-circuit
lOS
ICC

output current

Bi/RBO

-0.3

Vee = MAX

Supply current

Vee= MAX,

See Note 2

-0.4

-0.4

-1.2

-1.2

-2
8

-0.3

15

8

mA

-2

mA

15

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:fAil typical values are at Vee = 5 V, TA = 25°e.
•
NOTE 2: lee is measured with all outputs open and inputs at 4.5 v.

switching characteristics, Vee

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

= 15pF, RL = 2 kf!,

MIN

TYP

MAX

tPHl

Propagation delay time, high-to-Iow-Ievel output from A input

CL

tPlH

Propagation delay time, low-to-high-Ievel output from A input

See Note 3

100

tPHl

Propagation delay time, high-to-Iow-Ievel output from RBI input

CL = 15pF, Rl = 6 kf!,

100

tPlH

Propagation delay time, low-to-high-Ievel output from RBI input

See Note 3

100

NOTE 3:

100

UNIT
ns
ns

See General Information Section for load circuits and voltage waveforms.

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TeXAS 75265

3-841

II
~
~

r-

C
m

<

(")

m

en

3-842

TYPES SN54251, SN54LS251, SN54S251,
SN74251, SN74LS251 (TIM9905), SN74S251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
DECEMBER 1972-REVISED APRIL 1985

•
•

Three-State Versions of '151, 'LS151, 'S151
Three-State Outputs Interface Directly with
System Bus

•

Perform Parallel-to-Serial_Conversion

•

Permit Multiplexing from N-lines to One Line

•

Complementary Outputs Provide True and
I nverted Data

•

Fully Compatible with Most TTL Circuits

TYPE

SN54251, SN54LS251, SN54S251 ... J ORW PACKAGE
SN74251 ... J OR N PACKAGE
SN74LS251, SN74S251 ... 0, J OR N PACKAGE
(TOP VIEW)

03
02

SN54251

49

17 ns

250mW

SN74251

129

17 ns

250mw

15

04

3

14

05

01
DO
Y

4

13

06

5

12

W

6

11

7

10

07
A
B

GNO [8

9

G

MAX NO.
TYPICAL AVG PROP
TYPICAL
DELAY TIME
OF COMMON
POWER
(DTOY)
OUTPUTS
DISSIPATION

Vcc

1 U16
2

C

SN54LS251, SN54S251 ... FK PACKAGE
SN74LS251, SN74S251 ... FN PACKAGE
(TOP VIEW)

SN54LS251

49

17 ns

35mW

SN74LS251

129

17 ns

35mW

SN54S251

39

8 ns

275mW

SN74S251

129

8 ns

275mW

U

~8~~C5
05

01
DO

description
These monolithic data selectors/multiplexers contain
full on·chip binary decoding to select one-of-eight
data sources and feature a strobe-controlled threestate output. The strobe must be at a low logic level
to enable these devices. The three-state outputs permit a number of outputs to be connected to a common bus. When the strobe inout is high, both outputs
are in a high-impedance state in which both the upper
and lower transistors of each totem-pole output are
off, and the output neither drives nor loads the bus
significantly. When the strobe is low, the outputs are
activated and operate as standard TTL totem-pole
outputs.

06

NC

NC

Y
W

07
A

II
en

NC - No internal connection

w

u

FUNCTION TABLE
INPUTS
ENABLE

SELECT

To minimize the possibility that two outputs will
attempt to take a common bus to opposite logic
levels, the output control circuitry is designed so that
the 'average Qutput disable time is shorter than the
average output enable time. The SN54251 and
SN74251 have output clamp diodes to attenuate
reflections on the bus line.

OUTPUTS
V

W

A

G

x

X

H

Z

Z

L

L

L

00

DO
D1
02.
03
54
05

C

B

x
L

:>w

C

--I

L

L

H

L

01

L

H

L

02

L

H

L
H

L

03

H

L

L

L

04

H

L

H

L

05

H

H

L

L

06

-06

H

H

H

L

07

07

lI-

H = high logic level, L = low logic level
X = irrelevant, Z = high impedance (off)
DO, D1 ... D7 = the level of the respective D input

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::s:a~i,~ai~[iu:~Ot~~~~~~nof~"~~~~~e~:~s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-843

TYPES SN54251, SN54LS251, SN54S251,
SN74251, SN74LS251 (TIM9905), SN74S251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
logic diagram
ENABLE

(7)

G
(4)

00-(3)
01-(2)

02-'(1)

DATA
INPUTS

OUTPUT Y

03
04

~~~~~_~2- OUTPUT W

(15)
(14)

05
(13)
D6
(12)
07

B

c
Pin numbers shown on logic notation are for 0, J or N packages.

3-844

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54251, SN74251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee (see Note 1)
Input voltage . . . . . . . .
Off-state output voltage
Operating free-air temperature range: SN54251
SN74251
Storage temperature range

7V

5.5 V
5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54251
MIN
4.5

Supply voltage. Vee

NOM
5

SN74251
MAX

MIN

5.5

4.75

NOM
5

-2

High-level output current. 10H

16

Low-level output current. 10L
-55

Operating free-air temperature. T A

125

0

MAX

UNIT

5.25

V

-5.2

mA

16

rnA

70

°e

eiectrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST eONDITloNst

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

MIN

TYP+

MAX UNIT

2

VOL

Low-level output voltage

10Z

Off-state (high-impedance-state) output current

Vee = MIN.

II = -12 mA

Vee = MIN,

VIH = 2 V.

VIL = 0.8 V,

IOH = MAX

Vee- MIN.

VIH = 2 V,

VIL = 0.8 V,

IOL = 16mA

2.4

V
0.8

V

-1.5

V
V

3.2
0.2

0.4
40

Vee = MAX,

Vo = 2.4 V

VIH = 2 V

Vo = 0.4 V

-40

Vee = MAX,

10=-12mA

-1.5

w

II

Input current at maximum input voltage

Vee= MAX,

VI

5.5 V

1

mA

IIH

High-level input current

Vee= MAX,

VI = 2.4 V

40

p.A

IlL

Low-level input current

Vee - MAX,

VI - 0.4 V

-1.6

mA

lOS

Short-circuit output currentS

Vee = MAX

-55

mA

lee

Supply current

62

mA

10 = 12 mA

Vee = MAX.

Vee+1.5

-18
All inputs at 4.5 V,

All outputs open

38

u

V

Output clamp voltage

=

en

p.A

Vo

VIH=4.5V

II

V

:>w

c

. ...I

tt-

tFor conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions for the applicable type.
tAli typical values are at V CC = 5 V. T A = 25° C.
§Not more than one output should be shorted at a time.

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-845

TYPES SN54251, SN74251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
. switching characteristics,
PARAMETER~

Vee = 5 V, TA = 25° e
FROM

TO

(INPUT)

(OUTPUT)

tPLH

A, B,orC

tpHL

(4 levels)

tPLH

A,B,orC

tpHL

(3 levels)

tPLH

Y

Any D

CL = 50 pF,
RL = 400 n,

tPLH

Any D

W

tpZH
tpZL
tpZH
tpZL
,tpHZ

G

Y

G

W

G

tpLZ

Y

See Note 2

CL=5pF,
RL=400n.

tpHZ

w

G

tpLZ

TYP

29

W

tpHL

II

MIN

Y

tpHL

~

TEST CONDITIONS

See Note 2

45

20

33

21

33

17

28

18

28

10

15

9

15

17

27

26

40

17

27

24

40

5

8

15

23

5

8

15

23

tpLH = Propagation delay time, low-to-high-Ievel output
tpH L = Propagation delay time, high-to-Iow-Ievel output
tpZH = Output enable time to high level
tpZL = Output enable time to low level.
tpHZ = Output disable time from high level
tpLZ = Output disable time from low level

schematics of inputs and outputs

m

EQUIVALENT OF EACH INPUT

TYPICAL OF BOTH OUTPUTS
------------e-~~

Vee

VCC-------e------

<

n
m
en

INPUT
OUTPUT

Select:
Other inputs:

3-846

Req = 6
Req = 4

kn
kn

NOM
NOM

TEXAS ..

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 7526b

45

28

NOTE 2: See General Information Section for load circuits and voltage waveforms.

-I
-I
rC

MAX UNIT
ns
ns
ns
ns

ns
ns
ns
ns

TYPES SN54LS251, SN74LS251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage . . . . . . . .
Off·state output voltage
Operating free·air temperature range: SN54LS251
SN74LS251
Storage temperature range

7V
7V
5.5 V
55°C to 125°C
aOe to 70°C
-65°C to 150°C

NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS251
Vee

Supply voltage

VIH

High·level input voltage

SN74LS251

MIN

NOM

MAX

,MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

2

UNIT
V
V

VIL

Low·level input voltage

0.7

0.8

10H

High-level output current

-1

- 2.6

mA

8

mA

70

°e

10L

Low-level output current

TA

Operating free-air temperature

4
125

- 55

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

Vee = MIN,

11=-18mA

Vee - MIN,

VIH-2V,

VOL

VIL

VIH-2V,

= MAX
=2

Vee = MAX,

VIH

II

Vee = MAX,

VI = 7 V

Vee - MAX,

VI - 2.7V

10S§
ICC

I Enable "IT
I All other

Vee = MAX,

V

= MAX

2.4

3.4
0.25

10L - 4 mA

TYP* MAX
-1.5

2.4
0.4

3.1

UNIT
V
V

.0.25

0.4

0.35

0.5

V

CJ)

Vo = 2.7 V

20

20

VO=O.4V

-20

-20

0.1

0.1

mA
J.l.A

VI =0.4
- 30
See Note 3

MIN

= 8 mA

Vee= MAX
Vee = MAX,

SN74LS251

TYP * MAX
-1.5

VIL

10L

102

IlL

MIN

10H = MAX
Vee- MIN,

IIH

SN54LS251

TEST CONDITIONSt

20

20

-0.2

-0.2

-0.4

-0.4

-130

-130

- 30

Condition A

6.1

10

6.1

10

Condition B

7.1

12

7.1

12

W

J.l.A

CJ

>
w

C

mA

..J

mA

lI-

mA

t
t

For conditions shown as MIN or MAX, use the appropriate value specified under recornmended operating conditions for the applicable type.
All typica I va lues are a't V cc = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
NOTE 3: ICC is measured with the outputs open and all data and select inputs at 4.5 V under the following conditions:
A. Enable grounded.
B. Strobeat4.5V.

"f),it\

TEXAS ~
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-847

TYPES SN54LS251, SN74LS251 (TIM9905)
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
switching characteristics, Vee
PARAMETER~

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

tPLH

A,B,orC

tpHL

(4 levels)

tpLH

A, B,orC

tPHL

(3 levels)

tpLH

Any 0

TEST CONorrlONS

Y

W
Y

CL
RL

Any D

tpHL
tpZH
tpZL
tpZH
tpZL
. tPHZ
tpLZ
tpHZ
tpLZ

lEI

W

G

Y

G

W

G

Y

= 5 pF,
= 2 kQ,

See Note 2

CL
RL

G

TYP
29

tPHL
tPLH

MIN

w

= 15 pF,
= 2 kQ,

See Note 2

MAX UNIT
45

28

45

20

33

21

33

17

28

18

28

10

15

9

15

30
26

45

17

27

24

40

30

45

15

25

37

55

15

25

schematics of inputs and outputs
EQUIVALENT OF GINPUT

EQUIVALENT OF ALL OTHER INPUTS

TYPICAL OF BOTH OUTPUTS

r-

VCC--.....- -

C

m

::=
(")

m

CJ)

Req

VCC-----:

Vee = MAX

ICC

Supply current

Vee - MAX,

-40
All inputs at 4.5 V,

All outputs open

55

-100

mA

B5

mA

TEXAS

~

POST OFFICE BOX 225012 '. DALLAS. TEXAS 75265

w
C

....-J

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
*AII typical values are at Vee = 5 V, T A = 25°C.
_
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second_

INSTRUMENTS

:;
....

3-849

TYPES SN54S251, SN74S251
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
switching characteristics, Vee
PARAMETER~

= 5 V, TA =25°e

FROM

TO

(INPUT)

(OUTPUT)

tpLH

A, B,orC

tpHL

(4 levels)

tpHL

MIN

TVP

or C
(3 levels)

W

Any D

V

MAX UNIT

12

18

13

19.5

CL=15pF,

10

15

RL=280n,

9

13.5

V

A,~,

tpLH

TEST CONDITIONS

8

12

tpHL

8

12

tpLH

4.5

7

4.5

7

13

19.5

tpLH

Any D

W

G

y

See Note 2

tpHL
tpZH
tpZL

CL = 50pF,

14

21

13

19.5

14

21

5.5

8.5

RL = 280 n,

tpZH
tpZL
tpHZ
tpLZ

G

w

See Note 2

G

y

CL=5pF,
RL=280n,

tpHZ

G

w

tpLZ

See Note 2

9

14

5.5

8.5

9

14

ns
ns
ns
ns
ns
ns
ns
ns

~ tpLH = Propagation delay time, low·to-high-Ievel output
tpH L = Propagation delay time. high-to-Iow-Ievel output
tpZH = Output enab Ie time to high level
tpZL = Output enable time to low level
tpHZ = Output disable time from high level
tpLZ = Output disable time from low level

I!!I
IIiiI schematics of inputs and outputs

NOTE 2: See General Information Section for load circuits and voltage waveforms.

EQUIVALENT OF EACH INPUT

r-----------T-V-P-I-CA--L-O-F-B-O-T-H--O-U-T-P-U-T~S------~

~
~

r

----------.----vcc

vcc------~-----

C

m

S

(")

INPUT

m

OUTPUT

en

3-850

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012. DALLAS. TEXAS 75265

TYPES SN54LS253, SN54S253, SN74LS253, SN74S253
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
SEPTEMBER 1972 -

REVISED DECEMBER 1983

SN54LS253. SN54S253 ... J OR W PACKAGE
SN74LS253. SN74S253 ... D. J OR N PACKAGE

• Three-State Version of SN54174LS153,
SN54/74S153

(TOP VIEW)

• Schottky-Diode-Clamped Transistors

vcc

lG

•

Permits Multiplexing from N Lines to 1 Line

A
2C3
2C2
2Cl
2CO
2Y

lC3
lC2
lCl
lCO
lY

• Performs Parallel-to Serial Conversion
•

2G

B

Fully Compatible with Most TTL Circuits

• Low Power Dissipation
'LS253 ... 35 mW Typical
'S253 ... 225 mW Typical

GND

SN54LS253. SN54S253 ... FK PACKAGE
SN74LS253. SN74S253 ... FN PACKAGE

description

(TOP VIEW)

Each of these Schottky·clamped data selectors/mul·
tiplexers contains inverters and drivers to supply
fully complementary, on·chip, binary decoding data
selection to the AND·OR gates. Separate output con·
trol inputs are provided for each of the two four·line
sections.

3 2 1 2019

lC3
lC2
NC
lCl
lCO

The three·state outputs can interface with and drive
data lines of bus·organized systems. With all but one
of the common outputs disabled (at a high·impedance
state) the low·impedance of the single enabled output will drive the bus line to a high or low logic level.

18

A

2C3
NC
2C2
2Cl
9 10 11 12 13

>-ou>-o

~ZZNU

c.:J

N

NC·No internal connection

CJ)

FUNCTION TABLE
SELECT
INPUTS
B
A
X
X
L
L
L
L
H
H
H
H

L
L
H
H
L
L
H
H

L
H

OUTPUT
OUTPUT
CONTROL
y
C3
G
Z
X
H
L
X
L
H
X
L
L
X
L
L
H
X
X
L
L
H
X
L

X
X

L
H

DATA INPUTS
CO
X
L
H

X
X
X
X
X
X

Cl
X
X
X
L
H

X
X
X
X

C2
X
X
X
X
X

L
L

W

U

>
w

C

.-...J

L
H

Address inputs A and B are common to both sections.
H

= high

level, L = low level, X = irrelevant, Z

=

high Impedance (off)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) .. , . . . . . . , . . . . . , .. , . . . . . . , .. , .... , ... , .... , . , , . , ..... , ... , , .... 7 V
Input voltage: 'LS253 .......... ,., ... , ... " . , . , ' . , .......................................... 7 V
'S253 ......................................................... : .... ,....... 5.5 V
Off-state output voltage .................................................................... 5.5 V
Operating free-air temperature range: SN54LS253, SN54S253 ............................. - 55°C to 125°C
SN74LS253, SN74S253 .......................... ".:..... oDe to 70°C
Storage temperature range ......................................................... - 65°e to 150°C
NOTE 1:

Voltage values are with respect to network ground terminal.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea;:s':a~rtvar~~iu:~Ot~~~~~~nof~~f~~~~~e~~;:'

TEXAS

.~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-851

TYPES SN54LS253, SN54S253, SN74LS253, SN74S253
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
logic diagram
OUTPUT

(1)

CONTROl~~=>-----------~------~

10
(6)

lCO--------------~~~

(5)
lCl~----------4=~~-J

DATA 1

OUTPUT
1V

(4)

lC2-----------4~~~~

lC3 _(_3)________---<~~:::::::<~

SElECT{ B

(2)

A ...;,(1_4~)1~.....-c::f>---+-4

(10)

2Cl...;,(1_1~)________~~~~,

DATA 2

OUTPUT
2Y

(12)

-I
-I
rC
m

OUTPUT (15)
CONTROL -~~~----______+-______---J

2G
Pin numbers shown on logic notation are for D, J or N packages.

<

(')

m

CJ)

3-852

"

TEXAS.

INSTRUMENTS

POST OFFICE BOX 225012 • DALLAS. TEXAS 75265"

TYPES SN54LS253, SN74LS253,
DUAL 4-LlNE TO 1-LlNE DATA SELECTCrRS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
schematic (each selector/multiplexer, and the common select section)
G (1,15)

co

(6,10)

Cl (5,11)

C2 (4,12)

C3 (3,13)

II
en

w
CJ

:>w

C

...J

l-

I-

wrrr

(16) VCC

fTGND
(8)

v

TO OTHER SELECTOR/MULTIPLEXER
(SEE FUNCTIONAL BLOCK DIAGRAM)
Pin numbers shown are for D, J or N packages.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-853

TYPES SN54LS253, SN74LS253
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS253
NOM

MIN
4.5

5

5.5

MIN

VIL

Low-level input voltage

0.7

0.8

IOH

High-level output current

-1

- 2.6

mA

8

mA
°c

4

Low-level output current

125

- 55

Operating free-air temperature

ch~racteristics

SN54LS253

TEST CONDITIONSt
; iMIN ,

MIN

VCC

VOH

VCC; MIN,

VIH;2V,

VIL; MAX,

VOL

Vcc; MIN,

VIH;2V,

VIL; MAX

IOZ

Vcc; MAX,

VIH; 2 V

II

Vcc; MAX,

VI; 7 V

IIH

Vcc; MAX,

VI; 2.7 V

IlL

Vcc; MAX,

IOS§

VCC; MAX

ICC

VCC; MAX,

II; -18 mA
IOH; MAX

2.4

IOL;4mA

3.4
0.25

IOL - 8 mA
VO;2.7V
VO;0.4V

G

VI; 0.4 V

All other

MIN

TYP*

2.4

3.1

-1.5

0.4

Condition A
Condition B

TO

(INPUT)

(OUTPUT)

Data

Y

Select
Output

tpZL
tpHZ

Control

tPLZ

Control

Output

TEST CONDITIONS

Y

CL;15pF,

RL;2kS1,

See Note 3

Y
Y

CL; 5 pF,

RL;2kS1,

See Note 3

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-854

0.25

0.4

0.25

0.5

V

20
- 20

0.1

0.1

mA

20

20

JJA

- 0.2

- 0.2

-130

-0.4
-130

- 30

7

12

7

12

8.5

14

8.5

14

JJA

mA
mA
mA

Vee = 5 V, T A = 25° e

FROM

tpHL
tpHL
tpZH

V
V

20

switching characteristics,

tPLH

UNIT

- 20

<

tPLH

MAX

- 0.4
- 30

See Note 2

SN74LS253

TYP* MAX
-1.5

C

PARAMETER

70

0

V

over recommended operating free-air temperature range (unless otherwise noted)

VIK

(")

V

2

2

m
m

V

High-level input voltage

t For conditions shown as MIN or MAX, use the appropriate value spcified under recommended operating conditions.
t All typical values are at Vee; 5 V, T A; 25°C.
§ Not more than one output should be shorted at a time, and duration for the short·circuit should exceed one second.
NOTE 2: ICC is measured with the outputs open under the following conditions:
A. All inputs grounded.
B. Output control at 4.5 V, all inputs grounded.

en

5

4.75

UNIT

Supply voltage

PARAMETER

r

MAX
·5.25

VCC

electrical

~
~

NOM

VIH

IOL
. TA

II

SN74LS253

MAX

TEXAS

-It!p

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TYP

MAX UNIT

17

25

13

20

30

45

21

32

15
15

28
23

27

41

18

27

ns
ns
ns
ns

TYPES SN54S253, SN74S253
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
recommended operating conditions
SN54S253

SN74S253

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V
V

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

2

2

V

IOH

·High-Ievel output current

-2

-6.5

mA

IOL

Low-level output current

20

20

mA

TA

Operating free-air temperature

70

°c

- 55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK

MIN

TEST CONDITIONSt
VCC = MIN,

Typt

11=-18mA

I

Series 54S

2.5

3.4

I Series 74S

2.7

3.4

MAX

UNIT

-1.2

V
V

VOH

VCC = MIN,

VIH=2V,

VIL=0.8V,

IOH = MAX

VOL

VCC = MIN,

VIH = 2 V,

VIL=0.8V,

IOL=20mA

IOZ

VCC = MAX,

VIH = 2 V

II

VCC= MAX,

VI = 5.5 V

1

mA

IIH

VCC = MAX,

VI = 2.7 V

50

J.lA

IlL

VCC = MAX,

IOS§

VCC= MAX

ICC

VCC = MAX,

I Vo -

I
I

VI = 0.5 V

See Note 2

V

0.5

I VO-2.4V

50

J.lA

-50

0.5 V

-2

G=0.8V,

mA
G=2V

- 0.25
-40

-100

I

Condition A

45

70

I

Condition B

65

85

mA
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at V CC = 5 V, T A = 25° C.
Not more than one output should be shorted at a time and duration of short-circuit should not exceed one second.
NOTE 2: ICC is measured with the outputs open under the following conditions:
A. All inputs grounded.
B. Output control at 4.5 V, all inputs grounded.

switching characteristics, Vee
PARAMETER
tPLH

TO

(INPUT)

(OUTPUT)

Data

en
w

u
5=
w

= 5 V, TA = 25°e

FROM

TEST CONDITIONS

. MIN

TYP
6

Y

MAX
9

tPHL

6

9

tPLH

11.5

18

Select

Y

tpHL

RL = 280

n,

CL=15pF

See Note 3

tpZH

Output

tpZL

Control

tpHZ

Output

tpLZ

Control

Y

y

RL = 280

n,

CL = 5 pF

See Note 3

II

12

18

11

16.5

12

18

6.5

9.5

10

15

UNIT

C

-I

ns

lI-

ns
ns
ns

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

-II;

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-855

-I
-I

r-

C

m

!5
(j
m

VJ

3-856

TYPES SN54LS257B, SN54LS258B, SN54S257, SN54S258,
SN74LS257B, SN74LS258B, SN74S257, SN74S258
QUADRUPLE 2-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
OCTOBER 1976-

SN54LS257B, SN54S257,
SN54LS25BB, SN54S258 ... J OR W PACKAGE
SN74LS257B, SN74S257,
SN74LS258B, SN74S258 ... D, J OR N PACKAGE
ITOPVIEWI

• Three-State Outputs Interface Directly
with System Bus
• 'LS257B and 'LS258B Offer Three
Times the Sink-Current Capability
of the Original 'LS257 and 'LS258

~ee

G

• Same Pin Assignments as SN54LS157,
SN74LS157, SN54S157, SN74S157, and
SN54LS158, SN74LS158, SN54S158,
SN74S158

2B
2Y

GND

AVERAGE PROPAGATION

TYPICAL

DELAY FROM
DATA INPUT

POWER
DISSIPATIONt

9 ns
9 ns

55mW

4.8 ns
4 ns

320mW
280mW

'LS258B
'S257
'S258

4A
4B
4Y
3A
3B
3Y

1B
1Y

• Provides Bus Interface from Multiple
Sources in High-Performance Systems

'LS257B

DECEMBER 1983

SN54LS257B, SN54S257,
SN54LS258B,SN54S258 ... FK PACKAGE
SN74LS257B,SN74S257,
SN74LS258B,SN74S258 ... FN PACKAGE

55mW

(TOPVIEWI

t Off state (worst case)

4A

description

NC

'These devices are designed to multiplex signals from
four-bit data sources to four-output data lines in busorganized systems. The 3-state outputs will not load the
data lines when the output control pin (3) is at a highlogic level.

)-ou)-oo

"'22MM
(,!)

Series 54LS and 54S are characterized for operation
over the full military temperature range of -55°C to
125°C; Series 74LS and· 74S are characterized for
operation from ooe to 70°C.

w

>
W

C

INPUTS

..oJ

~

OUTPUT Y
B

'LS257B
'S257

'LS258B
'S258

X

X

Z

Z

L

X

L

H

L

H

X

H

L

L

H

X

L

L

H

L

H

X

H

H

L

SELECT

A

H

X

L

L

L

CONTROL

en
(.)

NC-No internal connection.

. FUNCTION TABLE
OUTPUT

II
t-

H = hIgh level, L = low level, X = Irrelevant,
Z - high impedance (off)

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~!::n::::s:a~rl~ar~liu:~Ot~~~~~~nDr~~f:~~~~e~~~s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-857

TYPES SN54LS257B, SN54LS258B, SN54S257, SN54S258,
SN74LS257B, SN74LS258B, SN74S257, SN74S258
QUADRUPLE 2-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
logic diagrams
'LS257B, 'S257

1A

~~-

'LS258B, 'S25S'

_ _ _ _-I

1A - ' - " - - - - - - " " " ' 1
1Y

~~--+_---I

1B

1B

2Y

28
3A

3Y

4A

48

48

AlB

AlB

1II09iC
nm
CJ)

4Y

symbol
'LS257B

G

<

3Y

38

4A

m

2Y

28
3A

38

rC

(15)

G

AlB (1)

1A
1B

AlB

\l

(4)

2A

171

2B
3A

(9)

1A

1Y

1B
2A
28
3A

2V
3V

3B
4A
4B

(12)

38
4A

4V

4B

G

G

AlB

AlB

1A
1B

1Y

1A
1B

2A
2B

2V

2A
2B

3A
3B
4A
4B

3A
38
4A

3V
4V

4B

Pin numbers shown on logic notation are for 0, J or N packages.

3-858

1Y

2A

2A

-f
-f

......;..;."'---t----1

, TEXAS-I!}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS257B, SN54LS258B, SN54S257, SN54S258,
SN74LS257B,SN74LS258B,SN74S257,SN74S258
QUADRUPLE 2-UNE TO 1-UNE DATA SELECTORS/MULTIPLEXERS
schematics of inputs and outputs
'LS257 B, 'LS258B
EQUIVALENT OF AlB INPUT

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF ALL
OTHER INPUTS

- - - - - - - -......Vee------.------

Vee

-----6----

Vee

100.11 NOM

18 k.l1
NOM

INPUT
INPUT .....~~-.-

OUTPUT

'S257, 'S258
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
-------o--Vce

II

50.11 NOM
Vee - - - - - - . - - -

(/J

W
(.)

INPUT

:>w
C

..oJ

lI-

Select: Req; 1.4 k.l1 NOM
All other inputs: Req; 2.8 k.l1 NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) ............................................................... 7 V
Input voltage: 'LS257B, 'LS258B Circuits ........................... , ....•................. , ..... ' 7 V
'S257, 'S258 Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . .. 5.5 V
Off-state output voltage ................................................................... " 5.5 V
Operating free·air temperature range: SN54LS', SN54S' Circuits ............................. -55°C to 125°C
SN74LS', SN74S' Circuits ................................ OoC to 70°C
Storage temperature range ........................................................... _65°C to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-859

TYPES SN54LS257B, SN54LS258B, SN74LS257B, SN74LS258B
QUADRUPLE 2-LlNE T01-LlNE DATA SELECTORS/MULTIPLEXERS
recommended operating conditions
SN74LS'

SN54LS'
MIN

NOM

MAX

MIN

NOM

4.5

5

5.5

4.75

5

MAX
5.25

UNIT
V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.7

0.8

IOH

High-level output current

-1

-2.6

mA

24

mA

70

°e

IOL

Low-level output current

TA

Operating free-air temperature

V

2

2

12
-55

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

MIN

11= -18 mA

Vee = MIN,

VIH = 2V,

VIL = MAX,

VIH=2V,

IOL = 12 mA

IOH = MAX

VOL

VIL = MAX,

2.4

MAX

TYP*

-1.5
2.4

3.4
0.25

0.4

IOL = 24 mA

0.4

0.35

0.5

VIH=2V,

VO=2.7V

20

20

J.lA

Vee - MAX,

VIH=2V,

VO=O.4V

-20

-20

J.lA
mA

II

Vee = MAX,

VI =7V

0.1

0.1

IIH

Vee = MAX,

VI = 2.7 V

20

20

J.lA

IlL

Vee = MAX,

VI =0.4V

- 0.4

-0.4

mA

-130

mA

-30

Vee = MAX,

-130
8

All outputs low
All outputs off
Icc

All outputs high

'LS257B
Vee = MAX,

See Note 2

All outputs low

'LS258B

All outputs off

-30
8

12

12

18

12

18

19

13

19

6

9

6

9

10

15

10

15

11

16

11

16

switching characteristics, Vee = 5 V, TA = 25°e, RL = 667 n
PARAMETER
tpLH

FROM

TO

(INPUT)

(OUTPUT)

Data

Any

Select

Any

MIN

TYP

MAX

TYP

MAX

8

13

7

12

10

15

11

17
21

tPHL
tpLH

eL =45 pF,

See Note 3

tpHL
tpZH

Output

tpZL

Control

tpHZ

Output

tPLZ

Control

Any
Any

et.:=5pF,

tpLH = propagation delay time, low-to-high-Ievel output
tpHL = propagation delay time, high-to-Iow-Ievel output
tpZH = output enable time to high level
NOTE 3: See General Information Section for load circuits and
voltage waveforms.

3-860

'LS258B

'LS257B

TEST CONDITIONS

See Note 3

MIN

16

21

14

17

24

19

24

15

30

15

30

19

30

20

30

18

30

18

30

16

25

16

25

tpz L = output enable time to low level
tpHZ = output disable time from high level
tpLZ = output disable time from low level

TEXAS

12

13

<
m

V

Vee = MAX,

rC

"en

V
V

3.1
0.25

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at Vee = 5 V, TA = 25°e.
§ Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
NOTE 2: lec is measured with all outputs open and all possible inputs grounded while achieving the stated output conditions.

m

UNIT

IOZH

All outputs high

~
~

MIN

IOZL

IOS§

III

MAX

TYP*

-1.5

Vee = MIN,

Vee = MIN,

SN74LS'

SN54LS'

TEST CONDITIONSt

-iii

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

mA

UNIT
ns
ns
ns
ns

TYPES SN54S257, SN54S258, SN74S257, SN74S258
QUADRUPLE 2-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
recommended operating conditions
SN54S'
MIN
Supply voltage. Vee

SN74S'

NOM

MAX

MIN

NOM

5

5.5

4.75

5

4.5

High·level output current. IOH

MAX

-2

Low·level output current. IOL

5.25

V

-6.5

mA

20

mA

70

"e

20

Operating free·air temperature, T A

-55

125

UNIT

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High·level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

VOL

Low-level output voltage
Off-state output current,

10ZH

10ZL
II

IlL
lOS

II; -18 mA

Vee; MIN,

VIH;2V.

Any other
S input

input current

Any other

Short-circuit output current S

2.7

SN54S'

2.4

3.4

SN74S'

2.4

3.2

VIL; 0.8 V,

10H; MAX

Vee; MIN,

VIH;2V.

VIL;0.8V,

10L; 20 mA

Vee; MAX, VI

= 5.5

Supply current All outputs low

V
V

-1.2

-1.2

V

V

VI;0.5V
-40

Vee; MAX

UNIT

MAX

0.8

Vee; MAX, VI; 2.7 V

Vee; MAX

TYPt

0.8

Vee; MAX, VIH;2V,

Vee; MAX, See Note 2

All outputs off

2.4

3.4

2.4

3.2

V

0.5

0.5

V

50

50

IJA

-50

-50

IJA

1

1

mA

100

100

50

50

-4

-4

-2

-2

-100

All outputs high
ICC

MIN

2.7

IOH;-lmA

VO;0.5V

Low-level

SN74S'

VIH;2V,

low-level voltage applied

input current

MAX

2

Vee; MIN,

VO;2.4V

S input

TYPt

VIL; 0.8 V,

Vee = MAX, VIH;2V,

High-level
IIH

Vee; MIN,

Off-state output current.

input voltage

MIN
2

high·level voltage applied

Input current at maximum

'S258

'S257

TEST CONDITIONSt

PARAMETER

-40

68

36

56

60

93

52

81

64

99

56

87

en
w

mA

u

mA

-100

44

II

IJA

:>w

mA

C

...J

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V. T A; 25°e.
§Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second,
NOTE 2: lee is measured with all outputs open and all possible inputs grounded while achieving the stated output conditions.

~
~

switching characteristics, Vee = 5 V, T A = 25°e, RL = 280 S1
PARAMETER~

tPLH

FROM

TO

TEST

(INPUT)

(OUTPUT)

CONDITIONS

Data

'S257
MIN

Any

tpHL
tpLH

Select

Any

tPHL

----

tpZH

Output

tpZL

Control

tpHZ

Output

tpLZ

Control

CL

= 15 pF,

See Note 3

Any

Any

'S258

TYP

MAX

5

7.5

4

6

4.5

6.5

4

6

8.5

15

8

12

8.5

15

7.5

12

13

19.5

13

19.5

MIN

TYP

MAX

14

21

14

21

= 5pF.

5.5

8.5

5.5

8.5

See Note 3

9

14

9

14

CL

,fmax = Maximum clock frequency
tpLH ; propagation delay time, low-tohigh·level output
tpHL ; propagation delay time, high-to-Iow·level output
tpZH = output enable time to high level
NOTE 3: See General Information Section for load circuits and voltage waveforms.

tpZL
tpHZ
tpLZ

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

0

UNIT

ns

ns
ns

ns

output enable time to low level
output disable time from high level
output disable time from low level

3-861

111
-t
-t

rC
m

<

n
m

-cn

3-862

TYPES SN54259, SN54LS259B, SN74259, SN74LS259B
8-BIT ADDRESSABLE LATCHES
REVISED DECEMBER 1983

SN54259, SN54LS259B ..• J OR W PACKAGE
SN74259 ... J OR N PACKAGE
SN74LS259B ... D, J OR N PACKAGE

• 8-Bit Parallel-Out Storage Register Performs
Serial-to-Parallel Conversion with Storage

ITOPVIEW)

• Asynchronous Parallel Clear
• Active High Decoder
• Enable/Disable Input Simplifies Expansion
• Expandable for N-Bit Applicatio~s

D

• Four Distinct Functional Modes
• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPS

Q1

Q7

Q2

Q6

Q3

Q5

GND '-I..::~---=:J-' Q4
SN54LS259B •.• FK PACKAGE
SN74LS259B •.. FN PACKAGE

• Dependable Texas Instruments Quality and
Reliability

/TOPVIEW)

description

U ~15
(J)(J)z>u

.- 0

Ti'lese 8-bit addressable latches are designed for general
purpose storage applications in digital systems. Specific
uses include working registers, serial-holding registers,
and active-high decoders or demultiplexers. They are
multifunctional devices capable of storing single-line
data in eight addressable latches, and being a 1-of-8
decoder or demultiplexer with active-high outputs.

3 2

1 2019

4

5

6
Q1

7

Q2

8
9 10 111213

Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as
enumerated in the function table. In the addressablelatch mode, data at the data-in terminal is written into
the addressed latch. The addressed latch will follow the
data input with all unaddressed latches remaining in
their previous states. In the memory mode, all latches
remain in their previous states and are unaffected by the
data or address inputs. To eliminate the possiblity of
entering erroneous data in the latches, enable Gshould
be held high (inactive) while the address lines are changing. In the Fof-8 decoding or demultiplexing mode, the
addressed output will follow the level of the D input with
all other outputs low. In the clear mode, all outputs are
low and unaffected by the address and data inputs.

II

8~~d~
(.!)

NC - No internal connection

en
w

logic symbol

(J

>

W

C

~

(4)
9,10
10,lR

The SN54259 and SN54LS259B are characterized for
operation over the full military temperature range of
-55°C to 125°C. The SN74259 and SN74LS259B are
characterized for operation from O°C to 70°C.

tt00
01

9,20
10;iR

02

9,30
10JR

(7)

9,40
10,4R

(91

9,50
10;5R
9,60
10;6R

(10) 05

9,70
10j'R

(12) Q1

03
04

11)06

Pin numbers shown on logic notation are for D, J or N packages.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~n~:::S~~il~r~!J'u:~Ot~~~~~:nof~~f~!~~~e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-863

TYPES SN54259, SN54LS259B, SN74259, SN74LS259B
a-BIT ADDRESSABLE LATCHES
LATCH SELECTION TABLE

FUNCTION TABLE

INPUTS
I~

G

OUTPUT OF

EACH

ADDRESSED

OTHER

SELECT INPUTS
FUNCTION

S2

S1

SO

LATCH
ADDRESSED

0

L

L

L

H

L

D

QiO

Addressable Latch

L

L

H

1

H

H

QiO

Memory

L

H

L

2

L

B·Line Demultiplexer

L

H

H

3

L

Clear

H

L

L

4

H

L

H

5

H

H

L

6

H

H

H

7

LATCH

L

L

QiO
D

L

H

L

OUTPUT

H =" high level, L "" low level
D '" the level at the data input
QiO'" the level of Qi (i = 0, I, ..• 7, as appropriate) before the indi·.

cated steady.state input conditions were established.

schematic of inputs and outputs

'259

'259

EQUIVALENT OF EACH INPUT

TYPICAL QF ALL OUTPUTS
--------- VCC

Vcc----+--

100

n

NOM

INPUT

L-.._-+-_ OUTPUT

II

G: Req
All other inputs: Req

= 2.2 kn NOM
= 4 kn NOM

r-___________'~L~S2~5~9~B~~--------,_-----------·~L~S~25~9~B~----------~------____~'L~S~2~5~9~B__________~
EQUIVALENT OF

-I
-I

r-

Vcc---'-

C

G INPUT

EQUIVALENT OF ALL OTHE R INPUTS

TYPICAL OF ALL OUTPUTS
- - - - - - - - - V CC

Vcc--.---Req

=

120

n

NOM

17 kn NOM

m

::;

n
m
en

INPUT

I NPUT .....;~~---.>-

L-_-+-_ QUTPUT

-

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1) .................................................................... 7 V
Input voltage: SN54259, SN74259. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .. 5.5 V
SN54LS259B, SN74LS259B ........................................................ 7 V
Operating free-air temperature range: SN54259, SN54LS259B ............................. - 55°C to 125°C
SN74259, SN74LS259B ................................. aOe to 7aoe
Storage temperature range .......................................................... - 65°C to 15aoe
NOTE 1: Voltage values are with respect to network ground terminal.

3-864

:::TEX'ls ..
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54259, SN74259
a-BIT ADDRESSABLE LATCHES

recommended operating conditions
SN54259

SN74259

MIN NOM MAX
Supply voltage, Vee

4.5

5.5

5

High·level output current, 10H

MIN
4.75

NOM MAX

-800

Low-level output current, 10L
Width of clear or enable pulse, tw

V

-800

IJA

16

mA
ns

16
Data

Setup time, tsu
Hold time, th

15

15

15t

15t

Address

5t

5t

Data

ot

ot

20t

20t

Address

Operating free-air temperature, T A

125

-55

UNIT

5.25

5

ns
ns
70

0

°e

tThe arrow indicates that the rising ~edge of the enable pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74259

VIH

High-level input voltage

SN54259
MIN TYP:!: MAX
2

VIL

Low-level input voltage

0.8

0_8

V

VIK

Input clamp voltage

-1.5

-1.5

V

VOH

High-level output voltage

VOL

Low-level output voltage

II

Input current at maximum input voltage

TEST CONDITIONSt

PARAMETER

High-level input
IIH

G
Other inputs

current
Low-level input

IlL

G
Other inputs

current

Vec= MIN,

II = 12 mA

VCC= MIN,

VIH = 2V,

VIL = 0.8 V,

10H = -800IJA

Vec = MIN,

VIH=2V,

VIL = 0.8 V,

10L = 16mA

VCC= MAX,

VI = 5.5 V

VCC= MAX,

VI = 2.4 V

VCC= MAX,

lOS

Short-circuit output current§

Vec= MAX

ICC

Supply current

VCC= MAX,

2.4

MIN TYPt MAX
2

2.4

3.4
0.2

V

V

3.4
0.4

0.2

0.4

1

1

VI = 0.4 V

80

80

40

40

-3.2

-3.2

-1.6

-1.6

-18
See Note 2

-57
60

-18

V
mA
IJA
mA

-57

mA

90

mA

60

90

UNIT

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at V CC = 5 V, T A = 25° C.
§ Not more than one output should be shorted at a time.
NOTE 2: ICC is measured with the inputs grounded and the outputs open.

switching characteristics, Vee
PARAMETER
tpHL
tPLH

tpHL
tpLH
tpHL

>
W

C

......
-I

= 5 V,.TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

CLR

Any Q

Data

Any Q

tPHL
tPLH

en
w

(.)

Address

AnyQ

G

AnyQ

TEST CONDITIONS

MIN

TYP

MAX

UNIT
ns

16

25

14

24

CL = 15 pF,

11

20

RL = 400n,

15

28

See Note 3

17

28

12

20

11

20

ns
ns
ns

tpLH == propagation delay time, low-to-high-Ievel output
tpHL == propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voitage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-865

TYPES SN54LS259B, SN74LS259B
8-BIT ADDRESSABLE LATCHES

recommended operating conditions
SN54LS259B

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

IOL

Low-level output current

tw

Pulse duration

ts~

Set up time

SN74LS259B

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

Hold time

TA

Operating free·air temperature

V
V

2

V

0.7

0.8

- 0.4

-0.4

mA

8

mA

4

th

UNIT

Glow

17

17

eLR low

10

10

Data before G t

20

20

Address before G t

17

17

Address before G ~

0

0

Data after G t

0

0

Address after G t

0

0

- 55

125

ns

ns

ns

0

70

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

Vee; MIN,

11;-18mA

Vee - MIN,

VIH - 2 V,

II
~
~

r-

C

m

<
n
m

en

MIN

TYP

SN74LS259B

MAX

MIN

TYP

-1.5
VIL - MAX,

2.5

IOH; - 0.4 mA
Vee; MIN,

VOL

SN54LS259B

TEST CONDITIONSt

VIH;2V,

0.25

IIOL;4 mA

VIL; MAX

-1.5
-,2.7

3.4

MAX

0.4

IIOL - 8mA

UNIT
V
V

3.4
0.25

0.4

0.35

0.5

V

II

Vee; MAX,

VI; 7 V

0.1

0.1

IIH

Vee - MAX,

VI- 2.7 V

20

20

IJA

IlL

Vee= MAX,

VI;O.4V

-0.4

-0.4

mA

IOS~

Vee; MAX

lee

Vee - MAX,

- 20
See Note 2

-100
27

-20

36

22

mA

-100

mA

36

mA

t For conditions shown as MIN or MAX, use'the appropriate value specified under recommended operating conditions
tAli typical values are at Vee; 5 V, T A ~ 25°C.
§ Not more than one output should be shorted at a time, and duration short-circuit should not exceed one second.
NOTE 2: ICC is measured with the inputs grounded and the outputs open.

switching characteristics, Vee
PARAMETER
tPHL'
tpLH

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

eLR

Any Q

Data

Any Q

tpHL
tpLH

TEST CONDITIONS

CL;15pF,
Address

Any Q

RL; 2 kf!,

See Note 3

tpHL
tpLH

-G

Any Q

tpHL
tpLH ; propagation delay time, low-to-high level output
tpH L ; propagation delay time, high-to-Iow level output
NOTE 3: See General Information Section for load circuits and voltage waveforms,

3-866

TEXAS . .

INSTRUMENlS '
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TYP

MAX

12

18

19

30

13

20

17

27

14

20

15

24

15

24

UNIT
ns
ns
ns
ns

TYPES SN54S260, SN74S260
DUAL 5-INPUT POSITIVE -NOR GATES
REVISED DECEMBER 1983

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

SN54S260 ... J OR W PACKAGE
SN74S260 ... D. J OR N PACKAGE
(TOP VIEW)

• Dependable Texas Instruments Quality and
Reliability
description
These devices contain two independent 5-input positive
-NOR gates. They perform the Boolean function
Y = A + B + C + 0 + E in positive logic.
The SN54S260 is characterized for operation over the
full military temperature range of -55°C to 125°C. The
SN74S260 is characterized for operation from O°C to
70°C.

VCC
1E
10
2E
20
2C
28

18
1C
2A
1Y
2Y
GNO

SN54S260 •.. FK PACKAGE
SN74S260 ... FN PACKAGE
(TOP VIEW)

logic diagram (each gate)
1D
NC
2E
NC

1C
NC
2A
NC

2D
>-oucou

NZZNN
(!)

NC - No internal connection

en
w

(.)

>
W
C
..oJ

tt-

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments
standard warranty. Production rrocessing does
not necessarily include testing 0 all parameters.

. TEXAS' ~
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-867

TYPES SN54S260, SN74S260
DUAL 5-INPUT POSITIVE -NOR GATES
schematic (each gate)
r----4~--------~------------~._-VCC

INPUTS
A ____•

____J

,-

y

B ---e.__+-__

~..J

L __ _

~~~-----------------e--------~~----~-- GND

Resistor values shown are nominal.
The portion of the schematic within the dashed-line is repeated for each additional input.

-I
-I

r-

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee (see Note 1) ............................................................... 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54' .•......................................... - 55°C to 125°C
SN74' ................................................ oOe to 70°C
Storage temperature range .......................................................... - 65°C to 150°C

C

m

<

("')

m

en

NOTE 1: Voltage values are with respect to network ground terminal.

3-868

+~~.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54S260, SN74S260
DUAL 5-INPUT POSITIVE -NOR GATES
recommended operating conditions
SN54S260
MIN
Vee

Supply voltage

VIH

High·level input voltage

TYP

4.5

SN74S260

MAX

5

5.5

2

MIN

TYP

MAX

4.75

5

5.25

2

UNIT
V
V

VIL

Low-level input voltage

0.8

0.8

V

IOH

High-level output current

-1

-1

rnA

20

rnA

70

°e

IOL

Low-level output current

TA

Operating free-air temperature

20
-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54S260

TEST CONDITIONS t

MIN

VIK

Vee; MIN,

II'; -18 mA

VOH

Vee; MIN,

VIL; 0.8 V,

IOH ;-1 rnA

VOL

Vec ;MIN,

VIH;2V,

IOL;20mA

TYP*

SN74S260

MAX

MIN

TYP; MAX

-1.2
2.5

3.4

2.7

V

0.5

V

3.4

0.5

UNIT

-12

V

II

Vee; MAX,

VI; 5.5 V

1

1

IIH

Vee; MAX,

VIH; 2.7 V

50

50

p.A

IlL

Vee; MAX,

VIL;0.5V

-2

-2

rnA

IOS§

Vce - MAX

-100

rnA

leeH

Vee - MAX,

VI-OV

17

29

17

29

rnA

leeL

Vee; MAX,

See Note 2

26

45

26

45

rnA

-40

-100

-40

rnA

t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee; 5 V, T A; 25°e.
§ Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.
NOTE 2: One input at 4,5 V, all others at

switching characteristics, Vee
PARAMETER
tPLH
tpHL

II

GN D.

= S V, TA = 2So e (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

Any

Y

en
w

TEST CONDITIONS
RL ;280

n,

eL; 15 pF

NOTE 3: See General Information Section for load circuits and voltage waveforms.

MIN

TYP

MAX

4

5.5

ns

4

6

ns

UNIT

(.)

:>w
C

..J

lI-

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 2250\2' • .' DALLAS. TEXAS 75265

3-869

3-870

TYPES SN54LS261, SN74LS261
2-BIT BY 4-BIT PARALLEL BINARY MULTIPLEXERS
MARCH 1974 - REVISED DECEMBER 1983

SN54LS261 _.. J OR W PACKAGE
SN74LS261 ... D. J OR N PACKAGE

Fast Multiplication ... 5-Bit Product in 26 ns Typ
o

Power Dissipation ... 110 mW Typical

o

Latch Outputs for Synchronous Operation

o

Expandable for m-Bit-by-n-Bit Applications

o

Fully Compatible with Most TTL and Other
Saturated Low-Level Logic Fa-:nilies

o

Diode-Clamped Inputs Simplify System
Design

(TOPVIEWI

B3
B4
C
M2

VCC
B2
B1
BO
M1
MO
GO
Q1

Ci4
OJ

02
GND

description
SN54LS261 __ . FK PACKAGE
SN74LS261 ..• FN PACKAGE

These low-power Schottky circuits are designed to be
used in parallel multiplication applications_ They
perform binary multiplication in two's-complement
form, two bits at a time_

(TOPVIEWI
'
w

OUTPUTS

MULTIPLII:R

CONTROL

The SN54LS261 is characterized for operation over
the full military temperature range of -55°C to
125°C; the SN74LS261 for operation from O°C to
70°C.

U

-C
M2
NC

The outputs represent partial products in one'scomplement form generated as a result of multiplication_ A simple rounding scheme using two additional
gates is needed for each partial product to generate
two's complement.
The leading (most-significant) bit of the product is
inverted for ease in extending the sign to square (left
justify) the partial-product bits_

CO")

ccccz>cc

M2

M1

MO

04

Q3

Q2

Q1

C

QO

...J

lI-

Q40 Q30 02 0 01 0 QOo
H
L
L
L
L

L

X

X

X

H

L

L

L

H

L

L

H

84

B4

B3

B2

Bl

H

L

H

L

B4

B3

B2

Bl

H

L

H

H

B4
B4

B3

B2

Bl

BO

H

H

L

L

B4

83

82

81

BO

H

H

L

H

B4

B4

B2

Bl

H

H

H

L

B4

84

83
B3

B2

IBl

H

H

H

H

H

L

L

L

L

H = high level. L = low level. X = irrelevant
040 .•• aoo = The logic level of the same output before the
hlgh-to-Iow transition of C.
B4 _ .. BO = The logic level of the indicated multiplicand (B) input.

PRODUCTION DATA

This document contains information current as
of publication, date. Products conform to
specifications per the terms of Texas Instruments
standard warranty. Production froceSSing does
not necessarily include testing 0 all parameters.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-871

TYPES SN54LS261, SN74LS261
2-BIT BY 4-BIT PARALLEL BINARY MULTIPLEXERS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
Vee---'l""--

TYPICAL OF QO, Q1, Q2, Q3 OUTPUTS

----t--Vee

TYPICAL OF

Vee-+--

04

OUTPUT

---+--Vee

17 kn NOM

OUTPUT

OUTPUT

c: Req;o 17 kn NOM
B or M2: Req;o 20 kn NOM
MO or MI: Req;o 10 kn NOMlogic diagram

II
-t
-t

rC
m

:$

(")

m

en

Pin numbers shown on logic notation are for D, J or N packages.

3-872

~

·TEXAS
INSTRq~ENTS
POST OFFiCe BOX 225012 • DALLAS, TeXAS 75265

TYPES SN54LS261, SN74LS261
2-BIT BY 4-BIT PARALLEL BINARY MULTIPLEXERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free·air temperature range: SN54LS261
SN74LS261
Storage temperature range

7V
7V

-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS261
Supply voltage, Vee

MIN

NOM

4.5

5

High-level output current, IOH

SN74LS261

MAX

MIN

NOM

5.5

4.75

5

-400

Setup time, tsu
Hold time, th

5.25

V
jJ.A

8

rnA
ns

25

25

Any M input

1n

17~

Any B input

15~

15~

Any M input

O~

O~

Any B input

O~

O~

-55

Operating free-air temperature, T A

125

UNIT

-400

4

Low-level output current, IOL
Width of enable pulse, tw

~ The

MAX

ns
ns
70

0

°e

arrow indicates that the falling edge of the enable pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High·level input voltage

VIL
VIK

Low-level input voltage

TYP+

MAX

MIN

SN74LS261
TYP+ MAX

2

Input clamp voltage

Vee - MIN,

11- -18 mA

Vee; MIN,

VIH;2V,

VIL; VIL max,

10H ;-400 jJ.A

Vee; MIN,

VIH; 2 V,

Input current at

Vee; MAX,

High-level input current

Vee; MAX,

IlL

Low-level input current

Vee; MAX,

lOS

Short-circuit output current ~

Vee; MAX

lee

Supply current

Vee - MAX,
Outputs open .

IOL; 4 mA

2.7

3.4
0.25

0.4

10L - 8 mA

VIL; VIL max

maximum input voltage

0.8
-1.5

-1.5
2.5

VI; 7 V

VI; 2.7 V

0.25

0.4

0.35

0.5

0.2

0_2

0.1

0.1

MO orMI

40

40

All others

20

20

MOorMI

-0.8

-0_8

All others

-0.4
-20

All inputs at 0 V,

-100
20

V
V
V

3.4

MOorMI
All others

VI; 0.4 V

UNIT
V

0.7

VOL Low-level output voltage

IIH

MIN
2

VOH High-level output voltage

II

SN54LS261

TEST CONDITIONSt

PARAMETER

en
w

V

U

rnA
jJ.A

38

20

w
C

..J

mA

-0.4
-20

:;:

-100

mA

40

mA

lI-

+AII typical values are at Vee; 5 V, TA ; 25°e.
§Not more than one output should be shorted at a time and duration of the output short-circuit should not exceed one second.

switching characteristics, Vee = 5 V, TA
PARAMETER~
tPLH

=25°e

FROM

TO

(INPUT)

(OUTPUT)

e

AnyQ

TEST CONDITIONS

tPHL
tPLH

eL; 15 pF,
Any M input

Any Q

Any B input

AnyQ

RL; 2 kn,

tPHL
tPLH

MIN

See Note 2

tPHL

TYP

MAX UNIT

22

35

ns

20

30

. ns

25

40

ns

22

35

ns

27

42

ns

24

37

ns

~ tpLH ; propagation delay time, low-to-high·level output; tpHL ; propagation delay time, high-to·low-Ievel output.
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-873

TYPES SN54LS261, SN74LS261
2-BIT BY 4-BIT PARALLEL BINARY MULTIPLEXERS
TYPICAL APPLICATION DATA

Multiplication of the numbers 26 (multiplicand) by 29 (multiplier) in decimal. binary. and 2-bit-at-a-time-binary is
shown here:
DECIMAL

" 2-BIT-AT-A-TIME BINARY

BINARY

Sign
Bit

Sign
Bit
B
M

•

26
29
234

•

011010
011101
011010
000000
011010
Partial
}
6
011010
Products
011010
000000
01011110010

R
754

011010
(+2) (-1) (+1)
00000011010
}. Partial
3
111100110
0110100
Products
,~011 ~ 10010,
Sign Product
Bit

,'----y-=--J

Sign Product
Bit

II

Two points should be noted in the two-bit-at-a-time-binary example above. First. in positioning the partial products
beneath each other for final addition. each partial product is shifted two places to the left of the partial products above
it instead of one place as is done in regular multiplication. Second. the msb of the partial product (the sign bit) is
extended to the sign-bit column of the final answer.
A substantial reduction of mUltiplication time. cost. and power is obtained by implementing a parallel
partial-product-generation scheme using a 2-bit-at-a-time algorithm. followed by a Wallace Tree summation.
Partial-product-generation rules of the algorithm are:
1. Examine two bits of multiplier M plus the next lower bit. For the first partial product (PP1) the next lower bit is
zero.
2 15 2 14 , 2 13 21 2 211 I 2'0 I 29 28 2 7 , 2 6 ,25 24 2 3 , 22 , 2'

I
PP8

3-874

'I'
PP7

f
PP6

'1

I

I

PP5

PP4

'IPP3

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

I

I
PP2

20

'I"
PPl

0

I

TYPES SN54LS261, SN74LS261
2-BIT BY 4-BIT PARALLEL BINARY MULTIPLEXERS
TYPICAL APPLfcATION DATA
2. Generate partial product (PPi) as shown in the following table:

MULTIPLIER BITS FROM

OPERATOR

STEP 1

TO OBTAIN PARTIAL PRODUCT

SYMBOL

221-1

221-2

2 21 - 3

0

0

0

0

0

0

1

+1 B

0

1

0

+1 B

Copy multiplicand

0

1

1

+2 B

Shift multiplicand left one bit

1

0

0

-2B

Shift two's complement of multiplicand left one bit

1

0

1

-1 B

Replace multiplicand by two's complement

1

1

0

-lB

Replace multiplicand by two's complement

1

1

1

0

Replace multiplicand by zero
Copy multiplicand

Replace multiplicand by zero

3. Weight the partial products by indexing each two places left relative to the next·less·significant product.
4. Extend the most·significant bit of the partial product to the sign·bit place value of the final product.
EXAMPLE OF ALGORITHM
M

29

011101

y'+Tala
110
011

Operator
Symbol
+1 B
-lB
+2 B

B=26=011010
00000011010
111100110
0110100

en
w

(J

:>w

The summation of these partial products was shown in the 2·bit·at·a·time binary mUltiplication example above.
The 'LS261 generates partial products according to this algorithm with two exceptions:

C

1. The one's complement is generated for the cases requiring the two's complement. The two's complement can be
obtained by adding one to the one's complement; this rounding can be done by using one NAND gate and one AND
gate as shown in Figure B.

-I

tt-

2. The most·significant bit is complemented to reduce the hardware required to extend the sign bit. This extension can
be accomplished by adding a hard·wired logic 1 in bit position 22i +15 of each partial product and also in bit
position 2 16 of the first partial product (PP1).

TEXAS .

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-875

S3011\30 1.1.1

w

00
-...J

en

2 13

215

29

211

28

2 10

212

214

•

27
26

25

23

N-I

1-<

o

21

~"
m

~

20

22

24

-1

aJ(/)

M21

M2
LATCH
CONTROL

,.. G

M1

'LS261

M1 f -

'LS261

G

z

217

216

O~EN
.,15
216

,10

.,13
214

212

211

OJEN

M1

."
~
:t>....t.
%1-

>-

:t>(/)

MO I--ROUN DING
BIT

04030201 00

;c~

. ~
~

Z....t.

.,0

:t>

V-~--------------------------------~/

:5:
c:::

26

22
23

25

27

2 13

215
214

211

~~

29
2 10

212

23

25

27
26

28

24

%I

-<

21

r~
"'C
r-

~

o

21
22

20

m

R-

%I

(/)

M22i-1
M22i-2
M22i-3

I
LATCH
CONTROL

4

B4 B3 B2 B1 BO

B4 B3 B2 B1 BO

B4 B3 B2 B1 BO

B4 B3 B2 B1 BO

M2

M2

M2

M2

G

'LS261

M1

-

MO

-

04030201 00

"1"

I

I

I

I

I
I

G

'LS261

M1

-

MO

-

0'4030201 00
OJEN

I

I

I

II

'LS261

G

M1 i MO

T TI

'LS261

-

04030201 00
OJEI\:

G

I

1

22i+15 ' 22i+14

M2 2i-3

M22i-1
M22i-2

M1

-

MO

-

I

0403 020100

O~ENIII
ROUNDIN(
BIT
22i-2

22i-2

\---------------------------------------~V~-------------------------------------J
19 INPUTS TO WALLACE TREE
FIGURE B - OTHER PARTIAL PRODUCTS, PPi

.......

m~

-0)

FIGURE A - FIRST PARTIAL PRODUCT, PP1

~~

r

tD~

,l

I

20 INPUTS TO WALLACE TREE

~

rZ

rr

O~EN

I

. ,8
29

\

'LS261

,....G

04030201 00

I

len

aJ~
_r
-f(/)

M2

r--

MO t -

MO f - 04030201 00

04030201 00

,,
"

M1

'LS261

G

~Z

-4-

B4 B3 B2 B1 BO

M2

M2

-

MO I---

"1"

B4 B3 B2 B1 BO

B4 B3 B2 B1 BO

B4 B3 B2 B1 BO

-<(/)

M2 0

20

PP1

~o

PP2

24

28

I

I

~

~

\

26

- - - ROUNDING BITS

~
PP8

z

22

PP7

PP6

PP5

PP4

PP3

PP1

214

~

~~,
~~::

~

I

OJ

=i
OJ

-<

~~

-'='"
I
OJ

=i
PRODUCT
FIGURE C-MANIPULATION OF PARTIAL PRODUCTS FOR ENTRY INTO WALLACE TREE

In general, the 4 x 2 bit 'LS261 can be expanded for use in 4m x 2n bit multipliers. Partial-product generation uses
m x n 'LS261s m x n -;- 16 'LSOOs, and m x n -;- 16 'LS08s. The size of the Wallace tree and ALU requirements vary
depending on the size of the problem. The count for the 16 x 16 bit multiplier is:
32
2
2
56
7
2

00
-..J

TTL DEVICES

"

l>

:c

~~

r"
mm

ren
OJ

en

-Z
Zen
l>-,=,"

~~

~~
c:::
...&.
r..... en

SN54LS261/SN74LS261
SN54LSOO/SN74LSOO
SN54LS08/SN74LS08
SN54LS183/SN74LS183
SN54LS181/SN74LS181
SN54S182/SN74S182

w
-..J

PP2

-Z

"-....
r-,=,"

mr
Xen

II

m~
:cO')
en ...&.

TYPES SN54265, SN74265
QUADRUPLE COMPLEMENTARY-OUTPUT ELEMENTS
REVISED DECEMBER 1983

FOR SYMMETRICAL GENERATION OF COMPLEMENTARY TTL SIGNALS
•

SN54265 ... J OR W PACKAGE
SN74265 ... J OR N PACKAGE

Switching Time Skew of the Complementary
Outputs Is Typically 0.5 ns ... Guaranteed
to be No More than 3 ns at Rated Loading

•

Full Fan-Out to 20 High-Level and 10
Low-Level 54/74 Loads

•

Active Pull-Down Provides Square
Transfer Characteristic

(TOPVIEWI

1A
1W
1Y

VCC

4A
4W
4Y
38
3A
3W
3Y

description
The SN54265 and SN74265 circuits feature complementary outputs from each logic element, which have
virtually symmetrical switching time delays from the
triggering input. They are designed specifically for use
in applications such as:

II

•

Symmetrical clock/clock generators

•

Complementary input circuit for decoders and
code converters

•

Switch debouncing

•

Differential line driver

NC - No internal connection

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

6k.l1

Examples of these four functions are illustrated in the
typical application data.
The SN54265 is characterized for operation over the
full military temperature range of -55°C to 125°C;
the SN74265 is characterized for operation.from O°C
to 70°C.

-I
-I

r-

C

m

<

n

logic diagrams

m

ELEMENTS 1 and 4

en

TYPICAL OF ALL OUTPUTS
VCC

positive logic
Y=A

W=A
OUTPUT

ELEMENTS 2 and 3

A~Y

B~W
positive logic
Y = As or Y = A + B
W = AB or W = Ii. + B

PRODUCTION DATA

3-878

This document contains information current as
of publication date. Products conform to these
specifications per the terms of Texas Instruments

~~~n~:::S~~il~r;liu~~Ot~~~:~~nof~~f:~~~nJe~~::'

TEXAS

.Jtj}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TY~ES SN54265, SN74265
QUADRUPLE COMPLEMENTARY-OUTPUT ELEMENTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage ............................................................................. 5.5 V
Operating free-air temperature range: SN54265 ......................................... - 55°C to 125°C
SN74265 ............................................. oOe to 70°C
Storage temperature range .......................................................... - 65°C to 150°C
NOTE 1. Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54265
MIN
Supply voltage, Vee

4.5

NOM

SN74265
MAX

MIN

NOM

5.5

4.75

5

5

High-level output current, 10H

-800

Low·level output current, 10L

16

Operating free-air temperature, T A

-55

125

0

MAX

UNIT

5.25

V

-800

J.lA

16

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONSt

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Vee= MIN,

VOH

High·level output voltage

Vee= MIN,

10H = -800 I-IA

VOL

Low·level output voltage

Vee= MIN,

10L = 16mA

II

Input current at maximum input voltage

Vee= MAX,

VI = 5.5V

MIN

TVP+

MAX

2

V

II = -12 mA
2.4

UNIT

0.8

V

-1.5

V
V'

3.4
0.2

0.4
1

V
mA

IIH

High-level input current

Vee = MAX,

VI = 2.4 V

40

J.lA

IlL

Low-level input current

Vee= MAX,

VI = 0.4 V

-1.6

mA

lOS

Short-circuit output current§

Vee= MAX,

ICC

Supply current

Vee = MAX,

·1 SN54265

I SN74265

-20

-57

-18

See Note 2

-57
25

34

mA
mA

FROM

TO
(OUTPUT)

tPLH(W)

AorB

W

tpHLlV)

(as applicable)

V

tPHL(W)

A orB

W

tPLH(V)

(as applicable)

V

tpLH(W)-tPHL(V)

A orB

Wwith

tPHL(W)-tpLH(V)

(as applicable)

respect to V

TEST CONDITIONS

RL=400n,
eL=15pF,
See Note 3

MIN

U

C

..........J

= 5 V, TA = 25°e
(INPUT)

PARAMETER~

en
w

>
w

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time.
NOTE 2: lee is measured with all outputs open and all inputs grounded.

switching characteristics, Vee

II

TVP

MAX

11.6

18

11.3

18

9.8

18

10.2

18

+0.3

±3

-0.4

±3

UNIT
ns
ns
ns

tpLH == Propagation delay time, low·to-high-Ievel output.
tpH L == Propagation delay time, high-to-Iow-Ievel output.
tpXX(W)-tpXX(Y) == Difference in indicated propagation delay times at the Wand Y outputs, respectively.
NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAs

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-879

TYPES'SN54265, SN74265
QUADRUPLE COMPLEMENTARY-OUTPUT ELEMENTS
TYPICAL CHARACTERISTICSt

PROPAGATION DELAY TIME DIFFERENCE
vs
SUPPLY VOLTAGE

PROPAGATION DELAY TIME DIFFERENCE
vs
FREE-AIR TEMPERATURE
2

5
c:
'"
I
CI)

u

c:
~

~

VCC = 5 V
4 r- RL = 400 n
3 r-CL = 15 pF

\..~

............

E

i=

>co

Qi

0

c:

~Y'. 'I.~

,

CI)

0
-1

~

~

I

~

Ci

~

i=

ttp;;JI.(Wj............ ~

>
co

~

......tp

c:

0
-0.5 r--tPHL(W) tPLH(Y)

-2

co
co

-3

co

-4

~ -1.5

CI
Co

e

c...

tPLH(W)-tPHL(Y)

E

0

'':;

--- -...............

0.5

CI)

............

... V

. .v

c:
CI)

u

2

C

CI)

TA = 25°C
= 400 n
CL = 15 pF

'"T 1.5 RL

l./-t('y')':::.

o

.~

-1

CI

Co

-2

-5
-75 -50 -25

0

25

50

75

4.5

100 125

4.75

TA-Free-Air Temperature-OC
FIGURE 1

II

5

5.25

5.5

VCC-Supply Voltage-V
FIGURE 2

PROPAGATION DELAY TIME DIFFERENCE vs LOAD CAPACITANCE

-I
-I
rC

2

2

'"T
~

m

~ --.....

c:

~

S

~

o

~

m

en

0.5

E

~
>=

VCC = 5 V
'"
T 1.5 TA = 25°C
2lc:

VCC = 5 V
1.5 TA = 25°C

0

~

~n

£

Ci
Q)

..............

-.... --..!!...l. -

--

~

c...

i

~ -1

r--

-

I.

'3:

::J

:5-1.5

:J:

e-

a-

0

.......,

-1

...... ......--~

.......--

RL

-1.5

4kn

I

I

30

35

-2

-2
15

R L '" 400 ::.--

E V
:5c... -0.5

r:..!..0OQ

~-0.5

0.5

E

20

25

30

35

40

45

50

15

20

25

40

CL -Load Capacitance-pF

CL -Load Capacitance-pF

FIGURE 3

FIGURE 4

45

50

tOats for temperatures below DOC and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable for SN54265 only.

'. 2,.{\~·'::. " JiI
3-880

TEXAS V

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54265, SN74265
QUADRUPLE COMPLEMENTARY-OUTPUT ELEMENTS
TYPICAL APPLICATION DATA

r--------- CLOCK
1/4 SN74265

N-

CLOCK

CLOCK

CLOCK

-G-E-N-E-RA-T-O-R--viJ~---- CLOCK

~~-----CLOCK

GENERATOR

FIGURE A - TYPICAL CLOCK/a:ocR GENERATOR CIRCUIT

FIGURE B - SKEWLESS CLOCK/CU5CK GENERATOR CIRCUIT

o

0
INPUT A

II

2

en

INPUT B

w
U

!---INPUT
-

INPUTB , - - - -

-

---t

t--

-

-

-- - - - H
L

DECODEB SKEW

"';""-1-

2

INPUT71-- -

-

------:

C

INPUT~-

-

----- -

--:

....
....

~SYMMETRICAL DECODE

H

-

":::B-----'""I - - - I

_H

INPUT{ _,,_ _ _ _ _,
GATE

-

2

-------H

B

U_________

FIGURE C - TYPICAL DECODER/CODE CONVERTER

H
L

-

-

-

-

-

-:

r ~---------L

L
. - DECODER SPIKE

OUTPUT 2

-

...J

-- - - - :

-'--'--------~,
INPUT.{~
_: _ _ _ _ _ _ _ L
~H

>
w

!--INPUT

INPUTA , - - - .
_

NO DECODE SPIKE

-------z-------------__

OUTPUT 2
_____ -

-

-- -

H

-- __ L

FIGURE D - SYMMETRICAL DECODER/CODE CONVERTER

TEXAs .,.
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-881

TYPES SN54265, SN74265
QUADRUPLE COMPLEMENTARY-OUTPUT ELEMENTS
TYPICAL APPLICATION DATA.
390 n
1/4 SN74265
1----41>---- W

b------y

5V

5V

-----oV

~

W OUTPUT

~------VOH

W OUTPUT

____---J

n nI
_/UU

---VOL
-

-

-

-VOH

YOUTPUT

----'VOH

\

- - - - VOL
----VOH

Y OUTPUT
L..----·VOL

'-------VOL
WITH FEEDBACK TO
STABILIZE INPUT

WITHOUT FEEDBACK

-------_

FIGURE E - SWITCH DEBOUNCER

~
~

rC

m

<

(")

m

en
Noise immunity typically 3 V
for either high level or low level data

FIGURE F - DIFFERENTIAL LINE DRIVER

3-882

. TEXAS"

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS, TeXAS 76265

TYPES SN54LS266, SN74LS266
QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES
WITH OPEN-COLLECTORS OUTPUTS
DECEMBER 1972-REVISED DECEMBER 1983

• Can Be Used as a 4-Bit Digital Comparator

SN54LS266 ... J OR W PACKAGE
SN74LS266 ... D. J OR N PACKAGE

• Input Clamping Diodes Simplify System
Design

ITOPVIEWI

FUNCTION TABLE
INPUTS OUTPUT

~

H

Y

H

L

L

L

H

L

H

L

L

H

H

= high

= low

2Y

4B
4A
4Y

2A
2B
GND

3B
3A

3Y

SN54LS266 ... FK PACKAGE
SN74LS266 ... FN PACKAGE

H

level. L

VCC

1A
1B
1Y

• Fully Compatible with Most TTL Circuits

level

(TOPVIEWI
U

description

m..,.

The 'lS266 is comprised of four independent 2-input
exclusive-NOR gates with open-collector outputs. The
open-collector outputs permit tying outputs together for
multiple-bit comparisons.

3

2

1 20 19

4A

NC

4
5

2Y

6

4Y

NC

7
8

3Y

1Y

logic symbol (each gate)

NC
NC
9 10 111213

mou
w

schematic of inputs and outputs

C
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

..oJ

~
~

- - - . . - - - - - VCC
OUTPUT
INPUT -....,.__.....- _ -

PRODUCTION DATA

This document contains informatiDn current as
Df ~ublicatiDn date. PrDducts cDnfDrm to
speclficatiDns per the terms Df Texas Instruments

~~~nnd:;:s:'a~il~ar~liu~~Ot~~~n~nDf~~f~~~~"Je~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-883

TYPES SN54LS266, SN74LS266
QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES
WITH OPEN-COLLECTOR OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free·air temperature range: SN54LS266
SN74LS266
Storage temperature range

7V
7V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS266
MIN
4.5

Supply voltage, Vee

NOM

SN74LS266

MAX

MIN

5.5

4.75

5

High-level output voltage, VOH
-55

5

MAX
5.25

UNIT
V
V

5.5

5.5

4

8

mA

70

"e

Low·level output current, IOL
Operating free·air temperature, T A

NOM

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

B
~
~

r-

C
m

=:s

(")

m

VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

IOH

High·level output current

VOL

Low-level output voltage

SN54LS266

TEST eONDITIONSt

PARAMETER

MIN

Typ:l:

SN74LS266

MAX

II - -18mA

Vee = MIN,

VIH=2V,

VIL ~ VIL max, VOH = 5.5 V
Vce= MIN,
VIH=2V,

IIOL =4

m~

TYP~:

MAX

0.25

UNIT
V

2

2
Vee - MIN,

MIN

0.7

0.8

V

-1.5

-1.5

V

100

10a

0.4

0.25

004

0.35

0.5

IlA

V·

VIL = VIL max IIOL = 8 mA
II

Input current at maximum input voltage

Vee = MAX,

VI = 7V

0.2

0.2

IIH

High·level input current

Vee - MAX,

VI-2.7V

40

40

IlA

IlL

Low·level input current

Vee - MAX,

VI-OAV

-0.8

-0.8

mA

Ice

Supply current

VCC -.MAX,

See Note 2

13

mA

8

13

8

mA

'For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
:I:AII typical values are at V CC 5 V, T A ~ 25" C.
NOTE 2: ICC is measured with one input of each gate at 4.5 V, the other inputs grounded, and the outputs open.

(/)

switching characteristics, Vee
PARAMETER"
tpLH

= 5 V, TA =25°e
FROM

TEST CONDITIONS

(INPUT)
Aor B

Other input low

tPHL
tPLH

A or B

Other;nput high

tPHL
~ tpLH
tpH L

propagation delay time. low·to·high·level output
propagation delay time. high·to·low·level output

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-884

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 76266

CL=15pF,

MIN

TYP

MAX

18

30

RL = 2 kn,

18

30

See Note 3

18

30

18

30

UNIT
ns
ns

TYPES SN54S268, SN74S268
HEX D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
DECEMBER 1983

•

6 Latches in· a Single Package

SN54S268 ... J PACKAGE
SN74S268 ... D. J OR N PACKAGE

• 3-State Bus-Driving True Outputs
•

Full Parallel Access for Loading

•

Buffered Control Inputs

•

PNP Inputs Reduce D-C Loading
on Data Lines

•

HEX Version of '5373

(TOP VIEW)

DC
10
1D
2D
20
3D
30
GND

description
These 6-bit latches feature three-state outputs designed
specifically for driving highly capacitive or relatively lowimpedance loads. They are particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The six latches of the 'S268 are transparent D-type
latches. While the enable (C) is high the 0 outputs will
follow the data (D) inputs. When the enable is taken
low, the 0 outputs will be latched at the levels that were
set up at the D inputs.
Schmitt-trigger buffered inputs at the enable/clock
lines simplify system design as ac and dc noise rejection
is improved by typically 400 mV due to the input
hysteresis. A buffered output control input can be used
to place the eight outputs in either a normal logic state
(high or low logic levels) or a high-impedance state. In
the high-impedance state the outputs neither load nor
drive the bus lines significantly.

Vee
60
6~

5D
50
4D
40
e

SN54S268 ... FK PACKAGE
SN74S268 ... FN PACKAGE
(TOP VIEW)

1D
2D
NC

4
5

6

3D

dOUUd

MZZ

'
W
C
..oJ

lI-

FUNCTION TABLE (EACH LATCH)
OUTPUT

INPUTS
OC

ENABLE C

0

Q

L

H

H

H

L

H

L

L

L

L

X

00

H

X

X

Z

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~nnd::~s':a~i{var~liu~~Ot~~~f~~nor~~f~~~~~e~~;s~

TEXASrf~

INSTRUrvi ENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-885

TYPES SN54S268, SN74S268
HEX 0-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
logic symbol

schematics of inputs and outputs
. EQUIVALENT OF EACH INPUT

10

20
3D

vcc----_-

40
50

2.8 kn

60

NOM

Pin numbers shown on logic notation are for 0, J or N packages.

INPUT ............- I

logic diagram (positive logic)

OC--'---~

C
10-..:.:.:....---+-~

TYPICAL OF ALL OUTPUTS

- - - - -....-vcc

II

50

n

NOM

-I
-I
rC
m

OUTPUT

:$
(")
m
o

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) , ... '.' ......................................................... 7 V
Input voltage ........................................................................... " 5.5 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54S268 ........................................ - 55°C to 125°C
.
SN74S268 ............................................ oOe to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.

3-886

: TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54S268, SN74S268
HEX D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
recommended operating conditions
SN54S268

SN74S268

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

IOH

High-level output current

-2

-6.5

mA

20

mA

IOL

Low-level output current

tw

Pulse duration, enable e

tsu

Setup time, data before enable e

th

Hold time, data after enable e

TA

Operating free-air temperature

V
V

2

2

20

V

I High

6

6

ns

I Low

7.3

7.3

ns

0

0

ns

10

10

~

~

-55

125

ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
MIN

TEST CONDITIONST

PARAMETER
VIK

I SN54S'
1 SN74S'

TYPt

MAX
-1.2

II = -18 mA

Vee = MIN,

2.4

3.4

2.4

3.1

UNIT
V
V

Vee = MIN,

VIH = 2 V,

VIL = 0.8 V,

IOH = MAX

VOL

Vee= MIN,

VIH = 2 V,

VIL = 0.8 V,

IOL =20 mA

0.5

V

IOZH

Vee = MAX,

VIH=2V,

VO=2.4V

50

J.lA

IOZL

Vee = MAX,

VIH = 2 V,

Vo = 0.5 V

-50

J.lA

II

Vee = MAX,

VI = 5.5 V

1

mA

VOH

IIH

Vee = MAX,

VI = 2.7 V

50

J.lA

IlL

Vee = MAX,

VI = 0.5 V

- 0.25

mA

IOS§

Vee = MAX

-100

mA

-40

I Outputs high

IOutputs low

Vee = MAX

lee

54

I Outputs disabled

II

94

67

119

81

136

mA

en
w

(J

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
0

i All typical values are at V CC = 5 V, T A =25 C.

>

§ Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second.

switching characteristics, Vee
PARAMETER
tpLH
tpHL
tPLH

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

D

Any Q

e

Any Q

tPHL
tpZH
tpZL
tPHZ
tPLZ

oe

6C

W

C
..J

TEST CONDITIONS

n,

RL = 280

eL=15pF

See Note 2

Any Q
Any Q

RL = 280

n,

eL = 5 pF

See Note 2

'S268
MIN

TYP

MAX

7

12

7

12

7

14

12

18

8

15

11

18

6

9

8

12

UNIT

lI-

ns
ns

ns
ns

NOTE: 2. See General Information Section for load circuits and voltage waveforms.

TEXASr~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-887

TYPES SN54273, SN54LS273, SN74273, SN74LS273
OCTAL 0-TYPE FLIP-FLOP WITH CLEAR
OCTOBER 1976 - REVISED DECEMBER 1983

SN54273, SN54LS273 ... J PACKAGE
SN74273 ... J OR N PACKAGE
SN74LS273 ... DW, J OR N PACKAGE

•

Contains Eight Flip-Flops with
Single-Rail Outputs

•

Buffered Clock and Direct Clear Inputs

•

Individual Data Input to Each Flip-Flop

•

Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators

(TOPVIEWI

CLR
10
10
20
20
30
3D
40
40

VCC
80
80
70
70
60
6D
50
50

GNO

q..K

description
These monolithic, positive·edge-triggered flip·flops
utilize TTL circuitry to implement D·type flip·flop
logic with a direct clear input.

--I
--I
rC

Information at the D inputs meeting the setup time
requirements is transferred· to the 0 outputs on the
positive·going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and is
not directly related to the transition time of the
positive-going pulse. When the clock input is at either
the high or low level, the D input signal has no effect
at the output:

3

2

1 2019

80
70
70
60
60

5
6

m

FUNCTION TABLE

(")

INPUTS

3D
40

'--OUTPUT

,

w

U

~"

>
w
C

th

...J

lIlogic diagram
10

20

(3)

3D

(4)

1Q

40

(7)

2Q

50
(S)

3Q

60

(13)

4Q

70

(14)

5Q

SO
(IS)

(17)

6Q

7Q

SQ

Pin numbers shown on logic notation are for DW, J or N packages.

..Jl!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 22&012 • DALLAS, TEXAS 75265

3-889

TYPES SN54273, SN74273
OCTAL D-TYpE FLIP-FLOP WITH CLEAR
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
..... 7 V

Supply voltage, Vee (see Note 1) . . . . . .
Input voltage . . . . . . . . . . . . .
Operating free·air temperature range: SN54273
SN74273
Storage temperature range

. . . . 5.5 V
-55°C to 125°C
aOe to 7aoe
-65°C to 15aoe

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54273

Supply voltage, VCC

SN74273

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-800

IJ.A

High·level output current, 10H

-800

Low-level output current, 10L

16

Clock frequency, fclock

0

Width of clock or clear pulse, tw

L Data input

Set-up time, tsu

J

Clear inactive state

Data hold time, th

30

0

16.5

16.5

20t

20t

25t

25t

5t

Operating free-air temperature, T A

UNIT

MIN

16

mA

30

MHz
ns
ns
ns

5f

-55

125

0

°c

70

tThe arrow indicates that the rising edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST eONDITIONSt

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

I nput clamp voltage

C

<

C')

m

en

Vce = MIN,

II = -12 mA

VCC = MIN,

VIH = 2 V,

2.4

VIL = 0.8 V, 10H = -8001J.A
Vec = MIN,

VOL Low·level output voltage

m

TYPf

MAX

UNIT
V

2

VOH High-level output voltage

-4
-4
r

MIN

0.8

V

-1.5

V
V

3.4

VIH = 2 V,

0.4

V

VIL = 0.8 V, 10L = 16 mA

II

Input current at maximum input voltage

IIH

High-level input current

1

VCC = MAX, VI = 5.5 V
Clear
Clock or D
Clear

80
Vce = MAX, VI = 2.4 V

-3.2

IlL

Low-level input current

lOS

Short-circuit output current §

Vec = MAX

ICC

Supply current

Vec = MAX, See Note 2

Clock or D

40

Vce = MAX, VI = 0.4 V

-1.6
-18
62

mA
IJ.A
mA

-57

mA

94

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
fAil typical values are at Vee = 5 V, T A = 25°e.
§Not more than one output should be shorted at a time.
NOTE 2: With all outputs open and 4.5 V applied to all data and clear inputs, lee is measured after a momentary ground, then 4.5 V, is
applied to clock.

switching characteristics, Vee

= 5 V, T A =

25°e

PARAMETER

TEST CONDITIONS

'fmax Maximum clock frequency

CL=15pF,

tpHL Propagation delay time, high-to-Iow-Ievel output from clear

RL=400n,

tpLH Propagation delay time, low-to-high-Ievel .output from clock

See Note 3

tPHL Propagation delay time, high-to-Iow-Ievel output from clock
NOTE 3: See General Information Section for load circuits and voltage waveforms

3-890

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

MIN

TYP

30

40

MAX

UNIT
MHz

18

27

ns

17

27

ns

18

27

ns

TYPES SN54LS273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free·air temperature range: SN54LS273
SN74LS273
Storage temperature range

. .... 7 V
..... 7 V

-55°C to 125°C
oOe to 70°C
-65°eto 150°C

NOTE 1: Voltage values are with respect to network ground terminal

recommended operating conditions
SN74lS273

SN54lS273
NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-400

jJA

Supply voltage, VCC
High-level output current, 10H

-400

Low-level output current, 10l

4

Clock frequency, fclock

30

0

Width of clock or clear pulse, tw

I

Set·up time, tsu

J

UNIT

MIN

0

20

20

Data input

20t

20t

Clear inactive state

25t

25t

Data hold time, th

5t

Operating free-air temperature, T A

8

rnA

30

MHz
ns
ns

5t

-55

125

ns

0

70

°c

tThe arrow indicates that the rising edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

SN54LS273

TEST CONDITIONSt

MIN TVP+

SN74lS273

MAX MIN TVP+

2

High·level output voltage

Vee; MIN,

11;-18mA

Vee - MIN,

VIH;2V,

Vil ; Vilmax,

10H; -400 jJA

Vee - MIN,

VIH ; 2 V,POL - 4 rnA

VOL

Low·level output voltage

II

Input current at maximum input voltage

IIH

High·level input current

Vee MAX,

VI; 2.7 V

IlL

Low-level input current

Vee; MAX,

VI

lOS

Short-circuit output current §

Vee; MAX

ICC

Supply current

Vee - MAX,

j

VIL; Vilmax
Vee; MAX,

2.5

0.7

0.8

V

-1.5

-1.5

V

3.4

2.7

3.4
0.25

0.4

IOL;8mA

0.35

VI; 7 V

0.1

= -0.4 V
17

0.5

w

u

:>w

V

C

rnA

.J

jJA

20

20

-0.4

-0.4

rnA·

-100

rnA

27

rnA

17

27

II
en

V
0.4
0.1

-100 -20

-20

UNIT
V

2

0.25

See Note 2

MAX

lI-

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee; 5 V, T A; 25°e.
§ Not more than one output should be shorted at a time and duration of short circuit should not exceed one second.
NOTE 2: With all outputs open and 4.5 V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5 V is
applied to clock.

switching characteristics Vee

= 5 V , TA = 25°e

PARAMETER

TEST CONDITIONS

MIN

TVP

30

40

MAX

UNIT

f max

Maximum clock frequency

tpHL

Propagation delay time, high·to·low-Ievel output from clear

el;15pF,

18

27

ns

tplH

Propagation delay time, low·to·high·level output from clock

RL; 2 kn,

17

27

ns

tpHL

Propagation delay time, high·to·low·level output from clock

See Note 4

18

27

ns

MHz

NOTE 4: See General Information Section for load circuits and voltage waveforms.

TExAs

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-891

TYPES SN54276, SN74276
QUADRUPLE J-K FLIP-FLOPS
OCTOBER 1976-REVISED DECEMBER 1983

features
•

Four J-j{ Flip-Flops in a Single Package ...
Can Reduce FF Package Count by 50%

•

Separate Negative-Edge-Triggered Clocks with
Hysteresis ... Typica"y 200 mV

•

Typical Clock Input Frequency ... 50 MHz

•

Fu"y Buffered Outputs

SN54276 ... J PACKAGE
SN74276 ... J OR N PACKAGE
(TOP VIEW)

CLR
1J
1CLK
1K
10
20
2K
2CLK
2J
GND

description
These quadruple TTL J-j{ flip-flops incorporate a
number of third-generation IC features that can'
simplify system design and reduce flip-flop package
count by up to 50%. They feature hysteresis at each
clock input, fully buffered outputs, and direct clear,
capability, and are presettable through a buffer that
also features an input hysteresis loop. The negativeedge-triggering clocks are directly compatible with
earlier Series 54/74 single and dual pulse-triggered
flip-flops. These circuits can be used to emulate
D- or T-type flip-flops by hard-wiring the inputs, or
to implement asychronous sequential functions_
The SN54276 is characterized for operation over the
full military: temperature range of -55°C to 125°C;
the SN74726 is characterized for operation from O°C
to 70°C.

logic symbol t

lJ
lCLK

Ii<

-4
-4
rC
m

S
(")
m

en

t

INPUTS

(11)

...

(11

.....

(21

OUTPUT

2CLK

ClR

ClK

J

K

a

L

H

X

X

X

H

H

L

X

X

X

3CLK

2i<
3J

L

L

X

X

X

L
Ht

H

H

j.

L

H

00

3K

H

H

j.

H

H

H

4J

H

H

j.

L

L

L

H

H

j.

H

L

TOGGLE

H

H

H

X

X

00

This'configuration is nonstable; that is, it may not
persist when preset and clear return to their inactive

(41

.......
,..;..

4CLK

4K

(81

r-.

IT

(71

......

lK

(61

(151

(131

r-.

(141

.......
(161

(191
(181

......

(171

....

t Pin numbers shown on logic symbol are
for J and N packages only.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

10

Cl

(121

PRODUCTION DATA

~~~~d:::S:!~[I~ar;:iu~~Ot~~~:~~nor~~f:~~~n~e~~~s~

(51

lJ
(31

(highl level.

3-892

~

2J

PRE

This document contains information current as
of publication' date. Products conform to
specifications per the terms of Texas Instruments

ilS

(91

FUNCTION TABLE (EACH FLIP-FLOP)
COMMON INPUTS

VCC
4J
4CLK
4K
40
30
3K
3CLK
3J
PRE

20

30

40

TYPES SN54276, SN74276
QUADRUPLE J-K FLIP-FLOPS

schematics of inputs and outputs

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT

----------~~-vcc

VCC-------4~----

INPUT

Q

CLR, J, K: Req; 4 kS1 NOM
elK: Req; 10.2 kS1 NOM
PRE: R eq ;11.6KS1NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage .............................. '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54276 _ . _ . _ . __ ............ __ ._ .. _ .. _.. __ .. _ . . . .. - 55 0 e to 1250 e
SN74276 .. _..... _ .. _.... __ ... _ .. _ .. ____ . ___ ... _ .. _ .... ooe to 70 0 e
Storage temperature range .... _........ ~ .............................. _............. -65°eto 150°C

II
en
w

(.)

:>
w
C

NOTE1: Voltage values are with respect to network ground terminal.

..J

tt-

'J'..,,: ~:'."]

Ji.1

TE~+

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-893

TYPES SN54276, SN74276
QUADRUPLE J-K FLIP-FLOPS
recommended operating conditions
SN54276
MIN

NOM

4.5

5

Supply voltage, VCC

SN74276
MAX

MIN

NOM

5.5

4.75

5

-SOO

High-level output current, IOH

35

0

Pulse width, tw

V
J.lA

0

Clock high

13.5

13.5

Clock low

15

15

Preset or clear low

12
3~

12
. 3~

10~

10~

J, K inputs
Setup time, tsu

5.25
-SOO

16

Low-level output current, IOL
Clock frequency

Clear and preset inactive state

16

mA

35

MHz
ns

ns

10~

10~

Input hold time, th

-55

Operating free-air temperature, T A

UNIT

MAX

125

ns

°c

70

0

The arrow indicates that the faliing edge of the clock pulse is used for reference.

~

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

-I
-I

r

C

m

:5

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

II

(J)

TVPt

MAX

UNIT
V

2

VCC ~ MIN,

II

VCC - MIN,

VIH - 2 V,

VIL ~O.S V,

10H

VCC

~

MIN,

~

-12 mA
~

2.4

-SOOJ.lA

VIH ~ 2 V,

O.S

V

-1.5

V

3.4

V

0.2

0.4

V

VIL ~ O.S V,

IOL~16mA

Input current at maximum input voltage

VCC - MAX,

VI

IIH

High-level input current

VCC ~ MAX,

VI

~

2.4 V

40

J.lA

IlL

Low-level input current

VCC - MAX,

VI

~

0.4 V

-1.6

mA

lOS

Short~circuit output current §

VCC

-S5

mA

ICC

Supply current

VCC - MAX

S1

mA

~

~

1

5.5 V

-30

MAX

60

mA

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at Vee ~ 5 V, T A ~ 25°e.
§Not more than one output should be shorted at a time.

n

m

MIN

switching characteristics, Vee

=5 V, TA =25°e

PARAMETER

TEST 'CONDITIONS

f max

Maximum clock frequency

tPLH

Propagation delay time, low-to-high-Ievel output from preset

CL~15pF,

tPHL

Propagation delay time, high-to-Iow-Ievel output from clear

RL

tPLH

Propagation delay time, low-to-high-Ievel output from clock

See Note 2

tPHL

Propagation delay time, high-to-Iow-Ievel output from clock

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-894

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

~

400 fl,

MIN

TVP

35

50

MAx

UNIT'·
MHz

15

25

ns

lS

30

ns

17

30

ns

20

30

ns

TYPES SN54278, SN74278
4-BIT CASCADABLE PRIORITY REGISTERS
MAY 1972-REVISEDAPRIL 1985

o

Latched Data Inputs Serve as Buffer Register
and Can also:
Synchronize Data Acquisition
"Debounce" Mechanical Switch Input

o

Cascadjng Input PO and Output P1
Provides "Busy"Signal Inhibiting All
Lower-Order Bits

o

Full TTL Compatibility

o

Use for:
Priority Interrupt
Synchronous Priority Line Selection

SN54278 ... J OR W PACKAGE
SN74278 ... J OR N PACKAGE
(TOP VIEW)

STRB
D3
D4
PO
P1
Y4
GND

VCC
D2
D1
NC
Y1
Y2
Y3

NC-No internal connection

description
FUNCTION TABLE

The SN54278 and SN74278 each consist of four data
latches, full priority output gating, and a cascading
gate_ The highest-order data applied at a D latch input
is transferred to the appropriate Y output while the
strobe input is high, and when the strobe goes low all
data is latched. The cascading input PO is fully
overriding and on the highest-order package this input
must be held at a low logic level. The P1 output is
intended for connection to the PO input of the next
lower-order package and will provide a "busy"
(high-level) signal to inhibit all subsequent lowerorder packages.

INTERNAL
OUTPUTS
LATCH NODES
01 02 03 04 Ql Q2 Q3 Q4 Vl V2 V3 V4 Pl
H X X X L X X X H L L L H

INPUTS
PO

G

L

H

L
L

H

L
L

H

X

X

H

L

X

X

L

L

H

X

H

H

L

X

L
L

H

H

L

H

L
L

H

L

H

L

L

L

H

H

H

H

L

L

L

L

H

H

L

H

L

L

L

L

H

H

H

H

L L L L L
Same function of Q

L

L

X

X

X

X

Latched when
G goes low

H

After the overriding PO input, the order of priority is
D 1, D2, D3, and D4, respectively, within the package.

H

L

H

X

X

X

X

Internal Q levels are same
function of 0 inputs as on
first 5 lines

nodes as on 1st
5 lines
L L

L

L

H

L

L

L

H

L

(3)

(2)

04

OUTPUT
P1

INPUT
02
(13)

INPUT
01
(12)

OUTPUT

OUTPUT

OUTPUT

OUTPUT

Y4

Y3

Y2

Y1

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments
standard warranty. Production processing does
not necessarily include testing of all parameters.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

en

U

logic diagram
INPUT
03

•
w

H = high level, L = low level, X = irrelevant

INPUT

H

>
w
C

...J

~
~

3-895

TYPES SN54278, SN74278
4-BIT CASCADABLE PRIORITY REGISTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1)
Input voltage . . . . . . . .
Interemitter voltage (see Note 2)
Operating free-air temperature range: SN54278 Circuits
. SN74278 Circuits
Storage temperature range
NOTES:

7V

5.5 V
5.5 V
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

1. Voltage values, except interemitter voltage, are with respect to network ground terminal.

2. This is the voltage batween two emittars of a multiple-emitter transistor. For this circuit, this rating applies between the strobe
input and any of the four data inputs.

recommended operating conditions
SN74278

SN54278

MIN NOM MAX MIN NOM MAX
Supply VOltage, Vee

4.5

5.5

5

High-level output current, IOH

16

(see Figure 1)

Data hold time, th (see Figure 1)

5

-800

Low-level output current, IOL .
Data setup time, tsu

4.75

Operating free-air temperature, T A

V

-SOO

IlA

16

rnA

20

20

ns

5

5

ns

20

20

-

Strobe pulse width, tw (see Figure 1)

UNIT

5.25

-55

125

ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
-I
-I

r-

C

m

~

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

II

Input current at maximum input voltage

IIH

High-level input current

MIN

TYP MAX UNIT
V

2
Vee = MIN,

II = -12mA

Vee= MIN,

VIH = 2 V,

VIL = O.S V,

10H = -SOOIlA

Vee= MIN,

VIH = 2 V,

2.4

PO input

0.2

Short-circuit output current§

lee

Supply current

V
0.4

1 rnA

Vee = MAX,

VI = 2.4 V

200 IlA

80
320

PO input

-3.2
-8 rnA

VI = 0.4 V

Vee = MAX,

I SN54278
Vee = MAX

I SN74278

Vee = MAX,

See Note 3

-12.S

-55

-18
-IS

-57
55

type.
~ All typical values are at Vee = 5 V, TA = 25°C.
§ Not more than one output should be shorted at a time.
NOTE 3: ICC is measured with the PO Input grounded, all other inputs at 4.5 V, and outputs open.

·TExAs

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

rnA

80 rnA

t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions for the applicable

3·896

V

IOL=16mA
VI=5.5V

G input
lOS

V

Vee = MAX,

Any D input
Low-level input current

V

-1.5

VIL = O.S V,

G input
IlL

O.S

3.4

Any D input

("')

m
en

TEST CONDITIONSt

TYPES SN54278, SN74278
4-BIT CASCADABLE PRIORITY REGISTERS
switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER~

tPLH

FROM

TO

(INPUT)

(OUTPUT)

Data

Y

TEST

WAVEFORMS

CONDITIONS

MIN

A and C

30

tpHL

(with strobe high)

39

tpLH

A and D

38

Data

Y

tpHL·

(with strobe high)

31

tPLH

A and E

46

Data

1'1

tPHL
tPLH

Strobe

Any Y

tPHL
tPLH
tPLH

CL=15pF.

(with strobe high'

RL=400n.

Band C

See Figure 1

or Band D

Strobe

P1

Band E

PO

P1

F and G

tpHL

tpHL

== propagation delay
== propagation delay

39
30
31
38
42
23
30

tPHL
~tpLH

TYP MAX UNIT
ns
ns
ns
ns
ns
.ns

time, low·to-high-Ievel output
time, high-to-Iow-Ievel output

schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT

Vee

---4.----

II

INPUT

en
w

u

:>w

Any 0: Req = 2.5 kn NOM
PO: Req = 1 kn NOM
G: Req = 0.6 kn NOM

C

...J

~
~

TEXAs . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-897

TYPES SN54278, SN74278
4-BIT CASCADABLE PRIORITY REGISTERS
PARAMETER MEASUREMENT INFORMATION
TEST
POINT

VCC

n

RL = 400

~ CL = 15 pF

CL includes probe and jig capacitance.
All diodes are 1 N3064.

LOAD CIRCUIT

DATAINPUTD
(WAVEFORM A)

'I

~
~I 1.5V

~.

~

/i:- -

1.5V
' -_ _ _ _ _ _ _...J

I
I--t- th
I-tsu----..I
I

. STROBE INPUT G
(WAVEFORM B)

-

3V
0 V

t---t- th
3V

I

1"------'----_11
t - - - tw~
I
I
~tPLH
I
~tPHL

OV

~I t w - - - - - l . I

NONINVERTING
OUTPUT
(WAVEFORM C)

I

I

,f.5V

f-tPLH!--..l

r-

C

INVERTING
OUTPUT
(WAVEFORM 0)

m

<

n

m

en

OUTPUT Pl
(WAVEFORM E)

~tpHL

I

I

:

If------t-tPLH

I

I

I

~.5V

I
I
I
I
t-tPHL--+l
:
I--tpLH-1
:

~.~~ -

:

----

!...--ltPHL-J

I

-f
-f

:

I ~--------__

/,.5

:
:
V
I
I
-1- - r-tPLH~
I
_tpHL-i

~~~----

Y..5V

I

I
I+--tpLH-l

- - - - -

I

I

~tpHL----l

INPUTPO
-J.t!'.,'----------~-1--------(WAVEFORM F) _______~~ 1.5 V
:'\..5 V
~tPLH~

I

;.-tPHL-+j

Y.

OUTPUT Pl
(WAVEFORM G) _ _ _ _ _ _ _ _ _ _/1.5 V

VOLTAGE WAVEFORMS
NOTE: Input pulses are supplied by a generator having the following
characteristics: tr';; 7 ns, tf';; 7 ns, PRR';; MHz, Zout '" 50n.

FIGURE l-SWITCHING TIMES

3-898

TEXAs ~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

~-.-

-- -

"".5 V

3V
OV

TYPES SN54279, SN54LS279A, SN74279, SN74LS279A
QUADRUPLE g·A LATCHES
REVISED DECEMBER 1983

SN54279, SN54LS279A ..• J OR W PACKAGE
SN74279 ... J OR N PACKAGE
SN74LS279A ... 0, J OR N PACKAGE

• Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs

(TOP VIEW)

• Dependable Texas Instruments Quality
and Reliability

lR
151
182
lQ
2R
28
2Q

description
The '279 offers 4 basic S-R flip-flop latches in one
16-pin, 300-mil package. Under conventional operation, the S-R inputs are normally held high. When the
S input is pulsed low, the Q output will be set high.
When R is pulsed low, the Q output will be reset low.
Normally, the S-R inputs should not be taken low simultaneously. The Q output will be unpredictable in
this condition.

VCC
48
4R
4Q
352
351
3R
3Q

GND

SN54LS279A ... FK PACKAGE
SN74LS279A ... FN PACKAGE
(TOP VIEW)

u

FUNCTION TABLE

1§1e: ~ ~I~

(each latch)

1 2019

INPUTS

OUTPUT

-St,

-R

Q

H

H

00

L

H

H

H

L

L

L

L

H*

4R
4Q

152
lQ

NC

NC

2R
28

352
351
9 1011 1213

doudla:
H = high level

L

=

NZZMM
(!)

low level

a 0 = the level of a before the indicated input conditions were established.
*This configuration is nonstable: that is, it may not persist when the Sand

NC - No internal connection

R

H

=

w

>
W

t For latches with double S inputs:
both S inputs high

L = one or both

en
(.)

inputs return to their inactive (high) level.

S inputs low

C
..J

tt-

logic diagram
(latches 2 and 4)

(latches 1 and 3)

a

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~ea~:s~~rl~ar~llu~~Ot~~~~~~nor~~f~~~~nJe~::s~

a

-1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-899

TYPES SN54279, SN54LS279A, SN74279, SN74LS279A
QUADRUPLE S-R LATCHES
schematics of inputs and outputs
'279 CIRCUITS
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

----..--Vcc
Vcc--"---

INPUT
OUTPUT

'LS279A CIRCUITS
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF ALL INPUTS

- - - - -.......-VCC

VCC--......-

II

Req..

120

n NOM

-I
-I

r-

INPUT
.....-

C

......-OUTPUT

m

<
(")

m

(J)

~ INPUTS - Req =9 kn NOM
S INPUTS· Req = 15 k n NOM

absolute maximum ratings over operatingfree-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) .......................................... ; ..................... 7 V
Input voltage: '279 ..................................................................... '. . .. 5.5 V
, LS279A ..........•......................., .................................... 7 V
Operating free-air temperature range: SN54' TYPES ............................... . . . . .. - 55° C to 125° C
SN74' TYPES ............................... . . . . . . . . .. 0° C to 70° C
Storage temperature range ............................. ; . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65° C to 150° C
NOTE1: Voltage values are with respect to network ground terminal.

3-900

TEXAs •

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54279, SN74279
QUADRUPLE S-R LATCHES
recommended operating conditions
SN54279

SN74279

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

0.8

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

-0.8

-0.8

mA

IOL

Low-level output current

16

16

mA

tw

Pulse duration, low

TA

Operating free-air temperature

70

°e

2

2

V

20

20
-55

125

ns

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54279

TEST CONDITIONS t

PARAMETER

MIN

TYP*

SN74279
MAX

MIN

TYP*

-1.5

VIK

Vee= MIN,

II = -12 mA

VOH

Vee= MIN,

VIL = 0.8 V,

IOH = -0.8 mA

VOL

Vee= MIN,

VIH = 2 V,

IOL = 16 mA

II

Vee= MAX,

VI = 5.5 V

2.4

2.4

3.4
0.2

MAX
-1.5

0.4

3.4
0.2

1

UNIT
V
V

0.4
1

V
mA

IIH

Vee= MAX,

VI = 2.4 V

40

40

/JA

IlL

Vee- MAX,

VI - 0.4 V

-1.6

-1.6

mA

IOS§

Vee = MAX

- 57

mA

30

mA

-18

-55

-18

See Note 2
18
18
Vee = MAX,
30
lee
. .
.. .
. . under recommended operating conditions
t For conditions shown as M IN or MAX, use the appropriate value specified
~ All typical values are at Vee = 5 V, T A = 25° C.
§ Not more than one output should be shorted at a time.
NOTE 2: ICC is measured with all R inputs grounded, all S inputs at 4.5 V, and all outputs open.

switching characteristics, Vee
PARAMETER
tPLH
tPHL
tPHL

en
w

=5 V, TA =25°e (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

S

Q

TEST CONDITIONS

RL = 400 .11,
R

II

eL=15pF

Q

NOTE 3. See General Information Section for load CirCUits and voltage waveforms.

TEXASr~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TYP

MAX

12

22

9

15

15

27

UNIT

(J

ns

W

ns

>

C
..J

lI-

3-901

TYPES SN54LS279A, SN74LS279A
QUADRUPLE S-R LATCHES
recommended operating conditions
SN54LS279A
Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

SN74LS279A

MIN

NOM

MAX

MIN

4.5

5

5.5

4.75

IOL

Low·level output current
Pulse duration, low

TA

Operating free-air temperature

MAX

5

5.25

V

0.7

0.8

-0.4

- 0.4

mA

8

mA

70

°e

4
20

V

ns

20

-55

UNIT
V

2

2

tw

NOM

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54LS279A

TEST CONDITIONSt

MIN

Vee= MIN,

II = - 18 mA

VOH

Vee= MIN,

VIL = MAX,

IOH=-O.4mA

Vee= MIN,

VIH = 2 V,

IOL=4mA

Vee= MIN,

VIH=2V,

IOL = 8 mA

II

Vee= MAX,

VI = 7 V

IIH

Vee= MAX,

VI = 2.7 V

IlL

Vee= MAX,

VI = 0.4 V

IOS§

Vee= MAX

SN74LS279A

MAX

MIN

Tvpi

2.5

3.4
0.25

2.7
0.4

3.4
0.4

0.25

0.5

r-

C
m

switching characteristics, Vee
PARAMETER

<

tpLH
tpHL

n

m

(Jl

tpHL

V

0.1

mA

20

20

J.lA

- 100

- 20

- 0.2

mA

-100

mA

7

mA

= 5 V, T A = 25°e (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

S

Q

R

Q

TEST CONDITIONS

CL=15pF

RL=2k!1,

NOTE 3. See General InformatIon SectIon for load CirCUIts and voltage waveforms.

3-902

V

0.1

See note 2
3.8
7
3.8
Vee= MAX,
ICC
t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25° C.
§ Not more than one output should be shorted at a time, and the duration of the short-c!rcuit should be less than one second.
NOTE 2: lee is measured with all R inputs grounded, all S inputs at 4.5 V, and all outputs open.

-I
-I

UNIT

V

0.25

- 0.2
- 20

MAX
-1.5

-1.5

VIK

VOL

Tvpi

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TVP

MAX

12

22

13

21

15

27

UNIT
ns
ns

TYPES SN54LS280, SN54S280, SN74LS280, SN74S280
9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS
DECEMBER 1972-REVISED DECEMBER 1983

SN54LS280, SN54S280 ... J OR W PACKAGE
SN74LS280, SN74S280 ... 0, J OR N PACKAGE

• Generates Either Odd or Even Parity
for Nine Data Lines

(TOP VIEW)

• Cascadable for n-Bits
• Can Be Used to Upgrade Existing
Systems using MSI Parity Circuits

G

VCC

H

F

NC

• Typical Data-to-Output Delay of Only 14 ns
for 'S280 and 33 ns for 'LS280

E
D
C

l:EVEN

• Typical Power Dissipation:
'LS280 ... 80 mW
'5280 . : . 335 mW

:WDD

8

GND

A

SN54LS280, SN54S280 ... FK PACKAGE
SN74LS280, SN74S280 ... FN PACKAGE
(TOP VIEW)

FUNCTION TABLE
NUMBER OF INPUTS A

OUTPUTS

U

THRU I THAT ARE HIGH

1: EVEN

0,2,4,6,8

H

L

1,3,5,7,9

L

H

H

= high

level, L

= low

u
u

:I:C,!)Z>u..

1:000

3

2 1 2019

NC
NC

level

E

NC
D

NC
l:EVEN

NC
C

CCU<{[l)
CZZ

OC,!)
IN

NC .: No internal connection

en
w

description

U

These universal, monolithic, nine-bit parity generators/checkers utilize Schottky-clamped TIL high-performance circuitry and
feature odd/even outputs to fa ciliate operation of either odd or even parity application. The word-length capability is easily expanded by cascading as shown under typical application data.
Series 54LS174LS and Series 54S174S parity generators/checkers offer the designer a trade-off between reduced power
consumption and high performance. These devices can be used to upgrade the performance of most systems utilizing the
'180 parity generator/checker. Although the 'LS280 and 'S280 are implemented without expander inputs, the corresponding
function is provided by the availability of an input at pin 4 and the absence of any internal connection at pin 3. This permits the
'LS280 and 'S280 to be substituted for the '180 in existing designs to produce an identical function even if 'LS280's and
'S280's are mixed with existing '180's.
.

>
w
C

~

tt-

These devices are fully compatible with most other TIL circuits. All 'LS280 and 'S280 inputs are buffered to lower the drive
requirements to one Series 54LS174LS or Series 54S174S standard load, respectively.

PRODUCTION DATA
This document contains information current a's
of publication date. Products conform to
specifications per tho terms of Texas Instruments

~~~nnd:::s~~rl~ar~liu:~Ot~~~~~~nor~~f~~~~~e~~:s~

._-.........

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-903

TYPES SN54S280, SN74S280
9-81T ODD/EVEN PARITY GENERATORS/CHECKERS
schematics of inputs and outputs
'LS280
TYPICAL OF OUTPUTS

EQUIVALENT OF INPUTS

~------~~-VCC

120Q
NOM

--

VCC
20 kQNOM

INPUT

r.....
J~

~-~~~~-~~OUTPUT

."

-

~~

~r

m
'S280
TYPICAL OF OUTPUTS

EQUIVALENT OF INPUTS

---------.---VCC
50 QNOM
V C C - - -....- -

-I
"'""I
rC

INPUT

m
~
(")
m

OUTPUT

en

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Input voltage: 'LS280 ........................................................................ 7 V
.
'S280 ....... :............................................................... 5.5 V
Operating free-air temperature range: SN54' ............................................ - 55°C to 125°C
SN74' .............................................. " OOC to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.

"

3-904

,TEXAS

Jj:J.

'V

INSTRUMENTS
POST OFFICE BOX 22'5012'. DALLAS. TEXAS 75265

TYPES SN54LS280, SN74LS280
9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS
recommended operating conditions

--r"-

SN54LS280

SN74LS2S0

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

-0.4

-0.4

rnA

101

Low-level output current

4

8

rnA

TA

Operating free-air temperature

70

°e

2

2

-55

125

--

V

0

..

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

Vee; MIN,

II; -18 rnA

Vee; MIN,

VIH;2V,

VIL = MAX,

IOH; - 0.4 mA

Vee
VOL

SN54LS280

TEST CONDITIONS

= MIN,

VIH;2V,

VIL = MAX

MIN

TYP*

SN74LS2S0

MAX

MIN

MAX

TYP*

-1.5
2.5

3.4
0.25

lIOL=4rnA

- 1.5
3.4'

2.7
0.4

IIOL; 8 mA

II

Vee; MAX,

VI; 7 V

IIH

Vee = MAX,

VI = 2.7 V

20

IlL

Vee=' MAX,

VI = 0.4 V

-0.4

IOS~

Vee; MAX

lee

Vee= MAX,

0.4

0.35

0.5
0.1

16

20

IlA
mA

- 100

rnA

27

rnA

TYP

MAX

UNIT

(IJ

33

50

ns

u

- 20
16

27

V
rnA

-0.4

-

-100

- 20

V
V

0.25

0.1

See Note 2

UNIT

t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, T A = 25° e.
.
§ Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second.
NOTE 2: lee is measured with all inputs grounded and all outputs open.

switching characteristics,
PARAMETER~

tpLH
tpHL
tpLH
tpHL

Vee = 5 V,T A = 25° e .
FROM
(INPUT)

---

TO

TEST CONDITIONS

(OUTPUT)

Data

~

Even

Data

~.Odd

eL=15pF,RL=2kn.,
I nputs not under test at 0 V,
See Note 3

~i tpLH 'propagation delay time, low-to-high-Ievel output; tpH L c:: propagation delay time, high·to·low·level output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

II

-MIN

29

45

23

35

31

50

W

ns

:>w

C

...J

lI-

3-905

TYPES SN54S280, SN74S280
9-81T ODD/EVEN PARITY GENERATORS/CHECKERS
recommended operating conditions
SN54S280
NOM

MIN
Supply voltage, Vee

4.5

SN74S280

MAX

MIN

5.5

4.75

5

High-level output current, 10H

NOM
5

-1

Low-level output current, 10L

20

Operating free-air temperature, T A

-55

125

0

MAX

UNIT

5.25

V

-1

rnA

20

rnA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

TEST eONDITIONSt

TVpj

MAX

2

Vee = MIN,

II = -18mA

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

10H = -1 rnA

Vee = MIN,

VIH = 2 V,

l SN54S'
I SN74S'

UNIT
V

2.5

3.4

2.7

3.4

0.8

V

-1.2

V
V

VOL

Low-level output voltage

VIL = 0.8 V,

10L = 20 rnA

II

Input current at maximum input voltage

Vee= MAX,

VI = 5.5V

1

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

50

J1A

IlL

Low-level input current

Vee = MAX,

VI = 0.5 V

-2

rnA

lOS

Short-circuit output current~

Vee = MAX

-100

rnA

0.5

-40

Vee = MAX, See Note 2
ICC

lEI

MIN

Supply current

Vee = MAX,
See Note 2

SN54S280

67

99

SN74S280

67

105

TA=125"e,

94

SN54S280N

V
rnA

rnA
rnA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
~AII typical values are at Vee = 5 V, T A = 25" C.
~ Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second,
NOTE 2: ICC is measured with all inputs grounded and all outputs open.

switching characteristics, Vee
PARAMETER~

tpLH

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

Data

I: Even

TEST CONDITIONS

= 15pF,

tpHL

CL

tPLH

See Note 3

Data

I: Odd

RL = 280

tpHL
,tPLH = propagation delay time. low·to-high-Ievel output; tpHL = propagation delay time, high-to-Iow-Ievel output
NOTE 3: Sec General Information Section for load circuits and voltage waveforms.

3-906

- TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 .. DALLAS. TEXAS 75265

n,

MIN

TVP

MAX

14

21

11.5

18

14

21

11.5

18

UNIT

ns

ns

TYPES SN54LS280, SN54S280, SN74LS280, SN74S280
9-81T ODD/EVEN PARITY GENERATORS/CHECKERS
logic diagram

1:
EVEN

~

000

p
___________________
p_in_n_um
__
be_rs_s_h_o_w_n_on_l_o_9i_C_no_t_at_io_n_a_re_f_or_D_,_J_O_rN__a_c_ka_9_e_s.________________________________________

TYPICAL APPLICATION DATA
Three

'L5280's

or

'5280'5 can

Long'er word lengths can be imple·

be

mented

used to implement a 25·line paritY

C

0

2:
EVEN

will provide parity in typically 75 or

A

25 nanoseconds respectively.

B
C
0

E

E
F
G

F

G
H
I

A
B

'LS280/
'S280

~

0

EVEN

E

F

1:

DOD
H 'LS280/
I 'S280

G

H
I

0

E

F
G

~

EVEN

'L5280's

or

C

H = EVEN
L=OOO

E
F
G

bits

in

typically

75 or 25 nano·

u
5:
w
C

..J

seconds respectively.

ff-

'LS280/
'S280
A
B

~

B

H = EVEN
L= ODD

EVEN

C
0

0

E

F

2:
EVEN
~

ODD
H 'LS280/
I
'S280

G

H 'LS280/
'S280
I

A
B
C

cascading

generated for word lengths up to.81

A

C

by

'5280'5. As shown here, parity can be

generator/checker. Th is arrangement

A
B

VJ

w

81·LlNE PARITY/GENERATOR CHECKER

25·LlNE PARITY/GENERATOR CHECKER

1IiiIIIII

H = EVEN
L= ODD
H = EVEN
L =000

A

B

1:
EVEN

H 'LS280/
'S280
I

As an alternative, the outputs of two
or

three parity

generators/checkers

can be decoded with a 2·input ('586

C

~

exclusive·OR gate for 18· or 27·line

I

3·input

~

F

('5135)

'L586)

1:
EVEN

o

E

'LS280/
'S280

TO OTHER
'LS280/
'S280

parity applications.

.

TExAS.

INSTRUMENTS
POST OFFICE BOX 225012 • QALLAS. TEXAS 75265

3-907

•

-4
-4
r
C

m

S
(')

m

f/)

3-908

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
FEBUARY 1974-REVISED DECEMBER 1983

SN54S281 ... J OR W PACKAGE
SN74S281 ... DW, J OR N PACKAGE

•

Full 4-Bit Binary Accumulator in
a Single Pacl
w

(!)

U

C
NC - No internal connection

...J

performs any of seven logic functions on two binary variables as detailed in Table 2. Full carry look-ahead is provided for fast,
simultaneous carry generation for the full four binary bits. The carry input (C n ) and propagate and generate outputs (p, (3)

lI-

are implemented for direct use with the SN54S182/SN74S182 look-ahead carry generators. This permits systems to be
implemented with the added advantage of full look-ahead across any word length to minimize the accumulator delay times.
Once data is loaded into the accumulator, the typical add time with full look-ahead is 29 nanoseconds for 16-bit words.
The shift/storage matrix is analogous in its capabilities to the SN54S194/SN74S194 universal bidirectional shift register with
the added advantages of multiplexed input/output (I/O) cascading lines that comprehend arithmetic shift functions having a
sign bit, such as 2's complements. The matrix can be used to perform either logiC or arithmetic shifts in either direction (left
or right), parallel load, or hold. Control of the register is accomplished with three inputs: register control (Re) and register
selection (RSO, RS1). The cascading input/output lines incorporate three-state outputs multiplexed with an input. The leastsignificant cascading bit is co~bined with the AO, FO circuitry to provide the shift-right input and the shift-left output
(RI/lO), and the most significant bit is coupled with the A3, F3 circuitry to provide the shift-left input and the shift-right
output (L1/RO).
Series 54S circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74S
circuits are characterized for operation from ODC to 70 DC.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to these
specifications per the terms of Texas Instruments

~~~nndea~:s':a~rl~r~liu:~Ot~~~~~~nor~~f~~~~~e~~:s~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-909

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
logic symbol

AlU
(20)

ASO

(19)

AS1

(1B)

AS2

(17)

M

(B)

Cn

(4)

RSO

(3)

RS1

:}M~

(0 ... 7) CP
(0 ••• 7)CG

(11)

........

(9)

~

(10)

(0 ••• 7)CO

P
G
Cn + 4

CI

O}EN~
1

SRG4

23

(5)
-'""

RC

1:::-

EN24 [Arithmetic, ABC)
EN25 [logic, ABCD)

(22)

~ C26

ClK

4t-

-

EI
-I
-I

r-

AO

(23)

......r1.(21)

Rl/lO

24(21+/22+) [ABC)
25(21+/22+) [ABCD)

Z31
35,20,260
21,260

p

31

(1)

[A)

-0

\722
Z32

32

-36,20,260
(2)

A2

(6)

~

[B)

Z33

-

-P
(2) .

Z36

(4)

Z37

[B)

Z3B

0

FO

(15)

F1

[C)

\7 24,21

(14)

F2

0

Ll/ROI~.

~

en

4(7)
A3

34

25,22,260
\725,21

-p

(0)

1-38,20,260

--0

Z34

Pin number_s~n logic notation are for OW, J or Npackages.

3-910

(16)

Z35

33 - -p

- ... 37,20,260
24,22,260
~

m

r

r

'J

(11
A1

C

=::
om

>
>

.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

(13)

F3

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
logic diagram
RS1 RSO
1(3) 1(4)

'\7

CK

RC

(22)

(5)

UR

ASO
(20)

(6)

r--

~7

AS1

AS2

M

(19)r-- (1~ (17)

r-

U

~71

';7

(11)p

A3 (7)

II
en
w

u

:>w
C

..J

....

....
AO (23)

~~~~"'J.Dlr~

H>11
~II·=-=*~==~-=~=~=~~~--------------~
LLol
__

L--+HII-r-"\

-+-_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _-2(--!.21) R/L

-1./1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-911

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
FUNCTION TABLES
TABLE l-ARITHMETIC FUNCTIONS

TABLE 2-LOGIC FUNCTIONS

Mode Control (MI = Low
ALU

ACTIVE-HIGH DATA

SELECTION

Cn=H

AS2 ASl ASO

(with carryl

L

Mode Control (MI = High
Carry Input (Cnl = X {lrrelevantl

L

L

L

L

L

H

L
H

Cn = L
(no carry I

ALU

ACTIVE-HIGH

SELECTION

Fn = H

H

F = B MINUS A

F = B MINUS A MINUS 1

L

L

L

Fn = L

L

F = A MINUS B

F = A MINUS B MINUS 1

L

X

H

Fn=An 0Bn

H

H

F

F = A PLUS B

L

H

L

Fn = An (f) Bn

L

L

Fn = Bn

H

L

L

Fn = AnBn

H

L

H

= A PLUS B PLUS
F = B PLUS 1
F = B PLUS 1

Fn = Bn

H

L

H

Fn=An+Bn

H

H

L

F = A PLUS 1

Fn = An

H

H

L

Fn = AnBn

H

H

H

F

= A PLUS

Fn = An

H

H

H

Fn=An+Bn

1

AS2 ASl ASO

DATA FUNCTION

Fa = L, F 1 = F2 = F3 = H

-

-

1

TABLE 3 - SHIFT-MODE FUNCTIONS
Cn = M

= ASO =ASl = L, and AS2 =H (Fn = Bnl

INPUTS BEFORE t

FUNCTION

II
en
w

()

:>w
C

-I

lI-

REGISTER
SELECTION
RSO RSl

REGISTER

INPUTI

CONTROL

OUTPUT

INPUT

RI/LO

LOAD

L

L

X

Z

LSL

L

H

L

°A

LSA

L

H

H

RSL

H

L

L

°A
ri

RSA

H

L

H

ri

H

H

X

X

X
X

X
X

HOLD

OUTPUTS AFTER t

SHIFT-MATRIX
INPUTS
FO

Fl

F2

F3

10

11

f2

INPUTI
OUTPUT

CLOCK

LltRO

INPUT

SHIFT-MATRIX

INPUTI

INPUTI

OUTPUTS

OUTPUT

OUTPUT

(ALU B INPUTSI

RI/LO

L1IRO

°B
f1

Oc

00

f2

13

13

Z

t

Z

°A
fO

°A °B °c 00
°A °B °c 00

Ii

°Bn

°Bn

°Cn

Ii

t
t

00

t

°Bn
ri

°Cn

°A °B °c 00
°A °B °c 00

°Bn
ri

Ii
°On
Ii
000

°An

°Bn

°Cn

°Cn

°c

t

ri

°An °Bn

000

°c 00
°c 00

X
X

t

Z

°AO °BO

°Bn
Z

L

RilLa

°AO °BO

°A °B
°A °B

ri

°CO 000
°CO 000

Z
Ii
Ii

LlIRO

H = high level (steady state)
L = low level (steady state)
X = irrelevant (any input, including transitions)
Z = high impedance (output off)
t = transition from low to high level
to, fl, f2, f3, ri, Ii = the level of steady-state conditions at FO, F 1, F2, F3, R liLa, Or Ll/RO respectively
0AO, aBO, 0CO, aDO = the level of 0A, 0B, 0C, or aD, respectively, before the indicated steady-state input conditions were established
0An, 0Bn, 0Cn' 0Dn = the level of 0A, 0B, 0C, or aD, respectively, before the most recent transition of the clock

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
_..........
Input voltage . . . . . . . _ . . . . . . . . . . .
Operating free-air temperature range: SN54S281 (see Note 2)
SN74S281
Storage temperature range

NOTES:

3-912

7V

5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

1. Voltage values are with respect to network ground terminal.
2. An SN54S281 in the W package operating at free-air temperatures above 110°C requires a heat sink that provides thermal
resistance from case to free-air, ROCA, of not more than 20°C/W.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54S281 , SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
recommended operating conditions
SN54S281
Supply voltage, Vee
High-level output current, 10H
Low-level output current, 10L

MIN

NOM

MAX

MIN

4.5

5

5.5

4.75

SN74S281
UNIT
NOM MAX
5

5.25

Any output except L1/RO and RI/LO

-1

-1

LI/RO and RI/LO

-2

-2

Any output except L1/RO and RI/LO

20

20

10
50

10

L1/RO and RI/LO

V
rnA
rnA

elock frequency, f clock (for shifting)

0

Width of clock pulse, t w (c1ock)

B

8

ns

Data setup time with respect to clock, tsu

ot

Ot

ns

Data hold time with respect to clock, th

1St

Operating free-air temperature, T A (see Note 2)

0

50

1Bt

-55

125

0

70

MHz

ns
°e

tThe arrow indicates that the rising edge of the clock pulse is used for reference.
NOTE 2: An SN54S281 in ~he W package operating at freoe.air temperatures above 110°C requires a heat sink that provides thermal resistance
from case to free-air, ReCA' of not more than 20 C/W.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level
output voltage

Any input except
L1/RO and RI/LO
Any output except
L1/RO, RI/LO

II

Input current at maximum input voltage

input current

SN54S281
TYP:j: MAX

input current

lee

O.B

V

-1.2

-1.2

V

II; -1BmA

Vee; MIN,

VIH;2V,

2.5

3.4

2.7

3.4

VIL; O.B V,

10H; MAX

2.4

3.4

2.4

3.4

Vee; MIN,

VIH; 2V,

VIL; O.S V,

10L; MAX

V

0.5

Vee; MAX, VI; 5.5 V

RSO, RS1
M, elock
L1/RO, RI/LO
AS2

Vee; MAX, VI;2.7V,
See Note 3

RI/LO
M, elock
ASO,AS1

Vee; MAX,

VI ;0.5V

See Note 3

All others
lOS

V

O.B
Vee; MIN,

RSO, RS1, L1/RO
IlL

SN74S281
UNIT
TYP:j: MAX

2

All others

Low·level

MIN

L1/RO and RI/LO

Low-level output voltage

IIH

MIN
2

VOL

High-level

TEST CONDITIONSt

0.5

1

1

50

50

150
200'

150
200

300

300

250

250

-2

-2

-3

-3

-4

-4

-6

-6

-B

Short-circuit output current §

Vee; MAX

Supply current

Vee; MAX'I W package
TA; 125°e only
Vee; MAX

-110

-40

I All packages

230

rnA

J.lA

lEi
en

w
CJ

>
w

C

...J
rnA

tt-

-S
-40

-110

190
144

V

rnA
rnA

144

230

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at VCC; 5 V, TA ; 25°C.
§ Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
NOTE 3. When testing input current at the RilLa or LIIRO terminals, the output under test must be in the high·impedance (off) state.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-913

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
switching characteristics, Vee
PARAMETER~I

= 5 V, TA = 25°e
FROM

TO

(INPUT)

(OUTPUT)

tPLH

Cn

tpHL
tpLH

Any A

Cn+4

Cn

Any F

Any A

-G

Any A

P

tpLH
tpLH

MIN

TYP

MAX

10

20

C n +4

tpHL
tpHL

TEST CONDITIONS

tpHL
tpLH
tpHL
tpLH

Aj

Fj

AO

RI/LO

tPHL
tPLH
tpHL
tPLH
tpHL
tPLH
tPHL
tPLH

A3

Ll/RO

FO

RI/LO

tPLH

Any AS

tPHL
tpLH

1/0 outputs: RL

~

Other outputs: RL

560 H,
~

280 H,

See F jgure 1

r-

C

20
20

14

24

14

24

12

20

12

20

20

35

20

35

30

45

30

45

30

45

30

45

7

11
11

7

11

Any F or

28

45

Cn+4

28

45

20

33

20

33

30

45

30

45

RI/LO or

35

55

Ll/RO

35

55

-

-3V

-

PorG

Clock

Any F

Clock

tpHL
~I tpLH
tpHL

10
10

11

tpHL

-f
-f

30

7

-

Any AS

tpLH

18

7

tpHL
tPLH

20
30

Ll/RO

F3

tpHL

CL~15pF,

10
18

UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Propagation delay time, low·to·high·level output
Propagation delay time, high·to·low·level output

m

PARAMETER MEASUREMENT INFORMATION

<
(")

m

~~.;:V -

INPUT

(J)

TEST
POINT

-7:'~Y~OV

VCC

~~~~,~~;;t --t.-! :,~,. '"'""

:'-tPLH~

f.-tPHL---t
t
-:--VOH
15 V

~
I

IN PHASE
OUTPUT

" ,"'":\ t !

I

I 5V

I

I
.-tPHL-I

t
I
I
I

VOl

I-tPLH~

~
:

OUTOFPHASF
OUTPUT

:VOH
1.5V

1.5V

- - -VOL

LOAD CIRCUIT
VOLTAGE WAVEFORMS

.NOTES:

A.

Input pulse is supplied by a generator having the following characteristics: tr "" 2.5 ns, If':; 2.5 ns, PRR .:; 1

B. CL inlcudes probe and jig capacitance.
C. All diodes are lN3064 or equivalent.

FIGURE 1

3-914

-IJ1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MHz, ZOUI '" 50 H.

TYPES SN54S281, SN74S281
4-BIT PARALLEL BINARY ACCUMULATORS
TYPICAL APPLICATION DATA
RIGHT
DATA IN
CARRY
INPUT

RilLa

LlIRO

RilLa

LlIRO

RilLa

Cn +4

Cn

C n+4

Cn

Ll/RO
Cn +4

Cn

Cn +4

'5281

'5281

'5281

'5281

RilLa

LlIRO

LEFT
DATA IN
CARRY
OUTPUT

38 ns typical
ENTER AND STORE TIME:
EACH SUCCESSIVE ADDITION TO STORED DATA: 44 ns typical
FIGURE A-16-BIT BINARY ACCUMULATOR USING FOUR SN54S281/SN74S281 CIRCUITS
IN RIPPLE-CARRY MODE

RIGHT
DATA IN
CARRY
INPUT

LlIRO

AI/La

RilLa
Cn

Ll/RO

RilLa

LlIRO
'5281

Cn

G p-

'5281

en

G p-

C n+ x

Ll/RO

RilLa

'5281 Cn+4

LEFT
DATA IN
CARRY
OUT

G P

Cn +y
'S182

ENTER AND STORE TIME:
37 ns typical
EACH SUCCESSIVE ADDITION TO STORED DATA: 29 ns typical
FIGURE B-16-BIT BINARY ACCUMULATOR USING FOUR SN54S281/SN74S281 CIRCUITS
AND ONE SN54S182/SN74S182 IN FULL LOOK-AHEAD CARRY MODE

en
w

RIGHT
DATA IN
CARRY
INPUT

RI/LO

Cn

4
'S281s

LlIRO

RI/LO

4
'S2815

RilLa

Ll/RO

Cn

4
'S281s

LlIRO

RI/LO

LlIRO
4
'S281s Cn+4

LEFT
DATA IN
CARRY
OUT

(J

>
..
W
C
...J

lI-'
G

p-

GO

PO

Cn+ x

Cn

G

p-

<31

Pl

Cn +y

G

P

<32

P2

Cn+ z

G

P

G3

P3

'S182

ENTER AND STORE TIME:
42 ns typical
EACH SUCCESSIVE ADDITION TO STORED DATA: 34 ns typical
FIGURE C-64-BIT BINARY ACCUMULATOR USING 16 SN54S281/SN74S281 CIRCUITS AND
FIVE SN54S182/SN74S182.CIRCUITS FOR FULL CARRY LOOK-AHEAD

A inputs and F outputs of 'S281 are not shown_

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-915

II
-I
-I

rC

m

<
nm

en

3-916

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54283, SN54LS283, SN54S283,
SN74283, SN74LS283, SN74S283
4-81T BINARY FULL ADDERS WITH FAST CARRY
OCTOBER 1976-REVISED DE

•

Full-Carry Look-Ahead Across the Four
Bits

•

Systems Achieve Partial Look-Ahead
Performance with the Economy of Ripple
Carry

•

SN54283. SN54LS283 ... J OR W PACKAGE
SN54S283 ... J PACKAGE
SN74283 •.. J OR N PACKAGE
SN74LS283. SN74S283 ... D. J OR N PACKAGE
(TOPVIEWI

12

VCC
83
A3
D

82
A2

Supply Voltage and Ground on Corner
Pins to Simplify P-C Board Layout

~1

TWO

TYPICAL POWER

A4

A1
81
CO

~4

GND

C4

TYPICAL ADD TIMES
TWO

EMBER 1983

84

a-BIT

16-BIT

DISSIPATION

TYPE

WORDS

WORDS

PER ADDER

SN54LS283. SN54S283 ... FK PACKAGE
SN74LS283. SN74S283 ... FN PACKAGE
(TOPVIEWI

'283

23ns

43ns

310 mW

'LS283

25ns

45ns

95 mW

'S283

15ns

30ns

510 mW

U

~~~~~

description

A3
D

A2
~1

The '283 and 'LS283 adders are electrically and
functionally identical to the '83A and 'LS283,
respectively; only the arrangement of the terminals
has been changed. The 'S283 high performance
versions are also functionally identical.
These improved full adders perform the addition of
two 4-bit binary words. The sum (~) outputs are
provided for each bit and the resultant carry (C4) is
obtained from the fourth bit. These adders feature
full internal look-ahead across all four bits generating
the carry term in ten nanoseconds, typically, for the
'283 and 'LS283, and 7.5 nanoseconds for the 'S283_
This capability provides the system designer with
partial look-ahead performance at the economy and
reduced
package
count
of
ripple-carry
implementation.
The adder logic, including the carry, is implemented
in its true form. End around carry can be accomplished without the need for logic or level inversion.
Series 54, Series 54LS, and Series 54S circuits are
characterized for operation over the full temperature
range of -55°C to 125°C. Series 74, Series 74LS, and
Series 74S circuits are characterized for O°C to 70°C
operation.

NC

NC

A1
81

A4
84

NC - No internal connection

CI)

FUNCTION TABLE

W

OUTPUT

%
%
r;;;:
%1%
%
co-

INPUT

83
~~
L

U

%

A<1

L

WloIfiN

WHEN

C"L

cz ....

:t~

H

L

L

L

L

L

H

L

L

L

H

L

H

L

L

H

L

L

L

H

L

H

L

L

L

H

L

H

H

L

L

L

H

L

L

H

L

H

H

L

H

L

H

L

H

H

L

L

L

H

L

L

L

L

H

H

L

H

H

L

L

H

H

H

H

L

L

L

H

H

L

H

L

L

L

H

L

H

L

H

H

L

H

L

L

H

H

H

L

L

L

H

L

H

L

H

H

H

L

L

L

H

H

H

L

H

L

L

H

H

L

L

...J

:t4

L
H.

L

C

%~%

:t4

1:3

H

L

>
w

CO-H

L

tt-

H

L

L

H

H

L

L

H

H

L

H

H

L

H

H

H

L

H

L

H

H

L

H

H

H

H

L

H

L

H

H

H

H

H

H

L

H

H

H

H

H

H = high level. L = low level
NOTE: Input conditions at A1. B1. A2. B2. and CO are used to
determine outputs }';1 and 1:2 and the value of the internal
carry C2. The values at C2. A3. B3. A4. and B4 are then
used to determine outputs ~3. ~4. and C4.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~ea::S~~fl~~liu:~Ot~~~l~~nor~~f~~~~'::e~~:s~

TEXAS . .
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-917

TYPES SN54283, SN54LS283, SN54S283,
SN74283, SN74LS283, SN74S283
4-BIT BINARY FULL ADDERS WITH FAST CARRY
logic diagram

schematics of inputs and outputs
'283
TYPICAL OF ALL
OUTPUTS

EQUIVALENT OF
EACH INPUT

---__.--VCC

VCC3-Req

INPUT

.-OUTPUT

co input: Req
Any A or B: Req

= 4 kU NOM
= 3.SkU NOM

C4 output: R = 100 U NOM
Any l;: R = 120 U NOM

'LS283
EQUIVALENT OF
EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC--__- -

------VCC

Req

INPUT_*.......~rOUTPUT

II

co input: Req
Any A or B: Reo

-4
-4
r-

= 17 kU NOM
= 8.5 kU NOM

-

'S283

EQUIVALENT OF
EACH INPUT
Pin numbers shown on logic notation are for D, J or N packages.

C

m

<

VCC

a

TYPICAL OF ALL OUTPUTS

------VCC

2.8 kU.NOM

(")

m

INPUT

en

--

OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage: '283, 'S283
'LS283 . . . .
Interemitter voltage (see Note 2)
Operating free·air temperature range: SN54283, SN54LS283, SN54S283 .
SN74283, SN74LS283, SN74S283 .
Storage temperature range
NOTES:

7V
5.5V
7V
5.5V
. -55°C to 125°C
oOe to 70°C
. -65°e to 150°C

1. Voltage values, except interemitter voltage,.are with respect to network ground terminal.
2. This is the voltage between two emitters of a multiple-emitter transistor. This rating applies for the '283 and '5283 only between

the following pairs: Al and 81, A2 and 82, A3 and 83, A4 and 84.

.
3-918

TEXAS"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54283, SN74283
4-BIT BINARY FULL ADDERS WITH FAST CARRY
recommended operating conditions
SN54283
Supply Voltage. VCC
High·level output current. 10H

SN74283

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

Any output except C4

-800

-800

Output C4

-400

-400

16

16

Any output except C4

Low·level output current. 10L

Output C4

8

Operating free·air temperature, T A

-55

8

125

0

70

UNIT
V
J.lA
rnA

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

V,H

High·level input voltage

V,L

Low·level input voltage

V,K

Input clamp voltage
High-level output voltage

VOL

Low·level output voltage

"

input voltage

Input current at maximum

TYP+

VCC ~ MIN,

" ~ -12mA

VCC~

V,H

MIN,

~

MIN

TYP+

MAX

UNIT
V

2
0.8

0.8

V

-1.5

-1.5

V

2 V,

V,L ~ 0.8 V,

10H ~ MAX

VCC ~ MIN,

V,H

~

2V,

V,L ~ 0.8 V,

10L

~

MAX

VCC~

3.6

2.4

2.4

0.2

0.4

3.6

0.2

V

0.4

V

MAX,

V,

~

5.5 V

1

1

VCC ~ MAX,

V,

~

2.4 V

40

40

J.lA

Low·level input current

VCC ~ MAX,

V,

~

0.4 V

-1.6

-1.6

rnA

output current §

I Any output except C4
I Output C4

VCC

=

MAX

-20

-55

-18

-55

-20

-70

-18

-70

All B low, other
ICC

SN74283
MAX

High·level input current
Short-circuit

lOS

MIN
2

VOH

"H
I,L

SN54283

TEST CONDITIONSt

PARAMETER

VCC

Supply current

~

56

MAX, inputs at 4.5 V

rnA

II

rnA

56

en

rnA

Outputs open All inputs at

99

66

4.5V

66

w

110

(J

:>w

t For conditions shown as MI N or MAX. use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee ~ 5 V, T A ~ 25°C.
~ Only one output should be shorted at a time.

switching characteristics, Vee
PARAMETER~

tPLH

= 5 V, TA = 25°e

FROM (lNPUTI
CO

TO (OUTPUT!
Any

~

TEST CONDITIONS

tpHL

CL~15pF,

tPLH

See Note 3
Aj orBj

RL

~

400

n,

CO

C4

tpHL

CL~15pF,

tPLH

See Note 3
Ai or Bj

MIN

TYP

MAX

14

21

12

21

16

24

16

24

UNIT

lI-

ns

ns

!:j

tPHL
tPLH

C

...J

C4

tPHL

RL

~

780

n,

9

14

11

16

9

14

11

16

ns

ns

~ tpLH '"' Propagation delay time, low·to-high-Ievel output
tpH L '" Propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-919

TYPES SN54LS283, SN74LS283
4-BIT BINARY FULL ADDERS WITH FAST CARRY
recommended operating conditions
SN54LS283
Supply voltage, VCC

SN74 LS283

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-400

/JA

B

rnA
·C

-400

High-level output current, 10H

4

Low-level output current, 10L
-55

Operating free-air temperature, T A

UNIT

MIN

125

0

70

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High·level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

IIH
IlL
lOS

II = -1BmA

VCC= MIN,

VIH = 2V,

VIL = VIL max,

VIH = 2V,

10L = 4mA

10H =-400J.lA

2.5

VCC= MAX,
Any A or B

input current

CO

Low-level

Any A or B

input current

CO

Short-circuit output current§

m
~

(")

m

(J)

MAX

VCC= MAX,

V
V

-1.5

-1.5

V

2.7

3.4
0.4

3.4

V

0.25

0.4

0.35

0.5

0.2

0.2

0.1

0.1

40

40

VI = 0.4 V

20

20

-O.B

-O.B

-0.4
-100

-20

VCC= MAX
grounded
All B low, other

Outputs open

V

rnA.

VI = 2.7 V

VCC= MAX,

UNIT

O.B

VI =7V

VCC= MAX,

Supply current

TYP:J:

2

CO

High-level

MIN

0.7

0.25

All inputs

ICC

MAX

Any A or B

"-

-I
-I
rC

TYP:J:

10L = BmA

VIL = VIL max

at maximum
input voltage

VCC= MIN,

VCC= MIN,

VOL Low·level output voltage
Input current

MIN
2

VOH High-level output voltage

II

SN74 LS283

SN54LS283

TEST CONDITIONSt

PARAMETER

inputs at 4.5 V
All inputs at
4.5V

-0.4
-100

-20

22

39

22

39

19

34

19

34

19

34

19

34

J.lA
rnA
rnA

rnA

t For conditions sh?wn as MI N or MAX, use t~e appropriate value specified under recommended operating conditions.

:J:AIi typical values are at V CC = 5 V, T A = 25 C.
§Only one output should be shorted at a time.and duration of the short-circuit should not exceed one second.

switching characteristics, Vee = 5 V, T A = 25° C
PARAMETER~

FROM (INPUT)

TO (OUTPUT)

CO

Any l:

TEST CONDITIONS

TYP

MAX UNIT
24

tpHL

15

24

tpLH

15

24

1'5

24

tpHL
tpLH

Ai orBi

l:i

CO

C4

tpHL
tPLH
tpHL

AjorBj

CL = 15pF,
See Note 3

C4

,tpLH = Propagation delay time, low-to-high·level output
tpHL = Propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-920

MIN

16

tpLH

TEXAS

-1.!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

RL=2kn,

11

17

11

22

11

17

12

17

ns
ns
ns
ns

TYPES SN54S283, SN74S283
4-BIT BINARY FULL ADDERS WITH FAST CARRY
recommended operating conditions
SN74S283

SN54S283
NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-1

-1

mA

-500

-500

",A

20

20
10

mA

70

°c

Supply voltage, Vee
High·level output current, 10H
Low-level output current, 10L

Any output except C4
Output C4
Any output except C4

10

Output C4
-50

Operating free-air temperature, T A

UNIT

MIN

125

0

'electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

TVpl

MAX

Vee = MIN,

11=-18mA

ISN54S283

Vee = MIN,

VIH = 2V,

2.5

3.4

ISN74S283

VIL

10H = MAX

2.7

3.4

input voltage

= 0.8 V,

Vee = MIN,

VIH = 2V,

VIL = 0.8 V,

10L = MAX

Vec = MAX,

VI = 5.5V

UNIT
V

2

Input current at maximum
II

MIN

0.8

V

-1.2

V
V

0.5
1

V
mA

IIH

High-level input current

Vec

= MAX,

VI = 2.7 V

50

",A

IlL

Low-level input current

Vee = MAX,

VI = 0.5 V

-2

mA

lOS

Short-circu it

I Any output except C4

output current§

I

Output C4

Vec = MAX

-40

-100

-20

-100

II

mA

A" B low, other
lee

Vec

Supply current

= MAX,

Outputs open

80

inputs at 4.5 V

mA

A" inputs at
95

4.5V

160

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device
type.
fAil typical values are at Vee = 5 V, TA = 25 0 e.

§ Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

switching characteristics, Vee = 5 V, T A = 25°e
. PARAMETER~
tpLH

FROM (INPUT)
eo

TO (OUTPUT)
Any};

MIN

TEST CONDITIONS

tpHL

eL = 15 pF, RL = 280

tPLH

See Note 3

n,

TVP
11

MAX
18

12

18

12

18

tPHL

11.5

18

tpLH

6

11

7.5

11

7.5

12

8.5

12

tpHL
tPLH
tpHL

Aj or Bj
eo
Aj or Bj

};j
e4
C4

eL=15pF, RL = 560
See Note 3

n,

UNIT
ns
ns
ns
ns

11 tPLH = Propagation delay time, low·to-high-Ievel output
tpH L

= Propagation delay time, high-to-Iow-Ievel output

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

3-921

TYPES SN54284, SN54285, SN74284, SN74285
4-BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS
MAY 1972 - REVISED DECEMBER 1983

SN54284 ... J OR W PACKAGE
SN74284 ... J OR N PACKAGE

•

Fast Multiplication of Two Binary Numbers
8-Bit Product in 40 ns Typical

•

Expandable for N-Bit-by-n-Bit Applications:
16-Bit Product in 70 ns Typical
32-Bit Product in 103 ns Typical

2C
2B

•

Fully Compatible with Most TTL Circuits

10

GB

•

Diode-Clamped Inputs Simplify System
Design

lA
1B
1C
GNO

Y4

(TOP VIEW)

r-

C
m

~

(1

m

en

Y5
Y6

Y7

SN54285 ... J OR W PACKAGE
SN74285 ... J OR N PACKAGE

These high-speed TTL circuits are designed to be used
in high-performance parallel multiplication applications_ When connected as shown in Figure A, these
circuits perform the positive-logic multiplication of
two 4-bit binary words_ The eight-bit binary product
is generated with typically only 40 nanoseconds
delay_

-4
-4

GA

2ft

description

This basic four-by-four multiplier can be utilized as a
fundamental building block for implementing larger
multipliers_ For example, the four-by-four building
blocks can be connected as shown in Figure B to
generate submultiple partial products_ These results
can then be summed in a Wallace tree, and, as
illustrated, will produce a 16-bit product for the two
eight-bit words typically in 70 nanoseconds.
SN54H 183/SN74H 183
carry-save
adders
and
SN54S181/SN74S181 arithmetic logic units with the
SN54S182/SN74S182 look-ahead generator are used
to achieve this high performance. The scheme is
expandable for implementing N X M bit multipliers.

Vcc
20

(TOP VIEW)

2C
2B
2A

VCC
20
GA
GB
YO
Yl
Y2
Y3

10

lA
1B
1C
GNO

logic symbols
'284

}~

lA

},~

3

The SN54284 and SN54285 are characterized for
operation over the full military temperature range of
-55°C to 125°C; the SN74284 and SN74285 are
characterized for operation from O°C to 70°C.

rl

(12)
Y4
(11)
Y5
(10)
Y6
(9)

Y7

EN

'285
lA (5)
lB (6)
lC (7)
(12) YO
(11L
Y1
(10) Y2
(9)
Y3

10 (4)
2A (3)
28

:~:

2C (15)

~D (13)

~~ (14)

EN

Pin numbers shown are
for J and N packages.

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54284, SN54285, SN74284, SN74285
4-BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS
schematics
TYPICAL OF
ALL OUTPUTS

EQUIVALENT OF
EACH INPUT
Vcc---~--

OUTPUT

INPUT

BINARY INPUTS
WORD 2

WORD 1

~~
I

II
I
20 2C

fGA

2B

2A

10

1C

1B

20

1A

fGA

SN54284/SN74284

2C

2B

en
w

u

2A

10

1C

1B

:>w

1A

SN54285/SN74285

C

GB

GB
Y7

~

I1

I

Y6

Y5

Y4

Y3

Y2

Y1

YO

I

I

r

I

I

I

I

....I
....
....

V
BINARY OUTPUTS
FIGURE A-4 X 4 MULTIPLIER

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-923

83:>11\30 li.L

w

cD

II

N

~~
2!-a

~

-tm

tlJen

'III

SN54S181ISN74S1a1 t

SN54S1S1ISN14S181 t

SN54S181ISN74S1S,t

WALLACE
TREE

F2

\ 2'5

2'4

2'3

212

2'1

2'0

z8

29

27

z6

25

z4

2 3 22 2'

16·81T PRODUCT

FIGURE

a-a x a MUL TIPLIER

tOther terminals of the three SN54S181/SN74S181 ALU's are connected as follow·s: S3
used for this application.

= H, S2 = L, S1 = L, SO = H,

iTiCJ1
:u

M

= L.

Output A

= B is

not

zO /

TYPES SN54284, SN54285, SN74284, SN74285
4-BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1)
...... .
Input voltage . . . . . . .
...... .
Operating free·air temperature range: SN54' Circuits
•
SN74' Circuits
Storage temperature range

7V
5.5 V
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54284

SN74284

SN54285

SN74285

MIN
Supply voltage, Vee

NOM

4.5

MAX

MIN

5.5

4.75

5

High·level output voltage, VOH

NOM
5

5.5

Low·level output current, IOL
Operating free·air temperature, T A

16
-55

125

0

UNIT
MAX'
5.25

V

5.5

V

16

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VI

Input clamp voltage

IOH

High-level output current

TEST CONDITIONSt

MIN

TYP+ MAX UNIT

2

V
0.8

Vee= MIN,

II = -12mA

Vee = MIN,

VIH = 2 V,

VIL = 0.8 V,

VOH=5.5V

Vec = MIN,
VOL Low-level output voltage

-1.5
40

IOL= 12mA

0.4

IOL= 16mA

0.45

V
/lA

V

VIH = 2V,
VIL =0.8 V

V

II

Input current at maximum input voltage

Vee = MAX, VI = 5.5 V

1

mA

IIH

High-level input current

Vee = MAX, VI = 2.4 V

40

/lA

IlL

Low-level input current

Vee - MAX, VI = 0.4 V

-1

mA

Vee - MAX,
TA = 125°C,
ICC

Supply current

See Note 2

SN54284, SN54285

mA

Vee = MAX, SN54284, SN54285

92

110

See Note 2

92

130

SN74284, SN74285

en
w

U

:;;
w

99

N package only'

II
C

...J

tt-

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device
type.
+AII typical values'are at Vee = 5 V, TA = 25°e.
NOTE 2: With outputs open and both enable inputs grounded, lee is measured first by selecting an output product which contains three or
more high-level bits, then by selecting an output product which contains four low-level bits.

switching characteristics, Vee = 5 V, TA = 25°e.
PARAMETER

TEST CONDITIONS

tpLH Propagation delay time, low-to-high-Ievel output from enable
tpHL Propagation delay time, high-to-Iow-Ievel outp.ut from enable

eL = 30 pF to GND,
RL1 = 300 n to Vee,

tpLH Propagation delay time, low-to-high-Ievel output from word inputs

RL2 = 600

tpHL Propagation delay time, high-to-Iow-Ievel output from word inputs

See Note 3

n

to GND,

MIN

TYP

MAX UNIT

20

30

20

30

40

60

40

60

ns
ns

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-925

II
-I
-I

r-

C
m

S
C')

m

en

3-926

TYPES SN54290, SN54293, SN54LS290, SN54LS293,
SN74290,SN74293,SN74LS290,SN74LS293
DECADE AND 4-BIT BINARY COUNTERS
MARCH 1974-REVISED DECEMBER 1983

'290, 'LS290 ... DECADE COUNTERS
'293, 'LS293 ... 4-BIT BINARY COUNTERS
•

SN54290.SN54LS290.SN54293.
SN54LS293 ... J OR W PACKAGE
SN74290. SN74293 ... J OR N PACKAGE
SN74LS290. SN74LS293 •.. D. J OR N PACKAGE
(TOP VIEW)

GND and VCC on Corner Pins
(Pins 7 and 14 Respectively)

'290

'293

A9(1)
NC
A9(2)

description
The SN54290/SN74290, SN54LS290/SN74LS290,
SN54293/SN74293, and SN54LS293/SN74LS293
counters are electrically and functionally identical to
the SN5490A/SN7490A, SN54LS90/SN74LS90,
SN5493A/SN7493A, and SN54LS93/SN74LS93,
respectively. Only the arrangement of the terminals
has been changed for the '290, 'LS290, '293, and
'LS293.

N_C
NC
NC

VCC
AO(2)
AO(l)
CKB
CKA
OA
OD

Dc
OB
NC
GND

VCC
AO(2)
AOIl)
CKS
CKA
OA
OD

Dc
Os
NC
GND

SN54LS290. SN54LS293 .•• FK PACKAGE
SN74LS290. SN74LS293 ... FN PACKAGE

Each of these monolithic counters contains four
master·slave flip·flops and additional gating to pro·
vide a divide·by·two counter and a three·stage binary,
counter for which the count cycle length is divide·
by·five for the '290 and 'LS290 and divide·by·eight
for the '293 and 'LS293.
All of these counters have a gated zero reset and the
'290 and 'LS290 also have gated set·to·nine inputs for
use in BCD nine's complement applications.

(TOP VIEW)

'LS290

3 2

A9(2)
NC

5

Dc

6

NC
Os

8

To use the maximum count length (decade or four·bit
binary) of these counters, the Binput is connected to
the QA output. The input count pulses are applied to
input A and the outputs are as described in the
appropriate function table. A symmetrical divide·by·
ten count can be obtained from the '290 and 'LS290
counters by connecting the QD output to the A input
and applying the input count to the B input which
gives a divide·by-ten square wave at output QA.

1 2019

4

7

14

RO(l)
NC
CKB
NC
CKA

9 1011 1213

en

~~~8~

w

C!J

U

>
w

'LS293

C

...J

NC
NC

Oc
NC
OB

RO(l)
NC
CKS
NC
CKA

~
~

NC - No internal connection

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nn~a:!~~fI~r;lJ·u~~~~~~l~~nor~~f::~~~e~:res~

TEXAS . .
INSTRUMENTS
POST OFFice BOX 225012 • DALLAS. TeXAS 75265

3-927

TYPES SN54290, SN54293, SN54LS290, SN54LS293,
SN74290,SN74293,SN74LS290,SN74LS293
DECADE AND 4-BIT BINARY COUNTERS
'290, 'LS290
BI-QUINARY (5-21
(See Note BI

'290, 'LS290
BCD COUNT SEQUENCE
(See Note AI
OUTPUT

COUNT

a

00 Oc 0B 0A
l
l
l
l

OUTPUT

COUNT

a

'293, 'LS293
COUNT SEQUENCE
(See Note CI

'290, 'LS290
RESET/COUNT FUNCTION TABLE
OUTPUT

RESET INPUTS

0A 00 Oc 0B
l
l
l
l

RO(ll
H

OUTPUT

COUNT

RO(21 Rg(ll Rg(21 00 Oc 0B 0A
l
H
l
X
l
l
l

00 Oc

°B °A

0

l

l

l

l

1

l

l

l

H

1

l

l

l

H

H

H

X

l

l

l

l

l

1

l

l

l

H

2

l

l

H

l

2

l

l

H

l

X

X

H

H

H

l

l

H

2

l

l

H

l

3

l

l

H

H

3

l

l

H

H

X

l

X

l

COUNT

3

L

L

H

H

X

4

l

H

l

l

4

l

H

l

l

l

l

X

COUNT

4

L

H

l

L

5

l

H

l

H

5

H

l

l

l

l

X

X

l

COUNT

5

L

H

l

H

6
7

l

H

H

l

H

l

l

X

l

X

COUNT

H

H

L

H

H

H

H

l

H

l

6
7

l

l

6
7

l

l

H

H

H

8

H

l

l

l

8

H

l

H

H

8

H

L

L

l

9

H

l

l

H

9

H

H

l

l

9

H

l

l

H

10

H

l
H

H

'293, 'LS293
RESET/COUNT FUNCTION TABLE
RESET INPUTS

NOTES:

A_ Output QA is connected to input B for BCD count_
B. Output QD is connected to input A for bi-quinary
count.
C. Output QA is connected to input B.
D. H = high level, L = low level, X = irrelevant

RO(lI
H

RO(21
H

OUTPUT
00

Oc

l

l

°B °A
l

l

l

H

11

H

L

H

12

H

H ' l

l

13

H

H

l

H

l

X

COUNT

14

H

H

H

L

X

l

COUNT

15

H

H

H

H

logic diagram.s
'290, 'LS290

'293, 'LS293

J

INPUT A .;..('_O.;.._ _ _+-__--<:t>

INPUT A

Q

....l.(.:..:'O~I-----w

C

......
...J

ns

70

i6

ns
DC

3-929

TYPES SN54290, SN54293, SN74290, SN74293
DECADE AND 4-BIT BINARY COUNTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

TEST CONDITIONSt

'290
MIN

TYP+

2

High·level output voltage

VOL

Low-level output voltage

II

Input current at maximum input voltage

IIH

High-level input current

Vec= MIN,

II = -12 mA

Vee = MIN,

VIH=2V,

VIL = 0_8 V,

10H = -800 I-'A

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

10L = 16 mA~

2.4

A input

MAX

0.2

V
V

-1.5

-1.5

V

2.4

3.4
0.2

0.4

V
0.4

1
40

40

Vee = MAX, VI = 2.4 V

80

80

120

80

-1.6

-1.6

Vee = MAX, VI = 0.4 V

B input

l

-3.2

-3.2

-4.8

-3.2

SN54'

-20

-57

-20

-57

-18

-57

-18

-57

Short-circuit output current§

Vee = MAX

ICC

Supply current

Vee = MAX, See Note 3

I

1

SN74'

lOS

29

UNIT

0.8

Vee = MAX, VI = 5.5 V

Any reset
A input

TYP+

0.8

3.4

B input
lJ:>w-level input current

MIN
2

Any reset

IlL

'293
MAX

42

26

39

V
mA
I-'A

mA

mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

II
-I
-I

+AII typical values are at Vee = 5 V, T A = 25°C.
§Not more than one output should be shorted at a time.
~OA outputs are tested at IOL = 16 mA plus the limit value of IlL for the B input. This permits driving the B input while maintaining full
fan-out capability.
NOTE 3: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5 V, and all other inputs
grounded.

switching characteristics, Vee

r-

PARAMETERO

C

m

f max

<
n
m

tPLH

TO

(INPUT)

(OUTPUT)

A
B
A

tPHL
tPLH

en

tpHL
tpLH

A

tpHL
tPLH
tpHL
tpHL
tpLH
tpHL

Of max
tpLH
tpH L
NOTE

3-930

'290

TEST CONDITIONS
MIN

TYP

QA

32

42

°B

16

QA
QD

B

RL=400n,

QB

See Note 4

'293
MAX

16

12

18
70

34

50

46

70

10

16

10

16

14

21

14

21

21

32

21

32

23

35

23

35

21

32

34

51

23

35

34

51

26

40

Any

26

40

QA,QD

20

30

QB,Qe

26

40

POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MHz
16

46

Set-to-O

-I!I

10

18

QD

TEXAS

42

48

B

INSTRUMENTS

32

UNIT
MAX

12

Qe

'" maximum count frequency
'" propagation delay time, low-to-high-Ievel output
'" propagation delay time, high-to-Iow-Ievel output
4: See General Information Section for load circuits and voltage waveforms_

TYP

32

B

Set-to-9

MIN
16

10

eL=15pF,

tPHL
tPLH

= 5 V, TA = 25°e

FROM

ns
ns
ns
ns
ns
ns
ns

TYPES SN54LS290, SN54LS293, SN74LS290, SN74LS293
DECADE AND 4-BIT BINARY COUNTERS
REVISED OCTOBER 1976

I

schematics of inputs and outputs
EQUIVALENT OF EACH RESET INPUT

EQUIVALENT OF A AND B INPUTS

TYPICAL OF ALL OUTPUTS
VCC

Vee
R1

V c e - - -.....- -

20

kn

R2

R3

NOM
INPUT

INPUT--~~~~~

L---4~ OUTPUT

INPUT
A
B ('LS290)
B ('LS293)

NOMINAL VALUES
R1
R2
R3
10 kn 10 kn 10 kn
6.7 kn 6.7 kn 5 kn
15 kn 15 kn 10 kn

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 5)
Input voltage: R inputs
A and B inputs
Operating free-air temperature range: SN54LS290, SN54LS293
SN74LS290,SN74LS293
Storage temperature range

en

NOTE 5: Voltage values are with respect to network ground terminal.

w
U

recommended operating conditions
SN74LS'

SN54LS'
MIN
Supply voltage, Vce
High-level output current, IOH

,

4.5

Pulse width, tw

5

MAX

MIN

5.5

4.75

-400

Low-level output current, IOL
Count frequency, fcount

NOM

0

32
16

16

15

B input

30

30

Reset inputs

30

30

Reset inactive-state setup time, tsu

25
-55

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

V
Il A
mA

0

0
15

0

..J

lI-

MHz

ns
ns

25
125

>
w
C

5.25

32

B input

UNIT

-400
0

A input

Operating free-air temperature, T A

5

MAX

8

4
A input

NOM

70

°e

3-931

TYPES SN54LS290, SN54LS293, SN74LS290, SN74LS293
DECADE AND 4-BIT BINARY COUNTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Low-level output voltage
Input current
at maximum

II

input voltage

MIN

Typf

SN74LS'
MAX

Any reset

Vee= MIN,

II = -18 mA

Vee= MIN,

VIH=2V,

VIL = VI L max,

IOH =-400/JA

Vee= MIN,

VIH = 2V,

2.5

IIOL =4

mA~

IIH

input current

B of 'LS290

V

-1.5

V

3.4

2.7

0.25

0.4

Low-level

A input
B of 'LS290

r-

0.25

0.4

0.35

0.5

0.1
0.2

0.2

Vee= MAX,

VI=5.5V

0.4

0.4

0.2

0.2

VI = 2.7 V

Vee = MAX,

Vee= MAX,

VI = 0.4 V

B of 'LS293

-I
-I

V

VI = 7V

20

20

40

40

80

80

40

40
-0.4

-2.4

-2.4

-3.2

-3.2

Short-circuit output current§ Vee = MAX

ICC

Supply current

-100

-20
See Note 3

Vee = MAX,

mA

/J A

mA

-1.6

-1.6

lOS

V

0.1

-0.4

B of 'LS293

input current

3.4

Vee= MAX,

Any reset
IlL

V

-1_5

B of 'LS293
A input

UNIT

0_8

A input
B of 'LS290

MAX

0_7

IIOL=8mA~

VIL = VIL max

Typf

2

Any reset
High-level

MIN

2

VOH High-level output voltage

VOL

SN54LS'

TEST eONDITloNst

-20

-100

I 'LS290

9

15

9

15

I'LS293

9

15

9

15

mA
mA

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
fAil typical values are at Vee = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
~aA outputs are tested at specified 10L plus the limit value of IlL for the B input. This permits driving the B Input while maintaining full
fan-out capability.
.
NOTE 3: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5 V, and all other Inputs
grounded.
.

switching characteristics, Vee = 5 V, T A = 25°e

C
m

PARAMETERO

:s
C')

f max

m

fA

tPLH

FROM

TO

(INPUT)

(OUTPUT)

tPLH

°A
°B

16

A

°A

A

tpLH
tpHL
tPLH
tPHL

00
CL

B

RL

°B

= . of,
= 2kQ,

See Note 4
B

°c

B

00

Set-to-O

tpHL
tpHL

42

B

tPHL
tpLH

TYP

32

tpHL
tPLH

MIN

A

tpHL

Set-to-9

'LS293

'LS290

TEST CONDITIONS

UNIT
MAX

TYP

32

42

MAX
MHz

16
10

16

10

12

18

12

18

32

48

46

70'

34

50

46

70

10

16

10

16

14

21

14

21

21

32

21

32

23

35

23

35
51

16

21

32

34

23

35

34

51

Any

26

40

26

40

°A,OO

20

30

°B,Oe

26

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

ns
ns
ns
ns
ns
ns
ns

40
---

O'max = maximum count frequency
tpLH = Propagation delay time, low-to-high-Ievel output
tpHL = Propagation delay time, high-to-Iow-Ievel output
NOTE 4: See Generallnformatlo~ Section for load circuits and voltage waveforms_

3-932

MIN

-

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY D1VIDERSIDIGITAL TIMERS
D2628.JANUARV 1981-REVISED DECEMBER 1983

SN54LS292 ... J OR W PACKAGE
SN74LS292 ..• J OR N PACKAGE

• Count Divider Chain
2n

Digitally Programmable from 22 to
(n = 31 for 'LS292, n = 15 for 'LS294)

'-;:OPVIEW)

8

• Useable Frequency Range from DC to 30 MHz

VCC
C
D
TP 3
NC
ClR
A
NC

E
TP 1
ClK 1
ClK2
TP2

• Easily Expandable
• Applications
• Frequency Division
• Digitalliming

Q

GND

description
These programmable frequency dividers/digital timers
contain 31 flip-flops plus 30 gates ('lS292) or 15 flipflops plus 29 gates I'lS294) on a single chip. The count
modulo is under digital control of the inputs provided.
80th types feature an active-low clear input to initialize
the state of all flip-flops. To facilitate incoming inspection, test points are provided (TP1, TP2, and TP3 on the
'lS292 and TP on the 'lS2941. These test points are not
intended to drive system loads. 80th types feature two
clock inputs; either one may be used for clock gating.
(See the function table below.)
A brief look at the digital timing capabilities of the
'lS292 will show that with a 1-MHz input frequency,
programming for 21 0 will give a period of 1.024 ms, and
2 2 0 will give a period of 1 .05 sec, 226 will give a period
of 1.12 min, and 2 31 will give a p~riod of 35.79 min.
These devices are easily cascadable giving limitless
possibilities to timing delays that can be achieved.
FUNCTION TABLE

CLEAR

ClK 1

ClK2

a OUTPUT MODE

L

X

X

Cleared to L

H

t

Count

H

L

L
t

H

H

X

Inhibit

H

X

H

Inhibit

SN54LS292 ... FK PACKAGE
SN74LS292 ... FN PACKAGE
(TOP VIEW)
U

U

U

WalZ>U
D
TP 3
NC
NC
ClR

TP 1
ClK 1
NC
ClK2
TP2

OOUU«
ZZZ
C,!)

SN54LS294 ... J OR W PACKAGE
SN74LS294 ... J OR N PACKAGE
(TOP VIEW)

(J)

VCC
C
D
NC
NC
ClR
NC
NC

8
A
TP
ClK 1
ClK2
NC
Q

GND

w
U

>
w

C

....I

SN54LS294 ... FK PACKAGE
SN74LS294 ... FN PACKAGE
(TOP VIEW)

Count

U

lI-

U
U

«alZ>U

o

TP
ClK 1
NC
ClK2
NC

NC
NC
NC

OOUUU
ZZZZ
C,!)

NC - No interna I connection.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~n~:::s~~[r:r~:iu:~Ot~~~~~~nof~~f:~~~"':e~~~s~

TExAS •

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-933

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERS/DIGITAL TIMERS
schematics of inputs and outputs
TYPICAL
OF Q -OUTPUTS
_...- -

EQUIVALENT OF EACH INPUT

TYPICAL OF TP OUTPUTS

- -....-VCC

Vcc---...- -

.
INPUT -~......-

OUTPUT

-~

. .OUTPUT

eLK: Req = 10 kn NOM
All others: Req = 20 kn NOM

operation
The functional block diagram shows that the count modulo is controlled by an XIV decoder connected to the mode control inputs of several flip-flops. These flip flops with mode controls each have a "0" input connected to the parallel clock line and a
"T" input driven by the preceding stage. The parallel clock frequency is always the input frequency divided by four.
The XIV decoder output selected by the programming inputs goes low. While a mode control is low, the "0" input of that
flip-flop is enabled, and the signal from the parallel clock line (fin -:- 4) is passed to the "T" input of the following stage. All the
other mode controls are high enabling the "T" inputs and causing each flip-flop in turn to divide by two.

II

PARALLEL CLOCK

---t
---t

---_to, . . . . . - - - ACTlVE·LOW CLEAR

rC

20

m

OUTPUT OF
PRECEDING
STAGE -

<

om

....-aDo 2T

FROM
.
X/V
CODER

en

R.
TO TOGGLE
INPUT OF
NEXT STAGE

M2

logic symbols
'LS292

TP1

[fi]

TP2
TP3

O}[n] fr

~ fi~
fO -

4

iii

Q

Pin numbers shown on logic notation are for J or N packages.

3-934

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

[TP]

[fil

(3)

TP

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERS/DIGITAL TIMERS
logic diagram (positive logic)
'LS292
(11)

ClK1

.-.

~!!
R

R

f>TCI=>T

ClK2 (5)

x/v

.U ~

r-k:,.,

c

(

20 R
R
T
C >2TC f:>T
0....- M2
C

28~

:>

(

')

C~

>

CI=>

26 .....
24 ~

r

C>

TP1

T

T6 6

20 R

R

')

L(l 1=>2TC ;:>T
22 "'"

:>

Cp cl=>

M2

')

C

20 "'"
18 .....

,.!.12l.

~

::::.

C~~.TP2

C :>

16 "-

A

BJ.!l. I--

2

c..!..lli '--

4

u

R

:>

(

(

-ot>2TC >T
~

16

14 ....

C>

M2

II
en
w

16 6

20 R

Dill! ~8

EJ&

C

-(

C> 0>

r.

~D~

0~

12 "10 "8

Cp2T

TP3

~

...

:>w

C

...J

lI-

T

+L
20

L..(; ~T
6
4
2

:>

(
R

~ ;:>2TC >T C
M2

(

~

C ;:>

:>
20 R

()
S

3D

O~2T~ >3T
~

~a

~
Pin numbers shown on logic notation are for J or N packages.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-935

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERSIDIGITAL TIMERS

logic diagram (positive logic)
'LS294

-I
-I
r

c

(151,

4

o

(141

8

7D-------4

C

6D--------~

m

5D-------------4

<

4~----------------~

(")

3~------------------------_i

m

en

Pin numbers shown on logic notation are for J or N packages,

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Operating free-air temperature range: SN54LS292, SN54LS294 . . . . . . . . . . . . . . . . . . . . . . .. -55°e to 125°e
SN74LS29~SN74LS294 . . . . . . . . . . . . . . . . . . . . . . . . . . . 00et070oe
Storage temperature range . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65°e to 150° e
NOTE 1: Voltage values are with respect to network ground terminal.

3-936

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERS/DIGITAL TIMERS
recommended operating conditions
SN54LS'
VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

SN74LS'

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

2

2

V

IOH

High-level output current (Q only)

-1.2

-1.2

IOL

Low-level output current (Q only)

12

24

mA

fclock

Clock frequency

30

MHz

30

0

tw

Duration of clock input pulse

tw

Duration of clear pulse

tsu
TA

Clear inactive-state setup time
Operating free-air temperature

-55

0

16

16

I 'LS292

55

55

I 'LS294

35

35

15

15
125

mA

ns
ns

0

70

ns
DC

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Vee

VIH
VOH

TEST CONDITIONSt

Q

=

MIN,

Vec - MIN,

Q

TP+

VIH-2V,

VIH=2V,

I IOL = 24 mA

VCC = MAX,

VI-7 V
VI=2.7V

V
Vec = MAX,

VI=0.4V

Ice

All others
Q

Vec = MAX

'LS292

VCC = MAX,

'LS294

All outputs open

MIN

TYP

2.4

2.4

3.4
0.25

0.4

0.4

0.35

0.5

0.25

0.4

0.1

0.1

20

20

-0.8

-0.8

All inputs grounded,

t

-130

-0.4
-30

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

-130

40

75

40

75

30

50

30

50

For conditions shown as MI N or MAX, use the appropriate value' specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25°C.
§ The duration of the short-circuit should not exceed One second.
• The TP output or outputs are not intended to drive external loads but are solely provided for test points.

UNIT
V
V

3.4
0.25

·-0.4
-30

MAX
-1.5

I IOL = 0.5 mA

VIL = MAX
VCC = MAX,

IlL

IOH - -1.2 mA,
IIOL=12mA

II

IOS§

SN74LS'
MAX
-1.5

VCC= MIN,

IIH
CLK1,CLK2

TYP

11= -18 mA

VIL = MAX

VOL

SN54LS'
MIN

V
mA
IlA
mA

en

mA

u

mA

w

:>w
C

...I

lI-

3-937

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERSIDIGITAL TIMERS
switching characteristics, Vee = 5 V, TA

= 25°e, RL = 667 n, CL =45 pF, (see note 2)
'LS292

FROM

TO

(INPUT)

(OUTPUT)

CLK1 or 2

Q

PARAMETER

'LS294
UNIT

TEST CONDITIONS

f max

tpLH

30

50

Q

CLR

tPHL

TYP

Modulo set at 22,
A thru E = LLLHL ('LS292)
A thru D = LLHL ('LS294)

Q

tpHL

MIN

MAX

MIN

TYP

30

50

MAX
MHz

55

90

55

90

ns

80

120

80

120

ns

85

130

35

65

ns

fMAX = maximum clock frequency
tpLH = Propagation delay time, low-to-high-Ievel output
tpHL = Propagation delay time, high-to-Iow-Ievel output
NOTE 2: See General Information Section for load circuits and voltage waveforms.
To be used on TP outputs only.

'LS292 FUNCTION TABLE
FREQUENCY DIVISION

PROGRAMMING
Q

INPUTS

II
-I
-I

r-

C

m

:5
nm
en

3-938

BINARY

DECIMAL

D

C

B

A

BINARY

L

L

L

L

L

Inhibit

Inhibit

Inhibit

Inhibit

Inhibit

Inhibit

Inhibit

L

L

L

L

H

Inhibit

L

H

L

512

Inhibit
217

Inhibit

L

Inhibit
29

Inhibit

L

131,072

Inhibit
224

16,777,216-

L

L

L

H

H

Inhibit
22
23

217

131,072

224

16,777,216

L

H

L

L

29
29

512

L

512

217

131,072

224

16,777,216

L

L

H

L

H

512

217

131,072

224

16,777,216

L

L

H

H

L

29
29

512

217

131,072

224

16,777,216

L

L

H

H

H

512

217

131,072

224

16,777,216

L

H

L

L

L

29
29

512

217

131,072

22

L

H

L

L

H

217

131,072

22

4

H

L

H

L

29
29

512

L

29
210

512

217

131,072

24

16

29
29

512

217

131,072

512

217

131,072

64

512

217

131,072

~
26
26

~
25

26
27
28

4
8
16
32
64
128
256
512
1,024

DECIMAL

BINARY

E

DECIMAL

BINARY

TP3

TP2

TPl

L

H

L

H

H

211

2,048

L

H

H

L

L

4,096

L

H

H

L

H

212
2 13

L

H

H

H

L

214

16,384

L

H

H

H

H

29

512

L

L

L

L

2 15
2 16

32,768

H

65,536

29
29

512

29
29

512

29
29

8,192

H

L

L

L

H

217

131,072

H

L

L

H

L

262,144
524,288
1,048,576

H

L

L

H

H

218
2 19

H

L

H

L

L

220

H

L

H

L

H

221

2,097,152

H

L

H

H

L

222

4,194,304

H

L

H

H

H

223

8,388,608

H

H

L

L

L

224

16,777,216

29
29

512

DECIMAL

28
28

Disabled Low
Disabled Low

I

Inhibit
Inhibit

4

16·
64
256
256
1,024

8

2 10
2 10

32

212

4,096

23
23

8

512

25
25

32

212

4,096

512

27

128

214

16,384

512

27

128

214

16,384

29
29

512

2 16
2 16

65,536
262,144
1,048,576

512

Disabled Low
Disabled Low

512

1,024

65,536

23
23

8
8

211

2,048

2 18
2 18

32

2 13
2 13

8,192

220

8,192

220

1,048,576

32,768

222

4,194,304

H

H

L

L

H

225

33,554,432

H

H

L

H

L

226

67,108,864

H

H

L

H

H

227

134,217,728

25
25

H

H

H

L

L

228

268,435,456

27

128

32

211

2,048

262,144

H

H

H

L

H

229

536,870,912

128

32,768

222

H

H

H

H

L

1,073,741,824

512

217

131,072

224

16,777,216

H

H

H

H

H

230
231

27
29

2 15
2 15

2,147,483,648

29

512

217

131,072

224

16,777,216

TEXAS

"-!}

INSTRUMENlS
POST OFFICE BOX 225012 •

DALLAS, TEXAS 75265

4,194,304,

TYPES SN54LS292, SN54LS294, SN74LS292, SN74LS294
PROGRAMMABLE FREQUENCY DIVIDERSIDIGITAL TIMERS

'LS294 FUNCTION TABLE
FREQUENCY DIVISION
Q

PROGRAMMING INPUTS

TP

A

BINARY-

DECIMAL

BINARY

L

L

Inhibit

Inhibit

Inhibit

Inhibit

L

H

Inhibit
22

Inhibit

Inhibit
29

Inhibit

DECIMAL

D

C

B

L

L

L

L

L

L

H

L

L

L

H

H

L

H

L

L

L

H

L

H

25

32

29

512

L

H

H

L

26
27
28

64

29

512

L

H

H

H

H

L

L

L

H

L

L

H

H

L

H

L

4

23
24

8
16

128
256

29
2 10

512
1,024

H

L

H

H

211

2,048

H

H

L

L

212

4,096

H

H

L

H

8,192

H

H

H

L

H

H

H

H

2 13
214
2 15

512

29
29

512
512

Disabled Low
22
23

4

~
25

16

8
32

16,384

26
27
28

256

32,768

29

512

64
128

switching loads

FROM OUTPUT
UNDER TEST

en
w
U

>
w

FIGURE 1

C

'LS292 and 'LS294 timing diagram

-I

lI-

CLR~

CLK1

L
~

____________

~r-

CLK2------------------------------------~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-939

TYPES SN54LS295B, SN74LS295B
4-BIT RIGHT-SHIFT LEFT-SHIFT REGISTERS
WITH 3-STATE OUTPUTS
OCTOBER 1976-REVISED DECEMBER 1983

SN54LS295B ... J OR W PACKAGE
SN74LS295B ... D. J OR N PACKAGE

• 'LS295B Offers Three limes the
Sink-Current Capability of 'LS295A

(TOPVIEWI

• Schottky-Diode-Clamped Transistors
SER

• Low Power Dissipation ... 80 mW Typical,
(Enabled)

1

VCC

OA
08
C
D

• Applications:
N-Bit Serial-To-Parallel Converter
N-Bit Parallel-To-Serial Converter
N-Bit Storage Register

Oc
9

aD
ClK

GND

description
These 4-bit registers feature parallel inputs, parallel outputs. and clock (ClK). serial (SER), mode (lD/SH).
and outputs control (OC) inputs. The registers have
three modes of operation:
Parallel (broadside) load
Shift right (the direction OA toward aD)
Shift left (the direction aD toward 0A)

rC

m

<

(")

m

(J)

(TOPVIEWI

3

Parallel loading is accomplished by applying the four bits
of data and taking. the mode control input high. The data
is loaded into the associated flip-flops and appears at the
outputs after the high-to-Iow transition of the clock input. During parallel loading. the entry of serial data is
inhibited.

-I
-I

SN54LS295B ... FK PACKAGE
SN74LS295B ... FN PACKAGE

Shift right is accomplished when the mode control is
low; shift left is accomplished when the mode control is
high by connecting the output of each flip-flop to the
parallel input of the previous flip-flop (OD to input C,
etc.) and serial data is entered at input D.

1

4

NC
C
NC

5

6

Oc

7

NC

D

8

aD

NC - No internal connection

When the output control is high, the normal logic levels
of the four outputs are available for driving the loads or
bus lines. The outputs are disabled independently from
the level of the clock by a low logic level at the output
control input. The outputs then present a high impedance and neither load nor drive the bus line;
however. sequential operation of the registers is not
affected. ,
The SN54lS2958 is characterized for operation over
the full military temperature range of - 55°C to 125°C;
the SN74lS2958 is characterized for operation from
OOC to 70°C.

3-940

2

8

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

08
NC

TYPES SN54LS295B, SN74LS295B
4-BIT RIGHT-SHIFT LEFT-SHIFT REGISTERS
WITH 3-STATE OUTPUTS
logic diagram
DATA INPUTS

/r--A~----------B--~A~-----C-----------D~

rn

W

W

~

Pin numbers shown on logic notation are for D. J or N packages.

schematics of inputs and outputs
EQUIVALENT OF SERIAL
AND DATA INPUTS

EQUIVALENT OF ClK,
lD/SH,AND
OCINPUTS

TYPICAL OF All OUTPUTS

-----Vee
Vee---+---

Vee

INPUT

---+------

en

~12oknNoM

'oJ""I

w

U

--

OUTPUT

>
w

C

..oJ

lI-

r.
Serial: Req
A, B, C, 0: Req

= 30 kn. NOM
= 20 kn. NOM

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS,TEXAS 75265

3-941

TYPES SN54LS295B, SN74LS295B
4-BIT RIGHT-SHIFT LEFT-SHIFT REGISTERS
WITH 3-STATE OUTPUTS
FUNCTION TABLE
INPUTS
lO/SH

ClK

SER

H

H

X

OUTPUTS
PARAllEL
B

C

0

°A

°B

°c

X

X

X

X

b

c

d

°AO
a

aBO
b

OCO 000
c
d

H

~

X

a

H

~

X

l

H

X

°Bt
X

l

~

H

l

~

l

When the output control is low.

t~e

00

A

d

d
°Bn °Cn OOn
°AO aBO OCO 000
X
H
X
X
X
°An OBn °Cn
X
l
X
X
X
OAn °Bn °Cn
outputs are disabled to the high-impedance state;
act Oot
X

X

X

however. sequential operation of the registers is not affected_
tShifting left requires external connection of 0B to A. 0e to B. and 00 to C_ Serial datil is
entered at input O.
H = high level (steady state). L = low level (steady state). X = irrelevant (any input. including transitions)
~ = transition from high to low level.
a. b. c. d = the level of steady-state input at inputs A. B. e. or O. respectively.
0AO. 0BO. Ceo. 000 = the level of 0A. 0B. 0e. or 00. respectively. before the indicated steady-state input conditions were established_
0A.n. 0Bn. 0en. 00n = the level of 0A. 0B. 0e. or 00. respectively. before the most-recent ~ transition of the clock.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...... .
Input voltage . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS2958
SN74LS2958
Storage temperature range

II
--I
--I
r-

C
m

7V
7V

_55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54lS295B

$

nm

en

VCC

Supply voltage

IOH

High-level output current

IOl

low-level output current

fclock

Clock frequency

SN74lS295B

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-2.6

rnA

-1
12
0

30

0

24

rnA

30

MHz

tw(clock)

Width of ciock puise

16

16

ns

tsu

Setup, time. high-level or low-level data

20

20

ns

high-level

25

25

low-level

30

30

5

5

I
I

tsu

Setup time, LO/SH to ClK

th

Hold time, high-level or low-level data

th

Hold time. high-level or low-level lO/SH to ClK

TA

Operating free-air temperature

3-942

0
-55

TEXAS

-Ill

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

ns
ns

0
125

0

70

ns
°c

TYPES SN54LS295B, SN74LS295B
4-BIT RIGHT-SHIFT LEFT--SHIFT REGISTERS
WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER
VIH
VIL
VIK

High-level input voltage
Low-level input voltage
Input clamp voltage

II = -18 mA
Vce = MIN,
Vee = MIN,
VIH=2V,
VIL = VIL max, 10H = MAX
Vee = MIN,
VIH=2V,

VOH High-level output voltage
VOL Low-level output voltage
Off-state output current,
10ZH high-level voltage applied
10ZL
II

Off-state outpuJ current,
low-level voltage applied

VIL = VIL max
Vee = MAX,

VIL = VIL max,

VO=2.7V
Vee = MAX,

VIH=2V,

SN54LS295B
MIN
2

TYP+ MAX
0.7
-1.5

2.4
~OL=12mA

3.4

maximum input voltage

2.4

0.25

0.4

IIOL = 24 mA

VO= 0.4 V

Input current at

SN74LS295B
UNIT
MIN TYP+ MAX
2
V
V
0.8
V
-1.5

Vee = MAX,

VI =7V

V

3.1
0.25

0.4

0.35

0.5

V

20

20

~A

-20

..,..20

~A

0.1

0.1

mA

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

~A

IlL

Low-level input current

Vee = MAX,

VI - 0.4 V

-0.4

-0.4

mA

lOS

Short-circuit output current §

Vee = MAX

ICC

Vee = MAX,

--'130
29

mA

Supply current

--'30
See Note 2

ICondition A
ICondition B

20
22

-130
29
33

-30
20
22

33

mA

tFor conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at V CC = 5 V, T A = 25° C.
§ Not more than one output should be shorted at a time,and duration of the short-circuit should not exceed one second.

NOTE 2: ICC is measured with the outputs open, the serial input and mode control at 4.5 V, and the data inputs grounded under the following
conditions:
.
A. Output control at 4.5 V and a momentary 3 V, then ground, applied to clock input.
B. Output control and clock input grounded.

switching characteristics, Vee

= 5 V, T A = 25 C, RL = 667 .n

en

TEST CONDITIONS

PARAMETER

II

f max Maximum clock frequency
tpLH Propagation delay time, low-to-high-Ievel output

eL = 45 pF,
See Note 3

tpHL Propagation delay time, high-to-Iow-Ievel output
tpZH Output enable time to high level
tpZL Output enable time to low level

eL - 5pF,

tpHZ Output disable time from high level

See Note 3

tpLZ Output disable time from low level

MAX UNIT

MIN

TVP

30

45
14

20

19

30

ns
ns

18
20

.26

os

30

ns

13
13

20
20

ns

MHz

ns

w

()

;>
W

C

-'

I-

....

-

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TeXAS 75265

3-943

II
~
~

rC

m

<

n

m

en

3-944

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED -LOOP FILTERS
02629, JANUARY 1981

SN54LS297 ..• J OR W PACKAGE
SN74LS297 ••. J OR N PACKAGE

• Digital Design Avoids Analog
Compensation Errors

ITOPVIEWI

• Easily Cascadable for Higher Order Loops

B
A
ENCTR
K ClK
liD ClK

• Useful Frequency from DC to:
50 MHz Typical (K Clock)
35 MHz Typical (I/O Clock)
description

VCC
C
D
(lJA2
ECPD OUT
XORPD OUT
(lJB
(lJA1

DIU
liD OUT

The SN54lS297 and SN74lS297 devices are designed
to provide a simple, cost-effective solution to highaccuracy, digital, phase-locked-loop applications. These
devices contain all the necessary circuits, with the exception of the divide-by-N counter, to build first order
phase-locked loops as described in Figure 1.

GND

SN54LS297 .•• FK PACKAGE
SN74LS297 .•. FN PACKAGE

ITOPVIEWI
U

Both exclusive-OR (XORPD) and edge-controlled
(ECPD) phase detectors are provided for maximum
flexibility.

U
U

«C02>U
D
(lJA2
NC
ECPD OUT
XORPD OUT

Proper partitioning of the loop function, with many of
the building blocks external to the package, makes it
easy for the designer to incorporate ripple cancellation or
to cascade to higher order phase-locked loops.

The length of the up/down K counter is digitally programmable according to the K counter function table.
With A, B, C, and D all low, the K counter is disabled.
NC·No internal connection
With A high and B, C, and D low, the K counter is only
three stages long, which widens the bandwidth or capture range and shortens the lock time of the loop. When A, B, C, and D
are all programmed high, the K counter becomes seventeen stages long, which narrows the bandwidth or capture range and
lengthens the lock time. Real-time control of loop bandwidth by manipulating the A through D inputs can maximize the overall
performance of the digital phase-locked loop.

en
w

()

>
W

MODULO CONTROLS

~
D
C
B "A

C

..J
K·COUNTER
CLOCK
DOWN/UP CONTROL
K·COUNTER
ENABLE

~
~

14)
:6)

131

(5)

(7)

I/O CLOCK

H,.......---I/D OUTPUT
(9)

PHASE Al

(10)

PHASE B
(13)

PHASE A2

FIGURE 1-.SIMPLIFIED BLOCK DIAGRAM
PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s':a~rl~~liu:~'te:~~:nor~~f:~~~~e~::s~

TEXAS

"'11

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-945

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED-LOOP FILTERS
description (continued)
The 'LS297 can perform the classic first-order phase-locked loop function without using analog components. The accuracy
of the digital phase-locked loop (OPLL) is not affected by VCC and temperature variations, but depends solely on accuracies
of the K clock, I/O clock, and loop propagation delays. The I/O clock frequency and the divide-by-N modulos will determine
, the center frequency of the OPLL. The center frequency is defined by the relationship fc
I/O Clock/2N (Hz).

=

logic ~iagram
r--------------------KcOumR---------------~

XfY

KClK~(4~)~~------~~----_,
0/U.:,:(6::.,)--II--__-cr~

II

,-------

lID ClK(5)
~-f--I

-----------------------~~~~---lID ciRCUIT

I

~---,~~)O-...,...--'(7'"'") lID OUT

I

-I
-I
r-

I
I
I
I
I
I
I
I

C

m

S

(")

m

I
I
I

rn

r--------------Ex~~~oo~~~mToR----------1

¢Al (9)

I
I

(11)XORPO

>-----------------------------------------------~~~OUT

¢B

(10)

-------------roOCw~DL~PHAs~rn~~---------i

I
I
I
I

¢A2~(1~3)_;----;_~~----~

IL

___________________________________

Pin numbers shown on logic notation are for J or N packages.

3-946

'TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

I

~

(12) ECPO
OUT

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED-LOOP FILTERS
FUNCTION TABLE

K COUNTER FUNCTION TABLE

EXCLUSIVE-OR PH:4SE DETECTOR

(DIGITAL CONTROL)

XORPDOUT

0

C

B

A

MODULO (K)

cPA 1

B

L

L

L

L

L

L

L

L

L

L

H

Inhibited
23

L

H

H

H

·L

H

H

H

L

L

L

H

L

L

L

H

H

24
25

L

H

L

L

26

L

H

L

H

27

L

H

H

L

28

L

H

H

H

¢A2

B

H

L

L

L

29
2 10

H or L

~

H

L

L

H

211

~

H or L

L

H

L

H

L

H or L

t

No change

H

L

H

H

212
2 13

t

H or L

No change

H

H

L

L

214

H

H

L

H

H

H

H

L

2 15
2 16

H

H

H

H

217

FUNCTION TABLE
EDGE-CONTROLLED PHASE DETECTOR

H
L

= ·steady-state

ECPD OUT
H

high level

= steady-state low level
~ = transition from high to low
t = transition from low to high

schematics of inputs and outputs
EaUIVALENT OF EACH INPUT

TYPICAL OF I/O OUTPUT

Vee---.---

- - - - - - ' t - - - Vee
100 nNOM

TYPICALOF
ECPD AND XORPD OUTPUTS
-----~~--Vee

120nNOM

...--+-

I NPUT_.-:-t__

'-I~""'--

OUTPUT

'-IliM'-o---- 0 UTP UT

(J)

W

U

A, B,

e,

>
w

D, ¢A2: Req = 20 kn NOM
¢S: Req = 6 kn NOM

C

All others: Req = 10 knNOM

..J

operation
The phase detector generates an error signal waveform that, at zero phase error, is a 50% duty cycle square wave_ At
the limits of linear operation, the phase detector output will be either high or low all of the time, depending on the
direction of the phase error (¢in - ¢out) _ Within these limits, the phase detector output varies linearly with the input
phase error according to the gain kd' which is expressed in terms of phase detector output per cycle of phase error_
The phase detector output can be defined to vary between ±1 according to the relation:
PO Output

% high - % low

lI-

(1)

100
The ou~put of the phase detector will be kd ¢e. where the phase error ¢e = ¢in - ¢out-

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-947

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED-LOOP FILTERS
Exclusive-OR phase detectors (XORPO) and edge-controlled phase detectors (ECPO) are commonly used di9ital types_
The ECPO is more complex than the XORPO logic function, but can be described generally as a circuit that changes
states on one of the transitions of its inputs_ kd for an XORPO is 4 because its output remains high (PO output = 1)
for a phase error' of 1/4 cycle. Similarly, kd for the ECPO is 2 since its output remains high for a phase error of 1/2
cycle. The type of phase detector will determine the zero-phase-error point, i.e., the phase separation of the phase
detector inputs for CPe defined to be zero. For the basic OPlL system of Figure 2, CPe = 0 when the phase detector
output is a square wave. The XORPO inputs are 1/4 cycle out of phase for zero phase error. For the ECPO, CPe = 0
when the inputs are 1/2 cycle out of phase.

r - -----------------,
NHc _ _ _ _ _ _ _+K_C_L_K
_ _1>
DIVIDE-BV-N
COUNTER

CARRV

I

BORROW

I
I
I
I

fin. e Mf cl/2KN
If this result is compared to the equation for a first-order analog phase-locked loop. the digital equivalent of the gain
of the VCO isjust Mfc/2KN or fc/K for M = 2N.
Thus the simple first-order phase-locked loop with an adjustable K counter is the equivalent of an analog phase-locked
loop with a programmable VCO gain.

3-948

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED-LOOP FILTERS

r------------------.

~C--------~'-K-C-L-K---{>
, DIU

I ENCTR
I

I

CARRY

I
I

DIVIDE-BY-K
COUNTER

BORROW

XORPD OUT

:

I
I
I

fout, ¢Out -~I----~~-"'---,H

I
I
G--'--t--

fin, cAn -------+---;---oD

2Nfc

'-----_.....

FIGURE 3-DPLL USING BOTH PHASE DETECTORS IN A RIPPLE-CANCELLATION SCHEME

absolute maximum rating over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ________________ . ___ .... > • • • • • " • _ • • • • • • • • _ • _ • • • ___ • • • • • •

_ •••••

7V

Input voltage ................................................................................ 7 V
Operating free-air temperature range: SN54LS297 ....................................... - 55° e to 125° e
SN74LS297 .................... __ .... _ ................ DoC to 70°C
Storage temperature range ........................................ _ . _ ............... - 65° e to 150° e
NOTE 1: Voltage values are with respect to network ground terminal.

en
w

recommended operating conditions

(.)

SN54LS297
VCC

Supply voltage

IOH

High-level output current

IOL

Low-level output current

fclock

Clock frequency

11

MIN

NOM

4.5

5

SN74LS297

MAX

MIN

NOM

5.5

4.75

5

MAX

UNIT

:>w

5.25

V

C

110 OUT

- 1.2

- 1.2

mA

...J

EXOR, ECPD

-400

-400

/JA

12

24

mA

I/O OUT
XOR, ECPO

8

mA

0

32

MHz

0

16

MHz

4

K Clock
I/O Clock

0

32

0

16

K Clock

16

16

ns

I/O Clock

33

33

ns
ns

tw

Width of clock input pulse

tsu, to K

Setup time to K Clock t

UfO, ENCTR

30

30

th

Hold time from K Clock t

UfO, ENCTR

0

0

TA

Operating free·air temperature

-55

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

125

0

....
....

ns
70

°c

3-949

TYPES SN54LS297, SN74LS297
DIGITAL PHASE-LOCKED-LOOP FILTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

Vil

low-level input voltage

VIK

Input clamp voltage

VCC

High-level

I/O OUT

Vec = MIN.

output voltage

Others

Vil = Vil max

VOH

= MIN,

TYP:j:

SN74lS297

MAX

VIH

= 2 V.

Others

V IL = V IL max

MAX

V

-1.5

V

IOH - MAX

2.5

2.7
0.4

V
0.25

IOl = 24 mA
0.25

V

-1.5
2.4
0.25

UNIT

O.S

2.4

IOl =4 mA

TYP:j:

0.7
IOH = MAX
IOl=12mA
V IH = 2 V,

MIN
2

11=-1SmA

VCC = MIN,

output voltage

MIN
2

I/O OUT

low-level
VOL

SN54lS297

TEST eONDITIONst

0.4

IOl ~ SmA

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V

Input current at
II

maximum input

VCC

=MAX,

0.1

VI = 7 V

0.1

mA

voltage
High-level
IIH

input current
low-level

IlL

lOS

II
-I
-I

r-

C

m

ICC

input current

ufO,

EN, c/>A1
VCC = MAX,

S

VI = 2.7 V

All others

Iu/o, EN, c/>A1
B
All others

Short~ircuit
I/O OUT
output current § Others

Vec

= MAX,

VI =0.4 V

VI =0.4 V
Vce = MAX

SupplV current

All oUtputs open

"0' '0","'00' ,'owo'; M'N 0' MAX,"" " . "",0,,,.....,".

20

20

-O.S
-1.2

-O.S
-1.2

-0.4

-0.4

-130

-30

-130

-20

-100

-20

-100

,,~'"'' '~omm'"'"

switching characteristics, Vee
PARAMETERlI

""'"'

75

75

120

120

J1A

mA

mA
mA

0,",''''"' '00""0"'

=5 V, TA = 25°e

FROM (INPUT)

TO (OUTPUT)

KCLK

I/O OUT

f max

I/O CLK

I/O OUT

(")

tpLH

I/O CLK t

I/O OUT

tpHl

I/O ClK t

I/O OUT

~

60

:j:AII typical values are of Vee = 5 V, TA = 25°e.
§ Not more than one output should be shorted at a time and the duration of the short-circuit should not exceed one second.

<

m

40

60

-30
All inputs grounded,

Vce = MAX.

40

tPlH
tpHL

c/>A1orc/>B

Other input low

XOR OUT

c/>A1orc/>B

Other input high

XOR OUT

c/>A1orc/>B

Other input low

XOR OUT

c/>A1orc/>B

Other input high

TEST CONDITIONS
RL=667n,
CL = 45 pF,
See Note 2

Rl=

2 kn,

MIN

TYP

32

50

16

35

MAX

UNIT
MHz

15

25

ns

22

35

ns

10

15

17

25

15

25

ns
ns

XOR OUT

Cl=45pF,

17

25

tPlH

B ~

ECPD OUT

See Note 2

20

30

ns

tPHL

c/>A2i

ECPD OUT

20

30

ns

11 tpLH = propagation delay time, low-to-high level output
tpHL

= propagation delay time, high-to-Iow level output

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-950

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54298, SN54LS298, SN74298, SN74LS298
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
MARCH 1974 - REVISED DECEMBER 1983

•

•

SN54298. SN54LS298 ... J OR W PACKAGE
SN74298 ... J OR N PACKAGE
SN74LS298 ... D. J OR N PACKAGE

Selects One of Two 4-Bit Data Sources
and Stores Data Synchronously with
System Clock

(TOP VIEW)

Applications:
Dual Source for Operands and Constants
in Arithmetic Processor; Can Release
Processor Register Files for Acquiring New
Data

B2
A2
A1
B1
C2
D2
D1
GND

Implement Separate Registers Capable of
Parallel Exchange of Contents Yet Retain
External Load Capability
Universal Type Register for Implementing
Various Shift Patterns; Even Has Compound
Left-Right Capabilities

VCC
OA
OB
Oc
OD
ClK
WS
C1

SN54LS298 ... FK PACKAGE
SN74LS298 ... FN PACKAGE
(TOP VIEW)
U

descri ption

~l;:j~~ot

These monolithic quadruple two-input multiplexers
with storage provide essentially the equivalent
functional capabilities of two separate MSI functions
(SN54157/SN74157 or SN54LS157 /SN74LS157 and
SN54175/SN74175 or SN54LS175/SN74LS175) in a
single 16-pin package.

A1
B1
NC
C2
D2

OB
Oc
NC

°D
ClK

II

When the word-select input is low, word 1 (A1, B1,
C1, D 1) is applies to the flip-flops. A high input to
word select will cause the selection of word 2 (A2,
82, C2, 02). The selected word is clocked to the
output terminals on the negative-going edge of the
clock pulse.

en
w

NC - No internal connection

U

FUNCTION TABLE
INPUTS

Typical power dissipation is 195 milliwatts for the
'298 and 65 milliwatts for the 'LS298. SN54298
and SN54LS298 are characterized for operation over
the full military temperature range of -55°C to
125°C; SN74298 and SN74LS298 are characterized
for operation from O°C to 70°C.

WORD
SELECT

>
w

OUTPUTS

CLOCK

L

~

H

~

X

H

QA

QB

Qc

QD

C

a1
a2

b1
b2

c1
c2

d1
d2

..J

QAO QBO Qeo QOO

....

....

H = high level (steady state)
L = low level (steady state)
X = irrelevant (any input. including transitions)
~ = transition from high to low level
a1. a2. etc. = the level of steady-state input at A 1. A2. etc.
0AO. 0BO. etc. = the level of 0A. 0B. etc. entered on the
most·recent ~ transition of the clock input.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~nnd:::s:~rl;ar~liu:~Ot~~~l~~nof~~I~~~~~e~::s~

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-951

TYPES SN54298, SN54LS298, SN74298, SN74LS298
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
logic diagram

(4)
B1----------~~~

(1)
B2----------~~-J

(9)
C1----------~~~

(5)
C2----------~~-J

(7)
01----------~~~

QD
(6)
02--------------L-~

(11)
CLOCK------------------~>_--------~

II

Pin numbers shown on logic notation are for D, J or N packages

schematics of inputs and outputs
'298

p----------------------

EQUIVALENT OF EACH INPUT

-I
-I
rC

TYPICAL OF ALL OUTPUTS

- __-Vee

Vee--..-100

n

NOM

INPUT

m
~
(")
m

OUTPUT

CJ>

Clock: Req = 4 kn NOM
All other inputs: Req = 6 kn NOM

'LS298
EQUIVALENT OF DATA INPUTS

Vce-__- 15 kn NOM

INPUT-.+.....-..-

3-952

EQUIVALENT OF OTHER INPUTS

Vee-__- 17 kn NOM

INPUT-..+.....-..~

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54298, SN74298
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
.... .
Input voltage . . . . . . . . . . . . .
Operating free·air temperature range: SN54298
SN74298
Storage temperature

7V

5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74298

SN54298

Supply voltage, Vee

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-800

p.A

16

mA

-800

High·level output current, 10H

16

Low·level output current, 10L
20

20

Data

15

15

Word select

25

25

Width of clock pulse, high or low level, tw
Setup time, tsu
Hold time, th

Data

5

5

Word select

0

0

Operating free·air temperature, T A

UNIT

MIN

125

-55

ns
ns
ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

MIN

TYP:j:

MAX

2

VOH High·level output voltage
VOL Low·level output voltage

Vee = MIN,

11= -12 mA

Vee= MIN,

VIH=2V,

VIL = 0.8 V,

10H = -800 p.A

Vee = MIN,

VIH=2V,

2.4

UNIT
V

0.8

V

-1.5

V

3.2
0.4

VIL = 0.8 V,

10L = 16 mA

Input current at maximum input voltage

Vee = MAX,

VI = 5.5 V

1

mA

IIH

High·level input current

Vee = MAX,

VI = 2.4 V

40

IJ.A

IlL

Low·level input current

Vee = MAX,

VI = 0.4 V

-1.6

mA

lOS

Short·circuit output current §

Vee = MAX

I SN54298
I SN74298

lee

Supply current

Vee = MAX, See Note 2

-57
-57

-18
39

65

en
w

V

II

-20

II

V

U

>
w

C

mA

.;..J

mA

tFor conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at VCC = 5 V, TA = 25°C.
§Not more than one output should be shorted at a time.
NOTE 2: With all outputs open and all inputs except clock low, ICC is measured after applying a momentary 4.5 V, followed by ground, to
the clock input.

switching characteristics, Vee

tt-

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

I-'tp,-,L::;.;H-,-:P_r_op:....a...:g:....at_io_n_d_e_la....;Y:....t_i_m_e:....,l_o_w_.t_o_.h....;i9:....h_.I_ev_e_l_o_ut..:.p_u_t_ _ _ _ _ _----I eL = 15 pF,
tpHL Propagation delay time, high·to·low.level output
See Note 3

RL = 400

n,

MIN

TYP

MAX

18

27

21

32

NOTE 3: See General Information Section for load circuits and voltage waveforms.

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-953

TYPES SN54LS298, SN74LS298
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS298
SN74LS298
Storage temperature range

7V
7V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS298
MIN

NOM

4.5

5

Supply voltage, Vee
High-level output current, 10H

SN74LS298

MAX

MIN

NOM

5.5

4.75

5

-400

Low-level output current, 10L

MAX
5.25

V

-400

/lA
mA

4

Width of clock pulse, high or low level, tw
Setup tirne, tsu
Hold time, th

8

20

20

Data

15

15

Word select

25

25

Data

5

5

Word select

0

0

Operating free-air temperature, T A

-55

125

UNIT

ns
ns
ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

lEI
-I
-I
r

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

SN54LS298

TEST CONDITIONSt

MIN

TYP+

SN74LS298

MAX

2

VOH High-level output voltage
VOL Low-level output voltage

Vee= MIN,

II = -18 mA

Vee= MIN,

VIH=2V,

VIL = VIL max,
Vee = MIN,

VIH=2V,

10H = -400/lA

VIL = VIL max

Input current at

2.5

TYP+

MAX

2

UNIT
V

0.7

0.8

V

-1.5

-1.5

V

2.7

3.4
0.25

IIOL = 4mA

MIN

0.4

IIOL = 8mA

3.4

V

0.25

0.4

0.35

0.5

V

Vee = MAX,

VI = 7 V

0.1

0.1

mA

IIH

High·level input current

Vee = MAX,

VI = 2.7 V

20

20

Low-level input current

Vee = MAX,

VI = 0.4 V

lOS

Short-circuit output current§

Vee = MAX

-0.4
-100

-0.4
-100

/lA
mA

(")

IlL

(J)

lee

Supply current

Vee = MAX,

C

m

===
m

II

maximum input voltage

-20
See Note 2

13

-20
,13

21

21

mA
mA

tFor conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions.
+AII typical values are at V CC = 5 V, T A = 25° C.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 2: With all outputs open and all inputs except clock low, ICC is measured after applying a momentary 4.5 V, followed by ground, to
the clock input.

switching characteristics, Vee

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

tPLH Propagation delay time, low-to-high-Ievel output

eL

tPHL Propagation delay time, high-to-Iow-Ievel output

See Note 3

=

15pF,

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

".!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

RL = 2 k!1,

MIN

TYP

MAX

18

27

21

32

TYPES SN54298, SN54LS298, SN74298, SN74LS298
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
TYPICAL APPLICATION DATA
This versatile multiplexer/register can be connected to operate as a shift register that can shift N-places in a single
clock pulse.
The following figure illustrates a BCD shift

regis~er

that will shift an entire 4·bit BCD digit in one clock pulse.

PARALLEL LOAD

Ir--------------------JA~

l

A1

WS

A2
B2

-- C1

C2
D1
D2

'L~~98
REG
1

~

WS OA
A2
..... B1 '298
or OB
B2'LS298
C1 REG
2 Oc
C2
'--- D1
OD
D2 C~

OAr-0B f--

OD

-.

L A1

--

~.

DIGIT 1

WS OA

..... B1 '298
or OB
B2'LS298
~ C1
REG

""""':
L.--

C2
D1
D2

3

Oc

CK OD

1\

y

Y

-

WORD SELECT

A2

~

Ocf-

Y

CLOCK

I

-.

L A1

- B1 '298

'""""--

________________~\

I

~

~

DIGIT 2

DIGIT 3

When the word-select input is high and the registers are clocked, the contents of register 1 is transferred (shifted) to
register 2 and etc. In effect, the BCD digits are shifted one position. In addition, this application retains a parallel-load
capability which means that new BCD data can be entered in the entire register with one clock pulse. This arrangement
can be modified to perform the shifting of binary data for any number of bit locations.

CJ)
Another function that can be implemented with the '298 or 'LS298 is a register that can be designed specifically for
supporting multiplier or division operations. The example beiow is a one place/two-place shift register.

'181, 'LS181, or 'S181
(ALU)
FO

F1

F2

FO

A1 A2 B1 B2 C1 C2 D1 D2

F1

F2

u

:>w

C

'181, 'LS181, or 'S181
(ALU)

F3

W

-I

F3

lI-

A1 A2 B1 B2 C1 C2 D1 D2
WS

CLOCK~

__---+----+----+----r-----~

WORD

'-----+----+----+----+--~~SELECT

When word select is low and the register is clocked, the outputs of the arithmetic/logic units (ALU's) are shifted one
place. When word select is high and the registers are clocked, the data is shifted two places.

TEXAS

-Ij}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-955

III
-i
-i

r-

om

:5

(")

m

en

3-956

TYPES SN54LS299, SN54S299, SN74LS299, SN74S299
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
MARCH 1974-

REVISED APRIL 1985

SN54LS299, SN54S299 ... J OR W PACKAGE
SN74LS299, SN74S299 ... OW, J OR N PACKAGE

• Multiplexed Inputs/Outputs Provide
Improved Bit Density

(TOP VIEW)

• Four Modes of Operations:
Hold (Store)
Shift Left
Shift Right
Load Data

20

SO
G1
G2
G/OG
E/OE
C/Oc
A/OA
OA'
CLR

• Operates with Outputs Enabled or at High Z
• 3-State Outputs Drive Bus Lines Directly

18

17

4

16
15
14
13
12
10

GND

• Can Be Cascaded for N-Bit Word Lengths

VCC
Sl
SL
OH'
H/OH
F/OF
0/0 0
BlOB
CLK
SR

19

11

SN54LS299, SN54S299 ... FK PACKAGE
SN74LS299, SN74S299 ... FN PACKAGE

• SN54LS323 and SN74LS323 Are Similar But
Have Synchronous Clear

(TOP VIEW)
U

1815 5l ~(ij

• Applications:
Stacked or Push-Down Registers
Buffer Storage, and Accumulator
Registers

3

GUARANTEED
TYPE

POWER

FREQUENCY

DISSIPATION

a::

175mW
700 mW

25 MHz
50 MHz

'S299

1 20 19

TYPICAL

SHIFT (CLOCK)

'LS299

2

IU-'

0 a:: ~ cc
Z 1Jl-'0
U

c.!)

III

co

description

These Schottky TTL eight-bit universal registers feature multiplexed inputs/outputs to achieve full eight-bit data .'
handling in a single 20'pin package. Two function·select inputs and two output·control inputs can be used to choose
the modes of operation listed in the function table.
Synchronous parallel loading is accomplished by taking both function·select lines, SO and S1, high. This places the
three-state outputs in a high·impedance state, which permits data that is applied on the input/output lines to be clocked
into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. A direct
overriding input is provided to clear the register whether the outputs are enabled or off.

en
w

u

:>w

c

FUNCTION TABLE
INPUTSIOUTPUTS

INPUTS
MODE

Clear

Hold
Shift Right
Shift Left
Load

CLR

FUNCTION

OUTPUT

SELECT

CONTROL
Gl t G2 t

SI

so

L
L

X

L
X

L

H

H

H

L

L

H

X

X

H

L

H

H

L

H

H

H

L

L

CLK

SERIAL
SL

SR

X
X

X
X

OH'
L

L

L

L

L

L

L

L

L

L

L

L

L

L

X

L
X

L

X

L
X

L

X

X

X

X

L

L

QAO

QBO

QCO

QDO

QEO

QFO

QGO

QHO

QAO

QCO

QDO

QEO

QFO

QGO

QHO

QAO

QHO

QBn

Ocn

QDn

QEn

QFn

QGn

H

QGn

L

QAO. QBO
H
QAn
L
QAn

QBn

QCn

QDn

QEn

QFn

QBn

QCn

QDn

QEn

QFn

QGn

QHn

QGn
H

L

X

QBn

QGn
H

QGn
f

QHn

L

QBn

L

g

h

a

h

X

X

X

X

X

X

L

L

X

X

X

L

L

L

X

X

L

L

t

X

H

L

L

1

X

L

L

t

H

X

F/OF G/O(; H/OH °A'

L
L

L
L

L
L

A/OA BlOB C/Oc 0/00 E/OE

OUTPUTS

H

H

L

L

L

1

L

X

QBn

QCn

QDn

QEn

QFn

H

H

H

X

X

t

X

X

a

b

c

d

e

QHO

tWhen one or both output controls are high the eight input/output terminals are disabled to the high-impedance state; however,

sequential operation or clearing of the register is not affected.

a ... h

= the level of the steady-state input at inputs A through H, respectively. These data are loaded into the flip-flops while the flip-flop

outputs are isolated from the input/output terminals.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n:ea;:s':a~rl~ar~lIU:~Ot~~~~:.~nof~lf~~~~n~e~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-957

TYPES SN54LS299, SN54S299, SN74LS299, SN74S299
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
logic diagram

~

t;:
~

:r

0

....

~

-+-+....:-:::....0
t3

Z

I-~

00

ZOi

O

u
oe

-0

II

§~

-4
-4

r-

C

m
~
m

(")

~

{

UJ

z

...,o
~.

o
o

~

c:

o

~

N

~
1--'
::::l0
0.. a;
1-1::::lz
00
(.)

I
t.>

~
c:

o

~

~

~

ia::

c:

3-958

-111

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS299, SN74LS299
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS

o

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

VCC

TYPICAL OF OUTPUTS

TYPICAL OF OUTPUTS

QA'THRU QH'

QA THRUQH

---+---VCC

-----Vc c

Req

INPUT

__

OUTPUT

OUTPUT

SO, S1: Req= 9 kn NOM
All other inputs: Req= 18 kn NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage . . . . . . . .
Off·state output voltage
Operating free·air temperature range: SN54LS299
SN74LS299
Storage temperature

. 7V
. 7V

5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS299
Supply voltage, VCC
High-level output current, IOH

NOM

MAX

MIN

NOM

4.5

5

5.5

4.75

5

QA thru QH

Width of clear pulse, tw(clearl

Setup time, tsu

Hold time, th

5.25
-2.6

-0.4

-0.4

QA thru QH

12

24

CA' arCH'

4

8

Clock frequency, fclock
Width of clock pulse, tw(clock)

MAX

-1

QA' or CH'
Low-level output current, IOL

SN74LS299

MIN

0
Clock high

20

0
30

30

Clock low

10

10

Clear low

20

20

Select

35t

35t

High-level data':>
Low-level dataO

201

20t

201

20t

Clear inactive-state

201

20t

Select
Data O

lOt

lOt

Operating f~ee-air temperature, T A

ot
-55

20

0

en
w

(.)
V
mA
mA
MHz

:>

w
C

....I

tt-

ns
ns

ns

ns

ot
125

UNIT

70

°c

°Oata includes the two serial'lnputs and the eight input/output data lines.

TEXAS . .
IN STRUM ENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-959

TYPES SN54LS299, SN74LS299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH
VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VIH=2V,

2.4

3.2

2.4

10H = MAX

2.5

3.4

2_7

-I
-I
r-

VIL = VILmax
Vee = MAX,
Vee = MAX,

Any other
SO, Sl

low-level input current

lOS

Sh~rt.drcuit output current§

ICC

Supply current

Any other
0A thru 0H
0A' or

Ow

0.4

0.25

0.4

Veee MAX

Vee = MAX,
Vee = MAX,

3.1

10l =4 mA
10l - 8 mA
VIH=2V,
VIH=2V,

V

3.4

10l - 24 mA

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0_5
40

j.lA
j.lA

-400

-400

200

200

VI = 5.5 V

100

100

VI = 7 V

100

100

40

40

VI = 2_7 V
VI =0.4V

Vee = MAX

20

20

-0.8

-0.8

-0.4

-0.4

-30

-130

-30

-20

-100

-20

33

Vee = MAX

V

40

VI = 7 V

Va = 0.4 V

A thru H, SO, Sl

High-level input current

IOl-12mA

0_25

Va = 2.7 V

Any other

IlL

II ""'

Ow

Athru H

input voltage

IIH

Vee = MIN,

SO, Sl

Input current at maximum
II

V

VIL = VILmax,

0A thru 0H

low-level voltage applied

-1.5

Vee = MIN,

0A thru 0H

Off-state output current,
10Zl

V

-1.5

0A' or 0H'

0A' or

high-level voltage applied

0.8

0A thru 0H

VIH = 2 V,

Off-state output current,

0_7
11=-18mA

low-level output voltage

UNIT
V

2

Vee" MIN,

0A thru 0H

10ZH

MIN TYP+ MAX MIN TYP+ MAX
2

High-level input voltage

Val

SN74LS299

SN54LS299

TEST CONDITIONSt

PARAMETER

--

-130
-100

53

33

53

j.lA

j.lA
mA
mA
mA

'"0''''"0' ,""We . . M, N "' MA x, 0" ", ."m,,'''' ••'0' " .. "''' 00'" ,,'"mm'o'" ","""0,,"0"';00'.

+ All typical values are at V ec = 5 V, T A = 25° C.
§Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second_

switching characteristics, Vee

C

PARAMETER~

:s

f max

m

tPlH

(")

m

tPHl

en

tPHl

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

ClK

0A' or 0H'

ClR

0A' or 0H'

tplH
tPHL
tPHl
tpZH

ClK

0A thru 0H

ClR

0A thru 0H

Gl,G2

0A thru 0H

Rl = 2

kn,

Rl = 665

tpZL
tPHZ

TEST CONDITIONS
See Note 2

Gl,G2

0A thru 0H

Rl

n,

= 665 n,

tPLZ
~ f max
tpLH
tpH L
tpZH
tpZL
tPHZ
tpLZ
NOTE

3-960

el=15pF

el = 45 pF

Cl

= 5 pF

MIN

TYP

20

35
22

MAX

MHz
33

26

39

27

40

17

25

26

39

26

40

13

21

19

30

10

20

10

15

"" maximum clock frequency
"" propagation delay time, low-to-high-Ievel output.
"" propagation delay time, high-to-Iow-Ievel output
"" output enable time to high level
"" output enable time to low level
"" output disable time from high level
"" output disable time from low level
2: For_ testing f max , all outputs are loaded simultaneously, each with CL and Rl as specified for the propagation times.
See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

UNIT

ns
ns
ns
ns
ns
ns

TYPES SN54S299, SN74S299
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
schematics of inputs and outputs
EQUIVALENT OF CLOCK AND
CLEAR INPUTS

EQUIVALENT OF G1
AND G21NPUTS

VCC3--

VCC~--

Req

INPUT

EQUIVALENT OF A THRU Ht, SO, Sl,
SHI FT RIGHT, AND SHI FT LEFT INPUTS

vcc~"n

2.8 kn
NOM

--

NOM

--

INPUT

INPUT

Clock: R~q = 2.8 kn NOM
Clear: Req = ?5 kn NOM

--

tWhen 3-state outputs are disabled.

TYPICAL OF OUTPUTS

TYPICAL OF OUTPUTS

QA THRUQH

QA' AND QH'
---....,..-VCC

------VCC

OUTPUT

OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage . . . . . . . .
Off-state output voltage
Operating free-air temperature range: SN54S299 (see Note 2)
SN74S299
Storage temperature
NOTE

. 7V

5.5 V
5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54S299
NOM

MAX

MIN

NOM

4.5

5

5.5

4.75

5

Supply voltage, Vee
High-level output current, IOH

QA thru QH

Low-level output current, IOL

Width of clear pulse, tw(clear)

Setup time, tsu

-6.5
-0.5

20

20

0A' or 0H'

6
0

50

6
0

Clock high

10

10

Clo~

10

10

Clear low

10

10

Select

15t

15t

7t

7t

5t

5t

10t

10t

5t

5t

low

High-level data O
Low-level dataO
Clear inactive-state

Hold time, th

5.25

-2
-0.5

Clock frequency, fclock
Width of clock pulse, tw(clock)

MAX

QA thru QH

QA' orQH'

Select
Data O

Operating free-air temperature, T A

5t
-55

50

0

UNIT
V

..J

lI-

rnA
rnA
MHz
ns
ns

ns

ns

5t
125

:>w

C

SN74S299

MIN

en
w

(.)

70

°c

00ata includes the two serial inputs and the eight input/output data lines.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS;TEXAS 75265

3-961

TYPES SN54S299, SN74S299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS

electrical characteristics over recommended operating free-air temperature' range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

Vil

low·level input voltage

VIK

Input clamp voltage

VOH

Val

TEST eONDITloNst

High·level output voltage

Vee = MIN,

II = -18 mA

Vee = MIN,

VIH = 2 V,

2.4

3.2

QA' or QH'

VIL = 0.8 V,

10H = MAX

2.7

3.4

Vee = MIN,

VIH - 2 V,

VIL = 0.8 V,

10L = MAX

Vee - MAX,

VIH = 2 V,

low·level output voltage

QA thru QH

high·level voltage applied

QA thru QH

low·level voltage applied

II

Input current at maximum input voltage

IIH

High·level input ClIrrent

Va = 2.4 V
Vee = MAX,

VIH = 2 V,

Va = 0.5 V
Vee = MAX,

VI = 5.5 V

Vee = MAX,

VI = 2.7 V

Any other

low·level input current

SO, Sl

II'

Short·circuit output currentS

ICC

Supply current

QA thtu QH
QA' or QH'

-1.2

V
V

0.5

V

100

IJA

-250

IJA

50

VI = 0.5 V

Any other
lOS

V

-2
VCC = MAX,

VCC = MAX

mA
IJA
mA

-500

/lA

-250

IJA

-40

-100

-20

-100

Vec = MAX

UNIT

0.8

1
100

A thru H, SO, Sl

ClK or CLR
III

MAX

V

QA thru QH

Off·state output current,
10Zl

TYP:j:

2

Off·state output current,
10ZH

MIN

140

225

TYP

MAX

mA
mA

t For conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions.
tAli tYPIcal values are at Vee = 5 V, T A = 25°e.

No, mO" ,"'0000 0"""' ,"0"" ","0""'"

"m ••

0' '"""00 0' '". ,00" ,;""" ,00"" OM mH' 00, "'00'.

switching characteristics, Vee = 5 V, TA = 25°e

-I
-I

PARAMETERlI

r-

FROM

TO

(INPUT)

(OUTPUT)

ClK

QA' or QH'

CLR

QA'or QH'

f max

C

m

tPLH

<
nm

tpHL
tpHL
tPLH

en

tpHl
tpHL
tpZH

TEST CONDITIONS

MIN
50

See Note 2

CLK

QA thru QH

CLR

QA thru QH

. Gl, G2

QA thru QH

Gl,<32

QA thru QH

RL = 1 kn,

RL=280n,

Cl=15pF

Cl = 45 pF

tPZL
tpHZ

RL = 280 n,

Cl - 5 pF

tplZ
1fmax = maximum clock frequency
tpLH = Propagation delay time, low·to·high·level output
tpHL = Propagation delay time, high·to·low·level output
tpZH = output enable time to high level
tpZL = output enable time to low level
tpHZ = output disable time from high level
tpLZ = output disable time from low level
NOTE 2: For testing f max , all outputs are loaded simultaneously, each with Cl and RL as specified for the propagation times.
See General Information Section for load circuits and voltage waveforms.

3-962

TEXAS

l!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

70

UNIT
MHz

12

20

13

20

14

21

15

21

15

21

16

24

10

18

12

18

7

12

7

12

ns
ns
ns
ns
ns

ns

TYPES SN54LS320, SN54LS321, SN74LS320, SN74LS321
CRYSTAL-CONTROLLED OSCILLATORS
02418, DECEMBER 1978-REVISEO JANUARY 1981

'LS320
•

Crystal-Controlled Oscillator Operation
from 1 MHz to 20 MHz

•

2-Phase Driver Outputs

SN54LS320 , , . J PACKAGE
SN74LS320 ... J OR N PACKAGE
(TOP VIEW)

'LS321
•

TANK1
TANK2

VCC
XTAL2

GND1

XTALl
NC
F

Similar to 'LS320 But Includes f/2 and
f/4 Count-Down Outputs
'

Vcc'

description

F'

P

The 'LS320 is a crystal-controlled oscillator/clock
driver. It features complementary standard and highcurrent driver outputs. A synchronization flip-flop is

SN54LS321 ... J PACKAGE
SN74LS321 ... J OR N PACKAGE
(TOP VIEW)

included.
The driver outputs, F' and F' have very-low impedance
and can be used to ~rive highly capacitive TTL-level
lines. If the driver outputs are not used, then the VCC'

TANK1
TANK2
GND1
FFQ

terminal can be left open.
The 'LS321 is identical to the 'LS320 except it
additionally features two count-down outputs, F/2 and
F/4.

The SN54LS320 and SN54LS321 are characterized for
operation over the full military temperature range of
-55°C to 125°C. The SN74LS320 and SN74LS321

VCC
5V
5V
5V

G

Jl.IL

f max

U

20 MHz

>

20 MHz

w

10 MHz

C

...J

F
F'

TANK2

(7)

F'

XTALl
F'

XTAL2

F'

(13)

CTRDIV4
Cl

HQ

lI-

(7)

TANK1

'LS320
G

VCC
5V
Open
5V

'LS321

logic symbols

.rtIL

en
w

FREQUENCY LIMITS
OUTPUTS IN USE
Driver outputs only
Other outputs only
Driver and any other outputs

are characterized for operation from 0 °C to 70°C.

TANKl
TANK2
XTAL1
XTAL2

F'
F'

For chip carrier information,
contact the factory.

t

limits table.

Vcc'

NC - No internal connection

If a fundamental crystal is used, an inductor of 5 to 160

/-IH is required to be connected between the tank 1 and

Interaction of the driver outputs with the other outputs
limits useful frequencies as shown in the frequency-

F/4
F
GND2

These circuits were designed for crystal control of
frequency and capacitive control is not recommended.

tank 2 inputs.

FFD

VCC
XTAL2
XTAL1
F/2
F

(6)

(4)

F/2
F/4
FFQ

tThe value of the inductor is selected from the graph in Figure 2. Use the next higher standard inductor value if the selected value is not available. If a third overtone crystal is used, a tuned tank is necessary. The center frequency of the tuned tank is determined by the equation f = Y, nVlC.

PRODUCTION DATA
This document contains information current as
of 'publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~nnd:::s:a~rl~ar~liu~~Ot~~~~~~nor~~f:~~~n~e~::s~

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-963

TYPES SN54LS320, SN54LS321, SN74LS320, SN74LS321
CRYSTAL-CONTROLLED OSCILLATORS
logic diagram (positive logic)
FFD

TANK 1

(4)

(5)

(7) F

TANK 2
XTAL 1

FFO

(1)

(14)

osc

(12)

rDR~ER'

XTAL2

F
Vec

: SECTION:
(10)
(9)

I

I

F'

F'

L ___ .J

--------,

r

>-__(;.;;.6~)

I
'LS321
ONLY

I

F/4

I
I

I
I

I

I

I

I
I

(13) F/2

I

L __________ _ _ _ _ _ _ _ _ _ _ .JI

II

Pin numbers shown on logic notation are for J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Supply voltage, Vee' . . . . . . . . . . . . . . . .
Input voltage to FFD terminal
........... .
Operating free-air temperature range: SN54LS320, SN54LS321
SN74LS320,SN74LS321
Storage temperature range

-f
-f

r

C

m

~

n

NOTE 1: Voltage values are with respect to network ground terminals.

CJ)

recommended operating conditions

..... 7 V

7V
-0.5 V to 7 V
-55°e to 125°e
oOe to 70 0e
0
_65°e to 150 e

m

SN74LS320

SN54LS320

UNIT

SN74LS321

SN54LS321
MIN

NOM

MAX

MIN

NOM

MAX

Supply voltage, VCC

4.5

5

5.5

4.75

5

5.25

Supply voltage, VCC

4.5

5

5.5

4.75

5

5.25

High·level output current, IOH
Low-level output current, IOL

Output frequency, f out

F' or F'

-12

-24

F, F, F/2, F/4

-0.4

-0.4

12

24

4

8

F' or F'
F,

F, F/2, F/4
0.5

10

0.5

F/4 ('LS321)

0.25

5

0.25

5

1

20

1

20

-55

125

0

70

Operating free-air temperature, T A
. Input and output schematics are similar to those shown for SN74LS326.

3-964

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

V
rnA
rnA

10

F/2 ('LS321)
For F

V

MHz
°c

TYPES SN54LS320, SN54LS321, SN74LS320, SN74LS321
CRYSTAL-CONTROLLED OSCILLATORS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

SN54LS320

SN74LS320

SN54LS321

SN74LS321

MIN
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage
High-level

VOH

output voltage

Low-level
VOL

output voltage

F',

F'

Others
F',

F'

Others

Input current at
II

maximum input voltage

MAX

MIN TYP+

2
Vee = MIN,

Vee' = MIN,

11=-18mA

Vee=4.5V,

Vee: = 4.5 V,

10H = -12 mA

Vee=4.75V,

Vee' = 4.75 V, 10H = -24 mA

Vee = MIN,

VIH=2V,

Vee = MIN,

Vee' = MIN

Vee = MIN,

VIL = VIL max

Vee = MAX,

VI = 7 V

10H = -400iJ A

UNIT

MAX
V

2

2.5

3.3

2.5

3.4

IOL=12mA

0.7

0.8

V

-1.5

-1.5

V

2.7

3.3

2.7

3.4

0.4

0.25

10L = 24 mA
10L =4 mA

0.25

0.4

10L = 8 mA

V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

0.1

0.1

V

mA

IIH

High·level input current

Vee = MAX,

VI = 2.7 V

20

20

iJA

IlL

Low-level input current

Vee = MAX,

VI=O.4V

-0.4

-0.4

mA

-100

mA

Short·circuit
lOS

from Vec
Supply current

lee

-20

Vee = MAX

output current §
Supply current

lec

t

TYP+

from Vee

Vee = MAX,

FFD at GND

Vee = MAX,

Vcc' = MAX,

-100

-20

'LS320

42

70

42

70

'LS321

47

75

47

75

4

8

4

8

FFD at GND

mA
mA

For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.

+AII typical values are at Vee

=

5 V, Vee'

=5

V, and T A

=

25°e.

§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second. Outputs F' and F' do
not have short-circuit protection and these limits do not apply.

en
w

U
switching characteristics, Vee = 5 V, Vee = 5 V, TA = 25°e
PARAMETER

OUTPUTS
F/2

f max

Maximum operating

F/4

frequency

All others

'LS320

TEST CONDITIONS

eL=100pF

MIN

TYP

20

RL=2kn

tr

eL=100pF

RL = 667 n

CL = 200 pF

Rise time, 1 V to 3 V

CL = 50 pF
Others

Fall time, 3 V to 1 V
Others

15

5

7.5

20

30

MAX

6

12

6

12

7

14

7

14

7

14

7

14

11

22

11

22

40

25

40

45

70

5

10

5

10

5

10

5

10

eL = 200 pF

6

12

6

12

CL = 50pF

6

12

6

12

10

20

10

20

17

30

17

30

CL = 100 pF

CL = 100 pF

RL = 667 n

RL=2kn

C

MHz

lI-

ns

ns

See General Information Section for load circuits and voltage waveforms.

TEXAS

.Jtjp

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

>
w

UNIT

..J

70

CL = 200 pF

11

TYP

10

25

RL=2kn

CL=50pF

tr

30

MIN

45

eL = 100 pF
CL - 200 pF

F', F'

MAX

RL = 667 n

eL = 50 pF
F', F'

'LS321

3-965

TYPESSN54LS320,SN54LS3i1,SN74LS320,SN74LS321
CRYSTAL-CONTROLLED OSCILLATORS
TYPICAL APPLICATION DATA
The SN54/74LS320 and 'LS321 are crystal-controlled oscillators. Figure 1 shows the device with all required
external components.

r-------__

--------------------------~----~5.0V

r-------------------~F

100 nF

c

~------------~

II

FIGURE 1.
1.

~
~

r-

C
m

S
('")

Where:

m

en

__---------------e~--~--~GND

CRYSTAL-CONTROLLED OSCILLATOR 'LS320/321

Determination of C and L are as follows:
a. Inductance L
Select Inductance L according to Figure 2.
b. Capacitor C
C

= CS-Cp-CL

Cp
CL
L
Cs

= parasitic board capacitance
= parasitic capacitance of the inductor
= inductance
= required capacitance calculated as follows:

Cs

(2 on of q )2 oL
for fq
2.

>

12 MHz, C

= 0 pf

Electrical characteristic for the crystal:
The quartz crystal used as a frequency reference should be designed for series mode operation
with a resistance in the 20 Q to 75 Q range and be capable of a minimum 2 mw power dissipation.
It is recommended to use a tuned tank also for fundamental crystals.

3-966

-1!1

TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPESSN54LS320,SN54LS321,SN74LS320,SN74LS321
CRYSTAL-CONTROLLED OSCILLATORS

160

\

140

J:

\
\
\

I

w

:J

..J
~

>

100

a::

\
\

(.)

:J

80

~
('II

~

\

2:


w

"-

",

20

o

o

2

4

C

'" ,~
6

..J

--8

lI10

12

14

16

18

20

- FUNDAMENTAL CRYSTAL FREQUENCY - MHz
FIGURE 2

TEXAS •
INSTRUMENTS
POST OFFI~E BOX 225012 • DALLAS, TEXAS 75265

3-967

lEI
-4
-4
r
C

m

<

n
m
en

3·968

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS322A, SN74LS322A
8-BIT SHIFT REGISTERS WITH SIGN EXTEND
02411. OCTOBER 1977-REVISED APRIL 1985

SN54LS322A •.. J PACKAGE
SN74LS322A ... OW. J OR N PACKAGE

• Multiplexed Inputs/Outputs
Provide Improved Bit Density

(TOPVIEWI

• 3-State Outputs Drive Bus
Lines Directly

VCC
DS
SE
D1
B/OB
D/OD
F/OF
H/OH
OH'
CLK

G
SIP
DO
A/OA
C/OC
E/OE
G/OG
OE
CLR
GND

• Sign Extend Function
• Direct Overriding Clear
description
These low-power Schottky ei~ht-bit shift registers
feature multiplexed input/output data ports to achieve
full eight-bit data handling in a single 20-pin package.
Serial data may be entered into the shift-right register
through either the DO or the D1 input as selected by the
data select input. A serial output (OH'l is also provided
to facilitate expansion. Synchronous parallel loadirig is
accomplished by taking both the register enable and the
sip inputs low. This places the three-state input/output ports in the data input mode. Data are entered on
the low-to-high transition of the clock. The data extend
function repeats the sign in the OA flip-flop during shifting. A direct overriding clear input clears the internal
registers when taken low whether the outputs are enabled or off. The output enable does not interfere with synchronous operation of the register.

SN54LS322A .•• FK PACKAGE
SN74LS322A ... FN PACKAGE
(TOPVIEWI

o I.e::
~CJ)
ClCJ)ICl

SE
01
B/OB
D/OD
F/OF

A/OA
C/OC
E/OE
G/OG
OE

en
w

u

FUNCTION TABLE
INPUTS
REGISTER
OPERATION

ClR

ENABLE

sip

G
Clear
Hold
Shift Right
Sign Extend
Load

I NPUTS/OUTPUTS

SIGN

DATA

OUTPUT

EXTEND

SELECT

ENABLE

Se

OS

OE

ClK

A/OA

BlOB

C/Oc·· .H/OH

. OUTPUT

C

°H

..J

L

H

X

X

X

L

X

L

L

L

L

L

L

X

H

X

X

L

X

L

L

L

L

L

°AO
DO

°BO
QAn

H

H

X

X

X

L

X

H

L

H

H

L

L

H

L

H

H

H

L

H
H

L

H

L

X

L

L

L

X

X

X

t
t
t
t

D1

QAn

°An
a

°An
b

:>w

QCO

QHO

QHO

°Bn
QBn

QGn

QGn

QGn

QGn

QBn

QGn

QGn

c

h

h

lI-

When the output enable is high. the eight input/output terminals are disabled to the high-impedance Slate; however. sequential operation
or clearing of the register is not affected. If both the register enable input and the sip input are low while the clear input is low, the register is cleared while the eight input/output terminals are disabled to the high:impedance state.
H = high level (steady state)
L = low level (steady state)
X = irrelevant (any input. including transitions)
t = transition from low to high level
QAO •.. OHO = the level of QA through QH. respectively. before the indicated steady-state conditions were established
0An" . QHn = the level of QA through 0H. respectively. before the most recent t transition of the clock
00. 01 = the level of steady-state inputs at inputs 00 and 01 respectively
a ... h = the level of steady-state inputs at inputs A through H respectively

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::s~~fJ~ar~liu:~Ot~~~:~~~f~~f~~~~n~e~:~s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-969

S3::>11\30 lU

w

cO
-...J

II

o

0"

CQ

C;"
C.
Qj"

~
Q)

3
REGISTER
ENABLE

SO
en

G

;::;:

<"
~

sip

0"
CQ

.2:
SIGN
(18)
EXTEND

SE
o""
~

~
~z

~~

01

en en
%en
-z
~~
:Dr-"

. men
QW
c;;~
-t}>

men

en z......
:D

=e~
_r-"

-ten

%w

en~

(17)

c;l>
z

DATA
SELECT
OS
DO (3)

m

~

m

z

~;or;;i

c

~C:~
~~
~/TI

(12) QH'

~z

~~..t
x
~

0>
'"
'"

c;o~

2!;!-a
-tm

CLOCK
CLEAR
OUTPUT (8)
ENABLE

q

Of
(16)

A/QA

B/OB

INPUTS/OUTPUTS NOT SHOWN
(5) C/QC
(15) D/QD
(6) E/QE
(14) F/QF
Pin numbers shown on logic notation are for DW, J or N packages.

.TYPES SN54LS322A, SN74LS322A
a-BIT SHIFT REGISTERS WITH SIGN EXTEND

logic symbol

SRGS

OE
G

sip
elK

os
DO
01

A/OA
BlOB

(12)

°H'

o_f_in_p_u_t_s_a_n_d_o_u_t_p_:_i:_:U_m_b~er_S_Sh_o_w_no_n_IO_9_ic_no_t_at_io_na_re_f_or_0_W_,_J_or_N_p_aC_k_agre_s.

rSC_h_e_m
__
at_i_cs__

EOUIVALENT OF EACH INPUT

________________________

-,~
en

TYPICAL OF OUTPUTS

w

0A THRU 0H
Vee----

---"",,-Vee

Req

Vee

()

:>
w

C

INPUT ........1-+-__

OUTPUT

OUTPUT

...J

tt-

Sign extend: Req = 6 kn NOM
Data select: Req = 9 kn NOM
All other inputs: Req = 18 kn NOM

TEXAS . "
INSTRUMENTS
POST OFFICE BOX 225012 •

OA~~AS.

TEXAS 752e5

3-971

TYPES SN54LS322A, SN74LS322A
8-BIT SHIFT REGISTERS WITH SIGN EXTEND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage . , . . . . . .
Off-state output voltage
Operating free-air temperature range: SN54LS322A
SN74 LS322A
Storage temperature

7V
7V
7V
-55°C to 125°C
oOe to 70°C
_65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS322A
VCC

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

IOH

High·level output current

IOL

Low-level output current

fclock

Clock frequency

tw(clock) Width of clock pulse
tw(clear)

tsu

Setup time

-I
-I
th

(")

TA

:::;
m

Hold time

SN74LS322A
NOM MAX
5.25
5

MIN
4.75

QA thru QH

-1

-2.6

QH
QA thru QH

-0.4

-0.4

12
4

24

QH
0
30

Clock high

20

8
0
30

Clock low

10

10

Clear low

20
lOt
20t

20

Data select
High·level data O
Low-level data O
Clear inactive-state

Data O
Register enable

Operating free-air temperature

0

0

"'J}

. TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

V
mA
mA
MHz

ns

ns

50
10 t
2.0 t

-55

V

ns

20t
35

50
lOt
2.0t

°Oata includes the two serial inputs and the eight input/output data lines.
tThe arrow indicates that the rising edge of the clock pulse is used for reference.

20

10 t
20 t
20t

20t
20t
35

UNIT

V

2
0.8

high or low

3-972

MAX
5.5
0.7

Data select

C
m

NOM
5

2

Register enable high
Register enable low

r-

(J)

MIN
4.5

125

0

ns

70

°c

TYPES SN54LS322A, SN74LS322A
8-BIT SHIFT REGISTERS WITH SIGN EXTEND

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VCC = MIN,

11=-18mA

QA thru QH

VCC = MIN,

VIH=2V,

QH'

IOH "'MAX

VIK
VOH

QA thru QH
VOL
QH'

SN54LS322A

TEST CONDITIONSt

MIN

TYP*

2.4

3.2

2.5
VIH=2V,

MIN

-1.5
VIL = MAX,
IOL -12 mA

VCC = MIN,

SN74LS322A

MAX

TYP* MAX
-1.5

2.4

3.4

IOl"'4mA

0.4

0.25
0.35

0.5

0.25

0.4

0.25

0.4

0.35

0.5

IOl=8mA

V
V

3.4

2.7

0.25

IOL=24mA

Vil = MAX

3.1

UNIT

0.4
V

IOZH

QA thru QH

Vcc '" MAX,

VIH '" 2V,

Vo'" 2.7 V

40

40

IJA

IOZl

QA thru QH
A thru H

VCC = MAX,

VIH '" 2V,

Vo - 0.4 V

-0.4

-0.4

mA

Data select

II

Sign extend

Vcc'" MAX

Any other

VI "'5.5V

0.1

0.1

VI "'7V

0.2

0.2

VI = 7V

0.3

0.3

VI = 7V

0.1

0.1

40

40

A thru H, OS
Sign extend

IIH

VCC = MAX,

VI = 2.7 V

Any other
Data select
Sign extend

III

VCC = MAX,

VI = 0.4 V

Any other
QA thru QH

IOS§

QH'

VCC = MAX

60

20

20

-0.8

-0.8

-1.2

- 1.2

-0.4

-0.4

-30

-130

-30

-130

-20

-100

-20

-100

VCC = MAX

ICC

60

35

60

35

60

mA

IJA

mA

mA
mA

II

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t

All typical values are at Vee

=5

V, T A

= 25°e.

§ Not more than one output should be shorted at a time and duration of the short·circuit should not exceed one second.

en
w

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER~

FROM

TO

(INPUT)

(OUTPUT)

f max

tPlH
tPHl
tPHl
tPLH
tPHL
tPHl
tPZH
tPZl
tPHZ
tPLZ

==
==

TEST CONDITIONS
See Note 2

ClK

QH'

CLR

QH'

ClK

QA thru QH

ClR

QA thru QH

'IT

QA thru QH

G

QA thru QH

~ f max == maximum clock frequency
tpLH

(.)

Rl = 2 kn,

20
CL=15pF,

See Note 2

Rl=665n,

Cl=45pF,

See Note 2

Rl=665n,

MIN

Cl=5pF,

See Note 2

TYP

MAX

35

UNIT
MHz

33

22
26

35

27

35

16

25

2.2
22

33
35

15

35

15

35

15

25

15

25

ns
ns

:>w

C

...J

lI-

ns
ns
ns
ns

== output enable time to low level
== output disable time from high lavel
tPLZ == output disable time from low level
tpZL

propagation delay time, low-to·high-Ievel output

tpH L
propagation delay time, high-to-Iow-Iavel output
tpZH ;:: output enable time to high level

tpHZ

NOTE 2: For testing f max , all outputs are loaded Simultaneously, each with eL and RL as specified for the propagation times.
See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 22&012 • OALLAS. TEXAS 752155

3·973

TYPES SN54LS323, SN74LS323
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
OCTOBER 1976-REVISED APRIL 1985

•

Multiplexed Inputs/Outputs Provide
Improved Bit Density

•

Four Modes of Operation:
Hold (Store)
Shift Left
Shift Right
Load Data

•
•

5N54lS323 ... J PACKAGE
5N74l5323 ... ow, J OR N PACKAGE
(TOP VIEW)
19

G2

Operates with Outputs Enabled or at High Z
3-State Outputs Drive Bus Lines Directly

•

Can Be Cascaded for N-Bit Word Lengths

•

Typical Power Dissipation ..• 175 mW

•

Guaranteed Shift (Clock) Frequency .•. 25 MHz

•

Applications:
Stacked or Push-Down Registers,
Buffer Storage, and
Accumulator Registers

•

20

SO
<31
3

lS

G/OG

17

E/OE

16

C/Oc

15

6

Vcc
51
5l
°H'
H/OH
F/OF
0/0 0

A/OA

14

QA'

13

BlOB

12

ClK
SR

ClR
GNO

10

11

SN54lS323 ... FK PACKAGE
SN74lS323 ... FN PACKAGE
(TOP VIEW)

u

I~I~ ~ ~;;;
3 2

1 2019

SN54LS299 and SN74LS299 Are Similar
But Have Direct Overriding Clear
14
9 10 111213

a:

0

a:

~

CD

IdffiClld~

II
--I
--I

rC

descr::is:nLow_power Schottkyl eight-bit universal regi'sters feature multiplexed inputs/outputs to achieve full eight-bit data
handling in a single 20-pin package. Two function-select inputs and two output-control inputs can be used to choose
the modes of operation listed in the function table. Synchronous parallel loading is accomplished by taking both
function-select lines, SO and S1, high. This places the three-state outputs in a high-impedance state, which permits data
that is applied on the input/output lines to be clocked into the register. Reading out of the register can be accomplished
while the outputs are enabled in any mode. The clear function is synchronous, and a low level at the clear input clears
the register on the next low-to-high transition of the clock.
FUNCTION TABLE

m

::s

("')

m

INPUTS
MODE
CLR

OUTPUT

SELECT

CONTROL
Gtt G2 t

SI

(J)
Clear

L
L

Shift Right
Shift Left
Load

SO

X

L

L
H

X

L
L

SERIAL
CLK

L
L

t
t

OUTPUTS

A/OA 'B/OB C/Oc 0/00 E/OE F/OF G/O(; H/OH °A'

°H'

SL

SR

X

X
X
X

L
L

L
L

L
L

L

L

L

L

L

L

L

L

L

L

L

L

X

X

X

X

X

X

L
L

QDO

QEO

QFO

QGO

QHO

QAO QHO

X
X

L

H

X

X

t

X

X

H

L

L

L

L

X

X

X

QAO

QSO

QCO

H

X

X

L

L

L

X

QCO

QDO

QEO

QFO

QGO

aHO

L

H

L

L

H

QAn

QBn

Cen

aDn

QEn

QFn

QGn

QAO QHO
H
QGn

H

L

H

L

L

X

L

L

QAn

QS n

QCn

QDn

aEn

QFn

H

H

L

L.:

L

H

X

QS n

QCn

QDn

QEn

QFn

QGn

QHn

aGn
H

aS n

QGn
H

H

H

L

L

L

L

H

X

X

QS n
a

QCn
b

QDn
c

QEn
d

QFn
e

QGn
f

L

H

X
X

QHn

H

t
t
t
t
t

QAO
H

QSO

H

X
X

9

h

aS n
a

h

L
Hold

INPUTS/OUTPUTS

FUNCTION

X

L

L

L

tWhen one or both output controls are high the eight input/output terminals are disabled to the high·impedance state; however:
sequential operation or clearing of the register is not affected.

I

a . . . h = the level of the steady·state input at inputs A through H, respectively. These data are loaded into the flip·flops while the flip-flop
outputs are isolated from the input/output terminals.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications
per the terms of Texas Instruments
3-974

~~~n::::s':a~il~ar~liu~~Ot~~~f~:nor~~f~~~~"J!e~:;s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

0-

ce
0'
51

c.

SO

iii'
ce

t

I

(19)

(1)

iil

3

CLR~

2l

!!l

~

0-

:::z

!!.!!!.... SL

~(Jl

",-I

~;o~

SR

-----------M
(11 )

"'C~
~3:

co
I

FOUR
IDENTICAL
CHANNELS
NOT
SHOWN

~f'l'I

~z

~@4r

aJ

=t
c:

z

<
m

l;

...

:D

en

'"

en

'"

~~

!.!!!.. °H'

en "0
:J: m

=iien
enz
...... (11
:::!en

-

OUTPUT

G1

CONTROLS {

62

d

(2)

(3)

0.1:10

:Dr-

I

(7)

,(4)

,(13)

,(16)

I

A/OA

Pin numbers shown on logic notation are for OW, J or N packages.

w

cD

......
01

G/OG

BlOB

TTL DEVICES

INPUTS/OUTPUTS NOT SHOWN:
(6) C/OC
(5) E/OE
(14) 0/00
(15) F/OF

III

H/OH

:J>en
e>~

m_w

;::T:Jen

mZ

e>
.......
-.1:10

~r­

men
::z:J~

enw

TYPES SN54LS323, SN74LS323
a-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
schematics of inputs and outputs, absolute maximum ratings, recommended operating conditions, and
electrical characteristics
Same as SN54LS299 and SN74LS299,

switching characteristics, Vee
PARAMETER~

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

f max
tPLH

TEST CONDITIONS
See Note 1

CLK

QA' or QH'

CLK

QA thru QH

CL;15pF,

RL ; 2 k.!1

tpHL
tPLH
tPHL
tpZH

CL;45pF,
(31,(32

RL; 665.!1

QA thru QH

tpZL
tpHZ

<31,<32

QA thru QH

tpLZ

CL

=5

pF,

RL

= 665.!1

MIN

TYP

25

35

MAX

MHz

22

33

26

39

17

25

25

39

14

21

20

30

10

20

10

15

~fmax:= maximum clock frequency
tpLH := propagation delay time, low-to-high-Ievel output
tpHL:= propagation delay time, high-to-Iow-Ievel output
tpZH := output enable time to high level
tpZL := output enable time to low level
tpHZ "" output disable time from high level
tpLZ "" output disable time from low level
NOTE 1: For testing f max , all outputs are loaded simultaneously, each with CL and RL as specified for the propagation times_
See General Information Section for load cifcuits and voltage waveforms.

II
-I
-I
r-

o

m

~

(")

m

en

3-976

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

ns

ns
ns
ns

TYPES SN54LS347, SN74LS347
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
02426. NOVEMBER 1977-REVISED DECEMBER 1983

SN54LS347 .•. J OR W PACKAGE
SN74LS347 ... D. J OR N PACKAGE

Low-Voltage Version of
SN54LS47/SN74LS47

ITOPVIEWI

Open-Collector Outputs
Drive Indicators Directly
•

Lamp-Test Provision

•

Leading/Trailing Zero
Suppression

B
e
LT
BI/RBO
RBI
D
A
GND

Lamp Intensity
Modulation Capability
description

SN54LS347 ... FK PACKAGE
SN74LS347 ... FN PACKAGE

The 'LS347 feature active-low outputs designed for
driving common-anode VLEDs or incandescent indicators directly. These circuits also have full rippleblanking input/output controls and a lamp test input.
Segment identification and resultant displays are
shown on the next page. Display patterns for BeD
input counts above 9 are unique symbols to authenticate input conditions.

ITOPVIEWI
U

U U
UIllZ>_

The 'LS347 incorporate automatic leading and/or
trailing-edge zero-blanking control (RBI and RBOI.
Lamp test (L T) may be performed at any time when
the Bi/RBO node is at a high level. These devices
also contain an overriding blanking input (81) which
can be used to control the lamp intensity by pulsing
or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL logic outputs.

NC - No internal connection

en
w

CJ

>
w

logic symbol t

C

BINn-SEG C>

BimBo

L

....

L
A
(1)

B
(2)

oft

V20
1

G21

:To.J

a 20.21 ~

b 20.21

Q

2

c 20.21 ~

4

d 20.21

Q

e 20.21 ~

(6)

D

lI-

;;'1

(3)

(7)

-I

1T1)

(4)

(5)

c

Vee
f
g
a
b
c
d
e

8
f 20.21

Q

9 20.21 ~

(13)
(12)
(11)
(10)
(9)

(15)
(14)

Pin numbers shown on logic notation are for D, J or N packages.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::S~~fl~ar;liu~~Ot~~~~~~nof~~f:~~~~e~~;s~

-1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-977

TYPES SN54LS347, SN74LS347
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS

DRIVER OUTPUTS
TYPE

TYPICAL

ACTIVE

OUTPUT

SINK

MAX

POWER

LEVEL

CONFIGURA TlON

CURRENT

VOLTAGE

DISSIPATION

SN54LS347

low

open-collector

12mA

7V

35mW

SN74LS347

low

open-collector

24mA

7V

35mW

f/-9 /b

e/=Ic

6

4

8

9

10

11

12

13

14

15

FONT TABLE T1 - NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS

d

SEGMENT
IDENTIFICATION
FUNCTION TABLE
DECIMAL

INPUTS

OR

II
-I
-I

r-

OUTPUTS

BiIRBOt

FUNC'TION

LT

RBI

D

C

B

0

H

H

L

L

L

L

1

H

X

L

L

L

H

2

H

X

L

L

H

L

3

H

X

L

L

H

4

H

X

L

H

5

H

X

L

6

H

X

NOTE
f

a

b

H

ON

ON

ON

ON

ON

ON

9
OFF

H

OFF

ON

ON

OFF

OFF

OFF

OFF

H

ON

ON

OFF

ON

ON

OFF

ON

H

H

ON

ON

ON

ON

OFF

OFF

ON

L

L

H

OFF

ON

ON

OFF

OFF

ON

ON

H

L

H

H

ON

OFF

ON

ON

OFF

ON

ON

L

H

H

L

H

OFF

OFF

ON

ON

ON

ON

ON
OFF

A

c

d

e

7

H

X

L

H

H

H

H

ON

ON

ON

OFF

OFF

OFF

8

H

X

.L

L

L

L

H

ON

ON

ON

ON

ON

ON

ON

9

H

X

H

L

L

H

H

ON

ON

ON

OFF

OFF

ON

ON

10

H

X

H

L

H

L

H

OFF

OFF

OFF

ON

ON

OFF

ON

11

H

X

H

L

H

H

H

OFF

OFF

ON

ON

OFF

OFF

ON

12

H

X

H

H

L

L

H

OFF

ON

OFF

OFF

OFF

ON

ON

1

C
m

13

H

X

H

H

L

H

H

ON

OFF

OFF

ON

OFF

ON

ON

14

H

X

H

H

H

L

H

OFF

OF

OFF

ON

ON

ON

ON

15

H

X

H

H

H

H

H

OFF

OFF

OFF

OFF

OFF

OFF

OFF

(")

BI

X

X

X

X

X

X

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

RBI

H

L

L

L

L

L

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

3

LT

L

X

X

X

X

X

H

ON

ON

ON

ON

ON

ON

ON

4

<

m

en

2

H = high level, L = low level, X = irrelevant
NOTES: 1. The blanking Input lSi) must be open or held at a high logic level when output functions 0 through 15 are desired. The
ripple blanking input (Ral) must be open or high if blanking of a decimal zerO is not desired.
2. When a low logic level ,is applied directly to the blanking input (81), all segment outputs are off regardless of the level of any
other input.
3. When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp test input high, all segment outputs
go off and the ripple blanking output (ABO) goes to a low level (response condition).
4. When the blanking input/ripple blanking output (Bi/RBO) is open or held and a low is applied to the lamp test input, all
segment outputs are on.
tSi/RiiO is wire AND logic serving as blanking input (Si) and/or ripple-blanking output (RBO).

3-978

TEXAS .",
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS347, SN74LS347
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V CC (see Note 1) ............................................................... 7 V
Input voltage ............................................................................... 7 V
Peak output current (tw ~ 1 ms, duty cycle 10%) ............................................. 200 mA
Current forced into any output in the off-state ................................................. " 1 mA
Operating free-air temperature range: SN54LS347 ....................................... - 55°C to 125°C
SN74LS347 ........................................... O°C to 70°C
Storage temperature range .......................................................... - 65°C to 150°C

<

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS347

SN54LS347

Vee

Supply voltage

VIH

High-level input voltage

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

VIL

Low-level input voltage

VO(off)

Off-state output voltage

a thru g

UNIT
V
V

2
0.7

0.8

V

7

7

V
mA

IO(on)

On-state output current

a thru 9

12

24

IOH

High-level output current

BI/RBO

- 50

-50

J1.A

IOL

Low-level output current

BI/RBO

1.6

3.2

mA

TA

Operating free-ai r temperature

70

°e

- 55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH
VOL
10(oft)
VO(on)

8i/RBo
BI/RBO
a thru g
a thru g

MIN

TYPt

MAX

MIN

11=-18mA

Vee = MIN,

VIH=2V,

VIL = MAX,

VIH=2V,

!IOL=1.6mA

IOH = - 50J1.A

2.4

4.2
0.25

VIH=2V,

Vee = MAX

VIH=2V,

VIL = MAX,

I IO(on) -

VIL = MAX

II

Vee = MAX,

VI = 7 V

IIH

Vee = MAX,

VI=2.7V

Vee = MAX,

VI = 0.4 V

except BI/RBO

0.4

0.35

0.5

BI/RBO

0.25

0.4

0.35

0.5

Vee = MAX,

lee

See Note 2

mA
V

>
W

0.1

mA

C

20

20

J1.A

..J

- 0.4

- 0.4

-2
7

en
w

C,.)

0.1

-1.2
- 0.3

Vee= MAX

V

0.25

0.4

24 mA

BI/RBO
lOS

V

0.25

Any input
IlL

V

4.2

2.4
0.4

0.25
0.25

! IO(on) = 12 mA

UNIT

MAX
-1.5

I IOL = 3.2 mA

VIL = MAX
Vee = MAX,
VO(off) = 7 V

TYPt

-1.5

Vee = MIN,

Vee = MIN,

SN74LS347

SN54LS347

TEST eONDITIONSt

mA

lI-

- 1.2
-0.3

13

7

-2

mA

13

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vec = 5 V, T A = 25°e.
NOTE 2: lee is measured with all

ou~puts

switching characteristics, Vee
PARAMETER
toff

open and all inputs at 4.5 V.

= 5 V, TA =25°e
TEST CONDITIONS

Turn-off time from A input

ton

Turn-on time from A input

toff

Turn-off time from RBI input

ton

Turn-on time from RBI input

MIN

TYP

MAX

UNIT

100
RL=665.11,

eL = 15 pF

100
100

See Note 3

100

ns
ns

NOTE 3: See General Information Section for load circuits and voltage waveforms. toff corresponds to tpLH and ton corresponds to tpHL.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-979

TYPES SN54LS348, SN74LS348 (TIM9908)
8-LlNE TO 3-LlNE PRIORITY ENCODERS
WITH 3-STATE OUTPUTS
OCTOBER 1976-REVISED DECE,MBER 1983,

•

3-State Outputs Drive Bus Lines Directly

•

Encodes 8 Data Lines to 3-Line Binary (Octal)

•

Applications Include:
N-Bit Encoding
Code Converters and Generators

•

Typical Data Delay ... 15 ns

•

Typical Power Dissipation ... 60 mW

SN54LS348 ..• J OR W PACKAGE
SN74LS348 ..• 0, J OR N PACKAGE
(TOP VIEW)

4 ~ 1 U16
5
2
15
6 3
14
7
4
13

FUNCTION TABLE

II

EI

D

1

2

3

4

5

6

7

A2

A1

AD

GS

EO

H

X

X

X

X

X

X

X

X

Z

Z

Z

H

H

L

H

H

H

H

H

H

H

H

Z

Z

Z

H

L

-I
-I

L

X

X

X

X

X

X

X

H

X

X

X

X

X

L

L
L

L

X

L
L

L

L
L

L
H

H

X

X

X

X

H

H

L

H

L

C

L

X

X

X

X

H

H

L

H

H

L
L
L
L

':'

X

X

H

H

X

L
H
H

H

H

H

H
H

H

X

L
H
H

L
H

L
H

H

L
L

L
H

L
L
L
L
L

H

X

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

L
H

L

H

m

<

(")

m

en

L
L ,H

X

0
AD

8

1

SN54LS348 •.• FK PACKAGE
SN74LS348 •.• FN PACKAGE
(TOP VIEW)

LO '
W

C

..J

lI-

Pin numbers shown on logic notation are for D, J or N packages.

schematic of inputs and outputs
EQUIVALENT OF EACH INPUT
VCC----

TYPICAL OF OUTPUTS
AO, A1, A2
-~--.--VCC

TYPICAL OF OUTPUTS
EO,ES
------VCC

Req
I NPUT __:-iG-....-.......
OUTPUT

Inputs 1 thru 7: Req
All others: Req

~"'-+-- OUTPUT

=9
=

kn. NOM
18 kn. NOM

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-981

TYPES SN54LS348, SN74LS348 (TIM9908)
8-LlNE TO 3-LlNE PRIORITY ENCODERS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee (see Note 1) . . . . . .
Input voltage . . . . . . . . . . . . . .
Operating free·air temperature range: SN54LS348
SN74 LS348.
Storage temperature range

. • . . . 7V
. . . • . 7V
_55°C to 125°C
oOe to 70°C
_65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS348
Supply voltage, Vce

4.5

5

AO, A1.A2

High-level output current, 10H

SN74LS348

NOM MAX MIN

MIN

EO,GS

5.25

V

-2.6

mA

-400

-400

IJA

12

24

mA

8

mA

EO,GS

Operating free·air temperature. TA

5

4
-55

UNIT

-1

5.5 4.75

AO,A1, A2

Low-level output current, 10L

NOM MAX

125

0

70

°c

electrical characteristics·over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

lEI

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

-t
-t

r-

High·level

AO,A1,A2

output voltage

Low-level
VOL

C
m

~
m

10Z

(")
II

en

IIH

Vec= MIN,

II = -18 mA

VCC= MIN,

10H = -1 mA

VIH=2V,

10H = -2.6 mA

EO,GS

VIL = VILmax 10H= -4001JA

AO,A1,A2

Vee = MIN.
VIH=2V,

Output ·voltage

EO,GS

Off-State (high-impedance
state) output current

VIL = VILmax

AO, A1.A2

Input current at maximum

Inputs 1 thru 7

input voltage

All other inputs

High·level input current

IlL

Low-level input current

lOS

Short-circuit output current§

ICC

TEST CONDITIONSt

Inputs 1 thru 7
All other inputs
Inputs 1 thru 7
All other inputs
Outputs AO, A 1, A2
Outputs EO. GS

Supply current

SN54LS348

SN74LS348

MIN TYP* MAX MIN TYP* MAX
2
2

2.4

3.1

2.5

3.4
0.25

10L = 12 mA

0.25

0.8

V

-1.5

-1.5

V

2.4

3.1

2.7

3.4

0.4
0.4

10L =8 mA

0.25

V
0.4

0.35

0.5

0.25

0.4

0.35

0.5

VCC = MAX,

VO=2.7V

20

20

VIH = 2V

Vo =0.4 V

-20

-20

0.2

0.2

0.1

0.1

40

40

VCC=MAX,

VI =7V

Vec= MAX,

VI = 2.7 V

Vec= MAX,

VI =0.4 V

Vee = MAX

V

0.7

10L -24mA
IOL=4mA

UNIT

20

20

-0.8

-0.8

-0.4

-0.4

-30

-130 -30

-20

-100 -20

-130
-100

Vce= MAX,

Condition 1

13

25

13

25

See Note 2

Condition 2

12

23

12

23

V

IJA
mA
IJA
mA
mA
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*All tvpical values are at V CC

= 5 V, T A = 25° C.

§ Not more than one output should be shorted at a time.
NOTE 2: ICC (condition 1) is measured with inputs 7 and EI grounded, other inputs and outputs open. ICC (condition 2) is measured with all
inputs and outputs open.

TEXAS •
3-982

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS348, SN74LS348 (TIM9908)
8-LlNE TO 3-LlNE PRIORITY ENCODERS WITH 3-STATE OUTPUTS
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER~

FROM

TO

(INPUT)

(OUTPUT)

WAVEFORM

TEST CONDITIONS

MIN

TYP MAX UNIT

In-phase

11

17

tPHL

output

20

30

tpLH

Out-ot-phase

23

35

23
25

35
39

24

41

tpLH

1 thru 7
1 thru 7

tpHL
tPZH

EI

AO, A1, orA2
AO, A1, or A2

output

CL = 45 pF,
RL = 667

n,

See Note 3

AO, A1, orA2

tPZL
tpLH

o thru 7

tpHL
tpLH

EO

o thru 7

tpHL
tpLH

Out-ot-phase

11

18

output

26

40

In-phase

38

55

9
11

21

14

36

GS

EI

output
In-phase

GS

CL=15pF
RL = 2

kn,

See Note 3

17

tPHL

output

tPLH

In-phase

17

26

output

25

40

EI

EO

tPHL
tPHZ

EI

CL - 5 pF

AO, Al,orA2

RL = 667

tPLZ
~ tpLH = propagation delay time, low-to-hlgh-Ievel output
tpHL = propagation delay time, hlgh-to-Iow-Ievel output
tPZH = output enable time to high level
tpZL = output enable time to low level
tpHZ = output disable time from high level
tpLZ = output disable time from low level
NOTE 3: See General Information Section for load circuits and voltage

n

18

27

23

35

ns
ns
ns
ns
ns
ns
ns
ns

wav~forms,

II

TYPICAL APPLICATION DATA

en
w

u
5>
w

UP TO 64 LINES

C

EO
AO

A1

A2

GS

A2

'LS348

EI

A2

GS

I

GS

ENABLE
INPUT

...J

ff-

I

LSB

FIGURE 1-PRIORITV ENCODER WITH UP TO 64 INPUTS.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-983

II
-f
-f
rC

m

~

n

m

·en

3-984

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
02745 DECEMBER 1983

• Shifts 4-Bits of Data to O. 1.2 or 3
Places Under Control of Two Select Lines

SN54S350 ... J PACKAGE
SN74S350 .•. 0, J OR N PACKAGE
(TOPVIEWI

• Three-State Outputs for Bus Organized
Systems

Vee
YO
Y1

• 6.5 ns Typical Data Propagation Delay

OE

description
The 'S350 is operationally equivalent to a 4-input
multiplexer with the inputs connected so that the select
code causes shifts of the data word. This makes it possible to perform shifts of 0, 1,2, or 3 places on words of
any length, with suitable interconnection.

~'---~-

Y2
Y3
SO
S1

SN54S350 ..• FK PACKAGE
SN74S350 .•. FN PACKAGE

A 7-bit data word is introduced at the D inputs and is
shifted according to the code applied to the select inputs SO and 51. YO through Y3 are 3-state outputs controlled by an output enable, OE. When OE is J£.w,
the outputs follow the selected data inputs; when OE is
high, the outputs are in a high-impedance state. This
feature allows shifters to be cascaded on the same output lines or to a common bus. The shift function can be
logical with zeroes pulled in at either or both ends of the
shifting field, arithmetic with the sign bit repeated
during a shift down, or end-around with the data word
forming a continuous loop.

(TOPVIEWI

Cil

C'(

u ~o

OOZ>>-

D-1

D1

II

FUNCTION TABLE
INPUTS

NC - No internal connection

OUTPUTS

OE

51

so

YO

Yl

Y2

Y3

H

X

X

Z

Z

Z

Z

L

L

DO

Dl

D2

D3

L

L

,H

D-l

DO

Dl

D2

L

H

L

D-2

D-l

DO

Dl

51 Dl + so 51 DO + so Sl
Y2 = so 51 D2 + so 51 Dl + so Sl

L

H

H

D-3

D-2

D-l

DO

Y3=soSi D3+S051 D2+5OS1 Dl +50S1 DO

L

CJ)

logic equations
-YO = So 51 DO + SO
Yl = so

51 D-l + So Sl

D·2 +

so Sl

D·3

D·l + SO Sl D·2
DO + SO Sl D-l

W

CJ

>
w

C

..J

lI-

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:::S:;~[I~arntl!'u:~Ot~~~l~~nof~~f~:~~'::e~::s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-985

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
logic symbol

logic diagram

DE
so
Sl

03
02
01
DO
0-1
0-2
0-3

(13)
(10)
(9)

(7)

Z10

(6)

Zll

(5)

Z12

(4)

Z13

(3)

Z14

(2)

Z15

(1)

Z16

10
11
12
13
11
12
13
14
12
13
14
15
13
14
15
16

(11)

(12)

(14)

2
3

(15)

V

Y3

Y2

Yl

YO

Pin numbers shown on logic notation are for O. J or N packages_

II
--t
--t
rC

m

:5

schematics of inputs and outputs

n

TYPICAL OF ALL OUTPUTS

EaUIVALENT OF EACH INPUT

m

rn

- - - - -...-VCC
50 n
NOM

VCC-----eReq

INPUT ___--e~
OUTPUT

0-2. 02: Req = 1.4 kn NOM
0-1.01: Req = 0.93 kn NOM
DO: Req = 0.7 kn NOM
All other: Req = 2.8 kn NOM

3-986

TEXAS

l!1

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ........................................................... ~ ... 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Voltage applied to a disabled 3-state output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54S350 ... . . . . . . . . . . . . .. ...................... - 55°C to 125°C
SN74S350 ........................................... oOe to 70°C
Storage temperature range .......................................................... - 65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54S350

SN74S350

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0_8

IOH

High-level output current

-2

-6.5

mA

20

mA

70

°e

IOL

Low-level output current

TA

Operating free-air temperature

2

2

V

20
-55

125

V

a

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

TEST CONDITIONSt
Vee; MIN,

11;-18mA

Vee; MIN,

VIH; 2 V,

VIL; 0.8 V,

VIH;2V,

VIL; 0.8 V,

VOL

TYP

SN74S350

MAX

MIN

TYP

-1.2

IOH; MAX
Vee; MIN,

SN54S350
MIN

2.4

3.4

-1.2
2.4

UNIT
V
V

3.4

0.5

IOL; 20 mA

MAX

0.5

V

IOZH

Vee; MAX,

yo;

2.4 V

50

50

JlA

IOZL

Vee- MAX,

VO;0.5V

-50

JlA

II

Vee - MAX,

VI- 5.5 V

1

-50
1

Vee; MAX,

VI; 2.7 V

75

75

50

50

mA

0-2, 0-1, 0-0,
IIH

01,02 inputs
All others
01,02 inputs

Vee; MAX,

VI;0.5V

All others
IOS§
lee

en
w

(J

>
W
C
...J

0-2, 0-1 0-0,
IlL

JlA

II

Vee; MAX,
Vee - MAX,

Vo; a
VI- a

-40

-3

-2

-2

-100
60

All inputs; GND

-3

-40

85

60

rnA

-100

rnA

85

rnA

lI-

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t

All typical values are at Vee; 5 V, T A; 25°C.
§Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-987

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
switching characteristics, Vee
PARAMETER
tpLH

= 5 V, T A = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

Data

Any Y

Select

Any Y

TEST CONDITIONS

tpHL
tpLH

RL=280.\1,

CL=15pF

tpHL

MIN

TYP

DE

5

9

ns

12

ns

11

17

ns

13

20

ns

19.5

ns

Any Y

tpHZ
tpLZ

DE

Any Y

RL = 280.\1,

CL = 5 pF

-

NOTE 2: See General Information Section for load circuits and voltage waveforms.

11
-f
-f

r-

o

m

~

C1

m

CJ)

3-988

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

8

tpZH
tpZL

MAX

21

ns

8

13

ns

10

15

ns

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
TYPICAL APPLICATION DATA
16-Bit Shift-Up 0 to 3 Places. Zero Backfill

o

1 2 3

4

""-

TTl

-b

ccccccc
NW

WN.:.aO~NW

r - - SO

r - - SO
r - Sl

r<

II

I

cccce-cc

6 7

WN":"O...l

8 91011

I

I

I

....--so Z~~gg28IFrSO

-Sl

OE YO Yl Y2 Y3

12131415

-Sl

-<: OE YO Yl Y2 Y3

I

Z~~gg28

-Sl

oil OE YO

Yl

Y2 Y3

rC OE YO Yl Y2 Y3

SO
Sl

DE

o

1

2

3

4

8

5

9

10

11

12

13 14

15

Sl SO
L

L

L

H SHIFT 1 PLACE

NO SHIFT

H L SHIFT2PLACES

8-Bit

H H SHIFT3PLACES
Shift 0 to 7 Places

End-Ar~und

o

4 5 6 7

1 2 3

, , 1

I 1. -

-J....

....

I

I

T

ccccccc
wr:.:,":"O-AI\lW
r---SO

-so

~Sl

r-Sl

rC OEyO Yl Y2 Y3
SO
Sl
S2

rC

T

ccccccc
W r:.,.:.a o·...a N W

OE YO

II

ccccccc

WN~O-NW

....-- so

r

r-Sl
Yl

Y2 Y3

OEyO

Yl

Y2 Y3

.,.,

-

frSO

II

ccccccc
"~~O~N~

~:~YO

Yl Y2 Y3

en

w
U

>
w

C

...I

lI-

L~

V

52 S1 SO

o

123

L

L

L NOSHIFT

L

L

H SHIFT END AROUND 1

4

6

L H L SHIFT END AROUND 2
L

H H SHIFT END AROUND 3

H L

L SHIFT END AROUND 4

.H L

H SHIFTENDAROUND5

H H L SHIFT END AROUND 6
H H H SHIFT END AROUND 7

TEXAS

-Ij}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-989

TYPES SN54S350, SN74S350
FOUR-BIT SHIFTER WITH THREE-STATE OUTPUTS
TYPICAL APPLICATION DATA
13·Bit Twos Complement Scaler'
121110 9

8 7 6 5

1I

WN.:..

. - - - so

-=-

so

I
I

S1

51 SO

Y2 Y3

I

I

I- 11I

12

L

WN~C

so

r-=-

.....

NW

...,.--- S1

rOEyO Y1

10

I

9

L;. 8

1/8
1/4

H L+2

1/2

I
I

I
I

I

I

I 7I 6I 5I

8

H H NO CHANGE

II
-4
-4

r-

C

m

=5

n

m

en

3·990·

0000000

so

WN.!..O"'NW

*O'll

r - - - 51

OEyO Y1 Y2 Y3

SCALE

H' H;.4

ITT

0000000

O ..... NW

r - - - S1

--

11

0000000

5

4 3 2 1

"II

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • CALLAS, TEXAS 7!52eS

V2 "

432

1

S

TYPE SN74351
DUAL DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
MARCH 1974 -

•

Dual 8-Line-to-1-Line Multiplexer That
Can Replace Two SN54151, SN74151
Multiplexers in Some Applications

•

Four Common Data Lines Permit Simultaneous
Interdigitation with Parallel-to-Serial Conversion

•

4-Bit Organization Is Easily Adapted to
Handle Binary or BCD

•

Three-State Outputs Can Be Connected
Directly to System Bus Lines

•

REVISED DECEMBER 1983

SN74351 ••• J OR N PACKAGE
(TOPVIEWI

vee

lY

G

2Y
200
201
202
203
04
05
06
07

A
B

e
100
101
102
103

Enable Input Controls Impedance Levels of the
12 Data Inputs and Two Outputs

GNO

description
The SN74351 comprises two 8-line-to-Hine data
selectors/multiplexers with full decoding on one
monolithic chip. SYmmetrically switching, complementary decode generators minimize decoder skew
during changes at the select inputs and ensure that
potentially erroneous effects are minimized at the
data outputs. Four data inputs are exclusive to each
multiplexer and four are common to both. A
common enable input is provided which, when high,
causes both outputs to assume the high-impedance
(off) state and simultaneously diverts the majority of
the input current, which reduces the load significantly on the data input drivers. A low logic level at
the enable input activates both outputs so that each
will assume the complement of the level of the
selected input.

FUNCTION TABLE
INPUTS
ENABLE

SELECT

OUTPUTS

G

c

B

A

1Y

2Y

H

X

X

X

Z

Z

L

L

L

L
H

L

H

L

L

100 200
101 201
102 202
103 203
54 04

L

H

L

H

55

55

L

H

H

L

06

06

L

H

H

H

07

OJ

L

L

L

L

L

H

L

L

L

H

H

-

II
en

w
U

H - high level. L = low level. X = irrelevant
Z = high impedance (off)
= The complement of the level of the respective
D input

Wo. 1'Di"•... D7

>

w
C

...J

....
....

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to these
specifications per the terms of Texas Instruments

~~n~ea::S':a~f,~r~liu~~Ot~~~~~~nor~~f:~~~n~e~~~s~

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DAL~AS. TEXAS 75265

3-991

TYPE SN74351
DUAL DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
logic diagram

II

~~1~S(:::_:~::~~__________+1~~~~

-t
-t
r0-

C
m

(181

2DO-------------=====~-'

<

Pin numbers shown on logic notation are for J or N packages.

(")

m

VJ

vccx-W--

schematics of inputs and outputs

EaUIVALENT OF EACH INPUT

TYPICAL OF BOTH OUTPUTS
- - -......-VCC

INPUT

OUTPUT

Enable, DO thru 03:.Req = 4 kfl NOM
04 thru 07: Req = 2 kfl NOM
A, B, or C: Req = 6.5 kfl NOM

3·992

TEXAS . "
INSTRUMENTS
POST O~FICE lOX 225012 • DALLAS, TE·XAS 7&285

TYPE SN74351
DUAL DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
I nput voltage . . . . . . . .
Operating free-air temperature range
Storage temperature range

7V

5.5V

oOe to 70 e
0

-6S

o

e to 150 e
0

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
Vee

Supply voltage

IOH

High-level output current

IOL

Low·level output current

TA

Operating free-air temperature

UNIT

MIN

NOM

MAX

4.75

5

5.25

V

-0.8

mA

16

mA

70

°e

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

VOL

Low-level output voltage

TEST CONDITIONS

*

MIN

TYP+ MAX

2

V
0.8

IOZH Off-state output current, high-level voltage applied
IOZL

Off state output current, low level voltage applied

II

Input current at maximum input voltage

Vee = MIN,

11=-12mA

Vee = MIN,

VIH = 2 V,

VIL = 0.8 V,

IOH =":"0.8 mA

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

IOL = 16 mA

Vee = MAX,

VIH=2V,

-1.5
2.4

0.2

VIH=2V,

VO=O.4V
Vee= MAX,

VI = 5.5 V

Vee = MAX,

VI = 2.4 V

Enable, any select,
IIH

High·level input current

any DO thru 03

IlL

Low·level input current

Vee = MAX,

40

j.lA

-40

j.lA

1

mA

en

j.lA

VI =0.5,

-40

j.lA

....I

-55

mA

66

mA

C

VI (enable) = 2 V
lOS

Short-circuit output current§

Vee = MAX

Ice

Supply current

Vee = MAX,

-18
See Note 2

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at Vee = 5 V, T A = 25°e.
§Not more than one output should be shorted at a time.
NOTE 2: lee is measured with the enable input grounded, other inputs and both outputs open.

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

44

w
U

>
w

-3.2
Vee= MAX,

II

mA

-1.6

VI = 0.4 V

04 thru 07
AnyO

V

80

Enable, any select,
any DO thru 03

V

0.4

40

04 thru 07

V

V

3.4

Vo = 2.4 V
Vee = MAX,

UNIT

lI-

TYPE SN74351
DUAL DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
switching characteristics, VCC = 5 V, TA = 25°C
FROM

TO

(INPUT)

(OUTPUT)

A, B, orC

Y

PARAMETER~

tpLH
tpHL
tPLH
tPHL
tpZH
tpZL
tpHZ
tpLZ

Any 0

TEST CONDITIONS

CL = 50 pF,

Y

G

MIN

RL=400n,

See Note 3

Y

G

CL=5pF,

Y

RL=400n,

See Note 3

TYP

MAX

20

30

20

30

10

22

10
18

22
33

20

33

6

20

10

20

UNIT
ns
ns
ns
ns

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TYPICAL APPLICATION DATA
This application illustrates how common data can be interdigitated onto two serial data lines. It is useful for
transmitting prefixes, suffixes, addresses, or similar functions.
to t1

A

12 t3 t4 t5 t6 t7

--IL-r1...JI--'

B~

c _ _- I - - -

SELECT { _ _ _ _ _ _ _..,
INPUTS

100'1

II

101-1::0~======

1D2~~~0---------------

VARIABLE {
DATA
_____

1D3'~1_______________

~

9 (NEGATIVE LOGIC)

r-

m

:5
("')

to t1 t2 t3 t4 t5 t6 t7
1Y

04

~
~

C

102

- - - - - - - ' - i 103

OUTPUT~

1Y

--..,..-~

9

05
04

.J 0

05~~~1

_______________

06'~1============
.J-O

~OMMON{---H.
DATA

07

07
SN74351

---H-H~ 07

6 (NEGATIVE L,OGIC)

m

6

(POSITIVE LOGIC)

06

06
05

C/'J

to t1 t2 t3

04
2D3.J~0---------------

202.1 0
201J~0---------------

-----~ 200

2Y

•

I

G

ENABLE _ _ _ _ _ _ _....J

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 226012 •

8

'''-v----'
6

(POSITIVE LOGIC)

G

3-994

t4 t5 t6 t7

OUTPUT~

202
VARIABLE{
DATA
- - - - - - ' - i 201

2DO'~_1_______________

8 (NEGATIVE LOGIC)

2Y

203

DA~~AS.

TEXAS 7e2eS

VARIABLE
DATA

I

COMMON
DATA

I

TYPES SN54LS352, SN74LS352
DUAL4-LlNETO 1-LlNE DATASELECTORS/MULTIPLEXERS
OCTOBER 1976 -

• Inverting Versions of SN54LS153, SN74LS153

REVISED DECEMBER 1983

SN54LS352 ... J OR W PACKAGE
SN74LS352 ... D. J OR N PACKAGE

• Schottky-Diode-Clamped Transistors

(TOP VIEW)

• Permits Multiplexing from N lines to 1 line

1<3
B

• Performs Parallel-to-Serial Conversion

A

lC3
lC2
lCl
lCO
lY
GND

• Typical Average Propagation Delay Times:
Data Input to Output ... 15 ns
Strobe Input to Output ... 19 ns
Select Input to Output ... 22 ns
• Fully Compatible with most TTL
Circuits

2C3
2C2
2Cl
2CO
2Y

SN54LS352 ... FK PACKAGE
SN74LS352 .•. FN PACKAGE

• Low Power Dissipation ... 31 mW Typical
(Enabled)

(TOP VIEW)

description

u

col~ ~ ~I~

Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply
fully complementary. on-chip. binary decoding data
selection to the AN D-OR-invert gates. Separate strobe
inputs are provided for each of the two four-line
sections.

II

>-cu
..... zz

FUNCTION TABLE
SELECT

(!)

STROBE OUTPUT

DATA INPUTS

INPUTS
B

A

CO

C1

C2

C3

G

V

X

X

X

X

X

X

H

H

L

L

L

X

X

X

L

H

L

L

H

X

X

X

L

L

L

H

X

L

X

X

L

H

L

H

X

H

X

X

L

L

H

L

X

X

L

X

L

H

H

L

X

X

H

X

L

L

H

H

X

X

X

L

L

H

H

H

X

X

X

H

L

L

NC - No internal connection

en
w

U

>
w

C

-J

lI-

Select inputs A and B are common to both sections.
H = high level, L = low level, X = irrelevant

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . .
Input voltage . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS352
SN74LS352
Storage temperature range

.... 7 V
. ... 7 V
-55°C to 125°C
oOe to 70°C
. -65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

PRODUCTION DATA

This document contains information current as
of ~ublication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s~~r,~ar~liu:~Ot~~~:~~nor~~f~~~~~e~~::'

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-995

TYPES SN54LS352, SN74LS352
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS

logic diagram

OUTPUT

1V

2CO~I1~O)~------~~~-r~
2C1 (11)
DATA 2

2C2 (12 )

2Y

2C3 (13)

STROBE 2G
(ENABLE) (15)

II
-I
-I

r-

Pin numbers shown on logic notation are for D. J or N packages.

schematics of inputs and outputs
EQUIVALENT OF
INPUTS

C

m

<

(")

G

EQUIVALENT OF ALL OTHER INPUTS

TYPICAL OF BOTH OUTPUTS
----..--VCC

VCC------~-----

m

10 kn NOM

(J)

VCC--.._--

120 n NOM

20 kn NOM

INPUT
INPUT ....t4-~-...OUTPUT

3-996

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS352, SN74LS352
DUAL 4-LINE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
recommended operating conditions
SN54lS352

Vce

Supply voltage

VIH

High·level input voltage

Vil

low·level input voltage

IOH

High-level output current

IOl

Low-level output current

TA

Operating free-air temperature

SN74lS352

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V
V

2

2

UNIT

0.7

0.8

-0.4

-0.4

mA

8

mA

70

°e

4
-55

125

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

Vec= MIN,

II = -18 mA

Vee = MIN,

VIH=2V,

MIN

Vec = MIN,

Vil = MAX,

VIH =2 V,

IIH

I
I

G
All other

Vec = MAX,

VI =7 V

Vec = MAX,

VI- 2.7 V

VCC = MAX,

IOS§

VCC = MAX

ICCl

Vec = MAX,

SN74lS352

MAX

MIN

TYP

3.4

2.5

0.25

IIOl=4mA

2.7
0.4

3.4
0.4

0.35

0.5

See Note 2

V
mA

20

20

p.A

-0.2

-0.2

-100
6.2

V

0.1

-0.4
-20

UNIT

V

0.25

0.1

VI = 0.4 V

MAX
-1.5

1 IOl =8 mA

Vil = MAX

II

TYP

-1.5

IOH = -0.4mA

VOL

III

SN54lS352

TEST CONDITIONSt

-0.4
-20

10

6.2

mA

-100

mA

10

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating •
. All typical values are at Vee = 5 V, T A = 2Soe.
§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
NOTE 2: leeL is measured with the outputs open and all inputs grounded.

II

switching characteristics, Vee = 5 V, TA = 25°e
PARAMETER 11
tplH

FROM

TO

(INPUT)

(OUTPUT)
y

Data

TEST CONDITIONS

Data

Y

tPlH

Aor B

y

Rl = 2 kfl,

tpHl

Aor B

y

See Note 3

G

tpHl

G

TYP

MAX

UNIT

13

20

ns

17

26

ns

19

29

ns

en
w

(J

tpHl

tplH

MIN

Cl = 15pF,

25

38

ns

y

16

24

ns

y

21

32

ns

:>w
C

..J

lI-

tpLH = propagation delay time, low-to-high-Ievel output
tpHL = propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

11

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-997

TYPES SN54LS353, SN74LS353
. DUAL 4-LlNE TO' 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
BULLETIN NO. DL.s 12464, OCTO BE R 1976-REVISED DECEMBER 1983

SN54LS353 •.• J OR W PACKAGE
SN74LS353 ... D, J OR N PACKAGE

• Inverting Versions of SN54LS253, SN74LS253
• Schottky-Diode-Clamped Transistors

(TOP VIEW)

• Permits Multiplexing from N lines to 1 line

lG
B
lC3
lC2
lCl
lCO
lY
GND

• Performs Parallel-to-Serial Conversion
• Typical Average Propagation Delay Times:
Data Input to Output ... 12 ns
Control Input to Output ... 16 ns
Select Input to Output .•• 21 ns
• Fully Compatible with most TTL Circuits
• Low Power Dissipation ••. 35 mW Typical
(Enabled)

Vce
2G
A
2C3
2C2
2Cl
2CO
2Y

SN54LS353 ..• FK PACKAGE
SN74LS353 ... FN PACKAGE
(TOP VIEW)

• Inverted Data

U

IDI~ ~ ~I~

description
Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data
selection to the AND-DR-invert gates. Separate output
control inputs are provided for each of the two four-line
sections.

lCl
lCO

The three-state outputs can interface with and drive data
lines of bus-organized systems. With all but one of the
common outputs disabled (at a high-impedance state)
the low-impedance of the single enabled output will
drive the bus line to a high or low logic level.

II
-I
-I
r-

lC3
lC2

logic

A
2C3
NC

2Cl

NC - No internal connection

FUNCTION TABLE
SELECT
INPUTS
A
B

C
m

:$

(")

m

~

DATA INPUTS
CO

Cl

C2

X

X

X

l
l
l
l
H
H
H

l
l

l

X
X
X

X
X
X
X
X

H

H
H
l
l

H
H

H

l

X
X
X
X
X
X

H

l

X
X
X
X

H
X
X

OUTPUT
OUTPUT
CONTROL
y
C3
G
Z
X
H
H
X
l
l
X
l
H
X
l
l
X
l
H
X
l
l
X
l
H
l
l
H
L
l

Select inputs A and B are common to both sections.
H

= high

level. L

= low

level, X

= irrelevant.

Z

=

high impedance (off)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply Voltage, VCC (see Note 1)
Input voltage . . . . . . . . . . . . . . .
Off-state output voltage . . . . . . . . . . .
Operating free-air temperature range: SN54LS353
SN74LS353
Storage temperature range . . . .
NOTE

1: Voltage values are with respect to network ground terminal.

PRODUCTION DATA

3-998

7V
7V
5.5 V
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

"EXAS

This document contains information current as
of publication date. Products conform to

~f:~~!~~t~~~rae:t~~ep~~~~ti~!eXr~~~~~~~~m::~~
not necessarily include testing of all parameters.

II

~

l

IN STRU ME NTS
POST OFFiCe BOX

225012 •

DALLAS, TeXAS

75265

TYPES SN54LS353, SN74LS353
DUAL 4-LlNE TO 1-LlNE DATA SELECTORSI
MULTIPLEXERS WITH 3-STATE OUTPUTS
logic diagram
OUTPUT
CONTROL (1)

IG

DATA 1

2CO (10)

2Cl~(1~1)________-r~~~~'
DATA 2

II

OUTPUT

2C2 (12)

2Y

2C3 (13)

en
w
CJ

>
w

Pin numbers shown on logic notation are for D, J or N packages.

C

...
...J

schematic of inputs and outputs
EQUIVALENT OF Gl. G2 INPUTS

EQUIVALENT OF ALL OTHER INPUTS
VCC----

VCC
10 k!1 NOM

19

INPUT

TYPICAL OF BOTH OUTPUTS

I-

----..-VCC

20k!1 NOM

INPUT-..fooI...-........
OUTPUT

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-999

TYPES SN54LS353, SN74LS353
DUAL 4-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
recommended operating conditions
SN54 LS353
VCC Supply voltage
VIH High-level input voltage

SN74LS353

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

UNIT
V
V

2

VIL

Low-level input voltage

0.7

0.8

10H

High-level output current
Low-level output current

-1

-2.6

mA

8

mA
°c

10L
TA

Operating free-air temperature

4
125

-55

70

0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIK
VOH

11=-18mA
VIH-2V,

VCC = MIN,

VIH=2V,

VCC = MAX,

II

VCC - MAX,

VI-7 V

VCC -MAX,

VI-2.7V

VCC =MAX,

VI=O.4V

l
I

IlL

G1,G1
All other

10S§

VCC = MAX

ICC

VCC = MAX,

2.4

3.4
0.25

10L =8 mA
Vo - 2.7 V

VIH = 2 V

IIH

TYPt

10L =4 mA

VIL = MAX

102

MIN

MAX

MIN

TYPt

2.4

3.1

-1.5
VIL - MAX,

10H = MAX

VOL

II

VCC =MIN,
VCC - MIN,

SN74LS353

SN54LS353

TEST CONDITIONS t

PARAMETER

VO=O.4V

-1.5

0.4

0.25

0.4

0.35

0.5
20
-20

0.1

0.1

20

20

-0.2

-0.2

- 0.4

-0.4
-30

UNIT
V
V

20
-20

-130

-30
See Note 2

MAX

-130

Condition A

7

12

7

12

Condition B

8.5

14

8.5

14

V
p.A
mA
p.A
mA
mA
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, TA = 25°e.
_
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 2: lee is measured with the outputs open under the following conditions;
A. All inputs grounded.
B. Output control at 4.5 V, all inputs grounded.

switching characteristics, Vee
PARAMETER~

tpLH

FROM
(INPUT)
Data

= 5 V, TA = 25~e
TO
(OUTPUT)

TEST CONDITIONS

Y

tpHL
tpLH

Select

tpHL
tpZH

Output

tpZL

Control

tpHZ

Output

tpLZ

Control

RL =2 kn,

CL=15pF,

Y

See Note 3

Y
RL = 2 kn,

CL=5pF,
See Note 3

Y

~ tp LH '" Propagation delay ti~low-to-high-leVel output
tpHL '" Propagation delay time, high-to-Iow-Ievel output
tpZH'" Output enable time to high level
tpZL'" Output enable time to low level
tpHZ '" Output disable time from high level
tpLZ'" Output disable time from low level
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1000

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MIN

TYP

MAX

11

25

13

20

20

45

21

32

11

23

15
27

23
41

12

27

UNIT
ns
ns
ns
ns

TYPES SN54LS354, SN54LS355, SN54LS356, SN54LS357,
SN74LS354, SN74LS355, SN74LS356, SN74LS357
a-LINE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
02544. JULY 1979-REVISEo APRil 1985

SN54LS354. SN54LS355 ... J PACKAGE
SN74LS354. SN74LS355 ... OW. J OR N PACKAGE

• Transparent Latches on Data
Select Inputs

(TOP VIEW)

• Choice of Data Registers:
Transparent ('LS354, 'LS355)
Edge-Triggered ('LS356:LS357)

20

05

3

18

04

4

17

VCC
Y
W
G3

03
02
01

16

G2

15
7

14

8

13

9
10

12

G1
SO
S1
S2
SC

07

19

06

• Choice of Outputs:
Three-State ('LS354, 'LS356)
Open-Collector ('LS355, 'LS357)

~

DC
GNO

• Complementary Outputs

11

• Easily Expandable
SN54LS354. SN54LS355 ... FK PACKAGE
SN74LS354. SN74LS355 ... FN PACKAGE

• High-Density 2O-Pin Package

(TOP VIEW)

description
I!)

(0"'"

u

U

000>>-

These monolithic data selectors/multiplexers contain
full on-chip binary decoding to select one of eight data
sources. The data-select address is stored in transparent
latches that are enabled by a low level on pin 11, SC. On
the 'LS354 and 'LS355 a similar enable for data is
obtained by a low level on pin 9, DC. The edge-triggered
data registers of the 'LS356 and 'LS357 are clocked by a·
low-to-high transition on pin 9, CLK. Complementary
outputs are available in either three-state versions
('LS354 and 'LS356) or open-collector versions ('LS355
and 'LS357).

3 2 1 20 19
04

4

03
02
01

00

18
17

W
G3

16

§2

15
14

G1
SO

9 10 111213

SN54LS356, SN54LS357 ... J PACKAGE
SN74LS357. SN74LS357 ... OW, J OR N PACKAGE
(TOP VIEW)

The SN54LS354 through SN54LS357 are characterized
for operation over the full military temperature range of
- 55° to 125 D C; the SN74LS354 through SN74LS357
are characterized for operation from ODC to 70 D C.

07
06
05

20
2

19

3

18
17

04

03
02
01

6

ClK
GNO

16

G.z

15

G1
. SO

14

00

vCC
Y
W
G3

13
9

12

10

11

en
w

C,.)

>
W
C

S1
S2
SC

..J

SN54LS356, SN54LS357 .•. FK PACKAGE
SN74LS356, SN74LS357 ... FN PACKAGE

lI-

(TOP VIEW)

3 2

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
speCIfications per the terms of Texas Instruments

~~~n~ea;:s~~[I~ar~liu~~Ot~~~f~~nof~~f~~~~r:ie~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

1 20 19

04

18

W

03
02

17

Q3

16
15

Q2

3-1001

TYPES SN.54LS354, SN54LS355, SN54LS356, SN54LS357,
SN74LS354,SN74LS355,SN74LS356,SN74LS357
8-L1NE TO 1-L1NE DATA SELECTORS/MULTIPLEXERS/REGISTERS
FUNCTION TABLE

schematics of inputs and outputs

INPUTS
DATA
SELECT

CONTROL
('LS354,

S2

Sl

SO

'LS355)

X
X
X

X
X
X

X
X
X

X
X
X

L

L

L

L

L

L

L

H

L

L

H

L

L

L

H

H

L

H

L

L

L

H

L

H

L

H

H

L

L

H

H

H

H

L

L

L

H

L

L

H

·H

L

H

L

H

L

H

H

H

H

L

L

H

H

L

H

H

H

H

L

H

H

H

H

CLOCK
('LS356,
'LS357)

X
X
X
H or L
H or L
H or L
Hor L
H or L
H or L
H or L
H or L

OUTPUTS

OUTPUT

EQUIVALENT OF EACH DATA OR SELECT INPUT

ENABLES

VCC--_--

Gl

G2

G3

W

Y

H

X

Z

Z

10kn

X
X

H

X
X

Z

Z

NOM

X

L

Z

Z

L

L

H

DO

00

L

L

H

L

L

H

DOn DOn
01
01

L

L

H

Dln

L

L

H

02

02

L

L

H

02n

02n

L

L

H

D3

03

L

L

H

D3 n

03 n

L

L

H

04

04

L

L

H

D4 n

04 n

L

L

H

05

05

L

L

H

D5 n

05 n

L

L

H

06

06

L

L

H

D6 n

06 n

L

L

H

07

07

L

LL

H

07 n

07 n

INPUT .....w........_-

01n

high level (steady state)
low level (steady state)
L
irrelevant (any input, including transitions)
high·impedance state (off state)
transition from low to high level
DO ... 07 ~ the level of steady·state inputs at inputs DO through
07, respectively, at the time of the low·to·high clock
transition in the case of 'LS356 and 'LS357
DOn' .• D7 n ~ the level of steady state inputs at inputs DO through
07, respectively, before the most recent low·to·high
transition of data control or clock
This column shows the input address setup with SC low.

EQUIVALENT OF ALL OTHER INPUTS

VCC-------

INPUT

H

IEI
-I
-I

rC

~

TYPICAL OF BOTH OUTPUTS ON 'LS354 AND 'LS356

m

S

TYPICAL OF BOTH OUTPUTS ON 'LS355 AND 'LS357

(')

m
fJ)

___ ~OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1) ..................................................................... 7 V
Input voltage ................................................................................ 7 V
Operating free-ai r tempe rature range: SN54 LS' ........................................... - 55° C to 125° C .
SN74LS' .............................................. 0" C to 70° C
Storage temperature range ............................................ '.' .........•.... - 65° C to 150° C
NOTE 1: Voltage values are with respect to network ground terminal.

3-1002

. TEXAS-li}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS354, SN54LS355, SN54LS356, SN54LS357,
SN74LS354,SN74LS355,SN74LS356,SN74LS357
a-LINE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
logic symbols
'LS354

'LS355

MUX

MUX
01
02

SO
Sl
S2

S2

elK (9)

DO
01

elK

(8)
90

0

(7)
90
90

3

90

4

90

5

90

6

90

7

01
(19)

2

"

(4)
04

00

I>

90

(6)
02
03 (5)

;:>1

Y

(13)
(12)
(9)
(8)
(7)

02 (6)

2

03 (5)
04

(19)

y

3

(4)
4

(3)
05
06
07

W

"

(2)
(1)

05

5

06
07

90

6

90

7

(1)

'LS356

'LS357

MUX

MUX

II
(IJ

W

U

EN

:>W
C
..J

lI-

DO (8)
01
02

(7)

90

0

;:>1

t>

90

(19)

(6)
(5)

03
04 (4)
05 (3)

90

2

90

3

90

4

90

5

06

90

6

07

90

(2)

"

(19)

Y

W

!f

05
06 (2)
07 (1)

90

Y

W

90
90

Pin numbers shown on logic notation are for OW. J or N packages.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1003

TYPES SN54LS354,·SN54LS355, SN74LS354, SN74LS355
8-L1NE TO 1-L1NE DATA SELECTORS/MULTIPLEXERS/REGISTERS
logic diagram (positive logic)
'LS354, 'LS355
, OUTPUT
ENABLES

s~~~~

S1 _(1_3_)--+--i

(BINARY)

S2 (12)

01 (7)

lEI
-I
-I

r-

02

(6)

03 (5)
DATA
INPUTS
04 (4)

C
m

<
om
en

05 (3)

06 (2)

07 (1)

Pin numbers shown on logic notation are for OW. J or N packages.

3-1004

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS356, SN54LS357, SN74LS356, SN74LS357
8-LlNE TO 1-UNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
logic diagram (positive logic)
'LS356, 'LS357
OUTPUT
ENABLES

OATA
SELECT
(BINARY)

Sl (13)

S2 (12)

01

171

-

i5ij.

02 (6)

03 (5)

en
w

u
5=
w

DATA
INPUTS
04 (4)

C

(3)
05

...I

.....
.....

D6 (2)

07 (1)

Pin numbers shown on logic notation are for OW. Jar N packages.

,

TEXAS"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1005

TYPES SN54LS354, SN54LS356, SN74LS354, SN74LS356
8-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS354

SN74LS354

SN54LS356

SN74LS356

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

0.7

0.8

.IOH

High·level output current

-1

-2.6

rnA

24

rnA

2

2

V

12

10L

Low·level output current

tsu

Setup times, high-or-Iow-Ievel data (with respect to t at pin 9)

th

Hold times, high-or-Iow-Ievel data (with respect to t at pin 9)

TA

Operating free-air temperature

'LS354

15

15

'LS356

15

15

'LS354

15

15

'LS356

0

0

-55

125

V
V

ns
ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74LS354

SN54LS354
PARAMETER

TEST CONDITIONSt

SN54LS356
MIN

VIK
VOH

r-

:5
C')

VIH = 2 V,

10L = 12 rnA

VIL

= MAX

II

Vee

I~e~

eLK,
Gl, G2, G3

MIN

2.4

= MAX,

VI

Vee = MAX,

VI

=7 V
= 2_7 V

Vee = MAX,

VI

= 0.4 V

I All others

10S§

Vee= MAX'

lee

Vee - MAX,

TYPt

-1.5

0.25

0.4

0.4

0_35

0.5

V

Va - 2.7 V

20

20

VO=0.4V

- 20

-20

0.1

0.1

rnA

20

20

J.lA

-0.2

-0.2

rnA

-0.4

-0.4

-30
See Note 2

-130
29

46

-30
29

t For conditions shown as MI N or MAX, use the appropriate values specified under recommended operating conditions.

§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 2: lee is measured with the inputs grounded and the outputs open.

3-1006

V
V

0.25

m *All typical values are at Vee = 5 V, T A = 25°e.

CJl

MAX

2.4

10L = 24 rnA

Vee = MAX

IlL

C
m

VIL-MAX

10Z

IIH

-f
-f

VIH-2V,

10H = MAX,

VOL

II

11=-18mA

Vee-MIN,

UNIT

SN74LS356

MAX
-1_5

Vee = MIN,

Vee= MIN,

TYPt

TEXAS . .
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

J.lA

-130

rnA

46

rnA

TYPES SN54LS354, SN54LS356, SN74LS354, SN74LS356
a-LINE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
WITH 3-STATE OUTPUTS
switching characteristics, Vee = 5 V, TA = 25°e, RL = 667 n
PARAMETER'

FROM
(INPUT)

tPLH
tpHL

tPLH
tpHL

DC

36

23

35

18

27

29

44

W
Y

CL

= 45 pF,

See Note 3

W

tpHL
tPLH
tpLH

24

Y

SO:S1 S2

tPLH

tpHL

MAX

or
CLK

tpLZ
tpZH

ns

28

42

18

27

26

39

33

50

22

33

24

36

33

50

18

27

29

44

30

45

24

45

28

48

28

42

36

54

34

51

30

45

36

54

40

60

27

41

32

48

40

60

36

54

14

27

14

25

18

27

17

25

= 5 pF,

15

25

16

24

See Note 3

15

25

16

24

CL

= 45 pF,

12

24

14

23

See Note 3

16

24

16

23

= 5 pF,

15

25

16

23

tPLZ

See Note 3

15

25

16

23

tpZH

CL

15

29

15

27

tpZL

See Note 3

19

29

18

27

CL,,5pF,

15

25

16

25

See Note 3

15

25

16

25

CL

tpZL

W

tpHZ

Y

tPHZ
tPLZ
tpZH
tpZL
tPHZ
tPLZ

G3

CL

CL

W

= 45 pF,

= 45 pF,

UNIT

ns

51

Y
G1,G2

MAX

47

tpZH
tpHZ

TYP

31

W

tpZL

MIN

34

Y
SC

tpHL

'LS356

TYP

W

tpLH
tpHL

'LS354
MIN

Y

tpHL
tpLH

TEST
CONDITIONS

00-07

tPLH

tpHL

TO
(OUTPUT)

13

25

14

25

See Note 3

17

25

16

25

CL = 5 pF,

15

25

16

25

See Note 3

15

25

16

25

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

II
en
w
CJ

>
w

C

..J

lI-

NOTE 3: See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1007

TYPES SN54LS355, SN54LS357, SN74LS355, SN74LS357
a-LINE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN74LS355

SN54LS355

SN74LS357

SN54LS357

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.7

0.8

VOH

High-level output voltage

5.5

5.5

V

IOL

Low-ievel output current

12

24

mA

tsu

Setup times, high-or-Iow-Ievel data, (with respect to t at pin 9)

2

th

Hold times, high-or low-level data (with respect to t at pin 9)

TA

Operating free-air temperature

V

2

'LS355

15

15

'LS357

15

15

'LS355

15

15

'LS357

0

0

- 55

125

V

ns
ns
70

0

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS355
PARAMETER

TEST CONDITIONSt

MIN
VIK
IOH

11=-18mA

Vee = MIN,

VIH=2V,

VIL = MAX

VIH = 2 V,

IIOL = 12 mA

r-

o
~

MIN

TYP*

0.4

IIOL = 24 mA

MAX
-1.5
0.1

0.25'

0.4

0.35

0.5
0.1

0.1

V
mA
V
mA

II

Vee = MAX,

VI = 7 V

IIH

Vee - MAX,

VI - 2.7 V

20

20

iJ,A

Vee = MAX,

VI:: 0.4 V

-0.2

-0.2

mA

-0.4

-0.4

IlL

-i
-i

VIL = MAX

0.25

UNIT

SN74LS357

MAX

0.1

VOH = 5.5 V

VOL

II

TYP*

-1.5

Vee = MIN,

Vee = MIN,

SN74LS355

SN54LS357

I~ec:.r

eLK,
G1, G2, G3

I All others
Vee = MAX,

lec

See Note 2

29

46

29

46

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

+All typical values are at Vee = 5
NOTE 2:

V, T A

= 25°e.

lec is measured with the inputs grounded and the outputs open.

("')

m

en

3-1008

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS355, SN54LS357, SN74LS355, SN74LS357
a-LINE T01-LlNE DATA SELECTORS/MULTIPLEXERS/REGISTERS
WITH OPEN-COLLECTOR OUTPUTS
switching characteristics,
PARAMETER~

FROM
(INPUT)

tPLH
tpHL

Vee

=

5

V, TA = 25°e,

RL = 667

n

(OUTPUT)

CONDITIONS

'LS357

'LS355

TEST

TO

MIN

TYP

MAX

34

41

26

39

Y

00-07

MIN

TYP

MAX

ns

30

45

tPHL

33

50

tpLH

38

57

27

41

31

47

34

51

33

50

32

48

39

59

23

35

39

59

38

57

36

49

40

60

32

48

38

57

39

58

35

53

45

68

44

66

42

63

41

62

44

66

41

62

45

68

41

62

tPLH

tpHL
tPLH

W

DC

Y

or
CLK

W

tpHL
tPLH
tpHL

Y

SO, S1, S2

tPLH

W

tpHL
tPLH
tpHL
tPLH

y

CL

= 45 pF,

See Note 3

SC
W

tpHL
tpHL
tpHL

-

y

G1, G2

ns

I

21

32

18

27

22

33

18

. 27

20

30

18

27

tpHL

19

29

21

32

tPLH

24

36

24

36

25

40

24

36

tPLH

tpHL
tPLH

W
Y

G3

W

tpHL
NOTE 3: See General Information Section for load circuits and voltage waveforms.

UNIT

19

31

19

31

19

29

19

29

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

en
w

C,)

>
W
C
...J

lI-

TEXAS ..Jt!}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1009

II
~
~

r-

C

m

<

("')

m

en

3-1010

TYPES SN54365A THRU SN54368A, SN54LS365A THRU SN54LS368A
SN74365A THRU SN74368A, SN74LS365A THRU SN74LS368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
REVISED DECEMBER 1983

• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers

SN54365A. 366A. SN54LS365A. 366A ... J PACKAGE
SN74365A. 366A ... J OR N PACKAGE
SN74LS365A. SN74LS366A ... D. J OR N PACKAGE
(TOP VIEW)

• Choice of True or Inverting Outputs
•

•

Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIP's
Dependable Texas Instruments Quality and
Reliability
'365A, '3U7A, 'LS365A, 'LS3U7A True Outputs
'366A, '368A, 'LS366A, 'LS368A Inverting
Outputs

Vee

G1
A1
Y1
A2
Y2
A3
Y3
GND

G2
A6
Y6
A5
Y5
A4
Y4

SN54LS365A. SN54LS366A ... FK PACKAGE
SN74LS365A. SN74LS366A •.• FN PACKAGE
(TOP VIEW)

descr'iption

U

:;;:1(; ~ ~I~

These Hex buffers and line drivers are designed
specifically to improve both the performance and density of three-state memory address drivers, clock drivers,
and bus oriented receivers and transmitters. The
designer has a choice of' selected combinations of
inverting and noninverting outputs, symmetrical G
(active-low control) inputs.

A6
Y6

Yl
A2

Ne

NC

Y2
A3

A5
Y5

These devices feature high fan-out, improved fan-in,
and can be used to drive terminated lines down to 133
ohms.
The SN54365A thru SN54368A and SN54LS365A thru
SN54LS368A are characterized for operation over the
full military temperature range of - 55°C to 125°C. The
SN74365A thru SN74368A and SN74LS365A thru
SN74LS368A are characterized for operation from ooe
to 70°C.

C")OU~~

>-zz>-w

2G
2A2
2Y2
2A1
2Y1
1A4
lY4

C

...J

lI-

SN54LS367A. SN54LS368A •.. FK PACKAGE
SN/4LS367A. SN74LS368A '" FN PACKAGE
(TOP VIEW)

:;;:I(!)U

~I(!)

.-.-Z>N

lYl
lA2

2A2
2Y2

NC

Ne

lY2
lA3

2Al
2Yl

NC - No internal connection

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s':a~iryar~llu~~Ot~~~:~~nof~~f~~~~n~e~~:s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1011

TYPES SN54365A THRU SN54368A, SN54LS365A THRU SN54LS368A
SN74365ATHRU SN74368A, SN74LS365A THRU SN74LS368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
schematics of inputs and outputs

'365A thrll '368A

EQUIVALENT OF ALL INPUTS

TYPICAL OF ALL OUTPUTS

Vee--'--

Vee

INPUT
OUTPUT

'LS365A thru 'LS368A
EQUIVALENT OF ALL DATA INPUTS

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF ALL G INPUTS

---'-Vee

Vee--"-18 kn NOM

V e e - -........- -

INPUT~......--.-

50

n

NOM

INPUT
OUTPUT

II
-I
-I

logic diagrams (positive logic)

C

Gl

=::;

G2

G2

Al

Al

(3) Yl

lAl

(3) lYl

1Al

A2

A2

(S)

Y2

lA2

(5) lY2

1A2

A3

A3

(7)

Y3

1A3

(7) lY3

1A3

lY3

A4

A4

(9)

Y4

1A4

1A4

lY4

A5

AS

YS

20

20

A6

A6

r-

m

nm

'366A, 'LS366A

'36SA, 'LS36SA
(11

Gl

'367A, 'LS367A

(1)

2Al

Pin numbers shown on logic notation are for 0, J or N packages.

3-1012

lG

lG

en

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

'368A, 'LS368A

(11) 2Yl

2Al

(3) lYl

(11) 2Y1

TYPES SN54365A THRU SN54368A, SN54LS365A THRU SN54LS368A
SN74365A THRU SN74368A, SN74LS365A THRU SN74LS368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
logic symbols
'366A

'365A

Yl

Yl

Y2

Y2

Y3

Y3

Y4

Y4

Y5

Y5

Y6

Y6

'368A

'367A

1G'
lAl
lA2
lA3
lA4

1Yl

lYl
lY2
lY3
lY4

lY2
lY3
lY4

2Yl
2Y2

2Yl
2Y2

II

2G
2Al
2A2

en
w
U

>
w

Pin numbers shown on logic notation are for D, J or N packages.

C

-oJ

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................. '.................................. 7 V
Input voltage: '365A, '366A, '367 A, '368A ....................... ~ . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
'LS365A, 'LS366A, 'LS367 A, 'LS368A ......... , .................................... 7 V
Voltage applied to a disabled 3-state output ...................................................... 5.5 V
Operating free-air temperature: SN54'................................................ - 55°C to 125°C
SN74' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
Storage temperature range ......................................................... - 65°C to 150°C

lI-

NOTE1: Voltage values are with respect to network ground terminal.

TEXAS

-1.!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1013

TYPES SN54365A, SN54367A
SN74365A, SN74367A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54365A
SN54367A

SN74365A
SN74367A

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

0.8

0.8

10H

High-level output current

-2

- 5.2

10L

Low-level output current

32

TA

Operating free-air temperature

2

V

2

125

- 55

0

mA

32

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54365A
SN54367A

TEST eONDITloNst
MIN

. VIK

Vee = MIN,

II = -12 mA

Vee = MIN,

VIH=2V,

TYP*

SN74365A
SN74367A

MAX

MIN

TYP*

UNIT

MAX
-1.5

-1.5

V

VIL = 0.8 V,
2.4

VOH

3.3

2.4

V

3.1

10H = MAX
Vee = MIN,

VIL = 0.8 V,

VIH=2V,

VOL

0.4

0.4

40

40

-40

-40

V

IOL=32mA
Vee = MAX,

11
-I
-I

r-

<
rn

/lA
Vee = MAX,

VIH = 2 V

VIL = 0.8 V,

Vo = 0.4 V
II

Vee = MAX,

VI = 5.5 V

1

1

mA

IIH

Vee = MAX,

VI = 2.4 V

40

40

/lA

Vee = MAX,

VI = 0.5 V,

Either G input at 2 V

-40

-40

/lA

Vee = MAX,

VI = 0.4 V,

Both

-'1.6

-1.6

Vee = MAX,

VI = 0.4 V

-1.6

-1.6

A Inputs
IlL

G Inputs

("')

m

VIL = 0.8 V,

10Z

C

m

VIH=2V,

Vo = 2.4 V

G inputs at 0.4 V

mA

lOS§

Vee = MAX

Ice

Vee = MAX,

-40
Data inputs = 0 V,

Output controls = 4.5 V

-130
65

-40

85

65

-130

mA

85

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at V cc = 5 V, T A = 25 0 C.
§ Not more than one output should be shorted at a time.

switching characteristics, Vee = 5 V, T A = 25°e (see note 2)
FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

TYP

MAX

UNIT

tPLH

16

ns

tpHL

22

ns

35

ns

RL =400
tpZH

Any

n,

eL = 50 pF

Y

tpZL

37

ns

tpHZ

11

ns

27

ns

RL =400

n,

eL

= 5 pF

tPLZ
NOTE 2: See General Information Section for load circuits and voltage waveforms,

3-1014

MIN

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54366A, SN54368A
SN74366A, SN74368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54366A
SN5436BA

SN74366A
SN7436BA

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

V

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

O.B

0.8

2

2

V

10H

High-level output current

-2

-5.2

10L

Low-level output current

32

32

mA

TA

Operating free-air temperature

70

°e

- 55

125

0

mA

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54366A
SN5436BA

TEST CONDITIONSt
MIN

VIK

Vee = MIN,

11=- 12 mA

Vee = MIN,

VIH = 2 V,

TYPt

SN74366A
SN74368A

MAX

MIN

UNIT

TYPt MAX
-1.5

- 1.5

V

VIL = 0.8 V,
2.4

VOH

3.3

2.4

3.1

V

10H = MAX
Vee = MIN,

VIH= 2 V,

VIL= 0.8 V,

VOL

0.4

0.4

40

40

-40

-40

V

IOL=32mA
Vee = MAX,

VIH=2V,

VIL = 0.8 V,

II

Vo = 2.4 V
/olA

10Z
Vee = MAX,

VIH = 2 V

VIL = 0.8 V,

VO= 0.4 V
II

Vee = MAX,

VI = 5.5 V

1

1

mA

IIH

Vee = MAX,

VI = 2.4 V

40

40

/olA

Vee = MAX,

VI = 0.5 V,

Either G input at 2 V

-40

-40

/olA

Vee = MAX,

VI = 0.4 V,

Both G inputs at 0.4 V

-1.6

-1.6

Vee = MAX,

VI = 0.4 V

-1.6

- 1.6

en
w

(J

>
W

A Inputs
IlL

G Inputs
10S§

Vee = MAX

lee

Vee = MAX,

-40
Data inputs = 0 V,

Output controls = 4.5 V,

-130
59

-40
59

77

mA

C
..oJ

-130

mA

77

mA

....
....

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

+All typical values are at Vee = 5 V, T A = 25

0
e.
§ Not more than one output should be shorted at a time.

switching characteristics, Vee

= 5 V, TA = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH

17

ns

tpHL

16

ns

35

ns

tpZL

37

ns

tPHZ

11

ns

27

ns

RL =400

n,

eL = 50 pF

tpZH
Any

Y

RL =400

n,

eL = 5 pF

tpLZ
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1015

TYPES SN54LS365A, SN54LS367 A
SN74LS365A,SN74LS367A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
rec;ommended operating conditions
SN54LS365A
SN54LS367A

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

SN74LS365A
SN74LS367A

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

IOL

Low-level output current

TA

Operating free-air temperature

UNIT

MIN

0.7

0.8

-1

- 2.6

12
- 55

125

V
V

2

0

V
mA

24

mA

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54LS365A
SN54LS367A

TEST CONDITIONSt

MIN
VIK

Vee = MIN,

11=-18mA

Vee = MIN,

VIH=2V,

TYPt

SN74LS365A
SN74LS367A

MAX

MIN

TYPt

-1.5

UNIT

MAX
-1.5

V

VIL = MAX,
2.4

VOH

3.3

2.4

V

3.1

IOH = MAX
Vee = MIN,

VIH=2V,

VIL = MAX,
0.25

0.4

0.25

0.4

0.35

0.5

IOL=12mA
V

VOL

II

Vee= MIN,

VIH=2V,

VIL = 0.8 V,

IOL = 24 mA
Vee = MAX,

-t
-t
r-

VIH=2V,

VIL = MAX,
20

20

- 20

- 20

0.1

0.1

mA

20

20

Il A

- 20

-20

}.LA

-0.4

-0.4

-0.2

- 0.2

Va = 2.4 V
Il A

IOZ
Vee = MAX,

VIH=2V,

VIL = MAX,

Va = 0.4 V

C
m

~
(j
m

en

II

Vee = MAX,

VI = 7 V

IIH

Vee = MAX,

VI = 2.7 V

Vee = MAX,

VI = 0.5 V,

Either G input at 2 V

Vee = MAX,

VI = 0.4 V,

Both G inputs at 0.4 V

Vee = MAX,

VI = 0.4 V

A Inputs
IlL
Glnputs
IOS§

Vee = MAX

lee

Vee = MAX,

-40
Data inputs = 0 V,

Output controls = 4.5 V,

t
:t

- 225
14

24

-40
14

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at Vee = 5 V, T A = 25 0 C.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

3-1016

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

mA

- 225

mA

24

mA

TYPES SN54LS365A, SN54LS367A
SN74LS365A,SN74LS367A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
switching characteristics, Vee

= 5 V, TA = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH

10

16

ns

tpHL

9

22

ns

19

35

ns

24

40

ns

30

ns

35

ns

RL=667n,
tpZH

Any

CL = 45 pF

Y

tpZL
tPHZ
RL=667n,

CL = 5 pF

tPLZ
NOTE 2: See General Information Section for load circuits and voltage waveforms.

en
w

U

>
w

C

...J

lI-

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1017

TYPES SN54LS366A, SN54LS368A
SN74LS366A,SN74LS368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS366A
SN54LS368A

SN74LS366A
SN74LS368A

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

Vee

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

0.7

0.8

10H

High·level output current

-1

-2.6

mA

24

mA

70

°e

V

2

2

12

10l

Low-level output current

TA

Operating free-air temperature

- 55

125

-0

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

MIN
VIK

Vee= MIN,

11=-18mA

Vee = MIN,

VIH=2V,

SN74LS366A
SN74LS368A

SN54LS366A
SN54LS368A

TEST eON 01 TI ONS t

PARAMETER

TYP*

MAX

MIN

TYP*

UNIT

MAX
-1.5

-1.5

V

Vll=MAX,
2.4

VOH

2.4

3.3

V

3.1

10H = MAX
Vee = MIN,

Vil = MAX,

VIH=2V,

0.25

0.4

0.25

0.4

0.35

0.5

IOl=12mA

II

V

VOL
Vee = MIN,

Vll=0.8V,

VIH = 2 V,

10l = 24 mA

-4
-4
r
C
m

Vee = MAX,

VIH = 2 V,

Vll=MAX,
20

20

- 20

- 20

0.1

0.1

mA

20

20

~A

- 20

- 20

~A

- 0.4

-0.4

-0.2

-0.2

Vo = 2.4 V
~A

102
Vee = MAX,

VIH=2V,

Vll=MAX,

Vo = 0.4 V

S
(")

m
en

II

Vee = MAX,

VI = 7 V

IIH

Vee = MAX,

VI = 2.7 V

Vee = MAX,

VI = 0.5 V,

Either G input at 2 V

Vee = MAX,

VI = 0.4 V,

Both

Vee = MAX,

VI = 0.4 V

A Inputs
III
G Inputs
10S§

Vee = MAX

ICC

Vee = MAX,

Ginputs at 0.4 V
-40

Data inputs = 0 V,

Output controls = 4.5 V,

t
t

- 225
12

21

mA
-40
12

For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
Alltypical values are at V CC = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

3-1018

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

- 225

mA

21

mA

TYPES SN54LS366A, SN54LS368A
SN74LS366A,SN74LS368A
HEX BUS DRIVERS WITH 3-STATE OUTPUTS
switching characteristics, Vee

= 5 V, TA = 25°e (see note 2)

FROM

TO

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

TYP

MAX

tPLH

7

15

ns

tpHL

12

18

ns

18

35

ns

28

45

ns

32

ns

35

ns

.CL

RL=667n.
tpZH

Any

= 45 pF

y

tpZL
tpHZ
CL

RL = 667 n.

= 5 pF

tpLZ

MIN

UNIT

NOTE 2: See General Information Section for load circuits and voltage waveforms.

en

w

U

>

w
C

..J

lI-

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1019

-f
-f

r-

C

m

<
nm

en

3-1020

TYPES SN54LS373, SN54LS374, SN54S373, SN54S374,
SN74LS373,SN74LS374,SN74S373,SN74S374
OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
OCTOBER 1975-REV15ED APRil 1985

SN54LS373. SN54LS374. SN54S373.
SN54S374 ... J PACKAGE
SN74LS373. SN74LS374. SN74S373,
SN74S374 ... OW. J OR N PACKAGE

• Choice of 8 Latches or 8 D-Type Flip-Flops
In a Single Package
• 3-Stata Bus-Driving Outputs
•

Full Parallel-Access for Loading

•

Buffered Con~rol Inputs

(TOP VIEW)

oe

• Clock/Enable Input Has Hysteresis to
Improve Noise Rejection ('S373 and 'S374)
• P-N-P Inputs Reduce D-C Loading on
Data Lines ('S373 and 'S374)
'LS373, 'S373
FUNCTION TABLE
OUTPUT

ENABLE

ENABLE

LATCH

L
L

0

OUTPUT

H

H

H

H

L

L

Vee

1Q
10
20
2Q
3Q
3D
40
4Q
GNO

8Q
80
70
7Q
6Q
60
50
5Q

et

L

L

X

00

SN54LS373. SN54LS374, SN54S373,
SN54S374 ... FK PACKAGE
SN74LS373, SN74LS374, SN74S373,
SN74S374 ... FN PACKAGE

H

X

X

Z

(TOP VIEW)

u

~Slg;;,~

'LS374, 'S374
FUNCTION TABLE

80
70
7Q
6Q
60

OUTPUT
CLOCK

0

OUTPUT

t
t

H

H

L

L

L

L

L

X

00

H

X

X

Z

ENABLE
L

(JJ

W

U

>
w

description

tc for 'l5373
These 8·bit registers feature three-state outputs
designed specifically for driving highly-capacitive or
relatively low-impedance loads. The high-impedance
third state and increased high-logic-level drive provide
these registers with the capability of being connected
directly to and driving the bus lines in a bus-organized
system without need for interfac~ or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers,
and working registers.

and '5373; ClK for 'l5374 and '5374.

C

..J

tt-

The eight latches of the 'LS373 and 'S373 are
transparent Ootype latches meaning that while the
enable (el is high the Q outputs will follow the data (0)
inputs. When the enable is taken low the output will be
latched at the level of the data that was set up.

PRODUCTION DATA
This document contains information current as
of ~ublication date. Products conform to
specifications per the terms of Texas Instruments

~~;nnd:~eds~~r{:r~liu~~Ot~~~f~~nor~~f~~~~nJe~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 7526

3-1021

TYPES SN54LS373, SN54LS374, SN54S373, SN54S374,
SN74LS373, SN74LS374, SN74S373, SN74S374
OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
description (continued)
The eight flip-flops of the 'LS374 and '8374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q
outputs will be set to the logic states that were setup at the D inputs.
Schmitt-trigger buffered inputs at the enable/clock lines of the '8373 and '8374 devices, simplify system design as ac and dc
noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered output control input can be used to
place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the highimpedance state the outputs neither load nor drive the bus lines significantly.
The output control does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or
new data can be entered even while the outputs are off.

logic diagrams
'lS373, 'S373
TRANSPARENT lATCHES

'lS374, 'S374
POSITIVE-E~GE-TRIGGERED

-----------0

FLIP-FLOPS

OUTPUT __
11_1________Q

OUTPUT
CONTROL

CONTROL

10 ..-;....;.....--------1
1Q

1Q

20 -------+----1

20 ..-;.------+-~
2Q

II

3D

-----+----1

30..-;....;.....----+-~

3Q

40 ----+----1

40-----+_~

4Q

50 -------+----1

50 ------+-~

5Q

5Q
60

-------+--f

60 ------+----1

6Q

6Q
70 ------+--f

70 -------+_--f
7Q

7Q

80

80 - - - - - + _ - - f

------+_~

8Q
ClK
Pin numbers shown on logic notation are for DW. J or N packages.

3-1022

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS373, SN54LS374, SN74LS373, SN74LS374
OCTAL D-TYPE TRANSPARENT LATCHES AND
EDGE-TRIGGERED FLIP-FLOPS
schematic of inputs and outputs
EQUIVALENT OF OATA INPUTS

Vec-----~~-------

V e e - -.....- - -

Req

= 20kn

'LS373
EQUIVALENT OF ENABLE AND
OUTPUT CONTROL INPUTS

TYPICAL OF ALL OUTPUTS

- - - - - - - - 4 ) - Vee

17 kn NOM

NOM

INPUT
I NPUT -o-~.....---o--

'LS374
EQUIVALENT OF
DATA INPUTS
Vec - - - -....- - - - -

EQUIVALENT OF CLOCK
AND OUTPUT CONTROL INPUTS

-----<)-- V ce

Vee

30 kn NOM

100 n NOM

en
w
U

>
w

INPUT
I N PUT

TYPICAL OF ALL OUTPUTS

C

-o--klJ......---O-

-I

tt-

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1023

TYPES SN54LS373, SN54LS374, SN74LS373, SN74LS374
OCTAL D-TYPE TRANSPARENT LATCHES AND
EDGE-TRIGGERED FLIP-FLOPS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
7V
7V
5.5 V
_55°e to 125°e
oOe to 700e
0
_65°e to 150 e

Supply voltage, Vee (see Note 1)
Input voltage
Off-state output voltage
Operating free-air temperature range: SN54LS'
SN74LS'
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS'

II
-I
-I
r
C

UNIT

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V
V

Vee

Supply voltage

VOH

High·level output voltage

5.5

5.5

10H

High-level output current

-1

-2.6

mA

10L

Low-level output current

12

24

mA

tw

Pulse duration

tsu

Data setup time

th

Data hold time

TA

Operating free-air temperature

eLK high

15

15

eLK low

15

15

'LS373

5~

5~

'LS374

20t

20t

'LS373

20~

20~

'LS374 t

ns
ns
ns

Of

Ot

O.

125

-55

°e

70

t The th specification applies only for data frequency below 10 MHz. Designs above 10 MHz should use a minimum of 5 ns.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

m

VIL

Low-level input voltage

VIK

Input clamp voltage

("')

VOH

High-level output voltage

en

VOL

Low-level output voltage

:::

SN74LS'

MIN

m

10ZH
10ZL

SN54LS'

TEST eONDITloNSt

MIN

TYP:!:

SN74LS'
MAX

2

= MIN, II = -18mA
Vee = MIN,
VIH = 2 V,
VIL = VILmax,lOH = MAX
Vee = MIN,

VIH = 2 V,

VIL = VILmax
Off-state output current,

Vee = MAX,

high-level voltage applied

Va = 2.7 V

Off-state output current,

Vee = MAX,

low-level voltage applied

Va = 0.4 V

IIOL

= 12mA

MAX

0.25

V
0.8

V

-1.5

-1.5

V

2.4
0.4

!IOL = 24 mA

VIH = 2 V,

UNIT

0.7

3.4

VIH = 2 V,

Input current at

TYP:!:

2

Vee

2.4

MIN

V

3.1
0.25

0.4

0.35

0.5

V

20

20

IJA

-20

-20

IJA
mA

Vee = MAX,

VI = 7 V

0.1

0.1

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

IJA

IlL

Low-level input current

Vee = MAX,

VI

= 0.4 V

-0.4

-0.4

mA

lOS

Short-circuit output currentS

Vee = MAX

-130

mA

ICC

Supply current

II

maximum input voltage

-30

-130

-30

Vee= MAX,

!'LS373

24

40

24

40

Output control at 4.5 V

!'LS374

27

40

27

40

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:!:AII typical values are at Vee = 5 V, T A = 2Soe.
.
§Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second.

3-1024

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

mA

TYPES SN54LS373, SN54LS374, SN74LS373, SN74LS374
OCTAL D-TYPE TRANSPARENT LATCHES AND
EDGE-TRIGGERED FLIP-FLOPS
switching characteristics, Vee
PARAMETER

FROM

TO

(lNPUTI

(OUTPUT)

= 5 V, TA = 25°e
'LS373

TEST CONDITIONS

MIN

'LS374
MAX

12

18

12

18

20

30

15

28

18

30

19

28

15

28

20

26

f max
tpLH

Data

AnyQ

tpHL
tpLH

Clock or

tpHL

enable

tpZH

Output

tpZL

Control
Output

tpHZ

Control
Output

tpLZ
NOTES:

Control

CL = 45pF, RL.= 667Q
AnyQ

See Notes 2 and 3

AnyQ
AnyQ
AnyQ

CL = 5 pF,

RL = 667Q

MIN
35

TYP

TYP
50

MAX

MHz
ns

25

36

21

28

SN54

28

32

28

32

SN74

15

25

15

28

12

20

12

20

See Note 3

UNIT

ns
ns
ns
ns

2. Maximum clock frequency is tested with all outputs loaded.
3. See General Information Section for load circuits and voltage waveforms.

f max == maximum clock frequency
tpLH == propagation delay time, low-to-high-Ievel output
tpH L == propagation delay time, high-to-Iow-Ievel output
tpZH == output enable time to high level
tpZL == output enable time to low level
tpHZ == output disable time from high level
tpLZ == output disable time from low level

II
en
w

u

:>w
C

..J

........

1283

TEXAS

-Ij}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1025

TYPES SN54S373, SN54S374, SN74S373, SN74S374
OCTAL 0-TYPE TRANSPARENT LATCHES AND
EDGE-TRIGGERED FLIP-FLOPS
schematic of inputs and outputs

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT

------------~-----Vee

50n
NOM

vee------------~._------

2.8 kn
NOM

OUTPUT

INPUT ---4I-.....---t

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

-i
-i
C

m

:5

n

m
en

7V
5.5 V
5.5 V
-55°C to 125°C
aOe to 7aoe
-65°C to 15aoe

Supply voltage, Vee (see Note 1)
Input voltage
Off-state output voltage
Operating free-air temperature range: SN54S'
SN74S'
Storage temperature range

r0-

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74S'

SN54S'
MIN
Supply voltage, Vee

NOM

4.5

5

MAX

MIN

5.5

4.75

NOM

MAX

5

5.25

High-level output voltage, VOH

5.5

5.5

High-level output current, IOH

-2

-6.5

Width of clock/enable pulse, tw
Data setup time, tsu
Data hold time, th
Operating free-air temperature, T A

3-1026

High

6

6

Low

7.3

7.3

'S373

O,!-

'S374

5t

5t

'S373

10~

10~

'S374

2t

2t

-55

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

0

V
V
rnA
ns

O,!-

125

UNIT

ns
ns
70

°c

TYPES SN54S373, SN54S374, SN74S373, SN74S374
OCTAL D-TYPE TRANSPARENT LATCHES AND
EDGE-TRIGGERED FLIP-FLOPS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONSt

MIN

TYPt

MAX

UNIT

2

VIH

V
0.8

V

-1.2

V

VIL
Vee = MIN,

II = -18mA

VCC= MIN,

VIH=2V,

VIL = 0.8 V,

IOH = MAX

VOL

Vee = MIN,

VIH=2V,

VIL=0.8V,

IOL = 20 mA

IOZH

Vce= MAX,

VIH = 2 V,

IOZL

Vee = MAX,

VIH = 2 V,

II

Vee= MAX,

VI = 5.5 V

VIK

~

VOH

SN74S'

2.4

3.4

2.4

3.1

V
0.5

V

Vo = 2.4 V

50

p.A

Vo = 0.5 V

- 50

p.A

1

mA
p.A

IIH

Vee = MAX,

VI = 2.7 V

50

IlL

Vee= MAX,

VI = 0.5 V

-250

p.A

IOS§

Vee = MAX

-100

mA

-40
'S373

Vee= MAX

lee

'S374

outputs high

160

outputs low

160

outputs disabled

190

outputs high

110

outputs low

140

outputs disabled

160

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t All typical values are at VCC = 5 V, T A = 25°C.
§Not more than one output should be shorted at a time and duration of the short·circuit should not exceed one second.

switching characteristics, Vee
PARAMETER

= 5 V, TA = 25° C

FROM
(INPUT)

TO
(OUTPUT)

TEST CONDITIONS

'S373

'S374

MIN TYP MAX

MIN TYP MAX

f max

tpLH
tpHL

Data

tpLH

Clock or

tPHL

enable

tpZH

Output

tpZL

Control

tPHZ

Output

tpLZ

Control

NOTES:

f max
tpLH

75
Any Q
CL = 15 pF, RL = 280.n,
Any Q

See Notes 2 and 4

Any Q
Any Q

eL = 5 pF.

RL = 280.n.

See Note 3

100

UNIT
MHz

7

12

7

12

7

14

8

12

18

11

17

8

15

8

15

11

18

11

18

6

9

8

12

5
7

12

ns
15

9

ns
ns

II
en
w

CJ

>
w
C
-J

ns

lI-

2 •. Maximum clock frequency is tested with all outputs loaded.
4. See General Information Section for load circuits and voltage waveforms.

E:

maximum clock frequency

E:

propagation delay time, low·to·higto·level output

tpHL:= propagation delay time, high·to·low·level output
tpZH := output enable time to high level
tpZL

E:

output enable time to low level

tpHZ:= output disable time from high level
tpLZ E: output disable time from low level

1283

TEXAS

-1.!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1027

TYPES SN54LS373, SN54LS374, SN54S373, SN54S374,
SN74LS373, SN74LS374, SN74S373, SN74S374
OCTAL 0-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS
TYPICAL APPLICATION DATA
BIDIRECTIONAL BUS DRIVER

OUTPUT
CONTROL 1

t,
10

10
2D
3D
4D

BIOIRECTIONAL
OATA BUS 1

5D

20
30
40

'LS374
OR
'S374

6D
7D
SD

L---

'---

11
--I
--I
r-

CLOCK

CLOCK 2

70
SO

~

CLOCK 2

(
'--

-U-

60

)

CLOCK 1

CLOCK 1 H
BUS
EXCHANGE

BIDIRECTIONAL
DATA BUS2

50

10
20

V·

lDt--

CK

2D r-3D f 4D I - - -

30

L--

40

'----

50

'LS374
OR
'S374

60

5D t - - 6D

70
SO

7D
SD

'(

S

OUTPUT
CONTROL 2

--uLr

H

CLOCK CIRCUIT FOR BUS EXCHANGE

C

m

=5

EXPANDABLE 4-WORD-BY-8-BIT GENERAL REGISTER FILE

(')

'LS374 OR 'S374

m

en
G

'LS374 OR 'S374

YO
Yl

. ENABLE SELECT {

A

Y2

B

Y3

'LS374 OR 'S374

'LS374 OR 'S374

1/2 SN74LS139
OR SN74S139

C'Loc'K
SELECT

3-1028

TEXAS

LS
CLOCK

"!I

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS375, SN74LS375
4-BIT BISTABLE LATCHES
OCTOBER 1976-REVISED DECEMBER 1983

•

Supply Voltage and Ground on Corner
Pins To Simplify P-C Board Layout

SN54LS375 ... J OR W PACKAGE
SN74LS375 ... 0, J OR N PACKAGE
(TOP VIEW)

logic
10
10
10
1C,2C
20
20
20
GNO

FUNCTION TABLE
(EACH LATCH)
INPUTS OUTPUTS
Q
Q
0
G
H
L
H
L
H
H
H
L
L
X
00

00

H = high level, L = low level, X = irrelevant
QO = the level of Q before the high·to·low transition of C.

logic diagram (each latch)

DAOA~

WO,","

VCC
40
40
40
3C,4C
30
30
30

SN54LS375 ... FK PACKAGE
SN74LS375 ... FN PACKAGE
(TOP VIEW)
U

:

10

a ~ !;: ~

\.ATCH

3
ENABLE

10
1C,2C
NC
20
20

description
The SN54LS375 and SN74LS375 bistable latches are
electrically and functionally identical to the
SN54LS75 and SN74LS75, respectively. Only the
arrangement of the terminals has been changed in the
SN54LS375 and SN74LS375.
These latches are ideally suited for use as temporary
storage for binary information between processing
units and input/output or indicator units. Information present at a data (D) input is transferred to the Q
output when the enable (C) is high and the Q output
will follow the data input as long as the enable
remains high. When the enable goes low, the information (that was present at the data input at the time
the transition occurred) is retained at the Q output
until the enable goes high.

2

20 19

40
40
NC
3C,4C
30

5
6
7

8
9 10

0 0 U 010

NZ ZMM
(!)

NC - No internal connection

en
w

schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS

EQUIVALENT OF
EACH INPUT

"!

VCC

C

..J

Req

INPUT

These circuits are completely compatible with all
popular TTL or DTL families. All inputs are diodeclamped to minimize transmission-line effects and
simplify system design. The SN54LS375 is characterized for operation over the full military temperature
range of -55°C to 125°C; SN74LS375 is characterized for operation from DoC to 70°C.

-

~

'~

lI-

!r
I

Data:
Enable:

Req=17kn
Req = 4.2 kr2

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
7V
7V
-55°C to 125°C
. DoC to 70°C
-65°C to 150°C

Supply voltage, VCC (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS375
SN74LS375
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:;:s':'a~[I~ar~llu~~Ot~~~~~~nof~~f~~~~~e~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

U

>
w

TYPES SN54LS375, SN74LS375
4-BIT BISTABLE LATCHES
recommended operating conditions
SN74LS375

SN54LS375

Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

2

2

UNIT

V

0.7

0.8

- 0.4

-0.4

mA

8

mA

4

V

IOL

Low-level output current

tw

Width of enabling pulse

20

20

ns

tsetup

Setup time

20

20

ns

0

0

thold

Hold time

TA

Operating free-air temperature

-·55

125

70

0

ns
ue

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VOH

TEST CONDITIONS

-I
-I

rC

m

<

(")

m

MIN

II = -18 mA

Vee- MIN,

VIH = 2 V,

VIL = MAX

VIH=2V,

IOL =4 mA

2.5

IOH = - 0.4 mA
VIL = MAX
Vee = MAX,

VI = 7 V

IIH

Vee= MAX

VI = 2.7 V

Vee = MAX,

IOS§

Vee - MAX

ICC

Vee= MAX,

SN74LS375

MAX

MIN

VI = 0.4 V

TYPt

3.5

2.7

3.5
0.25

MAX
-1.5

0.4

0.5

0.35

D input

0.1

U.1

e input

0.4

0.4

D input

20

20

e input

80

80

D input

- 0.4

-0.4

e input

- 1.6

-1.6

-20

-100
6.3

See Note 2

-20
6.3

12

UNIT
V
V

0.25

IOL - 8 mA

II

IlL

TYPt

-1.5

Vee= MIN,

Vee=MIN,
VOL

SN54LS375

t

V
mA
J.lA
mA

-100

mA

12

mA

t For conditions shown as MI N or MAX, use' the appropriate value specified under recommended operating conditions.

t All typical values are at V CC = 5 V, T A = 25° C.
§ Not more than one output should be shorted at ,a time.
NOTE 2: I CC is tested with all inputs grounded and all outputs open.

switching characteristics, Vee
PARAMETERO

en

tPLH

FROM
(INPUT) .
D

=5 V, T A = 25°e (see note 3)
TO

TEST CONDITIONS

(OUTPUT)
Q

TYP

MAX

15

27

tPHL

9

17

tpLH

12

20

7

15

15

27

D

Q

D

Q

RL = 2

tpHL
tpLH
tPHL
tpLH
tpHL

e

k!"l

CL=15pF

Q

o tpLH

= propagation delay time, low-to-high-Ievel output
tph ~ = propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1030

MIN

,

TEXAS-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

14

25

16

30

7

15

UNIT
ns
ns
ns
ns

TYPES SN54376, SN74376
QUADRUPLE J-K FLIP-FLOPS
OCTOBER 1:i76-REVISED DECEMBER 1983

•

Four J-K Flip-Flops in a Single Package ...
Can Reduce FFPackage Count by 50%

•

Common Positive-Edge-Triggered Clocks
with Hysteresis ... Typically 200 mV

•

Fully Buffered Outputs

•

Typical Clock Input Frequency ... 45 MHz

SN54376 ... J OR W PACKAGE
SN74376 ... J OR N PACKAGE
(TOP VIEW)

CLR
1J
1K
10

20

2K

description

2J

These quadruple TTL J-K flip-flops incorporate a
number of third-generation IC features that can
simplify system design and reduce flip-flop package
count by as much as 50"10. They feature hysteresis at
the clock input, fully buffered outputs, and direct
clear capability. The positive-edge-triggered SN54376
and SN74376 are directly compatible with most
Series 54/74 MSI registers_

GND'-t..::~~;.J-'

logic symbolt

The SN54376 is characterized for operation over the
full military temperature range of -55"C to 125°C;
the SN74376 is characterized for operation from O°C
to 70°C.

(1)
CLK

lJ

fj(
2J
2K

FUNCTION TABLE lEACH FLIP-FLOP)
OUTPUT

3J

CLEAR

CLOCK

J

K

0

3K

L

X

X

X

L

H

t

L

H

00

COMMON INPUTS

INPUTS

H

t

H

H

H

H

t

L

L

L

H

t

H

L

TOGGLE

H

L

X

X

00

4J

,.......

R

(9)

DC1

..,
(2)
(3)

,.......

\

r

lJ

(4)

10

lK

(7)

(5)
(6)

..........

20

(10)
(12)
(11)

,.......

30

(15)
(13)
(14)

4K

..........

40

II
en
W

Pin numbers shown on logic notation are for Jar N packages

C,.)

>
W
C
...J

lI-

schematics of inputs and outputs
TYPICAL OF ALL
OUTPUTS

EOUIVALENT OF
EACH INPUT

---__<'-VCC

Vcc---+--INPUT

o

Clear, J, K: R eq .= 4 k.!1 NOM
Clock: Req = 11.6 k.!1 NOM
Resistor values shown are nominal.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~;n::::s~~[I~arntJiu~~Ot~~~f~~nof~~f~~~~"Je~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1031

TYPES SN54376, SN74376
QUADRUPLE J-K FLIP-FLOPS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ................................................................. 7 V
Input voltage .............................................................................. 5.5 V
Operating free-air temperature range: SN54376 ..........................................- 5.5°e to 125°C
SN74376 .............................................. ooe to 70°C
Storage temperature range ........................................................... - 65°C to 150°C
NOTE:

Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54376
Supply voltage, VCC

SN74376

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-800

/LA

-800

High·level output current, 10H

16

Low-level output current, 10L
'Clock frequency

II

22

Clock low

12

12

Preset or clear low

12

12

Ot

Ot
10t

Input hold time, th

20t

20t

Operating free-air temperature, T A

55

~ The arrow indicates the edge of the clock pulse used for reference:

PARAMETER

VIL

Low-level input voltage

r-

VIK

Input clamp voltage

C

VOH

High-level output voltage

<

VOL

Low-level output voltage

II

rn

125

t

ns

ns
ns
°c

70

0

for the rising edge, ~ for the fall ing edge.

TEST CONDITIONSt

-t
-t

m

mA
MHz

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
High-level input voltage

("')

16
30

22

10t

Clear inactive state

VIH

m

0

Clock high

J, K inputs

Setup time, tsu

t

30

0

Pulse width, tw

UNIT

MIN

MIN

TYP+

MAX

UNIT
V

2
Vce = MIN,

11=-12mA

Vee = MIN,

VIH =2 V,

VIL = O.B V,

10H = -800 IlA

Vce = MIN,

VIH = 2 V,

VIL = 0.8 V,

10L = 16 mA

Input current at maximum input voltage

Vce = MAX,

VI = 5.5 V

2.4

0.8

V

-1.5

V

3.4

V

0.2

0.4

V
mA

1

IIH

High-level input current

Vee = MAX,

VI=2.4V

40

/LA

IlL

Low-level input current

VCC = MAX,

VI = 0.4 V

-1.6

mA

lOS

Short-circuit output currentS

VCC = MAX

-85

mA

Ice

Supply current

VCC = MAX

74

mA

-30
52

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee

=

5 V, T A

= 25°e.

§Not more than one output should be shorted at a time.

switching characteristics, Vee

= 5 V, T A = 25°e
TEST CONDITIONS

PARAMETER
f max

Maximum clock frequency

tPHL

Propagation delay time, high-to-Iow-Ievel output from clear

tPLH

Propagation delay time, low-to-high-Ievel output from clock

tpHL

PropllgMion delay time, high-to-Iow-Ievel Olltput from dock

CL=15pF,
RL = 400.11,
See Note 2

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-1032

-Ij}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

TYP

30

45

MAX

UNIT
MHz

17

30

ns

22

35

ns

24

35

TYPES SN54LS377, SN54LS378, SN54LS379,
SN74LS377, SN74LS378,SN74LS379
OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
OCTOBER 1976-REVISED APRIL 1985

o

'LS377 and 'LS378 Contain Eight and
Six Flip-Flops, Respectively, with SingleRail Outputs

o

'LS379 Contains Four Flip-Flops with
Double-Rail Outputs

o

Individual Data Input to Each Flip-Flop

o

Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators

SN54LS377 ... J PACKAGE SN74LS377 ... OW. J OR N PACKAGE
(TOPVIEWI

G
10

VCC
80
80
70
70

20

10
20
20
30
30
40
40

60
60
50
50
ClK

GNO

description

SN54LS377 ... FK PACKAGE
SN74LS377 ... FN PACKAGE

These monolithic, positive-edge-triggered flip-flops
utilize TTL circuitry to implement Ootype flip-flop
logic with an enable input. The 'LS377, 'LS378, and
'lS379 devices are similar to 'LS273, 'LS174, and
'LS175. respectively. but feature a common enable
instead of a common clear.
Information at the 0 inputs meeting the setup time
requirements is transferred to the 0 outputs on the
positive-going edge of the clock pulse if the enable
input G is low., Clock triggering occurs at a particular
voltage level and is not directly related to the
transition time of the positive-going pulse. When the
clock input is at either the high or low level, the 0
input signal has no effect at the output. The circuits
are designed to prevent false clocking by transitions
at the G input.

(TOPVIEWI
U

~ ~I~ ~

dO~dO

vt§d

LllLll

SN54LS378 ... J OR W PACKAGE
SN74LS378 ... D. J OR N PACKAGE
(TOPVIEWI

G
10
10

These flip-flops are guaranteed to respond to clock
frequencies ranging from 0 to 30 MHz while
maximum clock frequency is typically 40 megahertz.
Typical power dissipation is 10 milliwatts per
flip-flop.

II
en
w

u

:>w

50
50
40
40
-......_ _...r- ClK

C

...I

lI-

SN54LS378 ... FK PACKAGE
SN74LS378 ... FN PACKAGE

FUNCTION TABLE

(TOPVIEWI
U

(EACH FLIP-FLOP)
INPUTS

g

~Ic!) ~ ~g

OUTPUTS

G

CLOCK

DATA

H

X

X

0
00

0

L

t

H

H

L

L

t

L

L

H

X

L

X

00

00

00

10
20

4

NC

6
7

20
30

8
aou~d

Mt§Zd v

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:::s~~r{:r~liu~~Ot~~if~~nor~~~~~~~n~e~~~s~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1033

TYPES SN54LS377, SN54LS378, SN54LS379
SN74LS377, SN74LS378, SN74LS379
OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
SN54LS379 ... J OR W PACKAGE
SN74LS379 ... D, J OR N PACKAGE

SN54LS379 ... FK PACKAGE
SN74LS379 ... FN PACKAGE

(TOP VIEW)

(TOP VIEW)

G
10

40
40

10

30
30
30
--...._ _-r-

CLK

NC - No internal connection

logic diagram
D
CLOCK----I

D

II
-I
-I

a

Q

a

Q

TO

7
5
3
OTHER

('LS377)
('LS378)
('LS379)
FLIP-FLOPS

ENABLE _ _ _-U

r-

G

C

m

<

('LS379
ONLY)

(")

m

en

absolute maximum rating over operating free-air temperature range (unless otherwise noted)
. _ . . . 7V
_ . _ . . . 7V
· _55°C to 125°e
· . aOc to 70°C
0
· _65°C to 150 e

Supply voltage, Vee (see Note 1)
.... .
Input voltage
............ .
Operating free-air temperature range: SN54LS'
.
SN74LS'
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal .

3-1034

. TEXAS-II}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54lS377, SN54lS378, SN54lS379,
SN74lS377,SN74lS378,SN74lS379
OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
schematics of inputs and outputs

EQUIVALENT OF DATA
INPUT

EQUIVALENT OF CLOCK
INPUTS

vcc---+---

V C C - - - - -.....

Req
INPUT-.,.....--~~

'LS379 : Req = 30 kQ NOM

'LS379 : Req = 25 kQ NOM

others : Req = 25 kQ NOM

others : Req = 20 kQ NOM

EQUIVALENT OF ENABLE
INPUTS

TYPICAL OF ALL OUTPUTS

- - - - - - 4 - - - - V CC

v c c - - - - _.....
INPUT-...--:KI--~

'-----+--OUTPUT .

II
en

w

(.)

:>w

'LS379 : Req = 17 kQ NOM
others : Req = 20 kQ NOM

C

..oJ

~
~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1035

TYPES SN54LS377, SN54LS378, SN54LS379,
SN74LS377,SN74LS378,SN74LS379
OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
recommended operating conditions
SN54LS'
Supply voltage, VCC

SN74LS'

MIN

NOM

MAX MIN

NOM

MAX

4.5

5

5.5 4.75

5

5.25
-400

High-level output current, 10H
Low-level output current, 10L

-400
4
0

Clock frequency, fcJock
Width of clock pulse, tw
Data input
Enable active-state
Enable inactive-state

Setup time, tsu
Hold time, th

Data and enable

Operating free-air temperature, T A

30

20

0
20

201
251

201
251

101
51

lOt
125

V

8

IlA
mA

30

MHz
ns
ns

5t

-55

UNIT

70

0

ns
°c

tThe arrow indicates that the rising edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL
II

-I
-I

r-

o
<

m

n

m

en

IIH

SN54LS'
SN74LS'
MIN TYp:j: MAX MIN TVP:j: MAX

TEST CONDITIONSt

2
VCC = MIN
Vee - MIN,

Low-level output voltage

VIH-2V,

VIL = VIL max,

10H = -400IlA

Vec = MIN,

VIH = 2 V,

VIL = VIL max

Input current at

0.7
-1.5

,,= -18mA
2.5

3.5

0.8
-1.5
2.7

0.25

POL =4 mA

0.4

JIOL =8 mA

UNIT
V

2

V
V
V

3.5
0.25

0.4

0.35

0.5

V

Vee = MAX,

VI =7 V

0.1

0.1

mA

High-level input current

Vee = MAX,

VI = 2.7 V

20

20
-0.4
-100

IlA
mA
mA

17
13

28
22

mA
mA

9

15

mA

maximum input voltage

IlL

Low-level input current
Short-circuit output current§

Vee = MAX,
Vee- MAX

VI = 0.4 V

lOS
ICC

Supply current

Vee

See Note 2

=

MAX.

-0.4
-100 -20

-20
['LS377
I'LS378

17
13

I'LS379

9

28
22
15

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j: All typical values are at Vee = 5 V, T A = 25°C.
§ Note more than one input should be shorted at a time. and duration of the short-circuit should not exceed one second.
NOTE 2: With all outputs open and ground applied to all data and enable inputs, ICC is measured after a momentary ground,
then 4.5 V, is applied to clock.

switching characteristics, Vee

= 5 V, TA =25°e

PARAMETER

TEST CONDITIONS MIN

TVP

MAX UNIT

f max

Maximum clock frequency

tPLH

Propagation delay time, low-to-high-Ievel output from clock

RL = 2 k!1

17

27

MHz
ns

tPHL Propa!)ation delay time, high-to-Iow-Ievel output from clock

See Note 3

18

27

ns

eL=15pF,

NOTE 3: See General Information Section fo~ load circuits and voltage waveforms.

3-1036

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

30

40

TYPES SN54LS381A, SN54LS382, SN54S381, SN74LS381A, SN74LS382, SN74S381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
02430, JANUARY 1981- REVISED DECEMBER 1983

PIN DESIGNATIONS
DESIGNATION

PIN NOS,

FUNCTION

A3, A2, Al, AO

17,19,1,3

WORD A INPUTS

B3, B2, Bl, BO

16,18,2,4

S2, Sl, SO

7,6,5

SN54LS381A,SN54S381
'" JPACKAGE
SN74LS381A,SN74S381
... OW, J OR N PACKAGE

SN54LS381A,SN54S381
'" FKPACKAGE
SN74LS381A,SN74S381
'" FNPACKAGE

(TOP VIEW)

(TOP VIEW)

WORD B INPUTS
FUNCTION-SELECT
INPUTS
CARRY INPUT FOR

Cn

15

F3, F2, Fl, Fa

12,11,9,8

ADDITION, INVERTED
CARRY INPUT FOR
SUBTRACTION

p('LS381A
'5381 ONLY)

G('LS381A
'5381 ONLY)
Cn + 4
OVR

('LS382
ONLY)
('LS382
ONLY)

VCC
GND

14
13
14

20

Al
Bl
AO
BO
50
51
52
FO
Fl
GND

FUNCTION OUTPUTS
ACTIVE-LOW CARRY
PROPAGATE OUTPUT

19
3
4

18
17
16
15

9
10

14

P

13

G

12

F3
F2

11

u

Vee
A2
B2
A3
B3
en

~[jj~~c;;J.
B2
A3
B3
en

p

ACTIVE-LOW CARRY
GENERATE OUTPUT
RIPPLE-CARRY
OUTPUT
OVERFLOW

13

SN54LS382 ... J PACKAGE
SN74LS382 . . .
OW, J OR N PACKAGE

SUPPLY VOLTAGE.

10

GROUND

(TOP VIEW)

(TOP VIEW)

OUTPUT

20

SN54LS382 ... FK PACKAGE
SN74LS382 ... FN PACKAGE

Al
Bl
AO
BO
50
51
52
Fa
Fl
GND

• Fully Parallel4-Bit ALU's in 20-Pin Package
for O.300-lnch Row Spacing
• Ideally Suited for High-Density Economical
Processors
• 'LS381 A and 'S381 Feature G and P Outputs
for Look-Ahead Carry Cascading
• 'LS382 Features Ripple Carry (C n + 4) and
Overflow (OVR) Outputs
• Arithmetic and Logic Operations Selected
Specifically to Simplify System
Implementation:
A Minus B
B Minus A
A Plus B
and Five Other Functions

u

~[jj~~c;;J.
BO
SO
51
S2
Fa

10

4
5

6
7

8

F2

11

FUNCTION TABLE

en

SELECTION ARITHMETIC/LOGIC

(.)

w

S2

Sl

SO

L

L

L

CLEAR

>

L

L

H

B MINUSA

C

L

H

L

A MINUSB

..J

L

H

H

A PLUS B

H

L

L

AGB

H
H

L

H

A + B

H

L

AB

H

H

H

= high

level,

H

OPERATION

W

tt-

PRESET
L

= low

level

description
The 'LS381A, 'S381 and 'LS382 are low-power Schottky and Schottky TIL arithmetic logic units (ALUs)/function
generators that perform eight binary arithmetic/logic operations on two 4-bit words as shown in the function table. The
exclusive-OR, AND, or OR function of the two Boolean variables is provided without the use of external circuitry. Also, the
outputs can be cleared (low) or preset (high) as desired. The 'LS381A and 'S381 provide two cascade outputs (p and (3) for
expansion utilizing SN54S182/SN74S182 look-ahead carry generators. The 'LS382 provides a Cn + 4 output to ripple the
carry to the Cn input of the next stage. The 'LS382 detects and indicates two's complement overflow condition via the OVR
output. The overflow output is logically equivalent to Cn + 3 <±> Cn + 4. When the 'LS382 is cascaded to handle word lengths
longer than four bits in length, only the most significant overflow (OVR) output is used.
The SN54' Family is characterized for operation over the full military temperature range of - 55°C to 125°C. The SN74' family is characterized for operation from O°C to 70°C.
PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::s':a~f{:r~liu:~Ot!~~~~nof~~f~~~~~e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1037

TYPES SN54LS381A, SN54LS382, SN54S381, SN74LS381A, SN74LS382, SN74S381
ARITHMETIC LOGIC UNITS/FUNCTIONS GENERATORS
function table
Certain differences exist in the <3, P ('LS381 A, 'S381) and OVR, Cn + 4 ('LS382) function table compared with similar parts
from other vendors. No differences exist in the arithmetic modes (B minus A, A minus B, and A plus B), where these outputs
perform valuable cascade functions.
There are slight differences in the other modes (CLEAR, A + B, A(±)B, AB, and PRESET), where these outputs are strictly
"don't care."
This function table is a condensed version and assumes for An that AO, A 1, A2, and A3 inputs all agree and for Bn that BO,
B1, B2, and B3 inputs all agree. This table is intended to point out the response of these <3, P rLS381 A, 'S381) and OVR,
Cn + 4 ('LS382) outputs in all modes of operation to facilitate incoming inspection.
FUNCTION TABLE

II

Cn +4

L

H

H

H

L

H

H

L

L

L

L

L

H

L

H

L

L

H

H

L

H

H

H

L

L

L

so

Cn

An

Bn

CLEAR

L

L

L

X

X

X

L

L

L

L

L

L

H

H

H

L

L

H

H

H

H

L
_L

H

L

L

L

H

H

H

H

A MINUS B

L

L

L

H

H

L

r

A PLUS B

L

H

H

m

<
(")

m

en
A0B

A

+

B

H

H

L

L

L

H

PHIcSET

H

H

H

H

L

H

F2

F1

FO

L

H

L

L

L

L

L

L

H

L

L

H

H

L

H

H

H

H

H

L

H

L

H

H

H

L

L

L

L

H

H

H

L

L

H

H

H

L

L

L

L

H

L

L

H

L

L

L

H

H

H

H

H

L

L

L

L

H

L

L

L

L

H

H

L

L

L

H

L

L
H

L

H

L

H

H

H

L

L

H

L

H

H

H

H

H

H

H

L

L

H

L

L

L

L

L

L

H

L

L

H

L

H

L

L

L

H

H

H

L

L

H

H

L

H

H

H

H

L

H

L

H

H

H

H

L

L

L

L

H

L

L

H

L

L

L

L

L

L

L

H

H

L

L

L

L

H

H

H

H

H

H

L

L

H

H

H

H

L

L

L

L

L

H

L

H

L

H

H

H

H

H

L

L

H

L

H

H

L

L

L

L

L

H

H

H

L

L

H

L

H

L

L

L

L

H

L

L

H

H

H

L

L

L

L

L

H

L

L

H

H

H

H

H

H

H

H

L

H

L

H

X

L

L

L

L

L

L

L

H

H

L

L

H

H

H

H

H

H,

L

L

L

H

L

H

H

H

H

H

H

L

H

H

L

L

H

L

H

H

H

H

H

L

L

L

H

H

L

H

H

H

H

H

L

H

H

X

H

H

L

L

L

L

H

H

L

L

X

L

L

L

L

L

L

H

H

L

L

L

L

H

H

H

H

H

H

L

L

L

H

L

H

H

H

H

H

H

L

H

H

L

H

L

H

H

H

H

H

L

L

L

H

H

L

H

H

H

H

H

L

H

H

L

H

H

H

H

H

H

H

L

L

L

H

H

H

H

H

H

H

H

L

H

H

X
AB

3-1038

OVR

Sl

-f
-f

C

P

S2

F3

(·LS3821

G

OPERATION

B MINUS A

(·LS381A. ·S381 1

OUTPUTS

INPUTS

ARITHMETIC/LOGIC

L

L

L

L

L

L

H

H

L

L

X

L

H

L

L

L

L

H

H

L

L

X

H

L

L

L

L

L

H

H

l:

L

L

H

H

H

H

H

H

H

L

L

L

H

H

H

H

H

H

H

H

L

H

H

I

X

X

H

H

H

H

H

L

L

L

H

X

X

H

H

H

H

H

L

H

H

J1.!f

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS381A, SN54LS382, SN74LS381A, SN74LS382
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS·
logic diagram (positive logic)

'LS381A, 'LS382

en
w

C,.)

5>

w

C

...J

lI-

Pin numbers shown on logic notation are for DW, J or N packages.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1039

TYPES SN54S381, SN74S381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
logic diagram and schematics of inputs and outputs '
'S381

c:

(15)
n

(4)

80-----<.------,

AO-.:.::(3c-)~----1
81
(2)
-""TT"1-rT">~

F1

A1

(1)
(18)

82

II
-f
-f

rC

m

F2

(16)
83-

=:5

(")

m

(J)

(17)
A3--

(13) _
G

Pin numbers shown on logic notation are for OW, J or N packages.

3-1040

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS381A, SN54LS382, SN54S381, SN74LS381A, SN74LS382, SN74S381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
logic symbols
'LS382

'LS381 A, 'S381

so

ALU

(5)

:}M~ [F!P,QI

Sl
S2

AO
BO
Al
Bl

so
>

151 CP

S2 (7)

[F(P,Q) ;;, 16) CG
(1/2) Bl (1)

G

(3)

(8)

(1)

(4)

AO (3)
FO
BO

(1)

(9)

(2)

(2)

A2

(11)

(4)

B2

Al

Fl

Bl
A2

F2
B2

A3
B3

(5)

Sl (6)

P
(16)

(12)

(8)

Q

A3

F3

(4)

(8)

FO

(9)

Fl

P

(11)

F2

Q

(13) OVR

(1)

Q

(1)
(2)

Q

(2)

(19)
(18)
(17)

(8)

B3

(16)

Q
F3

Pin numbers shown on logic notation are for DW, J or N packages.

schematics of inputs and outputs
'LS381, 'LS382
EQUIVALENT OF EACH INPUT

V CC

TYPICAL OF ALL OUTPUTS

-----
w

OUTPUT

C

..J

Any S: Req = 10 kn
C n ('LS381A): Req = 2.5 kn
All others: Req = 2 kn

D

~
~

'S381

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH INPUT

VCC

Vce

Req

INPUT

---

OUTPUT

Any A or B: Req = 1 kn
Cn: Req = 800 n
Any S: Req = 6 kn

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1041

TYPES SN54LS381A, SN54LS382, SN74LS381A, SN74LS382
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage ............................................................................... 7 V
Operating free-air temperature range: SN54LS381A, SN54LS382 ........................... - 55°C to 125°C
SN74LS381A, SN74LS382 ............................... oOe to 70°C
Storage temperature range ........................................................... - 65°C to 150°C
NOTE 1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54LS'
Vee

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

IOH

High-level output current

IOL

Low-level output current

TA

Operating free-air temperature

SN74LS'

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4,5

5

5.5

4.75

5

5.25

V

0.7

0.8

V

-0.4

-0.4

16

16

2

V

2

I G output of 'LS381A
I All other outputs

4
-55

125

8
0

70

mA
mA
°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK

II
-I
-I

r-

C

m

VOH

11=-18mA

Vee = MIN,

VIH=2V,

MIN'TVPt

Other outputs

Vee= MAX,

II

VIH = 2 V,

VIL = MAX

VIL = MAX,

2.5

3.4

Any A or B

~

en ('LS381A)

Vee = MAX,

0.47

0.7

I
I

0.25

0.4

IOL = 4 mA

VI = 7 V

VI = 2.7 V

Any S
Any A or B
IlL

Cn ('LS381A)

Vee = MAX,

TVpl

VI = 0.4 V

Cn ('LS382)
Vec = MAX

0.7

0.25

0.4

0.35

0.5

0.1

0.1

20

20

100

100

80

80

100

100

-0.2

-0.2

-1

-1

-0.8

-0.8

Ice

Vec= MAX,
All inputs grounded, outputs open

-100
35

65

§ Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

-I.!}

TEXAS
INSTRUMENTS ,
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

V

V
mA

J.lA

mA

-0.8
-20

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at V CC = 5 V, T A = 25°C.

3-1042

UNIT

V

3.4
0.47

-0.8
-20

IOS§

MAX
-1.5

IOl = 8 mA

c n ('LS382)

m

MIN

2.7

llOl = 16 mA

Any S
IIH

SN74LS'
MAX
-1.5

IOH = - 0.4 mA
Vee= MIN,

('")
CJ)

Vee = MIN,

G ('LS381A)
VOL

SN54LS'

TEST CONDITIONSt

35

-100

mA

65

mA

TYPES SN54LS381A, SN54LS382, SN74LS381A, SN74LS382
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
switching characteristics, Vee
PARAMETER
tPLH

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

Cn

Any F

Any A or B

G

Any A or B

P

(see note 3)
'LS381A

TEST CONDITIONS

MIN

tpHL
tPLH
tPHL
tPLH
tPHL
tpLH

Aj or Bj

Fj

SO, 51, S2

Fj

tPHL
tPLH
tPHL
tpLH
tPHL
tPLH
tPHL
tPLH

SO,Sl,S2

G or P

Any A or B

Cn+4

Any A or B

OVR

SO,Sl,S2

Cn +4 or
OVR

RL = 2 kn,

CL=15pF

tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
NOTE 3:

Cn
Cn

OVR
Cn +4

See General Information Section for load circuits and voltage waveforms.

'LS382

TYP

MAX

TYP

MAX

18

27

18

27

14

21

14

21

20

30

21

33

21

33

MIN

UNIT
ns

ns
ns

23

33

20

30

20

30

15

23

15

23

35

53

35

53

34

51

34

51

31

47

32

48

ns
ns
ns

28

42

26

39

23

35

27

41

38

57

36

54

10

15

13

23

13

21

11

20

ns
ns
ns

ns
ns

11
en
w
U

>
w
C

..J

....

....

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1043

TYPES SN54S381, SN74S381
ARITHMETIC LOGIC UNIT/FUNCTION GENERATORS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage
...... .
Interemitter voltage (see Note 2)
Operating free-air temperature range: SN54S381
SN74S381
Storage free-air temperature range . . . . .
NOTES:

. 7V
5.5 V
5.5 V

-55°C to 125°C
oOe to 70°C
-65°C to 150°C

1. Voltage values, except interemitter voltage, are with respect to network ground terminal.
2. This is the voltage between two emitters of a multiple-emitter transistor. For this circuit. this rating applies to each A input in

conjunction with its respective B input; for example AO with BO, etc.

recommended operating conditions
SN54S381.

SN74S381

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-1

mA

20

mA

70

°e

Supply voltage, Vee

-1

High-level output current, 10H

20

Low-level output current, 10L
-55

Operating free-air temperature, T A

UNIT

MIN

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

11

Low-level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

VOL

Low·level output voltage

II

Input current at maximum input voltage

IIH

High·level input current

TVP+

MAX

2

Vee = MIN,

11=-18mA

SN54S381

Vee = MIN,

VIH=2V,

2.4

3.4

SN74S381

VIL = 0.8 V,

10H=-lmA

2.7

3.4

Vee - MIN,

VIH = 2 V,

en

Low·level input current

0.8

V

-1.2

V
V

0.5

VIL = 0.8 V,

10L = 20 mA

Vee = MAX,

VI = 5.5 V

1

Vee = MAX,

VI = 2.7 V

250

V
mA

50
j.lA

200
-2
Vee = MAX,

en

UNIT
V

Any S input
IlL

-8

VI=0.5V

All others

m

m

VIL

MIN

All others

<
CJ)

High-level input voltage

Any S input

-t
-t
rC

. (1

VIH

mA

-6
~

lOS

Short-circuit output current§

Vee

lee

Supply current

Vee = MAX

-40

MAX

105

-100

mA

160

mA

MAX

UNIT

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, TA = 25°e.
§Not more than one output should be shorted at a time.

switching characteristics, Vee
PARAMETER~

tPLH
tPHL
tPLH

= 5 V, TA = 25°e
FROM

TO

(INPUT)

(OUTPUT)

en

Any F

Any A or B

tPHL
tPLH

Any A or B

tpHL
tPLH

AiorBi

tPHL
tPLH

Any S

TEST eONDITIONS

eL=15pF,
See Note 3

Fi
Any

tpHL

~ tp LH "" propagation delay time, low·to-high·level output
tpH L ~ propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1044

TVP
10

G
P

MIN

~

TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

RL=280n,

17

10

17

12

20

12

20

11

18

11

18

18

27

16

25

18

30

18

30

ns

ns
ns

ns

ns

TYPES SN54LS384, SN74LS384
8-BIT BY 1-BIT TWO'S-COMPLEMENT MULTIPLIERS
D2419, JANUARY 1981 -

•

Two's-Complement Multiplication

o

Magnitude Only Multiplication

REVISED DECEMBER 1983

SN54LS384 ... J PACKAGE
SN74LS384 ... J OR N PACKAGE
(TOP VIEW)

•

Cascadable for Any Number of Bits

•

8-Bit Parallel Multiplicand Data Input

•

Serial Multiplier Data Input

•

Serial Data Output for Multiplication
Product

•

40 MHz Typical Maximum Clock Frequency

elR
X3
X2
X1
XO
PROD
elK
GND

description

Vee
Y
X4
X5

MODE

SN54LS384 ... FK PACKAGE
SN74LS384 ... FN PACKAGE
(TOP VIEW)

The 'lS384 is an 8·bit by 1-bit sequential logic
element that performs digital multiplication of two
numbers represented in two's-complement form to
produce a two's-complement product without
external correction by using Booth's algorithm
internally _ The device accepts an 8-bit multiplicand
(X input) and stores this data in eight internal latches.
These X latches are controlled via the clear input.
When the clear input is low, all internal flip-flops are
cleared and the X latches are opened to accept new
multiplicand data. When the clear input is high, the
latches are closed and are insensitive to X input
changes.

11

NC - No internal connection

The multiplier word data is passed by the Y input in a
serial bit stream, least significant bit first_ The
product is clocked out the PROD output, least
significant bit first.

en

w
U

The multiplication of an m-bit multiplicand by an n-bit multiplier results in an (m + n)-bit product. The 'LS384 must
be clocked for m + n clock cycles to produce this two's complement product. The n-bit multiplier (Y -input) sign bit
data must be extended for the remaining m bits to complete the multiplication cycle.
The device also contains a K input so that devices can be cascaded for longer length X words. The PROD output of one
device is connected to the K input of the succeeding device when cascading. The mode input is used to indicate which
device contains the most significant bit. The mode input is wired high or low depending on the position of the 8-bit
. slice in the total X word length. The device with the most significant bit is wired low and all lower order bit packages
are wired high.

>
w

C

...J

....
....

The SN54 lS384 will be characterized for operation over the full military temperature range from -55°e to 125°e.
o
The SN74 lS384 will be characterized for operation from oOe to 70 e.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:;:s~~il~i~~lu~~Ot~~~~~~nof~~f~~~~n~e~~res~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1045

TYPES SN54LS384, SN74LS384
8-BIT BY 1-81T TWO'S-COMPLEMENT MULTIPLIERS
FUNCTION TABLE
INPUTS

X

L

L

FUNCTION

CLR

CLK

L

X

Xi
Data

H

t

X

L

L

Output

H

t

X

L

H

per

Add multiplicand to sum register and shift

H

t

X

H

L

Booth's

Subtract multiplicand from sum register and shift

H

H

algorithm

H
H

OUTPUT

Y

INTERNAL
Y-1

t

= hIgh-level,

L

X
= low·level,

X

PROD

= .. revelant, t = low·to-hlgh·level

Load new multiplicand and clear internal sum and carry registers
Shift sum register

..

Shift sum register

transItIon

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
VCC------.-----

logic symbol
PROD OUTPUT

Vec

INPUT
OUTPUT
(61 PROD

Y:
Clock:
X, Mode:
K, Clear:

Req = 3 k!1
Req = 6 k!1
Req = 19 k!1
Req = 8 k!1

NOM
NOM
NOM
NOM

1R

3D 4 Q
N4
lR
CI

Pin numbers shown on logic notation are for Jar N packages.

illOgiC diagram (positive logic)

-I
-I
rC

m

<

A4

(")

m

A3

A2

ADDER/SUBTRACTER AND REGISTERS

en

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...................................................
7V
Input voltage (see Note 2)
.......................................................
5.5 V
Operating free-air temperature range: SN54LS384
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. _55°C to 125°C
.... . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
SN74LS384
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
NOTES:

1. Voltage values are \!iith respect to network ground tcrmin3!.
2.

3-1046

Input voltages must be zero or positive with respect to network ground terminal.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS384, SN74LS384
8-BIT BY 1-BIT TWO'S-COMPLEMENT MULTIPLIERS
recommended operating conditions
SN54LS384
MIN

NOM

4.5

5

Supply voltage, VCC

SN74LS384

MAX
5.5

High·level output current, 10H

4.75

5.25

V
p.A

4

Clock frequency, fclock

0

t

45

38

30

24

X before Clear t

23

19

Clear inactive·state set up time before Clock t
Hold time, th

Pulse width, tw

0

K before Clock t

y before Clock

Setup time, tsu

25

30

20

Y after Clock t

0

0

K after Clock t

0

0

X after Clear t

2

2

Clock high

20

20

Clock low

20

20

Clear low

38

33

Operating free-air temperature, T A

-55

125

UNIT

-400

5

-400

Low·level output current, 10L

MAX

MIN NOM

8

rnA

25

MHz
ns

ns

ns

0

70

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

input voltage

TYP:j:

MIN

SN74LS384

MAX

VCC ~ MIN,

II

VCC ~ MIN,

VIH

VIL

~

VIL max,

VCC ~ MIN,

~

-18 rnA
~

VOH

~

2 V,

VCC ~ MAX,

High-level

K, Clear

input current

Clock

VCC = MAX,

V
V

2.7

VI = 5.5 V

VI = 2.7 V

Low-level

K, Clear
Clock

VCC ~ MAX,

VI = 0.4 V

Y

0.25

0.4

0.35

0.5

1

1

20

20

30

30

40

40

80

80

-0.48

-0.48

-1.2

-1.2

-1.6

-1.6

-3.2

lOS

Short-circuit output current§ VCC ~ MAX

ICC

Supply current

VCC = MAX,

-20

-100

See Note 3

V

3.4

0.4

IIOL =8mA

X, Mode
input current

V
-1.5

0.25

tlOL =4 mA

UNIT

-1.5

Y

IlL

MAX
0.8

X, Mode
IIH

TYP:j:

0.7

3.4

2.5

-400 p.A

VIH ~ 2 V,

MIN
2

2

VIL = VIL max
Input current at maximum

II

SN54LS384

TEST CONDITIONSt

PARAMETER

91

V
rnA

p.A

rnA

rnA

91

155

rnA

MIN

TYP

MAX

25

40

t For conditions shown at MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j: All typical values are at V CC ~ 5 V, T A ~ 25° C.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 3: ICC is measured with the clear input grounded and all other inputs and outputs open.

switching characteristics, Vee

= 5 V, T A = 25°e

PARAMETER

TEST CONDITIONS

f max

Maximum clock frequency

tPLH

Propagation delay time, low-to-high-Ievel output from clock

CL=15pF,

tpHL

Propagation delay time, high-to-Iow-Ievel output from clock

RL

tPHL

Propagation delay time, high-to·low-Ievel output from clear

See Note 4

~

2 k.!1,

UNIT
MHz

15

23

15

23

ns

17

25

ns

ns

NOTE 4: See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

:>w
C

-3.2

155

w

u

...J

-100

-20

en

3-1047

lI-

TYPES SN54LS384, SN74LS384
8-BIT BY 1-BIT TWO'S-COMPLEMENT MULTIPLIERS
TYPICAL APPLICATION DATA
'lS384

Bx1 2'5 CaMP"

r--.. Z1/C2

(11

CLEAR (L)

L~
(7)

CLOCK
A23
A22
A21
A20
A19
A1B
A17
A16

(11)

[LOW FOR MSB)

,

C3/~

r

~O

(12)

-

(13)
(14)
(2)
(3)

SRGB

"
P

-

1

R

(5)

-7

3D

(15)

'"'iR"'""

"

(4)

L

~

3D 4 Q

-

N4

1R
(10)
L - C1
'lS384

(1)

r--..

H~
(7)

II

(11)

A15
A14
24·BIT
MUL TIPLICAND

(14)
(2)

A11

(6)

(4)

A9

(5)

AB

C

-

(3)

A10

r-

r-

(13)

A13
A12

-I
-I

..,

(12)

(15)

m

(10)

<

n
m

'lS384

en

(11 r--

H~
(7)

(11)

A7

'1

r

(12)

AS

(13)

AS

(14)

A4

(2)

A3

(3)

A2

(4)

-A1

(5)

AO

(15)
(10)

MULTIP LlER

FIGURE 1-BASIC 24-BIT SERIAL/PARALLEL CONNECTION

3-1048

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

PRODUC T
SERIAL
OUTPU T

~

TYPES SN54LS384, SN74LS384
8-BIT BY 1-BIT TWO'S-COMPLEMENT MULTIPLIERS
TYPICAL APPLICATION DATA
SN54LS322
SN74LS322

OUTPUT ENABLE (L)
SE RIAL (HI/PARALLEL (Ll
REGISTER ENABLE (L)
CLOCK

H~
(8) .. t--.
(1)~

(2)

(1~

SRG8
R
2EN15
G3
3Ml [SHIFT]
3M2 [PAR LOAD]
C6/1~

-.r

"'t
[>

(18)
SIGN EXTENO(L)

G4
(19)

8,4,1,60

L~ G5
4,5,1,60
(17)

L~ 4,5,1,60

(16~
(5)4-

Z7

2,60

'V7,15

[>

2,60

Z8

'V8,15

(15)
(6)
(14)
(7)

(13)
BO

4-

[>

2,60

'V14,15

~

Bl
B2

~

B3
BUS

(12)

J

B4

II
en
w

B5
B6
B7

CLEAi'i (L)
CLOCK

U

'LS384
(1) ,....

8x 1 2'5 CaMP
Zl/C2

~

[LOW FOR MSB]

(7)

(5)
(4)
(3)
(2)
(14)
(13)
(12)
(11)
(15)

L=

>
w

1T

C

C3/ ....

'1
..!£...

0

-

--

-

-J

.J:

lI-

SRG8

1T

)p

r-7

1

R

1T

3D

~

'"'1"R" 3D 4 a
N4

~

lR
(10)
L - Cl

FIGURE 2-8-BIT BY 8-BIT MLiL TIPLlER, BUS ORGANIZED,
WITH 8-BIT TRUNCATED PRODUCT

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1049

TYPES SN54LS385, SN74LS385
QUADRUPLE SERIAL ADDERS/SUBTRACTORS
02412, NOVEMBER 1977 -REVISED APRIL 1985

•

Four Synchronous Elements in a
Single 20-Pin Package

•

Buffered Clock and Direct Clear Inputs

•

Independent Two's-Complement
Addition/Subtraction

SN54lS385 ... J PACKAGE
SN74lS385 .•. OW, J OR N PACKAGE
(TOP VIEW)

elK

Vee

n:

description
The 'LS385 is a general purpose adder/subtractor
and is particularly useful as a companion part to the
SN54LS384/SN74LS384 serial/parallel two's-complement multiplier. The 'LS385 contains four independent adder/subtractor elements with common
clock and clear.
Each of the four independent sum (Ll outputs reflects
its respective A and 8 input as controlled by the S/A
control. When S/A is high the L function is A minus
8. When S/A is low the L function is A plus 8.

18/A
18
1A
2A
28
28/A
2L

4L
48//\
48
4A
3A
38
38//\
3L

GND

ClR

SN54lS385 ..• FK PACKAGE
SN74lS385 ... FN PACKAGE
(TOP VIEW)
~

1<1:

u

(j)lMd~~

When low, the clear input asynchronously resets the
sum flip-flop low and the carry flip-flop either high in
the subtract mode or low in the add mode. The clock
is positive-edge triggered and controls the sum anti
carry flip-flops according to the function table.

3

18
1A
2A
28
28//\

lEI

2. 1 20 19

4

48/A
48
4A
3A
38

5
6

-I
-I

rC
m

<

(1

FUNCTION fABLE
SELECTED
FUNCTION

DATA IN CARRY FLIP-FLOP

INPUTS

BEFORE t

AFTER t

LOUTPUT
AFTER t

ClR

S/A

A

B

ClK

L
L

L
H

X
X

X
X

X
X

L
H

L
H

L
L

Add

H
H
H
H
H
H
H
H

L
L
L
L
L
L
L
L

L
L
L
L
H
H
H
H

L
L
H
H
L
L
H
H

L
H
L
H
L
H
L
H

L
L
L
H
L
H
H
H

L
H
H
L
H
L
L
H

Subtract

H
H
H
H
H
H
H
H

H
H
H
H
H
H
H
H

L
L
L
L
H
H
H
H

L
L
H
H
L
L
H
H

t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t

L
H
L
H
L
H
L
H

L
H
L
L
H
H
L
H

H
L
L
H
L
H
H
L

Clear

m

en

H

= high

level, L:= low level, X

= irrelevant,

t = transition from low to high level at the clock input

TEXAS

~

INSTRUMENTS

TYPES SN54LS385, SN74LS385
QUADRUPLE SERIAL ADDERS/SUBTRACTORS
logic symbol

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS

Vee
18 kn
NOM

(2)

u;

(9)

2~

INPUT~~~~-'-

OUTPUT

(12) 3~

1191 4~

logic diagram (each adder/subtractor, positive logic)

CLK~(~1)~----~~~--------------------~---1~--------------------·~~~:~~~BTRACTORS
A (5,6,15,16)

20

(2,9,12,19)

L

[SUM]
~-------Cf>C2

R

B (4,7,14,17)

II
en
w

u

:>w

S/A (3,8, 13, 18)

C

...J

lICLR ~(..:..11:...:.)_ _~

~---------------------------------*----------.}

TO OTHER
AOOER/SUBTRACTORS

Pin numbers shown on logic notation are for OW. J or N packages.

TEXAS

-1./1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1051

TYPES SN54LS385, SN74LS385
QUADRUPLE SERIAL ADDERS/SUBTRACTORS
recommended operating conditions
SN54LS385
Supply voltage, Vee (see Note 1)

SN74LS385

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-400

IlA

-400

High·level output current, 10H

,

Low-level output current, 10L

4

elock frequency, fclock

UNIT

MIN

0

30

0

8

mA

30

MHz

Width of clock pulse, tw

16

16

ns

Setup time, tsu

10

10

ns

3

Hold time, th
Operating free·air temperature, T A

ns

3

-55

125

0

70

°e

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

-I
-I

r
C

m

~
(")
m

en

M1N

TYP+

SN74LS385

MAX

2
VCC = MIN,

II = -18 mA

Vec = MIN,

VIH = 2 V,

VIL = VILmax,

10H = -400 IlA

Vee = MIN,

VIH = 2 V,

VIL = VILmax
I nput current at

II

SN54LS385

TEST CONDITIONSt

Vee = MAX,

maximum input voltage

2.5

=7

MAX

UNIT
V

2
0.8

V

-1.5

-1.5

V

3.5

2.7
0.4

IIOL - 8 mA
VI

TYP+

0.7

0.25

IIOL=4mA

MIN

V

V

3.5
0.25

0.4

0.35

0.5

0.1

0.1

V

mA

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

Il A

IlL

Low-level input current

Vee = MAX,

VI = 0.4 V

-0.4

-0.4

mA

lOS

Short-circuit output current§

Vee = MAX

lee

Supply current

Vee = MAX,

-100

-20
See Note 2

48

-20

75

48

-100

mA

75

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time.
NOTE 2: lee is measured with all inputs grounded and all outputs open.

switching characteristics, Vee
PARAMETERO

= 5 V, TA = 25°e

FROM

TO

(INPUT)

(OUTPUT)

Clock

l:

Clear

l:

TEST CONDITIONS

f max
tPLH

30

tPHL
tPHL

eL=15pF,
See Note 3

Of max '" maximum clock frequency
tpLH '" propagation delay time, low-to-high-Ievel output
tpH L '" propagation delay time, high-to-Iow-Ievel o~tPut
NOTE 3: See General Information Section for load circuits and ~oltage waveforms.

3-1052

MIN

TEXAS.

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

RL = 2 kfl,

TYP

MAX

40

UNIT
MHz

14

22

18

27

18

30

ns
ns

TYPES SN54LS386A, SN74LS386A
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
MARCH 1974-REVISED DECEMBER 1983

•

SN54LS386A ... J OR W PACKAGE
SN74LS386A ... D. J OR N PACKAGE

Electrically Identical to

SN54LS86A/SN74LS86A
•

(TOP VIEW)

Mechanically Identical to

Vcc

SN54L86/SN74L86
•

Total Average Propagation Delay
Times ... 10 ns

•

Typical Total Power
Dissipation ... 30.5 mW

4B
4A
4Y
3Y
3B
3A

1B
1Y
2Y
2A
2B
GND

FUNCTION TABLE
(EACH GATE)
INPUTS

SN54LS386A ... FK PACKAGE
SN74LS386A ... FN PACKAGE

OUTPUT

A

B

L

L

L

L

H

H

H
H

L

H

H

L

(TOP VIEW)

u

~~~~~
3 2

1 2019

4A

NC

H = high level
L = low level

4Y

NC

logic diagram (each gate)

:---I-)D>---

3Y
9 10 111213

co ClU«CO

N22MM
(!)

Y

NC - No internal connection

positive logic
Y

=

A Et> B

= AB +

II
en

AS

w
U

>
w

schematics of inputs and outputs

C

EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
------------~-----VCC

250
vcc--------~------

n

NOM

-J

lI-

12.5 kn NOM

INPUT--~~~~----~-

......----4t---OUTPUT

PRODUCTION DATA

This document contains information current as
of ~ublication date. Products conform to
specifications per the terms of Texas Instruments

~~~n:ea::s':a~r{var~liu~~Ot~~~~~~nof~~f~~~~':i!e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DAL.LAS. TEXAS 75265

3-1053

TYPES SN54LS386A, SN74LS386A
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...... .
I nput voltage . . . . . . .
...... .
Operating free·air temperature range: SN54LS386A
SN74LS386A
Storage temperature range
NOT.E 1:

7V
7V

-55°C to 125°C
oOe to 70°C
-65°C to 150°C

Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS386A
MIN
Supply voltage, Vee

4.5

NOM

MIN

NOM

5.5

4.75

5

5

High·level output current, 10H

SN74LS386A

MAX
-400

Low·level output CUrrent, 10L

MAX

V

-400

/loA

8

mA

70

°e

4

Operating free·air temperature, T A

-55

125

UNIT

5.25

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

II
-4
-4
r

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH High-level output voltage

MIN

TYP+

MAX

Vee = MIN,

II = -18 mA

Vee = MIN,

VIH=2V,

VIL = VIL max, 10H = -400 /loA

VIH=2V,

I

VIL = VIL maxi

2.5

MIN

TYP+

MAX

2

2

Vee= MIN.
VOL Low·level output voltage

SN74LS386A

SN54LS386A

TEST CONDITIONSt

UNIT
V

0.7

0.8

V

-1.5

-1.5

V

3.4

2.7

V

3.4

-

0.25

10L = 4 mA

0.4

0.25

0.4

0.35

0.5

V
IOL=8mA

mA

II

Input current at maximum input voltage

Vee = MAX,

VI = 7 V

0.2

0.2

IIH

High-level input current

Vee = MAX,

VI=2.7V

40

40

/loA

C

IlL

Low-level input current

Vee = MAX,

VI = 0.4 V

-0.8

-0.8

mA

<

lOS

Short·circuit output current §

Vee = MAX

lee

Supply current

Vee - MAX,

m

n

m

CJ)

-20
See Note 2

-100
6.1

-100

mA

6.1

10

mA

TYP

MAX

12

23

-20

10

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, TA = 25°e.
§Not more than one output should be shorted at a time.
NOTE 2: I ec is measured with the inputs grounded and the outputs open.

switching characteristics, Vee = 5 V, T A = 25°e
PARAMETER~

tPLH

FROM

TEST CONDITIONS

(INPUT)
AorB

Other input low eL=15pF,

tPHL
tPLH

RL = 2 kn,
Aor B

Other input high See Note 3

tPHL

=
=

~tpLH
propagation delay time, low-to-high-Ievel output
tpHL
propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1054

. TEXAS-I./}
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MIN

10

17

20

30

13

22

UNIT
ns
ns

TYPES SN54390, SN54LS390, SN54393, SN54LS393,
SN74390, SN74LS390, SN74393, SN74LS393
DUAL 4-BIT DECADE AND BINARY COUNTERS
OCTOBER 1976-REVISED DECEMBER 1983

•

Dual Versions of the Popular '90A, 'LS90
and '93A, 'LS93

•

'390, 'LS390 ... Individual Clocks for A and B
Flip-Flops Provide Dual-7 2 and -7 5 Counters

•

'393, 'LS393 ... Dual 4-Bit Binary Counter
with Individual Clocks

•

All Have Direct Clear for Each
4-Bit Counter

o

Dual4-Bit Versions Can Significantly Improve
System Densities by Reducing Counter Package
Count by 50%

•

Typical Maximum Count Frequency ... 35 MHz

•

Buffered Outputs Reduce Possibility of Collector
Commutation

SN54390, SN54LS390 ... J OR W PACKAGE
SN74390 ... J OR N PACKAGE
SN74LS390 .•. D, J OR N PACKAGE
(TOPVIEWI

lCKA
lCLR
lOA
lCKB
lOB
1OC
100
GNO

VCC
2CKA
2CLR
20A
2CKB
20B
2OC
20 0

SN54LS390 •.• FK PACKAGE
SN74LS390 ... FN PACKAGE
(TOPVIEWI

5~

u~

~.~ ~ ~

g
2CLR
2QA
NC
2CKB
2GB

lOA
lCKB
NC
lOB
1OC

description
Each of these monolithic circuits contains eight
master-slave flip-flops and additional gating to implement two individual four-bit counters in a single
package. The '390 and 'LS390 incorporate dual
divide-by-two and divide-by-five counters, which can
be used to implement cycle lengths equal to any
whole and/or cumulative multiples of 2 and/or 5 up
to divide-by-l00. When connected as a bi-quinary
counter, the separate divide-by-two circuit can be
used to provide symmetry (a square wave) at the final

ClClUClU

02200
~<.:1

NN

SN54393. SN54LS393 ... J OR W PACKAGE
SN74393 ..• J OR N PACKAGE
SN74LS393 ... D, J OR N PACKAGE
(TOPVIEWI

lA
lCLR
lOA
lOB
1OC
10 0
GNO

output stage. The '393 and 'LS393 each comprise
two independent four-bit binary counters each having
a clear and a clock input. N-bit binary counters can
be implemented with each package providing the
car:/ability of divide-by-256. The '390, 'LS390, '393,
and 'LS393 have parallel outputs from each counter
stage so that any sUbmultiple of the input count
frequency is available for system-timing signals.

II
en
w

(J

VCC
2A
2CLR
20A
20B
2OC
20 0

>
W
C
...J

........

SN54LS393 ... FK PACKAGE
SN74LS393 ••. FN PACKAGE
(TOPVIEWI

5

Series 54 and Series 54LS circuits are characterized
for operation over the full military temperature range
of -55°C to 125°C; Series 74 and Series 74LS
circuits are characterized for operation from O°C
o
to 70 e.

U

~:!~~~
2CLR
NC
20A
NC
20B

lOA
NC
lOB
NC
10C
ClClUClU

02200
~<.:1

NN

NC - No internal connection

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:{~s~~rl~a~liu:~Ot~~~f~~nof~~f~~~~~e~:~s~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1055

TYPES SN54390, SN54LS390, SN54393, SN54LS393,
SN74390, SN74LS390, SN74393,SN74LS393
DUAL 4-81T DECADE AND BINARY COUNTERS
FUNCTION TABLES

COUNT

0
1

OUTPUT

COUNT

QO QC QB QA
L
L
L
L
L

L

L

H

QO QC QB QA

OUTPUT
QA QO QC QB

0

L

L

L

L

1

L

L

L

H

2

L

L

H

L

2

L

L

H

L

L

L

H

H

3

L

L

H

H

4

L

H

L

L

4

L

H

L

L

5

L

H

L

H

H

L

L

L

6

L

H

H

L

H

L

L

H

7

L

H

H

H

5
6
7

H

L

H

L

8

H

L

L

L

8

H

L

H

H

9

H

L

L

H

9

H

H

L

L

A. Output QA is connected to input B for BCD count_
B. Output QD is connected to input A for bi-quinary
count.
C. H = high level, L = low leveL

0

L

L

L

L

1

L

L

L

H

2
3
4

L

L

H

L

L

L

H

H

L

H

L

5
6

L

H

L

L
H

L

H

H

L

7

L

H

H

H

8
9
10
11
12

H

L

L

H
H

L

L

L

H

L
H
L

H

L

H

H

H

H

L

L

13
14
15

H

H

L

H

L
H

logic diagrams
0A

II
-f
-f

r-

(1,15)
INPUT A-------------~ T

(3. 13) OUTPUT
OA

CLEAR

QB

(5. 11) OUTPUT

(4,12)
INPUT B~---+------~~

°B

C

m

<

("')

m

(6,

CJ)

10) OUTPUT

Oc

(7.
00

T

aD

CLEAR

(2,
CLEAR 14)
INPUT

'390, 'LS390
Pin ntlmhp.rs ~hown on loaic notEltio'1 are for D. J or N pE!ckages.

3-1056

OUTPUT

COUNT

3

NOTES:

'393, 'LS393
COUNT SEQUENCE
(EACH COUNTER)

'390, 'LS390
BI-QUINARV (5-2)
(EACH COUNTER)
(See Note B)

'390, 'LS390
BCD COUNT SEQUENCE
(EACH COUNTER)
(See Note A)

~

TEXAS
INSTRUMENTS
pbST OFFICE BOX 225012 • DALLAS. TEXAS 75265

9)

OUTPUT
00

H

H

H

H

H

H

TYPES SN54390, SN54LS390, SN54393, SN54LS393,
SN74390, SN74LS390, SN74393, SN74LS393
DUAL 4-BIT DECADE AND BINARY COUNTERS
'393, 'LS393

logic diagrams (continued)

13. 111 OUTPUT

°A

11.131

INPUT A

------d>
CLEAR

14.101 OUTPUT
OB

15.91 OUTPUT
Oc

16.81 OUTPUT

00

CLEAR
CLEAR 12.121
INPUT
Pin numbers shown on logic notation are for D, J or N packages.

schematics of inputs and outputs

'390, '393

VCC3--

EQUIVALENT OF EACH INPUT

.

TYPICAL OF ALL OUTPUTS

en

Req

INPUT

w

--

U

>
w
C

A

INPUT
Req NOM
('390)...... 3 k!1.

B

('390) ...... 1.5 k!1.

A

('393)...... 3 k!1.

-

Any clear. . . • .. 8 k!1.

'LS390, 'LS393

..oJ

-

EQUIVALENT OF EACH
A AND B INPUT

EQUIVALENT OF EACH
CLEAR INPUT

VCC

VCC

c o
Req

INPUT

INPUT

JJ-

TYPICAL OF ALL OUTPUTS

, 1 8 k!1. NOM

INPUT

--

--

Req NOM

A ('LS3901. ........ 4.3 k!1.
B ('LS3901. ........ 2.7 k!1.
A ('LS3931. ........ 4.3 k!2

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1057

TYPES SN54390, SN54393, SN74390, SN74393
DUAL 4-BIT DECADE AND BINARY COUNTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
........ .
Input voltage . . . . . . . . . . . . . . . . .
Operating free·air temperature range: SN54390, SN54393
SN74390, SN74393
Storage temperature range

7V
5.5V
-55°e to 125°C
oOe to 700e
-65°e to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54390

SN74390

SN54393

. SN74393

MIN
Supply voltage, Vee

4.5

NOM
5

High·level output current, IOH

MIN

NOM

5.5

4.75

5

-800

Low-level output current, IOL
B input

Pulse width, tw

0

25

0

20

16
25

0

20

20

20

B input high or low

25

25

Clear high

20

20

Clear inactive-state setup time, tsu

25~

5.25

0

A input high or low

Operating free-air temperature, T A

UNIT
MAX

-800

16
A input

Count frequency, fcount

II

MAX

125

rnA
MHz

ns

25~

-55

V
J.l.A

ns

0

70

°e

I The arrow indicates that the falling edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONst

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

C

VOH

High-level output voltage

=5

VOL

Low-level output voltage

-t
-t
r-

m

n

II

CJ)

TYPt

maximum input voltage

Vee = MIN,

II = -12mA

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

IOH = -800 IlA

Vee = MIN,

VIH=2V,

VIL = 0.8 V,

IOL = 16mA~

Vee = MAX,

VI = 5.5V

2.4

High-level input current

I Input A

r---

Low-Ievel~nput

current

Clear
I Input A

TYPt

MAX

0.2

V
0.8

V

-1.5

-1.5

V

2.4
0.4

3.4
0.2

1

Vee = MAX, VI = 2.4 V

UNIT

0.8

3.4

Input B

IlL

MIN
2

Clear
IIH

MAX

2

Input current at

m

'393

'390
MIN

V
0.4
1

40

40

80

80

V
rnA,

Il A

120
Vee = MAX,

VI=O.4V

I Input B'

-1

-1

-3.2

-3.2

rnA

-4.8
ISN54'

-20

-57

-20

-57

/SN74'

-18

-57

-18

-57

lOS

Short-circuit output current§

Vee = MA.X

ICC

Supply current

Vee = MAX, See Note 2

42

69

38

64

rnA
rnA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j: All typical values are at V CC = 5 V, T A = 25° C.
~ The QA outputs of the '390 are tested at IOL = 16 mA plus the limit value for IlL for the B input. T,his permits driving the B input while
maintaining full fan·out capability.

§ Not more than one output should be shorted at a time.
NOTE 2: ICC is measured with all outputs open, both clear inputs grounded following momentary connection to 4.5 V, and all other inputs
grounded.

3-1058

TEXAS

-I.!}

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54390, SN54393, SN74390, SN74393
DUAL 4-BIT DECADE AND BINARY COUNTERS

switching characteristics, Vee = 5 V, T A = 25°e
PARAMETER~
f max
tpLH

TO
(OUTPUT)

A

°A

25

35

B

°B

20

30

A

tpHL
tPLH

A

tpHL
tPLH
tPLH
tPLH

RL; 400

B

°c

TYP

MAX

MIN

TYP

25

35

20

13

20
60
60

13
37

60

39

60

40

See Note 3

13

21

and

14

21

Figure 1

24-

39

26

39

13

21

B

°D

14

21

Any

24

39

UNIT
MHz

20

20

40

n,

MAX

12

12

Clear

tpHL
tPHL

CL;15pF,

0D of '393
°B

tpHL

_ MIN

°A
0c of '390

B

tpHL

TEST CONDITIONS

'393

'390

FROM
(INPUT)

ns
ns
ns
ns
ns

24

39

ns

~ f max

== maximum count frequency
tp LH == propagation delay time, low-to-h igh-Ievel output
tpH L == propagation delay time, high-to-Iow-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

en

w
CJ

>
w
C

..J

ff-

. TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1059

II

S30lA30 1.1.1

'f

o
m
o

g~

l>"
,-m
~en
I

en

!!!Z
-ten
of)
m(O
09

l>en
Oz
men

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 3v
CLEAR·

~-;5-:----

INPUT-----/:

I

~I

..

I

I

14-

tsu

Sf

It

--t

l>~

ov
~

-I

tw(clock)

l>

.

:II

I~
..
~--3V

~
~

~

~z

't3CJ)

~ ..;-~
~;c r.1

~

IN:UT·:

,-

~z

tPHL

OUTPU~~~ --;"'1--~
'390B
I
~1.5V
INPUT

~ tpHL -

I

1

~

V-4f

t

1 5V
.

OUTPUTOB

x

--

I ~
1
\
I..---.t-i

r-----t-

I

1.5V

I.\1I

1.5V

\

I4---et- tpHL
___
OUTPUT 00

tpLH - Measure at tn+2

I

II

~I

.\.,1.5 V

's

t

tpLH - Measure at tn+4

\:.

tpHL - Measure at tn+4

I,

It

I

I
1

!1.5V

I

1

1I

•

I
I.

,_

r----t-

VOL

~1.5V

!1.5V

t---II}
-

OH

~
I.

~ tpLH -

VOL

,...--,} tpHL - Measure at tn+8

;------t
I ~ 1.5V
I
\.: VOL

rt-I--VOH

Measure at t n+8

I

II

/1.5 V

----------------~H·

i

~tPHL -

Measure at t n +10 10r '390
ortn+16 10r '393

-VOH

~ 1.5 V

\:.VOL

VOLTAGE WAVEFORMS
NOTE A: Input pulses are supplied by a generator having the following characteristics tr .;; 5 ns, tf .;; 5 ns, PRR

FIGURE 1

m

::c e,,)
o,,?

~

Oen
Z

:c

V

= 1 MHz, dutY cycle = 50%, Zout'" 50 ohms.

c~

men
z
zl>~
......

m

-i

H - I - -VOH

H .
tpHL

- - --~I
OUTPUTOC

I
I
I

~

ov

rH-'I"\- - - -

1

1

l;

at tn+2

l>

.

I
I

Measure

'

~I

1.5V·

1

l\1.5V

,....-.:- tPHL
-

.

I

tPLH-J.........t
Measure
I

at tn+1

1.5V

:

~~~
.,'"m

-,

1 1.5V

1.5V

1

~

.,~3:
c:~
~!TI

.

z~

m

l>
en
C

:c
m

s:

m

Z
-i

:2
'TI

o

:II

s:

l>

-i

o:2

-<(0

c:::
z ......
-t~

me,,)

~~

TYPES SN54LS390, SN54LS393, SN74LS390, SN74LS393
QUAL 4-BIT DECADE AND BINARY COUNTERS
absolute maximum ratings over operating free-air temperature range (uniess otherwise noted)
Supply voltage. Vcc (see Note 1)
Clear input voltage . . . . . .
Any A or B clock input voltage
Operating free-air temperature range: SN54LS390. SN54LS393
SN74LS390,SN74LS393
Storage temperature range

. 7V
. 7V

5.5 V
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS390
SN54LS393
MIN
Supply voltage, Vee

NOM

4.5

MAX

MIN

NOM

5.5

4.75

5

5

High-level output current, IOH

SN74LS390
SN74LS393
5.25

-400

Low-level output current, 10L
Count frequency, fcount

B input

Pulse width, tw

0

25

JlA

S

rnA

0

12.5

0

25

0

12.5

A input high or low

20

20

B input high or low

40

40

elear high

20

20

25~

Clear inactive-state setup time, tsu
Operating free-air temperature, T A

125

MHz

ns

25~

-55

V

-400

4
A input

UNIT

MAX

ns
70

0

°e

~ The arrow indicates that the falling edge of the clock pulse Is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Low-level output voltage
Input current at

II

maximum input voltage

MIN TYP:(:

Vee= MIN,

11=-lSmA

Vee= MIN,

VIH=2V,

VIL = VILmax,

VOH = -400 /JA

Vee= MIN,

VIH = 2 V,

VIL = O.S V,

2.5

VI-7 V

~ Vee = MAX

VI = 5.5 V

-

Input B

High-level input current

-~

Vee = MAX,

VI=2.7V

Input B

IlL

elear
f--Low-level input current llnput A Vee = MAX,

VI = 0.4 V

Input B
lOS
lee

Short-circuit output current§
Supply current

-20

Vee = MAX

V

0.7

O.S

V

-1.5

V

2.7
0.4

10L -S mA'l

elear

UNIT

-1.5
3.4
0.25

IOL=4mAll

MAX

2

elear

IIH

SN74LS'

MAX MIN TYP+

2

VOH High-level output voltage
VOL

SN54LS'

TEST CONDITIONSt

PARAMETER

V

3.4
0.25

0.4

0.35

0.5

0.1

0.1

0.2

0.2

0.4

0.4

0.02

0.02

0.1

0.1

0.2

0.2

-0.4

-0.4

-1.6

-1.6

-2.4

-2.4

-100

-20

-100

Vee = MAX,

'LS390

15

26

15

26

See Note 2

'LS393

15

26

15

26

V

II
en
w

(.)

>
W
C
....I

rnA

lI-

mA

rnA
mA
mA

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
llThe QA outputs of the 'LS390 are tested at 10l = MAX plus the limit value for III for the clock B input. This permits driving the clock B
input while maintaining full fan-out capability.
§ Not more than one output should be shorted at a time,and duration of the short-circuit should not exceed one second.
NOTE 2: Ice is measured with all outputs open, both clear inputs grounded following momentary connection to 4.5 V, and all other inputs
grounded.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1061

TYPES SN54LS390, SN54LS393, SN74LS390, SN74LS393
DUAL 4-BIT DECADE AND BINARY COUNTERS

switching characteristics,
PARAMETER~

f max
tPLH

Vee = 5 V, TA = 25° e

'FROM

TO

(INPUT)

(OUTPUT)
QA

25

35

QB

12.5

20

A

QA

A

25

35

MAX

20

12

20

13

20

13

20

37

60

40

60

RL = 2 kn,

39

60

40

60

See Note 4 and Figure 2

13

21

B
B

QB
QC

B

QD

Clear

Any

14

21

24

39

26

39

13 .

21

14

21

24

39

tpLH '" propagation delay time, low·to-high-Ievel output
tpH L '" propagation delay time, high-to-Iow-Ievel output
NOTE 4: See General Information Section for load circuits and voltage waveforms.

II
-I
-I

rC

m

<
("')

m

(J)

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT
MHz

12

~fmax '" maximum count frequency

3-1062

TYP

CL=15pF,

tPHL
tpHL

MIN

QC of 'LS390

tpHL
tpLH

'LS393
MAX

QD of 'LS393

tPHL
tpLH

TYP

B

tPHL
tPLH

MIN

A

tpHL
tPLH

'LS390

TEST CONDITIONS

ns
ns
ns
ns
ns

24

39

ns

~~:~~

f'v

~~~~---~1-----------~1---------

I- -,
'N~UT
~,.'V ~,.'V / \
~
:'Y~ . -. iL;J
~
I

~ tsu

i

§
3

:""-t
1-I PHL

n :;;Z

~~

§iOr;;1

"C~
~~
~1'T1

~Z

~~~
l;,
<.n

OUTPU~~~--";'I-""\!
'LS390
B INPUT

<.n

tPLH--J....-..t
Measure
I
attn+1

\

1.3V

r-----r-

tw(clock)

~rf

t

OUTPUTQB

1.3V

\

tpHL

:.-...r-

I
i
-- --'I
I ~

I!.---.tI

___

I

~ 1.3V
\

:

""tI

l>

I
1.3V

H
tpHL

I

I

I

I
I
,

Measure at t n +4

r---t-

_

I
I

!1.3V

".

Measure at tn+8

/1.3 V

-------------&-----------------~l·~S--------------J·

If

_

i

-I

VOH

VOL
tpLH - Measure at tn+4

S

~

m

l>
CJ)

"enm

C

en

::0

m

~ 1.3V

S

CZ

\:

-I

en
""

2

mo

q}

VOL

tpLH - Measure at t n +8

I )..
,

m

m

I
( f - I' - - V
OH
1.3V

I

.\.,1.3 V

I

l>

S

:JJ

f f - I - -VOH

I

~ tpHL -

ov

rr---n--~

I ,

I_

I

'v

I
I
I

!1.3V

~} tpHL -

II_

tpHL

:JJ

,\-;:-,~--

Sf·

\

~I

I

1.3V

I
~. tpLH - Measure at t n+2

:

i

J

~tPLH-Measure
I
I
at tn+2

- - -""

OUTPUTQC

en

I

~

\:.

VOL

~} tpHL -

't

_

Measure at t n +10 for 'LS390
VOH
or tn+16 for 'LS393

1.3 V

~VOL

m
2

":JJo
S
l>

::!

o2

c:: c.n
l>~
~c:.:»

I

CO

=t'Cn

CZ

mc.n
(')~

l>"

C~

mco
l>~

Zen

CZ

m~

-- I

VOLTAGE WAVEFORMS

NOTE A: I nput pulses are supplied by a generator having the following characteristics tr": 15 ns, tf ..: 6 ns, PR R = 1 M Hz, duty cycle '= 50 %,
Zout"" 50 ohms.

Zen
l>c:.:»
::c
CO
-<9
(')en
Oz
c:: ......
z~

FIGURE 2

Cf
o

en
(.oJ

TTL DEVICES

III

-I"

men
::c~

cnc:.:»

II
-I
-I

r-

C

m

<

n

m

VJ

3-1064

TYPES SN54LS395A, SN74LS395A
4-BIT CASCADABLE SHIFT REGISTERS WITH 3-STATE OUTPUTS
OCTOBER 1976-REVISED DECEMBER 1983

• Three-State, 4 Bit, Cascadable, Parallel-In,
Parallel-Out Registers

SN54LS395A ... J OR W PACKAGE
SN74LS395A ... 0, J OR N PACKAGE
(TOP VIEW)

• 'LS395A Offers Three Times the Sink-Current
Capability of 'LS395

ClR
SER
A
S
C
D
LD/SH
GND

• Low Power Dissipation . . . 75 mW Typical
(Enabled)
• Applications:
N-Bit Serial-To-Parallel Converter
N-Bit Parallel-To-Serial Converter
N-Bit Storage Register

VCC
OA
Os
Oc
OD
OD'
ClK
OC

description
SN54LS395A ... FK PACKAGE
SN74LS395A ... FN PACKAGE
(TOP VIEW)

These 4-bit registers feature parallel inputs, parallel outputs, and clock (ClK), serial (SER), load shift (lD/SH),
output control (OC) and direct overriding clear (ClR)
inputs.

ffil5 u ~ d

Shifting is accomplished when the load/shift control is
low. Parallel loading is accomplished by applying the
four bits of data and taking the load/shift control input
high. The data is loaded into the associated flip-flops
and appears at the outputs after the high-to-Iow transition of the clock input. During parallel loading, the entry
of serial data is inhibited.

A
S
NC

C
D

When the output control is low, the normal logic levels
of the four outputs are available for driving the loads or
bus lines. The outputs are disabled independently from
the level of the clock by a high logic level at the output
control input. The outputs then present a high impedance and neither load nor drive the bus line;
however, sequential operation of the registers is not affected. During the high-impedance mode, the output at
0D' is still available for cascading.

en
w

NC· No internal connection

u

:>w

C

-I

l-

I-

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~;nndea::s':a~f{:r;%iu~~Ot~~~~~~nor~~f~~~~n~e~~:s~

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1065

TYPES SN54LS395A, SN74LS395A
4-BIT CASCADABLE SHIFT REGISTERS WITH 3-STATE OUTPUTS
logic diagram
DATA INPUTS

(6)

(5)

(4)

(3)

D

C

B

A

.

(15)

,QA

(13)

Dc

(12)

(11)

QD

I

QD'
CASCADE
OUTPUT

3·STATE OUTPUTS

Pin numbers shown on logic notation are for D, J or N packages.

schematics of inputs and outputs

II

EOUIVALENT OF SERIAL
AND DATA INPUTS

Vee -----<_-

"""i
"""i

vee

rC
m

TYPICAL OF 0A. 0B. 0C. 0D
OUTPUTS

---..--Vee

TYPICAL OF 0D' OUTPUTS

-----vcc

20k 11 NOM

----<,-

INPUT -..-+11.....

INPUT-

<

(')

m

en

o

EOUIVALENT OF
OTHER INPUTS

Serial: Req = 30 kn NOM
A, B. C, D: Req = 20 kn NOM

3-1066

--

TEXAS

OUTPUT

"J1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

OUTPUT

TYPES SN54LS395/(, SN74LS395A
4-81T CASCADABLE SHIFT REGISTERS WITH 3-STATE OUTPUTS

FUNCTION TABLE
INPUTS
ClR

lDtSH

ClK

SER

l
H

X

X

X

H
H

H

L

H

X
X
X

H

L

l

H

H

L

l

L

H
H

l

3-ST A TE OUTPUTS CASCADE
OUTPUT
QA QB QC QD
QD'
A B C D
L
L
L
L
X X X X L
X X X X QAO QBO QCO 000
000
c
d
d
a b c d
a
b

PARAllEL

X X X X QAO QBO OCO QOO
X X X X H QAn 0Bn 0Cn
X X X X L QAn 0Bn 0Cn

000
°Cn
°Cn

When the output control is high, the 3-state outputs are disabled to the high-impedance state;
however, sequential operation of the registers and the output at aD' are not affected_

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee (see Note 1)
_ _ . . . . .
Input voltage . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS395A
SN74LS395A
Storage temperature range

7V
7V
_55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54lS395A
Supply voltage, VCC

SN74lS395A

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5
-1

4.75

5

5.25

V

High-level output current, IOH

QA. QB. Oc, QO
QO

-2.6

mA

-400

-400

Low-level output current, IOL

QA,QB.Oc,OO
00

12
4

24
8
30

/.lA
mA
mA
MHz

Clock frequency. fclock

0

Width of clock pulse, tw(clock)
Setup time. high-level or low-level data, tsu

30

Hold time. high-level or low-level data, th
Operating free-air temperature, TA

40
20
10
-55

. TEXAS'"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75<0:'

ns

16
40

16
LO/SH
All other inputs

0

ns

20
125

10
0

II
en

w
U

:;
w
C
-'

lI-

ns
70

°c

3-1067

TYPES SN54LS395A,SN74LS395A
4-BIT CASCADABLE SHIFT REGISTERS WITH 3-STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

10ZH
10ZL

SN74LS395A

MAX

MIN

TYP+

High-level output voltage

VCC = MIN,

11=-18mA

VCC = MIN,

VIH=2V,

VIL = VIL max,

10H = MAX

Low-level output voltage

VIL = VIL max,

°A,OS,
°C,OO

Oc,OO

2.5

00

VIH=2V,

OA,OS,

VIH=2V,

Oc,OO
OA,OS,

VCC - MAX,
VO=2.7V

Off-state output current,

VCC = MAX,

low-level voltage a'pplied

VO=O.4V

2.7

0.25

0.4

0.25

0.4

10L = 24 mA
10L - 4 mA

00

Off-state output current,

2.4

3.4

10L -12mA

VIH = 2 V

high-level voltage applied

3.4

2.4

10L = 8 mA

Oc,OO

UNIT
V

-1.5
OA,OS,

MAX

2
0.7

Input current at

0.8

V

-1.5

V

3.1

V
V

3.4
0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V
V

20

20

pA

-20

-20

pA
mA

VCC = MAX,

VI =7V

0.1

0.1

IIH

High-level input current

VCC = MAX,

VI = 2.7 V

20

20

pA

IlL

Low-level input current

VCC = MAX,

VI=O.4V

-0.4

-0.4

mA

lOS

Short-circuit output current9

VCC = MAX

II

maximum input voltage

OA,OS,
Oc,OO

00

lEI

TYP+

MIN
2

VCC = MIN,
VOL

SN54LS395A

TEST CONDITIONSt

PARAMETER

ICC

Supply current

VCC = MAX,

See Note 2

-30

-130

-30

-130

mA

-20

-100

-20

-100

mA

Condition A

22

Condition S

21

34
31

22

34

21

31

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

C

+AII tYpical values are at Vee = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time,and duration of the short-circuit should not exceed one second.
NOTE 2: ICC is measured ,with the outputs open, the serial input and mode control at4.5 V, and the data inputs grounded under the following
conditions:
A. Output control at 4.5 V and a momentary 3 V, then ground, applied to clock input_
B. Output control and clock input grounded.

<

switching characteristics, Vee

-i
-i

r-

m

n

m

rn

= 5 V, TA = 25° C '

PARAMETER

TEST CONDITIONS

f max

Maximum clock frequency

tpHL

Propagation delay time, high-to-Iow-Ievel output from clear

tPLH

Propagation delay time, low-to-high-Ievel output

30

See Note 3,
OA, OS, OC, 00 outputs:
RL = 667

MIN

.n, CL = 45 pF

TYP

MAX

45

UNIT
MHz

22
15

35
30

ns
ns

20

30

ns

15

ns

17

25
25

tpHL

Propagation delay time, high-to-Iow-Ievel output

tpZH

Output enable time to high level

tpZL

Output enable time to low level

tpHZ

Output disable time from high level

CL=5pF,

11

17

ns

tpLZ

Output disable time from low level

See Note 3

12

20

ns

00' output:
RL = 2 kn, CL = 15 pF

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1068

"I}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 7526b

ns

TYPES SN54LS396, SN74LS396
OCTAL STORAGE REGISTERS
02329. MARCH 1977-PREVISEO DECEMBER 1983

o

SN54LS396 .•. J OR W PACKAGE
SN74LS396 ..• O. J OR N PACKAGE
(TOP VIEW)

Parallel Access

•

Typical Propagation Delay Time ... 20 ns

•

Typical Power Dissipation ... 120 mW

~

Applications:
N-Bit Storage Files
Hex/BCD Serial-To-Parallel Converters

201
101
01
202
102
02

description
These octal registers are organized as two 4-bit bytes
of storage. Upon application of a positive-going clock
signal. the information stored in byte 1 is transferred
into byte 2 as a new 4·bit byte is loaded into the
byte 1 location via the four data lines. The full 8·bit
word is available at the outputs after two clock
cycles. Both the clock and the strobe lines are fully
buffered.

ClK

204
104
04
203
103

GNO

D3

SN54LS396 ... FK PACKAGE
SN74LS396 ••• FN PACKAGE
(TOP VIEW)

u

~~

~ ~ ~ ~I(!)
01
202

logic symbol
STROBE

VCC

G

G

NC

NC

102
02

04
203

elK
101
201

01

2Q4
1Q4

102

II

202
103
203
104

04

NC - No internal connection

204

en
w

u

Pin numbers shown on logic notation are for D. J or N packages.

:>
w

FUNCTION TABLE
INPUTS
STROBE

G

CLOCK

OUTPUTS
BYTE 1

DATA
01

D2

03

04

H

X

X

X

X

X

101
L

L

t

a

b

c

d

a

102

103

L
b

C

BYTE 2
201

L

104
L

c

d

101 n

L

202
L

203
L

L

102n

103 n

104 n

204

...J

lI-

H = high level (steady state), L = low level (steady state), X = irrelevant (any input, including transitions)

t

= transition from low to high level

101 n' 102 n , 103 n , 104n

=

the level of 101, 102, 103, and 104, respectively, before the most recent

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s~~rl~ar:liu~~Ot~~~:~~nor~~f~~~~Je~~~s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

t transition of the clock.

3-1069

TYPES SN54LS396, SN74LS396
OCTAL STORAGE REGISTERS

logic diagram
CLOCK..:.:(7;.:...'.......---1

schematics of inputs and outputs
~:-::::=:::~~=-=:.::..::~-01

EQUIVALENT OF EACH
INPUT

01 (3)

TYPICAL OF ALL OUTPUTS

----+--Vcc

Vcca-Req

INPUT

.

--

02,;..;.(6.:....'_ _--+-+-I

OUTPUT

CLOCK: Req = 10 kf2 NOM
OTHERS: Req = 20 kf2 NOM

03 (9)

L__ ~___ ___ ~ __ JI

I

byte

Pin numbers shown on logic notation are for 0, J or N packages.

11

absolute maximum ratings over operating

fr~e-air

temperature range (unless otherwise noted)

Supply voltage, Vee (see Note 1) . . . . . .
Input voltage . . . . . . . . . . . . . .
Operating free-air temperature range: SN54LS396
SN74LS396
Storage temperature range

~
~

r-

..... 7 V
..... 7 V

-55°C to 125°e
aOc to 7aoe
-65°C to 15aoC

C
m

NOTE 1: Voltage values are with respect to network ground terminal.

(")

recommended operating conditions

<

m

en

SN54LS396

UNIT

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-400

IJA

Supply voltage, VCC
High·level output current, IOH

-400

Low·level output current, IOL

4

8

mA

30

MHz

Clock frequency, fclock

0

Width of clock pulse, tw

20

20

ns

Setup time, tsu

20

20

ns

Hold time, th
Operating free-air temperature, T A

3-1070

SN74LS396

MIN

30

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

ns

5

5
-55

0

125

0

70

°c

TYPES SN54LS396, SN74LS396
OCTAL STORAGE REGISTERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VCC - MIN,

11--18mA

VCC ~ MIN,

VIH ~ 2 V,

VIL ~ MAX,

10H ~ -400 !-LA

IIH

IlL

SN74LS396

MAX

IIOL

I nput current at

Clock input

maximum input voltage

Other inputs

High-level

Clock input

input current

Other inputs

Low-level

Clock input

input current

Other inputs

VCC ~ MAX,

VI

~

VCC ~ MAX,

VI

Short-circuit output current S

VCC ~ MAX

ICC

Supply current

VCC ~ MAX,

MAX

2.5

UNIT
V

0.7

0.8

V

. - -1.5

-1.5

V

2.7

3.4
0.25

0.4

V

3.4
0.25

0.4

0.35

0.5

V

7 V

VI~2.7V

lOS

TYPt

~ 8 mA

VCC ~ MAX,

~

MIN
2

IIOL~4mA

VIH ~ 2 V,

Low-level output voltage

VIL ~ MAX
II

TYPt

MIN
2

VCC ~ MIN,
VOL

SN54LS396

TEST CONDITIONSt

PARAMETER

0.4 V

0.2

0.2

0.1

0.1

40

40

20

20

-0.8

-0.8

-0.4
-20

-100

See Note 2

24

-0.4
-20
24

40

mA

!-LA
mA

-100

mA

40

mA

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
tAl! typical values are at VCC ~ 5 V, T A ~ 25°C.
§ Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
NOTE 2: ICC is measured with 4.5 V applied to al! inputs and all outputs open.

switching characteristics,

Vee = 5 V, T A = 25° e

PARAMETER

TEST CONDITIONS

tPLH

Propagation delay time, low-to-high-Ievel output from clock

tpHL

Propagation delay time, high-to-Iow-Ievel output from clock

tpLH

Propagation delay time, low-to-high-Ievel output from strobe

tpHL

Propagation delay time, high-to-Iow-Ievel output from strobe

CL~15pF,

RL'~

2 kn,

See Note 3

MIN

TYP

MAX

20

30

20

30

20

30

20

30

UNIT
ns

ns

II
en
w

u

:>w

NOTE 3: See General Information Section for load circuits and voltage waveforms.

C

...J

lI-

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

3-1071

-I
-I

r-

C
m

~
m

(")

en

3-1072

TYPES SN54LS398, SN54LS399
SN74LS398,SN74LS399
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
OCTOBER 1976-REVISED DECEMBER 1983

•

Double-Rail Outputs on 'LS398

•

Single-Rail Outputs on 'LS399

•

'LS398 is Similar to 'LS298,
Which Has Inverted Clock

SN54lS39S .•. J OR W PACKAGE
SN74lS39S ... ow, J OR N PACKAGE
(TOP VIEW)

•

Selects One of Two 4-Bit Data Sources
and Stores Data Synchronously with System Clock

•

Applications:
Dual Source for Operands and Constants
in Arithmetic Processor; Can Release
Processor Register Files for Acquiring
New Data
Implement Separate Registers Capable of
Parallel Exchange of Contents Yet Retain
External Load Capability
Universal Type Register for Implementing
Various Shift Patterns; Even Has Compound
Left-Right Capabilities

description
These monolithic quadruple two-input multiplexers
with storage provide essentially the equivalent functional capabilities of two separate MSI functions
(SN54LS157/SN74LS157
and
SN54LS175/
SN74LS175) in a single 16-pin or 20-pin package_

WS
GA
OA
A1
A2
B2
B1
DB

VCC

00
18
4

17

6

15

7

14

00
01
02
C2
C1

16

Os

8

13

Dc

9

12

Oc

10

11

ClK

GNO

SN54lS398 .•. FK PACKAGE
SN74LS398 ..• FN PACKAGE
(TOP VIEW)

ctctlJ)
10 0

U

o

~ ~O

A1
A2
B2
61
OB

00
01
02
C2
C1

SN54lS399 •.. J OR W PACKAGE
SN74lS399 .•• O. J OR N PACKAGE

When the word-select input is low, word 1 (A 1, 81,
Cl, D1) is applied to the flip-flops. A high input to
word select will cause the selection of word 2 (A2,
82, C2, D2). The selected word is clocked to the
output terminals on the positive-going edge of the
clock pulse.
Typical power dissipation is 37 milliwatts.
SN54LS398 and SN54LS399 are characterized for
operation over the full military range of _55° C to
125°C, SN74LS398 and SN74LS399.are characterized for operation from O°C to 70°C.

WS
OA
A1
A2
62
61
OB
GNO

1

U

16

2

15

3

14

4
5
6

13

7

10

8

9

12
11

II
en
w

(TOP VIEW)
VCC
OD
01
02
C2
C1

CJ

>
w

C

-J

Oc

lI-

ClK

SN54lS399 ... FK PACKAGE
SN74lS399 .•. FN PACKAGE
(TOP VIEW)

ctg!u ~o

O;>Z>O
FUNCTION TABLE
INPUTS
WORO

OUTPUTS

A1
A2
NC
62
61

CLOCK

aA

aB

ac

t
t

a1

b1

c1

d1

H

a2

b2

c2

d2

X

L

GAO

GBO

GCO

GDO

SELECT
L

aD

01
02
NC
C2

C1

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to these
specifications per tha terms of Texas Instruments

~!:.n::::S:'a~fl~~liu~~Ot~~~~!~nor~~f~:~~~e~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1073

TYPES SN54LS398, SN54LS399, SN74LS398, SN74LS399
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
logic diagram
Al-------r----....
WORD
SELECT

A2---I---f-+-4...-..-'

Bl------+-+-r----....

B2'-----+--~-~

C l - - - - - I - - I f - - - 4 ' -.......

Oc
C2-----~~~··~

OD

-f
-f

CLOCK ---------~

r-

C

•

. . . . 'LS398 Only

m

<

(")

schematics of inputs and outputs

m

en

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF
OTHER INPUTS

EQUIVALENT OF
EACH DATA INPUT

--

VCC

-----t~VCC

V C C - -......- Req

30 k!1
NOM
INPUT

-

.......
n.oI

INPUT ......~......-....-

OUTPUT

~~
~~

~~

r.7
Clock: Req
Word select: Req

3-1074

= 17
= 25

kH NOM
kH NOM

, TEXAS-I/}
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS398, SN54LS399, SN74LS398, SN74LS399
QUADRUPLE 2-INPUT MULTIPLEXERS WITH STORAGE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
.... .
I nput voltage
............ .
Operating free-air temperature range: SN54LS'
SN74LS'
Storage temperature range

. .... 7 V
. .... 7 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS'
MIN

NOM

4.5

5

Supply voltage, Vee
High-level output current, IOH

SN74LS'
MAX

MIN

NOM

5.5

4.75

5

MAX

-400

Low·level output current, IOL

5.25

V

-400

/loA

8

mA

4

Width of clock pulse, high or low level, tw
Setup time, tsu

20

20

Data

25

25

Word select

45

45

a
a

a
a
a

Data

Hold time, th

Word select
Operating free-air temperature, T A

-55

125

UNIT

ns
ns
ns
70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

SN54LS'

TEST eONDITIONSt

MIN

TYP+

SN74LS'
MAX

MIN

2

TYP+

MAX

2

V

0.7
Vee = MIN,

II = -18 mA

Vee = MIN,

VIH = 2 V,

-1.5

VIL = VILmax

IOH = -400 /loA

Vee = MIN,

VIH - 2 V,

VIL = VILmax

2.5

TIOL =4 mA

3.4
0.25

2.7
0.4

rlOL = 8 mA

UNIT

0.8

V

-1.5

V

3.4

V

0.25

0.4

0.35

0.5

V

Input current at
II

maximum input voltage

Vee = MAX,

VI = 7 V

0.1

0.1

mA

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

/loA

IlL

Low-level input current

Vee = MAX,

VI =0.4 V

-0.4

-0.4

mA

lOS

Short-circuit output current§

Vee = MAX

-100

mA

ICC

Supply current

Vee = MAX,

13

rnA

-20
See Note 2

-100
7.3

-20

13

7.3

en

w

u

:>
w
C

...I

lI-

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical values are at VCC = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, duration of the short-circuit should not exceed one second.
NOTE 2: With all outputs open and all inputs except clock low, ICC is measured after applying a momentary 4.5 V, followed by ground, to
the clock input.

switching characteristics, Vee
PARAMETER

= 5 V, TA = 25°e
TEST CONDITIONS

tPLH

Propagation delay time, low·to·high-Ievel output eL=15pF,

tpHL

Propagation delaY'time, high-to-Iow-Ievel output See Note 3

RL = 2 kO,

MIN

TYP

MAX

18

27

21

32

UNIT
ns

NOTE 3: See General Information Section for. load circuits and voltage waveforms.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1075

-4
-4
r-

om
<

(")

m

en

3-1076

TYPES SN54S412, SN74S412 (TIM8212)
MULTI-MODE BUFFERED LATCHES
OCTOBER 1975-REVISED DECEMBER 1983

SN54S412 ___ J PACKAGE
SN74S412 .. _ DW.JORNPACKAGE

• PNP Inputs and 3-State Outputs Maximize
I/O and Data Bus Capabilities

(TOPVIEWI

• Data Latch Transparency Permits
Asynchronous or Latched Receiver Modes

S1

VCC
INT
018
008
017
007
016
006
015
005
CLR
S2

M

• Mode and Select Inputs Permit Storing
With Outputs Enabled or Disabled

011
001
012
002
013
003
014
004
STB
GNO

• Strobe-Controlled Flag Flip-Flop Indicates
Status or Interrupt
• Asynchronous Clear Sets All Eight Data
Latches Low and Initializes Status Flag
• High-Level Output Voltage, Typically 4 V,
Drives Most MOS Functions Directly
• Direct Replacement for Intel 3212 or 8212
in Most Applications

SN54S412 ... FK PACKAGE
SN74S412 ... FN PACKAGE
(TOPVIEWI

description

U

5

This high-performance eight-bit parallel expandable
buffer register incorporates package and mode selection inputs and an edge-triggered status flip-flop
designed specifically for implementing bus-organized
input/output ports_ The three-state data outputs can
be connected to a common data bus and controlled
from the appropriate select inputs to receive or
transmit data_ An integral status flip-flop provides
package busy or request interrupt commands_ The
outputs, with a 4-volt typical high-level voltage, are
compatible for driving low-threshold MOS directly_

:2:1u)

z >ulf~

U

£!2
Cl

008
017
007

001
012
002

NC

NC

013
003
014

016
006
015

en

w
U

12 131415161718

>
w
C

'----'---- DO S

(14)
CLR---~----------------~

L_· ____________

Pin numbers shown on logic notation are for

3-1078

ow. J

~

~-~~-~

__________ --1

or N packages .

. TEXAS'"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54S412, SN74S412 (TIM8212)
MULTI-MODE BUFFERED LATCHES
schematics of inputs and outputs
MODE, S1, AND S21NPUTS

vcc _______

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH 01 INPUT

EQUIVALENT OF CLEAR, STROBE,

vcc------------.--------~

- - - - -....---VCC

~---.-

OUTPUT

INPUT
INPUT-.....~~....~

DATA LATCHES FUNCTION TABLE
FUNCTION

CLEAR

M

81

S2

STB

DATA IN

DATA OUT

L

H

H

X

X

X

L

L

L

L

H

L

X

L

X

L

X

L

X

X

Z

X

L

H

X

X

X

Z

H

H

H

L

X

X
X

00
00

Clear
De-select
Hold
Data Bus
Data Bus

H

L

L

H

L

H

H

L

H

X

L

L

H

H

L

H

X

H

H

H

L

L

H

H

L

L

H

L

L

H

H

H

H

II

STATUS FLIP-FLOP FUNCTION TABLE
CLEAR

Sl

S2

STB

-INT

L

H

X

X

H

L

X

L

X

H

H

X

X

t

L

H

L

H

X

L

H "" high level (steady state)
L "" low level (steady state)
X "" irrelevant (any input, including transitions)
Z "" high impedance (off)
t ""transition from low to high level

(IJ

W

U

:;
w

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

C
. 7V
5.5 V
. -55°C to 125°C
. aOe to 7aoe
. -65°C to 15aoe

Supply voltage, Vee (see Note 1)
Input voltage . .
Operating free-air temperature range: SN54S412
SN74S412
Storage temperature range. .

-oJ

lI-

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74S412

SN54S412
MIN
4.5

Supply voltage, VCC
Pulse width, tw
(see Figures 1, 2, and 4)

I

I

NOM MAX
5

5.5

MIN
4.75

STB or S"1 • S2

25

25

Clear low

25

25

Setup time, t. u (see Figure 3)
Hold time, th (see Figures 1 and 3)

15t

15t

20t

20t

-55

Operating free-air temperature, T A

125

0

NOM MAX
5

5.25

UNIT
V
ns
ns

70

ns
DC

t The arrow indicates that the falling edge of the clock pulse is used for reference.

TE~~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1079

TYPES SN54S412, SN74S412 (TIM8212)
MULTI-MODE BUFFERED LATCHES

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONOITIONSt

VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

VOL

10ZH
10ZL

Off·state output current,

001 thru

high·level voltage applied

008

Off-state output current,

001 thru

low-level voltage applied

008

maximum input voltage

IlL

Low·level input current

11= -18mA

Vee = MIN,

VIH=2V,

Vee = MIN,
VIH = 2 V,
VI L = 0.85 V

Low·level output voltage

High·level input current

Vee = MIN;
VIL = 0.8 V,

Input current at
II

TYP~

MAX

10H

l
J

MAX

UNIT
V

0.85

V

-1.2

-1.2

V

4

3.65

V

10L = 15 mA

0.45

0.45

10L - 20 mA

0.5

0.5

Vee = MAX,

Vo = 2.4 V

50

50

/J A

Vee = MAX,

Vo = 0.5 V

-50

-50

/J A

Vee = MAX,

VI = 5.5 V

Vee= MAX,

VI = 5.25 V

Vee= MAX,

VI = 0.4 V

S1
M

TYP~

0.85

4

3.4

= -1 mA

MIN
2

2

High·level output voltage

IIH

SN74S412

SN54S412
MIN

All others
lOS

Short-circuit output current§

Vee = MAX

ICC

Supply current

Vee = MAX,

-20
see Note 2

1

1

20

10

-1

-1

-0.75

-0.75

-0.25

-0.25

-65

-20
82

82

V

mA
/J A

mA

-65

mA

130

rnA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions,

I1
-f
-f

rC

lAIl tYpical values are at Vee = 5 V, T A = 25°e •
. § Not more than one output should be shorted at a time.
NOTE 2: lee is measured with all outputs open, clear input at 4.5 V, and all other inputs grounded.

switching characteristics, Vee
PARAMETER

m

tPLH

<

FROM
STB, 81, or S2

tpHL

nm

tpHL
tpLH

en

CLR

= 5 V,
TO
Any

T A = 25°e
FIGURE

TEST CONDITIONS

1

DO

2

Any DO

eL = 30 pF,
See Note 3

3

TYP

MAX

18

27

15

25

18

27

12

20

10

20
20

Dli

OOi

tPLH

S10rS2

INT

4

eL = 30 pF,

12

tpHL

STB

INT

4

See Note 3

16

25

eL = 30 pF,

21

35

See Note 3

25

40

tpHL

tpZH

81, S2, or M

Any 00

5

81,S2, or M

Any DO

5

tpZL
tPHZ
tPLZ

eL=5pF,

9

20

See Note 3

12

20

tPLH == propagation delay time, low·to·high·level output
tpH L == propagation delay time, high-to-Iow-Ievel output
tPZH == Ol'tput enable time to high level
tpz L == output enable time to low level
tpHZ == output disable time from high level
tPLZ == output disable time from low level
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1080

MIN

.

TEXAS"

INSTRUMENTS

POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

UNIT
ns
ns
ns
ns
ns
ns

TYPES SN54S412, SN74S412 (TIM8212)
MULTI-MODE BUFFERED LATCHES
PARAMETER MEASUREMENT INFORMATION

____,.~V../\------ -

DATA INPUT

~

_______,_.5_v~l.

STB OR 5'-S2

'~.~v

~___-±~

tw

\1.5

__

__ _

2.5V

V

~ t_PH_L_~
...... , - _~-_-_-_--_-_-

_ _ _ _ _ _ _ _ _ _ ___

__ __ __ _ _ __ _ _ --'X. .

DATA OUTPUT

2.5 V

OV

OV
VOH

'_·5_V__________

FIGURE' - STROBE OR SELECT TO DATA OUTPUT

b

---------___. I+CLEAR INPUT

'.

--i ,--------

tw(clr)

t·5~

5V

________________t_PH_L_~

____ _

OV

\,~;-

DATA OUTPUT

2.5 V

---

VOH

FIGURE 2 - CLEAR INPUT TO DATA OUTPUT

.

DATA INPUT

-

X- -

'.5V

k-tsu

--.- J

CI

STB OR 5'-S2

th==+j'-----

----..---/

OV

2.5 V
OV

~tPHL

-

2.5 V
1.'.5V

{,~;--------

----------.....:...--"""~;- --

DATA OUTPUT

- --

~---

- - - - - - -

VOH

.

FIGURE 3 - DATA INPUT TO DATA OUTPUT

- ---

T\~5~--

STROBE

-----~~

2.5 V

~·~tw~(-stb~)---------------

OV

2.5V

~
I.. .1 .... ,
°

I

----------..LI--------tw-(-se~U

tpLH

~

I
\ __________....JT~ ~
~tPHL

INTERRUPT OUTPUT

en
w

U

>
w

V

C

VOH

-I

VOL

I-

l-

FIGURE 4 - STROBE OR SELECT TO INTERRUPT OUTPUT;

\:,~ ---

i'V
_ _- - J

I

-.j
DATA OUTPUT

I

I

f--

tpZH

tPHZ

r--

--':~V

tpZL

I.-

0.5 V

I

t

:

---I

r--

tpLZ

I

r~45V
DATA OUTPUT
(LOW STORED)

C

l,-----------I~----~

(HIGH STORED) - - - - - : - I - - . . . . J

--I

. --..l

2.5V

OV

F

\'.5V

~-------~
FIGURE 5 - SELECT TO DATA OUTPUT

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

CO.5V
+
3-1081

~
~

rC

m

S
(")
m

en

3-1082

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
02536, JANUARY 1980

SN54LS422 , .. J OR W PACKAGE
SN74LS422 •.. D. J OR N PACKAGE

• Will Not Trigger from Clear
• D-C Triggered from Active-Hig~ or ActiveLow Gated Logic Inputs

I

(TOP VIEWI (SEE NOTES 1 THRU 41

Al
A2
81

• Retriggerable for Very Long Output Pulses,
Up to 100% Duty Cycle

VCC
Rext/Cext
NC

~

• Overriding Clear Teminates Output Pulse
'L5422 Has Internal Timing Resistor

ClR

Cext
NC

Q
GND

Rint
Q

description
The 'lS422 and 'lS423 are identical to 'lS122 and
'LS123 except they cannot be triggered via clear.

SN54LS422._.FKPACKAGE
SN74LS422 ... FN PACKAGE
(TOP VIEWI (SEE NOTES 1 THRU 41

These d-c triggered multivibrators feature output-pulsewidth control by three methods. The basic pulse time is
programmed by selection of external resistance and
capacitance values (see typical application data). The
'LS422 contains an internal timing resistor that allows
the circuits to be used with only an external capacitor, if
so desired. Once triggered, the basic pulse width may be
extended by retriggering the gated low-level-active (A)
or high-level-active (8) inputs, or be reduced by use of
the overriding clear. Figure 1 illustrates pulse control by
retriggering and early clear.
The 'lS422 and 'LS423 have enough Schmitt hysteresis
to ensure jitter-free triggering from the B input with transition rates as slow as 0.1 millivolt per nanosecond. The
'LS422 Rint is nominally 10k ohms.
The SN54LS422 and SN54LS423 are characterized for
operation over the full military temperature range of
-55 D C to 125 D C. The SN74lS422 and SN74LS423
are characterized for operation from ODC to 70 D C.

c.J

:>w

g

u

u1<
uet
>..3

(TOP VIEWI (SEE NOTES 1 THRU 41

2

VCC
1 Rext/Cext
lC ext
lQ
2Q
2ClR
28
2A

C

...I

lI-

1 2019

lCext
lQ

ClR

2C ext
2Rext /C ext
GND

en
w

(TOP VIEWI (SEE NOTES 1 THRU 41

SN54LS423 ... J OR W PACKAGE
SN74LS423 ... D. J OR N PACKAGE

lA
lB
lClR
lQ
2Q

II

SN54LS423 ... FK PACKAGE
SN74LS423 ... FN PACKAGE

NC
2Q

,

2C ext

9 1011 1213

);10U«CJ
QlZ Z

N

N

u(!)

la:
N

NOTES:

1. An external timing capacitor may be connected between C ext and Rext/Cext (positive).
2. To use the internal timing resistor of 'LS422, connect Rint to V cc.
3. For improved pulse width accuracy and repeatability, connect an external resistor between
open-circuited.

Rext/C~xt

and VCC with Rint

4. To obtain variable pulse widths, connect an external variable resistance between Rint or Rext/Cext and V CC.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea:eds~~[I~r;lJ·u~~Ot~~~~~nor~~f~:~~~e~:res~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1083

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLEMULTIVIBRATORS
description (continued)
'LS422
FUNCTION TABLE
OUTPUTS

INPUTS
CLEAR

Al

L

X

X
H

82

a

Q

X

X

L

H

X

X

Lt

Ht

X

Lt

Ht

A2 81

X

H

x
x

x X
x x

X

L

Lt

H

L

X

t

H

J1

H

L

X

H

t

H

X

L

t

H

J1
J1

L

H

X

L

H

1

1"1

H

H

H

H

.n.

H

!
!

!
!

H

H

Jl.

H

H

Ii

.n.

H

'LS423
FUNCTION TABLE
INPUTS

Ht

U
U

OUTPUTS

CLEAR

A

B

a

L

x

X

L

H

X

H

x

Lt

Ht

Lt
Jl
Jl

1I
1I

x

x

L

H

L

t

H

j

H

a
Ht

V

U
U
U
U

t These I ines of the functional tables assume that the indicated steady-state conditions at the A and B inputs have
been set up long enough to complete any pulse started before the set up.

RETRIGGER PULSE
ISee NOIOI
8 INPUT

~~

______

~~~

______________- .______

I

I

j.---

OUTPUT 0

'w + ' P L H - - - - - :

J. . _______ ____-.;L _______L
'w

I

I OUTPUT WITHOUT RETRIGGER

OUTPUT PULSE CONTROL USING RETRIGGER PULSE

-I
-I

r-

8INPUT~~______________________________

C

m

<

n
m

en

CLEAR

. . .-_____...,LJ

OUTPUT WITHOUT CLEAR

OUTPUTa~1~-_ _-_-_ _-_-__-_'~:___________________
OUTPUT PULSE CONTROL USING CLEAR INPUT

NOTE:

Retrigger pulses starting before 0.22 C ext (in picofrads)
nanoseconds after the initial trigger pulse will be ignored
and the output pulse will remain unchanged.

FIGURE 1-TYPICAL INPUT/OUTPUT PULSES

3-1084

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
logic symbols
'LS423

'LS422
lA

181

a

lB

lClR

161 ~

lCext
1 Rext/Cext

R int

Ce.t R •• t/Ce.t

logic diagrams
'LS422
(13)
(9)

Al
A2

(11)
-~""-

___
(8)

Bl

Rext/Cext
Rint
Cext
Q

B2 -'-'~---~
(6)

CLR ~~-------~

Q

Rint is nominally 10 k ohms

II

'LS423

CJ)

W
(.)

5>
w

C
Pin numbers shown on logic notation are for D, J or N packages.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

J17kn~N:M

...
~Il'

,
,

t:

..J

lI-

TYPICAL OF ALL OUTPUTS

~~~nNOM

--rl}
TEXAS •
INSTRUMENTS

POST OFFICE BOX 225012 • DAllAS. TEXAS 75265

3-1085

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS

recommended operating conditions
SN54LS'

SN74LS'

NOM

MAX

MIN

NOM

MAX

4.5

5

. 5.5

4.75

5

5.25

V

-400

Il A

8

rnA

260

kfl

Supply voltage, VCC

-400

High-level output current, IOH

4

Low-level output current, IOL

40

40

Pulse width, tw

5

External timing resistance, R ext
External capacitance, C ext

180

ns

5

No restriction

No restriction
50

Wiring capacitance at Rext/Cext terminal
-55

Operating free-air temperature, T A

UNIT

MIN

50

125

70

0

pF
DC

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
V,H
VIL
VIK

High-level input voltage
Low-level input voltage
Input clamp voltage

VOH

High-level output voltage

VOL
I,

II
~
~

r

C

m

<

(")

I'H
IlL
lOS
ICC

SN54LS'
SN74LS'
MIN TYP:j: MAX MIN TYP:j: MAX
2
2
0.7
0.8
-1.5
-1.5

TEST CONDITIONSt

Low-level output voltage
Input current at
maximum input voltage
High-level input current
Low-level input current
Short-circuit output current.
Supply current
(quiescent or triggered)

VCC = MIN,
VCC - MIN,
V,L = VILmax
VCC - MIN,
VIL = VILmax

'I = -18 rnA
VIH - 2 V,
IOH = -4001lA
VIH - 2 V,

VCC = MAX,

VI

VCC = MAX,
VCC - MAX,
VCC - MAX

VI = 2.7 V
VI - 0.4 V

VCC = MAX,

See Note 6

2.5

LI OL-4mA

3.5

2.7

-20
6
12

V

3.5

V

0.1

0.1

rnA

20
-0.4
-100
11
20

20
-0.4
-100
11
20

Il A
rnA
rnA

0.4

7 V

I'LS422
I'LS423

V
V
V

0.4
0.5

0.25

0.25
0.35

IIOL - 8 rnA
~

UNIT

-20
6
12

rnA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at VCC = 5 V, T A = 25°C.
+Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
NOTES: 5. To measure VOH at a, VOL at D, or lOS at a, ground Rext/Cext, apply 2 V to B and clear, and pulse A from 2 V to 0 V.
6. With all outputs open and 4.5 V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5 V, is
applied to clock.

switching characteristics, Vee =: 5 V, T A=: 25°e, see note 7

m

en

PARAMETER~

tpLH
tPHL

FROM
(INPUT)
A
B
A
B

TO
(OUTPUT)

a
a

A or B

a

twa

A or B

a,

Cext = 0,
CL;15pF,

R ext = 5 kfl,
RL = 2 kfl

a
Cext - 1000 pF,
CL=15pF,

=
=

~ tpLH
propagation delay time, low-to-high-Ievel output
tPHL
propagation delay time, high-to-Iow-Ievel output
twa = width of pulse at output a
NOTE 7: See General Information Section for load circuits and voltage waveforms.

~il\

3-1086

MIN

a

tPHL
tPLH
twa (min)

Clear

TEST CONDITIONS

TEXAS ~
INSTRUMENTS
POST OF F ICE BOX 225012 • DALLAS, TEXAS 75265

Rext - 10 kfl,
RL = 2 kn

4

TYP

MAX

23
23
32
34
20
28
116

33
44
45
56
27
45
200

4.5

5

UNIT
ns
ns
ns
ns
Il S

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
TYPICAL A~PLlCATION DATA FOR 'LS422, 'LS423t
The basic output pulse width is essentially determined
by the values of external capacitance and timing
resistance. For pulse widths when Cext ~ 1000 pF, use
Figure 3, or may be defined as:
tw:::: K·RT·Cext
When Cext ~ 1 j.lF, the output pulse width is defined
as:
tw :::: O.33·RT·C ext
Where
K is multiplier factor, see Figure 4
RT is in K ohms (internal or external
timing resistance)
Cext is in pF
tw is in nanoseconds

To C ext
terminal

To Rext/Cext
terminal

TIMING COMPONENT CONNECTIONS

For maximum noise immunity, system ground should be
applied to the Cext node, even though the Cext node is
already tied to the ground lead internally. Due to the
timing scheme used by the 'LS422 and 'LS423, a
switching diode is not required to prevent reverse biasing when using electrolytic capacitors.

FIGURE 2

II

, LS422, 'LS423
TYPICAL OUTPUT PULSE WIDTH
vs

EXTERNAL TIMING CAPACITANCE

en

w
U

100000
RT = 260k ohms
RT - 160k ohms,

I I
c

~

10000

"CI

~
:l:

~

~

a

a

f--

1000

-'

-

-

100

r'"""

C

./

lI-

-'

. / -'~

K

}

>
w

1/

..J

.... k

I

~

V . . . . . V I/~

./

RT I~

~

~ ~>.;

~O~ ~h~! I.

t' RT = 40k ohms
RT= 20k ohms
RT = 10k ohms
RT= 5k ohms

IIII

10

1

10

100

1000

Cext-External Timing Capacitance-pF

t This value of resistance exceeds the maximum recommended for use over
the full temperature range of the SN54LS circuits.

FIGURE 3

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1087

TYPES SN54LS422, SN54LS423, SN74LS422, SN74LS423
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS

TYPICAL APPLICATION DATA FOR 'LS422, 'LS423 t
MUTIPLIER FACTOR
vs
EXTERNAL CAPACITOR

DISTRIBUTION OF UNIT
vs
OUTPUT PULSE WIDTH
I

:I

I

I

I

I

I

I

CI.1
tJ

(K IS INDEPENDENT OF R)

Ql

I:
ctI

:;

0.1

:I



o

E
g-

0.01

u

...

\
\

'uctI
tJ
c::

CI.1
:I

g

u:

\

~
)(

w
I

~

0.001

-

...

'"

)(

cJ
0.0001

I--MEDIAN""7 20%1

J

>

I

I

LS423)

r---.....

./

-5
~

~
~

s:

~

rC

...
e

Q.

3%
2%

:I

m

:I

~

0

m

0

.:

("')

en

1%

c::

0%

:~

-1%

eex~ = 60 pF I
Rext = 10 K ohms TA = 25°e

,

'" "

-2% I---

"",,-

g-3%

8%
6%

0

tw(out) ~ 370 ns
at Vee = 5 V

J

2%

0

0%

''-:;

b-..

I

5.25
4.75
5
Vee - Supply Voltage - V

.~
ctI

'"

5.5

>

.

4%

.:
c::

J

-v •

'425

positive logic: V

en
w

=A

u
5=
w

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

C

Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage ..................................... _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54' ......... '" ............................... - 55°C to 125°C
0
SN74' ............................................... O°C to 70
0
Storage temperature range ......................................................... - 65°C to 150

-I

lI-

e
e

NOTE1: Voltage values are with respect to network ground terminal.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~n~:~:S~~fl~ar~lIU~~o:e~~~~~nof~~f:~~~~e~~::'

-1.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1089

TYPES SN54425, SN54426, SN74425, SN74426
QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS

schematics (each gate)
r-~~~~------~~---+--------~------~--VCC

OUTPUT

CONTROL
INPUT
G

V

'-------+--.........--+---i~_+---*---+---..___i~_..--GND

DATA

INPUT------------~

A

'425 CIRCUITS

r--~~-+--~~---.----.------.-----~~--VCC

II
~
~

CONTROL
INPUT

OUTPUT
V

G

rC

m

=5

(")

m
en

3-1090

DATA

INPUT

'-------+---+----*---+--..---.--~-+--~~-----4----GND
---------------~

A

'426 CI RCUITS
Resistor values shown are nominal.

TEXAS

"t}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54425, SN54426, SN74425, SN74426
QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54425, SN54426

SN74425, SN74426

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

Vee

Supply voltage

VIH

High-level inpl,lt voltage

VIL

Low-level input voltage

0.8

0.8

IOH

High-level output current

-2

- 5.2

mA

IOL
TA

Low-level output current
Operating free-air temperature

16

mA
°e

2

2

V

16
- 55

125

V

0

70

V

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST eONDITIONS t

PARAMETER
VIK
VOH

Vee; MIN,

11;-12mA

Vee; MIN,

VIH; 2 V,

VIL; 0.8 V
Vee; MIN,

VOL

SN74425, SN74426
MIN

TYP*

MAX

VIL=0.8V

MAX
- 1.5

3.3
2.4

I IOH; - 5.2 V
VIH; 2 V,
VIH; 2 V,

TYP*

-1.5
2.4

IIOH--2V
VIL; 0.8 V,

UNIT
V
V

3.1

V

0.4

0.4

I Va; 2.4 V

40

40

I Va = 0.4 V

-40

-40

1

1

mA

IOL;16mA
Vee; MAX,

10Z

SN54425, SN54426
MIN

IlA

II

Vee = MAX,

VI; 5.5 V

IIH

Vee= MAX,

VI = 2.4 V

40

40

IlL

Vee = MAX,

VI = 0.4 V

-1.6

-1.6

IlA
mA

IOS§

Vee= MAX

-70

mA

lee

-30

-70

-28

Vee - MAX,

I

'425

32

54

32

54

(see Note 2)

I

'426

36

62

36

62

mA

t For condition shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t AII.typical values are at V CC ; 5 V, T A = 25° C.

en
w

§ Not more than one output should be shorted at a time.
NOTE 2: Data inputs = 0 V; output control; 4.5 V for '425 and 0 V for '426.

switching characteristics, Vee
PARAMETER

= 5 V, TA = 25°e

(see note 3)

U

SN54174425

TEST CONDITIONS

TYP

MAX

tPLH

8

tpHL

12

RL = 400

tPZH

n,

MIN

SN54174426

eL = 50 pF

tpZL
tpHZ
tPLZ

RL = 400

n,

CL; 5 pF

MIN

UNIT

MAX

13

8

13

ns

C

18

12

18

ns

..J

11

17

11

18

ns

16

25

16

25

ns

5

8

10

16

ns

7

12

12

18

ns

JJ-

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

-II}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

>
w

TYP

3-1091

II
-I
-I

rC

m

<

o
en

m

3-1092

TYPES SN54S436, SN54S437, SN74S436, SN74S437
LINE DRIVER/MEMORY DRIVER CIRCUITS
02630, JANUARY 1981 -REVISED APRIL 1985

MOSMEMORYINTERFACE
• Can Drive High-Impedance Loads
•

SN54S436, SN54S437 , .. J OR W PACKAGE
SN74S436. SN74S437 ... D. J OR N PACKAGE

Interchangeable with National DS16149
DS16179 Drivers

(TOPVIEWI

VCC

<31
1A
1Y
2A
2Y
3A
3Y

• High-Speed Switching
• Minimum Input Current Required
• Damping Output Resistor Reduces
Transients
description
The SN54S436. SN54S437, SN74S436 and
SN74S437 are monolithic integrated TTL-to-MOS
drivers and interface circuits. The p-n-p input transistors use minimum current allowing increased fan-out
to these drivers. Schottky-clamped transistor logic
permits high-speed operation, minimum propagation
time.

<32
6A
6Y
5A
5Y
4A
4Y

SN54S436. SN54S437 ... FK PACKAGE
SN74S436. SN74S437 •.. FN PACKAGE
(TOPVIEWI

U

~IG ~ ~I~

A small series damping resistor has been included in the
design of the 'S436 to eliminate undesired output
transient overshoot. Either enable, G, when high, sets
the outputs to the high level for MOS RAM refresh
applications.

NC
5A
5Y

II

FUNCTION TABLE
ENABLE INPUTS
G1

G2

L

L

INPUT

OUTPUT

L

H

en

NC - No internal connection

L

L

H

L

X

H

X

H

H

X

X

H

w

u

:>w

H = high level. L = low level. X = Irrelevant

logic symbol

C

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

...I

TYPICAL OF ALL OUTPUTS

lI-

----------~-VCC

Vee
1A
2A

2Y

3A

3Y

4A

4Y

~---'~~~OUTPUT

INPUT

10Q NOM*

5A
6A
Pin numbers shown on logic notation are for
D, J or N packages,

'On SN54S436 and SN74S436 only

PRODUCTION DATA

-I!}

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instru,ments

~~~nnd:;:s~~il~ar~liu~~Ot~~~f~~nor~~f~~~~':iIe~~:s~

TEXAS
INSTRUMENTS
POST

OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1093

TYPES SN54S436, SN54S437, SN74S436, SN74S437
LINE DRIVER/MEMORY DRIVER CIRCUITS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc (see Note 1) ................................................................ 7 V
Input voltage range .......... , ....................................................... - 1.5 V to 7 V
Continuous total dissipation at (or below) 25° C free·air temperature (see Note 2)
J package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1375 mW
N package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1150 mW
W package ............................................ 1000 mW
Operating free·air temperature range: SN54S436, SN54S437................................. - 55° C to 125° C
SN74S436, SN74S437..................................... O°C to 70°C
Storage temperature range ............................................................ - 65° C to 150° C
NOTES 1: All voltage values are with respect to network ground terminal.
2: For operation above 25° C free-air temperature, derate as follows: J package, 11.0 mW/ C, N p~ckage, 9.2 mW/C, W package,
S.O mW/oC.

recommended operating conditions

Vee

Supply voltage

VIH

High-level input voltage

VIL
TA

Low-level input voltage

MIN

SN54S'
NOM

MAX

MIN

4.5

5

5.5

4.75

2

SN74S'
NOM
5

-55

125

UNIT

5.25

V

0.8

V

70

°e

2

V

0.8

Operating free-air temperature

MAX

0

electrici:tI characteristics over recommended operating free-air temperature range (unless otherwise noted)

II

PARAMETER
VIK
VOH

~
~

Vee = MIN,

11.= -18mA

Vee = MIN,

IOH = - 1OI1A

VOL

3.5

4.3

I 'S436

2.4

3.5

2.6

3.5

I 'S437

2.5

3.5

2.7

3.5

IOL= 1O I1A

I 'S436

Vee = MIN,

I 'S437

0.4

0.25

1.1

0.6

1

0.4

0.5

0.4

0.5

See Note 3

II

Vee = MAX,

VIH=5.5V

IIH

Vee = MAX,

VIH=2.7V

0.1

50

IlL

Vee = MAX,

VIL = 0.5V

-100

lec

Vee = MAX, G inputs at OV,
All other inputs at 4.5 V
All inputs at 0 V

Vee = MAX,

-100

150

200

-250

-400

0.35
V

150

200

mA

-400

mA

1

mA

0.1

50

I1A

-250

- 100

-250

I1A

33

60

33

60

14

20

14

20

1

TEXAS

V

-250

-100

t All typical values are at Vee = 5 V, TA = 25°e.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 3: When measuring output current on the SN54S437/SN74S437, a 10 Q resistor should be placed in series with each output.

3-1094

UNIT

V

0.6

Vo = OV,

Vee - MIN,
See Note 3

-1.2

0.25

Vee = MAX,

m

VJ

4.3

VI = 2V

IOS§

("')

3.4

Vo = 4.5V,

IOL'

-0.75

IOH = -1 mA

IOL = 20mA

<

SN74LS165A
MIN TYP*
MAX

Vee = MIN,
Vee = MIN,

r
C
m

SN54LS165A
MIN TYP*
MAX
-0.75 -1.2

TEST CONDITIONS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

mA

TYPES SN54S436, SN54S437, SN74S436, SN74S437
LINE DRIVER/MEMORY DRIVER CIRCUITS
switching character1stics, Vee

= 5 V, T A = 25°e, see note 3

PARAMETER

TEST CONDITIONS

tAHYL

Delay time from A high to Y starting low

tALYH

Delay time from A low to Y starting high

TYP

MAX

CL = 50 pF

MIN

4.5

7

CL-500pF

12

16

CL = 50 pF

See Figure 1

CL = 500 pF

tGHYH

Delay time from G high to Y starting high

tGLYL

Delay time from G low to Y starting low

RL = 2 kn to Gnd,

CL=50pF,

See Figure 2

tTHL

Transition time, high-to-Iow-Ievel output

tTLH

Transition time, low-to-high-Ievel output

NOTE 3:

See Figure 1

RL=2kntoVcC,

CL=50pF,

See Figure 3
CL = 50 pF

See Figure 1

CL = 500 pF
CL = 50 pF

See Figure 1

CL = 500 pF

UNIT
ns

5

8

11

16

10

18

ns

11

18

ns

5

8

15

30

6

9

15

30

ns

ns

ns

When measuring switching times on the SN54S437/SN74S437, a 10 Q resistor should be placed in series with each output.

PARAMETER MEASUREMENT INFORMATION
OUTPUT
UNDER TEST
'S437
'S436

INPUT
A

10 Q (SEE NOTE CI

~....

I

I

~CL
I

t-t-tTlH
: 3V

OUTPUT
Y

(SEE NOTE B)

FIGURE

VOLTAGE WAVEFORMS

1

OUTPUT
UNDER TEST
10Q(SEENOTEC)
'S437 --VV\J--,

G

:>w

_---...,...--VOH

~
Y ____...J~-=!rO~...v- - - -

OUTPUT

~

u

_ :_________ 0 V

tGHYH-!-J

C

:

VOL

...J

Other G input is low

LOAD CI RCUIT

lI-

VOLTAGE WAVEFORMS
FIGURE

2

Vee
OUTPUT
UNDER TEST
'S437

en
w

'N'UT~"

----o--<)---<:~--OUTPUT

CL
(SEE NOTE B)

VOH'

I

LOAD CIRCUIT

'S436

----oV

tALYH~

OUTPUT

INPUT

(SEE NOTE C)
15

-

G

n

-. 1.5V

-

-

-

-

1

OV

I

I
---....:..1........ -

'S436

r-=

1

OUTPUT
Y

CL
(SE!: NOTE B)

1

3V

X_lT ____

VOH

0.5 V

1-

tGLyL...J-l

...- - - - - VOL

Other G input is low
LOAD CIRCUIT

VOLTAGE WAVEFORMS
FIGURE

3

NOTES: A. I nput pulses are supplied by a generator having the following characteristics: PRR< 1 MHz, Zout '" 50 n, tr < 5 ns.

B. CL includes probe and jig capacitance.
C. This 15-n resistor is required for testing the SN54S437/SN74S437. but it is internal to the SN54S436/SN74S436 and therefore an
external resistor is not used for testing these devices.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1095

II
-I
-I

rC

m

S
(")

m

(J)

3-1096

TYPES SN54LS440 THRU SN54LS444, SN54LS448
SN74LS440 THRU SN74LS444, SN74LS448
QUADRUPLE TRIDIRECTIONAL BUS TRANSCEIVERS
02425, AUGUST 1979

•

3-Way Asynchronous Communication

•

On-Chip Bus Selection Decoding

•

Input Hysteresis Improves Noise Margin

•

Choice of Open-Collector or
3-State Outputs

SN54LS' ... J PACKAGE.
SN74LS' ... OW, J OR N PACKAGE
(TOP VIEW)

C2
B2
B3

description
These bus transceivers are designed for asynchronous
three-way communication between four-line data
buses, They give the designer a choice of selecting

C3
C4
B4
GND

inverting, noninverting, or a combination of inverting
and noninverting data paths with either 3-state or
open-collector outputs.

X

X

X

X

X

H

H

X

X

X

None

None

X

X

X

H

H

H

X

L

X

H

H

X

L
L

H

H

X

H

None
None
None

None
None
None

X

H

H

H

X

None

None

L
L
L
L

L
L

L
L

X

L

H

L

X

L
L

L

L

L A - a, A - C A - a, A- C A .. a, A - C
L a .. c, a .. A B .. c, B" A a .. c, B - A
X C· A, C· a C - A,C - a C . A,C - B
A .. a
H
A·a
A·a
a .. c
L
a-c
B-C
C .. A
X
e-A
e·A
A .. C
L
A·C
A-C
B .. A
B.A
H
B-A
c .. a
X
c-a
e·a

L

L

H

H

L
L
X

L

H

L

L

H

L
L

L
L

L

X

H

H

L

X

L

H

L

H

L

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea~:S~~il~ai~Jiu~~Ot~~~~~~nor~~f:~~~n~e~::s~

A4
Sl
SO

GB
GA
A1
A2
A3
'<1"
ClJ

DEVICE

TRANSFERS BETWEEN BUSES
'LS444
'LS440
'LS441
'LS448
'LS442
'LS443
None
None
None

X

X

14
13
12
11

0 0 .... '<1"

z(J)(J)«

en

(!)

H

H

8
9
10

u

FUNCTION TABLE

Sl SO GA GB GC

5
6
7

GC
GB
GA
A1
A2
A3

U cnl~ ~Ig

The
SN54LS440
through
SN54LS444
and
SN54 LS448 are characterized for operation over the
full military temperature range of _55°C to 125°C.
The
SN74 LS440
through
SN74 LS444
and
SN74 LS448 are characterized for operation from
O°C to 70°C.

Cs

4

19
18
17
16
15

SN54LS' ... FK PACKAGE
SN74LS' ... FN PACKAGE
(TOP VIEW)

The SO and Sl inputs select the bus from which data
are to be transferred. The G inputs enable the bus or
buses to wh ich data are to be transferred. The port
for any bus selected for input and any other bus not
enabled for output will be at high impedance including
those of the open-collector devices.

INPUTS

~CC

CS
B1
C1

'LS440
'LS441
'LS442
'Ls443
'LS444
'LS448

None
None
None

OUTPUT
Open-Collector
Open-Collector
\
3-State
3-State
3-State
Open-Collector

LOGIC
True
Inverting
True
Inverting
True/lnverting
True/lnverting

w
U

>
w
o

...J

lI-

None
None

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1097

TYPES SN54LS440 THRU SN54LS444, SN54LS448,
SN74LS440 THRU SN74LS444, SN74LS448
QUADRUPLE TRIDIRECTIONAL BUS TRANSCEIVERS
logic symbols
'LS440

lEI
-f
-f

'LS442

'LS443
so (111
51 (12)

O}

1

°3

G-

O}

so (11)
51 (12 )

1

'LS444
SO 1111
0
G-

3

S1

1121

r0-

C
m

S
o

m
en

A4 (13)

84
C4

Pin numbers shown on logic notation are for DW, J or N packages.

3-1098

TEXAS

~

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

191
181

O}

1

'LS448
0
G-

3

TYPES SN54LS440 THRU SN54LS444, SN54LS448,
SN74LS440 THRU SN74LS444, SN74LS448
QUADRUPLE TRIDIRECTIONAL BUS TRANSCEIVERS
logic diagram (composite showing one of four transceivers from each type, positive logic)
Cs

r------------------.

GA--T-----------------------~~
GB--T-----------------------~

GC--+---------------------~
COMMON
CONTROLS

SO
S1

-,
I

I
I

A

I
I
OF FOUR
I ONE
'LS440/'LS442

B

I

I

TRANSCEIVERS

I

I

C

I
I
.J

-,
A

ONE OF FOUR
'LS4411'LS443
TRANSCEIVERS

B

C

en

w
U

>
w

A

C

-J

ONE OF FOUR
'LS4441'LS44B
TRANSCEIVERS

B

lI-

C

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
.............................................. . . . . .
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ' . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-state output voltage
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free-air temperature range: SN54LS'
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. _55°C to 125°C
SN74LS'
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . ; . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65°C to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1099

TYPES SN54LS440, SN54LS441, SN54LS448,
SN74LS440, SN74LS441, SN74LS448
QUAD TRIDIRECTIONAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN74LS440
SN74LS441
SN74LS448

SN54LS440
SN54LS441
SN54LS448
MIN NOM
4.5

Supply voltage, Vee (see Note 1)

MIN

NOM

MAX

5.5

4.75

5

5.25

5

High-level output voltage, VOH
Lo~-Ievel

output current, IOL

V

5.5

5.5

V

12

24

mA

70

e

125

-55

Operating free-air temperature, T A

UNIT

MAX

0

NOTE1: Voltage values are wIth respect to. the network ground termInal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Vee

~

MIN,

Hysteresis (VT+ - VT _)1 A,B,e input

Vee

~

MIN

High-level output current

Low-level output voltage

0.1

Vee - MIN,

VOH - 5.5 V,

VIH~2V,

VIL;VILmax

r-

TYP+ MAX

V

2
0.6

V

-1.5

-1.5

V

0.2

0.4

0.25

UNIT

0.5

0.4

V

0.4
100

IlA

0.25

0.4

V

0.35

0.5

V

100

IOL;12mA

VIL; VILmax

-I
-I

MIN

VIH~2V,

IOL ~ 24 mA

II

I A,B,e input
maximum input voltage I All others

Vee

IIH

High-level input current

Vee; MAX,

VI; 2.7 V

IlL

Low-level input current

Vee ~ MAX,

VI; 0.4 V

lee

Supply current

Vee; MAX,

Outputs open

Input current at

II

TYP+ MAX

11~-18mA

Vee - MIN,
VOL

MIN
2

VIH

IOH

SN74LS'

SN54LS'

TEST CONDITIONSt

PARAMETER

1Outputs low
1Outputs disabled

~

MAX

VI-5.5V
VI

~

7V

0.1

0.1

0.1

0.1

20

20

uA

-0.4

-0.4

mA

62

90

62

90

64

95

64

95

mA

mA

t For condItIons shown as MIN or MAX, use the approproate value specIfIed under recommended operatong conditIons.
t All typical values areat Vee = 5 V, TA ~ 25°e.

switching characteristics at Vee

C

m

PARAMETER

S
(")
m

en

Propagation delay
tpLH

time,low-to-high
level output

Propagation delay
tpHL

time, high-to-Iow
level output

tPLH

FROM

TO

(INPUT)

(OUTPUT)

A

TYP

MAX

TYP

MAX

35

21

30

21

30

24

35

21

30

21

30

24

35

21

30

21

30

e

24

35

21

30

24

35

e

A

24

35

21

30

21

30

TYP

MAX

B

24

A

e

B

A

B

MIN

MIN

C

B

24

35

21

30

24

35

A

B

20

30

9

15

9

15

A

e

20

30

9

15

9

15

B

A

20

30

9

15

9

15

B

e

20

30

9

15

20

30

9

15

9

15

A

20

30

e

B

20

30

9

15

20

30

Propagation delay

any G

A,B,e

29

45

23

35

25

40

time,low-to-high

SO, Sl

A,B,e

33

50

27

40

26

40

es

A,B,e

31

45

26

40

25

40

Propagation delay

any G

A,B,e

27

40

20

30

22

35

time, high-to-Iow

SO, Sl

A,B,C

32

50

26

40

27

40

es

A,B,e

28

45

21

30

22

35

level output

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-1100

'LS448

'LS441

'LS440
MIN

e

level output

tPHL

= 5 V, BL = 667 Q, eL = 45 pF, TA = 25°e, see note 2

-1.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

ns

ns

ns

ns

TYPES SN54LS442, SN54LS443, SN54LS444,
SN74LS44~SN74LS443rSN74LS444

QUAD TRIDIRECTIONAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
recommended operating conditions

Supply voltage, Vee (see Note 1)

SN54LS442

SN74LS442

SN54LS443

SN74LS443

SN54LS444

SN74LS444

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-15

mA

24

mA

70

°e

-12

High-level output current, 10H

12

Low-level output current, 10L
-55

Operating free-air temperature, T A

UNIT

125

0

NOTE 1: Voltage values are with respect to the network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

TEST eONDITIONSt

High-level output voltage

Low-level output voltage

10H = -3 mA
10H = MAX

Vee - MIN,

II

MAX

IOL=12mA

V
0.6

V

-1.5

-1.5

V

0.1

0.4

0.2

0.4

2.4

3.4

2.4

3.4

V

2

2
0.25

0.4

0.25

0.4

0.35

0.5

V

Vee = MAX,

Off-state 'output current, low-level

es at 2 V

voltage appl ied
IA,B,e

maximum input voltage 10thers

UNIT

0.5

VIH = 2 V,

voltage applied

Input current at

TYP:j:

V

VIL = VILmax

Off-state output current, high-level

10ZL

MIN

VIH=2V,

VIL = VILmax
10ZH

MAX

2

11=-18mA

Vee = MIN,
Vee = MIN,

VOL

TYP:j:

2

Hysteresis (VT+ - VT _)IA,B,e input Vee = MIN

VOH

SN74LS'

SN54LS'
MIN

Vee = MAX

10L = 24 mA
Vo = 2.7 V

20

20

VO=O.4V

-400

-400

VI = 5.5 V

0.1

0.1

VI = 7 V

0.1

0.1

pA

en
w

IIH

High-level input current

Vee= MAX,

VI = 2.7 V

20

20

pA

IlL

Low-level input current

Vee = MAX,

VI = 0.4 V

-0.4

-0.4

mA

lOS

Short circuit output current

Vee = MAX

-225

mA

lee

I Outputs low
Supply current I
Outputs at Hi-Z

-225

-40

Vee= MAX,

Outputs open

-40

62

90

62

90

64

95

64

95

U

mA

mA

>

'W

C

lI-

t For conditions shown as M IN Or MAX, use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at Vee ~ 5 V, T A ~ 25°e.
~ Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

...J

3-1101

TYPES SN54LS442, SN54LS443, SN54LS444,
SN74LS442 THRU SN74LS443, SN74LS444
QUAD TRIDIRECTIONAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

= 5 V, TA = 25°e, see note 2

switching characteristics, Vee
FROM

PARAMETER

TO

A

tpLH

tPHL

'LS443

TYP

MAX

B

10

'LS444

TYP

MAX

14

9

14

MIN

MIN

TYP

MAX
14

Propagation

A

C

10

14

9

14

delay time,

B

A

10

14

14

9

14

low-to-high

B

C

10

14

14

10

14

level output

C

A

10

14

14

9

14

C

B

10

14

9
9
9
9

14

10

14
13

14

A

B

13

20

7

13

7

Propagation

A

C

13

20

7

13

7

13

delay time,

B

A

13

20

7

13

7

13

high-to-Iow

B

C

CL=45pF,

13

20

7

13

13

20

level output

C

A

RL =667 n

13

20

7

13

7

13

C

B

13

20

7

13

13

20

time to low
level
Output enable

tPZH

'LS442
MIN

9
9

Output enable
tpZL

TEST

(INPUT) (OUTPUT) CONDITIONS

time to high

UNIT

ns

ns

Any G

A,B,C

22

33

22

33

22

33

SO or 51

A,B,C

28

42

28

42

28

42

CS

A,B,C

23

36

24

36

23

36

A,B,C

21

32

20

32

24

32

ns

14

25

15

25

14

25

ns

14

25

15

25

14

25

ns

ns

G,S

CS

level
Output disable
time from low

tPLZ

level

II
~
~

r-

Output disable
tpHZ

time from high
level

G, S,

CS
. G,S,

CS

A,B,C
CL=5pF,
RL = 667

n

A,B,C

NOTE 2: See General Information Section for load circuits and voltage waveforms.

schematics of inputs and outputs

C

EQUIVALENT OF EACH INPUT

TYPICAL OF 3-STATE OUTPUTS

TYPICAL OF OPEN-COLLECTOR OUTPUTS

m
~

(")

VCC ------4~ - - - - -

m
en

Req

_ _-+_VCC
50n NOM

_ _ ~OUTPUT

INPUT

OUTPUT

= 9 kn NOM
= 5 kn NOM

Req: GA, GB, GC

All others

3-1102

TEXAS

"!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS445, SN74LS445
BCD-TO-DECIMAL DECODERSIDRIVERS
02427, NOVEMBER 1977-REVISED DECEMBER 1983

FOR USE AS LAMP, RELAY, OR MOS DRIVERS
•

SN54LS445 ... J PACKAGE
SN74LS445 ... 0, J OR N PACKAGE

Low-Voltage Version of SN54LS145/
SN74LS145

•

Full Decoding of Input Logic

•

SN74LS445 Has aD-rnA Sink-Current
Capability

•

All Outputs Are Off for Invalid BCD
Input Conditions

•

Low Power Dissipation ... 35 mW
Typical

(TOP VIEW)

VCC
A
8
C
0
9

logic
NO.

0

C

B

OUTPUTS
A

0

1

2

3

4

5

(TOP VIEW)
6

7

8

9

0

L

L

L

L

L

H

H

H

H

H

H

H

H

H

1

L

L

L

H

H

L

H

H

H

H

H

H

H

H

2

L

L

H

L

H

H

L

H

H

H

H

H

H

H

3

L

L

H

H

H

H

H

L

H

H

H

H

H

H

4

L

H

L

L

H

H

H

H

L

H

H

H

H

H

5

L

H

L

H

H

H

H

H

H

L

H

H

H

H

6

L

H

H

L

H

H

H

H

H

H

L

H

H

H

7

L

H

H

H

H

H

H

H

H

H

H

L

H

H

8
9

H

L

L

L

H

H

H

H

H

H

H

H

L

H

H

L

L

H

H

H

H

H

H

H

H

H

H

L

H

L

H

L

H

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

H

H

H

H

L

L

H

H

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

H

H

H

H

'L

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

Cl

::i
<:

>
~

7

SN54LS445 ... FK PACKAGE
SN74LS445 ... FN PACKAGE

FUNCTION TABLE
INPUTS

8

6
GND

en
w

NC - No internal connection

CJ

logic diagram

>
w
C

H = high level (off), L = low level (on)

..J

tt-

descr iption
These monol ithic BCD-to-decimal decoder/drivers
consist of eight inverters and ten four-input NAND
gates. The inverters are connected in pairs to make
BCD input data available for decoding by the NAND
gates. Full decoding of valid BCD ihput logic ensures
that all outputs remain off for all invalid binary input
conditions. These decoders feature high-performance,
n-p-n output transistors designed for use as indicator/
relay drivers or as open-collector logic-circuit drivers.
Each of the output transistors will sink up to 80 milli, amperes of current. Each input is one Series 54LS/
74LS standard load. I nputs and outputs are entirely'
compatible for use with TTL logic circuits, and the
outputs are compatible for interfacing with most
MOS integrated circuits. Power dissipation is typically
35 milliwatts.

OUTPUT 4
OUTPUT 5
OUTPUT 6
OUTPUT 7

Pin numbers shown on logic notation are for D. J or N packages.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments
standard warranty. Production rrocessin g does
not necessarily include testing 0 all parameters.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1103

TYPES SN54LS445, SN74LS445
BCD-TO-DECIMAL DECODERSIDRIVERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
7V
7V
-55°e to 125°e
oOe to 700e
0
-65°e to 150 e

Supply voltage, Vee (see Note 1)
..... .
Input voltage . . . . . . . . . . . . . .
Operating free·air temperature range: SN54LS445
SN74LS445
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS445

SN54LS445
MIN
Supply voltage, Vee

NOM

MAX

MIN

5

5.5

4.75

4.5

Off·state output voltage, VO(offl

NOM
5

MAX
5.25

7

Operating free-air temperature, T A

-55

125

0

UNIT
V

7

V

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

11
-4
-4
rC

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

10(off)

Off-state output current

VO(on)

On-state output voltage

SN54LS445

TEST CONDITIONSt

PARAMETER

MIN

TYP+

SN74LS445

MAX

2

Vee
Vee

II

VIL = VIL max,

VOH = 7 V

Vee

IIOL

VIH

IIOL

II

Input current at maximum input voltage

IIH

High-level input current

= MIN,
= 2 V,
VIL = VIL max
Vee = MAX,
Vee = MAX,

IlL

Low-level input current

Vee = MAX,

VI

lee

Supply current

Vee = MAX,

See Note 2

= 12 mA
= 24 mA

V

-1.5

V

250

250

/J A

0_25

0.4

POL = 80 mA

0.25

0.4

0.35

0_5

2.3

3

V

=7 V

0.1

0.1

VI = 2.7V

20

20

/J A

= 0.4 V

-0.4

-0.4

mA

13

mA

VI

7

7

13

switching characteristics, Vee

mA

= 5 V, T A = 25°e
TEST CONDITIONS

PARAMETER
tPLH

V

-1.5

(")

en

UNIT

0_8

t For conditions shown as MI N or MAX. use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
NOTE 2: lee is measured with all inputs grounded and outputs open.

m

MAX

0_7

m

<

TYP+

2

= -18 mA
VIH = 2 V,

= MIN,
= MIN,

MIN

Propagation delay time, low-to-high-Ievel output

j.--:tP"':H:":'L~-'-:P:-r-o-pa"";g-a""'ti-on-d-el-ay-ti-m-e-,h-i-gh,....--tO--,....IO;;..w--I,....e-ve...,.l-o-u-tP-u-t~

eL

= 45 pF,

RL=665n,

See Note 3

MIN

MAX
50
50

NOTE 3: See General Information Section for load circuits and voltage waveforms.

q

schematic of inputs and outputs

logic symbol

EQUIVALENT OF EACH INPUT

2
3

vec

A
B

4

INPUT

C

5

17. kn NOM

--

.

o

Pin numbers shown on logic notation are for 0, J or N packages .

3-1104

. TEXAS.
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPICAL OF ALL OUTPUTS

TYPES SN54LS446, SN54LS449, SN74LS446, SN74LS449
QUADRUPLE BUS TRANSCEIVERS WITH
INDIVIDUAL DIRECTION CONTROLS
02613, OCTOBER 1980 - REVISED DECEMBER 1983

SN54LS446, SN54LS449 ... J PACKAGE
SN74LS446, SN74LS449 ... D, J OR N PACKAGE

•

3-State Outputs Drive Bus Lines Directly

•

P-N-P Inputs Reduce DC Loading on Bus
Line

•

Hysteresis at Bus Inputs Improves Noise
Margins

•

Flow-Thru Data Pinout (B Bus Opposite
A Bus)

•

(TOPVIEWI

Vee
GA8
81
DIRl

82
83
DIR4
--....._ _--"- 84

Choice of True ('LS449) and Inverting
('LS446)

SN54LS446, SN54LS449 ... FK PACKAGE
SN74LS446, SN74LS449 ..• FN PACKAGE
(TOPVIEWI

description

«

U al
.-alUU«

These quadruple bus transceivers are designed for
data transmission from individual lines of the A bus
to individual lines of the B bus or the reverse, depending on the logic levels at the direction-control pins
DIRl through DIR4. These direction controls (one
for each channel) allow maximum flexibility in
timing. The enable inputs GBA and GAB can be used
to disable the A or B outputs respectively, or to
disable both buses for effective isolation.

«It!)

z

3 2

1

>It!)

4

DIRl

5

6

Ne

7

92
93

8
9 10 111213

II

"
w

FUNCTION TABLE
ENABLE

DIRECTION

C

OPERATION

OPERATION

GBA

GAB

DIR

H

H

X

Isolation

Isolation

X

L

H

A data to B Bus

A data to B Bus

L

X

L

B data to A Bus

B data to A Bus

X

H

H

Isolation

Isolation

H

X

L

Isolation

Isolation

H

= high

level, L

= low

level, X

'LS446

-I

'LS449

lI-

= irrelevant

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
7V
Supply voltage, Vee (see Note 1)
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off·state' output voltage
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free·air temperature range: SN54LS'
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -55°C to 125°C
SN74LS'
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
-65°C to 150°C
Storage temperature range
NOTE 1: Vol tage values are with respect to the network ground terminal.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~ea::s~~[I~ar~liu:~Ot~~~~~~nor~~f:~~~n~e~~~s~

TEXAS

"'.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1105

TYPES SN54LS446, SN54LS449, SN74LS446, SN74LS449
QUADRUPLE BUS TRANSCEIVERS WITH INDIVIDUAL DIRECTION CONTROLS
logic diagrams (positive logic)

logic symbols
'LS446

'LS446

DIR2

GAB

DIR3

OIR 1

DIR4

A1

Al

(2)

A2

B2

A3

B3

~

A4

B4

TO OTHER THREE
TRANSCEIVIERS

'LS449

'LS449
GBA

GAB

DIR2
DIR3

II

OIR 1

DIR4

A1

Al

-f
-f

rC

m

A2

B2

A3

B3

A4

B4

(2)

--.,..:.t
TO OTHER THREE
TRANSCEIVERS

<

(")

Pin numbers shown on logic notation are for 0, J or N packages.

m

(J)

(14) B1

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

VCC

VCC

INPUT

3-1106

'TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS446, SN54LS449, SN74LS446, SN74LS449
QUADRUPLE BUS TRANSCEIVERS WITH INDIVIDUAL DIRECTION CONTROLS
recommended operating conditions
PARAMETER
Supply voltage, Vee (see Note 1)

SN54LS446

SN74LS446

SN54LS449

SN74LS449

MIN

NOM

4.5

5

UNIT

MAX

MIN

NOM

MAX

5.5

4.75

5

5.25

V

-15

mA

24

mA

70

°e

-12

High·level output current, 10H

12

Low·level output current, 10L
-55

Operating free·air temperature, T A

125

0

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74LS446

SN54LS446
TEST CONDITIONSt

PARAMETER
High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage
Hysteresis (VT+ - VT_), A or B input

~-

Vee= MIN,
Vee = MIN,

High-level output voltage

II = -18mA

Vee= MIN
10H = -3 mA

Vee= MIN,
Low-level output voltage

IOZL

V

-1.5

-1.5

V

0.1

0.4

0.2

0.4

2.4

3.4

2.4

3.4

Off-state output current,

Vee = MAX,

high-level voltage applied

Vo = 2.7 V

Off-state output current,

Vee = MAX,

low-level voltage applied

Vo =0.4 V

Input current at

AorB

maximum input voltage

GABorGBA

= MAX,

High-level input current

Vee

= MAX,

IlL

Low-level input current

Vee = MAX,

lOS

Short-circuit output current~

Vee

IIH

V
2

2
0.25

IOL = 12mA

0.4

0.25

0.4

0.35

'1.5

V

Vee

Total supply current

= MAX,

Outputs open
'LS449

Gat2V,

20

20

-0.4

-0.4

VI

0.1

0.1

VI

0.1

0.1

20

20

J.lA

-0.4

mA

-225

mA

Gat2V,

=5.5 V
= 7V
VI =2.7 V
VI

= 0.4 V

= MAX

'LS446
lee

V

VIH = 2 V,

Vee

II

V
1.7

VIL = VIL max IOL = 24 mA
IOZH

UNIT

0.6

VIH = 2V,
VIL = VIL max 10H = MAx

VOL

SN74LS449
MAX
MIN TVP:j:
2

2

VIH

VOH

SN54LS449
MIN TVP:j: MAX

-0.4
-225

-40

-40

Outputs high

35

56

35

56

Outputs low

39

63

39

63

Outputs at Hi-Z

42

68

42

68

Outputs high

42

68

42

68

Outputs low

47

75

47

75

Outputs at Hi-Z

50

80

50

80

J.lA
mA
mA

II
en
w

CJ

:>w

C

-oJ

lmA

I-

tFor CO~dltlons shown as MIN or MAX, use t~e appropriate value specified under recommended operating conditions.
:j:AII tyPical values are at VCC = 5 V, T A = 25 C.
~ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

TEXAS

-111

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1107

TYPES SN54LS446, SN54LS449, SN74LS446, SN74LS449
QUADRUPLE BUS TRANSCEIVERS WITH INDIVIDUAL DIRECTION CONTROLS
switching characteristics at Vee

=5 V, TA = 25°e

PARAMETER

FROM

TO

(INPUT)

(OUTPUT)

Propagation delay time,

A

B

low-to-high-Ievel output

B

A

Propagation delay time,
tpHL
.
high-to-Iow-Ievel output

A

B

B

A

GBA

A

GAB

B

GBA

A

GAB

B

GBA

A

GAB

B

GBA

A

GAB

B

tPLH

tpZL Output enable time to low level
tpZH Output enable time to high level
tPLZ Output disable time from low level
tpHZ Output disable time from high level

'LS446
TEST CONDITIONS

MIN

CL =45pF,
RL = 667 .0,
See Note 2

CL=5pF,
RL = 667.0,
See Note 2

NOTE 2: See General Information Section for load circuits and voltage waveforms.

II
-I
-I

r-

C
m

<

Ci

m.
CJ)

3-1108

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

'LS449
TYP

MAX

13

10

15

13

10

15

7

12

11

17

7

12

11

17

TYP

MAX

8
8

MIN

24

40

21

35

24

40

21

35

15

25

18

30

15

25

18

30

14

25

14

25

14

25

14

25

10

15

10

15

10

15

10

15

UNIT
ns
ns
ns
ns
ns
ns

TYPES SN54LS447,SN74LS447
BCD-TO-SEVEN-DECODERSIDRIVERS
02428. NOVEM8ER 1977-REVISEO DECEM8ER 1983

SN54lS447 ... J PACKAGE
SN74lS447 ... D. J OR N PACKAGE

• Low-Voltage Version of
SN54LS247 /SN7 4LS247

(TOPVIEWI

• Open-Collector Outputs
Drive Indicators Directly

Vee

• Lamp-Test Provision

9

• Leading/Trailing Zero
Suppression

b

f

• Lamp Intensity
Modulation Capability

d

logic symbol
IT
BI/RBO

RBI

(31

(4L

....
,...,

BIN/7-SEG
V20
[T2)

(TOPVIEWI

>1

l....:::
(51

SN54LS447 ..• FK PACKAGE
SN74lS447 ... FN PACKAGE

t>

U

~

.....

~Ki21

&

CT=O

A

B
C

o

a 20.21 Q i-...

(7)

1

(1)

b20.21 Qi-...
c 20.21 Q .....

2

d 20.21Q I--.

(2)

3

(6)

U
U

U I I l Z > ...

LT

9

(12)

BJ/RBO

a

(11)

NC

NC

(10)

RBI
D

b

(9)

e20.21Qi-...

(15)

f20.21Q .....

4

(13)

(14)

9 20.21 Q i"-.

Pin numbers shown on logic notation are for D. J or N packages.

II

NC - No internal connection

FUNCTION TABLE
DECIMAL

INPUTS

OR

OUTPUTS

BiiRBOf

FUNCTION

TI

RBi

D

C·

B

0

H

H

L

L

L

L

H

1

H

X

L

l

L

H

H

A

b

c

ON

ON

ON

ON

OFf

ON

ON

OFF

a

d

.

NOTE
f

g

ON

ON

OFF

OFF

OFF

OFF

2

H

X

L

L

H

L

H

ON

ON

OFF

ON

ON

OFF

ON

3

H

X

L

L

H

H

H

ON

ON

ON

ON

OFF

OFF

ON

4

H

ON

ON

X

L

H

L

L

H

OFF

ON

ON

OFF

OFF

5

H

X

L

H

L

H

H

ON

OFF

ON

ON

OFF

ON

ON

6

H

X

L

H

H

L

H

ON

OFF

ON

ON

ON

ON

ON

7
8

H

X

L

H

H

H

H

ON

ON

ON

OFF

OFF

OFF

OFF

H

X

H

L

L

L

H

ON

ON

ON

ON

ON

ON

ON

9
10

H

X

H

L

L

H

H

ON

ON

ON

ON

OFF

ON

ON

OFF

H

X

H

L

H

L

H

OfF

OFF

ON

OFF

ON

11

H

X

H

L

H

H

H

OFf

OFF

ON

ON

OFF

OFF

ON

12

H

X

H

H

L

L

H

OFF

ON

OFF

OFF

OFF

ON

ON

13

H

X

H

H

l

H

H

ON

OFF

OFF

ON

OFF

ON

ON

14

H

X

H

H

H

L

H

OFF

OFF

OfF

ON

ON

ON

ON

15

H

X

H

H

H

H

H

OFF

OFf

OFF

OFF

OFF

OFf

OFF

ON

en
w

U

>
w
C

..J

....
....

1

2

BI

X

X

X

X

X

X

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

A1ii
IT

H

L

L

L

l

L

L

OFF

OFF

OFF

OFF

OFF

OFF

OFF

3

L

X

X

X

X

X

H

ON

ON

ON

ON

ON

ON

ON

4

H = high level. L = low level. X = irrelevant
NOTES: 1. The blanking input (Bi) must be open or held at a high logic level when output functions 0 through 15 are desired. The
ripple-blanking input (RBi) must be open or high if blanking of a decimal zero is not desired.
2. When a low logic level is applied directly to the blanking input (8'1). all segment outputs are off regardless of the level of any other
input.
3. When ripple-blanking input (RBi) and inputs A. B. C. and 0 are at a low level with the lamp test input high. all segment outputs
go off and the ripple-blanking output (RBO) goes to a low level (response condition).
4. When the blanking input/ripple blanking output (Bi/RBO) is open or held high and a low is applied to the lamp-test input. all
segment outputs are on.
tBi/RBO is wire·ANO logic serving as blanking input (BI) and/or ripple-blanking output (RBO).

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1109

TYPES SN54LS447, SN74LS447
BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS

TYPICAL

DRIVER OUTPUTS
ACTIVE

OUTPUT

SINK

MAX

POWER

LEVEL

CONFIGURATION

CURRENT

VOLTAGE

DISSIPATION

SN54 LS447

low

open-collector

12mA

7V

35mW

J

SN74LS447

low

open-collector

24mA

7V

35mW

J, N

TYPE

PACKAGES

II~Jb
el

Ic
-d-

FONT TABLE T2 - NUMERICAL DESIGNATIONS AND RESULTANT DISPLAYS

SEGMENT
IDENTIFICATION

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
7V
7V
200mA
. . 1 mA
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

Supply Voltage, VCC (see Note 1)
...... .
Input voltage . . . . . . . . . . . . . . .
Peak output current (tw ~ 1 ms, duty cycle ~ 10%)
Current forced into any output in the off state
Operating free-air temperature range: SN54LS447
SN74LS447
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS447

SN54LS447

II
-I
-I

rC
m

MIN
4.5

Supply voltage, Vce

NOM
5

MAX

MIN

NOM

5.5

4.75

5

MAX
5.25

UNIT
V

Off'state output voltage, VO(off)

a thru g

7

7

V

On-state output current, 10(on)

a thru g

12

24

mA

High-level output current, 10H

BI/RBO

-50

-50

IJoA

Low-level output current, 10L

BIIRBO

1.6

3.2

mA

70

C

-55

Operating free-air temperature, T A

<

('")

m

en

3-1110

TEXAS

-I!I

INSTRUMENTS
POST OFFICE BOX 225012 •. DALLAS. TEXAS 75265

125

0

TYPES SN54LS447, SN74LS447
BCD-TO-SEVEN-SEGMENT DECODERSIDRIVERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

V,L

Low-level input voltage

V,K

Input clamp voltage

VOH

High-level output voltage Si/RBO

VOL

Low-level output voltage Sl/RBO

SN74LS447

SN54LS447

TEST CONDITIONSt

PARAMETER

MIN

TYP+

MAX

'I - -18 mA

Vee - MIN,

V,H-2V,

2.4

V,L = V,L max, 10H = -50 IJA
Vee - MIN,

Vee - MAX,

Off-state output current

VO(on)

On-state output voltage

I,

Input current at maximum input voltage

Vee = MAX,

V, = 7 V

I'H

High-level input current

Vee - MAX,

V,=2.7V

a thru g

-1.5

-1.5

0.4

4.2

V
V
V

0_25

0.4

0_35

0.5

250

V,L = VIL max, VO(0ff)=7V
Vee - MAX,

0.25

110(on) = 12 mA
V,H = 2 V,
V,L = V,L max 110(on) = 24 mA

a thru g

V
0.8

2.4

UNIT

V

V'H-2V,

10(off)

MAX

0.7

4.2
0.25

IIOL=1.6mA
V,H = 2 V,
VIL = V,L max /IOL = 3.2 mA

TYPt

2

2
Vee - MIN,

MIN

250

0.4

0.25

0.4

0.35

0.5

IJA

V
0.1

0.1

mA

20

20

IJA

Any input
',L

Low-level input current

except Bl/RBO Vee = MAX,

V, = 0.4 V

BI/RBO
Short-circu it
lOS
ICC

output current

Bl/RBO

Vee= MAX,

See Note 2

-0.4

-1.2

-1.2

-2

-0.3

Vee = MAX

Supply current

-0.4

7

-0.3
7

13

mA

-2

mA

13

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
NOTE 2: lee is measured with all outputs open and all inputs at 4.5 v.

switching characteristics, Vee

= 5 V, TA = 25°e

PARAMETER

TEST CONDITIONS

toff

Turn-off time from A input

ton

Turn-on time from A input

eL=15pF,

toff

Turn-off time from RBI input

See Note 4

ton

Turn-on time from RBI input

NOTE

MIN

TYP

MAX
100

RL=665fl,

100
100
100

4: See General Information Section for load circuits and voltage waveforms.

UNIT
ns
ns

II
en

w
U

>
w
C

....I

lI-

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1111

B
-I
-I

r-

C
m

:5
('")
m

(J)

3-1112

TYPES SN54LS465 THRU SN54LS468, SN74LS465 THRU SN74LS468
OCTAL BUFFERS WITH 3-STATE OUTPUTS
02631. JANUARY 1981-REVISEO OECEMBE R 1983

• Mechanically and Functionally Interchangeable With DM71/81 LS95 thru DM71/81 LS98

SN54LS465 AND SN54LS466 ... J PACKAGE
SN74LS465 AND SN74LS466 ... DW. J OR N PACKAGE
(TOP VIEW)

• P-N-P Inputs Reduce Bus Loading

G1
A1
Y1
A2
Y2
A3
Y3
A4
Y4
GND

• 3-State Outputs Rated at IOL of 12 rnA and
24 rnA for 54LS and 74LS, Respectively
DEVICE

DATA PATH

'LS465
'LS466
'LS467
'LS468

True
Inverting
True
Inverting

20

Vee

19

G2

18

AS
YB
A7
Y1
A6
Y6
A5
Y5

17
16
15
14
13
12
10

11

SN54LS465 AND SN54LS466 ... FK PACKAGE
SN74LS465 AND SN74LS466 •.• FN PACKAGE

description

(TOP VIEW)

These octal buffers utilize the latest low-powerSchottky technology. The 'LS465 and 'LS466 have a
two·input active·low AND enable gate controlling all
eight data buffers. The 'LS467 and 'LS468 have two
separate active-low enable inputs each controlling
four data buffers. In either case, a high level on any G
places the affected outputs at high impedance.

u
;:: :;:1[5 ~I~
AB
YB
A7
Y7
A6

A2
Y2
A3
Y3
A4

schematics of in puts and outputs
EQUIVALENT OF EACH INPUT
SN54LS467 AND SN54LS46B ... J PACKAGE
SN74LS467 AND SN74LS468 ... DW. J OR N PACKAGE

vec---------+-----

en
w

(TOP VIEW)

10 kl1 NOM
1G
1A1
1Yl
1A2
1Y2
1A3
1Y3
1A4
1Y4
GND

INPUT-,--'-I

TYPICAL OF ALL OUTPUTS

Vee
2G
2A4
2Y4
2A3
2Y3
2A2
2Y2
2A1
2Y1

U

>
w
C

-oJ

lI-

SN54LS467 AND SN54LS468 . , . FK PACKAGE
SN74LS467 AND SN74LS468 ... FN PACKAGE

--------..-- vCC

(TOP VIEW)

u
~ :!I~ ~I~
~~

1A2
1Y2
1A3
1Y3
1A4

OUTPUT

2A4
2Y4
2A3
2Y3
2A2

4

5

6
7
8

)':~;:::;:~
~CJNNN

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:::s~~rl~r~~iu:~Ot~~~:~~nof~~f~~~~-::e~::s~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1113

TYPES SN54LS465 THRU SN54LS468, SN74LS465 THRU SN74LS468
OCTAL BUFFERS WITH 3-STATE OUTPUTS
logic diagrams (positive logic)
'LS466

'LS465
01

(1)

(31

02

G2
(3)

Al

(5)

A2

171

A3

(9)

A4

111)

AS

Yl

Al

Y2

A2

Y3

A3

Y4

A4

Y5

AS

Y6

A6

Y7

A7

YB

AB

(13)

A6

(15)

A7

(17)

AB

I

(1)

(3)

(5)

171
(9)

(11)

(13)

(15)

(17)

1(3

r-

lAl

Y2

Y3

Y4

Y5

Y6

Y7

YB

'LS468

'LS467

--t
--t

Yl

1(3
(2)

(3)

(4)

(5)

(6)

(7)

(B)

(9)

lYl

lAl

lY2

lA2

lY3

lA3

lY4

lA4

(2)

(3)

(4)

(5)

(6)

(7)

(8)

(9)

(12)

111)

(14)

(13)

(16)

(15)

11 B)

(17)

lYl

C

m

~

nm

lA2

lA3

en

lA4

2A2

2A3

2A4

(12)

(11)

(14)

(13)

(16)

(15)

(18)

(17)

2Yl

2Al

2Y2

2A2

2Y3

2A3

2Y4

2A4

Pin numbers shown on iogic notation are for DvV. J ur N pClckC:ly~s.

3-1114

lY3

lY4

2(3

20

2Al

lY2

-I/}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

2Yl

2Y2

2Y3

2Y4

TYPES SN54LS465 THRU SN54LS468, SN74LS465 THRU SN74LS468
OCTAL BUFFERS WITH 3-STATE OUTPUTS

logic symbols
'lS466

'lS465

&

EN

Al (21

(31

A2 (41

(51

A3 (SI

(71

Al (21

Yl
Y2

A2 (41

Y3

A3 (SI

A4 (SI

Y4

A4 (SI

A5 (121

Y5

A5 (121

AS (141

YS

AS (141

A7 (lSI

(151 Y7

A7(lSI

(lSI

(171 YS

AS (1SI

AS

'lS468

'lS467
lG
lAl
lA2

(31

1Yl

(51

1Y2

lA3

(71

1Y3

lYl
lY2
lY3

lA4

(91

1Y4

lY4

2G
(111 2Yl

2Al

2Al (121

2Yl

(141

(131 2Y2

2A2 (141

2Y2

(1SI
2A3
(lSI
2A4

(151 2Y3

2A3 (lSI
2A4 (1SI

2Y3

2A2

(171 2Y4

2Y4

en
w

Pin numbers shown on logic notation are for DW. J or N packages.

C,.)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Off·state output voltage
Operating free·air temperature range: SN54LS465 thru SN54LS468 . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
SN74LS465 thru SN74LS468 . . . . . . . . . . . . . . . . . . . . . . . oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C

>
W
C
..oJ

.....
.....

NOTE 1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54lS'
Supply voltage, Vee

SN74LS'

MIN

NOM

MAX

MIN

NOM

4.5

5

5.5

4.75

5

High-level output current, IOH

-1

low-level output current, IOl

12
-55

Operating free-air temperature, T A

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

125

0

MAX

UNIT

5.25

V

-2.6

mA

24

mA
°e

70

3-1115

TYPES SN54LS465 THRU SN54LS468, SN74LS465, THRU SN74LS468
OCTAL BUFFERS WITH 3-STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

Vee; MIN, VIH; 2 V,

Low-level output voltage

10H; -:-1 mA

MIN

10H - -2.6 mA

Vee - MIN, VIH; 2 V,

10L -12 mA

VIL; VIL max

10L; 24 mA

Vee; MAX, VIH ; 2 V,

VIL ; VIL max,

VO; 2.7 V

Off-state output current,
10ZL low-level voltage applied

Vee; MAX, VIH; 2 V,

TVP*

MAX

2

UNIT
V

0_7

0_8

V

-1.5

-1.5

V

3.3

2.4

VIL; VIL max

10ZH high-level voltage applied

2.4
0.25

VIL; VIL max,

V

3.1

0.4

VO;O.4V

Input current at maximum

0.25

0.4

0_35

0.5

V

20

20

/J.A

-20

-20

/J.A
mA

Vee; MAX, VI; 7 V

0.1

0.1

IIH

High-level input current

Vee; MAX, VI; 2.7 V

20

20

/J. A

IlL

Low-level input current

Vee; MAX, VI; 0.4 V

lOS

Short-circuit output current§

Vee; MAX, Vo; 0 V

-0.2
-130

-0.2
-130

mA
mA

II

input voltage

'LS465,
'LS467

ICC

Supply current

Vee; MAX
'LS466,
'LS468

:1

SN74LS'
MAX

Vee - MIN, II; -18 mA

Off-state output current,

3

TVPt

MIN
2

VOH High-level output voltage
VOL

SN54LS'

TEST CONDITIONSt

PARAMETER

-30
Outputs low

19

Outputs high

-30
19
13

32

13

32
22

Output Hi-Z

22

37

22

37

Outputs low

14

23

14

23

22

Outputs high

6

10

6

10

.outputs Hi-Z

17

28

17

28

mA

t For conditions shown as MI N or MAX, use the appropriate value specified under recommended operating conditions_

*

All typical values are at VCC; 5 V, TA'; 25°C_

.

§ Not more than one output should be shorted at a time, and duration of the short:.:ircuit should not exceed one second.

switching characteristics, Vee

r

=5 V, TA = 25°e, see note 2

FROM

TO

(INPUT)

(OUTPUT)

C

PARAMETER

<

tpLH

Ai

Vi

tpHL

Ai

Vi

(")

tPZH

G~

V

en

tPZL

G

~

V

tpHZ

G t

V

tPLZ

Gt

V

m·
m

TEST CONDITIONS

RL;667n, eL;45pF

RL ; 667 n, eL; 5 pF

TVP

MAX

TEXAS

MIN

TVP

MAX

UNIT

9

15

7

12

ns

12

18

9

15

ns

25

40

25

40

ns

29

45

29

45

ns

25

40

25

40

ns

30

45

30

45

ns

NOTE 2,: See General Information Section for load circuits and voltage waveforms.

3-1116

'LS466, 'LS468

'LS465, 'LS467
MIN

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54490, SN54LS490, SN74490, SN74LS490
DUAL 4-BIT DECADE COUNTERS
OCTOBER 1976-REVISED DECEMBER 19B3

•

Dual Versions of Popular SN5490A, SN54LS90,
SN7490A, and SN74LS90 Counters

•

Individual Clock, Direct Clear, and Set-to-9
Inputs for Each Decade Counter

•

Dual Counters Can Significantly Improve
System Densities as Package Count Can
Be Reduced by 50%

•

Maximum Count Frequency ... 35 MHz
Typical

•

Buffered Outputs Reduce Possibility of
Collector Commutation

SN54490. SN54LS490 •.. J OR W PACKAGE
SN74490 •.. J OR N PACKAGE
SN74LS490 ... D. J OR N PACKAGE
(TOP VIEW)

1CLK
1CLR
1QA
1SET9
1QB
1QC
1Qo
GNO

VCC
2CLK
2CLR
2QA
2SET9
2QB
2QC
2Qo

SN54LS490 ... FK PACKAGE
SN74LS490 •.• FN PACKAGE

description

(TOP VIEW)

Each of these monolithic circuits contains eight masterslave flip-flops and additional gating to implement two
individual 4-bit decade counters in a single package.
Each decade counter has individual clock, clear, and setto-9 inputs. BCO count sequences of any length up to
divide-by-100 may be implemented with a single '490 or
'LS490. Buffering on each output is provided to ensure
that susceptibility to collector commutation is reduced
significantly. All inputs are diode-clamped to reduce the
effects of line ringing. The counters have parallel out-'
puts from each counter stage so that submultiples of the
input count frequency are available for system timing
signals.

2CLR
2QA
NC
2SET9
2GB

1QA
1SET9
NC
1QB
1QC
00 U

0

en
w

NC - No internal connection

U

The SN54490 and SN54LS490 are characterized for
operation over the full military temperature range of
-55 DC to 125 DC; the SN74490 and SN74LS490 are
characterized for use in industrial systems operating
from ODC to 70 DC.

>
w

logic symbol
CTRDIV10
lClR (2)
(4)

CT=O
CT=9

c{

(3)
(5)

(6)

(7)

BCD COUNT SEOUENCE
(EACH COUNTER)

0
1

(13)

OUTPUT

COUNT

2ClR

CLEAR/SET·TO-9

°oOC °B °A
L
L
L
L
H
L
L
L

2

L

L

H

L

3

L

L

H

H

4

L

,H

L

L
H

5

L

H

L

6

L

H

H

L

7

L

~

H

H

8

H

L

L

L

9

H

L

L

H

FUNCTION TABLE
(EACH COUNTER)
CLEAR SET-TO-9 0A 0B 0c 00
L
L
L
H
L
L
L

H

L

L

H = high level,

H

L

L

H

(11)

2SET9

(10)

2ClK

(9)

OUTPUTS

INPUTS

II

U

ozzOO
.... t!)
NN

C

lOA

..oJ

lOB

lI-

lOc
10 0

20A
20B
20c
20 0

Pin numbers shown on logic notation are for 0, J or N packages,
NC -.No internal connection

COUNT
l = low level

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~n::::s:'a~[,~r~Jiu:~Ot~~~f!~nor~~f:~~~~e~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1117

TYPES SN54490, SN54LS490, SN74490, SN74LS490
DUAL 4-BIT DECADE COUNTERS
schematics of inputs and outputs

'490

EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS
- - - - - - -

-

- -

V

cc

VCC--~J----

INPUT

L...-~""_

INPUT
CLOCK
CLEAR SET-TO-9

OUTPUT

Req NOM

3kn
8kn

'LS490
EQUIVALENT OF EACH
CLOCK INPUT

VCC--~J----

EQUIVALENT OF EACH
CLEAR AND SET-TO-NINE INPUT
V C C - -......- -

TYPICAL OF ALL OUTPUTS
VCC
'120

n

NOM

18 kn NOM

-f
-f
rC
m

INPUT
INPUT-...........- e -

=5
(")

m

(J)

3-1118

"!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

OUTPUT

TYPES SN54490, SN54LS490, SN74490, SN74LS490
DUAL 4-81T DECADE COUNTERS
logic diagram (each counter)
SET.TO.9..:...(4..:...,_12..:...}--1:>0----0--------,
PRESET
QA

b,13}

CLOCK..:...(1..:...,..:...15~}_ _ _ _ _~_ _ _~T

OUTPUT
0A

CLEAR

(5, 11) OUTPUT

°B

(6, 10) OUTPUT

Oc

T

PRESET
QO
T

00

CLEAR
(2,14)

CLEAR~-~~:~---~---~

(7,9)

OUTPUT
00

II
en
w

(.)
Pin numbers shown on logic notation are for D. J or N packages.

:>w
C

-l

lI-

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1119

TYPES SN54490, SN74490
DUAL 4-BIT DECADE COUNTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . .
Input voltage . . . . . . . . . . . . .
Operating free·air temperature range: SN54490
SN74490
Storage temperature range

. .... 7 V

. . . . 5.5 V
-55°C to 125°C
oOe to 70°C
-65°C to 150°C

NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54490
MIN
4.5

Supply voltage, VCC

SN74490

NOM

MAX

MIN

NOM

MAX

5

5.5
-800

4.75

5

5.25
-800

High·level output current, IOH

16

Low-level output current, IOL
0

Count frequency, fcount

0

20

Pulse width, tw (any input)

16
25

MHz
ns

25~

-55

Operating free-air temperature, T A

125

V
/l.A
mA

20

25~

Clear or set-to-9 inactive-state setup time, tsu

~

25

UNIT

ns
70

0

°c

The arrow indicates that the falling edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

II

PARAMETER

-t
-t

VIH

High-level input voltage

VIL
VIK

Low-level input voltage

TEST CONDITIONSt

Input clamp voltage

n

m
en

II

Input current at maximum input voltage
High-level input current
Low-level input current

II; -12 mA

VCC; MIN,

VIH; 2 V,

VCC; MIN,

IIH
IlL

VCC; MIN,

VIL; 0.8 V, IOH ; -800 IJA

VOL Low-level output voltage

!5

TYP+

MAX

2.4

VIH; 2 V,

Clear, set-to-9
Clock
Clear, set-to-9
Clock

Short-circuit output current§

ICC

Supply current

VCC; MAX, See Note 2

V
V

0.4
1
80
-1

VCC; MAX, VI; 0.4 V

lOS

V

-1.5

40

VCC; MAX, VI; 2.4 V

lSN54490
VCC; MAX ISN74490

0.8

3.4
0.2

VIL ;0.8 V IOL; 16mA
VCC; MAX, VI;5.5V

UNIT
V

2

VOH High-Iellel output vor'tage

rC
m

MIN

-3.2
-20
-18

-57
-57

45

70

V
mA
IJA
mA
mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee; 5 V, TA; 25°e.
§ Not more than one output should be shorted at a time.
NOTE 2: lee is measured·with all outputs open, both clear inputs grounded following momentary connection to 4.5 V, and all other inputs
grounded.

3-1120

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54490, SN74490
DUAL 4-81T DECADE COUNTERS

switching characteristics, Vee
PARAMETER~
f max

tpLH
tpHL
tPLH
tpHL
tpLH
tpHL
tpHL
tpLH
tpHL

=5 V, TA =25°e

FROM
(INPUT)

TO
(OUTPUT)

Clock

°A

Clock
Clock
Clock
Clear
Set-to-9

TEST CONDITIONS

MIN

TYP

25

35
12

MAX UNIT
MHz
20

°A

13

20

°S,OD

24
26

39
39

32

54

36

54

24

39

°A,OD

24

39

°B,OC

20

36

CL=15pF,
RL = 400 n,
See Figure 1 and Note 3

°c
Any

I

ns
ns
ns
ns
ns

~ f max =' maximum count frequency
tpLH =' propagation delay time, low-to-high-Ievel output
tpH L =' propagation delay time, high-to-Iow-Ievel output

NOTE 3: See General Information Section for load circuits and voltage waveforms.

II
en
w

(..)

:>w

C

..oJ

....

....

TEXAS •
INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS. TeXAS 75265

3-1121

S331J\30 lU

Cf
-'

II
g:;!

I\J
I\J

SET.TO.9J,'.5V
INPUT

~-;:-.;--------------

1

OUTPUTOA

~

~~

,-

Y,.

5V

-I

I

\- 1.5 V

I

t+---+t-

:

L..

' \ 1.5V

t

-'

,

~tpHL

1

i

~ 1.5 V
'>

,

~ tPHL

'

:

tPLH

l
:L 1.5 V
~

,

1.5V

I

1.5V

1 1.5V

~,
~ tpLH-Measure r.---.a1

S

at t"+1

I

-,

-Measure
PHL at t"+2

~f

tPLH-Measure ~
t t
a "+2
~II
1
1.5 V

I

(,'
M
tpHL- easure

" \ 1.5V
tpHL -Measure at t"+8

en

3V

C~
m CO
09

OV

m .....

1.5V

1-----

:

V

r-

I __

1

14 -,
I
,
I

1

'i

1

,

~--

1.5V

~

t+----r-

VOL
tpHL -Measure at t"+10

---

VOL TAGE WAVEFORMS

FIGURE 1

VOH

1.5 V

NOTES: A. Input pulses are supplied by a generator having the following characteristics: tr';; 5 ns, tf';; 5 ns, PRR = 1 MHz, duty cycle = 50%,
Zout "" 50 ohms.

VOH

1.5V

r~1

/ ' 1.5 V

~'---------~~f'

OH

VOL
tpLH-Measure
at t +4
"
- - VOH
1.5 V

\..:..:... V
OL
~ tpLH-Measureatt"+8

'~f

T

OV

1

1

»en

Cz

O~

O~

3V

1

~I

f""

PHL
' \ . 1.5 V

\ --1

~
:

Sf

:.-.,.- t

t

\Li.5V

att"+4

I

~

F t 'J
P.v ;
.
... tw(clockl~

. "

-,--\,

" \ 1.5V

tsu

'~S------------~S:f~----------------

1
I

~ PHL

1

~

tpHL

,.

\

I

ou·rpUTOO

/~-"""""I
~

-.-,1

--'-',1
OUTPUTOC

1

,
PHL

--1- ...... 1

~~
'"
'"
'"

i

L.J

'I

OUTPUT 0B

~

:

!.-....a..... t

~~

1

--~I- - - - - - . . . ; I ; , . . . . . - - - . . . . J
I4--+t- tpLH
,
I,

I
~
I

~en
I

~I

--~--------~I

»"0

r-m

!:!!Z
..... cn

E~l:;--!--------------------

CLEAR
INPUT

z

OV

,

tsu

CLOCK
INPUT

3V

S~

I

I

IS

--------

VOL

CO
Z

.....
m

::D

en

TYPES SN54LS490,SN74LS490
DUAL 4-BIT DECADE COUNTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
_ 7V
_ 7V
5_5V
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

Supply voltage, VCC (see Note 1)
Clear and set-to-9 input voltage
Clock input voltage _ _ _ _ _ _
Operating free-air temperature range: SN54LS490
SN74LS490
Storage temperature range
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN54LS490
MIN NOM MAX
4_5
5_5
5

Supply voltage, VCC
High-level output current, 10H

-400
4

Low-level output current, 10L
0

Count frequency, fcount

-400
0

25

20

Pulse width, tw (any input)

8

J.LA
mA

25

MHz

20

251

Clear or set·to-9 inactive·state setup time, tsu
Operating free-air temperature, T A
j

SN74LS490
UNIT
MIN NOM MAX
4.75
5
5.25
V

ns

251

-55

ns

0

125

70

°c

The arrow indicates that the falling edge of the clock pulse is used for reference.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

TEST CONDITIONSt

VCC

~

MIN,

VCC = MIN,

High-level output voltage

2.5

IOL~4mA

0.25

Clear,

set·to-9 VCC
maximum input voltage I - Clock

~

MAX,

High-level input current set-to-9 VCC = MAX,
I Clock

lOS
ICC

V
0.8

V

en

-1.5

V

(.J

2.7
0.4

3.4

V

0.25

0.4

\ 0.35

0.5

V

VI = 7 V

0.1

0.1

VI- 5.5 V

0.2

0.2 .

20

20

100

100

VI = 2.7 V

Low·level input current set-to-9 VCC ~ MAX,
I-Clock
Short-circuit output current§
VCC = MAX
Supply current
VCC ~ MAX,

VI = 0.4 V
-20
See Note 2

-0.4

-0.4

-1.6

-1.6

-100
15

II

0.7

10L =8 mA

Clear,
IlL

UNIT

-1.5
3.4

Clear,
IIH

SN74LS490
TYP:j:
MAX

VIH = 2 V,
VIL = VILmax

II

VIH = 2 V,

MIN
2

II = -18 mA

VIL = VILmax

Low-level output voltage

Input current at

SN54LS490
TYP:j:
MAX

2

VCC = MIN,
VOL

MIN

26

-20
15

w

:>w

C

...J

lImA

J.lA

mA

-100

mA

26

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at Vee = 5 V, T A = 25"e.
.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 2: lee is measured with all outputs open, both clear inputs grounded following momentary connection to 4.5 V, and all other inputs
.
grounded.

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1123

TYPES SN54LS490, SN74LS490
DUAL 4-81T DECADE COUNTERS
switching characteristics, Vee
PARAMETER~

f max

tPLH

= 5 V, T A =25°e

FROM

TO

(INPUT)

(OUTPUT)

Clock

°A

tpHL
tpLH

Clock

°A

Clock

°B,OD

tPLH

Clock

RL= 2 kU

°c

Clear

Any

Set-to-9

tpHL
,f max
tpLH
tpHL

CL = 15 pF,

See Figure 2 and Note 3

tPHL
tPHL

TYP

25

35

MAX

13

20

24

39

26

39

32

54

36

54

24

39

24

39

°B,OC

20

36

= maximum count frequency
= Propagation delay time, low-to-high-Ievel output
= Propagation delay time, high-to-Iow-Ievel output

II
-I
-I
r-

C
m

~

(")

m

en

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75260

UNIT

MHz
20

°A,OD

NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1124

MIN

12

tpHL
tpLH

TEST CONDITIONS

ns
ns
ns
ns
ns

SET·TO·9 J , 1 . 3 V
INPUT

ss

I
1

I

tsu

CLEAR
INPUT

I'"'v \
--:-------1 1

~:

~
~

1

3

I

~z

~U)
~....;

OUTPUTOA

g~r;;1
~~

1

-,

1

~1.3V

1
I

*

I

1

I

-+'\ 1.3V

1
1

*-\

tpHL

1
1

1.3 V

tpLH-Measure
attn+2

1

I

fj
t

.

I1

I

1

tpHL -Measure at tn+8

I

f

1.3V

-

VOH

t
1

.

-

-

VOH

3V

C

.

VOL
~ tpHL-Measureatt 10
rn+

I
--i4---ot

f

1.3V

-

I
VOL
~ tpLH-Measure at tn+8

1

if

~ tpHL

V
,OH

VOL
tpHL-Measure
at tn+4

~I

I 'i 1.3V
I-L.:...

1.3V

I1

OV

1 /r-

f

pi

1.3V

3V

1.3V

1

~
I
~I t
I

---

1

at tn+2

1.3V'.

tpLH _ Measure ~
,-I
attn+4
I

PHL

1

"

\1
I

I

I

~tPLH

~ tpHL -Measure

I

OV

1

I

1

.

-,-, 1

~ 1.3V

at t +1
n

1.3V

\

~

I

OUTPUT Os

~f

1

~

I
I '
~ tpHL
I

OUTPUTOC

~ tPLH-Measure

\:..

--1-, 1

1
I
--1- ' , I

\

'_3V

I

1\

x
(;,

~ tw(clock) ~
I
I
1.3V

1
\1.3V
I '

1.3V

--1--":
OUTPUT 00

~z

'"

:

;-

~~~
'"m

U

~
I

/"--"""1~~~~J

~ t
.....---------.
PHL

~ tpHL

,;;C:~
;:1'T1

I

OV

Sii---------

SS

I
tsu

_ _ _ _..J

1

~ tPLH
1

a

;:;;--:--------------------3V
1

I

_....;.. _ _ _ _ _ _

- - - - - - - 3V

~

~

1

CLOCK
INPUT

-

\~~--------------

1

r~---VOH
1.3V

1.3V

~'~-----------------(Sf'

~~
r-"'tJ
~m

len

!2!!en

..... Z
VOL

CCJ1
m~

or-

:t>5e
Ceo

VOLTAGE WAVEFORMS
NOTES: A. Input pulses are supplied by a generator having the following characteristics: tr';; 15 ns, tf .;; 6 ns, PRR

N
(11

TTL DEVICES

1 MHz, duty cycle

mp

Oz
FIGURE 2

...Cf

~

Ocn

~ 50%, Zout '" 50 ohms.

III

c: """'I
Z~
..... rmen
:z:J~

enc

II
-f
-f

r
C
m

<

("')

m

en

3-1126

TYPES SN54LS540, SN54LS541, SN74LS540, SN74LS541,
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
02546. AUGUST 1979-REVISEO APRIL 1985

• 3-State Outputs Drive Bus Lines or
Buffer Memory Address Registers

SN54LS540, SN54LS541, ..• J PACKAGE
SN74LS540, SN74LS541 ... OW, J OR N PACKAGE
(TOP VIEW)

• P-N-P Inputs Reduce D-C Loading
• Hysteresis at Inputs Improves Noise Margins
• Data Flow-thru Pinout (All Inputs on
Opposite Side from Outputs)

20

G1

Y1
Y2
Y3
Y4

description
These octal buffers and line drivers are designed to
have the performance of the popular SN54LS240/
SN74LS240 series and, at the same time, offer a
pinout having the inputs and outputs on opposite
sides of the package. This arrangement greatly enhances prin'_Jd circuit board layout.'

Y5

GND

RATED
IOH
(SOURCE
CURRENT)

Y7

11

YB
FK PACKAGE
FN PACKAGE

u

~ ~15 ~I~
A3
A4
A5

The SN54LS540 and SN54LS541 are characterized
for operation over the full military temperature range
of _55°e to 125°e. The SN74LS540 and SN74LS541
o
are characterized for operation from oOe to 70 e.

10L
(SINK
CURRENT)

Y6

12

(TOP VIEW)

The 'LS540 offers inverting data and the 'LS541
offers true data at the outputs.

RATED

10

13

SN54LS540, SN54LS541 '"
SN74LS540, SN74LS541 '"

The three-state control gate is a 2-input NOR such
that if either Gi or G2 are high, all eight outputs are
in the high-impedance state.

TYPE

Vee

fu

A1

6

A6
A7

en
w

lYt>ICAL POWER
DISSIPATION
(ENABLED)
'LS541
'LS540

SN54LS'

12mA

-12mA

92.5 mW

120mW

SN74LS'

24mA

-15mA

92.5 mW

120mW

U

>
w
C

..J

....
....

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
VCC

TYPICAL OF ALL OUTPUTS
---e_-VCC
50 !l
NOM

-----

Req

INPUT

OUTPUT

Enable Inputs: Req = 9 k!l NOM
All Other Inputs: Req = 10 k!l NOM

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specIfications per the terms of Texas Instruments

~~~n~:::s:a~rl~ar~liu:~Ot~~~~!~nor~~f:~~~n~e~:::'

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TeXAS 75265

3-1127

TYPES SN54LS540, SN54LS541, SN74LS540, SN74LS541
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

logic symbols

'LS540

'LS541

Al (21

Al (21

(181 Yl

(31

A2 (31

1171 Y2

A3 (41

A3 (41

1161 Y3

A4 151

A4 (51

(151 Y4

A5 (61

A5 (6)

1141 Y5

f7I

A6 (71

1131 Y6

A7 181

A7 (81

1121 Y7

191

1111 Y8

A2

A6

A8

191

A8

logic diagram (positive logic)
'LS541

'LS540

11

(1S)Yl

I

-I
-I
r

~-----

--1

~-----

-1

A2~
A3~

C

~Y3

A3~

~Y3

~Y4

A4~

~Y4

~Y5

A5~

~Y5

~Y6

~------,
A6~
.
~Y6
. ~------,

--I

(")

CJ)

A6~

~-----

m

-;
~Y2

~-----

A5~

<

A2~

-,

A4~

~-----

f------ -,

f-------,

r-------I

-,

~------1

A7~

~Y7

A7~

(9)

(11)
~YS

AS~L..

~Y7

1------ -;

r----- -~

AS=--j

I

~Y2

~-----

m

I

'-- _ _ _ _ _ J

_____

r--.!!.!l- YS

J

Pin numbers shown on logic notation are for OW, J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range: SN54LS540, SN54LS541 ............................. - 55°e to 125°e
0
SN74LS540,SN74LS541 ................................. oOeto 70 e
0
Storage temperature range ........................................................... - 65°C to 150 e
NOTE1: Voltage values are with respect to the network ground terminal.

3-1128

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS540, SN54LS541, SN74LS540, SN74LS541
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATEOUTPUTS
recommended operating conditions
SN54LS'

PARAMETER

MIN
4.5

Supply voltage, Vee (see Note 1)
High·level output current, 10H
low·level output current, 10l
Operating free·air temperature, T A

NOM
5

-55

SN74LS'
MAX
5.5
-12
12
125

MIN
4.75

NOM
5

0

MAX
5.25
-15
24
70

UNIT
V
mA
mA
°e

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH
Vil
-VIK

VOH

Val

TEST CONDITIONSt

High·level input voltage
low·level input voltage
Input clamp voltage
Hysteresis (VT + - VT _)

Vee = MIN,
Vee - MIN
Vee - MIN,
Vil = Vil max,
Vee - MIN,
Vil = 0.5 V,
Vee = MIN,
VIH=2V,
Vil = Vilmax

High·level output voltage

low-level output voltage

IIH

Off-state output current,
high·level voltage applied
Off-state output current,
low-level voltage applied
I nput current at maximum
input voltage
High-level input current, any input

III

low·level input current

lOS

Short-circuit output current·

10ZH
10Zl
II

MIN
2

SN54LS'
TVP+ MAX

VIH - 2 V,
10H = MAX

SN74LS'
TVP* MAX
0.6
-1.5

0.5
-1.5

11- -18 mA
VIH - 2 V,
10H = -3 mA

MIN
2

0.2

0.4

0.2

0.4

2.4

3.4

2.4

3.4

IOl=12mA

2
0.25

0.4

tpZl
tpZH
tPlZ
tpHZ

0.4

0.35

0.5

Vee = MAX,
VIH=2V,
Vil = Vilmax

Va = 2.7 V

20

20

Va = 0.4 V

-20

-20

Vee = MAX,

VI = 7 V

0.1

0.1

Vee - MAX,

VI - 2.7 V

20

20

jJ.A

Vee = MAX,
Vee - MAX

VI = 0.4 V

-0.2
-225'

-0.2

mA

-225

mA

25
32
45
52
52
55

mA

jJ.A

-40

40
13
18
24
30
30
32

mA

W
(.)

:>w

C

..oJ

tt-

TEST CONDITIONS

Propagation delay time,
low-to-high-Ievel output
Propagation delay time,
high-to-Iow-Ieveloutput
Output enable time to low level
Output enable time to high level
Output disable time from low level
Output disable time from high level

II
(IJ

= 5 V, TA = 25°e

PARAMETER

tpHl

0.25

V

10l = 24 mA

'lS540
13
25
'lS541
32
18
Vee = MAX,
24
'lS540
45
Outputs
low
Supply
current
lee
Outputs open
30
'lS541
52
All outputs
'lS540
30
52
disabled
32
'lS541
55
. .
t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions .
*AII tvpical values are at Vee = 5 V, T A = 25°e.
·Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

tPLH

V
V
V
V

V
2

Outputs high

switching characteristics, Vee

UNIT

MIN

'LS540
TVP
MAX
9

eL=45pF,
See Note 2

el-5pF,
See Note 2

Rl = 667

Rl - 667

n,

n,

MIN

'lS541
TVP MAX

UNIT

15

9

9

15

10

18

ns

25
15
10
15

38
25
18
25

25
20
10
18

38
32
18
29

ns
ns
ns
ns

15

ns

NOTE 2: See General Information Section for load CirCUits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1129

-I
-I

rC

m

S
(")
m

fJ)

3-1130

TYPES SN54LS589, SN74LS589
8-BIT SHIFT REGISTERS WITH INPUT LATCHES AND 3-STATE OUTPUT
REVISED DECEMBER 19B3

• 8-Bit Parallel Storage Register Inputs

SN54LS589 ... J PACKAGE
SN74LS589 ... J,OR N PACKAGE

• Shift Register has Direct Overriding Load and
Power-Up Clear

(TOP VIEW)

VCC
A
SER
SRLOAD
RCK
SRCK
OC

8

• Guaranteed Shift Frequency ... DC to
20 MHz

C
0

E

description

F

The 'LS589 comes in a 16-pin package and consists of
an 8-bit storage latch feeding a parallel-in, serial-out
8-bit shift register with 3-state outputs. 80th the
storage register and shift register have positive-edge
triggered clocks. The shift register has a direct load
(from storage) input.

G
H

GND

QH'

SN54LS589 ... FK PACKAGE
SN74LS589 ... FN PACKAGE
(TOP VIEW)

U
U U
U COZ>w

schematics of inputs and outputs
EQUIVALENT OF SERIALAND DATA INPUTS

EQUIVALENT OF

C

ALL OTHER INPUTS

....I

lI-

---_+_-VCC

VCC-_-Req

VCCiS
INPUT

INPUT .....t....--
w

V

2

2

UNIT

C

..J

lI-

ns

ns

ns
70

°c

NOTE 2: The RCK t toSRLOAo'setup time ensures the data saved by RCK t will also be loaded into,the counter.

TEXAS

-1!1

INSTRUMENTS
POST O~FICE BOX 225012 • DALLAS. TEXAS 75265

3-1133

TYPES SN54LS589, SN74LS589
8-BIT SHIFT REGISTERS WITH INPUT LATCHES AND 3-STATE OUTPUT

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54LS'

TEST CONDITIONSt

MIN

TVPt

SN74LS'
MAX

MIN

TVPt MAX

VCC= MIN,

II = - 18 mA

VOH

VCC= MIN,

IOH = - 1 mA

VOL

VCC= MIN

IOZH

VCC =MAX,

Vo = 2.7 V

20

20

IlA

IOZL

VCC = MAX,

Vo = 0.4 V

- 0.2

-0.2

mA

- 0.1

-0.1

mA

20

20

IlA

-0.4

- 0.4

I

IlL

VCC = MAX,

VI = 7 V

VCC = MAX,

VI = 2.7 V

I SER, A .... H
I Others

loS§

Icc

2.4
I

IIH
IlL

-1.5

UNIT

VIK

VCC = MAX,

VI'" 0.4 V

Vee = MAX,

Va = 0 V

3.2
0.25

IOL = 8 mA

-1.5
2.4

3.2

0.4

IOL=16mA

-100

V

0.25

0.4

0.35

0.5

- 0.2
- 20

- 0.2
-20

V

- 100

IlcCH

Vcc = MAX,

30

45

30

45

IICCL

All possible inputs grounded,

30

45

30

45

IICCZ

Output open

35

53

35

53

V

mA
mA

mA

t For conditions shown as MI N or MAX use the appropriate values specified under recommended operating conditions.
~ All typical values are at Vee = 5 V, T A = 25°e

switching characteristics, Vee
PARAMETER

II

f max
tPLH

FROM

TO

(INPUT)

(OUTPUT)

SRCKt

~
~

SRLOAD J,

tpHL

r-

tpLH

RCKt

tPHL

C

(see note 2)
TEST CONDITIONS

I

SRCK

tpHL
tPLH

= 5 V, TA = 25°e

°H'

RL=1 kn,

CL = 30pf

°H'
°H'

RL = 1 kn,

CL=30pf,

SRLOAD = L

tpZH

m

::sn

tpZL
tPHZ

m

6C

°f'(

RL=667n,

CL = 5 pf

tPLZ

CJ)

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-1134

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

'LS589
MIN

TVP

20

35

MAX

UNIT
MHz

15

23

20

30

38

57

29

44

41

60

32

48

10

15

18

27

20

30

20

30

ns
ns
ns

ns

TYPES SN54LS589, SN74LS589
8-BIT SHIFT REGISTERS WITH INPUT LATCHES AND 3-STATE OUTPUT
timing diagram
'LS589
oc~

__________________________________________

L.J
SRCK

--------------~

RCK _ _ _ _ _ _~fl~

_______________________________________

SER

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CAR~ 'W777707lIWW7l0I/WZ/M!

QH' _ _.............................._ _.....

II
(IJ

W

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:>w
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lI-

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1135

11
-t
-t
r-

C
m

<

(")

m

en

3-1136

TYPES SN54LS590, SN54LS591, SN74LS590, SN74LS591
8·BIT BINARY COUNTERS WITH OUTPUT REGISTERS
D2632. JANUARY 1981 - REVISED JUNE 1983

SN54LS590. SN54LS591 ... J OR W PACKAGE
SN74LS,590. SN74LS591 ... J OR N PACKAGE

8-Bit Counter with Register
Parallel Register Outputs

(TOPVIEWI

Choice of 3-State ,'LS590) or OpenCollector ,'LS591) Register Outputs
•

Guaranteed Counter Frequency:
DCt020 MHz

description
These devices each contain an 8-bit binary counter that
feeds an 8-bit storage ~egister. Thestorage register has
parallel outputs. Separate clocks are provided for both
the binary ,counter and storage register. The binary
counter features a direct clear input CCLR and a count
enable input CCKEN. For cascading, a ripple carry output RCO is provided. Expansion is easily accomplished
for two stages by connecting RCO of the first stage to
CCKEN of the second stage. Cascading for larger count
chains can be accomplished by connecting RCO of each
stage to CCK of the following stage.

QB
QC
QD
QE
QF
QG
QH

VCC
QA

GND

RCO

G
RCK
CCKEN
CCK
CCLR

SN54LS590. SN54LS591 ... FK PACKAGE
SN74LS590. SN74LS591 ... FN PACKAGE
(TOPVIEWI
U

ucouu d

d

'

G
RCK
NC
CCKEN
CCK

Both the counter and register clocks are positive-edge
triggered. If the user wishes to connect both clocks
together, the counter state will always be one count
ahead of the register. Internal circuitry prevents clocking from the clock enable.

w

EQUIVALENT OF ALL OTHER INPUTS

eQUIVALENT OF CCK INPUT

en

NC - No internal connection

schematics of inputs and outputs

RCO OUTPUT
VCC

VCC----~--~--~

INPUT

,

>
w
C

Req
VCC1ij
INPUT

U

........
...J

__
OUTPUT

RCK: Req = 10 kn NOM
ALL OTHER: Req - 13 kn NOM
TYPICAL OF Q OUTPUTS ('LS5911

TYPICAL OF Q OUTPUTS ('LS590)
Vec

___ ~OUTPUT
OUTPUT

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~n:ea::s~~rl~r~liu~~Ot~~~~~~nor~~f~~~~~e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1137

TYPES SN54LS590, SN54LS591, SN74LS590, SN74LS591
8·BIT BINARY COUNTERS WITH OUTPUT REGISTERS
logic diagram (positive logic)

11
-t
-t
r-

o

m

<

(")

m

en

Pin numbers shown on logic notation are for Jar N packages.

3-1138

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS590, SN54LS591, SN74LS590, SN74LS591
a·BIT BINARY COUNTERS WITH OUTPUT REGISTERS
logic symbols

'LS590

'LS591

CTR8
(CT

p

255) Z4

(15)OA
(1) OB

l2I'Oc
(3) 00

:~:

Oe
OF
(6) OG

m

OH

Pin numbers shown on logic notation are for J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
Off'state output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS590, SN54LS591 ............................ - 55°C to 125°C
SN74LS590, SN74LS591 ................................ O°C to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -65°C to 150°C
NOTE1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54LS'

en

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

VCC

Supply voltage

VIH

High·level input voltage

VIL

Low-level input voltage

VOH

High-level output voltage

IOH

High-level output current

IOL

Low-level output current

fCCK

Counter clock frequency

0

20

0

20

MHz

fRCK

Register clock frequency

0

25

0

25

MHz

tw(CCK)

Duration of counter clock pulse

25

25

ns

tw(CCLR)

Duration of counter clear pulse

20

20

ns

tw(RCK)

Duration of register clock pulse

20

20

ns

20

20

2

5.5

5.5

RCa

-1

-1

Q, 'LS590 only

-1

-2.6

RCO

CCKEN low before CCK t
tsu

Setup time

CCLR inactive before CCK t
CCK before RCK t

th

Hold time

TA

Operating free-air temperature

0.8

Q, 'LS591 only

Q

(see Note 2)

CCKEN low after CCK t

8

16

12

24

20

20

40

40

0
- 55

0

w
U

>
w

C

V
V

-I

lI-

rnA

rnA

ns

0
125

V
V

2
0.7

II

70

ns
DC

NOTE 2: This setup time ensures the register will see stable data from the counter outputs. The clocks may be tied together in which case the
register state will be one clock pulse behind the counter.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1139

TYPES SN54LS590, SN54LS591, SN74LS590, SN74LS591
8·BIT BINARY COUNTERS WITH OUTPUT REGISTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

'LS590 Q

VCC; MIN,

VOH

VIH

= 2V,

VIH-2V,

VIH;2V,

VCC; MAX,

r-

~

<

n

VIL-MAX,

VIH;2V,

VIL;MAX,

VCC - MAX,

VI; 7 V

VCC; MAX,

VI;2.7V

VCC; MAX,

VI; 0.4 V

All others
'LS590 Q

--4
--4

0.4

0.25

0.4

yo; 0.4 V

CCK

II

VIH-2V,

II

2.4

3.1

2.4

3.2

~
~

- 20
33

0.25

0.4

0.35

0.5

0.25

0.4

V

0.35

0.5

mA

V

20

20

}JA

- 20

-20

}JA

0.1

0.1

mA

20

20

-0.8

-0.8
- 0.2

-130

-30

-100

- 20

-130
- 100

55

33

55

VCC; MAX,

44

65

44

p5

ICCZ

All possible inputs grounded,

46

65

46

65

ICCH

All outputs open

35

55

35

55

42

65

42

65

ICCL

UNIT

V

0.1

-0.2
-30

yo; 0 V

VCC; MAX,

RCLi

'LS591

0.25

MAX
-1.5

0.1

VO; 2.7 V

'LS590 Q

ICC

TYP*

IOL;16mA
VCC - MAX,

'LS590 Q

'LS590

3.2

IOL - 8 mA

IIH

IOS§

MIN

IOL - 24 mA

VIL; MAX
flCO

IlL

2.4

IOL-12mA
VCC; MIN,

IOZL

3.2

VOH - 5.5 V,

Q

IOZH

2.4

VIL; MAX

VOL

SN74LS'
MAX

IOH; - 2.6 mA
IOH; -1 mA

VCC - MIN,

'LS591 Q

TYP*

-1.5
IOH; -1 mA

VIL; MAX

RCO

MIN

11;-18mA

VCC; MIN,

VIK

IOH

SN54LS'

TEST CONDITIONSt

}JA
mA
mA

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t All typical values are at Vee; 5 V, T A; 25°e
§ Not more than one output should be shorted at a time and the duration of the short·circuit should not exceed one second.

switching characteristics,
PARAMETER

m

en

Vee = S V, TA = 2So e (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

f max

CCK

RCO

tPLH

CCKt

RCa

tPHL

CCKt

RCa

tpLH

CCLR!

RCO

tpLH

RCKt

Q

tpHL

RCKt

Q

tpZH

G!

Q

tpZL

G!

tpHZ

MIN

TYP

20

35

'LS591
MAX

MIN

TYP

20

35

MAX

UNIT
MHz

14

22

16

24

ns

;10

30

25

38

ns

30

45

32

48

ns

12

18

25

38

ns

22

33

28

42

ns

25

38

ns

Q

30

45

ns

~t

Q

20

30

ns

tpLZ

Gt

Q

25

38

tpLH

Gt

Q

tPHL

a!

Q

RL;lkn,

CL; 30 pF

RL; 667 n,

CL; 45 pF

RL; 667 n,

CL; 5 pF

RL; 667 n,

CL; 45 pF

NOTE 3: See General Information Section for load circuits and

3-1140

'LS590

TEST CONDITIONS

~oltage

waveforms.

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

ns
34

50

ns

32

48

ns

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
8·BIT BINARY COUNTERS WITH INPUT REGISTERS
02633, JANUARY 1981 -

SN54LS592 .•. J OR W PACKAGE
SN74LS592 ... J OR N PACKAGE

Parallel Register Inputs ('LS592)
•

REVISED DECEMBER 1983

Parallel3-State 1/0: Register Inputsl
Counter Outputs ('LS593)

ITOPVIEW)
16

vCC
A

15

Counter has Direct Overriding Load and
Clear

0

Guaranteed Counter Frequency:
DC to 20 MHz

H

10

CCLR

GND

9

RCO

14

CLOAD

13

RCK

F

12

CCKEN

G

11

CCK

description
SN54LS592 .•. FK PACKAGE
SN74LS592 ... FN PACKAGE

. The 'LS592 comes in a 16-pin package and consists of a
parallel input, 8-bit storage register feeding an 8-bit binary
counter. Both the register and the counter have individual
positive-edge-triggered clocks. In addition, the counter has
direct loa'd and clear functions. A low-going RCa pulse will be
obtained when the counter reaches the hex word FF. Expansion is easily accomplished for two stages by connecting RCa
of the first stage to CCKEN of the second stage. CasCading
for larger count chains can be accomplished by connecting
RCa of each stage to CCK of the following stage.

ITOPVIEW)

o

CLOAD

E

RCK
NC
CCKEN
CCK

° ulola:
u
a: tl

J: z z
t:l

The 'LS593 comes in a 20-pin package and has all the
features of the 'LS592 plus 3-state I/O, which provides
parallel counter outputs. The tables below show the operation
of the enable (CCKEN, CCKEN) inputs. A register clock
enable (RCKEN) is also provided.

NC -

..J

No internal connection

SN54LS593 •.• J PACKAGE
SN74LS593 .•. OW, J OR N PACKAGE
ITOPVIEW)

OUTPUT ENABLE CONTROL ('593 ONLY)

A/QA

VCC

S/QS

G

C/QC

G

G

AlGA thru HIGH

D/QO

17

E/QE

16

RCK
CCKEN

L

L

input mode

F/QF

15

H

input mode

G/QG

14

output mode

H/QH

13

CCK

12

CCLR

11

RCO

H
H

L

H

CLOAD

input mode

GND

CCKEN

Cc'iffii

EFFECT ON CCK

L

L

Enable

H

Disable

H
H

L

Enable

H

Enable

CCKEN

U

.>w
C

-J

tt-

SN54LS593 ••• FK PACKAGE
SN74LS593 ••• FN PACKAGE

COUNTER CLOCK ENABLE CONTROL'

L

9

en
w

G
R'Ci<'EN

L

II

(TOP VIEW)

G
RCKEN
RCK
CCKEN
CCKEN

°1°

0
Ia: "
gt5~gtl

1u

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea::S:'a~rl~ar~liu~~Ot~~~:~~nof~~f:~~~~e~~;s~

TEXAS

"'J1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

1141

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
8·BIT BINARY COUNTERS WITH INPUT REGISTERS
schematics of inputs and outputs
EQUIVALENT OF 'LS593
CCK AND RCK INPUTS

EQUIVALENT OF A THRU H INPUTS

EQUIVALENT OF ALL OTHER INPUTS

VCC~
Req

VCC-__25 kil NOM

INPUT

_.

INPUT....-foII..-__

'LS592 RCK: Req
ALL OTHER: Req

= 10 kn
= 13 kn

NOM
NOM

TYPICAL OF Q OUTPUTS ('LS593)

RCOOUTPUT
VCC

VCC

OUTPUT

OUTPUT

illOgIC symbols
'LS593

'LS592

-I
-I
r-

C

m

:5
0

m

CTRS

G

CCLR

G

~

CCK

CCLR

CLOAO

CCKEN
RCK

fJ)

CCKEN

A

B
C
0
E

F
G

H

(1)

10

20

CCK
CLOAD

(2)
(3)
(4)

RCREN

(5)

RCK

(6)

(7)

A/QA

(19)
(1S)~

(12)

EN6

-

,....

CT=O

~

(15)
(14)

CTRS

&

r-.....

G4

-

(13)

CT= 255

>4+

(9)

r-..... C3

(17)

......

G1

(16)
(1)
:...

~ ReO

>1C2

o. t.

r',L.----..L..r-~-.....IrL.,
20·
'V 5,6

3D

[>

Z5

B/Qs (2) ... ..
(3)... ..
C/QC (4)... .

O/Qo
E/QE

(5).:':
(6)~:

(7)::

F/QF~"-I

Pin numbers shown on logic notation are for DW, J or N packages.

3-1142

.

1------+-----1

G/QG~
. .-~----~---~
H/Q~(814;1
~
~
~

__________ ______

TEXAS"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS592, SN74LS592
8-BIT BINARY COUNTERS WITH INPUT REGISTERS
logic diagram (positive logic)
CCLR

~(~10~1

'LS592
____________________________~

~_ _(:.;:..;91_

CCK

RCO

~(1~1~1____~~__________~

CLOAD ...:...(1:...;,.41'--_ _ _ _ _-a

A

(151

B (11

C (21

0

II
en

(31

W

U

:>w
C

E (41

..oJ
~
~
F (51

G (61

H

m

Pin numbers shown on logic notation are for Jar N packages.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1143

TYPES SN54LS593, SN74LS593
a-BIT BINARY COUNTERS WITH INPUT REGISTERS
logic diagram (positive logic)
G

G
CCLR

'LS593

(19)

(18)
~11~2~)

______________________________- ,

CCKEN

CCK ~:....----*------~

1

J'l.

Gating for RCK
is similar in detail
to that shown for
CCK.

RCKEN ..:..;11,,-,7)'--_aG2
RCK ,.:..(1:..::6.:....)-----I>
A/OA ,.:..11:..:.)-----+-t~_+-4>_1

BlOB ..:..:12::.,)-----+-t~_+-.r_I

II
-I
-I

r-

C/Oc (3)

(4)

0/°0

C

m

:5
(1
m

E/OE

15)

CJ)

F/OF (6)

G/OG

..:.17..:.)-----+-t~--+_e_t

H/OH ..:.18..:.)____-+-t~--+_e_t

3-1144

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE 80X 225012 • DALLAS, TEXAS 75265

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
8·BIT BINARY COUNTERS WITH INPUT REGISTERS
typical operating sequences

'LS592
CCLR

--.J

U

CIOAi5
CCK

•

r--l~

CCKEN
RCK
A THRU H

_________

-----.f"lL.....-_______________________
INPUT HEX

FCXll/////l/J/lllrf9~·T,Hr\EPlllV/lJ/////
~

RCO

'LS593
G

G _______-'
CCLR
CLOAD

--1

I

-------~------~LJ~+I----------------------------------I

II

-=---____

CCK ________---!.._ _ _ _ _ _ _ _ _ _ _ _

....J

CCKEN ________~------------+---------------'
CCKEN ________

~

____________________

RCK ________-+____~r_l~
RCKEN

LJ

en
w

~

__-+___________________________________
I

AlGA THRU HIGH _ _ _~__...Jj---(INPUTHEXFC>______K

OUTPUT HEX

=

,..--....:;.;;.:.;...;:.:..:..;.:.;;..._

X

OUTPUT HEX

RCO ---------+------------+---------------------~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

OUTPUT HEX

OUTPUT HEX

CJ

>
w

C

...J

lI-

3-1145

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
a·BIT BINARY COUNTERS WITH INPUT REGISTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage (excluding I/O ports) .............................................................. 7 V
Off· state output voltage (including I/O ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS592, SN54LS593 ............................ - 55°C to 125°C
SN74LS592, SN74LS593 ................................ oOe to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
NOTE1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54LS'
MIN

II
-t
-t

VCC

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

IOH

High·level output current

laL

Low·level output current

fCCK

Counter clock frequency.

4.5

5.5

NOM

MAX

4.75

5

5.25

V

0.8

V

V

2

RCa

-1

-1

a 'LS593 only

-1

-2.6

8

16

RCa
a 'LS593 only

24

12
0

20

UNIT

MIN

0.7

0

20

mA
mA
MHz

tw (CCK)

Duration of counter clock pulse

25

25

ns

tw (CCLR)

Duration of counter clear pulse

20

20

ns

tw (RCK)

Duration of register clock pulse

20

20

ns

40

40

ns

RCKEN low to RCK t , 'LS593

20

20

ns

CCKEN low, 'LS592

30

30

30

30

tw (CLOAD) Duration of counter load pulse
tsu

Register enable setup time
Counter enable setup time

tsu

CCKEN low or

before CCK t

CCKEN high, 'LS593

Setup time

C
m

tsu

o

th

Hold time

TA

Operating free·air temperature

m
en

5

2

r-

<

SN74LS'

NOM. MAX

CCLR inactive before CCK t

20

20

CLOAD inactive before CCK t

20

20

RCK t before CLOAD t (see Note 2)

30

30

Data A thru H before RCK t

20

20

. Data A thru H after RCK t
All others

0

0

0

- 55

NOTE 2: This time insures the data saved by RCK

3-1146

0

t will also be loaded into the counter.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

125

0

ns

ns

ns
70

°c

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
8·BIT BINARY COUNTERS WITH INPUT REGISTERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

'LS593 Q

Vce= MIN,

VOH

VIH=2V,

VIL=MAX

ReO

VIH=2V,

VIL=MAX

RCO

IOH = -1 rnA

2.4

3.2

2.4

3.2

IOH = - 2.6 rnA
0.25
0.25

IOZL

'LS593 Q

VIH=2V,

VIL = MAX,

VIH=2V,

VIL = MAX,

Va = 2.7 V
Vcc= MAX,

Vce= MAX

Others

Vcc= MAX,

liH
'LS593
eCK, RCK

0.4
0.4

'LS593 Q

~

0.4

0.35

0.5

0.25
0.35

0.4

20

J.lA
rnA

VI = 7 V

0.1

0.1

20

20

-0.8

- 0.8

- 0.4

-0.4

-0.2

-0.2

-30

-130

-30

- 20

-100

-20

-130
-100

40

60

40

60
60

VCC= MAX,

40

60

40

leCH

All possible inputs grounded,

47

70

47

70

All outputs open

53

80

53

80

57

85

57

85

'ICcZ

V

0.5

ICCL

~

V

20

0.1

VO= 0 V

Vee= MAX,

RCa

0.25

- 0.4

VI = 0.4 V

UNIT

V

0.1

VI = 2.7 V

Vee = MAX,

A Thru H

'LS593

3.2

-0.4

Others

lec

3.1

2.4

VI = 5.5 V

Va = 0.4 V

'LS593 Q

TYP* MAX
- 1.5

2.4

IOL = 16 rnA

'LS593 Q

'LS592

MIN

IOL=24rnA
IOL = 8 rnA

Vee= MAX,
IOZH

IOS§

MAX
-1.5

IOH = -1 rnA

Vcc= MIN,

VOL

IlL

TYP*

IOL=12rnA

'LS593 Q

II

MIN

II = - 18 rnA

Vec= MIN,

VIK

SN74LS' .

SN54LS'

'TEST CONDITIONSt

PARAMETER

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
i All typical values are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time and the duration of the short·circuit should not exceed one second.

rnA
J.lA

rnA

rnA

rnA

II
en
w
o

>
w
C

....I

tt-

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1147

TYPES SN54LS592, SN54LS593, SN74LS592, SN74LS593
8·BIT BINARY COUNTERS WITH INPUT REGISTERS
, switching characteristics, Vee = 5 V, TA = 25°e, (see note 3)
PARAMETER

FROM

TO

(INPUT)

(OUTPUT)

TEST CONOITIONS

'LS592
MIN

TYP

20

35

MIN

TYP

20

35

MAX

UNIT

f max

CCK

RCa

tpLH

CCKt

Q

14

21

ns

tpHL

CCKt

Q

26

39

ns

tPLH

CLOAD

~

Q

34

51

ns

tpHL

CLOAD

~

Q

28

42

ns

tpHL

CCLR ~

Q

25

38

ns

tpZH

G t

Q

31

47

ns

tpZL

G t

Q

27

40

ns

RL=1kn.

RL = 667 n.

CL = 30 pF

CL=45pF

MHz

tpZH

G

~

Q

29

45

ns

tpZL

G

~

Q

31

47

ns

tpHZ

G

~

Q

33

50

ns

tPLZ

G

~

Q

35

52

ns

tpHZ

G't

Q

26

39

ns

tpLZ

G t

Q

28

42

ns

tpLH

CCK t

RCa

14

21

ns

tpHL

CCK t

ns

tpLH

CLOAD

~

RCa

tpHL

CLOAD

~

RCa

tpLH

CCLR

tpLH

RCK t

RCa

RL = 1 kn;

tpHL

RCK t

RCa

CLOAD = L

RL = 667 n.

CL = 5 pF

RCa

~

RL = 1 kn.

CL = 30 pF

RCa
CL = 30 pF

-4
-4
rC
m

S
(")

m

en

3-1148

'LS593
MAX

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

15

23

20

30

20

30

31

47

31

47

ns

27

41

27

41

ns

30

45

30

45

ns

35

53

42

63

ns

30

45

33

50

ns

TYPES SN54LS594, SN54LS599, SN74LS594, SN74LS599
8·BIT SHIFT REGISTERS WITH OUTPUT LATCHES
02747, JUNE 1983 -

SN54LS594, SN54LS599 ..• J OR W PACKAGE
SN74LS594, SN74LS599 ... J OR N PACKAGE
(TOP VIEW)

•

a-Bit Serial-In, Parallel-Out Shift
Registers with Storage

•

Choice of Output Configurations:
'LS594 ... Buffered
'LS599 ... Open-Collector

•
•
•

REVISED DECEM8ER 1983

OD

VCC
OA
SER

Guaranteed Shift Frequency:
DCto20MHz

OE

RCLR

OF

RCK

Independent Direct-Overriding Clears on
Shift and Storage Registers

OG

SRCK

OB
Oc

SRCLR

OH
GND

Independent Clocks for Both Shift and
Storage Registers

OH'

SN54LS594, SN54LS599 ... FK PACKAGE
SN74LS594, SN74LS599 ... FN PACKAGE
(TOP VIEW)

description

UalU

o

These devices each contain an a-bit D-type storage
register. The storage register has buffered ('LS594) or
open-collector ('LS599) outputs. Separate clocks and
direct-overriding clears are provided on both the shift
and storage registers. A shift output (QH ') is provided
for cascading purposes.

0

t3<{

z >

0

RCLR
NC
RCK
SRCK

Both the shift register and the storage register clocks
are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always
be one clock pulse ahead of the storage register.

J: 0
Z

(!)

(!)

U

Z

II

:r: 10:d

0

0:

(/)

NC -

en

No internal connection

w

schematics of inputs and outputs

(.)
EQUIVALENT OF SERIAL INPUT

EQUIVALENT OF ALL OTHER INPUTS

>
W

vec

C

Req

1S

VCC-_.-20kn NOM

INPUT
INPUT-..f:.....---

__

...J

~
~

TYPICAL OF QH' OUTPUTS

----Vee

RCK, SRCK: Req = 10 kn NOM
ALL OTHER: Req - 13 kn NOM
TYPICAL OF ALL OTHER OUTPUTS ('LS594)
VCC

TYPICAL OF ALL
OTHER OUTPUTS "LS599)

OUTPUT

___ ~OUTPUT
OUTPUT

PRDDUCTIDN DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::S':a~il~a~liu~~Ot~~~l~~nor~~f~~~~nJe~::s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1149

TYPES SN54LS594, SN54LS599, SN74LS594, SN74LS599
8·BIT SHIFT REGISTERS WITH OUTPUT LATCHES
logic diagram (positive logic)

-I
-I

rC

m

$

(")

m

tn

Pin numbers shown on logic notation are for J or N packages.

3-1150

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS594, SN54LS599, SN74LS594, SN74LS599
8·BIT, SHIFT REGISTERS WITH OUTPUT LATCHES
logic symbols

'LS594

'LS599

1151
111 OA

1151
111 OA
121 Os

121 Os

131 Oc

131 Oc
141 OD

141 OD

151 °E
161 OF

151 °E
161 OF
2D t>

3

t>

171 OG

171 °G
OH
191 0H'

2Dt> 3Q

191 OH
OH

I>

Pin numbers shown on logic notation are for J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)................................................................ 7 V
Input voltage ............................................................................... 7 V
Off-state output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS594, SN54LS599 ............................ - 55°C to 125°C
SN74LS594, SN74LS599 ................................ oOe to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C
NOTE 1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54LS'

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

VOH

High-level output voltage

IOH

High-level output current

IOL

Low-level output current

fSRCK

Shift clock frequency

0

20

0

fRCK

Register clock frequency

0

25

0

tw(SRCK)

Duration of shift clock pulse

2

0.8

V

QA thru QH, 'LS599 only

5.5

5.5

V

QH'

-1

-1

QA thru QH, 'LS594 only
QH'
Q

-1

-2.6

8

16

25

th

Hold time

TA

Operating free-air temperature

20

MHz

-J

25

MHz

20

20

ns

20

20

ns

35

35

ns

20

20

20

20

40

40

SRCLR low before RCK t

40

40

RCLR high before RCKt

20

20

SER after SRCKt

C

ns

SRCKt before RCKt (see Note 2)

0
- 55

0

tt-

ns

0
125

>
w

mA

25

SER before SRCKt

en

w
U

mA

24

12

SRCLR inactive before SRCKt
Setup time

V
V

2
0.7

Duration of register clock pulse
tw(RCK)
tw(SRCLR) Duration of shift clear pulse, low level
tw(RCLR) Duration of register clear pulse, low level

Isu

UNIT

ns
70

°c

NOTE 2: This setup time ensures the register will see stable data from the shift-register outputs. The clocks may be connected together, in
which case the storage register state will be one clock pulse behind the shift register.

"!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1151

TYPES SN54LS594, SN54LS599, SN74LS594, SN74LS599
8·BIT, SHIFT REGISTERS WITH OUTPUT LATCHES
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIK
'lS594 Q
VOH

VIH;' 2V,

VCC = MIN,
Vil = MAX

QH'
'lS599 Q

VIH =2V,

VCC = MIN,

IIH

VCC - MAX,
SER
All others
'lS594 Q
QH'
'lS594

rnA

3.2

Vil = MAX,

IOl

VI

0.25

0.4

0.25

0.4

2.4

3.1

2.4

3.2

Vo =0

-20

UNIT
V
V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

rnA

V

0.1

0.1

rnA

20

20

/lA

- 0.4

-0.4

-0.2
-30

MAX

0.1

= 16 rnA

= 7V

VI = 0.4 V

VCC = MAX,

TVP*

-1.5

= 24 rnA

VI-2.7V

VCC = MAX,

MIN

0.1

All outputs open

'lS599

-0.2

-130

-30

-100

-20

34

50

-130
-100
34

50

30

45

30

45

42

65

42

65

38

55

38

55

rnA
rnA
rnA
rnA

t
t

For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

switching characteristics, Vee
TO

(INPUT)

(OUTPUT)

SRCKt

QH'

Rl

RCKt

QA thru QH

RL = 667 n,

CL = 45 pF

tpHL

~~

QH'

RL = 1 kn,

CL

tpHL

RCLR~

QA thru QH

RL-667n,

CL-45pF

PARAMETER

C
m

tPHL

tPLH
tPLH
tpHl

S
("')
m

NOTE 3:

3-1152

= 5 V, TA = 25°e, (see note 3)

FROM

-t
-I
r-

en

= -1

VCC = MAX,
All possible inputs grounded,

'lS599
'lS594

II

2.4

IOH =- 2.6 rnA

IOl
VCC

ICCl

3.2

IOl =8 rnA

= MAX,

II

ICCH

VIH = 2 V,

Vil = MAX

QH'

IOS§

2.4

= 5.5 V

Q

SN74lS'

TVP* MAX
-1.5

IOl -12 rnA

VOL

III

IOH = -1 rnA
IOH

VCC = MIN,
VOH

MIN

II = -18 rnA

VCC = MIN,

IOH

SN54lS'

TEST CONDITIONS t

PARAMETER

= 1 kn,

MIN

TVP

Cl = 30 pF

= 30 pF
.L

See General Information Section for load circuits and voltage waveforms_

TEXAS

'lS599

'lS594

TEST CONDITIONS

"'-!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MAX

MIN

TVP

MAX

UNIT

12

18

12

18

ns

15

23

17

25

ns

12

18

28

42

ns

20

30

24

35

ns

22

33

24

35

ns

38

57

40

60

ns

TYPES SN54LS595, SN54LS596, SN74LS595, SN74LS596
8-BIT SHIFT REGISTERS WITH OUTPUT LATCHES
02634, JANUARY 1981 - REVISED DECEMBER 1983

SN54LS595, SN54LS596 ... J OR W PACKAGE
SN74LS595, SN74LS596 ... J OR N PACKAGE

8-Bit Serial-In, Parallel-Out Shift
Registers with Storage

(TOP VIEW)

Choice of 3-State ('LS595) or
Open-Collector ('LS596) Parallel Outputs

OB
Oc

Shift Register Has Direct Clear
•

VCC
OA
SER
G
RCK
SRCK
SRCLR
Ow

00

OE
OF
OG
OH
GNO

Guaranteed Shift Frequency:
DC to 20 MHz

description
These devices each contain an - 8-bit serial-in,
parallel-out shift register that feeds an 8-bit D-type
storage register. The storage register has parallel
3-state ('LS595) or open-collector ('LS596) outputs.
Separate clocks are provided for both the shift register
and the storage register. The shift register has a
direct-overriding clear, serial input, and serial output
pins for cascading.

SN54LS595, SN54LS596 ..• FK PACKAGE
SN74LS595, SN74LS596 ... FN PACKAGE
(TOP VIEW)

Both the shift register and storage register clocks are
positive-edge triggered. If the user'wishes to connect
both clocks together, the shift register state will always
be one clock pulse ahead of the storage register.

SRCK
I
d:I: 0Z U
Z d

Ildl:
Il:

(!)

en

NC - No internal connection

(J)

schematics of inputs and outputs
EQUIVALENT OF SERIAL INPUT

W
EQUIVALENT OF ALL OTHER INPUTS

TYPICAL OF QH' OUTPUTS
- - -.....-VCC

INPUT

>
w
C

Req
VCCiij

VCC--'-20 kn NOM

U

-J

__
OUTPUT

INPUT....-j:....--1.....

lI-

RCK, SRCK: neq = 10 kn NOM
ALL OTHER: Req - 13 kn NOM
TYPICAL OF ALL OTHER OUTPUTS ('LS596)

TYPICAL OF ALL OTHER OUTPUTS ('LS595)
VCC

---r;;-

OUTPUT

OUTPUT

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specification:; per the terms of Texas Instruments

~~~n:ea;~~~[{va~liu:~Ot~~~f~~nof~~f~~~~n~e~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75260

3-1153

TYPES SN54LS595, SN54LS596, SN74LS595, SN74LS596
8·BIT SHIFT REGISTERS WITH OUTPUT LATCHES
logic diagram (positive logic)

RCK
SRCLR
SRCK
SER ..;,.11;..;,4:....)- -.......- - - - f

>--+-_(2....
) QC

(3) QD

-t
-t
r-

(4) QE

C

m

<

n

m
en

. (5)

QF.

(7)

Pin numbers shown on logic notation are for J or N packages.

3-1154

TEXAS'~
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS595, SN54LS596, SN74LS595, SN74LS596
a-BIT SHIFT REGISTERS WITH OUTPUT LA~CHES
logic symbols

'LS595

'LS596

G

G

RCK

RCK

SRCLR
SRCK

SRCLR
SRCK

SER

SER

°A
Os
Oc

(9)

OA
Os
Oc

00

00

OE
OF
OG
OH
OH'

OE
OF
OG
171
OH

20 [> 3 Q

(9)

Ow

Pin numbers shown on logic notation are for J or N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee' (see Note 1) ............................................................... 7 V
Input voltage ............................................................................... 7 V
Off·state output voltage .................................................................... 5.5 V
Operating free-air temperature range: SN54LS595, SN54LS596 . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74LS595, SN74LS596 ................ : ............... oOe to 70°C
Storage temperature range ........ '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C

II'

NOTE 1: Voltage values are with respect to the network ground terminal.

recommended operating conditions

en
SN54LS'

w

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

(.)

V

>
W

VIH

Supply voltage
High-level input voltage

VIL
VOH

High-level output voltage

0A thru 0H, 'LS596 only

High-level output current

°H'
OA thru 0H, 'LS595 only

IOL

Low-level output current

°H'
0

fSRCK

Shift clock frequency

twISRCK)

Duration of shift clock pulse

0
25

twIRCK)

Duration of register clock pulse

20

20

ns

20

20

ns

20

20
20
40

VCC

IOH

2

Low-level input voltage

tsu

Setup time

SRCLR inactive"before SRCK t
SER before SRCK t
SRCK t before RCK t Isee Note 2)
SRCLR low before RCK t

th
TA

Hold time
Operating free-air temperature

SER after SRCK t

0.8

V
V

-1

5.5
-1

-1

-2.6

8
12

16
24

mA

20

MHz

0.7
5.5

twISRCLR) Duration of shift clear pulse, low level

20

20.
40
40
0
-55

V

2

0
25

0

...J
....
....

ns

ns

40
O·
125

mA

C

ns
70

°c

NOTE 2: This setup time ensures the register will see stable data from the shift-registe~ outputs. The clocks may be connected together, in
which case the storage register state will be one clock pulse behind the shift register.

-1.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1155

TYPES SN54LS595, SN54LS596, SN74LS595, SN74LS596
8-BIT SHIFT REGISTERS WITH OUTPUT LATCHES
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
'LS595 Q
VOH
IOH

QH'
'LS596 Q
Q

VOL
QH'

Vee = MIN,

II =-18 mA

Vee = MIN,

VIH=2V,

IOH =-1 mA

Vee = MIN,

IOH =-1 mA
VIH=2V,

SN74LS'

TYP* MAX
-1.5

2.4

3.2

2.4

3.2

IOH =, - 2.6 mA

VIL = MAX
Vee = MIN,

MIN

VIL = MAX,
VOH = 5.5 V
IOL=12mA

VIH=2V,

MIN

IOL =8 mA

MAX
-1.5

2.4

3.1

2.4

3.2

0.1
0.4

0.25

0.1
0.35

0.4
0.5

0.25

0.4

0.25

0.4

0.35

0.5

IOL = 16mA

UNIT
V
V

0.25

IOL = 24 mA

VIL = MAX

TYP*

mA

V

IOZH

'LS595 Q

Vee = MAX, VIH=2V,

VIL = MAX,

VOH=2.7V

20

20

IlA

IOZL
II

'LS595 Q

Vee = MAX, VIH=2V,

VIL = MAX,

VOH = 0.4 V

-20

-20

0.1

0.1

IlA
mA

Vee - MAX, VI-7V
Vee - MAX, VI-2.7V

IIH
SER
IlL

All others
'LS595 Q

IOS§
leeH
leeL

II

SN54LS'

TEST CONDITIONS t

Icez

QH'
'LS595
'LS596

Vee = MAX, VI =0.4 V

20

20

-0.4

-0.4

-0.2
-30

Vee = MAX, Vo=OV

-20

-0.2

-130

-30

-100

-20

50

-100

33
30

45

33
30

50
45

'LS595

Vee = MAX,
All possible inputs grounded,

42

65

42

65

'LS596

All outputs open

36

55

36

55

44

65

44

65

'LS595

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended opera,tln g conditions.
t All typical values are at Vee = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

-I
-I

r-

C

m

!5
(")

m
en

3-1156

-130

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

IlA
mA
mA
mA
mAo
mA

TYPES SN54LS595, SN54LS596, SN74LS595, SN74LS596
8-BIT SHIFT REGISTERS WITH OUTPUT LATCHES
switching characteristics, Vee
PARAMETER
tPLH

FROM

TO

(INPUT)

(OUTPUT)

SRCKt

tpHL
tpLH

RCK t

tpHL
tpZH
tpZL
tpHZ

= 5 V, TA = 25°e

G~

Gt

tpLZ

QH'

(see note 3)

TEST CONDITIONS
RL = 1kn,

CL = 30 pF

RL=667n,

CL = 45 pF

'LS595
MIN

TYP

MAX

12

18

14

21

ns

17

25

20

30

ns

QA thru QH

tpLH

Gt

QA thru QH

tpHL

G"l

QA thru QH

tpHL

SRCLR t

QH'

RL=667n,

CL = 5 pF

RL=667n,

CL=45pF

RL = 1 kn,

CL = 30 pF

MIN

UNIT

MAX

QA thru QH

QA thru QH

'LS596

TYP

12

18

28

42

ns

24

35

24

35

ns

20

30

ns

25

38

ns

20

30

ns

25

38

ns

24

35

40

60

ns

25

38

ns

24

35

ns

NOTE 3: See General Information Section for load circuits and voltage waveforms.

.'11
\n
w

u
>
w
C

-.oJ

....
....

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1157

II
-I
-I
r-

om
S
(")
m

rn

3-1158

TYPES SN54LS597, SN54LS598, SN74LS597, SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES
02635, JANUARY 1981-REVISED DECEM8ER 1983

•

SN54LS597 •.. J PACKAGE
SN74LS597 ... J OR N PACKAGE

a-Bit Parallel Storage Register Inputs
('LS597)

(TOPVIEWI

Parallel3-State 1/0, Storage Register
Inputs, Shift Register Outputs ('LS598)
•

B

VCC
A

C
0
E
F
G
H
GNo

Shift Register has Direct Overriding Load
. and Clear
Guaranteed Shift Frequency ... DC to 20
MHz

SER
SRLOAo
RCK
SRCK
SRCLR
°H'

description
The 'LS597 comes in a l6-pin package and consists of
an 8-bit storage latch feeding a parallel-in, serial-out
8-bit shift register. Both the storage register and shift
register have positive-edge triggered clocks. The shift
register also has direct load (from storage) and clear inputs.

SN54LS597 ••. FK PACKAGE
SN74LS597 ... FN PACKAGE
(TOPVIEWI
U

III

3 2

The 'LS598 comes in a 20-pin package and has all the
features of the 'LS597 plus 3-state I/O ports that provide parallel shift register outputs and also has
multiplexed serial data inputs.

u
Z

tl

> «

1 2019
18

SER

17

SRLOAo

16

NC

15

RCK

14

SRCK

9 1011 1213
:I: 0
Z

U
Z

J::la:

0

t!l

..J

~

SN54LS598 .•. J PACKAGE
SN74LS598 .•. OW, J OR N PACKAGE
(TOP VIEW)
AlOA
BlOB

VCC
os

en

C/OC

SERO
SERI

u

0 / 00

G

E/OE
F/OF
G/OG
H/OH

RCK
SRCKEN

SRLOAo
GNo

10

11

w

:>w

SRCK

C

SRCLR

...J

OH'

lI-

SN54LS598 ••. FK PACKAGE
SN74LS598 ... FN PACKAGE
(TOP VIEW)

3 2

1 2019

0/0 0
E/OE
F/OF

6

G/OG
H/OH
9 1011 1213

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~nndea::s~~rl~ar~liu:~Ot~~~f~~nof~~f:~~~':iIe~~;s~

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1159

TYPES SN54LS597, SN54LS598, SN74LS597, SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES
schematics of inputs and outputs
EQUIVALENT OF SERIAL ANO
A THRU H INPUTS

EQUIVALENT OF SRCK INPUT
('LS598 ONLY)

EQUIVALENT OF ALL OTHER INPUTS

VCC--'-Req
VCC1ij

Req

INPUT

INPUT ....-f....--1>-

SERIAL: Req
A thru H: Req

= 20 kn
= 25

kn

__

('LS597) RCK, SRCK: Req - 10
('LS598) RCK: Req - 10
ALL OTHER: Req = 13

NOM
NOM

TYPICAL OF QA THRU QH OUTPUTS
('LS598 ONLY)

TYPICAL OF QH' OUTPUTS
---...-VCC

VCC

OUTPUT

OUTPUT

II
-t
-t

r-

C

m

logic symbols

<
(")

'LS598
'LS597

m
tJ)

.....-~~--4

(9)

Ow

(11) Ow

Pin numbers shown on logic notation are for ow, J or N packages.

3-1160

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

kn
kn
kn

NOM
NOM
NOM

TYPES SN54LS597, SN74LS597
a-BIT SHIFT REGISTERS WITH INPUT LATCHES
logic diagram (positive logic)

'LS597

SER (14)

A (151

8

c

111

(2)

B

D (3)

en
w

U

:>W

E (4)

C
..J

lI-

F (5)

G (6)

H(7)

Pin numbers shown on logic notation are for J or N packages.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1161

TYPES SN54LS598, SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES
logic diagram (positive logic)

G (16)
~~(1~2)~

'LS598

______________________

~

B/0 8(2)

II

C/Qc(3)

-I
-I

r-

0/ 0 0(4)

C

m

<

(")

m
en

E/OE (5)

F/OF(S)

G/00.-(7..:..)...._-+..........

3-1162

"11

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS597, SN54LS598, SN74LS597, SN74LS598
a-BIT SHIFT REGISTERS WITH INPUTlATCHES
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) .................. ; ................ .' ........................... 7 V
I nput voltage (excluding I/O ports) .............................................................. 7 V
Off-state output voltage (including I/O ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS597, SN54LS598 ............................ - 55°C to 125°C
SN74LS597, SN74LS598 ............................... , oOe to 70°C
Storage temperature range .......................................................... - 65°C to 150°C
NOTE1: Voltage values are with respect to the network ground terminal.

recommended operating conditions
SN54LS'

VCC

Supply voltage

VIH

High-level input voltage

SN74LS'

MIN

NOM

MAX

MIN

4.5

5

5.5

4.75

2

NOM

MAX

5

5.25

Low-level input voltage

0.7

0.8

High·level output current

°H'
0A thru 0H, 'LS598 only

-1

-1

IOH

-1

- 2.6

Low-level output current

8

16

IOL

°H'
0A thru OH, 'LS598 only

12

24

fSCK

Shift clock frequency

I high

SRCK
tw

tsu

Pulse duration

Setup time

I low

20

0

15

15

35

35

RCK

20

20

SRCLR

20

20

SRLOAD

40

40

Data before RCK t

20

20

DS before SRCK t ('LS598 only)

30

30

SRCKEN low before SRCK t ('LS598 only)

20

20

SRCLR inactive before SRCK t

25

25

SRLOAD inactive before SRCK t

30

30

RCK t before SRLOAD t (see Note 2)

40

40

SER before SRCK t

20

20

0

0

th

Hold time

TA

Operating free-air temperature

- 55

125

0

NOTE 2: The RCK t before SRLOAD t setup time ensures the data saved by RCK t will also be loaded into the shift register.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

V
V

2

VIL

0

UNIT

20

V
rnA

rnA
MHz

ns

11
ns

en
w
U

>
w
ns
70

°c

C

-J

lI-

3-1163

TYPESSN54LS597,SN54LS598,SN74LS597,SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VOH

Vee= MIN,

'LS598 Q

TYPt

IOH = -1 mA

2.4

3.2

2.4

3.2

IOH = - 2.6 mA
IOH = -1 mA

Vee= MIN,

VOL

VIH=2V,

QH
'LS598 Q

IOZL

'LS598 Q

Vee- MAX,

0.25
0.25

VIH - 2 V,

VIL - MAX,

VIH - 2 V,

VIL - MAX,

Vee - MAX,

Vee= MAX

SER, A Thru H
'LS598 Q

~
~

0.4

0.5

0.25

0.4

0.35

0.5
20

IlA
mA

VI = 7 V

0.1

0.1

20

20

- 0.8

-0.8

VO= OV

Vee= MAX,

QH

- 0.4

- 0.4

-0.2

-0.2

-30

-130

- 30

-130

- 20

- 100

- 20

-100

35

53

35

~

Vee= MAX,

35

53

35

53

~

All possible inputs grounded,

45

68

45

68

All outputs open

54

80

54

80

56

85

56

85

leeH

~
leez

t

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at Vee = 5 V, TA = 25°e
§Not more than one output should be shorted at a time and the duration of the short-circuit should not exceed one second.

t

C
m

:::

n
m
en

3-1164

~

TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

V

. 20

0.1

VI = 0.4 V

Vee= MAX,

V

0.4

0.35

- 0.4

Others

r

0.25

0.4

UNIT

V

0.1

'LS598 SReK

'LS598

3.1
3.2

-0.4

VI = 2.7 V

Vee= MAX,

IIH

lee

2.4
2.4

VI = 5.5 V

Va = 0.4 V

Others

'LS597

MAX

Va = 2.7 V

'LS598 Q

IOS§

TYPt

-1.5

IOL = 16 mA

IOZH

IlL

MIN

IOL = 24 mA
IOL=8mA

VIL = MAX

MAX
-1.5

IOL=12mA

'LS598 Q

II

VIH = 2 V,

VIL = MAX

QH'

MIN

11=-18mA

Vee= MIN,

VIK

SN74LS'

SN54LS'

TEST CONDITIONSt

PARAMETER

mA
IlA
mA

mA

53
mA

TYPES SN54LS597, SN54LS598, SN74LS597, SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES

switching characteristics, Vee
PARAMETER

= 5 V, TA = 25°e, (see note 3)

FROM

TO

(INPUT)

(OUTPUT)

'LS597

TEST CONDITIONS

MIN

TYP

20

35

'LS598
MAX

MIN

TYP

20

35

MAX

UNIT

f max

SRCK

tpLH

SRCK t

QH'

15

23

11

17

ns

tpHL

SRCK t

QH'

20

30

15

23

tPLH

SRLOAD

~

QH'

38

57

28

42

ns
ns

tpHL

SRLOAD

~

QH'

29

44

20

30

ns

tpHL

SRCLR

QH'

24

36

18

27

tPLH

RCK t

41

60

32

48

32

48

24

36

ns
ns
ns
ns
ns

~

RL

= 1 kn,

QH'

RL - 1 kn,
SRLOAD

CL

= 30 pF

CL - 30 pF

=L

MHz

tPHL

RCK t

QH'

tpLH

SRCK t

Q

12

18

tpHL

SRCK t

Q

19

28

tpLH

SRLOAD

~

Q

32

48

ns

tPHL

SRLOAD

~

Q

27

40

ns

tpHL

SRCLR

Q

25

38

tpZH

G~

Q

26

31

tpZL

G~

Q

29

43

tpHZ

Gt

Q

25

38

tpLZ

Gt

Q

20

30

ns
ns
ns
ns
ns

~

RL

RL

= 667 n,

= 667n,

CL

CL

= 45 pF

= 5 pF

NOTE 3: See General Information Section for load circuits and voltage waveforms.

II
en
w
U

>
w
C

-l

tt-

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1165

TYPES SN54LS597, SN54LS598, SN74LS597, SN74LS598
8-BIT SHIFT REGISTERS WITH INPUT LATCHES
typical operating sequences
'LS597

~

SRCLR

LJ

SRLOAO
SRCK

______

RCK

~fl~

__ __________ __________________
~

~

SER
A

IOON'T CARE'A

vmmOZOllwmOZZOlmZ OON ,. cARE/77717771777777OZmm7l7/722

B

ZOON,. CARE3

vOZIOWllWIOZIll71777717/,oON'T CARE WmmmlllWIIIWll7l717 ,

C

~

vW7711mWOmlOmOOZZ DON,. cAREmZZIOOIlOoooomOmz

0

ZOON'T

CARE'~

wowmZZOZlOozwmo DON,. cAREIWmlmlOZOmlOOmm

E

lOON,. CARE'Ii

vllOomzmlZmllWmll!U0oN'T cARElIIOI07IlOllOllllOOmW

F

ZOON,.

CARE'~

wIozmomlOVlOlO7lzt ooN 'T cAREOOO7lIOO/lllI0000Wa

G

~

H

ZOON"CARE~

QW

11
-f
-f

'LS598

G
SRCLR

SRCK

C

SRCKEN

~

--1

U

SRLOAO

r-

m

~

RCK

f1~

______________________________

n

os

yamo.OON'T CARE ZZZZOZZ71

(J)

SER 0

IlIlala OON'TCAREZZIZlIII?

m

SER 1

WOON,. CARE

I,

vZlZlIZZlIZlOON'TCARE I,
WOON,. CARE 7J

A/QA
B/QB

C/Qc
O/Qo
E/QE
F/QF
G/QG

H/QH

~

0H'
~OUT. k

~ INPUTk k
PUT+j HI·Z j+ ~HI.Zj+

3-1166

. TEXAS

SHIFT&OUTPUT------+1'",

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS
02547, JANUARY 1981-REVISED JUNE 1983

SN54LS' ... J PACKAGE
SN74LS' ... OW, J OR N PACKAGE
(TOPVIEWI

o

BUSY

Controls Refresh Cycle of 4K, 16K, and
64K Dynamic RAMs'

o

Creates Static RAM Appearance

o

Choice of Transparen't, Cycle Steal, or
Burst Refresh Modes

o

3-State Outputs Drive Bus lines Directly

o

Critical Times Are User RC-Programmable
to Optimize System Performance

AO

1

20

VCC
RC BURST

A1

SEE TABLE

A2

SEE TABLE

A3

HOLD

A4

RAS

A5

REF REG2

A6

REF REGl

SEE TABLE

RC RAS La

GND

RC RAS HI

FOR CHIP CARRIER INFORMATION
CONTACT THE FACTORY

SELECTION TABLE
PIN ASSIGNMENTS
DEVICE

REFRESH MODES

MEMORY SIZE

'LS600A

Transparent, Burst

4K or 16K

'LS601A

Transparent, Burst

'LS602A

Cycle Steal, Burst

'LS603A

Cycle Steal, Burst

64K

PIN 9

PIN 17

PIN 18

4K/16K

LATCHED RCa

RESET LATCHED RCa

64K

A7

LATCHED RCO

RESET LATCHED RCO

4K or 16K

4K/16K

READY

RC CYCLE STEAL

A7

READY

RC CYCLE STEAL

description
The 'LS600A thru 'LS603A memory refresh controllers contain one 8-bit synchronous counter, nine 3-state buffer
drivers, four RC-controlled multivibrators, and other control circuitry on a single monolithic chip. These devices are
designed to provide RAS-only refresh on 4K, 16K, and 64K dynamic RAMs. The 'LS600A and 'LS601 A provide
transparent refresh while the 'LS602A and 'LS603A provide cycle-steal refresh. In addition, a burst-mode timer is
provided to warn the CPU that the maximum allowable refresh time is about to be violated.

operating modes
In the transparent refresh mode ('LS600A or 'LS601 A), row-refresh cycles occur only during inactive CPU-memory
times. In most cases the entire memory refresh sequence can be completed "transparently" without interrupting CPU
operations. During idle CPU-memory periods, the REF REO pins should be taken high so as many rows as possible
can be refreshed. A low from BUSY will signal the CPU to wait until the end of that current row refresh before reinstating
operations. If all row addresses have been refreshed before the burst-mode timer expires, the burst-mode timer will reset.

II
en
w
U

>
w

C

-I
If the maximum allowable refresh time of the dynamic RAM is about to be exceeded, the burst mode timer will expire
causing the HOLD pin to go low. This signals the CPU that a burst-mode refresh is manadatory and the burst-mode
refresh will be accomplished when the CPU takes the REF REO pins high. To ensure that all rows are refreshed, the
address counter is reset to zero whenever the burst-mode timer expires. After the last row has been refreshed, the
HOLD pin will return high, and the burst-mode timer will reset. The CPU can then return to normal transparent operation.

....
....

A LATCHED RCO output pin is also provided on the 'LS600A and 'LS601 A to detect when the last row has been
refreshed. Upon seeing a RCO from the address counter, the LATCHED RCO output will be set high. This latch is
reset by providing a high-going pulse on the RESET LATCHED RCO input.
In the cycle-steal refresh mode (,LS602A or 'LS603A), refreshing is accomplished by dividing the safe refresh time
into equal segments and refreshing one row in each segment. The segment time is programmed via the RC CYCLE
STEAL input and will produce a low level on the READY output at the end of each segment period. This indicates
to the CPU to suspend operations for one memory cycle for a row refresh. In effect it "steals" one memory cycle
from the CPU. After the CPU recognizes the cycle-steal signal from the READY output, it must take both REF REO
pins high. These devices will then refresh one row and return control back to the CPU by taking READY high. The
burst-mode timer is also provided to prevent exceeding the maximum allowable refresh time, and operates in the same
manner as in ~he 'LS600A and 'LS601 A. In applications where the burst-mode timer is not required, it can be disabled
by connecting the RC Burst input to ground.
Copyright ©' 1983 by Texas Instruments Incorporated

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea~~S':a~rl~ar~liu~~Ot~~~I~~nof~~f~~~~n~e~~~:'

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1167

TYPESSN74LS600A, SN74LS601A
MEMORY· REFRESH CONTROLLERS
'LS600A
r -________- .________________________~~~------~(~15~)

AM

EN

~----------~~~~~----~(~1) ~

RCRASHI~(~II~)__~--------------_+~
RCRASLO~(~12~)__~----_,

4K/16K

-+-+-i

...:(9;,;..)

RC BURST ...:(.;.:19.;..)-:l*-~

L::~~!D ...:(_18.;..)- - - i ;:>O-----------------------------------------------d
RCO

II
-t
-t
rC
m

!5

'LS601A
r----------.------------------------~~~---------'~AM
~----------4_~~~------~~

RC RSH LO .;..;.::'---~:__----.,

REF REOI

n

m

CJ)

RC BURST .:.(1:.::9.:...)-:l*--i

L::~~!D .:.'1:.;:8:...)--~ ~o_----------------------------------------------d
RCO

Pin numbers shown on logic notation are for DW, J or N packages.

3-1168

RCO

-1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 •

DALLAS. TEXA~ 75265

TYPES SN74LS602A, SN74LS603A
MEMORY REFRESH CONTROLLERS
'LS602A
r -________~----------------------~~~------~ll~51 RAS
EN

>---------41..-....... ~o_-------'I.;:.1I liiJSV

RCRASHI~I~II~I~~--------------+o
RC~LO~ll~2~1~~----~

4K/16K ~19;..;..1-+---+--I

~--_e~--------~_+----.... /o-----.;...11~61 ~
RC BURST ...:..11;.;;,9;.,.1~f--i

R;~:~~E

. . ;.1,;.;;18.;. .1-:J~""

......

~--

'LS603A

.--_______~---------------------___I ~~---..:1..:,.:15::..1 RAS
>-------411--__-1 ~o_---'I:..;:.lI

RCRASHI....;.I~II~I~~_____________4-,

BUSY

II
en
w
CJ

RC~LO...:..ll~2;...1-:J~_--~

>
w
C

......
..J

. . "",:0-_ _....:1.:,.:16::,.1 HOLD

~-------------~H--RC BURST

..:..11~9;...1~f-""

Pin numbers shown on logic notation are for DW, J or N packages.

,. TEXAS"

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1169

TYPE.S SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS

PIN FUNCTION TABLE
PIN

PIN NAME

FUNCTIONAL DESCRIPTION

1

BUSY

Active output indicates to the CPU that a refresh cycle is in progress.

16

HOLD

Active output should be a priority interrupt to the CPU for emergency burst refresh.

15

RAS

3-state output row address strobe.

11

RC RAS HI

Timing node for high-level portion of RAS. See Note 1.

12

RC RAS La

Timing node for low-level portion of RAS. See Note 1.

2-8

AO thru A6

3-state output row address lines.

9

A7

MSB row address line for 'LS601A and 'LS603A (64K-bit memory controllers).

9

4K/16K

A high input level disables the AS row address line for 'LS600A and 'LS602A. (The highlevel input makes the count chain 5 bits long while the low-level makes the count chain 6
bits long.)
17

READY

17

LATCHED RCa

Normally high-level, will latch low upon RCa of counter ('LS600A or 'LS601A).

18

RC CYCLE STEAL

Timing node that controls the READY output ('LS602A and 'LS603A). See Note 1.

18

RESET LATCHED

Normally high-level, when pulsed low the LATCHED RCa output will be reset ('LS600A and

Interrupt to CPU for cycle steal refresh ('LS602A and 'LS603A).

'LS601A).

RCa
19

RC BURST

13,

REF REQ1,

14

REF REQ2

20, 10

Vr.r.,GND

Timing node for burst refresh. See Note 1.
High level on both pins starts and continues row refresh. Low on either pin inhibits refresh.
5-V power supply and network ground pins.

All timing nodes require a resistor to Vee and a capacitor to GND.

NOTE 1:

schematics of inputs and outputs

II
-t
-t

EQUIVALENT OF REF REQ, 4K/16K,

TYPICAL OF RAS AND A

TYPICAL OF BUSY, HOLD, READY

AND RESET LATCHED RCO INPUTS

OUTPUTS

AND LATCHED RCO OUTPUTS

Vee

r-

----4---

---4~-

Vee

C
m

Vee
120!2NOM

REQ
INPUT--~~~~-,-

.<
n

OUTPUT

m

en

" - - - . - - OUTPUT

REF REO: Req = 20 kH NOM
4K/i6K:
Req = 30 kH NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ooe to 70 0 e
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150 °e
NOTE 2:

3-1170

Voltage values are with respect to network ground terminal.

TEXAS

"'-110

INSTRUMENTS

POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS

recommended operating conditions

Supply voltage, VCC
High-level output current, 10H
Low-level output current, 10L

MIN

NOM

MAX

4.75

5

5.25

V

-2.6

mA

-400

p.A

A,RAS
All others
A,RAS

24

All others

8

High, tSHSL

75

Low, tSLSH
Duration of RESET LATCHED RCO pulse, tRHRL

35

Duration of REF REQ pulse during CYCLE STEAL operation, tQHQL

20

Duration or RAS output pulse t

External timing resistor, Rext

1

RC BURST, RC CYCLE STEAL

1
0

Operating free-air temperature, T A
tMaximum operating

fre~uency for the address counter·corresponds to its minimum

mA
ns

75

RC RAS LO, RC RAS HI

UNIT

ns
ns
6.
1000
70

kO

°c

period, which is the sum of tw(RAS-H) min and tw(RAS-L) min.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONS

VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage
High-level output

VOH

voltage

Low-level output
VOL

voltage

MIN

TYP;

All Others
A,RAS

Vee = 4.75 V,
VIH = 2 V,
VIL = 0.8 V
Vee = 4.75 V,
VIH = 2 V,

All Others

VIL = 0.8 V

A,RAS

Vee = 5.25 V
REF REQ at

10H = -2.6 rnA
10H = -400 p.A

UNIT
V

VCC = 4.75 V, II = -1.8 mA
A,RAS

MAX

2

2.4

2.9

2.7

3.1

0.8

V

-.1.5

V
V

10L = 12 mA

0.25

0.4

10L = 24 mA
10L = 4 mA

0.35
0.25

0.5
0.4

10L = 8 mA

0.35

0.5

V

en
w

Off-state output
10ZH current, high-level
voltage applied
Off -state output

VIL = 0.8 V

10ZL current, low-level
voltage applied
II

Vo = 2.7 V

20

p.A

Vo = 0.4 V

-20

p.A

Vee = 5.25 V,

VI = 7 V

IIH

High-level input current

Vee = 5.25 V,

VI = 2.7 V

IlL

Low-level input current

Vee = 5.25 V,

VI = 0.4 V

lee

CJ

>
w
C
..J

Input current at maximum
input voltage

lOS

II

Short-circuit

A,RAS

output current §

All others

Supply current

Vee = 5.25 V

mA

20
-0.4

mA

-30

-130

-20

-100

Vee = 5.25 V, Re RAS LO and
REF REQ at

0.1

aV

50

85

JJ-

p.A

mA
mA

tAli typical values are at Vee = 5 V, TA = 25°e.
§Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1171

TYPES SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS
switching characteristics,

Vee

25°e,

5 V, TA

PARAMETER

FROM (INPUT)

TO (OUTPUT)

tOHBL

REF REal

BUSY

tSLBH T

~I

BUSY

tOHSV

REF REal

RAS

tSHSZ t

RASI

RAS

tOHAV
tSHAZ T

REF REOI

ADDRESS

RASI

ADDRESS

RESET LATCHED

LATCHED

tRHCL

TEST CONDITIONS
CL

=

1 5 pF, RL

=

MIN

2 kO

= 320 pF, RL = 6670
CL = 5 pF, RL = 6670
CL = 160 pF, RL = 6670
CL = 5 pF, RL = 6670

CL

RCOI

RCO

tSHYH
tSLSH 1

RASI

READY

RASI

RAS

tSHSL t

RASI

RAS

tDHDL §

HOLDI

HOLD

tYLYL"

READY I

READY

t Depends on
t Depends on
§ Depends on
I Depends on
NOTE 3: See

see note 3

CL

=
=

CL
CL

15 pF, RL

320 pF, RL

=

15 pF, RL

=
=
=

2 kO

6670
2 kO

TYP

MAX

30

45

ns

245

300

ns

47

70

ns

245

300

ns

38
245

65

ns

300

ns

37

55

ns

64

85

ns

210

UNIT

ns

245

ns

3.56

ms

27

/-Is

RC network at pin 11 (4 kll, 200 pF used for testing).
RC network at pin 12 (4 kll. 200 pF used for testing).
RC network at pin 19 (680 kll, 0.022 I'F used for testing).
RC network at pin 18 (10 kll. 0.01 I'F used for testing).
General Information Section for load circuits and voltage waveforms.

explanation of letter symbols

II

This data sheet uses a new type of letter symbol to describe time intervals. The format is:
tAB-CD
where:

-I
-I

r-

o
m
S

o

'm

en

subscripts A and C indicate the names of the signals for which changes of state or level or establishment of
state or level constitute signal events assumed to occur first and last, respectively, that is, at the beginning
and end of the time interval.
Subscripts Band D indicate the direction of the transitions and/or the final states or levels of the signals represented
by A and C, respectively. One or two of the following is used:
H
L
V
X
Z

= high or transition to high

= low or transition to low
= a valid steady-state level
= unknown, changing, or "don't care" level
= high-impedance (off) state.

The hyphen between the Band C subscripts is omitted when no confusion is likely to occur. For these letter symbols
on this data sheet, the signal names are further abbreviated as follows:

3-1172

SIGNAL

A or C

NAME

SUBSCRIPT

BUSY

B

HOLD
RAS

D

AO - A7

A

READY

Y

LATCHED RCO

C

S

RESET LATCHED RCO

R

REF REO

a

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS
TIMING DIAGRAMS
REF REQIQ)

V

\'-----

_----IT

I---t- tQHBL

BUSYIB)

---I-~

""\

I
~,----------------------------~---'
~tQHSV..j
RASIS) -------~

I

I

tQHAV~
AO-A7IA)

tSLSH-!---.j

tSHAZi-=-!

X,.....--X'-__D--

----~CX

FIGURE 1 - TRANSPARENT REFRESH

tr--------.. .,
r
I
!
0,-___
1/
\ ____

"","-------tYLYL----------.lI\
ReADvIY) , " -_ _ _.......

tQHQL~

REF REQIQ)

~
I

1\

BUSYIB)

tQHSV -*---I
RASIS)

---j

!-'tSHYH

------~---------~-------~

II

AO-A7IA) - - - - - - - . (
FIGURE 2 - CYCLE STEAL REFRESH

I"

f

HOLDID)\
MCPU RESPONSE TlME*
REF REQIQ)

BUSYIB)

en

tDHDL-------..-jI,_---------

I

\""'_____

w

(.)

>
w

C

...J

lI-

\~------~~--------~I

RASIS)

>(

A O - A 7 I A ) - - - - C J (_ _......

LATCHED
RCOIC) _ _ _ _ _ _ _ _ _ _ _ _ _ _--1
RESET
RCOIR) _________________--1:

:=x__. .D-----t

t-tRHCL

I
~---------....J

I

I

~

~:

_______________.......T

L-

~ During testing, an 'LS04 is used to invert iiOIi) to provide the REF REO input,

FIGURE 3 - BURST MODE REFRESH

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1173

TYPES SN74LS600A THRU SN74LS603A
MEMORY REFRESH CONTROLLERS
TYPICAL CHARACTERISTICS
PULSE DURATION, RAS LOW

CYCLE STEAL REFRESH CYCLE TIME

vs

vs

EXTERNAL TIMING RESISTOR

EXTERNAL TIMING RESISTOR

500.-----,----.-----.-----.-----.
~

=Vee - 5 V
=TA = 25°e

11>

~ 400r-----r----4-----4-----+----~
o

...I

I~c

100

t

Vee= 5 V
TA = 25°e

E

/

50

j::

,It

/

11>

U

>

(J

300r-----r----4-----4--~-+--~~

o
.;:
ctJ

iii
11>
ti)

:i

U

II

5

11>

Q.

>
(J

I
J:

~ 100~~~r---~~~-4-----+----~

/

I

...I

>
...I

!9

/

~

1

1

2

4

3

5

6

/

J
II

V

/

II

1/

/

/

1/

/

/

[\

\ X V
~

1/

/

J.

./
/

2

0

V

II

10

0::

:;
~ 200r-----r---~L-~~-----+----~

jI~

20

-5
~11>

y

/

..

/

O.OlIlF
e = 0.0051lF
e = O.OOlIlF
-e = 500 pF
~e =

II III

V

1.

Rext-Timing Resistor-kU

10
100
Rext-Timing Resistor-kU

FIGURE 4

FIGURE 5

-~

PULSE DURATION, RAS HIGH

PULSE DURATION, BURST REFRESH

r
C

vs

vs

EXTERNAL TIMING RESISTOR

EXTERNAL TIMING RESISTOR

I

~

500

m
~

(")

m

en

E
I

c'"

1

CI

-5
~11>

400

J:

0::
~

(I)

q:
0::,

c

:;

300

c'
~

~

Vee = 5 V
TA = 25°e

5r----r--~r---4_--~----4_--~

4r---~--_+----~~~

3r----r~~----+_---4----+_--~

ctJ

:;

::I

5:

6r---~--~~--~--~----~--~

a:l

0
.;:

C

200

c

5:

:i
Q.
I

:i
Q.
I

~ 100

2 1-----+----r---=-----i""'=----1-

...I

C
J:

J:

!9

e
O~--~--~----~--~----~--~

0
1

2

3

4

5

6

400

500

Rext-Timing Resistor-kU

600

700

800

Rext-Timing Resistor-kU

FIGURE 6

3-1174

1000

FIGURE 7

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

900

1000

TYPES SN54LS604 THRU SN54LS607, SN74LS604 THRU SN74LS607
OCTAL 2-INPUT MULTIPLEXED LATCHES
02545, JULY 1979 -

REVISED-DECEMBER 1983

(TIM99604 THRU TIM99607)
SN54LS604thru SN54LS607 ... JD PACKAGE
• Choice of Outputs:
SN74LS604thru SN74LS607 ..• JD OR N PACKAGE
Three-State ('LS604, 'LS606)
(TOP VIEW)
Open-Collector ('LS605,'LS607)
• 16 D-Type Registers, One for each Data
Input
• Multiplexer Selects Stored Data from
Either A Bus or B Bus
• Application Oriented:
Maximum Speed ('LS604, 'LS605)
Glitch-Free Operation ('LS606, 'LS607)
description
The 'LS604 through 'LS607 multiplexed latches are
ideal for storing data from two input buses, A and B,
and providing the output bus with stored data .from
either the A or B register.
The clock loads data on the positive-going (low-level
to high·level) transition. The clock pin also controls
the active and high-impedance states of the outputs.
When the clock pin is low, the outputs are in the
high-impedance or off state. When the clock pin is
high, the outputs are enabled.

SN54LS604thru SN54LS607 •.• FK PACKAGE
SN74LS604 thru SN74LS607 ..• FN PACKAGE
(TOP VIEW)

4

The 'LS604 and 'LS605 are optimized for high-speed
operation. The 'LS606 and 'LS607 are especially
designed to eliminate decoding voltage spikes.

3

2

1

7

CJ)

8

·W

9
10

These functions are ideal for interface from a 16,bit
microprocessor to a 64K RAM board. The row and
column addresses can be loaded as one word from
the microprocessor and then multiplexed sequentially
to the RAM during the time that RAS and CAS are
active.

U

>
w

11
12 131415161718

C

..-t-

....I

The SN54 LS604 through SN54LS607 are characterized for operation over the full military temperature range of-55°C
to 125°C; the SN74LS604 through SN74LS607 are characterized for operation from O°C to 70°C.
FUNCTION TABLE
INPUTS

OUTPUTS

A1-A8

B1-B8

A data

B data

L

A data

B data

H

X

X

X

L

X

X

L

H

B register stored data

X

H

H

A register stored data

X

H

~

X

~

SELECT AlB

t
t

B data

A data
Z or Off

high level (steady state)

L ~ low level (steady state)

irrelevant

Z

Off

~

t

transistion from low to high level

~

Y1-Y8

CLOCK

~

high-impedance state

H if pull-up resistor is connected to open-collector output

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~n::::S~~il~ar~liu~~Ot~~~:!~nof~~f:~~~~e~~:s~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1175

TYPES SN54LS604 THRU SN54LS607, SN74LS604 THRU SN74LS607
OCTAL2-INPUT MULTIPLEXED LATCHES
sch~matics

of inputs· and outputs

EQUIVALENT OF A AND B INPUTS

EQUIVALENT OF CLOCK INPUTS

Vee

Vee --'--22-k-n

EQUIVALENT OF SELECT INPUTS

4 kn
NOM

NOM
INPUT-4"""-+-~~

INPUT

TYPICAL OF ALL OUTPUTS
(' LS604, 'LSG06)

TYPICAL OF ALL OUTPUTS
('LS605, 'LS607)

__ ~OUTPUT

il'OgiC

symbols
'LSG04
'LSG06

-I
-I

r-

AlB (2)

'LSG05
'LSG07

J:[G2

AlB (2)

(1)

J:[G2

(1)

CLK

CLK

C

m

Y1

V1

S
(')

Y2

V2

Y3

V3

en

V4

Y4

V5

Y5

m

V6

V6

V7

V7

VB

VB

Pin numbers shown on logic notation are for JD or N packages.

3-1176

-1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS604 THRU SN54LS607, SN74LS604 THRU SN74LS607
OCTAL 2-INPUT MULTIPLEXED LATCHES
logic diagram (positive logic)
SELECT (1)

AlB
CLOCK (2)
Bl
Al

B2
A2

B3
A3

(4)
(3)

(S)
(5)

(8)

(7)

B4 !10)

A4

B5
A5

BS
AS

(9)

(2S)

II

(27)

(24)

en
w

(25)

(.)
B7
A7

BS

:>w

(22)
(23)

C

...I

(20)

lI-

(21)
AS

~

TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1177

TYPES SN54LS604, SN54LS606, SN74LS604, SN74LS606
OCTAL 2-INPUT MULTIPLEXED LATCHES·WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS604
SN54LS606
MIN
NOM MAX
4.5
5
5.5
-1
12
20
20f
Of
-55
125

Supply voltage, VCC (see Note 1)
High-level output current, 10H
Low-level output current, IOL
Width of clock pulse, tw
Setup time, tsu
Hold time, th
Operating free-air temperature, T A

SN74LS604
SN74LS606
UNIT
MIN
NOM MAX
4.75
5
5.25
V
-2.6 mA
24 mA
20
ns
20f
ns
Of
ns
0
70 °c

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH
VIL
VIK

High-level input voltage
Low-level input voltage
Input clamp voltage

VOH

High-level output voltage

VOL

Low-level output voltage

<

n
m
en

Vce= MIN,
VCC = MIN,
VIL = VIL max,
VCC = MIN,
VIL = VIL max,
VCC - MAX,
VIL '" VIL max,
VCC=MAX,
VIL = VIL max,

1\=-18mA
VIH -2V,
IOH = MAX
VIH =2 V,
VIH = 2 V,
VO=2.7V
VIH =2V,
Vo = 0.4

VCC = MAX,

VI =7V

II
IIH

High-level input current

VCC= MAX,

VI=2.7V

IlL

Low-level input current

VCC = MAX,

VI =0.4 V

lOS

~~f~~-f~~~~:nt §

VCC = MAX

ICC

Supply current

VCC= MAX,

10ZL

-4
-4
rC
m

MIN
2

Off-state output current,
high-level voltage applied
Off-state output current,
low-level voltage applied
Input current at
maximum input voltage

IOZH

EI

TEST CONDITIONSt

SN54LS604
SN54LS606
TYp;J:
MAX

MIN
2

0.7
-1.5
2.4

3.1
0.25

IOL -12mA
10L = 24 rnA

A,a
CLK, SELECT
A,a
ClK,SELECT
A, a
ClK SELECT
-30

See Note 2

55

SN74LSG04
SN74LS606
UNIT
TYP:j:
MAX
V
0.8
V
-1.5
V

2.4

3.1

0.4

0.25
0.35

V
0.4
0.5

V

20

20

jJA

-20

-20

0.1
0.1
20
20
-0.4
-0.2
-130

0.1
0.1
20
20
-0.4
-0.2
-130

-30

70

55

70

'lSG06
TYP
36
16
22
22
27
35
20
15

MAX
50
30
35
35
40
50
30
25

jJA
mA
jJA
rnA
mA
mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
:j:AII typical values are at Vee = 5 V, T A = 25°C.
§ Note more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 2: ICC is tested with all inputs grounded and all outputs open.

switching characteristics, Vee =5 V, TA = 25°e
PARAMETER
tpLH
tPHL
tPLH
tpHL
tPZH
tpZL
tpHZ
tPLZ
tpLH
tpHL
tpzH
tpZL
tpHZ

FROM
(INPUT)
Select AlB
(Data: A = H, a = L)
Select Am
(Data: A = L, a

c.

H)

T~ST

CONDITIONS

CL = 45'pF,
See ~ote 3

Rl = 667.n,

CL c 5pF,
See Note 3

RL = 667.n,

MIN

Clock
Clock

propagation delay time, low-to-hlgh-Ievel output
propagation delay time, low-to-hlgh-Ievel output
output enable time to high level
output enable time to low level
output disable time from high level

output disable ttm@ from h!'N leve!
tpLZ
NOTE 3: See General Information Section for load circuits and voltage waveforms.

3-1178

. TEXAS'"
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

'LS604
TYP MAX
15
25
23
35
31
45
30
19
19
30
28
40
20
30
15
25

MIN

UNIT
ns
ns
ns
ns

TYPES SN54LS605, SN54LS607, SN74LS605, SNr~LS607
OCTAL 2-INPUT MULTIPLEXED LATCHES WITH OPEN-COLLECTOR OUTP'O'fS
recommended operating conditions
SNS4lS60S

SN74lS60S

SNS4lS607
Supply voltage, V CC (see Note 1)

MIN

NOM

4.S

5

SN74lS607

UNIT

MAX

MIN

NOM

MAX

5.5

4.75

5

5.25

V

High-level output voltage, VOH

5.5

5.5

V

low-level output current, IOl

12

24

mA

Width of clock pulse, tw

20

20

ns

Setup time, tsu

20t

20t

ns

Ot

ot

Hold time, th
Operating free-air temperature, T A

-55

125

70

0

ns
°c

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54lS60S
PARAMETER

TEST CONDITIONSt
MIN

VIH

High-level input voltage

Vil

low-level input voltage

VIK

Input clamp voltage
High-level output current

IOH

low-level output voltage

VOL

Input current at

II

maximum input voltage

SN74lS605

SN54lS607
TYP+

2

MIN

TYP+

VCC= MIN,

11=-18mA
VIH=2V,

Vil = Vil max,

VOH = 5.5 V

VCC = MIN,

VIH = 2 V,

V

Vil = Vil max
VCC = MAX,

VI =7V

IIH

High-level input current

VCC= MAX,

VI = 2.7 V

III

low-level input current

VCC = MAX,

VI=O.4V

ICC

Supply current

VCC = MAX,

See Note 2

-1.5
250
0.25

IOl=12mA

MAX

2
0.7

VCC = MIN,

UNIT

SN74lS607

MAX

IOl = 24mA
A,8
ClK, SELECT

0.4

0.8
-1.5

V
V

250

IJ-A

0.25

0.4

0.35

0.5

0.1

0.1

0.1
0.1

A, B

20

20

ClK,SElECT

20

20

A,B

-0.4

-0.4

ClK,SElECT

-0.2

-0.2

40

40

60

60

V
mA
IJ-A

PARAMETER
tplH

(Data: A = H, B = l)

tPlH

Select AlB
(Data: A = l, B = H)

tPLH
tpHL

MIN

Select AlB

tpHl
tPHl

TEST CONDITIONS

Cl=45pF,

Rl=667n,

See Note 3

Clock

'LS605
TYP
MAX

mA

>
w
C

.-.-I

'lS607
MIN

w

U

= 5 V, TA = 25°e

FROM
(INPUT)

en

mA

tFor conditions sho~n as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
NOTE 2: leeis tested with all inputs grounded and all outputs open.

switching characteristics, Vee

II

TYP

MAX

51

70

28

40

28

40

21

30

39

60

28

40

25

40

28

40

27

40

30

45

25

40

32

45

UNIT
ns
ns
ns

tPLH == propagation delay time, low-to-high-Ievel output
tpHL == propagation delay time, low-to-high-Ievel output
NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1179

II
-I
-I
r-

C
m
C")
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3-1180

TYPES SN54LS608, SN74LS608 (TIM99608)
.
MEMORY CYCLE CONTROLLERS
02548, JANUARY 1981 -

•

REVISED DECEMBER 1981

SN54LS608 ... J PACKAGE
SN74LS608 ... D, J OR N PACKAGE
(TOP VIEW)

• Provides Correct Timing for Memory Cycles
- Read Cycle
- Write Cycle
- Read-Modify-Write Cycle
RAS-Only Refresh Cycle

PRECHARGE
PIN
R/Win
RMW
R/Wout
RASEN
RAS
GND

Page or Normal Modes

• Stand-Alone Controller for CPU-to-Memory
Interface
• Also Designed to be Part of a Three-Chip Set
Consisting of 'LS600 thru 'LS603, 'LS604
thru 'LS607, and 'LS608

VCC
RC CAS La
REFRESH
START
RCRAH
ROW/COL
CAS HOLD
CAS

SN54LS608 ... FK PACKAGE
SN74LS608 ... FN PACKAGE
(TOP VIEW)

• RAS Output is 3-State to Share Bus With
'LS600 thru 'LS603

w
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a:
od::

• Critical Times Are User RC-Programmable
to Optimize System Performance

0
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J5

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description

u

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u uu
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c::

The 'LS608 memory cycle controller is designed to
interface between a microprocessor and dynamic RAM
memories. It contains six RS latches, five D-type flipflops, and more than 50 miscellaneous gates on a single
chip. The 'LS608 combines maximum flexibility and
ease of programming via RC nodes to allow optimum
memory cycle performance.

R/Win
RMW
NC
R/Wout
RAS EN

The 'LS608 can operate as a stand-alone interface but it
is also designed to be part of a three-chip memory controller set. The user must select one of the 'LS600 thru
'LS603 refresh controllers and one of the 'LS604 thru
'LS607 multiplexers to use along with the 'LS608
memory cycle controller for complete dynamic RAM
control.

RCRAH
ROW/COL

en ° Ulen\o
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15

:>
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NC - No internal connection

C

After the user has selected and attached RC networks
to pins 1, 12, and 15, the 'LS608 will deliver proper
RAS, CAS, and READ/WRITE output signals to execute one memory cycle as the start input is switched
from low to high. The actual cycle executed will depend
upon steady-state input conditions of the 'LS608 as
indicated in the table below.

....
..J

....
INPUT CONDITIONS

MEMORY CYCLE

READ
WRITE
READ-MODIFY-WRITE

MODE

PAGE

READ
WAITE
READ-MODiFY-WRiTE
REFRESH
EXTERNAL REFRESH

PIN
IN

R/W
IN

RMW

RAS

CAS

START

REFRESH

IN

ENAiii:E

HOLD

IN

IN

H

H
L
H
H

IN
L
L

IN
H

H
H

H
H
L
H

L
L

L
NORMAL

REFRESH

L
L
x
x

L
H
x

H

L

L
x

L

x

x

L
H

H

t
t
t
t
t
t
t

H

x

H
H
H
H
H

L
L
L
L
L
L
H
L

H = High, L= Low, x = Irrelevant, t = low-to-high transition

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to these
specifications per the terms of Texas Instruments

~~~n~ea:~s':a~rt:r~~iu~~Ot~~~f~~nofra~f~~~~~e~~res~

TEXAS

~

INSTRUMENTS
POST OFFiCE BOX 225012 • DALLAS, TEXAS 75265

3-1181

TYPES SN54LS608, SN74LS608
MEMORY CYCLE CONTROLLERS
PIN FUNCTION TABLE
PIN
1
2

RCPRECHARGE

FUNCTIONAL DESCRIPTION
User-programmable timing node" for precharge (CAS high and RAS high),

PIN IN

When high, initiates a ready cycle (holds R/W OUT high) and, when low,

PIN NAME

page mode read or write cycle holds RAS continuously low while CAS and
column addresses are sequenced.
3

RtVVlN

When high, initiates a ready cycle (holds R/iii OUT high) and, when low,
initiates a write cycle (holds R/Vi OUT low) if pin 4 is high and pin 14 is low.
I

4

RMWIN

When low, enables read-modify-write cycle. RtW IN must be high at the start
of the RMW cycle.

5

When high, indicates a read cycle is in progress. When low, indicates a write

R/WOUT

cycle is in progress: Normally ties to a W memory input in a system.
6

RAS ENABLE IN

When low, enables RAS output. When high, RAS is in the high-impedance or
third state.

7

RAS OUT

3-state row-address-strobe output controlled by RAS ENABLE IN. In the
three-chip controller set, the RAS output of the' LS608 ties to the RAS
output of the refresh controller ('LS600 thru 'LS603).

II

8

GND

Device and substrate ground.

9

CAS OUT

Column-address-strobe output.

CAS HOLD IN

When low, allows CAS to latch in low state. When high, latch is removed.

10

Can be used to improve data retrieval during read cycle.
ROW/cor (or

11

M'Ei\ffi'SY) OUT

In a system where the 'LS608 is a stand-alone controller, this output indicates
a memory-busy condition to the microprocessor. When the 'LS608 is used as a
part of a three-chip controller set, this pin ties to the SELECT AlB input of
the multiplexer ('LS604 thru 'LS607) for selecting row and column in
addition to indicating a memory-busy condition to the microprocessor.

12

User-programmable timing node" for row address hold time. (high level at

RC RAH

ROW/COL OUT),
13

START IN

When changed from low to high, initiates a memory cycle.

14

REFRESH IN

When high, enables RAS-only refresh cycle.

15

RCCAS LO

User-programmable timing node" for column-address-strobe lo,w time.

16

VCC

5-volt power supply terminal.

°AII

3-1182

timing nodes require a resistor to

Vee

and a capacitor to ground. Programmed time is approximately 0.29 Re.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

5"

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RC RAH (12)

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ROW/COL

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RAS

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EN

(6)

I

I I

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CAS HOLD 1101+

L;(=\

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CAS

~!TI
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x

RAS

RC PRECHARGE (1)

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REFRESH

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(14)

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MEMORY ADDRESS BUS

MEMORY MAPPER
CPU

MOO-MOll

SYSTEM
MEMORY

OO-D11

DATA AND CONTROL BUS

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~nnd:::s~~rl~ar~liu~~Ot~~~f~~nor~~f~~~~~e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1187

TYPES SN54LS610 THRU SN54LS613, SN74LS610 THRU SN74LS613
MEMORY MAPPERS

functional block diagram (positive logic)

ME

c
I

a L's FOR MOO-M07

ONLY I
'LS610 1
& 'LS6111
HAVE
1
LATCH I

--I~-...,

4

1
~---"'-HH

I
I

I

RAM 16x 12
MAq·MA3---}--+-4+-i

4

RSO.RS3-~t-T---1~_---l

0)

Cl [WRITE)

YCl

I

a

110

1

4

1---J
1
1

4

R/W--...- - - - - l

~---~

10

12

DO.Dll-H-+----...,~1~2~1-~A~,21~D-....!.A:t-f-..,-;r-E---.J

12

r---'

I

0

3" Ai5

1

L __ J

MOO·M07

Moa·MOll

1

'LS612 &
'LS613 FEED
STRAIGHT
THROUGH

12

"LS610 and 'LS612 have 3'state (\7) map outputs.
'LS611 and 'LS613 have open·collector (Q) map outputs.

II
-i
-i

r
C

PIN FUNCTION TABLE
PIN
7-12,

PIN NAME

I/O connections to data and control bus used for reading from and writing to the map register
selected by RSO-RS3 when CS is low. Mode controlled by Rliii.

RSO thni RS3

Register select inputs for I/O operations.

29-34
36,38,1,3
6

R!W

m

:5

(")

m

FUNCTIONAL DESCRIPTION

OOthru 011

Read or write control used in I/O operations to select the condition of the data bus. When high, the
data bus outputs are active for reading the map register. When low, the data bus is used to write into
the register.

5

STROBE

4

CS

CJ)

Strobe input used to enter data into the selected map register during I/O operations.
ehip select input. A low input level selects the memory mapper (assuming more than one used) for
an I/O operation.

35,37,39,2

MAO thru MA3

Map address inputs to select one of 16 map registers when in map mode (Mf.n low and CS high).

14-19,
22-27

MOO thr,u MOll

Map outputs. Present the map register contents to the system memory address bus in the map mode.

13

In the pass moc1e, these outputs provide the map address data on M08-MOll and low levels on
MOO-M07.
MM

Map mode input. When low, 12 bits of data are transferred from the selected map register to the map
outputs. When high (pass mode), the 4 bits present on the map address inputs MAO-MA3 are passed to
the map outputs M08-MOll, respectively, while MOO-M07 are set low.

21

ME

Map enable for the map outputs_ A low level allows the outputs to be active while a high input level
puts the outputs at high impedance.

28

e

Latch enable input for the 'LS610 and 'LS611 (no internal connection for 'LS612 and 'LS6131. A
high level. will transparently pass data to the map outputs. A low level will latch the outputs.

40,20

Vee, GNO

5-V power supply and network ground (substrate) pins_

'.
3-1188

.Ji:J.

'TEXAS 'V
INSTRUMENTS

POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS610 THRU SN54LS613, SN74LS610 THRU SN74LS613
MEMORY MAPPERS

schematics of inputs ,and outputs
INPUT/OUTPUT PORTS, 00-011

EQUIVALENT OF OTHER INPUTS

I/O
PORT

Vee
INPUT

20 kn NOM

MM: Req = 7 kn NOM
RS, STROBE: Req = 9 kn NOM

CS, Rm; MA:

TYPICAL OF MAP OUTPUTS ('LS610, 'LS612)

Req

= 6 kn

nom

TYPICAL OF MAP OUTPUTS ('LS611, 'LS613)

_ _ ~OUTPUT

II
en
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....J

lI-

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
(see Note 1)
' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ,.....
7V
Data Bus I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 V
'All other inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Operating free-air temperature range:SN54LS610 through SN54LS613 . . . . . . . . . . . . . . . . . . _55°C to 125°C
SN74LS610 throughSN74LS613 . . . . . . . . . . . . . . . . . . . . . oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65° e to 150° e

Supply voltage,
Input voltage:

Vee

NOTE 1: Voltage values are with respect to network ground terminal.

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1189

TYPES SN54LS610, SN54LS612, SN74LS610, SN74LS612
MEMORY MAPPERS WITH 3-STATE MAP OUTPUTS

recommended operating conditions
SN54lS610

SN74lS610

SN54lS612
MIN

NOM

4.5

5

Supply voltage

Vee

MO

High·level output current

10H

D

SN74lS612

MAX

MIN

NOM

5.5

4.75

5

UNIT

MAX
5.25

-12

-15

-1

-2.6

12

24

4

8

MO

V
mA

10l

low·level output current

tAvel

e setup time (AV before e low)

30

30

ns

tSLSH

Width of strobe input pulse

75

75

ns

tesLSL

es setup (eS low to strobe low)

20

20

ns

tWLSL

R/W setup time (R/W low to stobe low)

20

20

ns

tRVSL

RS setup time (RS valid to strobe low)

20

20

ns

tDVSH

Data setup time (DO-Dll valid to strobe high)

75

75

ns

tSHeSH

es hold time (Strobe high to es high)

20

20

ns

tSHWH

RIW hold time (Strobe high to R/W high)

20

20

ns

tSHRX

RS hold time (Strobe high to RS invalid)

20

20

ns

tSHDX

Data hold time (Strobe high to DO·Dll invalid)

20

20

ns

TA

Operating free·air temperature

D

I 'LS610 only

See Figure 2

See
Figure 1

-55

125

0

70

mA

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54lS610
PARAMETER

TEST eONDITIONSt

MIN
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage
High-level

VOH

output voltage

low-level
VOL

output voltage

TYP+

MIN

TYP+

11= -18 mA

MO
D
MO
0

Off·state output current,

Vee= MIN,

VIH = 2 V,

VIL = VIL max

VIL = VIL max

All others

2

2.4

2.4
0.25
0.25

VIH=2V,

Vee = MAX,

maximum input voltage

2

10H = MAX

0.4
0.4

10l = 8 mA
Vee = MAX,

0

10H = MAX

10L =4 rnA

V

-1.5

V
V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5
20

20

Vo = 2.7 V

-20

-20

-400

-400

VI = 5.5 V

100

100

VI = 7 V

100

100

VIH=2V,

Vil = VIL max, Vo = 0.4 V
Vee = MAX

0.8
2.4

VIH=2V, 10L = 24 mA

Off-state output current, MO
10ZL low-level voltage applied D

V

IJA
IJA
IJA

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

IJA

IlL

low-level input current

Vee = MAX, . VI = 0.4 V

-0.4

-0.4

mA

lOS

ICC

Short~ircuit

MO

output current§

D

Supply current

Vee = MAX

Vee = MAX

-40

-225

-40

-30

-130

-30

l Outputs high
I Outputs low
I Outputs at high impedance

3-1190

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

-130
112

112

180

112

180

150

230

180

230

All typical values are at Vee = 5 V, TA = 25 e.
more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.

§ Not

·-225

180

112

t For con.ditions shown as MIN or MAX, use tl),e appropriate value specified under recommended operating conditions.

t

V

-1.5
2.4

10l = 12 mA
Vee = MIN,

VIL =VILmax,

Input current at

10H = -3 mA

MAX

2
0.7

Vee = MIN,

UNIT

SN74lS612

MAX

2

10ZH high-level voltage applied

II

SN74lS610

SN54lS612

rnA

180
rnA

TYPES SN54LS610, SN54LS612, SN74LS610, SN74LS612
MEMORY MAPPERS WITH 3-STATE MAP OUTPUTS

switching characteristics, Vee = 5 V, T A = 25°e, eL = 45 pF to GND
PARAMETER

FROM

TO

(INPUT)

(OUTPUT)

TEST CONDITIONS

'LS610
MIN

TYP

'LS612
MAX

MIN

TYP

MAX

UNIT

tCSLDV

Access (enable) time

CSj

D 0·11

28

50

26

50

ns

tWHDV

Access (enable) time

D 0·11

RL~2kn

20

35

20

35

ns

tRVDV

Access time

R/Wt
RS

D 0-11

See Figure 1,

49

75

39

75

ns

tWLDZ

Disable time

R/W,

D 0-11

32

50

30

50

ns

tCSHDZ

Disable time

CSt

D 0·11

42

65

38

65

ns

tELOV

Access (enable) time

ME~

MOO·l1

19

30

17

30

ns

tCSHOV

Access time

cst

MOO-ll

56

85

48

85

ns

tMLOV

Access time

MM~

MOO-l1

25

40

22

40

ns

tCHOV

Access time

MOO-ll

24

40

tAVOVl

Access time (MM low)

Ct
MA

46

70

39

70

ns

tMHOV

Access time

MMt

24

40

22

40

ns

tAVOV2

Propagation time (MM high)

MA

MOO-l1
M08·11

19

30

13

30

ns

tEHOZ

Disable time

MJ:t

MOO-l1

14

25

14

25

ns

See Notes 3 and 4

RL

~

667 n,

See Figure 2,
See Notes 3 and 4

MOO-ll

ns

NOTE: 3. Access times are tested as tpLH and tpHL or tpZH or tpZL. Disable times are tested as tpHZ and tPLZ.
4. See General Information Section for load circuits and voltage waveforms.

explanation of letter symuols
This data sheet uses a new type of letter symbol to describe time intervals. The format is:
tAB·CD
where:

subscripts A and C indicate the names of the signals for which changes of state or level or establishment of state
or level constitute signal events assumed to occur first and last, respectively, that is, at the beginning and end of the
time interval.
Subscripts Band D indicate the direction of the transitions and/or the final states or levels of the signals represented
by A and C, respectively. One or two of the following is used:

II
(J)

W

U

>
w

H = high or transition to high
L = low or transition to low
V = a valid steady·state level
X = unknown, changing, or "don't care" level
Z = high-impedance (off) state.

C

..J

lI-

The hyphen between the Band C subscripts is omitted when no confusion is likely to occur. For these letter symbols
on this data sheet, the signal names are further abbreviated as follows:
AAND C·
SUBSCRIPT

SIGNAL
NAME

C
CS
D
A

C

CS
DO-ll
MAO-MA3
MOO-MOll
ME
MM
R/iN
RSO-RS3
STROBE

Q

E
M
W
R
S

TEXAS

'Ii1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1191

TYPES SN54LS611, SN54LS613, SN74LS611, SN74LS613
MEMORY MAPPERS WITH OPEN-COLLECTOR MAP OUTPUTS
recommended operating conditions
SN74LS6ll

SN54LS6ll

SN74LS613

SN54LS613

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

Vee

Supply voltage

VOH

High-level output voltage

MO

5.5

5.5

IOH

High-level output current

D

-1

-2.6

Low·level output current

12

24

10L

4

8

MO
D

tAveL

e setup time (AV before e low)

tSLSH

Width of strobe input pulse

I 'LS611 only

See Figure 2

V
V
mA
mA

30

30

ns

75

75

ns

tesLSL

es setup time (eS low to strobe low)

20

20

ns

twLSL

R/W setup time (R/W low to strobe low)

20

20

ns

tRVSL

RS setup time (RS valid to strobe low)

20

20

ns

tDVSH

Data setup time (DO-Dll valid to strobe high)

75

75

ns

tSHeSH

es hold time (Strobe high to es high)

20

20

ns

See
Figure 1

tSHWH

R/W hold time (Strobe high to R/W high)

20

20

ns

tSHRX

RS hold time (Strobe high to RS invalid)

20

20

ns

tSHDX

Data hold time (Strobe high to 00-011 invalid)

20

20

TA

Operating free-air temperature

- 55

125

ns

0

70

°e

NOTE 2: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74LS6·ll

SN54LS6l1
TEST eONDITIONSt

PARAMETER

II

MIN
VIH

High-level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage 0

r
C

10H

High-level output current MO

:::;

VOL

-f
-f

m

Low-level output voltage
0
Off-state output

10ZH current, high-level

D

Off-state output current,

II

low-level voltage applied

TYP+

UNIT

MAX
V

0.7

0.8

V

-1.5

-1.5

V

Vee = MIN, VIH = 2 V, VIL = VIL max,
2.4

2.4
100

Vee = MIN, VIH = 2 V, VOH = 5.5 V
IOL" 12mA

0.25

0.4

0.25

0.4

100

Vee = MIN, VIH = 2 V. IOL = 24 rnA
VIL = VIL max

IOL = 4 mA
10L = 8 mA

Vee = MAX. VIH = 2 V, VIL ~ VIL max,

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

20

20

-400

-400

VI = 5.5 V

100

100

VI = 7 V

100

100

IJA

V

Vo = 2.7 V

voltage applied
10ZL

MIN
2

Vee = MIN, 11=-18mA

MO

m

SN74LS613

TYP+ MAX

2

10H = MAX

(')
(J)

SN54LS613

0

Input current at max-

0

imum input voltage

All others

Vee = MAX. VIH = 2 V.
Vo =0.4 V
Vee = MAX

pA

IIH

High-level input current

Vee = MAX. VI = 2.7 V

20

20

IlL

Low-level input current

Vee = MAX. VI = 0.4 V

-0.4

-0.4

mA

-130

mA

Short-circuit output
lOS

lee

current§
Supply current

0

-30

10utputs high

100

170

100

170

Vee = MAX 10utputs low

100

170

100

170

110

200

110

200

10utputs at high impedance
tFor

-130

-30

Vee = MAX

CO~ditions shown as MIN or MAX, use t~e appropriate value specified under recommended operating conditions.

+AII tYPical values are "t Vee = 5 V, T A = 25 C.
§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second .

3-1192

. TEXAS"
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

mA

TYPES SN54LS611, SN54LS613, SN74LS611, SN74LS613
MEMORY MAPPERS WITH OPEN-COLLECTORS OUTPUTS
switching characteristics, Vee

= 5 V, TA = 25°e, eL = 45 pF to GND

PARAMETER

FROM

TO

(INPUT)

(OUTPUT)

TEST CONDITIONS

'LS611
MIN

'LS613

TVP

MAX

31

MIN

TVP

MAX

50

28

50

UNIT

tCSLDV

Access (enable) time

CS~

00-11

tWHDV

Access (enable) time

00-11

RL=2kn,

23

35

21

35

ns

tRVDV

Access time

R/Wt
RS

00-11

See Figu re 1,

51

75

47

75

ns

tWLDZ

Disable time

RIm

00-11

32

50

31

50

tCSHDZ

Disable time

cst

00-11

41

65

40

65

ns
• ns

tELOV

Access (enable) time

fJt:~

MO 0-11

21

30

19

30

ns

tCSHOV

Access time

CSt

MOO-11

57

90

53

90

ns

tMLOV

Access time

MM~

MOO-11

RL =667 n,

25

40

25

40

ns

tCHOV

Access time

Ct

MOO-11

See Figure 2,

30

45

tAVOV1

Access time

MA

MO 0-11

47

70

44

70

ns

tMHOV

Access time

MMt

MO 0-11

31

50

31

50

ns

tAVOV2

Propagation time

MA

M08-11

21

30

20

30

ns

tEHOZ

Disable time

MEt

MOO-11

15

25

15

25

ns

(MiVi low)
(MiVi high)

See Notes 3 and 4

See Notes 3 and 4

ns

ns

NOTE: 3. Access times are tested as tpLH and tpHL or tpZH or tpZL' Disable times are tested as tpHZ and tpLZ'
4. See General Information Section for load circuits and voltage waveforms.

II
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lI-

()

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1193

TYPES .SN54LS610 THRU SN54LS613, SN74LS610 THRU SN74LS613
MEMORY.i:.·MAPPERS
i

~ .. ~, "';

TIMING DIAGRAMS

gj
w

a:o
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cI:cI:

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CIl
W

o
o
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cI:
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cI:

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t:; •

3-1194

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

6h

0'

TYPES SN54LS610 THRU SN54LS613, SN74LS610 THRU SN74LS613
MEMORY MAPPERS WITH OPEN-COLLECTOR OUTPUTS
TIMING DIAGRAMS

>~

0 .... ·
:J:-

~i

!:o

.-~~....
"C C

~

.. 2

;~
a. a.
c a.
.- co
CJ >

1--

C
o

~

III
W

0

:J:

::E

0

::E
~

------- -1



I

N

w

a:
::::l
Cl

ii:

0

:::i


1
:J:

;

TEXAS

-111

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

Il
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....
....
...I

3-1195

II
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3-1196

TYPES SN54LS620 THRU SN54LS623,
SN74LS620 THRU SN74LS623
OCTAL BUS TRANSCEIVERS
02537, AUGUST 1979 -

•

Bidirectional Bus Transceivers in
High-Density 20-Pin Packages·

SN54LS620.SN54LS621,SN54LS622
SN54LS623 •.. J PACKAGE
SN74LS620, SN74LS621. SN74LS622
SN74LS623 ... OW, J OR N PACKAGE

•

Local Bus-Latch Capability

•

Hysteresis at Bus Inputs Improves
Noise Margins

•

Choice of True or Inverting Logic

•

Choice of 3-State or Open-Collector
Outputs
DEVICE

OUTPUT

LOGIC

'LS620

3-State

Inverting

'LS621

Open-Collector

True

'LS622

Open-Collector

Inverting

'LS623

3-State

True

REVISED DECEMBER 19B3

(TOPVIEWI

Vee
G8A
81
82
83
84
85
86
87
88

A1
A2

3

A3

4

17

A4

5

16

A5
A6
A7
AS
GND

6

15

7

14

8

13

9

12

10

11

SN54LS620.SN54LS621.SN54LS622
SN54LS623 ... FK PACKAGE
SN74LS620,SN74LS621,SN74LS622
SN74LS623 •.. FN PACKAGE

description
These octal bus transceivers are designed for asynchronous two-way communication between data
buses. The control function implementation allows
for maximum flexibility in timing.

(TOPVIEWI

~

m u «

< l3 ~I~

These devices allow data transmission from the A bus
to the 8 bus or from the 8 bus to the A bus depending upon the logic levels at the enable inputs (G8A
and GA8).

81
82
83
84
85

The enable inputs can be used to disable the device
so that the buses are effectively isolated.

II
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The dual-enable configuration gives the 'LS620 thru
'LS623 the capability to store data by simultaneous
enabling of GBA and GAB. Each output reinforces
its input in this transceiver configuration. Thus,
when both control inputs are enabled and all other
data sources to the two sets of bus lines are at high
impedance, both sets of bus lines (16 in all) will
remain at their last states. The 8-bit codes appearing
on the two sets of buses will be identical for the
'LS621 and 'LS623 devices or complementary for
the 'LS620 and 'LS622.

:>w

FUNCTION TABLE

H

ENABLE

INPUTS

GBA

GAB

C

OPERATION
'LS620. 'LS622

'LS621, 'LS623

L

L

B data to A bus

B data to A bus

H

H

A data to B bus

A data to B bus

H

L

L

H

= high

level, L

= low

Isolation

Isolation

B data to A bus,

B data to A bus,

Adata to B bus

A data to B bus

...J

lI-

level

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Input voltage . . . . . . . _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off'state output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free-air temperature range: SN54LS'
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , -55°e to 125°e
0
SN74LS'
.... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70 e
0
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150 e
NOTE 1: Voltage values are with respect to network ground terminal.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s:'a~rl~r~liu~~Ot~~~~~~nof~~f~~~~n~e~~~:'

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1197

TYPES SN54LS620 THRU SN54LS623, SN74LS620 THRU SN74LS623
OCTAL BUS TRANSCEIVERS
logic symbols
'LS620

'LS621

(lS)
81

Al

Al

81
(3)

A2

82

A2

A3

83

A3

84

A4

.IT

t>

2Q

(17)

82
(4)

(16)

(5)

(15)

83

A4

84
(6)

A5

85

A5

A6

86

A6

A7

87

A7

(13)

(7)

88

A8

II

86
(S)

(12)

(9)

(11)

87

AS

88

'LS622

'LS623

-I
-I

r-

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m

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en

Al

(18)

Al

81

81
(3)

A2

A3

A4

A2

B2

82
(16)

(5)

(15)

83

A4

84

(17)

(4)
A3

B3

2\7

84
(6)

A5

85

A5

A6

86

A6

(7)

(13)
86

(S)
A7

B7

A7

AS

B8

• AS

(9)

Pin numbers shown on logic notation are for OW. J or N packages.

3-1198

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

(11)
88

TYPES SN54LS620 THRU SN54LS623,
SN74LS620 THRU SN74LS623
OCTAL BUS TRANSCEIVERS
logic diagrams (positive logic)
'LS621

'LS620
GBA

GBA

GAB

GAB

Al

B1

Al

A2

B2

A2

TO OTHER SIX
TRANSCEIVERS

'LS622

'LS623

B1

B2

B2

TOOTHER SIX
TRANSCEIVERS

TO OTHER SIX
TRANSCEIVERS

TOOTHER SIX
TRANSCEIVERS

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF OUTPUTS OF
'LS620, 'LS623

TYPICAL OF OUTPUTS OF
'LS621, 'LS622

Vee
__ ~OUTPUT

INPUT

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TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1199

TYPES SN54LS620, SN54LS623, SN74LS620, SN74LS623
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
recommended operating conditions
SN54LS620
SN74LS620
SN54LS623
SN74LS623
MIN NOM MAX MIN NOM MAX
4.5
5
5.5 4.75
5 5.25
-12
-15
12
24
-55
125
0
70

PARAMETER
Supply voltage, Vee (see Note 1)
High-level output current, InH
Low-level output current, IOL
Operating free-air temperature, T A

UNIT
V
mA
mA
°e

NOTE1: Voltage values are with respect to network ground terminal.

electrical characteristics' over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH
VIL
VIK

High-level input voltage
Low-level input voltage
Input clamp voltage
Hysteresis (VT+ - VT _) A or B input

VOH

High-level output voltage

VOL

IOZH
IOZL

II
-I
-I
r
C
m

~

(")

TEST CONDITIONSt

II
IIH
III
Ins
lee

Vr.r.~

Low-level output voltage
Off-state output current,
high-level voltage applied
Off-state output current,
low-level voltage applied
Input cu rrent at
I AorB
maximum input voltage
I GBAor GAB
High-level input current
Low-level input current
Short-circuit output current §
I Outputs high
Total supply current
I Outputs low
Outputs at Hi-Z

I

MIN,
Vee = MIN
Vee = MIN,
VIH=2V,
VIL = VIL max
Vee = MIN,
VIH=2V,
VIL = VIL max
Vee - MAX,
Vn = 2.7 V
Vee = MAX,
VO= 0.4 V
Vee = MAX,
Vee = MAX,
Vee - MAX,
Vee - MAX
Vee = MAX,

II

~

-18 mA

IOH =-3 mA

SN54LS620
SN74LS620
SN54LS623
SN74LS623
MIN TYPt MAX MIN TYPt MAX
2
2
0.5
0.6
-1.5
-1.5
0.1
0.4
0.2
0.4
2.4

3.4

2.4

UNIT
V
V
V
V

3.4
V

2

IOH = MAX

2
0.25

IOL = 12mA

0.4

0.25

0.4

0.35

0.5

V
IOL = 24mA
Gat 2 V,

20

20

/JA

-400

-400

/J A

0.1
0.1
20
-0.4
-:2"25
48
70
62
90
64
95

0.1
0.1
20
-0.4
-225
48
70
62
90
64
95

Gat 2 V,

I VI

- 5.5 V
VI = 7 V
VI - 2.7 V
VI-O.4V
-40

Outputs open

-40

mA
/JA
mA
mA
mA

t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
tAli typical value. are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time, and duration of the short-circuit sho~ld not exceed one second.

switching characteristics at Vee

= 5 V, TA = 25°e

m

t/)

PARAMETER

tpLH
tpHL

Propagation delay time,
low-to-high-Ieveloutput
Propagation delay time,
high-to-Iow-Ieveloutput

tpZL

Output enable time to low level

tpZH

Output enable time to high level

tPLZ

Output disable time from low level

tpHZ

Output disable time from high level

FROM
(INPUT)

TO
(OUTPUT)

A
B
A
B
GBA
GAB
GBA
GAB
GBA
GAB
GBA
GAB

B
A
B
A
A
B
A
B
A
B
A
B

tpLH = Propagation delay time, low-to-high-Ievel output
tpHL ~ Propagation delay time, high-to-Iow-Ievel output
tpZH = Output enable time to high level
NOTE 2: See General Information Section for load circuits and

'LS620

TEST CONDITIONS
MIN

CL=45pF,
RL = 667.n,
See Note 2

eL=5pF,
RL = 667 .n,
See Note 2

8
8
31
31
23
23
15
15
15
15

'LS623
MAX MIN
10
10
15
15
40
40
40
40
25
25
25
25

TYP MAX
8
15
15
8
15
11
11
15
40
31
31
40
26
40
40
26
15
25
15
25
15
25
15
25

tpZL = Output enable time to low level
tpHZ = Output disable time from high level
tpLZ = Output disable time from low level

voltage waveforms.

3-1200

TYP
6
6

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

ns
ns
ns
ns
ns
ns

TYPES SN54LS621, SN54LS622, SN74LS621, SN74LS622
OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS
recommended operating conditions
SN74LS621

SN54LS621
PARAMETER

SN54LS622

Supply voltage, Vee (see Note 1)

MIN

NOM

4.5

5

SN74LS622

MAX

MIN

5.5 4.75

UNIT

NOM MAX
5

5.25

V

High-level output voltage, VOH

5.5

5.5

V

Low-level output current, IOL

12

24

rnA

70

°e

Operating free·air temperature, T A

-55

125

0

NOTE 1: Voltage values are with respect to network ground terminal.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN74LS621

SN54LS621
PARAMETER

TEST CONDITIONSt

MIN
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

Vee = MIN,

Hysteresis (VT+ - VT _) A or B input

Vee= MIN

IOH

High·level output current

VOL

Low·level output voltage

TYP:j:

MAX

MIN

2

V

2

Vee= MIN,

-1.5

11=-18mA
0.1

0.4

VIH=2V,

VIL = VIL max, VOH = 5.5 V

Vee = MAX,

maximum input voltage

0.2

0.25

0.4

0.6

V

-1.5

V

0.4

V
100

100

Vee= MIN,
IIOL = 12 rnA
VIH = 2 V,
VIL = VIL max \IOL = 24 rnA

UNIT

TYP:j: MAX

0.5

Input current at
II

SN74LS622

SN54LS622

0.25

0.4

0.35

0.5

j.lA

V

0.1

0.1

VI= 7 V

IIH

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

j.lA

IlL

Low-level input current

Vee = MAX,

VI = 0.4 V

-0.4

-0.4

rnA

lee

Total supply current

Vee = MAX,

Outputs open

I Outputs high
I Outputs low

48

70

48

70

62

90

62.

90

..

rnA

H''''''''·
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w

rnA

tFor conditions shown as MIN or MAX use the appropriate value specified under recommended operating conditions.
+AII typical values are at VCC = 5 V, T A = 25°C.

switching characteristics at Vee
PARAMETER

tpLH
tpHL
tpLH
tpHL

CJ

:>w
C

=5 V, TA = 25°e
FROM

.TO

-I
'LS621

l-

'LS622

TEST CONDITIONS

UNIT

(INPUT)

(OUTPUT)

Propagation delay time,

A

B

17

25

19

25

low-to·high-Ievel output

B

A

17

25

19

25

Propagation delay time,

A

B

25

high-to-Iow-Ievel output

B

A

Output disable time

GBA

A

from low level

GAB

8

Output enable time

GBA

A

from high level

GAB

B

MIN

eL=45pF,
RL=667n,
See Note 2

TYP

MAX MIN

I-

TYP MAX

16

25

14

16

25

14

25

23

40

26

40

25

40

28

40

34

50

43

60

37

50

39

60

ns
ns
ns
ns

tpLH = Propagation delay time, low-to-high-Ievel input.
tpH L = Propagation delay time, high·to-Iow-Ievel input.
NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1201

-t
-t
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3-1202

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
02501, JANUARY 1980 -

REVISED DECEMBER 1983

• Separate Supply Voltage Pins for Isolation of
Frequency Control Inputs and Oscillators
from Output Circuitry
• Highly Stable Operation over Specified
Temperature and/or Supply Voltage Ranges
DEVICE SIMILAR NUMBER COMP'L
RANGE
ENABLE
R ext
TYPE
TO
VCO's
ZOUT
INPUT
yes
yes
yes
'LS624 'LS324
no
single
'LS625

'LS325

dual

yes

no

no

no

'LS626

'LS326

dual

yes

yes

no

no

'LS627

'LS327

dual

no

no

no

no

'LS628

'LS324

single

yes

yes

yes

yes

'LS629

'LS124

dual

no

yes

yes

no

description
These voltage-controlled oscillators (VCO's) are improved versions of the original VCO family: SN54LS124,SN54LS324
thru SN54LS327, SN74LS124, and SN74LS324 thru SN74LS327. These new devices feature improved voltage-tofrequency linearity, range, and compensation. With the exception of the 'LS624 and 'LS628, all of these devices feature
two independent VCO's in a single monolithic chip. The 'LS624, 'LS625, 'LS626 and 'LS628 have complementary Z
outputs. The output frequency for each VCO is established by a single external capacitor in combination with voltagesensitive inputs used for frequency control and frequency range. Each device has a voltage-sensitive input for frequency
control; however, the 'LS624, 'LS628, and 'LS629 devices also have one for frequency range. (See Figures 1 thru 6).
The 'LS628 offers more precise temperature compensation than its 'LS624 counterpart. The 'LS624 features a 600 ohm
internal timing resistor. The 'LS628 requires a timing resistor to be connected externally across Rext pins. Temperature
compensation will be improved due to the temperature coefficient of the external resistor.
Figure 3 and Figure 6 contain the necessary information to choose the proper capacitor value to obtain the desired
operating frequency.
A single 5-volt supply can be used: however, one set of supply voltage and ground pins (VCC and GND) is provided for the
enable, synchronization-gating, and output sections, and a separate set (OSC VCC and OSC GND) is provided for the
oscillator and associated frequency-control circuits so that effective isolation can be accomplished in the system. For operation of frequencies greater than 10 MHz, it is recommended that two independent supplies be used. Disabling either VCO of
the 'LS625 and 'LS625 and 'LS627 can be achieved by removing the appropriate OSC VCC. An enable input is provided on
the 'LS624, 'LS626, 'LS628, and 'LS629. When the enable input is low, the output is enabled: when the enable input is high,
the internal oscillator is disabled, Y is high, and Z is low. Caution! Crosstalk may occur in the dual devices ('LS625, 'LS626,
'LS627 and 'LS629) when both VCO's are operated simultaneously.

en
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U

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C

-I

rr-

The pulse-synchronization-gating section ensures that the first output pulse is neither clipped nor extended. The duty
cycle of the square-wave output is fixed at approximately 50 percent.
The SN54LS624 thru SN54LS629 are characterized for operation over the full military temperature range of -55°C to
125°C. The SN74LS624 thru SN74LS629 are characterized for operation from O°C to 70°C.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
speCIfications per the terms of Texas Instruments

~~~nnd:;:s~~rl~ar~liu~~Ot~~~~~~nof~~f~~~~~e~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1203

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
SN54LS624 ••• J OR W PACKAGE
SN74LS624 ... D. J OR W PACKAGE

SN54LS624 .•. FK PACKAGE
SN74LS624 ... FN PACKAGE

(TOPVIEWI

ITOPVIEWI
f-

OSC VCC
FREQ CONT
NC
NC
NC
VCC
Z

RNG
CXl
CX2
~N

u~

a

(5

~u

t!)u

u@

ZU)UU)a:
a:OZOu..

CXl

NC
NC
NC
NC
NC

NC

SN54LS625 ... J OR W PACKAGE
SN74LS625 •.. D. J OR N PACKAGE

(TOPVIEWI

GND

~

VCC
2Z
2Y
2CXl

lY
leXl

-I
-I

r-

C

m

<

Ci

m

tn

Z

U

>

SN54LS625 ... FK PACKAGE
SN74LS625 •.. FN PACKAGE

(TOPVIEWI

2FC
20SC VCC
20SC GND

a
U
~(5~~l::j

SN54LS626 ... J OR W PACKAGE
SN74LS626 ... D. J OR N PACKAGE

lY
lCXl
NC

(TOPVIEWI

GND
lZ
lY
lEN
lCXl
lCX2
OSC VCC
OSC GND -...;;----.;:.....-

Z

t!)

2CX2

II

au N u

2Y
2CXl
NC
2CX2

VCC
2Z
2Y
2EN
2CXl

>t!)

2CX2

Uu
U)U)

2FC
ua u a u
UZ Z Z U

00

2FC
lFC

,.....

....

t!»

UU
U)U)

00
(\IN

SN54LS626 .•. FK PACKAGE
SN74LS626 .•. FN PACKAGE

NC - No internal connection

(TOPVIEWI

a

u

~(5~~l::j
2Y
2EN
NC
2CXl
2CX2

NC
lCXl
lCX2
uauuu
uzzu..u..

>t!)
uu
U)U)

00

3-1204

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

.-N

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
SN54lS627 ... J OR W PACKAGE
SN74lS627 ... D. J OR N PACKAGE

SN54lS627 ... FK PACKAGE
SN74lS627 ... FN PACKAGE

(TOPVIEWI

(TOPVIEWI

lOSC VCC
lFC
lCXl
lCX2
10SC GND
lY
GND

1

2

9

u
u
>

VCC
20SC VCC
2FC
2CXl
2CX2
20SC GND

U

~
~
........

u
u
>
U

~~
Z>N

U

2CXl
NC
2CX2

SN54lS628 ... J OR W PACKAGE
SN74lS628 ... D. J OR N PACKAGE
(TOPVIEWI

OSC GND

>-ou>-o
.... ZZNZ

OSC VCC

1

(!)

(,!)

FC

U

(/)

RX

o
N

NC
SN54lS628 ... FK PACKAGE
SN74lS628 ... FN PACKAGE
(TOPVIEWI
C
U
Z

SN54lS629 ... J OR W PACKAGE
SN74lS629 ... D. J OR N PACKAGE

1

U

16

2

15

3

14
13
12

6

11

7

- 10

B

9

U

ZUlUUlU

a:ozou.

(TOPVIEWI

2FC
lFC
lRNG
lCXl
lCX2
lEN
lY
OSC GND

U

>

(!)
(!)U

3 2

VCC
OSC VCC
2RNG
2CX2
2CXl
2EN

CXl
NC
CX2

RK
NC
RX
NC
NC

5

6

~2Y

9 1011 1213

b GND

>-CUNU
ZZ
U

W

U

>
w
C

>

(!)

CJ)

...J

NC·No internal connection

SN54lS629 ... FK PACKAGE
SN74lS629 ... FN PACKAGE

lI-

(TOPVIEWI
u

U

>

~
~ U ~~
.... NZ>O
2RNG
2CX2
NC
2CXl
2EN

lRNG
lCXl
NC

lCX2
lEN
>-CUC>-

.... -z
(!)

.

Z

Z

(!)

N

U

(/)

o

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1205

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
logic diagram (positive logic)

Cx { _ _",*,""---1

~---z

FC

RC

logic symbols

'LS624

'LS626

'LS625

ose VCC
(7)

osc Vce
(14)

B
-i
-i

rC
m

(6)

(8)

CXl
CX2

Y
Z

lOSC Vec
lOSC GND

lY

lFC

lZ

lCXl
lCX2

lEN

lY

lFC
leXl

lZ

lCX2

20SC VCC

2Y

2Y

2Z

2Z

20se GND
OSeGND

S
n

2Fe
2CXl
2CX2

ose GND

m
en

'LS629

'LS628

'LS627

OSC Vce
(14)

lOSCVCC

lEN

lOSCGND
lFC

1 RNG
(6)

lCX.l
! GI>

lCX2

(8)

eXl
20SC Vcc
20SCGND

eX2
RX

2FC

RX

2CXl
2CX2

Y

lCX2
2EN
2 RNG
2 FC
2CXl
2eX2

OSCGND
OSC GND

Pin numbers shown on logic notation are fo!" D, J or N packages.

3-1206

lY

1 FC

lCXl

-It!p

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS

EQUIVALENT Of EACH
ENABLE INPUT
('LS624, 'LS626,'LS62B, AND 'LS629)

EQUIVALENT OF EACH FREQUENCY
CONTROL OR ('LS624, 'LS62B, AND 'LS629)
RANGE INPUT.

TYPICAL OF ALL OUTPUTS
----------~-VCC

VCC

Vcc

25 kn
NOM

9kn NOM
70 kn
INPUT

OUTPUT

NOM
INPUT

20 kn
NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Notes 1 and 2)
Input voltage: Enable input t . . . .
Frequency control or range input t
Operating free·air temperature range: SN54LS' Circuits
SN74LS' Circuits
Storage temperature range

. 7V
. 7V

VCC
-55°C to 125°C
O°C to 70°C
-65°C to 150°C

t The enable input i. provided only on the 'LS624, 'LS626, 'LS628, and 'LS629 .

. t The

range input is provided only on 'LS624, 'LS628, and 'LS629.

NOTE:

1. V'oltage values are with respect to the appropriate ground terminal.
2. Throughout the data sheet, the symbol V CC is used for the voltage applied to both the V CC and OSC V CC terminals, unless
otherwise noted.

en
W
U

>
W
C
-I

ff-

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1207

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
recommended operating conditions
SN54LS'
Supply voltage, Vee

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

5

0

0

Input voltage at frequency control or range input, VIUreq) or Vl(rng)'"
High-level output current, IOH

5

-1.2

Low-level output current, IOL

24

mA

20

MHz
De

1

-55

125

Hz

0

70

electrical characteristics over recommended operating free-air temperature range (unless otherwise
PARAMETER

SN54LS'

TEST CONDITIONSt

-"-

High-level input
VIH

MIN

TYPt

--

2

voltage at enable.

note~)

SN74LS'
MAX

MIN

V
mA

20

Operating free-air temperature, T A

V

-1.2

12
1

Output frequency, fa

UNIT

TYPt

MAX

2

UNIT

V

Low-level input
VIL

voltage at enable.

VIK

Input clamp voltage at enable.

VOH

High-level output voltage

VOL

Low-level output voltage

II

Input current

Vee = MIN,

11=-18mA

Vee = MIN,

EN at VIL max,

10H = -1.2 mA,

See Note 3

Vee = MIN,

EN at VIL max,

See Note 3

Vee= MAX

0.8

-1.5

-1.5

3A
0.25

IOL=12mA

-

Freq control
or range ...

2.5

0.7

2.7

OA

IOL = 24 mA

3A

V
V
V

0.25

!J4

0.35

0.5

VI- 5 V

50

250

50

250

VI = 1 V

10

50

10

50

V
p.A

Input current
II

-I
-I

r-

Enable·

Vee= MAX,

VI = 7V

0.2

0.2

mA

Enable·

Vee= MAX,

VI = 2.7 V

40

40

p.A

Enable·

Vee = MAX,

VI = OAV

-0.8

mA

-225

mA

input voltage
High-level
IIH

input current
Low-level

C

IlL

<

lOS

m

at maximum

input current

Short-circuit output current§

'LS624

n

m

en

-0.8
-40

Vee = MAX

Supply current, total into
lee

Vee and ose Vee pins

Vee = MAX,
Enable. = 4.5 V
See Note 4

-225
20

35

-40
20

35

'LS625

35

55

35

55

'LS626

35

55

35

55

'LS627

35

55

35

55

'LS628

20

35

20

35

'LS629

35

55

35

55

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
D
tAli typical values are at Vee = 5 V, T A = 25 e.
"
§ Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
"'The range input Is provided only on the 'LS624, 'LS628, and 'LS629 .
• The enable input is provided only on the 'LS624, 'LS626, 'LS628, and 'LS629.
NOTES: 3. VOH for Y outputs and VoL. for Z outputs are measured while enable inputs are connected to ground, with Individual 1-k!1
resistors connected from eX1 to Vee and from eX2 to ground. The resistor connections are reversed for testing VOH for Z
outputs and VOL for Y inputs.
4. For 'LS624, 'LS626, 'LS628, and 'LS629, I ce is measured with the outputs disabled and open. For 'LS625 and 'LS627, lee is
measured with one ose Vee = MAX, and with the other ose Vee and outputs open.

3-1208

"

TEXAS-Ij}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
switching characteristics, VCC

= 5 V (unless otherwise noted), R L = 667 n, CL = 45 pF, T A = 25 ° C

PARAMETER

'LS624, 'LS628, 'LS629

TEST CONDITIONS

MIN

TYP

MAX

15

20

25

1.1

1.6

2.1

= 5 v, Vl(rng) = 0 V
VI(freq) -1 v, Vl(rng) - 5 V
VWreq) = 5 V
VI(freq) = 0 V

VWreq)
Output frequency

fO

Cext

= 50 pF

'LS625, 'LS626, 'LS627
MIN

TYP

MAX

7

9.5

12

0.9

1.2

1.5

UNIT

MHz

TYPICAL CHARACTERISTICS
'LS624, 'LS628,'LS629

'LS624,'LS628,'LS629
OUTPUT FREQUENCY

OUTPUT FREQUENCY

vs

vs

FREQUENCY-CONTROL INPUT VOLTAGEt

FREQUENCY-CONTROL INPUT VOLTAGEt
30.-.--.--.--.-.--.--.--~n--'

30
N

:c
I

25

VCC = 5 V
Cext = 50 pF
Rext = 600 n ('LS628)
TA = 25°C

N

:c

25

~

I

~20~~--~4-~--~~--~­

>20r--r--r--r~ru

c

~

Cl.>

::J

::J

C"

~15~~~--~-+~+-

~ 15~~--~4-~~~~~~~~~~

...

u.

...

::J
0-

::J

;10~-r--~~~~~~

; 10~~--~4-~~~~--~~~

o

o

11

~ 5~~~~~~~~~~~~~~·~

en
w
O~-L

U

__L--L~~-L~~~~~~~

o

2

3
4
VI(freq) - Frequency-Control Input Voltage - V

2
3
4
5
VI(freq) - Frequency-Control Input Voltage - V
FIGURE 1

FIGURE 2

t Due to the effects of stray capacitance the output frequency may be unstable when the frequency
control voltage is less than 1 volt.

TEXAS

~

INSTRL!MENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

>
w

C

-I

lI-

3-1209

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LS629
VOLTAGE-CONTROLLED OSCILLATORS
TYPICAL CHARACTERISTICS
'LS624, 'LS623, 'LS629

'LS625, 'LS626, 'LS627

OUTPUT FREQUENCY

OUTPUT FREQUENCY

vs

vs

EXTERNAL CAPACITANCE

FREQUENCY-CONTROL INPUT VOLTAGE t

100 W ,.------.---.-----,-----r---y------,

10

N

:c

1M

:2!
I

-i

f--"""""rl----"'.~~

100 K t----t---''''c-f-

g 5
U:
:; 4

~ 10k 1----+---+----'"

u.

1kl----+---l---+---"'...

:::l

B:::l
I

83

/

/V
/V

/

1

L-._-L_~

__

~_~

__

~_~

10- 11 10- 10 10-9 10- 8 10-7 10-6
Cext - External Capacitance - F

10- 5

~

V

V
o

5
o
2
3
4
VI(freq) -- Frequency-Control Input Voltage - V
FIGURE 4

FIGURE 3

II
-I
-I

'LS625, 'LS626, 'LS627

'LS625,'LS626,'LS627

OUTPUT FREQUENCY

OUTPUT FREQUENCY

vs

vs

r-

FREQUENCY-CONTROL INPUT VOLTAGE

30

o

m
I

I
I
I
VCC = 5 V
Cext = 15 pF
25 t°
TA = 25 C

1i3
:::l

g 15

U:
+-'
:::l

/'

o

I
~ 5

V

V

EXTERNAL CAPACITANCE
100 M .....----,-----,.-----,------,---.-------,

10M p....::.::>...M.-----I__--I----l----+--_4

:2!
I
>20
u

~10

V

/

./

I 2

10~--+---l---+---4--+-~~

m
en

I

V

Q.

100f--__-+-_~---+--~~~

o

("')

I

f-

:::l

:::l

<

I

VCC = 5 V
Cext = 50 pf
N
:c 8 f- TA = 25°C
:2!
I 7
>
u
1i3 6

9

V

V

V

V

/

V

1 M ~-..:>...+-~~F---I-----l---+-----:
100 k

~--_+_--~I__~~---l----+----1

10k

f--~----I__--.::~~~f__--+----

1k

f--~----I__-~4_--~~.,r...O+_--_4

V
10

VCC=5V~-~----+_--~--~
TA = 25°C

o

1L-__- L____ L -__- L_ _

4
3
2
5
VI(freq) - Frequency-Control Input Voltage - V

10-11 10- 10 10-9 10-8 10-7

o

~__'_~

_ _~

10-6

10- 5

Cext - External Capacitance - F

FIGURE 5

FIGURE 6

t Due to the effects of stray capacitance the output frequency may be unstable when the frequency control voltage Is less than 1 volt.

3-1210

..Jt!;

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS624 THRU SN54LS629,
SN74LS624 THRU SN74LSS29
VOLTAGE-CONTROLLED OSCILLATORS
TYPICAL CHARACTERISTICS
ENABLE TIME
vs
FREQUENCY
1000
VCC 5V
TA - 25°C

,

C
I

1"\

E

F

'l"-

Cll

i'--..

~c 100

w

I-

3V

rr-

OV---

~1.3V=-=]

I

j

~

r-ten

r-

V==uu
1.3 V-----

1

4
10
20
40
2
fo - Output Frequency ~ MHz

10
100

FIGURE 7

TYPICAL APPLICATIONS DATA
Cext

(J)

W

U

Cext

H

FREQ
CONT
VCO

H

>
w

Y

C

RNG~

-I

....
....
L

VCO

t:. RNG
EN~

""The range input is provided only on the 'LS624, 'LS628, and 'LS629.
+The enable input is provided only on the 'LS624, 'LS626, 'LS628, and 'LS629.

1
L

FIGURE A-PHASE·LOCKED LOOP

TEXAS

~

INSTRUMENTS
POST OF F ICE BOX 225012 • DALLAS, TEXAS 75265

3-1211

II
-I
-I
r-

C

m

!5
("')

m
VJ

3-1212

TYPES SN54LS630, SN54LS631, SN74LS630, SN74LS631
16·81T PARALLEL ERROR DETECTION
AND CORRECTION CIRCUITS
D2550, MARCH 1980-REVISED APRIL 1985

----

-

(TIM99630, TIM99631)
• Detocts and Corrects Single-Bit Errors

SN54LS630, SN54LS631 ... JD PACKAGE
SN74LS630, SN74LS631 ... JD OR N PACKAGE

• Detects and Flags Dual-Bit Errors

(TOPVIEWI

• Fast Processing Times:
Write Cycle: Generates Check Word in
45 ns Typical
Read Cycle: Flags Errors in Zl ns Typical
• Power Dissipation 600 mW Typical
a

Choice of Output Configurations:
'LS630 ... 3-State
'LS631 ... Open-Collector

DATA
BITS

description

DEF
DBO

VCC
SEF

DB1
DB2

S1
SO

DB6
DB7
DB8

CB3
CB4
CB5

~::

~:!

D~~~

The 'LS630 and 'LS631 devices are 16-bit parallel error
detection and correction circuits (EDACs) in 28-pin,
600-mil packages. They use a modified Hamming code
to generate a 6-bit check word from a 16-bit data word.
This check word is stored along with the data word during the memory write cycle. During the memory read cycle, the 22-bit words from memory are processed by the
EDACs to determine if errors have occurred in memory.

DB11
GND

I

\ CONTROL

.~

CHECK
BITS

~:~~}
-.....-----'-

DB13
DB12

DATA
BITS

SN54LS630. SN54LS631 ... FK PACKAGE
SN74LS630. SN74LS631 ... FN PACKAGE
(TOPVIEWI

4

Single-bit errors in the 16-bit data word are flagged and
corrected.
Single-bit errors in the 6-bit check word are flagged, and
the CPU sends the EDAC through the correction cycle
even though the 16-bit word is not in error. The correction cycle will simply pass along the original 16-bit word
in this case and produce error syndrome bits to pinpoint
the error-generating location.

3

2

1 28 2726

SO
CBO
CB1
CB2
CB3
CB4
CB5

DB7

en
w

()

>
W

12 1314151617 18

C
-'

Dual-bit errors are flagged but not corrected. These dual
errors may occur in any two bits of the 22-bit word from
memory (two errors in the 16-bit data word, two errors
in the 6-bit check word, or one error in each word).

lI-

The grqss-error condition of all lows or all highs from
memory will be detected. Otherwise, errors in three or
more bits of the 22-bit word are beyond the capabilities
of these devices to detect.
CONTROL FUNCTION TABLE
Memory

Control

EDAC Function

Data I/O

Check Word 1/0

Error Flags

I
I
I

Cycle

S1

SO

WRITE

L

L

Generate Check Word

Input Data

Output Check Word

L

READ

L

H

Read Data & Check Word

Input Data

Input Check Word

L

READ

H

H

Latch & Flag Errors

Latch Data

Latch Check Word

Enabled

READ

H

L

Output Corrected Data

Output Syndrome Bits

Enabled

Correct Data Word &
Generate Syndrome Bits

PROOUCTION OATA
This document contains information current as
of publication date. Products' conform to
speCifications per the terms of Texas Instruments

~~~nndea::s':a~itvar:liu:~Ot~~~~~~nor~lf~~~~n~e~~:s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

SEF

DEF
L
L

3-1213

TYPES SN54LS630, SN54LS631, SN74LS630, SN74LS631
16·81T PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS

functional block diagram
so

51
So

FUNCTION
SELECTOR

SO-S1
SO-S1

S1

r--

~

~

6/
LATCH

/

~C

PARITY
GENERATOR

CHECK BIT I/~~
CBO THRU CBS
,I

,

v12

~

4- r-

6/

BUFFER

12"
/

/

OE
ERROR
DETECTOR

OE

~ SEF

~ DEF

12
r--

}'

16/

~ LATCH

/

~ C

,1.

DATA BIT II
DBOTHRU D

~1S~
4-

II

BUFFER

16/

....

/

ERROR
CORRECTOR

~

ERROR
DECODER

OE

-I
-I
rC

ERROR FUNCTION TABLE
Total Number of Errors
16-Bit Data

m

0

(")

0
1

<

1

m

en

Error Rags

6-Bit Checkword

2
0

SEF

DEF

Data Correction

0
0

L

L

Not Applicable

H

L

Correction

1

H

L

Correction

1

H

H

Interrupt

0

H

H

Interrupt

2

H

H

Interrupt

In order to be able to determine whether the data from the memory is acceptable to use as presented to the bus, the
EDAC must be strobed to enable the error flags and the flags will have to be tested for the zero condition.
The first case in the error function table represents the normal, no-error condition. The CPU sees lows on both flags.
The next two cases of single-bit errors require data correction. Although the EDAC can discern the single check bit
error and ignore it, the error flags_ are identical to the single error in the 16-bit data word. The CPU will ask for data
correction in both cases. An interrupt condition to the CPU results in each of the last three cases, where dual errors
occur;-

error detection and correction details
During a memory write cycle, six check bits (CBO-CB5) are generated by eight-input parity generators using the data
bits as defined below. During a illenlory-read cycle, the 6-bit check word is retrieved aiong with the ~ciuai data.

3-1214

TEXAS

-I!I

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

lYPES SN54LS630, SN54LS631, SN74LS630, SN74LS631
16·BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS

CHECKWORD

16-BlT DATA WORD

BIT

0

1

CBO

x

x

CBl

x

CB2
CB3

x

2

x

x

x

x

x

CB4

3

4

x

x

5

6

x

x

X

x
x

x

x
x

7

8

9

10

x

x

x

x
x

x
x

CB5

11

12

13

x
x

x

x

x

x

x

x

x

x

x
x

15

x
x

x
x

14

x

x

x
x

x
x

The six check bits are paritY bits derived from the matrix of data bits as Indicated by "x" for each bit.

Error detection is accomplished as the 6-bit check word and the 16-bit data word from memory are applied to internal
parity generators/checkers. If the parity of all six groupings of data and check bits are correct, it is assumed that no
error has occurred and both error flags will be low. (It should be noted that the sense of two of the check bits, bits CBa
and CB1, is inverted to ensure that the gross-error condition of all lows and all highs is detected_)
If the parity of one or more of the check groups is incorrect, an error has occurred and the proper error flag or flags will
be set high. Any single error in the 16-bit data word will change the sense of exactly three bits of the 6-bit check word.
Any singie error in the 6-bit check word changes the sense of only that one bit. In either case, the single error flag will
be set high while the dual error flag will remain low.
Any two-bit error will change the sense of an even number of check bits. The two-bit error is not correctable since the
parity tree can only identify single-bit errors. Both error flags are set high when any two-bit error is detected.
Three or more simultaneous bit errors can fool the EDAC into believing that no error, a correctable error, or an uncorrectable error has occurred and produce erroneous results in all three cases.
Error correction is accomplished by identifying the bad bit and inverting it. Identification of the erroneous bit is
achieved by comparing the 16-bit data word and 6-bit check word from memory with the new check word with one
(check word error) or three (data word error) inverted bits.
As the corrected word is made available on the data word I/O port, the check word I/O port presents a 6-bit syndrome
error code. This syndrome code can be used to identify the bad memory chip.

CBO
L
L
H
L
L
H
H

H
L
L
L
H
H
L
H
H
L
H
H
H
H
H
H

CBl
L
H
L
L
H
L
L
H
L
H
H
L
H
H
L
H
H
L
H
H
H
H
H

SYNDROME ERROR CODE
CB2
CB3
CB4
H
H
L
H
L
L
H
L
L
H
H
L
H
L
L
H
L
L
H
L
L
L
L
L
H
H
H
H
L
H
H
L
H
H
L
H
L
H
L
H
H
L
H
H
L
L
H
i..
H
H
H
H
H
H
H
H
L
H
H
L
H
H
L
H
H
H
H
H
H

TEXAS'~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

(/)

W
(J

ERROR SYNDROME TABLE

ERROR LOCATION
DBa
DBl
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DBll
DB12
DB13
DB14
DB15
CBO
CBl
CB2
CB3
CB4
CB5
NO ERROR

II

CB5
H
H
H
H
H
H
H
H
L
L
L
L
L

:>
w

C

-I

J-'
J-

L
L
L
H
H
H
H
H
L
H

3-1215

TYPESSN54LS630, SN54LS631, SN74LS630, SN74LS631
16·BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
schematics of inputs and outputs
TYPICAL OF DEF AND SEF OUTPUTS
---+--VCC

EQUIVALENT OF EACH INPUT
VCC

INPUT
~1It'"+--OUTPUT

TYPICAL OF CB AND DB ('LS630)

-i-

TYPICAL OF CB AND DB ('LS631)

10051 NOM

__

VCC

__ ~OUTPUT

-OUTPUT

rh

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

II

Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Input voltage: SO and S1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
eB and DB ...................................................... . 5.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Off-state output voltage
Operating free-air temperature range: SN54LS630, SN54LS631
. . . . . . . . . . . . . . . . . . . . .. _55°C to 125°C
....................... "
oOe to 70°C
SN74LS630, SN74LS631
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65°C to 150°C

-I
-I

r-

C

m

NOTE 1: Voltage values are with respect to network ground terminal.

C")

recommended operating conditions

<

m

en

VCC

Supply voltage

IOH

High-level output current

VOH

High-level output voltage

IOL

Low-level output current

tsu

Setup time

th

Hold time

TA

Operating free-air temperature

SN54LS630

SN74LS630

SN54LS631

SN74LS631

MIN

NOM

4.5

5

CB or DB, 'LS630 only
DEF or SEF
CB or DB. 'LS631 only
CB or DB
DEF or SEF

MIN

NOM

MAX

5.5

4.75

5

5.25

-1

-1

-0.4

-0.4

5.5

5.5

12

,24

4

B

CB or DB before Sl t t

15

15

CB or DB before Sl H

45

45

CB or DB after Sl t

15

15

- 55

125

0

t This time guarantees the input data and check word will be latched.
~

Thi5 time gu,iiaiitcc5 the input data and checkwurd wiii be iatched pius that no

glitch

will occur on SEF or DEF flags.

t The upward-pointing arrow indicates a transition from low to high.

3-1216

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

UNIT

MAX

V
mA
V
mA
ns
ns

70

°c

TYPES SN54LS630, SN54LS631, SN74LS630, SN74LS631
16·BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS

PARAMETERS
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

Vce
eB or DB
DEF or SEF

Low·level output voltage

Off·state output current,
high·level voltage applied
Off·state output current,
IOZL
II

SN74LS630
MIN

~

MIN,

Vee= MIN,
VIH = 2 V,
VIL = VILmin
Vee = MIN,
VIH = 2 V,

eB or DB
eB or DB

Vee - MAX,

11~-lBmA

-1.5
2.4

3.3

2.4

3.2

IOH ~ -400 ~A

2.5

3.4

2.7

3.4

0.25

IOL=12mA

0.4

0.25

IOL -4 mA
IOL = BmA
Vo - 2.7 V,
VO=O.4V,

O.B

V

-1.5

V
V

0.25

0.4

IOL = 24 mA

0.4

0.35

0.5

0.25

0.4

0.35

0.5
20

~A

~A

-200

-200

eB or DB

Vee= MAX,

VI=5.5V

0.1

0.1

input voltage

SO or Sl

0.1

0.1

SO and Sl at 2 V
VIH=4.5V

VI-7V

IIH

High·level input current

Vee = MAX,

VI = 2.7 V

20

20

IlL

Low·level input current

Vee - MAX,

VI =0.4 V

-0.2

-0.2

IOS§

Short-circuit output

eB or DB

current

DEF or SEF

Vee = MAX

V

20

Input current at maximum

low·level voltage applied

UNIT
V

-

IOH = MAX

SO and Sl at 2 V
Vee - MAX,

TVP* MAX

2
0.7

DEF or SEF VIL = VIL max
IOZH

SN54LS630
MIN TVP* MAX
2

eB or DB
VOL

t

-30

-130

-30

-130

~20

-100

-20

-100

mA
~A

mA
mA

Vee = MAX, SO and Sl at 4.5 V,
lee

Supply current

All eB and DB pins grounded,

143

230

143

230

mA

DEF and SEF open

,electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS t

PARAMETER
VIH

High·level input voltage

VIL

Low·level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

IOH

VOL

II

SN54LS631
MIN

High·level output current

SN74LS631

TVP* MAX MIN TVP* MAX

2

2

V

0.7

DEF or SEF
eB or DB

Vee= MIN,

II = -lB mA

Vee= MIN,

IOH= -400 ~A,

VIH = 2 V,

VIL = VIL max

Vee= MIN,

VOH = 5.5 V,

VIH = 2 V,

VIL = VIL max

eB or DB

Vee= MIN,

DEF or SEF

VIL = VILmax

Low·level output voltage

VIH = 2 V,

O.B

-1.5
2.5

3.4

-1.5
2.7

UNIT

V
V
V

3.4

100

IOL = 12mA

0.25

0.4

0.25

0.4

100

IOL = 24mA
IOL =4 mA
IOL - BmA

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

Input current at

eB or DB

Vee = MAX,

VI = 5.5 V

0.1

0.1,

maximum input voltage

SO or Sl

VIH=4.5V

VI-7 V

0.1

0.1

~A

V

mA

High·level input current

Vee= MAX

VI = 2.7 V

20

20

~A

IlL

Low·level input current

Vee = MAX,

VI = 0.4 V

-0.2

'-0.2

mA

-100

mA

lBO

mA

Short-circuit output
current

DEF or SEF

. -20

Vee = MAX

-100

-20

Vee = MAX, SO and Stat 4.5 V,
lee

Supply current

All eB and DB grounded,

113

lBO

113

SEF and DEF open
tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t All typical values are at Vee ~ 5 V. T A ~ 25°e .
. § Not more than one output should be shorted at a time. and duration of the short circuit should not exceed one second.

TEXAS

U

>
w

C

..J

IIH

IOS§

en
w

-1!1.

INSTRUMENTS

POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1217

ff-

TYPES SN54LS630, SN54LS631, SN74LS630, AND SN74LS631
16·BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS

switching characteristics, VCC = 5 V, TA = 25°C, CL = 45 pF
FROM
(INPUT)

PARAMETER
tpLH Propagation delay time, low-to-high-Ievel output O
tpHL Propagation delay time, high-to-Iow-Ievel output O

DB

TO
(OUTPUT)

SOatOV,

CB

Slt

tPZH Output enable time to high leve!#

SO~

SEF

Sl at 0 V,

SO~

CB, DB

tpHZ Output disable time from high level"

sot

CB, DB

Sl at 3 V,

RL=667n,

See Figure 1
Sl at 3 V,

RL=667n,

See Figure 2
Sl at 3 V,

CB,DB

TYP MAX
31

Sl at 3 V,
RL =667 n,
See Figure 2

CB, DB

tpZL Output enable time to low level#

SOt

'LS630
MIN

R L = 667 n, See Figure 1
SOat3V,
RL-2kn,
See Figure 1

DEF

tpLH Propagation delay time, low-to-high-Ievel output*

tPLZ Output disable time from low level"

TEST CONDITIONS

RL=667n,

See Figure 1

UNIT
ns

45
27

65
65
40

20

30

24

40

ns

30

45

ns

43

65

ns

31

65

ns

ns
ns

switching characteristics, VCC = 5 V, TA = 25°C, CL = 45 pF, see Figure 1
FROM
(INPUT)

TO
(OUTPUT)

tPLH Propagation delay time, low-to-high level
tpH L Propagation delay time, high-to-Iow-Ievel outputO

DB

CB

tpLH Propagation delay time,low-to-high-level output*

Slt

tPHL Propagation delay time, high-to-Iow-Ievel output#

SO~

tpLH Propagation delay time,low-to-high-level output'"

Sot

PARAMETER
output O

EI
-I
-I

TEST CONDITIONS
SO at 0 V,

'LS631
MIN

Sl at OV,

RL = 667 n

DEF

UNIT

TYP

MAX

38

55

45

65

ns

27

40

ns

20

ns

SO at 3 V,

RL = 2 kn

CB,DB

Sl at 3 V,

RL = 667 kn

28

30
45

ns

CB,DB

Sl at 3 V,

RL = 667 kn

33

50

ns

SEF

ns

r-

0These parameters describe the timo intervals taken to generate the check word during the memory write cycle_
*These parameters describe the time intervals taken to flag errors during the memory read cycle_

C

#These parameters describe the time intervals taken to correct and output the data word and to generate and output the syndrome error code

m

!5
n
m

during the memory read cycle_
"These parameters describe the time intervals taken to disable the CB and DB buses in preparation for a new data word during the memory read
cycle_

PARAMETER MEASUREMENT INFORMATION

C/)

VCC = 5 V

~T

Rl

OUTPUT
OF CIRCUIT

C L = 45 pF::::::::::

Cl =45 pF

FIGURE 1-0UTPUT LOAD CIRCUIT

3-1218

FIGURE 2-0UTPUT LOAD CIRCUIT

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

.

Rl =667S!

TYPES SN54LS630, SN54LS631, SN74LS630, SN74LS631
16·BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS

typical operating sequences
READ, FLAG, AND CORRECT MODE SWITCHING WAVEFORMS

50--------------------~

51 ----------~
I

I

I

I

I

I

"---tsu~thold -+i

DBO-OB15

I

INPUT DATA WORD
~------------~~~~I

OUTPUT CORRECTED OATAWORD

t+-- ten--":

~tsJ--M-thold ~

CBO-CB5

----1(

INPUT

CHE~K WORD »»>~. . ---O-U-T-PU-T-5-Y-N-D-RO-M-E-C-O-D-E---")~~"""~"~~2~~
j4--ten -4l
tpd

:'-tdis-+l

-----:v

5EF------------~--------~~~----------V-A-L~ID~5~E-F~F~LA~G~------~---------1 + - . 1

I

,..f---tpd - - -.......
~~-----------------------­

DEF------------~------------~L-------~V~A~L~ID~D~E~F~F~L~A~G------~~--------t NOTE: There are two conditions specified for tsu of Data or Checkword before S1 t
details.

See recommended operating conditions for

II
en
w

c.J

:>
w
C

..J

lI-

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1219

B
-I
-I

r-

C

m

<

("')

m

U)

3-1220

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
8-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
02728, APRIL 1983, REVISED DECEMBER 1983

•

SN54LS' ... J PACKAGE
SN74LS' ... OW. J OR N PACKAGE
(TOPVIEWI

Detects and Corrects Single-Bit Errors

• Detects and Flags Dual-Bit Errors
• Fast Processing Times:
Write Cycle: Generates Check Word in
45 ns Typical
Read Cycle: Flags Errors in V ns
Typical

VCC
SEF
S1
SO
CBO
CB1
CB2
CB3
NC
CB4

DB1
DB2

• Power Dissipation 500 mW Typical
DB6
DB7

• Choice of Output Configurations:
'LS636 ... 3-State
'LS637 ... Open Collector

SN54LS' ... FK PACKAGE
SN74LS' ... FN PACKAGE
(TOPVIEWI
0

0

0

0

0

OJ OJ OJ OJ OJ
w
0> (J1

"'"

DB7

description

'"

blO

Gn

DB1

~) 0

The 'LS636 and 'LS637 devices are 8-bit parallel error
detection and correction circuits (EDACs) in 20-pin.
300-mil packages. They use a modified Hamming
code to generate a 5-bit check word from an 8-bit data
word. This check word is stored along with the data
word during the memory write cycle. During the
memory read cycle. the 13-bit words from memory
are processed by the EDACs to determine if errors
have occurred in memory.

~

NC

;:;
c:;

n nn

CJ)

OJ OJ OJ 0
.... 0

DBO
DEF
VCC
SEF

II

~

'"

en
w

NC-No internal connection.

(J

Single-bit errors in the 8-bit data word are flagged and corrected.
Single-bit errors in the 5-bit check word are flagged. and the CPU sends the EDAC through the correction cycle even
though the 8-bit word is not in error. The correction cycle will simply pass along the original 8-bit word in this case
and produce error syndrome bits to pinpoint the error-generating location.
Dual-bit errors are flagged but not corrected. These dual errors may occur in any two bits of the 13-bit word from
memory (two errors in the 8-bit data word. two errors in the 5-bit check word. or one error in each word).

>

W

C

...J
~
~

The gross-error condition of all highs from memory will be detected. Otherwise. errors in three or more bits of the
13-bit word are beyond the capabilities of these devices to detect.

CONTROL FUNCTION TABLE
MEMORY

CONTROL

EDAC FUNCTION

CHECK WORD 1/0

DATA I/O

ERROR FLAGS

CYCLE

51

5EF

I

DEF

WRITE

L

L

Generate Check Word

Input Data

Output Check Word

L

I

L

READ

L

H

Read Data & Check Word

Input Data

Input Check Word

READ

H

H

Latch & Flag Errors

Latch Data

Latch Check Word

L
L
Enabled

READ

H

L

Output Corrected Data

Output Syndrome Bits

Enabled

50

Correct Data Word &
Generate Syndrome Bits

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n~:::s~~i{:r~~iu~~Ot~~~~~~nOr~'I~~~~nJe~~~s~

TEXAS

~

INSTRUMJ;:NTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

I

3-1221

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
8-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
functional block diagram

51

SO

r

S1

~

FUNCTIO'
SELECTOR

SO-51
SO-51

r

....
r---

+-

~
.

,5/

LATCH

...... C

PARITY
GENERATOR

r

~

CHECK BI TI/O~
CBO THRU CB4

,.

,

"10
,.8

~ I-- BUFFER

....

~

I"

5/

10/

,

"

..

OE

OE
ERROR
DETECTOR

f-----+ SEF
f-----+ DEF

10
r---

++-

)'

8/

LATCH

/

V8

C

",

DATA BIT I/O,~
DBOTHRU DB7
8

4-

II

BUFFER

.......

8L

"

ERROR
CORRECTOR

~

ERROR
DECODER

OE
~

ERROR FUNCTION TABLE
TOTAL NUMBER OF ERRORS

ERROR FLAGS

DATA

8-BIT DATA

5-BIT CHECKWORD

SEF

a

a
a

L

L

Not Applicable

1

H

L

Correction

a

1

H

L

Correction

1

1

H

Interrupt

2

a

a

2

H
H

H
H
H

DEF

CORRECTION

Interrupt
Interrupt

In order to be able to determine whether the data from the memory is acceptable to use as presented to the bus,
the EDAC must be strobed to enable the error flags and the flags will have to be tested for the zero condition_
The first case in the error function table represents the normal, no-error condition_ The CPU sees lows on both flags_
The next two cases of single-bit errors require data correction_ Although the EDAC can discern the single check bit
error and ignore it, the error flags are identical to the single error in the 8-bit data word_ The CPU will ask for data
correction in both cases_ An interrupt condition to the CPU results in each of the last three cases, where dual errors occur_

error detection and correction details
During a memory write cycie, five check bits (CBO-CB4) are generated by eight-input parity generators using the data
bits as defined below_ During a memory read cycle, the 5-bit check word is retrieved along with the 8-bit data word_

3-1222

TEXAS

-1!1

INSTRUMENTS
POST OFFice BOX 225012 • OALLAS, TeXAS 75265

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
a-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS

CHECKWORD

8-BIT DATA WORD

BIT

0

1

CBO
CB1
CB2
CB3
CB4

X

X

2

X
X

X
X

X

X

X

3

4

X

X

X
X
X

X

5

6

X

X

7

X

X

X

X

X

X

X

The five check bits are parity bits derived from the matrix of data bits as indicated by "X" for each bit.

Error detection is accomplished as the 5-bit check word and the 8-bit data word from memory are applied to internal
parity generators/checkers. If the parity of all five groupings of data and check bits are correct, it is assumed that
no error has occurred and both error flags will be low.
If the parity of one or more of the check groups is incorrect, an error has occurred and the proper error flag or flags
will be set high. Any single error in the 8-bit data word will change the sense of exactly three bits of the 5-bit check
word. Any single error in the 5-bit check word changes the sense of only that one bit. In either case, the single error
flag will be set high while the dual error flag will remain low.
Any two-bit error will change the sense of an even number of check bits. The two-bit error is not correctable since
the parity tree can only identify single-bit errors. Both error flags are set high when any two-bit error is detected.
Three or more simultaneous bit errors can fool the EDAC into believing that no error, a correctable error, or an
uncorrectable error has occurred and produce erroneous results in all three cases.
Error correction is accomplished by identifying the bad bit and inverting it. Identification of the erroneous bit is achieved
by comparing the 8-bit data word and 5-bit check word from memory with the new check word with one (check word
error) or three (data word error) inverted bits.
As the corrected word is made available on the data word I/O port, the check word I/O port presents a 5-bit syndrome
error code. This syndrome code can be used to identify the bad memory chip.

en
w

ERROR SYNDROME TABLE
ERROR LOCATION

DBa
DB1
DB2
DB3
DB4
DB5
DB6
DB7
CBO
CB1
CB2
CB3
CB4
NO ERROR

U

SYNDROME ERROR CODE

>
w

CBO

CB1

CB2

CB3

CB4

L

L

H

L

H

C

L

H

L

L

H

...J

H

L

L

L

H

L

L

H

H

L

L

H

L

H

L

H

L

L

H

L

H

L

H

L

L

H

H

L

L

L
H

L

H

H

H

H

L

H

H

H

H

H

L

H

H
H

H

H

H

L

H

H

H

H

L

H

H

H

H

H

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

lI-

3-1223

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
8-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF DEF AND SEF OUTPUTS
---~--VCC

VCC

INPUT
OUTPUT

TYPICAL OF CB AND DB ('LS636)

TYPICAL OF CB AND DB ('LS637)

lO~QVCC
__ ~OUTPUT

_~OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...................................................
7V
Input voltage: SO and Sl ..... _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
eB and DB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Off-state output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free-air temperature range: SN54LS636, SN54LS637
. . . . . . . . . . . . . . . . . . . . .. -55°C to 125°C
SN74LS636, SN74LS637
. . . . . . . . . . . . . . . . . . . . . . . . . oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C

II
-f
-f
rC

NOTE1: Voltage values are with respect to network ground terminal.

:S

recommended operating conditions

m

(")

m

en
VCC

Supply voltage

IOH

High-level output current

VOH

High-level output voltage

IOL

Low-level output current

tsu

Setup time

th

Hold time

TA

Operating free-air temperature

SN54LS636

SN74LS636

SN54LS637

SN74LS637

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

CB or DB, 'LS636 only
DEF or SEF
CB or DB, 'LS637 only
CB or DB
DEF or SEF

-1

-1

-0.4

-0.4

5.5

5.5

12

24

8

4

CB or DB beforeS1tt

15

15

CB or DB before S1 t t

45

45

CB or DB after S1 t

15

15

-55

125

0

t This time guarantees the input data and check word will be latched.
tThis time guarantees the input data and checkword will be latched plus that no glitch will occur on SEF or DEF flags.
t The upward-pointing arrow indicates a transition from low to high.

3-1224

,UNIT

MIN

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

V
mA
V
mA
ns
ns

70

°c

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
a-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54 LS636
TEST eONDITloNst

PARAMETERS
VIH

High-level input voltage

VIL

low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

2
Vee; MIN,
eB or DB
DEF or SEF
eB or DB

Val

low-level output voltage

Vee - MIN,
VIH;2V,
VIL; Vil min
Vee; MIN,
VIH; 2 V,

DEF or SEF Vll; Vil max
Off-state output current,
10ZH

high-level voltage applied
Off-state output current,

10ZL
II

SN74LS636

MIN TYP:j: MAX

eB or DB
eB or DB

Vee - MAX,

TYP:j: MAX

11;-18mA

0.7

0.8

V

-1.5

-1.5

V

IOH; MAX

2.4

3.3

2.4

3.2

10H; -400/JA

2.5

3.4

2.7

3.4

10l; 12 mA

0.25

0.4

0.25

0.4

10l; 8 mA
Va - 2.7 V,
Va; 0.4 V,

V
0.4

0.25

10l; 24 mA
10l -4 mA

0.35

0.5

0.25

0.4

0.35

0.5

20

20

-0.2

-0.2

Input current at maximum

eB or DB

Vee; MAX,

VI; 5.5 V

0.1

0.1

input voltage

SO or Sl

VIH ;4.5 V

VI-7 V

0.1

0.1

low·level voltage applied

SO and Sl at 2 V

UNIT
V

2

SO and Sl at 2 V
Vee; MAX,

MIN

V

/lA
mA
mA

IIH

High-level input current

Vee - MAX,

VI- 2.7 V

20

20

,/lA

IlL

low-level input current

Vee; MAX,

VI; 0.4 V

-0.2

-0.2

mA

10S§

Short-circuit output

eB or DB

current

DEF or SEF

Vee; MAX

-30

-130

-30

-130

-20

-100

-20

-100

mA

Vee; MAX, SO and Sl at 4.5 V,
ICC

Supply current

All eB and DB pins grounded,

100

160

100

160

mA

DEF and SEF open

PARAMETER

TEST CONDITIONSt

VIH

High-level input voltage

Vil

low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

DEF or SEF

10H

High-level output current

eB or DB

VOL

low-level output voltage

SN74lSG37

TYP:j: MAX MIN TYP+

2

eB or DB

Vee; MIN,

II; -18mA

Vee; MIN,
V'IH; 2 V,

10H ; -400 /lA,
Vll; Vilmax

Vee; MIN,

VOH; 5.5 V,

VIH; 2 V,

Vll; Vilmax

Vee; MIN,
VIH;2V,

DEF or SEF
II

SN54lS637
MIN

Vll; Vil max

I nput current at

eB or DB

Vee; MAX,

maximum input voltage

SO or Sl

VIH

= 4.5

V

2.5

MAX

2
0.7

0.8

-1.5

-1.5

3.4

2.7

3.4

UNIT

en

V

CJ

V
V

>
W

V

C

mA

II-

-oJ

0.1

IOl;12mA

0.25

0.1

0.4

10l; 24 mA
IOl;4mA

0.25

0.4

10l; 8 mA

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

VI; 5.5 V

0.1

0.1

VI = 7 V

0.1

0.1

V

mA

IIH

High-level input current

Vee; MAX

VI = 2.7 V

20

20

/JA

IlL

Low-level input current

Vee = MAX,

VI;O.4V

-0.2

-0.2

mA

-100

mA

144

mA

10S§

Short-circuit output
current

DEF or SEF

Vee; MAX

W

-20

-100

-20

Vee; MAX, SO and Sl at 4.5 V,
ICC

Supply current

All eB and DB grounded,

90

144

90

SEF and DEF open
t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee = 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1225

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
a-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
'LS636 switching characteristics, Vee

5 V, TA

PARAMETER

FROM
(INPUT)

'tPLH Propagation delay time,low-to-high-level output O
tpHL Propagation delay time, high-to-Iow-Ievel output O

DB

CB

tpLH Propagation delay time, low-to-high-Ievel output·

Slt

DEF
SEF

tpZH Output enable time to high level#

SO~

C

S
C')

Sl at 3 V,
RL =667 n,
See Figure 2

24

40

ns

Sl at 3 V,
RL=667n,
See Figure 1

30

45

ns

43

65

ns

31

45

ns

CB,DB

io
tPLZ Output disable time from low level

SOt

CB,DB

Sl at 3 V,

RL=667n,
See Figure 2
Sl at3 V,
RL=667n,
See Figure 1

45

TO
(OUTPUT)

tPLH Propagation delay time, low-to-high level
tPH L Propagation delay time, high-to-Iow-Ievel outputO

DB

CB

tPLH Propagation delay time, low-to-high-Ievel output·

Slt

DEF
SEF

SO at 3 V,

RL = 2 kn

tPH L Propagation delay time, high-to-Iow-Ievel output#
tpLH Propagation delay time, low-to-high-Ievel output io

SOt

CB,DB
CB,DB

Sl at 3 V,
Sl at 3 V,

RL=667kn
RL = 667 kn

TEST CONDITIONS
SOat 0 V,

MIN

Sl at OV,

RL=667n

'LS637
TYP
MAX

UNIT

38

55

ns

65
40

ns

27
20
28
33

30
45
50

ns
ns
ns
ns

intervals taken to generate the check word during the memory write cycle,
intervals taken to flag errors during the memory read cycle,
Intervals taken to correct and output the data word and to generate and o~tput the syndrome error code
Intervals taken to disable the CB and DB buses In preparation for a new data word during the memory read

PARAMETER MEASUREMENT INFORMATION
VCC =5 V

~r

OUTPUT
OF CIRCUIT

RL

RL = 667 l!

CL -45.F

FIGURE 1-0UTPUT LOAD C!RCU!T

3-1226

ns

45

en

OUTPUT
OF CIRCUIT

ns
ns

45 pF, see Figure 1

5V, TA
FROM
(INPUT)

m

UNIT

CB,DB

Sot

OThese parameters describe the time
*These parameters describe the time
#These parameters describe the time
during the memory read cycle.
ioThese parameters describe the time
cycle.

'LS636
TYP MAX
65
40
30

tpHZ Output disable time from high levelio

SO~

MIN

31
45
27
20

CB,DB

output O

m

TEST CONDITIONS
SOat 0 V,
Sl atO V,
R L = 667 n, See Figure 1
,SOat3V,
RL = 2 kn,
See Figure 1

SO~

PARAMETER

r

45 pF

TO
(OUTPUT)

tPZL Output enable time to low level#

'LS637 switching characteristics, Vee

~
~

25 o e, eL

FIGURE 2-0UTFUT LOAD CIRCUiT

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS636, SN54LS637, SN74LS636, SN74LS637
8-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS
typical operating sequences

READ, FLAG, AND CORRECT MODE SWITCHING WAVEFORMS

50------------------~

51 - - - - - - - - - - - - -

DBO-DB7

I

I

I

OUTPUT CORRECTED DATAWORD
I~~~~c:~~~~~~~~~~~~~~~-----I

INPUT DATA WORD
'-------------~~~~.
t+- te n ----.:

I

j4- td i 5 --+I

I.--- tsu -.!+- thold ~

CBO-CB4

~

I NPUT

CHE~K WORD

»»>>u. . ____

~~""~~~

O_U_T_PU_T_S_Y_N_DR_O_M_E_C_O_D_E_ _)"")........

\4-- te n -----fo\
tpd

:.- td i 5 --+I

------+Ivo

SEF------------~--------~L-~----------V-A-L-ID-5~E-F-F~LA-G--------~---------l + - - .

I
"lfII---tpd ----~~,..------V-A-L-ID--D-EF-F-L-A-G---------.
DEF------------~-------------""--------------------------~~---------

t NOTE: There are two conditions specified for tsu of Data or Checkword before S1t _ See recommended operating conditions for detail.

en

w

U

:;:
w

C

...I

lI-

. TEXAS ..J1.!p
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

~-1227

II
-f
-f
rC

m

S

n
m
en

3-1228

TYPES SN54LS638, SN54LS639, SN74LS638, SN74LS639
OCTAL BUS TRANSCEIVERS
02636, JANUARY 1981 - REVISED DECEMBER Hi83

SN54LS638, SN54LS639 ... J PACKAGE
SN74LS638, SN74LS639 ... OW, J OR N PACKAGE

• Bidirectional Bus Transceivers in HighDensity 20-Pin Packages

(TOP VIEW)

o Hysteresis at Bus Inputs Improves Noise
Margins
o

Vee
G

Choice of True or I nverting Logic

B1
B2
B3
B4
B5

• A Bus Outputs are Open-Collector,
B Bus Outputs are 3-State
description

B6
B7
B8

These octal bus transceivers are designed for asynchronous two-way communication between opencollector and 3-state buses. The devices transmit data
from the A bus (open-collector) to the B bus (3-state)
or from the B bus to the A bus depending upon the
level at the direction control (DIR) input. The enable
input (G) can be used to disable the device so the
buses are isolated.

SN54LS638, SN54LS639 •.• FK PACKAGE
SN74LS638, SN74LS639 ... FN PACKAGE
ITOPVIEW)

FUNCTION TABLE

DIR

G

1 2019

OPERATION

CONTROL
INPUTS

3 2

'LS638

'LS639

L

L

B data to A bus

B data to A bus

L

H

A data to

A data to B bus

H

X

B bus

9 1011 1213

Isolation

Isolation

H = high level, L = low level, X = irrelevant

DEVICE

A OUTPUT

B OUTPUT

LOGIC

'LS638

Open-Collector

3-5tate

Inverting

'LS639

Open-Collector

3-5tate

True

en
w

u

:>w
C

schematics of inputs and outputs

-l

EQUIVALENT OF EACH INPUT

TYPICAL OF A OUTPUTS

TYPICAL OF B OUTPUTS

.....
.....

VCC--------o--------

___ ~OUTPUT
INPUT

.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~;nndea~:s~~[{:~liu:~Ot~~~f~~nof~~f~~~~':!ie~~~s~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS, TEXAS 75265

3-1229

TYPES SN54LS638, SN54LS639, SN74LS638, SN74LS639
OCTAL BUS TRANSCEIVERS
logic symbols
'LS638

'LS639
"G(191
D 1R _(1...,1G-...L.:::"'I

DIR

Al

A2

A3

A4

Bl

A7

~ 1

------.

DI R --4~---~

<
nm

DlR

A1

Bl

Al

A2

B2

A2

~_---I---'

81

en

TO SIX OTHER TRANSCEIVERS

82

TO SIX OTHER TRANSCEIVERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...................................................
7V
Input voltage (DI R or G) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-sta~e output. voltage (A or B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ~..
5.5 V
0
Operating free·alr temperature range: SN54LS638, SN54LS639 . . . . . . . . . . . . . . . . . . . . . . . -55 e to 125 e
SN74LS638, SN74LS639 . . . . . . . . . . . . . . . . . . . . . . . . . . oOe to 70°C
0
0
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65 e to 150 e
NOTE1: Voltage values are with respect to the network ground terminal.

3·1230

.Jl.!p

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS638, SN54LS639, SN74LS638, SN74LS639
OCTAL BUS TRANSCEIVERS
recommended operating conditions
SN54LS'
Supply voltage. Vee

SN74LS'

ryJlN

NOM

MAX

MIN

NOM

4.5

5

5.5

4.75

5

MAX

UNIT

5.25

V

High-level output voltage. VOH (A bus)

5.5

5.5

V

High·level output current. IOH (8 bus)

-12

-15

mA

12

24

mA

70

°e

Low·level output current. IOL (A or B bus)
Operating free·air temperature. T A

-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High·level input voltage

VIL

Low-level input voltage

VIK

I nput clamp voltage

Vee = MIN. II = -18 mA

Hysteresis (VT+-VT_)

Vee= MIN

VOH
VOL

Off-state output current
10Zl

, low-level voltage applied
Input current

II

a~

maxi-

mum input voltage

IIH
IlL

IOH = -3 mA

Vee = MIN. VIH - 2 V.

TYP*

MAX

2

V

0.5

0.6

-1.5

-1.5

0.4

0.2

0.4

0.1
2.4

V
V
V

0.1
2.4

mA
V

2

'v'IL = MAX

IOH = MAX
IOL = 12mA

Vil = MAX

IOl = 24mA

8

Vee=MAX.Gat2V.

Vo = 2.7 V

20

20

JlA

Aor 8

Vee= MAX.G at 2 V.

VO=O.4V

mA

Aor 8

Vee = MAX

DIR orG

2

UNIT

"ee = MIN. VIH = 2 V.

0.25

0.4

0.25

'0.4

0.35

0.5

-0.4

-0.4

VI = 5.5 V

0.1

0.1

VI = 7 V

V

mA

II

0.1

0.1

Vee = MAX. VI = 2.7 V

20

20

JlA

Low-level input current

Vee = MAX. VI = 0.4 V

-0.4

-0.4

mA

en

-225

mA

(.)

8

output current§

-40

Vee = MAX

leeH Supply current. outputs high
leel Supply current. outputs low
leez

0.1

MIN

High-level input current
Short-circuit

lOS

SN74LS'
MAX

Vee=MIN.VIH=2V. VIL=MAX.

Low-level output voltage Aor 8

high·level voltage applied

TYP*

VOH = 5.5 V

High-level output voltage B

Off'state output current.
IOZH

MIN
2

High-level output current A

IOH

SN54LS'

TEST CONDITIONSt

Supply current. outputs off

-225

-40

Vee = MAX. Outputs open

48

70

48

70

mA

Vee = MAX. Outputs open

62

90

62

90

mA

Vee - MAX. Outputs open

64

95

64

95

mA

*

PARAMETER

TO

(INPUT)

(OUTPUT)

TEST CONDITIONS

'LS638
MIN

TYP

'LS639
MAX

MIN

TYP

MAX

UNIT

8

6

10

8

15

8

A

17

25

19

25

A

8

8

15

11

15

8

A

14

25

16

25

tpLH

G

A

26

40

23

40

tpHl

G

A

43

60

34

50

ns

tPZH

G

8

23

40

26

40

ns

tpHl

C

..oJ

=5 V, TA =25°e, see note 2

FROM
A

tPlH

:>w

lI-

t For conditions shown as MIN or MAX. use the appropriate value specified under recommended operating conditions.
All tYPical values are at Vee = 5 V. T A = 25° C.
§ Not more then one output should be shorted at a time, and duration of the short circuit should not exceed one second.

switching characteristics, Vee

w

el=45pF, RL=667n

ns
ns
ns

tpZl

G

8

31

40

31

40

ns

tpHZ

G

8

15

25

15

25

ns

tpLZ

~

8

15

25

15

25

ns

el = 5 pF, RL = 667 n

NOTE 2: See General Information Section for load circuits and voltage waveforms.

TEXAS

-1.!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1231

TYPES SN54LS638, SN54LS639, SN74LS638, SN74LS639
OCTAL BUS TRANSCEIVERS
TYPICAL CHARACTERISTICS
SN54LS'
INVERTING OUTPUT VOLTAGE

vs

vs

INPUT VOLTAGE

INPUT VOLTAGE

5

------ ~

3

>

>I

~

"\

o
I
o
>

2

1
o
o

-f
-f
rC

m

<

(j

~

h ...."
~

1

~

\

~

~

tt

L. .. \

r

i',\\

6fr

2~----+~~~H-~~~------~

oI

I

A :

\ "

'it \~

1

:

OL-___- L______

o

.,

i

I

2

1.5

~,

I

:

>

I
I
I

,
_\ ,1

0.5

1

+-'

~

:1

----- ~

3~----+--~~4-----~~----~

g

,~

::J

Co

:)

I
••••••••• T
A = 70° C
---TA=25°C

4 I-------+------+-.-....---~ TA = 0° C -

.............

gJ,

~

5

I
°
•••••••• TA = 125 C
---TA=25°C
TA = _55°C

4

>I
"0

SN74LS'
INVERTING OUTPUT VOLTAGE

~

____~______~

0.5

1.5

2

VI-Input Voltage-V

VI-Input Voltage-V

FIGURE 1

FIGURE 2

SN54LS'
NONINVERTING OUTPUT VOLTAGE

SN74LS'
NONINVERTING OUTPUT VOLTAGE

vs

vs

INPUT VOLTAGE

INPUT VOLTAGE

5r-----~------.-------r_I---o~

5

• __ •••• - ITA = 70° C
- - - T A = 25°C
4 1------+-------+------- T A = 0° C

·····.···TA = 125 C
---TA25°C
4 1 - - - - + - - - - + - - -......---T A = -55°C_

m

en

...
e

I
I

::J

o
I
o
>

,:

I
I

I
I

::J

2

I
I

A

I
1-------+--1~--I!I+-+....J_--~>------4

V
I

+

I
I

I

I

I
I
I

I
I
I

OL-____-L______

o

0.5

1.5

o

2

VI-Input Voltage-V

~~

1.5

V!-Input Voltage-V

FIGURE 3

3·1232

.J
____

~

0.5

FIGURE 4

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 15265

____

~

2

TYPES SN54LS640 THRU SN54LS645,
SN74LS640 THRU SN74LS645
OCTAL BUS TRANSCEIVERS
02420, APRIL 1979-REVISEO DECEMBER 1983

SN54LS' ••. J PACKAGE
SN74LS' ... OW, J OR N PACKAGE

•

SN74LSf)4X-1 Versions Rated at IOL
of 48 rnA

•

Bi-directional Bus Transceivers in HighDensity 2O-Pin Packages

•

Hysteresis at Bus Inputs Improves Noise
Margins

•

Choice of True or Inverting Logic

•

Choice of 3-State or Open-Collector
Outputs

DEVICE
'LS640
'LS641
'LS642
'LS643
'LS644
'LS645

ITOPVIEW)

OUTPUT

LOGIC

3-State
Open-Collector
Open-Collector
3-State
Open-Collector
3-State

Inverting
True
Inverting
True and inverting
True and inverting
True

DIR
A1
A2
A3
A4
A5
A6

SN54LS' ... FKPACKAGE
SN74LS' .•. FN PACKAGE
ITOPVIEW)

3

description
These octal bus transceivers are designed for asynchronous two-way communication between data buses.
The devices transmit data from the A bus to the B bus or
from the B bus to the A bus depending upon the level at
the direction control (DIR) input. The enable input {G)
can be used to disable the device so the buses are effectively isolated.

2 1 2019

4
5

A3
A4
A5
A6
A7

B1
B2
B3
B4
B5

6
7

8

II

9 10 111213

~

000

,....CO

2al alal

(!)

en
w

FUNCTION TABLE

The -1 versions of the SN74LS640 thru SN74LS645
are identical to the standard versions except that the
recommended maximum IOL is inci"eased to 48
milliamperes. There are no -1 versions of the
SN54LS640 thru SN54LS645.
The SN54LS640 thru SN54LS645 are characterized for
operation over the full military temperature range of
-55 DC to 125 DC. The SN74LS640 thru. SN74LS645
are characterized for operation from ODC to 70 DC.

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea:!~~[I~arntl!'u:~~~~~~:nor~~r=~~J!D~:res~

CONTROL
INPUTS
G

DlR

(.)

:>
w

OPERATION
'LS640

'LS641

'LS643

'LS642

'LS645

'LS644

L

L

L

H

. A data to B bus

H

X

Isolation

B data to A bus B data to A bus
A data to B bus
Isolation

C

B data to A bus
A data to B bus

...J

lI-

Isolation

H = high level, L= low level, X = irrelevant

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1233

S3:l1J\30

ctJ
N

1.U·m

'LS640

tv
.po

DI~-~
(11
3 ENl IBAI

G3
3 ENl [BAI

Al~\ll

<1

0'-""-

Bl

Al .--...-...4 0 1

<1

0-

'LS642

'LS641

-~

G
DIR (11

Ie

G~

DIR (1)

o J.---+o-

Bl

3ENl [BA)

Al~Ql

:XJC)
ZC:oI:Ioo
cncn O
OZ-l
m ....... ::I:

A2~

...-......- B2

A2~B2

A2

A3~

............... B3

,
(4)
A3

A3

A4~

............... B4

M~

............-B4

A4~

~B4

-

A5~

~B5

A5~

I-++-

B5

A5~

t---+..-

!Bmcn
cnol:looZ
en en

B6

AS

(4)

(lS)
B3

B2

(lS)

B3

B5

0I:I00:XJ


w

TO SEVEN OTHER TRANSCEIVERS

TO SEVEN OTHER TRANSCEIVERS

C

....I

'LS644

DIR

........

'LS645

G------,

G------.

-+-----.....

DIR

_+--___...J

A1

A1

TO SEVEN OTHER TRANSCEIVERS

B1

TO SEVEN OTHER TRANSCEIVERS

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1235

TYPES SN54LS640, SN54LS643, SN54LS645,
SN74LS640, SN74LS643, SN74LS645 .
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .. 7 V
Input voltage: All inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7 V
I/O ports .................................................................... 5.5 V
Operating free-air temperature range: SN54LS640, SN54LS643, SN54LS645 . . . . . . . . . . . . . . . .. _ 55°e to 125°e
SN74LS640, SN74LS643, SN74LS645 ...... ~ . . . . . . . . . . . . .. oOe to 70 0 e
Storage temperature range ......................................................... .
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
PARAMETER

Vee

Supply voltage

VIH

High·lvel input voltage

SN54LS640

SN74LS640

SN54LS643

SN74LS643

SN54LS645

SN74LS645

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

2

VIL

Low-level input voltage

IOH

High-level output current

IOL

Low-level output current

TA

Operating free-air temperature

UNIT

0.5

0.6

-12

-15

12

24
48§

- 55

125

V
V

0

70

V
mA
mA
°e

§ The 48 mA limit applies for the SN74LS640-1, SN74LS643-1, and SN74LS645-1 only.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

II
-I
-I
rC

m

SN54LS640
TEST CONDITIONS t

PARAMETER

(VT+ - VT-)

m

en

Vee~

MIN,

Vee~

MIN,

Vce~MIN,

VOH

II

~

SN74LS645

~

2 V,

Vee~

VOL

MIN,

IOH

~

-3 mA

IOH - MAX
VIH~2V,

VIL ~ MAX

MAX

MIN

Typl

0.1

0.4

0.2

0.4

2.4

3.4

2.4

3.4

2

IOL ~ 12 mA

UNIT

MAX
-1.5

-1.5
A or B input

VIH

Typl

-18 mA

VIL ~ MAX

::5

n

SN74LS643

SN54LS645
MIN
VIK
Hysteresis

SN74LS640

SN54LS643

V
V

2
0.25

0.4

IOL - 24 mA

0.25

0.4

0.35

0.5

0.4

0.5

IOL ~ 48 mA ~

V

IOZH

Vee - MAX,

Gat 2 V,

Vo - 2.7 V

20

20

IJA

IOZL

Vee~

MAX,

~ at 2 V,

VO~O.4V

-0.4

-0.4

mA

Vee~

MAX

0.1

0.1

0.1

0.1

II

I Aor B

I DIRorG

VI~5.5V

VI

7 V

mA

IIH

Vee

~

MAX,

VIH

2.7 V

20

20

IJA

IlL

Vee~

MAX,

VIL~O.4V

-0.4

-0.4

mA

Vee~

MAX

-225

mA

IOS§
ICC

I Outputs high
I Outputs low
I ·Outputs at

Vee

~

MAX,

~

~

-40
Outputs open

Hi-Z

-225

-40

48

70

48

70

62

90

62

90

64

95

64

95

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
; All typical values are at Vee ~ 5 V, T A ~ 25° e.
§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
~ The 48 mA condition applies for the SN74LS640·1, SN74LS643·1, and SN74LS645·1 only.

3-1236

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

mA

switching characteristics at Vee

= 5 V, T A = 25°e
FROM

TO

(INPUT)

(OUTPUT)

A

B

low-to-high-Ievel output

B

A

Propagation delay time,

A

B

high-to-Iow-Ievel output

B

A

G

A

G

B

G

A

G

B

PARAMETER
Propagation delay time,
tPLH

tPHL

tpZL Output enable time to low level
tpZH Output enable time to high level
. tPLZ Output disable time from low level

(3
~

tpHZ Output disable time from high level

§

~z

G

A

G

B

G

A

G

B

----

-

TEST CONDITIONS

CL =45pF,

RL =667.!1,
See Note 2

CL=5pF,
RL=667.!1,
See Note 2

--

--

TYP

MAX

6

'LS645, 'LS645-1

'LS643, 'LS643-1

'LS640, 'LS640-1
MIN

MIN

TYP

MAX

10

6

10

MIN

TYP

MAX

8

15

6

10

8

15

8

15

8

15

9

15

11

15

8

15

11

15

11

15

31

40

32

45

31

40

31

40

32

45

31

40

23

40

27

40

26

40

23

40

23

40

26

40

15

25

15

25

15

25

15

25

15

25

15

25

15

25

15

25

15

25

15

25

15

25

15

25

g;Qr;;1
~C:~
.~

I

ns
ns
ns
ns
ns
ns

---

NOTE 2: See General Information Section for load circuits and voltage waveforms.

o

~(J)

~....,

UNIT

n

schematics of inputs and outputs
TYPICAL OF OUTPUTS

EOPIVALENT OF EACH INPUT

~

•

aJ

~rrl

c:

~~~

en

:;!

-t

"'t:J

~z

x

l:,

Vee

C>-----10

U'

k~

---O--Vee

NOM

50

n

NOM

m
en
~enen

:c

l>

nzz
m'l ~.,
-~~
<
••
m en en

'"
'"

:c en en

INPUT

en~~

~- -enen
-tzz

00

OUTPUT

:::1:'101
(,.),.a::..~

,"
en
en en
-tCJ)CJ)

-

-~~

-t-(,.) -(,.)

men(/)

ozz

c:'I01
-t~~

""C.r-

c:~~

Cf
N
W
-...J

TTL DEVICES

IMI
~:~.

-t~~
en
01 01

TYPES SN54LS640, SN54LS643, SN54LS645,
SN74LS640,SN74LS643,SN74LS645
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
TYPICAL CHARACTERISTICS
SN74LS'
INVERTING OUTPUT VOLTAGE

SN54LS'
INVERTING OUTPUT VOLTAGE
vs

vs

INPUT VOLTAGE

INPUT VOLTAGE

5

4

>I

2l,

!9
"0

::J

o
I
o
>

>I

'------- ~
3

f\--,
~

2

1

I

!

\

II
C

m

<
(")

~

...... I
0.5

+'"

~

~,

\

~

~

,

~:1
~

'

:

,,

,
\

,

l

,

: \
\

OL-____

o

2

1.5

\,

I

~

:

~

t ~

\~

I

...,~----L.-1-r---...,
______
L -_ _ _ _
____
~

~

1.5

0.5

VI-Input Voltage-V

VI-Input Voltage-V

FIGURE 1

FIGURE 2

SN54LS'
NONINVERTING OUTPUT VOLTAGE

SN74LS'
NONINVERTING OUTPUT VOLTAGE

vs

vs

INPUT VOLTAGE

INPUT VOLTAGE

5

>I

(J)

,......

C1l

t

~.

:.
:'
:'

I

~

J

e

t

0
I
0

I

:1

'I
.1

:'

::J

,,:,

2

1.5

0

o

2

VI-Input Voltage-V

I

!

I
I

+

I
I
I

1

I

I
I
I

,:

I
I

0.5

-----

I
I

•

I

___ JI

____~______L -_ _ _ _~_ _ _ _~

. ......... ..........
r---

I

>

l

p
:,

'fL-'

3

>....
::J

I

"

:1

"0

2

I
°
•••••••• T A = 70 C
--TA=25°C
TA = bOc

4

m

.J

1.5

0.5

2

VI-Input Voltage-V
FIGURE 4

FIGURE 3

3-1238 ,

,

i

" ! : \
21------~--~~~4-~~----~

••••••••• TA = 125 C
---TA25°C
41-------+------+.-...------TA = _55° C-

o

:

6....

5r------.------r------rI ---o- - .

O~

:11'\\

~ 3~----~1--~~~~----~----~

1\

o
o

----- ~

2l,

\

-I
-I
r

I
°
••••••••• TA
= 70 C
---TA=25°C
4~-----r----~--~~TA=0°C-

.............

>....
::J

e

5

I
°
•••••••• TA = 125 C
---TA=25°C
TA = _55°C

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

1283

TYPES SN54LS641, SN54LS642, SN54LS644,
SN74LS641, SN74LS642, SN74LS644
OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage: All inputs and I/O ports ........................................................... 7 V
Operating free-air temperature range: SN54LS641, SN54LS642, SN54LS644 .................. - 55° e to 125° e
SN74LS641, SN74LS642, SN74LS644 ...................... O°C to 70 0 e
Storage temperature range .......................................................... - 65° e to 150° e
NOTE 1: Voltage values are with respect to network ground terminal.

recommended operating conditions
PARAMETER

Vee

Supply voltage

VIH

High-level input voltage

SN54LS641

SN74LS641

SN54LS642

SN74LS642

SN54LS644.

SN74LS644

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

2

VIL

Low-level input voltage

0.5

0.6

VOH

High-level output voltage

5.5

5.5

12

24

IOL

Low-level output current

TA

Operating free-air temperature

48§
- 55

125

V
V

0

70

V
V
mA
°e

§The 48 mA limit applies for the SN74LS641-1, SN74LS642-1, and SN74LS644-1 only.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS t

PARAMETER

SN54LS641

SN74LS641

SN54LS642

SN74LS642

SN54LS644

SN74LS644

MIN
VIK
Hysteresis
(VT+ - VT_)
IOH

VOL

Vee; MIN,

11;-18mA

Vee; MIN,

A or B input

Vee; MIN,

VIH;2V,

VIL; MAX,

VOH;5.5V

Vee - MIN,

IOL-12mA

VIH;2V,

IOL;24mA

VIL
II

I A or B

I DIR or G

= MAX

Vee; MAX

TYP*

MAX

0.1

0.4

MAX
V

en
w

V

0.4

U
0.1
0.25

0.4

IOL - 48 mAs

0.1
0.25
0.35

0.5

0.4

0.5

0.1

0.1

VI; 7 V

0.1

0.1

Vee; MAX,

VI; 2.7 V

20

Vee; MAX,

VI;O.4V

-0.4

Vee; MAX,

Outputs open

I Outputs high

mA

0.4

VI; 5.5 V

IIH

I Outputs low
I Outputs at Hi-Z

TYP*

-1.5
0.2

IlL

lee

MIN

-1.5

UNIT

20
- 0.4'

48

70

48

62

90

62

70
-90

64

95

64

95

>
w

C

V

...J

mA

t....

pA
mA

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t All typical values are at Vee; 5 V, TA; 25°C.
§The 48 mA condition applies for the SN74LS641-1, SN74LS642-1, and SN74LS644-1 only.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1239

S331A30

Cf

1.u.1I
oen-l
oz-<
-I ...... "'tII
~oI:Ioom
r-r-en

N

~

o

switching characteristics at Vee = 5 V, T A = 25°e
FROM

TO

(INPUT)

(OUTPUT)

Propagation delay time,

A

B

low-to-high-Ievel output

B

A

Propagation delay time,

A

B

output

B

A

Output disable time

G,DIR

A

from low level

G,DIR

B

Output enable time
'
from high level

G,D1R

A

G,DIR

B

PARAMETER

tPLH

tpHL
tPLH
tpHL
NOTE 2:

high-to-Iow~evel

TEST CONDITIONS

CL=45pF,
RL,= 667

n,

See Note 2

'LS641, 'LS641-1
MIN

'LS642, 'LS642-1

'LS644, 'LS644-1

TYP

MAX

TYP

MAX

25

19

25

17

25

17

25

19

25

19

25

16

25

14

25

14

25

16

25

14

25

16

25

TYP

MAX

17

MIN

MIN

23

40

26

40

26

40

25

40

28

40

25

40

34

50

43

60

43

60

37

50

39

60

37

50

ns
ns

~ ...... Q)

ZoI:Ioool:loo

en r-~"""

o~en
!!!oI:Ioo Z
w

SBA~~-------r----~~
CAB--:"';;.:..w:~

C

SAB~~--r---~I~~

r

-'OFBCHANNELS - -

...I

- ----- ---

-

lI-

-,

I

I

I
I
I
I

~ (20)

(4)

A 1 -+-'--'1-+--4

I

B1

I
I
I
I
I
I
I

~------------~vr--------------~
TO 7 OTHER CHANNELS
Pin numbers shown on logic notation are for OW or NT packages.

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1243

TYPES SN54LS646 THRU SN54LS649,
SN74LS646 THRU SN74LS649
OCTAL BUS TRANSCEIVERS AND REGISTERS
schematics of inputs and outputs
EQUIVALENT OF DIRECTION INPUTS

EQUIVALENT OF ALL OTHER INPUTS

VCC

VCC

INPUT
INPUT

A and B: Req = 15 kn NOM
Req = 10 kn NOM
SAB and SBA: Req = 6 kn NOM

G, CAB and CBA:

TYPICAL OF ALL 'LS646, 'LS648 OUTPUTS'

TYPICAL OF ALL 'LS647, 'LS649 OUTPUTS

VCC

___

-I
-I

rC
m

OUTPUT

<
C')

m
en

3-1244

TEXAS

"!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

~OUTPUT

TYPES SN54LS646, SN54LS647, SN74LS646, SN74LS647
OCTAL BUS TRANSCEIVERS AND REGISTERS'
logic symbols
'LS647

'LS646

G

(211

OIR (31

G

G3

(211

OIR (31

3 ENl [BA]

CBA (23)

DC4

SBA (221
(11
CAB
(21
SAB

SBA (22)
(1)
CAB
(2)
SAB
;;>1

Bl

5

IT C4
IT G5
IT C6
(201

(201
(41
Al

3 ENl [BA]
3 EN2 [AB]

3 EN2 [AB]
CBA (23)

G3

(41

Bl

Al

S-

5

IT

;;>1
(5)

'1

(19)

(51
B2

A2
(S)

(18)

(7)

(17)

(8)

(161

(91

(151

(101

(14)

(111

(131

B3

A3

B4

A4

B5

A5

86

A6

B7

A7

BS

AS

IT

-:;

(19)

A2

B2
(61

(18)

(71

(171

(8)

(161

(91

(151

(101

(14)

(111

(13)

B3

A3

A4

B4

A5

B5

A6

B6

B7

A7

AS

B8

B
en
W

U
Pin numbers shown on logic notation are for OW or NT packages.

>
w
C

...J

lI-

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1245

TYPES SN54LS648, SN54LS649, SN74LS648, SN74LS649
OCTAL BUS TRANSCEIVERS AND REGISTERS
logic symbols (continued)
'LS649

'LS648

G

_ (21)
G
(3)
DIR

(21)

DIR (3)

C6A (23)

C6A

IT C4

S6A (22)
(1)
CA6
(2)
SA6

S6A
CA6
SA6
;,1

61

Al

IT C4

(22)
(1)

11 C6

(2)
(20)

(20)
(4)

(23)

5"

(4)

61

Al

5"

>,1
(5)

-:;

(19)

(6)

(18)

(7)

(17)

(8)

(16)

(9)

(15)

(10)

(14)

(11)

(13)

63

A3

64

A~

65

A5

66

A6

II
---f
---f
r-

o

(5)
62

A2

67

A7

,88

A8

(19)
62

(6)

(18)

(7)

(17)

(8)

(16)

(9)

(15)

(10)

(14)

(11)

(13)

63

A3

64

A4

A5

65

A6

66

67

A7

A8

Pin numbers shown on logic notation are for DW or NT packages.

m

:5
(")

m

(J)

3-1246

If

A2

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

68

TYPES SN54LS646, SN54LS648, SN74LS646, SN74LS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc ......................................................................... 7 V
Input voltage: Control inputs ................................................................ " 7 V
I/O ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS646, SN54LS648 ............ . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74LS646, SN74LS648 ................................ O°C to 70°C
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65°C to 150°C

recommended operating conditions
SN54LS646/648

Vce

Supply voltage

VIH

High-level input voltage

VIL

Low·level input voltage

10H

High·level output current

10l

Low·level output current

before CABt or CBA t
Hold time

th

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

CBA or CAB high

15

2

V
V

0.5

0.6
-15

mA

V

24

mA

15

eBA or CAB low

30

30

30

30

Aor B

15

15

0

Operating free-air temperature

UNIT

-12

Data high or low

Aor B

after CABt or CBA t

TA

MAX

12

Setup time
tsu

NOM

2

Pulse duration

tw

SN74 LS646/648

MIN

ns

ns
ns

0

- 55

125

0

70

°e

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
Hysteresis
(VT+-VT-)

VCC = MIN,
input

A or B ports
Control inputs
A or B ports'"
Control inputs

IlL

VIH = 2 V,

VIL = MAX
Control inputs

A or B ports'"

lOS ~

10H = - 3 mA
10H = - 12 mA

TYPt

0.4

0.2

0.4

3.4

2.4

3.4

MAX
-1.5

en

V

w
U

>
w

V

2

C

2
0.25

IOL=12mA

0.4

0.25

0.4

0.35

0.5

0.1

0.1

VCC = MAX, VI = 5.5 V

0.1

0.1

20

20

20

20

-0.4

-0.4

Vec = MAX, VI=2.7V
Vee = MAX, • VI = 0.4 V

Vec = MAX

UNIT

V

Vce = MAX, VI = 7 V

LS646

LS648

2.4

SN74LS646/648
MIN

10L = 24 mA

-0.4
- 40

Vce = MAX, Vo = OV

ICC

0.1

MAX

10H = -15 mA

VCC = MIN,

IIH

VIH=2V,

VIL = MAX

VOL

TYPt

-1.5

VCC = MIN
VC.C = MIN,

MIN

II = - 18 mA

A or B

VOH

II

SN54 LS646/648

TEST CONDITIONSt

-225

- 0.4
-40

- 225

Outputs high

91

Outputs low

103

165

103

165

Outputs disabled

103

165

103

165

145

91

..J

V
mA

~
~

JlA
mA
mA

145

Outputs high

91

145

91

145

Outputs low

103

165

103

165

Outputs disabled

120

180

120

180

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at Vee = 5 V, TA = 25°e.
~ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
'" For I/O ports, the parameters IIH and IlL include the off-state output current.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1247

TYPES SN54LS646, SN54LS648, SN74LS646, SN74LS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
switching characteristics, Vee
PARAMETER
tPLH

=5 V, TA =25°e

FROM

TO

(INPUT)

(OUTPUT)

CAB or CBA

Aor B

A or B

B or A

'LS646

TEST CONDITIONS

MIN

TYP

tpHL
tPLH
tpHL
tPLH

SAB or SBAt

'LS648
MAX

MIN

TYP

MAX

UNIT

15

25

15

25

ns

23

35

24

40

ns

12

18

12

18

ns

13

20

15

25

ns

26

40

37

55

ns

21

35

24

40

ns

33

50

26

40

ns

with Bus
tpHL
tpLH

input high
SAB or SBAT

Aor B

RL

~

667 n,

CL

~

45 pF,

See Note 2

with Bus
tpHL
tpzH
tpZL

input low

G
AorB

tpZH
tpZL
tpHZ
tPLZ
tpHZ

DIR

G
Aor B
DIR

RL~667n,

CL

~

5 pF,

See Note 2

tpLZ

II

14

25

23

40

ns

33

55

30

50

ns

42

65

37

55

ns

28

45

23

40

ns

39

60

30

45

ns

23

35

28

45

ns

22

35

22

35

ns

20

30

24

35

ns

19

30

19

30

ns

tpLH ~ propagation delay time, low-to-high-Ievel output
tpHL ~ propagation delay time, high-to-Iow-Ievel output
tpZH ~ output enable time to high level
tpZL ~ output enable time to low level
tpHZ ~ output disable time from high level
tpLZ = output disable time from low level
t These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
NOTE 2: See General Information Section for load circuits and voltage waveforf'1S.

-4
-4
r-

C

m
~

nm

CJ)

3-1248

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS647, SN54LS649, SN74LS647, SN74LS649
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH OPEN-COLLECTOR OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1) ............................................................... 7 V
Input voltage (control inputs) '" ............................................................... 7 V
Off-state output voltage (A and B ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range: SN54LS647, SN54LS649 ............................ - 55°C to 125°C
SN74LS647, SN74LS649 .............................. - oOe to 70°C
Storage temperature range ................ " ...................................... " - 65°C to 150°C

recommended operating conditions
SN54LS647

SN74LS647

SN54LS649

Vce

Supply voltage

VIH

High-level input voltage

SN74LS649

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

2

V
V

2

VIL

Low-level input voltage

0.5

0.6

VOH

High-level output voltage

5.5

5.5

V

IOL

Low-level output voltage

12

24

mA

tw

Pulse duration
Setup time

tsu

before CAB t or eBA t
Hold time

th

CBA or CAB high

15

15

CBA or CAB low

30

30

Data high or low

30

30

A or B

15

15

A or B

after CAB t or CBA t

0

Operating free-air temperature

TA

125

- 55

V

ns

ns

0

ns

0

°c

70

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

TEST CONDITIONSt

SN54LS647

SN74LS647

SN54LS649

SN74LS649

MIN
VIK
Hysteresis
(VT+ -VT-)

Vee = MIN,
A or B input

IOH

0.1
VIH = 2 V,

VIL = MAX,

VIH=2V,

IOL=12mA

VOL

VIL = MAX
Vee = MAX

All others

MIN

TYP*

0.2

0.4

0.1
0.25
0.35

0.4
0.5

VI = 5.5 V

0.1

0.1

VI = 7 V

0.1

0.1

mA

mA

20

20

/lA

Vee= MAX, VI = 0.4 V

-0.4

-0.4

mA

Ice
'LS649

Vee = MAX, Outputs open

79

130

79

130

Outputs low

94

150

94

150

Outputs high

79

130

79

130

Outputs low

94

150

94

150

l-

V

Vee = MAX, VI = 2.7 V
Outputs high

-I

I-

IIH

Vee = MAX, Outputs open

U
C

IlL
'LS647

en
w

>
w

V
V

0.4

0.1
0.25

MAX
-1.5

IOL = 24 mA

A or B
II

0.4

VOH = 5.5 V
Vee = MIN,

MAX
-1.5

Vee = MIN
Vee = MIN,

TYP*

II =-18mA

UNIT

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

t

All typical values are at Vee

=

5 V, T A

= 25°e.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1249

TYPES SN54LS647, SN54LS649, SN74LS647, SN74LS649
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH OPEN-COLLECTOR OUTPUTS
switching characteristics, Vee
PARAMETER
tPLH
tpHL
tPLH
tpHL
tPLH
tpHL
tPLH
tpHL
tPLH
tpHL
tPLH
tpHL

FROM

=5 V, TA = 25°C

(INPUT)

TO
(OUTPUT)

CAB or CBA

AorB

Aor B

Bor A

'LS647

TEST CONDITIONS

MIN

TYP

SAB or SBAt

'LS649
MAX

MIN

TYP

UNIT

22

35

17

30

ns

28

45

28

45

ns

17
18

26

15

25

ns

27

20

30

ns

33

50

37

55

ns
ns
ns

with Bus
input high

A or B

SAB or SBAt

Rt.: = 667

n,

CL = 45 pF,

See Note 2

29

45

28

45

39

60

30

45

19

30

26

40

ns

25

40

21

40

ns

33

50

34

50

ns

23

35
40

19

30

ns

27

45

ns

with Bus
input low

G
A or B
DIR

25

tpLH = propagation delay time, low-to-high-Ievel output
tpHL = propagation delay time, hlgh-to-low-levlIl output
t These parameters are measured with the internal outputs state of the storage register opposite to that of the bus Input,
NOTE 2: See General Information Section for load circuits and voltage waveforms.

II
-I
-I

r-

C

m

~

o
m
en

3-1250

MAX

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS651 THRU SN54LS654
SN74LS651 THRU SN74LS654
OCTAL BUS TRANSCEIVERS AND REGISTERS
D2637, JANUARY 1981 -

SN54LS' ... JTPACKAGE
SN74LS' ... DW, JT OR NT PACKAGE

•

Bus Transceivers/Registers

•

Independent Registers and Enables for A and
B Buses

(TOP VIEW)

CAB
SAB
GAB
A1
A2
A3

• Multiplexed Real-Time and Stored Data
•

Choice of True and Inverting Data Paths

•

Choice of 3-State or Open-Collector
Outputs to A Bus

•

Dependable Texas Instruments Quality and
Reliability
B OUTPUT

A OUTPUT

DEVICE
LS651

3-State

REVISED DECEMBER 1983

A4
A5
A6
A7
A8
GNO

LOGIC

3-State

Inverting

LS652

3-State

3-State

True

LS653

Open-collector

3-State

Inverting

LS654

Open-collector

3-State

True

VCC
CBA
SA
GBA
B1
B2
B3
B4
B5
B6
B7
B8

SN54LS' ... FK PACKAGE
SN74LS' ... FN PACKAGE
(TOP VIEW)

description
These devices consist of bus transceiver circuits, Ootype
flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the data bus or from
the internal storage registers. Enable GAB and GBA are
provided to control the transceiver functions. SAB and
SBA control pins are provided to select whether realtime or stored data is transferred. A low input level
selects real-time data, and a high selects stored data.
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 'LS651, 'LS652, 'LS653, and 'LS654.

4

3

2

1 28 2726

B4
B5

CI)

W

12 1314 151617 18

U

>
w

NC -

C

No internal connection

...J

lI-

~

~
GAB GBA
L

L

CAB

CBA

SAB

SBA

X

X

X

L

GAB
H

PRODUCTION DATA

~~~~d:~~S~~rl~arntliu~~Ot~~~f~~nof~~f~~~~~e~~:s~

CBA
X

SAB
L

SBA
X

REAL-TIME TRANSFER
BUSA TO BUS B

REAL-TIME TRANSFER
BUS B TO BUS A

This document contains information current as
of publication date. Products conform to
speclficaticns per the terms of Texas Instruments

GBA CAB
X
H

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1251

TYPES SN54LS651 THRU SN54LS654
SN74LS651 THRU SN74LS654
OCTAL-BUS TRANSCEIVERS AND REGISTERS

~

~
GAB GBA CAB
t
H
X
X
X
L
H
L

CBA
X

SAB
X
X
X

SBA
X
X
X

CBA SAB
GAB GBA CAB
L H or L H or L H
H

TRANSFER
STORED DATA
TOA AND/OR B

STORAGE FROM
AAND/OR B

Data on the A or B data bus, or both, can be stored in the internal D flip-flop by low-to-high transitions at the appropriate
clock pins (CAB or CBA) regardless of the select or enable control pins. When SAB and SBA are in the real-time transfer
mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling GAB and GBA.
In this configuration each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at
high impedance, each set of bus lines will remain at its last state.

II

The SN54LS651 through SN54LS654 are characterized for operation over the full military temperature range of -55°C to
125°C. The SN74LS651 through SN74LS654 are characterized for operation from O°C to 70°C.

-t
-t
r-

C

m
~

(")

m

(J)

SBA
H

FUNCTION TABLE
DATA 1/0*

INPUTS
GAB GBA

CAB

CBA

SAB

SBA

X
X
X
X
X
X
X
X

X
X
X
X
X
X

L

H

H or L

H or L
H or L

t

L

H

X

H

H

H

t
t
t

L

X

H or L

L

L

t

L

L

L

L

H or L

t
t
t

A1 THRU A8

B1 THRU B8

Input

Input

Isolation

Store A and B Data

Store A and B Data

Store A, Hold B

Store A, Hold B .
Store· A in both registers

Not specified

Input

Output

Store A in both registers

Not specified

Input

Hold A, Store B

Hold A, Store B

Output

Input

Store B in both registers

Store B in,both registers

Output

Input

H

H

X

L

H

H

H or L

X

H

X
X

Input

Output

H

L

H or L

H or L

H

H

Output

Output

L
H

'LS652, 'LS654

Isolation

Input

X
X
X

X

OPERATION OR FUNCTION
'LS651, 'LS653

Real-Time B Data to A Bus

Real-Time B Data to A Bus

Stored B Data to A Bus

Stored B Data to A Bus

Real-Time A Duta to B Bus

Real-Time A Data to B Bus

Stored A Data to B Bus

Stored A Data to B Bus

Stored A Data to B Bus and

Stored A Data to B Bus and

StoredB Data to A Bus

Stored B Data to A Bus

• The data output functions may be enabled or disabled by various signals at the GAB and GBA inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.

3-1252

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS651 THRU SN54LS654
SN74LS651 THRU SN74LS654
OCTAL BUS TRANSCEIVERS AND REGISTERS
logic diagrams (positive logic)
'LS651, 'LS653

GBA

-='-'----
w

.....!!:.::.!......,------+---~

C

~C-.---+-H

-I

lI-

(20)
&-l-+-...;.......~B1

(4)

A1~~+-+-O

~--------------~v~-------~
TO 7 OTHER CHANNELS
Pin numbers 5hown on logic notation are for DW. JT or NT packages.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012. DALLAS. TEXAS 75265

3-1253

TYPES SN54LS651 THRU SN54LS654
SN74LS651 THRU SN74LS654
OCTAL BUS TRANSCEIVERS AND REGISTERS
logic symbols
'LS651
GBA (21)

ENl [BA]

GAB (3)
CBA (23)

EN2 [AB]

SBA (22)
(1)
CAB
(2)
SAB

'LS652
GBA (21)
(3)
GAB
(23)
CBA
(22)
SBA
(1)
CAB
(2)
SAB

C4
G5
C6
(20)

(4)

Bl

Al

A2

(5)

(19)
B2

(6)

(18)

(7)

(17)

(8)

(16)

(9)

(15)

A3

B3

A4

B4

A5
A6
(10)

(14)

(11)

(13)

A7
A8

II
~
~

r0

m
~

(')

m

C6
(20)
Bl

(5)

(19)

(6)

(18)

(7)

(17)

(8)

(16)

(9)

(15)

(10)

(14)

(11)

(13)

A2

B2

A3

B3

A4

B6

A6

B4
B5
B6

A7

B7

A8

B8

'LS654

'LS653
GBA (21)

ENl [BA]

GAB (3)
CBA (23)

EN2 [AB]

SBA (22)
(1)
CAB
(2)
SAB

G5

(4)

GBA (21)
(3)
GAB
(23)
CBA
(22)
SBA
(1)
CAB
(2)
SAB

C4
C6
(20)
Bl

Al

en

A2

(5)

B2
(18)

(7)

(17)

(8)

(16)

(9)

(15)

(10)

(14)

B3

A4

B4

A5

B5

AS
A7
(11)
A8

(4)

ENl [BA]
EN2 [AB]
C4
G6

(20)
Bl

Al

(19)

(S)
A3

(5)

(19)

(6)

(18)

(7)

(17)

(8)

(16)

(9)

(15)

(10)

(14)

(11)

(13)

A2

B2

A3

B3

A4

B4

A5

B6

A6

B7

A7

B8

A8

(13)

B5
B6
B7

Pin numbers shown on logic notation are for DW. JT or NT packages.

3-1254

C4
G6

(4)

A5

B8

EN2 [AB]

Al

B5

B7

ENl [BA]

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

B8

TYPES SN54LS651, SN54LS652, SN74LS651, SN74LS652
OCTAL BUS TRANSCEIVERS AND REGISTERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
.
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range: SN54LS651, SN54LS652 .... , . . . . . . . . . . . . . . . . . . . - 55°C to 125°C
SN74LS651, SN74LS652. . . . . . . . . . . . . . . . . . . . . . . . . .. OoC to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C

recommended operating conditions
SN54LS651

SN74LS651

SN54LS652

SN74LS652

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

.5.5

4.75

5

5.25

V

0.7

0.8

V

VCC

Supply voltage

VIH

High·level input voltage

VIL

Low-level input voltage

IOH

High·level output current

-12

-15

mA

IOL

Low·level output current

12

24

mA

Pulse duration

tw

Setup time
tsu

before CAB t or CBA t
Hold time

th

after CAB t or CBA t

2

CBA or CAB high

15

15

CBA or CAB low

30

30

Data high or low

30

30

Aor B

15

15

Aor B

0

0

Operating free-air temperature

TA

V

2

-55

125

ns

ns
ns
70

0

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS651
PARAMETER

TEST CONDITIONSt

MIN
VIK
VOH

VCC = MIN,

II = - 18 mA

VCC = MIN,

VIH = 2 V,

VIL = MAX,
VCC = MIN,

VOL
II

SN74LS652

MAX

VIH=2V,

MIN

2.4

IOH = - 3 mA

3.4

UNIT

TYPt MAX

-1.5

-1.5
2.4

0.25

0.4

0.25
0.35

IOL = 24 mA

0.4
0.5

VCC = MAX,

VI = 7 V

0.1

0.1

A or B ports

VCC= MAX,

VI = 5.5 V

0.1

0.1

VCC = MAX,

VI = 2.7 V

Aor B ports A
A or B ports A

lOS ~

VCC = MAX,

VI = 0.4 V

VCC = MAX,

Vo = OV

LS651
VCC= MAX

ICC
LS652

w
U

V

>
w

V

...J

2

IOL=12mA

20

20

20

20

- 0.4

-0.4

-0.4
-40

-225

-0.4
-40

- 225

Outputs high

95

145

95

Outputs low

103 .

165

103

165

Outputs disabled

103

165

103

165

rn

V

3.4

2

IOH=-12mA
IOH = -15 mA

VIL = MAX,

Control inputs
IlL

TYPt

Control inputs
Control inputs
IIH

SN74LS651

SN54LS652

C

mA

lI-

JJA
mA
mA

145

Outputs high

95

145

95

145

Outputs low

103

165

103

165

Outputs disabled

120

180

120

180

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*

All typical values are at Vee = 5 V, T A = 25°e.
~ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
A For I/O ports, the parameters II H and II L include the off-state output current.

TEXAS

.JI.!1

INSTRUMENTS POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1255

TYPES SN54LS651, SN54LS652, SN74LS651, SN74LS652
OCTAL BUS TRANSCEIVERS AND REGISTERS

=5 V, TA = 25°e

switching characteristics, Vee
PARAMETER

FROM

TO

(INPUT)

(OUTPUT)

TEST CONDITIONS

'LS651

TYP

MAX

14

24

15

25

ns

23

35

24

36

ns

9

18

12

18

ns

20

30

13

20

ns

31

47

23

35

ns

22

33

21

32

ns

23

35

33

50

ns

19

30

15

23

ns

29

44

30

45

ns

40

60

36

54

ns

19

29

20

30

ns

tPZL

26

40

25

38

ns

tPHZ

25

38

25

38

ns

19

30

19

30

ns

25

38

25

38

ns

19

30

19

30

ns

Clock

Bus

tpHL
tPLH

Bus

Bus

tpHL
tpLH

Select, with

tpHL

bus input
high t

tPLH

Select, with

Bus

RL = 667 n,

CL=45pF,

See Note 2

bus input
tPHL
tpZH
tpZL
tpZH

tpLZ
tPHZ
tPLZ

-I
-I

lowt
GBA

A Bus

GAB

B Bus

GBA

A Bus

GAB

B Bus

RL=667n,

CL=5pF,

See Note 2

MIN

tpLH = propagation delay time, low-to-high-Ievel output_
tpH L = propagation delay time, high-tO-I~-w-level output
tpZH = output enable time to high level
tpZL = output enable time to low level
tpHZ = output disable time from high level
tpLZ = output disable time from low level
t These parameters are measured with the internal output state of the storage register opposite to that of the bus input_
NOTE 2: See General Information Section for load circuits and voltage waveforms.

schematics of inputs and outputs

r-

EQUIVALENT OF GAB INPUTS

C
m

<

EQUIVALENT OF ALL OTHER INPUTS
VCC

VCC

TYPICAL OF ALL OUTPUTS

VCC

(")

m·

INPUT

en

INPUT
OUTPUT

A and B: Req = 15 kn NOM
GBA, CAB and CBA: Req = 10 kn NOM
- SAB and SBA: Req = 6 kn NOM

3-1256

UNIT

MAX

tPLH

II

'LS652

TYP

MIN

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS653, SN54LS654, SN74LS653, SN74LS654
OCTAL BUS TRANSCEIVERS AND REGISTERS
absolute maximum ratings over. operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee ......................................................................... 7 V
Input voltage: All inputs and A I/O ports ......................................................... 7 V
B I/O ports ................................. '................................... 5.5 V
Operating free·air temperature range: SN54LS653, SN54 LS654 ............................. - 55°C to 125°C
SN74LS653, SN74LS654 ................................ oOe to 70°C
Storage temperature range ........................................................... - 65°C to 150°C

recommended operating conditions
SN54LS653

SN74LS653

SN54LS654

SN74LS654

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

V

VCC

Supply voltage

VIH

High-level input voltage

VIL

Low-level input voltage

VOH

High-level output voltage

A ports

5.5

5.5

10H

High-level output current

B ports

-12

-15

mA

10L

Low·level output current

24

mA

2
0.7

12
CBA or CAB high

Pulse duration

tw

Setup time
tsu

before CAB t or CBA t
Hold time

th

15

15

CBA or CAB low

30

30

Data high or low

30

30

Aor B

15

15

Aor B

after CAB t or CBA t

0

Operating free-air temperature

TA

V

2

ns

ns
ns

0

-55

125

V

70

0

°c

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS653
PARAMETER

TEST CONDITIONSt
MIN

VIK
VOH

B ports

VCC= MIN,

11=-18mA

VCC = MIN,

VIH = 2 V,

VIL = MAX

SN74LS653

SN54LS654
TYP*

SN74LS654

MAX

10H = - 3 rnA
10H = -12 rnA

2.4

3.4

10H

A ports

II

IlL
lOS ~

VOH = 5.5 V

VCC - MIN,

VIH - 2 V,

VIL = MAX

-1.5
2.4

0.1
0.25

IOL=12mA

0.1

0.4

10L = 24 mA

0.25

0.4

0.35

0.5

VI = 7 V

0.1

0.1

VCC = MAX,

VI = 5.5 V

0.1

0.1

20

20

VCC = MAX,

Aor B ports'"
B ports

VCC = MAX,
VCC = MAX,

LS653
VCC = MAX

ICC
LS654

VI = 2.7 V
VI = 0.4 V

Vo =OV

>
w

2

VCC = MAX,

A or B ports ...

w
U

V

2

A or B ports

Control inputs

en

V

3.4

Control inputs
Control inputs
IIH

VCC= MIN,

UNIT

TYP* MAX

-1.5

10H =- 15mA

VOL

MIN

20

20

-0.4

-0.4

-0.4

-0.4

Outputs high

95

-225
145

Outputs low

103

Outputs disabled

103

Outputs high

95

-225
145

165

103

165

165

103

165

95

145

95

145

Outputs low

105

170

105

170

Outputs disabled

120

180

120

180

-40

-40

rnA

C

-I

V

lI-

mA
/lA
mA
mA

rnA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

*

All typical values are at Vce = 5 V, TA = 25°e.
~ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second •
... For I/O ports, the parameters II H and II L include the off-state output current.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1257

TYPES SN54LS653, SN54LS654, SN74LS653, SN74LS654
OCTAL BUS TRANSCEIVERS AND REGISTERS
switching characteristics, Vee
PARAMETER
tPLH

= 5V, T A =25°e

FROM

TO

(INPUT)

(OUTPUT)

CBA

'LS653

TEST CONDITIONS

MIN

'LS654

TYP

MAX

TYP

MAX

25

38

22

33

26

39

24

36

A Bus

tPHL

MIN

15

23

14

21

tPHL

24

36

22

33

tPLH

10

18

10

18

20

30

20

30

21

32

18

27

16

24

14

21

38

57

32

48

26

39

21

32

34

51

36

54

23

35

19

29

32

48

23

35

22

33

18

27
45

tPLH

CAB

B Bus

A Bus

B Bus

B Bus

A Bus

tPHL
tpLH
tPHL
tPLH

SBAT

tPHL

(with B high)

tpLH

SBAt

tpHL

(with Blow)

tPLH

SABt

tPHL

(with A high)

tPLH

SABt

tPHL

(with A low)

tPLH

RL

= 667 n,

CL=45pF,

See Note 2

A Bus
A Bus
B Bus
B Bus

GBA

A Bus

GAB

B Bus

tPHL
tPZH

n,

tPZL

RL = 667

tPHZ

See Note 2

GAB

B Bus

CL = 5 pF,

tPLZ

24

36

30

20

30

14

21

23

35

23

35

37

55

35

53

19

29

19

29

25

38

22

33

26

39

26

39

19

29

19

29

UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

t These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
NOTE 2:

-i
-i
r-

See General Information Section for load circuits and voltage waveforms.

schematics of inputs and outputs
EQUIVALENT OF GAB INPUTS

C

m

TYPICAL OF B OUTPUTS

Vee

Vee

<

EQUIVALENT OF ALL OTHER INPUTS

Vee

--r;;-

9 kS"lNOM

n

m
en

INPUT
INPUT

OUTPUT

Aand B: ReQ = 15 kS"lNOM
GBA, CAB and CBA: ReQ = 10 kS"l NOM
SAB and SBA: ReQ = 6 kS"l NOM

3-1258

TYPICAL OF A OUTPUTS

.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

OUTPUT

TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669
SYNCHRONOUS 4-BIT UPIDOWN COUNTERS
02351, APRIL 1977-REVISED APRIL 1985

'LS668 ... SYNCHRONOUS UP/DOWN DECADE COUNTERS
'LS669 ... SYNCHRONOUS UP/DOWN BINARY COUNTERS
SN54LS668, SN54LS669 ... J PACKAGE
SN74LS668, SN74LS669 ... D, J OR N PACKAGE

Programmable Look-Ahead Up/Down
Binary/Decade Counters

(TOP VIEW)
Cl

Fully Synchronous Operation for Counting
and Programming

U/D
ClK
A
B
C
D
ENP
GND

• Internal Look-Ahead for Fast Counting
., Carry Output for n-Bit Cascading
• Fully Independent Clock Circuit
• Buffered Outputs
TYPICAL MAXIMUM
TYPE

CLOCK FREQUENCY
COUNTING ICOUNTING
UP

'LS668, 'LS669

32 MHz

DOWN

I

32 MHz

TYPICAL

VCC
RCO
OA
OB
Oc
OD
ENT
lOAD

POWER

SN54LS668, SN54LS669 ... FK PACKAGE
SN74LS668, SN74LS669 ... FN PACKAGE

DISSIPATION

(TOP VIEW)

100mW

l e u ~18
:5
u::;)Z>a:

description
These synchronous presettable counters feature an internal carry look-ahead for cascading in high-speed
counting applications. The 'lS668 are decade counters
and the 'lS669 are 4-bit binary counters. Synchronous
operation is provided by having all flip-flops clocked
simultaneously so that the outputs change coincident
with each other when so instructed by the count-enable
inputs and internal gating. This mode of operation helps
eliminate the output counting spikes that are normally
associated with asynchronous (ripple-clock) counters.
A buffered clock input triggers the four master-slave
flip-flops on the rising (positive-going) edge of the clock
waveform.

A
B
NC

C
D

U)

W
C,.)

>
W

NC - No internal connection

C
...J

These counters are fully programmable; that is, the outputs may each be preset to either level. The load input circuitry allows
I'oading with the carry-enable output of cascaded counters, As loading is synchronous, setting up a low level at the load input
disables the counter and causes the outputs to agree with the data inputs after the next clock pulse.

I-I--

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional g~ting.
Instrumental in accomplishing this function are two count-enable inputs and a carry outp~t. Both count enable inputs (P and
T) must be low to count. The direction of the count is det~mined by the level of the up/down input. When the input is high,
the counter counts up; when low, it counts down. Input T is fed forward to enable the carry output. The carry output thus
enabled will' produce a low-level output pulse when the count is maximum counting up or zero counting down. This low-level
overflow carry pulse can be used to enable successive cascaded stages. Transitions at the enable P or T inputs are allowed
regardless of the level of the clock input. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design.
These counters feature a fully independent clock circuit. Changes at control inputs (enable P, enable T, load,
up/down) that will modify the operating mode have no effect until clocking occurs. The function of the counter (whether'
enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times.
The 'lS668 and 'lS669 are completely new designs. Compared to the original 'lS168 and 'lS169, they feature
O-nanosecond minimum hold time, reduced input currents IIH and Ill, and all buffered outputs.
PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
speCifications per the terms of Texas Instruments

~~~n~:~:s':'a~il~ar~~iu~~Ot~~~r~~nof~~f~~~~n~e~~~s~

I).

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1259

TYPES SN54LS668, SN74LS668
SYNCHRONOUS 4-81T UPIDOWN COUNTERS
logic diagram
CLOCK

(1)

U/O

·LOAD

ENABL

P

~

EQl

ENABLE (~

T
DATA A

DATA B

SN54LS668, SN74LS668, DECADE COUNTERS

(2)

(3)

(4)

~
n-J
-

-U

~
{-

W
1

~

~p

1-»-

~"1D-1J
~~C1

--I

~

r--- 1'0'

~
[

r---w---k)

(13)

~>C1

---~

l~
tr'\.,.

-I
-I

~~

rC
m

:s

(')

m

en

DATAC

(5)

tJ)

-

J

I

r

DATAD

-

,

r

---l>=>

--<~C1

~~

(15)

r--

Pin numbers shown on logic notation are for D, J or N packages.

3-1260

~I

~_W~J

W

(6)=:1)

~i>C1

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS669, SN74LS669
SYNCHRONOUS 4-BIT UPIDOWN COUNTERS
logic diagram (continued)
SN54LS669, SN74LS669, BINARY COUNTERS

ENABLE
p

(7)
-.-----~

.-----.

DA TA A _(3_)....----......__

DATAB_(4_)T-~-,~r-----r+-r-----------------+----+-----~

(J)

W

u

:>w
C

...J
~
~

DATAC_(5_)~~__r-~----~-r4----------------+----+-----~

DATAD_(6_)__~~~------+-~-r--------------------------~

P-----------------------------------~(~15~)-RC-O
Pin numbers shown on logic notation are for 0, J or N packages .

.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1261

TYPES SN54LS668, SN74LS668
SYNCHRONOUS 4-81T UPIDOWN COUNTERS'
'LS668 DECADE COUNTERS
logic symbol
typical load, count, and inhibit sequences
Illustrated below is the following sequence:
1.
2.
3.
4.

Load (preset) to BCD seven
Count up to eight, nine (maximum). zero, one, and two
Inhibit
Count down to one, zero (minimum). nine, eight, and seven

(14) aA
(13)
(12)

(4J

a

~

111) aD

(8J

Pin numbers shown on logic notation are for D, J or N packages.

A~

(I
IL
I

DATA

(NPUTS

II
-I
-I

rC

m

=:;

(")

s-.J
C~

I I
IL
I
I I

D

Ir

,L
I ,

CLOCK

U/D __
--,
J

"p AND T IL.--:~""";'-:-__________-'
I
I

m
CJ)

1
1 :

OS----n

___ .....J

.-

---------.....1

!

1 '-.

----n
I

°c ___ .....J
___ ,

I

I

r-

L.I_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _......;._ _ _ _ _ _ _ _ _~·

II

L-

°D ____ LiJ
Reo

----I
___ ...J
:

II
I I
1 I
711

LJ
9

I
0

2

2

II...

I
--COUNTUP--_.I_INHISIT...J
~.
I '

2

!--- COUN~DOWN

LOAD

3-1262

TEXAS

LJ
o

"!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

8
----_

TYPES SN54LS669, SN74LS669
SYNCHRONOUS 4-BIT UPIDOWN COUNTERS
'LS669 BINARY COUNTERS
logic symbol
typical load, count, and inhibit sequences
Illustrated below is the following sequence:

1. Load (preset). to binary thirteen
2. Count up to fourteen, fifteen (maximum). zero, one, and two

3. Inhibit
4. Count down to one, zero (minimum). fifteen, fourteen, and thirteen

Pin numbers shown on logic notation are for D. J or N packages.

,-L..._

A~

r
_ _ _

H _ _ _ _ _..J'
DATA
INPUTS

,--

C~

L-_

II

,--

D~

L-_

en

CLOCK

w

I

_

U

--rl~--~I~I------------------------~

>

II

UID __ J

w
C

I

P TIL--.;~_I:...-:____________
AND

---J

..J

. I

lI-

I

I

-

-

-,

°B ___

I:
I .-------,

L--.iJ
I

L

I

I I

I

RCa

-

-

LJ

II

-: 13 ::

U.

14

15

I

I

2:

: 2

IOO-----COUNT UP - - - - - I - I N H I B I T - I

I
I
I

LJ
1

J---

0

15

14

13

COUNT DOWN - - - - -

LOAD

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1263

TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669
SYNCHRONOUS 4-81T UP/DOWN COUNTERS
schematics of inputs and outputs

EQUIVALENT OF EACH INPUT

VCC

TYPICAL OF ALL OUTPUTS

--------~-- VCC

a
Req

INPUT

Load: Req

Data: Req

'-~~--

OUTPUT

10 kn NOM'

=

= 25

kH NOM

Clock, Enable P, T, UfO: Req = 20 kll NOM

Babsolute maximum ratings

-i
-i

o~er

operating free-air temperature range lunless otherwise noted)

Supply voltage, Vee (see Note 1)
Input voltage
Operating free,air temperature range:

r-

C

m

!5
(')

m
en

7V
7V
G
-55 e to 125 e
aGe to 70Ge
0
-65°e to 150 e
G

SN54LS668,SN54LS669
SN74LS668, SN74LS669

Storage temperature range
NOTE 1:

Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS668
SN74LS669

SN54LS668
SN54LS669
MIN
4,5

Supply voltage, VCC

Low-level output current, IOL

NOM

5,5

4.75

5

Setup time, tsu (see Figure 1)

25

0

20

20

Data inputs A, B, C, D

25

25

ENP or ENT

40

40

LOAD

30

30

UfD

45

45
0

Width of clock pulse, tw(clock) (high or low) (see Figure 1)

0

Hold time at any input with respect to clock, th (see Figure 1)

3-1264

MIN

4
0

Clock frequency, fclock

temnerature T

5

MAX

-400

Hiqh·level output current, IOH

On~ratinn free~air

NOM

-55

A

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

125

0

UNIT

MAX
5.25

V

-400

JJ.A

8

mA

25

MHz
ns

ns

ns

70

0"

v

I

TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669
SYNCHRONOUS 4-81T UP/DOWN COUNTERS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS668

VI H

High·level input voltage

VI L

Low·level input voltage

VIK

Input clamp voltage

2
VCC - MIN,

II; -18 mA

VIL; VIL max, IOH; -400 IJA

2.5

Input current

A, B, C, D, P, UID
Clock, T

input voltage

LOAD

Vce; MAX,

A,B,C,D,P,U/D
VCC; MAX,

Clock, T
LOAD

Low·level

-1.5
2.7

3.4

3.4

A,B,C,D,P,U/D
Clock, T

Vce; MAX,

lOS

Short·circuit output current §

VCC; MAX

ICC

Supply current

VCC; MAX,

-20

0.1

0.1

0.1

0.2

0.2

20

20

20

20

40

40

-0.4

-0.4
-0.4

-0.8

-0.8

-100
20

See Note 2

0.1

-0.4

LOAD

-20

34

20

V

V
V

Vce - MIN,
\IOL ; 4 mA
0.25
0.4
0.25
0.4
VIH; 2 V,
ll------+--------+----------l
VIL;VILmax IOL;8mA
0.35
0.5

at maximum

input current

V

0.8

-1.5

VCC - MIN,

VOL Low·level output voltage

High·level

2
0.7

VOH High·level output voltage

input current

SN74LS668

SN54LS669
SN74LS669
UNIT
t-M-IN--T-Y-P"""';t-M-A-X-I-M-IN--T-y-p7t-M-A-X-l

TEST CONDITIONSt

PARAMETER

V

mA

IJA

mA

-100

mA

34

mA

tFor conditions shown as MIN or MAX, use the approp-riate value specified under recommended operating conditions_
tAli typical values are at Vee; 5 V, T A; 25°e_
.

§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed one second.
NOTE 2:

lee is measured after applying a momentarv 4.5 V, then ground, to the clock input with all other inputs grounded and the outputs
open.

switching characteristics, Vee
PARAMETER~

=5 V, T A = 25°e

FROM

en
w

TO

(INPUT)

TEST CONDITIONS

(OUTPUT)

f max
tPlH
tpHL
tplH
tPHl
tPlH
tPHL
tpLHO
tpHLO

CL;15pF,

Any
ClK

Rl; 2 kn,

Q

See Figures 2 and 3
RCO

ENT

ufo

MIN

TYP

25

32
26

RCO

CLK

II

RCO

MAX

UNIT
MHz

40

40

60

18

27

18

27

11

17

29
22

35

26

40

45

u

:>
w
C

ns

..J

lI-

ns
ns
ns

~ f max '= Maximum clock frequency
tpLH '= propagation delay time, 10w-tO-high-level output.
tPHL '= propagation delay time, high-to·low·level output.
°propagation delay time from up/down to ripple carry must be measured with the counter at either a minimum or a maxi''lum count. As the
logic level of the up/down input is changed, the ripple carr V output will follow. If the count is minimum (0), the ripple carrv output
transition will be in phase. If the count is maximum (9

for 'LS668 or 15 for 'LS669

-

TEXAS

I,

the ripple carry output will be out of phase.

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1265

TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669
SYNCHRONOUS 4-81T UP/DOWN COUNTERS
PARAMETER MEASUREMENT INFORMATION

I-- tw(clock)
I
I

-..j
~ tw(clock) ~

I

I

I

I

3V

I

CLOCK

I

I

T - - - oV

I

-...I

~ tsu
I (active state)

\'-v_ref__
~

DATA

tsu

I.-

th

}4--- tsu ---.J
--I
(inactive state)
I

,

-1:

I

--Jl::~ ___ ~ ____ ~ __ ~~ ___ ::

-+!_ _

-t-

th

INPUTs~1~v------~t-

A, B, C, and

D

I

ref

----1- - - - - - - -',- - I

I

:

-.l
ENABLE
ENABLE

P or

T

th

:
l.-

I
I

_____________--Jl

v

r-

:T_V:f_
r- 3V
1
I

---l .

I.-

~ th

I
I

I

--t

tsu

i--!-- th

..IF:

'\2~ ____\'_v_re_f__

",

I

3V

ov

VOLTAGE WAVEFORMS
NOTES:

C

m

A. The input pulses are supplied by a generator having the following characteristics: PRR <; 1 MHz, duty cycle';; 50%, Zout "" 50 H;
tr ~ 15 ns, tf ~ 6 ns.
B.

:5
(")

Vref = 1.3 V.

FIGURE l-PULSE WIDTHS, SETUP TIMES, HOLD TIMES

~

m

en

tsu

I
--r--t

0V

I

~
~

3V

,Vref
I
,
\.,____________________-:--___ a v

ENABLET

\

4v'' _______ 03V

1'' 'v_re_f____________________
I
!+-tPHL

----I

V

:.--

I

I

\v",
NOTES:

tPLH

~

I
I

VOLTAGE WAVEFORMS

Iv",

VOL

---VO"

A. The input -pulse is supplied by a generator having the following characteristics: PRR <; 1 MHz, duty cycle <; 50%, Zout "" 50 H;
tr ~ 15 ns, tf ~ 6 ns.
B. tpLH and tpHL from enable
input to ripple carry output assume that the counter is at the maximum count (QA and QD high
for 'LS668, all Q outputs high for 'LS669).

T

C. Vref= 1.3 V.
D. Propagation delay time from up/d~wn to ripple carry must be measured with the counter at either a minimum or· a maximum
count. As the logic level of the up/down input is changed, the ripple carry output will follow. If the count is minimum (0) the
ripple carry outflut trRnsition wi!! be in phase. If the count is maxiinurn (9 for -LS668. or i5 for "LS669) the ripple carry
output will be out of phase.

FIGURE 2-PROPAGATION DELAY TIMES TO CARRY OUTPUT

3-1266

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TeXAS 75265

TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669
SYNCHRONOUS 4-81T UP/DOWN COUNTERS
PARAMETER MEASUREMENT INFORMATION

1..tW(cIOCk) ..I
I

1
3V

1

CLOCK

~tPLH
I

I

I

I

Y

I

I

I

I

' - - - - ' - tpH L
(measure at t n +2)

I·
_ _ _.;..I~TVref

OUTPUT
OA

(measureatt n +1)

'L",

/

YS\o---~·
I

!.---4-- tpHL
I

I

(measure at t n +4)

-.l-tPLH
I
I (measure at t n +2)
I

I

~\o-S_ _:---..Il~'_ -- - - --

OUTPUT

°B

'------'- tPHL
I
: (measure at t n +8)

OU;;UT--------------~\-S

,I

-I

I

_.JIv~'

_ _-.;.:

""I--_a+-I- tPH L

___ _

I

-

I.....I

VOL

v~::e NOle B)

I
I

VOH

VOL

:>w
C

-I

lI-

I

.."E~

en

()

I tpLH
...t-(measureatt n +10
I or tn+161 (See Note B)

\",v_re_f _ _ _ _ _

II
w

(measure all n +8)

'~S~____.Jlv: ______

'\

00

r-----,- tpHL

-

"'1~~_a~lr-- tpLH

(measure all n +10
or t n +16)

OUTPUT

VOL

tpLH
(measure at t n +4)

-

I

VOH

_____________ ~:~

UP-COUNT VOLTAGE WAVEFORMS
NOTES:

A_ The input pulses are supplied by a generator having the following characteristics: PRR .;: 1 MHz, duty cycle';: 50%, Zout "" 50 n,
tr';: 15 ns, tf';; 6 ns, Vary PRR to measure fmax'
B. Outputs 00 and carry are tested at t n +10 for the 'LS668, and at t n +16 for the 'LS669, where tn is the bit-time when ali outputs
are low,

c.

Vref= 1.3V.

FIGURE 3-PROPAGATION DELAY TIMES FROM CLOCK

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1267

I

-I
-I

r-

C

m

<

n

m

VJ

3-1268

TYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS
BULLETIN NO. 'DL-S 7612122, MARCH 1974-REVISED DECEMBER 1983

SN54LS670 ... J OR W PACKAGE
SN74LS670 ... D, J OR N PACKAGE

• Separate Read/Write Addressing Permits
Simultaneous Reading and Writing

(TOPVIEWI

• Fast Access Times ... Typically 20 ns
D2
D3
D4
RB
RA
Q4

• Organized as 4 Words of 4 Bits
• Expandable to 512 Words of n-Bits
• For Use as:
Scratch-Pad Memory
Buffer Storage between Processors
Bit Storage in Fast Multiplication Designs

VCC
D1
WA
WB

§w

Q3

GR
Q1

GND

Q2

SN54LS670 ; •. FK PACKAGE
SN74LS670 ..• FN PACKAGE

• 3-State Outputs
• SN54LS170 and SN74LS170 Are Similar But
Have Open-Collector Outputs

(TOPVIEWI
M N U

00 Z

u

U ....

>

0

D4
RB
NC
RA
Q4

description
The SN54LS670 and SN74LS670 MSI 16-bit TTL
register files incorporate the equivalent of 98 gates. The
register file is organized as 4 words of 4 bits each and
separate on-chip decoding is provided for addressing
the four word locations to either write-in or retrieve
data. This permits simultaneous writing into one location and reading from another-word location.

NC -

No internal connection.

Four data inputs are available which are used to supply the 4-bit word to be stored. Location of the word is determined by the
write-address inputs A and B in conjunction with a write-enable signal. Data applied at the inputs should be in its true form.
That is, if a high-level signal is desired from the output, a high-level is applied at the data input for that particular bit location.
The latch inputs are arranged so that new data will be accepted only if both internal address gate inputs are high. When this
condition exists, data at the D input is transferred to the latch output. When the write-enable input, GW, is high, the data inputs are inhibited and their levels can cause no change in the information stored in the internal latches. When the read-enable
input, GR, is high, the data outputs are inhibited and go into the high-impedance state.
The individual address lines permit direct acquisition of data stored in any four of the latches. Four individual decoding gates
are used to complete the address for reading a word. When the read address is made in conjunction with the read-enable
signal, the word appears at the fo~r outputs.

II
en
w

U

>
w

C

-I

....
....

This arrangement-data-entry addressing separate from data-read addressing and individual sense line-eliminates recovery
times, permits simultaneous reading and writing, and is limited in speed only by the write time (27· nanoseconds typical) and
the read time (24 nanoseconds typical). The register file has a nondestructive readout in that data is not lost when addressed.
All inputs except read enable and write enable are buffered to lower the drive requirements to one Series 54LS/74LS standard
load, and input-clamping diodes minimize switching transients to simplify system design. High-speed, double-ended ANDOR-INVERT gates are employed for the read-address function and have high-sink-current, three-state outputs. Up to 128 of
these outputs may be bus connected for increasing thecapacity up to 512 words. Any number of these registers may be
paralleled to provide n-bit word length.
The SN54LS670 is characterized for operation over the full military temperature range of -55° C to 125° C; the SN74LS670
is characterized for operation from 0° C to 70° C.

PRODUCTION DATA

This document contains information current as
of ~ublication date. Products conform to
specifications per the terms of Texas Instruments

~~n:::~':'a~rtvai~liu~~Ot~~~l~~nof~~f~~~~n~e~:~s~

TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1269

lYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-0UTPUTS

logic
READ FUNCTION TABLE (SEE NOTES A AND D)

WRITE FUNCTION TABLE (SEE NOTES A, B, AND C)
WRITE INPUTS

NOTES:

WORD

READ INPUTS

WB
L

WA
L

GW
L

0

1

2

3

Q=D

QO

QO

Q2

Q3

Q4

L

WOBl

WOB2

WOB3

WOB4

L

H

L

W1Bl

W1B2

W1B3

W1B4

H

L

L

W2Bl

W2B2

W2B3

W2B4

H

H

L

W3Bl

W3B2

W3B3

W3B4

X

X

H

Z

Z

Z

Z

QO

L

H

L

QO

H

L

L

QO

QO

QO
Q=D

H

H

L

QO

QO

QO

QO
Q=D

X

X

H

QO

QO

QO

QO

A.

Q1

RA

QO
Q=D

OUTPUTS

GR
L

RB
L

H = high level, L = low level, X = irrelevant, Z = high impedance (off)

B. (0

= D) =

The four selected internal flip·flop outputs will assume the states applied to the four external data inputs.

e. 00 = the level of 0 before the indicated input conditions were established.
D. WOB1 = The first bit of word 0, etc.

schematics of inputs and outputs
EQUIVALENT OF EACH INPUT

TYPICAL OF ALL OUTPUTS

Vee---------e--------

------------~.-----100

n

Vee

INPUT--~~D_~----~-

~--~~----OUTPUT

3-1270

Any D, R, or W:
GR:

Req
Req

GW:

Req

= 20 kn NOM
= 6.67 kn NOM
= 10 kn NOM

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS

logic diagram

en
w

(.)

>
w
C
..J

JJ-

WB

RB

WA

GR

RA

~

~

READ INPUT

WRITE INPUT

Pin numbers shown on logic notation are for D. J or N packages.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1271

TYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
Input voltage . . . . . . . .
Off-state output voltage
Operating free-air temperature range: SN54LS670
SN74LS670
Storage temperature range

7V
7V
5.5 V

-55°C to 125°C
. O°C to 70°C
-65°C to 150°C'

recommended operating conditions
SN54lS670
Supply voltage, Vee
High-level output current, IOH

Setup times, high- or low-level data

Data input with respect to
write enable, tsu(D)

(see Figure 2)

Write select with respect to

Hold times, high- or low-level data

write enable, tsu(W)
Data input with respect to
write enable, th(D)
Write select with respect to
write enable, thlW)

Latch time for new data, tlatch (see Note 3)
Operating free-air temperature range, T A
NOTES:

NOM

4.5

5

SN74LS670

MAX
5.5
-1

MIN
4.75

NOM
5

MAX
5.25
-2.6
8

4

Low-level output current, IOL
Width of write-enable or read-enable pulse, tw

(see Note 2 and Figure 2)

MIN

UNIT

V
mA
mA

25

25

ns

10

10

ns

15

15

ns

15

15

ns

5

5

ns

25

25

-55

125

0

ns
70

°e

1. Voltage values are with respect to network ground terminal.
,
2. Write-select setup time will protect the data written into the previous address. If protection of data in the previous address is not
required, 1su(W) can be ignored as any address selection sustained for the final 30 ns of the write-enable pulse and during th(W)
will result in data being written into that location. Depending on the duration of the input conditions, one or a number of
previous addresses may have been written into.
3. Latch time is the time allowed for the internal output of the latch to assume the state of new data. See Figure 2. This is important
only when attempting to read from a location immediately after that location has received new data.

3-1272

TEXAS

-I/}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIH

High-level input voltage

Vil

low-level input voltage

VIK

I nput clamp voltage

VOH High-level output voltage
VOL

Low-level output voltage

10ZH high-level voltage applied
Off-state output current,
10Zl

II

low-level voltage applied

Vee = MIN,

II = -18 mA

Vee - MIN,

VIH = 2 V,

Vee = MIN,

2
-1.5

-1.5
2.4

0.4

10l = 8 mA

UNIT
V

0.8

3.4
0.25

10L =4 mA

TYP+ MAX

0.7

10H = -2.6 mA
VIH = 2 V,

MIN

V
V
V

3.1
0.25

0.4

0.35

0.5

V

VIH = 2 V,

VO=2.7V

20

20

Il A

Vee = MAX,

VIH=2V,

VO=O.4V

Il A

Input current at

Vee = MAX,

maximum input voltage

VI = 7 V

High-level input current

Low-level input current

SN74lS670

MAX

Vee = MAX,

VI = 2.7 V

IlL

TYP+

2.4

10H = -1 mA

VIL = VIL max

Vee = MAX,
IIH

MIN
2

VIL = VIL max
Off-state output current,

SN54l~670

TEST CONDITIONSt

Vee = MAX,
VI=O.4V

lOS

Short-circuit output current§ Vee = MAX

lee

Supply current

Vee = MAX,

-20

-20

Any D, R, or W

0.1

0.1

GW

0.2

0.2

GR

0.3

0.3

Any D, R,orW

20

20

GW

40

40

GR
Any D, R, or W

60

60

-0.4

-0.4

GW

-0.8

-0.8

GR

-1.2

-1.2

-130

-30
See Note 4

30

-30

50

30

rnA

Il A

mA

-130

mA

50

mA

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
+AII typical values are at Vee ~ 5 V, T A = 25°e.
§ Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
NOTE 4:

Maximum lee is guaranteed for the following worst·case conditions: 4.5 V is applied to all data inputs and both enable inputs, all
address inputs are grounded and all outputs are open.

en
w

U

>
w

= 5 V, T A = 25°e

switching characteristics, Vee

FROM

TO

(INPUT)

(OUTPUT)

Read select

AnyQ

Write enable

AnyQ

PARAMETER4J
tpLH

TEST CONDITIONS
eL=15pF,

tpHL
tpLH

RL = 2 kn,

See Figures 1 and 2

tpHL

eL=15pF,

tPLH

See Figures 1 and 3

Data

Any Q

Read enable

AnyQ

RL = 2 kn,

tPHL
tpZH
tpZL
tpHZ

eL

eL=5pF,

tpLZ
4J tPLH

= 15 pF,

R L = 2 kn,

See Figures 1 and 4
RL = 2 kH,

See Figures 1 and 4

MIN

TYP

MAX

23

40

25

45

26

45

28

50

25

45

23

40

15

35

22

40

30

50

16

35

UNIT

C

..oJ

ns

lI-

ns
ns
ns
ns

'= propagation delay time, low·to-high-Ievel output

tpHL 0= propagation delay time, high-to·low-Ievel output
tpZH =: output enable time to high level
tpZL'" output enable time to low level
tpHZ"" output disable .time from high level
tpLZ

=0

output disable time from low level

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TeXAS 75:265

3-1273

TYPES SN54LS670, SN74LS670
.
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
TEST
POINT

51
FROM O'UTPUT
UNDER rEST

NOTES:

-

A. C L Includes probe and jig capacitance.
B. All diodes are 1 N3064 or equivalent.

-ie-.

....- - -.....

(Se. Note 81

LOAD CIRCUIT
FIGURE 1

WRITE-SELECT ~
INPUT WA or WB
1.3 V

I

(See Note A)

-.J

II

r-

\

1'----------------- ov
tsu(W'

~

_ _ _ _...1_...

-I
-I

I

~~~~~~ABLE

C

m

<

---.. . . . t+-

1

1-----4-

~tsu(D'

I

r-

14- t,h_(W_'_ _ _ _ _ _ _ _ _ _ _ 3 V

~.3vl 11.3~

:

OATAINPUT
D1, 02, 03, or D4
(See Note A)

- - - - - - - - - --3V
1.3 V

tw

1 3V
.

---..f

l~~

__

__ ______

I+-- tlatch - - ,

(")

m

en

READ-SELECT
INPUT RA or RB
(See Note B)

_ _ _ _ _ OV

th(D'

3 V

--OV

\,;" _____ 3V

-----_---1,),'3V

I -

OV

I

1

j..t PLH ,

I--tPHL-!

I

VOH

'- ___..Jt·~ --

OUTPUT
01,02,03, or 04 .

\1.3V

VOL

VOLTAGE WAVEFORMS (51 AND 52 ARE CLOSED)

NOTES:

A. High-level input pulses at the select and data inputs are illustrated; however, times associated with low-level pulses are measured
from the same reference points.
B. When measuring delay times from a read-select input, the read-enable input is low.
C. Input waveforms are supplied by generators having the following characteristics: PRR ~ 2 MHz, Zout "" 50 n, duty cycle ~ 50%,
tr ~ 15 ns, tr ~ 6 ns.

FIGURE 2

3-1274

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS670, SN74LS670
4-BY-4 REGISTER FILES WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
-

- - - 3V

OAT A INPUT
01,02,03, or 04
OV

WRITE-ENABLE
INPUT GW

OUTPUT
01,02,03, or 04

VOLTAGE WAVEFORM 1 (Sl AND S2 ARE CLOSED)

3V
DATA INPUT
D1, 02, 03, or 04
OV

~---J/

WRITE-ENABLE
INPUTGW

\-:~-----

~tPHL

OUTPUT
01,02,03, or 04

~tPLH

----\j.

OV

".----

_ _ _ _ _ \'-.3_V
____________

~13~

3V

__ _

3V

en
w

OV

U

VOLTAGE WAVEFORM 2 (Sl AND S2 ARE CLOSED)
NOTES:

A. Each select address is tested. Prior to the start of each of the above tests both write and read address inputs are stabilized with
WA = RA and W B = RB' During the test G R is low.
B. Input waveforms are supplied by generators having the following characteristics: PRR .; 1 MHz, Zout "" 50.11, duty cycle'; 50%,
tr ~ 15 ns, tr ~ 6 ns.

ENABLE

"K
I "-------~ tp Z L

---4

-----1

I

51 closed,

(See Note A)

:

52 open

:.-- t P Z H

1.3 V

52 closed

________

I

:
I

I

0 V

51 and

y___ L
I

52 closed

:

----i
I

51 open,

~J-.:'

I-tPLZ--j

-t----~45V

:
WAVEFORM 1

WAVEFORM 2
(See Note A)

lI-

~3V

1.3V

C

..J

FIGURE 3

READ~

>
w

"' 1.5 V

.,----VOL

~tpHZ~ 0.5 V05 V

!r-

-----....:'

~-----VOH

Xr

;:~'~~-"'OV

"1.5V

51 and
52 closed

VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS
,.UTE5:

A. Wavetorms 1 is for an output with internal conditions such that the output is low except when disabled by the read-enable input.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the read-enable input.
B. When measuring delay times from the read-enable input, both read·select inputs have been established at steady states.
c. Input waveforms are supplied by generators having the following characteristics: PRR .:s,;;;; 1 MHz, Zout ~ 50 n. duty cycle ~ 50%,
tr ~ 15 ns, tr

<

6 ns.

FIGURE 4

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1275

-t
-t
r-

C
m

om<

en

3-1276

TYPES SN54LS671, SN54LS672, SN74LS671, SN74LS672
4-BIT UNIVERSAL SHIFT REGISTERS/LATCHES
WITH 3-STATE OUTPUTS
02638, JANUARY 1981

• 4-Bit Universal Shift Registers/Latches
• Multiplexed Outputs for Shift Register
or Latched Data

SN54LS671. SN54LS672 '" J PACKAGE
SN74LS671, SN74LS672 ... OW, J OR N PACKAGE
(TOPVIEWI

SER R
SRCK
A
B
C
D
SER L
SRCLR
RCK
GND

• Choice of Direct SR Clear ('LS671) or Synchronous SR Clear ('LS672)
• 3-State Outputs Drive Bus Lines Directly
• Expandable to Any Word Length
description
The 'LS671 and 'LS672 each contain a 4-bit universal
shift register (similar to the 'LS194A) and a 4-bit
storage register (similar to the 'LS175) multiplexed to a
3-state output stage (similar to the 'LS258). The user
has the option of selecting the shift or storage register
via the register/shift select input R/S. The 'LS671 has a
direct-overriding shift register clear while the 'LS672
features a synchronous shift register clear. The shift
register has four distinct modes of operation, namely:

VCC
CASC
QA
Qs
Qc
QD
SO
S1
G
R/S

SN54LS671. SN54LS672 ... FK PACKAGE
SN74LS671, SN74LS672 ... FN PACKAGE
ITOPVIEWI
~o::

U

U 0:: UUl
0:: W U«
«UlUl>U

Inhibit clock (do nothing)
Shift right (in the direction QA toward QD)
Shift left (in the direction QD toward QA)
Parallel (broadside) load

s
C
D
SER L

A cascade output for the shift register is provided so
that full shift register functionality is provided even
while the outputs are in the high-impedance mode. The
cascade output presents QA data in the shift-left mode,
QD data in the shift-right mode.

en
w

Both the shift register clock and the latch clock are
triggered on the positive transition. The output control
(G) activates QA thru QD when low, it places QA thru
QD into the high-impedance state when high.

CJ

:>w

C

-I

lI-

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:;~s:!~rl~arntl!'u~~Ot~~~~~~f~~f~:~~~e~~r~~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1277

TYPES SN54LS671, SN54LS672, SN74LS671, SN74LS672
4··8IT UNIVERSAL SHIFT REGISTERS/LATCHES WITH 3-STATE OUTPUTS
logic diagram (positive logic)

SER R

...:..:..:....---t:l=::t+::t:t+tl

II
-I
-I

r

C

m

<
C")

m
en

0

---ii=:::t:l::t::ttr-..

SER L

----tl~=t:t:t=t:t:rl

Qo

Pin numbers shown on logic notation are for

3-1278

ow. J

or N packages.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS671, SN54lS672, SN74LS671, SN74LS672
4-81T UNIVERSAL SHIFT REGISTERS/LATCHES WITH 3-STATE OUTPUTS
logic symbols
'LS672

'LS671
MUX
1,24/2,23

MUX

G (12)

(19)

CASC

RIS

(11)

(19)

1,24/2,23

EN22
G21

CASC

RCK (9)
SRG4

SRG4

C (5)

C (5)

0(6)

0(6)

SER L (7)

3,40
2,40

(15) Qo

3,40
2,40

SER L (7)

(15)
QO

Pin numbers shown on logic notation are for OW, J or N packages.
FUNCTION TABLE

5RCK
SR MODE

-

G

-

;::

51

N

SERIAL

PARALLEL

PARALLEL

INPUTS

INPUTS

OUTPUTS

(I)

(I)

SO

:-J

:-J

SL

en

RIS SRCLR

,..

SR

A

B

C

D

aA.

aB

ac

aD

CASCo

L

L

L

X

X

X

t

X

X

X

X

X

X

L

L

L

L

( *)

L

L

H

X

X

L

L

X

X

X

X

X

X

aAO

aBO

aCO

aDO

(*)

L

L

H

L

L

X

X

X

X

X

X

X

X

aAO

aBO

aCO

aDO

H

L

L

H

L

H

X

H

X

X

X

X

H

aAn

aBn

aCn

aCn

L

L

H

L

H

X

L

X

X

X

X

L

aAn

aBn

aCn

aCn

L

L

H

H

L

H

X

X

X

X

X

aBn

aCn

aDn

H

aS n

L

L

H

H

L

L

X

X

X

X

X

aS n

aCn

aDn

L

aS n

L

L

H

H

H

t
t
t
t
t

X

X

a

b

c

d

a

b

c

d

H

1

X

X

X

X

X

X

t

X

X

X

X

X

X

Z
Z

Z
Z

Z
Z

Z
Z

aS n

X

X

X

X

X

X

X

H

X

X

L

H

H

X

X

H

L

t
t
t
t
t
t
t

L

H

X

X

X

X

II

en

Internal register contents

en
w

U

:;;:
w
C

...I

lI-

aCn
(*)

When the output control G is high, the 3·state outputs are disabled to the high·impedance state; however, sequential operation
of the shift register and the output at CASe are not affected.

H = high level (steady state)
L = low level (steady state)
X = Irrelevant (any Input, including transitions)
t = transition from low to high level
a, b, c, d = the level of steady·state Input at A, B, C, or D, respectively
0AO, aBO, 0eo, 000 = the level of 0A, 0B, 0e, or aD, respectively, before the Indicated steady-stata input conditions were established
0An, 0Bn, 0en = the level of 0A, 0B, or 0e, respectively, before the '"(lost-recent transition of the clock
Z = high-impedance state
"The cascade output displays the D bitofthe shift register in mode 1 (51, SO = L, H), the A bit in mode 2 (51,50 = HL), and is inactive (H) in
mode~O and 3 (51, SO = LL and HH).

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • OALLAS. TEXAS 75265

3-1279

TYPES SN54LS671, SN54LS672, SN74LS671, SN74LS672
4-81T UNIVERSAL Si-IIFT REGISTERS/LATCHES WITH 3-STATE OUTPUTS

schematics of inputs and outputs

o

EOUIVALENT OF A THRU D,
SER L, AND SER R INPUTS

VCC

EOUIVALENT OF
ALL OTHER
INPUTS

--

OUTPUTS

--_-VCC
13 kn
.
NOMC r s
VC

25 kn
NOM

INPUT

TYPICAL OF CASCADE
OUTPUT

TYPICAL OF 0A THRU 0D

INPUT

. __
OUTPUT

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

II
-I
-I

Supply voltage Vee (see Note 1)
. . . . . . .. . .. . . .. . . . .. . .. .. . . .. . . . . .. . . . . . . . . . . . . . . . .
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-state output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free·air temperature range: SN54LS671, SN54LS672 . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°e
0
SN74LS671, SN74LS672 . . . . . . . . . . . . . . . . . . . . . . . . . . oDe to 70 e
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
NOTE 1: Voltage values are with respect to the network ground terminal.

recommended operating conditions

r-

o
m
<
('")

m

en

SN54LS'
MIN

NOM

4.5

5

SN74LS'
MAX

MIN

NOM

5.5

4.75

5

MAX

UNIT

VCC

Supply voltage

IOH

High·level output current

IOL

Low·level output current

tw

Width of SRCK, RCK, or SRCLR ('LS671 only) input pulse

30

30

ns

tsu

Inactive state setup time

SRCLR before SRCK t ('LS671 only)

30

30

ns

SO or Sl to SRCK t

45

45

tsu

0A, OS, 0C, 0D
Cascade out
0A, OS, 0C, 0D

Setup time

th

Hold time

TA

Operating free·air temperature

3-1280

Cascade out

-0.4

-1

- 2.6

4

8

12

24

SRCLR ! ('LS672 only) to SRCK t

25

25

A, S, C, D to SRCK t

30

30

SRCK t to RCK t

30

30

SER to SRCK t

35

35

Any input from SRCK t

0
- 55

TEXAS

-I./}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

5.25

- 0.4

0

mA

ns

ns

0
125

V
mA

70

°c

TYPES SN54LS671, SN54LS672, SN74LS671, SN74LS672
4-BIT UNIVERSAL SHIFT REGISTERS/LATCHES WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONOITIONSt

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage

°A-OO
OA-OO

Vee = MIN,

10H = -1 mA

VIH=2V,

10H = -2.6 mA

eASe

VIL = VIL max 10H = -400J.lA

Low-level output voltage

°A-Oo
eASe

high-level voltage applied
Off-state output current,
low-level voltage applied

°A-OO
OA-OO

Input current at maximum
II
IIH
IlL

input voltage
High-level input current
A,a,e,O

Low-level input current

All others

lOS

Short-circuit output current§

lee

Supply current

2.4

3.1

2.5

3.2
0.25

10L = 12mA
Vee = MIN,

10L = 24 mA

VIH = 2 V

10L =4 mA

MIN

TYP*

OA-OO
eAse

I All outputs low
I All outputs high

I0A thru 00, at Hi-Z

Vee = MAX,

Vo = 2.7 V,

VIH=2V,

VIL = VIL max

Vee = MAX,

VO=0.4V,

VIH=2V,

VIL = VIL max

Vee = MAX,

VI = 7 V

Vee = MAX,

VI = 2.7 V

Vee = MAX,

MAX

0.25

VI = 0.4 V

UNIT
V

0_7

0.8

V

-1.5

-1.5

V

2.4

3.1

2.7

3.2

0.4
0.4

10L = 8mA

Off-state output current,

10ZL

SN74LS'
MAX

2

Vee = MIN, 11= -18mA

eAse
10ZH

TYP*

2

OA-OO
VOL

SN54LS'
MIN

V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V

20

20

J.lA

-20

-20

J.lA

0.1

0.1

mA

20

20

jlA

-0.4

-0.4

-0.2

-0.2

-30

-130

-30

-130

-20

-100

-20

-100

Vee = MAX,

VO=OV

Vee = MAX,

See Note 2

35

70

35

70

All outputs

See Note 3

30

65

30

65

open

See Note 4

37

70

37

70

mA
mA

mA

t For conditions shown as MIN or MAX, use the appropri~te value specified under recommended operating conditions.
*AII tYpical values are at VCC

=5

V, TA

II
en

= 25°C.

w

§ Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second.
NOTES: 2. ICCL is tested after two O-V to 4.5 V to O-V pulses have been applied to SRCK and RCK while SO is at 4.5 V and all other inputs
are grounded.
3. ICCH is tested after two 4.5-V to O-V to 4.5-V pulses have been applied to SRCK and RCK while all other inputs are at 4.5 V.
4. ICCZ is tested after two O-V to 4.5-V to O-V pulses have been applied to SRCK and RCK while SO and G are at 4.5 V and all
other inputs are grounded.

u

:>

w

c

~

ff-

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1281

TYPES SN54LS671, SN54LS672, SN74LS671, SN74LS672
4-81T UNIVERSAL SHIFT REGISTERS/LATCHES WITH 3-STATE OUTPUTS
. switching characteristics, VCC
PARAMETER
tPLH
tPHL

FROM
(INPUT)

TO

TEST CONDITIONS

(OUTPUT)

SO, S1

tpHL

SRCK t
SRCLR

tpHL
tPLH
tPHL
tpLH
tPHL
tpZH
tpZL
tPHZ

11
-I
-I
r

31

45

25

14

25

RL=2kn,

11

20

12

20

CL=15pF

11

20

12

20
30

SRCK t

19

30

SHIFr LEFT

10

20

OR RIGHT

16
10
15

SR LOAD
SR CLEAR

SRCLR
RCK t

LATCH

Gt

20

10

20

25

15

25

17

30

10

20

25

10

20

CL = 45 pF

15

25

15

25

12

25

13

25

15

25

15

25

ns
ns
ns

ns
ns
ns
ns

17

25

17

25

16

25

16

25

3-STATE

16

25

16

25

ENABLE

19

30

19

30

RIS ~

tPLZ

25

RL = 667 n,

MUX

G~

20

30

RIS t

UNIT

ns
10
16

21

~

°A-OD

MIN

19

SR CLEAR

tpHL
tPLH

MAX

45

MIN

~

tpHL

tpHL

TYP

31
14

OR RIGHT

CASCADE

'LS672
MAX

LOAD

SHIFT LEFT

tPLH
tPLH
tpHL

'LS671
TYP

MODE

SRCK t

tPLH
tpHL
tpHL

= 5 V, T A = 25°C, see note 5

3-STATE

RL-667n,

16

25

16

25

DISABLE

CL = 5 pF

16

25

16

25

ns
ns
ns
ns
ns

NOTE 5: See General Information Section for load circuits and voltage waveforms.
tPLH
tPH L
tpZH
tpZL
tpHZ
tpLZ

Propagation delay time. low-to-high-Ievel output
Propagation delay time, high-to-Iow-Ievel output
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level

C

m

TYPICAL APPLICATION DATA

<

The 'LS671 or 'LS672 can easily be expanded utilizing the cascade output and the SER Land SER R inputs. A typical
expansion is shown below.

(")

m

~

SERIALOUTPUTJrr==============~f=1:::::::::::::::~r=1J~============~~
(LEFT SHIFT)
SERIAL RIGHT
INPUT, SER R

'LS671
or

SR

'LS672

'LS671

CASC

CASC

'LS671

or

SL

SR

CASC

or

SR

'LS672

'LS672

SL

SERIAL OUTPUT
(RIGHT SHIFT)
SERIAL LEFT
INPUT, SER L

FIGURE 1 - 'LS671, 'LS672 EXPANDED TO 12 BITS, (3 PACKAGES)

Any desired word length may be obtained using the scheme shown. Corresponding control pins of all the packages are
tied in common, i.e., all SO pins are connected together, all S1 pins are connected together, etc.

3-1282

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS673, SN54LS674, SN74LS673, SN74LS674

16-BIT SHIFT REGISTERS
D2421, REVISED APRIL 1985

SN54lS673 ... J OR W PACKAGE
SN74lS673 ... OW, J OR N PACKAGE

'LS673

• - 1G-Bit Serial-In, Serial-Out Shift
Rogi5ter with 16-Bit Parallel-Out
Storage Register

(TOP VIEW)

CS
SH ClK
R/W
STRCLR
MODE/STRCLR
SER/015
YO
Y1
Y2
Y3
Y4
GND

• Porforms Serial-to-Parallel Conversion
'LS674

• 16-Bit Parallel-In, Serial-Out
Shift Register
• Porforms Parallcl-to-Scrial Convorsion
description
SN54lS673, SN74lS673
The 'LS673 is a 16-bit shift register and a 16-bit storage
register in a single 24-pin package. A three-state
input/output (SER/015) port to the shift register allows
serial entry and/or reading of data, The storage register
is connected in a parallel data loop with the shift register
and may be asynchronously cleared by taking the storeclear input 10VII. The storage register may be parallel
loaded with shift-register data to provide shift-register
status via the parallel outputs. The shift register can be
parallel loaded with the storage-register data upon command.

VCC
Y15
Y14
Y13
Y12
Y11
Y10
Y9
YB
Y7
Y6
Y5

SN54lS673 ... FK PACKAGE
SN74lS673 ... FN PACKAGE
(TOP VIEW)
~

I~a:::enuz>>->glen u ~ ~ ::!
Y13
Y12
Y11
NC
Y10
Y9
YB

MODE/STRCLR

A high logic level at the chip-level (CS) input disables
both the shift-register. clock and the storage register
clock and places SER/015 in the high-impedance state.
The store-clear function is not disabled by the chip
select.

Y1
12 1314 15161718

Caution must be exercised to prevent false clocking of
either the shift register or the storage register via the
chip-select input. The shift clock should be low during
the low-to-high transition of chip select and the store
clock should be low during the high-to-Iow transition of
chip select.

~~~~~!e>:
(.!)

NC-No internal connection

en

w
U

>
w
C
-J

JJ-

SN54LS674, SN74LS674
The 'LS674 is a 16-bit parallel-in, serial-out shift
register. A three-state input/output (SER/015) port
provides access for entering a serial data or reading the
shift-register word in a recirculating loop.
The device has four basic modes of operation:
1)
2)
3)
4)

Hold (do nothing)
Write (serially via input/output)
Read (serially)
Load (parallel via data inputs)

Low-to-high-Ievel changes at the chip select input
should be made only when the clock input is low to prevent false clocking.
PRO OUCTION OAT A
This document contains information current as
of publication d~te. Products conform to
specifications per the terms of Texas Instruments

~~~nndea~~s~~i{:~~iu~~Ot~~~f~~nof~~f~~~~~e~~;s~

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1283

TYPES SN54LS673, SN54LS674, SN74LS673, SN74LS674
16-81T SHIFT REGISTERS

SN54LS674 ••. J OR W PACKAGE
SN74LS674 ... OW, J OR N PACKAGE

SN54LS674 .•• FK PACKAGE
SN74LS674 ••• FN PACKAGE

(TOPVIEWI

(TOPVIEWI

CS
ClK

I~
~ len u ~ ~ :!
a:UUZ>a..a..

VCC
P15
P14
P13
P12
Pll
Pl0
P9
P8
P7
P6
P5

Riw
NC
MODE
SER/015
PO
Pl
P2
P3
P4
GND

4

3 2

1

P13
P12
Pll
NC
Pl0
P9
P8

NC
MODE
SER/Q15
NC
PO
Pl
P2
12 131415161718

~~ au
zz

Iflfll:

C!l

'LS673
FUNCTION TABLE
INPUTS
MODEl

Cs

R/W

SH CLK

STRCLR

H

X

X

X

X

X

X

X

L

X

B·
~
~

r-

SHIFT REGISTER FUNCTIONS

SERI

STRCLK

015

SHIFT

Z

NO

STORAGE REGISTER

READ FROM

WRITE INTO

PARALLEL

SERIAL OUTPUT

SERIAL INPUT

LOAD

NO

NO

NO

FUNCTIONS
CLEAR

LOAD
NO

YES

L

L

j

X

X

Z

L

H

X

X

X

015

L

H

j

X

L

Q14n

L

H

j

L

H

L

H

j

H

L

L

X

H

YES

NO

YES

YES

NO

YES

YES

NO

L

NO

YES

YES

YES

NO

H

Y15n

NO

YES

YES

NO

NO

t

Z

NO

NO

NO

YES

NO
NO
NO

NO

C

m

<

'LS674 FUNCTION TABLE

(")

m

en

INPUTS
CS RIVV MODE

SERI
elK

H

x
H

X
X
l

x

l
l
L

H

H

I

3-1284

l

j
j

a15.

Z
Z

H = high level (steady state)
L = low level (steady state)
t = transition from low to high level
~ = transition from high to low level
X = irrelevant (any input including transitions)
Z = high impedance, input mode
014n = content of 14th bit of the shift register before
the most recent ~ transition of the clock.
015 = present content of 15th bit of the sh ift register
Y15n = content of the 15th bit of the storage register
before the most recent ~ transition of the clock.
P15 = level of input P15

OPERATION
Do nothing
Shift and write (serial load)

a14n Sh ift and read
P15

Parallel load

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPESSN54LS673, SN54LS674, SN74LS673, SN74LS674
16-81T SHIFT REGISTERS

logic symbols
'lS673
(4)

"- R6

'lS674

SRG16

MOOE......:.;:;(5.:...)---Il.2 M3 SRG 16
R/W

MOOE/STRClK

R/W

cs
SH ClK

- ErC'
(3)~ Gl12 EN5

(5)1

(1) ....

_t--..

121 h

CS

(31

(11~GG2&
(2) -

~> C4/3-+

I"

10.3.40

506Z10

11.3,40

506Z11

(71
(S)
(9)
(10)
(111
(131
(14)
(15)
(16)
(171
(lS)
(191
(201
(211
(22)

I>

506Z25

(23)
(6)

5V'

-J"~

Z7

PO

(7)

Pl

(SI

P2

(9)

r

,..31...4-0---~3~.4..a0.,~
3.40

P3

(101

YO

P4

(11)

Yl

P5

(13)

Y2

P6

(14)

Y3

P7--.:....:(1..:.5.:...)_-I
PS (16)
1--------1

--7.3,40

25.3.40

C4/3+

C l K -="'----1

G2

-

Gl/2 EN

Y4
Y5

P9

Y6

Pl0

Y7

Pll

YS

P12

Y9

P13

Yl0

P14

Yll

P15

(17)

(lSI
(191
(20)
(211
(221
(23)

Y12

(6)

3.40

I>

V' 1--o-
w

Y14
Y15

C

SER/Q15

..J

JJ-

Pin numbers shown on logic notation are for DW. J or N packages.

TExAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1285

TYPES SN54LS673, SN54LS674, SN74LS673, SN74LS674
16-BIT SHIFT REGISTERS

functional block diagrams
SN54LS673, SN74LS673
SER/a15
(6)

'lS673
16

\7-11,13-23)

I------;.-'--t-+---t 00-015 YO-Y 15
16

16

ClK

ClR

SN54LS674, SN74LS674
'lS674

PO-P15

II
~
~

(6)

r-

SER/a15

C

m

<

(')

m

en

'When PE is active, data is synchronously parallel loaded into the shift registers from the 16 P inputs and no shifting takes place.
Pin numbers shown on logic notation are for D.W, J or N packages.

3-1286

TEXAS

-II}

INSTRUMENTS
POST OFFiCe BOX 225012 • DALLAS, TeXAS 75265

16-BIT
STORAGE
REGISTER

YO-Y15

TYPES SN54LS673, SN54LS674, SN74LS673, SN74LS674
16-BIT SHIFT REGISTERS
schematics of inputs and outputs
EaUIVALENT OF SER/a15
AND PARALLEL INPUTS

EaUIVALENT OF
OTHER INPUTS

TYPICAL OF YO THRU Y15
OUTPUTS ('LS673 ONLY)

SER/a15 OUTPUT
-------Vee

Vec---...--

----+--Vee

Vee - - - 1 r - - 20 kn NOM

IN PUT-...-:+a........-

__
OUTPUT

SER/Q15:

Req

= 20 kn

OUTPUT

NOM

PARALLEL INPUTS:
Req = 30

kn

NOM

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
.................................................. .
7V
Input voltage: SER/Q15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 \/
All others
IV
Off-state output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free·air temperature rang~: SN54LS673, SN54LS674
. . . . . . . . . . . . . . . . . . . . .. -55°C to 125°C
SN74LS673, SN74LS674
. . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
Storage temperature range ........ : ............................................................ . -65°C to 150°C
NOTE 1. Voltage values are with respect to network ground terminal.

. recommended operating conditions
SN54lS'

SN74lS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

UNIT

VCC

Supply voltage

IOH

High-level output current

IOl

low-level output current

fclock

Clock frequency

tw(clock)

Width of clock input pulse

20

20

ns

tw(clear)

Width of clear input pulse

20

20

ns

tsu

Setup time

SER/Q15
YOthru Y15
SER/Q15
YOthruY15
0

24

20

8
0

20

20

20

20

Mode

35

35

R/W, CS

35

35

25

25

0

0

PO thru P15

I 'lS673
I 'lS674

0

0

5.0

5.0

0

0

Mode

NOTE 2:

12

SER/Q15

See Note 2

TA

-0.4

PO thru P15

SER/Q15
Hold time

-2.6

4

SH ClK +to Mode/STR ClK t

th

-1
-0.4

Operating free-air temperature

- 55

125

0

20

V

en
w

C,.)

>
W

mA
mA

C

MHz

..J

lI-

ns

ns

70

°c

This setup time ensures the storage register will see stable data from the shift register.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1287

TYPES SN54LS673, SN54LS674, SN74LS673, SN74LS674
16-BIT SHIFT REGISTERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

VIH

High-level inp~t voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High·level output voltage

VCC = MIN,

II = -18 mA

SER/a15

Vec = MIN,

VIH = 2 V,

2.4

VO thru V15~

VIL = VILmax,

10H = MAX

2.5

SER/a15

II
-t
-t
r
C
m

Input current at maximum

SER/a15

input voltage

Others

SN74LS'
MAX

IlL

Low·level input current

lOS

Short-circuit output current§

SER/a15
YOthru Y15'1
'LS673

Supply current

TVP+

MAX

UNIT
V

2
0.7

0.8

V

-1.5

-1.5

V

3.2

2.4

3.1

3.4

2.7

3.4

0.25

0.4

0.25

0.4

VIH=2V,

V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V

40

40

!J.A

-0.4

- 0.4

mA

VI = 5.5V

0.1

0.1

VI =7V

0.1

0.1

40

40

Vo = 2.7 V
VIH = 2 V,

VIL = VILmax,

Vo = 0.4 V

VCC = MAX,

VI=2.7V

Vee = MAX,

VI = 0.4 V
-30

Vee = MAX

-20

Vee = MAX

'LS674

MIN

IOL=8mA

VCC = MAX,

VCC = MAX

SER/a15
Others

High·level input current

10L =4 mA

VIL = VILmax,
SER/a15

low-level voltage applied

IIH

ICC

VIL = VILmax
VCC = MAX,·

SER/a15

high·level voltage applied
Off-state output current,

II

TVP+

10L = 24 mA

VIH=2V,

Off·state output current,

10ZL

IOL=12mA

Vce = MIN,

YO thru Y15~

10ZH

Mlt~

2

Low-level output voltage

VOL

SN54LS'

TEST CONDITIONSt

PARAMETER

20

20

-0.4

-0.4

-130

-30

-100

-20

-130
-100

50

80

52

80

25

40

25

40

mA
!J.A
mA
mA
mA

tFor conditions shown as MIN or MAX use the appropriate value specified under recommended operating conditions.
+AII typical values are at VCC = 5 V, TA = 25°C.
§ Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.
~'LS673 only.

switchin~c~,!!,acteristi~~ VC.C
PARAMETER

S
(")

m

(J)

= 5 V, T A = 25°C, see note 2
'LS674

'LS673
FROM

TO

FROM

TO

f max

SH CLK

SER/a15

CLK

SER/a15

tpHL

STRCLR

YO thru Y15

tpLH

MODEl

tPHL

STRCLK

tPLH

TEST CONDITIONS
RL = 667 .n, CL = 45 pF
RL =2 k.n,CL = 15pF

YO thru Y15

SH CLK

SER/a15

CLK

SER/a15

RL = 667 .n, CL = 45 pF

CS, Rm

SER/a15

es, Rm

SER/a15

RL = 667 .n, CL = 45 pF

tpHL
tpZH
tpZL
tPHZ

CS, R/IN

SER/a15

CS, Rm

SER/a15

RL = 667.n, CL = 5 pF

tPLZ
NOTE 2: See General Information Section for load circuits and voltage waveforms.
maximum clock frequency
Propagation delay time, low-to-high·level output
Propagation delay time, high-to-Iow-Ievel output
Output enable time to high level
Output enable time to low level
Output disable time from low level
Output disable time from high level

3-1288

. TEXAS

-I!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MIN

TVP

20

28

MAX

UNIT
MHz

25

40

28

45

30

45

21

33

26

40

30

45

30

45

25

40

25

40

ns

ns
ns
ns

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMULATORS
02422. JANUARY 1981-REVISEO APRIL 1985

SN54LS681 ... J PACKAGE
SN74LS681 ... OW. J OR N PACKAGE

• Full4-Bit Binary Accumulator in a Single 2O-Pin
Package

(TOP VIEW)

• Contains Two Synchronous Registers:
Word A
Word B Shift/Accumulator

ClK
RS2
RSl
RSO
Ll/RO
Cn

• 16 Arithmetic Operations Including
B Minus A and A Minus B
• 16 Logic-Mode Operations

G

• Expandable to Handle N-Bit Words
with Full Carry Look-Ahead

Cn+~

P
GND

• Bus Driving I/O Ports
description

4

5

17
16

6

15

7

14

8

13

9
10

11

12

VCC
RI/lO
ASO
ASl
AS2
M
1/00
1/01
1/02
1/03

SN54LS681 .•• FK PACKAGE
SN74LS681 ... FN PACKAGE

These low-power Schottky IC's integrate a high-speed
arithmetic logic unit (AlU) complete with word A and
word 8 registers on a single chip. The AlU performs 16
arithmetic and 16 logic functions (see Tables 1 and 2).
Full carry look-ahead is provided for fast carry of four-bit
words. The carry input (C n ) and propagate and generate
outputs {p and G) are provided for direct use
with SN54S182/SN74S182 carry look-ahead
generators for optimum performance with longer words.

(TOP VIEW)

RSl
RS2
ClK

Vec
1/01

The A and B registers are controlled by three inputs
(RSO, RS1, and RS2). These pins define eight distinct
register modes (see Table 3). The A register is a simple
storage register while the 8 register is a combination
storage/shift/accumulator register. The contents of the
A and 8 registers provide the A and 8 words for the
ALU.

RlIlO

en
w

(J

Four I/O ports (I/O 0 thru I/O 3) are provided for- parallel loading of word A and/or word 8 into their respective registers.
These same ports also serve as bus driving outputs for the AlU/accumulator results (Fjl. Two additional I/O ports (RI/lO and
U/RO) are provided to allow expansion of the accumulator for words greater than four bits in length.
The A or 8 register can be parallel loaded from the four I/O ports. The 8 register can also be parallel loaded from the AlU as
an accumulator register and in addition, the 8 register can be serially loaded from either the RI/lO or the LI/RO ports.

:>w
C

...J

lI-

The SN54lS681 is characterized for operation over the full military temperature range from -55°C to 125°C. The
SN74lS681 is characterized for operation from O°C to 70°C.

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nndea::S~~rl~ar:liu~~Ot~~~f~~nor~~f:~~~~e~~:s~

'1!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1289

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMULATORS
functional block diagram
CLOCK
(8)

(1 )

....
~

~

~
(11) .....
I/O 3
(12) ~ :::
I/O 2
(13) ~ ~
I/O 1
(14) .:. :.
I/O a
""

...

. LI/RO

(5)

~

,

-!' AO

..- ..

QA3 r-- ~ A3
OA2 r-A2
OA1 I - A1
OAO I - AO

4

L-....t>
~

p-

LI/RO
B3
B2
B1

-t
-t

B SHIFT
REGISTER

pJZL

OB3
OB2

~

~

H

~

B3
B2

f---t-

B1
OB1 f OBO f-- ~ BO
M

.. ~

~

.

(2)

C

(3)

i
3-STATE
CONTROL

REGISTER
CONTROL

RS2 RS1

m

FO Cn+4

....

CVK

r-

m

F1

ARITHMETIC
LOGIC UNIT
(ALU)

BO
RI/LO

I

lEI
("')

F2

-+
.....

't

:5

I

I

F3

I

(19) ......
...

A
REGISTER

A1

---+

RI/LO

C~

4'" A3
A2
..........

"j'

.~

~f'

, •

Cn
~

I
(16) (17) (18) (15) (6)

1(4)

RSO

~

AS2 AS1 ASO MODE Cn

schematics of inputs and outputs

en

EQUIVALENT QF CLOCK INPUT

VCC--------~~---

INPUT ......-

.....~

EQUIVALENT OF
OTHER INPUTS

TYPICAL OF L1/RO
AND RIILO OUTPUTS

TYPICAL OF I/O
AND ALL OTHER OUTPUTS
---~~-Vcc

Vcc---+--

Req

I NPUT_>-,-ICIf-+-_
L...-tIN-'+-OUTPUT

o UTP UT

cn: R eq =25 kn NOM
I/O, L1/RO: Req=10 kn NOM
All Others: R eq =18 kn NOM

3-1290

1

-I.!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

-

-

+---o---l

I/O:

Req = 100

All Others:

Req = 120

n
n

NOM
NOM

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMUL~tORS
FUNCTION TABLES
TABLE 1 - ARITHMETIC FUNCTIONS

TABLE 2 - LOGIC FUNCTIONS

Mode Control (M) = Low

Mode Control (M) = High

ACTIVE-HIGH DATA

ALU
SELECTION

Cn=H

AS2 ASl ASO

(with carry)

Cn

ALU

=L

ACTIVE-HIGH DATA
Cn=H

en = L

(with carry)

(no carry)

SELECTION

(no carry)

AS2

ASl . ASO

L

L

L

Fj = L

Fj = H

L

L

L

FO = H, F1

L

L

H

F = B MINUS A

F = B MINUS A MINUS 1

L

L

H

Fj = Aj

L

H

L

F = A MINUS B

F = A MINUS B MINUS 1

L

H

L

Fj = Aj

L

H

H

F = A PLUS B PLUS 1 F = A PLUS B

L

H

H

Fj = L

= F2 = F3 =

<±>
@

Fj = Aj
Fj = Aj

L

L

F = B PLUS 1

Fj = Bj

L

Fj = AjBj PLUS 1

H

F=BPLUS1

Fj = Bj

H
-H

L

L

L

H

Fj = Aj

H

H

L

F = A PLUS 1

Fj = Aj

H

H

L

Fj = AjBj PLUS 1

H

H

H

F=

Fj =Aj

H

H

H

Fj

TABLE 3

-

REGISTER

Bj

Fj = AjBj

+ Bj PLUS 1.

= Aj + Bj

Fj = Aj

+ Bj

Fj = AjBj

PLUS 1

Fj = Ai

+ Bj

INTERNAL OUTPUTS AFTER L TO H CLOCK TRANSITION
A REGISTER

DATA INPUTS

SELECTION
RS2 RSI

Bj

REGISTER FUNCTIONS

INPUTS BEFORE L TO H CLOCK TRANSITION
FUNCTION

<±>
<±>

Fj = H

H

1

Fj = L

Bj PLUS 1

H

A PLUS

L

Bj PLUS 1

B SHIFT REGISTER

RSO LIIRO 1103 1/02 1/01 1/00 RIILO OAJ
OA2 OAl
OAO LIIRO
FI
Z
F2
Z
Z
L
F3
FO
OA30 OA20 OAIO OAOo
Z
H
bl
Z
Z
b2
b3
bO
OA30 OA20 OAIO OAOO

ALU

OB3

OB2

OBl

OBO RIILO F3

F3 n

F2n
b2

FIn

FO n

bl

bO

Z
Z

F2

Fl

FO

F3

F2

FI

FO

Z

Z

Z

Z

F3

F2

Fl

FO

F3

F2

FI

FO

ACCUM

L

L

LOAD B

L

L

L

H

L

Ii

F3

F2

FI

FO

OBO

OA30 OA20 OA10 OAOo

Ii

Ii

L

H

H

Ii

F3

F2

FI

FO

OBO

OA30 OA20 OAIO OAOo

Ii

OB3 n

H

L

L

OB3

F3

F2

FI

FO

"

OA30 OA20 OAIO OAOO

OB2n

OB2n OBl n OBO n

ri

ri

F3

F2

FI

FO

H

L

H

OB2

F3

F2

FI

FO

ri

OA30 OA20 OA10 OAOO OBl n

OB3 n OBl n OBO n

ri

ri

F3

F2

Fl

FO

HOLD

H

H

L

F3

F2

Fl

FO

H

H

a3

a2

al

aO

Z
Z

F30 F20 FlO FOo

H

Z
Z

OA30 OA20 OAIO OAOO

LOAD A

Z
Z

b3

LEFT
SHIFT

OB3 n OB2n OB1n OB1n

LOGICAL
LEFT
SHIFT

Ii,

OB2n OBl n OB1n

ARITH

LOGICAL
RIGHT
SHIFT

en
w

RIGHT
SHIFT

a3

82

al

aO

OB30 OB20 OBIO OBOO
OB30 OB20 OBIO OBOO

:>
w
C

ARITH

Z
Z

u

Z

Z

Z

Z

-I

tt-

H = high leval (steady state)
L = low level (steady state)
Z = high impedance (output off)
aO __ • a3, bO ••• b3 = the level of steady - state condition at I/O 0 thru I/O 3, respectively and intended as A .or 8 input data
FO ••• F3 =internal ALU results
OAO ' •• 080 , FO ••• F3 = the level of OAO thru 083 and FO thru F3, respectively, before the indicated steady-state input conditions were
O
O
0
0
established
OAO n ••• Q83 n = the level of OAO thru 083 before the most recent t transition of the clock
ri, Ii = the level of steady-state conditions at RI/LO or L1/RO, respectively

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1291

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMULATORS

logic symbol

Asa
AS1
AS2

]M~IALUI

(a ..• 7) CP
(a", 7) CG

(a .. , 7) co

M

Cn
RS1

O}EN ~
2

ClK

Cn+4

CI [1]

RS2

Rsa

(8)

P
G

27

C28
22+/24-i>[abcd,logical]
23+/25+[abc,arithmetic]
REG4

t-----------t P[1]
P[2]

r--..;............~----""""I P[4]

P[8]

~----------------~

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) .. " .. ,. , . , , .. , ... , , .. , , , , , , , . , . , , , , , , , , , , , , .... , . .
7V
Input voltage " " , . , .. , " ' , . , . , " , . , . " " , .. , ' , . , ..... , " " ' , . , .. " . , ' , . , ... ,.
7V
Operating free'air temperature range: SN54LS681
, , , , ... , ..... , , . , , , , , , ..... , , "
-55°C to 125°C
SN74lS681
, , , . , .. , , , , , , , .. , . , , , , , , , , , , , . , ... aOc to 70°C
Storage temperature range " , ' , . , " ' , " " ' , " ' " . , .... , " , . , ' , .. ' .. , " ' , . , _65° C to 150° C
NOTE 1: Voltage values are with respect to the network ground terminal.

3-1292

TEXAS

~

INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMULATORS
recommended operating conditions
SN54LS681
MIN NOM MAX
4.5

Supply voltage, VCC

5

LI/RO, I/O, RI/LO

High·level output current, 10H

P, G, C n +4
I/O

5.5
-1
- 0.4

5

8
8

16

G
25

0
25

RSO-RS2 to CLKt

30

30

Data I/O to CLKt

25
0

25

Width of clock pulse, tw(clock)

Hold time, th
Operating free-air temperature, T A

20

V
mA
mA

mA

125

MHz
ns
ns
ns

0

-55

UNIT

16

20

0

5.25
-2.6
- 0.4
24

8

Clock frequency, fclock

Setup time, tsu

4.75

12
4

C n +4, LI/RO, RI/LO
P

Low-level output current, 10L

SN74LS681
MIN NOM MAX

0

70

DC

electrical charactenstlcs over recommended operatmg free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER

Vrn
VIL
VIK
VOH

High-level input voltage
Low-level
en
input voltage
All others
I nput clamp voltage
High-level
Alii/a
output voltage
P, G, C n +4

VCC-MIN, 11--18 mA
VCC-MIN, VIW2 V,

Low-level
output voltage

LI/RO, RI/LO, Cn +4

VCC=MAX, VIW2 V,
VIL=VILmax

P

10ZH

Off-state output
10ZL

II

VO~2.7

VCC=MAX, VIW2 V,

RI/LO

VO=O.4 V

Input current

All I/O

at maximim
input voltage

Cn
All others

input cu rrent

Cn
All I/O
All others

VCC=MAX

VIL=VIL max,

IlL

lOS

Short-circuit
output current §

I/O, LI/RO
CLK
All others

0.4

3.2
3.4
0.25

0.4

0.35
0.25

0.35

0.5

0.35
0.35

0.35

0.5

0.35

0.4
0.5
0.4
0.5

40

- 0.8

VI=5.5 V

0.1

0.1

VI=7V

0.5
0.1

0.5
0.1

100

100

40

40
20

20
-4
-0.8

VCC=MAX, VI=O.4 V

VCC=MAX

P, G, C n +4

-4
-0.8
-0.2
-0.4

-30

-0.2
-0.4
-130 -30

-130

-20

-100 -20

-100

Supply current

TEXAS . .
INSTRUMENlS .
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

100

150

11
en

0.5

- 0.4

VCC=MAX, VI=2.7 V

V

0.5

-0.8

VCC=MAX, RSO at 4.5 V,
150
100
All other I/O at 0 V
. . under recommended operations.
tFor conditions shown as MIN or MAX, usa the appropriate value specified
*AII typical values are at Vee = 5 V, TA = 2SDC.
§Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
ICC

V

- 0.4

VIL=VIL max,

I/O
LlIRO, RI/LO,

2.4
2.7

40

Cn
Low-level
input current

3.1
3.4
0.25
0.25

V

voltage applied

High-level
IIH

VCC=MAX, VIW2 V,

I/O, LltRO

current, low-level

IOL=24 mA
IOL=4 mA
IOL=8 mA
IOL=8mA
IOL=16 mA

G
Off-state output
current, high-level I/O, LI/RO, RI/LO
voltage applied

2.4
2.5

IOL=12mA

I/O
VOL

VIL-VILmax,

10WMAX

SN54LS681
SN74LS681
UNIT
MIN TYP* MAX MIN TYP* MAX
V
2
2
0.7
0.7
V
0.7
0.8
-1.5
-1.5
V

JlA

mA

mA

w
U

:;:

w
C

....I

tt-

JlA

mA

mA

mA

3-1293

TYPES SN54LS681, SN74LS681
4-BIT PARALLEL BINARY ACCUMULATORS
switching characteristics, Vee = 5 V, TA= 25°e
PARAMETERlI

FROM

TO

(INPUT)

(OUTPUT)

tpLH

TEST CONDITIONS

p

25

40
45

tpLH

26

40

27

40

27

40

29

40

36

55

34

50

G

CL=45pF

RL = 667 n,

I/O

tpHL

CLOCKt

tpLH

Cn +4

tpHL

25

40

tpHL

" 23

35

tPLH

19

30

17

30

tPLH

LI/RO

CL=15pF

RL=2kn,

RI/LO

tPHL
tpLH

P

tpHL
tpLH

G

tpHL

CL = 45 pF

RL = 667 n,

ASO-AS2

30

45

30

45

27

35

28

35

31

45

tPHL

29

45

tPLH

39

55

34

50

9

25

tPLH

I/O
Cn +4

tPHL
tPLH

RL=2kn,

CL=15pF

RL=667n,

CL=45pF

p

tpHL
tPLH
tpHL

Cn

tpLH

lID

C n +4

tpHL
tpLH

RL=2kn,

CL=15pF

P

tpHL

-G

tpLH
tPHL

RL = 667 n,

CL=45pF

MODE

tPLH

I/O

tPHL
tpLH

Cn +4

tPHL

RL=2kn,

CL=15pF

tpZH

CL=45pF

tPZL

I/O

RL = 667 n

9

20

17

35

13

20

20

30

16

25

28

40

29

40

21

30

23

30

30

45

28

40

40

60

37

50

28

45

28

45

35

65

tPLZ

39

tpZH

25

65
40

tPHZ

tPZL

CL = 5 pF
CL=15pF
RSO-RS2

LlIRO

RL=2kn

tPHZ

CL = 5 pF

tpLZ
tPZH

CL=15pF

tPZL

RI/LO

RL=2kn

tpHZ

CL = 5pF

tPLZ
tpLH =
tpH L =
=

Propagation delay time, low·to-high-Iellel input
Propagation delay time, high-to-Iow-Ievel input

22

40

21

40

34

60

22

40

24

40

11

30

16

40

tpZH = Output enable time to high level
tpLZ = Output disable time from low level
tpHZ = Output disable time from high level

Output enable time to iaw ievei

NOTE 2: See General Information Section for load circuits and voltage waveforms.

3-1294

MAX

30

tpLH

tpZL

TYP

tpHL
tpHL

CJ

MIN

TEXAS

~

INSTRUMENTS
POST OFFICE BOX"225012 • DALLAS. TEXAS 75265

UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

TYPES SN54LS682 THRU SN54LS689,
SN74LS682 THRU SN74LS689
8-BIT MAGNITUDE/IDENTITY COMPARATORS
02617, JANUARY 1981-REVISED DECEMBER 1983

• Compares Two 8-Bit Words

SN54LS682 THRU SN54LS685 ... J PACKAGE
SN74LS682 THRU SN74LS685 ... OW, J OR N PACKAGE

o Choice of Totem-Pole or Open-Collector
Outputs

/TOPVIEW)

p>o

• Hysteresis at P and Q Inputs
• 'LS682 and 'LS683 have 20-kn Pullup
Resistors on the Q Inputs
o 'LS686 and 'LS687 ... New JT and NT
24-Pin, 3000-Mil Packages

20
19

p=o

00
PI
01
P2
02

18

07
P7
06
P6
05
P5
04
P4

17
16
15
14

P3

13

Q3

12

GND

TYPE P=Q P>Q
'LS682 yes

OUTPUT

OUTPUT

ENABLE CONFIGURATION

'LS683 yes

yes
yes

no
no

'LS684 yes

yes

no

open·collector
totem·pole

'LS685 yes

yes

'LS686 yes

yes

no
yes

open·collector
totem·pole

yes

yes

'LS688 yes

no
no

yes
yes

'LS689 yes

10

11

20·k.l1
PULLUP

totem-pole

'LS687 yes

VCC

PO

yes
yes

SN54LS682 THRU SN54LS685 ... FK PACKAGE
SN74LS682 THRU SN74LS685 ... FN PACKAGE
/TOPVIEW)

no
no

8

no

open·collector
totem·pole
open·collector

0

01\

3

no

ulo
U

II

a.. 1 a.. > a..
2 1 2019

Q7

no
no

P7
06

P6
05
9 10 11 1213

SN54LS686, SN54LS687 ... JT PACKAGE
SN74LS686, SN74LS687 ... OW, JT OR NT PACKAGE
(TOPVIEWI

p>o

VCC

Gl

G2

PO

p=o

00
PI
01

Q7

NC

06
P6
05
P5
04
P4

SN54LS688, SN54LS689 ... J PACKAGE
SN74LS688, SN74LS689 ... OW, J OR N PACKAGE
(TOP VIEW)

P7

G

NC

P3
Q3

GND

12

13

['"10'20

PO

2
3

00
PI
01
P2
02
P3

17
16
6

15

7

14
13

03

SN54LS686, SN54LS687 ... FK PACKAGE
SN74LS686, SN74LS687 ... FN PACKAGE

19
18

12

GND

10

11

VCC

p=o
Q7

en
w

U

>
w

P7
06
P6
05
P5
04
P4

C

....I

....
....

/TOPVIEW)
SN54LS688, SN54LS689 ... FK PACKAGE
SN74LS688, SN74LS689 ... FN PACKAGE
/TOPVIEW)
4

3

2

1 28 2726

00
PI
01

25
24

NC

23
22

NC
NC

NC

21

06
P6
05

P2
02

10
11

20
19

8

07
P7

ulo

~I(;);;'~

3 2

1 20 19
Q7

P7
06

P6
Q5

12131415161718

~8~~({~~
(;)

NC - No internal connection

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specIfications per the terms of Texas Instruments

~~~nnd:~~s~~[{:rntJiu~~Ot~~~~~~nof~~f~~~~"riie~~;s~

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1295

TYPES SN54LS682 THRU SN54LS689,
SN74LS682 THRU SN74LS689
8-BIT MAGNITUDE/IDENTITY COMPARATORS
description

FUNCTION TABLE

These magnitude comparators perform comparisons
of two eight-bit binary or BCD words. All types
provide P = Q outputs and the 'LS682 thru 'LS687
provide P > Q outputs as well. The 'LS682, 'LS684,
'LS686, and 'LS688 have totem-pole outputs, while
the 'LS683, 'LS685, 'LS687, and 'LS689 have opencollector outputs. The 'LS682 and 'LS683 feature
20-kD pullup termination resistors on the Q inputs
for analog or switch data.

OUTPUTS

INPUTS
DATA
P, Q

G,G1

G2

P= Q

'i">Q

P= Q

L

X

L

H

P> Q

X

L

H

L

P< Q

X

X

H

H

P= Q

H

X

H

H

P> Q

X

H

H

H

X

H

H

H

H

NOTES:

logic symbols

ENABLES

1. The last three lines of the function table applies only
to the devices having enable inputs, i.e., 'LS686 thru
'LS689.
2. The P < a function can be generated by applying the
P = Q and P > Q outputs to a 2-input NAN D gate.
3. For 'LS686, 'LS687 Gl enables P = Q, and G2 enables
P > Q.

'LS683, 'LS685

'LS682, 'LS684

PO

CaMP

(21
ilo
(41

PO

(41

P3
P4

-i
-i
rC

m

<

n
m
en

P7 (171

il7

(31
00
01 (5)

(31

00
01 (5)

ilo

111
02
03 (9)

p>o
-

06 (16)
07

(21

Gl
- (231
G2
PO (31

05 (14)

(18)
D7

111
02
03 (9)

'LS686

0

04 (12)

(81
(111

(131
P5
P6 (15)

p=o

P6 (15)

P7 (17)

Gl

CaMP

04 (12)

[>

05 (14)

G2

(51

Q7

(18)

Pl
P2

Pin numbers shown on logic notation
are for OW, J, JT, N or NT packages.

P3

(101

(131
P4
P5 (151

P= 0

P6 (171
P7 (201
00 (41

Do

01 (61
02 (91

P> 0

03 (111

o

04 (141
05

(161
(181

~:~il

o

06 (16)

Do

(81

3-1296

Do

P1
P2 (61

Pl
P2 (61
(8)
P3
(11)
P4

II"""

COMP

(21

[>

7j

-I!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

D7

TYPES SN54LS682 THRU SN54LS689,
SN74LS682 THRU SN74LS689
8-BIT MAGNITUDE/IDENTITY COMPARATORS
logic symbols (continued)
'LS687

'LS68B

COMP
01 (21
_ (231
G2
PO (31

Gl

COMP

!>

Gl

G2

PO

Do

PI

(SI

(101

P3
P4 (131
P5 (151

P6 (15)

P= 0

P7 (17)

P6 (171

00 (41
Q1

D7

00(31
01 (51

Do

(61

02 (7)

02 (91

03(9)

P>O

03 (111
0

04 (141

G(11

'LS689

04 (12)

COMP

05(14)

Gl

05 (161
PO (2)
06 (181
(211
07

(41

P2
P3 (81
(11)
P4
P5 (13l

PI

P7 (201

!>

Do
(61

(51
P2

(21

!>

06

(161
(18)

Do

07

PI (41
D7

o

(6)

P2
P3 (81
(11)

Pin numbers shown on logic notation
are for DW. J. JT. N or NT packages.

P4
P5 (13)

II

P6 (15)
P7 '(17)

p;Q

D7

00(31

en

Do

W

Q1 (5)

u

02(7)

5=
w

03(91
0

04 (12)

C

05(14)
06

..oJ

(16)

....
....

(18)
07

D7

schematics of inputs and outputs
EaUIVALENT OF EACH a INPUT EaUIVALENT OF ALL OTHER
OF 'LS682, LS683 ONLY
INPUTS
VCC--4~-"'"

V C C - - -.....

TYPICAL OF OUTPUTS OF
'LS6B2, 'LS684, 'LS686, 'LS6B8

TYPICAL OF OUTPUTS OF
'LS683, 'LS6B5, 'LS6B7, 'LS689

- -....-VCC

_ _ ~OUTPUT
INPUT

INPUT
OUTPUT

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1297

TYPES SN54LS682 THRU SN54LS685
SN74LS682 THRU SN74LS685
8-BIT MAGNITUDE/IDENTITY COMPARATORS
'LS682 thru 'LS685 logic diagram (positive logic)

11
-I
-I

r

C

m

S
("')

m

rn

Pin numbers shown on logic notation are for ow, J or N packages

3-1298

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS686, SN54LS687
SN74LS686,SN74LS687
8-BIT MAGNITUDE/IDENTITY COMPARATORS
'LS686, 'LS687 logic diagram (positive logic)
P7(20)
,~

.~/

(21)

Q7

(17)

P6

,,--

(18)

06

(15)

P5

(16)

I'J

05
P4

04
P3

03

(13)

(10)

02
Pl
01
PO

00

~~

11

(11)

P2

L-

~=------H.-/

(14)

''--

mY

(8) a
~

(9)
11

(5)
,~

(6)

a

.~/-'

(3)
.~

(4)

~

t=~

II

~
~

-

~

illtx>-

en
w

~

u
>
w

~)-

~

C

~

~ ~tp--!1L

~)fFr
r-;::

P>O

...J
~
~

L---....t

)-

}-Pin numbers shown on logic notation are for DW. JT. or NT packages.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1299

TYPES SN54LS688, SN54LS689,
SN74LS688,SN74LS689
8-BIT IDENTITY COMPARATORS
'LS688, 'LS689 logic diagram (positive logic)

II
"'r""
"'""

C

m
~

C')

m

(J)

Pin numbers shown on logic notation are for DW, J or N packages.

absolute. maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
.Input voltage: Q inputs of 'LS682 and 'LS683
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
All other inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-state output voltage: 'LS683, 'LS685, 'LS687, 'LS689
Operating free-air temperature range: SN54LS682 thru SN54LS689
.... . . . . . . . . . . . . . .. -55°C to 125°C
SN74LS682 thru SN74LS689
... . . . . . . . . . . . . . . . . . .. oOe to 70°C
0
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65° e to 150 e
NOTE 1: Voltage values are with respect to network ground terminal.

3-1300

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPES SN54LS682, SN54LS684, SN54LS686, SN54LS688,
SN74LS682, SN74LS684, SN74LS686, SN74LS688
8-BIT MAGNITUDE/IDENTITY COMPARATORS WITH TOTEM-POLE OUTPUTS
'LS682, 'LS684, 'LS686, 'LS688
recommended operating conditions
SN54LS'

SN74LS'

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

-400

IJA

24

rnA

70

°c

Supply voltage, Vee
High-level output current, IOH

-400

Low-level output current, IOL

12

Operating free-air temperature, T A

UNIT

MIN

-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
-

PARAMETER
VIH

High-level input voltage

VIL

Low~evel

VT+ - VT_

Hysteresis

High-level output voltage

VOL

Low-level output voltage

Vee = MIN

MAX

VIH=2V,

VIL = VILmax,

IOH = -4001JA

VIH = 2 V,

I
I

0.8

V

-1.5

V

V

0.4

V

2.7

2.5
0.25

IOL=12mA

0.4

0.25

0.4

0.35

0.5

V
IOL = 24 rnA

Input currentl Q .
682
Inputs, 'LS
at maximum
AII
input vOltagel
other inputs

Vee= MAX,

VI = 5.5 V

Vee = MAX,

VI =7 V

High-level input current

Vee = MAX,

VI = 2.7 V

20

20

Low-level

Vee = MAX,

VI = 0.4 V

-0.4

-0.4

Vee= MAX,

Vo = 0

IQ inputs, 'LS682

0.1

input current/All other inputs
Short-circuit output current

0.1

-0.2

-0.2
-100 . -20

-20

-100

'LS682

42

70

42

70

Supply

'LS684

40

65

40

65

current

'LS686

44

75

44

75

40

65

40

65

Vee = MAX,

UNIT
V

-1.5

II = ·-18mA

Vee= MIN,

VIL = VILmax

ICC

TYPt

0.4

Vee= MIN,

Vee= MIN,

IOS§

MIN

0.7

VOH

IlL

MAX

2

input voltage

VIK

IIH

TYPt

MIN
2

I P or Q inputs
Input clamp voltage

II

SN74LS'

SN54LS'

TEST CONDITIONSt

See Note 2

'LS688

rnA
IJA
rnA
rnA

rnA

C

..J

....

switching characteristics, Vee = 5 V, T A = 25°e
PARAMETER#
tPLH

TO

(INPUTS)

TEST

'LS682

tPLH

P

P=Q

Q

P=Q

tPHL
tPLH

G,G1

P=Q

P

P> Q

tPHL
tPLH
tPHL
tPLH

RL=667n,
eL=45pF,
All other
inputs low,
See Note 3

Q

P>Q

G2

P>Q

tPHL
tPLH

13

25

15

25

13

25

18

27

15

25

17

25

20

30

20

30

14

25

16

25

13

25

18

27

15

25

15

25

21

30

20

30

11

20

12

18

19

30

13

20

30

20

30

22

30

19

15

30

17·

30

15

30

21

30

24

30

18

30

19

30

20

30

19

30

21

30

16

25

tPHL
#tPLH

== propagation delay

....

'LS688

'LS686

'LS684

(OUTPUT) CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX

tPHL

en
w

u

:>w

tAil tYpical values are at Vee = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time, and duration of the short·circuit should not exceed One second.
NOTE 2: ICC is measured with any G inputs grounded, all other inputs at 4.5 V, and all outputs open.

FROM

II

UNIT
ns
ns
ns
ns
ns
ns

time, low·to-high·!evel outputs; tpH L == propagation delay time, high-to:low-Ievel output.

NOTE 3: See General Information Section for load circuits and voltage waveforms.

TEXAS

-II}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1301

TYPES SN54LS683, SN54LS685, SN54LS687, SN54LS689,
SN74LS683, SN74LS685, SN74LS687, SN74LS689
a-BIT MAGNITUDE/IDENTITY COMPARATORS WITH OPEN-COLLECTOR OUTPUTS
'LS683, 'LS685/LS687, 'LS689

recommended operating conditions

SN54LS'

SN74LS'

MIN

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

Supply voltage, Vee

UNIT
V

High-level output voltage, VOH

5.5

5.5

V

Low-level output current, IOL

12

24

mA

70

°e

Operating free-air temperature, T A

-55

125

0

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER

SN54LS'

TEST CONDITIONSt
MIN

VIH

High-level input voltage

VIL

Low-level input voltage

VT+ - VT-

Hysteresis

VIK

Input clamp voltage
Hig~-Ievel

IOH

P or Q inputs

11~-18mA

Vee~

VIH ~ 2 V,

MIN,

VIL ~ VILmax,
VIH ~ 2 V,

r-

o
m

<

n
m
en

IOL~12mA

0.25

250

100
0.25

0.4

0.35

0.5

Vee

~

Supply

'LS685
'LS687

MAX,

~

7 V

VI

~

2.7 V

Vee ~ MAX,

Vee

~

I1A

VI~5.5V

VI

VI

~

0.4 V

MAX,

0.1

mA

20

20

I1A

-0.4

-0.4

-0.2

'LS683
current

V

V

Q inputs, 'LS683

input current All other inputs

lee

-1.5

0.1

High-level input current

V
V

-1.5

0.4

UNIT
V

0.4

IOL ~ 24 mA

Vee ~ MAX,

All other inputs

Low-level

-i
-i

I
I

Q inputs, 'LS683 Vee ~ MAX,

input voltage

II

VOH ~ 5.5 V

at maximum

IlL

MAX
0.8

0.4

Vee ~ MIN,

VIL ~ VILmax

IIH

TYP~

2

Vee ~ MIN

output voltage

Input current

MIN

0.7

Low-level output voltage

II

SN74LS'
MAX

2

Vee ~ MIN,
VOL

TYP~

See Note 2

'LS689

42

70

40
44
40

-0.2
42

70

65

40

65

75

44

75

65

40

65

mA

mA

t For conditions shown as M IN or MAX, use the appropriate value specified under recommended operating conditions.
tAil typical values are at Vee
NOTE 2:

~

5 V, T A

lee is measured with any

switching characteristics, Vee
PARAMETER~

FROM
(INPUTS)

~

25°e.

G inputs

TO

.

grounded, all other inputs at 4.5 V, and all outputs open.

= 5 V, T A = 25°e
TEST

'LS683

(OUTPUT) CONDITIONS MIN

'LS685

'LS689

'LS687

TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
30

45

30

45

24

35

24

tPHL

20

30

19

35

20

30

22

35

tPLH

24

35

24

45

24

35

24

40

23

35

23

35

20

30

22

35

21

35

22

35

18

30

19

30

24

35

tPLH

P
Q

P~ Q
P~ Q

tPHL

RL~667n,
eL~45pF,

tPLH

G,G1

P~ Q

tPHL

All other
inputs low,
32

45

30

16

35

16

30

45

30

45

24

35

30

20

35

31

45

tPHL

17

tPLH

30
21

tPLH

P
Q

P> Q

P>Ci

tPHL
tpLH

G2

See Note 3

P> Q

tPHL

~ tpLH

30
35

15

30

"" propagation delay time, low-to-high-Ievel output; tpH L '" propagation delay time, high-to-Iow-Ievel·output.

NOTE 3:

3-1302

16
24

See General Information Section for load circuits and voltage waveforms.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

40

UNIT
ns
ns
ns
ns
ns
ns

TYPES SN54LS690 THRU SN54LS693, SN74LS690 THRU SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
D2423, JANUARY 1981

SN54LS690 THRU SN54LS693 ... J PACKAGE
SN74LS690 THRU SN74LS693 ... OW, J OR N PACKAGE

• 4-Bit Counters/Registers
• Multiplexed Outputs for Counter or Latched
Data

(TOPVIEWI

• 3-State Outputs Drive Bus Lines Directly

VCC
RCO

CCK

• 'LS690 .. Decade Counter, Direct Clear
'LS691 .. Binary Counter, Direct Clear
'LS692 .. Decade Counter, Synchronous
Clear
'LS693 .. Binary Counter, Synchronous Clear

°A
Os
Oc
OD
ENT
LOAD

D

description

G

RCK
GND

These low-power Schottky LSI devices incorporate synchronous counters, four-bit D-type registers, and
quadruple two-line to one-line multiplexers with threestate outputs in a singh( 20-pin package. The counters
can be programmed from the data inputs and have
enable P inputs and enable T inputs and a ripple-carry
output for easy expansion. The register/counter select
input, R/C, selects the counter when low or the register
when high for the three-state outputs, OA, OS, OC, and
0D. These outputs are rated at 12 and 24 milliamperes
(54LSI74LS) for good bus-driving performance.

R/C

SN54LS690 THRU SN54LS693 ... FK PACKAGE
SN74LS690 THEU SN74LS693 ... FN PACKAGE
(TOPVIEWI

:.::15
u u uo
uu
a:

Individual clock and clear inputs are provided for both
the counter and the register. Soth clock inputs are
positive-edge triggered: The clear line is active low and
is asynchronous on the 'LS690 and 'LS691, synchronous on the 'LS692 and 'LS693. Loading of the
counter is accomplished when LOAD is taken low and
a positive-transition occurs on the counter clock CCK.

II
CJ)

W

U

>
w

Expansion is easily accomplished by connecting RCO of
the first stage to ENT of the second stage, etc. All ENP
inputs can be tied common and used as a master enable
or disable control.

C

-I

lI-

schematics of inputs and outputs
EaUIVALENT OF
A.B.C,OINPUTS

EaUIVALENT OF
ALL OTHER INPUTS

TYPICAL OF
ALL a OUTPUTS

RCO OUTPUT

--------1--- VCe
vee-----'l~--

Vee

20 kS1 NOM
INPUT
OUTPUT

PRODUCTION DATA
This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~n::::s-:a~rl~ar~liu~~Ot~~~f~~nor~~f~~~~"d:e~~::'

TEXAS •
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1303

TYPE SN54LS690, SN74LS690
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams

-I
-I
rC

m

<
n
m

I

en

z

....,0

~

0

.E
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co

c
0

.~

g

§
0

0

';:;,
..Q
c
0

!
In
Q)

1
a:
c

3-1304

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

TYPE SN54LS691, SN74LS691
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams (continued)


.Q

c:

o

~

~

§
CJ

Q

~

1
a:
c:

3-1306

TEXAS ..",
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPE SN54LS693, SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams (continued)

<

c:l

~

8

0

0

~

E

c

0

~

0

u

a:

~

M
C'l

to

en

::-I

CJ)

W

U

>
w
o

t

..J

lI-

z

o

--,

i
Cl
o

'"
OJ

C

o

i
(J

~
c
o

!
'"

·1a:
c

.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1307

TYPES SN54LS690 THRU SN54LS693, SN74LS690 THRU SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
logic symbols

'LS690

'LS691

3CT=15

A

OA

B

°B

C

Oc

0

00

Z22

22

(19)

RCO

OA

A

OB
C

0

5)
(6)

[4)

Oc

[8)

00

'LS693

'LS692

~
~

r

o

22

m

<

OA

en

°B
Oc

00

OA

A
B (4
C

0

(5
6)

Pin numbers shown on logic notation are for OW, J or N packages.

3-1308

RCO

CCK

(")

m

(19)

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

[2)

OB

[4)

Oc

[8)

00

TYPES SN54LS690 THRU SN54LS693, SN74LS690 THRU SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range' (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...................................................
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off·state output voltage
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free·air temperature range: SN54LS690 thru SN54LS693 . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
SN74LS690 thru SN74LS693 . . . . . . . . . . . . . . . . . . . . . . . oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . _65° e to 150° e
NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS'

SN54LS'

VCC

Supply voltage

VIH

High·level input voltage

VIL

Low·level input voltage

IOH

High·level output current

NOM

MAX

MIN

NOM

MAX

4.5

5

5.5

4.75

5

5.25

V

0.8

V

2
Q

RCO

IOL

Low·level output current

fclock

Clock frequency

tw

Pulse duration

Q

RCO

I

'LS690, 'LS691

tsu

tsu

Setup time
before CCK t

I 'LS692, 'LS693

Setup time

I 'LS690, 'LS691
I 'LS690 'LS691

before RCK t

I 'LS692: 'LS693

th

Hold time

I Any input from CCK

TA

Operating free-air temperature

V

2
0.7

.

UNIT

MIN

-1

- 2.6

mA

-0.4

-0.4

mA

12

24

mA

4

8

mA

CCK

0

20

0

20

MHz

RCK

0

20

0

20

MHz

CCK high or low

25

25

RCK high or low

25

25

RCLR low

20

20

CCLR low

20

20

A thru D

30

30

ENP or ENT

30

30

LOAD l

30

30

CCLR l

40

40

CCLR t inactive

25

25

CCK t (see Note 2)

30

30

RCLR t inactive

25

25

RCLR l

20

20

0

0

t or RCK t

- 55

125

0

ns

ns

(/J

W
(J

:>w

ns

C

ns
70

..J

°c

NOTE 2: This set up time ensures the register will see stable data from the counter outputs. The clocks may be tied together in which case the
register state will be one clock pulse behind the counter.

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

lI-

3-1309

TYPES SN54LS690 THRU SN54LS693, SN74LS690 THRU SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LS'
PARAMETER
VIK
VOH

Any

Q

Any

Q

VCC

= MIN, II = - 18 mA

VCC

= MIN, VIH = 2 V,

VIL = MAX

RCO

VOL

TEST CONDITIONSt

Any

Q

Any

Q

RCO

IOZl

Any

Any

ICCZ

II
-I
-I

r-

= -1 mA

2.4

3.1

2.5

3.2

IOH - - 2.6 mA
0.25

IOL=12mA
VCC = MIN, VIH = 2 V,

IOl = 24 mA

Vil = MAX

IOl=4mA

0.25

VCC

= MAX, VIH = 2 V, Vil = MAX,

Q

Va

= 0.4 V

Vce = MAX, VI = 7 V
Vec = MAX, VI = 2.7 V
All others
Any

ICCH

MIN

TYP*

MAX
-1.5

2.4

3.1

2.7

3.2

0.4
0.4

UNIT
V
V

0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V

20

20

- 20

-20

IJ.A

0.1

0.1

mA

20

20

IJ.A

- 0.4

-0.4

IJ.A

VCC = MAX, VIH = 2 V, Vil = MAX,

A thru 0

leCl

IOH

Vo = 2.7 V

IIH

lOSS

SN74LS'
MAX

IOl=8mA
Q

II

III

TYP*

-1.5

IOH = - 0.4 mA

RCO
IOZH

MIN

RCO

Vcc = MAX, VI = 0.4 V

-0.2

Q

Vee = MAX, Vo
Vce = MAX,
All outputs open

=

0 V

-0.2

- 30

-130

-30

- 130

- 20

-100

- 20

-100

See Note 3

46

65

46

65

See Note 4

48

70

48

70

See Note 5

48

70

48

70

mA
mA

mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC = 5 V, T A = 25°C.
§ Not more than one output should be shorted at a time and duration of short-circuit should not exceed one second.
NOTES: 3. ICCH is measured after two 4.5 V to o-v to 4.5-V pulses have been applied to CCK and RCK while G is grounded and all other inputs are at 4.5 V.
4. ICCL is measured after two o-v to 4.5-V to O-V pulses have been applied to CCK and RCK while all other inputs are gr04nded.
5. ICCZ is measured after two o-V to 4.5-V to O-V pulses have been applied to CCK and RCK while G is at 4.5 V and all other inputs are grounded.

C

m

::5

n
m
en

3-1310

TEXAS

lj}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS690 THRU SN54LS693, SN74LS690 THRU SN74LS693
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
switching characteristics, Vee = S V, TA =2sO e (see note 6)
PARAMETER
tpLH

FROM

TO

(INPUT)

(OUTPUT)

CCKt

TEST CONDITIONS

RCO

RL

tpHL
tPLH

ENT

=2

kn, CL

'LS690, 'LS691
MIN

= 15 pF

RCO

'LS692, 'LS693
MIN

TYP

MAX

TYP

MAX

23

40

23

40

23

40

23

40

13

20

13

20

tPHL

13

20

13

20

tpLH

a

12

20

12

20

17

25

17

25

RCKt

a

12

20

12

20

17

25

17

25

tPHL

CCLR~

tPHL

RCLR~

a
a
a

CCKt

tPHL
tpLH
tpHL

tPLH
tpHL
tpZH
tpZL
tpHZ
tPLZ

RIC
o~

a

Ot

a

RL

RL

= 667

= 667

n, CL

= 45 pF

n, CL = 5 pF

23

40

20

30

16

25

16

16

25

16

25

19

30

19

30

19

30

19

30

17
17

30

17

30

30

17

30

UNIT

ns
ns
ns
ns
ns
ns

25

ns
ns
ns

NOTE 6: See General Information Section for load circuits and voltage waveforms.
tpLH
tpHL
tpZH
tpzL
tpHZ
tpLZ

Propagation delav time, low·to·high·level output

= Propagation delav time, high·to·low·level output

=

Output
Output
Output
Output

enable time to high level
enable time to low level
disable time from high level
disable time from low level

•
en
w

CJ

>
w

C

......
....I

TEXAS

-1!1

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1311

TYPES SN54LS690, SN54LS692, SN74LS690, SN74LS692
SYNCHRONOUS COUNTERS WITH OUTPUT REGISTERS
AND MULTIPLEXED 3-STATE OUTPUTS
typical operating sequences

'"

..

u..!!!
CI>

'"

"'U
::l

::l
I:

I:

CD

1:

+-~
It:
(I)...J

4.~

lEI
-I
-I
rC

m

:5
(")

0
Zit:

.... (1)0
> ...J

tJ,.c:
I: tJ

cr:" ci
ww

M

zz

N

uu
ww
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00
CC



..
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C3~



>- ...1
u
z
+->a:
(11..1

:J

0

+-(11

o c

.r:Yo::~
C

u

>c

M

ci c£

N

~~
w w
ZZ

1-1::J:::l

00
UU

N

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C

cncn

:-1:-1

..J

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1t:J

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Z

w

IZ

w

~

U

«

u

c

a:

-I!}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

In

o

o

U

a:

3-1313

II
-I
-I

rC

m

S
(")

m

en

3-1314

TYPES SN54LS696 THRU SN54LS699, SN74LS696 THRU SN74LS699
SYNCHRONOUS UP/DOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
D2424. JANUARY 1981

SN54LS696 THRU SN54LS699 ... J PACKAGE
SN74LS696 THRU SN74LS699 ... ow, J OR N PACKAGE

• 4-Bit Counters/Registers
• Multiplexed Outputs for Counter or Latched
Data

(TOP VIEW)

• 3-State Outputs Drive Bus Lines Directly

• 'LS696
'LS697
'LS698
'LS699

Decade Counter, Direct Clear
Binary Counter, Direct Clear
Decade Counter, Synchronous
Clear
Binary Counter, Synchronous
Clear

description
These low-power Schottky LSI devices incorporate synchronous up/down counters, four-bit D-type registers,
and quadruple two-line to one-line multiplexers with
three state outputs in a single 20-pin package. The

VCC
RCO

CCK
A
8
C
D
ENP
CCLR
RCK
GND

°A
08
Oc
OD
ENT
LOAD
G
R/C

SN54LS696 THRU SN54LS699 ... FK PACKAGE
SN74LS696 THRU SN74LS699 ... FN PACKAGE
(TOP VIEW)

~IC
UjO
U
....... UU

up/down counters are pr~wammable fr~m the data inputs and feature enable P and enable T and a ripplecarry output f~ easy expansion. The register/counter
select input R/C, selects the counter when low and the
register when high for the three-state outputs, OA, OB,
0C, and 0D. These outputs are rated at 12 and 24
milliamperes (54LS174LS) for good bus driving performance.

~U:::»a:

8

C
D
ENP
CCLR

4
5
6

OA
08
Oc

7

Q!2..

8

ENT

" '.,.'''''''''''1
I: ~,.
' (~
_
.
f

80th the counter clock CCK and register clock RCK are
positive-edge triggered. The counter clear CCLR is
active low and is a synchronous on the 'LS696 and
'LS697, synchronous on the 'LS698 and 'LS699.
Loading of the counter is accomplished when LOAD is
taken low and a positive transition occurs on the counter
clock CCK.

-"'

(J)

W

U

>
w
C

Expansion is easily accomplished by connecting RCO of
the first stage to ENT of the second stage, etc. All ENP
inputs can be tied common and used as a master enable
or disable control.

o

...J

l-

I-

schematics of inputs and outputs
EQUIVALENT OF

EQUIVALENT OF

TYPICAL OF

A. B. C. 0 INPUTS

ALL OTHER INPUTS

ALL Q OUTPUTS

VCC

20 kn NOM

INPUT

--

RCO OUTPUT

VCC
13 kn NOM
VCC1$
INPUT

PRODUCTION DATA

This document contains information current as
of publication date. Products conform to
specifications per the terms of Texas Instruments

~~~nnd:::s~;il~~liu~~ol~~~f~~nor~~f~!~~n~e~~:s~

OUTPUT

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1315

TYPES SN54LS696 THRU SN54LS699, SN74LS696 THRU SN74LS699
SYNCHRONOUS UP/DOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
logic symbols
'lS697

'lS696

II
-f
-f
r
C

'lS698

'lS699

m

<

(")

m
(J)

Pin numbers shown on logic notation are for

3-1316

ow. J or N packages.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

TYPES SN54LS696, SN74LS696
SYNCHRONOUS UPIDOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams
o

co

o

o

I~

II
en
w

(.)

:>w

t
z

o

....,

~
o

~

c:

o

.~

g
o

.6>
.2
c:
o
c:

~

.,'"

co

~

u
u

u

1
c:
ii:

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

3-1317

C

....I

tt-

TYPES SN54LS697, SN74LS697
SYNCHRONOUS UPIDOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams (continued)
«

o

u

aJ

o

o

-t
-t
rC

m
~

(')

m
en

3-1318

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

c

o

I~

TYPES SN54LS696, SN74LS696, SN54LS698, SN74LS698
SYNCHRONOUS UPIDOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams (continued)

w

C

u

~

u

u

-II}

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

3-1319

TYPES SN54LS697, SN74LS697, SN54LS699, SN74LS699
SYNCHRONOUS UP/DOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
logic diagrams (continued)
o<

u

Ql

o

o

I~

o

o

II
-t
-t
r-

C

m

<
c:;

t

m

en

z

..,0
~0
0
Q)

co

.j"
0

u

~

"

0

l
'"

Q)

0

3-1320

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

1
a:"

TYPES SN54LS696 THRU SN54LS699, SN74LS696 THRU SN74LS699
SYNCHRONOUS UP/DOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee (see Note 1)
...................................................
7V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7V
Off-state output voltage
.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
5.5 V
Operating free-air temperature range: SN54LS696 thru SN54LS699 . . . . . . . . . . . . . . . . . . . .. _55°C to 125°C
SN74LS696 thru SN74LS699 . . . . . . . . . . . . . . . . . . . . . . .. oOe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C
NOTE1: Voltage values are with respect to network ground terminal.

recommended operating conditions
SN74LS'

SN54LS'

VCC

Supply voltage

IOH

High-level output current

MIN

NOM

4.5

5

RCO
Q

Low-level output current

fclock

Cloc k frequency

tw

tsu

Pulse duration

MIN

NOM

5.5

4.75

5

-1

Q

IOL

MAX

RCO

MAX
5.25

- 0.4

-0.4

12

24

4'

8

0

20

0

20

RCK

0

20

0

20

25

V

-2.6

CCK

CCK high or low

UNIT

mA
mA

MHz

25
ns

RCK high or low

25

25

'LS696, 'LS697 CCLR low

20

20

A thru D

30

30

ENP or ENT

30

30

Setup time

LOAD

30

30

before CCK t

UfD

35

35

'LS696, 'LS697, CCLR inactive

25

25

'LS698, 'LS699, CC LR

30

30

30

30

ns

0

0

ns

tsu

Setup time CCK t before RCK t (see Note 2)

th

Hold time

TA

Operating free-air temperature

- 55

125

0

II

ns

70

en
w

°c

NOTE 2: This set up time ensures the register will see stable data from the counter outputs. The clocks may be tied together in which case the

register state will be one clock pulse behind the counter.

~

TEXAS
INSTRUMENlS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

U

>
W

C

3-1321

TYPES SN54LS696 THRU SN54LS699, SN74LS696 THRU SN74LS699
SYNCHRONOUS UP/DOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
'electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TEST CONDITIONSt

PARAMETER
VIH

High-level input voltage

VIL

Low-level input voltage

VIK

Input clamp voltage

VOH

High-level output voltage Any Q

MIN

SN54LS'
TVpt MAX

VCCMIN, 11=-18 mA
VCC=MIN, VIW2 V,
VIL=VIL max

RCLi

IOH=-1 mA

Any Q

2.4

3.1

2.5

3.2
0.25

10L =12 mA

Any Q

VCC=MIN, VIW2 V,

10L =24 mA

RCa

VIL=VILmax

IOL=4 mA

~

3.2
0.25

0.4

0.35

0.5

0.25

0.4

0.35

0.5

V

VO=2.7 V

20

20

/-LA

Off-state output current,
Any Q
10ZL
low-level voltage applied

VCC=MAX, G at 2 V,

VO=O.4 V

-20

-20

Il A

0.1

0_1

mA

20
-0.4

20
-0.4

IlA

VCC=MAX, VI=7 V
VCC=MAX, VI=2.7 V

High-level input current
Low-level input current

0.4

IOL=8 mA

mum input voltage -

lOS

n
m
en

0.4

V

3.1

VCC=MAX, G at 2 V,

IlL

m

2.4
2.7

V
V

Off-state output current,
Any Q
high-level voltage applied

IIH

C

-1.5

10ZH

0.25

Input current at maxi-

r-

-1.5

VOL

II

-I
-I

V
0.8

Low-level output voltage

RCa

II

UNIT

0.7

IOH=-2.6 mA
IOW-400IlA

SN74LS'
TVpt MAX

2

2

Any Q

MIN

A thru D
All others

Short-circuit

Any Q

output current §

RCa

VCC=MAX, VI=O.4 V
-30

VCCMAX, VO=O V

ICCH Supply current, outputs high
ICCL Supply current, outputs low

VCC=MAX,
All outputs open

ICCZ Supply current, outputs off

-20

-0.2

-0.2
-130

-30

-130

-100

-20

-100

See Note 3

46

65

46

See Note 4
See Note 5

48

70

48

70

48

70

48

70

mA
mA

65
mA

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
t All typical values are at VCC ~ 5 V, T A ~ 25° C.
§ Only one output should be shorted at a time, and duration of the short-circuit should not exceed one second.

NOTES: 3. ICCH is
puts are
4. ICCL is
5. ICCZ is
puts are

measured after two 4.5 V to 0 V to 4.5 V pulses have been applied to CCK and RCK while G is grounded and all other inat 4.5 V.
measured after two 0 V to 4.5 V to 0 V pulses have been applied to CCK and RCK while all other inputs are grounded.
measured after two 0 V to 4.5 V to 0 V pulses have been applied to CCK and RCK while G is at 4.5 V and all other ingrounded.

switching characteristics, Vee
PARAMETER

= 5 V, T A = 25°e
TO
(OUTPUT)

tpLH
tpHL

CCKt

tPLH
tpHL

ENT

tPLH
tpHL

CCKt

tPLH
tpHL

RCKt

tpHL

CCLRt

Q

tPLH
tpHL

RIC

Q

tpZH
tpZL
tpHZ
NOTE 6:

3-1322

FROM
(INPUT)

(see note 6)

TEST CONDITIONS

'LS696. 'LS697
MIN

RCa
RL=2kn,cL=15pF
RCa

Gi

Q

23
23

40

RL = 667 n, CL = 45 pF

RL

=;

667 .0., CL ;;: 5 pF

See General Information Section for load circuits and voltage waveforms.

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

'LS698. 'LS699

UNIT

TVP

MAX
40

ns

40

23
23

40

13

20

13

13

20
20

13

20
20

ns
ns

12

20

ns

17
12

25
20

ns

12

25
20

17

25

17

25

ns

23

40

16

25

16

25

ns

16

25

16

ns

19

30

19

25
30

19

30

19

ns

17

30
30

17

30
30
30

17

Q

Q

MAX

12

Q

ch

TVP

17

MIN

ns

ns
ns

17

ns
ns

I

ns

TYPES SN54LS696, SN54LS698, SN74LS696, SN74LS698
SYNCHRONOUS UPIDOWN COUNTERS
WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
typical operating sequences

T

z

$.

o

ro ...
ro

g

IZ

Q)

u~

... :J

"'u

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to

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IZ

:-1::-1

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... :J

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0
Vl...l
(J

_ z a:
->...1
C/lU

1C!l

l~ I~

Ie

3

~

a:

~

(J

u
u

TEXAS

e

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

I~

+- Vl...l
~ a:

c

~~

M

cr.',£
ww

1-1-

ZZ

:,):,)

00

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»cr.cr.
-I
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C)C)

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m

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g
(I)..J

...

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..01.-2

a:

--->
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+-2

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3-1324

I~

10

:5

~

U

a:

~

U
U

I~

a:

ct

U

o

TEXAS·~
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

(I)..J

I~

ctu

The TTL Data Book

1DII

~_G_e_n_e_ra_I_I_nf_o_r_m_a_t_io_n____________

Functional Index

TTL

Devi~es

Mechanical Data

4-1

IIs:
m

o

::t

»

o-

:2

»

rC

»
-f
»
4-2

MECHANICAL DATA
ORDERING INSTRUCTIONS
Electrical characteristics presented in this data book, unless otherwise noted, apply for circuit type(s) listed
in the page heading regardless of package. The availability of a circuit .function in a particular package
is denoted by an alphabetical reference above the pin-connection diagram(s). These alphabetical references
refer to mechanical outline drawings shown in this section.
Factory orders for circuits described in this catalog should include a four-part type number as explained
in the following example.

EXAMPLE
( 1. Prefix

SN

54LS01

J

4

--11

)1-______

MUST CONTAIN TWO TO FOUR LETTERS
SN

Standard Prefix

SNJ

JEDEC Publication 101. Class B

JANB

MIL-M-38510 Qualified

2. Unique Circuit Description
MUST CONTAIN FOUR TO NINE CHARACTERS
(From Individual Data Sheet)
Examples:
5410
74H10
54S112
74LS295A
74LS645-1

MUST CONTAIN ONE OR TWO LETTERS

II

D, DW, J, JD, JG, JT, N, NT, P, W (Duai-in-iine packages)t
FK or FN (Chip carriers)
(From pin-connection diagram on individual data sheet)
4. Instructions (Dash No.)
3

PEP processing, level 3

(N or NT packages only)

t These circuits in dual-in-line packages are shipped in one of the carriers shown below. Unless a specific method of shipment is specified by the customer
(with possible additional costs), circuits will be shipped in the most practical carrier. Please contact your TI sales representative for the method that will
best suit your particular needs.

Duai-in-line (D, DW, J, JD, JG, JT, N, NT, P, W)
-

A-Channel Plastic Tubing

-

Tape and Reel

-

Barnes Carrier (W oniy)

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

4-3

MECHANICAL DATA

o

plastic dual-in-line packages
Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within
a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit
performance characteristics will remain stable when operated in high-humidity conditions. Leads require
no additional cleaning or processing when used in soldered assembly.

o PACKAGE
8-PIN

f

6,20 (0.244)

5

3,81 (0.150)

4

L-~;h::;:~
5,21 (0.205)

0,50 (0.020)
0,25 (0.010)

X

450~4'60 (0.181)J

0,229 (0.0090)
0,190 (0.0075)

I~~

(

::rl.- ~ NOMJLT
4 PLACES

-

0

4 t 4

1,12 (0.044)
PIN SPACING

0,51 (0.020)

1,27 (0.050)
(See Note A)

11
S
m

Notes:

A.
B.
C.
D.

Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Leads are within 0,25 (0.010) radius of true position at maximum material dimension.
Lead tips to be PLANAR within ±0,051 (0.002) exclusive of solder.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

(")

:I:

l>

-

2

(")

l>
rC

l>
-t
l>

4-4

TEXAS •
INSTRUMENTS
POST OFFICE BOX.225012 • DALLAS. TEXAS 75265

0

MECHANICAL DATA

o

plastic dual-in-line packages
Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within
a plastic cOlT)pound. The compound will withstand soldering temperature with no deformation. and circuit
performance characteristics will remain stable when operated in high-humidity conditions. Leads require
no additional cleaning or processing when used in soldered assembly.

o

PACKAGE

14-PIN

8,74 (0.3441
8,55 (0.3371

f

I-

6,20 (0.2441

r-rr==:==!::::!:====!::::::!:::::;:8!;1t

I

5,80 (0.2281
4,00 (0.1571
3,81 (0.1501
~1~----------~41

0,50 (0.0201

- ' - - - - x 45°

1,75 (0.0691

~ 5,21

(0.205I
4,60 (0.1811

0,25 (0.0101

4~L:~'~
PIN SPACING

l

0,229 (0.00901
0,190 (0.00751

jt!24.
0,51 (0.0201

1,27 (0.0501
(See Note AI

Notes: A.
B.
C.
D.

Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Leads are within 0,25 (0.010) radius of true position at maximum material dimension.
Lead tips to be PLANAR within ±O,051 (0.002) exclusive of solder.

II

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

TEXAS . .
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

4-5

MECHANICAL DATA

o plastic

dual-in-line packages

Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within
a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit
performance characteristics will remain stable when operated in high-humidity conditions. Leads require
no additional cleaning or processing when used in soldered assembly.

D PACKAGE
16-PIN

r

"'-f-----;,-,..,- - -

l0'OO(0'394)~
9,80 (0.386)

-

-

6,20 (0.244)
, - 16
5,80 (0.228)
4,00 (0.157)

-

-

9

I

3,81 (0.150)

8

L-~;+;:::;::;::::;:;:::::;:;::;:::;:::::;;~
.
1,75 (0.069)

---1,35 (0.053)

I

0,50 (0.020) X 45°

4 PLACES

{

0.25 '0.0101

0,102 (0.004)

-J l

0,457 (0.018)
0,356 (0.014)

0,79 (0.031)
0,28 (0.011)

5,21 (0.205)
460 (0 181)~
".

".. 7° NOM

0

4-6

4°±4°

1,12 (0.044)
PIN SPACING

0,51 (0.020)

See Note a

II

~

NOMMJLT

7
4 PLACES

1,27 (0.050)

Notes: A.
B.
C.
D.

0,229 (0.0090)
0,190 (0.0075)

Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Leads are within 0,25 (0.010) radius of true position at maximum material dimension.
Lead tips to be PLANAR within ±0,051 (0.002) exclusive of solder.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MECHANICAL DATA

OW plastic dual-in-line packages
Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within
a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit
performance characteristics will remain stable when operated in high-humidity conditions. Leads require
no additional cleaning or processing when used in soldered assembly.

OW PACKAGE
20·PIN

r---:~:~:~::~~:~

r

rrm-A AA - AAAAI
10.65 (0.419)
10.15 (0.400)

20

11

7,55 (0.297)

"'~I~G)~________________________'~O~I

2,65 (0.104)

~r

70NOM

4 PLACES

'~F-:=J5hliFLFWW
O'30~
-

0,10 (0.004)
0,785(0.031)
0,585 (0.023)

, -

I

, -

I

II

0,490 (0.019)

~ ~ 0,350 (0.014)

0

\ . , 7 NOM
4 PLACES

U '
'

.

.

1,27 (0.050) TP

Notes:

A.
B.
C.
D.

Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0.15 (0.0061.
Leads are within 0.25 (0.010) radius of true position at maximum material dimension.
Lead tips to be PLANAR within ±0.051 (0.002) exclusive of solder.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

1.27 (0.050)

I I

~--J.-../

II
e:(

l-

e:(

C
...I
e:(

S:2
z

e:(

:I:
(.)

w
~

TEXAS •
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

4-7

MECHANICAL DATA
OW plastic dual-in-line packages
Each of these dual-in-line packages consists of a circuit mounted on a lead frame and encapsulated within
a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit
performance characteristics will remain stable when operated in high-humidity conditions. Leads require
no additional cleaning or processing when used in soldered assembly.

OW PACKAGE

24-PIN

15'5(0'610)~

15,3 (0.602)

-

-

-

- -

13

12

.
0.5 (0.02)

I::~:~:~~:I

x 45"

LJ::-r-

~

~
0

1 4 04

S
m

(")

~
Notes: A.
B.
C.
D.

47°NOM
PLACES

Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Leads are within 0,25 (0.010) radius of true position at maximum material dimension.
Lead tips to be PLANAR within ± 0,051 (0.002) exclusive of solder.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

:::I:

l>
2

(")

l>

rC

l>
l>

-4

4-8

\

0,320 (0.013)
0.230 (0.009)

0,785 (0.031)

II

0

.

-I./1

TEXAS
INSTRUMENTS

POST OFF)CE BOX 225012 • DALLAS. TEXAS 75265

---:-\ .J

1,27 (0.050)
~

JJ)jl

MECHANICAL DATA
FK ceramic chip carrier packages
Each of these hermetically sealed chip carrier packages has a three-layer ceramic base with a metal lid
and braze seal. The packages are intended for surface mounting on solder lands on 1.27 (O.050-inch)
centers. terminals require no additional cleaning or processing when used in soldered assembly.
FK package terminal assignments conform to JEDEC Standards 1 and 2.

FK CERAMIC CHIP CARRIER PACKAGES
(28·terminal package shown)

CERAMIC CHIP CARRIERS
JEDEC
OUTLINE
DESIGNATION"

NO.OF
TERMINALS

MS004CB

20

MS004CC

28

A

B

MIN

MAX

MIN

MAX

8,69
(0.3421
11,23
(0.442)

9,09
(0.3581
11,63
(0.458)

7,80
(0.3071
10,31
(0.406)

9,09
(0.358)
11,63
(0.4581

"All dimensions and notes for the specified JEDEC outline apply.

r- ,

0,51 (0.02. 01_1
0,25 (0.0101
~

.:

L

0,51 (0.0201
0,25 (0.0101



:2

NOTES: A. Centerline of center pin each side is within 0,10 (0.004) of package centerline as determined by dimension B.
B. Location of each pin is within 0,127 (0.005) of true position with respect to center pin on each side.
C. The lead contact points are planar within 0,10 (0.004).

(")

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

l>

rC

l>
l>

-I

4-10

TEXAS

~

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MECHANICAL DATA
J ceramic packages (including JT dual-in-line package)
Each of these hermetically sealed dual-in-line packages consists of a ceramic base, ceramic cap, and a
lead frame. Hermetic sealing is accomplished with glass. The JT packages are intended for insertion in
mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted sufficient tension
is provided to secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require
no additional cleaning or processing when used in soldered assembly.

NOTE:

For the 14-, 16-, and 20-pin packages, the letter J is used by itself since these packages are available only in the 7,62 (0.3001 row spacing. For the
24-pin packages, if no second letter or row spacing is specified, the package is assumed to have 15,24 (0.6001 row spacing.

14-PIN J CERAMIC
~'9,9410.785)

I.
FallsW,thmJEOECTO"6and

'" ~OO'M"'.~:',"",,, "'""

m

- SEATING PLANE

_""90'""

,4

I

Q Q

0000000

8

5,0~~X200)

PLACES~\4035610 0'4)
020310 008)
{4 PLACES

Q

@CV®

',7810.070) MAX ,4 PLACES

',27

10050) NOM

'OS"

@@ @®

Q Q

787103'0)

10;8~JI0290)

114-_-.+1- 7 ,11
6,2210.245)

-1

'9,'810.755)

f :::::~
I

~"Fi""''"R'''''''''Il'"''PC!""'I=V

~

3,3010'30)
MIN

25410'00)
',7810070)
4 PLACES

GLASS
SEALANT

-j I.. ~:~: :~:~~~:

,4 PLACES

PIN SPACING 2,5410 '00) T P
IS•• Not. AI

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
16-PIN J CERAMIC

Ih ~,~;,!~~~:

tt!\
10S-

900

16PlACES

""___

- SEATING PLANE - -.....- - - . - 1

~",""",""",",,~SE~LL~~T

C
111+-f+-f+-lfI-o,76 (0.030) MIN

~\..-~:~~~~~:~::
16 PLACES

j~ ~~~L~~O~~)

16 PLACES

-1~O'3.IO.Ot51

~:~~ :~:~~~: 4 PLACES
• For memories of 64 bits a~d up and a few MSI/LSI products in Series 54174 and Series 54S174S that are derived from memory circuit bars, this maximum is 7,62 (0.3001. All other dimensions apply without modification,

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

~

II
------23,62 10,930) ---~·I

.

.~".~" {~~~~~~~,J

~',~~:~~~~:
7,6210300)
6,2210245)

1,27 (0050) NOM

~

-SEATING PLANE

105'
90'
20 PLACES

II

GLASS
SEALANT

5,08(0200)

0,35610.014)

•

MAX

3,3010130).
MIN
'
'•

~

1

.-----,-Y

I

.-.1...-0,20310,008)
20 PLACES

0,30510.012) MIN
4 PLACES

11 ...>-tt--++~\l-0,7610.030) MIN
16 PLACES

I. I
~

PIN SPACING 2,5410.100) T. P.
(See NoteA)

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

24-PIN JT CERAMIC. O.300-INCH ROW SPACING

14-----32,51 (1.2BO) MAX--------9l

@@@@@@)@)®®®@@

14-_ _--t*'t._

~:~; ~~:~~~i

II
S

''''''~I",OMi:: ::::::::: I
0000®00®0@@@

1,27 (0.0501 NOM
GLASS
SEALANT

m
("')

J:

»
;2
("')

»
r-

SEATING PLANE ----r-L-----r--t-~

\ . - 0.356 (0.014)
0,203 (O.OOB)
24 PLACES

- \ I"

C

»
-f
l>

4-12

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.

~

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS, TEXAS 75265

MECHANICAL DATA

J ceramic dual-in-line packages (continued)

24-PIN J CERAMIC
1 - - - - - - ~~:~

::;~~:

i

@@@@@@@@@@@@I

0,63 (0,025) R ~
NOM

00@0®000®@@@

:~:~ :~:~~~:

I----------++_

1,91 (0.075)

1,27 (0.050) NOM
GLASS SEALANT

1,78 (0.070) MAX 24 PLACES-;-!

.~~: ~t82n

SEATINGPLANE~~~

/

~ 1~~:

L~

24 PLACES
030 (0 o12)---i
0:20 (0:008)'
24 PLACES

I+'

1.78 (0070)
0,51 (0.020),
0,51 (0.020)
0,41 (0.016)
24 PLACES

:

,

Li

1I I

j;t~

,

II,I

.

,

MI~J": i- i

0,71 (0.028)
24 PLACES

!

I

'---t--i

10

j

t

4,06 (0.160) 24 PLACES

I 3,17 (0.125)
14.;_2,5410.100) 4 PLACES
1,52 (0.060)

PIN SPACING 2,54 (0.100) T. P.
(See Note A)

Falls within JEDEC MO-015AA dimensions

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTE A: Each pin centerline is located within 0,25 (0,010) of its true longitudinal position.

«
te::(

o

..J


2

-o

>
rC

>
~

4-18

r-

-1.!1

TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

MECHANICAL DATA
N plastic dual-in-line packages (continued)
24-PIN N PLASTIC

32,8 (1,290)

MAX----~

@@@@@@@@@@@@

14'~6~550)~
2,0 (0.080) NOM

h

CD 0 00 ® CD CD ® ®@ @ @

~,25 (0.010) NOM

T
-~
\0,

1~~: 24 PLACES

-1

r

1,78 (0.070) MAX 24

JL -Ij

-SEATINGPLANE--.-0,51 (0 020) MIN

0,28 ± 0,08 - I t (0.011 ± 0.003)
24 PLACES
(See Note B)

P~ACES

1--~I --r
5,08 (0.200) MAX

JI

0,457:t 0,076
(0.018:t 0003)
24 PLACES
(See Note B)

J

_

~

0,83 (0.033) MIN
24 PLACES
~
2,42 (0.095) MAX
4 PLACES
PIN SPACING 2,54 (0.100) T. P.
(See Note A)

[3,17 (0,125) MIN
24 PLACES

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTES:

A.

Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. For solder-dipped leads, this dimension applies from the lead tip to the standoff.

II

TEXAS

-I.!}

INSTRUMENTS
POST OFFICE BOX 225012 • DALLAS. TEXAS 75265

4-19

~

N
o

'111'10 W:JIN'I1H:J31111

I

:s:

'0
28-PIN N PLASTIC

~
r+

:c

...

C;

(=j"
'0
Cl

n

Cl
CC

CD

I..

36,6 (1.440) MAX

_I

@@@@@@@@@@@@@@

en

n0
::l

r+

5"

c
m

S:
(3
~

EITHER~

INDEX

~

;; z

n -

~(f)

"'~

~;or;;i

CD000000G)0@@@@@

'~~
" c~
~!TI

~z

~~~
l;

'"m
'"

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTE A: Each pin centerline is located within 0,25 (0_010) of its true longitudinal position_

m

n

l::a

2:

l::a

I"""

C

l::a
-4

l::a

MECHANICAL DATA
N plastic packages (continued)
40·PIN N PLASTIC

I'

·1

53,1 (2.090) MAX

~1~~R~::::::::::::::::::1
o

It..

tr,

1524

+

(0.600 ±-

025

.@



fJ- J

r

I
I

I

:

r,

I

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Falls within JEDEC MO-019AA Dimensions
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
i _ _ __

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NOTES:

A.
B.
C.
D.

_

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Leads are within 0,13 (0.005) radius of true position (TP) at maximum material condition.
This dimension determines a zone within which all body and lead irregularities lie.
Index point is provided on cap for terminal identification only.
End configuration of 24-pin package is at the option of TI.

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TEXAS
INSTRUMENTS
POST OFFICE BOX 225012 •

DALLAS. TEXAS 75265

TI Sales Offices TI Distributors
ALABAMA: Huntsville (205) 837-7530
ARIZONA: Phoenix (602) 995-1007
CALIFORNIA: Irvine (714) 660-8187
Sacramento (916)929-1521,
San Diego (619)278-9601,
Santa Clara (408) 980-9000
Torrance (213) 217-7010:
Woodland Hills (818) 704-7759
COLORADO: Aurora (303) 3688000
CONNECTICUT: Wallinglord (203) 2690074
FLORIDA: Ft. Lauderdale (305) 973-8502:
Maitland (305) 660-4600, Tampa (813) 8706420
GEORGIA: Norcross (404) 662-7900
ILLINOIS: Arlington Heights (312) 640-2925
INDIANA: Ft. Wayne (219) 424-5174:
Indianapolis (3 I 7) 248-8555
IOWA: Cedar Rapids (319) 395-9550
MARYLAND: Baltimore (301) 944-8600
MASSACHUSETTS: Waltham (617) 895-9100
MICHIGAN: Farmington Hills (313) 553-1500

MISSOURI: Kansas City (816) 523-2500:
SI. Louis (314) 569-7600

NEW MEXICO: Albuquerque (505)345-2555
NEW YORK: East. Syracuse (3151463-9291
Endicott (607) 754-3900: Melville (516) 454-6600
Pittslord (716) 385-6770:
Poughkeepsie (914) 473-2900
NORTH CAROLINA: Charlotte (704) 527-0930
Raleigh (919) 876-2725
OHIO: Beachwood (216) 464-6100,
Dayton (513) 258-3877
OKLAHOMA: Tulsa (918) 250-0633
OREGON: Beaverton (503) 643·6758
PENNSYLVANIA: H Washington (215)6436450
Coraopolis (412) 771-8550
PUERTO RICO: Hato Rey (809) 753 8700
TEXAS: Austin (512) 250-7655,
Houston (713) 778-6592: Richardson (214) 6805082
San Anlonio (512)496-1779
UTAH: Murray (801) 266-8972
VIRGINIA: Fairfax (703) 849-1400
WASHINGTON: Redmond (206) 881-3080
WISCONSIN: Brooklield (4 (4) 785-7140
CANADA: Nepean, Ontario (6131 726-1970
Richmond Hill, Ontario (416)884-9181
SI. Laurent, Quebec 1514) 334-3635

TI Regional
Technology Centers
CALIFORNIA: Irvine (714) 660-8140_
Santa Clara (408) 748-2220

TI AUTHORIZED DISTRIBUTORS IN
CANADA
Arrow/CESCO Electronics, Inc.
Future Electronics
ITT Components
L.A. Varah, Ltd.

ALABAMA: Arrow (205) 882-2730:
Kierulff (205) 883-6070: Marshall (205) 881-9235
ARIZONA: Arrow (602) 968-4800:
Klerulff (602) 243-4101: Marshall (602) 968-6181:
Wyle (602) 866-2888
CALIFORNIA: Los Angeles/Orange County:
Arrow (818) 701-7500_ (714) 838-5422:
Kierulfl (213) 725-0325, (714) 731-571 I, (714) 220-6300,
Marshall (818) 999-5001, (818)442-7204,
(714) 660-0951; RV Weatherlord (714) 634-9600,
(213) 849-3451, (714)623-1261: Wyle (213) 322-8100
(818) 880-9001, (714) 863-9953: Sacramento: Arrow
(916) 925-7456; Wyle (916) 638-5282; San Diego:
Arrow 16(9) 565-4800, Kierulff (619) 278-2112,
Marshall (619) 578-9600, Wyle (619) 565-9171,
San Francisco Bay Area: Arrow (408) 745-6600:
(415)487-4600: Kierulfl (408)971-2600
Marshall (408) 732-1100, Wyle (408) 727-2500:
Santa Barbara: R V Weatherlord (805) 965-8551
COLORADO: Arrow (303) 696-1111,
Kierulff (303) 790-4444_ Wyle (303) 457-9953
CONNECTICUT: Arrow (203) 265-7741,
Diplomat (203) 797-9674: Kierulff (203)265-1115
Marshall (203) 265-3822: Milgray (203) 795-0714
FLORIDA: FI. Lauderdale: Arrow (305) 429-8200_
Diplomat (305) 974-8700: Kierulff (305) 486-4004:
Orlando: Arrow (305) 725-1480:
Mllgray (305) 647-5747: Tampa:
Arrow (813) 576-8995: Diplomat (813) 443-4514
Kierulff (813) 576-1966
GEORGIA: Arrow (404) 449-8252
Kierulff (404) 447-5252: Marshall (404) 9235750

GEORGIA: Norcross (404) 662-7945

MASSACHUSETTS: Waltham (617)890-6671
TEXAS: Richardson (214) 680-5066
CANADA: Nepean, Ontario (613) 726-1970

TOLL FREE: (800) 2323200

KANSAS: Kansas City: Marshall (913) 492-3121:
Wichita: LCOMP (316) 265-9507
MARYLAND: Arrow (301) 995-0003,
Diplomat (301) 995-1226: Kierulff (301) 636-5800,
M,lgray (301) 793-3993
MASSACHUSETTS: Arrow (617) 933-8130:
Diplomat (617) 935-6611: Kierulff (617)667-8331:
Marshall (617) 272-8200: Time (617) 935-8080_
MICHIGAN: Detroit: Arrow (313) 971-8220:
Marshall (313) 525-5850: Newark (313) 967-0600:
Grand Rapids: Arrow (616) 243-0912_
MINNESOTA: Arrow (612) 830-1800:
Kierulff (612)941-7500: Marshall (612) 559-2211,
MISSOURI: Kansas City: LCOMP (816) 221-2400:
SI. Louis: Arrow (314) 567-6888:
Kierulff (314) 739,0855
NEW HAMPSHIRE: Arrow (603) 668-696B
NEW JERSEY:
Diplomat (201)
General Radio
(609)235-1444:
(609) 234-9100:

Arrow (201) 575-5300, (609) 596-8000:
785-1830:
(609) 964-8560: Kierulff (201) 575-6750:
Marshall (201) 882-0320
Milgray (609) 983-5010

NEW MEXICO: Arrow (505) 243-4566:
Internotional Electronics (505) 345-8127
NEW YORK: Long Island: Arrow (516) 231-1000:
Diplomat (516) 454-6400: JACO (516) 273-5500:
Marshall (516) 273-2053: Milgray (516) 420-9800:
Rochester: Arrow (716) 427-0300:
Marshall (716) 235-7620:
Rochester Radio Supply (716) 454-7800:
Syracuse: Arrow (315) 652-1000:
Diplomat (315) 652-5000: Marshall (607) 798-1611
NORTH CAROLINA: Arrow (919) 876-3132,
(919) 725-8711: Kierulff (919) 872-8410
OHIO: Cincinnati: Graham (513) 772-1661:
Cleveland: Arrow (216) 248-3990:
Kierulff (216) 587-6558: Marshall (216) 248-1788
Columbus: Graham (614) 895-1590:
Dayton: Arrow (513) 435-5563: Kierulff (513) 439-0045:
Marshall (513) 236-8088,
OKLAHOMA: Kierulff (918) 252-7537
OREGON: Arrow (503) 684-1690: Kierulff
(503)641-9153: Wyle (503) 640-6000: Marshall
(503) 644-5050
PENNSYLVANIA: Arrow (412) 856-7000
(215) 928-1800: General Radio (215) 922-7037
RHODE ISLAND: Arrow (401) 431-0980
TEXAS: Austin: Arrow (512) 835-4180:
Kierulff (512)835-2090: Marshall (512) 837-1991,
Wyle (512) 834-9957, Dalfas: Arrow (214) 380-6464:
International Electronics (214) 233-9323:
Klerulff (214) 343-2400: Marshall (214) 233-5200:
Wyle (214) 235-9953:
EI Paso: International Electronics (915) 598-3406:
Houston: Arrow (713) 530-4 7 00:
Marshall (713) 789-6600:
Harrison Equipment (713) 879-2600:
Kierulff (713) 530-7030: Wyle (713) 879-9953
UTAH: Diplomat (801) 486-4134:
Kierulff (801) 973-6913: Wyle (801) 974-9953
VIRGINIA: Arrow (804) 282-0413
WASHINGTON: Arrow (206) 643-4800:
Kierulff (206) 575-4420: Wyle (206) 453-8300: Marshall
(206) 747-9100
WISCONSIN: Arrow (414) 764-6600: Kierulff
(414) 784-8160

ILLINOIS: Arlington Heights (312) 640-2909

Technical
Support Center

INDIANA: Indianapolis: Arrow (317) 243-9353:
Graham (317) 634-8202: Marshall (317) 297-0483:
FJ. Wayne: Graham (219) 423-3422
IOWA: Arrow (319) 395-7230

TI AUTHORIZED DISTRIBUTORS IN
USA
Arrow Electronics
Diplomat Electronics
General Radio Supply Company
Graham Electronics
Harrison Equipment Co.
International Electronics
JACO Electronics
Kierulff Electronics
LCOMP, Incorporated
Marshall Industries
Milgray Electronics
Newark Electronics
Rochester Radio Supply
Time Electronics
R.V. Weatherford Co.
Wyle Laboratories

MINNESOTA: Eden Prairie (612) 828-9300

NEW JERSEY: Iselin (201) 750-1050

ILLINOIS: Arrow (312) 397-3440:
Diplomat (312) 595-1000: Kierulff (312) 250-0500:
Marshall (312) 490-0155: Newark (312) 784-5100

TEXAS

INSTRUMENTS
Creating useful products
and services for you.

CANADA: Calgary: Future (403) 235-5325: Varah
(403)255-9550: Edmonton: Future (403)486-0974:
Varah (403) 437-275,,: Montreal: Arrow/CESCO
(514) 735-5511: Future (514) 694-7710: ITT
Components (514) 735-1177: Ottawa: Arrow/CESCO
(613) 226-6903: Future (613) 820-8313: (TT
Components (613) 226-7406: Varah (613)726-8884:
Ouebec City: ArrowlCESCO (418) 687-4231; Toronto:
CESCO (416)661-0220,
Future (416)638-4771: ITT Components
(416) 735-1144: Varah (416) 842-8484:
Vancouver: Future (604) 438-5545: Varah
BL
(604) 873-3211: Winnipeg: Varah (204) 633-6190

TI Worldwide
Sales Offices
ALABAMA: Hunlsville: 500 Wynn Drive. Suile 514.
Huntsville, AL 35805. (205) 837·7530
ARIZONA: Phoenix: 8825 N. 23rd Ave., Phoenix,
AZ 85021, (602) 995·1007
CALIFORNIA: Irvine: 17891 Cartwright Rd, Irvine.
CA 92714, (714) 660·8187; Sacramento: 1900 Point
Wesl Way, Suile 171, Sacramento, CA 95815.
(916) 929·1521; San Diego: 4333 View Ridge Ave ..
Suite B., San Diego, CA 92123. (619) 278·9601;
Santa Clara: 5353 Betsy Ross Dr .. Sanla Clara, CA
95054, (408) 980·9000; Torrance: 690 Knox St ..
Torrance, CA 90502, (213) 217·7010; Woodland Hills:
21220 Erwin St., Woodland Hills, CA 91367,
(818) 704·7759.
COLORADO: Aurora: 1400 S. Potomac Ave.,
Suile 101, Aurora, CO 80012, (303) 368·8000
CONNECTICUT: Wallinglord: 9 Barnes Induslnal
Park Rd., Barnes Industrial Park, Wallingford,
CT 06492, (203) 269·0074
FLORIDA: Fl. Lauderdale: 2765 N W. 62nd SI ..
FI. Lauderdale, FL 33309, (305) 973·8502; Maitland:
2601 Maitland Center Parkway, Maitland, FL 32751,
(305) 660·4600; Tampa: 5010 W. Kennedy Blvd ..
Suite 101, Tampa, FL 33609, (813) 870·6420
GEORGIA: Norcross: 5515 Spalding Dnve. Norcross,
GA 30092, (404) 662·7900
ILLINOIS: Arlington Heights: 515 W. Algonquin,
Arlington Heighls, IL 60005. (312) 640·2925
INDIANA: FI. Wayne: 2020 Inwood Dr., FI. Wayne.
IN 46815, (219) 4245174; Indianapolis: 2346 S
Lynhursl, Sui Ie J·400, Indianapolis, IN 46241,
(317) 248'8555
IOWA: Cedar Rapids: 373 Collins Rd. NE, Suile 200,
Cedar Rapids. IA 52402, (319) 395·9550
MARYLAND: Baltimore: 1 Rulherford PI..
7133 Rulherford Rd., Ballimore. MD 21207,
(301) 944·8600
MASSACHUSETTS: Waltham: 504 Totten Pond Rd ..
Waltham. MA 02154, (617) 895·9100

~~~~~~fo~: ~fl;~I~lt~80~~II(~?N~~3~56g

Mile Rd,

MINNESOTA: Eden Prairie: 11000 W. 781h SI.,
Eden Prairie. MN 55344 (612) 828·9300
MISSOURI: Kansas City: 8080 Ward Pkwy .. Kansas
Cily. MO 64114, (816) 523·2500; SI. Louis:
11861 Westline Induslrial Drive, SI Louis,
MO 63141, (314) 569·7600.
NEW JERSEY: Iselin: 485E U.S. Roule 1 Soulh
Parkway Towers, Iselin, NJ 08830 (201) 750·1050
NEW MEXICO: Albuquerque: 2820·0 Broadbenl P,wy
NE, Albuquerque, NM 87107, (505) 345·2555
NEW YORK: Easl Syracuse: 6365 Collamer Dr .. Easl
Syracuse, NY 13057, (315) 463·9291; Endicott: 112
Nanllcoke Ave., P.O. Box 618, Endicott,
NY 13760, (607) 754·3900; Melville: 1 Hunllngton
Quadrangle, Suite 3Cl0. P.O. Box 2936, Melville,
NY 11747, (516) 454·6600; Pitts lord: 2851 Clover SI.,
Pittsford, NY 14534, (716) 385·6770; Poughkeepsie:
385 South Rd., Poughkeepsie, NY 12601,
(914) 473·2900

PENNSYLVANIA: Ft. Washington: 260 New York Dr ..
Ft. Washlnglon. PA 19034. (2151 6436450
Coraopolis: 420 Rouser Rd .. 3 Airport Office Park.
Coraopolis. PA 15108, (412) 771·8550
PUERTO RICO: Hato Rey: Melcantil Plaza Bldg.
SUite 505. Hato Rey. PR 00919, (809) 7538700
TEXAS: Austin: 12501 Research Blvd,
P.O. Box 2909. Auslir. TX 78723. (512) 250·7655
Richardson: 1001 E. Campbell Rd,
Richardson. TX 75080
(214) 680·5082; Houston: 9100 Southwest Frwy ..
Suite 237. Houston. TX 77036, (713) 779·6592:
San Antonio: 1000 Central Parkway South
San Antonia, TX 78232. (512) 496·1779
UTAH: Murray: 5201 South Green SE. Suile 200.
Murray. UT 84107. (801) 266·8972
VIRGINIA: Fairlax: 3001 Prospenty. Fairfax. VA
22031, (703) 849·1400
WASHINGTON: Redmond: 5010 1481h NE. Bldg B.
Suite t07, Redmond. WA 98052, (206) 881·3080.
WISCONSIN: Brooklield: 450 N. Sunny Slope.
Suite 150, Brookfield. WI 53005, (414) 785·7140
CANADA: Nepean: 301 Moodie Drive, Mallorn
Cenler. Nepe.n. Ontario, Canada. K2H9C4.
(613) 726·1970. Richmond Hill: 280 Cenlre St. E,
Richmond Hill L4C1Bl, Ontario, Canada
(416) 884·9181; St. Laurent: Ville 51. Laurenl Quebec.
9460 Trans Caoada Hwy . SI. Laurent, Quebec.
Canada H4S1R7. (514) 334·3635

ARGENTINA: Texas Instruments Argentina
S.A.I.C.F.: Esmeralda 130, 15th Floor, 1035 Buenos
Aires, Argentina, 1 + 394·3008.
AUSTRALIA (& NEW ZEALAND): Texas Instruments
Auslralia Ltd.: 6·10 Talavera Rd., North Ryde
(Sydney). New Soulh Wales, Australia 2113,
2 + 887·1122; 51h Floor, 418 51. Kilda Road,
Melbourne, Victoria. Australia 3004, 3 + 267·4677;
171 Philip Highway, Elizabeth. South Australia 5112,
8 + 255·2066
AUSTRIA: Texas Instruments Ges.m.b.H.:
Induslriestrabe B/16, A·2345 BrunnlGebirge,
2236846210
BELGIUM: Texas Instruments N.V. Belgium S.A·
Mercure Centre, Rakelslraat 100, Rue de la Fusee,
1130 Brussels, Belgium, 2/720.80.00.
BRAZIL; Texas Instruments Etectronlcos do BraSil
Ltda.: Rua Paes Leme, 524·7 Andar Pinheiros, 05424
Sao Paulo, Brazil, 0815·6166.

DENMARK: Texas Instruments A/S. Mairelundvej
46E. DK·2730 Herlev, Denmark. 2 . 91 74 00
FINLAND: Texas Instruments Finland OY:
Teollisuuskalu 19000511 Helsinki 51, Finland, (90)
701·3133
FRANCE: Texas Instrumenls France: Headquarters
and PrOd. Plant, BP 05, 06270 Vilieneuve·Loubet,
(93) 20·01·01; Paris Office, BP 67 8·10 Avenue
Morane·Saulnier, 78141 Velizy·Villacoublay,
(3) 946·97·12; Lyon Sales Olflce, L'Oree D'Ecully,
Batiment B, Chemin de la Foresliere, 69130 Ecully,
(7) 833·04·40; Strasbourg Sales Ollice. Le Sebastopol
3. Quai Kleber. 67055 Strasbourg Cedex,
(88) 22·12·66; Rennes, 23·25 Rue du Puits Mauger,
35100 Rennes, (99) 31·54·86; Toulouse Sales Office,

~{1 ~6r;r;,°~(0~;e, ~~f)~i~ l~u 1~: g~~~sn~~;ed~all~~6~;r~~:
Noilly Paradis-146 Rue ParadiS, 13006 Marseille,
(91) 37·25·30

NORTH CAROLINA: Charlotte: 8 Woodlawn Green,
Woodlawn Rd., Charlotte, NC 28210, (704) 527·0930;
Raleigh: 2809 H ighwoods Blvd .. Suite 100, Raleigh,
NC 27625. (919) 876·2725
OHIO: Beachwood: 23408 Commerce Parl< Rd ..
Beachwood. OH 44122, (216) 464·6100: Dayton:
Kingsley Bldg., 4124 Linden Ave., Daylon. OH 45432,
(513) 258·3877
OKLAHOMA: Tulsa: 7615 East 63rd Place.
3 Memorial Place, Tulsa, OK 74133, (918) 250·0633
OREGON: Beaverton: 6700 SW 105th SI.. Suile 110.
Beaverton. OR 97005. (503) 643·6758

GERMANY (Fed. Republic 01 Germany): Texas
Inslruments Deulschland GmbH: Haggertystrasse 1,
0·8050 Frelslng. 8161 + 80·4591: Kurluerslendamm
1951196, 0·1000 Berlin 15,30 + 682·7365; III, Hagen
43/Kibbelslrasse, .19. 0·4300 Essen, 201·24250;
Frankfurter Allee 6·8, 0·6236 Eschborm 1,
06196+ 8070: Hamburgerstrasse 11. 0·2000 Hamburg
76. 040 + 220·1154. KirchllOrsterslrasse 2, 0·3000
Hannover 51, 511 +648021; Maybachslrabe 11.
0·7302 Ostf,ldern 2·Nelingen, 711 + 547001;
Mixikoring 19, 0·2000 Hamburg 60, 40 + 637 + 0061:
Postfach t309, Roonslrasse 16,0·5400 Koblenz,
261 + 35044
HONG KONG (+ PEOPLES REPUBLIC OF CHINA):
Texas Instrumenls Asia Ltd . 8th Floor, World
Shipping Clr . Harbour Cily, 7 Canton Rd, Kowloon.
Hong Kong, 3 j 722·1223
IRELAND: Texas Instrumenls (Ireland) Limiled
Brewery Rd , 5tlllorgan, County Dublin, Eire.
1 831311
ITALY: Texas Instruments Semicondutlori Iialia Spa' .
Viale Delle Scienze, 1,02015 Ciltad'Jcale (Rieti).
Italy, 746694.1; Via Salaria KM 24 (Palazzo Cosma),
Monterotondo Scala IRome), Italy. 6 t 9003241; Viale
Europa, 38·44, 20093 Cologno Monzese (Milano),
22532541; Corso Svizzera. 185, 10100 Torino, Italy.
11 774545; Via J. Barozzi 6. 40100 Bologna, Italy, 51
355851
JAPAN: Texas Instruments Asia Ltd.: 4F Aoyama
FUJi Bldg., 6·12, Kita Aoyama 3·Chome, Minato·ku,
Tokyo, Japan 107, 3-498·2111; Osaka Branch, 5F,
Nissho Iwai Bldq , 30 Imabashi 3· Chome.
Higashi·ku, Osaka. Japan 541,06·204·1881; Nagoya
BranCh, 7F Daini Toyota West Bldg., to·27, Meieki
4·Chome, Nakamura·ku Nagoya, Japan
450, 52·583·8691
KOREA: Texas Instrumenls Supply Co.: 3rd Floor,
Sam on Bldg, Yuksam·Dong, Gangnam·ku,
135 Seoul, Korea, 2 + 462·8001
MEXICO: Texas Inslruments de Mexico SA: Mexico
City, AV ReforlTl2l No 450 F.. 06COO, 5 + 5t 4·3003

o

10th Floor, Mexico,

MIDDLE EAST: Texas Instluments' No. 13. 1st Floor
Mannai Bldg, O'plomallc Area. P.O. Box 26335.
Manama Bahraie. Arabian Gulf, 973 + 274681
NETHERLANDS: Texas Inslruments Holland B.V ..
P a Box 12995, IBullewijkl 1100 CB Amslerdam,
Zuid·Oosl, Holland 20 + 5602911
NORWAY: Texas Inslruments Norway A/S: PB106,
Relstad 131, Oslo 1, Norway, (2) 155090
PHILIPPINES: Texas Instruments Asia Ltd: 14th
Floor, Ba· Lepanlo Bldg., 8747 Paseo de Roxas,
Makali, Metro Manila, Philippines, 2.8188987
PORTUGAL: T8>as Instluments Equipamenlo
Electronico (Portugal). Lda.: Rua Eng. Frederico
Ulrich, 2650 MOIOira Da Maia. 4470 Maia, Porlugal,
2·948'1003
SINGAPORE (+ INDIA, INDONESIA, MALAYSIA,
THAILAND): Texas Inslruments Asia Ltd.: 12 Lorong
Bakar Balu, Unit Ot·02, Kolam Ayer Industrial Eslate,
Republic of Singapore. 747·2255
SPAIN: Texas Instruments Espana. SA: CIJose
Lazaro Galdiano No: 6. Madrid 16. 11458.14.58
SWEDEN: Texas Instrumenls International Trade
Corporation (Sverigef,lialen): Box 39103, 10054
Stockholm, Sweden, 8·235480
SWITZERLAND: Texas Inslruments, Inc., Reidstrasse
6. CH·8953 Dielikon (Zuerich) Switzerland,
1·7402220
TAIWAN: Texas Instrumenls Supply Co.: Room 903,
205 Tun Hwan Rd. 71 Sung·Kiang Road, Taipei.
Taiwan. RepublIC of China. 2 j 521·9321
UNITED KINGDOM: Texas Instrumenls Limited
Manton Lane. Bedford. MK41 7PA. England. 0234
67466: SI. James House. Wellinglon Road North
Stockport. SK4 2RT. England. 61 + 442·7162
BL

TEXAS

INSTRUMENTS
Creating useful products
and services fiJr you

~

TEXAS

INSTRUMENTS
Printed in U.S.A.

Creating useful products
and sen;ices for) ou.

SDLDOO"
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