1988_Motorola_Linear_and_Interface_Integrated_Circuits 1988 Motorola Linear And Interface Integrated Circuits
User Manual: 1988_Motorola_Linear_and_Interface_Integrated_Circuits
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Index/Cross Reference
Amplifiers
and Comparators
Power Circuits
Power/Motor
Control Circuits
Voltage References
Data Conversion
Interface Circuits
Communication Circuits
Consumer
Electronic Circuits
Automotive
Electronic Circuits
Other Linear Circuits
Surface Mount
Technology
Packaging Information
Quality and
Reliability Assurance
Applications Literature
II
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MOTOROLA
LINEAR AND INTERFACE
INTEGRATED CIRCUITS
This publication presents technical information for the broad line of Linear and Interface Integrated Circuit products. Complete device specifications are provided in the form of Data Sheets
which are categorized by product type into ten chapters for easy reference. Selector Guides by
product family are provided in the beginning of each Chapter to enable quick comparisons of
performance characteristics. A Cross Reference chapter lists Motorola direct replacement and
functional equivalent part numbers for other industry products.
A chapter is provided to illustrate Package Outline and mounting hardware drawings, and
includes information on Surface Mount Devices (SMD), and Industry Package Cross Reference
Guide.
Additionally, chapters are provided with information on Quality program concepts, highreliability processing, and abstracts of available Technical Literature.
The information in this book has been carefully checked and is believed to be accurate; however,
no responsibility is assumed for inaccuracies.
Motorola reserves the right to make changes without further notice to any products herein to
improve reliability, function or design. Motorola does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Motorola and
are registered trademarks of
Motorola, Inc. Motorola, Inc. is an Equal Employment Opportunity/Affirmative Action Employer.
Motorola, Inc. general policy does not recommend the use of its components in life support
applications wherein a failure or malfunction of the component may directly threaten life or injury.
Per Motorola Terms and Conditions of Sale, the user of Motorola components in life support
applications assumes all risks of such use and indemnifies Motorola against all damages.
®
Printed in U.S.A.
Series F
©MOTOROLA INC., 1988
Previous Edition ©1985
"All Rights Reserved"
C-QUAM®, Designer's, MDTl, MECl, MECl 10,000, MONOMAX, MOSAIC, MRTl,
MTTl, SENSEFET and Switchmode are trademarks of Motorola Inc,
ii
Index/Cross Reference
In Brief ...
In the Cross Reference Section of this chapter, a
complete interchangeability list linking over 3000
devices is offered by most major Linear Integrated Circuits manufacturers to the nearest equivalent Motorola
device. The "Motorola Direct Replacement" column
lists devices with identical pin connections and package
and the same or better electrical characteristics and
temperature range. The "Motorola Similar Replacement" column provides a device which performs the
same function but with possible differences in package
configurations, pin connections, temperature range or
electrical specifications.
..
Alphanumeric Index
Device
Number
AM26LS31
AM26LS32
CA3054
CA3059
CA3079
DAC-08
LF347
LF351
LF353
LF355,B
LF356,B
LF357,B
LF411C
LF412C
LM11,C,CL
LM101A
LM108,A
LM109
LM111
LM117
LM117L
LM123,A
LM124
LM137
LM139,A
LM140,A
LM148
LM150
LM158
LM193,A
LM201A
LM208,A
Function
Device
Number
Page
Quad EIA-422 Line Driver with
Three-State Output
Quad EIA-422/3 Line Receiver
with Three-State Outputs
Dual Differential Amplifier
Zero Voltage Switch
Zero Voltage Switch
High-Speed 8-Bit Multiplying
D-to-A Converter
Family of BIFET Operational
Amplifiers
Family of BIFET Operational
Amplifiers
Family of BIFET Operational
Amplifiers
Monolithic JFET Operational
Amplifier
Monolithic JFET Operational
Amplifier
Monolithic JFET Operational
Amplifier
Low Offset, Low Drift JFET
Input Operational Amplifier
Low Offset, Low Drift JFET
Input Operational Amplifier
Precision Operational Amplifiers
General Purpose Adjustable
Operational Amplifier
Precision Operational Amplifiers
Positive Voltage Regulator
High Performance Voltage
Comparator
3-Terminal Adjustable Positive
Voltage Regulator
Low-Current 3-Terminal
Adjustable Positive Voltage
Regulator
3-Ampere, 5 Volt Positive
Voltage Regulator
Quad Low-Power Operational
Amplifier
3-Terminal Adjustable Negative
Voltage Regulator
Quad Single-Supply
Comparators
Three-Terminal Positive Fixed
Voltage Regulators
Quad MC1741 Operational
Amplifier
3-Terminal Adjustable Positive
Voltage Regulator
Dual Low-Power Operational
Amplifier
Dual Comparators
General Purpose Adjustable
Operational Amplifier
Precision Operational Amplifiers
LM209
LM211
7-10
7-13
9-7
4-8
4-8
LM217
LM217L
6-5
LM223,A
2-14
LM224
2-14
LM237
2-14
LM239,A
2-16
LM248
2-16
LM250
2-16
LM258
2-26
LM285
2-26
2-29
LM293,A
LM301A
2-36
2-40
3-15
LM307
LM308,A
LM309
LM311
2-45
3-20
LM317
3-28
LM317L
3-36
LM317M
2-51
3-42
LM323,A
2-57
LM324,A
3-49
LM337
2-61
LM337M
3-65
LM339,A
2-67
2-73
LM340,A
2-36
2-40
LM348
Function
Positive Voltage Regulator
High Performance Voltage
Comparator
3-Terminal Adjustable Positive
Voltage Regulator
Low-Current 3-Terminal
Adjustable Positive Voltage
Regulator
3-Ampere, 5 Volt Positive
Voltage Regulator
Quad Low-Power Operational
Amplifiers
3-Terminal Adjustable Negative
Voltage Regulator
Quad Single-Supply
Comparators
Quad MC1741 Operational
Amplifier
3-Terminal Adjustable Positive
Voltage Regulator
Dual Low-Power Operational
Amplifier
Micropower Voltage Reference
Diodes
Dual Comparators
General Purpose Adjustable
Operational Amplifier
Internally Compensated
Monolithic Operational
Amplifier
Precision Operational Amplifiers
Positive Voltage Regulator
High Performance Voltage
Comparator
3-Terminal Adjustable Positive
Voltage Regulator
Low-Current 3-Terminal
Adjustable Positive Voltage
Regulator
Medium-Current 3-Terminal
Adjustable Positive Voltage
Regulator
3-Ampere, 5 Volt Positive
Voltage Regulator
Quad Low-Power Operational
Amplifier
3-Terminal Adjustable Negative
Voltage Regulator
Medium-Current 3-Terminal
Adjustable Negative Voltage
Regulator
Quad Single-Supply
Comparators
Three-Terminal Positive Fixed
Voltage Regulators
Quad MC1741 Operational
Amplifier
MOTOROLA LINEAR/INTERFACE DEVICES
1-2
Page
3-15
2-45
3-20
3-28
3-36
2-51
3-42
2-57
2-61
3-65
2-67
5-4
2-73
2-36
2-78
2-40
3-15
2-45
3-20
3-28
3-73
3-36
2-51
3-4"-
3-81
2-57
3-49
2-61
ALPHANUMERIC INDEX Device
Number
LM350
LM358
LM385
LM393,A
LM833
LM2900
LM2901
LM2902
LM2903
LM2904
LM2931
LM3900
MC8T26A
MC8T28
MC8T95
MC8T96
MC8T97
MC8T98
MC26S10
MC75S110
MC1330
AlP
MC1330
A2P
MC1350
MC1374
MC1377
MC1378
MC1391 P
MC1403,A
MC1404,A
MC1408
MC1411
MC1412
MC1413
MC1414
MC1416
MC1436,C
MC1437
MC1439
CONTINUED
Function
Device
Number
Page
3-Terminal Adjustable Positive
Voltage Regulator
Dual Low-Power Operational
Amplifier
Micropower Voltage Reference
Diodes
Dual Comparators
Dual, Low Noise, Audio
Operational Amplifier
Quad Single-Supply
Operational Amplifier
Quad Single-Supply
Comparators
Quad Low-Power Operational
Amplifier
Dual Comparators
Dual Low-Power Operational
Amplifier
Low Dropout Voltage
Regulators
Quad Single-Supply
Operational Amplifier
Quad Three-State Bus
Transceivel'
Noninverting Bus Transceiver
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Quad Open-Collector Bus
Transceiver
Dual Line Driver
Low-Level Video Detector
2-67
MC1445
MC1454G
MC1455
MC1456,C
5-4
2-73
MC1458,C
MC1458S
2-82
MC1466L
MC1468
3-65
2-189
MC1472
2-57
MC1488
MC1489,A
MC1490P
MC1494L
MC1495L
MC1496
2-51
2-73
2-67
3-88
MC1503,A
2-189
MC1504
7-16
7-21
7-26
7-26
7-26
7-26
MC1508
MC1514
MC1536
7-48
7-176
MC1537
MC1539
9-9
MC1545
MC1554G
MC1556
Low-Level Video Detector
IF Amplifier
TV Modulator Circuit
Color Television RGB to PAU
NTSC Encoder
Complete Color TV Video
Overlay Synchronizer
TV Horizontal Processor
Precision Low-Voltage
Reference
Precision Low-Drift Voltage
Reference
8-Bit Multiplying Digital-toAnalog Converter
Peripheral Driver Array
Peripheral Driver Array
Peripheral Driver Array
Dual Differential Voltage
Comparator
Peripheral Driver Array
High-Voltage Operational
Amplifier
Dual Operational Amplifier
High-Slew-Rate Operational
Amplifier
9-9
9-15
9-19
MC1558
MC1558S
9-27
MC1568
MC1590G
MC1594L
MC1595L
MC1596
9-31
9-35
5-8
5-12
MC1709,
A,C
MC1723,C
6-15
7-30
7-30
7-30
MC1733,C
MC1741,C
2-88
7-30
MC1741S,
SC
MC1747,C
2-92
2-96
MC1748,C
Function
Wideband Amplifier
1-Watt Power Amplifier
Timing Circuit
High-Performance Operational
Amplifier
Dual Operational Amplifier
High-Slew-Rate Dual
Operational Amplifier
Voltage and Current Regulator
Dual ± 15-Volt Tracking
Regulator
Dual Peripheral Positive NAND
Driver
Quad MDTL Line Driver
Quad MDTL Line Receiver
Wideband Amplifier with AGC
Four-Quadrant Multiplier
Four-Quadrant Multiplier
Balanced ModulatorDemodulator
Precision Low-Voltage
Reference
Precision Low-Drift Voltage
Reference
8-Bit Multiplying Digital-toAnalog Converter
Dual Differential Voltage
Comparator
High-Voltage Operational
Amplifiers
Dual Operational Amplifier
High-Slew-Rate Operational
Amplifier
Wideband Amplifier
1-Watt Power Amplifier
High-Performance Operational
Amplifier
Dual Operational Amplifier
High-Slew-Rate Dual
Operational Amplifier
Dual ± 15-Volt Regulator
Wideband Amplifier with AGC
Four-Quadrant Multiplier
Four-Quadrant Multiplier
Balanced ModulatorDemodulator
General-Purpose Operational
Amplifier
Adjustable Positive or Negative
Voltage Regulator
Differential Video Amplifier
General-Purpose Operational
Amplifier
High-Slew-Rate Operational
Amplifier
Dual MC1741 Operational
Amplifier
General-Purpose Operational
Amplifier
2-100
MOTOROLA LINEAR/INTERFACE DEVICES
'-3
Page
2-108
2-114
11-4
2-118
2-124
2-129
3-95
3-105
7-34
7-37
7-43
2-135
11-11
11-25
8-13
5-8
5-12
6-15
2-88
2-92
2-96
2-100
2-108
2-114
2-118
2-124
2-129
3-105
2-141
11-11
11-25
8-13
2-149
3-111
2-153
2-161
2-166
2-172
2-176
..
ALPHANUMERIC INDEX Device
Number
MC1776,C
MC26S10
MC2831A
MC2833
MC3301
MC3302
MC3303
MC3325
MC3334P
MC3346
MC3356
MC3357
MC3358
MC3359
MC3361
MC3362
MC3363
MC3367
MC3373
MC3397T
MC3399T
MC3401
MC3403
MC3405
MC3417
MC3418
MC3419-1L
MC3419A1L
MC3419C1L
MC3423
MC3425
MC3430
MC3431
MC3432
MC3433
MC3437
MC3440A
CONTINUED
Function
Device
Number
Page
Programmable Operational
Amplifier
Quad Open Collector Bus
Transceiver
Low Power FM Transmitter
System
Low Power FM Transmitter
System
Quad Operational Amplifier
Quad Single-Supply
Comparators
Quad Differential-Input
Operational Amplifier
Automotive Voltage Regulator
High Energy Ignition Circuit
General-Purpose Transistor
Array
Wide band FSK Receiver
Low-Power FM IF
Dual Low-Power Operational
Amplifier
Low-Power Narrow-Band FM IF
Low-VOltage Narrow-Band FM
IF
Low Power Dual Conversion
FM Receiver
Low Power Dual Conversion
FM Receiver
Low Voltage Single Conversion
FM Receiver
Remote Control AmplifierDetector
Transient Suppressor
Automotive High Side Driver
Switch
Quad Operational Amplifier
Quad Differential-Input
Operational Amplifier
Dual Operational Amplifier plus
Dual Voltage Comparator
Continuously-Variable-Slope
Delta Modulator/Demodulator
Continuously-Variable-Slope
Delta Modulator/Demodulator
Telephone Line-Feed Circuit
Telephone Line-Feed Circuit
Telephone Line-Feed Circuit
MC3441A
MC3446A
MC3447
2-180
7-48
MC3448A
8-23
MC3450
MC3452
MC3453
MC3456
MC3458
8-26
2-189
2-57
MC3467
MC3469P
MC3470P,
AP
MC3471P
2-199
10-5
10-9
9-40
8-29
8-35
MC3476
MC3479P
MC3480
MC3481
MC3484S2
MC3484S4
MC3485
MC3486
2-221
8-39
8-45
8-47
8-52
MC3487
8-59
MC3488A
MC3503
9-43
10-13
MC3505
10-16
2-189
MC3517
2-199
MC3518
2-205
MC3523
MC3556
MC3558
*
MC4558,
AC,C
MC4741,C
*
*
*
MC6108
*
Overvoltage Sensing Circuit
Power Supply Supervisory/
Over-Under-Voltage
Protection Circuit
High-Speed Quad Comparator
High-Speed Quad Comparator
High-Speed Quad Comparator
High-Speed Quad Comparator
Hex Unified Bus Receiver
Quad Interface Bus Transceiver
3-117
MC6875,A
MC6880A
3-124
MC6885
MC6886
MC6887
MC6888
MC6889
MC7800
Series
2-213
2-213
2-213
2-213
7-51
7-54
Function
Quad Interface Bus Transceiver
Quad Interface Bus Transceiver
Bidirectional Instrumentation
Bus Transceiver
Quad Three-State Bus
Transceiver
Quad Line Receiver
Quad Line Receiver
Quad Line Driver
Dual Timing Circuit
Dual Low-Power Operational
Amplifier
Triple Preamplifier
Floppy Disk Write Controller
Floppy Disk Read Amplifier
System
Floppy Disk Write Controller/
Head Driver
Programmable Operational
Amplifier
Stepper Motor Driver
Memory Controller Circuit
Quad Single-Ended Line Driver
Integrated Solenoid Driver
Integrated Solenoid Driver
Quad Single-Ended Line Driver
Quad EIA-422/423 Line
Receiver
Quad EIA-422 Line Driver with
Three-State Outputs
Dual EIA-423/232C Driver
Quad Differential-Input
Operational Amplifier
Dual Operational Amplifier plus
Dual Voltage Comparator
Continuously-Variable-Slope
Delta Modulator/Demodulator
Continuously-Variable-Slope
Delta Modulator/Demodulator
Overvoltage SenSing Circuit
Dual Timing Circuit
Dual Low-Power Operational
Amplifier
Dual High-Frequency
Operational Amplifier
Quad MC1741 Operational
Amplifier
8-Bit MPU Bus-Compatible
High Speed A-to-D Converter
M6800 Clock Generator/Driver
Quad Three-State Bus
Transceiver
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Hex Three-State Buffer/Inverter
Noninverting Bus Transceiver
3-Terminal Positive Voltage
Regulators
• See Telecommunication Device Data (DL 136).
MOTOROLA LINEAR/INTERFACE DEVICES
1-4
Page
7-54
7-58
7-61
7-67
7-72
7-72
7-79
11-40
2-221
7-83
7-88
7-98
7-112
2-227
4-13
7-123
7-137
10-19
10-19
7-137
7-142
7-145
7-149
2-199
2-205
*
*
3-117
11-40
2-221
2-232
2-236
6-27
7-153
7-16
7-26
7-26
7-26
7-26
7-21
3-132
ALPHANUMERIC INDEX Device
Number
MC78LOOC,
AC Series
MC78MOO
BC Series
MC78TOO
Series
MC7900C
Series
MC7900C,
ACSeries
MC79MOO
Series
MC10318L,
L9,CL6,
CL7
MC10319
CONTINUED
Function
Device
Number
Page
Positive Voltage Regulators
MC33072
3-145
Positive Voltage Regulator
Three-Ampere Positive Voltage
Regulators
Three-Terminal Negative Fixed
Voltage Regulators
Three-Terminal Negative Fixed
Voltage Regulators
Three-Terminal Negative Fixed
Voltage Regulators
High-Speed 8-Bit D/A
Converter
High Speed 8-Bit Analog-toDigital Flash Converter
MC10320
Triple 4-Bit Color Palette Video
DAC
MC10320-1
Triple 4-Bit Color Palette Video
DAC
MC10321
High Speed 7-Bit A-to-D Flash
Converter
MC13001XP Monomax Black-and-White TV
Subsystem
MC13002XP Monomax Black-and-White TV
Subsystem
MC13010P
TV Parallel Sound IF and AFT
MC13014P
Companion AudioNertical
Subsystem
MC13020P
C-QUAM® AM Stereo Decoder
Motorola C-QUAM® AM Stereo
MC13021
Tuning Stabilizer
MC13022
Advanced Medium Voltage AM
Stereo Decoder
MC13023
AM Stereo Front End and
Tuner Stabilizer
MC13024
Low Voltage Motorola
C-QUAM® AM Stereo
Receiver
MC13041
AM Receiver Subsystem
MC13055
Wideband FSK Receiver
MC13060
Mini-Watt Audio Output
MC33030
DC Servo Motor Controller/
Driver
MC33034
DC Brushless Motor Controller
MC33039
Closed Loop Brushless Motor
Adapter
MC33060A Switch mode Pulse Width
Modulation Control Circuits
MC33063
DC to DC Converter Control
Circuits
MC33063A DC to DC Converter Control
Circuits
MC33064
Undervoltage Sensing Circuit
MC33065
High Performance Dual
Channel Current Mode
Controller
MC33071
High Performance Single
Supply Operational Amplifiers
3-151
MC33074
3-159
I MC33078
MC33079
3-168
MC33129
3-177
3-182
MC33160
6-45
MC33171
6-62
MC33172
9-47
MC33174
9-47
MC33181,
2,4
MC33282
MC33284
MC34001
6-80
9-64
MC34002
9-64
9-73
MC34004
9-78
9-84
MC34010
MC34011A
MC34012
Series
MC34013A
9-89
9-91
MC34014
9-95
MC34017
MC34018
9-101
9-104
8-65
9-110
MC34050
MC34051
MC34060
4-21
4-34
MC34060A
4-54
MC34061,A
3-197
MC34062
3-227
MC34063
3-233
3-242
MC34063A
MC34064
MC34065
3-246
Function
Dual High Performance Single
Supply Operational Amplifiers
Quad High Performance Single
Supply Operational Amplifier
Low Noise Operational
Amplifier
Low Noise Operational
Amplifier
High Performance Current
Mode Controller
Microprocessor Voltage
Regulator and Supervisory
Circuit
Low Power, Single Supply
Operational Amplifiers
Low Power, Single Supply
Operational Amplifiers
Low Power, Single Supply
Operational Amplifiers
Low Power JFET Input
Operational Amplifiers
JFET Operational Amplifiers
JFET Operational Amplifiers
JFET-Input Operational
Amplifiers
JFET-Input Operational
Amplifiers
JFET-Input Operational
Amplifiers
Electronic Telephone Circuit
Electronic Telephone Circuit
Telephone Tone Ringer
Speech Network and Tone
Dialer
Telephone Speech Network
with Dialer Interface
Telephone Tone Ringer
Voice Switched Speaker Phone
Circuit
Dual EIA-422/423 Transceiver
Dual EIA-422/423 Transceiver
Switch mode Pulse Width
Modulation Control Circuits
Switchmode Pulse Width
Modulation Control Circuits
Three-Terminal Programmable
Overvoltage Sensing Circuit
Pin-Programmable Overvoltage
Sensing Circuit
DC to DC Converter. Control
Circuits
DC to DC Converter Control
Circuits
Undervoltage Sensing Circuit
High Performance Dual
Channel Current Mode
Controller
2-267
• See Telecommunication Device Data (DL 136).
MOTOROLA LINEAR/INTERFACE DEVICES
1-5
Page
2-267
2-267
2-241
2-241
3-258
3-271
2-250
2-250
2-250
2-294
2-257
2-257
2-260
2-260
2-260
7-164
7-164
3-185
3-197
3-209
3-216
3-227
3-233
3-242
3-246
ALPHANUMERIC INDEX Device
Number
MC34071
MC34072
MC34074
MC34080
MC34081
MC34082
MC34083
MC34084
MC34085
MC34115
MC34119
MC34120
MC34129
MC34160
MC34181,
2,4
MC35001
MC35002
MC35004
MC35060
MC35050A
MC35062
MC35063
MC35063A
MC35071
MC35072
MC35074
CONTINUED
Function
Device
Number
Page
High Performance Single
Supply Operational Amplifiers
Dual High Performance Single
Supply Operational Amplifiers
Quad High Performance Single
Supply Operational Amplifier
High Speed Decompensated
(AvcL ",2) JFET Input
Operational Amplifier
High Speed JFET Input
Operational Amplifier
Dual High Speed JFET Input
Operational Amplifier
Dual High Speed
Decompensated (AvcL ",2)
JFET Input Operational
Amplifier
Quad High Speed JFET Input
Operational Amplifier
Quad High Speed
Decompensated (AvcL ",2)
JFET Input Operational
Amplifier
Continuously Variable Slope
Delta Modulator/Demodulator
Low Power Audio Amplifier
Subscriber Loop Interface
Circuit
High Performance Current
Mode Controller
Microprocessor Voltage
Regulator and Supervisory
Circuit
Low Power JFET Input
Operational Amplifiers
JFET-Input Operational
Amplifiers
JFET-Input Operational
Amplifiers
JFET-Input Operational
Amplifiers
Switch mode Pulse Width
Modulation Control Circuits
Switch mode Pulse Width
Modulation Control Circuits
Pin-Programmable Overvoltage
Sensing Circuit
DC to DC Converter Control
Circuits
DC to DC Converter Control
Circuits
High Performance Single
Supply Operational Amplifiers
Dual High Performance Single
Supply Operational Amplifiers
Quad High Performance Single
Supply Operational Amplifiers
MC35080
2-267
2-267
MC35081
2-267
MC35082
MC35083
2-283
2-283
MC35084
2-283
MC35085
2-283
MC35171
2-283
MC35172
MC35174
2-283
9-114
MC35181,
2,4
MC44301
*
MC44802
*
MC75107
MC75108
MC75S110
MC75125
MC75127
MC75128
MC75129
MCC3334
MCCF3334
NE592
OP-27
3-258
3-271
2-294
2-260
2-260
2-260
SAA1042,A
SE592
SG1525A
3-185
3-197
SG1526
3-216
SG1527A
3-227
SG2525A
3-233
SG2526
2-267
SG2527A
2-267
SG3525A
2-267
Function
High-Speed Decompensated
(AvcL ",2) JFET Input
Operational Amplifier
High-Speed JFET Input
Operational Amplifier
Dual High-Speed JFET Input
Operational Amplifier
Dual High-Speed
Decompensated (AVCL ",2)
JFET Input Operational
Amplifier
Quad High-Speed JFET Input
Operational Amplifier
Quad High-Speed
Decompensated (AVCL ",2)
JFET Input Operational
Amplifier
Low Power, Single Supply
Operational Amplifiers
Low Power, Single Supply
Operational Amplifiers
Low Power, Single Supply
Operational Amplifiers
Low Power JFET Input
Operational Amplifiers
System 4 High Performance
Color TV IF
PLL Tuning Circuit with
1.3 GHz Prescaler
Dual Line Receiver
Dual Line Receiver
Dual Line Driver
Seven-Channel Line Receivers
Seven-Channel Line Receivers
Eight-Channel Line Receivers
Eight-Channel Line Receivers
High Energy Ignition Circuit
High Energy Ignition Circuit
Video Amplifier
Ultra-Low Noise Precision, High
Speed Operational Amplifiers
Stepper Motor Driver
Video Amplifier
Pulse Width Modulator Control
Circuits
Pulse Width Modulation Control
Circuits
Pulse Width Modulator Control
Circuits
Pulse Width Modulator Control
Circuits
Pulse Width Modulation Control
Circuits
Pulse Width Modulator Control
Circuits
Pulse Width Modulator Control
Circuits
- See Telecommunication Device Data (DL 136).
MOTOROLA LINEAR/INTERFACE DEVICES
1-6
Page
2-283
2-283
2-283
2-283
2-283
2-283
2-250
2-250
2-250
2-294
9-123
9-129
7-171
7-171
7-176
7-181
7-181
7-185
7-185
10-9
10-9
2-303
2-308
4-59
2-303
3-279
3-286
3-279
3-279
3-286
3-279
3-279
ALPHANUMERIC INDEX Device
Number
SG3526
SG3527A
SN75172
SN75173
SN75174
SN75175
TBA120C
TCA4500A
TCA5550
TCA5600
TCF6000
TCF7000
TDA1085A
TDA1085C
TDA1185A
TDA1190P
TDA1285A
TDA1524A
TDA3190P
TDA3301
TDA3303
TDA3330
TDA3333
TDA4601,B
TL061
TL062
TL064
TL071
TL072
TL074
TL081
TL082
TL084
TL431
Series
CONTINUED
Function
Device
Number
Page
Pulse Width Modulation Control
Circuits
Pulse Width Modulator Control
Circuits
Quad EIA-485 Line Driver with
Three-State Output
Quad EIA-485 Line Receiver
with Three-State Output
Quad EIA-485 Line Driver with
Three-State Output
Quad EIA-485 Line Receiver
with Three-State Output
FM IF Amplifier, Limiter and
Detector
FM Stereo Demodulator
Stereo Sound Control System
Universal Microprocessor
Power Supply Controlier
Peripheral Clamping Array
Pressure Transducer Amplifier
Universal Motor Speed
Controlier
Universal Motor Speed
Controlier
Triac Phase Angle Controller
TV Sound System
Universal Motor Speed
Controller
Stereo Tone Control System
TV Sound System
TV Color Processor
TV Color Processor
TV Color Processor
TV Color Difference
Demodulator
Flyback Converter Regulator
Control Circuit
Low Power JFET Input
Operational Amplifier
Low Power JFET Input
Operational Amplifier
Low Power JFET Input
Operational Amplifier
Low-Noise JFET Input
Operational Amplifier
Low-Noise JFET Input
Operational Amplifier
Low-Noise JFET Input
Operational Amplifier
JFET Input Operational
Amplifier
JFET Input Operational
Amplifier
JFET Input Operational
Amplifier
Programmable Precision
References
TL494
3-286
TL594
3-279
TL780
7-189
UAA1016B
UAA1041
UC2842A
7-191
7-189
UC2843A
7-191
UC3842A
9-137
9-142
9-149
UC3843A
ULN2001A
ULN2002A
ULN2003A
ULN2004A
ULN2068B
ULN2074B
ULN2801
ULN2802
ULN2803
ULN2804
JLA78S40
3-294
7-196
10-29
4-64
4-71
4-81
9-153
4-88
9-156
9-153
9-161
9-161
9-175
Function
Switchmode Pulse Width
Modulation Control Circuits
Switch mode Pulse Width
Modulation Control Circuits
Three-Terminal Positive Voltage
Regulators
Zero Voltage Controlier
Automotive Direction Indicator
High Performance Current
Mode Controller
High Performance Current
Mode Controller
High Performance Current
Mode Controller
High Performance Current
Mode Controller
Peripheral Driver Array
Peripheral Driver Array
Peripheral Driver Array
Peripheral Driver Array
Quad 1.5 A Darlington Switch
Quad 1.5 A Darlington Switch
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Octal Peripheral Driver Array
Universal Switching Regulator
Subsystem
9-183
3-305
2-320
2-320
2-320
2-328
2-328
2-328
2-335
2-335
2-335
5-17
MOTOROLA LINEAR/INTERFACE DEVICES
1-7
Page
3-312
3-323
3-334
4-95
10-31
3-340
3-340
3-340
3-340
7-30
7-30
7-30
7-30
7-200
7-204
7-208
7-208
7-208
7-208
3-53
•
Cross Reference
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
8216
8226
9614DC
9614DM
9615DC
MC8T26AL
MC8T28L
MC75S110L
MC75S110L
MC75108L
7-16
7-21
7-176
7-176
7-171
AD1403AN
AD1408-lD
AD1508-8D
AD6108
AM26LS31CJ
AM26LS31DC
5-8
6-15
6-15
6-27
7-10
9616CDC
9616EDC
9616DM
9617DC
9620DC
MC1488L
MC1488L
MC1488L
MC1489AL
MC75S11OL
7-37
7-37
7-37
7-43
7-176
AM26LS31CN
AM26LS31D
AM26LS31P
AM26LS32ACJ
AM26LS32ACN
AM26LS31PC
AM26LS31D
AM26LS31P
AM26LS32D
AM26LS32APC
7-10
7-10
7-10
7-13
7-13
9620DM
9621DC
9627CDC
962lDM
9636AT
MC75S110L
MC75108L
MC1489AL
MC1489AL
7-176
7-171
7-43
7-43
AM26LS32D
AM26LS32PC
7-149
AM26LS32D
AM26LS32P
AM26LS33DC
AM 26LS33PC
AM26S10DC
MC3486P
MC3487P
7-142
7-145
7-48
7-54
7-48
AM26S1OPC
AM101
AM101A
AM101AD
AM101AF
MC26S10P
7-30
7-30
7-30
7-30
7-30
AM101D
AM101F
AM107
AM10lD
AM107F
9637T
9638T
9640DC
9640NC
9640PC
MC3488AP
MC26S10L
MC3440AP
MC26S10P
9665DC
9665PC
9666DC
9666PC
966lDC
MC1411L
9667PC
9668DC
9668PC
55110DM
75107ADC
MC1413P
MC1416L
MC1416P
75107APC
75107BDC
75107BPC
75108ADC
75108APC
MC1411P
MC1412L
MC1412P
MC1413L
MC75S110L
MC75107L
MC75107P
MC75107L
MC75107P
MC75108L
MC75108P
75108BDC
75108BPC
MC75108L
MC75108P
75110DC
MC75S110L
75110PC
75207DC
MC75S110P
75207PC
75208DC
75208PC
AD DAC-08AD
AD DAC-08CD
AD DAC-08D
AD DAC-08ED
AD DAC-08HD
AD301AL
AD505J
AD505K
AD505S
AD509J
AD509K
AD509S
MC75107L
MC75107P
MC75108L
MC75108P
DAC-08AQ
DAC-08CQ
DAC-08Q
DAC-08EQ
DAC-08HQ
LM301AH
MC1776CG
MC1776CG
MC1776G
LM301AH
lM301AH
LM101AH
AM111D
AM111H
AM201
AM201A
AM201AD
7-30
7-30
7-30
7-176
7-171
AM207F
AM211D
AM211H
7-171
7-171
7-176
7-176
7-171
6-5
6-5
6-5
2-36
2-180
2-180
2-180
2-36
2-36
2-36
2-36
2-36
2-36
11-25
11-25
AD532L
AD580J
AD580K
AD580M
AD580S
MC1595L
MC1403U
MC1403P1
MC1403AP1
MC1503U
11-25
5-8
5-8
5-8
5-8
AD580T
AD589J
AD589K
AD589L
AD589M
MC1503AU
LM385Z-1.2
LM385Z-1.2
LM385Z-1.2
LM385BZ-1.2
AD741CJ
AD741J
AD741K
AD741L
AD741S
MC1741CG
MC1741G
MC1741G
MC1741G
MC1741SG
MC6108
2-161
2-161
2-161
2-161
2-166
LM101AH
LM101AH
LM101AH
LM101AH
LM101AH
LM101AH
LM111J
MC1741G
MC1741G
7-13
7-13
7-142
7-142
7-48
7-48
2-36
2-36
2-36
2-36
2-36
2-36
2-45
2-161
2-161
LM201AN
2-161
2-45
2-36
2-36
2-36
LM201AH
LM201AN
LM201AH
MC1741C
MC1741C
2-36
2-36
2-36
2-161
2-161
MC1741C
MC1741C
2-161
2-161
2-45
2-36
2-36
MC1741G
LM111H
LM201AH
LM201AH
LM211H
LM301AH
AM301A
LM301AH
AM301AD
AM301D
AM311D
AM311H
AM592DC
LM311J-8
LM311H
NE592F
2-36
2-36
2-45
2-45
2-303
AM592DM
AM592HC
AM592HM
AM592PC
AM723DC
SE592F
NE592K
SE592K
NE592N
MC1723CL
2-303
2-303
2-303
2-303
3-111
AM723DM
AM723HC
AM723HM
AM723PC
MC1723L
MC1723CG
MC1723G
MC1723CP
3-111
3-111
3-111
3-111
2-118
LM301AJ
LM301AJ
MC1556G
AM725HM
AM733DC
AM733DM
AM733HC
AM733HM
MC1733CL
MC1733L
MC1733CG
MC1733G
AM741DC
AM741DM
AM741HC
AM741HM
AM747DC
MC1741CG
MC1741G
MC1747CL
AM74lDM
AM747HC
AM747HM
AM748DC
AM748DM
MC1747L
MC1747CG
MC1747G
AM748HC
AM748HM
AM7936PC
AN5150
AN5151
MC1748CG
MC1748G
MOTOROLA LINEAR/INTERFACE DEVICES
1-8
MC3486P
MC26S10L
AM725A31T
5-8
5-4
5-4
5-4
5-4
MC3486L
MC3486L
MC3486P
AM301
7-171
7-171
7-171
6-5
6-5
LM301AH
LM301AH
LM101AH
MC1595L
MC1595L
MC1408L7
MC1508L8
AM201AF
AM201D
AM201F
AM207
AM20lD
7-171
7-171
7-171
7-171
7-171
AD518J
AD518K
AD518S
AD530
AD531
MC1403AU
MC1556G
2-118
2-153
2-153
2-153
2-153
MC1741CU
MC1741U
2-161
2-161
2-161
2-161
2-172
MC1748CU
MC1748U
2-172
2-172
2-172
2-176
2-176
MC34129P
MC13002P
MC13001P
2-176
2-176
3-258
9-64
9-64
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
CA081AE
CA081AS
CA081BE
CA081CS
CA081E
TL081ACP
TL081ACJG
TL081BCP
TL081CJG
TL081CP
2-335
2-335
2-335
2-335
2-335
CA081S
CA082AE
CA082AS
CA082BE
CA082CS
TL081MJG
TL082ACP
TL082ACJG
TL082BCP
TL082CJG
2-335
2-335
2-335
2-335
2-335
CA082E
CA082S
CA084AE
CA084E
CA084S
TL082CP
TL082MJG
TL084ACN
TL084CN
TL082MJ
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
CA3020
CA3020A
CA3021
CA3022
CA3023
MC1554G
MC1454G
MC1590G
MC1590G
MC1590G
2-114
2-114
2-141
2-141
2-141
CA3026
CA3029
CA3029A
CA3030
CA3030A
CA3054
MC1709Pl
MC1709Pl
MC1709Pl
MC1709Pl
9-7
2-149
2-149
2-149
2-149
2-335
2-335
2-335
2-335
2-335
CA3031
CA3032
CA3037
CA3037A
CA3038
MC1733
MC1733
MC1709U
MC1709U
MC1709U
2-153
2-153
2-149
2-149
2-149
CA3038A
CA3044
CA3044Vl
CA3045
CA3045F
MC1709U
MC13010P
MC13010P
MC3346P
MC3346P
2-149
9-73
9-73
9-40
9-40
CA101AT
CA10n
CA107T
CA108AS
CA108AT
LM101AH
LM108AJ-8
LM108AH
2-36
2-36
2-161
2-40
2-40
CA108S
CA108T
CA139AG
CA139G
CA201AT
LM108J-8
LM108H
LM139AJ
LM139J
LM201AH
2-40
2-40
2-57
2-57
2-36
LM101AH
MC1741CG
Part Number
CA3046
CA3048
CA3052
CA3054
CA3056
MC3346P
MC3301P
MC3301P
CA3054
MC1741CG
9-40
2-189
2-189
9-7
2-161
MC13010P
2-161
4-8
4-8
9-73
MC1590G
MCl776G
MCl776G
MCl776CG
MCl776CG
2-141
2-180
2-180
2-180
2-180
CA3059
MCl723G
MC1723G
MC1723L
MC1723G
4-8
3-111
3-111
3-111
3-111
CA3085B
CA3085BF
CA3085BS
CA3085F
CA3085S
MC1723G
MC1723L
MC1723G
MC1723L
MC1723G
3-111
3-111
3-111
3-111
3-111
3-111
2-161
2-161
2-161
2-161
CA3086F
CA3091D
CA3121E
CA3136A
CA3139
MC3346P
MC1594L
TDA3333
MC3346P
MC13010P
9-40
11-11
9-183
9-40
9-73
MC1747CL
MC1747CL
MC1747CG
MC1747L
MC1747L
2-172
2-172
2-172
2-172
2-172
CA3145E
CA3146
CA3151E
CA3201E
CA3210E
TDA3333
MC3346P
TDA3333
TDA3301
MC13001P
9-183
9-40
9-183
9-161
9-64
CA747T
CA748CS
CA748CT
CA748S
CA748T
MC1747G
MC1748CPl
MC1748CG
MC1748U
MC1748G
2-172
2-176
2-176
2-176
2-176
CA3217E
CA3221E
CA3223E
CA3302E
CA3401E
TDA3301
TDA3333
MC13002P
9-161
9-183
9-64
2-57
2-189
CA1391E
CA1458S
CA1458T
CA1558S
CA1558T
MC1391P
MC1458CPl
MC1458G
9-35
2-124
2-124
2-124
2-124
CA6078AS
CA6078AT
CA6741S
CA8741T
CA7607E
MCl776G
MCl776G
MCl776G
MCl776G
MC13010P
2-180
2-180
2-180
2-180
9-73
MC13010P
MC1556G
MC1556P
9-73
2-118
2-118
7-112
MC8T26AL
MC8T28L
7-16
7-21
6-5
6-5
6-5
LM208AH
LM208J-8
LM208H
2-36
2-161
2-40
2-40
2-40
CA3056A
CA3058
CA3059
CA3064
CA239AE
CA239AG
CA239E
CA239G
CA301AT
LM239AN
LM239AJ
LM239N
LM239J
LM301AH
2-57
2-57
2-57
2-57
2-36
CA3076
CA3078AS
CA3078AT
CA3078S
CA3078T
CA308AS
CA308AT
CA308S
CA339AE
CA339AG
LM308N
LM308AH
LM308H
LM339AN
LM339AJ
2-40
2-40
2-40
2-57
2-57
CA3079
CA3085
CA3085A
CA3085AF
CA3085AS
CA339E
CA339G
CA723CE
CA723CT
CA723E
LM339N
LM339J
MC1723CP
MC1723CG
MC1723L
2-57
2-57
3-111
3-111
3-111
CA723T
CA741CS
CA741CT
CA741S
CA741T
MC1723G
MC1741CPl
MC1741CG
MC1741U
MC1741G
CA747CE
CA747CF
CA747CT
CA747E
CA747F
CA20n
CA207T
CA208AT
CA208S
CA208T
LM201AH
MC1741C
MC1558U
MC1558G
CA3008
CA3008A
CA301 0
CA3010A
CA3011
MC1709U
MC1709U
MC1709G
MC1709G
MC1590G
2-149
2-149
2-149
2-149
2-141
CA7611E
CMP-01CJ
CMP-01CP
CS3471
CA3012
CA3015
CA3015A
CA3016
.CA3016A
MC1590G
MC1709G
MC1709G
MC1709U
MC1709U
2-141
2-149
2-149
2-149
2-149
D8216
D8226
DAC-08AQ
DAC-08CN
DAC-08CP
MC1741G
CA3059
CA3059
CA3079
MC3302P
MC3401P
MC3471P
DAC-OBAQ
DAC-08CP
DAC-08CP
MOTOROLA LINEAR/INTERFACE DEVICES
1-9
II
CROSS REFERENCE -
CONTINUED
Motorola
Part Number
DAC-08CQ
DAC-OBEN
DAC-08EP
DAC-08EQ
DAC-08HN
Direct
Replacement
Motorola
Similar
Replacement
DAC-08CQ
DAC-08EP
DAC-08EP
DAC-08EQ
DAC-OSHP
Page
6-5
6-5
6-5
6-5
6-5
DS75108J
DS7510SN
DS75110J
DS75110N
DS75207J
DS7520SJ
DS7520SN
ICBSOOOC
ICBS001C
DAC-08HP
DAC-08HQ
DAC-08Q
DAC0800LCJ
DAC0800LCN
DAC-08HP
DAC-OSHQ
DAC-08Q
DAC-08EQ
DAC-08EP
6-5
6-5
6-5
6-5
6-5
DAC0800LD
DAC0801LCJ
DAC0801LCN
DAC0802LCJ
DAC0802LCN
DAC-08Q
DAC-08CQ
DAC-OSCP
DAC-08HQ
DAC-08HP
6-5
6-5
6-5
6-5
6-5
DAC0802LD
DAC0806LCJ
DAC0806LCN
DAC0807LCJ
DAC0807LCN
DAC-08AQ
MC1408L6
MC1408P6
MC1408L7
MC1408P7
6-5
6-15
6-15
6-15
6-15
DAC0808LCJ
DAC0808LCN
DACOBDBLD
DM7822J
DM7S37J
MC140SLS
MC140SPS
6-15
6-15
6-15
7-43
7-70
MC1508LB
MC1489AL
MC3437L
DMS822J
DMSS22N
DMSS37N
DS26LS31J
DS26LS31N
MC3437P
AM26LS31D
AM26LS31P
7-43
7-43
7-70
7-10
7-10
DS26LS32J
DS26LS32N
DS26S10CJ
DS26S10CN
DS1488J
AM26LS32D
AM26LS32P
MC26S10L
MC26S10P
MC1488L
7-13
7-13
7-48
7-48
7-37
DS1488N
DS1489AJ
DS1489AN
MC1488P
MC1489AL
MC1489AP
OS1489J
MC1489L
DS1489N
MC1489P
7-37
7-43
7-43
7-43
7-43
DS3486J
DS3486N
DS3487J
DS3487N
DS3612H
MC3486L
MC3486P
MC3487L
MC3487P
MC14S9AL
MC14S9AP
MC1472U
MC1472P1
DS3612N
DS3632H
DS3632J
DS3632N
DS3650J
MC1472U
MC1472U
MC1472P1
MC3450L
DS3650N
DS3651J
DS3651N
DS3652J
DS3652N
MC3450P
MC3430L
MC3430P
MC3452L
MC3452P
DS3653J
DS3653N
DS7837J
DS7837W
DS8833J
MC3432L
MC3432P
7-34
7-34
7-34
7-34
7-72
MC8T28P
MC8T26AL
DS8634N
MC8T26AP
DS8835J
DS8835N
MC8T26AL
MC8T26AP
7-21
7-16
7-16
7-16
7-16
MC8T28L
MC8T28P
MC34051
7-51
7-51
7-21
7-21
7-164
DS8923.A
DS55107W
DS55110J
DS75107J
DS75107N
MC3437L
MC3437P
MC34050
MC75107L
MC75S11OL
MC75107L
MC75107P
MC75107L
MC75107P
MC7510SL
MC75108P
LM111J
LM111J
7-171
7-171
7-171
2-45
2-45
ICBS741C
ICH8500ATV
ICHS500TV
ICL 101ALNDP
ICL101ALNFB
MC1741CG
MC1776CG
MC1776CG
LM101AH
LM101AH
2-161
2-180
2-180
2-36
2-36
ICL 101ALNTY
ICL301ALNPA
ICL301ALNTY
ICL741CLNPA
ICL741CLNTY
LM101AH
LM301AH
LM301AH
MC1741CP1
MC1741CP1
2-36
2-36
2-36
2-161
2-161
ICLSOO1CTZ
ICLSOO7CTA
ICL8007MTA
ICLSOOSCPA
LM111J
LM111J
MC1709CG
MC1709CG
LM301AN
2-45
2-45
2-149
2-149
2-36
ICLSOOSCTY
ICLS013A
ICLS013B
ICLS013C
ICLS017CTW
LM301AN
MC1594L
MC1594L
MC1594L
LM301AN
2-36
11-11
11-11
11-11
2-36
ICLS017MTW
ICLS021C
ICLS021M
ICLS022C
ICLS022M
LM301AN
MC1776G
MC1776G
MC1776G
MC1776G
2-36
2-1S0
2-180
2-180
2-180
ICLS043CDE
ICLS043CPE
ICLS043MDE
ICL804SCDE
ICLS04SCPE
MC1776G
MC1776G
MC1776G
MC1776G
MC1776G
2-1S0
2-180
2-180
2-180
2-180
ICL804SDPE
ICLS069CCZR
ICLS069DCZR
IP494ACJ
IP494ACN
MC1776G
LM3858Z-1.2
LM3S58Z-1.2
TL594CN
TL594CN
2-1S0
5-4
5-4
3-323
3-323
TL594MJ
SG1526AJ
SG1526J
SG1527AJ
SG2525AJ
3-323
3-286
3-2S6
3-279
3-279
IP3526J
SG2526J
SG2527AJ
SG3525AJ
SG3525AN
SG3526J
3-286
3-279
3-279
3-279
3-286
IP3526N
IP3527AJ
IP3527AN
IP33063N
IP34060AN
SG3526N
SG3527AJ
SG3527AN
MC33063P1
MC34060AP
3-286
3-279
3-279
3-227
3-197
IP34063N
IP35060AN
IP35063J
ITT652
ITT654
MC34063P1
MC35060AL
MC35063U
3-227
3-197
3-227
7-30
7-30
ITT656
ITT3064
ITT3710
L144AP
MC1413P
MC13010P
L201
L202
L203
L583
LF3478N
MC1411P
MC1412P
MC1413P
IP2526J
IP2527AJ
IP3525AJ
IP3525AN
2-213
2-213
7-51
7-51
7-21
7-164
7-171
7-176
7-171
7-171
MC1411P
MC1412P
MC1391P
LM324N
MC3484S2
LF3478N
MOTOROLA LINEAR/INTERFACE DEVICES
1-10
Page
7-171
7-171
7-176
7-176
7-171
IP494AJ
IP1525AJ
IP1526J
IP1527AJ
IP2525AJ
7-72
Motorola
Similar
Replacement
MC75108L
MC75108P
MC75S110L
MC75S110P
ICLBOO1MTZ
7-72
2-213
2-213
7-72
MC3437L
MC3437L
MC8T28L
MotorOla
Direct
Replacement
DS752Q7N
7-142
7-142
7-145
7-145
7-34
DS8833N
DS8834J
DS8837J
DS8837N
DS8839J
DS8839N
DSS922.A
Part Number
7-30
9-73
9-35
2-51
7-30
7-30
7-30
10-19
2-14
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
LF347N
LF351AH
LF351AN
LF351BH
LF351BN
LF347N
LF3S1H
MC34001G
LF351N
LF352D
LF353AH
LF353AN
LF351N
MC34002AG
MC34002AP
LF353BH
LF353BN
LF353H
LF353N
MC34002BG
MC34002BP
MC34002G
LF353N
LF355BH
LF355BH
LF355BJ
LF355H
LF355J
LF355JG
LF355L
LF355BJ
LF355H
LF355J
Motorola
Similar
Replacement
MC34004P
MC34001AG
MC34001AP
MC34001BG
MC34001BP
MC34001P
LF355J
MC34002P
LF355J
LF355H
LF356H
LF356J
LF356JG
LF356L
LF356N
LF356H
LF356J
LF356P
LF357BH
LF357BJ
LF357BN
LF357H
LF357J
LF357JG
LM101AJ-14
LM101AJG
LM101AL
LM101D
2-16
2-16
2-16
2-16
2-16
LF357BJ
LF357J
LF357J
LF357N
LF357P
LF357J
LF357J
LF411C
MC34001AG
LF412C
MC34002AG
MC34001AG
MC34001AP
MC1776CG
MCl776G
MC1436G
MC1536G
MC1536G
MCl776G
2-180
2-92
2-92
2-92
2-180
LH101H
LH201H
LH740ACH
LH2101AD
LH2101AF
MC1741G
MC1741G
LF355H
MC1537L
MC1537L
2-161
2-161
2-16
2-96
2-96
LH2201AD
LH2201AF
LH2301AD
LH2301AF
LMllCH
MC1537L
MC1537L
MC1437L
MC1437L
LM11CH
2-96
2-96
2-96
2-96
2-29
LMllCJ
LMllCJ-8
LMllCLH
LMllCLJ
LM11CLJ-8
LMllCJ
LMllCJ-8
LMllCLH
LMllCLJ
LMllCLJ-8
2-29
2-29
2-29
2-29
2-29
LMllCLN
LM11CLN-14
LMllCN
LM11CN-14
LM11CLN
LMllCLN-14
LM11CN
LMllCN-14
LMllH
2-29
2-29
2-29
2-29
2-29
LM101AJ
LM101AJ
LM101AJ
LM101AH
LM101AJ
LM107L
MC1741
MC1741
LM108AF
LM108AH
LM108AJ
LM108AJ-8
LM108H
LM108AF
LM108AH
LM108AJ
LM108AJ-8
LM108H
LM108J
LM108J-8
LM109H
LM109K
LM109LA
LM108J
LM108J-8
LM109H
LM109K
LM109K
LMll1H
LMll1J-8
LM111JG
LM111J-8
2-40
2-40
2-40
2-40
2-40
2-40
2-40
3-15
3-15
3-15
MC1556U
LMl17H
LM117K
LMl17LH
MC1741SG
MC7905CK
MC7912CK
LM120H-15
MC7915CK
LM120K-5.0
LM120K-12
MC7905CK
MC7912CK
MC7915CK
MC1556G
LM123AK
LM123K
LM124J
LM124J
LM124J
MC1568G
MC1568G
MC1568G
2-45
2-45
2-45
2-45
2-45
2-118
3-20
3-20
3-28
2-161
3-168
3-168
3-168
3-168
3-168
3-168
2-118
3-36
3-36
2-51
2-51
2-51
3-105
3-105
3-105
LM140AK-S.O
LM140AK-5.0
3-42
3-42
2-57
2-57
3-49
LM140AK-12
LM140AK-15
LM140K-5.0
LM140K-S.0
LM140K-12
LM140AK-12
LM140AK-15
LM140K-5.0
LM140K-S.0
LM140K-12
3-49
3-49
3-49
3-49
3-49
LM140K-15
LM140K-15
LM137H
LM137K
LM139AJ
LM139J
LM137H
LM137K
LM139AJ
LM139J
LM140LAH-6.0
LM140LAH-S.0
LM140LAH-12
MC7SL05ACG
MC7SL05ACG
MC7SLOSACG
MC7SL12ACG
3-49
3-145
3-145
3-145
3-145
LM140LAH-15
LM140LAH-50
LM140LAH-SO
LM143H
LM145K
MC7SL 15ACG
MC7SL05ACG
MC7SL05ACG
MC1536G
MC7905CK
3-145
3-145
3-145
2-92
3-168
LM140LAH-5.0
LM14SJ
LM149J
LM150K
LM15SAH
LM15SH
LM14SJ
MC4741L
LM150K
LM15SH
LM15SH
MOTOROLA LINEAR/INTERFACE DEVICES
1-11
2-36
2-36
2-36
2-36
2-36
LM108J-8
LM120H-5.0
LM120H-12
LM124AJ
LM124J
LM125H
LM126H
LM128H
2-29
2-29
2-36
2-36
2-36
2-36
2-36
2-36
2-161
2-161
LM111H
LMll1J
LMll1J-8
Page
LM101AJ
LM101AH
LM107H
LM120K-15
LM122H
LM123AK
LM123K
LM124AD
2-26
2-260
2-26
2-260
2-260
2-260
2-180
2-180
2-180
2-180
2-180
LM101AH
LM101AH
LM117H
LM117K
LM117LH
LM118H
2-16
2-16
2-16
2-16
2-16
MC1776CG
MC1776CG
MC1776G
MCl776G
LM101AH
LM101AH
LM101H
LM101J-14
LM111HH
LM111J
Motorola
Similar
Replacement
LMllJ
LMllJ-8
LM101F
2-260
2-260
2-260
2-14
2-16
LM112H
LF3S7H
LM11H
LM101AH
2-16
2-16
2-16
2-16
2-16
LF357H
LHOO04CHH
LHOO04H
LH042CH
LM101AJ
LMll1H
LF357BH
LF357BJ
i..HOOO4CH
2-260
2-14
2-16
2-260
2-260
Motorola
Direct
Replacement
LM101AO
LM101AF
2-16
2-16
2-16
2-16
2-16
LF356J
LHOOOAH
LMllJ
LMllJ-8
LF356J
LF356H
LF356J
LF357L
LF411C
LF411CH
LF412C
LF412CH
LG351AH
LG351AN
LHOOOACD
LHOOOACF
LHOOOACH
LHOOOAD
LHOOOAF
2-14
2-260
2-260
2-260
2-260
LF356J
LF355J
LF355J
LF356BH
LF356BJ
Part Number
2-16
2-16
2-16
2-16
2-16
LF355N
LF355P
LF356BH
LF356BJ
LF356BN
Page
2-61
2-227
3-65
2-61
2-61
..
..
CROSS REFERENCE Part Number
Motorola
Direct
Replacement
LM158J
LM158JG
LM158L
LM163J
LM171H
LM158J
LM193AH
LM193AH
LM193H
LM193H
LM193JG
LM193U
LM201AH
CONTINUED
Motorola
Similar
Replacement
LM158J
LM158H
MC3450L
MC1590G
LM193H
LM193H
LM201AH
LM201AJ
LM201AJG
LM?01AJ-14
LM201AL
LM201AN
LM201AJ
LM201AND
LM201AP
LM201H
LM201J
LM201J-14
LM201AND
LM201AJ
LM201AJ
LM201AH
LM201AN
LM201AN
LM201AH
LM201AJ
LM201AJ
Page
Part Number
2-61
2-61
2-61
7-72
2-141
LM240LAZ-18
LM240LAZ-24
LM243H
LM245K
LM248J
Motorola
Direct
Replacement
Motorola
Similar
Replacement
MC78L 18ACP
MC78L24ACP
MC1536G
MC7905CK
3-145
3-145
2-92
3-168
2-61
MC4741P
MC4741L
2-236
2-236
3-65
2-67
2-67
LM248J
2-73
2-73
2-73
2-73
2-36
LM249J
LM250K
LM258AH
LM258M
2-36
2-36
2-36
2-36
2-36
LM258H
LM258J
LM258N
LM271H
LM285Z-1.2
2-36
2-36
2-36
2-36
2-36
LM285Z-2.5
LM293AH
LM293H
LM293P
LM293U
LM285Z-2.5
LM293AH
LM293H
LM301AM
LM301AH
LM301AJ
LM301AJD
LM301AJDS
LM301AD
LM3Q1AH
LM301AJ
LM301AJD
LM301AJDS
LM249N
Page
LM250K
LM258H
LM258D
LM258H
LM258J
LM258N
MC1590G
LM285Z-1.2
LM293H
LM293H
2-67
2-67
2-67
2-141
2-67
2-67
2-73
2-73
2-73
2-73
LM208AJ
LM20BAJ-B
LM208AN
LM208AJ-8
LM208AN
2-161
2-41
2-41
2-41
2-41
LM208H
LM20BJ
LM208J-8
LM209H
LM209K
LM20BH
LM208J
LM208J-8
LM209H
LM209K
2-41
2-41
2-41
3-15
3-15
LM301AJG
LM301AJS
LM301AL
LM301AN
LM301AND
LM211M
LM211H
LM211J-8
LM211JG
LM212H
LM211D
LM211H
LM211J-8
2-45
2-45
2-45
2-45
2-118
LM301ANDS
LM301ANS
LM301AP
LM30lN
LM307P
LM301ANDS
LM301ANS
LM217H
LM217K
LM217H
LM217K
3-20
3-20
3-20
3-20
3-28
LM308AH
LM308AH-1
LM308AH-2
LM308AJ
LM308AJ-8
LM308AH
LM308AJ
LM308AJ-8
2-40
2-40
2-40
2-40
2-40
LM308AJ-8D
LM308AJ-8DS
LM308AJ-8S
LM308AN
LM308AND
LM308AJ-8D
LM308AJ-8DS
LM308AJ-BS
LM308AN
LM308AND
2-40
2-40
2-40
2-40
2-40
LM308ANDS
LM308ANS
LM308M
LM308H
LM308J
LM3D8ANDS
LM308ANS
LM308D
LM308H
LM308J
2-40
2-40
2-40
2-40
2-40
LM308J-8
LM308J-8D
LM308J-8DS
LM308J-8S
LM308N
LM308J-8
LM308J-8D
LM308J-8DS
LM308J-8S
LM308N
2-40
2-40
2-40
2-40
2-40
LM308ND
LM308NDS
LM308NS
LM309H
LM309K
LM308ND
LM308NDS
LM308NS
LM309H
LM309K
2-40
2-40
2-40
3-15
3-15
LM309KC
LM311M
LM311H
LM311J-8
LM311J-8D
LM31,D
LM311H
LM311J-8
LM311J-8D
LM207H
LM20BAH
MC1741C
LM20BAH
LM208AJ-8
LM211J-8
MC1456U
LM217K
LM217H
LM217KC
LM217KD
LM217LH
LM217LH
LM218J-8
LM21BH
LM220H-5.0
LM220H-12
LM220H-15
MC1741SU
MC1741SG
MC7905CK
MC7912CK
MC7915CK
2-161
2-161
3-168
3-168
3-168
LM220K-S.O
LM220K-12
LM220K-15
LM222H
LM223AK
MC7905CK
MC7912CK
MC7915CK
MC1556G
3-168
3-168
3-168
2-118
3-36
LM223K
LM224AF
LM224AJ
LM224M
LM224J
LM223AK
LM223K
LM224J
LM224J
LM224D
LM224J
3-36
2-51
2-51
2-51
2-51
LM224M
LM225H
LM226H
LM228H
LM237H
LM224N
LM237H
2-51
3-105
3-105
3-105
3-42
LM237K
LM239AJ
LM239AN
LM239M
LM239J
LM237K
LM239AJ
LM239AN
LM239D
LM239J
3-42
2-57
2-57
2-57
2-57
LM239N
LM204LAH-5.0
LM204LAH-8.0
LM240LAH-12
LM240LAH-15
LM239N
LM240LAZ-5.0
LM240LAZ-6.0
LM240LAZ-8.0
LM240LAZ-12
LM240LAZ-15
MC1568G
MC1568G
MC1568G
MC78L05ACG
MC78L08ACG
MC78L12ACG
MC78L15ACG
2-57
3-145
3-145
3-145
3-145
MC78L05ACP
MC78L05ACP
MC78L08ACP
MC78L12ACP
MC78L15ACP
3-145
3-145
3-145
3-145
3-145
LM301AH
2-36
2-36
2-36
2-36
2-36
LM301AN
2-36
2-36
2-36
2-78
2-78
LM301AJ
LM301AJS
LM301AN
LM301ANO
LM307N
LM30lN
LM308AH
LM308AH
LM309K
LM311J-8DS
LM311J-8S
LM311JG
LM311N
LM311N-14
LM311J-8DS
LM311J-8S
LM311ND
LM311NDS
LM311NS
LM311P
LM312H
LM311ND
LM311NDS
LM311NS
MOTOROLA LINEAR/INTERFACE DEVICES
1-12
2-36
2-36
2-36
2-36
2-36
3-15
2-45
2-45
2-45
2-45
LM311J-8
LM311J
LM311J
2-45
2-45
2-45
2-45
2-45
LM311N
MC1456G
2-45
2-45
2-45
2-45
2-118
CROSS REFERENCE Part Number
lM317H
lM317K
lM317KC
LM317KD
LM317LH
LM317LZ
LM317MP
lM317MT
LM317P
LM317T
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
lM317H
lM317K
lM317T
LM317T
LM317LH
LM317LZ
LM317MT
LM317MT
LM317T
LM317T
Page
Part Number
Motorola
Direct
Replacement
3-20
3-20
3-20
3-20
3-28
LM339NDS
LM339NS
LM339P
LM340AK-5.0
LM340AK-12
LM339NDS
LM339NS
3-28
3-20
3-20
3-20
3-20
LM340AK-15
LM340AK-15
LM340AT-5.0
LM340AT-12
LM340AT-15
LM340K-5.0
LM340AT -5.0
LM340AT-12
lM340AT-15
LM340K-5.0
Motorola
Similar
Replacement
LM339N
LM340AK-5.0
LM340AK-12
MC7805CK
Page
2-57
2-57
2-57
3-49
3-49
3-49
3-49
3-49
3-49
3-49
LM320H-12
MC,7912CK
2-161
2-161
2-161
3-168
3-168
LM320H-15
LM320K-5.0
LM320K-12
LM320K-15
LM320lZ-5.0
MC7915CK
MC7905CK
MC7912CK
MC7915CK
MC79L05ACP
3-168
3-168
3-168
3-168
3-177
LM340KC-6.0
LM340KC-8.0
LM340KC-12
LM340KC-15
LM340KC-18
LM320LZ-12
LM320lZ-15
LM320MP-5.0
LM320MP-5.2
LM320MP-6.0
MC79L12ACP
LM340KC-24
MC7905CT
MC7905.2CT
MC7906CT
3-177
3-177
3-168
3-168
3-168
LM340LAH-8.0
LM340LAH-12
LM340LAH-15
MC7824CK
MC78L05ACG
MC78L08ACG
MC78L12ACG
MC78L15ACG
3-132
3-145
3-145
3-145
3-145
LM320MP-8.0
LM320MP-12
LM320MP-15
LM320MP-18
LM320MP-24
MC7908CT
MC7912CT
MC7915CT
MC7918CT
MC7924CT
3-168
3-168
3-168
3-168
3-168
LM340LAZ-5.0
LM340lAZ-6.0
LM340LAZ-8.0
LM340LAZ-12
LM340LAZ-15
MC78L05ACP
MC78L05ACP
MC78L08ACP
MC78L12ACP
MC78L15ACP
3-145
3-145
3-145
3-145
3-145
LM320T-5.0
lM320T-5.2
LM320T-12
LM320T-15
LM322H
MC7905CT
MC7905.2CT
MC7912CT
MC7915CT
MC1455G
3-168
3-168
3-168
3-168
11-4
LM340LAZ-18
LM340LAZ-24
LM340T-5.0
LM340T-6.0
LM340T-8.0
MC78L18ACP
MC78L24ACP
MC7805CT
MC7806CT
MC7808CT
3-145
3-145
3-49
3-49
3-49
MC1455P1
11-4
3-36
3-36
3-36
3-36
LM340T-12
LM340T-15
LM340T-18
LM340T-24
LM341P-5.0
MC7812CT
MC7815CT
MC7818CT
MC7824CT
MC78M05CT
3-49
3-49
3-49
3-49
3-151
LM324J
LM324N
2-51
2-51
2-51
2-51
2-51
LM341P-6.0
LM341P-8.0
LM341P-12
LM341P-15
LM341P-18
MC78M06CT
MC78M08CT
MC78M12CT
MC78M15CT
MC78M18CT
3-151
3-151
3-151
3-151
3-151
MC3403P
2-51
2-51
2-51
2-51
2-51
LM341P-24
LM342P-5.0
LM342P-6.0
LM342P-8.0
LM342P-12
MC78M24CT
MC78M05CT
MC78MOBCT
MC78M08CT
MC78M12CT
3-151
3-151
3-151
3-151
3-151
MC1468l
MC1468G
MC1468L
LM342P-15
LM342P-18
LM342P-24
LM343H
LM345K
MC78M15CT
MC78M18CT
MC78M24CT
MC1436G
MC7905CK
3-151
3-151
3-151
2-92
3-168
LM348M
LM348J
LM348N
LM349J
LM349N
LM348D
LM348J
LM348N
MC4741CL
MC4741CL
2-61
2-61
2-61
2-236
2-236
MC1741SCU
MC1741SCG
MC1741SCP1
MC7905CK
LM318D
LM318H
LM318N
LM320H-5.0
MC79L15ACP
LM322N
LM323AK
LM323AT
LM323K
LM323T
LM323AK
LM323AT
LM323K
LM323T
LM324AJ
LM324AN
LM324M
LM324J
LM324JD
LM324AN
LM324D
LM324J
LM324JD
LM324JDS
LM324JS
LM324N
LM324ND
LM324NDS
LM324JDS
LM324JS
LM324N
LM324ND
LM324NDS
LM324NS
LM325AN
LM325H
LM325N
LM324NS
LM340K-6.0
LM340K-8.0
LM340K-12
LM340K-15
LM340KC-5.0
LM340K-8.0
LM340K-12
LM340K-15 "
LM340T-5.0
LM340LAH-S.O
LM340T-5.0
LM340T-6.0
LM340T-8.0
LM340T-12
LM340T-15
LM340T-18
LM340T-24
LM326H
MC1468G
LM326H
LM326N
lM328AN
LM328H
LM328N
MC1468G
MC1468l
MC1468L
MC1468G
MC1468L
3-105
3-105
3-105
3-105
3-105
LM337MT
LM337T
3-42
3-42
3-42
3-42
3-42
LM350K
LM351T
LM358AH
LM358AN
LM358M
LM350K
lM350T
LM337MT
lM339AM
LM339AJ
LM339AN
LM339M
LM339J
LM339AD
LM339AJ
LM339AN
LM339D
lM339J
2-57
2-57
2-57
2-57
2-57
LM358H
LM358J
LM358JD
LM358JDS
LM358JG
lM358H
LM358J
LM358JD
LM358JDS
LM339JD
LM339JDS
lM339JS
LM339N
LM339ND
LM339JD
LM339JDS
LM339JS
LM339N
LM339ND
2-57
2-57
2-57
2-57
2-57
LM358JS
LM358N
LM358ND
LM358NDS
LM358NS
LM358JS
LM358N
lM358ND
LM356NDS
LM358NS
LM337H
LM337K
MC7806CK
MC7808CK
MC7818CK
3-132
3-132
3-49
3-49
3-132
LM358H
LM358N
LM358D
LM358J
MOTOROLA LlNEARIINTERFACE DEVICES
1-13
3-132
3-49
3-49
3-49
3-49
LM340T-12
lM340T-15
2-51
3-105
3-105
3-105
3-105
LM337H
LM337K
LM337MP
LM337MT
LM337T
MC7806CK
MC7808CK
3-65
3-65
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
2-61
II
CROSS REFERENCE Pari Number
CONTINUED
Motorola
Direct
Replacement
LM363AJ
LM363AN
LM363J
LM363N
LM371H
Motorola
Similar
Replacement
MC3450L
MC3450P
MC3450L
MC3450P
MC1590G
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
7-72
7-72
7-72
7-72
2-141
LM1408N8
LM1414J
LM1414N
LM1458H
LM1458J
MC1414L
MC1414P
MC1458G
MC1458U
6-15
2-88
2-88
2-124
2-124
5-4
5-4
5-4
5-4
5-4
LM1458N
LM1488J
LM1488N
LM1489AJ
LM1489AN
MC1458P1
MC14aaL
MC1488P
MC1489AL
MC1489AP
2-124
7-37
7-37
7-43
7-43
5-4
MC1408P
LM385BZ-1.2
LM385M-1.2
LM385Z-1.2
LM385BZ-2.5
LM385M-2.5
LM3858Z-1.2
LM385D-l.2
LM385Z-1.2
LM385BZ-2.5
LM385D-2.5
LM385Z-2.5
LM386N
LM393AH
LM393AN
LM393M
LM385Z-2.5
LM393AH
LM393AN
LM393D
2-73
2-73
2-73
LM1489J
LM1489N
LM1496H
LM1496J
LM1496N
MC1489L
MC1489P
MC1496G
MC1496L
MC149SP
7-43
7-43
8-13
8-13
8-13
LM393H
LM393J
LM393JG
LM393N
LM393ND
LM393H
LM393J
LM393N
LM393ND
2-73
2-73
2-73
2-73
2-73
LM1514J
LM1558H
LM1558J
LM1596H
LM1596J
MC1514L
MC1558G
MC1558U
MC1596G
MC1596L
2-88
2-124
2-124
8-13
8-13
LM393NDS
LM393NS
LM555CH
LM555CN
LM555H
LM393NDS
LM393NS
MC1455G
MC1455Pl
MC1455G
2-73
2-73
11-4
11-4
11-4
LM1822
LM1849A
MC13010P
MC3484S2
LM1889
MC1374P
LM1900D
LM1981
MC3301P
MC13020P
LM556CD
LM556CJ
LM556CN
LM556L
LM703LN
LM709AH
LM709CN
MC3456L
MC3456L
MC3456P
MC3456L
LM2900N
LM2901 M
LM2901N
LM2901ND
LM2901NDS
LM2900N
LM290lD
LM2901N
LM2901ND
LM2901NDS
MC1709CG
11-40
11-40
11-40
11-40
9-15
2-149
2-149
LM709AN-8
LM709H
LM723CD
LM723CH
LM723CJ
MC1709CPl
MC1709G
MC1723CJ
MC1723CG
MC1723CL
2-149
2-149
3-111
3-111
3-111
LM2901NS
LM2902M
LM2902J
LM2902N
LM2903
LM2901NS
LM2902D
LM2902J
LM2902N
LM2903N
2-57
2-51
2-51
2-51
2-73
LM723CN
LM723H
LM723J
LM733CD
LM733CH
MC1723CP
MC1723G
MC1723L
MC1733CL
MC1733CG
3-111
3-111
3-111
2-153
2-153
LM2903M
LM2903JG
LM2903N
LM2903D
LM2903JG
LM2903N
LM2903P
LM2903N
2-73
2-73
2-73
2-73
2-73
LM733CJ
LM733CN
LM733H
LM733J
LM741AH
MC1733CL
MC1733CP
MC1733G
MC1733L
MC1741G
2-153
2-153
2-153
2-153
2-161
LM741CD
LM741CH
LM741CJ-14
LM741CN
LM741EH
LM741CJ
LM741CH
LM741CJ
LM741CN
MC1741CG
2-161
2-161
2-161
2-161
2-161
LM741EJ
LM741EN
LM741H
LM747CD
LM747CH
MC34119P
LM393N
MC1350P
MC1709AG
MC1741CU
MC1741CPl
LM741H
lM747CJ
LM747CH
-
LM2903U
LM2903U
LM2904M
LM2904H
LM2904J
LM2904N
LM2905N
LM2904D
LM2904H
LM2904J
LM2904N
LM2931AT-5.0
LM2931AZ-5.0
LM2931CM
LM2931CT
LM2931T-5.0
LM2931AT-5.0
LM2931AZ-5.0
LM2931CD
LM2931CT
LM2931T-5.0
LM2931Z-5.0
LM3026
LM3045
LM3046N
LM2931Z-5.0
2-161
2-161
2-161
MC3346P
2-172
LM3054
CA3054
LM747CJ
LM747CN
LM747H
LM747J
MC1748CG
2-172
2-172
2-172
2-172
2-176
LM748CJ
LM748CN
LM748H
LM748J
LM833D
MC1748CU
MC1748CPl
MC1748G
MC1748U
LM833D
2-176
2-176
2-176
2-176
2-82
LM1408J6
LM1408J7
LM1408J8
LM1408N6
LM1408N7
MC1455Pl
2-189
2-57
2-57
2-57
2-57
2-67
2-67
2-67
2-67
11-4
3-88
3-88
3-88
3-88
3-88
CA3054
MC3346P
3-88
9-7
9-40
9-40
9-7
2-172
LM747CJ
LM747CN
LM747H
LM747J
LM748CH
LM833N
LM833P
LM837N
LM1035
lM1391N
MC3301P
9-73
10-19
9-19
2-189
9-84
MC33078P
LM833P
MC33079P
TCA5550
MC1391P
MC1408L6
MC1408L7
MC1408L8
MC1408P6
MC1408P7
LM3064N
LM3089
LM3146
LM3146A
LM3189
LM3301N
LM3302
LM3302J
LM3302N
LM3401N
LM3900N
LM3905
LM3905N
LM4250CH
2-241
2-82
2-241
9-149
9-35
6-15
6-15
6-15
6-15
6-15
LM4250CN
LM4250H
LM4500A
LM7805CK
LM7805CT
9-73
8-29
9-40
9-40
MC3356P
8-29
2-189
2-57
2-57
2-57
MC3301P
MC3302P
MC3302L
MC3302P
MC3401P
LM3900N
MC3401P
MC1455Pl
MC1455Pl
MCl776CG
MCl776CPl
MCl776G
TCA4500A
MC7805CK
MC7805CT
MOTOROLA LINEAR/INTERFACE DEVICES
1-14
MC13010P
MC3356P
MC3346P
MC3346P
2-189
2-189
11-4
11-4
2-180
2-180
2-180
9-142
3-132
3-132
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
5-12
5-12
5-12
5-12
7-37
LM7805KC
LM7806KC
LM7808KC
LM7812CK
LM7812CT
MC7805CK
MC7B06CK
MC7B08CK
MC7B12CK
MC7B12CT
3-132
3-132
3-132
3-132
3-132
MP5531CP
MP5531DP
MP5532CP
MP5532DP
NBT15A
LM7812KC
LM7815CK
LM7B15CT
LM7815KC
LM7B18KC
MC7B12CK
MC7815CK
MC7B15CT
MC7815CK
MC7B1BCK
3-132
3-132
3-132
3-132
3-132
NBT15F
N8T16A
N8T26AB
N8T26AE
N8T26AJ
MC8T26AP
MC8T26AL
MC8T26AL
LM7824KC
LM7905CK
LM7905CT
LM7912CK
LM7912CT
MC7824CK
MC7905CK
MC7905CT
MC7912CK
MC7912CT
3-132
3-168
3-168
3-168
3-168
NBT26AN
N8T26B
NBT26J
N8T26N
MCBT26AP
MC8T26AP
MC8T26AL
MC8T26AP
NBT28B
MCBT28P
7-16
7-16
7-16
7-16
7-21
LM7915CK
LM7915CT
LM78L05ACH
LM7BL05ACZ
LM78L05CH
MC7915CK
MC7915CT
MC78L05ACG
MC7BL05ACP
MC78L05CG
3-168
3-168
3-145
3-145
3-145
N8T37A
N8T95B
N8T95F
N8T95N
N8T96B
MC3437P
MC8T95P
MC8T95L
MC8T95P
MCBT96P
7-51
7-26
7-26
7-26
7-26
LM7BL05CZ
LM78L08ACH
LM7BL08ACZ
LM7BL08CH
LM78L08CZ
MC78L05CP
MC7BLOBACG
MC78L08ACP
MC78L08CG
MC7BL08CP
3-145
3-145
3-145
3-145
3-145
N8T96F
N8T96N
N8T97B
N8T97F
N8T97N
MC8T96L
MC8T96P
MC8T97P
MC8T97L
MC8T97P
7-26
7-26
7-26
7-26
7-26
LM78L12ACH
LM78L12ACZ
LM78L12CH
LM78L 12CZ
LM78L15ACH
MC78L12ACG
MC78L12ACP
MC78L12CG
MC7BL12CP
MC78L15ACG
3-145
3-145
3-145
3-145
3-145
NBT98B
N8T98F
N8T98N
MC8T98P
MC8T98L
MC8T98P
7-26
7-26
7-26
LM7BL15ACZ
LM7BL15CH
LM78L15CZ
LM7BL18ACZ
LM78L18CZ
MC7BL15ACP
MC78L15CG
MC78L15CP
MC78L18ACP
MC78L18CP
3-145
3-145
3-145
3-145
3-145
N5556T
N5556V
N5558F
N5558T
N5558V
MC1456G
MC1456P1
MC1458U
MC1458G
MC145BP1
2-118
2-118
2-124
2-124
2-124
LM7BL24ACZ
LM78L24CZ
LM7BM05CP
LM78M12CP
LM7BM15CP
MC78L24ACP
MC78L24CP
N5595A
N5595F
N5596A
N5596K
N5709A
MC1495L
MC1495L
MC1496L
MC1496G
MC78M05CT
MC78M12CT
MC78M15CT
3-145
3-145
3-151
3-151
3-151
11-25
11-25
8-13
8-13
2-149
LM79L05ACZ
LM79L 12ACZ
LM79L15ACZ
LM79M05CP
LM79M12CP
MC79L05ACP
MC79L12ACP
MC79L15ACP
MC79M05CT
MC79M12CT
3-177
3-177
3-177
3-182
3-182
LM79M15CP
LM55109J
LM55110J
LM75107AN
LM75108AJ
LM75108AN
LM75110J
LM75110N
LM75207L
LM75207N
LM75208J
LM7520BN
MB3759
MC1458JG
MC1458L
MC145BP
MC1489N
MC1489N3
MC1545J
MC3446J
MC79M15CT
MC75S110L
MC75SHOL
MC75107P
MC75108L
MC75107L
7-171
7-176
7-176
7-171
MC75107P
7-171
MC7510BL
MC75108P
7-171
7-171
3-312
2-124
2-124
TL494CN
MC1458U
MC1458G
MC145BPl
MC14B9P
MC14B9PDS
MC1545L
MC3446AP
MC3446AP
MC3470P
MC3481L
MC34B1P
MC3485L
MC34B5N
MC34B6J
MC3486N
MC34B7J
MC3487N
MC3485P
MC3486L
MC3486P
MC3487L
MC3487P
3-182
7-176
7-176
7-171
MC3470AP
MC1723CP
MC1723CG
MC1733CG
MC1741CPl
2-149
2-149
2-149
3-111
3-111
2-153
2-161
2-161
2-161
2-172
MC1733CL
MC1733CG
NE531G
NE531T
NE531V
NE533G
NE533T
MC1439G
MC1439G
MC1439P
MCl776CG
MC1776CG
2-100
2-100
2-100
2-180
2-180
NE533V
NE537G
NE537T
NE540L
NE550A
MC1776CG
MC1456G
MC1456G
2-180
2-118
2-118
2-114
3-111
MC1747CL
MC1747CG
MC1748CG
MC1554G
MC1723CP
MC1723CG
MC1455U
MC1455G
MC1455P1
MC1455G
MC1455Pl
MC3456P
MC3456L
NE592A
NE592K
MOTOROLA LINEAR/INTERFACE DEVICES
1-15
7-37
7-43
7-16
7-16
7-16
2-172
2-172
2-176
2-153
2-153
NE555V
NE556A
NE5561
NE592A
NE592K
NE5561FE
NE5561N
OP-01C
7-137
7-142
7-142
7-145
7-145
MC1709CG
MC1709CP1
MC1741CG
MC1741CP1
MC1747CL
NE550L
NE555JG
NE555L
NE555N
NE555T
7-58
7-98
7-137
7-137
7-137
MC1709CP1
MC1709CU
N5741T
N5747F
N5748A
N5748T
NE501A
NE501K
2-124
7-43
7-43
2-108
7-58
MC1488L
MC1488L
MC14B9L
N5723K
N5741A
N5741V
N5747A
7-17 1
MC75108P
MC75S11OL
MC75S110P
MC3446N
MC3470N
MC34B1J
MC3481N
MC34B5J
N5709G
N5709T
N5709V
N5723A
N5723T
MC1404U5
MC1404U5
MCl404Ul0
MC1404Ul0
MC34060L
MC34060P
MC1536
3-111
11-4
11-4
11-4
11-4
11-4
11-40
11-40
2-303
2-303
3-185
3-185
2-92
..
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
OP-01G
OP-01H
OP-01J
OP-01L
OP-01P
MC1536
MC1536
MC1536G
MC1536G
MC1436Pl
2-92
2-92
2-92
2-92
2-92
RC75110DP
REF-01CJ
REF-01CP
REF-01CZ
REF-01DJ
MC75S110P
OP-08
OP-08A
OP-08B
OP-08C
OP-08E
MCl776
MCl776
MCl776
MCl776
MCl776
2-180
2-180
2-180
2-180
2-180
REF-01DP
REF-01DZ
REF-02CJ
REF-02CP
REF-02CZ
MC1404Ul0
MC1404Ul0
OP-27AZ
2-308
2-308
2-308
2-308
2-308
REF-02DJ
REF-02DP
REF-02DZ
RM702T
MC1404U5
MC1404U5
RM7DST
MC1709G
5-12
5-12
5-12
2-153
2-149
2-308
2-308
2-308
2-308
2-308
RM723D
RM723DC
RM723T
RM733D
RM733T
MC1723L
MC1723L
MC1723G
MC1733L
MC1733G
3-111
3-111
3-111
3-111
3-111
2-308
2-308
2-308
2-308
2-308
RM741DP
RM741T
RM747D
RM747T
RM748T
MC1741P
MC1741G
MC1747L
MC1747G
MC1748G
2-161
2-161
2-172
2-172
2-176
RM1514DC
RM1537D
RM4136D
RM4136J
RM4194DC
MC1514L
MC1537L
OP-27AJ
OP-27AZ
OP-27BJ
OP-27BZ
OP-27CJ
OP-27CZ
OP-27EJ
OP-27EP
OP-27EZ
OP-27FJ
OP-27AZ
OP-27BZ
OP-27BZ
OP-27CZ
OP-27CZ
OP-27EZ
OP-27EP
OP-27EZ
OP-27FZ
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404Ul0
MC1404U5
MC1404U5
MC1404U5
MC1404U5
MC1733
7-176
5-12
5-12
5-12
5-12
5-12
5-12
5-12
5-12
5-12
OP-27FP
OP-27FZ
OP-27GJ
OP-27GP
OP-27GZ
OP-27FP
OP-27FZ
PWM125AK
PWM125BK
PWM125CK
RC702T
RC709DN
SG1525AJ
SG2525AJ
SG3525AJ
MC1709CPl
3-279
3-279
3-279
2-153
2-149
RC709T
RC723D
RC723DB
RC723DC
RC723T
MC1709CG
MCl723CL
MC1723CP
MC1723CL
MCl723CG
2-149
3-111
3-111
3-111
3-111
RM4195T
RM4558D
RM4558JG
RM4558L
RM4558T
MC4558U
MC4558U
MC4558G
MC4558G
3-105
2-232
2-232
2-232
2-232
RC733D
RC733T
RC741DN
RC741T
RC747D
MC1733CL
MC1733CG
MC1741CPl
MC1741CG
MC1747CL
2-153
2-153
2-161
2-161
2-172
RV3301DB
S5556T
S5558E
S5558T
S5596F
MC3301P
MC1556G
MC1558U
MC1558G
MC1596L
2-189
2-118
2-124
2-124
8-13
RC747T
RC748T
RC1414DC
RC14140P
RC1488DC
MC1747CG
MC1748CG
MC1414L
MC1414P
MC1488L
2-172
2-176
2-88
2-88
7-37
S5596K
S5709G
S5709T
S5723T
S5733K
MC1596G
MC1709U
MC1709G
MCl723G
MC1733G
8-13
2-149
2-149
3-111
2-153
RC1489ADC
RC1489DC
RC1437D
RC1437DP
RC1458DN
MC1489AL
MC1489L
MC1437L
MC1437P
MC1458Pl
7-43
7-43
2-96
2-96
2-124
S5741T
SA555N
SE501K
SE531G
SE531T
MC1741G
MC1455BP1
RC1458T
RC1556T
RC1558T
RC3302DB
RC4131DP
MC1458G
MC1456CG
MC1558G
MC3302P
SE533G
SE533T
SE537G
SE537T
SE550L
OP-27GZ
OP-27GP
OP-27GZ
MC1733C
MC1741SCPl
2-124
2-118
2-124
2-57
2-161
RC4131T
RC4136D
RC4136DP
RC4136J
RC4136N
MC1741SG
MC3403L
MC3403P
MC3403L
MC3403P
2-161
2-199
2-199
2-199
2-199
SE556A
SE592A
SE592K
SE5561FE
SG100T
RC4194DC
RC4195NB
RC4195T
RC4558DN
RC4558JG
MC1468L
MC1468L
MC1468G
MC4558CPl
MC4558CU
3-105
3-105
3-105
2-232
2-232
SG101AD
SG101AT
SG101J
SG10n
SG107J
RC4558L
RC4558P
RC4558T
RC75107AD
RC75107ADP
MC4558CG
MC4558CPl
MC4558CG
MC75107L
MC75107P
2-232
2-232
2-232
7-171
7-171
SG107T
SG108AJ
SG108AT
SG108J
SG108T
RC75108AD
RC75108ADP
RC75109D
RC75109DP
RC75110D
MC75108L
MC75108P
7-171
7-171
7-176
7-176
7-176
SG109K
SG109R
SG109T
SGlllD
SGll1T
MC75S110L
MC75S110P
MC75S110L
MC3503L
MC3503L
MC1568L
MC1568G
2-161
11-4
2-153
2-100
2-100
MC1776G
MC1776G
MC1556G
MC1556G
MC1723G
2-180
2-180
2-118
2-118
3-111
MC35060L
MC1723G
11-40
2-303
2-303
3-185
3-111
LM101AH
LM101AH
LM101AH
LM101AH
MC1741
MC1741
LM108AJ
LM108AH
LM108J
LM108H
LM109K
LM109K
MOTOROLA LINEAR/INTERFACE DEVICES
1-16
MC1733G
MC1539G
MC1539G
MC3556L
SE592L
SE592G
LM109H
LMlllJ
LMlllH
2-88
2-96
2-199
2-199
3-105
2-36
2-36
2-36
2-36
2-161
2-161
2-40
2-40
2-40
2-40
3-15
3-15
3-15
2-45
2-45
CROSS REFERENCE Part Number
SGl17K
SGl17R
SGll7T
SGllBT
SG123K
Motorola
Direct
Replacement
LMl17K
LMl17K
MC1741SG
LM123K
LM124J
LM137K
SG140K-OB
SG140K-12
SG140K-15
SG150K
SG200T
LM140K-B.0
LM140K-12
LM140K-15
LM150K
SG201M
SG201N
SG201T
SG207J
SG207M
SG207N
SG207T
SG20BAJ
SG20BAM
SG20BAT
LM137K
LM137H
LM140K-5.0
MC1723G
LM201AH
LM201AN
LM201AN
LM201AH
LM201AH
LM201AN
LM201AN
LM201AH
MC1741C
MC1741C
MC1741C
MC1741C
LM20BAJ
LM20BAJ-B
LM20BAH
SG20BJ
SG20BM
SG20BT
SG209K
SG209R
LM20BJ
LM20BJ-B
LM20BH
LM209K
SG209T
SG2110
SG211M
SG211T
SG217K
LM209H
LM211J-B
LM211J-B
LM211H
LM217K
SG217R
SG217T
SG21BJ
SG21BM
SG21BT
LM209K
SG237T
SG250K
SG300N
SG300T
SG301AO
LM237H
LM250K
SG301AM
SG301AN
SG301AT
SG307J
SG307M
LM301AN
3-20
3-20
3-20
2-166
2-161
3-20
3-20
3-20
2-166
3-36
SG317P
SG317R
SG317T
SG318J
SG31BM
2-51
3-42
3-42
3-42
3-49
SG318T
SG324J
SG324N
SG337K
SG337P
LM324J
LM324N
LM337K
LM337T
3-49
3-49
3-49
3-65
3-111
SG337R
SG337T
SG340K-05
SG340K-OB
SG340K-12
LM337H
LM340K-,,5.0
LM340K-B.0
LM340K-12
2-36
2-36
2-36
2-36
2-36
SG34OK-24
SG350K
SG501AJ
SG555CM
SG555CT
2-36
2-36
2-36
2-161
2-161
SG556CJ
SG556CN
SG556J
SG556N
SG723CO
2-161
2-161
2-40
2-40
2-40
SG723CJ
SG723CN
SG723CT
SG7230
SG723J
MC1723CL
MC1723CP
MCl723CG
2-40
2-40
2-40
3-15
3-15
SG723T
SG733CO
SG733CN
SG733CT
SG7330
MC1723G
MC1733CP
MC1733CG
MC1733L
SG733N
SG733T
SG741CM
SG741CT
SG741SCM
MC1733G
MC1741CPl
MC1741CG
MC1741SCPl
2-153
2-153
2-161
2-161
2-166
SG741SCT
SG741ST
SG741T
SG747CJ
SG747CN
MC1741SCG
MC1741SG
MC1741G
MC1747CL
MC1747CP2
2-166
2-166
2-161
2-172
2-172
MC1747CG
2-172
2-172
2-172
2-176
2-176
LM317T
LM317T
LM317H
MC1741SCL
MC1741CPl
MC1741CG
2-161
2-51
2-51
3-42
3-42
LM337T
3-42
3-42
3-49
3-49
3-49
LM340K-24
LM350K
MC146BG
MC1455Pl
MC1455G
MC3456L
MC3456P
MC3556L
MC3556L
MC1723CL
MC1723L
MC1723L
MC1733CL
MC1733L
3-49
3-65
3-105
11-4
11-4
11-40
11-40
11-40
11-40
3-111
3-111
3-111
3-111
3-111
3-111
3-111
2-153
2-153
2-153
2-153
LM237K
MC1723CP
MCl723CG
LM301AH
3-42
3-65
3-111
3-111
2-36
SG748CN
SG748CT
SG74BO
SG74BT
SG777CJ
LM308AJ
2-176
2-176
2-176
2-176
2-40
2-36
2-36
2-36
2-7B
2-7B
SG777CM
SG777CN
SG777CT
SG777J
SG777T
LM30BAN
LM30BAN
LM308AH
LM108AJ
LM10BAH
2-40
2-40
2-40
2-40
2-40
2-7B
2-40
2-40
2-40
2-40
SG111BAJ
SG111BAT
SG1118J
SG111BT
SG1217
LM108AJ
2-40
2-40
2-40
2-40
2-161
2-40
2-40
3-15
3-15
3-15
SG1217T
SG1250T
SG1402N
SG1402T
SG1436CT
MC1741SG
MCl776G
MC1594L
MC1594L
MC1436CG
2-166
2-180
11-11
11-11
2-92
3-15
2-45
2-45
2-45
3-20
SG1436M
SG1436T
SG1456CT
SG1456T
SG145BM
MC1436U
MC1436G
MC1456CG
MC1456G
MC145BP1
2-92
2-92
2-11B
2-11B
2-124
LM307N
LM307N
LM30BAJ
LM30BAN
LM30BAH
LM30BJ
LM309H
LM311J
LM311N
LM311H
LM317K
Page
SG747CT
SG747J
SG747T
SG74BCO
SG748CM
LM307N
SG309T
SG3110
SG311M
SG311T
SG317K
Motorola
Similar
Replacement
3-36
2-51
2-51
3-42
3-42
LM301AH
LM30BN
LM30BH
LM309K
Motorola
Direct
Replacement
3-20
3-20
2-166
2-166
2-166
LM301AN
SG30BM
SG30BT
SG309K
SG309P
SG309R
Part Number
MC1741SL
MC1741SL
MC1741SG
LM217K
LM223K
LM224J
LM224N
LM237K
Page
3-15
2-45
2-45
2-45
3-20
LM217H
SG223K
SG224J
SG224N
SG237K
SG237R
SG307N
SG30BAJ
SG30BAM
SG30BAT
SG30BJ
Motorola
Similar
Replacement
LMl17H
SG124J
SG137K
SG137R
SG137T
SG140K-05
SG201AO
SG201AM
SG201AN
SG201AT
SG201J
CONTINUED
LM309K
LM309K
MC1747L
MC1747G
MC1748CPl
MC1748CP1
MC1748CPl
MC1748CG
MC1748G
MC1748G
LM108AH
LM10BJ
L'M108H
MC1741G
MOTOROLA LlNEARIINTERFACE DEVICES
1-17
..
CROSS REFERENCE Part Number
SG1458T
SG1468J
SG1468N
SG1468T
SG1495D
SG1495N
SG1496D
SG1496N
SG1496T
SG1501AD
SG1501AJ
SG1501AT
SG1501J
SG150H
SG1502D
SG1502J
SG1502N
SG1503
SG1503T
SG1503Y
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
MC1458G
MC1468l
MC1468l
MC1468G
MC1495l
MC1495L
MC1496l
MC1496l
MC1496G
MC1568l
MC1568l
MC1568G
MC1568l
MC1568G
MC1568L
MC1568l
MC1568L
MC1503U
MC1503U
MC1503U
SG1524J
Page
SG3501AJ
SG3501AN
SG3501AT
SG3501J
SG3501D
11-25
8-13
8-13
8-13
3-105
SG3501N
SG350n
SG3502D
SG3502G
SG3502J
3-105
3-105
3-105
3-105
3-105
SG3502N
SG3503
SG3503M
SG3503T
SG3503Y
MC1403U
3-105
3-105
5-8
5-8
5-8
SG3523Y
SG3524J
SG3525AJ
SG3525AN
SG3526J
SG3525AJ
SG3525AN
SG3526J
SG1525AJ
SG1526J
SG1527AJ
SG1536T
SG1526J
SG1527AJ
MC1536G
3-312
3-279
3-286
3-279
2-92
SG1556T
SG1558T
SG1568J
SG1568T
SG1595D
MC1556G
MC1558G
MC1568l
MC1568G
MC1595l
2-118
2-124
3-105
3-105
11-25
SG1596D
SG1596T
SG1660D
SG1660J
SG1660M
MC1596l
MC1596G
lM301AH
lM308J
lM308N
8-13
8-13
2-36
2-40
2-40
SG1760T
SG2118AJ
lM308H
lM308J
LM308N
lM308H
lM208AJ
2-40
2-40
2-40
2-40
2-40
SG2118AM
SG2118AT
SG2118J
SG2118M
SG2118T
lM208AJ-8
lM208AH
lM208J
lM208J-8
lM208H
2-40
2-40
2-40
2-40
2-40
SG2250T
SG2402N
SG2402T
SG2501AD
SG2501AT
MC1776G
MC1494l
MC1494L
MC146Bl
MC1468G
SG1660T
SG1760J
SG176QM
SG250m
SG2501J
SG2501N
SG250H
SG2502J
MC1468l
MC1468l
MC1468L
MC1468G
MC1468L
SG2502N
SG2503M
SG2503T
SG2503Y
SG2524J
SG2525AJ
SG2526J
SG2527AJ
SG3118AJ
SG3118AM
MC1468l
MC1403AU
MC1403AU
MC1403AU
Tl4941J
SG2525AJ
SG2526J
SG2527AJ
lM308AJ
lM308AN
Motorola
Direct
Replacemenl
2-124
3-105
3-105
3-105
11-25
SG1525AJ
Tl494MJ
Part Number
SG3527AJ
SG3527AN
SG4194CJ
SG4194J
SG4250CM
SG4250CT
SG4250T
SG4501D
SG4501J
SG4501N
SG450n
SG7805ACK
SG7805ACP
SG7B05ACR
SG7805ACT
SG7805AK
SG7B05AR
SG7805AT
SG7805CK
SG7805CP
SG7805CR
SG7805CT
SG7805K
SG7805R
SG7805T
SG7806ACP
SG7806ACR
SG7806ACT
SG7806CK
SG7806CP
2-180
11-11
11-11
3-105
3-105
SG7806CR
SG7806K
SG7806R
SG7806T
SG7808ACP
3-105
3-105
3-105
3-105
3-105
SG7808ACR
SG7808ACT
SG7808CK
SG7808CP
SG7808CR
3-105
5-8
5-8
5-8
3-312
SG7808CT
SG7808K
SG7808R
SG7B08T
SG7812ACK
3-279
3-286
3-279
2-40
2-40
SG3118AT
SG3118J
SG3118M
SG311BT
SG3250T
lM308AH
lM308J
lM308N
lM308H
MC1776G
2-40
2-40
2-40
2-40
2-180
SG3402N
SG3402T
SG3423M
SG3423Y
SG3501AD
MC1494l
MC1494l
MC3423P1
MC3423U
MC1468l
11-11
11-11
3-117
3-117
3-105
SG7812ACP
SG7812ACR
SG7812ACT
SG7812AK
SG7812AR
SG7812AT
SG7812CK
SG7812CP
SG7812CR
SG7812CT
Page
MC1468l
MC1468l
MC1468G
MC1468l
MC1468l
3-105
3-105
3-105
3-105
3-105
MC1468l
3-105
3-105
3-105
3-105
3-105
MC1468G
MC1468l
MC1468G
MC1468L
MC1468l
MC1403U
MC1403U
MC1403U
MC3523U
Tl494CJ
3-105
5-8
5-8
5-8
5-8
3-117
3-312
3-279
3-279
3-286
3-279
3-279
SG3527AJ
SG3527AN
MC1468L
MC1568l
MC1776CP1
MC1776CG
MC1776G
MC1468l
MC1468l
MC1468l
MC1468G
MC7805ACK
MC7805ACT
MC7805ACT
MC7805ACT
MC7805AK
MC7805AK
MC7805AK
MC7805CK
MC7805CT
MC7805CT
MC78M05CG
MC7805K
MC7B05K
MC7805K
MC7B06ACT
MC7806ACT
MC7806ACT
MC7806CK
MC7806CT
MC7806CT
MC7806K
MC7806K
MC7806K
MC7808ACT
MC78MOBACT
MC7808ACT
MC7808CK
MC7808CT
MC7808CT
MC78M18CG
MC7808K
MC7808K
MC7808K
MC7812ACK
MC7812ACT
MC7812ACT
MC7812ACT
MC7812AK
MC7812AK
MC7812AK
MC7812CK
MC7812CT
MOTOROLA LINEAR/INTERFACE DEVICES
1-18
Motorola
Similar
Replacement
MC7812CT
MC78M12CG
3-105
3-105
2-180
2-180
2-180
3-105
3-105
3-105
3-105
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-151
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-151
3-132
3-132
3-132
3-132
3-151
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-132
3-151
CROSS REFERENCE Part Number
SG7812K
SG7815ACK
SG7815ACP
SG7815ACR
SG7815ACT
MC7812K
MC7815ACK
MC7815ACT
SG7815AK
SG7815AR
SG7815AT
SG7815CK
SG7815CP
MC7815AK
SG7815CR
SG7815CT
SG7815K
SG7815R
SG7815T
SG7818ACK
SG7818ACP
SG7818ACR
SG7818ACT
SG7818AK
SG7818AR
SG7818AT
SG7818CK
SG7818CP
SG7818CR
SG7818CT
SG7818K
SG7818R
SG7818T
SG7824ACP
SG7824ACR
SG7824ACT
SG7824CK
SG7824CP
SG7824CR
SG7824K
SG7824R
SG7824T
SG7905ACK
SG7905ACP
SG7905ACR
SG7905ACT
SG7905CK
SG7905CP
SG7905CR
SG7905CT
SG7905.2CP
SG7905.2CR
SG7905.2CT
SG7908CP
SG7908CR
SG7908CT
SG7912ACK
SG7912ACP
SG7912ACR
SG7912ACT
SG7912CK
SG7912CP
SG7912CR
SG7912CT
Motorola
Similar
Replacement
MC7815ACT
MC7815ACT
MC7815AK
MC7815AK
MC7815CK
MC7815CT
MC7815CT
MC78M15CG
MC7815K
MC7815K
MC7815K
MC7818ACK
MC7818ACT
MC7818ACT
MC7818ACT
MC7818AK
MC7818AK
MC7818AK
MC7818CK
MC7818CT
MC7818CT
MC78M18CG
MC7818K
MC7818K
MC7818K
MC7824ACT
MC7824ACT
MC7824ACT
MC7824CK
MC7824CT
MC7824CT
MC7824K
MC7824K
MC7824K
MC7905ACK
MC7905ACT
MC7905ACT
MC7905ACT
MC7905CK
MC7905CT
MC7905CT
MC7905CT
MC7905.2CT
MC7905.2CT
MC7905.2CT
MC7908CT
MC7908CT
MC7908CT
MC7912ACK
MC7912ACT
MC7912ACT
MC7912ACT
MC7912CK
MC7912CT
MC7912CT
MC7912CT
SG7915ACK
SG7915ACP
SG7915ACR
SG7915ACT
SG7915CK
MC7915ACK
MC7915ACT
SG7915CP
SG7915CR
SG7915CT
SG7918CP
SH323SKC
MC7915CT
SH8090FM
SN52101AL
SN52104L
SN52107L
SN52108AL
CONTINUED
Motorola
Direct
Replacement
MC7915ACT
MC7915ACT
MC7915CK
MC7915CT
MC7915CT
MC7918CT
LM323K
MC1508L8
LM101AH
LM101H
MC1741
LM108AH
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
3-132
3-132
3-132
3-132
3-132
SN52108L
SN52109L
SN52514J
SN75107AJ
SN75107AN
3-132
3-132
3-132
3-132
3-132
SN75107BN
SN75108AJ
SN75108AN
SN75108BJ
3-132
3-151
3-132
3-132
3-132
SN75108BN
SN75110AJ
SN75110AN
SN75121J
SN75121N
3-132
3-132
3-132
3-132
3-132
SN75122J
2N75122N
SN75125J
SN75125N
SN75126J
3-132
3-132
3-132
3-132
3-132
SN75126N
SN75127J
SN75127N
SN75128J
SN75128N
3-151
3-132
3-132
3-132
3-132
SN75129J
SN75129N
SN75150J
SN75150N
SN75154J
3-132
3-132
3-132
3-132
3-132
SN75154N
SN75160J
SN75160N
SN75172J
SN75172NG
SN75172JSN75172NG-
SN75173J
SN75173N
SN75174J
SN75174NG
SN75175J
SN75173J
SN75173N
SN75174JSN75174NGSN75175J
SN75175N
SN75188N
SN75188N3
SN75175N
MC14BBL
MC1488P
MC14BBPDS
7-191
7-37
7-37
7-37
SN75189AJ
SN75189AJ4
SN75189AN
SN75189J
SN75189J4
MC1489AL
MC14B9ALDS
MC1489AP
MC1489L
MC1489LDS
7-43
7-43
7-43
7-43
7-43
SN75189N
SN75189N3
SN75207J
SN75207N
SN75208J
MC1489P
MC1489PDS
SN75107BJ
3-132
3-132
3-132
3-168
3-168
3-168
3-168
3-168
3-168
3-168
SN751BBJ
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
SN75208N
SN75251N
SN75466J
SN75466N
SN75467J
3-168
3-168
3-168
3-168
3-168
SN75467N
SN75468J
SN75468N
3-168
3-168
3-168
3-168
3-168
SN75475JG
SN75475P
SN76514L
SN76514N
SN76564N
SN76565N
SN76591P
3-168
3-168
3-168
3-168
3-36
SN76600P
SN76665N
SSS101AL
SSS101AJ
SSS107J
SSS107P
SSS201AJ
6-15
2-36
2-36
2-161
2-40
MC75107L
MC75107P
MC75108L
MC75108P
MC75108L
MC75108P
MC75S110L
MC75S110P
MC3481/5L
MC348115P
MC75125L
MC75125P
MC3481/5L
MC3481/5P
MC75127L
MC75127P
MC75128L
MC75128P
MC75129L
MC75129P
MC1488L
MC1488P
MC1489L
MC1489P
MC3447L
MC3447P/P3
7-171
7-171
7-171
7-171
7-171
7-171
7-176
7-176
7-137
7-137
7-181
7-181
7-181
7-181
7-137
7-137
7-181
7-181
7-185
7-185
7-185
7-185
7-37
7-37
7-43
7-43
7-61
7-61
7-189
7-189
7-191
7-191
7-189
7-1B9
7-191
MC75107L
MC75107P
MC75108L
7-43
7-43
7-171
7-171
7-171
MC1411L
MC1411P
MC1412L
7-171
7-112
7-30
7-30
7-30
MC1412P
MC1413L
MC1413P
MC1472U
MC1472P1
7-30
7-30
7-30
7-34
7-34
MC75108P
MC3471P
MC1496G
MC13010P
MC13010P
MC1391P
MC1350P
MC13010P
LM101AH
LM101AH
MC1741
MC1741
LM201AH
MOTOROLA LINEAR/INTERFACE DEVICES
8-13
B-13
MC1496P
*To be introduced
1-19
2-40
3-15
2-68
7-171
7-171
LM108H
LM109H
MC1514L
MC75107L
MC75107P
9-73
9-73
9-35
9-15
9-73
2-36
2-36
2-161
2-161
2-36
..
CROSS REFERENCE -
CONTINUED
Motorola
Part Number
Direct
Replacement
SSS201AL
SSS201AP
SSS207J
SSS207P
SSS301AJ
SSS301AL
SSS301AP
SSS741BJ
SSS741CJ
SSS741GJ
SSS741GP
SSS741J
2-36
2-36
MC1741C
MC1741C
2-161
2-161
2-36
2-36
2-36
LM301AH
LM301AN
MC1741SG
MC1741G
2-161
2-161
2-166
2-166
2-161
MC1747L
MC1747CG
MC1747CF
MC1747CL
MC1747G
2-172
2-172
2-172
2-172
2-172
MC1747L
MC1747L
2-172
2-172
6-15
6-15
6-15
MC1741G
MC1741CG
MC1741SG
SSS747BP
SSS747CK
Page
LM201AH
LM201AN
LM301AH
SSS747CM
SSS747CP
SSS747GK
SSS747GP
SSS74?P
SSS1408A-6Z
SSS1408A-7Z
SSS1408A-8Z
Motorola
Similar
Replacement
MC1408L6
MC1408L7
MC1408L8
MC78L05ACP
MC78L05CP
2-124
6-15
2-124
3-145
3-145
TA78L012P
MC78L08ACP
MC78L08CP
MC78L12ACP
MC78L 12CP
3-145
3-145
3-145
3-145
TA78L015AP
TA78L015P
TA78L018AP
TA78L018P
TA78L024AP
MC78L15ACP
MC78L15CP
MC78L18ACP
MC78L 18CP
MC78L24ACP
3-145
3-145
3-145
3-145
3-145
MC78L24CP
3-145
3-151
3-151
3-151
3-151
SSS1458J
SSS1508A-8Z
SSS1558J
TA78L005AP
TA78L005P
MC1458G
MC1508L8
MC1558G
TA78L008AP
TA78L008P
TA78L012AP
TA78L024P
TA78M05P
TA78M06P
TA78M08P
TA78M12P
TA78M18P
TA78M20P
TA78M24P
TA79L005P
TA79L012P
TA79L015P
TA79L018P
TA79L024P
TA7179P
TA7502P
TA7504P
TA7506P
TA7555F
TA7555P
TA75071P
MC78M05CT
MC78M06CT
MC78M08CT
MC78M12CT
MC78M18CT
MC78M20CT
MC78M24CT
MC79L05CP
MC79L 12P
MC79L 15P
MC79L18P
MC79L24P
MC1468L
MC1709Pl
MC1741CPl
LM301AN
MCl455D
MC1455P1
MC34001P
Motorola
Oirect
Replacement
Motorola
Similar
Replacement
Page
TA78024AP
TA79005P
TA79006P
TA79008P
TA79012P
MC7824CT
MC7905CT
MC7906CT
MC7908CT
MC7912CT
3-132
3-168
3-168
3-168
3-168
TA79015P
MC7915CT
MC7918CT
MC7924CT
3-168
3-168
3-168
9-137
9-73
TA79018P
TA79024P
TBA120
TBA440
TB920
TBA920S
TBA1440
TD62001 P/AP
TD62002P/AP
TD62003P/AP
TD62004P/AP
TD62477P
TD62479P
TDA1085
TDA1524
TDA2540
TDA2544
TDA4420
TDA4500A
TDA4601
TDA4601B
TBA120C
MC13010P
MC1391P
MC1391P
MC13010P
MC1411P
MC1412P
MC1413P
MC1414P
MC1472P
MC1374P
TDA1085C
TCA5550
9-35
9-35
9-73
7-30
7-30
7-30
2-88
7-34
9-19
4-71
9-149
MC13010P
MC13010P
MC13010P
9-73
9-73
9-73
9-142
3-305
3-305
TDA5600
TDC1048
TL022CJG
TL022CL
TL022CP
MC13010P
MC10319
LM358J
LM358H
LM358N
9-73
6-62
2-67
2-67
2-67
TL022MJG
TL022ML
TL044CJ
TL044CN
TL044MJ
LM158J
2-67
2-67
2-51
2-51
2-51
TCA4500A
TDA4601
TDA4601B
LM158H
LM324J
LM324N
LM124J
TL061ACD
TL061ACP
TL061 BCD
TL061BCP
TL061CD
TL061ACD
TL061ACP
TL061 BCD
TL061BCP
TL061CD
2-320
2-320
2-320
2-320
2-320
3-151
3-151
3-151
3-177
3-177
TL061CP
TL061MJG
TL062ACD
TL062ACP
TL062BCD
TL061CP
TL061MJG
TL062ACD
TL062ACP
TL062BCD
2-320
2-320
2-320
2-320
2-320
3-177
3-177
3-177
3-105
2-149
TL062BCP
TL062CD
TL062CP
TL062MJG
TL064ACD
TL062BCP
TL062CD
TL062CP
TL062MJG
TL064ACD
2-320
2-320
2-320
2-320
2-320
TL064ACN
TL064BCD
TL064BCN
TL064CD
TL064CN
TL064ACN
TL064BCD
TL064BCN
TL064CD
TL064CN
2-320
2-320
2-320
2-320
2-320
TL064MJ
TL071 ACJG
TL071ACP
TL071 BCJG
TL071BCP
TL064MJ
TL071 ACJG
TL071ACP
TL071 BCJG
TL071BCP
2-320
2-328
2-328
2-328
2-328
TL071CJG
TL071CP
TL072ACJG
TL072ACP
TL072BCJG
TL071CJG
TL071CP
TL072ACJG
TL072ACP
TL072BCJG
2-328
2-328
2-328
2-328
2-328
TL072BCP
TL072CJG
TL072CP
TL074ACJ
TL074ACN
TL072BCP
TL072CJG
TL072CP
TL074ACJ
TL074ACN
2-328
2-328
2-328
2-328
2-328
TL074BCJ
TL074BCN
TL074CJ
TL074CN
TL081ACJG
TL074BCJ
TL074BCN
TL074CJ
TL074CN
TL081ACJG
2-328
2-328
2-328
2-328
2-335
2-161
2-36
11-4
11-4
2-260
TA75072P
TA75074F
TA 75339F
TA75339P
TA75358CF
LM339D
LM339N
LM358D
TA75358CP
TA75393F
TA75393P
TA75458F
TA75458P
LM358N
LM393D
LM393N
MC1458D
MC1458CPl
TA75558P
TA75902F
TA75902P
TA76494P
TA78005AP
MC4558CPl
LM324D
LM324N
MC7805CT
2-232
2-51
2-51
3-312
3-132
TA78006AP
TA78008AP
TA78012AP
TA78015AP
TA78018AP
MC7806CT
MC7808CT
MC7812CT
MC7815CT
MC7818CT
3-132
3-132
3-132
3-132
3-132
MC34002P
MC34004P
LM2901D
LM2901N
2-260
2-260
2-57
2-57
2-67
LM2904N
LM2903D
LM2903N
2-67
2-73
2-73
2-124
2-124
LM2902D
LM2902N
TL4941N
Part Number
MOTOROLA LINEAR/INTERFACE DEVICES
1-20
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Motorola
Page
TL081ACP
TL081BCJG
TL081BCP
TL081CJG
TL081CP
TL081ACP
TL081 BCJG
TL081BCP
TL081CJG
TL081CP
2-335
2-335
2-335
2-335
2-335
TL082ACJG
TL082ACP
TL082BCJG
TL082BCP
TL082CJG
TLOB2ACJG
TL082ACP
TL082BCJG
TL082BCP
TLOB2CJG
2-335
2-335
2-335
2-335
2-335
TL082CP
TL084ACJ
TL084ACN
TL084BCJ
TL084BCN
TL082CP
TL084ACJ
TLOB4ACN
TL084BCJ
TLQ84BCN
2-335
2-335
2-335
2-335
2-335
TL084CJ
TL084CN
TL431CJG
TL431CLP
TL431CP
TL084CJ
TL084CN
TL431CJG
TL431CLP
TL431CP
2-335
2-335
5-17
5-17
5-17
TL4311JG
TL4311P
TL4311JG
TL4311P
TL4311LP
TL4311LP
TL431MJG
TL494CJ
TL431MJG
TL494CJ
5-17
5-17
5-17
5-17
3-312
TL494CN
TL4941J
TL4941N
TL494MJ
TL497CJ
TL494CN
TL4941J
TL4941N
TL494MJ
MC34063U
3-312
3-312
3-312
3-312
3-227
TL497CN
TL497MJ
TL514MJ
TL594CN
TL5941N
MC1514L
TL594CN
TL5941N
3-227
3-227
2-88
3-323
3-323
TL594MJ
TL780-05CKC
TL7BO-12CKC
TL780-15CKC
TL7805ACKC
TL594MJ
TL 780-05CKC
TL780-12CKC
TL780-15CKC
MC7805ACT
3-323
3-334
3-334
3-334
3-132
IJCl17K
UC137K
. UC150K
UC217K
UC237K
LMl17K
LM137K
LM150K
LM217K
LM237K
3-20
3-42
3-65
3-20
3-42
UC250K
UC317K
UC317T
UC337K
UC337T
LM250K
LM317K
LM317T
LM337K
LM337T
3-65
3-20
3-20
3-42
3-42
UC350K
UC494ACN
UC494AJ
UC494CN
UC494J
LM350K
3-65
3-323
3-323
3-312
3-312
UC1525AJ
UC1526J
UC1527AJ
UC2525AJ
SG1525AJ
SG1526J
SG1527AJ
SG2525AJ
3-279
3-286
3-279
3-279
UC2526J
UC2526N
UC2527AJ
UC2842D
SG2526J
SG2526N
SG2527AJ
UC2842AD
3-286
3-286
3-279
3-340
UC2842N
UC2843D
UC2843N
UC3525AJ
UC3525AN
UC2842AN
UC2843AD
UC2843AN
SG3525AJ
SG3525AN
3-340
3-340
3-340
3-279
3-279
UC3526J
UC3526N
UC3527AJ
UC3527AN
UC3842D
SG3526J
SG3526N
SG3527AJ
SG3527AN
UC3842AD
3-286
3-286
3-279
3-279
3-340
UC3842N
UC3843D
UC384~AN
UC3843AD
3-340
3-340
MC34063Pl
MC35063U
TL594CN
TL594MJ
TL494CN
TL494MJ
Part Number
Direct
Replacement
Motorola
Similar
Replacement
Page
3-340
7-34
7-30
UC3843N
UDN5712M
ULN2001A
UC3843AN
MC1472Pl
ULN2001A
ULN2001AN
ULN2002A
ULN2002AJ
ULN2002AN
ULN2003A
MC1411P
ULN2002A
MC1412L
MC1412P
ULN2003A
ULN2003AJ
ULN2003AJ4
ULN2003AN
ULN2003AN3
ULN2004A
MC1413L
MC1413LDS
MC1413P
MC1413PDS
ULN2004A
ULN2004AJ
ULN2004AJ4
ULN2004AN
ULN2004AN3
ULN2068B
MC1416L
MC1416LDS
MC1416P
MC1416PDS
ULN2068B
7-30
7-30
7-30
7-30
7-200
ULN2068NE
ULN2074B
ULN2074NE
ULN2139D
ULN2139G
ULN2068B
ULN2074B
ULN2074B
MC1439G
MC1439G
7-200
7-204
7-204
2-100
2-100
ULN2139H
ULN2139M
ULN2151D
ULN2151H
ULN2151M
MC1439P2
MC1439Pl
MC1741CG
MC1741CPl
MC1741CPl
2-100
2-100
2-161
2-161
2-161
ULN2156D
ULN2156G
ULN2156H
ULN2156M
ULN2157K
MC1456G
MC1456G
MC1456G
MC1456G
MC1458G
2-118
2-118
2-118
2-118
2-124
ULN2264A
ULN2741D
ULN2747A
ULN2801A
MC13010P
MC1741CG
MC1747CL
ULN2801A
9-73
2-161
2-172
7-208
ULN2802A
ULN2803A
ULN2804A
ULN8126A
ULN8126R
ULN2802A
ULN2803A
ULN2804A
SG3526N
SG3526J
7-208
7-208
7-208
3-286
3-286
UL08126A
UL08126R
ULS2139D
ULS2139G
ULS2139H
SG2526N
SG2526J
MC1411P
MC1413P
7-30
7-30
7-30
7-30
7-30
MC1416P
7-30
7-30
7-30
7-30
7-30
MC1412P
MC1539G
MC1539G
MC1539L
3-286
3-286
2-100
2-100
2-100
ULS2139M
ULS2151D
ULS2151M
ULS2156D
ULS2156G
MCl439Pl
MC1741G
MC1741CPl
MC1556G
MC1556G
2-100
2-161
2-161
2-118
2-118
ULS2156H
ULS2156M
ULS2157A
ULS2157H
ULS2157K
MC1556G
MC1556G
MC1558U
MC1558U
MC1558G
2-118
2-118
2-124
2-124
2-124
MC34060P
MC10319
MC10319
ULS8126R
ULX8161M
UPD6950C
UVC3101
XR082CN
SG1526J
TL082CJG
3-286
3-185
6-62
6-62
2-335
XA082CP
XA082M
XR084CN
XR084CP
XR084M
TL082CP
TL082MJG
TL084CJ
TL084CN
TL084MJ
2-335
2-335
2-335
2-335
2-335
XR3470A
"A0802DC-l
"A0802DC-2
"A0802DC-3
"AOB02DM-l
MC3470AP
MCl408L
MCl408L
MC1408L
MC1508L
7-98
6-15
6-15
6-15
6-15
"A0802PC-l
"A0802PC-2
"A0802PC-3
"A78GHM
"A78GKC
MC1408P
MC1408P
MC1408P
6-15
6-15
6-15
3-20
3-20
MOTOROLA LINEAR/INTERFACE DEVICES
1-21
LMl17K
LMl17K
•
CROSS REFERENCE Part Number
Motorola
Direct
Replacement
pA78GKM
pA78GUC
pA78GU1C
pA78H05KC
pA 78l05ACJG
MC78l05ACP
MC78l05ACG
pA78l05HC
pA78l05WC
pA78l08ACJG
pA 78l08AClP
pA78l08AWC
MC78l05CG
MC78l05ACP
MC78l05CG
MC78l05CP
MC78l05CP
MC78l08ACG
MC78l08ACP
MC78l08ACP
MC78l08CG
MC78l08CP
MC78L12ACG
MC78L12ACP
MC78l12ACG
pA78L12AWC
pA78L12CJG
p,A78L 12CLP
pA78L12HC
pA78L12WC
pA 78L15ACJG
pA 78l 15AClP
pA78l15AHC
pA78l15AWC
pA78l15CJG
MC78l12ACP
MC78l12CG
MC78L12CP
MC78l12CG
MC78l12CP
MC78l15ACG
MC78L15ACP
MC78l15ACG
MC78L15ACP
MC78l15CG
pA78L15ClP
IJ..A76L 15HC
pA78l15WC
pA78L18AWC
pA78l24AHC
MC78l15CP
MC78l15CG
pA78l24AWC
pA78MGT2C
pA78MGU1C
pA78MGUC
pA78M05CKC
MC78l24ACP
pA78M05CKD
pA78M05ClA
pA78M05HC
pA78M05HM
pA78M05UC
pA78M06CKC
pA78M06CKD
pA78M06UC
pA78M08CKC
pA78M08CKD
pA78M08ClA
pA78M08HC
pA78M08HM
pA78M08UC
pA78M12CKC
MC78L15CP
MC78l18ACP
MC78l24ACG
lM317T
lM317T
lM317MT
MC78M05CT
MC78M05CT
MC78M05CG
MC78M05CG
MC78M05CG
MC78M05CT
MC78M06CT
MC78M06CT
MC78M06CT
MC78MOBCT
MC78M08CT
MC78M08CG
MC78M08CG
MC78M08CG
MC7BMOBCT
MC78M12CT
pA78M12CKD
MC78M12CT
pA78M12HC
MC78M12CG
MC78M12CG
JlA78M12HM
,uA78M12UC
MC78M12CT
p,A78M12CLA
MC7BM12CG
pA78M15CKC
pA7BM15CKD
pA78M15ClA
pA78M15HC
pA78M15HM
MC78M15CT
pA78M15UC
pA78M18HC
pA78M18HM
pA78M18UG
pA78M20CKC
MC78M15CT
MC78M18CG
pA78M20CKD
pA78M20UG
pA78M24CKC
pA78M24CKD
pA78M24UC
pA78S40DC
pA78S40DM
pA78S40PC
Motorol.
Similar
Replacement
lM117K
lM317T
lM317T
MC7805CK
MC78l05ACG
pA 78l05AClP
pA78l05AHC
pA78l05AWC
pA78l05CJG
pA78l05ClP
pA78l08CJG
pA78l08ClP
pA78l12ACJG
pA 78L12AClP
pA78l12AHC
CONTINUED
MC78M15CT
MC78M15CG
MC78M15CG
MC78M15CG
MC78M18CG
MC78M18CT
MC78M20CT
Page
3-20
3-20
3-20
3-132
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
3-145
pA79l12HC
pA79l12WC
pA79l15AHC
pA79l15AWC
pA79l15HC
MC79L12CG
MC79l12CP
MC79L15ACG
MC79L15ACP
MC79l15CG
3-177
3-177
3-177
3-177
3-177
pA79l15WC
pA79M05AUC
MC79L15CP
MC79M05CT
MC79M05CT
3-177
3-182
3-182
3-168
3-132
pA79M06AUC
pA79M06CKC
MC7906CT
MC7806CT
pA79M06UC
pA79M08AUC
pA79M08CKC
pA79M08UC
pA79M12AUC
MC7906CT
MC7908CT
MC7908CT
MC7908CT
MC79M12CT
pA79M18AUC
p.A79M18UC
MC7918CT
MC7918CT
p.A79M24AUC
MC7924CT
MC7924CT
MC7924CT
lM101AJ
LM101AJ
3-168
3-168
3-168
2-36
2-36
MC79M12CT
pA79M15AUC
MC79M15CT
MC79M15CT
LM101AH
lM101AJ
lM101AJ
.u A1 0 1H
,uAl07H
lM101AH
}lAl0BAD
,uAl0BAF
lM108AJ
p.Al08AH
pA108D
lM108AH
lM10BJ
lM108H
pA109KM
J.lA117KM
pA201AD
MC1741
lM108AH
lM109K
LMl17K
lM201AJ
lM201AJ
p,A201AF
pA201AH
lM201AH
,uA201D
pA201 F
/--IA201H
pA207H
pA208AD
lM201AH
pA208AF
pA208AH
pA208D
pA208H
pA209KM
3-151
3-151
3-151
3-151
3-151
lM201AJ
LM201AJ
MC1741C
lM208AJ
3-151
3-151
3-151
3-151
3-151
2-40
2-40
2-40
2-40
2-40
3-15
3-20
2-36
2-36
2-36
2-36
2·36
2-36
2-161
2-40
2-40
2-40
2-40
2-40
3-15
lM217K
lM301AJ
pA301AD
pA301AH
pA301AT
pA307T
lM301AH
lM301AN
lM307N
3-20
2-36
2-36
2-36
2-78
pA308AD
pA308AH
pA308D
pA308H
pA309KC
lM308AJ
lM308AH
lM308J
LM308H
lM309K
2-40
2-40
2-40
2-40
3-15
J.lA311T
pA317KC
pA317UC
LM311N
lM317K
lM317T
Tl431CP
Tl494CJ
2-45
3-20
3-20
5-17
3-312
pA555HC
pA555TC
Tl494MJ
TL494CN
MC1455G
MC1455P1
3-312
3-312
11-4
11-4
pA556DC
pA556DM
MC3456l
MC3556l
11-40
11-40
,uA431AWC
pA494DC
j.(A494DM
/-iA494PC
MOTOROLA LINEAR/INTERFACE DEVICES
1-22
2-36
2-36
2-36
2-36
2-161
lM208AH
lM208AH
lM20BJ
lM208H
lM209K
,uA217UV
3-151
3-151
3-151
3-151
3-151
3-168
3-168
3-168
3-168
3-182
3-182
3-182
3-182
3-168
3-168
p.A79M12CKC
IlAl0BH
3-151
3-151
3-151
3-151
3-151
3-353
3-353
3-353
3-177
3-177
3-177
3-177
3-177
MA101AH
3-151
3-151
3-151
3-151
3-151
pA78S40DC
pA78S40DM
pA78S40PC
MC78M24CT
MC79l05ACP
MC79l05CG
MC79l05CP
MC79l12ACG
MC79L12ACP
p.Al01D
}-(Al01F
3-151
3-151
3-151
3-151
3-151
MC78M24CT
pA79l05AWC
pA79l05HC
pA79l05WC
pA79L12AHC
pA79L12AWC
,uAl01AF
3-145
3-20
3-20
3-20
3-151
Page
3-353
3-177
pA79M24CKC
pA79M24UC
pA101AD
3-145
3-145
3-145
3-145
3-145
Motorola
Similar
Replacement
pA78S40PV
MC79l05ACG
p.A79M15CKC
3-145
3-145
3-145
3-145
3-145
Motorola
Direct
Replacement
pA78S40PV
pA79l05AHC
p.A79M05CKC
3-145
3-145
3-145
3-145
3-145
3-151
3-151
3-151
3-151
3-151
MC78M20CT
MC78M20CT
MC78M24CT
Part Number
CROSS REFERENCE Part Number
.A556PC
.A702DC
.A702DM
I1A702MJ
~A702ML
IJA709AHM
"A709CP
Motorola
Similar
Replacement
Page
MC1733C
MC1733
11-40
2-153
2-153
MC1733
MC1733C
MC1733
MC1733
MC1733
2-153
2-153
2-153
2-153
2-153
MC3456P
.A702FM
.A702HC
.A702HM
.A709AMJG
.A709AML
"A709CJG
"A709CL
CONTINUED
Motorola
Direct
Replacement
MC1709AG
MC1709AU
MC1709AG
MC1709CU
MC1709CG
2-149
2-149
2-149
2-149
2-149
MC1709CPl
2-149
2-149
2-149
2-149
2-149
pA709HC
MC1709CG
"A709HM
"A709MJG
"A709ML
MC1709G
MC1709U
MC1709G
"A709TC
"A715DC
MC1709CPl
MC1741SCU
MC1741SU
MC1741SCG
MC1741SG
pA715DM
"A715HC
pA715HM
MC1723CL
MC1723CL
MC1723CG
MCl723CP
MC1723CL
3-111
3-111
3-111
3-111
3-111
"A723DM
MC1723L
MC1723L
MC1723CG
3-111
3-111
3-111
3-111
3-111
p.A723F
"A723HC
II.A723HM
MC1723G
"A723MJ
MC1723L
"A723ML
"A723PC
"A725AHM
.A725EHC
.A725HC
MC1723G
MC1723CP
LM108AH
LM308AH
LM308AH
.A733CJ
.A733CL
"A733CN
"A733DC
MC1733CG
MC1733CP
MC1733CL
2-40
2-153
2-153
2-153
2-153
"A733DM
J.lA733FM
"A733HC
"A733HM
"A733MJ
MC1733L
MC1733F
MC1733CG
MC1733G
MC1733L
2-153
2-153
2-153
2-153
2-153
IJA733ML
MC1733G
LM108AH
p.A725HM
MC1733CL
.A734DC
"A734DM
"A734HC
"A734HM
LM311J
LM311J
LM311H
LM311H
"A740HC
"A741ADM
"A741AHM
"A741CJG
LF355H
MC1741L
MC1741G
pA741CL
MC1741CU
MC1741CG
.A741CP
.A741EHC
.A741HM
.A741MJG
MC1741G
MC1741U
.A741ML
.A741RC
.A741RM
MC1741G
MC1741CU
MC1741U
MC1741CPl
p.A7420C
.A747ADM
.A747AHM
.A747CL
.A747CN
.A747DC
.A747DM
.A747EDC
,uA747EHC
.A747HC
.A747HM
MC1741G
MC1741G
MC1741G
CA3059
MC174SCG
MC174SCPl
MC174SCG
MC174SG
MC1748U
2-176
2-176
2-176
2-176
2-176
p.A748ML
MC174SG
MC174SCPl
.A775DC
.A775DM
.A775PC
.A776DC
.A776DM
LM339J
LM339J
LM339N
.A776HC
.A776HM
J.l.A776TC
.A777CJ
.A777CJG
MC1776CG
MC1776G
MC1776CPl
MC1350P
MC1350P
MC1741S
2-176
2-176
9-15
9-15
2-166
MC1776CG
MCl776G
2-57
2-57
2-57
2-1S0
2-1S0
LM30SAJ-S
LM30SAJ-8
2-180
2-180
2-180
2-40
2-40
LM308AH
LM30SAN
LM30SAN
LM30SAJ-S
LM30SAH
2-40
2-40
2-40
2-40
2-40
LM10SAJ-S
LM10SAJ-S
LM10SAH
LM30SAN
.A777MJ
.A777MJG
.A777ML
.A777TC
.A796DC
MC1496L
2-40
2-40
2-40
2-40
8-13
.A796DM
.A796HC
.A796HM
.A79BHC
.A79SHM
MC1596L
MC1496G
MC1596G
MC345SG
MC355SG
8-13
8-13
S-13
2-221
2-221
.A79SRC
.A798RM
.A79STC
.A799HC
.A799HM
MC345SU
MC355SU
MC345SPl
2-221
2-221
2-221
2-161
2-161
MC1741G
MC1741G
.A1391PC
.A145SCHC
.A145SCP
.A145SCRC
.A1458CTC
MC1391P
MC145SCG
MC145SCPl
MC145SCU
MC145SCPl
9-35
2-124
2-124
2-124
2-124
.A1458E
.A145SHC
.A145SP
.A145SRC
.A145STC
MC145SG
MC155SG
MC145SPl
MC145SU
MC145SPl
2-124
2-124
2-124
2-124
2-124
.A155SE
MC1558G
MC1558G
pA1558HM
MC1455U
MC1455P1
CA3054
.A2240DC
.A2240PC
.A3026HM
2-161
2-161
2-161
4-8
2-172
2-172
2-172
2-172
2-172
j.!A748Cl
.A748CP
J,lA748HC
IJ.A748HM
.A74SMJG
MC174SG
I
2-161
2-161
2-161
2-161
MC1747L
MC1747CL
MC1747CG
MC1747CG
MC1747G
MC174SCU
p.A777DC
2-16
2-161
2-161
2-161
2-161
MC1747CG
MC1747CP2
MC1747CL
Pege
2-172
2-172
2-172
2-176
2-176
.A777HC
2-153
2-45
2-45
2-45
2-45
2-172
2-172
2-172
2-172
2-172
MC1747L
MC1747G
Similar
MC1747L
MC1747G
MC1747CP2
.A777CL
.A777CN
.A777CP
3-111
3-111
2-40
2-40
2-40
Motorola
Replacement
.A747MJ
.A747ML
.A747PC
.A74SAHM
.A74SCJG
.A74STC
.A757DC
.A757DM
}J,.A772
2-149
2-166
2-166
2-166
2-166
.A723CF
"A723CJ
.A723CL
"A723CN
"A723DC
Motorola
Direct
Replacement
Part Number
J.lA3045
.A3046DC
.A3054DC
.A3064PC
MC3346P
CA3054P
.A3301P
.A3302P
.A3303P
.A3401P
.A3403D
MC3301P
MC3302P
MC3303P
MC3401P
MC3403L
.A3403P
.A4136DC
.A4136DM
MC3403P
MC3346P
MC13010P
MC455SCG
MOTOROLA LINEAR/INTERFACE DEVICES
1-23
9-40
9-40
9-7
9-73
2-189
2-57
2-199
2-1S9
2-199
MC4741CL
MC4741L
MC4741CP
jlA4136PC
.A455SHC
2-124
2-124
11-4
11-4
9-7
2-199
2-236
2-236
2-236
2-232
Il
CROSS REFERENCE Part Number
CONTINUED
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
Part Number
Motorola
Direct
Replacement
Motorola
Similar
Replacement
Page
MC4558G
MC4558CP1
MC7805CT
MC7805CK
MC7805K
2-232
2-232
3-132
3-132
3-132
"A7818UC
"A7818UV
"A7824CKC
"A7824KC
"A7824KM
MC7818CT
MC7818BT
MC7824CT
MC7824CK
MC7824K
3-132
3-132
3-132
3-132
3-132
MC7805CT
MC7805BT
MC7806CT
MC7806CK
MC7606K
3-132
3-132
3-132
3-132
3-132
j..I.A7824UC
"A7824UV
"A7905CKC
"A7905KC
"A7905KM
MC7824CT
MC7905CT
MC7905CK
3-132
3-132
3-168
3-168
3-168
pA7808KM
MC7806CT
MC7806BT
MC7808CT
MC7808K
MC7808K
3-132
3-132
3-132
3-132
3-132
"A7905UC
"A79052CKC
"A7906CKC
"A7906UC
"A7908CKC
MC7905CT
MC7905.2CT
MC7906CT
MC7906CT
MC7908CT
"A7808UC
"A7808UV
"A7812CKC
"A7812KC
"A7812KM
MC7808CT
MC7808BT
MC7812CT
MC7812CK
MC7812K
3-132
3-132
3-132
3-132
3-132
"A7908KC
"A7908UC
"A7912CKC
"A7912KC
"A7912KM
MC7912CT
MC7912CK
"A7812UC
3-132
3-132
3-132
3-132
3-132
"A7912UC
"A7915CKC
"A7915KC
MC7912CT
MC7915CT
MC7915CK
"A7815KC
"A7815KM
MC7812CT
MC7812BT
MC7815CT
MC7815CK
MC7815K
"A7915UC
MC7915CT
"A7815UC
"A7815UV
"A7818CKC
"A7818KC
"A7818KM
MC7815CT
MC7815BT
MC7818CT
MC7818CK
MC7818K
3-132
3-132
3-132
3-132
3-132
"A7918CKC
"A7918UC
"A7924CKC
"A7924UC
"PC1373
MC7918CT
MC7918CT
MC7924CT
MC7924CT
.uA4558HM
"A4558TC
"A7805CKC
"A7805KC
"A7805KM
f,iA7805UC
"A7805UV
"A7806CKC
"A7806KC
MA7806KM
"A7806UC
"A7806UV
"A7808CKC
"A7808KC
pA7812UV
,uA7815CKC
MC7824BT
MC7905CK
MC7908CT
MC7908CT
MC7912CK
MC7915CK
IJ.A7915KM
MOTOROLA LINEAR/INTERFACE DEVICES
1-24
3-168
3-168
3-168
3-168
3-168
MC3373P
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
3-168
9-43
Amplifiers
and Comparators
In Brief ...
For over two decades, Motorola has continually
refined and updated integrated circuit technologies,
analog circuit design techniques and processes in
response to the ever-expanding needs of the market
place. The enhanced performance of present day operational amplifiers and comparators have come into
being through innovative application of these technologies, designs and processes. Some early designs,
though of inferior performance by today's standards,
are still available but are rapidly giving way to the new,
higher performance operational amplifier and comparator circuits. Motorola has pioneered in JFET inputs,
low temperature coefficient input stages, Miller loop
compensation, all NPN output stages, dual-doublet frequency compensation and analog "in-the-package"
trimming of resistors to produce superior high performance operational amplifiers and comparators, operating in many cases from a single supply, with low input
offset, low noise, low power, high output swing, high
slew rate and high gain-bandwidth product at reasonable cost to the customer.
Present day operational amplifiers and comparators
find application in all segments of society to include
motor controls, instrumentation, aerospace, automotive, telecommunication, medical and consumer
products.
Selector Guide
Operational Amplifiers ...........
High Frequency Amplifiers ..... _.
Miscellaneous Amplifiers. . . . . . . ..
Comparators .....................
2-2
2-8
2-9
2-10
Alphanumeric Listing .............. 2-11
Related Application Notes. . . . . . . . .. 2-13
Data Sheets ....................... 2-14
E
fI
Amplifiers and
Comparators
Page
Operational Amplifiers
Single . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Dual. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Quad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
High Frequency Amplifiers
AGC ............ " .................. 2-8
Non-AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Miscellaneous Amplifiers
CMOS
Quad Programmable Op Amp .............. 2-9
Quad Programmable Comparator ............ 2-9
Dual Prog. Op Amp/Dual Prog. Compo ........ 2-9
Bipolar
Dual Op Amp-Comp . . . . . . . . . . . . . . . . . . . . . 2-9
Power Amplifiers Variable Gain ............. 2-9
Comparators
Single . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Dual. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Quad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Operational Amplifiers
Motorola offers a broad line of bipolar operational
amplifiers to meet a wide range of applications. From
low-cost industry-standard types to high precision circuits, the span encompasses a large range of perfor_
mance capabilities. These linear integrated circuits are
available as single, dual, and quad monolithic devices
in a variety of temperature ranges and package styles.
Most devices may be obtained in unencapsulated
"chip" form as well. For price and delivery information
on chips, please contact your Motorola Sales Representative or Distributor.
Single Operational Amplifiers
Device
lIB
,.A
Max
VIO TCVIO
mV ,.vrc
Typ
Max
110
nA
Max
BW
Avol IAv=1)
VlmV MHz
Min
Typ
SR
IAv=1)
VI,.s
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
Noncompensated
Commercial Temperature Range IO"C to + 70"C)
LM301A
LM30B
LM30BA
MC1439
MC1709C
MC174BC
0.25
7.0
7.0
1.0
1.5
0.5
7.5
7.5
0.5
7.5
7.5
S.O
10
15
5.0
15
15
15
50
1.0
1.0
100
500
200
25
25
BO
15
15
20
1.0
1.0
1.0
2.0
1.0
1.0
0.5
0.3
0.3
4.2
0.3
0.5
±3.0
±3.0
±3.0
±S.O
±3.0
±3.0
±1B
±1B
±1B
General Purpose
Precision
Precision
±18
High Slew Rate
General Purpose
General Purpose
±1B
±1B
General Purpose
Precision
Precision
H, N/S2S, J/S93
H, NIS2S
H, NIS2S
G/S01, P1
G/S01, P1, U
G/S01, P1, U
H, N/626, J/693
H, N/626, JIS32, J-B
H, N162S, J/632, J-B
Military Temperature Range 1-55"C to + 12S"C)
LM101A
LM10B
LM10BA
MC1539
MC1709
MC1709A
MC1748
0.075
0.002
0.002
0.5
0.5
0.6
2.0
2.0
0.5
3.0
5.0
3.0
10
3.0
1.0
15
15
5.0
10
0.2
0.2
SO
200
100
50
50
BO
50
25
25
1.0
1.0
1.0
2.0
1.0
1.0
0.5
0.3
0.3
4.2
0.3
0.5
±3.0
±3.0
±3.0
±4.0
±3.0
±3.0
±22
±20
±20
±1B
±18
±18
0.5
5.0
15
200
50
1.0
0.5
±3.0
±22
General Purpose
Precision
Precision
High Slew Rate
General Purpose
High Performance
MC1709
General Purpose
MOTOROLA LINEAR/INTERFACE DEVICES
2-2
H, J/693
H, J, J·B/S93
H, J, J-B/S93
G/S01
G1601, U
GIS01
G/601, U
Device
liB
"A
Max
VIO
mV
Max
TCVIO
"vrc
Typ
110
nA
Max
BW
Avol (A v =1)
V/mV
MHz
Typ
Min
SR
(Av =1)
V/"s
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
Internally Compensated
Commercial Temperature Range (O"C to + 70"C)
10
10
5.0
10
5.0
10
5.0
5.0
0.6
10
5.0
5.0
5.0
5.0
5.0
5.0
10
2.0
100 pA
50 pA
20 pA
50 pA
20 pA
50 pA
20 pA
50 pA
10 pA
200 pA
5.0
3.0
25 pA
50
0.25
0.04
0.03
30
7.5
10
10
10
12
12
-
-
50
10
10
5.0 vA
25
70
70
80
0.5
0.5
0.003
0.05
6.0
6.0
6.0
6.0
15
15
15
15
200
200
3.0
25
20
20
100
50
LF351
LF355
LF3558
LF356
LF3568
LF357
LF3578
LF441C
LMllC
200
200
100
200
100
200
100
100
100
LMllCL
LM307
MC1436
MC1456
MC1733C
MC1741C
MC1741SC
MCl776C
MC3476
MC34001
MC34001A
MC34001B
MC34071
MC34071A
MC34080
MC34080A
MC34081
MC34081A
MC34181
OP-27E
OP-27F
OP-27G
TL061AC
TL061BC
TL061C
TL071AC
TL071BC
TL071C
TL081AC
TL081BC
TL081C
pA
pA
pA
pA
pA
pA
pA
pA
pA
200 pA 10
100 pA 2.0
200 pA 5.0
0.50
5.0
500 nA 3.0
200 pA 1.0
200 pA 0.5
200 pA 1.0
200 pA 0.5
0.1 nA 2.0
0.040 0.025
0.055 0.060
0.080 0.100
200 pA 6.0
200 pA 3.0
200 pA 15
200 pA 6.0
200 pA 3.0
200 pA 10
200 pA 6.0
200 pA 3.0
400 pA 15
10
10
10
10
10
10
10
10
10
10
0.2
0.3
0.4
10
10
10
10
10
10
10
10
10
25
50
50
50
50
50
50
25
250
100 pA 25
50 pA
50
100 pA 50
75
25
50
50
100 pA 25
100 pA 50
100 pA 25
100 pA 50
0.05
25
35
1000
50
1000
75
700
100 pA 4.0
100 pA 4.0
200 pA 4.0
50 pA
50
50 pA
50
50 pA
25
100 pA 50
100 pA 50
200 pA 25
13
5.0
5.0
15
12
75
50
6.0
0.3
±5.0
"'18
"'5.0
"'5.0
"'5.0
±5.0
±5.0
±5.0
±5.0
±18
",22
±18
±22
±18
±22
±18
JFET Input
JFET Input
JFET Input
JFET Input
JFET Input
Wide band FET Input
JFET Input
Low Power JFET Input
±3.0
±20
Precision
1.0
0.3
"'3.0
±20
1.0
1.0
1.0
90
0.5
2.0
2.5
-
±3.0 ±18
±15 ±34
±3.0 ±18
±4.0 ±8.0
1.0
1.0
1.0
1.0
0.5
10
0.2
0.2
±3.0
±3.0
±1.2
±1.5
4.0
4.0
4.0
4.5
4.5
16
16
8.0
8.0
4.0
8.0
8.0
8.0
2.0
2.0
2.0
4.0
4.0
4.0
4.0
4.0
4.0
13
13
13
10
10
55
55
30
30
10
2.8
2.8
2.8
6.0
6.0
6.0
13
13
13
13
13
13
±5.0
±5.0
±5.0
+3.0
+3.0
±5.0
±5.0
±5.0
±5.0
±2.5
"'4.0
±4.0
±4.0
±2.5
±2.5
±2.5
"'5.0
±5.0
",5.0
±5.0
±5.0
±5.0
4.0
1.0
2.5
2.0
5.0
3.0
20
2.0
1.0
Precision
General Purpose
High Voltage
High Performance
Differential Wideband
Video Amp
±18
General Purpose
±18
High Slew Rate
±18 JLPower, Programmable
±18
Low Cost
"Power, Programmable
±18
JFET Input
±18
JFET Input
:':18
JFET Input
+44
High Performance,
Single Supply
+44
±22
Decompensated
±22
MC34081 for Av"'2
±22 High Speed, JFET Input
±22 High Speed, JFET Input
±18 Low Power JFET Input
",22
Low Noise, Precision
",22
low Noise, Precision
±22
Low Noise, Precision
±18 Low Power JFET Input
±18 Low Power JFET Input
±18 Low Power J FET Input
±18 Low Noise, JFET Input
±18 Low Noise, JFET Input
±18 Low Noise, JFET Input
JFET Input
±18
JFET Input
±18
JFET Input
±18
N/626
H/601, J/693
H/601, J/693
H/601, J/693
H/601, J/693
H/601, J/693
H/601, J/693
N/626
H, N/626, J/632,
J-8/693
H, N/626, J/632,
J-8/693
N/626
G/601, U
G/601, Pl, U
G/601, L, P/646
G/601, Pl, U
G/601, Pl
G/601, Pl, U
G/601, Pl, U
G/601, P/626, U
G/601, P/626, U
G/601, P/626, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626, U
P/626
P/626
P/626
P/626
P/626
P/626
P/626
P/626, JG
P/626, JG
P/626, JG
P/626, JG
P/626, JG
P/626, JG
Low NOise, Precision
Low Noise, Precision
Low Noise, Precision
z
z
High Performance,
P/626, U
P/626, U
P/626
z
Automotive Temperature Range (-40'C to +85'C)
MC33071
0.50
MC33071A 500 nA
MC33171
0.10
5.0
3.0
4.5
10
10
10
75
50
20
25
50
50
4.5
4.5
1.8
10
10
2.1
+3.0
+3.0
+3.0
+44
+44
+44
MC33181
TL061 V
2.0
6.0
10
10
0.05
100 pA
25
4.0
4.0
2.0
10
6.0
±2.5
±2.5
±18
±18
0.1 nA
200 pA
Single Supply
Low Power, Single
Supply
Low Power JFET Input
Low Power JFET Input
MOTOROLA LINEAR/INTERFACE DEVICES
2-3
P/626
P/626
E
Single Operational Amplifiers (continued)
liB
p.A
Max
Device
VIO TCVIO
mV p'vrc
Max
Typ
110
nA
Max
BW
Ayol IAy =1)
V/mV
MHz
Typ
Min
SR
IAy =1)
V/p.s
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
Internally Compensated
Military Temperature Range I -SS'C to + 12S'C)
LMll
MC1536
MC1556
MC1733
50 pA
0.02
0.015
0.20
0.3
5.0
4.0
-
1.0
10
10
10 pA
3.0
2.0
-
MC1741
MC1741S
MCl776
MC35001
MC35001A
MC3500H!
MC35071
MC35071A
MC35080
MC35080A
MC35081
MC35081A
MC35171
0.5
0.5
0.0075
100 pA
75 pA
100 pA
0.50
500 nA
200 pA
200 pA
200 pA
200 pA
0.10
5.0
5.0
5.0
10
2.0
5.0
5.0
3.0
1.0
0.5
1.0
0.5
4.5
MC35181
OP-27A
OP-27B
OP-27C
TL061M
TL071M
TL081M
0.1 nA 2.0
0.040 0.025
0.055 0.060
0.080 0.100
200 pA 6.0
200 pA 6.0
200 pA 9.0
1.0
1.0
1.0
90
0.3
2.0
2.5
3.0 p.A
250
100
100
90
-
±3.0
±15
±3.0
±4.0
15
15
15
10
10
10
10
10
10
10
10
10
10
200
200
3.0
100 pA
25 pA
50 pA
75
50
100 pA
100 pA
100 pA
100 pA
20
50
50
200
25
50
50
25
50
25
50
25
50
50
1.0
1.0
1.0
4.0
4.0
4.0
4.5
4.5
16
16
8.0
8.0
1.8
0.5
10
0.2
13
13
13
10
10
55
55
30
30
2.1
±3.0
±3.0
±1.2
±5.0
±5.0
±5.0
+3.0
+3.0
±5.0
±5.0
±5.0
±5.0
+3.0
10
0.2
0.3
0.4
10
10
10
25
0.05
1000
35
50
1000
75
700
100 pA 4.0
50 pA
35
100 pA 25
4.0
8.0
8.0
8.0
2.0
4.0
4.0
10
2.8
2.8
2.8
6.0
13
13
±2.5
±4.0
±4.0
±4.0
±2.5
±5.0
±5.0
Precision
±20
±40
±22
±8.0
H, J/632, J-8/693
G/601, U
G/B01, 693, U
G/603, L
±22
±22
High Voltage
High Performance
Differential Wideband
Video Amp
General Purpose
High Slew Rate
±18
}.LPower, Programmable
G1601, L
±22
±22
±22
+44
+44
±22
JFET Input
JFET Input
JFET Input
G/601, U
G/601, U
G/601. U
High Performance,
U
U
U
U
U
U
U
±22
±22
±22
+44
Single Supply
Decompensated
MC35081 for Av>-2
High Speed, JFET Input
High Speed, JFET Input
Low Power, Single
Supply
Low Power JFET Input
G/601, U
G/601, U
Low Power JFET Input
Low Noise, JFET Input
JFET Input
U
Z
Z
Z
JG
JG
JG
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
1.0
0.25
I ± 3.0 I ± 18 I
Dual MC1709
L, P/646
1.0
0.25
I ±3.01
±181
Dual MC1709
±18
JFET Input
Low Power JFET Input
Single Supply
ILowPower
Consumption)
Dual, Low Noise, Audio
Dual MC1741
Dual General Purpose
High Slew Rate
Dual MC1741
Split Supplies
Single Supply
±18
±22
±22
±22
±18
±18
±18
Low NQise, Precision
Low Noise, Precision
Low Noise, Precision
Dual Operational Amplifiers
liB
p.A
Max
Device
VIO
mV
Max
110
nA
Max
TCVIO
p.vrc
Typ
BW
Ayol IAy =1)
V/mV
MHz
Min
Typ
SR
IAy =1)
VII'S
Noncompensated
Commercial Temperature Range 10"<: to + 7O"C)
IMC1437 I
1.5
I 7.5 I
10
I
500
I 15
Military Temperature Range 1-55"<: to +125'C)
IMC1537 I
0.5
I 5.0 I
10
I 200 I 25
Internally Compensated
Commercial Temperature Range IO'C to + 70'C)
LF353
LF442C
LM358
LM833
MC1458
MCI458C
MC1458S
MC1747C
MC3458
200 pA
100 pA
0.25
10
5.0
6.0
10
10
7.0
100 pA
50 pA
50
25
25
25
4.0
2.0
1.0
13
6.0
0.6
±5.0
±5.0
±1.5
+3.0
±18
+36
1.0
0.5
0.70
0.5
0.5
0.5
5.0
6.0
10
6.0
6.0
10
2.0
10
10
10
10
7.0
200
200
300
200
200
50
31.6
20
20
20
25
20
15
1.1
1.1
1.0
1.0
1.0
7.0
0.8
0.8
10
0.5
0.6
±2.5
±3.0
±3.0
±3.0
±3.0
±1.5
+3.0
±18
±18
±18
±18
±18
±18
+36
±18
(Low Crossover
Distortion)
MOTOROLA LINEAR/INTERFACE DEVICES
2-4
N/626
N/626
H, N/626, J/693
P/626
G/601, PI, U
G/601, PI
G/601, PI, U
G/603, L, P2
G/601, PI, U
Dual Operational Amplifiers (continued)
Device
liB
,.,A
Max
VIO
mV
Max
TCVIO
,.,VI"C
Typ
110
nA
Max
BW
Avol (Av =l)
V/mV
MHz
Min
Typ
SR
(Av =l)
V/,.,s
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
Commercial Temperature Range (O°C to + 70°C) (continued)
MC4558AC
MC4558C
MC34002
MC34002A
MC340028
MC34072
MC34072A
MC34082
MC34082A
MC34083
MC34083A
MC34182
TL062AC
TL0628C
TL062C
TL072AC
TL0728C
TL072C
TL082AC
TL0828C
TL082C
0.5
0.5
100 pA
75 pA
100 pA
0.50
500 nA
200 pA
200 pA
200 pA
200 pA
0.1 nA
200 pA
200 pA
200 pA
200 pA
200 pA
200 pA
200 pA
200 pA
400 pA
5.0
6.0
10
2.0
5.0
5.0
3.0
3.0
1.0
3.0
1.0
3.0
6.0
3.0
15
6.0
3.0
10
6.0
3.0
15
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
200
200
100 pA
50 pA
70 pA
75
50
100 pA
100 pA
100 pA
100 pA
0.05
100 pA
100 pA
200 pA
50 pA
50 pA
50 pA
100 pA
100 pA
200 pA
50
20
25
50
25
25
50
25
50
25
50
25
4.0
4.0
4.0
50
50
25
50
50
25
2.8
2.8
4.0
4.0
4.0
4.5
4.5
8.0
8.0
16
16
4.0
2.0
2.0
2.0
4.0
4.0
4.0
4.0
4.0
4.0
1.6
1.6
13
13
13
10
10
30
30
55
55
10
6.0
6.0
6.0
13
13
13
13
13
13
±3.0
:±3.0
±5.0
±5.0
±5.0
+3.0
+3.0
::1::5.0
±5.0
±5.0
±5.0
±2.5
±2.5
±2.5
±2.5
±5.0
±5.0
±5.0
±5.0
±5.0
±5.0
:±22
::1::18
±18
±18
±18
+44
+44
... 22
.,,22
±22
±22
±18
±18
±18
±18
±18
±18
±18
±18
±18
±18
High Frequency
High Frequency
JFET Input
JFET Input
JFET Input
High Performance,
Single Supply
High Speed, ~FET Input
High Speed, JFET Input
Decompensated
MC34082 for Av"'2
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input
Low Noise, JFET Input
Low Noise, JFET Input
Low Noise, JFET Input
JFET Input
JFET Input
JFET Input
Pl
G/601, Pl, U
G/601, P/626, U
G/601, P/626, U
G/601, P1626, U
P1626, U
P1626, U
P1626, U
P1626, U
P1626, U
P1626, U
PI626
P/626
P/626
PI626
P1626, JGI693
P1626, JGI693
P1626, JGI693
P1626, JG/693
P/626, JG/693
P1626, JG/693
Industrial Temperature Range (-25°C to +85°C)
Split or Single
Supply Op Amp
H, N1626, J/693
H, N1626, JI693
H, JI693
Automotive Temperature Range (-40°C to +85°C)
LM2904
MC3358
0.25
5.0
MC33072
0.50
MC33072A 500 nA
1.0
MC33077
750 nA
MC33078
MC33172
0.10
MC33182
MC33282
TL062V
8.0
10
75
100
typ
20
5.0
3.0
1.0
2.0
4.5
10
10
2.0
2.0
10
75
50
180
150
20
25
50
150
31.6
50
4.5
4.5
37
16
1.8
10
10
11
7.0
2.1
±1.5
±3.0
±1.5
..,,3.0
+3.0
+3.0
±2.5
±5.0
+3.0
10
5.0
10
0.05
50 pA
100 pA
25
50
4.0
4.0
30
2.0
10
12
6.0
±2.5
±2.5
±2.5
±18
±18
±18
Split or Single
Supply Op Amp
Split Supplies
Single Supply
High Performance,
Single Supply
Dual, Low Noise
Low Noise
Low Power, Single
Supply
Low Power JFET Input
Low Input Oftset JFET
Low Power JFET Input
7.0
0.1 nA 3.0
100 pA 200,.,V
200 pA 6.0
7.0
50
1.0
0.6
1.0
0.6
±13
±26
±18
±36
+44
+44
±18
±18
+44
Pl1626
P/626, U
P1626, U
P/626
N/626
PI626
PI626
PI646
P/626
Military Temperature Range (- 55"<: to + 125°C)
LM158
0.15
5.0
10
30
50
1.0
0.6
±1.5
+3.0
±18
+36
Split Supplies
Single Supply
MC1558
MC1558S
MC1747
MC3558
0.5
0.5
0.5
0.5
5.0
5.0
5.0
5.0
10
10
10
10
200
200
200
50
50
50
50
50
1.1
1.0
1.0
1.0
0.8
10
0.5
0.6
5.0
10
2.0
5.0
5.0
3.0
3.0
1.0
10
10
10
10
10
10
10
10
200
100 pA
25 pA
50 pA
75
50
100 pA
100 pA
I 5025
2.8
4.0
4.0
4.0
4.5
4.5
8.0
8.0
1.6
13
13
13
10
10
30
30
±3.0
±3.0
±3.0
±1.5
+3.0
±3.0
±5.0
±5.0
±5.0
+3.0
+3.0
±5.0
±5.0
±22
±22
±22
±18
+36
±22
±22
±22
±22
+44
+44
±22
±22
Consumption)
Dual MC1741
High Slew Rate
Dual MC1741
Split Supplies
Single Supply
High Frequency
JFET Input
JFET Input
JFET Input
High Performance,
Single Supply
High Speed, JFET Input
High Speed, JFET Input
(Low Power
MC4558
0.5
MC35002
100 pA
MC35002A 75 pA
MC350028 100 pA
0.50
MC35072
MC35072A 500 nA
MC35082
200 pA
MC35082A 200 pA
50
50
25
50
25
50
MOTOROLA LINEAR/INTERFACE DEVICES
2-5
G/601, U
G1601, U
G1601, L
G1601, U
G1601,
G1601,
G1601,
G1601,
U
U
U
U
U
U
U
U
E
fI
Dual Operational Amplifiers (continued)
Device
liB
pA
Max
VIO
mV
Max
TCvIO
,.vrc
TVp
110
nA
Max
BW
Ayol (Ay =1)
V/mV
MHz
Min
Typ
SR
(Ay =1)
V/,.s
Typ
SupplV
Voltage
V
Min Max
Description
Package
Suffix
Militarv Temperature Range (-SS·C to +12S·C)
MC35083
MC35083A
MC35172
200 pA
200 pA
0.10
3.0
1.0
4.5
10
10
10
100 pA
100 pA
20
25
50
50
16
16
1.8
55
55
2.1
±5.0
±5.0
+3.0
±22
±22
+44
MC35182
TL062M
TL072M
TL082M
0.1 nA
200 pA
200 pA
200 pA
3.0
6.0
6.0
6.0
10
10
10
10
0.05
100 pA
50 pA
100 pA
25
4.0
35
25
4.0
2.0
4.0
4.0
10
6.0
13
13
±2.5
±2.5
±5.0
±5.0
±18
±18
±18
±18
U
U
U
Decompensated
MC35082 for Av""2
Low Power, Single
Supply
Low Power JFET Input
Low Power JFET Input
Low Noise, JFET Input
JFET Input
JG
JG
JG
Description
Package
Suffix
U
Quad Operational Amplifiers
Device
liB
,.A
Max
VIO
mV
Max
TCVIO
,.vrc
TVp
110
nA
Max
BW
Ayol (Ay =11
V/mV
MHz
Typ
Min
SR
(Ay =l)
VI,..
Typ
Supply
Voltage
V
Min Max
Internally Compensated
Commercial Temperature Range (O·C to + 70·C)
LF347
LF347B
LF444C
LM324
LM348
MC34011
LM3900
MC3403
200 pA
200 pA
100 pA
0.25
10
5.0
10
6.0
0.20
0.3
6.0
-
0.5
10
7.0
MC4741C
0.5
MC34004
200 pA
MC34004B 200 pA
MC34074
0.50
MC34074A 500 nA
MC34084
200 pA
MC34084A 200 pA
MC34085
200 pA
MC34085A 200 pA
MC34184
0.1 nA
TL064AC
200 pA
TL064BC
200 pA
TL064C
200 pA
TL074AC
200 pA
TL074C
200 pA
TL084AC
200 pA
TL084BC
200 pA
TL084C
400 pA
6.0
10
5.0
5.0
3.0
12
6.0
12
6.0
10
6.0
3.0
15
6.0
10
6.0
3.0
15
10
10
10
7.0
100 pA
100 pA
50 pA
50
25
50
25
25
4.0
4.0
2.0
1.0
13
13
6.0
0.6
-
50
-
-
25
1.0
1.0
5.0
0.5
0.6
50
20
1.0
0.6
15
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
200
100 pA
100 pA
75
50
100 pA
100 pA
100 pA
100 pA
0.05
100 pA
100 pA
200 pA
50 pA
50 pA
100 pA
100 pA
200 pA
20
25
50
25
50
25
50
25
50
25
4.0
4.0
4.0
50
25
50
50
25
1.0
4.0
4.0
4.5
4.5
8.0
8.0
16
16
4.0
2.0
2.0
2.0
4.0
4.0
4.0
4.0
4.0
0.5
13
13
10
10
30
30
55
55
10
6.0
6.0
6.0
13
13
13
13
13
±5.0
±5.0
±5.0
±1.5
+3.0
±3.0
±1.5
+3.0
±1.5
+3.0
±3.0
±5.0
±5.0
+3.0
+3.0
±5.0
±5.0
±5.0
±5.0
±2.5
±2.5
±2.5
±2.5
±5.0
±5.0
±5.0
±5.0
±5.0
±18
±18
±18
±16
+32
±18
±18
+36
JFET Input
JFET Input
Low Power JFET Input
Low Power
Consumption
Quad MC1741
Norton Input
N/646
N/646
N/646
J/632, N/646
±1S
No Crossover
Distortion
Quad MC1741
JFET Input
JFET Input
High Performance,
Single Supply
Hi·Speed, JFET Input
Hi·Speed, JFET Input
Decompensated
MC34084 for Av""2
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input
Low Power JFET Input
Low Noise, JFET Input
Low Noise, JFET Input
JFET Input
JFET Input
JFET Input
L, P/646
+36
±18
±18
±18
+44
+44
±22
±22
±22
±22
±18
±18
±18
±18
±18
±18
±18
±18
±18
L, P/646
L, P/646
L, P/646
L, P/646
L, P/646
P/646
P/646
P/646
P/646
P/646
N/646
N/646
N/646
J/632, N/646
J/632, N/646
J/632, N/646
J/632, N/646
J/632, N/646
Split or Single
Supply OP Amp
Quad MC1741
J/632, N/646
Differential
Low Power
N/646
MOTOROLA LlNEAR/)NTERFACE DEVICES
2-6
J/632, N/646
J/632, N/646
J/632, N/646
Quad Operational Amplifiers (continued)
Device
liB
pA
Max
VIO
mV
Max
TCVIO
,.VI"C
Typ
110
nA
Max
BW
Avol (Av =1)
V/mV
MHz
Min
Typ
SR
(Av =1)
V/,.s
Typ
Supply
Voltage
V
Min Max
Description
Package
Suffix
Automotive Temperature Range ( - 40"<: to + 85"<:) (continued)
MC33011
0.3
-
-
-
1.0
4.0
0.6
LM2900
MC3303
0.5
8.0
10
75
20
1.0
0.6
MC33074
0.50
5.0
10
75
25
4.5
3.0
2.5
4.5
10
2.0
10
50
150
20
50
31.6
50
10
5.0
10
0.05
50pA
100 pA
25
50
4.0
MC33074A 500 nA
750 nA
MC33079
MC33174
0.10
MC33184
MC33284
TL064V
0.1 nA
10
100pA 200/LV
200 pA 9.0
10
±2.0
+4.0
±1.5
+3.0
+3.0
±15
+28
±18
+36
+44
4.5
16
1.8
10
7.0
2.1
+3.0
±5.0
+3.0
+44
±18
+44
4.0
30
2.0
10
12
6.0
±2.5
±2.5
±2.5
±18
±.18
±18
Norton Input
Differential
General Purpose
High Performance,
Single Supply
Quad High Performance
Quad Low Noise
Low Power, Single
Supply
Low Power JFET Input
Low Input Offset JFET
Low Power JFET Input
P/646
N/646
P/646
L, P/646
L, P/646
N/646
P/646
P/646
P/646
N/646
Telecommunications Temperature Range (-40"<: to +85"<:)
MC1434J3
1.0 nA
30
-
200 pA 45 dB
0.8
1.5
4.75
12.6
MC143404
1.0 nA
30
-
200 pA 60 dB
0.8
1.0
4.75
12.6
±16
+32
±18
±18
+36
±22
±22
±22
+44
CMOS, Low Power,
Drives Low-Impedance
Loads
CMOS, Very Low Power
L, P/646
L, P/646
Military Temperature Range ( - 55'C to + 125'C)
LM124
0.15
5.0
7.0
30
50
1.0
0.6
LM148
MC3503
0.10
0.5
5.0
5.0
7.0
25
50
50
50
1.0
1.0
0.5
0.6
0.5
100 pA
100 pA
0.50
5.0
10
5.0
5.0
15
10
10
10
200
100 pA
50 pA
75
50
25
50
25
1.0
4.0
4.0
4.5
0.5
13
13
10
±1.5
+3.0
±3.0
±1.5
+3.0
±3.0
±5.0
±5.0
+3.0
MC35074A 500 nA
MC35084
200 pA
MC35084A 200 pA
MC35085
200 pA
MC35085A 200 pA
0.10
MC35174
3.0
12
6.0
12
6.0
4.5
10
10
10
10
10
10
50
100 pA
100 pA
100 pA
100 pA
20
50
25
50
25
50
50
4.5
8.0
8.0
16
16
1.8
10
30
30
55
55
2.1
+3.0
±5.0
±5.0
±5.0
±5.0
+3.0
+44
±22
±22
±22
±22
+44
MC35184
TL064M
TL074M
TL084M
10
9.0
9.0
9.0
10
10
10
10
0.05
100 pA
50 pA
100 pA
25
4.0
35
25
4.0
2.0
4.0
4.0
10
6.0
13
13
±2.5
±2.5
±5.0
±5.0
±18
±18
±18
MC4741
MC35004
MC35004B
MC35074
0.1 nA
200 pA
200 pA
200 pA
±18
Low Power
Consumption
Quad MC1741
General Purpose
Low Power
Quad MC1741
JFET Input
JFET Input
High Performance,
Single Supply
Quad High Performance
High Speed, JFET Input
High Speed, JFET Input
Decompensated
MC35084 for Av'32
Low Power, Single
Supply
Low Power JFET Input
Low Power JFET Input
Low Noise, JFET Input
JFET Input
MOTOROLA LINEAR/INTERFACE DEVICES
2-7
J/632, N/646
J/632
L, P/646
L
L
L
L
L
L
L
L
L
L
L
J/632
J/632
J/632
fI
High Frequency Amplifiers
A variety of high frequency circuits with features ranging from low cost simplicity to multi-function versatility
marks Motorola's line of integrated amplifiers. Devices
described here are intended for industrial and commu-
nications applications. For devices especially dedicated to
consumer products, i.e., TV and entertainment radio, see
the "Consumer Electronics" section.
AGC Amplifiers
MC1590G Family Amplifiers
frequency applications such as video switching, FSK
circuits, multiplexers, etc. Gating circuit is useful for
AGC control.
Wide-Band General Purpose
Non-AGC Amplifiers
The MC1590G, MC1490, MC1350 family are basic
building blocks - AGC (Automatic Gain Controlled) RF/
Video Amplifiers. These parts are recommended for
applications up through 70 MHz. The best high frequency performance may be obtained by using the
physically smaller SOIC version (shorter leads) -MC1350D. There are currently no other RF IC's like
these, because other manufacturers have dropped their
copies. Applications include variable gain video and
instrumentation amplifiers, IF (intermediate Frequency)
amplifiers for radio and TV receivers, and transmitter
power output control. Many uses will be found in medical instrumentation, remote monitoring, video/graphics processing, and a variety of communications equipment. The family of parts using the same basic die
(identical circuit with slightly different test parameters)
is listed in the following table.
SElNE592 Amplifier
Differential Two Stage Video
A monolithic, two stage differential output, wideband
video amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 400
to 0 with one external resistor. The input stage has been
designed so that with the addition of a few external
reactive elements between the gain select terminals, the
circuit can function as a high pass, low pass, or band
pass filter. This feature makes the circuit ideal for use
as a video or pulse amplifier in communications, magnetic memories, display and video recorder systems.
MC1733/MC1733C -
Video Amplifier
Differential input and output amplifier provides three
fixed gain options with bandwidth to 120 MHz. External
resistor permits any gain setting from 10 to 400 VN.
Extremely fast rise time (2.5 ns typ) and propagation
delay time (3.6 ns typ) makes this unit particularly useful
as pulse amplifier in tape, drum, or disc memory read
applications.
MC1545/1445 - Gated 2-Channellnput
Differential input and output amplifier with gated 2channel input for a wide variety of switching purposes.
Typical 50 MHz bandwidth makes it suitable for high
High-Frequency Amplifier Specifications
Operating
Temperature Range
AV
dB
@
Bandwidth
MHz
-55' to + 125'C
- 40' to + 85'C
0' to +1O'C
Min
Max
Case/Suffix
MC1590G
-
-
50
35
10
100
+6.0
+18
601
-
-
MC1350
50
50
45
45
+6.0
+18
626/P,
751/D
-
50
35
10
100
+6.0
+18
6261P
-
MC1490
ITyp)
VCcNEE
Vdc
-
MCl445
19
50
±4.0
±12
603/G,632/L
SE592
NE592
52
40
40
90
±4.0
±8.0
603/H,632/F
646/N
MC1733
-
MC1733C
52
40
20
40
90
120
±4.0
±8.0
603/G,632/L
646/P
MCI545
MOTOROLA LINEAR/INTERFACE DEVICES
2-8
Miscellaneous Amplifiers
devices range from low power CMOS programmable
amplifiers and comparators to variable-gain bipolar
power amplifiers.
Motorola provides several bipolar and CMOS special
purpose amplifiers which fill specific needs. These
CMOS
Bipolar
MC14573: Quad Programmable Operational Amplifier
MC14574: Quad Programmable Comparator
MC14575: Dual Programmable Operational
Amplifier and Dual Programmable
Comparator
MC3505/MC3405: Dual Operational Amplifier
and O"ual Comparator
This device contains two Differential Input Operational Amplifiers and two Comparators each set capable
of single supply operation. This operational amplifiercomparator circuit will find its applications as a general
purpose product for automotive circuits and as an industrial "building block."
These low power devices are designed for applications such as active filters, voltage reference circuits,
function generators, oscillators, and limit set alarms.
Output 1
1
Out 4
Output 4
i'
'OP"" 1
: Inputs 3
Output 2
} 'OP"" 4
'OP"" 1 {
'OP""
Output 3
7
'1
} 'OP"" 3
5
MC14573
MC14574
50 pA
±30
100 pA
1.0
10'
3.0 to 15
On51 F. P/648
± 1.5 to ±7.5
MC14575
4Propagatlon Delay
VOLTAGE GAIN versus FREQUENCY IRL
Power Amplifiers Variable Gain
ro
~
16 OHMS)
35r-'-rrr.G'-.~in~0~~"'io~n'#"'~~Av~'306VwNvnTm--.-rr~rr--'''nTrrn
; 30~+-~~G~.~in~O=Pt~io=n~#~2~ffiF~t?8#VN~lm==*=FF~#==F~~~
MC1554G-TA = - 55° to + 125°C, Case 603C
MC1454G-TA = 0° to + 70°C, Case 603C
~ 2S~~~~G~.min~o~~~;o~n~#~3H+~~,~oFvN~~--+-~~#--+9H~Ern
operation. Typical voltage gain of 10, 18, or 33 VN with
i
w 20r-~rt~~~~fH~~~f+~~-+~~~--~-H~
; 15r-~rtH+~-+-rrH~r-+-rt~~-+-b~~--~-H~
10 r-+rtH+~-+-rrH~r-+-rttt+~-+ Pout = 1.0 WRMS
One-watt Power Amplifier for single or split supply e
RL ~ 16 OHMS
0.4% THO.
5~
vCC
10
100
1.0k 2.0k 5.0kltlk
f, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-9
~
16 V
lOOk
1.0M
II
Comparators
Description
Single
BIPOLAR
With strobe, will operate
from single supply
Requires only 10 pA from
single-ended supply
Dual
BIPOLAR
LM193
LM193A
LM293
LM293A
LM393
LM393A
LM2903
0.10
0.10
0.25
0.25
0.25
0.25
0.25
5.0
2.0
5.0
2.0
5.0
2.0
7.0
0.025
0.025
0.050
0.050
0.050
0.050
0.050
200K
200K
200K
200K
200K
200K
200K
6.0
6.0
6.0
6.0
6.0
6.0
6.0
1300
1300
1300
1300
1300
1300
1500
MC3405
MC3505
0.5
0.5
10
5.0
0.050
0.050
200K
200K
6.0
6.0
1300
1300
Designed for single or split -55to +125
supply operation, input
-55 to +125
-25 to +85
+3.0 to +36 common mode includes
ground (negative supply)
-25 to +85
o to +70
o to + 70
-40 to +85
±1.5 to
H
H
H
H
±18or
±1.5to
±7.5 or
+3.0 to 15
This device contains two
op amps and two
H, N/626
H, N/626
N/626
o to
+70
U632, P/646
-55to +125
U632
comparators in a single
package
CMOS
MC14575
0.001
30
0.0001
20K
3.0
1000
±1.5to
±7.5 or
+3.0 to 15
This device contains two
op amps and two
-40 to +85
P/648
comparators in a single
package
Quad
BIPOLAR
LM139
LM139A
LM239
LM239A
LM339
LM339A
LM2901
MC3302
0.10
0.10
0.25
0.25
0.25
0.25
0.25
0.50
5.0
2.0
5.0
2.0
5.0
2.0
7.0
20
0.025
0.025
0.050
0.050
0.050
0.050
0.050
0.500
200K
200K
200K
200K
200K
200K
lOOK
30K
6.0
6.0
6.0
6.0
6.0
6.0
6.0
6.0
1300
1300
1300
1300
1300
1300
1300
1300
MC3430
MC3431
MC3432
MC3433
40
40
40
40
6.0
10
6.0
10
1.0 Typ
1.0 Typ
1.0 Typ
1.0 Typ
1.2K
1.2K
1.2K
1.2K
16
16
16
16
33
33
40
40
Designed for single or split -55 to +125
±1.5 to
-55 to +125
supply operation, input
±18 or
-25 to +85
+3.0 to +36 common mode includes
ground (negative supply)
-25 to +85
o to +70
o to + 70
-40 to +85
-40 to +85
+5.0,
+5.0,
+5.0,
+5.0,
-5.0 High speed comparatorl
-5.0 sense-amplifier
-5.0
-5.0
CMOS
Externally programmable
power dissipation with one
or two resistors
MOTOROLA LINEAR/INTERFACE DEVICES
2-10
o to
+70
o to + 70
+70
+70
o to
o to
J
J
J,
J,
J,
J,
N/646
N/646
N/646
N/646
N/646
N/646
L,
L,
L,
L,
P
P
P
P
AMPLIFIERS
OPERATIONAL AMPLIFIERS
Device
LF347
LF351
LF353
LF355.B
LF356.B
LF357.B
LF411C
LF412C
LM11.C.CL
LM101A
LM108.A
LM124
LM148
LM158
LM201A
LM208.A
LM224
LM248
LM258
LM301A
LM307
LM308.A
LM324.A
LM348
LM358
LM833
LM2900
LM2902
LM2904
LM3900
MC1436.C
MC1437
MC1439
MC1456.C
MC1458.C
MC1458S
MC1490P
MC1536
MC1537
MC1539
MC1556
MC1558
MC1558S
MC1709.A.C
MC1741.C
MC1741S.SC
MC1747.C
MC1748.C
MC1776.C
MC3301
MC3303
MC3358
MC3401
MC3403
MC3458
MC3476
MC3503
MC3558
MC4558.AC.C
MC4741.C
Function
Family of BIFET Operational Amplifiers ................................ .
Family of BIFET Operational Amplifiers ................................ .
Family of BIFET Operational Amplifiers ................................ .
Monolithic JFET Operational Amplifier ................................ .
Monolithic JFET Operation Amplifier .................................. .
Monolithic JFET Operational Amplifier ................................ .
Low Offset. Low Drift JFET Input Operational Amplifier .................. .
Low Offset, Low Drift JFET Input Operational Amplifier .................. .
Precision Operational Amplifiers ..................................... .
General Purpose Adjustable Operational Amplifier ...................... .
Precision Operational Amplifiers ..................................... .
Quad Low Power Operational Amplifier ............................... .
Quad MC1741 Operational Amplifier .................................. .
Dual Low Power Operational Amplifier ................................ .
General Purpose Adjustable Operational Amplifier ...................... .
Precision Operational Amplifiers ..................................... .
Quad Low Power Operational Amplifiers .............................. .
Quad MC1741 Operational Amplifier .................................. .
Dual Low Power Operational Amplifier ................................ .
General Purpose Adjustable Operational Amplifier ...................... .
Internally Compensated Monolithic Operational Amplifier ................ .
Precision Operational Amplifiers ........................... '.......... .
Quad Low Power Operational Amplifier ............................... .
Quad MC1741 Operational Amplifier .................................. .
Dual Low Power Operational Amplifier ................................ .
Dual. Low Noise, Audio Operational Amplifier .......................... .
Quad Single Supply Operational Amplifier ............................. .
Quad Low Power Operational Amplifier ............................... .
Dual Low Power Operational Amplifier ................................ .
Quad Single Supply Operational Amplifier ............................. .
High Voltage Operational Amplifier ................................... .
Dual Operational Amplifier .......................................... .
High Slew Rate Operational Amplifier ................................. .
High Performance Operational Amplifier .............................. .
Dual Operational Amplifiers ......................................... .
High Slew Rate Dual Operational Amplifier ............................ .
Wideband Amplifier with AGC ... , ................................... .
High Voltage Operational Amplifiers .................................. .
Dual Operational Amplifier .......................................... .
High Slew Rate Operational Amplifier ................................. .
High Performance Operational Amplifier .............................. .
Low Noise Dual Operational Amplifier ................................ .
High Slew Rate Dual Operational Amplifier ............... , ............ .
General Purpose Operational Amplifier ................................ .
General Purpose Operational Amplifier .................... , ........... .
High Slew Rate Operational Amplifier ..................... , ........... .
Dual MC1741 Operational Amplifier ....................... , ........... .
General Purpose Operational Amplifier .................... , ........... .
Programmable Operational Amplifier ................................. .
Quad Operational Amplifier ................ , ...... , ...... , ........... .
Quad Differential Input Operational Amplifier ............. " ........... .
Dual Low Power Operational Amplifier ................................ .
Quad Operational Amplifier .......................................... .
Quad Differential Input Operational Amplifier .............. , ........... .
Dual Low Power Operational Amplifier ................................ .
Programmable Operational Amplifier ..................... , ........... .
Quad Differential Input Operational Amplifier .......................... .
Dual Low Power Operational Amplifier ................................ .
Dual High Frequency Operational Amplifier ............................ .
Quad MC1741 Operational Amplifier .................................. .
MOTOROLA LINEAR/INTERFACE DEVICES
2-11
Page
2-14
2-14
2-14
2-16
2-16
2-16
2-26
2-26
2-29
2-36
2-40
2-51
2-61
2-67
2-36
2-40
2-51
2-61
2-67
2-36
2-78
2-40
2-51
2-61
2-67
2-82
2-189
2-51
2-67
2-189
2-92
2-96
2-100
2-118
2-124
2-129
2-135
2-92
2-96
2-100
2-118
2-124
2-129
2-149
2-161
2-166
2-172
2-176
2-180
2-189
2-199
2-221
2-189
2-199
2-221
2-227
2-199
2-221
2-232
2-236
E
II
AMPLIFIERS
OPERATIONAL AMPLIFIERS (con't)
Device
MC33071
MC33072
MC33074
MC33078
MC33079
MC33171
MC33172
MC33174
MC33181
MC33182
MC33184
MC33282
MC33284
MC34001
MC34002
MC34004
MC34071
MC34072
MC34074
MC34080
MC34081
MC34082
MC34083
MC34084
MC34085
MC34181
MC34182
MC34184
MC35001
MC35002
MC35004
MC35071
MC35072
MC35074
MC35080
MC35081
MC35082
MC35083
MC35084
MC35085
MC35171
MC35172
MC35174
MC35181
MC35182
MC35184
OP-27
TL061
TL062
TL064
TL071
TL072
TL074
TL081
TL082
TL084
Function
High Performance, Single Supply Operational Amplifier ................. .
Dual High Performance, Single Supply Operational Amplifier ............ .
Quad High Performance, Single Supply Operational Amplifier ............ .
Low Noise Operational Amplifier ..................................... .
Low Noise Operational Amplifier ..................................... .
Low Power, Single Supply Operational Amplifier ....................... .
Dual Low Power, Single Supply Operational Amplifier ................... .
Quad Low Power, Single Supply Operational Amplifier .................. .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
JFET Operational Amplifier .......................................... .
JFET Operational Amplifier .......................................... .
JFET Input Operational Amplifiers .................................... .
JFET Input Operational Amplifiers .................................... .
JFET Input Operational Amplifiers .................................... .
High Performance, Single Supply Operational Amplifier ................. .
Dual High Performance, Single Supply Operational Amplifier ............ .
Quad High Performance, Single Supply Operational Amplifier ............ .
High Speed Decompensated (AVCL ? 2) JFET Input Operational
Amplifier ........................................................ .
High Speed JFET Input Operational Amplifier .......................... .
Dual High Speed JFET Input Operational Amplifier ..................... .
Dual High Speed Decompensated (AVCL ? 2) JFET Input
Operational Amplifier ............................................. .
Quad High Speed JFET Input Operational Amplifier ..................... .
Quad High Speed Decompensated (AVCL ? 2) JFET Input
Operational Amplifier ............................................. .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
JFET Input Operational Amplifiers .................................... .
JFET Input Operational Amplifiers .................................... .
JFET Input Operational Amplifiers .................................... .
High Performance, Single Supply Operational Amplifier ................. .
Dual High Performance, Single Supply Operational Amplifier ............ .
Quad High Performance, Single Supply Operational Amplifier ............ .
High Speed Decompensated (AVCL ? 2) JFET Input Operational
Amplifier ........................................................ .
High Speed JFET Input Operational Amplifier .......................... .
Dual High Speed JFET Input Operational Amplifier ..................... .
Dual High Speed Decompensated (AVCL ? 2) JFET Input
Operational Amplifier ............................................. .
Quad High Speed JFET Input Operational Amplifier ..................... .
Quad High Speed Decompensated (AVCL ? 2) JFET Input
Operational Amplifier ............................................. .
Low Power, Single Supply Operational Amplifier ....................... .
Dual Low Power, Single Supply Operational Amplifier ................... .
Quad Low Power, Single Supply Operational Amplifier .................. .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Ultra Low Noise Precision, High Speed Operational Amplifiers ........... .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Low Power JFET Input Operational Amplifier .......................... .
Low Noise JFET Input Operational Amplifier ........................... .
Low Noise JFET Input Operational Amplifier ........................... .
Low Noise JFET Input Operational Amplifier ........................... .
JFET Input Operational Amplifier ..................................... .
JFET Input Operational Amplifier ..................................... .
JFET Input Operational Amplifier ..................................... .
MOTOROLA LINEAR/INTERFACE DEVICES
2-12
Page
2-267
2-267
2-267
2-241
2-241
2-250
2-250
2-250
2-294
2-294
2-294
2-257
2-257
2-260
2-260
2-260
2-267
2-267
2-267
2-283
2-283
2-283
2-283
2-283
2-283
2-294
2-294
2-294
2-260
2-260
2-260
2-267
2-267
2-267
2-283
2-283
2-283
2-283
2-283
2-283
2-250
2-250
2-250
2-294
2-294
2-294
2-308
2-320
2-320
2-·320
2-328
2-328
2-328
2-335
2-335
2-335
AMPLIFIERS
HIGH FREQUENCY AMPLIFIERS
Device
MC1350
MC1445
MC1490P
MC1545
MC1590G
MC1733,C
NE592
SE592
~FU~~i;17fier
Cha:t:~e9
.................................................. See
Wideband Amplifier .................................................
Wideband Amplifier with AGC ........................................
Wideband Amplifier .................................................
Wideband Amplifier with AGC ........................................
Differential Video Amplifier ...........................................
Video Amplifier .....................................................
Video Amplifier ................................. : ...................
2-108
2-135
2-108
2-141
2-153
2-303
2-303
MISCELLANEOUS AMPLIFIERS
Device
MC1454G
MC1554G
MC3405
MC3505
TCA0372
Function
1-Watt Power Amplifier ............................................. .
1-Watt Power Amplifier ............................................. .
Dual Operational Amplifier plus Dual Voltage Comparator ............... .
Dual Operational Amplifier plus Dual Voltage Comparator ............... .
Dual Power Operational Amplifier .................................... .
Page
2-114
2-114
2-205
2-205
2-317
COMPARATORS
Device
LM111
LM139,A
LM193,A
LM211
LM239,A
LM293,A
LM311
LM339,A
LM393,A
LM2901
LM2903
MC1414
MC1514
MC3302
MC3405
MC3430
MC3431
MC3432
MC3433
MC3505
Function
High Performance Voltage Comparator .................................
Quad Single Supply Comparators .....................................
Dual Comparators ...................................................
High Performance Voltage Comparator .................................
Quad Single Supply Comparators .....................................
Dual Comparators ...................................................
High Performance Voltage Comparator .................................
Quad Single Supply Comparators .....................................
Dual Comparators ...................................................
Quad Single Supply Comparators .....................................
Dual Comparators ...................................................
Dual Differential Voltage Comparator ..................................
Dual Differential Voltage Comparator ..................................
Quad Single Supply Comparators .....................................
Dual Operational Amplifier plus Dual Voltage Comparator ................
High Speed Quad Comparator ........................................
High Speed Quad Comparator ........................................
High Speed Quad Comparator ........................................
High Speed Quad Comparator ........................................
Dual Operational Amplifier plus Dual Voltage Comparator ................
Page
2-45
2-57
2-73
2-45
2-57
2-73
2-45
2-57
2-73
2-57
2-73
2-88
2-88
2-57
2-205
2-213
2-213
2-213
2-213
2-205
RELATED APPLICATION NOTES
Application
Note
AN926, AR115
AN273A
AN513A
AN587, EB20
EB57
Title
Techniques for Improving the Settling of a DAC and Op.
Amp. Combination ...................................
Getting More Value Out of an Int. Op. Amp. Data Sheet .....
A High Gain Int. Circuit RF-IF Amp. with Wide Range AGC ...
Analysis and Design of the Op. Amp. Current Source .......
An Economical FM Trans. Voice Proc. from a Single
Integrated Circuit .....................................
MOTOROLA LINEAR/INTERFACE DEVICES
2-13
Related
Device
LF357, MC34084,
MC34085, MC34087
MC1439, 1539
MC1490P, MC1590G
MC1741
MC3401
E
II
®
LF347
LF351
LF353
MOTOROLA
FAMILY OF BIFET
OPERATIONAL AMPLIFIERS
JFET INPUT OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
These low cost JFET input operational amplifiers combine two
state-of-the-art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier
has well matched high voltage JFET input devices for low input
offset voltage. The BIFET technology provides wide bandwidths
and fast slew rates with low input bias currents, input offset currents, and supply currents.
These devices are available in single, dual and quad operational
amplifiers which are pin-compatible with the industry standard
MC1741, MC1458, and the MC3403/LM324 bipolar devices.
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
(LF351, LF353 Only)
a.
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
(LF351, LF353 Only)
• Input Offset Voltage of 5.0 mV Max (LF347B)
1 '
OffsetNulI~' NC
lnvt Input'
Noninvt Input , .
• Low Input Bias Current - 50 pA
VEE
4
,
Vee
ti
Output
•
Offset Null
LF351
(Top View)
• Low Input Noise Voltage - 16 nV/YHz
OutPutA~' VCC
• Wide Gain Bandwidth - 4.0 MHz
Inputs A { , V
• High Slew Rate - 13 V/p,s
--:::-' Output B
'+A
"l'nputs B
EE'
B+'
r
LF353
(Top View)
• Low Supply Current - 1.8 rnA per Amplifier
• High Input Impedance - 10 12
NSUFFIX
PLASTIC PACKAGE
CASE 646-06
(LF347 Only)
n
• High Common-Mode and Supply Voltage Rejection
Ratios - 100 dB
D SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
MAXIMUM RATINGS
Symbol
Value
Unit
Supply Voltage
Rating
VCC
VEE
+18
-18
V
Differential Input Voltage
VID
+30
V
VIDR
+15
V
ts
Continuous
PD
900
mW
11(JJA
10
mWrC
Input Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Power Dissipation at TA = + 25°C
Derate above T A = + 25°C
o to
TA
Operating Junction Temperature Range
TJ
115
°c
Tst!!
-65to +150
°c
Storage Temperature Range
+ 70
°C
Operating Ambient Temperature Range
NOTES;
1. Unless otherwise specified, the absolute maximum negative input voltage is
limited to the negative power supply.
2. Any amplifier output can be shorted to ground indefinitely. However, if more
than one amplifier output is shorted simultaneously, maximum junction temperature
ratings may be exceeded.
(Top View)
ORDERING INFORMATION
Function
Device
Single
Single
Dual
Dual
Quad
Quad
Quad
MOTOROLA LINEAR/INTERFACE DEVICES
2-14
LF351D
LF351N
LF353D
LF353N
LF3470
LF347BN
LF347N
Package
SO-8
Plastic DIP
SO·8
Plastic DIP
SO-14
Plastic DIP
Plastic DIP
lF347,lF351, lF353
E
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25·C unless otherwise noted).
LF347B
Symbol
Characteristic
Input Offset Voltage (RS '" 10 k, VCM = 0)
TA = +25·C
O·C '" TA '" +70·C
Average Temperature Coefficient of Input Offset
Voltage
RS'" 10 k, O·C '" TA '" +70·C
VIO
l1VIO/l1T
Input Offset Current (VCM = 0, Note 3)
TA = +25·C
O·C "" TA "" +70·C
110
Input Bias Current (VCM = 0, Note 3)
TA = +25·C
O·C""TA"" +70·C
liB
Min
LF347, LF351, LF353
Typ
Max
Min
Typ
Max
-
1.0
-
5.0
8.0
-
10
-
-
-
25
-
100
4.0
-
-
-
200
8.0
-
-
Unit
-
5.0
-
10
13
10
-
25
100
4.0
pA
nA
200
8.0
pA
nA
mV
p.V/"C
r;
-
10 12
-
-
10 12
-
n
Common Mode Input Voltage Range
VICR
:tll
+15
-12
-
:tll
+15
-12
-
V
Large-Signal Voltage Gain (VO =
AVOL
50
25
100
-
-
25
15
100
-
:t14
-
:t12
:t14
Input Resistance
V, RL = 2.0 k)
TA = +25·C
O·C""TA"" +70·C
:t 10
50
50
V/mV
Common Mode Rejection Ratio (RS '" 10 k)
CMRR
80
100
-
70
100
-
Supply Voltage Rejection Ratio (RS '" 10 k)
PSRR
80
100
-
70
100
-
Output Voltage Swing (RL = 10 k)
Vo
Supply Current
10
LF347
LF351
LF353
Slew Rate (AV = + 1)
BWp
Equivalent Input Noise Voltage
(RS = 100 n, f = 1000 Hz)
en
Equivalent Input Noise Current (f = 1000 Hz)
in
Channel Separation (LF347, LF353)
1.0 Hz '" f '" 20 kHz (Input Referred)
-
12
-
V
dB
dB
rnA
-
SR
Gain-Bandwidth Product
:t
-
-
-
-
-
7.2
11
-
-
13
4.0
16
0,01
-120
7.2
1.8
3.6
11
3.4
6.5
13
-
nV/YHz
0.01
-
pAlYHz
-120
-
dB
4.0
16
V/p.s
MHz
For Typical Characteristic Performance Curves, refer to MC34001/34002!34004 data sheet.
NOTES: (continued)
3. Input bias currents of JFET input op amps approximately double for every lOoe rise in junction temperature. To maintain junction temperatures as
close to ambient as is possible, pulse techhiques are utilized during test.
MOTOROLA LINEAR/INTERFACE DEVICES
2-15
®
fI
LF355, LF356,
LF357* LF355B,
LF356B, LF357B*
MOTOROLA
Specifications and Applications
Information
MONOLITHIC JFET
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
MONOLITHIC JFET INPUT
OPERATIONAL AMPLIFIERS
These internally compensated operational amplifiers incorporate
highly matched JFET devices on the same chip with standard
bipolar transistors. The JFET devices enhance the input characteristics of these operational amplifiers by more than an order
HSUFFIX
METAL PACKAGE
CASE 601-04
of magnitude over conventional amplifiers.
NC
This series of op amps combines the low current characteristics
typical of FET amplifiers with the low initial offset voltage and
offset voltage stability of bipolar amplifiers. Also, nulling the offset
voltage does not degrade the drift or common mode rejection.
•
Low Input Bias Current - 30 pA
•
Low I nput Offset Current - 3.0 pA
•
Low Input Offset Voltage - 1.0 mV
•
Temperature Compensation of Input Offset Voltage 3.0 Jl.V/oC
•
Low Input Noise Current - 0.01 pA/y'RZ
•
High Input Impedance - 1012n
•
High Common-Mode Rejection Ratio - 100 dB
•
High DC Voltage Gain - 106 dB
8
'€8a
Offset Null
Invt Input 2
Noninvt Input 3
VEE 4
• LF355/355B -
Low Power Supply Current
• LF356/356B -
Wide Bandwidth
• LF357/357B -
Wider Bandwidth Decompensated (AVmin = 5)
ORDERING INFORMATION
LF355BH,H
LF355BJ,J
LF356BH,H
LF356BJ,J
LF357BH,H
LF357BJ,J
o to
oto
oto
Package
+70'C
+70'C
Metal Can
Ceramic DIP
+70'C
+70OC
Metal Can
Ceramic DIP
oto +70°C
oto + 70°C
Metal Can
Ceramic DIP
o to
-
+
NC
7 Vee
6 Output
5 Offset Null
(Top View)
LF355/355B LF356/356B LF357/357B
1.5p.s_
Fast Settling Time to 0.01%
4.0/Jos
1.5/Jos
Fast Slew Rate
5.0V/IJ.S
12 V//Jos
50 V//Jos
Wide Gain Bandwidth
2.5 MHz
5.0 MHz
20 MHz
Low Input Noise Voltage
20 nV/YHz 12 nV/YHz 12 nV/YHz
Temperature Range
(Top View)
J SUFFIX
CERAMIC PACKAGE
CASE 693-02
SERIES FEATURES
Device
VEE
1
APPLICATIONS
The LF series is suggested for all general
purpose FET input amplifier requirements
where precision and frequency response
flexibility are of prime importance.
Specific applications include:
•
•
•
•
•
Sample and Hold Circuits
High Impedance Buffers
Fast DI A and AID Converters
Precision High Speed Integrators
Wideband, Low Noise, Low Drift Amplifiers
°NOTE: The LF3571357B are designed for wider
bandwidth applications. They are decompensated
(AVmin = 5).
MOTOROLA LINEAR/INTERFACE DEVICES
2-16
LF355,LF356, LF357,LF355B,LF356B, LF357B
E
MAXIMUM RATINGS
Rating
Supply Voltage
Differential Input Voltage
Symbol
LF35581
3568/3578
LF3551356/357
Unit
VCC
VEE
+22
-22
+18
-18
V
VID
±40
±30
V
Input Voltage Range (Note 1)
V, DR
±20
±16
V
Output Short-Circuit Duration
TS
Operating Ambient Temperature Range
TA
Operating Junction Temperature
TJ
115
°C
Tstg
-65 to +150
°C
Storage Temperature Range
Continuous
o to
+70
°C
..
Note 1. Unless otherwise specified, the absolute maximum negative mput voltage IS equal to the negative power supply
voltage.
CIRCUIT SCHEMATIC
Offset Null
~
Vee
7
J3
2 0----+----,
Inv. Input
Input
'C1
"C2
=
=
R2
R3
30
30
5.0 pF on LF357.
2.0 pF on LF357.
MOTOROLA LINEAR/INTERFACE DEVICES
2-17
fI
LF355,LF356,LF357,LF3558,LF3568,LF3578
DC ELECTRICAL CHARACTERISTICS (VCC = 15 to 20 V, VEE = -15 to -20 V for LF355B/356B/357B; VCC = 15 V, VEE =
-15 V for LF355/356/357' TA = O°C to + 70°C unless otherwise noted)
LF355B16B178
Characteristic
Input Offset Voltage (RS
(TA = 25°C)
(Over Temperature)
=
Symbol
500, VCM
= 0)
Change in Average TC with VIO Adjust
(RS = 50 0) (Note 2)
Input Offset Current (VCM
(TJ = 25°C)
(TJ .. 70°C)
Input Resistance (TJ
VIO
-
-
Average Temperature Coefficient of Input Offset
Voltage
(RS = 500)
Input Bias Current (VCM
(TJ = 25°C)
(TJ .. 70°C)
Min
= 0)
= 0)
(Note 3)
= 25°C)
Large Signal Voltage Gain
(VO = ± 10 V, RL = 2.0 k, VCC
VEE = -15V)
(TA = 25°C)
(O°C" TA" +70°C)
Max
3.0
-
5.0
6.5
Max
-
3.0
10
13
5.0
-
5.0
-
aTC/aVIO
-
0.5
-
-
0.5
20
1.0
-
3.0
-
-
100
5.0
-
-
-
-
110
-
3.0
liB
-
-
30
-
-
r;
10 12
",vrc
",vrc
permV
30
50
2.0
pA
nA
200
8.0
pA
nA
-
10 12
0
V/mV
AVOL
=
15 V,
-
25
15
200
±13
±12
-
±12
±10
±13
±12
±11
+15.1
-12.0
-
±10
+15.1
-12.0
-
V
CMRR
85
100
-
80
100
85
100
-
80
100
-
dB
PSRR
±12
±10
VICR
Common-Mode Rejection Ratio
Supply Voltage Rejection Ratio (Note 4)
-
-
-
V
Vo
= 10 kO)
= 2 kO)
Input Common-Mode Voltage Range
(VCC = 15 V, VEE = -15 V)
= 25°C, VCC =
Unit
mV
-
-
200
Supply Current (TA
VEE = -15V)
LF355B/355
LF356B1357B
LF356/357
Typ
aVIQiaT
50
25
Output Voltage Swing
(VCC = 15V, VEE = -15V, RL
(VCC = 15V, VEE = -15V, RL
Min
-
(Note 3)
LF355/617
Typ
15 V,
-
dB
rnA
ID
-
2.0
5.0
-
4.0
7.0
-
-
-
2.0
4.0
-
-
5.0
10
AC ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = -15 V, TA = 25°C)
LF3558/355
Characteristic
Symbol
Slew Rate (Note 5)
(Av = 1) LF355/356
(Av = 5) LF357
Min
Typ
Max
LF3568/356
Min
Typ
Max
LF3578/357
Min
Typ
Max
SR
-
GBW
-
Settling Time to 0.01% (Note 6)
ts
-
Equivalent Input Noise Voltage
(RS = 100 n, f = 100 Hz)
(RS = 100 n, f = 1000 Hz)
en
Equivalent Input Noise Current
(f = 100 Hz)
(f = 1000 Hz)
in
Input Capacitance
Ci
Gain-Bandwidth Product
5.0
-
-
7.5
12
-
-
-
2.5
-
-
5.0
4.0
-
-
1.5
-
-
-
30
50
-
1.5
20
-
Unit
V/",s
MHz
",s
nV/YHz
-
25
20
-
-
15
12
-
-
-
-
0.Q1
0.01
-
0.Q1
0.01
3.0
-
-
-
-
-
15
12
-
-
-
0.Q1
0.Q1
-
3.0
-
pA/YHz
3.0
pF
NOTES
tudes increasing or decreasing simultaneously, in accordance with
common practice.
(5) The Min. slew rate limits apply for the LF3568 and the LF357B, but
do not apply for the LF356 or LF357.
(6) Settling time is defined here, for a unity gain inverter connection
using 2.0 k resistors for the LF355/6. It is the time required for the
error voltage (the voltage at the inverting input pin on the amplifier)
to settle to within 0.01% of its final value from the time a 10 V step
input is applied to the inverter. For the LF357, Ay = - 5.0, the feed·
back resistor from output to input is 2.0 k and the output step is 10
V (see settling time test circuit).
(1) Unless otherwise specified, the absolute maximum negative input
voltage is equal to the negative power supply.
(2) The temperature coefficient of the adjusted input offset voltage
changes only a small amount 10.5 J.LVrC typically) for 9ach mV of
adjustment from its original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset
adjustment.
(3) The input bias currents approximately double for every 10°C rise in
junction temperature, TJ. Due to limited test time, the input bias
currents are correlated to junction temperature. Use of a heat sink
is recommended if input bias current is to be kept to a minimum.
(4) Supply yoltage rejection ratio is measured for both supply magni·
MOTOROLA LINEAR/INTERFACE DEVICES
2-18
LF355,LF356,LF357,LF355B,LF356B,LF357B
TYPICAL DC PERFORMANCE CHARACTERISTICS
(Curves are for LF355. LF356. and LF357 series unless otherwise specified)
INPUT BIAS CURRENT versus CASE TEMPERATURE
~
lOOk
~
10k
~
~ lOOk
~
=>
u
'"
m
>-
~
~
~
=>
u
lk
."'''~
100
~
'"
~
~
~
:j
VCC"5V.VEE"-5V
VCC" 10 V. VEE" -10 V.
10
VCC"5V.VEE--5V
LF355
-25
5.0
35
',,0'''$
100
1.0
~
0.1
-55
VCC" 20 V. VEE" -20 V
lk
;;;
VCC" 10 V. VEE" -10 V
10
10k
~
Vcc "20V. VEE" - 20V
1.0
to-
0.1
-55
65 70
LF35617
-25
5.0
AGURE 3 - INPUT BIAS CURRENT
versus INPUT COMMON-MODE VOLTAGE
40
70
r-----
60
r-----
>-
VCC "1+ 15 V
VEE" -15 V
TA" 25 0 C
RL" 50 k
50
~
;;;
40
:;
30
~
20
Free~ i-"'"
I-""
----
III
Free~r
10
o
I-"
-10
0
-5.0
RL"ik
r----- -TA"25 0 C
20
>
~
.......
~
V
... V
10
.;'
6
>
Heat Sink
5.0
V
V
V
o
~ ~;:th-
iI
30
w
'"
;
,;'
~/
-
"'-
~
~
~
LF35617
With Heat Sink
"-:-F355
0.
. . .V
LF35617
........... V'
~
=>
"
65 70
FIGURE 4 - OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE (LF355B1356B/357B)
80
~
35
TC. CASE TEMPERATURE (DC)
TC. CASE TEMPERATURE (DC)
~
E
FIGURE 2 - (LF356 AND LF357 SERIES)
FIGURE 1 - (LF355 SERIES)
o
10
o
10
5.0
VIC. COMMON·MOOE INPUT VOLTAGE (VOLTS)
20
15
VCC. VEE. SUPPLY VOLTAGE (±VOLTS)
SUPPLY CURRENT versus SUPPLY VOLTAGE
FIGURE 5 - (LF355 SERIES)
«
FIGURE 6 - (LF356 AND LF357 SERIES)
4.0
«
.§
8.0
~
7.0
3.0
=>
6.0
~
5.0
.§
>-
~
a'"
"~
~
~
E
----
~
~
-
2.0
1.0
o
5.0
Te
= 25 0 C
1-
E
~
4.0
3.0
LF35617
LF355
10
Tc" 25 0 C
t-
15
18
20
25
2.0
o
5.0
10
15
VCC. VEE. SUPPLY VOLTAGE (±VOLTS)
VCC. VEE. SUPPLY VOLTAGE (±VOL TS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-19
20
25
fI
LF355,LF356,LF357,LF355B,LF356B,LF357B
TYPICAL DC PERFORMANCE CHARACTERISTICS (continued)
FIGURE 7 -
NEGATIVE CURRENT LIMIT
...
FIGURE 8 -
~
'"z
~
-15
w
'"
'"
!:;
0
>
-
r-.
~
!;
:!
'"z
~
I
Vee~
+15V f - - VEE ~ -15V
Te ~ 25°e
f---
15
w
~
-10
~
1
.1
Vee ~ +15V_
VEE ~ -15V
Te ~ 25°e
-
~
0
:!
'"'"
"
!:;
0
r'---
0
w
> -5.0
;::
'"z~
>
10
~
,
g
"-
w
>
5.0
1\
1<'
1\
6
>
-5.0
-10
-15
-20
-25
-30
-35
>
-40
10
5.0
ISink. OUTPUT SINK CURRENT (mA)
~
0
~
w
:!
w
~
>
i
~
o
15
~
""S
10
w
>
;::
u;
~
>"
5.0
/'
/'
V
V
20
30
35
40
·20
~
!:;
0
> -15
k-":
V
25
FIGURE 10 - NEGATIVE COMMON·MODE
INPUT VOLTAGE LIMIT
'"'"
ooe '" TA '" 70'C
20
>;
15
ISink. OUTPUT SINK CURRENT (mA)
FIGURE 9 - POSITIVE COMMON·MODE
INPUT VOLTAGE LIMIT
~o
\
;::
u;
6
'"'"
POSITIVE CURRENT LIMIT
~
TC
~
;;;
V
w
0
0
·10
,/'
>;
z
0
" -5.0
8"
w
>
~
~
25'C
~
~
~
10
5.0
15
~
20
;:
°_5.0
-10
FIGURE 11 -
-20
-15
VEE. NEGATIVE SUPPLY VOLTAGE (VOLTS)
VCC. POSITIVE SUPPL Y VOLTAGE (VOLTS)
AGURE 12 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
OPEN LOOP VOLTAGE GAIN
10M
RL ' 2k
-=- f-~ RS'50
==
~
~
z
iii
~
VCC'15V
28 -VEE'-15V
TA "'25°C
~
~
1M
24
V ....
~
~
,.,
o
>
~
g
.j
1
TA'25'C
~
20
~
o
16
~
12
...>
lOOk
..:.
j
o
o
~ 8.0
~
4.0
10 k
5.0
10
15
20
I
V
0.1
1.0
10
RL. OUTPUT LOAD RESISTANCE (kOl
VCC. VEE. SUPPLY VOLTAGE (±VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-20
100
LF355,LF356, LF357,LF355B,LF356B,LF357B
TYPICAL AC PERFORMANCE CHARACTERISTICS
E
GAIN BANDWIDTH PRODUCT
FIGURE 13 -
(LF355 SERIESI
FIGURE 14 -
5.0
LF355
'"~
t;
'"
'\.
4.0
0
~
'"0-0
i<
"
~
I
VCC" 10 V. VEE" -10 V
~
3.0
~
~
"
:;
~
z
VCC" 15 V, VEE" -15 V
~~
;;\
"
8.0
\.
~
~
z
(LF3561357 SERIES)
8.5
2.0
~
z
LF357 Curve. Identical,
But Multiplied bV 4.
7.0
"\.
6.0
~
LF356
"-
VCC" 10 V. VEE" -10 V
VCC" 15 V, VEE" -15 V
"'<
5.0
""" ......
~
'"
"-
~
~
i'---
4.0
1.0
-55
-35
-15
5.0
25
45
65
85
105
-55
125
-35
-15
5.0
TA, AMBIENT TEMPERATURE IOC)
25
45
65
85
TA, AMBIENT TEMPERATURE IOC)
--
105
125
INVERTER SETTLING TIME
FIGURE 15 -
(LF355 SERIES)
~
o
?
>
o
~'"
~
t--t---
5.0
T~" 25 0C
lOmV
VCC"15V
VEE"-15V
«
o
~
~
I mV
t!J
z
~
10mV .......
II
-10
0.1
0.5
0.2
FIGURE 17 -
t---
T~" 250~
I II
I II
VCC"15V
VEE"-15V
I
10mV
I
5.0
~
/J
'/
LF356, Av = - 1
LF357, Av = - 5
~
I mV
i'
1 mV
'":;«
~
~ -5.0
10
(LF356 AND LF357 SERIES)
w
>
6
1/
f----
o
2
i-"'"
'"
:;
>
j
V V
~
"'
,
LF355
10
FIGURE 16 -
:;
o
>
~ -5.0
I mV
:-t....
1-...
2.0
1.0
10mV
0-
"
'"o
~
5.0
I
-10
0.1
10
0,5
0.2
:\
\.\1
2,0
1.0
5.0
',. SETTLING TIME I.,)
FIGURE 18 -
NORMALIZED SLEW RATE
OPEN LOOP FREQUENCY RESPONSE
I
1.8
1.6
VCC"15V
VEE"-15V
"- r---......
1.4
1.2
1.0
0.8
--
~
110
~
90
«
'"
70
z
w
LF35617
:;
~
~
~~
~ I:\..
~""'<
0
>
LF356
0.6
"-
g
50
~
30
VCC" 15 V
VEE"-15V
~,
~
.:.
0
«>
0.2
o
-55
-35
-15
5.0
25
45
65
85
IDS
LF356
LF355 -'" ~"~ t'\..
~
I
~
I
10
0
-10
.....
10
125
."
~
~ l"
0
0.4
LF357
100
Ik
10k
lOOk
1M
10M
f, FREQUENCY 1Hz)
TA, AMBIENT TEMPERATURE IOC)
MOTOROLA LINEAR/INTERFACE DEVICES
2-21
10
LF355,LF356,LF357,LF355B,LF356B,LF357B
TYPICAL AC PERFORMANCE CHARACTERISTICS (continued)
fI
BODE PLOT
FIGURE 19 -
r-
...... ="Gain
Iii -~
r-
!-10
C)
(LF355 SERIES)
FIGURE 22 1000
I I
10
5.0
;;:
OUTPUT IMPEDANCE
I
I
LF355
75
Phase
VCC' 15V
VEE'-15V
~
-zo
r-=
-35
,
~
,-,
,
Z.o
1.0
'"
a..
-75
100
w
u
'-
Z
~
;!!
10
i5NO
1.0
....
~
....
~ 1= Av -100
LF355
Av
Av
15
10
5.0
lk
10k
100 k
0 '---f-- Gain
;;-5.0 ' -
~ -10
-15
-ZO
-Z5
-30
-35
I""""2k
IT'
FIGURE 23 -
125
100
::--..
75
25
~
o
........
N
.
,=, , , , , ,
-40
1.0
25
~
r-\~
I- -,
10
2.0
I",,~
~
~
50
75
-100
-125
-150
100
20
LF356
0.01
lk
100 k
10k
z
'"
10
5.0
~
;;:
r-...
I I
.......... I I
1--,
-20
1.0
VCC = 15 V
VEE=-15V
100
75
......
50
Gain
~~
rr-_
.
25
i"..
.....
2 pF
..........
10
20
Av
~
ffi
"
~
"-
-25 ~
-50 :::t:
-75 c..
-100
-125
-150
-175
100
LF357
0.01
1k
Av
100
o e
"-
,=, '"11
2.0
(LF357 SERIES)
TA 25°C
VCC 15 V
VEE -15 V
LF357
"]'I..
0
-5.0 H~
-10
-15
FIGURE 24 100
Phase
30
25
20
15
t, FREQUENCY (Hzl
(LF357 SERIES)
I I
I I
35
10M
~
e
t, FREQUENCY (MHz)
FIGURE 21 -
1M
(LF356 SERIES)
50 ~
-
r-'_
10M
LF356,
VCC=15V
VEE'-15V
~~J>L
r-
1M
100
Phase
i
1
t, FREQUENCY (Hz)
(LF356 SERIES)
I I
I I
I I
:---...
VCC 15 V
VEE--15V
TA - 25°C
o. 1
-125
100
t. FREQUENCY (MHz)
FIGURE 20 -
10
-100
zo
10
e
-50
"- r--....
, , , ,,
:s
-25 ~
.........
•
_
en
~
o '"
Zlk .,....
-Z5 I-\~
-30
50
25
~@
-15
~~
100
II
(LF355 SERIES)
10 k
t, FREQUENCY (MHz)
~
-
100 k
t, FREQUENCY
MOTOROLA LINEAR/INTERFACE DEVICES
2-22
10
1M
(Hz)
10M
LF355,LF356,LF357,LF355B,LF356B,LF357B
TYPICAL AC PERFORMANCE CHARACTERISTICS (continued)
FIGURE 25 -
"l
~
RL
k
TA" 15°C
a
i=
~
i
w
.........
80
60
~
40
G
~
10
w
16
"
"'~
">
~
I'....
" ,,-""-i'...'h.
LF357
20
~
6
>
"'l"
o
10
100
lk
10 k
100 k
1M
TA 25°C
VCC"15V
VEE" -15 V
RL "1 k
Av'" 1
"'""0...'\
(LF356 AND LF357 SERIES)
60
LF357
I\,.
~
40
t- Negative Supply
_.
10
:;,;g:
0
r+
100
10 M
"-
""'" "-
LF356 '
1k
10k
lOOk
"'
1M
10M
100M
f, FREQUENCY 1Hz)
f, FREQUENCY 1Hz)
EQUIVALENT NOISE VOLTAGE
FIGURE 29 -
@
(LF355/3561357 SERIES)
FIGURE 30 (EXPANDED SCALE)
~ 100
140
-f:
~
120
~
100
."'
">
~w
«
"'
':;
TA" 15°C
VCC" 15 V
VEE"-15V
w
a
",
>
~
60
~
a
z
i
!'...
~
«
LF355
r-
80
LF35617
I
-
If1"Io....
>
:3
::il
of
1111
lk
100
10k
\'\.
40
'\. i\... .........LF355
10
,
.....
LF35617 .......
o
10
500
1k
f, FREQUENCY 1Hz)
f, FREQUENCY 1Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-23
50 k
100 k
LF355,LF356,LF357,LF3558,LF3568,LF3578
TYPICAL CIRCUIT CONNECTIONS
FIGURE 31 -
DRIVING CAPACITIVE LOADS
FIGURE 32 -
LARGE POWER BANDWIDTH AMPLIFIER
10 k
5.0 k
*LF35516 R
LF357 R
= 5.0 k
= 1.25 k
V out
+2.0 V
-2.0
r
v-l
C\
10V / \
-IOVV
Due to a unique output stage design these amplifiers have the
ability to drive large capacitive loads and still maintain stability,
CL(max) ~ 0.01 J.LF.
For distortion < 1% and a 20 Vp-p VOut
swing, power bandwidth is: 500 kHz.
Overshoot 0;;;; 20%
Settling time (ts ) "= 5.0 p.s
FIGURE 33 -INPUT OFFSET VOLTAGE ADJUSTMENT
FIGURE 34 -
SETTLING TIME TEST CIRCUIT
2.0 k, 0.1%
Vcc
10VS
o
2k,O.1%
"'400,0.1%
+15 V
5.0 k, 0.1%
"",0 k, 0.1%
Vout
sum:~~:t-
___
5AkV'VO~.I_%________~
1-----,-0 +I 5 V
2N4416
•
V lOis adjusted with a 25 k potentiometer
•
The potentiometer wiper is connected to
•
For
temperature coefficient of 100
ppm/DC or Jess the additional drift with adjust is ~ 0.5 J.lV I
°C/m V of adjustment.
•
Typical overall drift: 5.0 J.LV/oC ±(O.5 /olVfJC/mV
of adjustment.)
potentiometers
Oscilloscope
Vee
with
• FET used to isolate the probe capacitance
• Output = 10 V step
"Ay = -5 fer LF357
FIGURE 36 -
FIGURE 35 - NONINVERTING UNITY GAIN
OPERATION FOR LF357
R2
R1C;;;;'
R1
• Settling time is tested with the LF35516
connected as unity gain inverter and LF357
connected for Ay = - 5
(21r)(~ MHz)
INVERTING UNITY GAIN FOR LF357
R2
R2 + RS
R1C;;;;'
R1
= -----
4
(211'){~ MHz)
= Ri
AV(DC) ~ 1
AV(DC) ~-1
f- 3dB ""'" 5 MHz
f_ 3dB ""'" 5 MHz
MOTOROLA LINEAR/INTERFACE DEVICES
2-24
LF355,LF356,LF357, LF355B,LF356B,LF357B
TYPICAL APPLICATIONS
FIGURE 37 - WIDE BW, LOW NOISE,
LOW DRIFT AMPLIFIER
FIGURE 38 -
ISOLATING LARGE CAPACITIVE LOADS
R2
5.1 k
V out
R1
I
5
IO.5/-lF
=:r-
-2 V
• Power BW: fmax = 21i~p ~ 240 kHz
eL
---.C
+2 OV
Cl :~:
-L
•
Overshoot 6%
•
•
ts == 10ps
When driving large
el.
the V out slew rate is determined by CL
and 'out(rnax):
• Parasitic input capacitance
te1
~
3 pF for LF355, LF356, and LF357 plus any
additional layout capacitance) interacts with feedback elements and creates undesirable high frequency pole. To compensate add C2 such that: R2C2
~
AV out
'out
002
.6.1
CL
0.5
- - = -:::. ~
R1C1.
FIGURE 39 - 8-BIT D/A WITH OUTPUT CURRENT
Vee TO VOLTAGE CONVERSION
FIGURE 40 -
V/Jls= 0.04 V/J,LS (with CL shown)
PRECISION CURRENT MONITOR
13
MSB
R14
14
A1
Vref
A2
15
A3
R15
A4
-=-
MC14OBL-B
A5
R1
Vref;;::: 2.0 V,dc
R14~ R15" 1.0k!l
Ra ~ 5.0 k!l
Vee
Ra
A6
A7
4
AS
Va
LSB
16
•
3
Vo = 5 R1/R2 (V/mA of Is)
•
R1, R2, R3: 0.1% Resistors
•
Use lF355 for..
Theoretical Va
Vref
[Al
A2
A3
A4
A5
A6
A7
T+""4+a+ffi+"i2+"'64+i2s+
VO=R'14(Rol
AS]
256
Adjust Vrsf. R14 or AO so that Va with all digital inputs at high
level is equal to 9.961 volts.
2V
[ 1
Va "'..,..-;(5 k)
1
1
1
1
1
2'"+4"+ '"8+ 16+3'2+ 64+
1
128
+
1]
Low liB
..
Low V,O
..
Low Supply Current
FIGURE 42 - HIGH IMPEDANCE, LOW DRIFT
INSTRUMENTATION AMPLIFIER
256
1 1'" 9.961 v
'" 10 V 255
256
FIGURE 41 -
Common-Mode Range to Supply Range
..
7
LONG INTERVAL RC TIMER
I
A1
lF355
6
R3
R
4
+15 V
A3
2
R2
R
AV
LM30BA
V out
3
+15 V
R3
R5
• Polycarbonate or
PolystYrene Capacitor
Time (t)
= R4CQn (VR/VR-VI),
A3 == R4. A5 = 0.1 A6
If R1 = R2: t = 0.693 A4C
j
-15 V
• Vout "" R31R[2R2IR1 + 1j
tN, VEE + 2 V OliO Vin common-mode EO Vee
• System V,O Adjusted via A2 V,O Adjust
• Trim R3 to Boost up CMRR to 120 dB
Design Example: 100 Second Timer
C = 1}JF
R3"" R4 = 144 M
A5"" 2 k
R1
~,
R2 = 1 k
-15 V
MOTOROLA LINEAR/INTERFACE DEVICES
2-25
II
II
®
LF411C
LF412C
MOTOROLA
rl-----A-d-v-a-n-c-e-I-n-f-o-r-m-a-t-i-o-n-----.
SINGLE/DUAL JFET
OPERATIONAL
AMPLIFIER
LOW OFFSET. LOW DRIFT JFET INPUT
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Through innovative design concepts and precision matching
this monolithic high speed JFET input operational amplifier family
offers very low input offset voltage as well as low temperature
coefficient of input offset voltage. The amplifier requires less than
3.4 mA per amplifier of supply current yet exhibits greater than
2.7 MHz of gain bandwidth product and more than 8.0 Vlp.s slew
rate. Through the use of JFET inputs the amplifier has very low
input bias currents and low input offset currents. The amplifier
utilizes industry standard pinouts which afford the user the opportunity to directly upgrade circuit performance without the need
for redesign.
The LF411C and LF412C are available in the industry standard
plastic 8-pin DIP and 50-8 surface mount packages, and specified
over the commercial temperature range.
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Low Input Offset Voltage: 2.0 mV Max ,Single)
3.0 mV Max (Dual)
• Low T.C. of Input Offset Voltage: 10
p'vrc
• Low Input Offset Current: 20 pA
• Low Input Bias Current: 60 pA
• Low Input Noise Voltage: 18 nVI\1Hz
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
• Low Input Noise Current: 0.01 pAl\IHz
• Low Total Harmonic Distortion: 0.05%
50-8
• Low Supply Current: 2.5 mA
• High Input Resistance: 1012 n
• Wide Gain Bandwidth: 8.0 MHz
• High Slew Rate: 25 Vlp.s
LF411C
• Fast Settling Time: 1.6 p.s (to within 0.01%1
Offset Null
1
Invt Input
2
7
VCC
Noninvt Input
3
6
Output
5
Offset Null
Single, Top View
ORDERING INFORMATION
DpAmp
Function
Single
Dual
Device
LF412C
Test Temperature
Range
LF411CD
LF411CN
O'C to +70'C
LF412CD
LF412CN
O'C to +70'C
Package
50-8
Plastic DIP
50-8
Plastic DIP
(Dual, Top View)
..
This document contains information on a new product. Specifications and mformatlon herem are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
2-26
LF411C, LF412C
MAXIMUM RATINGS
Symbol
Value
Unit
VCC.IVEEI
+18
Volts
Volts
Rating
Supply Voltages
VI DR
~30
Input Voltage Range (Note 1)
VIR
",15
Volts
Output Short-Circuit Duration (Note 2)
ts
Indefinite
Seconds
Input Differential Voltage Range (Note 1)
Maximum Junction Temperature
TJ
+150
'c
Operating Ambient Temperature Range
TA
a to 70
lOa
'C
LF411CNI412CN
LF41 1CDI412CD
Thermal Resistance
(Junction to Ambient)
RHJA
°CWatt
180
Storage Temperature
Maximum Power Dissipation
T sts.
-60 to + 150
'C
Po
(Note 2)
mW
NOTES:
1. Input voltages should not exceed Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature {T J} is not
exceeded.
3. Measured with
Vee
and
VEe
simultaneously varied.
REPRESENTATIVE CIRCUIT SCHEMATIC
(Each Amplifier)
Output
Inputs
I Vce
~
{~O---+------1r----'
I I
I
I
Bias Circuitry
Common to All
Amplifiers
MOTOROLA LINEAR/INTERFACE DEVICES
2-27
I
II
LF411C, LF412C
DC ELECTRICAL CHARACTERISTICS (VCC
~ + 15 V VEE ~ ·-15 V TA
,
Characteristics
Input Offset Voltage IRS ~ 10 kll, VCM ~ 0 V, Va
lF411
lF412
= 0 V)
Via
Average Temperature Coefficient of Input Offset Voltage
(RS ~ 10 kIt VCM ~ 0 V, Va ~ 0 V)
Input Offset Current IVCM ~ 0 V, Va
lF411 TA ~ 25°C
TA ~ O'C to 70'C
lF412 TA = 25'C
TA ~ O'C to 70'C
= O°C to 70°C
Symbol
':'VIO'·J.T
= 0 V)
110
Input Bias Current (VCM ~ 0 V)
LF411 TA = 25'C
TA ~ O'C to 70'C
LF412 TA ~ 25°C
TA = O'C to 70'C
liB
~
Large Signal Voltage Gain IVa LF411 TA ~ 25"C
TA ~ O"C to 70"C
LF412TA =. 25"C
TA = O'C to 70"C
10 V, RL = 2.0 kll)
-
o V)
-
10
-
20
100
2.0
100
2.0
pA
nA
pA
nA
200
4.0
200
4.0
pA
nA
pA
nA
mV
jJ.v,ec
-
-
-
0.6
-
-
25
0,5
-
VmV
12
12
-
80
_.
-
-
150
13.9
--14.7
14
.. 14
-
' 14
- 14
+15
-12
-11
12
12
V
+ 11
-
.. 11
-
CMR
" 11 V, RS '" 10 k!!)
dB
70
70
90
100
-
PSR
dB
70
70
86
100
-
-
2.5
2.8
3.4
6.8
mA
10
AC ELECTRICAL CHARACTERISTICS (VCC
=• .,.
15 V VEE
. 15 V TA = 25"C unless otherwise noted)
Symbol
Characteristics
10 V to + 10 V, RL = 2.0 kll, AV = + 1.0)
Min
Typ
Max
SR
Gain Bandwidth Product
LF411
LF412
=
2.0
3.0
.,. 11
Power Supply Current IVa = 0 V)
LF411
LF412
Channel Separation (I
0.5
1.0
VICR
Power Supply Rejection (Note 3)
IVCC'VEE .. ·15 V - 15 V to • 5.0 V - 5.0 V)
LF411
LF412
Slew Rate (VIN
LF411
LF412
-
8.0
8.0
25
13
-
2.7
2.7
8.0
4.0
-
1.0 Hz to 20 kHz, LF412)
-
-120
Equivalent Input Voltage Noise (RS
LF411
LF412
~
=
0 V)
-
100 ll, 1= 1.0 kHz)
CS
-
Rin
-
en
10 12
-
30
25
-
0.Q1
0.01
-
dB
kll
pA', Hz
in
-
-
MOTOROLA LINEAR/INTERFACE DEVICES
2-28
-
nV \ Hz
-
Equivalent Input Noise Current If = 1.0 kHz)
LF411
lF412
Unit
V'jJ.s
MHz
GBW
Differential Input Resistance (VCM
Unit
V
VO+
VOVa.,.
VO-
LF412
.
Max
25
15
25
15
lF412
Common Mode Rejection IVCM
LF411
LF412
Typ
AVOL
Output Voltage Swing IVID = c. 1,0 V, RL= 10 kll)
LF411
Common Mode Input Voltage Range IVa LF411
unless otherwise noted)
Min
-
~
®
LMll
LMIIC
LMIICL
MOTOROLA
PRECISION OPERATIONAL AMPLIFIERS
PRECISION
OPERATIONAL AMPLIFIERS
The LM11 is a precision, low drift operational amplifier providing the best features of existing FET and Bipolar op amps. Implementation of super gain transistors allows reduction of input
bias currents by an order of magnitude over earlier devices such
as the LM108A. Offset voltage and drift have also been reduced.
Although bandwidth and slew rate are not as great as FET devices,
input offset voltage, drift and bias current are inherently lower,
particularly over temperature. Power consumption is also much
lower, eliminating warm-up stabilization time in critical applications.
Offset balancing is provided, with the range determined by an
external low resistance potentiometer. Compensation is provided
internally, but external compensation can be added for improved
stability when driving capacitive loads.
The precision characteristics ofthe LM11 make this device ideal
for applications such as charge integrators, analog memories,
electrometers, active filters, light meters and logarithmic amplifiers.
• Low Input Offset Voltage:
100 p.V
• Low Input Bias Current:
17 pA
SILICON MONOLITHIC
INT~GRATED CIRCUIT
N SUFFIX
PLASTIC PACKAGE
CASE 626-04
BalanCE:
1
Inp"1s {
2
J-8 SUFFIX
CERAMIC PACKAGE
CASE 693-02
5
Compensation
(Top View)
• Low Input Offset Current:
0.5 pA
• Low Input Offset Voltage Drift:
1.0 p.VI"C
• Long-Term Stability:
10 p.V/year
• High Common Mode Rejection:
130 dB
H SUFFIX
METAL CAN
CASE 601-04
MAXIMUM RATINGS
Rating
Power Supply Voltage
Diflerentiallnput Current (Note 1)
Output Short-Circuit Duration (Note 2)
Power Dissipation (Note 3)
Operating Junction Temperature
Symbol
Value
Unit
Vcc to VEE
40
Vdc
lID
ts
PD
TJ
±10
rnA
500
rnW
°C
150
85
LM11
LM11C/CL
Storage Temperature Range
Metal and Ceramic Packages
Plastic Package
V,,
(Top View)
Indefinite
Tst9
°C
-65to +150
-55 to + 125
J SUFFIX
CERAMIC PACKAGE
CASE 632-0B
ORDERING INFORMATION
Device
N,C.
Operating Ambient
Temperature Range
N.C.
Package
LM11CLN,CN
o to +70'C
Plastic B-Pin DIP
LM11CW-B, CJ-B
o to + 70'C
Ceramic B-Pin DIP
LMllCW, CJ
LMllCLH, CH
o to + 70'C
o to +70'C
Balance
Inp"ts {
4
Output
9
Ceramic 14-Pin DIP
Metal Can
LMllJ-B
-55to +125'C
Ceramic B-Pin DIP
LMllJ
-55to +125'C
Ceramic 14-Pin DIP
LMllH
-5510 +125'C
Metal Can
(Top View)
*Unused pin (no internal connection) to allow
for input anti-leakage guard ring on printed
circuit board layout.
MOTOROLA LINEAR/INTERFACE DEVICES
2-29
Compensation
II
II
lM11, lM11C, lM11Cl
ELECTRICAL CHARACTERISTICS (TJ
=
25°C unless otherwise noted INote 4])
LM11
LM11C
Symbol
Min
Typ
Max
Input Offset Voltage
Tlow to Thiah
VIO
-
0.1
0.3
0.6
Input Offset Current
Tlow to Thigh
110
Input Bias Current
Tlow to Thiah
liB
Characteristics
-
-
r;
Input Offset Voltage Drift
Tlow to Thiah
Ll.VIO/Ll.T
-
Input Offset Current Drift
Tlow to Thiah
Input Bias Current Drift
Tlow to Thiah
Ll.IIO/Ll.T
Ll.llslLl.T
Large Signal Voltage Gain
Vs = ± 15 V, Vout = ± 12 V,
lout = ±2.0 mA
Tlow to Thigh (Note 5)
Vs = ±15V,Vout = ±12V,
lout = ±0.5 mA
Tlow to Thiah
AVOL
Common Mode Rejection Ratio
Vs = ±15V, -13 V",VCM"',4 V
Vs = ±15V, -12.5 V",VCM""4 V,
Tlow to Thiah
CMRR
Power Supply Rejection Ratio
± 2.5 V",VS'" ± 20 V
Tlow to thiah
PSRR
Power Supply Current
Tlow to Thigh
10
Output Short-Circuit Current
TJ = 150°C, Output Shorted
to Ground
los
0.5
-
-
Input Resistance
-
17
Min
10
30
-
50
150
-
LM11CL
Typ
Max
0.2
0.6
0.8
1.0
17
-
Min
10
20
-
100
150
-
Typ
Max
Unit
0.5
5.0
6.0
mV
25
50
pA
200
300
pA
4.0
17
-
1011
-
-
2.0
5.0
-
10 11
3.0
-
1011
1.0
3.0
-
!,VI"C
n
-
20
-
-
10
-
-
50
-
fArC
0.5
1.5
-
0.8
3.0
-
1.4
-
pArC
100
300
25
300
-
50
250
15
50
-
-
1200
800
-
100
-
-
100
-
110
130
-
110
130
-
100
-
100
-
-
100
96
118
-
100
96
118
-
-
-
-
0.3
-
±10
-
-
-
100
300
50
250
1200
-
0.6
0.8
-
-
-
0.3
±10
-
0.8
1.0
-
V/mV
30
-
m
96
110
-
90
-
-
100
-
0.3
0.8
1.0
mA
±10
-
mA
dB
dB
84
80
-
-
Notes:
1. The inputs are shunted by back-ta-back diodes for over-voltage protection. Excessive current will flow if the input differential voltage is in excess
of 1.0 V if no limiting resistance is used. Additionally, a 2 kfl resistance in each input is suggested to prevent possible latch-up initiated by supply
reversals.
2. The output is current limited when shorted to ground or any voltages less than the supplies. Continuous overloads will require package dissipation
to be considered and heat sinking should be provided when necessary.
3. Devices must be derated based on package thermal resistance (see package outline dimensions).
4. These specifications apply for VEE + 2.0 V"VCM"VCC - 1.0 V (VEE + 2.5 V"VCM"VCC - 1.0 V for Tlow to Thigh) and ± 2.5 V"'VS" ±20 V
Tlow to Thigh: -55"C"TJ" + 125°C for LMll
O"C"TJ"+ 70°C for LMllC and LMllCL
5. Vout = ±11.5 V, all other conditions unchanged.
MOTOROLA LINEAR/INTERFACE DEVICES
2-30
LM11, LM11C, LM11CL
SCHEMATIC DIAGRAM
Balance
II
Compensation
r--,~~~~~----------------~~------t-~----~~--------~---ovcc
7.5 k
17.4 k
17.4 k
}-"""W1/-o Output
+
~---------------4----------~----~----~-4----~-----4----~VEE
FIGURE 2 - INPUT OFFSET CURRENT
versus CASE TEMPERATURE
FIGURE 1 - INPUT BIAS CURRENT
versus CASE TEMPERATURE
50
40
40
~
30
! ~~
r---
'-'
--
r-- -
VCCNE~~ ±201~
-10
i
I'--...
~
~
~
>--
i
~CcNEE ~ ±2.5~ \
~ -20
~-30
I
I
/
>-=>
~
;;;
25
50
75
100
125
10
o
-50
150
.....V
-25
25
MOTOROLA LINEAR/INTERFACE DEVICES
2-31
V
.-""
50
75
TC, CASE TEMPERATURE IOC)
TC. CASE TEMPERATURE 1°C)
I
I
1/
~
-25
1-------1
20
-40
-50
-50
I
Curve 1. VCcNEE ~ ± 20 V
2,VCCIVEE ~ ±2.5V
30
100
125
150
LM11, LM11C,LM11CL
II
FIGURE 3 - TEMPERATURE COEFFICIENT OF
INPUT OFFSET VOLTAGE versus INPUT OFFSET VOLTAGE
24
FIGURE 4 - SPECTRAL NOISE DENSITY
200
V';cNE~=~20VI
I
al = -25 0 to 125"C
./
L
160
'" .......
./'
V
./'
V
./'
V~cNEEAV ~= 10± 15RS=100
J k1n _-
--
40
./
-24
-6.0
-4.0
-2.0
0
2.0
4.0
o
6.0
10
100
1.0 k
FIGURE 5 - COMMON-MODE LIMITS
versus TEMPERATURE
rr I 1"' I 1
~,rf t
w
g
::;
~
120
~
~ 100
8~
T
T
±2.5 VSVSS20 V _
"VI0=10 .V
I
-~
::;
::;
8
r--.-..
~
Q
r-- r-- I--
2.0
FIGURE 6 - COMMON-MODE REJECTION AND
SLEW LIMIT versus FREQUENCY
iD 140
::;
::;
1.0
-50
50
"'"'"'----
60
o
::;
,.
40
~
20
o
1.0
:z
<1
'"w
'"
I
~
0
>
"-
0
I
ISO. 1 Hz
Vsat=1.5 V
RL"=2VS(kn) -
130
120
9
./
z
~
/
0
-' 110
V
-
10
100
'" '"
1.0 k
10 k
::;
Z
o
::;
0,1 ::;
8
d::;
'\
toOk
'-'
0.01
1.0 M
~
§?
z
Q
r--
!;(
-2.0 -
~
(/) +2.0 _
!;(
I
-55 Q C
B.O
~
1.0",
W
o
o
f
~ -1.0
0+1.0
4.0
::;
VCC-""
~
-
0
o
>-
FIGURE 8 - OUTPUT SATURATION
versus LOAD CURRENT
>
100
,.
I, FREQUENCY (Hz)
FIGURE 7 - OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
140
10 ~
'\i '
8
150
~
V6cNEE = ± V
aVIO =100.V -
~~
T, TEMPERATURE (OC)
~
CMSL'\ '\.
CMR~
80
!
,.'-'
100
~
w
I
VEE ---,..
~5
o
I
o
100 k
10 k
I, FREQUENCY (Hz)
VIO, INPUT OFFSET VOLTAGE (mV) @ 25"C
12
16
o
o
20
VEE~
1.0
2,0
IL, LOAD CURRENT (±mA)
VCcNEE' SUPPLY VOLTAGE (± V)
MOTOROLA LINEAR/INTERFACE DEVICES
2-32
3.0
4.0
LM11, LM11C, LM11CL
FIGURE 9 -
~
'"z
0
~
~
':;
~
'"
~
""-
100
~~
80
~
60
40
~
""-
~
~
20
I
VEE
'"
~
~
10
100
1.0 k
10 k
~9
-:/
-
-20
Case Temperature
1 =25"C
2=125"C
3 = -55"C
360
1.0 M
100k
320
V2 V3
/
280
I
240
200
10 M
o
4.0
FREQUENCY (Hz)
12Or-... .......
0
z
~
w
~
o
>
~
.......
'" "
0
",AVOL-
r-
30 0
-0
Curve; 1. Cc
2, CC=1000 pFVCcNEE = ±15 V - 30
RL = 30 kn _
"'
'""
.........
\
.........
.........
.........
100
I'...
>
:-.......
10
1
s
~- 60
90
1....... ./"'\
0
1.0
r-
-;n 100
w
0/
0
-20
0.1
1.0 k
10 k
100 k
\
w
~
120
~
01-
s:.; ~
f-
'"
ffi
1'1 50
10
;:=:
'o;'~
r=
±20 V
20k
X
3.0
10
100
1.0 k
w
u
<3
~
~
,.,..-
V.
,/
V=1000
z
10
/
0-
;,:
05
fr
1.0 k
CC, EXTERNAL COMPENSATION CAPACITOR (pF)
FIGURE 13 - CLOSED LOOP OUTPUT IMPEDANCE
versus FREQUENCY
100
Cc
-
180
1.0 M
'" "'-
-
+
'-
I, FREQUENCY (Hz)
E
20
~
'" ;-- .........
40
16
12
FIGURE 12 - SLEW RATE versus
EXTERNAL COMPENSATION CAPACITOR
=d
'"
8.0
VCcNEE. SUPPLY VOLTAGE (±V)
FIGURE 11 - OPEN LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
100
-
I.....:;
0-
Ii'
'"'"
FIGURE 10 - SUPPLY CURRENT versus
SUPPLY VOLTAGE
400
~ 120
0
POWER SUPPLY REJECTION RATIO
versus FREQUENCY
1.0
/
~
~
VccNEE = ±15 V
IOUI = ±1.0 rnA
, / AV=1.0
./
0.1
../
V
100
1.0k
10 k
100 k
1.0 M
10 M
I, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-33
10 k
II
LM11, LM11C, LM11CL
APPLICATIONS INFORMATION
dual in-line package is available with guard pins (internally
unconnected) adjacent to the inputs for minimal package
leakage effects.
Electrostatic shielding is suggested in high-impedance
circuits.
Error voltages in external circuitry can be generated by
thermocouple effects. Dissimilar metals along with temperature gradients can set up an error voltage ranging in the
hundreds of microvolts. Some of the best thermocouples are
junctions of dissimilar metals made up of Ie package pins
and printed circuit boards. Problems can be avoided by keeping low level circuitry away from heat generating elements.
The lMll is internally compensated, but external compensation can be added to improve stability, particularly
when driving capacitive loads.
Due to the extremely low input bias currents of this
device, it may be tempting to remove the bias current compensation resistor normally associated with a summing
amplifier configuration. Direct connection of the inputs to a
low impedance source or ground should be avoided when
supply voltages greater than approximately 3 volts are used.
The potential problem involves reversal of one supply which
can cause excessive current to flow in the second supply.
Possible destruction of the Ie could result if the second
supply is not current limited to approximately 100 mA or if
bypass capacitors greater than 1.0 "F are used in the supply
bus.
Disconnecting one supply will generally cause reversal
due to loading of the other supply within the Ie and in
external circuitry. Although the problem can usually be
avoided by placing clamp diodes across the power supplies
of each printed circuit board, a careful design will include
sufficient resistance in the input leads to limit the current to
10 mA if the input leads are pulled to either supply by internal
currents. This precaution is not limited to only the lMll.
The LMll is capable of resolving picoampere level signals. Leakage currents external to the Ie can severely impair
the performance ,of the device. It is important that high
quality insulating materials such as teflon be employed.
Proper cleaning to remove fluxes and other residues from
printed circuit boards, sockets and the device package are
necessary to minimize surface leakage.
When operating in high humidity environments or temperatures near ooe, a surface coating is suggeste~ to set up
a moisture barrier.
leakage effects on printed circuit boards can be reduced
by encircling the inputs (both sides of p.c. board) with a
conductive guard ring connected to a low impedance potential nearly the same as that of the inputs.
The suggested printed circuit board layout for input
guarding is shown in Figure 14. Guard ring electrical connections for common operational amplifier configurations
are illustrated in Figure 15. For critical applications, a 14-pin
FIGURE 14 - SUGGESTED PRINTED
CIRCUIT BOARD LAYOUT FOR INPUT GUARDING
USING METAL PACKAGED DEVICE
vee, f)
Balance
Output,
7
8
1
6
Compensation 0
5
4
VEE/
Guard
(Bottom Viewl
The above guard ring, required on both sides of the
board, is connected to a low impedance point of the
same potential as the sensitive inputs to reduce surface
leakage paths. Bulk leakage is reduced less, and
depends more on guard ring width.
FIGURE 15 - GUARD RING ELECTRICAL CONNECTIONS
FOR COMMON AMPLIFIER CONFIGURATIONS
Summing Amp (Inverting)
Voltage Follower
Non~lnverting
R1
R2
Input Q-'V\f'v-....--'\J'A----.,
R1
Output
R2
~O"
Input~
...,
MOTOROLA LINEAR/INTERFACE DEVICES
2-34
~
Input~
Output
LM11, LM11C, LM11CL
FIGURE 16 - INPUT PROTECTION
FOR SUMMING (lNVERTINGI AMPLIFIER
FIGURE 17 - INPUT PROTECTION
FOR A VOLTAGE FOLLOWER
II
R3
Input o--'---''''''~---,
Rl
Output
$
1
Input
-
Output
+
10 k
Current is limited by R1 in the event the input is
connected to a low impedance source outside the
common-mode range of the device. Current is controlled by R2 if one supply reverses. Rl and R2 do not
affect normal operation.
Input current is limited by R1 when the input exceeds
supply voltage, power supply is turned off, or output is
shorted.
FIGURE 18 - CABLE BOOT STRAPPING
AND INPUT SHIELDS
c
Rl
Output
Input
Input
Output
An input shield boot strapped in a voltage follower
reduces input capacitance, leakage, and spurious voltages from cable flexing. A small capacitor from the
input to ground will prevent any instability.
In a summing amplifier the input is at virtual ground.
Therefore the shield can be grounded. A small feedback
capacitor will insure stability.
FIGURE 19 - ADJUSTING INPUT OFFSET
VOLTAGE WITH BALANCE POTENTIOMETER
Minimum
Adjustment Range
(mVI
±OA
± 1.0
±2.0
±5.0
Input offset voltage adjustment range is a function of the Balance
Potentiometer Resistance as indicated by the table above. The
potentiometer is connected between the two "Balance" pins.
MOTOROLA LINEAR/INTERFACE DEVICES
2-35
R
n
1.0 k
3.0 k
10 k
100 k
II
®
LM101A
LM201A
LM301A
MOTOROLA
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
A general purpose operational amplifier that allows the user to
choose the compensation capacitor best suited to his needs. With
proper compensation. summing amplifier slew rates to 10 V/,,"s
can be obtained.
• Low Input Offset Current Temperature Range
SILICON MONOLITHIC
INTEGRATED CIRCUIT
20 nA maximum Over
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
• External Frequency Compensation for Flexibility
• Class AB Output Provides Excellent Linearity
• Output Short Circuit Protection
J SUFFIX
CERAMIC PACKAGE
CASE 693-02
(LM201A and LM301A)
• Guaranteed Drift Characteristics
FIGURE 1 - STANDARD COMPENSATION
AND OFFSET BALANCING CIRCUIT
FIGURE 2 - DOUBLE-ENDED LIMIT
DETECTOR
VUT
Inverting
Input
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
e----<>--i
8~
1
>---<>--"Vo
Output
Balance
Nonlnverting
Compensation
Input
v,
10Mn
30pF
Inputs
1
VCC
Output
Balance
VEE
5.1MU
>--o--_Vo
+---"""~"VEE
20k
Vl T
(Top View)
Vo ~ 4.SVfor
e----<>---1
VLT <". VI"" VUT
Vo ." -0.4 V
VI'-VLTorVI ,VUT
Pins Not Shown Are Not Connected
H SUFFIX
METAL PACKAGE
CASE 601-04
Compensation
FIGURE 3 - REPRESENTATIVE CIRCUIT SCHEMATIC
Balance
Compensation
'--+_----" Output
(Top View)
ORDERING INFORMATION
Device
250
LM101AH
LM101AJ
LM201AD
LM201AH
LM201AN
LM201AJ
LM301AD
LM301AH
LM301AN
LM301AJ
Balance
MOTOROLA LINEAR/INTERFACE DEVICES
2-36
Temperature
Range
-55'C 10 +125'C
-55"Clo +125"C
-25'C 10 +85'C
- 25"C 10 + 85'C
- 25'C 10 + 85'C
- 25'C to + 85'C
O'CIO +70'C
O"C 10 +70"C
O°Cto +70°C
O'C 10 +70"C
Package
Metal Can
Ceramic DIP
SO-8
Metal Can
Plastic DIP
Ceramic Dip
SO-8
Metal Can
Plastic DIP
Ceramic Dip
LM101A, LM201A, LM301A
MAXIMUM RATINGS
VALUE
Rating
Power Supply Voltage
Input Differential Voltage
Symbol
LM101A
VCC,VEE
±22
VID
Input Common-Mode Range (Note 1)
VICR
Output Short-Circuit Duration
ts
Power Dissipation (Package Limitation)
Metal Can
Derate above TA = + 75"C
(LM201A1
Plastic Dual In-Line Package
301A)
Derate above TA = + 25"C
Ceramic Package
Derate above 25°C
PD
Operating Ambient Temperature Range
TA
Storage Temperature Range
..
.
..
...
I
I
±22
LM301A
Vdc
•
•
+15
•
•
Continuous
500
6.8
625
5.0
750
6.6
-
-
.
.
-55 to + 125
I
Unit
±18
+30
...
Tstg
I
I
LM201A
•
625
5.0
-25 to +85
I
•
o to +70
•
•
65 to +150
Note 1. For supply voltages less than ± 15 V, the absolute maximum Input voltage IS equal to the supply voltage.
Volts
Volts
mW
mWrC
mW
mWrC
mW
mWrC
°c
°c
ELECTRICAL CHARACTERISTICS (TA = + 25°C unless otherwise noted.) Unless otherwise specified, these specifications apply
for supply voltages from ±5.0 V to ±20 V for the LM101A and LM201A, and from ±5.0 V to
± 15 V for the LM301A.
LM101A
LM201A
LM301A
Symbol
Min
Typ
Max
Typ
Max
Unit
Input Offset Voltage (RS "" 50 k!l)
VIO
0.7
2.0
-
2.0
7.5
mV
Input Offset Current
110
-
1.5
10
-
3.0
50
nA
Input Bias Current
liB
-
30
75
-
70
250
nA
Input Resistance
ri
1.5
4.0
-
0.5
2.0
-
Megohms
-
1.8
-
-
3.0
-
-
-
-
-
1.8
3.0
50
160
-
25
160
-
Characteristics
Supply Current
VCCNEE = ±20 V
VcCNEE = ±15V
ICC,IEE
Large Signal Voltage Gain
(VccNEE = ± 15 V, Vo
RL> 2.0 k!l)
AV
=
Min
mA
V/mV
±10 V,
The following specifications apply over the operating temperature range
Input Offset Voltage (RS "" 50 k!l)
VIO
Input Offset Current
110
Average Temperature Coefficient of
Input Offset Voltage
TA(min) "" TA "" TA(max)
8VI0/8T
Average Temperature Coefficient of
Input Offset Current
+ 25°C "" TA "" TA(max)
TA(min) "" TA "" 25°C
8110/8T
-
-
3.0
-
20
-
-
70
nA
3.0
15
-
6.0
30
fLV/oC
0.01
0.02
0.1
0.2
-
-
0.01
0.02
100
-
-
15
-
-
Input Bias Current
liB
Large Signal Voltage Gain
(VccNee = ± 15 V, Vo
RL > 2.0 kn)
AV
25
-
±15
-
± 10V,
Input Voltage Range
VCcNEe = ± 20 V
VCCNEE = ± 15 V
mV
nArC
-
=
10
VI
-
-
-
-
0.3
0.6
300
-
-
-
nA
V/mV
V
Common-Mode Rejection Ratio
Rs""50kO
CMRR
80
96
-
±12
70
90
-
dB
Supply Voltage Rejection Ratio
RS""50kO
PSRR
80
96
-
70
96
-
dB
±12
±10
±14
",,3
-
-
±12
"'10
±14
",13
-
1.2
2.5
Output Voltage Swing
VccNee = ±15 V, RL
RL = 2.0 kG
Vo
=
10 kn,
Supply Currents (TA = TA(max),
VccNee = ",20 VI
Icc,lEe
-
MOTOROLA LINEAR/INTERFACE DEVICES
2-37
-
-
-
V
mA
II
LM101A. LM201A. LM301A
TYPICAL CHARACTERISTICS
(VCC = +15 V, VEE = -15 V, TA = + 25'C unless otherwise noted.)
FIGURE 4 - MINIMUM INPUT VOLTAGE RANGE
FIGURE 5 - MINIMUM OUTPUT VOLTAGE SWING
2Qr---,---,---,---,---,----
~
~ 16 f-----t--~pp""""
16
tI
~ 12~--~----~--4----+--~f---~~~
~ 12f-----t-----f----1----I----+-~,..
~
~
~!<
O~
g 8.0 f----+---I-'lc--Y~-+~~t---_f.lif.
~
1!;
~ 4,0
f-----t----I--"7''T--
°0~--~--~5~.0--~----1~0--~----~15~~
8.0 I----+_4.0 f-----f----f""""--I---+--1----f----
O~
___ L_ _
o
20
94
~
82
__
~
_ __ L_ _
~~
20
2.5
;;;: 2.0
...
88
~
FIGURE 7 - TYPICAL SUPPLY CURRENTS
100
'"~
____
5.0
10
15
Vcc AND 1- VEE), SUPPLY VOLTAGES IVOLTS)
VCC and I-VEE). SUPPLY VOLTAGE IVOlTSI
RGURE 6 - MINIMUM VOLTAGE GAIN
~
E
I!?
z
~
a
'"~
~
~
1.5
1.0
.w
.i
.B
76
70
0
0.5
0
5.0
10
15
VCC AND - VEE, SUPPLY VOLTAGES IVOLTS)
FIGURE 8 - OPEN-LOOP FREQUENCY RESPONSE
TA
0
=
10
15
VCCAND 1- VEE) SUPPLY VOLTAGE IVOLTS)
RGURE 9 - LARGE-SIGNAL FREQUENCY RESPONSE
+180
Single·Pole Cc;~pensation
Single-Pole Compensation
+160
2Q
+140
315
+120
270
~ -+1 5
!<
+1
~~.oo"
c~l"-.
'v
0":'--... '-...
Gain
0
~
1.0
10
100
1.0k
10k
lOOk
f, FREQUENCY IHzl
90 ~
"
'"
1.0M
1\
~
""
45 iE
..........
-2Q
0
135~
../
'-...
0
225$
:±l
180lli
Phase
Cl
o
10M
\
0
1.0k
\
C1
= 3.0pF
\
= 30pF 1\
r-....
11111
10 k
MOTOROLA LINEAR/INTERFACE DEVICES
2-38
\
lOOk
f, FREQUENCY IHzl
1.0M
10M
LM101A, LM201A, LM301A
IVee
TYPICAL CHARACTERISTICS Icontinued)
+ 15 V, VEE ~ -15 V, TA ~ + 25'e unless otherwise noted.)
~
FIGURE 10 - VOLTAGE FOLLOWER PULSE RESPONSE
+,0
Single-Pole Compensation
Feedforward Compensation
+8.0
+,10
~ +6.0
a
~
~ +4.0
t!:l +2.0
~
~
-2.0
:
-4.0
:
1\
\
r I.A
/
Input
f--
+,00 r--
~
V
'\.
m
~+80
~outPut-
225
i'-...
.....
~
"""
5
+40
>
I
-...;
---.....
~+60
..... ~ ~V
"'
:>
-6.0
Gain,
0
-8.0
-'0
,0
10
30
40
50
60
70
80
-10
90
,0
,00
'.0 k
'Ok
I,TIMEI",I
AGURE 12 -
~
~
LARGE-SIGNAL FREQUENCY RESPONSE
+'
Feedforward Compensation
0
'OM
\
I\,
f\.
§?
+6.0
,.,
Or--
2.!.
+4.
'"
~
+2.0
~
0
>-
~ -4.0
i'-
~±4.0
~ -8.0
""""-
'OOk
--
)---
0-6.0
{?
o
Output
-- -+7 f
In;:';,
I
II
II
t-
~ -2.0
g
>-
~
'OOM
Feedforward Compensation
_ +8. 0
~
::1:1 6
~
§? :t8. 0
'.OM
FIGURE 13 - INVERTER PULSE RESPONSE
8
±1 1
'OOk
,
f. FREQUENCY IHzl
+1
'"~
L.
Phase
« +10
;>
±,
II
FIGURE 11 - OPEN-LOOP FREQUENCY RESPONSE
+,40
-,0
'.0
,OM
'.OM
1.0
3.0
f, FREQUENCY IHzl
4.0
5.0
6.0
7.0
8.0
1. TIME 1....1
TYPICAL COMPENSATION CIRCUITS
FIGURE 14 - SINGLE-POLE COMPENSATON
AGURE 15 - FEEDFORWARD COMPENSATION
C2
R2
R2
R'
Rl
>-<>-41--. Vo
>-<>--<-- Vo
Frequency
Compensation
C,
R3
C''''~
R' + R2
Cs
~
Cl
150 pF
30 pF
Balance
1
C2 ~ 21TIOR2
~ 3.0 MHz
10
MOTOROLA LINEAR/INTERFACE DEVICES
2-39
9.0
,80
iii
135
~
90
~
45
~
~
a@
LM108, LM108A
LM208, LM20SA
LM308,LM30SA
MOTOROLA
,-----------------------------------------,
PRECISION OPERATIONAL AMPLIFIERS
The LM108/LM208/LM308 Series operational amplifiers provide
high input impedance, low input offsets and temperature drifts,
and low noise. These characteristics are made possible by use of
a special Super Beta processing technology. This series of amplifiers is particularly useful for applications where high-accuracy
and low-drift performance are essential. In addition high-speed
performance may be improved by employing feed-forward compensation techniques to maximize slew rate without compromising other performance criteria.
The LM108A1LM208A1LM308A Series offers extremely low input
offset voltage and drift specifications allowing usage in even the
most critical applications without external offset nUlling.
SUPER GAIN
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
H SUFFIX
METAL PACKAGE
CASE 601-04
• Operation From a Wide Range of Power Supply Voltages
COMPEN
B
CO~PEN 1 08
INPUTS
~
?F _o~
• Low Input Bias and Offset Currents
• Low Input Offset Voltage and Guaranteed Offset Voltage Drift
Performance
VCC
OUTPUT
40 50 NC
VEE
(Top View)
• High Input Impedance
J SUFFIX
CERAMIC PACKAGE
CASE 632-08
FREQUENCY COMPENSATION
Modified Compensation
Standard Compensation
l~J
NC
COMPEN A 2
R2
Inverting
Inverting
Input
NonInverting
Input
Input
Rl
..."Nv-+<>-!
Non-
Output
R3
Inverting ~NV---<>-I
Input
'GUARO 3
4
INPUTS
5
_
NC
13 NC
12 COMPEN B
11 VCC
10 OUTPUT
'GUARD 6
9
8
VEE 7
NC
NC
(Top View)
Standard Faedforward
Feedforward Compensations for
Compensation
Decoupllng Load Capacitance
10 k
100 k
5 pF
Input ....Mr.----lf----.
Input ....-"""~~-'"""""'VY-----,
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
(LM208, LM208AI
(LM308, LM308A Only)
500
><,..,"""+- Output
J-B SUFFIX
CERAMIC PACKAGE
CASE 693-02
ORDERING INFORMATION
Temperature Range
Package
LM10BAH, H
LM108AJ, J, AJ-8, J-8
-55to + 125·C
-55 to + 125·C
Metal Can
Ceramic DIP
LM20BAH, H
LM208AJ, J, AJ-8, J-8
LM208AN, N
LM20BAD, D
-25 to
-25 to
-25 to
-25 to
+ 85·C
+85·C
+85·C
+85·C
Metal Can
Ceramic DIP
Plastic DIP
SO-8
LM30BAH, H
LM308AJ, J, AJ-8, J-8
LM308AN, N
LM30BAD, D
o to
o to
o to
o to
+70·C
+70·C
+70·C
+70·C
Metal Can
Ceramic DIP
Plastic DIP
SO-8
Device
D SUFAX
PLASTIC PACKAGE
CASE 751-02
SO-8
18
COMPEN
A
1
INPUTS 2
3
VEE
-t
4
8
COMPEN
B
7 VCC
6 OUTPUT
5NC
(Top View)
*Unused pin (no internal connection) to
allow for input anti-leakage guard ring
on printed circuit board layout.
MOTOROLA LINEAR/INTERFACE DEVICES
2-40
-
LM108, LM108A, LM208, LM208A, LM308, LM308A
MAXIMUM RATINGS (TA
~ + 25°C unless otherwise noted)
Value
Rating
Power Supply Voltage
Symbol
LM108. LM10BA
VCC.VEE
±20
I
I
LM208. LM208A
±20
Input Voltage (See Note 1)
VI
Input Differential Current (See Note 2)
•
If 0
of
+10
Output Short-Circuit Duration
ts
of
Indefinite
Operating Ambient Temperature Range
Storage Temperature Range
Junction Temperature
Metal. Ceramic Package
Plastic Package
LM308. LM308A
±18
I
•
I
-25to +85
o to
•
•
•
+ 70
TJ
+175
+150
Volts
mA
°c
•
••
65 to +150
of
of
Unit
Vdc
+15
-55to +125
TA
TS!!l
I
I
°c
°c
Note 1, For supply voltages less than :t 15 V, the maximum input voltage is equal to the supply voltage.
Note 2. The inputs are shunted with back-ta-back diodes for over-voltage protection. Therefore, excessive current will flow if a differential input voltage
in excess of 1.0 V is applied between the inputs unless some limiting resistance is used.
ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of + 5.0 V ,. VCC ,.
+20 V and -5.0 V '" VEE'" -20 V. TA ~ + 25°C.)
LM108A
LM208A
Symbol
LM108
LM208
Typ
Max
Min
Typ
Max
Unit
Input Offset Voltage
VIO
-
0.3
0.5
0.7
2.0
mV
Input Offset Current
110
-
0.05
0.2
0.005
0.2
nA
Input Bias Current
liB
-
0.8
2.0
-
0.8
2.0
Input Resistance
ri
30
70
-
30
70
-
-
±0.3
Characteristic
Power Supply Currents
VCC ~ +20 V. VEE ~ -20V
Min
ICC.IEE
Large Signal Voltage Gain
VCC ~ IVEEI ~ +15 V. Vo ~ ±10V.
RL'" 10 kO
AVOL
nA
Megohms
-
±0.3
80
300
-
50
300
-
VlmV
1.0
-
3.0
mV
0.4
nA
3.0
15
/LVrC
pArC
±0.6
±0.6
mA
The following specifications apply over the operatong temperature range
Input Offset Voltage
VIO
-
Input Offset Current
110
-
-
0.4
Average Temperature Coefficient of
Input Offset Voltage
TA(min),.TA",TA(max)
6.VIO/6.T
-
1.0
5.0
-
Average Temperature Coefficient of
Input Offset Current
6.IIO/6.T
-
0.5
2.5
-
0.5
2.5
liB
-
-
3.0
-
-
3.0
AVOL
40
-
-
25
-
-
V/mV
VIR
±13.5
-
-
±13.5
-
-
V
Common-Mode Rejection Ratio
CMRR
96
110
-
85
100
-
dB
Power Supply Voltage Rejection Ratio
PSRR
96
100
-
80
96
-
dB
Output Voltage Range
VCC ~ IVEEI ~ + 15 V. RL ~ 10 k!l
VOR
±13
±14
-
±13
±14
-
V
-
±0.15
Input Bias Current
Large Signal Voltage Gain
VCC ~ IVEEI ~ +15 V. Vo ~ ±10 V.
RL ~ 10 kO
Input Voltage Range
VCC ~ IVEEI ~ +15V
Supply Current (TA
~
TA[max])
-
ICC.IEE
±0.15
±0.4
MOTOROLA LINEAR/INTERFACE DEVICES
2-41
±0.4
nA
rnA
II
LM108, LM108A, LM208, LM208A, LM308, LM308A
ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of + 5.0 V '" Vcc '"
+15 V and -5.0V "" VEE"" -15 V, TA = +25°C.) .
LM308A
Characteristic
Symbol
Min
Max
0.3
0.5
0.2
1.0
1.5
Input Offset Voltage
VIO
Input Offset Current
110
Input Bias Current
liB
-
Input Resistance
ri
10
40
ICC,IEE
-
±0.3
AVOL
80
300
Power Supply Currents
VCC = +15 V, VEE = -15V
Large Signal Voltage Gain
VCC = +15 V, VEE = -15 V, Vo
RL"" 10 kG
=
LM308
Typ
Min
Typ
Max
Unit
2.0
7.5
mV
0.2
1.0
nA
1.5
7.0
10
40
-
-
±0.3
25
300
-
V/mV
10
mV
7.0
-
±0.8
-
±10V,
±0.8
nA
Megohms
mA
..
The following specIfIcatIons apply over the operating temperature range
-
0.73
-
1.5
-
1.5
nA
1.0
5.0
-
6.0
30
..vrc
2.0
10
pArC
Average Temperature Coefficient of
Input Offset Voltage
TA(min) '" TA '" TA(max)
ilVloJilT
-
Average Temperature Coefficient of
Input Offset Current
iliIO/ilT
-
2.0
10
-
liB
-
Input Offset Voltage
VIO
Input Offset Current
110
-
-
10
60
-
10
AVOL
-
15
-
-
V/mV
VIR
±14
-
-
±14
-
-
V
Common-Mode Rejection Ratio
RS"'50kO
CMRR
96
110
-
80
100
-
dB
Supply Voltage Rejection Ratio
RS'" 50 kO
PSRR
96
110
-
80
96
-
dB
VOR
±13
±14
-
±13
±14
-
V
Input Bias Current
Large Signal Voltage Gain
VCC+15V,VEE = -15V,VO
RL"" 10 kG
Input Voltage Range
VCC = +15 V, VEE
=
=
nA
±10 V,
-15V
Output Voltage Range
VCC = + 15 V, VEE = -15V,RL
=
10kO
REPRESENTATIVE CIRCUIT SCHEMATIC
COMPENSATION A
COMPENSATION B
Output
+o----+-----+--~--~
MOTOROLA LINEAR/INTERFACE DEVICES
2-42
LM108, LM108A, LM208, LM208A, LM308, LM308A
TYPICAL CHARACTERISTICS
FIGURE 2 - MAXIMUM EQUIVALENT INPUT OFFSET
VOLTAGE ERROR versus INPUT RESISTANCE
FIGURE 1 - INPUT BIAS AND INPUT OFFSET CURRENTS
U
"
"- .....
1.6
" I'-.
11.4
i
a
LM~,LJ30B
~
1.B
1.2
...........
" '"
1.0
~ 0.8
~ 0.6
~ 0.4
0.1
./
-......
t-....
-......
..........
r-
LM10BA, LM10B
LM10BA, LMiOB
r--
110
o
-60 -40 -10
=-_. _._
100
110
"
r--.....
.............
z
~
---
LM30BA, LM30B _
liB
LM10BA, LM10B
I
I
0.15
i'5
0.10
~
f-----
::.:i:j:±t±tlt==±tll±tf~:±2W±±lli
'== LM30B
10
-
~ LMloB, LM20B
u
>-
i--LM30BA
~
z
...... LM1~
liB
0.05 ~
r
0.1 L----1---1--L.LLUll_---1---1--L.LLLllL----1.--l-L.LLillJ
1.0M
10M
100 M
100 k
ri, INPUT RESISTANCE (OHMS)
+20 +40 +60 +80 +100 +110 +140
T, TEMPERATURE (OC)
FIGURE 4 - POWER SUPPLY CURRENTS versus POWER
SUPPLY VOLTAGE
FIGURE 3 - VOLTAGE GAIN versus SUPPLY VOLTAGES
130
500
120
-
TA - O°C
+ 25°C
55°C
+70"C 10+ 115°C V
80
o
--
-
~
+ 70°C
CF = 0
f = 100Hz
o
o
20
~ +60
5.0
10
_15
VCC = IVEEI, SUPPLY VOLTAGES (VOLTS)
~
~+20
'"
~
~F=3.0pF
"- i'-..
~+40
-......
w
~
§Z
100
"'-
B.O
\
\
\
\
\
\
~
1= 30pF
~ ,CF
,
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
12
>-
5
1.0 M
10 M
""
100 M
\ CF = 3.opF
1\.
4.0
CF = 30pF
~
CF = 100 p'0.
10
~ ~1~~
Vec
VEE = -15V
TA = +25°C
+1 16
"'- ..... ""~
20
"
/Ih---,
Output
Input
Cl
Rl R2
Nots: Rl + R 2 must be an impedance.
(1) Used to compensate for large source resistances.
MOTOROLA LINEAR/INTERFACE DEVICES
2-44
®
LMlll
LM211
LM311
MOTOROLA
HIGHLY FLEXIBLE VOLTAGE COMPARATORS
The abilityto operate from a single power supplyof 5.0 t030 volts
or ±15 volt split supplies, as commonly used with operational amplifiers, makes the LM111/LM211/LM311 a truly versatile comparator. Moreover, the inputs of the device can be isolated from system
ground while the output can drive loads referenced either toground,
the VCC or the VEE supply. This flexibility makes it possible to drive
DTL, RTL, TTL, or MOS logic. The output can also switch voltages to
50 volts at currents t050 mAo Thus the LM111/LM211/LM311 can
be used to drive relays, lamps or solenoids.
HIGH PERFORMANCE
VOLTAGE COMPARATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
H SUFFIX
METAL PACKAGE
CASE 601-04
vcc
TYPICAL COMPARATOR DESIGN CONFIGURATIONS
Split Power-Supply with
Offset Balance
3.0 k
IJ
Gnd~,~O::I:~ce/Strobe
Single Supply
Inputs
Vee
3 04 0 Balance
VEE
(Top View)
RL
Output
87
Ground- Referred Load
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
(LM311 Only)
Output
J-8 SUFFIX
CERAMIC PACKAGE
CASE 693-02
Load Referred to
Negative Supply
~
1
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
(LM211/LM311 Only)
GndlB ~ ~~::~~e/Strobe
BVCC
Input polarity is reversed when
Gnd pin is used as an output.
Input polarity is reversed when
Gnd pin is used as an output.
Inputs;:
5 Balance
VeE 4
Load Referred to
Positive Supply
(Top View)
ORDERING INFORMATION
Output
Device
Temperature Range
Package
LM111H
LM111J-8
-55°C to +1250(;
Metal Can
Ceramic DIP
LM211D
LM211H
LM211J-B
- 25·C to
+ 85°C
50-8
Metal Can
Ceramic DIP
LM311D
LM311J-B
LM311N
MOTOROLA LINEAR/INTERFACE DEVICES
2-45
QOCto +70°C
50-B
Ceramic DIP
Plastic DIP
II
LM111, LM211, LM311
MAXIMUM RATINGS (TA: +25°e unless otherwise noted.)
Value
Rating
Total Supply Voltage
Symbol
LMlll
LM211
LM311
Unit
Vee +IVEEI
36
36
Vdc
Output to Negative Supply Voltage
VO-VEE
50
40
Vdc
Ground to Negative Supply Voltage
VEE
30
30
Vdc
Input Differential Voltage
VID
±30
±30
Vdc
Input Voltage (Note 2)
Vin
±15
±15
Vdc
Voltage at Strobe Pin
-
Vee toVee-5
Vee toVcc-5
Vdc
Power Dissipation and Thermal Characteristics
Metal Package
Derate above TA : +25°C
Plastic and Ceramic Dual In-line Packages
Derate above TA : +25°C
680
5.5
625
5.0
Po
1118JA
Po
1/8JA
Operating Ambient Temperature Range
°c
-
-
o to +70
Operating Junction Temperature
mW
mW/oe
TA
-55 to +125
-25 to +B5
Storage Temperature Range
mW
mW/oC
TJ(max)
+150
+150
°c
Tstg
-65 to +150
-65 to +150
°c
ELECTRICAL CHARACTERISTICS (VCC: +15 V. VEE: -15 V. TA: +25°C unless otherwise noted [Note 1].)
Symbol
Characteristic
Input Offset Voltage (Note 3)
RS'; 50 kO. TA: +25°C
RS'; 50 kO. Tlow'; TA'; Thigh'
VIO
Input Offset Current (Note 3) TA: +25°e
110
Tlow~TA~Thigh*
Input Bias Current. TA: +25°C
liB
Tlow~TA~Thigh*
Voltage Gain
AV
Response Time (Note 4)
Saturation Voltage
VOL
VID'; -5.0 mV. 10: 50 mA } T : +25 0 C
VID'; -10 mV.lo: 50 mA
A
Vec;P 4.5 V. VEE: O. Tlow'; TA'; Thigh'
VIO'; -6.0 mV. Isink'; B.O mA
VID'; -10 mV. Isink'; 8.0 mA
Strobe "On" Current (Note 5)
IS
Output Leakage Current
VID;;' 5.0 mV. VO: 35 V} TA: +25°C
VID ;;. 10 mV. Vo : 35 V 1st robe : 3.0 mA
VID ;;. 5.0 mV. Vo : 35 V. Tlow'; TA'; Thigh'
LMlll
LM211
LM311
Min
Typ
Max
-
0.7
3.0
4.0
40
200
-
200
-
0.75
Unit
Typ
Max
-
2.0
7.5
10
10
20
-
1.7
-
-
100
150
-
45
-
-
-
40
200
-
V/mV
-
-
200
-
ns
Min
mV
1.7
45
-
-
50
70
nA
250
300
nA
V
1.5
-
-
-
-
-
-
0.75
-
-
-
-
0.23
0.4
-
3.0
0.23
0.4
-
-
-
3.0
-
-
0.2
10
-
-
-
-
1.5
-
mA
-
-
0.2
50
0.1
0.5
-
-
-
nA
nA
JlA
Input Voltage Range (Tlow'; TA'; Thigh')
VIR
-14.5
-14.7to
13.8
13.0
-14.5
-14.7 to
13.8
13.0
V
Positive Supply Current
ICC
+6.0
+7.5
mA
-1.3
-5.0
-
+2.4
lEE
-
+2.4
Negative Supply Current
-1.3
-5.0
mA
NOTES:
T,ow= -55°C for LM111
Thigh = +125°C for LM111
= -25°C for LM211
= +85°C for LM21 1
ooe for LM311
+70o C for LM311
1. Offset voltage, offset current and bias current specifications apply for
a supply voltage range from a single 5.0 volt supply up to ± 15 volt supplies.
3. The offset voltages and offset currents given are the maximum
values required to drive the output within a volt 01 either supply with
a 1.0 mA load. Thus, these parameters define an error band and take
into account the "worst case" effects of voltage gain and input
impedance.
2. This rating applies for ±15 volt supplies. The positive input voltage
limit is 30 volts above the negative supply. The negative input voltage limit isequal tothe negative supplvvoltage or 30 volts below the
positive supply, whichever is less.
4. The response time specified is for a 100 mV input step with 5.0 mV
overdrive.
=
=
5. Do not short the strobe pin to ground; it should be current driven at
3.0 t. 5.0 mAo
MOTOROLA LINEAR/INTERFACE DEVICES
2-46
LM111, LM211, LM311
FIGURE 1 -
CIRCUIT SCHEMATIC
II
8
r-----_.~~~----_._.--_4~--------~~------_.--------------._----oVCC
800
800
Balance
Ba la nce/~,"""N-+-------'
Strobe 6
7
Output
L-__________...
~
G nd
4
3
L-----------4_----~~--~--~--~~----4_----~~--------------~
VEE
TYPICAL PERFORMANCE CHARACTERISTICS
FIGURE 2 -
140
1
-- --
120
55
~
i
100
«
'"
80
FIGURE 3 -
INPUT BIAS CURRENT versus
TEMPERATURE
5.0
Veeo+ 15V
VEEo-15V-
a
~
3.0
"-
-
~
~
Normal/"
j? 1.0
o
-55
-25
+25
+50
+75
TA, TEMPERATURE lOCI
+100
-55
+125
140
I 1
120
Vee ° +15 V· - VEEo-15V- - TA 0 +25°e _
i
+125
COMMON MODE LIMITS versus
TEMPERATURE
Referred to SupplV Voltages
'" -1.0
'"~ -1.5
80
::;
i:;,;lt=t=lIl~ll±~¥J
60
>-=>
~
~
+100
Vee
~ -0.5 1---
--
;:-100
z
+25
+50
+75
TA, TEMPERATURE lOCI
-25
FIGURE 5 -
FIGURE 4 - INPUT BIAS CURRENT versus
DIFFERENTIAL INPUT VOLTAGE
«
'"
as
=---- f..---
2.0
>--
~
-
i'>..
-f,---
S1
o
!
Pins 5 & 6 Tied
to Vee
>--
z
I'-..
.!t> 40
~~F ~i~~-
1 4.0
.....,.
Pins 5 & 6 Tied
to Vee
Normal ..
INPUT OFFSET CURRENT versus
TEMPERATURE
40
~
20
o
-16
-12
-8,0
-4.0
0
4.0
8.0
OIFfERENTIALINPUT VOLTAGE IVI
12
-55
16
-25
MOTOROLA LINEAR/INTERFACE DEVICES
2-47
+25
+50
+75
TA, TEMPERATURE lOCI
+100
+125
•
LM111, LM211, LM311
TYPICAL PERFORMANCE CHARACTERISTICS
FIGURE 6 -
RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES
~
w
'"
".
....
1\
4.0
'"
1=
3.0
'"
<=>
~ 1.0
0
~
100
a....
".
t;!liII
/, W' \
2.0
!
~
.... ~ ~
20 mV
/
'n
-
2.0 mV
I I
1
_
50
1
FIGURE 8 -
<=>
".
....
~
15
10
I
0
-5.0
,$>
-10
-15
/1/
i'I (""fU
J V
5.0 mV
./
K
!:i
".
...
4.0
:=
3.0
5
2.0
-+
".
c
0.1
c
FIGURE 9 -
'"
.s
~
50
v~
I
./
I /
I
III
~
V
2.0
v
~~
~~
m<=>
~".
I
I
0.45 ~ ~ 0.45
Sh~rt Circuit Current I--
~~
=;'"
0.30 ~ ~ 0.30
0.15
5.0
10
YO. OUTPUT VOLTAGE (V)
~
0.90
I?;:;0.60 ~ ~ 0.60
o IY
o
j
o
0.75 -0>075
1('\
r--... k-
-
1
0.90
I••
-
VEE
..1
FIGURE 11 - OUTPUT SATURATION VOLTAGE
versus OUTPUT CURRENT
=+25°C
\liS';\~~
VO-
2.0k-
1.0
tTHL. RESPONSE TIME (I's)
150
TA
-
Vee=+J5v
VEE=-15V
TA = +25°e
'" 100
<=>
=
~
I'
-
-
+
\\. I""-..
L\
I""-.. 5.0 mV
\. ./ ~ r-2.0 mV
w
".
0.6
~
Vin
-15
FIGURE 10 - OUTPUT SHORT CIRCUIT CURRENT
CHARACTERISTICS AND POWER DISSIPATION
'\
20 mV
0.5
-
RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES
\10-
~ 5.0
~
<>
0.2
0.3
0.4
trHL. RESPONSE TIME (~s)
t-- hi.
2.0
1.0
trLH. RESPONSE TIME (~s)
;;
Vee = +15~_
VEE=-15V
TA = +25°e -
-50
;;
Vee=+15V
t-- t-VEE=-15V
TA=+25°e t-- t--
~
\-11-2.0 mV
l\
~
0.6
IVEE 1-
-50
-100
n
Vo
+
~ ~
~ -100
0.5
500
w
<=>
1
.=
IJt
1
20 mV
_
'"
5.0
RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES
20 mV
5.0
'"
<=>
>
0.2
0.3
0.4
trLH. RESPONSE TIME (~s)
0.1
c
;;
Vee - +15 V
VEE=-15V f-- fTA = +25°e f-- f-
~
!:i
500
RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES
~
I
1
pE"
Yin
~
~
~
FIGURE 7 -
~~
o
15
"'0.1
5~
V ~
TA = -55°C
...-:: 10""
/ ' ......::
P' J.....::;
TA
f- r- TA -
+25°e
+125°e
0
8.0
16
MOTOROLA LINEAR/INTERFACE DEVICES
2-48
~~
~
24
32
40
10. OUTPUT CURRENT (rnA)
48
56
LM111, LM211, LM311
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
FIGURE 1J - POWER SUPPLY CURRENT
versus SUPPLY VOLTAGE
FIGURE 12 - OUTPUT LEAKAGE CURRENT
versus TEMPERATURE
3.6
100
!>z
-Vee
VEE
10
::::::::::
- =
+15 V
-15 V
.~\
<,\\'1
~
,:,y.\
\\1'1\'.,....
~
>-
ri'S
'I\\~'
a
I
I
I
;:l
~
I
I
I
I
I
I
I
I
I
Positive SupplV - Output low
4
\\,,\~~
~ 1.0
I
+25°C
TA
4' 3.0
Positive aJd NeJative
I
I
I
I
I
I
~ower ISUPPI! -
JutPUI High
-
a: 1.2
>=>
0>- 0.1
=>
~
0
c...
0.6
o ./
o
0.01
25
65
45
85
105
125
5.0
TA. TEMPERATURE IOe)
10
15
20
25
Vee-VEE. POWER SUPPLY VOLTAGE IV)
FIGURE 14 - POWER SUPPLY CURRENT versus
TEMPERATURE
,
3.0
2.6
Postive Supply -
:[
r1'8
~
Output low
Vee=+15V
VEE = -15 V-
""'-
i'...
2
...-
7- r-
/
-........
Positive and Negative Supply - Output High
1.4
"'" "'"
.............
"
............
1.0
-55
-25
+25
+50
+75
TA. TEMPERATURE 1°C)
+100
+125
APPLICATIONS INFORMATION
FIGURE 15 - IMPROVED METHOD OF ADDING
HYSTERESIS WITHOUT APPLYING POSITIVE
FEEDBACK TO THE INPUTS
FIGURE 16 - CONVENTIONAL TECHNIQUE FOR
ADDING HYSTERESIS
r-~~---,--o+15V
J.Ok
+15 V
J.Ok
82
33 k
4.7 k
5.0k
Cl
4.7 k
8
Input
Input 100
2
Rl
I
C2=*
I
I
Rl
5
LMlll
7
7
Output
510k
MOTOROLA LINEAR/INTERFACE DEVICES
2-49
Output
30
II
LM111, LM211, LM311
APPLICATIONS INFORMATION
Techniques for Avoiding Oscillations in Comparator Applications
Since feedback to almost any pin of a comparator can result in
oscillation, the printed-circuit layout should be engineered
thoughtfully. Preferably there should be a groundplane under the
LM111 circuitry (e.g., one side of a double layer printed circuit
board). Ground, positive supply or negative supply foil should
extend between the output and the inputs, to act as a guard. The
foil connectionsforthe inputs should be as small and compact as
possible, and should be essentially surrounded by ground foil on
all sides, to guard against capacitive coupling from any fast highlevel signals(such as the output). If Pins5 and 6 are not used, they
should be shorted together. If they are connected to a trim-pot,
the trim-pot should be located no more than a few inches away
from the LM 111, and a 0.01 I'F capacitor should be installed
across Pins 5 and 6. If this capacitor cannot be used, a shielding
printed-circuit foil may be advisable between Pins 6 and 7. The
power supply bypass capacitors should be located within a
couple inches of the LM111.
A standard procedure is to add hysteresis to a comparator to
prevent oscillation, and to avoid excessive noise on the output.
In the circuit of Figure 16, the feedback resistor of 510 k.o from
the output to the pOSitive input will cause about 3.0 mV of
hysteresis. However, ifR2 is larger than 100n, such as 50 k.o, it
would not be practical to simply increase the value of the positive
feedback resistor proportionally above 510 k.o to maintain the
same amount of hysteresis.
When both inputs of the LM 111 are connected to active signals,
or if a high-impedance Signal is driving the positive input of the
LM111 so that positive feedback would be disruptive, the circuit
of Figure 15 is ideal. The positive feedback is appliedto Pin 5 (one
of the offset adjustment pins). This will be sufficientto cause 1.0
to 2.0 mV hysteresis and sharp transitions with input triangle
waves from a few Hz to hundreds of kHz. The positive-feedback
Signal across the 82 n resistor swings 240 mV below the positive
supply. This signal is centered around the nominal voltage at Pin
5, so this feedback does not add to the offset voltage of the comparator. As much as 8.0 mV of offset voltage can be trimmed out.
using the 5.0 k.o pot and 3.0 kO resistor as shown.
When a high-speed comparator such as the LM111 is used
with high-speed input signals and low source impedances, the
output response will normally be fast and stable, providing the
power supplies have been bypassed (with 0.1 I'F disc capacitors),
and that the output signal is routed well away from the inputs
(Pins 2 and·3) and also away from Pins 5 and 6.
However, when the input signal is a voltage raf1)p or a slow
sine wave, or if the signal source impedance is high (1.0 kO to
100 kll). the comparator may burst into oscillation near the
crossing-point. This is due to the high gain and wide bandwidth
of comparators like the LM 111 series. To avoid oscillation or
instability in such a usage. several precautions are recommended, as shown in Figure 15.
The trim pins(Pins 5 and 6) act as unwanted auxiliary inputs. If
these pins are not connected toa trim-pot. they should be shorted
together. If they are connected to a trim-pot. a 0.01 J.LF capacitor
(C11 between Pins 5 and 6 will minimize the susceptibility to ac
coupling. A smaller capacitor is used if Pin 5 is used for positive
feedback as in Figure 15.
Certain sources will produce a cleaner comparator output
waveform if a 100 pF to 1000 pF capacitor (C2) is connected
directly across the input pins. When the signal source is applied
through a resistive network, R1, it is usually advantageous to
choose R2 of the same value, both for dc and for dynamic (ac)
considerations. Carbon, tin-oxide, and metal-film resistors have
all been used with good results in comparator input circuitry, but
inductive wirewound resistors should be avoided.
When comparator circuits use input resistors (e.g., summing
resistors), their value and placement are particularly important.
In all cases the body of the resistor should be close to the device
or socket. In other words, there should be a very short lead length
or printed-circuit fall run between comparator and resistor to
radiate or pick up signals. The same applies to capacitors, pots,
etc. For example, if R1 = 101<.0, as little as 5 inches of lead between
the resistors and the input pins can result in oscillations that are
very hard to dampen. Twisting these input leads tightly is the
best alternative to placing resistors close to the comparator.
FIGURE 18 -
FIGURE 17 - ZERO-CROSSING DETECTOR DRIVING
CMOS LOGIC
3.0k
RELAY DRIVER WITH STR08E CAPA81L1TY
Vcc; +15 V
UJ
10k
Input
----<>-1
Vcc
>-<>-<~-.
'D1
Output
to CMOS Logic
*Zener Diode 01
protects the comparator
from inductive kickback
TIL
a nd voltage tra nsients
Strobe on the VCC2 supply line.
VEE; -15 V
MOTOROLA LINEAR/INTERFACE DEVICES
2-50
®
LM124, LM224,
LM324, LM324A
LM2902
MOTOROI.A
Specifications and Applications
Information
QUAD DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS
QUAD LOW POWER OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The LM124 Series are low-cost, quad operational amplifiers
with true differential inputs. These have several distinct advantages over standard operational amplifier types in single supply
applications. The quad amplifier can operate at supply voltages
as low as 3.0 Volts or as high as 32 Volts with quiescent currents
about one fifth of those associated with the MC1741 (on a per
amplifier basis). The common mode input range includes the negative supply, thereby eliminating the necessity for external biasing
components in many applications. The output voltage range also
includes the negative power supply voltage.
,.- ..•
J SUFFIX
CERAMIC PACKAGE
CASE 632-0S
• Short Circuited Protected Outputs
• True Differential Input Stage
~,
14'-='
• Single Supply Operation: 3.0 to 32 Volts
• Low Input Bias Currents: 100 nA Max (LM324A)
• Four Amplifiers Per Package
1
• Internally Compensated
N SUFFIX
PLASTIC PACKAGE
CASE 646-06
(LM224. LM324.
LM2902 Only)
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
• Common Mode Range Extends to Negative Supply
• Industry Standard Pinouts
PIN CONNECTIONS
Out
1
MAXIMUM RATINGS (TA = + 25°C unless otherwise noted)
Symbol
LM124
LM224
LM324,A
LM2902
VCC
VCC,VEE
32
±16
26
±13
Input Differential Voltage Range (1)
VIDR
±32
±26
Vdc
Input Common Mode Voltage Range
-0.3 to 26
Vdc
Rating
Power Supply Voltages
Single Supply
Split Supplies
VICR
-0.3 to 32
Input Forward Current (2)
(VI < -0.3 V)
IIF
50
Output Short Circuit Duration
ts
Junction Temperature
Ceramic Package
Plastic Packages
TJ
Storage Temperature Range
Ceramic Package
Plastic Packages
Operating Ambient Temperature
Range
LM124
LM224
LM324
LM324A
LM2902
In~uts
{
InP2uts
f
Unit
Vdc
-
'O}
5
Inputs
3
9
Out
2
Out
3
ITopView)
ORDERING INFORMATION
°c
175
150
Device
LM124J
Temperature Range
Package
- 55 to + 125°C
Ceramic DIP
-40 to +S5°C
Ceramic DIP
SO-14
LM2902D
°C
Tstg
-65 to + 150
-55 to + 125
LM2902J
Plastic DIP
LM2902N
°c
TA
SO-14
LM224D
LM224J
-
2
mA
Continuous
-55 to + 125
-25 to +S5
o to +70
o to +70
Out
4
-25 to +S5°C
Ceramic DIP
-
LM224N
-
LM324AD
SO-14
LM324AN
Plastic DIP
-40 to +S5
(1) Split Power Supplies.
(2) This input current will only exist when the voltage is negative at any of the input leads.
Normal output states will reestablish when the input voltage returns to a voltage greater
than -0.3 V.
LM324D
Oto +70°C
SO-14
LM324J
Ceramic DIP
LM324N
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
2-51
Plastic DIP
II
N
Z
~;i
3~
g CD
0"
n
~
II II
0 I
II
I
;.~ n~~g;
05 Q'nnn
~ =is
;-0'0'0~30 ~;:.~;:
o
cc
Q.
ttl
NS::S:::3:
~NN"'"
~ ~ >~!§~
"'~.~
0
-i
0
:0
0
r
~
r
z
m
~
N
U,
N
~~
(iJ ~
rg:
:>":>
~-g
II
0-
+1»++
;!!.
_S::~n
II
II
B~
fR
m en
:T
3_':::10.0
0 CD
m
(")
g g.;
en
m 0'0
m
~?
3
2.0
7.0
9.0
-
2.0
-
-
-
7.0
10
AVlo'AT
-
7.0
-
-
7.0
30
-
7.0
-
-
7.0
-
110
-
3.0
-
5.0
5.0
-
-
50
150
-
-
-
10
300
10
-
-
50
200
10
-
-
-
30
75
5.0
-
30
100
10
-
-
-90 -150
- -300
-
-45
-100
-200
-
-90 -250
- -500
pAre
nA
-
28.3
28
0
0
-
28.3
28
0
0
-
-
Vee
-
-
Vee
-
50
25
100
-
25
15
100
-120
-
-
-
-
28.3
28
Vee
0
0
-
-
24.3
24
Vee
-
-
-
100
-120
-
-
65
70
-
-
25
15
-120
-
-
65
70
-
-
100
-
-
-
-120
-
dB
50
70
-
dB
100
-
65
100
-
65
100
-
50
100
-
dB
0
-
3.3
0
-
3.3
0
-
3.3
0
-
3.3
V
cg:::I 0=?
g5
Output Voltage - High Limit (TA ~ Thigh to Tlow) (Note 1)
Vee ~ 30 V (26 V for LM29021, RL ~ 2.0 k!l
Vee ~ 30 V (26 V for LM29021, RL ~ 10 kO
VOH
26
27
-
-
26
27
28
-
22
23
-
28
-
-
-
-
28
26
27
24
-
VOL
-
5.0
20
-
5.0
20
-
5.0
20
-
5.0
100
< e.
Output Voltage - Low Limit
Vee ~ 5.0 V, RL ~ 10 kO, TA ~ Thi h to Tlow (Note 1)
Output Source Current (VID = + 1.0 V, VCC
TA ~ 25°C
TA ~ Thioh to Tlow (Note 1)
10+
20
10
40
20
-
20
10
40
20
-
20
10
40
20
-
20
10
40
20
-
10
5.0
12
20
8.0
50
-
-
10
5.0
12
20
8.0
50
-
20
8.0
50
-
10
5.0
20
8.0
-
-
".A
-
40
60
-
40
60
-
40
60
-
-
-
10
5.0
12
40
60
mA
-
-
3.0
1.2
-
1.4
0.7
3.0
1.2
-
-
3.0
1.2
-
-
-
3.0
1.2
~~ ~~.
CIIn
g.g:
-0
CD
j
+
~ ~~
:> ~
-
rn CD
;- D"
Common-Mode Rejection Ratio
RS '" 10 k!l
=
15 V)
Output Sink Current
(VID ~ -1.0 V, Vee ~ 15 V
TA ~ 25°C
TA ~ Thigh to Tlow (Note 1)
VID ~ -1.0V, Va ~ 200 mY, TA ~ 25°C
V
a~'~~<
Output Short Circuit to Ground (Note 3)
los
§.;- ~;
a~·
~g:
::::1 ~m
3 '"
. ~
Power Supply Current (TA ~ Thigh to Tlow) (Note 1)
Vee ~ 30 V (26 V for LM2902), Va ~ 0 V, RL ~ 00
Vee ~ 5.0 V, Va ~ 0 V, RL ~ 00
ICC
mV
mA
-
mA
la-
-
mA
-
-
-
~
r-
s:N
CD
N
V
V/mV
-
s:
o
65
!!.n men
;:J
w
V
0
0
s:
nA
VOR
'011:1(0<
g
-90 -250
- -500
r-
~r-
PSRR
~ ~'g S~
I:
-
-
-
~
/LVre
Output Voltage Range
RL ~ 2.0 k!l (RL '" 10 k!l for lM2902)
~~~ ~~
Q)
mV
-
Alia/AT
Unit
Power Supply Rejection Ratio
=.g:
S 1'\,)<
tg.
!! s.
Max
85
S.o
~ia g §
o !!! 3_
;'2
Typ
70
g~~~~
en e. III lit 0
<
Min
eMRR
"'::::1
1'jQ.
(")
~Ci~.
LM2902
MIx
3.0
5.0
liB
Channel Separation
1.0 kHz os;; f os;; 20 kHz, Input Referenced
§
Typ
-
AVOL
~~
CD .....
Min
2.0
large Signal Open-Loop Voltage Gain
RL ~ 2.0 kO, Vee ~ 15 V, For Large Va Swing,
TA ~ Thigh to Tlow (Note 1)
~
N
t
Max
-
VI DR
... CD
Typ
5.0
7.0
Differential Input Voltage Range
i§
Min
-
~ ~ ~~~Q'
~CD;::t
CI
Input Bias Current
TA ~ Thioh to Tlow (Note 1)
Max
2.0
w~. ~5.~~
:<::::J n'nCl
"Tl
m
Average Temperature Coefficient of Input Offset Current
TA ~ Thigh to Tlow (Note 11
Typ
-
VieR
Z
-i
~
Average Temperature Coefficient of Input Offset Voltage
TA ~ Thigh to Tlow (Note 1)
Min
Via
Input Common-Mode Voltage Range (Note 2)
Vee ~ 30 V (26 V for LM2902)
Vee ~ 30 V (26 V for LM2902). TA ~ Thioh to Tlow
:0
:0
~
0:>"
-m
Input Offset Voltage
Vee ~ 5.0 V to 30 V (26 V for LM2902).
VieR ~ OVtoVee -1.7V,VO=1.4V,RS ~ 00
TA ~ 25°C
TA ~ Thioh to Tlow (Note 1)
Input Offset Current
TA ~ Thioh to Tlow (Note 1)
"0
s:
Symbol
Characteristic
LM324
LM324A
LM1241LM224
..
II
I
s:....
(Vee ~ 5.0 V, VEE ~ Gnd, TA ~ 25°C unless otherwise noted)
.=I en
~~.
gS
ELECTRICAL CHARACTERISTICS
r-
LM124, LM224, LM324,A, LM2902
REPRESENTATIVE CIRCUIT SCHEMATIC
(One-Fourth of Circuit Shown)
Output
Bias Circuitry
Common to Four
Amplifiers
.-----------~--------------~--~--------~----------~------Tt----_1~~OVcc
a16
a12
)---4
25
Q25
2.4 k
LARGE SIGNAL VOLTAGE
FOLLOWER RESPONSE
of each consists of differential input devices 020 and
018 with input buffer transistors 021 and 017 and
the differential to single ended converter 03 and 04.
The first stage performs not only the first stage gain
function but also performs the level shifting and trans·
conductance reduction functions. By reducing the trans·
conductance a smaller compensatian capacitor (only 5 pF)
can be employed, thus saving chip area. The transcon·
ductance reduction is accomplished by splitting the col·
lectors of 020 and 018. Another feature of this input
stage is that the input common·mode range can include
the negative supply or ground, in single supply operation,
without saturating either the input devices or the dif·
ferential to single·ended converter. The second stage can·
sists of a standard current source load amplifier stage.
Each amplifier is biased from an internal·voltage regu·
lator which has a low temperature coefficient thus giving
each amplifier good temperature characteristics as well as
excellent power su pply rejection.
II.
Vee"" 15Vdc
RL'" 2 kn
T A"" 25°C
o>
;;
\
/
/
\
r'"'""""
1\.
5.0 J..ts/Div.
CIRCUIT DESCRIPTION
The LM 124 Series is made using four internally com·
pensated, two·stage operational amplifiers. The first stage
: b
tlJ
SINGLE SUPPLY
SPLIT SUPPLIES
CC
v to. VCC(Max.)
4
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-53
..=.. 1.5 V to VEE{Max,)
E
LM124, LM224, LM324,A, LM2902
TYPICAL PERFORMANCE CURVES
FIGURE 1-INPUTVOLTAGE RANGE
FIGURE 2 - OPEN LOOP FREQUENCY
±20
12 0
~g= \5J
±18
en
....
e;
0
±16
±14
w ±12
~
~
o
Negative
±lO
::>
~ ±6.a
1./"':"
~ ±4.0
t"-
O
"Positive
.....
0
/
±2.0
t"-
O
I./"': V
±2.0
....... t"-
0
\ V. . . V
....-:.- K
;: ±8.D
±4.0 ±6.0 ±s.a ±lO
±12 ±14
±16
VCCNEE, POWER SUPPLY VOLTAGES (VOLTS)
±18
-2 0
1.0
±20
F:::::j::=F1RJlTTI-TiTTllrTTT-ilTffirr
ti
~
~
§;
Ol---l--+++++I\I--+-+-I-j
1\
~
lOOk
10k
1.0M
(Hz)
550
VCC-30V
V~!:~;~c-
50 0
Wt
~
w
«
'">::;
~~~ : ~5n~
8.0 ~--~+-~++~-'\'-f-+-H GAIN = -100 +-+H++Iftl
RI "" 1 kn
S.O
RF = 100 kn +--+-+-+++II-H
Input
45 0
400
CL = 50 pF
1
J1
Output
o
> 35 0
~ 4.0 f-·--t-+--+-++tttt--+---r~t-tt+tt---t-+-t-+++t-H
1\
g
>
1.0k
FIGURE 4 - SMALL-SIGNAL VOLTAGE FOLLOWER
PULSE RESPONSE
(Non-Inverting)
~l Uill
2 12~--~+-~~~--~-+~++tH+---~+-~++~
~
100
10
t, FREQUENCY
FIGURE 3 - LARGE-SIGNAL FREQUENCY RESPONSE
14
=
0
V. . .
V ... V "
2
VeE - Gnd
TA 250 C
r'"--r-.
,;
~
[
~ 25 0
'IJ
~ 300
2.0 1---t-+--+-++tttt--+-++H;.Ht---t-+-+-+++t-H
II
V
~
200
;
1.0
t, FREQUENCY
2.0
(kHz)
FIGURE 5 - POWER SUPPLY CURRENT versus
POWER SUPPLY VOLTAGE
3.0 4,0 5.0
t, TIME (".
6.0
7.0
8.0
FIGURE 6 - INPUT BIAS CURRENT versus SUPPLY VOLTAGE
2,4
«
T1
2,1
=
2JOC
Rl"" 00
I-0
E 1.8
~
::
13
~
-
1.5
1.2
~
"'~
0.6
~
0.3
........
"
0
0.9
o
o
70
5.0
10
15
20
25
VCC, POWER SUPPLY VOLTAGE (VOLTS)
30
35
o
2.0
4.0
6.0
10
12
14
VCC, POWER SUPPLY VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-54
16
18
20
LM124, LMU4, LM324,A, LM2902
APPLICATIONS INFORMATION
FIGIIiR.E 7 - VOLTAGE REFERENCE
FIGURE 8 - WIEN BRIDGE OSCILLATOR
II
50k
Al
10k
Vo
1
Vref
Va'" 2.5 V(1 +
"""'2 Vee
For
:~)
f o ;;;' kHz
R'" 16kn
c
C;;; 0.01 Jl.F
A
FIGURE 9 - HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER
FIGURE 10 - COMPARATOR WITH HYSTERESIS
1
-R
.1
C
R
"::LBHysteresis
R2
Al
V ref . .-'V'>IY-....-O--j
----<}-;
Vin . .
VOL
1
-A
VinL: VinH
C
.2
Vref
VinL "" R ,R+' R2 (VOL - V,sf) + Vref
A
Vjn~'" R1 :'R2 (VOH eo=C (1 +a+b) ~a2 -e1)
H;;; R1
~1R2 eVOH -
Vref) + Vref
VOLI
FIGURE 11 - BI·QUAD FILTER
A
R
lOOk
R1 "" QR
Al
R2--
R
TBP
100k
R3 - TN R2
Cl - 10C
fa,.. 1 kHz
a
Bandpass
Vref
R3
Output
= 10
Tap"" 1
Rl
TN"'"
R2
Cl
>-O----1E---4 Notch Output
A-160H}
C = 0.001 "F
Al- 1.6 Mil
Vref
T BP "" Canter Frequency Gain
TN'" p ••tband Notch Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2·55
A2 - 1.6 Mil
R3-1.6MIl
II
LM124, LM224, LM324,A, LM2902
APPLICATIONS INFORMATION (continued)
FIGURE 12 - FUNCTION GENERATOR
1
Vref::::
2' Vee
FIGURE 13 - MULTIPLE FEEDBACK BANDPASS FILTER
R2
Triangle Wave
Output
VCC
300k
Vref
R3
>-<:>-+~7V.5"'k---'---<~ +1/4
R1
LM324
>-0-+_
Square
4
Wave
Output
R3
C
>-,D-
:n
:::,
Z
-i
m
:n
"T1
l>
(')
m
0
m
<
n
m
en
=
-f.5
lee
08
(For All ,Comparators)
50
Av
=15Vdc
Large Signal Response Time
l>
Unit
25
2.0
0.8
2.0
0.8
2.0
0.8
2.0
0.8
'.0
RL=ao,VCC=30Vdc
r
Max
±1.0
Voltage Gain
RL;;.t: 15kfl. Vee
0
r
Ty.
liB
RL:::
:n
Min
V,O
Supply Current
s:
Max
Input Offset Voltage (NOIIl 4)
Input Common-Mode Voltage Range tNote 7)
0
-i
0
3:
MC3302
Ty.
Input Bias Current (Notes 4. 5)
(Output in Linear Range)
Input Offset Current (Note 4)
200
200
200
300
300
300
300
1.3
1.3
'.3
1.3
200
50
25
2.0
2.5
0.8
'00
30
300
300
2.0
I
=
Response Time (Note 6)
VRl
=5.0 Vdc, RL =5.1 kll
Output Sink Current
V, H;;' +1.0Vdc, VI(+) = 0,
6.0
'sink
VO~
6.0
'6
6.0
'6
6.0
'6
'.3
18
6.0
..
'.3
6.0
'6
rnA
I VlmV
VI TTL logic Swing.
V,ef 1.4 Vdc, VRL 5.0 Vdc.
RL=5'kn
=
mA
'6
1.5 Vdc
Saturetion Voltage
VI(-I ~ +1.0 Vdc, VIC+) = 0, 'sink" 4.0 mA
Vsat
130
Output Leakage Current
V~+)$! +1.0 Vdc, VIH= 0, Vo = +5.0 Vdc
10L
0.1
400
'30
400
'30
400
'30·
0.1
0.'
400
130
0.'
400
130
500
mV
0.1
0.'
nA·
lM2901
MC3302
Min I Typ I Max
Unit
PERFORMANCE CHARACTERISTICS (VCC'" +5.0 Vdc. TA llow to Thigh INote 3])
"'0
Symbol
Characteristic
LM'39A
Min I Typ I Max
I
Typ
~
LM,39
lM239A/339A
Min
I Max Min
I
LM239/33a ..
Typ-rMaii:'T.Mlnl Typ I Max
Min ,. Typ I Max
Input Offset Voltage (Note 4)
V,O
±4.0
±4.0
±9.0
+9.0
'±15
±40
mVdc:
Input Bias Current (Notes 4,5)
(Output in linear Rangel
liB
300
400
300
400
500
'000
nA
Input Offset Current (Note 4)
',0
±100
±150
±100
±150
±200
±3CO
nA
o
I
Input Common-Mode Voltage Range
VICR
Vee
-2.0
Vee
-2.0
Vee
-2.0
V
Saturation Voltage
VIH;;;t +.1.0 Vdc. VI(+) = 0, Isink -:0;;: 4.0 rnA-
Vsat
700
700
700
700
700
700
mV
Output Leakage Current
V~+) ~ +1.0 Vdc. VIH:;: 0, Vo '" 30 Vdc
10L
1.0
'.0
1·.0
'.0
'.0
.1.0
.A
Differential Input Voltage
All VI ;;= Vdc iNote 7}
V/D
Vee
Vd.
°
Vee
-2.0
Vee
0
Vee
-2.0
Vee
0
Vec
Vee
0
Vee
-2.0
Vee
0.·
NOTES:
,. The maximum output current may be as high as20 rnA. independent of the magnitude of Vee. Output short circuits to Vee can cause excessive heating and eventual
destruction.
2. This magnitude of input current will only occur if the leads are driven more negative than ground or the negative supply voltage. This is-due to the input PNP collectorbasejunction becoming forward biased, acting as an input clamp diode. There is also a lateral PNP parasitic transistor actfOJ!l wmdlt-cancause the output voltage of
the comparators to go to the Vee vottage level (or ground if overdrive is large) during the time that an input is driven negative. This ~the device when limited
to the max rating and norma~ output states will recover when the Inputs become ~ ground or negative supply.
>
3. LM139/'39A - T,ow = -55'C. Thigh = +' 25'C
3. LM239/239A - T,ow = -25'C. Thigh = +85'C
4.
5.
6.
7.
=
..
r"
ELECTRICA:L CHARACTERISTICS (Vee = +5.0 Vdc, TA = 25°C unless otherwise noted)
LM339/339A - T,ow = C'C. Thi h = +70'C
LM290'/MC3302 - T,ow = -4{)~C. Thigh = +85'C
At the output switch point, Vo 1.4 Vdc, RS :e;;; 1000, 5.0 Vdc ~ Vee :e;;; 30 Vdc, with the inputs over the full common· mode range (0 Vdc to Vee - 1.5 Vdc).
The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state.
The responsatime specified is for a 100 mV input step with 5.0 mV overdrive. For larger signals, 300 ns is typical.
Positive excursions of input voltage may exceed the power supply level. As long as one of the inputs remain within the common-mode range, the comparator will provide the proper output state.
=
»
....
I:
~
>
....
.w
==
~
..~
.o
3:
ow
2
LM139,A, LM239,A, LM339,A, LM2901, MC3302
FIGURE 3 - NON-INVERTING COMPARATOR WITH
HYSTERESIS
FIGURE 2 -INVERTING COMPARATOR WITH HYSTERESIS
+
+Vcc
vee
R3
10k
Rref
10 k
V,N
Vref
Va
Rref
10k
+vcc
Rl
R2
10k
1M
10 k
Rl
v
1"3
Vref"'"
Vee R1
Rref + Rl
R3~ Rl II
VH ==
R1111R re f + R2
R2»
R2
RrefllR2
Rl//Rref
(V
ref -
1M
~
Vee Rl
Rref + Rl
Rl IIRref
Amount of Hysteresis
-v·j
Omax
Omln
VH =
R2~2R3
VH
(VO max - VO mm )
RrefllRl
TYPICAL CHARACTER ISTICS
(VCC = +15 Vdc, T A = +250 C (each comparator) unless otherwise noted.)
FIGURE 4 -
FIGURE 5 - INPUT BIAS CURRENT
NORMALIZED INPUT OFFSET VOLTAGE
1.4 0
8
V
~ 1.20
~
../'
t;;
*
c
1.0
TA =1_55oe
~--r;;-: +15~
l---- f--f---- ~
-
,/'
N
:::l
«
,/'
0.80
- -
6
,/'
./
0
W
~
42
V
-------
I-
k,---TA
=
+125°C
6.0
0.60
-50
-25
50
25
100
75
o
o
125
4.0
8.0
11
TA, AMBIENT TEMPERATURE (0C)
FIGURE 6 - OUTPUT SINK CURRENT versus
OUTPUT SATURATION VOLTAGE
8. 0
7. 0
]:
I
a
6. 0
TA = }15 o e
TA - -55 o e j
5. 0
V
4. 0
3.
E
2. 0
0
1.
/
/ 1/ /
>-
~
16
Vee (Vdcl
III
/
/
TA=+115°e
/
;,V /
o°1~V
'/
100
200
300
400
500
V,at. OUTPUT SATURATION VOLTAGE (mVI
MOTOROLA LINEAR/INTERFACE DEVICES
2-59
10
14
18
31
LM139,A, LM239,A, LM339,A, LM2901, MC3302
FIGURE 8 - SQUAREWAVE OSCILLATOR
FIGURE 7 - DRIVING LOGIC
fI
Vcc
10 k
100 k
>~t----
(VOLTAGE FOLLOWER)
g +20
IIIII TI III ifll---+-+H+++ll---1\-\+-+-++++!j
4.0 r---+++rH-tttt-rrrrr-t-++-H
II +ttt-+-+-++t+Ht-+---+'I0.. -1 I
;:;; -1 0
I
'"~
~ -7. 0
1
-6. 0
Ig -5. 0
0-4. 0
> -3. 0
-2.0 ~
-1.0
100
200
.1
a...
.±6 v
1
1
1
5.0k7.0k 10k
V
~1 6
'::;1 4
12
10
~ 8. 0 6. 0
> 4. 0
2. 0 -
ci
0
+18 V
+15 V
+12 V
+9.0 V
+6.0 V
+5.0 V
1.0
2.0
3.0
4.0
5.0
6.0
7.0
RL, LOAD RESISTANCE (k!l)
8.0
9.0
MOTOROLA LINEAR/INTERFACE DEVICES
2-63
I
I
±6V
I
II
I
5007001.0k
2.0k
Rl, LOAD RESISTANCE (OHMS)
~1 8 - +21 V
§;
~
±15 V SUPPLIES
I
,
+24 V
0
I II
t/
./
: +30 V Supply
22
I
I
1::24 - +27 V
z
10M
±9 V
FIGURE 5 - OUTPUT VOLTAGE SWING versus
LOAD RESISTANCE (Single Supply Operation)
~
"
1.0 M
±!2V
-9. 0
~ -8. 0
±9V
500 700 1.0 k
2.0 k
Rl, LOAD RESISTANCE (OHMS)
-
-I 3
-I 2
I
~~ ~:~
o
-I 5
-I 4
±12 V
~ 9.0
100 k
FIGURE 4 - NEGATIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
±15 V SUPPLIES
§; 8.0
10 k
~
I. FREQUENCY (Hz)
FIGURE 3 - POSITIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
15
14
13
12
II
"" ""
10
5.0k 7.0k 10k
LM148, LM248, LM348
FIGURE 7 -
II
FIGURE 6 -
OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
NONINVERTING PULSE RESPONSE
105
,..............
100
1\
I
95
~
90
'""
~
5
i
0
z
~UTPUT
w
\
"
~
.......-
o
>
\
11PUT
L
L
./'
V
5
70
o
2.0
4.0
6.0
8.0
10
12
14
16
Vee, IVEEI, SUPPLY VOLTAGES (VOLTSI
18
20
APPLICATIONS INFORMATION
FIGURE 8 -
VOLTAGE REFERENCE
FIGURE 9 -
WIEN BRIDGE OSCILLATOR
SOk
R1
10k
Vref=t
Va
2.5 V(1 +
Vee
For
fa"" 1 kHz
:~.)
R
C
R
RGURE 10 -
HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER
1
-R
C
.1
FIGURE 11 -
IlF
R
R1
Vref ......,..,..,..........1:>-1
1
Hvsteresil
"lBVOL
-R
VinL : VinH
C
Vref
R
VinL "" R,R+1 R2 (VOL - Vref) + Vref
VinH= A1 :'R2 (VOH - Vref) + Vref
8 0 ~ C (1
= 0,01
COMPARATOR WITH HYSTERESIS
R2
.2
= 16 kO
+ a + b) (e2 - 81)
H = Rl : ' R2 (VOH - VOLI
MOTOROLA LINEAR/INTERFACE DEVICES
LM148, LM248, LM348
FIGURE 12 - HIGH IMPEDANCE INSTRUMENTATION BUFFER/FILTER
II
R2
R3
FIGURE 13 - FUNCTION GENERATOR
Triangle Wave
Output
1
Vref '"
2" Vee
R2
300k
Vref e-----o-j+ 114
R3
LM148~~~~VV~~--~~
1/4
LM148
>-o-+-_
Square Wave
Output
Vref
C
Rf
f=~
4CRf R1
if
R3:.~~
R2 + R1
FIGURE 14 - BI-QUAD FILTER
R
R
100 k
Rl = OR
Vin
C1
R2
C
C
e----jll--_~'INI___~H 1/4
Rl
R2=-
R
TBP
LM 148 >-o-+--Ylf'or-----4--o-i 1 /4
+
100k
R3=T N A2
LM148 ~-o-+-~W'l.----+---o....--~E-----e Notch Output
0.001 I'F
R1 = 1.6 Mfl
Vref =
~
Vee
R2 = 1.6 Mn
Vref
R3 = 1.6 Mn
Where
T BP
= Center
Frequency Gain
TN = Passband Notch Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-65
LM148, LM248, LM348
FIGURE 15 - ABSOLUTE VALUE DVM FRONT END
II
900 k
100 k
Vee
LM148 Quad Op-Amp
500 k
Bridge Null Adjust
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-66
®
LM158, LM258,
LM358, LM2904
MOTOROLA
Specifications and Applications
Information
DUAL DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS
DUAL LOW POWER OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Utilizing the circuit designs perfected for recently introduced
Quad Operational Amplifiers. these dual operational amplifiers
feature 1) low power drain. 2) a common mode input voltage range
extending to groundlVEE. 3) Single Supply or Split Supply operation
and 4) pin outs compatible with the popular MC1558 dual operational
amplifier. The LM158 Series is equivalent to one-half of an LM124.
H SUFFIX
Vee
These amplifiers have several distinct advantages over standard
operational amplifier types in single supply applications. They can
operate at supply voltages as low as 3.0 Volts or as high as 32 Volts
with quiescent currents about one-fifth of those associated with the
MC1741 Ion a per amplifier basis). The common mode input range
includes the negative supply. thereby eliminating the necessity for
external biasing components in many applications. The output voltage
range also includes the negative power supply vOltage.
•
•
Short Circuit Protected Outputs
True Differential Input Stage
•
•
•
•
Single Supply Operation: 3.0 to 32 Volts
Low Input Bias Currents
Internally Compensated
Common Mode Range Extends to Negative Supply
VEE/Gnd
(Top View)
•
Single and Split Supply Operation
•
Similar Performance to the Popular MC1558
J SUFFIX
CERAMIC PACKAGE
CASE 693-02
~
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
B
MAXIMUM RATINGS ITA
=
+25 0 e unless othecwise noted)
1
DSUFFIX
Symbol
LM158
LM258
LM358
LM2904
Vee
Vee. VEE
32
·16
26
' 13
Input Differential Voltage Range (1)
VIDR
·32
!26
Vdc
Input Common Mode Voltage Range (2)
VieR
-0.3 to 32
-0.3 to 26
Vdc
IIF
50
Rating
Power Supply Voltages
Single Supply
Spl it Suppl ies
Input Forward Current (3)
METAL PACKAGE
CASE 601-04
Unit
Vdc
PLASTIC PACKAGE
CASE 751-02
SO-8
Output A
1
7 Output B
611"OU"
rnA
IVI < -0.3 V)
Output Short Circuit Duration
ts
Junction Temperature
Ceramic and Metal Packages
Plastic Package
TJ
Storage Temperature Range
Ceramic and Metal Packages
Plastic Package
Tst9
Operating AmbIent Temperature Range
LM158
LM258
LM358
LM2904
°e
115
150
ORDERING INFORMATION
Device
°e
-65 to +150
-55to+125
°e
TA
-55 to +125
-25 to +85
to +70
o
-40 to +85
(1) Spl it Power Suppl ies.
(2) For Supply Voltages less than 32 V for the LM158/258/358 and 26 V for the LM2904,
the absolute maximum input voltage is equal to the supply voltage.
(3) ThiS input current VII II I only exist when the voltage is negative at any of the input leads.
Normal output states will reestablish when the input voltage returns to a voltage greater
than -0.3 V.
Temperature
Range
LMI58J
LM2904D
LM2904H
LM2904J
LM2904N
LM258D
LM258H
LM258J
LM258N
LM358D
LM358H
LM358J
LM358N
Package
Metal Can
LM15BH
MOTOROLA LINEAR/INTERFACE DEVICES
2-67
B
(Top View)
Continuous
-55to + 125°C
-40 to +85°C
Ceramic DIP
50-8
Metal Can
Ceramic DIP
Plastic DIP
50-8
-25 to +85°C
Metal Can
Ceramic DIP
Plastic DIP
50-8
oto
+ lO°C
Metal Can
Ceramic DIP
Plastic DIP
II
II
LM158, LM258, LM358, LM2904
ELECTRICAL CHARACTERISTICS (Vee = 5.0 V. VEE = Gnd. TA = 25 0 e unless otherwise noted)
LM158/LM258
Characteristic
Min
Symbol
Input Offset Voltage
Typ
Max
LM358
Min
Typ
LM2904
Max
Min
Typ
Max
Vee = 5.0 V to 30 V (26 V for LM2904).
Vie = 0 V to Vee - 1.7 V. Vo::o 1.4 V. RS = 0 n
TA = 25 0 e
T A = Thigh to Tlow INote 1)
-
2.0
-
5.0
7.0
-
2.0
-
7.0
9.0
-
2.0
7.0
-
pv/oe
5.0
45
SO
200
nA
10
-
pA/ue
nA
-
7.0
10
Average Temperature Coefficient of Input Offset Voltage
T A = Thigh to Tlow (Note 1)
Input Offset Current
T A = Thigh to Tlow (Note 1)
"VIO/"T
-
7.0
-
-
7.0
-
110
3.0
30
100
-
SO
150
"IIO/"T
10
-
-
5.0
-
Average Temperature Coefficient of Input Offset Current
TA = Thigh to Tlow (Note 1)
-
10
-
-
-
-45
-SO
-150
-300
-
-45
-50
-250
-500
-
-45
-50
-250
-500
a
a
-
2B.3
28
a
a
-
28.3
28
a
a
-
24.3
24
Input Bias Current
liB
TA = Thigh to Tlow (Note 1)
Input Common-Mode Voltage Range (Note 2)
V
VieR
Vee = 30 V (26 V for LM29041
Vee = 30 V (26 V for LM2904). TA = Thigh to Tlow
Differential Input Voltage Ranfje
VIDR
Large Signal Open-Loop Voltage Gain
RL = 2.0 kn, Vee = 15 V. For Large Vo Swi ng,
T A = Thigh to Tlow (Note 11
AVOL
Unit
mV
Via
Vee
-
Vee
Vee
V
V/mV
-
50
25
100
-
25
15
100
-
-
-
100
-
-
-
-
-
-120
-
-
-120
-
-
-120
-
dB
eMRR
70
85
-
65
70
-
50
70
-
dB
Power Supply Rejection Ratio
PSRR
65
100
-
65
100
-
50
100
-
dB
Output Voltage Range
RL = 2 kn (RL;;' 10 kn for LM2904)
VOR
a
-
3.3
a
-
3.3
a
-
3.3
V
Output Voltage High Limit (T A Thigh to TlowliNote 1)
Vee = 30 V (26 V for LM2904). RL = 2 kll
Vee = 30 V (26 V for LM2904). RL = 10 kl1
VOH
26
27
-
-
26
27
-
22
23
-
28
-
-
28
24
-
Output Voltage-Low limit
Vee = 5.0 V. RL = 10 kn. TA = Thigh to Tlow (Note 1)
Output Source Current
VID =+1.0 V. Vee= 15V
VOL
-
5.0
20
-
5.0
20
-
5.0
20
mV
10+
20
40
-
20
40
-
20
40
-
mA
10
12
20
SO
-
10
12
20
SO
-
10
20
-
-
-
mA
pA
-
40
60
-
40
60
-
40
60
mA
-
1.5
0.7
3.0
1.2
-
1.5
0.7
3.0
1.2
1.5
0.7
3.0
1.2
Channel Separation
1.0 kHz';;;; f ~ 20 kHz, Input Referenced
Common-Mode Rejection Ratio
RS" 10 kn
Output Sink Current
V
10-
VID = -1.0 V. Vee = 15 V
VID = -1.0 V. Va = 200 mV
Output Short Circuit to Ground (Note 3)
los
Power Supply Current (T A - Thigh to Tlow)(Note 11
lee
Vee = 30 V (26 V for LM2904). Va = a v. RL = ~
Vee = 5 V. Va = a V. R L = ~
mA
-
-
NOTES:
(1)
Tlow '" ~550C for LM158
== --40°C for LM2904
= - 25°C for LM258
= OoC for LM358
Thigh'" + 125°C for LM158
= +85 0 C for LM2904
and LM258
= + 70De for LM358
(2)
The
voltage
input
common-mode
or
either
input
0.3 V. the upper end of the common-mode voltage range
is Vee - 1.7 V. but either or both inputs can go to + 32 V
without damage (+26 V for LM29Q4).
(3)
II
and
eventual
destruction.
Vee can cause excessive
Destructive
dissipation
can result from simultaneous shorts on all amplifiers.
@Dh5V
SINGLE SUPPLY
3.0 V to Vee (Max)
Short circuits from the output to
heating
signal
voltage should not be allowed to go negative by more than
SPLIT SUPPLIES
Vee
cc
i----l-_=.,
2
-=VEE
VEE/Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
2-68
to VCC(Max)
1.6 V to VEE (Max)
LM158, LM258, LM358, LM2904
Bias Circuitry
REPRESENTATIVE CIRCUIT SCHEMATIC
(One-Half of CirCUit Shown)
Common to Both
Output
Amplifiers
r------~------~~-~----~-----4_---~--_.-~
Vee
0161':'----,
CIRCUIT DESCRIPTION
LARGE SIGNAL VOL TAGE
FOLLOWER RESPONSE
The LM158 Series is made using two internally com-
II
pensated, two-stage operational amplifiers. The first stage
of each consists of differential input devices 020 and
018 with input buffer transistors 021 and 017 and
the differential to single ended converter 03 and 04.
The first stage performs not only the first stage gain
function but al50 performs the level shifting and trans-
Vee =- 15 Vdc
A L '= 2 kH
T A ~ 25°C
>
a
:;
_1
\
/
/
r"'""
conductance reduction functions. By reducing the transconductance a smaller compensation capacitor (only 5 pF)
can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of 020 and 018. Another feature of this input
stage is that the input common-mode range can include
the negative supply or ground, in single supply operation,
without saturating either the input devices or the differential to single-ended converter. The second stage consists of a standard current source load amplifier stage.
Each amplifier is biased from an internal-voltage regulator which has a low temperature coefficient thus giving
each amplifier good temperature characteristics as well as
excellent power supply rejection.
5.0J../s/D;v
MOTOROLA LINEAR/INTERFACE DEVICES
2-69
II
LM158, LM258, LM358, LM2904
TYPICAL PERFORMANCE CURVES
II
FIGURE 2 - OPEN LOOP FREQUENCY
FIGURE 1-INPUTVOLTAGE RANGE
±20
tg ~ J
120
\5
VEPGnd
TA ~ 25°C
±lB
0
iii ±t6
V
....
~ ±14
~ ±t2
~ ±lO
o
;:: ±8.D
\ /.
V
i'o.r-.
r-.
0
r-~
0
Positive
L./:V
'> ±4.0
'"
0
VK
'"~ ±6.0
±2.0
V
Negattve
......
0
V ... V
v-::; V
~
0
./
·2 0
±2.0
±4.0
±6.0
±R.D
±lO
±t2
±14
±tS
±18
100
10
1.0
±20
1:
~
...
lil
10
~
8. 0
g
~
S.0
;:!i
;
~
mt
VCC
VEE
i\
\
4. 0
~
~
450
'"'"
400
...
15 V
Gnd
!3
RI = 1 ku
> 35 0
=
1
100 kn
1\
30
1\
Ir-
0
V
200
10
~
1000
100
1.0
f. FREQUENCY (kHz)
FIGURE 5 - POWER SUPPLY CURRENT versus
POWER SUPPLY VOLTAGE
2. 4
~
T1 2JOC
RL ~-
2. 1
~
~
a~
II:
o.9
6.0
1.0
8.0
I--
.......
-
1.2
D.6
3.0 4.0 5.0
t. TIME (",)
0
1. 5
~"'
2.0
FIGURE 6 -INPUT BIAS CURRENT versus SUPPLY VOLTAGE
8
~
r
I,.-0utput
~ 25 0
............
0
1.0
1 1.
CL~50pF
I
o
2.0
o
>
V~~:~;~C-
Input
;;
E
GAIN~·100
RF
1.0M
VCC~30V
500
1\
o
'"
550
III
12
100 k
10k
FIGURE 4 - SMALL·SIGNAL VOLTAGE FOLLOWER
PULSE RESPONSE
(Non-Inverting)
FIGURE 3 - LARGE·SIGNAL FREQUENCY RESPONSE
14
1.0k
f. FREQUENCY (Hz)
VCCIVEE. POWER SUPPLY VOLTAGES (VOLTS)
""" "
0
~ O.3
150
0
5.0
10
15
20
25
Vcc. POWER SUPPLY VOLTAGE (VOLTS)
30
35
2.0
4.0
6.0
10
12
14
Vcc. POWER SUPPLY VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-70
16
18
20
LM158, LM258, LM358, LM2904
APPLICATIONS INFORMATION
FIGURE 8 - WIEN BRIDGE OSCILLATOR
FIGURE 7 - VOLTAGE REFERENCE
50 k
R1
Vcc
10 k
LM358
~~~
_ V0
2.5 V
1
fo'"
2n-RC
1
Vref
"'"2 Vee
For
2.5V(1+'~2.)
fa·"" 1 kHz
R=-16kn
C
R2
C -= 0.01 pF
R
FIGURE 9 - HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER
FIGURE 10 - COMPARATOR WITH HYSTERESIS
1
-R
.1
R
C
Hvsteresis
R2
R1
V ref _AA/V-......o-......--,~ Notch Output
R-160kn
C = 0.001 JJ.F
Rl'" 1.6Mn
Vref
T BP '" Center Frequency Gain
TN '" Passband Notch Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-71
A2=1.6Mn
R3"" 1.6Mn
LM158, LM258, LM358, LM2904
APPLICATIONS INFORMATION (continued)
FIGURE 12 - FUNCTION GENERATOR
R2
Triangle Wave
Output
1
Vref'"
'2 Vee
300 k
Vref
Square
Yo
LM358
Wave
Output
r-o-.-....
Rf
f
oo~l .+ RC
if
4CAfRl
R3 '" ~_~_~~ .
R2tA1
FIGURE 13 - MULTIPLE FEEDBACK BANDPASS FILTER
VCC
Vin
t-
E---.Vo
Co
R2
Given
Co
10 C
1
Vref'
:2 Vee
fa'" Center Frequency
A(f o ):: Gain at Center Frequency
Choose Value fa, C
Then
Q
R3=-1f
fa C
R3
Rl = - - -
2 A(f o )
Rl R3
A2=---~
4Q2 Rl -
R3
For less than 10% error trom operational amplifier
0
If
0 fO<0.1
BW
source
Where fa and BW are e)(pressed in Hz.
impedance varies, filter may be preceded with voltage
follower buffer to stabilize filter parameters.
MOTOROLA LINEAR/INTERFACE DEVICES
2-72
®
LM193 LM193A
LM293 LM293A
LM393 LM393A
LM2903
MOTOROLA
SINGLE SUPPLY,LOW POWER, LOW OFFSET VOLTAGE
DUAL COMPARATORS
DUAL COMPARATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The LM193 series are dual independent precision voltage
comparators capable of single-or split-supply operation. These
devices are designed to permit a common mode range-ta-ground
level with single-supply operation. Input offset-voltage
specifications as low as 2.0 mV make this device an excellent
selection for many applications in consumer automotive, and
industrial electronics.
•
Wide Single-Supply Range -
•
Split-Supply Range -
•
Very Low Current Drain Independent of Supply Voltage-O.4 mA
±1.0 Vdc to ±18 Vdc
•
Low Input Bias Current -
•
Low Input Offset Current -
•
Low Input Offset Voltage -
vee
25 nA
5.0 nA
2.0 mV (max) LM193A/293A/393A
- 5.0 mV (max) LM1931293/3"l3
•
Input Common Mode Range to Ground Level
•
Differential Input Voltage Range Equal to Power Supply Voltage
•
Output Voltage Compatible with DTL, ECl, TTL, MOS and CMOS
Logic Levels
+Input
Gnd
(Top View)
~
FIGURE 1 - CIRCUIT SCHEMATIC
(Diagram shown is for 1 comparator)
Vee
H SUFFIX
METAL PACKAGE
CASE 601-04
2.0 Vdc to 36 Vdc
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
I
-Input
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
OUlput
ORDERING INFORMATION
Device
LMI93AH,H
LM293AH,H
LM293D
Temperature
Range
Package
-55 to + 125°C
Metal Can
-25 to +85°e
LM393AH,H
LM393D
LM2903N
MOTOROLA LINEAR/INTERFACE DEVICES
2-73
SO-8
Metal Can
Oto +70oe
LM393AN,N
LM2903D
Metal ean
50-8
Plastic DIP
-40 to +85°C
SO-8
Plastic DIP
II
II
LM193, LM193A, LM293, LM293A, LM393, LM393A, LM2903
MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
Rating
VCC
+36 or ±18
Vdc
Input Differential Voltage Range
VIDR
36
Vdc
Input Common Mode Voltage Range
VICR
-0.3 to +36
Vdc
lin
50
mA
ISC
Isink
Continuous
20
mA
Po
570
5.7
830
6.64
mW
mW/OC
mW
Input Current (2)
(Vin < - 0.3 Vdc)
Output Short Circuit-to-Ground
Output Sink Current (1)
Power Dissipation @ T A ~ 25°C
Plastic DIP
Derate above 25°C
Metal Can
Derate a bove 25°C
1/ROJA
Po
1/ROJA
Operating Ambient Temperature Range
LM193,193A
LM293,293A
LM393,393A
LM2903
°c
-55 to +125
-25 to +85
o to +70
-40 to +85
Maximum Operating Junction Temperature
LM393, 393A. 2903
LM193,193A,293,293A
°C
TJ(max)
125
150
Tsto
Storage Temperature Range
ELECTRICAL CHARACTERISTICS
Characteristic
-65 to +150
°C
(VCC 0 5 0 Vdc' 'Tlow';; TA';; Thigh unless otherwise stated)
LM293A, LM393A
LM193A
Symbol
Min
Typ
Max
Typ
Min
Max
Input Offset Voltage (3)
TA ~ 25°C
Tlow'" TA '" Thigh
Input Offset Current
TA 0 25°C
Tlow';; TA';; Thioh
Input Bias Current (4)
TA 0 25°C
-
±1.0
-
±3.0
-
25
-
±2.0
4.0
-
±1.0
±25
±100
-
±5.0
-
±2.0
4.0
nA
110
TJow";;; TA ~ Thigh
Response Time (5)
VRL 05.0 Vdc, RL 05.1 kit TA 0 25°C
-
±50
±150
-
100
300
-
25
-
-
250
400
0
0
-
VCC -1.5
VCC -2.0
0
0
-
VCC -1.5
VCC -2.0
Volts
VICR
50
200
-
50
200
-
V/mV
-
300
-
-
300
-
ns
tTLH
-
1.3
-
-
1.3
-
!,s
-
-
-
16
6.0
16
AVOL
-
VID
-
Output Sink Current
Vin-;;' 1.0 Vdc, Vin+ 0 0 Vdc, Va';; 1.5 Vdc
TA 0 25°C
Isink
6.0
Output Saturation Voltage
Vin-;;' 1.0 Vdc, Vin+ 0 0, Isink';; 4.0 mA, TA 0 25°C
Tlow';; TA';; Thigh
Output Leakage Current
Vin- 0 0 V, Vin+;;' 1.0 Vdc, Va 0 5.0 Vdc, TA 0 25°C
Vin- 0 0 V, Vin+;;' 1.0 Vdc, Va 0 30 Vdc,
Tlow';;TA';;Thigh
Supply Current
RL::::: 00 Both Comparators, TA = 25°C
RL 0 00 Both Comparators, VCC 0 30 V
VOL
Input Differential Voltage (7)
All Vin;;' Gnd or V- Supply (if used)
-
nA
lIB
Large Signal Response Time
Vin 0 TIL Logic Swing, Vref 0 1.4 Vdc
VRL 0 5.0 Vdc, RL 05.1 kit TA 0 25°C
Unit
mV
Via
Input Common Mode Voltage Range (5)
TA 0 25°C
Tlow';; TA';; Thioh
Voltage Gain
RL;;' 15 kit VCC o 15 Vdc, TAO 25°C
'LM193/193A LM293/293A LM393/393A LM2903 -
mW/oC
TA
VCC
-
VCC
-
V
rnA
mV
-
150
-
0.1
-
-
1.0
-
0.4
1.0
-
400
700
-
150
400
700
-
-
-
0.1
-
1.0
-
0.4
1.0
1.0
2.5
IOL
-
pA
mA
ICC
1.0
2.5
Tlow 0 -55°C, Thigh 0 +125°C
Tlow 0 -25°C, Thigh 0 +85°C
Tlow: O°C~ Thigh 0 +!O°Co
Tlow - -40 C, Thigh - +85 C
MOTOROLA LINEAR/INTERFACE DEVICES
2-74
-
LM193, LM193A, LM293, LM293A, LM393, LM393A, LM2903
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Input Offset Voltage (3)
TA = 25°e
Tlow'; TA'; Thi~h
Via
Input Offset Current
110
TA = 25°e
Tlow'; TA'; Thioh
Input Bias Current (4)
TA = 25°e
Tlow'; TA'; Thiah
Input Common Mode Voltage
Range (4)
TA = 25°e
Tlow'; TA'; Thiah
Voltage Gain
RL;;;' 15 kll. Vee = 15 Vdc.
TA = 25°e
(Vee = 5.0 Vdc; *Tlow'; TA'; Thigh unless otherwise stated.)
Min
LM193
Typ
Max
LM293. LM393
Min
Typ
Max
±1.0
-
±3.0
-
25
-
-
-
±5.0
9.0
-
±1.0
±25
±100
-
±5.0
100
300
-
25
-
±5.0
9.0
-
±2.0
9.0
±7.0
15
±50
±150
-
±5.0
±50
±50
±200
-
-
250
400
-
25
200
250
500
nA
lIB
-
-
Volts
VieR
200
Vee -1.5
Vee -2.0
0
0
50
-
50
200
-
25
200
-
V/mV
-
300
-
-
300
-
-
300
-
ns
1.3
-
-
1.3
-
-
1.5
-
~s
-
-
-
-
6.0
16
-
0
0
AVOL
Unit
nA
-
Response Time (6)
VRL = 5.0 Vdc. RL = 5.1 kll.
TA = 25°e
tTLH
-
Input Differential Voltage (7)
VID
-
-
Output Sink Current
Vin-;;;' 1.0 Vdc. Vin+ = 0 Vdc.
Va'; 1.5 Vdc TA = 25°e
'sink
6.0
16
-
Output Saturation Voltage
VOL
150
400
-
~
LM2903
Typ
Max
mV
-
Large Signal Response Time
Vin :: TTL Logic Swing,
Vref = 1.4 Vdc
VRL = 5.0 Vdc. RL = 5.1 kll.
TA = 25°e
All Vin
Min
Vee
-
Vee -1.5
Vee -2.0
Vee
0
0
-
Vee -1.5
Vee -2.0
Vee
V
-
rnA
Gnd or V- Supply
(if used)
Output Leakage Current
Vin- = 0 V, Vin+ ~ 1.0 Vdc,
10L
Va = 5.0 Vdc. TA = 25°e
Vin-:: a v, Vin+;;:3 1.0 Vdc,
Va = 30 Vdc.
Tlow'; TA'; Thigh
Supply Current
RL:: :x; Both Comparators,
lee
16
-
150
400
-
700
-
200
-
0.1
mV
-
Vin- ~ 1.0 Vdc, Vin+:: 0,
Isink'; 4.0 rnA. TA = 25°e
Tlow'; TA'; Thigh
6.0
4DO
-
-
700
-
0.1
-
-
-
1000
-
-
1000
-
-
1000
-
0.4
1.0
-
0.4
1.0
-
0.4
1.0
2.5
-
-
2.5
-
-
2.5
-
700
nA
-
0.1
-
-
rnA
TA = 25°e
RL = 00 Both Comparators,
-
-
Vee= 30V
*LM193/193A - Tlow = -55°e. Thigh = +125°e
LM2931293A - Tlow = -25°e. Thigh = +85°e
LM393/393A - Tlow= ooe. Thigh = +70 oe
NOTES:
(1) The max. output current may be as high as 20 rnA, independent of
the magnitude of Vee. output short circuits to Vee can cause excessive heating and eventual destruction.
(2) This magnitude of input current will only occur if the input leads are
driven more negative than ground or the negative supply voltage.
This is due to the input PNP collector base junction becoming forward biased, acting as an input clamp diode. There is also a lateral
PNP parasitic transistor action on the Ie chip. This phenomena can
cause the output voltage of the comparators to go to the Vee voltage
level (or ground if overdrive is large) during the time the input is
driven negative. This will not destroy the device and normal output
states will recover when the inputs become> -0.3 V of ground or
negative supply.
(3) At output switch point, Vo = 1.4 Vdc, RS = 0 n with Vee from 5.0
Vdc to 30 Vdc, and over the full input common-mode range (0 volts
to Vee
~
(4) Due to the PNP transistor inputs, bias current will flow out of the
inputs, this current is essentially constant independent of the output
state, therefore, no loading changes will exist on the input lines.
(5) Input common mode of either input should not be permitted to go
more than 0.3 V negative of ground or minus supply. The upper limit
of common mode range is Vee - 1.5 V but either or both inputs
can be taken to as high as 30 volts without damage.
(6) Response time is specified with a 100 mV step and 5.0 mV of overdrive. With larger magnitudes of overdrive faster response times
are obtainable.
(7) The comparator will exhibit proper output state if one of the inputs
become greater than Vee, the other input must remain within the
common mode range. The low input state must not be less than
-0.3 volts of ground of minus supply.
-1.5 volts)
MOTOROLA LINEAR/INTERFACE DEVICES
2-75
II
LM193, LM193A, LM293, LM293A, LM393, LM393A, LM2903
TYPICAL PERFORMANCE CHARACTERISTICS
II
LM193.A/293.A/393.A
LM2903
FIGURE 2 - INPUT BIAS CURRENT versus
POWER SUPPLY VOLTAGE
FIGURE 5 - INPUT BIAS CURRENT versus
POWER SUPPLY VOLTAGE
SO
SO
70
160
I13
50
TA
40
~
>--
I
60
~
~
50
Tt o'e
«
'"
40
TA
>-=>
~
30
=>
'-'
o'e
0;
+70'e
TA
~T~ -
_
5.0
10
15
20
25
30
35
o
40
o
10
5.0
20
15
FIGURE 3 - OUTPUT SATURATION VOLTAGE
versus OUTPUT SINK CURRENT
FIGURE 6 - OUTPUT SATURATION VOLTAGE
versus OUTPUT SINK CURRENT
10
111
II /I
V tr
Saturation
1.0
TA~+125'e
'"
;"j
0.1
:>
z
o
TA
~
~
~
./
0.01
+25'e
Y
. / v./ V
I
0.01
Out of
~
Saturation
~
1.0
TA - +S5'e
o
>
0.1
is
TA~~5'e
~
V).
i=
~
TA~-55'e
/
I
!
!z
~ 0.6
13
~
0.4
~
u
~ 0.2
I--
-----
1.7'.-9 ~
1 1
~V TA ~ -40'e
0.01
100
10
TA
~
r-
TA
~ ~oe
TA
~
r-
1.3
1.2
TA
~
.§.
>--
+70'e_
I
~
1.0
=>
'"
~
I--.-
O.S
25
'X:
30
35
40
-
--
0.6
0.4
20
==
j.---
~
TA-+125'e
Rl -
---
-.Lf'
<"
+25'e _
I
15
100
~40le
l---'"
_
0.2
10
10
FIGURE 7 - POWER SUPPLY CURRENT versus
POWER SUPPLY VOLTAGE
I
-55°C
-
1.0
0.1
Isink. OUTPUT SINK CURRENT (mA)
....-
5.0
V ~
0.00
1.0
FIGURE 4 - POWER SUPPLY CURRENT versus
POWER SUPPLY VOLTAGE
....--
,../
d f;1"
Isink. OUTPUT SINK CURRENT (mA)
_ O.B
,../V
~)
./" ~ ~TA~o'e
0.01
L
0.1
1.0
40
V~
'"
;"j
~~
V/ ~
/ V
0.001
35
30
Vee. SUPPLY VOLTAGE (Vdc)
ou,'ot / '
o
25
Vee. SUPPLY VOlTAGE (Vdc)
10
~
-
I
I
10
o
I
+25°C
TA - +S5'e
~ 20
+125ie
10
o
I
z
-55'e
;;::
20
!#
~
+25°C
TA
0;
>-- 30
=>
~
;;::
~
TA
40'e
TA
70
:[
o
5.0
10
15
-
MOTOROLA LINEAR/INTERFACE DEVICES
2-76
~
TA
o'e
~ ls5'e-
Rl = 00
20
25
Vee. SUPPLY VOLTAGE (Vdc)
Vee. SUPPLY VOlTAGE (Vdc)
TA
j---- TA ~ +25°e
30
35
40
LM193, LM193A, LM293, LM293A, LM393, LM393A, LM2903
APPLICATIONS INFORMATION
These dual comparators feature high gain, wide bandwidth
It is good design practice to ground all unused pins.
Differential input voltages may be larger than supply voltage
without damaging the comparator's inputs. Voltages more
negative than - 0.3 V should not be used.
characteristics. This gives the device oscillation tendencies if
the outputs are capacitively coupled to the inputs via stray
capacitance. This oscillation manifests itself during output
transitions (VOL to VOH). To alleviate this situation input resistors < 10 kG should be used. The addition of positive feedback « 10 mV) is also recommended.
FIGURE 8 - ZERO CROSSING DETECTOR
(Single Supplyl
FIGURE 9 - ZERO CROSSING DETECTOR
(Split Supplies)
+15 V
VINmin =::0.4 V peak for 1% phase distortion (Ll.B).
+Vcc
10M
15 k
R3
01 prevents input from going negative by more than 0.6
--;-t---t--(~
v.
R1+R2.,.R3
R3 ..:;;
~
for small error in zero crossing
FIGURE 10 - FREE-RUNNING SQUARE·WAVE OSCILLATOR
FIGURE 11 - TIME DELAY GENERATOR
Vee
Vee
1 Mil
--t_
RL
RL
10 k
l_
Vee
O.OOI~F
LM 193
Vee
>-<:>-....-+--.. VO
51 k
' - - - - - - - -.......·+Vref
51 k
51 k
veelrLc
to + A.t
~h=e~e in (~)
"ON" fort
VO
~
Vee
o
--t_
FIGURE 12 -
COMPARATOR WITH HYSTERESIS
Vee
RS
LM193
+
Vrel ...---JINIr-....----vv'v------'
Rt
R2
RS ~ Rl II R2
(Vee - Vrel) Rl
Vtht ~ Vrel + Rl + R2 + RL
V
- V
_ IVrel - Vo Low) Rl
th2 - reI
Rt + R2 + RL
MOTOROLA LINEAR/INTERFACE DEVICES
2-77
V~nbJLf
V~!=+l--n1voe~
tOI ~.f,~
~t-
II
II
®
LM307
MOTOROLA
INTERNALLY COMPENSATED
MONOLITHIC OPERATIONAL AMPLIFIER
A general purpose operational amplifier series well suited for
applications requiring lower input currents than are available with
the popular MC1741. These improved input charaC1eristics permit
greater accuracy in sample and hold circuits and long interval
integrators.
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Internally Compensated
• Low Offset Voltage: 7.5 mV max
• Low Input Offset Current: 50 nA max
• Low Input Bias Current: 250 nA max
~
N SUFFIX
PLASTIC PACKAGE
CASE 626-05
1
TYPICAL APPLICATION
HIGH IMPEDANCE BRIDGE AMPLIFIER
NC
Inputs
NC
1
VCC
Output
NC
VEE
(Top View)
ORDERING INFORMATION
CIRCUIT SCHEMATIC
EQUIVALENT CIRCUIT
VEE
4
Pins I, 5, and 8
no connection.
MOTOROLA LINEAR/INTERFACE DEVICES
2-78
LM307
EI
MAXIMUM RATINGS (TA - + 25°C unless otherwise noted)
Rating
Symbol
LM307
Unit
VCC
VEE
+18
-18
Vdc
Differential Input Signal Voltage
VID
:t30
Volts
Common-Mode Input Swing (Note 1)
VICR
:t15
Volts
Power Supply Voltages
Output Short-Circuit Duration
Indefinite
ts
Power Dissipation (Package Limitation) (Note 2)
Po
Operating Temperature Range
TA
Storage Temperature Range
Tstg
500
o to
+ 70
-65 to + 150
mW
°C
°C
ELECTRICAL CHARACTERISTICS (TA = + 25°C unless otherwise noted see Note 3.)
LM307
Characteristics
Symbol
Min
Typ
Max
-
2.0
7.5
10
-
3.0
50
70
-
70
250
300
Unit
Input Offset Voltage
RS'" 50 k!l, TA = + 25°C
RS '" 50 k!l, TA = Tlow to ThiQh
VIO
Input Offset Current
TA = +25°C
TA = Tlow to Thich
110
Input Bias Current
TA = +25°C
TA = Tlow to Thigh
liB
Input Resistance
ri
0.5
2.0
-
Mil
Supply Current
Vs = :t15V, TA
10
-
1.8
3.0
rnA
25
15
160
-
-
-
6.0
30
-
0.Q1
0.02
0.3
0.6
+14
:t13
-
-
.V·
=
mV
-
nA
-
nA
-
+ 25°C
Large-Signal Voltage Gain
Vs = :t15 V, Vo = :t10 V, RL > 2.0 kil, TA
Vs = :t15V, Vo = :t10V, RL" 2.0 kil, TA
=
=
Average Temperature Coefficient of Input Offset Voltage
Tlow'" TA '" Thigh
TCVIO
Average Temperature Coefficient of Input Offset Current
+ 25°C '" TA '" Thigh
Tlow '" TA '" +25°C
TCIIO
Vo
V
:t12
:t10
= Tlow to Thigh)
...vrc
nArC
-
Output Voltage Swing (TA = Tlow to Thigh)
Vs = :t 15 V, RL = 10 kil
RL = 2.0 kil
Input Voltage Range (TA
Vs = :t15V
V/mV
Av
+25°C
Tlow
VICR
:t12
Common-Mode Rejection Ratio (TA
RS'" 50 k!l
= Tlow to Thigh)
CMRR
70
90
-
dB
Supply-Voltage Rejection Ratio (TA
RS'" 50 k!l
= Tlow to Thigh)
PSRR
70
96
-
dB
Symbols conform to JEDEC Engmeerlng BulletIn No.1 when applicable.
for the LM307. The H package is derated based on a thermal
resistance of + 150"CIW, junction to ambient, or + 45"CIW,
junction to case.
Note 1. For supply voltages Jess than ±15 V. the absolute maximum
input voltage is equal to the supply voltage.
Note 3. Unless otherwise noted. these specifications apply for:
Note 2. For operating at elevated temperatures, the device must be
derated based on a maximum junction temperature of lOOoe
± 5.0 V '" VccNee '" ± 15 V, Tlow
MOTOROLA LINEAR/INTERFACE DEVICES
2-79
= DoC,
Thigh = + 70"(
LM307
TYPICAL CHARACTERISTICS
(VCC = +15 V, VEE = -15 V, TA = + 25"C unless otherwise noted.)
II
FIGURE 2 - MINIMUM OUTPUT VOLTAGE SWING
FIGURE 1 - MINIMUM INPUT VOLTAGE RANGE
20
,--
Applies over specified
20
Applies over specified
Operating Temperature
Range
Operating'Temperature
~
§!
Range
/'
/'"
Positive/
"
V
/'"
V
./
/V
'"
~
12
~~
8.0
V
Minimum
V ~imum
I:...:? ~ Rl = 2.0kll
04.0
~
o
o
5.0
10
15
VCC AND 1- Veel. SUPPLY VOLTAGe IVOlTSI
20
o
""«z
88
~
82
'"~
1 2.0 f---+--f--+----+--+----+---l--..j
;a
~
----
,.,,-/
§!
1.5
~ 1.0
f---+--f--+----+--+----+---l--..j
f---+--f--+----+--+----+---l--..j
~
~ 0.5
f---+--f--+----+--+----+---l--..j
~
V
..j 76
.Y
70
20
Applies over specified
Operating Temperature
Range
94
iii
5.0
10
15
VCC AND 1- Veel. SUPPLY VOLTAGeS IVOlTSI
FIGURE 4 - TYPICAL SUPPLY CURRENTS
FIGURE 3 - MINIMUM VOLTAGE GAIN
100
",/' 17
Rl=10kn
~
V
VNegat;ve
o
16
tI
o
5.0
10
15
VCC AND I-Veel. SUPPLY VOLTAGeS IVOlTSI
5.0
10
15
VCC AND 1- Veel. SUPPLY VOLTAGES IVOlTSl
20
20
FIGURE 6 - LARGE-SIGNAL FREQUENCY RESPONSE
FIGURE 5 - OPEN-LOOP FREQUENCY RESPONSE
+180
+160
g 15 ,.--
+140
§!
+1
~ +120
~ +100
~
I----
"- ..........
+80
~
~ +60
I'-.....
..j +40
+20
~
~
~5.0
~
o
~
,......
-20
1.0
10
100
1.0k
10k
lOOk
f. fREQUeNCY 1Hz!
1.0M
10M
100M
1.0k
\
10k
100 k
f. fReQUeNCY IHzl
MOTOROLA LINEAR/INTERFACE DEVICES
2-80
tOM
10M
LM307
TYPICAL CHARACTERISTICS (continued)
FIGURE 7 - VOLTAGE FOLLOWER PULSE RESPONSE
to
+8.0
~ +6.0
~ +4,0
~
f---
r
\
+2.0
~
g
Input
\
I
'\.
'-
0-6.0
!j
/Output
V
\.
-2.0
...~ -4.0
-
I /
I
-8.0
-to
-<
m
~
~
~
~
M
W
00
00
t, TIME 1",,1
MOTOROLA LINEAR/INTERFACE DEVICES
2-81
II
®
LM833
MOTOROLA
DUAL OPERATIONAL
AMPLIFIER
DUAL, LOW NOISE, AUDIO
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The LM833 is a standard low-cost monolithic dual generalpurpose operational amplifier employing Bipolar technology with
innovative high-performance concepts for audio systems applications. With high frequency PNP transistors, the LM833 offers
low voltage noise (4.5 nV/y'RZ), 15 MHz gain bandwidth product,
7.0 V/p.s slew rate, 0.3 mV input offset voltage with 2.0 p'vrc
temperature coefficient of input offset voltage. The LM833 output
stage exhibits no deadband crossover distortion, large output
voltage swing, excellent phase and gain margins, low open-loop
high frequency output impedance and symmetrical source/sink
ac frequency response.
The LM833 is specified over the vehicular temperature range
and is available in the plastic DIP and SO-8 packages (P and D
suffixes). A quad device is available in the MC34079 family.
••
1
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
8.
• Low Voltage Noise: 4.5 nV/y'RZ
• High Gain Bandwidth Product: 15 MHz
• High Slew Rate: 7.0 V/p.s
1
• Low Input Offset Voltage: 0.3 mV
• Low T.C. of Input Offset Voltage: 2.0
p'vrc
o SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
• Low Distortion: 0.002%
• Excellent Frequency Stability
• Dual Supply Operation
PIN ASSIGNMENTS
Output 1
VCC
Output 2
Inputs 1 {
MAXIMUM RATINGS
Rating
Supply Voltage (VCC to VEE)
Input Differential Voltage Range
Input Voltage Range
Svmbol
Value
Unit
Vs
+36
Volts
NOTE 1
Volts
VIDR
30
VIR
±15
NOTE 1
VEE
Dual, Top View
Volts
Output Short-Circuit Duration (NOTE 2)
ts
Indefinite
Seconds
Operating Ambient Temperature Range
TA
-40 to +85
°c
Operating Junction Temperature
TJ
+150
°c
Device
Temperature Range
Tstg
-60 to + 150
°c
LM833P
-40 to +85°C
Plastic DIP
mW
LM833D
-40 to +85°C
SO·8
Storage Temperature
Maximum Power Dissipation (NOTE 2)
PD
500
NOTE 3
ORDERING INFORMATION
NOTES:
,. Either or both input voltages must not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (See power dissipation performance, characteristicl.
3. Maximum value at TA "'ii; B5°C.
MOTOROLA LINEAR/INTERFACE DEVICES
2-82
Package
LM833
DC ELECTRICAL CHARACTERISTICS (VCC ~ + 15 V, VEE ~ - 15 V, T A ~ 25'C unless otherwise noted).
Input Offset Voltage (RS
~
Characteristics
Symbol
Min
Typ
Max
~
Via
-
0.3
5.0
mV
2.0
-
p'vrc
10 il, Va
0 V)
Unit
Average Temperature Coefficient of Input Offset Voltage
RS ~ 1011, Va ~ 0 V, TA ~ Tlow to Thigh
~VIO/~T
~
110
-
10
200
nA
liB
-
300
1000
nA
+ 14
+12
V
-
dB
Input Offset Current (VCM
~
Input Bias Current (VCM
0 V, Va
0 V, Va
~
~
0 V)
0 V)
Common Mode Input Voltage Range
VICR
-12
~
large Signal Voltage Gain (Rl
Output Voltage Swing: RL
Rl
Rl
Rl
~
~
~
~
Common Mode Rejection (VIN
Power Supply Rejection (VS
Power Supply Current (Va
~
2.0 kll, Va
~
2.0 kll, VIO
2.0 kil, VIO
10kil,VID
10 kll, VIO
~
~
~
~
~
~
±10 V)
-14
AVOl
90
110
VO+
VOVO+
VO-
10
-
13.7
- 14.1
13.9
-14.7
CMR
80
100
-
PSR
80
115
--
dB
-
4.0
8.0
rnA
1.0 V
1.0 V
1.0V
1.0 V
± 12 V)
15 to 5.0 V, - 15 to -·5.0 V)
0 V, Both Amplifiers)
12
10
-
II
V
V
V
V
-10
-12
dB
AC ELECTRICAL CHARACTERISTICS (VCC ~ + 15 V VEE ~ - 15 V TA ~ 25'C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
SR
5.0
7.0
V/p.s
Unit
10
15
-
Unity Gain Frequency (Open loop)
fU
-
9.0
-
MHz
Unity Gain Phase Margin (Open loop)
8m
60
4.5
-
nV/y'Hz
0.5
-
pA/y'Hz
BWP
-
120
-
kHz
THO
-
0.002
-
%
-
-120
-
dB
~
Slew Rate (VIN
Gain Bandwidth Product (f
~
Equivalent Input Noise Current (f
Power Bandwidth (Va
~
~
~
~
~
~
+1.0)
GBW
10011, f
~
1.0 kHz)
en
1.0 kHz)
27 Vp _p , Rl
2.0 kil, f
Channel Separation (f
FIGURE 1 -
~
2.0 kn, AV
100 kHz)
Equivalent Input Noise Voltage (RS
Distortion (Rl
~
- 10 V to + 10 V, Rl
~
in
2.0 kil, THO", 1.0%)
20 Hz to 20 kHz, Va
~
3.0 V rms , AV
~
+1.0)
-
20 Hz to 20 kHz)
FIGURE 2 -
MAXIMUM POWER DISSIPATION
versus TEMPERATURE
800
1000
0
1:>- 800
~
\ ..
:::J
U
r"..
.2
0
50
o
600
~ 400
it
;;;:;
".
.!¥ 200
'\.
50
100
TA, AMBIENT TEMPERATURE I'C)
t---- VCC ~ + 15 V
VEE ~ -15V
~VCM~OV
~
.\
Deg
INPUT BIAS CURRENT versus TEMPERATURE
I
:z
MHz
~
-
o
150
-55
-.
0
•
~
TA, AMBIENT TEMPERATURE I'CI
MOTOROLA LINEAR/INTERFACE DEVICES
2-83
~
100
125
II
LM833
FIGURE 3 -INPUT BIAS CURRENT versus SUPPLY VOLTAGE
..
800
TA
FIGURE 4 10
~125'C
.E 600
1
>-
~
::>
u
~
400
~l:
8.0
z>-
+
13
~
'"i =>
::>
Jli 200
Jl>
;;;;
4.0
10
15
Vcc, !VEE!, SUPPLY VOLTAGE {VOLTS)
FIGURE 5 -
I
/
o
5.0
10
15
Vcc, !VEEI, SUPPLY VOLTAGE IVOLTS)
FIGURE 6 -
T-
'" 105
z
:>
g
-"
V
-
J
RL = 2.0 kll
TA= 25'e 0
--- --0
/
90
-55
-.
0
•
m
~
100
80
5.0
125
120
OPEN-LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
10
15
Vcc, IVEE!, SUPPLY VOLTAGE {VOLTS)
0
."~
.... ~
vcc = +15V
~ -15V
f - - r-~EE
RL = 2.0 kI1
TA = 25'C
0
o
1.0
10
100
20
~
~
-
-~ t--
""
1.0K
10K
I, FREQUENCY 1Hz)
'--- r---
t>
15
::>
r-- t---
<>
<>
if
~
lOOK
b
~
z
~,
,~
Vce = +15V
VEE = -15V
z
~ 5.0
I =1100 kHz 1
~
BO
10M
'" o
-55
-.
0
•
m
TA, AMBIENT TEMPERATURE I'C)
MOTOROLA LINEAR/INTERFACE DEVICES
2-84
~~,
10
;a
~1
Rl
1.0M
r--
or
~E-
r-.....
20
FIGURE 8 - GAIN BANDWIDTH PRODUCT
versus TEMPERATURE
........
" ....
----
----
TA, AMBIENT TEMPERATURE I'C)
FIGURE 7 -
20
DC VOLTAGE GAIN versus SUPPLY VOLTAGE
11 0
Vec ~ + 15 V
VEE ~ -15V
RL ~ 2.0kn -
:3
95
-
o
20
DC VOLTAGE GAIN versus TEMPERATURE
110
Vo
VEE / '
2. 0
5.0
RL = x
TA = 25'C- I - -
~
o
:i
Vee
~ 6.0
r--
SUPPLY CURRENT versus SUPPLY VOLTAGE
~
100
125
LM833
FIGURE 9 -
GAIN BANDWIDTH PRODUCT versus
SUPPLY VOLTAGE
30
TA
>'-'
=>
0
g:
10
f~IJkHZ_
~
;:;!
0
FIGURE 10 -
20
~
.,--
~
;:
0
!
z
8.0
~
-15V
I
_RL~2.0k!1
AV
~
~
---
~ 6.0
~
+1.0
FALLING
10
I
JLVIN~VO_
4. 0
'"
:g
OJ
RL
OJ
o
10
15
VCC, IVEEI, SUPPLY VOLTAGE {VOLTSI
5.0
FIGURE 11 -
2.0
-55
20
f-- RL ~ 2.0 k!1
AV ~ +1.0
8.Of--TA ~ 25°C
FIGURE 12 -
I
I
1 =1100
I
~
~
~
125
OUTPUT VOLTAGE versus FREQUENCY
--
v~~I~ ~1,101
,
30
RISt G
VEE ~ -15V
RL ~ 2.0 kll
THD'" 1.0%
TA ~ 25°C
5
0
JLVIN~VO
0
0
35
FALLING
01-'
-~
TAo AMBIENT TEMPERATURE {OCI
SLEW RATE versus SUPPLY VOLTAGE
0
r-----
RIS[NG
;::;;0-
~
z
;a
V~C ~ +1~V
VEE
25°C
SLEW RATE versus TEMPERATURE
5
0
RL
2. 0
5. 0
I
0
5.0
10
15
VCC, IVEEI, SUPPLY VOLTAGE {VOLTSI
0
10
20
FIGURE 13 - MAXIMUM OUTPUT VOLTAGE
versus SUPPLY VOLTAGE
o
I.
5f--RL ~ 10 k!1
TA ~ 25°C
~
0
~
§?
5.0
~
>-
0
=>
5o -5.0
~-1 0
-1 5
-2O
5.0
-
vol
_I---
l---
1.0K
10K
f, FREQUENCY IHzl
FIGURE 14 -
-
1.0M
OUTPUT SATURATION VOLTAGE
versus TEMPERATURE
----
r--+r
4 r - - Vsat
r-
VCC~+15V
VEE~ - 1 5 V -
~
RLe 10 k!11
t-
10
15
VCC, IVEEI, SUPPLY VOLTAGE {VOLTSI
lOOK
10M
5
~
- -r--
100
3
20
0
-~
~
~
TA, AMBIENT TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
2-85
~
100
125
II
LM833
FIGURE 15 - POWER SUPPLY REJECTION
versus FREQUENCY
II
140
-
0
r-
i"""'~PSR
+PSR
I
100
~
~
~
25'C
ADM
+
r"~
-=-
........
r--..
20Log (!!.Vo/ADM)
!!.Vec
I III
- PSR
o
~
160
Vec~+15V
VEE ~ -15V
TA
I
FIGURE 16 - COMMON MODE REJECTION
versus FREQUENCY
+PSR
~
c;
0.' f-
u
Z
o
N
8
'"
1.0M
10
100
10M
TOTAL HARMONIC DISTORTION
versus FREQUENCY
:s
w
Vo
~
~
3.0 Vrms
1.0K
t, FREQUENCY 1Hz)
10K
~ 2.0
1.0Vrms
III
/--
S:>
;;::
itO
10
lOOK
1.0K
n~1111
10K
lOOK
FIGURE 20 -INPUT REFERRED NOISE VOLTAGE
versus SOURCE RESISTANCE
~100
~
w
veJ~
+lL
VEE ~ -15V
TA ~ 15'C
1. 0
.......
'"
i"j
0
>
tx
.......
5
z
............
O. 5
*
10
~
~
0.4
~ O. 3
;;::
.E O. 1
10
100
t, FREQUENCY (Hz)
INPUT REFERRED NOISE CURRENT
versus FREQUENCY
~
~
VCC ~ +15V
VEE~ -15V
RS ~ 100 l1
~
~ 1.0
z
5.0
>
0.001
5
10M
r--..
w
'"~
I 111H
O.7
1.0M
~ 10
'"
5
z
Vo
=>
10K
lOOK
t, FREQUENCY (Hz)
o
/--
u
~
1.0K
FIGURE 18 -INPUT REFERRED NOISE VOLTAGE versus
FREQUENCY
VCC ~ +15V
VEE ~ -15V
RL ~ 1.0 kfl
TA ~ 15'C
""g~
I
~
u
30.01
FIGURE 19 -
eMR
!!.VO
~ 80
1l"
100
+
10Log (!!.V
!!.S~ x ADM )
::;; 60
-=
10
-
::;; 40
°11·"
o
~
.1
::;;
1.0
z
'!!.v~f
-
o
~
10K
lOOK
t, FREQUENCY 1Hz)
FIGURE 17 -
-
~ 100
20Log (!!.VO/ADM)
!!.VEE
1.0K
~ 120
o
o
~r-..
I III
z
o
!!.VO
!!.VEE
r-....
vic I~ 1+1JV I
VEE ~ -15V
VCM ~ 0 V
!!.VCM~ :tl.5V
TA ~ 15'C
~ 140 -
f-
ii'
;;::
itO
100
1.0K
t, FREQUENCY (Hzl
10K
lOOK
1.0
10
100
1.0K
10K
RS, SOURCE RESISTANCE (l11
MOTOROLA LINEAR/INTERFACE DEVICES
2-86
lOOK
1.0M
LM833
FIGURE 21 -
INVERTING AMPLIFIER
FIGURE 22 -
NON-INVERTING AMPLIFIER SLEW RATE
t, TIME 12.0 JLs/DIV
t, TIME 12.0 !'.SlDIVi
FIGURE 23 -
NON-INVERTING AMPLIFIER OVERSHOOT
s;-
o
:>
E
=
~
'"~
o
>
I-
::J
~
::J
o
6
>
t, TIME 1200 nSiDIVj
MOTOROLA LINEAR/INTERFACE DEVICES
2-87
II
LM2900, LM3900 For Specifications, See MC3301 Data.
LM2901 For Specifications, See LM139 Data.
LM2902 For Specifications, See LMl24 Data.
LM2903 For Specifications, See LMl93
LM2904 For Specifications, See LMl58
MC1414
MC1514
DUAL
DIFFERENTIAL
COMPARATOR
DUAL DIFFERENTIAL VOLTAGE COMPARATOR
· .. designed for use in level detection, low-level sensing, and
memory applications.
(DUAL MC1710)
• Two Separate Outputs
• Strobe Capability
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• High Output Sink Current
2.8 mA Minimum (Each Comparator) for MC1514
1.6 mA Minimum (Each Comparator) for MC1414
• Differential Input Characteristics
Input Offset Voltage = 1.0 mV for MC1514
= 1.5 mV for MC1414
Offset Voltage Drift = 3.0 /LV/oC for MC1514
= 5.0 /LVrC for MC1414
• Short Propagation Delay Time -
40 ns Typical
• Output Compatible with All Saturating Logic Forms
Vo = + 3.2 V to - 0.5 V Typical
MAXIMUM RATINGS (TA
=
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
25°C unless otherwise noted)
Symbol
Value
Unit
Power Supply Voltages
VCC
VEE
+14
-7.0
Vdc
Differential Mode Input Voltage Range
VIDR
±S.O
Vdc
Common Mode Input Voltage Range
VICR
±7.0
Vdc
Peak Load Current
IL
10
mA
Power Dissipation (Package Limitation)
Ceramic Dual InMLine Package
Derate above TA = 25°C
Po
1000
6.0
mW
mWfC
625
5.0
mW
mW(OC
TA
-55 to + 125
to +75
°c
Tstg
-65 to + 150
°c
Rating
Plastic Dual In-Line Package
Derate above TA = 25°C
Operating Temperature
MC1514
MC1414
Storage Temperature Range
o
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
(MC1414 Only)
CIRCUIT SCHEMATIC
Vee
3
3.7k
Strobe
2
RX
2.8k
Strobe
9
2.8k
10
Vee
3.7k
Output 1
~-~"'H12 ~~~~nvertjng
Non-Inverting
Input
RX
=
low ReSistance Value, usually < 100 n. nol specified.
MOTOROLA L1NEAR/)NTERFACE DEVICES
2-88
MC1414, MC1514
ELECTRICAL CHARACTERISTICS (VCC ~ + 12 Vdc, VEE ~ -60 Vdc, TA ~ 25°C unless otherwise noted) (Each Comparator)
MC1514
Characteristic
Input Offset Voltage
(Va ~ 1.4 Vdc, TA
(Va ~ 1.8 Vdc, TA
(Va ~ 10 Vdc, TA
Symbol
Min
MC1414
Typ
Max
Min
Typ
Max
~
~
~
25°C)
Tlow*)
Thiqh*)
Temperature Coefficient of Input Offset Voltage
L'1VIO/L'1T
Input Offset Current
(Va ~ l.4Vdc, TA ~ 25°C)
(Va ~ 1.8 Vdc, TA ~ Tlow)
(Va ~ 1.0 Vdc, TA ~ Thigh)
110
Input Bias Current
1.4 Vdc, TA ~ 25°C)
(Va
(Va ~ 1.8 Vdc, TA ~ Tlow)
(Va ~ 1.0 Vdc, TA ~ Thigh)
liB
~
Open Loop Voltage Gain
(TA ~ 25°C)
(TA ~ Tlow to Thigh)
-
1.0
2.0
3.0
3.0
-
1.5
-
-
5.0
6.5
6.5
-
3.0
-
-
5.0
-
-
1.0
3.0
7.0
3.0
-
1.0
-
-
5.0
7.5
7.5
20
45
20
-
15
18
-
-
-
-
I-'Adc
12
1250
1000
RO
I-'vrc
I-'Adc
25
40
40
-
Avol
Output Resistance
Unit
mVdc
Via
-
1700
200
-
-
-
2.5
3.2
4.0
-1.0
-0.5
0
-
1000
800
VN
-
1500
-
-
200
-
Ohms
-
-
Vdc
2.5
3.2
4.0
Vdc
-
-
-
-
Differential Voltage Range
VIDR
,,5.0
High Level Output Voltage
(VID ~ 5.0 mY, 0 '" 10 '" 5.0 mAl
VOH
Low Level Output Voltage
(VID ~ - 5.0 mY, lOS ~ 2.8 mAl
(VID ~ -5.0 mY, lOS ~ 1.6 mAl
VOL
-
-
-
-1.0
-0.5
Output Sink Current
(VID ~ -5.0 mY, VOL'" 0.4 V,
TA ~ Tlow to Thigh)
lOS
2.8
3.4
-
1.6
2.5
-
mAde
VICR
,,5.0
-
-
,,5.0
-
-
Vdc
CMRR
80
100
-
70
100
-
dB
Input Common Mode Voltage Range
(VEE ~ -7.0 Vdc)
Common-Mode Rejection Ratio
(VEE ~ -7.0 Vdc, RS '" 200 !l)
,,5.0
Vdc
0
Strobe Low Level Current
(VIL ~ 0)
IlL
-
-
2.5
-
-
2.5
mA
Strobe High Level Current
(VIH ~ 5.0 Vdc)
IIH
-
-
1.0
-
-
1.0
I-'A
Strobe Disable Voltage
(VOL'" 0.4 Vdc)
VIL
-
-
0.4
-
-
0.4
Vdc
Strobe Enable Voltage
(VOH ~ 2.4 Vdc)
VIH
3.5
-
6.0
3.5
-
6.0
Vdc
-
20
40
-
-
20
40
-
ns
-
ns
Propagation Delay Time (Figure 1)
Strobe Response Time (Figure 2)
tpLH
tpHL
tso
tsr
Total Power Supply Current, Both Comparators
(Va" 0)
ICC
lEE
-
Total Power Consumption, 80th Comparators
PD
-
15
6.0
-
-
-
15
6.0
-
12.8
11
18
14
-
12.8
11
18
14
mAde
230
300
-
230
300
mW
*Tlow = -55°C for MC1514, DoC for MC1414
Thigh = + 125°C for MC1514, + 75°C for MC1414
FIGURE 1 -
1~eout
fvn
J
~
Vb
~
~
95 mV - Via
PROPAGATION DELAY TIME
FIGURE 2 -
STROBE RESPONSE TIME
.
Strobe
"'10ns
"'10ns
95 mV+!----l+--100 mV
Input 10%
0V
~
51
V.
~
+
---3.0 V
IStrobe
50%
In
,mm' 0"
,;;,
Output
MOTOROLA LINEAR/INTERFACE DEVICES
2-89
')f '0"
1.4 V
OV
oV
VOL
MC1414, MC1514
TYPICAL CHARACTERISTICS
(Each Comparator)
II
FIGURE 3 - VOLTAGE TRANSFER CHARACTERISTICS
4.0I
3.0
t
-55o
+ 25°C
r
3.0
FIGURE 4 -INPUT OFFSET VOLTAGE versus TEMPERATURE
-'-
1'\\
"- +125°c
\\
0
\'
~414
1\
Ii
0
\\
-1.0
-u -u -u -u
+ 125°C
h
"
-55°C f--"
4.0
6.0
u
0
-55
8.0
100
0255075
TA. AMBIENTTEMPERATURE lOCI
-25
Vin. INPUT VOLTAGE ImVI
FIGURE 5 - INPUT OFFSET CURRENT versus TEMPERATURE
FIGURE 6 -
5.0
-;p--r--
V
/
+ 25°C t \ \
125
INPUT BIAS CURRENT versus TEMPERATURE
5
0
"" '"
01\.
'\.
0
5
r..
'" I"'"
0
0
-55
0
'"
~
r--- t--25
b-.,
0
25
50
75
TA. AMBIENTTEMPERATURE lOCI
5. 0
-55
125
FIGURE 7 - GAIN VARIATION WITH POWER SUPPLY
VOLTAGE
3000,----,--,-----,-,---,---r--.--
-25
...........
t-:-...
0
25
50
75
TA. AMBIENT TEMPERATURE lOCI
100
125
FIGURE 8 - VOLTAGE GAIN versus TEMPERATURE
2500
i'~ 20001------11--+--+--;;.-1"'----J;..-""---t______1--
!
:;;:
~
200
0 ___
r-- t-.......
'"w
~ l0001------11-~~~-1-~~-t______1-~
~
!:;
~
11000 1."'~"---"7i'~+-+-+--I--+-___1
r--.
:} 1500
~~0--~--1~1---L--~12~-L--~13~~--~14
-........... ~14
M~
r--
.........
1000
55
VCC. POSITIVE SUPPLY VOLTAGE IVdcl
-25
0
25
50
75
TA. AMBIENT TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
2-90
'"
100
125
MC1414, MC1514
FIGURE 9 in
':;
RESPONSE TIME
FIGURE 10 -
4.0
POWER DISSIPATION versus TEMPERATURE
--
300
0
~
w
3.0
«
'"
':;
0
>
>-~
>-::>
~
2.0 r---
§:
~ 5.0 mV Overdrive
E
~~rive- \\
1.0
10 mV Overdrive-
0
6
>
1-\\\
\..\..
:z250
o
--------
~
2.0 mV Overdrive
~
~
is
~
~ 200 - -
nRlJ 1=
6?
I
s
~
m
~
~
100
-
150
1m
25
75
50
TA, AMBIENTTEMPERATURE (OCI
-25
-55
t, TIME (nsl
FIGURE 11 -
RECOMMENDED SERIES RESISTANCE versus
MRTL LOADS
FIGURE 12 -
4. 0
10 0
RS
~
~MRTL
0
3. 0
~
0
'"
~
E
~~
i
mW MRTL
"
-
" "-
Med. Power
2.0 - 1. 0
0.1
0.2
rll
0.5
125
SINK CURRENT versus TEMPERATURE
--
>--
10
5.0
100
~
1.0
2. 0
'"zVi
3
'" "
5.0
2.0
1. 0
0
-50
10
25
-25
50
75
100
125
RS, SERIES RESISTANCE (kfll
FIGURE 13 -
3.0 -
2. 0
0
1. 0
0
-1. 0
-
1. 0
0
eout 1
i
I
\
\.
\.
To Scope
51
+
51
.J
\
2.0
g
CROSSTALKt
I
---
.-- -J'
-
8out2
51
-
Induced output signal in
amplifier #2 due to output
signal at amplifier #1.
TIME, 50 ns/dlv
tWorst case condition shown - no load.
MOTOROLA LINEAR/INTERFACE DEVICES
2-91
51
EI
II
ORDERING INFORMAnON
Device
Temperature Range
MCI436CD
MCI436D
MCI436Pl
MCI436CPl
MCI436G
MCI436U
MCI436CG
MCI436CU
MC1536G
MCI536U
Package
O°Cto +70"C
O°Cto +70"C
50-8
50-8
O°C to +700c
O°C to +700C
Plastic DIP
Plastic DIP
Metal Can
O°Cto +70"C
O°Cto +70"C
O°Cto +70"C
O"Cto +70"C
- 55"<: to + 125°C
-55°C to +125°C
MC1436
MC1436C
MC1536
Ceramic DIP
Metal Can
Ceramic DIP
Metal Can
Ceramic DIP
HIGH VOLTAGE,INTERNALLY COMPENSATED
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
.. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
SILICON MONOLITHIC;
INTEGRATED CIRCUIT
components.
•
•
•
•
•
•
•
•
•
•
Maximum Supply Voltage - ±40 Vdc (MC1536)
Output Voltage Swing ±30 Vpk(min) (VCC = +36 V, VEE = -36 V) (MC1536)
±22 Vpk(min) (VCC = +28 V, VEE = -28 V)
Input Bias Current _. 20 nA max (MC1536)
Input Offset Current - 3.0 nA max (MC1536)
Fast Slew Rate -- 2.0 V/MS typ
I nternally Compensated
Offset Voltage Null Capability
Input Over·Voltage Protection
AVOL - 500,000 typ
Characteristics Independent of Power Supply Voltages(± 5.0 Vdc to ± 36 Vdc)
G SUFFIX
METAL PACKAGE
CASE 601-04
FIGURE 1 - DIFFERENTIAL AMPLIFIER WITH ±o20 V
COMMON-MODE INPUT VOLTAGE RANGE
A1
lOOk
+2av
••
1
P1 SUFFIX
U SUFFIX
PLASTIC PACKAGE
CASE 626-05
CERAMIC PACKAGE
CASE 693-02
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
Vo'" 10 (VB-VA)
- 2BV
A4
Ok
FIGURE 2 - TYPICAL NONINVERnNG X10
VOLTAGE AMPLIFIER
7
+28
FIGURE 3 - LOW-DRIFT SAMPLE AND HOLD
+28
v
v
Vi "4.4 Vp_p
+
Vo" 44 vpo p
SWITCH
MC1536
SAMPLE
COMMAND
MOTOROLA LINEAR/INTERFACE DEVICES
2-92
e,
"Dfllt due to bias ClIrrellt
IstYPlcl'll1vBmV's
9k
Ik
;r-o---+--
-18 V
MC1436, MC1436C, MC1536
MAXIMUM RATINGS (TA
==
+2SoC unless otherwise noted)
I
Symbol
MC1536
Power Supply Voltage
Vee
+40
VEE
-40
Input Olfferentlal Voltage Range
VIDR
Note 3
Input Common-Mode Voltage Range
VieR
Note 3
IS
5.0
Rating
Output Short Circuit Duration (Vee
VEE
28 Vdc, Va" 0)
Power DISSipation (Package Llm,tatlon)
I
-34
Storage Temperature Range
T stg
-5510+125
Volts
Volts
I
mW
mW/oC
o to +70
=
°e
+2SoC unless otherwise noted)
MC1436
MC1S36
Characteristics
Symbol
I nput Bias Current
°e
-65 to +150
28 Vdc, T A
ELECTRICAL CHARACTERISTICS (Vee - +28 Vdc, VEE"
Vdc
+30
-30
680
4.6
Po
TA
Unit
MC1436C
I
+34
Derate above T A'" +2SoC
Operating Ambient Temperature R<1nge
I
MC1436
Min
MC1436C
TV.
M"
Tv.
Ma.
20
35
15
40
55
25
90
3.0
4.5
5.0
10
14
10
25
5.0
12
TV.
M"
B.O
1.0
Min
Min
liB
T A '- Tlow to Thigh (See Note 1)
',0
Input Offset Current
TA - +2SoC
nAdc
TA"" +2SoC to Thigh
T A ~ Tlow to +2S o C
7.0
I nput Offset Voltage
Unit
nAdc
TA~ ~250C
14
Via
mVdc
TA'" t2S0e
2.0
5.0
5,0
7.0
T A'" Tlow to Thigh
10
14
Differential Input Impedance (Open. loop, f <;S.O Hz)
10<
Parallel Input ReSistance
'P
Parallel Input Capacitance
ep
2,0 r
"c
250
Common-Mode Input Impedance If
~S.O
Hz)
Input Common·Mode Voltage Range
(AV;< 100, Rs" 10k ohms,f"'1.0kHz,BW
~
1.0 Hz)
large Signal de Open loop Voltage Galll
AVOl
{TA'" +250 C
80
Meg ohms
±22
! 25
+18
50
110
70
!20
pF
..
50
110
50
70,000 SOO,OOO
50,000
90
dB
50.000 500,000
50,000
200,000
200,000
200,000
BWp
kH,
IAV = 1, RL = 5.0 k ohms. THD~ 5%, Vo "40 Vp'p)
Frequency (open.loop)
Vpk
V!V
100,000 500,00'
TA = TlowlO Thigh
Power Bandwrdth (Voltage Followed
ero~sover
250
nV!(Hz)%
IV o "'±10V,RL'" 10 k ohms, TA =+25 0 C)
Unity Gam
250
50
CMRR
± 10 V, Rl "- 100 k ohms)
-
'0
Cornman-Mode Relectron Ratio (del
(V o -=
• 25
!24
V,CR
Equivalent Input Noise Voltage
10
--
10
2,0
Meg ohms
2.0
23
23
-
23
f,
1.0
10
10
I'vlHz
Phase Margin (open-loop, unity gain)
Om
50
50
50
degrees
Gam Margm
AM
18
18
18
dB
Slew Rate (Unrty Gain)
SR
20
2.0
2.0
V'MS
Output Impedance If ~ 5.0 Hz}
Short-Circuit Output Current
Output Voltage Range IRl '" 5.0 k ohms)
'0
1.0
10
1.0
k ohms
lOS
±17
-!-17
• 19
mAde
VOR
Vpk
VCC = +28 Vdc, VEE = -28 Vdc
'22
+23
VCC = +36 Vde, VEE = -36 Vdc
±30
±32
t.20
,22
• 20
, 22
Power Supply Sensitivity (del
VEE
0
jJVIV
constant. Rs S 10 k ohms
Vee" constant, As
s
10 k ohms
Power Supply Current (See Note 2)
PSSt
15
100
15
100
35
35
200
200
50
PSSICC
22
2,2
4.0
26
5.0
2.6
5.0
50
2.6
4.0
2.6
50
124
224
146
280
146
280
lEE
DC QUIf:scent Power Consumption
Pe
T low' OOC for Me 1436 ,C
-55°C for MC1536
Thigh' +70 o C for MC1436,C
+ 1250 C for Me 1536
Note 2
Vee VE E
Vee - VEE
Vce - VEE
Note 3: Either or both input voltages must not exceed the magnitude of
mAde
mW
IV o " 01
Note 1:
50
~
~
5.0 Vdc to 36 Vdc for MC1536
5.0 Vdc to 30 Vdc for MC1436
5.0 Vdc to 28 Vdc for MC1436C
Vec or VEE
+3.0 volts.
MOTOROLA LINEAR/INTERFACE DEVICES
2-93
MC1436, MC1436C, MC1536
II
FIGURE 4 - POWER BANDWIDTH
FIGURE 5 - PEAK OUTPUT VOLTAGE SWING. .......
POWER SUPPL Y VOL TAGE
35
l2
0
0
,
0
0
.~
2
3
\.
\.
0
'\
0
""
4
~
-28V
~VD
S.O 8.0 10
20
40
SO SO 100
200
30 -TL25 0
-
2:.
'"z
-
~
15
~
10
g~
5.0
~
i
V
25
Rl=5k~V
20
V
w
:;
--
.......
0
4.0
10k
~
1'-
0
~
o
-
7
S
~
-
c
>
V
V
/
o
o
±20
±10
400
HO
±30
VCCNEE, POWER SUPPLY VOLTAGE IVdcl
f. FREQUENCY 1kHz)
FIGURE 6 - OPEN· LOOP FREQUENCY RESPONSE
FIGURE 7 - OUTPUT SHORT-CIRCUIT CURRENT
•• rsus TEMPERATURE
+140
t
+120
I'" '"
~ +100
z
;;: +SO
'"
w
'"'"
~
>
+SO
+40
;:i
> +20
'"
I
10
100
28
l-
'"
~
1.0 k
20
~
16
~
~
10 k
100 k
"
1.0 M
f. FREQUENCY 1Hz!
24
I-
U
·20
1.0
32
~
12
!;
8,0
~
4.0
f----
~ a
10 M
-75
100 M
~
r--...
............
..........
. _ - -_.-
r-r-..........
._--
50
+25
25
2.8
:::;
i r---
2.4
o
~ 2.0
I'....
I-
~
~
i3
........
1.6
"'"
~ 1.2
;;;
I-
~
O.S
...........
r-..
z
~ 0.4
-75
-50
~
r--
r--- -=::: t::-...
+50
+75
TA. AMBIENT TEMPERATURE IDC)
FIGURE 8 -INPUT BIAS CURRENT ••rsus TEMPERATURE
3.2
~
SOURCE
............
-25
+25
+50
+75
+100
+125
MOTOROLA LINEAR/INTERFACE DEVICES
2·94
-
+100
+125
MC1436, MC1436C, MC1536
FIGURE 10 - NON-INVERTING FEEDBACK MODEL
FIGURE 9 - INVERTING FEEDBACK MODEL
IJ
FIGURE 12 - VOLTAGE CONTROLLED CURRENT
SOURCE or TRANSCONDUCTANCE AMPLIFIER
WITH 0 TO 40 V COMPLIANCE
FIGURE 11 - AUDIO AMPLIFIER
lOOk
Vee CURRENT DRAIN,
10'" 100 mAde@
RI ;51H
D" 02. 03'" lN4001
- - - - COMMON
HEAT SINK
+50V
AI
lOOk
-V, ~..w.~I-;;....j
10k
MC1536
O.5,;F
VI
RTe
510
R3
~__________'~OO~k__~ 10
Va" 48 Vp p
Po" 72W(rms)@lRL"411
0---1
1
Po" 36 W(rms)@Rl""811
10k
t Zo '" ~l~2.£~~~_t__~~)_
R4
lOOk
4.7
lOjjF
~.~~~----~~~
1
v;- "ATe '" 2 mAN
0.,"'
R1(RTC
t
A31
R2 R4
VEE" -30Vdc
FIGURE 13 - REPRESENTATIVE CIRCUIT SCHEMATIC
FIGURE 14 - EQUIVALENT CIRCUIT
Vee
INVERTING
OUTPUT
V,
6
Zoo
Rout
22
NON
INVERTING
L~-.J
___ .Jt OFFSET
AOJUST
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-95
V,
II
ORDERING INFORMATION
Device
MC1437L
MC1437P
MC1537L
Temperature Range
Package
O°C to +70°C
O°C to +700C
-55°C to +125OC
Ceramic DIP
Plastic DIP
Ceramic DIP
MC1437
MC1537
MATCHED DUAL OPERATIONAL AMPLIFIERS
DUAL MC1709
... designed for use as summing amplifiers, integrators, or amplifiers
with operating characteristics as a function of the external feedback
components. Ideal for chopper stabilized applications where ex·
tremely high gain is required with excellent stability.
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Typical Amplifier Features:
•
High·Performance Open Loop Gain Characteristics AVOL = 45,000 iypical
•
Low Temperature Drift -±3I1V/oC
•
Large Output Voltage Swing ± 14 V typical @± 15 V Supply
-
MAXIMUM RATINGS ITA" +25 0 C)
Rating
Symbol
Value
Unit
Power Supply Voltage
+18
Vdc
-18
Vdc
Differential Input Voltage Range
±5.0
Volts
±VCC
Volts
Common-Mode Input Voltage Range
ts
Output Short Circuit Duration
1
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
5.0
(MC1437P Only)
Power Dissipation (Package limitation)
Ceramic Package
Derate above T A = +25 0 C
Plastic Package
750
6.0
625
5.0
MC1437P
Derate above T A = +2SoC
mW
mW/oC
mW
mW/oC
°c
Operating Ambient Temperature Range
-55 to +125
o to +70
MC1537
MC1437
Storage Temperature Range
T stg
-65 to +150
VCC
Output
Lag B
°c
Output B
I nput Lag B
FIGURE 1 - CIRCUIT SCHEMATIC
Input Lag B
VCC
14
Non Inv.
Input
Non Inv.
Input
Output 1
12
-rl--+-""",'3
Output 1
Inverting Input
e>-''-+,--..,
Lag
VEE
Inverting Input 0-''-+'-,
Non-Inverting 2 6
Input 2
4
Output 2
4---j--oLag
1
~-l:::f==-+-{
Output 2
10 k
Vcc 14
MOTOROLA LINEAR/INTERFACE DEVICES
2-96
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
MC1437, MC1537
ELECTRICAL CHARACTERISTICS
Each Amplilier IVCC = +15 Vdc, VEE = -15 Vdc, TA = +25 0 C unless otherwise noted.)
MC1537
Characteristic
Symbol
Open Loop Voltage Gain
MC1437
Min
Typ
Max
Min
Typ
Max
25,000
45,000
70,000
15,000
45,000
-
Zo
-
30.
-
-
30
-
H
zi
150
400
-
50
150
-
kH
+12
+14
-
±12
±14
-
IRL : 5.0 kH, Va: ± 10 V,
Unit
-
AVOL
TA = Tlow
~
.
g
II
II
2
:>
i
-14
I
10
100
I
II
+10
II
1
- 5.0
10 k
1.0 k
1.0 M
100 k
10
100
~
~
1lJi.U
80
CURVE 1
z
.....
40
II RL" -I
III
2r-...- ~
~
""
i'-...
.:.
0
>
FIGURE 7 - TOTAL POWER CONSUMPTION
versus POWER SUPPLY VOL TAGE
........
........
500
~J
~
300
!
5
200
I
-
-
I
t
100
8
50
'"~
30
J2
20
~
~
........
1r
........
o
/"'"
/'
/
1.0k 2.0k 5.0klOk
100 k
1.0M
V
4.0
I, FREQUENCY 1Hz)
6.0
V
g~s~J~~~iOANO~~~~LNT~~ri~~6~ DRIVING LOW IMPEDANCE LOADS _ _
MUST BE ADDEO TO THE ABOVE
CIURVE I
10
100
,/
VooOVOLT
~
20
10
1.0 M
100 k
I, FREQUENCY 1Hz)
FIGURE 6 - OPEN LOOP VOLTAGE GAIN
versus FREQUENCY
II
10 k
1.0 k
100
f, FREGUENCY!IHzl
II
-
CURVE 4
eo
-12
0.7
5.2
RL" ~I
+60
~ +2.0
-4.0
-6.0
rr. -8.0
~ -10
I
FIGURE 5 - VOLTAGE GAIN versus FREQUENCY
~ +4.0
o
C,lpFI
10 k
10k
10 k
1.0k
~ +6.0
~
R]I!lI
I
10
100
1000
FIGURE 4 - LARGE SIGNAL SWING
versus FREQUENCY
~ +10
~ +8.0
RZIn)
I
1
3
4
6
-a
R,II!)
4
RI
+14
OUTPUT
NOISE
TEST CONOITIONS
CURVE VOLTAGE
GAIN
NO.
8.0
10
I
I
I
12
14
16
VCC and VEE, POWER SUPPL Y IVdcl
MOTOROLA LINEAR/INTERFACE DEVICES
2-98
18
MC1437, MC1537
TYPICAL CHARACTERISTICS (continued)
FIGURE 9 - COMMON INPUT SWING
versus POWER SUPPLY VOLTAGE
FIGURE 8 - VOLTAGE GAIN versus
POWER SUPPLY VOL TAGE
~
100
~
z
~
co
z
~
VICR/"
10
0
80
//
>
w
o
o
8
0
0
"z
z
70
~-"
0
._-
3"
,,-"
o-"
..
/'
co 12
~
a~
/'
14
~
90f----
co
>
16
~
w
o
18
0
>
60L-_ _ _
o
~
_ _ _ __L_ _ _ __L_ _ _
15
10
5.0
v CC and VEE. POWER
11
~
20
",
1
0
----
>+0. 6
w
~ +0 4
.......
'"'"~+o. 1
-
1'---
co
'"C:;
o
0
...........
1'--..
>
*
..
~d:'~bi"her
-.........
1
100
~
0
co
~
10 ~ F=
AV ~ 1000 Cl - 10 pF C2 ~ 3.0 pF R3 - 0
~
0;
>"
-1
" 1'---
~
0
>"
+60
+80
+100
+120
TA. AMBIENT TEMPERATURE (OC)
~
100 Cl ~ 100 pF C2 ~ 3.0 ~:, R3 ~ 1.5 k
III
AV
~
J.Il--
AV-l0 Cl~51OpF C2~20pF R3~1.5':"
1.0 Cl ~ 0.005 _F C2 200 pF R3 ~ 1.5 k
• .-1"
0
\
0.1
100
+140
AV
1.0
0
I
+40
t--- r-
Z
f-
1'-.._.+20
R3
w
P;I,,;IY
0- 0.6
-10
C2 ~ 3.0 pF
w
I'---.
~ -0. 4
-40
Cl ~ 10 pF
OPEN LOOP
:;
S
>
-0.
-0.8
-60
20
15
FIGURE 11 - OUTPUT NOISE VOLTAGE
versus SOURCE RESISTANCE
0
f-
10
5.0
VCC and VEE. POWER SUPPLY VOLTAGE (VOLTS)
FIGURE 10 - INPUT OFFSET VOLTAGE
versus TEMPERATURE
S
~ ........ VICR+
~
--
o
SUPPLY VOLTAGE (VOLTS)
V
'I
1.0 k
10 k
RS. SOURCE RESISTANCE (OHMS)
100 k
FIGURE 12 - INDUCED OUTPUT SIGNAL
(CHANNEL SEPARATION) versuS FREQUENCY
10.00 0
0
/
0
......
10
100
1.0 k
10 k
Induced output signal (p.V of induced output signal in
amplifier 112 per volt of output signal at amplifier 111).
100 k
f. FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-99
II
ORDERING INFORMATION
Device
MC1439G
MC1439P1
MC1539G
Temperature Range
Package
O·C to +70"C
O·C to +70OC
-55·C to +125OC
Metal Can
Plastic DIP
Metal Can
UNCOMPENSATED OPERATIONAL AMPLIFIER
MC1439
MC1539
OPERATIONAL AMPLIFIER
· .. designed for use as a summing amplifier, integrator, or amplifier with operating characteristics as a function of the external
feedback components.
• Low Input Offset Voltage -
3.0 mV max
• Low Input Offset Current -
60 nA max
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Large Power-Bandwidth - 20 Vp-p Output Swing at 20 kHz min
• Output Short-Circuit Protection
• Input Over-Voltage Protection
• Class AB Output for Excellent Linearity
• High Slew Rate -
G SUFFIX
METAL PACKAGE
CASE 601-04
34 V/fLS typ
FIGURE 1 - HIGH SLEW·RATE INVERTER
Compensation
100 k
(Top View)
+15V-15V
Vee
VEE
FIGURE 2 - OUTPUT NULLING CIRCUIT
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC1439 Only)
FIGURE 3 - OUTPUT LIMITING CIRCUIT
::..Ft:.Vz - 2.1 V
750
-0.7 V
+
10 k
(Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
2-100
MC1439, MC1539
ELECTRICAL CHARACTERISTICS IVCC = +15 Vdc, Vee = -15 Vdc, TA = +250 C unless otherwise noted.)
MCI539
Characteristic
Symbol
Input Bias Current
MCI439
Min
TVp
Max
Min
TVp
Max
-
0.20
0.50
.-
0.20
1.0
ITA = +250 C)
ITA = TlowQ))
-
0.23
0.70
-
0.23
1.5
-
150
11101
I nput Offset Current
nA
ITA = Tlow)
ITA = +250 CI
-
-
75
20
60
-
20
100
ITA -ThighQ))
-
-
75
.-
-
150
ITA = +25 0 C)
-
1.0
3.0
-
2.0
7.5
IT A = Tlow, Thigh)
..
IVlol
Input Offset Voltage
mV
-
_.
4.0
!'V/oC
I TCVIO I
Average Temperature Coefficient of Input
Offset Voltage (T A = Tlovv to Thigh)
IRS = 50n)
-
3.0
IRS <10 kn)
-
5.0
-
I nput Impedance
Unit
!,A
liB
5.0
-
100
300
-
tll
t12
..
-
zin
150
300
-
VICR
tIl
+12
-
3.0
kH
II = 20 Hz)
Input Common-Mode Voltage Range
Equivalent Input Noise Voltage
(RS ~ 10 k£!, Noise Bandwidth::= 1.0 Hz,
-
30
80
110
50,000
120,000
25,000
100,000
en
Vpk
30
nV/(Hz)!i2
80
110
dB
-
15,000
100,000
-
15,000
100,000
-
-
1= 1.0kHzl
CMRR
Common-Mode Rejection RatiO
-
1f=1.0kHz)
Open-Loop Voltage Gain (VO'" ± 10 V. RL
lOkll,
R5=~1
(TA
= +25 0 C to
=
AVOL
Thlghl
ITA = Tlowl
Power Bandwidth (Av - 1, THO.5 5%,
Va = 20 Vp'pl
=
-
10
-
20
1.0kll,R5= lOki
kHz
PBW
IRL = 2.0 kll)
IRL
-
50
-
50
Step Response
{ Gain = 1000, no overshoot,
}
R 1 = 1.0 kll, R2 = 1.0 Mll, R3 = 1.0 kll,
R4
= 30 k!!, R5 = 10 k!!, Cl
tpd
= 1000 pF
130
tTHL
}
Rl = 1.0 k!!, R2 = 1.0 Mll, R3 = 1.0 k!!,
tTHL
tpd
. R4=0,R5=10k!!,Cl = 10pF
100
}
6.0
VI!'s
-
100
-
14
VI!'s
tTHL
60
ns
-
100
ns
34
VI!'s
60
Rl = 1.0k!!, R2= lOOk!!, R3= 1.0k!!,
tpd
_.
100
R4=10k!!,R5=10k!!,Cl = 2200pF
SR
-
34
ns
80
-
14
SR
{ Gain = 100, no overshoot,
ns
..
80
-
_.
ns
190
-
6.0
SR
{ Gain = 1000, 15% overshoot,
130
190
-
-
-
tTHL
.-
120
-
120
-
Rl = 1.0 k!!, R2 = 10 k!!, R3 = 1.0 kH,
tpd
-
80
-
80
-
R4 = 1.0 kH. R5 = 10 k!!, Cl = 2200 pF
SR
-
6.25
-
{ Gain
=
10, 15% overshoot,
}
-
6.25
ns
ns
ns
VI!'s
tTHL
-
160
-
-
160
Rl = 10k!!, R2 = 10 kn, R3 = 5.0 kn,
tpd
-
80
-
-
80
-
ns
R4 = 390 n, R5 = 10 kn, Cl = 2200 pF
SR
-
4.2
-
-
4.2
-
VI!'s
Output Impedance
If = 20 Hz)
zo
-
4.0
.-
-
4.0
Output Voltage Swing
Vo
-
-
{ Gain = 1, 15% overshoot,
}
IRL = 2.0 kH, I = 1.0 kHz)
kH
Vpk
-
tID
t13
-
-
-
PSRR+
-
50
150
..
50
200
!'VIV
PSRR-
-
50
150
-
50
200
!'VIV
ICC
-
3.0
5.0
-
3.0
6.7
mAdc
lee
-
3.0
5.0
-
3.0
6.7
IRL = 1.0 kn, I = 1.0 kHz)
Positive Supply Rejection Ratio
ns
±10
±13
(VE E constant, R 5'" 00)
Negative Supply Rejection Ratio
(Vee constant, R5 '" 00)
Power Supply Current
IVa = 01
Q) T 10w '"
aOe for MC1439
- 55°C for MC 1539
Thigh = +700 C for MC1439
+125 0 C for MC1539
MOTOROLA LINEAR/INTERFACE DEVICES
2-101
MC1439, MC1539
MAXIMUM RATINGS (TA = +25o C unless otherwise noted)
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+18
+18
Vdc
Differential Input Voltage Range
VIDR
±(VCC + IVEEI)
Vdc
Common-Mode Input Voltage Range
VICR
+VCC,-IVEEI
15
Vdc
Rating
Load Current
IL
Output Short-Circuit Duration
ts
Power Dissipation (Package Limitation)
Po
680
4.6
mW
mW/oC
625
5.0
mW
rnW/oC
-55 to +125
o to +70
°c
Metal Package
Derate above T A = +250 C
Plastic Dual In-Line Packages MC1439
Derate above T A = +250 C
Operating Temperature Range MC1539
TA
MC1439
Storage Temperature Range
rnA
Continuous
°c
Tstg
-65 to +150
-55 to +125
Metal Packages
Plastic Packages
FIGURE 4 - EQUIVALENT CIRCUIT SCHEMATIC
FIGURE 5 - EQUIVALENT CIRCUIT
Vee
INPUT LAG
INVERTING INPUT
40
1k
t---I~+-o OUTPUT
1k
Ro
40
OUTPUT LAG
OUTPUT
LAG
FIGURE 6 - TEST CIRCUIT
R2
r
TYPICAL OUTPUT CHARACTERISTICS
1Vcc'- +15Vdl:.VEE
FIGURE
NO.
7,10,12
CURVE
NO.
-15Vdc.TA
GAIN
R Inl
R tnl
Avol
I
,'".,
,.,
,.,
100.
R4
TEST CONDITIONS (FIGURE 61
VOLTAGE
,..,.
+2S0C
C
lOOk
1.0M
TII
R Inl
.
I.Ok
'"
l
R In!
Rslnl
C,lpF)
2200
2200
2200
1000
'",.,
C,
Rl
,.
'"'
0
o
,.,
'"'
0
1
2200
2200
R3
Rt
2200
1000
10
R5
r
MOTOROLA LINEAR/INTERFACE DEVICES
2-102
C
VEE
MC1439, MC1539
TYPICAL CHARACTERISTICS (continued)
= +15 Vdc, VEE = -15 Vdc, T A = +250 C, unless otherwise
(VCC
FIGURE 8 - OPEN-LOOP VOLTAGE GAIN versus FREQUENCY
FIGURE 7 - LARGE·SIGNAL SWING versus FREQUENCY
~
0
;
90
~
80
~
10
8
w
6
~
'"~
11 0
4
2
1:
"
14
§; 2
~ 10
"
\.
5
'\
\
:;
>
\ \
3
Q.
~
4
o
1.0 k
lOOk
il
1.0M
100
10 k
1.0 k
±112
~
10
6
>
5.0
-
-
A~ ~
...... e-;.-'
0
100
200
300
~~~
~
40
~OlT s~ppL~s
r-f.l.
t---..
0
,
-
80
I-
;::
-lil~~f;fr
500 100 1.0 k
2.0 k 3.0 k
RL, LOAO RESISTANCE (OHMS)
1\"'
2
~
I"
180
200
5.0 k 1.0 k 10 k
100
10
1.0 k
lOOk
10 k
1.0 M
f. FREQUENCY 1Hz)
FIGURE 12 - CLOSED-LOOP GAIN versus FREQUENCY
i R4=30kOH~
I· Cl=1000pF
R4~ Jk ~~~~: ~1 = 2doo ~F
~
~ 40
I I:
Q.
g
0-
>
~
0
u
~
«d
10
11
0
....
....J
f---- f--- -t
0
t
::
TIT
III
6
!
lilill
11
I 11111111
1.0 k
•
VCCNEE' POWER SUPPLY VOLTAGE (VOLTS)
I
I
R4
10 k
ACL = Closed-Loop Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-103
I
I
m :r39~ OIH~~,1 ~~I= 220~ p~
TIT rTf 1
>
I I
111111
I 11111111
I I
!1.11.1I11
I I.
R4 = 1.0 k OHM. Cl = 2200 pF
'"
12
w
:;
"
"'i'-
140
50
~
3
160 f-- -
0
«
'"
5
~ 120
--I
~1~1~20U~~~1
I
w
FIGURE 11 -OUTPUT VOLTAGE SWING
(to clipping) versus SUPPL Y
~
,.,
~\
4
..
~ 100
----
10 M
11111 II III
~
6
60
~
!;:
J.
15
1
1.0M
FIGURE 10 - OPEN·LOOP PHASE-SHIFT versus FREQUENCY
±15 VOLT SUPPLIES
«
100 k
f, FREQUENCY (Hz)
0
20
o
II
3
±18 VOLT SUPPLIES
~
5\
4
o
30
§;
-....:..
10
FIGURE 9 - OUTPUT VOLTAGE
SWING versus LOAD RESISTANCE
'"
:;
\6
~
I":
f. FREQUENCY (Hz)
w
"
"'
0
10k
1111
1111111
II II
RL -2.0 k OHMS
30
II
"TiYI III
-
2.0
........
40
~
6. 0 - RL=1.0kO HM
4. 0
........
0 - ARR OWS INOICATE
UNC OMPENSATEO
50 - POL E LOCATIONS
o
2
6
~ 8. 0
1111111
100
w
\.
o
g
noted.)
11111111
~
R4 = 0.1 I_
Cl = 10 pF
5
"\.
\.
4
"'\\.
I I
100 k
f, FREQUENCY (Hz)
3
\
2
1.0 M
10 M
II
MC1439, MC1539
TYPICAL CHARACTERISTICS (continued)
(Vee = +15 Vdc. VEE
II
= -15 Vdc. TA = +250 C. unle.. otherwise noted.)
FIGURE 14-ACL = 10 RESPONSEversusTEMPERATURE
FIGURE 13 - ACL' = 1 RESPONSE ••nuITEMPERATURE
+20 11....,.,.~~:;;;;;;:::::::::::-"r---TrTlmrllTTTrmn
+15
~ +30r--+~++tH~-l-~~~-~4J~~t--+-+-W~~
~ +10
Z
~ +25~~H-~H+H--i-iH-H+ilI--++-I-W~l--I-H-+++U~
z
...
:;;: +5.0
...'"o
r::rf---ttitfl!t-~l±±~~lO~O;::k
±;l+hijt~~~I-~-~55~·~:!tffi1
~
"
w
~
~
ci""
ein-
~
~ -5.01--+-++++H-H--i-iH-++IilI--++-I+1+Hl--\t-l--W.J..I.I.J1
10
+101--1-1-1--1-1-
10
k~
+501--++++1-
+
-15
10 k
-
;;;
~ 45
o
g
1101
6
8 1121
2200 pF
1:lf+
1.0 k 3 1
-
~
40
"~
-
141
50 -
Z
'",I'~
em
~
'.
+l
20
...'"
65
!
\
i i11
l 5
;::l
1.0 k [ +
~
II
+125O C
35
1.0
10 M
100
10
200
w
'"
o
z 150
>~
~~
=
-
-
nV
-~
-
==
+
R3
~
Rl R2
Rl + RZ
RZ
AV"'Ai
R3
VN
RS- R3
Cl
R4
~
Av 1000
Av - 100
§ tOO
i'-
'">
~
£
10M
10 0
11111'~V=1001111
\
11-
1.0 M
FIGURE 18 - OUTPUT NOISE versus SOURCE RESISTANCE
FIGURE 17 - SPECTRAL NOISE DENSITY
~
1'-_~5dc
f. FREQUENCY IkHzl
f. FREQUENCY IkHzl
250
,,
+25 0 C
50
40
1.0 M
1000 pF
30k
1""'==
55
« 45
IIIII
100
-
~ 60
+25 GC
,\\
~ 30
"" 25
70
0
-55·C
~
75
Z
;;;
131 10k
10
1111<.rl~r'.
80
35
15
1.0
IIII
1.0k
85
ein
+'l;;.'C
FIGURE 16 - ACL = 1000 RESPONSE versus TEMPERATURE
FIGURE 15 - ACL = 100 RESPONSE versus TEMPERATURE
J
~
\
f. FREQUENCY IkHzl
f. FREQUENCY IkHzl
60
2200 PF'il
+25.C
-5.01':.0-:-k-L-L.LiL...l"0-:-k-w~~~1O~0-k-'--'"~...lllU.oLM-LLl.llUl0.uM
-20 ~...l-LL~-':l:--L...LI...w.lJ!-:---1-Ll..il.illJ._.Ll-1llillJ
1.0 k
10M
65
III
~
"
-
50
10
100
0
-
1.0 k
Av- 1O
~ ::::C.
10 k
100 k
f. FREQUENCY IHzl
O. 1
0.1
lv - IIII
l
l
1.0
10
RS. SOURCE RESISTANCE Ik OHMSI
• ACL ; Closed-Loop Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-104
100
MC1439, MC1539
TYPICAL CHARACTERISTICS
(continued)
(VCC = +15 Vdc, VEE = -15 Vdc, TA = +2So C, unless otherwise noted.)
130
200
I
J
Vo = 0
.15VSUPPLlES-
12 0
L =1.0kl1
THO=5% _ _
0
70
0
i=
O~
i!l
0
w
30
~
20
~
....-
50
i-""
Q
~
~
----
sr
60
-25
+25
+50
+100
+75
E OPERATING ArEA (-55 to +125T
12
10
+125
TA, AMBIENT TEMPERATURE (OC)
14
FIGURE 22 - COMMON-MODE INPUT VOLTAGE
versus SUPPL Y VOLTAGE
~ 18
~
~ +8.0
~
+6.0
:;
'"
'"
+2.0
w
'"
o
Vin
1.0 k
-H-+++++I,-+-+++++IlI
3
1
2 ____
1
-2.0
~
-4.0
'i'
t:;
-6.0
0
-8.0
>
-10
-12
10
COrpENSATlO~
r-NE~ATIVE INP~T LIMIT
14
>
0
5
~
'"
w
:;
0
17 )-----UNltV GAIN
+25 0 C
16
>
:;
~
11
---- ---
cI::. 9. 0
~
1.0 k
1.0 M
100 k
10k
B. 0
12
-- -V
)'-.............-
.........-
V'"
8" 10 V
100
18
16
Vee IVEEI, POWER SUPPLY VOLTAGE (VOLTSI
FIGURE 21 - POWER BANDWIDTH
(LARG E·SIGNAL SWING versus FREQUENCY)
+4.0
Vo = 0
RL =-
10
50
-55
~
~
-
~ 100
.sz
'"z
----
FIGURE 20 - POWER DISSIPATION versus
POWER SUPPLY VOLTAGE
FIGURE 19 - POWER DISSIPATION versus TEMPERATURE
----
~
--
V
POSITIVE INPiT LIMIT -
16
15
14
Vcc. IVEE!. SUPPL V VOLTAGE (VO LTS)
13
t, fREQUENCV (Hz)
~
18
17
FIGURE 24 - COMMON-MODE REJECTION RATIO
versus TEMPERATURE
FIGURE 23 - COMMON·MODE REJECTION RATIO
versus FREQUENCY
~ 130
0
1111
0
..........
11111111
UNITV GAIN COMPENSATION
CMRR = IAvCM - Avoli
=
20 log
em
eM
'0
o
~
0
~ 110~----+-----+-----+-----+-----+-----+---~
t\.
0
AvCM
~ 120
~
11111
(~)
o
:;
~
1\
o
~
100
~----+-----+-----+-----+----
.15 V SUPPLIES
0
~
~
0
10
~ 90L-____~____~____~____~____~____~__~
100
1.0 k
10 k
t, fREClUENCV (Hzl
100 k
-55
1.0 M
-25
+25
+50
+75
TA, AMBIENT TEMPERATURE (OC)
MOTOROLA LINEAR/INTERFACE DEVICES
2-105
+100
+125
II
MC1439, MC1539
FIGURE 25 - VOLTAGE-FOLLOWER PULSE RESPONSE
II
+5.0
-5.0
10
5.0
20
15
TIME IM,I
TYPICAL APPLICATIONS
FIGURE 26 - VOLTAGE FOLLOWER
FIGURE 28 -SUMMING AMPLIFIER
FIGURE 27 - 01 FFERENTIAL AMPLIFIER
390
'I--~vv~r---~VV---l
RI
RF
RI
RF
'2
'I
R2
2200 pF
R2
'3
'2
R3
>0-----..4____ '0
'0
R3
'3
eout '" ein± Via
lin> 40 M OHMS
I II
1 +.-
zaCL '" zaOl
105-
II I
I
1 +0
AOIRi
RF] '" 4 k
RF el + RF
eo'" - --.-- e2 + 1 + -RF
RI
R2
R3
""'0.04 OHM
For R3
"Properly Compensated
~
e3
RB" Parallel Combination of Rl, R2, R3, RF.
eo
= -
RJ.Fl2
Rt + R2
[RJRl el + ~R2~
e2 +
~E
e31
R3
"Properly Compensated
FIGURE 29 - +15 VOLT REGULATOR
1-30 V
2N4921 or Equiv
'20V __-----~~----~-----_+-----,(
lr--~-----Vo'
51
51
O.l/J F
.J
r
0.1 pF
180
005)1F
MC1460G
For detailed mformation see Motorola
Application Note AN·480.
10
6.8 k
L-_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ +Sense
L ._ _ _ _---<~-------------------_ -Sense
Return ••
~----------
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _...
MOTOROLA LINEAR/INTERFACE DEVICES
2-106
Vo
Return
MC1439, MC1539
E
TYPICAL APPLICATIONS
(continued)
FIGURE 31 - REGULATOR OUTPUT VOLTAGE
FIGURE 30 - LOAD REGULATION FOR
CIRCUIT OF FIGURE 29
lunde. pulsed load condition)
,,;::,
~
~
-1.0
:>
-1.5
0
50
100
150
00
250
300
)
Horilontal Scale: 200 ttSlDul
Vertical Scale:
1 mV!Div
LOAD CURRENT (MILLIAMPERES)
MOTOROLA LINEAR/INTERFACE DEVICES
2-107
fI
ORDERING INFORMATION
Device
MCl445G
MCl445L
MC1545G
MC1545L
Temperature Range
Package
O°C to +75°C
O°C to +75°C
- 55°C to + 125°C
- 55°C to + 125°C
Metal Can
Ceramic DIP
Metal Can
Ceramic DIP
MC1445
MC1545
GATE CONTROLLED TWO CHANNEL INPUT
WIDEBAND AMPLIFIER
GATE CONTROLLED
TWO CHANNEL INPUT
WIDEBAND AMPLIFIER
... designed for use as a general purpose gated wideband amplifier,
video switch, sense amplifier, multiplexer, modulator, FSK circuit,
limiter, AGC circuit, or pulse amplifier. See Application Notes
AN491 for design details.
• Large Bandwidth; 50 MHz typical
SILICON MONOLITHIC
INTEG RATED CI RCUIT
• Channel·Select Time of 20 ns typical
• Differential Inputs and Differential Output
TYPICAL APPLICATIONS
VIDEO SWITCH OR
DIFFERENTIAL AMPLIFIER WITH AGC
MULTIPLEX OR FSK
GSUFFIX
METAL PACKAGE
CASE 603-04
(Top View)
Signal
Input
Vee
Input
AMPLITUDE MODULATOR
PULSE-WIDTH MODULATOR
lnv. Input A
R F ""h-~>----1
Input
Open
5.0 k-=
-
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
1
BALANCED MODULATOR
ANALOG SWITCH
...,h---o---!
Output
1,1l===::::::ce.==;1141
Non-lnv. Input B
3
Non-! nv. Input A
5
'V
Signal
...,h---o--j
Input
Carrier
Input
51
Ou~ut L:7l======~JL~
(Top View)
5.0 k
Input
Bias Adjust
MOTOROLA LINEAR/INTERFACE DEVICES
2-108
MC1445, MC1545
MAXIMUM RATI NGS ITA = +25 0 C unless otherwise noted I
Rating
Symbol
Value
Unit
VCC
VEE
+12
Vdc
~12
Vdc
VIDR
,5.0
Volts
IL
25
mA
625
5.0
mW
mW/oC
680
4.6
mW
mW/oC
Power Supply Voltage
Input Differential Voltage Range
Load Current
Po
Power DISSipation (Package Limitation)
Ceramic Dual I n-Llne Package
Derate above T A '" +25 0 C
Metal Can
Derate above T A
=
+25 0 C
o to
Operating Ambient Temperature Range MC1445
MC1545
TA
Storage Temperature Range
T stg
+ 75
to + 125
°c
~55
~65
to +150
°c
ElECTR ICAl CHARACTE RISTICS (Vcc ~ +5.0 Vdc, VEE ~ -5.0 Vdc, at TA ~ +25°C, specifications apply to both input channels
unless otherwise noted.)
MC1545
Characteristic
MC1445
Fig. No.
Symbol
Min
Typ
Max
Min
Typ
Max
Stngle-Ended Voltage Gain
1 12
Avs
16
19
21
16
19.5
23
Bandwidth
1,12
BW
40
50
-
I nput Impedance
5,14
zi
4.0
10
-
Output Impedance
11=50kHzI
6,15
Zo
Output Differential Voltage Range
IRL = 1.0 k ohm, 1= 50 kHzI
4,13
VOOR
3.0
Unit
dB
50
-
MHz
10
-
k ohms
II = 50 kHzI
-
1.5
25
2.5
Input Bias Current
16
liB
15
Input Offset Current
16
110
2.0
Input Offset Voltage
17
VIO
QUiescent Output dc Level
17
Vo
Output de Level Change
17
"Vo
9,18
CMRR
-~
-~
1.0
0.1
25
~-
1.5
25
-
5.0
-
, 15
2.5
-
15
-
2.0
-
-
Ohms
-
30
Vp·p
/.lAde
-
jJ.Ade
7.5
mVdc
-
0.1
-
Vdc
-
,15
-
mV
85
-
dB
±2.5
-
Vp
0.4
-
Vdc
(Gate Input Voltage Change +5.0 V to 0 VI
Common-Mode Rejection Ratio
-
85
~
~
II = 50 kHzI
I nput Common-Mode Voltage Range
18
VICR
Gate Characteristics
8
VILIGI
-
OAO
'2.5
-~
0.70
-
0.2
Gate Input Voltage - Low Logic State (Note 1)
Gate Input Voltage - High Logic State (Note 2)
Gate Input Current - Low Logic State
1.5
2.2
1.3
3.0
VIHIGI
-
18
IILlGI
-
2.5
-
-
4.0
mA
18
IIHIGI
-
2.0
-
-
4.0
MA
19
tpLH
tpHL
tTLH
tTHL
-
10
10
15
15
-
-
6.5
6.3
6.5
7.0
10,20
en
-
25
-
11,20
Pc
-
70
110
~-
IVILIGI = 0 VI
Gate Input Current - High Logic State
IVIH(GI = +5.0 VI
Step Response
le,n = 20 mVI
Wideband Input Noise
-
-
6.5
6.3
6.5
7.0
-
25
-
70
-
-
-
ns
-
-
MV(rmsl
15.0 Hz - 10 MHz, RS = 500hmsl
DC Power Consumption
Note 1. VIL(G)
IS
the gate voltage which results in channel A gain of unity or less and channel B gain of 16 dB or greater.
Note 2. VI H(G) is the gate voltage which results in channel B gain of unity or less and channel A gain of 16 dB or greater.
MOTOROLA LINEAR/INTERFACE DEVICES
2-109
150
mW
II
MC1445, MC1545
FIGURE 1 - SINGLE·ENDED
VOLTAGE GAIN versus FREQUENCY
FIGURE 2 - SINGLE·ENDED
VOL TAGE GAIN versus TEMPERATURE
25,-----,----,----~--_r----._--_,--__,
25
~
z
;;:
'"w
'"«
'">
w
'"
,
20
~
z
;;:
w
"
15
'"
10
'"w
5.0
'"z
~
"'"
>
w
~
~
~
15
'"~
oj
in
20
'"
«
'"
\
«
o
0.01
0.1
1.0
100
10
--
10
in
~
«
5.0
1000
-55
f. FREQUENCY (MHz)
25
---
z
w
'"
~w
~
20
f--
V- V-
~
-----
5.0
'"«
~
>
...... r-'
4.0
~
/
~
>-~
6: 3.0
~w
~a:
15
'""
~
~
1.0
./
>'"
t4.0
+5.0
±S.O
t. 7.0
±8.0
t9.0
t.l0
tll
±12
0.1
IIIII
0.5
0.2
VCC, VEE. POWER SUPPLY VOLTAGE (Vdc)
14
~
12
w
u
10
~
7.0
-............ I'-RP
"r-.
6.0
~
"-
~ 4.0
~
;t
~
2.0 -
VI(rms) • 30 mV
I I
1.0
'"
~l>
5.0
5.0
""
8.0
10
200
6.0 :c
~
f--
§
4.0 ~
co
"
-;
3.0 '"
~
~
""
2.0
5.0
10
20
FIGURE 6 - OUTPUT IMPEDANCE versus FREQUENCY
C~
«
1.0
RL, LOAD RESISTANCE (k OHMS)
FIGURE 5 - INPUT Cp AND Rp versus FREQUENCY
(BOTH CHANNELS)
;;;
f·· 50 kHz
----
10
~
/
V
~2:
~'"
c;z
I- « 2.0
in
to
+125
w
«
z
+100
FIGURE 4 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
~
'"=-
175
TA, TEMPERATURE (OC)
FIGURE 3 - VOL TAGE GAIN
versus POWER SUPPL Y VOLTAGES
~
+50
'25
-25
::;
2.0 ~
IIIII II III
180
VO(rms) = 20 mV
~ 160
g
140
:i
'"~
120
100
~
80
'"
60
~
40
1.0 ~
.............. 1-50
100
20
om
0.1
1.0
f, FREQUENCY (MHz)
I, FREQUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-110
10
100
MC1445, MC1545
FIGURE 8 - GATE CHARACTERISTICS
FIGURE 7 - CHANNEL SEPARATION ve,sus FREQUENCY
140
~
z
o
>-
110
1---1---H-H-++fB.....r-+-+++-+---+
~
100
f-t-++++-+-++++-+-+-H'l-d---1-++++-+++t-t-H-l1
~
-10
~
;
80
~
•
z
-10
0
>
~
0
-30
~
60
0
z
~
-40
~
40
'"inz
"
10
'"
50
-60
-70
0.5
10
fin. INPUT FREQUENCY (Hz)
100
90
>-
'~"
80
z
70
0
>-
u
33
..........
1111111I11
Bandwidth
]
..........
;'"
..........
I
40
>'
:5
/
19
0
50
0
0
>
~
~
-
I'---
30
"~
0
~
17
z
>-
~
0>
~
z
10
.f
~.
~
I1I1I1
5.0 HI to 10 MHz
~
I
~
=
31
~
,
60
~
1.5
FIGURE 10- INPUT WIDEBAND NOISE
versus SOURCE RESISTANCE
FIGURE 9 - COMMON MODE
REJECTION RATIO ve,sus FREQUENCY
~
1.0
1.5
VG. GATE VOLTAGE (VOLTS)
15
10
i'i
13
0.01
0.1
10
1.0
100
10k
100
10
10 k
100 k
RS. SOURCE RESISTANCE (OHMS)
f. FREQUENCY (MHz)
FIGURE 12 - SINGLE-ENOED VOLTAGE GAIN ANO
BANDWIDTH TEST CIRCUIT
FIGURE 11 - CIRCUIT SCHEMATIC
A
Input
B
Input
~-+
___+-_-!
Signal
'-
Generator
Vi = 20 mV(rms)
CL = 15 pF and includes jig
and voltmeter capacitance.
Boonton RF Voltmeter
Dr Equivalent
MOTOROLA LINEAR/INTERFACE DEVICES
2-111
MC1445, MC1545
FIGURE 13 - OUTPUT VOLTAGE SWING TEST CIRCUIT
FIGURE 14 - INPUT IMPEDANCE TEST CIRCUIT
II
feo 50kHz
Vi = 50 mV(rms)
To ac
Voltmeter
Voltmeter
FIGURE 15 - OUTPUT IMPEOANCE TEST CIRCUIT
FIGURE 16 - INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT TEST CIRCUIT
-5.0 V
ftL~
~
I
110 is the difference
I
L _____ _
1
Open
current reading
when either 51 or 52
is switched.
+5.0 V
FIGURE 18 - GATE CURRENT (HIGH AND LOW),
COMMON·MOOE REJECTION AND
COMMON·MODE INPUT RANGE TEST CIRCUIT
FIGURE 17 -INPUT OFFSET VOLTAGE AND QUIESCENT
QUTPUT LEVEL TEST CIRCUIT
~5
In
0 V
Adjust Rl until Vl
reads 0 Volts then
read Edc
t-5.0 V
Rl
100 k
10 Turns
-5
av
CMRR = 20
~Vo
1
'" Change in V2 Reading
Switch 51 and readjust Rl for V 1 =O
+5.0 V
MOTOROLA LINEAR/INTERFACE DEVICES
2-112
I09[A"J
Ave
+5.0 V
MC1445, MC1545
FIGURE 19 - PROPAGATION DELAY AND RISE AND
FALL TIMES TEST CIRCUIT
To "A" Channel
of Scope
FIGURE 20 - POWER DISSIPATION AND WIDEBAND
INPUT NOISE TEST CIRCUIT
+5.0 V
-5.0 V
True rms Voltmeter
Tek tronix 567
or equ iv
Pulse
with Bandwidth of
51
Scope -
5_0 Hz to 10 MHz
51
Gen.
51
V
1
=20mV
tTLH = tTHL
<
51
5.0 ns
CL = 15 pF including probe and
jig capacitance
Open
FIGURE 21 - LIMITING CHARACTERISTIC
c-1!J"U70
--u=
tPHL
V I' SINGLE ENDED INPUT VOL TAGE (rnVp p)
MOTOROLA LINEAR/INTERFACE DEVICES
2-113
II
ORDERING INFORMATION
Device
Temperature Range
Package
O"C to +7O"C
-55°C to + 125"C
Metal Can
Metal Can
MC1454G
MC1554G
MC1454G
MC1554G
II
1-WATT
POWER AMPLIFIER
INTEGRATED CIRCUIT
'-WATT POWER AMPLIFIERS
;ti.
... designed to amplify signals to 300-kHz with
I·Watt delivered to a direct coupled or capac·
itively coupled load.
•
•
Low Total Harmonic Distortion - 0.4% (Typ)
1 Watt
@
Low Output Impedance - 0.2 Ohm
'.
\
1,\
~!
SILICON MONOLITHIC
EPITAXIAL PASSIVATED
o~~:~~P€)~t
v~c ~utpu:xt.r".,
Compensation
Bias Re/
1
10 1
• Excellent Gain - Temperature Stability
Vee
External
5
Gain
OPtions
Compen_tion
(top view)
G SUFFIX
METAL PACKAGE
CASE 603C-Ol
VOLTAGE GAIN .ersus FREQUENCY CRL = 16 OHMSI
~
0
Gain Option 11
Av:36VIV
./
I--'
ci.in ' ptionI1
d
18 V/V
~ 2~
~w
./
I--'
ci'i~ ~~tion 13
10V~
z
..
'"!:;
o
20
...... 1--'
1~
>
/1 0
Pout:;; 1.0 W(rms)
RL: 16 OHMS
VCC: 16 V
(~Figr,7)1
5.0
0
10
100
1.0 k
1.0 k
lOOk
10k
~.O k
1.0M
f, FREQUENCY (Hz)
MAXIMUM AVAILABLE OUTPUT POWER
CSINEWAVE)
CIRCUIT SCHEMATIC
Vee
8
"
~
,-,
2
,
~
a}
-{.
OPTIONS
"'~
OUTPUT
5:
II
6
0.5 A PEAK CUI"
<:.
4
EXlfRNM
COMP(NSA110N
12
~
1
ttl
8. 0
"+
&lASHEr
O.75W
0
B 6. 0
"-
4. 0
10
VEE
t
j1.DW
>
&
OINt
O·V~
y
oy
V 1/ '" V
VV
V
V
./
2-114
I
,/
5.0
10
20
Rl.lDAD RESISTANCE (OHMS)
MOTOROLA LINEAR/INTERFACE DEVICES
V
.....
~
~ f2.0
V VI
15:wJ'
50
100
MC1454G, MC1554G
ELECTRICAL CHARACTERISTICS (TC = +25 0 C unless otherwise noted)
Frequency compensation shown in Figures 6 and 7
Characteristic
RL
Gain
Option-
MC1454
(Oto+70OC)
MC1554
(-55 to +125 0 C)
Figure
(Ohms)
Symbol
Min
Typ
Ma.
Min
Typ
Max
Unit
16
16
-
Pout
1.0
-
Po
.-
1.0
0.9
-
-
1.1
0.9
-
Power Dissipation (@Pout = 1.0 W)
1
1
Watt
Watt
Voltage Gain
1
16
16
16
10
18
Av
8.0
10
18
36
-
VIV
36
-
Output Power (foreout<5.0% THO)
1.2
-
10
18
12
-
36
--
-
-
I nput Impedance
1
-
10
zin
7.0
10
10
-
1
-
10
zo
0.2
-
0.4
-
n
Power Bandwidth
2
16
16
16
10
18
BW
-
-
3.0
Output Impedance
270
250
210
-
-
270
250
210
-
kHz
(lor oou,<5.0% THO)
(lor 0;n<0.05% THO, I
'020 kHz)
Pout
= 1.0 Watt
36
2
Total Harmonic Distortion
-
kn
-
%
THO
= 20 Hz
(sinewave)
16
16
10
10
-
0.4
0.5
-
-
-
11
15
-
0.4
0.5
-
11
20
mAde
-
Zero Signal Current Drain
3
00
-
10
-
Output Noise Voltage
3
16
10
-
-
0.3
-
mVcrms
4
16
_.
-
0.3
Output Quiescent Voltage
(Split Supply Operation)
Vn
Vo (de)
±10
±30
-
±10
-
mVdc
Positive Supply Sensitivity
5
00
-
s+
-
-40
-
-
-40
-
mVIV
5
00
-
s-
-
-40
-
-
-40
-
mVIV
Pout = 0.1 Wan (sinewave)
(VEE constant)
Negative Supply Sensitivity
(Vee constant)
-To obtain the voltage gain characteristic deSired, use the following pin connections: Voltage Gain
10
18
36
Characteristic Definitions
(linear Operation)
FIGURE 1
Pin Connection
Pins 2 and 4 open, Pin 5 to ae ground
Pins 2 and 5 open, Pin 4 to ae ground
Pin 2 connected to Pin 5, Pin 4 to ac ground
'
-"--Ch
FIGURE 4
FIGURE 3
+BV
+16V
-!6V
I
,
R,
7
-BV
FIGURE 2
'
.;.~
I
FIGURE 5
""16 V
~
'~I
V,ldd-.!!f"
I
~7
lR:J"
open
._,-~-,v"
12Vpp
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-115
~~
II
II
MC1454G, MC1554G
MAXIMUM RATINGS (TC
= +25 0 C unless otherwise noted)
Rating
Value
Symbol
IVCCI + 1Veel
Total Power Supply Voltage
Unit
18
Vdc
Peak Load Current
lout
0.5
Ampere
Audio Output Power
Pout
1.8
Watts
Po
600
4.8
mW
mW/oC
1.8
14.4
mW/oC
Power Dissipation (package limitation)
TA = +250 C
D.erate above 2SoC
1/8JA
Po
= +250 C
TC
Derate above 2SoC
1/8JC
Operating Temperature Range
MC1454
MC1554
Storage Temperature Range
Watts
TA
o to +70
-55 to +125
°c
T stg
-55 to +150
°c
TYPICAL CONNECTIONS
FIGURE 6 - SPLIT SUPPLY OPERATION VOLTAGE
GAIN (Avi = 10, 'lOW ~25 Hz
FIGURE 7 - SINGLE SUPPLY OPERATION VOLTAGE
GAIN (AVI = 10, 'lOW~ 100 Hz
VCC 39 pF
VCC 39 pF
RECOMMENDED OPERATING CONDITIONS
In order to avoid local VHF instability, the following set of rules must be
adhered to:
1. An R·C ~tablljzing network (0.1 ItF in senes with ,10 ohms) should be
placed directly from pin 9 to ground, as shown in Figures 6 and 7, using
short leads, to eliminate local VHF instability caused by lead inductance
to the load.
2. Excessive lead inductance from the Vee supply to pin 10 can cause high
frequency instability. To prevent this, the Veeby·pass capacitor should
be connected with short leads from the Vee pin to ground. If this capacitor is remotely located a series R·C networK (O.l ItF and 10 ohms) should
be used directly from pin 10 to ground as shown in Figures 6 and 7.
3. Lead lengths from the external components to pins 7. 9, and 10 of the
package should be as short as possible to insure good VHF grounding
for these points.
Due to the large bandwidth of the amplifier. coupling must be avoided be·
tween the output and Input leads. This can be assured by either (a) use of
short leads which are well Isolated. (b) narrow· banding the overall amplifier
by placing a capacitor from pin 1 to ground to form a low-pass filter in com·
bination with the source impedance. or (c) use of a shielded input cable. In
applications which require upper band·edge control the input low· pass filter
is recommended.
TYPICAL CHARACTERISTICS
FIGURE 8 - TOTAL HARMONIC DISTORTION
versus lOAD RESISTANCE
t,
FIGURE 9 - TOTAL HARMONIC DISTORTION
versus FREQUENCY
2. 0
3. 0
f'" 1 kHz
Av" 36 V/V
~Il
~
0
~
51'
o
5
0
5.0
HU.lil~"
IA
--lO%MAX POWER OUTPUT
--90% MAX POWER OUTP'UT
f'l
13~~ 11~ !1 I
~
........
lB. 16"
~
-
10, lOU
.5
:::~ 1"7,::-
10
l--
0
r- ::::: :::::;; t--""
"'~~
-.......;:,; ~
t"::::=::,
I III
j..-
18,101"2
]J~~
I~
7.0
I
I
lB V/V
~. ~.
,..,..",...
10 V/V
5
10 1"
20
30
50
70
100
0
10
100
j Illli!I" 1
RL, LOAO RESISTANCE (OHMS)
1.0 k 2.0 k
f, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-116
Pout'" 1 W(rms)
5.0 k 10k
1001
MC1454G, MC1554G
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - VOLTAGE GAIN versu.TEMPERATURE
FIGURE 11-0UTPUT VOLTAGE CHANGE
~ +4.0
0
.5
5
~ 40
'"«
A.;36JIV
~
w
~
z
~
w
RL; 16 OHMS
VCC; B Vd.
VEE; -8 Vd.
(See figure 6) _
w
z
3
5V-0
+2. 0
«
'"
!:;
'">
'"~ 25
'"> 0
ell 5
IB V/V
~
10 V/V
....
0
~
~ -2.
0
olL::
,..,- r-
[fl
:;
5.0
0
-55
d
-15
15
50
75
-,;-4. 0
115
100
-55
:E
;;'
·15
15
TA. AMBIENT TEMPERATURE (OC)
50
75
100
115
TA. AMBIENT TEMPERATURE (OC)
FIGURE 12 - VOLTAGE GAIN versus FREQUENCY IRL =00)
5
A.; 36 V/V
O/...
z
IB V/V
5/
10 V/V
:0'
'"
w
10 ......
'"
'"
I5
«
!:;
>
.j
0
RL -
W
Vo = 12 Vp-p
5.0
0
10
VCC;16V
(See Figure 7)
1.0k
100
1.0k
5.0 k
10k
lOOk
f. fREQUENCY (Hz)
FIGURE 13 - MAXIMUM DEVICE DISSIPATION
ISINEWAVE)
.0
.B
.0
ABS LUTE
AXIMUM DEVICE OISSIPATI N
15 _
40 u
60 ~
~r-.
"- 'r-l'
76
~
90 w
U
.7
25 ~
40 ~
60 ~
" 1\.1\
.5
"\ I"\,
1"-
.3
'1\
.1
f\
•1
5.0
10
I
I
1\
SUPPLY VOLTAGE.IVCCI + IVEEI", V
~
(.)
110 ~
I4V
10V
,[I"
10
50
I 2V
100 ~
x
~
115 .;:
....
100
RL. LOAO RESISTANCE (OHMS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-117
:::E.
I.OM
II
II
MC1456
MC1456C
MC1556
ORDERING INFORMATION
Device
Temperature Range
Package
MC1456G,CG
MC1456CP1,P1
MC1556G
MC1556U
O'C to + 70'C
O'C to +70'C
- 55'C to + 125'C
- 55'C to + 125'C
Metal Can
Plastic DIP
Metal Can
Ceramic DIP
OPERATIONAL AMPLIFIER
INTERNALLY COMPENSATED. HIGH PERFORMANCE
OPERATONAL AMPLIFIER
SI LICON MONOLITHIC
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier, integrator, or amplifier with operating characteristics as a function of the external
feedback components.
• Low Input Bias Current -
G SUFFIX
METAL PACKAGE
CASE 601-04
15 nA max
• Low Input Offset Current -
2.0 nA max
• Low Input Offset Voltage -
4.0 mV max
N.C.
2.5 VII's typ
• Fast Slew Rate -
• Large Power Bandwidth -
40 kHz typ
• Low Power Consumption -
45 mW max
• Offset Voltage Null Capability
• Output Short-Circuit Protection
• Input Over-Voltage Protection
(Top View)
TYPICAL INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT versus TEMPERATURE for MC1556
----
I-- MCI45'!~-
---~--
MC1456C
I
.......
""" ~~
-
~-
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
INPUT BIAS CURRENT
........
l"-I'---- I----
Olhet Null
-25
+25
+50
+75
N C
2
_
7
Vee
Non-Inv.
3
-
6
Output
5
Offset
Input
VEE
-55
8~8
Input
Inv
INPUT 0tFSET CIURRENT
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
+100
4
Null
+125
(Top View)
TA, AMBIENT TEMPERATURE (DC)
REPRESENTATIVE CIRCUIT SCHEMATIC
VOLTAGE·FOLLOWER PULSE RESPONSE
z
o
Vi
>
o
>-
o
>
2j.1S/0IVISION
MOTOROLA LINEAR/INTERFACE DEVICES
2-118
MC1456, MC1456C, MC1556
MAXIMUM RATINGS ITA" +250 C unless otherwise noted)
MCl456
Rating
Power Supply Voltage
Symbol
MC1556
MC1456C
Unit
Vee
VEE
+22
+18
Vdc
-22
-18
Differential I nput Voltage Range
VIDA
:rVCC
Volts
Common· Mode Voltage Range
VieR
±'Vcc
Volts
Load Current
'l
20
mA
Output Short Circuit Duration
'S
Power Dissipation (Package Limitation)
PD
Derate above T A == +2SoC
Operating Temperature Range
Storage Temperature Range
TA
T5t9
ELECTRICAL CHARACTERISTICS (Vee
II
Continuous
-55to+125
-65 to +150
680
mW
4.6
mW/oC
I o to +70
I
°c
°c
-65 to +150
= +15 Vdc, VEE = -15 Vdc, TA == +2SoC unless otherwise noted).
MC1556
Fig.
Characteristic
Input Bias Current
Symbol
Min
TV.
MCl456C
MC1456
Mo.
Min
TV.
Mo.
Min
TV.
Mo.
8.0
TA = +2SoC
15
15
30
15
90
5.0
30
5.0
12
40
30
T A = Tlow to Thigh (See Note 1)
Input Offset Current
nAde
'10
1.0
TA '" +2S0C
T A = +2SoC to Thigh
T A = Tlow to +25 0 C
I nput Offset Voltage
TA = +250 C
Unit
nAde
',8
2.0
5.0
10
3.0
14
5.0
14
mVdc
Via
2.0
4.0
5.0
6.0
T A = Tlow to Thigh
10
1.
Differential Input Impedance (Open-Loop, f - 20 Hz)
Parallel Input Resistance
Parallel Input Capacitance
Common-Mode Input Impedance (f = 20 Hz)
Common-Mode Input Voltage Range
3.0
3.0
6.0
6.0
6.0
pF
"
250
250
250
Megohms
CMRR
~
2.0 k ohms)
±12
4,5,6
+11
±13
±10.5
±12
Vpk
45
80
110
10
45
45
110
110
d8
V!V
AVOL
100,000 2DO,DOC
-
40,000
T A = Tlow to Thigh
BWp
Power Bandwidth
±12
Megohms
nV!(Hz)}/)
'n
Common-Mode Rejection Ratio (f '" 100 Hz)
± 10 V, RL
5.0
VICR
Equivalent I nput Noise Voltage
(AV'" 100, Rs = 10k ohms, f = 1.0kHz, BW = 1.0 Hz)
Open. Loop Voltage Gain, (Va
TA = +250 C
'p
cp
70,000
lDO,OOC
-
25,000
lDO,OOC
40,000
kH,
40
40
40
1.0
1.0
1.0
MH,
10
10
10
degrees
(AV = 1, RL = 2.0 k ohms, THO$5%, Va '"" 20 Vp-p)
Unity Gain Crossover Frequency (open·loop)
BW
Phase Margin (open-loop, unity gain)
5.1
Gain Margin
5,1
SR
Slew Rate (Unity Gainl
Output Impedance (f = 20 Hz)
Short-Circuit Output Current
Output Voltage Swing (RL - 2.0k ohms)
10
18
18
18
d8
2.5
2.5
2.5
V!IlS
1.0
kohms
'0
1.0
lOS
-11, +9.C
VOR
±12
2.0
-
±13
+11
1.0
2.5
-11, +9.C
-
±12
±10
mAdc
Vpk
±12
IlVtv
Power Supply Rejection Ratio
VCC = constant, RS ~ 10k ohms
VEE = constant, RS ~ 10k ohms
Power Supply Current
11
DC Quiescent Power Dissipation
PSRR+
PSAR-
50
100
15
200
50
100
15
200
75
ICC
1.0
1.5
1.3
3.0
1.3
4.0
lEE
1.0
1.5
1.3
3.0
1.3
4.0
PD
30
45
40
90
40
120
IVa = 01
Note 1:
-17,+9.0
Tlow: rfl for MC1456 and MC1456C
_55°C for MC1556
Thigh: +7oDc for MC1456 and MC1456C
+1250 C for MC1556
MOTOROLA LINEAR/INTERFACE DEVICES
2-119
15
mAdc
mW
MC1456, MC1456C, MC1556
(VCC
II
~
24
w
21
'"'"
''""
w
'"'"~
~
. . . .V
./
6.0
...
ii:
3.0
~
0
:;;
'"i5
...'"
/
.......
~ 9.0
:;;
:;;
~
w
./
15
0
8
FIGURE 2 _ SPECTRAL NOISE DENSITY
18
12
w
0
0
_s
300
0
>
TYPICAL CHARACTERISTICS
VEE = -15 Vdc, TA = +25 0 C unless otherwise noted).
FIGURE 1 - INPUT COMMON-MODE SWING
POWER SUPPLY VOLTAGE
0
2-
= +15 Vdc,
'"
100
50
30
1M
~
~.~
«
V
>
'3
fil
V
.......-
~
V
10 10k
f= -
5.0
f-
3.0
±3.0
:>
±6.0
±9.0
±12
±15
±18
±21
-
VM
f-
+
BW= 10Hz
~ -15V
10
±24
'n='0/316
100
FIGURE 4 - OPEN-LOOP VOLTAGE GAIN
versus TEMPERATURE
FIGURE 3 - COMMON·MODE REJECTION
RATIO versus FREQUENCY
~
~
100
'"'"o
g
500 k
-.......,
o
80
?:
>
'"""
o
~ 60
"
2 40
~.
~ 20
100
1.0 k
300 k
/
>
1"'-
10 k
~
'"
lOOk
200 k
-' 100 k
o
------
«>
o
I.OM
10M
-75
100M
-50
-25
+25
TA.AMBIENT
f. FREQUENCY (Hz)
FIGURE 5 - OPEN-LOOP FREQUENCY RESPONSE
+140
400 k
'"<1
'"w
'"
'"~
0
>
""""
+80
+60
+40
-'
0
> +20
'"
-20
1.0
10
100
+50
+75
+100
+125
+150 +175
TEMPERATURE (OC)
FIGURE 6 - OPEN-LOOP VOL TAGE GAIN
versus SUPPLY VOL TAGES
~ 350k
'"~ 300k
+120
~ +100
/
~
i
'\.
./
.......-
o
'"o
10
MC1456C
<1
'"w
'"~
:;;
1.0
~C14561
;; 400k
'\.
~
w
lOOk
10k
1.0 k
f. FREQUENCY (Hz)
VCC. VEE. POWER SUPPLY VOLTAGE (Vdc)
120
""r--.
Vo
w
~ 250 k
~
o
"" I""
~ 200k
o
10k
lOOk
150k
g;
100 k
iii
I""
1.0k
g
o-'
~
I'-
I.OM
10M
100M
.......... f..-
50k
±5.0
±IO
±15
VCC. VEE. SUPPLY VOLTAGES IVdc)
f. FREnUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-120
..20
±25
MC1456, MC1456C, MC1556
TYPICAL CHARACTERISTICS (continued)
FIGURE 7 - OPEN-lOOP PHASE SHIFT
II
FIGURE 8 - OUTPUT SHORT-CIRCUIT CURRENT
versus TEMPERATURE
1'\
~
\
-45
:g
50
1
45
a'"
35
§ 40
1\
ffi
e
~ -90
w
~
5:
~ 30
1'\
c::; 25
~ 20
~ 15
-lBO
1.0k
10k
lOOk
f, FRHlUENCY (Hz)
1.0M
~
"
10M
SO~RCE
10
'"~ 5.0
100M
-15
FIGURE 9 - POWER BANOWIOTH
1\
Q.
~
w
~
2:- 20
w
~e'"
32
~ 24
'">
'">
~t-
12
t-
8.0
6
>
t=~
I--
+
4.0
I-I-- ~
o
I
1.0
+150
+175
9.1 k~
Al
VEE
~
11
±lB V SUPPLIES
L
I-""
±1~ V'su~pL,k~
~
±121V
JuJp~IJsl
16
o:>
'"6
Vo,ut
2k
-15V
+
'='
« 16
:;
t-
+25
+50 +75 +100 +125
TA, AMBIENT TEMPERATURE (OC)
lOOk
to
to
5
-25
40
"?-
~
-50
FIGURE 10 - OUTPUT VOL TAGE SWING versus
LOAO RESISTANCE
2B
24
SINK
~ t--
~
\
100
r-- t:::---
>'-
\
<>-135
10
MC1456C
t-
""
t;:
1.0
~C1456'
"-
~
II IIII
10
V
> B.O
TA = 250C
THD< 5%
~
I'-...
'Ti
I--"
1.0 k
100
100
200
1.0 k
500
f, FRHlUENCY (kHz)
RL, LOAD RESISTANCE (OHMS)
FIGURE 11 - POWER OISSIPATION versus
POWER SUPPl Y VOLTAGE
100
10
50
~ 40
E: 30
z
'" 20
......
J...-I-""
~
iii
C
VO=O
VV
10
7.0
5.0
4.0
~
3.0
'"~
~
2.0
±2.0
Z
2.0 k
±4.0
±6.0
±B.O
±10
±12
±14
±16
±lB
±20
VCC, VEE, POWER SUPPLY VOLTAGE (Vdc)
MOTOROLA LINEAR/INTERFACE DEVICES
2-121
±22
5.0k
10 k
II
MC1456, MC1456C, MC1556
TYPICAL APPLICATIONS
Where values are not given for external components they must be selected by the
designer to fit the requirements of the system.
FIGURE 13 - NONINVERTING FEEDBACK MODEL
FIGURE 12 - INVERTING FEEDBACK MODEL
Rj
10
j
t
lin
If R3« 21
rFAo{w)_.,.,
I ~~-"-~~ I
G
1 + 22/21
lO
=Zo -A o (w)
lO_O
FIGURE 14 - LOW-DRIFT SAMPLE AND HOLD
+15V
SWITCH
>---0-.....- .... Vo
Vj
'Orift due to bias current
is typically 8 mV/s
SAMPLE
COMMANO
-15V
FIGURE 15 - HIGH IMPEDANCE BRIDGE AMPLIFIER
10k
MC1456,C
MC1556
100 k
10k
VO" -IOVI
MC1456,C
MC1556
100 k
MOTOROLA LINEAR/INTERFACE DEVICES
2-122
MC1456, MC1456C, MC1556
II
TYPICAL APPLICATIONS (continued)
FIGURE 17 - VOLTAGE OFFSET NULL CIRCUIT
FIGURE 16 - LOGARITHMIC AMPLIFIER
MC1456, C
MC1556
MOTOROLA LINEAR/INTERFACE DEVICES
2·123
II
ORDERING INFORMATION
Device
Temperatura Range
MC1458CD,D
MC1458G,CG
MC1558G
MC1458CU,U
MC1558U
MC1458CP1,P1
O"C to +70°C
O"C to +70°C
- 55°C to + 1250(;
QOCto +70°C
-55°C to +1250(;
O°C to +70°C
MC14S8
MC14S8C
MelSS8
Package
50-8
Metal Can
Metal Can
Ceramic DIP
Ceramic DIP
Plastic DIP
(DUAL MC1741)
(DUAL MC1741)
INTERNALLY COMPENSATED,
HIGH PERFORMANCE
MONOLITHIC OPERATIONAL AMPLIFIERS
DUAL
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feedback
components.
•
No Frequency Compensation Required
•
Short-Circuit Protection
•
Wide Common-Mode and Differential Voltage Ranges
•
Low·Power Consumption
•
No Latch Up
G SUFFIX
METAL PACKAGE
CASE 601-04
Vee
8 1
MAXIMUM RATI NGS IT A : +250 C unless otherwise notedl
Rating
Power Supply Voltage
Svmbol
'MC1458
MC1558
Unit
VCC
+18
-18
+22
-22
Vdc
Vdc
Vee
Input Differential Voltage
Input Common Mode Voltage (Note 1)
VID
t30
Volts
VICM
+,15
Volts
Output Short Circuit Duration (Note 2)
ts
Operating Ambient Temperature Range
TA
Storage Temperature Range
Metal and Ceramic Packages
Plastic Package
T stg
Junction Temperature
Continuous
o to +701
175
150
For supply voltages less than :t 15 V. the absolute maximum Input voltage
to the supply voltage.
Supply voltage equal to or less than 15 v.
IS
equal
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
EQUIVALENT CIRCUIT SCHEMATIC
,-~
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC1458, MC1458C)
°c
TJ
Plastic Package
Note 2.
uc
°c
55to+125
-65 to +150
-55tot125
Metal and Ceramic Packages
Note 1.
VEE
(Top View)
________~____~__________~__________~~vcc
••
1
15
OUTPUT
o
SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
50
(Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
2-124
MC1458, MC1458C, MC1558
ELECTRICAL CHARACTERISTICS - Note 1 (Vee
~
+ 15 V
VEE ~ -15 V
~ 25°e
TA
unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
5.0
-
2.0
6.0
-
2.0
10
mV
-
20
200
-
20
300
nA
80
500
80
700
nA
0.3
2.0
2.0
1.4
±15
+15
±12
±13
±11
±13
-
MH
-
-
-
Input Offset Voltage
(RS';; 10 k)
VIO
-
1.0
Input Offset Current
110
200
liB
-
20
Input Bias Current
80
500
Input Resistance
rj
0.3
2.0
Cj
1.4
-
+15
-
±13
-
Offset Voltage Adjustment Range
VIOR
-
Common Mode Input Voltage Range
VICR
±12
I nput Capacitance
Large Signal Voltage Gain
MC1458C
MC1458
MC1558
1.4
V
-
-
20
200
75
-
90
-
-
75
90
-
60
dB
~V/v
ro
CMRR
-
75
70
90
--
PSRR
-
30
150
-
30
150
-
30
-
±12
±14
±12
±10
±14
±13
-
±11
±9.0
±14
-
±13
20
-
20
2.3
5.6
2.3
8.0
70
170
-
-
70
240
0.3
15
0.5
-
-
0.3
15
0.5
-
~s
-
%
(VO" ±10 V. RL" 2.0 k)
(VO"±10V.RL" 10k)
Output Resistance
mV
V/mV
Av
Common Mode Rejection Ratio
pF
50
200
-
-
20
200
-
-
70
-
n
(RS';; 10 k)
Supply Voltage Rejection Ratio
(RS';; 10 k)
V
Output Voltage Swing
(RL;' 10 k)
(RL;' 2 k)
Vo
Output Short-Circuit Current
los
-
20
-
Supply Currents (Both Amplifiers)
10
-
2.3
5.0
Power Consumption
Pc
-
70
150
-
tTLH
os
SR
-
0.3
15
0.5
-
-
± 10
Transient Response (Unity Gain)
(VI" 20mV, RL;' 2kH, CL';; 100 pF) Rise Time
IVI "20mV, RL;' 2 kll, CL';; 100 pF) , Overshoot
Slew Rate
(VI" 10V, RL>2 kH. CL';; 100pF)
ELECTRICAL CHARACTERISTICS Note 1 (Vee ~ + 15 V, VEE
±13
~ -15 V,
TA
~
Symbol
Input Offset Voltage
(Rs';; 10 k!!)
VIO
Input Offset Current
(TA" 125°C)
(T A" -55°C)
(T A " OOC to +700 C)
110
Input Bias Current
liB
Min
Max
1.0
6.0
7.0
85
200
500
Min
Typ
Max
Min
Typ
7.5
Unit
12
mV
400
nA
30
300
0
500
1500
1000
800
Common Mode Rejection Ratio
Max
nA
(TA 125°C)
(TA" -55°C)
(T A " OOC to +70°C)
VICR
CMRR
V/~s
MC1458C
MC1458
Typ
300
Common Mode Input Voltage Range
mA
mW
'Thigh to Tlow unless otherwise noted).
MC1558
Characteristic
mA
+12
+13
V
70
90
dB
(RS';; 10 k)
PSRR
Supply Voltage Rejection Ratio
30
~VIV
150
(Rs';; 10 k)
Output Voltage Swing
(RL;' 10 k)
(RL;' 2 k)
Vo
Large Signal Voltage Gain
Av
V
±12
±10
±12
±14
±13
±10
V/mV
(VO" ±10 V, RL" 10 k)
15
Supply Currents (Both Amplifiers)
'Thigh
Trow
~
~
mA
10
4.5
6.0
(TA" 125°C)
(T " -55°C)
Power Consumption
±9.0 ±13
15
25
(VO" ±10V,RL" 2 k)
±14
±13
(TA" 125°C)
(TA" -55°C)
Pc
135
180
mW
125°C for MC1558 and 70°C for MC1458, MC1458C
-55°C for MC1558 and DoC for MCl458, MC1458C
Note 1. Input pins of an unused amplifier must be grounded for split supply operation or biased at least 3.0 V above VEE for single supply operation.
MOTOROLA LINEAR/INTERFACE DEVICES
2-125
II
MC1458, MC1458C, MC1558
FIGURE 2 - RMS NOISE versus SOURCE RESISTANCE
FIGURE 1 - BURST NOISE versus SOURCE RESISTANCE
>_1000'!11~~11~~11'~~~¥a!'1
f
100. . . . . .
II !'00'11111111
BW'" 1.0 Hz
10
IIII
1.0 kHz
-"
~e-
BW -1.0 Hzla 1.0 kHz
Ff
O>
~
z
w101ll. . . .
10tttittmtttinmtttjtimttijtiffitE3~~'1
100
1.0
10k lOOk 1.0M
o.lL
RS.SOURCE RESISTANCE (OHMS(
RS. SOURCE RESISTANCE (OHMS(
FIGURE 4 - SPECTRAL NOISE DENSITY
FIGURE 3 - OUTPUT NOISE versus SOURCE RESISTANCE
14
101!E1. . . .
"
g 1.0
100.
10
~ 01
1.0
12
0
0
E
~
AV - 1UOU
in
~
60
~
40
~
0
W
~ 1~. ~~ ~Ii~~
klZ
0 \ '\
~
z
1\
100
~w
~
c;
IIIIIII
Av
..........
20
0.0110
100
10k
1.0k
100 k 1.0
o
10
M
100
RS. SOURCE RESISTANCE (OHMS)
10k
1.0 k
100
I. FREUUENCY (Hz)
FIGURE 5 - BURST NOISE TEST CIRCUIT
Positive
Threshold
100 k
To Pass/Fail
100 k
I ndieator
1 k
100 k
Operational Amplifier
Under Test
Low Pass
Filter
1.0Hzto1kHz
Negative
Threshold
Voltage
Unlike conventional peak reading or RMS meters, this system was
The test time employed is 10 seconds and the 20 J.1V peak
especially designed to provide the quick response time essential to
burst (popcorn) noise testing.
limit refers to the operational amplifier input thus eliminating
errors in the closed·loop gain factor of the operational amplifier
under test.
MOTOROLA LINEAR/INTERFACE DEVICES
2-126
k
MC1458, MC1458C, MC1558
TYPICAL CHARACTERISTICS
(Vee = +15 Vdc, VEe = -15 Vdc, TA '" +250 C unless othen/\IISe noted).
FIGURE 6 -POWER BANDWIDTH
(LARGE SIGNAL SWING versus FREQUENCY)
+120
c. 14
>10 0
"-
~
10
1\
~
;
0
>
16
0>
>-
12
0>
0
(VOLTAGE FOLLoWERI
6 8.0 t->
11111~Ho/15'1111
4.0
II
11,1111
100
10
'8 0
~
'6 0
I~
; ., 0
~
0
-.
.f
-10
1.0
100 k
10k
.) 0
1.0k
tOO
10
f, FREQUENCY (Hz)
~
10k
100 k
,
-1 5
I
-1
-1 3
-1 1
-1 0
I
0
'"
>- -9
I
~
~
i3
i9 V
t6(
I?-'"
1. e
100
-3. 0
-1. 0
5.0 k 7.0 k 10 k
FIGURE 10 - OUTPUT VOLTAGE SWING versus
LOAO RESISTANCE (Single Supply Operation!
l.l
lV
±9 V
V
-5. 0
./
0- 4.0
>
I
I
1.0 k
500 700 1.0 k
RL, LOAO RESISTANCE (oHMSI
100
-8. 0
~ -7. 0
r:= -6. 0
~
~
±6V
".
I
-1. 0
tOO
500 700 1.0 k
1.0k
RL. LOAD RESISTANCE (OHMS)
100
1
:::: 1
1
~
0
4r- +27 V
100 IJF
1 k
10 k
+24 V
"
~1 8r- +21 V
~
16
~ 14
o
> 11
~ 10
~ 8.0
0 6.0
1.0
Vee
+18 V
200 k
50 k
+15 V
r- +12 V
200 k
+9.0 V
> 4.0
~~~-c>-M
V
r- +6.0
+5.0 V
00
1.0
1.0
3.0
4.0
5.0
6.0
7.0
RL. LOAD RESISTANCE (kill
8.0
9.0
5.0 k 7.0 k 10 k
FIGURE 11 - SINGLE SUPPLY INVERTING AMPLIFIER
: +30 V Supply
~
M
± 15 V SUPPLIES
~ -1 1
o
± 12 V
II'
//
~ to
1.0 M
FIGURE 9 - NEGATIVE OUTPUT VOL TAGE SWING
versus LOAD RESISTANCE
'15VSUPPLlES-
V
~
f, FREQUENCY (Hz)
FIGURE 8 - POSITIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
5
14
3
1
1
0
0
0
0
0
0
0
0
0
~
>
\
1.0 k
~
~
z
\\
>-
II
FIGURE 7 - OPEN LOOP FREQUENCY RESPONSE
18
10
MOTOROLA LINEAR/INTERFACE DEVICES
2-127
MC1558\
MC1458, MC1458C, MC1558
II
FIGURE 12 - NONINVERTING PULSE RESPONSE
\.
I
.I ,
>
is
;;
o
.n
~UTPUT
"\
,
11
i
i i
pUT
FIGURE 13 - TRANSIENT RESPONSE TEST CIRCUIT
FIGURE 14 - OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
105r-'-'---'---T'
f---t---j1001---+-+~
t
~~-
! 95r--+--+-t--~
7~_--. . --t----+--t-----1
/'
;(
~ 901---+-+-~~~+--4---+-~-+-+~
~ 851----1--7"'-'-1----1---+--+---\--+---+-+---1
V
g
i
801---+-+---1---\--+--4-+-+---1---1
751----I--+---I---I--+---I--r-+---I---1
__
6.0
8.0
70~~_~~
o
2.0
4.0
~_~~_~
10
12
14
__
__
18
20
~~
16
~.
Vee. ,VEE!. SUPPL Y VOL TAGES (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-128
ORDERING INFORMATION
Device
remp••ture Range
Pockage
O"C to +70"C
SO-8
Metal Can
Plastic DIP
Ceramic DIP
Metal Can
Ceramic DIP
MC1458SD
MC1458SG
MC1458SPI
MC1458SU
MC1558SG
MCI558SU
QOCIO +7QoC
QOClo +70"C
QOC to +
-55°C 10 + 125"C
-55°C to + 125"C
nrc
MC1458S
MC1558S
DUAL HIGH SLEW RATE INTERNALLYCOMPENSATED OPERATIONAL AMPLIFIERS
The MC1558S is functionally equivalent, pin compatible, and
possesses the same ease of use as the popular MC1558 circuit, yet
offers 20 times higher slew rate and power bandwidth. This device is
ideally suited for DIA converters due to its fast settling time and
high slew rate.
•
•
•
•
•
•
•
DUAL
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
High Slew Rate - 10 V IllS Guaranteed Minimum (for inverting
unity gain only!
No Frequency Compensation Required
Short·Circuit Protection
Offset Voltage Null Capability
Wide Common-Mode and Differential Voltage Ranges
Low Power Consumption
No Latch·Up
G SUFFIX
METAL PACKAGE
CASE 601-04
8
1
TYPICAL APPLICATION OUTPUT CURRENT TO
VOLTAGE TRANSFORMATION FOR A O-TO-A CONVERTER
Vcc
VCC"5.0V
Inverting
Input A
13
MSB
, Output B
2
6
~~
.~
5
4
Inverting
Input B
Non~lnverting
Input B
VEE
A3 7
A4 8
(Top View!
9
A610
A711
LSB
'
Non-Inverting ,
Input A
A1 5
A2 6
A5
~
Output A
~~
A812
1
c·
Settling time to within 1/2 LSB (±19.5 mV) is approximately 4.0 IJ.s from the time that all bits are switched.
1
P1 SUFFIX
U SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC1458S Only)
CERAMIC PACKAGE
CASE 693-02
+The value of C may be selected to minimize overshoot
and ringing Ie :::::; 68 pF).
DSUFFIX
Theoretical Va
VO"
Vref
R1
PLASTIC PACKAGE
CASE 751-02
SO:8
(MC1458S Only)
IR OI
Adjust Vref. RT or RO so that
Va
with all digital inputs at high level
is equal to 9.961 volts.
V ref
Output A
= 2.0 Vdc
2 V
VO"'1'"""k (5k)
[1
1
1
1
1
1
1
1
Inverting
Input A
Rl " R2 '" 1.0 kn
RO" 5.0kn
1]
"2+4"+i+""16+32"+6'4'"128+256
7
Non-Inverting 3
Input A
255)
V
=10V [ -"9.961
256
2-129
Inverting
Input B
5
Non~lnvertlng
Input B
(Top View!
MOTOROLA LINEAR/INTERFACE DEVICES
Output B
6
II
II
MC1458S, MC1558S
MC1558S LARGE-SIGNAL TRANSIENT RESPONSE
(Inverting Model
STANDARD MCl558 versus MC1558S RESPONSE COMPAR ISDN
(Inverting Model
~
c"
3>
3>
C!
C!
1.0psJDiv.
lOps/Div.
% REPRESENTATIVE CIRCUIT SCHEMATIC
Vee
Inverting
Input
+---+--<> Output
Noninverting
Input
Offset
Null
50 k
Offset Null
MAXIMUM RATINGS (T A = +25 0 e unless otherwise noted I
Rating
Power Supply Voltage
Symbol
MC1558S
Vee
VEE
+22
-22
I
MC1458S
+18
-18
Unit
Vdc
Input Differential Voltage Range
0)
VIDR
±30
Volts
I nput Common-Mode Voltage Range
($I
VieR
±15
Volts
ts
Continuous
Output Short Circuit Duration
Operating Ambient Temperature Range
TA
-55 to +125
Storage Temperature Range
Junction Temperature Ceramic and Metal Package
Plastic Package
T stg
-65 to +150
175
150
Note 1.
Note 2.
TJ
o to +70
-65 to +150
°e
175
150
°e
De
De
For supply voltages less than ±15 Vdc, the absolute maximum input voltage is equal to the supply voltage.
Supply voltage equal to or
than 15 Vdc.
less
MOTOROLA LINEAR/INTERFACE DEVICES
2-130
MC1458S, MC1558S
ELECTRICAL CHARACTERISTICS (Vee ~ +15 Vdc, VEE ~ -15 Vdc, TA = +250 e unless otherwise noted. I
MC14585
Me15585
Characteristic
Min
Symbol
Power Bandwidth (See F .gure 3)
TVp
Max
Min
Tvp
Max
BWp
Unit
kHz
Av'" 1, RL -' 2,0 k!l, THO = 5°'0, Va- 20 Vlpcpl
150
200
150
200
-
10
10
20
12
10
10
20
12
-
V/}.Js
3.0
-
"S
0.25
0.25
0.25
20
-
"s
±45
mA
Large-Signal Transient Response
Slew Rate (Figures lOand 11)
SR
V(-) to VI +\
V(+} to VI-I
Settling Time (Figures 10 and 11)
30
{setlg
-
(to wlth,n 0.1"01
Small,Slgnal TranSient Response
(Gain
1, Em
20 mV, see
Flgur~s
7 and 8)
Rise Time
Propagation Delay Time
tPlH,tPHL
as
Overshoot
Shon-ClrcUlt Output Currents
Open-loop Voltage Gain (R L
Vo ±10 V
Output Impedance (f
20 Hzl
I nput Impedance If
±10
lOS
2.0 knl (See Figure 4)
±10
±45
200.000
75
20,000
100,000
75
-
1.0
0.3
1.0
±12
±10
±14
±12
±10
±14
±13
±13
--
VICR
±12
±13
±12
±13
-
CMRR
70
90
70
90
Va
Input Common·Mode Voltage SWing
20 Hzl
Input E:ilas Current (See Figure 2)
~10
kSl)
Vpk
dB
nA
200
500
30
200
1.0
200
500
-
30
200
50
-
2.0
6.0
70
150
-
70
170
2.0
150
-
2.0
150
10
150
-
10
150
-
nA
iliol
I nput Offset Voltage (RS
H
MH
Vpk
liB
Input Offset Current
0'0
-
0.3
z,
Common-Mode Rejection RatiO {f
"S
"S
_.
zo
20 Hz)
-
AVOL
50,000
Output V.:)ltage Swmg
RL 10 kU
RL 2 0 k!~
n
0.25
025
0.25
20
tTLH
tTHL
Fatl Time
mV
IVIOI
DC Power Consumption (See Figure 9)
{Power Supply
±15 V. Va c O}
Pc
POSitive Voltage Supply Sensitivity
(VEE constant)
PSS+
Negative Voltage Supply Sensitivity
(VCC constant)
PSS-
mW
-
/-lV/V
/-lV/V
-
PlastiC package offered in limited temperature range device only.
ELECTRICAL CHARACTERISTICS (VCC ~ +15Vdc, VEE ~ -15Vdc,TA ~ -55to +125°CforMC1558SandTA ~ Ot070°C
for MC1458S, unless otherwise noted)
MC 15585
Characteristic
Open Loop Voltage Gain
MC 14585
Max
Symbol
Min
AVOL
25.000
15.000
,12
,10
·12
TVp
Min
TVp
Max
Unit
V/V
VO=·,0V
Output Voltage SWing
RL
=
Va
Vpk
10 kl!
RL -= 2 kH
Input Common-Mode Voltage Range
VICR
·12
Commo.l-Mode RejectIOn Ratio If - 20 Hz}
CMRR
70
t nput Bias Current
200
500
800
nA
30
a to 70°C
Input Offset Voltage
~
500
1500
110
T A = 125°C
T A = -55°C
RS
dB
nA
70D C
Input Offset Current
T A'"
Vpk
liB
T A = 125°C
T A c -55°C
T A'" 0 to
'10
200
500
300
Via
6.0
7 .5
Pc
200
mW
PSS+
150
"V/v
PSS-
150
"V/v
mV
10 ki)
DC Power Consumption
Va = 0 V
Positive Power Supply Sensitivity
VEE = -15V
Negative Power Supply Sensitivity
Vce= 15V
MOTOROLA LINEAR/INTERFACE DEVICES
2-131
II
MC1458S, MC1558S
(Vee
II
TYPICAL CHARACTERISTICS
= +15 Vdc, VEE = -15 Vdc, TA;:: +2SoC unless otherwise noted.)
FIGURE 2 -INPUT BIAS CURRENT versus TEMPERATURE
FIGURE 1 - OFFSET ADJUST CIRCUIT
~
~
400
35
'" '~
0
"' 300
~
13
~
--::>-----{)--e
0'
% MC1458S
1nputs
250
"'" r--.....
a;
Output
~ 20 0
~
• Not available with G and
P1 Suffix Packages.
w
150
'"
~
100
'~"
50
i'---
>
0
-50
-75
-25
+25
+50
+75
"""
+100
-125
T, TEMPERATURE (OCI
FIGURE 3 - POWER BANDWIDTH - NONDISTORTED
OUTPUT VOLTAGE v.'sus FREQUENCY
'20
+120
~
+'51--~--+~-+-++H----j--j-++--+-H++-f-~
'10 0
"~
+10f---......
~
..--+__-+-......_--<.............-+_I-+-4__~......j
$
~
FIGtJRE 4 - OPEN· LOOP FREQUENCY RESPONSE
~
+5.01----~-
~
+6 0
'"'"~
">
+4 0
w
w
'"~
"~
+8 0
I
!
~!
~
z
I
I
i
I
,
,
~
"'i;+2 0
-5.0
.£
g -I0f-......---..---T___+_--<____- .............-.L--l-......j
><
~ -151~0-+---:cIO"'0----"--'--"-,,-!:.0-,-k---'--~"IO:-ck-~~"C1O"'0-.,k---'---,J1.·0 M
-20
1.0
I
10
!
,
100
1.0k
3.5
'"~
">w
3.0
2.5
2.0
~
1.5
"....z
1.0
=>
....=>
~
"
Z
10 k
f, FREOUENCY (Hzl
FIGURE 5 - OUTPUT NOISE versus
SOURCE RESISTANCE
.sw
0.5
100 k
RS, SOURCE RESISTANCE (OHMSI
MOTOROLA LINEAR/INTERFACE DEVICES
2-132
~
I
t, FREOUENCY (Hzl
'":;-~
~
I
j
100 k
'"
1.0 M
10 M
MC1458S, MC1558S
TYPICAL CHARACTERISTICS
(Vee:= +15 Vdc, Vee = -15 Vdc. TA = +2SoC unless otherwise noted.l
FIGURE 6 - SMALL-SIGNAL TRANSIENT
RESPONSE DEFINITIONS
FIGURE 7 - SMALL-SIGNAL TRANSIENT RESPONSE
II
20 mV , . . - - - - - - - - - - - - .
Vee
Input
50%
0.1,uF
1:
50%
Gnd
Overshoot
Output
,-,
MC1558S
MC1458S
Input
, '
0_11'F
-15 V
FIGURE 9 -
FIGURE 8 -
1
LARGE-SIGNAL TRANSIENT WAVEFORMS
POWER CONSUMPTION versus POWER
SUPPLY VOLTAGES
100
~
70
Slew Rate
50
40
(Measurement
Period)
Vi+) to Vi-)
,,/
~ 30
ii:
~
10
8
~
~
/
10
/
V
-
VO" 0
./
~
90%
Output
~ 7,0
5.0
4.0
3.0
1.0
/
18
6.0
10
14
Vee and VEE. POWER SUPPLY VOLTAGE iVO lTS)
Settlmg
Time
11
FIGURE 10 - SLEW RATE AND SETTLING TIME TEST CIRCUIT"
Vee = 15 V
+10~
-~~vL
10 k'"
I n put ("I-~"""'---<>-4
~V~
~-1~
Yo
MC1558SV---c>-~-~-+--f<.) Output
10 k
+1%
• Match to within 0.01%.
False
Summing
1N916
or Equivalent
Inputs of Amplifier Not Under
Test Should Be Grounded.
Node
MOTOROLA LINEAR/INTERFACE DEVICES
2-133
II
MC1458S, MC1558S
SETTLING TIME
In order to properly utilize the high slew rate and fast
settling time of an operational amplifier, a number of
system considerations must be observed. Capacitance at
the summing node and at the amplifier output must be
minimal and circuit board layout should be consistent
with common high·frequency considerations. Both power
supply connections should be adequately bypassed as
close as possible to the device pins. In bypassing, both
low and high·frequency components should be con·
sidered to avoid the possibility of excessive ringing. In
order to achieve optimum damping, the selection of a
capacitor in parallel with the feedback resistor may be
necessary. A value too small could resuJt in excessive
ringing while a value too large will degrade slew rate and
settling time.
The solution to these problems is the creation of a
second or "false" summing node. The addition of two
diodes at this node clamps the error voltage to limit the
voltage excursion to the oscilloscope. Because of the
voltage divider effect, only one-half of the actual error
appears at this node. For extremely critical measure·
ments, the capacitance of the diodes and the oscilloscope, .
and the settling time of the oscilloscope must be con·
sidered. The expression
tsetlg =
J x 2 + y2 + z2
can be used to determine the actual amplifier settling
time, where
tsetlg = observed settling time
x = amplifier settling time (to be determined)
y = false summing junction settling time
z = oscilloscope settling time
It should be remembered that to settle within ±0.1 %
requires 7RC time constants.
The ±O.l % factor was chosen for the MC155BS
settling time as it is compatible with the ±1/2 LSB
accuracy of the MC1508L·8 digital·to-analog converter.
This D-to·A converter features ±O.19% maximum error.
SETTLING TIME MEASUREMENT
In order to accurately measure the settling time of an
operational amplifier, it is suggested that the "false"
summing junction approach be taken as shown in
Figure 11. This is necessary since it is difficult to de·
termine when the waveform at the output of the op·
erational amplifier settles to within 0.1 % of it's final
value. Because the output and input voltages are ef·
fectively subtracted from each other at the amplifier
inverting input, this seems like an ideal node for the
measurement. However, the probe capacitance at this
critical node can greatly affect the accuracy of the
actual measurement.
TYPICAL APPLICATION
FIGURE 13 - "12.5-WATT WIDEBAND POWER AMPLIFIER
+15 V
MeL 1304
FIGURE 11 - WAVEFORM AT
FALSE SUMMING NODE
300 pF
or Equivalent
(Current
Limiting
Diode)
>
24k
Q
:;
E
c
:"l
0.33
Input
18 k
FIGURE 12 - EXPANDED WAVEFORM AT
FALSE SUMMING NOOE
0.1""
ERROR
10 k
BAND
Delivers 12.5 watt into 4.0 ohms with less than 1% THO to 100 kHz.
Pins not shown are not connected .
• Bias current adjustment to eliminate Crossover Distortion .
• -Epoxy to power transistor heat sink or case for maximum Thermal Feedback.
MOTOROLA LINEAR/INTERFACE DEVICES
2-134
®
MOTOROLA
MC1490P
RF/IF/AUDIO AMPLIFIER
WIDEBAND AMPLIFIER
WITHAGC
· .. an integrated circuit featuring wide-range AGC for use in RFI
IF amplifiers and audio amplifiers over the temperature range,
- 40 to + 85°C. See Motorola Application Note AN513 for design
details.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• High Power Gain -
50 dB Typ at 10 MHz
45 dB Typ at 60 MHz
35 dB Typ at 100 MHz
• Wide-Range AGC -
60 dB Min, dc to 60 MHz
• 6.0 to 15 V Operation, Single-Polarity Power Supply
PSUFFIX
PLASTIC PACKAGE
CASE 626-05
MAXIMUM RATINGS (TA ~ + 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
VCC
+18
Vdc
Vo
+18
Vdc
V2(AGC)
VCC
Vdc
Differential Input Voltage
V,
5.0
Vdc
Output
Operating Temperature Range
TA
-40 to +85
°c
(-)
T sta
-65 to + 150
°c
TJ
+150
°c
Power Supply Voltage
Output Supply
AGC Supply
Storage Temperature Range
Junction Temperature
REPRESENTATIVE CIRCUIT SCHEMATIC
Output
(+)
VCC
Substrate
Ground
GND
Non-Inv.
Input
Inv.
Input
AGC
Input
. -______~~~~--~--~2 VCC
SCATTERING PARAMETERS (Vee = +12Vdc.
TA = +25"C, Zo = 5001
f = MHz
Typ
4
(_)~--~-----r-'
Symbol
30
60
Unit
15 111
911
0.95
-7.3
0.93
-16
degrees
Reflection
Coefficient
15 221
B22
0.99
-3.0
0.96
-5.5
degrees
Forward
Transmission
Coefficient
15 211
B21
16.8
128
14.7
64.3
degrees
512
912
0.00048
84.9
0.00092
79.2
degrees
Parameter
Input
Reflection
Coefficient
Output
1.1 k 1.1 k
200
L-~----~----~~~S~u7b~m-ra~te~7-03
Pins 3 and 7 should both be connected to circuit ground.
Reverse
Transmission
Coefficient
MOTOROLA LINEAR/INTERFACE DEVICES
2-135
-
MC1490P
ELECTRICAL CHARACTERISTICS (VCC - 12 Vdc f - 60 MHz BW = 10 MHz TA = 25°C)
Characteristic
II
Figure
Power Supply Current Drain
-
AGe Range (AGC) 5.0 V Min to 7.0 V Max
19
Output Stage Current (Sum of Pins 1 and 8)
Single Ended Power Gain RS
Noise Figure RS
= RL = 50 Ohms
= 50 Ohms
Power Dissipation
Symbol
Typ
Min
-
Max
Unit
17
mA
MAGC
-60
-
-
10
4.0
-
7.5
mA
19
Gp
40
-
NF
6.0
-
Po
-
-
dB
19
168
204
ICC
-
dB
dB
mW
TYPICAL CHARACTERISTICS
(V2 (AGC) ~
o. VCC ~
12 Vdc. TA ~ +2SoC unless otherwise noted)
FIGURE 1 - UNNEUTRALIZED POWER GAIN versus
FREQUENCY (Tuned Amplifier, See Figura 19)
FIGURE 2 - VOLTAGE GAIN versus FREQUENCY
(Video Amplifier, See Figure 21)
0
70
IIIII
r--VCIC : 12 Vdc
60
0
;;: ~ 50
.....
"'ffi~...
~ 0 40
00
0
RL: loon
... w
00
"-
~ ~ 30
~~
~~
=>
~
wz
;5
III II VCC : 12 Vdc
RL'" 1.0kH
........
z _
20
"
10
1\
0
"
\.\
\
0
RL: Ion
o
10
20
50
100
0.1
f, FREQUENCY (MHzl
I"'-~
111
200
1.0
10
100
1000
f. FREQUENCY (MHz)
FIGURE 3 - DYNAMIC RANGE: OUTPUT VOLTAGE versus
INPUT VOLTAGE (Video Amplifier, Sea Figure 21)
10
7. 0
FIGURE 4 - VOLTAGE GAIN versus FREQUENCY
(Video Amplifier, See Figure 21)
0
5. o~
c
1.0
;
w
O. 5
o
O. 2
VCC : 6.3 Vdc
0
~ O. 7
>
5
0.0 I
0.1
IOn
0.5
1.0
loon
\...\
0
~
...r-::
L
0.2
I'
0
loon
0.0 7
0.05
OjO 0.0 2
RL-1.0kn
0
RL -1.0 kll
!; O. 1
~
I !IIII
j::
VCC-12Vdc
r - - t- V2(AGC) - 0 Volu
~
f 1.0 MHz
~ 2.ot---t~
2.0
5.0
10
20
50
100
0
0.3 0.5
1.0
3.0 5.0
'i, INPUT VOLTAGE (mVRMSI
10
30
f. FREQUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-136
50
100
"
300
MC1490P
FIGURE 6 - TYPICAL GAIN REDUCTION
versus AGC VOLTAGE
FIGURE 5 - VOLTAGE GAIN AND SUPPLY CURRENT versus
SUPPLY VOLTAGE (Video Amplifier, See Figure 211
45 _...
~
40
~
35
'"'"
30
>
25
,
'" !.OMHI
Rl '" 1.0kH
z
f---
c
w
c
z
w
w
~
'"z
'":>
'"
v;:-
/
w
~
--
15
10 I---- - - - - -
o
V
0
0
18
0
- - - I - - 9.0
6.0
--
6.0
~
'"
E
15
12
~C i---f--'-
V
r--- -
4_0
2.0
./
V
I
20
5_0
-
24
21
t--
i
::;
~
z
12
10
14
.........,~
t;
=>
0
~
z
50
~
60
~
80
o
I
5
RAGC
'"" \
~
RAGC
\
RAGC~O"
RAGC
~
~
100 k 6.0
---
~_~_~
U
9.0
I---+--++---+---+-' - - ---- ----.--f-----o
U
-,-
8.0
20r--+--i+--+--r--+--~--4-~
10
~
10
r--~-f+--~-~-~---+--_+-~
I
U
FIGURE 10 -
,---,---.--~-,--,--,--,---,
r--+---t-'--+--+-----j--+----+-----j
30
~'\\..
12 Vdc
VRIAGC), AGC VOLTAGE (VOLTS)
POWER GAIN versus SUPPLY VOLTAGE
(See Test Circuit, Figure 191
~ 40 r--~--+
~
f-- hAG~ :~06~~z
U
160
/+25 0 C
~~
f--- I- VCC
-20
~50r--r--r--t--1I~t:=t==~~
I
__
~
0
-10
~
,ff
+10
ci-
"I"'""""
""DoC
~ ~
+125 0 C""
~~
'\.'\.~
I
~
"- '-.....
L...- -55°C
+75 0 C....
~
~
::--:: ::::s:::
,,,\:: ~y
~+30
70 r--~--+--~-~-~--+--_+-~
,~~o MHz
60
:s
-.;
~ +20
"-
z
80
+40
I
I
1
1
100 < RAGC < 100 k -
0
16
15
20
25
30
MOTOROLA LINEAR/INTERFACE DEVICES
2-137
35 40
50 60 70 80 90 100
f, FREQUENCY (MHz)
150
II
MC1490P
FIGURE 11 - NOISE FIGURE versus SOURCE RESISTANCE
FIGURE 12 - NOISE FIGURE versus AGC GAIN REDUCTION
40
20
f = 30 MHz
18
Vcc
= 12 Vdc
/'
16
~
w
f
12
u:
10
~
8.0
~
...-
= 105 MHz
...-
...J.+t'
f
w
.,
1/
60 MHz
........-:
6.0
iii
V
~
w
'1.0
MHz
........f
l
25
~ 20
u:
,.",-
w
~
= iOIMHzl-
15
10
5.0
2.0
o
200
400 600
1.0 k
2.0 k
RS. SOURCE RESISTANCE IOhms)
/
~
~
4.0
100
=
30
14
~
::>
to
35 f-BW
4.0 k
,,/'
V
5
-- Providing a Source Resistance
/
.~
-10
I
I
=.
-20
-30
-40
-50
GAIN REDUCTION Id8)
I
1.0 kHl
76J mVpp
Eo'" Peak· to-Peak Envelope of
5
I
Modulated 10.7 MHz
/
Carrier at Pi 5
I
Eo = 2400 mVpp /
5
/
I
/
10
20
/
/
/
/ /
/
/240mvpp
/
./
40
50
30
GAIN REDUCTION IdB)
70
60
80
FIGURE 14 - 10.7 MHz AMPLIFIER
Gain = 55 dB. BW = 100 kHz
36 pF
r--o-+-!t---<> ~ga~
5.6 k
VRIAGC) D---'V'I'v---\--+-o--i
10.7 MHz o.---1f---\--+-o--i
150 n Source) 82 pF
L2
+12 Vdc
0.002
J
L1
l2
150 pF
24 Turns, No. 22 AWG Wire
on a T1244 Micro Metal
Toroid Core (-124 pF)
20 Turns, No. 22 AWG Wire
on a T12-44 Micro Metal
Toroid Core 1-100 pF)
MOTOROLA LINEAR/INTERFACE DEVICES
2-138
-
Optimized for Best Noise Figure.
10k
f '" 10.7 MHz
Modulation" 90% AM, 1m
load at Pin 5 '" 2.0 kH
V
Tilst Circuit Has Tuned Input
FIGURE 13 - HARMONIC DISTORTION versus AGC GAIN
REDUCTION FOR AM CARRIER (Fo, Telrt Circuit, See Figure 14}
0
V
-60
-70
-80
MC1490P
TYPICAL CHARACTERISTICS (continued)
FIGURE 15 - 511 AND 522. INPUT AND OUTPUT
REFLECTION COEFFICIENT
FIGURE 16 - 511 AND 522. INPUT AND OUTPUT
REFLECTION COEFFICIENT
.. ~ .-.i. ....~....
FIGURE 17 -
FIGURE 18 - 512. REVERSE TRANSMISSION
COEFFICIENT (FEEDBACK)
521. FORWARD TRANSMISSION
COEFFICIENT (GAIN)
MOTOROLA LINEAR/INTERFACE DEVICES
2-139
II
MC1490P
TYPICAL APPLICATIONS
II
FIGURE 19 -
60 MHz POWER GAIN TEST CIRCUIT
FIGURE 20 - PROCEDURE FOR SETUP
USING FIGURE 19
C3
C4
C2
Test
ein
2.23 mV (-40 dBm)
V2(AGC)
5-7 V
RAGC(kll)
MAGC
Go
1.0 mV (-47 dBm)
"5.0 V
5.6
NF
1.0 mV (-47 dBm)
"5.0 V
5.6
0
L2
FIGURE 21 -
VIDEO AMPLIAER
Cl
1+---4--...... + 12 Vdc
1.0 "F
VR(AGC)
Ll ~ 7 Turns. #20 AWG Wir•• 5/16" Oi...
518" Long
L2 ~ 6 Turns. #14 AWG Wire. 9/16" Oi •.•
3/4" Long
Cl.C2.C3 ~ (1-30) pF
C4 ~ (1-10) pF
VR(AGC) ...-~""'~
VR(AGC) __---'IIV'~-o-~
ei
0.001 "F
+ 12 Vdc
0.001 "F
AGURE 22 - 30 MHz AMPLIFIER
(Power Gain = 50 dB, BW = 1.0 MHz)
FIGURE 23 Input from
Local Oscillator
(70 MHz)
100
(1-30) pF
100 MHz MIXER
(1-10) pF
(1-30) pF
Q----t~["'4 IF Output
(1-10) pF
(30 MHz)
Signal Input
(100 MHz)
(~g~) -----If-~~-+--<>--i
(1-30) pF
36 pF
+ 12 Vdc
5.6 k
+12Vdc
L1
=
12 Turns #22 AWG Wire on a Toroid Core.
CT37-6 Micro Metal or Equiv)
T1: Primary = 17 Turns #20 AWG Wire on a Toroid Core,
(T44-6)
Secondary = 2 Turns #20 AWG Wire
L1
~
l2
=
5 Turns. #16 AWG Wire. 1/4"10.
518" Long
16 Turns. #20 AWG Wire on a Toroid
Core. (T44-6)
MOTOROLA LINEAR/INTERFACE DEVICES
2-140
®
MC1590G
MOTOROLA
IJ
RF/IF/AUDIO AMPLIFIER
WIDEBAND AMPLIFIER
WITHAGC
· .. an integrated circuit featuring wide-range AGC for use in RF/IF
amplifiers and audio amplifiers over the temperature range, - 55
to + 125°C. See Motorola Application Note AN513 for design
details.
• High Power Gain -
50 dB Typ at 10 MHz
45 dB Typ at 60 MHz
35 dB Typ at 100 MHz
• Wide-Range AGC -
60 dB min, dc to 60 MHz
• Low Reverse Transfer Admittance 60 MHz
SILICON MONOLITHIC
INTEGRATED CIRCUIT
PIN CONNECTIONS
<10 /Lmhos Typ at
c••
Ground
• 6.0 to 15-Volt Operation, Single-Polarity Power Supply
= +25"C
MAXIMUM RATINGS (T A
G SUFFIX
METAL PACKAGE
CASE 601-04
unless otherwise noted)
Symbol *
Value
Unit
Power Supply Voltage
VCC
+18
Vdc
Output Supply
Vo
+18
Vdc
Rating
AGC Supply
Differential Input Voltage
VI
VCC
5.0
Vdc
Operating Temperature Range
TA
-55 to +125
DC
Storage Temperature Range
T stg
-65 to +150
TJ
+175
°c
°c
V2(AGCI
Junction Temperature
Vdc
REPRESENTATIVE CIRCUIT SCHEMATIC
7 VCC
V2(AG C) 70
2
470
f
>k
IL
Y
470
l,
~
1.5k
(+)5
..r::==:::"
Outputs
::~ O-ln-p-u-ts---4_2_.0-66-k~:A-~~j"'I--[-I'-4-kr--:r-'8t=+1=2=4:=1=~l=0=0:;---],. :-"
5.0Y-
L---1f---f---+~r-'
1.1 k 1.1 k
8.4 k
(Polarl
912
b12
-0
-0 $lmhos
-5.0 -10
5.5 k 12.1 k
U
5.0 k
(Pin 1 to Pin 5)
Reverse Transfer
Admittance"
*The value of Reverse Transfer Admittance includes
the feedback admittance of the test circuit used in
the measurement. The total feedback capacitance
(including test circuit) is 0.025 pF and is a more
practical value for design calculations than the internal feedback of the device alone. {See Figure 10.}
r-------~~~--~---;
I
-Fh
ADMITTANCE PARAMETERS (VCC = +12 Vdc,
TA = +25OC)
f=MHz
Typ
Parameter
Symbol
Unit
30
60
0.6
Single-Ended Input
0.4
mmhos
911
Admittance
1.2 -3.0
bll
Single-Ended Outpul
mmho
0.05
0.1
922
Admittance
b22 0.50 1.0
Forward Transfer
175 150 mmhos
Y21
Admittance
-30 -105 degrees
621
~
5.6 k :1.9 k"---K,
200
Case
Substrate 4
8
Pins 4 and 8 should both be connected to circuit ground.
SCATTERING PARAMETERS (Vee = +12 Vd.,
TA = +25OC, ZO = 50 n)
f = MHz
Typ
Pa,amete,
Symbol
Unit
30
60
0.93
Input Reflection Sl1
0.95
-16 degrees
Coefficient
-7.3
611
Output
Reflection
Coefficient
S22
822
0.99
-3.0
0.98
-5.5
degrees
Forward
Transmission
Coefficient
S21
821
16.8
128
14.7
64.3
degrees
Reverse
Transmission
Coefficient
S12
612
MOTOROLA LINEAR/INTERFACE DEVICES
2-141
-
-
0.0000 0.0009
64.9
79.2 degrees
II
MC1590G
ELECTRICAL CHARACTERISTICS (VCC = +12 Vdc, f = 60 MHz, BW = 1.0 MHz, TA = -55'C to + 125'C unless
otherwise noted)
Characteristic
AGC Range
(V2(AGC)
(V2(AGC)
=
=
5.0 V to 7.0 V)
5.0 V to 7.0 V, TA
=
Fig.
Symbol
24
MAGC
25'C)
24
(TA
= 25'C)
(TA
= 25'C)
Output Stage Current
(Sum of Pins 5 and 6)
(TA
Output Current Matching
(Magnitude of Difference of Output Currents)
(TA
(15 - 16)
Gp
24
NF
32
10
= 25'C)
32
601 0
32
ICC
~§
.....
00
~~
~
-
6.0
7.0
dB
-
rnA
3.5
4.0
5.6
8.0
7.5
-
0.7
-
-
-
20
17
""~
rnA
14
mW
-
240
204
168
ffi
0
z
~
'\.
.......
40
30
Rl=100ll
~
20
,\
to
10
10
Rl = lOll
""
o
100
\'
Z
in
U
50
Vcc '12 Vdc
Rl = 1.0 kll
>
""
20
rnA
FIGURE 2 - VOLTAGE GAIN versus FREQUENCY
(Video Amplifier, See Figure 26)
~
20
10
-
to
I"..
~~3
........ 0
iij!ll
z
-
dB
45
W
.....
... w
-
40
-
'"z
-
"'~
w=>
!I: 0 40
00
68
37
50
'12~dc
50
-
Pc
FIGURE 1 - UNNEUTRALIZED POWER GAIN versus FREQUENCY
(Tuned Amplifier, See Figure 24)
-Vclc
Unit
dB
-
-
-
Power Consumption (12 x ICC)
(VI = OV)
(VI = 0 V, TA = 25'C)
0
Max
= 25'C)
Power Supply Current
(VO = OV)
(VO = 0 V, TA = 25'C)
60
Typ
58
60
Single-Ended Power Gain
Noise Figure
(R s optimized for best NF)
Min
0.1
I, FREQUENCY (MHzl
\.~
I III
200
1.0
10
I, FREQUENCY (MHzl
MOTOROLA LINEAR/INTERFACE DEVICES
2-142
100
1000
MC1590G
TYPICAL CHARACTERISTICS
(V2 (AGC)
=
0,
vcc =
12 Vdc, T A = +2So C unless otherwise noted)
IVideo Amplifier. Sea Figure 26)
50
I
~
z
RL -1.0 k"
'"w
'"<~
.......
30
">
w
"
"ffi
~
z
1111
VCC - 6.3 Vdc
~
;;:
100"
20
~
u; 10
<
o
0.01 "--_"--.L.l_LL.>:L.ll-_.-'---'-LL.u:l:.LL___.L.--'-...L..LLl-'-1J
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
100
iNPUT VOLTAGE (mVRMS)
0.3 0.5
3.0
1.0
'j.
~
40
~
35
'"'"
30
RL
z
-
/
w
~
>
V<
(
25
"
"zw
w
20
:j
'"u;
15
:>
10
z
'"
5.0
V
a
2.0
4.0
6.0
Ac
1
V
V
.§.
z
1
Ii
"
1
9.0 ~
12
10
14
z
~
~
S?
i'-..
~
20
~
30
"
40
~
50
z
~
--
60
70
a
80
a
~
I
100
"'"
I
< RAGC
I
I
< 100 k
=< 60
'"
70
m
'\
\
ai'
RAGC
~
5.6kU
I
3.0
6.0
9.0
12
15
18
21
VR(AGC). AGC VOLTAGE (Vdc)
24
27
30
FIGURE 8 - FIXED TUNED POWER GAIN REDUCTION
versus TEMPERATURE (See Test Circuit. Figure 241
_
~
~
00
~
iAGC AGC CURRENT ("A)
-
.,
+40
~+30
1m
~
,"
~y
/-55 0C
....-OoC
~>-..'\.~
+125oC.....
~ +10
"'- "'-......
:-:::: ~
+75 0C......
z
«
+20
'"'"
........
'\
-20
~
+50
z
80
-40
300
100
RAGC ~ 100 k"
50
RAIGC -
FIGURE 7 - TYPICAL GAIN REDUCTION versus AGC CURRENT
10
2
AAGC
40
Vcc. SUPPLY VOLTAGE IVOL TS)
r--
I
VR(AGC)
30
3.0
16
50
I
............ r-..
20
~
..:
6.0
8.0
30
~ :-.....
10
21
./
10
FIGURE 6 - TYPICAL GAIN REDUCTION
.ersusAGC VOLTAGE
24
r--
= LOMHl
=1.DkE
5.0
f. FREUUENCY (MHz)
FIGURE 5 - VOLTAGE GAIN AND SUPPLY CURRENT versus
SUPPL Y VOLTAGE (Video Amp'ifi.... See Figur. 26)
f
,
~
:>
45
•
FIGURE 4 - VOLTAGE GAIN .ersus FREQUENCY
FIGURE 3 - DYNAMIC RANGE: OUTPUT VOLTAGE vorsus
INPUT VOLTAGE (Video Amplifier, So. Figure 26)
'\.'\.'1 ~+250C
-" ~
,,\."
'\.\.~
~
~~
C!Jc. 0
-10 -20
1~
U
~
~
,-- VCC ~ 12 Vdc
f ~60MHz
- RAGC ~ 5.6 k"
.,
I
U
U
U
U
U
U
U
VA(AGC). AGC VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-143
U
U
~
MC1590G
TYPICAL CHARACTERISTICS (continued)
II
FIGURE 9 - POWER GAIN venus SUPPLY VOLTAGE
ISeo Test Circuit, Figure 241
FIGURE 10 - REVERSE TRANSFER ADMITTANCE versus
FREQUENCY ISee Parameter Table, Page 11
80
f=
$ 60
:!!
Z
50
~O MHz
w
~ -40
:::'"
~
«
=<
'"
~
...
~
0.
'"
-50
Q
]
10
!----
V
40
30
-30
/
~
w
~
~
z
~ -20
t-
w
Ibl~V
~
~
20
~ -10
10
;:
o
2.0
4.0
B.O
8.0
10
12
14
0
16
40 50
f. FREQUENCY (MHz)
Vee, POWER SUPPLY VOLTAGE (Vdc)
18
/"
8.0
7.0
w
5.0
~
-
~
~
~.
z
4.0
./
V
V
~
14
~
12
f~~~iPn~~~~dNF
...
w
--
U)
8.0
~.
6.0
~
2.0
4. 0
1.0
2.0
15
f = 105 MHz
u:: 10
3.0
o
200
25
30
35 40
50
60 70 80 90 100
f, FREQUENCY (MHz)
100
150
200
40
30
5
,/"
V
V
L
V
Test Circuit Has Tuned Input
Providing a Source Resistance OPti:ted for Best Noise Figure.
°v
5. 0
0
-10
-20
-30
-40
-50
GAIN REOUCTION (dB)
60
-10
-80
MOTOROLA LINEAR/INTERFACE DEVICES
2-144
V
f = BOMHzLV
1/
VV-
f/f = 30 MHz
400 BOO
1.0 k
2.0 k
RS. SOURCE RESISTANCE (Ohms)
FIGURE 13 - NOISE FIGURE versus AGC GAIN REDUCTION
f =30 MHz
35 f- BW ='1.0 MHz
wtr
V
o
20
V
Vcc = 12 Vdc
lB
;;;
B.O
ISO
20
9.0
w
~
:>
100
FIGURE 12 - NOISE FIGURE vorsusSOURCE RESISTANCE
10
:!!
m~O
30
20
10
FIGURE 11 - NOISE FIGURE versus FREQUENCY
t""" i-""""
......
N
o
V
L
4.01k
10k
MC1590G
TYPICAL CHARACTERISTICS (continued)
10
ti
E
w
u
"
"
~
1.0
/b11_ -
/
z
1.5
9.0
/
2.0
.5
l-
------
E
z
~
,/
V
~
/
/'
V g2f -
./
;:J 0.5
---
I--- ---
>
20
30
40
/
u
~
~
8.0
.5 7.0
I-
5.0
"=>
4.0
z
3.0
l~
/ / b ll - -
6.0
..........-
;: 1.0
--- f-- ---
1.0
o
80
60
t, FREUUENCY (MHz)
100
150
20
100
load at Pin 5
=
I
co
J
Eo = 2400 mv pp /
1 i
/
5
,/
J
/
0
10
20
FIGURE 17 -10.7 MHz AMPLIFIER
Gain
55 dB. BW
100 kHz
=
36 pF
/
r---(J~+-1t--<> ~ga~
/
j
k_ _+-_+-.o---I
VR(AGCIo-_5",.6vv10.7 MHz cr--1f----1f--+--(J~
(50 n Sourcel 82 pF
w
u
110
.5
z
"
l-
BO
~
40
I-
"'"
0.002
/
I
/
Ll
60
70
,~~Ji
g11
80
L2
i
~ -160
;;;·200
2.0
>
1\
5.0
"
10
20
t, FREUUENCY (MHz)
"'-;
a: ~ 160 f-I-I Y211
r-- g ~
V
I-'"
'"w
-45 ~
.......
1\
140
~ ~
"w
'\
80
-
9 r T'I
II II
II U
o
100
2.0
5.0
10
20
t, FREUUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2·145
g!
0"
~ ~
s:w
-180:5 ~
-22Si
g
1\ '\ -270 w"
~ ~
\ -315 -:,z
_ !NPUT - Pin 1
UT U ~'") ~
20
100
- 135
100
-I-
50
90
r-.
""0
~ ~ 60
>;;;"
a:: 40
\
-120
+45
~ ~ 120
/
0
Y21. FORWARD TRANSFER ADMITTANCE
POLAR FORM
~u
/
z
20 Turns, No. 22 AWG Wire
on a T12-44 Micro Metal
Toroid Core (-100 pFI
'11
180
Ow
r-..
g ·40
·80
0 .002
24 Turns. No. 22 AWG Wire
on a T12-44 Micro Metal
100
~i
1'\
.......
FIGURE 19 -
. Pi~ 1
OUTPUT - Pin 5
~
~
1
so150 pF
Toroid Core (-124 pFI
50
40
30
GAIN REDUCTION (dB)
b21
w
+ 12 Vdc
Ll
/240mVpp
I /
200
160
=
4
FIGURE 18 - V21. FORWARD TRANSFER ADMITTANCE
RECTANGULAR FORM
E
200
100
760mVpp
2.0 ku
Modulated 10.7 MHz
Carrier at Pin 5
0
80
f---t-
1.0 kHl -
Eo" Peak-Ia·Peak Envelope 01
5
60
I
I
------ gr-
---
40
30
/'
t, FREUUENCY (MHz)
0
I" 10.1
7 MHz I
5 Modulation: 90% AM, 1m
/
",/
FIGURE 16 - HARMONIC DISTORTION ve .. us AGC GAIN
REDUCTION FOR AM CARRIER (For Test Circuit. See Figure 171
ti
II
FIGURE 15 - SINGLE·ENDED INPUT ADMITTANCE
FIGURE 14 - SINGLE·ENDED OUTPUT ADMITTANCE
2.5
[\.. -360 :;:
-405
50
100
200
II
MC1590G
TYPICAL CHARACTERISTICS (continuedl
FIGURE 20 - S11 AND S22. INPUT AND OUTPUT
REFLECTION COEFFICIENT
FIGURE 21 - S11 AND S22. INPUT AND OUTPUT
REFLECTION COEFFICIENT
FIGURE 22 - S21. FORWARD TRANSMISSION
COEFFICIENT (GAIN)
FIGURE 23 - S12. REVERSE TRANSMISSION
COEFFICIENT (FEEDBACK)
MOTOROLA LINEAR/INTERFACE DEVICES
2-146
MC1590G
TYPICAL APPLICATIONS
FIGURE 24 -
60 MHz POWER GAIN TEST CIRCUIT
C3
0.001
E1
FIGURE 25 - PROCEDURE FOR SETUP
USING FIGURE 24
Test
MAGC
Gp
NF
C2
Bin
2.23 mV (-40dBm)
1.0mVH7dBm}
1.0 mVH7dBm}
V2IAGC} RAGC(k!l}
5·7 V
0
.. 5.0 V
5.6
.. 5.0 V
5.6
FIGURE 26 - VIDEO AMPLIFIER
Input
(SOU)
Cl
'H!+---+--_+12 Vd,
VRIAGC}
VRIAGC} "'---""""---...
II '" 7 Turns, 120 AWG Wire, 5/1S" Dia.,
5/8" Long
L2 " 6 Turns. 114 AWG Wire. 9/16" Oia.,
Cl,C2,C3 = 11·30} pF
C4 = 11·10} pF
VRIAG C}
"'--"'--"
"'--"IN'.,--6~
'i
3/4" Long
O.OOI"F +12 Vd,
FIGURE 27 - 30 MHz AMPUFIER
(Power Gain = 50 dB, BW = I,D MHz)
FIGURE 28 - 100 MHz MIXER
Input from
local Oscillator
170 MHz}
100
11·10} pF
c;>-;,,--1~IF.IF Output
11·30} pF
130 MHz}
:~~~~)
Signal Input .....--::II+"'-..---t~.()..-I
1100 MHz}
--if-.....-+--+-<:>--i
3B pF
11·30} pF
Ll '" 12 Turn5 1122 AWG Wire ona Toroid Core,
Ll '" 5 Turns. #16 AWG Wire. 1/4" 10,
--1
11·10) pF
T1: Primary Winding:: 15 Turns, #22 AWG Wire, 114" 10 Air Core
Secondary Winding"" 4 Turns,IJ22 AWG Wire,
Coefficient of Coupling,=: 1.0
T2: Primary Winding:: 10Turns,I22 AWG Wire, 1/4" 10 Air Core
Secondary Winding:: 2 Turns, #22 AWG Wir.,
Coefficient of Coupling ~ 1.0
MOTOROLA LINEAR/INTERFACE DEVICES
2-147
+12 Vdc
MC1590G
TYPICAL APPLICATIONS (continued)
II
FIGURE 30 - SPEECH COMPRESSOR
DESCRIPTION OF SPEECH COMPRESSOR
The amplifier drives the base of a PNP MPS6517 operating common-emitter with a voltage gain of approximately 20. The control R1 varies the quiescent Q point
of this transistor so that varying amounts of signal exceed the level Vr . Diode 01 rectifies the positive peaks
of Q1's output only when these peaks are greater than
Vr = 7.0 Volts. The resulting output is filtered by Cx ,
Rx·
Rx controls the charging time constant or attack time.
Cx is involved in both charge and discharge. R2 (the
150 kO and input resistance of the emitter-follower Q2)
controls the decay time. Making the decay long and
attack short is accomplished by making Rx small and
R2 large. (A Darlington emitter-follower may be needed
if extremely slow decay times are required.)
The emitter-follower Q2 drives the AGC Pin 2 of the
MC1590G and reduces the gain. R3 controls the slope
of signal compression. The following graph (Figure 31)
details performance with R3 set to 15 kO.
TABLE
FIGURE 31 - OUTPUT VOLTAGE ve'.... INPUT VOL TAGE
1.0
_
0.7 ~SEE FIGUAE 30
0.5
100 kn
Al
FREQUENCY
~
Al- 15 kl1
~
w
to
0.2
1=
0.05
~
~
o O. I
>
5 0,0 7
1 - DISTORTION versus FREQUENCY
100 Hz
300 Hz
1.0kHz
10 kHz
100 kHz
I
-
Al- 0
DISTORTION
DISTORTION
10mV 8i 100mV OJ 10 mV OJ loomV_j
3.5%
2%
1.5%
1.5%
1.5%
Notes 1 and 2
::J
Note: (1)
o
0.02
0.0
IV
0.1
/
Measured from 100 Hz to 10 kHz
(2)
for Values of Attack from
3:0'04,Or'lllllll
0.3
0.5
1.0
3.0
12%
10%
8%
8%
8%
5.0
10
(3)
I
30
50
100
'j.INPUT VOLTAGE (mV)
(4)
FIGURE 32 - OUTPUT CURRENT.
CURRENT MATCH AND ICC FIXTURE
MOTOROLA LINEAR/INTERFACE DEVICES
2-148
15%
6%
3%
1%
1%
27%
20%
9%
3%
3%
Notes 3 and 4
Decay = 300 ms
Attack = 20 ms
C x =7.5"F
Rx = 0 (Short)
Decay = 20 ms
Attack = 3 ms
ex = 0.68 "F
Rx =1.5kl1
ORDERING INFORMATION
Device
MC1709CG
MC1709CU
MC1709CPl
MC1709G,AG
MC1709AU
Temperature Range
Package
O°C to +70°C
O°C to + 70°C
O°C to + 70°C
- 55°C to + 125°C
- 55°C to + 125°C
Metal Can
Ceramic DIP
Plastic DIP
Metal Can
Ceramic DIP
MC1709
MC1709A
MC1709C
MONOLITHIC OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
. designed for use as a summing amplifier, integrator, or amplifier
with operating characteristics as a function of the external feed·
back components.
•
High-Performance Open Loop Gain Characteristics
Avol = 45,000 typical
•
Low Temperature Drift - ±3.0 /lV laC typical (MC17091
PIN CONNECTIONS
Input Freq. Compo
•
Large Output Voltage Swing - ±14 V typical @ ±15 V Supply
•
Low Output Impedance - Zo = 150 ohms typical
VEE
(Top Viewl
MAXIMUM RATINGS (TA ~ +25°C unless otherwise noted I
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+18
-18
Vdc
Input Differential Voltage Range
VIDR
±5.0
Volts
Input Common-Mode Range
VICR
±10
Volts
IL
10
mA
Output Short-Circuit Duration
ts
5.0
s
Power Dissipation (Package Limitationl
Metal Can
Derate above TA ~ + 25°C
Po
680
4.6
mWrC
Output Load Current
Plastic Dual In-Line Packages (MC1709C onlyl
Derate above TA ~ +25°C
Ceramic Dual In-Line Package
Derate above TA ~ +25°C
Operating Ambient
Temperature Range
MC1709A, MC1709
MC1709C
Storage Temperature Range
Metal and Ceramic Packages
Plastic Packages
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC1709C Only)
mW
625
5.0
750
6.0
TA
G SUFFIX
METAL PACKAGE
CASE 601-04
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
mW
mWrC
mWrC
mWrC
-55 to + 125
o to + 70
.~
.~
1
(Top View)
Input Freq.
Camp.
°C
Input Freq.
Inv, Input
°C
Tstg
-65 to +150
-55 to + 125
Compo
FIGURE 1 - EQUIVALENT CIRCUIT SCHEMATIC
INPUT COMPENSATION
OUTPUT
...----1--+-<> OUTPUT
COMPENSATION
18 k
10k
75
2.4 k
MOTOROLA LINEAR/INTERFACE DEVICES
2-149
II
MC1709, MC1709A, MC1709C
ELECTRICAL CHARACTERISTICS (unless otherwise noted,
+ 9.0 V '" Vee'" 15 V, -.9.0 V '" VEE'" -15 V, TA = 25°e)
MC1709
MC1709A
Characteristic
Input Offset Voltage
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Via
-
0.6
2.0
-
1.0
5.0
mV
(RS';; 10 knl
I nput Offset Current
110
10
50
50
200
nA
Input Bias Current
liB
100
200
200
500
nA
150
400
150
-
kn
-
Input Resistance
r;
350
700
Output Resistance
'0
-
150
-
ICC,IEE
2.5
3.6
Pc
75
108
-
1.5
30
Power Supply Currents
n
mA
(VCC = 15 V, VEE = -15 VI
Power Consumption
80
165
mW
0.3
10
1.0
30
'"%
(VCC = 15 V, VEE = -15 VI
Transient Response
IVcc = 15 V, VEE = -15 VI See Figure 8
Risetime
tTLH
as
Overshoot
-
-
ELECTRICAL CHARACTERISTICS (unless otherwise noted,
+9.0 V '" Vee'" 15 V, -9.0 V '" VEE'" -15 V, TA = -55°e to + 125°e)
MC1709A
Characteristic
I nput
Offset Voltage
MC1709
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Via
-
-
3.0
-
-
6.0
mV
-
1.8
1.8
10
10
-
-
-
3.0
-
-
-
-
-
-
(RS';; 10 knl
Average Temperature Coefficient of Input Offset Voltage
(RS
(RS
(RS
(RS
IRS
(RS
= 50
= 50
= 50
= 10
= 10
= 10
~VIO/AT
n. TA = 25 0 e to 1250 el
n. T A = -550 e to 25 0 el
n. TA = -55°C to 1250 CI
kn. TA = 25°C to 1250 CI
kn. TA = -55°C to 25 0 CI
kn, TA = _55°C to 1250 CI
Input Offset Current
"V/UC
-
-
-
-
2.0
4.8
15
25
-
-
-
-
6.0
-
--
40
3.5
250
50
-
100
20
500
200
0.45
0.08
2.8
0.5
-
-
.-
-
lIB
-
300
600
-
500
1500
nA
'i
85
170
-
40
100
-
kn
VICR
.±8.0
.±10
-
±8.0
±10
-
V
CMRR
80
110
-
70
90
-
dB
PSRR
--
40
100
-
25
150
"V/v
AV
25
45
70
25
45
70
V/mV
-
nA
110
(TA = -55°C I
ITA = 1250 CI
-
Average Temperature Coefficient of I nput Offset Current
nA/oC
Alia/AT
.-
(T A = -55°C to 250 CI
(T A = 25°C to 1250 CI
Input Bias Current
-
(TA = -55°C I
Input Resistance
(TA = -55°C I
I "put Common-Mode Voltage Range
(Vec= 15V.VEE=-15VI
Common Mode Rejection Ratio
(RS <;;;10 knJ
Supply Voltage Rejection Ratio
(VCC = 15 V. VEE = -15 V, RS <;;;10 knl
Large Signal Voltage Gain
(VCC = 15 V, VEE = -15 V, RL >2.0 kn,
VO= ±15VI
Output Voltage Range
Power Supply Currents
±12
±10
±14
±13
-
±12
±10
±14
±13
mA
ICC/lEE
(VCC = 15 V. VEE = -15 VI
(TA = -55°C I
(TA = 1250 el
Power Consumption
V
VOR
(VCC = 15 V. VEE = -15 VI
(RL >10 knl
(RL >2.0 knJ
-
2.7
2.1
4.5
3.0
-
-
mW
Pc
(VCC = 15, VEE = -15 VI
ITA = -55°C I
(TA = 1250 CI
-
-
81
63
135
90
MOTOROLA LINEAR/INTERFACE DEVICES
2-150
-
-
-
MC1709, MC1709A, MC1709C
ELECTRICAL CHARACTERISTICS (unless otherwise noted, VCC
=
+15 V, VEE
=
= 25°C)
-15 V, TA
MCI709C
Characteristic
Symbol
Min
Typ
Max
VIO
-
2.0
7.5
mV
nA
t oput Offset Voltage
Unit
(RS" 10 kn, 9.0 V .. 15 V. -9.0 V" VEE" -15 VI
Input Offset Current
110
100
500
I nput Bias Current
118
-
300
1500
nA
ri
50
250
-
kn
Output Resistance
ro
-
150
-
n
Power Consumption
Pc
BO
200
mW
Large Signal Voltage Gain
AV
15
45
-
V/mV
±12
±10
±14
-
±13
-
VICR
CMRR
±B.O
±10
-
65
90
PSRR
-
25
200
I'VIV
trLH
-
0.3
10
-
'"%
In·put Resistance
(RL"2.0kn.VO=±10VI
Output Voltage Range
(RL >10 kn)
(RL >2.0 kHi
V
VOR
Input Common-Mode Voltage Range
Common Mode Rejection Ratio
V
dB
(RS';; 10 kn)
Supply Voltage Rejection Ratio
(RS';;lOknl
Transient Response
See Figure 8
RiseTime
Overshoot
as
ELECTRICAL CHARACTERISTICS (unless otherwise specified, VCC
=
+15 V, VEE
=
-15 V, TA
= DOC to 7DOC)
MCI709C
Symbol
Min
Typ
Max
Unit
Input Offset Voltage
(RS" 10 kn. 9.0 V" VCC" 15 V. -9.0 V" VEE" 15 VI
Input Offset Current
Via
-
-
10
mV
110
-
nA
liB
-
-
750
Input Bias Current
2.0
I'A
Large Signal Voltage Gain
AV
12
-
-
V/mV
ri
35
-
-
Parameter
(RL" 2.0 kn. Vo = ±10 VI
Input Resistance
kn
TYPICAL CHARACTERISTICS
FIGURE 2 - TEST CIRCUIT
(VCC = +15 Vdc.VEE = -15 Vdc. TA = +25 0 CI
A1
Fig.
No.
3
4
5
(urve No.
1
2
3
4
1
2
3
4
1
2
3
4
Test Conditions
R1(Q)
10k
10 k
10 k
1.0k
1.0k
10 k
10k
10k
0
0
0
0
MOTOROLA LINEAR/INTERFACE DEVICES
2-151
~(Q)
10k
100 k
1.0M
1.0M
1.0M
1.0M
100 k
10k
'"
'"
'"
'"
R3 (Q) (I (pF) C2 (pF)
1.5k
1.5 k
1.5 k
0
0
1.5k
1.5k
1.5k
1.5k
1.5k
1.5 k
0
5.0 k
500
100
10
10
100
500
5.0 k
5.0 k
500
100
10
200
20
3.0
3.0
3.0
3.0
20
200
200
20
3.0
3.0
II
II
MC1709, MC1709A, MC1709C
FIGURE 4 - CLOSEO LOOP VOLTAGE
GAIN versus FREQUENCY
FIGURE 3 - LARGE SIGNAL SWING versus FREQUENCY
i
8,,~~~~~~~,~~,~~~
12 0
24~+-~H+~~~H-~~++~~~++-4~~
100
i
t\
II
s
20r-+-~Ht~r-~H-~~~~~+t4+-4-4~
0
~ 16~+-~H+~~~I~r_~+2~~+3~\~4+-4-4-~
. 12
"~
..
w
to
~
o
i
R~ .1
i
60
4
to
r-+-+"Ht~-t-+w--+-+1\\-~+--+f-,\j---+-l~
~
o
1\ 1\
~ 4:~--LJ.,~_.LL};!
11.,--L-'-LI'~...r'---.l....Ln,I'~~l:-:--r::::~
1.0 k
10 k
100 k
1.0 M
r--,
3
I
!
>
:> 20
r-....
2
'"
8.0f--+----++++-lrrl \
100
40
.......
t-....
"r--, .......
I
-20
10 M
100
10 k
1.0 k
f. FREQUENCY 1Hz)
100 k
1.0 M
10 M
f. FREQUENCY 1Hz)
FIGURE 6 - VOLTAGE GAIN versus
POWER SUPPL Y VOLTAGE
FIGURE 5 - OPEN LOOP VOLTAGE
GAIN versus FREQUENCY
120
100
Rll.oo
100
~
0 ......
z
~
w
to
60
........
t--...... i'
J"-.
~ 40
o
>
"
Z
r--,
I'-
r--. r--,
r--, r--,
1
~ 20
~
-2 0
100
10k
1.0 k
90
w
to
......
4
::t
r--,
'"~
"-
I;--
........
> 80
~
0
I'
g
~
........ i'
0
60
10M
o
5.0
VCCNEE
10 k
-
20
5.0
\<
~ 2.0
cE
1.0
0.5
0.2
O. 1
1.0
10
15
FIGURE 8 - TRANSIENT RESPONSE TEST CIRCUIT
+15V
50
~ 10
10
VCC and VEE. POWER SUPPLY VOLTAGE IVOl TS)
FIGURE 7 - SLEW RATE versus CLOSEO LOOP GAIN
USING RECOMMENOEO COMPENSATION NETWORKS
100
V
/'
~
I
:>
1.0 M
100 k
)
70
'"
f. FREQUENCY 1Hz)
~
-
m
100
1000
ClOSEO lOOP GAIN IVOlTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-152
20
ORDERING INFORMATION
Device
Temp_Btur. Range
Packe,.
- 55°C to + 125°C
- 55°C to + 125°C
O°Cto +70°C
D"Cto +70°C
D"Cto +7D"C
Metal Can
MC1733G
MC1733L
MC1733CG
MC1733CL
MC1733CP
MC1733
MC1733C
Ceramic DIP
Metal Can
Ceramic DIP
Plastic DIP
DIFFERENTIAL VIDEO
WIDEBAND AMPLIFIER
DIFFERENTIAL VIDEO AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. a wideband amplifier with differential input and differential output. Gain is fixed at 10, 100, or 400 without external components
or, with the addition of one external resistor, gain becomes adjustable
from 10 to 400.
•
Bandwidth - 120 MHz typical
AVd
@
AVd
G SUFFIX
METAL PACKAGE
CASE 603-04
= 10
= 10
•
Rise Time - 2.5 ns typical
•
Propagation Delay Time - 3.6 ns typical @ AVd
@
II
= 10
G'A
GAIN SELECT
FIGURE 1 - BASIC CIRCUIT
FIGURE 2 - VOLTAGE GAIN
ADJUST CIRCUIT
GAIN SELECT
G2A
GAIN SELECT
INPUT'
OUTPUT'
INPUT 2
OUTPUT 2
Rartj
(top view)
OUTPUT 1
INPUT 1
G'B
GAIN SELECT
INPUT
1
ITop View)
INPUT 2
INPUT
1
VEE GZA G2fI
-
GAIN SELECT
FIGURE 3 - EQUIVALENT CIRCUIT SCHEMATIC
•
1
14
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
PSUFFIX
PLASTIC PACKAGE
CASE 646-06
INPUT 2
INPUT I
•
14
OUTPUT I
1
GAIN! GIA
SELECT G2A
50
50
'4
INPUT2
GAIN { G2B
SELECT GIB
590
400
2
'3 NC
G2B GAIN SELECT
3
'2 G2A GAIN SELECT
G'B GAIN SELECT
4
"
VEE
5
10 VCC
NC
6
9 NC
MOTOROLA LINEAR/INTERFACE DEVICES
G'A GAIN SELECT
(top view)
OUTPUT 1
OUTPUT 2
ITopView)
2-153
INPUT'
NC
II
MC1733, MC1733C
MAXIMUM RATINGS (TA = +25o C unless otherwise noted)
Rating
Symbol
Value
Unit
VCC
+8.0
-8.0
Volts
Power Supply Voltage
VEE
Vin
±5.0
Volts
VICM
±6.0
Volts
Output Current
10
10
rnA
Internal Power Dissipation (Note 1)
Metal Can Package
Po
500
500
rnW
TA
to +70
-55 to +125
°c
Tstg
-65 to +150
°c
Differential Input Voltage
Common-Mode I "put Voltage
Ceramic Dual In-Line Package
Operating Temperature Range
MC1733C
MC1733
Storage Temperature Range
ELECTRICAL CHARACTERISTICS IVcc = +6.0 Vdc. VEE
o
= -6.0 Vdc, at TA = +250 C unless otherwise noted.)
MC1733
MC1733C
Symbol
Min
Typ
Max
Min
Typ
Max
AVd
300
90
9.0
400
100
10
500
110
11
250
80
8.0
400
100
10
600
120
12
Gain 1
Gain 2
-
-
-
40
90
120
-
Gain 3
40
90
120
10.5
4.5
2.5
-
-
10.5
4.5
2.5
-
-
7.5
6.0
3.6
-
Characteristic
Gain 2 INote 3)
Gain 3 (Note 4)
Bandwidth
Rise Time
Units
V/V
Differential Voltage Gain
Gain 1 (Note 2)
(R s =50n)
BW
IRs = 50 n, Vo = 1 Vp·p)
Gain 1
Gain 2
MHz
ns
tTLH
tTHL
-
-
Gain 3
Propagation Delay IRs = 50 n, Vo = 1 Vp.p)
Gain 1
-
tpLH
tpHL
10
-
12
ns
-
-
-
7.5
6.0
3.6
10
-
10
-
4.0
30
250
-
4.0
30
250
Cin
-
2.0
-
-
2.0
-
pF
11101
-
0.4
3.0
-
0.4
5.0
/.IA
Input Bias Current (Gain 3)
liB
-
9.0
20
-
9.0
30
/.IA
Input Noise Voltage
Vn
-
12
-
-
12
-
/.IVlrms)
Vin
±1.0
-
-
±1.0
-
-
-
Gain 2
Gain 3
Input Resistance
10
kn
Rin
-
Gain 1
Gain 2
Gain 3
I nput Capacitance
-
20
IGain 2)
Input Offset Current (Gain 3)
(R s =50n,
BW = 1 kHz to 10 MHz
Input Voltage Range IGain 2)
Common-Mode Rejection Ratio
Gain 2
IVCM = ±1 V, f'; 100 kHz)
Gain 2
(VCM =±1 V,f=5MHz)
PSRR
Output Offset Voltage
Gain 1
Gain 2 and Gain 3
VOO
Output Voltage Swing (Gain 2)
Output Sink Current (Gain 2)
Output Resistance
Power Supply Current (Gain 2)
-
CMRR
Supply Voltage Rejection Ratio
Gain 2
I<1Vs = ±0.5 V)
Output Common-Mode Voltage (Gain3)
-
V
dB
60
86
-
60
-
60
-
-
86
60
-
50
70
-
50
70
-
-
0.6
0.35
1.5
1.0
-
0.6
0.35
1.5
1.5
dB
V
2.4
2.9
3.4
2.4
2.9
3.4
V
Vo
3.0
4.0
-
3.0
4.0
-
Vp·p
10
2.5
3.6
3.6
-
mA
-
20
-
2.5
Rout
-
20
-
n
18
24
-
18
24
mA
VCMO
0
MOTOROLA LINEAR/INTERFACE DEVICES
2-154
MC1733, MC1733C
ELECTRICAL CHARACTERISTICS IV CC = +60 Vdc V EE =-60 Vdc at T A-- T high toT low unless otherwise noted)
MC1733
Min
Typ
Max
Min
200
BO
B.O
-
-
600
120
12
250
BO
B.O
Ain
B.O
-
-
B.O
11101
-
-
5.0
-
40
-
Symbol
Characteristic
Differential Voltage Gain
Gain 1 INate 2)
Gain 2 INate 3)
Gain 3 INate 4)
AVd
Input Resistance
It
MC1733C
Typ
Max
Units
VIV
600
120
12
-
-
-
k!l
Gain 2
Input Offset Current (Gain 3)
-
6.0
I'A
40
I'A
-
dB
dB
Vjn
+1.0
-
-
±1.0
Common-Mode Rejection Ratio
IVCM=±1 V,f"';;100kHz)
Gain 2
CMRR
50
-
-
50
-
Supply Voltage Rejection Ratio
IAVs = ±C.5 V)
Gain 2
PSRR
50
-
-
50
-
-
Output Offset Voltage
VOO
-
-
1.5
-
1.2
-
-
1.5
1.5
2.5
27
-
-
Input Bias Current (Gain 3)
liB
Input Voltage Range (Gain 21
Gain 1
Gain 2 and Gain 3
V
V
Output Voltage Swing IGain 2)
Va
2.5
-
Output Sink Current
IGain 2)
If)
2.2
Power Supply Current IGain 2)
ID
-
-
2.5
-
Vp-p
27
mA
mA
*Tlaw = OaC for MC1733C, -55 a C; for MC1733
Thigh = +70o C for MC1733C, +1250 C for MC1733.
FIGURE 4 - MAXIMUM ALLOWABLE POWER DISSIPATION
800
NOTES
0
Note 1:
Derate metal package at 6.5 mW/oC for operation at
ambient temperatures above 75°C and dual in-line package at 9 mW/oC for operation at ambient temperatures
above lOOoe (see Figure 4). If operation at high am-
bient temperatures is required (MC1733) a heatsink
may be necessary to limit maximum junction temperature to 150°C. Thermal resistance, junction-to-case,
for the metal package is 69.4°C per Watt.
Gain Select pins G1A and G18 connected together.
Gain Select pins G2A and G28 connected together.
All Gain Select pins open.
Note 2:
Note 3:
Note 4:
,,
I"' ,
r--
MET:5L~~~oKtGE
_
"'
,
'\
.",
CERAMIC DUALIN·LlNE PACKAGE
9 mW/oC r - -
,,
~~.
o
o
+150
+100
+50
+200
TA, AMBIENTTEMPERATURE lOCI
TYPICAL CHARACTERISTICS
(Vee:=
+6.0 Vdc, VEE = -6.0 Vdc, T A
FIGURE 5 - SUPPLY CURRENT versus TEMPERATURE
FIGURE 6 - SUPPLY CURRENT versus SUPPLY VOLTAGE
20
'"
E
i
B
4
19
,,/'
./
0
1B
...........
//
";
~
9
:= +25 0 e unless otherwise noted.)
1/
.........
~
17
16
-60
-20
+20
+60
V
6
"'"
+100
."./
V
V
2
./
8.0
3.0
+140
T A, AMBIENTTEMPERATURE lOCI
../'
4.0
5.0
6.0
VCC, IVEEI, SUPPLY VOLTAGE IVOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-155
7.0
B.O
II
MC1733, MC1733C
TYPICAL CHARACTERISTICS (continued)
(VCC
=+6.0 Vdc, VEE =-6.0 Vdc, TA =+250 C unless otherwise noted.!
FIGURE 8 - GAIN versus FREQUENCY
FIGURE 7 - GAIN vorus TEMPERATURE
1.15
60
"'-
1.10
"GAIN 1
JJ
0
~ 1.05
1.0
">
0.95
w
>
0
"'-
w
'"~
r--
0
:--..... ~lIN1- r--
0
GAIN 3
'"
g
0.90
"
.......
-10
+10
+60
\.
GAIN 3
'"
\
0
.'\.
0.8 0
-60
GAIN 1
0
"'-
0.8 5
Rt='1.W
-r-
z
+100
+140
10
1.0
T. TEMPERATURE (DC)
100
1.0k
f, FREQUENCY (MHz)
FIGURE 10 - GAIN versus RADJUST
FIGURE 9 - GAIN versus SUPPL Y VOLTAGE
1.4
1000
z
~
w
~
~
">
~
l.!l
g o.
V
I--
---
....- V
./
w
.....-
i-""
r-- r-GAIN 3
~I"""
GAI~
0.8
~
,- r-
1.1
z
~>
~
~
'"
100
!
GAINy
0;
i
6/
O. 4
3.0
......
'"'"
I..............
10
4.0
5.0
B.O
7.0
6.0
10
100
VCC,IVEEI, SUPPLY VOLTAGE (VOLTS)
+60
z
+50
~
'"
~'>"
"w
"zw
~
'"z
IIIII
FIGURE 12 - GAIN versus FREQUENCY
and TEMPERATURE
VCCNEE
+40
RLG"A~~ ~J
I
"''"
z
~ I~ B.~ v'
~
~
±6.0 V
~}olv
10
50
"'"
40
>
30
i
~
+10
-10
1.0
~
~
+30
J
60
R~JJk\,'
fT(
w
\
+10
10k
Radj,(llI
FIGURE 11 - GAIN versus FREQUENCY and
SUPPLY VOLTAGE
~
r----I--
1.0.
II !I
100
TA -
~
10
~
~
~
~
v;
+25 0 C
I II
+75 0 C
10
;
1.0 k
-10
1.0
n1'
5
10
100
t, FREQUENCY (MHz)
f, FREQUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-156
~550d
" OoC
1.0k
MC1733, MC1733C
TYPICAL CHARACTERISTICS (continued)
= +6.0 Vdc, VEE = -6.0 Vdc, TA = +250 C unless otherwise noted.)
(VCC
FIGURE 13 - PULSE RESPONSE versus GAIN
FIGURE 14 - PULSE RESPONSE versus SUPPLY VOLTAGE
+1.6
+1.6
IGAIN2'_
~
+1.2
GAIN 3
o
2:
w
~
'-...J
+0.8
GAIN 2-/-
~
>
~ +0.4
!j
v--..
RL'" 1.0 kn
~+1.2
o
2:
7
i-I
VI...
'IV
g
l.OL,-
RIL =
-0.4
-15
-10
-5.0
~+O.B
r-GAIN 1
+10
+15
+25
+30
-10
-5.0
+5.0
+1.6
GAIN 2)
RL=1.0kn-
E
w 160
JV-- r-....
)
~
+75 0 C
~
40
c;
-0.4
-15
-10
-5.0
+5.0
t,
+10
+15
+20
+25
+30
o
o
+35
............
GAIN 2
......""
ffi -to
o
t;:
~
~
if
-20
-25
-5 0
~
(
o
I
I
10
20
4.0
V
40
30
50
60
70
80
~ t-....
",
15 0
t;:
GAIN 3
~ -200
\
w
~-25 0
........
.......
.\ 'J,
1\' G~INII
-30 0
GAIN 1
-35 0
2.0
./
/'
-10 0
e-
~
""" ""
-15
w
+35
./
........
~
+30
FIGURE 18 - PHASE SHIFT versus FREQUENCY
~
~
+25
OVERDRIVE RECOVERY TIME Insl
TIME (ns)
FIGURE 17 - PHASE SHI FT versus FREQUENCY
-5.0
V
80
'"
I
i1250CI
.f
0
~
::::::::'+250C
/'
120
>
'tr/ ...........
~
~
0
I//If,.V
>
~ +0. 4
+20
V
GAIN 2
:."''"
71/,
olc
~ +0.8
+15
200
;;:
TA - -55~C_
;o
+10
FIGURE 16 - DIFFERENTIAL OVERDRIVE
RECOVERY TIME
FIGURE 15 - PULSE RESPONSE versus TEMPERATURE
2:
r--
t, TIME (ns)
t, TIME (ns)
~ +1.2
±6.0V_
±3.0V
y
Q
-0.4
-15
+35
\
IV
g
+20
\
'rlf
II
/
>
~+O.4
g
+5.0
±8.0Iv_
:.o
.J/
0
f--~CCNEEI
w
6.0
8.0
10
1.0
10
100
t, FREOUENCY IMHz)
t, FREQUENCY IMHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-157
1.0 k
MC1733, MC1733C
TYPICAL CHARACTERISTICS (Continued)
!VCC = +6.0 Vdc, vEE
= -6.0 Vdc, T A = +250 C unless otherwise noted.)
FIGURE 20 - INPUT NOISE VOLTAGE
FIGURE 19 - INPUT RESISTANCE ..r .... TEMPERATURE
II
70
0
r--GAIN 2
0
./
0
-
~
>"
.5
./
/'
0
/'
./
0
./
./
0
./
./
10
BWG::~;Jz
60
50
'"
~
40
~
30
<5
'"
~
20
:':
10
'/
1/
I---
o
o
+20
-20
-60
+60
+140
+100
10
1.0
100
1.0k
10k
SOURCE RESISTANCE (n)
TA, AMBIENTTEMPERATURE {DC I
FIGURE 22 - OUTPUT VOLTAGE SWING versus
LOAD RESISTANCE
FIGURE 21 - OUTPUT VOLTAGE SWING and
SINK CURRENT ve.... s SUPPLY VOLTAGE
8.0
7.0
~ 6.0
;::.
0
L-
G'- k::::;
-~\l\.1~
~~~'-111
0
OF-
l-::::
~
5.0
~
4. 0
~
3.0
~
t:- V
>
L---::: b::::: V
~
2.0
g
1.0
o
3.0
4.0
1/
>-
5.0
6.0
7.0
/'
o
8.0
10
100
VCC. SUPPLY VOLTAGE {VOLTSI
7.0
~ 100
o
90
i5
80
~
~
5.0
'"'"
4.0
0
3.0
~
2.0
6
>
1.0
S
;::.
t;
~
~
'"~
>
~
0
1.0
'"
is
~
i5
,.
,.
GIArNI2
.......
70
.......... 1--.
60
'"
50
S
~
~
10
100
10k
FIGURE 24 - COMMON-MODE REJECTION RATIO
FIGURE 23 - OUTPUT VOLTAGE SWING versus FREQUENCY
6.0
1.0 k
RL LOAD RESISTANCE (n)
1.0 k
40
30
10 k
100k
t. FREQUENCY {MHzl
1.0M
t, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-158
10M
100M
MC1733, MC1733C
APPLICATIONS INFORMATION
FIGURE 26 - OSCILLATOR FREQUENCY FOR
VARIOUS CAPACITOR VALUES
FIGURE 25 - VOLTAGE CONTROLLED OSCILLATOR
II
.,
10
Vee
e
R2
10 6
I'-
10 5
i'>--<>---<.....--<> Output
1k.u
101 610 "
Rl
10
Control
Voltage
Ve
1
By cha.lging the voltage Vc the gain will
vary over a range of 10 to 400. This will
give a frequency variation about the value
set by the capacitor and shown in Figure 26.
100
~
t-<'
>-0
-=-
.J~
i'-
"-
Vee
~8lB
e
OUTPUT
[\
VEE
10 k
100 k
1M
10 M
FREQUENCY (H,I
sign. For purposes of comparison, the M LM301 has
slightly less than a 40 dB open-loop gain at 100 kHz; the
MC1741, a compensated op-amp, has approximately 20 dB
open loopgainat 100 kHz; the MC1733 has approximately
33 dB of gain out to 100 MHz (depending on gain option
and loading).
There are a number of ways to implement the pea~
detector function. However, the simplest and most widely
used method is a passive differentiator that generates "zerocrossings" for each of the data peaks in the Read signal.
The actual circuitry used to differentiate the Read signal varies from a differential LC type in disc systems to a
simple RC type in reel and cassette systems. Either type,
of course, attenuates the signal by an amount depending
on the circuit used and system specifications. A good
approximation of attenuation using the RC type is 20 d8.
Thus, the 2 V signal going into the differentiator is reduced
to 200 mV.
The next block in Figure 27 to be discussed is the
zero-crossing detector. In most cases detection of the zerocrossings is combined with the limiter. These functions
serve to generate a TTL compatible pulse waveform with
"edges" corresponding to zero-crossings. For low transfer
rates, the circuit often used consists of an operational
amplifier with series or shunt limiting. For higher transfer
rates (greater than lOOK B/S) comparators are used.
The method described above is often modified to include threshold sensing. I n Figure 28, the function called
"double-ended, limit-detector" enables the output NAND
gate when either the negative or positive data peaks of the
Read signal exceed a predetermined threshold. This function can be implemented in either of two ways. One
method first rectifies the signal before it is applied to a
comparator with a set threshold. The other method utilizes
two comparators, one comparator for positive-going peaks
and the other for negative-going peaks. These comparator
outputs are then combined in the output logic gates.
TAPE,DRUM OR DISC MEMORY READ AMPLIFIERS
The first of several methods to be discussed is shown in
Figure 27. This block diagram describes a simple Read circuit with no threshold circuitry. Each block represents a
basic function that must be performed by the Read circuit.
The first block, referred to as "amplfiication", increases
the level of the signal available from the Read head to a
level adequate to drive the peak detector. Obviously, these
signal levels will vary depending on factors such as tape
speed, whether the system used is disc or tape, and the
type of head and the circuitry used. For a representative
tape system, levels of 7 to 25 mV for the signal from the
Read head and 2 V for the signal to the peak detector are
typical. These signal levels are "peak-to-peak" unless
otherwise specified. On the basis of the signal levels mentioned above, the overall amplification required is 38 to
49 dB.
How the overall gain requirement is implemented will
depend somewhat on the system used. For instance, a
tape cassette system with variable tape speed may utilize
a first stage for gain and a second stage primarily for gain
control. Thus, a typical circuit would utilize 35 dB in the
first stage and 10 to 15 dB in the second stage.
Devices suitable for use as amplifiers fall into one of
two categories, operational amplifiers or wideband video
amplifiers. Lower speed equipment with low transfer rates
commonly uses low cost operational amplifiers. Examples
ofthese are the MC1741, MC1458, MC1709, and MLM301.
Equipment requiring higher transfer rates, such as disc
systems normally use wideband amplifiers such as the
MC1733. The actual cross-over point where wideband
amplifiers are used exclusively varies with equipment deFIGURE 27 - TYPICAL READ CIRCUIT (METHOD 11
Output
MOTOROLA LINEAR/INTERFACE DEVICES
2-159
II
MC1733, MC1733C
APPLICATIONS INFORMATION (continued)
FIGURE 28 - READ CIRCUIT (METHOD 2)
Another common technique is shown in Figure 29.
The branch labeled rectifiers, peak detector, etc., provides
a clock transition of the 0 flip-flop that corresponds to
the peak of both the positive and negative-going data
peaks. This branch may include threshold circuitry prior to
the peak detector. The detector in the lower path detects
whether the signal peaks are positive or negative and feeds
this data to the flip-flop. This detector can be implemented
using a comparator with pre-set threshold.
may be implemented with two comparators and two
passive differentiators.
Each of the methods shown offer certain intrinsic advantages or disadvantages. The overall decision as to which
method to use however often involves other important
considerations. These cou Id include cost and system requirements or circuitry other than simply the Read circuitry. For instance, if cost is the predominate overall
factor, then approach one may be the only feasible
alternative.
Method four was included as a design example because
it illustrates several unique advantages. First, it uses
threshold sensing to reduce noise peak errors. Second, it
may be implemented using only integrated circuits. Third,
it offers separate, direct threshold sensing for both positive and negative peaks.
FIGURE 29 - READ CIRCUIT (METHOD 3)
FIGURE 30 - READ CIRCUIT (Method 4)
Output
The technique shown in Figure 30 uses separate circuits with threshold provisions for both negative and
positive peaks. The peak detectors and threshold detectors
MOTOROLA LINEAR/INTERFACE DEVICES
2-160
ORDERING INFORMATION
Temperature
Device
MC1741CD
MC1741CG
MC1741CPl
MC1741CU
MC1741G
MC1741U
Range
Alternate
LM741CH, "A741HC
LM741CN, "A741TC
Package
MC1741
MC1741C
50-8
O"C to +70"C
O"C to +70"C
O"C to +70"C
O"C to +70"C
- 55"C to + 125"C
- 55"C to + 125"C
Metal Can
Plastic DIP
Ceramic DIP
Metal Can
Ceramic DIP
INTERNALLY COMPENSATED, HIGH PERFORMANCE
OPERATIONAL AMPLIFIERS
II
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
, , designed for use asa summing amplifier, integrator, or amplifier with
operating characteristics as a function of the external feedback
components.
•
No Frequency Compensation Required
•
•
•
•
Short-Circu it Protection
Offset Voltage Null Capability
Wide Common-Mode and Differential Voltage Ranges
Low-Power Consumption
•
No Latch Up
GSUFFIX
METAL PACKAGE
CASE 601-04
Ne
OfhetNU1@',vee
lnvt Input,
Noninvt Input
5
J
Output
,Offset Null
•
VEE
(Top View)
MAXIMUM RATINGS (TA = + 25°C unless otherwise noted)
Rating
Symbol
MC1741C
I
MC1741
Unit
VCC
VEE
+18
-18
1
+22
-22
Vdc
Vdc
Power Supply Voltage
Input Differential Voltage
VID
Input Common Mode Voltage (Note 1)
VICM
Output Short Circuit Duration (Note 2)
ts
Operating Ambient Temperature Range
TA
Storage Temperature Range
Metal and Ceramic Packages
Plastic Packages
±30
Volts
±15
Volts
•
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
USUFFIX
CERAMIC PACKAGE
CASE 693-02
~~
"~I
8
Continuous
o to
+701-55 to +125
1
°c
°c
Tstg
8
-65 to + 150
-55 to +125
Note 1. For supply voltages less than +15 V, the absolute maximum input voltage is equal to
the supply voltage.
Note 2. Supply voltage equal to or less than 15 V.
•
13'
_ 1
Offset Null
tnvt Input
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
1"
I
Noninvt Input , .
5
VEE'
EQUIVALENT CIRCUIT SCHEMATIC
25
OUTPUT
50
OFFSET
NULL
0--+-+-----;
MOTOROLA LINEAR/INTERFACE DEVICES
2-161
Output
; Offset Null
(Top View)
r-~________~~__~__________~~__________r-~VCC
Ne
Vee
MC1741, MC1741C
ELECTRICAL CHARACTERISTICS (Vee
=
+15 V, VEE
=
-15 V, TA
= 25"e unless otherwise
noted).
MC1741
Characteristic
Svmbol
Input Offset Voltage
V,O
MC1741C
Typ
Max
Min
Typ
Max
Unit
-
1.0
5.0
-
2.0
6.0
mV
-
20
200
nA
80
500
nA
0.3
2.0
M,Q
-
-
±.15
mV
Min
IRS';;;lOk)
I nput Offset Current
'10
200
liB
-
20
Input Bias Current
80
500
ri
0.3
2.0
-
Input Resistance
-
1.4
Offset Voltage Adjustment Range
V'OR
-
±.15
Common Mode Input Voltage Range
V'CR
Av
±.12
±.13
50
200
Input Capacitance
Ci
Large Signal Voltage Gain
1.4
pF
±.12
±.13
-
20
200
-
VlmV
V
IVa" ±10 v. RL ;;;'2.0 k)
Output Resistance
ro
CMRR
Common Mode Rejection Ratio
,Q
--
75
-
75
70
90
-
70
90
-
dB
30
150
-
30
150
f.1V N
IRS';;;lO kl
Supply Voltage Rejection Ratio
PSRR
IRS';;; 10 kl
Output Voltage Swing
IRL;;;'10 kl
IRL;;;'2 kl
Va
Output Short-Circuit Current
'os
Supply Current
'D
Power Consumption
Pc
Transient Response (Unity Gain - Non-Inverting)
IV, "20 mY. RL:> 2 k. CL" 100 pFI Rise Time
IV, "20 mY. RL;;' 2 k. CL" 100 pFI Overshoot
IV," 10 V. RL;;.2k.CL"100pFI Slew Rate
ELECTRICAL CHARACTERISTICS (Vee
=
+ 15 V. VEE
Characteristic
±13
-
20
-
1.7
2.8
50
85
0.3
15
0.5
-
.-
_.
-
-15 V, TA
Symbol
Input Offset Voltage
±.14
'TLH
os
SR
=
_.
±'12
,,10
-
= Tlow to Thigh
Min
V'O
V
±.12
±14
-.
±.10
±.13
20
1.7
-
mA
2.8
rnA
50
85
mW
0.3
15
0.5
-
ps
-
Vips
-
-
%
unless otherwise noted).
MC1741
Typ
Max
Min
MC1741C
Typ
Max
Unit
1.0
6.0
-
-
7.5
mV
7.0
85
200
500
_.
-
-
-
-
-.
300
30
300
500
1500
-
-
IRS';;; 10 k,Q)
Input Offset Current
nA
"D
ITA" 1250 CI
ITA" _55°C I
IT A " OoC to + 70 0 CI
~.
_.
Input 8 ias Current
I'B
_.
ITA" 1250 CI
ITA" _55 0 CI
IT A" OoC to +70o CI
-
Common Mode Input Voltage Range
V'CR
_.
nA
-
-
.-
±12
0-.13
_.
10
90
CMRR
Common Mode Rejection Ratio
-
-
-
-
-
800
-
_.
V
--
-
-
dB
30
150
-
-
-
IlVN
±.14
±.13
-
.-
-
-
±10
-
-
15
-
1.5
2.0
2.5
3.3
45
60
75
100
-
-
IRS';;; 10 kl
PSRR
Supply Voltage Rejection Ratio
IRS';;; 10 kl
Output Voltage Swing
V
Va
IRL;;;'lOkl
IRL;;;'2 kl
±.12
±.10
Large Signal Voltage Gain
25
Av
±.13
_.
VlmV
IRL;;;'2k. V out "±.10VI
Supply Currents
mA
'D
-
IT A" 1250 CI
ITA" _55 0 CI
~.
Pc
Power Consumption (T A - +125 0 C)
ITA" -55°C I
-
'Thigh" 125°C for MC1741 and 70°C for MC1741C
T,ow "-55°C for MC1741 and OoC for MC1741C
MOTOROLA LINEAR/INTERFACE DEVICES
2-162
_.
-
mW
MC1741, MC1741C
100
FIGURE 1 - BURST NOISE v...u. SOURCE RESISTANCE
;;1000'.!I.mn~~.
S
~
BW
FIGURE 2 - RMS NOISEv...u. SOURCE RESISTANCE
1.0 Hz to 1.0 kHz
11111
'>
.3
"ow ,'1.iiH~io i.o
]1 0
3
II
!100'1.111111
~ R
~
0
.;110_. . . .
~.~ojj=ttE~,~00;tti±t~1~.0~kttjj~n,0~k±±=t~,~00tkjj=t±E1.0~M.
O.
100
10
10
14.
12.
1000
l.M
0
0
0
0\
0 "
0
0
010
1111111
AV llO. RS =
100 kl!
1\
100
10
1.0
1
lOOk
FIGURE 4 - SPECTRAL NOISE OENSITY
FIGURE 3 - OUTPUT NOISE v... u. SOURCE RESISTANCE
AV •
10 k
1.0 k
RS. SOURCE RESISTANCE IOHMS)
RS. SOURCE RESISTANCE IOHMS)
...........
2.
0.0110
100
1.0 k
10
lOOk
k
1.0M
100
1.0
10
k
k
100
k
f. FREQUENCY 1Hz)
RS.SOURCE RESISTANCE (OHMS)
FIGURE 5 - BURST NOISE TEST CIRCUIT
100 k
Positive
Threshold
To Pass/Fail
100 k
Indicator
, k
100 k
Operational Amplifier
Under Test
Low Pass
Filter
1.0 Hz to 1 kHz
Negative
Threshold
Voltage
Unlike conventional peak reading or RMS meters, this system was
The test time employed is 10 seconds and the 20 J,J.V peak
especially designed to provide the quick response time essential to
burst (popcorn) noise testing.
limit refers to the operational amplifier input thus eliminating
errors in the closed-loop gain factor of the operational amplifier
under test.
MOTOROLA LINEAR/INTERFACE DEVICES
2-163
II
MC1741, MC1741C
TYPICAL CHARACTERISTICS
(Vee = + 15 Vdc, VEe'" -15 Vdc. T A - + 25°C unless otherWise noted)
FIGURE 6 -POWER BANDWIDTH
(LARGE SIGNAL SWING versus FREOUENCY)
FIGURE 7 - OPEN LOOP FREQUENCY RESPONSE
+120
+100
:':
~
~~
~
10r--r~~~---r~~H*--~+4~HfflI\r-+-++~+H
~ +60
~ 12r--+-r++Ht~-1-+41+H*---r-rttH~~rr-~~~
r----
~
-<
~ +4 0
>
r
(VOLTAGE FOLLOWER)
11111 TI III' 1tf----+-HttHft-~\r++++H-H
4.0 t--++++t[
++[H++++I----+[+++++flI--+---+'Id-I+J+j
~ 8.0
~
«
1\
16r--+-r++H+~-1-+14+H*---r-~+H~~\~-+~+H~
a
+8 0
z
~
~ +-2 0
~
-<
[-Ittt-[[[[[
100
10
1.0 k
,10
1.0
lOOk
10 k
t, FREQUENCY 1Hz)
V
~ 9.0
,
I
----
..-
,.
!; 7.0
3,
1,
=
-1 5
-1 4
-1 3
-1 1
>15 V SUPPLIES
-'I
+
14'
./
?-"
a
a .&Y
c
100
<6 IV
' I
I
I
500 700 1.0 k
100
I
5,0 k 7.0 k 10 k
1,0 k
I
~ -1 0
~ -9, 0
;; -8.0
;:: -7. 0
~ -6. 0
f2: -5. 0
/'
0-4.0
> -3. 0
-1, 0 .R'
-1. 0
100
100
.>!1V
/
±9V
C/
HV
I
I
500 700 1.0 k
a'='
1 k
100J,lF
10 k
VCC
8 f - - +11 V
4
> 1
~ 10
~
1,0 k
+18 V
200
+15 V
8.0 r - - +12
ci 6.0
> 4.0
k~
v
200 k
+9.0 v
1,0 r - - +6.0 v
-+5,0 V
a0 1.0 1,0
3,0
4,0
5,0
6,0
7,0
5,0 k 7,0 k 10 k
FIGURE 11 - SINGLE SUPPLY INVERTING AMPLIFIER
1
: +30 V Supply
1
:!:: 14r-- +27 V
2: 1
+24 v
'"z a
w
I
RL. LOAO RESISTANCE (OHMS)
FIGURE 10 - OUTPUT VOLTAGE SWING versus
LOAD RESISTANCE (Single Supply Operationl
~
II
I
I
RL. LOAO RESISTANCE (OHMS)
;j!1 6
10M
>15 V SUPPLIES
>0.. -1 1
>9 V
~ 4. a
0.
1.0M
FIGURE 9 -NEGATIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
>11 V
> 8,0
~ ::~
lOOk
10k
t, FREOUENCY (Hz)
FIGURE 8 - POSITIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
15
14
13
I?- 12
1
~ 10
1.0 k
100
'0
~
8,0
9,0
10
RL. LOAO RESISTANCE (krt)
MOTOROLA LINEAR/INTERFACE DEVICES
2-164
MC1741
MC1741. MC1741C
FIGURE 12 -
I
I
II
NONINVERTING PULSE RESPONSE
'\.
I
~UTPUT
'\
\
I[PUT
FIGURE 13 - TRANSIENT REPONSE TEST CIRCUIT
.......- ..
>--O~~-
10 s
9S
~
90
z
w
"'"'
:; 8s
o
>
(Output)
FIGURE 14 - OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
.__ .
10 0
~
To Scope
.,....,
.,...., -
~
./'
./
V
~ 80
s
70
o
1.0
4.0
6.0
8.0
10
11
14
16
Vee. IVEE!. SUPPLY VOLTAGES (VOLTS)
18
10
MOTOROLA LINEAR/INTERFACE DEVICES
2-165
II
MC1741S
MC1741SC
ORDERING INFORMATION
Device
Temperature Range
Package
-55"<: 10 + 125"<:
O"C to + 70'C
Motal Can
SO-8
O"CIO +70°C
O"C 10 + 70'C
Plastic DIP
MCt741SG
MC1741SCD
MC1741SCG
MC1741SCPl
Metal Can
HIGH SLEW RATE, INTERNALLY COMPENSATED
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC1741 S/MC1741 SC is functionally equivalent, pin compatible, and possesses the same ease of use as the popular MC1741
circuit, yet offers 20 ti mes higher slew rate and power bandwidth.
This device is ideally suited for D-to-A converters due to its fast
settling time and high slew rate.
•
High Slew Rate - 10 V/l1s Guaranteed Minimum (for unity gain only)
•
No Frequency Compensation Required
•
Short-Circuit Protection
•
Offset Voltage Null Capability
•
Wide Common-Mode and Differential Voltage Ranges
•
Low Power Consumption
•
No Latch-Up
G SUFFIX
METAL PACKAGE
CASE 601-04
(Top View)
TYPICAL APPLICATION OF OUTPUT CURRENT TO
VOLTAGE TRANSFORMATION FOR A D-TO-A CONVERTER
VCC,.,5.0V
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
V re f"'20Vdc
A1"'A2~1.0kH
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
RO '" 5.0 kU
13
Rl
f--"'o--~"V'--f--"" v ref
MS6
NULL~' NC
A2
A3
A4
15
R2
OFFSET
INVT INPUT
2
NONINVT INPUT
~
VEe
A5
7
Vee
6
OUTPUT
5
OFFSET NULL
(Top View)
A6
A7
LSB
AS
Theoretical Vo
Vref
[A 1 A2 A3 A4 A5 A6 A7 A8]
Vo = RT IRO ) 2' +4' +8' +16 +"32 +64 \28 +256
C'
Pins not shown are not connected.
Adjust Vref. R1 or R0 so that Vo with all digital inputs at high l.v.1
is .qual to 9.961 volts.
Settling time to within 1/2 LSB 1±19.5 mV) is approximately 4.0 p.S from the time that all bits are switched.
*The value of C may be selected to minimize overshoot
and ringing Ie ~ 150 pF).
2V
[1-+-+-+-+-+-+-+-=10V
1 1 1 1 1
1
1]
[255]
vo=-15k)
=9.961V
256
1k
2 4 8 16 32 64 128 256
MC1741S LARGE-SIGNAL TRANSIENT RESPONSE
STANDARD MC1741 versus MC1741S RESPONSE COMPARISON
MOTOROLA LINEAR/INTERFACE DEVICES
2-166
MC1741S, MC1741SC
CIRCUIT SCHEMATIC
II
MAXIMUM RATINGS IT A = i250C unless otherwise noted I
Value
Rating
Symbol
MC1741SC
VCC
VEE
+18
-18
Power Supply Voltage
Differential Input Signal Voltage
Common-Mode Input Voltage Swing (See Note 1)
Output Short-Circuit Duration (See Note 2)
Power Dissipation (Package Limitation)
I
MC1741S
Unit
+22
-22
Vdc
I
VID
±30
Volts
VICR
±15
Volts
ts
Continuous
PD
Metal Package
Derate above T A = +250 C
680
4.6
mW
mW/oC
Plastic Dual In-Line Package
Derate above T A = +250 C
625
5.0
mW/oC
Operating Ambient Temperature Range
TA
Storage Temperature Range
Tst9
o to +75
I -55 to +125
°c
°c
-65 to +150
-55 to +125
Metal Package
Plastic Package
Note 1.
Note 2.
mW
For supply voltages les5 than ±15 Vdc, the absolute maximum input voltage is equal to the supply voltage.
Supply voltage equal to or tess than 15 Vdc.
FIGURE 2 -INPUT BIAS CURRENT versus TEMPERATURE
FIGURE 1 - OFFSET ADJUST CIRCUIT
Vee
1
40 0
~ 35 0
~
=>
300
..........
~
u
OUTPUT
INPUTS
:e~i~~1~ .>--0---_
;'i 25 0
~
........
a;
~ 20 0
r-........
~
z
w
15 0
to
~
>
«
-5. 0
0
'"
~
o
~
~
o
"
~
.~
J
-1 0
-1 5
10
100
1.0 k
10k
100 k
II
FIGURE 4 - OPEN-LOOP FREQUENCY RESPONSE
1.0 M
-20
1.0
10
100
""""
loOk
10k
f. FREQUENCY (Hz)
f. FREQUENCY (Hz)
lOOk
FIGURE 6 - OUTPUT NOISE versus
SOURCE RESISTANCE
FIGURE 5 - NOISE versus FREQUENCY
140,---.,.-,,-m"'-r---l---n-rrrrr--'---"'-TTlTTTT--'-TTTTTm
~ 1201-+++tH1rH--++I+++Hl--H+!~+-++++++jjj
~
'"
1.0 M
10 M
3, 5
I
3, 0
I
Av' ~,OOO
2, 5
V
2, 0
"
,/'
5
...-
1. 0
Ar \.'I00j,
~~v-l
0, 5
,--
0
100
10 k
1.0 k
lOOk
RS.SOURCE RESISTANCE (OHMS)
FIGURE 7 - SMALL·SIGNAL TRANSIENT
,
RESPONSE DEFINITIONS
FIGURE 8 - SMALL-5IGNAL TRANSIENT
RESPONSE TEST CIRCUIT
+15V
01pF
Vee
50"
1
Piosnot shown ale not connected.
OUTPUT
MC1741S
INPUT
,--
OUTPUT
MOTOROLA LINEAR/INTERFACE DEVICES
2-169
MC1741SC
MC1741S, MC1741SC
TYPICAL CHARACTERISTICS
(VCC = +15 Vdc, VEE = -15 Vdc, TA = +250 C unless otherwise noted.1
II
FIGURE 9 - POWER CONSUMPTION versus POWER
SUPPLY VOLTAGES
-+---r--~--r--~----
!
60[---+---+---+--+--- t---- -
z
o
50f----/------j-
ii:
~
-+--j--j---j
.-r--r--+--+---+----~
--
V
40f------f-----t---
__
VVV--r-- . -------
o
oc
30f--------- ---
;t:;~
I /' ------t----t-20 f----+-+V~10 "----1---4-
--- r--
--
0~O--L-'5~.0~~--710'-~--'1?5--L--2~0~~-~25
Vee and iVEEI, SUPPL Y VOL TAG E (Va LTS)
SETTLING TIME
In order to properly utilize the high slew rate and fast
settling time of an operational amplifier, a number of
system considerations must be observed. Capacitance at
the summing node and at the amplifier output must be
minimal and circuit board layout should be consistent
with common high-frequency considerations. Both power
supply connections should be adequately bypassed as
close as possible to the device pins. In bypassing, both
low and high-frequency components should be considered to avoid the possibility of excessive ringing. In
order to achieve optimum damping, the selection of a
capacitor in parallel with the feedback resistor may be
necessary. A value too small could result in excessive
ringing while a value too large will degrade slew rate and
settling time.
SETTLING TIME MEASUREMENT
In order to accurately measure the settling time of an
operational amplifier, it is suggested that the "false"
summing junction approach be taken as shown in
Figure 11. This is necessary since it is difficult to determine when the waveform at the output of the operational amplifier settles to within 0.1 % of it's final
value. Because the output and input voltages are effectively su btracted from each other at the amplifier
inverting input, this seems like an ideal node for the
FIGURE 10 - LARGE-SIGNAL TRANSIENT WAVEFORMS
~
measurement. However, the probe capacitance at this
critical node can greatly affect the accuracy of the
actual measurement.
The solution to these problems is the creation of a
second or "false" summing node. The addition of two
diodes at this node clamps the error voltage to limit the
voltage excursion to the oscilloscope. Because of the
voltage divider effect, only one-half of the actual error
appears at this node. For extremely critical measurements, the capacitance of the diodes and the oscilloscope,
and the settling time of the oscilloscope must be considered. The expression
90%
OUTPUT
FIGURE 11 - SETTLING TIME AND SLEW RATE TEST CIRCUIT
tsetlg
=.J x 2 + y2 + z2
can be used to determine the actual amplifier settling
time, where
tsetlg = observed settling time
x = amplifier settling time Ito be determined)
y = false summing junction settling time
z = oscilloscope settling time
It should be remembered that to settle within ±0.1 %
requires 7RC time constants.
The ±0.1 % factor was chosen for the MC1741S
settling time as it is compatible with the ±1/2 LSB
accuracy of the MC1508L8 digital-to-analog converter.
This D-to-A converter features ±0.19% maximum error.
MOTOROLA LINEAR/INTERFACE DEVICES
2-170
MC1741S, MC1741SC
II
TYPICAL APPLICATION
FIGURE 12 - WAVEFORM AT FALSE SUMMING NOOE
II
II I'
_ - t
=21111
FIGURE 14 - 12.5-WATT WIOEBANO POWER AMPLIFIER
+15V
I
II
U
111 1
If . ,
u'
_.1--1111
1.0 "siDIV
FIGURE 13 - EXPANOEO WAVEFORM AT
FALSE SUMMING NODE
>
e>
E
'"
0.1%
ERROR
BAND
DelJllers 12.5Watts,nlO 4.0 ohmsw,lh less than l%THDto 101lkH,
P,nsilotshownarellol
wnne~led.
'Bias current adlustment lOelimioate Crossover D,Slorlion.
"EPOKV to IIOwer tranSistor heat smk or case tor mBKimum Thermal Feedbatk
MOTOROLA LINEAR/INTERFACE DEVICES
2-171
RL
II
ORDERING INFORMATION
Device
MC1747G
MC1747L
MC1747CD
MC1747CG
MC1747CL
MC1747CP2
Temperature Range
Package
to + 125'C
~ 55'C to + 125'C
D'C to + 7D'C
D'C to + 7D'C
Metal Can
Ceramic DIP
SO-14
Metal Can
Ceramic DIP
Plastic DIP
~ 55'C
aoc to + 70 0 e
D'C to + 7D'C
MC1747
MC1747C
(DUAL MC1741)
INTERNALLY COMPENSATED,
HIGH PERFORMANCE
OPERATIONAL AMPLIFIER
(DUAL MC1741)
DUAL
OPERATIONAL AMPLIFIER
· .. designed for use as summing amplifiers, integrators, or amplifiers with operating characteristics as a function of the external
feedback components. The MC1747L and MC1747CL are functionally and electrically equivalent to the p.,A747 and p.,A747C
respectively.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
G SUFFIX
• No Frequency Compensation Required
METAL PACKAGE
CASE 603-04
• Short-Circuit Protection
• Wide Common-Mode and Differential Voltage Ranges
• Low-Power Consumption
N.C.
• No Latch Up
• Offset Voltage Null Capability
FIGURE 1 - HIGH·IMPEDANCE, HIGH·GAIN
INVERTING AMPLIFIER
Vee
Vee
l
G1
1-'F
EO· -100Em
li2
MC1747,C
DSUFFIX
~
PLASTIC PACKAGE 14 ~_",,:,CASE 751A-02
SO-14
'.1
MC1747,C
lOOk
Terml~als
not shown
ar~
not c(lnnected
1
FIGURE 2 - CIRCUIT SCHEMATIC
Vee
P2 SUFFIX
L SUFFIX
PLASTIC PACKAGE
CASE 646-06
CERAMIC PACKAGE
CASE 632-08
25
OUTPUT
Non Inv
Input
Offset
AdjA
50
OFFSET
NULL
0--+-+---4
Offset
Adj. B
Non Inv
Input
Offset
Circuit diagrams utilizing Motorola products are included as a means of illustrating typical
semiconductor applications; consequentlv. complete information sufficient for construction
purposes is not necessarily given. The information has been carefully checked and is believed
to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore,
such information does not convey to the purchaser of the semiconductor devices described
any license under the patent right of Motorola Inc. or others.
AdjB
VCCA and VCCB are not connected internally.
MOTOROLA LINEAR/INTERFACE DEVICES
2-172
MC1747, MC1747C
MAXIMUM RATINGS ITA'" +2SoC unless otherwise noted.1
Rating
Power Supply Voltages
Symbol
Mel747
VCC
+22
VEE
-22
I
MCI747C
Unit
I
+IB
Vdc
-IB
Differential I nput Signal Voltage
CD
V,O
+30
Volts
Common-Mode Input Swing Voltage
~
V'CR
.±. 15
Volts
'OS
Continuous
Output Short-Circuit Duration
.± 0.5
Voltage (Measurement between Offset Null and VEE'
Operating Ambient Temperature Range
TA
-55 to +125
Storage Temperature Range
T stg
-65 to +150
Junction Temperature
Ceramic and Metal Package
Plastic Package
°c
°c
°c
Oto + 70
I -65 to +150
TJ
175
150
ELECTRICAL CHARACTERISTICS
(Vee'" +15 Vdc, VeE'" -15 Vdc, T A=: +2SoC unless otherwise noted.)
Characteristics
Symbol
Input Bias Current
Min
MC1747
TV.
Ma.
Min
MCI747C
TV.
Ma.
<:!>
(3)
Input Offset Current
T A'" +2SoC
80
30
300
500
500
1500
80
30
30
500
BOO
BOO
20
7.0
B5
200
200
500
20
7.0
7.0
200
300
300
1.0
1.0
5.0
6.0
1.0
1.0
6.0
7.5
nAde
"0
TA '" Thigh
TA"'Tlow
Input Offset Voltage (RS ~ 10 knl
T A"" +250 C
V,O
mVdc
T A"" Tlow to Thigh
.± 15
Offset Voltage Adjustment Range
Differential Input Impedance (Open-loop, f "" 20 Hzl
Parallel Input Resistance
Parallel Input Capacitance
Common-Mode Input Voltage Swing
';
C;
± 15
0.3
2.0
1.4
0.3
2.0
1.4
± 12
± 13
± 12
:t 13
70
90
70
90
mV
Mn
pF
Volts
VICR
Tlow ~ T A ~ Thigh
Common-Mode Rejection Ratio (RS
10knl
CMRR
Tlow ~ T A ~ Thigh
Open-Loop Voltage Gain
TA '" +250 C
}
T _T
T.
(Vo " ±10 V, R l " 2.0 knl
A - low to hlWa
Transient Response (Unity Gain)
(Vin =: 20 mV, Al "" 2.0 kn, Cl ~ 100 pFI
Rise Time
Overshoot Percentage
Slew Rate (Unity Gainl
Output Impedance
Short-Circuit Output Current
dB
Volts
Avol
50.000
5.000
Power Supply Sensitivity (Tlow to Thighl
VEE"" Constant, RS =s;; 10 kfl
Vce" Constant, RS ~ 10 kn
Power Supply Current (each amplifierl
TA ==+250 e
25.000
15,000
200.000
0.3
5.0
0.3
5.0
~s
SR
0.5
0.5
V/lls
Zo
75
75
ohms
'OS
25
25
mAdc
120
120
%
dB
VOR
Vpk
± 12
± 14
± 12
:t
+ 10
+ 13
+ 10
+ 13
14
~VIV
PSS+
PSS-
30
30
150
150
30
30
150
150
1.7
2.0
1.5
2.B
3.3
2.5
1.7
2.0
2.0
2.8
3.3
3.3
50
60
45
85
100
75
50
60
60
85
100
100.
mAdc
'CC,'EE
TA ==Tlow
TA'Th;gh
DC Power Consumption (each amplifier)
TA =:: +250 e
TA ==Tlow
200.000
tPlH
Channel Separation
Output Voltage Swing (Tlow ~ T A ~ Thigh)
Rl == 10kn
AL =:: 2.0 kn
Unit
nAde
"B
TA '" +2SoC
TA' Th;gh
TA"'T/ow
I
II
Volu
Pc
TA"'Thigh
mW
G) For supply voltages of less than ± 15 V, the maximum differential input voltage is equal to ± (VCC + IVeel).
(2) For supply voltages of less than ±15 V, the maxImum input voltage is equal to the supply voltage (+VCC, -IVeel).
@Tlow : O"C for MC1747CL
-55°C for MC1747L
Thigh: + 70"C for MC1747CL
+ 125°C for MC1747L
MOTOROLA LINEAR/INTERFACE DEVICES
2-173
MC1747, MC1747C
FIGURE 3 - TYPICAL FREQUENCY·SHIFT KEYER TONE
GENERATOR TEST CIRCUIT
Vee
II
15 v
Vee
15V
6.2k
FIGURE 4 - TYPICAL FREQUENCY·SHIFT KEYER TONE GENERATOR
1k
--- -_. -_. --_.
r--+-+--+--+~.-.-
Terminals not shown are not connected.
0.5 ms/DlV.
TYPICAL CHARACTERISTICS
(Vee"" +15 Vdc, VEE'" -15 Vdc, T A "" +2SoC unless otherwise noted.)
FIGURE 5 OPEN·LOOP VOLTAGE GAIN
versus POWER-SUPPLY VOL TAGE
FIGURE 6 - OPEN·LOOP FREQUENCY RESPONSE
+120 , - - -
120
~ 115
z
«
110
W
t:I
105
~
100
'"
~
+100
v---:
~
o
g
..-
95
z
w
~
--
~
+80
~
z
~ +20
.t
90
~
"0
-l
85
o
3.0
6.0
9.0
15
12
I
-20
80
18
21
1.0
24
100
10
1.0k
~
FIGURE 7 - POWER BANOWIDTH
(LARGE SIGNAL SWING versus FREQUENCY)
'"
1.0M
100 k
10 k
t, FREQUENCY.lH,J
Vcc and VEE, POWER SUPPLY VOLTAGE (VOLTS)
10M
FIGURE 8 - POWER CONSUMPTION
versus POWER SUPPLY VOLTAGE
28.-'-",nnr--T'''TIT~-''-·rnTIIT--'-''nTm
100
70
~
20~-+~++t~~~-+~+H#-~c~~H+~--+-~~~
~ 16~-+~++~~~-+~+H#-~~~H+~1~\-+-~~~
~
121--
~ S.Or------>
I
(VOLTAGE FOLLOWER}
±15 VOLT SUPPLIES
50
;
40
~
30
" 20
8
/'
V
~
~
~ to
ftt---t-t---t-H1-ttt---I\-+-I+tttt
'_<.J -15_%Lit L. Lt '-! 1.~0'-k
4: 1'::.0--'-'-.J..ioW
I iu..i Ii",ii-:-:
,:
~
/
/
./'
Va" 0
r--
(Each amplifier)
~ 7.0
5.0
--'---'--W-LWO:'..k_i'::..J..
\.J..J..lloJJJ k
I
l
o
4.0
3.0
2.0
t, FREQUENCY (Hz}
10
18
6.0
14
VCC and VEE, POWER SUPPLY VOLTAGE (VOLTS}
MOTOROLA LINEAR/INTERFACE DEVICES
2-174
22
MC1747, MC1747C
TYPICAL CHARACTERISTICS (continuedi
(Vee = +15 Vdc, VEE = -15 Vdc, T A = +250 C unless otherwise
FIGURE 9 - OUTPUT VOLTAGE SWING
versus LOAO RESISTANCE
II
noted.)
FIGURE 10 - OUTPUT NOISE versus SOURCE RESISTANCE
28
24
~ 20
'"~
16
0
>
>=>
~
12
!;
80
6
>
40
100
200
500
1.0 k
2.0 k
5.0k
10k
Rl. LOAO RES1STANCE (OHMS)
RS, SOURCE RESISTANCE (OHMS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-175
II
ORDERING INFORMATION
Device
MC1748G
MC1748U
MC1748CG
MC1748CP1
MC1748CU
Package
Temperature Range
-55·C to
-55·C to
OOC to
OOC to
O·C to
+ 125·C
+ 1250C
+70OC
+70·C
+700C
MC1748
MC1748C
Metal Can
Ceramic DiP
Metal Can
Plastic DIP
Ceramic DIP
HIGH PERFORMANCE
OPERATIONAL AMPliFIER
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. designed for use as a summing amplifier. inte.grator. or amplifier
with operating characteristics as a function of the external feedback
components.
•
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
IMC1748C Only)
Noncompensated MC1741
• Single 30 pF Capacitor Compensation Required For Unity Gain
• Short·Circuit Protection
•
• Offset Voltage Null Capability
• Wide Common·Mode and Differential Voltage Ranges
•
Low·Power Consumption
•
No Latch Up
Balance
Inputs
FIGURE 1 - CIRCUIT SCHEMATIC
8
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
1
8 CompensBtion
1'
COMPENSATION
r-~--------~----~----------~----~~--~-Qvcc
7
GSUFFIX
METAL PACKAGE
CASE 601-04
"
Compensation
OUTPUT
50
50
L-~
____
~
__-4____
~~L--4
____
~
__________
VEE
~-Q4
TYPICAL COMPENSATION CIRCUITS
FIGURE 2 - OFFSET ADJUST AND
FREQUENCY COMPENSATION
FIGURE 3 - SINGLE·POLE COMPENSATION
FIGURE 4 - FEEDFORWARD COMPENSATION
C1
R1
RI
-VI
Va
R3
+VI
R1
vi
Va
R1 C,
C1;' R1 + R1
Cs'" 30 pF
MOTOROLA LINEAR/INTERFACE OEVICES
2-176
R3
150 pF
1
C1--211' f oR2
10 = 3.0 MHz
MC1748, MC1748C
MAXIMUM RATINGS (T A ~ +250 C unless otherwise noted)
Rating
Power Supply Voltage
Differential I nput Signal
Common-Mode Input SWing,CD
Output Short Circuit Duration
Symbol
MC1748
MC1748C
Unit
VCC
+22
+18
Vde
VEE
-22
-18
Vin
±30
Volts
VICR
±15
Volts
's
Continuous
Power Dissipation (Package Limitationl
Derate above T A +2SoC
PD
Operatmg Temperature Range
TA
-55 to +125
o to +70
T stg
-65 to +150
-65 to +150
680
4.6
=0
Storage Temperature Range
ELECTRICAL CHARACTERISTICS IVCC
II
mW
mW/oC
°c
°c
+15 Vdc, VEE'" -15 Vdc, T A ;:: +25 0 C unless otherwise noted-l
MC1748
Characteristics
Input Bias Current
Symbol
Min
Typ
Max
0.08
0.5
0.3
1.5
0.02
0.2
0.08
0.5
1.0
5.0
0.08
0.5
J.LAdc
T A'" Tlow to Thigh
Input Offset Voltage (RS
~
10 k H)
Unit
0.8
11101
TA '" +250 C
-i
Min
j..IAdc
@
Input Offset Current
T A'"
MC1748C
Max
liB
TA'" +2SoC
T A'" Tlow to Thigh
Typ
0.02
0.2
0.3
mVdc
IVIOI
25°C
1.0
6.0
T A'" Tlow to Thigh
6.0
7.5
Differential Input Impedance (Open-Loop, f - 20 Hz)
0.3
2.0
0.3
2.0
Parallel Input ReSistance
Rp
Parallel Input Capacitance
Cp
1.4
1.4
pF
Zjn
200
200
Megohms
Common-Mode Input Impedance (f
20HzI
Common-Mode Input Voltage Swing
VICR
±12
±13
±12
±13
Common-Mode Rejection Ratio (f -" 1 00 Hz)
CMRR
70
90
70
90
Open-Loop Voltage Gain, (V o = ± 10 V, RL = 2.0 k ohms)
Vpk
dB
V/V
Avol
TA = +2Soe
50,000
TA
25,000
==
Megohm
Tlow to Thigh
200,00
20,000
200,00
15,000
Step Response (Vin = 20mV,C c = 30pF, RL ==2kH, CL == 100pF)
'r
dVout/dt
0.3
5.0
0.8
Output Impedance (f = 20 Hz)
Zo
75
Short-Circuit Output Current
Ise
Output Voltage Swing (RL "" 10 k ohms)
Vo
Rise Time
Overshoot Percentage
Slew Rate
RL = 2 k ohms (T A'" Tlow to thigh)
0.3
5.0
25
"s
%
0.8
V/Jls
75
ohms
25
mAdc
±12
±14
±12
±14
Vpk
±10
±13
±10
±13
_V/V
Power Supply Sensitivity
VeE'" constant, Rs ~ 10 k ohms
Vec == constant, As "" 10 k ohms
Power Supply Current
S+
150
30
150
30
150
1.67
2.83
1.67
2.83
-
1.67
2.83
1.67
2.83
50
85
50
85
OOC for MC1748C
_55°C for MC1748
+70° for MC1748C
+1250 C for MC1748
MOTOROLA LINEAR/INTERFACE DEVICES
2-177
mAdc
mW
PD
MC174B :"
only'"
I-
~
I-
5
OL-__
~
o
__
~
__
~
__
~
~
__
~~~~~
15
20
VCC AND (-VEEI.SUPPLY VOLTAGES (VOLTS)
FIGURE 7 - MINIMUM VOLTAGE GAIN
FIGURE B - TYPICAL SUPPLY CURRENTS
100
,5
94
,0
BB
,5
-
~
z
'"w
'"
:;
'"
__
5,0
VCC BOd (-VEEI. SUPPLY VOLTAGE (VOLTS)
;(
••
4,0~+=+:=t~N~
-
MC174B
only
B2
0
>
,;
'"
i··-
,5)-- -
76
70
0
5,0
0
10
15
5,0
20
Vee AND (- VEE), SUPPLY VOLTAGE (VOLTS)
10
SINGLE,POLE COMPENSATION
'"~
+16 0
+140
315
+12 0
270~
w
'"
:;
'"
+8 0
~~·.;>o
c~
+60
"'-
V
>
.JOp /: " "
'-...
'"
GAIN
::;;;:;;::
0
,; +40
+2 0
1,0
.-/
10
100
~
35
""'-.,
.......... I'
i'-..
-20
:
1
1,0 k
10k
lOOk
I. FREQUENCY (Hz)
LOM
1-- -
~
25~
1
PHAS~
'"'
80~
2
-
SINGLE,PO :;'
~OMPENSA
TIO N
,
.±15
>
'"
z
~ +100
20
FIGURE 10 - LARGE-5IGNAL FREQUENCY RESPONSE
FIGURE 9 - OPEN-LOOP FREQUENCY RESPONSE
+IB0
~
15
Vee AND (- VEE), SUPPLY VOLTAGE (VOLTS)
±lO
..
,
1\
~ ~
90 -
;
4
<5
I
j
\
30p0
I
I :
1.0 M
lJ ''II
10M
MC1748, MC1748C
II
TYPICAL CHARACTERISTICS Icontinuedl
IVCC" +15 V, VEE" -15 V, TA" +2SOC unless otherwise noted.1
FIGURE 1.1 - VOLTAGE FOLLOWER PULSE RESPONSE
a
+8. a
FIGURE 12 - OPEN·LOOP FREQUENCY RESPONSE
+1
~
SINGLE·POLE COMPENSATION
~ +6. 0
o
'"~ +2. a
o
FEEOFORWARO COMPENSATION
+120
;: +4.
'"~
+140
I--
1\
\
-2 a
> ., 0 -
g5
> -6.0
a'
> -8.0
INPUT
r t:.-1
1.
~
V
t=.- '\.
.-
V
t---
~ +100
"
~
+80
'"~
+60
w
ciUTPUT '----
I
0
+40
+20 !----
..
_- c---.
20
10
30
40
50
60
70
80
10
10k
10 k
100
+1 0
FEEOFoRWARo COMPENSATION
~
0
:'i:
"
6
z
~
,1 2
1\
co
~
0
....>=>
,8. 0
-
gi
o
100 k
a
10M
'"
S
-+7
.-
t-
INPUT
~
-
a
~ +6.
-
lOOk
+8. a
o
t-
,
r--~
FIGURE 14 - INVERTER PULSE RESPQNSE
,1 B
>
'~-;,~
" ,---
t-
I, FREQUENCY IHzl
FIGURE 13 - LARGE·SIGNAL FREQUENCY RESPONSE
f---
PHASE L
~V
·20
90
I, TIME Ips)
....
....,~
--""-
--
f - - ._-
-10
i"---
"'r----.
>
............
~
-4. 0
,
("
I
II
II
--
1---
-6. 0
a'
0-8. a
>
·1
10M
a
1.0
2.0
t. FREQUENCY IHl)
3.0
4.0
t, TIME I#s)
MOTOROLA LINEAR/INTERFACE DEVICES
2-179
5.0
6.0
7.0
8.0
9.0
II
®
MC1776
MC1776C
MOTOROLA
Specifications and Applications
Information
PROGRAMMABLE
OPERATIONAL AMPLIFIER
MONOLITHIC MICROPOWER
PROGRAMMABLE OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
This extremely versatile operational amplifier features low power
consumption and high input impedance. In addition, the quiescent
currents within the device may be programmed by the choice of
an external resistor value or current source applied to the Iset input.
This allows the amplifier's characteristics to be optimized for input
current and power consumption despite wide variations in operating
power supply voltages.
•
GSUFFIX
METAL PACKAGE
CASE 601-04
± 1.2 V to ± 18 V Operation
'set
• Wide Programming Range
• Offset Null Capability
• No Frequency Compensation Required
• Low Input Bias Currents
• Short·Circuit Protection
VEE
RESISTIVE PROGRAMMING (See Figure 1 J
nop
View)
Rsetto NEGATIVE SUPPLY
Rs• t to GROUND
(Recommended for supplv voltage
.~
less than ±6.0 V)
'~
'~
6
0--
0--
~~B
VEE
Rsel
-=-
Iset;
3
~1:
Vee - 0.6
Rsp.!
:.
VEE
6
1
Vee 06 VEE
Isp.!
Vee,VEE
Iset = 1.5 /J.A
'set" 15 f.1A
360 kH
±1.5V
~6.0V
l60kS!
360 kH
750 kH
±15V
lQMH
620kH
750 kH
1.0MH
±3.0V
±12V
6.2 MU
7.5 MU
1.6MH
3.6 MH
7.5 MH
±15 V
20 Mn
2.0 M!l
±6.0V
±10V
I set - 1.5 JlA
'set:= 15 /J.A
~
1
Rsel
3.6 MH
Vee,VEE
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
Typical R set Values
Tvpical R set Values
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MCl776C Only)
Non-Inverting Input
ACTIVE PROGRAMMING
Output
Offset Null
FET CURRENT SOURCE
BIPOLAR CURRENT SOURCE
(Top View)
7 Vee
ORDERING INFORMATION
Device
MC1776G
MCl776U
-55 to + 125°C
Package
Metal Can
Ceramic DIP
MCl776CD
SO-8
MC1776CG
Metal Can
MC1776CP1
MC1776CU
Pins not shown are not connected.
MOTOROLA LINEAR/INTERFACE DEVICES
2-180
emperature Range
oto
+70OC
Plastic DIP
Ceramic DIP
MC1776, MC1776C
MAXIMUM RATINGS
ITA" +25 0 e unless otherwise noted.1
Rating
Power Supply Voltages
Differential Input Voltage
Common-Mode Input Voltage
Symbol
Value
Unit
Vee, VEE
±18
Vdc
VID
' 30
Vdc
Vee,VEE
Vdc
II
VICM
Vee and IVEEi < 15 V
VCC and IVEEI;;' 15 V
t 15
Vott-VEE
' 0.5
Vdc
Programming Current
I set
500
~A
Programming Voltage
V set
IVCC-2,0 VI
to
Vdc
ts
Indefinite
Offset Null to VEE Voltage
(Voltage from I set terminal to ground)
VCC
Output Short-Circuit Duration'
Operating Temperature Range
MC1776
MC1776C
Storage Temperature Range
s
°c
TA
-55 to +125
a to +70
°c
T stg
-65 to + 150
-55 to +125
Metal and Ceramic Packages
Plastic Package
Junction Temperature
Metal and Ceramic Packages
°c
TJ
175
Plastic Package
150
*May be to ground or either Supply Voltage. Rating applies up to a case temperature of +125 0 C
or ambient temperature of +70 o C and Iset ";; 30 !lA.
SCHEMATIC DIAGRAM
Iset
r---------------~--------~--_t--_.----~------_.----------~--------oVcc
50
100
OUTPUT
6
50
OFFSET NUll
10k
10k
VEE
L-------~~--+_------~~____~----+_----~~--------+_------04
MOTOROLA LINEAR/INTERFACE DEVICES
2-181
II
MC1776, MC1776C
ELECTRICAL CHARACTERISTICS IVCC = +3.0 V, VEE = -3.0 V, l set = 1.5 ~A, TA = +25 0 C unless otherwise noted.l
MC1776C
MCl776
Symbol
Characteristic
Input Offset Voltage IRS" 10 kn)
TA = +25 0 C
Tlow" ~ TA ~ Thigh*
Min
Typ
Max
Min
Typ
Max
2.0
5.0
6.0
-
2.0
6.0
7.5
-
-
Offset Voltage Adjustment Range
-
-
-
mV
9.0
9.0
VIOR
Input Offset Current
nA
110
-
TA = +25 0 C
TA = Thigh
TA=Tlow
Input Bias Current
TA = +250 C
-
0.7
--
3.0
5.0
10
-
0.7
-
-
7.5
7.5
20
-
2.0
6.0
6.0
10
nA
liB
-
TA = Thigh
TA=Tlow
Input Resistance
ri
Input Capacitance
ci
Input Voltage Range
2.0
-
-
-
-
10
10
20
Mn
50
50
2.0
-
' 1.0
-
-
±
50 k
25 k
200 k
-
±.2.0
±2.4
-
-
2.0
-
1.0
-
-
25 k
25 k
200 k
-
-
±2.0
±2.4
-
5.0
-
3.0
-
-
3.0
-
70
86
-
70
86
-
-
25
150
-
25
200
-
13
20
25
-
13
20
25
-
78
120
150
-
78
-
3.0
0
-
-
-
-
3.0
0
-
c
RL;;' 75 kn, Va = '1.0 V, Tlow" TA" Thigh
Output Voltage Swing
RL;' 75 kn, Tlow" TA .. Thigh
Output Resistance
Output Short-Circuit Current
V/V
AVOL
-
V
Va
ro
los
CMRR
Common-Mode Rejection Ratio
RS" 10 kn, Tlow" TA .. Thigh
kn
5.0
RS" 10 kn, Tlow" T A" Thigh
Supply Current
~V/V
~A
ICC, lEE
TA = +25 0 C
Tlow .;;:; T A " Thigh
Power Dissipation
mA
dB
PSRR
Supply Voltage Rejection Ratio
pF
V
VIO
Tlow';;; TA " Thigh
Large Signal Voltage Gain
RL;;' 75 kn, Va = ± 1.0 V, TA = +25 0
Unit
mV
Via
-
-
~W
Po
TA = +25 0 C
Tlow" T A" Thigh
-
-
120
150
Transient Response (Unity Gain)
Yin = 20 mV, RL '" 5.0 kn, CL
= 100 pF
Rise Time
tTLH
as
Overshoot
Slew Rate IRL '" 5.0 kH)
*Tlow
= -55°C
for MCl776
OoC for MCl776C
SR
0.03
0.03
-
Thigh = + 125°C for MCl776
+70 0 C for MCl776C
TRANSIENT-R ESPONSE
TEST CIRCUIT
VOLTAGE OFFSET
NULL CIRCUIT
Pins not shown are not connected.
MOTOROLA LINEAR/INTERFACE DEVICES
2-182
~s
%
V/~s
MC1776, MC1776C
ELECTRICAL CHARACTERISTICS IVee = +3.0 V, VEE = -3.0 V, I set = 15 ~A, TA = +250 e unless otherwise nated.l
MCl716
Characteristic
Symbol
Input Offset Voltage IRS'; 10 k!11
TA = +2Soe
Typ
Max
Min
Typ
Max
-
2.0
5.0
6.0
-
2.0
6.0
7.5
-
Tlow .. ..;; TA"';; Thigh*
-
rnV
18
nA
110
TA = +2S a C
-
TA "Thigh
TA =Tlaw
-
Input Bias Current
2.0
-
-
-
-
15
15
15
40
-
50
50
120
-
-
-
-
2.0
-
25
25
40
nA
liB
TA = +25 a C
TA = Thigh
=
18
VIOR
Input Offset Current
Unit
rnV
VIO
Offset Voltage Adjustment Range
TA
MCl716C
Min
Tlow
-
15
50
50
100
Input Resistance
ri
-
5.0
Input Capacitance
ci
-
2.0
-
-
5.0
2.0
-
; 1.0
-
-
± 1.0
-
-
50 k
25 k
200 k
-
25 k
25k
200 k
-
-
!2.0
±2.1
-
5.0
-
-
5.0
-
70
86
-
70
86
-
-
25
150
-
25
200
-
130
-
130
-
-
160
180
-
-
170
180
-
780
-
780
-
-
-
-
0.6
5.0
-
~.
-
-
0.35
-
V/~.
Input Voltage Range
Large Signal Voltage Gain
ViV
AVOL
RL"5.0k!1, VO= ;1.0 V, TA =+25 a C
RL :> 5.0 k!1, Vo =, 1.0 V, Tlaw '" TA'; Thigh
Output Voltage Swing
ra
los
CMRR
Common-Mode Rejection Ratio
RS';;; 10 k!2, Tlow"'" TA ~ Thigh
1.9
-
12.1
1.0
kH
1.0
RS" 10 kH, Tlow '" TA" Thigh
Supply Current
~VIV
~A
ICC, lEE
TA = +25 a C
Tlaw .; T A " Thigh
Power Dissipation
TA = +25 a C
rnA
dB
PSRR
Supply Voltage Rejection Ratio
~W
PD
-
Tlaw" T A .. Thigh
Transient Response (Unity Gain)
Vin = 20 rnV, RL ,,5.0 k!1, CL = 100 pF
*Tlaw • -5S a C for MCl716
DoC for MCl776C
-
V
.±
Output Short-Circuit Current
Slew Rate IRL ;. 5.0 k!1)
-
Vo
RL:>5.0kH, Tlaw'" TA '" Thigh
Output Resistance
pF
V
VID
Tlaw .; T A .; Thigh
Rise Time
Overshoot
M!1
tT~H
-
-
OS
SA
-
0.6
5.0
0.35
960
1080
-
Thigh = + 125a C for MCl776
+70 a C for MCl716C
MOTOROLA LINEAR/INTERFACE DEVICES
2-183
1020
1080
-
%
MC1776, MC1776C
II
ELECTRICAL CHARACTERISTICS !VCC" + 15 V. VEE" -15 V. Iset
<
1.5 MA. TA "+25 0 C unless otherwise noted.)
MCI776C
MCI776
Characteristic
Symbol
Input Offset Voltage (RS';; 10 kH)
TA" +25 0 C
Tlow* ~ TA < Thigh*
Min
Typ
Max
Min
Typ
Max
-
2.0
-
2.0
-
6.0
7.5
Offset Voltage Adjustment Range
9.0
6.0
6.0
10
VIOR
Input Offset Current
9.0
-
-
-
0.7
-
-
0.7
-
3.0
5.0
10
7.5
7.5
20
-
2.0
-
-
-
nA
liB
TA" +25 0 C
TA" Thigh
TA" Tlow
I nput Resistance
ri
Input Capacitance
ci
Input Voltage Range
-
2.0
10
10
20
-
-
2.0
-
-
2.0
-
'10
-
-
±10
-
-
200 k
100 k
400 k
-
400 k
-
-
-
50 k
50k
-
-
' 12
± 10
,14
-
14
,10
-
50
MH
50
Tlow .;; T A .;; Thigh
V/V
AVOL
R L ;> 75 kH. Vo " , 10 V. T A " +25°C
RL;> 75 kH. VO"' 10 V. Tlow';; TA';; Thigh
Output Voltage Swing
V
Vo
+25 0 C
RL ;> 75 kH. T A"
RL;> 75 kH. Tlow';; TA';; Thigh
Output Resistance
kH
-
3.0
-
70
90
-
70
90
-
-
25
150
-
25
200
-
20
-
20
-
-
25
30
-
-
30
35
-
-
0.75
0.9
-
-
0.9
1.05
tTLH
OS
-
1.6
-
1.6
-
a
-
SR
-
0.1
RS';; 10 kll. Tlow';; TA';; Thigh
Supply Current
Tlow';; T A " Thigh
Power Dissipation
MV/V
MA
mW
PD
TA" +25 0 C
Tlow .;; T A .;; Thigh
Transient Response (Unity Gain)
Vin" 20 mV. RL;> 5.0 kll. CL" 100 pF
Rise Time
mA
dB
ICC. lEE
TA" +25 0 C
Tlow - -55°C for MCI776
OoC for MCI776C
5.0
.-
PSRR
Supply Voltage Rejection Ratio
Slew Rate (RL;> 5.0 kll)
-
3.0
RS';; 10 kH. Tlow" T A" Thigh
Overshoot
±
-
los
CMRR
Common-Mode Rejection Ratio
-
±12
5.0
ro
Output Short-Circuit Current
pF
V
VID
Large Signal Voltage Gain
mV
nA
TA" +25 0 C
TA "Thigh
TA" Tlow
.
-
5.0
6.0
110
Input Bias Current
Unit
mV
VIO
a
-
Thigh - + 125°C for MCl776
+ 70°C for MCI776C
MOTOROLA LINEAR/INTERFACE DEVICES
2-184
-
-
0.1
MS
%
VIM'
MC1776, MC1776C
ELECTRICAL CHARACTERISTICS
(Vee = +15 V, VEE
C
-15 V, I set = 15 "A, TA
=
+25 a C unless otherwise nated.1
MCI776
Symbol
Characteristic
Input Offset Voltage IRS"; 10 k!!1
TA = +25 a C
Trow· ~ TA ~ Thigh·
MC1776C
Min
Typ
Max
Min
Typ
Max
-
2.0
2.0
-
5.0
6.0
-
-
6,0
7.5
Offset Voltage Adjustment Range
VIDR
Input Offset Current
TA = +25 a C
TA = Thigh
TA = Tlaw
110
-
18
-
2.0
..
..
Input Bias Current
liB
-
18
-
15
15
40
-
2.0
25
25
40
50
50
120
15
5.0
2.0
-
-
-
nA
Input Resistance
ri
.
5.0
..
-
Input Capacitance
ci
-
2.0
-
-
-
-
"0
-
-
100 k
75 k
400 k
-
50 k
50 k
400 k
-
-
±10
,10
±13
± 10
± 10
13
-
-
1.0
12
-
15
TA
TA "'Trow
Input Voltage Range
±
-
50
50
100
M!1
10
-
V
Va
-
12
-
70
90
-
70
90
-
-
25
150
-
25
200
-
160
-
180
200
-
160
-
-
190
200
-
-
5.4
6.0
-
-
5.7
6,0
tTLH
OS
-
0.35
10
-
-
SR
-
0.8
-
-
ra
Output Short-Circuit Current
1.0
los
CMRR
Common-Mode Rejection Ratio
RS"; 10 k!1, Tlaw'; TA .. Thigh
!
-
kil
RS" 10 kil, Tlaw'; TA" Thigh
Supply Current
"vtv
ICC, lEE
= +25 a C
Tlaw" TA .. Thigh
Power Dissipation
mA
dB
PSRR
Supply Voltage Rejection Ratio
pF
V/V
AVOL
= ± 10 V, TA = +25 aC
= ±10 V, Tlaw"; TA'; Thigh
Output Voltage Swing
RL ;;. 5,Ok!1, T A = +25 a C
RL;' 75 kil, Tlaw'; TA'; Thigh
Output Resistance
TA
-
V
Trow ~ T A ~ Thigh
RL ;;'5.0k!1, Vo
RL;;' 75 k!1, Va
-
VID
Large Signal Voltage Gain
mV
nA
= +25 aC
= Thigh
TA
Unit
mV
Via
"A
mW
Po
TA = +25 a C
Trow';;;; TA ,,;;; Thigh
Transient Response (Unity Gain)
Vin
= 20 mY,
RL;;' 5.0 kil, CL
= 100 pF
Rise Time
Overshoot
Slew Rate IRL ;;. 5.0 kill
*Tlaw
= -55 a C for
MCI776
OOC for MCI776C
Thigh
= +125 0 C for
MCI776
+ 70 a C for MCI776C
MOTOROLA LINEAR/INTERFACE DEVICES
2-185
0.35
10
0.8
-
"S%
ViliS
II
MC1776, MC1776C
TYPICAL CHARACTERISTICS
(T A = +2SoC unless otherwise noted.)
II
FIGURE 2 - POSITIVE STANDBY SUPPLY
CURRENT versus SET CURRENT
FIGURE 1 - SET CURRENT versus SET RESISTOR
1000
~
VCC-+15V
VEE" -15 V
Rset to VEE
~+3V~~~;~+18V
./
10M
S
VCC +15 V
VEE"-15V
Rset to GND
Vcc +3 V
VEE- -3V
Rset to VEE
'"ot;
~ 1.0M
~
VCC" +3 V
VEE" -3 V
} lOOk
Rset to GND
/
/'
o. I
10k
0.1
1.0
I",. SET CURRENT I"AI
0.01
100
10
iDo
.0
1.1
Iset. SET CURRENT
I~I
FIGURE 4 -- INPUT BIAS CURRENT versus SET CURRENT
100_1EI
. .
t==:t=t:t:t:ttl:ti--+-+-+++++++
104
0.1
1.0
O. I LJ-L...LJLl.llill-.l.-'--W-i.UJJL-LLJ....LLlillL..Ll....l...Ll.llLU
10
I",. SET CURRENT
0.01
100
1.0
10
100
Iset • SET CURRENT (/.lA)
FIGURE 5 - INPUT BIAS CURRENT
versus AMBIENT TEMPERATURE
0
0.1
I~I
FIGURE 6 - GAIN-BANDWIDTH PRODUCT (GBWI
versus SET CURRENT
+~v"v'CC,,+i8V
-3V;,VEE;'-18V
4
""
.......
8
~ 1.0M
r.........
t;
i5
f"-.,
........ r-.,.
2
t-- f-lse'" 1.5"f
-
-40
-20
~
ISe l"'1.5p.A
I'-.......
0
-60
+40
+60
lOOk
=
VCC-+ 15V
Vee'" +3 v
VEE" -3 V
VEE"-15V
o>-
i<
o
z
~
:i
Z
;;:
....... ~
,+20
-
o
+80
+100
'"
+120 +140
T. TEMPERATURE lOCI
10k
1.0k
0.1
10
Iset. SET CURRENT I"AI
1.0
MOTOROLA LINEAR/INTERFACE DEVICES
2-186
100
MC1776, MC1776C
'TYPICAL CHARACTERISTICS (continued)
(TA :::: +2SoC unless otherwise noted.)
7 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
30
-
Vee- +15V
VEE=-15V
lset "15/JA
V
1/
15 0
VEE = -15 V
lset=1.5/JA- f-- I". = 1.5 "A
Vee = +3 V
Vee=+15V
VEE=-15V- f--VEE = -3 V
1
1\
I
1.5/JA.;;;; lset" 15pA
\
--
III
o
10k
II
lOOk
o
-60
1.0M
36
w
1
21-- _1.5 "A'
"'-
24
~
16
g 12
6 8.0
>
4.0
+60
+80
+100
+120 +140
,
Is;.~ 15~A
28
20
+40
versus SET CURRENT
RL = 75 k
'"~'"
+20
10
0
~
-20
i
FIGURE 10 - SLEW RATE
FIGURE 9 - OUTPUT SWING
versus SUPPLY VOL TAGE
'"z
-40
r
T. AMBIENT TEMPERATURE (DC)
RL. LOAD RESISTANCE (OHMSI
~
\
Ise.=15"A- f-Vee=+3V _
I-VEE=-3V
VCC=+lSV
Ilee=+3v
VEE = -3 V
--
1.0 k
I
1.,.= J"A
II
-- -
0
120
VEE = -15 V
lset = 1.5J.1A
-
V
I - - --
I-
~I
V
II
II
FIGURE 8 - SUPPLY CURRENT
versus AMBIENT TEMPERATURE
FIGURE
L
o ./
o 2.0
R
4.0
./
/. / '
.% ~ lset" 1.5/JA
--
h- ~
6.0
:,,;.
8.0
--2:
w
I-
;2
12
O. 1
~
Rl" 5 k
10
1.0
-'0
Ise t=15J1A
RL=5k -
g0.0 1
14
16
18
0.001
0.01
20
~
VCC=+15V
VEE = -15 V
VCC = +3 V
VEE= -3V
/'
IT
0.1
Vec. IVEEI. SUPPLY VOLT AG ES IV)
1.0
10
100
I" •• SET CURRENT ("AI
FIGURE l1-INPUT NOISE VOLTAGE
FIGURE 12 - OPTIMUM SOURCE RESISTANCE
FOR MINIMUM NOISE versus SET CURRENT
versus SET CURRENT
10- 13
100
-
!'!
4
u
z
'"in
5
0
~
f'" 1 kHz
')'f", 1 Hz
+3 V,.;; Vee" +18 V
-3V;;;.VEE;;;.-18V
w
u
'"
,.~
1. 0
,.
6
:>
Ii:
0
10- 17
0.01
O. 1
0.1
10
1.0
100
0.01
1.0
0.1
I .... SET CURRENT (,.A)
lse•• SET CURRENT ("AI
MOTOROLA LINEAR/INTERFACE DEVICES
2-187
10
100
II
MC1776, MC1776C
APPLICATIONS INFORMATION
FIGURE 15 - MULTIPLE FEEDBACK BANDPASS FilTER
FIGURE 13 - WI EN BRIDGE OSCILLATOR
(1.0kHzI
12k
+15 V
INPUT
R5
-i
.C
OUTPUT
R2
10 k
Vo
2M
for a 1.0 kHz filter
with Q= 10
and A (to)" 1
Rl=160k
R2 = 820
R5=300k
C= O.Ol"F
-15V
-15 V
FIGURE 16 - GATED AMPLIFIER
fo
= ~....L_
27r RC
(for 10 = 1.0 kHz)
R =16 k!l
C = O.Ol"F
MCI776.C
OUTPUT
INPUT
FIGURE 14 - MULTIPLE FEEDBACK BANDPASS FilTER
-15 V
10k
-=
270 k
VCC
15 V
2.7M
10 k
GATE
0
VCC
>-o-__ VO
FIGURE 17 - HIGH INPUT IMPEDANCE AMPLIFIER
for agivln:
VEe
50M
to = centerfrequancy
Alto) = Gainatcenterfrequency
0= quality facter
Choose a value for C, then
-=
500k
INPUT
90 k
OUTPUT
500k
RI=JL
2AII,I
R2 =!!l..M.
402 Rl·R5
To obtain leu than 10% error from the operational amplifier:
50M
~"O.I
30M
-=
G8W
where fa and GBW are expreSStld in Hz. GBW is available from
Figure 6 as a function of Set Current, 'set.
MOTOROLA LINEAR/INTERFACE DEVICES
2-188
10k
-15V
®
Me3301 LM2900
MC3401 LM3900
MOTOROLA
Specifications and Applications
Information
QUAD
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
QUAD SINGLE SUPPLY OPERATIONAL AMPLIFIER
These internally compensated Norton operational amplifiers
are designed specifically for single positive power supply applications found in industrial control systems and automotive electronics. Each device contains four independent amplifiers - making it ideal for applications such as active filters, multi-channel
amplifiers, tachometers, oscillators and other similar usages.
N, P SUFFIX
PLASTIC PACKAGE
CASE 646-06
• Single-Supply Operation
• Internally Compensated
• Wide Unity Gain Bandwidth: 4.0 MHz Typical
• Low Input Bias Current: 50 nA Typical
• High Open-Loop Gain: 1000 VN Minimum
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
• Large Output Voltage Swing: (VCC - 1) V p _p
14~'
1
PIN CONNECTIONS
MAXIMUM RATINGS
Rating
Supply Voltage
Input Currents (lin + or lin -)
Output Current
Power Dissipation (TA = +25·C)
Derate above TA = + 25·C
Operating Ambient
Temperature Range
LM2900
LM2900J
Symbol LM3900 MC3301
MC3401
VCC
+32
+28
+18
V
lin
5.0
5.0
5.0
rnA
10
50
50
50
rnA
PD
1/R9JA
625
5.0
625
5.0
625
5.0
rnW
mWrC
-40 to
+85
o to +70
·C
TA.
-40 to
+85
o to +70
LM3900
Storage Temperature Range
Unit
Tstg
-65 to
+150
-
-
-
-
-65 to
+150
-65 to
+150
NONINV
Input 1
VCC
NONINV
Input 2
NONINV
Input 3
INV
Input 2
NONINV
Input 4
Out
2
Out
1
INV
Input 4
Out
4
INV
Input 1
Out
3
INV
Input 3
(Top View)
·C
ORDERING INFORMATION
Device
Temperature
Range
LM3900D
MC3401D
O·C to +70·C
SO-14
LM3900N
MC3401P
LM2900N
MC3301P
MOTOROLA LINEAR/INTERFACE DEVICES
2-189
Package
-40·C to +85·C
Plastic
DIP
II
II
MC3301, MC3401, LM2900, LM3900
ELECTRICAL CHARACTERISTICS (VCC = + 15 V, TA = + 25'C unless otherwise noted)
LM2900
LM3900
MC3301
MC3401
Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Characteristic
Open-Loop Voltage Gain
f = 100 Hz, RL = 6.0 k
TA = Tlow to Thigh (Notes 1, 2)
AVOL
Input Resistance (Inverting Input)
ri
Output Resistance
ro
Input Bias Current (Inverting Input)
TA = Tlow to Thigh (Note 1)
liB
Slew Rate (CL = 100 pF, RL = 2.0 k)
Positive Output Swing
Negative Output Swing
SR
Unity Gain Bandwidth
BW
- 1.2 2.0 - 1.2 2.0
- - - - - - - - 1.0 - - 1.0 - - 1.0
- B.O - - B.O - B.O
50 200 50 200 50
- - - - - - - - 0.5 - - 0.5 - - 0.5
- 20 - - 20 - - 20
- 4.0 - - 4.0 - - 4.0
VOH
VOL
13.5 14.2
13.5 14.2 13.5 14.2 13.5 14.2 - 0.03 0.2 - 0.03 0.2 - 0.03 0.2 - 0.03 0.2
1.2
Output Voltage Swing (Note 7)
VCC= +15V,RL=2.0k
Vout High (lin - = 0, lin + = 0)
Vout Low (lin - = 10 pA, lin + = 0)
VCC = Maximum Rating, RL = ""
Vout High (lin - = 0, lin + = 0)
2.0
- 1.2 2.0 - O.B - - 0.1 1.0 - - B.O 300 50 300
- - - 500
V/mV
MU
kU
nA
V/p.S
-
-
-
0.5
20
-
-
-
4.0
-
MHz
V
VOH
Output Current
Source
Sink (Note 3)
Low Level Output Current
lin - = 5.0 pA, VOL = 1.0 V
-
-
29.5
-
-
-
29.5
-
-
25.5
-
-
15.5
-
6.0 10
0.5 0.87
- 5.0
-
-
5.0 10
0.5 0.87
5.0
-
-
5.0 10
0.5 0.87
5.0
-
-
-
6.9
7.8
10
14
-
6.9
7.B
10
14
55
-
55
-
Isink
10L
6.0 10
0.5 0.87
- 5.0
Supply Current (All Four Amplifiers)
Noninverting Inputs Open
Noninverting Inputs Grounded
IDO
IDG
-
6.9
7.B
10
14
-
6.9
7.8
10
14
Power Supply Rejection (f = 100 Hz)
PSRR
-
55
-
-
55
-
Isource
Mirror Gain (TA = Tlow to Thigh; Notes 1, 4)
lin+ = 20 pA
lin+ = 200 pA
Ai
!>. Mirror Gain (TA = Tlow to Thigh; Notes 1,4)
20 pA .. lin + .. 200 pA
!>.Ai
-
-
-
mA
-
mA
dB
pA
0.90 1.0
0.90 1.0
-
1.1 0.90 1.0
1.1 0.90 1.0
2.0
5.0
Mirror Current (TA = Tlow to Thigh; Note 1)
-
10
500
Negative Input Current (Note 6)
-
1.0
-
-
1.1 0.90 1.0
1.1 0.90 1.0
2.0
5.0
10
500
1.0
-
-
1.1 0.90 1.0
1.1 0.90 1.0
2.0
5.0
-
10
500
1.0
-
1.1
1.0
2.0
5.0
-
10
500
pA
-
1.0
-
mA
%
NOTES:
I. Tlow
= -4O"C for LM2900, MC3301
= O'C for LM3900, MC3401
Thigh
= + 85'C for LM2900, MC3301
= + 70'C ffor LM3900, MC3401
2. Open·loop voltage gain is defined 8S voltage gain from the inverting input to the output.
3. Sink current is specified for linear operation. When. the device is used as a comparator (non-linear operation) where the inverting input is overdriven,
the sink current (low level output current) capability is typically 5.0 mA.
4. This specification indicates the current gain of the current mirror which is used as the noninverting input.
5. Input Vee match between the noninverting and inverting inputs occurs for a mirror current (noninverting input current) of approximately 10 pA.
6. Clamp transistors are included to prevent the input voltages from swinging below ground more than approximately - 0.3 volts. The negative input
currents that may result from large signal overdrive with capacitive input coupling must be limited externally to values of approximately 1.0 rnA.
Negative input currents in excess of 4.0 mA will cause the output to drop to a low voltage. These values apply for anyone of the input terminals.
If more than one of the input terminals are simultaneously driven negative, maximum currents are reduced. Common-mode biasing can be used
to prevent negative input voltages.
7. When used as a noninverting amplifier, the minimum output voltage is the Vee of the inverting input transistor.
MOTOROLA LINEAR/INTERFACE DEVICES
2-190
MC3301, MC3401, LM2900, LM3900
TYPICAL CHARACTERISTICS
(Vcc = + 15 Vdc, RL = 5.0 kfl, TA = +25'C
[each amplifier] unless otherwise noted.)
FIGURE 1 -
FIGURE 2 - OPEN·LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
OPEN-LOOP VOLTAGE GAIN versus FREQUENCY
o
2500
~
"
'"'w"
'"""
~
'"~'"
40
/'
--
............
/
~ 1000
>
a
~
10
"aw
10
~
V
V
1500
~
3D
a
a
~
2000
"
.......
g
Z
~
0
100
10k
1.0 k
100 k
1.0M
500
o
o
10M
3.0
6.0
9.0
FREQUENCY 1Hz)
FIGURE 3 -
12
15
18
21
24
FIGURE 4 -
OUTPUT RESISTANCE versus FREQUENCY
lol
o (NONINVEATING INPUTS GAOUNDEDI.~
--
....V
..v1:.-r-
w
u
~1.0 k
~
~IOO
/ ' V"
'\
~
30
SUPPLY CURRENT versus SUPPLY VOLTAGE
0
10 k
'"
27
SUPPLY VOLTAGE IVde)
J
(NONINVEATING INPUTS OPEN)
,/
, ::..----
f---
~
100
0.5 k 1.0 k
5.0 kID k
500 k 1.0 M
50 kl00 k
o
o
5.0 M
3.0
6.0
FIGURE 5 -
LINEAR SOURCE CURRENT versus
SUPPLY VOLTAGE
FIGURE 6 -
:g
~1 6
~
g;
....-
I2
"..-
~
:::> 8. 0
g
--
V
I-
5~
12
15
18
21
V
VOH
<
....-
1 80
0
I-
~
600
""
~
400
V
u
9.0
SUPPLY VOLTAGE IVde)
FREOUENCY
18
11
24
27
30
SUPPLY VOLTAGE IVde)
SUPPLY VOLTAGE IV de)
MOTOROLA LINEAR/INTERFACE DEVICES
2-191
27
30
II
II
MC3301, MC3401, LM2900, LM3900
OPERATION AND APPLICATIONS
BASIC AMPLIFIER
pled linear operation at the output. The sink current of
the device can be forced to exceed the specified level
by keeping the output dc voltage above = 1.0 volt resulting in an increase in the distortion appearing at the
output. Closed-loop stability is maintained by an on-thechip 3-pF capacitor shown in Figure 10 on the following
page. No external compensation is required.
The basic amplifier is the common emitter stage
shown in Figures 7 and 8. The active load 11 is buffered
from the input transistor by a PNP transistor, 04, and
from the output by an NPN transistor, 02. 02 is biased
Class A by the current source 12' The magnitude of 12
(specified Isink) is a limiting factor in capacitively cou-
RGURE 7 - BLOCK OIAGRAM
Vee ,:')~lJishig(;st~~rV
Operational
Amplifier #3
Operational
3 Amplifier #1
14
7
,",:,<,~"~,
Gn~
'
Multiple emitter fS) transistor -
one emitter connected to each input.
approximately equal to lin + also. In operation this current flows through an external feedback resistor which
generates the output voltage signal. For inverting applications, the noninverting input is often used to set
the dc quiescent level at the output. Techniques for
doing this are discussed in the "Normal Design Procedure" section.
A noninverting input is obtained by adding a current
mirror as shown in Figure 9. Essentially all current which
enters the noninverting input, lin + , flows through the
diode CR1. The voltage drop across CRl corresponds
to this input current magnitude and this same voltage
is applied to a matched device, 03. Thus 03 is biased
to conduct an emitter current equal to lin + . Since the
alpha current gain of 03 = 1, its collector current is
FIGURE 9 - OBTAINING A NONINVERTING INPUT
FIGURE 8 - A BASIC GAIN STAGE
(-)
Inputs
(+)
Output
~
CR1
MOTOROLA LINEAR/INTERFACE DEVICES
2-192
MC3301, MC3401, LM2900, LM3900
OPERATION AND APPLICATIONS
(continued)
BIASING CIRCUITRY
The circuitry common to all four amplifiers is shown
in Figure 11. The purpose of this circuitry is to provide
biasing voltage for the PNP and NPN current sources
used in the amplifiers.
The voltage drops across diodes CR2, CR3 and CR4
are used as references. The voltage across resistor R1
is the sum of the drops across CR4 and CR3 minus the
VBE of 08. The PNP current sources (05, etc.) are set
to the magnitude VBE/R1 by transistor 06. Transistor
07 reduces base current loading. The voltage across
resistor R2 is the sum of the voltage drops across CR2,
CR3 and CR4, minus the VBE drops of transistor 09 and
diode CR5 thus the current set is established by CR5 in
all the NPN current sources (010, etc.). This technique
results in current source magnitudes which are relatively independent of the supply voltage. all (Figure
7) provides circuit protection from signals that are negative with respect to ground.
FIGURE 10 - A BASIC OPERATIONAL AMPLIFIER
FIGURE 11 - BIASING CIRCUITRY
10 k
(-I
I.
' . . . _--+--o Output
II~
R2
CR2
Inputs
CR3
(+1
CR1
CR4
NORMAL DESIGN PROCEDURE
1. Output a-Point Biasing
Choosing the feedback resistor, Rf, to be equal to
V. Rr will now bias the amplifier output dc level
A. A number of techniques may be devised to bias
the quiescent output voltage to an acceptable
level. However, in terms of loop gain considerations it is usually desirable to use the noninverting input to effect the biasing; as shown in Figures 12 and 13 (see the first page of this
specification). The high impedance of the collector of the noninverting "current mirror" transistor
helps to achieve the maximum loop gain for any
particular configuration. It is desirable that the
non inverting input current be in the 10 "A to 200
"A range.
to approximately
¥.
This allows the maximum
dyna'mic range of the output voltage.
C. Reference Voltage other than VCC (see Figure 14)
The biasing resistor Rr may be returned to a voltage (V r ) other than VCC' By setting Rf = Rr, (still
keeping lin + between 10 "A and 200 "AI the
output dc level will be equal to Vr' The expression
for determining VOdc is:
V
B. VCC Reference Voltage (see Figures 12 and 131
The noninverting input is normally returned to
the VCC voltage (which should be well filtered)
through a resistor, Rr, allowing the input current,
lin + , to be within the range of 10 "A to 200 "A.
Odc
=
(Ai)(VrHRf)
Rr
+
(1
-
Rf A')
A;
I
"-
'i'
where is the VBE drop of the input transistors
(approximately 0.6 Vdc @ + 25°C and assumed
equal). Ai is the current mirror gain.
MOTOROLA LINEAR/INTERFACE DEVICES
2-193
•
MC3301, MC3401, LM2900, LM3900
FIGURE 13 - NONINVERTING AMPLIFIER
FIGURE 12 - INVERTING AMPLIFIER
II
Rf
510k
AV =
-~
Rf
Ri
.--_5",1",0...
k_-, AV
=
for...!..
we '" R'I
0.1/LF
Vin "--?'I-'\N'r--o--i
C Ri
51 k
~'t'FVO
AV
+15V
=
10 BW
=
150 kHz
=
5:E;:;r- Vo
110k
The lower corner frequency is determined by the
coupling capacitors to the input and load resistors. The upper corner frequency will usually be
determined by the amplifier internal compensation. The amplifier unity gain bandwidth is typically 4.0 MHz and with the gain roll-off at 20 dB
per decade, bandwidth will typically be 400 kHz
with 20 dB of closed-loop gain or 40 kHz with 40
dB of closed-loop gain. The exception to this occurs at low gains where the input resistor selected
is large. The pole formed by the amplifier input
capacitance, stray capacitance and the input resistor may occur before the closed-loop gain intercepts the open-loop response curve. The inverting input capacity is typically 3.0 pF.
~
Ri
FIGURE 14 - INVERTING AMPLIFIER WITH
ARBITRARY REFERENCE
FIGURE 15 - INVERTING AMPLIFIER WITH
Ay = 100 AND Vr = VCC
Rf
c·
+
510 k
Ri
Vin ~1--1\N1r-_.o..--I
>-D-~_VO
T
0.1 /LF
Vin ~I-JVV'Ir--+--O--!
5.1 k
0.1 /LF
-= 10 k
1.0 M
Rr
Vr
250 kHz
+15V
2. Gain Determination
A. Inverting Amplifier
The amplifier is normally used in the inverting
mode. The input may be capacitively coupled to
avoid upsetting the dc bias and the output is normally capacitively coupled to eliminate the dc
voltage across the load. Note that when the output is capacitively coupled to the load, the value
of Isink becomes a limitation with respect to the
load driving capabilities of the device. The limitation is less severe if the device is direct coupled.
In this configuration, the ac gain is determined
by the ratio of Rf to Ri, in the same manner as for
a conventional operational amplifier:
Av
=
BW
0.1/LF
Vin ~I--">NI._'-O--l
Ri
510 k
(Rf)(Ai)
'" 1
26
Ri + lin + (rnA)
fL = 300 Hz, fH
Ay = 100
'Select for low
frequency response.
MOTOROLA LINEAR/INTERFACE DEVICES
2-194
=
50 kHz
•
VO
MC3301, MC3401, LM2900, LM3900
A
B. Noninverting Amplifier
These devices may be used in the noninverting
mode (see Figure 13). The amplifier gain in this
configuration is subject to the current mirror gain.
In addition, the resistance of the input diode must
be included in the value of the input resistor. This
Iy 'in
26+
.
resistance .IS approximate
0
_
v -
(Rf)(Ai)
26
Ri
+ 'in + (mA)
The bandwidth of the noninverting configuration
for a given Rf value is essentially independent of
the gain chosen. For Rf = 510 kO the bandwidth
will be in excess of 200 kHz for noninverting gains
of 1, 10, or 100. This is a result of the loop gain
remaining constant for these gains since the input
resistor is effectively isolated from the feedback
loop.
h ms, were
h
'in + is input current in milliamperes. The noninverting ac gain expression is given by:
TYPICAL APPLICATIONS
FIGURE 16 - TACHOMETER CIRCUIT
Vcc = +12V
Magnetic Pickup
Hysterisis Amplifier
130
Monostable Multivibrator
Pulse Averaging
~
r-~~10¥0~~r--------1~--------~r---------~~R~1~------------------~0.1 ~F
k
MSD6100
or equiv
100 k
Magnetic
Pickup
4.7 k
100 k
Output
Cl
0,01 ~F
MSD6100
or equiv
10 k
Hysterisis Voltage for Switching
A'R2
VH =
(VCC - 1.6)
Timing Interval: t
= 0.7 Rl
Cl
-t-
Vp_p "
FIGURE 17 - VOLTAGE REGULATOR
Zl
FIGURE 18 -
LOGIC "OR" GATE
+VCC
R2
+ VCC
= + 15 Vdc
150 k
.....--"W'\r---o-'1
75 k
A _-"IN'v....,.-<>-j
75 k
01
B ....-V\A.--0--_"0
Q~-~<
>--<>--......-
Vo
Reset Set
FIGURE 23 - POSmVE-EOGE OIFFERENTIATOR
FIGURE 24 - NEGATIVE-EOGE OIFFERENTIATOR
Output Rise Time = 0.22 ms
Input Change Time Constant = 1.0 ms
O.OOI/LF
O.OOI/LF
100 k
100 k
flVin
flVin
h
0.002/LF
T - -7
>-C>---<~"'VO
51k
¥I
0.002/LF
...:)f--+o-'VVV--0--4
>--<>-.....-
150 k
Vcc = +15Vdc
VO(dc) = 7.0 Vdc
Output Rise Time = 0.22 ms
Input Change Time Constant = 1.0 ms
MOTOROLALINEAR/lNTERFACE DEVICES
2-196
Vo
MC3301, MC3401, LM2900, LM3900
FIGURE 25 - AMPLIFIER AND DRIVER FOR A SO-OHM LINE
510 k
51 k
Vin
--11-'VV'.....-H>--l
0.1/LF
10
20/LF
':~TVO
1.2 M
oreqUl~
AV ~ 10
Vo ~ 6.0 V(p_p)
r
u
+15V
FIGURE 26 -
BASIC BANDPASS AND NOTCH FILTER
R
C
390 k
R1
Cx 10 TBP
Vin ~1--1"""'vv-"""-o--1::'"
R2
TBP ~ Center Frequency Gain
TN ~ Passband Notch Gain
wO~..2..
R1
~
RC
OR
R1
R2~~
R2
TBP
R3 ~ TN R2
~tCh
C1
FIGURE 27 -
BANDPASS AND NOTCH FILTER
62 k
0.005/LF
0.005/LF
100 k
300 k
4
300 k
Vin
9
120 k
100 k
VCC
I
100 k
62 k
300 k
VCC
VCC (Pin 14) ~ + 12 Volts
Ground - Pin 7
Center Frequency 500 Hz
300 k
11
o.1 /LF
O~5
Bandpass Gain
300 k
~
1
Notch
300 k
12
Bandpass Output ... Pin 4
Notch Output ----+ Pin 10
VCC
MOTOROLA LINEAR/INTERFACE DEVICES
2-197
MC3301, MC3401, LM2900, LM3900
II
TYPICAL APPLICATIONS
(continued)
FIGURE 28 - VOLTAGE REGULATOR
V 1N3824
4.3 V Z or equiv
Vee
10
Yo = YZ + O.6Ydi:
NOTE 1: R is used to bias the zener.
NOTE 2: If the Zener Te is positive, and equal in
magnitude to the negative Te of the input
to the operational amplifier (=2.0 mVrC),
the output is zeroMTe. A 7.0 Volt Zener
will give approximately zero-Teo
R
FIGURE 29 - ZERO CROSSING DETECTOR
Vee=+15V
1.0 M
1.0 M
510 k
510 k
Magnetic
Pickup 510 k
510 k
Input~
Output
>-<>-.... Output
MOTOROLA LINEAR/INTERFACE DEVICES
2-198
LnJlJ
OV
OV
MC3302
®
For Specifications, See LMl39 Data.
MC3403
MC3503
MC3303
MOTOROLA
Specifications and Applications
Information
QUAD LOW POWER OPERATIONAL AMPLIFIERS
QUAD DIFFERENTIAL
The MC3503 is a low-cost, quad operational amplifier with true
differential inputs. The device has electrical characteristics similar
to the popular MC1741. However, the MC3503 has several distinct
advantages over standard operational amplifier types in single
supply applications. The quad amplifier can operate at supply
voltages as low as 3.0 Volts or as high as 36 Volts with quiescent
currents about one third of those associated with the MC1741 (on
a per amplifier basis). The common mode input range includes
the negative supply, thereby eliminating the necessity for external
biasing components in many applications. The output voltage
range also includes the negative power supply voltage.
• Short Circuit Protected Outputs
• Class AB Output Stage for Minimal Crossover Distortion
INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
~
:r~(in¥~
• True Differential Input Stage
#
• Single Supply Operation: 3.0 to 36 Volts
• Split Supply Operation:
:!: 1.5
to
:!:
18 Volts
14
• Low Input Bias Currents: 500 nA Max
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
DSUFFIX
,,"
1
PLASTIC PACKAGE
CASE 751A-02
SO-14
• Four Amplifiers Per Package
• Internally Compensated
• Similar Performance to Popular MC1741
• Industry Standard Pinouts
Vt~llr--<>
0-
&l
14 1
Vee
ee
,>-- -<>
2>-- -<>
3>-- -<>
~
4
---;4;>--- -<>
hVt01BV
-=- 1.5 V
to 18 V
PIN CONNECTIONS
Out
1
Out
4
VEE
... VEE, Gnd
MAXIMUM RATINGS
Symbol
Value
VCC
VCC
VEE
36
+18
-18
Input Differential Voltage Range (11
VIDR
±36
Vdc
Input Common Mode Voltage Range (1) (2)
V,CR
±18
Vdc
Storage Temperature Range
Ceramic Package
Plastic Package
Operating Ambient Temperature Range
Tstg
Rating
Inputs
Inputs
1
4
Inputs
Inputs
2
3
Unit
Vdc
Power Supplv Voltages
Single Supply
Split Supplies
°c
-65 to +150
-55 to +125
(Top View)
-55 to +125
o to +70
-40 to +85
ORDERING INFORMATION
°c
TJ
175
150
(1) Split Power Supplies.
(2) For Supply Voltages less than ±15 V, the absolute maximum input voltage is equal to the
supply voltage.
Type
MC3303L
MC3303P
MC3403D
MC3403L
MC3403P
MC3503L
MOTOROLA LINEAR/INTERFACE DEVICES
2-199
Out
3
Out
2
°c
TA
MC3503
MC3403
MC3303
Junction Temperature
Ceramic Package
Plastic Package
PSUFFIX
PLASTIC PACKAGE
CASE 646-06
(MC3403 and MC3303 Only)
SPLIT SUPPLI ES
SINGLE SUPPL Y
3.0
. •
Temperature Range
Package
- 40"C to + 85°C
-40"C to +B5°C
O°Cto +70°C
O°C to +70"C
QOC to +70°C
- 55°C to + 125°C
Ceramic DIP
Plastic DIP
SO-14
Ceramic DIP
Plastic DIP
Ceramic DIP
MC3403, MC3503, MC3303
ELECTRICAL CHARACTERISTICS (Vee" +15 V. VEe .. ~16 V for MC3603, MC3403: Vee - +14 V. VeE" Gnd for MCC3303.
T A .. 2SOC unless otherwiH noted,)
MC3&03
II
Symbol
Input Offset Voltage
T A = Thigh to Tlow (1)
Input Offset Current
T A '" Thigh to Tlow
Large Signal Open-loop Voltage Gain
VO=±10V,AL=2.0kn.
T A = Thigh to Tlow
Input Bias Current
T A = Thigh to Tlow
Output Impedance
f = 20 Hz
Min
Ty.
2.0
MC3403
Mox
Ty.
2.0
Min
5.0
6.0
',0
30
50
200
30
MC3303
Mox
Min
10
12
50
200
Ty.
2.0
30
Max
Unit
8.0
10
mV
75
V/mV
50
25
',8
Input Impedance
f = 20 Hz
'i
nA
250
AVOL
200
-200
-300
75
200
20
15
-500
-1500
-200
20
15
200
-200
-500
-800
-500
nA
-1000
75
n
0.3
1.0
0.3
1.0
0.3
1.0
Mn
±12
±lO
:t10
t13.S
±13
±12
:!:10
±10
tl3.S
±t3
+12
+10
+10
+12.5
+12
75
v
Output Voltage Range
RL=10k.!1
RL = 2.0kO
Rl = 2.0 kn, T A = Thigh toT,ow
Input Common-Mode Voltage Range
+13 V -VEE +13.5V-VEE
CMRR
Common-Mode Rejection Ratio
+13 V-VEE +13.5V -VEE
90
2.8
4.0
2.8
7.0
±to
±30
±45
±20
±45
30
30
150
150
50
30
30
50
10
10
10
8Wp
9.0
9.0
9.0
Small·Signal Bandwidth
AV = 1, RL = 10kn,Vo =50mV
8W
1.0
1.0
1.0
Slew Rate
AV = 1, Vi = -10V to +10V
SA
70
v
H2V-VEE +12.5V-VEE
70
90
70
90
±10
±30
dB
AS'" 10 kO
Power Supply Current (Va = 0)
Rl=oo
Individual Output Short·Circuit Current 121
Positive Power Supply Rejection Ratio
PSRR+
Negative Power Supply Rejection Ratio
PSAA-
Average Temperature Coefficient of Input
Offset Current
150
150
2.8
30
-=-
7.0
mA
150
IlVN
mA
50
T A = Thigh to Tlow
Average Temperature Coefficient of Input
Offset Voltage
T A = Thigh to Tlow
Power Bandwidth
AV'" 1, RL = 2.0 kn, Vo = 20 V(p-pl.
THO = 5%
0.6
0.6
0.6
AiseTime
AV'" 1, RL '" 10 kU, Va'" 50 mV
0.35
0.35
0.35
Fall Time
AV = t, AL = 10 kn, Va = 50 mV
0.35
0.35
0.35
kH,
V!IlS
"'
Overshoot
OS
20
20
20
%
AV= 1,Al = 10 kn, V o = 50mV
Phase Margin
AV = " RL = 2.0 kn,cL" 200pF
Om
60
60
60
Degrees
1.0
1.0
1.0
%
Crossover Distortion
(Vin = 30mVp·p, V out '" 2.0 Vp·p,
f'" 10kHzJ
(11 Thigh = 125°C for MC3503, 70°C for MC3403, 85°C for MC3303
Tlow '" _55°C for MC3503, OOC for MC3403, _40°C for MC3303
ELECTRICAL CHARACTERISTICS
(VCC = 50 V, VEE = Gnd, T A = 25°C unlets otherwise noted
MC3603
Typ
Max
Max
Unit
2.0
5.0
2.0
10
10
mV
Input Offset Current
110
30
50
30
50
75
nA
Input Bias Current
liB
-200
-500
-200
-500
-500
AVOL
Power Supply Rejection Ratio
PSRA
Output Voltage Range (3)
Al = 10 kn, Vec =5.0V
RL = 10kO, S.OV ';;Vee';;30V
Power SupplV Current
10
200
3.3
Vee- 2.a
Min
MC3303
Max
VIO
large-5ignal Open· Loop Voltage Gain
RL=2.0kn
Min
MC34Q3
Typ
Input Offset Voltage
Characteristic
Symbol
I
10
200
3.5
3.3
Vee-1.7
Vee-2.a
Min
Typ
10
200
3.5
3.3
3.5
Vce-1.7
Vee-2.a
Vee- 1.7
150
150
150
ICC
IJVIV
Vp·p
VOA
Channel Separation
f .. 1.0 kHz to 20 kHz (Input Aeferenced)
nA
V/mV
2.5
4.0
-120
2.5
7.0
-120
(21 Not to exceed maximum package power dlS1lpatlon.
(31 Output will.wing to ground
MOTOROLA LINEAR/INTERFACE DEVICES
2-200
2.5
-120
7.0
mA
d8
MC3403, MC3503, MC3303
Bias Circuitry
Common to Four
Amplifiers
CIRCUIT SCHEMATIC
Vee
INVERTER PULSE RESPONSE
20p,s/di .....
CIRCUIT DESCRIPTION
the negative supply or ground, in single supply operation,
without saturating either the input devices or the differential to single-ended converter. The second stage consists of a standard current source load amplifier stage_
The output stage is unique because it allows the output
to swing to ground in single supply operation and yet does
not exhibit any crossover distortion in split supply operation. This is possible because class AS operation is utilized.
Each amplifier is biased from an internal-voltage regulator which has a low temperature coefficient thus giving
each amplifier good temperature characteristics as well as
excellent power supply rejection.
The MC3503/3403/3303 is made using four internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input devices Q24 and
Q22 with input buffer transistors Q25 and Q21 and
the differential to single ended converter 03 and Q4.
The first stage performs not only the first stage gain
function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance a smaller compensation capacitor (only 5 pF)
can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q24 and Qn. Another feature of this input
stage is that the input common-mode range can include
MOTOROLA LINEAR/INTERFACE DEVICES
2-201
•
MC3403, MC3503, MC3303'
TYPICAL PERFORMANCE CURVES
lEI
FIGURE 1 - SINE WAVE RESPONSE
FIGURE 2 - OPEN LOOP FREQUENCY RESPONSE
120
I
0
,;
~
>
!
...... r-.,
J
tg=115
VEE = -15 V
TA=25OC
0
'"ci
t"O
"
0
"
0
"
0
-2 0
--
1.0
100
10
ONate Class AB output stage
1.0k
10k
100 k
1.0 M
t, FREQUENCY 1Hz)
f"Jroduces dlstortlon!css $lne""8ve
50,us/div.
FIGURE 3 - POWER BANOWIDTH
0
1
5
o
0
~
:fi
15
g
10
~
5, 0
:;
...~
o
6
>
"\
1111
i~
\, =
~
w
FIGURE 4 - OUTPUT SWING versus SUPPLY VOLTAGE
1111111
+
-15V
~
rs
o
L
.~
r-oVO
L
w
~10k
'"'"~
'"'"
:;
/
20
V
w
V
o
>
I'
~ 10
TA = 25°C
0
1.0 M
100 k
V
/'
~
>
10 k
L
~
o
!-- I--
0
-5. 0
1.0k
TA = 25°C
30
~
2.0
t, FREQUENCY 1Hz)
4.0
6.0
8.0
10
12
14
16
18
20
VCC AND VEE, POWER SUPPLY VOLTAGES IVOLTS)
FIGURE 5 - INPUT BIAS CURRENT versus TEMPERATURE
FIGURE 6 - INPUT BIAS CURRENT versus SUPPLY VOLTAGE
V~C= 15IV._
300
VEE=-15V
TA=250C-
-- t-- -- r---
0
0
"
r-.,
"
0
0
-75
-55
-35
-15
5.0
25
45
65
85
105
150
125
2.0
4.0
6.0
10
12
14
16
VCC AND IVEE), POWER SUPPLY VOLTAGES (VOLTS)
T, TEMPERATURE 10C)
MOTOROLA LINEAR/INTERFACE DEVICES
2-202
18
20
MC3403, MC3503, MC3303
APPLICATIONS INFORMATION
FIGURE 8 - WIEN BRIDGE OSCILLATOR
FIGURE 7 - VOLTAGE REFERENCE
50 k
VCC
10 k
R2
10 k
V ref ......-'lM,..-4>--Q-j
I>-o-+-"VO
f O =21T'RC
10 k
1
Rl
Vref
""2 Vee
For
Rl
VO=Rl+R2
fo=lkHz
R = 16 kl1.
C
C'" 0.01 J.LF
R
1
Vo ="2VCC
FIGURE 9 - HIGH IMPEOANCE OIFFERENTIAL AMPLIFIER
FIGURE 10 - COMPARATOR WITH HYSTERESIS
1
-R
.1
C
R
A2
AI
Vref "'-'VI{I,-+--O--;+'/4
MC34Q3
Vin . .----o-l
1
-A
C
.2
VinL
A
= A 1:' R2
VinH~
(VOL - Vref) + Vref
Rl :'R2 (VOH - Vref) + Vref
eo = C (1 + a + b) (e2 - e1)
H
Rl:'R2 (VOH - VOL)
=
FIGURE 11- BI-OUAD FILTER
A
A
100k
= QR
Rl
Vin
Cl
C
A2
----l1t--..--.JVV\"'---'--<>-1
Rl
R2=TSp
:9-0-+-""",..,..-4-<..., 1/4
100 k
MC3403~-o~-"",,"""-4~'-;
R3
Cl
1
Vref =
2" Vee
= TN R2
= 10 C
fo=lkHz
Q =
Bandpass
Output
Vref
~3
10
Tap = 1
AI
TN"" 1
R2
Cl
----tE-----e Notch Output
f>-o....
Vref
TBP
= Center
C = 0.001 /IF
AI = 1.6 Ml1.
Frequency Gain
TN = Passband Notch Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-203
A= 160kl1.
A2
A3
= 1.6 Ml1.
= 1.6 Ml1.
MC3403, MC3503, MC3303
FIGURE 12 - FUNCTION GENERATOR
II
V,ef
=~
Triangle Wave
Output
VCC
R2
300k
V ref·--<:>--l+'/4
R3
MC3401:j>-<:>-+--'7"'5"'kv-+--~+ 1/4
R1
MC3403!>-o-....._
Rf
f=~1+RC
if
A3=A2R1
4CRfR1
R2+A1
FIGURE 13 - MULTIPLE FEEOBACK BANDPASS FILTER
t.
1
Vi"
VCC
A3
Cc
M~~03
~Vo
Co
A2
Co
= 10 C
1
Vref ==
Given
'2 Vee
fo"" Center Frequency
A(f o ) = Gain at Center Frequencv·
Choose Value fa. C
Then:
o
R3=-1r
fa C
A3
2 Alfol
R1=--R1 R5
A2=40 2 A1_A5
For less than 10% error from operational amplifier
00fO<0.1
BW
Where fa and BW are expressed in Hz.
If source impedance varies. filter may be preoeded with
voltage follower buffer to stabilize filter parameters.
MOTOROLA LINEAR/INTERFACE DEVICES
2-204
Square Wave
Output
®
MC3405
MC3505
MOTOROLA
DUAL OPERATIONAL AMPLIFIER
AND DUAL COMPARATOR
The MC3405/3505 contains two differential-input operational
amplifiers and two comparators, each set capable of single supply
operation. This operational amplifier-comparator circuit fulfills its
applications as a general purpose product for automotive and
consumer circuits as well as an industrial building block.
The MC3405 is specified over the commercial operating temperature range of 0 to + 70°C, while the MC3505 is specified over
the military operating range of - 55 to + 125°C.
II
DUAL
OPERATIONAL AMPLIFIER
AND
DUAL VOLTAGE COMPARATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Operational Amplifiers Equivalent in
Performance to MC3403/3503
• Comparators Similar in Performance to LM339/139
• Single Supply Operation: 3.0 to 36 Volts
• Split Supply Operation: ± 1.5 to ± 18 Volts
• Low Supply Current Drain
• Operational Amplifiers Are Internally Frequency Compensated
~
• Comparators TTL and CMOS Compatible
li"~~ij
: tV'o
C]
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
SPLIT SUPPLIES
VCC
-=- 1.5 V
4
lav
to 18 V
VEE
PIN CONNECTIONS
Out 1
,.,."'
Out4
{
}"....
Vcc
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
VEE/Gnd
{
}",,",
,."., ,
ORDERING INFORMATION
Device
Temperature Range
Out2
MC3405L
MC3405P
(Top View)
MC3505L
MOTOROLA LINEAR/INTERFACE DEVICES
2-205
o to
+70 o C
o to +70 o C
-55 to +12S o C
Package
Ceramic DIP
Plastic DIP
Ceramic DIP
MC3405, MC3505
OPERATIONAL AMPLIFIER SECTION
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
VCC,VEE
36
±18
Vdc
Input Differential Voltage Range
VIDR
±36
Vdc
Input Common Mode Voltage Range
VICR
±18
TA
-55 to +125
o to +70
Vdc
uc
T stg
-65 to +150
-55 to +125
°c
TJ
175
150
°c
Rating
II
Power Supply Voltage-Single Supply
Split Supplies
Operating Ambient Temperature Range MC3505
MC3405
Storage Temperature Range-Ceramic Package
Plastic Package
Operating Junction Temperature Range-Ceramic Package
Plastic Package
ELECTRICAL CHARACTERISTICS IVCC = 5.0 V, VEE = Gnd, TA = 25°C unless otherwise noted I
MC3405
MC3505
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Input Offset Voltage
VIO
-
2.0
5.0
2.0
10
rnV
Input Offset Current
110
-
30
50
30
50
nA
Input Bias Current
lIB
-
-200
-500
-
-200
-500
nA
AVOL
20
200
-
20
200
-
V/rnV
Power Supply Rejection Ratio
PSRR
-
-
150
-
-
150
Output Voltage Range (Note 1)
VOR
IlV /V
Vp-p
Characteristic
Large-Signal Open-Loop Voltage Gain
IRL = 2.0 knl
3.3
IRL = 10 kn, VCC = 5.0 VI
IRL = 10 kn, 5.0 V .;; VCC';; 30 VI
Power Supply Current (Notes 2 and 3)
Channel Separation
Vce- 2.O
3.5
Vee-
t .7
-
3.3
3.5
-
Vee- 2•O
Vee- t .7
-
-
ICC
-
2.5
4.0
-
2.5
7.0
rnA
-
-
-120
-
-
-120
-
dB
2.0
10
12
rnV
15
-
IlV / u C
-
-
50
200
nA
-200
-500
-800
nA
-
-
-
f = 1.0 kHz to 20 kHz
(Input Referenced)
ELECTRICAL CHARACTERISTICS IVCC = +15 V VEE = -15 V TA· 25 0 C unless otherWISe noted I
Input Offset Voltage
2.0
AVIOl
I{\
\
on
.;
.I
.I
120
V V =V
~I
+1'5
~
VEE = -15V
TA = 25°e
I"-r--.
0
I'
0
\
\
v6e l
0
I'
I
If' I"~
\
II
FIGURE 2 - OPEN LOOP FREQUENCY RESPONSE
.'
,lao
\
V
,.......
,
0
\)
.......
,
0
I'
,;
0
~
~~~
>
E
o
....... ~
~
~ 1ilio...oi ~
....
-20
1.0
100
10
'"Note Class AS output stage
produces distortion less sinewave.
on
1.0k
10k
I. FREQUENCY (Hz)
lOOk
1.0M
50/-tS/div.
FIGURE 3 - POWER BANDWIDTH
30
I I
5
~
~
20
\\
2:
w
~
~
~
~
5
o
<3
>
15
5. 0
•
·15 V
f--o Vo
10 k
./
,/
V
/'
,
100 k
1.0M
2.0
I. FREQUENCY (Hz)
I
-15
5.0
25
45
8.0
10
12
14
16
18
20
65
85
-..
"
105
"
0
150
-35
6.0
0
-- -55
4.0
FIGURE 6 - INPUT BIAS CURRENT .ersusSUPPLY VOLTAGE
-t-
-75
./
1,
Vee = +15V _
VEE = -15 V
TA = 25°e -
300
o
L'
VCC ANO IVEEI POWER SUPPLY VOLTAGES (VOLTS)
FIGURE 5 - INPUT BIAS CURRENT versus TEMPERATURE
0
25°C
/'
=10k
-
0
~
0
I
TA ~ 25°C
-5.0
1.0 k
TA
.1111
.~
:
",
10
FIGURE 4- OUTPUT SWING versus SUPPLY VOLTAGE
1111
125
o
2.0
4.0
6.0
10
12
14
16
VCC AND IVEEI. POWER SUPPLY VOLTAGES (VOLTS)
T. TEMPERATURE (OC)
MOTOROLA LINEAR/INTERFACE DEVICES
2·209
18
20
MC3405, MC3505
COMPARATOR SECTION
TYPICAL PERFORMANCE CURVES
FIGURE 8 - INPUT BIAS CURRENT
FIGURE 7 - NORMALIZED INPUT OFFSET VOLTAGE
II
20 0
1.40
Wu
VCC"+15V
1.20 f - - VEe = God
~~
t-N
c5
V
0
./
~ 1.00
>0
/'
~~
:5
I-
L..-- ~
0
/
~ 0.80
-l- f-- I -
-
TA" -5':'::-
-r-
=>0
~z
/
0.60
0.40
-60
0
-40
40
2.0
-20
6.0
7. 0
2.20
-;;(
"- .......
_
'"~
~
t-
5
..........
~
r--...:. I--
Slope Can Be Either Polarity.
20
-20
40
60
BO
30
t-- r--T ~"-55~C
17
//
........ ' /
/
/
V'
\// /
TA'S\moc
/V V
0
:...~
100
120
140
/
0
5
.
4.0
3.
//
2.0
/,
1/ V
/
"
- - I----
/
VCC"+15VV E" Gn
r 1-
\// V
/'
1.0
0
-40
26
.-- TA"25 0 e -I - -
/V...
1
VCC" +15 V
VEE = Gnd
"'" "'"
22
1 i
\
6. 0
3
I'-
0
lB
FIGURE 10 - OUTPUT SINK CURRENT
versus OUTPUT VOL TAG E
FIGURE 9 - NORMALIZED INPUT OFFSET CURRENT
1.BO
14
10
Vce. POSITIVE SUPPLY VOLTAGE IVOLTS)
TA. AMBIENT TEMPERATURE laC)
0.2 0
-60
+125 0 C
VEE" Gnd
/
0
'--
'-- fr;
Slope Can Be Either Polarity.
/
f-- P
TA +25 0 C
V
t-",
f-- ~ l-
\
\
200
TA. AMBIENT TEMPERATURE laC)
400
600
VOL. OUTPUT VOLTAGE ImV)
1000
BOO.
APPLICATIONS INFORMATION
FIGURE 11 - PULSE WIDTH MODULATOR SCHEMATIC AND WAVEFORMS
~1fUi1lh
I!! I I
.
IT~
VT~~_I.~)_~~:i.!~I~.T~r
~:~::Ol V~~t_a_ge l-vc
I
!
VTL~
-
Time
C
:·~;lli[r
150 k
R2
5.0 k
VEEJ---------------Lb===L~
. .=L--~========~-
VEE
Pulse Width
VTH "'"
~VS(1 +
VTL =
~VS(1
R2/R1)
+ VEE
- R2/R1) + V,EE
Duty Cycle in %
Oscillator Frequency
f "'"
~
4R~~R2
MOTOROLA LINEAR/INTERFACE DEVICES
2-210
Time
MC3405, MC3505
FIGURE 12 - WINDOW COMPARATOR
•
FIGURE 13 - SQUELCH CIRCUIT FOR AM OR FM
C3
Vin
cf,C2
VCC
>-----I
R1
High Pass Filter
High Pass Filter
Rt
Given: A o • Q, Wo = 21TfO
Choose: C "" Cl
Calculate:
=
C2, A Convenient Value
A2 '"
w~c
+
(2Ao
R3C4
>5
Tin
Ri
Squelch
Threshold Adj
Where: Tin is the period of vin
1)
Switched Audio Stage
C3=~
Q =
Al =
= High Frequency Gain
Wo = Break Frequency
Ao
Quality Factor
Ao
Ao
Qw o C(2A o
+ 1)
Gain of Audio Stage
Rt
Aci = -
Ai
FIGURE 14 - HIGH/LOW LIMIT ALARM
VCC
10 k
10 k
R4
VCC
10 k
R5
VIL'" Vee Rl
VCC
1 k
+ ~; + R3
VIH = Vee Al ~2;2 ~3 R3
2.0 k
Vo~
Oscillator
If R4 = RS = R6
vi
2.0 k
cra.01 J.lF
f = O.72/RfC
Vc
1 k
As Shown, f = 2.2 kHz
Camp 2
R3
Vo Will Oscillate If V IH
Limit Detector
Vo Will Be Low If VIL
<
<
vi, or V I L
vi
> vi
< VIH
FIGURE 15 - ZERO CROSSING DETECTOR WITH TEMPERATURE SENSOR
Zero Crossing Detector
Vt=(VSEofQl) ( R4R+5 R5)
13
> 2~~E
R1 and R2 control the switching voltage
Temp
R6 ,--'\'IVM"v-......
AS
of the zero crossing detector
±Vs"" ±VD Rl;2 R2
Adjust ____ ,..~..."."
10 k
Vee
+VS_~
-v:=j21
R7
13'
/
R3
R4
o
TA OS.,
Temperature Sensor
MOTOROLA LINEAR/INTERFACE DEVICES
2-211
~::
II
II
W~
II Time
~
MC340S, MC3S0S
II
FIGURE 17 - "NOR" GATE
FIGURE 16 - LSTTL to CMOS INTERFACE WITH HYSTERESIS
r--~--"""---"---<>
Vee
+ 15 V
A
B
e
D
2.4 k
10 k
I
LSTTL
I
Level Shift
CMOS
VIL= 1.17V
G= A+B+C+D
VIH = 1.80 V
*The same configuration may be used with an Op Amp
if the 3 k resistor is removed.
*The same configuration may be used with an Op Amp
if the 3 k resistor is removed.
MOTOROLA LINEAR/INTERFACE DEVICES
2-212
®
MC3430
thru
MOTOROLA
MC3433
QUAD DIFFERENTIAL VOLTAGE
COMPARATOR/SENSE AMPLIFIERS
The MC3430 thru MC3433 high-speed comparators are ideal for
application as sense amplifiers in MOS memory systems. They are
specified in a unique way which combines the effects of input offset
voltage, input offset current, voltage gain, temperature variations
and input common-mode range into a single functional parameter.
This parameter, called Input Sensitivity, specifies a minimum differential input voltage which will guarantee a given logic state. Four
variations are offered in the comparator series.
The MC3430 and MC3431 versions feature a three-state strobe
input common to all four channels which can be used to place the
four outputs in a high-impedance state. These two devices use
active-pull-up MTTL compatible outputs. The MC3432 and MC3433
are open-collector types which permit the implied AND connection.
The MC3430 and MC3432 versionsare specified for a ±7.0 mV input
sensitivity over the 0 to 70 0 C temperature range, while the MC3431
and MC3433 are specified for .±12 mV.
QUAD HIGH SPEED
VOLTAGE COMPARATORS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
,-,L SUFFIX
CERAMIC PACKAGE
CASE 620-10
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
CONNECTION DIAGRAM
• Propagation Delay Time - 40 ns
• Outputs Specified for a Fanout of 10 (MC7400 type loads)
• Specified for all conditions of ±5% Power Supply Variations,
Operating Temperature Range, Input Common-Mode Voltage
Swing from -3.0 V to 3.0 V, and RS';;;; 200 ohms.
FIGURE 1 - A TYPICAL MOS MEMORY SENSING APPLICATION FOR A
4-K WORO BY 4-BIT MEMORY ARRANGEMENT EMPLOYING
1103TYPE MEMORY OEVICES
TRUTH TABLE
MC3430 and MC3432
Strobe Output
Input
VID~7.0mV
TA = Oto
Off
Off
Jooe
'" 7.0mV
TA'" Oto JOoe
Off
L
V,o'-7.0mV
Z
On
Off
e
TRUTH TABLE
MC3431 and MC3433
Strobe Out ut
Input
vlO ~'2 mV
-z
Off
Off
TA=Oto70oC
.12 mV E;;.v1O
Off
MC3430
MC3432
Device
MC3431
MC3433
MC3433
MC3431
VID "-12 mV
TA'"'Oto70oC
H
L = Low Logic State
H = High Logic Stete
4-k word by 16-bit memory system.
MC3432
MC3431
I
"' ... 12mV
T A ~ 0 to 700C
Only four devices are required for a
MC3432
MC3430
-7.0mV'VIO
T A = Ota 70 0
Device
MC3430
On
Off
MC3433
Z"" Tnlrd (High Imp-.:ience)
I .. Indeterminete Stete
RS",200n
MOTOROLA LINEAR/INTERFACE DEVICES
2-213
1.1
II
MC3430 thru MC3433
MAXIMUM RATINGS (TA = 0 to +700C unless otherwise noted I
Symbol
Value
Unit
VCC, VEE
±7.0
Vdc
Differential Mode Input Signal Voltage Range
VIDR
:1:6.0
Vdc
Common-Mode Input Voltage Range
VICR
±S.O
Vdc
Strobe Input Voltage
VIISI
5.5
Vdc
+7.0
Vdc
Rating
Power Supply Voltage
Output Voltage (MC3432 - 33 versionsl
Vo
Junction Temperature
Ceramic Package
TJ
175
150
°c
o to +70
°c
-65 to +150
°c
Plastic Package
Operating Temperature Range
TA
T stg
Storage Temperature Range
RECOMMENDED OPERATING CONDITIONS (TA = Oto +700 C unless otherwise noted I
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Vdc
-
Power Supply Voltages
10l
-
Differential-Mode Input Voltage Range
VIDR
-5.0
Common-Mode Input Voltage Range
VICR
-3.0
Input Voltage Range (any input to Ground)
VIR
-5.0
Output Load Current
-
16
mA
+5.0
Vdc
+3.0
Vdc
+3.0
Vdc
ELECTRICAL CHARACTERISTICS (Vce ~ +5.0 Vdc, VEE ~ -5.0 Vdc, TA ~ ooe to + 70°C unless otherwise noted.)
Typical Values are Measured at TA ~ 25°C
MC3430, MC3431
Symbol
Characteristic
Input Sensitivity (See Discussion on Page 3)
Min
Typ
MC3432, MC3433
Max
Min
Typ
Max
(RS .;; 200 Ohmsl
(Common Mode Voltage Range = -3.0 V ~Vin ~3.0 V)
{MC3430, MC3432
4.75';;VCC';;5.25V TA = 25°C
-4.75 ;;>VEE ;;>-5.25 V
MC3431, MC3433
Unit
mV
VIS
-
-
:1:6.0
±10
-
-
-
:1:6.0
±10
-
-
±7.0
±12
-
-
±7.0
±12
(Common Mode Voltage Range = -3.0 V ~Vin ~3.0 V)
4.75';; VCC ';;5.25 V T
-4.75;;>YEE ;;>-5.25 V A
1
= 0 to
700C MC3430, MC3432
MC3431, MC3433
Input Offset Voltage
2.0
2.0
VIO
mV
(RS';; 200 Ohmsl
Input Bias Current
(VCC" 5.25 V, VEE
MC3430, MC3432
MC3431, M C3433
VI
I nput Offset Current
110
Voltage Gain
Avol
Strobe Input Voltage (Low State)
Strobe Input Voltage (High Statel
Strobe Current (Low State)
(VCC
= 5.25
V, VEE
= -5.25 V,
Vin
= 0.4 VI
Vin
Vin
= 2.4 VI
= 5.25 VI
Strobe Current (High State)
(VCC
(VCC
= 5.25
= 5.25
V, VEE
V, VEE
= -4.75
VEE
= 4.75
= 4.75
V, VEE
= -4.75
V, Vo
Output Current Short Circuit
(VCC = 5.25 V, VEE
-
20
20
40
40
1.0
-
.1200
-
~A
V/V
VILISI
VIH(SI
-
0.8
-
-
0.8
V
2.0
-
-
2.0
-
V
Ill(SI
-
-
-1.6
-
-
-1.6
mA
-
-
40
1.0
-
-
40
1.0
mA
VOH
2.4
-
-
-
-
-
V
VOL
-
-
0.4
-
-
0.4
V
ICEX
-
-
-
-
-
250
~A
los
-18
-
-70
-
-
-
mA
loff
-
-
40
-
-
-
~A
ICC
lEE
-
45
-17
60
-30
-
45
-17
60
-30
mA
mA
~A
= 5.25
VI
= -5.25 VI
High Logic level Supply Currents
(VCC
1.0
1200
-
= -5.25 VI
Output Disable Leakage Current
(VCC = 5.25 V, VEE
40
40
VI
Output leakage Current
(VCC
20
20
VI
Output Voltage (Low State)
= 16 mA, VCC = 4.75 V,
-
IIH(SI
= -5.25 V,
= -5.25 V,
Output Voltage (High State I
110 = -400 ~A, VCC = 4.75 V, VEE
110
~A
118
= -5.25
= 5.25 V, VEE = -5.25 VI
-
MOTOROLA LINEAR/INTERFACE DEVICES
2-214
MC3430 thru MC3433
A UNIOUE FUNCTIONAL PARAMETER FOR COMPARATORS
0.4 V). If 2.0 mV are required at the input terminals to induce
this change in logic state, the voltage gain \/IIOuld be 1000 V/V.
Gain however is not the only factor affecting the logic transition. Normally input offset voltages, that are not externally
nulled, can add an appreciable error that drastically overshadows
the comparator gain. Therefore, the 2.0 mV for example, required
to cause the logic transition is often masked. An input offset
voltage of up to 7.5 mV might be required to reach the linear
region. A further consideration is the input offset current of up to
±10 JJ.A flowing through the matched 200-0hm source resistors at
the input terminals which can create an additional error of ±2.0
mV. In order to determine a worst case input sensitivity, it must
be assumed that mini,num specified gain and maximum specified
offset voltage and current conditj~ns exist. Also it must be assumed that these three factors are cumulative, requiring a worst
case input of:
Logic Transition"" 2.0 mV
A unique approach is used in specifying the MC3430-33quad
comparators. Previously, comparators have been specified as linear
devices with common operational amplifier type parameters such
as voltage gain (Avol), input offset voltage (VIOl. input offset
current (110) and common-mode rejection ratio (eMRRl. This is
true despite the fact that most comparators are seldom operated in
their linear region because it is difficult to hold a high gain com-
parator in this narrow region. Comparators are normally used to
"detect" when an unknown voltage level exceeds a given reference
voltage.
The most desirable comparator parameter is what minimum dif-
ferential input voltage is required at the comparator's input terminals to guarantee a given output logic state. This new and important parameter has beef" called input sensitivity (VIS) and is
analagous to the input threshold voltage specification on a core
memory sense amplifier. The input sensitivity specification includes the effects of voltage gain, input offset voltage and input
offset current and eliminates the need for specifying these three
parameters.
In order to make this parameter as inclusive as possible on the
MC3430-33 series quad comparators, the input sensitivity is specified within the following conditions;
Commercial Temperature Range - 0 to 700 C
Power Supply Variations - ±5% (alt conditions)
Input Source Resistance - ~200 Ohms
Common-Mode Voltage Range - -3.0 V to +3.0 V
Note; Typical values have been included on the omitted parameters
for applications where the offset voltages are externally nulled.
Voltage gain is defined as the ratio of the resulting Do Vo to a
change in the VIOR using conditions at which the V,O and '10
are nulled. Thus, for worst case MTTL logic levels, the required
output voltage change is 2.0 V (VOHmin - VOLmax "" 2.4 V -
VIO
~
7.5 mV
110 of ±10 JJ.A thru 200-0hm resistor"" 2.0 mV
Therefore,2+7.5+2= 11.5mV.
The effects of power supply voltage variations, temperature
changes and common-mode input voltage conditions have not
~en considered, as they are not present in the gain and offset
specifications on most comparators.
Thus, the input sensitivity specification greatly reduces the
effort required in determining the worst case differential voltage
required by a given comparator type.
Table J compares the worst case input sensitivity of three
popular comparator types at both room temperature and over the
specified commercial temperature range (0 to 700 C). This sensitivity was computed from the specified voltage gain, offset voltage
and offset current limits.
TABLE I - WORST CASE COMPARISONS
TA
V,O Avo'*
mV V!V
Type
Number
Mox
Typ
Differential Input
Voltage Requrred
for 3.0 V Output
Change
RS
=
'0
TA = 0 to 700 e
25°C
',0200 n
"A
Max
Error Voltage
Generated Into
200 n Source
Resistors
V,O Avol·
mV V!V
Total
SenSitivity
mV
MC3430.
MC3432
Typ
Max
Differential Input
Voltage Required
for 3.0 V Output
Change
',0
Error Voltage
RS=200n Generated Into
200.n Source
~A
Max
Resistors
Total
Sensitivity
mV
6.0
MC3431,
MC3433
7.0
10
MC1711C
1500
50
75 200 k
LM311
12
2.0mV
15
3.0mV
10
5.0
1000
30mV
25
5.0 mV
13
0015 mV
60··
0.0012 mV
7.516
10
100 k
0.030 mV
70·"
0.014 mV
10.04
"Typical values given, as minimum galO not always speCified
'*110 measured in nA
FIGURE 3 - GUARANTEED OUTPUT STATE versus
INPUT VOLTAGE
FIGURE 2 - GUARANTEED OUTPUT STATE versus
DIFFERENTIAL INPUT VOLTAGE
.5
>~
o
~
-
Uncertainty
Region
MC3430
.0-- _ . MC3432
I
I
VOH
AU deVice
types
I
. 5 - -Uncertainty
_
-
w
I--
.01--
>
.5l--Guaranteed
MC3431
MC3433
~o"
1 I-
M~~~30
>
I- 10nii
Only
',,-
O. 5
Guaranteed
VOL All device types
I-I--
-f---
-3.0 V" V'CR <; 3.0 V
4.75 V" VCC" 5.25 V
-4.75 V" VEE"
ODe
0;:;;
~,5~
T A';;;; JOoe
RS"200n
-35 -30 -25 -20 -15 -10 -5
10 15 20
DIFFERENTIAL INPUT VOLTAGE ImV)
25
~
2. Of-----
~
1. 0
unde~ermmed
Region
!Expanded
Scale)
30
~
Of--- I-
>
f-
~
1.
VOH
"
> -3. 0
-4. 0
-4.0
L,·. ~''"''''
State
0
iii -2. 0
35
~...;.?~
Guaranteed
o
~,~'-
State
Vin(B)~
VinlA)
Vout
RS<;200n
-
f-- -3.0 V" VICR" 3.0 V
ooe~
TA 0;:;; JOoe
4.75 V" VCC" 5.25 V
-4.75 V" VEE" -5.25 V
2.0
-1.0
1.0
Vin(Al,INPUT VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-215
+
+--+=--
Guaranteed
VOL
k'
-3.0
!_,.,,-'
~. ",,,,....l"
I
~
MC3432 - I--
M~~4L30
1. 01- MC3432
6
-
Guaranteed_
o
--I-
3. 0
t 1
Region
'"!:;«
0
-
Guaranteed
2.0
3.0
4.0
II
MC3430 thru MC3433
II
SWITCHING CHARACTERISTICS IVee = +5.0 Vdc, VEE = -5.0 Vdc, TA = +25 0 e unless otherwise noted.1
MC3430, MC3431
Characteristic
Symbol
Fig.
High to Low Logic Level Propagation Delay
Time (Differential Inputs) 5.0 mV + VIS
tPHLIDI
6,8-11
Low to High logic Level Propagation Delay
tPLH(DI
6,8-11
Open State to High Logic Level Propagation
Delay Time (Strobel
tPZH(SI
High Logic Level to Open State Propagation
Min
MC3432, MC3433
Typ
Max
Min
Typ
Max
Unit
20
45
-
27
50
ns
-
33
55
-
40
65
ns
4
-
-
35
-
-
-
ns
tPHZ(S)
4
-
-
35
-
-
-
ns
tpZL(S)
4
-
-
40
-
-
-
ns
Low Logic Level to Open State Propagation
Delay Time (Strobe)
tPLZ(SI
4
-
-
35
-
-
-
ns
High Logic to Low Logic Level Propagation
Delay Time (Strobe)
tPHLISI
5
-
-
-
-
-
40
ns
Low Logic to High Logic Level Propagation
tPLHISI
5
-
-
-
-
-
35
ns
Time (Differentiallnputsl 5.0 mV + VIS
Delay Time (Strobe)
Open State to Low Logic Level Propagation
Delay Time (Strobe)
Delay Time (Strobe)
TEST CIRCUITS
FIGURE 4 - STROBE PROPAGATION DELAY TIMES tPLZ(S), tPZL(S), tpHZ(S), and tPZH(S)
+5.0 V
V1
tplZ(S)
100 mV
tpZl(S)
100mV
tpHZ(S)
GNO
GND
tpZH(S)
V2
GND
GND
51
52
Closed
Closed
15 pF
Closed
Open
50 pF
100 mV
Closed
Closed
15 pF
100mV
Open
Closed
50 pF
CL
C L includes jig and probe capacitance.
Ejn waveform characteristics:
tTLH and tTHL ..; 10 ns measured 10% to 90%.
PRR'" 1.0 MHz
Dutv Cvcle '" 50%
Output of Channel B shown under test,
other channels are tested similarlv_
tpLZ(S)
~ E;n 3.:: -----
tPHZ(S){ E;n 3.: :-----__- - - " " . 5 V
VOH---~rr----~~
{ EO
".------T
EO
~---!:::::1.5V
3.0V---~
tPZL(S){E;n3'::~
E;n
tpZH(S) {
5.0V-VD,
EO
EO
1.5 V
VOL--------~------
-::::.j 50~tPZH
'::----J "'"'"
1.5 V
OV
MOTOROLA LINEAR/INTERFACE DEVICES
2-216
MC3430 thru MC3433
FIGURE 5 - STROBE PROPAGATION DELAY tPLH(SI AND tPHL(SI
+5.0 V
Em
+100 mV
------..--<8
+3DVd:h----So%
OV
~~L:_~~--__
tpHL(S)
390
~>-H----+-4EO
EO
H>-H-4-5.0 V
15 V
VOL
1
15 pF
(Tots II
E;n waveform characteristics:
tTLH and tTHL ~ 10 ns measured 10% to 90%.
PRR = 1.0 MHz
Duty Cycle = 50%
Output of Channel B shown under test, other channels are tested Similarly.
FIGURE 6 - DIFFERENTIAL INPUT PROPAGATION DELAY tpLH(DI AND tpHL(DI
+5.0 V
VREF ______~--o~
Ejn waveform characteristics:
tTLH and tTHL '" 10 ns measured 10% to 90%.
Output of Channel B shown undef test, other channels are tested similarly
Device
S1 at" A" for MC3430, MC3431
S1 at "s" for MC3432. MC3433
CL = 50 pF total for MC3430, MC3431
CL = 15 pF total for MC3432, MC3433
PRR '" 1.0 MHz
VREF mV
MC3430
MC3431
MC3432
MC3433
Duty Cycle
~
60%
11
15
11
15
FIGURE 7 - CIRCUIT SCHEMATIC
(1/4 Circuit Shown)
VccO--~--1~--~---<~---~-----~---"-----~-
850
4k
190
850
1.6 k
~--+---~ OUTPUT
r---~--_4-,---+----------~~----4--i----
__.-,\ .>.
VOL
200 mV
IDa mV
tTLH ~ 0.5 I"'
-20
::v
10mV
\\l\
\n
,~
100lmV
5.0 ~V
100 mV
o
20mV
\~\\I\
/' ./I 1/"'-I
:>
VCC =+5.0 V
VEE = -5.0 V
TA = 25°C
50
40
17
5mV
tTIHL
~
~
/
I
5.0 V
1/ 0/
II
100 mV
t--
(/
f-
~ 1/
,\
·
1'..lOmV_
f-J 7.
1//17
1'.. 5.0mV- I-J/
20mV- f--
V
\ Ik
I I
II: 1/
,
I
VCC =+5.0 V
VEE = -5.0 V
TA = 25°C
10mV- f--
V
\
5mV- I -
\.V
·\
\ ,\
V' 1\ J\
\00 ~V
\ 1\
· \
K
~o my
1// 1/
Vo L
Va L
200 mV
100 mV
100 mV
tT\H~~.5"'
0
-10
10
20
TIME I",)
30
40
50
~
2. 5
'"
-10
10
TIME I"~
0
;
/'
I.........
"
MC~~W33- r-Md:~~.31
'\.
1 f--
5
.....
!
~
1.
i
1.
o
";::
5
~
--"
5
/
VCC=!,OV
tPHl
VEE = -5.0 V
tPHL
I--- MC343o·31- MC3432·33
tVref::: 100 mV
5. o t-Overdnve:: 100 mV
0
01-
--
O. 5
0
-25
50
~ r-
20
w
I-
40
30
I
- --
",
20
FIGURE 13 - RESPONSE TIME versu, TEMPERATURE
5
3. 5
:;;
I
-20
60
FIGURE 12 - AVERAGE INPUT OFFSET VOL TAGE
versus TEMPERATURE
3. 0
tTHL""'O.5ns
25
50
AMBIENT TEMPERATURE 1°C)
75
0
-20
100
I
I
20
40
AMBIENT TEMPERATURE 1°C)
MOTOROLA LINEAR/INTERFACE DEVICES
2-218
60
BO
MC3430 thru MC3433
II
APPLICATIONS INFORMATION
FIGURE 14 - 4-BIT PARALLEL AID CONVERTER
22
lN9 14
0'
IV
equ
51
~."
2N3904or equiv.
~,Vref
10k
;0= iii.
.lo=60mA
lEach Compa,.,o,
=
+ 8) Ie + OJ (e + F) (i=I + J) (i< + L)
1/4 of MC3432
22
'" (0 + J) O'J)
2 3 ",
Conversion Time
~
=::: 50 n5
~~s
+
RhR
~
h-!L
RlL
~
R
~
R
h-!L
RlL
~
R
GQ=
R
R
R
R
~
P
T
N
h>
M
L
L
Lc
K
R
~
R
~
R
'"71-
R
LfL:::
~
~
J
~
H
~ F
~ E
~
N) (p + A) IS)
5.0 V
J
R
R
(M +
2"1", (8 + OJ IF + J) (C + N) (A)
3.0 V
*0.1 JJ.F
>-])
l--j)
J
:--1)
0
~
C
i1
~
B
~OOB~
--:I
A
R ,- 3.0
n ± 5%
MC30Q4
MOTOROLA LINEAR/INTERFACE DEVICES
2-219
2 70
MC3430 thru MC3433
II
FIGURE 16 - TRANSFER CHARACTERISTICS AND
EQUATIONS FOR FIGURE 15
FIGURE 15 - LEVEL DETECTOR WITH HYSTERESIS
Vref
I
3
Vlow
iii
....
V out
..J
Vhigh
-
0
~
0
>
-r-VH
0
R2
3
4
Vin (VOLTS)
Vref
AS
~
R1 R2
R1 + R2
V'
high
=
Vlow
=
+ R2 [VO(max) - VREFJ
V
R1 + A2
ref
V
ref+
R2 [VO(min) - VREFI
R1 + R2
Hvsteresis Loop (V h)
2
Vh = Vhigh - Vlow = A1: A2 (VO(max) - VO(min)}
FIGURE 11 - DOUBLE ENDED LIMIT DETECTOR
FIGURE 18 - VOLTAGE TRANSFER FUNCTION
+5.0 V
V out
1k
+----Ic-.4;) V out
-Vin
-
4.0V
-
3.0 V
-I-
2.0 V
-
1.0V
:::::::::~______to~.~o~v~__~:::::::
Vref (low)
MOTOROLA LINEAR/INTERFACE DEVICES
2-220
5.0
V ref (high)
+Vin
ORDERING INFORMATION
Device
Temperature Range
Package
-40"C to +85"C
D"C to + 70"C
O"C to + 7D"C
O"C to + 70"C
D"C to + 70"C
Plastic DIP
50-8
Metal Can
Plastic DIP
Ceramic DIP
MC3358Pl
MC3458D
MC3458G
MC3458Pl
MC3458U
MC3558G
MC3558U
- 55°C to
+ 125"C
-55"Cto +125"C
MC3458
MC3558
MC3358
Metal Can
Ceramic DIP
Specifications and Applications
Information
DUAL DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS
DUAL LOW POWER OPERATIONAL AMPLIFIERS
Utilizing the circuit designs perfected for recently introduced
Quad Operational Amplifiers, these dual operational amplifiers
feature 1) low power drain, 2) a common mode input voltage range
extending to groundIVEE, 3) Single Supply or Split Supply operation
and 4) pin outs compatible with the popular MC1558 dual operational
amplifier. The MC3558 Series is equivalent to one-half of a MC3503.
These amplifiers have several distinct advantages over standard
operational amplifier types in single supply applications. They can
operate at supply voltages as low as 3.0 Volts or as high as 36 Volts
with quiescent currents about one-fifth of those associated with the
MC1741 Ion a per amplifier basis). The common mode input range
includes the negative supply, thereby eliminating the necessity for
external biasing components in many applications. The output voltage
range also includes the negative power supply Voltage.
•
•
•
Short Circuit Protected Outputs
True Differential Input Stage
Single Supply Operation: 3.0 to 36 Volts
•
•
•
•
Low Input Bias Currents
Internally Compensated
Common Mode Range Extends to Negative Supply
Class AB Output Stage for Minimum Crossover Distortion
SILICON MONOLITHIC
INTEGRATED CIRCUIT
G SUFFIX
METAL PACKAGE
CASE 601-04
Vee
•
Single and Split Supply Operations Available
•
Similar Performance to the Popular MC1558
VEE/Gnd
ITopView)
MAXIMUM RATINGS
Rating
Symbol
Value
VCC
VCC
VEE
V,DR
36
+18
-18
i30
Vdc
V,CR
:1:15
Vdc
"F
50
mA
Unit
Single Supply
Split Supplies
Input Differential Voltage
Range
(1)
Input Common Mode Voltage
Range 121
Input Forward Current
IV,
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC3458, MC3358 Only)
Vdc
Power Supply Voltages
< -0.3 VI
Junction Temperature
°c
TJ
175
150
Ceramic and Metal Packages
Plastic Package
Storage Temperature Range
Ceramic and Metal Packages
Plastic Package
T stg
Operating Ambient Temperature Range
TA
MC3558
MC3458
MC3358
uw_
CERAMIC
PACKAGE
CASE 693-02
°c
-£5 to +150
-55 to +125
"
°c
-55 to + 125
o to +70
-40 to +85
(1) Split Power Supplies.
(2) For Supply Voltages less than ± 15 V, the absolute m.aximum input voltage is equal to
the supply voltage.
MOTOROLA LINEAR/INTERFACE DEVICES
2-221
8.
~
8
1
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
II
II
MC3458, MC3558, MC3358
(For MC3558, MC3458.
Vee = +15 V, VEe = -15 V. T A" 2SoC unless otherwise noted'!
(For MC3358.
Vee" +14 V, Vee = Gnd.
ELECTRICAL CHARACTERISTICS TA = 2SoC. unless otherwise noted'!
MC3558
CMracteri.tic
Symbol
Min
Input Offset Voltage
TA '" Thigh to Tlow (1)
Input Offset Current
TA" Thigh to Tlow
Large Signal Open-Loop Voltage Gain
Va'" tID V, RL = 2.0 kCl,
Me3458
TV>
2.0
M..
30
50
200
Min
5.0
6.0
MC3358
TV>
20
M..
30
50
200
Min
10
12
TV>
2.0
30
8.0
10
75
nA
2SO
V/mV
AVOl
50
25
TA = Thigh 10 Tlow
Input Bias Current
mV
"B
TA '" Thigh 10 Tlo .....
Output Impedance
f = 20Hz
200
300
-200
-300
20
0.3
-200
-soo
nA
-1000
-BOO
75
1.0
200
15
500
-200
75
Input Impedance
20
200
15
-500
-1500
75
n
Mn
03
1.0
0.3
1.0
-12
'10
-10
-13 5
!,3
12
10
10
12.5
12
f'" 20 Hz
Output Voltage Range
v
VOR
AL=lOkn
AL" 2.0kU
AL '" 2.0 kfl. T A = Thigh toTlow
Input Common-Mode Voltage Range
VieR
CMRR
Common-Mode Rejection RatiO
RS 0;;; 10kfl
Power SuppiV Current IV o =
-12
'135
-10
'13
!'O
+13 V VeE +13 5V-VEE
70
90
Q)
Rl" ""
Individual Output Short-Circuit Current
"0
(2)
Positive Power Supply ReJection RatiO
PSRA+
Negative Power Supply Rejection RatiO
PSAR-
70
70
90
16
22
16
3.7
·30
-45
~20
~45
30
30
150
30
30
150
150
!
10
dB
90
16
3.7
!30
t45
30
150
mA
~VIV
~VIV
150
50
50
so
10
10
10
BWp
9.0
9.0
9.0
BW
10
10
1.0
Average Temperature Coefficient of Input
Offset Current
T A" Thigh to Tlow
Average Temperature Coefficient of Input
Ofhet Voltage
Power Bandwidth
AV" " Rl "2.0 kH. V o " 20 VIp-pI,
+13V-VEE +135V-VEE
THO = 5%
Sma!!-Signat BandWIdth
AV = " Al" 10kn, Vo " 50mV
Slew Rate
AV" ',V, "'-10V to +10V
Rise Time
AV" I,RL = 10 kH, V o = SOmV
Fa!! Time
AV ~ I,AL '" 10kn, V o " SOmV
Overshoot
AV'" " RL '" 10 kH. V o " 50mV
Phase Margin
AV '" 1, RL '" 2.0 kn, Cl = 200pF
Crossover Distortion
(Vin ~ 30mVp.p, V oul
f'" 10 kHz)
SR
06
06
035
035
'THL
0.35
0.35
os
20
20
20
%
60
60
Degrees
1.0
1.0
%
60
..
10
=
V/~s
0.6
0.35
..
0.35
2.0 Vp·p,
(ll Thigh" 125°C for MC35S8, 70°C lor MC345B, BSoC for MC33SB
T,ow • -SSoC lor MC35SB, OOC lor MC345B, _40°C for MC3358
ELECTRICAL CHARACTERISTICS IVCC
=
5 a v, VEE
= Gnd T A = 25°C unless otherWise noted )
MC3458
MC3558
Symbol
Min
Input Offset Voltage
Input Offset Current
Input Bias Current
large-Signal Open-loop Voltage Gain
Rl'" 2.0 kn
Power Supply Rejection Ratio
Output Voltage Range (31
Al c 10 kG, Vce '" 5.0 V
Al"'10kn, S.OV ",VCC",30V
Power Supply Current
TV>
2.0
30
"B
AVOl
-200
20
Min
5.0
50
-500
20
200
PSAR
MC3358
Mox
TV>
2.0
30
Min
10
TV>
2.0
50
-500
-200
200
Unit
10
mV
75
20
200
3~
3.5
VCC -1.7 V
v/mV
1SO
3.3
'cc
I4VIV
VP'P
VOR
Channel Separation
t '" 1.0 kHz to 20 kHz (Input Referencedl
nA
-500
lSO
150
M..
3.5
VCC-1.7 V
2.5
3.3
4.0
-120
3.5
Vee -1.7
2.5
v
7.0
-120
121 Not to exceed maximum package power diSSipation.
131 Output will swing to ground
MOTOROLA LINEAR/INTERFACE DEVICES
2-222
2.5
-120
4.0
mA
dB.
MC3458, MC3558, MC3358
REPRESENTATIVE CIRCUIT SCHEMATIC
IV. of Circuit Shown)
Output
Bias Circuitry
Common to Both
Amplifiers
CIRCUIT DESCRIPTION
INVERTER PULSE RESPONSE
The MC355B Series is made using two internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input devices 024 and
022 with input buffer transistors 025 and 021 and
the differential to single ended converter 03 and 04.
The first stage performs not only the first stage gain
function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance a smaller compensation capacitor (only 5 pFI
can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of 024 and 022_ Another feature of this input
stage is that the input common-mode range can include
the negative supply or ground, in single supply operation,
without saturating either the input devices or the differential to single-ended converter_ The second stage consists of a standard current source load amplifier stage.
The output stage is unique because it allows the output
to swing to ground in single supply operation and yet does
not exhibit any crossover distortion in split supply operation_ This is possible because class AS operation is utilized.
Each amplifier is biased from an internal-voltage regulator which has a low temperature coefficient thus giving
each amplifier good temperature characteristics as well as
excellent power supply rejection.
20,us/div.
MOTOROLA LINEAR/INTERFACE DEVICES
2-223
II
MC3458, MC3558, MC3358
TYPICAL PERFORMANCE CURVES
II
FIGURE 2 - OPEN LOOP FREQUENCY RESPONSE
FIGURE 1 - SINE WAVE RESPONSE
~V· "00
120
1/\ 1\
\
\
.I
~I
~
.1
"
\.
V V
rV
0
........ ~ ~ '-l1li ~ IiIIo.....oI ~ ~
-2 0
1.0
·Note Class AB output stege
produces distortion less sinewave.
~
g
~
0
\
15
10
6
I~
:
0.
>-OVO
2:
/'
w
'"~
Z
./
,/
20
w
'"'"
:;
./
i!:
::>
r--
0
,
'"
0
>
-5. 0
10 k
100 k
1.0M
2.0
f. FREOUENCY (Hz)
,
-35
-15
5.0
25
V
./
4.0
6.0
B.O
10
12
14
16
18
20
FIGURE 6-INPUT BIAS CURRENT ve,susSUPPLY VOLTAGE
~.
VCC = +ISV_
VEE = -ISV
TA = 2SoC -
300
-r---
./
VCC ANO VEE. POWER SUPPLY VOLTAGES (VOLTS)
FIGURE 5 - INPUT BIAS CURRENT vo,... TEMPERATURE
-55
1.0 M
~
0
0
TA" 25'C
-J5
100 k
TA" 25'C
>
~ 10
0
1.0 k
10 k
"- 30
~10k
-15V
+
I III
i'
~ 5. 0
>
1.0 k
f. FREUUENCY (Hz)
FIGURE 4 - OUTPUT SWING versus SUPPL Y VOLTAGE
111111
2:
'"
100
10
50 J.ls/div.
~ 25
w
,
0
FIGURE 3 - I'qWER BANDWIDTH
~
.......
0
r-....
0
o
,
0
\
1
+1'5 ~
VEE = -ISV
TA = 25°C
:--.,
0
I
l
IV
-
J' ~I'
V~CI ~I
t"---r--,
....
B5
105
""'"
1'l
--- --65
170
~
--
""-
45
.~
~
"
0;
~ 160
;;!;
~
150
125
o
2.0
4.0
6.0
10
12
14
16
VCCAND ,VEEI.POWER SUPPLY VOLTAGES (VOLTS)
T. TEMPERATURE ('C)
MOTOROLA LINEAR/INTERFACE DEVICES
2-224
18
20
MC3458, MC3558, MC3358
APPLICATIONS INFORMATION
FIGURE 8 - WIEN BRIDGE OSCILLATOR
FIGURE 7 - VOLTAGE REFERENCE
VCC
50 k
10 k
R2
10 k
10 k
1
R1
Vref
"'"'2 Vee
For
fo" 1 kHz
A'· 16 kH
R1
VO""Al+A2
C "." O.OlIJ.F
R
1
Va "'"2 Vee
FIGURE 9 - HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER
FIGURE 10 - COMPARATOR WITH HYSTERESIS
1
-R
C
R
Hysteresis
"::LEJ-
R2
R1
J\I'''''".....-o--1
V ref ...
Vin ...----Q--1
1
VOL
-R
Vinl
C
~
VinH
Vref
Vinl '" R,R+'R2 (VOL -- Vref) + Vref
R
VinH'"' Rt :'R2 (VOH - Vref) + Vref
eo::: C (1 + a + b) (e2 - el)
H '" R,R+'R2 (VOH - VOL)
FIGURE 11 - BI·QUAD FILTER
1
R
fo'=
R
At
C1
21TRC
100 k
~
QA
R1
R2'-
C
R2
R
Tap
1
Vref =
'2 Vee
100 k
fo=lkHz
Q,10
Bandpass
Output
Vref
Tap" 1
R1
TN"
R2
Cl
---IE------4 Notch Output
l>-o....
Vref
Where
T BP "" Center Frequency Gain
TN '" Passband Notch Gain
MOTOROLA LINEAR/INTERFACE DEVICES
2-225
R,160kSl
C, 0.001 "F
Rl,1.6MSl
R2' 1.6MSl
R3,1.6MSl
MC3458, MC3558, MC3358
II
APPLICATIONS INFORMATION (continued)
FIGURE 12 - FUNCTION GENERATOR
Triangle Wave
1
Vref =
A2
Output
"2 Vee
300 k
v ref
"'--{)-1+
y:.
R3
Me345,~-{)-t-~Ar-1----{)-1
75 k
R1
y,
Me345si>--o--+-....
e
R,
f-~~
if
4CAfR1
R3=A2 R1 ..
R2+A1
FIGURE 13 - MULTIPLE FEEDBACK BANDPASS FILTER
Vee
1
R3
'~C~C
I---.....:H- y,
MC3458
E---evo
Co
R2
CO"'10C
Given
f 0 '" Center Frequencv
A(f o ) = Gain at Center Frequency
Choose Value fa_ C
Then:
o
R3=--7r fa C
R3
A1=---
2 Alfo)
A1 A3
R 2 " -4-Q"2-R:-'~-'-::R:-::3
For less than 10% error from operational amplifier
0 '°<0.1
0
BW
Where fa and BW are expressed in Hz.
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.
MOTOROLA LINEAR/INTERFACE DEVICES
2-226
Square Wave
Output
®
MC3476
MOTOROLA
LOW COST PROGRAMMABLE
OPERATIONAL AMPLIFIER
The MC3476 is a low cost selection of the popular, industrystandard MCl776 programmable operational amplifier. This
extremely versatile operational amplifier features low power
consumption and high input impedance. In addition, the quiescent
currents within the device may be programmed by the choice of
an external resistor value or current source applied to the Iset input.
This allows the amplifier's characteristics to be optimized for input
current and power consumption despite wide variations in operating
power supply voltages.
LOW COST
PROGRAMMABLE
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
G SUFFIX
METAL PACKAGE
CASE 601-04
• ±6.0 V to ±18 V Operation
• Wide Programming Range
• Offset Null Capability
'set
• No Frequency Compensation Required
• Low Input Bias Currents
• Short-Circuit Protection
Inverting Input 2
RESISTIVE PROGRAMMING (See Figure 1.1
R set to NEGATIVE SUPPLY
Rset to GROUND
(Top View)
~
~-
VEE
Rset
"-1:
4
Vee - 0.6
Iset=~
VEE
±6.0
v
±9.0V
±.12 V
±.15 V
'set = 10 IJA
560 kn
820 kn
1.0Mn
1.5Mn
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
:~t
Vee -0 6 -VEE
'set"'---Rset
Typical Aset Values
Typical R set Values
Vee. VEE
6
I set = 15 J.lA
360 kn
560 kn
750 kn
1.0Mn
Vee. VEE
±'6.0 v
±9.0V
±12 v
±15
v
l set = 10 IJA
1.0Mn
1.8Mn
2.2 Mn
2.7 Mn
I set == 15p.A
820 kn
1.2Mn
1.5Mn
2.0Mn
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
~
1
ACTIVE PROGRAMMING
FET CURRENT SOURCE
BIPOLAR CURRENT SOURCE
Non-Inverting Input
7 Vee
2
0-- (Top View)
ORDERING INFORMATION
Temperature Range
Package
MC3476G
o to +70 oC
Matal Can
MC3476Pl
o to +70 o C
MC3476U
a
Device
Pins not shown are not connected.
MOTOROLA LINEAR/INTERFACE DEVICES
2-227
to +70 oC
Plastic DIP
Ceramic DIP
MC3476
MAXIMUM RATINGS (TA = +25 0 e unless otherwise noted.)
Symbol
Value
Unit
Vee. VEE
±18
Vdc
VIDR
±3O
Vdc
VieR
Voff-VEE
Vee. VEE
±0.5
Vdc
'set
200
/lA
V set
(Vee-0.6 V)
to
Vdc
Output Short-Circuit Duration*
ts
Indefinite
s
Operating Ambient Temperature Range
TA
o to 70
°e
Storage Temperature Range
Metal and Ceramic Packages
Plastic Package
Tstg
Junction Temperature
Metal and Ceramic Packages
TJ
Rating
Power Supply Voltages
Input Differential Voltage Range
I nput Common-Mode Voltage Range
Offset Null to VEE Voltage
Programming Current
Programming Voltage
(Voltage from 'set terminal to ground)
Vdc
Vee
°e
-65 to +150
-55 to +125
°e
175
150
Plastic Package
*Short-Circuit to ground with 'set'" 15 J.lA. Rating applies up to ambient temperature of +70 o C.
EQUIVALENT SeHEMATle DIAGRAM
'set
7
r-------------~--------~--4_--~--_.------_.----------~------OVCC
50
INPUTS
100
OUTPUT
50
OFFSET NUll
10k
10k
L-------~----~------~
____
VEE
~~--~------~--------_4------_o4
MOTOROLA LINEAR/INTERFACE DEVICES
2-228
MC3476
ELECTRICAL CHARACTERISTICS IVCC = +15 V. VEE = -15 V. Iset = 151'A. TA = +25 0 C unless otherwise noted.1
Characteristic
Symbol
Input Offset Voltage (AS";;; 10 kn)
TA = +25 0 C
OoC .;;; T A <; 70°C
Min
Typ
Max
-
2.0
Offset Voltage Adjustment Range
VIOR
Input Offset Current
-
-
6.0
7.5
-
18
-
-
2.0
25
25
40
Input Bias Current
15
5.0
-
Mn
2.0
-
pF
V
-
nA
liB
Input Resistance
ri
In put Capac ita nee
Ci
-
VICR
± 10
-
-
50 k
25 k
400 k
-
±12
± 12
±13
TA = +25 0 C
TA = 70°C
TA = OoC
Input Common-Mode Voltage Range
mV
nA
110
TA =+25 OC
TA = 70°C
TA = OoC
Unit
mV
VIO
-
50
50
100
ooc.;;; TA <; 70°C
Large Signal Voltage Gain
R L ;;. 10 kn. Vo = ± 10 V. T A = + 25°C
R L ;;. 10 kn. V 0 = ± 10 V. OoC <; T A <; 70°C
V/V
AVOL
Output Voltage Range
-
V
VOR
+25 0
RL;;' 10 kn. TA =
C
R L ;;. 10 kn. OoC .;;; T A <; 70°C
-
Output Resistance
ro
los
-
1.0
Output Short-Circuit Current
Common-Mode Rejection Ratio
RS <; 10 kn.OoC <; TA';;; 70°C
CMRR
70
90
Supply Voltage Rejection Ratio
PSRR
12
-
kn
mA
dB
25
200
-
160
200
225
-
4.8
-
-
I'V/V
RS <; 10 kn.OoC';;; TA <; 70°C
Supply Current
I'A
ICC. lEE
TA = +25 0 C
OOC .;;; T A .;;; 70°C
Power Dissipation
TA = +25 0 C
OOC <; T A <; 70°C
-
mW
PD
6.0
6.75
Transient Response (Unity Gain)
Vin = 20 mV. RL;;' 10 kn. CL = 100 pF
Rise Time
Overshoot
Slew Rate IRL;;' 10 knl
tTLH
OS
-
0.35
-
10
SR
-
0.8
-
TRANSI ENT·R ESPONSE
TEST CIRCUIT
VOL TAG E OFFSET
NULL CIRCUIT
VEE
Pins not shown are not connected.
MOTOROLA LINEAR/INTERFACE DEVICES
2-229
1'5
%
VII'S
II
II
MC3476
TYPICAL CHARACTERISTICS
(T A
= +250 C unless otherwise noted.)
FIGURE 2 - POSITIVE STANDBY SUPPLY
CURRENT versus SET CURRENT
FIGURE 1 - SET CURRENT versus SET RESISTOR
"'~
VCC=+15V
VEE -15 V
Rsetto VEE
10M
~
o
1
-6V;,VEE;'-15V
~ 100
VCC - +15 V
VEE--15V
~
Rsel}~ GND
t;
+6 V"VCC 0;;;;+15 V
~
~ 1.0M
10
~
~
j
"
~
lOOk
1.0
>
i=
u;
i<
10k
0.1
10
1.0
100
0.1
0.01
1.0
0.1
'set, SET CU RRENT (JJA)
15e t, SET CURRENT
10
100
(~A)
FIGURE 4 - INPUT BIAS CURRENT versus SET CURRENT
100
+6 V" Vee ,,+15 V
-6V;, VEE ;'-15 V
0
O. 1
0.1
0.01
10
1.0
100
Iset, SET CURRENT I~)
FIGURE 5 - SLEW RATE
versus SET CURRENT
FIGURE 6 - GAIN-BANDWIDTH PRODUCT (GBW)
.ersus SET CURRENT
0
~ 1.0M
0
~
S O. 1
~
VCC
VEE
w
ffi
t;
+15 V
-15 V
~
=
VCC-+15V
_
-
VEE
-15V
~ lOOk
b
~
~
0.0 1
10k
;;:
'"
0.00 1
0.01
0.1
1.0
10
1.0k
0.1
100
1.0
1"1, SET CURRENT I.A)
lsel' SET CURRENT
MOTOROLA LINEAR/INTERFACE DEVICES
2-230
10
I~)
100
MC3476
II
TYPICAL CHARACTERISTICS (continued I
(TA = +250 C unless otherwise noted.)
FIGURE 8 - OUTPUT SWING
versus SUPPLY VOLTAGE
FIGURE 7 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
30
VCC=+15V
VEE=-15V
lset '" 15J.1.A
--
0
6
/
?:
2
"'z
1il
8
~
24
«
~ 20
>
2
~
8. 0
>
1.0k
10k
lOOk
6
~
~
lset = 15J.1A
RL=lOk
4.0
RL, LOAD RESISTANCE (OHMS)
L...-
....... V
./
./
o /""
o 2.0
1.0M
,,-
V
4.0
6.0
8.0
10
12
14
Vcc.IVEEI. SUPPLY VOLTAGES (VI
MOTOROLA LINEAR/INTERFACE DEVICES
2-231
16
18
20
II
®
MC4558,
MC4558AC,MC4558C
MOTOROLA
DUAL WIDEBAND OPERATIONAL AMPLIFIER
DUAL WIDE BANDWIDTH
OPERATIONAL AMPLIFIER
The MC4558, MC4558AC, and MC4558C combine all the outstanding features of the MC1458 and, in addition, possess three
times the unity gain bandwidth of the industry standard.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• 2.5 MHz Unity Gain Bandwidth Guaranteed on MC4558 and
MC4558AC
• 2 MHz Unity Gain Bandwidth Guaranteed on MC4558C
G SUFFIX
METAL PACKAGE
CASE 601-04
• Internally Compensated
• Short-Circuit Protection
• Gain and Phase Match between Amplifiers
• Low Power Consumption
VCC
MAXIMUM RATINGS
ITA = +25 0 C unless otherwise noted)
Rating
Power Supply Voltage
Input Differential Voltage
Symbol
MC4558
MC455BAC
MC4558C
Unit
VCC
+22
+18
Vdc
VEE
-22
-18
VID
Volts
Volts
Input Common Mode Voltage (Note 1)
VICM
±15
Output Short-Circuit Duration (Note 2)
IS
Continuous
Operating Ambient Temperature Range
TA
See Ordering
I nformation Below
Storage Temperature Range
-6510+150
-5510 +125
Plastic Package
Junction Temperature
°c
T stg
Metal and Ceramic Packages
Note 1.
Note 2.
°c
TJ
175
150
Metal and Ceramic Packages
Plastic Package
VEE
Vdc
±30
(Top View)
~
P1SUFFIX
PLASTIC PACKAGE
CASE 626-05
8
U~UFFIX
CERAMIC PACKAGE
CASE 693-02
~
8
1
For supply voltages less than ± 15 V, the absolute maximum input voltage is equal
to the supply voltage.
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
Short circuit may be to ground or either supply.
EQUIVALENT CIRCUIT SCHEMATIC
(1/2 of Circuit Shown)
ORDERING INFORMATION
Input
25
t----io-OOutput
Device
MC4568G
MC455aU
-5510 +125'C
Package
Metal Can
Ceramic DIP
MC4558CD
SO·8
MC4558CG
Metal Can
MC455aACP1,
CPl
MC455aCU
MOTOROLA LINEAR/INTERFACE DEVICES
2-232
Temperature
Range
oto
+7O'C
Plastic DIP
Ceramic DIP
MC4558, MC4558AC, MC4558C
FREQUENCY CHARACTERISTICS (VCC -
-
+15 V VEE -
-15 V TA - 25°C)
MC4558C
MC4558. MC4558AC
Characteristic
Unity Gain Bandwidth
ELECTRICAL CHARACTERISTICS
Symbol
Min
I
Typ
I
Max
Min
1
Typ
I
Max
Unit
BW
2.5
I
2.8
I
-
2.0
I
2.S
I
-
MHz
6.0
mV
nA
(VCC = 15 V. VEE = -15 V. TA = 25°C unless otherwise noted.)
Input Offset Voltage
IRS';; 10 knl
-
Via
1.0
5.0
-
20
200
80
500
nA
0.3
2.0
-
Mn
2.0
Input Offset Current
110
200
liB
-
20
Input 8ias Currentt
SO
500
Input Resistance
ri
0.3
2.0
-
1.4
±13
-
pF
±12
V/mV
Input Capacitance
-
1.4
±12
±13
-
50
200
-
20
200
-
75
-
n
70
90
-
dB
Ci
Common Mode Input Voltage Range
VICR
Large Signal Voltage Gain
IVa = ±10 v, RL = 2.0 knl
V
Av
Output Resistance
Common Mode Rejection Ratio
ro
-
75
CMRR
70
90
-
PSRR
-
30
150
±12
±14
±13
-
±12
±10
IRS';; 10 kHI
Supply Voltage Rejection Ratio
30
150
I'VN
±14
±13
-
V
IRS';; 10 kHI
Output Voltage Swing
Va
IRL"10knl
IRL"2knl
±lO
Output Short-Circuit Current
los
10
20
40
10
20
40
mA
Supply Currents (Both Amplifiers)
10
-
2.3
5.0
-
2.3
5.6
mA
Power Consumption (Both Amplifiers)
Pc
-
70
150
70
170
mW
tTLH
as
SR
-
0.3
15
-
-
1.5
1.6
-
1.0
0.3
15
1.6
-
%
VII's
=
-15 V, TA
7.5
mV
nA
Transient Response (Unity Gain)
IVI
IVI
IVI
= 20mV, RL" 2kH, CL';; 100pFI Rise Time
= 20mV, RL" 2 kH, CL';; 100 pFI Overshoot
= 10 V, RL" 2 kn. CL';; 100 pFI Slew Rate
ELECTRICAL CHARACTERISTICS (VCC
=
+15 V, VEE
Input Offset Voltage
Via
I'S
= 'Thigh to Tlow unless otherwise noted).
-
1.0
6.0
-
-
-
7.0
85
200
500
-
-
-
-
30
300
500
'1500
-
IRS';; 10 kill
I nput Offset Current
110
(TA = Thigh)
ITA = Tlow)
ITA = OoC to +700 CI
Input Bias Current
-
Common Mode Input Voltage Range
-
-
-
-
-
-
-
V
'nA
±12
±13
-
25
-
-
15
-
-
Vim V
CMRR
70
90
-
-
-
-
dB
PSRR
-
30
150
-
-
-
"VN
±12
±10
±14
±13
-
.12
±14
±13
-
V
-
4.5
6.0
-
-
135
tSO
-
-
-
-
VICR
Large Signal Voltage Gain
= '10 V,
300
liB
ITA = Thigh)
ITA =Tlowl
IT A = OoC to + 70 0 CI
IVa
-
-
-
800
Av
RL = 2 knl
Common Mode Rejection Ratio
IRS';; 10 kHI
Supply Voltage Rejection Ratio
IRS';; 10 knl
Output Voltage Swing
Va
IRL;;>10 knl
IRL;;> 2 knl
Supply Currents (Both Amplifiers)
10
-
ITA = Thigh)
(TA =Tlow)
Power Consumption (Both Amplifiers)
-
Pc
(TA = Thigh)
ITA
±10
= Tlow)
'Thigh = 1250 C for MC4558 and 70 0 C for MC4558C and MC4558AC.
Tlow = -55°C for MC455S and OoC for MC4558C and MC4558AC.
t liB is out of the amplifier due to PNP input transistors.
MOTOROLA LINEAR/INTERFACE QEVICES
2-233
5.0
6.7
mA
150
200
mW
11
II
MC4558, MC4558AC
FIGURE 2 - RMS NOISE .ersus SOURCE RESISTANCE
FIGURE 1 - BURST NOISE versus SOURCE RESISTANCE
100
_>I000'llllln~~!1
~
_jlHEl~
tt-t-it1::
;:~
.+ +
-
ff
BW-·1.0Hz!o1.0I-..Hz
-1+
.';
+-
!100'11111111
~ ~
-r
:m~tll
c .. i..j
z
-++ .:.:~
1.0
c~
100
10
1
140
120
\
100
""
10
-
IIII
0
AV
~
1
0.0 110
1.0
100
1000
100
10
1.0
t~
10k ~i 100·fhffilf
1.0
FIGURE 4 - SPECTRAL NOISE DENSITY
IIIIII IIII
!
AV~IO.~~~llltiOk"
+'1t
"
-"
~
-
'">-z
'"z
~
10
k
k
JUOk
80
60
40
20
\ '\
I
I
::
: II
,
I
' I!
:
-+-1-4.
I
,
,
i
r---....
I;:
i
: I,i
I
100
RS. SOURCE RESISTANCE 10HMS)
i
!ii
10k
l.Ok
i
i
I'.,
lOOk
1. FREQUENCY IHzl
FIGURE 5 - BURST NOISE TEST CIRCUIT
100 k
Positive
Threshold
To Pass/Fai~
I ndicater
100 k
1 k
100 k
Operational Amplifier
Under Test
Low Pass
Filter
1.0 Hz to 1 kHz
Negative
Threshold
Voltage
Unlike conventional peak reading or RMS meters, this system was
especially designed to provide the quick response time essential to
burst (popcorn) noise testing.
The test time employed is 10 seconds and the 20 J.lV peak
limit refers to the operational amplifier input thus eliminating
errors in the closed-loop gain factor of the operational amplifier
under test.
MOTOROLA LINEAR/INTERFACE DEVICES
2-234
i
I ill
iii II!
10
1.0M
10M
k
RS. SOURCE RESISTANCE 10HMS)
RS. SOURCE RESISTANCE 10HMS)
FIGURE 3 - OUTPUT NOISE versus SOURCE RESISTANCE
,.~
l-+
+1-
~
1 0 _. . . .
c'.:2' +.
,
C
>-
~
"
It
~
>-
+ + +-+-
+- +t
BW = 1.0 HI tu 1.0 kHI
MC4558, MC4558AC, MC4558C
FIGURE 7 - PHASE MARGIN versus FREQUENCY
FIGURE 6 - OPEN LOOP FREQUENCY RESPONSE
- -f--
160
~
+120
z
~
+100
«
'"
'::;
+BO
f--
r-....
>
~
«
+40
~
- - f---
e
z
t'-..
~
«
'"
i'..
t--
W
+20
~
.......
10
100
loOk
10k
lOOk 100M
\
\
100
I\..
BO
UNITY GAIN
60
I\,
40
\
\
o
10M
1.0
10
100
1.0k
10k
f. FREOUENCY IHzl
/'"
--- f--
13
r-
FIGURE 9 - NEGATIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
9.0
~
7.0
~
6
>
~
?
V
ill
/
'"~
!9V
I--- I--
V
3.0
>3 V
10 k
2.0 k
20 k
50 k 100 k
I--
)
t;
o 5.0
6
>
/
1.0 k
9.0
~ 7.0
~ r-
500
V
>
<6V
±15 V SUPPLIES
+12 V
11
o
~
1.0
100
/" ~
13
W
~ ",'"
5.0
3.0
-:;,
'12J
11
'"«
~>
15
±15 VISUPiLiES
~
?~
lOOk 100M 10M
f. FREOUENCY 1Hz)
FIGURE 8 - POSITIVE OUTPUT VOLTAGE SWING
versus LOAO RESISTANCE
15
i\
20
.......
-20
1.0
14 0
~ 120
I'..
+60
0
-...
lBO
+140
~
±6 V
~
1.0
100
RL. LOAO RESISTANCE IOHMS)
±9V
+3 V
500
1.0 k
2.0 k
10 k
20 k
50k lOOk
RL. LOAO RESISTANCE (OHMS)
FIGURE 10 - POWER BANDWIDTH
FIGURE 11- TRANSIENT RESPONSE TEST CIRCUIT
(LARGE SIGNAL SWING versus FREQUENCY)
2B
24
~
?
To Scope
(Input)
20
>-<>--+__......_ ... To Scope
W
'"
~
>
~
~
(Output)
16
12
VOLTAGE FOLLOWER
B.O
6
>
1IIIIIITillii IIIII
4.0
10
II
111111
100
\
I
I'
111111111
1.0k
10k
lOOk
1.0 M
f FREOUENCY 1Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-235
II
ORDERING INFORMATION
Devl..
MC4741L
MC4741CD
MC4741CL
MC4741CP
Temperature Range
Package
-65°C 10 +125"C
O"C 10 + 70"C
QOC 10 + 70"C
QOC 10 + 70"C
Ceramic DIP
50-14
Ceramic DIP
Plastic DIP
MC4741
MC4741C
Specifications and Applications
Information
(QUAD MC1741)
DIFFERENTIAL INPUT
OPERATIONAL AMPLIFIERS
(QUAD MC1741)
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC4741 series is a true quad MC1741. Integrated on a single
monolithic chip are four independent, low-power operational
amplifiers which have been designed to provide operating characteristics identical to those of the industry standard MC1741, and
can be applied with no change in circuit performance.
The MC4741 can be used in applications where amplifier matching
or high packing density is important. Other applications include
high impedance buffer amplifiers and active filter amplifiers.
•
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
Each Amplifier is Functionally Equivalent to the MC1741
DSUFFIX
• Class AB Output Stage Eliminates Crossover Distortion
PLASTIC PACKAGE
CASE 751A-02
• True Differential Inputs
•
SO-14
Internally Frequency Compensated
• Short Circuit Protection
•
Low Power Supply Current (0.6 mA/Amplifier)
PSUFFIX
PLASTIC PACKAGE
CASE 646-06
•
I
PIN CONNECTIONS
EQUIVALENT CIRCUIT SCHEMATIC
(1/4 of Circuit Shown)
Vee
Out
Out
4
I
Inputs
I
Inputt
4
25
VEE
OUTPUT
Inputs
50
2
Inputs
3
Out
2
Out
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-236
3
(Top View)
MC4741, MC4741C
MAXIMUM RATINGS (TA • +25 0 C unless otherwise noted I
Rating
Svmbol
Power Supply Voltage
MC4741
VCC
VEE
Input Differential Voltage
MC4741C
Unit
+22
-22
+18
-18
Vdc
Vdc
VID
±44
±36
Volts
Input Common Mode Voltage
VICM
±22
±18
Volts
Output Short Circuit Duration
.!S.
Operating Ambient Temperature Range
Storage Temperature Range
Ceramic Package
TA
T stg
Continuous
-55 to +125
°c
°c
-65 to +150
-55 to +125
Plastic Package
Junction Temperature
Ceramic Package
o to +70
°c
TJ
175
150
Plastic Package
TYPICAL APPLICATION
HIGH IMPEDANCE INSTRUMENTATION BUFFER/FIL TER
R2
R3
MOTOROLA LINEAR/INTERFACE DEVICES
2-237
II
MC4741, MC4741C
ELECTRICAL CHARACTERISTICS (VCC
= +15 V
VEE = -15 V TA = 25°C unless otherwise noted)
MC4741
Characteristic
MC4741C
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
VIO
-
1.0
5.0
-
2.0
6.0
mV
I "put Offset Current
110
200
-
20
200
nA
liB
r·
-
20
Input Bias Current
SO
500
-
80
500
nA
0.3
2.0
-
0.3
2.0
-
Mil
-
1.4
±15
mV
-
±'12
±13
-
20
200
-
VimV
Input Offset Voltage
(Rs~10k)
Input Resistance
Offset Voltage Adjustment Range
VIOR
-
±15
Common Mode Input Voltage Range
VICR
±'12
±.13
Large Signal Voltage Gain
(Vn=+10V,R ;;>2.0k)
Av
50
200
ro
CMRR
-
75
70
90
PSRR
-
30
±12
±.10
±14
±.13
I "put Capacitance
Ci
Output Resistance
Common Mode Rejection Ratio
(RS~10k)
Supply Voltage Rejection Ratio
(RS~10k)
1.4
150
-
75
90
-
dB
-
30
150
p.VIV
±12
±10
±14
±13
-
20
-
-
3.5
105
7.0
210
0.3
15
0.5
-
V/p.s
Vo
Output Short-Circuit Current
los
-
20
-
Supply Current - (All Amplifiers)
10
-
Power Consumption (All Amplifiers)
Pc
-
2.4
72
4.0
120
tTLH
os
SR
-
0.3
15
0.5
-
-
-
-
-
-
(VI = 10 V,
RL;' 2 k, CL'; 100 pF)
Slew Rate
I nput Offset Voltage
il
V
ELECTRICAL CHARACTERISTICS (V CC= +15V V EE =-15V T A= *TIhiah
Characteristic
V
70
Output Voltage Swing
(RL;;>10 k)
(RL;;>2 k)
Transient Response (Unity Gain - Non-Inverting)
(VI = 20 mV, RL;' 2 k, CL'; 100 pF) Rise Time
(VI = 20 mV, RL ;. 2 k, CL .; 100 pF) Overshoot
pF
-
mA
mA
mW
p.s
%
•
to T low un ess ot erwise note d)
MC4741C
Symbol
Min
MC4741
Typ
Typ
Max
Unit
VIO
-
1.0
6.0
-
-
7.5
mV
-
7.0
85
200
500
-
-
-
-
-
500
1500
-
Max
Min
(RS~10knJ
Input Offset Current
nA
110
(TA = 125°C)
(TA = -55°C)
(T A = OoC to +700 C)
Input Bias Current
300
nA
liB
-
-
300
±'12
±13
-
-
-
-
V
Av
25
-
-
15
-
-
V/mV
Common Mode Rejection Ratio
(Rs~10k)
CMRR
70
90
-
-
-
-
dB
Supply Voltage Rejection Ratio
PSRR
-
30
150
-
-
-
P.V!V
±12
±10
±14
±13
-
-
-
-
-
±10
±13
-
-
2.4
3.6
3.4
5.0
102
150
-
-
-
-
-
-
(TA = 125°C)
(TA = -55°C)
ITA = OOc to +700C)
Common Mode I nput Voltage Range
VICR
Large Signal Voltage Gain
(RL;;>2 k, V out = ±10 V)
30
-
-
800
(RS~lOk)
Output Voltage Swing
(RL;;>10k)
(R ;;>2 k)
Vo
Supply Currents (TA = 125°C)
(TA =-550 C)
10
(AI' Amplifiers)
Power Consumption (TA - + 125'C)
(TA = -55'C)
(All Amplifiers)
Pc
V
mA
-
72
108
'Thlgh - 125°C for MC4741 and 700C for MC4741C
Tlow = -55°C for MC4741 end OOc for MC4741C
MOTOROLA LINEAR/INTERFACE DEVICES
2-238
-
-
-
mW
MC4741, MC4741C
TYPICAL CHARACTERISTICS
(Vee ~ +15Vdc, VEE'" -15 Vdc, TA - +2SoCuntessotherwise noted).
FIGURE 1 - POWER BANDWIDTH
(LARGE SIGNAL SWING versu, FREQUENCY)
lEI
FIGURE 2 - OPEN LOOP FREQUENCY RESPONSE
+12 0
+100
~
~
20r--+-r~~r--+-rrH~r--r1-~~I~\-r1-rH~
~
;~
1\
IBr--+-r~~r--+-rrH~r--r1-~~~+-\~-rH+~
;;:
~ +60
~ 12~-+-r~H#~-+-r~+#~-r4-tH+#~~\4-~~
!:i
~
(VOLTAGE FOLLOWER)
>
1111
'"
~
8.0
~
'"o
r TIIIIIHt--l--+-++++HH-------1\-1\H+tttti
4:,:0~~:~::1:1: 111)il:o~~:~:I:I:I:1':'O:k~~::~:::I:O:k~~::::::'O:O
II:
~
+8 0
z
~
+4 0
g+2 0
k
-20
1.0
10
::r::r.rr
.,5 V SUPPLIES
I
--
',2V
'"
~ 4.0
3.0
2.0
~
I
.-
V.
.9V
;.//
'6 V
I
~
I
I
1.0
100
200
2.0 k
5.0 k7.0 k 10 k
500 700 1.0 k
RL, LOAD RESISTANCE (OHMS)
""-
100 k
-I 5
-I 4
-I 3
-I 2
~-1 I
~ -1 0
~ -9. 0)----·c3 -8. 0
~ -7. 0
~ -6. 0
C/
5 -5. 0
./
o -4. 0
> -3. 0
-2.
-1.
100
200
~r-
I
.,5 V SUPPLIES
I
I
--
-'1'2V
v
.9V
I
.6V
I
i
II
I
500 700 1.0 k
2.0 k
RL, LOAD RESISTANCE (OHMS)
5.0 k 7.0 k 10 k
FIGURE 6 -INONINVER:rING PULSE RESPONSE
~
24~ +27 V
2
+24 V
0
~
to
Z
~
B~
w
+18 V
!; 8. O~
+12 V
a
6. 0
_-
._- f--- f---
.~
---
~
+21 V
'"'"
6
~> 24
~1 0
..
I
II
+15 V
I
00
r\
~UTPUT
\
'r
+9.0 V
> 4. 0
2. 0 - - +6.0 V
+5.0 V
1.0
2.0
3.0
4.0
5.0
6.0
7.0
RL, LOAD RESISTANCE (k!"Jl
B.O
10M
II
FIGURE 5 - OUTPUT VOL TAGE SWING versus
LOAD RESISTANCE (Single Supply Operation)
: +30 V Supply
'"
1.0 M'
FIGURE 4 - NEGATIVE OUTPUT VOLTAGE SWING
versu, LOAD RESISTANCE
FIGURE 3 - POSITIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
-
~
1.0 k
10 k
t, FREQUENCY (Hz)
100
t, FREQUENCY (Hz)
15
14
13
12
1~ I
w
10
to
9.0
~
> 8.0
7.0
~
I- B.O
::>
5.0
0
~
9.0
10
MOTOROLA LINEAR/INTERFACE DEVICES
2-239
\
UT
MC4741, MC4741C
FIGURE 7 - BI-OUAD FILTER
II
R
R
100 k
= OR
R1
Vin
C1
R2
c
C
---11-_~VII\""-~H
'/4
R'
R2~-
R
TSp
MC474'i>-o-....-'W'v-....-o--l'/4
'00 k
MC474'i>--o-.....-'W'v-....-
5
FIGURE 9 -
--
/'"
to
Where
T BP = Center Frequency Gain
TN = Passband Notch Gain
100
5
TRANSIENT RESPONSE TEST CIRCUIT
>-<>-...__....._ _
5
70
2.0
4.0
6.0
8.0
10
12
14
16
18
20
Vee, IVEEI, SUPPLY VOLTAGES (VOLTS)
FIGURE 10 - ABSOLUTE VALUE DVM FRONT END
0.51'F
900 k
'00 k
To Scope
(Output)
V
:>
« 0
o
=1
=1
= '2 Vee
105
~
kHz
c,
j>-o....---IE------e Notch Output
FIGURE 8 - OPEN LOOP VOLTAGE GAIN
Yersus SUPPLY VOLTAGE
'"z
TSp
TN
,
C ~ O.OO'I'F
R'
R2
R3
R3
Output
R'
R2
C
Q ~'O
Bandpass
Vref
=1
Vee
MC4741 Quad Op-Amp
500 k
Bridge Null Adjust
MOTOROLA LINEAR/INTERFACE DEVICES
2-240
®
MC33078
MC33079
MOTOROLA
Advance Information
DUAUQUAD
OPERATIONAL AMPLIFIERS
LOW NOISE
OPERATIONAL AMPLIFIER
The MC33078/9 series is a family of high quality monolithic
amplifiers employing Bipolar technology with innovative highperformance concepts for quality audio and data signal processing applications. This family incorporates the use of high frequency PNP input transistors to produce amplifiers exhibiting low
input voltage noise with high gain bandwidth product and slew
rate. The all NPN output stage exhibits no deadband crossover
distortion, large output voltage swing, excellent phase and gain
margins, low open-loop high frequency output impedance and
symmetrical source and sink ac frequency performance.
The MC33078/9 family offers both dual and quad amplifier versions, tested over the vehicular temperature range and available
in the plastic DIP and SOIC packages (P and D suffixes).
• Dual Supply Operation: ± 18 V (Max)
SILICON MONOLITHIC
INTEGRATED CIRCUIT
MC33078
~
-
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Low Voltage Noise: 4.5 nV/VHz
o SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
• VCC
' Output 2
Output 1 '
• Low Input Offset Voltage: 0.15 mV
Inputs 1 { :
• Low T.C. of Input Offset Voltage: 2.0 /LVrC
.•
-
• Low Total Harmonic Distortion: 0.002%
: } Inputs 2
VEE'
• High Gain Bandwidth Product: 16 MHz
• High Slew Rate: 7.0 V//Ls
MC33079
• High Open-Loop ac Gain: 800 @ 20 kHz
• Excellent Frequency Stability
• Large Output Voltage Swing:
+ 14.1 V/-14.6
V
,.#
•
,
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIERI
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
Output 1 ,
o SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
14
Output 4
Inputs 1 { :
VCC.
" VEE
Inputs 2 { :
"\
Output 2 ,
• Output 3
,
Inputs 3
(Quad, Top Viewl
ORDERING INFORMATION
Op
Amp
Package
Device
Dual
MC33078D
MC33078P
-40"C to SO-8
+85"C Plastic DIP
Quad
MC33079D
MC33079P
-40"C to SO-14
+ 85"C Plastic DIP
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
2-241
Test
Temp.
Range
Function
II
MC33078, MC33079
MAXIMUM RATINGS
Rating
Supply Voltage (VCC to VEE)
Input Differential Voltage Range
Input Voltage Range
Symbol
Value
Unit
Vs
+36
Volts
VIDR
(Note 1)
Volts
VIR
(Note 1)
Volts
ts
Indefinite
Seconds
"C
Output Short-Circuit Duration (Note 2)
Maximum Junction Temperature
Storage Temperature
Maximum Power Dissipation
TJ
+150
Tsto
-60 to + 150
"C
PD
(Note 2)
mW
Notes:
1. Either or both input voltages must not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (See power dissipation performance characteristic, Figure 1).
3. Measured with
Vee
and VEE differentially varied simultaneously.
DC ELECTRICAL CHARACTERISTICS
(VCC ~ +15 V VEE ~ -15 V TA ~ 25"C unless otherwise noted)
Characteristics
Symbol
Input Offset Voltage (RS ~ 10 ll, VCM ~ 0 V, Vo ~ 0 V)
MC33078 TA ~ +25"C
TA ~ - 40"C to + 85"C
MC33079
TA
TA
~
~
Min
Typ
Max
--
0.15
2.0
3.0
+25"C
- 40"C to + 85"C
-
0.15
-
2.5
3.5
Average Temperature Coefficient of Input Offset Voltage
RS ~ 10 fl, VCM ~ 0 V, Vo ~ 0 V, TA ~ Tlow to Thigh
:'VIOI.H
-
2.0
-
Input Bias Current (VCM ~ 0 V, Va ~ 0 V)
TA ~ +25"C
TA ~ -40"C to +85"C
118
-
300
750
800
Input Offset Current (VCM ~ 0 V, Vo ~ 0 V)
TA ~ +25"C
TA ~ -40"C to +85"C
110
Common Mode Input Voltage Range (6.VIO ~ 5.0 mV, Vo ~ 0 V)
VICR
Large Signal Voltage Gain (VO ~ ±10V,RL ~ 2.0kfll
TA ~ +25"C
TA ~ -40"C to +85"C
AVOL
Unit
mV
IVlol
-
,"VloC
nA
.-
-
-
25
nA
",3
:t14
150
175
-
V
dB
90
85
110
-
-
-
Output Voltage Swing (VID ~ ±1.0V)
RL ~ 600 fl
RL ~ 600 II
RL ~ 2.0 kfl
RL ~ 2.0 kll
RL ~ 10 kfl
RL ~ 10 kll
VO+
VOVO+
VOVO+
VO-
Common Mode Rejection (Vin ~ ±13 V)
CMR
80
100
-
dB
Power Supply Rejection (Note 3)
VCCNEE ~ +15VI-15Vto +5.0VI-5.0V
PSR
80
105
-
dB
Output Short Circuit Current (VID ~ 1.0 V, Output to Ground)
ISC
+15
-20
+29
-37
-
-
4.1
-
8.4
-
-
V
Source
Sink
Power Supply Current (VO ~ a V, All Amplifiers)
MC33078 TA ~ +25"C
TA ~ - 40"C to + 85"C
MC33079
TA
TA
~
~
13.2
13.5
-
10.7
-11.9
13.8
-13.7
14.1
-14.6
-13.2
-14
mA
mA
10
+ 25"C
-40"C to +85"C
MOTOROLA LINEAR/INTERFACE DEVICES
2-242
-
5.0
5.5
10
11
MC33078, MC33079
AC ELECTRICAL CHARACTERISTICS (Vcc ~ + 15 V VEE ~ -15 V TA ~ 25'C unless otherwise noted)
Characteristics
~
Slew Rate (Vin
~
-10 V to + 10 V, RL
Gain BAndwidth Product (I
~
2.0 kll, CL
~
100 pF, AV
~
+1.0)
100 kHz)
~
Phase Margin (RL
2.0 kll)
Channel Separation (I
~
20 Hz to 20 kHz)
Power Bandwidth (Va
~
27 Vp_p, RL
Distortion (RL
~
2.0 kll, I
~
~
20 Hz to 20 kHz, Va
~
0 V, I
Differential Input Resistance (VCM
~
0 V)
~
Differential Input Capacitance (VCM
~
0 V)
Equivalent Input Noise Voltage (RS
~
100 ll, I
~
CL
CL
~
7.0
CL
CL
~
~
~
0 pF
100 pF
Am
0 pF
100 pF
m
2.0 kll, THD '" 1.0%)
Open-Loop Output Impedance (Va
Equivalent Input Noise Current (I
Typ
5.0
IU
2.0 kll)
~
Min
SR
GBW
Unity Gain Frequency (Open-Loop)
Gain Margin (RL
Symbol
~
3.0 V rmS ' AV
~
+1.0)
55
40
-
Deg
16
9.0
MHz
MHz
dB
-120
-
dB
-
120
kHz
THD
-
0.002
-
en
1.0 kHz)
-11
-6.0
10
-
CS
C,N
1.0 kHz)
VII's
BWp
RIN
~
Unit
-
-
ilol
9.0 MHz)
Max
in
37
175
12
4.5
0.5
%
II
k!l
pF
nV/v'FiZ
pAlv'Hz
TYPICAL CHARACTERISTICS
FIGURE 1 -
MAXIMUM POWER DISSIPATION
versus TEMPERATURE
FIGURE 2 -INPUT BIAS CURRENT versus SUPPLY VOLTAGE
2400
800
~
~
MCJ3078P 1& MCJ3079P
o
I
i
:::>
u
~
in
~
w
o
-55 -40 -20
FIGURE 3 -
1000
1
>-
i
:::>
0
20
40 60
80
100
TA, AMBIENT TEMPERATURE ('C)
~ 200
~
120
140
o
160
I
:>
~
'"
~
Av~.!!-- r-
'"
~
t;;
400
I--
~
·-55
-25
-
......--
UJITI
~ r--
UNIT 2--:=
tto
-
>-
'->"
~ -1.0
o
200
o
20
INPUT OFFSET VOLTAGE versus TEMPERATURE
Vce - +15V
VEE ~ -15V
RS ~ 10 II
+1.0 VCM ~ OV
~
600
~
>-
10
15
VCC, IVE~I, SUPPLY VOLTAGE (VOLTS)
+2.0
r---VCC ~ +15V
800 r--- VEE ~ -15V
VCM ~ OV
~
5.0
FIGURE 4 -
u
in
-...
z
INPUT BIAS CURRENT versus TEMPERATURE
I
400
~
r--. t"---- ~
r---: ~
400
25'C
>-
1600
,p
~
'[ 600
Ci
,.
_VCIM~OV
TA
I
I
i'
.........
'-'
~300
~~
r-.
200
--
VCc-O
~
;:;; VCC -0,5 r--)VCM
-
-15
- 10
'"~ VCC -1.0
- --
i: : :
~R,nge~
~
VEE + 0 , 5 i - - - t - - - + - - - t - - - - i - - + - - t - - - - - i
z
~
VEE+OL---L--~--~-~--~--L--~
¥
+ 15
I
~ Vee -1.0
- 55
<
I
15
VCC - 5,0
VEE = -15V
I
I
!;:i'
--J
I
~
+1,ot§=j~=j=j~::J~==E~~=E=t::~
$ VEE
1,0
2,0
3,0
RL, LOAD RESISTANCE TO GROUND IkHI
FIGURE 9 -
+15V
8,0
/~10V
+1SV
en
U
.Y
+S,OV
~
30
0
1)5
I-
::>
~
-
Source
10
~
~
-- -
......... t---
r----. r--.
r-
10
-55
-1S
o
15
50
75
TA, AMBIENT TEMPERATURE lOCI
100
125
~"'"
.lVCM~aVO
'"
CMR = 10Log (
~J~ x ADM)
100
o
~C33078_
/±10V
I--....
::>
0
~ 120
~ 80 I-VCC= +15V
o
VEE = -15V
:;
~ 60 I-VCM = OV
a'
~
SupplV 10lt,ge,-! - - -
-25
U
z
::>
-55
~
o
a::
~
I I -'-
.........
'-'
::>
125
VCC = +1SVVEE = -1SV
RL < 100 H VID = 1,OV
r- r--~
~ 140
iC33079-
~ 6,0
o
40
100
OUTPUT SHORT CIRCUIT CURRENT
versus TEMPERATURE
160
VCM = OV
RL = x
Vo OV
Z
'-'
0
25
50
75
TA, AMBIENT TEMPERATURE lOCI
FIGURE 10 - COMMON MODE REJECTION
versus FREQUENCY
+5.0V
2,0
~
::>
)--
!::
4,0
I-
8:: 4,0
::>
- 25
50
I-
SUPPLY CURRENT versus TEMPERATURE
10
<
E
I
[j,2SoC
I
E
Elm
i:::~2
g
""
,~
FIGURE 8 -
~CC ~15V
25°C
VOI\age
~
FIGURE 7 - OUTPUT SATURATION VOLTAGE versus
LOAD RESISTANCE TO GROUND
VL-I-
I
~
I
+3,OVto +15V
VCC
VEE = -3,0 to -15V
aVIO = 5,0 mV
Vo =10 V
t
'">:i VCC -1,5
- 5,0
0
+5,0
+ 10
VCM, COMMON MODE VOLTAGE IVOLTSI
_·55°C
~
// /
l!J VCC -3.0
I
2:
100
o
INPUT COMMON-MODE VOLTAGE RANGE
versus TEMPERATURE
i3
VC~=
SOO
continued
o
25
50
75
TA, AMBIENT TEMPERATURE lOCI
100
115
aVCM = ±1,5V
40
l-illlll~1 j j
1.OK
MOTOROLA LINEAR/INTERFACE DEVICES
2-244
10K
lOOK
f, FREQUENCY IHzl
1,OM
10M
MC33078, MC33079
FIGURE 11 - POWER SUPPLY REJECTION
versus FREQUENCY
140
+ PSR
~ 120
z
o
lOD
~
~VOIADM)
20Log (
~Vee
~
ri
~
i
~
~
30
40
~ 20
iva
ITf
~I~~~~II
100
I
k"
-J.i
I
Vee ~ + 15 V
f--VEE ~ -15V
o
;:, ~10~~~Z TA ~ 25°C -
vEE
I I II 111'1
60
c2
~L ~ "Okri_
.lVE~
~
- PSR
I
I
I
LOK
10K
lOOK
t, FREQUENCY 1Hz}
LOM
o
5,0
10M
20
~
t;
15
-----
r---
15
o
go
I
b
~ 10
z
;;\
VEE
z
>--
~
:::l
0
6
>
10
10
111111111111
100
1.OK
f-'"
I
Vee ~ +15V
vee ~ -15V
RL ~ 2,0 k!!
AV ~ +1.0
THD ~ 1.0%
TA ~ 25°C
5,0
0
OPEN-LOOP VOLTAGE GAIN versus
SUPPLY VOLTAGE
-
l-
15
10K
lOOK
t, FREQUENCY (Hzl
LOM
20
r- .lVo
I'I
,
0
f::: VO-
r- RL
w
'" 20
«
~
~ --..;:::
~ 2.0 k!!
f" 10 Hz
~ 23 (Vee - VEE)
TA ~ 25°C
I
I
2.0 kfl
10
15
Vee, IVEEI, SUPPLY VOLTAGE (VOLTS)
OUTPUT VOLTAGE versus FREQUENCY
30
~
RL ~ lOr
FIGURE 16 FIGURE 15 -
RL
""Vo+
o
t.> -10
o
~
"""'"
>
>--
:::l
10k!!
-25
I
....... ~p
w
100 kHz
~
TA - 25°C
15
r--
20
10
15
Vee, IVEEI, SUPPLY VOLTAGE (VOLTS)
FIGURE 14 - MAXIMUM OUTPUT VOLTAGE
versus SUPPLY VOLTAGE
FIGURE 13 - GAIN BANDWIDTH PRODUCT
versus TEMPERATURE
~
GAIN BANDWIDTH PRODUCT versus
SUPPLY VOLTAGE
20Log eVO'ADM)
~D
80
'"
~
- PSR
FIGURE 12 -
80
5.0
10M
10
15
Vee, IVEEI, SUPPLY VOLTAGE (V)
MOTOROLA LINEAR/INTERFACE DEVICES
2-245
-
20
II
II
MC3307S, MC33079
TYPICAL CHARACTERISTICS -
FIGURE 17 - OPEN·LOOP VOLTAGE GAIN
versus TEMPERATURE
110
VCC~
.'"
z
105
w
'"~
0
>
"0
V
..:.
95
V
0
it
90
-55
t- VCC =
t'j
z
""0
Ii'
~
.....
::0
o
100
25
50
75
TA, AMBIENT TEMPERATURE lOCI
b:
130
1000
~
~ 120
is
./
~
I
10-
llilLJ.J.
lllfAr
nIII
1.0M
10M
TOTAL HARMONIC DISTORTION
versus FREQUENCY
100
1.0K
f, FREQUENCY IHzl
Z
0
'"~
;::
0.0 1
.....
ci
(~~OA )
:J:
.....
OM
0.00 I 10
lOOK
t;
O. 1
A)
FIGURE 22 -
-:--
~ci 0.005
1=
0.00 1
o
1.0
2.0
lOOK
SLEW RATE versus SUPPLY VOLTAGE
t-- Vin
= 2 31VCC - VEE I
TA = 25°C
lOOJ
8.0
AV' = 100
~
? 6.0
I,1RAn~;
Vin
+
2.0
0.05
0.0 1
10K
I.OK
10
,. I--
!.!
100
t, fREQUENCY IHzl
1.0
VCC= +15V
VEE = -15V
0.5 f ~ 20kHz
TA = 25°"-~
= 2.0 kll
0
I
FIGURE 21 - TOTAL HARMONIC DISTORTION
versus OUTPUT VOLTAGE
z
:
O. I
0
u
I
CS = 20Log
"'
10K
M'"
t-- Va
t-- TA
0
~
0
.....
I
~
T
...............
......
60
~
Gain
g
Z
~
40
---
~
0
-"
0
=2.0 kl!
-25
............
80
it
25
50
75
TA AMBIENT TEMPERATURE 1°C)
100
20
o1.0
125
100
10
1.0K
10K
t, FREQUENCY [Hz)
FIGURE 26 -
FIGURE 25 - OPEN-LOOP GAIN MARGIN AND
PHASE MARGIN versus LOAD CAPACITANCE
100
j"l.1Yin
-..!.hase f------
......
""
lOOK
r-.,.
-.....
~
135
10M
1.0M
OVERSHOOT versus OUTPUT LOAD
CAPACITANCE
c"-"~
1"
80
I
VCC = +15V
VEE = -15VRL = 2.0 kfl
TA = 25°C
0
r- j"l.1Vin
--t ~VO
+
2.0
-55
I
............
100
+
2.0kfl
[7
Vo
=I CL
1150~~
25°C
/
WC-
/
V
20
f-
1.0K
100
CL, OUTPUT LOAD CAPACITANCE IpF)
10
>
N
w
30
20
'"
§:i
10
~
i
of
TOTAL INPUT REFERRED NOISE VOLTAGE
versus SOURCE RESISTANCE
TA = 25°C
Vnltotal) VlinRS)2 + en2 + 4KTRS
100
'"
<5
z
........
I
8.0
Voltage
-
3.0
2.0
100
1.0K
10K
t, FREQUENCY [Hz)
10
>~
i<':
J:~t,
I
+15V
15 V
t = 1.0 kHz
~
0
1.0
10
VCC
VEE
w
«
'"
>
~ 5.0
>~
i<':
~
+15V
VCC
15 V
VEE
TA = 25°C
~ 50
~
10K
~ 1000
100
80
§Z
FIGURE 28 -
INPUT REFERRED NOISE VOLTAGE AND
CURRENT versus FREQUENCY
VCC = +15Y
VEE = -15 V
aYin = 100 mY
II I
o
FIGURE 27 -
V
1/
<1.
>~
lOOK
c
>
1.0
10
100
MOTOROLA LINEAR/INTERFACE DEVICES
2-247
1.0K
10K
RS, SOURCE RESISTANCE Ifl)
lOOK
1.0M
MC33078, MC33079
TYPICAL CHARACTERISTICS -
II
continued
FIGURE 29 - PHASE MARGIN AND GAIN MARGIN versus
DIFFERENTIAL SOURCE RESISTANCE
70
14
12
~ '10
z
~ 8.0
~ 6.0
J
4.0
2.0
11111111111111111111
11111
Jilllilill II 11111111
d;:~
::rnlTTIIlrrr fTImr
~
+
60
fil
50 ~
e'"
Phase
40 z
Va
a
R2
30
VCC ~ +15V
VEE ~ -15V
RT ~ Rl + R2
AV ~ + 100
Va ~ OV
TA ~ 25°C
20
~
'"
w
«
'"
it
E
10
~
0
10
100
1.0K
10K
RT, DIFFERENTIAL SOURCE RESISTANCE Inl
FIGURE 30 - INVERTING AMPLIFIER SLEW RATE
lOOK
FIGURE 31 - NON-INVERTING AMPLIFIER SLEW RATE
t, TIME 12.0 jJ.s DlV.1
t, TIME 12.0 p.SiDIV.1
FIGURE 32 -
FIGURE 33 - LOW FREQUENCY NOISE VOLTAGE
versus TIME
NON-INVERTING AMPLIFIER OVERSHOOT
t, TIME 1200 nslDlV.1
t, TIME 11.0 SEC,DIV.I
MOTOROLA LINEAR/INTERFACE DEVICES
2-248
MC33078, MC33079
FIGURE 34 -
VOLTAGE NOISE TEST CIRCUIT
(0.1 Hz·TO·l0 HZp.pl
10 !l
1
4.7 IL F
Voltage Gain
~ 50,000
24.3 kfl
0.1 ILF
Note: All capacitors are non-polarized.
MOTOROLA LINEAR/INTERFACE DEVICES
2-249
®
MC33171, MC35171
MC33172, MC35172
MC33174, MC35174
MOTOROLA
II
LOW POWER, SINGLE SUPPLY
OPERATIONAL AMPLIFIERS
LOW POWER, SINGLE SUPPLY
OPERATIONAL AMPLIFIERS
Quality bipolar fabrication with innovative design concepts are
employed for the MC33171/2/4, MC35171/2/4 series of monolithic
operational amplifiers. This series of operational amplifiers operates at 180 IJ.A per amplifier and offers 1.8 MHz of gain bandwidth
product and 2.1 V/lJ.s slew rate without the use of JFET device
technology. Although this series can be operated from split supplies, it is particularly suited for single supply operation, since the
common mode input voltage range includes ground potential
(VEE). With a Darlington input stage, this series exhibits high input
resistance, low input offset voltage and high gain. The all NPN
output stage, characterized by no deadband crossover distortion
and large output voltage swing, provides high capacitance drive
capability, excellent phase and gain margins, low open-loop high
frequency output impedance and symmetrical source/sink AC frequency response.
The MC33171/2/4, MC35171/2/4 series of devices are specified
over the industrial/vehicular or military temperature ranges. The
complete series of single, dual and quad operational amplifiers
are available in the plastic and ceramic DIP as well as the SOIC
surface mount packages.
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
PIN ASSIGNMENTS
~a NC
Offset Null
Invt Input,
Noninvt Input
J
VEE
4
_
7
VCC
+
6
Output
5
Offset Null
Single, Top View
• Low Supply Current: 180 IJ.A (Per Amplifier)
• Wide Supply Operating Range: + 3.0 V to +44 V or ± 1.5 V
to ±22 V
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
Output 1
1
7
Output 2
• Wide Input Common Mode Range Including Ground (VEE)
• Wide Bandwidth: 1.8 MHz
• High Slew Rate: 2.1 V/lJ.s
Dual, Top View
• Low Input Offset Voltage: 2.0 mV
• Large Output Voltage Swing: -14.2 V to
(with +1-15 V Supplies)
+ 14.2 V
• Large Capacitance Drive Capability: 0 to 500 pF
• Low Total Harmonic Distortion: 0.03%
• Excellent Phase Margin: 60°
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
• Excellent Gain Margin: 15 dB
• Output Short Circuit Protection
'4~
ORDERING INFORMATION
OpAmp
Function
Device
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
D SUFFIX
PLASTIC PACKAGE
CASE 751A-02
50-14
PIN ASSIGNMENTS
Temperature
Range
Package
Single
MC33171D
MC35171U
MC33171P
-40 to +S5°C
-55 to + 125°C
-40 to +S5°C
SO-S Plastic DIP
Ceramic DIP
Plastic DIP
Dual
MC33172D
MC35172U
MC33172P
-40 to +S5°C
-55 to + 125°C
-40 to +S5°C
SO-S Plastic DIP
Ceramic DIP
Plastic DIP
Quad
MC33174D
MC35174L
MC33174P
-40 to +S5°C
-55 to + 125°C
-40 to +S5°C
50-14 Plastic DIP
Ceramic DIP
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
2-250
MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
MAXIMUM RATINGS
Rating
Supply Voltage
Symbol
Value
Unit
VCCNEE
±22
Volts
Volts
VIDR
(Note 1)
Input Voltage Range
VIR
(Note 1)
Volts
Output Short Circuit Duration (Note 2)
ts
Indefinite
Seconds
Operating Ambient Temperature Range
MC35171/MC35172/MC35174
MC33171/MC33172/MC33174
TA
Input Differential Voltage Range
'c
-55to +125
-40 to +S5
Operating Junction Temperature
TJ
Storage Temperature Range
Ceramic Package
Plastic Package
'c
'c
+150
Tstg
-65to +150
-55 to + 125
Notes: 1. Either or both Input voltages must not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
VCC
...-""'.....>-"'II'N-+--o Output
RS
Inputs
+o-----------~----------+_~--~------------J
Limit
01
R3
R5
R4
Offset Null
(MC33171. MC35171)
MOTOROLA LINEAR/INTERFACE DEVICES
2-251
II
MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, RL connected to ground, TA = Tlow to Thigh INote 31
unless otherwise noted.)
Symbol
Characteristic
Input Offset Voltage (VCM = 0 V)
VCC= +15V,VEE= -15V,TA= +25°C
VCC = +5 V, VEE = 0 V, TA = +25°C
VCC = +15 V, VEE = -15 V, TA = Tlow to Thigh
VIO
Average Temperature Coefficient of Offset Voltage
aVIO/aT
Input Bias Current (VCM = 0 V)
TA = +25°C
TA = TlowtoThigh
liB
Input Offset Current (VCM = 0 V)
TA = +25°C
TA = Tlow to Thigh
110
Large Signal Voltage Gain (VO = ±10V, RL = 10 k)
TA = +25°C
TA = Tlow to Thigh
AVOL
Output Voltage Swing
VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C
VCC = +15V,VEE = -15V.,RL = 10k,TA = +25°C
VCC = + 15 V, VEE = -15 V, RL = 10 k, TA = Tlow to Thigh
VOH
VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C
VCC = +15V, VEE = -15V, RL = 10 k, TA = +25°C
VCC = + 15 V, VEE = -15 V, RL = 10 k, TA = Tlow to Thigh
VOL
Max
-
-
2.0
2.5
-
-
4.5
5.0
6.5
-
10
-
Sink
Input Common Mode Voltage Range
TA = +25°C
20
100
200
-
-
-
5.0
-
20
40
50
25
500
-
3.5
13.6
13.3
4.3
14.2
-
nA
V/mV
-
V
-
0.05
-14.2
-
-
3.0
15
5.0
27
0.15
-13.6
-13.3
mA
-
V
VICR
VEE to (VCC -1.8)
= Tlow to Thigh
VEE to (VCC - 2.2)
Common Mode Rejection Ratio (RS '" 10 k)
CMRR
80
90
Power Supply Rejection Ratio (RS = 100!1)
PSRR
80
100
Power
VCC
VCC
VCC
p.VFC
nA
-
ISC
Source
Unit
mV
-
Output Short Circuit Current (TA = + 25°C)
Input Overdrive = 1.0 V, Output to Ground
TA
Typ
Min
Supply Current (Per Amplifier)
= +5.0 V, VEE = 0 V, TA = +25°C
= +15V, VEE = -15V, TA = +25°C
= + 15 V, VEE = -15 V, TA = Tlow to Thigh
Notes; (continued)
3. Tlow = -55°C for MC35171/MC35172/MC35174
= -40°C for MC33171/MC33172/MC33174
-
-
-
2-252
180
220
-
=
+125°C for MC3517l1MC35172/MC35174
=
+ 85°C for MC33171/MC33172/MC33174
MOTOROLA LINEAR/INTERFACE DEVICES
dB
p.A
ID
Thigh
dB
250
250
300
~C33171,~C33172,~C33174, ~C35171, ~C35172,~C35174
AC ELECTRICAL CHARACTERISTICS (VCC
~ + 15 V, VEE ~ -15 V, RL connected to ground, TA ~ + 25°C unless otherwise
noted)
Symbol
Characteristic
Slew Rate (Vin
AV + 1
AV - 1
~
·-10Vto +10V, RL
~
10 k, CL
~
100 pF)
Min
Gain Bandwidth Product (I
~
~
10 k, Vo
100 kHz)
= 20 Vp _p, THD
~
2.'
2.1
GBW
1.4
1.8
BWp
-
35
-
60
45
-
-
-
Gain Margin
RL = 10 k
RL = 10 k, CL
Am
MHz
kHz
= 1.0 kHz)
Differential Input Resistance
VCM = 0 V
Input Capacitance
dB
en
-
32
In
-
RIN
-
300
-
Mfl
Ci
-
0.8
-
pF
0.03
-
%
120
-
dB
100
-
fl
THD
Total Harmonic Distortion
AV - + 10, RL - 10 k, 2.0 Vp_p '" Vo '" 20 Vp_p' f - 10 kHz
-
= 10 kHz)
= 1.0 MHz)
Degrees
15
5.0
= 100 pF
Equivalent Input Noise Voltage
RS = 100 n, I = 1.0 kHz
Open-Loop Output Impedance (I
Unit
5%
¢m
Channel Separation (f
-
-
Phase Margin
RL ~ 10 k
RL - 10 k, CL ~ 100 pF
Equivalent Input Noise Current (I
Max
V/p.s
1.6
Power Bandwidth
AV - + 1.0, RL
Typ
SR
0.2
-
Zo
-
nVI
VHz
-
pAl
VHz
TYPICAL PERFORMANCE CURVES
FIGURE 2 - SPLIT SUPPLY OUTPUT SATURATION
versus LOAD CURRENT
FIGURE 1 - INPUT COMMON-MODE VOLTAGE RANGE
versus TEMPERATURE
~
Vcc- >rVCCNEE
~
(:J
z
;ii -0.8
~
(:J
;5
is -1.6 f-->
~
o
-
-
=
+/-1.5Vto +/-22V
aVIO = 5.0 mV
-
~
~ -2.4
'"
1---+--1
VEE-+---+t
!;!
-55
-25
~
~> -1.0
I'--.
0
+25
+50
+75
TA, AMBIENT TEMPERATURE (OC)
I
---t------1]
+100
+125
I
VCC
--:!'.
I
I
I
VCCNEE - +/-5.0Vto +/-22V
TA = 25°C
--
Source -
I
z
o
o
~ .0; II------+-I---+--cc-I
~
~":Hd' 1.1 IIII
I
o
1.0
2.0
IL, LOAD CURRENT (± rnA)
MOTOROLA LINEAR/INTERFACE DEVICES
2-253
3.0
4.0
II
MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
FIGURE 4 -
FIGURE 3 - OPEN-LOOP VOLTAGE GAIN AND
PHASEveRusFREQUENCY
30
00
;;
20
.....~ .... I
~
.....
10
Margin
58°
~
VCCNEE = +1-15V
~
RL = 10k
[!;
I
YOU! = OV
g
TA = 25°C
I
~ -10
1- Phase
o
2 - Phase, CL = 100 pF
~-2 3-Gain
4-Gain,CL = 100pF
-30
100 k
!:;
0
~aln 1-
1
~ h =Margin
r-- 15dB
1
0
1
0
2
0
,
2
~
3
r'd:
~
\
'J
o
-r-.
(
\
10 M
200
50
100
CL, LOAD CAPACITANCE IpFI
20
1.2
""
" --
r--
1.0
ffi
Cl
0.9
'"
0.8
1.0 k
500
FIGURE 6 - SMALL AND LARGE SIGNAL
TRANSIENT RESPONSE
[I
5
...z
1
o
0.50 !'s/DIV
1.3
1.1
\
1\
0
10
FIGURE 5 - NORMALIZED GAIN BANDWIDTH PRODUCT
AND SLEW RATE ve"';us TEMPERATURE
~
'"
'\
% ....... ~
f, FREQUENCY IHzl
;;
AVOL = + 1.0
RL = 10 k
dVo = 20 mV p. p
TA = 25°C
/
220
r.
1.0 M
/
AV
it
::>
/
= 1.0
iU1 IV11
V
~
u
~
/
I
AV
~ 40
1.
II~v = lool
V
FIGURE 8 -
200 k
I
'"'"
~
r-
u
S'
P
2.0 M
1 l-TA
2- TA
3-TA
0.9
0.7
0.
~
5
0.3
o. 1
o
=
~
=
SUPPLY CURRENT versus SUPPLY VOLTAGE
I
~u!!V- ~ f--
-550C
25°C
125°C
?--...-
~
-
...-
i--r-"
Dual
~ f--
-
_3
I
I
-1
2_
3
......-::: t::
112
3-
Single
,....
1
±10
±5
±15
VCC/VEE, SUPPLY VOLTAGE IVI
MOTOROLA LINEAR/INTERFACE DEVICES
2-254
11
_2
±20
±25
MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES
Although the bandwidth, slew rate, and settling time
of the MC33171172/74 amplifier family is similar to low
power op amp products utilizing JFET input devices,
these amplifiers offer additional advantages as a result
of the PNP transistor differential inputs and an all NPN
transistor output stage.
Because the input common mode voltage range of this
input stage includes the VEE potential, single supply operation is feasible to as low as 3.0 volts with the common
mode input voltage at ground potential.
The input stage also allows differential input voltages
up to ±44 volts, provided the maximum input voltage
range is not exceeded. Specifically, the input voltages
must range between VCC and VEE supply voltages as
shown by the maximum rating table. In practice, although
not recommended, the input voltages can exceed the VCC
voltage by approximately 3.0 volts and decrease below
the VEE voltage by 0.3 volts without causing product
damage, although output phase reversal may occur. It is
also possible to source up to 5.0 mA of current from VEE
through either input's clamping diode without damage
or latching, but phase reversal may again occur. If at least
one input is within the common mode input voltage
range and the other input is within the maximum input
voltage range, no phase reversal will occur. If both inputs
exceed the upper common mode input voltage limit, the
output will be forced to its lowest voltage state.
Since the input capacitance associated with the small
geometry input device is substantially lower (0.8 pF) than
that of a typical JFET (3.0 pFI. the frequency response for
a given input source resistance is greatly enhanced. This
becomes evident in D-to-A current to voltage conversion
applications where the feedback resistance can form a
pole with the input capacitance of the op amp. This input
pole creates a 2nd order system with the single pole op
amp and is therefore detrimental to its settling time. In
this context, lower input capacitance is desirable especially for higher values of feedback resistances (lower
current DAC's). This input pole can be compensated for
by creating a feedback zero with a capacitance across the
feedback resistance, if necessary, to reduce overshoot.
For 10 kO offeedback resistance, the MC33171/72/74 family can typically settle to within 1/2 LSB of 8 bits in 4.2
/LS, and within 1/2 LSB of 12 bits in 4.8 /LS for a 10 volt
step. In a standard inverting unity gain fast settling configuration, the symmetrical slew rate is typically ± 2.1
voltsl/Ls. In the classic noninverting unity gain configuration the typical output positive slew rate is also 2.1
volts//Ls, and the corresponding negative slew rate will
usually exceed the positive slew rate as a function of the
fall time of the input waveform.
The all NPN output stage, shown in its basic form on
the equivalent circuit schematic, offers unique advantages over the more conventional NPN/PNP transistor
Class AB output stage. A 10 kO load resistance can typically swing within 0.8 volt of the positive rail (VccI and
negative rail (VEE), providing a 28.4 Vp-p swing from ± 15
volt supplies. This large output swing becomes most noticeable at lower supply voltages.
The positive swing is limited by the saturation voltage
of the current source transistor 07, the VBE of the NPN
pull up transistor 017, and the voltage drop associated
with the short circuit resistance, R5. For sink currents less
than 0.4 mA, the negative swing is limited by the saturation voltage of the pull-down transistor 015, and the
voltage drop across R4 and R5. For small valued sink
currents, the above voltage drops are negligible, allowing
the negative swing voltage to approach within millivolts
of VEE. For sink currents (> 0,4 mAl. diode D3 clamps
the voltage across R4. Thus the negative swing is limited
by the saturation voltage of 015, plus the forward diode
drop of D3 (=VEE + 1.0 V). Therefore an unprecedented
peak-to-peak output voltage swing is possible for a given
supply voltage as indicated by the output swing
specifications.
If the load resistance is referenced to VCC instead of
ground for single supply applications, the maximum possible output swing can be achieved for a given supply
voltage. For light load currents, the load resistance will
pull the output to VCC during the positive swing and the
output will pull the load resistance near ground during
the negative swing. The load resistance value should be
much less than that of the feedback resistance to maximize pull up capability.
Because the PNP output emitter follower transistor has
been eliminated, the MC33171/72/74 family offers a 15
mA minimum current sink capability, typically to an output voltge of (VEE + 1.8 V). In single supply applications
the output can directly source or sink base current from
a common emitter NPN transistorfor high current switching applications.
In addition, the all NPN transistor output stage is inherently faster than PNP types, contributing to the bipolar
amplifier's improved gain bandwidth products. The associated high frequency low output impedance (200 0 typ
Cd 1.0 MHz) allows capacitive drive capability from 0 to
400 pF without oscillation in the noninverting unity gain
configuration. The 60° phase margin and 15 dB gain margin as well as the general gain and phase characteristics
are virtually independent of the source/sink output swing
conditions. This allows easier system phase compensation, since output swing will not be a phase consideration.
The ac characteristics of the MC33171/72/74 family also
allow excellent active filter capability, especially for low
voltage single supply applications.
Although the single supply specification is defined at
5.0 volts, these amplifiers are functional to at least 3.0
volts@ 25°C. However slight changes in parametrics such
as bandwidth, slew rate, and dc gain may occur.
If power to this integrated circuit is applied in reverse
polarity or if the IC is installed backwards in a socket,
large unlimited current surges will occur through the device that may result in device destruction.
As usual with most high frequency amplifiers, proper
lead dress, component placement and PC board layout
should be exercised for optimum frequency performance. For example, long unshielded input or output
leads may result in unwanted input output coupling. In
order to preserve the relatively low input capacitance
associated with these amplifiers, resistors connected to
the inputs should be immediately adjacent to the input
pin to minimize additional stray input capacitance. This
not only minimizes the input pole for optimum frequency
response, but also minimizes extraneous "pick up" at this
node. Supply decoupling with adequate capacitance
immediately adjacent to the supply pin is also important,
particularly over temperature, since many types of
decoupling capacitors exhibit great impedance changes
over temperature.
The output of anyone amplifier is current limited and
thus protected from a direct short to ground. However,
under such conditions, it is important not to allow the
device to exceed the maximum junction temperature rating. Typically for ± 15 volt supplies, anyone output can
be shorted continuously to ground without exceeding the
maximum temperature rating.
MOTOROLA LINEAR/INTERFACE DEVICES
2-255
II
II
MC33171, MC33172, MC33174, MC35171, MC35172, MC35174
FIGURE 9 - AC COUPLED NONINVERTING AMPLIFIER
WITH SINGLE +5.0 V SUPPLY
2.2 k
~
510 k
r-"""-~w.--oVec
Vo
100 k
FIGURE 10 - AC COUPLED INVERTING AMPLIFIER
WITH SINGLE + 5.0 V SUPPLY
Vee
0~3.6VP-P
100 k
'1;.,;1
G~l'Y'OOIl\~""O-k---l
r
AV = 101
BW (-3.0 dB)
Vo
"::"
AV = 10
BW (-3.0 dB)
= 20 kHz
~
Yin
~.~ V~4.2
=
Vp-p
:T
Offset Nulling range is approximately ± 80 mV
with a 10k potentiometer, MC3317l1MC35111 only.
200 kHz
FIGURE 14 - ACTIVE BANDPASS FILTER
0.2 Vdc
R
16 k
e
R
16 k
2R
32 k
0.047
Rl
R3
2.2 k
1.1 k
>-+-oVo
>---"--oVo
e
C
0.Q1
2C
"::"
Vee
FIGURE 13 - ACTIVE HIGH-Q NOTCH FILTER
0.02
kHz
~__~R_l_~VO
AV= 10
BW (- 3.0 dB)
Yin
= 200
50 k
-l
___
:
;>
Vo
FIGURE 12 - OFFSET NULLING CIRCUIT
100 k
100 k
Yin
f
Rl
~---'---JVII\r-_~---ovee
"::"
Co
>-+---I~_~O
100 k
FIGURE 11 - DC COUPLED INVERTING AMPLIFIER
MAXIMUM OUTPUT SWING WITH SINGLE
+ 5.0 V SUPPLY
r;~411\.7~k
0~3.8 Vp-p
R2
5.6 k
2e
0.02
fo = 1.0 kHz
1
fo = 4"Re
Given
fa
Vee
fo = 30 kHz
0=10
HO = 1.0
0.047
Rl
= Center Frequency
=-EL
2 Ho
R2
Rl R3
402 Rl-R3
AO = Gain at Center Frequency
Choose Value fo• a, Ao. C
R3 =--0-
..toe
Then
For less than 10% error from operational amplifier
Where fo and GBW are expressed in Hz.
MOTOROLA LINEAR/INTERFACE DEVICES
2-256
00fo<0.1
GBW
®
MC33282
MC33284
MOTOROLA
Advance Information
JFET
OPERATIONAL
AMPLIFIERS
LOW INPUT OFFSET, HIGH SLEW RATE,
WIDE BANDWIDTH, JFET INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC33282,4 series of monolithic operational amplifiers are
quality fabricated with innovative Bipolar and JFET design concepts. This dual and quad operational amplifier series incorporates JFET inputs along with a patented unique resistor trim
element for input offset voltage reduction. The MC33282,4
series of operational amplifiers exhibits low input offset voltage, low input bias current, high gain bandwidth and high slew
rate. Dual-doublet frequency compensation is incorporated to
produce high quality phase/gain performance. In addition, the
MC33282,4 series exhibits moderately low input noise characteristics for JFET input amplifiers. It's all NPN output stage
exhibits no deadband crossover distortion, large output voltage
swing, excellent phase and gain margin, low open-loop high
frequency output impedance with symmetrical source and sink
ac frequency performance.
The MC33282,4 series is specified over - 40'C to + 85'C and is
available in the plastic DIP and SOIC surface mount packages (P
and D suffixes).
.~
1
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
• Low Input Offset Voltage: 200 p.V
• Low Input Bias Current: 30 pA
Output 1 '
• Low Input Offset Current: 6.0 pA
, Output 2
Inputs 1 { :
• Low Total Harmonic Distortion: 0.003%
VEE'
• Low Noise: 18 nV/" Hz @ 1.0 kHz
• High Gain Bandwidth Product: 30 MHz @ 100 kHz
-
:} Inputs 2
(Dual, Top Viewl
• High Slew Rate: 12 V/p.s
• Excellent Frequency Stability
• Large Output Voltage Swing: + 14.1 V/-14.6 V
'.
• Dual Supply Operation: ± 18 V (Max)
1
P SUFFIX
PLASTIC PACKAGE
CASE 846-06
o SUFFIX
PLASTIC PACKAGE
CASE 751A-02
50-14
Output 1 ,
Inputs 1 { :
ORDERING INFORMATION
OpAmp
Function
Dual
Quad
Device
Ambient Test
Temperature Range
MC33282D
MC33282P
- 40'C to + 85'C
MC33284D
MC33284P
- 40'C to + 85'C
" Output 4
VCC'
Package
SO-8
Plastic DIP
Inputs 21 :
"I
Output 2 ,
, Output 3
SO-14
Plastic DIP
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
2-257
" VEE
•
(Quad, Top View)
Inputs 3
II
MC33282, MC33284
MAXIMUM RATINGS
Rating
Supply Voltage (Vcc to VEE)
Symbol
Value
Unit
Vs
-t-36
Volts
Volts
VIDR
(Note 1)
Input Voltage Range
VIR
(Note 1)
Volts
Output Short Circuit Duration (Note 2)
ts
Indefinite
Seconds
Input Differential Voltage Range
Maximum Junction Temperature
Storage Temperature
Maximum Power Dissipation
TJ
+150
'c
TstQ
-60 to + 150
'c
PD
(Note 2)
mW
NOTES:
1. Either or both input voltages should not exceed Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded.
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
Dl
D4
+
R16
Q9
Q18
C5
+
C6
D5
R17
A
B
C
D
Q13
21
MOTOROLA LINEAR/INTERFACE DEVICES
2-258
MC33282, MC33284
~ -15 V TA ~ 25'C unless otherwise noted)
DC ELECTRICAL CHARACTERISTICS (VCC - +15 V VEE
Input Offset Voltage (RS
TA ~ +25'C
TA ~ -40'C to +85'C
~
~
10 l1, VCM
0 V, Va
~
0 V)
~
~
0 V, Va
~
Input Offset Current (VCM
TA ~ +25'C
TA ~ -40'C to +85'C
Output Voltage Swing (VID
RL ~ 2,0 kl1
RL ~ 2.0 kl1
RL ~ 10 kl1
RL ~ 10 kl1
~
~
~
± 10 V, RL
~
5.0 mY, Va
~
~
0 V)
~
Power Supply Current (Va
TA ~ +25'C
TA ~ -40'C to +85'C
~
2.0 kl1)
0 V, Per Amplifier)
~
~
~
2.0 kl1, CL
~
2.0 kl1, CL
~
100 pF, AV
~
+1.0)
~
20 kHz)
0 pF)
~
-12
14
-
V
50
25
200
-
VO+
VOVO+
VO-
13.2
13.7
-13.9
14.1
-14.6
CMR
75
95
-
dB
PSR
75
105
-
dB
15
-15
21
-27
-
1.75
2.5
3.0
-11
-
-
-
-
13.5
-
20 Hz to 20 kHz)
27 Vp_p, RL
~
~
Differential Input Resistance (VCM
~
0 V, I
Differential Input Capacitance (VCM
~
~
~
~
3.0 V rms ' AV
~
9.0 MHz)
mA
mA
12
-
Vlp.s
-
30
-
MHz
Ava
-
1500
-
VN
fU
-
5.0
-
MHz
-
8.0
-
dB
55
-
Deg.
-120
-
kHz
+1.0)
1.0 kHz)
0.003
-
%
IZol
-
37
-
10 12
kl1
5.0
-
-
18
-
nV/VHz
0.01
-
pAlVHz
en
1.0 kHz)
in
and VEE differentially varied simultaneously.
MOTOROLA LINEAR/INTERFACE DEVICES
2-259
dB
THO
CIN
~
-
RIN
0 V)
100 l1, I
-14
8.0
BWp
0 V)
Equivalent Input Noise Voltage (RS
Equivalent Input Noise Current (I
~
-13.2
SR
cs
2.0 kl1, THO '" 1.0%)
20 Hz to 20 kHz, Va
Open-Loop Output Impedance (VO
-
GBW
4>m
~
~
11
V/mV
Am
0 pF)
~
Vee
pA
nA
p.VI'C
~ + 15 V VEE ~ - 15 V TA ~ 25'C unless otherwise noted)
2.0 kl1, CL
0 V, f
Channel Separation (f
NOTE:
3. Measured with
50
2.0
-
10
100 kHz)
2.0 kl1, Va
2.0 kl1, f
6.0
-
Power Bandwidth (Va
~
pA
nA
ISC
Unity Gain Frequency (Open-Loop)
Distortion (RL
100
4.0
-
AVOL
1.0 V, Output to Ground)
- 10 V to + 10 V, RL
~
30
-
-
Gain Bandwidth Product (f
~
-
V
AC ELECTRICAL CHARACTERISTICS (VCC
Gain Margin (RL
5.0
mV
VICR
±11 V)
Output Short Circuit Current (VID
Source
Sink
Phase Margin (RL
2.0
4.0
±1.0 V)
Common Mode Rejection (Vin
~
-
Unit
,110
Power Supply Rejection (Note 3)
VCCNEE ~ +15V/-15Vto +5.0 V/-5.0 V
AC Voltage Gain (RL
0.2
-
Large Signal Voltage Gain (Va
TA ~ +25'C
TA ~ -40'C to +85'C
~
-
liB
0 V)
Common Mode Input Voltage Range (aVIO
Slew Rate (Vin
Max
aVIOlaT
0 V)
~
0 V, Va
Typ
IVlol
Average Temperature Coefficient of Input Offset Voltage
RS ~ 10 l1, VCM ~ 0 V, Va ~ 0 V, TA ~ Tlow to ThiQh
Input Bias Current (VCM
TA ~ +25'C
TA ~ -40'C to +85'C
Min
Symbol
Characteristics
120
l1
pF
•
®
MC34001, MC35001
MC34002, MC35002
MC34004, MC35004
MOTOROLA
JFET INPUT OPERATIONAL AMPLIFIERS
JFET INPUT
OPERATIONAL AMPLIFIERS
These low cost JFET Input operational amplifiers combine two
state-of-the-art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier
has well matched high voltage JFET input devices for low input
offset voltage The BIFET technology provides wide bandwidths
and fast slew rates with low input bias currents, input offset currents, and supply currents.
The Motorola BIFET family offers single, dual and quad operational amplifiers which are pin-compatible with the industry standard MC1741, MC1458, and the MC3403/LM324 bipolar devices.
The MC35001/35002/35004 series are specified over the military
operating temperature range of - 55°C to + 125°C and the
MC34001/34002/34004 series are specified from O°C to + 70°C.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
G SUFFIX
METAL PACKAGE
CASE 601-04
4P
• Wide Gain Bandwidth • High Slew Rate -
10 pA
• Low Supply Current • High Input Impedance -
,
:
•
1
ORDERING INFORMATION
Single
Dual
Quad
MC34001AU, BU, U
MC35001AG, BG, G
MC35001AU, BU, U
MC34002AD, BD, 0
MC34002AG, BG, G
MC34002AP, BP, P
MC34002AU, BU, U
MC35002AG, BG, G
MC35002AU, BU, U
MC34004BD, D
MC34004BL, L
MC34004BP. P
MC35004BL, L
o to +70
- 55 to + 125°C
o to +70°C
-55to +125°C
o to +70·C
-55to +125°C
Ceramic DIP
Metal Can
Ceramic DIP
SO-8
Metal Can
Plastic DIP
1
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
8.
1
vee'
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
, Vee
e Output
• Offset Null
outPutA~VCC
Inputs A { ,
v
_ ' Output B
'+A
G}lnputsB
EE'
B+ ~
Out 1
E:
Inputs 1
~
j;fw:
+
Inputs
MOTOROLA LINEAR/INTERFACE DEVICES
2~
Out2[!:
MC3400',
MC35001
(Top View)
MC34002,
MC35002
(Top View)
BOut4
~ Inputs 4
+ ~
VCC~
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
2-260
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
~ NC
Offset Null
Invt Input'
Noninvt Input , .
Ceramic DIP
Metal Can
Ceramic DIP
SO-14
Ceramic DIP
Plastic DIP
Ceramic DIP
,.
1
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
Package
SO-8
Metal Can
Plastic DIP
'
4
.
--- •
CERAMIC PACKAGE
CASE 632-08
MC34002,
MC35002
(Top View)
_ • Inverting
Input 8
~ ~
• Industry Standard Pinouts
Temperature
Range
Null
Noninvertlng , + +, Noninverting
Input A
V~E
Input B
1.8 mA per Amplifier
10 12 n
Device
MC34001AD, BD, 0
MC34001AG, BG, G
MC34001AP, BP, P
Output
Vee
~-'0,~'
4.0 MHz
cc
s Offset
Inverting'
Input
vcc
• High Common-Mode and Supply Voltage Rejection Ratios 100 dB
OpAmp
Function
6
Non-,
Inverting , _
Input A
13 V/J.Ls
1
:~~:r;ing,
B 1
.
40 pA
• Low Input Offset Current -
-e
NC
Null
• Input Offset Voltage Options of 2.0, 5.0, and 10 mV Maximum
• Low Input Bias Current -
MC34001, MC35001
(Top View)
:!!JVEE
~r1
~ Inputs 3
:!)Out3
MC34004, MC35004 (Top View)
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
MAXIMUM RATINGS
Symbol
MC35001
MC35002
MC35004
Supply Voltage
VCC
VEE
+22
-22
+18
-18
V
Differential Input Voltage
VID
±40
±30
V
VIDR
±20
±16
V
Rating
Input Voltage Range
Output Short-Circuit Duration
ts
Operating Ambient Temperature
Range
TA
Operating Junction Temperature
TJ
II
Unit
Continuous
- 55 to + 125
o to
°c
+70
°c
Metal and Ceramic Packages
Plastic Packages
Storage Temperature Range
Metal and Ceramic Packages
Plastic Packages
MC34001
MC34002
MC34004
150
-
115
115
-65 to + 150
-65to +150
- 55 to + 125
°c
Tstg
-
ELECTRICAL CHARACTERISTICS (VCC = + 15 V VEE = -15 V TA = 25 unless otherwise noted)
0
Symbol
Characteristic
Input Offset Voltage (RS ., 10 k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
Average Temperature Coefficient of Input Offset Voltage
RS" 10 k, TA = Tlow to Thiah (Note 1)
VIO
AVIO/AT
110
Input Bias Current (VCM = 0) (Note 2)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X'
liB
ri
Common Mode Input Voltage Range
VICR
Large Signal Voltage Gain (VO = ± 10 V, RL = 2.0 k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
AVOL
Output Voltage Swing
(RL'" 10 k)
(RL'" 2.0 k)
-
Typ
Max
Min
Typ
Max
-
1.0
3.0
5.0
2.0
5.0
10
1.0
3.0
5.0
2.0
5.0
10
10
-
-
10
-
-
10
10
25
25
50
100
-
25
25
25
50
100
100
-
40
40
50
75
100
200
-
50
50
50
100
200
200
-
CMRR
Supply Voltage Rejection Ratio (RS ., 10 k) (Note 3)
MC3500XA, MC3400XA
MC3500XB. MC3400X8
MC3500X, MC3400X
PSRR
10 12
-
-
10 12
-
fl
+15
-12
-
±11
+15
-12
-
V
50
50
25
150
150
100
-
50
50
25
150
150
100
-
V/mV
±12
±10'
-
V
±14
±13
-
80
80
100
100
-
-
-
80
80
70
100
100
100
-
80
80
70
100
100
100
-
80
80
70
100
100
100
-
1.4
1.4
1.4
2.5
2.5
2.7
-
1.4
1.4
1.4
2.5
2.5
2.7
13
-
13
-
VII's
25
-
nV/vHz
0.01
-
pAlvHz
dB
-
-
dB
Slew Rate (Av
SR
GBW
-
4.0
-
Equivalent Input Noise Voltage
(RS = 100 fl, f = 1000 Hz)
en
-
25
-
-
Equivalent Input Noise Current (f = 1000 Hz)
in
-
0.01
-
-
mA
MOTOROLA LINEAR/INTERFACE DEVICES
2-261
-
±14
±13
±12
±10
-
Gain-Bandwidth Product
pA
±11
10
1)
p.vrc
pA
Supply Current (Each Amplifier)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
=
Unit
mV
Vo
Common Mode Rejection Ratio (RS " 10k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
MC34001134002134004
Min
-
Input Offset Current (VCM = 0) (Note 2)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
Input Resistance
MC35001/35002135004
-
-
4.0
MHz
II
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
ELECTRICAL CHARACTERISTICS (VCC = +15 V VEE = - 15 V TA= TI ow to Th·IQIh [Note 1])
MC35001/35002/35004
Characteristic
Symbol
Input Offset Voltage (RS " 10 k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
Via
Input Offset Current (VCM = 0) (Note 2)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
110
Input Bias Current (VCM = 0) (Note 2)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
liB
Common Mode Input Voltage Range
VICR
Large Signal (Va = ot 10 V, RL = 2.0 k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
AVOL
Output Voltage Swing
(RL'" 10 k)
(RL'" 2.0 k)
Max
Min
Typ
Max
-
-
4.0
7.0
14
-
-
4.0
7.0
13
-
-
20
40
40
-
-
2.0
4.0
4.0
-
-
50
50
50
-
-
-
4.0
8.0
8.0
-
",11
-
-
",11
Unit
mV
nA
nA
V
V/mV
25
25
15
-
",12
",10
-
-
25
25
15
-
-
-
-
ot 12
",10
-
-
80
80
70
-
-
80
80
70
-
-
-
80
80
70
-
-
80
80
70
-
-
-
-
-
-
2.8
2.8
3.0
-
2.8
2.8
3.0
-
_.
V
CMRR
Supply Voltage Rejection Ratio (RS " 10 k) (Note 3)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
PSRR
Supply Current (Each Amplifier)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
11)
Typ
Va
Common Mode Rejection Ratio (RS " 10 k)
MC3500XA, MC3400XA
MC3500XB, MC3400XB
MC3500X, MC3400X
NOTES:
MC34001/34002/34004
Min
Tlow ~ -55"C for MC35001/MC35001A;350018
MC35002/MC35002A;350028
MC35004/350048
" O"C for MC34001/34001Ai34001 8
MC34002/34002Ai340028
MC34004/340048
Thigh - + 125"C for MC35001/MC35001Ai350018
MC35002/MC35002A/350028
MC350041350048
+ 70"C for MC34001/34001 Ai34001 8
MC34002/34002Ai340028
MC34004/340048
ID
-
-
-
dB
-
dB
-
-
rnA
e
(2) The input bias currents approximately double for every 10 rise in junc~
tion temperature, TJ. Due to limited test time, the input bias currents are
correlated to junction temperature. Use of a heat sink is recommended
if input bias current is to be kept to a minimum.
0
(3) Supply voltage rejection ratio is measured for both supply magnitudes
increasing or decreasing simultaneously. in accordance with common
practice.
(4) Unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply.
MOTOROLA LINEAR/INTERFACE DEVICES
2-262
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
TYPICAL PERFORMANCE CHARACTERISTICS
FIGURE 1 - INPUT BIAS CURRENT
versus TEMPERATURE
100
+
=VCCNEE
~
15 V
~
30
~
25
i
~
w
::>
u
'"
Inr- I
20
>-
::>
I
~ 10
~01
::>
o
II
~5.0
0.0 1
75
50
- 25
0
25
50
75
TA, AMBIENT TEMPERATURE I"CI
100
125
100
6.
>
~
,/'
g
./
V
>::>
6
10
6
>
a
./
a
0.7 1.0
2.0
0.4
RL, LOAD RESISTANCE IkHl
0.2
4.0
7.0 10
FIGURE 5 - OUTPUT VOLTAGE SWING
versus TEMPERATURE
I
'"z
V
o
2.0
1.B
- - I--RL ." 10k
~
1.6
~
1.4
~
25
'"~
20
~ 1.0
~
15
~ 0.8
5.
10
~ 0.6
.9 0.4
6
> 5.0
20
SUPPLY CURRENT PER AMPLIFIER
versus TEMPERATURE
-- ---- -I--
u
§?
- - - r----
VCcNEE ~ '" i5 V
§§ 1.2
'-RL ·,2.0k
V
5.0
10
15
VccNEE, SUPPLY VOLTAGE I'" VI
FIGURE 6 -
I
'" 35 r--VCCNEE ~ '" 15 V
~ 30
--
/'
:=
/
0.1
10M
V
w
V
1.0 M
2.0k
25°C
'" 20
;!
./""
>
:=
~
~
20
6 5.0
~
~ 30
-
o
10 k
100 k
f, FREQUENCY IHzl
I
r-RL
TA
'"
'"
':> 10
2.0 k
25°C
1\
10k
40
:=::>
~
FIGURE 4 - OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE
I
I I
~ 30 -VCCNEE ~ "15 V
_ TA ~ 25"C
z
~
§?
1\
~
w-tt- '
FIGURE 3 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
'"
I
RL
ITA
tU
§2 15
>-
5:
z
~
~+15V
~
~ 1.0
W~W
IJWWIT
VCCNEE
10
>-
II
FIGURE 2 - OUTPUT VOLTAGE SWING
versus FREQUENCY
0.2
-,50
-25
a
25
50
75
TA, AMBIENT TEMPERATURE lOCI
100
125
-50
-25
a
25
50
75
TA, AMBIENTTEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
2-263
100
125
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
II
FIGURE 7 - LARGE·SIGNAL VOLTAGE GAIN AND
PHASE SHIFT versus FREQUENCY
FIGURE 8 -
LARGE·SIGNAL VOLTAGE GAIN
versus TEMPERATURE
1000
=
+ 15 V=
Vo
+10V
RL - 2.0k _
VCCNEE
~-.
........
1.0
"'-
10
, i'..
'r-...
100
,
~ ±
VCCNEE
RL
~
TA
~
15 V
2.0 k
f---25°C
_.
~ain
',"r--... 1'\
"'"r--...\
Phase Shift
1.0k
10k
lOOk
f. FREQUENCY [Hzl
1.0M
1
1
10M
-50
FIGURE 9 - NORMALIZED SLEW RATE
versus TEMPERATURE
FIGURE 10 -
I:;;
'>
1.15
;2
,. 1.05
~
~ 1.00
r--
~O.95
~ 0.90
-- ----
co
-15
~
40
~
30
o
>
t--
~
"""-
r-........
"-
~ 20 -
..
":i
§5 10
8
i 0
0
15
50
75
TA. AMBIENTTEMPERATURE ['CI
100
FIGURE 11 -
115
~
+
-
.,
1
]
I.
0.01
0.05
i
,
z
~
t;;
0
is
u
Z
0
:;;
0.1
0.05
- VCCNEE
AV
Vo
~
i
0.1
0.5 1.0
f. FREQUENCY [kHzl
50
100
TOTAL HARMONIC DISTORTION
versus FREQUENCY
==
TA
~ ±
~
15 Vdc
1.0
6.0 V [RMS)
15'C
_.
~
;J 0.01
~ 0.005
0.001
0.1
0.5
1.0
5.0
f. FREQUENCY [kHz]
10
MOTOROLA LINEAR/INTERFACE DEVICES
2-264
~
10
100 n
25'C
I
I
0.5
0
~
.
1.0
Z
RS
TA
1
~{
.
125
JJJl~~AV - II lJdl
I
«
0.85
-50
~
_ ..
50
100
EQUIVALENT INPUT NOISE VOLTAGE
versus FREQUENCY
I
~ 60
~1.10
-25
0
25
50
75
TA. AMBIENTTEMPERATURE [CCI
·1'
5.0
I
i
10
II
50
100
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
REPRESENTATIVE CIRCUIT SCHEMATIC
(Each Amplifier)
Output
r-------------.-------~----._--------~_.----~~_r----._--~~VCC
2.0 k
IMFa~!:l'
{ 1.S k
L-~--~--~-4--+-~~------~----~------------~~---*--~----~--+-~VEE
MC3S001
only)
i
0--------------------'
Bias Circuitry
Common to All
Amplifiers
!
TYPICAL APPLICATIONS
FIGURE 12 - OUTPUT CURRENT TO VOLTAGE TRANSFORMATION
FOR A 0-TO-A CONVERTER
Settling time to within 1/2 LSB (::t 19.5 mV) is approximately 4.0
p.S from the time all bits are switched.
14
MSB Al 5
A2
6
A3
7
A4
8
*The value of C may be selected to minimize overshoot and ring-
Rl
~Vref
ing Ie
15
R2
_ VCC
~
15 V
~
68 pF).
Theoretical Vo
V,ef
[A1
A2
A3
A4
A5
A6
A7
(RO) + - +- + - +- + - + + -A8]
R1
2
4
8
16
32
64
128
256
Vo = -
AS 9
A610
Adjust Vref, Rl or RO so that
level is equal to 9.961 volts.
A7 II
LSB A8 12
Vo with all digital inputs at high
Vref = 2.0 Vdc
VEE
~
R1
~
RO
~
R2 ~ 1.0 k!l
5.0 kll
- 15 V
2V
[1
1
1
1
1
1
1
1]
(5 k) - + - + - + - + - + - + + 1k
2
4
8
16
32
64
128
256
R~
Vo = -
C·
~
255]
10V [ 256
~
9961V
.
MOTOROLA LINEAR/INTERFACE DEVICES
2-265
MC34001, MC35001, MC34002, MC35002, MC34004, MC35004
FIGURE 13 -
POSITIVE PEAK DETECTOR
II
Vout
R~
*Polycarbonate capacitor
01
FIGURE 14 -
=
Hi-speed, low-reverse leakage diode
FIGURE 15 -
LONG INTERVAL RC TIMER
ISOLATING LARGE CAPACITIVE LOADS
R1
R4
R6
Clear
+2.0 ~---l=
Run
-2.0 V ~
* Polycarbonate or
Polystyrene Capacitor
Time It I ~ R4 C/n IVRIVR-VII. R3
If R1 ~ R2: t ~ 0.693 R4C
~
R4, R5
~
• Overshoot <10%
ets =10/.ts
• When driving large eL, the Vout slew rate is determined by Cl
0.1 R6
and lout(max):
Design Example: laO Second Timer
VR ~ 10 v
C ~ 1.0 ~F
R3 ~ R4
R6 ~ 20 k
R5 ~ 2.0 k
R1 ~ R2
~Vout
~
~
~ =
144 M
1.0 k
lout
0.02
CL
= M V/jLS
FIGURE 16 - WIDE BW, LOW NOISE,
LOW DRIFT AMPLIFIER
f max co 240 kHz
R1
• Power BW: f max
=
s,
2'ITVp ~ 240 kHz
• Parasitic input capacitance (Cl ~ 3 pF plus any additional layout capacitance) interacts with feedback elements and creates undesirable
Alel.
high-frequency pole. To compensate add C2 such that: R2C2
=
MOTOROLA LINEAR/INTERFACE DEVICES
2-266
=
0.04 V//J-s (with CL shown)
®
MC34071,2,4
MC35071,2,4
MC33071,2,4
MOTOROLA
HIGH SLEW RATE, WIDE BANDWIDTH,
SINGLE SUPPLY OPERATIONAL AMPLIFIERS
Quality bipolar fabrication with innovative design concepts are
employed for the MC33071/2/4, MC34071/2/4, MC35071/2/4 series
of monolithic operational amplifiers. This series of operational
amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/ILS slew
rate and fast settling time without the use of JFET device technology. Although this series can be operated from split supplies,
it is particularly suited for single supply operation, since the common mode input voltage range includes ground potential (VEE)'
With a Darlington input stage, this series exhibits high input resistance, low input offset voltage and high gain. The all NPN output
stage, characterized by no dead band crossover distortion and
large output voltage swing, provides high capacitance drive capability, excellent phase and gain margins, low open-loop high frequency output impedance and symmetrical source/sink ac frequency response.
The MC33071/2/4, MC34071/2/4, MC35071/2/4 series of devices
are available in standard or prime performance (A Suffix) grades
and are specified over the commercial, industrial/vehicular or military temperature ranges. The complete series of single, dual and
quad operational amplifiers are available in the plastic, ceramic
DIP and SOIC surface mount packages.
• Wide Bandwidth: 4.5 MHz
HIGH PERFORMANCE
SINGLE SUPPLV
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
.~
.~
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
I'
,
Offset Null '
Inputs
VCC
, Output
,
VEE'
• High Slew Rate: 13 V/ILs
, Offset Null
'--------'
• Fast Settling Time: 1.1 ILS to 0.1%
(Single, Top View)
• Wide Single Supply Operation: 3.0 V to 44 V
Output 1 '
• Wide Input Common Mode Voltage Range: Includes Ground (VEE)
• Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)
• Large Output Voltage Swing: -14.7 V to
Supplies)
+ 14 V
Inputs 1
(with ± 15 V
, VCC
I'
,
3
VEE'
-
Output 2
',llnputs 2
'--------'
(Dual, Top View)
• Large Capacitance Drive Capability: 0 to 10,000 pF
• Low Total Harmonic Distortion: 0.02%
• Excellent Phase Margin: 60"
• Excellent Gain Margin: 12 dB
• Output Short Circuit Protection
ORDERING INFORMATION
OpAmp
Function
Single
Dual
Quad
Temperature Range
Device
to
to
to
to
to
+ 70°C
+70°C
+ 70°C
+ 85°C
+ 85°C
- 40°C to
+ 85°C
MC34071 P,
MC34071D.
MC34071U.
MC33071P.
MC33071D.
MC33071U.
MC35071 U.
AP
AD
AU
AP
AD
AU
AU
O°C
O°C
O°C
- 40°C
- 40°C
MC34072P.
MC340720
MC34072U.
MC33072P.
MC33072D
MC33072U.
MC35072U.
AP
AD
AU
AP
AD
AU
AU
O°C
O°C
O°C
- 40°C
-40°C
- 40°C
- 55°C
+ 70°C
+ 70°C
+ 70°C
+ 85°C
+85°C
+ 85°C
+ 125°C
MC34074P.
MC34074D.
MC34074U.
MC33074P,
MC33074D,
MC33074U,
MC35074U,
AP
AD
AU
AP
AD
AU
AU
-
+70°C
+70°C
+ 70°C
+ 85°C
+ 85°C
+ 85°C
+ 125°C
-55°C to +125°C
to
to
to
to
to
to
to
O°C to
O°C to
O°C to
40°C to
40°C to
40°C to
55°C to
Package
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
Plastic DIP
50-8
Ceramic DIP
Plastic DIP
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
50-8
Ceramic DIP
Ceramic DIP
Plastic DIP
50-8
Ceramic DIP
Plastic DIP
50-8
Output 1 ,
14
Output 4
l'
VEE
Inputs 1 { :
Ceramic DIP
Ceramic DIP
VCC.
50-14
Inputs 2 { :
Ceramic DIP
Plastic DIP
"I
Output 2 ,
, Output 3
Plastic DIP
50-14
Ceramic DIP
Ceramic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
2-267
'
(Quad, Top View)
Inputs 3
II
~C34071,34072,34074/~C35071,35072,35074/~C33071,33072, 33074
MAXIMUM RATINGS
Symbol
Value
Unit
Vs
+44
Volts
VIDR
Note 1
Volts
VIR
Note 1
Volts
Output Short-Circuit Duration (Note 2)
ts
Indefinite
Seconds
Operating Junction Temperature
Ceramic Package
Plastic Package
TJ
Rating
Supply Voltage (from VEE to VCC)
Input Differential Voltage Range
Input Voltage Range
°c
+160
+150
Storage Temperature Range
°c
Tstg
Ceramic Package
Plastic Package
-65 to + 160
-60 to + 150
NOTES:
1. Either or both input voltages should not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature ITJ} is not exceeded (see Figure 1).
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
VCC
t-'VI.~..-'I.M,_+--o
R8
Inputs
+o-----------~----------~_+--~----------~
R3
R4
Offset Null
(MC33071, MC34071, MC35071 only)
MOTOROLA LINEAR/INTERFACE DEVICES
2-268
Output
~C34071,34072,34074/~C35071,35072,35074/~C33071,33072, 33074
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = - 15 V, RL = connected to ground unless otherwise noted.
See IN oe
t 31 f or TA= T low t
0 T
highl
A Suffix
Symbol
Characteristic
Input Offset Voltage (RS
VCC = + 15 V, VEE =
VCC = +5.0 V, VEE =
VCC = +15 V, VEE =
= 100 n, VCM = 0 V, Vo = 0 VI
- 15 V, T A = + 25'C
0 V, TA = +25'C
- 15 V, TA = Tlow to Thiah
VIO
-avIO/aT
Average Temperature Coefficient of Input Offset Voltage
Min
Non-Suffix
Typ
Max
0.5
0.5
Min
Typ
Max
1.0
1.5
Unit
mV
-
-
3.0
3.0
5.0
-
10
-
-
100
-
-
500
700
-
6.0
-
-
-
-
-
5.0
5.0
7.0
10
-
-
-
100
-
500
700
-
6.0
-
-
75
300
p,VI"C
RS = 10 n, VCM = 0 V, Vo = 0 V, TA = Tlow to Thigh
Input Bias Current (VCM = 0 V, Vo = 0 VI
TA = +25'C
TA = TlowtoThigh
liB
Input Offset Current (VCM = 0 V, Vo = 0 VI
TA = +25'C
TA = Tlow to Thigh
110
Input Common Mode Voltage Range
TA = +25'C
TA = Tlow to Thigh
VICR
Large Signal Voltage Gain (VO = ±10 V, RL = 2.0 knl
TA = +25'C
TA = Tlow to Thiah
AVOL
Output Voltage Swing (VID =
VCC = +5.0 V, VEE = 0 V,
VCC = +15 V, VEE = -15
VCC = +15 V, VEE = -15
± 1.0 VI
RL = 2.0 kn, TA = +25'C
V, RL = 10 kn, TA = +25'C
V, RL = 2.0 kn, TA = Tlowto Thigh
VOH
VCC = +5.0 V, VEE = 0 V, RL = 2.0 kn, TA = +25'C
VCC = +15 V, VEE = -15 V, RL = 10 kn, TA = +25'C
VCC = +15 V, VEE = -15 V, RL = 2.0 kn, TA = Tlow to Thigh
VOL
nA
nA
50
300
V
VEE to (VCC - 1.81
VEE to (VCC - 2.21
Output Short-Circuit Current (VID = 1.0 V, Vo = 0 V, TA = 25'CI
V/mV
50
25
100
3.7
13.6
13.4
4.0
14
-
-
-
25
20
100
-
-
-
3.7
13.6
13.4
4.0
14
-
-
-
V
-
-
0.1
0.3
-14.7 -14.3
-13.5
-
-
0.1
0.3
-14.7 -14.3
-13.5
-
10
20
30
30
-
97
-
dB
dB
10
20
30
30
70
Common Mode Rejection
RS = 100 kfl, VCM = VICR, TA = 25'C
CMR
80
97
-
Power Supply Rejection (RS = 100 III
'CCNEE = +16.5V/-16.5Vto +13.5 V/-13.5 V, TA = 25'C
PSR
80
97
-
70
97
-
-
1.6
1.9
-
1.6
1.9
-
-
2.0
2.5
2.8
-
-
2.0
2.5
2.8
Sink
Power
VCC
VCC
VCC
Supply Current (Per Amplifier, No Loadl
= +5.0 V, VEE = 0 V, Vo = +2.5 V, TA = +25'C
= +15V, VEE = -15V, Vo = OV, TA = +25'C
= +15 V, VEE = -15 V, Vo = 0 V, TA = Tlow to Thigh
mA
ID
-
NOTES: (continued)
3. Tlow
=
=
=
- 55'C for MC35071,2.4.1A
-40'C for MC33071,2.4.1A
O'C for MC34071,2A.lA
Thigh
=
+ 125'C for MC35071,2.4.1A
=
+B5°C for MC33071,2,4./A
= + 70'C for
MC34071,2A.lA
MOTOROLA LINEAR/INTERFACE DEVICES
2-269
V
mA
ISC
Source
VEE to (VCC - 1.81
VEE to (VCC - 2.21
-
II
II
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071, 33072, 33074
~ + 15 V, VEE ~ -15 V, RL ~ connected to ground, TA ~ + 25°C unless
otherWise noted)
AC ELECTRICAL CHARACTERISTICS (VCC
Non-Suffix
A Suffix
Characteristic
Slew Rate (Vin
AV ~ +1.0
AV ~ -1.0
~
- 10 V to + 10 V, RL
~
Symbol
2.0 kfl, CL
~
500 pF)
Min
Gain Bandwidth Product (f
Power Bandwidth
AV ~ + 1.0, RL
~
Phase Margin
RL ~ 2.0 kfl
RL ~ 2.0 kfl, CL
Gain Margin
RL ~ 2.0 kfl
RL ~ 2.0 kfl, CL
~
ts
100 kHz)
2.0 kfl, Va
~
20 Vp_p, THO
~
Max
Typ
10
13
-
B.O
-
-
10
13
-
-
1.1
2.2
-
-
1.1
2.2
-
4.5
-
3.5
4.5
-
MHz
-
200
-
-
200
-
kHz
-
60
40
-
-
60
40
-
12
4.0
-
-
-
-
32
-
12
4.0
-
32
-
0.22
-
-
0.22
-
5.0%
Deg
-
dB
Equivalent Input Noise Voltage
RS ~ 100 fl, f ~ 1.0 kHz
en
-
Equivalent Input Noise Current
f ~ 1.0 kHz
in
-
300 pF
Differential Input Capacitance
VCM ~ 0 V
Total Harmonic Distortion
AV ~ + 10, RL ~ 2.0 kfl, 2.0 Vp_p '" Va'" 20 Vp_p, f
~
3.0 V to 44 V
pAl
-
150
-
-
150
-
Mfl
CIN
-
2.5
-
-
2.5
-
pF
THO
-
0.02
-
-
0.02
-
%
-
120
-
-
120
30
-
-
30
-
dB
-
10 kHz
-
10kHz)
~
1.0 MHz)
IZol
POWER SUPPLY CONFIGURATIONS
SINGLE SUPPLY
pAl
v'Hz
,-
RIN
VCM ~ 0 V
FIGURE 1 -
-
v'Hz
Differential Input Resistance
~
I'-S
3.5
-
Channel Separation (f
-
BW
300 pF
Open-Loop Output Impedance (f
Unit
GBW
Am
~
Max
V/I'-s
~
o
-2.0
;;!;
400
20 40
60 SO 100 120
TA, AMBIENT TEMPERATURE 1°C}
-4.0
r-....
140
160
j
VCCNEE
~
FIGURE 6 -
I---
<>
I---
f.---- e----
..,~
1.2 ~
i1§
~1.1
!z
-------
g§
a
VCC-2.4
VEE+O.Ol
~
>-~
~
r
;;!;
-25
0
+25
+50
+75
""
+100
+125
i"--
"~
---..........
o.g
-..............
O.B
']'.,
0.7
-55
-B
0
B
W
>--
1"--- ,...."
g§ 1.0
=>
u
-~
t-----.,
TA, AMBIENT TEMPERATURE 1°C}
1.4
1.2
VEE ~ -15V
VCM ~ 0
1.0
NORMALIZED INPUT BIAS CURRENT versus
INPUT COMMON MODE VOLTAGE
<>
:;
a:
0
+125
~
FIGURE 7 -
;J,
+100
vcc~I+15V
TA, AMBIENT TEMPERATURE 1°C}
~
+75
NORMALIZED INPUT BIAS CURRENT
versus TEMPERATURE
-~
r::~
+15V
-15V
0
r=-==I-
>
t;;
f'.
r-
2.0 1-----
~
0
f'.
VEE ~
VCM
t:---.
'-"
S & 14 Pin Plastic Pkg.
ilk
"I
Pkg.
t"'1:--
a:
1!i
:>
.s
w
S & 14 Pin Ceramic Pkg.
o
:;
VCC~
4.0
20
25
~C34071,34072,34074/~C35071,35072,35074/~C33071i33072, 33074
FIGURE 9 -
II
1t-
Vee
!------ Vcc
Vce-tO
r-....
VCcNEE ~ +5.0V/-5.0Vto +22V/-22V
TA ~ 25°C
I
J
VCC
I I 1ill1
VccV
,/'
Vcc- 2.O
I I 11111
~
~ Vcc- 4.O
VCC ~ +15V
RL ~ Gnd
TA ~ 25°C
~
~
--I-.
Source
Vcc-2.O
FIGURE 10 - SINGLE SUPPLY OUTPUT SATURATION
versus LOAD RESISTANCE TO GROUND
SPLIT SUPPLY OUTPUT SATURATION
versus LOAD CURRENT
~
~
~
~
~
~
:::,:D4dfttfll :::IIIIIIUIIIIIIIIIIIIIIIIIII~
5.0
10
20
15
100
1.0K
10K
RL, LOAD RESISTANCE TO GROUND (01
IL' LOAD CURRENT ( ± mAl
FIGURE 11 - SINGLE SUPPLY OUTPUT SATURATION versus
LOAD RESISTANCE TO VCC
FIGURE 12 -
OUTPUT SHORT CIRCUIT CURRENT
versus TEMPERATURE
60
1::1
~
;;!i +2.0
~
J+1.0
wrlllllllllllllllill
I I IIIII
"'-
I-Gnd
-
"-
I I IIIII
VCC ~ +15V
RL to VCC
TA ~ 250C
50
1
~ ·40
30
§
20
1.0K
10K
~
+15V
-15V
RL'" 0.1 0
dVin ~ tOV
I
10
-55
0
-~
50
~
~
;t
~
~
~
i' I .J.ittijXlIIIIII
~
I
AV
~
10
~>
IAV ~ 1.0
,-
20
\
--
-_.-
--
---- f-- -
1---- .. -
o
1.0M
10M
3.0K
10K
30K
f, FREQUENCY (Hzl
lOOK
f, FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-272
r-
_.
--I--
~ 4.0
I--15V I-I-+1.0
RL ~ 2.0k
I-THO", 1.0%
TA ~ 25°C
.. - 1--
,-
i
~
o
\
16
o
lOOK
125
~C~I~I~15V
~
AV~
12
::::l
10K
100
VEE
\
1= 8.0
10
.-
\
-c. 24
100
-
FIGURE 14 - OUTPUT VOLTAGE SWING versus FREQUENCY
28
~
~
VEE~
1
AV
~
~
TA, AMBIENT TEMPERATURE (OCI
Vcc- +15V
VEE ~ -15V
VCM ~ 0
Vo ~ 0
.110 ~ ±0.5mA
TA ~ 25°C
loOK
---.........
o
lOOK
FIGURE 13 - OUTPUT IMPEDANCE versus FREQUENCY
AV ~ 100f
~
VCC
RL, LOAD RESISTANCE TO VCC (01
50
-
~
-L 111111
I\ I
100
Source
aa:
lOOK
lOOK
r-...
1.0M
r3.0M
~C34071,34072,34074/~C35071,35072,35074/~C33071,33072, 33074
FIGURE 15 -
FIGURE 16 - OUTPUT DISTORTION versus
OUTPUT VOLTAGE SWING
OUTPUT DISTORTION versus FREQUENCY
0.4
4.0
I 1000
AV
~
z 0.3
0
>=
a:
~<:>
l-
=>
=>
0
ci
I-
_
AV
~
AV
~1'0
0.1
0
VCC ~ +15V
VEE ~ -15V Vo ~ 2.0 Vp•p
RL ~ 2.0k
TA ~ 25°C
0.2
1'=
:J:
~
z 3.0
I
is 2.0
l-
=>
=>
0
1.0K
f, FREQUENCY (Hzl
FIGURE 17 -
10K
lOOK
I~
~~
108
§!
f-
,
4.0
OPEN-LOOP VOLTAGE GAIN versus
TEMPERATURE
VCC ~ +15V
VEE ~ -15V
Vout ~ -10Vto +10V
RL ~ 10 k
f., 10 Hz
/
FIGURE 18 - OPEN-LOOP VOLTAGE GAIN AND
PHASE versus FREQUENCY
~
/
z
:;;:
'"
'"~
'"
80
~
c(
/
"'"
'"
\
Gain
'"
' \ Phase
60
'--.
0
>
0-
§ 104
0
:Z
~lOO
~
~
-~
9
./
-25
:Z
~
.::. 20
0
it
+25
+50
+100
+75
+125
1.0
100
10
~
z
10
r--
~
1
~
~
~~
,
'J
r,
~
0-
g
~ -20
~
<5 -30
~
-40
~
l-PhaseRL ~ 2.0k
l
2-PhaseRL ~ 2.0k,CL ~ 300pF\
3-GainRL ~ 2.0k
\
4 - Gain RL ~ 2.0 k, CL ~ 300 pF
Vce ~ +15V
VEE ~ -15V
TA ~ 25°C
Vout~OV
1.0
2.0
3.0
5.0
7.0
t
1
~
VCC~
VEE ~
"
~
3
" ,
4
"
\
,
10
20
100M
I
100
1
,, "-"
180
10M
1.15
I I I III.
--- 1---' -..
~
§! -10
"
tOM
\
FIGURE 20 - NORMALIZED GAIN BANDWIDTH
PRODUCT versus TEMPERATURE
Phase
,2 .... Margin = 60° Gain
Margin ~ 12 dB ~,
~
lOOK
f, FREQUENCY (Hzl
FIGURE 19 - OPEN-LOOP VOLTAGE GAIN AND
PHASE versus FREQUENCY
.......::..:,-- .... -
10K
~60"
1
'"
1.0K
Phase
Margin
""'-
Vce ~ +15V
VEE ~ -15V
Vout ~ 0 V
RL ~ 2.0k
TA ~ 25°C
TA, AMBIENT TEMPERATURE (OCI
20
~
40
o
96
-55
20
16
12
8.0
VO, OUTPUT VOLTAGE SWING (Vp-pl
100
112 -
100
~
AV ~ 10
AV';" 1.0
0
116
iii
~
~
AV
~
ci 1.0
:J:
I-
0
100
1000
1'=
AV - 1.0
10
~
0
lV>
-
100-
AV
>=
a:
VCC ~ +15V
VEE ~ -15VRL ~ 2.0k
TA ~ 25"C
"-
~
...
~
.......,.,
"
~
.......,.,
~
\
0.85
-55
30
-~
0
~
60
~
TA, AMBIENT TEMPERATURE (OCI
f, FREQUENCY (MHzl
MOTOROLA LINEAR/INTERFACE DEVICES
2-273
+15V
-15V
RL~2.0k
~
100
125
II
II
~C34071,34072,34074/~C35071,35072;35074/~C33071,33072, 33074
FIGURE 22 - PHASE MARGIN versus
LOAD CAPACITANCE
FIGURE 21 - PERCENT OVERSHOOT versus
LOAD CAPACITANCE
100
70
VCC = +15V
VEE = -15V
80
RL=2.0k
b
I- Vo = -10Vto +10V
0
:r:
l(! 60 I- TA = 25'C
!--t- - +
~
0
I-
:z
~
I
'-.,
V
I
"-
I
V
I
VCC = +15V
VEE = -15V
AV = +1.0
RL = 2.0kto oo
Vo = -10Vto +10V
TA = 25'C
I--
!
40
V
ll:'
I
f--
/
20
/'
............
10 f--
t-
o
10
1.0K
100
10
10K
FIGURE 24 -
FIGURE 23 - GAIN MARGIN versus LOAD CAPACITANCE
r'--I'
~ 10
i
VCC = +15V
VEE = -15V
AV= +1.0
RL = 2.0ktooo
Vo = -10Vto +10V
TA = 25'C
I
I
t"----
z
8.0
'"
~ 6.0
'"
.14.0
2.0
10
i1il
60
...............
-
r--
z
i3 40
~
:;;;
tJl
«
if 20
E
il-
1.0K
---
e
"I'
100
r--
-55
10K
~
12
z
~
~
8.0
I
~
r---VEE = -15 V
I
AV= +1.0
RL = 2.0 kto 00
"" Vo = -10Vto +10V
z
~
.1 4.0
I
"" r--.. t--b
-25
-
VCC = +15V
VEE = -15V
AV= +1.0
RL = 2.0ktooo
Vo = -10Vto +10V
CL = 1,000 pF
-
--
CL - 10,000 pF
I
-~
~
W
100
Th
125
FIGURE 26 - PHASE MARGIN AND GAIN MARGIN versus
DIFFERENTIAL SOURCE RESISTANCE
12
I
Gain
J
~ 8.0
~
z
:;;:
CL = 10,000 pF
I
I
50
~
75
TA, AMBIENT TEMPERATURE I'CI
+
i3 6.0
I
25
~
z
CL~100pF
I
70
II'
10
CL = 10 pF
CL = 1,000pF
o
-55
CL = 10 pF
~
--EL= loopF
TA, AMBIENT TEMPERATURE I'CI
FIGURE 25 - GAIN MARGIN versus TEMPERATURE
~-I
--1
r--- -
CL, LOAD CAPACITANCE IpFI
16
10K
PHASE MARGIN versus TEMPERATURE
80 _ . _ . _ - -
14
12
1.0K
100
CL, LOAD CAPACITANCE IpFI
CL, LOAD CAPACITANCE IpFI
100
-
R2
VCC = +15V
VEE = -15V
RT = Rl + R2
AV = +100
Vo = OV
TA = 25'C
.1111
4.0
'".1 2.0
125
1.0
~
1'.
Phase
I'
10
100
1.0K
10K
RT, DIFFERENTIAL SOURCE RESISTANCE lUI
MOTOROLA LINEAR/INTERFACE DEVICES
2-274
0
lOOK
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071, 33072, 33074
FIGURE 27 -
NORMALIZED SLEW RATE
FIGURE 28 - OUTPUT SETTLING TIME
versus TEMPERATURE
1.15
c
;
VCC ~ +15V
VEE ~ -15V
AV ~ +1.0
1.1
1.05 ~
RL~2.0k
.............
o
~ 1.0
CL
f'--...
...............
~
~ 0.95
o
..............
100
75
............~
"" 1'\
t--
~
50
/
-
~
-10
o
125
0.5
........
,
1,\
1.0
TA, AMBIENT TEMPERATURE lOCI
1.0 mV
1.0mV' ~:t,
10mV
1.5
""",
2.5
2.0
3.5
3.0
Is, SETTLING TIME I/Ls)
FIGURE 29 - SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 30 -
LARGE SIGNAL TRANSIENT RESPONSE
~
.V'-2.0/Ls/OIV
1.0lLSiOlV
FIGURE 31 - COMMON MODE REJECTION
versus FREQUENCY
100
--..;;:
rTA
TA
25°C
~
'"''""-
1
rr-
aVCM
0.1
0-$--0
+
r- CMR ~
I
o r1.0
VCC ~ +15V
VEE = -15V
VCM = OV
aVCM = ±1.5V
~
.
20Log
I
aVO
.1
(a:~M x AOM)
I
011
10
100
1.0K
10K
f, FREQUENCY 1Hz)
iii
:s
z
0
!
----L
1
80
:OM
it
:::>
Vo
1.0
10
100
VCC ~ +15V
VEE = -15V
TA ~ 25°C
+PSR
..............
I
"""11>Vcc = ± 15 V)
2-275
'\.
'"" "'-
\
-PSR ~
I1>VEE = ±l-:5V)
1.0K
f, FREQUENCY 1Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
i'-..
10K
lOOK
1.0M
10M
II
II
~C34071,34072,34074/~C35071,35072,35074/~C33071,33072, 33074
FIGURE 34 - POWER SUPPLY REJECTION
versus TEMPERATURE
FIGURE 33 - SUPPLY CURRENT versus SUPPLY VOLTAGE
9.0
TA = -55°C
~ 8.0
...--
f-
J.---1
!z
~
§ 7.0
/'
u
i
ill 6.0 I V
f/
.B
5.0
V
/
/1-"""
V
v+-:
TA = 25°C
f-.1--
~
TA = 125°C
-
105
/""
/
-
r-
10
15
VCC, IVEEI, SUPPLY VOLTAGE IV)
--+-
100 r-vcc= +15V
I- VEE = -15V
z
I- TA = 25°C
0
80
~
!i
~
-
\'r---
~
!:; 40
0
1\
>
III 30
5
>-
~
20
,g.
10
20
50
70
30
t, FREQUENCY IkHzl
100
200
1 100
125
300
2,8
I"'~ '.
Vcc = +15V
VEE = -15V
VCM = 0
TA = 25°C
I
2.4
2.0
1.6
__ Voltage
o
10
dVo '-
10
100
II fl
I.OK
t, FREQUENCY IHzl
~
!z
~
0
III
1.2 ~
5
0.8 ~
~III
~
20
(EE
""""
IIII
6
z
40
-
25
60
~
'\.
"'An.
(d~~:~M) - 1=
~ 50 ~
"""
1
FIGURE 36 - INPUT NOISE versus FREQUENCY
~
r-.......
Ff.
1
50
75
TA, AMBIENT TEMPERATURE 1°C)
25
20
~
~
z
z
PSR IdVcc = ± 1.5 VI
70
60
III
r
+ PSR = 20Log (dVO/ADM)
dVcc
-
r- -PSR = 20Log
65
-55
-25
FIGURE 35 - CHANNEL SEPARATION versus FREQUENCY
120
I----
V/
/
5.0
V
k::::""
/ V
4.0
o
I
Vcc= +15V
VEE = -15V
-PSR IdVEE = ± 1.5 V)
._2=
0.4
10K
lOOK
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES OF THE MC34071 SERIES
shown by the maximum rating table. In practice,
although not recommended, the input voltages can
exceed the VCC voltage by approximately 3.0 volts and
decrease below the VEE voltage by 0.3 volts without
causing product damage, although output phase reversal may occur. It is also possible to source up to approximately 5.0 rnA of current from VEE through either
input's clamping diode without damage or latching,
although phase reversal may again occur.
If one or both inputs exceed the upper common mode
voltage limit the amplifier output is readily predictable
and may be in a low or high state depending on the
existing input bias conditions.
Although the bandwidth, slew rate, and settling time
of the MC34071 amplifier series are similar to op amp
products utilizing JFET input devices, these amplifiers
offer other additional distinct advantages as a result of
the PNP transistor differential input stage and an all NPN
transistor output stage,
Since the input common mode voltage range of this
input stage includes the VEE potential, single supply
operation is feasible to as low as 3.0 volts with the
common mode input voltage at ground potential.
The input stage also allows differential input voltages
up to ±44 volts, provided the maximum input voltage
range is not exceeded. Specifically, the input voltages
must range between VEE and VCC supply voltages as
MOTOROLA LINEAR/INTERFACE DEVICES
2-276
NtC34071, 34072, 340741 NtC35071, 35072, 350741 NtC33071, 33072, 33074
Since the input capacitance associated with the small
geometry input device is substantially lower (2.5 pF)
than the typical JFET input gate capacitance (5.0 pF),
better frequency response for a given input source resistance can be achieved using the MC34071 series of
amplifiers. This performance feature becomes evident,
for example, in fast settling O-to-A current to voltage
conversion applications where the feedback resistance
can form an input pole with the input capacitance of the
op amp. This input pole creates a 2nd order system with
the single pole op amp and is therefore detrimental to
its settling time. In this context, lower input capacitance
is desirable especially for higher values of feedback
resistances (lower current OAC's). This input pole can
be compensated for by creating a feedback zero with a
capacitance across the feedback resistance, if necessary, to reduce overshoot. For 2.0 kO of feedback resistance, the MC34071 series can settle to within 1/2 LSB
of 8 bits in 1.0 JLS, and within 1/2 LSB of 12 bits in 2.2 JLS
for a 10 volt step. In a inverting unity gain fast settling
configuration, the symmetrical slew rate is ± 13 volts/
JLS. In the classic noninverting unity gain configuration
the output positive slew rate is + 10 volts/JLs, and the
corresponding negative slew rate will exceed the positive slew rate as a function of the fall time of the input
waveform.
Since the bipolar input device matching characteristics are superior to that of JFETs, a low untrimmed
maximum offset voltage of 3.0 mV prime and 5.0 mV
downgrade can be economically offered with high frequency performance characteristics. This combination is ideal for low cost precision, high speed quad
op amp applications.
The all NPN output stage, shown in its basic form on
the equivalent circuit schematic, offers unique advantages over the more conventional NPN/PNP transistor
Class AB output stage. A 10 kO load resistance can
swing within 1.0 volt of the positive rail (VCe), and
within 0.3 volts of the negative rail (VEE), providing a
28.7 V p _p swing from ± 15 volt supplies. This large output swing becomes most noticable at lower supply
voltages.
The positive swing is limited by the saturation voltage
of the current source transistor 07, and VBE of the NPN
pull up transistor 017, and the voltage drop associated
with the short circuit resistance, R7. The negative swing
is limited by the saturation voltage of the pull-down
transistor 016, the voltage drop ILR6, and the voltage
drop associated with resistance R7, where IL is the sink
load current. For small valued sink currents, the above
voltage drops are negligible, allowing the negative
swing voltage to approach within millivolts of VEE. For
large valued sink currents (>5.0 mAl, diode 03 clamps
the voltage across R6, thus limiting the negativ<;l swing
to the saturation voltage of 016, plus the forward diode
drop of 03 (=VEE + 1.0 V). Thus for a given supply
voltage, unprecedented peak-to-peak output voltage
swing is possible as indicated by the output swing
specifications.
If the load resistance is referenced to VCC instead of
ground for single supply applications, the maximum
possible output swing can be achieved for a given sup-
ply voltage. For light load currents, the load resistance
will pull the output to VCC during the positive swing
and the output will pull the load resistance near ground
during the negative swing. The load resistance value
should be much less than that ofthe feedback resistance
to maximize pull up capability.
Because the PNP output emitter-follower transistor
has been eliminated, the MC34071 series offers a 20 mA
minimum current sink capability, typically to an output
voltage of (VEE + 1.8 V). In single supply applications
the output can directly source or sink base current from
a common emitter NPN transistor for fast high current
switching applications.
In addition, the all NPN transistor output stage is
inherently fast, contributing to the bipolar amplifier's
high gain bandwidth product and fast settling capability.
The associated high frequency low output impedance
(300 typ @ 1.0 MHz) allows capacitive drive capability
from 0 to 10,000 pF without oscillation in the unity
closed loop gain configuration. The 60° phase margin
and 12 dB gain margin as well as the general gain and
phase characteristics are virtually independent of the
source/sink output swing conditions. This allows easier
system phase compensation, since output swing will
not be a phase consideration. The high frequency characteristics of the MC34071 series also allow excellent
high frequency active filter capability, especially for low
voltage single supply applications.
Although the single supply specification is defined at
5.0 volts, these amplifiers are functional to 3.0 volts @
25°C although slight changes in parametrics such as
bandwidth, slew rate, and dc gain may occur.
If power to this integrated circuit is applied in reverse
polarity or if the IC is installed backwards in a socket,
large unlimited current surges will occur through the
device that may result in device destruction.
Special static precautions are not necessary for these
bipolar amplifiers since there are no MOS transistors
on the die.
As usual with most high frequency amplifiers, proper
lead dress, component placement, and PC board layout
should be exercised for optimum frequency performance. For example, long unshielded input or output
leads may result in unwanted input-output coupling. In
order to preserve the relatively low input capacitance
associated with these amplifiers, resistors connected to
the inputs should be immediately adjacent to the input
pin to minimize additional stray input capacitance. This
not only minimizes the input pole for optimum frequency response, but also minimizes extraneous "pick
up" at this node. Supply decoupling with adequate
capacitance immediately adjacent to the supply pin is
also important, particularly over temperature, since
many types of !iecoupling capacitors exhibit great
impedance changes over temperature.
The output of anyone amplifier is current limited and
thus protected from a direct short to ground. However,
under such conditions, it is important not to allow the
device to exceed the maximum junction temperature
rating. Typically for ± 15 volt supplies, anyone output
can be shorted continuously to ground without exceeding the maximum temperature rating.
MOTOROLA LINEAR/INTERFACE DEVICES
2-277
II
II
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071, 33072, 33074
TYPIC.AL SINGLE SUPPLY APPLICATIONS VCC
FIGURE 37 -
= 5.0 VOLTS
FIGURE 38 -
AC COUPLED NONINVERTING AMPLIFIER
AC COUPLED INVERTING AMPLIFIER
~
n-
VCC
5.1M
Vo
0~3.7Vp.p
20 k
I
1.0M
Cin
Vcc
f--+--I+
MC34071
Co
100k
1.0 k
100k
~cin
11~~37-0-m~v~p_-p~~-¥~~ :r,
V
Co
JO
BW 1-3.0 dB)
= 45
RL
~~K
AV = 101
kHz
AV
=
FIGURE 39 - DC COUPLED INVERTING AMPLIFIER
MAXIMUM OUTPUT SWING
~
V~
r------.---o
4.75 V p_p
I
VCC
91 k
5.1 k
5.1 k
=
10 BW 1-3.0 dB)
FIGURE 40 -
2.63 V
vo
10 k
=
450 kHz
UNITY GAIN BUFFER TTL DRIVER
2.5 V
on
MC54/74XX
MC34071
RL
MC34071
TTL Gate
>-+-0 Vo
1.0M
AV = 10
BW 1-3.0 dB) = 450 kHz
FIGURE 41 -
ACTIVE HIGH-Q NOTCH FILTER
Vin '" 0.2 Vdc
FIGURE 42 -
MC34071
Vo
Vin
R1
R
R
16 k
16 k
1.1 k
R2
5.6 k
0.01
2R
to = 1.0 kHz
fa
2C
0.02
C
0.047
R3
2.2 k
MC34071
Vin
+
C
32 k
ACTIVE BANDPASS FILTER
=
1
4-rrRC
C
0.047
+
VCC
fa
60.4 VCC
Given fo = Center Frequency
Ao = Gain at Center Frequency
Choose Value fo, Q, A o • C
Q
Then
R3 = -
=
..toC
2C
0.02
For less than 10% error from operational amplifier
Ooto < 0.1
GBW
Where fo and GBW are expressed in Hz.
GBW = 4.5 MHz Typ.
MOTOROLA LINEAR/INTERFACE DEVICES
2-278
30 kHz
Q = 10
Ho = 1.0
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071, 33072, 33074
FIGURE 44 FIGURE 43 -
CF
+
5.0 k
10 k
5.0 k
10 k
MC34071
5.0 k
10 k
,o,.vol
HIGH SPEED LOW VOLTAGE COMPARATOR
LOW VOLTAGE FAST D/A CONVERTER
I
I
I
I
VO:
2.0 k
RL
_1.0V
I
I
I
I
t
:
I
_11 __ 0.2 /LS
4.0 V - -:- -
~
Delay
25 VI/Ls
0.1 '==-'=-=-_---.l.___'__
(R-2R) Ladder Network
-I 1-- Delay
Settling Time
1.0 /Ls (8 Bits, 112 LSB)
FIGURE 45 -
1.0/Ls
LED DRIVER
FIGURE 46 - TRANSISTOR DRIVER
VCC
VCC
"'1/ "ON"
-1--"
Vin < VRef
~
"ON"
VCC
MC34071
r
-=- VRef
~ Vin
(A) PNP
> VRef
FIGURE 47 - AC/DC GROUND CURRENT MONITOR
FIGURE 48 -
(B) NPN
PHOTOVOLTAIC CELL AMPLIFIER
ILoad
MC34071
+----1+
>-_~o
Ground Current
Sense Resistor
ICell
Vo
!
MC34071
>-----<1----0 Vo
RS
R1
R2
Vo = ILoad RS (1 +
iH)
VCell = 0 V
Vo = ICe II RF
VO> 0.1 V
For Vo > 0.1 V
BW (-3.0 dB)
=
GBW (R1
~ R2)
MOTOROLA LINEAR/INTERFACE DEVICES
2-279
II
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071, 33072, 33074
FIGURE 49 -
LOW INPUT VOLTAGE COMPARATOR
WITH HYSTERESIS
!
,J-----~~
R2
VRef
FIGURE 50 - HIGH COMPLIANCE VOLTAGE TO
SINK CURRENT CONVERTER
R1
lout
VOLb±d.-vin
VinL
I
VinH
VRef
R1
VinL ~ R1 + R2 (VOL - VRef) + VRef
I
R1
VinH ~ R1 + R2 (VOH - VRef) + VRef
out
~
Yin ± Via
--R--
R
R1
VH ~ R1 + R (VOH - VOL)
FIGURE 51 - HIGH INPUT IMPEDANCE
DIFFERENTIAL AMPLIFIER
FIGURE 52 -
BRIDGE CURRENT AMPLIFIER
R2
R1
Vo
+V10-----i
*
+V2O---------~
~ ~ (Critical to CMRR)
Va
~
1( +
~) (V2
- V1
~)
Ll.R«
RF»
Ll.R RF
Va ~ VRef2R2
R
R
(Va'" 0.1 V)
For (V2 '" V1), V > 0
FIGURE 53 -
FIGURE 54 - HIGH FREQUENCY PULSE
WIDTH MODULATION
LOW VOLTAGE PEAK DETECTOR
fOSC '" 0.85
-- ISC
+~B
+
RC
Va ~ Yin (pk)
o
t
Base Charge
Removal
T
+
Vp
10,000 pF
V+
47 k
OSC
MOTOROLA LINEAR/INTERFACE DEVICES
2-280
Comparator
High Current
Output
~C34071,34072,34074/~C35071,35072,35074/~C33071,33072, 33074
GENERAL ADDITIONAL APPLICATIONS INFORMATION Vs
FIGURE 55 -
SECOND ORDER LOW-PASS ACTIVE FILTER
FIGURE 56 -
= ± 15 VOLTS
SECOND ORDER HIGH-PASS ACTIVE FILTER
o---j1~;5;~
R1
560
C1
1.0
II
R1
46.1 k
R2
10 = 100 Hz
Ho = 20
1.1 k
fo = 1.0 kHz
Ho = 10
Choose: 10 • Ho. C1
Choose: 10 , Ho. C2
Then: C1
V2
R2=-47rloC2
2C2 (H o + 1)
=
R3=~
Ho + 1
FIGURE 57 -
FIGURE 58 -
FAST SETTLING INVERTER
Vo
=
R2
=
V2
-=2m-'-oC::::1:-(;;'1I::-:H'--0-'+---::;-2)
C2
=
~
R2
!
ts = 1.0 I-'S
to 1/2 LSB (8 Bits)
\ ts
Compensated
Ho
>-_-""T""O Vo
R1
Uncompensated
Ho + 0.5
m oC1V2
MC34071
+
>-------40..-0 Vo
=
=
BASIC INVERTING AMPLIFIER
10 V
Step
2.0 k
I~
Then: R1
I to
Vo = ~
Vin
R1
2.21-'s
112 LSB (12 Bits)
=
BW (-3.0 dB
=
GBW
[
R1
]
R1 + R2
'Optional Compensation
FIGURE 59 -
FIGURE 60 -
BASIC NON INVERTING AMPLIFIER
UNITY GAIN BUFFER (AV
= + 1.0)
Vo
o
R2
R1
=
=
Vo
Vin
BW (-3.0 dB)
=
(1 +~)
R1
=
=
BWp = 200 kHz
Vo = 20 V p_p
SR = 10 VII-'s
GBW [R1 :1 R2]
MOTOROLA LINEAR/INTERFACE DEVICES
2-281
Vo
MC34071, 34072, 34074/ MC35071, 35072, 35074/ MC33071,33072, 33074
. FIGURE 61 - HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER
II
R
R
MC34074
>-----0
Va
+
R
MC34074
Example:
R
Let: R
~
Then: AV
+
R
BW
~
RE
~
~
12 k
3.0
1.5 MHz
=
FIGURE 62 -
DUAL VOLTAGE DOUBLER
+
MC34074
+
100 k
10
+10
r
MC34074
220pF
100 k
+
RL
+Vo
-Va
18.93
-18.78
10 k
18
-18
5.0 k
15.4
-15.4
+
MC34074
10
100 k
' - - - - - 4 - - " - - - 0 - Va
MOTOROLA LINEAR/INTERFACE DEVICES
2-282
®
MC34080/MC35080
MOTOROLA
thru
MC34085/MC35085
HIGH SLEW RATE, WIDE BANDWIDTH,
JFET INPUT OPERATIONAL AMPLIFIERS
These devices are a new generation of high speed JFET input
monolithic operational amplifiers. Innovative design concepts
along with JFETtechnology provide wide gain bandwidth product
and high slew rate. Well matched JFET input devices and advanced trim techniques ensure low input offset errors and bias
currents. The all NPN output stage features large output voltage
swing, no dead band crossover distortion, high capacitive drive
capability, excellent phase and gain margins, low open-loop output impedance, and symmetrical source/sink ac frequency
response.
This series of devices are available in standard or prime performance (A suffix) grades, fully compensated or decompensated
(AVCL;,,2) and are specified over commercial or Military temperature ranges. They are pin compatible with existing Industry standard operational amplifiers, and allow the designer to easily upgrade the performance of existing designs.
• Wide Gain Bandwidth: B.O MHz for Fully Compensated De_ices
16 MHz for Decompensated Devices
• High Slew Rate: 25 V/jJ-s for Fully Compensated Devices
50 V/jJ-s for Decompensated Devices
• High Input Impedance: 10 12
n
HIGH PERFORMANCE
JFET INPUT
OPERATIONAL AMPLIFIERS
.~
.~
,
,
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
PIN ASSIGNMENTS
Offset Null
2
7
VCC
Noninvt Input
3
6
Output
' - _ _- - I5-
• Large Output Voltage Swing: -14.7 V to + 14 V for
VCCNEE ~ ± 15 V
n
1
Invt Input
• Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)
• Low Open-Loop Output Impedance: 30
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
Offset Null
Single, Top View
(w 1.0 MHz
Output 1
1
• Low THD Distortion: 0.01%
7
• Excellent Phase/Gain Margins: 55'/7.6 dB for Fully Compensated Devices
Output 2
Inputs 1 { :
Dual. Top View
Output 1
" Output 4
1
Outputs 1 { :
DWSUFFIX
PLASTIC PACKAGE
CASE 751G-01
SO-16L
Inputs 2 { ,
Output 2
••
,
7
10
Output 3
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
~
,!"'
,:1iirYtn u
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
PIN ASSIGNMENTS
ORDERING INFORMATION
DpAmp
Function
Fully
Compensated
AVCL"'2
Decompensated
Single
MC35081 U,AU
MC34081 D,AD
MC34081P,AP
MC35080U,AU
MC34080D,AD
MC34080P,AP
Dual
MC34082P,AP
MC34083P,AP
Quad
MC35084L,AL
MC34084DW
MC34084P,AP
MC35085L,AL
MC34085DW
MC34085P,AP
Temperature
Range
Package
-55to +125'C
o to + 70'C
o to +70'C
Ceramic DIP
SO-8
Plastic DIP
o to
Plastic DIP
+ 70'C
-55 to + 125'C
o to + 70'C
o to + 70'C
Ceramic DIP
SO-16L
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
2-283
MC34080, MC35080 Series
MAXIMUM RATINGS
Rating
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range
Symbol
Value
Unit
Vs
+44
Volts
Volts
VIDR
Note 1
Input Voltage Range
VIR
Note 1
Volts
Output Short-Circuit Duration (Note 2)
ts
Indefinite
Seconds
Operating Ambient Temperature Range
MC35XXX
MC34XXX
TA
Operating Junction Temperature
Ceramic Package
Plastic Package
TJ
°c
-55 to + 125
o to +70
°c
+165
+125
Storage Temperature Range
°C
Tstg
Ceramic Package
Plastic Package
-65 to +165
-55to +125
NOTES:
1. Either or both input voltages must not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded.
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
----~~------------~~-------~~----~--------~VCC
200 p.A
Inputs{:
0----+-----+----'
R7
+-_~-~-4_+-+--4-~--~~--4---~~~66-k+-+-_oVEE
Null Adjust
(MC34080.001)
MOTOROLA LINEAR/INTERFACE DEVICES
2-284
MC34080, MC35080 Series
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V. VEE = -15 V. TA = Tlow to Thigh [Note 31. unless otherwise noted)
A Suffix
Symbol
Characteristic
Input Offset Voltage (Note 4)
Single
TA = +25°C
TA = O°C to + 70°C (MC34080. MC34081)
TA = -55°C to + 125°C (MC35080. MC35081)
Dual
TA = +25°C
TA = O°C to + 70°C (MC34082. MC34083i
TA = - 55°C to + 125°C (MC35082. MC35083)
Quad
TA = +25°C
TA = O°C to + 70°C (MC34084, MC34085)
TA = - 55°C to + 125°C (MC35084, MC35085)
Average Temperature Coefficient of Offset Voltage
aVIO/aT
Input Offset Current (VCM = 0 Note 5)
TA = +25°C
TA = O°C to +70°C
TA = -55°C to +125°C
110
:t
= 2.0 k, TA = +25°C
= 10 k, TA = +25°C
= 10 k, TA = Tlow to Thigh
VOL
Output Short-Circuit Current (TA = + 25°C)
Input Overdrive = 1.0 V, Output to Ground
Source
Sink
ISC
Power Supply Rejection Ratio (RS
-
0.6
100
n,
-
1.0
-
6.0
-
6.0
8.0
9.0
-
-
-
-
12
14
15
-
10
-
10
-
p'vrc
-
0.06
0.06
-
0.2
4.0
50
nA
-
-
0.02
0.1
2.0
25
nA
-
3.0
= + 25°C)
= 25°C)
-
-
0.2
4.0
50
-
-
0.1
2.0
25
-
80
-
80
-
25
15
-
13.2
13.4
13.4
13.7
13.9
-
-
0.02
-
-
-
1.0
3.0
4.0
3.0
5.0
6.0
V/mV
-
-
V
-
13.7
13.9
-
-14.1 -13.5
-14.7 -14.1
- -14.0
-
-
-14.1
-14.7
-
-
20
20
31
28
-13.5
-14.1
-14.0
mA
20
20
TA
31
28
-
-
(VEE + 4.0) to
(VCC - 2.0)
-
(VEE + 4.0) to
(VCC - 2.0)
V
dB
CMRR
75
90
-
70
90
-
PSRR
75
86
-
70
86
-
Power Supply Current
Single
TA = +25°C
TA = Tlow to Thigh
Dual
TA = +25°C
TA = Tlow to Thigh
Quad
TA = +25°C
TA = Tlow to Thigh
Thigh =
-
2.5
-
3.4
4.2
-
2.5
-
-
4.9
4.9
-
6.0
7.5
-
-
-
-
-
9.7
11
13
-
9.7
-
+ 125'C for MC35080,A
Thigh
MC35081.A
MC35082.A
MC35083.A
MC35084.A
MC35085.A
4. See application information for typical changes in input offset voltage due to solderability and temperature cycling.
5. Limits at TA = + 25cC are guaranteed by high temperature (Thigh) testing.
MOTOROLA LINEAR/INTERFACE DEVICES
2-285
dB
rnA
10
Tlow = O'C for MC34080,A
MC34081,A
MC34082,A
MC34083,A
MC340B4,A
MC34085,A
Unit
1.0
3.0
4.0
-
VICR
=
Max
0.5
13.2
13.4
13.4
Common Mode Rejection Ratio (RS '" 10 k, TA
Typ
-
50
25
Input Common Mode Voltage Range
TA = +25°C
Min
0.5
2.5
3.5
AVOL
VOH
NOTES: (CONTINUEDI
3. Tlow = -55'C for MC35080.A
MC35081,A
MC35082,A
MC35083.A
MC35084.A
MC35085.A
0.3
= 2.0 k)
Output Voltage Swing
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25°C
RL = 10 k, TA = Tlow to Thigh
RL
RL
RL
-
-
10 V, RL
Non-Suffix
Max
mV
-
liB
=
Typ
VIO
Input Bias Current (VCM = 0 Note 5)
TA = +25°C
TA = O°C to + 70°C
TA = -55°C to + 125°C
Large Signal Voltage Gain (VO
TA = +25°C
TA = Tlow to Thigh
Min
=
3.4
4.2
6.0
7.5
11
13
+ 70'C for MC34080,A
MC34081,A
MC34082.A
MC34083,A
MC34084,A
MC34085.A
II
MC34080, MC35080 Series
AC ELECTRICAL CHARACTERISTICS (VCC
II
=
=-
+ 15 V, VEE
15 V, TA
=
+ 25°C unless otherwise noted)
A Suffix
Symbol
Characteristic
Slew Rate (Vin = ··10 V to + 10 V, RL
Compensated
AV = +1.0
AV = -1.0
Decompensated AV ~ +2.0
AV = -1.0
= 2.0 k, CL =
100 pF)
= 200
=
ts
20 Vp p' THD
= 5.0%)
Typ
Max
Unit
V/J1.S
-
-
-
-
0.72
1.6
6.0
12
-
-
25
30
50
50
-
-
0.72
1.6·
-
8.0
16
-
6.0
12
8.0
16
-
-
400
800
-
-
400
800
-
-
55
39
-
-
-
55
39
-
7.6
4.5
-
-
-
7.6
4.5
30
-
-
30
-
-
-
0.01
-
5.0
-
10 12
-
n
0.05
-
%
20
40
MS
MHz
-
BWp
q,m
Gain Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
Am
Equivalent Input Noise Voltage
RS = 100 ll, f = 1.0 kHz
en
kHz
Degrees
-
=
Min
GBW
Phase Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
Equivalent Input Noise Current (f
Non-Suffix
Max
25
30
50
50
20
40
kHz)
Power Bandwidth (RL = 2.0 k, Vo
Compensated AV = + 1.0
Decompensated AV = -1.0
Typ
SR
Settling Time (10 V Step, AV = -1.0)
To 0.10% (" '/, LSB of 9-Bits)
To 0.01% (" 'h LSB of 12-Bits)
Gain Bandwidth Product (f
Compensated
Decompensated
Min
1.0 kHz)
--
In
Input Capacitance
Ci
Input Resistance
'i
THD
Total Harmonic Distortion
AV = +10, RL = 2.0 k, 2.0 '" Vo '" 20 Vo-o, f = 10 kHz
Channel Separation If = 10 kHz)
-
Open-Loop Output Impedance (f = 1.0 MHz)
Zo
-
0.01
-
10 12
-
-
0.05
-
-
5.0
dB
nVI
v'Hz
-
pAl
v'Hz
pF
120
-
-
120
-
dB
35
-
-
35
-
n
TYPICAL PERFORMANCE CURVES
FIGURE 1 -
J
-
~
IZ
~ +3.0
'"
u
::>
~+2.0
U)
~ 100
I-
~
a
::;;
~
~ +1.0
~
u
a;
u
">
lEE
0
-55
./
~ 1.0K
g
~
~
10K
-25
t
o +25 +50
+75
TA, AMBIENT TEMPERATURE 1°C}
+100
+125
10
1.0
-55
--- --25
V
0
25
50
75
TA, AMBIENT TEMPERATURE 1°C}
MOTOROLA LINEAR/INTERFACE DEVICES
2-286
V
V
/
100
125
MC34080, MC35080 Series
FIGURE 3 - INPUT BIAS CURRENT versus
INPUT COMMON-MODE VOLTAGE
FIGURE 4 -
OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE
140
50
r--
110
!
!z
~
VCCNEE = ± 15 V
TA = 15°C
100
/
/
RL Connected to Ground
t-TA = 15°C
/
/
~
~
RL
= 1.0 k
d.
~ 60
~
V
~V
RL-l0~
:::>
'-' BO
&.
A
/"
./
40
-'
./
10
-11
-u
FIGURE 5 -
VCC
5!
"'-
~
FIGURE 6 - OUTPUT SATURATION versus
LOAD RESISTANCE TO GROUND
0
.J
~
VCC
o
~ -2. 0
Source
-2.0 I-- VCCNEE = ± 5.0 V to ± 22 V
TA = 25°C
o
/'
.....J
I
I
lilWJ
II11111
VCCNEE
=
I1 = 25°C
~ -4. 0
l"--.
~
V
~
---r----...
~
±25
±5.0
±10
±15
±10
VCCNEE' SUPPLY VOLTAGE (VOLTSI
OUTPUT SATURATION versus
LOAD CURRENT
~
;;; -1.0
o
o
11
-U
0
U
U
VIC, INPUT COMMON·MODE VOLTAGE (VOLTSI
± 15 V
J
1111111
~ -3.0
~":~ 13J 1::':1111111111110
-
Sink
o
B.O
4.0
11
16
300
3.0K
30K
RL, LOAD RESISTANCE TO GROUND (01
IL' LOAD CURRENT (± mAl
FIGURE 7 - OUTPUT SATURATION versus
LOAD RESISTANCE TO VCC
FIGURE 8 -
~
~
'~
"""
5
o
I 111111
1'..
o
300
VrE
rt
V
-I]
r--: t-Sink-
Source
t-:=; t::::::..----....
r--=::- r--
~
B5
VCCNEE = ± 15 V
RL "" 0.10
.1Vin = 1.0 V
'""" 10
~
:::>
o
~
1-1-
3.0K
30K
RL, LOAD RESISTANCE TO VCC (HI
/
o
VCCNEE = ± 15 V
RL to VCC
T = 25°C
IAIIIIII
I I
1'-..
+1.0
OUTPUT SHORT CIRCUIT CURRENT
versus TEMPERATURE
40
LllllfllllllHII
i? + 2.0
300K
o
-55
300K
-15
o
15
50
75
TA, AMBIENT TEMPERATURE (OCI
MOTOROLA LINEAR/INTERFACE DEVICES
2-287
100
---
115
MC34080, MC35080 Series
II
FIGURE 10 -
OUTPUT IMPEDANCE versus FREQUENCY
FIGURE 9 -
80
80
VCCNEE = ± 15 V
VCM = 0
Va = 0
410 = ±0.5 mA
TA = 25"C
Compensated
Units ani
w
'"
z
;3
~
;,;;
40
u
z
;3
~
...-,:::::~
if
V
:::>
020
S
1.0K
10K
lJ.Wl.-1
lOOK
t, FREQUENCY (Hz)
~
N
1.0M
OUTPUT VOLTAGE SWING
versus FREQUENCY
==-
~
'" 20 } - z
~
16 1-
~
12
w
,
~
.
Compensated
Units AV = + 1.0
I
H
H-
~ 8.0 f---
I!:
:::>
I--
~ 4.0
f-----
o
10K
Jlll.--r'
lOOK
t, FREQUENCY (Hz)
V
V = 10 i.{v = 2.0
w.w
IIIII1
10M
1.OK
10K
1.0M
FIGURE 12 -
OUTPUT DISTORTION versus FREQUENCY
f4 f---+lH-+-++H-IH-I-+-I-++H-ll--+++f+IJ~~N~EI 11 WI
=
~ 0.3
1\ o~co~pe}ns~t~~ II
"Units AV = -1.0
is
~ 0.2
~
""I".
--
-- -
lOOK
ci
;E 0.1
*Compensated
AV - 100 tAV
100
FIGURE 13 -
OPEN-LOOP VOLTAGE GAIN
versus TEMPERATURE
1.08
"'-
~
~61,04
~~
""" "-
15 ~ 1.00
~~
~
-----
~'"
~ :E 0.96
-'"
~
VCcNEE = ± 15 V
Va = -10Vto +10V
RL = 10k
t«10Hz
""
0.92
-55
-25
=
10
1.0K
t, FREQUENCY (Hz)
t, FREQUENCY (Hz)
z
Units Only
II (II
H+H-t+tfll--H-+f+++H+-+H--++++flH+-H-H-+Hl
0 '::-0..u...l..J.J.IUJJ,I~.I.,..;L,;,A;:.v_=_l;;;.O;..·u..J..J..I.I.I~J..J.""'.I.U.wI
1
10M
1M
Va = 2.0 Vp_p
RL = 2.0k
TA = 25"C
!n
I'\.
--
--
H
= 100
J
I I "~IJI
VCCNEE
±1
RL=2.0k
THO = 1.0%
TA = 25"C
1\
c. 24 1--- t- -
AV
111lJL.... V
o
10M
V
~AV = 1000
10
=
~
V
o
010
1.0
FIGURE 11 28
40
>-
.J1
lWf..-11
AV
V = 100
JJ.mJt--:
o
~v=
/~
AV = 1000
./
VCCNEE = ± 15 V
VCM = 0
Va = 0
410 = ±0.5 mA
TA = 25"C
Decompensated
Units Qnly
gw 60
>-
'"
OUTPUT IMPEDANCE versus FREQUENCY
---
0
+25
+50
+75
TA, AMBIENT TEMPERATURE ("C)
+100
+125
MOTOROLA LINEAR/INTERFACE DEVICES
2-288
10K
lOOK
MC34080, MC35080 Series
FIGURE 15 - OPEN·LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
FIGURE 14 - OPEN·LOOP VOLTAGE GAIN AND
PHASE versus FREQUENCY
100
~
80
«
~
~
Phase
z
'"
«
'"':J
60
0
>
I
"-
-... ~
'" ",
,,
~,
~""~
~
-
''\:
~,
20
o
Solid line Curves - Compensated Units
r- Dashed Une Curves - Decompensated Units
10
1.0
100
lOr----F~'~'~~~,t-~-t++---t--t--t~
-
45~;3
_
w
"
1.0K
10K
lOOK
t, FREQUENCY 1Hz)
9
~
90
"'\.
\
135 ~
~
t~
.~
~"
""
100M
180
.',\
10M
;;: -10
~
~
lW~",
~'
~
Gain
f----+--+-.,r-I-"IPII.."t+--rl
-j'"
VCCNEE = ±15V
't--.
Margin
140
Va = ov
_'-- Phasl
'
~ = 7.6dB-j- w
TA = 25°C
I
Margin
'
~ 1 160~
......
= 54°
,
'"
I - Gain, RL = 2.0 k -+--1-t..:,tt+.It-H"""-'....+--t:~---I
1fl
1- Gain, RL = 1.0 k, CL = 100 pF I
180~
~
~
3 - Phase, RL = 2.0 k
~+t+'--'r---'lt----jr--+""'t
4 - Phase, RL = 1.0 k, CL = 100 pF+I+-:-\--f.--t--H 100
Compensated Units Only
1
0
§
-10
0
~ ~ _ 30
~
_ 40
9
.1.1.
1.0
100M
1.0
3.0
5.0
7.0
50
10
t, FREQUENCY IMHzl
FIGURE 16 - OPEN·LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
FIGURE 17 - NORMALIZED GAIN BANDWIDTH
PRODUCT versus TEMPERATURE
g,.20
~
I 00
10
«z
'"
f----t-'-'..:c'j>:-:--·~,'_.f""t___±:_+t+t_--+-+-H
"
Gain Margin_ e-- I
20~
'"~
o
= 5.5 dB
"
W
""'"
["'-..
'"
I 40~
......
Phase',l<-t-l',,---+--4..-"k1
1,\ I '""'i.
Va = OV
-f-t-Margin-,\"1f-",.--+-+-'d--1
60~
TA = 25°C
= 430
\
~ -20 1- Gain, RL = 2.0 k -+-+-r,-F:
,t+-rr-,-\,--+--+-+>-d ~
o
2 - Gain RL = 2.0 k, CL = 100 pF +I+T\4,-t--t-+--I I 80 w-s•
3-PhaseRL = 2.0k
4 - Phase RL = 2.0 k, CL = 100 pF+t+"",,:'\-""";t-"""""1t-+--I 200
_ 40 Decompensated Units Only
1.0
2.0
5.0 7.0 10
3.0
20
30
50
t, FREQUENCY IMHz)
~
-10 VCcNEE = ± 15 V -e--
§
i-30
,
ot
~
~
~1.10
t;
:::>
o
~
~
z
;i\ 0.90
z
«
-55
'"
'"0~
>-
z
~
40
V
I-- >--
o
10
V~
;- 50
'"9 40 f-
~mpensated
~
100
115
z
~
20
i
lO
Decompensated "
Units AV = + 2.0
o
10
1.0K
I"
~
100
CL, LOAD CAPACITANCE IpFI
MOTOROLA LINEAR/INTERFACE DEVICES
2-289
"'
"
IIIII
~ f"-,
:2'
VCCNEE= ±15vi I
RL = 2.Qk
avO = 100 mV p. p
Va = -10 Vto + 10 V
TA = 25°C
J
= I± 115 I I
RL = 2.0ktooo
avO = 100 mV p. p
Va = -10Vto +10V
TA = 25°C
lI-
~
30
«
Units AV = + 1.0
100
CL, LOAD CAPACITANCE IpFI
n
V~CNE~
60 r--cotensLI I
~nitsAv = +1.0
V
./
V
it' 20
0
&
~
TA, AMBIENTTEMPERATURE lOCI
FIGURE 19 - PHASE MARGIN versus
LOAD CAPACITANCE
V
j..-
V
-&
-
""I""
70
0
0
60
:z:
"" ""
'"
'"
± 1'5 V
RL=1.0k
~. 0.80
Units AV = + 1.0 V
>-
~
~ 1.00
D~c~m~e~;a:ed
80
VCCN~E =
o
FIGURE 18 - PERCENT OVERSHOOT versus
LOAD CAPACITANCE
100
II
r---.'~~~,
........... ,--',"",+-+--+-+-++++---+---1-+--1100
!
'" ;
~,
$z
~
_
Gain
is 40
it'
0
20
I
VCCNEE = ± 15 V
Va = ov
RL=2.0k
TA = 25°C
'\.
1.0K
MC34080, MC35080 Series
FIGURE 20 -
II -
GAIN MARGIN versus LOAD CAPACITANCE
10
-
8.0
u
---
~
'"'"z 4.0
.........
r-....
~
«
'-.
'"
cc
100K
~
1.0M
10M
~ 20
~
~
'\.
I"-.
\.
""-
VEE::t.lVEE
100
10
1.0
1.0K
10K
100K
'\.
'\.
'\.
1.0M
10M
FIGURE 31 - NORMALIZED SUPPLY CURRENT
versus SUPPLY VOLTAGE
Negative.l.
I
Supply _ VCCNEE = ± 15 V
AVS = 3.0V
Va = OV
f,. 10 Hz
;z
Ifl:r -
t - r-- I--90
Vee:: .1VCC
:::---
-I--Supply
cc
:
~
Negativ~
-Supply
1.20
'"~ 100
:::;
!t
ii:
Positive
Supply f - -
t, FREQUENCY 1Hz}
FIGURE 30 - POWER SUPPLY REJECTION RATIO
versus TEMPERATURE
;;J
cc
VCcNEE = ± 15 V
AVS = 3.0 V
Va = OV
TA = 25°C
""- r--.
~Vcc
Ifl:r'--=- -=-
~ 0
~ 0,1
110
'"§
-.......
"'-
~ 60
---Compeosated U,," AV " + - :
------DecompensatedUnltsAv - + 20
10
'";;;;
'"f,
r\\
EE
~'00
~60
~
1f:~-
40
Z
,,
Vcc-j,Vcc
w
120
I
VCCNEE = ± 15 V
AVS = 3.0V
Va = OV
~
I
60
I
55'C
...... ,TA
= 25'C
1rC
80 TA
'"
o
::;;;
TA
FIGURE 29 - POWER SUPPLY REJECTION RATIO
versus FREQUENCY
80
~~
---co~pensated Units AV "" + 1.0 , _
gf
v ..- ~v
~ 70 ~ ~ ,,- "
-55
1
VWI
------DecompensaledUnitsAv
I
25
-25
I
50
I
75
=
-
c;
L-TA
125°C
~ 1.10
~
'";;0 1.00
TA
I-
~
i3
cc
0.90
-
~ 0.80
-
~
:::>
Supply Current
Normalized to
VCCNEE = ± 15 V, TA
RL = 00
Va = 0
+ 2.0
I
100
0.70
125
o
FIGURE 33 -
FIGURE 32 - CHANNEL SEPARATION versus FREQUENCY
= 25'C
TA
I
±10
±15
±20
VS, SUPPLY VOLTAGE IVOLTS}
±5.0
TA, AMBIENT TEMPERATURE I'C}
120
= 25°C
55'C
±25
SPECTRAL NOISE DENSITY
100
-.......
100
11111 II IIIIII
VCCNEE = ± 15'y'
VCM = 0
TA = 25'C
~ 80
~ 80
.........
;z
W
~
'"~ 60
ai
§?
:i!
I-
~
'"~40
60
'\
40
......
5
;z
VCcNEE = ±15V
~ 20
C20 TA = 25'C
o
10K
;;0
I I II II
lOOK
o
1.0M
f, FREQUENCY 1Hz}
10
10M
100
MOTOROLA LINEAR/INTERFACE DEVICES
2-292
1.0K
f, FREQUENCY 1Hz}
10K
lOOK
MC34080, MC35080 Series
ative rail (VEE). The amplifier remains active ifthe inputs
are biased at the positive rail. This may be useful for
some applications in that single supply operation is possible with a single negative supply. However, a degradation of offset voltage and voltage gain may result.
Phase reversal does not occur if either the inverting
or noninverting input (or both) exceeds the positive
common mode limit. If either input (or both) exceeds
the negative common mode limit, the output will be in
the high state. The input stage also allows a differential
up to ± 44 volts, provided the maximum input voltage
range is not exceeded. The supply voltage operating
range is from ± 5.0 V to ± 22 V.
For optimum frequency performance and stability
careful component placement and printed circuit board
layout should be exercised. For example, long unshielded input or output leads may result in unwanted
input-output coupling. In order to reduce the input capacitance, resistors connected to the input pins should
be physically close to these pins. This not only minimizes the input pole for optimum frequency response,
but also minimizes extraneous "pick.up" at this node.
Supply decoupling with adequate capacitance close
to the supply pin is also important, particularly over
temperature, since many types of decoupling capacitors
exhibit large impedance changes over temperature.
Primarily due to the JFET inputs of the op amp, the
input offset voltage may change due to temperature
cycling and board soldering. After 20 temperature
cycles (- 55"C to 165"C), the typical standard deviation
for input offset voltage is 559 /LV and 473 /LV in the
plastic and ceramic packages respectively. With respect
to board soldering (260"C, 10 seconds) the typical standard deviation for input offset voltage is 525 /LV and
227 /LV in the plastic and ceramic package respectively.
Socketed plastic or ceramic packaged devices should
be used over a minimal temperature range for optimum
input offset voltage performance.
APPLICATIONS INFORMATION
The bandwidth and slew rate of the MC340S0 series
is nearly double that of currently available general purpose JFET op-amps. This improvement in ac performance is due to the P-channel JFET differential input
stage driving a compensated miller integration amplifier in conjunction with an all NPN output stage.
The all NPN output stage offers unique advantages
over the more conventional NPN/PNP transistor Class
AB output stage. With a 10 k load resistance, the op-amp
can typically swing within 1.0 V of the positive rail (Vccl,
and within 0.3 volts of the negative rail (VEE), providing
a 2S.7 Vp-p swing from ±15 volt supplies. This large
output swing becomes most noticeable at lower supply
voltages. If the load resistance is referenced to VCC
instead of ground, the maximum possible output swing
can be achieved for a given supply voltage. For light
load currents, the load resistance will pull the output to
VCC during the positive swing and the NPN output transistor will pull the output very near VEE during the negative swing. The load resistance value should be much
less than that of the feedback resistance to maximize
pull-up capability.
The all NPN transistor output stage is also inherently
fast, contributing to the operational amplifier's high
gain-bandwidth product and fast settling time. The associated high frequency output impedance is 50 ohms
(typical) at S.O MHz. This allows driving capacitive loads
from 0 to 300 pF without oscillations over the military
temperature range, and over the full range of output
swing. The 55" phase margin and 7.6 dB gain margin
as well as the general gain and phase characteristics
are virtually independent of the sink/source output
swing conditions. The high frequency characteristics of
the MC340S0 series is especially useful for active filter
applications.
The common mode input range is from 2.0 volts below the positive rail (VCC) to 4.0 volts above the neg-
FIGURE 34 -
OFFSET NULLING CIRCUIT
Vee
MOTOROLA LINEAR/INTERFACE DEVICES
2-293
II
II
®
MC34181,2,4
MC35181,2,4
MC33181,2,4
MOTOROLA
LOW POWER. HIGH SLEW RATE. WIDE BANDWIDTH.
JFET INPUT OPERATIONAL AMPLIFIERS
Quality bipolar fabrication with innovative design concepts are
employed for the MC33181/2/4, MC34181/2/4, MC3518112/4 series
of monolithic operational amplifiers. This JFET input series of
operational amplifiers operate at 210 p.A per amplifier and offer
4.0 MHz of gain bandwidth product and 10 V/p.s slew rate. Precision matching and an innovative trim technique of the single
and dual versions provide low input offset voltages. With a JFET
input stage, this series exhibits high input resistance, low input
offset voltage and high gain. The all NPN output stage, characterized by no dead band crossover distortion and large output
voltage swing, provides high capacitance drive capability, excellent phase and gain margins, low open-loop high frequency output impedance and symmetrical source/sink ac frequency
response.
The MC33181/2/4, MC34181/2/4, MC35181/2/4 series of devices
are specified over the commercial, industrial/vehicular or military
temperature r<;lnges. The complete series of single, dual and quad
operational amplifiers are available in the plastic and ceramic DIP
as well as the SOIC surface mount packages.
LOW POWER
JFET INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
• Low Supply Current: 210 p.A (Per Amplifier)
• Wide Supply Operating Range: ± 1.5 V to ± 18 V
• Wide Bandwidth: 4.0 MHz
• High Slew Rate: 10 V/p.s
Output 1
• Low Input Offset Voltage: 2.0 mV
• Large Output Voltage Swing: -14 V to + 14 V (with ± 15 V
Supplies)
Inputs 1
1
I:
VEE'
• Large Capacitance Drive Capability: 0 to 500 pF
(Dual, Top View)
• Low Total Harmonic Distortion: 0.04%
• Excellent Phase Margin: 67°
• Excellent Gain Margin: 6.7 dB
• Output Short Circuit Protection
L SUFFIX
ORDERING INFORMATION
OpAmp
Function
Device
P SUFFIX
Test Temperature
Range
o to
o to
Package
MC34181P
MC34181D
MC33181P
MC33181D
MC35181U
+70'C
+70°C
-40 to +85'C
-40 to +85'C
-55 to + 125°C
Plastic DIP
SO-8
Plastic DIP
SO-8
Ceramic DIP
Dual
MC34182P
MC34182D
MC33182P
MC33182D
MC35182U
o to
o to
-40 to
-40 to
-55to
+70'C
+ 70'C
+85'C
+85'C
+125°C
Plastic DIP
SO-8
Plastic DIP
SO-8
Ceramic DIP
Quad
MC34184P
MC34184D
MC33184P
MC33184D
MC35184L
o to
o to
+70'C
+70'C
-40 to +85'C
-40 to +85°C
-55 to +125'C
Plastic DIP
SO-14
Plastic DIP
SO-14
Ceramic DIP
Single
PLASTIC PACKAGE
CASE 646-06
MOTOROLA LINEAR/INTERFACE DEVICES
2-294
CERAMIC PACKAGE
CASE 632-08
D SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
MC34181,2,4, MC35181,2,4, MC33181,2,4
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vs
+36
Volts
Volts
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range
VIDR
Note 1
Input Voltage Range
VIR
Note 1
Volts
Output Short-Circuit Duration (Note 2)
ts
Indefinite
Seconds
Operating Junction Temperature
TJ
"C
Ceramic Package
Plastic Package
+160
+150
Storage Temperature Range
Ceramic Package
Plastic Package
"C
Tstg
-65 to + 160
-60 to + 150
NOTES:
1. Either or both input voltages must not exceed the magnitude of Vee or VEE2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 1).
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
C1
+
RS
02
t----------1~_
R7
04
03
Vout
C2
5
~
Null Offsets
MC3X181 (Single) Only
MC3X181 Input Offset
Voltage Null Circuit
MOTOROLA LINEAR/INTERFACE DEVICES
2-295
II
MC34181,2,4, MC35181,2,4, MC33181,2,4
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V VEE = -15 V TA = 25'C unless otherwise noted)
Symbol
Characteristic
Input Offset Voltage (RS = 50 n. Vo = 0 V)
Single
TA = +25'C
TA = O'Cto +70'C(MC34181)
TA = -40'C to +85'C (MC33181)
TA = -55'C to + 125'C (MC35181)
Dual
TA = +25'C
TA = O'C to + 70'C (MC34182)
TA = -40'C to +85'C (MC33182)
TA = -55'C to + 125'C (MC35182)
Quad
TA = +25'C
TA = O'Cto +70'C(MC34184)
TA = -40'Cto + 85'C (MC33184)
TA = -55'C to + 125'C (MC35184)
Min
Typ
Max
-
0.5
-
-
2.0
3.0
3.5
4.5
-
1.0
3.0
4.0
4.5
5.5
-
4.0
-
0.001
0.05
1.0
2.0
13
-
0.003
0.1
2.0
4.0
25
-
Average Temperature Coefficient of VIO (RS = 50 n. Vo = 0 V)
6,VIO/6,T
Input Offset Current (VCM = 0 V. Vo = 0 V)
TA = +25'C
TA = O'Cto +70'C
TA = -40'C to +85'C
TA = -55'Cto + 125'C
110
Input Bias Current (VCM = 0 V. Vo = 0 V)
TA = +25'C
TA = O'Cto +70'C
TA = -40'C to +85'C
TA = -55'Cto + 125'C
liB
Large Signal Voltage Gain (RL = 10 kn. Vo = ±10V)
TA = +25'C
TA = Tlow to Thich
Output Voltage Swing (VID = 1.0 V. RL = 10 kn)
TA = +25'C
AVOL
Common Mode Rejection (RS = 50 n. VCM = VICR. Vo = 0 V)
CMR
Power Supply Rejf1ction (RS = 50 n. VCM = 0 V. Vo = 0 V)
PSR
Output Short Circuit Current (VID = 1.0 V. Output to Ground)
Source
Sink
ISC
Power Supply Current (No Load. Vo = 0 V)
Single
TA = +25'C
TA = Tlow to Thigh
Dual
TA = +25'C
TA = Tlow to Thigh
Quad
TA = +25'C
TA = Tlow to Thich
10
10
10
11
11.5
12.5
-
p'vrc
-
-
V
VlmV
-
-13.5
70
86
-
70
84
-
-
V
dB
dB
rnA
-
3.0
8.0
8.0
11
-
210
250
250
-
420
500
500
840
1000
1000
p.A
-
MOTOROLA LINEAR/INTERFACE DEVICES
60
+14
-14
+13.5
-
2-296
-
(VEE + 4.0 V) to (VCC - 2.0 V)
25
15
VO+
VO-
-
nA
VICR
-
-
nA
-
Input Common Mode Voltage Range
Unit
mV
VIO
-
MC34181,2,4, MC35181,2,4, MC33181,2,4
AC ELECTRICAL CHARACTERISTICS (Vee = +15'V VEE = -15 V TA = +25°e unless otherwise noted)
Characteristic
Symbol
Slew Rate (Vin = -10 V to +10 V, RL = 10 kll, CL = 100 pF)
AV = +1.0
AV = -1.0
SR
Settling Time (AV = -1.0, RL = 10 kll, Vo = 0 V to + 10 V Step)
To Within 0.10%
To Within 0.01%
ts
Min
Typ
Max
Unit
V/!"s
7.0
-
-
10
10
!"s
-
-
1.1
1.5
Gain Bandwidth Product (f = 100 kHz)
GBW
3.0
4.0
Power Bandwidth (AV = +1.0, RL = 10'kll, Vo = 20 Vp_p, THD = 5%)
BWp
-
200
Phase Margin (-10 V < Vo < +10 V)
RL = 10 kll
RL = 10 kll, CL = 100 pF
121m
Gain Margin (-10 V < Vo < +10 V)
RL = 10 kll
RL = 10 kll, CL = 100 pF
Am
Equivalent Input Noise Voltage
RS = 100 ll, f = 1.0 kHz
MHz
kHz
Degrees
-
67
34
-
6.7
3.4
en
-
38
-
nV/YHz
Equivalent Input Noise Current
1= 1.0 kHz
in
-
0.01
-
pAlYHz
Differential Input Capacitance
ei
-
3.0
Ri
-
10 12
-
pF
Differential Input Resistance
-
dB
dB
THD
Total Harmonic Distortion
0.04
II
%
AV = 10, RL = 10 kll, 2 Vp_p < Vo < 20 Vp_p, I = 10 kHz
Channel Separation (RL = 10 kll, -10 V < Vo < + 10 V, 0 Hz < I < 10 kHz)
-
-
120
Open-Loop Output Impedance
(I = 1.0 MHz)
Ilol
-
200
FIGURE 1 - MAXIMUM POWER DISSIPATION versus
TEMPERATURE FOR PACKAGE VARIATIONS
2400
~
.s
;z
200o~
o
~
v; 1600
V
~
U)
~ 1200::
~
~ 800
::;;
~
.P
40 0
FIGURE 2 -INPUT COMMON-MODE VOLTAGE RANGE
versus TEMPERATURE
0
~ PI~ CER1MIC P~G.
VCC = +3.0Vto +15V
.11
I
O_VEE = -3.0Vto -15V_ f- VCC IVCM to VCCI
t.VIO = 5.0 mV
8 14
k 8 & 14 PIN PLASTIC PKG.
15
'~ ~
r-- I"--r- >-
,0"4~KG/
;/
SO·8 PKG.
0
-55-40 -20
o
•
I
:::::.... ~ ~
-.....;;
W
I
~~
r- ::::::
~
~
:::::;;;
100
~~
lW
,.
II
1~
TA, AMBIENT TEMPERATURE (OCI
MOTOROLA LINEAR/INTERFACE DEVICES
2-297
II
II
II
MC34181,2,4, MC35181,2,4, MC33181,2,4
FIGURE 3 - INPUT BIAS CURRENT
versus TEMPERATURE
1000
FIGURE 4 -
20
I
r--- VC~
Vec = +15V
10a-vEE = -15V
VCM = OV
10
1
!z
l!§
a
!Q
= + IL
VEE = -15V
I-- TA = 25'C
/'
1. a
Q5
':>
o. I
~
0.0 I
I..--- V
0.00 I
-55
-25
~
/
/'
o
125
100
-10
-5.0
0
5.0
VICR, INPUT COMMON-MODE VOLTAGE IVOLTSI
FIGURE 6 -
40
~ -1. 0
.,/"
14
16
o
VCC/
-1.0
'"0~
-2.0
15
-3.0
"
>
~
+3,0
fIJIIIJIIIII~
F
~ +2.0~
$
I IIIII
VCc= +15V
VEE = -15 V
TA = +25'C
+1.:
1.OK
10K
lOOK
RL, LOAD RESISTANCE TO GROUND Inl
I.OM
1.0
2.0
FIGURE 8 -
FIGURE 7 - OUTPUT SATURATION VOLTAGE versus
LOAD RESISTANCE TO GROUND
"'w
"h-
~:~am 1,.fTITJ
lOy V
4.0
6.0
8.0
10
12
VCC, IVEEI, SUPPLY VOLTAGE IVOLTSI
2.0
I
o
,./
,
I'
Source
z
//
0
1
\v6c
Vcc = +15V
~ -2. O-VEE = -15V
~
g -3, o_TA = +25'C
,./
10
OUTPUT SATURATION VOLTAGE versus
LOAD CURRENT
J 1
~
RL Jonnectedlto GrOunld
I - TA = 25'C
a
/
,,/
25
50
75
TA, AMBIENT TEMPERATURE I'CI
RL =
/
L
FIGURE 5 - OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE
+2.0
1=
::l
0+1.0
~
,,~
t--..
VEE
0
I.OK
III1111
10K
lOOK
RL, LOAD RESISTANCE 1m
MOTOROLA LINEAR/INTERFACE DEVICES
2-298
VCC = +15V
VEE = -15V
TA = +25'C
I.OM
MC34181,2,4, MC35181,2,4, MC33181,2,4
FIGURE 9 -
0
OUTPUT SHORT CIRCUIT CURRENT
versus TEMPERATURE
FIGURE 10 -
+15~
JCCI~ ~\~~
vcc l =
-VEE= -15V
RL",0.1!!
0 - VIO = 1.0V
0
--------
30Of-VEE ~ -15V
VCM ~ OV
"- Vo ~ OV
LloIOUT ~ 10/LA
O..-TA ~ 15°C
11111111
~I-
n
15
/
100/
AV ~ 100V
75
100
o
125
100
.,../'
1.0K
10K
f, FREQUENCY IHzl
TA, AMBIENT TEMPERATURE lOCI
FIGURE 11 - OUTPUT VOLTAGE SWING
versus FREQUENCY
FIGURE 12 -
0
1. 0
VCC = +15V
VEE = -15 V
RL ~ 10 k!!
THO ~ 1%
TA ~ 15°C
4
\
8
1
\
6
~
~ O. 6
\
10K
100K
f, FREQUENCY IHzl
0.4
~
O. 1
c,-
/"
~ 50
!::;
o
40
/
"'"
L
.L
~ 3oll
o
~
;;
10
-15
0
.........
1/
Z
-55
100
10
0
w
§
II
1.0K
f, FREQUENCY IHzl
0
"-\
VCC ~ +15V
VEE ~ -15VRL ~ 10k!! f'" 10 Hz
TA ~ 25°C
I
o
15
50
75
100
125
TA, AMBIENTTEMPERATURE lOCI
'i'
[',.
'\
~
Phase \
"
100
"\
'\
!"\
1.0K
10K
100K
f, FREQUENCY IHzl
MOTOROLA LINEAR/INTERFACE DEVICES
2-299
-
~
10
100K
'\
1\
o
1.0
10K
I
I
VCC ~ +15V_
VEE ~ -15V
Vo ~ OV
RL ~ 10kfl TA ~ 15°C
"Gain
0
1.0
1y
OPEN-LOOP VOLTAGE GAIN AND PHASE
versus FRE<:J,UENCY
100
~
~
1000
rtrl
FIGURE 14 -
0
>
V
~
~
o
FIGURE 13 - OPEN-LOOP VOLTAGE GAIN
versus TEMPERATURE
>E
"'z
~~C ~ 11 ~~I~I
FE
100M
tOM
VEE ~ -15V
Vo ~ 1.0 Vr- p
RL ~ 10 kf
TA ~ 25°C
AV
'"~
100K
OUTPUT DISTORTION versus FREQUENCY
z
o
\
1.0K
0.8
§i
\
o
1.0
/
V ....
.,../'
50
V
10
/
/
0
I--
Source
- 15
OUTPUT IMPEDANCE versus FREQUENCY
""
~
100M
\
1
II
10M
180
100M
II
II
MC34181,2,4, MC35181,2,4, MC33181,2,4
FIGURE 15 -
NORMALIZED GAIN BANDWIDTH PRODUCT
versus TEMPERATURE
FIGURE 16 - OUTPUT VOLTAGE OVERSHOOT versus
LOAD CAPACITANCE
01.3
100
~
;i
15
1.1
~
~
~ 1. 1
~
~
~
VCCI = 1+15J I I
VEE = -15V
0 Rl = 10 kfl
Il.Vin = 100 mV p. p
-10V-
:;;
0
0
10
Negative supL
100
1.0K
t, FREQUENCY (Hzl
10K
j
80
-55
100K
-25
FIGURE 25 - POWER SUPPLY REJECTION
versus FREQUENCY
140
~ 120
z
0
~
~
125
OJ
~
20Lo (t.VO!AOM)
9
.l.VEE
1. 1
~
>-
~ 1.0
:::>
u
60
~ 0.9
~ 40
-
TA
~
25°C
125°C
WC
/
VCC ~ +15V_
VEE ~ -15V
TA ~ 25°C
RL ~ x
Vo ~ OV
5l
~
13
0.8
20
0
100
100
i5
co
a'
~
25
50
75
TA < AMBIENT TEMPERATURE (OCI
1.2
~ PSR ~ 20Log (t.VO!AOM)
1--++-If-H-f+lI--+-f-+H+l4It.VCC
100 r'"==F=t:jmH1t-ok:H-f-mfll- - PSR ~
o
FIGURE 26 - NORMALIZED SUPPLY CURRENT
versus SUPPLY VOLTAGE
~ 80
5l
--
I
t.VCC, t.VEE ~ 3.0 V
f.;;10Hz
-
0
>
1M
100K
t, FREQUENCY (Hzl
II~~~ ~ 1+115V
0
~ 20Log (t;:~~ x ADM)
. . . . . . r-.
o
;;' 60
8
11
II;~~+,~;
CMR
I--
INPUT NOISE VOLTAGE versus FREQUENCY
=s
w
«
t.VCM ~ 3.0 V
~ 100 I--TA ~ 25°C
+ 10 V
o
25
50
75
TA, AMBIENT TEMPERATURE (OCI
J 1111~lv
z
o
\
+1.0
10 kO
100 pF
-10 V to
10 0
<..0
JCCI
COMMON MODE REJECTION versus
FREQUENCY
~ 120 I--VEE~ -15V-
+15V
-25
.FIGURE 23 -
~
140
7_VEE~-15V
a'
on
~
FIGURE 22 -
0.7
1M
o
5.0
10
15
VCC, IVEE!. SUPPLY VOLTAGE (VOLTSI
MOTOROLA LINEAR/INTERFACE DEVICES
2-301
20
II
MC34181,2,4, MC35181,2,4, MC33181,2,4
FIGURE 27 -
CHANNEL SEPARATION versus FREQUENCY
140
-
120
iil
:s!
z
100
Q
!;(
80
'"
0
~
FIGURE 28 - TRANSIENT RESPONSE
t-....
I'-
0 Vcc = +15V
VEE = -15V
0 TA = +25°C
0
10K
II
lOOK
1.0M
f, FREQUENCY (Hzl
FIGURE 29 -
10M
t, TIME (2.0 I's/DIVI
SMALL SIGNAL TRANSIENT RESPONSE
t, TIME (0.5I's/DIVI
MOTOROLA LINEAR/INTERFACE DEVICES
2-302
ORDERING INFORMATION
Device
Temperature Range
o to
o to
o to
o to
-55 to
-55 to
NE592D
NE592N
NE592H
NE592F
SE592H
SE592F
70'C
70'C
70'C
70'C
+ 125'C
+ 125'C
Package
NE592
SE592
SO-14
Plastic DIP
Metal Can
Ceramic DIP
IJ
Metal Can
Ceramic DIP
VIDEO AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
DIFFERENTIAL TWO STAGE VIDEO AMPLIFIER
The SE/NE592 is a monolithic, two stage, differential output,
wideband video amplifier. It offers fixed gains of 100 and 400 without external components and adjustable gains from 400 to 0 with
one external resistor. The input stage has been designed so that with
H SUFFIX
METAL PACKAGE
CASE 603-04
the addition of a few external reactive elements between the gain
select terminals, the circuit can function as a high pass, low pass, or
band pass filter. This feature makes the circuit ideal for use as a video
G1A Gain Select
or pulse amplifier in communications, magnetic memories, display
and video recorder systems. The 592 is a pin-far-pin replacement for
the MC1733.
•
90 MHz Bandwidth
•
Adjustable Gains From 0 to 400
•
Adjustable Pass Band
•
No Frequency Compensation Required
Gl B Gain Select
(Top View)
Pin 5 connected to case
.,
F SUFFIX
CERAMIC PACKAGE
CASE 632-10
CIRCUIT SCHEMATIC
Vee
14.:~
1
Input 2
0--+---\--,
...
N SUFFIX
PLASTIC PACKAGE
CASE 646-06
D SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
Output 1
Input 1
Output 2
Input 1
NC
G2B
Gain
Select
G1Bo--+---;
50
3
G2A
Gain
Select
4
Gain
G1A
G1B
50
Gain
Select
Select
G2 B
Vee
0---+----;
Output
400
(Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
2-303
II
NE592, SE592
MAXIMUM RATINGS ITA = +25 0 C unless otherwise noted I
. Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+8.0
-8.0
Volts
Differential I nput Voltages
VID
±5.0
Volts
Common-Mode I nput Voltage
VIC
±6.0
Volts
10
10
mA
-55 to +125
o to +70
°c
Output Current
Operating Ambient Temperature Range
TA
SE592
NE592
Operating Junction Temperature Range
°c
TJ
Metal and Ceramic Packages
175
150
Plastic Package
Storage Temperature Range
Metal and Ceramic Packagee
Plastic Package
T stg
°c
-65 to +150
-55 to +125
ELECTRICAL CHARACTERISTICS TA
= 25°C unless otherwise noted,
IVcc = +6.0 V, VEE = -6,0 V, VCM = 01
SE592
Characteristic
Symbol
Differential Voltage Gain - Figure 3
NE592
Min
Typ
Max
Min
Typ
300
90
400
100
500
110
250
80
400
100
-
40
90
-
-
40
90
-
tTLH
tTHL
-
10.5
4.5
-
10.5
4,5
-
10
-
tpLH
tPHL
-
7.5
6.0
-
.-
10
-
7,5
6.0
10
4.0
30
-
-
4.0
30
-
Max
IRL = 2 kn, eout = 3 Vp-pl
IGain 1, Note 11
IGain 2, Note 21
600
120
BW
Bandwidth - Figure 3
IGain 1, Note 11
IGain 1, Note 21
Units
V/V
AVd
MHz
Rise Time - Figure 3
ns
IGain 1, eout = 1 Vp-p, Note 11
IGain 2, eout = 1 Vp-p, Note 21
12
Propagation Delay - Figure 3
ns
(Gain 1, eout = 1 Vp-p, Note 11
IGain 2, eout = 1 Vp-p, Note 21
Input Resistance
kn
Rin
-
IGain 1, Note 11
IGain 2, Note 21
20
10
I nput Capacitance
IGain 2, Note 21
2.0
-
0.4
3.0
liB
-
9.0
20
Vn
-
12
-
-
-
-
±1.0
Gin
Input Offset Current IGain 3, Note 31- Fig. 2
110
Input Bias Current (Gain 3. Note 3)- Fig. 2
Input Noise Voltage (Gain 1 and Gain 2)
2.0
-
pF
0.4
5.0
Jl.A
9.0
30
~A
12
-
~Vlrmsl
-
-
IBW = 1 kHz to 10 MHzl - Figure 1
Input Voltage Range IGain 2, Note 21- Fig, 3
Common-Mode Rejection Ratio - Figure 3
Vin
IGain 2, VCM = ±1 V, f< 100 kHzl
IGain2,VCM=±1 V,f=5MHzl
Supply Voltage Rejection Ratio - Figure 2
-
-
86
60
-
50
70
-
50
70
-
-
0.35
0.75
-
0.35
0.75
2.4
2.9
3.4
2.4
2,9
3.4
3.0
4.0
3.0
4.0
-
-
20
-
-
20
-
dB
V
VOO
Output Common-Mode Voltage - Figure 2
V
VCMO
IRL =~, Gain 3, Note 31
Output Voltage Swing - Figure 3
86
60
60
PSRR
IGain 3, RL = 00, Note 31
Vp-p
Vo
IR L = 2k, Gain 2, Note 21
Output Resistance
ro
Power Supply Current - Figure 2
ID
I RL =~, Gain 2, Note 21
Gain select pins G 1A and G 18 connected together.
Note 2.
Gain select pins G2A and G28 connected together.
Note 3.
AU gain select pins open.
n
mA
-
Note 1.
V
dB
60
IGain 2,
;~
47pF
eo
I
I
I
HP 3400A
or Equiv.
I
Gain 1
en (Differential Noise At Input) :;;
400
6.0 V Battery
FIGURE 2
FIGURE 3
0.2 jJF
Vin
RL
V out
0.2 p,F
51
eo J2
51
~
1k
MOTOROLA LINEAR/INTERFACE DEVICES
2-305
1k
V
IJ
NE592, SE592
FIGURE 4 - GAIN 1 versus FREQUENCY
525
II
450
__
,! [I
I!,
, I'
,
300
I
I Ii .1
:11
;
, 'iI,
I
225
I I
I'
~i
315
I
I
i
5
1.0
2.0 3.0
!
II
5.0
1
I
I
!
i
I
!
,
'1 I\.
!I I
I
i
5
,
Ii: j
:1
I
11\ I Ii
I IIII l'il i
20 30
50
100
200 300 500
I
r-0
60
I I'
i
I
,- .l
5·
!
o
1.0
1000
!
2.0 3.0
1
5.0
I
Ii
1.0
1.0
s.o
TA '" 25°C
RL 0 1.0 k
>
_..
~ 5.0
'"
-...
~ 4.0
c5
----
>
~ 5.0
0-"
z
;::'"
\
I
I
I
i 1 ! I''II
I I I II11
I
I
,
I
I
10
J!
20 30 50
100
FREUUENCY (MHz)
200 300 500
1000
~-~
e-~!~
ol,slolJ I
VJCNE!
TA ::: 25°C
--t
~
3.0
~
2.0
~---
I
>
~
2.0
5
1.0
1.0
o
o
-------
>-
10
I
I I:
'"
>
5.0
i i
~ 4.0
i'-
3.0
1.0
I
FIGURE 7 - OUTPUT VOLTAGE SWING AS A FUNCTION
OF LOAD RESISTANCE
V~CNE~ 01,W I
s.O 1---
\
I
I,
I
FREUUENCY (MHz)
FIGURE 6 - OUTPUT VOLTAGE SWING AS A
FUNCTION OF FREQUENCY
I
1
I ,
I
II i
I
I
I
I
I
I
I
J
t-
,I I I,ll
i I
1il
,
0
I
i
,+ II!
r---. L
75
,
i III
,
i
•.
,
'lll!1
-- ; i IIIII1
90
i
I
10
i
I
-+-+1T
I
i
!
i ! :I
i
!
i
"}
150
o
i
I
II
I
i
I
FIGURE 5 - GAIN 2 varsus FREQUENCY
105
50
100
500
1000
V
~.
V
50
10
500
100
FREQUENCY (MHz)
5k
lk
10k
LOAO RESISTANCE (OHMS)
FIGURE 8 - VOLTAGE GAIN AS A FUNCTION OF
Radj RESISTANCE
1000
VCCNEE ±S.O V
f 0100 kHz
TA 0 25 0 C
O.2/,F
~
2: 100
l:-
......
;:=
-
z
;;'
"-
'"
~ 10
~
"-
>
~ 1.0
~
tt:
51
51
"O. I
c
1.0k
"-
loOk
0.0 I
1.0
10
100
lk
R.di (OHMS)
MOTOROLA LINEAR/INTERFACE DEVICES
2-306
10k
lOOk
1M
NE592, SE592
FIGURE 9 - DISK/TAPE PHASE MODULATED
READBACK SYSTEMS
+5.0 V
+6.0 V
9
10
r------
4
8
-
II
--,
-
I
I
Q
AMPLITUDE:
FREQUENCY:
1-10 mV p.p 1
1-4 MHz
I
I
I
I
47 pF
-6.0 V
I
I
READ HEAD
I
DIF FE RENTIATOR/AMPLIF IER
ZERO CROSSING DETECTOR
FIGURE 10 - DIFFERENTIATION WITH HIGH COMMON
MODE NOISE REJECTION
+6.0 V
0.2 J.LF
1=
-6.0 V
FOR FREQUENCY f1 «1/2" (32) C
VO
a!!
1.4 x 1 04C
~
dt
FIGURE 11 - FILTER NETWORKS
BASIC CONFIGURATION
+6.0 V
"0 (s' TRANSFER
"1 Is) fUNCTION
2re
lA X 104
--L-
LQwPais
o-~---r~
vo (5) ,..... 1.4 x 104
= 2(5) + 2re
V'1TsT
1.4X104
-R-
High Pass
[.• ~" 1
1
[
•
S+""1i"RC
1.4 X 104
-L-
_ 1.4x 104
= Z(!I) + 32
L
JL
"-A;:
c
~ VVVyC~
A
~
1.4
'o"dRo;,,'
In the networks above, 'the R value uHd is anumad
to include 2 Te , or approximatelv 30 Ohm •.
-6.0 V
MOTOROLA LINEAR/INTERFACE DEVICES
2-307
x,04-
--R-
[
52 + 1/LC
52 + 1/t..C +,/RC
1
II
®
OP-27
MOTOROLA
ULTRA-LOW NOISE PRECISION, HIGH SPEED
OPERATIONAL AMPLIFIER
ULTRA-LOW NOISE
PRECISION, HIGH SPEED
OPERATIONAL AMPLIFIER
The OP-27 series of monolithic operational amplifiers combine
low-noise, precision de performance and high bandwidth in one
device. Advanced Bipolar processing and innovative design techniques are used to produce this low noise precision operational
amplifier. This device is trimmed for extremely low initial input
offset voltage by utilizing a highly stable and reliable zener zap
technique during factory testing which yields guaranteed VIO limits as tight as 25 /JoV. A unique input bias current cancellation
scheme maintains low liB and 110 to typically ±20 nA and 15 nA
respectively over the full military temperature range. Other
sources of input errors are reduced in excess of - 120 dB due to
extremely high common-mode and power supply rejection ratios.
The OP-27 has a gain bandwidth product of 8.0 MHz and slew
rate of 2.8 V//Jos.
The precision, low noise and high speed characteristics of this
device makes it ideal for amplifying transducer signals, RIAA
phono, NAB tape head and microphone preamplifiers, wide band
instrumentation amplifiers and high speed signal conditioning for
data acquisition systems.
• Extremely Low-Noise -
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
3.0 nV/YHz at 1.0 kHz
80 nVp-p, 0.1 Hz to 10 Hz
• Low Initial Input Offset Voltage -
10 /JoV
• Ultra Stable Input Offset Voltage -
0.2 /JoV/mo.
• High Gain Bandwidth Product and High Slew Rate 2.8 V//Jos
• High Open-Loop Gain -
SIL,CON MONOLITHIC
INTEGRATED CIRCUIT
8.0 MHz,
Z SUFFIX
CERAMIC PACKAGE
CASE 693-02
1.8 Million
• High Common-Mode Rejection -
126 dB
(Top View)
Offset Null
Invt Input
Noninvt Input
VEE
8 Offset Null
VCC
Output
N.C.
ORDERING INFORMATION
Device
Slew Rate
'" 1.7 VII's
VIO '" 25,.V
OP-27AZ
OP-27EZ
OP-27EP
VIQ'" 6O/JoV
OP-27BZ
OP-27FZ
OP-27FP
VIO'" l00,.V
OP-27CZ
OP-27GZ
OP-27GP
Temperature
Range
- 55 to + 125"<:
-25 to +85'C
o to +70'C
MOTOROLA LINEAR/INTERFACE DEVICES
2-308
Package
Ceramic DIP
Ceramic DIP
Plastic DIP
OP-27
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage
Vee
VEE
+22
-22
V
Input Voltage Range (Note 1)
V
VIDR
±22
Differential Input Voltage (Note 2)
VID
:::t::0.7
V
Differential Input Current (Note 2)
110
±25
mA
Output Short-Circuit Duration
ts
Indefinite
Power Dissipation and Thermal Characteristics
Plastic Package (P Suffix) TA ~ + 36'e
Derate above T A
~
+ 75'e
Po
500
mW
11ROJA
6.7
mwre
Po
500
mW
11ROJA
7.1
mwrc
Ceramic Package (Z Suffix) TA ~ +75'C
Derate above TA ~ +80'C
II
Operating Ambient Temperature
AB and C Grades
'e
TA
-55 to + 125
E,F and G Grades
(Ceramic Package)
-25 to +85
EP, FP and GP Grades
(Plastic Package)
o to
Junction Temperature
Storage Temperature Range
Ceramic Package
Plastic Package
+ 70
+150
TJ
'e
'e
T stg
-65 to + 150
-65 to + 125
NOTES:
1. For supply voltages less than ::,:::22 V, the absolute maximum input voltage range is equal
to the supply voltage.
2. The inputs are protected by back-ta-back diodes. Current limiting resistors are not used
in order to achieve low noise. If differentia) input voltage exceeds::,:: 0.7 V, the input current
must be limited to 25 mA.
ELECTRICAL CHARACTERISTICS (Vec ~ + 15 V, VEE
-15 V, TA
~
+25°C unless otherwise noted.)
OP-27A/E/EP
Characteristic
Input Offset Voltage
Long Term Input Offset Voltage
Stability (Note 3)
OP-27BIF/FP
OP-27CIG/GP
Typ
Max
Via
-
10
25
-
20
60
-
30
100
f,CV
VIOlt
-
0.2
1.0
-
0.3
1.5
-
0.4
2.0
f,CVlmo
nA
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Unit
Input Offset Current
110
35
-
9.0
50
-
12
75
liB
-
7.0
Input Bias Current
,,10
,,40
",12
,,55
-
,,15
,,80
nA
enp_p
-
0.08
0.18
-
0.08
0.18
-
0.09
0.25
flVp_p
-
3.5
3.1
3.0
5.5
4.5
3.8
-
3.5
3.1
3.0
5.5
4.5
3.8
-
3.8
3.3
3.2
8.0
5.6
4.5
-
1.7
1.0
0.4
4.0
2.3
0.6
-
1.7
1.0
0.4
4.0
2.3
0.6
1.7
-
1.0
0.4
0.6
1.5
6.0
-
1.2
5.0
-
0.8
4.0
-
Mll
3.0
-
2.5
-
2.0
-
Gll
"11.0
'" 12.3
-
'" 12.3
-
V
Input Noise Voltage 0.1 to 10 Hz
(Note 4)
Input Noise Voltage Density
fo ~ 10 Hz
fo ~ 30 Hz
fo ~ 1000 Hz
(Note 4)
en
Input Noise Current Density
in
fo~10Hz
fo ~ 30 Hz
fo ~ 1000 Hz
(Note 4)
Input Resistance
Mode
~
Differential
Input Resistance
~
Common Mode
Input Voltage Range
ri
Rincm
VIR
nVIYHz
-
pAlYHz
" 11.0
" 12.3
-
-
±11.0
_.-
(continued)
MOTOROLA LINEAR/INTERFACE DEVICES
2-309
II
OP-27
ELECTRICAL CHARACTERISTICS (continued)
OP-27B/F/FP
OP-27A/E/EP
Characteristic
Symbol
Min
Typ
Max
Min
Typ
Common Mode Rejection Ratio
VCM = ±11 V
CMRR
114
126
-
106
123
Power Supply Rejection Ratio
VCCNEE = ±4.0 V to ± 18 V
PSRR
100
120
-
100
Large-Signal Voltage Gain
RL '" 2.0 kll, Va ~ ±10 V
RL'" 1.0 kll, Va ~ ±10 V
RL ~ 600 Il, Va = ± 1.0 V,
VCcNEE ~ ±4.0 V to ± 18 V
AVOL
1000
800
1800
1500
i -
1000
800
-
700
-
",12
",10
±13.8
±11.5
-
SR
1.7
2.8
GBW
5.0
8.0
-
Output Voltage Swing
RL '" 2.0 k!l
RL '" 600 !l
Va
Slew Rate, RL '" 2.0 kll
Gain Bandwidth Product
OP-27C/G/GP
Min
Typ
-
100
120
-
dB
120
-
94
114
-
dB
1800
1500
-
700
-
1500
1500
-
700
-
-
500
-
±13.8
-
'" 11.5
±10
'" 13.5
'" 11.5
-
1.7
2.8
-
V/tJ.s
5.0
8.0
-
MHz
II
Max
Max
Unit
V/mV
-
V
'" 12
",10
'" 11.5
1.7
2.8
5.0
8.0
-
Open Loop Output Resistance
Va ~ 0, 10 ~ 0
ro
-
70
-
-
70
-
-
70
-
Power Dissipation
Va ~ 0, No Load
PD
-
90
140
-
90
140
-
100
170
mW
-
"4.0
-
-
"'4.0
-
-
±4.0
-
mV
Offset Adjustment Range
Rp ~ 10 k!l
NOTES (continued)
3. Long term input offset voltage stability for the OP-27 series, refers to the average trend line of VIO versus time over extended periods after the
first 30 days of operation. Excluding the first hour of operation, changes in VIO during the first 30 days are typically 2.5 ~V.
4. Sample tested.
ELECTRICAL CHARACTERISTICS (VCC ~ + 15 V VEE
-15 V, TA ~ Tlow to Thigh INote 5])
OP-27B
OP-27A
Characteristic
Input Offset Voltage
Average Input Offset Drift
(Note 6)
Symbol
Min
Typ
Max
Via
-
30
60
TCVIO
-
0.2
0.6
110
-
15
50
Input Bias Current
liB
-
±20
±60
Input Voltage Range
VIR
±10.3
±11.5
Common Mode Rejection Ratio
VCM = ±10V
CMRR
108
Power Supply Rejection Ratio
VCCNEE = ±4.5 V to ± 18 V
PSRR
Large-Signal Voltage Gain
RL '" 2 kll, Va = ± 10 V
Input Offset Current
Output Voltage Swing
RL"'2kll
OP-27C
Typ
Max
-
50
200
-
70
300
tJ. V
0.3
1.3
-
0.4
1.8
tJ.vrc
-
22
85
-
30
135
nA
",28
±95
-
±35
±150
nA
Min
Typ
Max
Min
±10.3
±11.5
-
±10.2
"'·11.5
122
-
100
119
-
94
96
114
-
94
114
-
AVOL
600
1200
-
500
1000
Va
±11.5
±13.5
-
±11.0
"'13.2
116
-
dB
86
108
-
dB
-
300
800
-
V/mV
-
"'10.5
±13.0
-
V
MOTOROLA LINEAR/INTERFACE DEVICES
2-310
Unit
V
OP-27
ELECTRICAL CHARACTERISTICS (VCC ~
+ 15 V. VEE
~ -15 V. TA ~ Tlow to Thigh INote 5))
OP-27E1EP
Characteristic
Input Offset Voltage
Typ
Max
Min
Typ
Max
Min
Typ
Max
20
50
140
220
/LV
0.6
0.3
1.3
-
55
0.2
-
40
TCVIO
-
0.4
1.8
fLVrC
110
-
10
50
14
B5
20
135
nA
±14
±60
±IB
±95
±25
±150
nA
VIO
Average Input Offset Drift
(Note 6)
Input Offset Current
OP-27G/GP
OP-27F/FP
Min
Symbol
-
-
-
Unit
Input Bias Current
liB
Input Voltage Range
VIR
±10.5
±11.8
-
±10.5
±11.B
-
±10.5
±11.8
-
V
Common Mode Rejection Ratio
VCM ~ ±10V
CMRR
110
124
-
102
121
-
96
118
-
dB
Power Supply Rejection Ratio
VCCNEE ~ ±4.5Vto ±18V
PSRR
97
114
-
96
114
-
90
114
-
dB
Large-Signal Voltage Gain
RL '" 2.0 kfl. Vo ~ ± 10 V
AVOL
750
1500
-
700
1300
-
450
1000
-
V/mV
Vo
±11.7
±13.6
-
±11.4
±13.5
-
±11
± 13.3
-
V
Output Voltage Swing
RL'" 2.0 kfl
NOTES (continued)
5. Tlow
~
-55°C for OP-27A
OP-27B
OP-27C
-25°C for OP-27E
OP-27F
OP-27G
QOC
for OP-27EP
OP-27FP
OP-27GP
Thigh
+ 125°C for
OP~27A
OP-27B
OP-27C
+85°C for OP-27E
OP-27F
OP-27G
+70°C for OP-27EP
OP-27FP
OP-27GP
6. TCVIO performance is within specifications unnulled or when nulled with a potentiometer Rp == 8.0 kO to 20
kn.
ABBREVIATED CIRCUIT SCHEMATIC
Offset Null
r---A---..
.-------~_+---r~----~--~--~~----_.------_.--~~~~-oVCC
R4
R3
Rl'
R2'
Output
NonInverting
Input (+ I
Inverting
Input (-)
*Rl & R2 are trimmed
at wafer test for minimum
offset voltage.
~--------~----~--------~----------~--~--+-~~-oVEE
MOTOROLA LINEAR/INTERFACE DEVICES
2-311
II
OP-27
TYPICAL CHARACTERISTICS
II
FIGURE 1 - VOLTAGE NOISE TESTER GAIN
versus FREQUENCY
FIGURE 2 -
VOLTAGE NOISE TEST CIRCUIT
(0.1 Hz-TO-10 Hz)
100
0,1 "F
1\
""
r\
Test Time of 10 sec must be used to
0
limit low frequency «0.1 Hz) gain
0
0
300,01
1,0
f, FREQUENCY IHzI
0,1
FIGURE 3 -
Note: All capacitor values are for
non polarized capacitors only.
100
10
FIGURE 4 -INPUT WIDEBAND VOLTAGE NOISE versus
BANDWIDTH (0.1 Hz TO FREQUENCY INDICATED)
VOLTAGE NOISE versus FREQUENCY
10
0
~
~
~
'"z
0
~
'"'~
0
>
TA ~ +25°C
VCC ~ +15V
VEE ~ -15V
7, 0
5, of'..,
4,
0". .
TA
VCC
VEE
~
~
+ 25°C
+15V
-15V
~
'"
oz
'- I"-
~
1ff Corner - 2.7 Hz
~> o.1
2, 0
0
1.0
-
--
~1, 0
.......
3, 0
=
--
RL=1.0k
'[1 0
FIGURE 14 - OPEN LOOP VOLTAGE GAIN
versus LOAD RESISTANCE
kRL = 1.0 k
~ ::
TA = 15'C
Of-- VCC = + IS V
z
~ 1.Br-- VEE = -15 V
~ 1. 6
f--
f!j
~
~
./
0
~
30
10
50
40
/
:
I
I
II
-"
10
,
Vf-'"
1. 4
1.1
z 1. 0
ll:
o O. B
""
« 0.5
II II
1
O. 6
O. 4
0.1
I
i
~
1.0
10
RL, LOAD RESISTANCE Iknl
VCC + VEE, TOTAL SUPPLY VOLTAGE (VI
FIGURE 15 - MAXIMUM OUTPUT SWING
versus RESISTIVE LOAD
FIGURE 16 -
100
POWER SUPPLY REJECTION RATIO
versus FREQUENCY
8
6
0
4
2r-- Positive
Swing ~
0
.0
./""
TA = 25°C
01::::--
Vv
0
KNegative
Swing
/./
~
0
Positive~
V/
0
TA = 15'C
.Of-- VCC = + 15 V
Of-- VEE = -15 V
I' 1
0
1
FIGURE 17 -
COMMON MODE REJECTION RATIO
versus FREQUENCY
~ 140
!
:
211 0
t;j
1'.
~ 11 0
w
C>
I!
~ 10 0
z
I
o
~ 90
II
i
N-
I
~ 80
'"
u
70
100
I
I
~
1
I
I
1.0 K
I
iii
10 K
z
«
,
-___6"-0 Output
t, TIME {500 nsDIVI
AV~ +1.0
TA ~ +2SOC
VCC ~ + 15 V
Vee
VEE~ -15V
~ 15 pf
~ x
CL
RL
FIGURE 21 - LARGE·SIGNAL TRANSIENT RESPONSE
NOISE MEASUREMENTS
The extremely low noise of these devices can make
accurate measurement a difficult task. In order to realize
the 80 nV peak·to·peak noise specification ofthe op amp
in the 0.1 Hz to 10 Hz frequency range, the following
guidelines must be observed:
+ 5.0 V
(1) The device has to be warmed up for at least five
minutes. As the op amp warms up, its offset voltage
changes typically 4.0 /J-V due to its chip temperature
increasing 14 to 20°C from the moment the power
supplies are turned on. In the 10 sec measurement
interval these temperature·induced effects can easily exceed tens of nanovolts.
- 5.0 V
t, TIME {2.0 ILsiDIVI
+1.0
TA ~ +25°C
VCC ~ +15V
AV~
(2) For similar reasons, the device has to be well
shielded from air currents to eliminate the possibility of thermoelectric effects in excess of several
nanovolts.
VEE ~ -15V
CL ~ 12 pf
RL ~ x
MOTOROLA LINEAR/INTERFACE DEVICES
2-315
II
OP-27
(3) Sudden motion in the vicinity of the device can
also "feed-through" to increase the observed noise.
(4) The test time to measure 0.1 Hz to 10 Hz noise
should not exceed 10 sec. As shown in the noise
tester frequency response curve (Figure 1) the 0.1
Hz corner is defined by only one zero. The test time
of 10 sec acts as an additional zero to eliminate noise
contributions from the frequency band below 0.1
Hz.
the op amp and the source resistance of the generator.
With RF '" 500 n, the output is capable of handling the
current requirements (lL '" 20 mA at 10 V) and the amplifier stays in its active mode and a smooth transition will
occur.
As with all operational amplifiers when RF > 2.0 kn,
a pole will be created with RF and the amplifier's input
capacitance (8.0 pF), creating additional phase shift and
reducing the phase margin. A small capacitor (20 to 50
pF) in parallel with RF will eliminate this problem.
A noise-voltage density test is recommended when
measuring noise on a large number of units. A 10 Hz
noise-voltage density measurement will correlate well
with a 0.1 Hz-to-1O Hz peak-to-peak noise reading since
both results are determined by the white noise and the
location of the 1/f corner frequency.
FIGURE 23 -
UNITY GAIN BUFFER APPLICATIONS
When RF '" 100 n and the input is driven with a fast,
large signal pulse (> 1.0 V), the output waveform will
look as shown in Figure 23.
During the initial fast input step, the input protection
diodes effectively short the output to the input and current limit only by the output short circuit protection of
MOTOROLA LINEAR/INTERFACE DEVICES
2-316
PULSED OPERATION
®
MOTOROLA
TCA0372
II
Product Preview
DUAL POWER
OPERATIONAL AMPLIFIER
DUAL POWER OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The TCA0372 is a monolithic circuit intended for use as a power
operational amplifier in a wide range of applications, including
servo amplifiers and power supplies. No deadband crossover distortion provides better performance for driving coils.
• Output Current to 1.0 A
• Slew Rate of 1.3 VI/J-s
• Wide Bandwidth of 1.1 MHz
• Internal Thermal Shutdown
DPl SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Single or Split Supply Operation
• Excellent Gain and Phase Margins
• Common Mode Input Includes Ground
DP2 SUFFIX
PLASTIC PACKAGE
CASE 620-10
O""",Am'}
• Zero Deadband Crossover Distortion
Vee
2
7
Output B
3
6
VEE/Gnd
4
}
Inpu!sA
InpulsB
5
(Top View)
Output A
1
Inputs B {
5
Inputs A {
7
- '_ _....r(T0pVIBW)
SIMPLIFIED BLOCK DIAGRAM
{Top View)
SP SUFFIX
PLASTIC
MEDIUM POWER PACKAGE
CASE 762-01
ORDERING INFORMATION
Device
TCA0372DPI
TCA0372DP2
TCA0372SP
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
2-317
Operating Junction
Temperature Range
TJ
-40°C to
+125°C
~
Package
Plastic DIP
Plastic DIP
Plastic Power
II
TCA0372
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vs
40
Volts
Supply Voltage (from VCC to VEE)
VI DR
(Note 1)
Volts
Input Voltage Range
VIR
(Note 1)
Volts
Operating Junction Temperature (Note 2)
TJ
+125
"C
Tsto
-55 to + 125
"C
10
1.0
A
Imax
1.5
A
Input Differential Voltage Range
Storage Temperature Range
DC Output Current
Peak Output Current (Nonrepetitive)
DC ELECTRICAL CHARACTERISTICS (VCC = + 15 V, VEE = -15 V, RL connected to ground TJ = Tlow to Thigh (Note 3)
unless otherwise noted)
Symbol
Characteristic
Input Offset Voltage (VCM = 0)
VCC = +15V, VEE = -15V, TJ = +25"C
VCC = + 15 V, VEE = -15 V, TJ = Tlow to Thiah
Min
Typ
Max
-
3.0
15
20
Unit
mV
Via
-
-
aVIO/aT
20
-
Input Bias Current (VCM = 0)
liB
-
100
500
Input Offset Current (VCM = 0)
110
-
10
50
nA
Large Signal Voltage Gain
Va = ± 10 V, RL = 2.0 k
AVOL
30
100
-
V/mV
Output Voltage Swing (lL = 100 mAl
VCC = + 15 V, VEE = -15 V, TJ = +25"C
VCC = +15 V, VEE· = -15 V, TJ = Tlow to Thigh
VOH
14
13.9
14.2
-
Average Temperature Coefficient of Offset Voltage
VOL
-
VCC=+15V,VEE= -15 V, TJ = +25"C
VCC = + 15 V, VEE = -15 V, TJ = Tlow to Thiah
-14.2
-
Output Voltage Swing (lL = 1.0 A)
VCC = +24 V, VEE = 0 V, TJ = +25"C
VCC = +24 V, VEE = 0 V, TJ = Tlow to Thigh
-
22.5
22.5
22.7
-
1.3
VOL
-14
-13.9
-
-
-
1.5
1.5
VICR
Common Mode Rejection Ratio (RS = 10k)
CMRR
70
90
-
Power Supply Rejection Ratio (RS = 100!l)
PSRR
70
90
-
ID
NOTES:
1. Either or both input voltages must not exceed the magnitude of Vee or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
Thigh
~
V
VEE to (VCC - 1.0)
VEE to (VCC - 1.3)
Power Supply Current
VCC= +15V,VEE= -15V, TJ = +25"C
VCC = +15V,VEE = -15V, TJ = Tlow to Thigh
-40'C
V
-
Input Common Mode Voltage Range
TJ = +25"C
TJ = Tlow to Thigh
~
nA
V
VOH
VCC = +24 V, VEE = 0 V, TJ = +25"C
VCC = +24 V, VEE = 0 V, TJ = Tlow to Thigh
3. Tlow
p'vrc
+125"C
MOTOROLA LINEAR/INTERFACE DEVICES
2-318
dB
dB
mA
-
7.0
-
10
14
TCA0372
~ + 15 V, VEE ~ -15 V, Rl connected to ground, TJ ~
unless otherwise noted)
+ 25°C
AC ELECTRICAL CHARACTERISTICS (VCC
Characteristic
Slew Rate (Vin ~ -10 V to + 10 V, Rl
AV ~ -1.0, TJ ~ Tlowto ThiQh
Gain Bandwidth Product (I
TJ ~ 25°C
TJ ~ Tlow to ThiQh
~
~
2.0 k, Cl
100 kHz, Cl
~
~
Symbol
Min
Typ
100 pF)
SR
1.0
1.4
-
~
GBW
0.9
0.7
1.1
-
-
Degrees
100 pF, Rl
2.0 k)
Max
Unit
VII''"
MHz
Phase Margin TJ ~ Tlow to Thigh
Rl ~ 2.0 k, Cl ~ 100 pF
m
-
80
-
Gain Margin
Rl ~ 2.0 k, Cl
Am
-
15
-
dB
en
-
22
-
nV/YHz
THD
-
0.02
-
%
~
100 pF
Equivalent Input Noise Voltage
RS ~ 100 Ohms, 1 ~ 1.0 kHz to 100 kHz
Total Harmonic Distortion
AV ~ -1.0, Rl ~ 50 Ohms, Vo
NOTE: In case VEE
IS
~
0.5 VRMS, 1
disconnected before
Vee.
~
1.0 kHz
a diode between VEE and GROUND IS recommended to avoid damaging device.
FIGURE 1 - BIDIRECTIONAL DC MOTOR CONTROL WITH
MICROPROCESSOR-COMPATIBLE INPUTS
VCC
"~.
.-~
E2
Vs ~ logic Supply Voltage
Must Have VCC > Vs
El, E2 ~ logic Inputs
FIGURE 2 -
BIDIRECTIONAL SPEED CONTROL
OF DC MOTORS
..
..
2R3· Rl
For CircUit
stability ensure that Rx >
where
AM
RM = internal resistance of motor. The voltage available at the terminals of the motor is:
VM
where IRol
= 2 (Vl - V2s) + IRol' 1M
= 2R3· Rl and 1M is the motor current.
Rx
Vs
Rl
R7
10 k
R8
10 k
R3
10 k
5.011
R2
R5
10 k
10 k
MOTOROLA LINEAR/INTERFACE DEVICES
2-319
II
II
®
TlOG1
TlOG2
Tl064
MOTOROLA
LOW POWER
JFET INPUT
OPERATIONAL AMPLIFIERS
LOW POWER JFET INPUT
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUITS
These JFET input operational amplifiers are designed for low
power applications. They feature high input impedance, low input
bias current and low input offset current. Advanced design techniques allow for higher slew rates, gain bandwidth products and
output swing. The TL061 device provides for the external null
adjustment of input offset voltage.
These devices are specified over the commercial, vehicular and
military temperature ranges. The commercial and vehicular
devices are available in Plastic dual in-line and SOIC packages.
The military devices are available in Ceramic dual in-line
packages.
• Low Supply Current - 200 }LA/Amplifier
• Low Input Bias Current • High Gain Bandwidth • High Slew Rate -
5.0 pA
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
o SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-S
Offset Null '
2.0 MHz
Inputs
6.0 VI}Ls
• High Input Impedance -
10 12 !1
• Large Output Voltage Swing -
JG SUFFIX
CERAMIC PACKAGE
CASE 693-02
I'
~
,
, NC
,
VCC
, Output
VEE'
, Offset Null
'-------'
(Single, Top View)
± 14 V
• Output Short Circuit Protection
Output 1 '
I'
Inputs 1 ,
, VCC
,
- :I
Output 2
Inputs 2
VEE'
'
'-------'
(Dual. Top Viewl
ORDERING INFORMATION
OpAmp
Function
Tested
Device
Package
Temperature Range
o to
o to
SO-S
Plastic DIP
SO-S
Plastic DIP
Ceramic DIP
o to
o to
Single
TL061CD, ACD, BCD
TL061CP, ACP, BCP
TL061VD
TL061VP
TL061MJG
Dual
TL062CD, ACD, BCD
TL062CP, ACP, BCP
TL062VD
TL062VP
TL062MJG
+ 70'C
+ 70'C
-40 to +S5'C
-40 to +S5'C
- 55 to + 125'C
SO-S
Plastic DIP
SO-S
Plastic DIP
Ceramic DIP
TL064CD, ACD, BCD
TL064CN, ACN, BCN
TL064VD
TL064VP
TL064MJ
o to + 70'C
o to + 70'C
-40 to +S5'C
-40 to +S5'C
-55 to + 125'C
SO-14
Plastic DIP
SO-14
Plastic DIP
Ceramic DIP
Quad
+ 70'C
+70'C
-40 to +S5'C
-40 to +S5'C
- 55 to + 125'C
N SUFFIX
PLASTIC PACKAGE
CASE 646-06
J SUFFIX
CERAMIC PACKAGE
CASE 632-0S
o SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
Output 1 ,
Inputs 1 { :
VCC'
14
"\
2-320
Inputs 4
"
" VEE
Inputs 2 { :
.oj
, Inputs 3
Output 2 ,
, Output 3
(Quad, Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
Output 4
TL061, TL062, TL064
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vs
+36
V
VIDR
±30
V
Input Voltage Range (Notes 1 and 2)
VIR
±15
V
Output Short-Circuit Duration (Note 3)
ts
Indefinite
Seconds
Operating Junction Temperature (Note 3)
Ceramic Package
Plastic Package
TJ
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range (Note 1)
'c
+160
+150
Storage Temperature Range
'c
T8 tg
-65 to + 160
-60to i-150
Ceramic Package
Plastic Package
NOTES:
1. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal.
2, The magnitude of the input voltage must never exceed the magnitude of the supply or 15 volts, whichever is less.
3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See Figure 1.)
EQUIVALENT CIRCUIT SCHEMATIC (EACH AMPLIFIER)
----~--------------------~--------~----__QVCC
Inputs {
:O------+---------I----...J
+
R4
R3
...-J\,/v\__-"'-"V'V'".--o
Output
01
06
Rl
-
-
- - -t-------f..J\,Mr-----
"r--
f=
o
1':::::
a
20
20
40
60
80 100
TA, AMBIENTTEMPERATURE lOCI
120
140
,/'
2.0
0
30
0.
0
'"
~
15
18
~
12
I-
::::>
I
I
- 50
- 25
o
0.3Or--
-f'"z
~
w
~
<5
>
5
Jc~1 ~
a
6 6.
>
I
I
VCC
U)JEIE
I
~I JJ
1111
+12V,VEE -
,
I
12 V
100
a
125
-
15
II
I I I
RL ~ 10 kll
TA ~ 25°C
::::>
E
~
z
a
100
+ 5.0 V, VEE
V~~'
LUJEIE I l5 1V
III
I
1.0K
I
III
0.3
r--VCC
o~~EE
I--RL
'"w a
«
'"~ a
;;'
z
LARGE SIGNAL VOLTAGE GAIN
versus TEMPERATURE
~
+15V
15V
10 kfl
......
/
/
I
0
>
0.5 0.7 1.0
2.0 3.0
RL, LOAD RESISTANCE (kll}
100
«
0
-
...........
'" a
in
w
5.0 V
VCC
0.2
0.1
;;;-
I-
f= or- =>
o
~5. or- -
10
""
,,/
FIGURE 6 -
~
a
5.0 7.0
/'
1I
FIGURE 5 - OUTPUT VOLTAGE SWING
versus FREQUENCY
5
16
/
::::>
0
25
50
75
TA, AMBIENT TEMPERATURE (OC}
14
/
f=
~ +15V
5 1O-VCC
VEE ~ -15 V
6
0
RL
~
10k!!
> 5.
a
+151V
VEE ~ -15V
24 -TA .~ 25°C
~
w
~
o
-- 75
_V~C ~
z
5
~
4.0
6.0
8.0
10
12
VCC, IVEEI, SUPPLY VOLTAGE (VOLTSI
FIGURE 4 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
5
;::
V
... V
0
160
FIGURE 3 - OUTPUT VOLTAGE SWING
versus TEMPERATURE
~
V
//
6
> 5.0
iO;;::
0
55 ··40
",-
0
::::>
.E
V
5
w
8 & 14 PIN CERAMIC PKG.
'" 400
0
~ 25°C
'"z
'"~
'"
~ 10kfl
'"~
.::.
0
I I I
~
t--.
10K
lOOK
f, FREQUENCY (Hzl
1.0M
10M
0
75
50
25
25
50
75
TA, AMBIENT TEMPERATURE (OC}
MOTOROLA LINEAR/INTERFACE DEVICES
2-324
100
125
TL061, TL062, TL064
FIGURE 7 - OPEN-LOOP VOLTAGE GAIN
AND PHASE versus FREQUENCY
100
I
I
Vcc ~ +15VVEE ~ -15V_
RL ~ 10 kD
CL ~ 0 pF
TA ~ 25'C
"'
0
\
'\.
\
\
-
,Gain
""-
0
Phase
r-..
'\.
0
"
\
'\.
0
0,1
1,0
10
100
1,OK
10K
t, FREQUENCY (Hzl
FIGURE 9 -
FIGURE 8 -
lOOK
250
200
i
1
~
~
ew
45
~
m
90
\
150
=>
u
~ 100
=>
fj
135 -ec
'"
25'C
50 j-- Vo ~ OV
j--RL~xD
o
o
SUPPLY CURRENT PER AMPLIFIER
versus TEMPERATURE
I
I
2,0
4,0
6,0
8.0
10
12
14
16
VCC, IVEEI, SUPPLY VOLTAGE (VOLTSI
18
20
FIGURE 10 - TOTAL POWER DISSIPATION
versus TEMPERATURE
250
25
~
1
TL064
.!
E 20 I--VCC~ +15V
VEE ~ -15V
z:
0
I--Vo ~ OV
~ 15 I--RL ~ xl!
_ 200
1
>-
i
~
TA
13
180
10M
1,OM
II
SUPPLY CURRENT PER AMPLIFIER
versus SUPPLY VOLTAGE
150
1);
'"C5
=>
u
~
TL062
'" 10
~
It 100
I--VCC ~ +15V
'"U I-VEE ~ -15V
.£?
50
Vo ~ OV
I--RL ~ x D
I
I
o
50
-50
-25
25
75
-75
TA, AMBIENT TEMPERATURE I'CI
TLJ61
;!
:='
5,0
.P
100
o
-75
125
FIGURE 11 - COMMON-MODE REJECTION
versus TEMPERATURE
BB
,I
7_VCC~
_
~
-...........
80
Cl
~ 60
o
'"
2
8'"
1
'"
u
100
125
20
o
100
125
4VCM~4VO
CMR
~ 20Log (~x ADM)
r--..r--,
100
I'--t--
I
I
1,OK
MOTOROLA LINEAR/INTERFACE DEVICES
2-325
""
40
",'
250255075
TA, AMBIENT TEMPERATURE I'CI
~
o
~
50
-25
25
50
75
TA, AMBIENTTEMPERATURE ('CI
140
vcc ~ +15V
~ 12o-vEE~ -15V
tvCM ~ OV
z
o
4VCM ~ ±1,5V
~100- TA ~ 25'C
I
I--
!,
+15V
VEE ~ -15V
Vo ~ OV
RL ~ 10kD
3
80
-75
-50
FIGURE 12 - COMMON-MODE REJECTION
versus FREQUENCY
5
4
I
~
=>
10K
t, FREQUENCY (Hzl
lOOK
1.0M
II
TL061, TL062, TL064
FIGURE 14 - NORMALIZED GAIN BANDWIDTH PRODUCT,
SLEW RATE AND PHASE MARGIN versus TEMPERATURE
FIGURE 13 - POWER SUPPLY REJECTION
versus FREQUENCY
140
~ 120
~
1--I-+H-l+Hl--I-+-I-t+++lt- + PSR
r--=1=+i=l'*1FHf.::"""k-!'--J--j+i-l1l--- - PSR ~
100 t-
z
0
~
~
20L09 ( :.
1, 4
:O:~~M )
I
VCC
1, 3
2
20Lo (:'VO/ADM)
9
"VEE
1
5lewRate"
0
60
'"'!<
40
~
20
~
~.
9
1M
lOa 0
Q
+ 15 V
10 Of--- VEE
~
-15 V
0V
~
~
~
r-
0, 1
~
0,0 1
0,00 I
-55
t'i
/
in
~
E
- 50
- 25
25
,0
75
TA, AMBIENT TEMPERATURE I'CI
100
a,92
125
1
~
I, 0
U>
,96 z ,
0,94
FIGURE 16 -INPUT NOISE VOLTAGE versus FREQUENCY
0
«
~O .98~o
70
1
VCC
VCM
ii3
1.0 ~
,\0
0,6
- 75
FIGURE 15 - INPUT BIAS CURRENT
versus TEMPERATURE
'"
5:
0, 7
f, FREQUENCY IHzl
r-
-r--:::::: s,::.,
, "Phase Margin
lOOK
'"
- 1 .04~
I .02~
B
0
100
~
r-r--.
........ -
,OB
1
+15V_ I
,06~
-15 V
VEE ~
RL ~ 10 kll
CL ~ a pF
_~GBW
80
,I,
~
I
-25
--
V
V-
50
""-r--1
40
0
>
/
25
75
50
TA, AMBIENT TEMPERATURE lOCI
FIGURE 17 -
i'§
60
"'isz
f-
co
~
20 -
30
~
j
10
o
100
10
125
SMALL SIGNAL RESPONSE
Ivcc _ + 15 V
1-- VEE 15 V
RS
100 II
r-ITII1IIII C
i
IIIIIII
100
FIGURE 18 -
I,OK
f, FREQUENCY IHll
LARGE SIGNAL RESPONSE
1, TIME 120 1-" DIVI
t, TIME (0.5 I-',!DIVI
MOTOROLA LINEAR/INTERFACE DEVICES
2,326
10K
lOOK
TL061, TL062, TL064
FIGURE 19 -
FIGURE 20 -
AC AMPLIFIER
II
HIGH·Q NOTCH FILTER
VCC
VCC
Output
Rl
In p ut
1.0 Ml1
o-......JVVV......JVVV......-1
C3
Inputs
Output
1.5 Ml!
o-4-~-----'----~
Cl
C2
Cl
50 11
~
C2 = (;3
2
~
110pF
1
10 ~ 2,.,. Rl Cl ~ 1.0 kHz
FIGURE 21 -
INSTRUMENTATION AMPLIFIER
Input
A
>---------...-......--0 Output
Input B
FIGURE 22 -
0.5 Hz SQUARE·WAVE OSCILLATOR
FIGURE 23 -
RF - 100 kl!
~
AUDIO DISTRIBUTION AMPLIFIER
15 V
3.3 kl!
TL061
Output A
Output
1.0 kl!
1.0 !'F
3.3 k!l
Input
0----11--+-.....-1
9.1 kll
1= __1_ _
2,.,. RF CF
Output B
100 kl!
100!,F
I
Output C
MOTOROLA LINEAR/INTERFACE DEVICES
2·327
II
®
TL071
TL072
TL074
MOTOROLA
Specifications and Applications
Information
LOW NOISE, JFET INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
LOW NOISE, JFET INPUT
OPERATIONAL AMPLIFIERS
These low-noise JFET input operational amplifiers combine two
state-of-the-art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier
has well matched high voltage JFET input devices for low input
offset voltage. The BIFET technology provides wide bandwidths
and fast slew rates with low input bias currents, input offset currents, and supply currents. Moreover, the devices exhibit lownoise and low harmonic distortion making them ideal for use in
high-fidelity audio amplifier applications.
These devices are available in single, dual and quad operational
amplifiers which are pin-compatible with the industry standard
MC1741, MC1458, and the MC3403/LM324 bipolar products. Devices with an "M" suffix are specified over the military operating
temperature range of - 55°C to + 125°C and those with a "C"
suffix are specified from O°C to + 70°C.
• Low Input Noise Voltage -
18 nV/YHz Typ
• Low Harmonic Distortion -
0.01% Typ
• Low Input Bias and Offset Currents
• High Input Impedance - 1012 n Typ
• High Slew Rate -
• Low Supply Current -
IB'
TL071
(Top View)
NC
, VCC
, Output
• Offset Null
: +A B
EE
Temperature
Range
Device
TL071ACJG, BCJG, CJG
:}
+
Inputs B TL072
(Top View)
+70°C
J SUFAX
CERAMIC PACKAGE
CASE 632-08
(TL074 Only)
Ceramic DIP
14~'
1
D SUFFIX
PLASTIC PACKAGE
CASE 751 A·02
SO-14
SO-8
o to. + 70°C
TL072ACP, BCP, CP
TL072MJG
Ceramic DIP
Plastic DIP
-55to +125°C
TL072ACJG,BCJG,CJG
Package
N SUFFIX
PLASTIC PACKAGE
CASE 646-06
(TL074 Only)
SO-8
o to
TL071ACP, BCP, CP
Ceramic DIP
Plastic DIP
-55 to + 125'C Ceramic DIP
TL074ACD, BCD, CD
TL074ACJ, BCJ, CJ
SO-14
o to
+70'C
TL074ACN, BCN, CN
TL074MJ
DSUFFIX
. PLASTIC PACKAGE
CASE 751-02
SO-8
Offset Null
Inv + Input '
Noninvt Input"
VEE •
V
TL072ACD, BCD, CD
Quad
•
1.4 mA per Amp
TL071MJG
Dual
,
1
4.0 MHz Typ
TL071ACD, BCD, CD
Single
•
8
JG SUFFIX
CERAMIC PACKAGE
CASE 693-02
Output A~' VCC
Inputs A { , - _ ' Output B
ORDERING INFORMATION
OpAmp
Function
1
13 V//Ls Typ
• Wide Gain Bandwidth -
~
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
Ceramic DIP
Plastic DIP
-55to +125°C
Ceramic DIP
TL074 (Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
2-328
TL071, TL072, TL074
MAXIMUM RATINGS
Rating
Symbol
TLOLM
TLOLC
TLOLAC
TLOLBC
VCC
VEE
+18
-18
+18
-18
V
VID
±30
±30
V
VIDR
±15
±15
V
Supply Voltage
Differential Input Voltage
Input Voltage Range (Note 1)
Output Short-Circuit Duration (Note 2)
Unit
Continuous
ts
Power Dissipation
Plastic Package (N,P)
Derate above TA = + 47°C
Ceramic Package (J, JG)
Derate above TA = + 82°C
-
Po
1IOJA
Po
1i8JA
Operating Ambient Temperature Range
Storage Temperature Range
TA
Tsta
680
10
680
10
680
10
o to
-55 to +125
mW
mWrC
mW
mWrC
+ 70
°c
-65to +150 -65to +150
°c
NOTES: 1. The magnitude of the mput voltage must not exceed the magmtude of the supply voltage or 15 volts, whichever is less.
2. The output may be shorted to ground or either supply. Temperature andlor supply voltages must be limited to ensure that power dissipation
ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (VCC
=
+ 15 V, VEE
=
-15 V, TA
=
+ 25° unless otherwise noted).
TLOLC
TLOLAC
TL07 BC
TLOLM
Symbol
Characteristic
Input Offset Voltage (RS '" 10 k, VCM
0)
TL071 , TL072
TL074
TLOLA
TLOLB
=
Average Temperature Coefficient of Input Offset Voltage
RS = 50 n, TA = Tlow to ThiQh (Note 3)
Input Offset Current (VCM
Input Bias Current (VCM
=
ll.VIO/ll.T
110
0) (Note 4)
TLOL
TL07 _ A, TL07 _ B
liB
Input Resistance
ri
Common Mode Input Voltage Range
=
:':10 V, RL;', 2.0 k)
TLOL
TLOL A, TLOL B
Output Voltage Swing (Peak-to-Peak)
(RL = 10 k)
Max
-
3.0
3.0
6.0
9.0
-
-
-
-
-
3.0
3.0
3.0
2.0
10
10
6.0
3.0
-
10
-
-
10
-
-
5.0
50
-
-
-
-
5.0
5.0
50
50
-
30
200
-
-
200
200
Va
Supply Voltage Rejection Ratio (RS '" 10 k)
TLOL
TL07_ A, TL07_ B
PSRR
Supply Current (Each Amplifier)
Unity Gain Bandwidth
mV
jJ-vrc
-
pA
-
-
30
30
10 12
-
-
10 12
-
+15,-12
-
+15,-12
+15,-12
-
n
V
-
-
-
±10
:':11
35
150
-
-
-
25
50
150
150
24
28
-
24
28
80
100
-
-
-
70
80
100
100
-
80
100
70
80
100
100
-
-
1.4
2.5
mA
4.0
-
MHz
V/mV
-
-
V
dB
-
dB
-
-
-
-
10
-
1.4
2.5
BW
-
4.0
SR
10
13
-
100 pF
MOTOROLA LINEAR/INTERFACE DEVICES
2-329
Unit
pA
AVOL
CMRR
=
Typ
±11
Common Mode Rejection Ratio (RS '" 10 k)
TLOL
TLOL A, TLOL B
Slew Rate (See Figure 1)
Vin = 10 V, RL = 2.0 k, CL
Min
VICR
TLOL
TL07 _ A. TL07 _ B
Large-Signal Voltage Gain (Va
Max
Via
0) (Note 4)
TLOL
TLOL A, TLOL B
=
Typ
Min
13
V/jJ-s
II
TL071, TL072, TL074
ELECTRICAL CHARACTERISTICS (VCC ~
+ 15 V VEE
+ 25' unless otherwise noted)
~ - 15 V TA ~
TL07_C
TL07_AC
TL07_BC
TLOLM
Symbol
Min
Typ
Rise Time (See Figure 1)
tr
-
0.1
Overshoot Factor
Vin ~ 20 mV, RL
-
-
10
Equivalent Input Noise Voltage
RS ~ lOa n, f ~ 1000 Hz
en
-
18
-
-
Equivalent Input Noise Current
RS = 100n,1 ~ 1000 Hz
in
-
0.01
-
Total Harmonic Distortion
Va (RMS) = 10 V, RS '" 1.0 k
RL '" 2.0 k, 1 ~ 1000 Hz
THD
-
0.01
-
120
Characteristic
~
Max
-
-
ELECTRICAL CHARACTERISTICS (VCC = +15V V EE
~
Symbol
Input Offset Voltage (RS '" 10 k, VCM = 0)
TL071, TL072
TL074
TLOLA
TLOLB
Via
Input Offset Current (VCM = 0) (Note 4)
TLOL
TLOL A, TLOL B
110
Input Bias Current (VCM
~
Large-Signal Voltage Gain (Va
~ ±
Output Voltage Swing (Peak-to-Peak)
(RL'" 10 k)
(RL'" 2.0 k)
Unit
p.s
10
-
%
18
-
nV/YHz
-
0.Q1
-
pAlYHz
-
-
0.01
-
%
-
-
120
-
dB
TLOLC
TLOLAC
TL07 BC
M
Typ
Max
-
-
9.0
15
-
10 V, RL '" 2.0 k)
TLOL
TLOL A, TLOL B
Max
-
Min
-
0) (Note 4)
TLOL
TL07 _ A, TL07 _ B
Typ
- 15V TA= ThiQIh to Tlow (Note 3])
TL07
Characteristic
-
0.1
2.0 k, CL = lOa pF
Channel Separation
Av = 100
Min
-
Typ
Max
-
13
13
7.5
5.0
-
-
2.0
2.0
Min
Unit
mV
-
-
-
-
nA
-
-
-
-
-
-
-
50
-
-
7.0
7.0
20
-
-
-
15
25
-
-
-
-
24
20
-
-
20
-
nA
liB
AVOL
Va
24
20
-
-
V/mV
V
-
-
NOTES (Continued):
3. Tlow = -55'C for TL071M, TL072M, TL074M
Thigh = + 125'C for TL071 M, TL072M, TL074M
= O'C for TL071 C, TL071AC, TL071 BC
= +70'C for TL071C, TL071AC, TL071BC
TL072C, TL072AC, TL072BC
TL072C, TL072AC, TL072BC
TL074C, TL074AC
TL074C, TL074AC
4. Input Bias currents of JFET input op amps approximately double for every 1Qoe rise in Junction Temperature as shown in Figure 3. To maintain
Junction Temperature as close to ambient temperatures as possible, pulse techniques must be used during test.
TEST CIRCUITS
FIGURE 1 -
UNITY GAIN VOLTAGE FOLLOWER
FIGURE 2 -INVERTING GAIN OF 10 AMPLIFIER
1.0 k.
>--_~OVO
+
RL
~
2.0 k
CL
~
100 pF
CL
MOTOROLA LINEAR/INTERFACE DEVICES
2-330
=
lOa pF
TL071, TL072, TL074
FIGURE 3 - INPUT BIAS CURRENT
versus TEMPERATURE
FIGURE 4 - OUTPUT VOLTAGE SWING
versus FREQUENCY
100
Ci
+15V
=VCCNEE
~
~
w
20
~
>-
15
'"~
I],U
III II
IUl
::0
1= 10
::0
o
t! 5.0
-75
-50 -25
0
25
50
75
TA, AMBIENT TEMPERATURE 1°C)
100
125
~Ul
30
'"
~
w
~
~
~
I- VCCNEE = ± 15 V
TA = 25°C
r- I- See Figure 2
z
V
1/
~
is
o
L
o
4.0
0.4
0.7 1.0
2.0
RL, LOAD RESISTANCE Ik!l)
7.0 10
I
2. 0
1. 8
I
See Figure 2
30
~
w
25
~
~
5
I!=
is
VRL
o
5.0
10
15
Vcc, IVEEI, SUPPLY VOLTAGE I ±V)
= 10k
11.6
l - t-""
~ 1.4
§ 1.2
= 2.0 k
u
20
~ 1.0
15
~ 0.8
- -t---- t - -
-so
-25
0
25
50
75
TA, AMBIENTTEMPERATURE 1°C)
100
-
~
r--
~ 0.6
'"
.9 0.4
10
6
> 5.0
20
VccNEE = ± 15 V
>-
"RL
V
FIGURE 8 - SUPPLY CURRENT PER AMPLIFIER
versus TEMPERATURE
",35 I-- VCcNEE = ± 15 V
~
V
10
FIGURE 7 - OUTPUT VOLTAGE SWING
versus TEMPERATURE
'"
z
V
V
V
t!
0.2
10M
~
30
~
>
0.1
= 2.0 k
= 25°C
'"~ 20
./
10
1.0 M
I
I-RL
TA
~
w
20
~ V
o
6 5.0
10 k
100 k
f, FREQUENCY 1Hz)
FIGURE 6 - OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE
40
'"
~
l'
1.0 k
100
FIGURE 5 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
;z
1\
11111
o
0.0 1
I
RL = 2.0k
TA = 25°C
See Figure 2
VCCNEE = ± 15 V
§E 25
II
WUll1
111111111111
30
0.2
125
-so
-25
0
25
SO
75
TA, AMBIENT TEMPERATURE 1"<:)
MOTOROLA LINEAR/INTERFACE DEVICES
2-331
100
125
TL071, TL072, TL074
II
FIGURE 9 - LARGE-SIGNAL VOLTAGE GAIN AND
PHASE SHIFT versus FREQUENCY
FIGURE 10 - LARGE-5IGNAL VOLTAGE GAIN
versus TEMPERATURE
1000
VCCNEE = ± 15 V
RL = 2.0k
TA = 25'C
1 - - ....
........
........
"
0' t;:
........ ~ain
:i"
'r-...
PhaselShift
45°~
-~~-o Output
3.3 k
68 k
0.033 /-LF
Turn-Over Frequency ~ 1.0 kHz
Bass Boost/Cut - ± 20 dB at 20 Hz
Treble Boost/Cut - ± 19 dB at 20 kHz
0.033 /-LF
L -_ _ _ _~~
FIGURE 15 -
HIGH Q NOTCH FILTER
R
R
Input
TL071
+
Cl
1
fo ~ 2"RC ~ 350 Hz
R
~
2Rl
~
Rl
1.5 M
C~~~300PF
2
C
C
MOTOROLA LINEAR/INTERFACE DEVICES
2-334
®
TL081
TL082
TL084
MOTOROLA
Specifications and Applications
Information
JFET INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
JFET INPUT OPERATIONAL AMPLIFIERS
These low-cost JFET input operational amplifiers combine two
state-of-the-art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier
has well matched high voltage JFET input devices for low input
offset voltage. The BIFET technology provides wide bandwidths
and fast slew rates with low input bias currents, input offset currents, and supply currents.
These devices are available in single, dual and quad operational
amplifiers which are pin-compatible with the industry standard
MC1741, MC1458, and the MC3403/LM324 bipolar products. Devices with an "M" suffix are specified over the military operating
temperature range of - 55"C to + 125"C and those with a "C"
suffix are specified from O"C to + 70"C.
.~
1
8.8'
P SUFFIX
JG SUFFIX
PLASTIC PACKAGE
CASE 626-05
CERAMIC PACKAGE
CASE 693-02
o SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
1
• Input Offset Voltage Options of 3.0, 6.0, and 15 mV Max
• Low Input Bias Current -
Offset Null
Inv+ Input'
Noninvt Input"
VEE •
30 pA
• Low Input Offset Current - 5.0 pA
• Wide Gain Bandwidth - 4.0 MHz
• High Slew Rate - 13 VIf.Ls
• Low Supply Current - 1.4 mA per Amplifier
• High Input Impedance - 10 12 {}
.~
TL081
NC
(Top Viewl
, VCC
• Output
• Offset Null
-
Output A~' VCC
Inputs A { , - _ ' Output B
V
: +A B
EE
• Industry Standard Pinouts
:
+.
~ Inputs
B TL082
(Top Viewl
~~
,!:m nH :!·~iN(nn
N SUFFIX
ORDERING INFORMATION
Temperature
Range
OpAmp
Device
Function
Single
o to
+70"C
TL082ACJG, BCJG,CJG
o to
+ 70"C
Out 1
Ceramic DIP
Plastic DIP
Inputs 1
-55 to + 125"C Ceramic DIP
SO-14
TL084ACD, BCD, CD
TL084ACJ, BCJ, CJ
TL084ACN, BCN, CN
TL084MJ
1
o SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
SO-8
TL082ACP, BCP, CP
TL082MJG
Quad
~
14~~-
-55 to + 125"C Ceramic DIP
TL082ACD, BCD, CD
Dual
Ceramic DIP
. Plastic DIP
TL081ACP, BCP, CP
TL081MJG
J SUFFIX
CERAMIC PACKAGE
CASE 632-08
(TL084 Only)
SO-8
TL081ACD, BCD, CD
TL081ACJG, BCJG, CJG
Package
PLASTIC PACKAGE
CASE 646-06
(TL084 Only)
o to
+ 70"C
VCC
Ceramic DIP
Plastic DIP
Inputs 2
-55 to + 125"C Ceramic DIP
Out 2
TL084 (Top View)
MOTOROLA LINEAR/INTERFACE DEVICES
2-335
TL081, TL082, TL084
MAXIMUM RATINGS
II
Rating
Supply Voltage
Differential Input Voltage
Input Voltage Range (Note 1)
Output Short-Circuit Duration (Note 2)
Symbol
TLOB_M
TLOB_C
TL08_AC
TLOB_BC
VCC
VEE
+IB
-IB
+IB
-IB
V
VID
±30
±30
V
VIDR
±15
±15
V
mW
mWrC
mW
mWrC
Continuous
ts
Power Dissipation
Plastic Package (N,P)
Derate above TA ~ +4]oC
Ceramic Package (J,JG)
Derate above TA ~ + B2°C
Operating Ambient Temperature Range
Storage Temperature Range
Unit
Po
1/8JA
Po
1I8JA
-
6BO
6BO
6BO
TA
-55 to + 125
TstQ
-65 to + 150
10
10
10
o to
+70
'c
-65 to + 150
°c
NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or 15 volts, whichever is less.
2. The output may be shorted to ground or either supply. Temperature and/or supply voltages must be limited to ensure that power
dissipation ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (VCC
~ + 15 V VEE ~ -15 V TA ~ + 25°C unless otherwise noted)
TLOB_C
TL08_AC
TL08_BC
TL08_M
Characteristic
Input Offset Voltage (RS .; 10 k, VCM
Symbol
~
0)
TLOB1, TLOB2
TLOB4
TLOB_A
TLOB_B
Average Temperature Coefficient of Input Offset Voltage
RS ~ 50
n, TA
~
VIO
dVIO/dT
Min
Typ
Max
-
3.0
3.0
6.0
9.0
-
-
-
-
10
-
Min
Typ
Max
-
5.0
5.0
3.0
2.0
15
15
6.0
3.0
-
-
10
-
5.0
100
-
-
-
5.0
5.0
200
100
30
200
-
-
-
-
30
30
400
200
Unit
mV
-
I'V/'C
Tlow to Thigh (Note 3)
Input Offset Current (VCM
Input Bias Current (VCM
~
~
0) (Note 4)
TLOB_
TLOB_A, TLOB_B
0) (Note 4)
Input Resistance
r;
Common Mode Input Voltage Range
-
10 12
± 10 V, RL"'2.0 k)
TLOB_
TLOB_A. TLOB_B
Output Voltage Swing (Peak-to-Peak)
RL ~ 10 k
10 12
-
-
±11
+15,-12
-
±10
±11
+15,-12
+15,-12
-
-
25
-
150
-
-
25
50
150
150
24
2B
-
24
28
-
Common Mode Rejection Ratio (RS"'10 k)
TLOB_
TLOB_A, TLOB_B
CMRR
BO
100
-
-
-
70
BO
100
100
-
Supply Voltage Rejection Ratio (RS"'10 k)
TLOB_
TLOB_A, TLOB_B
PSRR
BO
100
-
70
BO
100
100
-
-
-
1.4
2.B
mA
4.0
-
MHz
V
dB
dB
-
-
Supply Current (Each Amplifier)
ID
-
1.4
2.B
Unity Gain Bandwidth
BW
-
4.0
-
-
MOTOROLA LINEAR/INTERFACE DEVICES
2-336
V/mV
AVOL
Vo
n
V
VICR
TLOB_
TLOB_A, TLOB_B
~
pA
liB
TLOB_
TLOB_A. TLOB_B
Large-Signal Voltage Gain (VO
pA
110
TL081, TL082, TL084
ELECTRICAL CHARACTERISTICS (VCC
= + 15 V
VEE
=
-15 V TA
= + 25°C
unless otherwise noted)
TLOB_C
TLOB_AC
TLOB_BC
TLOB_M
Svmbol
Min
TVp
SR
B.O
13
-
-
tr
0.1
-
-
-
10
-
-
Equivalent Input Noise Voltage
RS = 100 n, f = 1000 Hz
en
-
25
-
Channel Separation
AV = 100
-
-
120
-
Characteristic
Slew Rate (See Figure 1)
Vin = 10 V, RL = 2.0 k, CL
=
=
2.0 k, CL
Min
=
-
VIpS
0.1
pS
10
-
-
25
-
nV/\/HZ
-
120
-
dB
= + 15 V
VEE
=
- 15 V TA
Characteristic
Input Offset Voltage (RS <;10 k, VCM
Svmbol
= 0)
TLOB_C
TLOB_AC
TLOB_BC
=
-
0) (Note 4)
110
liB
TLOB_
TLOB_A, TLOB_B
=
TVp
Max
-
-
-
-
-
-
-
15
-
-
-
0) (Note 4)
TLOB_
TLOB_A, TLOB_B
Large-Signal Voltage Gain (Va
Min
Via
TLOB1, TLOB2
TLOB4
TLOB_A
TLOB_B
Input Bias Current (VCM
%
= TI ow to Th·II!1h [Note 3])
TLOB_M
=
Unit
13
100 pF
ELECTRICAL CHARACTERISTICS (V CC
Input Offset Current (VCM
Max
TVp
100 pF
Rise Time (See Figure 1)
Overshoot Factor
Vin = 20 mV, RL
Max
± 10 V, RL~2.0 k)
Output Voltage Swing (Peak-to-Peak)
(RL~10 k)
(RL~2.0 k)
-
-
24
20
-
Va
NOTES (continuedl:
3. Tlow = -55°C for Tl081M, Tl082M, Tl084M
= O°C for Tl081C, Tl081AC, Tl081 BC
Tl082C, TlOB2AC, Tl082BC
Tl084C, TlOB4AC, TlOB4BC
Thigh =
=
-
-
-
-
TVp
Max
mV
-
20
20
7.5
5.0
-
-
-
-
-
50
-
-
-
10
7.0
15
25
-
-
24
20
-
20
-
Unit
-
nA
5.0
3.0
nA
VlmV
AVOL
TLOB_
TLOB_A, TLOB_B
9.0
15
Min
-
-
V
-
-
-
+ 125°C for Tl081M, TlOB2M, Tl084M
+ 70°C for Tl081 C, Tl081AC, Tl081 BC
Tl082C, TlOB2AC, TlOB2BC
TlOB4C, TlOB4AC, Tl084BC
4. Input Bias currents of JFET input Op Amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To
maintain junction temperature as close to ambient temperature as possible, pulse techniques must be used during test.
TEST CIRCUITS
FIGURE 1 -
UNITY GAIN VOLTAGE
FOLLOWER
FIGURE 2 -
INVERTING GAIN OF 10
AMPLIFIER
10 k
1.0 k
>"""_-0
>-................- 0 Va
RL
=
2.0 k
CL
=
100 pF
Va
CL
MOTOROLA LINEAR/INTERFACE DEV)CES
2-337
=
100 pF
EI
TL081, TL082, TL084
FIGURE 4 - OUTPUT VOLTAGE SWING
versus FREQUENCY
FIGURE 3 - INPUT BIAS CURRENT
versus TEMPERATURE
«
.s
....
10
F= VCCNEE
II II!IIIII II
+15V
VCCNEE
i
II]lU
~ 1.0
,11111
:::>
u
~
z
~01
o
-50 -25
0
25
50
75
TA, AMBIENT TEMPERATURE lOCI
100
125
'"z
6.
>
/
6
o
0.2
0.4
0.7 1.0
2.0
RL, LOAD RESISTANCE Ikill
4.0
7.0 10
~
20
2.0
1.8
,/RL
=
"'RL
=
o
5.0
10
15
VCC, IVEEI, SUPPLY VOLTAGE I± VI
VCCNEE
11.6
10k
2.0 k
i
1.4
~
u
1.2
= ±
20
15 V
r- "-
~ 1.0
~
.... 15
o~
V
/'
FIGURE 8 - SUPPLY CURRENT PER AMPLIFIER
versus TEMPERATURE
~
VC&vEE =
15 V
See Figure 2
~
//
10
6
>
'"z
25
V
....:::>
1=
FIGURE 7 - OUTPUT VOLTAGE SWING
versus TEMPERATURE
~
/'
20
~
o
I:
\;-
/
~
'"~
>
_
= 25°C
z
/'
0.1
10M
! 2.0 k
;; 30
20
10
RL
r-TA
C.
TA = 25°C
See Figure 2
5o V '/
6 5.0
1.0M
FIGURE 6 - OUTPUT VOLTAGE SWING
versus SUPPLY VOLTAGE
VC~NEIE = ~ 15 ~
rr---
10 k
100 k
f, FREQUENCY IHzl
1.Ok
40
c.
~ 30
i'
I11111
100
FIGURE 5 - OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE
~
:::>
1\
illill
0.01
~
UII
RL = 2.0k
TA = 25°C
See Figure 2
!ttl
....
~
~
1111
":~15V
~ 0.8
~ 0.6
10
- --
r-
~0.4
6
> 5.0
f--50
-25
0
25
50
75
TA, AMBIENTTEMPERATURE I'CI
100
0.2
o
125
-so
-25
0
25
SO
75
TA, AMBIENT TEMPERATURE I'CI
MOTOROLA LINEAR/INTERFACE DEVICES
2-338
100
125
TL081, TL082, TL084
FIGURE 10 - LARGE-5IGNAL VOLTAGE GAIN
versus TEMPERATURE
FIGURE 9 - LARGE·SIGNAL VOLTAGE GAIN AND
PHASE SHIFT versus FREQUENCY
1000
VCCNEE
RL
TA
1--1-
.........
..........
~
r-...
........
10
100
I
~
'" '" ,
Il" t;:
:;:
~ain
Phase Shift
1.0
= ± 15 V
= 2.0k I--= 25"(;
45°~
'"r-...
1.0 k
10 k 100 k
t, FREQUENCY 1Hz)
900 if
'\.
:>
~
100
z
I-
~
~
'"
~>
..:. 10
~
180'
1.0
-so
10 M
AGURE 11 - NORMALIZED SLEW RATE
versus TEMPERATURE
-25
a 25 50 75
TA, AMBIENT TEMPERATURE I'C)
~
~
iJj
~ 1.00
i
125
JJ~~~AV == 10UJdt
1.10
1.05
100
FIGURE 12 - EQUIVALENT INPUT NOISE VOLTAGE
versus FREQUENCY
1.15
~
± 15V=
+10V=
2.0k _
135'
'" ,\
1.0 M
VCcNEE
Vo
RL
r--
0.95
~ 0.90
-- to-
RS
TA
I\..
r-- r-.
= loon
= 25'C
-
~
.............
0.85
-50
-25
a
25
50
75
TA, AMBIENT TEMPERATURE I'C)
100
0.05 0.1
125
0.5 1.0
t, FREQUENCY 1kHz)
FIGURE 13 - TOTAL HARMONIC DISTORTION
versus FREQUENCY
~
0.5
1.0
~E~§;IE!~~!I~!!!!II
~
f-VCCNEE =
f--- AV =
::~",. . 0.1 §E
Vo
50! 0.05 t=
TA
Q
i§
±15V
1.0
6.0 VIRMS)
25'C
~ !!!!~II~IIIII!I!!!1
0.005
o
F 0.01
0.001 ~.L-'---'--L:':.L.LLll~---'----'--'--'....u..LU...--I.-'--'-.J..-'-.L.U""
0.1
0.5 1.0
5.0
10
50
100
t, FREQUENCY 1kHz)
MOTOROLA LINEAR/INTERFACE DEVICES
2-339
5.0 10
50 100
II
TL081, TL082, TL084
REPRESENTATIVE CIRCUIT SCHEMATIC
(Each Amplifier)
Output
II
~----------~------~----1-------~~~----~--+----'----~VCC
2.0 k
J3
~---r--~~-r------1----+-r------~Q9
Offset
Null
(TlOSl
only)
L-~--~~~+-~--~------~---4----------~~~~~-r----~~-+I-OVEE
Bias Circuitry I
Common to All'
Amplifiers
TYPICAL APPLICATIONS
FIGURE 14 - OUTPUT CURRENT TO VOLTAGE TRANSFORMATION
FOR A D-TO-A CONVERTER
VCC = 5.0 V
Settling time to within Y2 lSB (± 19.5 mY) is approximately
4.0 ,.. from the time all bits are switched.
13
14
MSBAl 5
A2 6
A3 7
A4 S
Rl
"The value of C may be selected to minimize overshoot
and ringing (C = 68 pF).
f--<>---'V\r--~-'" Vref
15
R2
'" VCC= 15V
A5 9
A610
A711
lSB AS 12
Theoretical Vo
_ ~
Vo - Rl (RO)
[~~
~ ~ ~ ~ A7 AS]
2 + 4 + 8 +16+32+64+128+256
Adjust Vref. Rl or RO so that Vo with all digital inputs at
high level is equal to 9.961 volts.
Vref = 2.0 Vdc
Rl = R2=1.01dl.
RO=5.01dl.
2.0 V
[1 1 1 1 1 1
1
1]
Vo = "i:Oi( (5.0 k) 2+4+8+16+32+64+ 12S + 256
C·
= 10 V
[~::]
= 9.961 V
MOTOROLA LINEAR/INTERFACE DEVICES
2-340
TL081, TL082, TL084
FIGURE 15 -
POSITIVE PEAK DETECTOR
'-----"-" V out
v,
R~>-_ _ _ _ _ _ _~
FIGURE 16 - LONG INTERVAL RC TIMER
*Polycarbonate or
Polystyrene Capacitor
FIGURE 17 -
ISOLATING LARGE CAPACITIVE LOADS
R2
5.1 k
Rl
R4
R6
Clear
Run
I
~-----------.------~
R5
*Polycarbonate or
Polystyrene Capacitor
• Overshoot < 10%
• ts = 10/loS
• When driving large CL. the Vout slew rate is determined by CL
and lout(max)'
Time (t) = R4 Cfn (VRNR - Vl). R3 = R4. R5 = 0.1 R6
If Rl = R2: t = 0.693 R4C
Design Example: 100 Second Timer
VR=10V
C=1.0p.F
R3=R4=144M
R6 = 20 k
R5 = 2.0 k
Rl = R2 = 1.0 k
FIGURE 18 -
CL
o.5p.F
6.V
tit
0.02
6.~u = ~~ '" 0:5 VI/loS = 0.04 VI/loS (with CL shown)
VOLTAGE CONTROLLED CURRENT SOURCE
R3
R5
> .....-'w\r-.....--o lout
R4
If Rl through R4 »
R5 then lout =
V·
ifs
MOTOROLA LINEAR/INTERFACE DEVICES
2-341
II
MOTOROLA LINEAR/INTERFACE DEVICES
2-342
Power Circuits
In Brief ...
In most electronic systems some form of voltage regulation is required. Yesterday the task of voltage regulator design was tediously accomplished with discrete
devices, and the results were quite often complex and
costly. Today with bipolar monolithic regulators, this
task has been reduced considerably. The designer now
has a wide choice of fixed, low Vdiff, adjustable, and
tracking series-type regulators.
These devices incorporate many built-in protection
features making them virtually immune to the catastrophic failures encountered in older discrete designs.
The Switching Power Supply continues to increase
in popularity and is one of the fastest growing markets
in the world of power conversion. They offer the
designer several important advantages over that of linear series-pass regulators. These advantages include
significant advancements in the areas of size and
weight reduction, efficiency, and the ability to perform
voltage step-up and voltage-inverting. Motorola offers
an ever increasing diverse portfolio of full featured
switching regulator control circuits which meet the
needs of today's modern compact electronic
equipment.
Selector Guide
Linear Voltage Regulators. . . . . . ..
Switching Regulators ............
Special Power Controllers. . . . . . ..
Power Supervisory ...............
3-2
3-7
3-9
3-10
Alphanumeric Listing .............. 3-13
Related Application Notes .......... 3-14
Data Sheets ....................... 3-15
11
II
Power Circuits
Linear Voltage Regulators
Fixed Output. . . . . . . . . . . . . . . . . . . . . . . . ..
Adjustable Output. . . . . . . . . . . . . . . . . . . . . ..
Special. .............................
Switching Regulators
Single-Ended Controllers. . . . . . . . . . . . . . . . ..
Double-Ended Controllers . . . . . . . . . . . . . . . ..
Special Power Supply Controllers
High Performance Dual Current-Mode . . . . . . . . .
Universal Microprocessor ..................
Control IC for Line-Isolated Free
Running Flyback Converter. . . . . . . . . . . . . ..
Power Supervisory
Overvoltage "Crowbar" Sensing Circuit ........
Over-Under Voltage Protection Circuit .........
Undervol!age Sensing Circuit . . . . . . . . . . . .. ..
Microprocessor Voltage Regulator
and Supervisory Circuit .................
Series Switch Transient Protection Circuit. . . . . ..
Linear Voltage Regulators
Fixed Output
These low-cost monolithic circuits provide positive and/or
negative regulation at currents from 100 mA to 3.0 A. They
are ideal for on-card regulation employing current limiting and
thermal shutdown. Low Vdiff devices are offered for battery
powered systems.
Although designed primarily as fixed voltage regulators,
these devices can be used with extemal components to obtain adjustable voltages and currents.
Fixed-Voltage, 3-Terminal Regulators for Positive or Negative Polarity Power Supplies
Vout
Volts
5
10
Davice
Device
Negative Output
Yin
MIniMax
LM2931-5.0
-
5.6/40
MC78L05C
MC79L05C
6.7/30
Tol.t
Volts
'mA
Max
Positive Output
±0.5
100
±0.25
Z, T
P,G
30
50
Z, T
150
60
P,G
500
MC78M05C
MC79M05C
7/35
100
100
1500
LM109
LM309
-
±0.35
MC7805*
-
8.0/35
±0.25
MC7805B#
-
8/35
MC7805C
MC7905C
7/35
±0.2
MC7805A*
-
7.5/35
MC7805AC
MC7905AC
±0.25
LMl40-5*
-
±0.2
LMl40A-5*
-
±0.25
LM340-5
±0.2
LM340A-5
TL780-05C
±0.1
±0.2
1.0
5.6/40
±0.25
= -400 to + 12S'C
50
60
6.7/30
LM209
±0.25
30
200
Case
Suffix
MC79LOSAC
-
±0.4
il.Votil.T
mVrc
Typ
MC78L05AC
LM2931A-5.0
#TJ
-
Regload
mV
Regllne
mV
3000
MC78T05C
MC78TOSAC
-
tOutput Voltage Tolerance for Worst Case
100
K,H
0.6
K
1.0
T
K, T
10
50
0.6
K
100
K, T
50
50
K
10
25
50
50
10
25
K, T
7.0/35
5.0
25
0.06
KC
7.3/35
25
30
0.1
K, T
10
25
*TJ = -55°to +150'"C
MOTOROLA LINEAR/INTERFACE DEVICES
3-2
G,T
1.1
1.0
50
7.0/35
1.0
(continued)
3-2
3-5
3-6
3-7
3-8
3-9
3-9
3-9
3-10
3-10
3-11
3-11
3-12
Fixed Output Voltage Regulators (continued)
Vout
Volts
Tol.t
Volts
10
mA
Max
Device
Positive Output
5
±0.4
3000
LM123*
±0.25
LM323
±0.2
LM123A
-
LM223A
-
LM223
LM323A
5.2
6
±0.26
1500
-
4VC)l4T
mVI"C
Typ
Case
Suffix
7.5/20
25
100
0.1
K
T
K
15
50
105
-
T
MC7905.2C
7.2/35
105
1.0
T
500
MC7BM06C
-
8/35
100
120
1.0
T
MC7B06*
-
9/35
60
100
0.7
K
MC7B06B#
-
120
120
MC7806C
MC7906C
8/35
MC7B06AC
-
B.6/35
11
100
T
LM140-6*
B/35
60
60
K
LM340-6
-
±O.B
±0.4
MC78LOBAC
-
500
MC78M08C
-
1500
MC7808*
100
MC7BLOBC
MC7B08B#
T
K, T
K, T
9.7/30
200
80
-
P,G
1.0
G, T
175
-
10/35
100
160
11.5/35
80
100
160
160
K
T
MC7808C
MC7908C
10.5/35
±0.3
MC780BAC
-
10.6/35
13
100
T
±0.4
LM14O-8*
10.5/35
80
80
K
10.4/35
35
30
13.7/35
250
100
-
P, G
LM34O-8
3000
±1.2
MC79L12C
MC79L12AC
500
MC78M12C
MC79M12C
1500
MC7812*
r----
~
±0.5
r----±0.5
±0.5
-40 0 to
+ 125°C
14/35
100
240
1.0
G,T
15.5/35
120
120
1.5
K
MC7812B#
240
240
MC7812C
MC7912C
14.5/35
MC7812A*
-
14.8/35
MC7812AC
-
18
50
14.5/35
120
120
-
18
32
-
120
120
18
32
MC78T12C
MC78T12AC
tOutput Voltage Tolerance for Worst Case
K
100
LM340-12
TL7BO-12C
3000
T
K, T
LM140A-12*
LM340A-12
±0.24
0.16
-
LM140-12*
r---±0.6
K, T
K, T
MC78L12C
r---±0.5
±0.6
MC78T08C
-
MC78L12AC
100
±0.6
=
Ragload
mV
1500
±0.3
#TJ
Raglina
mV
±0.3
±0.24
12
Yin
MinIMax
±0.35
±0.3
B
Device
Negative Output
5.0
14.5/35
45
30
18
25
*TJ "'" _55 0 to + 150°C
MOTOROLA LINEAR/INTERFACE DEVICES
3-3
T
1.5
K
K, T
0.15
KC
0.24
K, T
(continued)
E
Fixed Output Voltage Regulators (continuedl
Vout
Volts
15
Tol.t
Volts
10
mA
Max
±1.5
100
r--
II
Device
Negative Output
Yin
MiniMax
Regline
mV
Regload
mV
16.7/35
300
150
-
P, G
17/35
100
300
1.0
G,T
18.5/35
150
150
1.8
300
300
22
50
K
100
K, T
K
MC78L15C
MC79115C
MC78115AC
MC79L15A
500
MC78M15C
MC79M15C
1500
MC7815*
±0.7S
MC7815B#
MC7815C
±0.6
-
MC7815AC
17.9/35
LM140-15*
150
150
-
22
35
±0.75
LM340-15
150
LM340A-15
-
150
±0.6
22
35
TL780-15C
3000
±1.8
MC78T15C
MC78T15AC
100
±0.9
MC78L18C
MC79L18C
MC78L18AC
MC79L18AC
15
60
0.18
KC
17.5/40
55
30
0.3
K, T
22
25
19.7/35
325
170
-
P
500
MC78M18C
-
20/35
100
360
1.0
MC7818*
-
22/35
180
180
2.3
MC7818B#
-
360
360
31
100
T
180
180
T
10
400
1.1
G,T
350
200
-
P
MC7818C
MC7918C
MC7818AC
-
LM340-18
±0.9
20
±1.0
500
24
±2.4
100
±1.2
MC78M20C
22/40
MC78L24C
MC79L24C
MC78L24AC
MC79L24AC
500
MC78M24C
1500
MC7824*
-
MC7824B#
-
MC7824C
MC7924C
MC7824AC
-
±1.2
LM340-24
-
tOutputVoltage Tolerance for Worst Case
25.7/40
G,T
K
T
21/35
-
±1.0
+126"C
K, T
1500
±0.7
= _40° to
K
K, T
LM140A-15*
17.5/35
Case
Suffix
T
17.5/35
±0.6
±0.6
#TJ
MC7915C
MC7815A*
±0.75
±0.3
18
-
-
±0.75
.1VO/.1T
mVrc
Typ
Device
Positive Output
K, T
300
26/40
100
480
1.2
28/40
240
240
3.0
480
480
36
100
T
240
240
T
*TJ"" -55" to +150"C
MOTOROLA LINEAR/INTERFACE DEVICES
3-4
K
T
K, T
27/40
27.3/40
G, T
Adjustable Output Voltage
Regulators
ing a wide range of output voltages for industrial and
communications applications. The three-terminal devices require only two external resistors to set the output voltage.
Motorola offers a broad line of adjustable output voltage regulators with a variety of output current capabilities. Adjustable voltage regulators provide users the
capability of stocking a single integrated circuit provid-
Positive Output Regulators
10
mA
Max
Device
Suffix
Min
Max
Min
Max
VinVout
Oifferential
Volts
Min
100
LM317L
H,Z
1.2
37
5.0
40
3.0
Vout
Volts
Yin
Volts
LM217L#
LM117L*
LM2931C
150
MC1723
T
3.0
24
3.16
CP
2.0
37
9.5
I--
40
3.0
=
Internally
Limited
LM317
Load
0.04
0.5
0.006
125
0.02
0.3
0.004
150
TJ
"C
Max
Case
29,79
0.003
1.25
-
1.0
2.1
1.5
r--
L
1500 LM317
TC
2S"C
=
Line
TC Vout
Typ
%J"C
=
TA
2S"C
0.15
1.0
-
125
0.1
0.3
0.003
150
0.003
314D
646
603C
0.002
I-LM317M
=
Watts
Max
'---0.6
CG
I--G
I--CL
500
Regulation
%Vout@
TA
2S"C
Max
Po
0.003
175
632
0.002
T
1.2
37
5.0
40
3.0
Internally
Limited
0.04
0.5
0.0056
125
221A
T
1.2
37
5.0
40
3.0
Internally
0.04
0.5
0.006
125
221A
Limited
H,K
79,1
0.004
LM217#
LMl17*
3000 LM350
T
LM350
K
1.2
33
5.0
36
3.0
Internally
Limited
LM250#
0.02
0.3
0.003
150
0.03
0.5
0.008
125
0,01
0.3
0.0057
150
221A
1
LM150*
0.0051
Negative Output Regulators
Regulation
% Vout@
TA
25"C
Max
10
mA
Max
Device
Suffix
Min
Max
Min
Max
VinVout
Oifferential
Volts
Min
Line
500
LM337M
T
-1.2
-37
5.0
40
3.0
Internally
Limited
0.04
T
-1.2
-37
5.0
40
3.0
Internally
Vout
Volts
1500 LM337
LM337
Yin
Volts
Po
Watts
Max
= I TC =
TA
25"C
25"C
=
=
Load
TC Vout
Typ
%l"C
TJ
"C
Max
Case
1.0
0.0048
125
221A
0.04
1.0
0.0048
125
221A
0.02
0.5
0.0034
150
Limited
H,K
LM237#
79,1
LM137*
0.0031
MOTOROLA LINEAR/INTERFACE DEVICES
3-5
II
Special Regulators
Floating Voltage and Current Regulators
Designed for laboratory type power supplies. Voltage is limited only by the break down voltage of associated,
external, series-pass transistors.
Vout
Volts
10
I
.
Min
Max
I•
0
mA
Max
Vaux
Device
Suffix
Min
L
21
MC1466
I
I
.1VrefN ref
%
Po
Volts
Max
Watts
Max
Line
30
0.75
0.015
I
I
Load
.l.IL/LL
%
Max
TC Vout
%I'C
Typ
Case
0.015
0.2
0.001
632
*Dependent on characteristics of external series-pass elements.
Dual ± 15 V Tracking Regulators
Internally, the device is set for ± 15 V, but an external adjustment can change both outputs simultaneously, from
B.O V to 20 V.
TC
Vout
Volts
Yin
Volts
10
Min
Max
rnA
Max
14.8
15.2
±100
%I"C
Po
Suffix
Watts
Max
Regline
mV
Regload
mV
(Tlow to
Thigh)
Typ
MC1468
G
0.8
10
10
3.0
L
1.0
MC1568
G
0.8
L
1.0
Min
Max
Device
17
30
TA
"C
o to
+ 75
Cas.
~
632
-5510 +125
-
603C
632
Microprocessor Voltage Regulator/Supervisory Circuit
A 5.0 V fixed output with many monitoring functions required in microprocessor-based systems.
Vout, Vref
Volts
Vin
Min
Max
ISINK
mA
Max
4.75
5.25
100
7.0
2.47
2.73
2.0
5.0
Volts
Min
Max
Regline
mVMax
Regload
rnVMax
Device
Suffix
40
40
50
MC34160
P
20
30
MC33160
MOTOROLA LINEAR/INTERFACE DEVICES
3-6
TA
"C
o to
+70
-40 to +85
Case
648C
Switching Regulators
duty cycle are independently adjustable. Most of these
devices also include one or two on-chip error amplifiers
for voltage or current error signal feedback.
Used as a control circuit in PWM, push-pull, bridge and
series type Switch mode supplies, the devices include a
voltage reference, oscillator, pUlse-width modulator,
phase splitter and output drive sections. Frequency and
Single-Ended Controllers
II
These single-ended voltage- and current-mode controllers are designed for use in buck, boost, flyback, and
forward converters. They are cost effective in applications that range from 0.1 to 200 watts power output.
VCC
Volts
10
rnA
Max
Min
Max
VII
Operating
Mode
Ref.
Volts
Max
Osc.
Freq. (kHz)
Device
Suffix
250
7.0
40
V
5.0 ± 5.0%
200
MC34060
P
TA
·C
o to
+70
L
500
5.0±1.5%
MC35060
L
MC34060A
D
D
632
o to
+70
1000
4.2
12
I
1.25±2.0%
300
L
MC34129
D
646
751A
-55to +125
632
646
o to
+70
P
MC33129
D
5.0±2.0%
30
500
UC3642A
D
UC2642A
5.0±1.0%
D
+70
J
5.0±2.0%
UC3843A
5.0:±1.0%
UC2843A
D
626
o to
+70
J
2.5
40
V
1.24±5.2%#
100
JLA78S40
PC
MC34063
626
o to
+ 70
620
-40 to +85
648
DM
-55 to +125
620
Pl
o to
+70
Pl
1.25±2.0%
MC34063A
U
D
D
693
o to
+70
# Tolerance applies over the specified operating temperature range.
MOTOROLA LINEAR/INTERFACE DEVICES
3-7
U
751
626
-40 to +85
751
-55 to + 125
693
Pl
MC35063A
626
-55 to + 125
Pl
MC33063A
626
693
-40 to +85
U
MC35063
648
PV
U
MC33063
751A
693
DC
1.25 ± 5.6%#
751A
626
-25 to +85
N
1500
751A
693
N
D
751A
626
-25 to +85
N
8.2
751A
646
o to
N
11
751A
646
-40 to +85
P
11.5
751A
-40 to +85
P
MC35060A
646
-55 to +125
P
MC33060A
Case
626
II
Double-Ended Controllers
These double-ended voltage-mode controllers are designed for use in push-pull, half-bridge, and full-bridge converters. They are cost effective in applications that range from 100 to 2000 watts power output.
Vee
Volts
Max
Min
Max
VII
Operating
Mode
Volts
Max
Osc.
Freq. (kHzl
Device
Suffix
500
7.0
40
V
5.0±5.0%#
200
TL494
CN
10
mA
Ref.
TA
'C
o to
+70
CJ
iN
5.0±1.5%
±500
8.0
5.1 ±2.0%
300
400
TL594
SG3525A
CN
620
o to
+70
-25 to +85
MJ
-55 to + 125
o to
+70
J
SG2525A
5.1±1.0%
N
J
-5510 + 125
SG3527A
N
010 +70
SG2527A
N
5.0±2.0%
350
J
-5510 +125
SG3526
N
010 +125"
SG2526
N
*Junction Temperature Range
#-Tolerance applies over the specified operating temperature range.
MOTOROLA LINEAR/INTERFACE DEVICES
3-8
J
648
648
707
726
-2510 +150'
J
SG1526
648
620
SG1527A
J
5.0±1.0%
648
620
-2510 +85
J
±200
620
620
SG1525A
J
5.1±1.0%
648
620
-2510 +85
J
5.1±2.0%
648
-55to +125
IN
N
648
620
-25 to +85
IJ
MJ
Case
707
726
-55 to + 150'
Special Power Supply Controllers
High Performance Dual Current-Mode Controllers
Optimized for off-line AC-to-DC power supplies and DC-to-DC converters in the fly back topology. Applications include
desktop computers, peripherals, televisions, games, and various consumer appliances.
VCC
Volts
10
mA
Max
Min
±1000
11
Max
VII
Operating
Mode
Ref.
Volts
Max
Osc.
Freq. (kHz)
Device
Suffix
15.5
I
5.0±2.0%
500
MC34065
OW
TA
·C
o to
+70
P
648
OW
MC33065
Case
751G
-40 to +85
P
751G
648
Universal Microprocessor Power Supply Controller
TCA5600 -
T A = - 40° to
+ 75°C,
Case 707
A versatile power supply control circuit for microprocessor-based systems which is mainly intended for automotive
applications and battery powered instruments. The device provides a power-on RESET delay and a watchdog feature
for orderly microprocessor operation.
VCC
Volts
Output
Regulated
Outputs
mA
E2pROM Programmable Output:
24 Volts (Write Mode)
5.0 Volts (Read Mode)
150 peak
Fixed Linear Output:
5.0 Volts
Key
Supervisory
Features
Min
Max
Ref.
Volts
6.0
35
2.5±3.2%
Current
MPU Reset and
Watchdog Circuit
10 to external buffer
transistor
Control IC for Line-Isolated Free Running Flyback Converter
Regulates and monitors the switching transistor in power supplies based on the free oscillating flyback converter
principle. Provides excellent Switchmode performance in Hi-Fi equipment, active loudspeakers, as well as applications
in TV receivers and video recorders.
VCC
Volts
10
mA
Max
Min
Max
VII
Operating
Mode
Ref.
Volts
Max
Osc.
Freq.lkHz)
Device
±1500
12.3
20
V
4.2±5.0%
100
TDA4601
TA
Suffix
B
MOTOROLA LINEAR/INTERFACE DEVICES
3-9
°c
Case
-15to +85
762
707
II
II
Power Supervisory
A variety of Power Supervisory Circuits are offered. Overvoltage sensing circuits which drive "crowbar" SCR's are
provided in several configurations from a low cost three-terminal version to 8-pin devices which provide pin-programmable trip-voltages or additional features such as an indicator output drive and remote activation capability. An overunder-voltage protection circuit is also offered.
Overvoltage "Crowbar" Sensing Circuit
MC3523U - T A = - 55° to + 125°C. Case 693
MC3423P1,U - TA = 0° to +70°C, Case 626, 693
This device can protect sensitive circuitry from power supply
transients or regulator failure
when used with an external
"Crowbar" SCR. The device senses voltage and compares it to
an internal 2.6 V reference. Overvoltage trip is adjustable by
means of an external resistive
voltage divider. A minimum
duration before trip is programmable with an external capacitor.
Other features include a 300 mA
high current output for driving
the gate of a "Crowbar" SCR, an
open-collector indicator output
and remote activation capability.
4
Current
Source
Sense'
8
Output
3
Sense 2 5
6
Remote
Activation
Indicator
Output
Over-Under Voltage Protection Circuit
MC3425P1 -
TA
= 0° to + 70°C, Case 626
The MC3425 is a power supply supervisory circuit containing all the necessary functions required to monitor overand under-voltage fault conditions. This device features dedicated over- and under-voltage
sensing channels with independently programmable time
delays. The over-voltage channel has a high current Drive
Output for use in conjunction
with an external SCR "Crowbar" for shutdown. The undervoltage channel input comparator has hysteresis which is
externally programmable, and
an open-collector output for
fault indication.
Vce
8
O.V.
Sense
+
o--+-~+
3
U.V.
Sense
+
4
5
Input Section
2I
U.V.O.V.
DLY DLY
Output Section
MOTOROLA LINEAR/INTERFACE DEVICES
3-10
Undervoltage Sensing Circuit
MC34064P-5, 0-5 MC33064P-5, 0-5 -
TA
TA
O'to + 70'C, Case 29, 751
- 40' to + 85'C, Case 29, 751
The MC34064 is an undervoltage sensing circuit specifically
designed for use as a reset con-
troller in microprocessor-based
systems. It offers the designer an
economical solution for low voltage detection with a single external resistor. The MC34064 features a trimmed-in-package
bandgap reference, and a comparator with precise thresholds
and built-in hysteresis to prevent
erratic reset operation. The open
collector reset output is capable
of sinking in excess of 10 mA,
and operation is guaranteed
down to 1.0 volt input with low
standby cu rrent. These devices
are packaged in 3-pin TO-92 and
8-pin surface mount packages.
Appl ications i ncl ude di rect
monitoring of the 5.0 volt MPU/
logic power supply used in appli-
Inpurt+___________,Reset
II
1 (1)
Sink Only
Positive True Logic
Pin numbers adjacent to terminals are for the 3 pin TO-92 package.
Pin numbers in parenthesis are for the 0 suffix 50-8 package.
ance, automotive, consumer,
and industrial equipment.
Microprocessor Voltage Regulator and Supervisory Circuit
MC34160P MC33160P -
TA
TA
0° to + 70'C, Case 648C
- 40° to + 85'C, Case 648C
The MC34160 Series is a voltage regulator and supervisory
circuit containing many of the
necessary monitoring functions
required in microprocessor
based systems. It is specifically
designed for appliance and
industrial applications offering
the designer a cost effective
solution with minimal external
components. These integrated
circuits feature a 5.0 V, 100 mA
Vee
Regu latar Output
O+-..--+-+-."
14
~------~------~
11
Reference Output
Chip Disable
~----~~--~----~
16
regulator with short circuit current limiting, pinned out 2.6 V
bandgap reference, low voltage
reset comparator, power warning comparator with programmable hysteresis, and an
uncommitted comparator ideally suited for microprocessor
line synchronization.
Additional features include a
chip disable input for low
standby current, and internal
thermal shut-down for over
temperature protection.
These devices are contained
in a 16 pin dual-in-line heat tab
plastic package for improved
thermal conduction.
Power Warning
Hysteresis Adjust
o+---...,----------<~
Noninverting Input
0+---...,-------,----,
Comparator Output
MOTOROLA LINEAR/INTERFACE DEVICES
3-11
Series Switch Transient Protection Circuit
MC3397T -
II
TJ
=
-40° to
+ 125°C, Case 221A
This device acts as a saturated series pass element with
a very low voltage drop for load
currents in excess of 750 mAo In
the event of an over voltage
condition (;;,17.5 V typically) or
high voltage transient of either
positive or negative polarity,
the MC3397T instantaneously
switches to an open circuit
(OFF) state, interrupting power
to the load and protecting the
load during this potentially
destructive condition. The
device will immediately recover
to an ON state when supply
voltages fall within the normal
operating range.
Input
Output*
I
50 l!
.=..
12 V
+ 0. 047 /-lF
Cin
+
200 V
Co
Ground
NOTE,
*Depending on Load Current and Transient Duration, an Output Capacitor (CO) of
sufficient value may be used to hold up Output Voltage during the Transient, and
absorb Turn-off Delay Voltage Overshoot
MOTOROLA LINEAR/INTERFACE DEVICES
3-12
4.7 j.LF
50 V
POWER CIRCUITS
Linear Voltage Regulators
Device
LM109
LM117
LM117L
LM123,A
LM137
LM140,A
LM150
LM209
LM217
LM217L
LM223,A
LM237
LM250
LM309
LM317
LM317L
LM317M
LM323,A
LM337
LM337M
LM340,A
LM350
LM2931 Series
MC1466L
MC1468
MC1568
MC1723,C
MC7800 Series
MC78LOO,A Series
MC78MOO Series
MC78TOO Series
MC7900 Series
MC79LOO,A Series
MC79MOO Series
MC33160
MC34160
TL780
Function
Positive Voltage Regulator ............................................
3-Terminal Adjustable Positive Voltage Regulator ........................
Low-Current 3-Terminal Adjustable Positive Voltage Regulator ............
3-Ampere, 5 Volt Positive Voltage Regulator ............................
3-Terminal Adjustable Negative Voltage Regulator .......................
Three-Terminal Positive Fixed Voltage Regulators .......................
3-Terminal Adjustable Positive Voltage Regulator ........................
Positive Voltage Regulator ............................................
3-Terminal Adjustable Positive Voltage Regulator ........................
Low-Current 3-Terminal Adjustable Positive Voltage Regulator ............
3-Ampere, 5 Volt Positive Voltage Regulator ............................
3-Terminal Adjustable Negative Voltage Regulator .......................
3-Terminal Adjustable Positive Voltage Regulator ........................
Positive Voltage Regulator ............................................
3-Terminal Adjustable Positive Voltage Regulator ........................
Low-Current 3-Terminal Adjustable Positive Voltage Regulator ............
Medium-Current 3-Terminal Adjustable Positive Voltage Regulator .........
3-Ampere, 5 Volt Positive Voltage Regulator ............................
3-Terminal Adjustable Negative Voltage Regulator .......................
Medium-Current 3-Terminal Adjustable Negative Voltage Regulator ........
Three-Terminal Positive Fixed Voltage Regulators .......................
3-Terminal Adjustable Positive Voltage Regulator ........................
Low Dropout Voltage Regulators ......................................
Voltage and Current Regulator ........................................
Dual ± 15-Volt Tracking Regulator ....................................
Dual ± 15-Volt Regulator ............................................
Adjustable Positive or Negative Voltage Regulator .......................
3-Terminal Positive Voltage Regulators .................................
Positive Voltage Regulators ...........................................
Positive Voltage Regulator ............................................
Three-Ampere Positive Voltage Regulators .............................
Three-Terminal Negative Fixed Voltage Regulators ......................
Three-Terminal Negative Fixed Voltage Regulators ......................
Three-Terminal Negative Fixed Voltage Regulators .......................
Microprocessor Voltage Regulator and Supervisory Circuit ................
Microprocessor Voltage Regulator and Supervisory Circuit ................
Three-Terminal Positive Voltage Regulators .............................
Page
3-15
3-20
3-28
3-36
3-42
3-49
3-65
3-15
3-20
3-28
3-36
3-42
3-65
3-15
3-20
3-28
3-73
3-36
3-42
3-81
3-49
3-65
3-88
3-95
3-105
3-105
3-111
3-132
3-145
3-151
3-159
3-168
3-177
3-182
3-271
3-271
3-334
Switching Regulators
Device
MC33060A
MC33063
MC33063A
MC33129
MC34060
MC34060A
MC34063
MC34063A
MC34129
MC35060
MC35060A
MC35063
MC35063A
Function
Switch mode Pulse Width Modulation Control Circuits ................... .
DC-to-DC Converter Control Circuits .................................. .
DC-to-DC Converter Control Circuits .................................. .
High Performance Current Mode Controller ............................ .
Switch mode Pulse Width Modulation Control Circuits ................... .
Switch mode Pulse Width Modulation Control Circuits ................... .
DC-to-DC Converter Control Circuits .................................. .
DC-to-DC Converter Control Circuits .................................. .
High Performance Current Mode Controller ............................ .
Switch mode Pulse Width Modulation Control Circuits ................... .
Switch mode Pulse Width Modulation Control Circuits ................... .
DC-to-DC Converter Control Circuits .................................. .
DC-to-DC Converter Control Circuits .................................. .
MOTOROLA LINEAR/INTERFACE DEVICES
3-13
Page
3-197
3-227
3-233
3-258
3-185
3-197
3-227
3-233
3-258
3-185
3-197
3-227
3-233
II
•
Switching Regulators (continued)
Device
SG1525A
SG1526
SG1527A
SG2525A
SG2526
SG2527A
SG3525A
SG3526
SG3527A
TL494
TL594
UC2842A
UC2843A
UC3842A
UC3843A
"A78S40
Function
Pulse Width Modulator Control Circuits ................................
Pulse Width Modulation Control Circuits ...............................
Pulse Width Modulator Control Circuits ................................
Pulse Width Modulator Control Circuits ................................
Pulse Width Modulation Control Circuits ...............................
Pulse Width Modulator Control Circuits ................................
Pulse Width Modulator Control Circuits ................................
Pulse Width Modulation Control Circuits ...............................
Pulse Width Modulator Control Circuits ................................
Switch mode Pulse Width Modulation Control Circuits ....................
Switch mode Pulse Width Modulation Control Circuits ....................
High Performance Current Mode Controller .............................
High Performance Current Mode Controller .............................
High Performance Current Mode Controller .............................
High Performance Current Mode Controller .............................
Universal Switching Regulator Subsystem ..............................
Page
3-279
3-286
3-279
3-279
3-286
3-279
3-279
3-286
3-279
3-312
3-323
3-340
3-340
3-340
3-340
3-353
Special Power Supply Controllers
Device
MC33065
MC34065
TCA5600
TDA4601,B
Function
High Performance Dual Channel Current Mode Controller .................
High Performance Dual Channel Current Mode Controller .................
Universal Microprocessor Power Supply Controller ......................
Flyback Converter Regulator Control Circuit .............................
Page
3-246
3-246
3-294
3-305
Power Supervisory
Device
MC3397T
MC3423
MC3425
MC3523
MC33160
MC34061,A
MC34062
MC34064
MC34160
MC35062
Function
Page
Transient Suppressor ........................................ See Chapter 10
Overvoltage Sensing Circuit .......................................... 3-117
Power Supply SupervisoryIOver-Under-Voltage Protection Circuit .......... 3-124
Overvoltage Sensing Circuit .......................................... 3-117
Microprocessor Voltage Regulator and Supervisory Circuit ................ 3-271
Three-Terminal Programmable Overvoltage Sensing Circuit ............... 3-209
Pin-Programmable Overvoltage Sensing Circuit ......................... 3-216
Pin-Programmable Overvoltage Sensing Circuit ......................... 3-242
Microprocessor Voltage Regulator and Supervisory Circuit ................ 3-271
Pin-Programmable Overvoltage Sensing Circuit ......................... 3-216
RELATED APPLICATION NOTES
Application
Note
AN703
AN920A
AN778
AN954
AN976
AN983
ANE002
Related
Title
Device
Designing Digitally-Controlled Power Supplies ............. MC1466, MC1723
Theory and Applications of the MC34063 and JLA78S40
Switching Regulator Control Circuits .................... MC34063, "A78S40
Mounting Techniques for Power Semiconductors ........... LM317, LM337,
MC7800, MC78MOO,
MC7900, MC79MOO
A Unique Converter Configuration ........................ MC34063
A New High Performance Current-Mode Controller Teams
Up with Current Sensing Power MOSFETs ............... MC34129
A Simplified Power Supply Design Using the TL494
Control Circuit ....................................... TL494
130 W Ringing Choice Power Supply Using TDA4601 ....... TDA4601,B
MOTOROLA LINEAR/INTERFACE DEVICES
3-14
®
LM109
LM209
LM309
MOTOROL.A
POSITIVE
II
VOLTAGE REGULATOR
MONOLITHIC POSITIVE THREE-TERMINAL
FIXED VOLTAGE REGULATOR
A versatile positive fixed + 5.0-volt regulator designed for easy
application as on on-card, local voltage regulator for digital logic
systems. Current limiting and thermal shutdown are provided to
make the units extremely rugged.
In most applications only one external component, a capacitor,
is required in conjunction with the LM109 Series devices. Even
this component may be omitted if the power-supply filter is not
located an appreciable distance from the regulator.
K SUFFIX
METAL PACKAGE
CASE 1-03
• High Maximum Output Current - Over 1.0 Ampere in
TO-204AA type Package - Over 200 mA in TO-205AD type
Package.
Pins 1 and 2 electrically isolated from case. Case is
third electrical connection.
I
• Minimum External Components Required
• Internal Short-Circuit Protection
• Internal Thermal Overload Protection
• Excellent Line and Load Transient Rejection
• Designed for Use with Popular MDTL and MTTL Logic
Input uou:ut
1
0
3
Ground
(Bottom View)
3
2
0
H SUFFIX
METAL PACKAGE
CASE 79-05
1
ORDERING INFORMATION
Tested Operating
Device
CIRCUIT SCHEMATIC
.....-oINPUT
r---._----<~---~~---._-
Temperature Range
LM109H
TJ
Package
~
-55'Cta +150"<:
Metal Can
Metal Power
LM109K
TJ
~
-55'Cta + 150'C
LM209H
TJ
~
-25'Cta +150'C
Metal Can
LM209K
TJ
~
-25'Cta +150'C
Metal Power
LM309H
TJ
~
O'Cta +125'C
Metal Can
LM309K
TJ
~
O'Cta +125'C
Metal Power
TYPICAL APPLICATION
0.3
FIXED 5.0 V REGULATOR
OUTPUT
Input
C •
I
1
O.iM*
LM109
1
5V
Output
I
C2
Ground
6.3V
• Required if regulator is located an appreciable
distance from power supply filter.
L---~--~--~--~--~--~--~---*~GND
Although no output capacitor is needed for
stabilitv. it does improve transient response.
MOTOROLA LINEAR/INTERFACE DEVICES
3-15
LM109, LM209, LM309
MAXIMUM RATINGS
Symbol
Value
Unit
Input Voltage
Vin
35
Vdc
Power Dissipation
PD
Junction Temperature Range
TJ
Rating
Internally Limited
oC
LM109
LM209
LM309
•
-55to +150
-2510 +150
010 +125
Storage Temperat!-,re Range
T stg
-65 to +150
oC
TS
300
oC
Lead Temperature
(soldering, t = 60 s)
ELECTRICAL CHARACTERISTICS
LM109/LM2091
Characteristic
Output Voltage (TJ
==
Symbol
+25 0 C)
Va
Input Regulation (T J =- +25 0 C)
Reglin.
Min
Typ
4.7
_.
LM30s2
Max
Min
Typ
Max
Unit
5.05
5.3
4.8
5.05
5.2
Vdc
4.0
50
4.0
50
mV
50
100
50
100
-
7.0~Vin ~25 V
mV
Regload
~ + 25"C)
Case 1-03 5.0 rnA.;:;: 10::S:;: 1.5A
Case 79-05 5.0 rnA , ;;;; 10 "" O.5A
Load Regulation (TJ
20
Output Voltage Range
4.6
Va
50
-
5.4
20
50
4.75
5.25
Vdc
10
mAde
7.0 V ~Vin ~25 V
5.0mA
o
100
100 k
1.0 k
10k
t, FREQUENCY 1Hz)
150
--...
..........
r---......
~
=
TA"-550C-
r-...... -......
I
- ...:::::::: t:--
5.0
1.0 M
4.5 V
10
FIGURE 7 - PEAK OUTPUT CURRENT IH PACKAGE)
TA" +25 0C
~
TA" +125 0C
TA "+150 oC-
I
100
-.. --...
!
3.0
:'!
I-
~
~
a
2.0
I
l-
ii:
I-
I/.
::>
o
If
---- --- -....
r--
--....
'1:\
/
...-'
~
c:: t--...
35
40
TA
J-55 0C
45
-
TA"~250C
~
..........
~ .......
TA~+1250C/~ :": t'-...
TA ~ -5rC
T1 "+150 oC /
TA~+250C
-
r-- -:::: f:::::--. TA" +125 0C
~
IL"200mA
- ~VT" 3.0 ~p,p
'"
~
~
TA"+150OC-
VO"4.5V
5.0
--
80
-....
:---
20
25
30
Vin, INPUT VOLTAGE IV)
15
FIGURE B - RIPPLE REJECTION
4.0
E 1.0
125
0
10
_
...... ........
1.0
Vo
10- 2
-
--r--.... ~
2.0
::>
IL~500mA
-....
'f
~
./
::>
:= 10- 1
~
75
100
TA, AMBIENT TEMPERATURE 10C)
v"'-
~ 3.0
I-
./
I-
......
FIGURE 6 - PEAK OUTPUT CURRENT IK PACKAGE)
::>
~
,.
........
50
4.0
c:
\
......
I
0.1
0.1
-
10
I
15
20
30
25
Vin, INPUT VOLTAGE IV)
35
40
20
10
45
100
MOTOROLA LINEAR/INTERFACE DEVICES
3-17
1.0 k
10 k
t, FREQUENCY 1Hz)
100 k
1.0M
II
LM109, LM209, LM309
TYPICAL CHARACTERISTICS (continued)
FIGURE 10 - DROPOUT CHARACTERISTIC
(K PACKAGE)
FIGURE 9 - DROPOUT VOLTAGE
6.0
2.5
:;
IL = 1.0 A
:::; 2.0
~
w
'"
;::
~
'"
;o
~ 1.5
~
>-
~TA
>~
>=>
1.0
=>
o
r
0.5
~
4.0
-50
-15
+15
+50
+75 +100 +115
TJ, JUNCTION TEMPERATURE lOCI
I=+15 0C
ff/
o
TA = 1500C_/,
~ 4.5 f--TA=+115 0 C
,.:.
~
TA = -550C-
./
> 5.0
C
>-
5.5
YII
5.0
+150 +175
FIGURE 11 - OUTPUT VOLTAGE
1//
Ill; 'I
6.0
8.0
7.0
Vin. INPUT VOLTAGE IVI
9.0
FIGURE 12 - OUTPUT NOISE VOLTAGE
5.1
1.0
~ 5.1
I'-.. .......
w
;'"
CL = 0
o
;: 5.0
~
>=>
o
~ 4.9
4.8
0.01
-75
-50
-15
+15
+50
+75 +100 +115
TJ, JUNCTION TEMPERATURE lOCI
10
+150 +175
100
FIGURE 13 - QUIESCENT CURRENT
6.5
E
>-
1
>-
6.0
I
TA =J250C
>- 5.5
~
'-'
ffl
:;
~
FIGURE 14 - QUIESCENT CURRENT
IL=100mA
~
"=>'-'
5.0
4.5
5.0
~
...-:
TA--550C
,.
TA
'--
10 k
6.5
I
~
1.0 k
f, FREQUENCY IHzI
6.0
z
w
-
""
i3
>- 5.5
~
-1125 0C
~
5.0
!P
I
TA +150oC
4.5
10
15
Vin. INPUT VOLTAGE IVI
20
25
-75
-50
-25
0
+25
+50
+75 +100
TJ. JUNCTION TEMPERATURE (OCI
MOTOROLA LINEAR/INTERFACE DEVICES
3-18
+125
+150 +175
LM109, LM209, LM309
TYPICAL APPLICATIONS
FIGURE 15 - ADJUSTABLE OUTPUT REGULATOR
-.--5;; 10
:E=
Typ
Max
Unil
0.01
0.04
'ioN
-
5.0
0.1
25
0.5
mV
%VO
0.07
-
0.03
0.07
'Io1W
Min
-
Imax
Va" 5.0V
Va", 5.0 V
Thermal Regulation ITA = + 25°C)
20 rns Pulse
3
lAd'
-
50
100
-
50
100
~
1,2
~IAdj
-
0.2
5.0
-
0.2
5.0
~
3
Vref
1.25
1.30
1.20
1.25
1.30
V
1
Regline
-
0.02
0.05
-
0.02
0.07
%N
load Regulation (Note 3)
10 rnA os;: 10 os;: Imax
Va" 5.0 V
Va'" 5.0 V
2
Aegload
-
20
0.3
50
1.0
-
-
-
20
0.3
70
1.5
%VO
Temperature Stability (Tlow ~ T J ~ Thigh)
3
TS
-
0.7
-
-
0.7
-
%VO
Minimum Load Current to
Maintain Regulation (VI-Va
3
ILmin
-
3.5
5.0
-
3.5
10
3
Imax
1.5
0.5
2.2
0.8
-
-
1.5
0.5
2.2
0.8
-
0.25
-
0.15
-
0.4
0.07
-
-
-
Adjustment Pin Current
Adjustment Pin Current Change
2.5 V " VI-Va" 40 V
10 rnA os;; IL ".. Imax.
Po ".. Pmax
Reference Voltage (Note 4)
1.20
3.0 V " VI-Va" 40 V
10 rnA """ 10
:!S;
Imax. Po .,,;;; Pmax
Line Regulation (Note 3)
3.0 V " VI-Va" 40 V
=
A
VI-YO ~ 40 V, Po " Pm ax, TA ~ 25°C
K and T Packages
H Package
RMS Noise, % of Va
~
-
N
4
RR
~
10 V, I
~
120 Hz
Without CAdj
CAd'
= 10 I'F
Long-Term Stability, TJ
=
-
_.
-
0.003
-
0.4
0.07
-
0.003
-
-
66
65
80
-
66
65
80
-
0.3
1.0
-
0.3
1.0
-
12
2.3
15
3.0
-
15
3.0
-
-
12
2.3
5.0
%VO
25°C, 10Hz" I" 10kHz
Ripple Rejection, Va
INote 5)
TA
mA
40 V)
Maximum Output Current
VI-Va ~ 15 V, Po ~ Pmax
K and T Packages
H Package
TA
mV
~
Thigh INote 61
3
S
-
ReJC
dB
-
25°C for Endpoint Measurements
Thermal Resistance Junction to Case
H Package
K Package
T Package
NOTES: 111 Tlow
(2) Imax
~
-55°C lor LM117 Thigh
~ -25°C for LM217
= O°C lor LM317
=
°elW
~
+ 150"C lor LM117
= + 150"C lor LM217
+ 125°C lor LM317
1.5 A for K and T Packages
= 0.5 A for H Package
Pmax = 20 W for K Package
= 20 W for T Package
= 2.0 W for H Package
(3) Load and line regulation are specified at constant
junction temperature. Changes in Va due to heating
%/1.0 k
Hrs.
-
-
effects must be taken into account separately. Pulse
testing with low duty cycle is used.
(4) Selected devices with tightened tolerance reference
voltage available.
(5) CADJ, when used, is connected between the
adjustment pin and ground.
(6) Since Long-Term Stability cannot be measured on
each device before shipment, this specification is an
engineering estimate of average stability from lot to lot.
MOTOROLA LINEAR/INTERFACE DEVICES
3-21
II
LM117, LM217, LM317
SCHEMATIC DIAGRAM
r--1~--~--------'----'--'--1-------------------------1~------,---~-,--oVjn
II
0.1
~~--~---4--4-~~~~~~~~~~----+-------~-4--------------~---4----0Vout
'----------------------------------0
Adjust
FIGURE 1 - LINE REGULATION AND alAdj/LiNE TEST CIRCUIT
Vee
VOH--VOL
Line Regulation (%/V) = - - - - - - - X 100
VOL
JL
JLIH
VIL
~OH
V out
Vin
VOL
LM117
Adjust
Rl
el n
/r-
0.1 I'F
IAdj
240
1%
RL
+
Co ;;[;; II'F
R2
t%
.. Pulse Testing Required:
1" Dutv Cvcl.
is suggested.
~
-
MOTOROLA LINEAR/INTERFACE DEVICES
3-22
LM117, LM217, LM317
FIGURE 2 - LOAD REGULATION AND alAdj/LOAD TEST CIRCUIT
Load Regulation (mV) ""
L.oad Regulation
("Vol
Va
(min. Load) -
V out
LM117
Va
(max. L.oad)
Va (min. Load) - Va (max. Load) X 100 I
;;z
,.vO (min. L.oad)
U
Va (min. Load)
Va (max. Load)
IL
II
AL
Adjust
O.IItF
Al
(max. Load)
240
1%
AL
(min. Load)
IAdj
A2
1%
*'Pulle Testing Required:
1 % Duty Cycle is suggested.
FIGURE 3 - STANDARD TEST CIRCUIT
V out
LM117
240
1%
1 ItF
0.1 "F
To Calculate R2:
Va = 'SET R2 + , .250 V
Assume 'SET'" 5.25 rnA
Pulse Tasting Required:
1 % Dutv Cycle is suggested.
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
24V-"
.
14V----V
V out
Vin
Va'" 10
LM117
f=120Hz
Adjust
240
Al
1%
D,"
~~ 1N4002
AL
+
Cin ;:[:; O.IItF
Co -::
,,+
1.65 K
R2
1%
-'-
1 ItF
CADJ
;~.:::
10 J.l.F
,
I
" 0,
Discharges CADJ If Output IS Shorted to Ground.
MOTOROLA LINEAR/INTERFACE DEVICES
3-23
Vo
v
II
LM117, LM217, LM317
FIGURE 6 - CURRENT LIMIT
FIGURE 5 - LOAD REGULATION
l
0.4
'"z
«
0.2
w
-
ri
..'"
w
':; -0.2
>
0
~Ig
-0.4
-0.6
6
:;;
I--- TJ • 25°C
IL' 0.5 A I---
--
r-. I-- t--.
IL·1.5A ..........
I-- I-.VI·15V
Vo 10V
i
~~
t--~~
'"
I---- ' TJ =150oC ....
I
"-~
........
TJ' -55°C
~ ....
"'R.: ..:::...-
-0.8
-1.0
-15
-50
-25
0
25
50
75
100
125
TJ. JUNCTION TEMPERATURE lOCI
o
150
o
10
20
30
VI - VO.INPUT - OUTPUT VOLTAGE OIFFERENTIAL IVdcl
FIGURE 7 - ADJUSTMENT PIN CURRENT
«
~
70~--t----4---4---+---+-----~---~'--~'--~--~
I:
l-
f-_---._.t-r-----__-l.r---'"_-_-I, __
..... -_..
~
':;
55
0
".,....,.;-
.~
~r--
r---_
~
V
I
-25
25
50
75
100
TJ . JUNCTION TEMPERATURE lOCI
115
>°1.0
-75
150
~
,.--
~ 1.240
-
~
-
1'---..1
>
~
~200rnA
---- r---....
IL = 20 rnA ~
H
100
18
1~
4.5
TJ ' -55°C
;;; 4.0
E
........
-
, , / TJ '250C ___
~ 35
:: 3.0
~
.............
,~
=>
~ 2.5
--
_ 2.0
w
:; 1.5
o
~~
0.5 I
i:; 1.230
>"
1.220
-75
T
IL • 500 rnA
5.0
~
I--
I---
~ :::::: r-:-_ I--
8
-25
.--
FIGURE 10 - MINIMUM OPERATING CURRENT
FIGURE 9 - TEMPERATURE STABILITY
~ 1.250
-50
---
)--
V
TJ • JUNCTION TEMPERATURE lOCI
1.260
'>
-.
.......... f......
=>
~
z
35~~--~---L--~--~~--~--~__-L~
-50
1.5
l-
40\--~~--t--__t---+---+---t---t---t--+---I
-75
'"-- ~
~
Il ·I.0A
-r---------- -
2.0
~
: . 45 1----t--7'q---+--+-- ----~---__I--__I-----+--__t----___1
~H-
,---
IL '15 A
)----- ~--.
>
~ 50~--~-4~--~~-4.---+--.~---t---t--~--~
.1
\--- --6V O '100rnV--2.5
«
z
~
1
0
_+--+-.-t
0:
~
~ "iii'
...."....-::
~
..,.. T
1
J =150 oC -
V
_Cal.a
-50
-25
25
50
75
100
TJ • JUNCTION TEMPERATURE lOCI
40
FIGURE 8 - DROPOUT VOLTAGE
2: 3.0
1
-
fh'
125
o
150
o
10
20
VI - Vo. INPUT - OUTPUT
MOTOROLA LINEAR/INTERFACE DEVICES
3-24
30
40
VOlTAGE~DIFFERENTJAL
(Vdcl
LM117, LM217, LM317
FIGURE 11 - RIPPLE REJECTION versus OUTPUT VOLTAGE
100
FIGURE 12 - RIPPLE REJECTION versus OUTPUT CURRENT
10~F
,I
CAOJ
120
~
is
80
'r-..,
g
:--- r-
60
WITHOUT CADJ
9
80
~
40
f---
"'
~=2F
f------
20
f------
o
w
S
V, -V =5V
'L=50 rnA
f'" 120 Hz
f---
~'
60
it
a:
~'
___
40
-
20
r---
V, = 15 V
Vo '10V
f '120 Hz
TJ • 25°C
o
15
20
25
VO' OUTPUT VOLTAGE IVI
10
30
FIGURE 14 - OUTPUT IMPEDANCE
10 I
[
80
/
z
~
~ • 500 mA
/ / -.........
0
60
r--..
V
::l
"'-..
w
it
40
"':g
20
1·15V
"
WITHOUT CAOJ
I
I
IK
10K
-
~
100
V, '15V
Vo 'IOV
'L "'500 rnA
TJ = 25°C
1==
r---
°E
- f---
I
I
WITHOUT CADJ
[
CADJ • 10 I"F
"'-I
2
I
'-.1
lOOK
CAOJ
lO"F
[
[
o
10
~J:2~~~
\
['\ \
\ '"
10
'0' OUTPUT CURRENT (AI
FIGURE 13 - RIPPLE REJECTION versus FREQUENCY
~
II
I-
WITHOUT CAOJ
0,1
0.01
35
CAOJ = 10.F
I III
o
100
~
-
;;J
~
w
100
o
;;J
~
~
!
1M
3
10
10M
100
IK
10K
lOOK
1M
f. FREQUENCY IHzl
f. FREQUENCY (Hzl
FIGURE 16 - LOAD TRANSIENT RESPONSE
FIGURE 15 - LINE TRANSIENT RESPONSE
3
5
5
0
2
I
1/\
Cl
,\..
w
-1.5
~~
~5
0
I
1/
2
[A
3
IV \
.;~
I
.5
Ii'
.0
-J
0.5
.5
t'
10
~
I
CL = I "F; CAQJ ' lO"F
!
1
.I j
\
CL = O;WITHOUT CAOJ -
~~ 1.0
:> w
1 JlF; CADJ " 10pF
j
VO' 10 V
~ =50mA
J '" 2SOC
«
'"
=
f---
30
0
40
-',
J
1\ l ;-- CL : O;WIT~OU1: CAOJ
\/
I
t--
V,' 15 V
VQ = 10 V
~L '50mA
J. 25 OC
r--t----:;~
,I
./
'i
[\,,1
Ll
10
>
25 IlF, CADJ > 10 Il F).
Diode DI prevents Co from discharging thru the I.C.
during an input short circuit. Diode D2 protects against
capacitor CADJ discharging through the I.C. during an
output short circuit. The combination of diodes D1 and
D2 prevents CADJ from discharging through the I.C.
during an input short circuit.
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
Vin
LM111
I
I
v out
!
\
Vref
Adjust
--
+
", 1
V out
lAdj
Vref
= 1.25 V
FIGURE 18 - VOLTAGE REGULATOR WITH
PROTECTION DIODES
l'PROG
R2
TYPICAL
1
0,
,N4002
=LOAD REGULATION
The LMI17 is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance, the
programming resistor (RI) should be connected as close
to the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be
returned near the load ground to provide remote ground
sensing and improve load regulation.
Adjust
0------4>--<1>--'
MOTOROLA LINEAR/INTERFACE DEVICES
3-2(i
LM117, LM217, LM317
FIGURE 19 - "LABORATORY" POWER SUPPLY WITH AOJUSTABLE
CURRENT LIMIT AND OUTPUT VOLTAGE
-
lN4002
Y,N _
V out 1
.....-0---<1
Vin2
RSC
10
V out 2
32 to 40 V
0,
lN4001
lN4001
Cu"ent
1K
II'F
°5
240
lN4001
Adjust 2
I
Tantalum
5K
°2
Limit
Adjust
03
°1
2N3822
-=OUTPUT RANGE:
°4
-10V
0" Va" 25 V
0" '0" 1.2 A
°2
Diodes 0, and 02 and transistor 02 ar. added to allow adjustment
of output voltage to 0 volts.
2N5640
06 protects both LM 117'5 dUring an input short circu it.
-10 V
FIGURE 21 - 5 V ELECTRONIC SHUT DOWN REGULATOR
FIGURE 20 - ADJUSTABLE CURRENT LIMITER
Vo
_ _ '0
V out
0,
1 '·
O I'F
lN4001
*.
To provide current limiting of 10
100
to the system ground, the source of
the F ET must be tied to a negative
voltage below -1.25 V.
A
2
;;;,~
°2
Adjust
cr-------'
lN4001
TTL
720
Control
1 K
2N5640
lOSS
Vref
R, :: lOmax + lOSS
Minimum V out = 1.25 V
Vo< BVOSS + 1.25 V+ VSS
ILmin - lOSS < '0 < 1.5 A
As shown 0
< '0 <
0, protects the device during an input short circuit.
1 A
FIGURE 23 - CURRENT REGULATOR
FIGURE 22 - SLOW TURN·ON REGULATOR
V out
LM117
lN4001
Adjust
6-----Jr-~~;1'
Adjust
~
I
V out
I
~
vref
lout;;: (R1)
10lolF
R,
+
IAdj
'" 1.25V
R,
10 mA ~ loutE; 1.5 A
MOTOROLA LINEAR/INTERFACE DEVICES
3-27
'out
II
LMl17L
LM217L
LM317L
MOTOROLA
•
Specifications and Applications
Information
THREE·TERMINAL ADJUSTABLE
OUTPUT POSmVE VOLTAGE REGULATORS
The LM117U217U317L are adjustable 3-terminal positive voltage regulators capable of supplying in excess of 100 rnA over an
output voltage range of 1.2 V to 37 V. These voltage regulators
are exceptionally easy to use and require only two external resistors to set the output voltage. Further. they employ internal
current limiting. thermal shutdown and safe area compensation.
making them essentially blow-out proof.
The LM117L series serves a wide variety of applications including local. on card regulation. This device can also be used to
make a programmable output regulator. or by connecting a fixed
resistor between the adjustment and output. the LM117L series
can be used as a precision current regulator.
•
•
•
•
•
•
Output Current in Excess of 100 rnA
Output Adjustable Between 1.2 V and 37 V
Internal Thermal Overload Protection
Internal Short-Circuit Current Limiting
Output Transistor Safe-Area Compensation
Floating Operation for High Voltage Applications
LOW·CURRENT
THREE·TERMINAL
ADJUSTABLE POSITIVE
VOLTAGE REGULATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Z SUFFIX
PLASTIC PACKAGE
CASE 29-04
PIN 1. ADJUST
2. VOUT
3. Y,N
"2
H SUFFIX
METAL PACKAGE
CASE 79-05
PIN 1. Y,N
2. ADJUST
3. VOUT
• Standard 3-Lead Transistor Packages
• Eliminates Stocking Many Fixed Voltages
21
V out
LM117L
.
'Adil
f" ..
240
Adjust
;;: ~
0::- C'n
r-
0.1 "F
A
* '"" Cin
** -
OUTPUT
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SOP-B'
STANDARD APPLICATION
"r-
,$i.0
1
0
0
3
CASE
IS
v'n
3
Co
1 "F
~2
=-
(Bottom View)
PIN 1. Y,N
2. VOUT
3. VOUT
4. ADJUST
5. N.C.
6. VOUT
7. VOUT
8. N.C.
SOP-B is an internally modified 80-8 Package. Pins
2, 3, 6 and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
increases power dissipation capability when
appropriately mounted on a printed circuit board.
SOP-8 conforms to all external dimensions of the
standard 80-8 Package.
I, required if regulator is located an appreciable distance from power
IUpply filter.
Co i. not needed for stability. however it does improve transient
respon...
.R2
V out = 1.25 V (1 + - ) + 'Adj R2
R1
Sine. IAdj is controlled to I... than 100.IJ.A. the error .ssociated with this
term I, ne,lIgible In molt applications
ORDERING INFORMATION
Tested Operating
Device
Temperatura Range
TJ
~
-55°C 10 +150°C
Metal Can
LM217LH
TJ
~
-25°C 10 +150°C
Metal Can
SOP-S
LM317LD
LM317LH
TJ
~
O°Clo +125°C
additional tests. Contact your local Motorola sales office for information.
LM317LBZ#
MOTOROLA LINEAR/INTERFACE DEVICES
3-2B
Metal Can
Plastic
LM317LZ
#Automotive temperature range selections are available with special test conditions and
Package
LM117LH
TJ
~
-40°C 10 +125"C
Plastic
LM117L, LM217L, LM317L
MAXIMUM RATINGS
Rating
Input-Output Voltage Differential
Symbol
Value
Unit
VI-VO
40
Vdc
Po
Internally Limited
TJ
-55to +150
-25to +150
Oto +125
°C
Totg
-65 to +150
°C
Power Dissipation
Operating Junction Temperature Range
LMl17L
LM217L
LM317L
Storage Temperature Range
ELECTRICAL CHARACTERISTICS
(VI
-
Vo
= 50 V-
10
= 40 mAo
TJ
= TI ow to Th''A'h [see Note lJ'
Charac:taristic
Flgura
Imax and Pmax per Note 2' unless otherwise specified)
LM117LJ217L
LM317L
Symbol
Min
Typ
Max
Min
Typ.
Max
Unit
Line Regulation (Note 3)
TA = 25°C, 3.0 V'" VI-VO '" 40 V
1
Regline
-
0_01
0.02
-
0.01
0_04
"IoN
Load Regulation (Note 3), TA = 25°C
5.0 mA '" 10 '" Imax - LMl17LJ217L
10 mA '" 10 '" Imax - LM317L
Vo '" 5_0 V
VO" 5.0 V
2
Regload
5.0
0.1
15
0.3
5_0
0.1
25
0.5
mV
%VO
3
lAd'
-
Adjustment Pin Current Change
2.5 V '" VI- Vo '" 40 V, Po '" Pmax
5.0 mA '" 10 '" Imax- LMl17LJ217L
10 mA '" 10 '" Imax- LM317L
1,2
.l.lAdj
-
Reference Voltage (Note 4)
3.0 V '" VI-VO '" 40 V, Po '" Pmax
5.0 mA '" 10 '" Imax - LMl17LJ217L
10 mA '" 10 '" Imax - LM317L
3
Vref
Line Regulation (Note 3)
3.0 V'" VI-VO '" 40 V
1
Regline
Load Regulation (Note 3)
5.0 mA '" 10 '" Imax - LMl17LJ217L
10 mA '" 10 '" Imax - LM317L
VO'" 5.0 V
VO" 5.0 V
2
Regload
Temperature Stability (Tlow '" TJ '" Thiah)
3
TS
Minimum Load Current to Maintain
Regulation (VI- Vo = 40 V)
3
ILmin
Maximum Output Current
VI-VO '" 20 V, Po '" Pmax, H Package
VI- Vo '" 6.25 V, Po '" Pmax, Z Package
VI-VO = 40 V, PO'" Pmax, TA = 25°C
H Package
Z Package
3
Imax
RMS Noise, % of Vo
TA = 25°C, 10 Hz '" f '" 10 kHz
-
N
Ripple Rejection (Note 5)
Vo = 1.25 V, f = 120 Hz
CAOJ = 10 IJ.F Vo = 10_0 V
4
RR
Long Term Stability, TJ = Thigh (Note 6)
TA = 25°C for Endpoint Measurements
3
Thermal Resistance Junction to Case
H Package
Z Package
-
Thermal Resistance Junction to Air
H Package
Z Package
-
Adjustment Pin Current
NOTES:
(1) Tlow
=
-55°C for LM117L
-25°C for LM217L
O°C for LM317l
(2) Imax = 100 mA
Pmax = 2 W for H Package
= 625 mW for Z Package
1.20
-
-
50
100
0.2
5_0
-
1.25
1.30
1.20
0.02
0.05
20
0.3
50
1.0
50
100
p.A
0_2
5.0
p.A
1.25
1.30
V
-
0.02
0.07
"IoN
-
-
20
0.3
70
1.5
mV
%VO
-
0_7
-
%VO
3.5
10
mA
-
0.7
-
3.5
5.0
100
100
200
200
-
100
100
200
200
-
50
20
0.003
-
50
20
-
-
60
mA
-
0.003
-
80
80
-
0.3
1.0
%VO
dB
S
66
80
-
80
-
0.3
1.0
-
%11.0 k
Hrs_
0c/w
RruC
RruA
-
40
-
185
-
-
-
-
-
40
83
-
-
-
185
160
-
-
-
°C/W
(3) Load and line regulation are specified at constant junction temperature.
Thigh:::: +150°C for LM117l
:::: +150oC for LM217l
:::: +125°C for LM317L
Changes in
Va
due to heating effects must be taken into account
separately. Pulse testing with low duty cvcle is used.
(4) Selected devices with tightened tolerance reference voltage available.
(5) CADJ. when used, is connected between the adjustment pin and
ground.
(5) Since Long Term St.ability cannot be measured on each device before
shipment. this specification is an engineering estimate of average
st8Dil.tv from lot to lot.
MOTOROLA LINEAR/INTERFACE DEVICES
3-29
II
LM117L, LM217L, LM317L
SCHEMATIC DIAGRAM
VIN
t
1
3DO
300
•
~
(1
~~"
J3k
300
~
~
I
'l~ 6.8 V
'l~ 6.8 V
360
18k
>-
t
-1=
r130
6.3 V
...
~
180
't
~
't
t
~
I
180
rrn
t.-.-.
~ 8.~:~
~
200 k
8
'L 1400
)--. 5.1
~
2k
I
k
H
~
~
10
pF
6 k
2.5
60
10
PF'i
~
Vo UT
2.4 k
12.8 k
50
Ad just
FIGURE 1 - LINE REGULATION AND "IAdj/LINE TEST CIRCUIT
Vee
.JL
VOH--VOl
Line Regulation (%/VI "" - - - X 100
VOL
~IH
~OH
VIL
V out
Vin
VOL
LM117L
Adjust
Rl
el n ;:" 0.1
"f
240
1%
RL
+
Co/r:; I"F
IAdj
R2
1%
* Pul .. Testing Required:
1" DutY Cycle
I, suggested.
=-
MOTOROLA LINEAR/INTERFACE DEVICES
3-30
LM117L, LM217L, LM317L
FIGURE 2 - LOAO REGULATION AND AIAdj/LOAD TEST CIRCUIT
Vo
Load Regulation (mV) ...
(min. Load) -
Vo
(max. Load)
Lo.d R_'ot'on "WOI _ Vo Imln. Lo.d) - Vo Imo.. Lo.d) X 100--' ,VO Imln. Lo.d)
Vo (min. L.oad)
YOU!
V,'
U
Vo (max. LOld)
IL
LM117L
240
Adjust
RL
1"
Imln. Lo.d)
D.' /IF
*
Pul .. Tatting Required:
1" Duty Cycle I, suggested.
FIGURE 3 - STANDARD TEST CIRCUIT
Vout
LM117L
240
1"
D.' /IF
Vo
To Calculate R2:
Vo = ISET R2 + 1.250 V
Allum. ISET ... 5.26 mA
Pul .. Testing Required:
,,, Duty CYcle 1. suggested.
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
14.30 V - "
.
4.30V-~-V
V out
Vln
Vo
LM117L
1-120 Hz
0,'
240
Adjust
R1
~~ 1N4oo2
1"
RL
+
Cln ::: ..;. D.1/1F
Co:::" 1/1F
R2
-
'.65 K
1"
1+
CAOJ
;*~
10 "F
I
I
.
-
0, Dlscharuel I,.;J\OJ If Output" Shorted to Ground .
• ·CAOJ provides an AC Ground to the Adjust Pin.
MOTOROLA LINEAR/INTERFACE DEVICES
3-31
= 1.2 5 V-
Vo
II
II
LM117L, LM217L, LM317L
FIGURE 6 - RIPPLE REJECTION
FIGURE 5 - LOAD REGULATION
~ 0.4
........
Vin~45V I _
~ 0.2
~
~
Vout =5V
'L-5t040mA_
/
o
t-
o
...
'-Vin=10V
Vout =5V
Il = 5to l00mA
>
~ -0. 4
g
~
10
8:
"':g
-0.6
---
r- r-- .....
~
~
!:i -0. 2
80
z
0
IL '" 40 mA
f---
t =120 Hz
Vo = 10 V
60 f---
Vin 114 to :4 V
~ -0.8
-1.0
50
-50
-25
25
50
15
100
TJ.JUNCTION TEMPERATURE 1°C)
125
-50
150
FIGURE 7 - CURRENT LIMIT
............
!;
~
=>
o
......
TJ = 150°C
o
~
"-
r-...
'I'-...
- 0.10
o
3D
40
10
20
VI- VO, INPUT - OUTPUT VOLTAGE DIFFERENTIALIVOLTSI
0.5
50
-50
I ::0
TJ '= 550C'--":,,,
TJ=250C--TJ = 150°C - - -
5
2.0
ffl
:5 1.5
'"
!P
1.
o ,-
O.5
['.....
........
............
'L=100mA
............
r--
r-...
-25
.......
25
50
15
100
TJ,JUNCTION TEMPERATURE 10C}
90
_
5-
_
150
"
125
150
100
4. 5
~ 2.
125
FIGURE 10 - RIPPLE REJECTION vorsus FREQUENCY
FIGURE 9 - MINIMUM OPERATING CURRENT
5.0
~ 4.0
100
, ."\.
"
o
15
-r-- - -;;;;;--
I'-..
........
0.20
'"
TJ=250C
~
-"
~
'" 0.30
....'"=>
50
FIGURE 8 - DROPOUT VOL TAGE
2.5
~OAO
25
TJ,JUNCTtoN TEMPERATURE (OC)
0.50
5
-25
r-
~ ~.....
n
....
V--
~
I
/'
/"
....
\
a
a
\
1\
a
a
10
10
20
30
40
Vl - Vo, INPUT - OUTPUT VOLTAGE OIFFERENTIALIVOLTSI
10
100
lK
MOTOROLA LINEAR/INTERFACE DEVICES
3-32
_
-
Va = 1.25V
\
10K
100 K
1m
t, FREQUENCY 1Hz!
I
lL=40mA
Vin'" 5V ±.1 Vpp
LM117L. LM217L. LM317L
FIGURE 11 - TEMPERATURE STABILITY
FIGURE 12 - ADJUSTMENT PIN CURRENT
1.260
80
l
i
:>
~ 1.250
'"
~
r
/
"
>
............
1/
240
~1.230
....
-...... ..........
v
_
65
f-f--
r-....
0::
--ll'100mA
.~
Vo ::Vref
'L~5mA
0
a<
5
~
40
~
~
'"
'"~
">
~
V
..,
1-::::""-
V
5
-25
25
.50
75
100
TJ, JUNCTION TEMPERATURE (OCI
125
150
-50
-25
-
-
I
125
150
.J
.1
Vin",4.25to41.25V
Bandwidth 100 Hz to 10 kHz
Vo '" Vref
0.2 r - - -
25
50
75
100
TJ, JUNCTION TEMPERATURE (OCI
FIGURE 14 - OUTPUT NOISE
'L ~40mA
:>
10
.3
w
w
-0.2
~ -0.4
~
.
--:; -:;::-
FIGURE 13 - LINE REGULATION
0.4
II
_---IL~10mA
5
ffi
"-
-50
w
I
Vi.' 6.25 V
VO=Vref
60
1.220
~
.~
I
_
z
Vin = 4.2 V
-
70
~
-0.6
6
~ -0. 8
'"<
~
-
..-/
w
'"<5z
..,......",.
8.0
>
6.0
I.--
....-
/'
V
V
/
4. 0
-1. 0
-50
-25
25
50
75
100
TJ, JUNCTION TEMPERATURE (OCI
125
150
-50
FIGURE 15 - LINE TRANSIENT RESPONSE
-25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (OCI
,...
/,J
l£ \
2
Cl = l.u F
1 t - - Cl '" 1 /-IF; CAOJ '" lO,uF
}
Vo
~
1/
1.25 V
1
A
Il~20mA
TJ·25 0C
2
I" C \ ~ 0
~~
l
I
--JI'
10
20
30
150
FIGURE 16 - LOAD TRANSIENT RESPONSE
3
iI\
"
125
.•/ ,
1\\ :1' ....
\/
-I
1
I
I
V, ~ 15 V
CL·0.3~F;CADJ·1O~F- VO '10V
r
,-'l
IV
/
~
40
250C
c--
I
\
10
t, TIME (~s)
t,
MOTOROLA LINEAR/INTERFACE DEVICES
3-33
-•
~l~10mA_
20
TIME
30
I"~
40
•
LM117L, LM217L, LM317L
APPLICATIONS INFORMATION
\.
BASIC CIRCUIT OPERATION
The LM 117L is a 3-terminal floating regulator. In
operation, the LM117L develops and maintains a nominal
1.25 volt reference (V ref) between its output and adjustment terminals. This reference voltage is converted to a
programming current (lPROG) by Rl (see Figure 13),
and this constant current flows through R2 to ground.
The regulated output voltage is given by:
EXTERNAL CAPACITORS
A 0.1 p.F disc or 1 p.F tantalum input bypass capacitor
(Cin) is recommended to reduce the sensitivity to input
line impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CADJ) prevents
ripple from being amplified as the output voltage is
increased. A 10 p.F capacitor should improve ripple
rejection about 15dB at 120 Hz in a 10 volt application.
Although the LMl17L is stable with no output capacitance, like any feedback circuit, certain values of external
capacitance can cause excessive ringing. An output capacitance (Co) in the form of a 1 p.F tantalum or 25 p.F
aluminum electrolytic capacitor on the output swamps
this effecfand insures stability.
Since the current from the adjustment terminal (lAdj)
represents an error term in the equation, the LMl17L was
designed to control IAdj to less than 100 p.A and keep it
constant. To do this, all quiescent operating current is
returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is
less than this minimum, the output voltage will rise.
Since the LMl17L is a floating regulator, it is only the
voltage differential across the circuit which is important
to performance, and operation at high voltages with
resPect to ground is possible.
PROTECTION DIODES
When external capacitors are used with an~ I.C. regulator it is sometimes necessary to add protection diodes to
prevent the capacitors from discharging through low
current points into the regulator.
Figure 14 shows the LMl17L with the recommended
protection diodes for output voltages in excess of 25 V or
high capacitance values (Co> 10 p.F, CADJ > 5 j.(F).
Diode 01 prevents Co from discharging thru the I.C.
during an input short circuit. Diode 02 protects against
capacitor CADJ discharging through the I.C. during an
output short circuit. The combination of diodes 01 and
02 prevents CADJ from discharging through the I.C.
during an input short circuit.
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
I
LM 117 L
-I
Vout
11--------<+"'--Rl
Vraf
Adjust
\
FIGURE 18 - VOLTAGE REGULATOR WITH
PROTECTION DIODES
llPROG
V out
R2
1
0,
V,fIf = 1.25 V TYPICAL
lN4002
LOAD REGULATION
The LMl17L is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance, the
programming resistor (R 1) should be connected as close
to the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be
returned near the load ground to provide remote ground
sensing and improve load regulation.
02
TCo
Adjust ¢-------4H.....-' lN4002
MOTOROLA LINEAR/INTERFACE DEVICES
3-34
LM117L, LM217L, LM317L
FIGURE 19 - ADJUSTABLE CURRENT LIMITER
FIGURE 20 - 5 V ELECTRONIC SHUTDOWN REGULATOR
II
Va _ ' a
12.5 k
V out
L -_ _ _ _ _ _
R2
01
1N914
500
"To provide current limiting of 10 to
the system ground, the source of the
current limiting diode must be tied
02
1N914
,. Vref
2
IDSS
1 OIlF
.
0--.....>---'
Adjust
~ MPS2222
to a negative voltage below -7.25 V.
A
I
120
TTL
720
Control
1 K
1N5314
Vref
Minimum V out = 1.25 V
R, = lOmax + lOSS
Va < POV + 1.25 V + VSS
ILmin - Ip < 10 < 100 rnA - Ip
As shown 0 < to < 95 mAo
D, protects the device durmg an Input short circuit.
FIGURE 22 - CURRENT REGULATOR
FIGURE 21 - SLOW TURN·ON REGULATOR
lout
1N4002
loutmax
10
:=
~F
loutmin
=
(Vref )
"""R"1
+, . ~ 1.~~
(~)
+
R, + R2
ad]
ladj
5mA< lout< 100mA
MOTOROLA LINEAR/INTERFACE DEVICES
3-35
~
V
1.25 V
- R, + R2
•
LM123, LM123A
lM223, LM223A
LM323, LM323A
MOTOROLA
Specifications and Applications
Information
3-AMPERE, 5 VOLT
POSITIVE
VOLTAGE REGULATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
POSITIVE VOLTAGE REGULATORS
The LM123.AlLM223.AlLM323.A are a family of monolithic integrated circuits which supply a fixed positive 5.0 volt output with
a load driving capability in excess of 3.0 amperes. These threeterminal regulators employ internal current limiting. thermal shutdown. and safe-area compensation. An improved series with
superior electrical characteristics and a 2% output voltage tolerance is available as A-suffix (LM123A1LM223A1LM323A) device
types.
These regulators are offered in a hermetic metal power package
in three operating temperature ranges. A O°C to + 125°C temperature range version is also available in a low cost plastic power
package.
Although designed primarily as a fixed voltage regulator. these
devices can be used with external components to obtain adjustable voltages and currents. This series of devices can be used
with a series pass transistor to supply up to 15 amperes at 5.0
volts.
K SUFFIX
METAL PACKAGE
CASE 1-03
PIN 1, INPUT
2, OUTPUT
CASE GROUND
(Bottom View)
• Output Current in Excess of 3.0 Amperes
• Available with 2% Output Voltage Tolerance
T SUFFIX
• No external Components Required
PLASTIC PACKAGE
CASE 221A-04
• Internal Thermal Overload Protection
• Internal Short-Circuit Current Limiting
• Output Transistor Safe-Area Compensation
• Thermal Regulation and Ripple Rejection Have Specified Limits
PIN 1. INPUT
2. GROUND
3. OUTPUT
MAXIMUM RATINGS
Rating
Input Voltage
Power Dissipation
Operating Junction Temperature
Range
Storage Temperature Range
Lead Temperature (Soldering. lOs)
LM123. A
LM223, A
LM323, A
Symbol
Value
Unit
Vin
20
Vdc
Po
TJ
Internallv Limited
Tstg
Tsolder
Device
LMI23K
LMI23AK
LM223K
LM223AK
LM323K
LM323AK
LM323T
LM323AT
Tolerance
6%
2%
6%
2%
4%
2%
4%
2%
to Pin 2)
STANDARD APPLICATION
-55 to +150
-25 to +150
Oto +150
°C
-65 to +125
300
°C
°C
In pu t B M 1 2 3 ' A Output
ORDERING INFORMATION
Output Voltage
(Heatsink surface connected
Tested Operating
Junction Temp. Renga
Package
-55 to +150°C
Metal Power
-25 to +150O C
Cin*
0.33
~F
CO"
A common ground is required between the
input and the output voltages. The input voltage must remain typically 2.5 V above the output voltage even during the low point on the
input ripple voltage.
* = Cin is required if regulator is located an
appreciable distance from power supply
filter. (See Applications Information for
o to +125°C
Plastic Power
details.)
** = Co is not needed for stability; however.
it does improve transient response.
MOTOROLA LINEAR/INTERFACE DEVICES
3-36
LM123, LM123A, LM223, LM223A, LM323, LM323A
ELECTRICAL CHARACTERISTICS (TJ = Tlow to Thigh [see Note 11 unless otherwise specified.)
LMl 23A/LM223A/ LM323A
Typ
Me.
Min
LM123/LM223
Min
Typ
M ..
Min
LM323
Typ
Me.
5.1
4.7
5.0
5.3
4.8
5.0
5.2
V
5.0
5.2
4.6
5.0
5.4
4.75
5.0
5.25
V
Regline
1.0
15
1.0
25
1.0
25
mV
Regload
10
50
10
100
10
100
mV
Regtherm
0.001
0.01
0.002
0.03
0.002
0.03
%VO/W
IB
3.5
10
3.5
20
3.5
20
mA
Ch.ractari,tic
Symbol
Output Voltage
(Vin = 7.5 V. 0 =:;;; lout:E;;; 3.0 A. TJ =25°C)
Vo
4.9
5.0
Output Voltage
Vo
4.8
(7.5 V~ Vin~ 15
Unit
v.a:;;;; lout~ 3.0 A.
P:S;;; Pmax(Note 2))
Line Reg ulation
(7.5 V:;;;; Vin:S;;; 15 V. TJ
=25°C)(Note 3)
load Regulation
(Vin= 7.5 V. O~ lout:;;;; 3.0A. TJ= 25°C)
(Note 3)
Thermal Regulation
(Pulse= 10 ms. p= 20W, TA= 25°C)
Quiescent Current
(7.6 V:e;;; Vi":S;;; 15 V, 0:;;;; lout:S;;;
3.9 AI
Output Noise Voltage
(10
Hz~
40
VN
f:;;;; 100 kHz. TJ =25°C)
Ripple Rejection
RR
62
40
75
62
75
62
40
/JVrms
75
dB
(B.OV:;;;; Vin::S;;; 18 V.l out = 2.0 A.
f= 120 Hz. TJ= 25'C)
Short Circuit Current Limit
(Vin = 15 V. TJ = 25°C)
(Vin = 7.5 V, TJ = 25°C)
4.5
5.5
5
Long Term Stability
Thermal Resistance Junction to Case
(Note 4)
Note 1. Tlow = -55°C for LM123. A
= -25°C for LM223. A
= OOC for LM323. A
A
ISC
ReJC
4.5
5.5
4.5
5.5
35
35
2.0
35
2.0
2.0
mV
°C/W
Note 3. Load and line regulation are specified at constant junction temperature. Pulse testing is required With a pulse width ~ 1.0 ms and
a duty cycle ~ 5%.
Thigh=+150oCfor LM123,A
= +150°C for LM223, A
= +125°C for LM323. A
Note 4. Without a heat sink. the thermal resistance {R8JA is 350C1W for
the K package, and 65°C/W for the T package. With a heat sink,
the effective thermal resistance can approach the specified values of 2.0°C/W. depending on the efficiency of the heat sink.
Note 2. Although power dissipation is internally limited. specifications
apply only for P oS; Pmax
Pmax = 30 W for K package
Pmax = 25 W for T package
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified by its immunity to changes in load. input Voltage. power diSSipation, and
temperature. Line and load regulation are tested with a pulse of
short duration « 100 J.ls) and are strictly a function of electrical
gain. However, pulse widths of longer duration (> 1.0 ms) are
sufficient to affect temperature gradients across the die. These
temperature gradients can cause a change in the output voltage,
in addition to changes caused by line and load regulation. Longer
pulse widths and thermal gradients make it desirable to specify
thermal regulation.
Thermal regulatio.n is defined as the change in output voltage
caused by a change in dissipated power for a specified time, and
is expressed as a percentage output voltage change per watt. The
change in dissipated power can be caused by a change in either
the input voltage or the load current. Thermal regulation isa function of. I.e. layout and die attach techniques, and usually occurs
within 10 ms of a change in power dissipation. After 1 0 ms, additional changes in the output voltage are due to the temperature
coefficient of the device.
Figure 1 shows the line and thermal regulation response of a
typical LM 123A 10 a 20 watt input pulse. The varialion of the output voltage due to line regulation is labeled
and the thermal
regulation component is labeled
Figure 2 shows the load and
thermal regulation response of a typical LM 123A to a 20 watt load
pulse. The output voltage variation due to load reg ulation is labeled
and the thermal regulation component is labeled
0.
G>
MOTOROLA LINEAR/INTERFACE DEVICES
3-37
CD
(3).
II
LM123, LM123A, LM223, LM223A, LM323, LM323A
SCHEMATIC DIAGRAM
Input
..
026
3.0k
300
13
0.12
200
Output
840
06
1.7k
Gnd
FIGURE 1 - LINE AND THERMAL REGULATION
FIGURE 2 - LOAD AND THERMAL REGULATION
18 V
I. TIME 12.0 ms/div.)
I. TIME 12.0 ms/div.)
lM123A
Vo = 5.0 V
Yin = 8.0 V -18 V_8.0 V (j) = Regline = 2.4 mV
10UI = 2.0 A
= Reg,herm = O.0015%VO/W
lM123A
Vo =5.0 V
.(j) =Reglo,d = 4.4 mV
=0 A_2.0 A-O A ,a> = Reg,herm =O.OOI5%VO/W
Vin = 15
a>
10UI
MOTOROLA LINEAR/INTERFACE DEVICES
3-38
LM123, LM123A, LM223, LM223A, LM323, LM323A
FIGURE 4 - OUTPUT IMPEDANCE
FIGURE 3 - TEMPERATURE STABILITY
5.10
100
,Vi~= I~V
I
lout = 100 mA -
-
S 10-1
.
'-'
z
1/
I'--- r-....
,,/
r---
Vin = 7.S V
lout = 1.0 A
/
~
/
::>
o
Eo 10-3
4.90
-90
liD
-10
30
70
TJ, JUNCTION TEMPERATURE (OC)
-50
150
10-4
1.0
190
iil
~
"'~
10k
lOOk
1.0M
10M
100M
-
;;.
z
20
1.0
\
Vin JIOV
Co = 0
TJ = 2SoC
10
100
~
'"
10k
60
0..
~
\
-
-
""'"
~
1.0k
-
80
0
~
60
I-- -
~
~
7
'--- -
150 rnA
=
I
40
\
lOOk
1.0M
10M
30
0.01
100M
I, FREQUENCY (Hz)
4.0
1 3.0
B
... 2.0
TJ = ISOoC
i!l
\
'5
1.0
o
0.1
1.0
TJ 12Soc
~
TJ = 25°C
~ 3.0
\
a
'[ [
'5
o
~ 1.0
v.I=IIO~
"I
IS
10
o
O.DI
20
Vin, INPUT VOLTAGE (Vd,)
I
J
0.1
1.0
lout, OUTPUT CURRENT (A)
MOTOROLA LINEAR/INTERFACE DEVICES
3-39
[
I
13
I
.J.
TJ = 150°C
~ 2.0
lout = 2.0 A- r----
~551c
L
...z.§.
I
S.O
10
I
4.0
!z
~ TJ=-SSoC
~ '"
o~
II I
TJ 1=
«
"TJ = ,ISOOC
-\ "I
13
1111
S.O
TJ - 2SoC
,Jl
;
I
FIGURE 8 - QUIESCENT CURRENT versus
OUTPUT CURRENT
TJ = -SsoC .....
/I
Vin= 10V
Co = 0
1= 120 Hz
TJ = 2SoC
lout, OUTPUT CURRENT tAl
FIGURE 7 - QUIESCENT CURRENT versus
INPUT VOLTAGE
~
1.0k
100
lout
lout = 3.0 A
40
100
FIGURE 6 - RIPPLE REJECTION versus
OUTPUT CURRENT
100
80
10
I, FREQUENCY (Hz)
FIGURE 5 - RIPPLE REJECTION versus FREQUENCY
!z
~
II
-
/'
fil
Co = 0
~ 10-2 f--- TJ = 2SoC
10
LM123, LM123A, LM223, LM223A, LM323, LM323A
FIGURE 9 - DROPOUT VOLTAGE
2. 5
-
IJ
lout = 3.0 A
"-
II
r-..
5
r-
!;(
!i;
r- r- .......
~
-50
-10
lout = 1.0 A
r- '"4.:c-
~ r---
70
r-- r::::::-- r---.
~c
---
t- -
a ~ 4.0
t-o
o '"
~
%N
en
2.0
'"
~
o
110
5.0
190
150
10
15
FIGURE 11 - LINE TRANSIENT RESPONSE
1
4
-
~
o
.1
!5~
0
>
~ i!5-o .1
0
0;:::
~~-O .2
2
ffi
'"~
:;;
x
~
'"
'>
'"
~
:;;
:Ii
~
...2i
20
FIGURE 12 - LOAD TRANSIENT RESPONSE
lou: = 150 mA_
Co = 0
TJ = 25°C
-
6
...!;i
I
.3
8
0
TJ=OoCTJ = 25°C
1'TJ=125°C
Vin. INPUT VOLTAGE IVdc)
TJ. JUNCTION TEMPERATURE 1°C)
!:
z
------
r-- I"---..
~g
l~ut=IO.5A-
30
6.0
~
LlVO = 50 mV
0.5
-90
FIGURE 10 - SHORT CIRCUIT CURRENT
8.0
TA. AMBIENT TEMPERATURE 1°C)
50
MOTOROLA LINEAR/INTERFACE DEVICES
3-40
75
TA. AMBIENT TEMPERATURE lOCI
100
125
LM123, LM123A, LM223, LM223A, LM323, LM323A
APPLICATIONS INFORMATION
Design Considerations
In many low current applications, compensation capacitors are not
required. However, it is recommended that the regulator input be bypassed
with a capacitor if the regulator is connected to the power supply filter with
long wire lengths, or if the output load capacitance is large. An input bypass capacitor should be selected to provide good high-frequency characteristics to insure stable operation under all load conditions. A O.331lF or
larger tantalum, mylar, or other capacitor having low internal impedance
at hig~ frequencies should be chosen. The bypass capacitor should be
mounted with the shortest possible leads directly across the regulator's
input terminals. Normally good construction techniques should be used
to minimize ground loops and lead resistance drops since the regulator has
no external sense lead.
FIGURE 15 - CURRENT REGULATOR
FIGURE 16 - ADJUSTABLE OUTPUT REGULATOR
The LM123.A Series of fixed voltage regulators are designed with
Thermal Overload Protection that shuts down the circuit when subjected
to an excessive power overload condition. Internal Short-Circuit Protection
that limits the maximum current the circuit will pass, and Output Transistor Safe-Area Compensation that reduces the output short-circuit current
as the voltage across the pass transistor IS increased.
Input
~,-L_M---,'2r3_._A---,h.
0.33~Fl
f
Output
•
~_
-10
Constant
Current to
Grounded Load
0.1
~F
10k
The LM123,A regulator can also be used as a current source when
connected as above. Resistor R determines the current as follows:
10 = 5.0 V
R
4.le
+
18
Vo. 8.0 V to 20 V
Vin - VO~ 2.5 V
0.7 mA over line, load and temperature changes
18'" 3.5 mA
Iii!!
The addition of an operational amplifier allows adjustment to higher
or intermediate values while retaining regulation characteristics. The
minimum voltage obtainable with this arrangement is 3.0 volts greater
than the regulator voltage.
For example, a 2-ampere current source would require R to be a 2.5
ohm, 15 W resistor and the output voltage compliance would be the
input voltage less 7.5 volts.
FIGURE 18 - CURRENT BOOSrWITH
SHORT-CIRCUIT PROTECTION
FIGURE 17 - CURRENT BOOST REGULATOR
2N4398
2N4398 or Equiv
or Equiv
Input
'".".~ '"1' f.:"'""'
. . .----<>-'IIvv-.-,(
R
The circuit of Figure 17 can be modified to provide supply protection
against short circuits by adding a short-circuit sense resistor, RSC, and
an additional PNP transistor. The current sensing PNP must be able to
handle the short-circuit current of the three-terminal regulator. There·
fore, an eight-ampere power transistor is specified.
The LM123,A series can be current boosted with a PNP transistor. The
2N4398 provides current to 15 amperes. Resistor R in conjunction with
the Vee of the PNP determines when the pass transistor begins conducting; this circuit is not short-circuit proof. Input-output differential
voltage minimum is increased by the Vee of the pass transistor.
MOTOROLA LINEAR/INTERFACE DEVICES
3-41
II
•
®
LM137
LM237
LM337
MOTOROLA
Specifications and Applications
Information
THREE·TERMINAL
ADJUSTABLE NEGATIVE
VOLTAGE REGULATORS
THREE·TERMINAL ADJUSTABLE
OUTPUT NEGATIVE VOLTAGE REGULATORS
The LM137/237/337 are adjustable 3-terminal negative voltage
regulators capable of supplying in excess of 1.5 A over an output
voltage range of -1.2 V to - 37 V. These voltage regulators are
exceptionally easy to use and require only two external resistors
to set the output voltage. Further, they employ internal current
limiting, thermal shutdown and safe area compensation, making
them essentially blow-out proof.
The LM137 series serve a wide variety of applications including
local, on-card regulation. This device can also be used to make
a programmable output regulator; or, by connecting a fixed resistor between the adjustment and output, the LM137 series can
be used as a precision current regulator.
• Output Current in Excess of 1.5 Ampere in K and T Suffix
Packages
• Output Current in Excess of 0.5 Ampere in H Suffix Package
• Output Adjustable Between -1.2 V and - 37 V
• Internal Thermal Overload Protection
• Internal Short-Circuit-Current Limiting, Constant with
Temperature
• Output Transistor Safe-Area Compensation
• Floating Operation for High Voltage Applications
• Standard 3-Lead Transistor Packages
• Eliminates Stocking Many Fixed Voltages
SILICON MONOLITHIC
INTEGRATED CIRCUIT
KSUFFIX
METAL PACKAGE
CASE 1-03
(Bottom View)
CASE IS INPUT
Pins. 1 and 2 electrically isolated from case.
Case is third electrical connection.
T SUFFIX
PLASTIC PACKAGE
CASE 221A-04
PIN 1. ADJUST
2. Yin
3. Vout
Heatsink surface connected
to Pin 2
STANDARD APPLICATION
H SUFFIX
METAL PACKAGE
CASE 79-05
Co **
(Bottom View)
1.0/LF
CASE
IS INPUT
PIN 1. ADJUST
2. OUTPUT
3. INPUT
Vout
H)--.--.........- - - - - < l -
Vout
ORDERING INFORMATION
·Cin IS required if regulator is located more than 4 Inches from power supply
filter. A 1 ,uF solid tantalum or 10 /-IF aluminum electrolytic is recommended.
**C o is necessary for stability. A 1 /-iF solid tantalum or 10 /-LF aluminum electrolytic is recommended.
#Automotive temperature range selections are available with special test conditions and
additional tests. Contact your local Motorola sales office for information.
LM137H
LM137K
LM237H
LM237K
LM337H
LM337K
LM337T
LM3378T#
MOTOROLA LINEAR/INTERFACE DEVICES
3-42
Tested Operating
Temperature Range
Device
TJ
TJ
TJ
TJ
TJ
TJ
TJ
TJ
~
~
~
~
~
~
~
~
-55°C to + 150°C
-55°C to + 150°C
-25°C to + 150°C
-25°C to + 15D"C
DOC to + 125°C
DOC to + 125"C
DOC to +125"C
-4DoC to + 125°C
Package
Metal Can
Metal Power
Metal Can
Metal Power
Metal Can
Metal Power
Plastic Power
Plastic Power
LM137, LM237, LM337
MAXIMUM RATINGS
Symbol
Rating
Input-Output Voltage Differential
Power Dissipation
LM137
LM237
LM337
Operating Junction Temperature Range
Tsta
Storage Temperature Range
Unit
Vdc
Value
40
Internally Limited
-55to +150
-25 to +150
Oto +125
-65 to +150
VI-VO
Po
TJ
°C
°C
ELECTRICAL CHARACTERISTICS (IVI- Vol = 5.0 V, 10 = 0.5 A for K and T packages; 10 = 0.1 A for H package;
TJ
= Tlow t 0
Characteristic
Line Regulation (Note 3)
TA = 25°C, 3.0 V '" lVI-Vol'" 40 V
Load Regulation (Note 3)
TA = 25°C, 10 mA '" 10 '" Imax
IVai'" 5.0 V
IVai'" 5.0V
Thermal Regulation
10 ms Pulse, TA = 25°C
I
Thiah (see N0 te 1] Imax and Pmax per Note 2 unless otherw'ISe sPecifed)
LM137/237
LM337
Figure
Symbol
1
Regline
2
Regload
Min
Typ
Max
Min
Typ
Max
Unit
-
0,01
0.02
-
0.01
0.04
%N
-
-
15
0.3
50
1.0
mV
%VO
0.003
0.04
%VQIW
65
100
p.A
2.0
5.0
p.A
3
IAdj
-
Adjustment Pin Current Change
2.5 V '" lVI-Vol'" 40 V
10 rnA '" IL '" Imax,
Po '" Pmax, TA = 25°C
Reference Voltage (Note 4) TA = + 25°C
3.0 V '" lVI-Vol'" 40 V, 10 rnA '" 10 '"
Imax, Po '" Pmax, TJ = Tlow to Thigh
Line Regulation (Note 3)
3.0 V '" lVI-Vol'" 40 V
Load Regulation (Note 3)
10 mA '" 10 '" Imax IVai'" 5.0 V
IVai'" 5.0 V
1,2
dlAdj
-
3
Vref
1
Regline
2
Regload
Temperature Stability (Tlow '" TJ '" Thigh)
Minimum Load Current to
Maintain Regulation !lVI-Vol", 10 V)
(lVI-Vol'" 40 V)
3
3
Maximum Output Current
lVI-Vol'" 15 V, Po '" Pm ax
K and T Packages
H Package
lVI-Vol = 40 V, Po '" Pmax, TJ
K and T Packages
H Package
3
-
Adjustment Pin Current
=
- 10 V, f
25
0.5
0.002
0.02
65
100
-
2.0
5.0
-
-1.225 -1.250 -1.275 -1.213 -1.250 -1.287
-1.20 -1.25 -1.30 -1.20 -1.25 -1.30
-
0.02
0.05
-
20
0.3
50
1.0
TS
-
0.6
ILmin
-
=
120 Hz (Note 5)
Long-Term Stability, TJ = Thigh (Note 6)
TA = 25°C for Endpoint Measurements
Thermal Resistance Junction to Case
H Package
K Package
T Package
-
0.02
0.07
%N
20
0.3
70
1.5
mV
%VO
-
0.6
-
%VO
-
1.2
2.5
3.0
5.0
-
1.5
2.5
6.0
10
1.5
0.5
2.2
0.8
-
1.5
0.5
2.2
0.8
-
0.24
0.15
0.4
0.2
-
0.15
0.1
0.4
0.2
-
0.003
-
-
0.003
-
-
-
66
60
77
66
60
77
-
-
0.3
1.0
-
0.3
1.0
-
12
2.3
15
3.0
-
12
2.3
4.0
15
3.0
mA
A
Imax
-
N
4
RR
-
-
3
S
-
ROJC
V
-
= 25°C
RMS Noise, % of Va
TA = 25°C, 10 Hz '" f '" 10 kHz
Ripple Rejection, Va
Without CAd~
CAdi = lOp.
Regtherm
15
0.3
-
-
-
-
-
%VO
dB
%11.0 k
Hrs.
0c/w
-
NOTES:
(1) Tlow=-55°CforLM137
::: -25°C for LM237
ooe for lM337
(2) Imax = 1.5 A for K and T Packages
= 0.5 A for H Package
Pmax = 20 W for K and T Package.
= 2 W for H Package
Thigh
= +150oC for LM137
(5) Cadj' when used. is connected between the adjustment pin and
ground.
(6) Since Long Term Stabilitv cannot be measured on each device before
shipment. this specification is an engineering estimate of average
stability from lot to lot.
(7) Power dissipation within an I.C. voltage regulator produces a temperature gradient on the die. affecting individuall.C. components on the die.
These effects can be minimized bV proper integrated circuit design and
layout techniques. Thermal R,egulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of
output change per watt of power change in a specified time.
=+150oC for LM237
= +125°C for LM337
(3) Load and line regulation are specified at a constant junction tempera·
ture. Pulse testing with a low duty cvcle is used. Change in Va because
of heating effects is covered under the Thermal Regulation specifi·
cation.
(4) Selected devices with tightened tolerance reference voltage available.
MOTOROLA LINEAR/INTERFACE DEVICES
3-43
LM137, LM237, LM337
SCHEMATIC DIAGRAM
Adjust
60
100
2.0 k
2.5 k
'l
II
X
810
1k
L-+-
.-+-...J
Vout
(1
0
0
10 k
5.0 k
""'I
750
~
60k
"-
~
15 pF
100 k
2~
~
t-..
18 k
8co
~
.~
2.0 k
III
N
ho.
I
~
('
Co
,..J1
H:
4.0 k
Y
V
ho.
}~
V
~
100
"'"
'"
N
~~
5f
'I
100 pF
"'o"
N
..
"'0 "
ho.
18 k
2.4 k
15
2.0
pF
~
5.0 k
1100 k
500
30 k
240
5.0 pF
.-1
r,
r
.....,.,..
H:
ho.
1Q H: r<
~«~r-r;
600
6.0k
220
co
"Co
500
0
~
c....-
O. 2
15
155
O. 05
FIGURE 1 - LINE REGULATION AND AIAdj/LlNE TEST CIRCUIT
R2
1%
1.0/LF
Co
Rl
·Pulse Testing Required:
1% Duty Cycle
is suggested.
1.0 p.F
120
1%
Vout
-, r-
VVIH
VOH
U ___. VOL
VIL
Line Regulation (% VOl =
IV?J-~VH9HI x 100
MOTOROLA LINEAR/INTERFACE DEVICES
3-44
LM137, LM237, LM337
FIGURE 2 - LOAD REGULATION AND AlAdJ'LOAD TEST CIRCUIT
R2
"Pulse Testing required:
1% Duty Cycle is suggested.
1%
II
Co +
1.0 p.F
- VI
JL
RL
(max.
Load)
0---0--1
-VO (min. Load)
Vo (max. Load)
Load Regulation (mV) = Vo (min. Load) - Vo (max. Load)
Load Regulation (% VOl = Vo (min. ~Oad) - VO(max. Load) x 100
o (min. Load)
FIGURE 3 - STANDARD TEST CIRCUIT
R2
Cin
1%
1.0 p.F
Co
1.0 p.F
Vo
Rl
120
To Calculate R2:
R2 =
(J!lL VRef
I)Rl
This assumes ladj
is negligible.
Pulse Testing Required:
1% Duty Cycle is suggested.
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
-b
T
R2
Cadj
1%
..J ....
T
10 p.F
I
Cin
F' 1.0 p.F
Adjust
Rl
Vin
+
Co; :::1.0 p.F
I
I
LM137
I
I
120
01*
~
.. lN4002
RL
~
Vout
Vo = -1.25V
14.3V----~
4.3 V - - - - - - - f = 120 Hz
"0, Discharges Cadj if Output is shorted to Ground.
MOTOROLA LINEAR/INTERFACE DEVICES
3..45
LM137, LM237, LM337
FIGURE 6 - CURRENT LIMIT
FIGURE 5 - LOAD REGULATION
0.2
II
TJ'-5~'C
~--
lw
- -....
1..0·2
~
.004
~
-0.8
i
-0.8
~
g
...g
I--
IL=0.5A
-
T- and K- Po-
TJ.JUNCTION TEMPERATURE ('CI
25
50
-
1.8
~1.260
...
~
...a
-....
~
~
~
1.4
~ 1.240
'".i'
>'!
25
50
75
100
TJ.JUNCTION TEMPERATURE (oCI
125
150
TJ • ISO'C
,.~
.J. ."/
"..
1.0
0.8
0.4
IFo II
o
150
I ,
-~
0.2
-25
-.:::::t
125
TJ • -55 C
1.2
:; 0.6
-~
100
I- TJ = 2S'C
-- r
.§
w
1.230
-:-
C 1.6
..
w
75
FIGURE 10 - MINIMUM OPERATING CURRENT
FIGURE 9 - TEMPERATURE STABILITY
:: 1.250
<.>
z
IL=[OOmA
TJ• JUNCTION TEMPERATURE ('CI
1.270
~
o
I
I L '1.0A
~ "'i
i
.
--
V'
~.~
~
10
20
30
40
VI - Va. INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vd,1
MOTOROLA LINEAR/INTERFACE DEVICES
3-46
--
IL • 1.5A
_..
I""-I""rI""rr-- ~ r-.....IL.~!;;A-...,
>
...
~
I
I
Vo = _5 1V
::!
....
:l;
~Q
40
FIGURE 8 - DROPOUT VOLTAGE
~
....~
45
40
J
J
~ -1.2
TJ ' 25'C
TJ '150'C
LM137, LM237, LM337
FIGURE 11 - RIPPLE REJECTION v.rsUI OUTPUT VOLTAGE
FIGURE 12 - RIPPLE REJECTION v_us OUTPUT CURRENT
100
tOO
Cadi - 10 pF
~
z
w
~
8:
a;
:ij'
60
40
.
9
I
~
Without Cadi
8:
a;
-10
40
:ij'
r--
-5
20
-15
II
Without Cadi
60
w
VI -Vr 5V
rl L "50 rnA
20 I - - f-f - 120 Hz
TJ" 25°C
o0
C'~i} 10~F
80
0
--
I'---....
0
~
'"z
80
-20
-25
-30
-35
-
VI" -15 V
Va --10 V
t" 120 Hz
TJ" 25°C
o
-40
FIGURE 13 - RIPPLE REJECTION versus FREQUENCY
10
0.1
10 , OUTPUT CURRENT IAI
0.01
Va, OUTPUf VOLTAGE IVI
FIGURE 14 - OUTPUT IMPEDANCE
100
VI" -15 V
'"
80
/"
z
0
~
60
~
VO" -10 V
IL =500mA
.......
CL "I"F
Cadj::: 10 ~F
.........,
"""'-'\.
'"
Without Cadi-'
w
8: 40
a;
:ij'
TJ ::: 2SoC
'\
VI" -15 V
20 -Va" -10V
_IL " 500 rnA
TJ" 25°C
0 10
lK
100
'\.
...... ~
10- 3
10M
10K
lOOK
1M
t, FREOUENCY IHzl
FIGURE 15 - LINE TRANSIENT RESPONSE
I->
"',..>!:?....
.8
.4
.2
0
.2
,4
J
.11
If'I ,
~
0:4
,,'"
~>
0.2
" , Cadj: 10 pF
'"
,5
TJ" 25°C
Cl" 1 pF
.0
10
\
-0.4
~
....
c~
"'oo
-1.0
-'
-1.5
:!B
20
30
-0,5
40
I
Without Cadi
l.L
I
-
V'
I
\
\
\
VI" -15 V
VO"-10V
INl-50rnA
TJ" 25°C
c~ "1 pF
I
t,
MOTOROLA LINEAR/INTERFACE DEVICES
/
20
10
t, TIME (,lis)
3-47
,---V
cadi "10pF
-0.6
Va" -10V
IL:;' 50mA
\
~-
-0.2
\
.
2
"w
0
\
I
0.6
~-
0
Without Cadi
1M
lOOK
FIGURE 16 - LOAD TRANSIENT RESPONSE
w
to
.6
10K
lK
t, FREQUENCY IHzl
100
10
TIME Ipsl
/
J
30
40
II
LM137, LM237, LM337
APPLICATIONS INFORMATION
BASIC CIRCUIT OPERATION
returned near the load ground to provide remote ground
sensing and improve load regulation.
The LM137 is a 3-terminal floating regulator. In operation, the LM137 develops and maintains a nominal
-1.25 volt reference (Vrefl between its output and adjustment terminals. This reference voltage is converted
to a programming currant (lPROG) by R1 (see Figure
111. and this constant currant flows through R2 from
ground. The ragulated output voltage is given by:
Vout = Vref (1
+
R2
R1)
+
EXTERNAL CAPACITORS
Al "f tantalum input bypass capacitor (Cin) is recommended to reduce the sensitivity to input line impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (Cadj) prevents
ripple from being amplified as the output voltage is
increased. A 10 "f capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 volt application.
An output capacitor (Co) in the form of a 1 "f tantalum
or 1 0 "f aluminum electrolytic capacitor is required
for stability.
ladj R2
Since the current into the adjustment terminal (ladj)
reprasents an error term in the equation, the LM137 was
designed to control ladj to less than 100 ,.A and keep
it constant. To do this, all quiescent operating current
is returned to the output terminal. This imposes the
requirement for a minimum load current. If the load
current is less than this minimum, the output voltage
will increase.
Since the LM137 is a floating regulator, it is only the
voltage differential across the circuit that is important
to performance, and operation at high voltages with
respect to ground is possible.
PROTECTION DIODES
When external capacitors are used with any I.C. regulator it is sometimes necessary to add protection diodes 10
prevent the capacitors from discharging through low
current points into the regulator.
figure 18 shows the LM137 with the recommended
protection diodes for output voltages in excess of -25 Vor
high capacitance values (Co> 25 "f. Cadj > 10 "f).
Diode 01 prevents Co from discharging thru the I.C.
during an input short circuit. Diode 02 protects against
capacitor Cadj discharging through the I.C. during an
output short circuit. The combination of diodes 01 and
02 prevents Cadj from discharging through the I.C. during
an input short circuit.
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
+
~
t-
~ R2
ladj
Adjust
Vin
LM137
IpROG
~
Vref
Rl
I \.
+
CO
\
I
VOUI
FIGURE 18 - VOLTAGE REGULATOR WITH
PROTECTION OIOOES
-
I VOUI
Vref = -1.25 V Typically
Co
LOAD REGULATION
02
The LM137 is capable of providing extremely good
load regulalion. but a few precautions are needed to
obtain maximum performance. For best performance. the
programming resistor (Rl) should be connected as close
to the regulator as possible to minimize line drops which
effectively appear in series with the reference. thereby
degrading regulation. The ground end of R2 can be
01
lN4D02
MOTOROLA LINEAR/INTERFACE DEVICES
3-48
Vout
®
LMl40,A Series
LM340,A Series
MOTOROLA
Specifications and Applications
Information
THREE-TERMINAL
POSITIVE FIXED
VOLTAGE REGULATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
THREE-TERMINAL POSITIVE VOLTAGE REGULATORS
This family offixed voltage regulators are monolithic integrated
circuits capable of driving loads in excess of 1.0 ampere. These
three-terminal regulators employ internal current limiting, thermal shutdown, and safe-area compensation. Devices are available
with improved specifications, including a 2% output voltage tolerance, on A-suffix 5.0, 12 and. 15 volt device types.
Although designed primarily as a fixed voltage regulator, these
devices can be used with external components to obtain adjustable voltages and currents. This series of devices can be used
with a series-pass transistor to boost output current capability at
the nominal output voltage.
• Output Current in Excess of 1.0 Ampere
• No External Components Required
• Output Voltage Offered in 2% and 4% Tolerance"
• Internal Thermal Overload Protection
• Internal Short-Circuit Current Limiting
• Output Transistor Safe-Area Compensation
KSUFFIX
METAL PACKAGE
CASE 1-03
~
PIN 1. INPUT
2. OUTPUT
CASE GROUND
(Bottom View)
TSUFFIX
PLASTIC PACKAGE
CASE 221A-04
ORDERING INFORMATION
Output Voltage
Device
end Tolerence
v
LMI40K-5.0
5.0
LMl40AK-5.0
5.0 V ± 2%
LMl40K-8.0
8.0
LMl40K-12
12 V ± 4%
LMl40AK-12
12 V ± 2%
LMl40K-15
15 V::t 4%
LMI40AK-15
15
v
v
± 4%
± 4%
± 2%
LM340K-5.0
5.0 V ± 4%
LM340AK-5.0
5.0 V ± 2%
LM340T-5.0
5.0V±4%
LM340AT-5.0
5.0V±2%
LM340T-6.0
6.0V±4%
LM340K-8.0
8.0 V ± 4%
LM340T-8.0
B.O V ± 4%
LM340K-12
12 V ± 4%
LM340AK-12
12 V ± 2%
LM340T-12
12 V ± 4%
LM340AT-12
12 V ± 2%
LM340K-15
15 V ± 4%
LM340AK-15
15 V ± 2%
LM340T-15
15 V ± 4%
LM340AT-15
15V ± 2%
LM340T-18
18V ± 4%
LM340T-24
24V ± 4%
*2% regulators are available in 5, 12 and
Tested Operating
Junction Temp. Range
_. 55°C to + 150°C
- 55°C to + 150°C
- 55°C to + 150°C
- 55°C to + 150°C
- 55°C to + 150°C
- 55°C to + 150°C
- 55°C to + 150°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
O°C to + 125°C
DOC to + 125°C
DOC to + 125°C
DOC to + 125°C
15 volt devices
Paekege
PIN 1. INPUT
2. GROUND
3. OUTPUT
Metal Power
(Heatsink surface
connected to
Pin 2)
Metal Power
Metal Power
STANDARD APPLICATION
Metal Power
Metal Power
Metal Power
Metal Power
Metal Power
r-r
+'--1'_--3
,",."T""1 'M'~-""
~.i~; /LF
0"""
Co'"
Plastic Power
Metal Power
A common ground is required between the
input and the output voltages. The input voltage must remain typically 1.7 V above the
output voltage even during the low point on
the input ripple voltage.
Plastic Power
XX = these two digits of the type number
indicate voltage.
Plastic Power
Metal Power
Plastic Power
*
=
Cin is required if regulator is located
an appreciable distance from power
supply filter.
=
Co
Metal Power
Plastic Power
Plastic Power
Plastic Power
MOTOROLA LINEAR/INTERFACE DEVICES
3-49
is not needed for stability; however, it does improve transient response. If needed, use a 0.1 /LF ce-
ramic disc.
II
•
LM140,A, LM340,A
MAXIMUM RAnNGS (TA
= + 25'C unless otherwise noted.)
Rating
Symbol
Value
Unit
Vin
35
Vdc
Input Voltage (5.0 V - 18 V)
(24 V)
40
Power Dissipation and Thermal Characteristics
Plastic Package
TA = +25'C
Derate above TA = + 25'C
Thermal Resistance, Junction to Air
TC = +25'C
Derate above TC = + 75'C (See Figure 1)
Thermal Resistance, Junction to Case
Metal Package
TC = +25'C
Derate above TA = + 25'C
Thermal Resistance, Junction to Air
TC = +25'C
Derate above TC = + 65'<; (See Figure 2)
Thermal Resistance, Junction to Case
Po
1/8JA
8JA
Internally Limited
15.4
65
Watts
mWI'C
Po
1I8JC
8JC
Internally Limited
200
5.0
Watts
mWI'C
Po
1/8JA
8JA
Internally Limited
22.5
45
Watts
mWI'C
Po
Watts
mWI'C
8JC
Internally Limited
182
5.5
TstR
-65 to + 150
'c
1/8JC
Storage Junction Temperature Range
Operating Junction Temperature Range
'CIW
'CIW
'CIW
°CIW
'C
TJ
LM140,A
LM340,A
-55 to + 150
Oto +150
EQUIVALENT SCHEMATIC DIAGRAM
1.0 k
Jl.0k
210
Input
~
A
L
J
6.7 V" r'
16 k
V
k~
1=
v
\J
200 ..
1.0 k
r-3.0 k
5.6 k
6.4~
k::
~
~
~
,04
~
,,,'
1"
3.9 k
t;l
f 6kO~
1ft:
:~
,6.0 k
...
ho
300
0.12
13
50
2.6 k
....
V
10 pF "I
620
2.0 k
lOO y
1
V
200
Output
~~
1
1
~
2.8k
;.or
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
3-50
LM140A LM340,A
DEFINITIONS
dissipation for which the regulator will operate within
specifications.
Quiescent Current - That part of the input current that is
not delivered to the load.
Output Noise Voltage - The rms ae voltage at the output,
with constant load and no input ripple, measured over a specified frequency range.
Line Regulation - The change in output voltage for a change
in the input voltage. The measurement is made under condi·
tions of low dissipetion or by using pulse techniques such that
the average chip temperature is not significantly affected.
load Regulation - The change in output voltage for a
change in load current at constant chip temperature.
Maximum Power Dissipation - The maximum total device
LM140/340 -
5.0
ELECTRICAL CHARACTERISTICS (V in
Characteristic
=
10 V,0=
I
500 mA TJ = Tlow toT hiah (Note 1) ' u nless otherwise noted)
Symbol
Min
Max
Unit
Typ
Output Voltage ITJ = + 2S"C)
10 = 5.0 mA to 1.0 A
Vo
Line Regulation (Note 2)
B.O to 20 Vdc
7.0 to 25 Vdc (TJ = + 2S"C)
B.O to 12 Vdc, 10 = 1.0 A
7.3 to 20 Vdc, 10 = 1.0 A (TJ = +2S"C)
Regline
load Regulation (Note 2)
5.0 mA '" 10 '" 1.0A
5.0 mA '" 10 '" 1.5 A (TJ = +2S"C)
250 mA '" 10 '" 750 mA ITJ = +2S"C)
Regload
5.0
5.2
-
-
-
-
50
50
25
50
-
-
-
-
-
Output Voltage
lM140
B.O '" Yin '" 20 Vdc, 5.0 rnA '" 10 '" 1.0 A, PD '" 15 W
LM340
7.0'" Vin '" 20 Vdc, 5.0 mA '" 10 '" 1.0 A, PD '" 15 W
Vo
Quiescent Current
10 = 1.0A
lMI40
lM340
lMI40 (TJ = + 25"C)
lM340 (TJ = + 25"C)
IB
Quiescent Current Change
8.0 '" Vin '" 25 Vdc, 10 =
7.0'" Vin '" 25 Vdc, 10 =
5.0 mA '" 10 '" 1.0 A, Vin
8.0'" Vin '" 20 Vdc, 10 =
7.5'" Yin '" 20 Vdc, 10 =
4.B
mV
-
mV
-
50
50
25
Vdc
4.75
-
5.25
4.75
-
5.25
mA
-
-
-
4.0
4.0
7.0
B.5
6.0
B.O
-
-
O.B
1.0
0.5
O.B
1.0
68
62
-
-
68
62
80
80
-
-
mA
AlB
500 mA
500 mA
= 10 V
1.0 A
1.0 A
lMI40
lM340
lMI40, lM340
lMI40
lM340
-
Ripple Rejection
lMI40
lM340
10 = 1.0AITJ = +25"C)
lMI40
lM340
Vdc
RR
-
dB
Output Resistance (f = 1.0 kHz)
ro
Short Circuit Current Limit (TJ = + 25"C)
Isc
-
Output Noise Voltage (TA = + 25"C)
10Hz"'f'" 100kHz
Vn
-
40
-
TCVO
-
±0.6
-
mVI"C
-
2.4
7.3
-
-
Vdc
Dropout Voltage
Vin -VO
Average Temperature Coefficient of Output Voltage
10 = 5.0 mA
Peak Output Current (TJ = + 2S"C)
10
Input Voltage to Maintain Line Regulation (TJ = +2S"C)
10 = 1.0A
= - SS"C for LMI40
Thigh = + Iserc for LMI40
O"C for LM340
= + 12S"C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
-
1.7
2.0
2.0
Vdc
mil
mA
/JoV
A
NOTES: I. Tlow
Va due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-51
II
..
LM140,A, LM340,A
LM140Al340A - 5.0
ELECTRICAL CHARACTERISTICS (Vin = 10V.0=
t 1) • un ess 0 th erwlse not ed)
I
lOA TJ = T low t 0 Thigh (N oe
Typ
Characteristic
Symbol
Min
Max
Unit
Output Voltage (TJ = + 25"C)
10 = 5.0 mA to 1.0 A
Va
Line Regulation (Note 2)
7.5 to 20 Vdc. 10 = 500 mA
7.3 to 20 Vdc (TJ = + 25"C)
8.0 to 12 Vdc
8.0 to 12 Vdc (TJ = + 25"C)
Regline
Load Regulation (Note 2)
5.0 mA '" 10 '" 1.0 A
5.0 mA '" 10 '" 1.5 A (TJ = + 25"C)
250 mA '" 10 '" 750 mA (TJ = + 25"C)
Regload
4.9
5.0
5.1
-
-
10
10
12
mV
3.0
-
-
-
-
Output Voltage
7.5'" Vin '" 20 Vdc. 5.0 mA,'" 10 '" 1.0 A. PD '" 15 W
Va
4.8
Quiescent Current
18
-
3.5
Ouiescent Current Change
5.0 mA '" 10'" 1.0 A. Vin = 10 V
8.0 '" Vin '" 25 Vdc. 10 = 500 mA
7.5'" Vin '" 20 Vdc. 10 = 1.0 A (TJ = + 25"C)
lolB
Ripple Rejection
8.0'" Vin '" 18 Vdc. 1= 120 Hz
10 = 500 mA
10 = 1.0 A (TJ = + 25"C)
RR
-
-
0.5
0.8
0.8
mil
mA
40
-
-
±0.6
-
mVI"C
-
2.4
7.3
-
-
Vdc
Output Noise Voltage (T A = + 25"C)
10 Hz '" I '" 100 kHz
Vn
TCVO
80
Vdc
/LV
A
Va due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-52
mA
-
2.0
Isc
NOTES:
1, Tlow ~ -55°C for LM140A
Thigh ~ + 150°C for LM140A
O"C for LM340A
~ + 125°C for LM340A
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
mA
-
Short Circuit Current Limit (TJ = + 25"C)
10
6.5
6.0
1.7
-
Peak Output Current (TJ = + 25°C)
Vdc
2.0
ro
Vin - Va
Input Voltage to Maintain Line Regulation (TJ = +25"C)
5.2
-
Output Resistance (I = 1.0 kHz)
Average Temperature Coefficient 01 Output Voltage
10 = 5.0 mA
-
25
25
15
dB
68
68
Dropout Voltage
4.0
mV
-
(TJ = + 25"C)
Vdc
LM140,A, LM340,A
LM1401340 - 6.0
t 1) , un ess 0 th erwlse noted)
ELECTRICAL CHARACTERISTICS (V in = 11 V,0=
I
500 mATJ = Tlow t 0 Thigh (N oe
Unit
Symbol
Min
Typ
Max
Characteristic
Vdc
5.75
6.0
6.25
Output Voltage (TJ = + 25°C)
Vo
10 = 5.0 mA to 1.0 A
mV
Line Regulation (Note 2)
9.0 to 21 Vdc
8.0 to 25 Vdc (TJ = + 25°C)
9.0 to 13 Vdc, 10 = 1.0 A
8.3 to 21 Vdc, 10 = 1.0 A (TJ = + 25°C)
Regline
Load Regulation (Note 2)
5.0 mA '" 10'" 1.0 A
5.0 mA '" 10'" 1.5 A (TJ = + 25°C)
250 mA '" 10 '" 750 mA (TJ = + 25°C)
Regload
Vo
Quiescent Current
10 = 1.0 A
LM140
LM340
LM140 (TJ = + 25°C)
LM340 (TJ = + 25°C)
18
60
60
30
60
-
-
60
mV
-
5.7
-
6.3
5.7
-
6.3
mA
-
LM140
LM340
LM140, LM340
LM140
LM340
-
4.0
4.0
7.0
8.5
6.0
8.0
-
0.8
1.0
0.5
0.8
1.0
mA
-
Ripple Rejection
LM140
LM340
10 = 1.0A(TJ = + 25°C)
LM140
LM340
60
30
Vdc
tolB
500 mA
500 mA
= 11 V
1.0 A
1.0 A
-
-
-
Output Voltage
LM140
9.0'" Yin '" 21 Vdc, 5.0 mA '" 10 '" 1.0 A, PD '" 15 W
LM340
8.0", Yin '" 21 Vdc, 6.0 mA '" 10 '" 1.0 A, PD" 15 W
Quiescent Current Change
9.0 '" Yin '" 25 Vdc, 10 =
8.0 '" Yin '" 25 Vdc, 10 =
5.0 mA '" 10 '" 1.0 A, Yin
9.0'" Yin '" 21 Vdc, 10 =
8.6'" Yin '" 21 Vdc, 10 =
-
RR
dB
65
59
-
-
-
-
65
59
78
78
-
1.7
Output Resistance (I = 1.0 kHz)
ro
-
-
2.0
-
Short Circuit Current Limit (TJ = + 25°C)
Ise
-
1.9
Output Noise Voltage (TA = + 25·C)
10 Hz '" I '" 100 kHz
Vn
-
45
TCVO
-
~O.7
-
2.4
-
A
8.3
-
-
Vdc
Dropout Voltage
Yin - Vo
Average Temperature Coefficient 01 Output Voltage
10 = 5.0 mA
Peak Output Current (TJ = t25°C)
10
Input Voltage to Maintain Line Regulation (TJ = + 25°C)
10 = 1.0A
-
-
Vdc
mO
mA
/JoV
mV/"C
NOTES:
I. Tlow
= -55·C for LMI40
O·C for LM340
Thigh = + 150·C for LMI40
= + 125·C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-53
•
II
LM140,A, LM340,A
LM140/340 -
B.O
ELECTRICAL CHARACTERISTICS (Vin = 14V·0=
t
I
500 mATJ = Tlow t 0 Thigh (N oe
Characteristic
Symbol
Min
Output Voltage (TJ = + 2S"CI
'0 = 5.0 mA to 1.0 A
Vo
Line Regulation (Note 2)
11 to 23 Vdc
10.5 to 25 Vdc (TJ = +2S"CI
11 to 17 Vdc, 10 =1.0 A
10.5 to 23 Vdc, 10 = 1.0 A (TJ = +2S"CI
Regline
Load Regulation (Note 21
5.0 mA '" '0 '" 1.0 A
5.0 mA '" '0 '" 1.5 A (TJ = + 25"C)
250 mA '" 10 '" 750 mA (TJ = + 25"CI
Regload
1)I un ess ,0th erwrse not ed)
Typ
Max
Unit
7.7
8.0
8.3
Vdc
-
-
-
-
-
-
-
Output Voltage
LM140
11.5'" Yin '" 23 Vdc, 5.0 mA '" '0 '" 1.0 A, Po '" 15 W
LM340
10.5'" Yin '" 23 Vdc, 5.0 rnA '" '0'" 1.0 A, PD '" 15 W
-
mV
80
80
40
80
mV
80
80
40
Vdc
Vo
Quiescent Current
7.6
-
8.4
7.6
-
8.4
-
4.0
4.0
7.0
8.5
6.0
8.0
-
-
mA
IB
10 = 1.0 A
LM140
LM340
LM140 (TJ = +2S"C)
LM340 (TJ = +2S"C)
Quiescent Current Change
11.5'" Yin '" 25 Vdc, 10 = 500 mA
10.5 '" Yin '" 25 Vdc, 10 = 500 mA
5.0 mA '" '0 '" 1.0 A, Yin = 14 V
11.5'" Yin '" 23 Vdc, 10 = 1.0 A
10.6'" Yin '" 23 Vdc, 10 = 1.0 A
liB
LM140
LM340
LM140, LM340
LM140
LM340
Ripple Rejection
LM140
LM340
10 = 1.0A(TJ = +2S"C)
LM140
LM340
mA
-
-
-
-
0.8
1.0
0.5
0.8
1.0
62
56
-
-
62
56
76
76
Vdc
RR
dB
Yin -yo
-
1.7
-
Output Resistance (I = 1.0 kHz)
ro
2.0
-
mll
Short Circuit Current Limit (TJ = +2S"C)
Ise
1.5
Vn
52
-
mA
Output Noise Voltage (TA = + 2S'CI
10 Hz '" I '" 100 kHz
-
TCVO
-
±1.0
-
mV/"C
-
2.4
-
Vdc
Dropout Voltage
Average Temperature Coefficient of Output Voltage
10 = 5.0 mA
Peak Output Current (TJ = + 2S'C)
10
Input Voltage to Maintain Line Regulation (TJ = +2S'CI
10 = LOA
NOTES:
1. T,ow
~
- SS'C for LM140
O'C for LM340
Thigh
~
~
10.5
-
".V
A
-
+IS0'CforLMI40
+ 12S'C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Vo due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-54
LM140,A, LM340,A
LM1401340 - 12
ELECTRICAL CHARACTERISTICS (V in = 19V,O~
I
500 mA TJ
Characteristic
Output Voltage (TJ ~ + 25°C)
10 ~ 5.0 mA to 1.0 A
TI ow to Thialh (Note 1) unless otherwise noted)
Typ
Unit
Symbol
Min
Max
~
Line Regulation (Note 2)
15 to 27 Vdc
14.6 to 30 Vdc (TJ ~ + 25'C)
16 to 22 Vdc, 10 ~ 1.0 A
14.6 to 27 Vdc, 10 ~ 1.0 A (TJ
12
12.5
-
120
120
60
120
-
120
120
60
11.4
-
12.6
11.4
-
12.6
-
7.0
8.5
6.0
8.0
-
~
-
+ 25'C)
Regload
Output Voltage
LMl40
15.5'" Vin '" 27 Vdc, 5.0 mA '" 10 '" 1.0 A, PO" 15 W
LM340
14.5'" Vin '" 27 Vdc, 5.0 mA" 10 " 1.0 A, PO" 15 W
Vo
Quiescent Current
10 ~ 1.0A
LMl40
LM340
LM140(TJ ~ + 25'C)
LM340 (TJ ~ + 25'C)
IS
Vdc
mA
-
4.0
4.0
-
-
:'IS
LM140
LM340
LM140, LM340
LM140
LM340
61
55
-
61
55
Vin -VO
~
1.0 kHz)
Short Circuit Current Limit (TJ
Output Noise Voltage (TA
10 Hz '" f '" 100 kHz
~
~
72
72
Vdc
1.1
-
-
Average Temperature Coefficient of Output Voltage
10 ~ 5.0 mA
Peak Output Current (TJ
~
+ 25'C)
NOTES:
1. Tlow ~ -55"C for LMl40
Vn
75
-
p.V
TCVO
-
±1.5
-
mvrc
-
2.4
-
A
-
-
Vdc
10
Input Voltage to Maintain Line Regulation (TJ
10 ~ 1.0A
Thigh
~
~
1.7
2.0
Isc
+ 25'C)
dS
-
-
ro
+ 25'C)
-
mA
0.8
1.0
0.5
0.8
1.0
-
+ 25'C)
Oropout Voltage
Output Resistance (f
-
-
RR
~
-
mV
-
-
quiescent Current Change
15'" Vin '" 30 Vdc, 10 ~ 500 mA
14.5 '" Vin '" 30 Vdc, 10 ~ 500 mA
5.0 mA '" 10'" 1.0 A, Vin ~ 19 V
15 '" Vin '" 27 Vdc, 10 ~ 1.0 A
14.8'" Vin '" 27 Vdc, 10 ~ 1.0 A
Vdc
mV
Regline
Load Regulation (Note 2)
5.0 mA '" 10'" 1.0 A
5.0 mA '" 10'" 1.5 A (TJ ~ + 25'C)
250 mA '" 10'" 750 mA (TJ ~ + 25'C)
Ripple Rejection
LMl40
LM340
10 ~ 1.0A(TJ
LMI40
LM340
11.5
Vo
+ 25'C)
14.6
mfi
mA
+ 150"C for LM140
= + 125'C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
Va due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-55
•
•
LM140,A, LM340,A
LM140Al340A -12
ELECTRICAL CHARACTERISTICS (V in = 19V·O~
t 1), un ess 0 th erwlse not e d)
I
1 OA TJ = Tlow t 0 Thigh (N oe
Typ
Symbol
Min
Max
Characteristic
Output Voltage (TJ = + 25'C)
12
11.75
12.25
Vo
10
= 5.0 mA to
Regline
Load Regulation (Note 2)
5.0mA"'10"'1.0A
5.0 mA '" 10 '" 1.5 A (TJ ~ + 25'C)
250 mA '" 10 '" 750 mA (TJ ~ + 25'C)
Regload
Quiescent Current
IB
= + 25'C)
Quiescent Current Change
5.0 mA '" 10 '" 1.0 A. Yin = 19 V
15'" Yin '" 30 Vdc. 10 = 500 mA
14.8" Yin ., 27 Vdc. 10 ~ 1.0 A (TJ
1.0 kHz)
Output Noise Voltage (TA
10 Hz" f., 100 kHz
~
+ 25'C)
+ 25'C)
= + 25'C)
~
O'C for LM340A
3.5
-
-
6.5
6.0
mA
-
-
0.5
0.8
0.8
72
--
1.7
Vdc
2.0
-
1.1
-
mA
Vn
-
75
-
p.V
TCVO
-
±1.5
-
mVI'C
-
2.4
-
Vdc
10
Input Voltage to Maintain Line Regulation (TJ
= -55'C for LMl40A
-
-
Vdc
-
Isc
Average Temperature Coefficient of Output Voltage
10 = 5.0 mA
Peak Output Current (TJ
-
12.5
61
61
ro
~
mV
60
32
19
dB
Yin - Vo
Short Circuit Current Limit (TJ
-
RR
Dropout Voltage
=
-
18
18
30
9.0
mA
= + 25'C)
Ripple Rejection
15 '" Yin ., 25 Vdc. f ~ 120 Hz
10 ~ 500 mA
10 ~ 1.0 A. (TJ ~ + 25'C)
4.0
-
11.5
~IB
mV
-
-
-
Vo
Output Resistance (f
-
Output Voltage
14.8'" Yin '" 27 Vdc. 5.0 mA '" 10 '" 1.0 A. PD '" 15 W
NOTES:
1. Tlow
Vdc
1.0 A
Line Regulation (Note 2)
14.8 to 27 Vdc. 10 = 500 mA
14.5 to 27 Vdc (TJ ~ + 25'C)
16 to 22 Vdc
16 to 22 Vdc (TJ ~ + 25'C)
(TJ
Unit
Thigh
~
+ 25'C)
14.5
-
mil
A
= + 150'C for LMl40A
= + 125'C for LM340A
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va
due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-56
LM140,A, LM340,A
LM140A/340 - 15
ELECTRICAL CHARACTERISTICS (V·m= 23 V 10 = 500 mA TJ = TI ow to Th'IIgrh (Note 1) unless otherwise noted)
Characteristic
Output Voltage (TJ = + 25'C)
10 = 5.0 mA to 1.0 A
Line Regulation (Note 2)
18.5 to 30 Vdc
17.5 to 30 Vdc (TJ = + 25'C)
20 to 26 Vdc. 10 = 1.0 A
17.7 to 30 Vdc. 10 = 1.0 A (TJ
Symbol
Min
Typ
Max
Unit
Vo
14.4
15
15.6
Vdc
-
-
-
-
150
150
75
150
-
-
150
150
75
mV
Regline
=
+25'C)
Load Regulation (Note 2)
5.0 mA '" 10 '" 1.0 A
5.0 mA '" 10'" 1.5 A (TJ = + 25'C)
250 mA '" 10'" 750 mA (TJ = + 25'C)
Regload
Output Voltage
LMI40
18.5'" Vin.'" 30 Vdc. 5.0 mA '" 10 '" 1.0 A. PD '" 15 W
LM340
17.5'" Yin '" 30 Vdc. 5.0 mA '" 10 '" 1.0 A. PD '" 15 W
Vo
Quiescent Current
10 = 1.0A
LM140
LM340
LM140 (TJ = + 25'C)
LM340 (TJ = + 25'C)
IB
mV
Vdc
14.25
-
15.75
14.25
-
15.75
mA
-
4.0
4.0
7.0
8.5
6.0
8.0
-
-
0.8
1.0
0.5
0.8
1.0
60
54
-
-
60
54
70
70
ro
-
2.0
-
Isc
-
800
-
mA
Vn
-
90
-
!'V
Average Temperature Coefficient 01 Output Voltage
10 = 5.0 mA
TCVO
-
:!:1.8
-
mvrc
=
10
-
2.4
-
Vdc
Quiescent Current Change
Ripple Rejection
LMI40
LM340
10 = 1.0A (TJ
LMI40
LM340
mA
.iIS
18.5 '" Yin "" 30 Vdc. 10 = 500 mA
17.5 '" Yin "" 30 Vdc. 10 = 500 mA
5.0 mA '" 10'" 1.0 A. Yin = 23 V
18.5'" Yin '" 30 Vdc. 10 = 1.0 A
17.9"" Yin '" 30 Vdc. 10 = 1.0 A
-
LM140
LM340
LM140. LM340
LM140
LM340
RR
=
+25'C)
Dropout Voltage
Output Resistance (I
dB
Yin - Vo
=
1.0 kHz)
Short Circuit Current Limit (TJ
Output Noise Voltage (TA
10 Hz '" I '" 100 kHz
Peak Output Current (TJ
=
=
+ 25'C)
+ 25'C)
+ 25'C)
Input Voltage to Maintain Line Regulation (TJ
10 = 1.0A
= + 25'CI
17.7
1.7
-
Vdc
mll
A
NOTES:
1. Tlow
= -55'C for LM140
Thigh = + 150'C for LM140
= + 125"C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-57
II
•
LM140,A, LM340,A
LM14OA134OA - 15
ELECTRICAL CHARACTERISTICS (V'm= 23 V 10 = lOA TJ = TI ow to Th'1 h (Note 1) unless otherwise noted)
Characteri!ltic
Output Voltage (TJ = + 25"<:)
10 = 5.0 mA to 1.0 A
Symbol
Min
Typ
Max
Unit
Vo
14.7
15
15.3
Vdc
-
22
22
30
10
Line Regulation (Note 2)
17.9 to 30 Vdc. 10 = 500 mA
17.5 to 30 Vdc (TJ = + 25°C)
20 to 26 Vdc. 10 = 1.0 A
20 to 26 Vdc. 10 = 1.0 A (TJ = + 25°C)
Regline
load Regulation (Note 2)
5.0 mA '" 10'" 1.0A
5.0 mA '" 10" 1.5 A (TJ = + 25°C)
250 mA .. 10" 750 mA (TJ = +25°C)
Regload
4.0
-
-
-
Vo
Quiescent Current
(TJ = +25°C)
IB
Quiescent Current Change
5.0 mA .. 10" 1.0 A. Vin = 23 V
17.9 .. Vin" 30 Vdc. 10 = 500 mA
17.9 .. Vin .. 30 Vdc. 10 = 1.0 A (TJ
AlB
14.4
-
-
12
-
75
35
21
15.6
Vdc
6.5
6.0
mA
3.5
-
0.5
0.8
0.8
mA
-
+ 25°C)
Ripple Rejection
18.5 .. Vin .. 28.5 Vdc. I = 120 Hz
10 = 500 mA
10 = 1.0 A. (TJ = + 25°C)
.mV
mV
-
Output Voltage
17.9" Vin E 30 Vdc. 5.0 mA .. 10" 1.0 A. PO" 15 W
=
-
RR
dB
60
60
-
-
Vin - Vo
-
1.7
-
roo
-
2.0
-
Isc
-
800
Vn
-
90
Average Temperature Coefficient 01 Output Voltage
10 = 5.0 mA
TCVO
-
±1.8
=
10
-
2.4
Dropout Voltage
Output Resistance (I
=
1.0 kHz)
Short Circuit Current Limit (TJ
Output Noise Voltage (TA
10 Hz .. I .. 100 kHz
Peak Output Current (TJ
=
+ 25°C)
= + 25°C)
+ 25°C)
Input Voltage to Maintain Line Regulation (TJ
NOTES:
1. Tlow = -56'C for LM140A
O"C for LM340A
Thigh
=
+ 25°C)
17.5
70
-
-
Vdc
mil
mA
p.V
mvrc
A
Vdc
= +1S0'C for LM140A
= + 12S'C for
LM340A
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Vo due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-58
LM140,A, LM340,A
LM1401340 -
18
I
noted)
ELECTRICAL CHARACTERISTICS (V in = 27 V,0=
500 rn A TJ = Tlow to Thiah (Note 1) unless otherw·se
I
Characteristic
Output Voltage (TJ = + 25'C)
10 = 5.0 rnA to 1.0 A
Symbol
Min
Typ
Max
Unit
Vo
17.3
18
18.7
Vdc
-
-
180
180
90
180
-
-
180
180
90
Line Regulation (Note 2)
21.5 to 33 Vdc
21 to 33 Vdc (TJ = +25'C)
24 to 30 Vdc, 10 = 1.0 A
21 to 33 Vdc, 10 = 1.0 A (TJ = + 25'C)
Regline
Load Regulation (Note 2)
5.0 rnA .;; 10 .;; 1.0 A
5.0 rnA .;; 10 .;; 1.5 A (TJ = + 25'C)
250 rnA.;; 10';; 750 rnA (TJ = + 25'C)
Regload
Output Voltage
LMI40
22", Vin '" 33 Vdc, 5.0 rnA '" 10 '" 1.0 A, PD .;; 15 W
LM340
21 '" Vin .;; 33 Vdc, 5.0 rnA.;; 10';; 1.0 A, Po '" 15 W
Vdc
-
18.9
17.1
-
18.9
rnA
4.0
4.0
-
-
-
-
0.8
1.0
0.5
0.8
1.0
59
53
-
-
-
59
53
69
69
-
Ripple Rejection
LM140
LM340
10 = 1.0 A (TJ = + 25'C)
LM140
LM340
-
7.0
8.5
6.0
8.0
-
RR
Dropout Voltage
dB
Short Circuit Current Limit (TJ = + 25'C)
Average Temperature Coefficient 01 Output Voltage
10 = 5.0 rnA
= + 25'C)
Input Voltage to Maintain Line Regulation (TJ
10 = 1.0 A
Thigh
+ 150'C for lM140
=
+ 12S'C for lM340
:t2.3
-
rnVfC
-
2.4
21
-
-
Vdc
10
= + 25'C)
=
-
TCVO
Isc
= + 25'C)
110
Vn
ro
2. load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
1.7
2.0
500
Vdc
mO
rnA
f.LV
A
Va due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-59
-
-
-
Vin - Vo
= 1.0 kHz)
Output Noise Voltage (T A
10 Hz '" 1 .;; 100 kHz
-
mA
alB
LM140
LM340
LM140, LM340
LM140
LM340
22 .;; Vin '" 33 Vdc, 10 = 500 mA
21 .;; Vin .;; 33 Vdc, 10 = 500 rnA
5.0 rnA '" 10 .;; 1.0 A, Vin = 27 V
22 '" Vin .;; 33 Vdc, 10 = 1.0 A
21 '" Vin '" 33 Vdc, 10 = 1.0 A
NOTES:
1. Tlow = -55'C for lM140
O'C for lM340
17.1
IB
Quiescent Current Change
Peak Output Current (TJ
rnV
Vo
Quiescent Current
10 = 1.0A
LMI40
LM340
LM140 (TJ = + 25'C)
LM340 (TJ = + 25'C)
Output Resistance (f
rnV
II
•
LM140,A, LM340,A
LM140/340 -
24
ELECTRICAL CHARACTERISTICS (V,In= 33 V 10 = SOO mA TJ = TI ow to Th'II!!Ih (Note 1) unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = + 25'C)
10 = 5.0 mA to 1.0 A
Vo
Line Regulation (Note 2)
28 to 38 Vdc
27 to 38 Vdc (TJ = + 2S'C)
30 to 36 Vdc. 10 = 1.0 A
27.1 to 38 Vdc. 10 = 1.0 A (TJ
Regline
=
+2S"C)
Load Regulation (Note 2)
5.0 mA '" 10 '" 1.0 A
5.0 mA '" 10 '" 1.5 A (TJ = +2S'C)
250 mA '" 10 '" 750 mA (TJ = + 25'C)
Regload
Output Voltage
LM140
28", Yin '" 38 Vdc. 5.0 mA '" 10 '" 1.0 A. PD '" 15 W
LM340
27", Yin '" 38 Vdc. 5.0 mA '" 10 '" 1.0 A. PD '" 15 W
Quiescent Current
10 = 1.0A
LM140
LM340
LM140 (TJ = + 25'C)
LM340 (TJ = +2S'C)
Vo
Quiescent Current Change
28 '" Yin '" 38 Vdc. 10 = 500 mA
27 '" Yin '" 38 Vdc. 10 = 500 mA
5.0 mA '" 10 '" 1.0 A. Yin = 33 V
28'" Yin '" 38 Vdc. 10 = 1.0 A
27.3'" Yin '" 38 Vdc.IO = 1.0 A
tllB
23
24
25
-
-
-
240
240
120
240
-
-
240
240
120
Vdc
mV
mV
Vdc
22.8
-
25.2
22.8
-
25.2
mA
18
-
-
4.0
4.0
7.0
8.5
6.0
8.0
mA
-
-
-
0.8
1.0
0.5
0.8
1.0
56
50
-
-
-
56
50
66
66
-
1.7
-
Vdc
2.0
-
mH
200
-
rnA
Vn
-
170
-
p.V
Average Temperature Coefficient 01 Output Voltage
10 = S.O mA
TCVO
-
±3.0
-
mV/'C
=
10
-
2.4
-
A
-
-
Vdc
Ripple Rejection
LM140
LM340
10 = 1.0 A (TJ
LM140
LM340
LM140
LM340
LM140. LM340
LM140
LM340
RR
=
-
+2S"C)
Dropout Voltage
Output Resistance (I
dB
Yin -yo
=
1.0 kHz)
Short Circuit Current Limit (TJ
Output Noise Voltage (TA
10 Hz '" I '" 100 kHz
Peak Output Current (TJ
=
=
ro
+2S"C)
Ise
+ 2S"C)
+ 2S"C)
Input Voltage to Maintain Line Regulation (TJ
10 = 1.0 A
=
27.1
+ 25"CI
NOTES:
1. Tlow = -55'C for LM140
Thigh = + 1S0'C for LM140
O'C for LM340
= + 12S'C for LM340
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-60
LM140,A, LM340,A
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified
by its immunity to changes in load, input voltage, power
dissipation, and temperature. Line and load regulation
are tested with a pulse of short duration « 100 /LS) and
are strictly a function of electrical gain. However, pulse
widths of longer duration (> 1.0 ins) are sufficient to
affect temperature gradients across the die. These temperature gradients can cause a change in the output
voltage, in addition to changes caused by line and load
regulation. Longer pulse widths and thermal gradients
make it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a
specified time, and is expressed as a percentage output
voltage chang~ per watt. The change in dissipated
power can be caused by a change in either the input
voltage or the load current. Thermal regulation is a function of Ie layout and die attach techniques, and usually
occurs within 10 ms of a change in power dissipation.
After 10 ms, additional changes in the output voltage
are due to the temperature coefficient of the device.
Figure 1 shows the line and thermal regulation response of a typical LM140AK-5.0 to a 10 watt input
pulse. The variation of the output voltage due to line
regulation is labeled CD and the thermal regulation component is labeled ®. Figure 2 shows the load and thermal regulation response of a typical LM140AK-5.0 to a
15 watt load pulse. The output voltage variation due to
load regulation is labeled CD and the thermal regulation
component is labeled ®.
FIGURE 2 - LOAD AND THERMAL REGULATION
FIGURE 1 - LINE AND THERMAL REGULATION
t. TIME (2.0 '1ls/div.1
LM14OAK-5.0
Vo = 5.0V
Yin = 8.0 V.... 18 V.... 8.0 V
lout = tOA
t
TIME 12 0 ms/div I
LM14OAK-5.0
Vo = 5.0 V
Yin = 15
lout = OA .... 1.5A .... OA
'"'
....... TJ = 2~oC
f.
.§.
0- 3. 0
z
olf
w
2.0
g~
.... 0
~~
.... -' 1.5
:>«
~~
:>w
~ ~ 1.0
\
10
'"J#I
20
Vin. INPUT VOLTAGE IVdc)
----
TJ
20
1
0.1
0.01
10
10
lout. OUTPUT CURRENT IA)
FIGURE 10 -
in
10 -1.0 A
--
PEAK OUTPUT CURRENT
4.0
.!IV out = 100 mV
!--
I I
o
40
30
I.! I.
VirVIO ~ 15.~ VI
10
DROPOUT VOLTAGE
r-r-- r--
J.
~ 150°C
I I I
'3
TJ = -~5°C
TJ = 25°C
TJ = tSOCC
6!:
>0
,
.;;
~
Vo = 5.0 V
lout = 1.0A
FIGURE 9 2.5
'" _
!3
T;" 25°C
!;;
~ 3.0
I
J
o
«
..l-
~
i"TJ = 150°C
I~ ~55!C
I
.. 4.0
B
0
10
FIGURE 8 - QUIESCENT CURRENT versus
OUTPUT CURRENT
FIGURE 7 - QUIESCENT CURRENT versus
INPUT VOLTAGE
4. 0
1.0
lout. OUTPUT CURRENT IA)
f. FREQUENCY IHzl
~ 30
::!.
0-
_loJ500rnA
I
--l-
2.0
0-
ii:
10 - lOrnA
§
s-
O. 5
1.0
II
o
-15
-50
-25
25
50
15
TA. AMBIENT TEMPERATURE 10C)
100
0
125
0
10
20
30
Vin-VO. INPUT·OUTPUT VOLTAGE OIFFERENTIALIVOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
3-62
40
LM140,A, LM340,A
FIGURE 11 - LINE TRANSIENT RESPONSE
8
FIGURE 12 - LOAD TRANSIENT RESPONSE
3
Vo = 5.0 V
o. 6
-
lout = 150 mA Co = 0
TJ = 25°C
4
2
-
o. 1
0
~~
g~-o
<10
6
-0
2
3"
5
g
5
5
0
0
20
t. TIME
'"
C5
0:
12
-.......
.P
4.0
o
"
FIGURE 14 - WORST CASE POWER DISSIPATION
vefSUS AMBIENT TEMPERATURE jCese 11
HJC = 5°C/W
_
HJA = 65°C/W
TJlmax) 150°C -
-
-50
I
-+-..
No Heat Sink
-25
25
'HS·O
'\
8HS = 5°C/W'\.
50
\
r-....
\.
~
100
.............
o RflJC· 50CIW
R'JA • 65 0CIW
'\
r-75
~
5
\
~.
8HS = 15 0 C/1""'-
~
~
~
40
30
I. TlMEI~sl
I~s)
8HS _IO°C/W
16
8.0
\
20
25
!.
z
:in
1\
10
20
p
"
1\
40
30
FIGURE 13 - WORST CASE POWER DISSIPATION
versus AMBIENT TEMPERATURE (Cese 221AI
0
I
I
0
10
\
V
0;::
.4
1/\
(
~ ~ -0. 1
0
.2
::...'"
Vo - 5.0 V
Vin=10V
Co = 0
TJ = 25°C
o. 2
TJ(ma)()
.........,
--
~
150
o-75
.................
150 0 C
r-.........
0
"~
125
=
'HS' 10 0eIW
~eatSink
-50
15
-25
50
MOTOROLA LINEAR/INTERFACE DEVICES
3-63
-
............. r--.
75
TA. AMBIENT TEMPERATURE 10C)
lA. AMBIENT TEMPERATURE 1°C)
1\
'\.
100
125
11
•
LM140,A, LM340,A
APPLICATIONS INFORMATION
Design Considerations
The LM140 Series of fixed voltage regulators are dewith long wire lengths, or ifthe output load capacitance
signed with Thermal Overload Protection that shuts
is large. An input bypass capacitor should be selected
down the circuit when subjected to an excessive power
to provide good high-frequency characteristics to insure
stable operation under all load conditions. A 0:33 p.F or
overload condition, Internal Short-Circuit Protection
larger tantalum, mylar, or other capacitor having low
that limits the maximum current the circuit will pass,
internal impedance at high frequencies should be choand Output Transistor Safe-Area Compensation that resen. The bypass capacitor should be mounted with the
duces the output short-circuit current as the voltage
shortest possible leads directly across the regulators
across the pass transistor is increased.
input terminals. Normally good construction techniques
In many low current applications, compensation cashould be used to minimize ground loops and lead repacitors are not required. However, it is recommended
sistance drops since the regulator has no external sense
that the regulator input be bypassed with a capacitor
if the regulator. is connected to the power supply filter
lead.
FIGURE 15 -
CURRENT REGULATOR
FIGURE 16 - ADJUSTABLE OUTPUT REGULATOR
Output
--'0
These regulators can also be used as a current source when
connected as above. In order to minimize dissipation the
LM140-5.0 is chosen in this application. Resistor R determines
the current as follows:
5.0 V
10 = -R- + la
10 k
1 k
YO. 7.0 V to 20 V
VIN - Vo " 2.0 V
la '" 1.5 mA over line and load changes
For example, a 1-ampere current source would require R to be
a 5-ohm, 10-W resistor and the output voltage compliance
would be the input voltage less 7.0 volts.
The addition of an operational amplifier allows adjustment to
higher or intermediate values while retaining regulation characteristics. The minimum voltage obtainable with thi arrangement is 2.0 volts greater than the regulator voltage.
FIGURE 17 - CURRENT BOOST REGULATOR
FIGURE 18 - SHORT-CIRCUIT PROTECTION
MJ2955
MJ2955 or Equiv.
'"'"' TV ~M'~
:r
1
Input.
I
1
0m, .
1~"
R
The LM140 series can beeurrent boosted with a PNPtransistor.
The MJ2955 provides current to 5.0 amperes. Resistor R in
conjunction with the VBE of the PNP determines when the pass
transistor begins conducting; this circuit is not short-circuit
proof. Input-output differential voltage minimum is increased
by VBE of the pass transistor.
The circuit of Figure 17 can be modified to provide supply
protection against short circuits by adding a short-circuit sense
resistor, Psc , and an additional PNP transistor. The current
sensing PNP must be able to handle the short-circuit current
of the three-terminal regulator. Therefore, a four-ampere plastic power transistor is specified.
MOTOROLA LINEAR/INTERFACE DEVICES
3-64
®
LM1SO
LM2S0
LM3S0
MOTOROLA
Specifications and Applications
Information
THREE-TERMINAL
ADJUSTABLE POSITIVE
VOLTAGE REGULATORS
THREE·TERMINAL ADJUSTABLE
OUTPUT POSITIVE VOLTAGE REGULATORS
The LM150/250/350 are adjustable 3-terminal positive voltage
regulators capable of supplying in excess of 3.0 A over an output
voltage range of 1.2 V to 33 V. These voltage regulators are exceptionally easy to use and require only two external resistors to set the
output voltage. Further, they employ internal current limiting,
thermal shutdown and safe area compensation, making them
essentially blow-out proof.
The LM150 series serve a wide variety of applications including
local, on card regulation. This device also makes an especially
&imple adjustable switching regulator, a programmable output
regulator, or by connecting a fixed resistor between the adjustment
and output, the LM150 series can be used as a precision current
SILICON MONOLITHIC
INTEGRATED CIRCUIT
K SUFFIX
METAL PACKAGE
CASE 1-03
regulator.
•
•
Guaranteed 3.0 Amps Output Current
Output Adjustable between 1.2 V and 33 V
•
•
•
•
•
•
•
•
Load Regulation Typically 0.1 %
Line Regulation Typically 0.005%/V
Internal Thermal Overload Protection
·Internal Short-Circuit Current Limiting Constant with Temperature
Output Transistor Safe-area Compensation
Floating Operation for High Voltage Applications
Standard 3-lead Transistor Packages
Eliminates Stocking Many Fixed Voltages
(Bottom View)
Pins 1 and 2 electrically isolated from case.
Case Is third electrical connection.
STANDARD APPLICATION
v out
V ln
LM150
T SUFFIX
PLASTIC PACKAGE
CASE 221 A-04
> AI
.
240
IAdil
Adjust
..
+ C
;;:;: I:F
=- C in
~ 0.1 "F
/.
PIN 1. ADJUST
2. Vout
3. Vin
~2
Heatsink surface connected
to Pin 2
--"--
* = Cin
is required if regulator is located en appreciable distance from power
supply filter.
** .., Co
I, not needed for stability, however it does improve transient
ORDERING INFORMATION
response.
V ou ,
~
1.25 V (1
+ A2) + IAdj A2
Tested Operating
Temperature Range
Device
Rl
Since 'Adj i, controlled to less than 100 JlA, the error associated with this
term i. neullglble in most applications
#Automotive temperature range selections are available with special test conditions and
additional tests. Contact your local Motorola sales office for information.
LM150K
LM250K
LM350K
LM350T
LM350BT#
MOTOROLA LINEAR/INTERFACE DEVICES
3·65
TJ
TJ
TJ
TJ
TJ
~
~
~
~
~
-55"C 10 +150"C
-25"C 10 +150"C
O"CIO +125"C
O"C to + 125"C
-40"C to +125"C
Package
Metal Power
Metal Power
Metal Power
Plastic Power
Plastic Power
II
II
LM150, LM250, LM350
MAXIMUM RATINGS
Rating
Input-Output Voltage Differential
Symbol
Power Dissipation
lM150
lM250
lM350
Operating Junction Temperature Range
VI-VO
Value
35
Po
Internally Limited
TJ
-55 to +150
-25 to +150
o to +125
-65 to +150
300
Tstg
Storage Temperature Range
Soldering Lead Temperature (10 seconds)
Unit
Vdc
°C
°C
°C
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VI-Va = 5.0 V; IL = 1.5 A; TJ = Tlow to Thigh; Pmax
[see Note 1].)
LM1501250
LM350
Figure
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
line Regulation (Note 2)
TA = 25°C, 3.0 V'" VI-Va'" 35 V
1
Regline
-
0.005
0.01
-
0.005
0.03
"IoN
Load Regulation (Note 2)
TA = 25°C, 10 rnA '" Il'" 3.0 A
Va'" 5.0 V
Va,. 5.0 V
2
Regload
-
-
5.0
0.1
15
0.3
-
-
5.0
0.1
25
0.5
mV
%VO
Regtherm
-
0.002
-
-
0.002
-
50
100
100
poP.
5.0
-
50
0.2
0.2
5.0
poP.
1.25
1.30
1.25
1.30
V
-
0.02
0.05
-
0.02
0.07
"IoN
-
20
0.3
50
-
1.0
20
0.3
70
1.5
mV
%VO
1.0
-
%VO
3.5
10
4.5
1.0
-
Characteristic
Thermal Regulation, Pulse
TA = 25°C
=
20 ms,
Adjustment Pin Current
3
IAdj
1,2
~IAdj
3
Vref
Line Regulation (Note 2)
3.0 V '" VI-Va'" 35 V
1
Regline
load Regulation (Note 2)
10 mA '" Il '" 3.0 A
Va", 5.0 V
Va,. 5.0 V
2
Regload
Temperature Stability (Tlow '" TJ '" Thigh)
3
TS
-
1.0
-
-
Minimum Load Current to
Maintain Regulation (VI-Va
3
Ilmin
-
3.5
5.0
-
3
Imax
3.0
0.3
4.5
.1.0
-
-
0.003
Adjustment Pin Current Change
3.0 V '" VI-Va'" 35 V
10 mA '" Il '" 3.0 A, Po '" Pmax
Reference Voltage (Note 3)
3.0 V '" VI-Va'" 35 V
10 mA '" IL '" 3.0 A, Po '" Pm ax
-
= 35 V)
Maximum Output Current
VI-Va", 10 V, Po '" Pmax
VI-Va = 30 V, Po '" Pm ax, TA
=
10V,f
=
120Hz
-
N
4
RR
3
Thermal Resistance Junction to Case
Peak (Note 6)
K Package
T Package
Average (Note 7) K Package
T Package
-
NOTES:
(I) Tlow = -55'C for LM150
- 25'C for LM250
O"C for LM350
-
3.0
0.25
-
0.003
-
-
mAo
%VO
dB
-
-
66
65
80
66
65
80
-
0.3
1.0
-
0.3
1.0
-
2.3
-
-
2.3
2.3
-
-
long-Term Stability, TJ = Thigh (Note 5)
TA = 25°C for Endpoint Measurements
1.20
%VOIW
A
= 25'C
RMS Noise, % of Va
TA = 25'C, 10 Hz '" f '" 10 kHz
Ripple Rejection, Va
(Note 4)
Without CAd~
CAd' = 10 p.
1.20
-
S
R9JC
-
Thigh = + 150'C for LM150
+ 150"C for LM250
= + 125'C for LM350
-
-
-
1.5
-
-
-
%/1.0 k
Hrs.
°CIW
-
1.5
1.5
(5) Since long-Term Stability cannot be measured on each device bafore shipment, this specification is an engineering estimate of average stability from lot to lot.
(6) Thermal Resistance evaluated measuring the hottest temperature
on the die using an infrared scanner. This method of evaluation
yields very accurate thermal resistance values which are conservative when compared to other measurement techniques.
(7) The average die temperature is used to derive the value of thermal
resistance junction to case (average).
Pmax = 30 W for K suffix
Pmax = 25 W for T suffix
(2) load and line regulation are specified at constant junction temperature. Changes in Va due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.
(3) Selected devices with tightened tolerance reference voltage available.
(4) CAdi, when used, is connected between the adjustment pin and
ground.
MOTOROLA LINEAR/INTERFACE DEVICES
3-66
LM150, LM250, LM350
SCHEMATIC DIAGRAM
II
0.045
L-~~~--~~~~~~~~~~~~~--~------~-*--------------~--~---oVout
L - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - o Adjust
FIGURE 1 -
LINE REGULATION AND .l.IAdj/LiNE TEST CIRCUIT
Vcc
VOH-VOL
Line Regulation (%N) = ~ x 100
Vout
LM150
Adjust
R1
240
1%
0.1/LF
'Pulse Testing Required:
1% Duty Cycle
is suggested.
R2
1%
MOTOROLA LINEAR/INTERFACE DEVICES
3-67
LM150, LM250, LM350
FIGURE 2 - LOAD REGULATION AND 41AdjILOAD TEST CIRCUIT
Load Regulation (% VOl = Vo (min.
~Oad)
- Vo (max: Load) x 100
o (min. Load)
r - - - - - - , Load Regulation (mV) = Vo (min. Load) - Vo (max. Load)
Vo (min. Load)
Lr.Vo (max. Load)
LMl50
Vout
•
l-<_-------~--_~-
IL
RL
(max. Load)
Adjust
RL
(min. Load)
O.lp.F
"Pulse Testing Required:
1% Duty Cycle is suggested.
-=FIGURE 3 - STANDARD TEST CIRCUIT
Vout
LM150
240
1%
+
O.lp.F
1.0 p.F
Vo
To Calculate R2:
Vo = ISET R2 + 1.250 V
Assume ISET = 5.25 mA
Pulse Testing Required:
1% Duty Cvcle is suggested.
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
24V-f'\
14V---V
Vin
Vout
Vo
LM150
f = 120 Hz
Adjust
240
1%
R1
01"
~~
Cin ;::~ 0.1 p.F
RL
1N4002
+
Co;::~ 1.0 p.F
1.65 k
1%
R2
:+
CAdj
;i::: 10 p.F
I
I
-=-
--'--
= 10 V
IL
"01 Discharges CAdi
.If .Output IS Shorted to Ground .
MOTOROLA LINEAR/INTERFACE DEVICES
3-68
Vo
LM150, LM250, LM350
FIGURE 6 - CURRENT LIMIT
FIGURE 5 - LOAD REGULATION
l
0.4
,..
OJ
~
c
0.2
~
-
OJ
co
~
-0.2
o
>
i -0.4
g -0.6 ' - -
IL '500mA
-
r-......
i::::-+-
~ -0.8
-1.0
-15
-50
-25
0
25
50
15
100
125
TJ. JUNCTION TEMPERATURE lOCI
o
150
I
o
~
a
c
~
::: 2.5
.
is
..
60
co
z
0:
«
....
55
In
::>
50
«
45
J
40
.
a
~
........- ..--
~
/
>
2.0
-50
o 1.5
I
....
~
-25
25
50
15
100
TJ• JUNCTION TEMPERATURE 1°C)
125
I
-15
~ 1.250
co
~
o
IL !·3.0A
IL' 2.0 A
r---... .........
-50
-25
25
50
15
100
TJ• JUNCTION TEMPERATURE 1°C)
~.500mA
~ioomA
125
150.
..--
4.5
-
:i 4.0
r-- ..............
-~
"'
E
TJ ' -55°C
35
::: 3.0
TJ ' 25 OC- b-'"Y
W~
~
c-----
~
~
~
2.5
~
2.0
'I--_~
--
:; 1.5
~1.230
f:;::= ~
d
_CrJ 1.0
>
0.5
-15
r-- I--r-- r--.
5.0
>
~ 1.240
~
1.220
"Vo '100 mV
FIGURE 10 - MINIMUM OPERATING CURRENT
FIGURE 9 - TEMPERATURE STABILITV
1.260
:;
40
.............. ~20mA
>° 1.0
150
..:...:..
._---
...
30
10
20
VI - VO.INPUT - OUTPUT VOLTAGE OIFFERENTIAL IVdc)
I--- ~
;!;
35
-15
'
r-- r--.
....
~
....
::>
V
"'-, --...:::..
'-,
:-r--.
i=
65
,,\: ,
FIGURE 8 - DROPOUT VOLTAGE
>
:; 3.0
10
\.'
---- ------r-:: r-::
- -- ----
:g
FIGURE 7 - ADJUSTMENT PIN CURRENT
<
.3
TJ '250C TJ' 1500C
li
I
~
IL • 3.0 A'"
liD
6
I!
l'
--
I L · D ~ I'"'--..
VI'15 V
Vo
V
...... _ TJ=-550C
rr--
-50
-25
0
25
50
15
100
125
o
150
-;.;,;:; F
~1500C
,/
o
10
20
30
VI - VO.INPUT - OUTPUT VOLTAGE DIFFERENTIAL IVdc)
TJ• JUNCTION TEMPERATURE 1°C)
MOTOROLA LINEAR/INTERFACE DEVICES
3-69
40
II
LM150, LM250, LM350
AGURE 11 - RIPPLE REJECTION versus OUTPUT VOLTAGE
100
80
~
r-.....
z
'"
9
60
~
w
40
~
t
f-f--
1.0
'"«
~>
'" -
·1.5
1.0
~~
0.5
~5
0
i
j
"
0
OC .0.5
>
<1
-1.0
CL =IO;WIT~OUT CtOJ -;;"
"
-J
II
10
20
30
I\
...... "
I
I
I
_!. CAllJ
li1 ..... ,CL =I.O;WITHOUT
\J
IV \.
J '"
f\
1
~
I
L = 1 .F;CAOJ = 10.F
\
t/
I--
1
C
\
10 V
fVo=SOmA
A
25°C I - - -=
1M
lOOK
lK
10K
t, FREQUENCY 1Hz!
/-1
CL =1.F;C AOJ =10.F
f\
;:: 9 0.5
=,.~~
",W
100
FIGURE 16 - LOAD TRANSIENT RESPONSE
1.5
",-
WITHOUT CAOJ
1\.1
CAOJ = 10.F
FIGURE 15 - UNE TRANSIENT RESPONSE
«
10
FIGURE 14 - OUTPUT IMPEDANCE
I
25 p.F, CADJ > 10 p.F).
Diode D 1 prevents Co from discharging thru the I.C.
during an input short circuit. Diode D2 protects against
capacitor CADJ discharging through the I.C. during an
output short circuit. The combination of diodes D 1 and
D2 prevents CADJ from discharging through the I.C.
during an input short circuit.
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
LM150
I
I
V out
!
\
+
Vref
Adjust
FIGURE 18 - VOLTAGE REGULATOR WITH
PROTECTION DIODES
Vref:: 1.25 V TYPICAL
1N4002
LOAD REGULATION
The LM150 is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance, the
programming resistor (R 1) should be connected as close
to the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation_ The ground end of R2 can be
returned near the load ground to provide remote ground
sensing and improve load regulation_
R2
MOTOROLA LINEAR/INTERFACE DEVICES
3-71
II
LM150, LM250, LM350
FIGURE 19 - "LABORATORY" POWER SUPPLY WITH ADJUSTABLE
CURRENT LIMIT AND OUTPUT VOLTAGE
--
11N4002
•
V, N _
-<>-_.,
V out 1
.....
Vin2
ASC
'0
Vout2
~--o-~~------~---eVo
33 V
240
DS
D,
jlN4001
lN4001
D2
I
10~F
Adjust
Vref
=
SK
1K
Limit
RSC
I
Adjust 2
lN4001
Current
1 ~F
Tantalum
-;-'o-m--ax=+-:'-D-S-S
Q,
2N3822
1.25 V
IOma~ + lOSS
D4
~10V
Diodes D, and D2 and transistor 02 are added to allow adjustment
of output voltage to 0 volts.
Q
2
OUTPUT RANGE:
0';;;; Va ~ 25 V
0';; '0';; 3 A
~4001
2NS640 ~
06 protects both LM150s during an input short circuit.
-10V
FIGURE 21 - 5 V ELECTRONIC SHUT DOWN REGULATOR
FIGURE 20 - ADJUSTABLE CURRENT LIMITER
V out
A,
620
V out
D,
I
lN4001
*~ To provide current limiting of 10
100
to the system ground, the source of
the FET must be tied to a negative
voltage below
~1.25
R2 '"'
I~;~
R,
r f
loma: : IDSS
=
D2
lN4001
1.0~F
Adjust o---~>---'
V.
TTL
720
Control
1 K
2N5640
~inimum
Vo c.::: V(BR)DSS + 1.25 V + VSS
ILmin ~ lOSS < 10 < 3A
AsshownOIAdj/LiNE TEST CIRCUIT
Line Regulation (O'o'V)
VOH-V OL X 100
VOL
I
'---~I-----<:}------1
~OH
V out
VOL
LM317M
Adjust
240
1%
0.1 IlF
4
1 I'F
Pulse Testing Required:
1 % DutY Cycle
is suggested.
MOTOROLA LINEAR/INTERFACE DEVICES
3-75
II
LM317M
FIGURE 2 - LOAD REGULATIDN AND ~IAdj/LOAD TEST CIRCUIT
Load Regulation (mV) =
Vo
(min. Load) -
Vo
(max. Load)
Va (min. Load) - Vo (max, Load)
Load Regulation (%Vo) '"
Va (min. L.oad)
X 100
--u-:
V
(
0
min. Load)
Va (max, L.old)
V out
LM317M
RL
II
(max. Load)
240
1%
Adjust
RL
(min. Load)
0.11'F
.. Pul" Testing Required:
1 % Dutv Cycle is suggested.
FIGURE 3 - STANDARD TEST CIRCUIT
V out
LM317M
240
1%
0.1 JJ.F
Vo
To Calculate R2:
Va == ISET R2 + 1.250 V
Pulse Testing Required:
1 % Duty Cycle is suggested.
Assume 'SET"" 5.25 rnA
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
24V
-f"\
14V---V
V out
Vin
Va'" 10
LM317M
f:::: 120 Hz
240
Adjust
Rl
1%
°1'
~~ lN4002
RL
+
Cin ; . : 0.1 I'F
Co;:r: 1 I'F
,
1.65 k
R2
1%
~
,+
**
_.l_
Cadj ' 1 ' 10 ",F
,
I
D, Discharges Cad] If Output IS Shorted to Ground.
* ·Cadi provides an AC Ground to the Adiust Pin.
MOTOROLA LINEAR/INTERFACE DEVICES
3-76
Vo
v
LM317M
FIGURE 5 - LOAD REGULATION
FIGURE 6 - RIPPLE REJECTION
90
l
0.4
'"
0.2
I
w
z
~w
'"«~
o
./
~
-0.2
W;') Cadi" \O"F
I
VI '45 V
VO" 5V
~
Il "'5to40mA
0
g -0.6
- ----
~
--l..
-~
1---
6
~ -0.8
r-- I-- ..L
z
' - VI" 10V
VO' 5 V
Il =5to500mA
>
~ -0.4
/
80
f---
70
~
0:
0:'
-
0:
60 ,-IL"100mA
f'" 120 Hz
-- r----
-
-1.0
VO"IOV
VI'" 14 to 24 V
50
-50
-25
25
50
75
100
TJ. JUNCTION TEMPERATURE lOCI
125
-50
150
FIGURE 7 - CURRENT LIMIT
1.0
/r-- t--
~ 0.80
~
a:: 0.60
0:
a....
0
25
50
75
100
TJ. JUNCTION TEMPERATURE lOCI
::::::: r- r-- r-
"'.........
~ 0.40
- 0.20
10
r---- --
TJ" 25°C
'" ~
'"
125°~
( T
r---- -~-
30
20
---
40
~
50
-15
::
75
100
115
150
FIGURE 10 - RIPPLE REJECTION versus FREQUENCY
1.5
,1.0
II
0.5
~v
/
_
~
~
/'
.,...
~
L.---::'
8ol-----;;>...."=",,.+~cl--+--
70
"L------
...._._ _.
~ :~I---+--f--
~
1
-
IL"4omA
V,=5V±lVpp
VO" 1 25V
\+--+--_._-
_~_f-C-_-__(
~ 401----+--+--+--~1~'-+--1---+---(
~ 3ol---+--+--+--~I~
\.-+--1----+-__(
~ 2o-----·-f----+---r----I---,f---t-·--+-~
-----
10-------·
II
10
f\ t--- -..-
.--+1-----1
90 f---f--f---I---I·--+--+I
~ Ll
-TJ 250 c
~ 3. 5-TJ = 125°C--4. :
~
50
15
100,---,--,--,---,--,---,--,--,
4.
o
c---
TJ. JUNCTION TEMPERATURE lOCI
FIGURE 9 - MINIMUM OPERATING CURRENT
3
-
--
-50
5. 0
3.0
.. ,
t-- r---.
0.5
VI- Vo. INPUT - OUTPUT VOLTAGE OIFFERENTIAL (VOL TSI
a::
IL" 500mA
r-I--- r---.
IL" 100 mA
"" ""
TJ =
6
a
150
FIGURE B - DROPOUT VOLTAGE
I'..
=>
o
o
o
-25
1.5
-
~
1
•
r--- Without Cadj
--j/
-r-- ht:
~
20
30
40
10
100
lK
VI- VO.INPUT - OUTPUT VOLTAGE OIFFERENTIALIVOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
3-77
10K
100 K
1m
f, FREQUENCY 1Hz)
•
LM317M
FIGURE 12 - ADJUSTMENT PIN CURRENT
FIGURE 11 - TEMPERATURE STABILITY
80
1.260
1
~
a'"z
'>
;;; 1.250
~
~
">
r-- :---....
/'
/
............
t-....
1'240
.,.1.230
~
:>
0:
....
!z
,I
Va "'Vref
65 ! - -
--ll"00mA
60
55
~
a
'"
~
45
IH
I~
-50
~
g
-
0.2
1
1
.1
/
Bandwidth 100 Hz to 10 kHz
= Vref
f-- 'l '50mA
w
~
....J
">
~
150
12
I- V,' 4.2510 41.15 V
Va
125
FIGURE 14 - OUTPUT NOISE
,-0.4 -
O'
25
50
75
100
TJ. JUNCTION TEMPERATURE lOCI
-25
FIGURE 13 - LINE REGULATION
~
--:::
k-:::: ~-
V
35
H
~
H
100
TJ. JUNCTION TEMPERATURE lOCI
V-.....
./'
~ 40
1.220
-25
r---- ll ',0mA
~ 50
V, '4.2V
Va'" Vref
Il" SmA
-50
1
.1
70 I--- I- V,' 6.25 V
-0.2
-0.4
f--
0-0.6
6
~ -0. 8
-
/"
V
--
I--- 1--60
-I. 0
V
V
V
-~
!--
....... ~
V
4.0
-50
-15
0
25
50
75
100
TJ.JUNCTION TEMPERATURE lOCI
125
150
-50
3
5
5
0
i/\
Cl '" llJ F
J:-
,"-.
5
VO' 1.25 V
0
TJ,25 0C
-
2
3
Cl ' 0
I
.5
---JI'
10
20
30
125
150
/,,\
1-J
1
A
.0
0
---
V \
5
I
I
2
,_
I,
I
,I
II---- Cl,1"F;C,dj"0"F
1/
IL"20mA
25
50
75
100
TJ. JUNCTION TEMPERATURE lOCI
FIGURE 16 - LOAD TRANSIENT RESPONSE
FIGURE 15 - LINE TRANSIENT RESPONSE
0
-25
O?'
0
40
~,
'1
1
I
I
I
I
I X~ :1' r---
i \I
Gl "'O.3j.LF;Cadj~ 10pF -
V,' 15 V
VO'IOV
r--
~l"0mA
C-
J = 25°C
!
..... 'l
II
r\'
1
\1
Y
10
20
t,
t, TIME (/-Is)
MOTOROLA LlNEAR/INT'ERFACE DEVICES
3-78
,,
/,'
TIME (jJs)
30
40
LM317M
APPLICATIONS INFORMATION
BASIC CIRCUIT OPERATION
The LM317M is a 3-terminal floating regulator. In operation, the LM317M develops and maintains a nominal
1.25 volt reference (V ref) between its output and adjustment terminals. This reference voltage is converted
to a programming current (lprog) by Rl (see Figure 17),
and this constant current flows through R2 to ground.
The regulated output voltage is given by:
Va
=
EXTERNAL CAPACITORS
A 0.1 /LF disc or 1 /LF tantalum input bypass capacitor
(Cin) is recommended to reduce the sensitivity to input
line impedance.
The adjustment terminal may be bypassed to ground
to improve ripple rejection. This capacitor (Cadj) prevents ripple from being amplified as the output voltage
is increased. A 10 /LF capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 volt application.
Although the LM317M is stable with no output capacitance, like any feedback circuit, certain values of
external capacitance can cause excessive ringing. An
output capacitance (Co) in the form of a 1 /LF tantalum
or 25 /LF aluminum electrolytic capacitor on the output
swamps this effect and insures stability.
R2
Vref (1 + Rl) + ladjR2
Since the current from the adjustment terminal (ladj)
represents an error term in the equation, the LM317M
was designed to control ladj to less than 100 pA and
keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes
the requirement for a minimum load current. If the load
current is less than this minimum, the output voltage
will rise.
Since the LM317M is a floating regulator, it is only
the voltage differential across the circuit that is important to performance, and operation at high voltages with
respect to ground is possible.
PROTECTION DIODES
When external capacitors are used with any I.C. regulator it is sometimes necessary to add protection
diodes to prevent the capcitors from discharging
through low current points into the regulator.
Figure 18 shows the LM317M with the recommended
protection diodes for output voltages in excess of 25 V
or high capacitance values (Co> 25 /LF, Cadj > 5.0 /LF).
Diode Dl prevents Co from discharging thru the I.C.
during an input short circuit. Diode D2 protects against
capacitor Cadj discharging through the I.C. during an
output short circuit. The combination of diodes 01 and
D2 prevents Cadj from discharging through the I.C. during an input short circuit.
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
Yin
LM317M
Adjust
I
J
=
!
\
+
R,
Vref
ladj
Vref
Vout
llpro9
1
FIGURE 18 - VOLTAGE REGULATOR WITH
PROTECTION DIODES
Vo
R2
- , .25 V Typical
D,
1
'N4002
-=
T Co
D2
Adjust Q--_._ _....--' , N4002
LOAD REGULATION
The LM317M is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance,
the programming resistor (Rl) should be connected as
close to the regulator as possible to minimize line drops
which effectively appear in series with the reference,
thereby degrading regulation. The ground end of R2 can
be returned near the load ground to provide remote
ground sensing and improve load regulation.
Cadj
MOTOROLA LINEAR/INTERFACE DEVICES
3-79
II
II
LM317M
FIGURE 19 - ADJUSTABLE CURRENT LIMITER
Vout
A,
Va
FIGURE 20 - 5 V ELECTRONIC SHUTDOWN REGULATOR
_10
2.5 k
V out
f---o----4o---..... Va
°1
120
1N914
·To provide current limiting of 10 to
the system ground, the source of the
current limiting diode must be tied
°2
Adjust
lN914
to a negative voltage below -7.25 V.
R
TTL
720
Control
1 k
;;Ilo Vref
2
I,·OllF
0---.....---'
lOSS
R, =
Vref
lOmax + lOSS
Vo < Pav + 1.25 V + VSS
ILmin - Ip < 10 < 500mA As shown 0 < 10 < 495 rnA
Minimum
Ip
Vo
= 1.25 V
0, protects the device during an input short circuit.
FIGURE 21 - SLOW TURN-ON REGULATOR
FIGURE 22 - CURRENT REGULATOR
10
V out
1---9----.....- .. Vo
240
Adjust
-r----.
lN4001
50 K
2l:~
Rl
...",
1.25 V
- R, + R2
5 rnA
<
MOTOROLA LINEAR/INTERFACE DEVICES
3-80
lout
<
500 rnA
@ MOTOROLA
LM337M
Specifications and Applications
Information
MEDIUM-CURRENT
THREE-TERMINAL
ADJUSTABLE NEGATIVE
VOLTAGE REGULATOR
THREE-TERMINAL ADJUSTABLE
OUTPUT NEGATIVE VOLTAGE REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The LM337M is an adjustable 3-terminal negative voltage regulator capable of supplying in excess of 500 mA over an output
voltage range of -1.2 V to - 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to
set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it
essentially blow-out proof.
The LM337M serves a wide variety of applications including
local, on-card regulation. This device can also be used to make a
programmable output regulator; or, by connecting a fixed resistor
between the adjustment and output, the LM337M can be used as
a precision current regulator.
PIN 1. ADJUST
2. Yin
• Output Current in Excess of 500 mA
3. You!
• Output Adjustable Between -1.2 V and - 37 V
TSUFFIX
PLASTIC PACKAGE
CASE 221A-04
• Internal Thermal Overload Protection
• Internal Short-Circuit-Current Limiting
• Output Transistor Safe-Area Compensation
• Floating Operation for High Voltage Applications
ORDERING INFORMATION
• Standard 3-Lead Transistor Packages
Tested Operating
Device
• Eliminates Stocking Many Fixed Voltages
TJ
LM337MT
LM337MBT TJ
Temperature Range
~
~
O"Cto +12S"C
-40"Cto +12S"C
STANDARD APPLICATION
+
Co"
1.0J.'F
YOU!
~J-~-----4~---------O-VOU!
·Cin is required if regulator is located more than 4 inches from power supply
filter. A 1.0 f.LF solid tantalum or 10 J.LF aluminum electrolytic is recommended.
**Co is necessary for stability. A '.0 IJ.F solid tantalum or 10 J.LF aluminum
electrolytic is recommended.
Vout ~ -1.2S V (1 +
R2
R1")
#Automotive temperature range selections are available with special test conditions and
additional tests. Contact your local Motorola sales office for information.
MOTOROLA LINEAR/INTERFACE DEVICES
3-81
Package
Plastic Power
Plastic Power
II
II
LM337M
MAXIMUM RATINGS
Rating
Input-Output Voltage Differential
Power Dissipation
Operating Junction Temperature Range
Storage Temperature Range
Svmbol
Value
Unit
VI-Va
40
Vdc
Po
Internally limited
TJ
Oto +125
°C
TstQ
-65to +150
°C
~ 5.0 V, 10 ~ 0.1; TJ ~ Tlow to Thigh [see Note 11. Pm ax per Note 2,
unless otherwise specified.)
ELECTRICAL CHARACTERISTICS (lVI-Vol
Characteristic
Figure
Svmbol
Line Regulation (Note 3)
TA ~ 25°C, 3.0 V '" lVI-Vol'" 40 V
1
Regline
Load Regulatibn (Note 3)
TA ~ 25°C, 10 mA '" 10 '" 0,5 A
IVai'" 5.0 V
IVai" 5.0 V
2
Regload
Thermal Regulation
10 ms Pulse, TA ~ 25°C
-
Adjustment Pin Current
Regtherm
3
lad'
Adjustment Pin Current Change
2.5 V '" lVI-Vol'" 40 V, 10 mA '" IL '" 0.5 A,
Po '" Pmax, TA ~ 25°C
1,2
~Iadj
Relerence Voltage (Note 4)
3,0 V '" lVI-Vol'" 40 V, 10 mA '" 10 '" 0.5 A,
Po '" Pmax, TA ~ 25°C
Tlow to Thigh
3
Vrel
line Regulation (Note 3)
3,0 V '" lVI-Vol'" 40 V
1
Regline
Load Regulation (Note 3)
10 mA '" 10 '" 0.5 A
IVai'" 5.0 V
IVai" 5,0 V
2
Regload
15
0,3
50
1,0
mV
%VO
0.03
0.04
-
65
100
p.A
2.0
5.0
p.A
%VOIW !
V
-
%,V
rnV
1.5
2,5
6.0
10
0,5
0,1
0.9
0.25
-
0.003
-
66
60
-
77
-
S
-
0,3
1,0
R8JC
-
7.0
-
RMS Noise, % 01 Va
TA ~ 25°C, 10Hz'" I '" 10 kHz
-
N
4
RR
-
0.07
%VO
3
Thermal Resistance Junction to Case
0.02
-
Maximum Output Current
lVI-Vol'" 15 V, Po '" Pmax
lVI-Vol ~ 40 V, Po '" Pmax, TA ~ 25°C
3
-1.287
·-1.30
,
-
rnA
-
Long Term Stability, TJ ~ Thigh (Note 6)
T A ~ 25°C lor Endpoint Measurements
-1.250
-1.25
0.6
TS
NOTES.
(1) Tlow to Thigh ~ O°C to
-
%VO
ILmin
120 Hz (Note 5)
%N
70
1.5
3
~
Unit
0.04
20
0.3
3
-10 V, I
Max
0.01
-1,213
-1,20
Minimum Load Current to
Maintain Regulation (lVI-Vol'" 10 V)
(lVI-Vol'" 40 V)
~
TVp
-
I
Temperature Stability (Tlow '" TJ '" Thigh)
Ripple Rejection, Va
Without Cadj
Cad' ~ 10 /LF
Min
A
Imax
0'0
Vo
dB
0'0,1.0 k
Hrs.
°C.W
(4) Selected devices With tightened tolerance reference voltage
+ 125°C
available.
(2) Pm ax ~ 7.5 W
(5) Cadi' when used, is connected between the adjustment pin and
ground.
(3) Load and line regulation are specified at constant junction temperature. Changes in Va due to heating effects must be taken into
account separately. Pulse testing with low duty cycle is used.
(6) Since Long Term Stability cannot be measured on each device before
shipment, this specification is an engineering estimate of average
stability from lot to lot.
MOTOROLA LINEAR/INTERFACE DEVICES
3-82
lM337M
SCHEMATIC DIAGRAM
60
Adjust
100
\
2.5 k
~
2k
810
j{21k
~
--+-....J
15 pF
5k
t....t
750
Y
I~
'f
~
~
15'pF
lOOk
0
0
18 k
ro
~
~
ho.
2k
--r
4k
f/
t-..
6.0k
f/
~
ho.
100
}~;Q k~
N~
-{
600
220
,25
pF
I
~
t'
0
0
ro
f¥
60k
Vout
ri
10k
2.9
k
rt
~_
~
!O
'1
100pF
""
~O
0
N
4.0
~~
500
k
~
ho
18k
15
500
FIGURE 1 - LINE REGULATION AND "Iodj/LINE TEST CIRCUIT
1
1%
~F
, I'F
R'
* Pulse Testing Required:
120
,%
1 % Duty Cycle
is suggested.
V out
MOTOROLA LINEAR/INTERFACE DEVICES
3-83
2.0
'pF
~
50k
100k
R2
30k
>-"Mr
240
5.0 pF
f
2.4 k
r
155
0
~
K
"----<
a2
15
O.
•
LM337M
FIGURE 2 - LOAD REGULATION AND 61adj/LOAD TEST CIRCUIT
R2
1%
·Pulse Testing required:
1 % Duty CYcle i, suggested.
II
RL
(max.
J1..
Load)
Load Regulation (mV) =
Va
(f'!'in. Load) -
Va
(max, Load)
-Va
(min. Load)
Va
(max, Load)
Load Regulation (%Vo) = Va (min. Load) - Va (max. Load)
Va (min. Load)
X 100
FIGURE 3 - STANDARD TEST CIRCUIT
R2
1%
1 )'F
120
To Calcula1e R2:
R2°
(~ -~
\Vref
R1
')
This assumes ladj
is negligible.
Pulse Testing Required:
1 % Duty Cycle is suggested.
FIGURE 4 - RIPPLE REJECTION TEST CIRCUIT
Adjust
R1
01'
120
1N4002
V out
Voo-1.25V
14.3V ____~
4.3 V - - - - . ___~
·0, Discharges Cadi if Output is shorted to Ground.
f "" 120 Hz
MOTOROLA LINEAR/INTERFACE DEVICES
3-84
lM337M
FIGURE 6 - CURRENT LIMIT
FIGURE 5 - LOAO REGULATION
20
0.2
-
~
co -0.2
z
g
-0.4
~
15
r-_
L
~
z
co
;
"
-0.6
I0
"
-0.8
~
"
"
~
~
0
0
_0 05
-1.4
-50
-25
25
50
75
100
TJ,JUNCTION TEMPERATURE IOC)
125
150
FIGURE 7 - AOJUSTMENT PIN CURRENT
70
~
"z
65
0:
I'--- r--
60
~
z
;
«
-0
:!
Vo
~
z
c
_5 'V
VO~100mV
25
r---
co
;
r----- ---------- r---.
20
"
55
~
~
"
0
50
15
r
"z
45
50
75
100
125
150
-50
-25
>-
IL -:--
25
~1.260
E
,-z
co
;
~
o
"
r----
"1
IL '" 20 mA ..........
r-:::::r
50
~
I
I
75
100
100
125
125
150
T J' JUNCTION TEMPERATURE (DC)
~
,? "/
,,-
Ji,-
06
a
ISO
0
TJ = -55 C
TJ " 2S0C
TJ = 150°C
10
0.2
75
-
12
W 0.4
50
--
14
0.8
"d
25
-
16
z
~ 1.240
-25
500 rnA
~
I
18
;r
-50
IL
FIGURE 10 - MINIMUM OPERATING CURRENT
FIGURE 9 - TEMPERATURE STABILITY
il.250
;;;;--....
Tj< JUNCTION TEMPERATURE (CC)
1.270
1.230
t---.
>0 10
40
25
40
0
0
-25
--
30
>
-50
-
30
VO, INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
"
----- - --
~
z
20
FIGURE 8 - OROPOUT VOL TAGE
2'
75
r--
'\.
10
VI
80
~
o
~ t::::::..-
I
o I
o
I
-1.2
>
\
I
"
VI - -15 V
0- -10 V
-10
0
25°e
I50°C
0
I
I
~
0
>
J_55°e r--
- ---TJ
I--TJ
- TJ
IL -05A
It-
-- - --
;7
:;..--
""
II
o
10
20
30
40
VI - VO' INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
MOTOROLA LINEAR/INTERFACE DEVICES
3-85
II
..
LM337M
RIPPLE REJECTION versus OUTPUT CURRENT
FIGURE 12 -
RIPPLE REJECTION versus OUTPUT VOLTAGE
FIGURE 11 100
Cadj'" lOJ.lF
~
80
z
z
~
~
-- -
...........
a
60
40
~.
Without Cadi
~
w
~
~
40 ~+-~+-~-H+H--+-~+-rt++H+--~--~~H1~
IL ::: 50 mA
VI" -:15 V
f" 120 Hz
-
20
u
v,-Vr 5V
-
~
a
>-
I
Vo ~ ·10 V++++H-++++t+HtI-++-+t-l-HtH
f::: 120 Hz
T ~ 25°C +i-tttt--+~-+~+ttiit--++-++-t-hHii
20 -
TJ " 25°C
-
~
o
00
·5
·15
·10
·20
·30
·25
·40
·35
I I
0.1
0.01
FIGURE 14 -
RIPPLE REJECTION versus FREOUENCY
FIGURE 13 -
10
1
'0' OUTPUT CURRENT IAI
VO' OUTPUT VOLTAGE IVI
OUTPUT IMPEDANCE
100
~
80
/' -.......
z
-L-
a
~
=
=
60
"-
...........
~
Without Cadj ""\.
w
~
~
40
'\
ii'
~.
V,
20
~
10
10- 1
~ Wlthou' Cadi
>~
>-
~
:6 10 - 2
10- 3
FIGURE 15 -
FIGURE 16 -
/t\
0
II
--
.I
/\
r.
Without Cadj
\
2
,,' \
I
I
'\
'.1
2
Cadi - 10 /-IF
4
I
0
~
.0
30
20
40
I
Without Cadi
l~ I:":---
I
~ -0. 5
~~
-1. 0
...J
-1. 5
'\/
1\
\
~
V
·'5 V
VO~·10V
/
INL::: 50mA
/
TJ::: 25°C
C\ ~ 1 "F
1
10
I, TIME (psI
MOTOROLA LINEAR/INTERFACE DEVICES
3-86
~---
I
V,
>CJ
\
LOAD TRANSIENT RESPONSE
Cadi" 10.uF
·0.6
Il" 50mA
TJ ~ 25°C
Cl'" lllF
10
\
·0.4
VO~·10V
.5
1M
lOOK
f, FREQUENCY (Hz)
.8
2
10K
lK
100
10
LINE TRANSIENT RESPONSE
.6
.4
10 J..IF
Cadi
10M
1M
lOOK
10K
f, FREQUENCY IHzl
lK
100
:2':
r---
...... ~
_ I L "500mA
TJ" 25°C
o
~
""'-"
-lOV
IL - 500 mA
I"F
~ TJ - 25°C
z
~
·15 V
-VO~'10V
15 V
Va
~ c,
u
Cadi" 10 JlF
V, .
V
20
t, TIME (ps)
30
40
LM337M
APPLICATIONS INFORMATION
be returned near the load ground to provide remote
ground sensing and improve load regulation.
BASIC CIRCUIT OPERATION
The LM337M is a 3-terminal floating regulator. In operation, the LM337M develops and maintains a nominal
-1.25 volt reference (Vref) between its output and adjustment terminals. This reference voltage is converted
to a programming current (lpROG) by Rl (see Figure
17), and this constant current flows through R2 from
ground. The regulated output voltage is given by:
Vout
=
EXTERNAL CAPACITORS
A 1.0 /LF tantalum input bypass capacitor (Cin) is recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground
to improve ripple rejection. This capacitor (Cadj) prevents ripple from being amplified as the output voltage
is increased. A 10 /LF capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 volt application.
An output capacitor (Co) in the form of a 1.0 /LF tantalum or 10 /LF aluminum electrolytic capacitor is required for stability.
R2
Vref (1 + Rl) + ladjR2
Since the current into the adjustment terminal (ladj)
represents an error term in the equation, the LM337M
was designed to control ladj to less than 100 pA and
keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes
the requirement for a minimum load current. If the load
current is less than this minimum, the output voltage
will increase.
Since the LM337M is a floating regulator, it is only
the voltage differential across the circuit that is important to performance, and operation at high voltages with
respect to ground is possible.
PROTECTION DIODES
When external capacitors are used with any I.C. regulator it is sometimes necessary to add protection
diodes to prevent the capacitors from discharging
through low current points into the regulator.
Figure 18 shows the LM337M with the recommended
protection diodes for output voltages in excess of - 25
V or high capacitance values (Co> 25 /LF, Cadj > 10
/LF). Diode 01 prevents Co from discharging thru the
I.C. during an input short circuit. Diode 02 protects
against capacitor Cad; discharging through the I.C. during an output short Circuit. The combination of diodes
01 and 02 prevents Cadj from discharging through the
I.C. during an input short circuit.
FIGURE 17- BASIC CIRCUIT CONFIGURATION
FIGURE 18- VOLTAGE REGULATOR WITH
PROTECTION DIODES
Vr.f
~
-1.25 V Typically
+
LOAD REGULATION
The LM337M is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance,
the programming resistor (Rl) should be connected as
close to the regulator as possible to minimize line drops
which effectively appear in series with the reference,
thereby degrading regulation. The ground end of R2 can
Dl
lN4002
MOTOROLA LINEAR/INTERFACE DEVICES
3-87
Vout
II
II
®
LM2931
MOTOROLA
Series
LOW DROPOUT
VOLTAGE REGULATORS
LOW DROPOUT VOLTAGE REGULATORS
The LM2931 series consists of positive fixed and adjustable output voltage regulators that are specifically designed to maintain
proper regulation with an extremely low input-to-output voltage
differential. These devices are capable of supplying output currents in excess of 100 mA and feature a low bias current of 0.4
mA at 10 mA output.
Designed primarily to survive in the harsh automotive environment, these devices will protect all external load circuitry from
input fault conditions caused by reverse battery connection, two
battery jump starts, and excessive line transients during load
dump. This series also includes internal current limiting, thermal
shutdown, and additionally, is able to withstand temporary powerup with mirror-image insertion.
Due to the low dropout voltage and bias current specifications,
the LM2931 series is ideally suited for battery powered industrial
and consumer equipment where an extension of useful battery
life is desirable. The 'C' suffix adjustable output regulators feature
an output inhibit pin which is extremely useful in microprocessorbased systems.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
Z SUFFIX
Pin I. o u t p u t / ,
PLASTIC PACKAGE
2. Ground
CASE 29-04
3. Input
1
2
TSUFFIX
PLASTIC PACKAGE
CASE 221A-04
Pin
1.lnput~
2. Ground
3. Output
1
2
(Heatsink surface
connected to Pin 2)
04
3
3
FIXED
N.C.
• Input-to-Output Voltage Differential of Less Than 0.6 V at
100 mA
Gnd
Input
• Output Current in Excess of 100 mA
8
N.C.
f Gnd
1
Output
(Top View)
ADJUSTABLE
• Low Bias Current
~~ti~~tt04
• 60 V Load Dump Protection
} Gnd
Gnd
• - 50 V Reverse Transient Protection
Input
• Internal Current Limiting with Thermal Shutdown
Adjust
8
1
D SUFFIX
PLASTIC PACKAGE
CASE 751·02
sop-a
Output
(Top View)
• Temporary Mirror-Image Protection
• Ideally Suited for Battery-Powered Equipment
ADJUSTABLE
T SUFFIX
Pin I. Adjust
PLASTIC PACKAGE
2. Output Inhibit
CASE 3140-01
3. Ground
4. Input
5. Output
INTERNAL SCHEMATIC
Inputo-~--------------------------~---------------
(Heatsink surface
connected to Pin 3)
30 k
ORDERING INFORMATION
Output
Outputo-t--.----------~~+-,
30 k
Output
Inhibit
.><
.><
~
~
Adjust o-+-I"---"I"oIV--["
10 k
*Deleted on Adjustable Regulators
5.8
V
Device
Voltage
Tolerance
LM2931AO-5.0
5.0 V
±2.5%
751
LM2931AT-5.0
5.0 V
±2.5%
221A-02
LM2931 AZ-5.0
5.0 V
±2.5%
29-02
LM2931 0-5.0
5.0 V
±5.0%
751
LM2931T-5.0
5.0 V
±5.0%
221A-02
29-02
LM2931Z-5.0
5.0 V
±S.O%
LM2931ACO
Adjustable
±2.5%
751
LM2931ACT
Adjustable
±2.5%
3140-01
LM2931CO
Adjustable
±S.O%
751
LM2931CT
Adjustable
±5.0%
3140-01
MOTOROLA LINEAR/INTERFACE DEVICES
3-88
Package
Case
Number
LM2931 Series
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vi"
40
Vdc
VinlT)
60
Vpk
-Vin(T)
-50
Vpk
Power Dissipation
Case 29·04 (TO-92)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
PD
8JA
8JC
Internally Limited
178
83
Watts
Case 751 ·02 (SOP-8)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Po
8JA
8JC
Internally Limited
180
45
Watts
Case 221A·03 and 314D·Ol (TO·220 Type)
TA = 25°C
Thermal Resistance Junction to Ambient
Thermal Resistance Junction to Case
Po
8JA
8JC
Internally Limited
65
5.0
Watts
Junction Temperature Range
TJ
-40 to + 125
°C
Storage Temperature Range
Tstg
-65 to + 150
°C
Input Voltage Continuous
Transient Input Voltage
IT'"
100 ms)
Transient Reverse Polarity Input Voltage
1.0% Duty Cycle, T '" 100 ms
II
°CIW
°CIW
°CIW
°CIW
°CIW
°CIW
= 14 V, 10 = 10 rnA, Co = 100 /iF, CO(ESR) = 0.3 fl, TJ = 25°C,
Note 1, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS (Vin
Characteristic
FIXED OUTPUT
Output Voltage
Yin = 14 V, 10 = 10 rnA, TJ = 25°C
Yin = 6.0 V to 26 V, 10 '" 100 rnA, TJ = -40 to 125°C
Line Regulation
Yin = 9.0 V to 16 V
Yin = 6.0 V to 26 V
4.875
4.75
5.0
-
5.125
5.25
4.75
4.50
5.0
-
5.25
5.50
2.0
4.0
10
30
mV
Regline
= 5.0
Load Regulation (10
Output Impedance
10 = 10 rnA. 11.10
V
Vo
=
rnA to 100 rnA)
Regload
Zo
-
2.0
4.0
-
14
50
-
14
50
mV
200
-
-
200
-
mfl
5.8
0.4
30
1.0
-
-
-
5.8
0.4
30
1.0
10
30
-
1.0 rnA, f = 100 Hz to 10 kHz
rnA
Bias Current
Yin = 14 V, 10 = 100 rnA. TJ = 25°C
Yin = 6.0 V to 26 V, 10 = 10 rnA, TJ = -40 to 125°C
IB
Output Noise Voltage (f = 10 Hz to 100 kHz)
Vn
-
700
-
-
700
-
f.LVrms
S
-
20
-
-
20
-
mV/
kHR
60
90
-
60
90
-
dB
-
0.015
0.16
0.2
0.6
-
0.015
0.16
0.2
0.6
Long-Term Stability
Ripple Rejection (f
=
120 Hz)
RR
-
V
Dropout Voltage
10 = 10 rnA
10 = 100 rnA
Yin-YO
Over-Voltage Shutdown Threshold
Vth(OV)
26
29.5
40
26
29.5
40
V
-yo
-0.3
0
-
-0.3
0
-
V
-
Output Voltage with Reverse Polarity Input (Vin = -15 V)
NOTES:
1) low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
2) The reference voltage on the adjustable device is measured from the output to the adjust pin across R,.
MOTOROLA LINEAR/INTERFACE DEVICES
3-89
..
LM2931 Series
ELECTRICAL CHARACTERISTICS (Vin = 14 V, Vo = 3.0 V,IO = 10 rnA, Rl = 27 k, Co
TJ = 25°C, Note I, unless otherwise noted.)
=
100 /LF, CO(ESR)
= 0.3 n,
Characteristic
ADJUSTABLE OUTPUT
Reference Voltage (Note 2, Figure 18)
10 = 10 rnA, TJ = 25°C
10'" 100 rnA, TJ = -40 to 125°C
Output Voltage Range
Line Regulation (Vin
Load Regulation (10
Output Impedance
10 = 10 rnA, tolO
VOrange
= Vo + 0.6 V to 26 V)
= 5.0 rnA to 100 rnA)
=
1.0 rnA, f
=
10 = 100 rnA
10 = 10 rnA
Output Inhibited (Vth(OI)
=
1.23
1.26
1.14
1.08
1.20
1.26
1.32
3.0
2.7 to
29.5
24
3.0
2.7 to
29.5
24
V
mVN
-
0.2
1.5
-
0.2
1.5
0.3
1.0
-
0.3
1.0
Zo
-
40
-
-
40
-
-
6.0
0.4
0.2
-
-
-
1.0
1.0
-
6.0
0.4
0.2
-
-
= 2.5 V)
10Hz to 100 kHz)
120 Hz)
-
0.2
-
-
0.2
140
-
-
140
-
0.4
-
O/O/kHR
-
%N
-
0.015
0.16
0.2
0.6
40
26
29.5
-
-0.3
0
-
0.4
-
0.10
0.003
-
-
0.015
0.16
0.2
0.6
26
29.5
-0.3
0
0.10
V
40
V
-
V
V
Vth(OII
-
2.50
3.25
= 2.5 VI
!LA
/LVrmsi
V
0.003
S
RR
Vth(OVI
-VO
Output Inhibit Threshold Current (Vth(OII
1.0
1.0
-
Over-Voltage Shutdown Threshold
Output Inhibit Threshold Voltages
Output "On," TJ = 25°C
TJ = -40 to 125°C
Output "Off," TJ = 25°C
TJ = -40 to 125°C
-
Vn
Vin-VO
%N
mnN
rnA
IAdj
Dropout Voltage
10 = lOrnA
10 = 100 rnA
Output Voltage with Reverse Polarity Input (Vin = -15 VI
-
-
18
Long-Term Stability
=
1.20
10 Hz to 10 kHz
Adjustment Pin Current
Output Noise Voltage (f
1.17
1.14
Re9l0ad
Regline
Bias Current
Ripple Rejection (f
V
Vref
-
Ith(OI)
2.15
2.26
1.90
1.20
-
-
-
30
50
2.50
3.25
-
2.15
-
1.90
1.20
-
-
30
50
2.26
!LA
DEFINITIONS
Dropout Voltage- The input/output voltage differential
at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output decreases 100 mV from nominal
value at 14 V input, dropout voltage is affected by junction temperature and load current.
Maximum Power Dissipation - The maximum total device dissipation for which the regulator will operate
within specifications.
Line Regulation - The change in output voltage for a
change in the input voltage. The measurement is made
under conditions of low dissipation or by using pulse
techniques such that the average chip temperature is
not significantly affected.
Output Noise Voltage - The rms ac voltage at the output, with constant load and no input ripple, measured
over a specified frequency range.
Bias Current - That part of the input current that is not
delivered to the load.
Long-Term Stability - Output voltage stability under
accelerated life test conditions with the maximum rated
voltage listed in the devices electrical charaeteristics
and maximum power dissipation.
Load Regulation - The change in output voltage for a
change in load current at constant chip temperature.
MOTOROLA LINEAR/INTERFACE DEVICES
3-90
LM2931 Series
FIGURE 2 - DROPOUT VOLTAGE versus
JUNCTION TEMPERATURE
FIGURE 1 - DROPOUT VOLTAGE versus
OUTPUT CURRENT
300
200
I
~
V
~
I-
~VO ~
>
/
E.
«
~
!:;
§:
I-
:::>
II
~
:::>
~ 80
:i?
o
/
6
~40
->
~
V
~ 100
~
'c
->
.,../
o
o
20
40
60
10, OUTPUT CURRENT ImAI
80
101~5~
~
o
o
100
25
10 mA
10
100
50
75
TJ, JUNCTION TEMPERATURE lOCI
125
FIGURE 4 - OUTPUT VOLTAGE versus
INPUT VOLTAGE
FIGURE 3 - PEAK OUTPUT CURRENT versus
INPUT VOLTAGE
6.0
350
l
v::
;
250
a
I-
TJ
5.0
::.-
TJ~ I----:
l-
I--
~
25°C
,.-----'-~J ~
,
~ 150
..;
A
4.0
h
...-:I:?'
/V
o
;:: 3.0
~
.......:V
620
6
>
1.0
devices OilY,
5.0
f-VO ~ 5.0 V
TA ~ 2SOC
;'3
85°C
Dashed lines below Yin = 5.0 V
are for Adjustable output
o
-
2':
V
:::>
:=:::>
50
~loomA
100 mV
~ 200
/
§:
i
/
e-- Yin ~ 14V
I
.1
>160 '--- f--Vin~14V
E.
I;.Vo = 100 mV
w
f- TJ ~ 25°C
120
I
25
10
15
20
Vin, INPUT VOLTAGE IVI
o
o
30
FIGURE 5 - OUTPUT VOLTAGE versus
INPUT VOLTAGE
RL ~ 50 n /
10
II
100 mA
I
I
.11
1.0
~
4.0
2.0
3.0
Vin, INPUT VOLTAGE IVI
FIGURE 6 - LOAD DUMP CHARACTERISTICS
6.0
5.0
I
Vo
TA
5.0 V
~
25°C
I
o
-20
~
RL~500n
1.0
-10
10
20
30
Vin, INPUT VOLTAGE (VI
40
5.0
50
60
t, TIME (50 ms/DIV.1
MOTOROLA LINEAR/INTERFACE DEVICES
3-91
6.0
..
LM2931 Series
FIGURE 7 -
BIAS CURRENT versus INPUT VOLTAGE
12
~
8.0
I'
~ 6.0
RL
~
~ 4.0
=>
'-'
~
4.0
'"sf> 2.0
RL
RL
o
-20
-10
FIGURE 9 -
=
-
100 n
~oon
40
10
20
30
Vin, INPUT VOLTAGE (VI
~2,O
50
BIAS CURRENT versus JUNCTION TEMPERATURE
-
20
FIGURE 10 -
/'
V
40
60
10, OU [PUT CURRENT (mAl
80
100
OUTPUT IMPEOANCE versus FREQUENCY
~
f- Yin = 14 V
Vo = 5.0 V
1.6 r i o = lamA
r l>.IO = 1.0 mA
Co = 100 JLF
'-'
~ 1.2 f- TA = 25'C
10
6.0
= 14 V
= 5.0 V
1!0 mA
~
E
>-
=>
'-'
I--
..--V
/'
/'
2.0
1
Vin
Vo
as~
-
o
o
60
8.0
<
/
z>-
= 50n
-r-
=>
'-'
~
Vin = 14 V
Vo = 5.0 V
TJ = 25'C
r--
6.0
E
>-
BIAS CURRENT versus OUTPUT CURRENT
8. 0
I
Vo = 5.0V_
TJ = 25'C
10
<
FIGURE 8 -
L
I
I
'"
te
4.0
:;:;
~ 0.8
i
10
sf> 2.0
1=
=>
= 50mA
'"e 0.4
10 - 0 mA
-25
FIGURE 11 -
CO(ESRI
= 0.15
Tantalum
l.
nf-
lP
o
o
-55
CO(ESRI = 0.3 n
Electrolr\
o
25
50
75
TJ, JUNCTION TEMPERATURE I'CI
10
125
100
1.0 k
10 k
100 k
t, FREQUENCY IHzl
100
1.0M
10 M
FIGURE 12 - RIPPLE REJECTION versus
OUTPUT CURRENT
RIPPLE REJECTION versus FREQUENCY
95
95
r---
~
~
~
Yin = 14 V
Vo = 5.0 V
l>.Vin = 100 mV
RL = 500n
Co = 100 JLF
TA = 2rC
\ 1\ CO(ESRI -
0.15 n
,\ irz\V/ N
0.31~- /
CO(ESRI =
Electrolytic
,
[------'
Yin
Vo
TA
65
100
1.0 k
10 k
100 k
t, FREQUENCY IHzl
1.0M
"""
- t = 120Hz
55
10
= 14 V
= 5.0 V
10M
o
...........
--
I---
= 25'C
20
40
60
10, OUTPUT CURRENT (mAl
MOTOROLA LINEAR/INTERFACE DEVICES
3-92
~
80
100
LM2931 Series
z
0
FIGURE 13 -
!;1
z
LINE REGULATION
FIGURE 14 -
0
LOAD REGULATION
!;1
ti:i
Cl
:>
~
II
6
>
."
~
w
'"'::;«
0
>
I-
~
~
.,.
<=
;;-
FIGURE 15 -
REFERENCE VOLTAGE versus
OUTPUT VOLTAGE
1.240
~
w
- LM2~31 C Adiu~l.ble
2,5 ~!0=10mA
Vin = Vo + 1,0V
-TA = 25°C
2,4
'"
9
0
~
..:a;
V
1.200
s:
--
::>
~
:>
rE
0
'1i; 1,180
~ 2.1
1.160
o
3,0
6,0
9,0
15
12
VO, OUTPUT VOLTAGE IVI
~ 2.0
18
21
24
OuIPUl 'Off'_
V
I-
2,2
1=
::>
--
/"
2,3
~
15
~
_I--"'
.......-
:I:
I-
'::;
~
2,6
~
10 = 100 mA
Vin = Vo + ,,0 v _
TA = 25°C
1,220
I, TIME 110 I'slOIV,1
FIGURE 16 - OUTPUT INHIBIT-THRESHOLDS
versus OUTPUT VOLTAGE
LM29~'C Ad;u;table_
~
~
..§
I, TIME 110 I'slDIV,1
o
3,0
Oulpul 'Ion'~
6,0
12
15
90
VO, OUTPUT VOLTAGE IVI
18
21
24
TYPICAL APPLICATIONS
FIGURE 17 -
FIXED OUTPUT REGULATOR
FIGURE 18 -
ADJUSTABLE OUTPUT REGULATOR
51
Rl
k
Cin
Co
0.1
I
Ie.
R2
Switch Position 1
= Outpul 'On: 2 = Output 'Off'
Vo = Vref ( 1 +
R2)
R1,
+ lAd; R2
MOTOROLA LINEAR/INTERFACE DEVICES
3-93
Gnd
22.5 k '"
R1 R2
R1+R2
II
LM2931 Series
AGURE 19 - 5.0 A LOW DIFFERENTIAL VOLTAGE REGULATOR
FIGURE 20 - CURRENT BOOST REGULATOR WITH
SHORT-CIRCUIT PROJECTION
D45VH7
r---------~--~
Input
6.0 V
~
68
Output
5.0 V (a 5.0 A
R
The LM2931 series can be current boosted with a PNP transistor. The
D45VH7, on a heatsink, will provide an output current of 5.0 A with an
input to output voltage differential of approximately',O V. Resistor R in
conjunction with the VSE of the PNP determines when the pass transistor
begins conducting. This circuit is not short-circuit proof.
The circuit of Figure 19 can be modified ~o provide supply protection
against short circuits by adding the current sense resistor Rse and an
additional PNP transistor. The current sensing PNP must be capable of
handling the short-circuit current of the LM2931. Safe operating area of
both transistors must be considered under worst case conditions.
FIGURE 22 - OUTPUT NOISE VOLTAGE versus
OUTPUT CAPACITOR IMPEDANCE
FIGURE 21 - CONSTANT INTENSITY LAMP FLASHER
1001P_~
Input <>----0---1
6.4 to 30 V
LM2931C
_ _1IiI!!
E
2.0 k
1
10
CM
#345
:>
E
10
w
'"""
~
0
>
i:j
az
I-
:=>
33 k
~
6.2V-1lJl
:=>
o
>-=
fase "" 2.2 Hz
0
0.01
10
100
1.0 k
10 k
IZol, MAGNITUDE OF CAPACITOR IMPEDANCE Iml1l
APPLICATIONS INFORMATION
The LM2931 series regulators are designed with many
protection features making them essentially blow-out
proof. These features include internal current limiting,
thermal shutdOWn, overvoltage and reverse polarity input protection, and the capability to withstand temporary power-up with mirror-image insertion. Typical application circuits for the fixed and adjustable output
device are shown in Figures 17 and 18.
The input bypass capacitor Cin is recommended if the
regulator is located an appreciable distance (;;> 4") from
the supply input filter. This will reduce the circuit's sensitivity to the input line impedance at high frequencies.
This regulator series is not internally compensated
and thus requires an external output capacitor for stability. The capacitance value required is dependent upon
the load current, output voltage for the adjustable regulator, and the type of capacitor selected. The leaststable condition is encountered at maximum load current and minimum output voltage: Figure 22 shows that
for operation in the "Stable" region, under the conditions specified, the magnitude of the output capacitor
impedance IZol must not exceed 0.4 n. This limit must
be observed over the entire operating temperature
range of the regulator circuit.
With economical electrolytic capacitors, cold temperature operation can pose a serious stability problem. As
the electrolyte freezes, around - 30°C, the capacitance
will decrease and the equivalent series resistance ESR
will increase drastically, causing the circuit to oscillate.
Quality electrolytic capacitors with extended temperature ranges of - 40 to 85°C and - 55 to 105°C are readily
available. Solid tantalum capacitors may be a better
choice if small size is a requirement, however, the maximum IZollimit over temperature must be observed.
Note that in the stable region, the output noise voltage
is linearly proportional to IZol. In effect, Co dictates the
high frequency roll-off point of the circuit. Operation in
the area titled "Marginally Stable" will cause the output
of the regulator to exhibit random bursts of oscillation
that decay in an under-damped fashion. Continuous oscillation occurs when operating in the area titled "Unstable." It is suggested that oven testing of the entire
circuit be performed with maximum load, minimum input voltage, and minimum ambient temperature.
MOTOROLA LINEAR/INTERFACE DEVICES
3-94
®
MOTOROLA
MC1466L
Specifications and Applications
Information
PRECISION WIDE RANGE
VOLTAGE and
CURRENT REGULATOR
PRECISION WIDE RANGE VOLTAGE
AND CURRENT REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
This unique "floating" regulator can deliver hundreds of volts
- limited only by the breakdown voltage of the external series
pass transistor. Output voltage and output current are adjustable.
The MC1466 integrated circuit voltage and current regulator is
designed to give "laboratory" power-supply performance.
L SUFFIX
• Voltage/Current Regulation with Automatic Crossover
CERAMIC PACKAGE
CASE 632-08
• Excellent Line Voltage Regulation, 0.03% +3.0 mV (Max)
• Excellent Load Voltage Regulation, 0.03% +3.0 mV (Max)
• Excellent Current Regulation, 0.2% + 1.0 mA
• Short-Circuit Protection
• Output Voltage Adjustable to Zero Volts
ORDERING INFORMATION
• Internal Reference Voltage
• Adjustable Internal Current Source
Device
I
MC1466L
I
Temperature Range
OOC to +70° C
TYPICAL APPLICATIONS
FIGURE 1 - 0·TO·15 VDC, 10·AMPERES REGULATOR
I
1
Package
Ceramic DIP
FIGURE 2 - 0·T0-40 VDC, 0.5·AMPERE REGULATOR
+20Vdc
+50Vdc
0"
r-+-~+-~~~~~--~--~'
1000 ll F
PinS 1 and4 no connection
J
l-
FIGURE 3 - 0·TO·250 VDC, O.l·AMPERE REGULATOR
FIGURE 4 - REMOTE PROGRAMMING
Uk
MCl466
240pF
11
lN4IJOl
OR EQUIV
lOI'F
J
CR!i
2.5
'L
INPUTVp
v,
1
l
(R- Vp ·20 FORVp<20Vdc, R-O)
0.02
Pins 1,2,3,and4no connection.
MOTOROLA LINEAR/INTERFACE DEVICES
3-95
RS
1:-
II
..
MC1466L
MAXIMUM RATINGS (TA ~ + 25°C unless otherwise noted)
Rating
Symbol
Value
Auxiliary Voltage
Vaux
30
Vdc
Power Dissipation (Package Limitation)
Derate above TA ~ + 50°C
PD
1/8JA
750
6.0
mW
Operating Temperature Range
TA
Storage Temperature Range
Tstg
o to
Unit
mWrC
+70
-65 to +150
°c
°c
ELECTRICAL CHARACTERISTICS (TA ~ + 25°C, Vaux ~ +25 Vdc unless otherwise noted)
Characteristic Definition
la~x
5
J~
"2222~
lOpF
6
MC1466*
12
j'",
'1 ,•• "!1,,
",·'55""
co:ok
1.0~FJ
i:,''-?!
-=50
in
'2N2222~
j2s~\
6
MC1466*
.~
8t~
lV" ""
240pF SI
10
R4
29. R1.212
j'"
as5<'"
".
LO:
R2
~
10:rr
-=-
Uk±m
,
ill
2N3055
OR EOUIV
n
I "
i:t !
=
50
Vo
+Vin
2N2222
OR EOUIV
tJdo
Symbol
Min
Auxiliary Voltage (See Notes 1 & 2)
(Voltage from pin 14 to pin 7)
Vaux
21
Auxiliary Current
laux
Internal Reference Voltage
(Voltage from pin 12 to pin 7)
VIR
17.3
Reference Current (See Note 3)
Iref
-
Typ
-
Max
Units
30
Vdc
9.0
12
mAdc
18.2
19.7
Vdc
QREOlllV
5~OREOUIV
I~
Input Current -
Pin 8
Power Dissipation
Input Offset Voltage, Voltage Control
Amplifier (See Note 4)
0.8
1.0
1.2
mAdc
18
-
6.0
12
"Adc
PD
-
-
360
mW
0
15
40
mVdc
Viov
-
Load Voltage Regulation
(See Note 5)
dViov
dVrefNref
-
1.0
0.Q15
3.0
0.03
mV
%
Line Voltage Regulation
(See Note 6)
dViov
dVrefNref
-
1.0
0.Q15
3.0
0.03
mV
%
TCVo
-
0.Q1
Temperature Coefficient of Output
Voltage (TA
~
-
%f'C
40
mVdc
%
mAdc
0 to + 75°C)
Input Offset Voltage, Current Control
Amplifier (See Note 4)
(Voltage from pin 10 to pin 11)
Vioi
0
15
-
0.2
-
-
1.0
10pF
of
MC1466*
"
~
2N3055
140pF
n
-=
"!"
'"
jJ:o
0.'
of
1~
Characteristic
OAeaUIV
'lit. '1
'I rel
R2
-:-95k±I'"
6
240pF
n
t
~,:~"'
2N3055
OREOUIV
A,
'"
Co~RI
L.;~ I(lU~ :~i v;-!
2"
2¢.",
8.S5k±1'.18k
500
Load Current Regulation
(See Note 7)
dlL/IL
dlref
*Pins 1 and 4 no connection.
MOTOROLA LINEAR/INTERFACE DEVICES
3-96
-
MC1466L
Load Voltage Regulation
NOTE 1:
The instantaneous input voltage, Vaux , must not exceed the
maximum value of 30 volts for the MC1466. The instantaneous
value of Vaux must be greater than 21 volts for the MCl466 for
proper internal regulation.
NOTE 2:
The auxiliary supply voltage Vaux • must "float" and be electrically isolated from the unregulated high voltage supply, Vin.
NOTE 3:
Reference current may be set to any value of current less than
1.2 mAde by applying the relationship:
8.55
aV,elll00%1
Vref
I,el ImAI ~ Rl Iknl"
IV,el 111 - V,el 12111100%1 ~ aV,s11100%1
V,ellli
V,el
Line Voltage Regulation
zero.
"vVref (100%)
NOTE 5:
Load Voltage Regulation is a function of two additive components,l1Viov and aVref, where AViov is the change in input offset
voltage (measured between pins 8 and 9) and .6.V re f is the
change in voltage across R2 (measured between pin 8 and
ground). Each component may be measured separately or the
sum may be measured across the load. The measurement pro~
cedure for the test circuit shown is:
a. With 51 open (14 = 0) measure the value of Viov (1l and
V,ellli
=
IOV'
NOTE 6:
Line Voltage Regulation is a function of the same two additive
components as Load Voltage Regulation, .6.Viov and .6.Vre f (see
Note 5). The measurement procedure is:
a. Set the auxiliary voltage, Vaux , to 22 volts. Read the value
01 Viov 111 and V,el 111·
b. Change the Vaux to 28 volts and note the value of Viov (2)
and Vref (2)' Then compute Line Voltage Regulation:
aViov ~ aViov 111 - Viov 121
% Reference Regulation =
NOTE 4:
A built-in offset voltage (15 mVdc nominal) is provided so that
the power supply output voltage or current may be adjusted to
b. Close 51, adjust R4 so that 14
and V,el 121·
=
+ av·
,el
+
=
.6.Viov.
NOTE 7:
Load Current Regulation is measured by the following
procedure:
a. With 52 open, adjust R3 for an initial load current, ILO), such
that Vo is 8.0 Vdc.
b. With 52 closed, adjust RT for Vo = 1.0 Vdc and read Il(2)'
Then Load Current Regulation =
(lLl21 - ILI1II 1100%1 + I, I
ILlll
e
500 pA and note Viov (2)
where Iref is 1.0 mAde, Load Current Regulation is specified
in this manner because Iref passes through the load in a
direction opposite that of load current and does not pass
through the current sense resistor, Rs.
The~ ~~j~ie;c:W~gUlatio~i~V (2)
IV,el 111 - V,el (2111100%1 ~ aV,elll00%1
V,ellli
V,el
FIGURE 5
OUTPUT
INTERNAL
COMPENSATION
-v..,
o----+-t====!===~~==j:=+----.J
750
4.3k
196k
"k
CR3
550
CA2
'S<
2.2k
INTERNAL
VOLTAGE
REGULATOR
REFERENCE
CURRENT
SOURCE
VOLTAGE
CONTROL
AMPLIFIER
CURRENT
CONTROL
AMPLIFIER
OR
MOTOROLA LINEAR/INTERFACE DEVICES
3-97
OUTPUT
AMPLIFIER
II
MC1466L
FIGURE 6 - TYPICAL CIRCUIT CONNECTION
CR6
Vin
Q1
I,
•
Uk
MC1466
240pF
"
10
CURRENT
reo
-=
R3
92
0.1 pF
'00
12
LIMIT
ADJUST
CAS
A,
18k
AI
I'l v,
Pins 1and4noconnectioo.
C'r
A,
l
NORMAL DESIGN PROCEDURE AND DESIGN CONSIDERATIONS
6. The RC network (10 pF, 240 pF, 1.2 kll.l is used for compensation. The values shown are valid for all applications. How~
ever, the 10 pF capacitor may be omitted if fT of Q1 and Q2 is
greater than 0.5 MHz.
7. For remote sense applications, the positive voltage sense ter~
minal (Pin 9) is connected to the positive load terminal through
a separate sense lead; and the negative sense terminal (the
ground side of R2) is connected to the negative load terminal
through a separate sense lead.
8. Co may be selected by using the relationship:
Co ~ (100 I'F) IL(maxl' where IL(maxl is the maximum load
current in amperes.
9. C2 is necessary for the internal compensation ofthe MCl466.
10. For optimum regulation, current out of Pin 5, 15 should not
exceed 0.5 mAdc. Therefore select Q1 and Q2 such that:
1. Constant Voltage:
For constant voltage operation, output voltage Va is given by:
Vo ~ (lrefl (R21
where R2 is the resistance from pin 8 to ground and 'ref is the
output current of pin 3.
The recommended value of Iref is 1.0 mAde. Resistor R1 sets
the value of I ref:
Iref ~ 8.5
R1
where Rl is the resistance between pins 2 and 12.
2. Constant Current:
For constant current operation:
(al SelectR s for a 250 mV drop at the maximum desired reg-
ulated output current, 'max.
(b) Adjust potentiometer R3 to set constant current output at
desired value between zero and 'max.
3. If Vin is greater than 20 Vdc, CR2, CR3, and CR4 are necessary
to protect the MC1466 during short circuit or transient
Imax '" 0.5 mAdc
131132
where: Imax = maximum short~circuit load current (mAde)
131 ~ minimum beta of Q1
132 ~ minimum beta of Q2
Although Pin 5 will source up to 1.5 mAdc, 15 > 0.5 mAdc will
result in a degradation in regulation.
11. CR6 is recommended when Vo > 150 Vdc and should be rated
such that Peak Inverse Voltage> Vo.
conditions.
4. In applications where very low output noise is desired, R2 may
be bypassed with C1 (0.1 I'F to 2.0 I'FI. When R2 is bypassed,
CR1 is necessary for protection during short circuit conditions.
5. CR5 is recommended to protect the MC1466 from simultane~
ous pass transistor failure and output short circuit.
12. In applications where R2 might be rapidly reduced in value, it
is recommended that CR3 be replaced by Q2 and R4.
8
9
m
R2
C1
0.1 I'F
1
~
Q2
R2
~ R4
This design consideration prevents R2 from being destroyed
by excessive discharge current from Co. Components Q2 and
R4 should be selected such that:
R4
~ ~and
10
VCEO of Q2 "' Vo
MOTOROLA LINEAR/INTERFACE DEVICES
3-98
MC1466L
OPERATION AND APPLICATIONS
This section describes the operation and design of the MCI466 voltage and current regulator and also provides information
on useful applications.
SUBJECT
SE~UENCE
II
Theory of Operation
Applications
Transient Failures
Voltage/Current Mode Indicator
yields a good working PNP from a lateral device working
at a collector current of only a few microamperes. Its base
voltage (V B2) is derived from a temperature compensated
portion of the diode string and consequently the overall
current is dependent on the value of emitter resistor RI.
Temperature compensation of the base emitter junction
of Q3 is not important because approximately 9 volts
exists between VB2 and V12, making the ~VBE's very
small in percentage. Circuit reference voltage is derived
from the product of I Rand RR; if IRis set at I rnA
(RI = 8.S kQ), then RR (in kg) =Yo. Other values of
current may be used as long as the following restraints are
kept in mind: I) package diSSipation will be increased by
about II mW/mA and 2) bias current for the voltage control
amplifier is 3 /lA, temperature dependent, and is extracted
from the reference current. The reference current should
THEORY OF OPERATION
The schematic of Figure S can be simplified by breaking it down into basic functions, beginning with a simplified
version of the voltage reference, Figure 7. Zener diodes
CRI and CRS with their associated forward biased diodes
CR2 through CR4 and CR6 through CR8 form the stable
reference needed to balance the differential amplifier. At
balance (VBI = VB2), the output voltage, (V12 - V7),
is at a value that is twice the drop across either of the two
diode strings: VI2 - V7 = 2 (VCRI + VCR2 + VCR3 +
VCR4). Other voltages, temperature compensated or otherwise, are also derived from these diodes strings for use in
other parts of the circuit.
The voltage controlled current source (Figure 8) is a
PNP-NPN composite which, due to the high NPN beta,
FIGURE 8 - VOLTAGE CONTROLLED CURRENT SOURCE
FIGURE 7 - REFERENCE VOLTAGE REGULATOR
12
14
16 k
i
vaux
Equ;v.lent
Regulated
Voltage
18V
VBl
Equivalent
Diode
VZ""9V
T
1
Diode VZ:=::::9 V
18 k
Rl
12
T
VZ~9V
~>-+---------l
MOTOROLA LINEAR/INTERFACE DEVICES
3-99
2
Q3
I'R:::;
t
VZ-VBE:;::::::S.S5
R1
R1
•
MC1466L
be at least two orders of magnitude above the largest expected bias current.
FIGURE 10 - CURRENT CONTROL CIRCUIT
12
Loop amplification in the constant voltage mode is
supplied by the voltage controlled amplifier (Figure 9), a
standard high gain differential amplifier. The inputs are
diode-protected against differential overvoltages and an
emitter degenerating resistor, Ras, has been added to one
of the transistors. For an emitter current in both Q5 and
Q6 of 1/2 milliampere there will exist a preset offset voltage in this differential amplifier of 15 mV to insure that
the output voltage will be zero when the reference voltage
is zero. Without Ras, the output voltage could be a few
millivolts above zero due to the inherent offset. Since the
load resistor is so large in this stage compared with the
load (Q9) it will be more instructive to look at the gain on
a transconductance basis rather than voltage gain. Transconductance of the differential stage is defined for small
signals as:
10
V2
Va
9
This level is further boosted by the outpu t stage such that
in the constant voltage mode overall transconductance is
about 300 rnA/volt.
A second differential stage nearly identical to the first
stage, serves as the current control amplifier (Figure 10).
The gain of this stage insures a rapid crossover from the
constant voltage to constant current modes and provides
a convenient point to control the maximum deliverable
load current. In use, a reference voltage derived from the
preregulator and a voltage divider is applied to pin 10
while the output current is sampled across RS by pin 11.
When IL RS is 15 mV below the reference value, voltage
VI begins to rapidly rise, eventually gaining complete
control of Q9 and limiting output current to a value of
V2/RS. If V2 is derived from a variable source, short
circuit current may be controlled over the complete output current capability of the regulator. Since the constantvoltage to constant-current change-over requires only a few
millivolts the voltage regulation maintains its quality to
the current limit and accordingly shows a very sharp
"knee" (1% +1 rnA, Figure II). Note that the regulator
can switch back into the constant voltage mode if the
output voltage reaches a value greater than YR. Operation
through zero milliamperes is guaranteed by the inclusion
of another emitter offsetting resistor.
(I)
where
0.026
r " ' - - and
e
IE
RE = added emitter degenerating resistance.
For IE = 0.5 rnA,
1
gm =
1
(2)
1'04 + 30 = 134 = 7.5 rnA/volt.
FIGURE 9 - VOLTAGE CONTROL AMPLIFIER
12
6
6
Preragulatad
lBV
FIGURE 11 - VI CURVE FOR 0- T0-40 V,
O.S-AMPERE REGULATOR
iii
I-
40
a
?
30
-'
w
"
<{
500
B
Reference Voltage
500
I-
20
-'
a
>
>-
+7.25 V
9
+ Output Sense
10
0.1
VR
0.2
0.3
0.4
0.5
I, CURRENT (AMPERES)
MOTOROLA LINEAR/INTERFACE DEVICES
3-100
MC1466L
Transistor Q9 and five diodes comprise the essential
parts of the output stage (Figure 12). The diodes perform
an "OR" function which allows only one mode of operation
at a time - constant current or constant voltage. However,
an additional stage (Q9) must be included to invert the
The analysis thus far does not consider changes in V R
due to output current changes. If IL increases by 500 mA
the collector current of Q9 decreases by 1.25 mA, causing
the collector current of Q5 to increase by 30 /J.A. Accordingly, I R will be decreased by ""0.30 /J.A which will drop
the output by 0.03%. This figure may be improved considerably by either using high beta devices as the pass
transistors, or by increasing IR. Note again, however, that
the maximum power rating of the package must be kept
in mind. For example if IR = 4 rnA, power disSipation is
logic and make it compatible with the driving requirements
of series pass transistors as well as provide additional gain.
A 1.5 rnA collector current source sets the maximum deliverable output current and boosts the output impedance
to that of the current source.
Note that the negative (substrate) side of the MCI466 is
7.2S volts lower than the output voltage, and the reference
regulator guarantees that the positive side is II volts above
the output. Thus the IC remains at a voltage (relative to
ground) solely dependent on the output, "floating" above
and below Yo. VCE across Q9 is only two or three VBE'S
depending on the number of transistors u,ed in the series pass
configuration.
Performance characteristics of the regulator may be approximately calculated for a given circuit (Figure 2). Assuming
that the two added transistors (Q12 and Q13) have minimum
betas of 20, then the overall regulator transconductance will
be:
gmT ~ (400) 300 rnA/volt ~ 120 A/vall
PD=20V(8mA)+(11 Vx3mA)=193mW.
This indicates that the circuit may be safely operated up
to 118 0 C using 20 volts at the auxiliary supply voltage.
If, however, the auxiliary supply voltage is 35 volts,
PD = 35 V (8 mAl + 26 V (3 mAl = 358 mW.
For a change in current of 500 rnA the output voltage
will drop only:
FIGURE 12 -
Figure 6 shows SIX external diodes (CRI to CR6) added
for protective purposes. CRI should be used if the oUlput
voltage is less than 20 volts and CR2, CR3 are absent. For
Vo higher than 20 volts, CRI should be discarded in favor
of CR2 and CR3. Diode CR4 prevents IC failure if the
series pass transistors develop collector-base shorts while
the main power transistor suffers a simultaneous open emitter. If the possibility of such a transistor failure mode
seems remote, CR4 may be deleted. To prevent instantaneous differential and common mode breakdown of the
current sense amplifier, CR5 must be placed across the
current limit resistor Rs.
Load transients occasionally produce a damaging reversal
of current flow from output to input Va > ISO volts (which
will destroy the IC). Diode CR6 prevents such reversal
and renders the circuit immune from destruction for such
conditions, e.g., adding a large output capacitor after the
supply is turned "on". Diodes CR 1, CR2, CR3, and CR5
may be general purpose silicon units such as I N400 I or
equivalent whereas CR4 and CR6 should have a peak inverse
voltage rating equal to Yin or greater.
(4)
MC1466 OUTPUT STAGE
f---------p'e'~~u~ted------- -II
..
.....
From Current
Control Amplifier
(6)
which dictates that the maximum operating temperature
must be less than 91 °c to keep package dissipation within
specified limits.
Line voltage regulation is also a function of the voltage
change between pins 8 and 9, and the change orv ref. In
this case, however, these voltages change due to changes in
the internal regulator's voltages, which in turn are caused
by changes in V aux . Note that line voltage regulation is
not a function of Yin. Note also that the instantaneous
value of Vaux must always be between 20 and 35 volts.
(3)
0.5
6 V =--- = 4.2mV.
120
(5)
From Voltage
Control Amplifier
APPLICATIONS
Figure 2 shows a typical 0-to-40 volts, O.S-ampere regulator with better than 0.0 I % performance. The RC network
between pins 5 and 6 and the capacitor between pins 13 and
14 provide frequency compensation for the MC1466. The
external pass transistors are used to boost load current, since
the output current of the regulator is less than 2 rnA.
vo.--"->(
MOTOROLA LINEAR/INTERFACE DEVICES
3-101
II
II
MC1466l
tible with a short circuit current of 100 mAo Yet current
foldback allows us to design for a maximum regulated load
current of 500 mAo the pertinent design equations are:
Figure 1 is a O-to-IS volts, la-ampere regulator with the
pass transistor configuration necessary to boost the load
current to 10 amperes. Note that Co has been increased to
1000 !.IF following the general rule:
Let R2 (kSl) ; VO
";OV¥ [ls~-11
The prime advantage of the MCI466 is its use as a high
voltage regulator, as shown in Figure 3. This 0-to-250 volts
O.I-ampere regulator is typical of high voltage applications,
limited only by the breakdown and safe areas of the output
RI (kSl); . "-- Vo
I -"
pass transistors.
The primary limiting factor in high voltage series regulators is the pass transistor. Figure 13 shows a safe area curve
for the MJ 413. Looking at Figure 3, we see that if the
output is shorted, the transistor will have a collector current of lOa mA, with a VCE approximately equal to 260
volts. Thus this point falls on the de line of the safe area
curve, insuring that the transistor will not enter secondary
breakdown.
FIGURE 13 - SAFE AREA CURVE FOR THE MJ413
III this respect (Safe Operating Area) the foldback circuit
of Figure 14 is superior for handling high voltages and yet
is short-circuit protected. This is due to the fact that load
current is diminished as output voltage drops (VCE increases
as Va drops) as seen in Figure 15. By careful design the
load current at a short, ISC can be made low enough such
that the combined VCE (Vin) and ISC still falls within the
de safe operating area of the transistor. For the illustrated
design (Figure 14), an input voltage of 210 volts is compa-
o. 0 ~L.0'---2L.0,.-l-:4.L.0...l6...J.UO.l.L,0~-::2LO,.-l-4.LO,..u60...l..l.,LOLO:-2:CO!-:O:-'-:40::-0:L'...l':':OlJOO
VeE, COLLECTOR-EMITTER VOLTAGE (VOL TS)
FIGURE 14 - A 200 V. 0.5·AMPERE REGULATOR WITH CURRENT FOLOBACK
MJ421
T
OR EQUIV
+
1 N4005
OR EQUIV
14
O.I~F
MC1466
25 V
1~
10
RSC
2.5 H/1W
18 k
500
lN4001
OR EQUIV
t-~r-----------------------------~----------------~--~
200 k
1
MOTOROLA LINEAR/INTERFACE DEVICES
3-102
MC1466L
the normal ac line often contains bursts of voltage running
from hundreds to thousands of volts in magnitude and only
microseconds in duration. Under some conditIOns this energy is dissipated across the internal zener connected between pins 9 and 7. This transient condition may produce
a total failure of the regulator device without any apparent
explanation. This type of failure is identified by absence
of the 7 volt zener (CR I) between pin 9 and pin 7. To prevent this failure mode the use of a shielded power
transformer is recommended, as shown in Figure 6. In
addition, it is recommended that C I, C3 and C4 be
included to aid in transient repression. These capacitors
should have good high frequency characteristics.
If the possibility of transients on the output exists, the
addition of a resistor and zener diode between pins 9 and
7 as shown on Figure 17 should be added.
The terms ISC and Ik correspond to the short-circuit
current and maximum available load current as shown in
Figure 15.
FIGURE 15 - TYPICAL FOLDBACK PERFORMANCE
---'----1 --r------,------'--r-
250
~ r----+-~ +--,
200
~
o
...J
!
i
-~f--
II
-t---
150
>
j 100/--+---1"-
f:0
00 50
>
VOLTAGE/CURRENT MODE INDICATOR
10 - OUTPUT CURRENT (mAde)
There may be times when it is desirable to know when the
MCI466 is in the constant current mode or constant voltage
mode. A mode indicator can be easily added to provide this
feature. Figure J 8 shows how a PNP transistor has replaced
a protection diode between pins 8 and 9 of Figure 2. When
the Me 1466 goes from constant voltage mode to constant
current mode, Va will drop below Vg and the PNP transistor
will tum on. The 1 rnA current"supplied by pin 8 will now
be shunted to base of Q2 thereby turning on the indicator
device II.
Figure 16 shows a remote sense application which should
be used when high current or long wire lengths are used. This
type of wiring is recommended for any application where the
best possible regulation is desired. Since the sense lines draw
only a small current, large voltage drops do not destroy the
excellent regulation of the MC1466.
TRANSIENT FAILURES
In industrial areas where electrical machinery is used
FIGURE 16 - REMOTE SENSE
MJE340
OR EQUIV
TO"~F
MJ413
1.2 k
OR EQUIV
6
240 pF
MC1466
25 V
1
11
10
RS
8
18 k
8.55 k
All diodes are
1N4001or
10
500
~F
equivalent.
Note: All Ground Connections at Load Site.
MOTOROLA LINEAR/INTERFACE DEVICES
3-103
II
•
MC1466L
FIGURE 17 - A D-TO-25D VOLT, D_l-AMPERE REGULATOR
MJE340 OR EaUIV
+ 14
5
rO"~F
MJ413 OR EaUIV
1.2 k
6
240 pF
MCl466
25 V
l~100-
15 k
1 k
11
10
8
2.5
18 k
Vz=== 8 V
500
All diodes are
lN40010r
equivalent.
250 k
Va Adjust
FIGURE 18 - D-TO--4D Vdc, D_5-AMPERE REGULATOR WITH MODE INDICATOR
+50 Vdc
0.5
Vc. (CONTROL VOL TAGE TO SCHMITT TRIGGER)
·Select 01 such that VCEO
>
Vo'
MOTOROLA LINEAR/INTERFACE DEVICES
3-104
1
@ MOTOROLA
MC1468
MC1568
DUAL ± 1S-VOLT
TRACKING REGULATOR
DUAL ±1S-VOLT REGULATOR
The MC1568/MC1468 is a dual polarity tracking regulator
designed to provide balanced positive and negative output voltages at currents to 100 mA. Internally, the device is set for
± 15-volt outputs but an external adjustment can be used to
change both outputs simultaneously from 8.0 to 20 volts. Input
voltages up to ± 30 volts can be used and there is provision for
adjustable current limiting.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Internally Set to ± 15 V Tracking Outputs
• Output Currents to 100 mA
• Outputs Balanced to within 1.0% (MCI568)
• Line and Load Regulation of 0.06%
o
~
Oo"o~
• 1.0% Maximum Output Variation Due to Temperature
Changes
o
• Standby Current Drain of 3.0 mA
• Externally Adjustable Current Limit
0
10
(Bottom View)
• Remote Sensing Provisions
G SUFFIX
METAL PACKAGE
CASE 603C-Ol
CIRCUIT SCHEMATIC
VCC
4(7)
3(5)
.-----------..oVo+
.--------~~SENSE
.-+-t-+--..
Compen
(+)'~(3-)+--+--+--'
2(41
(+)
1
14
f~:::::J
1
(2) Balance
J-----+;-:O·Adjust
(L package
onlyl
7(11)
r-N"v-.....----f--'"
COMPEN (-)
eOMP€NI+1
MC1566
MCl468
sc -
.3
15k
R1
IN'·UT-I-_I----c>-l
V~O -
SENS< I-I
R4
15k
COMPEN(-\
Vo-
VEE
S + Vzl
Rint IVO - - Vzl - Rl
Where: Rint
= An Internal Resistor = R1 = 1.0 kG
~
Vz
~
0.68 V
6.6 V
Some common design values are listed below:
± VOM
R2
TC Vo I%I"CI.
14
12
1.2 k
1.8 k
3.5 k
0.003
0.022
0.025
0.028
10
8.0
MOTOROLA LINEAR/INTERFACE DEVICES
3-107
Ie
+ ImAI
10
7.2
5.0
2.6
II
•
MC1468, MC1568
TYPICAL CHARACTERISTICS
(Vee = +20 V, VEE = -20 V, Va = ±15 V, TA = + 25°C unless otherwise noted.)
FIGURE 5 -
FIGURE 6 -
LOAD REGULATION
0
RSC
l1.01--t-"",!~-d:--+"':::::~""'"-+-_±--+--I----l
REGULATOR DROPOUT VOLTAGE
1
= 4.0 OHMS
I
t.vr '" 10~ mV
POSITIVE REGULATOR,
~ 2.01--t--t--+--""""2~=-+
:>
~ 3.01--t--t·--+--+-+~"kc-+,,_±---j1----.j
~ 4·oI--t----t--t--+=±=±=~..""k___1f_'="'"i
o
;: 5.0
0
=>
5
6.01-___1--+-+-+--1--+--+-+--l----l
o
7.0;'0-....L..-+.:--.l..----:4!:-0-...L.--:l60:----.l-+--...L.~100
f--
...-
--
0_
~
FIGURE 7 -
.s
'....."
~
160
"\
\
I"\.
I
ac 120 CURVE NUMBER
PACKAGE, NO HEATSINK
9 -- 21-- LGPACKAGE,
NO HEATSINK
_
3
G
PACKAGE,
INFINITE HEATSINK
;'" 80
~
~
~
+
~
I
I
40
20
40
60
IL, LOAD CURRENT (rnA)
-55
3\ 4\
\
"\. \ \
"\. \
o +25 +50
+75
TA, AMBIENT TEMPERATURE 1°C}
FIGURE 9 -
100
\
0
0
0
0
0
0
"\.
\
~
"'- ~
I
~
+ 40
+
•
+100
~
'\:
~
1
o
CURVE NUMBER
f-1 - G PACKAGE, NO HEATSINK
f-- 2 - L PACKAGE, NO HEATSINK
f-- 3 - G PACKAGE, INFINITE HEATSINK
4 - L PACKAGE, INFINITE HEATSINK
o
+125
2.0
""
'-
4
3"-..,
..........
'-....
..............
~
--
12
4.0
6.0
B.O
10
14
IVin,Vol, INPUT·OUTPUT VOLTAGE DIFFERENTIAL (V)
FIGURE 10 -
ISC versus RSC
\
16
CURRENT-LIMITING CHARACTERISTICS
--
0
TJ = 25°C
"\.
0
"'-
I'-....
I---RSC = 10 OHMS
-t--
~
r---t-
8.0
12
16
20
24
RSC, SHORT·CIRCUIT RESISTOR (OHMS}
RSC
20 OHMS
-
20
0
0
4.0
1\
100
\
0
\
"\.
"\
100
BO
MAXIMUM CURRENT CAPABILITY
I\. \
MCI568
-25
FIGURE 8 -
200
\ \
1--+ MC1468 7----1
o
f-- f..-
"NEGATIVE REGULATOR
2\
4- L PACKAGE, INFINITE HEATSINK
~
~ f..-
0
MAXIMUM CURRENT CAPABILITY
Vin-Vo = 3.0 V
VCC = IVEEI
~ I--
I--- I---';
IL' LOAD CURRENT (rnA)
200
-
0
z
28
0
-55
32
-25
o
+25
+50
+75
TJ, JUNCTION TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
3-108
+100
+125
MC1468, MC1568
TYPICAL CHARACTERISTICS (continued)
(Vee ~ +20 V, VEE ~ -20 V, Vo ~ ± 15 V, TA ~ + 25'e unless otherwise noted.)
FIGURE 11 -
FIGURE 12 -
STANDBY CURRENT DRAIN
5.0
STANDBY CURRENT DRAIN
0
1
Vee ~ IVEEI
II
9. 0
4.0
8. 0
0
i10SITIIVE STANDBY CURRENT- I~
...--:;
5n
+ 25'e
0
--
I
POSITIVE STANDBY CURRENT __
0
+ I 25'e
0
/""
f - - NEGATIVE
STANDBY CURRENT
o
18
20
22
24
26
16
± Vin. INPUT VOLTAGE (± VI
FIGURE 13 -
55'C
+ 25-C
+ 125'C
28
30
V
L.---t--'
-- :.--r ST~NDB)CURR~T
0
I--
0----
NEGAflVE
0
o
32
15
17
16
20
19
18
± VO, OUTPUT VOLTAGE (± VI
TEMPERATURE COEFFICIENT OF
OUTPUT VOLTAGE
FIGURE 14 -
LOAD TRANSIENT RESPONSE
0.06
1
1
,I
0.05 _~ce ~ VEE ~ 30V
RSC ~ 4 OHMS
>
Q
E
G
~ 0.03
t;::
*
--
0.0 2
0.04
-
~
,-
1/
...
~IL ~
RSC
~
0-10 mA
10 OHMS
NEGATIVE REGULATOR
% CHANGE IN Vo
_
erANGE liN JUN1CTION rMPErUREI
17
16
18
19
20
TIME. 20 /LsJDIV
± VO, OUTPUT VOLTAGE (± VI
FIGURE 15 -
~VCCI~ JOVIO L3V
:1
I
I
I
I
I
FIGURE 16 -
LINE TRANSIENT RESPONSE
~
~P=4
-I 0
POSITIVE REGULMOR
.1
~VEE ~
-20Vlo -23V
1
I
I
I
1/
V
--
NEGATIVE
REGUe:.0R
-2 0
~ -30
I,
I
~Vin ~ + 20 10 + 23 V
--,
- RSC ~ 10 OHMS
-I
1
1
RIPPLE REJECTION
-;
RSC
IL
~
~
10 OHMS
10 mA
;7
~ -40
~
:::>
z
-50
V
t"' -60
~
NEGATIVE REGULATOR
/
& -70
~ -80
r
12
:;;;
TIME, 50 /Ls/DIV
- 90
~
-100
100
7
L---I--"
./
L.--:-'
1.0 k
10 k
f. INPUT FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
3-109
P01TIVE
REGULATOR
100 k
1.0 M
..
MC1468, MC1568
TYPICAL CHARACTERISTICS (continued)
(Vee = +20 V, VEE = -20 V, Vo = ± 15 V, TA = + 25°e unless otherwise noted.)
FIGURE 17 - OUTPUT IMPEDANCE
10
RSC 4 OHMS
IL - lOrnA
NEGATIVE REGULATOR
POSITIVE REGULATOR
0.01
100
1.0 k
10 k
100 k
1.0 M
f, TEST FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
3-110
ORDERING INFORMATION
Davice
MCl723CD
MCl723CG
MCl723CL
MCl723CP
MCl723G
MCl723L
Alternate
Temperature Range
O°C to
O°C to
O°Cto
O°C to
LM723CH, pA723HC
LM723CD, pA723DC
LM723CN, pA723PC
- 55°C to
Package
MC1723
MC1723C
50-14
+70°C
+70"C
+70"C
+ 70°C
Metal Can
Ceramic DIP
Plastic DIP
Metal Can
Ceramic DIP
+ 125°C
- 55°C to + 125°C
VOLTAGE REGULATOR
MONOLITHIC VOLTAGE REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC1723 is a positive or negative voltage regulator designed
to deliver load current to 150 mAdc. Output current capability can
be increased to several amperes through use of one or more external
pass transistors. MC1723 is specified for operation over the military
temperature range (-55 0 C to +125 0 C) and the MC1723C over the
commercial temperature range (0 to +700 C)
• Output Voltage Adjustable from 2 Vdc to 37 Vdc
• Output Current to 150 mAde Without External Pass Transistors
PSUFAX
PLASTIC PACKAGE
CASE 646-06
• 0.01% Line and 0.03% Load Regulation
• Adjustable Short-Circuit Protection
(Bottom
FIGURE 1 - CIRCUIT SCHEMATIC
Vee
r--.___r--'_-?-_-'_ _"T_ _ _.-_...;I_12...;I8~
Vc
View):$o
o
G SUFAX
METAL PACKAGE
CASE 603-04
7 (11)
.0
°
0
1
2
B.2V
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
INVERTING
INPUT
PIN NUMBERS ADJACENT TO TERMINALS ARE FOR THE METAL PACKAGE;
PIN NUMBERS IN PARENTHESIS ARE FOR DUAL IN LINE PACKAGES
FIGURE 3 - TYPICAL NPN CURRENT BOOST CONNECTION
FIGURE 2 - TYPICAL CIRCUIT CONNECTION
RSC"O.J3
,--------::=:::-150C
Ripple Rejection (I - 50 Hz to 10 kHzl
Crel = 0
Crel = 5.0 I'F
Regload
%VO
-
-
dB
RR
Short Circuit Current Limit (RSC = 10 n,
-
Vo =01
Long Term Stability
(!)TIOW = OOC for MC1723C
::= _55 0 C for MC1723
@Thi9h= +70° C for MC1723C
= +125 0 C for MC1723
MOTOROLA LINEAR/INTERFACE DEVICES
3-112
MC1723, MC1723C
TYPICAL CHARACTERISTICS
(Vin
= 12 Vde, Vo = 5.0 Vde, I L = 1.0 mAde, RSC = 0, T A = +25 0 C unless otherwise noted.)
FIGURE 4 - MAXIMUM LOAO CURRENT AS A FUNCTION
OF INPUT·OUTPUT VOLTAGE DIFFERENTIAL
FIGURE 5 - LOAD REGULATION CHARACTERISTICS
WITHOUT CURRENT LIMITING
200
+0.0 5
TJmax'" 150 0 C
RTH 150 oC/WPSTANDBY" 60 mW
(No heat sink)
0
~
.s
~
~
~
160
r-r-k
'I\.\~JA
13
'"
~
80
"'"
j+25 C
---
'\.1'-..
~::+125~ I'-...
40
J
0
0
--
TA
~ :;'50C
r-
10
r---..:: :--......
........
"~ -0.05
0
20
-=
§::.
:"i
\,
E
.........,
z
'";::
\ \
120
'"
~
..............
30
20
40
i
~
l:,-
f=::: t:-
l-I-
TA '" -55°C
t--
r- -.::: r-...... r--.
-0. 1
:t:f
r---+--.
TA = +125 DC
Rsc=lOn
~-o 15
0
'"
~
"'"w
'"g
-0 .1
r--
~~
!'-....,
60
40
-
~ t::--..
80
::::1:::::::.
100
.......
-"'..
-0 .2
r---
1i
-0. 2
15
10
20
,
~ ~A=-550C
~~
TA
=+250~
TA" +125 DC
20
10. OUTPUT CURRENT {mAl
~
, -'"
1
30
25
~
\.
RSC = 10 il
0.3
-0 .4
5.0
,
~-......;;: ~
~
1-
Jr"
1\
80
60
40
10. OUTPUT CURRENT ImAI
FIGURE 9 - CURRENT LIMITING CHARACTERISTICS
AS A FUNCTION OF JUNCTION TEMPERATURE
FIGURE 8 - CURRENT LIMITING CHARACTERISTICS
0.8
1.2
RSC :: 10 H
~
200
~
~
'"
0.7
~
~
O. 6
TAi+250C
5
T A = -t5OC
".
[T-
40
60
80
100
--8:: ""
-
t:----
LIMIT CURRENT RSC = 10"
0.4
20
160
LIMITCURRENT ASC= 5"
~
TA" +125 DC
va LTAGE
~
/
w
,..
SENSE
r----. t--... 1"'-
>
6
o
o
-55°C
+0 1
5
.,;
=
FIGURE 7 - LOAD REGULATION CHARACTERISTICS
WITH CURRENT LIMITING
z
-0.0
TA
10. OUTPUT CURRENT ImAI
o>
z
'"
TA - +25 0 C
-0.1 5
+0.0 5
;::
r-
~
FIGURE 6 - LOAD REGULATION CHARACTERISTICS
WITH CURRENT LIMITING
o>
~
............
~ -0. 1
V;n-Vo. INPUT OUTPUT VOLTAGE IVOL TSI
0_
- r-- I"-
+50
-50
~ r--
---
MOTOROLA LINEAR/INTERFACE DEVICES
3-113
'""
;::
:;;
80
~
+100
TJ.JUNCTION TEMPERATURE lOCI
10. OUTPUT CURRENT {mAl
120
t;:- ::",
~
.s,..
"
'"'"
G
40
+150
::::i
•
IVIC1723, MC1723C
TYPICAL CHARACTERiSTICS (continuedl
FIGURE 10 - LINE REGULATION AS A FUNCTION
OF INPUT-OUTPUT VOLTAGE DIFFERENTIAL
+0.2
..1V m
II
FIGURE 11 - LOAD REGULATION AS A FUNCTION
OF INPUT-OUTPUT VOLTAGE DIFFERENTIAL
1
~ +3 V
1
- r- r--
---
t---
,~olmlto'LJ50")
«
g
-0 1
35
25
4.0
f--- Vo
4' 30
V
i:;
0
'"~
~
1.0
~
--...-
=
lL
o
>=
I-----
-
I' t--..
1"-
lL
j----
20
TA
=
-
OUTPUT VOLTAGE
+125 0C
-2.0
-5.0
40
30
.s>
o
>-
o
>
>-
~
=
+ 30
.s
z
0
>=
«
~
./
I
-4 .0
~
4'
II
a
0
3
OUTPUT VOLTAGE
-5.0
C,
'"
I
w
u
1.
a
ill
0
a
z
~
!'"
CI- 1 pF
V
.1
~
\
-8 .0
+45
a
!= Il-50mA
f\
+2. a
+40
FIGURE 15 - OUTPUT IMPEDANCE AS
FUNCTION OF FREQUENCY
40 mA
1\
z
'-
t. TIME (l1s)
+ 10
Il
LOAD CU RRENT
w
"
~
\
T A = +25 DC
FIGURE 14 - LOAD TRANSIENT RESPONSE
"«':;
~
o
+2.0 2z
Yin, INPUT VOLTAGE (VOLTS)
~
50
I
-55 DC
~
j...--
10
40
30
INPUT VOL TAGE
Vref
TA
2.0
I'
FIGURE 13 - LINE TRANSIENT RESPONSE
I
=
IL=O
~
........
Yin VO, INPUT·OUTPUT VOLTAGE (VOLTS)
FIGURE 12 - STANDBY CURRENT DRAIN AS
A FUNCTION OF INPUT VOLTAGE
oc
r-----..
20
10
Vin -VO, INPUT-OUTPUT VOLTAGE (VOLTS)
u
--.........
-0. 1
-0. 2
15
5.0
.s
>'"oc
t--.
o
~
0.0 1
+30
+40
+45
100
10 k
1.0k
f, FREQUENCY (Hz}
MOTOROLA LINEAR/INTERFACE DEVICES
3-114
lOOk
1M
MC1723, MC1723C
TYPICAL APPLICATIONS
Pin numbers adjacent to terminals are for the metal package;
pin numbers in parenthesis are for the dual in-line packages.
< Vo < 7
FIGURE 16 - TYPICAL CONNECTION FOR 2
FIGURE 17 - MC1723,C FOLOBACK CONNECTION
RSC
6(10)
(12) 8
RSC
6(10)
(12) 8
Vo
+Vin
II
Vo
+Vin
(11)7
RA
10(2)
Rl
MC1723
(MC1723C)
Rl
MC1723
(MC1723C)
R3
(5) 3
(5)3
Cref
100 pF
R2
A2
1
113)
(7)5
517)
ISC"
VO OO7[R1R+2R2J
Vsens~ ~ o...:§~
RSC
at TJ
==
+250C
RA =
RSC
For best results 10 k < R1 + R2 < 100 k.
For minimum drift R3 = R111R2.
FIGURE 19 - +5 V, I-AMPERE HIGH
EFFICIENCY REGULATOR
:I: 0.1 pF
lN4001
Equiv
Vin2 _
+10 V
-
Dr
6(10)
(6) 4
MC1723
(MC1723C)
2.2k
I
112)8
6 (10)
10
+5 V
10(2)
MC1723
IMC1723C)
2k
1 (3)
1M
lk
o. l1lF
0.33'
Vo
(12) 8
15)3
2 (4)
(5) 3
5.1k
:t
9(13)
5.1k
17)5
5(7)
FIGURE 20 - +15 V, I-AMPERE REGULATOR
WITH REMOTE SENSE
6 (10)
Vin
(12) 8
V"'-+--..>--o--j
(11)7
1 (3)
MC1723
(MC1723C)
0.1 pF
(614
2 (4)
~2
k
+ Sense
Vo
~-
+15 V
10 k
1000 pF
FIGURE 21 - -15 V NEGATIVE REGULATOR
0.33
.20
Vo
Vin 1
+6.5 V ...4 1 - - - - - - - - - = = _ - , (
=lmH
Vin
+10 V
where
Vsense
ASC '11-0) ISC
FIGURE 18 - +5 V, I-AMPERE SWITCHING REGULATOR
100
~. 10 kn
1-0
Load
-Sense
-=-
Vin:= -20 V
MOTOROLA LINEAR/INTERFACE DEVICES
3-115
+5 V
MC1723, MC1723C
TYPICAL APPLICATIONS (continued)
FIGURE 22 - +12 V, I-AMPERE REGULATOR
a
USING PNP CURRENT BOOST
2N3791
or Equiv
Vin
+18V----E
0.33
100
10k
100pF
12k
(
MOTOROLA LINEAR/INTERFACE DEVICES
3-116
®
MC3423
MC3523
MOTOROLA
Specifications and Applications
Information
II
OVERVOLTAGE
SENSING CIRCUIT
OVERVOLTAGE "CROWBAR" SENSING CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUIT
These overvoltage protection circuits (OVPI protect sensitive electronic circuitry from overvoltage transients or regulator failures
when used in conjunction with an external "crowbar" SCR. They
sense the overvoltage condition and quickly "crowbar" or short
Pl SUFFIX
PLASTIC PACKAGE
CASE 626-05
{MC3423 only)
circuit the supply, forcing the supply into current limiting or open-
ing the fuse or circuit breaker.
The protection voltage threshold is adjustable and the MC34231
3523 can be programmed for minimum duration of overvoltage
condition before tripping, thus supplying noise immunity.
The MC3423/3523 is essentially a "two terminal" system, therefore it can be used with either positive or negative supplies.
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
MAXIMUM RATINGS
Rating
Differential Power Supply Voltage
"""'SeMe-Voltage {1)
- -
Sense Voltage (2)
Output Current
Unit
40
Vdc
~?~~~-~
6.5
6.5
Vdc
7.0
Vdc
300
mA
V act
10
I Operating Ambient Temperature Range
i
Value
VS ense 2
Remote Activation Input Voltage
I
Symbol
VCC,VEE
TA
MC3423
MC3523
Operating Junction Temperature
PlastiC Package
o to +70
-55 to +125
Vdc
'c
PIN CONNECTIONS
'c
TJ
Drive
Output
125
150
Ceramic Package
Storage Temperature Range
i
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
T stg
-65 to +150
oC
Indicator
Output
Remote
Activation
Current
Source
(Top View)
TYPICAL APPLICATION
V out
Current
Limited
ORDERING INFORMATION
DC
Device
Power
Temperature Range
Package
o to + 70 C
Plastic DIP
SO-8
MC3423D
Supply
MC3423P1
G
MC3423U
MC3523U
MOTOROLA LINEAR/INTERFACE DEVICES
3-117
Ceramic DIP
-55to + 125°C
Ceramic DIP
•
MC3423, MC3523
ELECTRICAL CHARACTERISTICS 15 V " VCC -VEE ,,' 36 V, Tlow < TA < Thigh unless otherwise noted.1
Symbol
Min
Typ
Max
Unit
VCC-VEE
4.5
-
40
Vdc
Va
VCC-2.2
VCc-1.8
Indicator Output Voltage
1I0lindi = 1.6 mAl
VOLlindl
-
0.1
0.4
Sense Trip Voltage
ITA = 25 0 CI
VSense 1,
VSense 2
TCVS1
2.45
2.6
2.75
IIH
IlL
-
ISource
0.1
Characteristic
Supply Voltage Range
Output Voltage
110 = 100 mAl
Temperature Coefficient of VSense 1
Vdc
Vdc
Vdc
%/oC
0.06
IFigure 21
Remote Activation Input Current
IVIH = 2.0 V, VCC-VEE = 5.0 VI
IVIL = 0.8 V. VCC-VEE = 5.0 VI
IlA
Source Current
Output Current Risetime
ITA
=
25 0 CI
Propagation Delay Time
ITA
tpd
= 25 0 CI
Supply Current
40
-180
0.2
0.3
400
tr
,
5.0
-120
mA
mAills
-
0.5
-
-
6.0
5.0
10
7.0
IlS
mA
ID
MC3423
MC3523
Tlow = -55°C for MC3523
= OoC for MC3423
Thigh = +125 0 C for MC3523
= + 70°C for MC3423
FIGURE 1 - BLOCK DIAGRAM
Vee
4
Current
Source
Sense 1 Q-1f----t----(
'--.....-+-0
Output
8
VEE
Sense 2 5
6
Remote
Activation
Indicator
Output
FIGURE 2 - SENSE VOLTAGE TEST CIRCUIT
Vee
Switch 1
(AI
~
VI
f'
~
8
VS ense 1
VS ense 2
Ramp V I until output goes high; this is
the VSense threshold.
MOTOROLA LINEAR/INTERFACE DEVICES
3-118
"
MC3423, MC3523
FIGURE 3 - BASIC CIRCUIT CONFIGURATION
Vtrip
=
Vref
(1+~)
"'" 2.6 V
(1+~)
R2";;; 10 kn for minimum drift
To
Load
For minimum value of RG. see Figure 9
• See text for ex planation
( ~ Sense Lead)
FIGURE 4 - CIRCUIT CONFIGURATION FOR SUPPLY VOLTAGE ABOVE 36 V
(+ Sense
Lead)
R1
Power
Supply
~~ad
MC3523
MC3423
RS
= (Vs
~ 10)
Vtrip = Vref
10,uF
kf!
(1+~)
»;;
2.6 V
(1+~)
ltR2:S:;;10kf2
15 V
Q1: VS";; 50 V; 2N6504 or equivalent
Vs ~ 100 V; 2N6505 or equivalent
VS';;;; 200 V; 2N6506 or equivalent
Vs :;;;;- 400 V; 2N6501 or equivalent
Vs .;;;; 600 V; 2N6508 or equivalent
Vs :s;;; 800 V; 2N6509 or equivalent
FIGURE 5 - BASIC CONFIGURATION FOR PROGRAMMABLE DURATION OF
OVERVOLTAGE CONDITION BEFORE TRIP
Vee
V"iPO~------r-----~--------~~~------~---+Vee
Ve
R1
V,ef
-ot~~~t~--Z==
Vo
R2
o
VIO
l--+--I~I-td-=+--'--~1 - 1-
-
-
-
-
-
I
td =I Vref xC"" [12 x10 3 ] C (See Figure 10)
source
MOTOROLA LINEAR/INTERFACE DEVICES
3-119
II
II
MC3423, MC3523
APPLICATIONS INFORMATION
BASIC CIRCUIT CONFIGURATION
The basic circuit configuration of the MC3423/3523
OVP is shown in Figure 3 for supply voltages from 4.5 V
to 36 V, and in Figure 4 for trip voltages above 36 V. The
threshold or trip voltage at which the MC3423/3523 will
trigger and supply gate drive to the crowbar SCR, 01, is
determined by the selection of R 1 and R2. Their values
can be determined by the equation given in Figures 3 and
4, or by the graph shown in Figure 8. The minimum value
of the gate current limiting resistor, RG, is given in
Figure 9. Using this value of RG, the SCR, 01, will receive
the greatest gate current possible without damaging the
MC3423/3523. If lower output currents are required, RG
can be increased in value. The switch, Sl, shown in Figure
3 may be used to reset the SCR crowbar. Otherwise, the
power supply, across which the SCR is connected, must
be shut down to reset the crowbar. If a non current·
limited supply is used, a fuse or circuit breaker, Fl,
should be used to protect the SCR and/or the load.
The circuit configurations shown in Figures 3 and 4
will have a typical propogation delay of 1.0 /lS. If faster
operation is desired, pin 3 may be connected to pin 2 with
pin 4 left floating. This will result in decreasing the propogation delay to approximately 0.5 /ls at the expense of a
slightly increased TC for the trip voltage value.
FIGURE 6 - CONFIGURATION FOR PROGRAMMABLE
DURATION OF OVERVOL TAGE CONDITION BEFORE
TRIP/WITH IMMEDIATE TRIP AT
HIGH OVERVOLTAGES
(+ Sense
+
Lead)
,----
1
Rl
ZI~~
I
Power
Supply
I
2
~
MC3523
R2
5
lK
4~
~
7
T
C
(- Sense Lead)
-
ADDITIONAL FEATURES
1. Activation Indication Output
An additional output for use as an indicator of OVP
activation is provided by the MC3423/3523. This output is an open collector transistor which saturates
when the OVP is activated. In addition, it can be used
to clock an edge triggered flip-flop whose output
inhibits or shuts down the power supply when the
OVP trips. This reduces or eliminates the heatsinking
requirements for the crowbar SCR.
CONFIGURATION FOR PROGRAMMABLE MINIMUM
DURATION OF OVERVOLTAGE CONDITION
BEFORE TRIPPING
In many instances, the MC3423/3523 OVP will be used
in a noise environment. To prevent false tripping of the
OVP circuit by noise which would not normally harm the
load, MC3423/3523 has a programmable delay feature. To
implement this feature, the circuit configuration of Figure
5 is used. In this configuration, a capacitor is connected
from pin 3 to VEE. The value of this capacitor determines
the minimum duration of the overvoltage condition which
is necessary to trip the OVP. The value of C can be found
from Figure 10. The circuit operates in the following
manner: When VCC rises above the trip point set by Rl
and R2, an internal current source (pin 4) begins charging
the capacitor, C, connected to pin 3. If the overvoltage
condition disappears before this occurs, the capacitor is
discharged at a rate"" 10 times faster than the charging
rate, resetting the timing feature until the next overvoltage
2. Remote Activation Input
Another feature of the MC3423/3523 is its remote
activation input, pin 5. If the volage on this CMOS/TTL
compatible input is held below 0.8 V, the MC3423/
3523 operates normally. However, if it is raised to a
voltage above 2.0 V, the OVP output is activated
independent of whether or not an overvoltage condition is present. It should be noted that pin 5 has an
internal pull-up current source. This feature can be
used to accomplish an orderly and sequenced shutdown of system power supplies during a system
fault condition. In addition, the activation indication
output of one MC3423/3523 can be used to activate
another MC3423/3523 if a single transistor inverter is
used to interface the former's indication output to
the latter's remote activation input, as shown· in
Figure 7. In this circuit, the indication output (pin 6)
of the MC3423 on power supply 1 is used to activate
the MC3423 associated with power supply 2. 01 is
any small PNP with adequate voltage rating.
condition occurs.
Occasionally, it is desired that immediate crowbarring
of the supply occur when a high overvoltage condition
occurs, while retaining the false tripping immunity of
Figure 5. In this case, the circuit of Figure 6 can be used.
The circuit will operate as previously described for small
overvoltages, but will immediately trip if the power
supply voltage exceeds VZl + 1.4 V.
MOTOROLA LINEAR/INTERFACE DEVICES
3-120
MC3423, MC3523
FIGURE 7 - CIRCUIT CONFIGURATION FOR
ACTIVATING ONE MC3523 FROM ANOTHER
+
FIGURE 8- Rl versus TRIP VOLTAGE
3D
./
Rl
~
10 k
V'
2D
V
u
V'
V'
V VV VV'
z
«
to
~
'"
II
~~ '\...~V
I
R2 '" 2.7k
V-"". V
V
V
/. V-.......
ID
~ l'l"
.......::: ~
'1jiIP
o
o
5.0
10
15
2D
3D
25
Vr. TRIP VOL lAGE (VO LlSI
Note that both supplies have their negative output
leads tied together (i.e., both are positive supplies). If
their positive leads are common (two negative supplies)
the emitter of 01 would be moved to the positive lead
of supply 1 and R 1 would therefore have to be resized
to deliver the appropriate drive to 01.
FIGURE 9- MINIMUM RG versus SUPPLY VOLTAGE
5
./'
-
3D
CROWBAR SCR CONSIDERATIONS
Referring to Figure 11, it can be seen that the crowbar
SCR, when activated, is subject to a large current surge
from the output capacitance, Couto This capacitance consists of the power supply output caps, the load's decoupiing caps, and in the case of Figure 11A, the supply's
input filter caps. This surge current is illustrated in Figure
12, and can cause SCR failure or degradation by anyone
of three mechanisms: di/dt, absolute peak surge, or 12t.
The interrelationship of these failure methods and the
breadth of the applications make specification of the SCR
by the semiconductor manufacturer difficult and expen·
sive. Therefore, the designer must empirically determine
the SCR and circuit elements which result in reliable and
effective OVP operation. However, an understanding of
the factors which influence the SCR's di/dt and surge
capabilities simplifies this task.
./
L
V
ID
./
RGIMi;) = 0
ilV cc
1---
I
II
I
I
6.0
IVCC 15 V
!;;: 0.8
2:
~
~
O.6- VCC - 40V
!G
ill o.4
w
I
2.0
,/
0
0.2
1/,
I
VCC = 5.01V
~
I I
>
15.0
'/
0.6
0.8
1.0
1.2
1.4
VHf a,!)· HYSTERESIS ACTIVATION VOLTAGE IV)
,I
-
114.0
VCC = 15 V
....--
13'"
ffi 12.0
~
'"
a
-55
1.6
-25
- --
~
~ -10
w
'"
~
-20
>
w
Z
'"
~
/
.
-40
~
"
is
10.0
-
-55
-r-25
a
L
+25
+50
+75
TA. AMBIENT TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
3-126
-
T-- ---..
./
'"
'"
z
0.01
0.1
1.0
CDlY. DELAY PIN CAPACITANCE II'FI
---
. / ...........
/
FIGURE 5 - OUTPUT DELAY TIME versus
DELAY CAPACITANCE
100
V
~ -30
>
+100
L
>-
V
+25
+50
+75
TA. AMBIENT TEMPERATURE lOCI
L
/
/
./
125
VS. nse - 2.500 V VS. nse - 2.600 V
P"""..
'"
Z
100
SENSE TRIP VOLTAGE CHANGE
versus TEMPERATURE
VSense• - 2.400 V
;;-
.s
w
U.V. Sense = 2.5 V
~
-25
t::::--
25
50
75
TA. AMBIENT TEMPERATURE l°e)
FIGURE 4 -
VCC - 5.0 V_ t - - -
_I-"
10.0
-55
r-::::
--r-r---
~ O. 2
t----- VCC = 40 V
13.0
--
;0
0.4
I
VHlact: =
Level
at which Hystersis
Current (lHI is 90%
_ of full value.
'"
FIGURE 3 - HYSTERESIS CURRENT
versus TEMPERATURE
.:i'11.0
VOlta~e
!.o
1.0 )-- VCC = V
~J.
i!5
8.0 - ~ VCC=40V
4.0
ai
HYSTERESIS ACTIVATION VOLTAGE
versus TEMPERATURE
+100
+125
MC3425
FIGURE 8 - INDICATOR OUTPUT SATURATION
VOLTAGE versus OUTPUT SINK CURRENT
FIGURE 7 -DRIVE OUTPUT SATURATION VOLTAGE
versus OUTPUT PEAK CURRENT
,
~
'" 5.0
~
~ 4.0
o
_vccl~15V
~
::>
--- --
~ 3.0
....
5~
2.0
~
c:
~
o
,.~
1.0
0
o
~
i
::>
~
....
~
2.380
""
'"
2.340
I'---..
~
~2.300
~
-55
-25
10
20
30
liND. INDICATOR OUTPUT SINK CURRENT (mA)
4-L A
-I
/
0
+25
6
+50
+75
~ 8.0
/- +100
G,d
1
u
~4.0
+125
TA. AMBIENT TEMPERATURE (OC)
G~dvee
.-
A
f.-
..-
.- ..-
f-"
(
l - I-B
5.Qi
10
I--
I--
I--
TA
15
20
25
30
VCC. POWER SUPPLY VOLTAGE (V)
MOTOROLA LINEAR/INTERFACE DEVICES
3-127
40
POWER SUPPLY CURRENT
versus VOLTAGE
~
!!<
r---
1
Vee
B
0
-1-
..........
II
15V _
TA~25°C
8_~-ense:"~
~
~
/'
VCC~
FIGURE 10 -
/
o
g;:
00
;>
IDRV(peak) ~ 200 mA
1.0% Duty Cycle @ 300 Hz
0",,-
2.420
~
400
I
.I.
VCC~15V
/
/
DRIVE OUTPUT SATURATION VOLTAGE
veo:sus TEMPERATURE
2.50 0
/
/
./
100
200
300
IDRV(peak). DRIVE OUTPUT PEAK CURRENT (mA)
~
~ 2.46
.-
-
~ f--"
FIGURE 9 -
.§'"
I
J
1.0% Duty Cycle @ 300 Hz
-TA ~ 25°C
~
25°C- I-
35
40
MC3425
APPLICATIONS INFORMATION
FIGURE 12 - OVERVOLTAGE PROTECTION OF 5.0 V
SUPPLY WITH LINE LOSS DETECTOR"
FIGURE 11 - OVERVOLTAGE PROTECTION AND
UNDER VOLTAGE FAULT INDICATION WITH
PROGRAMMABLE DELAY
II ?
AlA
Vo = 5.0 V
VOltrip) = 6.25 V
AlB
1.0 k
C~\
8
+
VCC
15 k
~
-
IH
-
...
~11"""-.!H --+-4~s~~~e
~
U.V. Fault
Indicator
Power
Supply
4.5 to 40 V
Sense
~N~ j.:6::....__--+-o
MC3425
U.V. 6
IND
U.V.
O.V.
Sense
MC3~25
3
Line loss
Output
10 k
O.V: 1
DAV
O.V.
Sense
100
O.v.
DlY
/+
A2A
U.V.
DlY
Gnd
t
7
A2B
CDlY
.
U.V. HysteresIs
=
R1B
R2B
IH ( -)
CDlY
U.V. Sense
Gn
Pin 4
U.V. DlY ----- -----...c.:J.- -- 2.5 V
Pin5
~
L-
R1A)
VOltrip) = 2.5 V ( 1 + A2A
AlB + A2B
r\f\/\
~
-r-T-T-L:J--12.5 V
tDlY = 12500 CDlY
FIGURE 13 - OVERVOLTAGE AUDIO ALARM CIRCUIT
FIGURE 14 -
PROGRAMMABLE FREQUENCY SWITCH
I
r----.------------~~------------O+Vo
Input Signal
12 V
5.0 p,F
~0--7
12 k
+
12 V
Alarm On When
VCC
+-__....:3=-1
I.V. pop
Vb '" 13.6 V
O.V.
Sense
0 .V.
2.7 k
4
82k
U.V.
Sense
U.V.
DlY
O.V.
DAV
MC3425
10 k
MC3425
Supply
1
!Iinput) < 25000 COLY
Sense
Power
Output Pulse When
VCC
10 k
4
1.0 k
U.V.
Sense
O.V.
DlY
U.V.
DlY Gnd
Gnd
O.V.
DlY
6.8 k
CDlY
0.1 "F
L---~__~--------------~----~--OGnd
O.V. Sense
Pin 3
fI f\ /\
/"\
V \ T V V 2.5 V
O.V. DlY- ____ ..A. __ A __ 2.5 V
Pin 2
O.V.DRV
Pin 1
A.A.../ L./ L-
~
MOTOROLA LINEAR/INTERFACE DEVICES
3-128
ON
OFF
MC3425
CIRCUIT DESCRIPTION
is based on the constant current source, IDLY(source),
charging the external delay capacitor (CDL Y) to 2.5 volts.
The MC3425 is a power supply supervisory circuit
containing all the necessary functions required to
monitor over- and under-voltage fault conditions. The
block diagram is shown below in Figure 15. The OverVoltage (C.V.) and Under-Voltage (U.V.) Input Comparators are both referenced to an internal 2.5 V regulator. The U. V. Input Comparator has a feedback activated 12.5 pA current sink (lH) which is used for
programming the input hysteresis voltage (VH). The
source resistance feeding this input (RH) determines
the amount of hysteresis voltage by VH = IHRH =
12.5 x 10- 6 RH.
Separate Delay pins (O.v. DLY, U.v. DLY) are provided
for each channel to independently delay the Drive and
Indicator outputs, thus providing greater input noise immunity. The two Delay pins are essentially the outputs of
the respective input comparators, and provide a constant
current source, IDLY(source), of typically 200 p.A when the
non-inverting input voltage is greater than the inverting
input level. A capacitor connected from these Delay pins
to ground, will establish a predictable delay time (tDLY)
for the Drive and Indicator outputs. The Delay pins are internally connected to the non-inverting inputs of the O.V.
and U.V. Output Comparators, which are referenced to
the internal 2.5 V regulator. Therefore, delay time (tDLY)
tDLY
=
Vref CDLY
2.5 CDLY
= --"-=- = 12500 CDLY
IDLY(source)
200 p.A
Figure 5 provides CDLY values for a wide range of time
delays. The Delay pins are pulled low when the respective
input comparator's non-inverting input is less than the
inverting input. The sink current, IDLY(sink), capability
of the Delay pins is? 1.8 mA and is much greater than
the typical 200 p.A source current, thus enabling a relatively fast delay capacitor discharge time.
The Over-Voltage Drive Output is a current-limited
emitter-follower capable of sourcing 300 mA at a turn-on
slew rate of 2.0 AI P.s, ideal for driving "Crowbar" SCA's.
The Under-Voltage Indicator Output is an open-collector,
NPN transistor, capable of sinking 30 mA to provide sufficient drive for LED's, small relays or shut-down circuitry.
These current capabilities apply to both channels operating simultaneously, providing device power dissipation
limits are not exceeded.
The MC3425 has an internal 2.5 V bandgap reference
regulator with an accuracy of ± 4,0% for the basic devices and ± 1.0% for the A-suffix device types at 25°C.
The reference has a typical temperature coefficient of
30 ppmfOC for A-suffix devices.
FIGURE 15 - BLOCK DIAGRAM
VCC
8
o.v.
Sense
3
'---.....t------';-V'""",,,
U.V.
Sense
4
INPUT SECTION
5
U,V.
O.v.
2
DLY
DLY
Gnd
OUTPUT SECTION
Note: All voltages and currents are nominal.
MOTOROLA LINEAR/INTERFACE DEVICES
3-129
II
•
MC3425
CROWBAR SCR CONSIDERATIONS
.,
Referring to Figure 16, it can be seen that the crowbar
SCR, when activated, is subject to a large current surge
from the output capacita nce, Cout, This capacita nce
consists of the power supply output capacitors, the load's
decoupling capacitors, and in the case of Figure 16A, the
supply's input filter capacitors. Thissurge current is illustrated in Figure 17, and can cause SCR failure or degradation by anyone of three mechanisms: di/dt, absQlute
peak surge, or 12 t. The interrelationship of these failure
methods and the breadth of the applications make specification of the SCR by the semiconductor manufacturer
difficult and expensive. Therefore, the designer must
empirically determine the SCR a nd circuit elements
which result in reliable and effective OVP operation.
However, an understanding ofthefactorswhich influence
the SCR's di/dt and surge capabilities simplifies this task.
gate region, very high current densities can occur in
the gate region if high anode currents appear quickly
. (di/pt). This can result in immediate destruction of
the SCR or gradual degradation of its forward blocking
voltage capabilities - depending on the severity of the
occasion .
The value of di/dt that an SCR can safely handle is
influenced by its construction and the characteristics
of the gate drive signal. A center-gate-fire SCR has
more di/dt capability than a corner-gate-fire type, and
heavily overdriving (3 to 5 times IGT) the SCR gate
with a fasl'<1.0!,s rise time signal will maximize its
di/dt capability. A typical maximum number in phase
control SCRs of less than 50 A(RMS) rating might be
200 AI !'s, assuming a gate current of five times IGT
and< 1.0!,s rise time. If having done this, a di/dt problem is seen to still exist. the designer can also decrease
the di/dt of the current waveform by adding inductance in series with the SCR, as shown in Figure 18.
Of course, this reduces the circuit's ability to rapidly
reduce the dc bus voltage and a tradeoff must be made
between speedy voltage reduction and di/dt.
1. di/dt
As the gate region of the SCR is driven on, its area
of conduction takes a finite amount of time to grow,
starting as a very small region and gr.adually spreading.
Since the anode current flows through this turned-on
FIGURE 16 -
TYPICAL CROWBAR CIRCUIT CONFIGURATIONS
16A - SCR ACROSS INPUT OF REGULATOR
------..-----o
f-....
VOU!
16B - SCR ACROSS OUTPUT OF REGULATOR
1--~'--411 \.J~....------..-_Cl Vout .
"Needed if supply is not current limited
MOTOROLA LINEAR/INTERFACE DEVICES
3-130
MC3425
FIGURE 17 -
CROWBAR SCR SURGE CURRENT
WAVEFORM
A WORD ABOUT FUSING
Before leaving the subject of the crowbar SCR, a few
words about fuse protection are in order. Referring back to
Figure 16A, it will be seen that a fuse is necessary if the
power supply to be protected is not output current limited.
This fuse is not meant to prevent SCR failure but rather
to prevent a fire I
In order to protect the SCR, the fuse would have to
possess an 12 t rating less than that of the SCR and yet
have a high enough continuous current rating to survive
normal supply output currents. In addition, it must be
capable of successfully clearing the high short circuit
currents from the supply. Such a fuse as this is quite
expensive, and may not even be available.
The usual design compromise then is to use a garden
variety fuse (3AG or 3AB style) which cannot be relied on
to blow before the thyristor does, a nd trust that if the
SCR does fail, it will fail short circuit. In the majority of
the designs, this will be the case, though this is difficult to
guarantee. Of course, a sufficiently high surge will cause
an open. These comments also apply to the fuse in Figure
16B.
2. Surge Current
If the peak current and/orthe duration of the surge
is excessive, immediate destruction due to device
overheating will result. The surge capability of the SCR
is directly proportional to its die area. If the surge
current cannot be reduced (by adding series resistance
~
see Figure 18) to a safe level which is consistent
with the system's requirements for speedy bus voltage
reduction, the designer must use a higher current SCA
This may result in the average current capability of the
SCR exceeding the steady state current requirements
imposed by the dc power supply.
CROWBAR SCR SELECTION GUIDE
As an aid in selecting an SCR for crowbar use, the
following selection guide is presented.
FIGURE 1 B - CIRCUIT ELEMENTS AFFECTING
SCR SURGE & dildt
~
~ ESR
ESL
1':
I RLead
LLead
I
~R
)
Output
Cap
L
To
f
MC3425 ----.J
DEVICE
IRMS
IFSM
PACKAGE
MCR67 Series
MCR68 Series
2N 1842 Series
2N6400 Series
2N6504 Series
2N681 Series
2N2573 Series
MCR69 Series
MCR70 Series
MeR71 Series
12A
12A
16A
l00A
100A
125A
160A
160A
200A
260A
300A
350A
550 A
Metal Stud
TO-220 Plastic
16A
25 A
25 A
25 A
25 A
35 A
55A
Metal Stud
TO-220 Plastic
TO-220 Plastic
Metal Stud
TO-3 Metal Can
TO-220 Plastic
Metal Stud
Metal Stud
For a complete and detailed treatment of SeA and fuse selection
refer to Motorola Application Note AN789.
R & L EMPIRICALLY DETERMINED
MOTOROLA LINEAR/INTERFACE DEVICES
3-131
II
®
•
MC7800
Series
MOTOROLA
THREE-TERMINAL
POSITIVE FIXED
VOLTAGE REGULATORS
THREE-TERMINAL POSITIVE VOLTAGE REGULATORS
These voltage regulators are monolithic integrated circuits designed as fixed-voltage regulators for a wide variety of applications
including local. on-card regulation. These regulators employ internal
current limiting. thermal shutdown, and safe-area compensation.
With adequate heatsinking they can deliver output currents in excess
of 1.0 ampere. Although designed primarily as a fixed voltage regulator, these devices can be used with external components to obtain
adjustable voltages and currents.
•
Output Current in Excess of 1.0 Ampere
•
•
•
•
•
No External Components Required
Internal Thermal Overload Protection
Internal Short-Circuit Current Limiting
Output Transistor Safe-Area Compensation
Output Voltage Offererl in 2% and 4% Tolerance
SILICON MONOLITHIC
INTEGRATED CIRCUITS
K SUFFIX
METAL PACKAGE
CASE 1-03
(Bottom VIew)
PillS 1 and 2 electrically Isolated from case Case
IS third electrical connection
REPRESENTATtVE
SCHEMATIC DIAGRAM
r---~----------~----------~----~--~------~-olnput
100
T SUFFIX
PLASTIC PACKAGE
CASE 221A-04
500
PIN 1. INPUT
2. GROUND
3. OUTPUT
!Heatsink
surface connected
to Pin 2.l
.....---+_o Outpu t
.H--------1~~-----+--
1:
STANDARD APPLICATION
Inp~tT:
MC78XX
C in
0,33 /J F
?
±+-______-'
c...______
Output
CO"
2.7 k
A common ground IS required between the
Input and the output voltages. The Input volt
age must remain typically 2.0 V above the out·
put voltage even duriftg the low pOint on the
input ripple voltage.
XX '" these two digits of the type number indicate voltage.
500
Gnd
ORDERING INFORMATION
Output Voltage
Device
Tolerance
Cric78XXK
MC78XXAK*
Tested Operating
Junction Temp. Range
Package
-55to +t50°C
Metal
Power
4%
2%
o to
4%
2%
MC78XXCT
MC78XXACT
4%
Plastic
2%
Power
MC78XXBT
4%
2% regulators
In
==
Cin is required If regulator is located an
appreciable distance from power supply
filter.
**
==
Co is not needed for stability; however,
it does improve transient response.
XX indIcates nommal voltage
+ 125"C
MC78XXCK
MC78XXACK""
.
*
TYPE NO.NOLTAGE
-40 to + 125"C
Metal Power packages are available
In
5, 12 and 15 volt devices.
MC7805
MC7806
MC7808
MC7809
MOTOROLA LINEAR/INTERFACE DEVICES
3-132
5.0
6.0
8.0
9.0
Volts
Volts
Volts
Volts
I
MC7812
MC7815
MC7818
MC7824
12
15
18
24
Volts
Volts
Volts
Volts
MC7800 Series
MAXIMUM RATINGS ITA
~ +25"C unless otherwise noted. I
Rating
Input Voltage 15.0 V - 18 VI
124 VI
Symbol
Value
Unit
Vin
35
40
Vdc
Po
1/8JA
8JA
Internally Limited
15.4
65
Watts
mW/"C
"CIW
Po
1I8JC
8JC
Internally Limited
200
5.0
Watts
mWrC
Po
1/8JA
8JA
Internally Limited
22.5
45
Watts
mWrC
"CIW
Po
1/8JC
8JC
Internally Limited
182
5.5
Watts
mWrC
Totg
-65 to + 150
"e
Power Dissipation and Thermal Characteristics
Plastic Package
TA ~ +25"C
Derate above TA ~ + 25"C
Thermal Resistance, Junction to Air
TC ~ +25"C
Derate above TC = + 75"C (See Figure 11
Thermal Resistance, Junction to Case
Metal Package
TA ~ +25"C
Derate above TA ~ + 25"C
Thermal Resistance. Junction to Air
TC = H5"C
Derate above TC = +65"C (See Figure 21
Thermal Resistance, Junction to Case
Storage Junction Temperature Range
Operating Junction Temperature Range
"elW
"C
TJ
MC7800,A
MC7800C,AC
MC7800B
"CIW
-55 to + 150
Oto+150
-40 to +150
DEFINITIONS
Line Regulation ._. The change In output voltage for a change In
the Input voltage The measurement IS made under conditions of
low dissipatIOn or by uSing pulse techniques such that the average chip temperature IS not slgnlflcantty affected
Load Regulation - The change In output voltage for a change
load current at constant chip temperature
QUiescent Current delivered to the load
That part of the Input current that is not
Output NOise Voltage - The rms ac voltage at the output, with
constant load and no Input ripple, measured over a specified frequency range
In
Long Term Stability -- Outp-ut voltage stability under accelerated
life test conditions with the maximum rated voltage listed In
the devices' electnca I charactertstlcs and m a XI m um power
diSsipation
MaXimum Power DISSipation -- The maximum total deVice diSSIpation for which the regulator Will operate within specifications
MOTOROLA LINEAR/INTERFACE DEVICES
3-133
•
•
MC7800 'Saries
M.C7805. B. C
ELECTRICAL CHARACTERISTICS (Vin = 10 V,IO = 500 mA, TJ = Tlow 10 Thi h (Nole 11 unless olhe'wise nOled)
Characteriatic
Output Voltage fTJ
Symbol
=+25°C)
Vo
Output Voltage
(5.0 mA";IO";1.0A, Po"; 15W)
7.0 Vdc~ Vin~ 20Vdc
B.O Vdc ~ Yin ~ 20 Vdc
Vo
line Regulation (TJ = +25°C. Note 2J
7.0 Vdc ~ Yin ~ 25 Vdc
8.0Vdc~ Vin~ 12 Vdc
Regline
Load Regulation (TJ:: +25°C. Note 2)
5.0 mA,,; 10"; 1.5 A
250 rnA ~ 10 ~ 750 mA
Regload
MC7B06
MC7805B
Min
Typ
Max
Min
Typ
M ••
Min
4.8
5.0
5.2
4.8
5.0
5.2
4.8
MC7805C
Typ
Ma.
4.75
.1IB
RIpple RejectIon
80 Vdc '.::. VIn ~ 18 Vdc, 1:: 120 Hz
RR
5.0
5.35
2.0
1.0
4.75
5.0
5.25
50
25
7.0
2.0
100
50
25
8.0
100
25
40
15
100
50
3.2
6.0
4.3
8.0
0.3
0.04
0.8
0.5
5.0
5.25
7.0
2.0
100
50
Vdc
40
15
100
50
4.3
8.0
mV
-
mA
mA
1.3
1.3
0.5
75
68
0.5
68
68
2.0
2.0
2.5
2.0
Output NOise Voltage (TA:: +25 J C)
10 Hz '", f ~ 100 kHz
10
40
10
10
Output Resistance f:: 10kHz
17
17
17
Shon-ClrcUit Current Limit (TA '" +25°C)
35 Vdc
0.2
1.2
0.2
0.2
2.5
3.3
~~tVoltage(IO::
Unit
mV
IB
Quiescent Current Change
7.0 Vdc ~ Vin -:::;; 25 Vdc
8.0 Vdc -:::;; Vin ~ 25 Vdc
5.0mA-:::;; 10~ 1.0A
5.2
Vdc
4.65
Quiescent Current (TJ = +25°C)
5.0
1.0A, TJ::
~25°C)
dB
_ .•"~In::
1.3
Peak Output Current lTJ:: +25°CI
Average Temperature Coefficient 01
Output Voltage
:to.6
TCVo
2.2
22
A
-1.1
-1.1
mV/
°C
.MC7805A, AC
ELECTRICAL CHARACTERISTICS (V m :: 10 V 10:: lOA. TJ:: Tlow to Thlah [Note 1] unless otherwise noted)
Characteristics
Symbol
Output Voltage (TJ:: ·25°CI
Vo
Output Voltage
Vo
(5.0mA"';; IO~ 1.0A. PO~ 15W)
75 Vdc -s;, Vin ~ 20 Vdc
Ltne Regulallon (Note 2)
7.5 Vdc ~ Vm ~ 25 Vdc. '0::: 500 rnA
80 Vdc ~ Vin ~ 12 Vdc
8.0 Vdc ~ Vin ~ 12 Vdc. TJ:: t25°C
7,3 Vdc ~ V ln ~ 20 Vdc, TJ::: +25°C
Regline
Load Regulation (Nole 2)
Regload
MC7805A
Typ
Ma.
Min
MC7805AC
Typ
Ma.
4.9
5.0
5.1
4.9
5.0
51
4.8
5.0
52
4.8
5.0
52
2.0
3.0
1.0
2.0
10
10
70
4.0
10
2.0
7.0
50
50
25
50
2.0
20
1.0
1.0
25
25
15
25
25
25
100
100
3.2
5.0
4.0
Min
mV
'0:;;; 7S0mA, TJ = +25°C
750 rnA
mA~ IO~
QUIescent Current
IB
TJ:: +25°C
Quiescent Current Change
8.0 Vdc ~ Vin ~ 25 Vdc. 10 :: 500 rnA
7.5 Vdc ~ Vin ~ 20 Vdc. TJ :: +25°C
5.0mA~lo~ 1.0A
.1IB
Ripple Rejection
8.0 Vdc ~. Yin ~ 18 Vdc. f = 120 Hz.
TJ:: +25°C
8.0 Vdc~ Vin ~ 18 Vdc. f:: 120 Hz.
10 =500 mA
RR
Dropout Voltage (10 :: 1.0 A. TJ
Output Resistance «f
68
-
1 .0 kHz)
Short-Circuit Current limit (TA :: +25°C)
Vin:: 35 Vdc
50
4.3
6.0
6.0
0.5
0.8
08
0.5
as
0.2
75
75
68
Yin-YO
2.0
2.5
2.0
Vdc
Vn
10
40
10
IAV/Vo
'0
2.0
17
mll
Ise
0.2
1.2
0.2
A
2.5
3.3
2.2
A
-1.1
mV/OC
Peak Output Current ITJ - +25°C)
Imax
Average Temperature Coefficient of Output Voltage
TCVO
1.3
±0.6
~ :~~~:g ::~ ~g~:~~c~
NOTES: 1. Tlow:: ··55°C for MC78XX. A
Thigh
AC. B
0° for MC78XXC. AC
=-40"C fo, MC78XXB
2. Load and line regulation are •.pecified at constant junction temperature. Changes in Vo due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
=
mA
dB
68
Output Noise Voltage (TA =+25°C)
10 Hz~ f~ 100kHz
8.0
mA
0.3
0.2
0.04
=+25°C)
10
mV
5.0 mA ~ 10 ~ '.0 A
mA~
Vdc
Vdc
5.0 rnA:;;; '0:;;; 1.5 A. TJ::: +25°C
250
250
Unit
MOTOROLA LINEAR/INTERFACE DEVICES
3-134
MC7800 Series
MC7806, B,C
ELECTRICAL CHARACTERISTICS IVin
~ 11 V,
10
Characteristic
~
Output Voltage ITJ
~ 500 mA, TJ ~ Tlow to Thi h [Note 1] unless otherwise noted).
Symbol
+ 25"C)
Vo
Output Voltage
MC7806
MC7806B
MC7806C
Min
Typ
Ma.
Min
Typ
Ma.
Min
Typ
Ma.
5.75
6.0
6.25
5.75
6.0
6.25
5.75
6.0
6.25
5.7
6.0
6.3
Unit
Vde
Vo
Vde
15.0 mA '" 10" 1.0 A, PO" 15 W)
8.0 Vdc ~ Vin ~ 21 Vdc
9.0 Vdc
~
Vin =s 21 Vdc
5.65
Line Regulation (TJ = + 25°C. Note 2)
8.0 Vdc ~ Vin ..s 25 Vdc
9.0 Vdc ~ Vin "'" 13 Vdc
Regline
Load Regulation (TJ ~ + 25"C, Note 2)
5.0 rnA ~ 10 .:;; 1.5 A
Regload
6.3
60
30
9.0
3.0
120
60
9.0
3.0
120
60
27
9.0
100
30
43
16
120
60
43
16
120
60
3.2
6.0
4.3
8.0
4.3
8.0
0,3
0.04
0.8
0.5
mA
mA
1.3
RR
0;;:
6.0
.lIS
5.0 mA " 10 " 1.0 A
Ripple Rejection
9.0 Vdc 0;;: Vin
3.0
2.0
5.7
mV
IS
Quiescent Current Change
8.0 Vdc ~ Vin ~ 25 Vdc
9.0 Vdc ~ Vin ~ 25 Vdc
6.35
mV
250 mA " 10 " 750 mA
Quiescent Current (TJ =- + 25"C)
6.0
1.3
0.5
73
65
0,5
65
65
dS
19 Vdc, f '; 120 Hz
~
Dropout Voltage (to
~
1.0 A, TJ
+ 25"C)
Vin-VO
2.0
2.5
2.0
2.0
Vde
Vn
10
40
10
10
p.VI
Vo
17
17
mO
0,2
0.2
A
Output Noise Voltage (T A =- + 25"C)
10 Hz 0;;: f 0;;: 100 kHz
Output Resistance f = 1.0 kHz
Short-Circuit Current Limit (TA
Vin = 35 Vdc
+ 25"C)
=
rO
17
Ise
0.2
1.2
2.5
3.3
Peak Output Current (TJ =- + 25°C)
[max
Average Temperature Coefficient of
Output Voltage
TCVO
1.3
±0.7
MC7B06AC
10 ATJ
ELECTRICAL CHARACTERISTICS IV in = 11 V,O~
I
Output Voltage ITJ
~
~
2.2
A
-0.8
mVI
"C
T low t 0 T hioh IN oe
t 11 un ass 0 th erwlsa not ad)
Symbol
Characteristics
2.2
-0.8
+ 25"C)
Vo
Output Voltage
MC7~C
Min
Typ
Max
5.88
6,0
6.12
5,76
6.0
6,24
-
9.0
11
3,0
9.0
60
60
30
60
-
43
43
100
100
Vde
Vde
Vo
15.0 mA" 10 '" 1.0A, PO" 15W)
Unit
8.6 Vdc ~ Vin ~ 21 Vdc
Lina Regulation (Note 2)
8.6 Vdc ~ Vin ~ 25 Vde, 10
9.0 Vdc :s;; Vin :s;; 13 Vdc
9.0 Vdc:s;; Vin ~ 13 Vdc, TJ
8.3 Vdc ~ Vin :s;; 21 Vdc, TJ
Regline
500 rnA
=
= + 25"C
= + 25"C
Load Regulation (Note 2)
Regload
5,0 mA" 10 '" 1.5 A, TJ ~ + 25"C
5.0 mA '" 10" 1,OA
250mA" '0" 750mA, TJ ~ + 25"C
250 mA " 10 '" 750 mA
Quiescent Current
TJ
~
'B
+25"C
mV
9.0 Vde " Yin " 25 Vde, 10 ~ 500 mA
8.6 Vde " Yin " 21 Vde, TJ ~ + 25"C
5.0mA" '0" 1.0 A
16
50
-
-
-
4.3
6,0
6,0
-
-
0.8
0,8
0.5
-
-
-
RR
9.0 Vde" Vin" 19 Vde, I
9.0 Vdc " Yin " 19 Vde, I
~
~
120 Hz, TJ
120 Hz, 10
1.0 A, TJ
Output Noise Voltage ITA
~
~
~
~
+25"C
500 mA
+ 25"C)
dB
65
-
Yin-YO
-
2,0
Vn
-
10
-
ro
-
0.2
-
-0.8
+ 25"C)
mA
mA
-
Ripple Rejection
~
-
-
~IB
Quiescent Current Change
Dropout Voltage (to
mV
Vde
p.VNO
10 Hz:s;; f:s;; 100 kHz
Output Resistance (I
~
1.0 kHz)
Short-Circuit Current Limit (TA
Yin
~
= + 25'C)
Ise
17
-
mO
A
35 Vde
Peak Output Current ITJ
~
+ 25"C)
Imax
I Average Temperature Coefficient of Output Voltage
TCVO
2,2
-
A
mvrc
+'
NOTES; 1. Tlow = -55°C for MC78XX
Thigh = + 150°C for MC78XX
= 0° for MC78XXC, AC
= 25°C for MC78XXC, AC, B
= - 4O"C for MC78XXB
2. Load and line regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Vo due to heating effects must be taken
MOTOROLA LINEAR/INTERFACE DEVICES
3-135
into account
..
MC7800 Series
MC7• • B.C
ELECTRICAL CHARACTERISTICS (Vin
= 14V
500 m A, T J
I
,O~
Characteristic
Symbol
Output Voltage (TJ ~ + 25"<:)
Vo
Output Voltage
(5.0 mA '" 10 '" 1.0 A, Po '" 15 W)
10.5 Vdc '" Yin '" 23 Vdc
11.5 Vdc '" Yin '" 23 Vdc
Vo
Regline
Load Regulation (TJ ~ + 25°C, Note 2)
5.0 mA '" 10 '" 1.5A
250 mA '" 10 '" 750 mA
Regload
IS
Quiescent Current Change
10.5 Vdc '" Yin '" 25 Vdc
11.5 Vdc '" Yin '" 25 Vdc
5.0 rnA '" 10 '" 1.0 A
eo
0
.!?
1.0
.............
r-::::: ~ -...;:
.............
T~=~~ t-
1/'
i
6.0
I
12
~
3,0
iB
2. 0
!
~~~J=-400C
'---
::>
=
10 rnA
.... -
-~r-
50
15
75
100
115
40
in
a....
10
FIGURE 6 - PEAK OUTPUT CURRENT AS A
FUNCTION OF INPUT-OUTPUT DIFFERENTIAL
VOLTAGE (MC78XX. AI
4.0
~
r--:-I-
TA. AMBIENT TEMPERATURE (OCI
FIGURE 5 - PEAK OUTPUT CURRENT AS A FUNCTION
OF INPUT-OUTPUT DIFFERENTIAL VOLTAGE
(MC78XXC. AC. BI
ffi
~
-15
TJ. JUNCTION TEMPERATURE lOCI
~
....
10 !500mA
------
5
o
o
_
t--
-+-w
....::>
::::::::: ;;:: t:--......
r-- r18
24
TJ
......
....
::>
~
r-o::::::
r-30
Vin-VO.INPUT-OUTPUTVOLTAGE DlFFERENTIALIVOLTSI
~
=-55°e
Ir ~ t'-../
'I "'~
1.0
'"
~
.........
TJ
=125°C
j
~ t:-...
~~
I'
0
TJ = 25°C
;-
10
20
30
Vin-VO. INPUT·OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
3-142
40
MC7800 Series
TYPICAL CHARACTERISTICS (continued)
(T A =25°C unless otherwise noted.)
FIGURE 7 - RIPPLE REJECTION AS A FUNCTION
OF OUTPUT VOLTAGES
(MC78XXC. AC)
3D
-l~+.-~r=
--- .
~
60
w
~
It
a;
~.
50
PART'
Vin
_ MC7BOSC 10 V
MC7306C 11 V
-r--
r--
_.-
.-
._-
)---
~ 6.10
~
...>
~ 40
'.-
r---
~.
.-
10
MC7324C 33 V
6.0
8.0
10
12
14
16
18
Va, OUTPUT VOL TAGE (Val TSI
10
14
11
I
-
6.00
--
""""-
~
5.90
'"
500
!
300
~
200
~
'!!
100
-- -.,
,.
f--
'--
==
w
«
~
o
if
I
~ to 120Hz
)-- 10 ' 500 mA
I--ClOO"F
30
I
-50
-25
25
50
75
100
125
150
10
4.0
175
8.0
6,0
.!,
3,0
::>
ff!
Viln=~
-.....
Vo = 5,0 V
'0 = 5,0 mA
u
8. 0
I--- -
-
C 4.0
MC78XX. A
"' 6,0
~
o
~
w
'"
~
........
~
S
CI
1.0
-75
-50
-25
25
50
75
100
10=10mA~
4.0
$
...
2.0
o
MC7~05,
A
TJ = 25°C
I
o
>
:;
!P
24
20
FIGURE 12 - DROPOUT CHARACTERISTICS
(MC78XX, A)
Vin- 1OV
)--VO 5.0 V
'0 - 20 mA
_I
MC78XXC, ACj B _
....!!.
16
12
Va, OUTPUT Val TAGE (Val TSI
FIGURE 11 - QUIESCENT CURRENT AS A
FUNCTION OF TEMPERATURE (MC78XXC. AC. B)
~
-
50
TJ, JUNCTION TEMPEATURE 1°C)
~
lOOk
20
5.80
15
10k
1000
>
-75
1.0k
FIGURE 10 - OUTPUT IMPEDANCE AS A
FUNCTION OF OUTPUT VOLTAGE (MC78XXC, AC)
I
--
r--.
100
10
t, FREQUENCY (Hz)
Vin= 11 V - f--Vo = 6.0 V - f--'0 = 20 mA_ ~
::>
eo
Va = 5 V
10 0 20 mA
w
-~--
6,20
'"""
MC78XXC. AC
Vin'" 10 V
FIGURE 9 - OUTPUT VOLTAGE AS A FUNCTION
OF JUNCTION TEMPERATURE (MC78XXC, AC. BI
'"
~
I
~
~
Vin " 8.0 to 18 Vdc
VO=5,OV
10 = 1.0 A
~
-.-~-
40
4.0
-
-,
- :g:~~~:: ~ - :g:::~ ~~ ~ -
01.0 V(RMSI
--
t--
~
r':l
io'" 60
10:: 20 rnA
~V'"
-
MC78XX.A
~
\ i'-
0
80
10 110 Hz
_.
----
.
70
,
~
z
FIGURE 8 - RIPPLE REJECTION AS A FUNCTION
OF FREQUENCV
(MC78XXC. AC, A)
125
W
~ ~lo=500'mA
2.0
/7,;' -IO=1.0A
o
o
I I
2,0
4,0
6,0
8,0
10
INPUT VOLTAGE (VOLTS)
TJ. JUNCTION TEMPERATURE (OC)
MOTOROLA LlNEARilNTERFACE DEVICES
3-143
12
14
16
II
•
MC7800 Series
APPLICATIONS INFORMATION
Design Consid••tions
The MC7800 Series of fixed voltage regulators are designed
with Thermal Overload Protection that shuts down the circuit
when subjected to an excessive power overload condition, Internal
Short-Circuit Protection that limits the maximum current the circuit will pass, and Output Transistor Safe-Area Compensation that
reduces the output short-circuit current as the voltage across the
pass transistor is increased.
In many low current applications. compensation capacitors are
not required.
However, it is recommended that the regulator
input be bypassed with a capacitor if the regulator is connected
FIGURE 14 - ADJUSTABLE OUTPUT REGULATOR
FIGURE 13 - CURRENT REGULATOR
'". ,-n ~';.. ~".
0.33~F I
TL__~_~-'_
--'0
to the power supply filter with long wire lengths, or if the output
load capacitance is large. An input bypass capacitor should be
selected to provide good high-frequency characteristics to insUre
stable operation under alt load conditions. A 0.33 ",F or larger
tantalum, mylar, or other capacitor having low internal impedance
at high frequencies should be chosen. The bypass capacitor should
be mounted with the shortest possible leads directly across the
regulators input terminals. Normally good constructiontechniques
should be used to minimize ground loops and lead resistancedrops
since the regulator has no external sense lead.
Output
constant
Current to
Grounded Load
0.1
~F
10 k
The MC7800 regulators can also be used as a current source
when connected as above. In order to minimize dissipation the
MC7805C is chosen in this application. Resistor R determines
the current as follows.
VO. 7.0 V to 20 V
VIN VO" 2.0 V
IQ -: 1.5 rnA over line and load changes
For example, a l-ampere current source would require R to be a
5·ohm, 10·W resistor and the output voltage compliance woulrl
be the Input voltage less 7 volts.
FIGURE 15 -
CURR~NT
MJ2955 or Equ
'"•.
---
BOOST REGULATOR
FIGURE 16 - SHORT-CIRCUIT PROTECTION
InpuT
IV
MJ2955
or Equlv
......"""-.-.,(
'~ MOj" T.:'' '
xx =
The addition of an operational amplifier allows adlustment to
higher or Intermediate values while retiilOlng regulation character·
IstlCS
The mlnHllum voltage obtainable with this arrangement Ie;
20 volts greater than the regulator voltage.
R
2 digits of type number indicating voltage.
xx = 2 digits of type
The MC7800 series can be current boosted with a PNP transistor. The MJ2955 provides current to 5.0 amperes. Resistor R
in conjunction with the VBe of the PNP ciPtermines when the
pass transistor begins conauctlng; this cirCUit is not short-circuit
proof. Input·output differential yoltage minimum is increased by
VBe of the pass transistor.
The circuit of Figure 15 can be modified to provide supply protec·
tion against short circuits by adding a short-circuit sense resistor,
RSC/and an additional PNP transistor. The current sensing PNP
must be able to handle the short-circuit current of the three·
terminal regulator. Therefore, a four-ampere plastic power tran·
Sistor IS specified.
MOTOROLA LINEAR/INTERFACE DEVICES
3-144
number indicating yoltage.
®
MC78LOO,A
Series
MOTOROL.A
THREE-TERMINAL
LOW CURRENT
POSITIVE FIXED
VOLTAGE REGULATORS
THREE-TERMINAL LOW CURRENT
POSITIVE VOLTAGE REGULATORS
The MC78LOO Series of positive voltage regulators are inexpensive, easy-to-use devices suitable for a multitude of applications that require a regulated supply of up to 100 mAo Like their
higher powered MC7800 and MC78MOO Series cousins, these regulators feature internal current limiting and thermal shutdown
making them remarkably rugged. No external components are
required with the MC78LOO devices in many applications.
These devices offer a substantial performance advantage over
the traditional zener diode-resistor combination, as output impedance and quiescent current are substantially reduced.
P SUFFIX
CASE 29-04
PIN 1. OUTPUT
2. GROUND
3. INPUT
•
•
•
•
•
•
Wide Range of Available, Fixed Output Voltages
Low Cost
Internal Short Circuit Current Limiting
Internal Thermal Overload Protection
No External Components Required
Complementary Negative Regulators Offered
(MC79LOO Series)
• Available in Either ± 5% (AC) or ± 10% (C) Selections
G SUFFIX
CASE 79-05
REPRESENTATIVE CIRCUIT SCHEMATIC
Input
PIN 1. INPUT
2. OUTPUT
3. GROUND
"
15 k
1(:>
(Bottom View)
(Case Connected To p", 3)
3.0
Output
0-25 k"
••
1
2.B5 k
Zl
PIN 1. VOUT
2. GND
3. GND
4. NC
Ground
ORDERING INFORMATION
Device
MC78LXXACG
NC
GND
GND
VIN
SOP-8 is an internally modified 50-8 Package. Pins
2, 3, 6 and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
increases power dissipation capability when
appropriatelv mounted on a printed circuit board.
SOP-B conforms to all external dimensions of the
standard 50-8 Package.
Metal Can
TJ : O°Cto +125°C
MC78LXXCD
Plastic Power
SOP-B
MC7BLXXCG
Metal Can
MC78LXXCP
Plastic Power
MC78LXXABP#
5.
6.
7.
8.
SOP-B
MC78LXXACD
MC78LXXACP
Package
Junction Temperature Range
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SOP-B
TJ: -40°C to +125°C
Plastic Power
XX indicates nominal voltage
#Automotive temperature. range selections are available with special test conditions and
additional tests in 5, 8, , 2 and 15 volts devices. Contact your local Motorola sales office for
information.
MOTOROLA LINEAR/INTERFACE DEVICES
3-145
Device No.
'10%
MC7BL05C
MC78LOBC
MC78L 12C
MC7BL 15C
MC78L 18C
MC78L24C
Device No.
,5%
Nominal
Voltage
MC78L05AC
MC7BLOBAC
MC78L12AC
MC7BL 15AC
MC78L 18AC
MC78L24AC
5.0
8.0
12
15
18
24
•
MC78LOO,A Series
MC78LOO Series MAXIMUM RATINGS (TA
RIItI"II
=
+ 125'C unless otherwise noted)
Symbol
Vllue
Unit
VI
30
Vdc
Input Voltage (2.6 V-8.0 V)
(12 V-18 V)
(24 V)
35
40
Storage Junction Temperature Range
Tstg
-65 to + 150
'C
TJ
Oto +150
'C
Operating Junction Tem'perature Range
MC78L05C. MC78L05AC ELECTRICAL CHARACTERISTICS (VI = 10 V, 10 = 40 mA, CI = 0.33 p.F, Co = 0.1 p.F,
O'C < TJ < + 125'C unless otherwise noted)
MC78L05AC
Characteristic
Output Voltage (TJ
=
+ 25"C)
Min
Typ
Max
Min
Typ
Max
Unit
Vo
4.8
5.0
5.2
4.6
5.0
5.4
Vdc
-
55
45
150
100
-
55
45
200
150
-
11
5.0
60
-
11
5.0
60
30
-
5.25
5.25
4.5
4.5
-
5.5
5.5
-
3.8
-
6.0
5.5
-
1.5
0.2
40
-
p.V
Line Regulation
(TJ = +25'C, 10 = 40 mAl
7.0 Vdc '" VI '" 20 Vdc
8.0 Vdc '" VI '" 20 Vdc
Regline
load Regulation
(TJ = + 25'C, 1.0 mA" 10" 100 mAl
(TJ = +25'C, 1.0 mA" 10 '" 40 mAl
Regload
Output Voltage
(7.0 Vdc '" VI '" 20 Vdc, 1.0 mA '" 10 '" 40 mAl
(VI = 10 V, 1.0 mA '" 10 '" 70 mAl
Vo
Input Bias Current
(TJ = + 25'C)
(TJ = + 125'C)
liB
Output Noise Voltage (TA
100 kHz)
=
+25'C, 10 Hz '" f '"
Ripple Rejection (10 = 40 mA, f = 120 Hz,
8.0 V '" VI '" 18 V, TJ = + 25'C)
Dropout Voltage
(TJ = +2S'C)
mV
30
mV
Vdc
4.75
4.75
mA
-
3.8
-
6.0
5.5
-
-
-
1.5
0.1
Vn
-
40
-
-
RR
41
49
-
40
49
-
dB
VI-VO
-
1.7
-
-
1.7
-
Vdc
~IIB
Input Bias Current Change
(8.0 Vdc '" VI '" 20 Vdc)
(1.0 mA '" 10 '" 40 mAl
MC78L05C
Symbol
mA
MC78L08C. MC78LOBAC ELECTRICAL CHARACTERISTICS (VI = 14 V, 10 = 40 mA, CI = 0.33 p.F, Co = 0.1 p.F,
O'C < TJ < + 125'C unless otherwise noted)
MC78L08AC
Characteristic
Output Voltage (TJ
=
+ 25'C)
line Regulation
Min
Typ
Max
Min
Typ
Max
Unit
Vo
7.7
8.0
8.3
7.36
8.0
8.64
Vdc
Load Regulation
(TJ = +2S'C, 1.0 mA '" 10 '" 100 mAl
(TJ = +25"C, 1.0 mA '" 10 '" 40 mAl
Vo
Input Bias Current
(TJ = +2e'C)
(TJ = + 125"C)
liB
~IIB
Input Bias Current Change
(11 Vdc. '" VI '" 23 Vdc)
(1.0 mA '" 10 '" 40 mAl
+ 25"C, 10 Hz '" f '"
Ripple Rejection (10 = 40 mA, f = 120 Hz,
12 V .. VI .. 23 V, TJ = + 25'C)
Dropout Voltage
(TJ = +2S'C)
-
20
12
175
125
-
20
12
200
150
-
-
15
8.0
80
40
-
-
15
6.0
80
40
7.6
7.6
-
-
8.4
8.4
7.2
7.2
-
8.8
8.8
-
3.0
6.0
5.5
-
-
3.0
6.0
5.5
-
-
1.5
0.1
-
-
1.5
0.2
60
-
-
52
-
p.V
-
mV
Regload
Output Voltage
(10.5 Vdc '" VI '" 23 Vdc, 1.0 mA '" 10 '" 40 mAl
(VI = 14 V, 1.0 mA '" 10 '" 70 mAl
=
mV
Regline
(TJ = +25"C, 10 = 40 mAl
10.5 Vdc '" VI '" 23 Vdc
11 Vdc '" VI '" 23 Vdc
Output Noise Voltage (TA
100 kHz)
MC78LOSC
Symbol
-
Vdc
mA
-
mA
Vn
-
RR
37
57
-
36
55
-
dB
VI-VO
-
1.7
-
-
1.7
-
Vdc
MOTOROLA LINEAR/INTERFACE DEVICES
3-146
MC78LOO,A Series
MC78L12C, MC78L12AC ELECTRICAL CHARACTERISTICS IVI ~ 19 V, 10 ~ 40 rnA, CI ~ 0.33 "F, Co ~ 0.1 "F,O°C < TJ <
+ 125°C unless otherwise noted)
MC78l12C
MC78l12AC
I
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Output Voltage ITJ ~ +25°CI
Vo
11.5
12
12.5
11.1
12
12.9
Vdc
Line Regulation
ITJ ~ + 25°C, 10 ~ 40 mAl
14.5 Vdc '" VI '" 27 Vdc
16 Vdc '" VI '" 27 Vdc
Regline
Load Regulation
ITJ ~ + 25°C, 1.0 rnA '" 10'" 100 mAl
ITJ ~ + 25°C, 1.0 rnA '" 10 '" 40 mAl
Regload
Characteristic
mV
-
120
100
250
200
-
-
120
100
250
200
-
20
10
100
50
-
20
10
100
50
-
12.6
12.6
-
13.2
13.2
4.2
6.5
6.0
-
mV
-
Output Voltage
Vdc
Vo
11.4
11.4
114.5 Vdc '" VI '" 27 Vdc, 1.0 rnA '" 10 '" 40 mAl
IVI ~ 19 V, 1.0 rnA '" 10 '" 70 mAl
Input Bias Current
ITJ ~ + 25°CI
ITJ ~ + 125°CI
-
mA
liB
-
Input Bias Current Change
116 Vdc '" VI '" 27 Vdcl
11.0 rnA '" 10 '" 40 mAl
Output Noise Voltage (TA
100 kHz I
10.8
10.8
+ 25°C, 10 Hz
Ripple Rejection 110 ~ 40 rnA, f
VI'" 25 V, TJ ~ +25°CI
~
>s
f
~
120Hz, 15V,,;
Dropout Voltage
ITJ = +25°C)
4.2
-
6.5
6.0
rnA
IlIIB
=
-
-
-
1.5
0.1
-
-
1.5
0.2
Vn
-
80
-
-
80
-
"V
RR
37
42
-
36
42
-
dB
-
1.7
-
-
1.7
-
Vdc
VI-VO
-
-
MC78L15C, MC78L15AC ELECTRICAL CHARACTERISTICS IVI ~ 23 V, 10 ~ 40 rnA. CI ~ 0.33 "F, Co ~ 0.1 "F,
O°C < TJ < .... 125°C unless otherwise noted 1
MC78l15AC
MC78l15C
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Output Voltage ITJ ~ +25°CI
Va
14.4
15
15,6
13.8
15
16.2
Vdc
Line Regulation
ITJ ~ + 25°C, 10 ~ 40 mAl
17.5 Vdc '" VI '" 30 Vdc
20 Vdc '" VI '" 30 Vdc
Regline
Load Regulation
ITJ ~ + 25°C, 1.0 rnA '" 10 '" 100 mAl
ITJ ~ +25°C, 1.0 rnA '" 10 '" 40 mAl
Regload
Characteristic
Output Voltage
117.5 Vdc '" VI '" 30 Vdc, 1.0 rnA '" 10 '" 40 mAl
IVI ~ 23 V, 1.0 rnA '" 10 '" 70 mAl
Va
Input Bias Current
ITJ ~ + 25°CI
ITJ ~ + 125°CI
liB
Input Bias Current Change
120 Vdc '" VI '" 30 Vdcl
11.0 rnA '" 10 '" 40 mAl
mV
-
130
110
300
250
-
-
130
110
300
250
-
25
12
150
75
-
25
12
150
75
-
16.5
16.5
6.5
6,0
mV
Vdc
14.25
14.25
-
15.75
15.75
13.5
13.5
rnA
-
4.4
-
IlIIB
6.5
6.0
-
4.4
-
1.5
0.1
-
-
-
-
90
-
-
-
rnA
-
1.5
0.2
-
90
-
"V
Output Noise Voltage ITA ~ +25°C, 10 Hz "'" f =s
100 kHz)
Vn
-
Ripple Rejection 110 ~ 40 rnA, f
'" VI '" 28.5 V, TJ ~ + 25°CI
RR
34
39
-
33
39
-
dB
-
1.7
-
-
1.7
-
Vdc
Dropout Voltage
ITJ = +25°C)
~
120 Hz, 18.5 V
VI-VO
MOTOROLA LINEAR/INTERFACE DEVICES
3-147
•
•
MC78LOO,A Series
MC78L18C. MC78L 18AC ELECTRICAL CHARACTERISTICS (Vr = 27 V. 10 = 40 mA, CI = 0.33 p.F, Co = 0.1 p.F,
DoC < TJ < + 125°C unless otherwise noted)
MC78L18AC
Characteristic
Output Voltage (TJ
Line Regulation
(TJ = + 25"C,
21.4 Vdc " VI
20.7 Vdc " VI
22 Vdc " VI "
21 Vdc " VI "
=
+ 25"C)
Min
Typ
Max
Min
Typ
Max
Unit
Vo
17.3
18
18.7
16.6
18
19.4
Vdc
-
32
325
-
27
~75
-
30
15
170
85
16.2
-
19.8
16.2
-
19.8
3.1
-
6.5
6.0
-
1.5
10 = 40 mAl
" 33 Vdc
" 33 Vdc
33 Vdc
33·Vdc
Regload
Output Voltage
(21.4 Vdc " VI " 33 Vdc, 1.0 mA " 10 " 40 rnA)
(20.7 Vdc " VI " 33 Vdc, 1.0 mA" 10 " 40 rnA)
(VI = 27 V, 1.0 rnA " 10 " 70 rnA)
(VI = 27 V, 1.0 rnA" 10" 70 rnA)
Vo
Input Bias Current
liB
=
=
mV
Regline
Load Regulation
(TJ = + 25"C, 1.0 rnA" 10" 100 rnA)
(TJ = +25"C, 1.0 rnA " 10 " 40 rnA)
(TJ
(TJ
MC78L18C
Symbol
-
45
325
-
35
275
-
30
15
170
85
17.1
-
18.9
17.1
-
18.9
3.1
6.5
6.0
-
Input Bias Current Change
Output Noise Voltage (T A
100 kHz)
-
ailB
(22 Vdc " VI " 33 Vdc)
(21 Vdc " VI = 33 Vdc)
(1.0 rnA" 10" 40 rnA)
= + 25°C. 10 Hz:!S;
f.:;;
Ripple Rejection (10 = 40 rnA, f = 120 Hz,
23 V " VI " 33 V, TJ = + 25"C)
Dropout Voltage
(TJ = + 25"C)
mV
Vdc
rnA
-
+ 25"C)
+ 125"C)
.!
-
-
rnA
-
-
-
1.5
0.1
-
-
0.2
Vn
-
150
-
-
150
-
p.V
RR
33
48
-
32
46
-
dB
-
1.7
-
-
1.7
-
Vdc
VI-VO
MC78L24C, MC78L24AC ELECTRICAL CHARACTERISTICS (VI = 33 V, 10 = 40 rnA, CI = 0.33 p.F, Co = 0.1 p.F,
O°C < TJ < + 125°C unless otherwise noted)
MC78L24AC
Characteristic
Output Voltage (TJ
=
+ 25"C)
line Regulation
(TJ = + 25"C,
27.5 Vdc " VI
28 Vdc " VI "
27 Vdc " VI "
=
=
Min
Typ
Max
Min
Typ
Max
Unit
Vo
23
24
25
22.1
24
25.9
Vdc
10 = 40 rnA)
" 38 Vdc
80 Vdc
38 Vdc
+25"C, 1.0 rnA" 10" 100 rnA)
+25"C, 1.0 rnA" 10" 40 rnA)
Input Bias Current
liB
-
50
60
300
350
-
-
40
20
200
100
22.8
-
22.8
-
-
Input Bias Current Change
ailB
+ 25"C, 10 Hz"
Ripple Rejection (10 = 40 rnA, f
VI" 35 V, TJ = + 25"C)
Dropout Voltage
(TJ = + 25"C)
=
120 Hz, 29 V "
I
35
30
350
300
-
-
-
-
40
20
200
100
21.6
-
26.4
21.6
-
26.4
3.1
6.5
6.0
mV
Vdc
25.2
25.2
3.1
-
6.5
6.0
-
-
-
1.5
0.1
Vn
200
-
-
RR
31
45
-
VI-VO
-
1.7
-
-
-
-
1.5
0.2
200
-
p.V
30
43
-
dB
.-
1.7
-
Vdc
MOTOROLA LINEAR/INTERFACE DEVICES
3-148
-
rnA
-
(28 Vdc " VI " 38 Vdc)
(1.0 rnA " 10 " 40 rnA)
=
I
-
rnA
-
+ 25"C)
+ 125"C) .
Output Noise Voltage (TA
f" 100 kHz)
-
Vo
=
=
Regload
Output Voltage
(28 Vdc " VI "38 Vdc, 1.0 rnA" 10 "40 rnA)
(27 Vdc" VI " 38 Vdc, 1.0 rnA " 10 "40 rnA)
(28 Vdc " VI = 33 V, 1.0 rnA " 10 " 70 rnA)
(27 Vdc" VI " 33 V, 1.0 rnA" 10 " 70 rnA)
(TJ
(TJ
mV
Regline
load Regulation
(TJ
(TJ
MC78L24C
Symbol
MC78l00,A Series
TYPICAL CHARACTERISTICS
(T A"" +2SoC unless otherwise noted.)
FIGURE 1 - DROPOUT CHARACTERISTICS
~
80
MC78L05C
~
0
2:
--~
Va" 5 0 V
TJ
60
=
25°C
'-'
;
0
>
e--
FIGURE 2 - DROPDUT VOL TAGE vo,sus
JUNCTION TEMPERATURE
2.5
0
I
-I
2:
'-'
;
70
0
>
"
e--
z
10
40
w
~
0
0
e--
"
0
Dropout of Regulation
0.5 -detlnedaswhen
0
0 0L---L---2i.O~~~~~--L---6LU---L---8i.O---i--~
10
o
o
5:
T-
'"
e--
3.8
z
--
tt
tt
36
~~
"
U
100
125
INPUT BIAS CURRENT vo'sus
INPUT VOLTAGE
_r-
1 4.0 r-----I--!-==~
-
-L--
75
5.0 ,------,--,-----.--------,--,-------.--,---,
--
4.U
5
50
FIGURE 4 -
---~l~
._- - t - -
25
TJ, JUNCTION TEMPERATURE lOCI
FIGURE 3 -INPUT BIAS CURRENT versus
AMBIENT TEMPERATURE
4.2
IS
Va"' 2% of Va
0:
VI. INPUT VOLTAGE (VOLTS)
•
_L
10'" 1.0 rnA
"e-"
e-"z
2.0
--
j
10 - 40 rnA
1.0
e--
>
!-- b:::r
15
10" lOrnA
-
----T-+---+--~--+----t-----+--+-----I
+-----t----+---- \ - MC78L05C
r-----t----+---t- -- - Vo 5.0 v -+----+-------j
tt
3.0 f---- f - - - - - -
~
2.0
c
"
34
w
e--
z
~
32
r----
z
a5
1.0
3.0
25
50
75
100
125
o
____J_ _ _ _L -_ _
5.0
10
T A, AMBIENT TEMPERATURE (DC)
FIGURE 5 - MAXIMUM AVERAGE POWER DISSIPATION
~
_ _- L_ _
20
~
25
____
30
~
35
__
~
40
FIGURE 6 - MAXIMUM AVERAGE POWER DISSIPATION vorsus
AMBIENT TEMPERATURE - TO-39 Typo Package
10,000
~~~~~~~~!~$~~~~~~~~~~
F
f-t-j=t=-~ ~-+--t~-,,-==+==~~j::.:--.-::=+-1-No Heat Sink
15
V" INPUT VOLTAGE IVOL TSI
versus AMBIENT TEMPERATURE - TO-92 Type Package
10,000
-t-----t------j
t----H---t-
OL_~LL
0
TJ e25 0 e
~+---~--_+--r_~
r-----fj----
0
10 =40 rnA
t------tt-----t------j------t-
-t-
"
----1------f--
Infinite He,tSink
5
-I---
~ 1,000
~
f - - No HeatSmk
~
o
tt
~
./
300 CNJatt Heat Sink
"
"
100
~
102~5-----L---5;';0~--J------;75;---L----:clo::oo---L----:1c'-25;-~---1,tJ50
T A, AMBIENT TEMPERATURE {DC}
10
25
50
75
100
TA, AMBIENT TEMPERATURE 1°C)
MOTOROLA LINEAR/INTERFACE DEVICES
3-149
125
150
•
MC78LOO,A Series
APPLICATIONS INFORMATION
Dolgn Considerations
The MC78LOO Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts
down the circuit when subjected to an excessive power
overload condition. Internal Short-Circuit Protection
limits the maximum current the circuit will pass.
In many low current applications, compensation capacitors are not required. However, it is recommended
that the regulator input be bypassed with a capacitor if
the regulator is connected to the power supply filter
with long wire lengths, or if the output load capacitance
is large. The input bypass capacitor should be selected
to provide good high-frequency characteristics to insure
stable operation under all load conditions. A 0.33 p.F or
larger tantalum, mylar, or other capacitor having low
internal impedance at high frequencies should be chosen. The bypass capacitor should be mounted with the
shortest possible leads directly across the regulators
input terminals. Good construction techniques should
be used to minimize ground loops and lead resistance
drops since the regular has no external sense lead. Bypassing the output is also recommended.
FIGURE 8 - ±15 V TRACKING VOLTAGE REGULATOR
FIGURE 7 - CURRENT REGULATOR
'nput
~
O,331'F
1
MC78L05
?
h
'fA.
Constant
Current to
~
Grounded Load
The MC78LOO regulators can also be used as a current source when
connected as above. In order to minimize dissipation the MC78L05C is
chosen in this application. Resistor R determines the current as follows:
FIGURE 9 - POSITIVE AND NEGATIVE REGULATOR
5V
'O=R
118
=
+ liB
0.1 J1F
0.33 J1F
3.8 rnA over line and load changes
- v,
For example, a 100 rnA current source would require A to be a
50·ohm, 1/2-W resistor and the output voltage compliance would
~
0331'F
be the input voltage less 7 volts.
STANDARD APPUCATION
;;:"'-M"'T
0331'FL
~outPut
Co"
:-
A common ground is required between the
input and the output voltages. The input volt·
age must remain typically 2.0 V above the output voltage even during the low point on the
input ripple voltage .
.. = C,
is required if regulator is located an
appreciable distance from power .upply
filter .
•• = Co
is not needed for stability; however,
it does improve transient response.
MOTOROLA LINEAR/INTERFACE DEVICES
3-150
1
MC79LXX
L
h
I. . ._I...
O_,_'_I'_F...o
_vo
®
MC78MOO
Series
MOTOROLA
THREE-TERMINAL MEDIUM CURRENT
POSITIVE VOLTAGE REGULATORS
THe MC78MOO Series positive voltage regulators are identical
to the popular MC7800 Series devices, except that they are specified for only half the output current. Like the MC7800 devices,
the MC78MOO three-terminal regulators are intended for local, oncard voltage regulation.
Internal current limiting, thermal shutdown circuitry and safearea compensation for the internal pass transistor combine to
make these devices remarkably rugged under most operating conditions. Maximum output current, with adequate heatsinking is
500 mAo
• No External Components Required
II
THREE-TERMINAL MEDIUM
CURRENT POSITIVE FIXED
VOLTAGE REGULATORS
I
PIN 1. INPUT
2. OUTPUT
3. GROUND
A
G SUFFIX
METAL PACKAGE
CASE 79-05
2
10
3
(Case connected
to Pin 3)
21
3
(Bottom View)
• Internal Thermal Overload Protection
• Internal Short-Circuit Current Limiting
TSUFFIX
PLASTIC PACKAGE
CASE 221A-04
• Output Transistor Safe-Area Compensation
EQUIVALENT SCHEMATIC DIAGRAM
(All 3 Plastic Types)
Input
PIN 1. INPUT
2. GROUND
3. OUTPUT
(Heatsink surface connepted to Pin 21
'"
10
300
pF .,r"-"NV--H
13 0.24
DTSUFFIX
PLASTIC PACKAGE
CASE 369A-03
DPAK
200
50
Output
'------+.-+---jr-o
3
DT-l SUFFIX
PLASTIC PACKAGE
CASE 369-03
DPAK
!
ORDERING INFORMATION
Tested Operating
Device
Junction Temp. Range Package
MC7BMXXCG*
MC7BMXXCDT**
MC7BMXXCDT·l**
Metal
Can
TJ = O°Cto
+125°C
IOPA"K
TJ = -40°C to
+125°C
Plastic
MC78MXXBT#
TYPE NONOLTAGE
MC78M05B,C 5.0 Volts
MC78M06B,C 6.0 Volts
MC78M08B,C 8.0 Volts
MC78M12B,C 12 Volts
MC78M15B,C 15 Volts
MC78M18B,C 18 Volts
MC78M20B,C 20 Volts
MC78M24B,C 24 Volts
Power
XX Indicates nominal voltage.
* Available in 5, 8, 12 and 15 volt devices.
** Available in 5, 12 and' 5 volt devltes.
# Automotive temperature range selections are
available with special test conditions and
additional tests in 5, 8, 12 and 15 volt devices.
Contact your local Motorola sales office for
information.
MOTOROLA LINEAR/INTERFACE DEVICES
3-151
I~
Power
MC7BMXXCT
..
MC78MOO Series
-
MAXIMUM RATINGS (TA - + 25°C unless otherwise noted)
Rating
Input Voltage (5.0 V-18 V)
(20 V-24 V)
Power Dissipation (Package Limitation)
Plastic Package
TA ~ 25°C
Derate above TA ~ 25°C
TC ~ 25°C
Derate above TC ~ 110°C
, Metal Package
TA ~ 25°C
Derate above TA ~ 25°C
TC ~ 25°C
Derate above TC ~ 85°C
Symbol
Value
Unit
VI
35
40
Vdc
Po
°JA
Po
Internally Limited
70
Internally Limited
5.0
°JC
Po
OJA
Po
OJC
MC78MXXC
MC78MXXB
Operating Junction Temperature Range
Storage Temperature Range
Tstg
-65 to + 150
°C
Characteristic
Load Regulation
(TJ ~ + 25°C, 5.0 mA
(TJ ~ + 25°C, 5.0 mA
Output Voltage
(7.0 Vdc <; VI
(7.0 Vdc <; VI
<;
<;
<;
VI
<;
25 Vdc, 10
<;
10
10
<;
500 rnA)
200 mAl
< TJ < + 125°C, Po
<;
<;
~
<;
10
10
<;
<;
~
5.0 W unless otherwise
Min
Typ
Max
Unit
Vo
4.8
5.0
5.2
Vdc
Regline
-
3.0
50
mV
-
20
10
100
50
-
5.25
Vdc
mA
200 rnA)
mV
Vo
4.75
liB
-
3.2
6.0
-
-
0.8
0.5
-
40
-
200 mAl
350 rnA)
+ 25°C)
Quiescent Current Change
(8.0 Vdc <; VI <; 25 Vdc, 10
(5.0 mA <; 10 <; 350 mAl
Output Noise Voltage (TA
<;
<;
Symbol
Regload
25 Vdc, 5.0 mA
20 Vdc, 5.0 mA
Input Bias Current (TJ
~
°CIW
°C
+ 25°C)
Line Regulation
(TJ ~ + 25°C, 7.0 Vdc
°CIW
Oto +150
-40 to +150
~ 10 V, 10 ~ 350 mA, O°C
noted.)
~
°CIW
Internally Limited
185
Internally Limited
25
TJ
MC78M05 ELECTRICAL CHARACTERISTICS (VI
Output Voltage (TJ
°CIW
mA
Ll.IIB
~
200 rnA)
+ 25°C, 10Hz
<;
f
<;
Ripple Rejection (T, DT and DT-1 suffixes only)
(10 ~ 100 rnA, f ~ 120 Hz, 8.0 V <; VI <; 18 V)
(10 ~ 300 mA, f ~ 120 Hz, 8.0 <; VI <; 18 V, TJ
100 kHz)
Vn
RR
~
Short Circuit Current Limit (TJ
~
+25°C, VI
~
62
62
-
-
80
VI-VO
-
2.0
-
Vdc
25°C)
Dropout Voltage
(TJ ~ + 25°C)
35 V)
Average Temperature Coefficient of Output Voltage
(10 ~ 5.0 mAl
Peak Output Current
(TJ ~ 25°C)
lOS
-
50
Ll.VO/Ll.T
-
±0.2
-
mVI'C
10
-
700
-
mA
MOTOROLA LINEAR/INTERFACE DEVICES
3-152
/LV
dB
mA
MC78MOO Series
MC78M06 ELECTRICAL CHARACTERISTICS (VI ~ 11 V, 10 ~ 350 mA, O'C < TJ < + 125'C, PD '" 5.0 W unless otherwise noted.!
Characteristic
Output Voltage (TJ
~
+ 25'C)
Symbol
Min
Typ
Max
Unit
Va
5.75
6.0
6.25
Vdc
-
5.0
50
mV
-
20
10
120
60
Va
5.7
-
6.3
Vdc
liB
-
3.2
6.0
mA
-
-
-
0.8
0.5
-
45
-
Line Regulation
(TJ ~ + 25'C, 8.0 Vdc '" VI '" 25 Vdc, 10 ~ 200 mAl
Regline
load Regulation
(TJ ~ + 25'C, 5.0 mA '" 10 '" 500 mAl
(TJ ~ + 25'C, 5.0 mA '" 10 '" 200 mAl
Regload
Output Voltage
(B.O Vdc '" VI '" 25 Vdc, 5.0 mA '" 10 '" 200 mAl
(B.O Vdc '" VI '" 21 Vdc, 5.0 mA '" 10 '" 350 mAl
Input Bias Current (TJ
+ 25'C)
~
Quiescent Current Change
(9.0 Vdc '" VI '" 25 Vdc, 10 ~ 200 mAl
(5.0 mA '" 10 '" 350 mAl
Output Noise Voltage (TA
~
Ripple Rejection (T suffix only)
(10 ~ 100 mA, f ~ 120 Hz, 9.0 V '" VI '" 19 V)
(10 ~ 300 mA, f ~ 120 Hz, 9.0 V '" VI'" 19 V, TJ
Vn
RR
~
+ 25'C, VI
~
35 V)
Average Temperature Coefficient of Output Voltage
(10 ~ 5.0 mAl
Peak Output Current
ITJ ~ 25'C)
/LV
dB
59
59
BO
-
VI-Va
-
2.0
-
lOS
-
50
-
mA
6.VO/6.T
±0.2
-
mV/,C
10
-
700
-
mA
25'C)
Dropout Voltage
(TJ ~ + 25'C)
~
mA
6.IIB
+ 25'C, 10 Hz '" f '" 100 kHz)
Short Circuit Current Limit ITJ
mV
-
Vdc
MC78M08 ELECTRICAL CHARACTERISTICS (VI ~ 14 V, 10 ~ 350 mA, O'C < TJ < + 125'C, PD '" 5.0 W unless otherwise noted.)
Characteristic
Output Voltage (TJ
~
+ 25'C)
Symbol
Min
Typ
Max
Unit
Va
7.7
B.O
B.3
Vdc
-
6.0
50
mV
-
25
10
160
BO
Va
7.6
-
8.4
Vdc
liB
-
3.2
6.0
mA
-
-
O.B
0.5
52
-
56
56
BO
-
VI-Va
-
2.0
-
lOS
-
50
-
mA
6.VO/6.T
±0.2
-
mV/,C
10
-
700
-
mA
Line Regulation
(TJ ~ + 25'C, 10.5 Vdc '" VI '" 25 Vdc, 10 ~ 200 mAl
Regline
load Regulation
(TJ ~ + 25'C, 5.0 mA '" 10 '" 500 mAl
(TJ ~ + 25'C, 5.0 mA '" 10 '" 200 mAl
Regload
Output Voltage
(10.5 Vdc '" VI '" 25 Vdc, 5.0 mA '" 10 '" 200 mAl
(10.5 Vdc '" VI '" 23 Vdc, 5.0 mA '" 10 '" 350 mAl
Input Bias Current ITJ
~
+ 25'C)
Quiescent Current Change
(10.5 Vdc '" VI '" 25 Vdc, 10 ~ 200 mAl
(5.0 mA '" 10 ",350 mAl
6.IIB
Output Noise Voltage (TA ~ + 25'C, 10Hz'" f '" 100 kHz)
Vn
Ripple Rejection (T suffix only)
(10 ~ 100 mA. f ~ 120 Hz, 11.5 V '" VI '" 21.5 V)
(10 ~ 300 mA, f ~ 120 Hz, 11.5 V '" VI '" 21.5 V, TJ ~ 25'C)
RR
Dropout Voltage
ITJ ~ + 25'C)
Short Circuit Current Limit (TJ
~
+ 25'C, VI
~
35 V)
Average Temperature Coefficient of Output Voltage
(10 ~ 5.0 mAl
Peak Output Current
(TJ ~ 25'C)
MOTOROLA LINEAR/INTERFACE DEVICES
3-153
mV
mA
-
/LV
dB
Vdc
•
MC78MOO Series
MC78M12 ELECTRICAL CHARACTERISTICS (VI = 19 V, 10 = 350 rnA. O°C < TJ < + 125°C, PD '" 5.0 W unless otherwise noted.)
Characteristic
Output Voltage (TJ
=
+ 25°C)
Line Regulation
(TJ = +25°C, 14.5 Vdc '" VI '" 30 Vdc, 10
=
=
=
Unit
12.5
Vdc
-
8.0
50
mV
-
25
10
240
120
Va
11.4
-
12.6
Vdc
liB
-
3.2
6.0
rnA
-
0.8
0.5
75
-
55
55
-
-
-
2.0
-
-
D. 5
0.3
0.2
O. 1
25
0:
'""\
8JC = 5'CN!
PD(MAX) = 7.5 W
"1
I
50
3:
\
2
,p
\
\.
75
100
125
150
0.5
NO HEAT SINK
::::::-.
0.3
0.2 _ 8JC = 25'CN!
- PD(MAX) = 7.5 W
0.1
r--..
~
.......
25
75
50
100
MOTOROLA LINEAR/INTERFACE DEVICES
3-156
,
~
t"-,.
~
TA, AMBIENT TEMPERATURE ('CI
TA, AMBIENT TEMPERATURE ('C)
"\
,~
125
150
MC78MOO Series
TYPICAL PERFORMANCE CURVES
FIGURE 3 -
PEAK OUTPUT CURRENT versus
DROPOUT VOLTAGE
FIGURE 4 - DROPOUT VOLTAGE
versus JUNCTION TEMPERATURE
1.0
2.5
0.9
u;
ffi
0.8
I
I
If
~ 0.7
5
!z
~
::>
u;
,~
0.6
0.5
I\.
~ 0.4
50.3
o
9 0.2
f-TJ
~
w
'\:
~
!::i 1.5
§;
I\.
r-...
'I-
u
!::i 2.0
TJ I~ 25'C
~ 12~
'"
>-
~
f'... I'..
r-..."-
.........
0.1
.........
o
o
5.0
80
~
35
o
o
40
r--
7'
0
10
a
~
~
10
= 10mA-
I
l00mA_ I
-
25
50
75
100
125
ISO
TJ. JUNCTION TEMPERATURE I'C)
100
0
~
~
50mA
60
\
~
~
or
Vo ~ 5.0 V
VI ~ 10V
Co ~ 0
TJ ~ 25'C
gi 40 r---
I--
~
\
100
40
\
I
10
1.0 k
10 k 100 k
f. fREQUENCY IHzl
1.0M
30
0.01
10 M 100 M
llilll
0.1
0.5 1.0
10. OUTPUT CURRENT IA)
4.0
~
\TJ ~ 125'C
0
.0
./ TJ ~ 25'C
VTJ ~ 125'C
5.0
10
llU
V T~ 2!5l~
5. 0
25,C t - -
TJ
J
I
Ir
Y
o
o
Va = 5.0 V
VI = 10V
Co = 0
f = 120Hz
TJ = 25'C
FIGURE 8 - BIAS CURRENT versus
OUTPUT CURRENT
,1
4.0
Ir
I-
f-- l-
1\
FIGURE 7 - BIAS CURRENT versus
INPUT VOLTAGE
1.0
10
/ " 10 ~ 0.5A
z
.Ii>
I'-.
~ sOOmA_ l -
FIGURE 6 - RIPPLE REJECTION versus
OUTPUT CURRENT
.Il
20
1.0
I'-.
1.0
RIPPLE REJECTION versus FREQUENCY
100
--r--
r- I-
10
l- 0.5 I - - I- avO-I = 100 mVI
10
15
20
25
30
VI-VO. DROPOUT VOLTAGE IVOLTS)
FIGURE 5 -
~
~
~
o
r--- I'-.
Vo ~ 5.0 V
10 ~ 0.5 A
TJ - 125'C
VI-VO
I.0
=
5.0 V
Ll~n11
10
15
20
25
VI. INPUT VOLTAGE IVdc)
30
35
0
0.01
40
0.1
0.5 1.0
10. OUTPUT CURRENT IA)
MOTOROLA LINEAR/INTERFACE DEVICES
3-157
111 10
II
II
MC78MOO Series
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
The MC78MOO Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts
down the circuit when subjected to an excessive power
overload condition, Internal Short Circuit Protection that
limits the maximum current the circuit will pass, and
Output Transistor Safe-Area Compensation that
r~duces the output short circuit current as the voltage
across the pass transistor is increased.
In many low current applications, compensation
capacitors are not required. However, it is recommended that the regulator input be bypassed with a
capacitor if the regulator is connected to the power supFIGURE 9 -
ply filter with long wire lengths, or if the output load
capacitance is large. An input bypass capacitor should
be selected to provide good high frequency characteristics to insure stable operation under all load conditions. A 0.33 p.F or 'Iarger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies should be chosen. The bypass capacitor
should be mounted with the shortest possible leads
directly across the regulators input terminals. Normally
good construction techniques should be used to minimize ground loops and lead resistance drops since the
regulator has no external sense lead.
FIGURE 10 -
CURRENT REGULATOR
ADJUSTABLE OUTPUT REGULATOR
VO, 7.0 V to 20 V
VIN VO" 2.0 V
Output
Constant
Current to
0.1
Grounded Load
,.F
The MC78MOO regulators can also be used as a current
source when connected as above. In order to minimize
dissipation the MC78M05C is chosen in this application.
Resistor R determines the current as follows:
10
~
5.0 V
R
10 k
1.0 k
+ liB
The addition of an operational amplifier allows adjust·
ment to higher or intermediate values while retaining reg·
ulation characteristics. The minimum voltage obtainable
with this arrangement is 2.0 volts greater than the regu·
lator voltage.
liB ~ 1.5 mA over line and load changes
For example, a 500 mA current source would require R to
be a 10 ohm, 10 W resistor and the output voltage compliance would be the input voltage less 7.0 volts.
FIGURE 11 -
CURRENT BOOST REGULATOR
FIGURE 12 - CURRENT BOOST WITH
SHORT-CIRCUIT PROTECTION
'"'"'~'
~MoT'+O"'~
J
-;:J
1.0 ,.F
XX
~
MJ2955 or Equiv.
Input
R
0.1 ,.F
XX
2 digits of type number indicating voltage.
The MC78MOO series can be current boosted with a PNP
transistor. The MJ2955 provides current to 5.0 amperes.
Resistor R in conjunction with the VBE of the PNP determines when the pass transistor begins conducting; this
circuit is not short circuit proof. Input output differential
voltage minimum is increased by VBE of the pass
transistor.
~
2 digits of type
1.0 ,.F
number indicating
voltage.
-;:-
1
The circuit of Figure 7 can be modified to provide supply
protection against short circuits by adding a short circuit
sense resistor, Rsc , and an additional PNP transistor. The
current sensing PNP must be able to handle the shortcircuit current of the three-terminal regulator. Theretore,
a two-ampere plastic power transistor is specified.
MOTOROLA LINEAR/INTERFACE DEVICES
3-158
®
MC78TOO
Series
MOTOROLA
Specifications and Applications
Information
•
THREE-AMPERE
POSITIVE FIXED
VOLTAGE REGULATORS
THREE-AMPERE POSITIVE VOLTAGE REGULATORS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
This family of fixed voltage regulators are monolithic integrated
circuits capable of driving loads in excess of 3.0 amperes. These
three-terminal regulators employ internal current limiting, thermal shutdown, and safe-area compensation. Devices are available
with improved specifications, including a 2% output voltage tolerance, on AC-suffix 5.0, 12 and 15 volt device types.
Although designed primarily as a fixed voltage regulator, these
devices can be used with external components to obtain adjustable voltages and currents. This series of devices can be used
with a series-pass transistor to supply up to 15 amperes at the
nominal output voltage.
KSUFFIX
METAL PACKAGE
CASE 1-03
• Output Current in Excess of 3.0 Amperes
• Power Dissipation: 30 W IK-Suffix), 25 WIT-Suffix)
(Bottom View)
• No External Components Required
• Output Voltage Offered in 2% and 4% Tolerance*
PIN 1. INPUT
2. OUTPUT
CASE GROUNO
• Thermal Regulation is Specified
• Internal Thermal Overload Protection
• Internal Short-Circuit Current Limiting
• Output Transistor Safe-Area Compensation
TSUFFIX
PLASTIC PACKAGE
CASE 221A-04
MAXIMUM RATINGS (TA ~ +25°C unless otherwise noted)
Rating
Input Voltage (5.0 V-12 V)
(15V)
Power Dissipation and Thermal
Characteristics
Plastic Package (Note 11
TA ~ +25°C
Thermal Resistance, Junction
TC ~ +25°C
Thermal Resistance, Junction
Metal Package (Note 1)
TA ~ +25°C
Thermal Resistance, Junction
TC ~ +25°C
Thermal Resistance, Junction
Symbol
Value
Unit
Vin
35
40
Vdc
Po
ROJA
Po
ROJC
Internally Limited
65
Internally Limited
2.5
Po
ROJA
Po
ROJC
Internally Limited
35
Internally Limited
2.5
T sta
-65to +150
TJ
Oto +150
(Heatsink surface
to Air
to Case
to Air
to Case
Storage Junction Temperature Range
Operating Junction Temperature Range
MC78TOOC, AC
°CIW
TYPE NONOLTAGE
MC78T12
MC78T15
12 Volts
15 Volts
Tested
Output
°CIW
°C
°c
Voltage
Device
Tolerance
MC7BTXXCK
MC7BTXXACK
4%
MC7BTXXCT
MC7BTXXACT
4%
2%'
MC7BTXXBT#
MC7BTXXABT #
4%
2%*
2%*
Operating
Junction
Temp. Range Package
o to + 125°C
Metal
Power
~
Power
~40to
+ 125°C
Plastic
Power
XX Indicates nominal voltage.
* 2% regulators are available in 5, 12 and 15 volt
devices.
#Automotive temperature range selections are
available with special test conditions and additional
tests. Contact your local Motorola sales office for
information.
MOTOROLA LINEAR/INTERFACE DEVICES
3-159
Pin 2)
ORDERING INFORMATION
°CIW
1. Although power dissipation is internally limited, specifications apply only for Po . .; ; Pmax .
Pmax = 30 W for K package
Pmax = 25 W for T package.
5.0 Volts
8.0 Volts
connected to
°CIW
NOTE:
MC78T05
MC78T08
PIN 1. INPUT
2. GROUND
3. OUTPUT
•
MC78TOO Series
MC78T05AC, C
ELECTRICAL CHARACTERISTICS (Vin ~ 10 V 10 ~ 30 A O°C '" TJ '" 125°C PO'" Pm ax [Note 1J unless otherwise noted)
MC78T05AC
Symbol
Characteristic
Output Voltage
(5.0 rnA '" 10 '" 3.0 A, TJ ~ + 25°C)
(5.0 rnA '" 10 '" 3.0 A;
5.0 rnA '" 10 '" 2.0 A, 7.3 Vdc '" Yin '" 20 Vdc)
Line Regulation (Note 2)
(7.2 Vdc '" Yin '" 35 Vdc,
7.2 Vdc '" Yin '" 35 Vdc,
8.0 Vdc '" Yin '" 12 Vdc,
7.5 Vdc '" Yin '" 20 Vdc,
Max
Min
Typ
Max
4.9
4.8
5.0
5.0
5.1
5.2
4.8
4.75
5.0
5.0
5.2
5.25
Regline
-
3.0
25
-
3.0
25
-
-
10
15
30
80
0.002
0.03
Unit
Vdc
Vo
mV
20 W, TA
~
mV
Regload
-
10
15
30
80
0.001
0.01
-
3.5
4.0
5.0
6.0
-
3.5
4.0
5.0
6.0
t.IB
-
0.3
1.0
-
0.3
1.0
rnA
RR
62
75
-
62
75
-
dB
Vin-VO
-
2.2
2.5
-
2.2
2.5
Vn
-
10
-
-
10
-
p.VNO
-
2.0
-
mO
1.5
-
A
-
5.0
-
A
0.2
-
mVrC
Regtherm
~
Typ
10 ~ 5.0 rnA, TJ ~ + 25°C;
10 ~ 1.0 A, TJ ~ + 25°C;
10 ~ 3.0 A, TJ ~ + 25°C;
10 ~ 1.0 A)
Load Regulation (Note 2)
(5.0 rnA '" 10 '" 3.0 A, TJ ~ +25°C)
(5.0 rnA '" 10 '" 3.0 A)
Thermal Regulation
(Pulse ~ 10 ms, P
MC78T05C
Min
%VOiW
+ 25°C)
Quiescent Current
IB
(5.0 rnA '" 10 '" 3.0 A. TJ ~ + 25°C)
(5.0 rnA '" 10 '" 3.0 A)
Quiescent Current Change
rnA
(7.2 Vdc '" Yin '" 35 Vdc, 10 ~ 5.0 rnA, TJ ~ + 25°C;
5.0 rnA '" 10 '" 3.0 A. TJ ~ + 25°C;
7.5 Vdc '" Vin '" 20 Vdc, 10 ~ 1.0 A)
Ripple Rejection
(8.0 Vdc '" Vin '" 18 Vdc, 1 ~ 120 Hz,
10 ~ 2.0 A, TJ ~ 25°C)
Dropout Voltage (10
~
3.0 A, TJ
Output Noise Voltage
(10 Hz '" 1 '" 100 kHz, TJ
Output Resistance (I
~
~
~
+ 25°C)
+25°C)
1.0 kHz)
Short Circuit Current Limit
(Vin ~ 35 Vdc, TJ ~ + 25°C)
Peak Output Current (TJ
~
Vdc
+25°C)
Average Temperature Coefficient 01 Output Voltage
(10 ~ 5.0 rnA)
RO
-
2.0
-
ISC
-
1.5
-
Imax
-
5.0
-
TCVO
-
0.2
-
NOTES:
1. Although power dissipation is internally limited, specifications apply only for PO"';: Pmax ·
Pmax "" 30 W for K package
Pm ax = 25 W for T package
2. Line and load regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to heating
MOTOROLA LINEAR/INTERFACE DEVICES
3-160
effects must be taken into account
MC78TOO Series
MC78T08C
ELECTRICAL CHARACTERISTICS (Vin ~ 13 V 10 ~ 30 A O°C '" TJ '" 125°C PO'" Pmax INote
lJ
unless otherwise noted)
MC78T08C
Symbol
Characteristic
Output Voltage
(5.0 mA '" 10 '" 3.0 A. TJ ~ + 25°C)
(5.0 mA '" 10 '" 3.0 A;
5.0 mA '" 10 " 2.0 A, 10.4 Vdc '" Yin '" 23 Vdc)
Regline
Load Regulation (Note 2)
(5.0 mA '" 10 '" 3.0 A, TJ ~ + 25°C)
(5.0 mA '" 10 '" 3.0 A)
Regload
Regtherm
~
20 W, TA
~
Quiescent Current Change
(10.3 Vdc " Yin '" 35 Vdc, 10 ~ 5.0 mA, TJ
5.0 mA '" 10'" 3.0 A, TJ ~ +25°C;
10.7 Vdc '" Yin '" 23 Vdc, 10 ~ 1.0 A)
= 3.0 A, T J
Output Resistance (f
=
=
~
~
~
8.3
8.4
-
4.0
35
-
10
15
30
80
0.002
0.03
mV
mV
%VOIW
3.5
4.0
5.0·
6.0
Il.IB
-
0.3
1.0
mA
RR
60
71
-
dB
Yin-YO
-
2.2
2.5
Vdc
Vn
-
10
-
,,"VIVO
RO
-
2.0
-
mil
1.5
-
A
-
5.0
-
mvrc
25°C)
+ 25°C)
+ 25°C)
Short Circuit Current Limit
(Vin ~ 35 Vdc, T J = + 25°C)
~
8.0
8.0
+25°C;
1.0 kHz)
Peak Output Current (TJ
7.7
7.6
Unit
mA
IB
Ripple Rejection
(II Vdc '" Yin '" 21 Vdc, f ~ 120 Hz, 10 ~ 2.0 A, TJ
Dropout Voltage 110
Max
+ 25°C)
Quiescent Current
(5.0 mA '" 10 '" 3.0 A, TJ ~. + 25°C)
(5.0 mA '" 10 '" 3.0 A)
Output Noise Voltage
(10 Hz '" f '" 100 kHz, TJ
Typ
Vdc
Line Regulation (Note 2)
(10.3 Vdc '" Yin '" 35 Vdc, 10 ~ 5.0 mA, TJ ~ + 25°C;
10.3 Vdc '" Yin '" 35 Vdc, 10 ~ 1.0 A, TJ ~ + 25°C;
11 Vdc '" Yin '" 17 Vdc, 10 ~ 3.0 A, TJ ~ + 25°C;
10.7 Vdc '" Yin '" 23 Vdc, 10 ~ 1.0 A)
Thermal Regulation
(Pulse ~ 10 ms, P
Min
Vo
ISC
+ 25°C)
Average Temperature Coefficient of Output Voltage (10
'max
=
5.0 mAl
TCVO
0.3
A
NOTES:
1. Although power dissipation is internally limited, specifications apply only for Po .,;; Pmax .
Pmax = 30 W for K package
Pmax = 25 W for T package
2. Une and load regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va
due to heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-161
•
II
MC78TOO Series
MC78T12AC, C
ELECTRICAL CHARACTERISTICS (Vin ~ 17 V 10 ~ 30 A O°C '" TJ '" 125°C PO'" Pmax [Note 11 unless otherwise noted)
MC78Tl2AC
Symbol
Characteristic
Output Voltage
(5.0 rnA '" 10 '" 3.0 A. TJ ~ + 25°C)
(5.0 rnA '" 10 '" 3.0 A;
5.0 rnA '" 10 '" 2.0 A, 14.5 Vdc '" Yin '" 27 Vdc)
Line Regulation (Note 2)
(14.5 Vdc '" liin '" 35 Vdc, 10 ~ 5.0 rnA, TJ ~ + 25°C;
14.5 Vdc '" Yin "35 Vdc, 10 ~ 1.0 A, TJ ~ +25°C;
16 Vdc" Vin" 22 Vdc, 10 ~ 3.0 A, TJ ~ + 25°C;
14.9 Vdc '" Yin " 27 Vdc, 10 ~ 1.0 A)
Load Regulation (Note 2)
(5.0 rnA " 10 " 3.0 A, TJ ~ + 25°C)
(5.0 rnA '" 10 " 3.0 A)
Thermal Regulation
(Pulse ~ 10 ms, P
20 W, TA
~
Typ
Max
Min
Typ
Max
11.75
11.5
12
12
12.25
12.5
11.5
11.4
12
12
12.5
12.6
Regline
-
6.0
45
-
6.0
45
Regload
-
Unit
Vdc
Vo
mV
mV
-
10
15
30
80
-
10
15
30
80
0.001
0.01
-
0.002
0.03
-
3.5
4.0
5.0
6.0
3.5
4.0
5.0
6.0
~IB
-
0.3
1.0
-
0.3
1.0
rnA
RR
57
67
-
57
67
-
dB
Yin-YO
-
2.2
2.5
2.5
-
-
2.2
10
10
-
p.VNO
-
2.0
-
-
2.0
-
mil
1.5
1.5
-
A
5.0
-
-
5.0
-
A
0.5
-
-
0.5
-
mVrC
Regtherm
~
MC78T12C
Min
%VOIW
+ 25°C)
Quiescent Current
(5.0 rnA '" 10 " 3.0 A, TJ ~ + 25°C)
(5.0 rnA " 10 '" 3.0 A)
Quiescent Current Change
rnA
IB
(14.5 Vdc" Yin "35 Vdc, 10 ~ 5.0 rnA. TJ ~ + 25°C;
5.0 rnA" 10 '" 3.0 A, TJ ~ + 25°C;
14.9 Vdc" Yin '" 27 Vdc, 10 ~ 1.0 A)
Ripple Rejection
(15 Vdc" Yin " 25 Vdc, I ~ 120 Hz,
10 ~ 2.0 A, TJ ~ 25°C)
Dropout Voltage (10
~
3.0 A, TJ
Output Noise Voltage
(10 Hz" I" 100 kHz, TJ
Output Resistance (I
~
~
Vn
~
~
35 Vdc, TJ
~
Vdc
+25°C)
1.0 kHz)
RO
Short Circuit Current Limit
(Vin
+ 25°C)
ISC
+ 25°C)
Peak Output Current (TJ
~
+ 25°C)
Imax
Average Temperature Coefficient
of Output Voltage (10 ~ 5.0 rnA)
TCVO
-
NOTES:
1. Although power dissipation is internally limited, specifications apply only for Po ::s; Pmax .
Pmax = 30 W for K package
Pmax = 25 W for T package
2. Line and load regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to
heating effects must be taken into account
MOTOROLA LINEAR/INTERFACE DEVICES
3-162
MC78TOO Series
MC78T15AC. C
ELECTRICAL CHARACTERISTICS (Vin
~ 20 V. 10 ~ 3.0
A. O'C '" TJ '" 125'C, Po '" Pmax [Note 11. unless otherwise noted.)
MC78T15AC
Characteristic
Symbol
Output Voltage
(5.0 mA '" 10 '" 3.0 A, TJ ~ + 25'C)
(5.0 mA '" 10 '" 3.0 A;
5.0 mA '" 10 '" 2.0 A, 17.5 Vdc '" Vin '" 30 Vdc)
Regline
Load Regulation (Note 2)
(5.0 mA '" 10 '" 3.0 A, TJ ~ + 25"C)
(5.0 mA '" 10 '" 3.0 A)
Regload
Regtherm
~
20 W, TA
~
+ 25'C)
Quiescent Current
Typ
Max
Min
Typ
Max
14.7
14.4
15
15
15.3
15.6
14.4
14.25
15
15
15.6
15.75
-
7.5
55
-
7.5
55
-
-
10
15
30
80
-
-
10
15
30
80
0.001
0,01
-
0.002
0.03
-
3.5
4.0
5.0
6.0
-
3.5
4.0
5.0
6.0
0.3
1.0
mA
dB
mV
mV
%VOIW
mA
IS
(5.0 mA '" 10 '" 3.0 A, TJ ~ + 25'C)
(5.0 mA '" 10 '" 3.0 A)
Unit
Vdc
Vo
Line Regulation (Note 2)
(17.6 Vdc '" Vin '" 40 Vdc, 10 ~ 5.0 mA, TJ ~ + 25'C;
17.6 Vdc '" Vin '" 40 Vdc, 10 ~ 1.0 A, TJ ~ + 25"C;
20 Vdc '" Vin '" 26 Vdc, 10 ~ 3.0 A, TJ ~ + 25"C;
18 Vdc '" Vin '" 30 Vdc, 10 ~ 1.0 A)
Thermal Regulation
(Pulse ~ 10 ms, P
MC78T15C
Min
Quiescent Current Change
(17.6 Vdc '" Vin '" 40 Vdc, 10 ~ 5.0 mA, TJ ~ + 25'C;
5.0 mA '" 10 '" 3.0 A, TJ ~ + 25'C;
18 Vdc '" Vin '" 30 Vdc, 10 ~ 1.0 A)
alB
-
0.3
1.0
-
Ripple Rejection
(18.5 Vdc '" Vin '" 28.5 Vdc, f ~ 120 Hz,
10 ~ 2.0 A, TJ ~ 25"C)
RR
55
65
-
55
65
-
Dropout Voltage (10 ~ 3.0 A, TJ ~ + 25"C)
Vin-VO
-
2.2
2.5
-
2.2
2.5
10
-
-
10
-
,.VNO
RO
-
2.0
-
-
2.0
-
mil
ISC
-
1.0
-
-
1.0
-
A
-
5.0
-
mVI"C
Output Noise Voltage
(10 Hz '" f '" 100 kHz, TJ ~ + 25'C)
Output Resistance (f
~
1.0 kHz)
Short Circuit Current Limit
(Vin ~ 40 Vdc, TJ ~ + 25'C)
Vn
Peak Output Current (TJ ~ + 25"C)
Imax
-
5.0
-
Average Temperature Coefficient of Output Voltage
(10 ~ 5.0 mAl
TCVO
-
0.6
-
0.6
Vdc
A
NOTES:
1. Although power dissipation is internally limited, specifications apply only for Po .;;: Pmax .
Pmax = 30 W for K package
Pmax = 25 W for T package
2. Line and load regulation are specified at constant junction temperature. Changes in
separately. Pulse testing with low duty cycle is used.
Va due to heating effects must be taken
MOTOROLA LINEAR/INTERFACE DEVICES
3-163
into account
II
•
MC78TOO Series
SCHEMATIC I;)IAGRAM
1.Ok
~21
J_1.0k
01
Lf
40~
rtQ4
>--t 06
020
022
5.6 k
~
01.
3.9k
tl
r? a:~
6.0k
014
023
300
200
50
rf
1::,
I
~ Regline
=
2.4 mV
ut
voltage change per watt. The change in dissipated
power can be caused by a change in either the input
voltage orthe load current. Thermal regulation is a function of I.C. I'ayout and die attach techniques, and usually
occurs within 10 ms of a change in power dissipation.
After 10 ms, additional changes in the output voltage
are due to the temperature coefficient of the device.
Figure 1 shows the line and thermal regulation
response of a typical MC78T05AC to a 20 watt input
pulse. The variation of the output voltage due to line
regulation is labeled CD and the thermal regulation component is labeled ®. Figure 2 shows the load and therma.! regulation response of a typical MC78T05AC to a
20 watt load pulse. The output voltage variation due to
load regulation is labeled CD and the thermal regulation
component is labeled ®.
FIGURE 2 -
LOAD AND THERMAL REGULATION
t, TIME (2.0 msidiv.J
t, TIME (2.0 msldiv.J
CD
autp
'"
Gnd
FIGURE 1 - LINE AND THERMAL REGULATION
® = Regtherm = 0.0015%VOIW
0.12
) ...
VOLTAGE REGULATOR PERFORMANCE
The performance of a voltage regulator is specified
by its immunity to changes in load, input voltage, power
dissipation, and temperature. Line and load regulation
are tested with a pulse of short duration « 100 /Ls) and
are strictly a function of electrical gain. However, pulse
widths of longer duration (> 1.0 ms) are sufficient to
affect temperature gradients across the die. These temperature gradients can cause a change in the output
voltage, in addition to changes caused by line and load
regulation. Longer pulse widths and thermal gradients
make it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output
voltage caused by a change in dissipated power for a
specified time, and is expressed as a percentage output
MC78T05AC
Va ~ 5.0 V
Yin ~ 8.0V-.18V-.8.0V
lout = 2.0 A
to
13
8.0-'5V~~~
k~·6.0k
2.0k
026" 027
200
016
~alO
07
025
10pF
520
.~a.
100
"1
~
~6.4k
2.6
024
l.Ok
3.6k
a12~
':J~
6.7V
16k
~Q9
Inp ut
MC78T05AC
Va ~ 5.0 V
Yin ~ 15
lout ~ OA-.2.0A-.OA
MOTOROLA LINEAR/INTERFACE DEVICES
3-164
CD = Regload = 4.4 mV
®=
Regtherm = 0.0015%VOIW
MC78TOO Series
FIGURE 4 -
FIGURE 3 - TEMPERATURE STABILITY
OUTPUT IMPEDANCE
1.02
.1
~
1
_I
Vin-VO = 5.0 V
lout = 100 rnA
'"
~
0
-
Vo = 5.0V
>
f-- Vin = 7.5 V
:::>
lout = 1.0 A
-Co=O
_
TJ = 25°C
f--
1':::>= 1.0
0
./
6l
~
I"--~
V
/'
-
/
/
~
z
0
0.98
-90
10- 4
-50
FIGURE 5 -
-10
30
70
110
TJ, JUNCTION TEMPERATURE lOCI
z
0
B
'"'"
0:
~
r-20
1.0
~ 80
z
§
\
;;J
0:
~
\
60 -
'"~
\
- I
40
\
1.0 k 10 k
100 k
f, FREQUENCY IHzl
100
1.0M
10M
0.01
100M
0
o
L
.s
f--
~
1:5
u
ffl
3.0
-I I
10
20
Vin, INPUT VOLTAGE IVdcl
30
40
,1.1, I
Vin-VO = 5.0 V
1.0
·il Lill
o
0.01
I II
0.1
1.0
lout, OUTPUT CURRENT IAI
MOTOROLA LINEAR/INTERFACE DEVICES
3-165
I
I
'5
~
II
~ = 125lC
2.0
0
TJ = O°C
TJ = 25°C
TJ = 125°C
Ii
TJ = 25°C
f--
Vo = 5.0 V
lout = 2.0 A
oo~
I
u
A
0.1
1.0
lout, OUTPUT CURRENT IAI
5.0
If.
U
Vo = 5.0V
Vin = 10V
Co = 0
f = 120Hz
TJ = 25°C
FIGURE 8 - QUIESCENT CURRENT versus
OUTPUT CURRENT
TJ = O°C ....... I
0
100M
II
30
FIGURE 7 - QUIESCENT CURRENT versus
INPUT VOLTAGE
4. 0
10M
-
0
\
Vo = 5.0 V
Vin=10V
-CO = 0
TJ = 25°C
10
1.0M
--
7' ~
I
1.0 k 10 k 100 k
f, FREQUENCY IHzl
100
100
;;
r-- -
10
FIGURE 6 - RIPPLE REJECTION versus
OUTPUT CURRENT
I
60
40
1.0
lout = 50 rnA
lout = 3.0 A
~
190
RIPPLE REJECTION versus FREQUENCY
100
~ 80
150
10
•
MC78TOO Series
FIGURE 9 -
DROPOUT VOLTAGE
2.5
. . . :g
~ ~
2.0
!3~
l-
0;:::
~~
101 ~ l.OAI
r- f-
0 2w
.....
1.5
r-- r--
r- r-
lout
r-
-w
0",
lout
~61.0
>
aVo
-90
-50
~
~
70
30
~
'" ~ ~
.....
0.SA-
I I
II
50 mV
-10
~
'"
:::>
u
1.0A
~
-
~ t-
=jj5
0.5
~
110
4.0
...........
:::>
0
><
it!
,~
"
.E
o
150
190
FIGURE 11 -
o
LINE TRANSIENT RESPONSE
5~
5~
0.4
Vo 1= 5.0V
)--lout ~ 150 mA
-t-Co ~ 0
TJ = 25°C
-)---
0.6
~!;!;
~~
0.2
0
'"t3
0.3
~
0.2
~:z
:::>0
O. 1
~~
-0. 1
5~
~~
-0.2
~
w
-0.2
-0.3
-0.4
5<
~
-0.6
5o..w
Q
!3 ~
1.0
~~
0.5
.§B
«
~~
~§2
10
20
30
1.5
1.0
0.5
40
\.
V
Vo ~ 5.0VVin = 10V_
Co ~ 0
TJ = 25°C-
I
I
\
\
30
40
2
0
Maximum Ambient
~
en 30
30
U)
is
I
20
~
::.::;;
10
::.::;;
'"
~
:::>
::;;
::;;
~
~
::;;
;p
20
t, TIME I",)
FIGURE 14 - MAXIMUM AVERAGE POWER
DISSIPATION FOR MC78TOOCT, ACT
!;;;
~
40
~
2
0
:::>
-
(
10
~ 40
~
O°C
J\
o
FIGURE 13 - MAXIMUM AVERAGE POWER
DISSIPATION FOR MC78TOOCK, ACK
~
~
= 25°C _
= 125°C
20
10
30
Vin-VO, INPUT·OUTPUT VOLTAGE IVdc)
t, TIME I",)
Ili
TJ
TJ
TJ
FIGURE 12 - LOAD TRANSIENT RESPONSE
w
0.8
r-..."""
"" -........"'.....-... ~
2.0
TJ, JUNCTION TEMPERATURE 1°C)
~
!:;
§?
PEAK OUTPUT CURRENT
~
..... 6.0
I I
---.
~2i
FIGURE 10 -
8.0
::;;
50
100
75
125
TA, AMBIENT TEMPERATURE 1°C)
~
;p
50
75
100
TAo AMBIENT TEMPERATURE IOC)
MOTOROLA LINEAR/INTERFACE DEVICES
3-166
125
MC78TOO Series
APPLICATIONS INFORMATION
capacitor if the regulator is connected to the power supply filter with long wire lengths, or if the output load
capacitance is large. An input bypass capacitor should
be selected to provide good high frequency characteristics to insure stable operation under all load conditions. A 0.33 J.'F or larger tantalum, mylar, or other
capacitor having low internal impedance at high frequencies should be chosen. The bypass capacitor
should be mounted with the shortest possible leads
directly across the regulator's inputterminals. Normally
good construction techniques should be used to minimize ground loops and lead resistance drops since the
regulator has no external sense lead.
DESIGN CONSIDERATIONS
The MC78TOO,A Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts
down the circuit when subjected to an excessive power
overload condition, Internal Short-Circuit Protection
that limits the maximum current the circuit will pass,
and Output Transistor Safe-Area Compensation that
reduces the output short circuit current as the voltage
across the pass transistor is increased.
In many low current applications, compensation
capacitors are not required. However, it is recommended that the regulator input be bypassed with a
FIGURE 15 -
FIGURE 16 -
CURRENT REGULATOR
ADJUSTABLE OUTPUT REGULATOR
Output
A
Constant
Current to
10
Grounded Load
0.1
/-LF
The MC78T05 regulator can also be used as a current
source when connected as above. In order to minimize
dissipation, the MC78TOS is chosen in this application.
Aesistor R determines the current as follows:
10 k
1.0 k
10 ~ 5.0 V + IB
R
l!. IB '" 0.7 mA over line, load and temperature changes
IB '" 3.5 mA
For example, a 2-ampere current source would require R
to be a 2.5 ohm, 15 W resistor and the output voltage
compliance would be the input voltage less 7.5 volts.
FIGURE 17 -
VO, 8.0 V to 20 V
Vin-VO ;;. 2.5 V
The addition of an operational amplifier allows adjustment to higher or intermediate values while retaining
regulation characteristics. The minimum voltage obtainable with this arrangement is 3.0 volts greater than the
regulator Voltage.
FIGURE 18 - CURRENT BOOST WITH
SHORT-CIRCUIT PROTECTION
CURRENT BOOST REGULATOR
2N4398
2N4398 or Equiv
Input
Input~
~MOI+O~"'
1.0 /-LF::J
xx
~
-=-
R
::J 0.1 /-L F
2 digits of type number indicating voltage.
xx
The MC78TOO,A series can be current boosted with a PNP
transistor. The 2N4398 provides current to 15 amperes.
Resistor R in conjunction with the VBE of the PNP determines when the pass transistor begins conducting; this
circuit is not short-circuit proof. Input·output differential
voltage minimum is increased by the VBE of the pass
~
2 digits of type number indicating voltage.
The circuit of Figure 17 can be modified to provide supply
protection against short circuits by adding a short-circuit
sense resistor, RSC, and an additional PNP transistor. The
current sensing PNP must be able to handle the shortcircuit current of the three-terminal regulator. Therefore,
an eight-ampere power transistor is specified.
transistor.
STANDARD APPLICATION
A common ground is required between the input and
the output voltages. The input voltage must remain typically 2.2 V above the output voltage even during the low
point on the input ripple voltage.
Input $ C 7 8 T X X Output
Cin*
0.33/-LF
CO**
XX
~
*
=
.*
~
these two digits of the type number indicate
voltage.
Cin is required if regulator is located an appreciable
distance from power supply filter. (See Applications Information for details.)
Co is not needed for stability; however, it does
improve transient response.
MOTOROLA LINEAR/INTERFACE DEVICES
3-167
•
..
®
MC7900
Series
MOTOROLA
THREE-TERMINAL
NEGATIVE VOLTAGE REGULATORS
THREE-TERMINAL
NEGATIVE FIXED
VOLTAGE REGULATORS
The MC7900 Series of fixed output negative voltage regulators
are intended as complements to the popular MC7800 Series
devices. These negative regulators are available in the same
seven-voltage options as the· MC7800 devices. In addition, one
extra voltage option commonly employed in MECL systems is
also available in the negative MC7900 Series.
Available in fixed output voltage options from - 5.0 to - 24
volts, these regulators employ current limiting, thermal shutdown, and safe-area compensation - making them remarkably
rugged under most operating conditions. With adequate heatsinking they can deliver output currents in excess of 1.0 ampere.
•
•
•
•
•
No External Components Required
Internal Thermal Overload Protection
Internal Short-Circuit Current Limiting
Output Transistor Safe-Area Compensation
Available in 2% Voltage Tolerance (See Ordering Information)
KSUFFIX
METAL PACKAGE
CASE 1-03
(Bottom View)
T SUFFIX
PLASTIC PACKAGE
CASE 221A-04
SCHEMATIC DIAGRAM
PIN 1. GROUND
2. INPUT
3. OUTPUT
connected to
Pin 21
STANDA·RD APPLICATION
~--+--+-<>Vo
In p u t $ C 7 9 X X Output
~i~~ ~F
Co"
1.0 J.lF
0.3
'-4----"_ _+-_4-_ _ _ _ _--+----"-+-_ _ _ _ _--+-4-_ _ _--'-_ _-0-0 v,
A common ground is required between the
input and the output voltages. The input voltage must remain typically 2.0 V more negative
even during the high point on the input ripple
voltage.
ORDERING INFORMATION
Device
Output Voltage
Tolerance
MC79XXCK
MC79XXACK*
4%
2%
MC79XXCT
MC79XXACT*
4%
2%
MC79XXBT#
4%
XX == these two digits of the type number indicate voltage.
Tested Operating
Junction Temp. Range
Package
Metal Power**
TJ
~
DOC!o +t2S0C
Plastic Power
TJ
~
• = Cin
is required if regulator is located an
appreciable distance from power supply
filter.
•• = Co improves stability and transient response.
-4DoC to + t2S0C
XX indicates nominal voltage.
*2% output voltage tolerance available in 5, 12 and 15 volt devices.
**Metal power package available in 5, 12 and 15 volt devices.
#Automotive temperature range selections are available with special test conditions and
additional tests in 5, 12 and 15 volt devices. Contact your local Motorola sales office for
information.
DEVICE TYPE/NOMINAL OUTPUT VOLTAGE
MC790S
MC790S.2
MC7906
MC790B
MOTOROLA LINEAR/INTERFACE DEVICES
3-168
5.0 Volts
5.2 Volts
6.0 Volts
a.OVolts
MC7912
MC791S
MC791B
MC7924
12
15
18
24
Volts
Volts
Volts
Volts
MC7900 Series
MAXIMUM RATINGS (TA =+25°C unless otherwise noted)
Rating
Input Voltage (-5.0 V;;' Yo;;' -IB V)
(24 V)
Power Dissipation
Plastic Package
TA =+25°C
Derate above TA ;:: +25°C
Symbol
Value
Unit
VI
-35
-40
Vdc
Po
Internally Limited
15.4
Watts
mW/oC
1/ROJC
Internally Limited
200
mW/oC
1/ROJA
Po
TC =+25°C
Derate above TC = +95°C (See Figure 1)
Metal Package
TA =+25°C
Derate above TA = +25°C
Po
Internally limited
Watts
1/ROJA
22.2
mW/oC
TC =+25°C
Derate above TC = +65°C
Po
1/ROJC
Internally Limited
182
Watts
mW/OC
Tsto
-65 to +150
°c
TJ
Oto+150
°c
Storage Junction Temperature Range
Junction Temperature Range
II
Watts
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance. Junction to Ambient -
Plastic Package
Metal Package
ROJA
65
45
°C/W
Thermal Resistance, Junction to Case
Plastic Package
Metal Package
ROJC
5.0
5.5
°C/W
-
MC7905C ELECTRICAL CHARACTERISTICS (VI
=-10 V, 10 =500 mAo DoC < TJ < +125°C unless otherwise noted)
Characteristic
Output Voltage (TJ
Symbol
Min
Typ
Max
Unit
Vo
-4.8
-5.0
-5.2
Vdc
=+25°C)
Line Regulation (Note 1)
(TJ =+25°C.10 = 100 mAl
-7.0 Vdc;;' VI;;' -25 Vdc
-8.0 Vdc ;;, VI ;;, -12 Vdc
mV
Regline
-
(TJ =+25°C. 10 =500 mAl
-7.0 Vdc;;' VI;;' -25 Vdc
-8.0 Vdc ;;, VI ;;, -12 Vdc
Load Regulation (TJ =+25°C)(Note 1)
5.0 mA';; 10 ,;; 1.5 A
250 mA';; 10';; 750 mA
-
7.0
2.0
50
25
-
35
8.0
100
50
-
11
4.0
100
50
--
-5.25
Vdc
-
4.3
8.0
mA
-
-
1.3
0.5
mV
Regload
Output Voltage
Vo
-4.75
-7.0 Vdc;;' VI ;;, -20 Vdc, 5.0 mA';; 10';; 1.0 A. P';; 15 W
Input Bias Current (TJ;:: +25°C)
liB
Input Bias Current Change
-7.0 Vdc;;' VI;;' -25 Vdc
5.0 mA';; 10';; 1.5 A
-
-
eon
-
40
-
~V
RR
-
70
-
dB
VI-VO
-
2.0
-
Vdc
.lVO/.lT
-
-1.0
-
mV/OC
Output Noise Voltage (TA =+25°C. 10Hz';; f';; 100 kHz)
Ripple Rejection 110
Dropout Voltage
10 ~ 1.0 A. TJ ~
mA
.lIIB
=20 mA. f =120 Hz)
+ 25°C
Average Temperature Coefficient of Output Voltage
10' 5.0 mA, DoC';; TJ';; +125°C
Note:
, . Load and tine regulation are specified at constant junction temperature. Changes in Va due to heating effects must be taken into account separately.
Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-169
II
MC7900 Series
MC7905AC ELECTRICAL CHARACTERISTICS (VI = -10 V 10 = 500 mA DoC < TJ < +125°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ = +25°C)
Vo
-4,9
-5.0
,-5.1
Vdc
Line Regulation (Note 1)
-8.0 Vdc;;' VI;;' -12 Vdc;
-8.0 Vdc ;;. VI ;;. -12 Vdc;
-7.5 Vdc;;' VI;;' -25 ~c;
-7.0 Vdc;;' VI;;' -20 dc;
Regline
-
2.0
7.0
7.0
6.0
25
50
50
50
-
11
4.0
9.0
.100
50
100
-4.80
-
-5,20
Vdc
-
4.4
8.0
mA
-
-
10 = 1.0 A. TJ = 25°C
10 = 1.0 A
10 = 500 mA
10 = 1.0 A. TJ = +25°C
Load Regulation (Note 1)
5.0 mA ,,;; 10 ,,;; 1 .5 A. TJ = +25°C
250 mA";; 10";; 750 mA
5.0 mA ,,;; 10 ,,;; 1 .0 A
mV
-
-
mV
Regload
-
Output Voltage
-7.5 Vdc;;' VI;;' -20Vdc. 5.0 mA";; 10";; 1.0 A. P";; 15 W
Vo
Input Bias Current
liB
Input Bias Current Change
-7.5 Vdc;;' VI;;' -25 Vdc
5,0 mA";; 10";; 1.0 A
5,0 mA";; 10";; 1 ,5 A. TJ = 25°C
.lIIB
-
-
1.3
0.5
0.5
Output Noise Voltage (TA = +25°C. 10Hz";; f,,;; 100kHz)
eon
-
40
-
~V
Ripple Rejection (10 = 20 mA. f = 120 Hz)
RR
-
70
VI-VO
-
2.0
-
Vdc
.lVO/.lT
-
-1.0
-
mV/oC
Dropout Voltage
10 ~ 1.0 A, TJ ~ +25'C
Average Temperature Coefficient of Output Voltage
10 = 5.0 mAo DOC";; TJ";; +125°C
mA
dB
MC7905 2C ELECTRICAL CHARACTERISTICS (VI = -10 V 10 = 500 mA O'C < TJ < +125°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ - +25°C)
Vo
-5.0
-5.2
-5.4
Vdc
Line Regulation (Note 1)
(TJ = +25°C. 10 = 100 mAl
-7.2 Vdc;;' VI;;' -25 Vdc
-8.0 Vdc ;;. VI ;;. -12 Vdc
Regline
-
8.0
2.2
52
27
37
8.5
105
52
-
12
4.5
105
52
Vo
-4.95
-
-5.45
Vdc
liB
-
4.3
8,0
mA
-
-
1,3
0.5
mV
-
(TJ = +25°C. 10 = 500 mAl
-7.2 Vdc;;' VI;;' -25 Vdc
-8.0 Vdc ;;. VI ;;. -12 Vdc
-
Load Regulation (TJ = +25°C)(Note 1)
5.0 mA ,,;; 10 ,,;; 1.6 A
250 mA ,,;; 10 ,,;; 750 mA
mV
Regload
-
Output Voltage
-7.2 Vdc;;' VI;;' -20 Vdc. 5.0 mA";; 10";; 1.0 A. P";; 15 W
Input Bias Current (TJ = +25°q
Input Bias Current Change
-7.2 Vdc;;' VI;;' -25 Vdc
5.0 mA';; 10 ,,;; 1 .5 A
.lIIB
Output NOise Voltage (TA = +25°C. 10Hz";; f";; 100 kHz)
eon
-
42
Ripple Rejection (10 = 20 mA, f = 120 Hz)
RR
-
68
-
dB
VI-VO
-
2.0
-
Vdc
.lVO/.lT
-
-1.0
-
mV/oC
Dropout Voltage
10 ~ 1.0 A, TJ ~ +25'C
Average Temperature Coefficient of Output Voltage
10 = 5.0 mA, DOC";; TJ";; +125°C
mA
~V
Note:
1. Load and line regulation are specified at constant junction temperature, Changes in Vo due to heating effects must be taken into account separately.
Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-170
MC7900 Series
MC7906C ELECTRICAL CHARACTERISTICS IV,
=-11
Characteristic
Output Voltage ITJ
V 10 =500 rnA O°C< TJ < +125°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Vo
-5.75
-6.0
-6.25
Vdc
=+25°C)
Line Regulation INote 1 )
ITJ =+25°C. 10 = 100 mAl
-8.0 Vdc '" VI '" -25 Vdc
-9.0Vdc '" VI '" -13 Vdc
-
-
9.0
3.0
60
30
-
43
10
120
60
-
13
5.0
120
60
Vo
-5.7
-
-6.3
Vdc
liB
-
4.3
8.0
rnA
-
-
1.3
0.5
45
-
-
65
-
dB
VI-VO
-
2.0
-
Vdc
:'VOI:'T
-
-1.0
-
rnVloC
ITJ =+25°C. 10 =500 rnA)
-8.0 Vdc '" V, '" -25 Vdc
-9.0 Vdc '" V, '" -13 Vdc
Load Regulation (TJ =+25°C) (Note 1I
5.0 rnA';; '0';; 1.5 A
250 rnA';; 10';; 750 rnA
rnV
Regload
Output Voltage
-8.0 Vdc '" VI '" -21 Vdc. 5.0 rnA .;; 10 .; 1 .0 A. P'; 15 W
Input Bias Current ITJ =+25°CI
Input Bias Current Change
rnA
:.I,B
-8.0 Vdc '" VI '" -25 Vdc
5.0 rnA';; 10'; 1.5 A
Output Noise Voltage ITA =+25°C. 10Hz'; f';; 100kHz)
Ripple Rejection (10
rnV
Regline
eon
RR
=20 rnA. f =120 Hz)
Dropout Voltage
10 ~ 1.0 A. TJ ~ +25°C
Average Temperature Coefficient of Output Voltage
10 =5.0 rnA. OOC .;; TJ .;; +125°C
~V
MC7908C ELECTRICAL CHARACTERISTICS IVI =-14 V 10 =500 rnA O°C < TJ < +125°C unless otherwise noted I
Characteristic
Symbol
Min
Typ
Max
Unit
Vo
-7.7
-8.0
-8.3
Vdc
Output Voltage ITJ =+25°C)
Line Regulation (Note 1)
rnV
Regline
ITJ =+25°C.10 =100 mAl
-10.5 Vdc '" VI '" -25 Vdc
-11 Vdc", VI '" -17 Vdc
-
12
5.0
80
40
50
22
160
80
-
26
9.0
160
80
-7.6
-
-8.4
'Vde
-
4.3
8.0
rnA
-
-
1.0
0.5
Vdc
rnVloC
-
(TJ =+25°C. 10 =500 rnA)
-10.5 Vdc", V, '" -25 Vdc
-11 Vdc", V, '" -17 Vdc
-
Load Regulation (TJ =+25°C) (Note 1I
5.0 rnA';; '0 .;; 1.5 A
250 rnA'; 10';; 750 rnA
rnV
Regload
-
Output Voltage
-10.5 Vdc '" VI '" -23 Vdc. 5.0 rnA'; '0';; 1.0 A. P'; 15 W
Vo
Input Bias Current ITJ =+25°CI
liB
Input Bias Current Change
-10.5 Vdc '" V, '" -25 Vdc
rnA
:",B
5.0 rnA';; 10'; 1.5 A
=+25°C. 10Hz';; f .; 100 kHzI
=20 rnA. f =120 HzI
Output Noise Voltage (TA
eon
RR
-
52
Ripple Rejection (10
V,-VO
-
2.0
-
:'VOI':\T
-
-1.0
-
Dropout Voltage
'0 ~ 1.0 A. TJ ~ +25°C
Average Temperature Coefficient of Output Voltage
10 =5.0 rnA. O°C';; TJ';; +125°C
;
62
~V
dB
Note:
1 Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into account separately.
Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-171
II
MC7900 Series
MC7912C ELECTRICAL CHARACTERISTICS IVI =-19 V 10 =500 mA OOC< TJ< +125°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage ITJ
=+25°C)
-11.5
-12
-12.5
-
13
6.0
120
60
-
55
24
240
120
-
46
-
17
240
120
-
-12.6
Vdc
-
4.4
8.0
mA
-
-
1.0
0.5
-
75
-
~V
61
-
dB
VI-VO
-
2.0
-
Ydc
.lVO/.lT
-
-1.0
-
mV/oC
Vo
Line Regulation INote 1)
ITJ =+25°C, 10 = 100 mAl
-14.5 Vdc ~ VI ~ -30 Vdc
-16 Vdc ~ VI?- -22 Vdc
-
ITJ =+25°C, 10 =500 mAl
-14.5 Vdc ~ VI ~ -30 Vdc
-16 Vdc ~ VI ~ -22 Vdc
-
Load Regulation ITJ =+25°C)(Note 1)
5.0 mA" 10" 1.5 A
250 mA';;; 10" 750 mA
Output Voltage
-14.5 Vdc ~ VI
mV
Regload
-11.4
Vo
~
Vdc
mV
Reg,ine
-27 Vdc, 5.0 mA';;; 10" 1.0 A. p" 15 W
Input Bias Current ITJ
=+25°C)
liB
Input Bias Current Change
-14.5 Vdc ~ VI ~ -30 Vdc
5.0 mA';;; 10';;; 1.5 A
Output Noise Voltage ITA
0
mA
.l11B
+25°C, 10Hz';;; f,;;; 100 kHz)
eon
RR
Ripple Rejection 110 =20 mA, f 0 120 Hz)
Dropout Voltage
10 ~ 1.0 A. TJ ~ +25°C
Average Temperature Coefficient of Output Voltage
'0 = 5.0 rnA. aoc ~ TJ ~ +125°C
MC7912AC ELECTRICAL CHARACTERISTICS IVI-- - 19 V 10 - 500 mA OOC < TJ < +125°C unless otherwise noted)
Typ
Max
Unit
Min
Symbol
Characteristic
-11.75
-12
-12.25
-
6.0
24
24
13
60
120
120
120
-
46
17
35
150
75
150
-11.5
-
-12.5
Vdc
-
4.4
8.0
mA
-
-
0.8
0.5
0.5
eon
-
75
-
RR
-
61
-
dB
VI-VO
-
2.0
-
Vdc
-
-1.0
-
mV/oC
Output Voltage ITJ = +25'C)
Vo
Line Regulation (Note')
-16 Vdc ~ VI ~ -22 Vdc; 10 = 1.0 A, TJ 0 25'C
-16 Vdc ~ VI ~ -22 Vdc; 10 = 1.0 A,
-14.8 Vdc ~ VI ~ -30 Vdc; 10 =500 mA
-14.5 Vdc ~ VI ~ -27 Vdc; 10 = 1.0 A, TJ = 25°C
Regline
Load Regulation INote 1)
5.0 rnA';;; 10';;; 1.5 A. TJ
250 mA ,;;; 10 ,;;; 750 mA
5.0 mA" 10';;; 1.0A
Regload
0
mV
mV
25'C
Output Voltage
Vdc
Vo
-14.8 Vdc ~ VI ~ -27 Vdc, 5.0 mA';;; 10';;; 1.0 A, P';;; 15 W
Input Bias Current
liB
Input Bias. Current Change
-15 Vdc~ VI ~ -30 Vdc
5.0 mA';;; 10" 1.0 A
5.0 mA';;; 10';;; 1.5 A, TJ =25°C
Output Noise Voltage ITA
=+25'C, 10 Hz';;; f,;;;
Ripple Rejection 110 =20 mA, f
0
mA
..\IIB
100 kHz)
120 Hz)
Dropout Voltage
10 ~ 1.0A. TJ ~ + 25'C
Average Temperature Coefficient of Output Voltage
10 =5.0 mAo O'C" TJ';;; +125°C
"\VO/.lT
I
I'V
Note:
1. Load and line regulation are specified 8,1 constant junction temperature. Changes in
Pulse testing with low duty cycle is used.
Vo due to heating effects must be taken into account separately.
MOTOROLA LINEAR/INTERFACE DEVICES
3-172
MC7900 Series
MC7915C ELECTRICAL CHARACTERISTICS (VI ~ -23 V 10 ~ 500 mA O°C < TJ < +125°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ
~
+25°C)
-14.4
Vo
line Regulation (Note 1 )
(TJ ~ +25°C.IO ~ 100 mAl
-17.5 Vdc;;' VI;;' -30 Vdc
-20 Vdc;;' VI;;' -26 Vdc
load Regulation ITJ ~ +25°C) (Note 1)
5.0 mA';; 10';; 1.5 A
250 mA';; 10';; 750 mA
57
27
300
150
-
68
25
300
150
mV
-15.75
Vdc
lIB
-
4.4
8.0
mA
-
-
1.0
0.5
eon
-
90
-
RR
-
60
-
dB
VI-VO
-
2.0
-
Vdc
:'VOI:'T
-
-1.0
-
mV/oC
~ -23 V 10 ~ 500 mA O°C
< TJ < +125°C
mA
:'IIB
=120 Hz)
Average Temperature Coefficient of Output Voltage
10 = 5.0 rnA. aoc ~ TJ ~ +125°C
MC7915AC ELECTRICAL CHARACTERISTICS (VI
Characteristic
unless otherwise noted)
Min
Typ
Max
Unit
Vo
-14.7
-15
-15.3
Vdc
-
27
57
57
57
75
150
150
150
68
25
40
150
75
150
Line Regulation (Note 1)
mV
Regline
-20 Vdc ;;. VI ;;. -26 Vdc; 10 ~ 1.0 A. TJ ~ 25°C
-20 Vdc;;' VI;;' -26 Vdc; 10 ~ 1.0 A.
-17.9 Vdc;;' VI;;' -30 Vdc; 10 ~ 500 mA
-17.5 Vdc;;' VI;;' -30 Vdc; 10 ~ 1.0 A. TJ ~ 25°C
load Regulation (Note 1)
5.0 mA';; 10';; 1.5 A. TJ ~ 25°C
250 mA';; 10 ,;; 750 mA
5.0 mA';; 10';; 1.0 A
-
-14.4
Vo
-15.6
Vdc
mA
4.4
8.0
-
-
-
0.8
0.5
0.5
eon
-
90
-
RR
-
60
-
dB
VI-VO
-
2.0
-
Vdc
8VO/8T
-
-1.0
-
mV/oC
liB
Input Bias Current Change
-17.5 Vdc ;;. VI ;;. -30 Vdc
5.0 rnA';; 10';; 1.0 A
5.0 mA';; 10';; 1 .5 A. TJ ~ 25°C
mA
:'IIB
+25°C. 10Hz';; f';; 100 kHz)
~
-
-
Input Bias Current
20 mA. f
mV
Regload
Output Voltage
-17.9 Vdc;;' VI;;' -30 Vdc. 5.0 mA';; 10';; 1.0 A. P';; 15 W
~
120 Hz)
Dropout Voltage
10 ~ 1.0 A. TJ ~ + 25°C
Average Temperature Coefficient of Output Voltage
10 ~ 5.0 mAo OOC';; TJ';; +t 25°C
!'V
Symbol
~ +25~c)
~
-
-
Dropout Voltage
10 ~ 1.0 A. TJ ~ +25°C
Ripple Rejection (10
150
75
-
Output Noise Voltage ITA ~ +25°C. 10Hz';; f';; 100 kHz)
Output Noise Voltage (TA
14
6.0
-14.25
Input Bias Current Change
-17.5 Vdc;;' VI;;' -30 Vdc
5.0 mA';; 10';; 1.5 A
20 mAo f
Vdc
Vo
Input Bias Current (TJ = +25°C)
Output Voltage (TJ
I
Regload
Output Voltage
-17.5 Vdc;;' VI;;' -30 Vdc. 5.0 mA';; 10';; 1.0 A. P';; 15 W
~
-15.6
mV
-
(TJ ~ +25°C. 10 ~ 500 mAl
-17.5 Vdc;;' VI;;' -30 Vdc
-20 Vdc ;;. VI ;;. -26 Vdc
Ripple Rejection (10
-15
Regline
Note:
1. Load and line regulation are specified at constant junction temperature. Changes in
Pulse testing with low duty cycle is used.
Va due to heating effects must be taken into account separately.
MOTOROLA LINEAR/INTERFACE DEVICES
3-173
!'V
II
..
MC7900 Series
MC7918C ELECTRICAL CHARACTERISTICS (VI =-27 V 10 =500 mA O°C< TJ < +125°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (TJ
=+25°C)
Vo
Line Regulation (Note 1)
(TJ +25°C. 10 100 mAl
-21 Vdc;;' VI:;;' -33 Vdc
-24 Vdc ;;. VI ;;. -30 Vdc
=
=
-17.3
-18
-18.7
=
Vdc
mV
RegOne
-
25
10
180
90
-
90
50
360
180
-
110
55
360
180
=
(TJ +25°C. 10 500 mAl
-21 Vdc;;' VI;;' -33 Vdc
-24 Vdc ;;. VI ;;. -30 Vdc
=
Load Regulation (TJ +25°C) (Note 1)
5.0 mA'; 10'; 1.5 A
250 mA.; 10'; 750 mA
mV
Regload
-
Output Voltage
Vo
-17.1
-
-18.9
Vdc
liB
-
4.5
8.0
rnA
-
-
1.0
0.5
-21 Vdc;;' VI;;' -33 Vdc. 5.0 rnA'; 10'; 1.0 A. P'; 15 W
Input Bias Current (TJ - +25°C)
Input Bias Current Change
-2 I Vdc;;' VI ;, -33 Vdc
5.0 rnA'; 10'; 1.5 A
=+25°C. 10Hz'; f';
=20 rnA. f =120 Hz)
Output Noise Voltage (TA
Ripple Rejection (10
rnA
.lIIB
eon
-
110
-
~V
RR
-
59
-
dB
VI-VO
-
2.0
-
Vdc
.lVO/.lT
-
-1.0
-
mV/oC
100 kHz)
Dropout Voltage
10 = 1.0 A. TJ = +25'C
Average Temperature Coefficient of Output Voltage
10 5.0 rnA. O°C'; TJ'; +1 25°C
=
MC7924C ELECTRICAL CHARACTERISTICS (VI = -33 V 10 = 500 rnA O°C < TJ < +125°C unless otherwise noted)
Characteristic
Output Voltage (TJ
Symbol
Min
Typ
Max
Unit
Vo
-23
-24
-25
Vdc
-
31
14
240
120
-
118
70
480
240
-
150
85
480
240
=+25°C)
Line Regulation (Note 1)
(TJ +25°C.10 100 rnA)
-27 Vdc;;' VI;' -38 Vdc
-30 Vdc ;;. VI ;;. -36 Vdc
=
=
rnV
Regline
=
=
(TJ +25°C. 10 500 mAl
-27 Vdc. ;, VI ;, -38 Vdc
-30 Vdc ;;. VI ;, -36 Vdc
=
Load Regulation (TJ +25°C) (Note 1)
5.0 rnA'; 10 .; 1.5 A
250 mA'; 10'; 750 rnA
Output Voltage
-27 Vdc;' VI ;, -38 Vdc. 5.0 rnA'; 10'; 1.0 A. P'; 15 W
Input Bias Current (TJ
rnV
Regload
Vo
=+25°C)
Input Bias Current Change
-27 Vdc ;, VI ;;. -38 Vdc
5.0 rnA'; 10'; 1.5 A
=+25°C. 10Hz'; f'; 100 kHz)
=20 mAo f =120 Hz)
-22.8
-
-25.2
Vdc
rnA
liB
-
4.6
8.0
.lIIB
--
-
1.0
0.5
rnA
Output Noise Voltage (TA
eon
-
170
-
Ripple Rejection (10
RR
-
56
-
dB
VI-VO
-
2.0
-
Vdc
.lVO/.lT
-
-1.0
-
mV/OC
Dropout Voltage
10 = 1.0 A. TJ
=
MV
+25'C
Average Temperature Coefficient of Output Voltage
10 5.0 rnA. OOC'; TJ .; +125°C
=
Note:
1. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken into account separately.
Pulse testing with low duty cycle is used.
MOTOROLA LINEAR/INTERFACE DEVICES
3-174
MC7900 Series
TYPICAL CHARACTERISTICS
n A ~ +25 0 C unless otherwise noted.)
FIGURE 1 - WORST CASE POWER DISSIPATION AS A
FUNCTION OF AMBIENT TEMPERATURE
20
~M'
~ ::~ -8HS ~ 15' CM'
3.0
~
2.0
~i1i
1.0
I
--
I
is
I I
"'
0.5
,e
0.4
0.3
8JC ~ 50 CM'
0.2
0
"r-...
-
r--.....
"
'\
100
4.0
3,0
\
z
o
;::
2.0
::
1.0
i5
O. 5
O. 4
i1i
.\c
75
5.0
~
"- '\ .\
'"
8JA ~ 65 CM'
POIM.x) ~ 15W
0, I 25
50
en
~
~
~
\
8HS
l::--
8HS ~ 15° ~M'
INFINITE HEAT SINK
~ 5° c;W--
150
"' 2. 0
I
~
1\
75
z
0
r-...
a
......
~ 1.0
§
,,
"''"
t
150
Vin=-l1 V
9.0
12
15
lB
21
10 = 20m"
f-"
60
I-
24
40
ii:
"
§ O. 5
:::"
.........
27
20
0
10
30
1.0 k
f. FREQUENCY 1Hz)
100
IVI-VO!.INPUT·OUTPUT VOLTAGE OIFFERENTIALIVOLTS)
FIGURE 5 - RIPPLE REJECTION ASA FUNCTION OF
OUTPUT VOL TAG ES
10 k
lOOk
FIGURE 6 - OUTPUT VOLTAGE AS A FUNCTION
OF JUNCTION TEMPERATURE
BO
6.26
;;; 70 I-:!a
z0
"'
125
Ul
~
o
...~Ul
100
BO
;
r-...
::1
6.0
'\
FIGURE 4 - RIPPLE REJECTION AS A FUNCTION
OF FREQUENCY
~
3.0
I"-
H+-Hr+ttffi-++-++-++tHt-++--t+t+tffi- Vo = -6.0 V
1. 5
o
o
'\ ~
,
.......... I"-
100
-
II
-r-
"-
......
........
TA. AMBIENT TEMPERATURE I'C)
FIGURE 3 - PEAK OUTPUT CURRENT AS A FUNCTION OF
INPUT-OUTPUT DIFFERENTIAL VOLTAGE
~
r--.
o. 3
8JC ~ 5.5° CM'
8JA ~ 45'CM'
PaIM.x) ~ 15W
O. 125
50
II
r- r-..... [""'-.. r-....
NO HEAT SINK
TA. AMBIENT TEMPERATURE 1°C)
2. 5
r-~
rP o. 2
\.
125
-
--
10
r-- r- .......
NOHEATS~-
~
~
0
INFINITE HEAT SINK
..........
10 t:::t-.J.
~
FIGURE 2 - WORST CASE POWER DISSIPATION AS A
FUNCTION OF AMBIENT TEMPERATURE
~
'\
..........
BO
~ii:
-
f ~ 120 Hz
10 = 20 mA
"Vin = 1.0 VIRMS)
-
'" 6,18
'"
-
~ 6.14
~ 6.10
4.0
6.0
8.0
10
12
14
16
18
20
L.
~
o
"'
2.0
L
~
-.........
22
Va. OUTPUT VOLTAGE IVOLTS)
6.06
-25
./
...
I
I
Vin - -11 V
Vo ~ -6.0 V 10 ='20 m"
_ ........ V
-+
I
+25
+50
+75
+100
+125
TJ. JUNCTION TEMPERATURE 1°C)
MOTOROLA LINEAR/INTERFACE DEVICES
3-175
-
- ..,
....
~
~
'" 50
40
6.22
o
:r
+150
+175
II
MC7900 Series
TYPICAL CHARACTERISTICS
DEFINITIONS
FIGURE 7 - QUIESCENT CURRENT AS A FUNCTION
OF TEMPERATURE
Line Regulation
The change In output voltage for a change in
the Input voltage, The measurement IS made under conditions of
low diSSipation or by uSing pulse techniques such that the average
chip temperature IS not significantly affected.
5.2
~ 5.
oi'..
~
Load Regulation -- The change In output voltage for a change In
I'-..
....
load current at constant chip temperature .
t-....
4. 8
MaXimum Power DISSipatIOn
...........
~
~
«
iii 4. 6
r----.
~
The maximum total device dissipation for which the regulator will operate'wlthln speCifications.
Vin '" -11 V
VO"-6.0V-
........
~ 4.4
o
50
25
Input Bias Current
10" 20 mA
"
;!;
4.2
(continued)
75
"'100
TJ. JUNCTION TEMPERATURE (DC)
That part of the mput current that
IS
not
delivered to the load.
-
Output Noise Voltage
The rms ac voltage at the output, With
constant load and no Input ripple, measured over a speCified frequency range.
125
Long Term Stability
Output voltage stability under accelerated
life test conditions With the maximum rated voltage listed In the
deVices' electrical characteristics and maximum power dissipation.
APPLICA nONS INFORMATION
Design Consid .... tions
FIGURE 8 - CURRENT REGULATOR
The MC7900 Series of fixed voltage regulators are designed
with Thermal Overload Protection that shuts down the Clrcu It
wl'1en subiected to an excessive power overload condition, Internal
Short·Circuit Protection that limits the ma)(lmum current the Clr·
cuit will pass, and Output Transistor Safe-Area Compensation that
reduces the output short-circuit current as the voltage across the
pass transistor is increased.
I n many low current applications, compensation capacitors are
not required.
However, it is recommended that the regulator
input be bypassed with a capacitor if the regulator is connected
to the power supply filter with long wire lengths, or if the output
load capacitance is large
An Input bypass capacitor should be
selected to prOVide good high-frequency characteristics to insure
stable operation under all load conditions. A 0.33 ,uF or larger
tantalum, mylar, or other capacitor having low Internal impedance
at high frequencies should be chosen.IThe bypass capacitor should
be mounted with the shortest possible leads directly across the regulators input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance
drops since the regulator has no e)(ternal sense lead. Bypassing the
output is also recommended.
10 = 200 mA
The MC7905,r5.O V regulator can be used as a constant current
source when connected as above. The output current is the sum of
resistor R current and quiescent bias current as follows:
10
5.0V
-R- +(8
0
The quiescent current for this regulator is typically 4.3 rnA.
The 5.0 volt regulator was chosen to minimize dissipation and to
to within 6.0 V below the
o~rate
allow the output voltage to
input voltage.
FIGURE 10 - OPERATIONAL AMPLIFIER SUPPLY
(±15V@1.0A)
(-5.0 V@ 4.0 A, with 5.0 A current limiting)
I nput
~'.O,uF
T+,.O,uF
Gnd ••_~+--------_<~O-----•• Gnd
FIGURE 9 - CURRENT BOOST REGULATOR
-10 V
f-o._--'\AI\r-~"
Input
-5.0 V
'-"'-~AA-_~
lr-------...-....
Output
+ 15 V
0 utput
+20 V
Inp ut
I
I
+
0.3 3jlF*
MC7S15
~1.0 jlF
I
I
+
1.0 jlF*
~o'r~~ uiv
001
Gnd
Gnd
+
+
1.0 IJF
Gnd.-------------_<~----_<~------~.Gnd
-20 V
• Mounted on common heat sink, Motorola MS·' 0 or equivalent.
Input
When a boost transistor is used, short-circuit currents are equal
to the sum of the series pass and regulator limits, which are
measured at 3.2 A and 1.8 A respectively in this case. Series pass
limiting is approximately equal to 0.6 V/Rse. Operation beyond
this point to the peak current capability of the MC7905C is possible if the regulator is mounted on a heat sink; otherwise thermal
shutdown will occur when the additional load current is picked up
by the regulator.
MC7915
I
-1 5V
Output
The MC7815 and MC7915 positive and negative regulators may
be connected as shown to obtain a dual power supply for operational amplifiers. A -clamp diode shou1d be used at the output of
the MC7815 to prevent potentjallatch~up problems whenever the
output of the positive regulator (MC7815) is drawn below ground
with an output current greater than 200 rnA.
MOTOROLA LINEAR/INTERFACE DEVICES
3-176
I
I
'.O,uF
@ MOTOROLA
MC79LOO,A
Series
THREE-TERMINAL LOW
CURRENT NEGATIVE FIXED
VOLTAGE REGULATORS
THREE-TERMINAL LOW CURRENT
NEGATIVE VOLTAGE REGULATORS
The MC79LOO Series negative voltage regulators are inexpensive, easy-to-use devices suitable for numerous applications requiring up to 100 mA. Like the higher powered MC7900 Series
negative regulators, this series features thermal shutdown and
current limiting, making them remarkably rugged. In most applications, no external components are required for operation.
The MC79LOO devices are useful for on-card regulation or any
other application where a regulated negative voltage at a modest
current level is needed. These regulators offer substantial advantage over the common resistor/zener diode approach.
P SUFFIX
PLASTIC PACKAGE
CASE 29-04
PIN 1. GROUND
2. INPUT
3. OUTPUT
• No External Components Required
• Internal Short-Circuit Current Limiting
• Internal Thermal Overload Protection
• Low Cost
• Complementary Positive Regulators Offered
IMC78LOO Series)
G SUFFIX
METAL PACKAGE
CASE 79-05
• Available in Either ± 5% lAC) or ± 10% IC) Selections
PIN 1. GROUND
2. OUTPUT
3. INPUT
(Bottom View)
(Case Connected To Pin 3)
REPRESENTATIVE CIRCUIT SCHEMATIC
R5
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SOP-8
R6
R18
04
Rl
PIN 1 VOUT
2. VIN
3 VIN
4. NC
R7
01
5.
6
7
8.
GND
VIN
VIN
NC
sop-s IS an internally modified 50-8 Package. Pins
2, 3, 6 and 7 are electrically common to the die
attach flag. This internal lead frame modification
decreases package thermal resistance and
Increases power dissipation capability when
approprtately mounted on a printed circuit board.
SOP-S conforms to all external dimensions of the
standard SO-8 Package.
R4
R2
Zl
R3
Input
ORDERING INFORMATION
Device
Tested Operating
Temperature Range
Package
Device No. ±10%
Device No. ± 5%
Nominal Voltage
MC79LXXACD'
SOP-8
MC79L05C
MC79L 12C
MC79L15C
MC79L18C
MC79L24C
MC79L05AC
MC79L 12AC
MC79L15AC
MC79L18AC
MC79L24AC
- 5.0
-12
-15
-18
-24
MC79LXXACG'
Metal Can
MC79LXXACP
TJ
~
O"C to + 125"C
MC79LXXCG'
MC79LXXCP
Plastic Power
Metal Can
Plastic Power
MC79LXXABP# TJ = -40°C to + 125°C
#Automotive temperature range selections are available with special test conditions and
additional tests in 5, 12 and 15 volt devices. Contact your local Motorola sales office for
information.
XX indicates nominal voltage
*Available in 5, 12 and 15 volt devices
MOTOROLA LINEAR/INTERFACE DEVICES
3-177
II
•
MC79LOO,A Series
MAXIMUM RATINGS (T A ~ +25°C unless otherwise noted.1
Rating
Svmbol
Value
Unit
VI
-30
-35
-40
Vdc
Storage Temperature Range
Tstg
-65 to + 150
°C
Junction Temperature Range
T
Oto +150
°C
(-5 VI
(-12,-15,-18 VI
(-24 VI
Input Voltage
MC79L05C, AC Series ELECTRICAL CHARACTERISTICS IVI
~
-10 V,IO
~
40 mA, CI
~
0.33
~F,
Co
aOc < T J < +125 0C unless otherwise
MC79LOSC
Characteristic
Output Voltage (T J
=
+250 c)
'nput Regulation
~
0.1
~F,
noted)
MC79L05AC
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Va
-4.6
-5.0
-5.4
~4.8
-5.0
-5.2
Vde
mV
Regline
IT J ~ +250 C)
-7.0 Vdc ;;. VI ~ -20 Vdc
200
150
-8.0 Vde ;;, VI ;;, -20 Vde
Load Regulation
T J '" +250 C, 1.0 rnA ,.,,;; 10 ,,; 100 rnA
1.0 rnA ,.,,;; 10 .;;;; 40 rnA
150
100
mV
Regload
60
30
Output Voltage
,60
30
Vde
Va
-7.0 Vdc ;:;:. VI ;;. -20 Vdc, 1.0mA";;; 10
VI =-10Vdc, LOmA,;;;; 10";;; 70mA
< 40 rnA
Input Bias Current
ITJ ~ +250 C)
IT J ~ +125 0 C)
-4.5
-4.5
-5.5
-5.5
-4.75
-4.75
-5.25
-5.25
mA
liB
Input Bias Current Change
6.0
5.5
6.0
5.5
1.5
0.2
1.5
0.1
mA
AI18
-8.0 Vdc ;? V I ~ -20 Vdc
1.0 rnA.;;;; 10';;;; 40 rnA
Output Noise Voltage
IT A ~ +250 C, 10Hz <; f <; 100 kHz)
Vn
Ripple Rejection
RR
40
40
49
41
40
~V
49
dB
1.7
Vde
1-8.0:> VI;;' 18Vde,f ~ 120 HZ,TJ ~ 25 0 CI
Dropout Voltage
10 ~ 40 rnA, TJ ~ +25°C
lVI-va I
MC79L 12C, AC ELECTRICAL CHARACTERISTICS IVI
1.7
0
-19 V, 10
aOc < T J <
~
40 mA, CI'
0.33~F,
Co
MC79L 12C
Characteristic
Output Voltage (T J - +25 0 c)
Input Regulation
IT J
= 0.1
"F,
+125 0C unless otherwise noted}
MC79L12AC
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Va
-11.1
-12
-12.9
-11 5
-12
-12.5
Vde
mV
Re%ne
= +25 0 CI
-14.5 Vdc;?- VI;;;:: -27 Vdc
-16 Vdc:? VI ~ -27 Vdc
Load Regulation
TJ=+250C, 1.0mA';;; 10';;;; 100mA
1.0 rnA .;;; 10 .;;; 40 rnA
Va
Input Bias Current
liB
100
50
Vde
-10.8
-10.8
-1 ~1.2
-13.2
-11.4
-11.4
-12.6
-12.6
rnA
6.5
6.0
6.5
6.0
1.5
0.2
1.5
0.1
mA
I\IIB
Output Noise Voltage
= +25 0 C,
100
50
mV
ITJ = +25O CI
IT J ~ +125O C)
ITA
250
200
Regload
Output Voltage
-14.5 Vdc ';3 VI ';3 -27 Vdc, 1.0mA';;; 10.::;;40mA
VI'" -19 Vdc, 1.0 mA < 10 < 70mA
Input Bias Current Change
-16 Vdc ';3 VI ';3 -27 Vdc
1.0 rnA < 10 < 40 rnA
250
200
80
Vn
80
~V
42
dB
1.7
Vde
10 Hz <; f <; 100 kHz)
RR
Ripple Rejection
1-15 <; VI <; -25 Vde, f
36
42
37
= 120Hz, TJ = +25 0 C)
Dropout Voltage
10 ~ 40 rnA, TJ ~ +25°C
1.7
lVI-VOl
MOTOROLA LINEAR/INTERFACE DEVICES
3-178
MC79LOO,A Series
MC79L15C, AC ELECTRICAL CHARACTERISTICS IVI = -23 V, 10 = 40 mA, CI = 0,33 "F, Co = 0.1 "F,
oDe < TJ < +125 0C unless otherwise noted I
MC79L 15C
Characteristic
Output Voltage IT J = +250 C)
Input Regulation
MC79L15AC
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Vo
-13.8
-15
-16.2
-14.4
-15
-15.6
Vdc
-
-
300
250
-
-
-
300
250
-
-
150
75
-
-
150
75
-13.5
-13.5
-
-16.5
-16.5
-14.25
-14.25
-
-15.75
-15.75
-
-
-
-
6.5
6.0
-
-
6.5
6.0
-
1.5
0.1
90
-
"V
mV
Regline
ITJ = +250 C)
-17.5 Vdc .. VI" -30 Vdc
-20 Vdc .. VI .. -30 Vdc
Load Regulation
TJ = +250 C, 1.0 mA" 10" 100 mA
1.0 mA " 10 " 40 mA
mV
Regload
Output Voltage
-17.5 Vdc .. VI .. -30 Vdc, 1.0 mA "10 ,,40mA
VI = -23 Vdc, 1.0 mA" 10" 70rnA
Vo
Input Bias Current
liB
Vdc
rnA
ITJ = +250 CI
IT J = +1250 C)
Input Bias Current Change
-20 Vdc .. VI .. -30 Vdc
1.0 rnA " 10" 40 rnA
rnA
f.l.1'B
Output Noise Voltage
-
-
1.5
0.2
90
-
-
33
39
-
34
39
-
dB
1.7
-
-
1.7
-
Vdc
Vn
+250
ITA =
C,10 Hz" f " 100 kHz)
Ripple Rejection
(-18.5" VI ,,-28.5 Vdc, f = 120 Hz)
Dropout Voltage
10 = 40 mA. TJ =
RR
lVI-VOl
-
+ 25°C
MC79L l8C, AC ELECTRICAL CHARACTERISTICS IVI = -27 V, 10 = 40 rnA, CI = 0.33 "F, Co = 0.1 "F,
oDe < T J < +125 0C unless otherwise noted.)
MC79L18C
Characteristic
Output Voltage {T J = +25 0 CI
Input Regulation
MC79L18AC
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Vo
-16.6
-18
-19.4
-17.3
-18
-18.7
Vdc
-
-
-
-
325
275
-
-
-
-
-
170
85
-
-
-
-17.1
-
-19.8
-19.8
-
6.5
6.0
-
1.5
0.2
150
-
46
-
rnV
Reg,ine
ITJ = +250 CI
-20.7 Vdc .. VI" -33 Vdc
-21.4 Vdc" VI .. -33 Vdc
-22 Vdc .. VI .. -33 Vdc
-21 Vdc .. VI .. -33 Vdc
-
Load Regulation
-
325
-
-
275
-
170
85
-18.9
-17.1
-
-
-
-
-
6.5
6.0
-
-
0.1
150
-
48
-
rnV
Regload
TJ = +250 C, 1.0 rnA" 10" 100 rnA
1.0 rnA " 10 " 40 rnA
Output Voltage
-20.7 Vdc .. VI .. -33 Vdc,1.0 rnA" 10" 40 rnA
-21.4 Vdc .. VI" -33 Vdc, 1.0 rnA.;; 10 .;;40rnA
VI = -27 Vdc, 1.0rnA ,,10" 70 rnA
Input Bias Current
-
-
-
Vdc
Vo
-16.2
-16.2
-
rnA
liB
-
{TJ = +250 CI
{TJ = +1250 CI
Input Bias Current Change
-21 Vdc" VI" -33 Vdc
-27 Vdc ;,. VI .. -33 Vd~
1.0 rnA " 10 " 40 rnA
rnA
I\/,S
-
Output Noise Voltage
Vn
-18.9
-
-
-
1.5
"V
ITA= +250 C, 10 Hz" f " 100 kHz I
RR
Ripple Rejection
32
33
dB
1-23" VI" -33 Vdc, f = 120 Hz, TJ = +25 0 CI
Dropout Voltage
10 = 40 rnA, TJ
,I VI-VOl
1.7
= + 25°C
MOTOROLA LINEAR/INTERFACE DEVICES
3-179
1.7
Vdc
II
•
MC79LOO,A Series
= -33 V,IO =40 mA,
MC79L24C. AC ELECTRICAL CHARACTERISTICS (VI
CI
= 0.33 "F, Co = 0.1 "F,
oOe < T J < +125 0C unless otherwise
MC79L24C
Characteristic
Output Voltage IT J
= +250 C)
Input Regulation
(TJ = +250 C)
noted.)
MC79L24AC
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Vo
-22.1
-24
-25.9
-23
-24
-25
Vdc
-
-
-
-
350
350
300
-
-
-
200
100
-
-
-
-
-22.8
-21.4
-21.4
-
-
-26.4
-26.4
-
200
_.
mV
Regline
-27 Vdc ;;. VI ;;. -38 V
-27.5 Vdc;;' VI;;' -38 Vdc
-28 Vdc ;;. VI;;' -38 Vdc
Load Regulation
TJ = +25 0 C,1.0mA';; 10';; 100mA
mV
Regload
I.OmA';;lo.;;40mA
Output Voltage
-27 Vdc ;;. VI ;;. -38 V, 1.0 mA .;; 10';; 40 mA
-28 Vdc;;' VI ;;. -38 Vdc, 1.0mA';; 10.;;40mA
VI = -33 Vdc, 1.0mA';; 10';; 70mA
Vo
Input Bias Current
(TJ = +250 C)
IT J = +125 0 C)
liB
Input Bias Current Change
-28 Vdc ;;. VI ;;. -38 Vdc
1.0 mA .; 10 .; 40 rnA
300
200
100
-
-
Vdc
-25.2
-22.8
-
6.5
6.0
-
-
6.5
6.0
1.5
0.2
-
-
1.5
0.1
-
200
-
"V
-
-25.2
mA
rnA
LlIIB
Output Noise Voltage
ITA = +250 C, 10 Hz .;; f .; 100 kHz)
Vn
-
Ripple Rejection
RR
30
43
-
31
47
-
dB
lVI-VOl
-
1.7
-
-
1.7
-
Vdc
1-29'; VI .;; -35 Vdc, f
Dropout Voltage
10 ~ 40 rnA. TJ ~
-
-
= 120 Hz, TJ =25°C)
+ 25'C
APPLICATIONS INFORMATION
Design Considerations
The MC79LOO Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts
down the circuit when subjected to an excessive power
overload condition. Internal Short-Circuit Protection
that limits the maximum current the circuit will pass,
In many low current applications. compensation capacitors are not required, However. it is recommended
that the regulator input be bypassed with a capacitor if
the regulator is connected to the power supply filter
with long wire lengths. or if the output load capacitance
FIGURE 1 -
is large, An input bypass capacitor should be selected
to provide good high-frequency characteristics to insure
stable operation under all load conditions. A 0.33 I'oF or
larger tantalum, mylar, or other capacitor having low
internal impedance at high frequencies should be chosen. The bypass capacitor should be mounted with the
shortest possible leads directly across the regulator's
input terminals. Normally good construction techniques
should be used to minimize ground loops and lead resistance drops since the regulator has no external sense
lead, Bypassing the output is also recommended.
FIGURE 2 -
POSmvE AND NEGATIVE REGULATOR
STANDARD APPLICATION
Input o-~-o-i
1-...----0 + Vo
CI *
'-----,----'
0,33 JLF
0,33 JLF
j.....
r-
=
o
o
-10
-8.0
ll.Va
•. -:-: .....1"--
i
3.B
_
~~~~-4--+--I--4---+ --. _..
3.6
G
_-
f---J----+...........
---=l'--..+
f---J---+--+-~
-
1----
5.0
+
.j.
;;: 4.0
+-
~
~
;!O
3.2
~
3.0
~
o
§
"'"'
'"u
3.0
...
2.0
~
1.0
~
a;
"'"
=40mA
25
50
75
TA, AMBIENT TEMPERATURE lOCI
100
v'
o
-10
-5.0
Her Sink
!
~ 1,000
1000
~
;::
£
,.....
ili
i5
is
"'~
~
~
No Heat Sink
./
........
"'
300 CIWalt feat Sink
100
"\
~
RIIJA 200"C/W
PO/max) 10 25"C = 625 mW
50
-
ili
100
10
25
-40
10,000
No Heat Sink
~
-35
-15
-20
-25
-30
VI, INPUT VOLTAGE IVOl TSI
Infinite
"'
~
I---
FIGURE 8 - MAXIMUM AVERAGE POWER DISSIPATION
versus AMBIENT TEMPERATURE - T0-39 Type PHage
10,000
0
125
100
MC79l05C
Vo = -5.0 V
10 =40mA
TJ = 25 0 C
o
125
FIGURE 7 - MAXIMUM AVERAGE POWER DISSIPATION
versus AMBIENT TEMPERATURE - TO-92 Type Package
lz
-
~
f---J---+---t---I--+--f-----1---+---=,.",.---!
~
MC79l05C f---f---J---+--+-+--+--P..,...j
VI=-10V
"Vo = -5.0 V +--I--i---+-+-+--+--+-~
o ~ 10
. / I--
.5
i- F:::.:
rs: - e---- . -
3.4 f---J---+--+--l----+----
75
50
25
FIGURE 6 - INPUT BIAS CURRENT versus
INPUT VOLTAGE
-1=-
-+-
t--.
I
TJ. JUNCTION TEMPERATURE lOCI
FIGURE 5 - INPUT BIAS CURRENT versus
AMBIENT TEMPERATURE
4.0
10 = 1.0 mA
2% 01 Va
VI. INPUT VOL TAGE IVOl TSI
1
II
lo=40mA
-
_ lo"'100mA
_.-
2.0
o
•
5
-_..-
--.
V<--
-_._-
-
0
>
I----
\
,
t
w
'"«
~>
75
100
TA, AMBIENT TEMPERATURE lOCI
125
150
10
25
\
50
75
100
TA, AMBIENT TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
3-181
125
150
•
®
MC79MOO
Series
MOTOROLA
THREE-TERMINAL
NEGATIVE VOLTAGE REGULATORS
THREE-TERMINAL
NEGATIVE FIXED
VOLTAGE REGULATORS
The MC79MOO Series of fixed output negative voltage regulators are intended as complements to the popular MC78MOO Series
devices.
Available in fixed output voltage options of - 5.0, - 12 and
-15 volts, these regulators employ current limiting, thermal shutdown, and safe-area compensation - making them remarkably
rugged under most operating conditions. With adequate heatsinking they can deliver output currents in excess of O.~ ampere.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
• No External Components Required
• Internal Thermal Overload Protection
• Internal Short-Circuit Current Limiting
• Output Transistor Safe-Area Compensation
T SUFFIX
PLASTIC PACKAGE
CASE 221 A-04
PIN 1. INPUT
2. GROUND
3. OUTPUT
EQUIVALENT SCHEMATIC DIAGRAM
.,
(Heatsink surface
connected to Pin 2)
Gnd
3
DTSUFFIX
PLASTIC PACKAGE
CASE 369A-03
DPAK
"2 :i
DT-1 SUFFIX
PLASTIC PACKAGE
CASE 369-03
DPAK
vo
STANDARD APPLICATION
Input~C79XX Output
Cin*
O.33p.F~
CO**
1.0p.F
0.3
A common ground is required between the
input and the output voltages. The input voltage must remain typically 1.1 V more negative even during the high point on the input
ripple yoltage.
ORDERING INFORMATION
Device
MC79MOSCDT, CDT-1
MC79MOSCT
MC79M12CDT, CDT-1
MC79M12CT
MC79M15CDT, CDT-1
MC79M1SCT
Output
Voltage
Tested Operating
Junction Temp. Range
-S.O Volts
-12 Volts
-1S Volts
O°C to
+ 12SoC
Package
XX = these two digits of the type number
indicate voltage.
Cin is required if regulator is located
DPAK
PLASTIC POWER
DPAK
PLASTIC POWER
DPAK
PLASTIC POWER
MOTOROLA LINEAR/INTERFACE DEVICES
3-182
an appreciable distance from power
supply filter.
Co improves stability and transient
response.
MC79MOO Series
MC79MXX Series MAXIMUM RATINGS (TA ~ + 25'C unless otherwise noted.)
Rating
Symbol
Value
Unit
VI
-35
Vdc
Po
1/ROJA
Po
1/ROJC
Internally Limited
14.2
Internally Limited
200
Watts
mW/'C
Watts
mW/,C
Tst\L
-65 to + 150
TJ
Oto +150
'c
'c
Symbol
Max
Unit
R8JA
65
'CIW
R8JC
5.0
'CIW
Input Voltage
Power Dissipation
Plastic Package
TA ~ +25'C
Derate above TA
TC ~ +25'C
Derate above TC
~
+ 25'C
~
+ 95'C
Storage Junction Temperature Range
Junction Temperature Range
I
•
THERMAL CHARACTERISTICS
Characteristic
i Thermal Resistance, Junction to Ambient
I Thermal Resistance, Junction to Case
MC79MOSC ELECTRICAL CHARACTERISTICS (VI
~
Characteristic
Output Voltage (TJ
~
+ 25'C)
-10 V, 10
~
Min
Typ
Max
Unit
Va
-4.8
-5.0
- 5.2
Vdc
7.0
2.0
50
30
30
100
mV
-
-5.25
Vdc
-
4.3
B.O
rnA
-
-
0.4
0.4
Line Regulation (TJ ~ + 25'CI (Note 11
-7.0 Vdc '" VI '" -25 Vdc
-8.0 Vdc ;;, VI '" -18 Vdc
Regline
Load Regulation (TJ ~ + 25'CI (Note 1)
5.0 mA '" 10 '" 500 mA
Regload
Output Voltage
-7.0 Vdc '" VI'" -25 Vdc, 5.0 mA '" 10 '" 350 mA
Input Bias Current (TJ
~
+ 25'C)
Ripple Rejection (f
Dropout Voltage
10 = 500 mA, TJ
~
~
~
Va
liB
Input Bias Current Change
- 8.0 Vdc;;, VI '" - 25 Vdc, 10 ~ 350 mA
5.0 mA '" 10 '" 350 rnA, VI ~ -10 V
Output Noise Voltage (TA
350 mA, O'C < TJ < + 125'C unless otherwise noted.)
Symbol
+ 25'C, 10Hz'" 1 '" 100 kHz)
120 Hz)
ailB
-
-4.75
mV
rnA
-
Vn
-
40
-
RR
54
66
-
dB
VI-Va
-
1.1
-
Vdc
aVO/aT
-
0.2
-
mV/,C
I'V
---
+25'C
Average Temperature Coefficient 01 Output Voltage
10 ~ 5.0 mA O'C '" TJ '" + 125'C
Note:
1. Load and line regulation are specified at constant junction temperature. Changes in
Pulse testing with low duty cycle is used.
Vo due to heating effects must be taken
MOTOROLA LINEAR/INTERFACE DEVICES
3-183
into account separately.
MC79MOO Series
MC79M12C ELEC'FRICAL CHARACTERISTICS (VI = -19 V, 10 = 350 mA, O"C < TJ < + 125·C unless otherwise noted.)
Ch.racteristlc
= + 25"C)
(TJ = + 25·C) (Note 1)
Output Voltage (TJ
II
Symbol
Min
Typ
Max
Unit
Vo
-11.5
-12
-12.5
Vdc
-
5.0
3.0
80
50
-
30
240
mV
-12.6
Vdc
mA
line Regulation
-14.5 Vdc '" VI '" -30 Vdc
-15 Vdc '" VI'" -25 Vdc
Regline
Load Regulation (TJ = + 25"C) (Note 1)
5.0 mA '" 10 '" 500 mA
Regload
Output Voltage
-14.5 Vdc '" VI '" - 30 Vdc, 5.0 mA '" 10 '" 350 mA
=
Input Bias Current (TJ
+ 25"C)
Input Bias Current Change
-14.5 Vdc '" VI'" -30 Vdc, 10 = 350 mA
5.0 mA '" 10 "'350mA,VI = -19V
Output Noise Voltage (TA
Ripple Rejection (f
Dropout Voltage
10 = SOD mA, TJ
=
=
+25·C, 10Hz'" f '" 100 kHz)
120 Hz)
=
Vo
-11.4
liB
-
4.4
8.0
-
-
0.4
0.4
Vn
-
75
-
RR
54
60
-
dB
VI-VO
-
1.1
-
Vdc
m
-
65
-
deg.
CMRR
65
90
-
dB
PSRR
-
100
-
dB
10-
0.3
0.7
-
rnA
10+
-2.0
-4.0
-
rnA
kHz
=0.7 VI
Output Source Current
(VOIPIO 3]
350
= 2.0 kll)
Output Sink Current
~in 3]
-
= 2.0 kll)
Common-Mode Rejection Ratio
(VCC =40 V)
-.
fe
2.0 kll)
= 3.5 V_I_______
PWM COMPARATOR SECTION (Test eireu't F'gure 11)
~
In-p-u-tT-h;~-sh-o-'d· VOI~~-g-e-"
(Zero Duty Cycle)
Input Sink Current
(ViP,n 3) = 0.7 V)
~~A_D_-_T_IM_E_C_O
__
NT_R_O_L_S_E_CTION (Test Cllcuit F'gure _1 __
11_ _ _ _ _ _ _, -_ _ ___,----.--~----~--__,
Input Bias Current (Pin 4)
-2.0
-10
~A
(V IO = 0 to 5 25 V)
-- ------- - . - --.--.---------------1-----+---+-----+----1-----1
Maximum Output Duty Cycle
(Vin ~ 0 V, CT ~ 0.01 p.F, RT ~ 12 kl!)
(Vin ~ 0 V, CT ~ 0.001 p.F, RT ~ 47 kl!)
De max
%
90
96
92
100
100
2.8
3.3
V
Input Threshold Voltage (Ptn 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
0
- - - - - - - - - - _ ---'--------"----'-----'---._--'------'
OSCILLATOR SECTION
Frequency
25
fosc
(CT = 0001 MF. RT
Standard DeViation of
47 kill
kHz
. - - - - - - - - +-----+----+--+----+----1
Frequency~
3.0
%
0.1
%
(CT" 0001 MF. RT = 47 kill
Frequency Change With Voltage
(VCC = 7.0 V to 40 V. TA
C
25"C)
- -- -- ------+---+
Frequency Change with Temperature
,;fos c(.1T)
(dTA ~ Tlow to Thigh)
(CT ~ 0.Q1 "F, RT ~ 12 k!l)
%
12
_ _ _ _. _ . _ _ . _ _ _ _ _ _ ' - -_ _ _ _ _ _
~
__
~_~
_ _ _ _ L_ _ __ '
TOTAL DEVICE
Standby Supply C~r;;;t
I
-
- . - --- -
----.-----------------r----,------~----,
-
rnA
lec
(Pm 6 at Vref. all other mputs and outputs open)
(Vee - 15 VI
(Vee = 40 V)
---
-
--------
---
-
5.5
7.0
------------
--~------~~--_4--
7.0
Average Supply Current
10
15
rnA
(VIP,n 4] ~ 2 a V. CT ~ 0 001, RT ~ 47 kll) See F'gure 11
---
-- ---- - - - - - - - - -
• Standard deViation
IS
------~~~==~=-~---~--~
a measure of the statistical distribution about the mean as dertved from the formula.
II -
N
r
(X n - xl2
n = 1
N - 1
MOTOROLA LINEAR/INTERFACE DEVICES
3-189
II
..
MC34060, MC35060
FIGURE 4 - OPEN LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
FIGURE 3 - OSCILLATOR FREQUENCY
versus TIMING RESISTANCE
r
JOOk
-+-+
--+-----+-100k
+~
'gJ
VCC
r=-::------=t-t-::+_
~OOOl~F
.i:ct~
I--
-+-<- -t--+-----+--+-+--+<
1---+----
-=-
;--~~
k
.;:,0,0' ~F ft"-sj;;;jcnW
H
+ ..
~ff# f-::t t-++ + T+~.
CT
I--
01
~F
~
,
. ~.i ~R
100
2k
10k
5k
20k
50k
1',
~ a
"
z
~ 7a
~
60
_ 50
100.
200k
SOak
1M
10
a
I
i
VCC=15 V
=0 V
u
~
u
60
~
I,
~
0
CT-O 0Olll~
0
I 1
Vee=15 V
eT =0001
"'" ~
40
z
u
0
~ f-t'
1 (1
0
0
I
lk
140
160
180
1M
10k
o
o
lOOk
f-- f !-- f -
"'" "~
20
01
0
100
120
lOOk
10k
RT =47 k
!
i',
I'll
l00a....
"" "" '"
"" ""
80
,
0
lk
«
I
cf'
!
2
100
0
"-
I
I
4
"-
80
100
I
111111
i- V(pIN 41
""
ie
60
FIGURE 6 - PERCENT DUTY CYCLE versus
DEAD·TIME CONTROL VOLTAGE
FIGURE 5 - PERCENT DEAD·TlME versus
OSCILLATOR FREQUENCY
61--
.
I FREQUENCY IHzl
RT, TIMING RESISTANCE Illi
8
40
"'" AVOL
a
a
a
0
10
20
VCC = 15V 0
.lVO = 3 V
RL=2kll - . 20
Or---...
0
1. 0 fJ- F
...
3O 'k
~+-t1
-+
k
'1
100
-'~'::fE:
- ->---+ +<
10
20
""
~
30
35
DEAD-TIME CONTROL VOLTAGE IV)
10, OSCILLATOR FREOUENCY IHzl
FIGURE 7 - EMITTER FOLLOWER CONFIGURATION
OUTPUT·SATURATION VOLTAGE versus
EMITTER CURRENT
I T--
9
'.--~-
8
-
VCC = 15 V·I
7
-- . . .
6
5
4
/"
~ r--
~I---
I--
1-
-
I
3
u
>
2
,1
50
100
150
200
0.5'OL---'----:':50---'--"cfoo:-...J--,:,50~-'--;2!;;OO:-...L--:!250
250
'C, COLLECTOR CURRENT ImAI
IE, EMITIER CURRENT ImAI
MOTOROLA LINEAR/INTERFACE DEVICES
3-190
MC34060, MC35060
FIGURE 9 - STANDBY-SUPPLY CURRENT
va'.u. SUPPLY VOLTAGE
.0
.0
--
.0
.0
I
.0
II
.0
.0
0
/
./
II
f-
/
o /
5.0
10
15
20
30
25
35
40
Vee. SUPPLY VOLTAGE IVI
FIGURE 11 - DEAD-TIME AND FEEDBACK CONTROL
TEST CIRCUIT
FIGURE 10- ERROR AMPLIFIER CHARACTERISTICS
Vee
= 15
Dead-
Test {
V ......_ _ _-,
150 n
2W
Vee
Time
Feedback
Inputs
e
RT
eT
Feedback
Terminal
(Pin 3)
(+)
-=-
(-)
(+) )
Error
(-)
-=-
Output
E
Ref
Out
50 kn
Gnd
Amplifier
FIGURE 13 - EMITTER-FOLLOWER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
FIGURE 12 - COMMON-EMITTER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
Output
TranSistor
Output
Transistor
MOTOROLA LINEAR/INTERFACE DEVICES
3-191
MC34060, MC35060
FIGURE 14 -
Va
•
ERROR AMPLIFIER SENSING TECHNIQUES
To OUlput
Voltage of
System
Vref
Amp
To Output
POSITIVE OUTPUT VOLTAGE
NEGATIVE OUTPUT VOLTAGE
R)
Vo = Vref (1 +
FIGURE 15 -
Voltage of
Vo
System
R;)
DEAD-TIME CONTROL CIRCUIT
FIGURE 16 -
SOFT-START CIRCUIT
Cs
Output
Output
1
0. 001
Max % On Time '''' 92 -
( ~OR-))
).-
R2
FIGURE 17 - SLAVING TWO OR MORE
CONTROL CIRCUITS
Vref
Master
Slave
(Additional
Cirellitsi
MOTOROLA LINEAR/INTERFACE DEVICES
3-192
MC34060, MC35060
FIGURE 18 - STEP-DOWN CONVERTER WITH SOFTSTART AND OUTPUT CURRENT LIMITING
15o."H@2.o.A
Vm ;;:8.0 to 4o.V
--
TIP 32
Va ut
~
5.o.V/ 1.o.A
47
4.7 k
10.
o.i~1
1
'--------
75
VCC
,
47 k 1\
2
1.o.M
50.
3
.
14
9
Ct--
Comp
"I
r
13
4.7 k
~~ MR85o.
-
8
-
Ef-7
Gnd t - -
12
Vref
DT
10.J~
4.7 k
150.
4.7 k
390.
CT
:1
T
+
MC34o.6o.
+
o.o.li:-
RT
6
0.0.0.1
47 k
T
0..1
MOTOROLA LINEAR/INTERFACE DEVICES
3-193
10.0.0.
6.3 V
II
•
MC34060, MC35060
FIGURE 19 -
STEP-UP CONVERTER
150pH@4.0A
8.0 to 26 V
20pH@' 1.0A
..
MR850
--
You
~ 0------<)
28 V
05 A
22 k
10
~
0.05
~t-
Vcc
,
9
2
C I---
4.7 k
2.7 M
3
,
14
50/3 5V
-
3.9 k
13
Camp
'1
MC34060
,
-
t
12
300
8
Gnd I---
Vref
OT
47k
CT
4
TIP 111
T
7
I
470 35 V
01
RT
6
470
00:1
47 k
390
TEST
T
~- RESULTS
~_~V~-0-.-'4-o-Yo~--j
CONOITIONS
10 ~ 0.5 A
Line Regulation
Yin
~ 8.0 V to 26 V.
Load Regulation
Yin
~
Output Ripple
Vin~12V.IOoO.5A
12 V. 10010 mA to 0.5 A
5.0 mV
,.
~--------+----------
Yin 0 12 V. 10 0 0 5 A
Efficiency
• Optional
CirCUit
75%
to minimize output ripple
MOTOROLA LINEAR/INTERFACE DEVICES
3-194
0.18%
24mVp-pPAR.D
~.
I'
470 35 V
MC34060, MC35060
FIGURE 20 - STEP-UP/OOWN VOLTAGE INVERTING
CONVERTER WITH SOFT-START AND
CURRENT LIMITING
8.0 to 40 V
TIP 32C
.......
MR851
47
--
Vou
20"H'
@1.0A
-15 VI
0.2 SA
30 k
10
~
0.01
~t-
2
7.5 k
1.0M
3
+
C~
-
Camp
50/5 OV
14
0.01-*
13
,.23-
MC34060
11150"H
~ 330/16V
@2.0A +
+
E~
-
Gnd
Vref
10 k
°T
+ j(-------
4.7 k
CT
5
10/16V 4
47 k
75
VCC
+
~
RT
6
0.001
47 k
820
3.3 k
1.0
TEST
c--_._.
Line Regulation
Load RegulatIon
Output Ripple
Short Circuit Current
Efficiency
CONDITIONS
=8.0 V to 40 V. la =250 rnA
Vin = 12 V. la = 1 rnA to 250 rnA
-Vin = 12 V. la = 250 rnA
Vin = 12 V. RL =0.1 !l
Vin = 12 V. la = 250 rnA
Vin
RESULTS
52 rnV
0.35%
47 rnV
0.32%
10 rnV p.p. PAR.a.
330 rnA
86%
·Optional circuit to mimmize output ripple.
MOTOROLA LINEAR/INTERFACE DEVICES
3-195
.
~ 33 0/16 V
+
•
I
3 each
0.0047 UL/CSA
~
FIGURE 21 - 33 WAn OFF-LINE FlYBACK CONVERTER
WITH SOFT-START AND PRIMARY POWER LIMITING
lN4003
31200
Vac
lN5824
Ll
5.0V/3.0A
lN4934
1210.75 A
T ~.
lN4001
47125 V
Common
22 k
10/35 V
10
Vce
lN4742T 1801200 V
:s:
~
0
-I
0
33 k
0.01
:ll
0
r
~
r
Z
~
(Q
0)
~I
:ll
:::::
3
I
115 Vac
±20%
7.5 k
-12/0.75 A
C I9
Tl
Camp
J+
T2
Core:
J8
13
Coilcratt 11-464-16, 0,025" gap
in each leg
·Optional R F.L Filter
12
8.2 k I
z
i
Bobbin:
Coilcralt 37-573
Vrel
DT
-I
Windings:
m
~ 200
:ll
"~
(")
m
0
m
Coilcralt W2961
IMPS
MC34060
Voutl Pout
Primary, 2 each:
~ 47
75 turns #26 Awg Bifilar wound
1.5 k I
Feedback:
15 turns #26 Awg
I
I 51.0
Secondary, 5,0 V:
6 turns #22 Awg Bifilar wound
<
(")
lN4148
m
2.7 k
en
Secondary, 2 each:
14 turns #24 Awg Bitilar wound
L1
TEST
CONDITIONS
RESULTS
Line Regulation 5.0 V
Vin
0
95 to 135 Vac, 10 0 3.0 A
20mV
0.40%
line Regulation ±12 V
Vin
0
95 to 135 Vac, 10
52 mV
0.26%
0
±0.75 A
Load Regulation 5.0 V
Vin
0
115 Vac, 10 0 1.0 to 4.0 A
476 mV
9.5%
Load Regulation ±12 V
Vin
0
115 Vac, 10 0 ±0.4 to ±D.9 A
300 mV
2.5%
Output Ripple 5.0 V
Vin
0
115 Vac, 10 0 3.0 A
45 mV POp P.A.R.D.
Output Ripple ±12 V
Vin
0
115 Vac, 10 = ±0.75 A
75 mV Pop PAR.D.
Efficiency
Vin
0
115 Vac, 105.0 V 0 3.0 A
10±12 o ±0.75A
74%
~
.m
Coilcralt Z7156, 15,.H @ 5.0 A
L2, L3
Coilcratt Z7157, 25,.H @ 1.0 A
~en
c
en
c
®
MC34060A
MC35060A
MC33060A
MOTOROLA
PRECISION SWITCH MODE
PULSE WIDTH MODULATION
CONTROL CIRCUITS
PRECISION SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUITS
The MC35060A/MC34060A/MC33060A are low cost fixed
frequency, pulse width modulation control circuits designed
primarily for single ended SWITCH MODE power supply control.
These devices feature:
The MC34060A is specified over the commercial operating
range of 0' to + 70'C. The MC35060A is specified over the full
military range of - 55' to + 125'C. The MC33060A is specified
over the vehicular temperature range of -40' to +85'C.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
• Complete Pulse Width Modulation Control Circuitry
• On-Chip Oscillator With Master or Slave Operation
• On-Chip Error Amplifiers
• On-Chip 5.0 Volt Reference, 1.5% Accuracy
P SUFFIX
• Adjustable Dead Time Control
PLASTIC PACKAGE
CASE 646-06
• Uncommitted Output Transistor Rated to 500 mA Source or Sink
• Undervoltage Lockout
• Available in Surface Mount Package
D SUFFIX
PIN CONNECTIONS
Non-Inv
Non-Inv
14 Input
Input
Inv
Input
PLASTIC PACKAGE
CASE 751 A-02
SO-14
Inv
13 Input
2
Compen/PWM
Comp Input
Vret
Dead-Time
Control
N.C.
CT
VCC
RT
C
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
ORDERING INFORMATION
Ground
7
(top viewl
Device
Temperature
Range
Package
MC35060AL
- 55' to + 125'C
Ceramic DIP
MC34060AD
MC34060AP
MC33060AD
MC33060AP
MOTOROLA LINEAR/INTERFACE DEVICES
3-197
0' to + 70'C
-40'to +85'C
SO-14 Plastic DIP
Plastic DIP
SO-14 Plastic DIP
Plastic DIP
II
•
MC34060A, MC35060A, MC33060A
FIGURE 1 - BLOCK OIAGRAM
6
12
Reference
Regulator
Oscillator
5
Ref Out
RT
Dead-Time
10
L-----4-4-~>-
__-OVCC
4
Dead-Time
Control
J
-0.7 mA
l
13
Error Amp
1
Feedback P.W.M.
Comparator Input
6'4
Error Amp
2
Gnd
Ql
~
4.7 V
8
-=
FIGURE 2 - TIMING DIAGRAM
Dead-Time Control . /
I
Output Ql,
Emitter
Description
The MC35060Al34060A/33060A is a fixed-frequency
pulse width modulation control circuit, incorporating
the primary building blocks required for the control of
a switching power supply. (See Figure '.) An internallinear sawtooth oscillator is frequency-programmable
by two external components, RT and CT. The approximate oscillator frequency is determined by:
f
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor CT to either of two control signals. The output
is enabled only during that portion of time when the
sawtooth voltage is greater than the control signals.
Therefore, an increase in control-signal amplitude
causes a corresponding linear decrease of output pulse
width. (Refer to the timing diagram shown in Figure 2.)
= __'_.2_
osc - RT. CT
For more information refer to Figure 3.
MOTOROLA LINEAR/INTERFACE DEVICES
3-198
MC34060A, MC35060A, MC33060A
The control signals are external inputs that can be fed
into the dead-time control, the error amplifier inputs, or
the feedback input. The dead-time control comparator
has an effective 120 mV input offset which limits the
minimum output dead time to approximately the first
4% of the sawtooth-cycle time. This would result in a
maximum duty cycle of 96%. Additional dead time may
be imposed on the output by setting the dead timecontrol input to a fixed voltage, ranging between 0 to
3.3 V.
The pulse width modulator comparator provides a
means for the error amplifiers to adjust the output pulse
width from the maximum percent on-time, established
by the dead time control input, down to zero, as the
voltage at the feedback pin varies from 0.5 to 3.5 V. Both
error amplifiers have a common-mode input range from
- 0.3 V to (VCC - 2.0 Vl. and may be used to sense power
supply output voltage and current. The error-amplifer
outputs are active high and are ORed together at the
non-inverting input of the pulse-width modulator comparator. With this configuration, the amplifier that
demands minimum output on time, dominates control
of the loop.
The MC35060Al34060Al33060A has an internal 5.0 V
reference capable of sourcing up to 10 mA of load currents for external bias circuits. The reference has an
internal accuracy of ± 1.5% with a typical thermal drift
of less than 50 mV over an operating temperature range
of 0° to + 70'C.
MAXIMUM RATINGS (Full operating ambient temperature range applies unless otherwise noted)
Rating
Symbol
MC35060A
MC34060A
MC33060A
Unit
VCC
42
42
42
V
Collector Output Voltage
Vc
42
42
42
V
Collector Output Current (Note 1)
IC
500
500
500
mA
Power Supply Voltage
Amplilier Input Voltage Range
VIR
Power Dissipation
PD
(II
TA ...., 45°C
Operating Junction Temperature
-0.3 to +42 -0.3 to +42 -0.3 to +42
1000
1000
1000
150
125
-
125
-
-55 to +125
o to 70
-40 to +85
'c
TJ
Plastic Package
Ceramic Package
Operating Ambient Temperature Range
TA
Tstg
Storage Temperature Range
V
mW
'c
'c
- 55 to + 125 -55 to + 125
-65 to + 150
Plastic Package
Ceramic Package
Note 1; Maximum thermal limits must be observed.
THERMAL CHARACTERISTICS
Symbol
Package
P Suffix
Plastic
Package
o Suffix
Plastic
Package
Unit
ROJA
100
80
120
'CIW
TA
50
45
45
'c
L Suffix
Ceramic
Characteristic
Thermal Resistance, Junction to Ambient
Derating Ambient Temper.::!ure
RECOMMENDED OPERATING CONDITIONS
MC35060A/MC34060A/MC33060A
Symbol
Min
Typ
Max
Unit
VCC
7.0
15
40
V
Collector Output Voltage
Vc
-
30
40
V
Collector Output Current
IC
-
-
200
mA
Condition/Value
Power Supply Voltage
Amplilier Input Voltage
Vin
Current Into Feedback Terminal
lIb
-0.3
-
VCC- 2
V
-
0.3
rnA
10
mA
Reference Output Current
Irel
-
Timing Resistor
RT
1.8
47
500
kll
Timing Capacitor
CT
0.0047
0.001
10
25
200
"F
kHz
-
5.3
V
Oscillator Frequency
PWM Input Voltage
fose
(Pins 3 and 4)
-
1.0
-0.3
MOTOROLA LINEAR/INTERFACE DEVICES
3-199
II
..
MC34060A, MC35060A, MC33060A
ELECTRICAL CHARACTERISTICS (VCC ~ 15 V, CT ~ 0.01 /LF, RT ~ 12 kll unless otherwise noted. For typical values
TA = 25°C, for min/max values TA is the operating ambient temperature range that applies unless otherwise noted.
Characteristic
REFERENCE SECTION
Reference Voltage
(10 ~ 1.0 rnA, TA ~ 25°C)
(10 ~ 1.0 rnA)
V
Vrel
4.925
4.9
5.0
-
5.075
5.1
Line Regulation
(VCC ~ 7.0 V to 40 V, 10 ~ 1.0 rnA)
Regline
-
2.0
25
mV
Load Regulation
(10 ~ 1.0 rnA to 10 rnA)
Regload
-
2.0
15
mV
15
35
75
rnA
IC(oll)
-
2.0
lOa
/LA
IE(off)
-
-
--
1.1
1.5
-
1.5
2.5
-
100
lOa
200
200
-
40
40
lOa
lOa
Short~Circuit
(Vrel
~
Output Current
ISC
a V)
OUTPUT SECTION
Collector Off-State Current
(VCC ~ 40 V, VCE ~ 40 V)
Emitter Off-State Current
(VCC ~ 40 V, Vc
40 V, VE
~
lOa
/LA
a V)
Collector-Emitter Saturation Volta§e (Note 2)
Common-Emitter
(VE = a V, IC = 200 rnA)
Emitter-Follower
(VC = 15 V, IE
200 mAl
Vsat(CI
VsatiEI
Output Voltage Rise Time (T A
25 CI
Common-Emitter (See Figure 12)
Emitter·Foliower (See Figure 131
tr
Output Voltage Fall Time IT A
25 CI
Common-Emitter (See Figure 12)
Emitter-Follower (See Figure 13)
tf
V
ns
-
ns
Characteristic
ERROR AMPLIFIER SECTIONS
Input Offset Voltage
(VOl Pin 3] ~ 2.5 VI
VIO
-
2.0
10
mV
Input Offset Current
(VqPin 3] = 2.5 VI
110
-
5.0
250
nA
Input Bias Current
2.5 VI
(VOIPin 3]
liB
-
Input Common-Mode Voltage Range
(VCC " 40 V)
VICR
Open Loop Voltage Gain
(.lVO ~ 3.0 V, Vo
0.5 to 3.5 V, RL
0
a to
VCC
Inverting Input Voltage Range
=
0.1
2.0
/LA
-
-
V
2.0
VIR(lNV)
0.3 to
VCC 2.0
--
-
V
AVOL
70
95
-
dB
2.0 K!l)
Note 2: Low duty cycle techniques are used during test to maintain junction temperature as close to ambient temperatures as possible.
MOTOROLA LINEAR/INTERFACE DEVICES
3-200
MC34060A, MC35060A, MC33060A
ELECTRICAL CHARACTERISTICS (Vcc = 15 V, CT = 0.01 I'F, RT = 12 kll unless otherwise noted. For typical values
TA:::: 25°C, for minimax values TA is the operating ambient temperature range that applies unless otherwise noted.)
Characteristic
ERROR AMPLIFIER SECTIONS (Continued)
Unity-Gain Crossover Frequency
(Va = 0.5 to 3.5 V, RL = 2.0 kl!)
Ic
-
600
-
kHz
Phase Margin at Unity-Gain
(Va = 0.5 to 3.5 V, RL ~ 2.0 I;l!)
wm
-
65
-
deg.
Common-Mode Rejection Ratio
o V to 38 V)
(VCC - 40 V, Vin
CMRR
65
90
-
dB
Power Supply Rejection Ratio
(t-VCC = 33 V, Va ~ 2.5 V, RL ~ 2.0 kll)
PSRR
-
100
-
dB
Output Sink Current
(VOIPin 3] ~ 0.7 V)
10
0.3
0.7
-
mA
Output Source Current
(VOIPin 3]
3.5 V)
10+
-2.0
-4.0
-
mA
0
PWM COMPARATOR SECTION (Test circuit Figure 11)
Input Threshold Voltage
(Zero Duty Cycle)
VTH
-
3.5
4.5
Input Sink Current
(VIPin 31 ~ 0.7 V)
11-
0.3
0.7
-
-
-1.0
-10
96
92
100
-
2.8
3.3
0
-
-
V
mA
DEAD-TIME CONTROL SECTION (Test CirCUit Figure 11)
Input Bias Current (Pin 4)
(Vin ~ 0 to 5.25 V)
IIB(DT)
Maximum Output Duty Cycle
(Vin ~ 0 V, CT ~ 0.01 I'F, RT ~ 12 kl!)
(Vin ~ 0 V, CT ~ 0.001 I'F, RT ~ 47 kl!)
DC max
%
90
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
I'A
V
VTH
OSCILLATOR SECTION
Frequency
(CT ~ 0.01 I'F, RT ~ 12 kll)
TA ~ 25°C
TA ~ Tlow to Thigh
(CT ~ 0.001 I'F, RT ~ 47 kl!)
kHz
fasc
9.7
9.5
10.5
11.3
12.5
-
-
25
-
(rios e
-
1.5
-
%
Frequency Change with Voltage
(VCC = 7.0 V to 40 V)
~fosc(~V)
-
0.5
2.0
%
Frequency Change with Temperature
(t.TA = Tlow to Thigh)
(CT ~ 0.01 I'F, RT ~ 12 kl!)
~losc(~T)
-
4.0
-
-
-
Standard Deviation of Frequency~
(CT ~ 0.001 I'F, RT ~ 47 kll)
%
UNDERVOLTAGE LOCKOUT SECTION
Turn-On Threshold (VCC increasing, Irel ~ 1.0 mAl
Hysteresis
TOTAL DEVICE
Standby Supply Current
mA
ICC
(Pin 6 at Vref. all other inputs and outputs open)
(VCC
(VCC
~
15 V)
= 40 V)
Average Supply Current
(VIPin 4] ~ 2.0 V, CT = 0.001 I'F, RT ~ 47 kll). See Figure 11.
IS
-
5.5
7.0
10
15
-
7.0
-
*Standard deviation is a measure of the statistical distribution about thp. mean as derived from the formula;
fT -
N
l
IX n - xl 2
n - 1
N - 1
MOTOROLA LINEAR/INTERFACE DEVICES
3-201
mA
II
•
MC34060A, MC35060A, MC33060A
FIGURE 4 -
FIGURE 3 - OSCILLATOR FREQUENCY
versus TIMING RESISTANCE
500K
120
~ lOOK
iD_~
15 V
VCC
O.OOII'F
11
0
0
::0
0
~
VCC~15V-
.lVO ~ 3.0VRL ~ 2.0kH_
..........
10K
~
"'"
0
5l
o
20 t3
40 ~
AVOL
0
0
O.OII'F
CT
~
I
0
1001---
G
~
OPEN-LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
e
(!)
60
c b - 80 ~
100 if
120~
t--.
"'" "
0
£>
O.II'F
0
1.0K
500
1.0K
2.0K
5.0K
10K
20K
50K lOOK 200K
RT, TIMING RESISTANCE lUI
500K
0
0
1.0
1.0M
10
100
10 0
0
8
0
6
4
2
0
0
500
lOOK
fO, OSCILLATOR FREQUENCY 1HZ!
1.0K
500K
10K
1. 7
1.6
1.5
1.4
- ..--
/'
-
--r-- - - - -
l-,:-:-
-----
--
~
1. 8
0
~
1. 6
._- f----
3.0
3.5
o
>
z
o
-./
/"
,,/
1. 4
~ 1. 2
::0
~
1. 0
~ o.
~ 1. J
Ei
'-"
2.0
1.0
VOl DEAD·TIME CONTROL VOLTAGE IVI
2. 0
1.8
z
a
"-
FIGURE 8 - COMMON EMITTER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
COLLECTOR CURRENT
1.9
f3
§?
'"
~
o
o
FIGURE 7 - EMITTER FOLLOWER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
EMITTER CURRENT
>
i'...
0
II
II
f--f---
~
O.OII'F
.0
~
~
0
2. 0
~
"'"
CT ~ O.OOII'F
RT ~ 47k
,/
0
0
""
v~c~115)
I
0
0.001 "F
CT
lOOK
40~
1
160 oS
180
1.0M
FIGURE 6 - PERCENT DUTY CYCLE versus
DEAD-TIME CONTROL VOLTAGE
FIGURE 5 - PERCENT DEAD-TIME versus
OSCILLATOR FREQUENCY
~
10K
1.0K
fO, FREQUENCY IHzl
'"
Ei
>
1. 2
O.
:~
.....- .........
....... .....-
-.
0,4
1
100
200
300
IE, EMITTER CURRENT ImAI
400
500
......... V
200
100
300
IC, COLLECTOR CURRENT ImAI
MOTOROLA LINEAR/INTERFACE DEVICES
3-202
400
500
MC34060A, MC35060A, MC33060A
FIGURE 10 - UNDERVOLTAGE LOCKOUT THRESHOLDS
versus REFERENCE LOAD CURRENT
FIGURE 9 - STANDBY SUPPLY CURRENT
versus SUPPLY VOLTAGE
«
..sr-
i'3
~
~
13
10
2': 60
9.0
o
~
8.0
7.0
If
6.0
5.0
2.0
1.0
o
o
:0
§
g
I
I
1
4.0
3.0
/
55
r-
Turn O!---,
5,0
-----;~
'"'"
~
~ V-
o
~
V-
4.5
-------
II
z
/
:0
5.0
FIGURE 11 -
10
15
20
25
VCC, SUPPLY VOLTAGE (VI
30
35
40
!
4,0
o
5.0
10
20
15
25
30
35
IL' REFERENCE LOAD CURRENT (rnA)
FIGURE 12 -
ERROR AMPLIFIER CHARACTERISTICS
Test
Inputs
{V--
DEAD-TIME AND FEEDBACK CONTROL
TEST CIRCUIT
150 II
2W
Dead- Vee
Time
Feedback
e
RT
eT
Feedback
Terminal
{Pin 31
Output
(')
{-I
) Error
{'I
{·I
Ref
Out
50 kll
Gnd
Amplifier
FIGURE 13 - COMMON-EMITTER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
FIGURE 14 - EMITTER-FOLLOWER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
Output
Transistor
Output
TranSistor
MOTOROLA LINEAR/INTERFACE DEVICES
3-203
40
•
MC34060A, MC35060A, MC33060A
FIGURE 15 -
Vo
ERROR AMPLIFIER SENSING TECHNIQUES
To Output
Vref
Voltage of
System
Vref
--+--0----1
To Output
POSITIVE OUTPUT VOLTAGE
NEGATIVE OUTPUT VOLTAGE
Va
FIGURE 16 - DEAD·TIME
CONTROL CIRCUIT
Voltage of
System
FIGURE 18 - SLAVING TWO OR MORE
CONTROL CIRCUITS
FIGURE 17 - SOFT·START CIRCUIT
Vref
Cs
Output
Master
Slave
(Additional
Circuits)
Max%OnTlme=92- (
'60 )
Rl
,.R2
MOTOROLA LINEAR/INTERFACE DEVICES
3-204
MC34060A, MC35060A, MC33060A
FIGURE 19 - STEP-DOWN CONVERTER WITH SOFTSTART AND OUTPUT CURRENT LIMITING
Vm
0
8.0 to 40 V
V out
TIP 32
~--~-----------+------4r----~~
~~--~
5.0 VI 1.0 A
47
4.7 k
10
001
~(--
1
"-----
Vee
,
75
2
10M
L-~---r----~eomp
MC34060A
14
o 0ll-
~
II. MR850
'I'
1000
63V
8
13
E7
Gnd-
47k
10 16 V
4.7 k
4
47k
150
51
6
OOOi
47 k
390
T
01
CONDITIONS
TEST
Load Regulation
Vrn = 12 V, 10
0
1.0 rnA to lOA
Output Ripple
Vrn = 12 V, 10
0
1.0 A
75 rnV POp P A.R.D
0.' Jl
1.6 A
lOA
73°/0
Short CirCUit Current
Vrn = 12 V, RL
Efficiency
V,n
c
12 V, 10
=0
0
1.0 A
25 rnV
0.5°/0
Vm
0
8 0 V to 40 V, 10
RESULTS
Line Regulation
3.0 rnV
MOTOROLA LINEAR/INTERFACE DEVICES
3-205
0.06%
II
MC34060A, MC35060A, MC33060A
FIGURE 20 - STEP-UP CONVERTER
15DpH@4.DA
22 k
10.
~+
VCC
t-'V'.f'v-+----j 3
'----+----"-1
C
Comp
14
MC34060A
t------r--~ +
13
r--
9
r--
470./35 V
30.0.
8
E f---....--'V'vv---Th.TIP 111
-
12
7
Gnd r--
'-~--' Vre!
DT
CT
,:16
I ,-
t--H--'
0..1
RT
4.7 k
4
~'VV'\r-"ODD1
470.
47 k
390.
T
,------
-~
TEST
CONDITIONS
line Regulation
Vin 08.0. V to 26 V. 10 0 0..5 A
Load Regulation
Vi n
0
1 2 V. 10
Output Ripple
Vin
0
12 V. 10 0 0..5 A
Efficiency
Vin 0 12 V. 10
0
0
1.0. mA to 0. 5 A
RESULTS
4DmV
0..14%
5.0. mV
0..18%
24 mV p-p PAR.D
0..5 A
MOTOROLA LINEAR/INTERFACE DEVICES
3-206
75%
r-
470./35 V
MC34060A, MC35060A, MC33060A
FIGURE 21 - STEP-UP/DOWN VOLTAGE INVERTING
CONVERTER WITH SOFT-8TART AND
CURRENT UMITING
8.0 to 40 V
riP 32e
...
MR851
~
47
--
You
2OI'H'
@ 1.QA
-15
VI
0.2 5A
30 k
10
~
°i~l
47 k 1\
2
7.5 k
1.0M
3
+
75
Vee
+
e~
Comp
50/5 OV
14
0.01
;:h
13
;~ 330/16 V
E~
~ Vref
Gnd
Dr
Cr
5
10/16V 4
3.3 k
15O
2.0
l'HA
-
10k
47 k
i@
MC34060A
+
r2-
Rr
6
+j{-- 0.001
4.7 k
47 k
820
1.0
TEST
CONDITIONS
Line Regulation
Yin
~
8.0 V to 40 V. 10 = 250 mA
Load Regulation
Yin
~
12 V. 10
Output Ripple
Yin ~ 12 V.IO~ 250 mA
~
1 mA to 250 mA
Short Circuit Current Yin
~
12 V. RL ~ 0.1
Yin
~
12 v. 16
Efficiency
~
n
RESULTS
52 mV
0.35%
47 mV
0.32%
10 mV p.p. PAR.D.
330 mA
250 mA
* Optional circuit to minimize output ripple.
MOTOROLA LINEAR/INTERFACE DEVICES
3-207
86%
.
~~ 33 0/16V
+
II
I
3 each
0.0047 UL/CSA
s:
FIGURE 22 - 33 WATT OFF-LINE FLYBACK CONVERTER
WITH SOFT-START AND PRIMARY POWER LIMITING
lN4003
13~J
lN5824
Ll
lN4934
", I
lN4~01
I
47125 V
12/0.75A
I~'
Common
22 k
10/35 V
10
T
s:
0
-I
0
::0
0
r
»
r
Z
VCC
1801200 V
t '"''
2.2 M
~
75 k
T1
~
Camp
115 Vae
±20%
CAl
'"
0
00
_18
in each leg
12
Gnd
8.2 k
m
Bobbin:
Coileralt 37-573
Windings:
6
::0
:> 200
I
»
(")
:> 47
Primary, 2 each:
75 turns #26 Awg Bifilar wound
Tr
1.5k
m
<
17
RT
.."
m
T2
Core:
Coileralt 11-464-16, 0,025" gap
"Optional R.F L Filter
Z
-I
0
Coileralt W2961
IMPS
MC34060A
:::,
Feedback:
15 turns #26 Awg
7k
~
11 k
I
I ~10
Secondary, 5_0 V:
6 turns #22 Awg Bifilar wound
(")
m
lN4148
en
Secondary, 2 each:
14 turns #24 Awg Bililar wound
2.7 k
L1
CONDITIONS
TEST
Line Regulation 5.0 V
--
Line Regulation ±12 V
--
Load Regulation 5.0 V
Load Regulation ±12 V
Output Ripple 5.0 V
Output Ripple ±12 V
Efficiency
i
~
s:
n
w
U'I
e0)
~
s:
Cold
m
»
::0
-12/0.75 A
C I9
lN4742
1.0 A T
5.0 V/3.0 A
=95 to 135 Vae, 10 =3.0 A
Vin = 95 to 135 Vae, 10 =:to.75 A
Vin = 115 Vae, 10 = 1.0 to 4.0 A
Vin = 115 Vae, 10 = ±OA to ±0.9 A
Vin = 115 Vae, 10 =3.0 A
Vin = 115 Vae, 10 =±0.75 A
Vin = 115 Vae, 10 5.0 V = 3.0 A
10 ±12 = ±0.75 A
Vin
RESULTS
20 mV
0.40%
52 mV
0.26%
476 mV
9.5%
300 mV
2.5%
45 mV Pop PAR.D.
75 mV POp PAR.D.
74%
Coileralt Z7156, 15/lH @ 5,0 A
L2, L3
Coileralt Z7157, 25/lH @ 1.0 A
o
w
e
~
®
MC34061
MC34061A
MOTOROLA
Advance Information
THREE-TERMINAL
PROGRAMMABLE
OVERVOLTAGE
SENSING CIRCUIT
THREE-TERMINAL OVERVOLTAGE "CROWBAR"
SENSING CIRCUIT
The MC34061.A overvoltage protection (OVP) circuit, in combination with two external programming resistors and a "crowbar" SCR, protects sensitive electronic circuitry from overvoltage
damage. It senses an overvoltage condition and quickly "crowbars," or short circuits, the supply. An external capacitor may be
used to program a minimum overvoltage duration before tripping,
thus providing noise immunity.
This three-terminal circuit provides a cost-effective means of
protecting either positive or negative power supplies. The unique
design of the MC34061.A eliminates trip voltage and temperature
drift errors due to SCR gate variations.
The basic MC34061.A device offers a ± 2% tolerance on the
sense trip voltage. The A-suffix device has a ± 1% sense trip voltage specification and other key parameters have tightened limits.
The device is available in a low-cost plastic package and features:
age and features:
SILICON MONOLITHIC
INTEGRATED CIRCUIT
PSUFFIX
PLASTIC PACKAGE
CASE 29-04
"
• Unique Three-Terminal Design
3
• SeR Gate Drive Output of 200 mA
• Sense Voltage of 2.5 V ± 1% or ± 2%
Pin 1. VCC
2. Drive Output
3. Sense
• Hysteresis of 250 mV
• Wide Supply Range: 4.0 V"" Vee"" 41 V
MAXIMUM RATINGS
Rating
Operating Voltage
Sense Voltage
Drive Output Current
Operating Ambient Temperature Range
Operating Junction Temperature
Storage Temperature Range
Symbol
Value
Unit
VCC-VDRV
40
Vdc
VSense
40
Vdc
IDRV
Internally
Limited
mA
o to
°c
°c
°c
TA
+70
TJ
150
Tstg
-65 to +150
ORDERING INFORMATION
FUNCTIONAL BLOCK DIAGRAM
r-------------,
r------.--------.--+----ovcc
Sense 0--..;----+--1
3
Drive
L...---.....- - - -..........JL---oOutput
L _____________ ...J
2 (DRV)
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-209
•
II
MC34061, MC34061A
ELECTRICAL CHARACTERISTICS (VCC - VDRV = 50 V' TA = TI ow to Th'IIAIh (see Note 11 unless otherwise specified)
MC34061A
MC34061
Symbol
Min
Operating Voltage Range
Characteristic
VCC-VDRV
3.0
Sense Trip Voltage
TA = 25'C
Tlow to Thiah (Nate 1)
VSense
Line Regulation, VSense
(3.0"" VCC-VDRV "" 40 V)
TA = 25'C
Tlaw to Thiah (Note 1)
Regline
Input Bias Current, Sense Pin
At Trip Point (Note 2)
After Trip (VSense = 3.0 V)
liB
IDRV(on)
Drive Output Current, OFF State
VCC - VDRV = 5.0 V
3.0 V "" VCC-VDRV "" 40 V
IDRV(off)
Drive Output Current Slew Rate
TA = 25'C
Drive Output VCC Transient Rejection
VCC-VDRV = 0 V to 15 V at dV/dt =
200 V/p.s; VSense = 0 V; TA = 25'C
Propagation Delay Ti me (TA = 25'C)
500 mV Overdrive
Typ
Max
Unit
3.0
-
40
Vdc
2.5
2.5
2.525
2.55
2.45
2.4
2.5
2.5
2.55
2.6
%N
VH
Drive Output Current, ON State
TJ = 25'C
Tlow to Thigh (Note 1)
Min
40
-
Vdc
2.475
2.45
Hysteresis Voltage, Sense Pin
Max
Typ
-
0.001
0.001
0.005
0.01
-
0.3
0.9
1.0
3.0
-
250
-
-
0.001
0.001
0.01
0.02
0.3
0.9
2.0
6.0
250
-
pA
-
mV
mA
130
90
200
-
300
350
130
90
200
-
300
350
0.2
0.2
0.6
0.6
1.0
1.5
0.2
0.2
0.6
0.6
1.0
1.5
di/dt
-
2.0
-
-
2.0
-
A/p.s
.l.IDRV(trans)
-
1.0
-
-
1.0
-
mA
(Peak)
tpLH
-
500
-
-
500
-
ns
mA
NOTES:
(1) Tlow to Thigh = Q'C to 7Q'C
(2) This specification is an engineering estimate based on design parameters, and is not tested.
FIGURE 1 -
STANDARD TEST CIRCUIT
VSense
Vee- VDRV
(3.0 V to 40 V)
Vee
MC34061,A
Drive
2
Output 1--o--1lH
IDRV
* A 1.0 p.Ftantalum or 10 p.F electrolytic capacitor maybe necessarytocompensateforlead inductance when measuring
Hysteresis Voltage. When this capacitor is used, it should be placed as close
a~
possible to the device package.
MOTOROLA LINEAR/INTERFACE DEVICES
3·210
MC34061, MC34061A
TYPICAL CHARACTERISTICS
FIGURE 3 - SENSE TRIP VOLTAGE
versus TEMPERATURE
FIGURE 2 - DRIVE CURRENT versus SENSE VOLTAGE
1000
2.510
~
~ 100
125°e
r=TA
TA
'"~
-55°e
~
10
~
'">
~
'"'">-
I-- TA - 25°e
§
Vee VORV
o. 1
2.1
2.2
2.3
2.4
VS ense . SENSE VOLTAGE IV)
./
/
r--....
//
2.490
V
~ 2.480
5.0 V ~
2.6
2.5
FIGURE 4 - OFF STATE DRIVE CURRENT
versus SUPPLY VOLTAGE
.,
.§. 1.0
0.8
~
'"
~
-75
2.7
-50
a
25
50
75
TA. AMBIENT TEMPERATURE 1°C)
-25
100
125
FIGURE 5 - INPUT BIAS CURRENT versus
SENSE VOLTAGE
-
.,
TA
12::s.
TA
25°e
10
3,
z
0:
~ 1.0
~5oe
-
0.6
13
~
I
2.495
2.475
2.0
~
2.500
a'i
cn~ 2.485
1.0
~
- '"
~ 2.505
!
>=>
•
2.515
~
~
0.4
a;
i5
w
&;
c
0.2
~
ffi
0
j
o
Vee VORV = 5.0 V
10
20
Vee. SUPPLY VOLTAGE IV)
30
40
2.0
FIGURE 6 - DELAY CAPACITANCE versus DELAY TIME
2.1
2.2
2.4
2.5
2.3
VS ense• SENSE VOLTAGE IV)
2.6
in
w
u
1.0
E3
60
/
~
O. 1
~
'"'
=> 40
'z"'
c
::. 0.01
~c- 20
is
0.001
0.001
'"
~
0.01
0.1
'OLY. OElAY TIME Im·s)
1.0
10
V
0
o
/
V
/
/
10
20
30
Vee. POWER SUPPLY VOLTAGE IVI
MOTOROLA LINEAR/INTERFACE DEVICES
3-211
/
/
'"t;;
~
5
V
!i!!
!? 80
z
~
:
2.7
FIGURE 7 - MINIMUM RG versus SUPPLY VOLTAGE
100
'3,
t=:
40
MC34061, MC34061A
APPLICATIONS INFORMATION
FIGURE B - BLOCK DIAGRAM AND
TYPICAL APPLICATION
•
r---------------
I
Rl
+
Sense
Power
3
Supply
-
I
I
!I
I
I
I
~
R2
~';~M~'A
+ff
I
,
Vout
Vee
I
I
¢V
!I
I
Drive
Output
I
_______________ JI
R, + R2
Vtrip = -R-,- (2.5 VI
Gnd
BASIC CIRCUIT CONFIGURATION
The MC34061,A consists of a 2.5 V shunt reference, a
comparator with 250 mV hysteresis and a power output
transistor. In the typical application of Figure 8, the voltage at the inverting input of the comparator is RVCC RR2 ,
, + 2
while the voltage at the non-inverting input is VCC - 2.5
V. Thus, given (Rl, R2) voltage divider, the comparator's
output state is a function of VCC. The following table
applies:
Drive
Output
Vee
R, + R2
<---
(2.5 V)
OFF State
R1 + R2
>--(2.5VI
R,
ON State
R,
By making the proper choice of R, and R2, a level detector
for any voltage within the device's operating voltage
range may be realized. A few precautions are necessary,
however.
Note that even in the OFF State, a minimum drive output current, equal to the sum of the reference and comparator supply currents, is available. Therefore, a means
of shunting this current away from the driven circuit is
necessary. In the example of Figure 8, a 100 n resistor
(RGKI is used, producing a voltage at the Drive Output
of approximately 60 mV in the OFF State.
In the ON State the MC34061,A becomes a current
source capable of saturating to within 2.0 V of VCC.
Therefore, when driving a high impedance load, it may
be desirable to clamp the drive output to at least 3.0 V
below VCC (VCC - VDRV ;;. 3.0 VI if it is important that
the voltage reference continue to regulate.
MOTOROLA LINEAR/INTERFACE DEVICES
3-212
MC34061, MC34061A
FIGURE 9 - OVERVOLTAGE PROTECTION
WITH TIME DELAY
CDLy
l
1
Rl
+
Sense
Power
Supply
3
-
I
VCC
MC34061,A
I
Vout
I
I
Drive
~r
Output
2
RG
RGK
R2
IGnd
PROGRAMMING A MINIMUM OVERVOLTAGE
DURATION BEFORE TRIPPING
A time delay may be programmed into the operation
of the MC34061,A to provide noise immunity. This time
delay is implemented by adding a capacitor (COLy)
between the VCC and Sense leads as shown in Figure
9. The time delay obtained by this technique is a function of R1, R2 and COLY as well as the nominal supply
voltage, VCC(nom), and the overvoltage supply voltage,
VCC. The nominal supply voltage determines the initial
charge on COLY, while the magnitude of the overvoltage condition determines the rate at which COLY
charges to the reference voltage, Vref = 2.5 V. Thus,
for a given R1, R2 and COLY, the time delay is reduced
as the overvoltage is increased. The expression for the
time delay, TOL Y, is:
tOL Y
=
Figure 6 shows the COLY values versus delay time
(tOLY) for a typical 5.0 V power supply protection circuit.
The figure also shows the change in tOLY with variations
in the overvoltage supply, VCC. In this example R, = '.8
k, R2 = 2.7 k, VCC(nom) = 5.0 V, and Vtrip = 6.25 V.
THE NEED FOR A GATE RESISTOR
For power supplies above 11 V, a gate resistor, RG,
in series with the SCR gate is recommended to limit the
power dissipated by the IC to approximately 2.0 W. This
resistor will protect the MC34061,A in the event of a
defective or missing SCR, while allowing the maximum
drive output current to the gate of the SCR. Figure 7
shows the minimum recommended gate resistor,
RG(min), versus the power supply voltage, VCC. A
larger value of RG may be used if less drive current is
needed.
R1 R2 CpLY In [VCC - VCC(nOml]
R1 + R2
VCC - Vtrip
where:
R1 + R2
Vtrip = -R-,- (2.5 V)
MOTOROLA LINEAR/INTERFACE DEVICES
3-213
..
MC34061, MC34061A
CROWBAR SCR CONSIDERATIONS
Referring to Figure 10, it can be se!;n that the crowbar
SCR, when activated, is subject to a large current surge
from the output capacitance, Cout. This capac ita nee
consists of the power supply output capacitors, the loa'd's
decoupling capacitors, and in the case of Figure lOA. the
supply's input filter capacitors. This surge current is illustrated in Figure 11, and can cause SCR failure or degradation by anyone of three mechanisms: di/dt, absolute
peak surge, or 12 t. The interrelationship of these failure
methods and the breadth of the applications make specification of the SCR by the semiconductor manufacturer
difficult and expensive. Therefore, the designer must
empirically determine the SCR and circuit elements
which result in reliable and effective OVP operation.
However, an understanding of the factors which infl uence
the SCR's di/dt and surge capabilities simplifies this task.
gate region, very high current densities can occur in
the gate region if high anode currents appear quickly
(di/dt). This can result in immediate destruction of
the SCR or gradual degradation of its forward blocking
voltage capabilities -depending on the severity of the
occasion.
The value of di/dt that an SCR can safely handle is
influenced by its construction and the characteristics
of the gate drive signal. A center-gate-fire SCR has
more di/dt capability than a corner-gate-fire type, and
heavily overdriving 13 to 5 times IGT) the SCR gate
with a fast <1.0 "s rise time signal will maximize its
di/dt capability. A typical maximum number in phase
control SCRs of less than 50 AIRMS) rating might be
200 A/"s, assuming a gate current of five times IGT
and < 1.0 "s rise time. If having done this, a di/dt problem is seen to still exist, the designer can also decrease
the di/dt of the current waveform by adding inductance in series with the SCA. as shown in Figure 12.
Of course, this reduces the cir.cuit's ability to rapidly
reduce the dc bus voltage and a tradeoff must be made
between speedy voltage reduction and di/dt.
1. di/dt
As the gate region of the SCR is driven on, its area
of conduction takes a finite amount of time to grow,
starting as a very small region and gradually spreading.
Since the anode current flows through this turned-on
FIGURE 10 - TYPICAL CROWBAR CIRCUIT
CONFIGURATIONS
10A -
SCR ACROSS INPUT OF REGULATOR
1-+-...- -...- - - - - - 0
10B -
Vout
SCR ACROSS OUTPUT OF REGULATOR
\.)1........- - - - - <...- - - -...-0
*Needed if supply is not current limited
MOTOROLA LINEAR/INTERFACE DEVICES
3-214
v out
MC34061, MC34061 A
FIGURE 11 -
CROWBAR SCR SURGE CURRENT
WAVEFORM
-- -
-
-
- -
A WORD ABOUT FUSING
Before leaving the subject of the crowbar SCR, a few
words about fuse protection are in order. Referring back to
Figure lOA. it will be seen that a fuse is necessary if the
power supply to be protected is not output current limited.
This fuse is not meant to prevent SCR failure but rather
to prevent a fire!
Ipk
Current Limited
Supply Voltage
The usual nesign compromise then is to use a garden
variety fuse 13AG or 3AB style) which cannot be relied on
to blow before the thyristor does, and trust that if the
SCR does fail, it will fail short circuit. In the majority of
the designs, this will be the case, though this is difficult to
guarantee. Of course, a sufficiently high surge will cause
an open. These comments also apply to the fuse in Figure
lOB.
2. Surge Current
If the peak current and/orthe duration of the surge
is excessive, immediate destruction due to device
overheating will result. The surge capability olthe SCR
is directly proportional to its die area. If the surge
current cannot be reduced Iby adding series resistance
- see Figure 12) to a safe level which is consistent
with the system's requirements for speedy bus voltage
reduction, the designer must use a higher current SCR.
This may result in the average current capability of the
SCR exceeding the steady state current requirements
imposed by the dc power supply.
FIGURE 12 -
~
I RLead
LLead
ESR
~
~
As an aid in selecting an SCR for crowbar use, the
following selection guide is presented.
ESL
I~R
~
Output
Cap
L
(
(
f
CROWBAR SCR SELECTION GUIDE
CIRCUIT ELEMENTS AFFECTING
SCR SURGE AND di/dt
~
•
In order to protect the SCR, the fuse would have to
possess an 12 t rating less than that of the SCR and yet
have a high enough continuous current rating to survive
normal supply output currents. In addition, it must be
capable of successfully clearing the high short circuit
currents from the supply. Such a fuse as this is quite
expensive, and may not even be available.
f
To
MC34061 , . ;
DEVICE
IRMS
IFSM
PACKAGE
MCR67 Series
MCR68 Senes
2N1842 Series
2N6400 Series
2N6504 Series
2N681 Series
2N2573 Series
MCR69 Series
MCR70 Series
MCR71 Series
12A
12A
16A
16A
25 A
25 A
25 A
25A
35 A
55A
100A
100A
125A
160A
160A
200 A
260A
300 A
350A
550A
Metal Stud
TO-220 Plastic
Metal Stud
TO-220 Plastic
TO-220 Plastic
Metal Stud
TO-3 Metal Can
TO-220 Plastic
Metal Stud
Metal Stud
I
For a complete and detailed treatment of SeR and fuse selection
refer to Motorola Application Note AN-789.
R & L EMPIRICALLY DETERMINED!
MOTOROLA LINEAR/INTERFACE DEVICES
3-215
•
®
MC34062
MC3S062
MOTOROLA
Advance Information
PIN-PROGRAMMABLE OVERVOLTAGE "CROWBAR"
SENSING CIRCUIT
PIN-PROGRAMMABLE
OVERVOLTAGE
SENSING CIRCUIT
The MC34062/35062 overvoltage protection (OVP)circuits require
only an external "crowbar" SCR to protect sensitive electronic circuitry from overvoltage damage. They sense an overvoltage condition and quickly "crowbar", or short circuit. the supply. An on-chip,
tapped resistor network allows the device to be programmed for
trip voltages ranging from 3.5 to 40 V. Each of the five programming
pins provides one standard overvoltage trip point for nominal power
supply voltages of 5.0, 12, 15, 24 or 28 V. Ma ny other trip voltages
maybe programmed by interconnecting and grounding various combinations of these programming pins. Tables are provided in the
Applications Information which show connection schemes for 120
trip voltages.
These circuits provide a cost-effective means of protecting either
positive or negative power supplies. In addition, an external capacitor may be used to program a minimum overvoltage duration before
tripping, thus providing noise immunity. The unique design of the
MC34062/35062 eliminates voltage and temperature drift errors
due to SCR gate variations.
•
Unique Pin-Programmable Trip Voltage from 3.5 to 40 V
•
One-Pin Programming for 5.0,12,15,24 and 28 V Power Supplies
•
SCR Gate Drive Output of 200 rnA
•
Built-In Hysteresis Voltage
•
Wide Supply Range 4.0 V,;; VCC';; 40 V
SILICON MONOLITHIC
INTEGRATED CIRCUIT
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
(MC34062 on·ly)
Pins 4 thru
VC
C08
Drive Output
2
7 8 are used
Sense
FUNCTIONAL BLOCK DIAGRAM
~-------------------l
I
I
I
I
I
I
I
1
I
I
3
I
I
I
1
Drive
I
I
Output
2 (DRV)
40--...;:-....
I
:
Nominal
2.72 k
Power
8.24 k
70--+:-"
I
Ground
Typical
Supply
Pin
Trip
r-V_o_lt_".=9_8+_N_u_m_b_e_r-+_Voltage
5.0 V
4
6.2 V
12 V
5
13.7 V
17.1 V
15 V
7
27.4 V
24 V
28 V
8
31.9 V
I
I
8
I
I
I
(Top View)
r---------J
60--+:-..
I
Voltage,
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
:I
I
5
Vtrip
I
6.0 k
4
VCC
I
I
:
I
to program
the Trip
I
I
50--+-1I --+
6
I
2.0 k
I
I
Sense
3
3.6 k
I
80--+-:-.J
ORDERING INFORMATION
Device
MC35062U
L
I __________ .J
Temperature
Range
-55 to +125°C
MC34062P1
Package
CerafT~ic
DIP
Plastic DIP
Oto+70oC
Pins 4 through 8 are used to program the Trip Voltage, Vtrip
MC34062U
fhls document contaIns information on a new product. Specifications and information herein are subject to change without notice
MOTOROLA LINEAR/INTERFACE DEVICES
3-216
Ceramic DIP
MC34062, MC35062
MAXIMUM RATINGS
Symbol
Value
Unit
Vcc - VDRV
40
Vdc
Voltage Across Any Internal Resistor In Network
VRN
40
Vdc
Current Through Any Resistor In Network
IRN
10
mA
VS ense
40
Vdc
IDRV
Internally
Limited
mA
Rating
Operating Voltage
Sense Voltage
Drive Output Current
II
DC
Operating Ambient Temperature
MC34062
MC35062
TA
Operating Junction Temperature
TJ
150
DC
T stg
-65 to +150 DC
DC
o to +70
-55 to +125
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (Vce = 5.0 V; VDRV = 0 V; TA = Tlow to Thigh unless otherwise specified.)
Characteristic
Operating Voltage Range
Sense Trip Voltage
Symbol
Min
Typ
Max
Unit
Vee - VDRV
3.0
-
40
Vdc
2.425
2.375
2.5
2.5
2.575
2.625
-
0.001
0.001
om
6.01
5.89
6.2
6.2
6.39
6.51
-
0.62
TA = 25 De
Tlow to Thigh
Line Regulation. VS ense (3.0 V ~
Vee -
VORV ~ 40 V)
Trip Voltage (Pin 4 = Gnd; VDRV = 0 V)
TA = 25°e
Tlow to Thigh
VH(4)
= 0 V)
VH(5)
rr-rip Voltage (Pin 6 = Gnd; VDRV = 0 V)
TA = 25°e
-
13.7
13.7
Tlow to Thigh
VH(6)
Trip Voltage (Pin 7 = Gnd; VDRV = 0 V)
TA = 2.5°e
1.37
-
Tlow to Thigh
VH(7)
= a V)
17.1
17.1
Tlow to Thigh
Hl'steresis Voltage (Pin 8 = Gnd; VDRV = 0 V)
Resistor Network Current at Nominal Power Supply Voltage
V
17.6
18.0
-
1.71
-
26.6
26.0
27.4
27.4
28.2
28.8
-
2.74
30.9
30.3
31.9
31.9
V
V
-
V
V
Vtrip(8)
25°e
--
V
16.6
16.2
Vtrip(7)
Hysteresis Voltage (Pin 7 = Gnd; VDRV = 0 V)
V
14.1
14.4
Vtr ip(6)
Hysteresis Voltage (Pin 6 = Gnd; VDRV = 0 V)
TA~
-
V
13.3
13.0
Tlow to Thigh
VDRV
V
Vtrip(5)
Hysteresis Voltage (Pin 5 :::: Gnd; VORV:::: 0 V)
= Gnd;
0.02
Vtrip(4)
Hysteresis Voltage (Pin 4 = Gnd; VORV:::: 0 V)
Trip Voltage (Pin 5 ~ Gnd; .vDRV
TA= 25°e
%/V
Regline
TA = 25°e
Tlow to Thigh
Trip Voltage (pin 8
Vdc
VS ense
32.9
33.5
VH(8)
-
3.19
IRN
0.5
1.1
2.0
130
90
200
-
300
350
0.2
0.2
0.6
0.6
1.0
1.5
-
V
mA
Vee = 28 V; VDRV = 0 V; Pin 8 = Gnd
Drive Output Current. ON State
Tlow to Thigh
Drive Output Current. OFF State
mA
IDRV(off)
=
Vee 5.0 V; VDRV = 0 V
3.0 V';; Vcc - VDRV';; 40 V
Drive Output Current Slew Rate ITA = 25°C)
Drive Output Vee Transient Rejection
=
mA
IDRV(on)
TJ=25 o e
di/dt
-
2.0
-
A/"s
Il.I D RV(tra ns)
-
1.0
-
mA
(Peak)
tpLH
-
500
-
ns
Vec 0 V to 15 V at dV/dt = 200 V/"s;
VDRV = 0 V; VS ense = 0 V; TA 25 DC
Propagation Delay Time (TA
Tlow = -55°C for MC35062
:::: OOC for MC34062
=
=25 o e; 500 mV Overdrive)
Thigh
+125°C for MC35062
= + 70°C for MC34062
=
MOTOROLA LINEAR/INTERFACE DEVICES
3-217
MC34062, MC35062
FIGURE 1 - STANDARD TEST CIRCUIT
•
VCC-VDRV
(3.0 V to 40 V)
3
2
Drive
Output
IORV
*A 1.0 IlF tantalum or
10 ~F electrolytic
MC34062
capacitor may be
necessary to compensate
for lead i nd ucta nee when
measuring Hysteresis
Voltage. When this
capacitor is used. it
should be placed as
close as possible to
the device package.
8
FIGURE 2 - DRIVE CURRENT versus NORMALIZED
RESISTOR DIVIDER VOLTAGE
(Normalized to Vtrip at TA = 25°C)
FIGURE 3 - NORMALIZED TRIP VOLTAGE versus
TEMPERATURE
(Normalized to TA = 25°C)
1.006
1.004
w
to
~
>
i
- '"
1.002
1.000
0..
i'2
/'
0.998
;j! 0.996
~
:ii! 0.994
:...-
~
/V
,V
"'
0.992
0.1
0.80
0.990
~"
~~
~~
~~
1.0
I.~
1.08
-75
NORMALIZED VOLTAGE ACROSS RESISTOR DIVIDER
-50
-25
0
25
50
75
100
FIGURE 4 - OFF STATE DRIVE CURRENT versus
SUPPLY VOLTAGE
FIGURE 5 - MINIMUM RG versus
SUPPLY VOLTAGE
100
TA
~
/
125°C
L
/
TA-25°C
TA
125
TA. AMBIENT TEMPERATURE (0G)
55°C
/
I...-
/
V
/
/
/
Ih
10
20
30
40
Vce SUPPLY VOLTAGE (V)
10
20
Vcc. POWER SUPPLY VOLTAGE (V)
MOTOROLA LINEAR/INTERFACE DEVICES
3-218
30
40
MC34062, MC35062
FIGURE 6 - DELAY CAPACITANCE versus DELAY TIME
FOR NOMINAL5.0 V POWER SUPPLY
FIGURE 7 - DELAY CAPACITANCE versus DELAY TIME
FOR NOMINAL 12 V POWER SUPPLY
10
11.0
.3 1.0
z'-'
'-'
;::
-
~.\)-.I
z
;::
u
::
;')
0.1
:
IVcC
>-
g
T
~
'0-.1
~,
9 Vee
-.lIVIV
>-
:5
;
I
lOO~
0.1
;')
5.0Vnom
.~~
~ 0.01
0.001
0.001
-.lIVIV
u
~
3 34062 2
_,: ,,-.1
0.01
-.I~
/]
5
0.1
2
100
i
~
-de
0.01
12Vnom
1.0
0.001
0.001
10
0.01
0.1
1.0
10
tDLY. DELAYTIME Im'l
tDLY. DELAY TIME Im'l
FIGURE 8 - DELAY CAPACITANCE versus DELAY TIME
FOR NOMINAL 15 V POWER SUPPLY
FIGURE 9 - DELAY CAPACITANCE versus DELAY TIME
FOR NOMINAL 24 V POWER SUPPLY
10
'3
:3
~ 1.0
g
~
~
>-
z
~-.I
;::
-.I~.,-.I
~
~.
0.1
U
j
~'l.
g
~.'0-.1
~O.Ol
,"IVIV
0.001
0.001
1.0
'-'
9 Vee
1
0.1
100
0.1
t
>-
Vee
g
_~~I~
4~.233
34062
~,
0.01
15V nom
~ 0.01
.
0.001
0.001
10
1.0
0.01
0.1
tDL y. DELAY TIME Im'l
tDLY. DELAY TIME Im'l
FIGURE 10 - DELAY CAPACITANCE versus DELAY TIME
FOR NOMINAL 28 V POWER SUPPLY
10
.3
~
1.0
;::
u
~
j
17'
0.1
~-.I
>-
~.
~
~
?Vee
0.01
28V nom
~"ittl
-.lIVIV
~2~
'].-.1
~.,
8
100
-.lIVIV
0.001
0.001
0.01
0.1
1.0
tDLY. DELAY TIME Im'l
MOTOROLA LINEAR/INTERFACE DEVICES
3-219
24 V nom.
11)~
L..l[
34062 2
7~
~OLY.I
10
1.0
56 .
10
II
MC34062, MC35062
APPLICATIONS INFORMATION
II
BASIC CIRCUIT CONFIGURATION
The MC34062 and MC35062 each consist of a 2.5 V
shunt reference, a comparator with built-in hysteresis,
a power output transistor, and an on-chip, tapped resistor
network. In the typical application of Figure 11 the volt·
..
f h .
. VCC R2
age at t h e inverting Input ate comparator IS - - - ,
R1 + R2
while the voltage atthe non-inverting input isVCC- 2.5 V.
Thus, for a given (R1, R2) voltage divider, the comparator's output state is a func.tion ofVCC. The follpwing table
applies:
VCC
<
>
Drive
Output
R1 + R2 (2 5 V)
R1
.
OFF State
R1 + R2
-R-1- (2.5 V)
ON State
FIGURE 11 -
By making the proper choice of R1 and R2, a level
detector for any voltage from 3.5 to 40 V may be
realized.
The on-chip resistor network is configured as shown
in the Functional Block Diagram on the front page of
this data sheet. Each of the five programming pins (4
through 8) provides one standard overvoltage trip point
for nominal power supply voltages of 5.0. 12, 15, 24 or
28 V. These standard trip points are implemented by
grounding one of the five programming pins. and are·
summarized in the following table:
Nominal
Power
Supply
Voltage
Ground
Pin
Number
Typical
Trip
Voltage
5.0V
12 V
15 V
24V
28 V
4
5
6
7
8
6.2 V
13.7 V
17.1 V
27.4 V
31.9 V
I
BLOCK DIAGRAM AND TYPICAL APPLICATION
V out
1------------------,
I
+
Power
Supply
I
________________ J I
R, + R2
Vtrip = -R-,- (2.5 V)
Gnd
Programming Pins
Many other trip voltages may be programmed by
interconnecting and grou"ding various combinations
of the programming pins. Table 1 provides connection
schemes for 120 nominal Trip Voltages (Vtrip).
Additional Trip Voltages may also be implemented with
other pin connections. All of these Trip Voltages will be
within ±3.0% of the nominal value at TA = 25°C a nd within ±5.0% over the operating temperature range.
The hysteresis built into the comparator is 250 mV a\
the inverting input. This comparator hysteresis voltage is
. RPR2.
25VS ense T·
. I· dbyt h eratlo---,Justasthe.
multiple
rip
R1
Voltage (VS ense ) is mUltiplied by the same ratio to define
the Trip Voltage (Vtrip). Thus, the Hysteresis Voltage (VH) is
approximately 10% of the Trip Voltage for anyTrip Voltage.
Some precautions are necessary in the operation of the
protection circuit shown i"n Figure 11. Note that even in
the OFF State, a minimum drive output current, equal to
the sum of the reference and comparator supplycurrents,
is available. Therefore, a means of shunting this current
away from the driven circuit is necessary. In the example
of Figure 11; a 100 n resistor (RGK) is used, producing a
voltage atthe Drive Output of approximately60 mV in the
OFF State.
In the ON State the MC34062 becomes a current source
capable of saturating to within 2.0 V of VCC. Therefore,
when driving a high impedance load, it may be desirable
to clamp the drive output to at least 3.0 V below VCC
(Vce - VDRV;;" 3.0 V) if it is important that the reference
continue to regulate.
MOTOROLA LINEAR/INTERFACE DEVICES
3-220
100
MC34062, MC35062
PROGRAM MING AM INIM UM OVERVOl TAGE
DURATION BEFORE TRIPPING
A time delay may be programmed into the operation of
the MC34062/35062 to provide noise Immunity. This
time delay is implemented by adding a capacitor (CDLY!
between the VCC and Sense leads as shown in Fig ure 12.
The time delay obtained by this technique is a function of
the internal resistors (R1, R2! and CDLY, as well as the
nominal supply voltage, VCC(nom!, and the overvoltaged
supply voltage VCe. The nominal supply voltage determines the initial charge on COLY, while the magnitude of
the overvoltage condition determines the rate at which
CDLY charges to the reference voltage, Vref = 2.5 V. Thus,
for a given R" R2 and CDLY, the time delay is reduced as
the overvoltage IS increased The expression for the time
delay, tDLY is
FIGURE 12 -
Figures 6 through 10 show the CDLY values versus
delay time (tDLY! for nominal 5.0, 12, 15, 24 and 28 V
power supply protection circuits, each using a one-pin
MC34062/35062 programming scheme. These figures
also show the change in tDLY with variations in the overvoltaged supply, VCC.
THE NEED FOR A GATE RESISTOR
For power supplies above 11 V, a gate resistor, RG, in
series with the SCR gate is recommended to limit the
power dissipated by the IC to approximately 2.0 W. This
resistor will protect the MC34062/35062 in the event
of a defective or missing SCR, while allowing the maximum drive output current to the gate of the SCR. Figure 5
shows the minimum recommended gate resistor, RG(min!,
versus the power supply voltage, VCe. A larger value of RG
may be used if less drive current is needed.
OVERVOLTAGE PROTECTION WITH
TIME DELAY
+
Power
Supply
-
"" t
V CC
"0"
?
-Q
Vou
1
MC34062
3
Drive
~
)~
Output
-0
2
v
RG
4thru 8
Q Programming
Pins
>RGK
>
Gn d
-Q
MOTOROLA LINEAR/INTERFACE DEVICES
3-221
•
•
MC34062, MC35062
TABLE 1 - PIN-PROGRAMMING OF RESISTOR NETWORK FOR NOMINAL TRIP VOLTAGES
Vtrip
3.483
3.632
3.758
3.807
3.883
3.923
4.012
4.098
4.130
4.196
4.272
4.353
4.407
4.520
4.598
4.673
4.709
4.845
4.947
4.996
Pin 3
,
,
,
,
,
,
,
,
,
,
Pin 4
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Pin 5
,
Gnd
Pin 6
Gnd
,
Pin 7
,
Gnd
Pin 3
Gnd
5.101
t
-,
5.222
Gnd
Gnd
5.328
5.413
Gnd
5.563
Gnd
Gnd
5.673
Gnd
Gnd
5.734
Gnd
,
,
, ,
Vtrip
, ,
,
,
, , ,
, ,
,
, ,
,
,
Gnd
Gnd
Pin 8
Gnd
Gnd
,
Gnd
Gnd
,
,
, ,
,
,
, r 11
, ,
, •
,
, • •
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
,
Gnd
5.900
t
Gnd
5991
t
Gnd
6.200
6.311
Gnd
Gnd
6.610
6.703
,
,
• ,
Gnd
6.840
Gnd
7.000
Gnd
7.298
~
7.347
Gnd
7.132
Pin 6
Gnd
Gnd
Gnd
•
Gnd
Gnd
Gnd
r 11
r 11
Gnd
Gnd
Pin 7
Pin 8
~
Gnd
~
•, ,
,
~
Gnd
~
,
~
Gnd
~
, ,
,
r
Gnd
,
Gnd
•
~
~
Gnd
Gnd
Gnd
•
--'
,
, , • , •
t .- 11
, ,
,
,
,
,
r
, r~
,
.
Gnd
Gnd
Gnd
Gnd
~
~
Gnd
Gnd
Gnd
t
~-
MOTOROLA LINEAR/INTERFACE DEVICES
3-222
Pin 5
,
5887
Gnd
,
t
Gnd
6.092
,
,
,
,
,
,
Pin 4
Gnd
"
~
MC34062, MC35062
TABLE 1 -
Vtnp
7.478
7.799
8.106
Pin 3
, ,
, •
,
,
,
8.220
8.409
,
8.539
,
8.633
8.756
8.870
8.906
9.013
9.178
9.331
9.377
9.385
9.433
9.600
9.826
9.912
10.000
Pin 4
Pin 5
Pin 6
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
,
,
•
Vee
,•
Gnd
,
,
,
Gnd
Gnd
10.400
Gnd
11.047
Gnd
11.178
Gnd
11.630
11.937
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
,
,
-'
,
• ,,
Gnd
12.086
,
,
,
L
,
L
,
12.477
12.556
j
j
,
,
L
W
,
,
Gnd
Gnd
Gnd
Gnd
,
,
,
Gnd
,
Gnd
Gnd
,
,
,
Gnd
Gnd
Gnd
t
Pin 8
Gnd
,
,
Gnd
U
Gnd
,
Gnd
Vee
,
Vee
,
,
,
Gnd
Gnd
, • , •
L
r-f
MOTOROLA LINEAR/INTERFACE DEVICES
3-223
Gnd
W
15.330
Gnd
Gnd
Gnd
L
13.400
14.500
L
Pin 7
,
,
L -.1
14.233
Gnd
Pin 6
Gnd
13.387
13.700
,
L -.!
12.732
12.800
Pin 5
,
11.496
Gnd
Gnd
Pin 4
10.540
11.895
Gnd
Pin 3
10.700
Gnd
L
Vtrip
Gnd
Gnd
W
,
,
• ,
• , •
,
, •
,
• ,
,
-.1
, •
,
L
Pin 8
,
Gnd
, ,
, •
,
,
,
,
•,
,
Pin 7
(Continued)
'-
,
Gnd
Gnd
,
,
Gnd
Gnd
II
MC34062, MC35062
TABLE 1 - (Continued)
Vtrip
II
15.637
16.200
Pin 3
Pin4
,
16.256
16.465
L
W
16.832
17.300
17.900
18.200
18.733
L
,
L
,
21.000
21.600
22.122
Gnd
Gnd
,
Pin 8
,
Gnd
Gnd
,
Gnd
,
, ,
Gnd
Gnd
Gnd
Gnd
,
,
,
,
,
W
•
,
,
L
W
W
,
L
,
L
,
24.400
L
W
24.800
LW
L
25.211
t
30.023
30.694
31.486
31.900
,
Vee
Pin 7
Pin 8
Gnd
vee
Gnd
Gnd
Gnd
--'
Gnd
W
,
Gnd
vee
--'
Gnd
Gnd
L
W
Gnd
L
t
,
,
,
Vee
Vee
Gnd
l--J.
,
-'
Gnd
Gnd
Gnd
Gnd
Vee
Gnd
33.116
t
~
Gnd
38.182
t
Vee
,
-'
Vee
32.233
vee
MOTOROLA LINEAR/INTERFACE DEVICES
3-224
--'
Gnd
Gnd
39.064
,
L J
Vee
Gnd
Gnd
Vee
t
28.500
Pin 6
Gnd
24.283
Gnd
--'
,
24.000
T
L ..J
Vee
t
28.200
Gnd
Pin 5
Vee
23.807
Gnd
T
,
Pin 4
L ..J
W
Gnd
Pin 3
23.700
27.400
Gnd
W
22.673
Gnd
•
,
Vtrip
27.333
Gnd
20.232
20.700
Pin 7
,
,
19.900
20.300
Pin 6
,
17.087
17.100
,
,
,
,
t
16.500
16.532
Pin 5
,.
vee
Vee
,
-'
Gnd
.1
Gnd
.1
Gnd
Gnd
MC34062, MC35062
Since the anode current flows through this turned-on
gate region, very high current densities can occur in
the gate region if high anode currents appear quickly
(di/dt). This can result in immediate destruction of
the SCR or gradual degradation of its forward blocking
voltage capabilities - depending on the severity olthe
occasion.
The value of dildt that an SCR can safely handle is
influenced by its construction and the characteristics
of the gate drive Signal. A center-gate-fire SCR has
more di/dt capability than a corner-gate-fire type, and
heavily overdriving (3 to 5 times IGT) the SCR gate
with a fast <1.0 p's rise time signal will maximize its
di/dt capability. A typical maximum number in phase
control SCRs of less than 50 A(RMS) rating might be
200 AI P.s, assuming a gate current of five times IGT
and< 1.0 p's rise time. If having done this, a di/dt problem is seen to still exist. the designer can also decrease
the di/dt of the current waveform by adding inductance in series with the SCA. as shown in Figure 15.
Of course, this reduces the circuit's ability to rapidly
reduce the dc bus voltage and a tradeoff must be made
between speedy voltage reduction and di/dt.
CROWBAR SCR CONSIDERATIONS
Referring to Figure 13, it can be seen that the crowbar
SCR, when activated, is subject to a large current surge
from the output capacita nce, Cout. This capacita nce
consists of the power supply output capacitors, the load's
decoupling capacitors, and in the case of Figure 13A, the
supply's input filter capacitors. This surge current is illustrated in Figure 14, and can cause SCR failure or degradation by anyone of three mechanisms: di/dt. absolute
peak surge, or 12t. The interrelationship of these failure
methods and the breadth of the applications make specification of the SCR by the semiconductor manufacturer
difficult and expensive. Therefore, the designer must
empirically determine the SCR and circuit elements
which result in reliable and effective OVP operation.
However, an u ndersta nding of the factors wh ich infl ue nce
the SCR's di/dtand surge capabilities simplifies this task.
1. di/dt
As the gate region of the SCR is driven on, its area
of conduction takes a finite amount of time to grow,
starting as a very small region and graduallyspreading.
FIGURE 13 - TYPICAL CROWBAR CIRCUIT
CONFIGURATIONS
13A - SCR ACROSS INPUT OF REGULATOR
I-....----~.------o Vout
100
13B -
SCR ACROSS OUTPUT OF REGULATOR
u .....____----.- Vth.
Pin 2 = Gnd, Remaining pins open
NOTES:
1. Tlow
- 55°C for MC35063
- 40°C for MC33063
O°C for MC34063
Thigh
+ 125°C for MC35063
+ 85°C for MC33063
+ 70°C for MC34063
2. Output switch tests are performed under pulsed conditions
to minimize power dissipation.
MOTOROLA LINEAR/INTERFACE DEVICES
3-228
MC34063, MC35063, MC33063
FIGURE 1 - OUTPUT SWITCH ON-OFF TIME
versus OSCILLATOR TIMING
CAPACITOR
FIGURE 2 - STANDBY SUPPLY CURRENT
versus SUPPLY VOLTAGE
3.2 ,--,----,---,---,----,--,---,-------,
CT = 0.001 I1F
1
"
Ipk(sensel
0
100
i
Z
0
'"
~
~
>-
=>
~
=>
0
----+--r---t-----+--r-----i
VCC
! t1p~in~2~==G~n~d=i~=E=t=~==E~!-:~
<=
2.4
r-f----r---i----- f----+---t----i---
1.6
'---- -- --- 1--
10
.BO.B
C----
-----t--
---- t-----
j---
----t-----
0
~
.9
0~0--75.0~-~10-~f~5-~20~~2~5-~3~0-~35~~40
Vce SUPPLY VOLTAGE ,VOL TSI
CT, OSCILLATOR TIMING CAPACITOR InFI
FIGURE 3 - EMITTER-FOLLOWER CONFIGURATION
OUTPUT SWITCH SATURATION VOLTAGE
versus EMITTER CURRENT
\_ JCC ~ 56v
~ 5f- Pins 1,7,8
01.
20
f- Pins 3,5
w
'"~
~
1.2
I
:
=>
~ 1. 2
l- to-
Gnd
V
V
V
~ 1. 3
o
a
~ VCC
1. 4
~
FIGURE 4 - COMMON-EMITTER CONFIGURATION
OUTPUT SWITCH SATURATION VOLTAGE
versus COLLECTOR CURRENT
20
I-
w
'"
;::
----
t--
0.8
I I
VCC - 5.0 V
1.0 I- Pin 7 - VCC
Pins 2.3.5
. _ I- darhn:ton
Gnd
f-- I-r-
V
L
~ o. 6
Forced Beta
o
i=
;'2
=>
~
i,.---
~ O. 2
0
-!;'
k....-
f--
u:;
0.4
0.6
O.B
1.0
1.2
0
o
1.4
IE, EMITIER CURRENT (AMPSI
20 ....... 1-"
i,.--- f/
0.4
1
0.2
0.2
0.4
0.6
O.B
1.0
IC, COLLECTOR CURRENT IAMPSI
MOTOROLA LINEAR/INTERFACE DEVICES
3-229
~r---
= r--
f--
a
V
~onnlectlO:
1.2
1.4
II
MC34063, MC35063, MC33063
AGURE 5 -
..
STEP-DOWN CONVERTER
8
7
RSC
0.33
Vin
6
25~ 100~
/LF
11 220 /LH
~
5
Vout
R1
+ 5.0 VI500 mA
ILF~CO
470
3.6 k
1.2 k
Conditions
Test
Vin
~
15 to 25 V, 10
Load Regulation
Vin
~
25 V, 10
~
50 to 500 mA
5.0 mV
Output Ripple
Vin
~
25 V, 10
~
500 mA
40 mV p _p
Short Circuit Current
Vin
~
25 V, RL
Efficiency
Vin
~
25 V, 10
FIGURE 6 -
6A -
~
~
~
Results
Line Regulation
0.1
15 mV
500 mA
n
2.3 A
500 mA
84.7%
EXTERNAL CURRENT BOOST CONNECTIONS
FOR IC PEAK GREATER THAN 1.5 A
EXTERNAL NPN SWITCH
6B -
EXTERNAL PNP SATURATED SWITCH
8
Vout
Vout
Rsc
Vin
6
Rsc
Vin
MOTOROLA LINEAR/INTERFACE DEVICES
3-230
MC34063, MC35063, MC33063
FIGURE 7 -
STEP-UP CONVERTER
170 /LH
II
8
180
Rsc
0.22
lN5819
Vin
6
12 V
+
100 1;/LF -
5
~
~~
Rl~2-.2-k--~47~k-----------------l~5~O-+~_~28V175mA
/IF
Test
1=' Co
Results
Conditions
line Regulation
Vin
~
8.0 to 16 V. 10
Load Regulation
Vin
~
12 V, 10
Output Ripple
Vin ~ 12 V, 10 ~ 175 mA
150 mV p . p
Short Circuit Current
Vin ~ 12 V, RL ~ 0.1 !l
2.0 A
Efficiency
Vin ~ 12 V, 10 ~ 175 mA
93°'0
FIGURE 8 -
BA -
~
175 mA
12 mV
75 to 175 mA
45 mV
~
EXTERNAL CURRENT BOOST CONNECTIONS
FOR IC PEAK GREATER THAN 1.5 A
EXTERNAL NPN SWITCH
8B -
Rsc
EXTERNAL NPN SATURATED SWITCH
Rsc
MOTOROLA LINEAR/INTERFACE DEVICES
3-231
MC34063, MC35063, MC33063
FIGURE 9 - DESIGN FORMULA TABLE
II
Calculation
Step-Down
Step-Up
!2n
toft
Vgu! + VF
Vin(min) - V.at - Vout
Vout + VF - Vinlmin)
Vin(min) - Vsat
(ton + toft)max
-1-
-1-
CT
4 X 10- 5 ton
4X 10- 5 t on
)pk(switch)
2)out(m"x)
Imin
Imin
21.out (max)
(~)
toft
RSC
0.33/Ioklswitch)
0.33/I ok(switch)
L(min)
(Vinlmin! - Vsat - Vout)t
Ipk(switch)
on(max)
(Vinlmin! - Vsat)t (
)
Ipk(switch)
on max
Co
loklswitch! (ton + toft)
8 Vripple(p-p)
= lout ton
Vripple
Vsat = Saturation voltage of the output sWitch.
VF = Forward voltage drop of the ring back rectifier
The fOllowing power supply characteristics must be chosen:
Vin - Nominal input voltage. If this voltage is not constant, then use Vin(max) for step-down and Vin(min) for stepup converter ..
V out -
Desired output voltage, Vout
= 1.25 (1 +
~).
lout - Desired output current.
fmin - Minimum desired output switching frequency at the selected values for Yin and 10 ,
Vripple('p-p) - Desired peak-to-peak output ripple voltage. In practice, the calculated value will need to be increased
due to the capacitor's equivalent series resistance and board layout. The ripple voltage should be
kept to a low value since it will directly effect the line and load regulation.
Note:
For further information refer to application note AN920A.
MOTOROLA LINEAR/INTERFACE DEVICES
3-232
@
MC34063A
MC35063A
MC33063A
MOTOROLA
Advance Information
DC-TO-DC CONVERTER
CONTROL CIRCUITS
DC-TO-DC CONVERTER
CONTROL CIRCUITS
The MC34063A Series is a monolithic control circuit containing
the primary functions required for DC-to-DC converters. These
devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active
current limit circuit, driver and high current output switch. This
series was specifically designed to be incorporated in Step-Down
and Step-Up and Voltage-Inverting applications with a minimum
number of external components. Refer to Application Notes
AN920A and AN954 for additional design information.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Operation from 3.0 V to 40 V Input
D SUFFIX
• Low Standby Current
PLASTIC PACKAGE
CASE 751-02
SO-8
• Current Limiting
• Output Switch Current to 1.5 A
• Output Voltage Adjustable
• Frequency Operation to 100 kHz
U SUFFIX
• Precision 2% Reference
CERAMIC PACKAGE
CASE 693-02
FUNCTIONAL BLOCK DIAGRAM
PIN CONNECTIONS
r-------------------,
Drive
Collector
8
I
I
Switch
O....::..,r------------,
Collector
I
Switch
Switch
I
Ipk Sense
Emitter
I
I
Ipk
Sense
Driver
Collector
Collector
I
I
Timing
Capacitor
I
7,
Switch
Emitter
I
I
VCC
Comparator
Inverting
Input
Gnd
I
I
(Top View)
I
I
I
VCC~
Timing
Capacitor
I
I
ORDERING INFORMATION
I
I
I
Comparator
Inverting
Input
Device
I
5:
0-.::.;---------'
'----+--<:..> Gnd
I _____________________ I
L
MC35063AU
MC33063AD
~
MC33063API
MC34063AD
MC34063AP1
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-233
Temperature
Range
-55to +125°C
-40 to +85°C
o to
+ 70°C
Package
Ceramic DIP
Plastic SOIC
Plastic DIP
Plastic SOIC
Plastic DIP
II
..
MC34063A, MC35063A, MC33063A
MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
Rating
VCC
40
Vdc
Comparator Input Voltage Range
VIR
-0.3 to +40
Vdc
Switch Collector Voltage
VC(switch)
40
Vdc
Switch Emitter Voltage (VPin 1 = 40 V)
VE(switch)
40
Vdc
VCE(switch)
40
Vdc
Vdc
Switch Collector to Emitter Voltage
Driver Collector Voltage
VC(driver)
40
Driver Collector Current (Note 1)
IC(driver)
100
mA
Switch Current
ISW
1.5
Amps
Power Dissipation and Thermal Characteristics
Ceramic Package, U Suffix
TA = +25°C
Thermal Resistance
Plastic Package, P Suffix
TA = +25°C
Po
R9JA
1.25
100
°CIW
Thermal Resistance
Po
R9JA
1.25
100
°CIW
SOIC Package, 0 Suffix
TA = +25°C
Thermal Resistance
Po
R9JA
625
160
°CIW
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature Range
MC35063A
MC33063A
MC34063A
TA
W
mW
°C
-55 to + 125
-40 to +85
o to +70
Storage Temperature Range
-65 to +150
Tstg
ELECTRICAL CHARACTERISTICS (VCC
W
= 5.0 V;
TA
= Tlow to Thigh
Characteristic
°C
[Note 21 unless otherwise specified)
I
Symbol
I
Min
I
Typ
I
Max
Units
OSCILLATOR
Frequency
(VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)
fOSC
24
33
42
kHz
Charge Current
(VCC = 5.0 V to 40 V, TA = 25°C)
Ichg
24
33
42
pA
Idischg
140
200
260
pA
Discharge to Charge Current Ratio
(Pin 7 = VCC, TA = 25°C)
Idischg"chg
5.2
6.2
7.5
-
Current Limit Sense Voltage
(lchg = Idischg, TA = 25°C)
Vipk(sense)
250
300
350
mV
Discharge Current
(VCC = 5.0 V to 40 V, TA
=
25°C)
NOTES:
1. Maximum package power dissipation limits must be observed.
2. Tlow
= =~:g :~~ ~g;~=
O°C for MC34063A
Thigh
= :~;~~cf~~rM~~~~~~
+ 70"<; for MC34063A
MOTOROLA LINEAR/INTERFACE DEVICES
3-234
MC34063A, MC35063A, MC33063A
OUTPUT SWITCH (Note 3)
Saturation Voltage, Darlington Connection
IIsw = 1.0 A, Pins 1. 8 connected)
Saturation Voltage
(lsw = 1.0 A, RPin 8
DC Current Gain
(lSW = 1.0 A, VCE
= 82
n to VCC, Forced f3 =
VCE(sat)
-
1.0
1.3
V
VCE(sa!)
-
0.45
0.7
V
hFE
50
120
-
-
-
0.01
100
,..A
1.25
1.275
1.29
20)
= 5.0 V, TA = 25"C)
Collector Off-State Current
(VCE = 40 V)
ICloff)
COMPARATOR
Threshold Voltage
ITA = 25"C)
ITA = Tlow to Thigh)
V
Vth
1.225
1.21
Threshold Voltage Line Regulation
(VCC = 3.0 V to 40 V)
Input 8ias Current
(Vin = 0 V)
-
Regline
-
1.4
5.0
mV
liB
-
-40
-400
nA
TOTAL DEVICE
Supply Current
(VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC,
VPin 5 > Vth, Pin 2 = Gnd, Remaining pins open)
TOTAL DEVICE
Supply Current
(VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC,
VPin 5 > Vth, Pin 2 = Gnd, Remaining pins open)
NOTES:
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
4. If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (:s;;300 rnA) and high driver currents
(~30 mAl. it may take up to (2.0 p,sl to come out of saturation. This condition will shorten the "off" time at frequencies ;;.- 30 kHz, and is magnified
at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington
configuration is used, the following output drive condition is recommended:
Forced
fJ of output switch = Ie, outputl(le, driver - 7.0 rnA*)
~
10
*The 100 n resistor in the emitter of the driver device requires about 7.0 rnA before the output switch conducts.
MOTOROLA LINEAR/INTERFACE DEVICES
3-235
II
II
MC34063A, MC35063A, MC33063A
FIGURE 1 - OUTPUT SWITCH ON-OFF TIME versus
. OSCILLATOR TIMING CAPACITOR
FIGURE 2 - TIMING CAPACITOR WAVEFORM
1000
~ 500 -
~
-
VCC
-
Pin 5 = Gnd
TA 25"(;
~100 ~
z
5.0V
200 - Pin 7 = VCC
o
50
i
0
O~ 5.
ton
0
0
toff
~
2.0
.91.0
0.01
!-0.02
0.05 0.1
0.2
0.5
1.0
2.0
CT, OSCILLATOR TIMING CAPACITOR InFI
5.0
10
FIGURE 4 - COMMON EMITTER CONFIGURATION OUTPUT
SWITCH SATURATION VOLTAGE versus
COLLECTOR CURRENT
FIGURE 3 - EMITTER FOLLOWER CONFIGURATION OUTPUT
SATURATION VOLTAGE versus EMITTER CURRENT
1.8
1.0
-
?;1.7
~
'" 1. 6
~
g
z
-
1. 5
o
~ 1.4
:::>
I--
~
'"
~
~
~1. 2
~ 1. 1
0.4
0.6
0.8
1.0
IE, EMITTER CURRENT IAI
1.2
1.4
1.6
FIGURE 5 - CURRENT LIMIT SENSE VOLTAGE
versus TEMPERATURE
_400
~
!:::
~
320
0.4
V
~
0.6
0.8
1.0
1.2
IC, COLLECTOR CURRENT IAI
-
1.4
1.6
4
-- ----
0
6
r--
260
~240
~220
~20 0
-55
-----0.2
~
Forced f3 = 20
............
2.8
VCC = 5.0V
0
'"
:::; 30
!z 280
~
u
.,../ I-""
J.....-:-:t:::
Darlington Connection
3. 2
~ 36oI- Ichg = Idi,chg
lJl340
z
VCC = 5.0 V
Pin 7 = VCC
Pin, 2, 3, 5 = Gnd
TA=25°C
See Note 3
I--"
FIGURE 6 - STANDBY SUPPLY CURRENT versus
SUPPLY VOLTAGE
~
~ 380
f-
O. 1
0
0.2
-
-
an
u
>
o
O. 8
O. 7
o
> O. 6t-z
o
~ O. 5 t-4
~ O.
r---;Jj
3
~ O.
O. 2
VCC = 5.0V
Pin, 1, 7, 8 = VCCPin, 3, 5 = Gnd
TA = 25°C
See Note 3
~ 1. 3
1. 0
--
I-- f -
O. 9
2
CT = 1.0 nF
Pin 7 = VCC
Pin 2 := Gnd
8
o.4
-
0
-25
+25
+50
+75
TA, AMBIENT TEMPERATURE lOCI
+100
+125
5.0
10
MOTOROLA LINEAR/INTERFACE DEVICES
3-236
15
20
25
VCC, SUPPLY VOLTAGE IVI
30
35
40
MC34063A, MC35063A, MC33063A
FIGURE 7 -
STEP-UP CONVERTER
170 JlH
L
r----------------,
81
180
11
r--+--+
I
I
I
I
II
I
71
I
Rsc
0.22
1N5819
I
I
I
I
1~i~ o--+_---=6'-l
I
I
I
51
I
I
L....---;2---------------....I
R,
V
1.0J,tH
out
t-2.-2-k --"'47"""k------------+-+--0 28 V/175 rnA ~ Vout
330J
1'°0
CO
Optional Filter
Test
Conditions
Results
Line Regulation
Yin
~
8.0Vt016V,IO
Load Regulation
Yin
~
12 V, 10
~
75 to 175 mA
Output Ripple
Yin
=
12V, 10
~
175mA
400 mVp-p
Efficiency
Yin = 12V, 10
~
175mA
89.2%
Output Ripple With Optional Filter
Yin
12 V, 10
~
175 mA
40 mVp-p
FIGURE 8 -
8A -
=
~
175mA
30 mV
~
±O.O5%
10 mV
~
±O.O17%
EXTERNAL CURRENT BOOST CONNECTIONS
FOR IC PEAK GREATER THAN 1.5 A
8B -
EXTERNAL NPN SWITCH
EXTERNAL NPN SATURATED SWITCH
(REFER TO NOTE 4)
r----------------,
Vout
Vout
11
r--+--------::..j
25V
+
"220 "H
'OOl
,L _____________________ ,
~
1.0 JLH
R2
leo
+
3.6 k
470
Vout
5.0 VI500 mA
~Vout
l'OO
Optional Filter
Test
Results
Conditions
~
12 rnV
~
±0.12%
Line Regulation
Vin
~
15 V to 25 V. 10
Load Regulation
Vin
~
25 V. 10
~
50 to 500 rnA
3.0 rnV
Output Ripple
Vin
~
25 V. 10
~
500 rnA
120 rnVp-p
n
Short Circuit Current
Vin
~
25 V. RL
~
0.1
Efficiency
Vin
~
25 V. 10
~
500 rnA
Output Ripple With Optional Filter
Vin ~ 25 V. 10 ~ 500 rnA
FIGURE 10 -
IDA -
500 rnA
~
±0.03%
1.lA
82.5%
40 rnVp-p
EXTERNAL CURRENT BOOST CONNECTIONS
FOR IC PEAK GREATER THAN 1.5 A
lOB -
EXTERNAL NPN SWITCH
EXTERNAL PNP SATURATED SWITCH
r------------------,
8'
'--""1-'-'__...
Vout
Vout
Rse
,
L
___________________
MOTOROLA LINEAR/INTERFACE DEVICES
3-238
,
~
MC34063A, MC35063A, MC33063A
FIGURE 11 -
VOLTAGE INVERTING CONVERTER
r------------------,
81
I,
1
1
,
E
1
1
71
I
1
I
,,
0.24
I
4.5 V
~~n 6.0 V 0----1_6"-11
I
I
1
1
I
5'
+
1500
1N5819
pF
L1 ___________________ __ .J,
R,
..------"'95"'3~-------~~--.-.......-O
'000
1+
-12
~f1~~ rnA ~ Vout
+I'oO
Optional Filter
Test
Results
Conditions
3.0 rnV
~
±0.012%
10 to 100 rnA
0.022 V
~
±O.O9%
100 rnA
50 rnVp-p
Line Regulation
Vin
~
4.5 V to 6.0 V. 10
Load Regulation
Vin
~
5.0 V. 10
~
Output Ripple
Vin
~
5.0 V. 10
~
~
100 rnA
n
Short Circuit Current
Yin ~ 5.0 V. RL = 0.1
Efficiency
Vin
~
5.0 V. 10
~
100 rnA
64.5%
Output Ripple With Optional Filter
Yin
~
5.0 V. 10
~
100 rnA
70 rnVp-p
FIGURE 12 -
12A -
910 rnA
EXTERNAL CURRENT BOOST CONNECTIONS
FOR IC PEAK GREATER THAN 1.5 A
12B -
EXTERNAL NPN SWITCH
EXTERNAL PNP SATURATED SWITCH
Vout
,
L ________________
~----------------~
MOTOROLA LINEAR/INTERFACE DEVICES
3-239
~
MC34063A, MC35063A, MC33063A
FIGURE 13 -
PRINTED CIRCUIT BOARD AND COMPONENT LAYOUT
(CIRCUITS OF FIGURES 1.9.11)
---------------5.45"---------------·~'"I1
r-I....
II
(Top view, copper foil as seen through the board from the component side)
*Optional Filter.
Top View, Component Side
INDUCTOR DATA
Inductance (,.H)
TurnslWire
Step-Up
110
38 Turns of #22 AWG
Step-Down
220
48 Turns of #22 AWG
Voltage-Inverting
88
28 Turns of #22 AWG
Converter
All inductors are wound on Magnetics 55117 toroidal core.
MOTOROLA LINEAR/INTERFACE DEVICES
3-240
MC34063A, MC35063A, MC33063A
FIGURE 14 Calculation
ton/toff
DESIGN FORMULA TABLE
Step-Up
Yout + YF - Yin(min)
Yin(min) - Ysat
Step-Down
Yout+YF
Yin(min) -Ysat-Yout
Voltage-Inverting
IYoutl+YF
Yin-Ysat
(ton + toff) max
1/1min
1/1min
1lfmin
CT
4 x 10- 5 ton
4 x 10- 5 ton
4x 10- 5 ton
lok(switch)
210ut(max)(ton/toff+ 1)
21 0ut(max)
210ut(max)(ton/toff + 1)
RSC
0.3/1 o k(switch)
0.3/Ipk(switch)
0.3/Ipk(switch)
L(min)
(Yin(min) - Ysat)ton(max)
Ipk(switch)
(Yin(min) - Ysat- Yout)ton(max)
lok(switch)
(Yin(min)-Ysat)ton(max)
lok(switch)
Co
= 10uttonN,ipple(p-p)
Ipk(switch)(ton +toff)
8 Y,ipple(p-p)
= 10uttonN,ipple(p-p)
Vsat = Saturation voltage of the output switch.
VF == Forward voltage drop of the output rectifier.
The following power supply characteristics must be chosen:
Vin - Nominal input voltage.
.
Vout -- Desired output voltage, IVoutl = 1.25 (1 + R2/R1)
lout - Desired output current.
fmin - Minimum desired output switching frequency at the selected values of Vin and 10.
Vripple(p-p) - Desired peak-to-peak output ripple voltage. In practice, the calculated capacitor value will need to
be increased due to its equivalent series resistance and board layout. The ripple voltage should be
kept to a low value since it will directly affect the line and load regulation.
MOTOROLA LINEAR/INTERFACE DEVICES
3-241
II
•
MC34064
MC33064
MOTOROLA
Prod uct Preview
UNDERVOLTAGE
SENSING CIRCUIT
UNDERVOLTAGE SENSING CIRCUIT
The MC34064 is an undervoltage sensing circuit specifically
designed for use as a reset controller in microprocessor-based
systems. It offers the designer an economical solution for low
voltage detection with a single external resistor. The MC34064
features a trimmed-in-package bandgap reference, and a com·
parator with precise thresholds and built-in hysteresis to prevent
erratic reset operation. The open collector reset output is capable
of sinking in excess of 10 mA, and operation is guaranteed down
to 1.0 volt input with low standby current. These devices are
packaged in 3-pin TO·226AA and B-pin surface mount packages.
Applications include direct monitoring of the 5.0 volt MPU/logic
power supply used in appliance, automotive, consumer and
industrial equipment.
• Trimmed-In-Package Temperature Compensated Reference
• Precise Comparator Thresholds Guaranteed Over
Temperature
SILICON MONOLITHIC
INTEGRATED CIRCUIT
P SUFFIX
PLASTIC PACKAGE
CASE 29·04
.1
PIN 1. RESET
2. INPUT
3. GROUND
3
• Comparator Hysteresis Prevents Erratic Reset
• Reset Output Capable of Sinking in Excess of 10 mA
• Internal Clamp Diode for Discharging Delay Capacitor
• Guaranteed Reset Operation with 1.0 Volt Input
• Low Standby Current
• Economical TO·226AA and Surface Mount Packages
D SUFFIX
PLASTIC PACKAGE
CASE 751·02
50-8
PIN 1. RESET
2. INPUT
3. N.C.
4. GROUND
REPRESENTATIVE BLOCK DIAGRAM
Input
5.
6.
7.
8.
N.C.
N.C.
N.C.
N.C.
2 (2)
1 (1)
ORDERING INFORMATION
Gnd
3 (4)
~
~
Sink Only
= Positive True Logic
Pin numbers adjacent to terminals are for the 3-pin TO-226AA package.
Pin numbers in parenthesis are for the D suffix 50-8 package.
Device
MC34064D-5
MC34064p·5
MC33064D-5
MC33064p·5
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-242
Temperature
Range
O°C to +70'C
- 40°C to + 85°C
Package
Plastic 50·8
Plastic TO-226M
Plastic 50·8
Plastic TO·226M
MC34064, MC33064
MAXIMUM RATINGS
Rating
Symbol
Value
Power Input Supply Voltage
Vin
-1.0 to 10
V
Reset Output Voltage
Vo
10
V
ISink
Internally
Limited
mA
IF
100
mA
Po
R6JA
625
200
mW
'CIW
Po
R6JA
625
200
'CIW
Operating Junction Temperature
TJ
+150
Operating Ambient Temperature
MC34064
MC33064
TA
Reset Output Sink Current
Clamp Diode Forward Current, Pin 1 to 2 (Note 1I
Power Dissipation and Thermal Characteristics
P Suffix, Plastic Package
Maximum Power Dissipation (a' TA = 25°C
Thermal Resistance, Junction to Air
o Suffix, Plastic Package
Maximum Power Dissipation (if TA = 25 C
Thermal Resistance Junction to Air
D
Storage Temperature Range
Tstg
Unit
II
mW
'C
'C
o to +70
-40 to +85
-65 to + 150
'C
ELECTRICAL CHARACTERISTICS For typical values TA = 25'C, for minimax values TA is the operating ambient temperature
range that applies [Notes 2 and 31.
I
Characteristic
Symbol
Min
Typ
Max
VIH
VIL
VH
4.5
4.5
0.Q1
4.61
4.59
0.02
4.7
4.7
0.05
-
0.46
0.15
1.0
0.4
0.1
Unit
COMPARATOR
Threshold Voltage
High State Output (Vin Increasingl
Low State Output (Vin Decreasingl
Hysteresis
V
RESET OUTPUT
Output Sink Saturation
(Vin = 4.0 V, ISink = 8.0 mAl
(Vin = 4.0 V, ISink = 2.0 mAl
(Vin = 1.0 V, ISink = 0.1 mAl
Output Sink Current (Vin, Reset
VOL
=
4.0 VI
Output Off-State Leakage (Vin, Reset
=
5.0 VI
Clamp Diode Forward Voltage, Pin 1 to 2 (IF
=
10 mAl
V
-
ISink
10
27
60
mA
IOH
-
0.02
0.5
fJ-A
VF
0.6
0.9
1.2
V
TOTAL DEVICE
Operating Input Voltage Range
Quiescent Input Current (Vin
= 5.0 VI
NOTES:
1. Maximum package power dissipation limits must be observed.
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
3. Tlow =
O'C for MC34064
Thigh = + 70'C for MC34064
= - 40'C for MC33064
= + 85'C for MC33064
MOTOROLA LINEAR/INTERFACE DEVICES
3-243
MC34064, MC33064
FIGURE 1 - RESET OUTPUT VOLTAGE versus
INPUT VOLTAGE
FIGURE 2 - RESET OUTPUT VOLTAGE versus
INPUT VOLTAGE
5.0 r--,---,---,---,----,--.,....--..-----,
10
----F==l===t==l===1===1
t- RL
= 10 k to Vin
TA = 25°C
..
~
w
13'"
6.0
~
....
~
::>
L _ RL = 10 k to Vin
,---- TA = 25°C
4.0 1--+--4--4---+----J--I--+-------l
/
8.0
./'
V
1/
~
w
~
3.0 1--+--4--4---+----J--I--+-------l
~
~
4.0
2.0 1--+--4--4---+--..:J--I--+-------l
o
0
~
1.01--+--+---1--+--+--+-+--1
2.0
I
o I../t
o
4.0
2.0
6.0
8.0
10
4.580
Vin. INPUT VOLTAGE {VI
FIGURE 3 - COMPARATOR THRESHOLD VOLTAGE
versus TEMPERATURE
4.630
~
4.620
4.610
V
0
>
90
,.--
4.600
i!' 4.590
./"
4.580
-
4.570
-55
Lower Thresh00
LowlSt.te Outr
-25
25
50
7. IrA U
5
....
i'E
0.6
~
0.4
TA = +25°C
~
75
100
I
~
z
1.5
0
TA = +85°C
~
i/ /
~V/ V
::>
~
en
....
1.0
~
::>
0
-"
0
>
/'
/
0.5
o. /
o
~
ITA L25 C J} .
VTA = -4O°C-
/'
Vin='OV
TA = +25°C
~
5
60
~
'"
40
....
1
7
..>f.
30
40
20
o
o
17
/
V
0.4
0.8
VF. FORWARD VOLTAGE {VI
'Sink. SINK CURRENT {mAl
MOTOROLA LINEAR/INTERFACE DEVICES
3-244
V
1/
~
!?
20
10
80
::>
u
t%.- V
10
8.0
FIGURE 6 - CLAMP DIODE FORWARD CURRENT
versus VOLTAGE
0
I
6.0
4.0
2.0
Vin. INPUT VOLTAGE {VI
FIGURE 5 - RESET OUTPUT SATURATION versus
SINK CURRENT
Vin = 4.0 V
'-WC
~
TA. AMBIENT TEMPERATURE lOCI
2.0
~
~::r
o
o
125
.~
+85°C
0.2
"
.
,
-40°C
::>
u
....
::>
~ 'V1 P\7
:(
~
~ ~ + 85°C
TA = +25°C
~
!:l;
V
7J
A
II;!
.c
:>
INPUT CURRENT versus INPUT VOLTAGE
0.8
.......
/
:r
en
4.640
1.0
Upper Threshold
High State Output
w
13'"
FIGURE 4 -
I I
RL = 10kl0Vin
4.620
4.600
Vin. INPUT VOLTAGE IVI
1.2
1.6
MC34064, MC33064
FIGURE 7 -
LOW VOLTAGE MICROPROCESSOR RESET
+
Power
Supply
E
A time delayed reset can be accomplished
with the addition of CDly.
tDl Y
~ R CDlY in ( 1 _ VthlMPUI
1
)
Vin
FIGURE 8 -
VOLTAGE MONITOR
FIGURE 9 -
+
1.0 k
+
Power
SOLAR POWERED BATTERY CHARGER
2 (21
Supply
11 (11
I
I
___ J
FIGURE 10 -
Vin ~ 11.5 V
to 14.5 V
LOW POWER SWITCHING REGULATOR
MPSW5,.1_A__-rv--",-v'--
~
:>
E
e::
E
2.5 V
2.0 V
1.0 ",S/DiV
1.0 ""IDlV
FIGURE 5 -
ERROR AMP OPEN-LOOP GAIN AND
PHASE versus FREQUENCY
100 " ,
..........
0",
. . . . .dain
RL = lOOK
TA = 25°C
"'- .........
I.........
i""-..
0
'"
i""-..
1.0K
FIGURE 7 -
10K
lOOK
f, FREQUENCY (Hzl
I
o
~
F .4
~
'1
~
II/
~ O. 31--TA = 25oC ""I
90 ~
w
W
z
'" ~'"
I ' irA =
120 ::3
o. 2
JII
15 !z
I-
TA - 125°'L
1
1'\ Phase
\
150<§.
l'.. .\
-20
100
i
ew
I..........
f-V~C =1 15V
9 o. 5
30
60 nl
0
10
O. 6
~
-
..........
I.........
tOM
1\.\1 80
10M
REFERENCE VOLTAGE CHANGE
a~ O. 1
}
0
r--.....
.0
II 'I
........
"1--.
2
6
0
b-
6.0
7.0
REFERENCE SHORT CIRCUIT CURRENT
versus TEMPERATURE
l
0r----..b..,
.......
r---..
.0
2.0
3.0
4.0
5.0
Vo, ERROR AMP OUTPUT VOLTAGE (VI
1.0
FIGURE 8 -
V~C = 15V
-55°C
I
I III
versus SOURCE CURRENT
0 ........
CURRENT SENSE INPUT THRESHOLD
versus ERROR AMP OUTPUT VOLTAGE
JCC ='15/ 'Vo = 1.5Vto2.5V_
..........
0
FIGURE 6 -
~
TA = -55°(
TA = 25°C
VCc 15V
RL'" o.ln-
~
~
....
~
...........
TA = 125°C
0
-24
o
20
40
60
80
100
I,ef, REFERENCE SOURCE CURRENT (mAl
120
-25
o
25
50
75
TA, AMBIENT TEMPERATURE (OCI
MOTOROLA LlNEA.R/INTERFACE DEVICES
3-249
100
125
II
..
nnC34065,nnC33065
FIGURE 9 -
REFERENCE LOAD REGULATION
FIGURE 10 -
~
REFERENCE LINE REGULATION
~
~
c
~
E
ti
'"
~
~
~
'"::e
z
:]I!
:I:
U
U
~
~
~
~
~
~
l-
I-
~
::::l
~
::::l
0
0
~
6
:;;
1.0mslOIV
1.0mslDlV
FIGURE 11 - OUTPUT SATURATION VOLTAGE
versus LOAD CURRENT
0
~
~
~
-1.0
~
,1!-
I
r-...
z
o
TA
1
~
I
TA
25'C
55'C
L
I
::::l
~
U)
I-
2.0 TA
o
1.0
J
0
OUTPUT WAVEFORM
VCC=15V
Source Saturation
VCc--(Load to Ground) -BO p.s Pulsed Load
120 Hz Rate
~ -2.0
~
FIGURE 12 -
.-
I
I 55'C
I frA = 25'C
V
I
I
......-1'
200
FIGURE 13 -
n-
Gnd
Sink Saturation_
(Load to Vcc)
400
600
10, OUTPUT LOAD CURRENT (rnA)
BOO
50 nsiDIV
OUTPUT CROSS·CONDUCTION
FIGURE 14 -
32
SUPPLY CURRENT versus SUPPLY VOLTAGE
B.2~
,
-RT'=
CT = 3.3 nF
24 -VFB1,2 = OV
Current Sense 1,2 = 0 V
~
-TA = 25'C
1
~
a
I
I
V
16
~
It
iil
~ 8.0
0
4.0
MOTOROLA LINEAR/INTERFACE DEVICES
3·250
B.O
12
Vcc, SUPPLY VOLTAGE (V)
16
20
MC34065, MC33065
OPERATING DESCRIPTION
The Error Amp output (Pin 5, 12) is provided for external loop compensation. The output voltage is offset by
two diode drops (=1.4 V) and divided by three before
it connects to the inverting input of the Current Sense
Comparator. This guarantees that no pulses appear at
the Drive Output (Pin 7, 10) when the error amplifier
output is at its lowest state (VoU. This occurs when the
power supply is operating and the load is removed, or
at the beginning of a soft-start interval (Figures 20, 21).
The minimum allowable Error Amp feedback resistance is limited by the amplifier's source current
(0.5 mAl and the output voltage (VDH) required to reach
the comparator's 0.5 V clamp level with the inverting
input at ground. This condition happens during initial
system startup or when the sensed output is shorted:
The MC34065 series are high performance, fixed frequency, dual channel current mode controllers specifically designed for Off-Line and DC to DC converter
applications. These devices offer the designer a cost
effective solution with minimal external components
where independent regulation of two power converters
is required. The Representative Block Diagram is shown
in Figure 15. Each channel contains a high gain error
amplifier, current sensing comparator, pulse width
modulator latch, and totem pole output driver. The
oscillator, reference regulator, and undervoltage lockout circuits are common to both channels.
Oscillator
The unique oscillator configuration employed features precise frequency and duty cycle control. The frequency is programmed by the values selected for the
timing components RT and CT. Capacitor CT is charged
and discharged by an equal magnitude internal current
source and sink, generating a symmetrical 50 percent
duty cycle waveform at Pin 2. The oscillator peak and
valley thresholds are 3.5 V and 1.6 V respectively. The
source/sink current magnitude is controlled by resistor
RT. For proper operation over temperature it must be
in the range of 4.0 kO to 16 kO as shown in Figure 1.
As CT charges and discharges, an internal blanking
pulse is generated that alternately drives the center
inputs of the upper and lower NOR gates high. This, in
conjunction with a precise amount of delay time introduced into each channel, produces well defined nonoverlapping output duty cycles. Output 2 is enabled
while CT is charging, and Output 1 is enabled during
the discharge. Figure 2 shows the Maximum Output
Duty Cycle versus Oscillator Frequency. Note that even
at 500 kHz, each output is capable of approximately 44%
on-time, making this controller suitable for high frequency power conversion applications.
In many noise sensitive applications it may be desirable to frequency-lock the converter to an external system clock. This can be accomplished by applying a clock
signal as shown in Figure 17. For reliable locking, the
free-running oscillator frequency should be set about
10% less than the clock frequency. Referring to the timing diagram shown in Figure 16, the rising edge of the
clock signal applied to the Sync input, terminates charging of CT and Drive Output 2 conduction. By tailoring
the clock waveform symmetry, accurate duty cycle
clamping of either output can be achieved. A circuit
method for this, and multi unit synchronization, is
shown in Figure 18.
R
- 3.0 (0.5 V) + 1.4 V _ 5800 0
f(MIN) 0.5 mA
Current Sense Comparator and PWM Latch
The MC34065 operates as a current mode controller,
whereby output switch conduction is initiated by the
oscillator and terminated when the peak inductor current reaches the threshold level established by'the Error
Amplifier output. Thus the error signal controls the peak
inductor current on a cycle-by-cycle basis. The Current
Sense Comparator-PWM Latch configuration used
ensures that only a single pulse appears at the Drive
Output during any given oscillator cycle. The inductor
current is converted to a voltage by inserting a groundreferenced sense resistor RS in series with the source
of output switch Q1. This voltage is monitored by the
Current Sense Input (Pin 6, 11) and compared to a level
derived from the Error Amp output. The peak inductor
current under normal operating conditions is controlled
by the voltage at Pin 5, 12 where:
I
_ V(Pin 5, 12) - 1.4 V
pk 3 RS
Abnormal operating conditions occur when the
power supply output is overloaded or if output voltage
sensing is lost. Under these conditions, the Current
Sense Comparator threshold will be internally clamped
to 0.5 V. Therefore the maximum peak switch current
is:
Ipk(max) =
0.5 V
AS
When designing a high power switching regulator it
may be desirable to reduce the internal clamp voltage
in order to keep the power dissipation of RS to a reasonable level. A simple method to adjust this voltage
is shown in Figure 19. The two external diodes are used
to compensate the internal diodes, yielding a constant
clamp voltage over temperature. Erratic operation due
to noise pickup can result if there is an excessive reduction of the Ipk(max) clamp voltage.
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the
power supply to exhibit an instability when the output
is lightly loaded. This spike is due to the power transformer interwinding capacitance and output rectifier
recovery time. The addition of an RCfilter on the Current
Sense input with a time constant that approximates,!tie
spike duration will usually eliminate the instability; refer
to Figure 24.
~ .
Error Amplifier
Each channel contains a fully-compensated Error
Amplifier with access to the inverting input and output.
The amplifier features a typical dc voltage gain of
100 dB, and a unity gain bandwidth of 1.0 MHz with 71
degrees of phase margin (Figure 5). The non-inverting
input is internally biased at 2.5 V and is not pinned out.
The converter output voltage is typically divided down
and monitored by the inverting input through a resistor
divider. The maximum input bias current is -1.0 IJ.A
which will cause an output voltage error that is equal
to the product of the input bias current and the equivalent input divider source resistance.
./
MOTOROLA LINEAR/INTERFACE DEVICES
3-251
•
MC34065, MC33065
FIGURE 15 - REPRESENTATIVE BLOCK DIAGRAM
a
Current Sense 1
AS
Compensation 1 o-If--+--
Drive Output 2
Voltage
Feedback 2 13
Current Sense 2
. 12L
0-;-1--,--,
____
=
Gnd 8
RS
D'~~----
Compensation 2
1d
91
~
Sink Only
~ = Positive True Logic
-
FIGURE 16 - TIMING DIAGRAM
I
I
I
I
I
I
r--;--,--;---.--,--;--,--;r--r--,--,--,
I
I
I
I
I
UJL
Sync Input
Capacitor CT
Latch 1
"Set" Input
Current Sense 1
Latch 1
"Reset" Input
Drive Output 1
Drive Output 2
Enable
Latch 2
"Set" Input
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
-;:::::::::;;:==~I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Compensation 2 .........
Current Sense 2
Drive Output 2
Latch 2
"Reset" Input
MOTOROLA LINEAR/INTERFACE DEVICES
3-252
MC34065, MC33065
Undervoltage Lockout
Two Undervoltage Lockout comparators have been
incorporated to guarantee that the IC is fully functional
before the output stages are enabled. The positive
power supply terminal (VCC) and the reference output
(Vref) are each monitored by separate comparators.
Each has built-in hysteresis to prevent erratic output
behavior as their respective thresholds are crossed. The
VCC comparator upper and lower thresholds are 14 V
and 10 V respectively. The hysteresis and low start-up
current makes these devices ideally suited to off-line
converter applications where efficient bootstrap startup techniques are required (Figure 28). The Vref comparator disables the Drive Outputs until the internal circuitry is functional. This comparator has upper and
lower thresholds of 3.6 V and 3.4 V. A 17 V zener is
connected as a shunt regulator from VCC to ground. Its
purpose is to protect the IC and power MOSFET gate
from excessive voltage that can occur during system
start-up. The guaranteed minimum operating voltage
after turn-on is 11 V.
A separate Drive Ground pin is provided and, with
proper implementation, will significantly reduce the
level of switching transient noise imposed on the control circuitry. This becomes particularly useful when
reducing the Ipk(max) clamp level. Figure 23 shows the
proper ground connections required for current sensing
power MOSFET applications.
Drive Output 2 Enable Pin
This input is used to enable Drive Output 2. Drive
Output 1 can be used to control circuitry that must run
continuously such as volatile memory and the system
clock, or a remote controlled receiver, while Drive Output 2 controls the high power circuitry that is occasionally turned off.
Reference
The 5.0 V bandgap reference is trimmed to ± 2.0%
tolerance at T J = 25°C. The reference has short circuit
protection and is capable of providing in excess of
30 mA for powering any additional control system
circuitry.
Drive Outputs and Drive Ground
Each channel contains a single totem-pole output
stage that is specifically designed for direct drive of
power MOSFET's. The Drive Outputs are capable of up
to ± 10 A peak current and have a typical rise and fall
times of 28 ns with a 1.0 nF load. Internal circuitry has
been added to keep the outputs in a sinking mode whenever an Undervoltage Lockout is active. This characteristic eliminates the need for an external pull-down resistor. Cross-conduction current in the totem-pole output
stage has been minimized for high speed operation, as
shown in Figure 13. The average added power due to
cross-conduction with VCC = 15 V is only 60 mW at
500 kHz.
Although the Drive Outputs were optimized for
MOSFETs, they can easily supply the negative base current required by bipolar NPN transistors for enhanced
turn-off (Figure 25). The outputs do not contain internal
current limiting, therefore an external series resistor
may be required to prevent the peak output current from
exceeding the ± 1.0 A maximum rating. The sink saturation (VoLl is less than 0.4 V at 100 mAo
FIGURE 17 -
External
Sync
Input
Design Considerations
Do not attempt to construct the converter on wirewrap or plug-in prototype boards. High frequency circuit layout techniques are imperative to prevent pulsewidth jitter. This is usually caused by excessive noise
pick-up imposed on the Current Sense or Voltage Feedback inputs. Noise immunity can be improved by lowering circuit impedances at these points. The printed
circuit layout should contain a ground plane with low
current signal and high current switch and output
grounds returning on separate paths back to the input
filter capacitor. Ceramic bypass capacitors (0.1 J.LF) connected directly to VCC and Vref may be required
depending upon circuit layout. This provides a low
impedance path for filtering the high frequency noise.
All high current loops should be kept as short as possible using heavy copper runs to minimize radiated EMI.
The Error Amp compensation circuitry and the converter output voltage-divider should be located close to
the IC and as far as possible.from the power switch and
other noise generating components.
FIGURE 18 - EXTERNAL DUTY CYCLE CLAMP AND
MULTI UNIT SYNCHRONIZATION
EXTERNAL CLOCK SYNCHRONIZATION
220 pF
n.....J
/....,t-t----='<>i'--t---~....,.'W"
.JlJL
The external diode clamp is required jf the negative Sync current
is greater than - 5.0 rnA.
Dmax Drive Output 1 = RA R! RS
MOTOROLA LINEAR/INTERFACE DEVICES
3-253
Dmax Drive Output 2 =
~
RA + RS
•
nnC34065, nnC33065
FIGURE 19 -
ADJUSTABLE REDUCTION OF CLAMP LEVEL
AGURE 20 -
SOFT-START CIRCUIT
Vee
•
RS
1.67
3 ( R,R2 )
VClam p ""-(R2
) + 0.33 X 10Rl+R2
-+ ,
t5oft-Start .., 2100 C in p.F
R,
FIGURE 21 -
Where: 0 '" VClamp '" 0.5 V
ADJUSTABLE REDUCTION OF CLAMP LEVEL
WITH SOFT-START
FIGURE 22 -
MOSFET PARASITIC OSCILLATIONS
Vee
RS
Where: 0 "" VClamp .. 0.5 V
.
1.67
VClamp""--
(~+
FIGURE 23 -
1)
Ipk(maX)""~
Series gate resistor Rg may be needed to damp high frequency
parasitic oscillations cliused by the MOSFET input capacitance
and any series wiring inductance in the gate-source circuit. Rg
. will decrease the MOSFET switching speed. Schottky diode 01
is required if circuit ringing drives the output pin below ground.
-(-')~
lSoft-Start - In
1 _ ~
C R, +R2
3VClamp
CURRENT SENSING POWER MOSFET
FIGURE 24 -
CURRENT WAVEFORM SPIKE SUPPRESSION
Vee
Power Ground:
To Input Source
Return
VPin 6 =
•
Control Circuitry Ground:
To Pin 8
RS
lf4W
~;;~:~~I~S
If: SENSEFET = MTP10Nl0M
RS ... 200
Then: VPin 6 = O.0751pk
The addition of the RC filter will eliminate instability caused
by the leading edge spike on the current waveform.
Virtually 10ssle88 current sensing can be achieved with the
implementation of a SENSEFET power switch. For proper oper-
ation during over current conditions. 8 reduction of the
r,k~r;;~xi1~lamp level must be implemented. Refer to Figures
MOTOROLA LINEAR/INTERFACE DEVICES
3-254
MC34065, MC33065
FIGURE 25 -
BIPOLAR TRANSISTOR DRIVE
FIGURE 26 -
ISOLATED MOSFET DRIVE
Vee
11K
The totem-pole outputs can furnish negative base current for
enhanced transistor turn-off, with the addition of capacitor C1.
FIGURE 27 -
I
pk
=~(~)
3RS
NS
DUAL CHARGE PUMP CONVERTER
VCC=15V
16
1-47
Output Load Regulation
101mA)
+Vo IV)
-Vo IV)
o
29.8
28.3
27.9
27.5
24.4
- 14.7
- 13.4
- 12.9
- 12.5
-9.5
1.0
5.0
10
50
The capacitor is equivalent series resistance must limit the Drive Output current to 1.0 A.
An additional series resistor may be required when using tantalum or other low ESR
capacitors. The positive output can provide excellent line and load regulation bV
connecting the R2/Rl resistor divider as shown.
MOTOROLA LINEAR/INTERFACE DEVICES
3-255
II
II
~
C')
W
~
0
G)
FIGURE 28 -
!J1
125 WATT OFF-LINE CONVERTER
~
10n Cold
C')
W
W
0
en
U'I
56 k
~
0
-I
+
'0 k
9.0 V/20D rnA
'0 ;;::;
0
9.0 V RTN
:JJ
0
r
»
'00 VI1.0 A
r
Z
m
't'
I\)
~
»
:JJ
--
~
Z
,~'~
1
' 0 '00 V RTN
~ '2 V/1.0 A
MURll0
-I
m
:JJ
;x::::::
"T1
»
n
+.0 ±
2.4 k
'2 V RTN
~-'2VI1.0A
m
0
m
<
n
m
en
Primary: 156 Turns, #34
Primary: 56 Turns, #23 AWG
(2 strands) Bifiliar Wound
Secondary ::t: 12 V: 4 Turns.
#23 AWG (4 strandsl
AWG
Quadfiliar Wound
T1 - 468 ,u.H per section at 2.5 A,
Coilcraft E3496A.
*
T2 1.0 k
Primary Feedback: 19 Turns,
10 k
-_
-:;:-8
-
t£l1
9
-
-
-
P
_J "1'470 F
#34AWG
0.'
Secondary: 17 Turns, #28
AWG
Core: TDK H7C1EE22-Z
Bobbin: BE22-6H
Gap: =0.001" for a primary
inductance of 6.8 mH
T3 -
Secondary 100 V: 32 Turns,
#23 AWG (2 strandsl Bifiliar
Wound
Core: Ferroxcube EEC 4O-3C8
Bobbin: Ferroxcube
4O-1112CP
Gap: =0.030" for a primary
inductance of 212 JLH
L1, L3, L4-25"H at 1.0 A,
Coilcraft Z7157.
L2 -1 a JLH at 3.0 A, Coilcraft
PCV-0-010-03.
MC34065, MC33065
PIN FUNCTION DESCRIPTION
Pin #
Description
Function
1
Sync Input
A narrow rectangular waveform applied to this input will synchronize the Oscillator. A de voltage
2
eT
Timing capacitor CT connects from this pin to ground setting the free-running Oscillator fre-
3
RT
Resistor RT connects from this pin to ground precisely setting the charge current for CT. RT
must be between 4.0 k and 16 k.
4
Voltage Feedback 1
This pin is the inverting input of Error Amplifier 1. It is normally connected to the switching
within the range of 2.4 V to 5.5 V will inhibit the Oscillator.
quency range.
power supply output through a resistor divider.
5
Compensation 1
This pin is the output of Error Amplifier 1 and is made available for loop compensation.
6
Current Sense 1
A voltage proportional to the inductor current is connected to this input. PWM 1 uses this
7
Drive Output 1
This pin directly drives the gate of a power MOSFET Ql. Peak currents up to 1.0 A are sourced
and sinked by this pin.
information to terminate conduction of output switch 01.
8
Gnd
This pin is the control circuitry ground return and is connected back to the source ground.
S
Drive Gnd
This pin is a separate power ground return that is connected back to the power source. It is
10
Drive Output 2
This pin directly drives the gate of a power MOSFET Q2. Peak currents up to 1.0 A are sourced
and sinked by this pin.
11
Current Sense 2
A voltage proportional to inductor current is connected to this input. PWM 2 uses this information
to terminate conduction of output switch Q2.
12
Compensation 2
This pin is the output of Error Amplifier 2 and is made available for loop compensation.
13
Voltage Feedback 2
This pin in the inverting input of Error Amplifier 2. It is normally connected to the switching
14
Drive Output 2 Enable
A logic low at this input disables Drive Output 2.
15
Vref
This is the 5.0 V reference output. It can provide bias for any additional system circuitry.
16
Vee
This pin is the positive supply of the control Ie. The minimum operating voltage range after
start-up is 11 V to 15.5 V.
used to reduce the effects of switching transient noise on the control circui~ry.
power supply output through a resistor divider.
MOTOROLA LINEAR/INTERFACE DEVICES
II
II
®
MC34129
MC33129
MOTOROLA
Advance Information
HIGH PERFORMANCE
CURRENT MODE CONTROLLER
HIGH PERFORMANCE CURRENT MODE CONTROLLER
The MC34129 series are high performance current mode switching regulators specifically designed for use in low power digital
telephone applications. These integrated circuits feature a unique
internal fault timer that provides automatic restart for overload
recovery. For enhanced system efficiency, a starVrun comparator
is included to implement bootstrapped operation of VCC. Other
functions contained are a temperature compensated reference,
reference amplifier, fully accessible error amplifier, sawtooth oscillator with sync input, pulse width modulator comparator, and
a high current totem pole driver ideally suited for driving a power
MOSFET.
Also included are protective features consisting of soft-start,
undervoltage lockout, cycle-by-cycle current limiting, adjustable
dead time, and a latch for single pulse metering.
Although these devices are primarily intended for use in digital
telephone systems, they can be used cost effectively in many
other applications.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
...
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
DSUFFIX
PLASTIC PACKAGE
CASE 751A·02
50·14
• Current Mode Operation to 300 kHz
• Automatic Feed Forward Compensation
• Latching PWM for Cycle-By-Cycle Current Limiting
• Continuous Retry after Fault Timeout
• Soft-Start with Maximum Peak Switch Current Clamp
• Internally Trimmed 2% Bandgap Reference
• High Current Totem Pole Driver
• Input Undervoltage Lockout
PIN CONNECTIONS
• Low Start-Up and Operating Current
• Direct Interface with Motorola SENSEFET Products
Drive Output 1
13 Start/Run Output
Drive Ground 2
SIMPLIFIED BLOCK DIAGRAM
Ramp Input 3
IStartlRun,Output
svnC/II~~~! 4
11 Feedback!
PWM Input
10 Error Amp
Inverting Input
RTICT 5
9 Error Amp
Non-Inverting Input
8 Vref1.25V
Gnd,
'------'
(Top Viewl
7
Vref 2.5 V 0-''-----<
Non-Inverting
Input
Inverting
Input
ORDERING INFORMATION
'---:..:0 Feedback!
PWM Input
Drive Out
Device
MC34129D
Drive Gnd
Sync/Inhibit 0-4:......._ _---'
Input
L..._ _ _ _ _ __"<> Ramp Input
MC34129P
o to
o to
+70'C
+7O'C
Package
SO-14 Plastic DIP
Plastic DIP
MC33129D
-40 to +8S'C
SO-14 Plastic DIP
MC33129P
-40 to +8S'C
Plastic DIP
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-258
Temperature
Range
MC34129, MC33129
MAXIMUM RATING
Rating
Symbol
Value
Unit
IZ(VCC)
50
mA
IZ(StartJRun)
50
mA
VCC Zener Current
StartJRun Output Zener Current
-
Analog Inputs (Pins 3, 5, 9, 10, 11, 12)
-0.3 to 5.5
V
V
Sync Input Voltage
Vsvnc
-0.3 to VCC
Drive Output Current, Source or Sink
IDRV
1.0
A
Current, Reference Outputs (Pins 6, B)
Iref
20
mA
PD
ROJA
552
145
mW
°CIW
PD
ROJA
BOO
100
mW
°CIW
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature
MC34129
MC33129
TA
Power Dissipation and Thermal Characteristics
D Suffix Package SO-14 Case 751A·02
Maximum Power Dissipation (aj TA = 70°C
Thermal Resistance Junction to Air
P Suffix Package Case 646-06
Maximum Power Dissipation (aj TA = 70°C
Thermal Resistance Junction to Air
II
°C
o to
+ 70
-40 to +B5
Storage Temperature Range
-65 to + 150
TstQ
ELECTRICAL CHARACTERISTICS (VCC
=
10 V, TA
=
°C
25°e (Note II unless otherwise noted)
I
Characteristic
Symbol
I
Min
I
Typ
Max
1.250
2.500
1.275
2.625
Unit
REFERENCE SECTIONS
Reference Output Voltage, TA = 25°C
1.25 V Ref., Il = 0 mA
2.50 V Ref., Il = 1.0 mA
Vre!
Reference Output Voltage, TA = Tlow to Thigh
1.25 V Ref., Il = 0 mA
2.50 V Ref., Il = 1.0 mA
Vref
V
1.225
2.375
V
-
1.200
2.250
line Regulation (Vce = 4.0 V to 12 V)
1.25 V Ref., Il = 0 mA
2.50 V Ref., Il = 1.0 mA
Regline
load Regulation
1.25 V Ref., Il = -10to+500/-,A
2.50 V Ref., Il = -0.1 to +1.0 mA
Regload
-
1.300
2.750
-
2.0
10
12
50
-
-
1.0
3.0
12
25
-
1.5
-
mV
mV
ERROR AMPLIFIER
Input Offset Voltage (Vin = 1.25 V)
TA = 25°C
TA = Tlow to ThiQh
VIO
Input Offset Current (Vin = 1.25 V)
110
Input Bias Current (Vin = 1.25 V)
TA = 25°C
TA = Tlow to Thigh
liB
-
-
-
10
-
-
25
-
200
0.5 to 5.5
750
-
kHz
85
80
-
/-,A
1.96
0.1
2.25
0.15
-
AVOl
65
87
Gain Bandwidth Product (Va = 1.25 V, f = 100 kHz)
GBW
500
Power Supply Rejection Ratio (VCC = 5.0 to 10 V)
PSRR
65
ISource
40
VOH
VOL
1.75
I)"e for MC34t29
=
-40"<: for MC33129
V
dB
V
Output Voltage Swing
High State (lSource = O~)
low State (lSink = 500~)
=
nA
dB
VICR
Open-loop Voltage Gain (Va = 1.25 V)
Note I. Tlow
-
nA
-
Input Common-Mode Voltage Range
Output Source Current (Va = 1.5 V)
mV
10
Thigh
= + 70°C for
-
MC34129
+ 85°C for MC33129
MOTOROLA LINEAR/INTERFACE DEVICES
3-259
II
MC34129, MC33129
ELECTRICAL CHARACTERISTICS (VCC ~ 10 V, TA ~ 25°C [Note 11 unless otherwise noted I
I
Characteristic
Symbol
I
Min
I
Typ
Max
Unit
PWM COMPARATOR
Input Offset Voltage (Vin ~ 1.25 VI
150
275
400
mV
-120
-250
I'A
tPLH(lN/DRVI
-
Ichg
0.75
1.2
1.50
I'A
VIO
-
15
40
mV
VOL
-
0.15
0.225
V
tDLY
200
400
600
I's
-
mV
VIO
Input Bias Current
liB
Propagation Delay, Ramp Input to Drive Output
250
-
ns
SOFT-START
Capacitor Charge Current (Pin 12 ~ 0 VI
Buffer Input Offset Voltage (Vin
~
1.25 VI
Buffer Output Voltage (ISink ~ 1OOl'AI
FAULT TIMER
Restart Delay Time
START/RUN COMPARATOR
Threshold Voltage (Pin 121
Vth
-
2.0
Threshold Hysteresis Voltage (Pin 121
VH
-
350
VOL
9.0
10
10.3
V
-
0.4
2.0
I'A
(VCC + 7.61
-
V
Output Voltage (lSink ~ 500 I'AI
Output Off-State Leakage Current (VOH ~ 15 VI
IS/R(leakl
Output Zener Voltage (lz ~ 10 mAl
Vz
V
OSCILLATOR
Frequency (RT
~
25.5 kO, CT
~
390 pFI
Capacitor CT Discharge Current (Pin 5
~
1.2 VI
fOSC
80
100
120
kHz
Idischq
240
350
460
I'A
40
15
125
35
32
50
Sync Input Current
High State (Vin ~ 2.0 VI
Low State (Vin ~ 0.8 VI
IIH
IlL
Sync Input Resistance
Rin
I'A
12.5
kll
--~
DRIVE OUTPUT
Output Voltage
High State (ISource ~ 200 mAl
Low State (lSink ~ 200 mAl
V
Low State Holding Current
Output Voltage Rise Time (CL
Output Voltage Fall Time (CL
~
~
500 pFI
500 pFI
Output Pull-Down Resistance
8.9
1.4
1.8
IH
-
225
-
I'A
tr
-
100
-
ns
tf
-
30
-
ns
100
225
350
kfl
RpD
8.3
UNDERVOLTAGE LOCKOUT
Start-Up Threshold
Hysteresis
TOTAL DEVICE
Power Supply Current
RT ~ 25.5 kll, CT ~ 390 pF, CL
~
500 pF
Power Supply Zener Voltage (IZ ~ 10 mAl
Note 1. Tlow
--0
-
aoc for MC34129
_. 40°C for MC33129
+ 85"C for MC33129
MOTOROLA LINEAR/INTERFACE DEVICES
3-260
-
-
VOH
VOL
MC34129, MC33129
AGURE 1 -
11MING RESISTOR versus OSCILLATOR
FREQUENCY
FIGURE 2 - OUTPUT DEAD-11ME versus
OSCILLATOR FREQUENCY
1.0M
100Ir
=
10V=
25°C
VCC
TA
500K
......
'"
K'
I'...
i"-...
CT
'"
"C
K
......
----r-c
~
o
50
50 nF
~
o
~~J=t~l
Tf=
/
20
>-
......
~
f--l+
/
/
/
./
5°~F2~0Fl00
pF
pF
P'l'
IA"
q=
/
1
-I i . /
./
>-
z
K
I'...
20K
10
AGURE 3 -
~
'"
"
f-1.0 n
500 Pfr-2OO
20
50
100
fose, OSCILLATOR FREOUENCY IkHzl
t;
~
0°
Pf'OO~~-+200
........
~
~
V
2,0
500
Vee ~ 10 V_
RT ~ 25.5k
CT ~ 39{) pF-
8.0
4.0
L
V
OSCILLATOR FREQUENCY CHANGE
versus TEMPERATURE
;z
1.
u
5.0
~
r r
CTlm~ r- 2jOn
10 K
5.0
~
"-
180
10M
II
..
MC34129, MC33129
FIGURE 8 -
RGURE 7 - ERROR AMP OPEN·LOOP DC GAIN
versus LOAD RESISTANCE
1. 0
90
~
z
;;: 80
V
'"w
'"a~
>
~
it'
a
v
w
~
~
PinsSto 9. 6to 10
Pins 2. 5. 7 to Gnd .
25°C
~
a
~
w
~
60
80
~ o.2
J oV
~
100
1.0
~
w
'"~
«
0
>
;z
0
FIGURE 10 3.2
I
~
«
~
~
0
tj
>::>
V)
I
>-
J
~
V
0.2
0.8
100
200
300
ISink. OUTPUT SINK CURRENT I/LAI
400
o
500
~
w
""'- ...........
"\. ..;::::--
~
/
4.0
8.0
VCC. SUPPLY VOLTAGE IVI
......
'" -4.0
::i'
is
~ :::,...
TA
o
~
w
10V
.........
-8.0
-12
~
VCC
Vref 1.25 V. RL ~ '"
-~"C\ -
"':::...~Joc- -
~
~
~
1\
\
\
2.0
4.0
6.0
8.0
Iref. REFERENCE OUTPUT SOURCE CURRENT ImAI
\
~
5
:=::>
\
\
-12
TA
........
~
-4O"C
VCC
10 V
"\.
\
1\
\
I- 25"C\- 85"C\ e--
\
~
-16
u
~
\
~ -8.0
1
-S5°C
o
16
12
FIGURE 12 - 2.5 V REFERENCE OUTPUT VOLTAGE
CHANGE versus SOURCE CURRENT
FIGURE 11-1.25 V REFERENCE OUTPUT VOLTAGE
CHANGE versus SOURCE CURRENT
;z
~
f.
(/
>
o
lj - 4.0
~
1.6
~
o
25°C
/
/
>-
~
~
~
Vref 2.5 V. RL - 2.5 k
2.4
0
!;;( 0.4
0
TA
>
0.6
::>
::>
8.0
REFERENCE OUTPUT VOLTAGE versus
SUPPLY VOLTAGE
~
Pins Sto 9
Pins 2. 5. 7. 10. 12 to Gnd
TA ~ 25°C
O.S
V
2.0
4.0
6.0
ISink. OUTPUT SINK CURRENT (mAl
SOFT·START BUFFER OUTPUT SATURATION
versus SINK CURRENT
VCCI~ lOJ
./
--
0, 4
RL. OUTPUT LOAD RESISTANCE Iklll
FIGURE 9 -
/
1/
o
TAI~ 25°~
I
~TA ~
~
VCC ~ 10 V
Vo ~ 1.25V RL to 1.25 Vref_
o
~
::>
~
50
O.S
~
~ O.6
I
60
~vcci ~ 10 v'
~
/
I
70
a"-
ERROR AMP OUTPUT SATURAllON
versus SINK CURRENT
z
,
10
~
\
\
\
~ -20
j-24 0
-
::>
~
o
12
25
50
75
TA, AMBIENT TEMPERATURE I CI
100
Ft
125
Vcc
r--
~
-
'"
~> -2.0
Source Saturation
(Lold to Gratndl
z
o
~ -3.0
~
3.0
~_
2.0
::>
o
~
>'
1.0
o
a
-
!----
I __
-+--
.........
r--
FIGURE 17 10
800
1.0 JLs!DIV
SUPPLY CURRENT versus SUPPLY VOLTAGE
R~ ~
1
255 k
CT ~ 390 pF
8.0 r---TA - 25'C
r---
.E.
>-
z
~
~
6.0
3
~
~
~
4.0
CL
2.0
JJ
500 pF
-,;
CL
/
15pF
o
o
4.0
8.0
12
Vee, SUPPLY VOLTAGE (VI
MOTOROLA LINEAR/II\lTERFACE DEVICES
3-263
.........
""-
16
"
"'" '\. "'"'\.
'\
I
DRIVE OUTPUT WAVEFORM
.......
2.625 V
i'--.
r--..
75
25
50
TA, AMBIENT TEMPERATURE I CI
FIGURE 16 -
600
~
r----..
10 V
2.5k
RL
25 e
*Vref at TA
f".
Gnd
200
400
10, OUTPUT LOAD CURRENT (mAl
""
..~ Vcc
vcc l1OV 25"C TA
-
Sink Saturation
(Load to Vcci
'"
I
- - - ..
25
FIGURE 15 - DRIVE OUTPUT SATURATION
versus LOAD CURRENT
0
:;;
:;; -1.0
/
I
~
V
25'C
I
2.500 V ,------'Vref
/'"
/
7
~
~
/ ...........
,/'
j/
,9
S;
'Vref
~
I
0
"" '."'-" "'-""
a
-25
...........
x
I
.~ 2.375
............
~ ...........
/'
'V re! at TA
2.5 V REFERENCE OUTPUT VOLTAGE
versus TEMPERATURE
.......-·Vref ~ 1.175V
/---
"-
II
u
j
/
FIGURE 14 -
100
\
\
125
11
..
MC34129, MC33129
PIN FUNCTION DESCRIPTION
Pin No.
Function
Description
1
Drive Output
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced and sinked by this pin .
2
Drive G rou nd
This pin is a separate power ground return that is connected back
to the power source. It is used to reduce the effects of switching
transient noise on the control circuitry.
3
Ramp Input
A voltage proportional to the inductor current is connected to this
input. The PWM uses this information to terminate output switch
conduction.
4
Sync/Inhibit Input
A rectangular waveform applied to this input will synchronize the
Oscillator and limit the maximum Drive Output duty cycle. A dc
voltage within the range of 2.0 V to VCC will inhibit the controller.
5
RT/CT
The free-running Oscillator frequency and maximum Drive Output
duty cycle are programmed by connecting resistor RT to Vref 2.5 V
and capacitor CT to Ground. Operation to 300 kHz is possible.
6
Vref 2.50 V
This output is derived from Vref 1.25 V. It provides charging current
for capacitor CT through resistor RT.
7
Ground
This pin is the control circuitry ground return and is connected
back to the source ground.
S
Vref 1.25 V
This output furnishes a voltage reference for the Error Amplifier
Non-Inverting Input.
9
Error Amp Non-Inverting Input
This is the non-inverting input of the Error Amplifier. It is normally
connected to the 1.25 V reference.
10
Error Amp Inverting Input
This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor
divider.
11
FeedbacklPWM Input
This pin is available for loop compensation. It is connected to the
Error Amplifier and Soft-Start Buffer outputs, and the Pulse Width
Modulator input.
12
CSoft-Start
A capacitor CSoft-Start is connected from this pin to Ground for a
controlled ramp-up of peak inductor current during start-up.
13
Start/Run Output
This output controls the state of an external bootstrap transistor.
During the start mode, operating bias is supplied by the transistor
from Yin. In the run mode, the transistor is switched off and bias is
supplied by an auxiliary power transformer winding.
14
VCC
This pin is the positive supply of the control IC. The controller is
functional over a minimum VCC range of 4.2 V to 12 V.
MOTOROLA LINEAR/INTERFACE DEVICES
3-264
MC34129, MC33129
OPERATING DESCRIPTION
The MC34129 series are high performance current
mode switching regulator controllers specifically designed for use in low power telecommunication applications. Implementation will allow remote digital telephones and terminals to shed their power cords and
derive operating power directly from the twisted pair
used for data transmission. Although these devices are
primarily intended for use in digital telephone systems,
they can be used cost effectively in a wide range of
converter applications. A representative block diagram
is shown in Figure 18.
lowest state. This occurs at the beginning of the softstart interval or when the power supply is operating
and the load is removed. The peak inductor current under normal operating conditions is controlled by the
voltage at Pin 11 where:
I
_ V(Pin 11) - 0.275 V
RS
pk Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing
is lost. Under these conditions, the voltage at Pin 11
will be internally clamped to 1.95 V by the output of the
Soft-Start Buffer. Therefore the maximum peak switch
current is:
OSCILLATOR
The oscillator frequency is programmed by the values
selected for the timing components RT and CT. Capacitor CT is charged from the 2.5 V reference through
resistor RT to approximately 1.25 V and discharged by
an internal current sink to ground. During the discharge
of CT, the oscillator generates an internal blanking pulse
that holds the lower input of the NOR gate high. This
causes the Drive Output to be in a low state, thus producing a controlled amount of output deadtime. Figure
1 shows Oscillator Frequency versus RT and Figure 2,
Output Deadtime versus Frequency, both for given values of CT. Note that many values of RT and CT will give
the same oscillator frequency but only one combination
will yield a specific output deadtime at a given frequency. In many noise sensitive applications it may be
desirable to frequency-lock one or more switching regulators to an external system clock. This can be accomplished by applying the clock signal to the Sync!lnhibit
Input. For reliable locking, the free-running oscillator
frequency should be about 10% less than the clock frequency. Referring to the timing diagram shown in Figure 19, the rising edge of the clock signal applied to the
Sync/Inhibit Input, terminates charging of CT and Drive
Output conduction. By tailoring the clock waveform, accurate duty cycle clamping of the Drive Output can be
achieved. A circuit method is shown in Figure 20. The
Sync/Inhibit Input may also be used as a means for
system shutdown by applying a dc voltage that is within
the range of 2.0 V to VCC.
I
_ 1.95 V - 0.275
pk(max) RS
=
1.675 V
AS
When designing a high power switching regulator it
becomes desirable to reduce the internal clamp voltage
in order to keep the power dissipation of RS to a reasonable level. A simple method which adjusts this voltage in discrete increments is shown in Figure 22. This
method is possible because the Ramp Input bias current
is always negative (typically - 120 }LA). A positive temperature coefficient equal to that of the diode string will
be exhibited by Ipk(max)' An adjustable method that is
more precise and temperature stable is shown in Figure
23. Erratic operation due to noise pickup can result if
there is an excessive reduction of the clamp voltage. In
this situation, high frequency circuit layout techniques
are imperative.
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the
power supply to exhibit an instability when the output
is lightly loaded. This spike is due to the power transformer interwinding capacitance and output rectifier recovery time. The addition of an RC filter on the Ramp
Input with a time constant that approximates the spike
duration will usually eliminate the instability; refer to
Figure 25.
ERROR AMP AND SOFT-START BUFFER
A fully-compensated Error Amplifier with access to
both inputs and output is provided for maximum design
flexibility. The Error Amplifier output is common with
that of the Soft-Start Buffer. These outputs are opencollector (sink only) and are ORed together at the inverting input of the PWM Comparator. With this configuration, the amplifier that demands lower peak inductor
current dominates control of the loop. Soft-start is mandatory for stable start-up when power is provided
through a high source impedance such as the long
twisted pair used in telecommunications. It effectively
removes the load from the output of the switching
power supply upon initial start-up. The Soft-Start Buffer
is configured as a unity gain follower with the noninverting input connected to Pin 12. An internal 1.0 }LA
PWM COMPARATOR AND LATCH
The MC34129 operates as a current mode controller
whereby output switch conduction is initiated by the
oscillator and terminated when the peak inductor current reaches a threshold level established by the output
of the Error Amp or Soft-Start Buffer (Pin 11). Thus the
error signal controls the peak inductor current on a
cycle-by-cycle basis. The PWM Comparator-Latch configuration used, ensures that only a single pulse appears
at the Drive Output during any given oscillator cycle.
The inductor current is converted to a voltage by inserting the ground-referenced resistor RS in series with
the source of output switch 01. The Ramp Input adds
an offset of 275 mV to this voltage to guarantee that no
pulses appear at the Drive Output when Pin 11 is at its
MOTOROLA LINEAR/INTERFACE DEVICES
3-265
•
•
MC34129, MC33129
FIGURE 18 - REPRESENTATIVE BLOCK DIAGRAM
r-----------------------------------------------------------,Sta~Aun
Vin = 20 V
Output
Vee
12
CSoft-Start
9
Non-Inverting
..-;::f-----1f-O Input
2.5 V Reference
1.25 V
10 Inverting
f----f-O Input
=-;:-;;,-,--0-+-------,=:---+-0 FeedbacklPWM
11 Input
Buffer
Latch
A
Drive Output
art---------4
Oscillator
I--~.,S
-=
Ramp Input
32 k
Sync/Inhibit Input
Drive
Gnd
AS
~
_ Sink Only
---{;.7" -
Positive True Logic
FIGURE 19 - TIMING DIAGRAM
Sync/Inhibit Input
~
Capacitor CT
u----L
latch
"Set" Input
Ramp Input ......
Latch
"Reset" Input
Drive Output
Sta~Aun
~~
J"------'"------'L---L~L--------''_____Ln
l
_IL
/ L_ _- '
'L I - -
20 V.... - - - - - - - - - - - - - ,
Output
-I',
L _______________
14.3 V""
MOTOROLA LINEAR/INTERFACE DEVICES
3-266
J
MC34129, MC33129
OPERATING DESCRIPTION (continued)
The output off-state is clamped to VCC + 7.6 V by the
internal zener and PNP transistor base-emitter junction.
current source charges the soft-start capacitor (CSoftStart) to an internally clamped level of 1.95 V. The rate
of change of peak inductor current, during start-up, is
programmed by the capacitor value selected. Either the
Fault Timer or the Undervoltage Lockout can discharge
the soft-start capacitor.
DRIVE OUTPUT AND DRIVE GROUND
The MC34129 contains a single totem-pole output
stage that was specifically designed for direct drive of
power MOSFETs. It is capable of up to :±: 1.0 A peak
drive current and has a typical fall time of 30 ns with a
500 pF load. The totem-pole stage consists of an NPN
transistor for turn-on drive and a high speed SCR for
turn-off. The SCR design requires less average supply
current (ICC) when compared to conventional switching
control IC's that use an all NPN totem-pole. The SCR
accomplishes this during turn-off of the MOSFET, by
utilizing the gate charge as regenerative on-bias.
whereas the conventional all transistor design requires
continuous base current. Conversion efficiency in low
power applications is greatly enhanced with this reduction of ICC. The SCR's low-state holding current (IH)
is typically 225 p.A. An internal 225 k!l pull-down resistor
is included to shunt the Drive Output off-state leakage
to ground when the Undervoltage Lockout is active. A
separate Drive Ground is provided to reduce the effects
of switching transient noise imposed on the Ramp Input. This feature becomes particularly useful when the
Ipk(max) clamp level is reduced. Figure 24 shows the
proper implementation of the MC34129 with a current
sensing power MOSFET.
FAULT TIMER
This unique circuit prevents sustained operation in a
lockout condition. This can occur with conventional
switching control IC's when operating from a power
source with a high series impedance. If the power required by the load is greater than that available from
the source, the input voltage will collapse, causing the
lockout condition. The Fault Timer provides automatic
recovery when this condition is detected. Under normal
operating conditions, the output of the PWM Comparator will reset the Latch and discharge the internal Fault
Timer capacitor on a cycle-by-cycle basis. Under operating conditions where the required power into the
load is greater than that available from the source (Vin),
the Ramp Input voltage (plus offset) will not reach the
comparator threshold level (Pin 11), and the output of
the PWM Comparator will remain low. If this condition
persists for more than 600 p.s, the Fault Timer will activate, discharging CSoft-Start and initiating a soft-start
cycle. The power supply will operate in a skip cycle or
hiccup mode until either the load power or source
impedance is reduced. The minimum fault timeout is
200 p.s, which limits the useful switching frequency to
a minimum of 5.0 kHz.
UNDERVOLTAGE LOCKOUT
The Undervoltage Lockout comparator holds the
Drive Output and CSoft-Start pins in the low state when
VCC is less than 3.6 V. This ensures that the MC34129
is fully functional before the output stage is enabled
and a soft-start cycle begins. A built-in hysteresis of 350
mV prevents erratic output behavior as Vce crosses the
comparator threshold voltage. A 14.3 V zener is connected as a shunt regulator from VCC to ground. Its
purpose is to protect the MOSFET gate from excessive
drive voltage during system start-up. An external 9.1 V
zener is required when driving low threshold MOSFETs.
Refer to Figure 21. The minimum operating voltage
range of the IC is 4.2 V to 12 V.
STARTIRUN COMPARATOR
A bootstrap start-up circuit is included to improve
system efficiency when operating from a high input
voltage. The output of the Start/Run Comparator controls the state of an external transistor. A typical application is shown in Figure 21. While CSoft-Start is charging, start-up bias is supplied to VCC (Pin 14) from Yin
through transistor 02. When CSoft-Start reaches the
1.95 V clamp level, the Start-Run output switches low
(VCC - 50 mV), turning off 02. Operating bias is now
derived from the auxiliary bootstrap winding of the
transformer, and all drive power is efficiently converted
down from Yin. The start time must be long enough for
the power supply output to reach regulation. This will
ensure that there is sufficient bias voltage at the auxiliary bootstrap winding for sustained operation.
tStart
1.95 V CSoft-Start
1.0 p.A
REFERENCES
The 1.25 V bandgap reference is trimmed to :±: 2.0%
tolerance at TA = 25°C. It is intended to be used in
conjunction with the Error Amp. The 2.50 V reference
is derived from the 1.25 V reference by an internal op
amp with a fixed gain of 2.0. It has an output tolerance
of :±: 5.0% at TA = 25°C and its primary purpose is to
supply charging current to the oscillator timing
capacitor.
1.95 CSoft-Start in p.F
The Start/Run Comparator has 350 mV of hysteresis.
MOTOROLA LINEAR/INTERFACE DEVICES
3-267
II
•
ftnC34129,ftnC33129
FIGURE 20 - EXTERNAL DUTY CYCLE CLAMP
AND MULn UNIT SYNCHRONIZATION
FIGURE 21 -
BOOTSTRAP START-UP
J Vin
5.0 V
To Additional
MC34129's
f = _ _'_.44
__
IRA + 2RBIC
FIGURE 22 -
D
-~
max -
RA
The external 9.1 V zener is required when driving low threaholdlMOSFETs.
+ 2RB
DISCRETE STEP REDUcnON OF CLAMP LEVEL
FIGURE 23 -
ADJUSTABLE REDUcnDN OF CLAMP LEVEL
RS
~ -0.275
I
_ 1.675 - IVFIDlI + VFID211
pklmax) RS
If:
RGURE 24 -
CURRENT SENSING POWER MOSFET
VR
R~·2: ~2
;;;. 1.0 mA
RGURE 2S -
Then: 'pk(max) "'"
(~
+
1)
RS
CURRENT WAVEFORM SPIKE SUPPRESSION
"'" RS· 10k. rpS(gol
S
rOM (on) + RS
If: SENSEFET = MTP10N10M
RS "" 200
Then: VRs = 0.075 Ipk
Power Ground:
To Input Source
Return
RS
1/4W
Control Circuitry Ground:
To Pin 1
The addition of the RC filter will eliminate instability caused by the
leading edge spike on the current waveform.
_'---+--'
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch.
MOTOROLA LINEAR/INTERFACE DEVICES
3-268
MC34129, MC33129
AGURE 26 -
MOSFET PARASITIC OSCILLATIONS
FIGURE 27 -
BIPOLAR TRANSISTOR DRIVE
18
Vin
'~k=
o
.
II
t
Base Charge
Removal
RS
The totem-pole output can furnish negative base current for enhanced
transistor turn-off, with the addition of capacitor C1 ..
FIGURE 28 -
NON-ISOLATED 725 mW FLYBACK REGULATOR
Vin '" 20Vto48V
lN5819
t---.t--1-o
5 VI125 rnA
0.1
Gnd
'--!4-.....-;:__<>Vin ~
T1: Primary'" 35T #32 AWG
Feedback = , 2T #32 AWG
Secondary :t 5 V = 7T #32 AWG
Gap = 0.004" for lp of t80
100i
20 Vto 48 V
~H
Core = Ferroxcube 813E187-3C8
Bobbin - Fertoxcube E187PCB'-8
180
II
lN5819
T1tilOO
:VI380m.
330
•
Gnd
100
20'
1N5819
- 5 Vi20 rnA
24'
MT'
128kHz
Sync
Conditions
Test
MQC5007
Results
~
Line Regulation 5 V
Yin
=
20 V to 40 V, lout 5 V
Load Regulation 5 V
Vin
=
30 V. lout 5 V
=
100 rnA to 380 rnA, lout -5 V
Output Ripple 5 V
Vin
=
30 V.l out 5 V
=
380 rnA. lout -5 V
=
20 rnA
150 mVp-p
Efficiency
Vin '" 30 V, lout 5 V
:=
380 rnA, lout -5 V
=
20 rnA
73%
=
380 rnA, lout - 5 V
=
&
20 rnA
=
1 mV
20 rnA
FIGURE 30 -ISOLATED 3.0 W FLYBACK REGULATOR WITH SECONDARY SIDE SENSING
L1
5 V/600 mA
51
0.1
39
12
100
4N26
..;-
0.1
3.9
Tl431A
2.2
15
k
k
Return
T1: Primary
= 22T #1814,WG
Secondary = 22T #18 AW!i
Lp = 5Op.H
Core = Ferroxcube 2616PA1QO-3C8
Bobbin = Ferroxcube 2616Fl0
Ll: Coilcraft Z7156, 15
Test
Conditions
line Regulation
Vin = 8 V to 12 V,lout 600 rnA
Results
.6. = 1 rnV
Load Regulation
Vin
a
12 V, lout
=
=
100 rnA to 600 rnA
Vin
=
=
12 V, lout
Output Ripple
600 rnA
20 mVp-p
Efficiency
Vin
=
12 V, lout
=
600 rnA
81%
An economical method of achieving secondary sensing is to combine the TL431A with a 4N26 optocoupler.
MOTOROLA LINEAR/INTERFACE DEVICES
3-270
~
8 mV
~H
®
MC34160
MC33160
MOTOROLA
Product Preview
MICROPROCESSOR
VOLTAGE REGULATORI
SUPERVISORY CIRCUIT
MICROPROCESSOR VOLTAGE REGULATOR
AND SUPERVISORY CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC34160 Series is a voltage regulator and supervisory circuit containing many of the necessary monitoring functions
required in microprocessor based systems. It is specifically
designed for appliance and industrial applications, offering the
designer a cost effective solution with minimal external components. These integrated circuits feature a 5.0 V/100 mA regulator
with short circuit current limiting, pinned out 2.6 V bandgap reference, low voltage reset comparator, power warning comparator
with programmable hysteresis, and an uncommitted comparator
ideally suited for microprocessor line synchronization.
Additional features include a chip disable input for low standby
current, and internal thermal shutdown for over temperature
protection.
These devices are contained in a 16 pin dual-in-line heat tab
plastic package for improved thermal conduction.
PSUFFIX
PLASTIC PACKAGE
CASE 648C·02
• 5.0 Volt Regulator Output Current in Excess of 100 mA
• Internal Short Circuit Current Limiting
• Pinned Out 2.6 V Reference
• Low Voltage Reset Comparator
• Power Warning Comparator with Programmable Hysteresis
PIN CONNECTIONS
• Uncommitted Comparator
• Low Standby Current
• Internal Thermal Shutdown Protection
Comparator
Inverting Input
• Heat Tab Power Package
Comparator
Nonlnverting Input
N.C.
REPRESENTATIVE BLOCK DIAGRAM
Vee
r - -:;:- - - - - - - - --,
Regulator Output
Comparator Output
Regulator Output
Hysteresis Adjust
Power Warning
Power Sense
(Top View)
.
10
Nonlnvertlng Input
Invert;ng
I
Inp~>+-!--+i--~~
. ".
I~omp.r.tor
ORDERING INFORMATION
Output
11!
I
L=------fi,- - -----'
Gnd
Device
Temperature
Range
O°C to +70°C
Plastic DIP
MC331 SOP
- 40°C to + 8.5°C
Plastic DIP
4,5, 12. 13
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-271
Package
MC341 SOP
II
..
MC34160, MC33160
MAXIMUM RATING
Symbol
Value
Unit
Power Supply Voltage
Rating
Vcc
40
V
Chip Disable Input Voltage (Pin 15, Note 1)
VCD
-0.3 to VCC
V
lin
-2.0 to +2.0
mA
Comparator Input Current (Pin 1, 2, 9)
Comparator Output Voltage (Pin 6, 7, S)
Vo
40
V
Comparator Output Sink Current (Pin 6, 7, 8)
ISink
10
mA
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ TA = 70°C
Thermal Resistance Junction to Air
Thermal Resistance Junction to Case (Pin 4, 5, 12, 13)
Po
ROJA
R9JC
1000
SO
15
°CIW
°CIW
Operating Junction Temperature
TJ
+150
Operating Ambient Temperature
MC34160
MC33160
TA
Storage Temperature Range
mW
°C
o to + 70
-40 to +S5
-65to +150
Tst!!
°C
°C
ELECTRICAL CHARACTERISTICS (VCC = 30 V, 10 = 10 mA, Iref = 100 p,A) For typical values TA = 25°C, for min/max values
TA is the operating ambient temperature range that applies [Notes 2 and 3] unless otherwise noted.
Characteristic
I
Symbol
I
Min
I
Typ
Max
I
Unit
REGULATOR SECTION
Vo
4.75
5.0
5.25
V
Line Regulation (VCC = 7.0 V to 40 V, TA = 25°C)
Regline
40
mV
Regload
-
5.0
Load Regulation (10 = 1.0 mA to 100 mA, TA = 25°C)
20
50
mV
RR
50
65
-
dB
Vref
2.47
2.6
Total Output Variation (VCC = 7.0 V to 40 V,
10 = 1.0 mA to 100 mA, TA = Tlow to Thigh)
Ripple Rejection
(VCC = 25 V to 35 V, 10 = 40 mA, f = 120 Hz, TA = 25°C)
REFERENCE SECTION
Total Output Variation (VCC = 7.0 V to 40 V,
10 = 0.1 mA to 2.0 mA, TA = Tlow to Thi!!h)
Line Regulation (VCC = 5.0 V to 40 V, TA = 25°C)
Regline
Load Regulation (10 = 0.1 mA to 2.0 mA, TA = 25°C)
Re9l0ad
-
2.73
V
2.0
20
mV
4.0
30
mV
(VO-O.ll)
(VO-0.1S)
0.07
(VO-0.05)
RESET COMPARATOR
Threshold Voltage
High State Output (Pin 11 Increasing)
Low State Output (Pin 11 Decreasing)
Hysteresis
VIH
VIL
VH
V
Output Sink Saturation (VCC = 4.5 V, ISink = 2.0 mAl
VOL
-
-
0.4
V
Output Off-State Leakage (VOH = 40 V)
10H
-
-
4.0
p,A
4.55
0.02
-
Notes:
1. The maximum voltage range is - 0.3 V to Vee or + 35 V, whichever is less.
2. Tlow = O°C for MC34160
Thigh = + 70'C for MC34160
= -40'C for MC33160
= + 85'C for MC33160
3. low duty cycle pulse testing techniques are used during test to maintain junction temperature as close to ambient as possible.
MOTOROLA LINEAR/INTERFACE DEVICES
3-272
I
MC34160, MC33160
ELECTRICAL CHARACTERISTICS - Continued (VCC = 30 V. 10 = 10 mAo Iref = 100/LA) For typical values TA = 25°C. for
minimax values TA is the operating ambient temperature range that applies [Notes 2 and 31 unless otherwise noted.
I
Characteristic
I
Symbol
I
Min
Typ
I
Max
Unit
POWER WARNING COMPARATOR
Input Offset Voltage
VIO
-
1.2
10
mV
Input Bias Current (VPin 9 = 3.0 V)
liB
-
-
0.5
!LA
Input Hysteresis Current (VPin 9 = Vref - 100 mV)
RPin 10 = 24 k
RPin 10 = 00
IH
40
4.5
50
7.5
60
11
/LA
0.13
0.4
V
4.0
/LA
Output Sink Saturation (lSink = 2.0 mAl
VOL
-
Output Off-State Leakage (VOH = 40 V)
10H
-
-
II
UNCOMMITTED COMPARATOR
-
-
20
mV
Input Hysteresis Voltage (Output Transition High to Low)
IH
140
200
260
mV
Input Bias Current (VPin 1.2 = 2.6 V)
lIB
-
-
-1.0
!LA
Input Common-Mode Voltage Range
VICR
0.6 to 5.0
-
Output Sink Saturation (lSink = 2.0 mAl
VOL
-
Output Off-State Leakage (VOH = 40 V)
10H
-
Chip Disable Threshold Voltage (Pin 15)
High State (Chip Disabled)
Low State (Chip Enabled)
VIH
VIL
2.5
Chip Disable Input Current (Pin 15)
High State (Vin = 2.5 V)
Low State (Vin = 0.8 V)
IIH
IlL
Chip Disable Input Resistance (Pin 15)
Rin
Operating Voltage Range
Vo (Pin 11) Regulated
Vref (Pin 16) Regulated
VCC
Power Supply Current
Standby (Chip Disable High State)
Operating (Chip Disable Low State)
ICC
Input Offset Voltage (Output Transition Low to High)
VIO
-
0.13
V
0.4
V
-
4.0
/LA
-
-
-
0.8
-
-
100
30
50
100
-
-
-
TOTAL DEVICE
FIGURE 1 -
w
'"«z
:t:
~-4.0
~
§;
~-8.0
"-1\
\
-
j- VCC=7.5V
-
::;)
~ 2.0
\
h
fA
o
TA i25°C- I - - -
IV
o
40
80
120
10. REGULATOR OUTPUT SOURCE CURRENT ImA)
x
. . . 1//
vI
\
TA = 125°C
l:l
$'-16
0.18
1.5
REFERENCE AND REGULATOR OUTPUT versus
SUPPLY VOLTAGE
I
t---
~
~-12
FIGURE 2 -
RL =
::;)
::;)
mA
-
-
-r--
k!1
V
7.0 to 40
5.0 to 40
6.0
t---
~
o
'"o
-
/LA
REGULATOR OUTPUT VOLTAGE CHANGE versus
SOURCE CURRENT
- --
:[
V
160
u
o
10
20
vcc. SUPPLY VOLTAGE IV)
MOTOROLA LINEAR/INTERFACE DEVICES
3-273
30
40
MC34160, MC33160
FIGURE 4 - POWER WARNING HYSTERESIS CURRENT
versus PROGRAMMING RESISTOR
RGURE 3 - REFERENCE OUTPUT VOLTAGE CHANGE versus
SOURCE CURRENT
--
-...r-.
•
60
r-
I
\
-...... r--....
6
VCC ~ 30V
VPin9 ~ 2.5V
TA ~ 25°C
\
\.
"
"'
_ycc ~ 7.5 V
4r-TA ~ 25°C
..........
r-
1
BOO
-----------~ ~O
200
-55
B.O
440
0
100
120
-55
125
I
_ VCC ~ 6.0 V
VPin 1 ~ Vref
~ 0.4 VPin 2,9 ~ 10 k!l to Gnd
z
a
r- Vsat ~ Pins 6, 7, B
!i(
'"
5
~
a=>
0.3
o.2
~o.1
-25
----
- ---
Output Rise _
0
25
50
75
TA, AMBIENT TEMPERATURE (OC)
/
_ _ f-""
~ :,..y
TA ~ B5°C..-::: t:::=-: ~ -r;~ -40°C
~:::-- I-'"
r--
ff
0
2.0
4.0
ISink, SINK CURRENT (rnA)
6.0
~
100
125
FIGURE 8 - THERMAL RESISTANCE AND MAXIMUM POWER
DISSIPATION versus P.C.B. COPPER LENGTH
...... V L
.....- .....- V
TA ~ 25°C
140
~~ r--
, .'
0.5
~
I
I
VCC ~ 30 V
-VPin 1 ~ 2.5 V to 2.9 V
_VPin2 ~ 2.6V
RL ~ 2.4ktoVO
Out~~
120
UNCOMMITTEO COMPARATOR DELAY versus
TEMPERATURE
- -
FIGURE 7 - COMPARATOR OUTPUT SATURATION versus
SINK CURRENT
gs
60
BO
100
RH, PROGRAMMING RESISTOR (kil)
~
o
25
50
75
TA, AMBIENT TEMPERATURE (OC)
-25
FIGURE 6 -
ou~~
I
40
20
POWER WARNING COMPARATOR OELAY versus
TEMPERATURE
Vcc
V
Yin (Pin 9) ~ 2.5 V to 2.7 V
RL ~ 2.4ktoVO
r-- t--
o
4.0
6.0
2.0
Iref' REFERENCE OUTPUT SOURCE CURRENT (rnA)
FIGURE 5 -
r--r---
B.O
L, LENGTH OF COPPER (mm)
MOTOROLA LINEAR/INTERFACE DEVICES
3-274
MC34160, MC33160
PIN FUNCTION DESCRIPTION
Pin No.
1
Description
Function
Comparator Inverting Input
This is the Uncommitted Comparator inverting input. It is typically
connected to a resistor divider to monitor a voltage.
2
Comparator Noninverting Input
This is the Uncommitted Comparator noninverting input. It is typically
connected to a reference voltage.
3
N.C.
4.5,12,13
Gnd
No connection. This pin is not internally connected.
These pins are the control circuit grounds and are connected to the
source and load ground returns. They are part of the IC lead frame
and can be used for heatsinking.
6
Comparator Output
This is the Uncommitted Comparator output. It is an open collector
sink·only output requiring a pull-up resistor.
7
Reset
This is the Reset Comparator output. It is an open collector sink-only
output requiring a pull-up resistor.
8
Power Warning
This is the Power Warning Comparator output. It is an open collector
sink-only output requiring a pull-up resistor.
9
Power Sense
This is the Power Warning Comparator noninverting input. It is
typically connected to a resistor divider to monitor the input power
source voltage.
10
Hysteresis Adjust
The Power Warning Comparator hysteresis is programmed by a
resistor connected from this pin to ground.
11
Regulator Output
This is the 5.0 V Regulator output.
14
VCC
This pin is the positive supply input of the control IC.
15
Chip Disable
This input is used to switch the IC into a standby mode turning off all
Vref
This is the 2.6 V Reference output. It is intended to be used in
outputs.
16
conjunction with the Power Warning and Uncommitted comparators.
OPERATING DESCRIPTION
The MC34160 Series is a monolithic voltage regulator
Regulator
The 5.0 V regulator is designed to source in excess
of 100 mA output current and is short circuit protected.
The output has a guaranteed tolerance of ± 5.0% over
line, load, and temperature. Internal thermal shutdown
circuitry is included to limit the maximum junction temperature to a safe level. When activated, typically at
170'C, the regulator output turns off.
In specific situations a combination of input and output bypass capacitors may be required for regulator
and supervisory circuit containing many of the necessary monitoring functions required in microprocessor
based systems. It is specifically designed for appliance
and industrial applications, offering the designer a cost
effective solution with minimal external components.
These devices are specified for operation over an input
voltage of 7.0 V to 40 V, and with a junction temperature
of -40'C to + 150'C. A typical microprocessor application is shown in Figure 9.
MOTOROLA LINEAR/INTERFACE DEVICES
3-275
II
•
MC34160, MC33160
produces hysteresis if Vin is monitored through a series
resistor (R1). The comparator thresholds are defined as
follows:
stability. If the regulator is located an appreciable distance (;;'4") from the supply filter, an input bypass capacitor (Cin) of 0.33 /LF or greater is suggested. Output
capacitance values of less than 5.0 nF may cause regulator instability at light load (,,;1.0 mAl and cold temperature. An output bypass capacitor of 0.1/LF or greater
is recommended to ensure stability under all load conditions. The capacitors selected must provide good high
frequency characteristics.
Good construction techniques should be used to minimize ground loops and lead resistance drops since the
regulator does not have external sense inputs.
Vth(lower) = V ref (1
+
~!)
-
liB R1
Vth(upper) = Vref (1
+
~!)
+
IH R1
The nominal hysteresis current IH equals 1.2 V/RH
(Figure 4).
The Uncommitted Comparator can be used to synchronize the microprocessor with the ac line signal for
timing functions, or for synchronous load switching. It
can also be connected as a line loss detector as shown
in Figure 10. The comparator contains 200 mV of hysteresis preventing erractic output behavior when crossing the input threshold.
The Power Warning and Uncommitted comparators
each have a transistor base-emitter connected across
their inputs. The base input normally connects to a voltage reference while the emitter input connects to the
voltage to be monitored. The. transistor limits the negative excursion on the emitter input to - 0.7 V below
the base input by supplying current from VCC. This
clamp current will prevent forward biasing the IC substrate. Zener diodes are connected to the comparator
inputs to enhance the IC's electrostatic discharge capability. Resistors R1 and Rin must limit the input current
to a maximum of ± 2.0 mAo
Each comparator output consists of an open collector
NPN transistor capable of sinking 2.0 mA with a saturation voltage less than 0.4 V, and standing off 40 V with
minimal leakage. Internal bias for the Reset and Power
Warning comparators is derived from either VCC or the
regulator output to ensure functionality when either is
below nominal.
Reference
The 2.6 V bandgap reference is short circuit protected
and has a guaranteed output tolerance of ± 5.0% over
line, load, and temperature. It is intended to be used in
conjunction with the Power Warning and Uncommitted
Comparator. The reference can source in excess of 2.0
mA and sink a maximum of 10 /LA. For additional current
sinking capability, an external load resistor to ground
must be used.
Reference biasing is internally derived from either
VCC or VO, allowing proper operation if either drops
below nominal.
Chip Disable
This input is used to switch the IC into a standby
mode. When activated, internal biasing for the entire
die is removed causing all outputs to turn off. This
reduces the power supply current (ICC) to less than 0.3
mA.
Comparators
Three separate comparators are incorporated for voltage monitoring. Their outputs can provide diagnostic
information to the microprocessor, preventing system
malfunctions.
The Reset comparator inverting input is internally
connected to the 2.6 V reference while the non inverting
input monitors VO. The Reset output is active low when
Vo falls approximately 180 mV below its regulated voltage. To prevent erratic operation when crossing the
comparator threshold, 70 mV of hysteresis is provided.
The Power Warning comparator is typically used to
detect an impending loss of system power. The inverting input is internally connected to the reference, fixing
the threshold at 2.6 V. The input power source Vin is
monitored by the noninverting input through the R1/R2
divider (Figure 9). This input features an adjustable 10
!LA to 50 /LA current sink IH that is programmed by the
value selected for resistor RH. A default current of 6.5
!LA is provided if RH is omitted. When the comparator
input falls below 2.6 V, the current sink is activated. This
Heat Tab Package
The MC34160 is contained in a 16 lead plastic dualin-line package in which the die is mounted on a special
Heat Tab copper alloy lead fri\me. This tab consists of
the four center ground pins that are specifically
designed to improve thermal conduction from the die
to the surrounding air. The pictorial in Figure 8 shows
a simple but effective method of utilizing the printed
circuit board medium as a heat dissipator by soldering
these tabs to an adequate area of copper foil. This permits the use of standard board layout and mounting
practices while having the ability to more than halve
the junction to air thermal resistance. The example and
graph are for a symmetrical layout on a single sided
board with one ounce per square foot copper.
MOTOROLA LINEAR/INTERFACE DEVICES
3-276
MC34160, MC33160
FIGURE 9 -
TYPICAL MICROPROCESSOR APPLICATION
~~------~--------~~~~--~Vo
D--I-<>-...+-+------o
MPU Reset
II
1----------+--=----4------+0---.--+----__0 V,ef
Chip Jl o----<>-t-~
Disable
15
'-"'=iF"--'
+-________---<>-\-__~-----------1r-------t<>-+-4-+----O
~
Power Warning
Line Sync.
,,~~~~~~~~----+----1:~~>-----------~6~--~--~~
__ J
~eJlI
~
~
FIGURE 10 -
Sink Only
=
Positive True Logic
LINE LOSS DETECTOR APPLICATION
v-l-<>-+-+----~ MPU Reset
1----------+--=----4------+0---.--+----__0 V,ef
Chip Jl o----<>-t-~
Disable
'-"'=iF"--'
RDLY
Uncommitted
Comparator
L~e)1
6
I
L---__
Point A
~ CDLY
~ 2.6 V
~
Pin6~2.6V
Pin8~
~
t
OLY=
=
Sink Only
Positive True Logic
R
C
in (
OLY OLY
Vref
MOTOROLA LINEAR/INTERFACE DEVICES
3·277
IH RDLY -- Vo
+ IH R1 -- Vo + IH ROLY
)
•
MC34160, MC33160
FIGURE 11 - TIME DELAYED MICROPROCESSOR RESET
---------.........,
+
~~------~--------~----~--~Vo
Chip
JL o---<>-t-~
1----~----*-----t<>-1>-t_.---o Vref
'-"'=,.='-'
Disable
RDLY
Uncommitted
Comparator
+>------~-o-+_+---o
~~~----~~--i/'
6
1
MPU Reset
L~ ______ P=______ __ J
3.6 k
14'-5.
~
12. 13
6.2 k
IDLY ~ RDLY CDLY
:J;CDLY
~
Sink Only
~:= Positive True Logic
MOTOROLA LINEAR/INTERFACE DEVICES
3-278
®
SG1525A/SG1527A
SG2525A/SG2527A
SG3525A/SG3527A
MOTOROLA
PULSE WIDTH MODULATOR CONTROL CIRCUITS
The SG1525A11527A series of pulse width modulator controlcircuits offer improved performance and lower external parts
count when implemented for controlling all types of switching
power supplies. The on-chip + 5.1 volt reference is trimmed to
± 1% and the error amplifier has an input common-mode voltage
range that includes the reference voltage, thus eliminating the
need for external divider resistors. A sync input to the oscillator
enables multiple units to be slaved or a single unit to be synchronized to an external system clock. A wide range of dead time
can be programmed by a single resistor connected between the
CT and Discharge pins. These devices also feature built-in softstart circuitry. requiring only an external timing capacitor. A shutdown pin controls both the soft-start circuitry and the output
stages. providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft-start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs and the changing of the soft-start capacitor when VCC is
below nominal. The output stages are totem-pole design capable
of sinking and sourcing in excess of 200 rnA. The output stage of
the SG1525A series features NOR Logic resulting in a low output
for an off state while the SG1527A series utilizes OR Logic which
gives a high output when off. The devices are available in Military,
Industrial and Commercial temperature ranges.
PULSE WIDTH MODULATOR
CONTROL CIRCUITS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
JSUFFIX
CERAMIC PACKAGE
CASE 620-10
_
16
1
NSUFFIX
PLASTIC PACKAGE
CASE 648-06
_
16
1
PIN CONNECTIONS
• 8.0 to 35 Volt Operation
• 5.1 Volt ± 1.0% Trimmed Reference
• 100 Hz to 400 kHz Oscillator Range
INV. Input
Vrel
N.1. Input
Vec
• Separate Oscillator Sync Pin
• Adjustable Dead Time Control
Sync
• Input Undervoltage Lockout
• Latching PWM to Prevent Multiple Pulses
osc.
Output
• PUlse-by-Pulse Shutdown
CT
• Dual Source/Sink Outputs: ± 400 mA Peak
RT
FUNCTIONAL BLOCK DIAGRAM
r-Vc'--i
I
I
13
I
1
OutputA
n
I
Output B
CT
N.l.lnput
CSolI-Start
(Top View)
1411-1
RT
INV. Input
I
1
Sync
Compensation
9 Compensation
Soft-Start
11~LI
I
osc Output 0---------,
Discharge
Discharge
O-':-+----J
02~:;;:==~~
~
ORDERING INFORMATION
I
Temperature
Range
Package
SG1525AJ
SG1527AJ
-55 to + 125·C
-55to +125·C
Ceramic DIP
Ceramic DIP
SG2525AJ
SG2525AN
SG2527AJ
SG2527AN
-25
-25
-25
-25
1
Device
1--T3;--i
I
L
SG1525A Output Stage
II
Output A
II
"UI1
I
I
:
I
-
I
Output B
I
14LJI
I
SG1527A
I
L _ _ ..£.u~'~~
SG3525AJ
SG3525AN
SG3527AJ
SG3527AN
MOTOROLA LINEAR/INTERFACE DEVICES
3-279
to
to
to
to
+85·C
+85·C
+85·C
+85·C
Ceramic DIP
Plastic DIP
Ceramic DIP
Plastic DIP
o to
o to
o to
o to
+70·C
+70·C
+70·C
+70·C
Ceramic DIP
Plastic DIP
Ceramic DIP
Plastic DIP
II
SG1525A, SG1527A, SG2525A, SG2527A; SG3525A, SG3527A
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
Vcc
+40
Vdc
Collector Supply Voltage
Vc
+40
Vdc
Logic Inputs
-
-0.3 to +5.5
V
Analog Inputs
-
-0.3 to VCC
V
Output Current, Source or Sink
10
±500
rnA
Reference Output Current
Iret
50
rnA
Oscillator Charging Current
-
5.0
rnA
Power Dissipation (Plastic & Ceramic Package)
TA ~ + 25°C (Note 2)
TC ~ + 25°C (Note 3)
Po
Supply Voltage
rnW
1000
2000
Thermal Resistance Junction to Air
Plastic a nd Ceramic Package
R9JA
100
°C/W
Thermal Resistance Junction to Case
Plastic and Ceramic Package
R9JC
60
°C/W
Operating Junction Temperature
Storage Temperature Range
Ceramic Package
Plastic Package
Lead Temperature (Soldering, 10 Seconds)
TJ
+150
°c
Tstg
-65 to +150
-55 to +125
°c
TSolder
+300
°C
NOTES,
,. Values beyond which damage may occur
2. Derate at 10 mW/oC for ambient temperatures above +50oC
3. Derate at 16 mW/oC for case temperatures above +25°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Min.
Max.
Unit
VCC
+8.0
+35
Vdc
Collector Supply Voltage
Vc
+4.5
+35
Vdc
Output Sink/Source Current
10
0
0
±loo
±400
Characteristic
Supply Voltage
(Steady State)
(Peak)
rnA
Reference Load Current
Iret
0
20
rnA
Oscillator Frequency Range
fose
0.1
400
Oscillator Timing Resistor
RT
2.0
150
kHz
kn
Oscillator Timing Capacitor
CT
0.001
0.2
/'F
Deadtime Resistor Range
RO
0
500
Operating Ambient Temperature Range
SG1525A. SG1527A
SG2525A, SG2527A
SG3525A. SG3527A
TA
-55
-25
0
MOTOROLA LINEAR/INTERFACE DEVICES
3-280
n
°c
+125
+85
+70
SG1525A, SG1527A, SG2525A, SG2527A, SG3525A, SG3527A
ELECTRICAL CHARACTERISTICS
(VCC ~ +20 Vdc, TA ~ Tlow to Thigh INote
41.
unless otherwise specified)
SG1525A/2525A
SG 1 527 AI 2527 A
Characteristic
SG3525A
SG3527A
Symbol
Min
Typ
Max
Min
Reference Output Voltage (T J:: +25°C)
Vref
5.05
5.10
5.15
5.00
Line Regulation (+80 V";; Vee <:;. +35 VI
Regl 1ne
-
10
20
-
Load Regulation (0 mA";; IL";; 20 mAl
Regload
.-
20
50
-
20
Typ
Max
Unit
510
520
Vdc
10
20
mV
-
20
50
mV
-
20
REFERENCE SECTION
II
----
Temperature Stability
.J.Vref/J.T
Total Output Variation
Includes Line and Load Regulation
over Temperature
5.00
J.Vref
-
-
520
80
100
495
-~--"--.-
Short Clfcuit Current
ISC
-
(Vref ° 0 V. TJ ° +25°C)
Output Noise Voltage
(10 Hz";;f";; 10kHz.TJo+25°CI
40
.-
Vn
Long Term Stability (T J ° +125°CI(Note 51
_ . - r-
100
mA
-
_0 _ _ _ _ -
200
20
40
50
.-~.
,--------------·-----r-····
Initial Accuracy (T J :;: +25°C)
-_.
80
-
mV
Vdc
... _ - -
200
~Vrms
50
mV khr
:,:50
Co
f - - - )---
--
S
OSCILLATOR SECTION (Note 6, unless otherWise specified)
525
-
-,----,---.:':2
a
20
-
._-
_.-
----
----,---,-
-50
-20
a
-10
---
Frequency Stability with Voltage
...1fosc
(+8.0 V";; VCC";; +35 VI
'\VCC
Frequency Stability with Temperature
Minimum Frequency (RT
-:t:O 3
~
150 kll, CT
-. f-----+--- .
=3
...1fosc
~
~
0.2 I'FI
f~,·';--
f-----------------+-Maximum Frequency (RT = 2.0 kO, CT:;: 1.0 nF)
-1
c--.-
a
50
-
--
50
Hz
---
400
----
kHz
.-
17
2 2
20
22
mA
--_.
Clock Amplitude
3.0
35
f-C-IO-Ck-W-id-t-h-(T-J-o-+2-5-0-C-1-----------+--------~03 --0-.-5-
3
a
--,--0- -03
I-s-yn-C-T-h-r-e-s-h-ol---d---------------~------+-·--1.-2--i--2.-0-f-· -2-8- ~-
+---+------ - _ .
10
----
°0
---------+-----~
----~--.
400
f-c-u·r-r-e-nt-M-ir-r-Or-(-IR-T-o-2-0-m-A-)--------+-----f-.~r---2C)
Sync Input Current (Sync Voltage :-;: +3 5 V)
0
•3 0
--
.. _
f max
·20
25
~--~--
35
05
V
-+---+-----"$
10
20
28
V
10
25
mA
-_.-
------
ERROR AMPLIFIER SECTION (VCM 0+5.1 VI
I-ln~p_u_t_O_ff_s_e_tV_ol_ta~g~e______________ __
Input alas Current
Input Offset Current
1----------------_._-DC Open Loop Gain (RL:;' 10 Mfll
02
Low Level Output Voltage
High Level Output Voltage
---_.-
02
3.8
56
3.8
56
CMRR
60
75
50.
75
PSRR
50
60
50
60
f - - - - - - - - - - - - - - - - - . - - , -.. ----+--Common Mode Rejection Ratio
05
..-
VOH
05
V
V
f
dB
(+15 V";; VCM";; +5 2 VI
1------=-'--------_._-Power Supply Rejection Ratio
(+8.0 V";; VCC";; +35 VI
dB
'-------'-- - - - ' - - - - - " - - - - ' - - - - - ' - - - - - - _ .
PWM COMPARATOR SECTION
- -
--
Oe m1n
-
-
0
-
-
0
"0
DC max
45
49
-
45
49
-
%
Input Threshold, Zero Duty Cycle (Note 6)
VTH
0.6
0.9
-
06
09
-
V
Input Threshold, Maximum Duty Cycle (Note 6)
VTH
-
3.3
36
-
33
36
V
liB
-
0.05
1.0
-
005
10
"A
Minimum Duty Cycle
Maximum Duty Cycle
Input Bias Current
MOTOROLA LINEAR/INTERFACE DEVICES
3-281
II
SG1525A, SG1527A, SG2525A, SG2527A, SG3525A, SG3527A
ELECTRICAL CHARACTERISTICS (Continued)
Characteristic
SOFT-START SECTION
=a V)
=2.0 V)
Shutdown Input Current (Vshutdown = 2.5 V)
-
Soft-Start Current (Vshutdown
Soft-Start Voltage (Vshutdown
-
25
50
80
25
50
80
-
0.4
0.6
0.4
0.6
V
0.4
1.0
-
0.4
1.0
rnA
-
_.
0.2
1.0
0.4
2.0
-
0.2
1.0
0.4
2.0
18
17
19
18
-
18
17
19
18
-
J.lA
OUTPUT DRIVERS (Each Output, VCC - +20 V)
Output Low Level
(lsink
(lsink
V
VOL
=20 rnA)
= 100 rnA)
Output High Level
=+35 V INote 7)
Rise TimelCL =1.0 nF. TJ = 25°C)
Fall Time ICL = 1.0 nF. TJ =25°C)
Collector Leakage. Vc
Shutdown Delay
IVso =+3.0 V. Cs
=O. TJ =+25'C)
Supply Current, (VCC - + 35 V)
NOTES:
4. Tlow
Thigh
=
=
V
VOH
(lsource = 20 rnA)
(lsource = 100 rnA)
Under Voltage Lockout IV8 and V9 = High)
-
VUL
6.0
7.0
8.0
6.0
7.0
8.0
V
IClleak)
-
-
200
-
-
200
J.lA
tr
-
100
600
-
100
600
ns
tf
-
50
300
50
300
ns
tds
-
0.2
0.5
-
0.2
0.5
J.lS
ICC
-
14
20
-
14
20
rnA
-55"C for SG1525A11527A
- 25"C for SG2525A12527A
O"C for SG3525A13527A
:~~;~~~~rs~~~~~~~~~~;t
+ 70"C for SG3525A13527A
5. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability
from lot to lot.
6. Tested at fosc = 40 kHz IAT = 3.6 kfl. CT = 0.01 J.lF. AO = 0 flI.
7. Applies to SG1S25A12525AJ3525A only, due to polarity of output pulses.
APPLICATION INFORMATION
SHUTDOWN OPTIONS
(See Block Diagram, front page)
Since both the compensation and soft-start terminals
(Pins 9 and 8) have current source pull-ups, either can
readily accept a pull-down signal which only has to sink
a maximum of 100 pA to turn off the outputs. This is
subject to the added requirement of discharging whatever external capacitance may be attached to these pins.
An alternate approach is the use of the shutdown
circuitry of Pin 10 which has been improved to enhance
the available shutdown options. Activating this circuit
by applying a positive signal on Pin 10 performs two
functions: the PWM latch is immediately set providing
the fastest turn-off signal to the outputs; and a 150 pA
current sink begins to discharge the external soft-start
capacitor. If the shutdown command is short, the PWM
signal is terminated without significant discharge of the
soft-start capacitor, thus, allowing, for example, a convenient implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this external capacitor,
recycling slow turn-on upon release.
Pin 10 should not be left floating as noise pickup could
conceivably interrupt normal operation.
MOTOROLA LINEAR/INTERFACE DEVICES
3-282
SG1525A, SG1527A, SG2525A, SG2527A, SG3525A, SG3527A
TYPICAL CHARACTERISTICS
FIGURE 1 - SG1525A OSCILLATOR SCHEMATIC
FIGURE 2 - OSCILLATOR CHARGE TIME versus RT
20 0
16
VJ
10 0
Rr
;g
O-~--r<
'<
0
,c:::;,
t;;
Cr
~ Of-z
'"
~
.f
Discharge
t'!v~
c'
c' c'
'<
c:;,~
'<
<;:)
'=:l,y
?Z
c' c'
'RO-Oll
"=
J
6
5
RO''-]=.
5. 0
/
2.
12
r::::;,(;::;,
V:J'>::;;:,
0
;::
Sync
W
tf&ti~ ~"~ ~-i~
Cp
Or-
-20
1.0
TRZ
10
luO
1.0 k
......--!4----+-o
1 I, 14
Output
I ..........
+
Or- 2
>:; -RZ-20k
~~q"""'"
~ ~
100 k loOM 10M
10 k
5.0k
I. FREQUENCY (HzI
Clock
10k
F/F
10k
PWM
MOTOROLA LINEAR/INTERFACE DEVICES
3-283
-
-
1111
50 100 200 50010002UOO 500010.000
CHARGE TIME IMsi
II
SG1525A, SG1527A, SG2525A, SG2527A, SG3525A, SG3527A
FIGURE 7 - SG1&25A/2&25A13525A
OUTPUT SATURATION CHARACTERISTICS
•
o
VCC = +20V
4. r-- TJ = 2SoC +-hH-++-+-+-+-I-I-+-t11+i
~ 351--j-t--If-+-+-H-H+-+-+-+--+-+-tlI-t+t
w
~ 3.01--+-+-+++H -+++--1---1I-+-++,,:#lrt1H
~
~ 2.51-+-+-+-+-H+t-++-+-+-1~-Ib~¥-H-t+t
i5
~
2.0I---i-t----jr-t-t-Htii,....-:::::::I:=FK""':j74--T-tttti
151---+--+--+-+-++-h.I"Hr--=......"f--Sourc·lat·I(Vf-IV~1)
II I
~
;;!j 1.0
Sink at. VoLi
iO~-+-+--h-t~+rt++--r-;--+-Ir-ri+HH
>
O~~n-~~~~~-L~~~I~II
0.01
0.02 0.03 0.05 O. 0.1
0.2 0.3 0.5 0.7 1.
10. OUTPUT SOURCE OR SINK CURRENT (AMPS)
FIGURE 9 - PUSH-PULL CONFIGURATION
FIGURE B - SINGLE ENDED SUPPLY
+Vsupply
+Vsupply
Al
Al
A2
Cl
13
Gnd
12
In conventional push-pull bipolar designs. forward base
drive is controlled by Rl-R3. Rapid turn-off times for the
power devices are achieved with speed-up capacitors C1
For single-ended supplies. the driver outputs are grounded.
The Vc terminal is switched to ground by the totem-pole
source transistors on alternate oscillator cycles.
and C2.
FIGURE 10 _. DRIVING POWER FETS
+Vsupply
FIGURE 11 - DRIVING TRANSFORMERS IN A
HALF-BRIDGE CONFIGURATION
Al
Cl
C2
Low power tra nsformers can be drive n directly by the SG 1525A.
Automatic reset occurs during deadtime, when both ends of t~e
primary winding are switched to ground,
The low source impedance of the output drivers provides
rapid charging of power FET input capacitance while minimizing external components,
MOTOROLA LINEAR/INTERFACE DEVICES
3-284
SG1525A, SG1527A, SG2525A, SG2527A, SG3525A, SG3527A
FIGURE 12 - LAB TEST FIXTURE
16
r---------------~
I
Reference
Clock
II
15
~Gnd
I8
MOTOROLA LINEAR/INTERFACE DEVICES
3-285
-
Soft start
II
®
SG1526
SG2526
SG3526
MOTOROLA
PULSE WIDTH MODULATION CONTROL CIRCUIT
The SG1526 is a high performance pulse width modulator integrated circuit intended for fixed frequency switching regulators and
other power control applications.
Functions included in this IC are a temperature compensated
voltage reference. sawtooth oscillator. error amplifier. pulse width
modulator. pulse metering and steering logic. and two high current
totem pole outputs ideally suited for driving the capacitance of power
FETs at high speeds.
Additional protective features include soft start and undervoltage
lockout. digital current limiting. double pulse inhibit. adjustable dead
time and a data latch for single pulse metering. All digital control
ports are TILand B-series CMOS compatible. Active low logic design
allows easy wired-OR connections for maximum flexibility. The
versatility of this device enables implementation in single-ended
or push-pull switching regulators that are transformerless ortransformer coupled. The SG1526 is specified over the full military junction temperature range of -55°C to +150 oC. The SG2526 is specified
over a junction temperature range of -40°C to +150°C while the
SG3526 is specified over a range of O°C to +125°C.
• B.O to 35 Volt Operation
PULSE WIDTH MODULATION
CONTROL CIRCUITS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
-
P~flN¥Y PLAS~I~U::~~GE
18 1
CASE 707-02
J SUFFIX
CERAMIC PACKAGE
CASE 726-04
• 5.0 Volt ±1 % Trimmed Reference
•
1.0 Hz to 400 kHz Oscillator Range
•
Dual Source/Sink Current Outputs: ±100 rnA
•
Digital Current Limiting
PIN CONNECTIONS
• Programmable Dead Time
+ Error
• Undervoltage Lockout
• Single Pulse Metering
Vref
-Error
• Programmable Soft Start
Compensation
• Wide Current Limit Common Mode Range
CSoft-Start
• Guaranteed 6 Unit Synchronization
Ground
Reset
-CS
BLOCK DIAGRAM
Output A
Sync
+CS
Shutdown
VCC
ROeadtime
RT
Ground
sv;;c"",C-_--,
RDeadti~"""..r--l-L____
-+""""1>-_____-f'F.~~rth
Top View
CT""1""-_ _.J
Res~~-I:Sc~~~+-----"
CSoft-Start
ORDERING INFORMATION
Device
Junction
Temperature Range
+c,s.
SG1526J
-55to +150·C
Ceramic DIP
-C.S.
SG2526J
SG2526N
-40 to + 150·C
Ceramic DIP
Plastic DIP
+ Error
-Error
Shu~own~-------~
SG3526J
SG3526N
MOTOROLA LINEAR/INTERFACE DEVICES
3-286
o to
+125·C
Package
Ceramic DIP
Plastic DIP
5G1526, 5G2526, 5G3526
MAXIMUM RATINGS (Note 1)
Symbol
Value
Unit
VCC
+40
Vdc
Collector Supply Voltage
Vc
+40
Vdc
Logic Inputs
-
-0.3 to +5.5
V
Analog Inputs
-
-0.3 to VCC
V
Output Current, Source or Sink
10
±200
mA
Iref
50
mA
Logic Sink Current
-
15
Power Dissipation (Plastic and Ceramic Package)
PD
Rating
Supply Voltage
Reference Load Current (VCC
(Note 3) TA
(Note 4) TC
~
~
~
40 V, Note 2)
II
mA
mW
1000
3000
+ 25°C
+ 25°C
Thermal Resistance Junction to Air
(Plastic and Ceramic Package)
RflJA
100
°C/W
Thermal Resistance Junction to Case
(Plastic and Ceramic Package)
RflJC
42
°C/W
TJ
+150
°C
Tstg
-65 to +150
°C
TSolder
±300
°C
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10 Seconds)
Notes:
1. Values beyond which damage may occur
2. Maximum junction temperature must be observed.
3. Derate at 10 mWf'C for ambient temperatures above + 50°C
4. Derate at 24
for case temperatures above + 25°C
mwrc
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Max
Unit
VCC
+8.0
+35
Vdc
Collector Supply Voltage
Vc
+4.5
+35
Vdc
Output Sink/Source Current (Each Output)
10
0
±100
rnA
Reference Load Current
Iref
0
20
rnA
Oscillator Frequency Range
fosc
0.001
400
kHz
Characteristic
Supply Voltage
Oscillator Timing Resistor
RT
2.0
150
kO
Oscillator Timing Capacitor
CT
0.001
20
I'F
3.0
50
Available Deadtime Range (40 kHz)
Operating Junction Temperature Range
SG1526
SG2526
SG3526
-55
-40
0
MOTOROLA LINEAR/INTERFACE DEVICES
3-287
%
°C
TJ
+150
+150
+125
..
8G1526, 8G2526, 8G3526
ELECTRICAL CHARACTERISTICS (Vcc ~ + 15 Vdc, TJ ~ Tlow to Thigh [Note 5] unless otherwise specified I
Characteristic
REFERENCE SECTION (Note 61
Reference Output Voltage (TJ = +25°C)
Line Regulation
(+8.0 V,;;; VCC';;; +35 VI
Load Regulation, 0 mA';;; IL';;; 20 mA
Temperature Stability
Total Reference Output Voltage Variation
Vref
4.95
5.00
5.05
5.00
6.10
V
Regline
-
10
20
4.90
-
10
30
mV
Regload
-
10
30
50
mV
-
IS
-
-
10
<>
]
1
:>
40
!:;
>.
6.0 f---j---+----j--+--+--+--+---i
30 1---+---+--++--+--+--\---\---1
~
20
1
'" 2.0 f---j---+----jr+---t--+--+--+---i
- 100 pFI CComp
1.0 1--+---+---+t--+---1~-+--+---i
IIIIIIIIIIIIIIII~ IIIIII
100
10
4.0 I--+----+-~+--t--+--t--+----l
1.0 M
1.0K
10K
lOOK
I. FREQUENCY (Hz)
25
10 M
FIGURE 5 - UNDERVOLTAGE LOCKOUT
CHARACTERISTIC
~
~
~
6.0
2.0 f--+--+-++lH-f+-+-+---+---j-+-+H++-+--1
>=
~ 1.5 f--+--+-++H-f+-+-+--+---j-+-+H+f---+--1
,/
w
~
4.0
<>
3.0
2.0
1.0
2.5 .--,--rTTTTTT-r-r-,....,--,TT~---r--,
z
<>
./
~ 5.0
0:
200
w
7.0
Ii
175
FIGURE 6 - OUTPUT DRIVER SATURATION
VOLTAGE AS A FUNCTION OF SINK CURRENT
B.O
'"
~
50
75
100
125
150
DIFFERENTIAL INPUT VOLTAGE (mV)
i.,..-..
V
o
o
1.0
!;
05
t--+-+-++H-H--+-+--t--1-t--+~~-t--i
t--+-+-++H-H--+-+--t--1H-+R+t--t--i
<>
\
1.0
i5
2.0
5.0
3.0
4.0
V",. REFERENCE VOLTAGE (V)
6.0
7.0
B.O
>'
~ 0 L-L~Y±~~~~~~~~
2.0
5.0
10
20
50
OUTPUT ORIVER SINK CURRENT (rnA)
MOTOROLA LINEAR/INTERFACE DEVICES
3-290
100
200
SG1526, SG2526, SG3526
FIGURE 8 - SG1526 OSCILLATOR PERIOD
FIGURE 7 - Vc SATURATION VOLTAGE AS A
FUNCTION OF SINK CURRENT
2.5
~
100mll=ft
2.0
~
'"
~
w
to
c(
, .... '"
~
~ 1. 5
z
i
::>
-- -
1.0
~
~ D. 5
50
II
~ 20 I-+tttt~ft1IH-
I--'
to
z
~1°1.
~
5.0
0
2.0
5.0
10
20
50
100
200
Vc SINK CURRENT (mAl
FIGURE 9 - SG1526 ERROR AMPLIFIER
FIGURE 10 - SG1626 UNDERVOLTAGE LOCKOUT
Vcc
To Reset
To Driver A
To Driver B
- Error
+ Error
FIGURE 11 - SG1526 PULSE PROCESSING LOGIC
Memory
F/F
sYnc~
Ci
SQ
PWM
A
Clock
D
Ci
PWM
Metering
F/F
The metering FLIP-FLOP is an asynchronous
data latch which suppresses high frequency
oscillations by allowing only one PWM pulse
per oscillator cycle.
The memory FLIP-FLOP prevents double pulsing in a push-pull configuration by remembering which output produced the last pulse.
MOTOROLA LINEAR/INTERFACE DEVICES
3-291
..
SG1526, SG2526, SG3526
APPLICATIONS INFORMATION
FIGURE 12 - EXTENDING REFERENCE
OUTPUT CURRENT CAPABILITY
FIGURE 13 - ERROR AMPLIFIER CONNECTIONS
Negative
c**
,-""""...... Output
_ _ _ ..J
Vre! ---'l""'------i
VCC __~~2~7~~__~I7,
Vre!
Voltage
--'VI,.,.......---;
Positive
Gnd-----------------.________~--
Gnd
L--""""..... Output
Gnd
Voltage
*May be required
with some types
Vout = Vref
(:~)
of transistors
FIGURE 14 - OSCILLATOR CONNECTIONS
FIGURE 15 - FOLDBACK CURRENT LIMITING
Output Filter . .1t-.....-y\A;~..----u+
II
RS
12
SGI526
RI
RD
10
Vout
R2
Gnd~~~-------o
RT
( 0 1 V + Vout R, )
RI + R2
.
Imax
FIGURE 16 - SG1526 SOFT-START CIRCUITRY
=
RS
ISC ~
0tV)
(""""AS
FIGURE 17 - DRIVING VMOS POWER FETS
'I2Vcr~
Vref
__- - - - - - _ _ ,
14
+ Error
Vc
A
/I
- Error
SGI526
-R-es-e-t ~5=--_"'_--1
Gnd
Lockout
l'
B
GSaft-Start
The totem pole output drivers of the SGl 526
are ideally suited for driving the input capacitance of power FETs at high speeds.
MOTOROLA LINEAR/INTERFACE DEVICES
3-292
SG1526, SG2526, SG3526
FIGURE 19 - FLYBACK CONVERTER
WITH CURRENT LIMITING
FIGURE 18 - HALF-BRIDGE
CONFIGURATION
+V(}--------__--------------~
Supply
R1
+Vo.--.-------------~.-------,
Supply
R1
14
C1
14
D1
Vc A j-:.:13=--....1h
Vc A
5
SG1526
B~1~6~~~
R
C2
SG1526
Gnd B
+CS~------_4--~
S
15
R3
R2
In the above circuit, current limiting is accorn·
plished by using the current limit comparator
output to reset the soft-start capacitor.
FIGURE 21 - PUSH-PULL CONFIGURATION
FIGURE 20 - SINGLE-ENDED CONFIGURATION
+V S u ppl Y 0.-1110----,
+V Supply o--ilo------------------~
To
Output
R1
Filter
C1
R2
14
-r
Vc A 1-1;.::3__....-'\I'>I\r.....
14
Vc
SG1526
13
A
SG1526
B
16
Gnd BI----....-'\I'>I\r~-t'
16
Gnd
15
MOTOROLA LINEAR/INTERFACE DEVICES
3-293
II
•
®
TCA5600
MOTOROLA
Advance Information
UNIVERSAL MICROPROCESSOR
POWER SUPPLY CONTROLLER
UNIVERSAL MICROPROCESSOR POWER SUPPLY
CONTROLLER
SILICON MONOLITHIC
INTEGRATED CIRCUITS
The TCA5600 is a versatile power supply control circuit for
microprocessor based systems and mainly intended for automotive applications and battery powered instruments. To cover
a wide range of applications, the device offers high circuit flexibility with minimum of external components.
Functions included in this IC are a temperature compensated
voltage reference, on chip dc/dc converter, programmable and
remote controlled voltage regulator, fixed 5.0 V supply voltage
regulator with external PNP power device, undervoltage detection
circuit, power-on RESET delay and watchdog feature for safe and
hazard free microprocessor operations.
NSUFRX
PLASTIC PACKAGE
CASE 707-02
• 6.0 to 30 V Operation Range
• 2.5 V Reference Voltage Accessible for Other Tasks
• Fixed 5.0 V ± 4% Microprocessor Supply Regulator Including
Current Limitation, Overvoltage Protection and Undervoltage
Monitor
PIN CONNECTIONS
• Programmable 6.0 to 30 V Voltage Regulator Exhibiting High
Peak Current (150 mAl, Current Limiting and Thermal Protection
• Two Remote Inputs to Select the Regulator's Operation Mode:
OFF, 5.0 V, 5.0 V Standby and Programmable Output Voltage
RESET
• Self Contained dc/dc Converter Fully Controlled By the Programmable Regulator to Guarantee Safe Operation Under All
Working Conditions
1
Delav
Voutt Sense 2
loutt Sense
• Programmable Power-On RESET Delay
Base Drive
• Watchdog Select Input
• Negative Edge Triggered Watchdog Input
VCC2
• Low Current Consumption in the VCCI Standby Mode
• All Digital Control Ports are TTL- and MOS-Compatible
APPLICATIONS INCLUDE:
• Microprocessor Systems with E2PROMs
Vout2 Prog
7
Vout2 Output
Converter
Output
8
Gnd
Current
Sense
10
• High Voltage Crystal and Plasma Displays
Converter
Input
• Decentralized Power Supplies in Computer and Telecommunication Systems
(Top. View)
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Mu
Unit
5.0
5.5
30
30
V
Collector Current
VCCI
VCC2
IC
-
800
mA
Output VolUge
Vout2
6.0
30
V
Opendlng Junction
Tempenture Renge
Iret
0
2.0
mA
- 40" to + 125"C
Ch.racterIatIc
Power Supply Voltage
Reference Source Current
ORDERING INFORMAll0N
ThiI: document contelAl Information on 8 new product. SpeciftC8tionl and information herein are
IUbjecI to elul. without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-294
TCA5600
MAXIMUM RATINGS
(TA ~ + 25'C unless otherwise noted Note 1)
Rating
Symbol
Value
Unit
VCC1, VCC2
35
Vdc
Base Drive Current (Pin 15)
IB
20
rnA
Collector Current (Pin 10)
IC
1.0
A
Forward Rectifier Current (Pin 10-Pin 9)
IF
1.0
A
Logic Inputs INH1, INH2, WDS
(Pin 6,11,18)
VINP
-0.3 V to VCCl
Vdc
Logic Input Current WDI (Pin 4)
IWDI
±O.5
rnA
Output Sink Current RESET (Pin 1)
IRES
-
10
rnA
-0.3 to 10
-0.3 to 5.0
V
Power Supply Voltage (Pin 3, 14)
Analog Inputs (Pin 2)
(Pin 7)
-
Reference Source Current (Pin 5)
Iref
5.0
rnA
Power Dissipation (Note 2)
TA ~ +85'C
PD
500
mW
Thermal Resistance (Junction to Air)
ROJA
100
'CIW
Operating Temperature Range
TA
-40 to +85'C
'c
Operating Junction Temperature
TJ
+125
Storage Temperature Range
'c
-65 to + 150
Tstg
'C
NOTES:
1. Values beyond which damage may occur.
2. Derate at 10 mW/'C for ambient temperature above + 85'C.
FIGURE 1 -
FUNCTIONAL BLOCK DIAGRAM
Cl
~
!!l
~~
o" "
c.
u.s
~
N
'E"
~
'>" "
C.
,,~
o "
uO
~='
~
1ii~
- "C.
N~
~Cl
"0
o~
"
" '"
~
UfIl
0
0>
E
~ ~
:;
~~
Cl~
§:~
«:0
" 0
fIl>
::l
'" "
>0..
N
U
U
>
"
"~~ "'"'"
UfIl
" '"
~.!?
Inhibit 2
(lNH2)
Inhibit 1
(lNH1)
>--_..:..:.. PNP
Base Drive
.............w'--
Q;
0
"'=
"'lUi0 :g:;:
:g:;:
u0
00
!:l-
"'"'"
:;:~
fIl
~
~
'" .s"
:;:c.
'"~li ~
0> u
'"
"~
~
rr
MOTOROLA LINEAR/INTERFACE DEVICES
3-295
II
TCA5600
ELECTRICAL CHARACTERISTICS (VCCI = VCC2 = 12 V; TJ = 25°C; Iref = 0; loutl = 0 (Note 3); RSC = 0.50; INHI =
"High"; INH2 = "High"; WDS = "High"; lout2 = 0 (Note 4); if not otherwise specified)
Characteristic
I Figura I
Symbol
I
1
Vref nom
2.42
2.5
2.58
V
Vref
2.4
-
2.6
V
Regline
-
2.0
15
mV
~
-
-
+/-0.5
mVrC
RR
60
70
-
dB
Zo
-
1.0
-
Ohm
ICCI
-
3.0
-
rnA
Vout1(nom)
4.8
5.0
5.2
V
Voutl
4.75
-
5.25
V
Min
I
Typ
I
Max
I
Unit
REFERENCE SECTION
Nominal Reference Voltage
Reference Voltage
Iref = 0.5 rnA, Tlow '" TJ '" Thigh (Note 5),
6.0 V '" VCCI '" 18 V
Line Regulation (6.0 V '" VCC2 '" 18 V)
Average Temperature Coefficient
Tlow'" TJ '" Thigh (Note 5)
2
Ripple Rejection Ratio
f = 1.0 kHz, Vsin = 1.0 Vpp
3
aTJ
Output Impedance
o '" Iref '" 2.0 rnA
Standby Current Consumption
VCC2 = Open
4
50 V MICROPROCESSOR VOLTAGE REGULATOR SECTION
Nominal Output Voltage
Output Voltage
5.0 rnA '" loutl '" 300 rnA, Tlow '" TJ '" Thigh (Note 5)
6.0 V '" VCC2 '" 18 V
5
6
Line Regulation (6.0 V'" VCC2 '" 18 VI
Regline
-
10
50
mV
Load Regulation (5.0 rnA '" loutl '" 300 mAl
Regload
-
20
100
mV
-
rnA
Base Current Drive (VCC2
= 6.0 V, V15 = 4.0 VI
3
Ripple Rejection Ratio
f = 1.0 kHz, Vsin = 1.0 Vpp
Undervoltage Detection Level (RSC
Current Limitation Threshold (RSC
= 5.0 HI
= 5.0 HI
7
Average Temperature Coefficient
Tlow '" TJ '" Thigh (Note 51
IB
10
15
RR
50
65
Vlow
4.5
0.93 x Voutl
VRSC
210
250
290
mV
-
-
±1.0
mVrC
aVoutl
I
1.6
I
I
3
NC 12
I
1----+- +40
E
t;: +20
h...
"'
a
'"
~> -20
RSC
0.511
./'
f-""""
.........
.............
~...... ,/"
,/"
............
,,/
V
.......
i'-.......
V"""
~-40
..,
I
-
3
NC 12
NC 4
15
17
...
............
-60
- 50
-25
a
25
50
75
100
TJ, JUNCTION TEMPERATURE I'CI
FIGURE 3 70
~60
050
II
1----+-=
&l30
NC 12
15
NC 4
ii!
I----+-
3.0
ABV
::>
1/24 V
II
e
'"
0.5 !l
+
~
~
RSC
VCC2
6.0
2.0
> 1.0
/
/
I
NC 12
NC 4
VCC2 '" 20V
/
V
100
200
R5
10 k
300
400
500
10ul1, OUTPUT CURRENT (mAl
600
MOTOROLA LINEAR/INTERFACE DEVICES
3-299
II
..
TCA5600
FIGURE 7 -
UNDERVOLTAGE LOCKOUT CHARACTERISTICS
RSC
0.5 n
+
/
~5
VCCI
NC 12
~
'"~
o
4
NC 4
I'"~ 32
~
I~
15
17
1-.._--+--oVou !
L-N~C~r-T----r~~~
t
>1
R5
oI/\.
o
10 k
1.0
2.0
3.0
4.U
5.0
6.0
Voull, OUTPUT VOLTAGE (VI
7.0
8.0
FIGURE 8 - OUTPUT CURRENT CAPABILITY OF THE PROGRAMMING REGULATOR
28
RSC
0.5 n
+
24
16
I
~
o
o
Vou!
.1
10C4;tF
7
I
40
20
60
80
100
120
IOUI2, OUTPUT CURRENT (mAl
140
TIP 30
+
I
I
rn
4.0
>
Ql
15
VCCrr.
I
~ 8.0
NC 12
+ NC 4
I
~ 12
3
9
I
I
~
'"~
1
I
I
2:: 20
Rou t2
5.0 k
160
-=-
.,,-
-=
FIGURE 9 - COLLECTOR CURRENT DETECTION LEVEL
RSC
0.5 n
16
15
QI
TIP 30
1---+--0 YOU!
+
o
o
I,C4
-.L0;tF
VI2(HI
VI2(LI
R5
10 k
I00
200
300
400
V12, CURRENT SENSE VOLTAGE (mVI
500
MOTOROLA LINEAR/INTERFACE DEVICES
3-300
TCA5600
FIGURE 10 -
POWER SWITCH CHARACTERISTICS
1.8
~
~
«
1.6
!:;
§?1.4
o
+ VCCI
:z
~ 1.2
:>
!;<
u>
1.0
~O.8
_r-
>
0.6
10
20
30
l
-
NC 4
t----.--0 Vou!l
17
NC
50
80 100
200 300
IC10. COLLECTOR CURRENT (mA)
500
800
+
FT'C4
101'~
R5
10 k
FIGURE 11 - RECTIFIER CHARACTERISTICS
1.8
~1.6
~
'"~ 1.4
1
§?
~1.2
~
NC 12
NC
01
15
TIP 30
4
Vou!l
17
21.0
~O.8
_f-
i-
NC
0.6
10
20
30
50
80 100
200 300
IF. RECTIFIER CURRENT (mAl
FIGURE 12 -
500
i
~ 20
!:;
5
~
:>
Spec. limits
L...:;......:..r---:'T--i-'T--i----I
~a.o
,?
4.0
Vl0
o
-40
-30
-20
Vg
1----+--oVout1
High "z" State
12
o
l
01
TIP 30
15
§? 16
RSC
0.5ll
INH 2 LEAKAGE CURRENT IMMUNITY
Vout2
24
C4
aoo
28
~
10 I'F
-10
0
10
IZ. LEAKAGE CURRENT IJJA)
R5
20
30
10 k
40
MOTOROLA LINEAR/INTERFACE DEVICES
3-301
•
TCA5600
APPLICATIONS INFORMATION
(See Figure 18)
FIGURE 14 - VOLTAGE AND CURRENT WAVEFORM ON
THE COIL (not to scale)
1. VOLTAGE REFERENCE Vref
The voltage reference Vref is based upon a highly
stable bandgap voltage reference and is accessible on
Pin 5 for additional tasks. This circuit part has its own
supply connection on Pin 3 and is therefore able to
operate in standby mode. The RC network R3, C6 improves the ripple rejection on both regulators.
2. DC/DC CONVERTER
The dc/dc converter performs according to the fly
back principle and does not need a time base circuit.
The maximum coil current is well defined by means of
the current sensing resistor Rl under all working conditions (start-up phase, circuit overload, wide supply
voltage range and extreme load current change). Figure
13 shows the simplified converter schematic:
FIGURE 13 - SIMPLIFIED CONVERTER SCHEMATIC
The time ratio Il for the charging time to dumping time
is defined by equation (3):
VCC2-~--
I
II
300 ,u.H
Control Feedback
(3)
10
The coil charging time t1 is found using equation (4):
t1 = - - (1 + '!). f
Il
C2
R,
0.680
1o'22/-LF
(f : min. oscillation frequency which should be chosen
above the audio frequency band (e.g. 20 kHz))
Knowing the dc output current lout2 of the programmable regulator, the peak coil current IL(peak) can now
be calculated:
A simplified method on "how to calculate the coil inductance" is given below. The operation point at min.
supply voltage (VCC2) and max. output current (lout2)
for a fixed output voltage (V out 2) determines the coil
data. Figure 14 shows the typical voltage and current
wave forms on the coil L1 (coil losses neglected).
IL(peak)
= 2· lout2 . (1 +
L1
= _t_1_. VL-
=
VCC2 - VCE(sat) - V12(H)
(5)
(6)
IL(peak)
= Vout2 + tiV(Pin 9 - Pin 8) + VF - VCC2(1)
VL -
Il)
The coil inductance L1 of the nonsaturated coil is given
by equation (6):
The equations (1) and (2) yield the respective coil voltage VL - and VL + (see Figure 14):
VL +
(4)
(2)
The formula (6a) yields the current sensing resister R1
for a defined peak coil current IL(peak):
(tiV(Pin 9 - Pin 8F input/output voltage drop of the
regulator, 2.5 V typical)
R1 = V12(H)
IL(peak)
(VF, VCE(sat), V12(H): see electrical characteristics)
MOTOROLA LINEAR/INTERFACE DEVICES
3-302
(6a)
TCA5600
In order to limit the by-pass current through capacitor
C7 during the energy dumping phase the value C2> >C7
should be implemented.
FIGURE 16 - TYPICAL E2PROMPROGRAMMING
SEQUENCE (not to scalel
For all other operation conditions, the feedback signal
from the programmable voltage regulator controls the
activity of the converter.
3. PROGRAMMABLE VOLTAGE REGULATOR
This series voltage regulator is programmable by the
voltage divider R4, RS for a nominal output voltage
6.0 V .. Vout 2 .. 30 V.
R4
= (Vout2 - Vref nom) . RS
Vref nom
(R5 = 10 k, Vref nom = 2.S V)
(7)
Programming
Voltage Vpp
Vout2i
•
I
5.0 V+I-"-~--!
I~~,~",I_"-~_-i
"0" I
I
I
INH21
IHigh "z"l
l
Current limitation and thermal shutdown capability are
standard features of this regulator. The voltage drop
~
~
0
z
"
'S'S u
.
ij3j
GND
6
13
GND
Sink Output
7
12
GND
Source Output
B
GND
Vee
9
"
10
GND
Pins 10 thru 18 are
electrical ground and
heatsink pins for IC.
9
~~$>
ORDERING INFORMATION
Temperature
~
Device
TDA4601
TDA46018
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-305
3
"'_...J-_J
Range
Package
Plastic SIP
-15°C to +85°C
Plastic DIP
TDA4601,8
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vg
20
V
V7
V"]"-V8
Oto Vg
±6.0
V
V
Supply Voltage
Sink Output Voltage
Reference Output
11
-10 to +1.0
rnA
Zero Crossing
12
-3.0 to +3.0
rnA
Control Amplifier
13
-3.0 to 0
rnA
Collector Current
14
-2.0 to +5.0
rnA
Trigger Input
15
-2.0 to +3.0
rnA
Sink Output
17
-1.5
A
Junction Temperature
TJ
+150
°C
Storage Temperature
TstQ
-40 to +125
°C
Thermal Resistance (Junction to Air)
8JA
70
°CIW
Thermal Resistance (Junction to Case)
8JC
15
°CIW
ELECTRICAL CHARACTERISTICS (TA
~ + 25°C unless otherwise stated)
Range of Operation
Min
Typ
Max
Supply Voltage
Symbol
Vg
Fig. No.
-
15
18
V
Ambient Temperature
TA
-15
-
85
°C
1.5
2.0
0.5
2.0
3.2
Unit
START OPERATION TA ~ 25°C
Current
V9 ~
Vg ~
Vg ~
Consumption (V1 Not Yet Switched)
3.0 V
5.0 V
10 V
19
1
rnA
-
Turn-On Point for V1
Vg
1
11.3
11.8
12.3
V
V4 Before Start-Up (Vg < 11.8 V)
V4
1
6.0
6.7
-
V
Ig
1
110
55
135
85
160
110
rnA
V1
1
4.0
4.0
4.2
4.2
4.5
4.4
V
TC1
1
-
100
-
ppmFC
V4
1
1.8
2.08
2.5
V4 peak
1
4.0
-
4.2
2.4
4.5
3.0
-
3.7
2.5
2.4
2.11
4.0
3.0
2.9
-
1.0
0.4
-
-
3.5
4.0
5.0
-
-
1.4
1.45
1.57
REGULATION MODE Vg
~
15 V TA
Current Consumption V reg
V ren
Reference Voltage 11
~
~
~
25°C
-10 V
0
< 0.1 rnA
11
~
5.0 rnA
Reference Voltage Temperature Coefficient
VPin 4 Low Static Voltage
VPin 4 Regulation Peak Voltage
IPin 3 ~ 5.0 IJ.A
IPin 3 ~ 1.3 rnA
V3
VPin 3
13
1
VPin 7 Peak High
VR ~ 0 V (Full Fold Back)
VR ~ - 10 V (Regulation)
VR ~ -15 V (Standby)
V7 peak
1
VPin 7 Peak Low
VR ~ OV
V7 peak
IPin 3 Regulation
IPin 3 Leakage at VPin 3 ~ 1.5 V
1
VR~-10V
VR
~
V
1
Full Fold Back IPin 3 ~ 1.3 rnA
Fold Back IPin 3 ~ 0.5 rnA
Overload Decision IPin 3 ~ 1.0 IJ.A
VPin 3 Regulation
V
MOTOROLA LINEAR/INTERFACE DEVICES
3-306
IJ.A
V
-
-15V
V
V
-
-
TDA4601,8
ELECTRICAL CHARACTERISTICS (continued) TA = 25°C
Symbol
I Fig. No.1
IPin 7 Sink Peak
VR = -15V
17 peak
1
-
IPin S Source Peak
VR = -15V
IS peak
1
V2
1
Range of Operation
REGULATION MODE (continued) V9
=
15 V TA
=
VPin 2
IPin 2
Unit
+0.7
-
A
-
-o.s
-
A
-
-0.3
-0.2
+0.7
+O.S
-
-
+3.0 rnA
+0.3 mA
=
15 V TA
Typ
V
= -3.0 rnA
= -0.3 mA
PROTECTIVE OPERATION V9
I
Max
Min
25°C
= 25°C
Current Consumption (V5 < 1.S V)
19
1
14
20
26
rnA
Turn-Off Voltage (V5 < 1.8 V)
V7
V4
1
1
1.3
1.S
1.5
2.1
1.8
2.S
V
External Trigger Input
Enable Voltage (V reg = 0 V)
Disabled Voltage (V reg = 0 V)
Vs
1
-
2.4
2.0
2.2
2.2
Supply Voltage Disabling Vs and Vl
V9
1
6.7
7.4
7.S
VPin 5 Zener Voltage (Pin 5 Open)
Vs
1
6.S
7.3
7.8
= 3.0 V
=0V
IS
1
-
1.4
-11
-
Turn-On Time (Secondary Voltages)
ton
2
-
3S0
Voltage Change
When S3 = Closed
When S2 = Closed
tN2
2
IPin S VPin 5
VPin 5
(~P3
(~P2
Switching Frequency During Standby Mode
Primary Power Consumption During Standby Mode
The heat sink must be optimized. taking the maximum data
(TJ. 8JC. TA) into consideration
-
450
V
V
,.A
ms
mV
-
= 19 W)
= 15 W)
Standby Operation (Minimum Secondary Power: 3.0 Watts)
When Sl = Open
V
-
100
500
500
1000
~V2
2
-
20
30
f
2
70
75
-
kHz
Pprim
2
-
10
1S
VA
V
-'
CIRCUIT DESCRIPTION
The TDA4601 regulates. controls and protects the
switching transistor in flyback converter power supplies
at starting-up, normal, and overload operation.
2. Activation of the internal reference voltage V1 = 4.0
V. This voltage is suddenly available when Vg
reaches 12 V and enables all parts of the Ie to be
supplied from the control logic including thermal and
overload protection.
A. Start-Up Sequence
During start-up there are three consecutive
operations:
1. An internal reference voltage is created. It supplies
the voltage regulator and enables the supply to the
coupling electrolytic capacitor and the switching
transistor. For a supply voltage (Vg) of 12 V. the current is less than 3.2 rnA.
3. Activation of the control logic. As soon as the reference voltage is available. the control is switched
on through an additional stabilization circuit.
This start-up sequence is necessary for smoothly driving the switching transistor through the coupli"ng electrolytic capacitor.
MOTOROLA LINEAR/INTERFACE DEVICES
3-307
•
II
TDA4601,8
FIGURE 1 -
FIGURE 2 -
TEST CONFIGURATION
0
~
"-n.V
t+ O'~+-+--+-I-+--+---lf-I-++-+-_ _-I~p,S
2
Rl
2.2 k{}
"j~
R2
1.0
k{}
3
C2
4
r
---VR = -10V
- ____ VR = 0
SJ:
9
n
G
i8
0.68
~'OOWnr
11
W
l_
ncg:
R3
20
C3
1.0/loF
+
10nF
_I
-O.S
TDA4601
1
TEST DIAGRAM: NORMAL OPERATION
R4
10k{}
1N4003 10 /loF
Dl D2
~
10
/loF +
R8
27
-::;-=--=-
Vg
Va
1~----------"p,S
t 6: :
I
4 I
I
_I
I
I
:
~-.y----
0+-----------------------.. p,S
-I
-=
The comparison of the output level of the regulating
amplifier, the overload detection and the collector current simulation drives the control logic. An additional
steering control and blocking possibility is offered thru
Pin 5. When the voltage applied on Pin 5 falls below
2.2 V then the source output (Pin 8) is blocked.
The control logic is set according to the start-up circuit, the zero crossing detection and the trigger enabling. This logic drives the base current amplifier and
the base current shutdown. The base current amplifier
drives the source output (Pin 8) proportionally to the
sa'wtooth voltage (Pin 4). A current feedback is performed by an external shunt inserted between Pin 8 and
the base of the switching power transistor. This resistor
determines the maximum amplitude of the base current
drive,
B. Normal Operation
Zero crossing detection is sensed on Pin 2 and linked
to the control logic.
The signal picked up on the feedback winding is
applied, after filtering, to Pin 3 (used for input regulation
and for overload protection). The regulating section
works with an input voltage of about 2.0 V for normal
regulation and a current of about 1.4 mA for foldback
operation. Together with the collector current simulation Pin 4, the overload recognition defines the operating region of the regulating amplifier depending on
the internal reference voltage. The simulation of the
collector current is generated by an external RC network
at Pin 4 and an internally set voltage level.
For a constant line voltage and for a given output
power on the load (t on fixed) less than the maximum
output power, a decrease of C4 produces an increase
of the current sent to the base of the power switching'
transistor. So the foldback point is reached earlier. The
regulation range starts from a 2.0 Vdc level which is the
bottom of a sawtooth waveform; the maximum is limited at 4.0 V (reference voltage).
A secondary load of 19 W produces a switching frequency of about 50 kHz at an almost constant duty cycle
(approximately 3). Furthermore, when the switch mode
power supply delivers approximately 3.0 W, the switching frequency jumps to about 70 kHz at a duty cycle of
approximately 11. At the same time, the collector peak
current falls below 1.0 A.
C. Protective Features
The base current shut-down, released by the control
logic, clamps the sink output (Pin 7) at 1,6 V, turning off
the switching transistor. This feature will be released if
the voltage on Pin 9 is less than 7.4 V, or if the applied
voltage on Pin 5 is .-ess than 2.2 V. In case of a short
circuit of the secondary windings, the TDA4601 continuously monitors the fault condition.
In standby operation the circuit is set to a high duty
cycle. The total power consumption of the power supply
is held below 6.0 to 10 W.
MOTOROLA LINEAR/INTERFACE DEVICES
3-308
TDA4601,8
FIGURE 3 -
FREQUENCY versus OUTPUT POWER
FIGURE 4 -
EFFICIENCY versus OUTPUT POWER
100
100
80
B
60
>u
"- I'...
il'i
::> 40
~
...........
0
ff'
20
o
o
20
FIGURE 5 -
--
I--.
-r--.
-
100
60
80
OUTPUT POWER IWI
~
40
7
20 II
I
o
o
120
20
40
60
80
OUTPUT POWER IWI
100
120
FIGURE 6 -
OUTPUT VOLTAGE (Vz)
versus LINE VOLTAGE
152
;E
.
~160
~
.~
,-
;: 100
80
60
"
)1)
'"~
150
I-
149
~.
~
::>
....;; ~
148
~
100
-----
0
.J'~ ~
o
~
§?
~.
/L, ~.
40
20
151
:§;'
~120
o
./
/
OUTPUT VOLTAGE (Vz) versus OUTPUT
CURRENT (lqZ)
~140
~
il'i
60
u
240
220
200
;E180
5
80
>-
u
V
147
150
200 300 400 500 600 700 800 900 1000 1100
OUTPUT CURRENT Iq2 (mAl
160
170
180
..- V
~
190 200 210 220
LINE VOLTAGE IVael
230
140 250
TEST CIRCUIT AND TYPICAL APPLICATION (See Figure 7)
• Short circuit proof and open-loop resistant circuit. In
both cases a power of only 6.0 to 10 W is consumed.
Linear foldback characteristic at overload.
This application circuit shown in Figure 2 represents
a blocking converter for color TV sets with 30 W to
120 W of output power and line voltages from 160 to
270V.
In spite of regulation on the primary side, good voltage stability of the various secondary voltages is
achieved even with large load changes.
For line voltage isolation and transformation to the
desired secondary voltages, a transformer with ferrite
core is used.
• Automatic restart after elimination of the overload.
• Efficiency of more than 80% at an output power of
40 to 100 W.
• Frequency of oscillation between 20 kHz (100 W) and
70 kHz (without load).
• Simple RFI suppression
• Good regulation of load current and line voltage variations. At a line voltage variation between 170 and
240 V the output voltage of 150 V will change approximately 2.0 V.
SPECIAL FEATURES OF THE FLYBACK CONVERTER
POWER, SUPPLY USING THE TDA4601
• Direct driving of the power switching transistor
• Low starting current, defined starting behavior also
at slowly rising line voltage
MOTOROLA LINEAR/INTERFACE DEVICES
3-309
TDA4601,8
FIGURE 7 -
TYPICAL APPLICATION
1N4006
10 kn
3.0 W
1N4934
o
C2
220
2.7
+
270 pF
Fuse 1.25 A
~F
n
Note:
P is used to adjust the secondary voltage
C2 must be discharged before IC change
MOTOROLA LINEAR/INTERFACE DEVICES
3-310
TDA4601,8
FIGURE 8 -
A. Thermal Kick Starter
0-/1N4007
Vline
220 Vac
PTe
{
500 n at 25°C
20 kll at 50°C
•
ALTERNATIVE START-UP CIRCUIT
B. Lossless Start-Up Pump
Self-
0.47 p.F 400 V
Powering
1N4007
0-/----1
2.0 kn
Vline
200 kll
220 Vac
1N4007
Note: For more application information refer to ANE002
MOTOROLA LINEAR/INTERFACE DEVICES
3-311
Sel/Powering
TL494
MOTOROLA
SWITCH MODE
PULSE WIDTH MODULATION
CONTROL CIRCUITS
SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUITS
The TL494 is a fixed frequency, pulse width modulation control
circuit designed primarily for Switch mode power supply control.
This device features:
• Complete Pulse Width Modulation Control Circuitry
SILICON MONOLITHIC
INTEGRATED CIRCUITS
• On-Chip Oscillator With Master Or Slave Operation
• On-Chip Error Amplifiers
• On-Chip 5 Volt Reference
• Adjustable Dead-Time Control
• Uncommitted Output Transistors Rated to 500 mA Source Or
Sink
• Output Control For Push-Pull Or Single-Ended Operation
• Undervoltage Lockout
J SUFFIX
CERAMIC PACKAGE
CASE 620-10
Non-Inv
Input
Non-Inv
Input
Inv
Inv
Input
Input
Compenl
PWM Comp
3
1 - - - -.....
Input
Dead
Control
N SUFFIX
PLASTIC PACKAGE
CASE 648-06
ORDERING INFORMATION
(tOP view)
Device
The TL494C is specified over the commercial operating range
of O°C to 70°C. The TL4941 is specified over the industrial range
of - 25°C to 85°C. The TL494M is specified over the full military
range of - 55°C to 125°C.
Package
TL494CN
0° to + 70°C
Plastic DIP
TL494CJ
0" to +70"C
Ceramic DIP
TL4941N
- 25° 10 + 85"C
Plastic DIP
TL4941J
-25" to +85"C
Ceramic DIP
TL494MJ
-55"10 +125°C Ceramic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
3-312
Temperature
Range
TL494
FIGURE 1 - BLOCK DIAGRAM
Output Control
VCC
13
II
RT
,
Feedback PW.M
Error Amp
Comparator Input
Error Amp
Ref.
2
Output
FIGURE 2 - TIMING DIAGRAM
Capacitor CT
FeedbacklP.W.M. Camp.
Dead-Time Control
Flip-Flop
Clock Input
Flip-Flop
Q
Flip-Flop
Q
Output Q2
Emitter
Output
Control
MOTOROLA LINEAR/INTERFACE DEVICES
3-313
TL494
Description
II
The TL494 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building
blocks required for the control of a switching power
supply. (See Figure 1.) An internal-linear sawtooth oscillator is frequency-programmable by two external components, RT and CT. The approximate oscillator frequency is determined by:
f
osc
=_1_.1_
RTe CT
For more information refer to Figure 4.
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor CT to either of two control signals. The NOR
gates, which drive output transistors Q1 and Q2, are
enabled only when the flip-flop clock-input line is in its
low state. This happens only during that portion of time
when. the sawtooth voltage is greater than the control
signals. Therefore, an increase in control-signal amplitude causes corresponding linear decrease of output
pulse width. (Refer to the timing diagram shown in Fig,
ure 2.)
The control signals are external inputs that can be fed
into the dead-time control, the error amplifier inputs,
or the feedback input. The dead-time control comparator has an effective 120 mV input offset which limits
the minimum output dead time to approximately the
first 4% of the sawtooth-cycle time. This would result
in a maximum duty cycle on a given output of 96% with
the output control grounded, and 48% with it connected
to the reference line. Additional dead time may be imposed on the output by setting the dead time-control
input to a fixed voltage, ranging between 0 to 3.3 V.
a
The pulse width modulator comparator provides a
means for the error amplifiers to adjust the output pulse
width from the maximum percent on-time, established
by the dead time control input, down to zero, as the
voltage at the feedback pin varies from 0.5 to 3.5 V. Both
error amplifiers have a common-mode input range from
-0.3 V to (VCC -2V), and may be used to sense powersupply output voltage and current. The error-amplifier
outputs are active high and are ORed together at the
non-inverting input of the pulse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of
the loop.
When capacitor CT is discharged, a positive pulse is
generated on the output of the dead-time comparator,
which clocks the pulse-steering flip-flop and inhibits the
output transistors, Ql and Q2. With the output-control
connected to the reference line, the pulse-steering flipflop directs the modulated pulses to each of the two
output transistors alternately for push-pull operation.
The output frequency is equal to half that of the oscillator. Output drive can also be taken from Ql or Q2,
when single-ended operation with a maximum on-time
of less than 50% is required. This is desirable when the
output transformer has a ringback winding with a catch
diode used for snUbbing. When higher output-drive currents are required for single-ended operation, Ql and
Q2 may be connected in parallel, and the output-mode
pin must be tied to ground to disable the flip-flop. The
output frequency will now be equal to that of the
oscillator.
The TL494 has an internal 5 V reference capable of
sourcing up to 10 mA of load current for external bias
circuits. The reference has an internal accuracy of
± 1.5% with a typical thermal drift of less than 50 mV
over an operating temperature range of 0 to 70°C.
FtGURE 3 - FUNCTIONAL TABLE
Input
Output
Control
Grounded
At Vref
'out =
Output Function
Single-ended P.W.M. at 01 and 02
Push-pull operation
fose
1
0.5
MOTOROLA LINEAR/INTERFACE DEVICES
3-314
TL494
MAXIMUM RATINGS IFull operating ambient temperature range applies unless otherwise noted I
Symbol
TL494C
TL4941
TL494M
Unit
VCC
42
42
42
V
VC1. VC2
42
42
42
V
IC1. IC2
500
500
500
mA
Amplifier Input Voltage Range
VIR
-0.3 to 42
-0.3 to 42
-0.3 to 42
V
Power Dissipation (0 TA
PD
1000
1000
1000
mW
125
150
125
150
150
·C
·C
o to 70
-25 to 85
-55 to 125
·C
-55 to 125
-65 to 150
-55 to 125
-65 to 150
Rating
Power Supply Voltage
Collector Output Voltage
Collector Output Current leach transistorllli
:S;;
45°C
Operating Junction Temperature
Plastic Package
Ceramic Package
TJ
Operating Ambient Temperature Range
TA
Storage Temperature Range
Plastic Package
Ceramic Package
-
·C
Tstg
-65to 150
NOTE 1: Maximum thermal limits must be observed.
THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, Junction to A'mbient
Derating Ambient Temperature
Symbol
N Suffix Plastic Package
J Suffix Ceramic Package
Unit
R"JA
80
100
·CIW
TA
45
50
·C
RECOMMENDED OPERATING CONDITIONS
TL494
Symbol
ConditionNalue
Power Supply Voltage
Collector Output Voltage
Collector Output Current leach transistorl
Min
Typ
Max
Unit
VCC
7.0
15
40
VC1. Ve2
-
30
40
V
-
200
mA
IC1. IC2
Amplifier Input Voltage
Vin
Current Into Feedback Terminal
Ifb
-0.3
V
-
VCC - 2.0
V
0.3
mA
Reference Output Current
Iref
-
-
10
mA
Timing Resistor
RT
1.8
30
500
kH
Timing Capacitor
CT
0.0047
0.001
10
",F
fosc
1.0
40
200
kHz
Oscillator Frequency
-
ELECTRICAL CHARACTERISTICS (Vce = 15 V. CT = 0.01 ",F. RT = 12 kH unless otherwise noted.1
For typical values TA = 25·C. for min/max values TA is the operating ambient temperature range that applies unless otherwise
noted.
.
Characteristic
REFERENCE SECTION
Reference Voltage
(10 = 1.0 mAl
Vref
4.75
5.0
5.25
4.75
5.0
5.25
V
Line Regulation
(VCC = 7.0 V to 40 VI
Regline
-
2.0
25
-
2.0
25
mV
Load Regulation
(10 = 1.0 mA to 10 mAl
Regload
-
3.0
15
-
3.0
15
mV
Short-Circuit Output Current
(Vref = 0 VI
ISC
15
35
75
15
35
75
mA
MOTOROLA LINEAR/INTERFACE DEVICES
3-315
II
•
TL494
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.D1 !LF, RT = 12 kO unless otherwise noted.)
For typical values TA = 25°C, for minimax values TA is the operating ambient temperature range that applies unless otherwise
noted.
Characteristic
OUTPUT SECTION
100
-
2.0
-100
-
-
1.1
1.3
-
-
1.5
2.5
10Cl
-
10
lOCH
-
Output Voltage Rise Time
Common-Emitter (See Figure 13)
Emitter-Follower (See Figure 14)
tr
Output Voltage Fall Time
tf
Collector Off-State Current
(VCC = 40 V, VCE = 40 V~
Emitter Off-State Current
(VCC = 40 V, Vc = 40 V, VE =
a V)
Collector-Emitter Saturation Voltage (2)
Common-Emitter
(VE = a V, IC = 200 mAl
Emitter-Follower
(VC = 15 V, IE = -200 mAl
Output Control Pin Current
low State
(VOC" 0.4 V)
High State
(VOC = Vref)
IC(off)
-
2.0
IE(off)
-
-
VSAT(C)
-
VSAT(E)
100
!LA
-150
!LA
1.1
1.5
V
-
1.5
2.5
V
-
-
10
-
!LA
0.2
3.5
-
0.2
3.5
mA
-
100
200
-
100
200
ns
-
100
200
200
ns
100
-
100
25
25
100
ns
-
40
100
-
40
100
ns
Common-Emitter (See Figure 13)
Emitter-Follower (See Figure 14)
Characteristic
ERROR AMPLIFIER SECTIONS
Input Offset Voltage
(VO (Pin 3) = 2.5 V)
VIO
-
2.0
10
mV
Input Offset Current
(Va (Pin 3) = 2.5 V)
110
-
5.0
250
nA
Input Bias Current
(Va (Pin 3) = 2.5 V)
liB
-
-0.1
-1.0
!LA
Input Common-Mode Voltage Range
(VCC = 40 V, TA = 25°C)
VICR
-0.3 to
VCC-2.0
-
-
V
Open-loop Voltage Gain
(aVO = 3.0 V, Vo = 0.5 to 3.5 V,
Rl = 2.0 ~1I).
AVOl
70
95
-
dB
fC
-
350
-
kHz"
0m
-
65
-
deg.
CMRR
65
90
PSRR
-
lOa,
-
dB
'0.3
0.7
-
mA
-2.0
-4.0
-
mA
Unity-Gain Crossov!3r Frequency
(Va
= 0.5 to 3.5 V,
Rl = 2.0 kll)
Phase Margin at Unity-Gain
(Va = 0.5 to 3.5 V, Rl = 2.0 k!l)
Common-Mode Rejection Ratio
(VCC = 40 V)
Power Supply Rejection Ratio
(aVCC = 33 V, Vo = 2.5 V, Rl
Output Sink,Current
(Va (Pin 3) =0.7 V)
Output Source Current
(Va (Pin 3) = 3.5 V)
:'
0',
dB
= 2.0k!!)
'10,
10+
NOTE 2: Low duty cycle pulse techniques are used during test to maintain ju~ction temperature as close to ambient temperatures as possible.
MOTOROLA LINEAR/INTERFACE DEVICES
3-316
TL494
ELECTRICAL CHARACTERISTICS (VCC ~ 15 V, CT ~ 0.01 /LF, RT ~ 12 k!l unless otherwise noted.)
For typical values TA ~ 25°C, for minimax values TA is the operating ambient temperature range that applies unless otherwise
noted.
Characteristic
PWM COMPARATOR SECTION (Test Circuit Figure 12)
Input Threshold Voltage
(Zero duty cycle)
VTH
-
3.5
4.5
V
Input Sink Current
(V(Pin 3) ~ 0.7 V)
11-
0.3
0.7
-
mA
Input Bias Current (Pin 4)
(VPin 4) ~ a to 5.25 V)
liB (DT)
-
-2.0
-10
Maximum Duty Cycle, Each Output, Push-Pull Mode
(VPin 4 ~ a V, CT ~ 0.Q1 /LF, RT ~ 12 k!l)
(VPin 4 ~ a V, CT ~ 0.001 /LF, RT ~ 30 k!l)
DC max
45
48
45
50
50
a
2.8
3.3
-
-
fosc
-
40
-
kHz
crfosc
-
3.0
-
0/0
Frequency Change with Voltage
(VCC ~ 7.0 V to 40 V, TA ~ 25°C)
afosc (aV)
-
0.1
-
0/0
Frequency Change with Temperature
(aTA ~ Tlow to Thigh)
(CT ~ 0.Q1 /LF, RT ~ 12 k!l)
Mose (aT)
-
-
12
0/0
7.0
V
DEAD-TIME CONTROL SECTION (Test Corcuit Figure 12)
0/0
-
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
VTH
/LA
V
OSCILLATOR SECTION
Frequency
(CT ~ 0.001 /LF, RT ~ 30 k!l)
Standard Deviation of Frequency*
(CT ~ 0.001 /LF, RT ~ 30 k!l)
UNDERVOLTAGE LOCKOUT SECTION
I Turn-On Threshold (VCC Increasing, Iref ~ 1.0 mAl
Vth
6.43
5.5
TOTAL DEVICE
Standby Supply Current
(Pin 6 at Vref, All Other Inputs and Outputs Open)
(VCC ~ 15 V)
(VCC ~ 40 V)
ICC
Average Supply Current
(V(Pin 4) ~ 2.0 V) (See Figure 12)
(CT ~ 0.01 /LF, RT ~ 12 k!l, VCC ~ 15 V)
-
mA
-
* Standard deviation is a measure of the statistical distributIOn about the mean as derived from the formula.
(T
-
5.5
7.0
10
15
7.0
-
N
2:
IX n - )(12
n = ,
---N - 1
MOTOROLA LINEAR/INTERFACE DEVICES
3-317
mA
II
•
TL494
FIGURE 4 - OSCILlATOR FREQUENCY
versus TIMING RESISTANCE
FIGURE 5 -
120
110
~ 100
500K
0;
VCC~15V
~
~ 100K
z
CT
~
[--i--+-
0.oo1"F
~ 90
~
~If
~
BO
OPEN-LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
I
-
VCC ~ 15V , _
t:.VO~3.0V
RL
.........
0.
0.01"F
o
g
Z
~
~
~ 1.0K
500
1.0K
2.0K
5.0K
""
60
50
40
10K 20K
50K 100K
RT, TIMING RESISTANCE 1m
200K
500K 1.0M
10
100
1.0K
10K
I. FREQUENCY IHzl
III
16
0"~ 1
2 ~
J
CT ~ 0.001 "F
14
If
V
~
~
i'..
O.o1"F
4.0
I ! 111_ eIIIII
52.0
o
500
1.0K
r---..
-t
10K
100K
IOSC, OSCILLATOR FREQUENCY (Hzl
..........
o
o
500K
1.9
>-
3.5
1.B
~
~ 1.6
-V
--
-
~ 1.5
~
I--
~ 1.4
~ 1.3
~
--
~
I---
§
o
v,.,
§; 1.4
z
o
~ 1.2
::>
~
1.0
~ O.B
w
~ 0.6
0.4
100
200
300
IE, EMITTER CURRENT (mAl
400
--- ---
V
o
100
200
300
IC, COLLECTOR CURRENT (mAl
MOTOROLA LINEAR/INTERFACE DEVICES
3-318
V
r-
~ 1.2
1.1
3.0
2.0
1.B
1.7
1.0
2.0
VDT, DEAD-TIME CONTROL VOLTAGE (VI
FIGURE 9 - COMMON EMITTER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
COLLECTOR CURRENT
FIGURE 8 - EMITTER FOLLOWER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
EMITTER CURRENT
1.6
-
"'flo,.
~ 6.0
~
1BO
1.0M
VOC ~ Vrel
11 CT ~ O.o1"F RT ~ 10 kll
f-21 CT ~ 0.001 "F
RT~30kfl
f--
~
./
~ 8,0
w
"
VCC~15V
t-
a
100K
50
~ 10
«
if'
~
\11
~ 12
~
e
FIGURE 7 - PERCENT DUTY CYCLE versus
DEAD-TIME CONTROL VOLTAGE
0
~1 B
'"
~
.........
~
::B
100 ~
~ 120 ~
140 ~
I'...
160 -e.
o
1.0
80
q,
"-
FIGURE 6 - PERCENT DEAD-TIME versus
OSCILLATOR FREQUENCY
:=
15
40
60
30
«~ 20
10
0.1J-
2.0kfl20 Vi
§: 70
~
~ 10K
~
AVOL
400
TL494
FIGURE 10 - STANDBY SUPPLY CURRENT
versus SUPPLY VOLTAGE
10
9.0
8.0
r.1
«
E 7.0
>-
6.0
z
co
co 5.0
6
30
~2.0
1.0
•
I
I
4.0
~
o/
o
/
/
I
5.0
10
15
20
25
30
35
40
Vee. SUPPLY VOLTAGE IVI
FIGURE 11 - ERROR AMPLIFIER CHARACTERISTICS
FIGURE 12 - DEAD-TIME AND FEEDBACK CONTROL
TEST CIRCUIT
Vcc = ISV
+----.....--,
ISO
2W
Tes'
Inputs
Output 1
Dead Time
1
EI
Feedback
Feedback
C2
RT
CT
Terminal
IPin 31
Output 2
E2
1+ll
I-I
1+ I (ErrOr
I-I
Output
Control
Amplifier
SOk
Ref
Oul
Gnd
FIGURE 13 - COMMON-EMITTER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
FIGURE 14 - EMITTER-FOLLOWER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
IS V
IS V
RL
68
Each
Each
Output
Output
Transistor
Vc
C
CL
IS pF
CL
I'SPF
Transistor
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
3-319
•
TL494
FIGURE 15 -
ERROR-AMPLIFIER SENSING TECHNIQUES
Vref
Vo
To Output
Voltage of
System
RI
R2
3
Rl
NEGATIVE OUTPUT VOLTAGE
Vref
2
R2
Vo
POSITIVE OUTPUT VOLTAGE
Vo
~
Vref (1
+~I
To Output
Voltage of
System
FIGURE 16 -
FIGURE 17 -
DEAD-TIME CONTROL CIRCUIT
SOFT-START CIRCUIT
Output
Control 0-----<0-----,
Output
Vref
o
.
T
RI
Vref
o utput
4
DT
0--- 0
DT
Cs
4
CT
RS
R2
6
30 k
10.001
Max % on Tim:, Each Output
~
45 _ (
80 RI )
1 + R2
FIGURE 18 -
OUTPUT CONNECTIONS FOR SINGLE-ENDED AND
PUSH-PULL CONFIGURATIONS
CI
CI
Oc
01
Output
Control
El
E
2.4 V '" VOC '" VREF
500 mA
C2
0", VOC '" 0.4 V
02
01
EI
Go 250mA
Output
control
C2
02
E2
E2
OE
Push-Pull Configuration
Single Ended Configuration
MOTOROLA LINEAR/INTERFACE DEVICES
3-320
G0250mA
TL494
FIGURE 1. -
SLAVING TWO OR MORE CONTROL CIRCUITS
FIGURE 20 -
OPERATION WITH VIN > 40 V USING
EXTERNAL ZENER
Vret
RS
VCC
Master
II
Slave
(Additional
Circuits)
FIGURE 21 -
+Vin
PULSE-WIDTH MODULATED PUSH-PULL CONVERTER
= S.O to 20 V
L
2
o.dT
1M
33k
3
0.01
I- 15
r--<
+VO
12
..-
8
-
t----
Cl
TL494
Camp
II
-
C2
~'
32
OC VREF DT CT
13
141+ ~
RT Gnd El
1
7
6
4.7 k
10
10 k
4.7 k
......
I
~I~
•...
t----
--
+;
9J 10 1
r-~~ V L-.<
1
E2
47
lN4934
240
15k
0.001
1
All capacitors in IJ.F
L1 - 3.5 mH (i;i 0.3 A
T1 - Primary: 20T C.T. #28 AWG
Secondary: 120T C.T. #36 AWG
Core: Ferroxcube 140SP-LOO-3C8
TEST
CONDITIONS
Line Regulation
Vin
Load Regulation
Vin
Output Ripple
Vin
Short Circuit Current
Vin
Efficiency
Vin
=
=
=
=
=
RESULTS
10 V to 40 V
14 mV
0.28%
= 1 mA to 1 A
28 V, 10 = 1.0 A
28 V, RL = 0.1 n
28 V, 10 = 1 A
3.0 mV
0.06%
28 V, 10
65 mV pop
3-321
P.A.R.D.
1.6 amps
MOTOROLA LINEAR/INTERFACE DEVICES
2SV
22
k
Ll
TIP 50
32 25~
16
r-- +
Tl
=
'0 = 0.2 A
lN4934
47
VCC
+
71%
4.7 k
+
50
35 V
1
TL494
FIGURE 22 - PULSE-WIDTH MDDULATED STEP-DOWN CONVERTER
1.0mH «i 2A
+Vin = 10t040V
+VO = 5.0 V
TIP 32A
~.L
10
=
47
II
150
47 k
12
S>-;-;[
Cl
VCC
C2 Comp
-
50
OV
+
+
TL494
VREF
-
O.~t;
1M
3
2
5.1 k
1
500,;;;
15
5
>
0.001
D.T. O.C. Gnd El E2
RT
r:
6
14 J,13
7
+
~~ MRS50 10 V
16
CT
5.1 k
14
5.1 k
+ 1---1
+
91 10
150
47
k
-
I·l
All capacitors in .,.F
TEST
CONDITIONS
Line Regulation
Vin
Load Regulation
Vin
Output Ripple
Vin
Short Circuit Current
Vin
Efficiency
Vin
= S.O to 40 V
= 12.6 V, 10 = 0.2 to 200
= 12.6 V, 10 = 200 mA
= 12.6 V, RL = 0.1 II
= 12.6 V, 10 = 200 mA .
RESULTS
mA
3.0mV
0.01%
5.0 mV
0.02%
40 mV pop
MOTOROLA LINEAR/INTERFACE DEVICES
3-322
P.A.R.D.
250 mA
72%
50
10 V
1.0A
®
TL594
MOTOROLA
Advance Information
PRECISION SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUIT
PRECISION SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUITS
The TL594 is a fixed frequency, pulse width modulation control
circuit designed primarily for Switchmode power supply control.
This device features:
• Complete Pulse Width Modulation Control Circuitry
• On-Chip Oscillator With Master Or Slave Operation
• On-Chip Error Amplifiers
~
• On-Chip 5 Volt Reference, 1.5% Accuracy
• Adjustable Dead-Time Control
16~it)~ ~
• Uncommitted Output Transistors Rated to 500 mA Source Or Sink
• Output Control For Push-Pull Or Single-Ended Operation
u
• Undervoltage Lockout
J SUFFIX
CERAMIC PACKAGE
CASE 620-10
Non-In ...
16
Input
Inv
Input
Inv
Input
Input
Campen!
PWM Comp
Non-In ...
3
r-----...J
".
VAEF
Input
Dead
Output
Control
1
Vee
N SUFFIX
PLASTIC PACKAGE
CASE 648-06
Ground
71-------'
(top view)
ORDERING INFORMATION
The TL594C is specified over the commercial operating range
of O°C to 70°C. The TL5941 is specified over the industrial range
of - 25°C to 85°C. The TL594M is specified over the full military
range of - 55°C to 125°C.
Device
TL594CN
Package
0° to +70°C
Plastic DIP
TL5941N
- 25° to + 85°C
Plastic DIP
TL594MJ
-55° to + 125°C Ceramic DIP
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-323
Temperature
Range
•
•
TL594
FIGURE 1 - BLOCK DIAGRAM
Output Control
VCC
13
4
Dead-Time
Control
12
VCC
3.5 V ..L
16
14
Error Amp
Ref.
Output
7
Gnd
Feed back P W M
Error Amp
1
Comparator Input
2
FIGURE 2 - TIMING DIAGRAM
Capacitor CT
Feedback P.w.M. Camp
Dead- Time Control
Flip-Flop
Clock Input
Flip-Flop
o
Flip-Flop
o
Output 01
Emitter
Output 02
Emitter
Output
Control
MOTOROLA LINEAR/INTERFACE DEVICES
3-324
TL594
Description
The pulse width modulator comparator provides a
means for the error amplifiers to adjust the output pulse
width from the maximum percent on-time, established
by the dead time control input, down to zero, as the
voltage at the feedback pin varies from 0.5 to 3.5 V. Both
error amplifiers have a common-mode input range from
- 0.3 V to (VCC - 2 VI, and may be used to sense powersupply output voltage and current. The error-amplifier
outputs are active high and are ORed together at the
non-inverting input of the pUlse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of
the loop.
When capacitor CT is discharged, a positive pulse is
generated on the output of the dead-time comparator,
which clocks the pulse-steering flip-flop and inhibits the
output transistors, 01 and 02. With the output-control
connected to the reference line, the pulse-steering flipflop directs the modulated pulses to each of the two
output transistors alternately for push-pull operation.
The output frequency is equal to half that of the oscillator. Output drive can also be taken from 01 or 02,
when single-ended operation with a maximum on-time
of less than 50% is required. This is desirable when the
output transformer has a ring back winding with a catch
diode used for snubbing. When higher output-drive currents are required for single-ended operation, 01 and
02 may be connected in parallel, and the output-mode
pin must be tied to ground to disable the flip-flop. The
output frequency will now be equal to that of the
oscillator.
The TL594 has an internal 5.0 V reference capable of
sourcing up to 10 mA of load current for external bias
circuits. The reference has an internal accuracy of
± 1.5% with a typical thermal drift of less than 50 mV
over an operating temperature range of 0 to 70°C_
The TL594 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building
blocks required for the control of a switching power
supply. (See Figure 1.) An internal-linear sawtooth oscillator is frequency-programmable by two external components, RT and CT. The approximate oscillator frequency is determined by:
f
osc
=_1_.2_
RTe CT
For more information refer to Figure 4.
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor CT to either of two control signals. The NOR
gates, which drive output transistors 01 and 02, are
enabled only when the flip-flop clock-input line is in its
low state. This happens only during that portion 'of time
when the sawtooth voltage is greater than the control
signals. Therefore, an increase in control-signal amplitude causes a corresponding linear decrease of output
pulse width. IRefer to the timing diagram shown in Figure 2.1
The control signals are external inputs that can be fed
into the dead-time control, the error amplifier inputs,
or the feedback input. The dead-time control comparator has an effective 120 mV input offset which limits
the minimum output dead time to approximately the
first 4°'0 of the sawtooth-cycle time. This would result
in a maximum duty cycle on a given output of 96°'0 with
the output control grounded, and 48°'0 with it connected
to the reference line. Additional dead time may be imposed on the output by setting the dead time-control
input to a fixed voltage, ranging between 0 to 3.3 V.
FIGURE 3 -
FUNCTIONAL TABLE
Input
fout =
Output Function
Output
Control
Grounded
AtVref
fose
Single-ended P.W.M. at 01 and 02
Push~pull
1
0.5
operation
MOTOROLA LINEAR/INTERFACE DEVICES
3-325
•
•
TL594
MAXIMUM RATINGS (Full operating ambient temperature range applies unless otherwise noted I
Rating
Power Supply Voltage
Collector Output Voltage
Collector Output Current (each transistor) (Note 1)
Amplifier Input Voltage Range
Power Dissipation
(0
TA
~
Symbol
Tl594C
TL5941
TL594M
Unit
VCC
42
42
42
V
VC1, VC2
42
42
42
V
IC1,IC2
500
500
500
mA
~0.3
VIR
45°C
Po
Operating Junction Temperature
Plastic Package
to 42
~0.3
to 42
1000
1000
125
125
-
-
~0.3
to 42
1000
"C
TJ
Ceramic Package
Operating Ambient Temperature Range
Storage Temperature Range
Plastic Package
Ceramic Package
V
mW
~
o to 70
TA
150
25 to 85
~55
to 125
°c
"C
Tstg
~
55 to 125
-
55 to 125
-
-
~65to
150
NOTE 1: MaXimum thermal limits must be observed.
THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, Junction to Ambient
Derating Ambient Temperature
Symbol
N Suffix Plastic Package
J Suffix Ceramic Package
Unit
R"JA
80
100
CW
TA
45
50
'c
RECOMMENDED OPERATING CONDITIONS
,---Tl594
Symbol
Condition/Value
Power Supply Voltage
Collector Output Current (each transistor)
Unit
Max
7.0
15
40
V
VC1, VC2
-
30
40
V
IC1,IC2
-
VCC
Collector Output Voltage
Typ
Min
Amplifier Input Voltage
Vin
Current Into Feedback Terminal
Ifb
03
200
-
-
-
mA
2.0
VCC
V
0.3
mA
10
mA
Reference Output Current
Iref
-
-
Timing Resistor
RT
1.8
30
500
kll
Timing Capacitor
CT
0.0047
0.001
10
J.'F
fosc
10
40
200
kHz
-
5.3
V
Oscillator Frequency
PWM Input Voltage (Pins 3, 4 & 131
0.3
-
~ 15 V, CT ~ 0.01 "F, RT
12 kl! unless otherwise noted.1
25 C, for min max values TA is the operating ambient temperature range that applies unless otherwise
ELECTRICAL CHARACTERISTICS {VCC
For typical values TA
noted.
G
Characteristic
REFERENCE SECTION
Reference Voltage
(10 ~ 1.0 mA, TA
(10 ~ 1.0 mAl
V
Vref
~
4.925
4.9
25"CI
5.0
-
5.075
5.1
4.925
4.9
5.0
-
5.075
5.1
Line Regulation
{VCC ~ 7.0 V to 40 VI
Regline
-
2.0
25
-
2.0
25
mV
Load Regulation
(10 ~ 1.0 mA to 10 mAl
Regload
-
2.0
15
-
2.0
15
mV
15
40
75
15
40
75
mA
Short-Circuit Output Current
(Vref ~ 0 VI
ISC
MOTOROLA LINEAR/INTERFACE DEVICES
3-326
TL594
ELECTRICAL CHARACTERISTICS (VCC ~ 15 V, CT ~ 0.Q1 p.F, RT ~ 12 k!l unless otherwise noted.)
For typical values TA
noted.
~
25°C, for minimax values TA is the operating ambient temperature range that applies unless otherwise
Characteristic
OUTPUT SECTION
IC(off)
-
2.0
100
-
2.0
100
p.A
IE(off)
-
-
-100
-
-
-100
p.A
VSAT(C)
-
1.1
1.3
-
1.1
1.5
V
VSAT(E)
-
1,5
2,5
-
1.5
2,5
V
10CL
-
0.1
-
-
0.1
-
p.A
lOCH
-
2.0
20
-
2,0
20
p.A
Output Voltage Rise Time
Common-Emitter (See Figure 13)
Emitter-Follower (See Figure 14)
tr
-
100
200
-
100
200
ns
-
100
200
-
100
200
ns
Output Voltage Fall Time
Common-Emitter (See Figure 13)
Emitter-Follower (See Figure 14)
tf
-
40
100
-
40
100
ns
-
40
100
-
40
100
ns
Collector Off-State Current
(VCC ~ 40 V, VCE ~ 40 V)
Emitter Off-State Current
(VCC ~ 40 V, Vc ~ 40 V, VE
~
a V)
Collector-Emitter Saturation Voltage (Note 2)
Common-Emitter
(VE ~ 0 V, IC ~ 200 mAl
Emitter-Follower
(VC ~ 15V,IE ~ -200mA)
Output Control Pin Current
low State
(VOC '" 0.4 V)
High State
(VOC ~ Vref)
Characteristic
ERROR AMPLIFIER SECTIONS
Input Offset Voltage
(Va (Pin 3) ~ 2.5 V)
Via
-
2.0
10
mV
Input Offset Current
(Va (Pin 3) ~ 2.5 V)
110
-
5,0
250
nA
Input Bias Current
(Va (Pin 3) ~ 2.5 V)
liB
-
-0.1
-1.0
p.A
VICR
a to
Vec-2.0
-
-
V
VIR(lNV)
-0,3 to
VCC-2.0
-
-
V
Open-Loop Voltage Gain
(dVO ~ 3.0 V, Va ~ 0.5 to 3.5 V,
RL ~ 2.0 klll
AVOL
70
95
-
dB
Unity-Gain Crossov~r Frequency
(Va ~ 0.5 to 3.5 V, RL ~ 2,0 kll)
fC
-
700
-
kHz
Phase Margin at Unity-Gain
(Va ~ 0,5 to 3,5 V, RL ~ 2,0 k!l)
0m
-
65
-
deg,
CMRR
65
90
-
dB
PSRR
-
100
-
dB
Output Sink Current
(Va (Pin 3) ~ 0.7 V)
10-
0,3
0,7
-
mA
Output Source Current
(Va (Pin 3) ~ 3.5 V)
10+
-2,0
-4.0
-
mA
Input Common-Mode Voltage Range
(VCC ~ 40 V, TA ~ 25°C)
Inverting Input Voltage Range
Common-Mode Rejection Ratio
(VCC ~ 40 V)
Power Supply Rejection Ratio
(dVCC ~ 33 V, Va ~ 2,5 V, RL
~
2,0 kll)
NOTE 2: low duty cycle pulse techmques are used durmg test to maintain Junction temperature as close to ambient temperature as possible.
MOTOROLA LINEAR/INTERFACE DEVICES
3-327
II
TL594
ELECTRICAL CHARACTERISTICS (VCC = 15 V. CT = 0.01 p.F. RT = 12 k!l unless otherwise noted.)
For typical values TA
noted.
= 25°C. for
minimax values TA is the operating ambient temperature range that applies unless otherwise
Characteristic
II
PWM COMPARATOR SECTION (Test Circuit Figure 12)
Input Threshold Voltage
(Zero Duty Cycle)
VTH
-
3.6
4.5
V
Input Sink Current
(VPin 3 = 0.7 V)
11-
0.3
0.7
-
mA
Input Bias Current (Pin 4)
(VPin 4 = a to 5.25 V)
liB (DT)
-
-2.0
-10
Maximum Duty Cycle. Each Output •. Push-Pull Mode
(VPin 4 = a v. CT = 0.01 flF. RT= 12 klll
(VPin 4 = a v. CT = 0.001 flF. RT = 30 k!l)
DC max
45
50
-
48
45
-
2.8
3.3
0
-
-
-
40
10
-
DEAD-TIME CONTROL SECTION (Test Circuit Figure 12)
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
p.A
%
V
VTH
OSCILLATOR SECTION
Frequency
(CT = 0.001 p.F. RT = 30 k!ll
(CT = 0.01 p.F. RT = 12 kll. TA = 25°C I
(CT = 0.01 p.F. RT = 12 kll. TA = Tlow to Thiohl
kHz
fasc
9.2
9.0
-
(rfosc
-
1.5
-
%
Frequency Change with Voltage
(VCC = 7.0 V to 40 V. T A = 25°CI
.1fosc (.1VI
-
0.2
1.0
%
Frequency Change with Temperature
.1fosc I.1TI
-
4.0
-
%
4.0
3.5
5.2
-
6.0
6.5
100
50
150
150
300
300
Standard Deviation of Frequency·
(CT = 0.001 p.F. RT = 30 kill
(~TA
10.8
12
= Tlow·to Thioh. CT = 0.01 p.F. RT = 12 klll
UNDERVOLTAGE LOCKOUT SECTION
Turn-On Threshold (VCC Increasing. Iref = 1.0 mAl
TA = 25°C
T A = Tlow to Thigh
Vth
Hysteresis
VH
TL594C.1
TL594M
V
mV
TOTAL DEVICE
Standby Supply Current
(Pin 6 at Vref. All Other Inputs and Outputs Openl
(VCC = 15 V)
(VCC = 40 VI
ICC
Average Supply Current
(VPin 4 = 2,0 V. CT = 0.01 p.F. RT = 12 kll.
Vec = 15 V. See Figure 121
-
mA
-
8.0
8.5
15
18
-
11
-
N
·Standard deviation is a measure of the statistical distribution about the mean as derived from the formula.
fT
MOTOROLA LINEAR/INTERFACE DEVICES
3-328
-"'-
l
IX n - )(1 2
n .:... 1
N - 1
mA
TLS94
FIGURE 4 - OSCILLATOR FREQUENCY
versus TIMING RESISTANCE
FIGURE 5 -
OPEN·LOOP VOLTAGE GAIN AND PHASE
versus FREQUENCY
120
I
:s
~
0
-"
0
:t
VCC~15V,_
r---
t;VO~3.0V
RL
"'"
70
60
"'"
50
4D
'"
"'" "'"
30
10
FIGURE 6 - PERCENT DEAD·TIME versus
OSCILLATOR FREQUENCY
III
~
II
o=>
.ll
l.OK
~
t
'"~
1.6
0
>
z
01.5
~
?
~
--
1.4
~1.3
~
- --- -
~
----: - - .-
0;
w
?
«
'"
''i?"
f---
f----
100
~=>
~
400
-
1.6
-
---
1.2
1.0 - - - -
ro
- c--- - ;.>
V--
100
V-
-- --
200
300
Ie COLLECTOR CURRENT ImAI
MOTOROLA LINEAR/INTERFACE DEVICES
3-329
3.5
FIGURE 9 - COMMON EMITTER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
COLLECTOR CURRENT
14
:Jl 08
~ 06
-
200
300
IE, EMITTER CURRENT ImAI
--
30
18 --
0.4
o
1.0
2.0
VDT, DEAD-TIME CONTROL VOLTAGE IVI
z
0
---
1.2
1.1
......
"-I'
o
----
---
""
10
a
500K
VCC
15V
f-VOC ~ Vret
11 CT = O.Q1I'F f-RT = 10 kll
21 CT = O.OOlI'F t-RT = 30 kll f--
~
Z
"t' j
1.8
~
>-
2.0
1.7
~
>=>
C>
1.9
w
"'"
0
>- 20
FIGURE 8 - EMITTER FOLLOWER CONFIGURATION
OUTPUT SATURATION VOLTAGE versus
EMITTER CURRENT
?:
~
~
[ill
10K
lOOK
fOSC, OSCILLATOR FREQUENCY IHzl
2
u
r-
'"',C
][_--
~1
~ 30
~
./
--
'"
40
or
V
2
500
>=>
J
4
o
lOOK
160
180
1.0M
50
CT - 0.001 I'F
0
1.0K
10K
f, FREQUENCY IHzl
80 ~
100 ~
120 ~
140 ~
FIGURE 7 - PERCENT DUTY CYCLE versus
DEAD·TIME CONTROL VOLTAGE
III
6
100
~
w
20
1.0
o
20
o
0
2.0kll-
40 @
60 e
10
8
~
AVOL
V
4D0
-e.
II
TL594
FIGURE 10 -
STANDBY SUPPLY CURRENT
FIGURE 11 -
versus SUPPLY VOLTAGE
10
?: 6.0
9.0
g
8.0
II
E
>-
i
6.0
~
4.0
:0
U
!;:r:
r
'i' 7.0
>-
::::>
;2
g 5.0
5.0
J
w
C?
~
I
.B 20
/
oIf
......-
V
v-:: f----""
TURN ON ___
--:!=--
....---
...-
-- TURN OFF
--
o
ffi
/
4.5
'"
z
:0
1.0
o
-
_ 5.5
II
3.0
UNDERVOLTAGE LOCKOUT THRESHOLDS
versus REFERENCE LOAD CURRENT
5.0
10
FIGURE 12 -
Xc
i
:t" 40
15
20
25
VCC. SUPPLY VOLTAGE IVI
30
35
o
40
ERROR AMPLIFIER CHARACTERISTICS
5.0
FIGURE 13 -
10
15
20
25
30
IL. REFERENCE LOAD CURRENT ImAI
35
40
DEAD-TIME AND FEEDBACK CONTROL
TEST CIRCUIT
15 V ~----'1>---,
Vcc
150
2W
Test
Inputs
Feedback
Terminal
IP,n 31
Hf---~o Output 1
1
0-----1 Feedback
H>---o Output
RT
CT
I'll
I-I
r---+-....., t • ) \
E"o'
)-1
Ref
Output
Control
Amplifier
50 II.
2
E2
Out
Gnd
FIGURE 15 - EMITTER-FOLLOWER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
FIGURE 14 - COMMON-EMITTER CONFIGURATION
TEST CIRCUIT AND WAVEFORM
15 V
I
15 V
RL
Ls
Each
Output
Vc
Each
Output
TranSistor
CL
15 pF
I
TranSistor
90''/0
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
3-330
CL
'5 PF
TL594
FIGURE 16 -
ERROR-AMPLIFIER SENSING TECHNIQUES
Vo
To Output
Voltage of
System
R1
3~rro'r1-=-
•
R2
Amp
2
NEGATIVE OUTPUT VOLTAGE
R2
Vo
POSITIVE OUTPUT VOLTAGE
Vo
FIGURE 17 -
~
Vref 11
RI
Vo
+~)
To Output
Voltage of
System
DEAD-TIME CONTROL CIRCUIT
FIGURE 18 -
SOFT-START CIRCUIT
Output
Control
R1
Output
o
DT
0
Cs
Output
Vref
RT
RS
R2
6
1°.
30 k
001
Max % on Time. Each Output
.
~ 45 _ (
80 Rl)
1 +-
A2
FIGURE 19 -
OUTPUT CONNECTIONS FOR SINGLE-ENDED AND
PUSH-PULL CONFIGURATIONS
C1
C1
Oc
01
Output
Control
2.4 V " VOC " VAEF
E1
E500mA
01
02
~o 250 mA
C2
C2
0" VOC '" 0.4 V
E1
Output
Control
02
E2
E2
OE
Single Ended Configuration
Push-Pull Configuration
MOTOROLA LINEAR/INTERFACE DEVICES
3-331
G0250mA
TL594
FIGURE 20 -
FIGURE 21 -
SLAVII\IG TWO OR MORE CONTROL CIRCUITS
OPERATION WITH VIN > 40 V USING
EXTERNAL ZENER
Vre!
..
RS
VCC
Master
RT
Vz
lN975A
~ 39 V
Slave
(Additional
Circuits)
FIGURE 22 +
Yin
~
PULSE-WIDTH MODULATED PUSH-PULL CONVERTER
8.0 to 20 V
L
12
1, . - - - - - - - - - - - - ' - - - - - - - - - ,
VCC
Lr'~IN\rl
...TI-P--t--1l Tl
C
1r'
1M
33k
3
r:
~f IHo
15
11
;------ 1.0 ms) are sufficient to affect temperature gradients across
the die. These temperature gradients can cause a change in
are due to the temperature coefficient of the device.
Figure 1 shows the line and thermal regulation response of
a typical TL7BO-05C to a 10 watt input pulse. The variation of
the output voltage, in addition to changes caused by line and
the output voltage due to line regulation is labeled CD and the
load regulation. Longer pulse widths and thermal gradients
make it desirable to specify thermal regulation.
Thermal regulation is defined as the change in output voltage caused by a change in dissipated power for a specified
thermal regulation component is labeled ®. Figure 2 shows
the load and thermal regulation response of a typical TL7BO05C to a 15 watt load pulse. The output voltage variation due
to load regulation is labeled
Vin-VO = 5.0 V
10 = 5.0mA
1
Vo = 5.0 V
Vin = 7.5 V
lout = 1.0 A
f--CO=O
TJ = 25°C
t--
r---..
r
0.998
25
........
r-......
"
-
1
/
3
50
75
100
125
TJ, JUNCTION TEMPERATURE (OC)
/'
104
1.0
150
10
100
MOTOROLA LINEAR/INTERFACE DEVICES
3-337
1.0 k 10 k
100 k
f, FREQUENCY (Hz)
1.0 M
10 M 100 M
II
•
TL780 Series
FIGURE 6 - RIPPLE REJECTION versus
OUTPUT CURRENT
FIGURE 5 - RIPPLE REJECTION versus FREQUENCY
100
~
80
z
a
~
~
'"
-
/
~
/'
10U\ = 1.5A
60
~
cC
100
1-
10U\ = 50 mA
Vo
= 5.0 V
r-Vin = 10V
Co = 0
r- TJ = 2S"C
1
40
-
20
1.0
10
~
z
~
\
~
~
\
60
0:
Vo = 5.0 V
Vin = 10V
= 0
f = 120Hz
TJ = WC
II III
-
Co
-
~
~
40
_\
1.0 k 10 k 100 k
f. FREQUENCY (Hz)
100
80
a
;:::
1.0M
10 M
[[
30
0.01
100 M
0.1
1.0
lou\, OUTPUT CURRENT (A)
FIGURE 8 - BIAS CURRENT versus
OUTPUT CURRENT
FIGURE 7 - BIAS CURRENT versus
INPUT VOLTAGE
4.0
5.0
r.
....... TJ = 2S"C
IU
II
II
4.0
1
I""'-TJ = 12S"C
TJ
t-
~ 3.0
I
1.o
I
~
a;
2.0
I
.!i>
1,,1 1
Vin'VO = 5.0 V
i f 1II
1.0
20
Vin, INPUT VOLTAGE (Vdc)
I II
o
40
30
0.01
0.1
1.0
lou\, OUTPUT CURRENT (A)
FIGURE 9 - DROPOUT VOLTAGE
2.5
---- --
4.0
10
L
~ 3.0
~
1.0A
~O =1 500mA
5
I--
0
r----I10 = 10mA
t-
ia
I
2.0
.9 1.0
5
-50
-25
10
FIGURE 10 - PEAK OUTPUT CURRENT
AVOU\ = 100 mV
0
~ 2S"C
~1=112S;C
::>
u
Vo = 5.0 V
10U\ = 1.0A
TJ = ~S"C
TJ = 12S"C
0-1=
10
0
-75
10
0
25
50
75
TA, AMBIENT TEMPERATURE ("C)
100
125
r ----.."
1/
V
f
I
TJ = 25"C
"~ /
" ~........
TJ = 12S"C
/
~
~ t::::,...,
20
10
30
Vin'VO, INPUT·OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
3-338
40
TL780 Series
FIGURE 11 -
LINE TRANSIENT RESPONSE
8
FIGURE 12 -
Vo ~ 5.0 V
lout ~ 150 mA - r-Co ~ 0
-r-TJ ~ 25'C
6
4
2
~
~~'"
O.
!:;Q
2
~o_O. 2
4
z
1. 5
1. 0
I
~~ O. 5
I
!\
\
~=>
-<'u
10
20
30
40
10
t, TIME I/LS)
t,
FIGURE 13 - WORST CASE POWER DISSIPATION
versus AMBIENT TEMPERATURE
20
in
~
IlHs
16
""
~
z
o
~
12
gj
~ 8.0
~
rP
iiHs
-50
IlHs
~
~ 5'CfW\ .
~ 15'C~~
r-:.:::.t
I
--+-No Heat Sink
4.0
o
9JC ~ 5'CfW
_
9JA ~ 62.5'CfW
TJlmax) ~ 150'C-
~ O'CfW
""
-25
25
50
\.
I'--,
r\
r--75
100
\.
--
""'"
.\.
~
125
150
TA, AMBIENT TEMPERATURE I'CI
MOTOROLA LINEAR/INTERFACE DEVICES
3-339
II
(
o~
5
0
5.0 V
Vin~10V
Co ~ 0
1
~~-O, 1
~
Vo
0
0
0
LOAD TRANSIENT RESPONSE
O. 3
O. 2
20
T1MEI/LS1
30
40
..
®
UC3842A,43A
UC2842A,43A
MOTOROLA
Advance Information
HIGH PERFORMANCE
CURRENT MODE CONTROLLER
HIGH PERFORMANCE CURRENT MODE CONTROLLER
The UC3842A, UC3843A series are high performance fixed frequency current mode controllers. They are specifically designed
for Off-Line and DC-to-DC converter applications offering the
designer a cost effective solution with minimal external components. These integrated circuits feature a trimmed oscillator for
precise duty cycle control, a temperature compensated reference,
high gain error amplifier, current sensing comparator, and a high
current totem pole output ideally suited for driving a power
MOSFET.
Also included are protective features consisting of input and
reference undervoltage lockouts each with hysteresis, cycle-bycycle current limiting, programmable output deadtime, and a latch
for single pulse metering.
These devices are available in B-pin dual-in-line ceramic and
plastic packages as well as the 14-pin plastic surface mount
(SO-14). The SO-14 package has separate power and ground
pins for the totem pole output stage.
The UCXB42A has UVLO thresholds of 16 V (on) and 10 V (off),
ideally suited for off-line converters. The UCXB43A is tailored for
lower voltage applications having UVLO thresholds of 8.5 V (on)
and 7.6 V (off).
• Trimmed Oscillator Discharge Current for Precise Duty Cycle
Control
• Current Mode Operation to 500 kHz
SILICON MONOLITHIC
INTEGRATED CIRCUIT
~
NSUFFIX
PLASTIC PACKAGE
CASE 626-05
8
~
8
JSUF;IX
CERAMIC PACKAGE
CASE 693-02
1
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
50-14
08
PIN CONNECTIONS
Compensation
Voltage Feedback 2
7
Current Sense 3
RT/CT 4
Vref
Vee
6 Output
5 Gnd
(Top Viewl
• Automatic Feed Forward Compensation
• Latching PWM for Cycle-By-Cycle Current Limiting
Compensation
• Internally Trimmed Reference with Undervoltage Lockout
IT
0
NC~
Voltage Feedback ~
• High Current Totem Pole Output
NC 4
• Undervoltage Lockout with Hysteresis
Current Sense
• Low Start-Up and Operating Current
:,§
~ Vref
~ NC
~ VCC
11 Vc
Output
~
NC ~
~8 Gnd
RT/CT _7-tL_...J-"' Power Ground
• Direct Interface with Motorola SENSEFET Products
{Top View}
SIMPLIFIED BLOCK DIAGRAM
ORDERING INFORMATION
Device
I Vc
UC3842AN
Voltage
Feedback
Compensation
1(1)L _ _ _ _ _
£:
Gnd
5(9)
Output!
Amplifier
o to
+ 70·C
'= _ _ ._ _ _ _ _
...J
Pin numbers adjacent to terminals are for the a-pin dual-in-line package.
Pin numbers in parenthesis are for the D suffix 50-14 package.
Plastic DIP
Plastic DIP
UC2842AD
50-14 Plastic DIP
UC2843AD
50-14 Plastic DIP
UC2842AJ
UC2843AJ
-25 to +85·C
Ceramic DIP
Ceramic DIP
UC2842AN
Plastic DIP
UC2843AN
Plastic DIP
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
3-340
50-14 Plastic DIP
UC3843AN
Current
3(5) Sense
Input
Package
SO-14 Plastic DIP
UC3842AD
UC3843AD
Input
Temperature
Range
UC3842A, UC3843A, UC2842A, UC2843A
MAXIMUM RATING
Symbol
Value
Unit
Total Power Supply and Zener Current
Rating
(lCC+IZ)
30
mA
Output Current, Source or Sink (Note 1)
10
1.0
A
Output Energy (Capacitive Load per Cycle)
W
5.0
Current Sense and Voltage Feedback Inputs
Vin
-0.3 to +5.5
"J
V
Error Amp Output Sink Current
10
10
mA
Po
RaJA
862
145
mW
'CIW
Po
ROJA
1.25
100
W
'CIW
Operating Junction Temperature
TJ
+150
Operating Ambient Temperature
UC3842A, UC3843A
UC2842A, UC2843A
TA
'c
'c
Power Dissipation and Thermal Characteristics
o Suffix, Plastic Package
Maximum Power Dissipation (aJ TA ~ 25'C
Thermal Resistance Junction to Air
N Suffix, Plastic Package and
J Suffix, Ceramic Package
Maximum Power Dissipation Cd) TA ~ 25'C
Thermal Resistance Junction to Air
Storage Temperature Range
o to + 70
-25 to +85
'c
-65 to + 150
Tstg
•
ELECTRICAL CHARACTERISTICS (VCC ~ 15 V INote 21, RT ~ 10 k, CT ~ 3.3 nF, TA ~ Tlow to Thigh
INote 31 unless otherwise noted)
Characteristic
REFERENCE SECTION
Reference Output Voltage (10
~
Line Regulation (VCC
Load Regulation (10
~
~
1.0 mA, TJ
~
25'C)
12 V to 25 V)
1.0 mA to 20 mAl
Vref
4.95
5.0
5.05
Regline
-
2.0
20
Re9l0ad
-
3.0
TS
-
0.2
Vref
4.9
-
5.1
-
50
-
Temperature Stability
Total Output Variation over Line, Load, and Temperature
Output Noise Voltage (f
~
10Hz to 10kHz, TJ
~
Long Term Stability (TA
~
125'C for 1000 Hours)
25'C)
Vn
S
Output Short Circuit Current
ISC
-30
5.0
4.9
5.0
5.1
V
-
2.0
20
mV
25
-
3.0
25
-
-
0.2
-
-
4.82
-
-
50
5.0
5.18
-
-85
-180
-30
-85
-180
52
mV
mVrC
V
"V
mV
mA
OSCILLATOR SECTION
Frequency
TJ ~ 25'C
TA ~ Tlow to Thiah
Frequency Change with Voltage (VCC
~
12 V to 25 V)
Frequency Change with Temperature
TA ~ Tlow to Thigh
Oscillator Voltage Swing (Peak-to-Peak)
Discharge Current (VOSC
TJ ~ 25'C
TA ~ Tlow to Thigh
kHz
fOSC
~
2.0 V)
47
46
-
57
60
47
46
52
-
57
60
MOSC/dV
-
0.2
1.0
-
0.2
1.0
%
dfOSC/dT
-
5.0
-
-
5.0
-
%
VOSC
-
1.6
-
-
1.6
-
7.5
7.2
8.4
-
9.3
9.5
7.5
7.2
8.4
-
Notes: 1. Maximum Package power dissipation limits must be observed.
2. Adjust Vee above the Start-Up threshold before setting to 15 V.
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow =
O°C for UC3842A, UC3843A
Thigh
= - 25'C for UC2B42A, UC2843A
4. This parameter is measured at the latch trip point with VFB ::: 0 V.
5. Comparator gain is defined as: AV
=
= + 70°C for
= + 85'C for
UC3842A, UC3843A
UC2B42A, UC2843A
tN Output/Compensation
t:N Current Sense Input
MOTOROLA LINEAR/INTERFACE DEVICES
3-341
V
mA
Idischg
9.3
9.5
..
UC3842A, UC3843A, UC2842A, UC2843A
ELECTRICAL CHARACTERISTICS IVcc ~ 15 V INote 2L RT ~ 10 k, CT ~ 3.3 nF, TA ~ Tlow to Thigh
INote 3J unless otherwise notedl
Characteristic
ERROR AMPLIFIER SECTION
Voltage Feedback Input IVO ~ 2.5 VI
VFB
Input Bias Current IVFB ~ 5.0 VI
lIB
Open-Loop Voltage Gain IVO ~ 2.0 V to 4.0 VI
Unity Gain Bandwidth ITJ ~ 25"CI
Power Supply Rejection Ratio IVCC ~ 12 V to 25 VI
Output Current
Sink IVO ~ 1.1 V, VFB ~ 2.7 VI
Source IVO ~ 5.0 V, VFB ~ 2.3 VI
2.45
-
2.5
2.55
-0.1
-1.0
2.42
-
2.5
2.58
V
-0.1
-2.0
/LA
AVOL
65
90
-
65
90
-
dB
BW
0.7
1.0
-
0.7
1.0
-
MHz
PSRR
60
70
-
60
70
-
dB
rnA
2.0
-0.5
12
-1.0
-
VOH
VOL
5.0
-
6.2
0.8
Current Sense Input Voltage Gain INotes 4 & 51
AV
2.85
Maximum Current Sense Input Threshold INote 41
Vth
0.9
ISink
ISource
Output Voltage Swing
High State IRL ~ 15 k to ground, VFB ~ 2.3 VI
Low State IRL ~ 15 k to Vref, VFB ~ 2.7 VI
-
2.0
-0.5
12
-1.0
1.1
5.0
6.2
0.8
1.1
3.0
3.15
2.85
3.0
3.15
1.0
1.1
0.9
1.0
1.1
V
70
-
-
70
-
dB
-
V
-
-
CURRENT SENSE SECTION
Power Supply Rejection Ratio
V CC ~ 12 V to 25 V, Note 4
PSRR
VN
liB
-
-2.0
-10
-
-2.0
-10
/LA
tPLH(lN/OUTI
-
150
300
-
150
300
ns
VOL
-
0.4
2.2
-
13
12
-
-
13
12
0.1
1.6
13.5
13.4
0.4
2.2
VOH
0.1
1.6
13.5
13.4
VOLIUVLOI
-
0.1
1.1
-
0.1
1.1
V
Output Voltage Rise Time ICL = 1.0 nF, T J ~ 25"CI
tr
150
-
50
150
ns
tf
-
50
Output Voltage Fall Time ICL ~ 1.0 nF, TJ ~ 25"CI
50
150
-
50
150
ns
15
7.8
16
8.4
17
9.0
14.5
7.8
16
8.4
17.5
9.0
9.0
7.0
10
7.6
11
8.2
8.5
7.0
10
7.6
11.5
8.2
-
0.5
1.0
-
0.5
1.0
Input Bias Current
Propagation Delay ICurrent Sense Input to Outputl
OUTPUT SECTION
Output Voltage
Low State (lSink ~ 20 mAl
(lSink = 200 mAl
High State (lSource = 20 mAl
(lSource ~ 200 mAl
V
Output Voltage with UVLO Activated
VCC ~ 6.0 V, ISink = 1.0 rnA
-
UNDERVOLTAGE LOCKOUT SECTION
Start-Up Threshold
UCX842A
UCX843A
V
Vth
Minimum Operating Voltage After Turn-On
UCX842A
UCX843A
V
VCClminl
PWM SECTION
Duty Cycle
Maximum
Minimum
TOTAL DEVICE
Power Supply Current
Start-Up
IVCC ~ 6.5 V for UCX843A, 14 V for UCX842AI
Operating INote 21
ICC
Power Supply Zener Voltage (ICC ~ 25 rnA)
Vz
rnA
-
12
17
-
12
17
30
36
-
30
36
-
MOTOROLA LINEAR/INTERFACE DEVICES
3-342
V
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 2 - OUTPUT DEAD TIME versus
OSCILLATOR FREQUENCY
FIGURE 1 - TIMING RESISTOR versus
OSCILLATOR FREQUENCY
0
100
0
'-
01'..
15V
-VCC
=TA 25°C
~~-t
~t--' I"'~
r-....
-
~ 80
C>
~
r--......
-
90 -
E
25
50
75
TA, AMBIENT TEMPERATURE (OC)
100
20K
50K
I
V
/./
100K
200K
500K
1.0M
125
VCC=15V
CT ~ 3.3 nF
TA ~ 25°C
--"....
- ---:
V
/
. / '/
.I' '/
'/
~ 60
C>
o
V
./
~ 70
::<
~
-25
. / 't' ~~...::~
,<§:>
- l~iSCh9 ~ 7.2 m y ./'"
./
o
::<
;; 50
7.0
-55
~
L
AGURE 4 - MAXIMUM OUTPUT DUTY CYCLE
versus TIMING RESISTOR
I
VCC ~ 15 V
VOSC = 2.0V-
--
/
L
IOSC, OSCILLATOR FREQUENCY (kHz)
OSCILLATOR DISCHARGE CURRENT
versus TEMPERATURE
9.0
,.
V
V
1.0
10K
1.0M
II
./
1~
~~<' "'~ ~~/
./
1'\
1,/
~
OV
SOK
AGURE 3 -
4-
1/
./
,,,,~
~'\
r-....
15 V
Or-VCC
TA ~ 25°C
/
0
f-
AiSCh9'~ 9.5 mA
40 J
800 1.0K
AGURE5 - ERROR AMP SMALL SIGNAL
TRANSIENT RESPONSE
2.0K
3.0K
4.0K
RT, TIMING RESISTOR (11)
6.0K
FIGURE 6 - ERROR AMP LARGE SIGNAL
TRANSIENT RESPONSE
2.S5V
3.0 V
2.5 V
2.5 V
2.45 V
2.0 V
0.51's/DIV
MOTOROLA LINEAR/INTERFACE DEVICES
3-343
8.0K
II
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 7 -
ERROR AMP OPEN-LOOP GAIN AND
PHASE versus FREQUENCY
AGURE B - CURRENT SENSE INPUT THRESHOLD
versus ERROR AMP OUTPUT VOLTAGE
1.2
iii
~
~
~
~
801----""''1'-;:--+---+---+
9 1.0
30
ffi
601---P-<,----'k--+---+---'-'--+---I 60 ll!
5
.....O!:::---+---I 90
:> 401---t---f"'--~,.....
~
~
o
1
1
~
~w
~
iE
(I)
20t---t---+----t----'l'o<:__--'k---_i 120 ~
i ot---t---+----t----t----'l'o<~-_i
1;5
150 -<§.
180
-2~~0---~10~0----~1~.0~K----~10~K---l~00~K:---~~~~10M
g
l!l o.8
~
i-/ '/
r-- -TA = 125oC') 1/ /
I-
~
;;:;
m
a'i
(I)
I-
z
-//
o.6
/
/ /.
o.4
0
/ //
///
...........
2.0
~
.......
~
~
~ -12
~
~
r--....
~ -8.0
"-
~
-16
~
~
;;;
-20
TA
o
r-.......
20
TA
I""'.:
= 125°C
TA
-24
=
= 25°C I
100
40
80
60
I,of, REFERENCE SOURCE CURRENT (mA)
FIGURE 11 -
-55°C
j - -VCC =I 15V_
I
4.0
8.0
6.0
FIGURE 10 - REFERENCE SHORT CIRCUIT CURRENT
versus TEMPERATURE
V~c = J5V-
.......
'"~
=
I
Vo, ERROR AMP OUTPUT VOLTAGE (Vo)
FIGURE 9 - REFERENCE VOLTAGE CHANGE
versus SOURCE CURRENT
~
........ TA
VLL
I, FREQUENCY (Hz)
;:;:; -4.0
'/
//.
!!i:::> o. 2
u
j
--
~
r-- -TA = l125oC _
I
VCC = 15V_
RL ';0.1 n
~
" "'-. ~
-55°C
c---
~ r-...
............
120
REFERENCE LOAD REGULATION
-25
o
25
50
75
TA, AMBIENT TEMPERATURE (OC)
AGURE 12 -
2.0 mS/DIV
REFERENCE LINE REGULATION
2.0 msiDIV
MOTOROLA LINEAR/INTERFACE DEVICES
3-344
100
125
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 13 - OUTPUT SATURATION VOLTAGE
versus LOAD CURRENT
0
FIGURE 14 -
OUTPUT WAVEFORM
Source Saturation_ VCC ~ 15V
_ILoad to Ground) _ BO p.s Pulsed Load
TA ~ 25 C
I
I
120 Hz Rate
f - - VCC/
o
I
0
90%
0
TA
55'C
'J
I
0
0
0
T~
............
TA
r
I II
II
./
5~'C
......25'C10%
Sink Saturation
ILoad to VCC) )---- Gndrr-
./"
200
400
600
10, OUTPUT LOAD CURRENT (rnA)
FIGURE 15 -
BOO
50 nsiDIV
OUTPUT CROSS CONDUCTION
FIGURE 16 -
SUPPLY CURRENT versus SUPPLY VOLTAGE
5
""'>
C>
l'3
«
.s
>-
~
5
:::>
fr-
u
~:::>
""
«
E
C>
I
0
10
,I
«II
oj
s> 5t---
§l
0
RT ~ 10 k
CT ~ 3.3 nF
VFB ~ OV
Current Sense
TA ~ 25'C
;'5
~++- t- tlOil
~I'
11
:::>
10
100 nslDlV
20
VCC, SUPPLY VOLTAGE IV)
MOTOROLA LINEAR/INTERFACE DEVICES
3-345
~
1 1
30
0V-
40
..
UC3842A, UC3843A, UC2842A, UC2843A
PIN FUNCTION DESCRIPTION
Pin No.
Function
Description
a-Pin
14-Pin
1
1
Compensation
This pin is the Error Amplifier output and is made available for loop
compensation.
2
3
Voltage Feedback
This is the inverting input of the Error Amplifier. It is normally
connected to the switching power supply output through a resistor
divider.
3
5
Current Sense
A voltage proportional to inductor current is connected to this input.
The PWM uses this information to terminate the output switch
conduction.
4
7
RT/CT
The Oscillator frequency and maximum Output duty cycle are
programmed by connecting resistor RT to Vref and capacitor CT to
ground. Operation to 500 kHz is possible.
5
-
Gnd
This pin is the combined control circuitry and power ground (a-pin
package only).
6
10
Output
This output directly drives the gate of a power MOSFET. Peak currents
up to 1.0 A are sourced and sinked by this pin.
7
12
VCC
This pin is the positive supply of the control IC.
a
14
Vref
This is the reference output. It provides charging current for capacitor
CT through resistor RT.
-
a
Power Ground
This pin is a separate power ground return (14-pin package only) that
is connected back to the power source. It is used to reduce the effects
of switching transient noise on the control circuitry.
-
11
Vc
The Output high state (VOH) is set by the voltage applied to this pin
(14-pin package only). With a separate power source connection, it can
reduce the effects of switching transient noise on the control circuitry.
-
9
Gnd
This pin is the control circuitry ground return (14-pin package only) and
is connected back to the power source ground.
-
2,4,6,13
NC
No connection (14-pin package only). These pins are not internally
connected.
MOTOROLA LINEAR/INTERFACE DEVICES
3-346
UC3842A, UC3843A, UC2842A, UC2843A
state (VoLl. This occurs when the power supply is operating and the load is removed, or at the beginning of a
soft-start interval (Figures 23, 24). The Error Amp minimum feedback resistance is limited by the amplifier's
source current (0.5 mAl and the required output voltage
(VOH) to reach the comparator's 1.0 V clamp level:
OPERATING DESCRIPTION
The UC3842A, UC3843A series are high performance,
fixed frequency, current mode controllers. They are
specifically designed for Off-Line and DC-to-DC converter applications offering the designer a cost effective
solution with minimal external components. A representative block diagram is shown in Figure 17.
R
_3.0(1.0V) + 1.4V - 8800n
f(MIN) 0.5 mA
-
Oscillator
The oscillator frequency is programmed by the values
selected for the timing components RT and CT. Capacitor CT is charged from the 5.0 V reference through
resistor RT to approximately 2.8 V and discharged to
1.2 V by an internal current sink. During the discharge
of CT, the oscillator generates an internal blanking pulse
that holds the center input of the NOR gate high. This
causes the Output to be in a low state, thus producing
a controlled amount of output deadtime. Figure 1 shows
RT versus Oscillator Frequency and Figure 2, Output
Deadtime versus Frequency, both for given values of
Cr- Note that many values of RT and CT will give the
same oscillator frequency but only one combination will
yield a specific output deadtime at a given frequency.
The oscillator thresholds are temperature compensated, and the discharge current is trimmed and guaranteed to within ± 10% at TJ = 25°C. These internal
circuit refinements minimize variations of oscillator frequency and maximum output duty cycle. The results
are shown in Figures 3 and 4.
In many noise sensitive applications it may be desirable to frequency-lock the converter to an external system clock. This can be accomplished by applying a clock
signal to the circuit shown in Figure 20. For reliable
locking, the free-running oscillator frequency should be
set about 10% less than the clock frequency. A method
for multi unit synchronization is shown in Figure 21. By
tailoring the clock waveform, accurate Output duty cycle
clamping can be achieved.
Current Sense Comparator and PWM Latch
The UC3842A, UC3843A operate as a current mode
controller, whereby output switch conduction is initiated by the oscillator and terminated when the peak
inductor current reaches the threshold level established by the Error Amplifier Output/Compensation
(Pin 1). Thus the error signal controls the peak inductor current on a cycle-by-cycle basis. The Current
Sense Comparator PWM Latch configuration used
ensures that only a single pulse appears at the Output
during any given oscillator cycle. The inductor current
is converted to a voltage by inserting the ground referenced sense resistor RS in series with the source of
output switch Ql. This voltage is monitored by the
Current Sense Input (Pin 3) and compared a level
derived from the Error Amp Output. The peak inductor
current under normal operating conditions is controlled by the voltage at pin 1 where:
I
_ V(Pin 1) - 1.4 V
pk 3 RS
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing
is lost. Under these conditions, the Current Sense Comparator threshold will be internally clamped to 1.0 V.
Therefore the maximum peak switch current is:
Ipk(max) =
Error Amplifier
A fully compensated Error Amplifier with access to
the inverting input and output is provided. It features
a typical DC voltage gain of 90 dB, and a unity gain
bandwidth of 1.0 MHz with 57 degrees of phase margin (Figure 7). The non-inverting input is internally
biased at 2.5 V and is not pinned out. The converter
output voltage is typically divided down and monitored by the inverting input. The maximum input bias
current is -2.0 JJ.A which can cause an output voltage
error that is equal to the product of the input bias
current and the equivalent input divider source
resistance.
1.0V
AS
When designing a high power switching regulator it
becomes desirable to reduce the internal clamp voltage
in order to keep the power dissipation of RS to a reasonable level. A simple method to adjust this voltage
is shown in Figure 22. The two external diodes are used
to compensate the internal diodes yielding a constant
clamp voltage over temperature. Erratic operation due
to noise pickup can result if there is an excessive reduction of the Ipk(max) clamp voltage.
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the
power supply to exhibit an instability when the output
is lightly loaded. This spike is due to the power transformer interwinding capacitance and output rectifier
recovery time. The addition of an RC filter on the Current
Sense Input with a time constant that approximates the
spike duration will usually eliminate the instability; refer
to Figure 26.
The Error Amp Output (Pin 1) is provided for external
loop compensation (Figure 31). The output voltage is
offset by two diode drops (=1.4 V) and divided by three
before it connects to the inverting input of the Current
Sense Comparator. This guarantees that no drive pulses
appear at the Output (Pin 6) when pin 1 is at its lowest
MOTOROLA LINEAR/INTERFACE DEVICES
3-347
II
•
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 17 -
REPRESENTATIVE BLOCK DIAGRAM
VCC
Vee
---,
,-------------....-------h
I
I
7(12)
Vref
1
IVe
RT
R
JUL
Oscillator
e
TT
Voltage
Input
"
4(7)1
1.0 rnA
Fe~baCk I
2R
R
Output!
Amplifier
Compensation <>-1------'
~~~
1(1)l _ _ _ _ _
Gnd
5(9)
______ .J
~
~
3(5)
RS
Sink Only
= Positive True Logic
Pin numbers adjacent to terminals are for the 8 pin dual-in-line package.
Pin numbers in parenthesis are for the 0 suffix 50-14 package.
FIGURE 18 -
TIMING DIAGRAM
Capacitor CT
Latch
"Set" Input
----',--'
Output!
Compensation ~
Current Sense ~
InputLatch
"Reset" Input
...JL_ _--'L_ _---'l_ _- ' L -_ _,'-_-'L-_...JL
Output
Sma)) RT/Large CT
Large RT/Sma)) CT
Undervoltage Lockout
Two undervoltage lockout comparators have been
incorporated to guarantee that the Ie is fully functional
before the output stage is enabled. The positive power
supply terminal (Vee! and the reference output (Vref)
are each monitored by separate comparators. Each has
built-in hysteresis to prevent erratic output behavior as
their respective thresholds are crossed. The Vee comparator upper and lower thresholds are 16 V/10 V for
the UeX842A, and 8.4 V/7.6 V for the UeX843A. The
Vref comparator upper and lower thresholds are 3.6 VI
3.4 V. The large hysteresis and low start-up current of
the UeX842A makes it ideally suited in off-line converter
applications where efficient bootstrap start-up tech-
MOTOROLA LlNEARIiNTERFACE DEVICES
3-348
UC3842A, UC3843A, UC2842A, UC2843A
niques are required (Figure 33). The UCX843A is
intended for lower voltage DC to DC converter applications. A 36 V zener is connected as a shunt regulator
from VCC to ground. Its purpose is to protect the IC
from excessive voltage that can occur during system
start-up. The minimum operating voltage for the
UCX842A is 11 V and 8.2 V for the UCX843A.
FIGURE 19 -
CONTINUOUS CURRENT WAVEFORMS
A
AI
Output
These devices contain a single totem pole output
stage that was specifically designed for direct drive of
power MOSFET's. It is capable of up to ± 1.0 A peak
drive current and has a typical rise and fall time of 50 ns
with a 1.0 nF load. Additional internal circuitry has been
added to keep the Output in a sinking mode whenever
an undervoltage lockout is active. This characteristic
eliminates the need for an external pull-down resistor.
The SO-14 surface mount package provides separate
pins for Vc (output supply) and Power Ground. Proper
implementation will significantly reduce the level of
switching transient noise imposed on the control circuitry. This becomes particularly useful when reducing
the Ipk(max) clamp level. The separate Vc supply input
allows the designer added flexibility in tailoring the
drive voltage independent of VCC. A zener clamp is
typically connected to this input when driving power
MOSFETs in systems where VCC is greater than 20 V.
Figure 25 shows proper power and control ground connections in a current sensing power MOSFET
application.
~
II
Oscillator Period
---+--
I
B
Oscillator Period
I
14
I~
16
Current mode converters can exhibit subharmonic
oscillations when operating at a duty cycle greater than
50% with continuous inductor current. This instability
is independent of the regulators closed loop characteristics and is caused by the simultaneous operating conditions of fixed frequency and peak current detecting.
Figure 19A shows the phenomenon graphically. At to,
switch conduction begins, causing the inductor current
to rise at a slope of m1. This slope is a function of the
input voltage divided by the inductance. At t1, the Current Sense Input reaches the threshold established by
the control voltage. This causes the switch to turn off
and the current to decay at a slope of m2, until the next
oscillator cycle. The unstable condition can be shown
if a pertubation is added to the control voltage, resulting
in a smallll.l (dashed line). With a fixed oscillator period,
the current decay time is reduced, and the minimum
current at switch turn-on (t2) is increased by Il.I + Il.I
m2/m1. The minimum current at the next cycle (t3)
decreases to (Il.l + Il.I m2/m1) (m2/m1). This pertubation
is multiplied by m2/m1 on each succeeding cycle, alternately increasing and decreasing the inductor current
at switch turn-on. Several oscillator cycles may be
required before the inductor current reaches zero causing the process to co.mmence again. If m2/m1 is
greather than 1, the converter will be unstable. Figure
19B shows that by adding an artificial ramp that is synchronized with the PWM clock to the control voltage,
the Il.I pertubation will decrease to zero on succeeding
cycles. This compensating ramp (m3) must have a slope
equal to or slightly greater than m2/2 for stability. With
m2/2 slope compensation, the average inductor current
follows the control voltage yielding true current mode
operation. The compensating ramp can be derived from
the oscillator and added to either the Voltage Feedback
or Current Sense inputs (Figure 32).
Reference.
The 5.0 V bandgap reference is trimmed to ± 1.0%
tolerance at TJ = 25"C on the UC284XA, and ± 2.0% on
the UC384XA. Its primary purpose is to supply charging
current to the oscillator timing capacitor. The reference
has short circuit protection and is capable of providing
in excess of 20 mA for powering additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on wirewrap or plug-in prototype boards. High frequency circuit layout techniques are imperative to prevent pulsewidth jitter. This is usually caused by excessive noise
pick-up imposed on the Current Sense or Voltage Feedback inputs. Noise immunity can be improved by lowering circuit impedances at these points. The printed
circuit layout should contain a ground plane with lowcurrent signal and high-current switch and output
grounds returning on separate paths back to the input
filter capacitor. Ceramic bypass capacitors (0.1 ILF) connected directly to VCC, Vc, and Vref may be required
depending upon circuit layout. This provides a low
impedance path for filtering the high frequency noise.
All high current loops should be kept as short as possible using heavy copper runs to minimize radiated EMI.
The Error Amp compensation circuitry and the converter output voltage divider should be located close to
the IC and as far as possible from the power switch and
other noise generating components.
MOTOROLA LINEAR/INTERFACE DEVICES
3-349
•
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 20 -
EXTERNAL CLOCK SYNCHRONIZATION
FIGURE 21 - EXTERNAL DUTY CYCLE CLAMP AND
MULTI UNIT SYNCHRONIZATION
,..-----Vref
External
Syoo
Input
r-----
I
I
1
e---j0(' .I~
l T C ....
M
t
'"
47
~
=
111IL _ _ _ _ _
5(9)
The diode clamp is required if the Sync amplitude is large
enough to cause the bottom side of CT to go more than
300 mV below ground,
FIGURE 22 -
ADUSTABLE REDUCTION OF CLAMP LEVEL
FIGURE 23 -
5(9)
To Additional
UCX84XA's
omax --~
RA + 2RS
1= _ _
,·44
__
IRA + 2RB)C
SOFT-START CIRCUIT
.----------
B:g:
I
~
c1'
5(9)
lS oft.Start "" 3600C in ILF
Ipk(maX)""~
1.67
(~)
VClamp = - - - + 0.33 x 10- 3 "
1 + ",
( -"' + 1 )
"1
Where: 0 '" VClamp"""; 1.0 V
AGURE 24 - ADJUSTABLE BUFFERED REDUCTION OF
CLAMP LEVEL WITH SOFT-START
FIGURE 25 -
CURRENT SENSING POWER MOSFET
Vcc
VPin 5 ...
R~D~7!n) r~SA~n)
If: SENSEFET = MTP10Nl0M
RS = 200
-13151
"s
"s
Control Circuitry Ground:
1/4W
To Pin (9)
V
1.67
Clamp " " - ( "
)
~+1
",
VClamp
Ipklmax)=~
tSOFTSTART=
Where: 0
<5;
VClamp
<5;
1.0 V
-In[1-~3VV
lc~""""
CLAMP
,+ 2
Virtually losslaSI current sensing can be achieved with the implementation of a SENSEFET
power switch. For proper operation during over current conditions, a reduction of the
Ipklmaxj clamp level must be Implemented. Refer to Figures 22 and 24.
MOTOROLA LINEAR/INTERFACE DEVICES
3-350
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 26 -
CURRENT WAVEFORM SPIKE SUPPRESSION
FIGURE 27 -
MOSFET PARASITIC OSCILLATIONS
II
Series gate resistor Rg will damp any high frequency parasitic
oscillations caused by the MOSFET input capacitance and any
series wiring inductance In the gate-source circuit.
Tne addition of the RC filter will eliminate Instability caused
by the leadmg edge spike on the current waveform.
FIGURE 28 -
BIPOLAR TRANSISTOR ORIVE
FIGURE 29 -
ISOLATED MOSFET DRIVE
=:-:;----1 Vee
50% DC
t
=
pk
____ J
3(5)
25% DC
V(pm 1) - 1.4
3RS
RS
The totem-pole output can furnish negative base current for
enhanced transistor turn-off, with the addition of capacitor
C,
FIGURE 30 -
LATCHED SHUTDOWN
FIGURE 31 -
1----
ERROR AMPLIFIER COMPENSATION
From Va
Ri
I
2(3)
2.5V
5(9)
Rf ~ 8.8 k
Error Amp compensation circuit for stabiliZing any currentmode topology except for boost and flyback converters
operating with continuous inductor current.
From Va
~~~
1L .~?iJ
~~~---
5(9)
H1IL _ _ _
5(9)
The MCR101 seA must be selected for a holding of less than
0.5 rnA at TA{min). The simple two transistor circuit can be
used in place of the SeR as shown. All resistors are 10 k.
Error Amp compensation circuit for stabilizing current-mode
boost and fly back topologies operattng with continuous
inductor current.
MOTOROLA LINEAR/INTERFACE DEVICES
3-351
(~)
NS
UC3842A, UC3843A, UC2842A, UC2843A
FIGURE 32 -
II
From
SLOPE COMPENSATION
Vee
Vo
Ai
lll1L
I
--~
AS
5191
The buffered oscillator ramp can be resistively summed with either the voltage
feedback or current sense inputs to provide slope compensation.
FIGURE 33 -
27 WATT OFF-LINE FLYBACK REGULATOR
4.7 H
.- 5.0 V!4.0 A
115Vac
===----+--05.0 V RTN
.-<01-_"""'""'-_-"12 V/O.3 A
E=:O----+-O ± 12 V RTN
·'--,-+t-<>__.AJ<.Ar+-O-12 V!O.3 A
'8 k
4.7 k
100
pF
1.Ok
111IL _ _ _ _ _ .-.: _ _ _ _ _ _ _
J
~470PF
0.511
5(9}
T1 -
Primary: 45 Turns #26 AWG
Secondary ± 12 V: 9 Turns #30 AWG (2 strands) Bifiliar Wound
Secondary 5.0 V: 4 Turns (six strands) #26 Hexfiliar Wound
Secondary Feedback: 10 Turns #30 AWG (2 strands) Bifiliar Wound
Core: Ferroxcube EC35-3C8
Bobbin: Ferroxcube EC35PCBl
Gap: = 0.10"for a primary inductance of 1.0 mH
~
L1 l2, L3 -
15 /-tH at 5.0 A, Coilcraft Z7156.
25 JLH at 1.0 A, Coilcraft Z7157.
=
Line Regulation: 5.0 V
±12 V
Yin
Load Regulation: 5.0 V
±12 V
Vin = 115 Vac, lout ~ 1.0 A to 4.0 A
Yin ~ 115 Vac, lout ~ 100 mA to 300 mA
Output Ripple: 5.0 V
±12 V
Vin
=
115 Vac
40 mV p _p
80 mV p _p
Efficiency
Yin
~
115 Vac
70%
95 to 130 Vae
do
~ ~
All outputs are at nominal load currents unless otherwise noted.
MOTOROLA LINEAR/INTERFACE DEVICES
3-352
~ ~
~ ~
50 mVor ±0.5%
24 mV or ±0.1%
300 mV or ±3.0%
60 mV or ±0.25%
®
pA78S40
MOTOROLA
Specifications and Applications
Information
The ILA78S40 is a monolithic-switching regulator subsystem,
providing all active functions necessary for a switching regulator
system. The device consists of a temperature compensated voltage reference, controlled-duty cycle oscillator with an active current limit circuit, comparator, high-current and high-voltage output switch, capable of 1.5 A and 40 V, pinned-out power diode
and an uncommitted operational amplifier, which can be powered
up or down independent of the IC supply. The switching output
can drive external NPN or PNP transistors when voltages greater
than 40 V, or currents in excess of 1.5 A, are required. Some of
the features are wide-supply voltage range, low standby current,
high efficiency and low drift. The ILA78S40 is available in commercial (DOC to + 70°C), automotive (- 40°C to + 85°C I. and military
(- 55°C to + 125°C) temperature ranges.
Some of the applications include use in step-up, step-down,
and inverting regulators, with extremely good results obtained in
battery-operated systems.
UNIVERSAL
SWITCHING REGULATOR
SUBSYSTEM
SILICON MONOLITHIC
INTEGRATED CIRCUIT
~
P
__ -~
_ _
o SUFFIX
CERAMIC PACKAGE
CASE 620-10
P
~
16
PsUFFIX
PLASTIC PACKAGE
CAS E 648-06
16
• Output Adjustable from 1.25 V to 40 V
• Peak Output Current of 1.5 A Without External Transistor
• 80 dB line and Load Regulation
PIN CONNECTIONS
• Operation from 2.5 V to 40 V Supply
• Low Standby Current Drain
• High Gain, High Output Current, Uncommitted Op Amp
DIOde
Cathode
SWitch
Collector
1
Diode
Driver
Collector
BLOCK DIAGRAM
Ipk Sense
Op Amp
Output
Non-Inv
Input
Gnd
Timing
Capacitor
VCC
Ipk
Sense
Vee
4
Vee
Op Amp
Timing
5
Capacitor
OpAmp
9
Non.lnv~~~nu~
6
Comparator
Op Amp
Inverting
Inverting
Input
7
Input
9
Comparator
Non-Inverting
Input
(Top View)
ORDERING INFORMATION
Device
5
Ref
Output
Inv
Input
Non-Inv
Output
VCC
Input OpAmp
Switch
Emitter
Diode
Anode
(Bottom View)
Diode
Cathode
Package
/LA78S40PC
O°C to + 70°C
/LA78S40PV
- 40°C to + 85°C
/LA78S40DC
O°C to + 70°C
/LA78S40DM
MOTOROLA LINEAR/INTERFACE DEVICES
3-353
Temperature
Range
- 55°C to + 125 C
Q
Plastic DIP
Plastic DIP
Ceramic DIP
Ceramic DIP
II
p.A78S40
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
40
V
VCC (Op Amp)
40
V
Common Mode Input Range
(Comparator and Op Amp)
VICR
-0.3 to VCC
V
Differential Input Voltage (Note 2)
VID
±30
V
Output Short-Circuit Duration (Op Amp)
-
Continuous
-
Power Supply Voltage
Op Amp Power Supply Voltage
Reference Output Current
Iref
10
mA
Voltage from Switch Collectors to Gnd
-
40
V
Voltage from Switch Emitters to Gnd
-
40
V
Voltage from Switch Collectors to Emitter
-
40
V
40
V
Reverse-Power Diode Voltage
VDR
40
V
Current through Power Switch
ISW
1.5
A
Current through Power Diode
10
1.5
A
Po
1/ReJA
Po
lIReJA
1500
14
1000
8.0
mW
mWrC
mW
mWrC
Tstg
-65 to + 150
°c
Voltage from Power Diode to Gnd
Power Dissipation and Thermal
Characteristics
Plastic Package - TA = + 25°C
Derate above + 25°C (Note 1)
Ceramic Package - TA = 25°C
Derate above + 25°C (Note 1)
Storage Temperature Range
Operating Temperature Range
I'A78S40M
I'A78S40V
I'A78S40C
°c
TA
-55 to + 125
-40 to +85
o to + 70
Notes:
1. Tlow
=
=
-
Thigh
55°C for "A7BS40DM
40°C for "A7BS40PV
= D"C for J,tA78S40DC and
=
=
+ 125°C for "A7BS40DM
+ B5°C for "A7BS40PV
= + 70°C for "A7BS40DC and "A78S40PC
J,tA78S40PC
2. For supply voltages less than 30 V the maximum differential input voltage (Error Amp
and Op Amp) is equal to the supply voltage.
ELECTRICAL CHARACTERISTICS IVCC
VCC lOp Ampl
Characteristic
GENERAL
Supply Voltage
VCC
Supply Current (Op Amp VCC Disconnectedl
(VCC = 5.0 VI
(VCC = 40 V)
ICC
Supply Current (Op Amp VCC Connected)
(VCC = 5.0 V)
(VCC = 40 V)
ICC
-
2.5
40
V
mA
-
1.8
-
2.3
3.5
5.0
-
-
4.0
5.5
mA
-
REFERENCE
Reference Voltage
(lref = 1.0 mAl
Vref
1.180
1.245
1.310
V
Reference Voltage Line Regulation
(3.0 V '" VCC '" 40 V, Iref = 1.0 mA, TA = 25°C)
Regline
-
0.04
0.2
mVN
Reference Voltage Load Regulation
Re9(oad
-
0.2
0.5
mV/mA
(1.0 mA '" Iref '" 10 mA, TA
=
25°C)
MOTOROLA LINEAR/INTERFACE DEVICES
3-354
p,A78S40
ELECTRICAL CHARACTERISTICS (Continued)
Min
Typ
Max
20
20
-
50
70
150
150
-
250
350
Vase
-
0.5
-
V
tcha/tdis
-
6.0
-
-
Output Saturation Voltage 1
(lsw = 1.0 A, Pin 15 tied to Pin 16)
Vsat1
-
0.93
1.3
V
Output Saturation Voltage 2
(lSW = 1.0 A, 115 = 50 mAl
Vsat2
-
0.5
0.7
V
hFE
-
70
-
-
'C(off)
-
10
-
nA
Input Offset Voltage (VCM
V,O
-
1.5
15
mV
Input Bias Current (VCM
liB
-
35
200
nA
',0
-
5.0
75
nA
Characteristic
Symbol
Unit
OSCILLATOR
Charging Current (TA
(VCC = 5.0 V)
(VCC = 40 V)
= 25°C)
Discharge Current (TA
(VCC = 5.0 V)
(VCC = 40 V)
'chg
= 25°C)
Oscillator Voltage Swing (TA
(VCC = 5.0 V)
Idis
= 25°C)
Ratio 01 Charge/Discharge Time
,.A
!LA
CURRENT LIMIT
Current-Limit Sense Voltage (TA = 25°C)
(VCC - V, k Sense)
OUTPUT SWITCH
Output Transistor Current Gain (TA
(lC = 1.0 A, VCE = 5.0 V)
= 25°C)
= 25°C)
Output Leakage Current (TA
(VCE = 40 V)
POWER DIODE
Forward Voltage Drop (10
1.0 A)
=
Diode Leakage Current (TA
= 25°C)
(VDR
= 40
V)
COMPARATOR
= VRel)
= VRel)
Input Offset Current (VCM
=
VRel)
Common-Mode Voltage Range (TA
= 25°C)
V,CR
0
-
VCC - 2.0
V
Power-Supply Rejection Ratio (T A
(3.0 '" VCC '" 40 V)
25°C)
PSRR
70
96
-
dB
-
4.0
=
OUTPUT OPERATIONAL AMPLIFIER
Input Offset Voltage (VCM
= 2.5 V)
V,O
Input Bias Current (VCM
2.5 V)
liB
= 2.5 V)
15
mV
30
200
nA
5.0
75
Voltage Gain "'; (TA = 25°C)
(RL = 2.0 kO to Gnd, 1.0 V", Vo '" 2.5 V)
',0
-
AVOL+
25
250
-
V/mV
Voltage Gain - (TA = 25°C)
(RL = 2.0 kO to VCC (Op Amp), 1.0 V '" Vo '" 2.5 VI
AVOL-
25
250
-
V/mV
=
Input Offset Current (VCM
nA
Cammon-Mode Voltage Range (TA
= 25°C)
V,CR
0
-
VCC - 2.0
V
Common-Mode Rejection Ratio (TA
(VCM = 0 to 3.0 V)
= 25°C)
CMRR
76
100
-
dB
PSRR
76
100
-
dB
ISource
75
150
-
rnA
ISink
10
35
-
rnA
-
0.6
-
V/iJ.S
-
1.0
V
-
-
V
Power-Supply Rejection Ratio (TA
(3.0 V '" VCC (Op Amp) '" 40 V)
Output Source Current (TA
Output Sink Current (TA
Slew Rate (TA
=
= 25°C)
= 25°C)
= 25°C)
25°C)
Output Low Voltage (TA
Output High Voltage (TA
SR
= 25°C, 'L = -5.0 rnA)
= 25°C, IL = 50 rnA)
VOL
VOH
VCC (Op Amp)
-3.0
MOTOROLA LINEAR/INTERFACE DEVICES
3-355
II
pA78S40
FIGURE 1 -
OUTPUT SWITCH ON/OFF TIME
FIGURE 2 - STANDBY SUPPLY CURRENT
. versus SUPPLY VOLTAGE
venus OSCILLATOR TIMING
CAPACITOR
1000
3.2
=
=Vee
eT = 0.001 /LF
r- ~k(s.n..) = Vee
in3 = Gnd
5.0 V
~k(S8nS8)
Vee
_linl0 = Gnd
-Pin9 = Vref
4
II
Ion
6
toff
8
J
1.0
0.1
1.0
10
CT. OSCILLATOR TIMING CAPACITOR (nFI
100
0
5.0
FIGURE 3 - EMITTER·FOLLOWER CONFIGURATION
OUTPUT SWITCH SATURATION VOLTAGE
versus EMmER CURRENT
1. 6
5 Pins 14, 15. 16 = Vee
Pins la, 12 = Gnd
Pin 9 = Vr.!
4
2
I-'"
I-
.....-
..... f-
o
Vce = 5.0 V
Pin 14 = Vee ~
0 Pins 3, 10, 12 = Gnd
Pin 9 = Vr.!
-
8
V
r--
I I
eo~nectb.
oarllngto1n
l - f- r-
..-
6
2
0.6
0.8
1.0
IE, EMITTER CURRENT IAMPSI
1.2
......
0
1.4
-
0.2
,/
...... I-"'"
V
0.4
0.6
0.8
1.0
IC. COLLECTOR CURRENT lAMPS)
MOTOROLA LINEAR/INTERFACE DEVICES
3-356
....- ......
Forced Beta - 20,,-
,,-
0.4
40
,/
V
0.2
35
FIGURE 4 - COMMON·EMITTER CONFIGURATION
OUTPUT SWITCH SATURATION VOLTAGE
versus COLLECTOR CURRENT
1
1.0
15
20
25
30
Vee, SUPPLY VOLTAGE (VOLTS)
1. 2
ve~ = 15.0 J
3
10
1.2
1.4
"A78S40
FIGURE 5 - STEP·DOWN CONVERTER
2~~o-~--------------------------------~~~~----~----,
..
RSC
100~
0.33·
L----------~1X.""::'_._<>
Vout
5.0 V/500 mA
Rl
*Use ell:ternal rectifier
to increase circuit efficlencv
FIGURE 6 - STEP·UP CONVERTER
1~~ o-.....--------------------------------,....'IM~t-----~-,7rO.;:-~.;:-H--..------,
100
~ r--------,
+---~~----------------------------------------~~_1~-oVOul
28 V/175 mA
R1
·Use external rectifier
to increase circuit efficiency
MOTOROLA LINEAR/INTERFACE DEVICES
3-357
ILA78S40
RGURE 7 -
INVERTING CONVERTER
1N5822
Vout
1~"v o-_~____________"""''M.--1r-_ _ _-..D45H8'-~_i4-1>---1>--_1-<>5V/500 mA
RSC
0.30
100
•
R2
18 k
FIGURE 8 Calculation
Step-Down
!2n
Vout + VF
Vinlmin) - Vsat - Vout
toff
DESIGN FORMULA TABLE
Step-Up
Vout - VF
Vinlmin)
Inverting
I
--
I
--
fmin
fmin
CT
4 x 10 5 ton
4 x 10 5 ton
Ipklswitch)
2loutlmax)
RSC
0.33
---Ipklswitch)
Llmin)
(Vinlmin)-V5al-VgYI)t
)
Ipklswitch)
onlmax
(ton
+
toff) max
Co
2 loutlmax)
VF
= Forward
I
--
fmin
4x 10 Stan
(~)
toff
2 loutlmax)
0.33
---Ipklswitch)
(Vin(min) - Vsa
Ipklswitch)
Ipk!5wil~hlltQn + tQff)
8 Vripplelp-p)
Vsat "" Saturation voltage of the output switch.
VQut + VF
Vin(min) - Vsat
Vin!minl
Vsat
t)1
(~)
toff
0.33
---Ipklswitch)
(Vinlminl- Vsat)t
Ipklswitch)
onlmax)
onlmax)
~ IQut ton
=~
'ripple
'ripple
voltage drop of the ring back rectifier.
The fOllowing power supply characteristics must be chosen:
Vin - Nominal input voltage. If this voltage is not constant, then use Vinlmax) for step-down and Vin(min) for stepup and inverting convertor.
Vout -
Desired output voltage, Vout =
'.25 (, + ~) for step-down and step-up; Vout ,.2;, R2 for Inverting.
=
lout - Desired output current.
fmin - Minimum desired output ·switching frequency at the selected values for Yin and 10 .
Vripple(p-p) - Desired peak-to-peak output ripple voltage. In practice, the calculated value will need to be increased
due to the capacitor's equivalent series resistance and board layout. The ripple voltage should be
kept to a low value since it will directly effect the line and load regulation.
S•• Application Note AN920A for further information.
MOTOROLA LINEAR/INTERFACE DEVICES
3-358
Power/Motor
Control Circuits
In Brief .. .
With the expansion of electronics into more and more
mechanical systems there comes an ever increasing
demand for simple but intelligent circuits that can blenC\'
these two technologies together. In past years, the task
of power/motor control was once the domain of discrete
devices. But today, increasingly, this task is being per·
formed by bipolar Ie technology because of cost, size,
and reliability constraints. Motorola offers integrated
circuits designed to anticipate the requirements for both
simple and sophisticated control systems, while providing cost effective solutions to meet the application.
Selector Guide
Power Controllers. . . . . . . . . . . . . . . .. 4-2
Motor Controllers . . . . . . . . . . . . . . . .. 4-4
Alphanumeric Listing ............... 4-7
Data Sheets ........................ 4-8
II
Power/Motor Control Circuits
Power Controllers
Zero Voltage Switches . . . . . . . . . . . . . . . . . . . .
Zero Voltage Controller. . . . . . . . . . . . . . . . . . . .
Integrated Solenoid Driver. . . . . . . . . . . . . . . . . .
High-Side Driver Switch ....................
4-2
4-3
4-3
4-3
Motor Controllers
DC Servo Motor Controller/Driver . . . . . . . . . . . . .
DC Brushless Motor Controller. . . . . . . . . . . . . . .
Closed-Loop Brushless Motor Adapter. . . . . . . . . .
Stepper Motor Drivers. . . . . . . . . . . . . . . . . . . . .
Triac Phase Angle Controller ................
Universal Motor Speed Controllers . . . . . . . . . . . .
4-4
4-4
4-5
4-5
4-5
4-6
Power Controllers
II
An assortment of battery and ac line-operated control ICs for specific applications are shown. They are designed to
enhance system performance and reduce complexity in a wide variety of control applications.
Zero Voltage Switches
CA3079P/CA3059P
T A = - 40° to + 85°C, Case 646
... designed for thyristor control in a ·variety of ac power
switching applications for ac input voltages of 24 V, 120 V,
2081230 V, and 227 V @ 50/60 Hz. Features include:
• Limiter-Power Supply - Allows operation directly
from an ac line.
• Differential On/Off Sensing Amplifier - Tests for
condition of external sensors or input command signals. Proportional control capability or hysteresis may
be implemented.
• Zero-Crossing Detector - Synchronizes the output
pulses to the zero voltage point of the ac cycle. Eliminates RFI when used with resistive loads.
• Triac Drive - Supplies high-current pulses to the
external power controlling thyristor.
• Protection Circuit (CA3059 only) - A built-in circuit
may be actuated, if the sensor opens or shorts, to
remove the drive circuit from the external triac.
• Inhibit Capability (CA3059 only) - Thyristor firing
may be inhibited by the action of an internal diode gate.
• High Power DC Comparator Operation (CA3059
only) - Operation in this mode is accomplished by connecting Pin 7 to Pin 12 (thus overriding the action of the
zero-crossing detector).
CA3079
Gate
I
I
I
I
I
I
I
_ _ _ _ . _ _ ..J
,
Inhibit
*NTC Sensor
NOTE: Shaded Area Not Included With CAJ079.
MOTOROLA LINEAR/INTERFACE DEVICES
4-2
6
External Trigger
Zero Voltage Controller
UAA1016B-TA = -20° to + 100°C, Case 626
· .. designed to drive triacs with the Zero Voltage technique which allows RFI free power regulation of resistive loads. They provide the following features:
• Proportional Temperature Control Over an Adjustable Band
• Adjustable Burst Frequency (to Comply with
Standards)
UAA1016B
Temp
S ..
R2
R'
VRaf
R4
• Sensor Fail-Safe
• No dc Current Component Through the Main Line (to
Comply with Standards)
• Negative Output Current Pulses (Triacs Quadrants 2
and 3)
(NTC)
•
Temp.
Sensor
R,
• Direct ac Line Operation
• Low External Components Count
Integrated Solenoid Driver
MC3484S2,S4 -
T J = - 40° to
MC3484
+ 125°C, Case 314D
400
The MC3484 is an integrated monolithic solenoid
driver. Its typical function is to apply full battery voltage
to fuel injector(s) for rapid current rise, in order to produce positive injector opening. When load current
reaches a preset level (4.0 A in MC3484S4 or 2.4 A in
MC3484S2) the injector driver reduces the load current
by a 4-to-1 ratio and operates as a constant current
supply. This condition holds the injector open and reduces system dissipation.
--'out
Injector
40 Vz(max)
High-Side Driver Switch
MC3399T -
T J = - 40° to
+ 150°C, Case
Vbat
4.5 V to 24 V
fSO V Transient)
MC3399T
314D
The MC3399T is a High-Side Driver Switch that is
designed to drive loads from the positive side of the
power supply. The output is controlled by a TTL compatible Enable pin. In the ON state, the device exhibits
very low saturation voltages for load currents in excess
of 750 mA. The device also protects the load from
positive- or negative-going high voltage transients by
becoming an open circuit and isolating the transient for
its duration from the load.
The MC3399T is fabricated on a power BIMOS process
which combines the best features of Bipolar and MaS
technologies. The mixed technology provides higher
gain PNP output devices and results in Power Integrated
Circuits with reduced quiescent current.
Output'""
Ignition
.I1..
Transient
Generator
50n
=-12 V
Ground
NOTE:
*Depending on Load Current and Transient Duration, an Output Capacitor (COl of
sufficient value may be used to hold up Output Voltage during the Transient. and
absorb Turn-off Delay Voltage Overshoot.
MOTOROLA LINEAR/INTERFACE DEVICES
4-3
Motor Controllers
This section contains integrated circuits designed for
cost effective control of specific motor-families. Included
are controllers for dc servo, stepper, brush less, and universal type motors.
MC33030P
Motor
DC Servo Motor Controller/Driver
MC33030P -
..
T A = - 40° to
+ 85°C,
Case 648C
A monolithic dc servo motor controller providing all
active functions necessary for a complete closed loop
system. This device consists of an on-chip op amp
and window comparator with wide input commonmode range, drive and brake logic with direction
memory, power H switch driver capable of 1.0 A, independently programmable over-current monitor and
shutdown delay, and over-voltage monitor. This part
is ideally suited for almost any servo positioning application that requires sensing of temperature, pressure, light, magnetic flux, or any other means that can
be converted to a voltage.
MC33034
DC Brushless Motor Controller
MC33034P60,P120 -
TA =
- 40° to
+ 85°C, Case 724
The MC33034 Series is a high performance monolithic
brush less motor controller containing all of the active
functions required to implement a full featured openloop three or four phase motor control system. These
devices consist of a rotor position decoder for proper
commutation sequencing, temperature compensated
reference capable of supplying sensor power, frequency
programmable sawtooth oscillator, fully accessible
error amplifier, pulse width modulator comparator,
three open collector top drivers, and three high current
totem pole bottom drivers ideally suited for driving
power MOSFETs.
MOTOROLA LINEAR/INTERFACE DEVICES
4-4
Closed-Loop Brushless Motor
Adapter
MC33039P -
TA
=
-
MC33039
40° to + 85°C, Case 626
The MC33039P is a high performance closed-loop
speed control adapter specifically designed for use in
dc brushless motor control systems. Implementation
will allow precise speed regulation without the need for
a magnetic or optical tachometer. This device contains
three input buffers each with hysteresis for noise immunity, th.ree digital edge detectors, a programmable
monostable, and an internal shunt regulator. Also
included is an inverter output for use in systems that
require conversion of sensor phasing. Although this
device is primarily intended for use with the MC33034
brushless motor controller, it can be used cost effectively in many other closed-loop speed control
applications.
Vee
A
To Rotor
~:~:~r~
{
0'+'+-~¢>+--\f"-'"
080'+.,.,.--111>-.---,,-_, '"'r
"-t==:-\t",
II
MC3479
VM
Stepper Motor Drivers
r:-:-"""71--.......--oO l1
Clk
MC3479P - TA = 0° to + 70°C, Case 648C
SAA1042,A-TA = 0° to +70°C,Case721
Stepper Motor Drivers provide up to 500 mA of drive
per coil for two phase 6.0 V to 24 V stepper motors.
Control logic is provided to accept commands for clockwise, counter clockwise and half or full step operation.
MC3479P has added Output Impedance Control (OIC)
and Phase A drive state indicator (not available on
SAA1042 devices).
L.--:..:u"';'::!;:-;+-.Q l2
CW/CCW
Vo
r'"~r'-"":r:"-'+-9 l3
Full/Half
Step
Ole
Phase A
Bias/Set
(MC3479P Only)
Triac Phase Angle Controller
TDA1185A
TDA1185A TA = 0° to + 70°C, Case 646
· .. generates controlled triac triggering pulses and
allows tacholess speed stabilization of universal motors
by an integrated positive feedback function.
• Low Cost External Components Count
• Optimum Triac Firing (2nd and 3rd Quadrants)
• Repetitive Trigger Pulses When Triac Current is Interrupted by Motor Brush Bounce
"
• Triac Current Sensed to Allow Inductive Loads
• Soft Start
• Power Failure Detection and General Circuit Reset
• Low Power Consumption: 1.0 mA
MOTOROLA LINEAR/INTERFACE DEVICES
4-5
'GNO
II
Universal Motor Speed Controllers
TDA 1085A T A
=
0° to
+ 70°C, Case 648
TDA 1085C T A = - 10° to
· .. all the necessary functions for the speed control of
universal (acldc) motors in an open or closed loop configuration. Facility for defining the initial speed/time
characteristic. The circuits provide a phase angle varied
trigger pulse to the motor control triac
+ 120°C, Case 648
Similar to TDA1085A, but designed for commercial
washing machine service.
TDA1285A TA
=
0° to
+ 70°C, Case 648
Similar to TDA1085A, plus:
• Guaranteed Full Wave Triac Drive
• Soft Start from Power-up
• Repeated Trigger Pulse if Triac Fails to Latch
• On-Chip Frequency/voltage Converter and Ramp
Generator
• Over 65 mA Output Pulse Current
• Current Limiting Incorporated
• Automatic Adaptation to Inductive or Hall Effect
Sensors
• Direct Drive from ac Line
• Sensor Circuit Continuity Detection
TDA1285A
Unreg
Voltage
Input
Hall Effect
Power Supply
.....-j;-,+1-,.<) & Inductive
Speed Sense
'Input
v.
Reg.
Output
Facultative
Ip 14 Prog.
Pulse
Output
~
.c
"0
0
~
" "~
1ii
Vi
'"
o
~
~
0. 0.
--¢8
Inhibit
6
External Trigger
'NTC Sensor
NOTE: Shaded Area Not Included With CA3079.
TABLE A
AC Input Voltage
(SO/50 Hz)
Input Series
Resistor (RSI
Dissipation Rating
for RS
vac
kn
W
24
2.0
0.5
120
10
2.0
208/230
20
4.0
277
25
5.0
5. Protection Circuit (CA3059 only) - A
built-in circuit may be actuated, if the sensor
opens or shorts, to remove the drive current
from the external triac.
6. Inhibit Capability (CA3059 onlyl Thyristor firing may be inhibited by the action
of an internal diode gate at Pin 1.
7. High Power DC Comparator Operation
(CAJ059 only) - Operation in this mode is
accomplished by connecting Pin 7 to Pin 12
(thus overriding the action of the zero-crossing
detector). When Pin 13 is positive with respect
to Pin 9, current to the thyristor is continuous.
MOTOROLA LINEAR/INTERFACE DEVICES
4-8
CA3059, CA3079
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Rating
DC Supply Voltage
Value
12
10
CA3059
CA3079
(Between Pins 2 and 7
DC Supply Voltage
Vdc
VCC
CA3059
CA3079
(Between Pins 2 and 8)
Unit
Vdc
VCC
12
10
Peak Supply Current (Pins 5 and 7)
15,7
±50
mA
Fail·Safe Input Current (Pin 14)
114
2.0
mA
Output Pulse Current (Pin 4)
lout
150
mA
Junction Temperature
TJ
150
Operating Temperature Range
TA
-40 to +85
Tstg
-65 to +150
°c
°c
uc
Storage Temperature Range
II
ELECTRICAL CHARACTERISTICS (Operation@ 120 Vrm" 50-60 Hz, TA = 25 0 C)**
Characteristic
DC Supply Voltage
Test Circuits
Symbol
Fig.2
Vs
Min
Typ
Max
Unit
Vdc
Inhibit Mode
6.5
6.1
7.0
6.4
6.2
7.0
-
-
160
-
6.1
RS=10k,IL=0
RS = 5.0 k, I L = 2.0 mA
-
Pulse Mode
RS=10k,IL=0
RS = 5.0 k, RL = 2.0 mA
6.0
Gate Trigger Current
Fig.3
IGT
Fig.3
10M
-
mA
(VGT == 1.0 V. Pins 3 and 2 connected)
Peak Output Current, Pulsed
With Internal Power Supply. VGT = 0
Pin 3 Open
Pi ns 3 and 2 Connected
With External Power Supply.
Pin 3 Open
Pi ns 3 and 2 Connected
Vee'"
12 V, VGT =0
Total Gate Pulse Duration (CExt
Positive dv/dt
Negative dv/dt
50
90
125
190
-
-
230
300
-
V9IV2
0.465
0.485
0.520
tp
tn
70
70
100
100
140
140
tPl
Inl
-
50
-
Fig.3
14
0.001
10
pA
Fig.7
liB
-
1.0
2.0
pA
VCMR
-
0;15
0.15
1.4t05.0
-
Vdc
VI
V6- V 4
-
1.4
1.6
Vdc
1.4
-
Vdc
Fig.4
Fig.5
Inhibit Input Ratio
(Ratio of Voltage@ Pin 9 to Pin 2)
= 0)
mA
,
-
Fig.6
Fig.6
Pulse Duration After Zero Crossing
-
'"
p'
(CExI = 0, RExt = ~)
Positive dv/dt
Negative dv/dt
Output Leakage Current Inhibit Mode***
Input Bias Current
CA3059
CA3079
-
Common Mode Input Voltage Range
(Pins 9 and 13 Connected)
Inhibit Input Voltage
CA3059 only
Fig.8
External Trigger Voltage
CA3059 only
-
60
"'Care must be taken, especially when using an external power supply, that total package dissipation is not exceeded.
"'*The values given in the Electrical Characteristics Chart at 120 V also apply for operation at input voltages of 24 V, 208/230 V, and
277 V, except for Pulse Duration test. However, the series resistor (RS) must have the indicated value, shown in Table A for the specified
input voltage .
... u1 4 out of Pin 4
2 Von Pi.n 1
51 position 2
MOTOROLA LINEAR/INTERFACE DEVICES
4-9
CA3059, CA3079
TEST CIRCUITS
(All resistor values are in ohms)
FIGURE 3 - PEAK OUTPUT (PULSED) AND
GATE TRIGGER CURRENT WITH
INTERNAL POWER SUPPLY
FIGURE 2 - DC SUPPLY VOLTAGE
..
Oscilloscope
With
High-Gain
Input
Vs
FIGURE 4 - PEAK OUTPUT CURRENT (PULSED)
WITH EXTERNAL POWER SUPPL Y
FIGURE 5 - INPUT INHIBIT RATIO
With
High·Gain
Input
FIGURE 6 - GATE PULSE DURATION TEST CIRCUIT
WITH ASSOCIATED WAVEFORM
FIGURE 7 - INPUT BIAS CURRENT TEST CIRCUIT
V CC =6.0V
I
I
I
I
r-
tP1
l-i
~
tp(,'f:i s
120Vrms
60 Hz
+3V
Oscilloscope
With
High-Gain
Input
MOTOROLA LINEAR/INTERFACE DEVICES
4-10
CA3059, CA3079
TYPICAL CHARACTERISTICS
FIGURE 8 - INHIBIT INPUT VOLTAGE TEST
10 k
FIGURE 9 - PEAK OUTPUT CURRENT (PULSED)
versus EXTERNAL POWER SUPPLY VOLTAGE
9
10
g"
w
11
250
4
Pins 2 and 3 Connected
~
ZOO
~ 150
!;
~
100
'"~
50
.....-
-5.0
..s
--
120 Vrms, 60 Hz t--
Gate Voltage = 0
B.O
11
6.0
7.0
9.0
10
EXTERNAL POWER SUPPLY VOLTAGE (VOLTS)
f12
140
-;;; 130
I-
.3
-I--
'"
b
-I--
~
~
r-
~
=>
120
120 Vrms, 60 Hz Operation
w
~11O
'-'
~
'"
-
140
~
=>
~
~
f-f-
120 Vr~s, 610 Hzl
160
§
~
f-
Pin 3 Open
I-
FIGURE 11 - TOTAL PULSE WIDTH versus
AMBIENT TEMPERATURE
FIGURE 10 - PEAK OUTPUT CURRENT (PULSED)
versus AMBIENT TEMPERATURE
;;:
--.....-
~
.Id-t:
"" ......
glaD
120
120 Vrms, 60 Hz IGat , VO:tag'l~ U f l
~
100
20
·20
·40
I-
I
40
60
BO
BO
........
90
100
·40
AMBIENT TEMPERATURE (OCl
·20
20
40
......
60
r---..
BO
100
AMBIENT TEMPERATURE (DC)
FIGURE 12 - INTERNAL SUPPLY versus
AMBIENT TEMPERATURE
FIGURE 13 - INHIBIT VOLTAGE RATIO
versus AMBIENT TEMPERATURE
t-l~O v~ms, ~O Kzl -I-+-+-+-f-I-+-+-+--1f-+-----1
N 0.52 I-+-+-f-+--+-f-+-+-+-f-+--+-f-+-+-j
<:
~ 0.50 I-+-+~f-+--+-f-+-+-+-f-+--+-f-+-+-j
;;;
:;
"
7.0
~ 0.48~t:t:~t:t~=tt::t=rt:j:~==tt~
~
~
;<
6.B
~
6.4
~
w
6.6
.....-
f-
'"~ 0.461-+-+-ff-+--+-f-+-+-+-1-+--+-f-+-+-j
Inhibit Mode -
f- f-
>
6.2
V
./
6.0
·40
·20
~
0.441-+-+-ff-+--+-f-+-+-+-f-+--+-f-+-+-j
~
0.421-+-+-ft--+--+-f-+-+-+-ff-+--+-f-+-+-j
z
./
20
40
60
AMBIENT TEMPERATURE (OC)
BO
0.40 L-...l40'-.L•..J2':-0--'._L-...L-2J..0-lL-4J..0-L-:':60,-L--::'BO,-.L-,Jl0':-0....l
100
AMBIENT TEMPERATURE (OC)
MOTOROLA LINEAR/INTERFACE DEVICES
4-11
•
•
CA3059, CA3079
FIGURE 14 -CIRCUIT SCHEMATIC
Rp
Inhibit
Input
ASensor
13
-----,
I
I
I
15
I
I
I
3
.....--+-0 ~~~s:nt
25
Ac Line o-"'V'o/'y--O--i---+'V\~
I
Input
I
I
I
I
I
I
I
I 4
30 k
I
I
I
I
~~Y'isto,
Gate
_______ ...J
12
14
To
Fail-Safe
Input
For de Mode
or 400 Hz
Operation
Common
Fo,
External
Trigger
NOTE: Current sources are established by an internal reference.
Pins 1, 6,12, and 14 are not used with CA3079.
APPLICATION INFORMATION
Power Supply
B. Sensor Resistance (RX) and Rp values should be
between 2 kQ and 100 kQ.
C. The relationship 0.33 < RX/Rp < .3 must be met
over the anticipated temperature range to prevent
undesired activation of the circuit. A shunt or series
resistor may have to be added.
The CA3059 and CAJ079 are self-powered circuits,
powered from the ac line through an appropriate dropping
resistor (see Table A). The internal supply is designed to
power the auxiliary power circuits.
In appl ications where more output current hom the
internal supply is required, an external power supply
of higher voltage should be used. To use an external
power supply, connect pin 5 and pin 7 together and apply
the synchronizing voltage to pin 12 and the dc supply
voltage to pin 2 as shown in Figure 4.
External Inhibit Function (CA3059 Only)
A priority inihibit command applied to pin 1 will
remove current drive from the thyristor. A command of
at least + 1.2 V @ 10 /lA is required. A DTL or T2L logic 1
applied to pin 1 will activate the inhibit function.
Operation of Protection Circuit (CA3059 Only)
DC Gate Current Mode (CA3059 Only)
The protection circuit, when connected, will remove
current drive from the triac if an open or shorted sensor
is detected. This circuit is activated by connecting pin 13
to pin 14 (see Figure 1).
The following conditions should be observed when the
protection circuit is utilized:
A. The internal supply should be used and the external
load current must be limited to 2 mA with a 5 kQ
dropping resistor.
When comparator operation is desired or inductive
loads are being switched, pins 7 and 12 should be
connected. This connection disables the zero-crossing
detector to permit the flow of gate current from the
differential sensing amplifier on demand. Care should
be exercised to avoid possible overloading of the internal
power supply when operating the device in this mode.
A resistor should be inserted between pin 4 and the
thyristor gate in order to limit the current.
MOTOROLA LINEAR/INTERFACE DEVICES
4-12
®
MC3479P
MOTOROLA
Advance Information
STEPPER MOTOR DRIVER
STEPPER MOTOR DRIVER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3479P is designed to drive a two-phase stepper motor in
the bipolar mode. The circuit consists of four input sections, a logic
decoding/sequencing section, two driver-stages for the motor coils,
and an output to indicate the Phase A drive stat8.
•
Single Supply Operation -
•
350 mA/Coil Orive Capability
+7.2 to +16.5 Volts
•
Clamp Oiodes Provided for Back-EMF Suppression
•
Selectable CW/CCW and M/Half Step Operation
•
Selectable High/Low Output Impedance (Half Step Mode)
•
TTL/CMOS Compatible Inputs
•
Input Hysteresis -
•
Phase Logic Can Be Initialized to Phase A
•
Phase A Output Orive State Indication (Open-Collector)
l_
400 mV Minimum
P SUFFIX
1
PLASTIC PACKAGE
CASE 648C-02
PIN ASSIGNMENT
FIGURE 1 -
VD
BLOCK DIAGRAM
r..
Clk
~ff
Clock
r
t----
Driver
OIC
?iff
~
OIC
Bias/Set
Clk
CW/CCW
L2
OIC
FulllHalf
Step
L3
~
Driver
~
(~ff
Gnd
~ VD
,
f-
F/H Stepr-
L4
L1
~
Logic
M/Hal1
Step
L3
L1
Gnd
~
CW/CCW ?1n:CW/CCWr-
VM
L2
t
L4
INPUT TRUTH TABLE
Input Low
Input High
~
Bias/Set
GW/CGW
Gnd
Full/Half Step
DIG
Glk
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
4-13
GW
GGW
Full Step
Half Step
Hi Z
LowZ
Positive Edge Triggered
•
•
MC3479P
MAXIMUM RATINGS
Symbol
Value
Unit
Supply Voltage
VM
+18
Vdc
Clamp Diode Cathode Voltage (Pin 1)
VD
VM + 5.0
Vdc
Driver Output Voltage (Pins 2, 3,14,15)
VOD
VM + 6.0
Vdc
Driver Output Current/Coil
100
±500
mA
Input Voltage (Pins 7,8,9,10)
Vin
-0.5 to +7.0
Vdc
Rating
Bias/Set Current (Pi n 6)
IBS
-10
mA
Phase A Output Voltage (Pin 11)
VOA
+18
Vdc
J5haSeA Sink Current (Pin 11)
lOA
20
mA
TJ
+150
°C
Tstg
-65 to +150
°C
Junction Temperature
Storage Temperature Range
RECOMMENDED OPERATING CONDITIONS
Characteristic
Symbol
Min
Max
Unit
Supply Voltage
VM
+7.2
+16.5
Vdc
Clamp Diode Cathode Voltage
VD
VM
VM +4.5
Vdc
Driver Output Current (Per Coil) (Note 51
100
-
350
mA
Input Voltage (Pins 7,8,9,10)
Vin
0
+5.5
Vdc
-300
-75
~A
VM
Vdc
Bias/Set Current (Outputs Active)
IBS
Phase A Output Voltage
VOA
-
Phase A Sink Current
lOA
0
8.0
mA
Operating Ambient Temperature
TA
0
+70
°C
DC ELECTRICAL CHARACTERISTICS
(Specifications apply over the recommended supply voltage and temperature ranges unless otherwise noted.) (See Notes 1,2)
Characteristic
INPUT LOGIC LEVELS
Threshold Voltage (Low-to-High)
7,8,9,
10
Threshold Voltage (High-to-Low)
Hysteresis
Current
(VI
(VI
(VI
=0.4 V)
=5.5 V)
=2.7 V)
VTLH
-
-
2.0
Vdc
VTHL
0.8
-
-
Vdc
VHYS
0.4
-
-
Vdc
IlL
IIH1
IIH2
-100
-
-
~A
-
+100
+20
DRIVER OUTPUT LEVELS
Output High Voltage
(IBS -300 ~A)
=
=-350 mAl
=-0.1 mAl
2,3,
14,15
Vdc
VOHD
VM -2.0
VM -1.2
-
-
VOLD
-
-
0.8
Vdc
Differential Mode Output Voltage Difference (Note 31
(IBS -300 ~A, 100 350 mAl
DVOD
-
-
0.15
Vdc
Common Mode Output Voltage Difference (Note 4)
(lBS -300 ~A, 100 -0.1 mAl
CVOD
-
-
0.15
Vdc
-
+100
+100
Output Low Voltage
(lBS -300 ~A, 100
=
=
=
(100
(100
=350 mAl
=
=
Output Leakage - Hi Z State
(0"; VOD"; VM, IBS -5.0 ~A)
(0"; VOD"; VM, IBS -300 ~A, Pin 9
=
=
~A
IOZ1
IOZ2
=2.0 V, Pin B =0.8 V)
-100
-100
MOTOROLA LINEAR/INTERFACE DEVICES
4-14
MC3479P
DC ELECTRICAL CHARACTERISTICS (continued)
(Specifications apply over the recommended supply voltage and temperature ranges unless otherwise noted.) (See Notes 1, 2)
Characteristic
CLAMP DIODES
Forward Voltage
(10= 350 mAl
1,2,3,
14,15
Leakage Current (Per Diode)
(Pin 1 = 21 V; Pins 2, 3,14,15
= 0 V;
VOF
-
2.5
3.0
Vdc
lOR
-
-
100
",A
VOLA
-
-
0.4
Vdc
10HA
-
-
100
",A
IBS = 0 pAl
PHASE A OUTPUT
Output Low Voltage
11
(lOA=8.0 mAl
Off State Leakage Current
(VOHA = 16.5 V)
POWER SUPPLY
Power Supply Current
(100 = 0 pA, IBS = -300 pAl
16
(L1 = VOHO, L2 = VOLD, L3 = vOHO, L4 = VOLD)
(L1 = VOHO, L2 = VOLD, L3 = Hi Z, L4 = Hi Z)
(L1 = VOHO, L2 = VOLD, L3 = VOHO, L4 = VOHO)
mA
-
IMW
IMZ
IMN
-
70
40
75
BIAS/SET CURRENT
To Set Phase A
6
IBS
-5.0
",A
NOTES;
1 Algebraic convention rather than absolute values is used to designate limit values.
2. Current into a pin is designated as positive. Current out of a pin is designated as negative.
3. DVOD = IVOD1 2 - VOD3 41 where
VODl,2 = (VO~Dl -
VOL~2i or (VOHD2 -
VOLD1i, and
VOD3,4 = (VOHD3 - VOLD4i or (VOHD4 - VOLD3i.
4. CVOD =IVOHD1 - VOHD21 orlVOHD3 - VOHD41.
5. See section on Power Dissipation in Application Information.
PACKAGE THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Ambient -
No Heat Sink
AC SWITCHING CHARACTERISTICS (TA = +25°C, VM = 12 V) (See Figures 2, 3, 4)
Characteristic
Clock Frequency
Pins
Symbol
Min
Typ
Max
Unit
7
fCK
a
-
50
kHz
",s
Clock Pulse Width -
High
7
PWCKH
10
-
Clock Pulse Width -
Low
7
PWCKL
10
-
6
PWBS
10
-
10-7
9-7
Isu
5.0
-
-
10-7
9-7
Ih
10
-
-
",s
",s
Bias/Set Pulse Width
Setup Time Hold Time -
CW/CCW and F/HS
CW/CCW and F/HS
Propagation Delay -
Clk-to-Driver Output
Propagation Delay -
Bias/Set-to-Driver Output
Propagation Delay -
Clk-to-Phase A Low
Propagation Delay -
Clk-to-Phase A High
tpco
-
8.0
-
tpBSD
-
1.0
-
7-11
tpHLA
-
12
7-11
tPLHA
-
5.0
-
MOTOROLA LINEAR/INTERFACE DEVICES
4-15
",s
",s
",s
",s
1'"
",s
•
MC3479P
FIGURE 2 - AC TEST CIRCUIT
+12V
VM
L2
1.0k·
2
56 k
Bias/Set
6
Clk
7
OIC
8
Ll
3
MC3479P
a
15
F/HS
Bias/Set
Input
L3
11
CW/CCW
FIGURE 3 -
L4
14
BIAS/SET TIMING (Rafer to Figure 2)
Note: t r • tf (10%-90%) for
input signals are ~ 25 ns.
o
tpBSO
Ll-L4
Outputs _ _ _ _ _ _--''-(H_i_9_h_lm_p_ed_a_n_C_e_)...._ _ _ _ _ __
PIN DESCRIPTION
Symbol
Pin #
Description
Power Supply
VM
16
Power supply pin for both the logic circuit and the motor coil current. Voltage range
is +7.2 to +16.5 volts.
Ground
Gnd
4.5
12.13
Ground pins for the logic circuit and the motor coil current. The physical configuration
of the pins aids in dissipating heat from within the Ie package.
Clamp Diode
Voltage
VD
1
This pin is used to protect the outputs where large voltage spikes may occur as the
motor coils are switched. Typically a diode is connected between this pin and Pin 16.
See Figure 11.
L1. L2
L3. L4
2.3
14.15
High current outputs for the motor coils. L1 and L2 are connected to one coil, and L3
and L4 to the other coil.
Bias/Set
B/S
6
This pin is typically 0.7 volts belowVM. The current out of this pin {through a resistor to
ground} determines the maximum output sink current. If the pin is opened (185 < 5.0 ~A)
the outputs assume a high impedance condition, while the internal logic presets to a
Phase A condition.
Clock
Clk
7
The positive edge of the clock input switches the outputs to the next position. This input has no effect if Pin 6 is open.
F/HS
9
When low (Logic "0"), each clock pulse will cause the motor to rotate one full step.
When high, each clock pulse will cause the motor to rotate one-half step. See Figure 7
for sequence.
Clockwise/
Counterclockwise
CW/CCW
10
This input allows reversing the rotation of the motor. See Figure 7 for sequence.
Output Impedance
Control
OIC
B
This input is relevant only in the half step mode (Pin 9 > 2.0 V). When low (Logic "0")
the two driver outputs of the non-energized coil wilr be in a high impedance condition.
When high the same driver outputs will be at a low impedance referenced to VM. See
Figure 7.
Phase A
Ph A
11
This open-collector output indicates (when low) that the driver outputs are in the Phase A
condition (L1 L3 VOHD. L2 L4 VOLD).
Nama
Driver Outputs
Full/Half Step
= =
= =
MOTOROLA LINEAR/INTERFACE DEVICES
4-16
MC3479P
FIGURE 4 -
Clk
CLOCK TIMING (Refer to Figure 2)
o
Ll-L4
Outputs
i -,- X
~!;CCW
Inputs
Note: t r , tf ('0-90%)
-3-.0-V_ _ _ _ _ _ _ _,_.s---,v
O_ _ _ _ _ _ _ _ _ _ _- J . .
_
Phase A
for input signals are
e;;;
r ---------;---
.
-
~tPHLA
-I
_____
Output
I'BS
SIS
lr-
•
'.5 v\l..._ _ _ _ _ _ _ _ _ _--'
FIGURE 5 -
(Pin 6)
tPLHA----.l
10 ns.
OUTPUT STAGES
•
*
:
L1
(Pin 3)
:
(Pin 2)
yi~
_~
Current
Drivers
-J.
/;'
I
L __
~
Parasitic
Diodes
and
Logic
Transistors
Inputs
APPLICATION INFORMATION
GENERAL
The MC3479P integrated circuit is designed to drive a
stepper positioning motor i" applications such as disk
drives and robotics. The outputs can provide up to .350 mA
to each of two coils of a two-phase motor. The outputs
change state with each low-to-high transition of the clock
input, with the new output state depending on the previous state, as well as the input conditions on Pins B, 9,
and 10.
ure 5), which when connected to a two-phase motor. provide two full-bridge configurations (L3 and L4 are not
shown in Figure 5). The polarities applied to the motor
coils depend on which transistor IOH or OLl of each output is on, which in turn depends on the inputs and the
decoding circuitry.
The maximum sink current available at the outputs is
a function of the resistor connected between Pin 6 and
ground Isee section on Bias/Set operation). Whenever
the outputs are to be ill a high impedance state, both transistors (OH and OL of Figure 5) of each output are off.
OUTPUTS (Pins 2.3.14.15)
The outputs IL1-L4) are high currentoutputs (see Fig-
MOTOROLA LINEAR/INTERFACE DEVICES
4-17
MC3479P
•
VD (Pin 1)
BiAS/SET (Pin 6)
This pin allows for provision of a current path for the
motor coil current during switching, in order to suppress
back-EMF voltage spikes. Pin 1 is normally connected to
VM (Pin 16) through a diode (zener or regular), a resistor,
or directly. The peak instantaneous voltage at the outputs
(Pins 2, 3, 14, and 15) must not exceed VM by more than
6 volts. The voltage drop across the internal clamping
diodes must be included in this portion of the design (see
Figure 6). Note the parasitic diodes (Figure 5) across each
QL of each output provide for a complete circuit path for
the switched current.
This pin can be used for three functions: a) determining the maximum output sink current; b) setting the internal logic to a known state; and c) reducing power consumption.
a) The max1mum output sink current is determined by
the base drive current supplied to the lower transistors
(QL's of Figure 5) of each output, which in turn, is a function of las. The appropriate value of las is determined by:
las = 100 x 0.86
where las is in microamps, and 100 is the motor current/
coil in milliamps.
The value of Ra (between Pin 6 and ground) is then
determined by:
FIGURE 6 - CLAMP DIODE CHARACTERISTICS
Ra =
3.0
1.0
b) When Pin 6 is opened (raised to VM) such that las
is <5.0 p.A. the internal logic is set to the Phase A condition, and the four driver outputs are put into a high impedance state. The Phase A output (Pin 11) goes active
(low), and input signals at Pins 7,8,9 and 10 are ignored
during this time. Upon re-establishing las, the driver outputs become active, and will be in the Phase A position
(Ll = L3 = VOHO, L2 = L4 = YOLO). The circuit will then
respond to the inputs at Pins 7, 8, 9 and 10.
The Set function (opening Pin 6) can be used as a powerup reset while supply voltages are settling. A CMOS logic
gate (powered by VM) can be used to control this pin as
shown in Figure 11.
c) Whenever the motor is not being stepped, power dissipation in the IC and in the motor may be lowered by
reducing las, so as to reduce the output (motor) current.
Setting las to 75 p.A will reduce the motor current, but
will not reset the internal logic as described above. See
Figure 12 for a suggested circuit.
,....
k--':
o
o
,.,..
--I-'"
100
200
10 (mAl
VM-0.7V
las
V
300
FULL/HALF STEP (Pin 9)
When this input is at a Logic "0" «0.8 volts), the outputs change a full step with each clock cycle, with the
sequence direction depending on the CW/CCW input (Pin
10). There are four steps (Phase A. a, C, D) for each complete cycle of the sequencing logic. Current flows through
both motor coils during each step. See Figure 7.
When taken to a Logic "1" (>2.0 volts), the outputs
change a half step with each clock cycle, with the sequence direction depending on the CW/CCW input (Pin
10). Eight steps (Phases A-H) result for each complete
cycle of the sequencing logic. Phases A. C, E and G correspond (in polarity) to the phases A. a, C, and 0, respectively, of the full step sequence. Phases a, 0, F and H
provide current to one motor coil, while de-energizing the
other coil. The condition of the outputs of the de-energized
coil depends on the OIC input (Pin 8). See Figure 7 for
timing diagram.
POWER DISSIPATION
The power dissipated by the MC3479P must be such
that the junction temperature (TJ) does not exceed 150°C.
The power dissipated can be expressed as:
P = (VM x 1M) + (2 x 100) [(VM - VOHO) + VOLO]
where VM = Supply voltage;
1M = Supply current other than 100;
100 = Output current to each motor coil;
VOHO = Driver output high voltage;
YOLO = Driver output low voltage.
The power supply current (1M) is obtained from Figure
8. After the power dissipation is calculated, the junction
temperature can be calculated using:
OIC(Pin 8)
TJ = (P x ROJA) + TA
The output· impedance control input determines the
output impedance to the de-energized coil when operating in the half-step mode. When the outputs are in
Phase 8, 0, F or H (Figure 7) and this input is at a Logic
"0" «0.8 V), the two outputs to the de-energized coil
are in a high-impedance condition - QL and QH of both
outputs (Figure 5) are off. When this input is at a Logic
"1" (>2.0 V), a low impedance output is provided to the
de-energized coil as both outputs have QH on (QL off).
To complete the low impedance path requires connecting Pin 1 (VO) to Pin 16 (VM) as described elsewhere in
this data sheet.
where ROJA = Junction to ambient thermal resistance;
TA = Ambient temperature.
For example, assume an application where VM = 12 V,
the motor requires 200 mA/coil, operating at room temperature with no heat sink on the IC. las is calculated:
las = 200 x 0.a6
las= 172p.A
Ra is calculated:
Ra = (12 - 0.7) V/l72 p.A
Ra = 65.7 kll
MOTOROLA LINEAR/INTERFACE DEVICES
4-18
MC3479P
FIGURE 7 -
OUTPUT SEQUENCE
elk
Bias/Set-r-l--~---+----+---~---+----~--~---+----~--~--~--~
eW/eew-:~l,--~,----+---~---1--__L-__~~-t----:---~---+----!---:Phase A B e
L1
0
ABe
B
A
I
I
I
I
I
I
I
I
L3fllll4
L4 VJJJljI
[
I
I
I
i
I
I
1
I
C
B
I
I
I
1
I
I
::
:
:
::
II
I,
I
I
r
I
::
I
I
1
1
1
L2VJJJlj1
1
1
L3VJJJlj1
1
1
I
I
:
I
pzz*l1
1
1
,
I
I
I
I
(bl
1
A
I
I
1
I
1
I
H~lf Steip Mode
I
c
,VI/nUllA,
I
o
1
1
I
:
1
V!IlIfl4
I
I
/ 8 :
f/WZIZJ)
VWWA
I
I
I
1
1
H
G
I
1
I
•
:
,
Wu//uA
1
pnWI}!
I
I
I
= High Impedance
= Logic "0"
= 0 on 'teare
FI HS
ole
t'lmm/J1
1
I
I
L--L
I
I
1
I
I
I
I
I
I
I
,r'--~----+'--~,L
Wllll
I
E:
1
! :
I
o
C
,Wmztd,
L4 VJJJljI
, I
r'----'-,---;----'-'- - -____1---,
::
: : A I 8 :
LlVJJJljl
WlI2VJ
1
I
~'r-:,'
r----l
I
: (al Full Step Mode
I
I
I-
L
~----t:----~--'L---Jr,'--~:----+'--~i
Output
0
I'llllr"1
L2 _____
:
7Jlllll = High Impedance
CW/CCW= Logic "0"
F/HS
= Logic "1", OIC = Logie "0"
I
I
:
Ll
C
B
I A
fZ2'4
o
E
G
A
H
B
o
C
L2l7mi...J
L3W
L4
PhaseA
I
I
I
I
I7JlJJ
1
~
I
1
I
I
L
I
I
I
r--r-
I
I
II
1
I
1
,-I_____________
~~------------------------------~L---J
,-------,
Output
eW/ccw = Logic "0"
F/HS
= Logic "I"
ole
= Logic "I"
(cl Half Step Mode
From Figure 8, 'M (maxI is determined to be 40 mA. From
Figure 9, VOlD is 0.46 volts, and from Figure 10, (VMVOHDI is 1.4 volts.
FIGURE 8 - POWER SUPPLY CURRENT
P = (12 x 0.040) + (2 x 0.2)(1.4 + 0.46)
P= 1.22 W
TJ = (1.22 W x 45°C/WI + 25°C
TJ = 80°C
This temperature is well below the maximum limit. If
the calculated TJ had been higher than 150 oC, a heat
sink such as the Staver Co. V-7 series, Aavid #5802, or
Thermalloy #6012 could be used to reduce ROJA- In extreme cases forced air cooling should be considered.
The above calculation, and ROJA. assumes that a ground
plane is provided under the MC3479P(either or both sides
of the PC board) to aid in the heat dissipation. Single nominal width traces leading from the four ground pins should
be avoided as this will increase TJ, as well as provide
potentially disruptive ground noise and IR drops when
switching the motor current.
70
./
60
100 = 0
./
50
«
..s
40
3
/
30
20
10
V
L
V
/"
50
100
150
200
ISS
MOTOROLA LINEAR/INTERFACE DEVICES
4-19
II'AI
250
300
350
MC3479P
FIGURE 9 - MAXIMUM SATURATION VOLTAGE DRIVER OUTPUT LOW
0.8
2.0
./
/'
o. 6
~
/'
~
<=>
>
9 0.4
V
~
•
FIGURE 10 - MAXIMUM SATURATION VOLTAGE 9RIVER OUTPUT HIGH
o. 2
oV
/'
1. 5
~t.O
~
./
I
~
/'
200
100 (mAl
Phase
V
"..
o
100
FIGURE 11 - TYPICAL APPLICATIONS CIRCUIT
+V
V
0.5
o
300
V
.,/"
~
V
V
100
V
./
300
200
100 (mAl
FIGURE 12 - POWER REDUCTION
+V
MC3479P
6
A
Clock
Digital{
Inputs
r:rNICCW
RS
FUIT/Half Step
OIC>---t~-.:;~~~,.:.::.t---------'
Sias/Set
Power
Operation
or equivalent
-
Suggested value for RBl (VM = 12 VI is 150 kil.
-
RS calculation (see text) must take into account
the current through RS1.
MOTOROLA LINEAR/INTERFACE DEVICES
4-20
or equivalent
®
MC33030
MOTOROI.A
Advance Information
DC SERVO MOTOR
CONTROLLER/DRIVER
DC SERVO MOTOR CONTROLLER/DRIVER
The MC33030 is a monolithic dc servo motor controller providing all active functions necessary for a complete closed loop system. This device consists of an on-chip op amp and window comparator with wide input common-mode range, drive and brake
logic with direction memory, power H switch driver capable of
1.0 A, independently programmable over-current monitor and
shutdown delay, and over-voltage monitor. This part is ideally
suited for almost any servo positioning application that requires
sensing of temperature, pressure, light. magnetic flux. or any
other means that can be converted to a voltage.
Although this device is primarily intended for servo applications, it can be used as a switch mode motor controller.
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
-
• On-Chip Error Amp for Feedback Monitoring
1
• Window Detector with Deadband and Self Centering
Reference Input
• Drive/Brake Logic with Direction Memory
• 1.0 A Power H Switch
P SUFFIX
PLASTIC PACKAGE
CASE 648C-02
• Programmable Over-Current Detector
PIN CONNECTIONS
• Programmable Over-Current Shutdown Delay
• Over-Voltage Shutdown
Reference
Over-Current
Delay
Input
~~~~eF7h:r
SIMPLIFIED BLOCK DIAGRAM
Vcc
2
Over-Current
Reference
Error Amp Output
Filteri Feedback Input
Motor
Vee
,.
l
11- _ _ _
Gnd{ 4
I
I
I
I
Error Amp
Output
Error Amp
Inverting Input
Error Amp Non·
Inverting Input
7
Drive
Output B
Error Amp
Input Filter
I
I
I
I
I
I
Logic
I
I
I
Vce
I
Programmable
+
I
Direction
Memorv
f-----+\
c~;~:~t
Pins 4, 5, 12 and 13 are electrical ground and heat
sink pins for Ie
I
Detector
& Latch
I
Reference
Position 1
I
I
I
15
~
ROC
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
4-21
MC33030
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
36
V
Input Voltage Range
Op Amp, Comparator, Current Limit
Pins 1, 2, 3, 6, 7, 8, 9,15,
VIR
-0,3 to VCC
V
Input Differential Voltage Range
Op Amp, Comparator.
Pins 1,2,3,6,7,8,9,
VI DR
-0,3 to VCC
V
IDLy(sink)
20
mA
Isource
10
mA
Drive Output Voltage Range (Note 1)
VDRV
- 0,3 to (VCC + VF)
V
Drive Output Source Current (Note 2)
IORV(source)
1,0
A
IORV(sink)
1.0
A
IF
1,0
A
PD
RtlJA
ReJC
1000
80
15
mW
'CIW
'CIW
'c
'c
'c
Delay Pin Sink Current (Pin 16)
Output Source Current (Op Amp)
•
Drive Output Sink Current (Note 2)
Brake Diode Forward Current (Note 2)
Power Dissipation and Thermal
Characteristics
Maximum Power Dissipation (ji
TA = 70'C
Thermal Resistance Junction to Air
Thermal Resistance Junction to Case,
Pins 4, 5, 12, 13,
Operating Junction Temperature
TJ
+150
Operating Ambient Temperature Range
TA
-40 to +85
Tst\!
-65 to + 150
Storage Temperature Range
Notes:
1. The upper voltage level is clamped by the forward drop, VF, of the brake diode.
2. These values are ·for continuous de current. Maximum package power dissipation limits
must be observed.
ELECTRICAL CHARACTERISTICS (VCC
=
14 V, TA
Characteristic
=
25'C unless otherwise noted)
I
Symbol
I
Min
Typ
Max
Unit
ERROR AMP
Input Offset Voltage (- 4O'C "" T A "" + 85'C)
VPin 6 = 7,0 V, RL = 100 k
Via
-
1,5
10
mV
Input Offset Current
VPin 6 = 1.0 V, RL
110
-
0,7
-
nA
=
100 k
Input Bias Current
VPin 6 = 7.0 V, RL
liB
-
7,0
-
nA
=
100 k
VICR
-
Oto(VCC -1,21
-
V
SR
0.40
-
V/p1J
550
-
kHz
!1lm
-
63
deg.
CMRR
50
82
-
PSRR
-
89
-
10+
-
250
Input Common-Mode Voltage Range
~VIO = 20 mV, RL = 100 k
Slew Rate, Open Loop (VID
=
0.5 V, CL
=
15 pFI
Unity-Gain Crossover Frequency
Ie
Unity-Gain Phase Margin
Common-Mode Rejection Ratio
VPin 6 = 7.0 V, RL = 100 k
Power Supply Rejection Ratio
VCC = 9.0 to 16 V, VPin 6 = 7.0 V, RL
Output Source Current (VPin 6
Outpui Sink Current (VPin 6
Output Voltage Swing (RL
=
=
=
=
dB
dB
100 k
12 V)
1.0 V)
10-
17 k to Ground)
VOH
VOL
12.5
-
1,8
13.1
0.02
-
mA
-
V
V
-
pA
(Continued)
MOTOROLA LINEAR/INTERFACE DEVICES
4-22
MC33030
ELECTRICAL CHARACTERISTICS (Continued)
Symbol
Characteristic
Typ
Min
Max
Unit
WINDOW DETECTOR
VH
25
35
45
mV
Input Dead Zone Range (V2 - V4, Figure 17)
VIDZ
166
210
254
mV
Input Offset Voltage
r-
.lVIO = 20 mV
VCC../'
RL = 100 k -\--+----':':---+--+---1
II II
~ - 4OOr----t---\--+--t-----+--+---1
ii -l.0
~8 -soot~;;~l:::~====~::~~~~::::~~~
RL to Gnd
TA = 25'C
~
-2. 0
o
'"
~
11 11
~
z
~
55
0
+25
+50
+75
TA, AMBIENT TEMPERATURE I'CI
r-.......
,;:'
Phas,0,.
~~
o
"'-
100
1.0 k
Phle 1
'- Margin
63'
100 k
5~ -I
I
- 55
- 25
0
7.10
Upper Hysteresis
~
l-+-
"""--~ -1. 0
Vee = 14V
Pin 2 = 7.00 V
z~ 7.00
+ 125
w
~
V3
~
t::; 7.05
~
+ 100
Sink Saturation
RL = VCC
TA = 25'C
VCC)
V2
z·
-
o
~
::>
;;;
6.95
~
Lower Hysteresis
~ 6.90
6.85
-55
0
+ 25
+ 50
+ 75
TA, AMBIENT TEMPERATURE I'CI
FIGURE 6 - OUTPUT DRIVE SATURATION
versus LOAD CURRENT
7.1 5
~
I
If} Ltll
t::f
FIGURE 5 - WINDOW DETECTOR FEEDBACK·INPUT
THRESHOLDS versus TEMPERATURE
w
;::::.....;;;
state of drive outputs.
f, FREQUENCY IHzl
~
Vc~
Max. Pin 2 VICR so that
Pin 3 can change
:;;
9
~
~1.0M1so
10 k
3.0 k
-t0
~-1,
1
10
~
;;2
VCC =14V
VOUT=7.0V
0 RL =100 k
CL =40 pF
TA =2S'C
0
1.0
0
~-O. 5
w
N'ain
I'\.
Gndt,1
300
1.0 k
IL' LOAD CURRENT I ± /tAl
100
FIGURE 4 - WINDOW DETECTOR REFERENCE·INPUT
COMMON·MODE VOLTAGE RANGE versus TEMPERATURE
4
\..
.J
0
30
0
r\"
RL to VCC
TA = 25'C
1. 0
1i;
+100
n
'L~I
1.1
In
aturatlOn
~
5
FIGURE 3 - OPEN·LOOP VOLTAGE GAIN AND
PHASE versus FREQUENCY
80
II
2. 0
V>
I-
1\IJ;E\l
25
Source Saturation
z
:;;
.. F\
VCC
:>
-25
o
Vl
~
!3
V4
o
+25
+50
+75
TA, AMBIENT TEMPERATURE I'CI
~
J
+100
+125
. I
1. 0
0
I
Source Saturation
RL to Gnd
TA = 25'C
I -l---!--200
l---V
400
IL' LOAD CURRENT I ± mAl
MOTOROLA LINEAR/INTERFACE DEVICES
4·24
7
I
Gnd.
600
BOO
MC33030
FIGURE 7 -
FIGURE 8 - OUTPUT SOURCE CURRENT-LIMIT versus
OVER-CURRENT REFERENCE RESISTANCE
BRAKE DIODE FORWARD CURRENT
versus FORWARD VOLTAGE
500
r- T1
40
1
...
BO 0
~ 251c
/
0
/
z
~ 300
ao
~
i
200
V
~
.;f-l00
...
go
::>
/
-
0.5
o
~,
i'-..
200
1.3
1.1
o
o
1.5
20
VF. FORWARD VOLTAGE (VI
-
600
i
::>
u
w
VCC
~
400
ROC = 27k
U
'"
-
...
~
j
200
BO
60
100
NORMALIZED DELAY PIN SOURCE CURRENT
versus TEMPERATURE
I-
ffi
~
::>
1.00
u
w
u
/7
a:
5@
N
z::;
~~
~~
0.92
"'"
'/
0.96
~~
wZ
0-
ROC=6Bk
~
40
1.04
14 V
--r--------
::>
0
::>
0
FIGURE 10 -
I
I
ROC~15k
r--
r--
ROC. OVER·CURRENT REFERENCE RESISTANCE (kOI
FIGURE 9 - OUTPUT SOURCE CURRENT-LIMIT
versus TEMPERATURE
<
.s
...
............
~
0.9
0.7
'\..
::>
V
o
\
400
::>
.--
~
u
~
55
VCC = 14V_
TA = 25'C
\
600
::>
/
T .r
\
1...
/
/
VCC = 14 V
'5
.9
o
-25
- 55
o
+25
+50
'75
+100
,125
0.88
- 55
o
- 25
+50
+25
+75
+100
+125
TA. AMBIENT TEMPERATURE (OCI
TA. AMBIENTTEMPERATURE ICI
FIGURE 11 - NORMALIZED OVER-CURRENT DELAY
THRESHOLD VOLTAGE versus TEMPERATURE
FIGURE 12 - SUPPLY CURRENT versus SUPPLY VOLTAGE
1B
-Pin6to7
./'
./
,/
.s
20
~
16
::>
u
/
/
~
U B.O
!d
VCC = 14 V
+ 75
T~ =
./
25°C
./
/'
+100
I ....
~7\
12 i-----
:::>
/
- 25
_
.'
~~fl
-I
V
V
Minimum
~Operating
Voltage
4.0 >---1~:
o 7T'"
o
+125
TA. AMBIENT TEMPERATURE (OCI
R~nge
B.O
I
II
!!
rr
Over·
Voltage
Shutdown
Range
16
24
VCC. SUPPLY VOLTAGE IVI
MOTOROLA LINEAR/INTERFACE DEVICES
4-25
I
32
40
•
MC33030
FIGURE 13 - NORMALIZED OVER-VOLTAGE SHUTDOWN
THRESHOLD versus TEMPERATURE
FIGURE 14 - NORMALIZED OVER-VOLTAGE SHUTDOWN
HYSTERESIS versus TEMPERATURE
1.4
w
u;
............
~
ti
I"--...
I"---..
0
'~§
"
z
;;:
~
~~
wo«
"'" ""
8
•
6
+ 25
-25
t'....
1.2
+ 75
+ 50
w'"
~~
is-
+100
'\
+125
""'" ~
1.0
['-.....
1'--..
0.8
~~
~
"
..... 1'-..
....... r-.,
o. 6
15
.........
O. 4
-55
:E
>
-25
TA, AMBIENTTEMPERATURE 1°C}
+25
+ 50
+75
+ffiO
+125
TA, AMBIENT TEMPERAUTRE 1°C}
FIGURE 15 - THERMAL RESISTANCE AND MAXIMUM POWER
DISSIPATION versus P.C.B. COPPER LENGTH
5.0
0
Printed circuit board neatslnl<.example
T~f7.
.1~;}}d.
--- m
K
",RBJA
0
O
0
0
l
I--L--I
t---....
--
V
10or.
--l
-
'j
~
3,O~
<=>
'"
~
I-- tI-- r-
2.0~
PDIMAX} for TA ~ 70°C
10
l-
3.0 mm
Graphs represenl symmelrical layout
~
4.0z
o
i I
1.0
20
30
L, LENGTH OF COPPER Imm}
40
o
'"=>
'"~
J?
50
OPERATING DESCRIPTION
The MC33030 was designed to drive fractional horsepower dc motors and sense actuator position by voltage
feedback. A typical servo application and representative
internal block.diagram are shown in Figure 16. The system operates by setting a voltage on the reference input
of the Window Detector (Pin 1) which appears on (Pin
2). A dc motor then drives a position sensor, usually a
potentiometer driven by a gear box, in a corrective fashion so that a voltage proportional to position is present
at Pin 3. The servo motor will continue to run until the
voltage at Pin 3 falls within the dead zone, which is
centered about the reference voltage.
The Window Detector is composed of two comparators, A and B, each containing hysteresis. The reference input, common to both comparators, is pre-biased
at 1/2 VCC for simple two position servo systems and
can easily be overriden by an external voltage divider.
The feedback voltage present at Pin 3 is connected to
the center of two resistors that are driven by an equal
magnitude current source and sink. This generates an
offset voltage at the input of each comparator which is
centered about Pin 3 that can float virtually from Vce
to ground. The sum of the upper and lower offset voltages is defined as the window detector input dead zone
range.
To increase system flexibility, an on-chip Error Amp
is provided. It can be used to buffer andlor gain-up the
actuator position voltage which has the effect of narrowing the dead zone range. A PNP differential input
stage is provided so that the input common-mode voltage range will include ground. The main design goal of
the error amp output stage was to be able to drive the
window detector input. It typically can source 1.8 mA
and sink 250 pA. Special design considerations must be
made if it is to be used for other applications.
The Power H-Switch provides a direct means for motor drive and braking with a maximum source, sink, and
brake current of 1.0 A continuous. Maximum package
power dissipation limits must be observed. Refer to
Figure 15 for thermal information. For greater drive current requirements, a method for buffering that maintains all the system features is shown in Figure 29.
MOTOROLA LINEAR/INTERFACE DEVICES
4-26
MC33030
FIGURE 16 -
REPRESENTATIVE BLOCK DIAGRAM AND TYPICAL SERVO APPLICATION
Vee
Motor
Gearbox and Linkage
r---------------------------------------
Vec
I
f Non-
:r.lnput
-=- Filter
" Inverting
I
Input-r--4~----------~--------------------------------~~~------~~----_+~----------~,
I
20 k
Inverting
Input
Output
•
20 k
Error Amp
Output Filter.
Feedback
Input
I
I
I
Vee
I
Reference
Input
100 k
_ _ _ _ _ _ _ _ _ -1I __ _
20 k
Qver-
100 k
a
Current
Latch
L--------/o
I
Reference
Input Filter -=Over-Current
Window
Monitor
Detector
Over-Current
16
Delay
rCDLY
Gnd
The Over-Current Monitor is designed to distinguish
between motor start-up or locked rotor conditions that
can occur when the actuator has reached its travel limit.
A fraction of the Power H-Switch source current is internally fed into one of the two inverting inputs of the
current comparator, while the non-inverting input is driven by a programmable current reference. This reference level is controlled by the resistance value selected
for ROC, and must be greater than the required motor
run-current with its mechanical load over temperature;
refer to Figure 8. Ouring an over-current condition, the
comparator will turn off and allow the current source to
charge the delay capacitor, COLy. When COLY charges
to a level of 7.5 V, the set input of the over-current latch
will go high, disabling the drive and brake functions of
the Power H-Switch. The programmable time delay is
determined by the capacitance value-selected for COLy.
tOlY =
VrefCOlY = 7. 5C OLY = 1.36COLY in p.F
IOL Y{source)
5.5 p.A
15
Roe
Over-Current
Reference
This system allows the Power H-Switch to supply motor start-up current for a predetermined amount of time.
If the rotor is locked, the system will time-out and shutdown. This feature eliminates the need for servo endof-travel or limit switches. Care must be taken so as not
to select too large of a capacitance value for COlY. An
over-current condition for an excessively long time-out
period can cause the integrated circuit to overheat and
eventually fail. Again, the maximum package power dissipation limits must be observed. The over-current latch
is reset upon power-up or by readjusting Vpin 2 as to
cause Vpin 3 to enter or pass through the dead zone.
This can be achieved by requesting the motor to reverse
direction.
An Over-Voltage Monitor circuit provides protection
for the integrated circuit and motor by disabling the
Power H-Switch functions if VCC should exceed 18 V.
Resumption of normal operation will commence when
VCC falls below 17.4 V.
MOTOROLA LINEAR/INTERFACE DEVICES
4-27
MC33030
A timing diagram that depicts the operation of the
Drive/Brake Logic section is shown in Figure 17. The
waveforms grouped in [1] show a reference voltage that
was preset, appearing on Pin 2, which corresponds to
the desired actuator position. The true actuator position
is represented by the voltage on Pin 3. The points V 1
through V4 represent the input voltage thresholds of
comparators A and B that cause a change in their respective output state. They are defined as follows:
•
V,
V2
V3
V4
= Comparator B turn-off threshold
= Comparator A turn-on threshold
= Comparator A turn-off threshold
= Comparator B turn-on threshold
V,-V4 = Comparator B input hysteresis voltage
V2-V3 = Comparator A input hysteresis voltage
V7:"V4 = Window detector input dead zone range
1(V2-Vpin2)-(Vpin2-V4l1 = Window detector input
offset voltage
It must be remembered that points V 1 through V4
always try to follow and center about the reference voltage setting if it is within the input common-mode voltage range of Pin 3; Figures 4 and 5. Initially consider
that the feedback input voltage level is somewhere on
the dashed line between V2 and V4 in [1]. This is within
the dead zone range as defined above and the motor
will be off. Now if the reference voltage is raised so that
Vpin 3 is -.!.ess than V4, comparator B will turn-on [3]
enabling Q Drive, causing Drive Output A to Sink and B
to source motor current [8]. The actuator will move in
Direction B until Vpin 3 becomes greater than V,. Comparator B will turn-off, activating the brake enable [4]
and Q Brake [6] causing Drive Output A to go high and
B to go into a-high impedance state. The inertia of the
mechanical system will drive the motor as a generator
creating a positive voltage on Pin 10 with respect to Pin
14. The servo system can be stopped quickly, so as not
to over-shoot through the dead zone range, by braking.
This is accomplished by shorting the motor/generator
terminals together. Brake,current will flow into the diode
at Drive Output B, through the internal VCC rail, and out
the emitter of the sourcing transistor at Drive Output A.
The end of the solid line and beginning of the dashed
for Vpin 3 [1] indicates the possible resting position of
the actuator after braking.
If Vpin 3 should continue to rise and become greater
than V2, the actuator will have over shot the dead zone
range and cause the motor to run in Direction A until
Vpin 3 is equal to V3. The Drive/Brake beha~ior for
Direction A is identical to that of B. Overshooting the
dead zone range in both directions can cause the servo
system to continuously hunt or oscillate. Notice that the
last motor run-direction is stored in the direction latch.
This information is needed to determine whether Q or
Q Brake is to be enabled when Vpin 3 enters the dead
zone range. The dashed lines in [8,9] indicate the resulting waveforms of an over-current condition that has
exceeded the programmed time delay. Notice that both
Drive Outputs go into a high impedance state until
Vpin 2 is readjusted so that Vpin 3 enters or crosses
through the dead zone [7.4].
The inputs of the Error Amp and Window Detector
can be susceptible to the noise created by the brushes
of the dc motor and cause the servo to hunt. Therefore,
each of these inputs are provided with an internal series
resistor and are pinned out for an external bypass capacitor. It has been found that placing a capacitor with
short leads directly across the brushes will significantly
reduce noise problems. Good quality RF bypass capacitors in the range of 0.001 to 0.1 /LF may be required.
Many of the more economical motors will generate significant levels of RF energy over a spectrum that extends
from dc to beyond 200 MHz. The capacitance value and
method of noise filtering must be determined on a system by system basis.
Thus far, the operating description has been limited
to servo systems in which the motor mechanically
drives a potentiometer for position sensing. Figures 18,
19, 26, and 30 show examples that use light, magnetic
flux, temperature, and pressure as a means to drive the
feedback element. Figures 20, 21 and 22 are examples
of two position, open-loop servo systems. In these systems, the motor runs the actuator to each end of its
travel limit where the Over-Current Monitor detects a
locked rotor condition and shuts down the drive. Figures
31 and 32 show two possible methbds of using the
MC33030 as a switching motor controller. In each example a fixed reference voltage is applied to Pin 2. This
causes Vpin 3 to be less than V4 and Drive Output A,
Pin 14, to be in a low state saturating the TIP42 transistor. In Figure 31, the motor drives a tachometer that
generates an ac voltage proportional to RPM. This voltage is rectified, filtered, divided down by the speed set
potentiometer, and applied to Pin 8. The motor will accelerate until Vpin 3 is equal to V, at which time Pin 14
will go to a high state and terminate the motor drive.
The motor will now coast until Vpin 3 is less than V4
where upon drive is then reapplied. The system operation of Figure 32 identical to that of31 except the signal
at Pin 3 is an amplified average of the motors drive and
back EMF voltages. Both systems exhibit excellent control of RPM with variations of Vec; however, Figure 31
has somewhat better torque characteristics at low RPM.
MOTOROLA LINEAR/INTERFACE DEVICES
4-28
MC33030
FIGURE 17 - TIMING DIAGRAM
Comparator A
Non Inverting Input
Threshold
,-
Reference Input Voltage
(Desired Actuator........
Positionl
Comparator B
In~e~~~~~~~~ut
WINDOW
DETECTOR
I ~ ~/
---..,'-Vl
/1
,-
I
/,,"
[ll
1
<
, ,
I
i
Feedback Input
(True Actuator Position)--"
Comparator A
Output
--+_____
___
Comparator B
Output
Brake Enable
Direction Latch
Q Output
.~!
---iI
[2[
~
I
I
[3l
-rr-I ----11-r}[5[
I
I
[4[
I
Direction Latch
o Output
DRIVE BRAKE
LOGIC
o Brake
o Brake
Over-Current
Latch Aeset Input
Source
Drive Output
A
High Z
Sink
POWER
H-SWITCH
Source
Drive Output
B
High Z
Sink
OVER-CURRENT {
MONITOR
CDLY
L
I
--...;..-_;--1 ~
~II
~I
L~
J
I
L=i--L
I
I
I
t------tr -------\
I/~~75V
\
[7l
[S[
[9l
----~------~~
Direction B
Feedback Input
Dead Zone
Feedback Input
less than V,
between V, & V2
Direction A
Feedback Input
greater than V2
Direction 8
Dead Zone
Feedback Input
Feedback Input
less than V4
between V3 & V4
MOTOROLA LINEAR/INTERFACE DEVICES
4-29
•
MC33030
FIGURE 18 -
FIGURE 19 -
SOLAR TRACKING SERVO SYSTEM
MAGNETIC SENSING SERVO SYSTEM
R1, R2 -
Vcc
R3 -
Cadium Sulphide Photocell
5M Dark, 3.0 k light resistance
30 k, repositions servo during
..--Jom.---oVcc
Linear
Hall
Effect
Sensor
..
B/
IL _____-=_
Typical sensitivity with gain set at 3.9 k
is 1.5 mY/gauss. Servo motor controls magnetic
field about sensor.
FIGURE 20 -
INFRARED LATCHED MO POSITION
SERVO SYSTEM
FIGURE 21 -
DIGITAL MO POSITION SERVO SYSTEM
Vcc
~
Input
MRD3056
Latch
Drive A
6IL
MPS
A20
-=1
1-
o-
Drive B
Activates Drive A
Activates Drive B
Over~Current
_I~
monitor (not shown) shuts down
servo when end stop is reached.
Over-current monitor (not shown) shuts down
servo when end stop is reached.
FIGURE 22 - 0.25 Hz SQUARE-WAVE
SERVO AGITATOR
FIGURE 23 -
SECOND ORDER LOW-PASS ACTIVE FILTER
Vcc
R
100 k
100 k
-=
100 k
130 k
22j R
6
fUll
21l'
f ~ 0.72
RC
R .. 20 k
@
VC2
Q=-2
MOTOROLA LINEAR/INTERFACE DEVICES
4-30
: R = 1.0M
Cl = 1000 pF
C2
= 100 pF
MC33030
FIGURE 24 -
f
FIGURE 25 -
NOTCH FILTER
__
1_
notch - 27rRC
For 60 Hz
FIGURE 26 -
V'
R
~
53.6 k, C
~
DIFFERENTIAL INPUT AMPLIFIER
_V(R3+R4)~_(~
)
A R1 +R2 R3
R3 VB
pln6 -
0.05
FIGURE 27 -
TEMPERATURE SENSING SERVO SYSTEM
VCC
BRIDGE AMPLIFIER
VRef
Cabin
Temperature
Sensor
T
R2
Vpin 6
~
VCC(~ + 1)
(R1)
R2
+ 1
-=
VCCI
seJ]
I
Temperature~
____
VA -V B -V
Ref (~)
4R+2<1.R
_
R1
In this application the servo motor drives the
heat/air conditioner modulator door in a duct system.
FIGURE 28 -
~
REMOTE LATCHED SHUTDOWN
~
R3, R2
Vpin6 ~
FIGURE 29 -
R4, R1 »R
R4
R3 (VA-VBI
POWER H-SWITCH BUFFER
RE = VF!D11 + VF!D2) - VBE(ON)
IMOTOR-IDRV(maxl
.-----*-__-,
01
From Drive {
Outputs
A direction change signal is required at Pins
470
Bo-~------------------~
2 or 3 to reset the over-current latch.
This circuit maintains the brake and over~current
features of the MC33030. Set ROC to 15 k for
IDRV(max) = 0.5 A.
MOTOROLA LINEAR/INTERFACE DEVICES
4-31
•
MC33030
FIGURE 30 - ADJUSTABLE PRESSURE DIFFERENTIAL REGULATOR
Vee = 12 V
6.2 k
~i~~sure
1.76 k
LM324 Quad
OpAmp
2.0 k
B.06k
Offset
Adjust
•
20 k
Gain
1.0 k
4.12 k
2.4 k
s+
2.0 V for Zero
1.0 k
Pressure
Differential
6.0 V for 100 kPa
(14.5 PSI)
Pressure
Differential
Vee
=
12V
3
12 V
Pressure
Differential
Reference
Set
5.1 k
+
5.0 k ~--<>-+--+--""~
O.C.
1.B k
0.01 2
'---------IQ
4,5,12,13
16
0.01
MOTOROLA LINEAR/INTERFACE DEVICES
4-32
15
15 k
MC33030
FIGURE 31 -
SWITCHING MOTOR CONTROLLER WITH BUFFERED OUTPUT
AND TACH FEEDBACK
Vee'" 12 V
100
1
II
I MZ2361
J
12V
Over
Current
Reset
r
4.7k
lN753
FIGURE 32 -
SWITCHING MOTOR CONTROLLER WITH BUFFERED OUTPUT
AND BACK EMF SENSING
Vee
100~
100
Speed
Set
1.0
Over
Current
F
lN153
MOTOROLA LINEAR/INTERFACE DEVICES
4-33
=
12 V
®
MC33034
MOTOROLA
Advance Information
BRUSHLESS DC
MOTOR CONTROLLER
BRUSHLESS DC MOTOR CONTROLLER
The MC33034 Series is a high performance monolithic brushless motor controller containing all of the active functions required
to implement a full featured open-loop three or four phase motor
control system. These devices consist of a rotor position decoder
for proper commutation sequencing, temperature compensated
reference capable of supplying sensor power, frequency programmable sawtooth oscillator, fully accessible error amplifier,
pulse width modulator comparator, three open collector top drivers, and three high current totem pole bottom drivers ideally
suited for driving power MOSFETs.
Also included are protective features consisting of undervoltage
lockout, cycle-by-cycle current limiting with a selectable time
delayed latched shutdown mode, internal thermal shutdown, and
a unique fault output that can be interfaced into microprocessor
controlled systems.
Typical motor control functions include open-loop speed, forward or reverse direction, run enable, and dynamic braking.
The MC33034P60 and MC33034P120 are designed to operate
with an electrical sensor phaSing of 60"/300" and 120"/240"
respectively.
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
P SUFFIX
PLASTIC PACKAGE
CASE 724-03
• 10 V to 40 V Operation
• Undervoltage Lockout
• 6.25 V Reference Capable of Supplying Sensor Power
PIN CONNECTIONS
• Fully Accessible Error Amplifier for Servo Applications
• High Current Totem Pole Bottom Drivers
Top
Drive
• Cycle-By-Cycle Current Limiting
Outputs
8T
• Internal Thermal Shutdown
-,,
I
I--''--''''-:!.
POS
"'.
DEC
A£V~
'"
I
ENABLE
ff"
ft,
,~"
..
l"
• Q
EA
[
Dr
2~
i
~
f'-"R
-r
t~
: ,
+j
rS
.-r
V
" r----,
r osc
~
I
t'"
.ss.
~I
rP'
I~ .1'D--
i
i"<~:
'. II'~
o
~~
UVLO~
r
h.~
.!.1'-·
FAULT
,--
ILIM10
P.
i
'"'"
~:J
h=Jl
,''
'
,
L ________
I
I
'
,
,J,
MOTOR
III
Sensor {
Inputs
:A 4
B 5
Sc 6
Output Enable 7
Reference
Output
Current
Sense Input
Oscillator 10
Error Amp Non-
Inverting Input
..
>:J
f.>-
13 Error Amp Out!
PWM Input
(Top Viewl
>-
:J
0
ro-
r--
11
Error Amp
12
Inverting Input
ORDERING INFORMATION
Sensor
'--T
1t
Package
Electrical
Phasing
Device
MC33034P60
60"/300"
Plastic DIP
MC33034P120
120°/240°
Plastic DIP
BRAKE
Ambient Temperature Range
= .- 40"C to + 85°C
~
ThiS document contains Information on a new product. Specifications and information herem are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
4·34
MC33034
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
40
V
Power Supply Voltage
-
Digital Inputs (Pins 3, 4, 5, 6, 7, 23)
Vrel
V
10SC
30
rnA
Error Amp Input Voltage Range (Pins II, 12, Note 1)
VIR
-0.3 to 40
V
Error Amp Output Current, Source or Sink (Note 2)
lOut
10
rnA
V
Oscillator Input Current (Source or Sink)
VS ense
5.0
VCE(Fault)
20
V
ISink(Fault)
20
rnA
Top Drive Voltage (Pins I, 2, 24)
VCE(top)
45
V
Top Drive Sink Current (Pins I, 2, 24)
ISink(top)
50
rnA
Current Sense Ir.put Voltage
Fault Output Voltage
~ault
f
Output Sink Current
Vc
40
V
Bottom Drive Output Current, Source or Sink (Pins 19, 20, 21)
IDRV
100
rnA
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation (II TA = 85"C
Thermal Resistance Junction to Air
PD
ROJA
867
75
mW
"CIW
Bottom Drive Supply Voltage (Pin 18)
Operating Junction Temperature
TJ
+ 150
"C
Operating Ambient Temperature Range
TA
-40 to +85
"C
TstQ
-65 to +150
"C
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (VCC and Vc ~ 20 V, RT ~ 4.7 k, CT
I
Characteristic
=
II
10 nF, TA ~ 25"C unless otherwise noted)
Symbol
I
Min
\
Typ
\
Max
1
Unit
REFERENCE SECTION
Reference Output Voltage (lRef
TA ~ 25"C
TA ~ -40"Cto +85"C
~
1.0 rnA)
V
Vref
5.9
5.82
Line Regulation (VCC
~
10 V to 40 V, Iref
Load Regulation (lref
=
1.0 rnA to 20 rnA)
=
1.0 rnA)
Regline
Regload
-
6.25
-
6.5
6.57
12
30
mV
5.0
30
mV
rnA
Output Short-Circuit Current (Note 3)
ISC
40
60
-
Reference Under Voltage Lockout Threshold
Vth
4.0
4.5
5.0
V
ERROR AMPLIFIER
Input Offset Voltage (TA
~
- 40"C to + 85"C)
Via
-
2.0
10
mV
Input Offset Current (TA
=
-40 to +85"C)
110
-
10
500
nA
Input Bias Current (TA = -40"C to +85"C)
lIB
-
-25
-1000
nA
Input Common-Mode Voltage Range
Open-Loop Voltage Gain (Va
~
(0 V to VCC -2.0 V)
VICR
3.0 V, RL
~
15 k)
AVOL
V
75
95
-
dB
Input Common-Mode Rejection Ratio
CMRR
55
80
-
dB
Power Supply Rejection Ratio (VCC and Vc = 10 V to 40 V)
PSRR
65
95
-
dB
Output Voltage Swing
High State (RL ~ 15 k to Gnd)
Low State (RL = 15 k to Vref)
VOH
VOL
4.6
5.4
0.7
1.0
-
-
V
Notes:
1. The input common mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper functional limit
of the common mode voltage range is typically Vee - 2.0 V, but either or both inputs can go to 40 V, independent of Vee without device
destruction.
2. The compliance voltage must not exceed the range of -0.3 V to Vref.
3. Maximum package power dissipation limits must be observed.
MOTOROLA LINEAR/INTERFACE DEVICES
4-35
•
MC33034
ELECTRICAL CHARACTERISTICS (VCC and Vc
~ 20 V, RT ~ 4.7 k, CT ~ 10 nF, TA ~ 25°C unless otherwise noted)
I
Characteristic
Symbol
I
Min
I
Typ
I
Max
I
Unit
OSCILLATOR SECTION
Oscillator Frequency
fOSC
21
23.5
26
kHz
.l.fOSC/.l.V
-
0.1
5.0
%
Sawtooth Peak Voltage
VOSC(P)
-
4.0
4.2
V
Sawtooth Valley Voltage
VOSC(V)
1.2
1.5
-
V
Input Threshold Voltage (Pins 3, 4, 5, 6, 7, 23)
High State
Low State
VIH
VIL
2.0
1.4
1.4
0.8
Sensor Inputs (Pins 4, 5, 6)
High State Input Current (VIH ~ 5.0 V)
Low State Input Current (VIL ~ 0 V)
IIH
IlL
-250
-900
-150
-600
-40
-300
Forward/Reverse and Brake Inputs (Pins 3, 23)
High State Input Current (VIH ~ 5.0 V)
Low State Input Current (VIL ~ 0 V)
IIH
IlL
-150
-600
-88
-325
-25
-150
Output Enable
H'igh State Input Current (VIH ~ 5.0 V)
Low State Input Current (VIL ~ 0 V)
IIH
IlL
-70
-80
-40
-40
-10
-20
~
Frequency Change with Voltage (VCC
10 V to 40 V)
LOGIC INPUTS
V
-
p.A
p.A
p.A
CURRENT-LIMIT COMPARATOR
Threshold Voltage
Input Bias Current (Vin
~
0 V to 5.0 V)
OUTPUTS AND POWER SECTIONS
~
Top Drive Output Sink Saturation (lsink
Top Drive Output Off-State Leakage (VCE
~
Top Drive Output Switching Time (CL
Rise Time
Fall Time
25 rnA)
~
47 pF, RL
-
0.95
1.5
V
IDRV(leak)
2.0
100
p.A
tr
tf
-
100
35
300
300
VOH
VOL
(VC-3.0)
(VC-2.4)
1.5
2.0
tr
tf
-
75
65
200
200
VCE(sat)
-
225
500
mV
IFLT(leak)
-
1.0
100
p.A
8.2
0.1
9.1
0.2
10
0.3
VCE(sat)
40 V)
~
1.0 k)
ns
V
Bottom Drive Output Voltage
High State (lsource ~ 50 rnA)
Low State (lsink ~ 50 rnA)
Bottom Drive Output Switching Time (CL
Rise Time
Fall Time
Fault Output Sink Saturation (Isink
~
Fault Output Off-State Leakage (VCE
~
1000 pF)
ns
16 rnA)
~
-
-
20 V)
Under Voltage Lockout
Drive Outputs Enabled (VCC or Vc Increasing)
Hysteresis
V
Vth(on)
VH
rnA
Power Supply Current
VCC and Vc ~ 20 V
VCC Current (Pin 17)
Vc Current (Pin 18)
ICC
IC
-
MOTOROLA LINEAR/INTERFACE DEVICES
4-36
16
3.0
22
7.0
MC33034
FIGURE 1 -
AGURE 2 -
OSCILLATOR FREQUENCY versus
TIMING RESISTOR
OSCILLATOR FREQUENCY CHANGE
versus TEMPERATURE
4. 0
100
~
lw
20 V
20 V
25°C
Vee
Ve
TA
'"
2:
""15
"
2. 0
1:.;
15
::>
fil
Vee
20V_
Ve ~ 20 V
RT~4.7k _
eT ~ 10 nF
~
'-.....,
e:
0
~
'"
100 nF
CT
CT
J
1. 0
1.0K
FIGURE 3 -
I'-..
~
~ -2.0
~
I
~
Vcc ~ 20 V
Ve ~ 20 V
Va ~ 3.0 V
RL ~ 15 k
CL ~ 100 pF
TA ~ 25'e
~n
Pha~e
-55
1.0M
r\
~
-2 0
10K
lOOK
f, FREQUENCY IHzl
1.0M
o
25
50
75
TA, AMBIENT TEMPERATURE lOCI
-25
FIGURE 4 -
100
125
Vref/
iJi
45 ~
~
e
w
~ -0.8
r--
':;
§2
-
Vee ~ 20 V
Ve = 20 V
sourie Saturaiion_ _ TA ~125oe
ILoad to Groundl
r-- --..j
~ -1.6
~
~
'"
'"w
135 4 ~
is
I
-
I
1.6
~
180
10M
FIGURE 5 - ERROR AMP SMALL-SIGNAL
TRANSIENT RESPONSE
0.8
Sink Saturation-
L.
o
o
ILoaf to Vrefll _
Gnd"
1.0
2.0
3.0
10, OUTPUT LOAD CURRENT ImAI
FIGURE 6 - ERROR AMP LARGE-SIGNAL
TRANSIENT RESPONSE
5p.S/DIV
MOTOROLA LINEAR/INTERFACE DEVICES
4-37
L-.......
I
I
~
1\
.....
ERROR AMP OUTPUT SATURATION
versus LOAD CURRENT
~
90 '"
~
""I-
.......
>-
u
~
..,
i
FIGURE 9 -
2. 0
I
'§ 1. 0
r---
20
10
30
Iref' REFERENCE OUTPUT SOURCE CURRENT (mAl
3. 0
i:E
z
~ -32r- Vcc ~ 20 V
--
I
I
:::J
o
\
-24
Vc ~ 20 V
r-TA ~ 25'C
I
-4a
I '
I
5. 0
>
>~ 4. 0
\
w
u
~
6. 0
<.:l
..........
w
o
FIGURE 8 - REFERENCE OUTPUT VOLTAGE
versus SUPPLY VOLTAGE
I
I
I
RL ~ x
_
TA ~I 25'C_
>
aJ
o
40
REFERENCE OUTPUT VOLTAGE
versus TEMPERATURE
10
20
30
Vcc, SUPPLY VOLTAGE (VI
40
FIGURE 10 - OUTPUT DUTY CYCLE versus
PWM INPUT VOLTAGE
100
r-VC~ ~ 20lV
Vc ~ 20 V
80 r-RT ~ 4.7k
r-CT ~ 10 nF
~
TA ~ 25'C
u
G 60
>>-
a
./
V
/" - -
~
~
V
a
~
--
:::J
<=>
>- 40
/
'"
>:::J
VCC ~ 20VVc ~ 20V _
RL ~ x
+25
+50
+75
TA, AMBIENT TEMPERATURE ('CI
+100
20
Vc
RL
CL
TA
~
~ 1. 0
V)
z
~
~
~
1.0 nF
25'C
~ o. B \
5;
-".
~
>:::J
~
~ O. 2
3'
a
1.0
/
5o 0.1a
.....
2.0
3.0
5.0
7.0
./'"
/
:::J
o. 6 \.
::;; o. 4
,,/'
z
~ 0.20
o
~
~
5.0
r- VCC ~ 20 V
Vc ~ 20 V
r-TA ~ 25'C
20 V
~ x
~
4.0
030
VC~ ~120V
11.2
2.0
3.0
PWM INPUT VOLTAGE (VI
1.0
FIGURE 12 - FAULT OUTPUT SATURATION
versus SINK CURRENT
FIGURE 11 - BOnOM DRIVE RESPONSE TIME versus
CURRENT SENSE INPUT VOLTAGE
1.4
/
/
a
+125
J
V
/
0
o
o
-25
/
1/
/
,/"
,/
./
0/
10
4.0
CURRENT SENSE INPUT VOLTAGE (NORMALIZED TO Vthl
8.0
Isink' SINK CURRENT (mAl
MOTOROLA LINEAR/INTERFACE DEVICES
4-38
12
16
MC33034
FIGURE 13 -
TOP DRIVE OUTPUT SATURATION
versus SINK CURRENT
FIGURE 14 -
TOP DRIVE OUTPUT WAVEFORM
1. 2
-
-
!----
8
,.-
-~
~
I--
4
Vee ~ 20'V_
Ve ~ 20 V
TA ~ 25'C -
0
10
FIGURE 15 -
20
Isink' SINK CURRENT (mAl
40
30
FIGURE 16 -
BOTTOM DRIVE OUTPUT WAVEFORM
BOTTOM DRIVE OUTPUT WAVEFORM
100 nsJDIV
100 nsJDiV
FIGURE 17 -
VCC ~ 20 V_
Vc ~ 20 V
TA ~ 25'C -
I
-1.0
~
§; -2.0
z
r--
o
~
-3. 0
~
2. 0
~
5o
ji
1.0
o
o
Source Saturation
!--
(Load to Groundl
-
~
I
I
I
)
--+--"'"
5.0
0
11 6
~
I---
-
Sink Saturation I - (Load to Vcl
I-Gnd,
I
20
40
60
80
10, OUTPUT LOAD CURRENT (mAl
I
/
'51
2
u
~
~ 8.0
""~
~ 4.0
SJ
ICC
r
>-
I
I
FIGURE 18 - POWER AND BOTTOM DRIVE SUPPLY
CURRENT versus SUPPLY VOLTAGE
BOTTOM DRIVE OUTPUT SATURATION
versus LOAD CURRENT
vc/I
~
II
100 nslDlV
17
/I
o111
o
--
4
10
3
2
;;..0-
RT ~ 4.7 k
CT ~ 10 nF
._
Pins 3-7, 9, 23 ~ Gnd 1
TA ~ 25'C
-
I
20
SUPPLY VOLTAGE (VI
MOTOROLA LINEAR/INTERFACE DEVICES
4-39
-
It;..- I--- f---
30
I
0
40
•
MC33034
PIN FUNCTION DESCRIPTION
Pin No.
Function
Description
1,2,24
BT,AT,CT
These three open collector Top Drive Outputs are designed to drive the
external upper power switch transistors.
3
FWD/REV
The Forward/Reverse input is used to change the direction of motor
rotation.
4, 5, 6
SA, SB, Sc
These three Sensor Inputs control the commutation sequence.
7
Output Enable
A logic high at this input causes the motor to run, while a low causes it
to coast.
8
Reference Output
This output provides charging current for the oscillator timing capacitor
CT and a reference for the error amplifier. It can also furnish sensor
power.
9
Current Sense Input
A 100 mV signal at this input terminates output switch conduction during a given oscillator cycle.
10
Oscillator
The Oscillator frequency is programmed by the values selected for timing components RT and CT.
11
Error Amp Non-Inverting
Input
This input is normally connected to the speed set potentiometer.
12
Error Amp Inverting Input
This input is normally connected to the Error Amp Output in open-loop
applications.
13
Error Amp OutputlPWM
Input·
This pin is available for compensation in closed-loop applications.
14
Fault Output
This open collector output is active low during one or more of the following conditions: Invalid Sensor Input code, Enable Input at logic 0,
Current Sense Input> 100 mY, Undervoltage Lockout activation, and
Thermal Shutdown.
15
Ground
This pin is the control circuitry ground return and is connected back to
the source ground.
16
Drive Ground
This pin is a separate power ground return that is connected back to
the power source. It reduces the effects of switching transient noise on
the control circuitry.
17
VCC
This pin is the positive supply of the control IC. The controller is functional over a minimum VCC range of 10 V to 40 V.
18
Vc
The high state (VOH) of the Bottom Drive Outputs are set by the voltage applied to this pin. The controller is operational over a minimum
Vc range of 10 V to 40 V.
19,20,21
CB, BB,AB
These three totem pole Bottom Drive Outputs are designed for direct
drive of the external bottom power switch transistors.
22
N.C.
No connection. This pin is not internally connected.
23
Brake Input
A logic low at this input causes the motor to run, while a high causes
rapid deceleration.
MOTOROLA LINEAR/INTERFACE DEVICES
4-40
MC33034
INTRODUCTION
(for example 100), the enabled top and bottom drive
outputs with the same alpha designation are exchanged
(AT to AB, CB to CT). In effect the commutation
sequence is reversed.
Motor on/off control is accomplished by the output
enable (Pin 7). When left disconnected, an internal
40/1-A current source enables sequencing of the top
an.d bottom drive outputs. When grounded, the top
drille outputs turn off and the bottom drives are forced
low, causing the motor to coast and activating the
fault output.
Dynamic motor braking allows an additional margin
?f safety to be designed into the final product. Braking
IS accomplished by placing the brake input (Pin 23) in
a high state. This causes the top drille outputs to turn
off and the bottom drives to turn on, shorting the motorgenerated back EMF. The brake input has unconditional
priority over all other inputs. The internal 20 kfl pull-up
resistor simplifies interfacing with the system safetyswitch by ensuring brake activation if opened or disconnected. The commutation truth table is shown in
Figure 20. A four input AND gate is used to monitor the
brake input and the three top drive outputs. Its purpose
is to disable braking until the top drive outputs attain a
high state. This helps to avoid simultaneous conduction
of the top and bottom power switches. In half wave
motor drive applications, the top drive outputs are not
required and are typically left disconnected. Under
these conditions braking will be disabled by the AND
gate. If required, it can be enabled by connecting a single pull-up resistor from VCC to the three open collector
outputs. Figure 38 shows a pull-up method utilizing the
enable input current source.
The Motorola MC33034 is a high performance monolithic brushless motor controller containing all of the
active functions required to implement a full featured,
open-loop, three or four phase motor control system.
These integrated circuits are constructed with Bipolar
Anaiog technology which offers a high degree of performance and ruggedness in hostile industrial environments. The MC33034 consists of a rotor position
decoder for proper commutation sequencing, temperature compensated reference capable of supplying sensor power, frequency programmable sawtooth oscillator, fully accessible error amplifier, pulse width
modulator comparator, three open collector top drivers,
and three high current totem pole bottom drivers ideally
suited for driving power MOSFETs.
Also included are protective features consisting of
undervoltage lockout, cycle by cycle current limiting
with a selectable time delayed latched shutdown mode
internal thermal shutdown, and a unique fault output
that can be interfaced into microprocessor controlled
systems.
Typical motor control functions include open-loop
speed control, forward or reverse direction, run enable,
and dynamic braking.
FUNCTIONAL DESCRIPTION
A representative internal block diagram and a typical
system application are shown in Figures 19 and 36. A
discussion of the features and function of each of the
internal blocks is given below.
Rotor Position Decoder
An internal rotor position decoder monitors the three
sensor inputs (Pins 4, 5, 6) to provide the proper
sequencing of the top and bottom drive outputs. The
sensor inputs are designed to interface directly with
open collector type Hall effect switches or opto slotted
couplers. Internal pull-up resistors are included to minimize the required number of external components. The
inputs are TTL compatible, with the thresholds typically
at 1.4 volts. The MC33034 Series consists of two device
types, each is designed to control three phase motors
and operate with two of the four most common conventions of sensor phasing. The MC33034P60 is
intended to operate with an electrical sensor phasing
of 60" or 300" and the MC33034P120 with 120" or 240".
With three sensor inputs there are eight possible input
code combinations, six of these are valid rotor positions. The remaining two codes are invalid and are usually caused by an open or shorted sensor line. When
an invalid input condition exists, the fault output is activated and the drive outputs are disabled. With six valid
input codes, the decoder can resolve the rotor positian
to within a window of 60 electrical degrees.
Error Amplifier
A high performance, fully compensated error amplifier with access to both inputs and output (Pins 11, 12,
13) is provided to facilitate the implementation of
closed-loop motor speed control. The amplifier features
a typical DC voltage gain of 95 dB, 800 kHz gain
bandwidth, and a wide input common mode voltage
range that extends from ground to VCC - 2.0 V. In most
open-loop speed control applications, the amplifier is
configured as a unity gain voltage follower with the noninverting input connected to the speed set voltage
source. Additional configurations are shown in Figures
31 through 35.
Oscillator
The frequency of the internal ramp oscillator is programmed by the values selected for timing components
RT and Cr- Capacitor CT is charged from the reference
output (Pin 8) through resistor RT and discharged by
an internal transistor. The ramp peak and valley voltages are typically 4.0 V and 1.5 V respectively. To provide a good compromise between audible noise and
output switching efficiency, an oscillator frequency in
the range of 20 kHz to 30 kHz is recommended. Refer
to Figure 1 for component selection.
The forward/reverse input (Pin 3) is used to change
the direction of motor rotation by reversing the voltage
across the stator winding. When this input changes
state, from high to low with a given sensor input code
MOTOROLA LINEAR/INTERFACE DEVICES
4-41
II
MC33034
FIGURE 19 -
REPRESENTATIVE BLOCK DIAGRAM
V,N
{'
10K
3
'OK
S.
Sensor
Inpuls
"K
5
I
Sa 6
Sc
Forward
Reverse
TOP
DrIve
Outputs
V'N
•
Bottom
Drive
Outputs
23
FIGURE 20 -
THREE PHASE, SIX STEP COMMUTATION TRUTH TABLE
Inputs (Note 1)
Outputs INote 2)
Sensor Electrical
1
1
1
0
0
0
0
1
1
1
0
0
MC33034P120
1200
SA
SB
Sc
0
0
1
0
1
1
1
1
0
0
0
1
1
1
0
1
0
0
1
Sense
AT
BT
CT
AB
BB
CB
Fault
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
1
1
0
0
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
Enable Brake
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
0
0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
1
1
0
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
X
X
X
X
0
0
X
X
1
1
X
V
X
X
X
V
X
X
X
V
X
X
X
V
X
X
X
V
X
X
X
V
X
X
X
X
X
X
0
1
X
X
0
1
1
X
0
1
1
1
1
1
1
1
1
Drives
Current
FIR
1
.1
1
1
1
Bottom
Top
Drives
Phasing
MC33034P60
600
SB
SA
Sc
Sink Only
Pasllive
True LogiC
Brake Input
0
1
1
1
1
1
1
0
0
1
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
0
1
1
0
1
0
0
0
0
1
0
0
0
0
0
1
1
0
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
0
0
1
1
0
1
1
0
0
1
0
0
1
0
1
1
1
1
1
1
Notes:
1. The digital inputs (Pins 3, 4.5,6,7.23) are all TTL compatible. The current sense input (Pin 9) has a laO mV threshold.
A logic 0 for this input is defined as < 80 mV. and a logic 1 is > 120 mV.
2. The fault and top drive outputs are open collectors and are active in the low (0) state.
3. V '" anyone of the six valid sensor combinations.
X =:= Don't care.
MOTOROLA LINEAR/INTERFACE DEVICES
4-42
condition. The dual-latch PWM configuration ensures
that only a single output conduction pulse will occur
during any given oscillator cycle, whether terminated
by the output of the error amp or current limit
comparator.
Pulse Width Modulator
The use of pulse width modulation provides an
energy efficient method of controlling the motor speed
by varying the average voltage applied to each stator
winding during the commutation sequence. As CT discharges, the oscillator sets both latches, allowing conduction of the top and bottom drive outputs. The PWM
comparator resets the upper latch, terminating bottom
drive output conduction when the positive-going ramp
on CT become, greater than the error amplifier output.
The pulse width modulator timing diagram is shown in
Figure 21. Pulse width modulation for speed control
appears only at the bottom drive outputs.
Reference
The on chip 6.25 V regulator (Pin 81 provides charging
current for the oscillator timing capacitor, a reference
for the error amplifier, and has a current capability of
40 mA for direct power of the sensors in low voltage
applications. In higher voltage applications it may
become necessary to transfer the power dissipated by
the regulator off the I.C. This is easily accomplished with
the addition of an external pass transistor as shown in
Figure 22. A 6.25 V reference level was chosen to allow
implementation of the simpler NPN circuit, where Vref
- VBE exceeds the minimum voltage required by Hall
effect sensors over temperature. With proper transistor
selection, and adequate heatsinking, up to 1.0 amp of
load current can be obtained.
Current Limit
Continuous operation of a motor that is severely
overloaded results in overheating and eventual failure. This destructive condition can best be prevented
with the use of cycle-by-cycle current limiting. That
is, each on-cycle is treated as a separate problem. This
is implemented by monitoring the stator current buildup each time the output switch conducts, and upon
sensing an over current condition, immediately turns
off the switch and holds it off for the duration of the
oscillator ramp-up period. The stator current is converted to a voltage by inserting a ground-referenced
sense resistor RS (Figure 361 in series with the three
bottom switch transistors (04, 05, 061. This voltage
is monitored by the current sense input (Pin 91, and
compared to an internal 100 mV reference. If
exceeded, the comparator resets the lower latch and
terminates output switch conduction. The value for
the sense resistor is:
RS
FIGURE 22 -
REFERENCE OUTPUT BUFFERS
UVLO
The NPN circuit is recommended for powering Halt
or opto sensors, where the
output voltage temperature
coefficient is not critical.
The PNP circuit is slightly
more complex, but is also
more accurate over temperature. Neither circuit has
current limiting.
0.1
Istator(maxl
The fault output is activated during the over current
FIGURE 21 .
I
CapacItor CT ---.
PULSE WIDTH MODULATOR TIMING DIAGRAM
I
I
~L1V/'1v
pWMlnput~~
I
I
I
Error Amp au"
CUrrent Sense
Input
To Control
Circuitry and
Sensor Power
6.25 V
I
I
/"'1
./"1
I
I
V
V
I
I
I
I
I
I
I
I
~
------------------~
Latch
"Set" Inputs
I
Top Drive
Outputs
----------------~~
Bottom Drive
Outputs
I
lIlf
Fault Output
MOTOROLA LINEAR/INTERFACE DEVICES
4-43
•
MC33034
II
Undervoltage Lockout
A triple Undervoltage Lockout has been incorporated
to prevent damage to the control IC and the external
power switch transistors. Under low power supply conditions, it guarantees that the IC and sensors are fully
functional, and that there is sufficient bottom drive output voltage. The positive power supplies to the IC (VCC)
and the bottom drives (VC) are each monitored by separate comparators that have their thresholds at 8.9 V.
This level ensures sufficient gate drive for low rOS(on)
when interfacing with standard power MOSFETs. When
directly powering the Hall sensors from the reference,
improper sensor operation can result if the output voltage should fall below 4.5 V. A third comparator is used
to detect this condition. If one or more of the comparators detects an undervoltage condition, the fault output
is activated, the top drives are turned off and the bottom
drive outputs are held in a low state. Each of the comparators contain hysteresis to prevent oscillations when
crossing their respective thresholds.
Drive Outputs
The three top drive outputs (Pins 1, 2, 24) are open
collector NPN transistors capable of sinking 50 milliamps with a minimum breakdown of 45 volts. InterfaCing into higher voltage applications is easily accomplished with the circuits shown in Figures 24 and 25.
The three totem pole bottom drive outputs (Pins 19,
20,21) are particularly suited for direct drive of 'N'channel MOSFETs or NPN bipolar transistors (Figures 26, 27
and 28). Each output is capable of sourcing and sinking
up to 100 mAo Power for the bottom drives is supplied
from Vc (Pin 18). This separate supply input allows the
designer added flexibility in tailoring the drive voltage,
independent of VCC. A zener clamp is typically connected to this input when driving power MOSFETs in
systems where VCC is greater than 20 V.
A separate drive ground (Pin 16) is included to reduce
the effects of switching transient noise imposed on the
current sense input. This feature becomes particularly
useful when driving current sensing power MOSFETs
(Figure 29).
Fault Output
The open collector fault output (Pin 14) was
designed to provide diagnostic information in the
event of a system malfunction. It has a sink current
capability of 16 mA and can directly drive a light emitting diode for visual indication. Additionally, it is easily interfaced with TTL/CMOS logic for use in a microprocessor controlled system. The fault output is active
low when one or more of the following conditions
occur:
Thermal Shutdown
Internal thermal shutdown circuitry is provided to
protect the IC in the event that the maximum junction
temperature is exceeded. When activated, typically at
170'C, the I.C. acts as though the enable input was
grounded.
1)
2)
3)
4)
Invalid Sensor Input code.
Enable Input at Logic "0."
Current Sense Input> 100 mY.
Undervoltage Lockout, activation of one or more
of the comparators.
5) Thermal Shutdown, maximum junction temperature has been exceeded.
FIGURE 23 - TIMED DELAYED LATCHED
OVER-CURRENT SHUTDOWN
This unique output can also be used to distinguish
between motor start-up or sustained operation in an
overloaded condition. With the addition of an R/C network between the fault output and the enable input, it
is possible to create a time-delayed latched shutdown
for overcurrent. The added circuitry shown in Figure 23,
makes easy starting of motor systems which have high
inertial loads by providing additional starting torque,
while still preserving overcurrent protection. This task
is accomplished by setting the current limit to a higher
than nominal value for a predetermined time. During
an excessively long overcurrent condition, capacitor
COLY will charge causing the enable input to cross its
threshold to a low state. A latch will now be formed by
a positive feedback loop from the fault output to the
enable input. Once set by the current sense input, it can
only be reset by shorting COLY or cycling the power
supply.
tOLY = ROLY COLY In (
(
ROLY COLY In
MOTOROLA LINEAR/INTERFACE DEVICES
4-44
Vref-(lILenable ROLY)
Vth enable - (IlL enable ROLY)
6.25-140Xl0-6 ROLY))
1.4-(40xl0- 6 ROLY)
)
MC33034
FIGURE 25 - HIGH VOLTAGE INTERFACE WITH
'N' CHANNEL POWER MOSFETs
FIGURE 24 - HIGH VOLTAGE INTERFACE WITH
NPN POWER TRANSISTORS
POS
POS
DEC
DEC
~}'~'( ~H+-rCj---,'tr-<' J2- +---t---' '>'f
4.7 k
24
>---4'-'-,.'""1't1r'
MOC82L04----4'='---1'-"l"oa"'d~
Optocoupler
•
Transistor Q1 is a common base stage used to level shift from
the high motor voltage VM. The collector diode is required if
present while VM is low.
Vee to
Vee is
FIGURE 27 -
FIGURE 26 -
MOSFET DRIVE PRECAUTIONS
CURRENT WAVEFORM SPIKE SUPPRESSION
Series gate resistor Rg will damp any high frequency oscillations caused
by the MOSFET input capacitance and any series wiring inductance in
the gate-source circuit. Diode D is required if the negative current into
the Bottom Drive Outputs exceeds 5.0 mA peak.
The addition afthe RC filter will eliminate current-limit instability caused
by the leading edge spike on the current waveform. Resistor RS should
be a low inductance type.
FIGURE 28 -
BIPOLAR TRANSISTOR DRIVE
FIGURE 29 -
CURRENT SENSING POWER MOSFETs
SENSEFET
Power Ground:
To Input Source
Return and
Drive Ground
Pin 16
,.
_4---~-~~----' VPin 9 =
Control Cin;:uitry Ground:
To Pin 15
The totem-pole output can furnish negative base current for enhanced
transistor turn-off. with the addition of capacitor C.
Rs • Ipk· rOSlon)
rOM(on) + Rs
If: SENSEFET = MTP10N10M
Rs = 200
Then: Vpin 9 "" O.751p k
Virtually lossless current sensing can be achieved with the implementation of SENSEFET power switches.
MOTOROLA LINEAR/INTERFACE DEVICES
4-45
•
MC33034
FIGURE 30 Vee
0=
FIGURE 31 -
HIGH VOLTAGE BOOST SUPPLY
b
DIFFERENTIAL INPUT SPEED CONTROLLER
;;VM+12
12 V
lVMt8.o
~
7 III VM+4.90
20
40
60
Boost Current (rnA)
1.0/200 V
•
~
•
MC1555
lN5352A
VM
1B k
=
VBoo"
+
22
170V
V'
- V (R3+R4)~_(~V )
pm13 - A R1+R2 R3
R3 B
·MUR11S
~O.OOl
This circuit generates Vaoast for Figure 25.
FIGURE 33 -
FIGURE 32 -
DIGITAL SPEED CONTROLLER
CONTROLLED ACCELERATION/DECELERATION
Enable
r~-o+-~--
Inputs
BCD
f
aD 1
Gnd
Resistors R1 with capacitor C sets the acceleration time constant while
R2 controls the deceleration. The values of Rl and R2 should be at least
ten times greater than that of the speed set potentiometer to minimize
time constant variations with different speed settings.
FIGURE 34 -
The SN74LS175 is an open collector BCD to One of Ten decoder. When
connected as shown, input codes 0000 through 1001 steps the PWM in
increments of approximately 10% from 0 to 90% on-time. Input codes
1010 through 1111 will produce 100% on-time or full motor speed.
FIGURE 35 -
CLOSED-LOOP SPEED CONTROL
CLOSED-LOOP TEMPERATURE CONTROL
VB=~
(~+1)
To Sensor
Input (Pin 4)
R3 »
A1
R511 R6
00,1
A5
10 k
A6
This circuit can control the speed of a cooling fan proportional to the
difference between the sensor and set temperatures. The control loop
is closed as the forced air cools the NTC thermistor. For controlled
heating applications, exchange the positions of Rl and R2.
The rotor position sensors can be used as a tachometer. By differentiating the positive-going edges and then integrating them over time,
a voltage proportional to speed can be generated. The error amp compares this voltage to that of the speed set to control the PWM.
MOTOROLA LINEAR/INTERFACE DEVICES
4-46
MC33034
also aid in spike reduction. Care must be taken in the
selection of the bottom power switch transistors so that
the current during braking does not exceed the device
rating. During braking, the peak current generated is
limited only by the series resistance of the conducting
bottom switch and winding.
SYSTEM APPLICATIONS
Three Phase Motor Commutation
The three phase application shown in Figure 36 is a
full-featured open-loop motor controller with full wave,
six step drive. The upper power switch transistors are
Darlingtons while the lower devices are power MOSFETs. Each. of these devices contains an internal parasitic catch diodp. that is used to return the stator inductive energy back to the power supply. The outputs are
capable of driving a delta or wye connected stator, and
a grounded neutral wye if split supplies are used. At
any given rotor position, only one top and one bottom
power switch (of different totem poles) is enabled. This
configuration switches both ends of the stator winding
from supply to ground which causes the current flow
to be bidirectional or full wave. A leading edge spike is
usually present on the current waveform and can cause
a current-limit instability. The spike can be eliminated
by adding an RC filter in series with the current sense
input. Using a low inductance type resistor for RS will
FIGURE 36 -
Ipeak
=
VM + EMF
Rswitch + Rwinding
If the motor is running at maximum speed with no load,
the generated back EMF can be as high as the supply
voltage, and at the onset of braking the peak current
may approach twice the motor stall current. Figure 37
shows the commutation waveforms over two electrical
cycles. The first cycle (0° to 360°) depicts motor operation at full speed while the second cycle (360° to 720°)
shows a reduced speed with about 50 percent pulse
width modulation. The current waveforms reflect a constant torque load and are shown synchronous to the
commutation frequency for clarity.
THREE PHASE, SIX STEP, FULL WAVE MOTOR CONTROLLER
'---<>+--~-------1
POS
'---~+-~~----~DEC
RT
23
MOTOROLA LINEAR/INTERFACE DEVICES
4-47
II
MC33034
FIGURE 37 -
THREE PHASE, SIX STEP, FULL WAVE COMMUTATION WAVEFORMS
Rotor Electrical Position (Degrees)
60
120
180
240
300
360
1
1
1
420
480
540
600
660
720
1
1
1
1
SA
SB
Sensor Inputs
MC33034P60
a
1
~
L!
Sc
1
1
1
Code 11001110 111 011100110001100 110 111 1011 1 001 1 000 1
1
1
II
SA
SB
Sensor Inputs
MC33034P120
Sc
,~
1
1
1
Code 1100111010101011 001 101110011101010 011 0011101 1
Top Drive
Outputs
{
AT
~
BT
II
LJ
II
CT
I_lID
AB
I
Bottom Drive
Outputs
{
BB
I
~1illI.1
CB
..
~~
1
I
Conducting
Power Switch
Transistors
IQ 1'"
I
~IQ2 +Q6102 +04/03 .. Q4 103
I
1
1
I
1
1
+
05101 +05101
I
+
0fila2 +0tiIa2'" Q41 0 3 +041 Q3 +05101 +051
1
1
1
1
1
1
I·
1
1
I
A
Motor
Drive Current
B
1
+ -I
C 0I
I
1...--
I
Full Speed (No PWM)
I
----+-1......--
Reduced Speed (
FWD/REV :: 1
MOTOROLA LINEAR/INTERFACE DEVICES
4-48
50"1. PWM)
~I
MC33034
FIGURE 38 -
THREE PHASE, THREE STEP, HALF WAVE MOTOR CONTROLLER
•
RT
solution is to provide braking until the motor stops and
then turn off the bottom drives. This can be accomplished by using the fault output in conjunction with
the enable input as an over current timer. Components
ROLy and COLyare selected to give the motor sufficient
time to stop before latching the enable input and the
top drive ANO gate low. To enabling the motor, the PNP
transistor along with resistors R1 and R3 are used to
reset the latch by discharging COLY upon brake switch
closure. The stator flyback voltage is clamped by a single zener and three diodes.
Figure 38 shows a three phase, three step, half wave
motor controller. This configuration is ideally suited for
automotive and other low voltage applications since
there is only one power switch voltage drop in series
with a given stator winding. Current flow is unidirectional or half wave because only one end of each winding is switched. Continuous braking with the typical half
wave arrangement presents a motor overheating problem since stator current is limited only by the winding
resistance. This is due to the lack of upper power switch
tr?nsistors, as in the full wave circuit, used to disconnect
the windings from the supply voltage VM. A unique
MOTOROLA LINEAR/INTERFACE DEVICES
4-49
II
MC33034
Sensor Phasing Comparison
There are four conventions used to establish the relative' phasing of the sensor signals in three phase
motors. With six step drive, an input signal change must
occur every 60 electrical degrees, however, the relative
signal phasing is dependent upon the mechanical sensor placement. A comparison ofthe conventions in electrical degrees is shown in Figure 39(a). From the sensor
phasing table, Figure 39(b), note that the order of input
codes for 60° phasing is the reverse of 300°. This means
that a P60 suffix part will operate with either convention
with a resulting change in rotor direction. The same is
true for the P120 part operating between 120° and 240°
conventions. Further examination of the 60° and 120°
columns reveal that either suffix part will operate with
any of the sensor conventions with the addition of an
FIGURE 39(a) -
inverter and the interchanging of 58 and 5C inputs as
shown in Figure 40.
In this data sheet, the rotor position has always been
given in electrical degrees, since the mechanical position is a function of the number of rotating magnetic
poles. The relationship between the electrical and
mechanical position is:
(#Rotor pales)
.
.
Electncal Degrees = Mechanical Degrees
2
An increase in the number of magnetic poles causes
more electrical revolutions for a given mechanical revolution. General purpose three phase motors typically
contain a four pole rotor which yields two electrical
revolutions for one mechanical.
SENSOR PHASING COMPARISON
FIGURE 40 -
Rotor Electric,!' Position (Degrees)
60
120
r
From Sensors
SA
60° or 300 0
J
Electrical
Sa
1
Phasing
From Sensors
1200 or 240 0
Electrical
Phasing
l Sc
'A
1'.
'<
FIGURE 39(b) -
SENSOR PHASING TABLE
Sensor Electrical Phasing (Degrees)
120"
SA
Sa
240"
Sc
SA
Sa
300"
Sc
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
MOTOROLA LINEAR/INTERFACE DEVICES
4-50
SENSOR PHASING CONVERSION
MC33034
transistors Q1 through Q8 are Darlington type, each
with an internal parasitic catch diode, With four step
drive, only two rotor position sensors spaced at 90 electrical degrees are required, The commutation waveforms are shown in Figure 43,
Figure 44 shows a four phase, four step, half wave
motor controller. It has the same features as the circuit
in Figure 38, except for the deletion of braking,
Two and Four Phase Motor Commutation
The MC33034P60 is also capable of providing a four
step output that can be used to drive two or four phase
motors. The truth table in Figure 41 shows that by connecting sensor inputs SB and Sc together, it is possible
to truncate the number of drive output states from six
to four. The output power switches are connected to
BT, CT, BB, and CB. Figure 42 shows a four phase, four
step, full wave motor control application, Power switch
FIGURE 41 -
TWO AND FOUR PHASE, FOUR STEP, COMMUTATION TRUTH TABLE
MC33034P60
Inputs
Sensor Electrical
Spacing = 90'
SA
SB
0
1
1
1
1
0
a
a
a
1
1
1
1
a
a
0
Outputs
Top Drives
Bottom Drives
FIR
BT
CT
BB
CB
1
1
1
1
1
1
1
0
1
1
1
a
1
0
1
1
1
1
a
a
1
1
1
1
0
a
a
0
a
a
a
a
0
a
a
0
0
a
1
0
SB connected to Sc
FIGURE 42 -
FOUR PHASE, FOUR STEP, FULL WAVE MOTOR CONTROLLER
MOTOROLA LINEAR/INTERFACE DEVICES
4-51
•
..
MC33034
FIGURE 43 -
FOUR PHASE. FOUR STEP. FULL WAVE COMMUTATION WAVEFORMS
Rotor Electrical Position (Degrees)
90
Sensor Inputs {
MC33034P60
Bottom Drive
Outputs
360
540
450
630
720
L..!
SB
I
Code
Top Drive
Outputs
270
180
{
{
10
10
01
10
00
11
01
I
I
00
I
BT
CT
~~__~~~~____~~mIm
BS
I
CB
~
I I ______~mmI~______
,
I I
sl
61 Q, +Q71
~
I
Conducting
Power Switch
Transistors
03 +
as
Q4 + 06
Q4+ 0
Q3+ Q
I
I
Q2+Q8
I
+ A
o-
B
0-
+ Motor
Drive Current
+ C 0-
+ D 0I
~
Full Speed (No
PWMj~"""'-
Reduced Speed (
50% PWM)
---..l
FWD,REV = 1
LAYOUT CONSIDERATIONS
returning on separate paths back to the power supply
input filter capacitor VM. Ceramic bypass capacitors
(0.1 /-tFI connected close to the integrated circuit at VCC.
Vc. Vref and the error amp non-inverting input may be
required depending upon circuit layout. This providlls
a low impedance path for filtering any high frequency
noise. All high current loops should be kept as short as
possible using heavy copper runs to minimize radiated
EM!.
Do not attempt to construct any of the brush less
motor control circuits on wire-wrap or plug-in prototype boards. High frequency printed circuit layout techniques are imperative to prevent pulse jitter. This is
usually caused by excessive noise pick-up imposed on
the current sense or error amp inputs. The printed circuit
layout should contain a ground plane with low current
signal and high current drive and output buffer grounds
MOTOROLA LlNEARIiNTERFACE DEVICES
4-52
MC33034
FIGURE 44 -
FOUR PHASE, FOUR STEP, HALF WAVE MOTOR CONTROLLER
P~S
~~~~------~DEC
•
MOTOROLA LlNEARIINTERFACE DEVICES
4-53
..
®
MC33039
MOTOROLA
Advance Information
CLOSED-LOOP
BRUSH LESS MOTOR
ADAPTER
CLOSED-LOOP BRUSHLESS MOTOR ADAPTER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC33039 is a high performance closed-loop speed control
adapter specifically designed for use in brushless dc motor control
systems. Implementation will allow precise speed regulation without the need for a magnetic or optical tachometer. This device
contains three input buffers each with hysteresis for noise immunity, three digital edge detectors, a programmable monostable,
and an internal shunt regulator. Also included is an inverter output
for use in systems that require conversion of sensor phasing.
Although this device is primarily intended for use with the
MC33034 brush less motor controller, it can be used cost effectively in many other closed-loop speed control applications.
• Digital Detection of Each Input Transition for Improved Low
Speed Motor Operation
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
• TTL Compatible Inputs With Hysteresis
• Operation Down to 5.5 V for Direct Powering from MC33034
Reference
• Internal Shunt Regulator Allows Operation from a NonRegulated Voltage Source
• Inverter Output for Easy Conversion Between 60°/300° and
120°/240° Sensor Phasing Conventions
PIN CONNECTIONS
REPRESENTATIVE BLOCK DIAGRAM
Vcc
-.--",
·c
ORDERING INFORMATION
God
Device
MC33039P
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
4-54
I
Temperature
Range
I
I - 40°C to + 85°C I
Package
Plastic DIP
MC33039
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IZ(VCC)
30
mA
IIH
5.0
mA
Output Current (Pin 4, 5). Sink or Source
IDRV
20
mA
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ TA ~ +85'C
Thermal Resistance Junction to Air
Po
R8JA
650
100
mW
'CIW
'c
'c
'c
VCC Zener Current
Logic Input Current (Pins 1,2,3)
Operating Junction Temperature
TJ
+150
Operating Ambient Temperature Range
TA
-40 to +85
Tst9
-65 to +150
Storage Temperature Range
II
ELECTRICAL CHARACTERISTICS (VCC ~ 6.25 V, RT ~ 10 k, CT ~ 22 nF, TA ~ 25'C unless otherwise noted)
I
Characteristic
Symbol
I
Min
I
Typ
I
Max
Unit
LOGIC INPUTS
Input Threshold Voltage
High State
Low State
Hysteresis
Input Current
High State (VIH
t/>A
~
2.4
VIH
VIL
VH
5.0 V)
0.4
-40
~
0 V)
-
IlL
-300
-0.3
-190
V
1.0
0.9
-60
-0.3
IIH
t/>B,t/>C
Low State (VIL
t/>A
t/>B,t/>C
2.1
1.4
0.7
/JoA
-80
-5.0
-380
-5.0
-
MONOSTABLE AND OUTPUT SECTIONS
Output Voltage
High State
lout (lsource ~ 5.0 mAl
t/>A (lsource ~ 2.0 mAl
Low State
fout (lsink ~ 10 mAl
t/>A (lsink ~ 10 mAl
V
VOH
3.60
4.20
3.95
4.75
4.20
0.25
0.25
0.50
0.50
-
VOL
-
-
Capacitor CT Discharge Current
Output Pulse Width (Pin 5)
Idischa
20
35
60
mA
tw
205
225
245
/Jos
VCC
5.5
-
Vz
V
ICC
1.8
3.9
5.0
mA
Vz
7.5
8.25
9.0
V
-
2.0
5.0
n
POWER SUPPLY SECTION
Power Supply Operating Voltage Range (TA
~
- 40'C to + 85'C)
Power Supply Current
Zener Voltage (lZ ~ 10 mAl
Zener Dynamic Impedance (aiZ ~ 10 mA to 20 mA, I '" 1.0 kHz)
IZkal
MOTOROLA LINEAR/INTERFACE DEVICES
4-55
•
MC33039
FIGURE 1 -
TYPICAL THREE PHASE, SIX STEP MOTOR APPUCATION
Rotor Electrical Position (Degrees)
A
600 Sensor
Electrical
Phasing
Input
0
60
I
I
120
I
180
240
300
I
I
I
360
480
I
600
I
720
I I
~
I
I I
8~
~
I
I I
I
e
I
I
~
I I
~
A
1200 Sensor
Electrical
Phasing
Input
I
I
I
~
<1>8
I
I
I I
JiI
ell
I
I I
fill
"A Output
I
I
I
Latch
"Set" Input
I
I
I
I
I
I
I
I I
rv=v=YV=V=V=V=V=V'vVl
I
f out Output
I
I
I
I
I
I
I
I
I
I
Vth ~ 0.67 Vee
I I
r0nt::Jn n n n n::::J
n nUu
n Fb9ft V
out
L-J
(AVGI
L-J L-J L-J L ......
I
I
I
~ Constant Motor Speed
I
I
-I"
I
I
I
I
I I
Increasing Motor----i
Speed
OPERATING DESCRIPTION
application using the MC33034 brush less motor controller. Constant speed operation down to 100 RPM is
possible with economical three phase four pole motors.
The CPA inverter output (Pin 4) is used in systems
where the controller and motor sensor phasing conventions are not compatible. A method of converting
from either convention to the other is shown in Figure 3.
For a more detailed explanation of this subject, refer to
the text above Figure 39 on the MC33034 data sheet.
The output pulse amplitude VOH is constant with temperature and controlled by the supply voltage on VCC
(Pin 8). Operation down to 5.5 V is guaranteed over
temperature. For systems without a regulated power
supply, an internal 8.25 V shunt regulator is provided.
The MC33039 provides an economical method of
implementing closed-loop speed control of brush less dc
motors by eliminating the need for a magnetic or optical
tachometer. Shown in the timing diagram of Figure 1,
the three inputs (Pins 1, 2, 3) monitor the brush less
motor rotor position sensors. Each sensor signal transition is digitally detected, OR'ed at the Latch 'Set' Input,
and causes CT to discharge. A corresponding output
pulse is generated at fout (Pin 5) of a defined amplitude,
and programmable width determined by the values
selected for RT and CT (Pin 6). The average voltage of
the output pulse train increases with motor speed.
When fed through a low pass filter or integrator, a dc
voltage proportional to speed is generated. Figure 2
shows the proper connections for a typical closed loop
MOTOROLA lINEARIiNTERFACE DEVICES
4-56
MC33039
FIGURE 2 - TYPICAL CLOSED·LOOP SPEED CONTROL APPLICATION
II
FIGURE 3 - CONVERSION BETWEEN SENSOR PHASING CONVENTIONS
MC33034P120
From sensors{.A
SOO or:moe
EI.",,;,,I
MC33034P60
From Sensors
120" or 240·
E""";""
••
Phasing
Phasing
{.A 0----,
••
""
",,0-+--..../
MC33039P
MC33039P
MOTOROLA LINEAR/INTERFACE DEVICES
4-57
POS
DEC
MC33039
FIGURE 5 - fout. PULSE WIDTH CHANGE
versus TEMPERATURE
FIGURE 4 - fout PULSE WIDTH versus TIMING RESISTOR
100
1.6
~ Vee
1=
TA
I
I---- Vee
6.25 V
25°C
eT
RT
I--CT
220 nF
~
.J
6.25 V
10 k
22nF
~
~
.""v
V
/
~
V
22 nF
•
V
1
/'
2.2 nF
-1.6
-55
0.0 1
20
RT, TIMING RESISTOR Ik!ll
2.0
200
4.0
w
OJ
V
V
«
. . .,...v
w
~
~
I-
:::>
5
-2.0
o
1
-4.0
V
./
V
./
~
V
p!
12
iil
/'
8 4.0
TA
-
7.5
---
o
o
8.5
I
I
~ -2.0
':;
~
~O
I
r
Vee
TAl
Source Saturation
(Load to Ground)
§?
is
~:::>
~~e .J
-4.0
I
I
0.4
0.2
--
o
o
+-
I
I
6.25V25°C _
I
I
~
- --12
~
w
-
'":z:z
«
~ TA
2.0
~
-
~
-~
125·C
TAl
25°f- f - -
4.0
6.0
vec. SUPPLY VOLTAGE IV)
10
8.0
~
'"U5Z
z
10
~
~
5.0 rnA
IlSink Saturation
-(Load to v e ' V
to:
V>
;;Z
;;; -8.0
V>
l
~
0.4
«
:z:
-16
-55
-- . /
V
/'
z
/' /
.//
z
0
. / l1Source Saturation
ILoad to Ground)
0.2
o
25
50
75
TA. AMBIENT TEMPERATURE 1°C)
'"
:::>
to:
V>
t3
'"
:::>
0
V>
-0.2
/'"
-25
u
!;1
./
MOTOROLA LINEAR/INTERFACE DEVICES
4-58
/
w
OJ
7
f-----~ce ~ 6.25 V
:::>
16
J
.1
8.0
0
.6
/0
16
u
Gld ' \
4.0
8.0
10, OUTPUT LOAD CURRENT (rnA)
-40·e
FIGURE 9 - fout. SATURATION CHANGE
versus TEMPERATURE
"--I
I
Sinkl Saturatiln
(L01 to Vee!
~
~
~
FIGURE 8 - fout. SATURATION versus LOAD CURRENT
~
,I,
Connected
16 f--- -together
a
~ 8.0
5.5
6.5
Vee, SUPPLY VOLTAGE IV)
4.5
125
£
/'
;;:
100
f--- _"n81,2,3
,/
~
H
FIGURE 7 - SUPPLY CURRENT versus SUPPLY VOLTAGE
20
-~A ~ 25°~
2.0
z
5
W
~
TA, AMBIENT TEMPERATURE 1°C)
FIGURE 6 - fout PULSE WIDTH CHANGE
versus SUPPLY VOLTAGE
~
0
-~
100
125
~
i5
V>
l
®
SAA1042
SAA1042A
MOTOROLA
Specifications and Applications
Information
STEPPER MOTOR DRIVER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
STEPPER MOTOR DRIVER
The SAA1042 drives a two-phase stepper motor in the bipolar
mode. The device contains: three input stages, a logic section and
two output stages.
• Drive Stages Designed for Motors: 6.0 V and 12 V: SAA1042
24 V: SAA1042A
• 500 mA/Coil Drive Capability
• Built-In Clamp Diodes for Overvoltage Suppression
• Wide Logic Supply Voltage Range
• Accepts Commands for CW/CCW and Half/Full Step Operation
• Inputs Compatible with Popular Logic Families: MOS, TTL, DTL
• Set Input Defined Output State
• Drive Stage Bias Adaptable to Motor Power Dissipation for
Optimum Efficiency
FIGURE 1 -
PLASTIC PACKAGE
CASE 721-02
SAA1042 BLOCK DIAGRAM
PIN ASSIGNMENT
Vo
VCC
15
11
2
3
Logic
(Top View)
9
Gnd
6
Note: Case heat sink is electrically connected to ground (Pin 9) through
the die substrate.
Driver Bias
RB
Set
A
MOTOROLA LINEAR/INTERFACE DEVICES
4-59
..
•
SAA1042, SAA1042A
MAXIMUM RATINGS (TA = 25'C unless otherwise stated)
Symbol
SAA1042
Clamping Voltage (Pins 1,3, 14 & 16)
Vclamp
20
Over Voltage (VOV = Vclamp - VM)
VOV
Supply Voltage
VCC
Rating
SAA1042A
Unit
30
V
6.0
20
I
V
30
V
1M
500
mA
Yin clock
Yin Full/Half
VinCW/CCW
VCC
V
PO'
I/OJA
OJA
OJC
2.0
20
50
8.0
W
mWf'C
'C/W
'C/W
TJ
-30 to + 125
Tsta
-65to +150
'c
'c
Switching or Motor Current/Coil
Input Voltage (Pins 7, 8 & 10)
I
I
Power Dissipation
Derate above TA = 25'C
Thermal Resistance, Junction to Air
Thermal Resistance, Junction to Case
Operating Junction Temperature Range
Storage Temperature Range
*The power dissipation, PO. of the circuit is given by the supply voltage, VM and Vee. and the
motor current, 1M. and can be determined from Figures 3 and 5. Po = Pdrive + Plogic.
ELECTRICAL CHARACTERISTICS (TA = + 25'C)
Pin
Symbol
Vee
Min
Typ
Max
Unit
Supply Current
11
ICC
5.0 V
20 V
-
-
3.5
8.5
mA
Motor Supply Current
(I Pin 6 = -400 pA, Pins 1,3, 14, 16 Open)
VM = 6.0 V
VM = 12 V
VM = 24V
15
1M
5.0 V
5.0 V
5.0 V
-
25
30
40
5.0 V
10V
15V
20 V
2.0
7.0
10
14
-
-
-
Characteristic
Input Voltage -
Input Voltage -
7,8,10
High State
7,8,10
Low State
Input Reverse Current (Vin = VCC)
High State
Input Forward Current (Vin = Gnd)
Low State
7,8,10
7,8,10
Output Voltage - High State
(VM=12V) lout = - 500 mA
lout = - 50 mA
1,3,14,16
Output Voltage -
1,3,14,16
Low State
lout = 500 mA
lout = 50 mA
VIH
VIL
IIR
IIF
VOH
VOL
mA
5.0 V
10 V
15 V
20 V
5.0
10
15
20
V
V
V
V
5.0 V
10V
15 V
20 V
-
-
-
-
-
-10
-25
-40
-55
5.0 to 20 V
5.0 to 20 V
-
VM-2.0
VM-l.2
-
0.7
0.2
-100
1,3,14,16
lOR
Clamp Diode Forward Voltage
(Drop at 1M = 500 mAl
2
VF
Clock Frequency
7
fc
5.0 to 20 V
0
Clock Pulse Width
7
tw
5.0 to 20 V
10
Set Pulse Width
6
ts
-
10
6
-
-
VM
High State
Low State
-
MOTOROLA LINEAR/INTERFACE DEVICES
4-60
-
5.0 to 20 V
Output Leakage Current
(VM = VD = Vclamp max·)
Pin 6: Open
Set Control Voltage -
-
-
-
-
-
V
-
-
0.8
1.5
2.5
3.5
V
2.0
2.0
3.0
5.0
pA
-
pA
-
V
V
-
-
-
pA
2.5
3.5
V
50
kHz
-
-
-
-
0.5
fJ.S
fJ.S
V
SAA 1042, SAA 1042A
INPUT/OUTPUT FUNCTIONS
Clock - (Pin 7) This input is active on the positive edge
of the clock pulse and accepts Logic '1' input levels
dependant on the supply voltage and includes hysteresis for noise immunity.
tors are turned off.
After elapsing the pulse, the outputs will have defined
states.
Figure 6 shows the timing diagram.
Figure 7 illustrates a typical application in which the
SAA 1042 drives a 12 V stepper motor with a current
consumption of 200 mAicoil.
A bias resistor (RB) of 56 kO is chosen according to
Figure 2.
The maximum voltage permitted at the output pin is
VM + 6.0 V (see the Maximum Ratings), in this application VM = 12 V, therefore the maximum voltage is
18 V. The outputs are protected by the internal diodes
and an external zener connected between Pins 2 and
15.
From Figure 4, it can be seen that the voltage drop
across the internal diodes is about 1.7 V at 200 mAo This
results in a zener voltage between Pins 2 and 15 of:
CW/CCW - (Pin 10) This input determines the motor's
rotational direction. When the input is held low, (OV,
see the electrical characteristics) the motor's direction
is nominally clockwise (CW). When the input is in the
high state, Logic '1,' the motor direction will be nominally counter clockwise (CCW), depending on the motor
connections.
Full/Half Step - (Pin 8) This input determines the angular rotation of the motor for each clock pulse. In the
low state the motor will make a full step for each applied
clock pulse, while in the high state, the motor will make
half a step.
Vz = 6.0V - 1.7V = 4.3V.
To allow for production tolerances and a safety margin, a 3.9 V zener has been chosen for this example.
The clock is derived from the line frequency which is
phase locked by the MC14046B and the MC14024.
The voltage on the clock input, is normally low (Logic
'0'). The motor steps on the positive going transition of
the clock pulse.
A Logic '0' applied to the Full/Half input, Pin 8, operates the motor in the Full Step mode. A Logic '1' at
this input will result in the Half Step mode. The logic
level state on the CW/CCW input, Pin 10, and the connection of the motor coils to the outputs determines the
rotational direction of the motor.
These two inputs should be biased to a Logic '0' or
'1' and not left floating. In the event of non-use, they
should be tied to ground or the logic supply line, VCC.
The output drivers can be set to a fixed operating
point by use of the Set input and a bias resistor RB. A
positive pulse to this input turns the drivers off and sets
the logic state of the outputs.
After the negative going transition of the Set pulse,
and until the first positive going transition of the clock,
the outputs will be:
Vo - (Pin 2) This pin is used to protect the outputs (1,
3, 14, 16) where large positive spikes occur due to
switching the motor coils. The maximum allowable voltage on these pins is the clamp voltage (Vcl amp ). Motor
performance is improved if a zener diode is connected
between Pin 2 and Pin 15 as shown in Figure 1.
The following conditions have to be considered when
selecting the zener diode:
Vcl amp = VM + 6.0 V
Vz = Vcl amp - VM - VF*
where: VF = clamp diodes forward voltage drop (see
Figure 4)
Vclamp:
'" 20 V for SAA1042
'" 30 V for SAA1042A
Pins 2 and 15 can be linked, in this case Vz = 0 V.
Set/Bias Input -
(Pin 6) This input has two functions:
The resistor RB adapts the drivers to the motor
current.
A pulse via the resistor RB sets the outputs (1, 3, 14,
16) to a defined state.
Ll = L3 = high and L2 = L4 = low.
(See Figure 6, the timing diagram).
The Set input can be driven by a MC14007B or a transistor whose collector resistor is RB. If the input is not
used, the 'bottom' of RB must be grounded.
The total power dissipation of the circuit can be determined from Figures 3 and 5.
PD = 0.9 W + 0.08 W = 0.98 W.
This results in a junction to ambient temperature,
without a heatsink of:
The resistor RB can be determined from the graph of
Figure 2 according to the motor current and voltage.
Smaller values of RB will increase the power dissipation
of the circuit and larger values of RB may increase the
saturation voltage of the driver transistors.
When the "set" function is not used, terminal A of
the resistor RB must be grounded. When the set function is used, terminal A has to be connected to an opencollector (buffer) circuit. Figure 7 shows this configuration. The buffer circuit (off-state) has to sustain the
motor voltage VM. When a pulse is applied via the
buffer and the bias resistor RB:
TJ - TA = 50'ClWxO.98 W = 49'C.
or a maximum ambient temperature of 76'C. For operation at elevated temperatures a heatsink is required.
During the pulse duration, the motor driver transis-
MOTOROLA LINEAR/INTERFACE DEVICES
4-61
•
..
SAA 1042, SAA 1042A
FIGURE 2 -
~
'"
!ji
~
1liw
'"
SIAS RESISTOR RS versus MOTOR CURRENT
FIGURE 3 -
500
5.0
300
~z i:~
200
,...
VM
'-<
100
~
o
24 V
VM
~
..........
VM ~6.0V-'
30
20
I II
10
20
......
12V
f'.
I'-
30 40 50 60 80 100
MOTOR CURRENT!COIL (mAl
200
f2
0.7
0.5
'"
~
0.3
~
0.2
~
400
E
r-
~
300
""
200
::0
U
~
::2
j
100
o
/V
o
6.0V- r-I-
300 400 500
V~ "f'
/~
'd
/.'
~
20
30
50 70 100
MOTOR CURRENT/COIL (mAl
200
300 400 500
FIGURE 5 - POWER DISSIPATION versus
LOGIC SUPPLY VOLTAGE
v
/
V
~
o. 1
FIGURE 4 - CLAMP DIODE FORWARD CURRENT
versus FORWARD VOLTAGE
500
VM
/
1.0
'"""
I'-
24 V-
~
w
r--.
~
2.0 -VM~12V
'"~
50
~
VM
~
U5
70
DRIVE STAGE POWER DISSIPATION
500
~
300
E 200
z
I---- ~
0
;=
;t 100
~ 70
is
'" 50
/'
~
/
a'
.e
30
20
/
10
1.0
2.0
3.0
VF, FORWARD VOLTAGE (VI
4.0
5.0
5.0
FIGURE 6 -
10
15
VCC, SUPPLY VOLTAGE (VI
TIMING DIAGRAM
Full Step Motor Drive Mode. Full/Half Step Input
~
m Don't Care
0
Clock
~ High Output Impedance
~~~~====~;;;;~==~====~==
CW/CCW;
Set
L1
L2
L3
L4
Half Step Motor Drive Mode. Full/Half Step Input
Clock
Set
CW/CCW
L1
~
L2
DFllJI
Wdt
VUA
~
1
W/4
WA
w;r-
W4
W4
t?lZ2l-
l3
&LZa
WA
W4
t12Ui
W4'
L4
WWl'A
*4
W4I
IWYA
WA
MOTOROLA LINEAR/INTERFACE DEVICES
4-62
20
25
SAA 1042, SAA 1042A
FIGURE 7 - TYPICAL APPLICATION
SELECTABLE STEP RATES WITH THE TIME BASE DERIVED FROM THE LINE FREQUENCY
12 V
14
16
MCl40468
3
---------,
220 k
1
220 V
50 Hz
1
4
1
14
VCO
1
_...I
1
II
12 V
7
MCl4024
6
9
11
S.2 I'-F
1
7 12
10
~
1400 Hz
Set Input
u
Set
MOTOROLA LINEAR/INTERFACE DEVICES
4-63
MCl4007
®
TDA1085A
MOTOROLA
Specification and Applications
Information
a
UNIVERSAL MOTOR
SPEED CONTROLLER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
UNIVERSAL MOTOR SPEED CONTROLLER
The TDA1085A has all the necessary functions for the speed
control of universal (ae/dc) motors in an open or closed loop
configuration_ Additionally it has the facility for defining the initial
speed/time characteristic_ The circuit provides a phase angle varied trigger pulse to the motor control triac.
-
• Guaranteed Full Wave Triac Drive
• Soft Start from Powerup
• On-Chip FrequencyNoltage Convertor and Ramp Generator
1
• Current Limiting Incorporated
PLASTIC PACKAGE
CASE 648-06
• Direct Drive from ac Line
FIGURE 1 - BLOCK DIAGRAM AND PIN ASSIGNMENT
+vee
Shunt Regulator }
Ballast Resistor
-Vee
13
.
,g
il:c
tn
Ii
~0.
1:l
tn
E
~
11.
i5
il:
'"
0.
~
U
i~
"0.0."
tntn
"iiQ)
tjtn
«
~
.~
:::;
0
u
E
~
'"E""
~
u
~
~
::;;
~
u
g'
·E
;::
"
'""
0.
~
a::
~
a::
MOTOROLA LINEAR/INTERFACE DEVICES
4-64
~
:c
.,
E
c
c
0
00
>
tn
>
tn
Jl
1:!'"
0
"
E
~
>
u
;;
.~
'i s
3l U~ u1;;~ ·c ·c 0
"
.c
tn
"5
0 .c ~ ~c
--'
.B
0
0.
0
0
0
"0
~
u
11.
!
'"
~
~
"
'"'"
~
TDA1085A
MAXIMUM RATINGS
Parameter
Power Supply Voltage
Power Supply Current (Pin 10 Open)
Symbol
Value
VPin 9-8
17
V
IPin 9
15
mA
Unit
Peak Power Supply Regulation Current
IPin 9 + IPin 10
35
mA
Peak ac Synchronization Input Current
IPin 1
IPin 2
±1.0
mA
Peak Output Triggering Current
(Pulse Width 300 p.s; Duty
Cycle", 3%)
IPin 13
200
mA
Current Drain per Listed Pin
115
13
112
Po
1/ROJA
1.0
-5.0
-3.0, +0.1
mA
625
6.8
mW
mwrc
Power Dissipation (TA = 25°C)
Derate above 25°C
Operating Temperature Range
TA
Storage Temperature Range
Tstg
a to
II
°c
+70
-55to +125
°c
ELECTRICAL CHARACTERISTICS (TA = + 25°C unless otherwise stated)
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
-
15.5
-
V
Monitoring Enable Level"
VME
-
Monitoring Disable Level"
VMD
Internal Current Consumption, Note 1
IPin 9
VOLTAGE REGULATOR
Regulated Voltage"
(19 + 110 = 10 mAl
-
15.1
-
V
14.5
-
V
4.2
-
mA
RAMP GENERATOR
Reference Input Voltage Range, Note 2
-
VPin 5-8
0.08
Reference Input Bias Current
IPin 5
-
Distribute Low Level Voltage Range
VPin 6
a
VOL
-
VPin 6
VDU
1.9 V6
2.0 V6
Distribute -
Low Level (Figure 2)
Distribute - Upper Level" (Figure 2)
(VPin 6 = 950 my)
-
ICH7
-
400
High Acceleration Charging Current
Low Charging Current, Note 3
ICL7
-
5.0
Low-High Acceleration Range (Figure 2)
1!.vDA
NOTES:
1. Pins 1, 2, 11, 12, 14and 15 not connected; Pins4, 5, 6 and 7 grounded
to Pin 8:
Vee = 15.5 V
2. When VPin 5 is :s;;; 80 mV, the internal monitoring circuit interprets
it as a true zero, thus minimizing the effects of control amplifier
offsets.
3. This value should be accounted for when externally setting the distribute acceleration charging current.
MOTOROLA LINEAR/INTERFACE DEVICES
4-65
1.2
13.5
V
-20
pA
2.0
V
-
V
2.1 V6
-
V
mV
mA
pA
TDA1085A
ELECTRICAL CHARACTERISTICS (Continued)
Characteristic
I
Symbol
Min
Typ
Max
Unit
CURRENT UMITER
Stage Current Gain
!w
-
170
-
-
IOL7
-
35
-
mA
0
-
AI3
I Output Discharge Current Swing
CONTROL AMPUFIER
II
Actual Speed Voltage Range
VPin 4-8
Actual Speed Input Bias Current
IPin 4
Total Input Offset Voltage. Note 4
Voff
AlPin 16
)
VPin 4 - VPin 7
Output Current Swing
gm
-60
IPin 16
-
Input Signal Low Voltage. Note 5
VL12
-0.1
Input Signal High Voltage
VH12
0.1
IPin 12
-
Transconductance (
-
13.5
V
-350
nA
20
mV
300
-
"AN
±100
-
pA.
-
V
FREQUENCYNOLTAGE CONVERTER
-
5.0
Conversion Rate. Note 6'
KC
-
15
-
Linearity' (Figure 3)
KL
-
±4.0
-
Voltage Synchronization Levels
IPin 2
IPin 1
-
±50
Current Synchronization Levels
Input Voltage Swing
(for full angle swing)
V
-
Trigger Pulse Width. Note 7
tp
t
Polarization Current
-25
V
pA.
mY/Hz
%
TRIGGER PULSE GENERATOR
Trigger Pulse Repetition Period
Trigger Pulse High Level
IIPin 13 = 150 mAl
VPin 13
Output Leakage Current
(VPin 13 = 0 V)
10Pin 13
±50
-
11.7
-
V
-
55
-
pos
-
215
p.S
pA.
VCC-4
-
-
-
-
30
4. Vaff is defined as being the voltage difference between Pin 5 and 4
with no current flow on Pin 16.
5. The negative swing is clamped to - 0.3 V.
180 x 103 )
.
6. VPin 4 = k· CPin 11 ·IVee-V.), RPin 4' ( 1 + -R-'-1 ·freq In.
Pm 11
Where: 9 < K < 13 & V. = 1.3 V.
7. The timing given is when CPin 14 = 47 nF.
* These figures apply for the application shown in Figure 4.
MOTOROLA LINEAR/INTERFACE DEVICES
4·66
pA.
pA.
V
I
I
TDA1085A
INPUT/OUTPUT FUNCTIONS
(Pins 8, 9,10). This is a parallel type voltage regulator able to sink a large amount
of current while offering good regulation characteristics.
A resistor between Pins 9 and 10 reduces the internal
power dissipation. Under minimal current sink conditions (min. current from the unregulated supply, max.
consumption by the circuitry), at least 1.0 mA should
flow through this resistor. Under max. sink conditions
(max. current from the unregulated supply, min. consumption by the circuitry), the maximum resistor value
is chosen so that the voltage at Pin 10 falls towards 3.0
V, but not lower. The above, fixed dynamic range of the
regulator must not be exceeded within one line cycle.
A power supply failure causes shutdown.
For operation from an externally regulated voltage,
Pin 10 is not connected.
(Pins 4,11,12). Speed sensing can
be achieved either digitally (tachogenerator frequency)
or analogically (tachogenerator amplitude).
For digital sensing, a bipolar signal with respect to
ground is applied to Pin 12. During positive excursions
CPin 11 is charged. An internal mirror delivers ten times
the charge on CPin 11 via Pin 4. However, due to internal
circuitry, the charge on Pin 4 can vary in the region of
9 to 13 times the charge on CPin 11. For that reason it
is necessary to calibrate the FrequencyNoltage Convertor (FNC) with a variable resistor on Pin 4. Thus the
relationship between speed and VPin 4 is defined by
RPin 4 and CPin 11·
To maintain linearity in the high speed ranges it is
important that CPin 11 is fully charged across an equivalent resistor of about 180 kO. It should be borne in
mind that the impedance on Pin 11 should be kept as
low as possible as CPin 11 has a large influence on the
temperature coefficient of the FV/C. The time constant
on Pin 4 should also be kept as low as possible.
Pin 12 is also an impedance monitoring input; at high
impedances VPin 12 increases. Should VPin 12 exceed
5.0 V the triac trigger pulses are inhibited and the circuit
resets.
A 470 kO resistor from Pin 11 to + VCC significantly
reduces the leakage current and reduces the device temperature coefficient to almost zero.
FIGURE 2 - RAMP GENERATOR
TRANSFER CHARACTERISTIC
FIGURE 3 - FREQUENCYNOLTAGE CONVERTER
OUTPUT CHARACTERISTIC
VOLTAGE REGULATOR -
SPEED SENSING -
VPin 5
VPin 4
1.0
VOU ~ 2VOL
VPin 6 ~ VOL
0.8
I
I
~to~
I
I
High Acceleration
The shape of the curve is determined by CRPin 7; where
CPin 7 defines the high acceleration slope and RPin 7
defines that of the low acceleration.
MOTOROLA LINEAR/INTERFACE DEVICES
4-67
II
..
TDA1085A
INPUT/OUTPUT FUNCTIONS (continued)
This is achieved as follows: The motor current will
set up an alternating current, consisting of positive and
negative peaks through the shunt resistor (0.05
in
Figure 4).
The negative peaks of this current are fed through a
resistor to Pin 3 where they are compared with a preset
current defined by a resistor between Pin 3 and + VCC.
An excessive shunt current will try to pull Pin 3 below
- Vcc, but the current limiter becomes active at this
point and reduces the charge on CPin 7, consequently
reducing the motor speed.
Thus the value of the shunt and the ratio of the two
resistors to Pin 3 fix the level at which the limiter becomes active, while the parallel equivalent of the two
resistors determines the magnitude of the discharge
current and thus how rapidly the circuit responds to an
overcurrent condition.
For analog sensing input 12 should be grounded and
a positive signal, with respect to ground, Pin 8, applied
to Pin 4.
n
RAMP GENERATOR - (Pins 5, 6, 7) (refer to Figure 2).
A preset voltage applied to Pin 5 will initiate the generation of a ramp whose final value is determined by
the voltage applied to Pin 5. The voltage applied to Pin
6 will determine how much of the full ramp, shown in
Figure 2, is used. The charging current passing through
Pin 7 to the ramp generator timing capacitor determines
the ramp slope.
When Pin 6 is held at -Vcc a charging current of 1.2
mA is delivered to Pin 7, regardless of the voltage of
Pin 5. This represents the high acceleration period
shown in Figure 2.
If the preset voltage applied to Pin 5 is equal to or
less than the voltage on Pin 6 the charging current will
be 1.2 mA, or high acceieration.
If the preset voltage applied to Pin 5 is between VPin
6 and 2 VPin 6 the charging current is 1.2 mA (high
acceleration) until the voltage at the reference input of
the control amplifier equals VPin 6. At this point the
charging current will switch to 5.0 p,A; i.e. low
acceleration.
If the preset voltage applied to Pin 5 is greater than
2 VPin 6 the charging current will be 1.2 mA (high acceleration) until the control amplifier's reference input
reaches VPin 6 when it will switch to 5.0 !LA (low acceleration) until 2 VPin 6 is reached. At this point the
charging current will revert to 1.2 mA, high acceleration,
until the final value of VPin 5 is reached.
Should the preset voltage at Pin 5 fall below 80 mY,
the triac trigger pulses are inhibited and the circuit resets. This fact should be borne in mind when switching
from one preset value to another.
As long as the voltages applied at Pins 5 and 6 are
derived from the internal voltage regulator, they and
the voltage on Pin 4 are ratioed and thus independent
of the voltage regulator spread and temperature
coefficient.
CONTROL AMPLIFIER - (Pin 16). Connected to this pin
is a network which compensates electrically for the
mechanical characteristics of the motor and its load to
give the circuit optimum closed loop stability and transient response.
The component values are best determined empirically by connecting Rand C substitution boxes and looking for the best results.
TRIGGER PULSE GENERATOR - (Pins 1, 2, 13, 14, 15).
This circuit performs four functions:
1. The conversion of the control amplifier's dc output
level to a proportional firing angle positioned to
within half a line cycle.
2. The calibration of the pulse width.
3. The repetition of the firing pulse if the triac fails
to latch, or if the current is interrupted by brush
bounce.
4. To delay the firing pulse until the current crosses
zero at wide firing angles.
RPin 15 and CPin 14 fix the sawtooth while CPin 14
also determines the pulse width.
Pin 13 is the trigger pulse output. A current limiting
resistor is essential on this pin. This configuration will
drive two thyristors controlling a bridge if the supply
for the speed controller is isolated.
CURRENT LIMITER - (Pin 3). Safe operation of the
motor and triac under all conditions is ensured by reducing the motor speed if a preset current limit is
exceeded.
MOTOROLA LINEAR/INTERFACE DEVICES
4-68
TDA1085A
TYPICAL APPLICATIONS
FIGURE 4 -
CLOSED LOOP. FULLY PROGRAMMED. MULTI·SPEED SYSTEM WITH CURRENT LIMITING
~S1 6 52R21 ~53A20 6. 54
*
A18
56 k
*
A14
120 k
27k
,.
D2
lN4148
*
+
A17
2.7 k
Cll
*
AIS
S.6 k
Cl0
1.0 " F
470
,,~
820
2
'C0.1
k
k
k
15
14
~ I
r---
r---
"c
~OO "F' ~OO ".F
C6
D3
Ml
MT21~
2N6347
~,
~A22
MTJ
ISO
A6
2.2 k
" C3
0.1 ".F 680 V
C4
,,' ~",,':~
'"~ ~
~
* **
**
200 k
'"
1.0
"F
nF
/
J
II
NOloateM _!~_~~ r-.J
A8
1.2 k
C7
PH
15 VII 0000 rpm
20V M2
AS
120
100k CS
47"F
Cl
A4
820 k
5
6 0
7 ~ 13
16 >- 3
12
-H 4
8 II
AID
Dl
lN4005
~
+
9 10
.,
A16
68kC9
+ + C8
k
A13
lM5
AI
5.6 k
A
All A12 100 A23 A7+ C2
680 270 470 47 33'
A3
820 k
*A19
4.7 k
A2
270
pF
A9
0.05
"F
~
N
.. Chosen to suit the speeds required
** Adjust for the highest speed
*** Required only with 'A' suffix device
Speed Control Resistor Network Equations
=
given
R18
=
R17 (15.5V -1)
Vw
R19
=
R17(14.8V -1)
Vspin 2
R17
R20
=
R17 (14.8 V -1) -R19
Vspin 1
R21
=
R17 (14.8 V -1) -R19-R20
k.vW
R15
=
R ( K.VW )
21 15.5 V (2.K)
R14
=
R15(15.5V -1)
Vw
S1
52
S3
S4
VPin 5
Wash
se
oe
oe
oc
Vw
0
Distribute
oe
se
oc
oc
KVW
Vw
Spin 1
oe
oe
se
oc
>KVW
'iv
w
2
Spin 2
oe
oe
oc
se
»KVW
='iv
2 w
VPin6
se = switch closed
oc = switch open
Note:
When changing from one speed to another VPin 5 must not be allowed
to fall below 80 mV - otherwise the circuit will reset and restart from
zero.
The component values given in Figure 4 correspond to:
Vw
The ratio distribute speed to wash speed can be chosen as:
VD
Vspin 1
Vspin 2
K
MOTOROLA LINEAR/INTERFACE DEVICES
4-69
0.7V
1.13V
5.0 V
1'V
'.6
..
TDA1085A
FIGURE 5 - OPEN LOOP, SOFT START - WITH
PROGRAMMED TIME TO MAX. SPEED
(t = CPin 7. 65 x 105 )
FIGURE 6 - OPEN LOOP,
SOFT-START/SOFT-STOP,
LlGHTINGIINDUCTIVE LOAD CONTROLLER
lOOk
100 k
22k
1.0 n
P=
270 k
'f
10nFt
22 k
rf-
P-
r:;
+
16 15 14 13 12 11 10
1
1
9
16 15 14 13 12 11 10
f
L-~~2r-3r-~4~5r-6r-~7~~
I
820 k
4---+-+----"
1
2
+ 16V
rf'
100/LF 100 ftF
+
"
3
4
6
5
7
I
820 k
820 k
820 k
4
6V
10 k
5.0W
100 ftF
'i4
.~150
.~150
J/~.1
Load
ftF
Load
MOTOROLA LINEAR/INTERFACE DEVICES
4-70
9
TDA1085A
200
8
TDA 1085A
n
I
1
~
10 ftFF*
rd~
270 k
10 nF
47 nF
200
l
~
-=-
8
J
10 k
5.0W
®
TDA1085C
MOTOROLA
Designer's Data Sheet
UNIVERSAL MOTOR
SPEED CONTROLLER
UNIVERSAL MOTOR SPEED CONTROLLER
LINEAR INTEGRATED CIRCUIT
The TDA 1085C is a phase angle triac controller having all the
necessary functions for universal motor speed control in washing
machines. It operates in closed loop configuration and provides
two ramps possibilities.
• On-Chip Frequency to Voltage Converter
• On-Chip Ramps Generator
• Soft Start
• Load Current Limitation
• Tachogenerator Circuit Sensing
• Direct Supply from AC Line
• Security Functions Performed by Monitor
DSUFFIX
PLASTIC PACKAGE
CASE 648-06
PLASTIC PACKAGE
CASE 751 8-03
SO-16
FIGURE 1 - BLOCK DIAGRAM AND PIN ASSIGNMENT
+ Vee
SHUNT REGULATOR}
BALLAST RESISTOR
12
.
4
11
w
0:
z
C
I-
~
cw
w
:l;
....
<
I-
"
is
<;
~
..
..
<
U
:!
::>
0
>
...
5
6
....
....
C C
ww
W
w
I-
0
i:::;
0:
IZ
..
<
w
::>
u
'~"
I-
0:
0
'z"
i
>=
0:
0:
<
:!
0:
0
<
0
0
iii
.'"
W
:!
::>
0:
I-
..Ing
Z
I-
.
>-
:::;
I-
0
0
<;
~
U
x
0
~
0:
0:
::>
0
~
60 ....x
0
....
w ;:
9
I-
;ll
0
....
Z
I-
0
0
>=
<
N
>=
<
N
I!:::>
Z
a:
~
Z
Z
0
0
l:
l:
0:
u
z
~
w
! !:i'<"
0
:!
>
<
0:
MOTOROLA LINEAR/INTERFACE DEVICES
4-71
.
....
0
::>
0
w
~
z
>-
ffi
~
0:
a:
ii:
::>
0
''""
....
II
TDA1085C
MAXIMUM RATINGS (TA = 25·C Voltages are referred to pin S [Ground])
Symbol
Value
Unit
Power Supply, when externally regulated, VPin9
VCC
15
V
Maximum Voltage per listed pin
Pin 3
Pin 4-5-6-7-13-14-16
Pin 10
Vpin
Maximum Current per listed pin
Pin 1 and 2
Pin 3
Pin 9 (VCe!
Pin 10 shunt regulator
Pin 12
Pin 13
Ipin
Rating
II
V
+5.0
Oto+VCC
Oto +17
mA
-3.0 to +3.0
-1.0 to +0
15
35
-1.0to +1.0
-200
Maximum Power Dissipation
Junction to Air Thermal Resistance
Operating Junction Temperature
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (TA
=
Po
1.0
W
RtlJA
65
·CIW
TA
-10to +120
·C
Tsta
-55to +150
·C
25·C)
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
15
15.3
15.6
V
VOLTAGE REGULATOR
Internally Regulated Voltage (VPin9)
(lPin7 = 0, IPin9 + IPinl0 = 15 mA. IPin13
= 0)
VCC Temperature Factor
TF
-
-100
Current Consumption (lPin9)
(V9 = 15 V, V12 = Vs = 0,11
all other pins not connected)
ICC
-
4.5
VCC EN
VCC DIS
-
VCC-0.4
VCC-l.0
=
12
=
VCC Monitoring Enabling Level
Disable Level
6.0
ppml"C
mA
100"A,
-
V
RAMP GENERATOR
Reference Speed Input Voltage Range
VPin5
O.OS
-
13.5
V
Reference Input Bias Current
-IPin5
0
O.S
1.0
"A
Ramp Selection Input Bias Current
-IPin6
0
-
1.0
Distribution Starting Level Range (VDS)
VPin6
0
-
2.0
"A
V
VDsNPin6
2.0
2.09
2.2
Distribution Final Level (VDF)
VPin6 = 0.75 V
High Acceleration Charging Current
VPin7 = 0 V
VPin7 = 10 V
-IPin7
Distribution Charging Current
VPin7 = 2.0 Volts
-IPin7
mA
1.2
1.7
1.4
4.0
5.0
6.0
MOTOROLA LINEAR/INTERFACE DEVICES
4-72
-
1.0
1.0
"A
TDA1085C
ELECTRICAL CHARACTERISTICS (continuedl
Symbol
Min
Typ
Max
Cg
130
180
250
VPin3 TH
50
65
80
mV
Input Signal "Low Voltage"
Input Signal "High Voltage"
Monitoring Reset Voltage
V12 L
V12 H
V12 R
-100
+100
5.0
-
-
-
mV
mV
V
Negative Clamping Voltage
-V12 CL
-
0.6
-
V
-IPin12
-
-
I'A
Characteristic
Unit
CURRENT LIMITER
Limiter Current Gain (lPin3 ~ -3001'AI
IPin7/1Pin3
Detection Threshold Voltage
IPin3 ~ -101'A
FREQUENCY TO VOLTAGE CONVERTER
IPin12 ~ -2001'A
Input Bias Current
Internal Current Source Gain
G
~
t'pin4, VPin4
Pinl1
~
G.O
VPinll
~
~
~
10.5
1.04
1.015
0.965
1.05
1.025
0.975
1.06
1.035
0.985
G/G8.6
8.6 Volts)
V4~4.3V
V4
10.3
0
Gain Linearity versus Voltage on Pin 4
(G8.6 ~ Gain for VPin4
V4 ~ 0 V
25
10
12 V
Gain Temperature Effect (VPin4
~
0)
TF
-
350
-
ppm/'C
Output Leakage Current (lPinll
~
0)
-IPin4
0
-
100
nA
VPin4
0
Voff
0
-
T
270
-200
50
CONTROL AMPLIFIER
Actual Speed Input Voltage Range
Input Offset Voltage VPin5 - VPin4
(lPinl6 ~ 0, VPin16 ~ 3.0 and 8.0 Volts)
Amplifier Transconductance
(lPinl6/d (V5 - V4)
(lPinl6 ~ + and -50 !LA, VPin16
~
13.5
V
50
mV
340
400
p.AJV
-100
100
-50
200
3.0 Voltsl
Output Current Swing Capability
Source
Sink
I'A
IPin16
. Output Saturation Voltage
V16 sat
-
IPin2
IPinl
-
-
0.8
V
TRIGGER PULSE GENERATOR
!LA
Synchronization Level Currents
Voltage Line Sensing
Triac Sensing
Trigger Pulse Duration (CPin14
~
47 nF, RPin15
~
Trigger Pulse Repetition Period, conditions as a.m.
Output Pulse Current VPin13
~
Output Leakage Current VPin13
VCC -4.0 Volts
~
-3.0 Volts
Full Angle Conduction Input Voltage
Saw Tooth "High" Level Voltage
Saw Tooth Discharge CUrrent, IPin15
~
100 !LA
-
±50
±50
192
-
rnA
30
!LA
To
-
55
TR
-
220
-IPin13
180
270 kO)
±100
±100
113 L
-
-
V14
-
11.7
-
I's
I'S
V
V14H
12
-
12.7
V
IPin14
95
-
105
!LA
MOTOROLA LINEAR/INTERFACE DEVICES
4-73
II
TDA1085C
GENERAL DESCRIPTION
Pin 12 ,has also a monitoring function: when its voltage is
above 5V, the trigger pulses are inhibited and the IC is reset.
It also senses the tachogenerator continuity and in case of
any circuit aperture, it inhibits pulse, avoiding the motor to
run out of control. In the TDA 10B5C, pin 12 is negatively
clamped by an internal diode which removes the necessity of
the external one used in the formor circuit.
The TDA 10B5C triggers a triac accordingly to the speed
regulation requirements. Motor speed is digitally sensed by a
tachogenerator and then converted into an analog voltage.
The speed set is externally fixed and is applied to the internal
linear regulation input after having been submitted to programmable acceleration ramps. The overall result consists in
a full motor speed range with two acceleration ramps which
allow efficient washing machine control (Distribute function).
a
RAMP GENERATOR - (pins 5-6-7) The true Set Speed
value taken in consideration by the regulation is the output of
the ramp generator (pin 7). With a given value of speed set
input (pin 5), the ramp generator charges an external capacitor Cpin 7 up to the moment Vpin 5 (set speed) equals Vpin 4
(true speed), see fig. 2. The IC has an internal charging currentsource ofl.2mAand delivers it from Oto 12 Vat pin 7. It
is the high acceleration ramp (5 seconds typ.) which allows
rapid motor speed changes without excessive strains on the
mechanics. The TDA 10B5C offers in addition the possibility
to break this high acceleration with the introduction of a low
acceleration ramp (called Distribution) by reducing the pin 7
source current down to 5 J.LA under pin 6 full control, as
shown by following conditions:
Additionnally, the TDA 10B5C protects the whole system
against AC line stop or variations, overcurrent in the motor
and tachogenerator failure.
INPUT/OUTPUT FUNCTIONS
(Referred to Figures 1 and 8)
VOLTAGE REGULATOR - (pins 9 and 10) This is a parallel
type regulator able to sink a large amount of current and
offering good characteristics. Current flow is provided from
AC line by external dropping resistors Rl, R2, and rectifier:
This half wave current is used to feed a smoothering capacitor, the voltage of which is checked by the IC.
• Presence of high acceleration ramp Vpin 5
> Vpin 4
• Distribution occurs in the Vpin 4 range (true motor speed)
defined by Vpin 6 :;; Vpin 4:;; 2Vpin 6
When V cc is reached, the excess of current is derived by
another dropping resistor RIO and by pin 10. These three
resistors must be determined in order:
For two fixed values of Vpin 5 and Vpin 6, the motor speed
will have high acceleration, excluding the time for Vpin 4 to
go from Vpin 6 to two times this value, high acceleration
again, up to the moment the motor has reached the set speed
value, at which it will stay, see fig. 3.
• to let lmA flow through pin 10 when AC line is minimum
and Vcc consumption is maximum (fast ramps and pulses
present).
• to let V10 reach 3V when AC line provides maximum current and Vcc consumption is minimum (no ramps
and no pulses).
Should a reset happen (whatever the cause would be), the
above mention ned successive ramps will be fully reprocessed from 0 to the max. speed. If Vpin 6 = 0, only the high
acceleration ramp occurs.
• all along the main line cycle, the pin 10 dynamic range
must not be exceeded unless loss of regulation.
To get a real zero speed position, pin 5 has been designed in
such a way that its vo'itage from 0 to BO mV is interpreted as a
true zero. As a consequence, when changing the speed set
position, the designer must be sure that any transient zero
would not occu~: if any, the entire circuit will be reset.
An AC line supply failure would cause shut down.
The double capacitive filter built with Rl and R2 gives an efficient Vcc smoothing and helps to remove noise from set
speeds.
As the voltages applied by pins 5 and 6, are derived from the
internal voltage regulator supply and pin 4 voltage is also
derived from the same source, motor speed, which is determined by the ratios between above mentioned voltages, is
totally independent from Vcc variations and temperature
factor.
SPEED SENSING - (pins4-"-'2) The IC is compatible with
an external analog speed sensing: its output must be applied
to pin 4, and pin 12 connected to pin B.
In most of the applications it is more convenient to use a
digital speed sensing with an unexpensive tachogenerator
which doesn't need any tuning. During every positive cycle at
pin 12, the capacitor Cpin 11 is charged to almost Vcc and
during this time, pin 4 delivers a current which is 10 time the
one charging Cpin", The current source gain is called G and
is tightly specified, but nevertheless requires an adjustment
on Rpin 4. The current into this resistor is proportional to
Cpin 11 and to the motor speed; being filtered by a capacitor,
Vpin 4 becomes smoothered and represents the "true actual
motor speed".
CONTROL AMPLIFIER - (pin 1611t amplifies the difference
between true speed (pin 4) and set speed (pin 5), through the
ramp generator. Its output available at pin 16 is a double
sense current source with a max. capability of ± 100 J.LA and a
specified transconductance (340 j.LA/v.typ.). Pin 16 drives
directly the trigger pulse generator, and must be loaded byan
electrical network which compensates the mechanical
characteristics of the motor and its load, in order to provide
stability in any condition and shortest transient response,
see fig. 4.
To maintain linearity into the high speed range, it is important to verify that Cpin 11 is fully charged : the internal source
on pin 11 has 100 KO impedance. Nevertheless Cpin 11 has to
be as high as possible as it has a large influence on FV IC temperature factor. A 470 KO resistor between pins 11 and 9
reduces leakage currents and temperature factor as well,
down to negiectable effects.
This network must be adjusted experimentally.
In case of a periodic torque variations, pin 16 provides
directly the phase angle oscillations.
MOTOROLA LINEAR/INTERFACE DEVICES
4-74
TDA1085C
TRIGGER PULSE GENERATOR - (pins 5 1-2-13-14-15)
This circuit performs four functions:
in the sense that speed adjustment will stay valid in the entire
speed range.
•
The conversion of the control amplifier DC output level to
a proportionnal firing angle at every main line half cycle.
•
The calibration of pulse duration.
•
The repetition of the pulse if the triac fail'; to latch on ifthe
current has been interrupted by brush bounce.
•
The delay of firing pulse until the current crosses zero at
wide firing angles and inductive loads.
POWER SUPPPLY
As dropping resistor dissipates noticeable power, it is necessary to reduce the Icc needs down to a minimum. Triggering
pulses, if a certain number of repetition is in reserve to cope
with motor brush wearing at end of its life, are the largest Icc
user. Classical worst case configuration have to be considered to select dropping resistor. In addition the parallel regulator must be always into its dynamic range, i.e. Ipin 10 over
1 rnA and Vpin 10 over 3 volt in any extreme configuraton. The
double filtering cell is mandatory.
Rpin 15 programs the pin 14 discharging current. Saw-tooth
signal is then fully determined by R15 and C14 (usually
47 nF). Firing pulse duration and repetition period are in
inverse ratio to the saw-tooth slope.
TACHOGENERATOR CIRCUIT
The tacho signal voltage is proportional to the motor speed.
Stability considerations, in addition, require a RC filter the
pole of which must be looked at. The combination of both
elements yield a constant amplitude signal on pin 12 in most
of the speed range. It is recommended to verify this maximum amplitude to be within 1 volt peak in order to have the
largest signal/noise ratio without resetting the integrated
circuit (which occurs if Vpin 12 reaches 5.5 V).lt must be also
verified that the pin 12 signal is approximately balanced between" High" (over 300 mVI and" Low". A 8 poles tacho is a
minimum for lowspeed stability and a 16 poles is even better.
Pin 13 is the pulse output and an external limiting resistor is
mandatory. Max current capability is 200 rnA.
CURRENT LIMITER - (pin 3) Safe operation of the motor
and triac under all conditions is ensured by limiting the peak
current. The motor current develops an alternative voltage in
the shunt resistor (0.05 ohm in fig. 4). The negative half
waves are transferred to pin 3 which is positively preset at a
voltage determined by resistors R3 and R4. As motor current
increases, the dynamical voltage range of pin 3 increases
and when pin 3 becomes slightly negative in respect of pin 8
a current starts to circulate in it. This current, amplified typically180times, is then used to discharge pin 7 capacitor and,
as a result, reduces firing angle down to a value where an
equilibrium is reached. The choice of resistors R3, R4 and
shunt determines the magnitude of the discharge current
signals on Cpin7.
The RC pole of the tacho circuit should be chosen within 30
Hz in order to beasfaras possiblefromthe150 Hzwhichcorresponds tothe AC line 3rd harmonic generated by the motor
during starting procedure. In addition, a high value resistor
coming from Vcc introduces a positive offset at pin 12, removes noise to be interpreted as a tacho signal. This offset
should be designed in order to let pin 12 to reach at least 200 mV (negative voltage) at the lowest motor speed. We
remember the necessity of an individual tacho ground connection.
Noticethatthe current limiter acts onlyon peak Triac current.
APPLICATION NOTES
(Referred to Figure 41
FREQUENCY TO VOLTAGE CONVERTER - F VIC
Cpin 11 has a recommended value of 820 pF for 8 poles
tachos and max. motor rpm of 15000, and Rpin 11 must be
always 470 K.
PRINTED CIRCUIT LAYOUT RULES
In the common applications, where TDA 1085C is used, there
is on the same board, presence of high voltage, high currents
as well as low voltage signals where millivolts count. It is of
first magnitude importance to separate them each other and
to respect following rules:
•
Rpin 4 should be choosen to deliver within 12 volts at maximum motor speed in order to maximizesignal/noise ratio. As
the FV/C ratio as well as the Cpin 11 value are dispersed,
Rpin 4 must be adjustable and should be .made of a fixed
resistor in serie with a trimmer representing 25 % of the total.
Adjustment would become easier.
Capacitors decoupling pins which are the inputs of the
same comparator, must be physically close to the IC,
close to each other and grounded in the same point.
Once adjusted, for instance at maximum motor speed, the F
VIC presents a residual non linearity; the conversion factor
.. Ground connexion for tachogenerator must be directly
connected to pin 8 and should ground only the tacho. In
effect the latter is a first magnitude noise generator dueto
its proximity of the motor which induces high d¢/dt
signals.
(mV per R.P.M.) increases by within 7.7% as speed tends to
zero. The guaranteed dispersion of the latter being very
narrow, a maximum 1% speed error is guaranteed if during
pin 5 network design the small set values are modified, once
for ever, according this increase.
•
The following formulae gives Vpin 4:
The ground pattern must be in the "star style", in order to
fully eliminate power currents flowing in the ground network devoted to capacitors decoupling sensitive pins:
(4-5-7-11-12-14-16).
V p in4 = 140 . C p in11 . R4 . f .
(1
As an example, fig. 5 presents a PC board pattern which
concerns the group of sensitive pins and their associated
capacitors into which the a.m. rules have been implemented.
Notice the full separation of "Signal World" from "Power"
one by line AB and their communication by a unique strip.
+
1
in volt per Hertz.
180 k)
Rpin11
SPEED SET - (pin 5) Upon designer choice, a set of external
resistors apply a serie of various voltages corresponding to
the various motor speeds. When switching external resistors, verify that a voltage below 80 mV in never applied to
pin 5, if no, a full circuit reset will occur.
These rules will lead to much satisfactory volume production
MOTOROLA LINEAR/INTERFACE DEVICES
4-75
•
II
TDA1085C
RAMPS GENERATOR - (pin 6) If only a high acceleration
ramp is needed, connect pin 6' to ground.
bridge, the triac must be protected from commutating dV/dt
by a 1 to 2 mH coil in serie with MT2.
When a Distribute ramp should occur, pre-set a voltage on
pin 6 to which corresponds the motor speed starting ramp
point. Distribution (or low ramp) will continue up to the
moment the motor speed would have reached twice the
starting value.
Synchronisation functions are performed by resistors sensing AC line and triac conduction. 820 K values are usual but
could be reduced down to 330 K in order to detect the Zeros
with accuracy and to reduce the residual DC line component
below 20 mAo
The ratio of two is imposed by the IC. Nevertheless it could be
externally changed downwards (fig. 6) or upwards (fig. 7).
CURRENT LIMITATION
The current limiter starts to discharge pin 7 capacitor (reference speed) as Motor current reaches the designed threshold level. The loop gain is determined by the resistor connecting pin 3 to the serie shunt. Experience has shown that
its optimal value for a lOA rms limitation is within 2 KG. Pin 3
input has a sensitivity in current which is limited to reasonable values and should not react to spikes.
The distribution ramp can be shortened by an external resistorfrom Vcc charging Cpin 7"adding its currentto the internal 5 !1A generator.
POWER CIRCUITS
Triac Triggering pulse amplitude must be determined by Pin
13 resistor according the needs in Quadrant IV. Trigger
pulses duration can be disturbed by noise signals, generated
by the triac itself, which interfere within pins 14 and 16, precisely those which determine it. While easily visible this
effect is harmless.
If not used, pin 3 must be connected to a max. positive voltage of 5 V rather to be left ol;len.
LOOP STABILITY
The pin 16 network is predominant and must be adjusted
experimentally during module development. Thevalues indicated in fig. 4 are typical for washing machines applications
but accept large modifications from one model to another.
R16, it is the sole restriction, should not be below 33 kotherwise slew rate limitation will cause large transient errors for
load steps.
Triac must be protected from high AC line dV/dt during
external disturbances by 100 nF x 100 G network.
Shunt resistor must be as non selfic as possible. It can be
made locally by Constantan alloy wiring.
When the load is a DC fed universal motor through a rectifier
FIGURE 2 - ACCELERATION RAMP
FIGURE 3 - PROGRAMMABLE DOUBLE
ACCELERATION RAMP
V
Speeds
VpinS
Vpin 5 fixed set value
Ramp
High Acceleration
VOS
o
o
Vpin6= VOS
Vol' = 2VDS
MOTOROLA LINEAR/INTERFACE DEVICES
4-76
~
FIGURE 4 - BASIC APPLICATION CIRCUIT
...a
o
:I l00fJ
:IlOOfA
270
~
IN4007
680
6.8k
""
R7
I500k
,RII
470k
RAMPS
i:R15
R4
RIO
~
820pf
SPEEDS
s:
0
I
I
11
15
9
+vcc
-I
0
::0
0
r
»
c:
SPEEDS/RAMPS
SELECTOR
ifRESISTIVE
NETWORK)
z
m
-l"
.....
.....
10
5
47k
R2
68k
6
TDA1085C
820k
I"
»
::0
~
7
4
/
lOOn
12
14
16
8
3
I"
::0
100
120n
JIm
131
C7'"470"
z
-I
m
RI
~k
21
R3
2.7k
"TI
»
CI4
m
47n
(')
0
m
<
SHUNT
(')
50mA
22k
m
en
'"
Current limitation: lOA adjusted by R4 experimentally
Motor Speed Range: 0 to 15 000 rpm
Ramps
Tachogenerator
High acceleration:
Distribution ramp:
Speeds:
Wash 800 rpm
Distribution 1300
Spin 1: 7500
Spin 2: 15000
3200 rpm per second
Pin 5 voltage Set:
609 mV
996 mV
5.912 V
12.000V
Including non linearity corrections
Including non linearity corrections
Including non linearity corrections
Adjustment point
8 poles
delivering 30 v peak to peak at 6000 rpm, in open circuit
105 from 850 to 1300 rpm
FV IC Factor: . 8 mV per rpm (12 v full speed)
rriae
MAC 15 A-8
15 A
Cpinl!
= 680 pF
600 v
19t min:::: 90 rnA to cover Quad. IV at -10°C
II
Vee
= 15.3 v
I
-I
g
-
M
FIGURE 5 - PC BOARD PATERN
s:
0
--I
0
:Il
0
r
~I
2
m
~
CO
»
:Il
L.
IlIce I
Z10k
m'"
-
120
(")
~~~ ~
[",'1
II
.31
I \I I
'%
II
1,,1
~
2
--I
m
:Il
"
»
(')
m
0
m
<
(')
m
en
B
TDA1085C
FIGURE 6 - DISTRIBUTION SPEED k
<2
For k= I.S.
R3 =O.S (Rl + R21.
R3 C within 4seconds
v
VCC
Spinl (defined byR51R4+R51
b
2VpinS o
Distribute
and
Spin 1
Contact
R4
2VpinStCXl
pin5
R2
pinS
VpinS 0
VpinStCXl
R5
FIGURE 7 - DISTRIBUTON SPEED k
>2
v
Spin 1
So + 51
......----t--- pinS
2VpinStCXl
VpinStCXl
k >2
MOTOROLA LINEAR/INTERFACE DEVICES
4-79
II
II
-I
C
»
~
o
CO
en
FIGURE 8 - INTERNAL CONFIGURATION
(")
10
5
~I
0
I' .J I I
~
+-<§~
t
I
(JISI'A
_
I
MONITORING
IF-
:D
0
r
~
!::,
z
+ vee
19
m
~
""
00
0
:D
---~I
m
1
-
I .....
1
"ON"
.7V
1.2mA
:D
"Tl
~
()
m
0
m
<
()
m
(fJ
R2
.7V
IS
-vee
13
15
14
2
16
• (P12 connected) AND
6
(vee
OK) AND (VP5>80mV)
THEN
(11 OFF). (120FF). 114 OFF) AND (IS OFF)
7
5
®
TDAl185A
MOTOROLA
Specifications and Applications
Information
TRIAC PHASE ANGLE
CONTROLLER
TRIAC PHASE ANGLE CONTROLLER
SILICON MONOLITHIC
The TDA1185A generates controlled triac triggering pulses and
allows tacholess speed stabilization of universal motors by an
integrated positive feedback function. Typical applications are
power hand tools, vacuum cleaners, mixers and other small
appliances.
INTEGRATED CIRCUIT
• Low Cost External Components Count
••
• Optimum Triac Firing (2nd and 3rd Quadrants)
• Repetitive Trigger Pulses When Triac Current is Interrupted by
Motor Brush Bounce
• Triac Current Sensed to Allow Inductive Loads
1
• Soft Start
• Power Failure Detection and General Circuit Reset
PLASTIC PACKAGE
CASE 646-06
• Low Power Consumption: 1.0 mA
-
FIGURE 1 - TYPICAL SYSTEM CONFIGURATION
INTERNAL BLOCK DIAGRAM/PIN ASSIGNMENT
r-~--------------------------------------~--------------------~--'----o~
100
+
100 fJ-F
Positive
Feedback
9
R12
12
Set>-Ot--.-<~-----I
+
13
C13
RCompensation
+
Soft
4
C4 Sawtooth
7
820 k
Voltage Synchro
Generator
2.0W
Start Programming Pin
18 k
Main Line
Voltage Compensation
MOTOROLA LINEAR/INTERFACE DEVICES
4-81
1N4005
R9
0.05
II
II
TDA1185A
MAXIMUM RATINGS (Voltages are referred to Pin 14 (ground) unless otherwise
noted)
Rating
Symbol
Maximum Voltage Range per Listed Pin
Pins 3-5-11 (not connected)
Pins 4-S-13
Pin 2
Maximum Positive Voltage (No
minimum value allowed; see current
ratings)
VPin
VPin 12
VPin 1
Value
Unit
Volt
-20 to +20
-VcctoO
-3.0 to +3.0
+0
+0.5
Maximum Current per Listed Pin
Pin 1
Pins 6 and 7
Pin 9
Pin 10
Pin 12
IPin
-500
mA
rnA
mA
I'A
I'A
Maximum Power Dissipation
(at TA = 25°C)
Po
250
mW
ROJA
100
°CIW
±20
±2.0
±0.5
±300
Maximum Junction to Ambient Thermal
Resistance
Operating Ambient Temperature Range
TA
Storage Temperature Range
Tstg
ELECTRICAL CHARACTERISTICS (TA
=
o to
+ 70
°c
-55 to + 125
°C
25°C) Voltages are related to Pin 14 (ground)
Characteristics
Power Supply
Zener Regulated Voltage, (VPin I) IPin 1 = 2.0 mA
Symbol
Min
Typ
Max
Unit
-VCC
-9.6
-S.6
-7.6
Volt
-1.0
Circuit Current Consumption, IPin 1
-ICC
-2.0
VPin lEN
VPin lOIS
VCC + 0.2
VEN + 0.12
Phase Set
Control Voltage Static Offset VPin S - VPin 12
Pin 12 Input Bias Current
VPin 4 - VPin 12 Residual Offset
Voff
IPin 12
1.2
-200
Soft Start
IPin 13
VPin 1 = -6.0 V, IPin 2 = 0 V
Monitoring Enable Supply Voltage (VEN)
Monitoring Disable Supply Voltage (VOIS)
-
-
mA
VCC +0.5
VEN + 0.3
Volt
ISO
I.S
0
Volt
nA
mV
-17
-14
-11
I'A
IPin 4
IPin 4
VHTH
VLTH
67
-10
-2.5
70
73
-1.5
-
-1.6
+1.5
/LA
mA
Volt
Volt
IPin 9
VPin 10
1
2xlPinl0
1.25
A
A
ZPin S
-
-
75
36
120
-
kll
-
SO
4.0
mA
tp
-
~5
-
I's
t
ISYNC
-
420
-
-
-
Capacitor Charging Current
RPin 10 = 100 kll, VPin 13 from -VCC to -3.0 Volts
Sawtooth Generator
Sawtooth Capacitor Discharge Current
RIO = 100 kll VPin 4 from - 2.0 to - 6.0 Volts
Capacitor Charging Current
Sawtooth "High" Voltage (VPin 4)
Sawtooth Minimum "Low" Voltage (VPin 4) referred to Pin 1
Positive Feedback
Pin 9 Input Bias Current, VPin 9 = 0
Programming Pin Voltage Related to Pin 1
Transfer Function Gain .l.VPin S/.l.VPin 9
RIO = 100 kll, .l.VPin 9 = 50 mV
RIO = 270 kH, .l.VPin 9 = 50 mV
Pin S Output Internal Impedance
Trigger Pulse Generator
Output Current (Sink)
VPin 2 = 0 V
Output Leakage Current
VPin 2 = +2.0 V
Output Pulse Width
Cl = 47 nF
RIO = 270 kll
Output Pulse Repetition Period
Cl' = 47 nF
RIO = 270 kll
Current Synchronization Threshold Levels IPin 6, IPin 7
IPin 2
60
-
-40
MOTOROLA LINEAR/INTERFACE DEVICES
4-82
-1.0
1.5
Volt
-
+40
~
/LS
I'A
TDA1185A
CIRCUIT DESCRIPTION
The TDAl185A generates trigger pulses for triac control of power into an ac load. The firing angle is determined by generating a ramp voltage synchronized to
the ac line half cycle and compared to an external set
voltage representing the conduction angle.
Gate pulses are negative (sink current) and thus the
triac is driven in its most effective quadrants (02-03).
If the load is a Universal motor (the speed of which
is decreasing as torque increases), the TDA 1185A allows to increase the firing angle proportionally to the
motor current, sensed by a low value series resistor.
Notice: Perfect motor speed compensation cannot be
provided by open-loop systems, since no negative feedback is used. Due to the low cost of tacholess systems,
the TDAl185A is the optimum solution for applications
tolerating 5% motor speed variations.
Nevertheless by accurate circuit design, these variations can be reduced down to 2% from no load to full
load conditions.
CIRCUIT FUNCTIONS
DC POWER SUPPLY - DC power is directly derived
from the ac line through a 2.0 watt, 18 kn 'resistor, rectifier and filtering capacitor circuit. The latter being directly connected to the dropping resistor protects the
whole IC from any ac line overvoltage. The - VCC voltage is internally regulated by an integrated zener. Referred to Pin 14 (ground) the power supply voltage is
negative (- 8.6 volts). The TDA 1185A internal consumption is 1.0 mA.
IPin 13 = 0.2 x IPin 10 ± 10%
The voltage ramp lasts as long as VPin 13 is lower
than VPin 12· VPin 13 reset voltage is - VCC. See Figure
4.
Notice. Universal motors do not have any motion
effect as long as a minimum conduction angle is not
reached. The time the voltage ramp reaches this threshold value is considered as "dead" time and can be eliminated by a series resistor at Pin 13. The voltage drop
developed by IPin 13 makes the firing angle immediately reach the threshold value and have the soft start
function without dead time. See Figure 5.
TRIGGER PULSE GENERATOR - It delivers a 60 mA
minimum pulse current (sink) through an internally
short-circuit protected output. Pulse width is roughly
proportional to RlO • C4 and is repeated every 420 /Ls
if triac fails to latch or is switched off by brush bounce.
With inductive loads, the current lags in respect of the
voltage: Pin 6 delays the triggering pulse up to the
moment the triac is off, in order to prevent erratic power
control (see Figure 2). The logic structure guarantees
full-wave triac operation.
POSITIVE CURRENT FEEDBACK - The Universal motor
speed drops as load increases. To maintain it as stable
as possible, the triac firing angle must be increased. For
this purpose the Pin 9 input senses the motor current
as a voltage developed in a low resistor value, Rg , amplifies, rectifies and adds it to Pin 12 set voltage. The
transfer function IlVPin 8 = f (IlVPin 9) and is represented on Figure 6.
The gain in the linear region is dependent on RlO.
The voltage transferred to Pin 8 is proportional to the
average value of the motor current and is very close to
its RMS value (as motor current is not far from a sine
wave). This averaging effect is represented in Figure 7.
For large amplitude Pin 9 signals, the am function
presents a saturation effect which limits the maximum
firing angle increase. Figure 8 presents this aspect as
well as the total Pin 8 voltage which is:
SAWTOOTH GENERATOR - A constant current generator discharges the capacitor C4, the voltage of which
is the sawtooth signal synchronized with main line. Pin
4 voltage is reset to -1.6 volt at every ac line zero
crossing (see Figure 3). The constant current generator
is externally programmable by an external resistor connected to Pin 10:
IPin 4 = IPin 10 10 ± 5%
_-_V-"C",C,-±_1_.2_5
IPin 10 =
RlO
MAIN COMPARATOR - Its role is to determine the trigger pulse time which occurs as the sawtooth voltage
equals set voltage. Fixed set values lead to a constant
triac conduction angle unless positive current feedback
is connected or soft start capacitor is not charged.
VPin 8 = VPin 12
+ f(IVPin 91 Rl0) + offset
The offset is the addition of two PN Junctions and is
compensated with respect to VPin 4 (sawtooth) by additional diodes within the main comparator (See Figure
10).
The effect of positive feedback is described per Figure
9.
SOFT START - The TDAl185A allows the user to avoid
any abrupt inrush current in the load, for various purposes: motor soft start, protection of high performance
bulbs or ac line minimum disturbances.
The firing angle is established from zero to the set
value according to a voltage ramp generated by a constant current delivered to capacitor C13. The constant
current value is:
MONITORING - A central logic block performs the
following functions: - ENABLE/DISABLE of the IC with
respect to power supply voltage. Under DISABLE conditions, Pins 4, 8, 12, and 13 are forced to appropriate
voltages to prepare for the next reset (See Figure 10).
MOTOROLA LINEAR/INTERFACE DEVICES
4-83
II
..
TDA1185A
APPLICATION CONSIDERATIONS
variation to the load. An external compensation must
be used, introducing a VPin 12 decrease as Vmains increases. An inexpensive resistor RCOMP, connected to
the rectifier anode and to Pin 12 performs this role and
its value depends on VPin 12, Rl0C4, R12· RCOMP can
be empirically determined without difficulty under no
load conditions.
PINS CHARACTERISTICS - Figure 10 describes more
details in the internallC layout and defines the pin characteristics. Pin 9 has a low internal impedance and requires a maximum 100 n trimmer on Rg to adjust reaction ratio. Pin 8 must always be connected to - VCC
through a filtering capacitor.
TEMPERATURE EFFECTS - The TDA1185A has very
efficient internal temperature compensation. If positive
current feedback is not connected, the RMS power delivered to the load is stabilized within ± 0.2% over a
temperature range of + 20 to + 70'C. The positive feedback introduces in the same temperature range, a drift
of 250 mV on VPin 8; this slight firing angle increase
may be successfully used to compensate a motor ohmic
resistance increase with temperature as well.
FIRING ANGLE DYNAMIC- With purely resistive loads,
the effective RMS applied power to the load is an increasing function of the firing angle (per Figure 11). We
notice the fact that a firing angle of 150' provides 97%
of the full power corresponding to 180'.
With inductive loads, as currents lag with respect to
Voltage, 100% power corresponds to a firing angle
which is smaller than 180'.
These considerations will simplify positive feedback
design if maximum firing angle is accepted to be within
150-160'.
MAIN LINE VOLTAGE COMPENSATION - As the firing
angle is independent of main line voltage, any change
in the latter (usually ± 15%) induces a very large power
V
FIGURE 2 - MULTIPULSE GENERA1l0N DELAYED PULSE
The triac failed to latch at the first pulse. Successive pulses are
V +-______~--~--------+-~
V+-+-___-+_ _ _ _~_
o
generated up to the moment latching oocurs.
The triac turned off due to brush bounce, a new pulse is immediately delivered.
Approaching full conduction, a pulse would occur when the
triac still carries current; the pulse is delayed until the triac
turns off.
MOTOROLA LINEAR/INTERFACE DEVICES
4-84
TDA1185A
FIGURE 4 - SOFT START
FIGURE 3 - TRIGGERING PULSE TIMING
o
V
-VCC
V
II
Conduction Angle
Set
0'+-4£------4---------~
- - Reset Time
FIGURE 6 - TRANSFER FUNCTION
FIGURE 5 - SOFT START WITHOUT DEAD TIME
aVPin 8
Volts
5
t
I
aVPin 8 = f(VPin 9)
TDA1185
13
R13
I
4
3
R10 = 270 k
I
2
Conduction Angle
I
O.+-~
________
~~
_______
o L.._ _ _--.r-_ _ _~aV. .Pin 9
50
MOTOROLA LINEAR/INTERFACE DEVICES
4-85
100 mV
a
TDA1185A
FIGURE 7 -
AVERAGING EFFECT OF TRANSFER FUNCTION
.1VPin 8
100 mV
2.0 V
:\r:i'''O'~'
...
0
tl
1.0V
-+0""-----SOr%----10.,0-.;.-.-
Duty
Cycle
~
t2
!!
t2
FIGURE S -
TRANSFER FUNCTION (Pin S/Pin 9)
(VPin 8- VPin 1)
(Volts)
Rp10
TA ~ 2S·e
RINT(Pin 8) ~ 120 k Typ
~
100 k
lS0 k
220 k
400 k
800 k
VPin 12
-300
-200
-100
o
(Vp9 - VP14)
(mV)
100
FIGURE 9 -
POSITIVE FEEDBACK EFFECT
offset Voltages have been neglected
V
1 0 1 M Motor Current
0+----,''------',''------- A
V8 ~ V12
-Vee
10ms!
V
+ WAY. Rl0)
-Vec
VPin 9 ~ R9 x IAV Motor
Fu II Load
Conduction Angle
No Load
Conduction Angle
MOTOROLA LINEAR/INTERFACE DEVICES
4-86
200
300
TDA1185A
FIGURE 10 - INTERNAL BLOCK DIAGRAM
- ._ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~------~~-1~4~ +Vcc
~>-I~~nH
1f ~--.--t----+~---+-I--+-+-+-......~
I'....
Current
Sync
7
Voltage
Sync
Zero
PhaseT 0.7 x Vcc
"'6 /£.- - - - - - I - - - - j
Zero Phase
Set Speed 0-1_2-+-1_-+
6
Triac Off
,
120 k
IPin4
10
101
Programming ~........,-~---HIIc"l>(. I Pin
~r
I'
13
Capacitor
L_Tb_~_C-r__+-_~'-___
-i-
A.
loll
)
Trigger Pulse
Output
n lfr---+--.
N\
4 Sawtooth
+:1c.:O-:-O."H,...Z..------+---------~ Capacitor
VCC OK
~.-.L._-_~ I-I~-'-'
'---+_+--+--1__-+-+-111. •I
~~
JT
0.7 x Vee
Vee
Monitoring
-Vcc
FIGURE 11- EFFECTIVE POWER AS A FUNCTION OF FIRING ANGLE
U2
2
------
U
=
URMS
V2 SIN wt
RMS
Degrees
o
10
9
8
7
6
5
4
3
2
o
Firing Angle
ms (50 Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
4--87
II
•
@ MOTOROLA
TDA1285A
MOTOR SPEED CONTROLLER
UNIVERSAL MOTOR
SPEED CONTROLLER
The TDA 1285A has all the necessary functions for the speed
control of universal motors in a closed loop configuration. Directly
driven from the ac line, the circuits generate a phase angle varied
trigger pulse to the control triac. In addition it provides the following features:
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Full Wave Triac Drive
• Repeated Trigger Pulse if Triac Fails to Latch
• Over 65 mA Output Pulse Current
• Automatic Adaptation to Inductive or Hall Effect Sensors
-
• Sensor Circuit Continuity Detection
• Motor Current Limitation
• Controlled Motor Starting Acceleration
1
• Typical 1-2% Motor Speed Variation Within All Temperature
and Load Ranges
FIGURE 1 -
.;
c
.;
c
..:
'"
Ji
:;
U
>-
.r:;
1)
0.
0
0
~.~
:ii
""g '"~. oai
0
PLASTIC PACKAGE
CASE 648-06
BLOCK DIAGRAM AND PIN ASSIGNMENT
."E
::;
E
~
U
u
>
I
., .,
t:
~
."."
CD .,
0.0.
e
4::'"
o
"'IL
"
U
"''''
~Cii
"'~
..
VRef, and
as a result, the comparator is always "on" and the i
triac fired (100% max. power)
2) During time t2, VPin 3 is in the proportional band,
and the average power delivered to the load is a
fraction of maximum power.
3) During time t3, VPin 3 < VRef, and the triac is
always "off."
When the sensor temperature is above the set value
and is slowly decreasing as no heating occurs, VPin 3
- VPin 4 must exceed half the hysteresis value before
power is applied again (1). A similar effect occurs in the
opposite direction when temperature sensor is below
SUGGESTIONS FOR USE
The temperature sensor circuit is a Wheatstone bridge
including the sensor element. Comparator inputs may
be free from power line noise only if the sensor element
is purely resistive (NTC resistor). Usage of any P-N junction sensor would drastically reduce noise rejection.
Fixed phase sensing of the internal comparator output eliminates parasitic signals.
Some loads, even designed to be resistive, have in
fact a slight inductive component. A phase shift at Pin
8 can be achieved with external capacitor C3 connected
to Pin 8 network (see Figure 9).
Suggested maximum source current at Pin 1 is 40 pA,
in order to have acceptable sawtooth signal linearity.
MOTOROLA LINEAR/INTERFACE DEVICES
4-98
UAA1016B
FIGURE 4 -
FIGURE 5 - TYPICAL OUTPUT PULSE LENGTH
versus SYNCHRONIZATION RESISTOR
OUTPUT PULSE WIDTH DEFINITIONS
400
//
350
tP2
/
~ ISO
100
50
FIGURE 6 - EFFECTS OF INPUTS
COMPARATOR HYSTERESIS
Large
Hyster esis
"...V.....
V
1,.."
2:rr;,
"" ...
...'"
--
...---180~220
ISO
",'"
~
270
RSYNC RESISTOR (knl
Low
Hysteresis
0
CD
Noise
VPin 4 I V P i n 3- VPin 4
Pin 2
VPin 3+ Noise
UAA1016B
"Unco ntrollable
Temp erature
Band"
Voltage Source
I
CPin 2
-VCC
FIGURE 8 - TRIGGER PULSE GENERATION
M~~K;d\A
,~"' II
t~.
I
Comparator
II
Sensed
Comparator
Output
I,
~A
U
current~
Trigger Pulses
t
t
MOTOROLA LINEAR/INTERFACE DEVICES
4·99
~
330
FIGURE 7 - PIN 1 INTERNAL NETWORK
Pin 1
VPin 3-
,.
tPl ...
AV
V
6882100 120
......'"
IPy/
/
/
/
./
/
Sin- 1 (27 x 10- 6)
Vrms 'v'2
tp1 ~ ---::30=601=-ac---
/
/
f+-115VI60'Y
/
Sin- 1 (98 x 10- 6)
Vrms 'v'2
tP2 ~
360lac
L
//
ae Line
390
II
UAA10168
APPLICATION CIRCUITS
Figure 9 shows a very simple application of the
UAA1016B as an electronic rheostat having 100% efficiency. C3 is required only if load has an inductive com-
FIGURE 9 -
ponent. Figure 10 shows a typical application as a panel
heater thermostat with a proportional temperature
band of 1°C at 25°C.
APPLICATION CIRCUIT -
ELECTRONIC RHEOSTAT
*"I' 22 nF
•
7
82
n
6
50k : - - 4
2
1
5
3
Load
+
220 k
47 k
18 k
2.0W
"External phase shift, required for Inductive Loads only
FIGURE 10 -
220 Vac
1'0.1 p.F
r--
8
.-J
1.0 p.F"
'000
~~
UAA1016B
,+
100 p.F
~ 1
lN4005
APPLICATION CIRCUIT - ELECTRIC RADIATOR WITH PROPORTIONAL BAND
THERMOSTAT, PROPORTIONAL BAND 1"C AT 25'C
;/
50 k
/I
, 6.8 k
22 k
3
0.1
p.F 'I'
6
) )1 V
4
UAA1016B
BT162-600
100
n
R4
220 Vac
7
1
~
RT
6.8
k
~
RL
+
47 p.F
8.0 V
2
"f'
8
5
+
'1' 100 p.F
100 k
18 k
RT: NTC R @ 25'C = 22 k ± 10%
B = 3700
-""
2.0W lN4005
I
MOTOROLA LINEAR/INTERFACE DEVICES
4-100
Heater
2.0kW
Voltage References
In Brief . ..
Motorola's line of precision voltage references is
designed for applications requiring high initial accuracy,
low temperature drift, and long term stability. Initial
accuracies of ± 1.0%, and ± 2.0% means production
line adjustments can be eliminated. Temperature coefficients of 25 ppmrC max (typically 10 ppmrC) provide
excellent stability. Uses for the references include 01A
converters, AID converters, precision power supplies,
voltmeter systems, temperature monitors, and others.
Selector Guide
Precision Low Voltage
References. . . . . . . . . . . . . . . . . . . .. 5-2
Alphanumeric Listing ............... 5-3
Data Sheets ......... . . . . . . . . . . . . . .. 5-4
II
II
Voltage References
Precision Low Voltage References
A family of precision low voltage bandgap reference devices designed for applications requiring low temperature drift.
Vout
Volts
Typ
10
mA
Max
VoutfT
ppmrc
Max
1.235 ± 12 mV
1.235 ± 25 mV
20
20 Typ
10
-55" to + 125"C
-40" to +85"C
0" to 70"C
LM385BZ·1.2
LM385Z-1.2
LM285Z-1.2
( -40" to + 85"C)
LM385BZ-2.5
LM385Z-2.5
LM285Z-2.5
(-40" to +85"C)
25
MC1403A
MC1503A
40
MC1403
2.5 ± 38 mV
2.5 ± 75 mV
2.5 ± 25 mV
Device
55
5.0 ± 50 mV
MC1404AU5
40
MC1404U5
100
MC1404AU6
40
MC1404U6
MC1404AU10
40
MCl404Ul0
Micro~Power
29
2.0
(Note 3)
3.0/4.5
(Note 4)
10
(Note 6)
693.751
693
MC1504Ul0
TL431C.AC
TL431 I. AI
(- 40" to + 85"C)
TL431M
Notes: 1.
Case
MC1504U6
25
50 Typ
1.0
(Note 2)
MC1504U5
25
55
2.5 to 37
(Note 1)
6.0
(Note 5)
55
10±100mV
Regload
mVMax
MC1503
25
55
6.25 ± 60 mV
Regline
mVMax
Reference Diode Dynamic
Impedance IzI " 1.0 n at IR ~ 100 p.A
2.10 p.A" IR " 1.0 mA
3. 20 p.A " IR " 1.0 rnA
4. 4.5 V
'=S;
Vin
~
15 VI' 5 V :os; Vin .::.;; 40 V
Shunt Reference
Dynamic Impedance
Z '" 0.5
5. (Vout + 2.5 V) ~ Vin , ;,;:,; 40 V
6.0 rnA :s.; IL .;;; 10 rnA
MOTOROLA LINEAR/INTERFACE DEVICES
5-2
29.626
693
693
VOLTAGE REFERENCES
Device
LM285
LM385
MC1403.A
MC1404.A
MC1503.A
MC1504
TL431.A
Function
Micropower Voltage Reference Diodes .................................
Micropower Voltage Reference Diode ..................................
Precision Low Voltage Reference ......................................
Precision Low Drift Voltage Reference ..................................
Precision Low Voltage Reference ......................................
Precision Low Drift Voltage Reference ..................................
Programmable Precision References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
MOTOROLA LINEAR/INTERFACE DEVICES
5-3
Page
5-4
5-4
5-8
5-12
5-8
5-12
5-17
II
®
LM285
LM385
MOTOROLA
MICROPOWER VOLTAGE
REFERENCE DIODES
MICROPOWER VOLTAGE REFERENCE DIODES
The LM285/LM385 series are micropower two-terminal bandgap voltage regulator diodes. Designed to operate over a wide
current range of 10 pA to 20 mA, these devices feature exceptionally low dynamic impedance, low noise and stable operation
over time and temperature. Tight voltage tolerances are achieved
by on-chip trimming. The large dynamic operating range enables
these devices to be used in applications with widely varying supplies with excellent regulation. Extremely low operating current
make these devices ideal for micropower circuitry like portable
instrumentation, regulators and other analog circuitry where
extended battery life is required.
The LM285/LM385 series are packaged in a low cost TO-22SAA
plastic case and are available in two voltage versions of 1.235 and
2.500 volts as denoted by the device suffix (see ordering information table). The LM285 is specified over a -40°C to +85°C
temperature range while the LM385 is rated from O°C to + 70°C.
The LM385 is also available in a surface mount plastic package
in voltages of 1.235 and 2.500 volts.
II
SILICON MONOLITHIC
INTEGRATED CIRCUIT
ZSUFFIX
I
PLASTIC PACKAGE
CASE 29-04
(Bottom View)
99
c:ID
3
Iffl
N.C. 3
CATHODE 2
ANODE 1
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
• Operating Current from 10 pA to 20 mA
• 1.0%,1.5%,2.0% and 3.0% Initial Tolerance Grades
• Low Temperature Coefficient
• 1.0 n Dynamic Impedance
STANDARD APPLICATION
• Surface Mount Package Available
1.5V
Battery
1-
+
3.3 k
1.235 V
EQUIVALENT CIRCUIT SCHEMATIC
LM385-1.2
10 k
360 k
Open
for 1.235 V
ORDERING INFORMATION
Reverse
600 k
8.45 k
Device
Temp.
Range
LM285Z-1.2
LM285Z-2.5
600 k
-40·C
to +85·C
LM385BZ-1.2
600
500 11
k
LM385Z-1.2
LM385D-l.2
LM385BZ-2.5
LM385Z-2.5
LM385D-2.5
MOTOROLA LINEAR/INTERFACE DEVICES
5-4
00Ci0
+70·C
Breakdown
Voltage
Tolerance
1.235
Volts
±1.0%
2.500
Volts
±1.5%
1.235
Volts
±1.0%
1.235
Volts
±2.0%
2.500
Volts
±1.5%
2.500
Volts
±3.0%
LM285, LM385
MAXIMUM RATINGS (TA ~ +25"C unless otherwise noted)
Rating
Symbol
Value
Unit
Reverse Current
IR
30
mA
Forward Current
IF
10
mA
Operating Ambient Temperature Range
"C
TA
LM285
LM385
-40 to +85
o to +70
Operating Junction Temperature
Storage Temperature Range
TJ
+150
"C
Tstg
-65to +150
"C
ELECTRICAL CHARACTERISTICS (TA ~ 25"C unless otherwise noted)
LM285-1.2
Characteristic
Symbol
Reverse Breakdown Voltage
IRmin " IR " 20 mA
LM285-1.2!LM385B-l.2
TA ~ Tlow to Thigh (Note 1)
LM385-1.2
TA ~ Tlow to Thigh (Note 1)
V(BR)R
Minimum Operating Current
TA ~ 25"C
TA ~ Tlow to Thigh (Note 1)
IRmin
Typ
Max
Min
Typ
Max
1.223
1.200
1.235
1.247
1.270
1.223
1.210
1.205
1.192
1.235
1.247
1.260
1.260
1.273
-
-
Z
-
AV(BR)!AT
Wide band Noise (RMS)
IR ~ 100 p.A, 10 Hz " f " 10 kHz
Long Term Stability
IR ~ 100 p.A, TA ~ +25"C ± O.l"C
Average Temperature Coefficient
10 p.A" IR "20 mA, TA ~ Tlow to Thigh (Note 1)
-
1.235
-
p.A
8.0
-
8.0
-
10
20
-
1.0
1.5
10
20
-
-
0.6
-
n
S
AV(BR)R
Reverse Dynamic Impedance
IR ~ 100 p.A, TA ~ +25"C
Unit
V
-
Reverse Breakdown Voltage Change with Current
IRmin" IR" 1.0 mA, TA ~ +25"C
T A ~ Tlow to Thigh (Note 1)
1.0 mA" IR ,,20 mA, TA ~ +25"C
TA ~ Tlow to Thigh (Note 1)
LM385-1.21LM385B-l.2
Min
-
15
20
mV
-
-
-
1.0
1.5
20
25
0.6
-
n
80
-
-
80
-
ppmfC
-
60
-
-
60
-
p.V
-
20
-
-
20
-
ppm!
kHR
-
ELECTRICAL CHARACTERISTICS (TA ~ 25"C unless otherwise noted)
LM385-2.5/LM385B-2.5
LM285-2.5
Characteristic
Symbol
Reverse Breakdown Voltage
IRmin " IR " 20 mA
LM285-2.5!LM385B-2.5
TA ~ Tlow to Thigh (Note 1)
LM385-2.5
TA = Tlow to Thigh (Note 1)
V(BR)R
Minimum Operating Current
TA ~ 25"C
TA ~ Tlow to Thigh (Note 1)
Min
Max
Min
Typ
Max
Unit
V
2.462
2.415
-
2.5
-
2.538
2.585
-
2.462
2.436
2.425
2.400
2.5
2.5
-
2.538
2.564
2.575
2.600
p.A
IRmin
Reverse Breakdown Voltage Change with Current
IRmin " IR" 1.0 mA, TA ~ +25"C
TA = Tlow to Thigh (Note 1)
1.0 rnA '" IR" 20 mA, TA ~ +25"C
TA ~ Tlow to Thigh (Note 1)
Typ
AV(BR)R
-
-
-
-
13
20
30
-
-
-
13
-
20
30
mV
-
-
0.6
-
-
2.0
2.5
20
25
Z
-
1.0
1.5
10
20
0.6
-
n
AV(BR)!AT
-
80
-
-
80
-
ppmfC
Wideband Noise (RMS)
IR ~ 100 p.A, 10 Hz " f " 10 kHz
n
-
120
-
-
120
-
p.V
Long Term Stability
IR = loop.A, TA ~ +25"C ± O.l"C
S
-
20
-
-
20
-
ppm!
kHR
Reverse Dynamic Impedance
IR ~ 100 p.A, TA ~ +25"C
Average Temperature Coefficient
20 p.A " IR '" 20 mA, TA = Tlow to Thigh (Note 1)
Note: 1. Tlow
~
~
-40"C for LM285-1.2, LM285-2.5
O"C for LM385-1.2, LM385B-1.2, LM385-2.5, LM385B-2.5
Thigh
~
~
-
-
-
+ 85"C for LM285-1.2, LM285-2.5
+ 70"C for LM385-1.2, LM385B-1.2, LM385-2.5, LM385B-2.5
MOTOROLA LINEAR/INTERFACE DEVICES
5-5
-
II
LM285, LM385
TYPICAL PERFORMANCE CURVES FOR LM285-1.21385-1.21385B-1.2
FIGURE 1 -
REVERSE CHARACTERISTICS
RGURE 2 - REVERSE CHARACTERISTICS
100
:>
.s
w
10
to
Z
«
8.0
:J:
+ 85'C
I-- rTA
TA
0.1
II
o
+ 25'C
A
--
/
~
6.0
~
4.0
~
+85'C
~
VJ)
TA ~ +25'Ct--
§?
~
2.0
~ ~~
oX
~
40'C I-- I--
TA
TA
w
to
"/
roy
A
0.2
U
~
0
TA
~
-4O'C
IIII
-2.0
0.4
0.6
0.8
1.0
VIBR), REVERSE VOLTAGE IV)
FIGURE 3 -
1.2
0.01
1.4
0.1
1.0
10
'R, REVERSE CURRENT ImA)
100
FIGURE 4 - TEMPERATURE DRIFT
FORWARD CHARACTERISTICS
1.250
'R
~
~
1.240
~
100 p.A
-
~
§?
1--1'--
~ 1.230
~
oX
~ 1.220
1.210
0.1
1.0
10
'F, FORWARD CURRENT ImA)
-50
100
-25
FIGURE 5 - NOISE VOLTAGE
FIGURE 6 -
875
750
1.50
1.25
-"
~ 625
~1.00
f-
~ 0.75
=>
~
100
125
RESPONSE TIME
/'-.
0-Inpul
J
100 k
./
00.50
~ 500
z
0
25
50
75
TA, AMBIENT TEMPERATURE I'C)
\
0.25
375
DUT'"
~PUI
-=
t---
~
i= 250
'\1'
125
~
10
~ 5.0
o
~
10
100
1.0 K
f, FREOUENCY 1Hz)
10 K
100 k
0
0.1
0.2
MOTOROLA LINEAR/INTERFACE DEVICES
5-6
0.3
0.6
0.7
I, TIMElms)
0.8
0.9
1.0
1.1
LM285, LM385
TYPICAL PERFORMANCE CURVES FOR LM28S-2_S/38S-2_S/38S8-2.S
FIGURE 7 -
REVERSE CHARACTERISTICS
FIGURE 8 -
REVERSE CHARACTERISTICS
100
:>
g
10
..'"
w
1.... 10
:z
u
i
:::>
'"~
...- TA
w
~
1.0 ~TA
h
+ 85°C
/'
>
w
0.1
~
0.5
1.0
1.5
2.0
2.5
VI BAl. AEVEASE VOLTAGE IVI
0.01
3.0
~
-40°C
_Llill
II
10
100
TEMPERATURE DRIFT
2.520
IA
...:. 0.4
TA
l-
~
t@
~ TA
~
100 p.A
- [--to-,
5>
1-':1----
I-I--f-
0.6
;:;:; 2.510
~
2.500
~
TA ~ -40o~......,
~
2.490
~
~
:i! 2.480
+85°C
"'~ 2.470
->
+25°C
2.460
1111
0.01
0.1
l1500
i--
2.45 0
1.0
10
IF, FOAWAAD CUAAENT ImAI
FIGURE 11 -
100
-50
NOISE VOLTAGE
75a
~
50a
0
25
50
75
TA, AMBIENT TEMPERATUAE lOCI
FIGURE 12 -
r-- t-1"-
~
2.00
....~ 1.50
100
125
RESPONSE TIME
,...
.00-
Input
J
100 k
~
§ 1.00
~ 1000
5
-25
3.00
2.50
~ 1250
w
TA
1.0
lA, AEVEASE CUARENT (mAl
:>
§Z 0.8
:z
0.1
FIGURE 10 -
1.2
o
~ Fi='"
0
FORWARD CHARACTERISTICS
:>
~ 1.0
0.2
2.0
i"'
40°C
V
~ +25°C~
-2.0
a
FIGURE 9 -
>
~
~
TA
~
TA
1/
+85°C
4.0
'"
'"
. / ./
+ 25°C
~
6.0
0
.!F
'"
~
TA
w
u
ffi
8.0
:>:
1\
0.50
DUT~ ~ Output
-=
..... t---
l\
\,
~
10
~
5.0
0
....
25a
~
0
10
100
1.0 K
f, FAEQUENCY IHzl
10 K
0.1
100 K
0.2
MOTOROLA LINEAR/INTERFACE DEVICES
5-7
0.3
0.6
OJ
t, TIMElmsl
0.8
0.9
1.0
1.1
II
II
®
MCl403,A
MC1503,A
MOTOROLA
LOW VOLTAGE REFERENCE
PRECISION LOW VOLTAGE
REFERENCE
A precision band-gap voltage reference designed for critical
instrumentation and D/A converter applications. This unit is
designed to work with Motorola MC150B and MC3510 D/A converters, and MC14433 AID systems. Low temperature drift is a
prime design consideration.
LASER TRIMMED
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Output Voltage: 2.5 V ± 25 mV
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
• Input Voltage Range: 4.5 V to 40 V
• Quiescent Current: 1.2 rnA Typ
• Output Current: 10 rnA
•
• Temperature Coefficient: 10 ppml"C Typ
• Guaranteed Temperature Drift Specification
8
l'
• Equivalent to AD5BO
"'"0"°
• Standard B-Pin DIP, and B-Pin SDIC Package
Typical Applications
V out 2
• Voltage Reference for B-12 Bit D/A Converters
• High Stability Current Reference
6
NC 4
• Voltmeter System Reference
Symbol
Value
Unit
VI
40
-65 to 150
+175
V
°c
°c
MC1503U
MCI503AU
MCI403D
-55 to +125
o to +70
°c
°c
MCI403U
MCI403AU
Input Voltage
Tstg
TJ
TA
MC1503,A
MCI403,A
NC
5 NC
ORDERING INFORMATION
MAXIMUM RATINGS IT A = 25°C unless otherwise noted.)
Storage Temperature
Junction Temperature
Operating Ambient Temeprature Range
7 NC
Gnd 3
• Low TC Zener Replacement
Rating
~
DSUFFIX
_ PLASTIC PACKAGE
CASE 751-02
SO-8
Device
Temperature
Range
-5510 + 125°C
Package
Ceramic DIP
Ceramic DIP
80-8
oto
+70°C
Ceramic DIP
Ceramic DIP
FIGURE 1 - A REFERENCE FOR MOTOROLA MONOLITHIC D/A CONVERTERS
Full·
--'I
I
1.0 k
I
I
Pin Numbers for
+6.0V
MCI50811408I3408
Series; device
16
1.2 k
R3
I
could also be
I
L ____ _
MC351013410
I
__..J
mended to provide means for full-scale adjust on the DI
A converter.
The resistor R3 improves temperature performance by
matching the impedance on both inputs of the D/A reference amplifier. The capacitor decouples any noise present
on the reference line. It is essential if the D/A converter is
located any appreciable distance from the reference.
A single MCl403I1503 reference can provide the required
current input for up to five ofthe monolithic D/A converters.
PROVIDING THE REFERENCE CURRENT
FOR MOTOROLA MONOUTHIC D/A CONVERTERS
The MC1403/1503 makes an ideal reference for the
Motorola monolithic D/A converters. The MC1408/1508,
MC3410/3510 and MC3408 D/A converters all require a
stable current reference of nominally 2.0 mAo This can be
easily obtained from the MCl403/1503 with the addition
of a series resistor, Rl. A variable resistor, R2, is recom-
MOTOROLA LINEAR/INTERFACE DEVICES
5-8
MC1403,A, MC1503,A
ELECTRICAL CHARACTERISTICS (Vin
Characteristic
Output Voltage
=
15 V, TA
= 25°C
unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
VOUT
2.475
2.50
2.525
V
-
-
55
25
10
10
40
(iO=OmA)
Temperature Coefficient of Output Voltage
Output Voltage Change
ppm/DC
IOVo/IOT
MC1503
MC1503A
MC1403
MC1403A
25
mV
IOVO
(over specified temperature range)
MC1503
} -55°C to +1250 C
MC1503A
MC1403
} OOC to + 700 C
MC1403A
-
-
-
-
25
11
7.0
4.4
-
1.2
0.6
4.5
3.0
-
10
mV
1.2
1.5
mA
Line Regulation (10 = 0 mAl
(15V"'V,"'40V)
(4.5 V '" V, '" 15 V)
Regline
Load Regu latian
Regload
-
IQ
-
mV
(OmA51.0
75°C
30
9.0
~ 8.0
;0
c5
oJ G- r--
-I
~
w
~
250G
:;
>
10
I
- -- -
-.....--
f.--
f.----
1.0
2.0
r--
OOG-
r--
25 0 G
r--
I--
I-- :..--r-o
75 0 G
3.0
Vin' INPUT VOLTAGE (VOLTS)
4.0
5.0
6.0
7.0
8.0
9.0
10
lout, OUTPUT CURRENT ImA)
FIGURE 5 - QUIESCENT CURRENT versus TEMPERATURE
(Vin = 15 V. lout = 0 mAl
FIGURE 6 - CHANGE IN Vout versus TEMPERATURE
(NORMALIZED TO Vout@Vin = 15 VI
1.25
Vin=5.0~_
1.
1.20
2.Vin=15V
:;(
.§ 1.15
lout= 2 rnA
....
iii
~
1.10
=>
---
,..V
u
~ 1.05
~ 1.00
>
~
............
w
..........
i"-..
::;
~0.95
#
~r-...
I~
.} -8.0
-1
".
-I 0
0.90
-I 2
o
-75
~
.....-:::::
-2.0
~ -4.
01/"
~
c..::. -6.0
2
-50
-25
25
50
75
100
125
150
-14
-75
175
-50
~
-25
TA, TEMPERATURE lOG)
FIGURE 7 - CHANGE IN Vout versus TEMPERATURE
(NORMALIZED TO TA = 10. Vin = 15 V. lout = 0 mAl
4.0
2.0
~ ::::--...
~~
~
-4.0
z
~
-6.0
~0
~~
~
~
\r-
.} -~.O
10 = 0 mA
I
= 2.0 mA
=5.0mA
= 8.0 mA
±6%
• Wide Input Voltage Range: Vref
+ 2.5 V to 40 V
.~
• Low Quiescent Current: 1.25 mA Typical
• Temperature Coefficient: 10 ppmfC Typical
• Low Output Noise: 12 /LV p-p Typical
• Excellent Ripple Rejection: > 80 dB Typical
1
U SUFFIX
CERAMIC PACKAGE
CASE 693·02
TYPICAL APPLICATIONS
• Voltage Reference for 8 - 12 Bit D/A Converters
• Low TC Zener Replacement
• High Stability Current Reference
• MPU D/A and AID Applications
NC
NC
FIGURE 1 -
Voul
VOLTAGE OUTPUT 8-81T DAC USING MC1404U10
TRIM
+5.0
+15
13
"
MSB
MC1408
5.0k
MC1404U10
15
0.05
5.0k
ORDERING INFORMATION
-::
PACKAGE Ceramic DIP
Device
':'
CMOS
I
Temperature Range
5.0 Volts
or TIL
Inputs
MC1504U5
MCl404U5
MC1404AU5
10
LBB
6.25 Volts
,.
"
- 55'C to + l25'C
O'C to +70'C
O'C to +70'C
0 ••
+10 Volts
MC1504U6
MCl404U6
MC1404AU6
- 55'C to + l25'C
O'C to +70'C
O"C to +70'C
10 Volts
-1.
MC1504Ul0
MCl404Ul0
MC1404AU10
MOTOROLA LINEAR/INTERFACE DEVICES
5-12
- 55'C to + l25"C
O"C to +70"C
O"C to +70'C
MC1404,A, MC1504
MAXIMUM RATINGS
Rating
Symbol
Value
Input Voltage
Vin
40
V
Storage Temperature
Tstg
-65 to +150
°C
Junction Temperature
TJ
+175
°C
Operating Ambient Temperature Range
TA
-55 to +125
o to +70
°C
°C
MCI504
MCI404.A
Unit
ELECTRICAL CHARACTERISTICS IVin = 15 Volts. TA = 250 C and Trim Terminal not connected unl ... otherwi.e noted)
Characteristic
Symbol
Output Voltage
Ilo=OmA)
Min
MCI404,A
Typ
Max
Min
MCI504
Typ
Max
MC1404U5. AU5IMCl504U5
MCl404U6, AU6IMC1504U6
MC1404Ul0. AU10/MC1504Ul0
Output Voltage Tolerance
Output Trim Range (F igure 10)
Unit
Volt
Va
-
-
5,00
6,25
10
±O.1
± 1.0
-
±O.1
5,05
6,31
10.10
±1.0
AVTRIM
±6,0
-
-
±6,0
-
-
-
10
10
40
25
-
-
55
4,95
6,19
9,90
5,05
6.31
10.10
4,95
6.19
9,90
5,00
6,25
10
%
%
IRp = 100 kn)
Output Voltage Temperature Coefficient,
ppm/oC
AVo/AT
Over Full Temperature Range
MCI404. MC1504
MC1404A
Maximum Output Voltage Change
-
mV
AVo
Over Temperature Range
MC1404U5. MC1504U5
MC1404AU5
MCI404U6. MC1S04U6
MC1404AU6
MCI404Ul0. MC1S04Ul0
MC1404AU10
Line Regulation (1)
-
-
-
-
-
-
Regline
-
2,0
14
9.0
17,S
II
28
18
6,0
-
-
62
-
-
99
-
-
-
2.0
6.0
mV
10
-
10
mV
mA
~
50
-
-
IVin = Vout + 2.5 V to 40 V. lout = 0 mAl
Load Regulation (1)
10 .. 10 .. 10 mAl
Regload
Quiescent Current
lIo=OmA)
10
-
1.2
1.5
-
1.2
1.5
Short Circuit Current
Long Term Stability
Ise
-
20
30
30
mA
-
25
-
-
-
-
25
-
ppm/l000 hrs
Max
Unit
-
ps
Note 1: Includes thermal effects.
DYNAMIC CHARACTERISTICS IVin = IS V. TA = 2SoC all voltage ranges unless otherwise noted)
MC1404,A
Typ
Max
MCI504
Symbol
Min
Turn-On Settling Time
Ito ±0.01%)
ts
-
50
-
-
TVp
50
Output Noise Voltage - P to P
(Bandwidth 0.1 to 10 Hz)
Vn
-
12
-
-
12
Small-Signal Output Impedance
120 Hz
ro
-
0,15
0.2
-
-
70
80
-
-
0.15
0,2
70
80
Characteristic
pV
n
500 Hz
Power Supply Rejection Ratio
Min
PSRR
-
MOTOROLA LINEAR/INTERFACE DEVICES
5-13
-
-
-
dB
II
MC1404,A MC1504
TYPICAL CHARACTERISTICS
FIGURE 3 - LINE REGULATION versus TEMPERATURE
FIGURE 2 - SIMPLIFIED DEVICE DIAGRAM
2.5
:>
5
v out
.,'"
/'"
0
R
:5
1.5
w
1.0
"~
5.0 k
TRIM
'"3
II
R
Vo
3.75 k
5.0 V
5.0 k
6.25 V
10V
8.75 k
?J'
-
2.0
/
~
~.
'"
Yin = V,ef + 2.5Vlo40V
loul = OmA
0.5
1.25 k
-75
-50
-25
+25
+50
+75
+100
+125
TA. AMBIENT TEMPERATURE IOC)
FIGURE 4 - OUTPUT VOLTAGE versus TEMPERATURE
MC1404Ul0
FIGURE 5 - LOAD REGULATION versus TEMPERATURE
0.010
§
~
o
10.04
;(
~
O.OOB
10.02
~
0.006
~
0
0.004
,/"
9.98
....
5
9.96
J
9.94
.,
-.... ...........
10.00
>
:5
.-
~
""'"
'"g
~
"V
-50
FIGURE 6 - POWER SUPPLY REJECTION RATIO
vorsusFREQUENCY
1.6
~i:1
60
~
It:
50
!Ii
40
~
",'
'"
~
---- -
;(
70
~
'"
1.4
80
z
o
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE IOC)
51.2
....
;~~
-.
HP2D9A
3V RMS
0
20
0.01
~
"
::
+
12
f1.3V SttNo~lto
OUT
-""1111 20ValtsAVln~lI-=-
0.1
I--
1.0
0.8
~w
SOO"F
'"" :',
1.0
4
.. 0.6
Vin=15V
"
lout"'OmA
~ 0.4
•~
HP3400A
O. 2
1111
10
100
+100
+125
FIGURE 7 - QUIESCENT CURRENT versus TEMPERATURE
90
o
Load Change ato 10 mA
0.002
~
-50 -25
0 +25 +50 +75 +100 +125
TA. AMBIENT TEMPERATURE IOC)
5
r--
f.--
1000
-50 -25
+25 +50 +75 +100 +125
TA. AMBIENT TEMPERATURE IOC)
f. FREnUENCY 1kHz)
MOTOROLA LINEAR/INTERFACE DEVICES
5-14
MC1404,A, MC1504
FIGURE 9 - VTEMP OUTPUT versus TEMPERATURE
FIGURE 8 - SHORT CIRCUIT CURRENT versus TEMPERATURE
1.0
40
.-
:;? 35
~
5
5 30
-
~
~ 25
~
Vin
~ 20
c::; 15
w
or
~
-~
0.6
=>
r-- t--
I-
g 0.4
I--
~
\;:
o
0.8
!;
15 V
0
I-- t=..
>-
=::
>-
-
--
f..--
J
1:5 0.2
>>
5.0
-50
-50 -25
+25 +50 +75 +100 +125
TA. AMBIENT TEMPERATURE (oG)
FIGURE 10 - OUTPUT TRIM CONFIGURATION
--
l
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE (oG)
+100
+125
FIGURE 11- PRECISION SUPPLY USING MC1404
r-----------~>----oV+
+15 V
12
330
Vin
Vo
6
Output
MC1404
5
TRIM
Rp
100 k
0.01 pF
5.0,6.25,
10 V @ 1/2 Amp
Gnd
Vin
1
-.l
.,.--
'VTEMP" 10 nA
0.
10
-
f-
6
Vor--------*---o
MC1404
Output Adjustment
Output Power Boosting
Gnd
The MC14Q4 trim terminal can be used to adjust the output
4
voltage over a ±6% range, For example, the output can be set to
10.000 V or to 10.240 V for binary applications. For trimming,
Bourns type 3059, 100 kn or 200 kSl trimpot is recommended,
Although Figure 10 illustrates a wide trim range, temperature
coefficients may become unpredictable for trim> ±6.0%.
The addition of a power transistor, a resistor, and a capacitor
converts the MC14Q4 into a precision supply with one ampere
current capability. At V+ = 15 V, the MC1404 can carry in excess
of 14 mA of load current with good regulation. If the power
transistor current gain exceeds 75. a one ampere supply can
be realized.
FIGURE 12 - ULTRA STABLE REFERENCE FOR MC1723 VOLTAGE 'REGULATOR
Supply
8(12)
7(11)
MC1723G
(MC1723L or P)
3(5)
2(4)
'-+--..--v.J'v--.--o V out
RO + 4.7 k)
V out =5.0V ( ~
lomax
4.7 k
MOTOROLA LINEAR/INTERFACE DEVICES
5-15
Jl::$
V
°A.:c
II
MC1404,A, MC1504
FIGURE 13 - 5.0 V, 6.0 AMP, 25 kHz SWITCHING REGULATOR WITH SEPARATE UL TRA-5TABLE REFERENCE
+1Qto +30 In
120}JH
+5.0 Out
_--;o-rY~n.--;o--_--;o--~~
200 mA to
6.0 Amps
(Low ESR)
130
Motorola
11
'2
17
II
Pulse Width
I-~--t--+-.--(,
18
2.2 k
Modulator
MC1404U5
100 k
TRIM
(opt)
'0
4
2,2 k
FIGURE 14 - HIGH SPEEO a·BIT O/A CONVERTER USING MCI404Ul0
IFS is set to 51.000 mA with Rl
V out
= , .25
V FS Settling Time,
Typically 10 ns
Inputs are
MECL 10K
Compatible
4
11
f-J...-=
0.01 IJ.F
Bradley
I
D.'
115 V
(12.5 to 40.0 V max)
IJF
Type RT
8
Cermet Trimpot
or Equivalent
MC'404U,O
10 Volt Reference
• R2 and A3 are
50 ppm/cC.
r'
MOTOROLA LINEAR/INTERFACE DEVICES
5-16
®
TL431,A
Series
MOTOROLA
Specifications and Applications Information
PROGRAMMABLE
PRECISION REFERENCES
PROGRAMMABLE PRECISION REFERENCES
SILICON MONOLITHIC
INTEGRATED CIRCUITS
The TL431,A integrated circuits are three-terminal programmable shunt regulator diodes_ These monolithic IC voltage references operate as a low temperature coefficient zener which is
programmable from Vref to 36 volts with two external resistors_
These devices exhibit a wide operating current range of 1_0 to
100 mA with a typical dynamic impedance of 0.22 fl. The characteristics of these references make them excellent replacements
for zener diodes in many applications such as digital voltmeters,
power supplies, and op amp circuitry. The 2.5 volt reference
makes it convenient to obtain a stable reference from 5.0 volt
logic supplies, and since the TL431,A operates as a shunt regulator, it can be used as either a positive or negative voltage
reference.
PLA~~I~~~~AGE/
CASE 29-04
Pm' Reference
2 Anode
3. Cathode
Programmable Output Voltage to 36 Volts
Voltage Reference Tolerance: ± 1.0% (TL431,A)
Low Dynamic Output Impedance, 0.22 fl Typical
Sink Current Capability of 1.0 to 100 mA
Equivalent Full-Range Temperature Coefficient of 50 ppm/oC
Typical
• Temperature Compensated for Operation over Full Rated
Operating Temperature Range
• Low Output Noise Voltage
~
Cathode
Reference
(R)
(K)
8
1
+
:
08
(Top View)
Cathode
NC
NC
NC
IK)
Reference
2
7 NC
3
6
4
5 NC
JG SUFFIX
CERAM(C PACKAGE
CASE 693-02
R e f e r e n c e j - - - - - - - - - - - , Cathode
(R)
3
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
~~
•
•
•
•
•
1
2
Anode
~
1
I
I
I
Anode
IL __________ -1I
(A)
SYMBOL
1
Anode (A)
FUNCTIONAL BLOCK OIAGRAM
DSUFFIX
PLASTIC PACKAGE
CASE 751-02
SOP-S
8~'
PIN 1.
2.
3.
4.
CATHODE
ANODE
ANODE
N.C.
5.
6.
7.
8.
N.C.
ANODE
ANODE·
REFERENCE
SOP·8 is an internally modified SO..a Package. Pins
2, 3, 6 and 7 are electrically common to the die
Cathode (K)
attach flag. This internal lead frame modification
decreasea package thermal resistance and
increases power dissipation capabilitv when
appropriately mounted on a printed circuit board.
SOP-8 conforms to aU external dimensions of the
Reference
standard SO-8 Package.
(R)
ORDERING INFORMATION
" Temp• •ture
Devl..
INTERNAL SCHEMATIC
Component valu•• are nominal
Anode (A)
.......,.
010 + 7O"C
Plastic
TL431 CP,ACP
010 + 7O"C
Plastic DIP
TL431CD,ACO
010+70"<:
SOP-8
TL431CJG
010 + 7O"C
Ceramic DIP
Plastic
TL431ILP,AILP
-40 10 +85"<:
TL431IP,AIP
-40 10 +85"<:
Plastic DIP
TL431IJG
-40 10 +85"<:
Ceramic DIP
TL431MJG
-5510 +125"<:
Ceramic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
5-17
Rang.
TL431CLP,ACLP
II
TL431,A Series
MAXIMUM RATINGS (Full operating ambient temperature range applies unless otherwise noted.)
Rating
Cathode To Anode Voltage
Cathode Current Range, Continuous
Symbol
Value
VKA
37
Unit
V
IK
-100to +150
mA
mA
Reference Input Current Range, Continuous
Iref
-0.05 to + 10
Operating Junction Temperature
TJ
150
Operating Ambient Temperature Range
TL431M
TL431I, TL431AI
TL431C, TL431AC
TA
Storage Temperature Range
'C
'C
-55to +125
-40 to +85
o to + 70
-65 to + 150
Tsta
Total Power Dissipation @ TA = 25'C
Derate above 25'C Ambient Temperature
0, LP Suffix Plastic Package
P Suffix Plastic Package
JG Suffix Ceramic Package
Po
Total Power Dissipation @ TC = 25'C
Derate above 25'C Case Temperature
0, LP Suffix Plastic Package
P Suffix Plastic Package
JG Suffix Ceramic Package
Po
'C
W
0.70
1.10
1.25
W
1.5
3.0
3.3
THERMAL CHARACTERISTICS
Symbol
0, LP Suffix
Package
P Suffix
Package
JG Suffix
package
Unit
Thermal Resistance. Junction to Ambient
ROJA
178
114
100
'CIW
Thermal Resistance, Junction to Case
ROJC
83
41
38
'CIW
Symbol
Min
Max
Unit
VKA
Vrel
36
V
IK
1.0
100
mA
Characteristics
RECOMMENDED OPERATING CONDITIONS
ConditionNalue
Cathode To Anode Voltage
Cathode Current
ELECTRICAL CHARACTERISTICS (Ambient temperature at 25'C unless otherwise noted)
TL431 I
TL431M
Symbol
Characteristic
Relerence Input Voltage (Figure 1)
VKA = Vrel, IK = 10 mA
TA = +25'C
TA = Tlow to Thiah (Note 1)
Min
Typ
Max
Min
Typ
TL431C
Max
Min
Typ
Max
Unit
V
Vrel
2.440 2.495 2.550 2.440 2.495 2.550 2.440 2.495 2.550
2.396 2.594 2.410 2.580 2.423 2.567
Relerence Input Voltage Deviation Over
Temperature Range (Figure 1, Note 1,2,4)
VKA = Vrel, IK = 10 mA
LWrel
Ratio 01 Change in Relerence Input Voltage
to Change in Cathode to Anode Voltage
IK = 10 mA (Figure 2), b.VKA = 10 V to Vrel
b.VKA = 36Vto 10V
LWrel
t:NKA
Reference Input Current (Figure 2)
IK = 10 mA, R1 = 10 k, R2 = '"
TA = +25'C
TA = Tlow to Thiah (Note 1)
-
15
44
-
7.0
30
-
3.0
17
mVN
-
-1.4 -2.7
-1.0 -2.0
-
-1.4 -2.7
-1.0 -2.0
-
-1.4 -2.7
-1.0 -2.0
!iA
Irel
Reference Input Current Deviation Over
Temperature Range (Figure 2, Note 1,4)
IK = 10 mA, R1 = 10 k, R2 = '"
b.lref
-
Minimum Cathode Current For Regulation
VKA = Vrel (Figure 1)
Imin
-
Off·State Cathode Current (Figure 3)
VKA = 36 V, Vrel = 0 V
loff
Dynamic Impedance (Figure 1, Note 3)
VKA = Vrel, b.IK = 1.0 mA to 100 mA
I", 1.0 kHz
IZkal
mV
-
1.8
-
-
4.0
7.0
1.0
3.0
0.5
1.0
2.6
1000
-
0.22
0.5
-
-
-
4.0
6.5
-
1.8
-
4.0
5.2
0.8
2.5
-
0.4
1.2
!iA
0.5
1.0
-
0.5
1.0
mA
2.6
1000
-
2.6
1000
nA
0.22
0.5
-
0.22
0.5
n
1.8
MOTOROLA LINEAR/INTERFACE DEVICES
5-18
TL431,A Series
ELECTRICAL CHARACTERISTICS (Ambient temperature at 25°C unless otherwise noted)
TL431AI
Symbol
Characteristic
Reference Input Voltage (Figure 1)
VKA ~ Vref, IK ~ 10 mA
TA ~ +25°C
TA ~ Tlow to Thigh (Note 4)
Typ
TL431AC
Max
Min
Typ
Max
Unit
V
Vref
2.470 2.495 2.520 2.470 2.495 2.520
2.440 2.550 2.453 2.537
Reference Input Voltage Deviation Over
Temperature Range (Figure 1, Note 1,2)
VKA ~ Vref, IK ~ 10 mA
lNref
Ratio of Change ;n Reference Input Voltage
to Change in Cathode to Anode Voltage
IK ~ 10 mA (Figure 2), 6VKA ~ 10 V to Vref
6VKA ~ 36 Vto 10 V
6Vref
6VKA
Reference
II(" ~ 10
TA ~
TA ~
Min
Input Current (Figure 2)
mA, R1 ~ 10 k, R2 ~ x
+25°C
Tlow to Thiah (Note 1)
-
7.0
-
30
3.0
17
mV
mVN
-
-
-1.4 -2.7
-1.0 -2.0
-
-1.4 -2.7
-1.0 -2.0
pA
Iref
Reference Input Current Deviation Over
Temperature Range (Figure 2, Note 1)
IK ~ 10 mA, R1 ~ 10 k, R2 ~ x
61ref
-
Minimum Cathode Current For Regulation
VKA ~ Vref (Figure 1)
Imin
-
0.5
1.0
-
0.5
1.0
mA
Off-State Cathode Current (Figure 3)
VKA ~ 36 V, V ref ~ 0 V
loff
-
2.6
1000
-
2.6
1000
nA
Dynamic Impedance (Figure 1, Note 3)
VKA ~ Vref, 61K ~ 1.0 mA to 100 mA
f'" 1.0 kHz
IZkal
-
0.22
0.5
-
0.22
0.5
n
Note 1:
Tlow
-55"CforTL431MJG
-40"C for TL431AIP, TL431AILP. TL4311P. TL431ILP. TL4311JG
O"C for TL431ACP. TL431ACLP, TL431CP. TL431CLP. TL431CJG.
TL431CD, TL431ACD
~
Note 2:
Thigh
=
4.0
6.5
-
-
1.8
-
4.0
5.2
0.8
2.5
-
0.4
1.2
pA
:~~~~Cf~~~r~~~~~:~L431AILP. TL431IP, TL431ILP, TL4311JG
+ 70"C fer TL431ACP, TL431ACLP. TL431CP. TL431CLP, TL431CJG.
TL431CD, TL431ACD
Note 4:
This test is not applicable to surface mount (0 suffix) devices.
The deviation parameter LWref is defined as the differences between
the maximum and minimum values obtained over the full operating
ambient temperature range that applies.
FIGURE 1 - TEST CIRCUIT FOR VKA' V,ef
Vref M a X Q - - -6V re f= Vref Max
VrefMin
I
-VrefMin
:
6TA~T2-Tl
InpUlffVKA
IK
+
Tl
T2
AMBIENT TEMPERATURE
Vref
! "
The average temperature coefficient of the reference input volt~
age, 0' V,ef, is defined as:
(
ppm
a Vref
-
1.8
FIGURE 2 - TEST CIRCUIT FOR VKA
JX 106
6Vref
Vref@ 25°C
Input f i [ V K A
0C
Rl
crVref can be positive or negative depending on whether Vref
Min orVref Max occurs at the lower ambient temperature. (Refer to
Figure 6)
Example:
2.495 V, 6TA
~
-
= B.O mV and slope is positive, Vref @ 25°C =
Vref
70°C
"Vref
0.008 x 106
7012.495),45.8 ppm/oC
Note 3:
The dynamic impedance Zka is defined as: IZkal
tlK
'ref
R2
L:~.vref
> Vref
"
VKA~ Vref (1 +~)
+Iref· Rl
R2
FIGURE 3 - TEST CIRCUIT FOR loff
!!.V
Input~VKA
~~
~'~
61K
When the device is programmed with two external resistors, R1
and R2, (refer to Figure 2) the total dynamic impedance of the
circuit is defined as:
MOTOROLA LINEAR/INTERFACE DEVICES
5-19
II
•
TL431,A Series
FIGURE 5 - CATHODE CURRENT versus
CATHODE VOLTAGE
FIGURE 4 - CATHOOE CURRENT versus
CATHOOE VOLTAGE
15 0
-,--
80 0
VKA::; Vref
TA ° 25'C
0
VKA = Vref
TAo25'C
""'Er'
'-'""
11K
0
0
z
~
u
0
10
./
0
If
10
.s
co
FIGURE 7 -
REFERENCE INPUT VOLTAGE versus
AMBIENT TEMPERATURE
"'"·W""
"'"
~>
>-
25B o
K
256 o
Veel
254o
!
250 0
~
248 0 -
~
246 0
~
2440
I
Vref Max = 2550 mV
>-
--
I
I
I
I
-
242 0
~ 2_0I-------+__
-25
25
>-
~ 1.5f---+-----l--
1-I
~
~
1 .1
~o24tOmV-
75
50
100
IKo lOrnA
10- InpUI'b¥VKA
~
~
r---
I
-55
z
I
.~
Veel Typ - 2495 mV _
I
240 0
10 k
05
~IK
Ire!
--
OL-____L-__-L__~L---~----+-----L--~
125
-55
-25
TA. AMBIENT TEMPERATURE (OCI
0
'"
--,----
IK
IKolOmA
!
TA ° 25'C
'"".~""
~
RI
I'K
u
R2 Vref
..........
~
T
VKAo36V
100
.
100
I
./
loll
'"".~";""
10 -
o
o
'">-
~
;5
/"
0
~
4
75
nl
Vref::; 0 V
oc
oc
~
"
6
0
25
50
TA. AMBIENT TEMPERATURE
125
FIGURE 9 - OFF-STATE CATHODE CURRENT
ve
/
/
VKA. CATHOOE VOLTAGE (Vi
FIGURE 6 -
[7
._-
-20 0
-I 0
30
20
/
f---
'"
/ -10
-2.0
20 0
0
'">;5
/
-10 0
'"""T""f'
40 0
oc
Imin,
j IK
>-
/'
-5 0
60 0
V
/
/
v'
/
IV
~-3 2
-...----<> Vout
Range
*Thermalloy
THM 6024
-5.0 V
Rx::: Vout •
~
Range
MOTOROLA LINEAR/INTERFACE DEVICES
5-23
V+
>Vref
=2.0V
SIMPLE 400 mW PHONO AMPLIFIER
38 V
Tl
V out
20 megohm typo
°C
mW
mW/oC
< 112 LSB,
Full Range Current
(VREF= 10.000 V; R14, R15= 5.000 kll, TA= 25°C)
Full Range Symmetry IIFR4 - IFR21
-
±10
-
85
-
35
35
-
ns
ns
-
+18
-10
1.94
±1O
-
-
ppm/oC
+18
V
1.992
2.000
1.99
2.04
mA
±0.5
±4.0
-
±1.0
±8.0
~A
IZS
-
0.1
1.0
-
0.2
2.0
IORl
IOR2
0
0
-
2.1
4.2
0
0
-
2.1
4.2
VIL
VIH
-
0.8
-
-
2.0
-
0.8
2.0
-
IlL
IIH
-
-2.0
0.002
-
-2.0
0.002
-10
-
IFRS
Zero Scale Current
CAC-OBA
Typ
~A
mA
Output Current Range
V- = -5.0 V
V- = -8.0 V to -18 V
Logic Input I.evels (VLC - 0 VI
Logic '·0·'
Logic '·1·'
-
V
I
-10
10
10
+lB
-10
+13.5
-10
-
+13.5
V
-1.0
-3.0
-
-1.0
-3.0
~A
-
8.0
-
-
8.0
-
PSSIFS+
PSSIFS-
-
±0.0003
±0.002
±0.01
±0.01
-
±0.0003
±0.002
±0.01
±0.01
1+
11+
11+
1-
-
3.8
-5.8
3.8
-
2.3
-4.3
2.4
-6.4
2.5
-6.5
3.B
-5.8
3.B
-
2.3
-4.3
2.4
-6.4
2.5
-6.5
-
33
103
135
Logic Input Swing, V- - -15 V
VIS
-10
Logic Threshold Range, Vs = ±15 V
VTHR
-10
Reference Bias Current
115
di/dl
-
Reference Input Slew Rate Figure 19 (Note 1)
Power Supply Sensitivity (IREF = 1.0 mAl
V+=4.5Vto 18V
V- = -4.5 Vto -18 V
~A
Logic Input Current IVLC - 0 VI
Logic Input '·0" IVin = -10 V to +0.8 VI
Logic Input ·'1·· (Vin = +2.0 V to +18 VI
Power Supply Current
Vs = ±5.0 V, IREF = 1.0 rnA
-
+18
V
mAills
%/%
mA
Vs = +5.0 V, -15 V, IREF = 2.0 rnA
Vs =±15 V, IREF = 2.0 mA
Power Dissipation
Vs = ±5.0 V, IREF = 1.0 rnA
Vs = +5.0 V, -15 V,IREF = 2.0 rnA
Vs = ±15 V, IREF = 2.0 mA
-
-7.8
3.B
-7.B
-
-7.8
3.B
-7.B
mW
Po
48
136
174
Note 1. Parameter IS not 100% tested; guaranteed by deSign.
MOTOROLA LINEAR/INTERFACE DEVICES
6-6
-
33
108
135
48
136
174
DAC-08
ELECTRICAL CHARACTERISTICS (VS =
-+ 15 V
IREF
= 20 mA
TA
= O°C to 70°C
DAC-08H
Characteristic
Resolution
Monotonicity
Nonlinearity, TA
= O°C to
+ 70°C
Settling Time to ± 112 LSB
(All Bits Switched On or Off,
(TA = 25°C) Figure 24 (Note 1)
Propagation Delay, TA
Each Bit
All Bits Switched
= 25"C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
-
8
8
8
8
8
8
8
8
8
Bits
8
8
8
8
8
8
8
8
8
Bits
NL
-
±0.1
-
-
±0.39
%FS
85
-
-
-
ts
-
tpLH
tpHL
-
35
35
-
-
±10
TCIFS
Output Voltage Compliance
Full Scale Current Change
< 1/2 LSB,
Rout> 20 megohm typo
VOC
-10
Full Range Current
(VREF = 10.000 V;
R14, R15 = 5.000 kU)
TA = 25°C
IFR4
1.984
Full Range Symmetry (lFR4 - IFR2)
IFRS
Zero Scale Current
DAC-OBC
Symbol
(Note 1)
Full Scale Tempco
unless otherwise noted)
DAC-OBE
IZS
-
-
-
-
±0.19
85
-
-
85
-
35
35
-
-
-
35
35
-
-
±10
-
±10
-
ns
+18
-10
1.99
2.04
1.94
-
±1.0
±8.0
-
0.2
2.0
+18
-10
1.992
2.000
1.94
±0.5
±4.0
0.1
1.0
-
-
-
-
=
=
V
1.99
2.04
mA
±2.0
±16.0
p.A
0.2
4.0
= -
Logic Threshold Range, Vs
-
2.1
4.2
0
0
-
2.1
4.2
0
0
-
2.1
4.2
VIL
VIH
-
-
0.8
-
-
0.8
-
-
0.8
IlL
IIH
15 V
=
±15V
Power Supply Sensitivity
(lREF = 1.0 mAl
V+ = 4.5Vto 18V
V- = -4.5Vto -18V
=
+5.0 V, -15 V,IREF
Vs
=
±15 V,IREF
-
2.0
-
-
2.0
-
2.0
-
-
-2.0
-
0.002
10
-
+18
-10
+13.5
-10
-
-2.0
-
0.002
10
-
+18
-10
+13.5
-10
-3.0
-
VIS
-10
VTHR
-10
115
-
-1.0
dlldt
-
8.0
-10
-
-10
-1.0
-3.0
-
8.0
-
-2.0
-
0.002
-
-1.0
8.0'
-10
10
+18
V
+13.5
V
-3.0
p.A
-
mA/p.s
%1%
PSSIFS+
PSSIFS-
Power Supply Current
Vs = ±5.0 V,IREF = 1.0 mA
Vs
-
p.A
Reference Input Slew Rate
Figure 19 (Note 1)
1+
1-
= 2.0 mA
= 2.0 mA
1+
11+
1-
Power Dissipation
Vs = ±5.0 V,IREF = 1.0 mA
Vs = +5.0 V, -15 V, IREF = 2.0 mA
Vs = ± 15 V, IREF = 2.0 mA
IS
0
0
V
Reference Bias Current
Note 1. Parameter
IOR1
IOR2
= 0 V)
Logic Input Current (VLC = 0 V)
Logic Input "0"
(Vin = - 10 V to +0.8 V)
Lo!)ic Input "1"
(Vin = +2.0 V to + 18 V)
Logic Input Swing, V -
p.A
mA
-5.0 V
-8.OVto -18V
Logic Input Levels (VLC
Logic "0"
Logic "1"
ppml"C
+18
Output Current Range
VV-
ns
Po
-
-
-
-
-
±0.0003 ±0.Q1
±0.002 ±0.01
2.3
-4.3
2.4
-6.4
2.5
-6.5
3.8
-5.8
3.8
-7.8
3.8
-7.8
33
108
135
48
136
174
-
-
-
-
-
±0.0003 ±0.01
±0.002 ±0.01
2.3
-4.3
2.4
-6.4
2.5
-6.5
3.8
-25.8
3.8
-7.8
3.8
-7.8
33
108
135
48
136
174
-
-
±0.0003 ±0.01
±0.002 ±0.01
2.3
-4.3
2.4
-6.4
2.5
-6.5
3.8
-5.8
3.8
-7.8
3.8
-7.8
33
108
135
48
136
174
mA
mW
not 100% tested; guaranteed by deSign.
MOTOROLA LINEAR/INTERFACE DEVICES
6-7
-
-
OAC-08
TYPICAL PERFORMANCE CURVES
FIGURE 1 - FULL SCALE CURRENT versus
REFERENCE CURRENT
FIGURE 2 - REFERENCE AMP
COMMON MODE RANGE
3.2
5.0
2.8
;q 4.0
-
.s
....
~
3.0
./
./
13
....
::::>
:=
2.0
5
~
/'
1.0
V
TA = Tmin to Tmax
I
./ \
limit tor
./
V- = -15 V
;q 2.4
.s
....
2.0
z
'"
....::::>
v- = -5.0 V
V+=+15V
I
I
IREF = 2.0 rnA
1.2
:=
"'-limit for
~- = -5 OV
i
V-=-11 5V
1.6
'"
13
5
,I,
0.8
V
/"
r-- AlilBit' "on!
.........
TA = tmin 1.ITmax
All Bil' "On"
I
0.4
1.0
2.0
3.0
IREF, REFERENCE CURRENT ImAI
4.0
-14
5.0
-10
-6.0
-2.0
2.0
6.0
IREF = 1.0 rnA
-
1
IREF ='1.2 rnA
-
10
14
18
VI5, REFERENCE COMMON MODE VOLTAGE IVI
NOTE: Positive Common Mode Range is Always (V+) -1.5 V
II
FIGURE 3 - REFERENCE INPUT FREQUENCY RESPONSE
6.0
4.0
f--
2.0
r--
~
Ril = RI 15 = \
RL<;; 500 Il
AiliBits "On"
kh
,/
~
VRI5=OV
~ -2.0
a -4.0
~
""~
FIGURE 4 - LSB PROPAGATION DELAY versuslFS
500
-\
400
~
,\
'\
\2
\.1
-6.0
\
-8.0
~ 200
\
l\
-10
300
i§
;:::
J--ILSB - 61 nA
~
~
1\
'-
100
I LSB = 7.8
II "
-12
o
-14
0.2
0.1
Curve 1 Curve 2 -
Cc
Cc
0.5
1.0
2.0
f. FREaUENCY (MHzI
5.0
0.005 0.01
10
0.02
2.0
1.6
....
in
1li
~
",
~
9
1.2
;t.
1.0
1.0
;
I
I
-12
-8.0
-4.0
0.8
0.6
0.4
0.2
I
o
1.4
c
~
4.0
a;
10
-- -- --
1.8
;q
3 6.0
u
I
5.0
FIGURE 6 - VTH ,VLC versus TEMPERATURE
8.0
'"
....::::>
0.05 0.1
0.2
0.5 1.0
2.0
IFS, OUTPUT FULL SCALE CURRENT (mAl
=15 pF, Vin =2.0 V p-p Centered at +1.0 V (Large-Signal)
=15 pF. Vin = 50 mV p-p Centered at +200 mV (Small-Signal)
FIGURE 5 - LOGIC INPUT CURRENT versus
INPUT VOLTAGE
'"
13
~A
4.0
8.0
12
16
20
-50
-25
LOGIC INPUT VOLTAGE (VI
MOTOROLA LINEAR/INTERFACE DEVICES
6-8
25
50
TEMPERATURE (OCl
75
100
125
DAC-08
TYPICAL PERFORMANCE CURVES
FIGURE 7 - OUTPUT CURRENT versus
OUTPUT VOLTAGE
(Output Voltage Compliance)
FIGURE 8 - OUTPUT VOLTAGE COMPLIANCE
versus TEMPERATURE
3.2
20
-
2.8
I
I
f- All 8its "On" 1
TA:::: Tmin to Tmax
;< 2.4
.S
i
V-; -15 V
2.0
I
I
12
~
'"
'"
I
I
0-
=>
1.2
~
0=>
0.8
16
IREF ; 2.0 mA
V- ; -5.0 V
I
1.6
I
I
~
I
>
0
I
0.4
4.0
IREF .; 2.0 mA
For Other V- Dr IREF. See Figure 7.
~
IREF; 1.0 mA-
-
Shaded Area Indicates Permissable
Output Voltage Range lor V- ; -15 V.
0-
0
I
8.0
-4.0
I
IREF ; 0.2 mA-
-8.0
o
-12
-14
-6.0
-10
-2.0
2.0
6.0
10
14
18
-50
-25
25
50
TEMPERATURE (OCI
OUTPUT VOlTAGE IV)
r-
7.0
IREF ; 2.0 mA
;<
.s
0-
=>
~
':;
0
-
All Bits "Higlh" or ..
low"
1-
.§. 6.0
81
;< 1.0
i
125
8.0
1
1.2
100
FIGURE 10 - POWER SUPPLY CURRENT versus V+
FIGURE 9 - BIT TRANSFER CHARACTERISTICS
1.4
75
0.8
~_
5.0
>-
4.0
B
~
0.6
82
~
83
~
3,0
1+
~
0.4
V-
0.2
15 V
V
)/1
V -
5.0 V
1.0
84
N
1
2.0
o
85
-12-10-8.0-6.0-4.0-2.00 2.04.06.08.0 10 12 14 16 18
LOGIC INPUT VOLTAGE (V)
o
2.0
4.0
6.0
8.0
10
12
14
V+. POSITIVE POWER SUPPLY (Vdcl
16
18
20
NOTE: 81-88 have identical transfer characteristics. Bitsarefullyswitched
with less than 1 12 LSBerror, at less than ±100 mV from actual
threshold. These switching points are guaranteed to lie between
0.8 V and 2.0 V over operating temperature range (VLC = 0 VI.
FIGURE 12 - POWER SUPPLY CURRENT
verlul TEMPERATURE
FIGURE 11 - POWER SUPPLY CURRENT versus V8.0
8.0
Bits May Be "High" or "low"
7.0
.s
0-
~
'"
13
~
5.0
'"
~
2.0
~
15
lE
=>
...,
i'"
I
I
I
1- WIth IREF ; 0.2 mA_
...~
t'- 1+
1.0
-2.0
•
.s
...
1- with IREF ; 1.0 mA
4.0
3.0
;<
1:1=
6.0
iil
All Bits "High"
1- with IREF ; 2.0 mA
;<
-4.0
-6.0 -8.0 -10 -12 -14 -16
V-. NEGATIVE POWER SUPPLY (VIIt)
-18
7.0
Of
"Low"
IREF - 2.0 rnA
V-;-15V
1-
6.0
5.0
4.0
3.0
V+=+15V
1+
2.0
1.0
-20
-50
-25
25
50
TEMPERATURE (OC)
MOTOROLA LlNEARIiNTERFACE DEVICES
6-9
75
100
125
II
OAt-os
BASIC CIRCUIT CONFIGURATIONS
FIGURE 14 - POSITIVE LOW IMPEDANCE
OUTPUT OPERATION
FIGURE 13 - RECOMMENDED FULL SCALE
ADJUSTMENT CIRCUIT
--
Low T.C.
4.5 k
+10V
14
IREF~
39 k
OAC·08
~15
IFR~~
IREF
256
rnA
10 k
Pot
= 1.0V
If complementrv output (Negative Logic DAC) operation IS
desired, connect Inverting mput of ap amp to
(Pin 2) and
~
iQ
ground 10 (Pin 4)
FIGURE 15 - NEGATIVE LOW IMPEDANCE
OUTPUT OPERATION
FIGURE 16 - BASIC POSITIVE REFERENCE
OPERATION
MSB
B2
84
86
LS8
B8
10
)FR = 255 IREF
•
Lf---'r---r--r'
256
If complementry output (Negative logic DAC) is desired. connect noninverting input of op amp to fQ (Pin 2) and ground 10
(Pin 4)
O. 1pF
iO
10 +
~ IFR for
all logic states
FIGURE 17 - BASIC NEGATIVE REFERENCE
OPERATION
MSB
82
84
2 ...
'-----_--/
I
V+
+VREF
IFR= - - - x
RREF
VREF = + 10,000 V
RREF ~ 5.000 k
Rt5=RREF
10
R15
V·
r
O. 1pF
255
256
For fixed reference. TIL operation. typical values are
LSB
B6 B8
DAC·08
r
4-10
IQ
I
255
I FR~ -VREF
--- x-RREF
256
NOTE: RREF sets full scale current IFR; R15 is for bias current
cancellation.
MOTOROLA LINEAR/INTERFACE DEVICES
6-10
Cc = 0.01 ~ F
VLC " 0 V (Ground)
DAC-08
BASIC CIRCUIT CONFIGURATIONS
FIGURE 18 -
ACCOMMODATING BIPOLAR REFERENCES
+VREF
+VREF
IREF.
14
RREF
RREF
Von
~
14
Ajn
..,r
Von~
DAe-os
DAe-DS
15
R15
15
(Optional)
RREF= R15 +VREF must be above peak positive swing of Vin
IREF
~
Peak Negative Swing of lin
FIGURE 19 -
PULSED REFERENCE OPERATION
+VREF
9
Optional Resistor ~
for Offse' Inpu,s ~ RREF
ovJL
'
Rin
4--
Rp
Typical Values: Rin 5.0 k, +Vin :::: 10 V
Req =
~
FIGURE 20 -
BASIC UNIPOLAR NEGATIVE OPERATION
-
IREF
2.000 mA
14
':\
104
DAe-OS_
10 2
EO
5.000 k
)E"
0 5.000 k
-=
, , , , , , ,
,, , , ,
,,
B'
Full Range
Half Scale +lSB
Half Scale
Half Scale -LSB
Zero Scale + LSB
Zero Scale
0
0
0
B2 B3 B4 B5 B6 B7 B8 lornA lornA
EO
EO
1
1 1.992 0.000 -9.960 -0.000
0 0 0 0 0 0
1.008 0.984 -5.040 -4.920
0
0
0 0 0 0 0 1.000 0.992 -5.000 --4.960
1
1 1
0.992 1.000 -4.960 -5.000
0 0 0 0 0 0
0.008 1.984 -0.040 -9_920
0 0 0
0 0 0
0 0.000 1.992 0.000 -9.960
MOTOROLA LINEAR/INTERFACE DEVICES
6-11
•
•
DAC-08
BASIC CIRCUIT CONFIGURATIONS
FIGURE 21 - BASIC BIPOLAR OUTPUT OPERATION
EO
10 4~--o-'VVI,.--,
10.000k
IREF 0--_-----:----114
DAC-08
2.000 mA
-
2
10
>-
_
EO
10.000 k
,,0.000 V
Pos Full Range
Pos Full Range -LSB
Zero Scale +LSB
Zero Scale
Zero Scale -LSB
Neg Full Scale +LSB
Neg Full Scale
81
82 83 84 85 86 87 88
1
1
1
1
0
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
1
0
EO
EO
-9920 +10.000
-9840 • 9 920
-0.080 '0 160
0.000 '0.080
o 000
'0080
·9920 -9 840
9 920
·10000
FIGURE 22 - OFFSET BINARY OPERATION
10k
.15V
MSB
50 k
LSB
.15 V
5.000k
.10 V i-;;-----4.--'VIIV---1
MC1404Ul0 6
5.0k
EO
'15V
Pos Full Range
Zero Scale
Neg Full Scale '1 LSB
Neg Full Scale
81
1
1
0
0
82
1
0
0
0
-15V
83 84 85 86 B7 BB
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
EO
-4960
0.000
-4960
-5.000
MOTOROLA LINEAR/INTERFACE DEVICES
6-12
OAt-os
FIGURE 23 -
INTERFACING WITH VARIOUS LOGIC FAMILIES
15 V CMOS, HTL, HNIL
TTL,OTL
VTH
~
10 V CMOS
VTH ~ 5.0 V
7.6 V
VTH ~ +1.4 V
+10V
R
To
6.2 k
62 k
5.0 V CMOS
VTH ~ 2.8 V
10K ECl
VTH
~
-1.29V
l
lN4148
VLC
0.1 ~F
3.6k
1.3k
lN4148
lN4148
10k
lN4148
-S.OVto-lOV
3.9k
10 k
L---~I---o
NOTE Do not exceed negatIve logic Input range of DAC
VTH :: VLC
+
14 V
MOTOROLA LINEAR/INTERFACE DEVICES
6-13
-5.2 V
II
DAC-08
FIGURE 24 - SETTLING TIME MEASUREMENT CIRCUIT
For Turn "On", VL = 2.7 V VL
For Turn "Off", VL = 0.7 V
+5.0V
0.1 pF
Mmlmum
1 kU
Capacitance
IlOv
I
I-=
MBD501
02
2N2222A
Schottky Diodes
-----......
VLC
0.7 V 0--__----.
01
2N2222A
lkll
-=
V out
1 x Probe
-=
15kll
-15V
R15
O.OlpF
O.lpF
Waveforms
I
atVout
~L+~':V
~
I
OV
----'---0.4 V
+15V
-15V
NOTE: Oscilloscope bandwidth for settlmg time measurement
~ 50 MHz
MOTOROLA LINEAR/INTERFACE DEVICES
6-14
(Turn "On")
(Turn "Off")
®
MC1408
MC1508
MOTOROLA
Specifications and Applications
Information
EIGHT-BIT MULTIPLYING
DIGITAL-TO-ANALOG
CONVERTER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
EIGHT-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER
designed for use where the output current is a linear product
of an eight-bit digital word and an analog input voltage.
•
•
Eight-Bit Accuracy Available in Both Temperature Ranges
Relative Accuracy: ±0.19% Error maximum
(MC1408L8, MC1408P8, MC1508L8)
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
Seven and Six-Bit Accuracy Available with MC1408 Designated
by 7 or 6 Suffix after Package Suffix
•
Fast Settling Time - 300 ns typical
•
Noninverting Digital Inputs are MTTL and
CMOS Compatible
•
Output Voltage Swing - +0.4 V to -5.0 V
•
High·Speed Multiplying Input
Slew Rate 4.0 mAills
•
Standard Supply Voltages: +5.0 V and
-5.0 V to -15 V
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
,
FIGURE 2 - BLOCK DIAGRAM
FIGURE 1 - D·to·A TRANSFER CHARACTERISTICS
~
iii =-iii!
i
I-
Z
w
a:
a:
::J
u 1.
I::J
~
::J
a
-
II
I!!!!I
IC.!!!!I
i!!!!l_iii!!!
iiil!! i~
lIIIi
.'
1.
~
~-.-
(00000000)
1
i:!III
...
=
!!!!
I " 111
+
'-
III
:.
f
(1111111')
NPN Current
Source Pair
INPUT DIGITAL WORD
TYPICAL APPLICATIONS
•
Tracking A-to-D Converters
•
Audio Digitizing and Decoding
•
Successive Approximation A-to-D Converters
•
Programmable Power Supplies
•
2 1/2 Digit Panel Meters and DVM's
•
Analog·Digital Multiplication
•
Waveform Sy nthesis
•
Sample and Hold
•
•
Peak Detector
Programmable Gain and Attenuation
•
•
•
Digital-Digital Multiplication
Analog-Digital Division
Digital Addition and Subtraction
•
CRT Character Generation
•
•
Speech Compression and Expansion
Stepping Motor Drive
MOTOROLA LINEAR/INTERFACE DEVICES
6-15
II
MC1408, MC1508
MAXIMUM RATINGS (TA = +25 0 C unless otherwise noted.)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+5.5
-16.5
Vdc
Digital Input Voltage
V5 thru V12
o to +5.5
Vdc
Applied Output Voltage
Vo
+0.5,-5.2
Vdc
Reference Current
114
5.0
mA
V14,V15
VCC,VEE
Vdc
Reference Amplifier Inputs
Operating Temperature Range
°c
TA
MC1508
MC140S Series
-55 to +125
Oto+75
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (VCC = +5.0 Vdc, VEE = -15 Vdc,
MC1408L Series: TA =
~5
T stg
Vref
R14
to +150
°c
= 2.0mA, MC150SLS: TA = -55°C to +125 0 C.
0 to +75 0 C unless otherwise noted. All digital inputs at h'lgh logic leveL)
Characteristic
Relative Accuracy (Error relative to full scale 10)
Figure
Symbol
4
Er
MC150SLS, MC140SLS, MC140SPS
MC140SP7, MC140SL7, See Note 1
MC140SP6, MC140SL6, See Note 1
Min
Typ
Max
-
±0.19
±0.39
±0.7S
Unit
%
-
-
Settling Time to within ±1/2 LSS[includes tPLH](TA-+250C)See Note 2
5
ts
-
300
-
ns
Propagation Delay Time
5
tpLH,tpHL
-
30
100
ns
TCIO
-
- 20
-
PPM/oC
VIH
VIL
2.0
-
-
O.S
IIH
IlL
-
0
-0.4
0.04
-O.S
-
-1.0
-5.0
TA=+25 0 C
Output Full Scale Current Drift
Digital Input Logic Levels (MSB)
High Level, Logic "1"
Low Level, Logic "0"
3
Digital Input Current (MSB)
3
High Level, VIH = 5.0 V
Low Level, VI L = O.S V
Vdc
mA
Reference Input Bias Current (Pin 15)
3
115
Output Current Range
3
lOR
VEE = -5.0 V
VEE = -15 V, TA = 25°C
Output Current
Vrel
~
3
3
10(min)
3
Vo
IlA
mA
0
0
2.0
2.0
2.1
4.2
1.9
1.99
2.1
-
0
4.0
-
-
-0.55, +0.4
-5.0, +0.4
mA
10
2.000 V, R14 = 1000 n
Output Current
-
IlA
(All bits low)
Output Vol tage Campi iance (E r :5 0.19% at T A ,::; +25 0 C)
Pin 1 grounded
Pin 1 open, VEE below-10V
Reference Current Slew Rate
SR Irel
-
4.0
-
mAillS
PSRR(-)
-
0.5
2.7
IlAIV
3
ICC
lEE
-
+13.5
-7.5
+22
-13
mA
3
VCCR
VEER
+4.5
-4.5
+5.0
-15
+5.5
-16.5
Vdc
3
PD
6
Output Current Power Supply Sensitivity
Power Supply Current
(All bits low)
Power Supply Voltage Range
(TA = +25 0 C)
Power Dissipation
All bits low
Vdc
mW
VEE = -5.0 Vdc
VEE = -15 Vdc
-
105
190
170
305
All bits high
VEE = -5.0 Vdc
VEE = -15 Vdc
-
90
160
-
Note 1.
Note 2.
-
All current sWitches are tested to guarantee at least 50% of rated outPUt current.
All bits switched.
MOTOROLA LINEAR/INTERFACE DEVICES
6-16
MC1408, MC1508
TEST CIRCUITS
FIGURE 3 - NOTATION OEFINITIONS TEST CIRCUIT
Vee
Typical Values:
R14 = A1S "" 1 k
Vref '" +2.0 V
C
'14
=
15 pF
VI and " apply to inputs A 1
1 4 _ R14
Digital
Inputs
thru AS
ro--'V"f'~....._Vref (+)
Al
A2
The resistor tied to pin 15 is to temperature compensate the
A3
bias current and may not be necessary for all applications.
A4
AS
10
Vo
f-'-o----""O-_Output
A6
A7
A8
~K{ ~
~
+
+
~
+
~:
+
~
+
~
+
:ia
+
~6 }
where K === V re!
R14
and AN "" "1" if AN isathigh level
AN ~ "0" if AN is at low level
FIGURE 4 - RELATIVE ACCURACY TEST CIRCUIT
MSB
Al
A2
12-Bit
A3
A4
AS
,---0-
r---o-
D-to-A
Converter
--0--- A7
+10 V Output
5'
r>- AS A9A1QA11
t~
LSB
A12
L~
t-J
950
R14
MSB 14
5
50'
~
~
0.1 uF
V re f==2V
100
a to
t±,O.02%
error max)
A6
~
,J
Error (1 v'" 1%)
6
7
8
8~Bit
Counter
MC1408 Series
MC150S
9
4
-0--
10
11
12
LSB
'~
15
lK
~
11
VEE
FIGURE 5 - TRANSIENT RESPONSE and SETTLING TIME
2.4 V
1.4 V
0.4
+2.0 Vdc
VF=+------,--F==
tPHL = tpLH <,0 ns
0.7 V
SETTLING TIME
-Intarnal
Clamp Lava'
• 0 for F igur. S
bc>--=:'--~"eo ~:::!I~:n~~me
TRANSIENT 0
+--I.!-------+lr--R-l c BO n
RESPONSE
-100
mV
MOTOROLA LINEAR/INTERFACE DEVICES
6-17
turn off
tS· 300 n. typical
to ±.1/2 LSB
(All bits switched
low to high)
VEE
u •• AI,. to GND for
ma••uramant (se.
pin 4 to GNO
te)(t) .
MC1408, MC1508
TEST CIRCUITS
(continued)
FIGURE 6 - REFERENCE CURRENT SLEW
RATE MEASUREMENT
vee
VEE
1
dl
II
dV
RL dt
dt
,o:zi\.90% / 0
~~---2.0mA
Slewing
Time
FIGURE 7 - POSITIVE V,e'
Vee
A1
f-C''<>---'''O--..-.... (+)
A2
V ref.r-t..
A3
A4
AS
A6
A7
AS
FIGURE 8 - NEGATIVE V,e'
Vee
13
R14:::: R15
A1
A14
A2
A3
f-!-"o-~-----=:"" (-J
Vref
A4
AS
A6
A7
AS
MOTOROLA LINEAR/INTERFACE DEVICES
6-18
MC1408, MC1508
FIGURE 9 - MCI408, MCI508 SERIES EQUIVALENT
CIRCUIT SCHEMATIC
DIGITAL INPUTS
MSB
5 A1
6
A2
7
A3
8
A4
9
10
A5
A6
11
A7
LSB
12 AS
3k
II
1
COMPENSATION
Vrefl-I
VEE
OUTPUT GND
RANGE
CONTROL
CIRCUIT DESCRIPTION
The MC1408 consists of a reference current amplifier, an
a low impedance termination of equal voltage for all legs of
R-2R ladder, and eight high-speed current switches. For many
appl ications, only a reference resistor and reference voltage need
be added.
the ladder.
The R·2R ladder divides the reference amplifier current into
binarily·related components. which are fed to the switches. Note
that there is always a remainder current which is equal to the
least significant bit. This current is shunted to ground. and the
maximum output current is 255/256 of the reference amplifier
current. or 1.992 mA for a 2.0 mA reference amplifier current
if the NPN current source pair is perfectty matched.
The switches are noninverting in operation, therefore a high
state on the input turns on the specified output current component.
The switch uses current steering for high speed, and a termination
amplifier consisting of an active load gain stage with unity gain
feedback. The termination amplifier holdstha parasitic capacitance
of the ladder at a constant voltage during switchiag, and provides
MOTOROLA LINEAR/INTERFACE DEVICES
6-19
II
MC1408, MC1508
GENERAL INFORMATION
Reference Amplifier Drive and Compensation
Aefer to the s.ubsequent text section on Settling Time for more
details on output loading.
If a power supply value between -5.0 V and -10 V is desired,
a voltage of between 0 and -5.0 V may be applied to pin 1. The
value of this voltage will be the maximum allowable negative output swing.
The reference amplifier provides a voltage at pin 14 for converting the reference voltage to a current, and a turn-around circuit
or current mirror for feeding the ladder. The reference amplifier
input current, 114, must always flow into pin 14 regardless of the
setup method or reference voltage polarity.
Connections for a positive reference voltage are shown in Figure
7. The reference voltage source supplies the full current 114. For
bipolar reference signals, as in the multiplying mode, R15 can be
Output Current Range
tied to a negative voltage corresponding to the minimum input
level. It is possible to eliminate R15 with only a small sacrifice
in accuracy and temperature drift. Another method for bipolar
inputs is shown in Figure 25.
The compensation capacitor value must be increased with increases in R14 to maintain proper phase rY1argin; for R14 values
of 1.0, 2.5 and 5.0 kilohms, minimum capacitor values are 15,
37, and 75 pF. The capacitor should be'tied to VEE as this increases negative supply rejection.
A negative reference voltage may be used if A 14 is grounded
and the reference voltage is applied to R15 as shown in Figure 8.
A high input impedance is the main advantage of this method.
Compensation involves a capacitor to Vee on pin 16, using the
values of the previous paragraph. The negative reference voltage
must be at least 3.0-volts above the Vee supply. Bipolar input
signals may be handled by connecting R14 to a positive reference
voltage equal to the peak positive input level at pin 15.
When a dc reference voltage is used, capacitive bypass to ground
is recommended. The 5.0-V logic supply is not recommended as
a reference voltage. If a well regulated 5.O-V supply which drives
logic is to be used as the reference, R 14 should be decoupled by
connecting it to +5.0 V through another resistor and bypassing
the junction of the two resistors with 0.1 ~F to ground. For
reference voltages greater than 5.0 V, a clamp diode is recommended between pin 14 and ground.
If pin 14 is driven by a high impedance such as a transistor
current source, none of the above compensation methods apply
and the amplifier must be heavily compensated, decreasing the
overall bandwidth.
The output current maximum rating of 4.2 mA may be used
only for negative supply voltages typically more negative than
-8.0 volts, due to the increased voltage drop across the 350-ohm
resistors in the reference current amplifier.
Accuracy
Absolute accuracy is the measure of each output current level
with respect to its intended value, and is dependent upon relative
accuracy and full scale current drift. Relative accuracy is the
measure of each output current level as a fraction of the full scale
current. The relative accuracy of the MC1408 is essentially
constant with temperature due to the excellent temperature tracking of the monolithic resistor ladder. The reference current may
drift with temperature, causing a change in the absolute accuracy
of output current. However, the MC1408 has a very low full
scale current drift with temperature.
The MC140S/MC1508 Series is guaranteed accurate to within ± 1/2 LSB at +25 0 C at a full scale output current of 1.992 rnA.
This corresponds to a reference amplifier output current drive to
the ladder network of 2.0 mA, with the loss of one LSB = S.O ~A
which is the ladder remainder shunted to ground. The input current
to pin 14 has a guaranteed value of between 1.9 and 2.1 mA,
allowing some mismatch in the NPN current source pair. The
accuracy test circuit is shown in Figure 4. The 12-bit converter
is calibrated for a full scale output current of 1.992 mAo This is
an optional step since the MC1408 accuracy is essentially the
same between 1.5 and 2.5 rnA. Then the MC1408 circuits' full
scale current is trimmed to the same value with R 14 so that a zero
value appears at the error amplifier output. The counter is activated
and the error band may be displayed on an oscilloscope, detected
by comparators, or stored in a peak detector.
Two a-bit D-to-A converters may not be used to construct a
l6·bit accurate D-to-A converter. 16-bit accuracy implies a total
error of ±1/2 of one part in 65, 536, or ±0.00076%, which is much
more accurate than the ±O.19% specification provided by the
MC1408x8.
Output Voltage Range
The voltage on pin 4 is restricted to a range of -0.55 to +0.4
volts at +25 0 C, due to the current switching methods employed
in the MC140S. When a current switch is turned "off", the positive voltage on the output terminal can turn "on" the output
diode and increase the output current level. When a current switch
is turned "on", the negative output voltage range is restricted.
The base of the termination circuit Darlington transistor is one
diode voltage below ground when pin 1 is grounded, so a negative
voltage below the specified safe level will drive the low current
device of the Darlington into saturation, decreasing the output
current level.
The negative output voltage compliance of the MC1408 may
be extended to -5.0 V volts by opening the circuit at pin 1. The
negative supply voltage must be more negative than -10 volts.
Using a full scale current of 1.992 mA and load resistor of 2.5
kilohms between pin 4 and ground will yield a voltage output
of 256 levels between 0 and -4.980 volts. Floating pin 1 does
not affect the converter speed or power dissipation. However, the
value of the load resistor determines the switching time due to
increased voltage swing. Values of R L up to 500 ohms do not significantly affect performance, but a 2.5-kilohm load increases
"worstcase" settling time to 1.21J.s (when all bits are switched on).
Multiplying Accuracy
The MC140S may be used in the multiplying mode with
eight-bit accuracy when the reference current is varied over a range
of 256: 1. The major source of error is the bias current of the
termination amplifier. Under "worst case" conditions, these eight
amplifiers can contribute a total of 1.6 ~A extra current at the
output terminal. If the reference current in the multiplying mode
ranges from 16 ~A to 4.0 mA, the 1.6 ~A contributes an error
of 0.1 LSB. This is well within eight-bit accuracy referenced to
4.0mA.
A monotonic converter is one which supplies an increase in
current for each increment in the binary word. Typically, the
MC140S is monotonic for all values of reference current above
0.5 rnA. The recommended range for operation with a de reference
current is 0.5 to 4.0 mAo
MOTOROLA LINEAR/INTERFACE DEVICES
6-20
MC1408, MC1508
GENERAL INFORMATION (Continued)
Settling Time
The "worst case" switching condition occurs when all bits are
The test circuit of Figure 5 requires a smatter voltage swingfor
the current switches due to internal voltage clamping in the MC1408. A 1.0-kilohm load resistor from pin 4 to ground gives
a typical settling time of 400 ns. Thus, it is voltage swing and not
the output RC time constant that determines settling time for
most applications.
Extra care must be taken in board layout since this is usually
the dominant factor in satisfactory test results when measuring
settling time. Short leads, 100 J.lF supply bypassing for low fre·
quencies, and minimum scope lead length are all mandatory.
switched "on", which corresponds to a low-ta-high transition for
atl bits. This time is typically 300 ns for settling to within ±'1/2
LSB, for B-bit accuracy, and 200 ns to 1/2 LSB for 7 and G-bit
accuracy.
The turn off is typically under 100 ns.
These times
apply when RL ~500 ohms and Co ~25 pF.
The slowest single switch is the least significant bit, which turns
"on" and settles in 250 ns and turns "off" in 80 ns. In applications where the D-to-A converter functions in a positive-going
ramp mode, the "worst case" switching condition does not occur,
and a settling time of tess than 300 ns may be realized. Bit A7
turns "on" in 200 ns and "off" in 80 ns, while bit A6 turns "on"
in 150 ns and "off" in 80 ns.
TYPICAL CHARACTERISTICS
(VCC
= +5.0 V,
VEE'" -15 V, TA '" +25 0 C unless otherwise noted.)
FIGURE 10 - LOGIC INPUT CURRENT versus INPUT VOL TAGE
FIGURE 11 - TRANSFER CHARACTERISTIC versus TEMPERATURE
(AS thru AS thresholds lie within range for A 1 thru A4)
1. 0
I
«
o. 8
6 1\
.5
~
\
4
'\.
Al.A1
.........
\
1~ t-!:..
O.
1--+1,150C'~.
0
~~
O. 6
'"9
0.4
\
1.0
3.0
4.0
Al
8f--
~ High L:vel
" +0.8
~
~",""
52
O.
8
O. 6
O. 4
-
0
-7.0
-6.0
-5.0
pin 1 open
VEE ~ -10 Vdc
/
-4.0
-3.0
A4
II
I
1.0
1.0
3.0
4.0
5.0
V
-2.0
/
"'-
f---+--+--+-+-+--+--+---j-----t--
~ +0.6t=~~?t~~~~~~~~~~~~t==t=
!:;
'">
I
O. 1
I
~ +0.4
u.i
~ +0.2r----;.fr:""'>17"""'4'S~_%>'77-WW71':""'~~ryr-_t--
Vo Range
for 8-bit
Accuracy
1
~ 1. 0
A3
+1.0
I
A2·A8 @ Low Level
1. 4
!;
i
I
FIGURE 13 - OUTPUT VOL TAGE versus TEMPERATURE
(Negative range with pin 1 open is -5.0 Vdc over full temperature range)
6
~
II
.
VI. LOGIC INPUT VOL TAGE (V,c)
FIGURE 12 - OUTPUT CURRENT versus OUTPUT VOL TAGE
(See text for pin 1 restrictions)
1. 0
A1
o
o
5.0
Al
1
O. 2
~
A4t1.0
I
I
1.0
0.8
VI. LOGIC INPUT VOLTAGE (Vdc)
'~"
/
~
~
- - r---
rc+250C------+----550C
~ -0.2 f-~1777::v:m
~ -0.4 f----;.4'S-'77'W:.70+S"7'S4'77'j"il'77'j7!7'77'2f<:""''''t----j---j
pin 1 grounded
-1.0
I
I
+1.0
~ -0.6 f----7+7'77';t7'n-:~....-f"'~'t----t----r---t---t--j
-0.8 f---"1=--t--t--+-t--t----i---t--t----j
-1.0 L--_:-:55L.-L.---':---...L-+-:'5':'O-...L-+-::l0~0:--'--+:-;1-;:50;;-....J
+1.0 +3.0
VO. OUTPUT VOLTAGE. PIN 4 (Vdc)
T. TEMPERATURE (oC)
MOTOROLA LINEAR/INTERFACE DEVICES
6-21
II
MC1408, MC1508
(Vee
TYPICAL CHARACTERISTICS Icontinued)
VeE = -15 V. T A = +25 0 C unless otherwise noted.)
= +5.0 V,
FIGURE 15 - TYPICAL POWER SUPPLY CURRENT
versus TEMPERATURE lall bits low)
FIGURE 14 - REFERENCE INPUT FREQUENCY RESPONSE
+S. 0
0
+6. 0
I
~
~
l-
ii'
I-
8
1/1\
+4. 0
+2. 0
/
8
6
r\
0
4
\
'"~ -2. 0
>
r-- r--
2
-
t--
A
~ -4. 0
,1\
0
C'\
~ -6. 0
-S. 0
1\
-1 0
-1 2
0.1
.0
lEE
.0
1\
1.0
.0
10
-55
+100
+50
+150
T, TEMPERATURE (OC)
I, FREQUENCY (MHz)
II
ICC
FIGURE 16 - TYPICAL POWER SUPPLY CURRENT
versus VEE (all bits low)
Unless otherwise specified:
0
R14= R15 = 1.0kH
C'" 15 pF, pin 16 to VEE
RL '" 50 n,pin 4 to GND
Curve A:
large Signal Bandwidth
4
ICC
2
Small Signal Bandwidth
Method of Figure 7 RL'" 250 n
Vref '" 50 mV(p-p) offset 200 mV above GNO
Curve C:
----
6~-
Method of Figure 7
Vref'" 2.0 V{p-p) offset 1.0 V above GNO
Curve B:
- --
8
0
0
Large and Small Signal Bandwidth
Method of Figure 25 (no op-ampl, RL '" 50 nJ
lEE
6. 0
RS=50!1
Vref= 2.0V
VS'" 100 mV(p·p) centered at 0 V
4. 0
-2.0
-4.0
-6.0
-8.0
-10
-12
-14
-16
-18
-20
VEE. NEGATIVE POWER SUPPLY (Vdc)
APPLICATIONS INFORMATION
FIGURE 17 - OUTPUT CURRENT TO VOLTAGE CONVERSION
Theoretical Va
Vo~ Vref(RO)[~+~+~+~+~+~+
MSB AI
R14
A2
A3
A4
A5
A6
2
4
Adjust Vref, R14 or RO so that
level is equal to 9.961 volts.
Vo
.
~
~
16
32
64
A7 + AS]
128
256
Va with all digital inputs at high
-2V (5 k) ~- + -1 + -1 + -1 + -1 + -1 + - 1 + - 1 ]
1k
2
4
8
16
255
10 V [ 256 ~ 9.961 V
MOTOROLA LINEAR/INTERFACE DEVICES
6-22
8
32
64
128
256
MC1408, MC1508
APPLICATIONS INFORMATION (continued)
Voltage outputs of a larger magnitude are obtainable with this
The positive voltage range may be extended by cascading the
output with a high beta common base transistor, Q 1, as shown.
circuit which uses an external operational amplifier as a current
to voltage converter. This configuration automatically keeps the
output of the MC1408 at ground potential and the operational
amplifier can generate a positive voltage limited only by its positive
supply voltage. Frequency response and settling time are primarily
determined by the characteristics of the operational amplifier. In
addition, the operational amplifier must be compensated for unity
gain, and in some cases overcompensation may be desirable.
Note that this configuration results in a positive output voltage
only. the .magnitude of which is dependent on the digital input.
The following circuit shows how the MLM301AG can be used
in a feedforward mode resulting in a full scale settling time on
the order of 2.0 .us.
FIGURE 20 - EXTENDING POSITIVE
VOLTAGE RANGE
Vee
5k
(Resistor and
diode optional.
see text)
Ge
FIGURE 18
65 pF
5.1 k
The output voltage range f9r this circuit is 0 volts to BVCBO
of the transistor. If pin 1 is left open, the transistor base may be
grounded, eliminating both the resistor and the diode. Variations
in beta must be considered for wide temperature range applications. An inverted output waveform may be obtained by using a
load resistor from a positive reference voltage to the collector of
the transistor. Also, high-speed operation is possible with a large
output voltage swing, because pin 4 is held at a constant voltage.
The resistor (R) to Vee maintains the transistor e,!,itte:r voltage
when all bits are "off" and insures fast turn-on of the least
significant bit.
.11>-<>-+--- Va
An alternative method is to use the MC1539G and input compensation. Response of this circuit is also on the order of 2.0.us.
See Motorola Application Note AN-459 for more details on this
concept.
Combined Output Amplifier and Voltage Reference
For many of its applications the MC1408 requires a reference
voltage and an operational amplifil;'r. Normally the operational
amplifier is used as a current to voltage converter arid its output
need only go positive. With the pOpular MC1723G voltage regulato~ both of these functions are provided in a single package with
the added bonus of up to 150 mA of output current. See Figure
21. The MC1723G uses both a positive and negative power supply.
The reference voltage of the MC1723G is then developed with
respect to the negative voltage and appears as a common-mode
signal to the reference amplifier in the D-to-A converter. This
all ows use of its output ampl ifier as a classic current-to-voltage
converter with the non-inverting input grounded.
Since ± 15 V and +5.0 V are normally available in a' combination digital-to-analog system, only the -5.0 V need be developed.
A resistor divider is sufficiently accurate since the allowable range
on pin 5 is from -2.0 to -8.0 volts. The 5.0 kilohm pull down
resistor on the amplifier output is necessary for fast negative
transitions.
Full scale output may be increased to as much as 32 volts by
increasing RO and raising the +15 V supply voltage to 35 V maximum. The resistor divider should be altered to comply with the
maximum limit of 40 volts across the MC1723G. Co may be
decreased to maintain the same RaCo product if maximum speed
is desired.
FIGURE 19
+15 V
35 pF
5 k
'Ok
(To pin 4
of MC1508L8)
,>-<>--+-_
Va
O.2p.F
-15 V
MOTOROLA LINEAR/INTERFACE DEVICES
6-23
..
MC1408, MC1508
APPLICATIONS INFORMATION (continued)
Programmable Power Supply
FIGURE 22 - BIPOLAR OR NEGATIVE OUTPUT
VOLTAGE ~IRCUIT
The circuit of Figure 21 can be used as a digitally programmed
power supply by the addition of thumbwheel switches and a BCO-
to-binary converter. The output voltage can be scaled in several
ways, including 0 to +25.5 volts in O.1-volt increments, ±O.05 volt;
or 0 to 5.1 volts in 20 mV increments, ±10 mV.
AO
FIGURE 21 - COMBINED OUTPUT AMPLIFIER and
VOLTAGE REFERENCE CIRCUIT
RO 5 k
II
Co 25 pF
Vee +5 V
MSB
A1
RS=2R14
A15 = R14
-15 V
VEE
A2
Vo
A3
A4
ASj
Vref
[Al A2 A3 A4 A5 A6 A7
vref
VO=--(RO' - + - + - + - + - + - + - + - - - ( R O '
R14
2
4
8
16 32 64 128 256
Rs
A5
A6
+15 V
7
A7
I
AS
LSB
I
I
I
I
\7.1 V
:
I
I
I
I
I
3.6k
6
1.6 k
0.01 j.tF
I
FIGURE 23 - BIPOLAR OR INVERTED NEGATIVE
OUTPUT VOLTAGE CIRCUIT
A
I
~
Al A2 A3A4A5A6A7 A8
RO
L ___ -,
VeE -15 V
RO
Vo=Vref=;:;-:;-{A}
MC1741G
or Equiv
Settling time for a 10-volt step§g 1.0 Its
For A = 00000000
bit configuration
R14
R1S
VO'" -Vref
For a ±5.0 volt output range;
V ref = -5.00 volts
-Vref
Bipe'.' or Negative Output Voltage
The circuit of Figure 22 is a variation from the standard voltage output circuit and will produce bipolar output signals. A
positive current may be sourced into the summing node to offset
the output voltage in the negative direction. For example, if
approximately 1.0 mA is used a bipolar output signal results which
may be described as a 8·bit "1 's" complement offset binary. V
may be used as this auxiliary reference. Note that AO has been
doubled to 10 kilohm. because of the anticipated 20 VIp-pI
output range.
R14 = R15 = 2.5 kO
C = 37 pF (min)
RO = 5 kO
"Decrease RO to 2.5 k(1 for a 0 to -6.0·volt output range.
This application provides somewhat lower speed, as previously
discussed in the Output Voltage Range section of the General
Information.
ref
MOTOROLA LINEAR/INTERFACE DEVICES
6-24
MC1408, MC1508
APPLICATIONS INFORMATION (continued)
Polarity Switching Circuit. a-Bit Magnitude
Plus Sign O:to-A Converter
Panel Mater Readout
Bipolar outputs may also be obtained by using a polarity switching circuit. The circuit of Figure 24 gives 8-bit magnitude plus
a sign bit. I n this configuration the operational amplifier is switched
The MC140B can be used to read out the status of BCD or
binary registers or counters in a digital control system. The current
output can be used to drive directly an analog panel meter. External meter shunts may be necessary if a meter of less than 2.0
mA full scale is used. Full scale calibration can be done by adjusting R14 or Vref.
between a gain of +1.0 and -1.0. Although another operational
amplifier is required, no more space is taken when a dual operational
amplifier such as the MC1558G is used. The transistor should be
selected for a very low saturation voltage and resistance.
FIGURE 26 - PANEL METER READOUT CIRCUIT
FIGURE 24 - POLARITY SWITCHING CIRCUIT
(a-Bit Magnitude Plus Sign D-to-A Converter)
Digital Word From Counter or Register
MSB'
R
Vo
From
o-.-vv...-+-<>'....
Output
V ref
•
o-~RNI4\'--o!"4'-l
Op-Ampl
R15
MC1408 Series
MC150B
15
or Equiv
P
5k
Polarity
Observe internal meter
resistance (for pin 4
voltage swing).
p", 1: Av =-1
Control Bit
P"'O: Av=+l
Programmable Gain Amplifier or Digital Attenuator
FIGURE 27 - OC COUPLEO OIGITAL ATTENUATOR
and OIGITAL SUBTRACTION
When used in the multiplying mode the MC1408 can be
applied as a digital attenuator. See Figure 25. One advantage of
this technique is that if RS = 50 ohms, no compensation capacitor
is needed. The small and large signal bandwidths are now identical
and are shown in Figure 14.
Vee
The best frequency response is obtained by not allowing 114
to reach zero. However, the high impedance node. pin 16, is
clamped to prevent saturation and insure fast recovery when the
current through R14 goes to zero. RS can be set for a'±1.0 mA
variation in relation to 114. 114 can never be negative.
The output current is always unipolar. The quiescent dc output
current level changes with the digital word wh ich makes ac coupling
necessary.
MC1741G
or Equiv
I'·
FIGURE 25 - PROGRAMMABLE GAIN AMPLIFIER OR
OIGITAL ATTENUATOR CIRCUIT
RS
Vref
R14
+'14
When Vs
VO=
=
O. 114"' 2.0 mA
[~~ + ~]{A}RO
Vee
Vee
Vref 1
10=101~102"'-
R141
Digital Subtraction;
Let Vref
~
R141
~!~
R142
Vref 1
V0'
-R14,
MOTOROLA LINEAR/INTERFACE DEVICES
6-25
{B}
I02=~IB
le+ 10= 10 1
Programmable Amplifier:
Connect Digital Inputs
50 A
=
e
MC1408, MC1508
APPLICATIONS INFORMATION (continued)
FIGURE 36 - TWO-DIGIT BCD CONVERSION
•
Vee
Two 8-bit, O-to-A converters can be used to build a two digit
4.0 rnA and 0.4 rnA with the outputs connected to sum the currents.
BCD D-to-A or A-to-D converter. If both outputs feed the virtual
The error of the D-to-A converter handling the least significant
bits will be scaled down by a factor of ten and thus an MC1408L6
may be used for the least significant word.
ground of an operational amplifier. 10:1 current scaling can be
achieved with a resistive current divider. If current output is desired, the units may be operated at full scale current levels of
FIGURE :r1 - DIGITAL QUOTIENT OF TWO ANALOG VARIABLES
or ANALOG-TO-DIGITAL CONVERSION
Reset
Clock
4
12
11
10
R14
v,ef
R15
14
13
VEE
MC1408 Series
9
MCI508
8
7
6
5
The circuit shown is a simple counterramp converter. An UP/DOWN counter
and dual threshold comparator can be
used to provide faster operation and continuous conversion.
LSB
MSB
~
C
C:= Vin/RO
Vref/R14
MOTOROLA LINEAR/INTERFACE DEVICES
6-26
®
MC6108
MOTOROLA
Advance Information
8-BIT
MPU BUS-COMPATIBLE
HIGH SPEED A-TO-D
CONVERTER
8-BIT MPU BUS-COMPATIBLE
HIGH SPEED A-TO-D CONVERTER
The MC6108 is a microprocessor compatible, 8-bit, high speed
analog-to-digital converter. Included are a precision reference,
DAC, comparator, SAR, matched scale resistors, 3-state output
buffers, and control logic. Conversion can be completed in under
2.0 P.s and input voltage ranges of 0 to + 10 V, 0 to + 5.0 V, and
- 5.0 to + 5.0 V can be converted without additional external components. With appropriate external resistors, the converter can
accommodate other input voltage ranges. 8-bit linearity and
monotonic operation with no missing codes are guaranteed over
temperature. Bus compatibility is provided for by the 3-state outputs (latches not required).
The MC6108 conversion time is short enough to allow most
microprocessors to accept the data immediately after requesting
a conversion. Applications include process control systems, servo
control systems, waveform storage, signal processing, and others.
This device is functionally and pin compatible with the AM6108.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• 1.8 p.s Conversion Time (Guaranteed)
• Microprocessor Compatible -
P SUFFIX
PLASTIC PACKAGE
CASE 710-02
Connect Directly to Data Bus
• Trimmed Internal Voltage Reference
• 0.1% Nonlinearity (Typ)
• low Operating Voltage (+ 5.0 V, - 5.2 V)
• Internal Matched Gain, Reference, and Offset Resistors
• Pin Programmable Natural Binary or Two's Complement
• Conversion Complete Available as Interrupt or on Data Bus
• Max Power Dissipation -
415 mW
BLOCK DIAGRAM
Vref
R
Ref
In
25
24
23
Com pen-
A Gnd salion
26
27
Gain
2.5 k
Rin Rolf
20 22
2.5 k
PIN CONNECTIONS
+Comp
19
-Comp
10
18
21
VCC
1.25 k
D1
D2
D3
D4
D5
D6
MSB D7
Control Logic
CC
S
12101511141316
9
IT Clk S Df R CodeSel LSB MSB
Sf
cs
CS
111
R
1
28
17
VCC VEE D Gnd
14L -_ _. J 15- Clk
DfSf -
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
6-27
MC6108
ABSOLUTE MAXIMUM RATINGS
(Voltages referred to D Gnd except where noted)
Parameter
Value
Units
VCC (Pin 1)
-0.3, +7.0
V
VEE (Pin 2B)
+0.3, -7.0
V
12
V
-0.5, +6.0
V
Max Differential (VCC - VEEI
Digital Inputs (Pins 11-16)
A. Gnd (Pin 26)
±1.0
V
3.0
mA
VCC, VEE
V
±12
V
-2.5, + 12
V
Input Current @ Ref In, Gain R
Voltage
Voltage
«, Gain R
at Rin, Roff
r,;
Voltage @ + Camp, - Camp,
Voltage @ DO-D7 (in 3-state mode)
-0.5, +6.0
V
Junction Temperature
-65, +150
'c
Devices should not be operated at these values. The "Recommended Operating Limits.. provide for actual device operation.
•
RECOMMENDED OPERATING LIMITS
(Voltages referred to D Gnd except where noted)
Svmbol
Min
Typ
Max
Units
VCC
4.75
5.0
5.25
V
VEE
-5.46
-5.2
-4.94
V
Analog Ground
AGnd
-0.1
0
0.1
V
Vref Current
IVref
0
-
5.0
mA
Parameter
Power Supply Voltage
Voltage @ Gain R
-
1.25
2.5
5.0
V
Ref In Current
Iref
0.5
1.0
2.0
mA
Voltage @ Rin
Vin
-B.O
V
Voff
-B.O
Clock Frequency
fclk
0
-
10
Voltage @ Roff
Voltage @ -Comp
Digital Input Voltage
-
Ambient Temperature
TA
Voltage@ 10
TRANSFER CHARACTERISTICS (VCC
~
10
V
5.0
MHz
0
0
4.0
V
-1.0
0
+5.0
V
0
-
5.25
V
+70
'c
0
+5.0 V, ±5.0%, VEE ~ -5.2 V, ±5.0%, 0 < TA < 70'C, Clk ~ 5.0 MHz,
Vref connected to Gain R, unless otherwise noted.)
Symbol
Min
Typ
Max
Units
Resolution
Res
B.O
-
B.O
Bits
Monotonicity
Mon
Parameter
GUARANTEED
Differential Non Linearity
DNL
-
±1/4
±3/4
LSB
Integral Nonlinearity (Unipolar)
INLU
-
±1/4
±1/2
LSB
Integral Non Linearity (Bipolar)
INLB
-
±1/4
±3/4
LSB
±2-1/2
LSB
±2-1/2
LSB
±1.0
LSB
-
-
±2-1I2
LSB
BZER
-
-
±1-1/2
LSB
BOFF
-
-
±2-1/2
LSB
Unipolar Gain Error (Vin
~
0 to + 5.0 V @ Pin 22)
UGER
Unipolar Gain Error (Vin
~
0 to + 10 V @ Pin 20)
UGER
-
UOFF
-
BGER
~
Unipolar Offset Error (D7-DO
Bipolar Gain Error (Vin
~
Bipolar Zero Error (D7-DO
OOH to 01H)
- 5.0 to + 5.0 V @ Pin 20)
~
Bipolar Offset Error (D7-DO
7FH to BOH)
~
OOH to 01H)
MOTOROLA LINEAR/INTERFACE DEVICES
6-28
MC6108
TRANSFER CHARACTERISTICS (continued)
Parameter
= FFH, TA = 25"C) (See Text "OAC")
10 Zero Scale Current (07-00 = FFH, TA = 25"C) (See Text "OAC")
10 Zero Scale Current (07-00 = OOH, TA = 25"C) (See Text "OAC")
10 Full Scale Current (07-00 = OOH, TA = 25"C) (See Text "OAC")
10 Full Scale Current (07-00
OAC Current Gain (See Text "OAC")
Vee
Gain Sensitivity to
Variations
(4.75 < VCC < 5.25 V, VEE
= - 5.2
=
Min
Typ
Max
Units
IFS
3.1
3.992
4.9
mA
IZS
-5.0
-
+5.0
p.A
IZS
3.0
7.8
13
p.A
IFS
3.1
3.984
4.9
mA
GOAC
3.92
4.0
4.08
-
PSSVCC
-
±0.01
±0.2
%FS
PSSVEE
-
±0.02
±0.2
%FS
Vrel
2.475
2.5
2.525
V
TC
-
±20
-
ppmrC
V)
Gain Sensitivity to VEE Variations
(- 5.46 < VEE < - 4.94 V, VCC
Symbol
+ 5.0 V)
INTERNAL REFERENCE SUPPLY
Pin 25 Voltage (lrel = -1.0 rnA, VCC
=
+ 5.0, VEE
=
-5.2)
Temperature Coefficient
Load Regulation (-1.0 mA <" Irel < - 5.0 rnA)
Regload
Line Regulation (4.75 < VCC < 5.25 V)
Regline
Noise (In
=
10 kHz to 1.0 MHz, TA
Short Circuit Current (TA
-
= 25"C)
= 25"C)
IRSC
-30
±0.05
±0.2
±0.02
±0.2
20
-20
-
%Vref
II
%Vref
p.V rms
-5
mA
rnA
POWER SUPPLIES
VCC Current (Outputs unloaded)
ICC
5.0
20
27
VEE Current (Outputs unloaded)
lEE
-50
-38
-5
mA
Power Oissipation (Outputs unloaded)
Po
300
415
mW
-
ANALOG INPUTS (T A = 25"C)
Input Resistance C-.....----.
00-07
6 kn
n
l'
C1
Diodes '" 1N914 or equivalent
C1 '" 125 pF (totall
Outputs To 3-State From Active
Active Outputs
TEMPERATURE SPECIFICATIONS (0' < TA < 70' CI
Pin
Typical
Change
Units
Vref
25
±20
ppmfC
ppm/'C
Function
OAC Current Gain
-
±8.0
10 Dynamic Impedance
21
+1.1
%/oC
Reference Input Offset
23-26
±20
p-VfC
20,22,24
+0.1
%fC
Resistance ~l Rin, Roff' Gain R
PIN DESCRIPTIONS
Symbol
Description
Pin
VCC
1
To be connected to a 5.0 volts (± 5.0%) supply.
00-07
2-9
TTL level data outputs capable of three-state mode. Pin 2 is the lSB, Pin 9 is the MSB.
Pin 9 can also indicate conversion status.
CC
10
Conversion Complete. TTL level output. High indicates conversion in progress, low
indicates conversion complete and valid data at the outputs. This output does not have
three-state capability.
S
11
Start conversion - TTL Input. Taking S low (with Clock and Chip Select low) resets the
SAR. Taking 5 high allows the conversion to start.
CS
12
Chip Select - TTL Input. When low, a conversion may be initiated or data read at the
outputs. When high, data outputs are in the three-state mode, and other digital inputs are
R
13
Read - TTL Input. When low, data may be read at 00-07. When high, 00-07 are in
three-state condition.
O/ST
14
Data/Status - TTL Input. When high, 00-07 provide normal data. When low, 07
indicates "Conversion Complete" status, while 00-06 are in three-state mode.
ClK
15
Clock -
CodeSel
16
Code Select - TTL Input. When low, output data is in 2's complement format. When
high, output data is straight binary (offset binary when used in the bipolar mode).
O.Gnd
17
Digital Ground. Connect to ground associated with digital side of the circuitry.
-Camp
18
Negative input of the comparator. Normally grounded, a voltage on this pin will provide
an offset of the input voltage range.
+Comp
19
Positive input of the comparator. Normally open, this pin may be used for input voltage
ranges other than 0-10 volts, or ±5.0 volts.
Rin
20
The voltage to be converted to a digital equivalent is normally applied to this pin. A
nominal 2.5 k!l resistor is internally connected from this pin to the comparator/OAC
output node.
10
21
Current flows into this pin, complementary in value to the OAC's normal current output
(10)' Normally grounded, it may be connected to a resistor to ground or a positive
voltage source in order to provide an analog output.
ignored.
TTL Input. 0-5.0 MHz.
MOTOROLA LINEAR/INTERFACE DEVICES
6-31
MC6108
PIN DESCRIPTIONS -
Symbol
continued
Description
Pin
Roff
22
An input for the bipolar offset function. This input can also serve as an alternate voltage
input with half the range at Rin. A nominal 1.25 kO resistor is internally connected from
this pin to the comparatorlDAC output node. When not used this pin should be
grounded.
Ref In
23
DAC's reference input. Reference current may be supplied to the DAC through this pin
rather than through Pin 24. The DAC's full scale current is 4x the reference current.
Source impedance should be less than 10 kil.
Gain R
24
Normally 2.5 volts (from pin 25) is applied to this pin to supply the 1.0 mA reference
current to the DAC. An internal 2.5 kO resistor connects this pin to the DAC's reference
input.
Vref
25
Output of the internal precision 2.5 volt reference supply, it can supply up to 5.0 mAo
Normally used to supply the DAC's reference current and the bipolar offset current.
A.Gnd
26
Analog Ground. Connect to ground associated with the analog side of the circuitry.
Compen
27
Compensation for the reference supply regulator. Typically, a 0.01 I'F capacitor is
connected from this pin to A. Gnd or to VEE.
VEE
28
To be connected to a -5.2 volts (±5.0%) supply.
DESIGN GUIDELINES
II
ANALOG SECTION
the signal source have a dynamic impedance less than
DAC (Refer to Figures 2 and 3)
The DAC generates an output current (10) which is
proportional to both the reference current and the digital
input presented to it by the Successive Approximation
Register (SAR), according to the following formula:
I _ Iref x 4 x A
I
0256
+ zs
Vl x Rx
1.6 V
(2)
where Vl = 112 LSB of the signal voltage, and
Rx = Resistance between the signal source and
Pin 19
(2.5 kO if using Rin, 1.25 kO if using Roff).
(1)
Normally Pin 19 is left open, although it may be used
as a path for the offset current, or the signal current (to
be digitized), with appropriate external resistors. See
the Applications Information for more details.
Iref flows into the DAC, never out, and should be between 0.5 mA and 2.0 mA to preserve linearity and accuracy. Linearity specified in the Electrical Characteristics is tested (iL Iref of =1.0 mAo The reference input
stage is depicted in Figure 4. Normally Iref is supplied
by the MC6108's internal 2.5 volt reference (Pin 25)
through Gain R (Pin 24). If a separate voltage source is
used for the reference current, it must be free of noise,
spikes, and ripple since the accuracy of a conversion is
directly related to the quality and stability of the
reference.
where A is the binary digital code (0-255), and Izs is the
zero scale current. 10 flows into the DAC, never out. The
4x (± 2.0%) factor is a current gain built into the DAC.
For a nominal Iref of 1.0 mA, the maximum 10 (@A =
255) is 3.992 rnA (which includes an Izs of 7.8 !LA). Izs
is built in so the first transition occurs when the signal
voltage (Vin) is 1/2 LSB above its minimum value. In
normal operation, 10 is supplied from the signal voltage
that is being converted to a digital code. Therefore, the
signal source must be capable of supplying up to 4.0
rnA in the unipolar mode. Iref is the reference current
flowing in through either pin 23 or 24. See Figure 2 for
the basic unipolar configuration.
In the bipolar mode, an offset current of 2.0 mA is
supplied to the 10 node (normally through Roff) in order
thatVin may be symmetrical about zero volts. The signal
source must be capable of sinking 2.0 mA when at the
negative extreme, and sourcing 2.0 mA when at the
positive extreme. See Figure 3 for the basic bipolar
configuration.
+Comp (Pin 19) is maintained close to a virtual
ground after a conversion as long as -Comp (Pin 18)
is at ground. The voltage at + Comp varies (nominally
±0.8 volts) during a conversion as the DAC forces different current values at 10 and will end up close to zero
at the end of a conversion. Because of the varying voltage at + Comp, the current from the signal source and
the offset source (if used) will vary with each step of the
successive approximation sequence, necessitating that
SIGNAL VOLTAGE
The input signal voltage (to be digitized) is applied to
either Rin, Roff' or through an appropriate external resistor to + Comp, such that current from the signal
source flows into the DAC's 10 port. The preset ranges,
with Vref connected to Gain R are as follows:
Input
Range
Oto +lOV
Oto +5.0V
-5.0 to +5.0 V
MOTOROLA LINEAR/INTERFACE DEVICES
6-32
Connect Rin
to
Connect Roff
to
Vin
A.Gnd
A. Gnd
Vin
Vref
Vin
MC6108
FIGURE 2 - BASIC UNIPOLAR CONFIGURATION
Gain
R
A.Gnd
24
Ref
In
23
+Comp
20
-Comp
18
Control logic
22 Roff
21
16
14
CodeSel
01
13
Sf
15
R
i;"
12
ClK
D.Gnd
+5.0
Data Bus
ClK In
Address Bus
FIGURE 3 - BASIC BIPOLAR CONFIGURATION
-
Offset Current
A. Gnd
26
-Comp
18
16
CodeSel
14
01
Sf
+5.0
MOTOROLA LINEAR/INTERFACE DEVICES
6-33
MC6108
FIGURE 4 -
REFERENCE AMPLIFIER
ances between the 10 node and the input source and
ground. For example, if the signal voltage applied to
Rin, and Roff is at ground (+ COMP open). the input
range shifts 3 volts for each volt applied to - COMPo
Since a portion of the DAC's 10 current will be drawn
from the voltage at - COMP, that voltage source must
be capable of supplying ± 2.0 mA, and must have a low
dynamic impedance. The voltage at - COMP, Rin' and
Roft must be kept within the limits listed in the Recommended Operating Conditions.
23
Ref In D - : - - - - - . ,
24
Gain R
To DAC
Current
Switches
2.5 k
~
II
~ (Pin 21) is the DAC's complementary current output.
The current at this pin changes opposite to that at 10
such that their sum is a constant value [4 x Iretl. Current
flow is into the pin.
In most applications, this pin is grounded. However,
connecting this pin to a resistor to ground permits monitoring the steps of the SAR(see figure 5), or obtaining
an analog output representative of the input voltage.
The steps in Figure 5 indicate how the circuit finds the
value of~, representative of Yin, by successively trying
each bit, and leaving each bit on or oft (a conversion
always starts with the MSB on). The voltage at ~ will
swing negative, and is limited to -1.0 volt (max resistor
value is 250 Il). To get a wider voltage swing, a larger
resistor may be connected to a pull-up voltage (+ 5.0
volts max). For example, using a 1.25 k!l resistor pulled
up to + 5.0 volts results in this pin swinging between
ground and + 5.0 volts. The output dynamic impedance
of the ~ current source (when ~ is maximum) is = 2.0
Mil for applied voltages of - 1.0 to + 4.0 V, and is =50
kll for applied voltages> + 4.0 V, and tends to increase
as the nominal value of ~ decreases.
Although the tolerance on the absolute values of the
resistors at Gain R, Rin, and Roft is = ± 30%, the ratio
of their values is accurately controlled. Due to this fact,
when the MC610B is connected for any of the above
mentioned ranges, the conversion accuracy is assured.
The voltage being digitized must be steady to within
± 1/2 LSB during a conversion cycle in order to get an
accurate representation of that voltage. The maximum
slew rate during the conversion is defined by:
Vrange
2 x 256 x tCONV
V range x fCLK
2 x 256 x 9
Vrange x fCLK
460B
(3)
where Vrange = range of the input voltage;
tCONV = conversion time (min. 9 clock
cycles); and
fCLK = clock frequency.
For a typical input range of 10 volts, and a clock frequency of 5.0 MHz, the maximum input slew rate is
0.010B V/p-s. The maximum sine-wave frequency which
can be digitized without using a sample-and-hold is:
fCLK
460B x
FIGURE 5 -
SUCCESSIVE APPROXIMATION STEPS AT
J;;
0(4)
'IT
The above equation assumes the signal's peak-topeak voltage is equal to the input range of the MC610B.
If the input signal will change more than 1/2 LSB during
a conversion, a sample-and-hold is then needed at the
input. With the use of a sample-and-hold, the maximum
frequency which can be accurately digitized is 1/2 the
conversion frequency, (277.7B kHz with an fCLK of 5.0
MHz).
1/4Vin
112-
3/4
The dynamic impedance requirements of the signal
source are discussed in the DAC section.
FS-
-COMP
Pin 1B is normally grounded, resulting in + COMP (Pin
19) being close to a virtual ground at the end of a conversion. However, this pin may be used as an alternate
means of offsetting the input range. Applying a positive
voltage to - COMP shifts the input voltage range in a
positive direction.
The amount of the input's shift depends not only on
the voltage applied to -COMP, but also on the imped-
At the end of a conversion, ~ produces a spike approximately 40 ns wide which starts with the falling
edge of CC. The spike's amplitude varies from =1.0 mA
(@ Yin = 0) to 0 mA (@ Yin = max). After the spike, ~
remains at the final current value until the start of the
next conversion. The current value, once established, is
independent of the inputs at Fl, D/ST, CodeSel, and CS.
MOTOROLA LINEAR/INTERFACE DEVICES
6-34
MC6108
plete) will change to a high state =25 ns later, indicating
the SAR has been reset. A clock low-to-high transition
must then occur before or with S switching high, and
the conversion begins with the next ClK rising edge (S
must precede that one by >25 ns). The conversion then
requires seven complete clock cycles. At the end of the
conversion, CC will switch low indicating the end of the
conversion, and that valid data is available. See Figure
6 for the basic timing sequence.
If the S, CS, and ClK inputs appear simultaneously
low during a conversion, the conversion sequence will
be re-initiated at that point.
The following truth table describes the relationship of
the six digital inputs (Pins 11-16):
REFERENCE SUPPLV
The internal bandgap reference produces an output
of + 2.500 volts, ± 25 mV ((w V ref, pin 25), and is primarily intended to supply the reference current and the
bipolar offset current. The output impedance is typically
<0.5 0 for load currents up to 5.0 mA, and increases
rapidly at higher currents. Variations in Vref are typically
< 0.5 mV as VCC is varied from +4.75 to +5.25 volts,
and V ref is independent of VEE variations. The output
is designed to source, not sink current.
A 0.001 /LF capacitor from Vref to A. Gnd is recommended to reduce noise on this output produced by the
digital section. A 0.01 /LF capacitor from the Compensation pin (Pin 27) to A. Gnd, or to VEE, is necessary to
stabilize the regulator.
Function
Logic Inputs
POWER SUPPLIES
The power supplies are to be + 5.0 volts, ± 5.0% at
VCC (Pin 1), and - 5.2 volts, ± 5.0% at VEE (Pin 28). For
proper operation, bypassing is required for both supplies at the IC. 10 /LF tantalum in parallel with 0.01 /LF
ceramic is recommended for each supply.
ICC varies with the chip's different operating conditions, and is a maximum (typically 20 mAl during a conversion (R" = 0, D/ST = 1, CS = 0) with the signal voltage
at its minimum value. Minimum ICC (typically 12 mAl
occurs during a conversion with the signal voltage at
its maximum value. ICC is typically 16 mA when the
MC6108 is deselected (CS = 1l. and under all conditions,
ICC is independent of clock frequency.
lEE is typically 38 mA, and varies <2.0 mA over different operating conditions. lEE is independent of clock
frequency.
S
R
O/ST
CodeSel
1
X
X
X
X
ClK CS
X
0
0
X
X
X
Reset SAR
~
X
1
X
X
X
Conversion process
(after SAR is reset I
X
0
X
1
X
X
00-07 @ Hi-Z
X
0
1
0
1
1
Read binary or
offset binary data at
00-07 after
conversion
X
0
1
0
1
0
Read 2's
complement data at
00-07 after
conversion
X
0
1
0
0
X
Read CC status at
07 (00-06 @ Hi-ZI
0
t
DIGITAL SECTION
x=
SEQUENCE OF OPERATION
A conversion is initiated when the S (Start), CS (Chip
select), and ClK (Clock) inputs are simultaneously low
for a minimum of 50 ns. The three inputs may be taken
low in any sequence, including simultaneously. After all
three have been brought low, CC (Conversion Com-
Chip de·selected,
00-07@Hi-Z
Don't care
Figure 7 depicts the input configurations in orderto read
the various output formats. Any digital input left open
is equivalent to a logic "0" - however, good design
practice dictates that inputs should never be left open.
FIGURE 6 - CONVERSION TIMING DIAGRAM
A
2
3
4
5
6
7
A = SAR Reset
8 = Conversion Starts
C = Conversion Ends
ClK
CC
DO_07~~____________~3~-S~t~a~te~__________________~
Old Data
New Data
MOTOROLA LINEAR/INTERFACE DEVICES
6-35
MC61 08
FIGURE 7 -
OUTPUT DATA CONTROL
~~~------------------------~,---
COdeS:I~
O/ST
/..--::-::-~::--~ r.::-::--:-' " Status@07
00-07
II
CLOCK
The clock input (Pin 15) is a TTL level input which
steps the SAR through the successive approximation
conversion process_ There is no minimum required frequency, and the maximum operating frequency is listed
in the timing characteristics. The clock duty cycle does
not have to be 50%, but the minimum low and high
times must be observed. The clock is needed only for
the conversion, and may be removed or left applied to
the MC6108 between conversions. The operation of CS,
O/ST, FI, and CodeSel are not affected by the presence
or absence of the clock.
low. Alternately CS may be left low during the entire
conversion.
Whenever the MC6108 is de-selected, a conversion
cannot be initiated, and 00-07 are in the highimpedance condition, regardless of the other digital
inputs.
START
5 (Pin 11) is a TTL level input used to reset the SAR,
and initiate a conversion. The SAR is reset when this
pin is low simultaneous with the Clock and CS inputs
for a minimum of 50 ns. CC output will then change to
a high state. A clock rising edge must occur while S is
low, or no later than coincident with its riSing edge.
There is no maximum time limit for 5 to stay low, but
the conversion will not begin until the next rising edge
of the Clock input after S goes high. Seven complete
clock cycles are then needed to complete the
conversion.
If the S input is connected to the CC output through
a flip-flop (see Figure 8), the MC61 08 will operate at the
maximum possible conversion repetition rate, i.e. one
conversion each 9 clock cycles.
CHIP SELECT
Chip Select (Pin 12) is a TTL level input which is normally used by a microprocessor's address decoding to
select amI de-select the device. A Logic "0" selects (enables) the MC6108, while a Logic "1" disables it. CS
must be low for a conversion to start, and to read data
at 00-07 or status at 07 (see O/ST description). CS may
be taken high during a conversion, as long as the minimum low time for CS, 5, and ClK is adhered to, and
then taken low in order to read the data after CC goes
FIGURE 8 -
3-State
CONFIGURATION FOR MAXIMUM CONVERSION RATE
c L K I - - - - - . . - - - - - - ( .;5.0 MHz
+5.0 V
2
CLK
MC6108
.
1-_ _-', To Latches
00 • • • 07
ILP Bus
or
O/ST
CodeSell--+---o + 5.0 V
RI----<
CS
REAO
I
I
3
4
I
5
6
7
9
8
rr
I I I
BUSy-V.....:-I--------------'-
S~~.~========~Cc.o;n~v~e~rt~in~g~==============~
·LJ
~
DO_07~__------~3~-~St~a~te~--------
Active
MOTOROLA LINEAR/INTERFACE DEVICES
6-36
MC6108
READ
Read (Pin 13) is a TTL level input which controls the
state of the outputs (DO-D7) between conversions as
long as the MC6108 is enabled (CS = 0). A logic "1"
forces the 8 outputs to a high impedance condition regardless of the other digital inputs. A logic "0" permits
reading the data at DO-D7 after the conversion is complete, or the CC status at D7 (depending on the D/ST
input). During a conversion, R is ineffective, except for
controlling D7 if D/ST is low.
The Read input differs from the CS input in that taking
Read high does not prevent a conversion from being
initiated in response to the CS, ClK, and 5 inputs (described elsewhere). If desired, the Read input may be
kept low at all times in a simple application.
CODE SELECT
CodeSel (Pin 16) is a TTL level input which controls
the format of the binary data presented at DO-D7 at the
end of a conversion. When at a logic "1", the data is
presented as natural binary or offset binary, depending
on whether the analog input is unipolar or bipolar, respectively. When at a logic "0", the output code is in
2's complement form (applicable to bipolar operation
only). This pin has no effect on D7 when the D/5T input
is low (see section on Data/Status). The following tables
illustrate examples of the different codes:
UNIPOLAR
Input
FS-1LSB
3/4 FS
1/2 FS
1/4 FS
0
CONVERSION COMPLETE
CC (Pin 10) is a TTL level output which indicates the
status of the conversion. After CS, ClK, and 5 are taken
low to initiate a conversion, CC will go high =25 ns later.
CC will stay high during the conversion, and then go
low =15 ns after the rising edge of the clock corresponding to the end of the co·nversion. See Figure 6 and
the System Timing Diagram.
The CC pin does not have a high impedance capability, and is therefore always active. The CC status is
typically monitored through a port, or an interrupt pin.
+10 V Range +5.0 V Range Natural Binary
9.961
7.500
5.000
2.500
0.000
V
V
V
V
V
4.980
3.750
2.500
1.250
0.000
V
V
V
V
V
11111111
11000000
10000000
01000000
00000000
BIPOLAR
2'5
Input
+FS -lLSB
+1/2 FS
MidScale
-1/2 FS
-FS + lLSB
-FS
DATA/STATUS
D/ST (Pin 14) is a TTL level input which controls the
information presented at DO-D7. When at a logic "1",
DO-D7 will provide the digital equivalent of the analog
input at the end of the conversion (DO-D7 are in a high
impedance mode during the conversion). When at a
logic "0", DO-D6 are maintained in a high impedance
mode, while D7 provides the Conversion Complete status both during and after the conversion (D7 does not
go into a high impedance mode). The rising and falling
edges of D7, when providing status, follow those of CC
(Pin 10) within = 10 ns.
±5.0 V Range Offset Binary
4.961
2.500
0.000
-2.500
-4.961
-5.000
V
V
V
V
V
V
11111111
11000000
10000000
01000000
00000001
00000000
Complement
01111111
01000000
00000000
11000000
10000001
10000000
If an input voltage range other than those listed above
is used, and CodeSel is at a logic "1" (binary format),
the code 0000 0000 will correspond to the most negative
input voltage, while the code 1111 1111 corresponds to
the most positive input voltage (-1 lSB). The 2's complement code is the same as the binary with the MSB
(D7) inverted.
DATA OUTPUTS
The data outputs (Pins 2-9) are TTL level outputs with
high impedance capability. Pin 2 is the lSB (DO), while
Pin 9 is the MSB (D7). The 8 outputs are in the high
impedance mode during a conversion (CC = high), or
if CS or R are high. DO-D6 are in the high impedance
mode, and D7 is active, anytime that D/ST is low (CS =
R = 0).
During normal operation, the 8 outputs change from
valid data to high impedance within 55 ns after the SAR
has been reset (CS = ClK = 5 = 0) at the beginning
of a conversion, and back to valid data within 50 ns after
the rising edge of the ClK at the end of a conversion.
D/ST may be used by the microprocessor as a means
of reading the Status and the Data on the bus rather
than using a separate port for the CC output (Pin 10).
However, since D7 is active during the conversion, the
microprocessor cannot be busy with other functions
during this time. If the microprocessor is to be busy
during the conversion, the status may be checked by
periodically switching the D/ST pin, or the CS pin, or by
reading the CC pin (Pin 10) through a separate port or
interrupt pin. R (Pin 13) must be low to read data or
status.
MOTOROLA LINEAR/INTERFACE DEVICES
6-37
MC6108
APPLICATIONS INFORMATION
II
POWER SUPPLIES, GROUNDING
The P.C. board layout, the quality of the power supplies and the ground system atthe ICare very important
in order to obtain proper operation. Noise,. from any
source, coming into the device on VCC, VEE, or ground
can cause an incorrect output code due to interaction
with the analog portion of the circuit. At the same time,
noise generated within the MC610B can cause incorrect
operation if that noise does not have a clear path to ac
ground.
Both the VCC and VEE power supplies must be decoupled to ground at the IC (within 1" max) with a 10
""F tantalum and a 0.01 ""F ceramic. Tantalum capacitors
are recommended since electrolytic capacitors simply
have too much inductance at the frequencies of interest.
The quality of the VCC and VEE supplies should then
be checked at the IC with a high frequency scope. Noise
spikes (always present when digital circuits are present)
can easily exceed 400 mV peak, and if they get into the
analog portion of the IC, the operation can be disrupted.
Noise can be reduced by inserting resistors «10 n,
metal film) or inductors between the supplies and the
IC.
If switching power supplies are used, there will usually be spikes of 0.5 volts or greater at frequencies of
50 - 200 kHz. These spikes are generally more difficult
to reduce because of their greater energy content. In
FIGURE 9 -
extreme cases, 3-terminal regulators (MC7BL05ACP,
MC7905.2CT), with appropriate high frequency filtering,
should be used and dedicated to the MC610B.
~ri~ew~m~~w~~~=~~~~
their magnitude to exceed. the values in the Recommended Operating Limits.
The P.C. board tracks supplying VCC and VEE to the
MC610B should preferably not be at the tail end of the
bus distribution, after passing through a maze of digital
circuitry. The MC61 OB should be close to the power supply, or the connector where the supply voltages enter
the board. If the VCC and VEE lines are supplying considerable current to other parts of the boards, then it is
preferable to have dedicated lines from the supply or
connector directly to the MC610B.
The MC610B has two ground pins - A. Gnd (Pin 26).
and D. Gnd. (Pin 17). VCC and VEE should be referenced
to D. Gnd. A. Gnd is mainly a signal ground, and is the
return path for the internal 2.5 volt reference, and the
DAC's reference amplifier. A. Gnd must be connected
to D. Gnd, preferably at one point, and in a manner so
as to not pick up noise. The de voltage between A. Gnd
and D. Gnd must be <100 mV. Long PC tracks between
them should be avoided as the inductance (at 5.0 MHz)
can create stability problems. See Figure 9 for a depiction of the major current paths.
MAJOR CURRENT PATHS
Vee )-_ _---.,
J, ~
Digital Gnd.
~ ~ Analog Gnd.
Vee
Vref
Gain R
-t____+-~--,eomp
L-____
~
Digital
1/0
Tie
Together at
One Point
00-07
MOTOROLA LINEAR/INTERFACE DEVICES
6-38
-=
MC6108
FULL SCALE. ZERO ADJUSTMENTS
The unadjusted full scale accuracy (at max. Vin) ofthe
MC6108, when the internal resistors are used (Figures
2 and 3), is guaranteed to be within 2-1/2 LSBs. The
offset error (at min. Vin) is guaranteed to be less than
1LSB for the unipolar configuration, and 2-1/2 LSBs for
the bipolar configuration. If the application requires
greater accuracy atthe end points, then adjustments are
needed, as shown in Figures 10 and 11. The potentiometers should be 20-turn type, with low T.C. The 50
resistor is added to the Rin pin to ensure that the potentiometers can provide adjustment over the full plus
and minus error range.
FIGURE 12 -
V,ef
R,ef
23 Ref In
19
I,ef
n
FIGURE 10 -
UNIPOLAR CONVERSION USING EXTERNAL
REFERENCE AND RESISTORS
20
UNIPOLAR ADJUSTMENTS
+5.0
-5.2
Zero Adjustment
10 x 256
4 x Iref
A
FIGURE 11 -
18
-Camp
4 x Vref x Riv
Rref
A modulation of the input signal (for waveform manipulation or signal processing) may be done by applying the modulating signal to the reference current. Rewriting equation 1 to determine the output code results
in:
100
-=-
22
Max Vin
10 k
Roff 1--"~1N\,...-<-<10 k
MC6108
+Comp
Vin x 256
Rin x 4 x Iref
(5)
BIPOLAR ADJUSTMENTS
(The offset term has been omitted to simplify the
equation.) As can be seen, the output code varies inversely with the reference. When varying the reference
current, its value must be maintained between 0.5 and
2.0 rnA, and the current flow must always be into Pin
23 or 24.
Zero
Adjustment
50
MC6108
FIGURE 13 - BIPOLAR CONVERSION USING
EXTERNAL REFERENCE & RESISTORS
V,ef
OTHER INPUT RANGES
The MC61 08 has internal resistors providing preset
input ranges of 0 to + 10 volts, 0 to + 5.0 volts, and - 5.0
to + 5.0 volts (see previous section entitled "Signal Voltage"). The input range. and the offset, are determined
by the value of the resistors at Pins 20, 22, and 24. Where
input ranges other than those listed above are to be
digitized, then external resistors of comparable tolerance and temperature coefficient should be used for the
reference (at Pin 23), and for the input signal (at Pin 19),
and for the bipolar offset function (also at Pin 19). See
Figures 12 and 13. Rin and Roff should be connected to
A. Gnd when not used. Due to the tolerances of the
absolute value of the internal resistors, they should not
be used in conjunction with external resistors.
Figure 13 shows the reference current and the offset
current supplied from the same reference source, which
may be the internal reference (Pin 25). However, separate sources may be used for the two currents if desired.
Offset
Max Vin
V,ef x [R:f - ;J
Min Vin
MOTOROLA LINEAR/INTERFACE DEVICES
6-39
Riv
Vref x Rjv
Ro
MC61 08
MAXIMUM CONVERSION RATE
Although a conversion, once initiated, requires 7 +
clock cycles, the maximum conversion repetition rate is
once per 9 clock cycles, due to the OAC and SAR reset
times. This is easily achieved by connecting CC to S,
through a O-type flip-flop, allowing the MC610B to restart itself at the end of each conversion (see Figure 8).
In this mode, the data outputs may be connected directly
to the microprocessor bus, and the BUSY output used
to indicate when valid data is available. Alternately, the
data outputs may be connected to latches, which are
activated by the BUSY signal, in order that the microprocessor may read the data at its convenience. This
configuration may also be used for OMA loading of
memory.
II
is initiated when the active low address decoder
switches low, RNV is high, and the port outputs one
active low pulse to S. At the end of the conversion, CC
goes low, alerting the processor through the port or
through an interrupt. The processor can then read the
data at its convenience by switching Rand CS low.
Figure 15 eliminates the need for an interrupt, and
instead periodically checks the conversion status at 07
(O/ST = low) by reading the data bus. When 07 is low,
the conversion is complete, and the OIST input is then
taken high so as to read the data at 00-07.
Figure 16 eliminates the need for an interrupt or a
port, but requires the processor to wait during the conversion until it is complete. The conversion is initiated
when the address decoder switches low, and RNV goes
high - that brings CS low and provides the Start pulse.
The processor waits 9 clock cycles, and then reads the
data.
In the above examples, the timing of the S pulse must
be such that it is low for >50 ns concurrently with CS
and ClK low, and must include one rising clock edge.
If the S pulse timing is synchronized with the other inputs, this is relatively easy to guarantee. If, however, in
Figure 16, the CS and elK are not synchronized, then
the SN74lS122 must be set for a pulse width that is
equal to or greater than one clock cycle.
MICROPROCESSOR INTERFACING
With the proliferation of microprocessors available today, interfacing schemes can take anyone of several
hundred configurations. Figures 14, 15, and 16 indicate
some generic interfacing schemes which can be
adapted to most any microprocessor. Some of the terminology in the Figures is based on the MC6BOO series
of processors - other processors have similar functions
by different names.
Figure 14 depicts a simple basic interface using a port
(such as an MC6B21) andlor an interrupt. A conversion
FIGURE 15 - MICROPROCESSOR INTERFACE
WITHOUT AN INTERRUPT
FIGURE 14 - BASIC MICROPROCESSOR INTERFACE
ClK
MC6108
ClK
Input
+5.0
Port
(MC6821)
Ii
D/Sf
f-~------I-is
Port
I--------I""s
f - - - - - -........-ili
(MC6821)
f - - - - - - - - - . j D/Sf
f---------...jCodeSel
f--------.,CodeSel
MC6108
I~~~--------~cc
I
Orto"P ___
Interrupt
00-07
J
00-07
_
~~~_ _13~.S~t~at!._ _ _~~~~~~~
Old Data
MOTOROLA LINEAR/INTERFACE DEVICES
6-40
MC6108
FIGURE 16 -
STAND-ALONE USE
Although the MC6108 was designed for use with microprocessors, it can be used in a stand-alone mode.
The digital inputs may be controlled by other digital
circuitry, or hard-wired in a simple application. Figure
17 shows a simple configuration whereby the MC6108
is permanently enabled, and each S input pulse provides new data at the outputs. Figure 18 shows a circuit
whereby the MC6108 is continually self-updating the
information into latches. The latches are necessary
since in this mode of operation, the MC6108 data outputs are in the 3-state mode the majority of the time.
The 430 n resistor and 68 pF capacitor provide a =60
ns delay from CC's falling edge to allow 00-07 to stabilize, and to allow the setup time required by the
SN74LS374 latches. The clock high time in this circuit
must be ;.100 ns.
MICROPROCESSOR INTERFACE WITHOUT
USING A PORT OR INTERRUPT
MCS108
Clock Input
)-----i ClK
+ 5.0 0-----1 D/ST
R
Data Format r----lCodeSel
I
csl
S1JI I
NEGATIVE VOLTAGE REGULATOR
In the cases where a negative power supply is not
available - neitherthe - 5.2 volts, nor a higher negative
voltage from which to derive the - 5.2 volts -the circuit
of Figure 19 can be used to generate the - 5.2 volts from
the + 5.0 volts supply. The PC board space required is
small (=2.0 in 2), and it can be located physically close
to the MC6108. The MC34063 is a switching regulator,
and in Figure 19 is configured in an inverting mode of
operation. The regulator operating specifications are
given in the Figure.
DO-D7
Data Bus
I
conversion---1
DO-D7
~=~7'77@=i)'"'~!=.~
FIGURE 17 - STAND-ALONE OPERATION
(CONTINUOUSLY ENABLEDI
0.01
Campen
Raft
VEE
-Camp
MCS108
D.Gnd
A. Gnd
D7
r;;
Clock
Start
<;5.0 MHz
+5.0V
MOTOROLA LINEAR/INTERFACE DEVICES
6-41
MC61 08
AGURE 18 - STAND-ALONE OPERATION AT
MAXIMUM UPDATE RATE
430
68
PFJ.
CP
MC6108
k-"",:-<:",",,,:-<:"",,:-<:"",,,,,:-<:",",,,~
a:
0.0
• 74LS374 •
~'>""":"--'o.-"-"-"-"---"-'''''''''-'>....O'''''''''"''-C:''''':'-''-l~ latches
7
Output
Data
0
CodeS.1
Ii
CSf-.....----------~
II
"'~
I'
I
CC
S-U.
Converting
~
..
3~State
LT
~_
DO-D7~---="":":::':--WActive
FIGURE 19 -
-5.2 VOLTAGE REGULATOR
Vin
14.75 to 5.25 VI /)-~.'100;!;;
I'FJ;
1 .......--,
l.lll
T
6
7
I
8
·1
200l'H
2~~
MC34063
L-;:.5_ _...:3;---,::--_4j--'
1
1
~~ pF
1
I N5819
r-3A,J.0",k.-n4~95Jo,;3r.;.1l:..-_"_~[--,_ _ _...~1-O Vout
1
l
470I'Fj;
__ J
1.01'H
=
T
Line Regulation
4.75 V < Vin < 5.25 V (lout
Load Regulation
Vin = 5.0 V, 20 mA < lout < 50 mA
Output Ripple
Vin = 5.0 V, lout
= 50
mA
Short Circuit lout
Vin = 5.0 V, Rl = 0.1 0.
Efficiency
Vin = 5.0 V, lout = 50 mA
-5.2V150 mA
jl00I'F
0.04%
20 mAl
0.8%
3.0 mV POp
MOTOROLA LINEAR/INTERFACE DEVICES
6-42
300mA
57%
MC6108
GLOSSARY
BANDGAP REFERENCE - A voltage reference circuit
based on the predictable base-emitter voltage of a transistor. The silicon bandgap voltage of =1.2 volts is the
basis for generating other voltages which are stable
with time and temperature.
LINE REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the input to the
regulator is varied. The error is typically expressed as
a percent of the nominal output voltage.
LOAD REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the load current
is varied. The error is typically expressed as a percent
of the nominal output voltage.
BIPOLAR INPUT - A mode of operation whereby the
analog input (of an A-D), or output (of a DAC), includes
both negative and positive values. Examples are - 5 to
+5 V, -2 to +B V, etc.
MONOTONICITY - The characteristic of the transfer
function whereby increasing the input code (of a DAC),
orthe input signal (of an A-D), results in the output never
decreasing.
BIPOLAR OFFSET ERROR - The difference between the
actual and ideal locations of the OOH to 01 H transition,
where the ideal location is 1/2 LSB above the most negative input voltage.
MSB - Most Significant Bit. It is the highest order bit
of a binary code.
BIPOLAR ZERO ERROR - The error (usually expressed
in LSBs) of the input voltage location (of an A-D) of the
7FH to BOH transition. The ideal location is 1/2 LSB below
zero volts in the case of an A-D set up for a symmetrical
bipolar input (e.g., -5 to +5 V).'
NATURAL BINARY CODE - A binary code whose normalized decimal value is defined by:
N = An2n + ... + A323 + A222 + A121 + A020
DAC CURRENT GAIN - The intenial gain the DAC applies to the reference current to determine the full scale
output current. The actual maximum current out of a
DAC is one LSB less than the full scale current.
where each "A" coefficient has a value of 1 or O. Typically, all zeroes corresponds to a zero input voltage of
an A-D, and all ones corresponds to the most positive
input voltage.
DIFFERENTIAL NON-LINEARITY - The maximum deviation in the actual step size (one transition level to
another) from the ideal step size. The ideal step size is
defined as the Full Scale Range divided by 2 n (n = number of bits). This error must be within ± 1 LSB for proper
operation.
OFFSET BINARY CODE - Applicable only to bipolar input (or output) data converters, it is the same as Natural
Binary, except that all zeroes corresponds to the most
negative input voltage (of an A-D), while all ones corresponds to the most positive input.
POWER SUPPLY SENSITIVITY - The change in a data
converter's performance with changes in the power
supply voltage(s). This parameter is usually expressed
in percent of full scale versus av.
FULL SCALE CURRENT or RANGE (ACTUAL)- The difference between the actual minimum and maximum
end points of the analog input (of an A-D), or output (of
a DAC).
aUANTITIZATION ERROR - Also known as digitization
error or uncertainty. It is the inherent error involved in
digitizing an analog signal due to the finite number of
steps at the digital output versus the infinite number of
values at the analog input. This error is a minimum of
± 1/2 LSB.
FULL SCALE RANGE UDEAL)- The difference between
the actual minimum and maximum end points of the
analog input (of an A-Dl. or output (of a DAC), plus one
LSB.
GAIN ERROR - The difference between the actual and
expected gain (end point to end point) of a data converter, with respect to the device's internal reference.
The gain error is usually expressed in LSBs.
RESOLUTION - The smallest change which can be discerned by an A-D converter, or produced by a DAC. It
is usually expressed as the number of bits, n, where the
converter has 2n possible states.
INTEGRAL NON-LINEARITY - The maximum error of
an A-D, or DAC, transfer function from the ideal straight
line connecting the analog end points. This parameter
is sensitive to dynamics, and test conditions must be
specified in order to be meaningful. This parameter is
the best overall indicator of the device's performance.
SAMPLING THEOREM - Also known as the Nyquist
Theorem. It states that the sampling frequency of an
A-D must be no less than 2x the highest frequency (of
interest) of the analog signal to be digitized in order to
preserve the information of that analog signal.
LSB - Least Significant Bit. It is the lowest order bit of
a binary code.
MOTOROLA LINEAR/INTERFACE DEVICES
6-43
MC61 08
DAC), includes values of a single polarity. Examples are
Oto +10V,Oto -5V, +2to +8V.etc.
A binary code applicable to bipolar operation, in which the positive and
negative codes of the same analog magnitude sum to
all zeroes, plus a carry. It is the same as Offset Binary
Code. with the MSB inverted.
TWO'S COMPLEMENT CODE -
UNIPOLAR OFFSET ERROR - The difference between
the actual and ideal locations of the OOH to 01 H transition. where the ideal location is 1/2 LSB above the
most negative input voltage.
A mode of operation whereby the
analog input range (of an A-D), or output range (of a
UNIPOLAR INPUT -
II
MOTOROLA LINEAR/INTERFACE DEVICES
6-44
®
MC10318L9
MC10318L
MC10318CL7
MC10318CL6
MOTOROLA
Specifications and Applications
Information
HIGH SPEED
8-BIT DIGITAL-TO-ANALOG
CONVERTER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
HIGH SPEED
8-BIT DIGITAL-TO-ANALOG CONVERTER
The MC1031B (Series) is a high-speed D/A converter capable of
data conversion rates in excess of 25 MHz. The digital inputs are
compatible with MECL 10,000 Series Logic. Complementary current outputs provide up to 56 mA full scale capability. The
MC10318 Series is available in 4 accuracy grades (over temperature) to meet the requirements of many applications, including:
high-speed instrumentation and test equipment, storage oscilliscopes, display processing, radar systems, and digital video systems (broadcast and receiver applications).
• Fast Settling Time • Four
-
10 ns (Typ to ± 0.19%)
Accuracy Grades
9-Bit Linearity (±0.10%)
8-Bit Linearity (±0.19%)
7-Bit Linearity (±0.39%)
6-Bit Linearity (±0.78%)
-
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
MC10318L9
MC10318L
MC10318CL7
MC10318CL6
• Inputs MECL 10,000 Compatible
• Complementary Current Outputs
• Output Compliance: - 1.3 V to + 2.5 V
• Single MECL Supply: -5.2 V
L SUFFIX
CERAMIC PACKAGE
CASE 690-13
• Standard 16-Pin Dual-In-Line Package
• Evaluation Kit MCK8DA Available
BLOCK DIAGRAM
PIN CONNECTIONS
(TOP VIEW)
Digital Inputs
I
\
(MSBI 07 06 05 04 03 02 01 DO ILSBI
8
7
6
5
4
3
2 1
Gnd
LSB
r,;
02
I
I
NC
Current
Vref+
Switches
i
Vref-
04
I
I
05
VEE
11
Comp
VEE
16
Gnd
10
I
MSB 07
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
6-45
~C10318L9,~C10318L,~C10318CL7,~C10318CL6
MAXIMUM RATINGS (TA = + 25°C unless otherwise noted.)
Symbol
Value
Unit
VEE
-6.0 to +0.5
Vdc
Digital Input Voltage
VI
o to VEE
Vdc
Applied Output Voltage
Vo
+5.0 to VEE
Vdc
Ire f(12)
5.0
mA
Output Current
IFS
-75
mA
Reference Amplifier Input Range
Vref
+0.5 to VEE
Vdc
±5.0
Vdc
Rating
Power Supply Voltage
Reference Current
Reference Amplifier Differential Inputs
Vref(D)
Operating Temperature Range
Storage Temperature Range
Thermal Resistance,
Junction to Ambient
Still Air
With 500 LFPM
DC CHARACTERISTICS (VEE
= - 5.2 V,
± 5% TA
II
°C
TJ
+ 175
°C
RYJA
80
50
°CIW
= O°C to
+ 70°C after thermal equilibrium is reached.)
Fig.
MC10318L9
MC10318L
MC10318CL7
MC10318CL6
= 25°C)
Zero Scale Output Current (Pin 14 or 15) ITA
10
Zero Scale Output Current Temperature Drift
(Pin 14 or 15)
0< TA < 25°C
25°C < TA < 70°C
10
Full Scale Output Current Temperature Drift
(Pin 14 or 15)
0< TA < 25°C
25°C < TA < 70°C
Full Scale Symmetry IIFS -
10
Output Resistance (Pin 14 or 15) (TA
=
12
25°C)
IFSS
RO
liB
Reference Amplifier Bias Current Temperature Drift
0< TA < 25°C
IIref = 3.2 mAl
25°C < TA < 70°C
-
5.0
50
"A
nAf'C
-
±17
±2.0
-
-46.00
Typ
-
- 51.00
-56.00
mA
ppmrC
-
±50
±10
-
±0.005
±0.005
±0.02
±0.04
%/%
-
±21
±100
fLA.
+2.5
V
-1.3
-
-
-
-
69
-
kfl
±3.2
-
mV
-
-
±10
±4.0
-
-
4.0
15
-
-40
-10
i1IIB/dT
Reference Amplifier Common Mode Range
=
IFS
i1VIO/dT
Reference Amplifier Bias Current (Pin 10)
(lref = 3.2 mAl
= - 5.2 V) (TA
-
IZS
VIO
Reference Amplifier Offset Voltage Temperature Drift
0< TA < 25°C
25°C < TA < 70°C
(VEE
Unit
%FS
-
VOC
= 25°C)
Max
±0.10
±0.19
±0.39
±0.78
-
IFSPSS
Output Voltage Compliance (Pin 14 or 15)
Full Scale Current Change'" % LSB (Specified
Nonlinearity) (TA = 25°C)
Reference Amplifier Offset Voltage (TA
Min
--
i1IFSrC
I
MC10318L,9
MC10318CL6,7
IFS)
Symbol
IZSIi1T
Full Scale Output Current (Pin 14 or 15)
(lref = 3.2 mA, Do-D7 = 1)
Full Scale Output Sensitivity to Power
Supply Variations (Pin 14 or 15)
(- 4.94 V < VEE < - 5.46 V)
°C
-65 to + 150
Characteristics
Nonlinearity (Integral)
(Pin 14 or 15)
(Ca IFS = 51 mA, 25.5 mAl
+ 70
Tstg
Ceramic Package
Junction Temperature
o to
TA
",vrc
"A
nAf'C
VICR
-
±1.15
-
VICMRR
-
58
-
dB
RIN
-
1.0
-
Mfl
lEE
-
90
130
mA
V
25°C)
Reference Amplifier Common Mode Rejection
Ratio (TA = 25°C) IIref = 3.2 mA, VICR = 0 to - 2.0 V,
Pins 1-8 = Logic 1)
Reference Amplifier Input Impedance
(Pin 10) (TA = 25°C)
Power Supply Current
(Pins 1 thru 8 Open, Iref
= 3.2 mA, Includes 10 +
10)
MOTOROLA LINEAR/INTERFACE DEVICES
6-46
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
AC CHARACTERISTICS (TA ~ 25'C, VEE ~ - 5.2 V, -... 5%)
Feedthrough Current -
Characteristics
Fig.
Svmbol
All Bits Off
9
IFC
f~10
,
f~
Distortion - «ci '0 )
(Sinewave applied to reference amplifier Input,
00-07 ~ Logic 1)
C ~ 0.01 .,.F, f ~
C ~ 0.01 .,.F, f ~
C ~ 0.001 .,.F, f ~
C ~ 0.001 .,.F, f ~
C ~ 240 pF,
f ~
kHz
100 kHz
Min
TVp
Max
-
2.0
18
-
%
20
65
340
600
600
kHz
kHz
kHz
kHz
kHz
Reference Amplifier Slew Rate
(Step change at Pin 10, all bits on)
THD
THD
THD
THD
THD
--
1.0
5.0
1.0
2.0
0.8
-
13
C
C
C
~
mAl.,.s
0.01 .,.F
.,.F
240 pF
= 0.001
~
Unit
.,.A POp
Settling Time (to ",0.19% of Full Scale)
1,22
ts
I LSB Change
All Bits Switched
Propagation Delay
2
tp
Output Glitch Energy (with De-Skewing Capacitors)
(Input Change: 01111111 ~ 10000000)
Glitch Duration
-
0.5
5.0
20
-
7.0
10
-
-
ns
5.0
-
ns
50
-
lSB'ns
5.0
-
ns
VEE (Pin 9) The power supply pin. VEE is nominal - 5.2 V,
DIGITAL INPUT VOLTAGE LEVELS
::t5%.
Volts (See Note)
TA
V,Hmax
V,HAmin
V,LAmaX
O'C
-0.845
-1.151
-1.516
-1.868
25'C
-0.810
-1.105
-1.505
·-1.850
70'C
-0.727
-1.052
-1.480
-1.830
Gnd (Pin 16) The ground pin. This line should be as noise-free
as possible in order to obtain a noise·free output.
VILmin
NOTE: VEE - ··5.2 V, ... 5°'0 Inputs are MECL 10,000 compatible within
the temperature and power supply ranges listed. See MECL System
Design Handbook for further details. See Fig. 19 in this data sheet.
FIGURE 1 -
FUNCTIONAL PIN DESCRIPTION
SETTLING TIME
00-07 (Pins 1-8) The eight ECl digital inputs compatible with
MECL 10,000 series devices. Logic "0" is nominally - 1.8 V,
and Logic "1" is nominally - 0.9 V.
Vref_ (Pin 10) The high impendance input of the reference
amplifier. This input is normally grounded, but may be used
for ac applications involving modulation, digitally controlled
gain. etc. Normal operating range is from ground to VEE + 2.9
V (nominally - 2.3 V).
Vref. (Pin 12) The noninverting input of the reference amplifier. The inverted output of the reference amplifier is internally
fed back to this input, thus causing it to track Pin 10. A nominal
3.2 mA is to be supplied to this pin from an external (stable
and noise free) voltage source and current setting resistor.
FIGURE 2 -
00-07
Compo (Pin 11) A nominal 0.01 .,.F capacitor is connected to
this pin and to ground to stabilize the reference amplifier.
Lower values of capacitor may be used if a good PC board
layout is used, where frequencies higher than 10 kHz are applied to the reference amplifier.
Inputs
0.9 V
- 1.8 V -'
PROPAGATION DELAY
50%
o mA-i\
t- 50%
i;; (Pins 14,15) The complementary current outputs. Current
flow is into the DAC and varies linearily with Iref and the digital
input code. lout increases as the digital input increases. Output
compliance range is -1.3 V to + 2.5 V.
'0 ,
-
-51 rnA
~
I-'-::tp---
MOTOROLA LINEAR/INTERFACE DEVICES
6-47
II
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
REFERENCE AMPLIFIER RESPONSE
Inverting Input IVr• _)
Test Circuit of Fig. 14
Noninverting Input IVref+)
Test Circuit of Fig. 11
FIGURE 3 - FREQUENCY RESPONSE
FIGURE 6 - FREQUENCY RESPONSE
180
"
-2.0
~-6.0
10
10 K
t, FREQUENCY 1Hz)
1K
100 K
FIGURE 4 - FREQUENCY RESPONSE
100 K
FIGURE 7 - FREQUENCY RESPONSE
180
No..
-1.0
10
Phas",
~ -2.0
~ -3.0
~ -4.0
\
gj -5.0
~ -6.0
~
-8.0
-50
1K
.~.in
~ I=~~
lOOK
t, FREQUENCY 1Hz)
1K
1M
FIGURE 5 - FREQUENCY RESPONSE
~
I-
~
~
-2. 0
40
""-
m-- 4.0
80 (i):!:!-S. 0
*~-8.0
10K
lOOK
t, FREQUENCY 1Hz)
Pha~
-30
f-C
-36
lOOK
80
~
Ii:
:r
100 ~
= 240 pF
-
1i:~-1 2
160:r gj -14
"'u 6
~~-1
200iE~-1 8
w-2O C = 240pF
240 a:_ 22
-24
\.
\.
"\
I
I
1M
t, FREQUENCY 1Hz)
1M
180
......
160
I'"\.
1
120~~-1O
-18
-24
~
:s
o
I"\{ain
a
Q
FIGURE B - FREQUENCY RESPONSE
I
r\.
i-'" -12
Phas~
:s
120
I
10K
-6.0
I\, \.
0-14
~ ~-16
-70 iE
-18
-80
~-20 C = 0.001 ",F
-22
-90
-24
\
I
I
-9.0
160
~-4.0
-60~
1 '\
C = 0.001 ",F
(i)
-.30 ~ ~-6.0
-40 ~ !:-8.0
\
<.:>
:5 -7.0
-~O
\Gain
0
-2.0
lOOK
10M
Pha..
1
'\.
1
'\.
'"\..
\.
"
1M
t, FREQUENCY 1Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
6·48
Gain
60
10M
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
TEST CIRCUITS
AGURE 9 -
FIGURE 10 -
FEEDTHROUGH MEASUREMENT
ZERO/FULL SCALE CURRENT
10
Logic
+ 10.56 V
for Zero Scale 10
=---="0"7'" 1 for Full Scale to
3.3 k
Vtef
20 !l
3.3 k
:;;!;0.Q1 "F
-=
Signal Generator Conditions: 0 to - 1 V p.p Sinewave
FIGURE 11 -
-=
- 5.2 V
GAIN/PHASE MEASUREMENT
FIGURE 12 -
OUTPUT RESISTANCE
.10.56 V
Vout
3.3 k
Vref
1,0 k
Vin
20 !l
750
Ie
IO,OllJ. F
-= - 5.2 V -=
Signal Generator Conditions: 0 to
5.2 V
-=
-Output Ro
3.8 V
"0
See Figures 6-8
Reference dB Level: See Text
FIGURE 13 -
-=
2 V p.p Sinewave
FIGURE 14 -
REFERENCE AMPLIFIER SLEW RATE
-+-
Output
GAIN/PHASE MEASUREMENT
10.56 V
3.3 k
Vref~
12
3.3 k Vref
'---t::---r.;:-r-::-'
20 U
620
I
20 !l
20
I
I-= C--5.2 V
I-= C-5.2 V -=
III
Signal Generator Conditions: 0 to - 2 V p.p Sinewave
Reference dB Level: See Text.
MOTOROLA LINEAR/INTERFACE DEVICES
6-49
See Figures 3-5
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
OPERATIONAL INFORMATION
with the digital inputs for applications such as digitally
controlled gain of an ac signal, digitally controlled amplitude modulation, and others. Either the positive or
negative input of the reference amplifier may be used,
depending on the application. There are, however, differences in the manner in which an ac signal is to be
applied.
1) When applying a signal to the Vref- (Pin 10) input
(See Figure 16), the signal must be kept within the range
of 0 to - 2.3 V. The input has a high impedance (typically
1 Megohm). The Vref+ pin (Pin 12) will track this signal,
causing Iref to vary, in turn causing 10 and i; to vary.
The ac component of 10 (and i;) will be in phase with
the applied signal. The ac gain of the circuit shown is:
Typical DAC Operation
The MC10318 is designed to be operated with an Iref
(Pin 12) of 3.2 mA, resulting in a full scale output current
(10) of 51 mA when DO through 07 are'at a Logical "1"
(-0.9 V). The transfer equation for 10 is therefore:
10
=
A
Iref X 16 X 256
("A" is the binary value of the digital input).
II
Typically Vref .. (Pin 10) is connected to Ground, and
Iref is supplied to V ref, (Pin 12) by means of an external
supply Vr (see Figure 15). A resistor inserted between
Pin 10 and Ground will minimize temperature drift, and
should have a value equivalent to that connected to Pin
12. Any noise or ripple present on the reference current
will be present on the output current, and the stability
of the reference directly affects the output current's stability. The ground connection for Vref- should be chosen with care so as not to pick up noise (digital or
otherwise).
The complementary outputs (10 and i;) are high
impedance current sources having a compliance range
of 3.8 V (-1.3 to T 2.5 V). 10 increases with increasing
digital input, while i; decreases. Their sum is a constant
equal to 15.94 x Iref. Neither output can be left open
- an unused output must be connected to ground or
a load resistor. Typically both outputs should be loaded
similarly for best speed and accuracy performance. A
compensation capacitor must be connected between
Pin 11 and Ground to stabilize the amplifier. A 0.01 fJ.F
ceramic is satisfactory for most applications, and should
be located physically close to the device. The ground
side of the capacitor should be noise-free. When op. erated as above, the output(s) will be controlled by the
digital inputs, and the MC10318 can be used for various
functions such as waveform generation, process control, AOC conversion, and others.
Applying the above to the test circuit of Figure 14
yields a gain of 0.0966, which is the 0 dB reference level
for the curves of Figures 3-5.
FIGURE 16 - AC OPERATION. NONINVERTING
Vref
Vout
Rref
VrefRref
ae Signal
10> Vin > -2.3)
FIGURE 15 - TYPICAL OPERATION
If the peak values of the applied ac signal cannot be
kept within the above mentioned voltage range, an alternate circuit is shown in Figure 17.
FIGURE 17 - AC OPERATION, NONINVERTING (ALTERNATE)
Digital Input "A"
V,of
'00
07 \
10
:r
Common Mode Range - AC Operation
The reference amplifier inputs (Pins 10 and 12) may
be used to control the output current in conjunction
8e
C
-2y
':' -5.2V
Signallp-p " 2 V)
MOTOROLA LINEAR/INTERFACE DEVICES
6-50
Vou!
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
sign guidelines apply, and should be implemented.
Maximum speed response requires careful PC board
layout and choice of components. See Motorola's MECl
System Design Handbook for a complete explanation
of specifications and characteristics. Figure 19 shows
a typical ECl interconnection with recommended values
for optimum speed performance. Other values of RT
and VTT may be used, but at a slight increase in overall
propagation delay. Unused inputs should not be left
open, but should be connected to a logic 0 ( -1.8 Vl.
or a logic 1 (- 0.9 V). Resistors RT should be connected
at the receiving end of the interconnection, i.e. physically located adjacent to the MC10318 inputs, for best
speed performance.
The compensation capacitor (Pin 11) of Figures 16
and 17 is to be nominally 0.01 IJoF for best overall stability. If frequencies higher than 10 kHz are to be applied
to the reference input, a smaller value capacitor will be
necessary as indicated by Figures 3-5. However, greater
care will be necessary in the breadboarding and PC
layout to prevent instabilities caused by unintended
feedback paths.
2) When applying a signal to the Vref, (Pin 12) input
(see Figure 18), the effect is a direct modulation of the
reference current supplied by Vref. Pin 12 is a virtual
ground, and therefore the current Iref is equal to:
Iref
V f
V'
Rref
Ri
= .-UL + ...J
10 and r;:; will vary with the reference current, but the
ac component will be 180' out of phase with the applied
signal. The ac gain of the circuit shown is:
AV out
AVi
FIGURE 19 -
= -AxRl
16xRi
Applying the above to the test circuit of Figure 11
yields a gain of - 0.3188, which is the 0 dB reference
level for the curves of Figures 6-8.
The reference current Iref must always flow into Pin
12, requiring that the values of Vref, Rref, Ri, and Vi be
chosen so as to guarantee this.
FIGURE 18 -
STANDARD MECllNTERFACE
MECL
10,000
Device
I-I-::==~;:t:j:~~
AC OPERATION, INVERTING
vn
Vref
Interfacing a TTL system to the MC10318 is easily
accomplished by the use of two MC10124 devices (Figure 20).
Vout
Rref
FIGURE 20 Ri
R2
sl~nt
- R2
ac
I
I
TTL INTERFACE
C
-= - 5.2 V -=
:=
Ri/IRref
The compensation capacitor (Pin 11) of Figure 18 is
to be nominally 0.Q1 IJoF for best overall stability. If frequencies higher than 4 kHz are to be applied, a smaller
value capacitor will be necessary as indicated by Figures
6-8. However, greater care will be necessary in the
breadboarding and PC layout to prevent instabilities
caused by unintended feedback paths.
DIGITAL INTERFACE
OUTPUT CHARACTERISTICS
The digital inputs (Pins 1-8) are compatible with
MECl 10,000 series devices over the temperature and
VEE range listed on page 3. Standard MECl 10,000 de-
The MC10318 DAC has been designed specifically for
high-speed operation by incorporating ECl structured
inputs, bit switching circuits which are small in size and
MOTOROLA LINEAR/INTERFACE DEVICES
6-51
..
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
simple in operation, and high-current complementary
outputs (which permits current steering rather than onoff switching). In this manner, very short propagation
delays and settling times are possible.
FIGURE 21 -
PRECISION HIGH-SPEED MEASUREMENTS
Clock
Output Glitch
•
All DAC's will produce a glitch at the output when
various bits are switched in opposite directions, due to
differences in transition times of the switching transis·
tors. During the switching period, typically the output
current will momentarily seek a value other than the
desired final value, and then return to and settle at the
final value. This glitch can be several LSBs in magnitude, but of a very short duration (5-6 ns). In some
instances, the output current may overshoot, and then
undershoot before reaching the final value, resulting in
a "glitch doublet."
The glitch ismost apparent when switching the higher
order bits, and in the case of the MC10318, the maximum glitch generally occurs when switching bit D5 and
the lower 5 bits (typically 85 LSB·ns). Switching bit D6
and the lower 6 bits produces a similar but slightly reduced glitch. Switching bit D7 and the seven lower bits
(major carry transition) results in a glitch of typically 50
LSB·ns, with an amplitude of 17 LSBs. Switching of
lower order bits while maintaining the higher ones constant produces glitches typically of less than 1 LSB in
magnitUde, and less than 10 ns in duration, and are
generally not considered to be of significance.
Glitches can be removed from the output by filtering,
or by using a sample-and-hold circuit on the output, or
by using de-skewing capacitors on the higher order bits.
See Fig. 31.
Output glitch is generally specified in terms of glitch
energy, which is the area under the curve of the waveform. Most glitches appear as a triangle, and so the area
is simply '12 x t x lil, where t is the duration of the
glitch, and lil is the amplitude normalized in terms of
LSBs. In the case of a glitch doublet, having both positive and negative amplitude, the areas are summed
algebraically. It is possible, therefore to have a glitch
with zero energy, although having amplitudes of several
LSB's.
In applications where the output glitch is of concern,
steps can be taken to minimize its magnitude. The two
main factors to consider are: 1) That the 8 bits of data
reach the MC10318 simultaneously; and 2) that the PC
board layout prevent noise from reaching the MC10318.
It is obvious that if the updated 8 bits are not received
by the DAC simultaneously, even an ideal DAC will not
produce an ideal waveform. Where simultaneous transmission by the sending device(s) cannot be guaranteed
(such as two cascaded counters), latches should be used
ahead of the MC10318. The latches should then be
clocked after their inputs have settled. Suggested latches
are the MC10133/MC10153/MC10168 at the ECL level,
and the SN74LS273 at the TTL level.
Rref
NOTE· Use Buffer
or FET probe between MSB and
Scope Trigger
Nonlinearity
Integral nonlinearity has been specified, rather than
differential nonlinearity, as this is a better indicator of
the maximum error to be expected. Integral nonlinearity
is measured by comparing the actual output (at each
digital value) with the expected ideal value. The expected values lie along a straight line between zero and
the full scale output current. The MC10318 series will
not differ from the ideal value by more than the specified nonlinearity.
PC Board Layout
A proper PC board layout is very important in order
to obtain the full benefits of the MC10318's high-speed
characteristics. Each of the current paths (10,1;;, lEE, Iref,
etc.) must be carefully considered to avoid interference,
and isolation from other circuits on the board (particularly digital) is essential. By-passing of all supplies is,
of course, necessary, and in some cases, by-passing to
VEE may be more beneficial than by-passing to Ground.
Sockets should be avoided as the extra pin-to-pin capacitance can slow down the ECL edges and/or the output settling time. PC board layout should include the
following guidelines:
1) A dedicated ground track from the power supply
to Pin 16 (Gnd);
2) A single dedicated ground track from the power
supply to the two load resistors associated with
10 and 1;; - this results in a constant dc current
in this track;
3) A separate ground for the circuitry associated
with Vref+, Vref., and Comp (Pins 10-12). Any
noise on this ground will feed through the reference amplifier and show up on the output;
4) The compensation capacitor must be physically
adjacent to Pin 11;
5) Bypass VEE (Pin 9) with a 0.1 flF to the ground
line feeding the load resistors;
6) Provide proper terminations at the inputs - the
suggested values for RTand Vn will provide best
speed response;
MOTOROLA LINEAR/INTERFACE DEVICES
6-52
~C10318L9,~C10318L,~C10318CL7,~C10318CL6
7) Bypass VTI to VEE and to Ground with 0.1 ",F
capacitors;
8) If the power supplies are not on the same PC
board with the MC10318, bypass VEE and VTI to
Ground with (minimum) 10 ",F and 0.1 ",F where
the supply voltages enter the PC board;
9) Use of a ground plane is mandatory in all high
speed applications;
10) Keep all TIL circuitry tracks separate from the
MC10318 by means of ground tracks and/or
ground planes.
is typically 1 volt, then 1 LSB is approximately 4 mY.
Since TIL circuitry can easily generate 50 mV noise on
the ground line, the need for isolation is apparent.
The above points are not the only ones to be considered by the designer, as each application will have its
own individual additional requirements.
Propagation Delay
The propagation delay is measured from the 50%
point of the input transition to the 50% point of the
output transition. Since the typical propagation delay
is on the order of 5 ns, see Figure 21 and the information
in Settling Time if this parameter is to be measured.
Switching 1 LSB or all of the bits simultaneously produces no significant difference in propagation delay.
Many of the above points have to do with isolating
the device from all other circuitry, since most applications involve using the MC10318 (which is 50% analogi
in a (noisy) digital circuit. If the output voltage swing
FIGURE 22 -
SETILING TIME MEASUREMENT
1.0 k
+2.5 V
1.0 k
-1.2925 V
7.5
Scope
n
-1.3075 V
Scope
+2.5 V
2.0 k 2.0 k
(Rl)
+12 V
360
n
LM301A
NOTES:
1) Pulse generator outputs - 0.9 V to - 1.8 V, tr and tf
"" 2 ns. ,.
2) Adjust vref for full scale output at VA = -1.3000 V.
3) Adjust Rl for -1.3075 V at input of lower comparator.
4) Adjust R2 for -1.2925 V at input of upper comparator.
5) Rl, R2 are 20 turn trim pots.
6) Keep all wiring as short, tidy as possible - isolate
all digital and analog supplies, grounds, signal lines,
etc.
7) Heavily bypass all supplies at each device, and reference (-) inputs to the comparators.
8) Comparators are high-speed devices, such as
AM687ADL
9) Account for comparator offset when setting reference values.
MOTOROLA LINEAR/INTERFACE DEVICES
6-53
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
Settling Time
The settling time is defined as the time from the 50%
point of the input transition to the point at which the
output enters into and stays within ± V,LSB (the error
band) of the final value. Minimum settling time occurs
when the output enters the error band at the maximum
slew rate. and then settles out within the band. In actuality, however, the output's slew rate will lessen prior
to entering the error band, and then may exit and enter
the band once or twice as it settles to its final value. The
settling time is determined by the last time the output
enters the error band. See Figure 1.
II
When testing for settling time, the measurement technique used will have an effect on the result. Simply
connecting scope probes to an input and output is generally not satisfactory due to the capacitive loading (typically 10-20 pF) of the probes. The rise (fall) time of an
ECL input can be significantly increased by such a
probe, with the result that the inputs of the MC10318
may be skewed from each other, which, in turn, affects
the output. However, probes with low input capacitance, on the order of 2 pF or less (such as FET probes),
can be used with very little degradation of the waveforms. The overall propagation delay of the probe (from
tip to scope input) must be taken into account, as this
can be on the order of 10 ns.
When attempting to view the output on a scope, sev·
eral factors need to be considered. If the output swing
is a full scale transition (e.g., 1.0 V), 1 LSB is 3.9 mY.
The scope's amplifier must then be set at a sensitive
range (5 mV/cm or 10 mV/cm), with the result that the
scope's amplifier will be saturated when the MC10318's
output is at the initial valu.e. When the device inputs are
switched, the output approaches the final value, but the
scope's amplifier will require some time .to come out
of saturation, and then may overshoot, causing a false
indication. In order to overcome this problem, the
MC10318 was tested for settling time by connecting the
output to a dual high-speed comparator configured as
a window detector. The window is 1 LSB wide, centered .
about the final value. The outputs' of the comparators
are then monitored on a.scope',-as they indicate when
the MC10318 output is settled within the error band.
Propagation delays of the comparators, scope probes,
and cable lengths are taken into account. See Figure 22.
This method of monitoring the DAC's output, although
indirect, does not cause changes to the output waveform because of probe loading, characteristics of the
scope, or noise which the probe (and cable) may pick
up.
APPLICATIONS
Voltage Output
There are two methods of converting the current output of the MC10318 to voltage outputs, depending on
the voltage swing desired. For a limited range
«3.8 V p-p) the circuit of Figure 23 can be used.
FIGURE 23 -
Vs
RL
OV
25.5
+2.5 49
+2.5 74.5
+1.0 3'
V.
Oto-l.3V
+2.5 to 0 V
+2.5 to -1.3 V
+1.010 -1.0V
VOLTAGE OUTPUT
Yo
-1.3VtoOV
Oto +2.5V
-1.3 to +2.5 V
-1.0to +1.0V
Vo= - V,t; ~ ~e Rl+Vs
Where a larger voltage swing is required, an op amp
is required at the output. The choice of op amp will be
based on whether accuracy or speed is of primary im·
portance. Where repeatable and stable accuracy is required, the op amp characteristics to consider are openloop gain, offset voltage, bias current, and temperature
drift. Where speed is paramount, a wideband amplifier
should be used. Slew rate, propagation delay, and settling time of the op amp are the primary factors to evaluate. The PC board should be designed for high frequency operation, possibly using Microstrip or Stripline
techniques. See Figure 24 for a suggested circuit.
FIGURE 24 -
r;;
VOLTAGE OUTPUT
Connecting 10 and
as shown in the above figures
places a constant dc load (51 mAl on the Vs supply,
thus facilitating its design. The Gain Adjust resistor
should be a 20 turn trimpot, as this will result in one
turn equaling approximately 1 LSB of adjustment (for
the recommended values in the figure). All of the resistors should have similar temperature coefficients for
best temperature stability.
MOTOROLA LINEAR/INTERFACE DEVICES
6-54
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
WAVEFORM GENERATION
FIGURE 25 -
FIGURE 26 -
SAWTOOTH GENERATOR
TRIANGLE GENERATOR
Clock
Ie
200
elk
A
74lS93
e
;'I;
;;
~
o
FIGURE 28 FIGURE 27 -
OUTPUT CONNECTED TO 75
n LINE
SINEWAVE GENERATOR
+2.0 V
-- --
.............
...... ......
..
... ..".."
7S0
Rre!
oc
"
""
.
.
OA
"'i>--L...:===I::t.J-J
"
"
"
."
,.
"
.."
.
FA
Zo must be matched to within 0.4%
to keep initial reflection below 112 LSB in magnitude.
NOTE: Terminating Resistors and
FIGURE 29 -
OUTPUT CONNECTED TO 50
n LINE
FIGURE 30 -
DIGITAL MULTIPLICATION
Logic Inputs
+V",I
100- --
07'
500
Vo
500
NOTE: Terminating Resisto,. Ind
20
Vref
+10Y
•••
3Il71JO
••.R>
mult be motchod to
within 0.4% to keep initial reflection below 112 LSI in
magnitude.
20
330
20
Vo _ - At x ::,)( xVR'RzXx1"M x Ru _ -K x A1 x A2
(With aUOQHt8d v.......
Vo range isOto -1,GV)
.3.0 k ReIietor + 100 n Trimpot
obtained by monitoring the differential voltage at Pins
14 and 15 (with equal load resistors).
3) When connecting the outputs to transmission lines
(See Figures 28 and 29). proper transmission line theory
and techniques must be used for optimum performance.
NOTES:
1) When generating waveforms at low frequencies, filtering the output is recommended to smooth out the
steps.
2) In many applications, bipolar voltage output may be
MOTOROLA LINEAR/INTERFACE DEVICES
6-55
II
I
s:
...
n
FIGURE 31 -
S
...
EVALUATION CIRCUIT BOARD
CO
Voul
An,logln
10
JD
t
....4f
- .....,p'
'-~'"~~ril
I ---, 'r-
0
-I
0
______ ,
",J,-"""'G~""
NO,,",
I
"iJMPRI
CO
.~An'IoCIGround
lWIi
~~
s:
...s:
S
...
n
..,
l
L
Sampling
Clookln
-------
r
________ ,
s:
...
...
n
:ll
0
r
o
w
1-3SpF
Each
»
r
I I
Z
CO
n
0,,,,,,'"::..,
III,
~
m
'f
U'I
<»
»
:ll
s:
:::,
n
....
Z
-I
m
:ll
...."
-n
"""'" I
»
()
I
I
m
0
m
<
()
m
..,~
IL '.......... ,,:to
T
t:o -•..........
'
"
________ ~__
en
S.,,,,.
J'
-I!lV 0.'-J'J.'OlloF
NoM
Odd # Only
~.0nIy
1-0.12&10+0.82&
+0.510+2.5
-2..6IO-o.s
_OPAMPSAREMC34DD2BP
P.P
VIN
1
2
4
5
,--10_
RIN = 500
R1
R2
R3
51
51
51
51
51
0
1300
3000
3000
2700
RIN = 750
R1
R2 R3
RIN = 6000
R1
R2
R3
'" 75 0 x 1200 0
1300 100 150 150 1000 750
1000 91 300 100 1200 910
750 150 120 30 1000 1200
300 100 270 30 750 2700
II
_ _________ 1
1200
750
300
300
300
RIN
R1
1000
2000
2000
3000
1500
= 10000
R2
0
1000
1500
1200
2700
R3
'"
1000.
510
300
300
S
....
~
I;
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
EVALUATION BOARD FOR HIGH SPEED TESTING
Introduction
In order to facilitate evaluation of the MC10318 DAC,
a PC board layout has been developed providing the
appropriate signal levels and timing requirements. The
board is designed to simultaneously evaluate the
MC10315 and the MC10317 flash ADC's in conjunction
with the MC10318 DAC, and the system is capable of
passing video speed signals at sampling rates of up to
15 MHz. However, the MC10318 may be evaluated alone
by installing only the appropriate components. The
board may be purchased from Motorola (blank). or the
user may make his own from the artwork shown on
Figures 33 and 34.
Board Specifications
Power supply requirements: + 15 V «L
- 15 V
- 5.2 V (ci
+ 5.0 V
Options
Input Signal - The p-p voltage level of the analog
input signal (when using the ADC converters) is accommodated by selection of the input resistors from the
chart (see schematic).
ALT IN - The analog signal may be applied directly
to the ADC converters (by-passing the on-board amplifier) by applying the input signal to this connector, and
relocating the jumper adjacent to the AlT IN connector.
The signal source must be capable of driving 2.5 k ohms
in parallel with approx. 140 pF.
V+ OUT - A pullup voltage (max. +2.5 V) may be
applied to this connector in order to increase the output
voltage swing. See the APPLICATIONS section of this
data sheet. The 20 ohm load resistors may then be
changed to other values. The jumper adjacent to the A
OUT connector must be relocated.
100 mA.
«, 120 mA.
550 mAo
«i 300 mA.
Evaluating the MC10318 only - Only those components within the dotted line on the schematic are required. The digital inputs (ECl level) are to be applied
to a connector strip located in pins 15-22 of the
MC10317 position. + 15 V and - 5.2 V supplies are required. The latches transfer the information on the rising edge of the clock.
Sampling clock: VIH = - 0.9 V, Vil = -1.8 V (ECl
levels) terminated with 50 ohms, 15 MHz max.
Analog Input level: Selectable, see chart.
Analog Input Impedance: Selectable, see chart.
Output level: 0 to - 1.0 V, user alterable.
Digital Input levels: (When ADC converters are not included) VIH = - 0.9 V, Vil = -1.8 V (ECl levels).
Video Testing
The above described printed circuit board has been
tested, with a standard video test signal, for differential
phase and differential gain (40 IRE sub-carrier on a 100
IRE ramp, sampled at 14.3 MHz) with results of 1% gain
error and 20 phase error. The signal was obtained from
a Tektronix 147A video test generator, applied to the
AlT IN connector. The output (of the MC10318) was
configured into a 75 ohm output impedance, and applied to a vector scope.
Tests conducted with the Evaluation Board in a video
system (video camera and a TV monitor) showed no
visible degradation of picture quality (at 8 bits resolution). The board provides an easy means of testing picture quality at reduced number of bits, or for conducting
any test on a digitized video signal.
Operation
The power supplies should be connected as shown
in Figure 32. The leads should be short and direct.
The ClK Input (necessary if the ADC converters and/
or the latches are used) uses a BNC connector, and is
terminated with 50 ohms to ground.
The Analog Input level (if the ADC converters are installed) depends on the input resistors selected (see
chart). The output ofthe buffer amplifier should produce
a maximum 4 V p-p signal, or an amplitude equal to the
references (user adjustable).
The Analog Output is 0 to - 1.0 V, corresponding to
a digital input (to the MC10318) of FF and 00 respectively. Output impedance is normally 20 ohms, but may
be varied by the user (see previous text).
MOTOROLA LINEAR/INTERFACE DEVICES
6-57
II
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
FIGURE 32 -
COMPONENT LOCATION AND EXTERNAL CONNECTIONS
Alternate
Input (See Text)
MC10315/MC10317/MC10318
ADC - DAC EVALUATION SYSTEM
MOTOROLA
PHOENIX, AZ..
Input
Signal
VRT, MC1'J315
VRS, Me 10315
VRT, MelD317
VRB.MC10317
Output Pullup
VoHage
(See Teltt)
15 V
15 V
5.2 V
5.0 V
Power
Supply
Power
Power
Supply
Supply
Power
Supply
MOTOROLA LINEAR/INTERFACE DEVICES
6-58
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
FIGURE 33 - COMPONENT SIDE ARTWORK (TOP)
(OVERALL SIZE = 6.00" x 8.00")
a ·I
I
·I
·I
· I
I
I
I
·R
MOTOROLA LINEAR/INTERFACE DEVICES
6-59
II
MC10318L9, MC10318L, MC10318CL7, MC10318CL6
FIGURE 34 -
SOLDER SIDE ARTWORK (BOnOM)
II
MOTOROLA LINEAR/INTERFACE DEVICES
6-60
MC10318l9, MC10318L, MC10318CL7, MC10318CL6
FIGURE 35 8
MC10318 EQUIVALENT CIRCUIT
MSB
2ndMSBL
r ----
ttL? ?L
7654321
16
- - - - - - - - - - -1I
I
I
I
.---+-__
I A
I
1
1
r
r
I
I
I
I
1
1
1
1
1
I
I
I
I
A
I
I
I
+r
+r
+r ~ r -i T-~ ~~ut
~1: ir: r:1 r:11 ill-tl~::ut
/
1
I
I
1
1
I
1
I
I
1
1
I
1
Detail A - 8 Times
1-
12o---~---------,
10
lLSB
r
I-l-II A I A I A I A
I
I
I
I
1
I
I
1
1
I
I
I
;1- }rI
I
50 k
A
r
cr------.4
11
MOTOROLA LINEAR/INTERFACE DEVICES
6-61
I
I
1
I
II
®
MCI0319
MOTOROLA
Specifications and Applications
Information
HIGH SPEED
8-BIT ANALOG-TO-DIGITAL
FLASH CONVERTER
HIGH SPEED
8-BIT ANALOG-TO-DIGITAL CONVERTER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC10319 is an 8-bit high speed parallel flash AID converter.
The device employs an internal GrAY code structure to eliminate
large output errors on fast slewing input signals. It is fully TTL
compatible, requiring a + 5.0 V supply and a wide tolerance negative supply of - 3.0 to - 6.0 V. Three-state TTL outputs allow
direct drive of a data bus or common I/O memory.
The MC10319 contains 256 parallel comparators across a precision input reference network. The comparator outputs are fed
to latches and then to an encoder network, to produce an 8-bit
data byte plus an overrange bit. The data is latched and converted
to 3-state LS-TTL outputs. The overrange bit is always active to
allow for either sensing of the overrange condition or ease of
interconnecting a pair of devices to produce a 9-bit AID converter.
Applications include Video Display and Radar processing, high
speed instrumentation and TV Broadcast encoding.
II
L SUFFIX
CERAMIC PACKAGE
CASE 623-05
• Internal Grey Code for Speed and Accuracy, Binary Outputs
• 8-Bit Resolution/9:Bit Typical Accuracy
• Easily Interconnected for 9-Bit Conversion
• 3-State LS-TTL Outputs with True and Complement Enable
Inputs
PIN DIAGRAM
• 25 MHz Sampling Rate
• Wide Input Range: 1.0-2.0 Vp _p Between ±2.0 V
• Low Input Capacitance: 50 pF
• Low Power Dissipation: 618 mW
• No Sample/Hold Required for Video Bandwidth Signals
• Single Clock Cycle Conversion
BLOCK DIAGRAM
Logic
Analog
GND
Input
VEE
vee(D)
(13)
(11.17)
r
Vin
(14)
MC10319
VAT
(24)
Bia-;-
r----'
I
I
I
I:
I
I
I
I
:I
I
I
: I
I I
:
I
256
0.
I Comparators
;
I
I
I
1
I
I:
I
IL ____ I
~
L.. ___
1
J
r----'
I
I
I
I
I
I
:
:J
I
1 Differential
I :
(2.12.
16.22)
Latch
Array
I
IL_
b,'
~
01
r----
I
C d
D'
I
Output
latches
T rev I 0 e
rans ator I
:
r
I
and
I Eel-TTL I
I~onverters r
:
I
:
I
__~
I
I
I
L ____ I
~
VEE
05 (6)
I
I
I
VIN
GND
06 (5)
I
G
Range
(3)
07 141
I
:
:
I'
Vee(AI
Over-
I
I
I
IL
D4(7J
03 (81
02 (91
01 (10)
DO (211
VAS
(231
(19)
Clock
(181
Enable
(201
Enable
Temperature Range
O· to +700C
MOTOROLA LINEAR/INTERFACE DEVICES
6-62
MC10319
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Positive Supply Voltage Differential
Symbol
Value
Unit
VCC(A),(D)
VEE
+7.0
-7.0
Vdc
VCC(D)VCC(A)
-0.3 to +0.3
Vdc
Vdc
Digital Input Voltage (Pins 18-20)
VI(D)
-0.5to +7.0
Analog Input Voltage (Pins 1, 14,23,24)
VI(A)
-2.5 to +2.5
Vdc
Reference Voltage Span (Pin 24-Pin 23)
2.3
Vdc
Applied Output Voltage (Pins 4-10, 21 in 3-State)
-
-0.3 to + 7.0
Vdc
Junction Temperature
TJ
+150
°c
Storage Temperature
Tsta
-65 to + 150
°c
..
.
Devices should not be operated at these values. The Recommended Operating Limits provide gUidelines for actual device operation .
RECOMMENDED OPERATING LIMITS
Parameter
Power Supply Voltage (Pin 15)
(Pins 11, 17)
Symbol
Min
Typ
Max
Unit
VCC(A)
VCC(D)
+4.5
+5.0
+5.5
Vdc
Ll.VCC
-0.1
0
+0.1
Vdc
Power Supply Voltage (Pin 13)
VEE
-6.0
-5.0
-3.0
Vdc
Digital Input Voltages (Pins 18-20)
VI(D)
0
-
+5.0
Vdc
Analog Input (Pin 14)
VI(A)
-2.1
-
+2.1
Vdc
Voltage @ VRT (Pin 24)
VRT
-1.0
-
+2.1
Vdc
Voltage @ VRB (Pin 23)
VRB
-2.1
+1.0
Vdc
VRT - VRB
Ll.VR
+1.0
+2.1
Vdc
-
Vdc
5.5
Vdc
VCC(D) - VCC(A)
VRB - VEE
-
Applied Output Voltage (Pins 4-10, 21 in 3-State)
Vo
0
-
tCKH
tCKl
5.0
15
20
20
fClK
0
TA
0
-
Clock Pulse Width -
High
low
Clock Frequency
Operating Ambient Temperature
1.3
-
-
ns
25
MHz
+70
°c
ELECTRICAL CHARACTERISTICS (0° < TA < 70°C, VCC = 5.0 V, VEE = - 5.2 V, VRT = + 1.0 V, VRB = -1.0 V, except
where noted.)
Parameter
TRANSFER CHARACTERISTICS (feKl
=
Symbol
Min
N
-
Typ
Max
Unit
8.0
Bits
±1.0
lSB
25 MHz)
Resolution
MON
Monotonicity
Integral Nonlinearity
INl
Differential Nonlinearity
DNl
Differential Phase (See Figure 16)
Differential Gain (See Figure 16)
-
Bits
Guaranteed
~
±1I4
-
±1.0
DP
-
1.0
-
DG
-
1.0
-
-
-
MOTOROLA LINEAR/INTERFACE DEVICES
6-63
%
lSBN
PSRR
Power Supply Rejection Ratio
(4.5 V < Vee < 5.5 V, VEE = -5.2 V)
(-6.0 V < VEE < -3.0 V, Vee = +5.0 V)
lSB
Deg.
0.1
0
-
II
MC10319
continued (0· < TA < 70·C, VCC ~ 5.0 V, VEE ~ - 5.2 V, VRT ~ + 1.0 V,
ELECTRICAL CHARACTERISTICS -
VRB
~
-1.0 V, except where noted.1
I
Parameter
Symbol
I
Min
Typ
Max
Unit
ANALOG INPUT (PIN 141
@ Vin ~
VRB (See Figure 51
IINL
-100
0
...,..
poA
~
VRT (See Figure 51
IINH
-
60
150
p.A
Input Capacitance (VRT - VRB
~
2.0 V, See Figure 41
Cin
-
36
-
pF
Input Capacitance (VRT - VRB
~
1.0 V, See Figure 41
Cin
55
-
pF
0.1
-
LSB
130
156
Input Current
Input Current @ Vin
Bipolar Offset Error
VOS
-
Rret
104
TC
-
+0.29
Cret
-
25
REFERENCE
~
Ladder Resistance (VRT to VRB, TA
25°CI
Temperature Coefficient
Ladder Capacitance (Pin 1 openl
ENABLE INPUTS (VCC
~
-
n
%rC
pF
5.5 VI (See Figure 61
Input Voltage -
High (Pins 19-201
VIHE
2.0
-
-
V
Input Voltage -
Low (Pins 19-201
VILE
-
-
0.8
V
2.7 V
IIHE
Input Current
~v
Input Current (w 0.4 V (CV EN (0 < EN < 5.0 VI
0
20
poA
-400
-100
-
poA
EN (EN
~
0 VI
IIL2
-400
-100
Input Current (ixi 0.4 V (ix, EN (EN
~
2.0 VI
IIL3
-20
-2.0
VIKE
-1.5
-1.3
Input Voltage High
VIHC
2.0
-
-
Vdc
Input Voltage Low
VILC
-
-
0.8
Vdc
Input Current @J 0.4 V (See Figure 71
IILC
-400
-80
Input Current @J 2.7 V (See Figure 71
IIHC
-100
-20
-
poA
VIKC
-1.5
-1.3
-
Vdc
VOH
2.4
3.0
-
V
VOL
-
0.35
0.4
ISC
-
35
Input Current (w 0.4 V
~
-
IILI
Input Clamp Voltage (11K
CLOCK INPUT (VCC
~
~
-18 mAl
poA
poA
V
5.5 VI
Input Clamp Voltage (11K
~
-18 mAl
poA
DIGITAL OUTPUTS
High Output Voltage (lOH
Low Output Voltage (lOL
~
~
-400 poA. VCC
~
4.5 V, See Figure 81
4.0 rnA, See Figure 91
Output Short Circuit Current' (VCC
~
5.5 VI
Output Leakage Current (0.4 < Vo < 2.4 V, See Figure 3,
VCC ~ 5.5 V, 00-07 in 3-State Model
ILK
Output Capacitance (00- 07 in 3-State Model
*Only one output
IS
Cout
-50
-
9.0
+50
V
rnA
p.A
-
pF
to be shorted at a time, not to exceed 1 second.
POWER SUPPLIES
VCC(AI Current (4.5 V < VCC(AI < 5.5 VI (Outputs unloadedl
ICC (AI
10
17
25
mA
VCC(OI Current (4.5 V < VCC(OI < 5.5 VI (Outputs unloadedl
ICC(OI
50
90
133
rnA
lEE
-14
-10
-6.0
rnA
618
995
mW
VEE Current (-6.0 V < VEE < -3.0 VI
Power Oissipation (VRT - VRB
~
2.0 VI (Outputs unloadedl
Po
-
MOTOROLA LINEAR/INTERFACE DEVICES
6-64
MC10319
TIMING CHARACTERISTICS (TA = 25°C, VCC = + 5.0 V, VEE = - 5.2 V, VRT = + 1.0 V, VRB = - 1.0 V,
See System Timing Diagram.)
Parameter
Symbol
Min
Typ
Max
Unit
INPUTS
Min Clock Pulse Width -
High
tCKH
-
5.0
-
ns
Min Clock Pulse Width -
Low
tCKL
-
15
-
ns
Max Clock Rise, Fall Time
tR,F
-
100
-
Clock Frequency
fCLK
0
30
25
-
19
-
ns
tAD
4.0
-
ns
tH
-
6.0
-
ns
Data High to 3-State from Enable Low"
tEHZ
27
-
ns
Data Low to 3-State from Enable Low"
tELZ
-
1S
ns
Data High to 3-State from Enable High"
tEHZ
-
32
-
Data Low to 3-State from Enable High"
tELZ
-
1S
-
ns
tEOV
-
15
-
ns
tEOV
-
16
-
ns
ttr
-
S.O
-
ns
ns
MHz
OUTPUTS
New Data Valid from Clock Low
tCKDV
Aperture Delay
Hold Time
Valid Data from Enable High (Pin 20
Valid Data from Enable Low (Pin 19
= 0 V)"
= 5.0 V)"
Output Transition Time" (10%-90%)
*See Figure 2 for output loading.
PIN DESCRIPTIONS
Symbol
Pin
Description
VRM
1
The midpoint of the reference resistor ladder. Bypassing can be
done at this point to improve performance at high frequencies.
GND
2,12
16,22
Power supply and signal ground. The four pins should be connected
directly together, and through a low impedance to the power supply.
OVR
3
Overrange output. Indicates Vin is more positive than VRT-1/2 LSB.
This output does not have 3-state capability.
07-00
4-10,
21
Digital Outputs. 07 (Pin 4) is the MSB, DO (Pin 21) is the LSB. LSTTL
compatible with 3-state capability.
VCC(D)
11,17
Power supply for the digital section. +5.0 V, ± 10% required.
VEE
13
Negative Power supply. Nominally - 5.2 V, it can range from - 3.0
to -6.0 V, and must be more negative than VRB by > 1.3 V.
Vin
14
Signal voltage input. This voltage is compared to the reference to
generate a digital equivalent. Input impedance is nominally 16-33
k!l in parallel with 36 pF.
VCC(A)
15
Power supply for the analog section. + 5.0 V, ± 10% required.
CLK
1S
Clock input. TTL c'lmpatible.
EN
19
Enable input. TTL compatible, a Logic "1" (and Pin 20 a Logic "0")
enables the data outputs. A Logic "0" puts the outputs in a 3-state
mode.
EN
20
Enable input. TTL compatible, a Logic "0" (and Pin 19 a Logic "1")
enables the data outputs. A Logic "1" puts the outputs in a 3-state
mode.
VRB
23
The bottom (most negative point) of the internal reference resistor
ladder.
VRT
24
The top (most positive point) of the internal reference resistor
ladder.
MOTOROLA LINEAR/INTERFACE DEVICES
6-65
ns
II
MC10319
FIGURE 1 -
SYSTEM TIMING DIAGRAM
tCKH--...t----tCKL----I~
~-------.:-3.0
1'-1_.5_V_ _ _ _ _ _ _JI 1.5 V
Clock
V
1.5 V l " - - - - - - -
tCKDV and tH measured at output levels of 0.8 and 2.4 volts.
------ --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ------
II
EN
High Data
Output
Low Data
Output
___.r___ Outputs ___.-j
-3-State
FIGURE 2 -
Active
DATA OUTPUT TEST CIRCUIT
FIGURE 3 -
OUTPUT 3-STATE LEAKAGE CURRENT
200
VCC
1.0 k!1
100
1
J
DO-D7 /)--_-_*~
Cl
j
3.0 k!1
;;7
Diodes = 1N914 or equivalent. Cl = 15 pF
-200
-1.0
I
Pin 19 = 0 V
1.0
MOTOROLA LINEAR/INTERFACE DEVICES
6-66
O°C < TA < WC
2.0
3.0
4.0
APPLIED VOLTAGE (VOLTSI
5.0
~O.
7.0
MC10319
FIGURE 4 -
FIGURE 5 -
INPUT CAPACITANCE @ VIN (PIN 141
100
INPUT CURRENT @ VIN (PIN 141
80
I
I
25'C_
D'C
I
~
I
80
60
\:
40
\:
z
~
<3
#- ~I- V
\:
~
~ ~70'C
VRT - VRB
-
VRT -
50
-2.5
"r
--
-110
-130
I
V
I
o
FIGURE 8 -
+2.5
CLOCK INPUT CURRENT
--
+20
1
.... ~
I-
~ -20
# ~
a -40
7~
!3
~ -60
V
II
/
#j
~5'C./ ,,/
~ -80
J....- ~
-I--
VRT
+40
+70'~_
~-90
VRB
AGURE 7 -
INPUT CURRENT @ ENABLE, ENABLE
Pin 19 Current
2.0V50 MHz, which is more than sufficient
for the allowable (Nyquist theory) input frequency of
12.5 MHz.
The current into Pin 14 varies linearly from 0 (when
Vin = VRB) to =60 /LA (when Vin = VRT). If Vin is taken
below VRB or above VRT, the input current will remain
at the value corresponding to VRB and VRT respectively
(see Figure 5). However, Vin must be maintained within
the absolute range of ± 2.5 volts (with respect to
ground) - otherwise excessive currents will result at
Pin 14, due to internal clamps.
The input capacitance at Pin 14 is typically 36 pF if
[VRT - VRBI is 2.0 volts, and increases to 55 pF if [VRT
- VRBI is reduced to 1.0 volt (see Figure 4). The capacitance is constant as Vin varies from VRT down to
=0.1 volt above VRB. Taking Vin to VRB will show an
increase in the capacitance of =50%. If Vin is taken
above VRT, or below VRB, the capacitance will stay at
the values corresponding to VRT and VRB, respectively.
The source impedance of the signal voltage should
be maintained below 100 0. (at the frequencies of interest) in order to avoid sampling errors.
VRT + VRB _ 1/2 LSB
2.0
In most applications, bypassing this pin to ground (0.1
/LF) is sufficient to maintain accuracy. In applications
involving very high frequencies, and where linearity is
critical, it may be necessary to trim the voltage at the
midpoint. A means for accomplishing this is indicated
in Figure 18.
POWER SUPPLIES
VCC(A) (Pin 15) is the positive power supply for the
comparators, and VCC(D) (Pins 11, 17) is the positive
power supply for the digital portion. Both are to be + 5.0
volts, ± 10%, and the two are to be within 100 millivolts
of each other. There is indirect internal coupling between VCC(D) and VCC(A). If they are powered separately, and one supply fails, there will be current flow
through the MC10319 to the failed supply.
MOTOROLA LINEAR/INTERFACE DEVICES
6-69
•
MC10319
The comparator output latches provide the circuit
with an effective sample-and-hold function, eliminating
the need for an external sample-and-hold.
ICC(A) is nominally 17 mAo and does not vary with
clock frequency or with Vin. It does vary linearly with
VCC(A). ICC(D) is nominally 90 mA. and is independent
of clock frequency. It does vary: however. by 6-7 mA
as Vin is changed. with the lowest current occuring
when Vin = VRT. It varies linearly with VCC(D).
VEE is the negative power supply forthe comparators,
and is to be within the range - 3.0 to - 6.0 volts. Additionally, VEE must be at least 1.3 volts more negative
than VRB.IEE is a nominal -10 mA, and is independent
of clock frequency, Vin, and VEE.
For proper operation, the supplies must be bypassed
at the IC. A 10 /-,F tantalum, in parallel with a 0.1 /-,F
ceramic is recommended for each supply to ground.
ENABLE INPUTS'
The two Enable inputs (Pins 19, 20) are TTL compatible, and are used to change the data outputs (07-00)
from active to 3-state. This capability allows cascading
two MC10319s into a 9-bit configuration, flip-flopping
two MC10319s into a 50 MHz configuration, connecting
the outputs directly to a data bus, multiplexing multiple
converters, etc. See the Applications Information section for more details. For the outputs to be active, Pin
19 must be a Logic "'," and Pin 20 must be a Logic "0."
Changing either input will put the outputs into the high
impedance mode. The Enable inputs affect only the
state of the outputs - they do not inhibit a conversion.
The input current into Pins 19 and 20 is shown in Figure
6, and the input - output timing is shown in Figure 1
and 20. Leaving either pin open is equivalent to a Logic
"1," although good design practice dictates that an input should never be left open.
The Overrange output (Pin 3) is not affected by the
Enable inputs as it does not have 3-state capability.
DIGITAL SECTION
CLOCK
The Clock input (Pin 18) is TTL compatible witl]..a typical frequency range of 0 to 30 MHz. There is no duty
cycle limitation, but the minimum' low and high times
must be adhered to. See Figure 7 for the input current
requirements .
The conversion sequence is shown in Figure 19, and
is as follows:
OUTPUTS
• On the rising edge, the data output latches are latched
with old data, and the comparator output latches are
released to follow the input signal (Vin).
The data outputs (Pins 4-10,21) are TTL level outputs
with high impedance capability. Pin 4 is the MSB (07),
and Pin 21 is the LSB (DO). The eight outputs are active
as long as the Enable inputs are true (Pin 19 = high,
Pin 20 = low). The timing of the outputs relative to the
Clock input and the Enable inputs is shown in Figures
1 and 20. Figures 8 and 9 indicate the output voltage
versus load current, while Figure 3 indicates the leakage
current when in the high impedance mode.
The output code is natural binary, depicted in the table
below.
The Overrange output (Pin 3) goes high when the input, Vin, is more positive than VRT - 1/2 LSB. This
output is always active - it does not have high impedance capability. Besides being used to indicate an input
overrange, it is additionally used for cascading two
MC10319s to form a 9-bit AID converter (see Figure 27).
• During the high time, the comparators track the input
signal. The data output latches retain the old data.
• On the falling edge, the comparator outputs are
latched with the data immediately prior to this edge.
The conversion to digital occurs within the device.
and the data output latches are released to indicate
the new data within 20 ns.
• During the clock low time, the comparator outputs
remain latched, and the data output latches remain
transparent.
A summary of the sequence is that data present at
Vin just prior to the Clock falling edge is digitized and
available at the data outputs immediately after that
same falling edge.
VRT, VRB (volts)
Input
>VRT
VRT VRT VRT -
- 1/2 LSB
1/2 LSB
1 LSB
1-1/2 LSB
Midpoint
VRB + 112 LSB
2.044 V
2.044 V
2.040 V
2.036 V
1.024 V
4.0 mV
0.9961 V
0.9961 V
0.992 V
0.988 V
0.000 V
-0,9961 V
<-1,0 V
>0.9980 V
0,9980 V
0.9961 V
0.9941 V
0.5000 V
1.95mV
2_4-Q-~"""--'
VRB
ECl-to-TTl
Converter
and
Latches
3
I
4
------
D
I
F
I 3
I
IS
IT
IA
IT
I E
I
IC
I I
I R
, C
F
E
R
E
N
T
Grey
I
Code
to
A
l
Binary
Converter
l
A
T
C
H
5
6
8
9
10
21
L
A
R
R
A
Y
Reference
Resistor
ladder
130 !1
R
256
0.508 !1
2.12.16.22
19
18
20
Enable
Clock 10-25 MHz)
Enable ) - - - - - - '
MOTOROLA LINEAR/INTERFACE DEVICES
6-73
D7
D6
05
D4
IY
IT
VEE 1- 3.0 to - 6.0 V)
OR
03
D2
01
DO
TTL
Outputs
II
MC10319
J
FIGURE 18 -
ADJUSTING VRM FOR IMPROVED LINEARITY
FIGURE 21 -
PRECISION VRT VOLTAGE SOURCE
R1
25 MHz
Clock
VRT
500n
ClK
OR
VRT
D7
•
•
•
VRM
•
••
}o",~
'--F
Data
• •
0.1~
DO
VRB
VRB
Input
Signal
Yin
VEE
I
I
12.0 kn
1
1/
1
L__
GND
=
100 n for +5.0 V
620 n for +15V
,
I
1
1
R1
1.5kl
I
2N2222A
/1
or 1
L
1
":.J
I
kn
-=
-l
to
VRT
620
0.1
-5.2 V
10 JLF
2.5 V References
II
Line Regulation
FIGURE 19 -
CONVERSION SEQUENCE
MC1400G2 MC1403U MC1403AU
1.0mV
0.5mV
TC (ppmrC) max
25
40
25
l1Vout for 0-70°C
4.4mV
7.OmV
4.4mV
Initial Accuracy
±O.2%
±1%
±1%
0.5mV
'------v---./
~rator
Outputs Latched
(Valid data available after tCKDV)
FIGURE 22 -
Latches Comparator Outputs,
VRT. VOLTAGE SOURCE
+5.0 to - -.......-:--l
'-,-":,1~._25_to.....
2._0_0_V_ _ to VRT
+40 V v
In LM317LZ 'Out
Opens Data Output Latches
Adj.
Data Outputs Latched. Releases
Comparator latches
240
510
200
FIGURE 20 -
ENABLE TO OUTPUT CRITICAL TIMING
LM317LZ
Line Regulation
EN~
-/ 12 1-
-/211;;;
DO-D7~
60
l1Vout for 0-70°C
8.4 mV
Initial Accuracy
Timing (o. 07-00 measured where waveform starts to change.
Indicated time values are typical ((L 25°C. and are in ns.
MOTOROLA LINEAR/INTERFACE DEVICES
6-74
1.0 mV
TC (ppmrC) max
±4%
MC10319
FIGURE 23 -
VRB VOLTAGE SOURCES
0.1
I -5.0 to
I -40V
I
R2
~0.1
R2
~
~
100!l for
620!l for
620!l for
3.0 k!l for
-5.0 V
-15 V
-5.0 V
-15 V
100
MC1400G2
LM337MT
line Regulation
1.0 mV
1.0 mV
TC (ppmrC) max
25
48
il.Vout for 0-70'C
4.4mV
6.7 mV
Initial Accuracy
±O.2%
±4%
AGURE 24 -
I
J
I
I
I
I
I
I
I
- 5.0 to -40 V o-~---------------'
Rl
In rL-M-3-37-M-T' Out -1.25 to- 2.00 V to
-r--VRB
120 ..1.-, n __
10 /LF t-A_d_i . _ _~
1.0 /L F
COMPOSITE VIDEO WAVEFORM
FIGURE 25 -
SIN2 X WAVEFORM
MOTOROLA LINEAR/INTERFACE DEVICES
6-75
270
MC10319
FIGURE 26 -
APPLICATION CIRCUIT FOR DIGITIZING VIDEO
+5.0 V 0-------"""-",,,----,-----,
14.3 MHz Clock)-------,
EN VCCIA)
CLK
OR
MC10319
07
•
•
•
DO
VRM
-1.0 V
VRB
Output
Data
Vin
VEE
1.5 kO
II
620
-2.5 V
3.0 kfl
GND
n
112 W
0.1:;;J;
-15VO-~--~-----~--~
3.0 pF
NOTES: 1) MC34080's powered from ± 15 V
supplies. MC34083 (Dual) may be used.
2) Bypass capacitors required at
power supply pins of ALL Ie's.
3) Ground plane required over all
parts of circuit board.
4) Care in layout around MC34080's
necessary for good frequency
response.
5) A 1 ~ MC34002.
1.0 kfl
Video Input ~ ",F 25 n
11 Volt p_p) r---.~_'l/V--_--1
50n
MOTOROLA LINEAR/INTERFACE DEVICES
6-76
MC10319
FIGURE 27 - 9-BIT AID CONVERTER
GND
OR
EN
0-25 MHz 0-....- - - - - - - - 1 CL.K
07
Clock
+2.0Vo-.....- - - j VRT
r
MC10319
0.1
VRM
VRB
•
•
•
•
DO
EN
,----+-+--i Vin VEE VCe(D) VCC(A)
0.1
500n
~
ClK
-2.0 V
t
0.1
VEE VCC(D) VCC(A)
VRT
VRB
08
07
07
•
•
•
•
o - _ - - - - - - - j Vin
+5.0 V
OR
MC10319
ClK
Vin
OR
EN
VRM
DO
EN
GND
MOTOROLA LINEAR/INTERFACE DEVICES
6-77
DO
Latches
(Optional)
..
MC10319
FIGURE 28 - 50 MHz II-BIT AID CONVERTER
50 MHz
Clock
*""
CK
Q
D 74F74'~~
GND
EN
EN
OR
ClK
D7
+1.0V
;.~
q
MC10319
(#1)
VRT
•
••
•
VRM
DO
VRB
V·
In
+5.0V
VEE VCC(D)' VCC(A)
1$"'
$"'
5.2 V
EN VEE VCC(D)'VCC(A)
' - - - - VRT
ro~
II
-1.0V
VRM
OR
OR
VRB
MC10319
(#2)
ClK
.-
D7
Vin
•
•
•
+5.0Vc>-- EN
DO
Yin
74F32
•
GND
D7
-
=
•
::
• DO
•
•
•
lat;;hes
..l..
(Optional)
50 MHz Clock
I
r--
Q~
I
I
I
:
DO-D7 #1-+(Valid Data>_-_~_ _ _~
DO-D7#2~
I ~>--_ _ ~
FIGURE 29 -
-5.0 VOLT REGULATOR
Yin
(+4.5 to +5.5 V)
100 ILF l
2.20
Line Regulation
4.5 V < Yin < 5.5 V,
'out = 10 rnA
0.16%
load Regulation
Yin = 5.0 V, 8.0 rnA <
'out < 20 rnA
0.4%
Output Ripple
Vin
Short Circuit lout Vin
5
Efficiency
Vin
3.0 kO
Vout
t--.J"""'':'---........-o-5.0 V/20 rnA
470 ILF l
1.0 ILH
l470 ILF
MOTOROLA LINEAR/INTERFACE DEVICES
6-78
= 5.0 V, lout = 20 rnA
= 5.0 V, Rl = 0.1 0
= 5.0 V, lout = 50 rnA
2 rnV p _p
140 rnA
52%
MC10319
GLOSSARY
LOAD REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the load current
is varied. The error is typically expressed as a percent
of the nominal output voltage.
APERTURE DELAY - The time difference between the
sampling signal (typically a clock edge) and the actual
analog signal converted. The actual signal converted
may occur before or after the sampling signal, depending on the internal configuration of the converter.
MONOTONICITY - The characteristic of the transfer
function whereby increasing the input code (of a DAC),
or the input signal (of an A-D), results in the output never
decreasing.
BIPOLAR INPUT - A mode of operation whereby the
analog input (of an A-D), or output (of a DAC), includes
both negative and positive values. Examples are - 1.0
to + 1.0 V, -5.0 to +5.0 V, -2.0 to +S.O V, etc.
MSB - Most Significant Bit. It is the highest order bit
of a binary code.
BIPOLAR OFFSET ERROR - The difference between the
actual and ideal locations of the OOH to 01 H transition,
where the ideal location is 1/2 LSB above the most negative reference voltage.
NATURAL BINARY CODE - A binary code defined by:
N = An2n + ... + A323 + A222 + A121 + A020
where each "A" coefficient has a value of 1 or O. Typically, all zeroes correspond to a zero input voltage of
an A-D, and all ones correspond to the most positive
input voltage.
BIPOLAR ZERO ERROR - The error (usually expressed
in LSBs) of the input voltage location (of an A-D) of the
SOH toS1H transition. The ideal location is 1/2 LSB above
zero volts in the case of an A-D setup for a symmetrical
bipolar input (e.g., -1.0 to + 1.0 V).
NYQUIST THEORY - See Sampling Theorem.
DIFFERENTIAL NONLINEARITY - The maximum deviation in the actual step size (one transition level to
another) from the ideal step size. The ideal step size is
defined as the Full Scale Range divided by 2 n (n = number of bits). This error must be within ± 1 LSB for proper
operation.
ECL -
OFFSET BINARY CODE - Applicable only to bipolar input (or output) data converters, it is the same as Natural
Binary, except that all zeroes correspond to the most
negative input voltage (of an A-D), while all ones correspond to the most positive input.
POWER SUPPLY SENSITIVITY - The change in a data
converter's performance with changes in the power
supply voltage(s). This parameter is usually expressed
in percent of full scale versus
Emitter coupled logic.
FULL SCALE RANGE (ACTUAL) - The difference between the actual minimum and maximum end points
of the analog input (of an A-D).
t.v.
QUANTITIZATION ERROR - Also known as digitization
error or uncertainty. It is the inherent error involved in
digitizing an analog signal due to the finite number of
steps at the digital output versus the infinite number of
values at the analog input. This error is a minimum of
±1/2 LSB.
FULL SCALE RANGE (lDEALl- The difference between
the actual minimum and maximum end points of the
analog input (of an A-Dl, plus one LSB.
GAIN ERROR - The difference between the actual and
expected gain (end point to end point), with respect to
the reference, of a data converter. The gain error is usually expressed in LSBs.
RESOLUTION - The smallest change which can be discerned by an A-O converter, or produced by a DAC. It
is usually expressed as the number of bits, n, where the
converter has 2 n possible states.
GREY CODE - Also known as reflected binary code, it
is a digital code such that each code differs from adjacent codes by only one bit. Since more than one bit is
never changed at each transition, race condition errors
are eliminated.
SAMPLING THEOREM - Also known as the Nyquist
Theorem. It states that the sampling frequency of an
A-D must be no less than 2x the highest frequency (of
interest) of the analog signal to be digitized in order to
preserve the information of that analog signal.
INTEGRAL NONLINEARITY - The maximum error of
an A-D, or DAC, transfer function from the ideal straight
line connecting the analog end points. This parameter
is sensitive to dynamics, and test conditions must be
specified in order to be meaningfull. This parameter is
the best overall indicator of the device's performance.
UNIPOLAR INPUT - A mode of operation whereby the
analog input range (of an A-Dl. or output range (of a
DACl, includes values of a signal polarity. Examples are
o to +2.0 V, 0 to -5.0 V, +2.0 to +s.o V, etc.
LSB - Least Significant Bit. It is the lowest order bit of
a binary code.
UNIPOLAR OFFSET ERROR - The difference between
the actual and ideal locations of the OOH to 01 H transition, where the ideal location is 1/2 LSB above the
most negative input voltage.
LINE REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the input to the
regulator is varied. The error is typically expressed as
a percent of the nominal output voltage.
MOTOROLA LINEAR/INTERFACE DEVICES
6-79
®
MC10321
MOTOROLA
Specifications and Applications
Information
HIGH SPEED 7-BIT ANALOG-TO-DIGITAL
FLASH CONVERTER
a
HIGH SPEED
7-BIT ANALOG-TO-DIGITAL
FLASH CONVERTER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC10321 is a 7-bit high speed parallel flash AID converter,
which employs an internal Grey Code structure to eliminate large
output errors on fast slewing input signals. It is fully TTL compatible, requiring a + 5.0 volt supply, and a negative supply
between - 3.0 and - 6.0 volts. Three-state TTL outputs allow
direct connection to a data bus or common I/O memory.
The MC10321 contains 128 parallel comparators wired along a
precision input reference network. The comparator outputs are
fed to latches, and then to an encoder network which produces
a 7-bit data byte, plus an overrange bit. The data is latched and
converted to three-state LSTTL levels. Enable inputs permit setting the outputs to a three-state condition. The overrange bit is
always active to allow for sensing of the overrange condition, and
to ease the interconnection of two MC10321s into an 8-bit
configuration.
The MC10321 is available in a 20-pin standard plastic and SOIC
packages.
Applications include Video displays (digital TV, picture-inpicture, special effects), radar processing, high speed instrumentation, and TV broadcast.
P SUFFIX
PLASTIC PACKAGE
CASE 738-03
DWSUFFIX
PLASTIC PACKAGE
CASE 7510-03
SO-20
PIN CONNECTIONS
• Internal Grey Code for Speed and Accuracy
(Top View)
• 25 MHz Sampling Rate
• 7-Bit Resolution with 8-Bit Accuracy
• Easily Cascadable into an 8-Bit System
• Three-State LSTIL Outputs with True and Complement
Enable Inputs
D2
D1
• Low Input Capacitance: 25 pF
• No Clock Kick-Out Currents on Input or Reference
• Wide Input Range: 1.0-2.1 Volts within a ±2.1 Volt Range
DO
Gnd
VCC(D)
• No Sample and Hold Required for Video Applications
• Edge Triggered Conversion - No Pipeline Delay
Clock
• True and Complement Enable Inputs for Three-State Control
• Standard DIP and Surface Mount Packages Available
• Operating Temperature Range: _40° to +85°C
EN
Over
Range
VCC(D)
Gnd
ORDERING INFORMATION
Temperature
Device
MC10321P
MC10321DW
MOTOROLA LINEAR/INTERFACE DEVICES
6-80
Range
_40° to +85°C
Package
Plastic DIP
SO-20
MC10321
BLOCK DIAGRAM
VCC(O)
(Analog In) Yin
VRT
Gnd
C)--!==:;--;:1=t-------;:t:::t;-----------,
r L~ias....J
r-I
l -,
I
I
I
I
MC10321
r-l-,
r--~u~:--i
I ,,~I
1"0 0 I
I
I
I
I
I
~~i~
I
I
I
_.J
I
I
I
(!ll-
I
I
I
L ___ ..J
Over
Range
latches
and
ECl-TTL
Converters
06
05
D4
03
I
I
I
02
01
I
I
00
Clock
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Units
Supply Voltage
VCC(A), VCC(O)
VEE
+7.0
-7.0
Vdc
Positive Supply Voltage Differential
Vdc
Parameter
VCC(O)-VCC(A)
-0.3, +0.3
Oigital Input Voltage (Pins 13-15)
VI(O)
-0.5, +7.0
Vdc
Analog Input Voltage (Pins 5, 6, 7)
VI(A)
-2.5, +2.5
Vdc
-
+2.3
Vdc
Applied Output Voltage (00-06 in 3-State)
-0.3, + 7.0
Vdc
Junction Temperature
TJ
+150
Storage Temperature
Tsto
-65, + 150
°c
°c
Reference Voltage Span (Pin 7-Pin 5)
DeVices should not be operated at these values. The "Recommended Operatmg Limits" provide gUidelines for actual
device operation.
RECOMMENDED OPERATING LIMITS
Parameter
Symbol
Min
Typ
Max
Units
VCC(A)
VCC(O)
6.VCC
+4.5
+4.5
-0.1
+5.0
+5.0
0
+5.5
+5.5
+0.1
Vdc
-5.0
Power Supply Voltage (Pin 9)
Power Supply Voltage (Pins 10, 16)
VCC(O)-VCC(A)
VEE
-6.0
Oigitallnput Voltages (Pins 13-15)
-
0
Analog Input (Pin 6)
Vin
-2.1
Voltage @ VRT (Pin 7)
@J VRB (Pin 5)
VRT-VRB
VRB-VEE
VRT
VRB
6.VR
-1.0
-2.1
+1.0
1.3
Power Supply Voltage (Pin 8)
-
Applied Output Voltage (Pins 00-06 in 3-State)
Vo
0
Clock Pulse Width - High
-low
tCKH
tCKl
5.0
15
Clock Frequency
fClK
0
TA
-40
Operating Ambient Temperature
All limits are not necessarily functional concurrently.
MOTOROLA LINEAR/INTERFACE DEVICES
6-81
-3.0
Vdc
-
VCC(O)
Vdc
+2.1
Vdc
-
+2.1
+1.0
+2.1
-
Vdc
VCC(O)
Vdc
-
-
-
ns
25
MHz
+85
°c
MC10321
ELECTRICAL CHARACTERISTICS (TA = + 25°C, VCC = 5.0 V, VEE = -5.2 V, VRT = +1.0 V, VRB = -1.0 V,
except where noted)
Characteristic
Symbol
Min
Typ
Max
Units
7.0
Bits
±1.0
±1.0
LSB
TRANSFER CHARACTERISTICS (fCKL = 25 MHz)
Resolution
N
Monotonicity
MON
Integral Nonlinearity
Differential Nonlinearity
INL
DNL
Differential Phase (See Figure 11)
Differential Gain (See Figure 11)
DP
OG
Power Supply Rejection Ratio
(4.5 V < VCC < 5.5 V, VEE = -5.2 V)
(-6.0 V < VEE < -3.0 V, VCC = +5.0 V)
-
Guaranteed
Bits
-
±1/4
2.0
2.0
-
-
0.02
0
-
+1.0
+60
VOS
-
-
-
PSRR
Oeg.
%
LSBN
ANALOG INPUT (Pin 6)
Input Current @ Yin
@ Yin
= VRB
= VRT
Input Capacitance (1.0 V
- 0.1 V (See Figure 4)
+ 0.1 V (See Figure 4)
IINL
IINH
< (VRT - VRB) < 2.0 V)
Cin
Bipolar Offset Error
II
+5.0
+80
p.A
22
-
pF
0.1
-
LSB
140
175
REFERENCE
Rre!
100
Temperature Coefficient
Ladder Resistance (VRT to VRB, TA
TC
-
+0.29
Ladder Capacitance (Pin 1 Open)
Cre!
-
Input Voltage - High
-Low
VIHE
VILE
2.0
Input Current @ 2.4 Volts (See Figure 5)
@ 0.4 Volts (See Figure 5)
IIHE
IILE
-200
+0.2
-120
Input Clamp Voltage (11K = -18 mAl
VIKE
-1.5
-1.3
Input Voltage - High
-Low
VIHC
VILC
2.0
Input Current @ 0.4 V (See Figure 6)
@ 2.7 V (See Figure 6)
IILC
IIHC
-150
-80
-80
-40
Input Clamp Voltage (11K = -18 mAl
VIKC
-1.5
High Output Voltage (lOH = -400 p.A @ 06-00, OR,
VCC = 4.5 V, See Figure 7)
VOH
Low Output Voltage (lOL = 4.0 mA @ 06-00, OR,
VCC = 4.5 V, See Figure 8)
VOL
=
25°C)
n
%f'C
5.0
-
-
-
V
0.8
pF
ENABLE INPUTS (VCC = 55 V)
CLOCK INPUT (VCC
=
-
2.0
p.A
-
V
-
Vdc
5.5 V)
-
-
0.8
-1.3
-
Vdc
2.4
3.0
-
V
-
0.3
0.4
V
-
-35
p.A
DIGITAL OUTPUTS
Output Short Circuit Current< (06-00, OR, VCC
=
5.5 V)
ISC
Output Leakage Current (0.4 < Vo < 2.4 V,
See Figure 3, VCC = 5.5 V, 00-06 in 3-State Mode)
ILK
Output Capacitance (00-06 in 3-State Mode)
Cout
-10
-
-
mA
-
+10
p.A
5.0
-
pF
*Only one output to be shorted at a time, not to exceed 1 second.
POWER SUPPUES
VCC(A) Current (4.5 V < VCC(A) < 5.5 V, Outputs Unloaded)
VCC(D) Current (4.5 V < VCC(D) < 5.5 V, Outputs Unloaded)
VEE Current ( - 6.0 V < VEE < - 3.0 V)
Power Dissipation (VRT - VRB
=
ICC(A)
ICC(D)
lEE
2.0 V, Outputs Unloaded)
Po
10
40
-16
-
MOTOROLA LINEAR/INTERFACE DEVICES
6-82
13
60
-13
16
80
-8.0
mA
459
668
mW
MC10321
TIMING CHARACTERISTICS (TA ~ 25"C, VCC ~ +5.0 V, VEE ~ -5.2 V, VRT ~ + 1.0 V, VRB ~ -1.0 V,
See System Timing Diagram)
Parameter
Symbol
Typ
Min
Max
Units
INPUTS
tCKH
tCKL
-
5.0
15
-
Max Clock Rise, Fall Time
tR,F
-
100
-
Clock Frequency
fCLK
0
30
25
tCKDV
-
22
-
ns
tAD
3.0
ns
tH
-
6.0
Data High to 3-State from Enable Low"
tEHZ
-
22
Data Low to 3-State from Enable Low"
tEll
17
Data High to 3-State from ENABLE High"
tE'HZ
-
Data Low to 3-State from ENABLE High"
tE'LZ
Min Clock Pulse Width - High
-Low
ns
-
ns
MHz
OUTPUTS
New Data Valid from Clock Low
Aperture Delay
Hold Time
Valid Data from Enable High (Pin 14
Valid Data from ENABLE Low (Pin 13
~
0 V)"
~
5.0 V)"
Output Transition Time (10%-90%)*
19
tEDV
-
-
13
-
ns
tE'DV
-
20
-
ns
ttr
-
6.0
-
ns
27
ns
ns
ns
ns
ns
*See Figure 2 for output loading.
TEMPERATURE CHARACTERISTICS
Parameter
Typical Value
@2SoC
Typical Change
-40 to +8SoC
73mA
-13 mA
140n
0.3 V
3.0 V
-100~C
ICC (+ 5.0 V Supply Current)
lEE (- 5.2 V Supply Current)
Ladder Resistance
VOL (Output low Voltage @ 4.0 mAl
VOH (Output High Voltage @ -400 p.A)
Differential Nonlinearity
Integral Nonlinearity
GND
OR
Pin
PIN DESCRIPTIONS
Symbol
Description
11,17 Power supply ground. The two pins should
be connected directly together, and
through a low impedance path to the
power supply.
12
+0.29%rC
+8.0 p'vrc
2.1 mVrC
- 0.0008 lSSrC
-0.001 LSBrC
0.25 LSB
PIN DESCRIPTIONS
Symbol
+7.0 p.ArC
Overrange output. Indicates Vin is more
positive than VRT-1I2 LSB. This output
does not have 3-state capability, and therefore is always active.
Pin
Description
VCC(A)
9
Power supply for the analog section.
+5.0 V, ±10%required.
ClK
15
Clock input, TTL compatible, and can
range from dc to 25 MHz. Conversion
occurs on the negative edge of the clock.
EN
13
Enable input. TTL compatible, a Logic "1"
(and Pin 14 a Logic "0") enables the data
outputs. A Logic "0" sets the outputs
(except Overrange) to a 3-state mode.
EN
14
ENABLE input. TTL compatible, a Logic
"0" (and Pin 13 a Logic "I") enables the
data outputs. A Logic "I" sets the outputs
(except Overrange) to a 3-state mode.
06-00
1-4, Digital Outputs. 06 (Pin 4) is the MSB, DO
18-20 (Pin 1B) is the LSB. LSTTl compatible with
3-state capability.
VCC(D)
10,16 Power supply for the digital section.
+ 5.0 V, ± 10% required.
VEE
B
Negative Power supply. Nominally - 5.2 V,
it can range from - 3.0 to - 6.0 V, and must
be more negative than VRB by >1.3 V.
VRB
5
The bottom (most negative point) of the
internal reference resistor ladder. The ladder resistance is typically 140 n to VRT.
Yin
6
Signal voltage input. This voltage is compared to the reference to generate a digital
equivalent. Input impedance is nominally
16-33 kn (See Figure 4) in parallel with 22
pF.
VRT
7
The top (most positive point) of the internal reference resistor ladder.
Pin assignments are the same for the standard DIP package and the
surface mount package.
MOTOROLA LINEAR/INTERFACE DEVICES
6-83
MC10321
FIGURE 1 - SYSTEM TIMING DIAGRAM
~KH--~~-----~:KL'----~
Clock
1.5V
06-00, OR
tCKDV and tH measured at output levels of 0.8 and 2.4 volts.
II
EN
--'"\.1.2 V
3.0 V
+F--------.,;+;;r, 1.2 V
tEHZ
High Data
Output
tELZ
Low Data
Output
FIGURE 2 - DATA OUTPUT TEST CIRCUIT
VCC
1.0 k
,...
DD-D7 ;:::
=~1
3.0 k
,
,
,
/7.'7
Diodes = lN914 or equivalent, Cl = .15 pF
MOTOROLA LlNEARIINTERFACE DEVICES
6-84
MC10321
FIGURE 3 - OUTPUT 3-STATE LEAKAGE CURRENT
FIGURE 4 - INPUT CURRENT @ Vin
200
80
I
}
/'
100
1
50
!z
,/
V
g§
a
/'
If
~ -50
~ -lOa
./
r
-200
-1.0
1.0
FIGURE 5 -
5
I
~
::>
'"
u
I-
.ffi
(EN
I
-90
.....
I?--
- 2.5
~
I
I
I
I
-
o
./
~
~_1.5
-80
2.0
6.0
V
5ow\i11.0
:i:~
~'::!::.
,0
tl 0.5
V
{
1.0
2.0
3.0
4.0
INPUT VOLTAGE (VOLTS'@ Pin 15
-
-
~
0.3 -
6.0
~ 0.2
>
~
I~DIVIDUAlLY
OJTPUTS LhADED
OR SIMULTANEOUSLY
+4.5 < VCC< +5.5V
~
/""
5.0
FIGURE 8 - OUTPUT VOLTAGE versus OUTPUT CURRENT
~
,..,- I-~
-
t--- f.--- f.---
0. o. 1
>
o
o
/'
-100
-1.0
/'
0.4
~
5~
./
.:ffi
r- OU~UTS LOiDED INJIVIDUALly
g§
~
./
./
~
:;; -60
'I
1.0
Vin. INPUT VOLTAGE (VOLTS)
-40
I-
Pin 13 (EN ~ 0)
Pin 114 (0 EN <, + 5.0)
I
I
I
r- +4.5 < VCC < +5.5 V
~
i:lS
/
~
./
I-
'"
::>
'"
u
/
./
1 -20
/
I
+ 2.5
FIGURE 6 - CLOCK INPUT CURRENT
+5.0 V)
OR SIMULTANEOUSLY
w
VRT
+20
FIGURE 7 - OUTPUT VOLTAGE versus OUTPUT CURRENT
2.0
VRS
Vin. INPUT VOLTAGE (VOLTS)
/
-70
-130
7.0
/
-50
-110
6.0
r
-30
~
:;;
I
Pin 13
I-
z
I
5.0
INPUT CURRENT AT ENABLE, ENABLE
10
0
-10
«
2.0
3.0
4.0
APPLIED VOLTAGE (VOLTS)
~
-100
- 200
-300
IOH. OUTPUT CURRENT (/LA)
-400
o
o
2.0
MOTOROLA LINEAR/INTERFACE DEVICES
6-85
4.0
IOL. OUTPUT CURRENT (mA)
6.0
B.O
MC10321
FIGURE 9 - INTEGRAL UNEARITY ERROR IN LSBs
versus CODE
o
~
FIGURE 10 - DIFFERENTIAL LINEARITY ERROR
IN LSBs versus LOWER CODE
1,0
1.0
0,6
0,6
0,2
0,2
IL
l!:
"\1"--\.
25 - 0,2
V"" -V
f-vV
-0,6
fClK
o
~
;-0.2
32
48
64
80
96
.i.&
I
V",
d
~...,
.".r.,. ,-'" .A ,.
V
-0,6
112
128
v
~'"
11'1,
"V
fClK ~ 15 MSPS
25 MSPS
-1.0
16
'v
l!:
ffi
-1,0
...A ,A
11.,
A.
o
16
31
CODE
48
64
80
96
111
128
CODE
DESIGN GUIDELINES
II
(see Figure 4). However, Yin must be maintained within
the absolute range of ± 2.5 volts (with respect to
ground) - otherwise excessive currents will result at
Pin 6.
The input capacitance at Pin 6 is tYpically 22 pF, and
is constant as Yin varies from VRT to VRB.
The source impedance of the signal voltage should
be maintained below 1000 (at the frequencies of interest) in order to avoid sampling errors.
INTRODUCTION
The MC10321 is a high speed, 7-bit parallel ("Flash")
type Analog-to-Digital converter containing 128 comparators at the front end. See Figure 12 for a block diagram. The comparators are arranged such that one
input of each is referenced to evenly spaced voltages,
derived from the reference resistor ladder. The other
input of each of the comparators is connected to the
input signal (Vin). Some of the. comparator's differential
outputs will be "true," while other comparators will
have "not true" outputs, depending on their relative
position. Their outputs are then latched, and converted
to a 7-bit Grey code by the Differential Latch Array. The
Grey code ensures that errors caused at the input stage,
due to cross talk, feed-thru, or timing disparaties, result
in glitches at the output of only a few LSBs, rather than
the more traditional 1/2 scale and 1/4 scale glitches.
The Grey code is then translated to a 7-bit binary code,
and the differential levels are translated to TTL levels
before being applied to the output latches. ENABLE
inputs (EN and EN) at this final stage permit the TTL
outputs (except Overrange) to be put into a high impedance (3-state) condition.
REFERENCE
The reference resistor ladder is composed of a
string of equal value resistors so as to provide 128
equally spaced voltages for the comparators (see Figure 12 for the actual configuration). The voltage difference between adjacent comparators corresponds
to 1 LSB of the input range. The first comparator (closest to VRB) is referenced 1/2 LSB above VRB, and the
128th comparator (for the overrange) is referenced 1/
2 LSB below VRT. The total resistance of the ladder is
nominally 140 0, ± 25%, requiring 14.3 mA@ 2.0 volts
and 7.14 mA @ 1.0 volt. There is a nominal warm up
change of = + 8.0% in the ladder resistance due to the
+ 0.29%I"C temperature coefficient.
The minimum recommended span [VRT - VRBl is 1.0
volt. A lower span will allow offsets and nonlinearities
to become significant. The maximum recommended
span is 2.1 volts due to power limitations of the resistor
ladder. The span may be anywhere within the range of
-2.1 to +2.1 volts with respect to ground, and VRB
must be at least 1.3 volts more positive than VEE. The
reference voltages must be stable and free of noise and
spikes, since the accuracy of a conversion is directly
related to the quality of the reference.
In most applications, the reference voltages will
remain fixed. In applications involving a varying reference for modulation or signal scrambling, the modulating signal may be applied to VRT, or VRB, or both.
The output will vary inversely with the reference Signal,
introducing a nonlinearity into the transfer function. The
addition of the modulating signal and the dc level
ANALOG SECTION
SIGNAL INPUT
The signal voltage to be digitized (Vin) is applied
simultaneously to one input of each of the 128 comparators through Pin 6. The other inputs of the comparators are connected to 128 evenly spaced voltages
derived from the reference ladder. The output code
depends on the relative position of the input signal to
the reference voltages. The comparators have a
bandwidth of >50 MHz, which is more than sufficient
for the allowable (Nyquist theory) input frequency of
12.5 MHz.
The current into Pin 6 varies linearly from 0 (when
Yin = VRB) to =60 pA (when Yin = VRT). If Yin is taken
below VRB or above VRT, the input current will remain
at the value corresponding to VRB and VRT respectively
MOTOROLA LINEAR/INTERFACE DEVICES
6-86
MC10321
applied to the reference must be such that the absolute
voltage at VRT and VRB are maintained within the values listed in the Recommended Operating Limits. The
RMS value of the span must be maintained .. 2.1 volts.
A summary of the sequence is that data present at
Yin just prior to the Clock falling edge is digitized and
available at the data outputs immediately after that
same falling edge. The minimum amount of time the
data must be present prior to the clock falling edge
(aperture delay) is 2.0-6.0 ns, typically 3.0 ns.
The comparator output latches provide the circuit
with an effective sample-and-hold function, eliminating
the need for an external sample-and-hold.
POWER SUPPLIES
VCC(A) (Pin 9) is the positive power supply for the
comparators, and VCC(D) (Pins 10, 16) is the positive
power supply for the digital portion. Both are to be + 5.0
volts, ± 10%, and the two are to be within 100 millivolts
of each other. There is indirect internal coupling
between VCC(D) and VCC(A). If they are powered separately, and one supply fails, there will be current flow
through the MC10321 to the failed supply.
ICC(A) is nominally 13 mA, and does not vary with
clock frequency or with Yin, but does vary slightly with
VCC(A). ICC(D) is nominally 60 mA. and is independent
of clock frequency. It does vary, however, by 4-5 mA
as Yin is varied from VRT to VRB, and varies directly
with VCC(D).
VEE is the negative power supply for the comparators,
and is to be within the range - 3.0 to - 6.0 volts. Additionally, VEE must be at least 1.3 volts more negative
than VRB. lEE is a nominal -13 mA, and is independent
of clock frequency, Yin and VEE.
For proper operation, the supplies must be bypassed
at the IC. A 10 J.LF tantalum, in parallel with a 0.1 J.LF
ceramic is recommended for each supply to ground.
ENABLE INPUTS
The two Enable inputs (Pins 13, 14) are TTL compatible, and are used to change the data outputs (06-00)
from active to 3-state. This capability allows cascading
two MC10321s into an 8-bit configuration, connecting
the outputs directly to a data bus, multiplexing multiple
converters, etc. See the Applications Information section for more details. For the outputs to be active, Pin
13 must be Logic "1," and Pin 14 must be a Logic "0."
Changing either input will put the outputs into the high
impedance mode. The Enable inputs affect only. the
state of the outputs - they do not inhibit a conversion.
Both pins have a nominal threshold of =1.2 volts, their
input currents are shown in Figure 5, and their inputoutput timing is shown in Figure 1 and 14. Leaving
either pin open is equivalent to a Logic "1," although
good design practice dictates that an input should never
be left open.
The Overrange output (Pin 12) is not affected by the
Enable inputs as it does not have 3-state capability.
DIGITAL SECTION
CLOCK
The Clock input (Pin 15) is TTL compatible with a
typical frequency range of 0 to 30 MHz. There is no duty
cycle limitation, but the minimum low and high times
must be adhered to. See Figure 6 for the input current
requirements.
The conversion sequence is shown in Figure 13, and
is as follows:
OUTPUTS
The data outputs (Pins 1-4, 12, 18-20) are TTL level
outputs with high impedance capability (except Overrange). Pin 4 is the MSB (06), and Pin 18 is the LSB (DO).
The seven outputs are active as long as the Enable
inputs are true (EN = high, EN = low). The timing of
the outputs relative to the Clock input and the Enable
inputs is shown in Figures 1 and 14. Figures 7 and 8
indicate the output voltage versus load current, while
Figure 3 indicates the leakage current when in the high
impedance mode.
The output code is natural binary, depicted in Table 1.
- On the rising edge, the data output latches are
latched with old data, and the comparator output
latches are released to follow the input signal (Vin).
- During the high time, the comparators track the
input signal. The data output latches retain the old data.
- On the falling edge, the comparator outputs are
latched with the data immediately prior to this edge.
The conversion to digital occurs within the device, and
the data output latches are released to indicate the new
data in =22 ns.
- During the clock low time, the comparator outputs
remain latched, and the data output latches remain
transparent.
The Overrange output (Pin 12) goes high when the
input, Yin, is more positive than VRT - 1/2 LSB. This
output is always active - it does not have high impedance capability. Besides used to indicate an input
overrange, it is additionally used for cascading two
MCl 0321 s to form an 8-bit AID converter (see Figure
21).
TABLE 1
VRT, VRB (Volts)
Input
>VRT
VRT VRT VRT -
- 1/2 LSB
1/2 LSB
1 LSB
1 1/2 LSB
Midpoint
VRB + 112 LSB
< VRB + 1/2 LSB
2.048,0
+1.0 V, -1.0V
>2.040 V
2.040 V
2.032 V
2.024 V
1.024 V
8.0 mV
<8.0 mV
>0.9922
0.9922
0.9844
0.9766
0.000
-0.9922
<-0.9922
V
V
V
V
V
V
V
Output
+1.0 V, 0 V
Code
Overrange
>0.9961 V
0.9961 V
0.9922 V
0.9883 V
0.5000 V
3.9mV
<3.9 mV
7FH
7FH
7FH
7EH - 7FH
40H
OOH'" 01H
OOH
1
0-1
0
0
MOTOROLA LINEAR/INTERFACE DEVICES
6-87
a
0
0
II
MC10321
APPLICATIONS INFORMATION
POWER SUPPLIES, GROUNDING
The PC board layout, and the quality of the power
supplies and the ground system at the IC are very
important in order to obtain proper operation. Noise,
from any source, coming into the device on VCC, VEE,
or ground can cause an incorrect output code due to
interaction with the analog portion of the circuit. At the
same time, noise generated within the MC10321 can
cause incorrect operation if that noise does not have a
clear path to ac ground.
Both the Vce and VEE power supplies must be decoupled to ground at the IC (within 1" max) with a 10 /LF
tantalum and a 0.1 /LF ceramic. Tantalum capacitors are
recommended since electrolytic capacitors simply have
too much inductance at the frequencies of interest. The
quality of the VCC and VEE supplies should then be
checked at the IC with a high frequency scope. Noise
spikes (always present when digital circuits are present)
can easily exceed 400 mV peak, and if they get into the
analog portion of the IC, the operation can be disrupted.
Noise can be reduced by inserting resistors and/or
inductors between the supplies and the IC.
If switching power supplies are used, there will usually be spikes of 0.5 volts or greater at frequencies of
50-200 kHz. These spikes are generally more difficult to
reduce because of their greater energy content. In
extreme cases, 3-terminal regulators (MC78L05ACP,
MC7905.2CT), with appropriate high frequency filtering,
should be used and dedicated to the MC10321.
The ripple content of the supplies should not allow
their magnitude to exceed the values in the Recommended Operating Limits.
The PC board tracks supplying VCC and VEE to the
MC10321 should preferably not be at the tail end of the
bus distribution, after passing through a maze of digital
circuitry. The MC10321 should be close to the power
supply, or the connector where the supply voltages
enter the board. If the VCC and VEE lines are supplying
considerable current to other parts of the boards, then
it is preferable to have dedicated lines from the supply
or connector directly to the MC10321.
The two ground pins (11, 17) must be connected
directly together. Any long path between them can
cause stability problems due to the inductance (@ 25
MHz) of the PC tracks. The ground return for the signal
source must be noise free.
the temperature range of - 40 to + 85°C, a maximum
temperature coefficient of 31 ppmrC is required.
The voltage supplies used for digital circuits should
preferably not be used as a source for generating VRT
and VRB, due to the noise spikes (up to 500 mV) present
on the supplies and on their ground lines. Generally
± 15 volts, or ± 12 volts, are available for analog circuits,
and are usually clean compared to supplies used for
digital circuits, although ripple may be present in varying amounts. Ripple is easier to filter out than spikes,
however, and so these supplies are preferred.
Figure 15 depicts a circuit which can provide an
extremely stable voltage to VRT at the current required
(the maximum reference current is 20 mA @ 2.0 volts).
The MC1403 series of references have very low temperature coefficients, good noise rejection, and a high
initial accuracy, allowing the circuit to be built without
an adjustment pot if the VRT voltage is to remain fixed
at one value. Using 0.1% wirewound resistors for the
divider provides sufficient accuracy and stability in
many cases. Alternately, resistor networks provide high
ratio accuracies, and close temperature tracking. If the
application requires VRT to be changed periodically, the
two resistors can be replaced with a 20 turn, cermet
potentiometer. Wirewound potentiometers should not
be used for this type of application since the pot's slider
jumps from winding to winding, and an exact setting
can be difficult to obtain. Cermet pots allow for a
smooth continuous adjustment.
In Figure 15, R1 reduces the power dissipation in the
transistor, and can be carbon composition. The 0.1 /LF
capacitor in the feedback path provides stability in the
unity gain configuration. Recommended op amps are:
LM358, MC34001 series, LM308A, LM324, and LM11C.
Offset drift is the key parameter to consider in choosing
an op amp, and the LM30BA has the lowest drift of those
mentioned. Bypass capacitors are not shown in Figure
15, but should always be provided at the input to the
2.5 volt reference, and at the power supply pins of the
op amp.
Figure 16 shows a simpler and more economical circuit, using the LM317LZ regulator, but with lower initial
accuracy and temperature stability. The op amp/current
booster is not needed since the LM317LZ can supply
the current directly. In a well controlled environment,
this circuit will suffice for many applications. Because
of the lower initial accuracy, an adjustment pot is a
necessity.
Figure 17 shows two circuits for providing the voltage
to VRB. The circuits are similar to those of Figures 15
and 16, and have similar accuracy and stability. The
MC1403 reference is used in conjunction with an op amp
configured as an inverter, providing the negative voltage. The output transistor is a PNP in this case since
the circuit must sink the reference current.
REFERENCE VOLTAGE CIRCUITS
Since the accuracy ofthe conversion is directly related
to the quality of the references, it is imperative that
accurate and stable voltages be provided to VRT and
VRB. If the reference span is 2.0 volts, then 112 LSB is
only 7.8 millivolts, and it is desireable that VRTand VRB
be accurate to within this amount, and furthermore, that
they do not drift more than this amount once set. Over
MOTOROLA LlNEARflNTERFACE DEVICES
6-88
MC10321
VIDEO APPUCATIONS
The MC10321 is suitable for digitizing video signals
directly without signal conditioning, although the standard 1.0 volt p-p video signal can be amplified to a 2.0
volt p-p signal for slightly better accuracy. Figure 18
shows the input (top trace) and reconstructed output of
a standard NTSC test signal, sampled at 25 MSPS, consisting of a sync pulse, 3.58 MHz color burst, a 3.58 MHz
signal in a Sin 2x envelope, a pulse, a white level signal,
and a black level signal. Figure 19 shows a Sin 2x pulse
that has been digitized and reconstructed at 25 MSPS.
The width of the pulse is =225 ns at the base. Figure
20 shows an application circuit for digitizing video.
voltage division could occur, resulting in a nonlinear
conversion. If the references are to be symmetrical
about ground (e.g., ± 1.0 volt or ± 2.0 volts), the adjustment can be eliminated, and the midpoint connected to
ground.
The use of latches on the outputs is optional, depending on the application. If latches are required,
SN74LSl73As are recommended.
50 MHz, 7 BIT AID CONVERTER
Figure 22 shows how two MC10321s can be connected together in a flip-flop arrangement in order to
have an effective conversion speed of 50 MHz. The
74F74D-type flip-flop provides a 25 MHz clock to each
converter, and at the same time, controls the SELECT
input to the MC74F257 multiplexers to alternately select
the outputs of the two converters. A brief timing diagram is shown in the figure.
8-BIT AID CONVERTER
Figure 21 shows how two MC10321s can be connected to form an 8-bit converter. In this configuration,
the outputs (06-00) of the two 7-bit converters are paralleled. The outputs of one device are active, while the
outputs of other are in the 3-state mode. The selection
is made by the OVERRANGE output of the lower
MC10321, which controls Enable inputs on the two
devices. Additionally, this output provides the 8th bit.
The reference ladders are connected in series, providing the 256 steps required for 8 bits. The input voltage range is determined by VRT ofthe upper MC10321,
and VRB of the lower device. A minimum of 1.0 volt is
required across each converter. The 500 n pot (20 turn
cermet) allows for adjustment of the midpoint since the
reference resistors of the two MCl 0321 s may not be
identical in value. Without the adjustment, a nonequal
NEGATIVE VOLTAGE REGULATOR
In the cases where a negative power supply is not
available - neither the - 3.0 to - 6.0 volts, nor a higher
negative voltage from which to derive it - the circuit
of Figure 23 can be used to generate - 5.0 volts from
the + 5.0 volts supply. The PC board space required is
small (=2.0 in 2), and it can be located physically close
to the MCl 0321. The MC34063 is a switching regulator,
and in Figure 23 is configured in an inverting mode of
operation. The regulator operating specifications are
given in the figure.
GLOSSARY
another) from the ideal step size. The ideal step size is
defined as the Full Scale Range divided by 2n (n =
number of bits). This error must be within ± 1 LSB for
proper operation.
APERTURE DELAY - The time difference between the
sampling signal (typically a clock edge) and the actual
analog signal converted. The actual signal converted
may occur before or after the sampling signal, depending on the internal configuration of the converter.
FULL SCALE RANGE (ACTUAL) - The difference
between the actual minimum and maximum end points
of the analog input (of an A-D).
BIPOLAR INPUT - A mode of operation whereby the
analog input (of an A-Dl. or output (of a DAC), includes
both negative and positive values. Examples are -1.0
to + 1.0 V, -5.0 to +5.0 V, -2.0 to +8.0 V, etc.
FULL SCALE RANGE (IDEAL) - The difference between
the actual minimum and maximum end points of the
analog input (of an A-D), plus one LSB.
BIPOLAR OFFSET ERROR- The difference between the
actual and ideal locations of the OOH to 01 H transition,
where the ideal location is 1/2 LSB above the most negative reference voltage.
GAIN ERROR - The difference between the actual and
expected gain (end point to end point), with respect to
the reference of a data converter. The gain error is usually expressed in LSBs.
BIPOLAR ZERO ERROR - The error (usually expressed
in LSBs) of the input voltage location (of a 7-bit AID) of
the 40H to 41 H transition. The ideal location is 112 LSB
above zero volts in the case of an AID set up for a
symmetrical bipolar input (e.g., -1.0 to + 1.0 V).
GREY CODE - Also known as reflected binary code, it
is a digital code such that each code differs from adjacent codes by only one bit. Since more than one bit is
never changed at each transition, race condition errors
are eliminated.
DIFFEREN11AL NONUNEARITY - The maximum deviation in the actual step size (one transition level to
MOTOROLA LlNEARIINTERFACE DEVICES
6-89
MC10321
INTEGRAL NONLINEARITY - The maximum error of
an AID, or DAC, transfer function from the ideal straight
line connecting the analog end points. This parameter
is sensitive to dynamics, and test conditions must be
specified in order to be meaningfull. This parameter is
the best overall indicator of the device's performance.
OFFSET BINARY CODE - Applicable only to bipolar
input (or output) data converters, it is the same as Natural Binary, except that all zeroes corresponds to the
most negative input voltage (of an AID), while all ones
corresponds to the most positive input.
POWER SUPPLY SENSITIVITY - The change in a data
converters performance with changes in the power supply voltage(s). This parameter is usually expressed in
percent of full scale versus t!N.
LSB - Least Significant Bit. It is the lowest order bit of
a binary code.
LINE REGULATION,- The ability of a voltage regulator
to maintain a certain output voltage as the input to the
regulator is varied. The error is typically expressed as
a percent of the nominal output voltage.
QUANTITIZATION ERROR - Also known as digitization
error or uncertainty. It is the inherent error involved in
digitizing an analog signal due to the finite number of
steps at the digital output versus the infinite number of
values at the analog input. This error is a minimum of
±1/2 LSB.
LOAD REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the load current
is varied. The error is typically expressed as a percent
of the nominal output voltage.
II
RESOLUTION - The smallest change which can be discerned by an AID converter, or produced by a DAC. It
is usually expressed as the number of bits, n, where the
converter has 2n possible states.
MONOTONICITY - The characteristic of the transfer
function whereby increasing the input code (of a DAC),
orthe input signal (of an AID). results in the output never
decreasing.
SAMPLING THEOREM - Also known as the Nyquist
Theorem. It states that the sampling frequency of an
AID must be no less than 2x the highest frequency (of
interest) of the analog signal to be digitized in order to
preserve the information of that analog signal.
MSB - Most Significant Bit. It is the highest order bit
of a binary code.
NATURAL BINARY CODE -
A binary code defined by:
UNIPOLAR INPUT - A mode of operation whereby the
analog input range (of an AID), or output range (of a
DAC), includes values of a single polarity. Examples are
o to +2.0 V, 0 to -5.0 V, +2.0 to +8.0 V, etc.
N = An2n + ... + A323 + A222 + A121 + A020
where each "Au coefficient has a value of 1 or O. Typically, all zeroes corresponds to a zero input voltage of
an AID, and all ones corresponds to the most positive
input voltage.
NYQUIST THEORY -
UNIPOLAR OFFSET ERROR - The difference between
the actual and ideal locations of the OOH to 01 H transition, where the ideal location is 1/2 LSB above the
most negative input voltage.
See Sampling Theorem.
FIGURE 11 -
DIFFERENTIAL PHASE AND GAIN TEST
HDS-1250
12 Bit D/A
D4
Video
Signal
(See Below)
••
DO
Clock----+--------'
1.024
Vp_p
to
Analyzer
=
. ". , , . , ,.,.,. . . , -----,tr-
VRT
2.0 V
----------------------~--VRB
VIDEO INPUT SIGNAL
MOTOROLA LINEAR/INTERFACE DEVICES
6-90
-Input waveform: 571,4 mV
p-p sine wave @ 3.579545
MHz, dc levels as shown.
- MC10321 clock at 14.31B1B
MHz (4x) asynchronous to
input.
- Differential gain: p-p output
@ each IRE level
compared to that at 0 IRE,
- Differential phase: Phase @
each IRE level compared
to that @ 0 IRE,
'"'~
_
~
~~
c
~~
~ ~
~
»
~
~~
<
m
10
»
VRT~""
, _
,
,
•
".}_
FIGURE 12
-M.",,,
4
P'OC'OI'",,"
1
,","
R
!'
'"
----- - - - -1-----'
I "I-'00'
:
", .. m
,""'"~'
,
'
i'
, "
- ',,
''
"
Z
m
A
,
,,~
" , , , , 'i,,
"00"
"'~~,
...
'm,,,
C
m
II"
•
I,.
R
Reference
Resistor
i~f"
,,,
~'"
",-,. . -'""'"'
Clock
(0-25 MHz)
II
'"
'0
m
~{ -~
i
I, A
' '\
i'
!!
IC
:' y
i'
'-~:l~
:,.:.. ,~;:--;4
.
Enable
ENABLE
00
02
"19
00
~
s:
n
e~
MC10321
FIGURE 13 -
CONVERSION SEQUENCE
Clock
'~------~vr------~/
L
L....---
Comparator Outputs Latched
(Valid Data Available After tCKDV)
Latches Comparator Outputs.
Opens Data Output Latches
Data Outputs Latched, Releases Comparator Latches
FIGURE 14 -
ENABLE TO OUTPUT CRITICAL TIMING
FIGURE 15 -
PRECISION VRT VOLTAGE SOURCE
+5.0 to +40 V
•
1.5
Rl
v-\:r-____
~
91 afar +5.0V
560 a for +15V
--117
Out
I.
3-State
0.1
r--,
I
-=- :I
__
Rl
11.5k
I
I
+
r-ff~ 1~~LJ
I
DO-D6
I
I
or
__
0.1
:L __ JI
------<
Timing @ D6-DO measured where waveform starts
to change. Indicated time values are typical
@ 25°C, and are in ns.
FIGURE 16 -
+5.0 to +40 V
I
I
2.0 k,
2.5 V References
MC1403U
MC1403AU
Line Regulation
0.5 mV
0.5 mV
TC (ppmf'C) max
40
25
<1Vout for 0-70°C
7.0mV
4.4mV
Initial Accuracy
±1.00/0
±1.0%
VRT VOLTAGE SOURCE
o--......--i
LM317LZ
Line Regulation
60
<1V out for 0-70°C
8.4 mV
Initial Accuracy
±4.0%
MOTOROLA LINEAR/INTERFACE DEVICES
6-92
1.0 mV
TC (ppmf'C) max
MC10321
FIGURE 17 -
VRB VOLTAGE SOURCES
+5.0 to +40 V
To
VRB
In
Out
0.1
MC1403
Io.
1
Gnd
Rl
~
91 n for - 5.0 V
560 {lfor -15V
-5.0 to -15 V
Reference
MC1403U
MC1403AU
LM337MT
0.5mV
0.5 mV
1.0 mV
TC (ppmFC) max
40
25
48
dVout for 0-70°C
7.0 mV
4.4 mV
6.7 mV
Initial Accuracy
±1.0%
±1.0%
±4.0%
Line Regulation
FIGURE 18
Input
Output
FIGURE 19
r,
-
AIU'29.36086~'
./
-~-L--.. __
.L..L.J:-;
I
_ ---1_
~
,
!.,
~:
_·4 _ _
,
±
!
.~
!
-.
---1 ___ .
••
,
~-.--.-:"'-~
! 11
.
_ . __..J--L..L .--.1._ i
MOTOROLA LINEAR/INTERFACE DEVICES
6-93
MC10321
FIGURE 20 - APPUCATION CIRCUIT FOR DIGITIZING VIDEO
+5.0V
10,16
13
+5.0V
14
-=
+1.0V
-
15
VCC(D)
EN
EN
ClK
OR
MC10321
7
06
4
••
VRT
Iref
••
DO
II
12
18
1l
Output
Data
0.1
5
VRB
7.5 k
6
Vin
VEE
8
Gnd
11,17
10 JLF
0.1
-5.2 V
1.0 JLF '--..J\I'''''""~--l
Video Input '---.J I----'VI/I.~......~
(1.0 Volt pop)
-
NOTES: 1) Bypass capacitors required at
power supply pins of ALL IC's.
2) Ground plane required over all
parts of circuit board.
3) A1 = MC34002.
4) These resistors can be changed
to match signal source impedance.
.ro
son
MOTOROLA LINEAR/INTERFACE DEVICES
6-94
MC10321
FIGURE 21 -
F
-
-25 MHz
Clock
°
~
,..
Gnd
EN
OR
ClK
06
VRT
•
•
•
•
DO
MC10321
+2.0 V
-
8-BIT AID CONVERTER
EN
VRB
E+5.0V
500 n
(Optional
See Text)
Yin
VEE
VCC(O)
VCC(A)
qO.1
>-
:n
10/LF "::"
£0.1
=
10/LF
VEE
-
VCC(O)
VCC(A)
":"
VRT
5.2V
qO.1
EN
OR
Clock
~
.----
-2.~V
06
VRB
•
•
•
•
DO
ClK
Yin
f--<> 06
•
?= •
•
f--<> DO
'----
+5.0Vo- EN
3X 74lS173A
latches
(Optional)
Gnd
...L
MOTOROLALINEAR/INTERFACE DEVICES
6-95
OR
07
MC10321
FIGURE 22 -
IT
50 M,?CIOCk
~~K
Q
D74F74~
50 MHz 7 BIT AID CONVERTER
Gnd
EN
ClK
+5.0 V
0- EN
,..
OR
D6
D5
D4
D3
02
01
DO
MC10321
(#1)
VRT
+1.0V
"
VRB
-1.0V
Vin
+5~V
o~Q,I
_
-5.2~ -
II
~
O.l
VEE
VCC(D)
MC74F257
L.-.-
-
p
11a
11b
11c
11d
1O l'F
VEE
VCC(O)
-
OR
06
05
-
D4 03
MC10321
(#2)
~
ClK
02
01
DO
Vin
() Vin
lOa
lOb
10c
10d
11a
11b
11c
11d
L--
-
~
74F741 Q
Q
00-06 #1
00-06 #2
MOTOROLA LINEAR/INTERFACE DEVICES
6-96
05 ..
04 ;
03 ~
r-- 02 0
01
DO
S
~
Za
Zb
Zc
Zd
MC74F257
Gnd
....,OR
C0- 06
S
T
VRB
~
--
1
VCC(A)
VRT
+5.0Vo-- EN
EN
Za
Zb
Zc
Zd
VCC(A)
1OI'F
ri
-
--
lOa
lOb
10c
10d
-
-
MC10321
FIGURE 23 -
Yin "
(+4.5 to + 5.5 V)
1
-5.0 VOLT REGULATOR
100
/L F
2.2 II
HI
6
8
7
1
21---<~/LH
MC34063
5
.J,.
3.0 kll
1
3
4
L _lL
1 ...
470'pF
II
.
-=J:.
1N5819
1.0 kll
--
470/LFt
Line Regulation
4.5 V < Yin < 5.5 V. lout
Load Regulation
Yin
Output Ripple
Short Circuit lout
Efficiency
1
1.0/LH
~
5.0 V. 8.0 rnA < lout < 20 rnA
Yin
~
5.0 V. lout
Yin
~
5.0 V. RL
Yin
~
5.0 V. lout
~
20 rnA
47O /LF
0.16%
10 rnA
~
~
t
Vout
-5.0V/20 rnA
. 0.4%
2.0 rnV p-p
0.1 II
~
50 rnA
MOTOROLA LINEAR/INTERFACE DEVICES
6-97
140 rnA
52%
II
MOTOROLA LINEAR/INTERFACE DEVICES
6-98
Interface Circuits •
In Brief ...
Described in this section is Motorola's line of interface circuits, which provide the means for interfacing
microprocessor or digital systems to the external world,
or to other systems.
Included are devices for reading and writing to a
floppy disk or tape drive system, devices which allow
a microprocessor to communicate with its own array of
memory and peripheral 1/0 circuits.
The line drivers, receivers, and transceivers permit
communications between systems over cables of several thousand feet in length, and at data rates of up to
several megahertz. The common EIA data transmission standards, several European standards,
IEEE-488, and IBM 360/370 are addressed by these
devices.
The peripheral drivers are designed to handle high
current loads such as relay coils, lamps, stepper
motors, and others. Input levels to these drivers can
be TTL, CMOS, High Voltage MOS, or other user
defined levels. The display drivers are designed for
LCD, LED, incandescent and other types of displays,
and provide various forms of decoding.
Selector Guide
Memory Interface and Control ....
Microprocessor Bus Interface.....
Single-Ended Bus Transceivers ...
Line Receivers ...................
Line Drivers .....................
Line Transceivers. . . . . . . . . . . . . . ..
Peripheral Drivers ................
7-2
7-4
7-5
7-5
7-6
7-6
7-7
Alphanumeric Listing .............. 7-8
Related Application Notes. . . . . . . . .. 7-9
Data Sheets ....................... 7-10
•
Interface Circuits
Memory Interface and Control
Motorola's line of circuits in this category have well
established industry standards for reading and writing in
a floppy disk system. The write circuits are designed for
both straddle erase and tunnel erase heads, and provide
both the writing and erasing functions. The read circuits
include all the circuitry for peak detection, filtering, wave
shaping, and guaranteed peak shift specifications.
Memory Interface and Control
Floppy Disk Write Controllers ................
Floppy Disk Read Amplifier System ............
Magnetic Tape Sense Amplifier ...............
Peripheral Clamping Array. . . . . . . . . . . . . . . . . .
Microprocessor Bus Interface
Address and Control Bus Extenders . . . . . . . . . . .
Microprocessor Data Bus Extenders . . . . . . . . . . .
Single-Ended Bus Transceivers
For Instrumentation Bus . . . . . . . . . . . . . . . . . . .
For High-Current Party-Line Bus. . . . . . . . . . . . . .
Line Receivers
General-Purpose. . . . . . . . . . . . . . . . . . . . . . ..
360/370 I/O Interface . . . . . . . . . . . . . . . . . . . ..
EIA Standard . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Drivers
General-Purpose. . . . . . . . . . . . . . . . . . . . . . . .
360/370 I/O Interface . . . . . . . . . . . . . . . . . . . . .
EIA Standard . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Transceivers. . . . . . . . . . . .. ...........
Peripheral Drivers . . . . . . . . . . . . . . . . . . . . . . . . .
Floppy Disk Write
Controllers
Straddle Erase Controller
MC3469P -
TA = 0° to
+ 70°C,
Case 648
Write
r------~ Gate
Designed to provide the entire interface between
floppy disk heads and the head control and write data
signals for straddle-erase heads.
Provisions are made for selecting a range of accurately controlled write currents and for head selection
during both read and write operation. Additionally, provisions are included for externally adjusting degauss
period and inner/outer track compensation.
Erase 0
Erase 1
IRW
Select
Center Tap 0
Center Tap 1
Head
Select
RlWl RIW2
Tunnel/Straddle Erase Controller
MC3471 P -
T A = 0° to
+ 70°C,
Dl
Case 738
D2
Provides the entire interface between the write data
and head control signals and the heads (write and erase)
for either tunnel or straddle-erase floppy disk systems.
Has provisions for external adjustment of degauss
period, inner/outer track compensation, and the delay
from write gate to erase turn-on and turn-off.
Erase 0
Erase 1
Center Tap 0
Center Tap 1
Inhibit
VAaf IRef Write
Head
Gate
Select
MOTOROLA LINEAR/INTERFACE DEVICES
7-2
7-2
7-3
7-3
7-3
7-4
7-4
7-5
7-5
7-5
7-5
7-5
7-6
7-6
7-6
7-6
7-7
5.0 V
Floppy Disk Read
Amplifier System
Gnd
12 V
111 ,- hs - - k - , - - - - - -
-
I
I
17r--L-114
Magnetic
Head
~
1,---,---,---,--.
I
I Filter I
2
16
L...._
T
:
oto
I
o
I
0
36 cL
MC3470.A - TA = 0° to + 70°C, Case 707
--.J
Gain
Stage
I
I
I
Gain
Select
Designed as monolithic Read Amplifier System for
obtaining digital information from floppy disk storage.
These devices accept differential ac signals produced
by the magnetic head and provides a digital output
pulse that corresponds to each peak of the input signal.
A gain stage amplifies the input waveform and applies
it to an external filter network, enabling the active differentiator and time domain filter to produce the desired
output. These devices provide all the active circuitry to
perform the floppy disk Read amplifier function, and
guarantee to have a maximum peak shift of 5.0%,
adjustable to zero, for the MC3470P and 2.0%, adjustable to zero, for the MC3470AP.
15
Detector
o
12~
t
o
0
L
Differentiator
Network
o
Mono 1
RC
Peak Shift
If; 250 kHz,
VIO; 1.0
Vpp)
t
9
Mono 2
RC
VN
% Max
Min
MC3470
MC3470A
5.0
2.0
80
100
Peripheral
Clamping Array
MC3467L.P -
TCF6000P1.D -
0
sb b
Oifferential
Input
Voltage Gain
If; 200 kHz, Input Common
VIO = 5.0 mV Mode Range
[RMS))
15% Max THO)
Device
Number
Magnetic Tape
Sense Amplifier
TA = 0° to + 70°C, Case 726, 707
The MC3467 provides three independent preamplifiers with individual electronic gain control, optimized
for use in 9-track magnetic tape memory systems where
low noise and low distortion are paramount objectives.
The electronic gain control allows each amplifier's
gain to be set anywhere from essentially zero to a maximum of approximately 100 VN. Minimum small-signal
bandwidth is 10 MHz, and Common-Mode Input Voltage
range is 1.5 V min.
t.
6b L
V
I Max
Min
I Max
130
130
-0.1
I
I
1.5
TA = -40° to +85°C, Case 626, 751
· .. designed to protect input/output lines of microprocessor systems against voltage transients.
• Optimized for HMOS System
• Minimal Component Count
• Low Board Space Requirement
• No P.C.B. Track Crossovers Required
• Applications Areas Include Automotive, Industrial,
Telecommunications and Consumer Goods
TAPE AMPLIFIER SYSTEM
Electronic Gain
Control
Digital
Inputs
1-'W'~-t1I----+t...,
I -"M~""'I----+t--t
Micro
Computer
Analog
Inpull
If -'WO~-H....--+--t
R'n
MOTOROLA LINEAR/INTERFACE DEVICES
7-3
•
Microprocessor Bus Interface
Motorola offers a spectrum of line drivers and receivers which provide interfaces to many industry
standard specifications. Many of the devices add key
operational features, such as hysteresis, short circuit
protection, clamp diode protection, or special control
functions.
Address and Control Bus Extenders
are fabricated with Schottky TTL technology for high
speed.
These devices are designed to extend the drive capabilities oftoday's standard microprocessors. All devices
VOLlmax)
@48mA
VOH(min)
@ -S.2mA
Propagation
Delay
Max (ns)
Buffers
Per Package
0.5
2.4
13
6
MC8T95!
MC6885
L1620
P!648
Nonlnverting
0.5
2.4
11
6
MC8T96!
MC6886
L1620
P!648
Inverting
0.5
2.4
13
6
MC8T97!
MC68S7
L!620
P!648
Nonlnverting
0.5
2.4
11
6
MC8T98!
MC6888
L1620
P!648
Inverting
Hex 3-State Buffers/Inverters - T A = 0° to
Device
Package
Comments
+ 75°C
MC6888 provide two Enable inputs - one controlling
four buffers and the other controlling the remaining two
buffers.
These devices differ in that the non-inverting MC8T95!
MC6885 and inverting MC8T96!MC6886 provide a twoinput Enable which controls all six buffers, while the
non inverting MC8T97!MC6887 and inverting MC8T98!
#These devices may be ordered by either of the paired numbers.
MC8T97!MC6887# - Noninverting
MC8T98!MC6888# - Inverting
Two Enable inputs, one controlling four buffers and the
other controlling the remaining two buffers.
MC8T95!MC6885# - Noninverting
MC8T96/MC6886# - Inverting
Two-input Enable controls all six buffers
Oolput F
•Add inverter for
~ Add Inverter for
MC6888/MC8T98
MC6886/MC8T96
Microprocessor Data Bus Extenders
Driver Characteristics
Receiver Characteristics
Output
Current
(mA)
Propagation
Delay
Max (ns)
Propagation
Delay
Max (ns)
Transceivers
Per Package
Device
Package!
Suffix
4B
14
14
4
MC8T26A
(MC6880A)
P!648
L1620
Inverting Logic
48
17
17
4
MC8T28
(MC6889)
P!648
L1620
Nonlnverting Logic
Comments
MOTOROLA LINEAR/INTERFACE DEVICES
7-4
Single-Ended Bus Transceivers
For Instrumentation Bus, Meets GPIB/IEEE Standard 488
Driver Characteristics
Receiver Characteristics
Output
Current
(mA)
Propagation
Delay
Max (ns)
Propagation
Delay
Max (ns)
Transceivers
48
50
50
4
MC3446A
48
30
50
8
MC3447
48
100
Per Package
25
17
30
4
30
4
Device
MC3448A
MC3440A
Packagel
Suffix
Comments
MOS Compatible, Input Hysteresis
P/648
Input Hysteresis, Open Collector, 3-State
P3/724
U623
Outputs with Terminations
P/648
U620
Outputs with Terminations
P/648
Input Hysteresis, Open Collector 3-State
Input Hysteresis, Enable for 3 Drivers
Common Enable, Input Hysteresis
MC3441A
For High-Current Party-Line Bus for Industrial and Data Communications
Open Collector Outputs, Common
Enable
15
Line Receivers
General-Purpose
Type"
Of
Output
t prop
Delay
Time
Max
(ns)
D
D
TP
OC
D
D
S
S = Single
Ended
D = Differential
PartySupplies
tion
Strobe
Or
Enable
25
25
Yes
Yes
Yes
Yes
±5
±5
MC3450
MC3452
P/648
TP
OC
25
25
Yes
Yes
Yes
Yes
±5
±5
MC75107
MC75108
P/646
TP
30
Yes
Yes
+5
MC3437
Line
Opera-
Power
(V)
Device
Packagel
Suffix
Receivers
Per
Package
Companion
Drivers
4
4
MC3453
2
2
MC75S110
Ll632
P/648
6
Ll620
Comments
Quad version of
MC75107/8
Dual version of
MC3450/2
Input Hysteresis
Ll620
360/370 1/0 Interface
S
S
TP
30
TP
30
Yes
Yes
No
Yes
+5
+5
MC75125
MC75127
P/648
U620
7
MC75128
MC75129
pn38
Ll732
8
MC3481
MC3485
Circuitry
Schottky
MC3481
MC3485
Active low strobe
Active high strobe
*OC = Open Collector, TP = Totem-pole output
EIA Standard
Type"
Of
Output
t prop
Delay
Time
Max
(ns)
PartyLine
Opera-
S
R
S,D
S,D
S,D
S,D
= Single
Ended
D = DifferS
ential
*R
=
Power
Supplies
tion
Strobe
Or
Enable
(V)
Device
85
No
No
+5
TP
TP
30
30
Yes
Yes
Yes
Yes
TP
TP
35
35
Yes
Yes
Yes
Yes
Resistor Pull-up, TP
=
Receivers
Packagel
Suffix
Per
Package
MC1489
MC1489A
P/646
U632
4
MC1488
IRS-232)
EIA-232-D
+5
+5
AM26LS32
MC3486
P/648
Ll620
4
4
AM26LS31
MC3487
IRS·422/423)
EIA-422/423
+5
+5
SN75173
SN75175
N/648
J/620
4
4
SN75172
SN75174
EIA-422/423/485
Totem-pole output
MOTOROLA LINEAR/INTERFACE DEVICES
7-5
Companion
Drivers
EIA
Standard
(RS-422/423/485)
•
•
Line Drivers
General Purpose
Output
Current
Capability
(mA)
t prop
Delay
Time
Max
(ns)
S = Single
Ended
0= Differential
PartyLine
Opera-
15
15
15
15
tion
Strobe
Or
Enable
Power
Supplies
(V)
D
Ves
Ves
±5
MC3453
PI648
U620
4
MC3450
MC3452
Quad version of
MC75S110
D
Ves
Ves
±5
MC75S110
P/646
U632
2
MC75107
MC75108
Dual version of
MC3453
Ves
Ves
+5
MC3481
P/648
4
MC75125
MC75127
Short Circuit
Fault Flag
4
MC75128
MC75129
Short Circuit
Fault Flag
Device
Packagel
Suffix
Drivers
Per
package
Companion
Receivers
Comments
360/370 1/0 Interface
60
45
S
U620
60
S
Ves
S = Single
Ended
0= Differentlal
PartyLine
Opera-
45
Ves
+5
MC3485
Power
Supplies
tion
Strobe
Or
Enable
(V)
Device
P/648
U620
EIA Standard
Output
Current
Capability
(mA)
t prop
Delay
Time
Max
(ns)
85
85
35
35
D
D
Ves
Ves
Ves
Ves
+5
+5
SN75172
SN75174
48
20
D
Ves
Ves
+5
MC3487
Packagel
Suffix
Drivers
Per
Package
N/648
J/620
4
4
SN75173
SN75175
P/648
4
MC3486
4
AM26LS32
(RS-422) EIA-422
with 3-State
Outputs
2
MC3486
AM26LS32
(RS-423/232)
EIA-423/232-D
4
MC1489
MC1489A
(RS-232)
EIA-232-D
Companion
Receivers
U620
48
20
D
Ves
Ves
+5
AM26LS31
P/648
20
-
S
No
No
±12
MC3488A
(/LA9636A)
P1/626
350
S
D/620
10
No
Ves
±9to
±12
MC1488
U/693
P/646
L/632
EIA Standard
(RS-485)
EIA-485
Line Transceivers
Driver
Prop
Delay
(Max n5)
Prop
Delay
(Max ns)
CE = Common
Enable
DE = Driver
Enable
RE = Receiver
Enable
20
30
DE, RE
Receiver
Party
Line
Operation
Power
Supply
(V)
Ves
+5
Device
MC34050
Packagel
Suffix
Drivers
Per
Package
Receivers
Per
Package
U620
2
2
(RS-422)
EIA-422
2
2
(RS-422)
EIA-422
P/648
20
30
DE
Ves
MC34051
+5
U620
P/648
MOTOROLA LINEAR/INTERFACE DEVICES
7-6
EIA
Standard
Peripheral Drivers
Output
Capability
(mA)
Input
Capability
Propagation
Delay Time
Max (,..s)
Output
Clamp
Diode
Off State
Voltage
Max (V)
300
TTL, DTL
1.0
Yes
70
500
TTL, CMOS,
PMOS
1.0
Yes
500
14 V to 25 V
PMOS
1.0
Current
Drivers
Per
Package
Packagel
Suffix
Logic
Function
MC1472
2
P11626
Ul693
NAND
50
ULN2801
8
Al707
Invert
Yes
50
ULN2802
8
Al707
Invert
Device
500
TTL, CMOS
1.0
Yes
50
ULN2803
8
Al707
Invert
500
6.0 V to 15 V
MOS
1.0
Yes
50
ULN2804
8
Al707
Invert
500
TTL, CMOS
PMOS
1.0
Yes
50
MC1411,B
7
PI648
Invert
500
14 V to 25 V
PMOS
1.0
Yes
50
MC1412,B
7
P1648
Invert
500
TTL, 5.0 V
CMOS
1.0
Yes
50
MC1413,B
7
PI648
Invert
500
8.0 V to 18 V
MOS
1.0
Yes
50
MC1416,B
7
PI648
Invert
1500
TTL, 5.0 V
CMOS
1.0
Yes
50
ULN20688
4
81648
Invert
1500
TTL, 5.0 V
CMOS
1.0
No
50
ULN2074B
4
81648
Collector, Emitter
available at Pins
MOTOROLA LINEAR/INTERFACE DEVICES
7-7
II
II
INTERFACE CIRCUITS
Memory Interface and Control
Device
MC3467
MC3469P
MC3470P,AP
MC3471P
MC3480
TCF6000
Function
Triple Preamplifier ..................................................
Floppy Disk Write Controller ..........................................
Floppy Disk Read Amplifier System ................................... ,
Floppy Disk Write Controller/Head Driver .............................. ,
Memory Controller Circuit ............................................
Peripheral Clamping Array ...........................................
Page
7-83
7-88
7-98
7-112
7-123
7-196
Microprocessor Bus Interface
Device
MC8T26A
MC8T28
MC8T95
MC8T96
MC8T97
MC8T98
MC6875,A
MC6880A
MC6885
MC6886
MC6887
MC6888
MC6889
Function
Quad Three-State Bus Transceiver .................................... ,
Noninverting Bus Transceiver .........................................
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
MC6800 Clock Generator/Driver .......................................
Quad Three-State Bus Transceiver .................................... ,
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
Hex Three-State Buffer/Inverter .......................................
Noninverting Bus Transceiver .........................................
Page
7-16
7-21
7-26
7-26
7-26
7-26
7-153
7-16
7-26
7-26
7-26
7-26
7-21
Single-Ended Bus Transceivers
Device
MC26S10
MC3440A
MC3441A
MC3446A
MC3447
MC3448A
Function
Quad Open-Collector Bus Transceiver ..................................
Quad Interface Bus Transceiver .......................................
Quad Interface Bus Transceiver .......................................
Quad Interface Bus Transceiver .......................................
Bidirectional Instrumentation Bus Transceiver ...........................
Quad Three-State Bus Transceiver .................................... ,
Page
7-48
7-54
7-54
7-58
7-61
7-67
Function
Quad EIA-422/3 Line Receiver with Three-State Outputs ..................
Quad MDTL Line Receiver ............................................
Hex Unified Bus Receiver ............................................
Quad Line Receiver ..................................................
Quad Line Receiver ..................................................
Quad EIA-422/423 Line Receiver .......................................
Dual Line Receiver ..................................................
Dual Line Receiver ..................................................
Seven-Channel Line Receivers ........................................
Seven-Channel Line Receivers ........................................
Eight-Channel Line Receivers .........................................
Eight-Channel Line Receivers .........................................
Quad EIA-422A13 Line Receiver with Three-State Output ..................
Quad EIA-422A13 Line Receiver with Three-State Output ..................
Page
7-13
7-43
7-51
7-72
7-72
7-142
7-171
7-171
7-181
7-181
7-185
7-185
7-191
7-191
line Receivers
Device
AM26LS32
MC1489.A
MC3437
MC3450
MC3452
MC3486
MC75107
MC75108
MC75125
MC75127
MC75128
MC75129
SN75173
SN75175
MOTOROLA LINEAR/INTERFACE DEVICES
7-8
Line Drivers
Device
AM26LS31
MC1488
MC3453
MC3481
MC3485
MC3487
MC3488A
MC75S110
SN75172
SN75174
Function
Quad EIA-422 Line with Three-State Output .............................
Quad MDTL Line Driver ..............................................
Quad Line Driver ....................................................
Quad Single-Ended Line Driver ........................................
Quad Single-Ended Line Driver ........................................
Quad EIA-422 Line Driver with Three-State Outputs ......................
Dual EIA-423/232C Driver .............................................
Dual Line Driver ....................................................
Quad EIA-485 Line Driver with Three-State Output .......................
Quad EIA-485 Line Driver with Three-State Output .......................
Page
7-10
7-37
7-79
7-137
7-137
7-145
7-149
7-176
7-189
7-189
Line Transceivers
Device
MC34050
MC34051
Function
Dual EIA-422/423 Transceiver
Dual EIA-422/423 Transceiver
Page
7-164
7-164
Peripheral Drivers
Device
MC1411.B
MC1412.B
MC1413.B
MC1416.B
MC1472
ULN2068B
ULN2074B
ULN2801
ULN2802
ULN2803
ULN2804
Function
Peripheral Driver Array ..............................................
Peripheral Driver Array ..............................................
Peripheral Driver Array ..............................................
Peripheral Driver Array ..............................................
Dual Peripheral Positive NAND Driver ..................................
Quad 1.5 A Darlington Switch .........................................
Quad 1.5 A Darlington Switch .........................................
Octal Peripheral Driver Array .........................................
Octal Peripheral Driver Array .........................................
Octal Peripheral Driver Array .........................................
Octal Peripheral Driver Array .........................................
Page
7-30
7-30
7-30
7-30
7-34
7-200
7-204
7-208
7-208
7-208
7-208
RELATED APPLICATION NOTES
Application
Note
AN708A
AN781A
AN917
Related
Title
Device
Line Driver and Receiver Considerations ........................... MC3486
Revised Data - Interface Standards ............................... MC3488
Reading and Writing in Floppy Disk Systems Using
Motorola Integrated Circuits .................................... MC3467
MOTOROLA LINEAR/INTERFACE DEVICES
7-9
II
•
®
AM26LS31
MOTOROLA
QUAD LINE DRIVER WITH NANO ENABLED
THREE·STATE OUTPUTS
QUAD EIA·422 LINE DRIVER
WITH THREE·STATE OUTPUTS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The Motorola AM26LS31 is a quad differential line driver
intended for digital data transmission over balanced lines. It meets
all the requirements of EIA·422 Standard and Federal Standard
1020.
The AM26LS31 provides an enable/disable function common
to all four drivers as opposed to the split enables on the MC3487
EIA·422 driver.
The high impedance output state is assured during power
down.
DSUFFIX
CERAMIC PACKAGE
CASE 620-10
• Full EIA·422 Standard Compliance
• Single
+ 5.0 V Supply
• Meets Full Vo
= 6.0 V, VCC = 0 V, 10 <
DSUFAX
100 pA Requirement
PLASTIC PACKAGE
CASE 751B-03
SO-16
• Output Short Circuit Protection
• Complementary Outputs for Balanced Line Operation
16
• High Output Drive Capability
PSUFAX
• Advanced LS Processing
PLASTIC PACKAGE
CASE 648-06
• PNP Inputs for MOS Compatibility
PIN CONNECTIONS
DRIVER BLOCK DIAGRAM
Input
Outputs
Inverting
-----r--....
Enable
Output
Controls
TRUTH TABLE
Control
Non-Inverting
Output
Inputs
IE/E)
Input
ORDERING INFORMATION
Device
Temperature
Range
MC26LS31D*
Package
o to 70"C
H/L
H/L
L/H
X
Ceramic DIP
AM26LS31DC
AM26LS31PC
H
L
Inverting
Output
H
L
Z
L = Low Logic State
H = High Logic State
X .. Irrelevant
Z = Third-5tata IHigh Impedance)
Plastic DIP
SO·16
*Note that the surface mount MC26lS310 devices use the same die as in the ceramic and plastic
DIP AM26LS31 DC devices, but with an Me prefix to prevent confusion with the package suffixes.
MOTOROLA LINEAR/INTERFACE DEVICES
7·10
L
H
Z
AM26LS31
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
8.0
Vdc
Input Voltage
VI
5.5
Vdc
Operating Ambient Temperature Range
TA
Operating Junction Temperature Range
Ceramic Package
Plastic Package
TJ
Power Supply Voltage
Storage Tempe"rature Range
o to
·C
+70
·C
175
150
Tstg
·C
-65 to +150
ELECTRICAL CHARACTERISTICS (Unless otherwise noted specifications apply 4.75 V", VCC '" 5.25 V and O·C '" TA '" 70·C.
Typical values measured at VCC
Characteristic
=
50 V and TA
=
25·C)
Symbol
Min
Typ
Max
0.8
Unit
Vdc
-
Vdc
Input Voltage -
low logic State
VIL
-
Input Voltage -
High logic State
VIH
2.0
-
Input Current - low logic State
Nil = 0.4 V)
III
-
-
-360
Input Current - High logic State
(VIH = 2.7 V)
(VIH = 7.0 V)
IIH
-
+20
+100
Input Clamp Voltage
(11K = -18 rnA)
VIK
-1.5
V
Output Voltage - low logic State
(lOl = 20 rnA)
VOL
-
-
0.5
V
Output Voltage - High logic State
(lOH = -20 rnA)
VOH
2.5
-
-
V
Output Short Circuit Current
(VIH = 2.0 V) Note 1
lOS
-30
-
Output Leakage Current - Hi-Z State
(VOL = 0.5 V, Vll(E) = 0.8 V, VIH(E)
(VOH = 2.5 V, Vll(E) = 0.8 V, VIH(E)
10(Z)
= 2.0 V)
= 2.0 V)
Output Leakage Current - Power OFF
(VOH = 6.0 V, VCC = 0 V)
(VOL = -0.25 V, VCC = 0 V)
Output Offset Voltage Difference, Note 2
10(off)
/LA
-
Output Differential Voltage Difference, Note 2
Power Supply Current
(Output Disabled) Note 3
-
-20
+20
-
+100
-100
-
-
VOD
2.0
-
laVODI
-
-
ICCX
-
VOS-VOS
-150
rnA
/LA
-
Output Differential Voltage, Note 2
pA
/LA
±0.4
-
V
V
±0.4
V
60
80
rnA
Typ
Max
Unit
1. Only one output may be shorted at a time.
2. See EIA Specification EIA-422 for exact test conditions.
3. Circuit in three-state condition.
SWITCHING CHARACTERISTICS (VCC = 50 V TA = 25·C unless otherwise noted)
Characteristic
Symbol
Propagation Delay Times
High to low Output
Low to High Output
ns
tpHl
tplH
Output Skew
Propagation Delay (Cl = 10 pF, RL =
(Cl = 10 pF, Rl =
(Cl = 30 pF, RL =
(Cl = 30 pF, RL =
Control to Output
75 to Gnd)
180 to VCC)
75 to Gnd)
180 to VCC)
n
n
n
n
Min
tPHZ(E)
tPlZ(E)
tPZH(E)
tPZL(E)
-
-
20
20
-
6.0
-
-
30
35
40
45
-
MOTOROLA LINEAR/INTERFACE DEVICES
7-11
ns
ns
-
•
AM26LS31
FIGURE 1 - THREE-8TATE ENABLE TEST CIRCUIT
AND WAVEFORMS
3.0 V or Gnd
To Scop, (Input)
To Scope
Output
Input
Pulse ganerator characteristics
Zo ~ 60
Open for tpZH(E) Test Only
n
~+5V
PRR <;1.0MHz
180
Enable
50% Dutv Cycle
1TLH. 1THL <; 6 n.
Pu'se
Generator
n
50
RL - See Test Table
CL Includes Probe and Jig Capacitance. See Test Table
3.0 V
, , - - - - - - 3.0 V
Control
Input
(Enable)
0
Control
Input
/~.3V
(Enable)
-------J~~----------O
•
I--
tpZL(E) -
tPHZ(E)
~
Output
VOH
1.3V
1\'-------- VOL
Output
-----+4----- 0 V
-- 1.5 V
f--, ____ VOH
tpZH(E) -
J
Output
Output
V13V
.
========~~-------OV
------"------VOL
OV
FIGURE 2 - PROPAGATION DELAY TIMES INPUT TO
OUTPUT WAVEFORMS AND TEST CIRCUIT
Scope
(Output)
5.0 V
'n.
Output
200
Pulse
Generator
Puis. generator characteristics
2 0 " 50 n
3.0 V
Enable
PRR <; 1.0 MHz
50% Duty Cy.cle
CL Includes Probe and Jig Capacitance
r - - - " ' \ - - - - - - 3.0 V
tTLH. t-rHL '" 6 ns
Input
'----OV
Output
Output
VOL
OV
MOTOROLA LINEAR/INTERFACE DEVICES
7-12
®
AM26LS32
MOTOROLA
QUAD EIA-4221423 LINE RECEIVER
Motorola's Quad EIA-422/3 Receiver features four independent
receiver chains which comply with EIA Standards for the Electrical
Characteristics of Balanced/Unbalanced Voltage Digital Interface
Circuits. Receiver outputs are 74LS compatible, three-state structures which are forced to a high impedance state when Pin 4 is
a LogiC "0" and Pin '2 is a LogiC "'." A PNP device buffers each
output control pin to assure minimum loading for either Logic
"'" or Logic "0" inputs. In addition, each receiver chain has internal hysteresis circuitry to improve noise margin and discourage
output instability for slowly changing input waveforms. A summary of AM26LS32 features include:
QUAD EIA-422/3 LINE RECEIVER
WITH THREE-STATE
OUTPUTS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
D SUFFIX
CERAMIC PACKAGE
CASE 620-10
• Four Independent Receiver Chains
• Three-State Outputs
• High Impedance Output Control Inputs
IPIA Compatible)
• Internal Hysteresis - 30 mV (Typ) @ Zero Volts Common Mode
• Fast Propagation Times - 25 ns ITyp)
D SUFFIX
PLASTIC PACKAGE
CASE 751B-03
50·16
•
• TTL Compatible
• Single 5 V Supply Voltage
• Fail·Safe Input-Output Relationship. Output Always High When
Inputs Are Open, Terminated or Shorted
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
• 6K Minimum Input Impedance
PIN CONNECTIONS
RECEIVER CHAIN BLOCK OIAGRAM
Differential
Inputs
Three-State
Control
Inputs
Input A
Output
Outputs A{ 2
3·State
B
4
ContrOl
Output C
5
L..="'---+lr--·LJ'2
3-5tate
Control
Output D
11
ORDERING INFORMATION
Device
Temperature
*Note that the surface mount MC26lS32D devices use the same die as in the ceramic and plastic
DIP AM26LS32DC devices, but with an Me prefix to prevent confusion with the package suffixes.
AM26LS32PC
MC26LS32D*
MOTOROLA LINEAR/INTERFACE DEVICES
7-13
Package
Ceramic DIP
AM26LS32DC
o to 70°C
Plastic DIP
SO-16
AM26LS32
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
VCC
7.0
Vdc
Input Common Mode Voltage
VICM
±25
Vdc
VIO
±25
Vdc
VI
7.0
Vdc
10
Tstg
50
mA
-65 to +150
°c
°c
Rating
Input Differential Voltage
Three-State Control Input Voltage
Output Sink Current
Storage Temperature
Operating Junction Temperature
TJ
Ceramic Package
+175
Plastic Package
+150
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage
Operating Ambient Temperature
Symbol
Value
Unit
VCC
4.75 to 5.25
Vdc
TA
o to
+ 70
°c
Input Common Mode Voltage Range
VICR
-7.0 to +7.0
Vdc
Input Differential Voltage Range
VIOR
6.0
Vdc
ELECTRICAL CHARACTERISTICS (Unless otherwise noted minimum and maximum limits apply over recommended temperature and
power supply voltage ranges. Typical values are for TA = 25°C,
Vee
=
5.0 V and VIC = O.V. See
Note I.)
Symbol
Min
Typ
Max
Unit
Input Voltage - High Logic State
(Three-State Control)
VIH
2.0
-
-
V
Input Voltage -
VIL
-
-
0.8
V
Characteristic
•
Low Logic State
(Three-State Control)
Differential Input Threshold Voltage (Note 2)
(-7.0 V '" VIC'" 7.0 V, VIH = 2.0 V)
(10 = -0.4 rnA, VOH "'.2.7 V)
(lQ = 8.0 rnA, VOL'" 0.45 V)
-
Input Bias Current
(VCC = 0 V or 5.25) (Other Inputs at -15 V'; Vin .; +15VI
Vin
Vin
=
=
-
0.2
-0.2
mA
IIB(OI
Rin
6.0 K
-
VOH
VOL
10Z
2.7
-
-
-
-
0.45
-
-
mA
~A
+15V
-15V
Vin .; +15VI
level
(-7.0V" VIC'; 7.0 V, VIH = 2.0 V,
See Note 31
(10 = -0.4 mA, V ID = 0.4 V)
(10 = 8.0 mA, VID = -0.4 V)
Output Third State Leakage Current
(VIIDI = +3.0 V, VIL = 0.8 V, Vo = 0.4 V)
(VII D) = -3.0 V, VIL = 0.8 V, Vo = 2.4 VI
Output Short Circuit Current
(VI(D) = 3.0 V, VIH = 2.0 V, Vo = 0 V,
See Note 4)
Input Resistance 1-15 V
V
VTH(O)
:s;;;.
2.3
-2.8
-
Input Balance and Output
~A
lOS
-15
-
-20
20
-85
Input Current - Low Logic State
(Three-State Control)
(V IL =0.4V)
IlL
-
-
-360
Input Current - High Logic State
(Three-State Control)
IIH
(VIH = 2.7 VI
(VIH = 5.5 VI
Input Clamp Diode Voltage
(Three-State Control)
(lIC = -18mAI
Power Supply Current
(VIL = 0 VI (All Inputs Groundedl
Ohms
V
~A
VIK
-
-
20
100
-1.5
ICC
-
-
70
-
V
mA
1. All currents into device pins are shown as positive, out of device pins are negative. All voltages referenced to ground unless otherwise noted.
2. Differential input threshold voltage and guaranteed output levels are done simultaneously for worst case.
3. Refer to EIA-422J3 for exact conditions. Input balance and guaranteed output levels are done simultaneously for worst case.
4. Only one output at a time should be shorted.
MOTOROLA LINEAR/INTERFACE DEVICES
7-14
AM26lS32
SWITCHING CHARACTERISTICS (Unless otherwise noted, VCC
= 5.0 V and TA = 25°CI
Characteristic
Symbol
Typ
Min
Max
Unit
ns
Propagation Delay Time - Differential
Inputs to Output
(Output High to Lowl
(Output Low to High)
Propagation Delay Time
Three·State
Control to Output
(Output Low to Third Statel
(Output High to Third Statel
(Output Third State to Highl
(Output Third State to Lowl
-
tpHL(DI
tpLH(D)
-
30
30
ns
-
tpLZ
tpHZ
tpZH
tpZL
-
-
-
-
35
35
30
30
SWITCHING TEST CIRCUIT AND WAVE FOR
FIGURE 1 • PROPAGATION DELAY DIFFERENTIAL INPUT TO OUTPUT
To Scope
To Scope
(Input I
(Output)
=1° ~
7
~:~~~DI~V
+2.5V
Differential
- - --
Inputs
CL
51
= 15 pF
(Includes Probe
and Stray
Capacitance)
OV
+ 2.0 V
tpHL(DI
VOH
1.3 V
1.3 V
VOL Output
OV-----------
II
Input Pulse Characteristics
tTLH = tTHL - 6.0 ns (10% to 90% I
PRR = 1.0 MHz, 50% Duty Cycle
3·State Control
FIGURE 2 - PROPAGATION DELAY THREE·STATE CONTROL INPUT TO OUTPUT
To Scope
Input Pulse Characteristics
(lnputl
tTLH = tTHL = 6.0 ns (10% to 90% I
PRR = 1.0 MHz, 50% Duty Cycle
3.State
Control
To Scope
(Outputl
Pulse
Generator
SWI
2.0 k
+5.0 V
+ 1.5 V for tpHZ and tpZH
-1.5 V for tPLZ and tpZL
Differential
Inputs
CL=15pF
(Includes
Probe and Stray
Capacitance)
I
All Diodes 1 N916 or
Equivalent
5.0 k
-=
YSW2
Input
3.0V\t;::~
3'0v~tPLZ
1.5 V
oV
- -
- r-
SWI Closed
tpLZ
Input
SW2 Closed
'" 1.3 V -----t~
Output
VOL --.Z§;.5V
Output
Output
---1--- ---ov
3.0V
Input
~
"'1.3V - - - - -
3.0V
tpZH
~'0pen
v::~--tp~~Closed
ov---
,::- ~::~;:'-
--.:-.:t~ tPHZ ~~ Closed
Input
- -
-
-
-- 0 V
tpZl
~.5V
SWI Closed
OV - -
SW20pen
=TG:
"'5.0 V - V B E - PZL
.OutpIJt
1.5 V
VOL
- - - - - - --OV
1.5V
MOTOROLA LINEAR/INTERFACE DEVICES
7-15
•
®
MCST26A
MOTOROLA
(MC6880A)
QUAD THREE-STATE
BUS TRANSCEIVER
QUAD THREE-STATE BUS TRANSCEIVER
This quad three-state bus transceiver features both excellent MOS
or MPU compatibility, due to its high impedance PNP transistor
input, and high-speed operation made possible by the use of Schottky
diode clamping. Both the -48 rnA driver and -20 rnA receiver outputs are short-circuit protected and employ three-state enabling inputs.
The device is useful as a bus extender in systems employing the
M6800 family or other comparable MPU devices. The maximum
input current of 200 IlA at any of the device input pins assures
proper operation despite the limited drive capability of the MPU
chip. The inputs are also protected with Schottky-barrier diode
clamps to suppress excessive undershoot voltages.
The MC8T26A is identical to the N E8T26A and it operates from
a single +5 V supply.
•
High Impedance Inputs
MONOLITHIC SCHOTTKY
INTEGRATED CIRCUITS
-
LSUFAX
CERAMIC PACKAGE
CASE 620-10
• Single Power Supply
• High Speed Schottky Technology
1
PSUFFIX
• Three-State Drivers and Receivers
• Compatible with M6800 Family Microprocessor
PLASTIC PACKAGE
CASE 648-06
PIN CONNECTIONS - MC8T26A
MICROPROCESSOR BUS EXTENDER APPLICATION
(MC6880AI
(Clock)
GNO+5V 111
tJ>2
Receiver
Enable 1
Vee
Input
Receiver
,
Output
Driver
Enable
Input
2
14 Receiver
Output
4
Driver
Bus4
Driver
Input
Receiver
Output
2
AND
5
4
Receiver
CONTROL
Output
3
BUS
Driver
Input
Bus 3
7
2
Gnd
ORDERING INFORMAll0N
Alternate
MCBT26AL
MC6880AL
Ceramic DIP
MCBT26AP
MC6880AP
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
7-16
Temperature
Range
Device
Package
MC8T26A
MAXIMUM RATINGS ITA
= 2s"C unless otherwise noted)
Symbol
Value
Unit
VCC
8.0
Vdc
Input Voltage
VI
5.5
Vdc
Junction Temperature
Ceramic Package
Plastic Package
TJ
Rating
Power Supply Voltage
°c
175
150
Operating Ambient Temperature Range
TA
T stg
Storage Temperature Range
°c
uc
Oto +75
-65 to+150
ELECTRICAL CHARACTERISTICS 14.75 V .. VCC" 5.25 V and OOC .. TA .. 75°C unless otherwise noted'!
Characteristic
Symbol
Min
Typ
Max
Unit
Ill!RE)
IILlDE)
IllID)
IlllBI
-
-
-200
-200
-200
~A
-
-
-
-25
~A
-
-
25
25
25
~A
Input Current - low Logic State
I Receiver Enable Input, VllIRE) = 0.4 V)
IDriver Enable Input, VllIDE) = 0.4 V)
IDriver Input, VllID) = 0.4 V)
(Bus (Receiverllnput, V'L(BI == 0.4 VI
Input Disabled Current - Low Logic State
IDriver Input, Vll(D) = 0.4 V)
-200
IILlD) DIS
Input Current-High Logic State
I Receiver Enable Input, VIHIRE) = 5.25 VI
IDriver Enable Input, VI HIDE).= 5.25 V)
(Driver Input, VI HID) = 5.25 V)
IReceiver Input, VIHIB) = 5.25 V)
Input Voltage - low Logic State
(Receiver Enable Input)
(Driver Enable Input
(Driver Input)
(Receiver Input)
IIHlREI
II HIDE!
IIHID)
IIHIB)
-
VILIREI
VllIDE)
VILlD)
VllIB)
-
-
VIHlRE)
VIHIDE)
VIH(D)
VIHIB)
2.0
2.0
2.0
2.0
-
-
VOlIB)
VOlIR)
-
-
0.5
0.5
V
VDHIB)
VOHIR)
2.4
2.4
3.5
3.1
3.1
-
V
-
-
-
-
100
100
~A
-
-100
-100
itA
-
-
-1.0
-1.0
-1.0
V
-
100
0.85
0.85
0.85
0.85
V
-
V
Input Voltage - High Logic State
(Receiver Enable Input)
(Driver Enable Input)
(Driver Input)
(Receiver Input)
Output Voltage - Low logic State
IBus Driverl Output, 10l1B) = 48 rnA)
(Receiver Output, 'OL(R) = 20 mAl
Output Voltage - High Logic State
IBus IDriver) Output, 10HIB) = -10 mAl
IReceiver Output, 10HIR) = -2.0 rnA)
IReceiver Output, 10HIR) = -100 itA, VCC
= 5.0 V)
Output Disabled Leakage Current - High Logic State
18us Driverl Output, VOHIB) = 2.4 V)
IReceiver Output, VDHIR) = 2.4 V)
10HlIB)
10Hl1R)
-
Output Disabled Leakage Current - Low Logic State
IBus Output, VOlIB) = 0.5 vi
IReceiver Output, VOlIR) = 0.5 V)
10ll1B)
10ll(R)
-
Input Clamp Voltage
IDriver Enable Input IIOIDE) = -12 rnA)
(Receiver Enable Input IIC(RE)
= +12 rnA)
IDriver Input IICID) = -12 rnA)
Output Short Circuit Current, VCC
IBus (Driver) Output)
IReceiver Output)
~
= 5.25
-
-
IOS(8)
10SIR)
-50
-30
-
-150
-75
rnA
-
ICC
-
-
87
rnA
5.25 V, Note 1
Power Supply Current
IVCC
VICIDE)
VICIREl
VICID)
V)
Note 1. Only one output may be short-Circuited at a time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-17
•
MC8T26A
SWITCHING CHARACTERISTICS (Unless otherwise noted, specifications apply at TA
= 25°C and VCC = 5.0 V)
Symbol
Figure
Min
Max
Unit
Propagation Delay Time from Receiver (Busllnput to
High Logic State Receiver Output
tPLH(R)
1
-
14
ns
Propagation Delay Time from Receiver (Bus) Input to
Low Logic State Receiver Output
tPHL(R)
1
-
14
ns
Propagation Delay Time from Driver I "put to
High Logic State Driver (Bus) Output
tPLH(D)
2
-
14
ns
Propagation Delay Time from Driver I nput to
Low Logic State Driver (Busl Output
tPHL(D)
2
-
14
ns
Propagation Delay Time from Receiver Enable Input to
High Impedance (Open) Logic State Receiver Output
tpLZ(RE)
3
-
15
ns
Propagation Delay Time from Receiver Enable Input to
Low Logic Level Receiver Output
tpZL(RE)
3
-
20
ns
Propagation Delay Time from Driver Enable Input to
High Impedance Logic State Driver (Bus) Output
tPLZ(DE)
4
-
20
ns
Propagation Delay Time from Driver Enable Input to
Low Logic State Driver (Bus) Output
tPZL(DE)
4
-
25
ns
Characteristic
FIGURE 1 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY FROM
BUS (RECEIVER) INPUT TO RECEIVER OUTPUT, tpLH(R) AND tpHL(R)
•
tTLH <; 5.0 ns
tTH L <; 5.0 ns
Input
ov--,.;;.;;;.;r
Input Pulse Frequency"" 10 MHz
Duty eye Ie "" 50%
tpHL(RI
VOH-----.
Output
VOL------'---------J
To Scope
(Input)
~r
~
2.6 V
To Scope
(Input)
Input
92
Receiver
OutpUt
lN916
or EQuiv.
Driver
Input
Pulse
Generator
51
1.3 k
30pF
Driver
Enable
Input
MOTOROLA LINEAR/INTERFACE DEVICES
7-18
MC8T26A
FIGURE 2 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
DRIVER INPUT TO BUS (DRIVER I OUTPUT, 'PLH(DI AND 'PHL(DI
tTHL '" 5.0
os
2.6V----Input
ov --"";':;';':"':''1
Input Pulse Frequency"" 10 MHz
Duty Cycle == 50%
'PHLIOI
VOH-----...,
Output
VOL _ _ _ _ _ _ ' - _ _ _ _ _ _..J
2.6 V
To Scope
2.6 V
To Scope
Driver
Enable
Input
(Input)
(Output)
30
Driver
Driver
(Bus)
Input
Output
1N916
or Equiv.
Receiver
Output
51
300 pF
260
~
Enabi8
Input
II
FIGURE 3 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
RECEIVER ENABLE INPUT TO RECEIVER OUTPUT, 'PLZ(REI AND 'PZL(REI
tTLH '" 5.0
tTHL.o;; 5.0 ns
ns
2.6 V ----+-J:,-------=~
Input
OV
tPLZIREI
~3.5 V
r-
----+-:;;...------_.
1.5 V
Output
'PZLlREI
Input Pulse Frequency == 5.0 MHz
Duty Cycle == 50%
V O L - - - -.....
To Scope
(Input)
2.6 V
To Scope
(Output)
~'Enable
Input
5.0 V
2.4 k
Receiver
Output
Pulse
240
51
Generator
5.0 k
MOTOROLA LINEAR/INTERFACE DEVICES
7-19
30 pF
1N91S
or Equiv.
MC8T26A
FIGURE 4 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIMES FROM
DRIVER ENABLE INPUT TO DRIVER (BUSJ OUTPUT, tPLZ(DEJ AND tpZL(DEJ
tTLH"; 5.0 ns
2.6 V
tTHL' 5.0 ns
----+.-J"=,,....------,i.
Input
Input Pulse Frequency"" 5.0 MHz
Duty CYcle"" 50%
OV---...:t"1
tpZL(DEJ
~3.5V----....
Output
VOL------~-------~
+2.6 V
To Scope
Driver Enable
Input
5.0 V
(Output)
2.4 k
Driver
Input
•
Driver (Bus)
Pulse
51
Generator
Output
Receiver
Output
5.0 k
AeCii'iVe"r
300 pF
1N916
or Equiv.
~
Input
FIGURE 5 - BIDIRECTIONAL BUS APPLICATIONS
Receiver
Outputs
Receiver
Outputs
Driver
Inputs
Driver
Inputs
To Other
Drivers/Aeceivers
Driver
Enable
MOTOROLA LINEAR/INTERFACE DEVICES
7-20
Receiver
Enable
®
MCST2S
MOTOROLA
(MC6889)
NONINVERTING
QUAD THREE-STATE BUS TRANSCEIVER
This quad three-state bus transceiver features both excellent
MOS or MPU compatibility, due to its high impedance PNP transistor input, and high-speed operation made possible by the use
of Schottky diode clamping. Both the - 48 mA driver and - 20
mA receiver outputs are short circuit protected and employ threestate enabling inputs.
The device is useful as a bus extender in systems employing
the M6800 family or other comparable MPU devices. The maximum input current of 200 pA at any of the device input pins
assures proper operation despite the limited drive capability of
the MPU chip. The inputs are also protected with Schottky-barrier
diode clamps to suppress excessive undershoot voltages.
Propagation delay times for the driver portion are 17 ns maximum while the receiver portion runs 17 ns. The MC8T28 is identical to the NE8T28 and it operates from a single + 5 V supply.
• High Impedance Inputs
•
Single Power Supply
•
High Speed Schottky Technology
•
•
•
Three·State Drivers and Receivers
Compatible with M6800 Family Microprocessor
Non·lnverting
NONINVERTING
BUS TRANSCEIVER
MONOLITHIC SCHOTTKY
INTEGRATED CIRCUITS
LSUFAX
CERAMIC PACKAGE
CASE 620-10
,. II
,
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
MICROPROCESSOR BUS EXTENDER APPLICATION
PIN CONNECTIONS -
(Clock)
GND+5V 1>1
MC8T28
(MC6889)
1>2
Receiver
Enable
Input
Receiver
Output
,
Vee
Driver
Enable
Input
2
14 Receiver
Output
4
Bus4
Driver
Input
4
Receiver
Output
3
Driver
Input
Bus 3
7
2
Gnd
ORDERING INFORMATION
Temperature
Device
Alternate
Range
Package
McaT28L
MC6889L
o to +75°C
Ceramic DIP
MC8T28P MC6889P
o to +75"<:
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
7-21
MC8T28
MAXIMUM RATINGS (TA
= 25"C unless otherwise
noted I
Symbol
Value
Unit
VCC
8.0
Vdc
Input Voltage
VI
5.5
Vdc
Junction Temperature
TJ
Rating
Power Supply Voltage
Ceramic Package
Plastic Package
°c
175
150
Operating Ambient Temperature Range
TA
T stg
Storage Tempera:tu.,e Range
o to +75
°c
-65 to+150
~C
ELECTRICAL CHARACTERISTICS (4.75 V .. VCC" 5.25 V andOoC .. T A" 75 0 C unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
IILlRE)
IllIDE)
IILlDI
IILlBI
-
-
~A
-
-200
-200
-200
-
-
-25
~A
-
25
25
25
~A
Input Current - Low Logic State
(Receiver Enable Input, VllIRE)" 0.4 V)
IDriver Enable Input, VI lIDE) " 0.4 V)
(Oriver Input. VILIOI = 0.4 V)
IBus IReceiveri Input, VI liB') " 0.4 VI
Input Disabled Current - Low Logic State
(Driver Input, Vll(D) = 0.4 VI
Input Current-High Logic State
(Receiver Enable Input, V'H(RE)
•
=
Ill(D) DIS
5.25 VI
IIHIRE)
IIHIDE)
IIHID)
I Driv.er Enable Input, VI HIDE)," 5.25 V)
IDriver Input, VI HID) = 5.25 V)
I "put Voltage - Low Logic State
(Receiver Enable Input)
(Driver Enable Input
(Driver Input)
.'
VILlRE)
VI LlDE)
VILlD)
VILlB)
(Receiver Input)
Input Voltage - High Logic State
(Receiver Enable Input)
(Driver Enable Input)
(Driver Input)
(Receiver Input)
-
-
-200
-
-
-
-
-
-
-
0.85
0.85
0.85
0.85
V
V
VIHIRE)
VIHIDE)
VIHIDI
VIHIB)
2.0
2.0
2.0
2.0
-
-
-
VOl(8)
VOllRI
-
-
0.5
0.5
V
VOHIB)
VOHIR)
2.4
2.4
3.5
3.1
3.1
V
-
-
-
Output Voltage - Low Logic State
(Bus Driver) Output, IOLlB) = 48 rnA)
(Receiver Output, IDlIR) = 20 rnA)
Output Voltage - High Logic State
(Bus (Driver) Output, IOH(B) = -10 mAl
IReceiver Output, IOH(RI = -2.0 mAl
(Receiver Output, IDH(R) = -100/IlA, VCC
= 5.0 V)
O'utput Disabled Leakage Current - High Logic State
(Bus Driverl Output, VOH(B) = 2.4 V)
IReceiver Output, VOH(R) = 2.4 V)
IDHlIB)
IDHLIR)
-
-
100
100
~A
Output Disabled Leakage Current - Low Logic State
(Bus Output, VDl(BI = 0.5 V)
(Receiver Output, VOl(R) = 0.5 V)
IDll(B)
IDllIR)
-
-
-100
-100
~A
Input Clamp Voltage
(Driver Enable Input IID(DEI = -12 rnA)
(Receivar Enable Input IIC(REI = +12 mAl
IDriver Input IIC(D) = -12 mAl
VICIDE)
VICIREI
VIC(D)
-
-
-1.0
-1.0
-1.0
V
IDSIB)
IDS(R)
-50
-30
-150
-75
rnA
ICC
-
-
110
rnA
Output Short Circuit Current, VCC - 5.25 V, Note 1
IBus (Driver) Output)
(Receiver Output)
Power Suppty Current
(VCC = 5.25 V)
-
Note 1. Only one output may be short-Circuited at a time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-22
-
-
MC8T28
SWITCHING CHARACTERISTICS (Unless otherwise noted Vcc
= 5.0 V and TA = 250 C)
Characteristic
Propagation Delay Time-Receiver (CL
= 30 pF)
Symbol
Min
Max
Unit
tPLH(R)
-
17
17
ns
-
17
17
ns
tpZL(R)
-
23
ns
tpLZ(R)
-
18
tpZL(D)
tpLZ(D)
-
23
tpHL(R)
Propagation Delay Time-Driver (el ::: 300 pF)
tPLH(D)
tpHUD)
Propagation Delav Time-Enable (CL
- Receiver
=30 pF)
- Driver Enable (CL 300 pF)
28
FIGURE 1 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY FROM
BUS (RECEIVER) INPUT TO RECEIVER OUTPUT, tPLH(R) AND tpHL(R)
II
tTHL.s;:;; 5.0 ns
2.6 V
Input
Input Pulse Frequency = 10 MHz
Duty Cycle
VOH-----
Output
VOL - - - - - ' - - - - - - - - - '
To Scope
Receiver
To Scope
(Input)
E;;";bi";
(Input)
2.6 V
T
Input
92
Receiver
Output
1N916
or Equiv.
Driver
Input
Pulse
Generator
51
1.3 k
Driver
30 pF
Enable
Input
MOTOROLA LINEAR/INTERFACE DEVICES
7-23
= 50%
MC8T28
FIGURE 2 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
DRIVER INPUT TO BUS (DRIVERI OUTPUT, tpLH(DI AND tpHL(DI
tTHL ~ 5.0 ns
tTLH ~ 5.0 ns
2.6 V----=="\I
Input
OV-----
Input Pulse Frequency"" 10 MHz
tPt-lUOJ
Duty Cycle;; 50%
VOH------
Output
VOL _ _ _ _ _ _ ' - _ _ _ _ _ _...J
2.6 V
To Scope
2.6 V
To Scope
Driver
(Input)
(Output)
Enable
Input
Driver
30
Driver
(Bus)
lN916
Input
Output
or Equiv.
Receiver
Output
51
300pF
260
Receiver
"E'ii'8bi"e
•
Input
FIGURE 3 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
RECEIVER ENABLE INPUT TO RECEIVER OUTPUT, tpLZ(RE) AND tpZL(RE)
tTHL ~ 5.0 ns
tTL.H .,;;;; 5.0 ns
2.6 V
---+J<:-:=,.----=::-:i-
Input
o
V _--':"=->11
tPLZ(AE)
~3.5 V
r
-----+----:,..-------_.
tpZL("'R"E)
Input Pulse Frequency = 5.0 MHz
Duty Cycle"" 50%
1.5 V
Output
VOL----~
To Scope
(Input)
OV
A scei ver
To Scope
'E'ilibTe
5.0 V
(Output)
Input
2.4 k
Receiver
240
Output
Puillt
51
Generator
lN916
5.0 k
MOTOROLA LINEAR/INTERFACE DEVICES
7-24
30 pF
or Equiv.
MC8T28
FIGURE 4 - TEST CIRCUIT AND WAVEFDRMS FDR PRDPAGATIDN DELAY TIMES FROM
DRIVER ENABLE INPUT TO DRIVER (BUS) OUTPUT, tPLZ(DE) AND tpZL(DE)
tTHL~5.0ns
2.6 V ---rTn=-----~
Input
Input Pulse Frequency"" 5.0 MHz
Dutv Cycle = 50%
011--_,,;("1
'PZUDE)
~3.5V----~
Output
VOL------~-------~
OV
To Scope
Driver Enable
Input
5.0 V
(Output)
70
2.4 k
Driver
Input
Driver (Bus)
Pulse
51
Generator
Output
Receiver
Output
5.0 k
Receiver
Ena'iJie
T
300 pF
lN916
or Equiv.
Input
FIGURE 5 - BIDIRECTIONAL BUS APPLICATIONS
Receiver
Outputs
A eeeiver
Outputs
r-
u
I-
~
1.0
Max~
~
5.0
4.0
7.0
6.0
r-~
0.5
8.0
7.0
MAXIMUM COLLECTOR CURRENT
versus DUTY CYCLE
(AND NUMBER OF DRIVERS IN USE)
I
!z
~
:::>
500
'"
~
300
......
-- -- ----......
:----...
t---.. ...............
..........
u
............
-..........
-...........:
...........
.y
r--
r-..
r---...
-......
...............
r---.:: t::::
200
100
10
......
r-..
r--
t"'--
r-t"'-r-t-- ........ t"'-- . . . . r-r--- . . . . r--
~ r-.............. r---. 1'-t"'--
~
8
8.0
9.0
VI. INPUT VOLTAGE (VOLTS)
FIGURE 7 -
700
20
30
50
70
100
% DUTY CYCLE
MOTOROLA LINEAR/INTERFACE DEVICES
7-32
r-
b--::: r--
1
6.0
5.0
~
~ f-Tyj;ical
I-- r-
VI. INPUT VOLTAGE (VOLTS)
1000
26
2.0
-
3.0
24
«
"
1.0
22
s
/. V
o
20
FIGURE 6- INPUT CHARACTERISTICS - MC1416.B
/ V
V/
0.5
18
2.5
/
V /
t6
VI. INPUT VOLTAGE (VOLTS)
2.5
/
I
14
VCE(sat). SATURATION VOLTAGE (VOLTS)
2.0
~ical
/V
IP'
0.8
0.6
.....- ~
....-i'"
A~
.y200
V
./
Maximum
Iff
8
•
MC1412.B
PIN1, 3 -
700
o
=2S 0 C (continued)
10
11
12
MC1411,8, MC1412,8, MC1413,8, MC1416,8
REPRESENTATIVE CIRCUIT SCHEMATICS
1n
1n MC1411,B
""----1M----1t-
Pin 9
Pin 9
1
I
I
L __
* ______ _
•
MOTOROLA LINEAR/INTERFACE DEVICES
7-33
®
MC1472
MOTOROLA
DUAL PERIPHERAL
POSITIVE "NAND" DRIVER
DUAL PERIPHERAL-HIGH-VOL TAGE
POSITIVE "NAND" DRIVER
SILICON MONOLITHIC
INTEGRATED CIRCUITS
The dual driver consists of a pair of PNP buffered AND gates
connected to the bases of a pair of high voltage NPN transistors.
They are similar to the MC75452 drivers but with the added advantages of: 1) 70 Volt capability 2) output suppression diodes and
3) PNP buffered inputs for MOS compatibility. These features
make the MC1472 ideal for mating MOS logic or microprocessors
to lamps, relays, printer hammers and incandescent displays.
• 300 mA Output Capability (each transistor)
•
•
70 Vdc Breakdown Voltage
•
Internal Output Clamp Diodes
•
Low Input Loading for MOS Compatibility (PNP buffered)
MAXIMUM RATINGS (TA
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
P1SUFFlX
PLASTIC PACKAGE
CASE 626-05
= 25°C)
Rating
Value
Unit
Supply Voltage
7.0
Volts
Input Voltage
5.5
Volts
Output Voltage
80
Volts
Clamp Voltage
80
Volts
Output Current (Continuous)
300
mA
Operating Junction Temperature
Ceramic Package
Plastic Package
°c
+175
+150
Storage Temperature Range
-65to+150
°C
Positive Logic: Y=AB·
RECOMMENDED OPERATING CONDITIONS
Rating
Symbol
Min
Max
Unit
VCC
4.5
5.5
Volts
Supply Voltage
TRUTH TABLE
A
B
Y
Operating Ambient Temperature
TA
0
70
°c
Output Voltage
Vo
VCC
70
Volts
L
L
H ("OFF" STATE)
Clamp Voltage
Vc
Vo
70
Volts
L
H
H ("OFF'· STATE)
H
L
H ("0 F F" STATE)
H
H
L ("ON" STATE)
ORDERING INFORMATION
Device
MC1472U
MC1472P1
Temperature
Range
o to
o to
Package
+700C
Ceramic DIP
+70°C
Plastic DIP
MOTOROLA LINEAR/INTERFACE DEVICES
7-34
H"" L.oglc One
L = Logic Zero
MC1472
ELECTRICAL CHARACTERISTICS (Unless otherwise noted minimax limits apply across the O'C to 70'C temperature range
with 4.5 V "" VCC "" 5.5 V. All typical values are for TA = 25'C, VCC = 5.0 Volts.)
Symbol
Min
Input Voltage -
High Logic State
Characteristic
VIH
2.0
Input Voltage -
low logic State
Vll
0
Input Current - low logic State
(VIL = 0.4 V)
A Input
B Input
IlL
Input Current - High Logic State
(VIH = 2.4 V)
A Input
B Input
(VIH = 5.5 V)
A Input
B Input
IIH
Input Clamp Voltage
(ICC = -12 rnA)
VIK
Output Leakage Current - High logic State
(VO = 70 V, See Test Figure)
IOH
Output Voltage - low Logic State
(lOL = 100 rnA)
(lOL = 300 rnA)
VOL
Output Clamp Diode Leakage Current
(VC = 70 V, See Test Figure)
IOC
Output Clamp Forward Voltage
(lFC = 300 rnA. See Test Figure)
VFC
Power Supply Current
(All Inputs at VIH)
(All Inputs at VILl
ICC
Typ
-
Max
Unit
5.5
Vdc
0.8
Vdc
rnA
-
-
-0.3
-0.15
p.A
-
-
-
40
-
20
-
-
-
200
100
-
-
-1.5
-
100
-
-
0.4
0.7
-
-
100
-
-
1.7
-
-
70
15
-
V
p.A
V
V
V
rnA
-
NOTE: All currents into device pins are shown as positive, out of device pins·as negative. All voltages referenced to ground unless otherwise
noted.
SWITCHING CHARACTERISTICS Vee
=5.0V, TA = 25°C
Symbol
Min
Typ
Max
Unit
tpHL
tpLH
-
-
-
1.0
0.75
j3
Output Low to High
Output Transition Time
Output High to Low
Output Low to High
tTHL
ITLH
-
-
0.1
0.1
j3
Characteristic
Propagation Delay Time
Output High to Low
MOTOROLA LINEAR/INTERFACE DEVICES
7-35
•
f\4C1472
TEST CIRCUITS
B
VIHIIIVIL
Per
T~uth
8
Vee
(
Teble
2
3
VOH
4
-=
IVOL
I
8
8
VIH (
-=
2
7
3
6
4
5
Vee
-=
-:
8
Vee
2
-=
":"
-=
-:
SWITCHING TEST CIRCUIT AND WAVEFORM
+60 V
ToScopa
(Output)
To
100
....-0--+-.....""'.-... + 30 V
I
Pul ..
Ganerator
30pF
Include. Probe
8ndStray
3.DV 1.§V../
INPUT ~
OV
\
_
.SV
____
~HL
VOH
OUTPUT
JI--
90%
50%
~10%~
'THL
_________
~
MOTOROLA LINEAR/INTERFACE DEVICES
7-36
®
MC1488
MOTOROLA
QUAD MDTL LINE DRIVER
EIA-232C
QUAD LINE DRIVER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC1488 is a monolithic quad line driver designed to interface data terminal equipment with data communications equipment in conformance with the specifications of EIA Standard No.
EIA-232C.
Features:
•
Current Limited Output
±1O mA typ
•
Power·Off Source Impedance
300 Ohms min
L SUFFIX
. CERAMIC PACKAGE
CASE 632-08
•
Simple Slew Rate Control with External Capacitor
•
Flexible Operating Supply Range
•
Compatible with All Motorola MDTL and MTTL Logic Families
PSUFFIX
PLASTIC PACKAGE
CASE 646-06
o SUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
~
14.,"
1
PIN CONNECTIONS
TYPICAL APPLICATION
LINE DRIVER
MCl48B
INTERCONNECTING
LINE RECEIVER
CABLE
MC1489
J" - - , ' "
-Lj __ /
Mon LOGIC INPur
I INTERCONNECTING I
~~
CABLE
~MOTl
LOGIC OUTPUT
CIRCUIT SCHEMATIC
11/4 OF CIRCUIT SHOWNI
Vee 14
~
B.2k
PINS 4.9,120R2
INPUT
INPUT
PINS 5,10.13
70
300
OUTPUT
PIN S 6,B,l1 OR 3
~",=3'6k
NO
7~
10k
VEE I
~
r
7k
7D
MOTOROLA LINEAR/INTERFACE DEVICES
7-37
..
MC1488
MAXIMUM RATINGS (TA = + 25'C unless otherwise noted.)
Symbol
Value
Unit
Power Supply Voltage
VCC
VEE
+15
-15
Vdc
Input Voltage Range
VIR
-15'" VIR '"
7.0
Vdc
Output Signal Voltage
Vo
±15
Vdc
Po
1/R(lJA
1000
6.7
mW
mWI'C
Rating
Power Derating IPackage Limitation, Ceramic
and Plastic Dual-In-Line Package)
Derate above TA = + 25'C
Operating Ambient Temperature Range
TA
Storage Temperature Range
Tsta
o to
'c
+75
-65 to + 175
'c
ELECTRICAL CHARACTERISTICS IVCC = +90 +
- 1% Vdc VEE = -90 -+1% Vdc, TA = 0 to 75'C unless otherwise noted)
Characteristic
Input Current Input Current -
•
= 0)
High Logic State IVIH = 5.0 V)
Low Logic State IVIL
Output Voltage - High Logic State
IVIL = 0.8 Vdc, RL = 3.0 kll, VCC
IVIL = 0.8 Vdc, RL = 3.0 kll, VCC
=
=
+9.0 Vdc, VEE = -9.0 Vdc)
+ 13.2 Vdc, VEE = -13.2 Vdc)
Output Voltage - Low Logic State
IVIH = 1.9 Vdc, RL = 3.0 kll, VCC
IVIH = 1.9 Vdc, RL = 3.0 kll, VCC
=
=
+ 9.0 Vdc, VEE = - 9.0 Vdc)
+ 13.2 Vdc, VEE = -13.2 Vdc)
Figure
Symbol
Min
Typ
Max
Unit
1
IlL
1.0
1.6
rnA
1
IIH
-
-
10
2
VOH
2
+6.0
+9.0
+7.0
+10.5
-
-6.0
-9.0
-7.0
-10.5
-
-
Vdc
VOL
Positive Output Short-Circuit Current, Note 1
3
10S+
+6.0
+10
+12
Negative Output Short-Circuit Current, Note 1
3
10S-
-6.0
-10
-12
= VEE = 0, IVai =
Positive Supply Current IRI = 00)
IVIH = 1.9 Vdc, VCC = +9.0 Vdc)
(VIL = 0.8 Vdc, VCC = + 9.0 Vdc)
IVIH = 1.9 Vdc, VCC = +12 Vdc)
(VIL = 0.8 Vdc, VCC = + 12 Vdc)
IVIH = 1.9 Vdc, VCC = + 15 Vdc)
IVIL = 0.8 Vdc, VCC = + 15 Vdc)
Negative Supply Current IRL = 00)
IVIH = 1.9 Vdc, VEE = -9.0 Vdc)
IVIL = 0.8 Vdc, VEE = - 9.0 Vdc)
IVIH = 1.9 Vdc, VEE = - 12 Vdc)
IVIL = 0.8 Vdc, VEE = -12 Vdc)
IVIH = 1.9 Vdc, VEE = -15 Vdc)
IVIL = 0.8 Vdc, VEE = -15 Vdc)
4
ro
300
5
ICC
Output Resistance IVCC
Power Consumption
IVcc = 9.0 Vdc, VEE
IVCC = 12 Vdc, VEE
± 2.0 V)
-
= - 9.0 Vdc)
= -12 Vdc)
rnA
Ohms
+15
+4.5
+19
+5.5
+20
+6.0
+25
+7.0
+34
+12
-
-
-
-13
-18
-
-
-
-
-500
-23
-500
-34
-2.5
-
-
333
576
275
350
ns
45
75
ns
110
175
ns
55
100
ns
-
Pc
-
-
-
lEE
-
rnA
rnA
-
5
pA
Vdc
-
-
-17
rnA
,..A
rnA
pA
rnA
rnA
mW
SWITCHING CHARACTERISTICS IVcc = +90 +
- 1% Vdc VEE = -90 +
- 1% Vdc, TA = +25'C.)
Propagation Delay Time
III
Fall Time
III
Propagation Delay Time
III
Rise Time
III
= 3.0 k and
= 3.0 k and
= 3.0 k and
= 3.0 k and
15 pF)
6
tpLH
15 pF)
6
tTHL
15 pF)
6
tpHL
15 pF)
6
tTLH
Note 1. Maximum Package Power Dissipation may be exceeded if all outputs are shorted simultaneously.
MOTOROLA LINEAR/INTERFACE DEVICES
7-38
-
MC1488
CHARACTERISTIC DEFINITIONS
FIGURE 2 - OUTPUT VOLTAGE
FIGURE 1 - INPUT CURRENT
+9 V
+9 V
-9 V
FIGURE 3 - OUTPUT SHORT-CIRCUIT CURRENT
Vee
-9 V
FIGURE 4 - OUTPUT RESISTANCE (POWER-OFF)
VEE
+1.9 V
105+
I
Va
±2 Vdc
•
±6.6 rnA Max
105-
+0.8 V
FIGURE 6 - SWITCHING RESPONSE
FIGURE 5 - POWER-SUPPLY CURRENTS
Vee
'in
-D-----I_. .3-k--1....---.va
1
15PF
VIL
-------0 V
Va-----.
+0.8 V
'T H L - - ' -_ _ _-'"--ITLH
tTHL and tTLH Measured 10% to 90%
MOTOROLA LINEAR/INTERFACE DEVICES
7-39
..
MC1488
TYPICAL CHARACTERISTICS
=+250 C unless otherwise noted.)
(T A
FIGURE 7 -
FIGURE 8 -
TRANSFER CHARACTERISTICS
versus POWER-SUPPLY VOLTAGE
<"
~
i:5
.1}
VCC!VEE-I'12V
'90
c;
V~C VE~-.9~
~cc =JEE =,6 V
tlO
"
ii:
J0
;'5
+12
10S+
+6.0
a +3.0
~
~~o
r-3k
lH-_1
I
0.2
•
VI
-3.0
0.8 V
<:;
-=
'10
:~
~
::>
....o
~
~ -6.0
I
o
I
0.6
0.8
1.0
1.2
1.4
Vin.INPUT VOLTAGE IVOLTS)
0.4
1.6
1.8
FIGURE 10 - OUTPUT VOLTAGE
AND CURRENT-LIMITING CHARACTERISTICS
'10
+16
;;,
'12
~ I--
'\
.§ +8.0
>~ +4.0
a:
~ 100
o
~
w
a>~
E~O
II IIIII
10
-8.0
1.9 V
-12
VI
•
-16
II 11111
100
1.000
"-
~-
--
"
lOS
0.8 VI VCC
-20
-16
10.000
~
-4.0
>-
5
9
~CL
1.0
1.0
-12
=VEE ='9 V
-8.0
-4.0
FIGURE 11 -
MAXIMUM OPERATING TEMPERATURE
versus POWER-SUPPLY VOLTAGE
~
w
16
.........
14
..
12
0
10 ~-
to
:;
>
~ 8.0
-
f--
a: 6.0
f.-
~
~ 4.0
tB
14
3
r--....
3k
"",
6 3k
8 3k
11 3 k
f-7
> 2.0
tl
>
.............
I
VCC
&:
ill
I-55
~
"
-=
1
I VEE I
1+25
+75
T. TEMPERATURE 10C)
+115
MOTOROLA LINEAR/INTERFACE DEVICES
7-40
3k!l/AOLl:
- -~
" "\
,~
~fvo
+4.0
Vo. OUTPUT VOLTAGE IVO LTS)
CL. CAPACITANCE IpF)
~0
+125
+25
+75
T. TEMPERATURE 1°C)
-55
1.0
~
10
-
10S-
-12
1000
~
~
VEE = 9 V
'"~ -9.0
FIGURE 9 - OUTPUT SLEW RATE
versus LOAD CAPACITANCE
•
-
+9.0
::>
o~·
,.o
~
SHORT-CIRCUIT OUTPUT CURRENT
versus TEMPERATURE
+8.0
+12
+16
MC1488
APPLICATIONS INFORMATION
FIGURE 13 - POWER·SUPPLY PROTECTION
TO MEET POWER·OFF FAULT CONDITIONS
The Electronic Industries Association EIA-232C specification
-~I--......- - - - - - - - - VCC
14
detail the requirements for the interface between data processing equipment and data communications equipment. This
standard specifies not only the number and type of interface
leads, but also the voltage levels to be used. The MCI488 quad
driver and its companion circuit, the MC1489 quad receiver,
provide a complete interface system between DTL or TTL logic
levels and the EIA-232C defined levels. The EIA-232C require-
: r--"~, :
0-
i-l __ ~/o__r-<)
o-~ .,- --,
I'
The required driver voltages are defined as between 5 and
15-volts in magnitude and are positive for a Logic "0" and
negative for a Logic "1." These voltages are so defined when
the drivers are terminated with a 3000 to 7000-ohm resistor.
The MC1488 meets this voltage requirement by converting a
DTUTTL logic level into EIA-232C levels with one stage of
0-,4. __ .... '
inversion.
0-'1-
I
I
1
:
.O-J--o
I
I
--------=-.. . -----------.I - ---
would be excessive. Therefore, if the system is designed to
permit low impedances to ground at the power-supplies of the
drivers, a diode should be placed in each power-supply lead
to prevent overheating in this fault condition. These two
diodes, as shown in Figure 13, could be used to decouple all
the driver packages in a system. (These same diodes will allow
the MC1488 to withstand momentary shorts to the ± 25 volt
limits specified in the earlier Standard EIA-232B.) The addition
of the diodes also permits the MC1488 to withstand faults with
power-supplies of less than the 9.0 volts stated above.
The maximum short-circuit current allowable under fault
conditions is more than guaranteed by the previously mentioned 10 rnA output current limiting.
100
I- lV'",
~
w
~
~
10
f~,"
nllll
1000
I
-1. ___ '
_14--.....
0
100
I
0--'-0
1
';--r- -'
7~ c}1
1000
10
~
o-~-,r--......
VEE
1.0
1.0
I
I
---"\
0-,-1. ___ -'
FIGURE 12 - SLEW RATE versus CAPACITANCE
FOR ISC = 10 rnA
C;
:
0-+-<>
I
o-i- J
The EIA·232C specification further requires that during transitions, the driver output slew rate must not exceed 30 volts
~
914
rMC1~;-~
.-_...J..._-,
ments as applied to drivers are discussed herein.
~
-----...-----
10,000
C, CAPACITANCE (,,)
per microsecond. The inherent slew rate ofthe MC1488 is much
too fast for this requirement. The current limited output of the
device can be used to control this slew rate by connecting a
capacitor to each driver output. The required capacitor can be
easily determined by using the relationship C = lOS x !!.TltN
from which Figure 12 is derived. Accordingly, a 330 pF capac·
itor on each output will guarantee a worst case slew rate of
30 volts per microsecond.
The interface driver is also required to withstand an accidental short to any other conductor in an interconnecting cable.
The worst possible signal on any conductor would be another
driver using a plus or minus 15 volt, 500 rnA source. The
MC1488 is designed to indefinitely withstand such a short to
all four outputs in a package as long as the power-supply voltages are greater than 9.0 volts (i.e., VCC '" 9.0V; VEE'" -9.0 V).
In some power-supply designs, a loss of system power causes
a low impedance on the power·supply outputs. When this
occurs, a low impedance to ground would exist at the power
inputs to the MC1488 effectively shorting the 300 ohm output
resistors to ground. If all four outputs were then shorted to
Other Applications
The MCI488 is an extremely versatile line driver with a myriad of possible applications. Several features of the drivers
enhance this versatility:
1. Output Current Limiting -this enables the circuit designer
to define the output voltage levels independent of powersupplies and can be accomplished by diode clamping of the
output pins. Figure 14 shows the MC1488 used as a DTL to
MOS translator where the high level voltage output is clamped
one diode above ground. The resistor divider shown is used
to reduce the output voltage below the 300 mV above ground
MOS input level limit.
2. Power Supply Range- as can be seen from the schematic
drawing of the drivers, the positive and negative driving elements of the device are essentially independent and do not
require matching power-supplies. In fact, the positive supply
can vary from a minimum seven volts (required for driving the
negative pulldown section) to the maximum specified 15 volts.
The negative supply can vary from approximately - 2.5 volts
to the minimum specified -15 volts. The MCI488 will drive
the output to within 2 volts of the positive or negative supplies
as long as the current output limits are not exceeded. The
combination of the current-limiting and supply-voltage features allow a wide combination of possible outputs within the
same quad package. Thus if only a portion of the four drivers
are used for driving EIA-232C lines, the remainder could be
used for DTL to MOS or even DTL to DTL translation. Figure
plus or minus 15 volts, the power dissipation in these resistors
15 shows one such combination.
MOTOROLA LINEAR/INTERFACE DEVICES
7-41
MC1488
FIGURE 15 - LOGIC TRANSLATOR APPLICATIONS
FIGURE 14 - MOTLlMTTL-TO-MOS TRANSLATOR
+12V
Mon
INPUT
MOR
Mm
INPUT
-12V
~12V
Mon ~-'-r---...
MHn OUTPUT
MHn
1>-+-<>---.....- - -.... -0.7 V to 10 V
INPUT 010-t-L_/
12
MOn ,,--,-r----...
MOS OUTPUT
MMOS
):>-+-<>-1>-""''\--..--.... -10 V to 0 V
I NPUT ~134:;::::::;::~,J
10k
-12 V
+12 V
II
MOTOROLA LINEAR/INTERFACE DEVICES
7-42
®
MC1489
MC1489A
MOTOROLA
QUAD MDTL
LINE RECEIVERS
EIA-232C
QUAD LINE RECEIVERS
The MC1489 monolithic quad line receivers are designed to
interface data terminal equipment with data communications
equipment in conformance with the specifications of EIA Standard
No. EIA-232C.
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Input Resistance - 3.0 k to 7.0 kilohms
•
Input Signal Range - ±.30 Volts
•
Input Threshold Hyste;'esis Built In
•
Response Control
a) Logic Threshold Shifting
bl Input Noise Filtering
TYPICAL APPLICATION
LINE DRIVER
LINE RECEIVER
MC1488
MC1489
5- -,
-1
12 Response
~-_/
Control D
Response
)
I
MOTL LOGIC INPUT
Control B
I
- - l - MOll LOGIC OUTPUT
INTERCONNECTING
~
CABLE
I
I
Ground 7
EQUIVALENT CIRCUIT SCHEMATIC
(1/4
OF CIRCUIT SHOWN)
14
Vee
9k
1.7k
5k
R,
3 OUTPUT
RESPONSE CONTROL 2
3.8 k
INPUT 1
t--...
t-....
t--...
10k
IR,
MCI.as
MCI.S9A
6.7 k!l
1.6 k!l
1 GROUNO
MOTOROLA LINEAR/INTERFACE DEVICES
7-43
MC1489. MC1489A
MAXIMUM RATINGS (TA = +25°C unless otherwise noted)
Symbol
Value
Unit
Power Supply Voltage
Rating
VCC
10
Vdc
Input Voltage Range
VIR
±30
Vdc
Output Load Current
IL
20
mA
PD
1/8JA
1000
6.7
mW
mwrc
Power Dissipation (Package Limitation, Ceramic
and Plastic Dual In-Line Package)
Derate above T A = + 25°C
Dperating Ambient Temperature Range
Characteristics
Positive Input Current
(VIH
(VIH
Negative Input Current
(VIL
(VIL
Input Turn-On Threshold Voltage
(TA = + 25°C, VOL'" 0.45 VI
= + 25 Vdc)
= + 3.0 Vdcl
= - 25 Vdcl
= - 3.0 Vdcl
=
+75
°c
-65 to + 175
Tstll
ELECTRICAL CHARACTERISTICS (Response control pin is open.) (VCC
otherwise noted)
+5.0 Vdc ± 10%, TA
°c
=
0 to + 75°C unless
Symbol
Min
Max
Unit
IIH
3.6
0.43
-
B.3
mA
IlL
-3.6
-0.43
-
-B.3
-
Typ
-
-
1.0
1.75
1.95
0.75
0.75
O.B
1.25
1.25
(VIH = 0.75 V, IL = -0.5 mAl
(Input Open Circuit, IL = - 0.5 mAl
VOH
2.5
2.5
4.0
4.0
5.0
5.0
Vdc
Output Voltage Low
(VIL
=
3.0 V, IL
=
10 rnA)
Output Short-Circuit Current
VOL
-
0.2
0.45
Vdc
lOS
-
-3.0
-4.0
Power Supply Current (All Gates "on," lout
=
0 rnA, VIH
(VIH
Power Consumption
SWITCHING CHARACTERISTICS (VCC
=
=
=
+ 5.0 Vdcl
mA
ICC
-
16
26
+ 5.0 Vdcl
mA
Pc
-
80
130
mW
50 Vdc +- 1% TA
Propagation Delay Time
(RL
Rise Time
(RL
Propagation Delay Time
(RL
Fall Time
(RL
=
1.5
2.25
Vdc
VIL
MC14B9
MC1489A
Output Voltage High
mA
Vdc
VIH
MC14B9
MCl4B9A
Input Turn-Off Threshold Voltage
(TA = + 25°C, VOH '" 2.5 V,IL = -0.5 mAl
•
o to
TA
Storage Temperature Range
-
+25°C See Figure 1 I
= 3.9 kfi)
= 3.9 kfi)
= 390 WI
= 390 kOI
tpLH
-
25
B5
ns
tTLH
-
120
175
ns
tPHL
-
25
50
ns
10
20
ns
tTHL
TEST CIRCUITS
FIGURE 1 -
SWITCHING RESPONSE
FIGURE Z - RESPONSE CONTROL NODE
t5 Vdc
All diodes
1N3064
~------~--------~----___ Eo
C~
, -_ _--, 'JV
\5~'"
·. . r
1'4
MC1489A
4-IPLH
EO
tTHl
CL
1.5 V
tTlH and ITHL
measured
TOUJo - 90"/0
ITlH
1.5 V
RESPONSE NODE
p-------------eVO
C, CClpacltor IS lor noise filtermg,
R, ,esistor IS for Ihreshold shifting
= 15 pF = total parasitic capacitance, which includes
probe and wiring capacitances
MOTOROLA LINEAR/INTERFACE DEVICES
7-44
MC1489, MC1489A
TYPICAL CHARACTERISTICS
(Vee = 5.0 Vdc, T A = +250 C unless otherwise noted)
FIGURE 3 -
INPUT CURRENT
FIGURE 4 - MC1489 INPUT THRESHOLD
VOLTAGE ADJUSTMENT
_
+6.0
§>-
+4.0
5.0
.."..
./'
:::>
u
>-
/
~ -2.0
~
,..".....
I-"'"
-8.0
-10
-25
-15
-10
f--
ff-
+5.0
-5.0
f-- Vth
o
I
··20
r-RT
3. o f--. 5k
>- 2.
~
"~
V
4.0
w
'"
~
>
.,/"
..; -4.0
"~
V
V
~
~ +2.0
-6.0
"
6. 0
+10
+8.0
I
I
I
.;.10
+15
+20
!;
o
o
+5 V
f--
RT
Vth
+5 V
>
~
0
-5 V
5.0
-
.'"
3.0
5k
~
2.0
+5 V
0
1.0
~
0
-
Vth
>
-
11k
-3.0
-20
0
.J-
- -
>
-
,t---, rVILH - VIHL
~
w
I
'"
~
0
>
0
+1.0
I
-2.0
-1.0
+1.0
+20
+30
r-- t---
20
18
16
14
'"
~
t~
r.
;> 02
I
0
-60
+40
T. TEMPERATURE (OCI
0
-
I
,60
VIH MC1489A
-
II
r - t - -li l
I l
I 1MC1~9A
04
~
w
1.0
I
MCI489 VIL
06
'"
~
:lj
'">-:J:
I
MCI489A VIH
:J:
~
:g
>
+3.0
1.0
FIGURE 7 - INPUT THRESHOLD versus
POWER-SUPPLY VOLTAGE
50
+2.0
MCI489 VIH
11
VI, INPUT VOLTAGE (VOLTS)
2.0
-
>- 0.8
(,
-3.0
-f
INPUT THRESHOLD VOLTAGE
~
~
~Vlh
!;
-
':'Vth_
r-
,,-
-1.0
24
2.1
RT
Vth
-5 V
-
RT-
versus TEMPERATURE
Y
RT
r--
y=
VILH VIHL
AGURE 6 -
I
RT
!-!--
I
+25
I
RT
Vth
VI, INPUT VOLTAGE (VOLTS)
6.0
4.0
11k
0
o
FIGURE 5 - MC1489A INPUT THRESHOLD
VOLTAGE ADJUSTMENT
~
r--
RT
-
~
Von. INPUT VOLTAGE (VOLTSI
~
w
-
RT
13 k
I
I
VIH MC1489
VIL MCI489
VIL MC1489A
>~
~
4.0
8.0
Vcc, POWER SUPPLY VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
7-45
12
VIL I -
I
t
120
MC1489, MC1489A
APPLICATIONS INFORMATION
hysteresis for noise rejection. The MC1489 input has
typical turn-on voltage of 1.25 volts and turn-off of 1.0
volt for a typical hysteresis of 250 mV. The MCl489A
has typical turn-on of 1.95 volts and turn-off of 0.8 volt
for typically 1.15 volts of hysteresis.
Each receiver section has an external response control node in addition to the input and output pins,
thereby allowing the designer to vary the input threshold voltage levels. A resistor can be connected between
this node and an external power supply. Figures 2, 4
and 5 illustrate the input threshold voltage shift possible
through this technique.
This response node can also be used for the filtering
of high-frequency, high energy noise pulses. Figures 8
and 9 show typical noise-pulse rejection for external
capacitors of various sizes.
These two operations on the response node can be
combined or used individually for many combinations
of interfacing applications. The MCl489 circuits are particularly useful for interfacing between MOS circuits and
MDTUMTTL logic systems. In this application, the input
threshold voltages are adjusted (with the appropriate
supply and resistor values) to fall in the center of the
MOS voltage logic levels. (See Figure 10)
The response node may also be used as the receiver
input as long as the designer realizes that he may not
drive this node with a low impedance source to a voltage greater than one diode above ground or less than
one diode below ground. This feature is demonstrated
in Figure 11 where two receivers are slaved to the same
line that must still meet the EIA-232C impedance
requirement.
General Information
II
The Electronic Industries Association (EIA) has released
the EIA-232C specification detailing the requirements
for the interface between data processing equipment
and data communications equipment. This standard
specifies not only the number and type of interface
leajs, but also the voltage levels to be used. The
M('1488 quad driver and its companion circuit, the
MC1489 quad receiver, provide a complete interface
system between DTL or TTL logic levels and the EIA232C defined levels. The EIA-232C requirements as
applied to receivers are discussed herein.
The required input impedance is defined as between
3000 ohms and 7000 ohms for input voltages between
3.0 and 25 volts in magnitude; and any voltage on the
receiver input in an open circuit condition must be less
than 2.0 volts in magnitude. The MCl489 circuits meet
these requirements with a maximum open circuit voltage of one VBE.
The receiver shall detect a voltage between - 3.0 and
- 25 volts as a Logic "1" and inputs between + 3.0 and
+ 25 volts as a Logic "0." On some interchange leads,
an open circuit of power "OFF" condition (300 ohms or
more to ground) shall be decoded as an "OFF" condition
or Logic "1." For this reason, the input hysteresis
thresholds ofthe MC1489 circuits are all above ground.
Thus an open or grounded input will cause the same
output as a negative or Logic "1" input.
Device Characteristics
The MCl489 interface receivers have internal feedback
from the second stage to the input stage providing input
FIGURE 8 - TYPICAL TURN-ON THRESHOLD versus
CAPACITANCE FROM RESPONSE CONTROL PIN TO GND
10
100
1000
FIGURE 9 - TYPICAL TURN-ON THRESHOLD versus
CAPACITANCE FROM RESPONSE CONTROL PIN TO GND
10.000
10
100
1000
pw. INPUT PULSE WIDTH In.1
PW.INPUT PULSE WIDTH In.1
MOTOROLA LINEAR/INTERFACE DEVICES
7-46
10.000
MC1489, MC1489A
APPLICATIONS INFORMATION
!contInued)
FIGURE 10 - TYPICAL TRANSLATOR APPLICATION MOS TO DTL OR TTL
+5 Vdc
OTl or TTL
FIGURE 11 - TYPICAL PARALLELING OF TWO MC1489,A RECEIVERS TO MEET EIA-232C
VCC
RESPONSE·CONTROl PIN
r- - - - - - - - - - -r-=-;.::-=.=--=-=;
til MCI489
OUTPUT
INPUT
8k
VCCO-~-----------------,
OUTPUT
INPUT
L__~8~k.r--I>~_____________+-I\II.~-y,..----t-o-"
RESPONSE CONTROL PIN
MOTOROLA LINEAR/INTERFACE DEVICES
7-47
II
•
®
MC26S10
MOTOROLA
QUAD OPEN-COLLECTOR
BUS TRANSCEIVER
QUAD OPEN-COLLECTOR BUS TRANSCEIVER
This quad transceiver is designed to mate Schottky TTL or
NMOS logic to a low impedance bus. The Enable and Driver inputs
are PNP buffered to ensure low input loading. The Driver (Bus)
output is open-collector and can sink up to 100 mA at 0.8 V, thus
the bus can drive impedances as low as 1000. The receiver output
is active pull-up and can drive ten Schottky TTL loads.
An active-low Enable controls all four drivers allowing the outputs of different device drivers to be connected together for partyline operation. The line can be terminated at both ends and still
give considerable noise margin at the receiver. Typical receiver
threshold is 2.0 V.
Advanced Schottky processing is utilized to assure fast propagation delay times. Two ground pins are provided to improve
ground current handling and allow close decoupling between VCC
and ground at the package. Both ground pins should be tied to
the ground bus external to the package.
• Driver Can Sink 100 mA at 0.8 V (Max)
• PNP Inputs for Low-Logic Loading
• Typical Driver Delay = 10 ns
SCHOTTKY
SILICON MONOLITHIC
INTEGRATED CIRCUIT
LSUFFIX
-
CERAMIC PACKAGE
CASE 620-10
1
• Typical Receiver Delay = 10 ns
• Schottky Processing for High Speed
• Inverting Driver
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
PIN CONNECTIONS
TYPICAL APPLICATION
5.0
Er18bTe"
v
Eri'Eibie
100 100 100 100
Driver
Inputs
Driver
Inputs
MC26S10
MC26S10
Driver
Input A
Driver
Input B
Output B
Receiver
Outputs
Outputs
Driver
TRUTH TABLE
Oriver
Inputs
Inputs
MC26S10
14 Receiver
Qutput.C
Receiver
Receiver
MC26S10
Receiver
Receiver
Outputs
Outputs
E'i1'8b'i'8
Receiver
Output A
100 100 100 100
5.0 V
En'8bi'e
Enable
Driver
Input
L
L
H
L
H
X
L
H
X
Y
Bus
H
L
y
Receiver
Output
L
H
y
= Low Logic State
= High Logic State
= Irrelevant
= Assumes condition controlled
by other elements on the bus
MOTOROLA LINEAR/INTERFACE DEVICES
7-48
MC26S10
MAXIMUM RATINGS (TA = 250 e unless otherwise noted)
Symbol
Value
Unit
Vee
-0.5 to +7.0
Vdc
Input Voltage
VI
-0.5 to +5.5
Vdc
Input Current
II
-3.0 to +5.0
mA
Vo (Hi-z)
-0.5 to Vee
V
Output Current Bus
10(B)
200
mA
Output Current Receiver
Rating
Power SupplV Voltage
Output Voltage - High Impedance State
10(R)
30
mA
Operating Ambient Temperature
TA
o to +70
°e
Storage Temperature
Tstg
-65 to +150
°e
ue
Junction Temperature
Ceramic Package
Plastic Package
TJ
175
150
ELECTRICAL CHARACTERISTICS IUnless otherwise noted Vee = 4.75 to 5.25 V and TA = 0 to +700 e.
Typical values measured at Vee - 5 0 V and TA "" 25°C)
Symbol
Min
Typ
Max
Unit
Input Voltage - Low Logic State
(Driver and Enable Inputs)
VIL
-
-
0.8
V
Input Voltage - High Logic State
(Driver and Enable Inputs)
VIH
2.0
-
-
V
I nput Clamp Voltage
(Driver and Enable Inputs)
VIK
-
-
-1.2
V
Characteristic
(11K = -18 mAl
Input Current - Low Logic State
mA
IlL
(VIL =O.4V)
(Enable Input)
(Driver Inputs)
-
Input Current
High Logic State (VIH - 2.7 V)
IEnable Input)
-
-0.36
-0.54
IIH
-
(Driver Inputs)
Input Current - Maximum Voltage
IIHI
"A
-
20
30
-
-
100
-
0.33
0.42
0.51
0.5
0.7
0.8
-
-
100
-50
"A
(VIHI = 5.5 V)
(Enable or Driver Inputs)
Driver Output Voltage - Low Logic State
Driver (Bus) Leakage Current
1010)
IVOH = 4.5 V)
IVOL = 0.8 V)
-
Driver (Bus) Leakage Current
IVee = 0 V. VOH
V
VOLIO)
1I0L = 40 rnA)
1I0L = 70mA)
1I0L = l00mA)
= 4.5
"A
10110)
100
"A
V)
Receiver Input High Threshold
VTHIR)
2.25
2.0
-
V
VTLlR)
-
2.0
1.75
V
0.5
V
3.4
-
V
IVIHIE) = 2.4 V)
Receiver Input Low Threshold
IVIHIE) = 2.4 V)
Receiver Output Voltage
Low Logic State
VOLlR)
Receiver Output Voltage - High Logic State
VOHIR)
2.7
10S(R)
-18
-
-60
mA
lee
-
45
70
rnA
1I0L = 20 rnA)
IIOH = -1.0 mAl
Receiver Output Short-Circuit Cu~rent (Note 1)
Power Supply Current - Output Low State
IVIL(E)
=0
V)
NOTE 1: One output shorted at a time. Duration not to exceed 1.0 second.
MOTOROLA LINEAR/INTERFACE DEVICES
7-49
II
•
MC26S10
SWITCHING CHARACTERISTICS (Vee
=
5.0 V, TA
=
25'e unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
tPLH(D)
tPHL(D)
-
Propagation Delay Time Enable Input to Output
tPLH(E)
tPHL(E)
-
15
15
18
18
ns
-
10
10
14
13
Propagation Delay Time Bus to Receiver Output
tPLH(R)
tPHUR)
15
15
lTLH(D)
lTHL(D)
4.0
2.0
10
10
10
4.0
ns
-
-
ns
Propagation Delay Time Driver Input to Output
Rise and Fall Time of Driver Output
-
ns
SWITCHING WAVEFORMS AND CIRCUITS
FIGURE 1 -
DATA INPUT TO BUS OUTPUT (DRIVER)
Vee
3.0 V
To Scope
( Input)
Driver
Input
50
Driver
To Scope
(Output)
VOH-------+-----+·~~----~~~
50 pF
(Includes
probe
and jig
Driver
Output
VOL _ _ _ _--'="'!
L-~~~
FIGURE 2 -
__________
capacitance)
~
ENABLE INPUT TO BUS OUTPUT (DRIVER)
Vee
3.0 V - - - - - , . - - - - - _
50
Enable
Input
OV
To Scope
(Output)
VOH----+--Driver
Output
50 pF
(Includes
probe
and jig
VOL _______J
capacitance)
FIGURE 3 -
BUS INPUT TO RECEIVER OUTPUT
vee
(Output)
1N916
Driver
280
Output
(Input)
Vee
To 'Scope
VOH--------,.---------_
Equivalent
VOL
To
Scope
Vo H----------"'"\.
~ 15 pF (Total)
(Input)
Receiver
Output
J
VOL-------------'-----------J
50 pF
(Total)
MOTOROLA LINEAR/INTERFACE DEVICES
7-50
50
®
MC3437
MOTOROLA
HEX BUS
HEX BUS RECEIVER WITH INPUT HYSTERESIS
RECEIVER
These high-speed bus receivers are useful in bus organized data
transmission systems employing terminated 120 [2 lines. The receivers
feature input hysteresis to obtain improved noise immunity. The
receivers low input current requirement allows up to 27 driver/
receiver pairs to share a common bus. A pair of Disable Inputs are
provided. These Disable Inputs along with the receiver outputs are
MTtL compatible.
•
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Built in receiver hysteresis
Receiver input threshold is not affected by temperature
• Propagation delay time·- 20 ns (Typ)
•
..
Direct Replacement for DM8837
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
FIGURE 1 - TYPICAL APPLICATION
+5.0 V
+5.0 V
180
L
,~
120 n Data Bus
390r'~c'------.-----r~l
PSUFFIX
1
PLASTIC PACKAGE
CASE 648-06
390
PIN CONNECl:IONS
To Computer or
Pe~jpherals
MAXIMUM RATI NGS ITA = 25°C unless otherwise noted.}
Symbol
Value
Unit
Vee
7.0
Vdc
Input Voltage
VI
5.5
Vdc
Power Dissipation
Derate above 25°C
PD
625
3.85
mW
mW/oC
TA
Ot070
°c
T stg
-65 to +150
°c
Rating
Supply Voltage
Operating Ambient Temperature Range
Storage Temperature Range
TRUTH TABLE
Input
Oisable
Output
0
L
H
0
H
L
MOTOROLA LINEAR/INTERFACE DEVICES
7-51
L
L
H
L
0=
< 1.05 V
1= >2.5 V
H = High Logic State
L = Low Logic State
•
MC3437
ELECTRICAL CHARACTERISTICS (Unless otherwise noted specifications apply for O';;;TA';;; 70°C and 475 V ';;;Vee';;;5 25 V)
Characteristic
Receiver Input Threshold Voltage - High Logic State
Symbol
Min
Typ
Max
Unit
VILH(R)
1.80
2.25
2.50
V
VIHL(R)
1.05
1.30
1.55
V
-
15
1.0
50
50
VIHIDA)
2.0
-
-
V
VIL(DA)
-
-
0.8
V
VOH
2.4
-
-
V
VOL
-
0.25
0.4
V
-
-
80
2.0
/LA
mA
IIL(DA)
-
-
-3.2
mA
lOS
-18
-
-55
mA
ICC
-
45
65
mA
VI
-
-1.0
-1.5
V
(VIL(DA) = 0.8 V,IOL = 16 mA, VDL ';;;0.4 V)
Receiver Input Threshold Voltage - Low Logic State
(VIL(DA) = 0.8 V.IOH = -400/LA, VOH ;;'2.4 V)
Receiver Input Current
/LA
IIIR)
IVilR) = 4.0 V, Vee = 5.25 V)
(VIIR) = 4.0 V, Vee = 0 V)
Disable Input Voltage - High Logic State
IVilR) = 0.5 V, VOL ';;;0.4 V,IOL = 16 mAl
Disable Input Voltage - Low Logic State
(VilR) = 0.5 V, VOH ;;'2.4 V,IOH = -400/LA)
Output Voltage - High Logic State
(VilR) = 0.5 V, VIL(DAl = 0.8 V, 10H = -400/LA)
Output Voltage·- Low Logic State
(VIIR)=4.0V,VILIDA)=0.8V,IOL= 16 mAl
Disable Input Current - High Logic State
IVIHIDA)
IVIHIDA)
IIHIDA)
= 2.4 V)
= 5.5V)
Disable Input Current - Low Logic State
IVIIR) = 4.0 V, VIL(DA)
= 0.4 V)
Output Short Circuit Current
(VilR) = 0.5 V, VIL(DA) = OV, Vee
= 5.25
V)
Power Supply Current
(VIIR) = 0.5 V, VIL(DA)
= 0 V)
Inp.ut Clamp Diode Voltage
(lIIR) = -12 mA, IIiDAl = -12 mA,
SWITCHING CHARACTERISTICS (TA = 25°C Vee = 50 V unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Propagation Delay Time from Receiver Input to
High Logic State Output
tPLH(R)
-
20
30
ns
Propagation Delay Time from Receiver Input to
Low Logic State Output
tpHL(R)
-
18
30
ns
Propagation Delay Time from Disable Input to
High Logic State Output
tPLH(DAl
-
9.0
15
ns
Propagation Delay Time from Disable Input to
Low Logic State Output
tpHL(DA)
-
4.0
15
ns
Characteristic
MOTOROLA LINEAR/INTERFACE DEVICES
7-52
MC3437
FIGURE 2 - SWITCHING TIMES TEST CIRCUIT AND WAVEFORMS
+5.0 V
To Scope
3.0 V - - - - , ' - - - - ,
390
(Input)
2.3 V
Input
1.3 V
1N916 or
Equiv
OV-
3.0 V - - - + - - - - + - - - - - - , . . . - - - ,
Oisable
IDA)
To Scope
a V ---+-----t------'
(Output)
Output
Pulse
Generator
1.5 V
1.5 V
""I
51
1.5 V
1.5 V
VOL
To Scope
(Disable)
FIGURE 3 - TYPICAL HYSTERESIS
5.0
~
4.0
•
2-
..'"
w
3.0
!:;
0
>
...
~
::>
2.0
~ 1.0
1.0
4.0
VIIR), INPUT VOLTAGE (VOLTS)
REPRESENTATIVE CIRCUIT SCHEMATIC
(1/6 Shown)
Vee
Rl
Input
R3
R4
Rl0
R13
o-....-I----+-f
Output
......-+....__OOiI8ble
01
L-~----4~--~~
_________
~-4~
__________
-4~
___________
MOTOROLA LINEAR/INTERFACE DEVICES
7-53
~
___-oGround
•
®
MC3440A
MC3441A
MOTOROLA
QUAD GENERAL-PURPOSE INTERFACE
BUS (GPIB) TRANSCEIVERS
QUAD INTERFACE
BUS TRANSCEIVERS
The MC3440A; MC3441A are quad bus transceivers intended
for usage in instruments and programmable calculators equipped
for interconnection into complete measurement systems. These
transceivers allow the bidirectional flow of digital data and commands between the various instruments. Each of the transceiver
versions provides four open-collector drivers and four receivers
featuring input hysteresis.
The MC3440A version consists of three drivers controlled by a
common Enable input and a single driver without an Enable input.
Terminations are provided in the device.
The MC3441A differs in that all four drivers are controlled by
the common Enable input. Again, the terminations are provided.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
-
PSUFfIX
PLASTIC PACKAGE
CASE 648-06
1
• Receiver Input Hysteresis Provides Excellent Noise Rejection
• Open-Collector Driver Outputs Permit Wire-OR Connection
PIN CONNECTIONS
• Tailored to Meet the Standards Set by the IEEE and IEC
Committees on Instrument Interface (488-1978)
• Terminations comply with IEEE 488-1978; terminations
removed when device is un powered
Output and
Termination
• Provides Electrical Compatibility with General-Purpose
Interface Bus
Bus A
Gnd
Receiver
14 Receiver
Output A
Output C
Driver
Input A
TYPICAL APPLICATION - GPIB MEASUREMENT SYSTEM
Driver
Input B
Output B
11
I~~~te~
Bus B
10
~~~:~~e~
Receiver
--- -
I
Instrument
A
(with GPIB)
I
,
,
I
Instrument
B
(with GPIB)
l
J
Programmable
Calculator
(with GPIB)
I
,
Logic Gnd
Output and
Termination 1
Gnd
----
Receiver
14 Receiver
Output C
Output A
I~~~te~
MAXIMUM RATINGS ITA = 25·C unless otherwise noted I (Note 1)
Rating
Symbol
Power Supply Voltage
Input Voltage
Driver Output Current
Power DiSSipation (Package Limitation)
Derate above 25·C
Operating Ambient Temperature Range
Storage Temperature Range
Value
Unit
VCC
7.0
Vdc
VI
5.5
Vdc
10(0)
150
mA
Po
830
6.7
mW
mWf'C
TA
Tstg
o to
+70
-65 to +150
I~~i~:~
5
~::~~e~
6
11 Driver
Input D
10
Logic Gnd
·C
·C
Note 1: Davlc;es should not be operated at these values. The "Electrical Characteristics" prOVide
conditions for actual device operation.
MOTOROLA LINEAR/INTERFACE DEVICES
7-54
4
-
T-
=
Bus Termination
~=~~e~
MC3440A, MC3441A
ELECTRICAL CHARACTERISTICS (Unless otherwise noted, 4.5 v", Vee'" 5.5 V and 0 '" TA '" 70'e, typical values are at
TA = 25'e, Vee = 5.0 V)
Characteristic
Symbol
Min
Typ
Max
Unit
DRIVER PORTION
Input Voltage -
High Logic State
VIH(D)
2.0
Input Voltage -
Low Logic State
VIL(D)
-
-
0.8
V
Input Current - High Logic State
(VIH = 2.4 V)
IIH(D)
-
-
40
pA
Input Current - Low Logic State
(VIL = 0.4 V, VCC = 5.0 V, TA = 25'C)
IIL(D)
-0.25
rnA
Input Clamp Voltage
(11K = -12 rnA)
VIK(D)
-
-
-1.5
V
Output Voltage - High Logic State
(VIH(S) = 2.4 V or VIL(D) = 0.8 V)
VOHID)
2.5
-
-
-
Output Voltage - Low Logic State
(VIH(S) = 2.0 V, VIL(E) = 0.8 V, IOL(D)
(VIH(D) = 2.0 V, VIL(E) = 0.8 V, IOL(D)
VOL(D)
= 48 rnA)
= 100 mAl
-
-
V
V
V
0.5
0.80
RECEIVER PORTION
400
580
-
mV
Input Threshold Voltage - Low to High Output Logic State
(VCC = 5.0 V, TA = 25'C)
ViLH(R)
0.8
0.98
-
V
Input Threshold Voltage - High to Low Output Logic State
(VCC = 5.0 V, TA = 25'C)
VIHL(R)
-
1.56
2.0
V
Output Voltage - High Logic State
(VIL(R) = 0.8 V, IOHIR) = -400 pA)
VOH(R)
2.4
-
-
V
Output Voltage - Low Logic State
(VIH(RI = 2.0 V, IOL(R) = 16 mAl
VOL(R)
-
-
0.5
V
Output Short-Circuit Current
IVIL(R) = 0.8 V) (Only one output may be shorted at a time)
IOS(R)
-
-55
rnA
-
input Hysteresis
-20
BUS TERMINATION PORTION
Bus Voltage (VIl(D) = 0.8 V)
(lBUS = -12 mAl
(No Load)
VBUS
Bus Current
(VIL(D) = 0.8 V, VBUS .. 5.0 V)
(VIL(D) = 0.8 V, VBUS '" 5.5 V)
(VIL(D) = 0.8 V, VBUS = 0.5 V)
(VCC = 0, 0 '" VB US '" 2.75 V)
IBUS
-
-
2.50
-
0.7
-
V
-1.5
3.70
mA
-
-
-
Min
Typ
Max
Unit
13
30
ns
17
30
ns
25
40
ns
25
40
ns
-1.3
2.5
-3.2
+0.04
TOTAL DEVICE POWER CONSUMPTION
SWITCHING CHARACTERISTICS (VCC = 5.0 V, TA = 25'C)
Symbol
Characteristic
J
DRIVER PORTION
Propagation Delay Time from Driver Input to Low Logic State Bus Output
tPH[JD)
Propagation Delay Time from Driver Input to High Logic State Bus Output
tPLH(D)
Propagation Delay Time from Enable Input to Low Logic State Bus Output
tpHLIE}
Propagation Delay Time from Enable Input to High Logic State Bus Output
tPLH(E)
-
RECEIVER PORTION
Propagation Delay Time from Bus Input to High Logic State Receiver Output
Propagation Delay Time from Bus Input to Low Logic State Receiver Output
MOTOROLA LINEAR/INTERFACE DEVICES
7-55
•
MC3440A, MC3441A
GENERAL PURPOSE INTERFACE BUS APPLICATION
INSTRUMENT A
--,---
MC3441A
l
I' I'
INSTRUMENT B
j
j
j
-- --
0101
0101
I
0102
0102
:
0103
0103
I
REN
~
I
0104
(Always
I
I
I
MC3441A
Enabled)
I
0105\
DI04
I
0106
0105
:
0107
0106
I
0108 )
Enabled)
I
I
I
II
I
MC3441A
I
0107
EOI
0108
OAV
EOI
IFC
(Always
I
I
I
I
Enabled)
(Always
I
(Always
Enabled)
Enabled)
I
SRO)
ATN
:
DAV)
IFC
I
I
I
I
MC3440A
E
REN
ATN )
:
E
SRO
(Always
I
I
I
I
I
I
E
1- - - - -
NRFD
NRFD
NDAC
NDAC
r,
--- -- ~
,
~--
- - ,f
16 Lines
Total
MC3440A
-: }"
I
0101 -
I
I
I
I
SA Q
-
I
+-4-
MC3440A
I
I
I
~
4-
~
I
MC3440A
2tI
I
I
4t
I
I
I
E
I
L -- ---
OAV - Data Valid
N A F 0 - Not Ready for Data
NDAC - Not Data Accepted
EOI - End or Identify
ATN - Attention
IFe - Interface Clear
16 Total Signal Lines
MOTOROLA LINEAR/INTERFACE DEVICES
7-56
E
MC3440A
3 Data Byte Transfer Control Bus
Service Request
E
I
0108
5 General Interrupt Transfer Control Bus:
REN - Remote Enable
Instruments
gic (Typ ieal)
J-
GPIB SIGNALS:
8 Line Data Bus:
Lo
MC3440A, MC3441A
FIGURE 1 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY 11ME PROM
RECEIVER INPUT IBUSI TO OUTPUT
To Scope
(Outputl +5.0 V
Input
To Scope
OV
VOH
Output
VOL
400
(Input)
~
tPHL(RI
16pF
1.5 V
~---------------~
or~uiY
Input
Pul..
FIGURE 2 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY nME FROM
DRIVER AND COMMON ENABLE INPUTS TO OUTPUT IBUSI
To Scope
+6.0 V
3.0 V
t;v
ToScopa
(Input)
(Output)
Output
VOL
'00
BUI
I
Input
----------~c.
F-v
50PF
VOH
Output
VOL
FIGURE 3 - TYPICAL RECEIVER HYSTERESIS
CHARACTERISTICS
S.O
I.
r-- f-VCC:S.DV
TA"2S"C
S 4.0
;
0
~
w
to
« 3.0
~
0
...:>>
I!:
:>
2.0
0
~ 1.0
o
o
D.S
50"
50"
1.0
VI. INPUT VOLTAGE (VOLTSI
1.S
2.0
MOTOROLA LINEAR/INTERFACE DEVICES
7-57
tPHL(EI
1.5 V
II
•
®
MOTOROLA
MC3446A
QUAD GENERAL-PURPOSE INTERFACE
BUS (GPIB) TRANSCEIVER
QUAD INTERFACE
BUS TRANSCEIVER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3446A is a quad bus transceiver intended for usage in
instruments and programmable calculators equipped for interconnection into complete measurement systems. This transceiver allows the
bidirectional flow of digital data and commands between the various
instruments. The transceiver provides four open-collector drivers and
four receivers featuring hysteresis.
•
Tailored to Meet the IEEE Standard 488-1978 (Digital Interface
for ·Programmable I.nstrumentation) and the Proposed IEC
Standard on Instrument Interface
•
Provides Electrical Compatibility with General-Purpose Interface
Bus (GPIB)
•
MOS Compatible with High Impedance Inputs
•
Driver Output Guaranteed Off During Power Up/Power Down
•
Low Power - Average Power Supply Current
•
Terminations Provided
1
P SUFFix
PLASTIC PACKAGE
CASE 648-06
= 12 mA
PIN CONNECTIONS
TYPICAL MEASUREMENT SYSTEM APPLICATION
Receiver
....
Vee
Output A
Receiver
Output 0
Bus A
---
I
Instrument
A
(with GPIB)
Driver
Input A
-
I
Bus 0
Driver
Enable
I
,
I
Input 0
ABe
Driver
Input B
,
Instrument
B
(with GPIB)
...
I
Programmable
Calculator
(with GPIB)
,
.~
Driver
Inpute
Bus B
Receiver
Output B
...
---- T - :; Bus Termination
16 Lines Total
MOTOROLA LINEAR/INTERFACE DEVICES
Buse
....
Gnd
7-58
Enable 0
...
Receiver
Output C
MC3446A
MAXIMUM RATINGS IT A = 25°C unle.. otherwise noted I
Rating
Symbol
Value
Unit
VCC
7.0
Vdc
VI
5.5
Vdc
Driver Output Current
101D)
150
mA
Junction Temperature
TJ
150
°c
Operating Ambient Temperature Range
TA
T stg
o to +70
°c
-65 to +150
°c
Power Supply Voltage
Input Voltage
Storage Temperature Range
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, 4.5 V ""
Vee""
5.5 V and 0 ~ TA";; 70 D e, typical values are at TA = 25°C,
Characteristic
Vee = 5.0 V)
Symbol
Min
Typ
Input Voltage - High Logic State
VIHIDI
2.0
-
-
V
Input Voltage - Low Logic State
VI_IDI
-
-
0.8
V
Input Current - High LOllie State
IVIH = 2.4 V)
IIHID)
-
5.0
40
,.A
Input Current - low Logic State
IVIL = 0.4 V, VCC = 5.0V. TA = 25°C)
Input Clamp Voltage
(11K = -12 mAl
IILlD)
-
-0.2
-0.25
mA
VIKID)
-
-
VOHID)
2.5
VOUD)
IIBID)
Max
Unit
DRIVER PORTION
Output Voltage - High Logic State (1)
IVIHIS) = 2.4 V or VI HID) = 2.0 V)
Output Voltage - Low Logic State
(VILIS) = 0.8 V, VIUD) = 0.8 V, IOLID) = 48 mAl
Input Breakdown Current
(VI(D) = 5.5 V)
-1.5
V
3.3
3.7
V
-
-
0.5
-
-
1.0
mA
RECEIVER PORTION
400
625
-
mV
Input Threshold Voltage - Low to High Output Logic State
VILH(A)
-
1.66
2.0
V
Input Threshold Voltage - High to Low Output Logic State
VIHLIA)
0.8
1.03
-
V
Output Voltage - High Logic State
VOHIA)
2.4
-
-
V
VOLIA)
-
-
0.5
V
10SIA)
4.0
-
14
mA
(VIH(E) = 2.4 V)
"BUS=-12mA)
VIBUS)
2.5
3.3
-
3.7
-1.5
V
-
(VIH(O)- 2.4 V, VBUS;;'5.0 V)
IVIHID) = 2.4 V, VB US = 0.5 V)
(VBUS';; 5.5 V)
IVCC = 0, 0 V.;; VBUS';; 2.75 V)
I(BUS)
0.7
-1.3
-
mA
-
-
-
-3.2
2.5
-
0.04
Input Hysteresis
(VIH(A) = 2.0 V, 10H(A) = -400 "A)
Output Voltage - Low Logic State
(VillA) = 0.8
v. 10LlA) = 8.0 mAl
Output Short·Circuit Current
(VIH(R) = 2.0 V) (Only one output may be shorted at a time)
BUS LOAD CHARACTERISTICS
Bus Voltage
Bus Current
TOTAL DEVICE POWER CONSUMPTION
Power Supply Current
(All Drivers OFF)
(All Drivers ON)
SWITCHING CHARACTERISTICS (VCC = 5.0 V, TA = 25°C)
I
Characteristic
Symbol
Min
Typ
Propagation Delay Time from Driver Input to Low Logic State Bus Output
tPHLID)
50
n,
tPLHID)
-
40
n,
Propagation Delay Time from Enable Input to Low Logic State Bus Output
tpHLIE)
--
50
n,
Propagation Delay Time from Enable Input to High Logic State Bus Output
tPLH(E)
-
-
Propagation Delay Time from Driver Input to High Logic State Bus Output
-
50
ns
Max
Unit
DRIVER PORTION
RECEIVER PORTION
Propagation Delay Time from Bus Input to High Logic State Receiver Output
Propagation Delay Time from Bus I nput to Low Logic State Receiver Output
MOTOROLA LINEAR/INTERFACE DEVICES
7-59
II
MC3446A
FIGURE 1 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
RECEIVER INPUT (BUS) TO OUTPUT
To Scope
(Output) +5.0 V
Input
To Scope
ov
(Input)
tPLH(R)
Output
VOL
Input
Pulse
FIGURE 2 - TEST CIRCUIT AND WAVEFORMS FOR PROPAGATION DELAY TIME FROM
DRIVER AND COMMON ENABLE INPUTS TO OUTPUT (BUS)
•
To Scope
+5.0 V
(Input)
To Scope
(Outputl
Pulse
VOH
Output
VOL----J
Input
• Includes Probe and Jig Capacitance
FIGURE 4 - TYPICAL BUS LOAD LINE
FIGURE 3 - TYPICAL RECEIVER HYSTERESIS
CHARACTERISTICS
5.0 .-----,-----.1-,-,------,-----.---.-----.----,
- r - V~~: i~o~ -+--+---+--+---+---1
~
o
4.0
6.0
4.0
:< 2.0
t---t---'--i--t-r=f::::::::j:=:;-=f::::::::j::::::::::j
...zS
cw
~
w
3.0
>
~--1----+--~--~~--+---~---t--~
!;
2.01---+--+---+-++---+--+----'1'--\
~
::
-2.0
"' -4.0
"'
:0
u
:0
~
~
:0
o
g 1.01---+--+---+-++---+--+---+--\
-6.0
-ll.0
10
12
°0~--~-~0~,5~-~-~I~.0~--~---I~.5~--~--~2.0
VI,INPUT VOLTAGE (VOLTS)
VBUS, BUS VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
7-60
®
MC3447
MOTOROLA
OCTAL BIDIRECTIONAL
BUS TRANSCEIVER
BIDIRECTIONAL INSTRUMENTATION
BUS (GPIB) TRANSCEIVER
WITH
This bidirectional bus transceiver is intended as the interface
between TTL or MOS logic and the IEEE Standard Instrumentation
Bus (488-1978, often referred to as GPIB)_ The required bus termination is internally provided_
Low power consumption has been achieved by trading a minimum
of speed for low current drain on non..:ritical channels_ A fast
channel is provided for critical ATN and EOI paths_
Each driver/receiver pair forms the complete interface between
the bus and an instrument_ Either the driver or the receiver of each
channel is enabled by a Send/Receive input with the disabled output
of the pair forced to a high impedance state. The receivers have
input hysteresis to improve noise margin, and their input loading
follows the bus standard specifications_
•
•
•
•
•
•
•
•
•
•
•
•
TERMINATION NETWORKS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 623-05
•
P3 SUFFIX
PLASTIC PACKAGE
CASE 724-03
Low Power - Average Power Supply Current = 30 mA Listening
75 mA Talking
Eight Driver/Receiver Pairs
Three-State Outputs
High Impedance Inputs
Receiver Hysteresis - 600 mV (Typ)
Fast Propagation Times - 15-20 ns (Typ)
TTL Compatible Receiver Outputs
Single +5 Volt Supply
Open Collector Driver Output with Terminations
Power Up/Power Down Protection (No Invalid
Information Transmitted to Bus)
No Bus Loading When Power is Removed From Device
Required Termination Characteristics Provided
PIN ASSIGNMENTS
LLI--r-[>-r-t---'F--f231 Bus 0
1--.-{>-..-----''F--f221 Bus
1
MAXIMUM RATINGS ITA = 25 0 e unless otherwise noted)
Rating
Power Supply Voltage
Symbol
Value
Unit
Vee
7.0
Vdc
VI
5.5
Vdc
101D)
150
rnA
Input Voltage
Driver Output Current
Junction Temperature
TJ
150
°e
Operating Ambient Temperature Range
TA
o to +70
°e
Storage Temperature Range
T stg
-65 to +150
°e
--
Iinstr~ment
----
(With GPIB)
..........
Iln",ument
B
(With GPIB)
I
-- --
Bus 4
Bus 5
-4)
TYPICAL MEASUREM ENT
SYSTEM APPLICATI ON
---I
,
Programmable
Calculator
(With GPIB)
I
Vee
~u,
f.D-1
-'f-<) Bus - Indicates
- 16 Lines Total
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
7-61
~ Te,m;nat;on,
•
MC3447
ELECTRICAL CHARACTERISTICS
IUnless otherwise noted 4.50 V" VCC" 5 50 V and 0 "TA "70°C; typical values are at TA ~ 25°C, VCC ~ 5.0 V)
Characteristic -
Note 1
Symbol
Min
Typ
Max
VIBu,)
VICIBus)
2.5
-
3.7
-1.5
2.5
-3.2
+0.04
Bus Voltage
Unit
V
IBu, Pin Open)(VI(S/R) ~ 0.8 V)
IIIBu,) ~ -12 mAl
Bus Current
-
mA
IIBu,)
-
-
-
400
600
-
VILHIR)
VIHLlR)
-
1.6
1.0
2.0
0.8
VOHIR)
2.4
VOLlR)
15.0 V " V IBu,) " 5.5 V)
IV IBu,) ~ 0.5 V)
IVCC ~ 0 V, 0
VIBu,)" 2.75 V)
0.7
-1.3
v"
Receiver Input Hysteresis
mV
IVIIS/R) ~ 0.8 V)
V
Receiver I nput Threshold
IVI(S/R) ~ 0.8 V)
Low to High
High to Low
Receiver Output Voltage - High Logic State
-
-
V
-
-
0.5
V
10SIR)
-4.0
-
-20
mA
VI HID)
2.0
-
-
V
VILlD)
-
-
0.8
V
1110)
IIBID)
-100
-
-
40
200
II(S/R)
IIBIS/R)
-250
-
-
-
20
100
VICID)
-
VOHID)
2.5
VOLlD)
-
-
0.5
ICCl
ICCH
-
30
75
45
95
15
30
IVIIS/R) ~ 0.8 V, 10HIR) ~ -200 p.A, VIBus) ~ 2.0 V)
Receiver Output Voltage - Low Logic State
IVI(S/R) ~ 0.8 V, 10LlR) ~ 4.0 mA, IVIBus) ~ 0.8 V
Receiver Output Short Circuit Current
IVIIS/R) ~ 0.8 V, VIBu,) ~ 2.0 V)
Driver Input Voltage - High Logic State
IVI(S/R) ~ 2.0 V)
Driver Input Voltage - Low Logic State
IVIIS/R) ~ 2.0 V)
p.A
Driver Input Current - Data Pins
IVI(S/R) ~ 2.0 V)
10.5" VIIO)" 2.7 V)
IVIID) ~ 5.5 V)
p.A
Input Current - Send/Receive
10.5" VIIS/R)" 2.7 V)
IVI(SiR) ~ 5.5 V)
Driver Input Clamp Voltage
IVIIS/R) ~ 2.0 V, IICID) ~ -18 mAl
Driver Output Voltage
High Logic State
IVIS/R) ~ 2.0 V, VIHID) ~ 2.0 V)
Driver Output Voltage - low logic State INate 2)
(VII
~ 2.0 V, Vll(D) = 0.8 V, lOll D) = 48 mAl
SiR)
V
V
V
mA
Power Supply Current
(Listening Mode - All Receivers On)
(Talking Mode - All Drivers On)
SWITCHING CHARACTERISTICS IVcc
-1.5
~ 5 0 V TA ~ 25°C unless otherwise noted)
ns
Propag.ation Delay of Driver
(Output Low to High)
10utput High to Low)
tPLHID)
tPHLlD)
-
-
7.0
16
Propagation Delay of Receiver (Channels 0 to 5, 7)
(Output Low to High)
(Output High to Low)
tPLHIR)
tPHLIR)
-
28
15
50
30
Propagation Delay of Receiver (Channel 6, Note 3)
(Output Low to High)
(Output High to Low)
tPLHIR)
tPHLlR)
-
17
12
30
22
n,
ns
NOTES: 1. Specified test conditions for Vl(SiR) are 0.8 V (low) and 2.0 V (High). Where Vl(SiRI is specified as a test condition, VI(S/R) uses the
opposite logic levels.
2. The IEEE 488-1979 Bus Standard changes ValiD) from 0.4 to 0.5 V maximum to permit the use of Schottky technology.
3. In order to meet the IEEE 488-1978 Standard for total system delay on the ATN and EOI channels, a fast receiver has been provided on
Channel 6 (Pins 9 and 16).
MOTOROLA LINEAR/INTERFACE DEVICES
7-62
MC3447
SWITCHING CHARACTERISTICS (continued) (Vee
50 V TA
=
=
Characteristic
250 e
unless otherwise noted)
Symbol
Min
Typ
Max
tpHZ(R)
tPZH(R)
tpLZ(R)
tPZL(R)
--
15
15
15
10
30
30
25
25
tpLZ(D)
tpZL(D)
-
13
30
25
50
Unit
ns
Propagation Delay Time - Send/Receiver to Data
Logic
Third
Logic
Third
High to Third State
State to Logic High
Low to Third State
State to Logic Low
ns
Propagation Delay Time - Send/Receiver to Bus
Logic Low to Third State
Third State to Logic Low
PROPAGATION DELAY TEST CIRCUITS AND WAVEFORMS
FIGURE 1 - BUS INPUT TD DATA OUTPUT (RECEIVER)
-E::
Input
(Output)
+5.0 ~
3 .0V
1.5 V
To Scope
tPHL~R~
tpLH(R)
To Scope
1 k
)ata
(!nput)
,.--------~- - - - V O H
Output
1N916
or Equiv.
f~
1.0 MHz
tTLH = tTHL:S;; 5.0 ns (10-90)
Dutv Cycle"" 50%
* Includes Jig
and Probe Capacitance
Sendl
Pulse
Generator
FIGURE 2 - DATA INPUT TO BUS OUTPUT (DRIVER)
3.0 V
To Scope
(Output) 3.0 V
Sendl
Driver Input
"--_-+--0---' ReC
or Enable
1.5 V
51
Bus
Pulse
Output
C L '130PF
f= 1.0MHz
'"Includes Jig
and Probe Capacitance
tTLH
= tTHL";;
5.0 ns (10-90l'
Duty Cycle = 50%
FIGURE 3 - SEND/RECEIVE INPUT TO BUS OUTPUT (DRIVER)
To Scope
(Output)
Bus
Data
Input
Send/Rec
To Scope
(Input)
Pulse
Generator
Output
Low to Open
51
51
3.0 V
CL
f-= 1.0 MHz
= 30 pF
(Includes Jig and
Probe Capacitance
tTLH = t'fHL
= ""
Duty Cycle = 50%
MOTOROLA LINEAR/INTERFACE DEVICES
7-63
5.0 ns (10-90)
•
MC3447
FIGURE 4 - SEND/iiEcEiVE INPUT TO DATA OUTPUT (RECEIVER)
, . - - - - - - - " " - - - - - 3.0 V
Input
5.0 V
OV
1.2 k
Output
High to Open
Output
Low to Open
2.0 V
51
f"" 1.0 MHz
CL"" 15 pF (Includes Jig
and Probe Capacitance)
tTLH "" tTHL ==
OS;;;
5.0 ns (10-90)
Dutv Cycle"" 50%
FIGURE 5 - TYPICAL RECEIVER HYSTERESIS
CHARACTERISTICS
FIGURE 6 - TYPICAL BUS LOAD LINE
5.0
-
~ 4.0
r- Vee - 5.0 V
TA-25 0 e
o
~
"'
'" 3.0
~
•
o
>
~
2.0
~
o
~ 1.0
o
o
0.5
1.0
1.5
2.0
VBUS. BUS VOLTAGE (VOLTS)
VI. INPUT VOLTAGE (VOLTS)
FIGURE 7 - SUGGESTED PRINTED CIRCUIT BOARD LAYOUT USING MC3447s AND MC68488
10
MC68488
0
o
0
2 MC3447s
r -___________A_ _ _ _ _ _ _ _,
T~~~,,!,,'":;;,J' i ~"" 1fi
0
0
0
0
0
0
I
0
: 0......
0
: a
0
0
iB7
0
T/R1
0
0
DAV
DAC
RFO O-_ _ _ _.J
2
0------//===0
0--
0 3
0----/',,-----<:>
0-- :
4
0
0 - - - 0108
5
0
I
+1J
i
0
I
I
o--~~~
I
S/R(5)OS/R(1-4)~
:;~~ a/ : ~~:~O~ ~~---=o---------~~~
o--ATN
". ~ :! ~"""
W T ""''
SRQ~
0
i'fEN
0
i"F'E
Gnd
IFC
Gnd
Gnd
0- - -
-0
Jumper or second
level metal
MOTOROLA LINEAR/INTERFACE DEVICES
7-64
Gnd
MC3447
FIGURE 8 - SIMPLE SYSTEM CONFIGURATION
+5 V
r-------,
Data
T/R2
I
2 MC3447s
00
DB0
T/R1
07
DB7
I
I
DAV
I
DAV
0101
IB0
0103
IB2
0105
IB4
R/W
R/w
RS0
A0
RS2
Address
MC6802
or
MC6BOO
MPU
A15
IRO
IRO
\
0107
NDAC
IB6
DAC
EOI
EOI
IFC
TFC
MC68488
GPIA
SRO
fBi
IB3
IB5
IB7
NOTE1: Although the MC3447 transceivers
are non-inverting, the 488-1978 bus call outs
appear inverted with respect to the MC68488
pin designations. This is because the 488-1978
Standard is defined for negative logic, while all
M6800 MPU components make use of positive
logic format.
RFD
ATN
ATN
REN
Trig
':"
MOTOROLA LINEAR/INTERFACE DEVICES
7-65
MC3447
FIGURE 9 - SUGGESTED pIN DESIGNATIONS FOR USE WITH MC68488
MC68488
Connections
A
MC68488
Connections
MC3447 Pin Designations
B
A
SIR (0)
~
T/R 2
VCC
OAV
SRO
Data 00
2
IB0
m
Data 1
3
IB2
183
Data 2
IB4
IB5
B
VCC
VCC
VCC
23
BusD
OAV
SRO
22
Bus 1
otO 1
0102
4
21
Bus2
0103
0104
Data 3
5
20
Bus3
0105
0106
Bus4
010 7
0108
Bus 5
NOAC
NRFO
SiR (1-4)
T/R 2
T/R 2
ATN
>
•
IB6
iB7
Data 4
6·
OAC
RFO
Data 5
7
Octal
19
GPIB
Transceiver 18
T/R 2
T/R 2
SIR (5)
8
17
EOI
ATN
, Data 6
9
16
Bus 6
EOI
iFC
REN
Data 7
10
15
Bus 7
IFC
REN
T/R 1
Gnd
SIR (6)
11
14
SiR (7)
Gnd
Gnd
Gnd
Gnd
Logic Gnd
12
13
Bus Gnd
Gnd
Gnd
GPIB
Bus
MOTOROLA LINEAR/INTERFACE DEVICES
7-66
MC3447
(2)
®
MC3448A
MOTOROLA
BIDIRECTIONAL INSTRUMENTATION
BUS (GPIB) TRANSCEIVER
QUAD THREE-STATE
BUS TRANSCEIVER WITH
TERMINATION NETWORKS
This bidirectional bus transceiver is intended as the interface
between TTL or MOS logic and the IEEE Standard Instrumentation
Bus (488-1978, often referred to as GPIB). The required bus
termination is internally provided.
Each driver/receiver pair forms the complete interface between
the bus and an instrument. Either the driver or the receiver of each
channel is enabled by its corresponding Send/Receive input with
the disabled output of the pair forced to a high impedance state. An
additional option allows the driver outputs to be operated in an
open collector(1) or active pull·up configuration. The receivers have
input hysteresis to improve noise margin, and their input loading
follows the bus standard specifications.
•
•
•
•
•
•
•
•
•
•
•
Four Independent Driver/Receiver Pairs
Three-State Outputs
High Impedance Inputs
Receiver Hysteresis - 600 mV (Typ)
Fast Propagation Times - 15-20 ns (Typ)
TTL Compatible Receiver Outputs
Single +5 Volt Supply
Open Collector Driver Output Option(1)
Power Up/Power Down Protection
(No Invalid Information Transmitted to Bus)
No Bus Loading When Power Is Removed From Device
Required Termination Characteristics Provided
SILICON MONOLITHIC
INTEGRATED CIRCUIT
LSUFFIX
_ _ CERAMIC PACKAGE
CASE 620-10
16
0 SUFFIX
1
PLASTIC PACKAGE
,
CASE 7518-03
16
SO-16
PSUFFI~
_
PLASTIC PACKAGE
CASE 648-06
16 1
(1) Selection of the "Open Collector" configuration, in fact, selects an open collector device
with a passive pull-up load/termination which conforms to Figure 7, IEEE 488-1978
Send/Rae.
Vee
Input A
Bus Standard.
MAXIMUM RATINGS
(TA =
25 0
e unless otherwise noted)
Rating
Data A
Symbol
Value
Unit
Vee
7.0
Vdc
Power Supply Voltage
VI
5.5
Vdc
Driver Output Current
10(0)
150
Junction Temperature
TJ
150
mA
De
Input Voltage
Operating Ambient Temperature Range
TA
Storage Temperature Range
T stg
Send/Rae.
o to +70
-65 to +150
Input 0
Data D
Bus 0
Pull-Up
Enable
Input C-O
Input A-B
Bus B
De
De
Data B
Bus C
Send/Rae.
Datae
Input 8
Send/Rae.
I
TYPICAL MEASUREMENT
SYSTEM APPLICATION
Instrument
IWithAGPIB)
- T-
I
I
I
Programmable
Calculator
(With GPIB)
'nstr~ment
Bus Termination
I
(With GPIB)
TRUTH TABLE
r--I
=
Send/Ree.
I
Enable
Info. Flow
Comments
BUIlo~Dat8
x"
Don't Care
16 Lines Total
MOTOROLA LINEAR/INTERFACE DEVICES
7-67
Data --+Bul
Active Pull-Up
Data--+Bus
Open Col.
•
MC3448A
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted 4.75
v,.;;;; Vee';;;;
5.25 V and 0 < TA ,.;;; 70 o C;Wpical values are at TA = 2SoC,
Characteristic
Vee = 5.0
V)
Symbol
Min
Typ
Max
V(BUSI
VIC(BUSI
2.75
-
-
-
3.7
-1.5
0.7
-1.3
-
Unit
V
Bus Voltage
(Bus Pin Open)(VI(S/RI =0.8 VI
(I(BUSI = -12 mAl
Bus Current
mA
I(BUS)
(5.0 V " V (BUSI " 5.5 VI
(V(BUSI = 0.5 VI
(VCC = 0 V, 0 v" V(BUSI" 2.75 VI
Receiver Input Hysteresis
(VI(S/RI = 0.8 VI
-
2.5
-3.2
+0.04
-
-
-
400
600
Receiver Input Threshold
(VI(S/RI =0.8 V, Low to Highl
(VI(S/RI = 0.8 V, High to Lowl
VILH(RI
VIHLlRI
0.8
1.6
1.0
Receiver Output Voltage - High Logic State
VOH(RI
2.7
-
-
V
VOLIRI
-
-
0.5
V
.IOS(RI
-15
-
-75
mA
VIH(DI
2.0
-
-
V
0.8
V
mV
V
1.8
(VI(S/RI = 0.8 V, 10H(RI = -800 /lA, V(BUSI = 2.0 VI
Receiver Output Voltage - Low Logic State
(VI(S/RI = 0.8 V, 10LIRI = 16 mA, V(BUSI = 0.8 VI
Receiver Output Short Circuit Current
(VI(S/RI = 0.8 V, V(BUSI = 2.0 VI
Driver Input Voltage - High Logic State
(VI(S/RI = 2.0 VI
•
Driver Input Voltage - Low Logic State
VILIDI
(VI(S/RI = 2.0 VI
/lA
Driver Input Current
Data Pins
(VI(S/RI = VI(EI = 2.0 VI
(0.5" VI(DI" 2.7 VI
(VI(DI = 5.5 VI
11(01
IIB(DI
-200
-
-
-
II(S/RI
IIB(S/RI
-100
-
-
-
(0.5" VI('EI" 2.7 VI
(VI(EI = 5.5 vi
II(EI
IIB(EI
-200
-
Driver Input Clamp Voltage
VIC(DI
-
20
100
-
-1.5
V
VOH(DI
2.5
-
-
V
VOLIDI
-
-
0.5
V
10S(DI
-30
-
-120
mA
ICCL
ICCH
-
63
106
85
125
tPLH(DI
tpHLIDI
-
-
15
17
tPLH(RI
tpHLIRI
-
-
40
200
/lA
Input Current - Send/Receive
(0.5" VI(S/RI " 2.7 VI
(VI(S/RI = 5.5 VI
20
100
IlA
Input Current - Enable
(VI(S/RI = 2.0 V, IIC(DI = -18 mAl
Driver Output Voltage - High Logic State
(VI(S/RI = 2.0 V, VIH(DI = 2.0 V, VIH(EI = 2.0 V, 10H = -5.2 mAl
Driver Output Voltage - Low Logic State (Note 1)
(VI(S/RI = 2.0 V, 10LIDI = 48 mAl
Output Short Circuit Current
(VI(S/RI = 2.0 V, VIH(DI = 2.0 V, VIH(EI = 2.0 VI
mA
Power Supply Current
(Listening Mode - All Receivers On)
(Talking Mode - All Drivers On)
SWITCHING CHARACTERISTICS (VCC
= 5.0 V
TA
= 25 0 C unless otherwise noted I
ns
Propagation Delay of Driver
(Output Low to High)
(Output High to Lowl
-
ns
Propagation Delay of Receiver
(Output Low to High)
(Output High to Lowl
25
23
NOTE 1. A modification of the IEEE 488-1978 Bus Standard changes VOL(DI from 0.4 to 0.5 V maximum to permit the use of
Schottky technology.
MOTOROLA LINEAR/INTERFACE DEVICES
7-68
MC3448A
SWITCHING CHARACTERISTICS (continued) (Vcc
= 5.0 V, TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
tPHZ(R)
tPZH(R)
tPLZ(R)
tPZL(R)
-
-
30
30
30
30
tPHZ(D)
tPZHID)
tPLZID)
tpZUDI
-
-
-
-
30
30
30
30
tPOFFIE)
tPONIE)
-
-
30
20
Unit
ns
Propagation Delay Time - Send/Receive to Data
Logic High to Third State
Third State to Logic High
Logic Low to Third State
Third State to Logic Low
-
-
Propagation Delay Time - Send/Receive to Bus
ns
Logic High to Third State
Third State to Logic High
Logic Low to Third State
Third State to Logic Low
-
ns
Turn-On Time - Enable to Bus
Pull-Up Enable to Open Collector
Open Collector to Pull-Up Enable
PROPAGATION DELAY TEST CIRCUITS AND WAVEFORMS
FIGURE 1 - BUS INPUT TO DATA OUTPUT (RECEIVER)
To Scope
(Output)
~
Input
1.5 V
To Scope
tPHL~R~
tPLHIRI
+5.0 V
3'OV
240
(Input)
, . . - - - - - - - " " - ---VOH
1.5 V
Output
1N916
or Equiv.
•
tTLH = tTHL'< 5.0 ns (10-90)
Dutv Cycle = 50%
Pulse
Generator
'"Includes Jig and
Sendl
Probe Capacitance
Ree
FIGURE 2 - DATA INPUT TO BUS OUTPUT (DRIVER)
3.0 V
To Scope
(Input)
L
L--.--t----<:,~
To Scope
(Output) 2.3 V
Sendl
1.5 V
Rec
38.3
Bus
Pulse
Output
CL0130PF
• Includes Jig
and Probe Capacitance
f= 1.0 MHz
tTLH "" tTHL ~ 5.0 ns (10-90)
Pull-Up Enable
Duty Cycle
3.0 V
= 50%
FIGURE 3 - SEND/RECEIVE INPUT TO BUS OUTPUT IDRIVER)
3.0 V
To Scope
(Output)
Input
Output
High to Open
To Scope
(Input)
Pulse
Output
Low to Open
51
CL"'" 15 pF (Includes Jig and
Probe Capacitance
f= 1.0MHz
tTLH = fTHL == ~ 5.0 ns (10-90)
Duty Cycle = 50%
MOTOROLA LINEAR/INTERFACE DEVICES
7-69
MC3448A
FIGURE 4 - SEND/RECEIVE INPUT TO DATA OUTPUT (RECEIVER)
, . - - - - - - - , - - - - - 3.0 V
Input
5.0 V
OV
280
Output
High to Open
Output
Low to Open
51
CL = 15 pF (Includes Jig
f= 1.0MHz
and Probe Capacitance)
tTLH
=
tTHL =.,;;; 5.0 ns {10-90l
Duty Cycle = 50%
FIGURE 5 - ENABLE INPUT TO BUS OUTPUT (DRIVER)
•
To Scope
3.0 V
(Output)
Enablelnp~t
1.5V
1.5V
3.0V
Data
Send/Rec
tpON(E)
To Scope
480
Output
(Input)
1=
£
2~O
_ _ _..J
Pulse
Generator
51
~
OV
ctPOF~~E~
V
90%
1.0 V
f=1.0MHz
CL = 15 pF (Includes Jig
and Probe Capacitance
tTLH = tTHL = ~ 5.0 ns (10-90)
Duty Cycle"" 50%
FIGURE 6 - TYPICAL RECEIVER HYSTERESIS
CHARACTERISTICS
FIGURE 7 - TYPICAL BUS LOAD LINE
5.0
~ 4.0 -
VCC=5.0V
-TA=25'C
o
?
w
'" 3.0
:;
"
o
>
~
....
i5
2.0
~ 1.0
o
o
0.5
1.0
1.5
2.0
VI. INPUT VOLTAGE (VOLTS)
VBUS. BUS VOLTAGE (VOLTS)
MOTOROLA LINEAR/INTERFACE DEVICES
7-70
Vae
MC3448A
FIGURE 8 - SIMPLE SYSTEM CONFIGURATION
+5 V
DBJi
T/R 1
Dd
Data
T/R 2
EOi
EOI
SRO
DB7
07
R/iN
R/W
RS~
All
SRO
RS2
~
Address
MC6802
OR
MC6800
MPU
0
E
,
•
REN
.
REN
~0
Ill:'
A15
IFC
IFC
ATN
ATN
IRO
l
III
:J
III
Ie
01
"...'w"
,
!.r~
II
DAC
NRFD
RFD
DAV
DAV
.0
Ill];
w
!!'
IRO
MC6B4B8
GPIA
t--------~
0101
I
iB1
IB1
IB2
IB3
IB4
NOTE 1: Although the MC3448A transceivers
are non-inverting, the 488-1978 bus call outs
appear inverted with respect to the MC68488
IB5
pin designations. This is because the 488-1978
IB6
Standard is defined for negative logic, while
all M6BOO MPU components make use of
positive logic format.
IB7
NOTE 2: Unless proper considerations are
provided. it is recommended that the pull-up
enable pins on the MC3448As be grounded,
selecting the open-collector mode.
Trig
-=
MOTOROLA LINEAR/INTERFACE DEVICES
7-71
®
MC3450
MC3452
MOTOROLA
Specifications and Applications
Information
QUAD LINE RECEIVERS
WITH COMMON THREE·STATE
STROBE INPUT
SILICON MONOLITHIC
INTEGRATED CIRCUITS
QUAD MTTL COMPATIBLE
LINE RECEIVERS
•
The MC3450 features four MC75107 type active pullup line
receivers with the addition of a common three-state strobe input.
When the strobe input is at a logic zero, each receiver output state is
determined by the differential voltage across its respective inputs.
With the strobe high, the receiver outputs are in the high impedance
state.
The MC3452 is the same as the MC3450 except that the outputs
are open collector which permits the implied "AND" function.
The strobe input on both devices is buffered to present a strobe
loading factor of only one for all four receivers and inverted to
provide best compatability with standard decoder devices.
• Receiver Performance Identical to the Popular
MC75107/MC75108 Series
• Four Independent Receivers with Common Strobe Input
• Implied "AND" Capability with Open Collector Outputs
• Useful as a Quad 1103 type Memory Sense Amplifier
DSUFFIX
,
PLASTIC PACKAGE
CASE 7518-03
16
SO-16
1
JI/ffJ,_
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
CONNECTION DIAGRAM
FIGURE 1 - A TYPICAL MOS MEMORY SENSING APPLICATION FOR A
4·K WORD BY 4-BIT MEMORY ARRANGEMENT EMPLOYING
1103 TYPE MEMORY DEVICES
DATA BIT #4
TRUTH TABLE
INPUT
200
VIC ;;.
200
DATA BIT OUTPUT ><2
18k
OUTPUT
STROBE MC3450 MC3452
H
L
H
-25 mV"
VI0,,+25 mV
L
I
I
H
Z
Off
VIO"
-25 mV
L
H
L
Z
Off
Z
L == Low Logic State
H = High Logic State
200
Z "" Third (High Impedance) State
Only four MC3450 devices are required for a
4-k word by 1 E)..bit memory system.
I "" Indeterminate State
MOTOROLA LINEAR/INTERFACE DEVICES
7·72
Off
Off
+25 mV
L
MC3450, MC3452
MAXIMUM RATINGS (TA = 0 to +7rf'c unless otherwise noted.1
Rating
Symbol
Value
VCC,VEE
±7.0
Vdc
Differential-Mode Input Signal Voltage Range
VI DR
±6.0
Vdc
Common-Mode Input Voltage Range
VICR
±5.0
Vdc
Strobe I nput Voltage
VI(SI
5.5
Vdc
1000
6.6
mW
mW/oC
1000
6.6
mW
mWf'C
o to +70
°c
-65 to +150
°c
Power Supply Voltages
Power Dissipation (Package Limitation)
Ceramic Dual I n-Line Package
Unit
PD
Derate above T A = +250 C
Plastic Dual r n-Line Package
Derate above T A = +250 C
Operating Temperature Range
TA
T stg
Storage Temperature Range
RECOMMENDED OPERATING CONDITIONS (TA
Characteristic
= 0 to +7rf'C unless otherwise noted I
Symbol
Min
Typ
Ma.
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Vdc
-
-
Power Supply Voltages
Output Load Current
10L
Differential-Mode I nput Voltage Range
Common-Mode Input Voltage Range
VIDR
-5.0
VICR
-3.0
VIR
-5.0
I nput Voltage Range (any input to Ground)
ELECTRICAL CHARACTERISTICS (VCC
= +5 0 Vdc VEE = -5 0 Vdc TA = 0 to
+700 C
16
rnA
+5.0
Vdc
+3.0
Vdc
+3.0
Vdc
unless otherwise noted I
MC3450
MC3452
Symbol
Fig.
Min
Typ
Ma.
Min
Typ
Ma.
Unit
High Level Input Current to Receiver Input
IIH(l1
7
-10
-
"A
8
-
75
IIL(II
-
75
Low Level Input Current to Receiver Input
-
-10
"A
High Level I nput Current to Strobe Input
VIH(SI = +2.4 V
VIH(SI = +5.25 V
IIH(SI
5
-
-
-
40
1.0
mA
-
-
-1.6
rnA
-
Vdc
-
250
0.5
"A
Vdc
-
rnA
-
45
60
"A
rnA
-17
-30
rnA
Characteristic
-
-
40
1.0
IIL(SI
5
-
-
-1.6
VOH
3
2.4
High Level Output Leakage Current
ICEX
3
Low Level Output Voltage
VOL
3
-
-
lOS
6
-18
9
4
-
-
-70
loff
45
60
-17
-30
Low Level Input Current to Strobe Input
VI H(SI = +0.4 V
High Level Output Voltage
Short~Circuit
Output Current
Output Disable Leakage Current
High Logic Level Supply Current from VCC
High Logic Level Supply Current from VEE
SWITCHING CHARACTERISTICS (VCC
ICCH
4
IEEH
=+5 0 Vdc
VEE
= -5 0
0.5
40
-
Vdc TA = +2SoC unless otherwise noted I
MC3450
Characteristic
IlA
MC3452
Symbol
Fig.
Min
Typ
Ma.
Min
Typ
Ma.
Unit
High to Low Logic Level Propagation Delay
Time (Differential Inputs)
tPHL(OI
10
-
-
25
-
-
25
ns
Low to High Logic Level Propagation Delay
Time (Differential Inputs)
tPLH(DI
10
-
-
25
-
-
25
ns
Open State to High Logic Level Propagation
Delay Time (Strobel
tpZH(SI
11
-
-
21
-
-
-
ns
High Logic Level to Open State Propagation
Delay Time (Strobel
tPHZ(SI
11
-
-
18
-
-
-
ns
Open State to Low Logic Level Propagation
Delay Ti me (Strobe)
tpZL(S)
11
-
-
27
-
-
-
ns
Low Logic Level to Open State Propagation
Delay Time (Strobel
tPLZ(SI
11
-
-
29
-
-
-
ns
High Logic to Low Logic Level Propagation
Delay Time (Strobel
tPHL(SI
12
-
-
-
-
-
25
ns
Low Logic to High Logic Level Propagation
Delay Time (Strobe)
tPLH(SI
12
-
-
-
-
-
25
ns
MOTOROLA LINEAR/INTERFACE DEVICES
7-73
•
MC3450, MC3452
FIGURE 2 - CIRCUIT SCHEMATIC
(1/4 Circuit Shown)
VccO---~---1~-----t-----1~------~----------~------~--------~-'
850
4k
'90
850
1.6 k
t--t-------oOUTPUT
r---~--~~---r--------~~~----4-_t-----4roGND
'--_-'----"STROBE
4 k
4 k
Dashed components apply to the MC3450 circuit only.
TEST CIRCUITS
FIGURE 3 - ICEX. VOH. AND VOL
•
1-<""---__ +4.75
V, .....-------'-<:>--1
V
V2 .....-------::<>-1
TEST TABLE
+0.8 V .....+------"--j
VI
f-<:""t-l-..... -4.75 V
V3 .....~.----"<>-1
V2
V3
V4
MC3450 MC3452 MC345Q MC3452 MC3450 MC3452 MC34S0 MC3452
\1
VOH~·~'·~9'~5~V+----t~~+---_t~~+---_t~.3~.O~V-+--~
V4 .....+-H~.!.o-l
ICEX~--_t~~t----t~~+---_t_·3~.O~V-t----t-.3~.O~V-t----~
Vo' ~..:':~"'~~:"5V:"V+..:':~"'~~:"5V:"V+·",2",.9':.::5c.:V+.",2",.9':.::5c.:Vt-::.'::.:-t-"'-=:"+":;;:""'+=':'-1 -16 mA
(MC3452)
+5.25V~
Channel A shown under test. Other channels are tested similar IV.
'CEX
I,~
(MC3450)
FIGURE 5 -IIH(S) AND IIL(S)
FIGURE 4 - ICCH AND IEEH
+3.0 V .....~-------------------,
8>--..... +5.25 V
B>-~..... +3.0V
+5.25 V
8>-1-+__ -5.25
-5.25 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-74
V
MC3450, MC3452
TEST CIRCUITS (continued)
FIGURE 6 - lOS
. FIGURE 7 - IIH
!-'-'<0>---4+5.25 V
V,
---+-<>-:;.i
+25 mV ....
+0.8
~<>--1H--4+3.0 V
v -+---+-o-:;.i
1-:<>---4+5.25 V
Vl - 2.0 V ....+-...,.--<>-'''1
+3.0
!-'-'<<>-1H--4-5.25 V
V-+--+--0-''1
F<>-lH--4-5.25 V
Channel A shown under test, other channels are tested similarly.
Only one output shorted at a time.
Channel A(-) shown under tnt, other chennels are tested
Similarly. Device, are tested with V1 from +3.0 V to -3.0 V.
FIGURE 8 - IlL
FIGUR E 9 - loff
,----"6
V1 - 2.0 V
+3.0 V _ -.....--<>-''-j
1'-'<>----4+5.25 V
1:':9---.. +6.26 V
V'_+-.--o-::-i
+---+--o-''1
+2.0
+3.0 V ....
Channel
AC-l
F<>4-+-- -5.25
V_t--++-<>-,"!
r<>-tH-4-5.25 V
V
shown under test, other channels are tested
Output of Channel A shown under test, other outputs are
tested similarly for V1 = 0.4 V and +2.4 V.
similarly" Devices are tested with Vl from +3.0 V to -3.0 V.
FIGURE 10 - RECEIVER PROPAGATION DELAY tpLH(D) AND tpHL(D)
+5.0 V
--...,.--<>-'-1
+100 mV ....
El n
200mV~----50%
OV
t:~~(_~~____tPHL(OI
EO
1.5 V
VOL
Ein waveform charact.... istic.:
tTLH and tTHL::S;;; 10 ns measured 10% to 90%
PRR '" 1.0 MHz
Output of Channel B shown under test, other channels are tested similarly,
Duty Cycle
51 at "A" for MC3452
51 at "B" for MC3450
CL = 15 pF total for MC3452
CL = 50 pF total for MC3450
MOTOROLA LINEAR/INTERFACE DEVICES
7-75
:= 500 ns
MC3450, MC3452
TEST CIRCUITS (continued)
FIGURE 11 - STROBE PROPAGATION DELAY TIMES tpLZ(S)i t~ZL(S) tpHZ(S) and tPZH(S)
+5.0 V
VI
V2
51
52
tpLZ(S)
100mV
Closed
Closed
15 pF
tPZL(S)
100mV
GNO
GNO
Closed
Open
50 pF
tpHZ(S)
GNO
GNO
100mV
Closed
Closed
15 pF
100mV
Open
Closed
50 pF
81
01
1N916
or equiv
1k
tPZH{S)
CL
CL includesjig and probe capacitance.
Ein waveform characteristics:
tTLH and tTHL ~10 ns measured 10% to 90%.
82
!
Output of Channel B shown und8f" test,
other channels are tested similarly.
•
tPLZ(S)
P'RR=1.0MHz
~::---t"'''' .
tPHZ(S)'{""
.-_--~1.5V
.
Duty Cycle'" 50%
EO
VOWO.5 V
. ""'.5 V
tPZL(S){
Ein 3'::~
3·0V
E In
tpZH(S) {
5.0V- VD ,
EO
1.5 V
V
--+' - T - - -
EO
VOL--------~---
FIGURE
°
VOH _____ . _
l2 -
""OV
STROBE PROPAGATION DELAY tPLH(S) AND tpHL(S)
+5.0 V
Ein
+100
mV"'---+-o-!-i
+3'OV~----50%
OV
~~L:~(~____
tpHL(S)
390
EO
R>--jH-e-5.0 V
1.5 V
VOL
15 pF
J(Totali
Eln waveform characteristics:
tTLH and tTHL ~ 10 ns measured 10% to 90%
PRR "" 1.0 MHz
Duty Cvcle = 500 ns
Output of Channel B shown under test, other channels are tested similarly.
MOTOROLA LINEAR/INTERFACE DEVICES
7-76
MC3450, MC3452
APPLICATIONS INFORMATION
FIGURE 13 - IMPLIED "AND" GATING
FIGURE 14 - BIDIRECTIONAL DATA TRANSMISSION·.
<"Vref
500
~-+-(>+-1
+5.0 V
I
-+----+-<>+-I
DATA
LINES
DATA BUS __
+5.0 V
I
'80
ADOR ESS BUS
----4--+-<>+-1
+5.0 V
DATA
OUTPUT
MC3450
390
'80
390
9.
I
MC3~0
390
STROBE
-+--_-+-<>+-i
---!-o---. CO NT A 0
CONTROL BUS __
*
L
I
390
-0-
I
MC3450
1
MC3452
I
J=::
MC3450
-------+-<>+:}L-1_ _ _ _ _ _ _ -.J: -T".om,,' of 0"",
de
Equipment Corp.
TO ADDITIONAL
RECEIVERS
The MC3450/3452 can be used for single-ended as well as
differential line receiving. For single-ended line receiver applIcations, such as are encountered in minicomputers, the·.eonfiguration shown in Figure 15 can be used. The voltage source,
which generates Vref, should be designed so that the Vref
voltage is halfway between VOH(min) and VOL(max). The
maximum Input overdrive required to guarantee a given logic
state is extremely small, 25 mV maximum. This low-input overdrive ennanees differential noise immunity. Also the high·input
impedance of the line receiver permits many receivers to be
placed on a single line with minimum load effects.
Q1 IQ2 03 0"
X
Al
A2
y
1/2 MC4007
CIRCUIT
I
MOTOROLA LINEAR/INTERFACE DEVICES
7-77
I
:::::
MC3450, MC3452
APPLICATIONS INFORMATION (continued)
FIGURE 17 - PARTY·LlNE DATA TRANSMISSION SYSTEM
WITH MULTIPLEX DECODING
~ROBE
..i>.
MC3453
INPUTS
STROBE
DATA
OUTPUTS
STROBE ' - - - -
,-L..
~
DATA
DATA
MC3453
INPUTS
OUTPUTS
J>
'---
•
r---
~
DATA
MC3453
INPUTS
OUTPUTS
STROB~
r---
~
OATA
INPUTS
MC3453
OUTPUTS
'~ ~
'r---
r--
Ql
Q2
L.-o
~
~
2/3
MC7404
CIRCUIT
ro~
ro-
1/2
X
MC4007
CIRCUIT
r-<;-
~
Al
A2
Al
MOTOROLA LINEAR/INTERFACE DEVICES
7-78
A2
®
MC3453
MOTOROLA
MTTL COMPATIBLE QUAD LINE DRIVER
QUAD LINE DRIVER WITH
COMMON INHIBIT INPUT
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3453 features four SN75110 type line drivers with a
common inhibit input. When the inhibit input is high, a constant
output current is switched between each pair of output terminals
in response to the logic level at that channel's input. When the
inhibit is low, all channel outputs are nonconductive (transistors
biased to cut-off). This minimizes lo.ading in party-line systems
where a large number of drivers share the same line.
• Four Independent Drivers with Common Inhibit Input
• -3.0 Volts Output Common-Mode Voltage Over Entire
Operating Range
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
• Improved Driver Design Exceeds Performance of
Popular SN7511 0
FIGURE 1 - PARTY-LINE DATA TRANSMISSION SYSTEM WITH
MULTIPLEX DECODING
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
CONNECTION DIAGRAM
Vee
y
INPUT B
OUTPUT A
y
Z
OATA
OUTPUT B
'''PUTS
Z
OUTPUT C
Z
Z
Y
OUTPUT 0
Y
INPUT 0
O"IA
'NPUT$
TRUTH TABLE
(positive logic)
INHIBIT
INPUT
H
H
On
Off
On
MOTOROLA LINEAR/INTERFACE DEVICES
Z
Y
L
H
Off
H
L
Off
Off
L
L
Off
Off
L "" Low Logic Level
H = High Logic Level
7-79
OUTPUT
CURRENT
LOGIC
INPUT
MC3453
MAXIMUM RATINGS (TA = Oto +700 e unless otherwise noted)
Power Supply Voltage
Symbol
Value
Unit
Vee
VEE
+7.0
-7.0
Volts
Vin
5.5
Volts
VOeR
-5.0 to +12
Volts
1000
6.6
mW
mw/oe
Logic and Inhibitor Input Voltages
Common~Mode
Output Voltage Range
PD
Power Dissipation (Package Limitation)
Plastic and Ceramic Dual In~line Packages
Derate above T A = +25 0 C
Operating Ambient Temperature Range
TA
o to +70
ue
Storage Temperature Range
T stg
-65 to +150
°e
Plastic and Ceramic Dual In-Line Packages
RECOMMENDED OPERATING CONDITIONS (See Notes 1 and 2)
Characteristic
Power Supply Voltages
Common-Mode Output Voltage Range
Symbol
Min
Nom
Max
Unit
Vee
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Volts
0
0
-
+10
-3.0
Volts
VOeR
Positive
Negative
,Notes: 1. These voltage values are in respect to the ground terminal.
2. When not using all four channels, unused outputs must be grounded.
DEFINITIONS OF INPUT lOGIC lEVELS'
Characteristic
High-LevellnpUl Voltage (at any input)
•
Low·Level Input Voltage (at any input)
*The algebraic convention, where the most positive limit is designated maximum. is used with Logic Level Input Voltage Levels only.
ElECTR ICAl CHARACTERISTICS (T A
= 0 to +700 e unless otherwise noted)
Symbol
Characteristic##
High-Level Input Current (Logic Inputs)
(Vee = Max, VEE ~ Mbx, VI H L = 2.4 V)
(Vee = Max, VEE = Max, VIHL = Vee Max)
IIHL
Low·Levellnput Current (Logic Inputs)
(Vee = Max, VEE = Max, VILL =0.4 V)
IILL
High-Level Input Current (Inhibit Input)
(Vee = Max, VEE = Max, VIHI ~ 2.4 V)
(Vee = Max, VEE = Max, VIH ~ Vee Max)
IIHI
Low·Levellnput Current (Inhibit Input)
IILI
Min
Typ#
Max
Unn-
-
-
-
-
40
1.0
"A
mA
-1.6
rnA
-
-
-
-
40
1.0
"A
rnA
-
-
-1.6
mA
-
11
11
15
6.5
(Vee = Max, VEE = Max, VI LI = 0.4 V)
Output Current ("on" state)
(Vee = Max, VEE = Max)
(Vee = Min, VEE = Min)
10(on)
Output Current ("ott .. state)
(Vee = Min, VEE = Min)
10(011)
-
5.0
100
"A
lee(on)
-
35
50
mA
65
90
mA
Supply Current from Vec (with driver enabled)
rnA
-
(VILL = 0.4 V, VIHI = 2.0 V)
Supply Current fr.om VEE (with driver enabled)
(VILL = 0.4 V, VIHI = 2.0 V)
IEE(on)
Supply Current from Vee (with driver inhibited)
lee(off)
-
35
50
mA
IEE(off)
-
25
40
mA
(VILL = 0.4 V, VILI = 0.4 V)
Supply Current from VEE (with driver inhibited)
(VI LL = 0.4 V, VI LI = 0.4 V)
#AII typical values are at Vee = +5.0 V, VEE = -5.0 V, TA = +250 e.
##for conditions shown as Min or Max. use the appropriate value specified under recommended operating
conditions for the applicable device type.
Ground unused inputs and outputs.
MOTOROLA LINEAR/INTERFACE DEVICES
7-80
MC3453
SWITCHING CHARACTERISTICS (Vcc ~ +5.0 V, VEE ~ -5.0 V, TA ~ +25 0 C.)
Symbol
tPLHL
tPHLL
Characteristic
Propagation Delay Time from logic Input to
Output Y or Z (RL
~
50 ohms, CL
~
40 pF)
~
50 ohms, CL
~
Max
Unit
17
-
9.0
ns
17
16
-
20
25
25
tPLHI
tPHLI
Propagation Delay Time from Inhibit Input
to Output Y or Z (RL
Typ
9.0
Min
40 pF)
FIGURE 2 - LOGIC INPUT TO OUTPUTS PROPAGATION
DELAY TIME WAVEFORMS
ns
FIGURE 3 - INHIBIT INPUT TO OUTPUTS PROPAGATION
DELAY TIME WAVEFORMS
3.0 V
INHIBIT
INPUT
OV
..
OUTPUT
V
OUTPUT Z
OV
TEST CIRCUITS
FIGURE 5 - INHIBIT INPUT TO OUTPUT PROPAGATION
DELAY TIME TEST CIRCUIT
FIGURE 4 - LOGIC INPUT TO OUTPUT PROPAGATION
DELAY TIME TEST CIRCUIT
Vee
Ejn to Scope
= +5.0
Vcc
V
Output
to
50r---1'---<>-1
_-='--,
3
50
Output
V
SCOT
...
I
2
tTHL
~10ns
~
40 pF
(total)
4
Z
=
t--""N-<~>-i
MC3453
... y
.....J
to
Z
Scope
50
50
8
9
VEE
Ein
tTLH "" tTHL
~10 ...
--5.0
V
1k
Channel A shown under test, the other
channels are tested similarly.
Channel A shown under test, the other
channels are tested similarly.
MOTOROLA LINEAR/INTERFACE DEVICES
7-81
+5.0 V
MC3453
FIGURE 6 - CIRCUIT SCHEMATIC
(1/4 Circuit Shown I
VCCo-----~--------~~--_.------~--~------------_.----~
To Remainder
of Quad
SINGLE DR IVER
Outputs
VEE O-----------------------------~--~--_4--_*----------
•
VCC
COMMON
VEE
INHIBIT
COMMON
LEVEL SET
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
7-82
__
To Remainder
of Quad
®
MC3467
MOTOROLA
TRIPLE MAGNETIC TAPE
MEMORY PREAMPLIFIER
TRIPLE WIDEBAND PREAMPLIFIER
WITH ELECTRONIC GAIN CONTROL (EGC)
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3467 provides three independent preamplifiers with individual electronic gain control in a single 18-pin package, Each preamplifier has differential inputs and outputs allowing operation in
completely balanced systems, The device is optimized for use in gtrack magnetic tape memory systems where low noise and low distortion are paramount objectives.
The electronic gain control allows each amplifier's gain to be set
anywhere from essentially zero to a maximum of approximately
100VIV,
PSUFRX
PLASTIC PACKAGE
707-02
• Wide Bandwidth - 15 MHz (Typ)
• Individual Electronic Gain Control
• Differential Input/Output
TYPICAL APPLICATION
HIGH PERFORMANCE 9·TRACK OPEN REEL
TAPE SYSTEM
NRZI/t/>
VJ(EGC)
Input {
2
Select
Active
Differentiator
Input { 4
T
A
P
E
Input{ 7
Formatter
MC8500
MC850'
MC8502
MC8520
MOTOROLA LINEAR/INTERFACE DEVICES
7-83
L SUFFIX
CERAMIC PACKAGE
CASE 726-04
MC3467
MAXIMUM RATINGS (TA = 25°C unless otherwise noted.l
Rating
Symbol
V.lue
Negative Supply Voltage
VCC
VEE
6.0
-9.0
EGC Voltage. (Pin. I, 6 and 131
Unit
Power Supply Voltages
V
Positive Supply Voltage
VI(EGCI
-5.0 to Vce
V
Input Differential Voltage
VIO
±5.0
V
Input Common-Mode Voltage
VIC
±5.0
V
Amplifier Output Short Circuit
Duration fto Ground)
tsc
10
•
Operating Ambient Temperature Range
TA
o to +70
°c
Storage Temperature Range
T stg
-65 to +150
°c
TJ
+150
°e
Junction Temperature
ELECTRICAL CHARACTERISTICS (Vee
=5.0 V, VeE = -6.0 v, f =
Characteristic
= 0 to +700 C unless otherwise noted.1
Min
Typ
Ma.
Unit
VeCR
VEER
VI(EGCI
4.75
-5.5
0
5.0
-6.0
5.25
-7.0
-
VCC
V
V
V
AVO
85
100
120
v/v
AVO
-
0.5
2.0
V/V
Maximum Input Differential Voltage
(Balanced I (T A = 25 0 el
VIDR
0.2
-
-
Vpp
Output Voltage Swing (Balancedl (Figure 11
(ei = 200 mV p-p)
VOR
6.0
8.0
-
Vpp
Power Supply Voltage Range
Positive Supply Voltage
Negative Supply Voltage
Operating EGC Voltage
•
100 kHz, TA
Symbol
Differential Voltage Gain (Balanced)
(VI(EGCI
= 0, ei = 25
mVp-pl
(See Figure 11
Differential Voltage Gain
(VI(EGCI
= Vce l
VICR
±1.5
±2.0
-
V
Differential Output Offset Voltage
(TA = 25°C)
VOOD
-
500
-
mV
Common-Mode Output Offset Voltage
VOOC
-
500
-
mV
Input Common-Mode Range
(TA
= 25°C)
Common Mode Rejection Ratio (Figure 2)
VI(EGC) = 0, VCM
(f = 100 kHz)
(f = 1.0 MHz)
eMRR
Small-Signal Bandwidth (Figure 1)
(-3.0 dB, ei
dB
= 1.0 Vpp
BW
60
40
100
100
-
10
15
-
MHz
= 1.0 mVp-p, T A = 25°C)
Input Bias Current
liB
-
5.0
15
J1.A
Output Sink Current (Figure 5)
10$
1.0
1.4
-
mA
en
-
3.5
-
"VRMS
Positive Power SupplV Current (Figure 4)
ICC
-
30
40
mA
Negative Power Supply Current (Figure 4)
lEE
-
-30
-40
mA
r;
12
25
-
kn
ei
-
2.0
-
pF
ro
-
30
-
Ohm.
Differential Noise Voltage Referred to Input (Figure J)
(VI(EGC)
= 0, RS = 50 n, BW = 10 Hz to
Input Resistance
I nput Capacitance
1.0 MHz, T A
= 250 CI
= 25°C)
(TA = 25°C)
(TA
Output Resistance (Unbalanced)
(TA
= 25 0 el
MOTOROLA LINEAR/INTERFACE DEVICES
7-84
MC3467
FIGURE 1 - DIFFERENTIAL VOLTAGE GAIN,
BANDWIDTH AND OUTPUT VOLTAGE SWING
TEST CIRCUIT
~Chal'lnel A under test, other channels tested similarly)
FIGURE 2 - COMMON-MODE REJECTION RATIO
(Channel A under test, other amplifiers tested similarlv~
5.0 V
5.0 V
18
18
.,
17
16
17
1-'~6D-_""'Voo
·2
eo"" e, - e2
MC3467
MC3467
13
CMAA == 20 log \(00
AV VI
13
== 20 log
VOO
100 VI
10
10
-6.0 V
-6.0 V
FIGURE J - DIFFERENTIAL NOISE VOLTAGE
REFERRED TO THE INPUT
FIGURE 4 - POWER SUPPL Y CURRENT TEST CIRCUIT
Vee
5.0 V
•
KrohnHite
3202
Filter
51
51
hp
3400A
Low Pass
Filter With
BW == 1.0 MHz
Assume Uncorrelated Noise Sources
-6.0 V
en (Differential Noise at Input) == eo .J2/100
FIGURE 6 - TOTAL HARMONIC DISTORTION
TEST CIRCUIT
(Channel A under test, other channels tested similarly)
FIGURE 5 - OUTPUT SINK CURRENT TEST CIRCUIT
(Channel A under test. other channels tested similarly)
+5.0 V
+2.0 V
5.0 V
-6.0 V
-6.0 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-85
•
MC3467
TYPICAL CHARACTERISTICS
(Vee ~ S.OV. VEE =-6.0 V. TA Z 250 unleH otherwise noted)
FIGURE 7 - TOTAL HARMONIC DISTORTION (THDI
...... INPUT VOLTAGE
FIGURE 8 - NORMALIZED VOLTAGE GAIN
....... FREQUENCY
10
~
z
0
ii:0
!!i0
'"'z0
ill
.
:::!
+5.0 .---'-'-'TTTT11r--,-,.."rnnr-'-'-TTnTTI
o
8. 0
W
N
::;
Av '30
VI(EGCl' 1.8 V
11'100 kHz
6. 0
(See Figure 61
./
4. 0
~
b
l-
2. 0
e"
or
I-
-
~
r--
V
V
o
5lJ
-5.0
f----+-+++++t+t--+-+-Hitttti'-----''I'<.",.t-1-tTrtH
z
z
-10
f----,+-+-++++ttf--t--+-f+ttttt-t-+I\Tiiiffi
;;'
to
W
to
./
~
o
>
]
I--
o
~
o
;;
100
150
200
250
1.0
0.1
FIGURE 9 - NORMALIZED VOL TAGE GAIN
versus AMBIENT TEMPERATURE
100
10
I. FREUUENCY (MHz)
VI. INPUT VOLTAGE (mVp.pl
FIGURE 10 - NORMALIZED POSITIVE POWER SUPPLY
CURRENT .ersus POSITIVE POWER SUPPLY VOLTAGE
1.04
VEE' -6.0
VI' 10 mV ...•.• --f---+-1.0;1I-----1--+--t- 11'100 kHz
a~
1.02
>
~o
G.w
G. N
~~
ffi
~ 1.00
VEE - 6.0 V
TA'250C
-f"ICC ITI
n 'ICC (25 0CI - t - - TEST CIRCUIT· FIGURE 4
3'"
00
G.z
w-
>
~
0.98
~
~
0.96
4.75
4.8
4.85
4.9
4.95
5.0
5.05
5.1
5.15
5.2
FIGURE 11 - NORMALIZED NEGATIVE POWER SUPPLY
CURRENT versus NEGATIVE POWER SUPPLY VOLTAGE
FIGURE 12 - NORMALIZED POWER SUPPLY CURRENTS
.ersus AMBIENT TEMPERATURE
1.04
1.02
~
V- I-8
0.96
-5.0
5.5
-6.0
V
I--'""
1
..-
V
./
0
VCC' 5.0 V
TA'25OC
lEE (TI
n 'IEE (250CI
TEST CIRCUIT' FIGURE 4
9
0.98
6.5
5.25
VCC. POSITIVE POWER SUPPLY VOLTAGE (Vdcl
TA. AMBIENT TEMPERATURE (OCI
7.0
7.5
L
o
V
10
t-- I--VCC' 5.0 V
VEE' -6.0 V
ICC (TJ
lEE (TJ
n 'ICC (250CI'IEE (250Cj-
L
SEE FIGU'RE 4
_
FOt TEST C1IRCUIT
20
30
40
50
TA. AMBIENT TEMPERATURE (OCI
VEE. NEGATIVE POWER SUPPLY VOLTAGE (Vdcl
MOTOROLA LINEAR/INTERFACE DEVICES
7-86
60
70
80
MC3467
u.
FIGURE 13 - DIFFERENTIAL VOLTAGE GAIN .....
ELECTRONIC GAIN CONTROL VOLTAGE (VICEGC))
100
"'
FIGURE 14 - COMMON-MODE REJEC-';'ON RATIO
(CMRR) ..nuo FREQUENCY
-..... ~
~
\
\
0
..
0
~
\
'"
z
1.0
1.5
-
VICM' 1.0 Vp•p
"
TEST CIRCUIT' FIGURE 2
2.0
8'"
---
2.5
~.
-40
~
~
3.0
3.5
4.0
1.0
0.1
FIGURE 16 - TYPICAL EGC INPUT CURRENT ..,.us
EGC INPUT VOLTAGE
FIGURE 15 - PHASE SHIFT versus FREQUENCY
--
-40
ffic
4.0
:<
.§:
....
-80
\
~ -120
\
~
~
3.0
~
2.0
V
./
~
'-'
!:I
ffi
ci
'"<>
a.. -200
~
-240
10
1.0
1.0
o
100
/- '
---
....
w -160
-300
0.1
100
10
I, FREQUENCY (MHz)
VI(EGC), ELECTRONIC GAIN CONTROL VOLTAGE (VOLTS)
~_
AV'100V/v'40d8
~
"\
"'-.
0.5
Vo
CMRR • 20 IDg AV VICM
VCC' 5.0 V
VEE' -S.O V
"'
"" -so t-- TA' 25DC
ci
>
o
o
r--
~ -80
\
V
,./
o
V
V
VCC' 5.0 V
VEE' -S.OVTA·25 DC
--
V
2.0
1.0
/'
4.0
3.0
VI(EGC), EGC INPUT VOLTAGE (Vdc)
I, FREQUENCY (MHz)
REPRESENTATIVE CIRCUIT SCHEMATIC
1/3 MC3467
r---~~~-~-~~~-~r-~-~-----~-~~r--T----~----~VCC
Outputs
Inputt
o-t---t--{
01
EGC
Rl
Input
02
VEEO-------------------~--____~---_4_~---~-----~-~~~~
MOTOROLA LINEAR/INTERFACE DEVICES
7-87
____
~~-"
5.0
II
®
MC3469P
MOTOROLA
Specifications and Applications
Information
FlOPPY DISK
WRITE CONTROLLER
flOPPY DISK WRITE CONTROLLER
The MC3469 is a monolithic WRITE Current Controller designed
to provide the entire interface between floppy disk heads and the
head control and write data signals for stradle-erase heads.
Provisions are made for selecting a ra nge of accurately controlled
write currents and for head selection during both read and write
operation. Additionally, provisions are included for externally adjusting degauss period and inner/outer track compensation.
•
•
Head Selection - Current Steering Through Write Head and
Erase Coil in Write Mode
•
Provides High Impedance (Read Data Enable) During Read Mode
•
Head Current (Write) Guaranteed Using Laser Trimmed Internal
Resistor (3.0 mA using Rext ~ 10 kll)
•
IRW Select Input Provides for Inner/Outer Track Compensation
•
Degauss Period Externally Adjustable
•
Specified With ±1 0% LogiC Supply and Head Supply (VSS) from
10.8 V to 26.4 V
•
Minimizes External Components
SILIcON MONOLITHIC
INTEGRATED CIRCUIT
1
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
PIN CONNECTIONS
BLOCK DIAGRAM
Center
Vref
R WI R W2
Tap'
'ref
VBB
6
Center
Gnd
5
Select
4
13
11
IRWS
8
Select
Enable
14
Current
Select
16
WG
Eli
El
CT0
'Ga'ie
Erase j1
Write
'DaiB
Coil
R/W2
I,ef
11
ErTse1
Vee
IRW
Select
Head
CT1
HS
MOTOROLA LINEAR/INTERFACE DEVICES
7-88
Gnd
R/WI
9
Vref
Tap ji1
'Viirite
Toggle
Select
MC3469P
ABSOLUTE MAXIMUM RATINGS (TA; 25°e)
Symbol
Value
Unit
Power Supply Voltage (Pin 10)
Vee
7.0
Vdc
Power Supply Voltage (Pin 15)
Vaa
30
Vdc
VI
5.75
Vdc
Tstg
-55 to +150
°e
TJ
150
°e
Rating
Input Voltage (Pins 4, 5, 8, 9)
Storage Temperature
Operating Junction Temperature
RECOMMENDED OPERATING CONDITIONS
Symbol
Value
Unit
Power Supply Voltage (Pin 10)
Rating
Vee
+4.5 to +5.5
Vdc
Power Supply Voltage (Pin 15)
Vaa
+10.8 to +26.4
Vdc
TA
o to +70
°e
Operating Ambient Temperature Range
ELECTRICAL CHARACTERISTICS (TA ;Oto+70oe, Vee;4.5to 5.5 V, Vaa; 10.8t026.4 V unless otherwise noted. Typicalsgiven
for Vee; 5.0 V, Vaa; 12 V and TA; 25°e unless otherwise noted.)
Characteristics
DIGITAL INPUT VOLTAGES
Power Supply eurrent - Vee
Vaa
lee
laa
-
22
15
50
30
mA
High Level Input Voltage
(Vee; 4.5 V)
4,8,9
VIH
2.0
-
-
V
Low Level Input Voltage
4,8,9
VIL
-
-
0.8
V
4,5,8,9
VIK
-
-0.87
-1.5
V
5
VT(+)
1.5
1.75
2.0
V
5
VT(_)
0.7
0.98
1.3
V
0.2
0.4
-
-
0.76
-
-
0.1
40
-
-
-1.6
0.36
0.76
0.46
0.39
-
(Vee; 5.5 V)
Input elamp Voltage
(11K; -12 rnA)
Positive Threshold
(Vee; 5.0)
Negative Threshold
(Vee; 5.0)
Hysteresis (VT(+) - VT(_))
TA; ooe to +70 oe
TA; 25°e
V
VHTS
DIGITAL INPUT CURRENTS
High Level Input eurrent
(Vee; 5.5 V, Vaa; 26.4 V, VI; 2.4 V)
4,5,8,9
IIH
Low Level Input Current
4,5, a, 9
IlL
(Vee; 5.5 V, Vaa; 26.4 V, TA; 25°e unless
noted below)
Vaa; 12 V
Vaa; 24 V
Vee; 5.0V
Vee;5.0V
4
4
5
B,9
mA
-
MOTOROLA LINEAR/INTERFACE DEVICES
7-89
pA
-
..
MC3469P
i
ELECTRICAL CHARACTERISTICS (continued) (TA ° Oto+70oC, Veeo4.5 t05.5 V, VSSo 10.8 to 26.4 V unless otherwise noted.
Tvpicals given for Vee 05.0 V, Vse 012 V and TA ° 25°e unless otherwise noted.)
Characteristics
Symbol
CENTER-TAP and ERASE OUTPUTS
Output High Voltage (See Figure 9)
(IOH ° -100 mA. Vee ~ 4,5 V)
VBB ° 10,8 to 26,4 V
14,16
VOH
Output Low Voltage (See Figure 9)
(IOL ° 1,0 mAl
Ves 012 V
VSS ° 24 V
14,16
VOL
Output High Leakage
11,13
IOH
11,13
VOL
V
-
VBe-1.5
VSS-1.0
-
70
70
150
150
-
0.D1
100
mV
I'A
(VOH ° 24 V, Vee ° 4,5 V, VSS ° 24 V)
Output Low Voltage (See Figure 10)
(lOL 090 mA. Vee 04,5 V)
Vss ° 12 V
VSS ° 24 V
V
-
0,27
0,27
0,60
0,60
CURRENT SOURCE
II
Reference Voltage
I
Vref
-
5.7
-
V
Degauss Voltage (See Text)
I
VDEG
-
1.0
-
V
(Voltage Pin 1 - Voltage Pin 2)
Bias Voltage
Write Current Off Leakage
2
VF
-
0,7
-
6,7
IOH
-
0.03
15
I'A
6,7
Vsat
-
0,85
2.7
V
6,7
L'>I/RW2,1
-
15
40
I'A
2,91
2,84
3,0
3,09
3.16
5,64
5,51
5.89
-
6,14
6,28
31.3
30,3
33,3
33.3
35,5
36.6
-
0,003
0.D15
0,023
-
-
V
(VOH o 35V)
Saturation Voltage
(VBS 012 V)
Current Sink Compliance
(For V6, 7 ° 4,0 V to 24 V, VWG ° 0.8 V)
6,7
Average Value Write Current
(IPin 6 + IPin 7)
for Ves ° 10,8 to 26,4 V)
(
2
@ IR/W ° (LOW, R ° 10k
mA
IR/W(L)
TA ° 25°e
TA ° to +70oe
@ IR/W ° ILOW, R ° 5,0 k
TA ° 25°e
TA o Oto+70oe
@ IR/W ° IHI' R ° 10k (IHI ° ILOW + % ILOW)
TA ° 25°e
TA ° to +70 oe
°
-
%
.lIH/W(H)
°
6,7
Difference in Write Current
dlPin 6 - IPin 71
@ IR/W ° ILOW, Ves; 10,8 V to 26,4 V)
R; 10k
TA ° 25°e
TA ° Oto +70oe
R; 5,0 k
IR/W.l
TA ° 25°e
TA ° to +70oe
°
mA
MOTOROLA LINEAR/INTERFACE DEVICES
7-90
-
0,030
0.046
MC3469P
AC SWITCHING CHARACTERISTICS (VCC = 5.0 V, TA =25°C, VaB = 24 V,IRWS = 0.4 a nd IR/W= 3.0 mA unless otherwise noted
-
refer to Figure 2 a nd Figure 11.)
Characteristics (Note 1)
fin (Note 3)
Typ
Max
Unit
1 Delay from Head Select going low through 0.8 V to CTO
going high through 20 V.
HS, Pin 9
-
1.6
4.0
I's
2. Delay from Head Select going low through 0.8 V to eTl
going low through 1.0 V.
HS, Pin 9
-
2.1
4.0
I'S
eTa
HS, Pin 9
-
1.7
4.0
I'S
4. Delay from Head Select going high through 2.4 V to CTl
going high through 20 V.
HS, Pin 9
-
1.4
4.0
I'S
5. Delay from WG going low through 0.8 V to CTO
going low through 1.0 V.
WG, Pin4
-
1.3
4.0
I'S
6. Delay from WG going low through 0.8 V to CT1
going high through 20 V.
WG, Pin4
.-
0.8
4.0
I's
7. Delay from WG going low through 0.8 V to CTO
going high through 20 V.
WG, Pin4
-
0.75
4.0
I'S
8. Delay from WG going low through 0.8 V to CT1
going low through 1.0 V.
WG, Pin4
-
1.2
4.0
I'S
9. After WG goes high, delay from R/Wl turning off
through 10% to CTO going high through 20 V.
WG, Pin4
20
750
-
ns
10. After WG goes high, delay from R/W1 turning off
WG, Pin4
20
1200
-
ns
11. After WG goes high, delay from R/W2 turning off
through 10% to eTa going low through 1.0 V.
WG, Pin4
20
1200
-
ns
12. After WG goes high, delay from R/W2 turning off
through 10% to CT1 going high through 20 V.
WG, Pin4
20
600
-
ns
13. Delay from WG going low through 0.8 V to EO
going low through 1.0 V.
WG, Pin4
-
0.085
4.0
I's
14. Delay from WG going low through 0.8 V to E1
going low through 1.0 V.
WG, Pin4
-
0.085
4.0
I's
15. Delay from WG going high through 2.0 V to EO
going high through 23 V.
WG, Pin4
-
0.7
4.0
I'S
16. Delay from WG going high through 2.0 V to E1
going high through 23 V.
WG, Pin4
-
0.7
4.0
I's
17. After WG goes low, delay from eTa going low through
1.0 V to R/W1 turning on through 10%.
WG, Pin4
20
750
-
ns
18. After WG goes low, delay from CT1 going low through
1.0 V to R/W2 turning on through 10%.
WG, Pin4
20
750
-
ns
3. Delay from Head Select going high through 2.4 V to
going low through 1.0 V.
Min
through 10% to CIl going low through 1.0 V.
19. After WG goes low, fall time (10% to 90%) of R/W1.
WG, Pin4
-
5.0
200
20. After WG goes low, fall time (10% to 90%) of R/W2.
WG, Pin4
-
5.0
200
21. Setup time, Head Select going low before
WG going low.
WG, Pin4
4.0
-
ns
ns
-
I'S
22. Write Data low Hold Time
WD, Pin 5
200
-
-
ns
23. Write Data high Hold Time
WD, Pin 5
500
-
24. Delay from WG going high through 2.0 V
to R/W 1 turning off through 10% of on value.
WG, Pin4
-
I's
-
3.9
Notes 1. Test numbers refer to encircled numbers in Figure 2.
2. AC test waveforms applied to the designated pins as follows:
Pin
fin
Amplitude
Duty Cycle
HS, Pin 9
WG, Pin4
WD, Pin 5
50 kHz
50 kHz
1.0 MHz
0.4 to 2.4 V
50%
50%
50%
0.4 to 2.4 V
0.2 to 2.4 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-91
ns
II
MC3469P
AC SWITCHING CHARACTERISTICS (continued)
(Vee:: 5.0 V, TA::: 25°C, VBS::: 24 V, WG:: 0.4 unless otherwise noted -
Characteristics (Note 3)
refer to Figure 3 and Figure 11.)
Min
Typ
Max
-
Unit
1 Delay from Write Data going low through 0.9 V to R/Wl
turning on through 50%.
-
85
2. Delay skew, difference of R/Wl turning off and R/W2
turning on through 50% after Write Data going low
through 0.9 V.
-
1.0
3. Delay from Write Data going low through 0.9 V to R/Wl
turning off through 50%.
-
80
4. Delay skew, difference of R/Wl turning on and R/W2
turning off 50% after Write Data going low
through 0.9 V.
-
1.0
±40
ns
5. Rise time, 10% to 90%, of R/Wl
-
1.7
200
ns
6 Rise time, 10% to 90%, of R/\A/2
-
1.7
200
ns
7. Fall time, 90% to 10%, of R/Wl
-
12
200
ns
8. Fall time, 90% to 10%, of R/W2
-
12
200
ns
±40
-
ns
ns
ns
Note 3. Test numbers refer to encircled numbers in Figure 4.
fin
=
1.0 MHz, 50% Duty Cycle and Amplitude of 0.2 V to 2.4 V.
PIN DESCRIPTION TABLE
Symbol
Pin
Description
Head Select
HS
9
Head Select input selects between the head I/O pins: center-tap, erase, and read/write. A HIGH
selects Head 0 and a LOW selects Head 1
Write Gate
WG
4
Write Gate input selects the mode of operation. HIGH selects the read mode, while LOW selects
the Write Control mode and forces the write current.
Write Data
WD
5
Write Data input controls the turn on/off of the write current. The internal divide-by-two flip-flop
toggles on the negative going edge of this input to direct the current alternately to the two
halves of the head coils.
IRW Select
IRWS
8
IRW Select input selects the amount of write current to be used. When LOW, the current equals
the value found in Figure 5, according to the external resistor. When HIGH, the current equals
the low current + 33%.
Vref
Iref
Vref
Iref
1
2
A resistor between these pins sets the write current. Laser trimming reliably produces 3 rnA of
current for a 10k resistor. A capacitor from Vref to Gnd will adjust the Degauss period.
Center-tap 0
CTO
14
Center-tap 0 output is connected to the center tap of Head O. It will be pulled to Gnd orVBB (+12 or
EO
13
Erase 0 will be LOW for writing on Head 0, a nd floating for other conditions.
CTl
16
Center-tap 1 output is connected tothe center tap of Head 1.lt will be pulled to Gnd or VBB (+12 or
+24) depending on mode and head selection.
Name
--
+24) depending on mode and head selection.
Erase
°
Center-tap 1
El
11
Erase 1 will be LOW for writing on Head 1, and floating for other conditions.
R/W2
R/W2
6
R/W2 input is one of the differential inputs that sinks current during writing, being the opposite
phase of R/Wl. It will be connected to one side of the heads.
R/Wl
R/Wl
7
R/Wl input is one of the differential inputs that sinks current during writing, being the opposite
phase of R/W2. It will be connected to on'e side of the heads.
VCC
10
+5 V Power
VBB
15
+ 1 2 V or + 24 V Power
Gnd
12
Coil grounds
Gnd
3
Reference and logic ground
Erase 1
MOTOROLA LINEAR/INTERFACE DEVICES
7-92
MC3469P
FIGURE 1 - LOGIC DIAGRAM
VBB
15
Vee
10
3
12
1 1 J
-!-
Write
G.te~4~-----------+4-----~--~
Vee
>-__"EJ
"",""--.._,,
13
>='=--__ El
t-----~~
11
>--1--____-\\_~_,--- ~~1
eT0
14
Head
Select~9,.....t-------------------+-----------------------------~
II
*External Component
oc - open collector
FIGURE 2 - AC TIMING DIAGRAM
Head 9
Select
2.0V
o.sv
2.0V
~~~5--~--_+--~~1
EiiI3------;-;-------------~r_------~~4_~------_+~
Ei
11 _ _ _
":-~1
R/Wl 7-----.;=~r.,;;:--
10%
-=............"""\
R/W2 6 _ _ _ _
10%
Vref
(5.0 V Nom.,
~:. ~~It~=~n~-----I
-1.65 V Nom.
-="""~
...-------....J-O.86 VNom.
MOTOROLA LINEAR/INTERFACE DEVICES
7-93
MC3469P
FIGURE 3 - R/WI ANO R/W2 RELATIONSHIP
Write Data
5
2.4V
0.9V
0.2V
R/W1
----
7
®
10%
50%
90%
R/W2
r
(i)~
6
10%
50%
:::l@
90%
APPLICATION INFORMATION
•
The MC3469P serves as a complete interface between
the Write Control functional signals (Head Select. Write
Data, Write Gate and inner track compensation, IRWS)
and the head itself. A typical configuration is shown in
Figure 4. LE's are erase coils .
IRef' the current flowing in Rext (required only for dissipation calculations) can be worst case using the fact
that the differential voltage between Pins 1 and 2 (VRef)
shown in Figure 3 never exceeds 5.0 volts. With a low
value of Rext = 1.0 k!l, Po = 25 mW.
WRITE CURRENT SELECTION
WRITECURRENTOAM~NG
Although the MC3469P has been specified for 3.0 mA
write current (with a 10 k!l external resistor), a range of
write current values can be chosen by varying Rext using
the plot in Figure 5. This current can also be derived using
Referring to Figure 4, resistors RD are used to dampen
any ringing that results from applying the relatively fast
risetime write current pulse to the inductive head load.
Values chosen will be a funciton of head characteristics
and the desired damping. Rp serves as a common pullup
the relationship IWrite (mA) = R 30(k )
ext n
resistor to the head supply VBS.
FIGURE 4 - TYPICAL APPLICATION
o--":.:...:.--,.-t-----i
FIGURE 5 - WRITE CURRENT versus Rext
Head
1
1
N
~
O--""=--+-t-t-.,.-{
WG}----{J
MC3469P 13
Head
o
Wo>----~
0,
So
.,.
0
i
7. 0
~
5. 0
I"
.......
I.......
0
~
0
IRWS>-t-I--!::J
HsH-I--~===~-.J
RO
1. 0
2.0
3.0
RO
MOTOROLA LINEAR/INTERFACE DEVICES
7-94
'"
7,0
5.0
10
EXTERNAL SET RESISTOR - Rext (k!l)
2
"
a
MC3469P
DEGAUSS PERIOD
Degauss of the read/write head can be accomplished
at the end of each write operation by attaching a capacitor
from pin 1 to ground. The timing relationship that results
is shown in Figure 7. A simplified diagram ofthis function
is shown in Figure 6.
While WG is low, the selected write current flows into
pin 6 or pin 7 (R/W1 or R/W2)and is mirrored through the
external resistor, Rext . The degauss capacitor, COG, will
be charged to approximately 5.7 volts. After WG goes
high, the voltage on COG begins to decay toward 0.7 V.
When the voltage reaches the comparator threshold of
1.7 V, the comparator output triggers the internal logic
to completely turn off the write current. At this point, the
pulse amplitude on the R/W1 and R/W2 pins has returned
to 10% of its maximum value.
Figure 7, Degauss Period shows the relationship be-
tween COG and Degauss Period for Rext = 10 kO. This
period is equal to the exponential delay time for the voltage as mentioned plus some internal delay times.
POWER-UP WRITE CURRENT CONTROL
During power-up, under certain conditions (Vee
comes up first while WG is low), there can be a write
current transient on Pins 6 and 7 (RIW1 and RIW2) of
sufficient magnitude to cause writing to occur if the
head is loaded.
This transient can be eliminated by placing a capacitor
from Pin 2 to ground. This also delays the write current
when WG goes low and this delay must be accounted
for when the capacitor on Pin 2 is used. The delay is 3.0
IJ.S for a 2700 pF capacitor, and Rext = 10 kO. Values
up to 7000 pF may be used.
FIGURE 6 - SIMPLIFIED DEGAUSS CIRCUIT
FIGURE 7 - DEGAUSS PERIOD versus
CAPACITANCE (COG)
Vaa
1000
/
/
to Internal
Logic
~ 500
g 40 0
:2
:: 30 0
5 20
Pin 2
/
/
II
/
/
o /
Vp2 = 0.7 V
10
~I/
10
FIGURE 8 - TURN-ON WRITE PROTECTION
Rextrr=l
1
27DDPFr5.0%
J
MOTOROLA LINEAR/INTERFACE DEVICES
7-95
30
20
DEGAUSS PERIOD
11"1
MC3469P
TEST FIGURES
FIGURE S -
CENTER TAP OUTPUT VOLTAGE
(PINS 14 AND 16)
CONDITIONS
Measure
16t------,
15
14t-----O..
VT
11 NC-
SijS2
4.5V
~
100 mA
L -_ _--'
Set
VT
=-
51
52
53
VOH (PI4)
On
Off
P14
VOH (PI6)
On
Off
P16
VOL (PI4)
Off
On
P14
VOL(PI6)
Off
On
P16
V4*
t
1.0 mA
VS*
O.S
2.0
2.0
O.S
2.0
2.0
O.S
O.S
O.S
O.S
2.0
2.0
2.0
O.S
O.S
2.0
*Volts
FIGURE 10 -
ERASE OUTPUT LOW VOLTAGE
(PINS 11 AND 13)
CONDITIONS
Set
Measure
•
VT
SI
VOL(Pll)
Pl1
VOL (PI3)
P13
I
I
I
VS.S
O.SV
2.0 V
FIGURE 11 - TIMING TEST CIRCUIT
+5.0 V ±5%
+24 V ±5%
100
24 k
24 k
5 Write Data
240
2.0W
AC
Inputs
Head Select
~~-+----~~-+24V
50
IRWSelect
See Specification
Table and Note 3.
50
Notes:
Diodes Type 1 N4934.
Resistors (unless otherwise noted) are' /4 W, 5%.
MOTOROLA LINEAR/INTERFACE DEVICES
7-96
MC3469P
ERASE CURRENT
Erase timing is provided internally and isactive during
Write Gate low for the selected head.
The value of RE, the erase current set resistor, is found
by referring to Figure 12 and selecting the desired erase
current.
Looking althe simplified erase current path in Figure 12,
when writing, CTO will be high (VOH(min) = 21 V) and EO
will be low (VOL(max) = 0.6 V). If the erase coil resistance
is 10 !1 and 40 mA of erase current is desired, then:
FIGURE 12 - ERASE CURRENT
(RE Selectionl
(RE + 10!l) x 40 mA= (21 -0.6) V
RE
13
EO
or
RE
=
20.4 V
0.0'4 A
- 10 fl
Erase
Coil
MC3469
=500 fl
CTO
14
Po = (0.04) (20.4) = 0.816 W or 1.0 W
Thisgives the minimum value REfor worst case VOH/VOL
conditions. It is also recommended that a diode be used as
required for inductive back emf suppression.
FIGURE 13 - TYPICAL DUAL HEAD FlOPPY DISK SYSTEM USING
FET GATE READ CHANNEl SElECTION AND MC3469/MC3470
MC3470
::
0:f'
r---·--- - - ,
- --
Digital
Read Data
r (out)
I
HO
YH-.,....-~--'
I
I
L ________
Read Amp
See Data Sheet
r------..,
L-+---+------il
f-----/-+~-~_::L---'=
From
L _____
HI
~
VBB
r
I
I
VCC
I
RD
I
r
R/WI
I
I
l___{
:
Head Select I
I
Logic
:
I
R/W2
VBB
HS 14-------'
CTO
CTI
TrackComp
EO
E1
MOTOROLA LINEAR/INTERFACE DEVICES
7-97
..J
I
I
~
•
®
MC3470P
MC3470AP
MOTOROLA
Specifications and Applications
Information
FLOPPY DISK
READ AMPLIFIER SYSTEM
FLOPPY DISK READ AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3470 isa monolithic READ Amplifier System for obtaining
digital information from floppy disk storage. It is designed to accept
the differential ac signal produced by the magnetic head and produce a digital output pulse that corresponds to each peakofthe input
Signal. The gain stage amplifies the input waveform and applies it
to an external filter network, enabling the active differentiator and
time domain filter to produce the desired output.
• Combines All the Active CircuitryTo Perform the Floppy Disk Read
Amplifier Function in One Circuit
•
•
Guaranteed Maximum Peak Shift of 2.0% -
•
Improved (Positive) Gain TC and Tolerance
MC3470A
• Improved Input Common Mode
PSUFFIX
PLASTIC PACKAGE
CASE 707·{)2
TYPICAL APPLICATION
Active
Filter Network
Differentiator
Amplifier
Inputs
Offset
Decoupling
Gnd
One-Shot
Components
Mono #1
Analog Inputs
Gain Select
Mono #1
Mono #2
One-Shot
{
Components
Mono #2
MOTOROLA LINEAR/INTERFACE DEVICES
7-98
B
Data
9
Ou'tput
MC3470P, MC3470AP
ABSOLUTE MAXIMUM RATINGS (TA; 25°C)
Symbol
Value
Unit
Power Supply Voltage (Pin 11)
Rating
VCCI
7.0
Vdc
Power Supply Voltage (Pin 18)
VCC2
16
Vdc
Input Voltage (Pins 1 and 2)
VI
-0.2 to +7.0
Vdc
Output Voltage (Pin 10)
Vo
-0.2 to +7.0
Vdc
Operating Ambient Temperature
TA
o to +70
°c
Tstg
-65 to +150
°C
TJ
150
°c
Symbol
Value
Unit
VCC
VCCI + 4.75 to +5.25
VCC2 +10 to +14
Vdc
TA
o to +70
°c
Storage Temperature
Operating Junction Temperature
Plastic Package
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage
Operating Ambient Temperature Range
ELECTRICAL CHARACTERISTICS (TA; 0 to +70oC. VCCI ; 4.75 to 5.25 V. VCC2
Characteristic
MC3470
MC3470A
Differential Voltage Gain
(f; 200 kHz. ViD = 5.0 mV(RMS)
=10 to 14 V unless otherwise noted)
Figure
Symbol
Min
Typ
Max
Unit
2
AVD
80
100
100
110
130
130
V/V
liB
-
-10
-25
p.A
viCM
-0.1
-
1.5
V
viD
-
-
25
mVp-p
voD
3.0
4.0
-
Vp-p
-
8.0
-
mA
lOS
2.8
4.0
-
mA
Small Signal Input Resistance (TA = 25°C)
r;
100
250
-
k!l
Small Signal Output Resistance, Single-Ended
ro
-
15
-
n
3
Input Bias Current
Input Common Mode Range Linear Operation
(5% maxTHD)
Differential Input Voltage Linear Operation
(5% maxTHD)
Output Voltage Swing Differential
2
Output Source Current, Toggled
10
Output Sink Current, Pins 16 and 17
4
(TA = 25°C. VCCI ; 5.0 V. VCC2 = 12 V)
Bandwidth. -3.0 dB (viD = 2.0 mV(RMS). TA; 25°C
VCCI = 5.0 V. VCC2 ; 12 V)
C~mmon
Mode Rejection Ratio (TA = 25°C, f == 100kHz,
AVD; 40 dB. Yin = 200 mVp-p. VCCI ; 5.0 V.
VCC2 = 12 V)
2.17
BW
10
-
-
MHz
5
CMRR
50
-
-
dB
VCCI Supply Rejection Ratio (TA; 25°C. VCC2 = 12 V.
4.75';; VCCI ..;; 5.25 V. AVD = 40 dB)
-
50
-
-
dB
VCC2 Supply Rejection Ratio (TA = 25°C. VCCI = 5.0 V.
lOV';; VCC2';; 14 V. AVD; 40 dB)
-
60
-
-
dB
Differential Output Offset (TA = 25°C. viD; vin; 0 V)
VDO
0.4
V
VCO
-
-
Common Mode Output Offset (viD; Yin = 0 V.
3.0
-
V
en
-
15
-
p.V(RMS)
ICCI
ICC2
-
40
4.8
-
Differential and Common Mode)
Differential Noise Voltage Referred to Input
22
(BW; 10 Hz to 1.0 MHz. TA = 25°C)
Supply Currents
(VCCI = 5.25 V. 51 to Pin 12 or Pin 13)
(VCC2 = 14 V)
1
mA
-
MOTOROLA LINEAR/INTERFACE DEVICES
7-99
-
II
MC3470P, MC3470AP
ELECTRICAL CHARACTERISTICS (continued) (TA = 0 to +70·C. VCC1 = 4.75 to 5.25 v. VCC2 = 10 to 14 V unless otherwise noted)
Characteristic
Typ
ACTIVE DIFFERENTIATOR SECTION
Differentiator Output Sink Current. Pins 12 and 13
(VOO=VCC11
Peak Shift (f = 250 kHz. viD = 1.0 VP-P. icap = 500 p.A.
where PS = 112 tps 1-t pS2 x 100%.
tpSl + tPS2
MC3470
VCC1 = 5.0 V. VCC2 = 12 V)
MC3470A
6
100
7.8
PS
Differentiator Output Resistance, Differential
1.4
-
mA
%
roO
-
'..riD
Differentiator Input Resistance, Differential
1.0
-
5.0
-
2.0
30
-
kil
40
-
il
(TA = 25°C)
DIGITAL SECTION
II
Output Voltage High logic level. Pin 10 (VCCl = 4.75 V.
VCC2 = 12 V. IOH = -0.4 mAl
9
VOH
2.7
-
-
V
Output Voltage low logic Level. Pin 10 (VCCl = 4.75 V.
VCC2 = 12 V. IOl = 8.0 mAl
10
VOL
-
-
0.5
V
-
20
ns
25
ns
4000
ns
115
%
Output Rise Time. Pin 10
11.12
tTLH
Output Fall Time. Pin 10
11.12
tTHL
-
Timing Range Mono #1 (tl A and tl al
13
tlA.a
500
Timing Accuracy Mono #1
(11 = 1.0 P.s = 0.625 R1Cl + 200 nsl
(Rl = 6.4 kil. Cl = 200 pFI
12.13
Etl
85
Accuracy guaranteed for R1 in the range
.'
,
1.5 kil';;; Rl ,;;; 10 kil and Cl in the range
150pF';;; Cl';;; 680pF.
Note: To minimize current transients, C1 should
be kept as small as is convenient.
Timing Range Mono #2
11. 12
12
150
-
1000
ns
Timing Accuracy Mono #2
12.13
EtZ
85
-
115
%
(t2 = 200 ns = 0.625 R2C21
(R2 = 1.6 kil. C2 = 200 pFI
Accuracy guaranteed for 1.5 kil';;; R2';;; 10 kil.
100 pF';;; C2';;; 800 pF
MOTOROLA LINEAR/INTERFACE DEVICES
7-100
MC3470P, MC3470AP
MC3470 CIRCUIT SCHEMATIC
Gain
16
Stage
'--+--+--017
40------==------=----'
30---------~
40 k
4k
1.33 k
Active
15 k
Differentiator
and
II
1.33 k
15 k
14o-~--~------_t======~====~----l
Peak
Detector
15O-~~---~~
130-------+-...
12
O'--------+--~----__+
6
9
10
Digital
Section
Q C~------------------~
'-------\a
0
MOTOROLA LINEAR/INTERFACE DEVICES
7-101
MC3470P, MC3470AP
FIGURE 1 - POWER SUPPL V CURRENTS.
ICCI AND ICC2
-
18
17
FIGURE 2 - VOLTAGE GAIN. BANDWIDTH.
OUTPUT VOLTAGE SWING
18
VCC2
2
17
vo17
3
16
vo16
VCC2
vin N
51
ICC2
3
16
4
15
4
15
14
5
14
6
13
AV
13
6
51
200 pF
12
pF
8
11
9
10
•
-
pF
ICC1
8
11
9
10
1.6 k
6.4 k
6.4 k
vin
VCC1
FIGURE 4 - AMPLIFIER OUTPUT SINK CURRENT.
PINS 16 AND 17
FIGURE 3 - AMPLIFIER INPUT BIAS CURRENT. liB
18
18
A
17
2
17
16
3
16
3
4
15
4
15
5
14
5
14
6
13
13
6
2pOpF
12
12
11
9
vo16 - vo17
12
Vee1
1.6 k
8
=
pF
10
8
11
9
10
1.6 k
1.6 k
6.4 k
6.4 k
MOTOROLA LINEAR/INTERFACE DEVICES
7-102
MC3470P, MC3470AP
FIGURE 5 - AMPLIFIER COMMON MODE
REJECTION RATIO, CMRR
FIGURE 6 - DIFFERENTIATOR OUTPUT SINK CURRENT,
PINS 12 AND 13
18
VCC2
18
17
vo17
17
16
v o 16
16
15
4
CMRR
=
20 10910
4
vo16 - v o 17
V CC2
15
100 vin
14
14
f=10QkHz
13
vin
=
13
200 mVpp
200 pF
12
12
"
Vee1
NOTE:
Measurements
"
200
pF
10
10
1.6 k
1.6 k
6.4 k
6.4 k
may be made with vector voltmeter hp
8405A or equivalent at 1.0 MHz to guarantee 100 kHz
performance.
FIGURE 7 - PEAK SHIFT, PS
FIGURE 8 - PEAK SHIFT, PS
See Figure 8 for Output Waveform
Yin = 1.0 Vpp
f = 250 kHz
Test schematic on Figure 7
18
VCC2
17
3
16
4
15
Vout
14
f = 250 kHz
13
iCAP
V'
-
1
,,°-l' ~
12 f---'Vv
, k
11
vccl151
av
pp
IO JClt----+--,---:ps----".R '", =:Ii
PS
~
=!
2
10
R2
1.6 k
2.4 k
5V
MOTOROLA LINEAR/INTERFACE DEVICES
7-103
tpSl- tpS2 X 100%
tpSl+tpS2
•
•
MC3470P, MC3470AP
FIGURE 10 - DATA OUTPUT VOLTAGE LOW. PIN 10
FIGURE 9 - DATA OUTPUT VOLTAGE HIGH. PIN 10
18
2
17
3
16
4
15
5
14
6
13
VCC2
18
2
17
4
15
16
14
6
13
200 pF
200 pF
12
12
11
11
vee1
8
~8mA
200 pF
200pF
10
9
f-f---<>--o Vout
10 f-f-------~DVout
9
~400 IJ-A
1.6 k
1.6 k
6.4 k
6.4 k
FIGURE 11 - DATA OUTPUT RISE TIME. tTLH
DATA OUTPUT FALL TIME. tTHL
FIGURE 12 - TIMING ACCURACY. Et1 AND Et2
DATA OUTPUT RISE AND FALL TIMES. tTLH AND tTHL
TIMING ACCURACY MONO iKl. Et2
Vin shown on Figure 13
Vin is same as shown on Figure 13, test schematic on Figure 12
18
2.7V
Vout
Pin 10
----+_
17
2
I--- '2 -~H;-----1.5
V
0.5 V _ _ _--lei
3
16
4
15
14
-
I--'THL
13
t2
E t 2 "" 200 ns X 100%
e1
12
O"~I'F vin
1.0 k
11
8
51
Vee1
10
R2
1.6 k
2.4 k
R1
6.4 k
5V
MOTOROLA LINEAR/INTERFACE DEVICES
7-104
_
-
MC3470P, MC3470AP
FIGURE 13 - TIMING ACCURACY MONO #1. E t 1
< 10 ns f:=: 250 kHz 50% Duty Cycle
tTLH = tTHL
Test Schematic on Figure 12
0.4 V
OV
V out
Pin 10
t1A
EtTA = 1000 ns X 100%
t1B
EtTB = 1000 ns X 100%
FIGURE 14 - AMPLIFIER OFFSET DECOUPLING
IMPEDANCE. PINS 3 AND 4
Re + re and AV with R ext = 500 n
Vin
18
2
R
f=25QkHz
17
f------
Vin
V outR
=5
mV(RMS)
•
(0)
16
R ext
2.5 "F
4
15
5
14
6
13
AVO
V out
-2-=~
200 pF
12
2 AVR - 1
Vee,
11
8
R ext
(AVO)
'.+ R.~
200 pF
500
10
n
)
V outo
2 ( V outR - 1
1.6 k
6.4 k
FIGURE 15 - NORMALIZED POWER SUPPLY CURRENT
(ICC/ICC 25°C) vo",us TEMPERATURE
FIGURE 16 - NORMALIZED VOLTAGE GAIN
(AV/AV 25°C) va,sus TEMPERATURE
~
~ 1.04
=>
z
~
~
~
1.00
~~
--
-
« 0.98
;§
«
'" 1.02
'">
t---
.......
~
1.00
'"z
0.98
~
;§
t--......
Z
-;;.
« 0.96
;i 0.96
10
20
30
............
'='
'"z
~
. . .v
w
~ 1.0 2
~
1.04
~
u
40
50
60
70
V
--10
80
...... ~
30
20
40
50
60
TA. AMBIENT TEMPERATURE (DC)
TA. AMBIENT TEMPERATURE (DC)
MOTOROLA LINEAR/INTERFACE DEVICES
7-105
70
80
MC3470P, MC3470AP
FIGURE 17 - PHASE AND NORMALIZED VOLTAGE
GAIN ....... FREQUENCY
2:
;;:
--- ""
'"w
S! 1.0
!3
O.9
N
:;
o~
II
2
4
,
\'
2:
~
0
~
0.8
'"
,. 1.04
Gain
.......
I/"
I""Ph...
'"
>
ffi
FIGURE 18 - NORMALIZED TIME DELAY
t1 ..rsus TEMPERATURE
0.7
6
8
1
~ 0.6
~
'"
~ 1.02
;::
~
~ 1.00
!-""
~
g
'"z
0.9 8
'f 0.9 6
200 kHz
1.0 MHz
10MHz
60
20
50
30
40
TA. AMBIENT TEMPERATURE (OCI
10
I. FREQUENCY
FIGURE 20 - NORMALIZED VOLTAGE GAIN,
AVR/AVR 2SOC
FIGURE 19 - NORMALIZED OUTPUT PULSE WIDTH,
t2/t2 2SoC
"
b
See Figure 14 Switch Position R
z
1.04
;;:
jO
•
'"~
'">
'"~
t;
1.00
"
~
:;
r--
~ 0.98
0.9 8
~
'"z
~
1.0 0
:;
5l
N
i
1.0 2
AVR = 2Vout (RI
V"
Rext = 500 n
w
~
~ 1.02
~
0.96
10
20
30
50
40
60
TA. AMBIENT TEMPERATURE (OCI
70
0.96
10
80
70
80
Krohn-Hita
18
Pin 3 or4
400
30
15w
i
60
FIGURE 22 - DIFFERENTIAL NOISE VOLTAGE
~SeeFigure14
z
~
'"~
50
500
w
u
~
40
30
20
TA. AMBIENT TEMPERATURE (OCI
FIGURE 21 - EFFECTIVE EMITTER RESISTANCE
DISTRIBUTION, PINS 3 AND 4
_
I
1.04
1= !50 kHz
'"
w
~o
80
70
>
OW:: rw w
~
w w l;;/~-
2
17
3
16
Low Pass
Filter with
RMS
15
f2 = 1.0 MHz
Voltmeter
3.3 k
0.01
/IF
3202 Filter
4
0
14
20
5.0 V
,} 100
6
13
200pF
12
10
20
60
50
TA. AMBIENT TEMPERATURE (OCI
30
40
70
6.4 k
BO
8
11
9
10
t----- V CCI
200 pF
1.6 k
NOTE: Assume uncorrelated noise sources
en (differential noise at input) = 8 o J2/100
MOTOROLA LINEAR/INTERFACE DEVICES
7-106
hp 3400A
MC3470P, MC3470AP
APPLICATION INFORMATION
The MC3470 is designed to accept a differential ac
input from the magnetic head of a floppy disk drive and
produce a digital output pulse that corresponds to each
peak of the ac input. The gain stage amplifies the input
waveform and applies it to a filter network (Figure 23a),
filter must be greater than Zmin as calculated from
Z . _ (EpAVD) max
min 2.8 mA
where Ep is the peak differential input voltage to the
MC3470.
FIGURE 238 - BLOCKING CAPACITORS USED TO
ISOLATE THE DIFFERENTIATDR
TRANSIENT RESPONSE
The worst-case transient response of the read channel
occurs when dc switching at the amplifier input causes its
output to be toggled, The dc voltage changes are a consequence of diode switching that takes place when control
is transferred from the write channel to the read channel.
If the diode network is balanced, the dc change is a
common mode input voltage to the amplifier. The switching of an unbalanced diode network creates a differential
input voltage and a corresponding amplified swing in the
outputs. The output swing will charge the blocking
capacitor resulting in peak shifting in the digital output
until the transient has decayed. EI iminating the differential
dc changes at the amplifier input by matching the diode
network or by coupling the read head to the amplifier via
FET switches, as shown in Figure 23b, will minimize the
filter transient response,
14
MC347Q
Oifferentiator
C'
15
enabling the active differentiator and time domain filter
to produce the desi red output.
FILTER CONSIDERATIONS
The filter is used to reduce any high frequency noise
present on the desired signal. Its characteristics are dic·
tated by the floppy disk system parameters as well as the
coupling requirements of the MC3470. The filter design
parameters are affected by the read head characteristics,
maximum and minimum slew rates, system tranyient
response, system delay distortion, filter center frequency,
and other system parameters. This design criteria varies
between manufacturers; consequently, the filter con·
figuration also varies, The coupling requirements of the
MC3470 are a result of the output structure of the gain
stage and the input structure of the differentiator, and
must be adhered to regardless of the filter configuration.
The differentiator has an internal biasing network on
each input. Therefore, any dc voltage applied to these
inputs will perturbate the bias level. Disturbing the bias
level does not affect the waveform at the differentiator
inputs, but it does cause peak shifting in the digital output
(Pin 10). Since the output of the gain stage has an associ·
ated dc voltage level, it, as well as any biasing introduced
in the filter, must be isolated from the differentiator via
series blocking capacitors. The transient response is minimized if the blocking capacitors C and C' are placed
before the filter as shown in Figure 23a. The charging and
discharging of C and C' is controlled by the filter termina·
tion resistor instead of the high input impedance of the
differentiator.
The filter design must also include the current-sinking
capacity of the amplifier output. The current source in
the output structure (see circuit schematic - Pins 16
and 17) is guaranteed to'sink a current of 2.8 mAo If the
current requirement of the filter exceeds 2.8 mA, the current source will saturate, the output waveform will be
distorted, and inaccurate peak detection will occur in
the differentiator. Therefore, the total impedance of the
FIGURE 23b - FET SWITCHES USED TO COUPLE THE RIW
HEAD TO THE MC347D
Power
2N5460
....--...--+----,
...----<1>---,
R/W
Head
2N5460
Write
Two of the advantages F ET switches have over diode
switching are:
1. They isolate the read channel from dc voltage
changes in the system; therefore, the transient
response of the filter does not influence the system
transient response,
2. The low voltage drop across the FETs keeps the
input signal below the amplifier's internal clamp
voltage; whereas, the voltage dropped across a diode
switching network adds a dc bias to the input signal
which may exceed the clamp voltage,
AMPLIFIER GAIN
For some floppy systems, it may become necessary
to either reduce the gain of the amplifier or reduce the
Sae Application Note AN917 for further information,
MOTOROLA LINEAR/INTERFACE DEVICES
7-107
..
MC3470P, MC3470AP
signal at the input to avoid exceeding the output swing
capability of the amplifier. The voltage gain of the ampli·
fier can be reduced by putting a resistor in series with
the capacitor between Pins 3 and 4 (Figure 14). The
relationship between the gain and the external resistor is
given by
AVR = AVO· 2 (re + Re)
crossing detection of the current waveform. Since the
capacitor shifts the current 90 0 from the input voltage,
the comparator performs peak detection of the input
voltage.
The following terms will be used in determining the
value of C to be used in the differentiator:
Ep 1), peak differential voltage applied to MC3470
amplifier input.
Ep sin wt 1), voltage waveform applied to MC3470
amplifier input (for purposes of discussion,
+ Rext
where AV61), voltage gain with the external resistor = 0,
AVR 1), voltage gain with the external resistor in,
Rext 1), the external resistor, and
re + Re 1), the resistance looking into Pin 3 or Pin 4.
assume a sine wave).
AVO 1), differential voltage gain of input amplifier.
Vin(t) fl differential voltage waveform applied to the
differentiator inputs.
Thus,
= EpAvosin wt (Note: The filter is assumed to
be lossless.)
ic!t) fl current through capacitor CO.
Ra 1), output resistance of 01 (02) at Pin 12 (13).
AVO
Rext = 2 ( - - 1) (re + Re).
AVR
A plot of (re + Re) versus temperature is shown in
Figure 21. Figure 20 shows the normalized voltage gain
versus temperature with the external resistor equal to
500 ohms.
II
If vin(t) = EpAVD sin wt, then the current through the
capacitor CD is given by
ic!t) = CDAVDEpwcoswt
ACTIVE OIFFERENTlATOR
The active differentiator in the MC3470 (simplified
circuit shown in Figure 24), is implemented by coupling
and Va(t) = 2RCCDAVDEpwcoswt.
Accurate zero crossing detection of VO(t) [peak
detection of vin(t)] occurs when the current waveform
ic!t) crosses through zero in a minimum amount of time.
This condition is satisfied by maximizing current slew
rate. For a given value of w, the maximum slew rate
occurs for the maximum value of ic or coswt = 1. Therefore,
ic = CDAVD Epw
FIGURE 24 - ACTIVE DIFFERENTIATOR NETWORK
12
The MC3470 current-sourcing capacity will determine
the maximum value ic; therefore, CD must be chosen such
that the maximum ic occurs at the maximum AVDEpw
product.
1 mA
Co = __-=ic:...m_a-:x__
(AVDEpw)max (120)(Epw)max
13
If the peak value specified for ic is exceeded, the
current source (fO in Figure 24) will saturate and distort
the waveform at Pins 12 and 13. Consequently, the
differentiator will not accurately locate the peaks and
peak shifting will occur in the digital output.
The effective output resistance RO of 01 (02) will
create a pole (as shown in Figure 25) at 1/2 ROCD. If
this pole is ten times greater than the maximum operating
frequency (wmaxl. the phase shift approaches 84 0 .
Locating the pole at a frequency much greater than
10 wmax needlessly extends the noise bandwidth thus:
the emitters of a differential amplifier with a capacitor
reSUlting in a collector current that will be the derivative
of the input voltage,
1= Cdv/dt
If the output voltage is taken across a resistor through
which the collector current is flowing, the resulting voltage will be the derivative of the input voltage.
2RO=
Vo = 2Ric = 2RC dvin (t)
dt
Vo is applied to a comparator which will provide zero
1
CD 10 wmax
If RO is not large enough to satisfy this condition, a series
MOTOROLA LINEAR/INTERFACE DEVICES
7-108
MC3470P, MC3470AP
Using this value for L gives:
FIGURE 25 - RESPONSE OF OIFFERENTIATOR
USING ONLY Co
Solving for R gives:
R = =-:c--'-o_ _
5CD Wmax
The total resistance (R) is the effective output resis·
tance (RO) plus the resistor added in the differentiator
(RD). Values of Ii from 0.3 to 1 produce satisfactory
results.
1
wmax2R
Co
PEAK SHIFT CONSIDERATIONS
Peak shift, resuiting from current imbalance in the
differentiator, offset voltage in the comparator, etc., can
be eliminated by nulling the current in the emitters of
the differentiator with a potentiometer as shown in
Figure 27.
resistor can be added so that
R = 2RO + RO =
1
Co 10 wmax
To further reduce the noise bandwidth, a second pole
can be added (as shown in Figure 26) by putting an
FIGURE 27 - PEAK SHIFT COMPENSATION
FIGURE 26 - COMPLETE RESPONSE OF OIFFERENTIATOR
•
The potentiometer across the differentiator components
is adjusted until a symmetrical digital output cycle is
obtained at Pin 10 for a sinusoidal input with the mini·
mum anticipated Epw product.
1
wmax ..jLOCO
inductor in series with the resistor and the capacitor.
The values of Rand L are determined by choosing the
center frequency (wo) and the damping ratio (0) to meet
the systems requirements where
DESIGN EQUATIONS FOR ONE·SHOTS
As shown in Figure 28, the MC3470 input waveform
may have distortion at zero crossing, which can result in
false triggering of the digital output. The time domain
filter in the MC3470 can be used to eliminate the distor·
tion by properly setting the period (tl) of the one·shot
timing elements on Pins 6 and 7. The following equation
will optimize immunity to this signal distortion at zero
crossing of the read head signal.
The timing equation for the time domain filter's one·
shot is:
tl = R1C1Kl +To
1
wo=--
.jLcj)
Wo= 10wmax =_1_
.jLcj)
where CD is chosen for maximum ic as shown previously.
Solving for L gives:
where K1 = 0.625, To = 200 ns.
Actual time will be within ± 15% of 11 due to variations
in the MC3470.
If t.T is the maximum period of distortion (see Figure
L = ----'----::
100 CD(Wmax)2
MOTOROLA LINEAR/INTERFACE DEVICES
7-109
•
MC3470P, MC3470AP
FIGURE 28 - WAVEFORMS THROUGH THE READ CIRCUIT
Amplifier
Input Signal
Va (Differential
Output Voltage
r\
r--./ \
'""
\
(""\
~
---\--\J--F'¥-,'--\--\J----:f--='7',7-,--'--~
~T
~
~T
i
I I
;
I I
I I
I I
I I
I I
I I
I
I
I
I
Comparator
Output
Output of
One-Shot (t1)
Time Domain
Filter Ouput
Digital
Output
28), then choose t1 such that
the manufacturer, the coupling of signals or noise between
external wires is under the control of the end-user who
designs the integrated circuit into a piece of equipment.
The designer should be familiar with the following layout
procedures which will optimize the performance of the
device. See Figure 29.
LH
CDl1=:
9f
r~
:::!-®
MOTOROLA LINEAR/INTERFACE DEVICES
7-117
Inhibit
II
MC3471P
FIGURE 3 Head 9
AC TIMING DIAGRAM
20Vr-----------------------------------------
Select
~:~~4-+='1
O.8V
20V
eTII
en
10%
10%
•
@
Vref
(S.OVNom.)
-1.65 V Nom.
1.0 V Nom::
....::::~-"'-~;___-------1
~:.!~ ~~It~:~n ~ _ _+-J_O.85 V Nom .
intiibit---of-"\
0.5 V
FIGURE 4 - TYPICAL APPLICATION
Head
1
Head
o
WG > - - - - - - - - - i
WD>-------I
IRWS
>----1-+----1
--+--+........
Inhibit . .
RD
RD
MOTOROLA LINEAR/INTERFACE DEVICES
7-118
MC3471P
APPLICATION INFORMATION
The MC3471 P serves as a complete interface between
the Write Control functional signals (Head Select. Write
Data. Write Gate and inner track compensation. IRWS)
and the head itself. A typical configuration is shown in
Figure 4. LE's are erase coils.
Figure 7. Degauss Period shows the relationship
between COG and Degauss Period for Rext ~ 10 kO. This
period is equal to the exponential delay time for the voltage
as mentioned plus internal delay times.
FIGURE 6 -
SIMPLIFIED DEGAUSS CIRCUIT
WRITECURRENTSE~cnON
VSS
Although the MC3471 P has been specified for 3.0 mA
write current (with a 10 kO external resistor). a range of
write current values can be chosen by varying Rext using
the plot in Figure 5. This current can also be derived using
the relationship IWrite (mA)
~ __3_0_
Rext(kfl)
to Internal
Logic
IRef, the current flowing in ReX! (required only for dissipation calculations) can be worst case using the fact
that the differential voltage between Pins 1 and 2 (VRef)
shown in Figure 3 never exceeds 5.0 volts. With a low
value of Rext = 1.0 kil, Po = 25 mW.
Pin 2
VP2
FIGURE 5 -
~
0.7 V
WRITE CURRENT versus R ext
0",,IRWS low
0
0
0
~
"""
FIGURE 7 - DEGAUSS PERIOD versus
CAPACITANCE (COG)
100 0
f'...
"-
.....
0
I"""
3
:: 2.0
1.0
2.0
3.0
/
"'"
5.0
7.0
10
EXTERNAL SET RESISTOfl - Rext (kn)
WRITE CURRENT DAMPING
""
20
0
0
0
Rext~
I
10kll i----
/
/
100
o1/
o
Referring to Figure 4. resistors RD are used to dampen
any ringing that results from applying the relatively fast
risetime write current pulse to the inductive head load.
Values chosen will be a funciton of head characteristics
and the desired damping. Rp serves as a common pullup
resistor to the head supply VSB.
10
20
30
DEGAUSS PERIOD II'S)
POWER-UP WRITE CURRENT CONTROL
During power-up, under certain conditions (VBB
comes up first while WG is low), there can be a write
current transient on Pins 6 and 7 (R1W1 and R1W2) of
sufficient magnitude to cause writing to occur if the
head is loaded.
This transient can be eliminated by placing a capacitor
from Pin 2 to ground. This also delays the write current
when WG goes low and this delay must be accounted
for when the capacitor on Pin 2 is used. The delay is 3.0
IJ.S for a 2700 pF capacitor, and Rext = 10 kil. Values
up to 7000 pF may be used.
DEGAUSS PERIOD
Degauss of the read/write head can be accomplished at
the end of each write operation by attaching a capacitor
from Pin 1 to ground. The time relationship that results is
shown in Figure 7. A simplified diagram of this function is
shown in Figure 6.
While WG is low, the selected write current flows into
Pin 6 or Pin 7 (R/W1 or R/W2) and is mirrored through the
external resistor. Rext. The degauss capacitor. COG. will
be charged to approximately 5.7 volts. After WG goes high.
the voltage on COG begins to decay toward 0.7 V. When
the voltage reaches the comparator threshold of 1.7 V. the
comparator output triggers the internal logic to completely
turn off the write current. At this point, the pulse amplitude
on the R/WI and R/W2 pins has returned to 10% of its
maximum value.
/
/
/
V
". ,r7lL-____
M_C_3_47_1_ _ _ __
2700PF~
5.0%
I
=
See Application Note AN917 for further information.
MOTOROLA LINEAR/INTERFACE DEVICES
7-119
II
MC3471P
ERASE DELAY
•
The MC3471P can be used with both straddle and
tunnel erase heads. When using the tunnel erase heads,
it is necessary to delay the erase current in time with
respect to WG due to the physical placement of the
erase gap behind the RIW gap on the heads. The amount
of delay required depends upon the disk rotation velocity, recording density and format. Turn-on delay and
turn-off delay must also be independent to guarantee
erase is on for the entire block.
Nominal delays of 500 p.s turn-on; and 1.0 ms turnoff are available by adjusting the value of Rl, R2 and
Cl, C2 shown in Figure 4. These delays are adjustable
over a broad range as shown in Figure 9 to achieve any
practical delay required. By using 5% capacitors and 1%
resistors, total timing accuracy is better than ± 15% over
temperature and supply. Timing is shown in Figure 10.
In applications using logic or microprocessor controlled delays, the 01 and 02 inputs can be used directly
to turn-on and turn-off the erase current. (Controlling
outputs should be Open-collector wll 0 k pullup). Figure
11 shows the relative timing involved for the microprocessor and logic controlled applications.
In straddle erase systems, the erase delays can be
eliminated by pulling 01 and 02 high thru a 10 kO pullup
resistor to + 5.0 V.
This gives the minimum value RE for worst case VOHI
VOL conditions. It is also recommended that a diode be
used as indicated for inductive back emf suppression.
FIGURE 10 - DELAY INPUT FUNCTION/TIMING
WITH RC ELEMENTS
WG
~
,'I--._ _ _
I
~
01
. - - - Turn-On
Delay
02
Turn-Off_
Delay
E00r
_(Erase)
El
FIGURE 11 - DELAY INPUT FUNCTION/TIMING
WITH LOGIC CONTROL
-
FIGURE 9 - TYPICAL ~ TO ED, 1 DELAY versus RC
2,0
l.S
I--- td ~ kRC ±O,09RC
-
01
J'
1,2
~
./
k~ 1
V
U 1.0
'l'
D,S
02
1/
0.63 VCC
_
b~;~~on
-
0.63 VCC
V
0.2
Turn-Off_
Delay
E00 r
0,2
!\
O.S
1.0
1.2
l.S
2.0
_(Erase)_
El
-
td
30kO<;;R<;;300kO
ERASE CURRENT
FIGURE 12 - ERASE CURRENT
(RE Selection)
The value of RE, the erase current set resistor, is found
by referring to Figure 12 and selecting the desired erase
current.
looking at the simplified erase current path in Figure
12, when writing, CT0 will be high (VOH(min) =
22.5 V) and E0 will be low (VOl(max) = 0.6 V). If the
erase coil resistance is 10 0 and 40 mA of erase current
is desired then:
VBB
19
+24V
17
RE
E01--{>---JV'v"v----.----,
Erase
Coil
MC3471
(RE
+ 100) x 40 mA
RE
=
= (22.5 -0.6) V
or
21.9 V _ 10 0
0.04 A
=
CT0r-~o-----------~----~
537 0
IS
Po = (537) (0.04)2 = 0.86 W
MOTOROLA LINEAR/INTERFACE DEVICES
7-120
MC3471P
FIGURE 13 - TYPICAL DUAL HEAD flOPPY DISK SYSTEM USING
FET GATE READ CHANNEL SElECTION AND MC3471/MC3470A
MC3470A
r---------,
:
:
---
0:
Digital
f> Read Data
1
I
I
L ________
(out)
JI
Read Amp
See Data Sheet
r-------,
" - - [ - - + - - - - - i'
I
I
From
I
Head Select 1
logic
:
L _____ -..J
Hl
VBB
+I
RO
I
I
I
I
Vce
RO
I
I
I
l~_{
CTO
CTl
TrackComp
EO
TI
01
MC3471
02
Function
Write 0
Write 1
Read 0
Read 1
CT.
ell
Ea,
El
VBB
OV
OV
VBB
OV
VBB
VBB
QV
On
Off
Off
Off
Off
On
Off
Off
Erase
Delays
MOTOROLA LINEAR/INTERFACE DEVICES
7-121
II
MC3471P
TEST FIGURES
FIGURE 14 - CENTER TAP OUTPUT VOLTAGE
(PINS 18 AND 20)
10k
20
19
CONDITIONS
VT
S1
S2
S3
VOH (PI8)
On
Off
P 18
VOH (P20)
On
Off
P20
VOL (PI8)
Off
On
P 18
VOL (P20)
Off
On
P 20
17
VT
Sf %52
16
15
14
~"""'v-...loomy,=:,1 OmA
9
Set
Measure
18
30k
11
30 k
V4'
2.0
2.0
0.8
2.0
2.0
0.8
0.8
0.8
0.8
2.0
2.0
2.0
0.8
0.8
2.0
10k
'Volts
FIGURE 15 20
19
ERASE OUTPUT LOW VOLTAGE
(PINS 15 AND 17)
12 V
CONDITIONS
18
•
V13'
0.8
Set
Measure
VT
2.0 V
12 V
Sl
VOL (PI5)
P15
VOL (PI7)
P17
I
I
I
V13
0.8V
20 V
2.0 V
NC
9
12
10
11
r_vv-......-o 4.75 V
30k
30k
FIGURE 16 - TIMING TEST CIRCUIT
10k
+5.0 V ±5%
I!
+24 V ±5%
1
0.1
~F±
~
14
01
100
Inhibit
~
AC
Inputs
30 k
125 k 125 k
30k (01%) (0.1%)
~
Head Select
(01%)
r
l'
8000pF
(01%)
EO
E1
R/W2
11
12
02
01
240
2.0W
240
2.0W
Write Gate
S3oJ.
4000pF
,
20
~
-T
~~.± ±:~
1,
CT1
Write Data
~ IRW SelectR/WI
52
24 k
18 ~,
CTO --0---.
1.2 k
51
24 k
Vaa
VCC
10
r
~F ~ ~ 19
VRef
Gnd
IRef
17
-:--l--- 27~
15
7
2.0W
'\/VIr- +24 V
Lvv-..- +24 V
270 2.0 W
50
6
~
10k(0.1%)
~
1
r
~
3 • 16
50
Notes:
200 pF
1%
Diodes Type 1N4934
Resistors (unless otherwise noted) are 1/4 W 5%
Straddle Erase 51 and 54 Closed
52.53 Open
Tunnel Erase 51 and 84 Open
52, 53 Closed
MOTOROLA LINEAR/INTERFACE DEVICES
7-122
MC3480
Specifications and Applications
Information
DYNAMIC
MEMORY CONTROLLER
MEMORY CONTROLLER FOR 16 PIN 4K, 16K
AND 64K DYNAMIC RAMs
The memory controller chip is designed to greatly simplify the
interface logic required to control the popular 16 pin multiplexed
dynamic NMOS RAMs in a microprocessor system such as the
M6800. The controller will generate, on command from the micro·
processor, the proper timing signals required to successfully transfer
data between the microprocessor and the NMOS memories. The
controller, in conjunction with an oscillator, will also generate the
necessary signals required to insure that the dynamic memories are
refreshed for the retention of data.
• Greatly Simplify the MPU·Dynamic Memory Interface
•
Reduce Package Count and System Access/Cycle Times 30%
• Chip Enable for Expansion to Larger Word Capacity
• Generate 1 of 4 RAS Signals for an Optimum 16K/64K
Memory System
•
High Input Impedance for Minimum Loading of MPU Bus
SCHOTTKY MONOLITHIC
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 623-05
N.-.".
• Schottky TTL Technology for High Performance
• Useful with 4K and 16K and Future Expanded Dynamic RAMs
!;
24
1
P SUFFIX
PLASTIC PACKAGE
CASE 649-03
BLOCK DIAGRAM
Signals
To
PIN CONNECTIONS
MC3232A/
MC3242A
Row Enable
Refresh Enable
Signals
From
MPU
A12/14
A13/15
Address
Decode
MPU
Interface
And
Memory
Ref Clk
Ref Grant
RAn
RAS2
RAS3
RAS4
Control
Logic
Refresh
Logie
Ref Request
CAS
Ce-~====:!..----I
RIW
MC------------------~
RIW ---------l-r-r-r-r-r-r.J
MC t1 t2 t3 t4 t5
Several methods may be employed to generate the required time delay:
1.
2.
3.
One shots
High frequency counters
High frequency shift registers
4.
Delay lines
5.
Signals from MPU Clock
See Pin Descriptions
MOTOROLA LINEAR/INTERFACE DEVICES
7-123
•
MC3480
ABSOLUTE MAXIMUM RATINGS
Rlting
Symbol
Vllue
Unit
VCC
7.0
Vdc
Input Voltage
VI
-0.5 to +7.0
Vdc
Output Voltage
Vo
-0.5 to +7.0
Vdc
Operating Ambient Temperature
Storage Temperature
Operating Junction Temperature
TA
o to +70
Tsta
-65 to +150
°c
°c
°c
Power Supply Voltage
TJ
Ceram ic Package
Plastic Package
175
150
Rating
Power Supply Voltage
Operating Ambient Temperature Range
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted specifications apply over recommended power supply and temperature
ranges)
Symbol
Min
Typ
Max
Unit
I nput Voltage - Low Logic State
VIL
-
O.B
V
Input Voltage - High Logic State
VIH
2.0
Input Current - Low Logic State
IlL
-
-
IIH
-
Input Clamp Voltages
(iIK=IBmA)
VIK
Output Voltage - Low Logic State
(tOL = 24 rnA for RAS, CAS, and RIW)
(tOL = B.O rnA for Row En, Ref En, MC, Ref Req)
VOL
Output Voltage - High Logic State
VOH
Characteristic
(VIL
-
V
-250
!lA
-
40
100
!lA
-
-
-1.5
V
-
-
-
-
0.5
0.5
3.0
2.4
2.4
-
-
-
-
-
-
65
40
-10
-
-55
=0.5 V)
Input Current - High Logic State
tvlH
(VIH
= 2.7 V)
= 5.5V)
V
V
(tOH = -1.0 rnA for RAS, CAS, and RIW)_
(tOH = -0.4 mA for Row En, Ref En, and MC)
10H = -0.2 rnA for Ref Req
(Note: Ref Req output has internal 5.0 k
resistive pullup to VeC'!
Power Supply Current - During R/W or Refresh
- During Idle
ICC
Output Shan-Circuit Current
lOS
(VOL
= 0 V for Row En, Ref En, and MC)
mA
FIGURE 1 - TYPICAL tpT1 3 and4 (HIGH TO LOW) versus
LOAD CAPACITANCE'- RAS, CAS and RIW
40
~
,.
w
>=
>
20
to
~
~
~
VI-'"
V VJ-- V
tPT1. -
~
"z
">=«
--
RAy
30
V V
I-'"tPT3.4
f..-"
f..-"
"
o
o
V
CAS, RNi
VCC = 5.0 Volts
TA=25 0 C
-
10
100
200
300
CL, LOAD CAPACITANCE IpF)
400
,
500
MOTOROLA LINEAR/INTERFACE DEVICES
7-124
rnA
MC3480
SWITCHING CHARACTERISTICS (Unle •• otherwise noted, VCC
~ 5.0 V, TA ~ 25°C
Characteristic
Propagation Delay Times (Full AC Load -
Min
Typ
Max
tpLH(MC)
tPHL(iIilC)
tpTl
-
7.0
9.0
26
21
26
22
30
26
42
50
32
46
30
14
17
40
35
45
45
42
40
58
65
48
55
27
43
to Row En (Refresh)
'0 Row En (R,w)
to Refresh En
}
'1 to Ref Req (Ref only) Note 1
'PT2
'PT3
'PT4
tpT5C
tPT5R
tPT5W
tpT5ER
tpT5E
tpT5F
'pca
'PGS
18
16
17
16
22
19
30
30
25
22
10
20
'PTa
22
60
75
tsu(RC)
tsu(A)
tsu(R,w)
tsu(CE)
tsu(RG)
35
10
33
20
50
-
-
th(A)
th(CEI
th(R,w)
th(MC)
15
0
0
30
-
.-
td(1-2)
td.!1-4)
td(2-3)
td(3-5)
30
33
30
30
-
-
-
-
-
-
tWL(t)
tWH(t)
tW(MC)
'W(RG)
30
30
30
25
-
-
-
-
17
ns
Setup Times (Full AC Load - All Pins)
Ref elk before Ref Grant
A12, A13 before tl
R /W I nput before t4
CE before t1
Ref Grant before t1
-
ns
Hold Times (Full AC Load - All Pins)
A12, A13 after ,5
CE aftertl
RIW after t4
Me Rising after t1 Rising
Minimum Delay Times (Note 1 - Full AC Load t1 Low to High to t2 Low to High
Unit
ns
MC to MC - Low to High
MC to MC - High to Low
tl toRAS
t2 to Row En
t3 to CAS
t4 to R,w
t5 to CAS
toRAS
to R,w
Ref CI k to Ref Req
Ref Grant to Row En
to Ref En
Symbol
All Outputs)
ns
All Pins)
t1 Low to High to t4 Low to High
t2 Low to High to t3 Low to High
t3 Low to High to t5 Low to High
-
ns
Minimum Pulse Widths
Low
t1 through t5
High
MC
Ref Grant
-
Notes: 1. Ref. Req. has an internal 5.0 kf! pullup to Vee. if faster propagation delay is required (tPTO), then an external register can be added in
parallel to the inter.lli!Lone to decrease the propagation delay. The value of resistance needed is a function of the capacitive loaded
connection to Ref. Reg. The minimum value of R that can be used is 5.0 V/B.O rnA = 625 n, assuming there are no other dc loads
connected to that pin.
2. If delays between t1-t5 are less than the minimum specified, the succeeding outputs may not switch.
3. All outputs can drive larger capacitive loads than those shown with a small decrease in speed. See Figure 1.
AC LOADS (Note 3)
RIW and CAS Out uts
RAS Ou uts
Me, Row En, Ref En, and Ref Req Outputs
* Includes probe and jig capacitance.
MOTOROLA LINEAR/INTERFACE DEVICES
7-125
•
MC3480
Name
RAS1
RAS2
RAS3
RAS4
CAS
.
.
RM Out·
Row Address Strqbe pins which connect to each of the dynamic RAMs to latch in row address on memory chips.
Decoded to 1 of 4 during R/W cycle. All 4 go low during refresh cycle.
11
Column Address Strobe pin which connects to each dynamic RAM to latch in column address.
10
This pin signals the dynamic RAM whether the RAM is to be fead from or written into.
9
Ref En
Ii
RM In
Function
16
15
14
13
Row En
CE
•
PIN DESCRIPTION TABLE
No.
22
7
A13(A15)
A12(A14)
17
18
MC
23
Me
1
t1
t2
t3
t4
t5
2
3
4
5
6
Ref Clk
21
Ref Req
20
Ref Grant
19
Row Enable output which goes to the MC3232A (MC3242A). It signals the Address Multiplexer that the lower half
(Row Addresses) or the upper half (Column Addresses) of the address lines are to be multiplexed into the dynamic
RAM address inputs. A Logic 1 on this output indicates the Row Addresses, and a Logic 0 indicates Column Addresses.
Refresh Enable output. A Logic 1 signals the Address Multiplexer that a refresh cycle is to be done, and a Logic 0
indicates that address multiplexing should be done.
Chip Enable Input. A Logic 1 on this pin disables all chip functions, except that of Refresh and the MC output. CE must
be low during tl low to high transition to initiate R/W cycle. Once tl is initiated, the cycle is independent of CEo
The Read/Write input pin receives information from the M6800 MPU as to the direction of data exchange in the
dynamic RAM. It transmits a Logic 0 to the R/W output for a Write Cycle and a Logic 1 for a Read Cycle.
Upper Order Address lines from the M6800. These two inputs decode to four signals controlling the four RAS outputs.
A14 and A15 apply to 16K RAMs.
Memory Clock input from MC6875 clock or other signal source. The rising edge of MC must occur after the rising
edge of t1 to avoid aborting the refresh cycle. When MC rises, it resets an internal flag that will terminate refresh at the end
of the current cycle. Failure to reset the flag forces the 3480 to refresh every cycle thereafter. MC can be connected to
t2 or t3 in noncritical applications.
The buffered complement output of MC. It is a buffered output which may be used to drive the circuitry creating the
time delays used on inputs t1 through t5.
These pins use external timing inputs to sequentia1ly select the outputs to be enabled. They are positive~edge triggered
inputs. Assuming a Read/Write cycle is to be executed, a positive edge on t1 forces a logic 0 on one of the four RAS
outputs as determined by the A 12/14, A 13/15 inputs. After a delay, a positive edge on t2 causes Row En to go to a
Logic 0, providing address-multiplexing information to the MC3232A or MC3242A. t3 enables the CAS output and it
goes low. t4 enables the R/W output and it goes low, assuming the RIW input was low. t5 resets all the outputs to a
Logic 1 (with the exception of MC, Ref En, and Ref Req). The inputs tl, t2, t3, and t5 are daisy-chained, so they must
be sequentially driven to obtain the desired output signals. t4 can be driven at any time after tl.
The 32 kHz (64 kHz) Refresh Clock signals this pin that another refresh cycle is required. It is a positive-edge triggered
input, and upon triggering, the Ref Req pin goes to a Logic o.
The Refresh Request output acts as an input to the MPU system, requesting a refresh cycle. This output has
as kn pullup resistor to the VCC supply to allow wire-ORing if desired.
Through the Refresh Grant input, the MC6875 initiates a refresh cycle. This input is positive~edge triggered and is
enabled only after the Ref Req pin has gone low. This allows the MC3480 to discern between a Refresh Grant or a
DMA Grant even though they appear on the same line. When employing both dynamic memory (refresh) and DMA
in a microprocessor~based system with a combined Refresh/DMA Request control on the clock, provision must be
made for holding off a DMA request during a refresh period (and visa versa). If this provision is not made, clock
stretching (cycle stealing) will continue indefinitely and dynamic micrOprocessor data will be lost. The positive edge
on Ref Grant causes Row En output to go low and Ref En output to go high. This signals the MC3232A (MC3242A)
that a refresh address is required. The refresh cycle occurs with the succeeding pulses on t1 ~t5. A positive edge on t1
causes Ref Aeq to go high and all the RAS outputs to go low. A positive going edge on 12 causes no change in the
outputs, since it controls the address multiplexing (Row En) during the AeadlWrite cycles. Th8~ is no output change
when t3 and t4 go high because no CAS or RIW signal is needed during refresh. A positive edge ~n t5 resets the RAS
and Row En to a Logic 1 state, and Ref En to a Logic 0 state, ready for the next Read/Write cycle.
VCC
Gnd
24
12
+5.0 V supply. A 0.1 /wlF capacitor is recommended to bypass pin 24 to ground.
System Ground.
*These outputs are designed to drive the highly capacitive inputs of multiple dynamic RAMs/(150 pF for RAS outputs, and 450 pF for CAS
and RIW outputs). Consequently, these outputs have no short-circuit limit and must be handled accordingly. Good high capacitance load
driving techniques usually include a 10 n or greater series damping resistor. It is highly recommended that this be done on RAS, CAS and
R/W outputs of the MC3480. The effect of these series damping resistors on rise and fall times must be included in timing considerations.
NOTE: All other outputs are LS/TTL totem-pole configuration unless otherwise noted.
MOTOROLA LINEAR/INTERFACE DEVICES
7-126
MC3480
TIME DELAY INFORMATION
TIMING REQUIREMENT CONSTRAINTS
At1
Minimum is determined by MPU Address Delay (tAO), plus RAM Row Address Set-Up Time (tASR I, minus MC3480
Propagation Delay !tPT1).
At2 - o6t1
Minimum is determined by RAM Row Address Hold Time (tRAH) minus the minimum MC3232A/3242A Row Enable to
Output Delay !tOOM IN I.
At3 - .6t2
Minimum is determined by RAM Column Address Set-Up Time (lASe minimum I plus maximum MC3232A/3242A Row
Enable to Output Delay (t001MAXI.
At4 - .6t3
No Minimum
4t5 - 4t3
Minimum is determined by RAM minimum CAS Pulse Width (teAS) or Access Time from CAS IteAC) plus Data Set-Up Time
of MPU (tDSR).
At5 - o6t4
Minimum is determined by the RAM minimum Write Pulse Width (twp).
Note: Also required in computing time delays are the various delays incurred by the particular delay scheme used; i.e .• delays between
4 x fa. 2 x f o • and fa from the MC6875 which are used as inputs or the gate delays of the gates used in Figures 5A through 5C.
TYPICAL APPLICATION
16K X 8-BIT MEMORY SYSTEM FOR M6800 MPU
Note:
Numbers in parenthesis indicate
part types or values for 16K )( 1 RAMs
Power-On Reset
t
c
•
I
poOR
R
Xt, X2
a~ 1
Js
MPU
System
Clock
Cryst
(4 x MPU
MC6B75
-
fo)
MC
~
Ref
Grant
Raf
Req
Address
Bus
A12, A131A14, A15)
7
'"
MC
~
~
~~
Refresh
Enable
~
AO-A11
7IAO-AI3)
Memory Control
and Timing
MC34BO
Row
Enable
f---.
"'7
Address
Multiplex
f--
Data
Buffer
MC6BBOA
and
~
~ RASi RAS2
Refresh
Counter
MC3232A
IMC3242A)
-OE
~
32 kHz
(64 kHz)
Oscillator
Ref Clk
FiAS3 RAS4
CAS
R/W
Address
Bus
----,
,{;'l
4K x8
MCM4027
(16K x B)
IMCM66t6)
r
00-05
100-06)
~0
4K x 8
116K x BI
1r
~0
4K x 8
(16K x B)
,{7
4K x 8
It6K x B)
1r lr
MOTOROLA LINEAR/INTERFACE DEVICES
7-127
RE
•
C
1
Memory
Array
•
Data
Bus
(Mem
Delay
Circuit
V-
Control
Bus
Clk)
~
~
~
MPU
MC6BOO
<1>2
Data
Bus
MC3480
FIGURE 2 - READ/WRITE TIMING CYCLE
Ref elk
Ref Grant
A~ In~---t-------------t--------------------__~---t----~-----------l
A12/A14 ~r+,,~rrT7~
(13) (15)
Sys
elk
•
AAS ---+---------..
CAS---t--------------------+-------,
A/WOu'
Row En
---t--------------------+--------------------t..~------_+~~~
---t----------------------,
AM En---t-----------------------------------------------------------l
~
= Don't care.
NOTE 4: Although t1 and Ci are shown as don't care after their respective minimum hold times, t1
may rise again after the initial rising edge in a R/W cycle only if CE Is low. Bringing t1 high
8 second time during a cycle when ~ is high will improperly terminate the cycle.
MOTOROLA LINEAR/INTERFACE DEVICES
7-128
MC3480
FIGURE 3 - REFRESH TIMING CYCLE
I---------------Refresh Cycle----------------i
RefClk
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~R
~~~~~~~~~~~~~~~~~~~~~~~~W
-~----~------------------------+_-----------------------_i--------t_--
High
Low
--~----~------------------------------------------------_;--------t_-
MOTOROLA LINEAR/INTERFACE DEVICES
7-129
Read
MC3480
APPLICATIONS INFORMATION
systems, the timing signals required can be directly
obtained from those available from the microprocessor. In
systems requiring high speed memory/microprocessor
cycle times, timing input t-l·t5 can be obtained using
delay lines or a range of techniques as shown in Figures 4
thru 8. It is only necessary to maintain the time delay
relationships shown under time delay information.
GENERAL DESCRIPTION
The MC3480 uses five general timing inputs in place of
a master clock with on·chip timing generation. This gives
the system designer optimum flexibility in interfacing
with the various microprocessor families and dynamic
memories that are available. In simpler slow speed
FIGURE 4 - UNIVERSAL TIME DELAY USING MC6875
READ/WRITE CYCLE
•
From MC6875
~
MC
~
f---t1
1--4"-
,2
f--A'2
t3
I--A'3
,4
1--4'4
t5
f--A'5
N :;
MC3480
RAM
r-.r--
Row En
NOTE: t4 can be tied to t3 instead of 2f o •
giving a longer write pulse width.
RAM
Address
Inputs
'Iii '/j//~/
(AO-A6l \
r-
A6-A11
~
(A7-AI3l
v---
Read
RIW
\ '-
_____ J
Write
MOTOROLA LINEAR/INTERFACE DEVICES
7-130
MC3480
FIGURE 5 - ALTERNATE TIME DELAYS USING MC6875
(ReadlW,it. Cyel. Shown)
5A
4fo
2fo
MC
From MC6875
--"-'
o
,1
~
0
N
0
~
MC3480
RAM
,2
,3
,4
,5
RAS
Row En
Gate MC7400
RAM
A6- AT1
Address
Inputs
IA7 - A13)
erAS
,
---r--------------------------~--------+r------Aead
R/W
\' - _ _ _ J
Write
58
4fo
2fo
---
From MC6875
MC
000
~N;
RAS
Row En
MC3480 RAM
-+------,
Gates-MC7400
--+-----------------,.
RAM
Address
Inputs
CAS
+6 V
A6 - All
IA7- A13)
--+--------------------__
RIW
Read
\ ______ j
Write
MOTOROLA LINEAR/INTERFACE DEVICES
7-131
MC3480
FIGURE 5C - ALTERNATE TIME DELAYS USING MC6875
READIWRITE CYCLE
4fo
2fo
MC
I
-
From MC6875
~
U
0
0
;:Et;;;
MC34BO
,'---t1
Llt1 Llt2
t3
Llt3
t4
Llt4
t5
Llt5
r--
RAS
,
NOTE: Me of MC3480 is delayed by
two gate delays after 11 to
r--
Row En
satisfy Me after t1 Hold Time,
th(MC)·
RAM
Address
Inputs
//,; WI//////X
AO- A5
(AO- A6)
A6 - A11
(A7 - A13)
R/W
r-'---
,--
CAS
I
\
~
•
r---
t2
____ J
Read
Write
MOTOROLA LINEAR/INTERFACE DEVICES
7-132
MC3480
FIGURE 6 - ONE SHOT TIME DELAY METHOD
+5 V
Me
I
t1
~
t2
~
t3
~
t4
~
L
MC3480
RAM Controller
!.--- ~t1---,
k----tlt2
t5 --'
k-----~t3
r------~t4
V-
l'---~t5
RAS
II
Row En
II
RAM
Address
Inputs
0 W'A
AO - A5
A6-A11
~
(A7 - A13)
(AO
AS)
Memory Clock
From MC6875
or Suitable
Clock Signal
Ii
1L
VRead
R/W
\' - _ _ _ _ .J
Write
2 MC9602s
NOTE: t4 can be tied to t3 and the
4th 1-shot can be used
elsewhere.
MOTOROLA LINEAR/INTERFACE DEVICES
7-133
MC3480
FIGURE 7 - DELAY LINE TIME DELAY METHOD
READ/WRITE CYCLE
L
tl--'~4tl~
t2
MC3480
RAM Controller
II
Row En
--t--------"""'\
or Suitable
Clock Signal
RAM
,.--::-::-~;--'"\
Addres.'0 / ///
AO - A5
Inputs
/,'LLJ///,,'//.LJJ'//'
(AO - A6)
I"/,,......
CAS
/1',
r-t--t-::-::--:-::-:-'"\
A6 - Al1
(A7 - A13)
r
NOTE: t4 can be tied to t3 and the
4th delay element can be
-+---------'"\
eliminated.
R/W ---t-------------~-----tr-R •• d
1\..------'
Write
MOTOROLA LINEAR/INTERFACE DEVICES
7-134
MC3480
FIGURE 8 - DELAY LINE TIME DELAY IAL TERNATE METHOD)
READIWRITE CYCLE
MC
"I
" ----,2
-
Memory Clock
At1
~
At2
t3
t5
RAM
I'---
At4
~
MC3480
Controller
I'---
At3
,4
From MC6875
or other Suitable
Clock Signal
I'---
I'--1,---
A,5
1,--1\
r--
Row En
NOTE: Me of MC34BO is delayed by
RAM
Address
Inputs
1;, ~/////&
AO-A5
IAO-A6)
A6- All
IA'- A13)
two gate delays after t1 to
r-
satisfy Me after t1 Hold Time,
thIMC)·
'-rRead
R/W
I
\ _ _ _ _ _ _ ..J
REFRESH CONSIDERATIONS
The MC3480/MC3232A (MC3242A) memory control
system can be used with either cycle steal or transparent
refresh methods. Figure 9 shows one transparent tech·
nique employing refresh during ",2 low in an M6800
microprocessor·based system. Using this technique requires
that the memory be capable of completing a ReadlWrite
Cycle and a Refresh Cycle sequentially during the M6800
cycle. The minimum cycle time at the time of printing for
dynamic multiplexed RAMs is 320 ns, therefore limiting
the microprocessor to 1.56 MHz operation. The D flip·
flops of Figure 9 produce a trigger at the beginning of
both ",1 and "'2. For a 1.~ MHz system, the tl-t5 inputs
should be adjusted for the following delays:
Write
the four monostables. For the 1.0 MHz system, it would
reql1ire either two 5 tap delay lines with 50 ns per tap or a
10 tap line with 50 ns/tap. For use with a 600 kHz
system, a delay line Vo(ith 5 taps of 150 ns each could be
used. For this case:
RAS falls at 150 ns
Row En falls at 300 ns
CAS, RIW falls at 450 ns
t5 rises at 750 ns
Figure 10 shows typical refresh oscillator configurations
for both 32 kHz(fREFmin for4K) and 64 kHz (fREFmin
for 16K). In the case of transparent refresh, if the designer
is not concerned with power consumption, the refresh
oscillator may be eliminated and the Ref Clk input can·
nected to the MC input yielding a refresh every "'1.
For DMA operation combined with cycle stealing
refresh, care must be taken not to allow a DMA request
during a Refresh Request/Grant period and to hold off a
refresh during a DMA operation. See comments under pin
descriptions, Pin 19.
RAS falls at 150 ns (triggered by tl)
Row En falls at 250 ns (triggered by t2)
CAS, RIW falls at 300 ns (triggered by t3)
t5 rises at 500 ns.
A delay line could be used to generate tl-t5 in place of
MOTOROLA LINEAR/INTERFACE DEVICES
7-135
II
MC3480
FIGURE 9 - EXAMPLE OF 2 LOW METHOO OF HIOOEN REFRESH
USING MC3480 ANO 4K RAMS
A12
A13
RIW
CE
MC
u
'8'
~
.
~
,
.
In
::>
:;
II
A12
AAS 1
A13
RAS 2
A/W In
RAS 3
CE
MC3480
RAS 4
MC
1~
O, ••
m" M_.,,,,
CAS
Ref Req
r
L------lf--.---i 0
S
#1
c
A
Q
CO
L
+5 V
+5 V
-;"C86;;-2 - -..,
I
I
I
*This inverter can be eliminated and the clock
input of "0" Fllp·Flop #2 connected to Me
on the MPU Bus. The Inverter Is used to
provide minimum loading of the
Me
line when
multiple connections are made to that line in a
large svste~.
+5 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-136
®
MC3481
MC3485
MOTOROI.A
IBM 360/370
QUAD LINE DRIVER
QUAD SINGLE-ENDED LINE DRIVER
SILICON MONOLITHIC
The MC3481 and MC3485 are quad single-ended line drivers
specifically designed to meet the IBM 360/370 I/O specification
(GA22-6974-3).
Output levels are guaranteed over the full range of output load
and fault conditions. Compliance with the IBM requirements for
fault protection, flagging, and power up/power down protection for
the bus make this an ideal line driver for party line operations.
•
Separate Enable and Fault Flags -
•
Common Enable and Fault Flag -
•
Power Up/Down Does Not Disturb Bus
•
Schottky Circuitry for High-Speed -
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
MC3481
MC3485
PNP Inputs
• Internal Bootstraps for Faster Rise Times
•
Driver Output Current Foldback Protection
•
MC3485 has LS Totem Pole Driver Output
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
1
MC3485
COMMON ENABLE
COMMON FAULT FLAG
MC3481
DUAL ENABLE
INDIVIDUAL FAULT FLAG
Driver Output A
~
Fault Flag A
Driver Output A
Driver Output 0
Driver Output A
Driver Output 0
Input A
Driver Output 0
Fault Flag 0
Input A
Enable AS
Vee
Input 0
...
Enable ABeD
Fault Flag B
'"
InputC
Driver Output B
....
Fault Flag C
'"
Vee
... ~-+-H-+..J
Input 0
Input 8
'"
Fault Flag
(Open Collector)
Driver Output B
a>
Input C
Driver Output B
....
Driver Output C
Enable CD
Input B
~
..,
Driver Output C
TYPICAL APPLICATION
1/4 MC3481 or
1/4 MC3485
r-------,
I
I
I
117 MC7512517
118 MC75128/9
Coaxial
Cable
r---"
I
:
I
I
I
L ______ j
MOTOROLA LINEAR/INTERFACE DEVICES
7-137
Driver Output C
II
MC3481, MC3485
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Typ
Max
Unit
Power Supply Voltage
Vee
4.5
5.0
5.95
Vdc
High Level Output Current
10H
-
-
-59.3
rnA
Operating Ambient Temperature Range
TA
0
-
+70
°e
Characteristic
ELECTRICAL CHARACTERISTICS (Unless otherwise noted, these specifications apply over recommended power supply and
temperature ratings Typical values measured at TA:: 25°C and Vee::: +5.0 V)
MC3481
Symbol
Min
High-Level Input Voltage Note 2
VIH
2.0
Low-Level Input Voltage Note 2
Vil
High-Level Input Current
IIH
Characteristic
(Vee 0 4.5 V, VIH 0 2.7 V) - Input
Enable
(Vee 04.5 V, VIH 0 5.5 V) - Input
Enable
Low-Level Input Current
-
Typ
MC3485
Max
Min
Typ
-
--
2.0
-
-
08
-
Max
0.8
-
Enable
Input Clamp Voltage
-
-
20
40
100
200
-
._.
-
-
-
-
V
-
-
-
-
-250
-500
-
-
-
-
-250
-1000
-
-1.5
-
-
-1.5
-
3.11
3.9
3.6
-
20
80
100
400
pA
. _ . ~--
---
V
Vie
(Ile o -18 rnA)
V
pA
IlL
(Vee 05.95 V, Vil 00.4 V) . Input
Unit
-
V
High-Level Driver Output Voltage
(Vee 0 4.5 V, VIH 0 2.0 V, 10H 0 -59.3 rnA)
(Vee 05.25 V, VIH 0 2.0 V, 10H 0 -41 rnA)
VOH(D)
VOH(DS)
3.11
3.9
3.6
VOL(D)
VOl(DS)
-
-
+015
+0.15
-
-
-
-
-
10S(D)
10S(DS)
-
-
-
-
-
-
-5.0
-5.0
-
-
-5.0
-5.0
10Rl
IOR2
-
-
+100
+200
-
-
+100
+200
2.5
3.0
-
-
-
V
Low-Level Dnver Output Voltage
(Vee 05.5 V, Vil 0 0.8 V, 10l 0 -240 pA)
(Vee 05.95 V, Vil 0 0.8 V, 10l 0 -1.0 mAl
+0.15
+0.15
Driver Output Short Circuit Current
mA
(Vee 05.5 V, VIH 0 2.0 V, VOg.o 0 V)
(Vee 05.95 V, VIH 02.0 V, VOS 0 0 V)
Driver Output Reverse Leakage Current
(Vee 0 4.5 V, Vil 0 0 V, Vo 0 3 11 V)
(Vee 0 0 V, Vil 00 V, Vo 0 3.11 V)
High-Level Driver Output Voltage
pA
VOH(D)
V
(Vee 04.5 V, Vil 0 0.8 V, 10H 0 -400 MAl
Low-Level Driver Output Voltage
VOl(D)
-
-
-
-
0.5
V
(Vee 04.5 V, VIH 0 2.0 V, 10l 0 +8.0 rnA)
Driver Output Short Circuit Current
(VCC'" 5.5 V, VOS::: 0 V, only one output shorted
at a time)
(VCC'" 5.95 V, VOS::: 0 V, only one output shorted
at a time)
High-Level Fault Flag Output Voltage
mA
IOS(5)
-
-
-
-15
10S(OS)
-
-
-
-15
-
VOH(F)
2.5
3.0
-
-
-
-
V
VOl(F)
-
-
0.5
-
-
0.5
V
10S(F)
-15
-
-100
-
-
-
10S(i'S)
-15
-
-110
-
-
-
10H(F)
-
-
-
-
leeH
leeHS
-
50
70
80
-
55
leel
leelS
-
35
55
70
-
35
-60
-100
-110
(Vee 0 4.5 V, 10H 0 -400 pAl
Low-Level Fault Flag Output Voltage
(Vee 0 4.5 V, VIH 0 2.0 V, 10l 0 +8.0 rnA,
Driver Output shorted to Ground
rnA
Fault Flag Output Short Circuit Current
(Vee 05.5 V, VOS 0 0 V, only one output shorted
at a time)
(Vee 05.95 V, Vos 0 0 V, only one output shorted
at a time)
High-Level Fault Flag Output Current
-
+100
pA
(Vee 05.95 V, VOH 0 5.95 V)
High-Level Power Supply Current
rnA
(Vee 05.5 V, VIH 0 2.0 V, no output loading)
(Vee 05.95 V, VIH 0 2.0 V, no output loading)
-
-
75
85
Low-Level Power Supply Current
rnA
(Vee 05.5 V, Vil 0 0.8 V, no output loading)
(Vee 05.95 V, Vil 0 0.8 V, no output loading)
-
MOTOROLA LINEAR/INTERFACE DEVICES
7-138
-
-
55
70
MC3481, MC3485
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
VCC
+7.0
V
Input Voltage
VI
10
V
Driver Output Voltage
Vo
5.5
V
PD
mW
1/R8JA
1150
962
7.7
mW/oC
TA
o to +70
°c
TJ
+175
+150
°c
Tstg
-65 to +150
°c
Power Supply Voltage
Power Dissipation (Package limitation)
Derate Above TA
Ceramic Package
Plastic Package
=25°C
Operating Ambient Temperature Range
Junction Temperature
Ceramic Package
Plastic Package
Storage Temperature Range
SWITCHING CHARACTERISTICS (See Note 1 Unless otherwise noted, these specifications apply over recommended temperature
range. 110 Driver characteristics are guaranteed for Vee = 5.0 V ±1 0% and Select-Out Driver characteris~cs are guaranteed forVCC= 5.25
to 5.95 V. Typical values measured at TA ::: 25°C and Vee::: 5.0 V. See Tables 1 and 2, Figures 1 and 2 for load conditions.)
Characteristics
Symbol
Min
Typ
Max
Propagation Delay Time
ns
High-to-Low-Level, Driver Output
As I/O Driver
As Select~Out Driver
Low·to-High·Level, Driver Output
As 1/ 0 Driver
As Select-Out Driver
High-to-Low-Level. Driver Output
As 1/ 0 Driver
As Select-Out Driver
Low~to-High-Level, Driver Output
As 110 Driver
As Select-Out Driver
High-to-Low-Level, Fault Flag - MC3481
As 110 Driver
As Select-Out Driver
Low-to-High-Level, Fault Flag - MC3481
As 110 Driver
As Select-Out Driver
Ratio of Propagation Delay Times
As 1/0 Driver
Note 1. Reference IBM
Unit
specification'GA22~6974-3
tpHL(D)
tpHL(DS)
-
18
19
-
tPLH(D)
tpLH(DS)
-
20
21
-
tPHL(D)
tPHL(DS)
-
25
26
-
tPLH(D)
tpLH(DS)
-
25
26
-
tpHL(F)
tPHL(FS)
-
45
47
-
tPLH(F)
tpLH(FS)
-
40
42
-
tPLH(D)
tPHL(D)
-
1.0
-
-
-
for test terminology.
2. The fault protection circuitry of the MC3481/85 requires relatively clean input voltage waveforms for current operation. Noise pulses which enter the
threshold region (0.8 to 2.0 V) may cause the output to enter the fault protect mode. To exit the protect mode, it is necessary to gate an input of the
effected driver to the low logic state.
MOTOROLA LINEAR/INTERFACE DEVICES
7-139
II
MC3481, MC3485
FIGURE 1 -
MC3481 AC TEST CIRCUIT AND WAVEFORMS
VIH = 3.0 V
\ - . . - -.....- - '.......----------t-<>
=!=
.. Load Capacitance shown includes
Input Amplitude
Fault Flag Output
CL ~ 15 pF*
Fixture and Probe Capacitance
:j:
Input tTLH
~6
ns
'S;6 ns
Input tTHL
~6 ns
S;6 ns
50
90
Load Resistance (RLl
See Table 2
tTLH
tTHL
4.0V-----90%
Input
1.3 V
OV-----JI
90%
PW.
10%
1.3 V
10%
tpLH(D)
tPLH(DS)
tpLH(D)
tPLH(DS)
Normal
Operation
Driver Output
0.5 V
tpHL(DS)-+---~
1------1- tpLH(D)
tPHL(D)
tpLHiDS;
Driver Output
Driver
]
MOTOROLA LINEAR/INTERFACE DEVICES
7-141
Select-Out
VOH
Short
Circuit
Operation
®
MC3486
MOTOROLA
QUAD EIA-422/423 LINE RECEIVER
Motorola's Quad EIA-422/3 Receiver features four independent
receiver chains which comply with EIA Standards for the Electrical
Characteristics of Balanced/Unbalanced Voltage Digital Interface
Circuits. Receiver outputs are 74LS compatible, three-state structures which are forced to a high impedance state when the appropriate output control pin reaches a logic zero condition. A PNP
device buffers each output control pin to assure minimum loading
for either logic one or logic zero inputs. In addition, each receiver
chain has internal hysteresis circuitry to improve noise margin
and discourage output instability for slowly changing input waveforms. A summary of MC3486 features include:
• Four Independent Receiver Chains
fI
• Three-State Outputs
• High Impedance Output Control Inputs
(PIA Compatible)
QUAD EIA-422/3 LINE RECEIVER
WITH THREE-STATE
OUTPUTS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
D SUFFIX
• Internal Hysteresis -30 mV (Typ)@ZeroVoltsCommon Mode
PLASTIC PACKAGE
CASE 7518-03
SO-16
• Fast Propagation Times -25 ns (Typ)
• TTL Compatible
• Single 5.0 V Supply Voltage
• DS 3486 Provides Second Source
PSUFFIX
PLASTIC PACKAGE
CASE 648-06
PIN CONNECTIONS
RECEIVER CHAIN BLOCK DIAGRAM
o iffarentlsl
Inputs
Three-State
Control
Input
Output
Inputs
A
Inputs
Output
A
3-5tate
Control
A/C
B
OutPut
B
3-5t8t_
12 Control
BID
OutPut
C
Inputs
C
Inputs
o
ORDERING INFORMATION
I
DEVICE TEMPERATURE RANGE
o to +70o C
MC3486L
o to +70u C
MC3486P
MOTOROLA LINEAR/INTERFACE DEVICES
7-142
I
PACKAGE
Ceramic DIP
Plastic DIP
MC3486
ABSOLUTE MAXIMUM RATINGS
Rating
Power Supply Voltage
Input Common Mode Voltage
Input Differential Voltage
Three-State Control Input Voltage
Output Sink Current
Symbol
Value
Unit
VCC
VICM
VIO
VI
8.0
±15
Vdc
Vdc
Vdc
Vdc
rnA
10
T stg
Storage Temperature
Operating Junction Temperature
±25
8.0
50
-65 to +150
TJ
°c
uc
+175
+150
Ceramic Package
Plastic Package
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage
Operating Ambient Temperature
Input Common Mode Voltage Range
Input Differential Voltage Range
Symbol
Value
Unit
VCC
TA
4.75 to 5.25
o to +70
Vdc
VICR
VIOR
-7.0 to +7.0
6.0
Vdc
Vdc
°c
ELECTRICAL CHARACTERISTICS (Unless otherwise noted minimum and maximum limits apply over recommended temperature
and power supply voltage ranges. Typical values are for TA = 25°C. VCC = 5.0 V and VIK = a V.
See Note 1 )
Characteristic
Min
Typ
VIH
2.0
-
-
V
Input Voltage - Low Logic State
(Three-State Control)
VIL
-
-
0.8
V
-
-
0.2
-0.2
-
-
-3.25
-1.50
+1.50
+3.25
Differential Input Threshold Voltage, Note 2
(-7.0 V '" VIC'" 7.0 V, VIH = 2.0 V)
(10 = -0.4 mA. VOH " 2.7 V)
(10 = 8.0 mA, VOL" 0.5 V)
VTH(O)
Input Bias Current
(VCC = 0 V or 5.25) (Other Inputs at 0 V)
(VI = -10 V)
(VI = -3.0 V)
(VI = +3.0 V)
(VI = +10 V)
IIB(O)
Input Balance and Output Level
(-7.0 V '" VIC'" 7.0 V. VIH = 2.0 V. Note 3)
(10 = - 0.4 rnA. VIO = 0.4 V)
(10 = 8.0 rnA. VIO = -0.4 V)
Output Third State Leakage Current
(VI(O) = + 3.0 V, VIL = 0.8 V. VOL
(VI(O) = -3.0 V, VIL = 0.8 V. VOH
Output Short-Circuit Current
(VI(O) = 3.0 V, VIH = 2.0 V. Vo
10Z
= 0.5 V)
= 2.7 V)
= 0 V,
Unit
V
mA
-
--
2.7
-
V
VOH
VOL
-
-
lOS
-
-
0.5
-
-40
pA
-
-100
rnA
-
-
-100
pA
-
20
100
-1.5
V
85
rnA
-15
40
Note 4)
Input Current - Low Logic State (Three-State Control)
(VIL = 0.5 V)
IlL
Input Current - High Logic State (Three-State Control)
(VIH = 2.7 V)
(VIH = 5.25 V)
IIH
Input Clamp Diode Voltage (Three-State Control)
(11K = -10 mAl
VIK
-
-
ICC
-
-
-
Power Supply Current
(VIL = 2.0 V)
NOTES:
1.
2.
3.
4.
Max
Symbol
Input Voltage - High Logic State
(Three-State Control)
p,A
All currents into device pins are shown as positive, out of device pins are negative. All voltages referenced to ground unless otherwise noted.
Differential input threshold voltage and guaranteed output levels are done simultaneously for worst case.
Refer to EIA-422/3 for exact conditions. Input balance and guaranteed output levels are done simultaneously for worst case.
Only one output at a time should be shorted.
MOTOROLA LINEAR/INTERFACE DEVICES
7-143
II
MC3486
SWITCHING CHARACTERISTICS (Unl ... otherwise noted VCC = S.O V end TA = 2So C.1
Characteristic
Propagation Delay Time - Dlffa,.ntlal
Inputs to OutPUt
(Output High to Lowl
(Output Low to Highl
Propagation Delav time - Three·Stata
Control to Output
(Output Low to Third Statal
(Output High to Third Statel
(Output Third State to Hlghl
(Output Third State to Lowl
Symbol
Typ
Min
-
tPHL(DI
tpLH(DI
Max
-
-
Unit
ns
35
30
n.
-
-
tPLZ
tPHZ
tpZH
tpZL
-
35
35
30
30
FIGURE 1 - SWITCHING TEST CIRCUIT AND WAVEFORMS
Propagation Oelay Differential Input to Output
To Scope
(Output)
To Scope
(Input)
Inputs
VOH
-----hr-----,
VOLOutput
and Stray
OV-----------
Capacitance)
+1.5 V
I"put Pulse Characteristics
tTLH = tTHL = 6.0 n. (10% to 90%)
PRR = 1.0 MHz, 50" Dutv Cycl.
+2.0 V
FIGURE 2 - PROPAGATION DELAY THREE·STATE CONTROL INPUT TO OUTPUT
To Scope
Input Pulse Characteristics
tTLH = tTHL = 6.0 n. (10% to 90%)
PRR = 1.0 MHz, 50% Duty Cycle
(Input) 3-State
To Scope
(Output)
Pulse
Generator
+1.5 V for tpHZ and tpZH
-1.5 V for tpLZ and tpZL
Differential
SW1
2.0 k
+5.0 V
>--+----~----~--~--~~wv--~~~
All Diodes 1N916 or
Inputs
CL = 15 pF
(Includes
Probe and Stray
Capacitance)
oV
1.6V
-., I
lSW2
Ein
SW1 Closed
tpLZ
SW2 Closed
"'1.3V~
1.5 VI SW1 Closed
v::- ~:::;-
.Eout
OUtput
VOL
-=
3.0V
1.6V
- -
Equivalent
5.0 k
tpHZ
3'0v~tPLZ
Input
I
0.5 V
A:l1.3 V=-=-=--_ _ _ _ _ _ 0 V
---l-;p--;;---OV
tpZL
3.0 V
Input 3'OV~
1.6 V 1.6 V SW1 Open
Input
OV~--SW2Closad
tpZH
"'5.0 V _ VBE
VOH
1.5V
Output
OV---
1.5 V
OV--
_--=='- r-
~
SW1 Closec:t
SW20pen
tpZL
~
VOL _ _ _ _ _ _ - - O V
MOTOROLA LINEAR/INTERFACE DEVICES
7-144
®
MOTOROLA
MC3487
QUAD EIA-422 LINE DRIVER
WITH THREE-STATE
OUTPUTS
QUAD LINE DRIVER WITH
THREE-STATE OUTPUTS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Motorola's Quad EIA-422 Driver features four independent
driver chains which comply with EIA Standards for the Electrical
Characteristics of Balanced Voltage Digital Interface Circuits. The
outputs are three-state structures which are forced to a high
impedance state when the appropriate output control pin reaches
a logic zero condition. All input pins are PNP buffered to minimize
input loading for either logic one or logic zero inputs. In addition,
internal circuitry assures a high impedance output state during
the transition between power up and power down. A summary
of MC3487 features include:
L SUFFIX
CERAMIC PACKAGE
CASE 620-10
DSUFFIX
PLASTIC PACKAGE
CASE 751 8-03
SO-16
• Four Independent Driver Chains
• Three-State Outputs
• PNP High Impedance Inputs (PIA Compatible)
• Fast Propagation Times (Typ 15 ns)
II
P SUFFIX
• TTL Compatible
• Single 5 V Supply Voltage
• Output Rise and Fall Times Less Than 20 ns
PLASTIC PACKAGE
CASE 648-06
• DS 3487 Provides Second Source
PIN CONNECTIONS
Input A
Outputs
DRIVER BLOCK DIAGRAM
16 Vee
1
A{~
"
Input 0
::} Outputs 0
AlB Control 4
12 C/O Control
Outputs B {:
Input B
::} Outputs C
7
•
Gnd 8
Input
Input C
Outputs
TRUTH TABLE
Inverting
Inverting
Output
Input
Non-Inverting
Output
H
H
H
L
L
H
L
H
L
Z
Z
Control
Input
X
L = Low Logic State
MOTOROLA LINEAR/INTERFACE DEVICES
7-145
H
~
X
= Irrelevant
Z
~
High Logic State
Third-5tate (High Impedance)
•
MC3487
ABSOLUTE MAXIMUM RATINGS
Rlth"
Power Supply Voltage
Symbol
Value
Unit
VCC
8.0
Vdc
Input Voltage
VI
5.5
Vdc
Operating Ambient Temperature Range
TA
o to +70
°c
Operating Junction Temperature Range
TJ
DC
Ceramic Package
Plas~ic Package
175
150
Storage Temperature Range
°c
-65 to +150
T stg
ELECTRICAL CHARACTERISTICS IUnless otherwise noted specifications apply 4.75 V" VCC" 5.25 V and OOC" T A" 700 C.
Typical values measured at
Ch.racteristic
Low Logic State
Vee = 5.0 V, and TA
=
2SoC.)
Symbol
Min
Typ
VIL
-
-
Input Voltage - High Logic State
VIH
2.0
Input Current
Low Logic State
IlL
-
Input Current - High Logic State
IIH
-
+50
+100
VIK
-
-1.5
V
Output Voltage - Low Logic State
IIOL =48 mAl
VOL
-
-
0.5
V
Output Voltage - High Logic State
IIOH = -20 mAl
VOH
2.5
-
.-
V
lOS
-40
-
-140
-
-
-
,100
,,00
Input Voltage
Max
0.8
Unit
Vdc
-
-
Vdc
-
-400
"A
IVIL = 0.5 V}
IVIH = 2.7 V}
IVIH = 5.5 V}
Input Clamp Voltage
111K=-18 rnA}
Output Short-Circuit Current
(VIH
=
"A
mA
2.0 V, Note I)
Output Leakage Current - Hi-Z State
(VIL = 0.5 V, VILlZ) = 0.8 V}
(VIH = 2.7 V, VIL(Z) = 0.8 V}
10LIZ}
Output Leakage Current - Power OFF
10L(off}
(VOH = 6.0 V, VCC =0 V)
(VOL = ~.25V, VCC = 0 V)
"A
"A
-
Outpul Offset Voltage Difference (Note 2)
Output Differential Voltage (Note 2)
Output Differential Voltage Difference (Note 2)
Vas-Vas
-
-
VOD
2.0
IAVODI
-
+100
-100
±0.4
V
-
V
±0.4
V
Power Supply Cu rrent
(Control Pins
(Control Pins
=
=
mA
Gnd, Note 3)
2.0 V)
ICCX
ICC
-
-
105
85
Notes: 1, Only one output may be shorted at a time.
2. See EIA Specification EIA-422 for exact test conditions.
3. Circuit in three-state condition.
SWITCHING CHARACTERISTICSIVCC = 5 0 V TA = 25 0 C unless otherwise noted}
Characteristic
Symbol
Min
Typ
Max
-
-
20
20
Unit
ns
Propagation Delay Times
High to Low Output
Low to High Output
tpHL
tPLH
-
-
-
-
ns
Output Transition Times - Differential
High to Low Output
tTHL
tTLH
Low to High Output
-
-
-
-
-
-
-
-
20
20
ns
Propagation Delay - Control to Output
(RL = 200 n, CL = 50 pF)
(RL = 200 n, CL = 50 pF)
(RL = 00, CL = 50 pF)
(-RL = 200 n, CL = 50 pF)
tPHZ(E}
tp'LZ(E}
tpZH(E}
tPZL(E}
MOTOROLA LINEAR/INTERFACE DEVICES
7-146
-
25
25
30
30
MC3487
FIGURE 1 - THREE-IITATE ENABLE TEST CIRCUIT
AND WAVEFORMS
3,0 V or Gnd
To Scope (I nput)
To Scope
Output
Input
Inv
Output
Pulse generator characteristics
Zo;; 50
Open for tPZH(E) Test Onlv
n
~.5V
PRR" 1.0 MHz
Non-Inv
Output
50% Duty CYcle
200
l~~
tTLH, tTHL.e;;;; 5 ns
n
Pulse
50
Generator
1 N3064
pF
or Equivalent
1.0 k
~
Jig Capacitance
-----,-------3.o V
Control
Input
/
Input
-0
tPLZIE)
Output
\
Output
VOH
-
1.5 V
'------VOL
-1,.
----------+--+----------0 V
"';',5 V
tPZHIE)-
~""'5ii
~-------- VOH
5V
Output
0.5 V
/
==========~--------OV
VOL
OV
FIGURE 2 - PROPAGATION DELAY TIMES INPUT TO
OUTPUT WAVEFORMS AND TEST CIRCUIT
Scope
(Output)
Scope
5.0 V
Inv
Output
(Input)
1/4
MC3487
Pulse
Generator
51
Non-Inv
Output
1N914or
Equivalent
Pulse generator characteristics
2 0 ;; 50 n
PRR"" 1.0 MHz
Control
3.0V
50% Duty Cycle
CL includes probe
tTLH. tTHL ~ 5 ns
3.0 V
i,.5 V
tpZLIE)-
~~
Test Only
-------~'_+-------------o
tPHZIEI
0.5 V
tpzU'E)
r-------
Control
Output
Open for
1
CL Includes Probe and
, - - - - - - - . , . - - - - 3.0 V
and jig capacitance
Input
'----OV
Output
VOL
----+--+------+--+--- 0V
Output
VOL
----------------------- 0 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-147
..
II
MC3487
FIGURE 3 - OUTPUT TRANSITION TIMES TEST CIRCUIT AND WAVEFORMS
Scope
Input
Input
RL =
10D.(l
r--\-3.0V
~:~::t
~
(Diffe,ential)
Lov
TeL
3.0 V
-=
CL includes probe
and
jig
capacitance
Pu Isa generator characteristics
Zo;; 50 n
PRR == 1.0 MHz
50% Duty Cycle
tTLH. tTHL" 5 ns
FIGURE 4 - OUTPUT CURRENT versus OUTPUT VOL TAGE
FIGURE 5 - OUTPUT SINK CURRENT versus OUTPUT VOL TAGE
80
80
"~
70
".5
~
.5
60
7LrCC'~25V
(Typical)
50
t'<~
40
::>
30
~
20
0
I
o
I
1.0
i:l
"z
;;;
'\ \,
\ \ \
TA' 25°C
10
o
~
VCC' 5.0V-
./ vcc' ~.75V_
i'-."'\ :9
::>
...u
...~
I
\.\ L,
2.0
3.0
~
..:.
E
70
VOH. OUTPUT VOLTAGE (VOLTSI
TA:= 25°C
(Typical)
/
40
V
30
20
10 I - - -
r-/
100
/
200
/
300
400
500
600
VOL. OUTPUT VOLTAGE-LOW (mVI
MOTOROLA LINEAR/INTERFACE DEVICES
7-148
I---
I
50
o
o
4.0
I
VCC·5.0V
60
700
800
®
MC3488A
MOTOROLA
DUAL
EIA-423/EIA-232C
DRIVER
DUAL EIA-423/EIA-232C LINE DRIVER
The MC3488A dual single-ended line driver has been designed
to satisfy the requirements of EIA standards EIA-423 and EIA-232C.
as well as CCITT X.26. X.28 and Federal Standard FIDS1030. It is
suitable for use where signal wave shaping is desired and the
output load resistance is greater than 450 ohms. Output slew rates
are adjustable from 1.0 JLs to 100 JLS by a single external resistor.
Output level and slew rate are insensitive to power supply variations. Input undershoot diodes limittransients below ground and
output current limiting is provided in both output states.
The MC3488A has a standard 1.5 V input logic threshold for
TTL or NMOS compatibility.
• PNP Buffered Inputs to Minimize Input Loading
• Short Circuit Protection
SILICON MONOLITHIC
INTEGRATED CIRCUIT
8
8.
~
1
8~
• Adjustable Slew Rate Limiting
P1SUFFIX
PLASTIC PACKAGE
CASE 626-05
1
D SUFFIX
PLASTIC PACKAGE
CAS~~_~1.02
U SUFFIX
CERAMIC PACKAGE
CASE 693-02
1
• MC3488A Equivalent to 9636A
• Output Levels and Slew Rates are Insensitive to Power
Supply Voltages
PIN CONNECTIONS
• No External Blocking Diode Required for VEE Supply
Wave
Shape
• Second Source JLA9636A
Input A
Input B
Gnd
TYPICAL APPLICATION
Wave Shape
Control
4-
MC3488A Driver
TTL Logic
MC3486
Th ree-State Receiver
RS-423 Interface
~
i ~
MOTOROLA LINEAR/INTERFACE DEVICES
7-149
•
II
MC3488A
ABSOLUTE MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
VCC
VEE
+15
-15
V
Output Current
Source
Sink
10+
10-
+150
-150
Power Supply Voltages
mA
o to
Operating Ambient Temperature
TA
Junction Temperature Range
Ceramic Package
Plastic Paqkage
TJ
Storage Temperature Range
Tsta
·C
+ 70
·C
175
150
·C
-65 to +150
RECOMMENDED OPERATING CONDITIONS
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
VEE
10.8
-13.2
12
-12
13.2
-10.8
V
Power Supply Voltages
Operating Temperature Range
Wave Shaping Resistor
TA
0
25
70
·C
RWS
10
-
1000
kll
TARGET ELECTRICAL CHARACTERISTICS (Unless otherwise noted specifications apply over recommended operating
conditions)
Symbol
Min
Typ
Max
Unit
Input Voltage -
Low Logic State
VIL
-
-
0.8
V
Input Voltage -
High Logic State
VIH
2.0
-
Input Current - Low Logic State
(VIL = 0.4 V)
IlL
-80
-
-
pA
Characteristic
Input Current - High Logic State
(VIH = 2.4 V)
(VIH = 5.5 V)
V
p.A
IIH1
IIH2
Input Clamp Diode Voltage
(11K = -15 mAl
VIK
Output Voltage - Low Logic State
(RL = 00)
EIA-423
(RL = 3.0 kll) EIA-232C
(RL = 450 ll) EIA-423
VOL
Output Voltage - High Logic State
(RL = 00)
EIA-423
(RL = 3.0 kll) EIA-232C
(RL = 450 ll) EIA-423
VOH
-1.5
5.0
5.0
4.0
RO
Output Short-Circuit Current (Note 2)
(Vin = Vout = 0 V)
(Vin = VIH(Min), Vout = 0 V)
10
100
-
-5.0
-5.0
-4.0
-
V
V
-6.0
-6.0
-6.0
Output Resistance
(RL" 450 ll)
-
-
-
-
V
-
6.0
6.0
6.0
25
50
II
mA
10SH
10SL
-150
+15
-
-15
+150
Output Leakage Current (Note 3)
(VCC = VEE = 0 V, - 6.0 V '" Va '" 6.0 V)
lox
-100
-
100
p.A
Power Supply Currents
(RW = 100 kll, RL = 00, VIL '" Vin '" VIH)
ICC
lEE
-
+18
mA
-18
-
-
..
Note 1: DeviceS should not be operated at these values. The "Electrical Characteristics" proVide conditions for actual deVice operation .
2: One output shorted at a time.
3: No Vee diode required.
MOTOROLA LINEAR/INTERFACE DEVICES
7-150
MC3488A
TRANSITION TIMES (Unless otherwise noted, CL = 30 pF, f = 1.0 kHz, VCC = -VEE = 12.0 V ± 10%, TA = 25'C, RL = 450
O. Transition times measured 10% to 90% and 90% to 10%)
Characteristic
Symbol
Transition Time, Low-to-High State Output
(RW = 10 kG)
(RW = 100 kn)
(RW = 500kn)
(RW = 1000 kO)
tTLH
Transition Time, High-to-Low State Output
(RW = 10 kn)
(RW = 100 kO)
(RW = 500 kG)
(RW = 1000 kn)
tTHL
Min
Typ
Max
!'S
-
0.8
8.0
40
80
1.4
14
70
140
-
!'S
-
0.8
8.0
40
80
Unit
1.4
14
70
140
-
FIGURE 1 - TEST CIRCUIT AND WAVEFORMS
FOR TRANSInON TIMES
To
Scope
(Input)
To
Scope
(Output)
VCC
RL
Pulse
Generator
CL
(Includes
Probe and J i9
Capacitance)
RWS
f=1.0kHz
Pw = 5OO!'S
=
3.0 V
Input
OV
VOH
OV
Output
VOL
VEE
f""
Note: Input Rise
and Fall Times
~""""-
/
~~Jt~
?f
,..-~-
MOTOROLA LINEAR/INTERFACE DEVICES
7~151
""'
•
•
MC3488A
FIGURE 2 - OUTPUT TRANSISTION TIMES
versus WAVE SHAPE RESISTOR VALUE
FIGURE 3 - INPUT/OUTPUT CHARACTERISTICS
versus TEMPERATURE
1000
6.0
U)
4.0
~
~
L
~
eL
'"~
g
30 pF
~ -2.0 t - t-}-4.0 t - -
!3
t----
-6.0 t - 1.0
0.1
1.0
10
100
ooe
25°e
700 e
TA
2.0
~
~
Vee = 12 V
VEE = -12 V
RWS = 100 k!l
RL = 4500
I
I
100r
1.0
Vin, INPUT VOLTAGE (VOLTSI
TRANSITION TIMES, trLHItrHL (p.S1
2.0
FIGURE 4 - OUTPUT CURRENT versus OUTPUT VOLTAGE
POWER-ON
50
1
40
I
30
Vin =
!z
20
10
~
0
~
::::>
-20
5-10
::::>
0.08
VIH(~inl
1=
1
0.04
TA=1 25oe I
~
0.02
Vee = 12V
VEE = -12 V
Rws = 100 k!l
acc -0.020
!3 - 0.04
o
1
I
J
~-3O
I
..9_40
~
I
J
I
~-O.06
I
Vin - OV
-0.08
I
-50
-10 -8.0 -6.0 -4.0 -2.0
0
2.0
4.0
VOUI, OUTPUT VOLTAGE (VOLTSI
Vee = VEE = Vin = 0 V
TA = 25°e
(No diode required
al VEE Pin.1
0.06
/I
I
II
POWER-OFF
0.10
6.0
8.0
10
-0.10
-10 -8.0 -6.0 -4.0 -2.0
0
2.0
4.0
VOU1, OUTPUT VOLTAGE (VOLTSI
FIGURE 5 - SUPPLY CURRENT versus
TEMPERATURE
I
12.0
10.0
8.0
!z 6.0
~ 4.0
2.0
~
0
~ -2.0
~ -4.0
11-6.0
-8.0
-10.0
-12.0
Vin
1
~ OV, V:n = V:H
I
RISE/FALL TIME versus
1==
t--
ICC
I
r--
12 V
Vee
12 V
VEE
CL = 30pF
I I
TA = 0°C,7ooC
Rws
lIP"
~
00
OV
25"<:
~
lEE
~
142'
Vin I VIH
10
10
V
TA
Vin
8.0
100
I
Vee - 12 V
VEE = -12V
Rws = 100 kll, RL =
a
FIGURE 6 -
6.0
20
30
40
50
50
TAo AMBIENT TEMPERATURE ("<:1
~
1~
10 k
50
100 k
RWS, WAVE SHAPING RESISTANCE (Ill
MOTOROLA LINEAR/INTERFACE DEVICES
7-152
1M
®
MC6875
MC6875A
MOTOROLA
Specifications and Applications
Information
M6800 TWO·PHASE
CLOCK GENERATOR/DRIVER
M6800 CLOCK GENERATOR
SCHOTTKY MONOLITHIC
INTEGRATED CIRCUIT
Intended to supply the non-overlapping tf>1 and tf>2 clock signals
required by the microprocessor, this clock generator is compatible
with 1.0, 1.5, and 2.0 MHz versions of the MC6800. Both the
oscillator and high capacitance driver elements are included along
with numerous other logic accessory functions for easy system
expansion.
Schottky technology is employed for high speed and PNP-buffered
inputs are employed for NMOS compatibility. A single +5 V power
supply, and a crystal or RC network for frequency determination
are requ ired.
IfIIIIIIIIIfffJ
16 ~'1V{{lnJ ~ ~ ~
•
Typical MPU System with Bus Extenders
L SUFFIX
CERAMIC PACKAGE
CASE 620·10
GND +5V
c:::J 4 x fo MPU
~
PIN CONNECTIONS
ADDRESS
AND
CONTROL
BUS
DATA
BUS
X1
vee
X2
MPU0/>1
Ext In
Reset Output
4 x fa
MPU 0/>2
Power-On Re,et
2 x fo
Memory
Ready
DMA/Raf Roq
Ground
Memory Clock
ORDERING INFORMATION
Device
Temperature Rang.
MC6875L
o to +700 C
MC6875AL I
-55 to +1250 C
MOTOROLA LINEAR/INTERFACE DEVICES
7·153
OMA/Aef Grant
BustP2
Peck...
Ceramic
I
DIP
•
MC6875, MC6875A
ABSOLUTE MAXIMUM RATINGS (Unless otherwise noted T A
Rating
= 250 e.)
Symbol
Value
Unit
Vee
+7.0
Vdc
Input Voltage
VI
+5.5
Vdc
Operating Ambient Temperature Range
Me6875L
Me6875AL
TA
o to +70
Power Supply Voltage
°e
·55 to +125
Storage Temperature Range
NOTE:
T stg
-65 to +150
°e
TJ
175
°e
Operation of the MC6875Al over the full military
temperature range (to maximum TA) will result in
excessive operating junction temperature.
Operating Junction Temperature
The use ofa clipon 16 pin heatsinksimilartoMVID
Engineering, Inc., Model 5007 (RoCA = 18"eIW) is
recommended above TA "" 95"C.
RECOMMENDED OPERATING CONDITIONS
(Contact AAVID Engineering, Inc.
130 Cook Court
Rating
>Laconia, New Hampshire 03246
,'reI. (603) 524·4443
Power Supply Voltage
Operating Ambient Temperature Range
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted specifications apply over recommended power supply and temperature ranges.
Typical values measured at Vee = 50 V and T A - 25 0e )
Symbol
Min
TVp
VOHM
VOHMK
Vee - 0.6
-
VOHB
VOHBK
2.4
4 x fo Output
(Vee = 4.75 V, VIH = 2.0 V, IOH4X = -500 ~A)
2 ~ fa, OMA/Refresh Grant and Memory Clock Outputs
(Vee = 4.75 V, IOH = -500 ~A)
VOH4X
VOH
Reset Output
Characteristic
Max
Unit
Output Voltage - High Logic State
MPU 4>1 and ",2 Outputs
(Vee = 4.75 V, IOHM = -200 ~A)
(Vee = 5.25 V, IOHMK = +5.0 mAl
V
,
-
-
Vce+ 1 .O
V
Bus (/J2 Output
(Vee = 4.75 V, IOHB = -10 mAl
(Vee = 5.25 V, IOHBK = +5.0 mAl
(Vee
= 4.75
= 3.3
V, VIH
V, IOHR
-
-
-
Vee+ 1.0
2.4
2.4
-
-
V
VOHR
2.4
-
-
V
VOLM
VOLMK
-
-
0.4
-1.0
VOLB
VOLBK
.-
-
0.5
-1.0
VOL4X
VOL
-
-
0.5
0.5
V
0.5
V
-
V
= -100 MA)
Output Voltage - Low Logic State
MPU "'1 and ",2 Outputs
(Vee = 4.75 V, IOLM = +200 ~A)
(Vee = 4.75 V, IOLMK = -5.0 mAl
V
Bus ¢2 Output
V
(Vee = 4.75 V, IOLB = +48 mAl
(Vee = 4.75 V, IOLBK = -5.0 mAl
4 x fo Output
(Vee = 4.75 V, VIL = 0.8 V, IOL4X = 16 mA)
2 x fa, OMA/Aefresh Grant and Memory Clock Outputs
(Vee = 4.75 V, IOL = 16 mAl
V
Reset Output
(Vee
-
-
VOLR
= 4.75
V, VIL
= 0.8 V,
IOLR
= 3.2 mAl
Input Voltage - High Logic State
Ext. In, Memory Ready and DMA/Refresh Request Inputs
VIH
2.0
-
-
Input Voltage - Low Logic State
Ext. In, Memory Ready and OMA/Refresh Request Inputs
VIL
-
-
0.8
VILH
VIHL
-
2.8
3.6
0.8
1.4
-
VIK
-
-
-1.0
-1.5
V
IIH
-
-
25
MA
IIHR
-
-
50
MA
IlL
-
-
-250
MA
IILR
-
-
-250
~A
V
V
I nput Thresholds
Power-On Reset Input (See Figure 2)
Output Low to High
Output High to Low
Input Clamp Voltage
(Vee
= 4.75
V, lie
= -5.0 mA)
V
Me6875L
Me6875AL
Input Current - High Logic State
Ext. In, Memory Ready and OMA/Refresh Request Inputs
(Vee
= 4.75
V, VIH
= 5.0
V)
V, VIHR
= 5.0
V)
Power-On Reset
(Vee
= 5.0
Input Current - Low Logic State
Ext. In, Memory Ready and OMA/Refresh Request Inputs
(Vee
= 5.25
Power..()n
(Vee
V, VIL
= 0.5 V)
R.set Input'
= 5.25
V, VIL
= 0.5 V)
MOTOROLA LINEAR/INTERFACE DEVICES
7·154
MC6875, MC6875A
OPERATING DYNAMIC POWER SUPPLY CURRENT
Characteristic
Symbol
Min
Typ
Max
Unit
ICCN
-
-
150
mA
ICCMR
-
-
135
mA
ICCDR
-
-
135
mA
Power Supply Currents
(VCC = 5.25 V, lose = 8.0 MHz, VIL = 0 V, VIH = 3.0 V)
Normal Operation
(Memory Ready and DMA/Reiresh Request I nputs at
High Logic State)
Memory Ready Stretch Operation
(Memory Ready Input at Low Logic State;
DMA/Reiresh Request Input at High Logic State)
DMA/Refresh Request Stretch Operation
(Memory Ready Input at High Logic State;
DMA/Refresh Request Input at Low Logic State)
SWITCHING CHARACTERISTICS
(These specifications apply whether the Internal Oscillator (see Figure 9) or an External Oscillator is used (see Figure 10).
Typical values measured at
Vee::: 5.0
V, T A ::: 25°C, fa "" 1.0 MHz (see Figure 8),
Symbol
Min
Typ
Max
Unit
Output Period (F igure 3)
Pulse Width (Figure 3)
(10 = 1.0 MHz)
(10 = 1.5 MHz)
(to = 2.0 MHz)
to
tpWM
500
-
-
ns
ns
400
230
180
-
-
Total Up Time (Figure 3)
(to = 1.0 MHz)
(10 = 1.5 MHz)
(10 = 2.0 MHz)
tUPM
900
600
440
-
-
Characteristic
MPU <1>1 AND <1>2 CHARACTERISTICS
ns
-
Delay Time Referenced to Output Complement (Figure 3)
Output High to Low State (Clock Overlap at 1.0 V)
tPLHM
0
-
-
ns
Delay Times Referenced to 2 x fa (Figure 4 MPU r/J2 only)
Output Low to High Logic State
Output High to Low Logic State
tpLHM2X
tPHLM2X
-
-
-
85
70
ns
ns
-
-
25
25
n.
ns
Transition Times (Figure 3)
Output Low to High Logic State
Output High to Low Logic State
tTLHM
tTHLM
-
-
BUS <1>2 CHARACTERISTICS
Pulse Width - Low Logic State (Figure 4)
(10 = 1.0 MHz)
(10 = 1.5 MHz)
(to = 2.0 MHz)
ns
tPWLB
Pulse Width - High Logic State
(to = 1.0 MHz)
(10 = 1.5 MHz)
(10 = 2.0 MHz)
430
280
210
-
-
450
295
235
-
-
-
480 '
320
240
-
-
ns
tpWHB
Delay Times - (Referenced to MPU <1>1) (Figure 4)
Output Low to High Logic State
(10 = 1.0 MHz)
(fo = 1.5 MHz)
(to = 2.0 MHz)
Output High to Low Logic State
(CL = 300 pF)
(CL = 100 pF)
ns
tpLHBMl
tpHLBMl
Delay Times (Referenced to MPU ¢2) (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
Transition Times (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
-
-
-
-
25
-
20
tpLHBM2
tPHLBM2
-30
0
-
+25
+40
ns
ns
tTLHB
tTHLB
-
-
20
20
ns
ns
MOTOROLA LINEAR/INTERFACE DEVICES
7-155
-
•
MC6875, MC6875A
SWITCHING CHARACTERISTICS (continued)
Characteristic
Symbol
Min
Delay Times (Referenced to MPU <1>2) (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
tPLHCM
tPHLCM
-50
0
Delay Times (Referenced to 2 x fa) (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
tPLHC2X
tpHLC2X
-
-
-
tTLHC
tTHLC
tpLH2X
tpHL2X
Typ
Max
Unit
MEMORY CLOCK CHARACTERISTICS
Transition Times (Figure 4)
Output Low to High State
Output High to Low State
-
+25
+40
ns
ns
-
65
85
ns
ns
-
-
25
25
ns
ns
-
-
50
65
ns
ns
365
220
-
-
-
2 x fo CHARACTERISTICS
Delay Times (Referenced to 4 x fa) (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
Delay Time (Referenced to MPU <1>1) (Figure 4)
Output High to Low Logic State
ns
tPHL2XMl
(fa ~ 1.0 MHz)
(fa ~ 1.5 MHz)
-
Transition Times (Figure 4)
-
tTLH2X
tTHL2X
-
-
tPLH4X
tpHL4X
-
-
-
-
tTLH4X
tTHL4X
-
-
tSMRL
tSMRH
55
75
-
tHMRL
25
25
ns
ns
50
30
ns
ns
25
25
ns
ns
-
-
ns
ns
10
-
-
ns
tSDRL
tSDRH
65
75
-
-
ns
ns
tHDRL
10
-
-
ns
Output Low to High Logic State
Output High to Low Logic State
tpLHG
tpHLG
-15
-25
-
+25
+15
ns
ns
Transition Times (Figure 6)
Output Low to High Logic State
Output High to Low Logic State
tTLHG
tTHLG
-
-
-
-
25
25
ns
ns
-
-
-
1000
250
ns
ns
-
-
100
50
ns
ns
Output Low to High Logic State
Output High to Low Logic State
4 x fo CHARACTERISTICS
Delay Times (Referenced to Ext. In) (Figure 4)
Output Low to High Logic State
Output High to Low Logic State
Transition Time (Figure 4)
Output Low to High Logic State
Output High to· Low Logic State
-
MEMORY READY CHARACTERISTICS
Set·Up Times (Figure 5)
Low Input Logic State
High Input Logic State
Hold Time (Figure 5)
Low Input Logic State
DMA/REFRESH REQUEST CHARACTERISTICS
Set·Up Times (Figure 6)
Low Input Logic State
High Input Logic State
Hold Time (Figure 6)
Low I nput Logic State
DMAlREFRESH GRANT CHARACTERISTICS
Delay Time Referenced to Memory Clock (Figure 6)
RESET CHARACTERISTICS
Delay Time Referenced to Power-On Reset (Figure 7)
Output Low to High Logic State
Output High to Low Logic State
tPLHR
tPHLR
Transition Times (Figure 7)
Output Low to High Logic State
Output High to Low Logic State
tTLHR
tTHLR
-
-
DESCRIPTION OF PIN FUNCTIONS
• 4 x fa
• 2 x fo
- A t .... runnin!! oscilllltOr at four limal the MPU clock reta uteful for a system sync lignal.
- A free running osclllator.t two timet the MPU clock rite.
- An IJyne!lranoul input ulllKi to freeze the MPU clocks In the !tit high, 1/12 low Stllte for
dynamic memory refresh or cycle 5tNi DMA {Direct Memory Access}.
• REF GRANT
- A synchronous output used to I)'nchronize the refresh or DMA operation to the MPU.
• MEMORY READY - An asynchronous input used to freazu the MPU clocks inthe91 low. 1/12 high state for slow
memoryin1Brf\lC1l.
• MPU.1
- Capeble of driving the 411 and 1/12 inputs on two MC680Os.
MPUI/I2
•
DMA/REF REO
- An output nominallv in phne with MPU 412 having MC8T26A type drive capability.
BUS4I2
MEMORY CLOCK - At1 outpU1 nominally in phase with MPU 412 whicll free run5 during ~ refresh request cycle.
POWER-ON RESET
A Schmitt trigger input which controls Reset. A capaCitor to grouod is required to set the
desired time constant. Inter ....1 50 k resistor to Vee- Sse General Design Su\llltitions for
Manual Reset Operation.
- An output 10 the MPU and IlOdevices.
• RESET
- Provision to attach a wries re50nanl crywtal or RC network.
• Xl,X2
- Allows driving by an external nL signal to synchronize the MPU to an external system.
• EXT IN
•
•
•
MOTOROLA LINEAR/INTERFACE DEVICES
7-156
MC6875, MC6875A
FIGURE 1 - BLOCK DIAGRAM
x,
X2
In
BUS (/)2
'6-=-1'----_+-__--1
Memo'y Reody 0-:-
II
OM A-I-R-ef-,e-,-h 10'°_1+-_-+__--1 D 0, -------1>-1----1
R~u~
S r
Vee
50 k
Reset (14)
Outputo-.------~
Pin 16 -- +5.0 Volts
Pin 8
FIGURE 2 - TYPICAL HYSTERESIS CHARACTERISTIC
OF RESET FUNCTION
f-- Vee
0
S.O
-
Gnd
FIGURE 3 - TIMING DIAGRAM FOR
MPU 1
3.of--+--+--ll--+--+-++--+--+--+--i
~
t PLHM
o
~
2.0 .
---i--i---1f--j--jf--.-r--r--+--+--j
"i:;.1 Vee - 0.6 V
e-
MPU 1>2
~
o
f:
--!
'.0 V
0.8 V
1.0
DOL---'---,.L0,----'----1,."'"0--"--"'3Lo---'---4.L:---'----;'S.O
0
Vav = 1.0 V = Clock Overlap
measurement point
VI. INPUT VOLTAGE (VOLTS!. POWER ON RESET PIN
MOTOROLA LINEAR/INTERFACE DEVICES
7-157
MC6875, MC6875A
FIGURE 4 - TIMING DIAGRAM FOR NON·STRETCHED OPERATION
(Memory Ready and DMA/Refresh Request held high continuously)
Ext. In Input Voltage: 0 V to 3.0 V, f =8.0 MHz, Duty Cycle = 50%, tTLHEX = tTHLEX = 5.0 ns
•
OMA/AefreSh_G_'O_n_t_ _ _ _ _ _!:.:L:.:O_w:.:I_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
MOTOROLA LINEAR/INTERFACE DEVICES
7-158
MC6875, MC6875A
FIGURE 5 - TIMING DIAGRAM FOR MEMORY READY STRETCH OPERATION
(Minimum Stretch Shown)
Input Volt_: 3.0 to 0 V. tTHLMR
='TLHMR =5.0 ns
Memory Readv
0.8 V
~
DMA/Aefresh Request
Irrelevent
•
MPU 1
DMA/Refresh Grant
(Low)
MOTOROLA LINEAR/INTERFACE DEVICES
7-159
MC6875, MC6875A
FIGURE 6 - TIMING DIAGRAM FOR DMA/REFRESH REQUEST STRETCH OPERATION
(Minimum Stretch·Shown)
Input Voltage: 3.0 to 0 V, tTHLDR = tTLHDR = 5.0 ns
Memory Ready
•
~
-+----tPwDMA
Irrelevant
Vee
1.5
= 10----+--2-
DMA/Refresh Grant
0.8 V
0.8 V
MOTOROLA LINEAR/INTERFACE DEVICES
7-160
MC6875. MC6875A
FIGURE 7 - POWER ON RESET
Input Voltage: 0 to 5.0 V. f = 100 kHz - Puis. Width = 1.0!J.S. tTLH - tTHL
25 ns
S
tTLH
5.0 V
------+----'fr----------------___.
POwer-On Reset
OV _ _ _ _- J
0.8 V
0.8 V
FIGURE 8 - LOAO CIRCUITS
For MPU q,l and MPU q,2
For Bus $2
+5.0 V
+5.0 V
RLL
RLL= 18 k
68
RO
RLH
20 k
RLH
240
All diodes are 1 N916
or equivalent
All diodes are 1 N916
or equivalent
MPU <1>1 CL = 35 pF. RO = 20 n
MPU2CL=70pF.RO=15n
For 4 )( fo, 2 x fa. Memory Clock and DMA/Refresh Grant
CLO
100pF
I
For Reset Output
+5.0 Volts
+5.0 V
RLL=240
RLL = 1.2 k
To ~~~putf4--"""--1r--1'III1-~
RLH
RLH=24k
4.7 k
All diodes are 1N916
or equivalent
• Load capacitance includes fixture and probe capacitance
MOTOROLA LINEAR/INTERFACE DEVICES
7-161
All diodes are 1 N916
or equ ivalent
•
•
MC6875, MC6875A
APPLICATIONS INFORMATION
FIGURE 9 - TYPICAL RC FREQUENCY
versus VOLTAGE
+8.0
~
w
+6.0
v
V
'"z
V
«
~ +4.0
/
G
z
1+
2.0
./
./
.---
~
-2.0
4.5
fo~1.0MHz _
@VCC·5.0V
TA ~25'C -
/'"
"1
I
5.5
6.0
Vcc, SUPPLY VOLTAGE (VOLTS)
5.0
r--f---
6.5
7.0
FIGURE 10 - TYPICAL RC FREQUENCY
versus TEMPERATURE
/
+1.0
1/
/
it +0.8
/
w
'"Z~
/
+0.6
1/
>-
/
~ +0.4
/
o
~ +0.2
/
fo~1.0MHz
./
:r
V
./
./
-0.2
10
20
f----
I
I
I
V
-10
_
~ :sc2~~i;0 V_ f - -
30
40
50
60
TA, TEMPERATURE ('1:)
70
80
90
FIGURE 11 - TYPICAL FREQUENCY versus
RESISTANCE FOR C VARIABLE
100
100
~
i"-.....
80
"'-
I'-.
I'-.
""-...
"10
I
" "-~
"""'
"'-
"'-
"'-
"'-
I I I I I
GENERAL
The MC6875 Clock Generator/Driver should be located
on the same board and within two inches of the MC6800
MPU. Series damping resistors of 10-30 ohms may be
utilized between the MC6875 and the MC6800 on the \'>1
and \,>2 clocks to suppress overshoot and reflections.
The VCC pin (pin 16) of the MC6875 should be
bypassed to the ground pin (pin 8) at the package with a
0.1 p.F capacitor. Because of the high peak currents
associated with driving highly capacitive loads, an adequately large ground strip to pin 8 should be used on the
MC6875. Grounds should be carefully routed to minimize
coupling of noise to the sensitive oscillator inputs. Unnecessary grounds or ground planes should be avoided near
pin 2 or the frequency determining components. These
components should be located as near as possible to the
respective pins of the MC6875. Stray capacitance near
pin 2 or the crystal, can affect the frequency. The can of
the crystal should not be grounded. The ground side
of the crystal or the C of the R-C oscillator should be connected as directly as possible to pin 8.
Unused inputs should be connected to VCC or ground.
Memory Ready, DMA/Refresh Request and Power-On
Reset should be connected to VCC when not used.
The External Input should be connected to ground
when not used.
OSCILLATOR
A tank circuit tuned to the desired crystal frequency
connected between terminals X 1 and X2 as shown in
Figure 12, is recommended to prevent the oscillator from
starting at other than the desired frequency. The 1kn
resistor reduces the Q sufficiently to maintain stable
crystal control. Crystal manufacturers may recommend a
capacitance (CL) to be used in series with the crystal for
optimum performance at series resonance.
See Figures 9 and 10 for typical oscillator temperature
and V CC supply dependence for RoC operation.
FIGURE 12 - OSCILLATOR-CRYSTAL OPERATION
NOTE: RC Operation not recommended above
4Xfo ·1.0MHz , -
(1)
~--.....--..------'1 Xl
"'-
"'-
.........
"'-
"
'\.
i
R 5k 4k
i
3k
10
1k
l----I
7'f=
(Trim)
•
CL
C:=J XTAL
i~
lk
7
1
__- -__--~--~ X2
oiL'
"-
MC6875
(2)
TA'150C -
"'-....""- ~ i'.. '\ ~
"'-~ ~"\ r'\. '\ 1\
""- l'.." "
CT
VC~'510V-
"-
I
or
8 9 10
• Required by some
Crystal manufacturers
4 x fo, FREQUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
7-162
(3)
Ext In
_
-
4 X fo:: Crystal frequency
4X fo~\ _ _
l __
2'nJLTCT
2.5 I'H " LT " 22 I'H
75 pF " CT " 200 pF
AT ~ lkrl
MC6875, MC6875A
TABLE 1 - OSCILLATOR COMPONENTS
TANK CIRCUIT
PARAMETERS
CTS KNIGHTS
400 REIMANN AVE.
SANDWICH,ll
60548
(8151 786·8411
APPROXIMATE
CRYSTAL PARAMETERS
IT
#H
CT
RS
C.
Cl
f.
pF
Ohms
pF
mpF
MHz
10
150
15·75
3-6
12
4.0
MP.Q4A
82
8-45
4·7
23
8.0
MP.()80
·47 pF
Inductors may be obtained from: Collcraft, Cary, I L 60013
RC OPERATION
(1),-----,
EXTERNAL INPUT
(1) , - - - - - - ,
X2
I-=-
MC687S
C
Open
(21
131
Ext In
MC687S
131
Ext In
51
External Pulse
Generator
To precisely time a crystal to desired frequency, a
variable trimmer capacitor in the range of 7 to 40 pF
would typically be used. Note it is not a recommended
practice to tune the crystal with a parallel load capaci·
tance.
The table above shows typical values for CT and LT,
typical crystal characteristics, and manufacturers' part
numbers for 4.0 and 8.0 megahertz operation.
The MC6875 will function as an R-C oscillator when
connected as shown in Figure 13. The desired output
frequency (M + 0.2 V Diff.
< - 0.2 V Diff.
Z
X
H
H
X
L
VCC
DRlin
DR10ut
DR10ut
DR EN
DR2 Out
DR2 Out
L
Z
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
7-164
1
VCC
DRlin
DR10ut
DR10ut
DR2 EN
'DR2 Out
DR2 Out
DR21n
RECI In+
REClOut
DRI EN
REC2 Out 5
REC2In+ 6
REC2In- 7
GND
MC34051
MC34050, MC34051
ABSOLUTE MAXIMUM RATINGS
Parameter
Value
Units
Power Supply Voltage (VCe!
7.0
Vdc
Input Common Mode Voltage (Receivers)
",25
Vdc
Input Differential Voltage (Receivers)
",25
Vdc
Output Sink Current (Receivers)
50
mA
Enable Input Voltage (Drivers and Receivers)
5.5
Vdc
Input Voltage (Drivers)
5.5
Vdc
Applied Output Voltage (3-State mode) -
Receivers
-1.0 to + 7.0
Vdc
Applied Output Voltage (3-State mode) -
Drivers
-1.0 to +7.0
Vdc
Junction Temperature
-65 to +150
Storage Temperature
-65to +150
'c
'C
Devices should not be operated at these values. The "Recommended Operatmg limits" provide for actual device operation.
RECOMMENDED OPERATING LIMITS
Min
Typ
Max
Units
Power Supply Voltage
+4.75
+5.0
+5.25
Vdc
Input Common Mode Voltage (Receivers)
-7.0
Input Differential Voltage (Receivers)
-6.0
Parameter
Enable Input Voltage (Drivers and Receivers)
0
-
+5.25
Vdc
Input Voltage (Drivers)
0
-
+5.25
Vdc
Ambient Temperature Range
0
-
+70
+7.0
Vdc
+6.0
Vdc
'c
ELECTRICAL CHARACTERISTICS (Unless otherwise noted specifications apply for 4.75 < VCC < 5.25 volts,
and 0' < TA < 70'C).
Parameter
Symbol
I
Min
Typ
I
Max
Units
DRIVERS
Input Voltage -
Low
VILD
-
Vdc
High
VIHD
2.0
-
0.8
Input Voltage -
-
Vdc
Input Current @ VIL = 0.4 V
IILD
-360
-
-
p.A
Input Current @ VIH = 2.7 V
VIH = 5.25 V
IIHD
-
+20
+100
/LA
Input Clamp Voltage (11K = - 18 mAl
VIKD
-1.5
Output Voltage -
Low (lOL = 20 mAl
VOLO
-
Output Voltage -
High (lOH = - 20 mAl
VOHD
2.5
-
Output Offset Voltage Difference (Note 1)
VOSD
-0.4
-
+0.4
Vdc
2.0
-
Vdc
+0.4
Vdc
-30
mA
-
-
Output Differential Voltage Difference (Note 1)
VTD
-0.4
Short Circuit Current (VCC = 5.25 V)
(From High Output, Note 2)
10SD
-150
-
Output Leakage Current - Hi-Z State
(Vout = 0.5 V, DR EN = 0.8 V)
(Vout = 2.7 V, DR EN = 0.8 V)
10ZD
-100
-100
-
+100
+100
Output Leakage - Power Off
(Vout = -0.25 V, VCC = 0 V)
(Vout = 6.0 V, VCC = 0 V)
10(off)
-100
-
-
Output Differential Voltage (Note 1)
VT
Vdc
\
Vdc
/LA
p.A
-
Notes: 1) See EtA Standard EIA-422 and Figure 1 for exact test conditions.
2) Only one output in a package should be shorted at a time, for no tonger than 1 second.
MOTOROLA LINEAR/INTERFACE DEVICES
7-165
Vdc
0.5
+100.
I
•
•
~C34050,~C34051
ELECTRICAL CHARACTERISTICS (Unless otherwise noted specifications apply for 4.75 < VCC < 5.25 volts,
and O· < TA < 70·C).
Symbol
Parameter
Min
Typ
Max
-
-
+0.2
-
+2.3
Units
RECEIVERS
Differential Input Threshold Voltage (Note 3)
(-7.0 V < VICM < + 7.0, Vout '" 2.7 V)
(-7.0 V < VICM < + 7.0, Vout '" 0.45 V)
VTHR
-0.2
Input Bias Current
(0", VCC '" 5.25 V, Yin ~ +15 V)
(0", VCC '" 5.25 V, Yin ~ - 15 V)
rnA
IIBR
-2.8
Input Balance and Output Level
(-7.0'" VICM '" +7.0 V)
(VID ~ +0.4 V, 10 ~ -400"A)
(VID = -0.4 V, 10 = 8.0 rnA)
Vdc
-
Vdc
2.7
VOHR
VOLR
Output Leakage Current - 3-State (Pin 4
(VID = +3.0 V, Vo ~ 0.4 V)
(VID ~ -3.0 V, Vo = 2.4 V)
~
2.0 V, MC34050 only)
-
10ZR
-100
-100
Output Short Circuit Current (Note 2, VCC = 5.25 V)
(VID ~ +3.0 V, MC34050 Pin 4 ~ 0.4 V, Vo ~ 0 V)
10SR
-85
-
-
-
0.45
-
+100
+100
-
-15
"A
rnA
ENABLES
Input Voltage -
Low
VILE
-
Input Voltage -
High
VIHE
2.0
Input Current @ VIL
~
0.4 V (Receiver EN)
(Driver EN)
IlLER
IILED
-100
-360
Input Current @ VIH
VIH
~
2.7 V
5.25 V
IIHE
-
~
-
Input Clamp Voltage (11K = - 18 rnA)
VIKE
-1.5
-
0.8
Vdc
-
-
Vdc
-
p,A
+20
+100
p,A
-
Vdc
80
rnA
POWER SUPPLY
Power Supply Current @ VCC = 5.25 V
Notes: 1)
2)
3)
4)
55
ICC
See EIA Standard EIA-422 and Figure 1 for exact test conditions.
Only one output in a package should be shorted at a time, for no longer than 1 second.
Differential input threshold voltage and guaranteed output levels are done simultaneously for worst case.
All currents into a device pin are positive, those out of a pin are negative. Voltages are referenced to ground. Algebraic convention rather
than magnitude is used to define limits.
DRIVER SWITCHING CHARACTERISTICS (VCC
~ 50 V TA ~ 25·C See Figure 2)
Parameter
Propagation Delay
Data Input to Output High-to-Low
Data Input to Output Low-to-High
Output Skew (ItPHL - tPLHI each driver)
Enable Input to Output
CL ~ 10 pF, RL ~ 75 {J to Gnd
CL = 10 pF, RL ~ 180 {J to VCC
CL = 30 pF, RL = 75 {J to Gnd
CL = 30 pF, RL = 180 {J to VCC
Symbol
Min
Typ
Max
tpHLD
tpLHD
tSKD
-
-
20
20
8
tpHZD
tpLZD
tpZHD
tpZLD
-
-
-
30
35
40
45
50
-
Min
Typ
Units
ns
Maximum Data Input Transition Time (10-90%)
tTRD
ns
RECEIVER SWITCHING CHARACTERISTICS (VCC = 5.0 V, TA = 25·C, Figure 3)
Symbol
Parameter
Propagation Delay
Differential Input to Output - High-to-Low
Differential Input to Output - Low-to-High
Enable Input - Output Low to 3-State"
Enable Input - Output High to 3-State"
Enable Input - Output 3-State to High"
Enable Input - Output 3-State to Low"
tpHLR
tPLHR
tpLZR
tpHZR
tpZHR
tPZLR
-
"MC34050 Only.
MOTOROLA LINEAR/INTERFACE DEVICES
7-166
-
-
Max
Units
ns
30
30
35
35
30
30
MC34050, MC34051
FIGURE 1 - DRIVER OUTPUT TEST CIRCUIT
<2:
Vin = 3.0 V
Vin'=OV
I
I
son, 1%
VOSD
Ivos .. VOs,!:
VT
I
i I
::t
< son, 1%
VODD
C
IIVTI -
IVT'II
Vos
Circuit per EIA
RS~422·A.
Dec. 1978
-=
FIGURE 2 -
DRIVER SWITCHING TEST CIRCUITS
Input
+3.0 V- r - - - - - - - " ' \
0 J+1.3V
-\-+1.3V
~ 'pLHD I;::
180 n
I -f
A
7sn
--1
Output
1-'-
'pHLD
r=
I ""\. .
~~~
-....J
LIr-:-:-::-::_+_,._3_V_
tplHD
VOH
VOL_\+1.3V
B
Input
tpHLD
-l
+1.3 V
r+l,3V
+3.0~V+1.3V
+1.3V
L
o
180n.+5.ov
'PZHD
O.SV
~
1;"-
r........
+1,3V
'pHZD
Output
IPLZD
VOH
f--
t:::
~--------~~
SG: 1.0 MHz, 50% duty cycle, tA. tF "'" 6.0 ns (10-90%)
Rl = 75 Q to GND for tpZHD and tpHZD, 180 n to Vee for tpZLD and tpLZO:
CL ~ 10 pF lor IpHZD and IpLZD, 30 pF lor 'PZHD and 'PZLD,
FIGURE 3 -
RECEIVER SWITCHING TEST CIRCUITS
Input
+3,0 V- r - - - - - - - ,
J,+1.SV
\+I.SV
o
Output
_I
tpLHR 1;=
___..Jf. +,1.3 V
-i'-'P-H-LR-r='_-_-___
- _-_- VOH
\+1.3V
51
To
Input
2.0 k
Scope
s,o k
V.
Output
tPLZR ~
'---------I~
lN916's
or
equivalent
52
MC34050 Only
5G: 1.0 MHz, 50% duty cycle, tR, tF ~ 6.0 ns (10-90%)
Va ~ + 1.5 V lor tpHZ, tpZH: Va ~ -1,5 V lortpLZ, 'PZL,
51,52 closed for tpHZ. tpLZ; 51 open, 52 closed for tpZH: 51 closed, 52 open for tpZL.
MOTOROLA LINEAR/INTERFACE DEVICES
7·167
VOL
•
MC34050, MC34051
AGURE 4 -- DRIVER INPUT CHARACTERISTICS
FIGURE 5 -- DRIVER DIFFERENTIAL OUTPUT CHARACTERISTICS
3.8
+30
in
~
~
~
-30
j
-60
i
-90
....
I
13-120
!;
~ -150
-180
-210
V
3.0
-
0.4 f---
"
5
-3.0
-1.0
+1.0
+3.0
INPUT VOLTAGE IVOLTS)
I ,I
f---
".........
a -14
FIGURE 12 - RECEIVER INPUT CHARACTERISTICS
0.8
Enable
V
~ ~10 V
5.25 V
Receiver
_ -6.0
3""
Typical Ca 25°C
-5.0
n
-2.0
20
30
40
50
AMBIENT TEMPERATURE lOCI
60
70
10
10
30
40
50
AMBIENT TEMPERATURE lOCI
MOTOROLA LINEAR/INTERFACE DEVICES
7-169
60
"
70
•
MC34050, MC34051
FIGURE 16 -
EIA·422 APPLICATION
TTL
MC34050J51
FIGURE 17 -
EIA-422 APPLICATION
RT
•
Notes; 1) AT must equal characteristic impedance of the cable.
2) Individual receivers may be MC34050, MC34051, MC3486, or AM26LS32.
3) System ground may be made through cable shield as shown, or through chassis ground. Common mode differences and signal quality
must be considered when choosing a ground path.
MOTOROLA LINEAR/INTERFACE DEVICES
7-170
@ MOTOROLA
MC75107
MC75108
DUAL LINE RECEIVERS
The MC75107 and MC75108 are MTTL compatible dual line
receivers featuring independent channels with common voltage supply
and ground terminals. The MC75107 circuit features an active pull-up
(totem-pole) output. The MC75108 circuit features an open-collector
output configuration that permits the Wired-OR logic connection with
similar outputs (such as the MC5401/MC7401 MTTL gate or additional
MC75108 receivers). Thus a level of logic is implemented without
extra delay_
The MC75107 and MC75108 circuits are designed to detect input
signals of greater than 25 millivolts amplitude and convert the polarity
of the signal into appropriate MTTL compatible output logic levels.
o
o
o
o
o
o
o
o
o
High Common-Mode Rejection Ratio
High I nput Impedance
High I nput Sensitivity
Differential Input Common-Mode Voltage Range of ±3.0 V
Differential Input Common-Mode Voltage of More Than ± 15 V
Using External Attenuator
Strobe Inputs for Receiver Selection
Gate Inputs for Logic Versatility
MTTL or MDTL Drive Capability
High DC Noise Margins
DUAL LINE RECEIVERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
,-'.
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
o MC55107 Available as JM38510/10401
CIRCUIT SCHEMATIC
Vcc~~~~~~--~----~~-----1~------~----~
14
850
850
2.5 k
186
4 k
1.6 k
OUTPUT
STROBE
,G
2.5 k
INPUTS
13
VE E ~+----1~----""'------1~+---+------
,
OUTPUT STROBE STROBE
"
--------'
STROBE
r-----------t-~
2G
TRUTH TABLE
11
2B
<>-+----1----,
DIFFERENTIAL
INPUTS
INPUTS
A·B
2A 0-+
12
STROBES
G
S
OUTPUT
Y
-25 mV <. V10< 25 mvt----C~i-=-.:;;_:'_j-"N:Co"'."'T::-.R"'M7:':-:N""AT::,1
Lor H
Components shown with dashed lines are applicable to the MC751 07 onlv.
MOTOROLA LINEAR/INTERFACE DEVICES
7-171
•
•
MC75107, MC75108
MAXIMUM RATINGS
(TA
=oOe to +70oe
unless otherwise noted I
Rating
Symbol
Value
Unit
VCC
VEE
+7.0
-7.0
Vdc
Power Supply Voltages
Differential-Mode I "put Signal Voltage Range
VID
+6.0
Vdc
Common-Mode Input Voltage Range
VICR
+5.0
Vdc
Strobe Input Voltage
VIISI
5.5
Vdc
625
3.85
rnW
mW/oC
Power Dissipation (Package Limitation)
PD
Plastic and Ceramic Dual-tn-Une Packages
Derate above T A = +2SoC
Operating Ambient Temperature Range
TA
a to +70
°c
Storage Temperature Range
Tst9
-65 to +150
°c
RECOMMENDED OPERATING CONDITIONS
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Vdc
Power Supply Voltages
Output Sink Current
-16
rnA
-5.0
+5.0
lOS
Differential-Mode Input Voltage Range
VIDR
Common-Mode Input Voltage Range
VieR
-3.0
+3.0
Vdc
Vdc
Input Voltage Range, any differential input to ground
VIR
-5.0
+3.0
Vdc
Operating Temperature Range
TA
0
+70
°c
DEFINITIONS OF INPUT LOGIC LEVELS
Symbol
Test Fig.
Min
Max
Unit
High-Level Input Voltage (between differential Inputsl
VIDH
1
0.025
5.0
Vdc
Low-Level Input Voltage (between differential inputsl
VIDL
1
-S.Ot
-0.025
Vdc
High·Level Input Voltage (at strobe inputs)
VIHISI
3
2.0
5.5
Vdc
VILISI
3
0
0.8
Vdc
Characteristic
Low-Level Input Voltage (at strobe inputs)
tThe algebraiC convention, where the most positive limit
ELECTRICAL CHARACTERISTICS
IS
deSignated maXimum,
IS
used with Low-Level Input Voltage Level (VIOL)
(T A = OoC to +70 oC unless otherwise noted I
Characteristic
Symbol
High-Level Input Current to lA or 2A Input
Test Fig.
Min
Typ #
30
IIH
Max
Unit
75
"A
-10
"A
40
1.0
"A
rnA
(VCC = Max, VEE = Max, VID = 0.5 V, VIC = -3.0 V
to +3.0 VI t
Low-Level Input Current to lA or 2A Input
II L
(VCC = Max, VEE = Max, VID= -2.0 V, VIC = -3.0 V
to +3.0 VI t
High-Level Input Current to lG or 2G Input
IIH
4
(VCC = Max, VEE = Max, VIH(SI = 2.4 Vlt
IVCC = Max, VEE = Max, VIH(SI = VCC Maxlt
Low-Level Input Current to lG or 2G Input
IlL
4
rnA
-1.6
(VCC = Max, VEE = Max, VILISI = 0.4 Vlt
High-Level Input Current to S Input
IIH
(VCC = Max, VEE = Max, VIH(SI = 2.4 Vlt
(VCC = Max, VEE = Max, VIH(SI = VCC Maxlt
Low-Level Input Current to S Input
IlL
80
2.0
"A
rnA
-3.2
rnA
(VCC,= Max, VEE = Max, VIL(S) = 0.4 VI t
High-Level Output Voltage
(Vce"" Min, VEE = Min,lload "" -400IJA,
V
VOH
VIC = -3.0 V to +3.0 Vlt
Low-Level Output Voltage
(VCC = Min, VEE = Min, 'sink = 16 rnA
V
VOL
0.4
VIC' -3.0 V to +3.0 Vlt
High-Level Leakage Current
ICEX
3
"A
250
(VCC = Min, VEE = Min, VOH • VCC Maxlt
Short-Circuit Output Current #
(VCC' Max, VEE
= Maxlt
#
(Vec' Max, VEE
= Max, VID' 25 rnV, TA •
ICCH+
6
ICCH-
6
rnA
+25 0 CI t
High Logic Level Supply Current from VEE
(Vce
rnA
losC
High Logic Level Supply Current ~rom Vee
0
18
30
8.4
-15
rnA
=Max, VEE = Max, VID = 25 mV, TA =+25 0 CI*
:I: For conditions shown as Min or Max, use the appropriate value speCified under recommended operating conditions for the applicable deVice type.
NAil typical values are at vec = +5.0 V, VEE = - 5.0 V, T A'" +25 0 C.
·N "Not more than one output should be shorted at a time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-172
MC75107, MC75108
SWITCHING CHARACTERISTICS (VCC' +5.0 V. VEE' -5.0 V. TA' +25 0 CI
Characteristic
Propagation Delay Time, low-ta-high level from
Symbol
Test Fig.
tpLH(D1
7
Min
tPHUDI
tPLH(SI
tPHUSI
-
-
-
-
19
25
-
19
-
-
-
13
ns
25
ns
7
IRL' 390 n. CL" 50 pFI
(RL" 390 n. CL' 15 pFI
Propagation Delay Time, high-ta-Iow lever, from strobe
input G or S to output
Unit
7
(RL' 390 n. CL " 50 pFI
(RL' 390 n. CL" 15 pFI
Propagation Delav Time, low-ta-high level, from strobe
input G or S to output
Max
ns
differential inputs A and B to output
(RL' 390 n. CL' 50pFI
(RL" 390 n. CL' 15 pFI
Propagation Delay Time, high-ta-Iow level from
differential inputs A and B to output
Typ
15
7
(RL' 390 n. CL' 50 pFI
(RL' 390 n. CL' 15 pFI
-
-
-
13
20
,,"
ns
L
TEST CIRCUITS
FIGURE 1 - VIOH and VIOL
FIGURE 2 - IIH and IlL
VCC 2G
Ii
•
See
~Note
I
2B I
v'c
I
L ___
.t
'--.g-;N-;;-- --.J
NOTE: Each pair of differential inputs is tested
separately. The inputs of the other pair
NOTE: When testing one channel, the inputs of
the other channel are grounded.
are grounded
FIGURE 3 - VIH(SI. VIL(SI. VOH. VOL. and IOH
lG
s
2G
TEST TABLE
---
MC75107
'sink,ICEX
V8
! r_
0
I
' load
I
I
I
I2 Y
'sink. 'CEX
_
Test
Tabl.
I
2BI
V'C
I
MC7510a
I
VOH
VOH
VOH
VOL
NOTES: 1. VIC
I
STROBE 1G or 2G STROBE S
APPLY
ICE X
+25 mV
VIH(S)
VIH(S)
ICE X
-25 mV
VILIS)
ICE X
-25 mV
VIH(S)
VIHISl
VIL(S)
VOL
-25 mV
VIH(Sl
VIH(S)
=
-3.0 V to +3.0 V.
2. When testing one channel, the inputs of the other channel
should be grounded.
I
!;..-;;-___ J
L _____
MOTOROLA LINEAR/INTERFACE DEVICES
7-173
VIO
TEST
MC75107, MC75108
TEST CIRCUITS (continued)
FIGURE 4 - IIH(G). IIL(G).IIH(S). and IIL(S)
VIHIS)J
lG
Se.
S
Test
-
Table
2G
VILIS)
' IL(S)
I
OpeN
I
I
I
I
See
Test
Table
1 2y
OPEN
•
TEST
INPUT lA
INPUT 2A
STROBE lG
STROBE S
'IH at Strobe 1G
+25 mV
Gnd
VIHIS)
Gnd
STROBE 2G
Gnd
I, H at Strobe 2G
Gnd
+25 mV
Gnd
Gnd
VIHIS)
Gnd
IIH at Strobe S
+25 mV
+25 mV
Gnd
VIHIS)
IlL at Strobe 1G
-25 mV
Gnd
VILIS)
4.5 V
Gnd
'\ L at Strobe 2G
Gnd
-25 mV
Gnd
4.5 V
VILIS)
-25 mV
-25 mV
4.5 V
VILIS)
4.5 V
IlL at Strobe S
FIGURE 6 -ICC and lEE
FIGURE 5 - lOS
Vcc+
Vee
,- 1-2G
lA
I
I
;:Jt~-, ~·Jl,:;
Vee
-
---1 --,
S lG
I
IIV
1
lA I
I
1
1
1
25 mV
25 mV
1
1 2Y
I
I
2BI
L-----X------.J
~GND
NOTES: 1. Each channel is tested separately.
2. Not more than one output should be tested at one time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-174
MC75107, MC75108
TEST CIRCUITS
(continued)
FIGURE 7 - PROPAGATION DELAY TIME TEST CIRCUIT
AND WAVEFORMS
DIFFERENTIAL
INPUT
OUTPUT
MC751Q7
50 pF
See Note 3
See Note 4
390
lG
STROBE
INPUT
S
2G
~5PF
lS..
e-------~~--~VY~---,
Not. 3
See Note 2
- __________
200 mV
INPUT~
A
100 mV
100 mV
II
II
I
I
r-- tpl
I~
_ _ _ _- J
I
OV
t---
---l
I
I
I
'\1
~1.5V
-l!
OO~"' Y'Ct-,"_I_S_I-l_-JJH
STROBE
INPUT
G orS
I
I
!I
tpLH(O) - ,
I
F-+:_'___'5V
to-- tpHLIOI
I '-______...J.
I
I
d
t-
tp2 - - -...·011
._.
I
~
'tv
3V
OV
.... tpHLISI
VOH
VOL
NOTES: 1. The pulse generators have the following characteristics:
tp2 = 1 I-LS, PRR:: 500 kHz.
zo"" 50
n.
tr"" tf = 10 ±.5 ns, tpl "" 500 ns, PRR = 1 MHz
2. Strobe input pulse is applied to Strobe lG when' nputs 1 A-' B are being tested, to Strobe S when Inputs lA-' B or 2A-2B
are being tested, and to Strobe 2G when inputs 2A-2B are being tested.
3. CL includes probe and jig capacitance.
4. All diodes are lN916 or equivalent.
MOTOROLA LINEAR/INTERFACE DEVICES
7-175
®
MC75S110
MOTOROLA
MONOLITHIC DUAL LINE DRIVER
•
The MC75S110 dual line driver features independent channels
with common voltage supply and ground terminals. Each driver
circuit provides a constant output current that switches to either
of two output terminals subject to the appropriate logic levels at
the input.terminals. Output current can be switched "off" (inhibited) by appropriate logic levels at the inhibit inputs. Output current is nominally twelve milliamperes.
The inhibit feature permits use in party-line or data·bus applications. A strobe or inhibitor, common to both drivers, is included
to increase driver-logic versatility. With output current in the inhibited mode, IO(off) is specified so that minimum line loading
occurs when the driver is used in a party-line system with other
drivers. Output impedance of the driver in inhibited mode is very
high (the output impedance of a transistor biased to cutoff).
All driver outputs have a common-mode voltage range of -3.0
volts to +3.0 volts, allowing common-mode voltage on the line
without affecting driver performance.
DUAL LINE DRIVERS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC PACKAGE
CASE 632-08
• Insensitive to Supply Variations Ov.er the Entire Operating
Range
• MTTL Input Compatibility
• Current-Mode Output (12 mA Typical)
• High Output Impedance
• Common-Mode Output Voltage Range
( - 3.0 V to + 3.0 V)
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
• Inhibitor Available for Driver Selection
INHIBIT
IN~TS OUTPUTS
OUTPUTS
VCC
1Y
1Z
VEE
D
2Z
2Y
8
TRUTH TABLE
LOGIC INPUTS
4
1A
1B
LOGIC
INPUTS
1C
2C
INHIBIT
INPUT
B
C
D
Y
Z
Lor H
Lor H
L
Lor H
H
Lor H
Lor H
Lor H
L
H
L
Lor H
H
H
H
Lor H
L
H
H
H
H
H
L
L
H
H
H
H
H
L
2B
LOGIC
INPUTS
MOTOROLA LINEAR/INTERFACE DEVICES
7-176
OUTPUTS
A
low output represents the " on " state.
High output represents the "off" state.
5
2A
INHIBITOR
INPUTS
MC755110
MAXIMUM RATINGS (TA = 0 to + 70°C unless otherwise noted)
Symbol
Value
Unit
Power Supply Voltages
(See Note 1)
Ratings
VCC
VEE
+7.0
-7.0
Volts
Logic and Inhibitor Input Voltages
(See Note 1)
Vin
5.5
Volts
Common-Mode Output Voltage Range
(See Note 1)
VOCR
-5.0 to +7.0
Volts
Power Dissipation (Package Limitation)
Po
1000
3.85
mW
mWrC
Plastic and Ceramic Dual In-Line Packages
Derate above TA
=
+ 25°C
Operating Temperature Range
o to
TA
Storage Temperature Range
+70
-65 to + 150
Tstg
°c
°c
NOTE 1. These voltage values are with respect to the ground termmal.
RECOMMENDED OPERATING CONDITIONS (See Notes 1 and 2 )
Characteristic
Power Supply Voltages
Common-Mode Output Voltage Range
Symbol
Min
Nom
Max
Unit
VCC
VEE
+4.75
-4.75
+5.0
-5.0
+5.25
-5.25
Volts
+3.0
Volts
VOCR
-3.0
..
-
NOTE 2. When uSing only one channel of the hne drivers, the other channel should be mhlblted andlor Its outputs grounded .
DEFINITIONS OF INPUT LOGIC LEVELS*
Symbol
Test Figure
Min
Max
Unit
High-Level Input Voltage (at any input)
VIH
1,2
2.0
5.25
Volts
Low-Level Input Voltage (at any input)
VIL
1,2
0
0.8
Volts
Characteristic
* The
algebraic conventioii, where the most positive limit is designated maximum, is used with Logic Level Input Voltage Levels only.
THERMAL INFORMATION
The maximum power consumption an integrated circuit can tolerate at a given operating ambient temperature, can be found from the equation:
PD(TA) =
TJ(max) - TA
R8JA (Typ)
Where: PD(TA) = Power Dissipation allowable at a
given operatmg ambient temperature. This must be
greater than the sum ofthe products ofthe supply volt-
ages and supply currents at the worst case operating
condition.
TJ(max) = Maximum Operating Junction Temperature as listed in the Maximum Ratings
Section
TA = Maximum Desired Operating Ambient
Temperature
R8JA (Typ) = Typical Thermal Resistance Junction to
Ambient
MOTOROLA LINEAR/INTERFACE DEVICES
7-177
MC75S110
ELECTRICAL CHARACTERISTICS (TA
= 0 to
+ 70·e unless otherwise noted.)
Symbol
Test Figure
High-Level Input Current to lA, 1B, 2A or 2B
(VCC = Max, VEE = Max, VIHL = 2.4 V)'
(VCC = Max, VEE = Max, VIHL = Vce Max)
IIHL
1
Low-Level Input Current to lA, 1B, 2A or 26
(VCC = Max, VEE = Max, VILL = 0.4 V)
IILL
1
High-Level Input Current into lC or 2C
(VCC = Max, VEE = Max, VIHI = 2.4 V)
(VCC = Max, VEE = Max, VIHI = VCC Max)
IIHI
1
Low-Level Input Current into lC or 2C
(VCC = Max, VEE = Max, VILI = 0.4 V)
IILI
1
High-Level Input Current into D
(VCC = Max, VEE = Max, VIHI
(VCC = Max, VEE = Max, VIHI
IIHI
1
= 2.4 V)
= Vec Max)
Low-Level Input Current into D
(Vec = Max, VEE = Max, VILI
= 0.4 V)
Characteristic··
II
Min
Typ·
Max
Unit
-
-
-
40
1.0
p.A
rnA
-
-
-3.0
rnA
-
-
-
40
1.0
p.A
rnA
-
-
-3.0
rnA
-
-
-
80
2.0
p.A
rnA
-
-
-6.0
rnA
-
12
IILI
1
Output Current ("on" state)
(Vec = Max, VEE = Max)
(VCC = Min, VEE = Min)
10(on)
2
Output Current ("off" state)
IVce = Max, VEE = Max)
IVCC = Min, VEE = Min)
1010ff)
Supply Current from VCC (with driver enabled)
IVILL = 0.4 V, VIHI = 2.0 V)
ICClon)
3
-
-
Supply Current from VEE (with driver enabled)
IVILL = 0.4 V, VIHI = 2.0 V)
IEE(on)
3
-
Supply Current from VCC Iwith driver inhibited)
IVILL = 0.4 V, VILI = 0.4 V)
ICCloff)
3
Supply Current from VEE (with driver inhibited)
(VILL = 0.4 V, VILI = 0.4 V)
IEE(off)
3
*AII typical values are at
Vee =
rnA
-
6.5
+5.0 V,
VeE
=
2
-
-
15
p.A
100
100
35
rnA
-
-50
rnA
-
-
35
rnA
-
-
-50
rnA
Typ
Max
Unit
15
15
ns
-
9.0
9.0
-
16
13
25
25
ns
-5.0 V.
uFor conditions shown as Min or Max. use the appropriate value specified under recommended operating conditions.
"
SWITCHING CHARACTERISTICS (Vee = + 50 V VEE = - 50 V TA = + 25·e )
Symbol
Test Figure
Min
Propagation Delay Time from Logic Input A or 6 to
Output Y or Z IRL = 50 ohms, CL = 40 pF)
tpLHL
tpHLL
4
-
Propagation Delay Time from Inhibitor Input C or D
to Output Y or Z (RL = 50 ohms, CL = 40 pF)
tpLHI
tPHLI
4
Characteristic
MOTOROLA LINEAR/INTERFACE DEVICES
7-178
MC75S110
TEST CIRCUITS
FIGURE 1 -
Vee
',H. IlL
VEE
["J----ll1Y
IIH
;~see
TEST TABLE
Table I-""<>-~-L-----'
IlL
~'H
TEST AT
ANY INPUT
See
~ Table
"H
- [ See
;:
...J-=-=-<>-t--L.-J
_
Table
IlL
ADJACENT INPUTS
NOT UNDER TEST
IIH
GND
',L
4.5 V
~"<>-I---l
L __ ~ ___ --.J2Z-=
GNDl
FIGURE 2 -
10(on) and 10(off)
Vee
VEE
["J----ll1Y
VIH---f See
V,L ...--LTable r"<>-~-LJ
VIHJT~~~e
V,L
V,H
V,L
...J-="'-<>+--L--l
---f See
--lTable r-===-<>-+--LJ
L _____ --.J 2Z
GNDI
Arrows indicate actual direction
of current flow.
~
TEST TABLE
TEST
Ground all output pins
not under test.
LOGIC INPUTS
1A or 2A
1B or 2B
INHIBITOR INPUTS
1C or2C
D
V'L
V'L
V'L
V,H
V'H
V,L
V'H
V,H
at output
1Z or 2Z
V,H
v,H
V'H
V,H
at output
1Y or 2Y
V,H
V,H
V'H
V'H
V'L
V'L
V'l
V,H
V'H
V,L
V'H
V'H
Either
state
Either
state
V'L
V,L
V,H
V'H
V,L
'O(on)
at output
1Yor 2Y
'O(on)
'O(off)
10(off)
at output
1Z or 2Z
'O(off)
at output
1Y.2Y. 1Z. or 2Z
MOTOROLA LINEAR/INTERFACE DEVICES
7-179
V,L
MC75S110
TEST CIRCUITS (continued)
FIGURE 3 Vee
leell
1A
r
ICC and lEE
VEE
lEE
----
11
11Y
TEST TABLE
TEST
ALL LOGIC
INPUTS
ALL INHIBITOR
INPUTS
'ee(on)
Driver enabled
V,L
V,H
'EE(on)
Driver enabled
V,L
V,H
'ee(off)
Driver inhibited
V,L
V,L
'EE(off)
Driver inhibited
V,L
V,L
FIGURE 4 - PROPAGATION DELAY TIMES TEST CIRCUIT AND WAVEFORMS
VEE
~~ro~~
__~__~___ OUTPUT
Y
•
I
I
I
I
I
I
I
TO OTHER
lJ CHANNEL
-G;Dr--
LOGIC
INPUT
Aor B
'--~~---.
OUTPUT
Z
RL
50
~
r-v---------3.O V
tp1
INHIBIT
INPUT
Cor D
\~---- 0 V
;----I
t p2 - - - - -
,....---3.0 V
~------,+------OV
tPLH(L)
tpHL(lN)
,....-----~----
OUTPUT
Y
off
on
~------------------off
OUTPUT
Z
tPHLIL)
---------------on
NOTES: 1. The pulse generators have the following characteristics: Zo = 50 n, tr = tf
PRR ~ 500 kHz.
2. CL includes probe and jig capacitance.
3. For simplicity, only one channel and the inhibitor connections are shown.
=
10
::!::
5.0 ns tp1
=
MOTOROLA LINEAR/INTERFACE DEVICES
7-180
500 ns, PRR
=
1.0 MHz, tp2 = 1.0 ms,
@
MC75125
MC75127
MOTOROLA
SEVEN CHANNEL
LINE RECEIVERS
SEVEN CHANNEL LINE RECEIVERS
The MC75125 and MC75127 are seven-channel line receivers
designed to satisfy the requirements of the input/output interface
specification for IBM 360/370.
Special low-power design and Schottky-diode-clamped tran-
"fi#MWt
sistors allow low supply-current requirements while maintaining fast
switching speeds and high-current TTL outputs. The MC75125 and
MC75127 are characterized for operation from 0 to 70 0 C.
_
LSUFFIX
CERAMIC PACKAGE
CASE 620-10
.
16
1
•
Meets IBM 360/370 I/O Specification
•
Input Resistance - 7 kr! to 20 kr!
•
Output Compatible with DTL or TTL
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
II
• Schottky-Clamped Transistors
•
Operates from a Single 5 Volt Supply
PIN CONNECTIONS
•
High-Speed - Low Propagation Delay
•
Ratio Specification - tPLH/tPH L
•
Seven Channels in One 16-Pin Package
1A
16
1Y
Standard VCC and Ground Positioning on MC75127
2A
15
Vee
•
MC75125
3A
4A
TYPICAL APPLICATiONS
4
14
3Y
13
4Y
5A
12
5Y
6A
11
6Y
7A
10
7Y
2Y
Gnd
Logic
Y = A
MC75127
1/4 MC3481 or
1/4 MC3485
r - - - - - -,
~
MC7512517
'0",,"'
C~~~,
l~~~~~~~~
KTlJ U
~ ___ j
1A
16
2A
15
1Y
2Y
3A
3
14
4A
4
13
3Y
12
4Y
5A
6A
11
5Y
7A
10
6Y
7Y
Gnd
Logic:
MOTOROLA LINEAR/INTERFACE DEVICES
7-181
Vee
Y=A
•
MC75125, MC75127
MAXIMUM RATINGS ITA = 25°C unless otherwise noted)
Rating
Power Supply Voltage
Symbol
Value
Unit
Vee
+7.0
V
VI
-2.0 to +7.0
V
PD
mw/oe
°e
Input Voltage
Power Dissipation (Package Limitation)
Derate Above T A = 25°C
l/ROJA
1150
960
7.7
Operating Ambient Temperature Range
TA
o to +70
Junction Temperature
TJ
Ceramic Package
Plastic Package
mW
°e
+175
+150
Ceramic Package
Plastic Package
Storage Temperature Range
-65 to +150
T stg
°e
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Typ
Max
Unit
Power Supply Voltage
Vee
4.5
5.0
5.5
Vdc
High Level Output Current
IOH
-
-
-0.4
mA
Low Level Output Current
IOL
-
-
16
mA
Operating Ambient Temperature Range
TA
0
-
+70
°e
Characteristic
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, these specifications apply over recommended power supply and temperature ratings. Typical values measured at
TA = 25°C and Vee = +5 0 V)
Symbol
Min
Typ
Max
Unit
High-Level Input Voltage
VIH
1.7
-
V
Low-Level Input Voltage
VIL
-
-
0.7
V
High·Level Output Voltage IVee - 4.5 V, V I L - 0.7 V, IOH - -0.4 mAl
VOH
2.4
3.1
-
V
VOL
-
0.4
0.5
V
IIH
0.2
0.3
0.42
mA
Characteristic
Low·Level Output Voltage (Vee - 4.5 V, VIH = 1.7 V, IOL
= 16 mA)
High·Levellnput Current IVee = 5.5 V, VI = 3.11 V)
Low·Level Input Current (Vee
= 5.5
V, VI
= 0.15 V)
Short Circuit Output Current* (Vee - 5.5 V, Vo - 0)
Input Resistance IVee = 4.5 V, 0 V, or Open, ,;VI - 0.15 V to 4.15 V)
IlL
-
-
-0.24
mA
lOS
-18
-
-60
mA
ri
7.4
-
20
kn
15
25
mA
28
47
mA
Power Supply Current
Outputs High-Logic State (Vee = 5.5 V, IOH = -0.4 mA, all inputs at 0.7 V)
leeH
Power Supply Current
leeL
Outputs Low-Logic State (Vee
= 5.5
-
V. IOL = 16 mA, all inputs at 4.0 V)
SWITCHING CHARACTERISTICS (Vee = 5.0 V, TA
= 25°C, RL = 400
n, eL =
50 pF, unless otherwise noted. See Figure 1)
MC75127
MC75125
Characteristic
Symbol
Min
Typ
Max
Min
Typ
Max
tpLH
tpHL
7.0
10
14
18
25
30
7.0
10
14
18
25
30
1.3
Unit
ns
Propagation Delay Time
Low-to-High-Level Output
High-to-Low-Level Output
Ratio of Propagation Delay Times
tpLH/tPHL
0.5
0.8
1.3
0.5
0.8
Transition Time, Low-to-High-Level Output
tTLH
1.0
7.0
12
1.0
7.0
12
ns
Transition Time, High-to-Low Level Output
tTHL
1.0
3.0
12
1.0
3.0
12
ns
*No more than one output should be shorted at a time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-182
MC75125. MC75127
FIGURE 1 - PARAMETER MEASUREMENT INFORMATION
TEST CI RCU IT
Vee
10 ns
Output
1~~=---------~9~0~%~C~----------------3V
Input
0.7 V
10%
r
1':..1.:0"'%'-_ _ _ _ _ _ _
°V
t----t-tp LH
IJ,.,2~V,----- VOH
CL=50pF
(See Note B)
Output
('-=-'-_ _ _ _ _ _'-J---;,---_ _ _ _ _ _ VOL
NOTES:
A. The pulse generator has the fOllowing characteristics:
Zout It:I 50.n. PRR = 5 MHz.
B. CL includes probe and jig capacitance.
C. All diodes are MMD7000 or equivalent.
VOLTAGE WAVEFORMS
FIGURE 2 - SCHEMATIC (EACH RECEIVER)
0------.....- , - - - - - - -.....-------,--+-------,-----.... To Other Channels
-l
I
I
I
I
A
I
Input
I
12 kn
I
Nom
I
I
Gnd
I
L-------------------~~L__-----_-_-_--~~-_-___
----___
------T-O-O-t-h-e'-e~ha-n-n-.el~
Output
Y
COlT mon Circuit. \
MOTOROLA LINEAR/INTERFACE DEVICES
7-183
MC15125, MC75127
TYPICAL CHARACTERISTICS
FIGURE 4 - VOLTAGE TRANSFER CHARACTERISTIC
versusSUPPLY VOLTAGE
FIGURE 3 - VOLTAGE TRANSFER CHARACTERISTICS
.ersus AMBIENT TEMPERATURE
5.0
0
~
2:
4.0
'"
~
3.0
~
'">
'"
~
r-- Vee = 5.0 V
No Load
I-
~::::J
4. 0
w
w
'">
2.0
~
r-
TA=ooe -
~
25 0 e - ..
'"6
No Load
2.0
5.0V
--i
4.5V
-r--
I
1.0
1.0
o
o
1.0
VI. INPUT VOLTAGE (VI
o
o
2.0
2.0
1.0
VI. INPUT VOLTAGE (VI
FIGURE 6 - LOW-LEVEL OUTPUT VOLTAGE
versus OUTPUT CURRENT
FIGURE 5 - INPUT CURRENT versus INPUT VOLTAGE
0.8
0.4
Vele = 5.0 IV
'--TA = 250 e
~
./
/V
No Load
/
o
/'
O. 5
0.4
~
0.3
~
O. 21-"'"
..:.
.... ..---
~ O. 1
o
1.0
---,...--
c
....w
/
r-- -VI=5.0V
TA=25oe
!;
/'
1
Vee=5.0V
0.6
'"
/'
2
O. 7
~
:;
>
~
/'
o
Vee = 5.5 V --i
'">6
700 e _
>
TA = 250 e
-
3.0
2.0
3.0
5.0
4.0
o
5.0
10
10. OUTPUT CURRENT (mAl
VI. INPUT VOLTAGE IVI
FIGURE 7 - SUPPLY CURRENT versus SUPPLY VOLTAGE
40
35
«
.§
I
13
Seven Channels
/
30 f--TA = 25°C
No load
25
/
II
20
~
~
~
15
f\
10
5.0
o
--
o
AHI~PUts_ f - -
@4.0V
II,,). 7
/ ........ ~Allinputs
v - f-@r
~
1.0
2.0
5.0
4.0
3.0
Vee. SUPPLY VOLTAGE IVI
6.0
MOTOROLA LINEAR/INTERFACE DEVICES
7-184
15
20
®
MC75128
MC75129
MOTOROLA
EIGHT-CHANNEL
LINE RECEIVERS
EIGHT-CHANNEL LINE RECEIVERS
The MC75128 and MC75129 are eight-channel line receivers
designed to satisfy the requirements of the input/output interface
specification for IBM 360/370. Both devices feature common
strobes for each group of four receivers. The MC75128 has an
active high strobe; the MC75129 has an active low strobe.
Special low-power design and Schottky-diode-clamped transistors allow low supply current requirements while maintaining fast
switching speeds and high-current TIL outputs. Both devices are
characterized for operation from 0 to 70·C.
.........
~~H _~_~ ~
SUFFIX
CERAMIC PACKAGE
CASE 732-03
1
,,""'"
~ ¥]ft,~.~~UFFIX
•
PLASTIC PACKAGE
CASE 738-03
Meets IBM 360/370 I/O Specification
•
Input Resistance - 7 kQ to 20 kQ·
•
Output Compatible with DTL or TTL
•
Schottky·Clamped Transistors
•
Operates from a Single 5 Volt Supply
•
H igh·Speed - Low Propagation Delay
PIN CONNECTIONS
MC75128
20 vee
•
Ratio Specification - tPLH/tPH L
IS
•
Common Strobe for Each Group of Four Receivers
1A
2
19 1Y
•
MC75128 Strobe - Active·High
MC75129 Strobe - Active·Low
2A
3
18
2Y
3A
4
17
3Y
4A
5
16
4Y
5A
6
15
5Y
14
6Y
6A
7A
8
13
7Y
8A
9
12
8Y
GNO 10
11
2S
MC75129
TYPICAL APPLICATION
Vee
IS
19 1Y
1A
1/4 MC3481 or
1/4 MC3485
r - - - - ---,
I
I
I
l
~
:~ca~ble
L______ J
MC75128/9
CoaxIal
r - - -
::
RT
: :
L ___ J
2A
3
18
2Y
3A
4
17
3Y
16
4Y
6
15
5Y
14
6Y
4A
5A
6A
7A
8
13
7Y
8A
9
12
BY
GNO 10
11
2S
MOTOROLA LINEAR/INTERFACE DEVICES
7-185
II
MC75128, MC75129
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
+7.0
V
A Input Voltage
VIA
-0.15 to +7.0
V
Strobe Input Voltage
VIS
+7.0
V
Po
mW
mW/oC
°c
Power Dissipation (Package Limitation)
Ceramic Package
Plastic Package
Derate Above T A = 2SoC
lIR eJA
1150
960
-7.7
Operating Ambient Temperature Range
TA
o to +70
Junction Temperature
TJ
°c
Ceramic Package
+175
+150
Plastic Package
Storage Temperature Range
T stg
-65 to +150
°c
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Typ
Max
Unit
Power Supply Voltage
VCC
4.5
5.0
5.5
Vdc
High Level Output Current
10H
mA
10l
16
mA
Operating Ambient Temperature Range
TA
0
-
-0.4
Low Level Output Current
-
+70
°c
Characteristic
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, these specifications apply over recommended power supply and temperature ratings. Typical values measured at
TA = 25°C and VCC = +5.0 V)
Characteristic
II
Symbol
High-Level Input Voltage
A Inputs
Sinputs
Low-Level Input Voltage
A Inputs
S Inputs
= 4.5
1.7
2.0
-
-
-
-
0.7
0.7
V
V
VOH
2.4
3.1
-
V
= 1.7
Val
-
0.4
0.5
V
-
-1.5
V
0.3
0.42
20
mA
p.A
-0.24
-0.4
mA
-60
mA
(VCC - 4.5 V, VIH
nput Clamp Voltage (VCC
4.5 V, II
V,
= -0.4 mAl
10l = 16 mA)
18 mA, S Inputs)
VIK
5.5 V, VI - 3.11 V, A Inputs)
= 5.5 V, VI = 2.7 V, S Inputs)
IIH
-
= 0.15 V, A Inputs)
= 0.4 V, S Inputs)
IlL
-
High-Level Input Current
(Vec
(VCC
Low-Level Input Current
(VCC - 5.5 V, VI
(VCC = 5.5 V, VI
-
Short Circuit Output Current * (VCC - 5.5 V, Vo - 0)
lOS
rj
VCC - 4.5 V, 0 V, or Open, t!.VI- 0.15 V to 4.15 V)
Power Supply Current - Outputs High-Logic State, all inputs at 0.7 V
(VCC
(VCC
= 5.5
= 5.5
= 5.5
= 5.5
-18
-
-
7.0
20
V, Strobe at 2.4 V - MC75128)
V, Strobe at 0.4 V - MC75129)
-
19
19
31
31
-
32
32
53
53
rnA
ICCl
V, Strobe at 2.4 V - MC75128)
V, Strobe at 0.4 V - MC75129)
kl1
mA
ICCH
Outputs Low-Logic State, all inputs at 4.0 V
(VCC
(VCC
Unit
V. VI L· 0.7 V, IOH
Low-Level Output Voltage
Power Supply Current
Max
-
(VCC
eSlstance
Typ
Vil
High-Level Output Voltage
nput
Min
VIH
SWITCHING CHARACTERISTICS (VCC = 5.0 V, TA = 25°C, Rl = 400 11, CL = 50 pF, unless otherwise noted, See Figures 1 and 2)
Symbol
Characteristic
Min
MC75128
TVp
Max
Min
MC75129
Typ
Max
Propagation Delay Time - From A Inputs
Low-to-High-Level Output
High-to-Low-Level Output
tPLH(A)
tPHl(A)
7.0
10
14
18
25
30
7.0
10
14
18
25
30
Propagation Delay Time
From S Inputs
Low-to-High-Level Output
High-to-Low-Level Output
tpLH(S)
tPHL(S)
-
-
26
22
40
35
-
20
16
35
30
Ratio of Propagation Delay Times - A Inputs
Unit
ns
ns
tPLH(A)/tPHL(A)
0.5
0.8
1.3
0.5
0.8
1.3
Transition Time, Low-to-High-Level Output
tTlH
1.0
7.0
12
1.0
7.0
12
ns
Transition Time, High-to-Low-Level Output
tTHL
1.0
3.0
12
1.0
3.0
12
ns
"'No more than one output should be shorted at a time.
MOTOROLA LINEAR/INTERFACE DEVICES
7-186
MC75128, MC75129
FIGURE 1 - PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORMS
LOAD CIRCUIT
OUTPUT
FROM OUTPUT
UN DE R TEST
INPUT
(See Notes
A, D, and E)
Vee
1f
400
n
-::t:'--"""~f--<~.I-1.~I--l.~I--'l
J
50 pF
(See Note C)
-=
(See Note B)
OUTPUT
NOTES:
A. Input pulses are supplied by a generator having the
following characteristics: 20 = 50 n, PRR = 5 MHz.
B. Includes probe and jig capacitance.
C. All diodes are MMD7000 or equivalent.
D. The strobe inputs of MC75129 are in-phase with the
output.
= 0.7 V and V re f2 = 1.7 V for testing data (A)
I nputs, V ref1 = V ref2 = 1.3 V for strobe inputs.
E, V re f1
FIGURE 2 - SCHEMATIC (EACH RECEIVER)
r------.--------------~--------~~-----oVee
Input
A
r----------------I
I
12 k
Nom
I
I
I
I
17 k
Nom
I
I
~
I
I
I
~:.7.:~2.:t
I
__
MC7512S1
r-I
I
Input
S
I
I
I
~
_______
~,
_ _ _ _ _ _ _J
To Three
Other
Channels
To Seven
Other Channels
MOTOROLA LINEAR/INTERFACE DEVICES
7-187
II
MC75128, MC75129
TYPICAL CHARACTERISTICS
FIGURE 3 -
VOLTAGE TRANSFER CHARACTERISTICS
versus AMBI~NT T~MP~RATURE
FIGURE 4 -
~
~~==~~-~--~r~~~~t---t--r--
4.0
w
3.0
">
~
~
~
~
TA=OoC __
2.0
TA" 250C
t---
---+-----+----r---ttt--r-------t---VCC=5.5V-
. - - ·--5-.0+V-,------t--tlt-r---r---r---j
.tv--_---t--tlt-r---r---r---j
~ 2.0 1------t----t----+---+--4
25 0 C - _
6
>
70'C-
1.0
3.0 I---- No Load
~
r-
----
-~----
C)
= 5.0 V
c--- f- VCC
No load
6
>
-_.-
~ 4.0~=+=+==f:.==+=+==httt
w
'"~
VOLTAGE TRANSFER CHARACTERISTIC
v,rsusSUPPLY VOLTAGE
5.0F=F==F=F==F=F==F;-T-II!
5. 0
1.0 f---j---t_--t_---j-----j---t--ttH-----t----+---I
f--t--t-----+--~--~--~H-t__t----r-
o
o
1.0
°0~---L-~--l..--L..~1.~0--~~t=~===±==?2.0
2.0
VI. INPUT VO LTAGE (VI
VI. INPUT VOLTAGE (VI
FIGURE 5 - INPUT CURRENT versus INPUT VOLTAGE
0.4
FIGURE 6 O. 8
VCC = 5.0 V
t---T A = 25'C
No Load
~
./
w
'1
,/
~
">
/
~
/'
2
TA
=
-
25°C
O. 5
w
/
~
O. 3
~
O. 2
I---
,....-
-
f--
j..--
,....-
.:.
:; O. 1
,/
o
Vee = 5.0 v
~
/
1
O. 7
o.61--- t-- VI = 5.0 V
g O. 4
/'
o
LOW-LEVEL OUTPUT VOLTAGE
versus OUTPUT CURRENT
1.0
2.0
3.0
4.0
5.0
o
o
5.0
10
10. OUTPUT CURRENT (mAl
VI. INPUT VOLTAGE (VI
MOTOROLA LINEAR/INTERFACE DEVICES
7-188
15
20
SN75172
SN75174
@ MOTOROLA
Product Preview
QUAD EIA-485 LINE DRIVERS
WITH THREE-STATE OUTPUTS
QUAD LINE DRIVERS WITH NAND ENABLED
THREE-STATE OUTPUTS
The Motorola SN75172/174 are monolithic quad differential line
drivers with three-state outputs. They are designed specifically to
meet the requirements of EIA-485, EIA-422A Standards and CCITT
recommendations V.ll and X.27.
The device is optimized for balanced multipoint bus transmission at rates up to 4 megabits per second. Each driver features wide positive and negative common-mode output voltage
ranges making it suitable for party-line applications in noisy
environments.
The SN75172/174 provides positive- and negative-current limiting and thermal shutdown for protection from line fault conditions on the transmission bus line. Shutdown occurs at a junction
temperature of approximately 150°C. These devices offer optimum performance when used with the SN75173 or SN75175
quadruple differential line receivers.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Meets EIA-485 Standard for Party-Line Operation
J SUFFIX
CERAMIC PACKAGE
CASE 620-10
• Meets EIA Standard EIA-422A and CCITT Recommendations
V.ll and X.27
• Designed for Multipoint Transmission on Long Bus Lines in
Noisy Environments
• 3-State Outputs
16~
~mnH~
• Common Mode Output Voltage Range ... -7.0 V to 12 V
• Active High and Active Low Enables
• Thermal Shutdown Protection
• Positive and Negative Current Limiting
N SUFFIX
• Operates from Single 5.0 Volt Supply
PLASTIC PACKAGE
CASE 648-06
• Low Power Requirements
• Functionally Interchangeable With
AM26LS31 (SN75172)
MC3487 (SN75174)
PIN CONNECTIONS
SN75174
SN75172
Input A
Input A
VCC
Input D
Outputs A {
VCC
2
} Outputs D
} Outputs D
Enable
AlB Control
Enable
Outputs B {
C/D Control
Outputs B {
11
}
Outputs C
} Outputs C
Input B
Gnd
Input D
Outputs A {
Input B
Gnd
Input C
Input C
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
7-189
SN75172, SN75174
SN75172
SN75174
TRUTH TABLE
Input
H
L
X
TRUTH TABLE
Control
Inputs
(E/E)
Noninverting
Output
Inverting
Output
H/L
H/L
UH
H
L
Z
L
H
Z
Input
H
L
X
Control
Input
Noninverting
Output
Inverting
Output
H
H
L
H
L
Z
L
H
Z
L = Low Logic State
H = High Logic State
X = Irrelevant
Z = Third-State (High Impedance)
L = Low Logic State
H = High Logic State
X = Irrelevant
Z = Third-State (High Impedance)
II
MOTOROLA LINEAR/INTERFACE DEVICES
7-190
®
SN75173
SN75175
MOTOROLA
Advance Information
QUAD EIA-485
LINE RECEIVERS WITH
THREE-STATE OUTPUTS
QUAD EIA-485 LINE RECEIVERS
The Motorola SN75173/175 are monolithic quad differential line
receivers with three-state outputs. They are designed specifically
to meet the requirements of EIA-485, EIA-422A!23A Standards and
CCITT recommendations.
The devices are optimized for balanced multipoint bus transmission at rates up to 10 megabits per second. They also feature
high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ± 200 millivolts over a common mode
input voltage range of -12 volts to 12 volts. The SN75173/175
are designed for optimum performance when used with the
SN75172 or SN75174 quad differential line drivers.
SILICON MONOLITHIC
INTEGRATED CIRCUITS
• Meets EIA Standards EIA-422A and EIA-423A, EIA-485
• Meets CCITT Recommendations V.10, V.ll, X.26, and X.27
J SUFFIX
CERAMIC PACKAGE
CASE 620-10
• Designed for Multipoint Transmission on Long Bus Lines in
Noisy Environments
• 3-State Outputs
• Common-Mode Input Voltage Range ... -12 V to 12 V
• Input Sensitivity ... ±200 mV
-
• Input Hysteresis ... 50 mV Typ
• High Input Impedance ... 1 EIA-485 Unit Load
• Operates from Single 5.0 V Supply
1
• Low Power Requirements
• Plug-In Replacement for MC3486 (SN75175)
AM26LS32 (SN75173)
N SUFFIX
PLASTIC PACKAGE
CASE 648-06
PIN CONNECTIONS
SN75173
In~ts
SN75175
1
VCC
In~ts
{
Inputs
} InPButs
Output
A
3-5tate
Control
Output
C
Inputs
Vee
1
{
Output
A
B
Output
B
3·State
Control
A/C
3·State
Output
B
3·State
Output
Control
e
Control
Output
D
Inputs
Output
D
C
BID
C
Inputs
Inputs
D
Gnd
D
Gnd
ORDERING INFORMATION
ORDERING INFORMATION
Device
Temperature
Package
Device
Temperature
Package
SN75173J
o to +70oe
o to +70oe
Ceramic DIP
SN75175J
Ceramic DIP
Plastic DIP
SN75175N
o to +70oe
o to +70oe
SN75173N
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
7-191
Plastic DIP
SN75173, SN75175
ABSOLUTE MAXIMUM RATINGS
Rating
Power Supply Voltage
Input Common Mode Voltage
Input Differential Voltage
Symbol
Value
VCC
7.0
Vdc
VICM
±25
Vdc
Unit
VID
±25
Vdc
Three-State Control Input Voltage
VI
7.0
Vdc
Output Sink Current
10
50
mA
Storage Temperature
Tstg
-65 to +150
°c
TJ
+175
+150
°c
Operating Junction Temperature -
Ceramic Package
~ Plastic Package
RECOMMENDED OPERATING CONDITIONS
Rating
Power Supply Voltage
Operating Ambient Temperature
Symbol
Value
Unit
VCC
4.75 to 5.25
Vdc
TA
o to +70
°C
Input Common Mode Voltage Range
VICM
-12to+12
Vdc
Input Differential Voltage Range
VIDR
-12to+12
Vdc
--
ELECTRICAL CHARACTERISTICS (Unless otherwise noted, minimum and maximum limits apply over recommended
temperature and power supply voltage ranges Typical values are for TA :::25°C Vee::: 5 0 V and VICM::: 0 V) (Note 1)
Svmbol
Characteristic
Min
Typ
Max
Unit
~~-~
Differential Input Threshold Voltage (Note 2)
(-12 V';; VICM';; 12 V, VIH = 2.0 V)
(10 = -0.4 mA, VOH;;' 2.7 V)
(10 = 16 rnA. VOL';; 0.5 VI
II
V
VTH(D)
Input Hysteresis
VT+ - VT_
Input Line Current (Differential Inputs)
(Unmeasured Input at 0 V - Note 3)
(VI = +12 V)
(VI = -7.0 V)
II
Input Resistance (Note 4)
ri
-
-
.-
50
-
mV
mA
-
-
-
-
1.0
-0.8
-
-
1 Unit
Load
.. -
~-.-
-- r--------
-~~-.
1-------V
Input Balance and Output Level (Note 3)
(-12 V';; VICM';; 12V, VIH= 2.0V)
(10 = -0.4 mA, VID = 0.2 V)
(10 = 8.0 mA. VID = -0.2 V)
(10 = 16 rnA, VID = -0.2 V)
VOH
VOL
VOL
2.7
Input Voltage -
High Logic State (Three-State Control)
VIH
2.0
Input Voltage -
Low LogiC State (Three-State Control)
VIL
-
Input Current -
High Logic State (Three-State Control)
IIH
(VIH = 2.7 V)
(VIH = 5.5 V)
0.2
-0.2
-
-
-
-
0.45
0.5
-
-
-
0.8
V
V
~A
-
-
20
100
IlL
-
-
-100
~A
VIK
-
-
-1.5
V
-
-
-
-20
20
-
-85
mA
70
rnA
...
Input Current "- Low Logic State (Three-State Control)
-
(VIL = 0.4 V)
Input Clamp Diode Voltage (Three-State Control)
(11K = -18 rnA)
Output Third State Leakage Current
~A
10Z
(VI(D) = 3.0 V, VIL = 0.8 V, Va = 0.4 V)
(VI(D) = -3.0 V, VIL = 0.8 V, Va = 2.4 V)
Output Short-Circuit Current (Note 5)
(VI(D) = 3.0 V, VIH = 2.0 V, Va = 0 V)
lOS
-15
Power Supply Current
ICC
-
-
(VIL = 0 V) (All Inputs Grounded)
NOTES:
1. All currents into device pins are shown as positive. out of device
pins are negative. All voltages referenced to ground unless otherwise noted.
2. Differential input threshold voltage and guaranteed output levels
are done simultaneously for worst case.
3. Refer to EIA-485 for exact conditions. Input balance and guaranteed output levels are done simultaneously for worst case.
4. Input resistance should be derived from input line current specifications and is shown for reference only. See EIA-485 and input
line current specifications for more specific input resistance information.
5. Only one output at a time should be shorted.
MOTOROLA LINEAR/INTERFACE DEVICES
7-192
SN75173, SN75175
SWITCHING CHARACTERISTICS (Unless otherwise noted, VCC =5 0 V and TA =25°C)
Characteristic
Propagation Delay Time -
Symbol
Typ
Max
Min
Unit
Typ
Max
Differential Inputs to Output
ns
(Output High to Low)
(Output Low to High)
Propagation Delay Time -
SN75175
SN75173
Min
tpHL(D)
tPLH(D)
-
25
25
35
35
-
25
25
35
35
tpLZ
tpHZ
tpZH
tpZL
-
20
20
16
16
40
30
22
25
-
16
19
11
11
35
35
30
30
Three-State Control to Output
ns
(Output Low to Third State)
(Output High to Third State)
(Output Third State to High)
(Output Third State to Low)
SN75173
SN75175
FUNCTION TABLE (EACH RECEIVER)
FUNCTION TABLE (EACH RECEIVER)
--
Differential Inputs
3-State
Differential Inputs
VID:;"0.2 V
r---'
-0.2 V
< VID < 0.2 V
r----VID';; -0.2 V
(------
X
Control
Output
Y
4
12
H
X
X
L
H
X
X
L
,
,
H
X
X
L
L
L
L
H
Z
3-State
Control
Output
Y
H
H
VID:;,,0.2V
-0.2 V < VID
H
H
< 0.2 V
H
?
VID';; -0.2 V
H
L
X
L
Z
H = high level
L:: low level
X:: irrelevant
--
..
? :: indeterminate
Z = high-impedance (off)
SWITCHING TEST CIRCUIT AND WAVEFORMS
FIGURE 1 -
PROPAGATION OELAY, DIFFERENTIAL INPUT TO OUTPUT
To Scope
(Outputl
To Scope
(Input)
51
""
"
I
"
CL=15pF
(Includes Probe
':'"
and Stray
Capacitance)
'O~~'" ~'
tPL~(~)
--- -
tPHL(D)
VOH----+-,-----~
+1.5 V
Input Pulse CharacteristIcs -
tTLH = tTHL = 6.0 ns (10% to 90%)
PRR = 1.0 MHz, 50% Duty Cycle
+2.0 V
3-State Control
MOTOROLA LINEAR/INTERFACE DEVICES
7-193
SN75173, SN75175
SWITCHING TEST CIRCUIT AND WAVEFORMS (continued)
FIGURE 2 -
PROPAGATION DELAY. THREE-STATE CONTROL INPUT TO OUTPUT
Input Pulse Characteristics -
=
=
To Scope
(Input)
tTLH tTHL 6.0 ns (10% to 90%)
PRR = 1.0 MHz, 50% Duty Cycle
~
n..:..:Ji
,
,
!,
,II
I
I
r--+--~~
,
To Scope
I
(Output)
Pulse
Generator
SWI
>-4I---.--.....
-~I---.-
+1.5 V for tpHZ and tpZH
-1.5 V for tPLZ and tpZL
Differential
Inputs
CL = 15 pF
(Includes Probe
and Stray
Capacitance)
I
All Diodes 1N916
-=-
3.0 V
0 V ___
-J
=1.3 V
Output
or Equivalent
5.0 k
3.0 V
Input
2.0 k
__
.,.....-___________ +5.0 V
1.5 V
I - t PLZ
Ejn
SWI Closed
SW2 Closed
o V ----
1.5 V
VOH~U~P;~
----U--,
~V
L
Eout
= 1.3 V
VOL ____ ~--------OV
=5.0V-VBE
SW2 Closed
-
=====-_________
3.0 V
tpZL
Input
1.5 V
o V ----
Input
SWI Closed
0V
SW2 Open
_~ltPZL
Output
~
~
VOL ______________ 0 V
TYPICAL CHARACTERISTICS
(80th Device Types. Unless Otherwise Noted)
FIGURE 3 - OUTPUT VOLTAGE versus
DIFFERENTIAL INPUT VOLTAGE
5.0
Vcc = 5.0 V
TA = 25°C
4.0
VCM=-12V
VCM=+12V
o
-140-120-100-80 -60 -40 -20 0 20 40 60 80 100 120140
VID, DIFFERENTIAL INPUT VOLTAGE (mV)
MOTOROLA LINEAR/INTERFACE DEVICES
7-1'94
SN75173, SN75175
TYPICAL CHARACTERISTICS (continued)
FIGURE 5 - OUTPUT VOLTAGE versus (INVERTED)
3-STATE CONTROL VOLTAGE - SN75173
FIGURE 4 - OUTPUT VOLTAGE versus
3-STATE CONTROL VOLTAGE
5.0
",4.0
i
r--
1
SN751~3
1
5.25 V
Vee
=5.0 V
~ 3.0 ' - Vee =4.75 V
I
El
-Vee
~
Vee - 4.75 V
2.0
~
I
0.5
f
I
I
1.0
1.5
2.0
2.5
3.0
VI, 3·STATE CONTROL VOLTAGE (VOLTSI
I
3.5
o
o
4.0
FIGURE 6 - HIGH LEVEL OUTPUT VOLTAGE
versus OUTPUT CURRENT
05
1.0
1.5
2.0
2.5
3.0
VI, 3-STATE CONTROL VOLTAGE (VOLTSI
0.5
in
Vm =+0.2 V
TA =25'C
'"
~ 4.0
w
'"i5
0 3.0
:>
---.:
-------
§j
5
".ffC±
"""1'-.""
Vee
1.0
0
El
-
~O.4
FIGURE 8 -
:>
-35
o
-40
o
HIGH LEVEL OUTPUT VOLTAGE
versus TEMPERATURE
Vee = 5.0 V_
'-----TA = 25°C
10
15
20
25
30
IQL. LOW LEVEL OUTPUT CURRENT (mAl
5.0
35
40
FIGURE 9 - LOW LEVEL OUTPUT VOLTAGE
versus TEMPERATURE
5.0
0.5
~
El~4.0
~
3.5
~
o
'"
0.4
§; 3.0
:>
0.3
>-
~
~
0.2
~ 2.5
=>
~ 2.0
Vee = 5.0 V
10H = 400 p.A-
-
=
=
Vee 5.0 V
10L 16 rnA
§j
~ 1.5
~ 1.0
"
V
~
Ui 4.5
~
/
~ o. l
-10
-15
-20
-25
-30
10H. HIGH LEVEl OUTPUT CURRENT (mAl
V
V
~ 0.2
§j
=4.75 V'0 t\.
L
/
~
5.0 V
'0~
-5.0
4.0
/
~ 0.3
'0...'\.
o
V
~
~ee =5.25 V
~ ~VCC -
2.0
3.5
FIGURE 7 - LOW LEVEL OUTPUT VOLTAGE
versus OUTPUT CURRENT
5.0
in
~
Vro =102 V I
Load =8.0 kil to Gnd
TA = 25°C
=2.0 V
SN75173 VI to Pin 4. Pin 12
SN75175 VI to Pin 4 or 12
~l,O
o
-
VI to IPin 12.
Pin 4 = 0 V
VIO =+0.2 V
load = 8.0 IeIl to Gnd
TA =25°C
:>
i5:
40
5.0 V
Vee
~ 3.0
>-
5.0
I
Vee J5.25 V
1
~ 0.5
:>
0
o
10
20
30
40
50
60
70
80
TA. FREE AIR TEMPERATURE (OCI
90
10
100
20
30
4U
50
60
70
80
'A. FREE AIR TEMPERATURE (Oel
MOTOROLA LINEAR/INTERFACE DEVICES
7-195
90
100
ORDERING INFORMATION
Device
TCF6000
TCF6000D
Temperature Range
-40·C to +85·C
- 40·C to + 85·C
Package
Plastic DIP
Plastic SO-8
TCF6000
Advance Information
PERIPHERAL CLAMPING ARRAY
SILICON MONOLITHIC
INTEGRATED CIRCUIT
PERIPHERAL CLAMPING ARRAY
· .. designed to protect input/output lines of microprocessor
systems against voltage transients.
DSUFAX
PLASTIC PACKAGE
CASE 751-02
SO-8
• Optimized for HMOS System
• Minimal Component Count
• Low Board Space Requirement
• No P.C.B. Track Crossov.ers Required
• Applications Areas Include Automotive, Industrial,
Telecommunications and Consumer Goods
PLASTIC PACKAGE
CASE 626-05
Gnd08
PIN ASSIGNMENT
•
C~mp
FIGURE 1 -
Inputs
5 Clamp
lI ---..M--++-----t-t4>--1
Micro
Computer
1-~'WIr--~ ---+--;
Gnd
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
7-196
C~mp
Clamp 4
BLOCK DIAGRAM AND TYPICAL APPLICAnON
...
vcc
6 Clamp
--~~~~------++~
Analog
Inputs
7
Clamp 3
Each Cell
Digital
2
TCF6000
MAXIMUM RATINGS
=
(TA
25·C unless otherwise noted, Note 1.)
Rating
Symbol
Value
Supply Voltage
VCC
6.0
V
Supply Current
Ii
300
mA
Clamping Current
11K
±50
mA
Junction Temperature
TJ
125
·C
PD
400
mW
8JA
100
.C/W
TA
-40 to +85
·C
Tstg
-55to +150
·C
Power Dissipation (TA
=
+ 85·C)
Thermal Resistance (Junction-Ambient)
Operating Ambient Temperature Range
Storage Temperature Range
Unit
Note 1: Values beyond which damage may occur.
ELECTRICAL CHARACTERISTICS
(TA
=
25·C, 4.5 "" VCC "" 5.5 V; if not otherwise noted.)
Characteristic
Symbol
Min
Max
Unit
Positive Clamping Voltage (Note 2)
(11K = 10 mA, -40"C "" TA "" +85·C)
V(lK)
-
VCC + 1.0
V
Positive Peak Clamping Current
IIK(P)
-
20
mA
Negative Peak Clamping Voltage
(11K = -10 mA, -40·C "" TA "" +85·C)
V(lK)
-0.3
-
V
Negative Peak Clamping Current
IIK(P)
-20
-
mA
Output Leakage Current
(0 V "" Vin "" Vccl
(0 V"" Vin "" VCC, -40·C "" TA "" +85·C)
Channel Crosstalk (AcT
=
p.A
20 log IL"IK)
Quiescent Current (Package)
IL
ILT
-
1.0
5.0
AcT
100
dB
IB
-
2.0
mA
Note 2: The device might not give 100% protection in CMOS applications.
CIRCUIT DESCRIPTION
To ensure the reliable operation of any integrated circuit based electronics system, care has to be taken that
voltage transients do not reach the device I/O pins. Most
NMOS, HMOS and Bipolar integrated circuits are particularly sensitive to negative voltage peaks which can provoke latch-up or otherwise disturb the normal functioning
of the circuit, and in extreme cases may destroy the
device.
Generally the maximum rating for a negative voltage
transients on integral circuits is - 0.3 V over the whole
temperature range. Classical protection units have consisted of diode/resistor networks as shown in Figures 2a
and 2b.
The arrangement in Figure 2a does not, in general,
meet the specification and is therefore inadequate.
The problem with the solution shown in Figure 2b .lies
mainly with the high current drain through the biassing
devices R1 and 03. A second problem exists if the input
line carries an analog signal. When Vin is close to the
ground potential, currents ariSing from leakage and mismatch between 03 and 02 can be sourced into the input
line, thus disturbing the reading.
FIGURE 2 -
CLASSICAL PROTECTION CIRCUITS
VCC
VCC
Rl
Vin Rin
Vin Rin
I
I
I
I
I
I
I
Cin
*
Cin
I
I
D3
I
i
I
a
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
7-197
;;k
I
I
I
b
Gnd
II
•
TCF6000
AftPllCATIONS INFORMATION
Figure 3 shows the clamping characteristics which are
common to each ofthe six cells in the Peripheral Clamping Array.
As with the classical protection circuits, positive voltage transients are clamped by means of a fast diode to
the VCC supply line.
Figure 4 depicts a typical application in a microcomputer based automotive ignition system.
The TCF6000 is being used not only to protect the system's normal inputs but also the (bidirectional} serial diagnostics port.
The value of the input resistors, Rin, is determined by
the clamping current and the anticipated value of the
spikes.
FIGURE 3 - CLAMPING CHARACTERISTICS
11K
+10mA~-----------------------t-----
Thus:
Rin =
where
V
V
Ijj(
Ohms
= Peak volts (Volts)
11K = Clamping current (Amps)
-0.3V
OV
So, taking
V
VCC
= 300 V typically (SAE J1211)
11K = 10 mA (recommended)
VCC +
0.75 V Typ
gives
Rin
•
Impedance
..
High
Impedance
30 k
Resistors of this value will not usually cause any problems in MOS systems, but their presence needs to be
taken into account by the designer. Their effect will normally need to be compensated for in Bipolar systems.
-lOrnA
Low I
=
Low
Impedance
FIGURE 4 -
TYPICAL AUTOMOnvE APPUCATION
Vee
0:-
Gnd
T
C
F
6
0
0
0
I
Gnd
VBatt
VCC
IliI'f1
80
De
01
VBatt
MC6B05
52
Bl
DO
B2
6X
Rin
VSS
3X
Cin
Gnd
Gnd
Serial Diagnostics
...
Car
Ignition Module
MOTOROLA LINEAR/INTERFACE DEVICES
7-198
Coil
Drive
Coil
Feedback
TCF6000
The use of Cin is not mandatory, and is not recommended where the lines to be protected are used for
output orfor both input and output. For digital input lines,
the use of a small capacitor in the range of 50 to 220 pF
is recommended as this will reduce the rate of rise of
voltage seen by the TCF6000 and hence the possibility of
overshoot.
In the case of the analog inputs, such as that from the
pressure sensor, the capacitor Cin is necessary for devices, such as the MC6805S2 shown, which present a low
impedance during the sampling period. The maximum
value for Cin is determined by the accuracy required, the
time taken to sample the input and the input impedance
during that time, while the maximum value is determined
by the required frequency response and the value of Rin.
Thus for a resistive input AID connector where:
TS = Sample time (Seconds)
RD = Device input resistance (Ohms)
Vin = Input voltage (Volts)
k = Required accuracy (%)
01 = Charge on capacitor before sampling
02 = Charge on capacitor after sampling
ID = Device input current (Amps)
Thus:
01-0 2
but
and
so that
and
so
k.01
=
100
01 = Cin Vin
01-0 2 = ID·TS
_ k.Cin-Vin
I
D TS 100
ID·TS
Cin (min) = - Vk. Farad
In·
.
100.TS
Cin (min) = k.RD Farad
The calculation for a sample and hold type converter
is even simpler:
k = Required accuracy (%)
CH = Hold capacitor (Farad)
.)
100.CH F
Cin (min = - - k - arad
For the MC6805S2 this comes out at:
Cin (min) = 100.25 pF
0.25
10 nF for 1/4% accuracy
•
MOTOROLA LINEAR/INTERFACE DEVICES
7-199
•
®
UlN2068B
MOTOROLA
QUAD 1.5 A SINKING HIGH CURRENT SWITCH
QUAD 1.5 A
DARLINGTON SWITCH
The ULN20688 is a high-voltage, high-current quad Darlington
switch array designed for high current loads, both resistive and
reactive, up to 300 watts.
It is intended for interfacing between low level (TTL, DTL, LS
and 5.0 V CMOS) logic families and peripheral loads such as
relays, solenoids, dc and stepping motors, multiplexer LED and
incandescent displays, heaters, or other high voltage, high
current loads.
The Motorola ULN20688 is specified with minimum guaranteed
breakdown of 50 V and is 100% tested for safe area using an
inductive load. It includes integral transient suppression diodes.
Use of a predriver stage reduces input current while still allowing
the device to switch 1.5 Amps.
It is supplied in an improved 16-Pin plastic DIP package with
heat sink contact tabs (Pins 4,5 and 12, 13). A copper alloy lead
frame allows maximum power dissipation using standard cooling
techniques. The use of the contact tab lead frame facilitates attachment of a DIP heat sink while permitting the use of standard layout
and mounting practices.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
B SUFFIX
PLASTIC PACKAGE
CASE 648C-02
• TTL, DTL, LS, CMOS Compatible Inputs
• 1.5 Amp Maximum Output Current
• Low Input Current
PIN CONNECTIONS
• Internal Freewheeling Clamp Diodes
• 100% Inductive Load Tested
• Heat Tab Copper Alloy Lead Frame for Increased Dissipation
MAXIMUM RATINGS (TA ~ 25"C and ratings apply to anyone device in the package
unless otherwise noted.)
Rating
Output Voltage
Input Voltage (Note 1)
Supply Voltage
Symbol
Value
Unit
Vo
50
V
VI
15
10
Vs
-
V
V
Collector Current (Note 2)
IC
1.75
A
Input Current (Note 3)
II
25
mA
Operating Ambient Temperature Range
Storage Temperature Range
Junction Temperature
o to
TA
+ 70
-5510 +150
°c
TJ
150
°c
C
B
B
Vs
Gnd
Gnd
Gnd
Gnd
B
B
NC
C
C
K
°c
T stg
K
C
Notes:
1. Input voltage referenced to ground.
2. Allowable output conditions shown in Figures 11 and 12.
3. May be limited by max input voltage.
Vs
r-_--_r-{)
ORDERING INFORMATION"
C
+---II*---t--<>K
Device
ULN2068B
I
I
Temperature
Range
O°C to + 70°C
I
Package
I Plastic DIP
• Other options of this ULN2060/2070 series are available for volume applications. Contact your local Motorola Sales Representative.
MOTOROLA LINEAR/INTERFACE DEVICES
7-200
ULN20688
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted.)
Fig.
Characteristic
Output Leakage Current
(VCE = 50 V)
(VCE ~ 50 V, TA = 70°C)
ICEX
1
I
Collector-Emitter Saturation Voltage
(lC = 500 mA
(lC = 750 mA
(lC=1.0A
(lC = 1.25 A
Symbol
VCE(sat)
Input Current - On Condition
(VI = 2.4 V)
(VI = 3.75 V)
-
Ilion)
4
5
Inductive Load Test
(VS = 5.5 V, VCC = 24.5 V,
tpw = 4.0ms)
3
Supply Current
(lC = 500 mA, Vin = 2.4 V, Vs = 5.5 V)
8
Turn-On Delay Time
(50"10 EI to 50"10 EO)
-
tpHL
Turn-Off Delay Time
(50"10 EI to 50"10 EO)
-
tpLH
Clamp Diode Leakage Current
(VR = 50 V)
(VR = 50 V, TA = 70°C)
6
Clamp Diode Forward Voltage
(IF = 1.0 A)
(IF = 1.5 A)
7
Vllon)
AVout
Max
-
-
-
1.13
1.25
1.40
1.60
V
-
-
-
mA
-
-
0.25
1.0
-
-
2.4
-
-
100
-
-
6.0
-
-
1.0
-
-
4.0
-
-
50
100
-
-
1.75
2.0
V
mV
mA
IS
IR
VF
Unit
I1A
100
500
-
Input Voltage - On Condition
(VCE = 2.0 V, IC = 1.5 A)
Typ
-
-
2
V· = 2.4 V)
on
Min
f1S
flS
flA
V
TEST FIGURES
FIGURE 2
FIGURE 1
Open
Open
Vs
VeE
Open
, - - - - - - Q - < l Vee
FIGURE 4
FIGURE 3
20 !l
-, r-
14m ,
Vo~L..J~v
"'- out2
Jt1
AVout =IVout l -Vou t21
MOTOROLA LINEAR/INTERFACE DEVICES
7-201
x>-.....- - < l Open
II
•
ULN2068B
TEST RGURES (CONTINUED)
FIGURE 6
FIGURE 5
Open
a
FIGURE
Vs
Open
FIGURE 7
Ie
TYPICAL CHARACTERISTIC CURVES - T A = 25°C
FIGURE 9 -
FIGURE 10 -
INPUT CURRENT
versus INPUT VOLTAGE
COLLECTOR CURRENT
versus INPUT CURRENT
1.6
1.41---l--+--l--.J-.,..o/,"-+---+--+--+---·~
1.4
1.2
/
~ 1.0
a
'3
~
Vs
-- ,-- TA
O. 8
~
~
5.0 V
25°C
o. 6
V
0
f
TA
':!J
0.61----I1---~'---f_-
8
~04
0
.5
"'-
4.0
5.0
a
= 70"C w/o HEAT SINK
"" -Number of
outputs conducting
simultaneously
40
60
DUTY CYCLE 1'11.1
80
5~
r-100
0
V
kmberOf
outputs conducting
simultaneously
20
MOTOROLA LINEAR/INTERFACE DEVICES
7-202
~
__L-__
L-~
TA = 70°C wlSTAVER
HEAT SINK (37.5 °CIW)
"- ~'"
0
/4 .......... t-- t-- I-- f--
__
__-L__
~
4.0
v-a
Device Limit
5
r-
~
2.0
3.0
II. INPUT CURRENT (mAl
FIGURE 12 -
';-- r--....
"'......." t'--r--..... ~ ~
__
1.0
...........
L
20
.. -- _... --+---I~-"--I
/
0.21--+--''+--+-+--+--+---i--+--+-...j
r
t\.
---
Vs ~ 5.0 V __+---I~-+_+- __
TA = 25°C
...- - - .- - f.----.- - - - - -
,j
Device Limit
f\
.-
- - \------
OL-~_-L_-L
3.0
Vin. INPUT VOLTAGE IVI
FIGURE 11 -
/
0.8
V
2.0
1.0
1.0
/17'
~
Ei
/'
o. 2
0
I
/
/
o.4
5
V
V
~ 1.2
'-.....
..........
4'
1
-
........
rt-.-+-..
t-.... .......... r-- t --r-- I-- f - -
1'---..3
40
60
DUTY CYCLE ('II.)
80
100
ULN2068B
FIGURE 13 -
f"
FIGURE 14- TA = 5O"C w/o HEAT SINK
TA = 7O"C w/STAVER V-7
HEAT SINK (27.5"CIW)
~iceLi~n
I" "
f"...
0
5
L
#"
.........
~4
V
Number of
........... r-....
~
---
~iceLi~it
1
'\
2
---
..... rt-. r- t---
" .......... -.......!.r-..
"" " ...........
......... 3
)
-I--L
outputs conducting
SimutneouS'r
0
FIGURE 15 -
80
TA = 5O"C w/STAVER V-8
HEAT SINK (37.5 'e1W)
"" " r-....
5
L
20
80
100
FIGURE 16-TA = 5O"C wi STAVER V-7
HEAT SINK (27.5"CIW)
r-...... ""-..t
10'4
~berOf
........
---- -- I"---.
I
outputs conducting
--
2' ~
I"14'-............
r---..
r-......
r-
1
3
2
/
40
60
DUTY CYCLE 1%1
..........
r-
of outputs
-~ _ Number
conducting
_ --
-
- ~m"ineousi
SimUjneoUS'r
0
-
I--=
f" Device Limit
.........,
0
--
40
60
DUTY CYCLE 1%1
20
.... Device Limit
5
conducting
SimuteousllY
40
60
DUTY CYCLE 1%1
20
/ Number of outputs
1
80
1I1O
0
20
MOTOROLA LINEAR/INTERFACE DEVICES
7-203
40
60
DUTY CYCLE 1%1
80
100
•
®
ULN2074B
MOTOROLA
QUAD 1.5 A SINKING HIGH CURRENT SWITCH
•
QUAD 1.5 A
DARLINGTON SWITCH
The ULN2074B is a high voltage, high current quad Darlington
switch array designed for high current loads, both resistive and
reactive, up to 300 watts.
It is intended for interfacing between low level (TTL, DTL, LS
and 5.0 V CMOS) logic families and peripheral loads such as
relays, solenoids, dc and stepping motors, multiplexer LED and
incandescent displays, heaters, or other high-voltage, high
current loads.
The Motorola ULN2074B is specified with minimum guaranteed
breakdown of 50 V and is 100% tested for safe area using an
inductive load.
It is supplied in an improved 16-Pin plastic DIP package with
heat sink contact tabs (Pins 4, 5 and 12, 13). A copper alloy lead
frame allows maximum power dissipation using standard cooling
techniques. The use ofthe contact tab lead frame facilitates attachment of a DIP heat sink while permitting the use of standard layout
and mounting practices.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
BSUFFIX
PLASTIC PACKAGE
CASE 648C-02
• TTL, DTL, LS, CMOS Compatible Inputs
• 1.5 Amp maximum Output Current
• Low Input Current
• 100% Inductive Load Tested
• Heat Tab Copper Alloy Lead Frame for Increased Dissipation
PIN CONNECTIONS
MAXIMUM RATINGS (TA ~ 25°C and ratings apply to anyone device in the package
unless otherwise noted).
C
Rating
L...:....----,
Symbol
Value
Unit
Output Voltage
Vo
50
V
B
Input Voltage (Note 1)
VI
30
V
SUB
SUB
Collector Current (Note 2)
IC
1.75
A
SUB
SUB
25
mA
TA
o to +70
°c
Tstg
-55 to +150
°c
TJ
150
°C
Input Current (Note 3)
Operating Ambient Temperature Range
Storage Temperature Range
Junction Temperature
B
B
B
E
C
C
Notes:
1. Input voltage referenced to ground (substrate),
2. Allowable output conditions shown in Figures 8 and 9.
3. May be limited by max input voltage.
ORDERING INFORMATION·
3500
Rin
BO I
f
~
,"h
Partial
Schematic
Device
Temperature
Range
Package
ULN2074B
ooC to +70oC
Plastic DIP
• Other options of this ULN2060/2070 series are
available for volume applications. Contact your
local Motorola Sales Representative.
Substrate
MOTOROLA LINEAR/INTERFACE DEVICES
7-204
ULN2074B
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Fig.
Characteristic
Output Leakage Current
(VCE = 50 V)
(VCE = 50 V. TA = 70°e)
1
Collector-Emitter Saturation Voltage
(lc = 500 rnA, II = 625 ~A)
(IC = 750 rnA, 11= 935 ~A)
(IC = 1.0 A, II = 1.25 rnA)
(IC = 1.25 A, 11= 2.0 rnA)
2
Input Current (VI = 2.4 V)
(VI = 3.75 V)
4
Symbol
Typ
Max
-
-
100
500
-
-
1.13
1.25
1.40
1.60
2.0
4.5
-
4.3
9.6
-
-
-
2.0
2.5
LlVout
-
-
100
mV
Min
Unit
~A
ICEX
V
VCE(sat)
On Condition
rnA
II(on)
Input Voltage - On Condition
(VCE = 2.0 V, IC = 1.0 A)
(VCE = 2.0 V, IC = 1.5 A)
5
Inductive Load Test
(VCC = 24.5·V, tpw = 4.0 ~s)
3
Turn-On Delay Time
(50% EI to 50% EO)
-
tpHL
-
-
1.0
~s
Turn-Off Delay Time
(50% EI to 50% EO)
-
tpLH
-
-
1.5
~s
V
VI(on)
TEST FIGURES
FIGURE 1
FIGURE 2
~e
V)
r------<;>--c
~
vee
FIGURE 4
FIGURE 3
IN916
20
n
i
,14ms
Vo~
Jl1 L.Jrv--cv
"-. out2
aVout ~IVoutl -V ou t21
MOTOROLA LINEAR/INTERFACE DEVICES
7-205
.><:>--....- - 0
Open
•
ULN2074B
FIGURE 5
TYPICAL CHARACTERISTIC CURVES
FIGURE 7 - COLLECTOR CURRENT versus
INPUT CURRENT
FIGURE 6 - INPUT CURRENT versus INPUT VOLTAGE
2.0
18
14
112
10
8.0
~
,,:
Are! al
Narmal
-~
-
TIL
8. 0
Operatian
4.0
~~
.~
2.0
1.0
1. 5
I
./
v---
3.0
V
!
/
/"
/
5.0
r
\\
" """""
......
........
............. ~
",4
5
L
...........
Number of
autpull conducting
limu~-r
0
20
~
110
DUlY CYCLE 1%1
"- ............
"
-- - ~
110
...........
..........
...........3
I
........
......... ......... ......... ...........
r-- ---- r--
simultaneou~ty
0
20
MOTOROLA LINEAR/INTERFACE DEVICES
7-206
-- ---t.....
r--
5~ dmberOf
outputs conducting
100
v-a
Device Limit
5
"i'- ...........
~
5.0
4.0
FIGURE 9 - TA = 70 0 Cw/STAVER
HEAT SINK (37.5 °C/W)
f Device lim.
0
3.0
II. INPUT CURRENT (mA)
FIGURE a - TA = 70·C w/o HEAT SINK
..........
2.0
1.0
VI. INPUT VOLTAGE (VOLTS)
5
TA=25°C
/
~ 0.5
4.0
-
,,/
::>
:;: 1.0
..... i--"" ~
/
2. 0
0
g
/,r
1
6
!:;
/'
TA=2S·C
40
110
DUlY CYCLE 1'111
80
100
ULN2074B
FIGURE 10 - TA = 70°C w/STAVER V-7
HEAT SINK (27.6 °C/WI
1.5
FIGURE 11 - TA = 50·C w/o HEAT SINK
.-
r ~vlceli~lt
1"- ............
"""
5
L
/
............
.......
--------I
I'--.
I-....
-.......!.
1>0'4
............ t--
5
r
Device Limit
"-
2
Number of
outputs conducting
"
---3
-.......!. r-
Number of outputs
I- conducting
r--
--
,imuitaneou't
100
80
60
40
DUTY CYCLE 1'/01
20
...........
V
L
SlmUlianeOUSlr
0
......
4 ............
5
I
...........
......... r--,.........
0
20
80
60
40
100
DUTY CYCLE 1%1
FIGURE 12 - TA= 50°Cw/STAVERV-B
HEAT SINK (37.6 °C/WI
FIGURE 13 - TA = 60°C w/STAVER V-7
HEAT SINK (27.6 °C/WI
_.,
-r
Device Limit
5
"
0
5
L
........
'""-..
......
--
I'-....
.......... "'-.l r--....
,,4
~mberOf
t--
outputs conducting
------
I
Device limit
5
.......
1""'- ~ I"-... ............ 2""- ......:.
2
3
I"--..
0
/
5
L
'Imul,aneou'li
0
20
40
60
Number of outputs
conducting
- - 1.1
r-r--
"muitaneour
80
100
0
20
DUTY CYCLE 1%1
MOTOROLA LINEAR/INTERFACE DEVICES
7-207
60
40
DUTY CYCLE 1%1
80
100
•
®
ULN2801
ULN2802
ULN2803
ULN2804
MOTOROLA
OCTAL HIGH VOLTAGE. HIGH CURRENT
DARLINGTON TRANSISTOR ARRAYS
OCTAL
PERIPHERAL
DRIVER ARRAYS
The eight NPN Darlington connected transistors in this family of
arrays are ideally suited for interfacing between low logic level
digital circuitry (such as TTL, CMOS or PMOS/NMOS) and the
higher current/voltage requirements of lamps, relays, printer
hammers or other similar loads for a broad range of computer,
industrial, and consumer applications. All devices feature opencollector outputs and free wheeling clamp diodes for transient
suppression.
The ULN2801 is a general purpose device for use with CMOS,
PMOS or TIL logic. The ULN2802 contains a zener diode and resistor
in series with the input to limit input currents and assure compatibilitywith 14to 25 volt PMOS logic. The ULN2803 is designed to be
compatible with standard TIL families while the ULN2804 is optimized for 6 to 15 volt high level CMOS or PMOS .
SILICON MONOLITHIC
INTEGRATED CIRCUITS
MAXIMUM RATINGS (TA = 25°C and rating apply to anyone device· in the
package unless otherwise noted.)
Rating
Symbol
Value
Unit
Output Voltage
Vo
50'
V
Input Voltage IExcept ULN2801)
VI
30
V
Collector Current -
IC
500
rnA
IB
25
rnA
Base Current -
Continuous
Continuous
Operating Ambient Temperature Range
Storage Temperature Range
Junction Temperature
TA
o to +70
°c
Tstg
-55 to +150
°c
TJ
125
°c
R8JA ~ 55'e/W
Do not exceed maximum current limit per driver.
*Higher voltage selection available. See your local representative.
ORDERING INFORMATION
CHARACTERISTICS
DEVICE
ULN2801A
ULN2802A
ULN2803A
ULN2804A
INPUT
COMPATIBILITY
General Purpose CMOS, PMOS
14-25 Volt PMOS
TTL, 5.0 V CMOS
6- 15 V CMOS, PMOS
VCE(MAX)/IC(MAX)
50 V/500
50V/500
50V/500
50V/500
rnA
rnA
rnA
rnA
TA
o to +70 o C
o to +70o C
o to +70°C
o to +70 o C
MOTOROLA LINEAR/INTERFACE DEVICES
7-208
A SUFFIX
PLASTIC PACKAGE
CASE 707-02
PIN CONNECTIONS
ULN2801, ULN2802, ULN2803, ULN2804
ELECTRICAL CHARACTERISTICS (TA; 25°C unless otherwise noted)
Characteristic
Output Leakage Current
«Va;
«Va;
«Va;
«Va;
50
50
50
50
V.
V.
V.
V,
TA;
TA ;
TA;
TA;
+70°C)
+25°C)
+70°C, VI; 6.0 V)
+70°C, VI; 1.0 V)
Input Current -
Input Voltage -
2.0 V,
2.0 V,
2.0 V,
2.0 V,
2.0 V,
2.0 V,
2.0 V,
2.0 V,
Min
5
IC; 300
IC; 200
IC; 250
IC; 300
IC; 125
IC; 200
IC; 275
IC ; 350
Input Current -
rnA)
rnA)
rnA)
rnA)
rnA)
rnA)
rnA)
rnA)
Off Condition
-
-
-
100
50
500
500
-
1.1
0.95
0.B5
1.6
1.3
1.1
Unit
-
0.B2
0.93
0.35
1.25
1.35
0.5
1.0
1.45
-
-
-
-
13
2.4
2.7
3.0
5.0
6.0
7.0
B.O
V
rnA
II(on)
-
On Condition
Max
VCE(sat)
All Types
All Types
All Types
4
Typ
pA
ULN2B02
ULN2B03
ULN2B04
ULN2B04
(VI; 12 V)
(VCE;
(VCE;
(VCE;
(VCE;
(VCE;
(VCE;
(VCE;
(VCE;
ICEX
2
On Condition
(VI; 17V)
(VI; 3.B5 V)
(VI; 5.0 V)
Symbol
1
All Types
All Types
ULN2B02
ULN2B04
Collector-Emitter Saturation Voltage
(IC ; 350 rnA, IB ; 500 pA)
(IC; 200 rnA. IS; 350 pA)
(IC; 100 rnA. IS; 250 pA)
Fig.
V
VI(on)
ULN2B02
ULN2B03
ULN2B03
ULN2B03
ULN2B04
ULN2B04
ULN2B04
ULN2B04
All Types
3
II(off)
50
ULN2BOl
2
hFE
1000
-
100
-
pA
-
-
(IC ; 500 pA, TA ; +70°C)
DC Current Gain
-
(VCE ; 2.0 V, IC; 350 rnA)
-
15
25
pF
ton
0.25
1.0
ps
toff
-
0.25
1.0
ps
6
IR
-
-
50
100
pA
7
VF
-
1.5
2.0
V
Input Capacitance
CI
Turn-On Delay Time
(50% EI to 50% EO)
Turn-Off Delay Time
(50% EI to 50% EO)
Clamp Diode Leakage Current
(VR; 50 V)
TA; +25°C
TA; +70 oC
Clamp Diode Forward Voltage
(IF; 350 rnA)
*Higher voltage selections available, contact your local representative.
MOTOROLA LINEAR/INTERFACE DEVICES
7-209
ULN2801, ULN2802, ULN2803, ULN2804
TEST FIGURES
(SEE FIGURE NUMBERS IN ELECTRICAL CHARACTERISTICS TABLES)
FIGURE 2
FIGURE 1
Open
Open
VeE
Open
VeE
Ie
hFE= lin
Open
FIGURE 4
•
x>--___- < l Open
FIGURE 6
FIGURE 5
Open
FIGURE 7
MOTOROLA LINEAR/INTERFACE DEVICES
7-210
ULN2801, ULN2802, ULN2803, ULN2804
TYPICAL CHARACTERISTIC CURVES - TA = 25°C
(unless otherwise noted)
OUTPUT CHARACTERISTICS
FIGURE 9 - OUTPUT CURRENT versus
INPUT CURRENT
FIGURE 8 - OUTPUT CURRENT versus
SATURATION VOLTAGE
1 600
/
!2
~
::>
u
~
All Types
400
/
:::l
0>
u
200
/
12
..-.s
/
....z
~
/
a
'"t;
o
All Types
400
/
0>
~
8 200
/
0.5
1.0
1.5
VCE(s't). SATURATION VOLTAGE (VOLTS)
. . .V
V
,,/
o
o
2.0
V
/
12
..... V
o
600
200
400
liN. INPUT CURRENT (ILA)
600
800
INPUT CHARACTERISTICS
FIGURE 10- ULN2802 INPUT CURRENT
versus INPUT VOLTAGE
2.0
2.0
V
./
/
../
../
V
/"
V
./
.,/'
/
/"
V
./
o
12
•
FIGURE 11 - ULN2803 INPUT CURRENT
versus INPUT VOLTAGE
o
14
16
18
20
22
VIN. INPUT VOLTAGE (VOLTS)
24
26
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VIN. INPUT VOLTAGE (VOLTS)
FIGURE 12 - ULN2804 INPUT CURRENT
versus INPUT VOLTAGE
2.0
~
f...--
........... --o
5.0
6.0
7.0
8.0
9.0
10
11
VIN. INPUT VOLTAGE (VOLTSI
12
MOTOROLA LINEAR/INTERFACE DEVICES
7-211
5.5
6.0
ULN2801, ULN2802, ULN2803, ULN2804
REPRESENTATIVE CIRCUIT SCHEMATICS
1/8 ULN2802
1/8 ULN2801
+--tl--r-<>
+--IM--t--O Pin 10
Pin 10
I
*
I _______ _
L
1/8 ULN2804
1/8 ULN2803
+--III----t-<>
+--IM--r-<> Pin 10
I
I
I
L __
* ______ _
•
MOTOROLA LINEAR/INTERFACE DEVICES
7-212
Pin 10
Selector Guide
RF Communications
8-2
Telecommunications. . . . . . . . . . . .. 8-4
In Brief ...
Alphanumeric Listing .............. 8-11
RF
Radio communication has greatly expanded its scope in the
past several years. Once dominated by public safety radio,
the 30 to 1000 MHz spectrum is now packed with personal
and low cost business radio systems. The vast majority of this
equipment uses FM or FSK modulation and is targeted at
short range applications. From mobile phones and VHF
marine radios to garage door openers and radio controlled
toys, these new systems have become a part of our lifestyle.
Motorola linear products has focused on this technology adding a wide array of new products including complete receivers
processed in our exclusive 3 GHz MOSAIC 1.5 process. New
surface mount packages, for high density assembly, are available for all of these products, as is a growing family of supporting applications notes and development kits.
Telephone & Voice/Data
Traditionally, an office environment has utilized two distinctly separate wired communications systems - Telecom~
munications and Datacommunications. Each had its individual
hardware components complement and each required its own
independent transmission line system: twisted wire pairs for
Telecom and relatively high priced coax cable for Datacom.
But times have changed. Today, Telecom and Datacom coexist comfortably on inexpensive twisted wire pairs and utilize
a significant number of components in common. This has led
to the development and enhancement of PBX (Private Branch
Exchanges) to the paint where the long heralded "office of
the future," with simultaneous voice and data communications
capability at each station, is no longer of the future at all. The
capability is here today!
Motorola semiconductor components serve a wide range
of requirements for the voice/data marketplace. They encompass both CMOS and linear technologies, each to its best
advantage, and upgrade the conventional analog voice systems and establish new capabilities in digital communications.
Early products, such as the solid-state single-chip crosspoint
switch, the more recent monolithic Subscriber-loop-Interface
Circuit (SLlG), a single-chip Codec/Filter (Monocircuit) the latest Universal Digital loop Transceivers (UDlT), and singlechip telephone circuits are just a few examples of Motorola
leadership in the voice/data area.
Related Application Notes .......... 8-12
Data Sheets ......... . . . . . . . . . . . . .. 8-13
Communication Circuits
Il
Communication
Circuits
RF Communications
Narrowband Dual Conversion Receivers .........
AM Receiver, Medium/Short Wave . . . . . . . . . . . .
Wideband Data Receivers. . . . . . . . . . . . . . . . . .
Narrowband IFs . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitters . . . . . . . . . . . . . . . . . . . . . . . . . . .
Balanced Modulator/Demodulator . . . . . . . . . . . . .
Telecommunications
Subscriber Loop Interface . . . . . . . . . . . . . . . . .
Electronic Telephone .. . . . . . . . . . . . . . . . . ..
Tone Ringers . . . . . . . . . . . . . . . . . . . . . . . . . .
Speech Networks. . . . . . . . . . . . . . . . . . . . . . .
Speakerphone. . . . . . . . . . . . . . . . . . . . . . . . .
Telephone Accessory . . . . . . . . . . . . . . . . . . . .
CVSD Modulator/Demodulator . . . . . . . . . . . . . .
8-2
8-2
8-2
8-2
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
RF Communications
Narrowband Dual Conversion Receivers RF
Input
(Maxi
IF1
(MaxI
IF2
(limiter
inl
Type
Vee
MC3362
2-7 V
3mA
<1,.V
180 MHz 10.7 MHz 455 kHz
MC3363
2-7 V
4mA
<1,.v
180 MHz 10.7 MHz 455 kHz
ICC Sensitivity
FM/FSK -
VHF
RSSI
Max
Data
Rate
-
j
1.2 kb
Includes
buffered VCO
output
24 Pin
DIP,
SOIC
P1724
DW1751E
j
j
1.2 kb
Includes RF
amp, mute
28 Pin
SOIC
DW/751F
Mute
Notes
Package
Case
Suffix
AM Receiver Medium/Short Wave
Wideband Data (FM/FSK) Receiver Typa
MC3356
Vee
ICC
Sensitivity
3-9 V
25mA
30,.V
Narrowband IF's -
IF1
(MaxI
1F2
(limiter
inl
200 MHz 10.7 MHz
VHF
Mute
RSSI
Max
Data
Rate
j
j
500 kb
Package
Suffix
Includes front end 20 Pin
mixer/L.a.
DIP/PLCC
P1738
FN1775
16 Pin
DIP/SOIC
P/648
D1751B
Wideband (FM/FSK) IF
MC3357
4-8 V
5mA
5,.V
45 MHz
455 kHz
j
-
-
MC3359
4-9 V
7mA
2,.V
45 MHz
455 kHz
j
-
MC3361
2-8 V
6mA
2,.V
60 MHz
455 kHz
j
-
-
MC3367
1-5V
lmA
<1,.V
75 MHz
455 kHz
j
-
1.2 kb
MC3371
2-8 V
6mA
2,.v
60 MHz
455 kHz
j
j
MC13055
3-12V
25mA
20,.V
40 MHz
j
j
Out
Battery
Check
Tone
ose
Max
Mod.
Freq.
50 MHz
j
j
-30 dBm 150 MHz
to
+10dBm
-
-
Transmitters -
Case
Notes
-
18 Pin
P1707
DIP/SOIC DW1751C
16 Pin
DIP/SOIC
P/648
D1751B
28 Pin
SOIC
DW1751F
(3Q88 Introl
16 Pin
DIP/SOIC
P/648
D1751B
Wideband Data IF
16 Pin
DIP/SOIC
P/648
D1751B
Package
Suffix
5.0 kHz Includes low battery
(xtal ctll checker, tone osc.
16 Pin
DIP/SOIC
P/648
D1751B
5.0 kHz Includes two frequency
(xtal ctll multiplier/amplifier
16 Pin
DIP/SOIC
P/648
D1751B
2Mb
1 Cell Operation
FM/FSK
MaxRF
Freq.
Type
Vee
ICC
MC2831A
3-8Vdc
5mA
MC2833
3-8Vdc
3mA
Pout
-30 dBm
Case
Notes
transistors
MOTOROLA LINEAR/INTERFACE DEVICES
8-2
Balanced Modulator/Demodulator
Case
Type
MC1596
MC1496
Vee
ICC
5-30 V
5-30 V
10mA
10mA
Function
Carrier Balance >50 dB
General purpose balanced modulator!
demodulator for AM, SSB, FM Detection
Low Power FM Transmitter System
Suffix
10 Pin
Metal
14 Pin
Ceramic
OIL, DIP,
SOIC
G!603
U632
P!646
Dn51A
MOSAIC® 1.5
VHF Narrowband Dual-Conversion
Receivers
MC2831A-TA = -30° to + 75°C,
Case 648, 751 B
•
•
•
•
•
•
•
Package
Complete VHF FM Transmitter/Exciter
Mike Preamp with Limiting
Tone Generator for CTSS or AFSK
Crystal or L-C VCO Operation
Buffer/Multiplier Output Stage
Low Voltage (internal reference) Warning Circuit
Easily Partitioned for Semicustom Applications
MC3362/MC3363 •
•
•
•
•
•
•
MC2831A
T A = - 40°C to + 85°C.
Case 724, 751A
Operation to 180 MHz
2-8 V dc Supply
>1 /LV for 20 dB Quieting Sensitivity
Analog and Data Modulation Recovery
>60 dB Dynamic Range RSSI
Crystal or VCO First L.O. Operation
On-Chip RF Amp/MC3363
Data
Vee
ll~_ _;.:J-~--- Recovered
Audio
L..
(All capacItors In ,...F unless otherwIse stated. Resistors In ohms. Inductors," Henrles)
l
RF
45
01'.f'
~~:tH~O'~FU
2pl~
l' ~
0.71'
0.11.21'
U
Low Voltage FM Narrowband
Receiver
MC336? •
•
•
•
•
•
•
T A = O°C to
+ 70°C,
3O'X-f'
44.54SMHz
5 1l
1
27
3
26
4
25
5
24
O$" ,
Case 751 F
'.o~
ep :
Single Cell Operation to 0.9 VCC
Single Conversion Operation to 75 MHz
Current Drain of 1 mA
Split I.F. Amplifier for Single or Dual Filters
Analog and Data Outputs
Sensitivity of 0.7 /LV Typ for 20 dB Quieting
Low Battery Voltage Indicator
56kt
18~ p
l~---~
Pie.r:a
C2
Sound
Element
II
• Complete Telephone Bell Replacement Circuit with
Minimum External Components
• Push-Pull Output Stage for Greater Output Power
Capability (MC34017)
• On-Chip Diode Bridge and Transient Protection
• Base Frequency Options -
• Direct Drive for Piezoelectric Transducers
• Base Frequency Options -
MC34012-1: 1.0 kHz
MC34012-2: 2.0 kHz
MC34012-3: 500 Hz
MC34017-1: 1.0 kHz
MC34017-2: 2.0 kHz
MC34017-3: 500 Hz
• Input Impedance Signature Meets Bell and EIA
Standards
• Rejects Rotary Dial Transients
MC34017 - TA
=
-20° to
+ 60°C,
Case 626.751
MOTOROLA LINEAR/INTERFACE DEVICES
8-6
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Speech Networks
CeramIc
Telephone Speech Network and Tone Dialer
MC34013A -
TA = - 20° to
+ 60°C,
Case 710,776
7
• Linear/1 2L Technology Provides Low 1.4 Volt Operation
in Both Speech and Dialing Modes
8
9
C
Keypad
• Speech Network Provides 2-4 Wire Conversion with
Adjustable Sidetone Utilizing an Electret Microphone
• DTMF Generator Uses Low-Cost Ceramic Resonator
with Accurate Frequency Synthesis Technique
• On-Chip Regulator Insures Stable Operation Over Wide
Range of Loop Lengths
• Dialer Mutes Speech Network with Internal Delay for Click
Suppression on DTMF Key Release
Speech Network with Dialer Interface
MC34014 -
TA = -20° to
+ 60°C,
Case 707, 775
The MC34014 is a Telephone Speech Network integrated
circuit which incorporates adjustable transmit, receive, and
sidetone functions, line interface circuit, dialer interface, and
a regulated output voltage for a dialer circuit. It includes an
equalization circuit to compensate for various line lengths
and the conversion from 2-to-4 wire is accomplished with
supply voltages as low as 1.5 volts.
T,p
• Transmit, Receive, and Sidetone Gains Set By External
Resistors
• Loop Length Equalization for Transmit, Receive, and Sidetone Functions
• Operates Down to 1.5 Volts (V +) in Speech Mode
E
• Provides Regulated Voltage for CMOS Dialer
• Speech Amplifiers Muted During Pulse and Tone Dialing
• DTMF Output Level Adjustable with a Single Resistor
• Compatible with 2-Terminal Electret Microphones
• Compatible with Receiver Impedances of 150 nand
Higher
Telephone Speech Network with Dialer Interface
MC34114-TA = -20° to
+ 70°C, Case 707,
7510
• Operation Down to 1.2 Volts
• Externally Adjustable Transmit, Receive, and Sidetone
Gains
• Differential Microphone Amplifier Input Minimizes RFI
• Transmit, Receive, and Sidetone Equalization on both
Voice and DTMF Signals
• Regulated 1.7 Volts Output for Biasing Microphone
.• Regulated 3.3 Volts Output for Powering External Dialer
• Microphone and Receive Amplifiers Muted During Dialing
• Differential Receive Amplifier Output Eliminates Coupling
CapaCitor
• Operates with Receiver Impedances of 150 n and Higher
• MC34114 Complies with Bell Telephone and BT
Standards
MOTOROLA LINEAR/INTERFACE DEVICES
8-7
Speakerphone
Voice Switched Speakerphone
Circuit
MC34018 -
TA = -20° to + 60°C, Case 710,776
The MC34018 Speakerphone integrated
circuit incorporates the necessary amplifiers, attenuators, and control functions to
produce a high quality hands-free speakerphone system. Included are a microphone amplifier, a power audio amplifier for
the speaker, transmit and receive attenuators, a monitoring system for background sound level, and an attenuation
control system which responds to the relative transmit and receive levels as well as
the background level. Also included are all
necessary regulated voltages for both
internal and external circuitry, allowing linepowered operation (no additional power
supplies required). A Chip Select pin allows
the chip to be powered down when not in
use. A volume cvntrol function may be
implemented with an external potentiometer. MC34018 applications include speakerphones for household and business use,
intercom systems, automotive telephones,
and others.
• All Necessary Level Detection and Attenuation Controls for a Hands-Free
Telephone in a Single Integrated Circuit
•
•
•
•
Background Noise Level Monitoring with Long Time Constant
Wide Operating Dynamic Range Through Signal Compression
On-chip Supply and Reference Voltage Regulation
Typical 100 mW Output Power (into 25 0) with Peak Limiting to Minimize
Distortion
• Chip Select Pin for Active/Standby Operation
• Linear Volume Control Function
Voice Switched Speakerphone
Circuit
MC34118 -
II
TA = -20° to +60°C, Case 710, 751F
The MC34118 Voice Switched Speakerphone Circuit incorporates the necessary amplifiers, attenuators, level detectors, and control algorithm to form the heart
of a high quality hands-free speakerphone
system. Included are a microphone amplifier with adjustable gain and MUTE control,
Transmit and Receive attenuators which
operate in a complementary manner, level
detectors at both input and output of both
attenuators, and background noise monitors for both the transmit and receive channels. A Dial Tone Detector prevents the dial
tone from being attenuated by the Receive
background noise monitor circuit. Also
included are two line driver amplifiers
which can be used to form a hybrid network
in conjunction with an external coupling
transformer. A high-pass filter can be used
to filter out 60 Hz noise in the receive channel, or for other filtering functions. A Chip
Disable pin permits powering down the
entire circuit to conserve power on long
loops where loop current is at a minimum.
The MC34118 may be operated from a
power supply, or it can be powered from
the telephone line, requiring typically 5.0
mAo The MC34118 can be interfaced
directly to Tip and Ring (through a coupling
transformer) for stand-alone operation, or
it can be used in conjunction with a handset
speech network and/or other features of a
featurephone.
•
•
•
•
•
•
•
•
•
Improved Attenuator Gain Range: 52 dB Between Transmit and Receive
Low Voltage Operation for Line-Powered Applications (3.0-6.5 V)
4-Point Signal Sensing for Improved Sensitivity
Background Noise Monitors for Both Transmit and Receive Paths
Microphone Amplifier Gain Set by External Resistors - Mute Function
Included
Chip Disable for Active/Standby Operation
On Board Filter Pinned-Out for User Defined Function
Dial Tone Detector to Inhibit Receive Idle Mode During Dial Tone Presence
Compatible with MC34119 Speaker Amplifier
MOTOROLA LINEAR/INTERFACE DEVICES
8-8
Telephone Accessory Circuits
Audio Amplifier
MC34119 -
C1
Audio
TA = 0° to +70°C, Case 626,751
Input
0.1
>-I
A low power audio amplifier circuit intended (primarily) for
telephone applications, such as speakerphones. Provides differential speaker outputs to maximize output swing at low
supply voltages (2 volt min.). Coupling capacitors to the
speaker, and snubbers, are not required. Overall gain is externally adjustable from 0 to 46 dB. A Chip Disable pin permits
powering-down to mute the audio signal and reduce power
consumption.
Ri
6k
Rf
150 k
VCC
• Drives a Wide Range of Speaker Loads (16-100 0)
• Output Power Exceeds 250 mW with 32 0 Speaker
• Low Distortion (THO = 0.4% Typical)
• Wide Operating Supply Voltage (2-16 Volts) Telephone Line Powered Applications.
Allows
• Low Quiescent Supply Current (2.5 mA Typical)
*
• Low Power-Down Quiescent Current (60 }LA Typical)
= Optional
Differential Gain = 2 x
m
Current Mode Switching Regulator
MC34129 -
TA = 0° to + 70°C, Case 646, 751A
High penormance current mode switching regulator for lowpower digital telephones. Unique internal faun timer provides
automatic restart for overload recovery. A start/run comparator is included to implement bootstrapped operation of VCC.
AAhough primarily intended for digital telephone systems,
these devices can be used cost effectively in many other
applications.
On-chip functions and features include:
VCC
C Soft-Start
Vref 1.25 V
• Current Mode Operation to 300 kHz
9 Non-Inverting
• Automatic Feed Forward Compensation
~nput
Inverting Input
• Latching PWM for Cycle-By-Cycle Current Limiting
RT/CT
• Latched-Off or Continuous Retry after Fault Timeout
L----'"<>~~b~;:..t
Sync/Inhibit 4
• Soft-Start with Maximum Peak Switch Current Clamp
Input
• Internally Trimmed 2% Bandgap Reference
Drive Out
L .....--~
Drive Gnd
' - - - - - - ' ' 0 Ramp Input
• Input Undervoltage Lockout
MOTOROLA LlNEAR/fNTERFACE DEV[CES
8-9
Continuously Variable Slope Delta (CVSD) Modulator/Demodulator
• Encode and Decode functions on the Same Chip
with a Digital Input for Selection
• CMOS Compatible Digital Output
• Digital Input Threshold Selectable (VCC/2 reference provided on chip)
• MC34l7/MC35l7/MC34ll5 has a 3-Bit Algorithm
(General Communications)
• MC34l8/MC35l8 has a 4-Bit Algorithm (Commercial Telephone)
Provides the AlD-D/A function of voice communications by digital transmission.
The MC35l71l8 series of CVSDs is designed for
military secure communications and commercial
telephone applications. A single IC provides both
encoding and decoding functions in l6-pin
package.
MC3417/18
(0 to 70°C)
Case 620
Analog
Input
Analog
MC3517/18
(-55 to + 125°C)
Case 620
Feedback
Digital
Data Input
Digital
Threshold
MC34115
(0 to 70°C)
Case 648
Digital
Output
vccf2
Output
MOTOROLA LINEAR/INTERFACE DEVICES
8-10
COMMUNICATION CIRCUITS
RF Communications
Device
MC1496
MC1596
MC2831A
MC2833
MC3356
MC3357
MC3359
MC3361
MC3362
MC3363
MC3367
MC13041
MC13055
Function
Page
Balanced Modulator/Demodulator ..................................... 8-13
Balanced Modulator/Demodulator ..................................... 8-13
Low Power FM Transmitter System .................................... 8-23
Low Power FM Transmitter System .................................... 8-26
Wideband FSK Receiver .............................................. 8-29
Low Power FM IF ................................................... 8-35
Low Power Narrowband FM IF ........................................ 8-39
Low Voltage Narrowband FM IF ....................................... 8-45
Low Power Dual Conversion FM Receiver .............................. 8-47
Low Power Dual Conversion FM Receiver .............................. 8-52
Low Voltage FM Narrowband Receiver ................................. 8-59
AM Receiver Subsystem ...................................... See Chapter 9
Wideband FSK Receiver .............................................. 8-65
Telecommunications
Device
MC3417
MC3418
MC3419-1L
MC3517
MC3518
MC33129
MC34010
MC34011A
MC34012-1,-2,-3
MC34013A
MC34014
MC34017
MC34018
MC34114
MC34115
MC34118
MC34119
MC34120
MC34129
Function
Continuously Variable Slope Delta Modulator/Demodulator ...............
Continuously Variable Slope Delta Modulator/Demodulator ...............
Telephone Line-Feed Circuit ..........................................
Continuously Variable Slope Delta Modulator/Demodulator ...............
Continuously Variable Slope Delta Modulator/Demodulator ...............
High Performance Current Mode Controller ................ See Chapter 3,
Electronic Telephone Circuit ..........................................
Electronic Telephone Circuit ..........................................
Telephone Tone Ringer ..............................................
Speech Network and Tone Ringer .....................................
Telephone Speech Network with Dialer Interface ........................
Telephone Tone Ringer ..............................................
Voice Switched Speakerphone Circuit ..................................
Telephone Speech Network with Dialer Interface ........................
Continuously Variable Slope Delta Modulator/Demodulator ...............
Voice Switched Speakerphone Circuit ..................................
Low Power Audio Amplifier ................................ See Chapter
Subscriber Loop Interface Circuit ......................................
High Performance Current Mode Controller ................ See Chapter 3,
*See Telecommunications Device Data (DL136/R1)
MOTOROLA LINEAR/INTERFACE DEVICES
8-11
Page
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
9
*
*
E
:
RELATED APPLICATION NOTES
Application
Note
AN531
AN933
AN937
AN957
AN959
AN960
AN976
AN980
AN1002
ANHK07
Related
Device
Title
MC1596 Balanced Modulator ........................... MC1596
A Variety of Uses for the MC34012/MC34017
Tone Ringers ....................................... MC34012-1,-2,-3,
MC34017
A Telephone Ringer which Complies with FCC and EIA
Impedance Standards ............................... MC34012, MC34017
Interfacing the Speakerphone to the
MC34010/11/13 Speech Networks ..................... MC34010, MC34011A,
MC34013A
A Speakerphone with Receive Idle Mode ................. MC34018
Equalization of DTMF Signals Using the MC34014 ......... MC34014
A New High Performance Current Mode
Controller Teams Up with Current
Sensing Power MOSFETs ............................ MC34129
Low Power FM Dual Conversion Receivers ............... MC3362, MC3363
A Handsfree Featurephone Design Using the MC34114
Speech Network and the MC34018 Speakerphone ICs .... MC34018, MC34114
A High Performance, Manual-Tuned AM Stereo Receiver
for Automotive Application Using Motorola ICs:
MC13021, MC13020 & MC13041 ...................... MC13041
MOTOROLA LINEAR/INTERFACE DEVICES
8-12
ORDERING INFORMATION
Device
Temperature Range
MC1496D
.........
50-14
MC1496
MC1596
Metal Can
MCl496G
O"Cto +70"C
CatamicOIP
MC1496L
MCl496P
PlaaticDIP
MC15966
-55·etc + 12S'C
MC1596L
Metal Can
CetamicDIP
Specifications and Applications
Information
BALANCED
MODULATOR/DEMODULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
BALANCED MODULATORI DEMODULATOR
. designed for use where the output voltage is a product of an
input voltage (signal) and a switching function (carrier). Typical
applications include suppressed carrier and amplitude modulation,
synchronous detection, FM ·detection, phase detection, and chopper
applications. See Motorola Application Note AN-531 for additional
design information.
•
•
•
•
GSUFFIX
METAL PACKAGE
CASE 603-04
Excellent Carrier Suppression - 65 dB typ @ 0.5 MHz
- 50 dB typ @ 10 MHz
Adjustable Gain and Signal Handling
Balanced Inputs and Outputs
High Common Mode Rejection - 85 dB typ
+
Carrier
Input
+ Output
Bias
(Top View)
LSUFFIX
CERAMIC PACKAGE
CASE 632-08
FIGURE 1SUPPRESSED·CARRIE R
OUTPUT WAVEFORM
DSUFFIX
PLASTIC PACKAGE
CASE 751A-02
SO-14
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
+ Signal .r-v--,
FIGURE 2SUPPRESSED·CAR R I E R
SPECTRUM
Input '
Gain Adjust '
Gain Adjust ,
- Signal ,
Input
Bias
"
"
"
"
VEE
NC
-Output
NC
5
+ Output
NC '
Carrier Input
10
-
:
~CCarrier
Input
(Top View)
FIGURE 4 - AMPLITUDE·MODULATION SPECTRUM
FIGURE 3AMPLITUDE·MODULATION
OUTPUT WAVEFORM
MOTOROLA LINEAR/INTERFACE DEVICES
8-13
MC1496, MC1596
MAXIMUM RATINGS' (TA = + 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Applied Voltage
(V6 - V7. Vs - Vl. Vg - V7. Vg - VS. V7 - V4. V7 - Vl.
Vs - V4. V6 - Vs. V2 - V5. V3 - V5)
AV
30
Vdc
V7 - Vs
V4 - Vl
+5.0
±(5+15Re)
Vdc
15
10
rnA
0C/W
Differential Input Signal
Maximum Bias Current
Thermal Resistance, Junction to Air
Cerami~
R8JA
Dual In-line Package
100
100
160
Plastic Dual In-Line Package
Metal Package
Operating Temperature Range
°c
TA
Oto +70
-55 to +125
MC1496
MC1596
Storage Temperature Range
Tsto
-65 to +150
°c
ELECTRICAL CHARACTERISTICS' (VCC = +12 Vdc. VEE = -S.O Vdc.15 = 1.0 mAdc. RL = 3.9 k!l. Re = 1.0 k!l.
TA = + 25°C unless otherwise noted) (All input and output characteristics are single-ended unless otherwise noted)
MC1596
Characteristic
Carrier Feedthrough
Vc == 60 mV(rms) sine wave and
offset adjusted to zero
Vc = 300 mVp-p square wave:
Note
Symbol
5
1
VCFT
Max
-
40
140
--
IC = 1.0 kHz
IC = 1.0 kHz
-
0.04
20
0.2
100
-
0.04
20
0.4
200
50
65
50
-
40
li5
50
-
8
Signal Gain
Vs = 100 mV(rms). 1= 1.0 kHz; IVei = 0.5 Vdc
10
3
Single-Ended Input Impedance. Signal Port. I = 5.0 MHz
Parallel Input Resistance
Parallel Input Capacitance
6
-
Single-ended Output Impedance. I = 10 MHz
Parallel Output Resistance
Parallel Output Capacitance
6
Input Bias Current
7
2
S
BW3dB
dB
7
Average Temperature Coefficient of Input Offset Current
ITA = -55°C to +1250(;)
7
Output Offset Current
(lS-lg)
Average Temperature Coefficient of Output Offset Current
(TA = -55°C to +125°C)
1.0 kHz
1.0 kHz,
-
k
MHz
300
-
-
300
-
-
SO
-
-
80
-
AVS
2.5
3.5
-
2.5
3.5
-
VN
rjp
cip
-
-
200
2.0
-
-
200
2.0
-
k!l
pF
rop
coo
-
40
5.0
-
-
40
5.0
-
k!l
pF
12
12
25
25
12
12
30
30
0.7
0.7
7.0
7.0
2.0
-
nArC
IbS
IbC
Input Offset Current
lioS = 11-14; lioC = 17-18
-
-
-
!z...:!:...!i
2
Unit
I'V(rms)
mV(rms)
VCS
-
=
Typ
-
Transadmittance Bandwidth (Magnitude) (RL = 50 ohms)
Carrier Input Port, Vc = 60 mV{rms) sine wave
IS = 1.0 kHz. 300 mV(rms) sine wave
Signal Input Port, Vs = 300 mV{rms) sine wave
Ivel = 0.5 Vdc
=
Min
-
5
Common-Mode Gain, Signal Port, fS
IVei = 0.5 Vdc
MC1496
Max
40
140
Carrier Suppression
IS = 10 kHz. 300 mV(rms)
fC = 500 kHz. 60 mV(rms) sine wave
fC == 10 MHz, 60 mV(rms) sine wave
Common-Mode Input .Swing, Signal Port, fS
Typ
-
offset not adjusted
I
11 + 14 I
bS=-2-; bC=
Min
IC = 1.0 kHz
IC = 10 MHz
offset adjusted to zero
II
Fig.
-
-
-
#LA
Iliosl
lioel
-
-
0.7
0.7
5.0
5.0
-
ITCliol
-
2.0
-
-
7
-
11001
-
14
50
-
14
80
#LA
7
-
ITClool
-
gO
-
-
gO
-
nArC
9
4
CMV
-85
-
-S5
-
Vp-p
ACM
-
5.0
-
-
-
9
-
-
8.0
-
Vp-p
S.O
-
Common-Mode Quiescent Output Voltage (Pin 6 or Pin 9)
10
-
Vout
Differential Output Voltage Swing Capability
10
-
Vout
Power Su~ply Current
16 + Ig
110
7
6
DC Power Dissipation
7
5
-
5.0
S.O
S.O
-
#LA
-
Vp-p
mAdc
ICC
lEe
-
2.0
3.0
3.0
4.0
Po
-
33
-
* Pin number references pertain to this device when
-
2.0
3.0
4.0
5.0
33
-
packaged in a metal can. To ascertain the corresponding pin numbers for plastic or
ceramic packaged devices refer to the first page of this specification sheet.
MOTOROLA LINEAR/INTERFACE DEVICES
8-14
dB
mW
I
MC1496, MC1596
GENERAL OPERATING INFORMATION *
Note 1 - Carrier Feedthrough
base current. Po = 2 IS (VS - V1O) + IS (VS - Vl0) where sub·
Carrier feedthrough is defined as the output voltage at carrier
frequency with. only the carrier applied (signal voltage:::: 01-
Carrier null is achieved by balancing the currents in the differential amplifier by means of a bias trim potentiometer (R 1 of
Figure 51.
Note 2 - Carrier Suppression
Carrier suppression is defined as the ratio of each sideband output to carrier output for the carrier and signal voltage levels speci-
scripts refer to pin numbers.
Note 6 - Design Equations
The following is a partial list of design equations needed to
operate the circuit with other supply voltages and input condi~
tions. See Note 3 for Re equation.
A. Operating Current
The internal bias currents are set by the conditions at pin 5.
Assume:
fied.
Carrier suppression is very dependent on carrier input level, as
shown in Figure 22. A low value of the carrier does not fully
switch the upper switching devices, and results in lower signal
gain, hence lower carrier suppression. A higher than optimum car-
rier level results in unnecessary device and circuit carrier feed·
through, which again degenerates the suppression figure. The
MC1596 has been characterized with a 60 mV(rms) sinewave
carrier input signal. This revel provides optimum carrier suppression at carrier frequencies in the vicinity of 500 kHz, and is
generally recommended for balanced modulator applications.
Carrier feedthrough is independent of signal level, VS. Thus
carrier suppression can be maximized by operating with large sig·
nal levels. However, a linear operating mode must be maintained
in the signal-input transistor pair- or harmonics of the modulating
signal will be generated and appear in the device output as spurious
sidebands of the suppressed carrier. This requirement places an
upper limit on input-signal amplitude (see Note 3 and Figure 20).
Note also that an optimum carrier level is recommended in Figure 22 for good carrier suppression and minimum spurious side- ...
band generation.
At higher frequencies circuit layout is very important in order
to minimize carrier feedthrough. Shielding may be necessary in
order to prevent capacitive coupling between the carrier input
leads and the output leads.
IS« IC for all transistors
then:
RS=~-soon
15
where:
R5 is the resistor between pin
5 and ground
rJ> = 0.7S V at T A = +2SoC
The MC1596 has been characterized for the condition IS
mA and is the generally recommended value.
= 1.0
B. Common-Mode Quiescent Output Voltage
Vs = Vg = V+ -IS RL
Note 7 - Biasing
The MC1596 requires three dc bias voltage levels which must be
set externally. Guidelines for setting up these three levels include
maintaining at least 2 volts collector-base bias on all transistors
while not exceeding the voltages given in the $bsolute maximum
rating table;
Note 3 - Signal Gain and Maximum Input Level
30 Vdc ~ [(Va. Vg) - (V7. Va)] ~ 2 Vdc
Signal gain (single-ended) at low frequencies is defined as the
voltage gain,
30Vdc 2: [(V7. Va) - (Vl. V4)] ~ 2.7 Vdc
30 Vdc
Vo
RL
2SmV
AVS = Vs = Re + 2re where re = IS (mA)
~
[(Vl. V4) - (VS)]
~
2.7 Vdc
The foregoing conditions are based on the following approximations:
A constant dc potential is applied to the carrier input terminals to
fully switch two of the upper transistors "on" and two transistors
"off" (VC = 0.5 Vdc). This in effect forms a cascade differential
amplifier.
Linear operation requires that the signal input be below a critical value determined by RE and the bias current 15
Bias currents flowing into pins 1, 4, 7, and 8 are transistor base
currents and can normally be neglected it external bias dividers
are designed to carry 1.0 mA or more.
Vs ,. IS RE (VollS peak)
Note 8 - Transadmittance Bandwidth
Carrier transadmittance bandwidth is the 3-dB bandwidth of
the device forward transadmittance as defined by:
Note that in the test circuit of Figure 10, Vs corresponds to a
maximum value of 1 volt peak.
io (each sideband)
Note 4 - Common-Mode Swing
Y21C -
The common-mooe swing is the voltage which may be applied
to both bases of the signal differential amplifier, without saturating
the current sources or without saturating the differential amplifier
itself by swinging it into the upper switching devices. This swing
is variable depending on the particular circuit and biasing conditions chosen (see Note 6).
Vs (SIgnal)
I
Vo = 0
Signal transadmittance bandwidth is the 3-dB bandwidth of the
device forward transadmittance as defined by:
V21S =
Note 5 - Power Dissipation
i (signal)
(signal)
v~
I
V c = O.S Vdc. Va = 0
·Pin number references pertain to this device when packaged in a
metal can. To ascertain the corresponding pin numbers for plastic or ceramic packaged devices refer to the first page of this
specification sheet.
Power dissipation, PD, within the integrated circuit package
should be calculated as the summation of the voltage-current products at each port, i.e. assuming V9:::: V6, 15:::: 16 = 19 and ignoring
MOTOROLA LINEAR/INTERFACE DEVICES
8-15
MC1496, MC1596
Note 12 - Signal Port Stability
Note 9 - Coupling and Bypass Capacitors C1 and C2
Under certain values of driving source impedance, oscillation
may occur. I n this event, an RC suppression network should be
connected directlv to each input using short leads. This will reduce
the Q of the source-tuned circuits that cause the oscillation.
Capacitors C1 and C2 (Figure 5) should be selected for a re-
actance of less than 5.0 ohms at the carrier frequency.
Note 10 - Output Signal, Va
The output signal is taken from pins 6 and 9, either balanced
or single-ended. Figure 12 shows the output levels of each of the
two output sidebmds resulting from variations in both the carrier and modulating signal inputs with a single-ended .output
connection.
An alternate method for low-frequency applications is to insert
a 1 k-ohm resistor in series with the inputs, pins 1 and 4. I n this
case input current drift may cause serious degradation of carrier
suppression.
Note 11 - Negative Supply. VEE
VEE should be de only. The insertion of an RF choke in series
with VEE can enhance the stability of the internal current sources,
TEST CIRCUITS
FIGURE 6 - INPUT·OUTPUT IMPEDANCE
FIGURE 5 - CARRIER REJECTION AND SUPPRESSION
1k
VCC
+12 Vdc
1k
Ae'" 1 k
R,
RL
3.9 k
C2
CARRIER O.l.F
INPUT Vc ---If-4-------<8
VS~~~--~--~
Zin-
MODULATING
SIGNAL
INPUT
10 k
II
I-<>---_.+Va
-Zout
-Va
10
6.B k
B.S k
NOTE: Shielding of
input and output leads may
-8Vde
-SVdc
VEE
be needed to properlv
perform these tests.
FIGURE 7 - BIAS AND OFFSET CURRENTS
FIGURE 8 - TRANSCONDUCTANCE BANDWIDTH
VCC
+12 Vdc
1k
1k
CARRIER O.l.F
INPUT Vc---lf--''--------<>-;;-j
~
~
MODULATING
SIGNAL
INPUT
10 k
CARRIER NULL
-8 Vdc
VEE
-8 Vde
VEE
NOTE: Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for plastic or ceramic packaged devices refer to the first page of this specification sheet.
MOTOROLA LINEAR/INTERFACE DEVICES
8-16
MC1496, MC1596
TEST CIRCUITS (continued)
FIGURE 9 - COMMON-MOOE GAIN
FIGURE 10 - SIGNAL GAIN AND OUTPUT SWING
lk
3.9 k
t--c......-+-... +V o
...... -Vo
f--o-~
Vs
10
50
6.8 k
50
15=
1 mA
t
6.8 k
ACM = 20 log IVol
Vs
-8Vde
VEE
-8 Vdc
VEE
NOTE: Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for plastic or ceramic packaged devices refer to the first page of this specification sheet.
TYPICAL CHARACTERISTICS (continued)
Typical characteristics were obtained with circuit shown in Figure 5, fC = 500 kHz (sine wave),
Vc
= 60 mV(rms), fS =
1 kHz, Vs = 300 mV(rms). T A
FIGURE 11 - SIDEBAND OUTPUT versus CARRIER LEVELS
§
1.0M
2.0
~
in
~
o
z
re
~
....
1.2
......
~
-::--
~
~
l
/ V
' / ~I-
'" 0.4
'"
In
400 mv
/1""
0.8
;;
~
Z
SIGNAL INPUT = 600 mV
:::;
~
500
+rjp
i
300 mV
~
w
~
~
200 mV
~
;;';
lOOmV
50
100
\
100
-tip
II
50
'\.
'\.
10
5.0
;it
~ 1.0
0
0
\
.......
w
w
g
'""
1.6
o
in
B
= +2SoC unless otherwise noted.
FIGURE 12 - SIGNAL-PORT PARALLEL-E<.lUIVALENT
INPUT RESISTANCE versus FREQUENCY
150
5.0
1.0
200
10
50
100
f, FREQUENCY (MHz)
VC, CARRIER LEVEL (mV[rmsl)
FIGURE 13 - SIGNAL-PORT PARALLEL-EQUIVALENT
INPUT CAPACITANCE versus FREQUENCY
5.0
FIGURE 14 - SINGLE-ENDED OUTPUT
IMPEDANCE versus FREQUENCY
en
140
1
%120
1
~
w
"~
1
100
t;
in
~
~
~
;;';
1.0
1.0
5.0
10
10
rop
80
8
!:;
.......
50
0
~
20
E!
0
4
""
o
100
I, FREQUENCY (MHz)
1.0
f, FREQUENCY (MHz)
MOTOROLA LINEAR/INTERFACE DEVICES
8-17
6
cop
40
10
........
2
0
100
MC1496, MC1596
TYPICAL CHARACTERISTICS (continued)
Typical characteristics were obtained with circuit shown in Figure 5, fC "" 500 kHz (sine wave),
VC"" 60 mV(rms). 1S = 1 kHz, VS= 300 mV(rms). T A:: +250 C unless otherwise noted.
FIGURE 15 - SIDEBAND AND SIGNAL PORT
TRANSADMITTANCES versus FREOUENCY
1.0
0.9
~
1111
r--
SIWMf
0.8
E
.s
0.7
z
0.6
w
<.>
'"
"-
RT
III
f-SIOEBANO-
~
lOIn (EACH SIDEBAND)
Y21=
0.4
I
i
o
1.0
0.1
\
20
!
30
'"w
'"'"
~
1\
I 11111
II III
I
10
MC1596
i---MC1496---<
(+70 0 C)
40
........
50
""
~
IVel = 0.5 Vdc
.""1'111111
I
10
z
>
Y21 = lout!
v:- Vout = 0
0.1
"-
I v Qut-- 0
TRAS~;~~~I;~~~CE
0.2
N
I Vi"I'~'I~~t'll
I
~ 0.3
l-
;;;
:s
0
SIOEBAND
TRANSADMITTANCE
~ 0.5
;;;
c
r\
i"-
11111111
r---
FIGURE 16 - CARRIER SUPPRESSION
versus TEMPERATURE
I 111111
100
60
70
1000
-75
fC, CARRIER FREQUENCY (MHz)
FIGURE 17 - SIGNAL.pORT FREQUENCY RESPONSE
+ zo
~
~ +10
'"w
II
'"«
~
>
"
I
-
i 1rill
c
"'cffi
-10
'"u;z
-ZO
1111111
IIIIIII
0.1
-30
0,01
I'
,...,.ZfC
sod n
I-------
i'..
V
R,"1k
IVCI" 0.5 Vdc
~
'"
: I~~I"
1111111
~
)
----
fC
'1
I ~'''I ~~'II
1.0
AV"
+150 +175
~;:~;o~,l-
RL.
k
R,·Z kl
Tes'I CirCU ;')
+125
FIGURE 18 - CARRIER SUPPRESSION versus FREQUENCY
ts
RL " 3,9 k (Standard
'- R'I
\.. /
o +25 +50 +75 +100
TA. AMBIENT TEMPERATURE (OC)
-25
-50
-
,.....
i'..
RL
10
100
0.05
0,1
-
!0.5
1.0
3fC
5.0
-
10
50
fC, CARRIER FREUUENCY IMHz)
f. FREQUENCY (MHz)
FIGURE 20 - SIDEBAND HARMONIC SUPPRESSION
versus INPUT SIGNAL LEVEL
FIGURE 19 - CARRIER FEEDTHROUGH versus FREQUENCY
10
""E
:;
.sw
«
'"
':;
1.0
0
/"
>
I-
::>
:=::>
c
'"
0
0.1
w
~
0
~
5
>
0.01
0.05
o.
./
0
0,1
0,5
1.0
5.0
10
50
-200
fC. CARRIER FREQUENCY (MHz)
f C±3fS,.........
r::-::IZfS
~
400
V
,.....
/
600
VS. INPUT SIGNAL AMPLITUDE ImVlrmsl)
MOTOROLA LlNEAR/lNTERFACE DEVICES
8-18
800
MC1496, MC1596
TYPICAL CHARACTERISTICS (continued)
FIGURE 21 - SUPPRESSION OF CARRIER HARMONIC
SIDEBANDS versus CARRIER FREQUENCY
FIGURE 22 - CARRIER SUPPRESSION
versus CARRI ER INPUT LEVEL
1111
11111
~
6
3tm+::::
10
20
~
IIII
I
2tc± ts
~
30
'"w
40
5
50
~
--
2tC± 2ts
r--
~
>
60
70
70
~.05
0.1
0.5
1.0
5.0
10
50
tC·l0 MHz- I - -
.-1""
1-
.......
--
'"
"o
100
,/
./'
tc - 500 kHz
-"':
200
300
400
500
VC, CARRIER INPUT LEVEL (mV[rms])
fC, CARRIER FREQUENCY (MHd
OPERATIONS INFORMATION
The MC1596/MC1496, a monolithic balanced modulator circuit, is shown in Figure 23.
This circuit consists of an upper quad differential amplifier
driven by a standard differential amplifier with dual current
sources. The output collectors are cross-coupled
50
FIGURE 23 - CIRCUIT SCHEMATIC
(-)9
. - - I = = = = : ; : = + : = = = = : : : g V o . OUTPUT
(+)6
that full-wave
balanced multiplication of the two input voltages occurs. That is,
the output signal is a constant times the product of th:e two input
signals.
Mathematical analysis of linear ae signal multiplication indi-
cates that the output spectrum will consist of only the sum and
difference of the two input frequencies. Thus, the device may be
used as a. balanced modulator, doubly balanced mixer, product
detector, frequency doubler, and other applications requiring
these particular output signal characteristics.
The lower differential amplifier has its emitters connected to
the package pins so that an external emitter resistance may be
used. Also, external load resistors are employed at the device
output.
4(-)
SIGNAL
INPUT
VS~--------~============t=====~=~
1 (+)
GAIN ADJUST
3
BIAS
50---;---1-----------1
500
VEE 10 o---~----~------------'
Signal Levels
FIGURE 24 - TYPICAL MODULATOR CIRCUIT
The upper quad differential amplifier maY,be operated either
in a linear or a saturated mode. The lower differential amplifier
is operated in a linear mode for most applications.
For low-level operation at both input ports, the output signal
wi" contain sum and difference frequency components and have
an amplitude which is a function of the product of the input signal
amplitudes.
For high-level operation at the carrier input port and linear
operation at the modulating signal port, the output signal will
contain sum and difference frequency components of the mooulating signal frequency and the fundamental and odd harmonics of
the carrier frequency. The output amplitude will be a constant
times the modulating signal amplitude. Any amplitude variations
in the carrier signal will not appear in the output.
MC1596G
Vs
f-6---...... -V,
MODULATING
SIGNAL
INPUT
10
'5
CARRIER NULL
S.ak
-8 Vdc
VEE
NOTE: Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for plastic or ceramic packaged devices refer to the first page of this specification sheet.
MOTOROLA LINEAR/INTERFACE DEVICES
8-19
MC1496, MC1596
OPERATIONS INFORMATION (continued)
The gain from the modulating signal input port to the output is
the Me 1596/MC1496 gain parameter which is most often of interest
to the d,esigner. This gain has significance only when the lower
differential amplifier is operated in a linear mode, but this includes
most applications of the device.
As previously mentioned, the upper quad differential amplifier
may be operated either in a linear or a saturated mode. Approximate gain expressions have been developed for the MC15961
MC1496 for a low-level modulating signal input and the following
carrier input conditions:
The linear signal handling capabilities of a differential amplifier
are well defined. With no emitter degeneration, the maximum
input voltage for linear operation is approximately 25 mV peak.
Since the upper differential amplifier has its emitters internally
connected, this voltage applies to the carrier input port for all
conditions.
Since the lower differential amplifier has provisions for an
external emitter resistance, its linear signal handling range may be
adjusted by the user. The maximum input voltage for linear op·
eratian may be approximated from the following expression:
1) Low-level dc
V :-(15) (RE}VOI1S peak.
21 High-level de
3) Low-level ac
4) High-level ac
This expression may be used to compute the minimum value of
RE for a given input voltage amplitude.
These gains are summarized in Table 1, along with the frequency components contained in the output signal.
FIGURE 25 - TABLE 1
VOLTAGE GAIN AND OUTPUT FREQUENCIES
Carrier Input
Signal (Vel
Low-level dc
Approximate
Voltage Gain
RL Ve
2(RE + 2rel
High-level dc
Low-level ac
High-level ac
NOTES:
1. Low-level Mo~ulating Signal, VM, assumed in all cases.
Vc is Carrier Input Voltage.
2. When the output signal contains multiple frequencies,
the gain expression given is for the output amplitude of
each of the two desired outputs, fC + fM and fC - fM'
3. All gain expressions are for a single-ended output. For
a differential output connection, multiply each expression by two.
4. RL "" Load resistance.
5. RE = Emitter resistance between pins 2 and 3.
6. re "" Transistor dynamic emitter resistance, at +250 C;
Output Signal
Frequency(s)
(~T)
RL
fM
1M
RE + 2re
RL Ve(rmsl
2J2(~T) (RE + 2rel
26 mV
re"" IS (mAl
fe±fM
0.637 R L
fe±fM. 3fe±fM.
RE + 2re
Sfe±fM •.
7. K = Boltzmann's Constant, T = temperature in degrees
Kelvin, q = the charge on an electron.
gq ~ 26 mV at room temperature
APPLICATIONS INFORMATION
Double sideband suppressed carrier modulation is the basic
application of the MC1596/MC149S. The suggested circuit for
this application is shown on the front page of this data sheet.
I n some applications, it may be necessary to operate the
MC159S/MC1496 with a single dc supply voltage instead of dual
supplies. Figure 26 shows a balanced modulator designed for
operation with a single +12 Vdc supply. Performance of this circuit is similar to that of the dual supply modulator.
This proouct detector has a sensitivity of 3.0 microvolts and a
dynamic range of 90 dB when operating at an intermediate frequency of 9 MHz.
The detector is broadband for the entire high frequency range.
For operation at very low intermediate frequencies down to 50
kHz the 0.1 J,lF capacitors on pins 7 and 8 should be increased to
1.01lF. Also, the output filter at pin 9 can be tailored to a
specific intermediate frequency and audio amplifier input impedance.
As in all applications of the MC159S/MC1496, the emitter
resistance between pins 2 and 3 may be increased or decreased to
adjust circuit gain, sensitivity, and dynamic range.
This circuit may also be used as an AM detector by introo.ucing
carrier signal at the carrier input and an AM signal at the SSB
input.
The carrier signal may be derived from the intermediate frequency signal or generated locally. The carrier signal may be introduced with or without modulation, provided its level is
sufficiently high to saturate the upper quad differential amplifiet.
If the carrier signal is modulated, a 300 mV(rms) input level is
recommended .
AM Modulator
The circuit shown in Figure 27 may be used as an amplitude
modulator with a minor modification.
All that is required to shift from suppressed carrier to AM
operation is to adjust the carrier null potentiometer for the proper
amount of carrier insertion in the output signal.
However, the suppressed carrier null circuitry as shown in
Figure 27 does not have sufficient adjustment range. Therefore,
the modulator may be modified for AM operation by changing
two resistor values in the null circuit as shown in Figure 28.
Product Detector
The MC159S/MCl49S makes an excellent SSB product detector (see Figure 29).
MOTOROLA LINEAR/INTERFACE DEVICES
8-20
MC1496, MC1596
APPLICATIONS INFORMATION (continued)
Doubly Balanced Mixer
Phase Detection and FM Detection
The MC1596/MC1496 may be used as a doubly balanced
mixer with either broadband or tuned narrow band input and
The MC1596/MC1496 will function asa phase detector. Highlevel input signals are introduced at both inputs. When both inputs
are at the same frequency the MC1596/MC1496 will deliver an
output which is a function of the phase difference between the
two input signals.
An FM detector may be constructed by using the phase detector principle. A tuned circuit is added at one of the inputs to
cause the two input signals to vary in phase as a function of frequency. The MC1596/MC1496 will then proVoide an output which
is a function of the input signal frequency.
output networks.
The local oscillator signal is introduced at the carrier input
port with a recommended amplitude of 100 mV(rms).
F ;gure 30 shows a mixer with a broadband input and a tuned
output.
Frequency Doubler
The MC1596/MC1496 will operate as a frequency doubler by
introducing the same frequency at both input ports.
Figures 31 and 32 show a broadband frequency doubler and a
tuned output very high frequency (VHF) doubler, respectively.
NOTE: Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for plastic or ceramic packaged devices refer to the first page of this specification sheet.
TYPICAL APPLICATIONS
FIGURE 26 - BALANCED MODULATOR
(+12 Vdc SINGLE SUPPLY)
FIGURE 27 - BALANCED MODULATOR-DEMODULATOR
Vee
1k
810
+12 Vdc
Uk
3k
3k
O.l,uF
CARRIER INPUT
SO mV(rms) _-+:+-+-1!--4-~-'---I
DSE
MC1596G
MC1496G
OUTPUT
MC1596G
MC1496G
Vs
f-'-<>--+-e- V,
MODULATING
SIGNAL
10
INPUT
10k
CARRIER r-'W~f--'
NULL
10 k
50 k
':-:---=---~ VEE
-8Vdc
100
L-J,--~::j--4----'
FIGURE 29 - PRODUCT DETECTOR
(+12 VdcSINGLE SUPPLY)
FIGURE 28 - AM MODULATOR CIRCUIT
Uk
RL
Ik
3.9k
AF
1.0pF OUTPUT
Vs
MODULATING
L,-------.J~>--_t--t-'V\"1..-j~
SIGNAL
INPUT
S.Bk
MOTOROLA LINEAR/INTERFACE DEVICES
8-21
10 k
MC1496, MC1596
TYPICAL APPLICATIONS (continued)
FIGURE 30 - DOUBLY BALANCED MIXER
(BROADBAND INPUTS. 9.0 MHz TUNED OUTPUT)
FIGURE 31 - LOW·FREQUENCY DOUBLER
1k
RFe
n
100~H
1k
G2
9
RF INPUT
9.5/.1H
11
51
5-80pF
6.Bk
OUTPUT
MC1596G
MC1496G
'OOl"
9.0 MHz
OUTPUT
RL =50!!
90-480pF
-=-
-=-
10
10k
100
'-"-===+--e_ 8 V(\(
Ll =44TUANSAWG NO 2BENAMElEDWIRE,WOUND
6.Bk
ON MJCRQMETAlS TYPE 44·6 TOROID CORE
'---c:----------1 VEE
"
-8Vdc
FIGURE 32 - 150 to 300 MHz DOUBLER
Vee
1k
100
MHz
r-L---'--l-!~_I_~'l'_.... 300
OUTPUT
II
l-lOpF Rl =50n
O.OOljlF
150 MHz
INPUT . .N~----o_t
1-10pF
100
11 =lTURNAWG
NO. 18WIRE,7132"1O
DEFINITIONS
t
~
,
J!'
'"'"
'"'"
+
~
-'
~~
,FREQUENCY - - - - - i... SALANCED MODULATOR SPECTRUM
IC
CARRIER FUNDAMENTAL
Is
MODULATING SIGNAL
IC' fS FUNDAMENTAL CARRIER SIDEBANDS
fC' nfs FUNDAMENTAL CARRIER SIDEBAND HARMONICS
nlc
CARRIER HARMONICS
nfc' nfs CARRIER HARMONIC SIDEBANDS
NOTE: Pin number references pertain to this device when packaged in a metal can. To ascertain the corresponding pin
numbers for plastic or ceramic packaged devices refer to the first page of this specification sheet.
MOTOROLA LINEAR/INTERFACE DEVICES
8-22
®
MC2831A
MOTOROLA
LOW POWER FM TRANSMITTER SYSTEM
The MC2B31A is a one-chip FM transmitter subsystem designed
for cordless telephone and FM communication equipment. It
includes a Microphone Amplifier, Pilot Tone Oscillator, Voltage
,Controlled Oscillator and Battery Monitor.
LOW POWER
FM TRANSMITTER SYSTEM
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Wide Range of Operating Supply Voltage (3,0 V-B.O V)
• Low Drain Current (4,0 mA Typ Full Operation at
VCC = 4.0 V)
• Battery Checker (290 jJ.A Typ at VCC = 4,0 V)
• Low Number of External Parts Required
FIGURE 1 -
~I'
16r'
lll'I'n I
FUNCTIONAL BLOCK DIAGRAM
I!
16
1
RF
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
Osc
15
16~'
1
14
D SUFFIX
PLASTIC PACKAGE
CASE 7518-03
SO-16
VCC
13
PIN ASSIGNMENTS
Variable
Reactance
Output
Decoupling
12
Modulator
Input
11
10
7
--
8
MAXIMUM RATINGS (TA
VCC2
MicAmp
Input
Mic Amp
Output
Tone
Switch
Tone
Output
= 25°C
9
unless otherwise noted)
Pin
Symbol
Value
Unit
Power Supply Voltage
4,12
VCC
10
Vdc
Operating Supply Voltage Range
4,12
VCC
3,0 to B.O
Vdc
Battery Checker Output Sink Current
10
ILED
25
mA
Junction Temperature
TJ
+150
°c
Operating Ambient Temperature Range
-
TA
-30 to +75
°c
Storage Temperature Range
-
Tstg
-65 to +150
°c
Rating
MOTOROLA LINEAR/INTERFACE DEVICES
8-23
MC2831A
ELECTRICAL CHARACTERISTICS (VCCl
= 4.0 Vdc, VCC2 = 4.0 Vde, TA =
25"C, unless otherwise noted}
Symbol
Pin
Min
Typ
Max
Drain Current
ICCl
12
150
290
420
!LA
Drain Current
ICC2
4
2.2
3.6
6.5
mA
VTB
11
1.0
VOSAT
10
-
Characteristic
Unit
BATTERY CHECKER
Threshold Voltage (LED Off ~ On}
Output Saturation Voltage
(Pin 11 = 0 V, Pin 10 Sink Current
=
1.2
1.4
Vde
0.15
0.5
Vde
27
30
33
dB
5.0 mA}
MIC AMPLIFIER
-
5,6
-
6
1.1
1.4
1.7
Vde
6
0.8
1.2
1.6
Vp-p
6
-
0.7
-
%
-
8
-
50
-
mV rms
8
1.4
-
Vde
Total Harmonic Distortion
(fa = 5.0 kHz, VAF = 150 mV rms }
-
8
-
1.8
5.0
%
Tone Switch Threshold
-
7
1.1
1.4
1.7
Vdc
VRFO
14
Voltage Gain, Closed Loop
(Vin = 1.0 mVrms , fin = 1.0 kHz}
Output de Voltage
Output Swing (Vin
=
30 mV rms, fin
=
1.0 kHz}
THO
Total Harmonic Distortion
(VO = 31 mVrms, fin = 1.0 kHz}
PILOT TONE OSCILLATOR (250 {l LOADING)
Output AF Voltage (fo
=
5.0 kHz}
Output de Voltage
FM MODULATOR '120 {l LOADING)
-
14
-
40
-
1.3
-
Vde
3,14
6.0
10
18
Hz/mVde
Maximum Deviation (Note 11
(Vin = 0 V to +2.0 V}
-
3,14
=2.5
=5.0
=12.5
kHz
RF Frequency Range
-
14
60
MHz
Output RF Voltage (fo
=
16.6 MHz}
Output de Voltage
II
Modulation Sensitivity (Note 1}
(Vin = 1.0 V ± 0.2 V}
-
.. .
-
Note 1. Modulation sensitivity and maximum devlat,on are measured at 49.815 MHz. which IS the third harmOniC of the crystal frequency .
MOTO.ROLA LINEAR/INTERFACE DEVICES
8-24
mV rms
MC2831A
FIGURE 2 -
-
TEST CIRCUIT
~-JV"~-----1D
4.7
~H
16.605 MHz
Mod Out
16
0.0047
Mod In
14
RFOut
116.605 MHz,
12
VCCI
11
Battery
Checker In
10
LED
0.01
MC2831A
0.047
VCC2
Ll
Toka America
7PA Tvpe
126AN - 6708X
20mH
Ose Coil
FIGURE 3 -
SINGLE CHIP FM VHF TRANSMITTER AT 49.7 MHz
4.7,uH ---+ 16.5667 MHz
~--ID'l----~
NOTES:
51 is a normally closed push button type switch.
Battery checker circuit (Pins 10, 11) is not used in this application.
The crystal used is fundamental mode, calibrated for parallel resonance
with a 32 pF load. The49.7 MHz output is generated in the output buffer,
which generates useful harmonics to 60 MHz.
All capacitors in microfarads. inductors in Henries and resistors in
Ohms, unless otherwise specified.
The network on the output at Pin 14 provides output tuning and impedance matching to 50 U at 49.7 MHz. Harmonics are suppressed by more
than 25 dB.
MOTOROLA LINEAR/INTERFACE DEVICES
8-25
II
®
MC2833
MOTOROLA
Product Preview
LOW POWER
FM TRANSMITTER
SYSTEM
LOW POWER FM TRANSMITTER SYSTEM
MC2833 is a one-chip FM transmitter subsystem designed for
cordless telephone and FM communication equipment. It includes
a microphone amplifier. voltage controlled oscillator and two auxiliary transistors.
• Wide Range of Operating Supply Voltage (2.8-9.0 V)
• Low Drain Current (ICC = 2.9 mA Typ)
• Low Number of External Parts Required
• -30 dBm Power Output to 60 MHz Using Direct RF Output
• + 10 dBm
Power Output Attainable Using On-Chip Transistor
Amplifiers
II
,.
16#
1
1
P SUFFIX
DSUFFIX
PLASTIC PACKAGE
CASE 648-06
PLASTIC PACKAGE
CASE 751B-03
SO-16
FUNCTIONAL BLOCK DIAGRAM
PIN ASSIGNMENTS
16
2
15
Variable
Reactance
Output
Decoupling
3
14
4
13
5
12
Modulator
Inpu',
6
11
7
10
8
9
RF
Output
Tr2
Base
MicAmp
Input
Tr 2
Emitter
Gnd
Tr 1
Base
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
8-26
Osc
MicAmp
Output
Tr 1
Emitter
J,
} RF
Tr2
Collector
VCC
Tr1
Collector
MC2833
MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
Ratings
VCC
10 (max)
V
Operating Supply Voltage Range
VCC
2.8-9.0
V
TJ
+150
°c
TA
-30 to +75
°c
Tsta
-65 to + 150
°c
Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (VCC
= 4.0 V, TA =
25°C, unless otherwise noted)
Characteristics
Drain Current (No input signal)
FM MODULATOR
Output RF Voltage (fo
=
Vout RF
14
60
90
130
Output DC Voltage (No input signal)
16.6 MHz)
Vdc
14
2.2
2.5
2.8
V
Modulation Sensitivity (fo = 16.6 MHz)
(Vin = 0.8 V to 1.2 V)
SEN
3.0
14
7.0
10
15
HzlmVdc
-
-
-
Maximum Deviation (fo = 16.6 MHz)
(Vin = 0 V to 2.0 V)
Fdev
3.0
14
3.0
5.0
-
-
mVrms
10
kHz
33
dB
-
MIC AMPLIFIER
Closed Loop Voltage Gain (Vin = 3.0 mVrms)
(fin = 1.0 kHz)
Av
4.0
5.0
Output DC Voltage (No input signal)
Vout de
Output Swing Voltage (Vin = 30 mVrms)
(fin = 1.0 kHz)
Vout p-p
THD
Total Harmonic Distortion (Vin = 3.0 mVrms)
(fin = 1.0 kHz)
27
30
-
-
-
4.0
1.1
1.4
1.7
V
4.0
0.8
1.2
1.6
Vp-p
4.0
-
0.15
2.0
%
Max
Unit
AUXILIARY TRANSISTOR STATIC CHARACTERISTICS
Symbol
Min
Typ
5.0 pA)
V(BR)CBO
15
45
=
V(BR)CEO
10
15
Collector Substrate Breakdown Voltage (lC
V(BR)CSO
Emitter Base Breakdown Voltage (IE
V(BR)EBO
40
fr
Collector Base Capacitance (VCE = 3.0 V)
(lC = 0)
Collector Substrate Capacitance (VCS = 3.0 V)
(lc = 0)
Characteristics
Collector Base Breakdown Voltage (lC
=
Collector Emitter Breakdown Voltage (lc
200 pA)
= 50 pA)
= 50 pA)
= 10 V)
Collector Base Cut Off Current (VCB
(IE = 0)
-
V
-
V
6.2
-
200
nA
150
-
-
-
500
-
MHz
CCB
-
2.0
-
pF
CCS
-
3.3
-
pF
'CBO
DC Current Gain (lc = 3.0 mAl
(VCE = 3.0 V)
hFE
70
V
V
AUXILIARY TRANSISTOR DYNAMIC CHARACTERISTICS
Current Gain Bandwidth Product (VCE = 3.0 V)
(lc = 3.0 mAl
MOTOROLA LINEAR/INTERFACE DEVICES
8-27
II
MC2833
-
FIGURE 1 - TEST CIRCUIT
16
39 pF
Crystal: fo = 16.605 MHz
CL = 30 pF
Co = 6.1 pF
RS = 10n Max
b.
15
68 pF'::"
141---0RF Out
Mod In
MicAmp
Out
131----0 Baoe 2
MicAmp
In
12 1 - - - - 0 Emitter 2
6.3 k
6
111----0 Collector 2
7
101-_---,
'::"
Emitter 1
+
47
8
Base 1
-::I:'
':1:',::" 0.01 p.F
p.F '::"
91----0 Collector 1
fiGURE 2 - SINGLE CHIP FM VHF TRANSMITTER AT 49.7 MHz
16.5667 MHz
..
3.3 P.
..----.MC2833,..----,
'T 1000 pF
'::"
td
47 pF
RFOutput
49.7 MHz
+10 dBm
220 pF
390 k
~470PF
VCC = 3.0Vt08.0V
NOTES: The crystal used is fundamental mode. calibrated for para"el
resonance with a 32 pF load. The 49.7 MHz output is
generated in the output buffer, which is being used as a
frequency tripler in this application.
The networks in the output stages provide frequency
selectivity and impedance matching at 49.7 MHz.
The RF output is + 10 dBm (10 mW into 50 0 load) at 49.7
MHz, with all harmonics reduced by more than 50 dB.
All capacitors in microfarads. inductors in Henries and
resistors in Ohms unless otherwise speCified.
0.221'H inductors are Toko B199SN-T1048Z
3.3 ,.H inductor is Toko B199KN-T1055Z
MOTOROLA LINEAR/INTERFACE DEVICES
8-28
®
MC33S6
MOTOROLA
WIDEBAND
FSK
WIDEBAND FSK RECEIVER
RECEIVER
· .. includes Oscillator, Mixer, Limiting IF Amplifier, Quadrature
Detector, Audio Buffer, Squelch, Meter Drive, Squelch Status output, and Data Shaper comparator. The MC3356 is designed for
use in digital data communications equipment.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Data Rates up to 500 kilobaud
• Excellent Sensitivity: -3 dB Limiting Sensitivity
30 ,...Vrms @ 100 MHz
• Highly versatile, full-function device, yet few external parts are
required
FN SUFAX
PLASTIC PACKAGE
CASE 775-02
FIGURE 1 -
FIGURE 2 -
FUNCTIONAL BLOCK DIAGRAM
P SUFFIX
PLASTIC PACKAGE
CASE 738-03
PIN CONNECTIONS
RF
vee
RF
Ground
RF Input
1
Ground
/
I
I
I
I
I
I
I
"',..,-=-.,.---1.:.::......- ....-0 Data
Data Output
+ Comparator
- Comparator
I
---------,
Ceramic
Filter
Squelch Control
Buffered Output
Demodulator
Filter
10
Quad Input
Ouadrature Detector
r-~-'Tank
I
I
I
I
Vee
IL _____ -lI
MOTOROLA LINEAR/INTERFACE DEVICES
8-29
MC3356
MAXIMUM RATINGS
Symbol
Value
Unit
VCC(max)
15
Vdc
VCC
3.0 to 9.0
Vdc
R.F. VCC
3.0 to 12.0
Vdc
Junction Temperature
TJ
150
·C
Operating Ambient Temperature Range
TA
-40 to +85
·C
Tstg
-65 to +150
·C
Po
1.25
W
Rating
Power Supply Voltage
Operating Power Supply Voltage Range (Pins 6, 10)
Operating R.F. Supply Voltage Range (Pin 4)
Storage Temperature Range
Power Dissipation, Package Rating
ELECTRICAL CHARACTERISTICS
(VCC = 5.0 Vdc, 10 = 100 MHz, losc = 110.7 MHz, ~I = ±75 kHz, fmod = 1.0 kHz, 50
source, T A = 25·C, test circuit of Figure 3, unless otherwise noted.)
Characteristics
Min
Input for - 3 dB limiting
~ N)
Input for 50 dB quieting (S
Max
Unit
20
25
mAdc
60
-
Mixer Input Capacitance, 100 MHz
-
Mixer/Oscillator Frequency Range (Note 1)
-
0.2 to 150
IF/Quadrature Detector Frequency Range (Note 1)
-
0.2 to 50
Mixer Input Resistance, 100 MHz
260
5.0
Meter Drive
-
7.0
Squelch Threshold
-
0.8
AM Rejection (30% AM, RF Vin = 1.0 mVrms)
Demodulator Output, Pin 13
-
30
2.5
Mixer Voltage Gain, Pin 20 to Pin 5
II
Typ
-
Drain Current Total, RF VCC and VCC
50
0.5
Note 1: Not taken in Test Circuit of Figure 3; new component values required,
FIGURE 3 - TEST CIRCUIT
Squelch
Status
Data Output
47k
47k
130 k
Demod
Out
3.3 k
18 k
3.0 k
100 MHz
R~
__
lnpu_t____' -____O~I'IOh'
I
y
51
L1-110.7 MHz, 0.4.,.H
7T #22,
Form
w/slug & can
L2-10.7 MHz, 1.5.,.H
20T #30,
Form
w/slug & can
T1-muRata
SFE10.7 MA5-Z
or
KYOCERA
KBF10.7MN-MA
10 k
3.3 k
~
r::::-:=-~~---.::-'-':'-~--::-=~--:--=--=----1.!.!.----.
17
16
15
14
13
Campi +) Camp( - ) Squelch Squelch Demod
Status Control
Out
12
Demod
Filter
0/,.
0/,.
MOTOROLA LINEAR/INTERFACE DEVICES
8-30
n
11
Quad
Input
.,.Vrms
.,.Vrms
n
pF
MHz
MHz
dB
Vrms
.,.AldB
Vdc
MC3356
FIGURE 4 -
OUTPUT COMPONENTS OF SIGNAL. NOISE.
AND DISTORTION
10
-10
~
;:: -20
~
5- 30
s + IN 1d
v/'
I
METER CURRENT versus SIGNAL INPUT
--
-50
600
fa = 11001M~z I
fm = 1.0 kHz
af = ± 75kHz
/
~-40 .........
~
FIGURE 5 -
700
«
.E, 500
....
~ 400
~
~ 300
l-
~ 200
t---.....
!:Ii:
N
0.1
1.0
100
o
-60
0.01
i-'
a
N+ 0
10
0.010
INPUT ImVrmsl
0.1
1.0
10.
PIN 20 INPUT ImVrmsl
100
1000
GENERAL DESCRIPTION
adjusted by changing the meter load resistor. The comparator( +) input and output are available to permit control of hysteresis. Good positive action can be obtained
for IF input signals of above 30 ",Vrms. The 130 kO
resistor shown in the test circuit provides a small
amount of hysteresis. Its connection between the 3.3 k
resistor to ground and the 3.0 k pot. permits adjustment
of squelch level without changing the amount of
hysteresis.
The squelch is internally connected to both the quadrature detector and the data shapero The quadrature
detector output. when squelched, goes to a dc level
approximately equal to the zero signal level. unsquelched. The squelch causes the data shaper to produce a high (VCC) output. .
The data shaper is a complete "floating" comparator.
with back to back diodes across its inputs. The output
of the quadrature detector can be fed directly to either
input ofthis amplifier to produce an output that is either
at VCC or VEE. depending upon the received frequency.
The impedance of the biasing can be varied to produce
an amplifier which "follows" frequency detuning to
some degree. to prevent data pulse width changes.
When the data shaper is driven directly from the demodulator output. Pin 13. there may be distortion at Pin
13 due to the diodes. but this is not important in the
data application. A useful note in relating high/low input
frequency to logic state: low IF frequency corresponds
to low demodulator output. If the oscillator is above the
incoming RF frequency. then high RF frequency will
produce a logic low. (Input to (+ )input of Data Shaper
as shown in figures 1 and 3.)
This device is intended for single and double conversion VHF receiver systems. primarily for FSK data
transmission up to 500 K baud (250 kHz). It contains an
oscillator. mixer. limiting IF. quadrature detector. signal
strength meter drive. and data shaping amplifier.
The oscillator is a common base Colpitts type which
can be crystal controlled, as shown in Figure 1, or L-C
controlled as shown in the other figures. At higher VCC.
it has been operated as high as 200 MHz. A mixerl
oscillator voltage gain of 2 up to approximately 150
MHz. is readily achievable.\
The mixer functions well from an input signal of 10
",Vrms. below which the squelch is unpredictable. up
to about 10 mVrms. before any evidence of overload.
Operation up to 1.0 Vrms input is permitted. but nonlinearity of the meter output is incurred. and some oscillator pulling is suspected. The AM rejection above 10
mVrms is degraded.
The limiting IF is a high frequency type. capable of
being operated up to 50 MHz. It is expected to be used
at 10.7 MHz in most cases. due to the availability of
standard ceramic resonators. The quadrature detector
is internally coupled to the IF. and a 5.0 pF quadrature
capacitor is internally provided. The - 3dB limiting sensitivity of the IF itself is approximately 50 ",V (at Pin 7).
and the IF can accept signals up to 1.0 Vrms without
distortion or change of detector quiescent dc level.
The IF is unusual in that each of the last 5 stages of
the 6 state limiter contains a signal strength sensitive.
current sinking device. These are parallel connected and
buffered to produce a signal strength meter drive which
is fairly linearfor IF input signals of 10 ",V to 100 mVrms.
(See Figure 5.)
A simple squelch arrangement is provided whereby
the meter current flowing through the meter load resistance flips a comparator at about 0.8 Vdc above
ground. The signal strength at which this occurs can be
MOTOROLA LINEAR/INTERFACE DEVICES
8-31
II
MC3356
FIGURE 6 - APPUCATION WITH FIXED BIAS ON DATA SHAPER
Data Out
I
Car. Del. Out
+5.0 V
18 k
Filter
Input
MC33S6
RF
osc
ase
EM.
COL
RF
Vee
Mixer
Out
Quad
Bias
10
Bead
+5.0 to +12V
~0.1
82
II
APPLICATION NOTES
The MC3356 is a high frequency/high gain receiver
that requires following certain layout techniques in designing a stable circuit configuration. The objective is
to minimize or eliminate, if possible, any unwanted
feedback.
Pin 1 and then the input and the mixer/oscillator
grounds (or RF VCC bypasses) should be connected by
a low inductance path to Pin 19. IF and detector sections
should also have their bypasses returned by a separate
path to Pin 19. VCC and RF VCC can be decoupled to
minimize feedback, although the configuration of Figure
3 shows a successful implementation on a common 5.0
supply. Once again, the message is: define a supply
node and a ground node and return each section to
those nodes by separate, low impedance paths.
The test circuit of Figure 3 has a 3 db limiting level
of 30 f'oV which can be lowered 6 db by a 1:2 untuned
transformer at the input as shown in figures 6 and 7.
For applications that require additional sensitivity, an
RF amplifier can be added, but with no greater than 20
db gain. This will give a 2.0 to 2.5 f'oV sensitivity and any
additional gain will reduce receiver dynamic range without improving its sensitivity. Although the test circuit
operates at + 5.0 V, the mixer/oscillator optimum performance is at +8.0 V to 12 V. A minimum of +8.0 V
is recommended in high frequency applications (above
150 MHz), or in PLL applications where the oscillator
drives a prescaler.
Shielding, which includes the placement of input and
output components, is important in minimizing electrostatic or electromagnetic coupling. The MC3356 has its
pin connections such that the circuit designer can place
the critical input and output circuits on opposite ends
of the chip. Shielding is normally required for inductors
in tuned circuits.
The MC3356 has separate VCC's and grounds for the
RF and IF sections which allows good external circuit
isolation by minimizing common ground paths.
Note that the circuits of figures 1 and 3 have RF, oscillator, and IF circuits predominantly referenced to the
plus supply rails. Figure 6, on the other hand, shows a
suitable means of ground referencing. The two methods
produce identical results when carefully executed. It is
important to treat Pin 19 as a ground node for either
approach. The RF input should be "grounded" to
MOTOROLA LINEAR/INTERFACE DEVICES
8-32
MC3356
FIGURE 7 -
Data
APPLICATION WITH SELF-ADJUSTING BIAS ON DATA SHAPER
+5.0 V
Car. Det. Out
Out
OVor4.0V
130k
3.3k
15 k
Input
f = 10.7
MC3356
150 pF
APPLICATION NOTES (continued)
Depending on the external circuit, inverted or noninverted data is available at Pin 18. Inverted data makes
the higher frequency in the FSK signal a 'one' when the
local oscillator is above the incoming RF. Figure 6 schematic shows the comparator with hysteresis. In this circuit the dc reference voltage at Pin 17 is about the same
as the demodulated output voltage (Pin 13) when no
signal is present. This type circuit is preferred for systems where the data rates can drop to zero. Some systems have a low frequency limit on the data rate, such
as systems using the MC3850 ACIA that has a start or
stop bit. This defines the low frequency limit that can
appear in the data stream. Figure 6 circuit can then be
changed to a circuit configuration as shown in Figure
7. In Figure 7 the reference voltage for the comparator
is derived from the demodulator output through a low
pass circuit where T is much lower than the lowest frequency data rate. This and similar circuits will compensate for small tuning changes (or drift) in the quadrature
detector.
Squelch status (Pin 15) goes high (squelch off) when
the input signal becomes greater than some preset level
set by the resistance between Pin 14 and ground. Hysteresis is added to the circuit externally by the resistance
from Pin 14 to Pin 15.
MOTOROLA LINEAR/INTERFACE DEVICES
8-33
II
3:
ow
U1
FIGURE 8 - INTERNAL SCHEMATIC
.
J
J
ICP
1.0k~~
1.0 k
3
~
;.M1
:v~
~
20
1~
:.1
r~
0
-I
0
5.0 k
6~
1.0 k
~
z
5.0 k 330
5.0 k
330
20 pF ~
~
74
""
8N
6
m
1.0 k
-I
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
1.0 k
~1
1.0K
1.0 k
'"Tl
00
T
~
I
-Va2
@
1.0k
~
J6
r.o;
:t>
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17~20 21W~
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CJ
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91
16
11
---Z
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c
83
.,
10 k
94
00
93
92
84 87
:0
:0
"hf-'
tf.!l,-+-t:" ~
M
~2.0 k
2.0 k
~'~~
85
86
20k~
15
:t>
0/'
w
2.0 k
tJ ~"~
~
n ri
14
12
2.0 k
_~
~67 ~70
1
m
'"
r--... 73
69
11
r
5.0 k
.....
71"'-J
~
_too
10 k
20k
0
r
20 k
1.0 k
:0
:t>
5.0 k
en
13f4
15 16
5.0
pF
V25
~
~32
I~~
1.0
k
36
'.J~
3~,/1
~
50 k
\
1
en
J
50 k
r1 H' H 11 r.:r
3~
J.",,29
60
1.0 k
1.0 k
5~
135
58'-.j
135
57"-J
135
56'-.j
135
.,
55"-1
135
t-@
28
r27
..,
54 "'-l
135
10
k
10 k
10 k
10 k
53"'-l
Filter In
f--~""'"-t--<> Audio 0 ut
~0.01I'F
r
I
I
Lp= 1.0mH
Cp= 100pF
Rp: 100 k!.l
MOTOROLA LINEAR/INTERFACE DEVICES
8-36
dB
pF
MC3357
CIRCUIT DESCRIPTION
The MC3357 is a low power FM IF circuit designed
primarily for use in voice communication scanning
both internally directly, and externally through a quadrature coil, to detect the FM. The output at Pin 7 is also
used to supply dc feedback to Pin 5. The other side of
the first limiter stage is decoupled at Pin 6.
The recovered audio is partially filtered, then buffered
giving an impedance of around 400 n at Pin 9. The
Signal still requires de-emphasis, volume control and
further amplification before driving a loudspeaker.
A simple inverting op amp is provided with an output
at Pin 11 providing dc bias (externally) to the input at
Pin 10 which is referred internally to 2.0 V. A filter can
be made with external impedance elements to discriminate between frequencies. With an external AM detector the filtered audio Signal can be checked for the presence of noise above the normal audio band, or a tone
signal. This information is applied to Pin 12.
An external positive bias to Pin 12 sets up the squelch
trigger circuit such that Pin 13 is low at an impedance
level of around 60 kn, and the audio mute (Pin 14) is
open circuit. If Pin 12 is pulled down to 0.7 V by the
noise or tone detector, Pin 13 will rise to approximately
0.5 Vdc below supply where it can support a load current
of around 500 p.A and Pin 14 is internally short-circuited
to ground. There is 100 mV of hysteresis at Pin 12 to
prevent jitter. Audio muting is accomplished by connecting Pin 14 to a high-impedance ground-reference
point in the audio path between Pin 9 and the audio
amplifier.
receivers.
The mixer-oscillator combination converts the input
frequency (e.g., 10.7 MHz) down to 455 kHz, where, after
external bandpass filtering, most of the amplification
is done. The audio is recovered using a conventional
quadrature FM detector. The absence of an input signal
is indicated by the presence of noise above the desired
audio frequencies. This "noise band" is monitored by
an active filter and a detector. A squelch trigger circuit
indicates the presence of noise (or a tone) by an output
which can be used to control scanning. At the same
time, an internal switch is operated which can be used
to mute the audio.
The oscillator is an internally-biased Colpitts type with
the collector, base, and emitter connections at Pins 4,
1, and 2 respectively. A crystal can be used in place of
the usual coil.
The mixer is doubly-balanced to reduce spurious responses. The input impedance at Pin 16 is set by a 3.0
kn internal biasing resistor and has low capacitance,
allowing the circuit to be preceded by a crystal filter.
The collector output at Pin 3 must be de connected to
B +, below which it can swing 0.5 V.
After suitable bandpass filtering (ceramic or lC) the
signal goes to the input of a five-stage limiter at Pin 5.
The output of the limiter at Pin 7 drives a multiplier,
MOTOROLA LINEAR/INTERFACE DEVICES
8-37
II
3:
4
3
~
10 k
5k
~
s::
0
-i
;
25
""
!:
z
m
30 k
~4
k9
r.t
30k
5.0 k
15 k
»
:0
~
Z
-i
14
~8
12
22.
~
50.
Cl
13
10 k
15 k
220 k
17
30 k
lOOk
~
V16
20 k
t-r
~O
15.
»
....
50 k
50 k
~
0
r
Col
00
rx~
11~
9
~2
t-;
2CJ
J
:0
cp
20k
10
3.0 k
V8
t...
0
L
~Hl~~>)-
V'
to.
1
30k
10 k
470
f.i
50 k
15
?8
m
:0
"T1
[3-ni'
»
C'>
m
0
m
<
C'>
4W
10.
100 k
10 k
10 k
10.
10k
10 k
10 k
10 k
10 k
29 ..
30 ..
ri:3l31 ..
rd2
35
36
37~40
M~I
10 k
y~M
41
)
1
,,53
P
28
m
en
1-
de
42
50 k
J4
50.
to.
60
9
P-~
100 k
C2
6.2.
33 k
6
33 k
33 k
1=1r.IIRI=
~
_ CIRCLJlT
33 k
~r.:I·n:;:MATIC
10 k
10
k
g
c.n
120 k
'rr
5f
~
5~
7
"-,J
58~
59
@ MOTOROLA
MC3359
HIGH GAIN
LOW POWER
LOW POWER NARROWBAND FM IF
FM IF
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. includes oscillator, mixer, limiting amplifier, AFC, quadrature
discriminator, opiamp, squelch, scan control, and mute switch.
The MC3359 is designed to detect narrowband FM signals using
a 455 kHz ceramic filter for use in FM dual conversi08 communications equipment. The MC3359 is similar to the MC3357 except
that the MC3359 has an additional limiting IF stage, an AFC output,
and an opposite polarity Broadcast Detector. The MC3359 also
requires fewer external parts.
P SUFFIX
PLASTIC PACKAGE
CASE 707-02
• Low Drain Current: 3.6 mA (Typi «II VCC = 6.0 Vdc
DWSUFFIX,
PLASTIC PACKAGE
CASE 751D-03
SO-20L
• Excellent Sensitivity: Input Limiting Voltage - 3.0 dB = 2.0!"V (Typi
• Low Number of External Parts Required
FIGURE 2 - PIN CONNECTIONS AND
FUNCTIONAL BLOCK DIAGRAM
RF
crVSlal{ ,
0"
FIGURE 1 -
Input
II
G,d
2
TYPICAL APPLICATION IN A SCANNER RECEIVER
Limiter
Input
Decouplmg
6
Vee -- 60Vdc
Q.'Il F
DecQupllng L77J-~N":!'~-1
10.7 MHz
Input
Vee
~
6.0 Vdc
5"
15
Quadrature
11 Demod
Output
Input
Demodulator
Filter
10 Recovered
AudiO
CASE 707-02
Selin Control
MC3359
~,,,,----,S,,,q''''',,-Ch-,,,,,,P'''''
_ _ _ _ _r-~__ $ 50 ,
120
13
Output
~
NC-
~~47IlF -=~
•
20
1
c,Ystall
Ose.
Squelch
Sensitivity
lN4148
Input
,
r ----
Mixer
I
I
I Quad I
IL ____
Coil JI
Output
'"
10
Toka
limiter
Type
1~
RMC-2A6597HM
\
-=
"\il~
VCC
Recovered AudiO
u
:;>
Input
100 pF
I- NC
19
RF
Input
18
Gnd
17
Audio
Mute
16
Scan
Control
15
Squelch
Input
14 -
Decoupling
13
~ r~~~~
12
r
11
r- ~~~~~ered
Quadrature
Input
Demodulator
Filter
10
CASE 7510-03
MOTOROLA LINEAR/INTERFACE DEVICES
8-39
8~;;ut
Decoupling
g~~~~
.'
II
MC3359
MAXIMUM RATINGS (TA = 2S·C, unless otherwise noted)
Pin
Symbol
Value
Power Supply Voltage
4
Vcc(max)
12
Vdc
Operating Supply' Voltage Range
4
VCC
4to 9
Vdc
Input Voltage (VCC" 6.0 Volts)
18
V18
1.0
Vrms
Mute Function
16
V16
-0.7 to 12
Vpk
Junction Temperature
-
TJ
150
·C
Operating Ambient Temperature Range
-
TA
-30 to +70
·C
Storage Temperature Range
-
Tsta
-6Sto +150
·C
Rating
Unit
ELECTRICAL CHARA(fTERISTICS (VCC = 6.0 Vdc, fo = 10,7 MHz, M = ±3,O kHz, fmod = 1.0 kHz, SO!l source,
TA = 2S·C test circuit of Figure 3, unless otherwise noted)
Characteristics
Drain Current (Pins 4 and 8)
Min
Squelch Off
Squelch On
Typ
Max
Units
-
-
3,6
5,4
6.0
7,0
mA
Input for 20 dB Quieting
-
8,0
-
",Vrms
Input for - 3.0 dB Limiting
-
2,0
",Vrms
Mixer Voltage Gain (Pin 18 to Pin 3, Open)
-
46
-
Mixer Third Order Intercept. SO!l Input
-
-1,0
-
dBm
Mixer Input Resistance
-
3.6
k!l
Mixer Input Capacitance
-
2.2
-
450
700
-
mVrms
Recovered Audio, Pin 10
(Input Signal 1.0 mVrms)
pF
Detector Center Frequency Slope, Pin 10
-
0,3
-
V/kHz
AFC Center Slope, Pin II, Unloaded
-
12
-
V/kHz
Filter Gain (test circuit of Figure 3)
40
51
-
dB
Squelch Threshold, Through 10K to Pin 14
-
0,62
-
Vdc
Pin 14-High
-Low
2,0
0,01
2.4
1,0
",A
rnA
Pin 14- High
-Low
-
5.0
1.5
Scan Control Current, Pi" 15
Mute Switch Impedance
Pin 16 to Ground
FIGURE 3 -
10
-
TEST CIRCUIT
0,1 ~F
Input
10.7 MHz
17
Ceramic
Filter
2,4 k
Audio Gen.
16
muRata
0,7 Vp·p
CFU455D
or
15
Kvocera
KBF455p·20A
14
Squelch Input
'0 k
13
Op Amp Output
l,OM
'2
~
Op Amp Input
1.0 jJ.F
AFC Output
"
10
7,5 k
.J
Audio Output
0.002 jJ.F
MOTOROLA LINEAR/INTERFACE DEVICES
8-40
!l
M!l
MC3359
FIGURE 4 -
MIXER VOLTAGE GAIN
400
200
"'
E 100
1
VCC 1- 9 ~ji
INPUT /0 - 10.7 MHz
OUTPUT /0 ~ 455 kHz
OUTPUT TAKEN AT
PIN 3 WITH fiLTER
REMOVED IOPENI
-
/
V
.
~.~V
40
>-.
~
10
0.1
1.0
INPUT. 50 U [mVrm,[
10
tIINIITII~R
,/
1 I
-30
"
0_
40
-50
/
-60
-90
-80
V
-70
/ V
FIGURE 8 -
/
-20
,..-
1.0
-10
o
-
-10
10
RELATIVE MIXER GAIN
-6
-4
-2
2.0
RElATIVE fRE~UENCY [kHz[
":=
~ -20
II!
-40 ' - - -
6.0
8.0
10
OVERALL GAIN. NOISE. AND A.M. REJECTION
o=>
DERIVED USING
OPTIMUM UC
OSCILLATOR VALUES
AND HOLDING
If fREQUENCY AT
455 kHz
-20
~ -30
a::
111111111
I
1............... ++<.-['--
S+~
~-10
:5
4.0
10
III
-30 ,.--
E
/DETECTOR OUTPUT PIN 10
!--'"
-8
~
~
....-.
,/"
FIGURE 9 -
10
'"
_
V
,/
2.0
3RDI ORDER 1M PRODUCTS
-40
-30
INPUT. 50 U [dBm[
Af~ OUTP0T PIN 111
~
63.0
II
-50
-60
6.0 Vdc
~
~4.0
/
X
100
DETECTOR AND AFC RESPONSES
_5.0
/
DESIRED PRODUCTS//
>--
10
6.0
I
//
~
VCC
7.0
///
OUTPUT TAKEN AT
I--- PIN 3 WITH fiLTER
REMOVED
E
~-'O 1---. VCC - 6.0 Vdc
II
1.0
fREOUENCY [MHz[
8.0
/
10
I
- 3i B 1I1MI~
!OOf'V~lllill-n
-70
0.1
40
FIGURE 7 -
20
~
V
1111111
-60
-20
V
AVAILABLE ON
STANDARD DEVICE.
FIGURE 6 - MIXER THIRD ORDER
INTERMODULATION PERFORMANCE
~
.-'
1\
I-- TERMINALS NOT
f=
6.0
4.0
0.04
I'---
R~SpJNJE +AU~ ~N
f-
/ ILY
o
If OUTPUT
/
./
20
10
I-- A SPECIAL PROTOTYPE.
VCC - 4.0V=
::'
LIMITING I.F. FREQUENCY RESPONSE
II
-U-ll.
""
60
S1
FIGURE 5 -
I I ~~I~Hzl
~
-15°C!
- - - WC _
~
VCC - 6.0 Vdc
S+~
I I i~~IA~11
-40
N
-50
-60
0.1
11111
1.0
10
I
-60
100
0.001
0.01
fREQUENCY [MHz/
MOTOROLA LINEAR/INTERFACE DEVICES
8-41
0.1
1.0
INPUT [mVrms/
10
100
MC3359
FIGURE 11 - AUDIO OUTPUT AND TOTAL
CURRENT DRAIN versus SUPPLY VOLTAGE
FIGURE 10 - OUTPUT COMPONENTS OF
SIGNAL, NOISE, AND DISTORTION
+10
in
8.0
ISI1~1~IDI
11111
~
-10
I
I
7.0
II II
fa = 10.7 MHz
fm = 1kHz
I:'f = ±3.0kHz l
I TEST CIRCUIT OF
FIGURE 3.
I
'"
~
E.
i
i3
1
~
N+D
6.0
~
.'
. J
I
I'W
~ 2.0
I:
i
4.0
~ 3.0
11111
0
-60
--r::::=r---
5.0
~
z
-'
I
AUDIO OUTPUT
1111111
11C, MUTf ON
--- ---- ~
----
b---- I--
r-
-
0
-60
0,1
1.0
INPUT ImVrms
0.01
0.001
I II
10
o
0
4.0
100
8.0
6.0
7.0
VCC, SUPPLY VOLTAGE IVdcl
5.0
9
FIGURE 12 - UC OSCILLATOR, TEMPERATURE
AND POWER SUPPLY SENSITIVITY
~
10.704
"
10.702
i
ffi
10.698
1f
10.696
a=>
62
~
r--..." ~C
10.694
20
"'" ~
40
50
AMBIENT TEMPERATURE I'CI
30
L
300
0-~20
....... ~
I
~
60
"
UIIIII
10 K
30
1.0M
100 K
10M
w
I
0.8
C4
C5
•
THE OP AMP AS A BANDPASS FILTER
I
GIVEN/ o
Allo)
C--
~
rr-
'-'
1.0~
I
II
R3
R1
R2
0
Tr
I
I
I
III
jft'
OOOl~~~~
I I I I I
CENTER FREQUENCY
GAIN AT CENTER fREQUENCY
3~K
V,n
017
RI
~Tms 18K
60V
13
0OOl11-f 12
~1
•
-=- 750
10 C1
R3
Vre!
VOul
~
lA110l
R1R3
4QIRl
R3
---
is
'" 1"'-
0
0
5.0
I
"'-
1.0
70
<) 60
a
1
FOR OPEN lOQP GAIN
ANDPHASEISQLlDLINES)
1"0
WKE'
FIGURE 15 1
1
~
I-'--
~,oo
~~
I1111
1.0 K
150
FREOUENCY IHzl
.
C5 " "
13
USE CIRCUIT ABOVE
I
WITH CIRCUIT VALUES
10
70
60
12
Vref
"
III
i
CLRVES
OF, FIG~R~ 3,
UC OSCILLATOR RECOMMENDED
COMPONENT VALUES
1000
700
500
1
~OnED
_
0 - JCI
FIGURE 14 -
<3
~
0
~ 30
[-': ~
GAIN
180
0
O-:Q
t--
P~ASE ~
Z
10.692
;5
10K
~"
60
I'-.......
-..........
20
~
60
i'-.
TEMP
10.690
OP AMP GAIN AND PHASE RESPONSE
70
r-- .......... ~
10.700
>-
FIGURE 13 -
VCC, SUPPLY VOLTAGE IVdcl
60
61
59
58
10.706
,,;
10
20
30
OSCILLATOR FREOUENCY IMHzl
50
\
0.2
~
/'
1
7.0
\
70
100
2.0
MOTOROLA LINEAR/INTERFACE DEVICES
8-42
5.0
"-..
10
FREOUENCY IkHzl
20
50
100
~
ow
U1
CD
r----------------------------------(--------------------I
30.
120
1301 014
40,
,,
,,,
,
,
15
s:
,
0
-I
0
18
16
:Il
0
r
:t>
r
m
33'
:t>
~
061
014
Z
33k~ 33k
33k~ 33k
3.5k
15 k
:Il
::::
i
OSCILLATOR - MIXER
z
,
,
062 1
'0<
7k
OP AMP
'BROADCAST DETECTOR
-------------------------------------------~--------~--,
-I
m
I
LIMITING IF AMPLIFIER
:Il
"
:t>
DETECTOR AND AFC
I ,,
(")
m
0
m
11
<
(")
10k 10k
10 k
10 k
10k 10k
10k
10k
m
en
17
L _________________________________
6
, ___________________
~
FIGURE 16 -
II
CIRCUIT SCHEMATIC
,,
,,
,,,
,,
,,
,,
,
'
--~
MC3359
has an internal 1.8 k resistor. The IF has a 3 dB limiting sensitivity of approximately 100 p.Vat Pin 5 and a useful frequency
range of about 5 MHz as shown in Figure 5. The frequency
limitation is due to the high resistance values in the IF, which
were necessary to meet tht} low power requirement. The output of the limiter is internafiy connected to the quadrature detector, including the 10 pF quadrature capacitor. Only a parallel
UC is needed externally from Pin 8 to Vcc. A shunt resistance
Can be added to widen the peak separation of the quadrature
detector.
The detector output is, amplified and buffered to the audio
output, Pin 10, which has an output impedance of approxiPin 9 provides a high impedance (50 k) point in
matley 300
the output amplifier for application of a filter or de-emphasis
capacitor. Pin 11 is the AFC output, with high gain and high
output impedance (1 M). If not needed, it should be grounded,
or it can be connected to Pin 9 to double the recovered audio.
The detector and AFC responses are shown in Figure 7.
Overall performance of the MC3359 from mixer input to audiooutput is shown in Figure 9 and 10. The MC3359 can also
be operated in "single conversion" equipment; i.e., the mixer
can be used as a 455 kHz amplifier. The oscillator is disabled
by connecting Pin 1 to Pin 2. In this mode the overall performance is identical to the 10.7 MHz results of Figure 9.
A simple inverting op amp is provided with an output at Pin
13 providing dc bias (externally) to the input at Pin 12, which
is referred internally to 2.0 V. A filter can be made with external
impedance elements to discriminate between frequencies.
With an external AM detector, the filtered audio signal can be
checked for the presence of either noise above the normal
audio, or a tone signal.
The open loop response of this op amp is given in Figure
13. Bandpass filter design information is provided in Figure 15.
A low bias to Pin 14 sets up the squelch-trigger circuit such
that Pin 15 is high, a source of at least 2.0 mA, and the audio
mute (Pin 16) is open-circuit. If Pin 14 is raised to 0.7 V by the
noise or tone detector, Pin 15 becomes open circuit and Pin
16 is internally short circuited to ground. There is no hysteresis.
Audio muting is accomplished by connecting Pin 16 to a highimpedance ground-reference point in the audio path between
Pin 10 and the audio amplifier. No dc voltage is needed, in fact
it is not desirable because audio "thump" would result during
the 'muting function. Signal swing greater than 0.7 V below
ground on Pin 16 should be avoided.
CIRCUIT DI;SCRIPTION
'The MC3359 is a low-power FM IF circuit designed primarily
for use in voice~communieatiQn scanning receivers. It is also
finding a place in narrowband data links.
In the typical application (Figure 1), the mixer-oscillator combination converts the input frequency (10.7 MHz) down to 455
kHz, where, after external bandpass filtering, most qf the amplification is done. The audio is recovered using a conventional
quadrature FM detector. The absence of an input signal is indicated by the presence of noise above the desired audio frequencies. This "noise band" is monitored by' an active filter
and a detector. A squelch-trigger circuit indicates the presence
of noise (or a tone) by an output which can be used to control
scanning. At the same time, an internal switch is operated
which can be used to mute the audio.
n.
APPLICATION
The oscillator is an internally biased Colpitts type with the
collector, base, and emitter connections at Pin 4, 1, and 2, re-
spectively. The crystal is used in fundamental mode, calibrated
for parallel resonance at 32 pF load capacitance. In theory this
means that the two capacitors in series should be 32 pF, but
in fact much larger values do not significantly affect the oscillator frequency, and provide higher oscillator output.
The oScill'ator can also be used in the conventional LIC Colpitts configuration without loss of mixer conversion gain. This
oscillator is, of course, much more sensitive to voltage and
temperature as shown in Figure 12. Guidelines for choosing l
and C values are given in Figure 14.
The mixer is doubly balanced to reduce spurious responses.
The mixer measurements of Figure 4 and 6 were made using
an external 50 n source and the internal 1.8 k at Pin 3. Voltage
gain curves at several Vee voltages are shown in Figure 4. The
Third Order Intercept curves of Figure 6 are shown using the,
conventional dBm scales. Measured power gain (with the 50
input) is approximately 18 dB but the useful gain is much
higher because the mixer input impedance is over 3 kn. Most
applications will use a 330 n 10.7 MHz crystal filter ahead of
the mixer. For higher frequencies, the relative mixer gain is
given in Figure 8.
Following the mixer, a ceramic bandpass filter is recommended. The 455 kHi1vpes come in bandwidths from ± 2 kHz
to ± 15 kHz and have input and output impedances of 1.5 k to
2.0 k. For this reason, the Pin 5 input to the 6 stage limiting IF
n
II
MOTOROLA LINEAR/INTERFACE DEVICES
8-44
®
MC3~61
ItIIOTOROLA
,
Advance Information
LOW POWER
FMIF
LOW POWER NARROWBAND FM IF
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. includes Ocillator, Mixer, Limiting Amplifier, Quadrature Discriminator, Active Filter, Squelch, Scan Control, and Mute Switch.
The MC3361 is designed for use in FM dual conversion communications equipment.
-
• Operates From 1.B V to 7.0 V
• Low Drain Current 4.0 mA Typ @ VCC = 4.0 Vdc
• Excellent Sensitivity: Input Limiting Voltage -3.0 dB = 2.0 !LV Typ
1
P SUFFIX
PLASTIC PACKAGE
CASE 648-06
• Low Number of External Parts Required
,~
1
FIGURE 1 -
Mixer
Input
Gnd
D SUFFIX
PLASTIC PACKAGE
CASE 7519-03
SO-16
FUNCTIONAL BLOCK DIAGRAM
Mute
Scan Squelch Filter
Control
In
QutP"t
Filter Recovered
Input I Audio
I
PIN CONNECTIONS
RF
crvstalj 1
Osc·1
Input
Gnd
Mixer
Output
vee
1 Scan
Control
Limiter
Input
Decoupling
Crystal
Osc
Mixer
Qutput
VCC
Limiter Decoupl- Decoupl· Ouad
ing
Coil
Input ing
Limiter
Output
Quad
Input
This document contains Information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
8-45
9 Demodulator
Output
IJ
MC3361
MAXIMUM RATINGS (TA
= 25'C, unless otherwise noted)
Rating
Pin
Symbol
Value
Power Supply Voltage
4
Vcc(max)
8.0
Vdc
Operating Supply Voltage Range
4
VCC
1.8 to 7.0
Vdc
Unit
Detector Input Voltage
8
-
1.0
Vp-p
Input Voltage (VCC " 4.0 Volts)
16
V16
1.0
\(RMS
14
V14
-0.5 to 5.0
Vpk
TJ
150
'c
TA
-30to +70
'c
Tsta
-65 to + 150
'c
Mute Function
'"
Junction Temperature
Operating Ambient Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (VCC
-
= 4.0 Vdc, 10 = 10.7 MHz, dl = :!:3.0 kHz, Imod = 1.0 kHz, TA = 25'C
unless otherwise noted.)
Pin
Characteristic
Min
Typ
-
4
Drain Current
Squelch Off
Squelch On
-
4.0
6.0
16
-
2.0
Detector Output Voltage
9
-
Detector Output Impedance
-
-
9
-
,
Input Limitlhg Voltage
(- 3.0 dB Limiting)
Recovered Audio Output Voltage
(Vin = 10 mY)
Filter Gain (10 kHz)
(Vin = 5.0 mY)
Max
-
Unit
rnA
p.V
-
Vdc
400
100
150
-
mVrms
40
48
-
dB
-
Vdc
2.0
'.
n
Filter Output Voltage
11
-
1.5
Trigger Hysteresis
-
-
50
Mute Function Low
14
-
10
-
n
Mute Function High
14
-
10
-
Mn
Scan Function Low (Mute Off)
(V12 = 2.0 Vdc)
13
-
0.5
Vdc
Scan Function High (Mute On)
(V12 = Gnd)
13
3.0
-
-
Vdc
Mixer Conversion Gain
3
-
24
-
dB
Mixer Input Resistance
16
-
3.3
Mixer Input Capacitance
16
-
2.2
mV
-
Vcc
H'I----.-OMixer Input
FIGURE 2 - TEST CIRCUIT
10.7 MHz
1------0 Audio Mute
muRata
CFU455D2
1---0 Scan Control
1 - - - 0 SQ SW Input
~-"/ij.,-+-IE-o Filter Amp In
1.0 /,F
Quad Coil
Toko Type
0.1 p.F~
RMC-2A6597HM
MOTOROLA LINEAR/INTERFACE DEVICES
8-46
kfi
pF
@ MOTOROLA
MC3362
Advance Information
LOW POWER
DUAL CONVERSION
FM RECEIVER
LOW POWER NARROWBAND FM RECEIVER
· .. includes dual FM conversion with oscillators, mixers, quadrature detector, and meter drive/carrier detect circuitry. The
MC3362 also has buffered first and second local oscillator outputs
and a comparator circuit for FSK detection.
\
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Wide Input Bandwidth:
- 200 MHz using Internal local Oscillator
- 450 MHz using External local Oscillator
,,-
• Complete Dual Conversion Circuitry
• low Voltage: VCC = 2.0 to 7.0 Vdc
• low Drain Current (3.6 mA (Typ) (/ VCC
= 3.0 Vdc)
• Excellent Sensitivity: Input 0.7 /lV (Typ) for 12 dB SINAD
P SUFFIX
1
• Data Shaping Comparator
PLASTIC PACKAGE
CASE 724-02
• Received Signal Strength Indicator (RSSI) with 60 dB
Dynamic Range
• low Number of External Parts Required
24#'
• Manufactured in Motorola's MOSAIC Process Technology
DWSUFFIX
RF Input
to 200 MHz
FIGURE 1 -
PLASTIC PACKAGE
CASE 751 E-02
SO-24
TYPICAL APPLICATION IN A PLL FREQUENCY
SYNTHESIZED RECEIVER
FIGURE 2 - PIN CONNECTIONS AND
FuNCTIONAL BLOCK DIAGRAM
VCC
Detector
1st Mixer Input 1
0.41 ;'-40
-50
.......
./'
First Mixer Input
./'
./
-60
-70
-130 -120 -110 -100
/I'
FIGURE 8 -
A
~
A
:x.
--A
'0
Second Mixer Input...,/
~
;...-
~ -20
h
Z
",,1
-20
i/
/
!g -30
I
Desired Products/
-40
'/
-50
k""
l"::
4.0
VCC IV)
'7.0
8.0
. -r---
~
,
~
10 k
--
S+N3O%AM
"
N
DETECTO'R OUTPUT versus FREQUENCY
3.0
-\
-....
-
~
-;;, 2.0
\
:>
1.0
/
I
-70 -60 -50 -40 -30
RF INPUT Idam)
6.0
5.0
om+=t:+o.
FIGURE 9 -
""
"V
200
4.0
/ 3rd Order Intermod.
Prolducts I
1--""-
'/
-70
-80 ~
-100 -90 -80
""
'"'
:>
01
-70
-80
-130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30
RF INPUT IdBm)
40-30
I
I
4OO.s
.
S + N, N, AMR versus INPUT·
'" -50 MC3362[13 10 k
1ST MIXER 3RD ORDER INTERMODULAnoN
-10
3.0
2.0
+
~RF Input to Transformer
10
500
100
-60
60 -50
~
j)
Z -40
"r
h
~-
600
S+N
~ -30
L- V
20
-60
iii
>-
Recovered Audio ~ 300
0
-1 O~
........:::;/
90
80 -70
RF INPUT Idam)
I'
FIGURE 7 -
0
~-20
a:
- --,
4.0
3.0
./
700
~ 10 ~V) ....
~ ICC. Carr. DeI.1High IRFlin ~l~
J,?
4.0
E
r--
5.0
L
,...-
Icc,lcar;. Det l Low IRFlin
6.0
./
/
7.0
6.0
5.0
;'
MC3362
8.0
800
8.0
I
r-'~
;=:
A
DRAIN CURRENT, RECOVERED AUDIO versus SUPPLY
FIGURE 5 -
~4O
-20 -10
-30
-20
-10
0
--10
l--I-)
20
RELATIVE INPUT FREQUENCY IkHzl
MOTOROLA LINEAR/INTERFACE DEVICES
8-49
30
40
MC3362
CIRCUIT DESCRIPTION
Following the first mixer, a 10.7 MHz ceramic bandpass filter is recommended. The 10.7 MHz filtered signal is then fed into one second mixer input pin, the
other input pin being connected to Vcc.
The MC3362 is a complete FM narrowband receiver
from antenna input to audio preamp output. The low
voltage dual conversion design yields low power drain,
excellent sensitivity and good image rejection in narroWband voice and data link applications.
In the typical application (Figure 1), the first mixer
amplifies the signal and converts the RF input to 10.7
MHz. This' IF signal is filtered externally and fed into the
second mixer, whiCh furth~r amplifies the signal and
converts it to a 455 kHz IF signal. After external bandpass filtering, the low IF is fed into the limiting amplifier
and detection circuitry. The audio is recovered using a
conventional quadrature detector. Twice-IF filtering is
provided internally.
The input sigrifBl level is monitored by meter drive
circuitry which detects the amount of limiting in the
limiting amplifier. The voltage at the meter drive pin
determines the state of the carrier detect output, which
is active low.
The 455 kHz IF is typically filtered using a ceramic
bandpass filter then fed into the limiter input pin. The
limiter has 10 /LV sensitivity for -3.0 dB limiting, flat
to 1.0 MHz.
The output of the limite'r is internally connected to
the quadrature detector, including a quadrature
capacitor. A parallel LC tank is needed externally from
Pin 12 to Vcc. A 68 kG shunt resistance is included
which determines the peak separation of the quadrature detector; a smaller value will increase the spacing and linearity but decrease recovered audio and
sensitivity.
A data shaping circuit is available and can be coupled to the recovered audio output of Pin 13. The circuit is a comparator which is designed to detect zero
crossings of FSK modulation. Data rates of 2000 to
35000 baud are detectable using the circuit of Figure
1. Hysteresis is available by connecting a high-valued
resistor from Pin 15 to Pin 14. Values below 120 kG
are not recommended as the input signal cannot overcome the hysteresis.
The meter drive circuitry detects input signal level
by monitoring the limiting of the limiting amplifier
stages. Figure 4 shows the unloaded current at Pin 10
versus input pbwer. The meter drive current can be
used directly (RSSI) or can be used to trip the carrier
detect circuit at a specified input power. To do this,
pick an RF trip level in dBm. Read the corresponding
current from Figure 4 and pick a resistor such that:
APPLICATION
The first local oscillator can be run using a freerunning LC tank, as a VCO using PLL synthesis, or
driven from an external crystal oscillator. It has been
run to 190 MHz.* A buffered output is available at Pin
20. The second local oscillator is a common base Colpitts type which is typically run at 10.245 MHz under
crystal control. A buffered output is available at Pin
2. Pins 2 and 3 are interchangeable.
The mixers are doubly balanced to reduce spurious
responses. The first and second mixers have conversion gains of 18 dB and 22 dB (typical), respectively,
as seen in Figure 6. Mixer gain is stable with respect
to supply voltage. For both conversions, the mixer
impedances and pin layout are designed to allow the
user to employ low cost, readily available ceramic filters. Overall sensitivity and AM rejection are shown
in Figure 7. The input level for 20 dB (S+N)/N is 0.7
/L)/ using the two-pole post-detection filter pictured.
RlO = 0.64 Vdc / 110
Hysteresis is available by connecting a high-valued
resistor RH between Pins 10 and 11. The formula is:
Hyst.
=
VCC/(RH x 10 - 7) dB
*If the first local oscillator (Pins 21 and/or 22) is driven from
a strong external source (100 mVrms), the mixer can be
used to over 450 MHz.
MOTOROLA LINEAR/INTERFACE DEVICES
8-50
s:
(")
W
w
en
N
FIGURE 10 -
23·,
CIRCUIT SCHEMATIC
Vee
4
s:
0
-I
0
5
3
:Xl
0
r
~
»
r
2
bias
~
$$
~
$
i l ~ ...~
~
~
m
cp
"j
»
:Xl
10<>----1~----------1-~~
12
~
2
-I
m
:Xl
-n
»
(")
m
0
m
<
(")
m
en
13
~
l
8
II
VEE
\"
Me3363
MOTOROLA
,
I
Advance Information
LOW POWER
DUAL CONVERSION
FM RECEIVER
LOW POWER DUAL CONVERSION ,FM RECEIVER
The MC3363 is a single chip narrowband VHF FM radio receiver.
It is a dual conversion receiver with RF amplifier transistor, oscillators, mixers, quadrature detector, meter drive/carrier detect and
mute circuitry. The MC3363 also hasa buff~ed first local oscillator
output for use with frequency synthesizers, and a data slicing
'comparator for FSK detection.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Wide Input Bandwidth - 200 MHz Using Internal Local Oscillator
,
- 459 MHz Using External Local Oscillator
RF Amplifier Transistor
Muting Operational Amplifier
Complete Dual Conversion
Low Voltage: VCC = 2.0 V to 7.0 V
Low Draln Current: ICC = 3.6 mA (Typ) at VCC = 3.0 V,
Excluding RF Amplifier Transistor
• Excellent Sensitivity: Input 0.3,."V (Typ), for 12 dB SINAD
Using Internal RF Amplifier Transistor
•
•
•
•
•
DWSUFFIX
• Data Shaping Comparator
• Received Signal Strength Indicator (RSSI) with 60 dB
Dynamic Range
'PLASTIC PACKAGE
CASE 751 F-02
$0-28
• Low Number of External Parts Required
• Manufactured in Motorola's MOSAIC Process Technology
• See AN980 For A(lditional Design Information
FIGURE 1 - PIN CQNNECTIONS AND FUNCTIONAL
BLOCK DIAGRAM
1st Mixer Input 1
1st Mixer Input
27 Varicap Control
Emitter 3
2
1st LO Tank
1st LO Tank
Collector 4
2nd LO Emitter 5
1st LO Output
1St Mixer Output
2nd LO Base 6
2nd Mixer Output 7
2nd Mixer Input
21 2nd Mixer Input
Limiter Input
VEE
Limiter Decoupling 10
Mute Output
Limiter Decoupling 11
18 Comparator Output
Meter Drive (RSSI) 1
17 Comparator Input
Carrier Detect 1
Quadrature Coil
1
4
Recovered Audio
Mute 'Input
This document contains information on a new product. Specifications and information herein are
subject to ch,nge without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
8-52
MC3363
MAXIMUM RATINGS (TA = 25"C unless otherwise noted)
Pin
Symbol
Value
Unit
Power Supply Voltage
Rating
8
VCC(max)
8.0
Vdc
Operating Supply Voltage Range
(Recommended)
8
VCC
2.0 to 7.0
Vdc
1,28
VI-28
1.0
Vrms
Mute Output Voltage
19
V19
-0.7 to 8.0
Vpk
Junction Temperature
-
TJ
150
"C
TA
-40 to +85
"C
Tstg
-65to +150
"C
Input Voltage (VCC
=
5.0 Vdc)
Operating Ambient Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS (VCC = 5.0 Vdc, fo = 49.7 MHz, Deviation = ±3.0 kHz, TA = 25"C, Mod 1.0 kHz,
Test Circuit of Figure 2 unless otherwise noted)
Characteristic
Pin
1st Mixer Input Capacitance (Parallel -
/LVrms
1.0
-
/LVrms
690
-
Ohm
-
21
9
-
100
4
1.0
1.5
2.5
mAde
16
120
200
-
mVrms
-
2nd Mixer Conversion Voltage Gain (Avc2, Open Circuit)
-
2nd Mixer Input Sensitivity (20 dB SIN) (10.7 MHz i/p)
21
Limiter Input SenSitivity (20 dB SIN) (455 kHz i/p)
RF Transistor DC Current Drain
= 1.0 mY)
2.0
Unit
-
1st Mixer Conversion Voltage Gain (A vc l, Open Circuit)
Recovered Audio (RF Signal Level
mA
0.7
7.2
-
Cp)
8.0
-
-
Rp)
Max
4.5
1,28
-3.0 dB Limiting Sensitivity (RF Amplifier Not Used)
1st Mixer Input Resistance (Parallel -
Typ
1,28
8
20 dB SIN Sensitivity (RF Amplifier Not Used)
Min
-
Drain Current (Carrier Detect Low)
18
10
pF
dB
dB
/LVrms
/LVrms
THO of Recovered Audio (RF Signal
16
-
2%
Detector Output Impedance
16
-
400
Data (Comparator) Output Voltage - High
-Low
18
18
0.1
0.1
-
Data (Comparator) Threshold Voltage Difference
17
70
110
150
mV
Meter Drive Slope
12
70
100
135
nAidB
Carrier Detect Threshold (Below Vccl
12
0.53
0.64
0.17
Mute Output Impedance - High
-Low
19
19
Noise Output Level (RF Signal
= 0 mY)
= 1.0 mY)
16
MOTOROLA liNEAR/INTERFACE DEVICES
8-53
-
-
70
-
10
25
VCC
-
mVrms
%
Ohm
Vdc
Vdc
Vdc
Mohm
Ohm
II
II
s:
n
w
FIGURE 2 - TEST CIRCUIT
VCC
~
w
5.0 Vdc
gJ
1st Mixer Input
50 MHz 0_---4------1
CRF 1: muRata SFE 10.7 M
or Equivalent
CRF 2: muRata CFU 4550
or Equivalent
s:
Ll: Coilcraft UNll0/142 10% Turns
0
LC1: Toko RMC2A6597HM
-l
0
:0
0
r
From PLL Phase Detector
~
r
z
m
cp
~
~
:0
To PLL Phase Detector
::::
z
10.
-l
m
:0
"~
+
11O~F
1
-=
10 k
C")
m
0
r:-:----trn
<
l..I:rn
m
C")
0
0
, ,
Mute Output
Comparator Output
m
til
>I
Ii!!
10 k
5.0 k
'IN.
'No.
L~680~H
C
~
180 pF
Recovered Audio
Output
~~~~
-vv~r---------o Comparator Test Input
0.01
'-----<> Carrier Detect Output
0
L---------O
Mute Input
MC3363
CIRCUIT DESCRIPTION
The MC3363 is a complete FM narrowband receiver
from RF amplifier to audio preamp output. The low voltage dual conversion design yields low power drain,
excellent sensitivity and good image rejection in narrowband voice and data link applications.
In the typical application, the input RF signal is amplified by the RF transistor and then the first mixer amplifies the signal and converts the RF input to 10.7 MHz.
This IF signal is filtered externally and fed into the second mixer, which further amplifies the signal and converts it to a 455 kHz IF signal. After external bandpass
filtering, the low IF is fed into the Ilmiting amplifier and
detection circuitry. The audio is recovered using a conventional quadrature detector. Twice-IF filtering is provided internally.
The input signal level is monitored by meter drive
circuitry which detects the amount of limiting in the
limiting amplifier. The voltage at the meter drive pin
determines the state of the carrier detect output, which
is active low.
The output of the limiter is internally connected to
the quadrature detector, including a quadrature capacitor. A parallel lC tank is needed externally from Pin 14
to VCC. A 68 kOhm shunt resistance is included which
determines the peak separation ofthe quadrature detector; a smaller value will lower the Q and expand the
deviation range and linearity, but decrease recovered
audio and sensitivity.
A data shaping circuit is available and can be coupled
to the recovered audio output of Pin 16. The circuit is
a comparator which is designed to detect zero crossings
of FSK modulation. Data rates of 2000 to 35000 baud
are detectable using the comparator. Best sensitivity is
obtained when data rates are limited to 1200 baud maximum. Hysteresis is available by connecting a high-valued resistor from Pin 17 to Pin 18. Values below 120
kOhm are not recommended as the input signal cannot
overcome the hysteresis.
The meter drive circuitry detects input signal level by
monitoring the limiting of the limiting amplifier stages.
Figure 5 shows the unloaded current at Pin 12 versus
input power. The meter drive current can be used
directly (RSSI) or can be used to trip the carrier detect
circuit at a specified input power.
A muting op amp is provided and can be triggered
by the carrier detect output (Pin 13). This provides a
carrier level triggered squelch circuit which is activated
when the RF input at the desired input frequency falls
below a preset level. The level at which this occurs is
determined by the resistor placed between the meter
drive output (Pin 12) and VCC. Values between 80-130
kOhms are recommended. This type of squelch is pictured in Figures 3 and 4.
Hysteresis is available by connecting a high-valued
resistor Rh between Pins 12 and 13. The formula is:
APPLICATION
The first local oscillator is designed to serve as the
VCO in a Pll frequency synthesized receiver. The
MC3363 can operate together with the MC145166/7 to
provide a two-chip ten channel frequency synthesized
receiver in the 46/49 cordless telephone band. The
MC3363 can also be used with the MC14515X series of
CMOS Pll synthesizers and MC120XX series of ECl
prescalers in VHF frequency synthesized applications to
200 MHz.
For single channel applications the first local oscillator can be crystal controlled. The circuit of Figure 4
has been used successfully up to 60 MHz. For higher
frequencies an external oscillator signal can be injected
into Pins 25 and/or 26 - a level of approximately 100
mVrms is recommended. The first mixer's transfer characteristic is essentially flat to 450 MHz when this
approach is used (keeping a constant 10.7 MHz IF frequency). The second local oscillator is a Colpitts type
which is typically run at 10.245 MHz under crystal
control.
The mixers are doubly balanced to reduce spurious
responses. The first and second mixers have conversion
gains of 18 dB and 21 dB (typical), respectively. Mixer
gain is stable with respect to supply voltage. For both
conversions, the mixer impedances and pin layout are
designed to allow the user to employ low cost, readily
available ceramic filters.
Following the first mixer, a 10.7 MHz ceramic bandpass filter is recommended. The 10.7 MHz filtered signal
is then fed into the second mixer inpu~ Pin 21, the other
input Pin 22 being connected to VCC.
The 455 kHz IF is filtered by a ceramic narrow band-.
pass filter then fed into the limiter input Pin 9. The limiter
has 10 p.V sensitivity for -3.0 dB limiting, flat to 1.0
MHz.
Hyst = VCCI (Rh x 10 -7) dB
The meter drive can also be used directly to drive a
meter or to provide AGC. A current to voltage converter
or other linear buffer will be needed for this application.
A second possible application of the op amp would
be in a noise triggered squelch circuit, similar to that
used with the MC3357/MC3359/MC3361 FM 1.F.'s.ln this
case the op amp would serve as an active noise filter,
the output of which would be rectified and compared
to a reference on a squelch gate. The MC3363 does not
have a dedicated squelch gate, but the NPN RF input
stage or data shaping comparator might be used to
provide this function if available. The op amp is a basic
type with the inverting input and the output available.
This application frees the meter drive to allow it to be
used as a linear signal strength monitor.
The circuit of Figure 4 is a complete 50 MHz receiver
from antenna input to audio preamp output. It uses few
components and has good performance. The receiver
operates on a single' channel and has input sensitivity
of <0.3 p.V for 12 dB SINAD.
MOTOROLA LINEAR/INTERFACE DEVICES
8-55
E
II
os:
FIGURE 3 - TYPICAL APPUCATION 1N A PLL FREQUENCY SYNTHESIZED RECEIVER
Co)
VCC
~
~
5.0Vdc
CRF1: muRata SFE 10.7M
CRF2: muRata CFU 4550
LC1: Toko RMC2A6597HM
)f
is:
0
-I
RF Input
49.670 to
49.970 MHz
0.01
~I
~
0
:JJ
L._ _ _ _ _ _ _ _~~--....~ From PLL Phase Detector
0
-r
~
To
MC14516617
Dual PLL
Frequency
3.0 k Synthesizer
r
Z
m
00
cJ,
Ol
~
:JJ
CR1
10.245 M
+
:::::
z
-I
m
:JJ
10 k
"T1
-=
~
Q
_m
4im
0
m
..
VCC (Regulated)
Data Output
IPin 27
<
.
t
Pull-Up Resistor
3.3 k to 20 k
(")
m
en
Mute
Control
I
T
Cr
L
100 k
11 (
1.0 /LH
LC1
..
Recovered Audio
Output
I Pin 26
L
I
Pi ...
~
0.08 /LH
r
fosc: 200 MHz
Ipjn 24
L~680/LH
C
~
180 pF
Note: Pull Up resistor is
used to run the oscillator above 50 MHz.
s::
ow
FIGURE 4 - SINGLE CHANNEL CRYSTAL CONTROLLED FM RECEIVER
VCC
~
~
5.0 Vdc
Antenna
49.830 MHz
1.0 k
CRF1: muRata SFE 10.7M
CRF2: muRata CFU 4550
LC1: Toko RMC2A6597HM
20 k
1.2 J.'H
~
0
--i
0
::0
0
r
l>
r
L2
0.35 J.'H
I
2TII
300
1+
•
=
CR2 39.130 MHz
~
z
m
l>
c:p
01
......
::0
---Z
CR1
10.245 M
--i
m
::0
"'Tl
l>
10 k
()
m
0
m
4m
<
•
Data Output
•
Recovered Audio
Output
()
m
en
Mute
Control
100 k
L-J (
~
C10 1.0 J.'F
L~680J.'H
C
~
180 pF
II
II
:s:
o
~
FIGURE 5 - CIRCUIT SCHEMATIC
27
6
8
7
23
6~
5
s:
0
-I
0
::Il
0
rl
»
Bias
r
Z
m
cp
en
00
»
::Il
-Z
-I
m
120
4
,~
Bias
rr
I
13
15
14
19
3
::Il
"
»
(")
m
0
m
<
(")
m
en
11
17
10
18
20
1
®
MC3367
MOTOROLA
Prod uct Preview
LOW VOLTAGE
SINGLE CONVERSION
FM RECEIVER
LOW VOLTAGE FM NARROWBAND RECEIVER
· .. with single conversion circuitry including oscillator, mixer, IF
amplifiers, limiting IF circuitry, and quadrature discriminator. The
MC3367 is perfect for narrowband audio and data applications up
to 75 MHz which require extremely low power consumption. Battery powered applications down to VCC = 1.1 V are possible. The
MC3367 also includes an on-board voltage regulator, low battery
detection circuitry, a receiver enable allowing a power down
"sleep mode:' two undedicated buffer amplifiers to allow simultaneous audio and data reception, and a comparator for enhancing FSK (Frequency Shift Keyed) data reception.
• Low Supply Voltage: VCC
SILICON MONOLITHIC
INTEGRATED CIRCUIT
= 1.1 to 3.0 Vdc
• Low Power Consumption: PD = 1.5 to 5.0 mW
DWSUFFIX
• Input Bandwidth 75 MHz
• Excellent Sensitivity: Input Limiting Voltage (-3.0 dB)
= 0.2 !-'Vrms
-
PLASTIC PACKAGE
CASE 751F-02
50-28
• Voltage Regulator Available (Source Capability 3.0 mAl
• Receiver Enable to Allow Active/Standby Operation
• Low Battery Detection Circuitry
• Self Biasing Audio Buffer with Nominal Gain AV
=
PIN CONNECTIONS
4.0
• Data Buffer with Nominal Gain AV = 3.2
• Comparator with> 25 kHz (50 kbaud) Capability
• Standard 28-Lead Surface Mount (SOIC) Package
FIGURE 1 -
Mixer Dcpl.
Mixer Out
Mixer In
Osc. Dcpl.
Osc. Base
Osc. Emit.
Isrc Dcpl.
IF Gnd
VCC2
Rec. Audio
Quad Tank
Quad Tank
Demod. Gnd
Comparator I/P . .a.;...;_ _~
BLOCK DIAGRAM
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOR041- LINEAR/INTERFACE DEVICES
8-59
2nd IF Amp In
Data Buffer Out
Data Buffer In
1st IF Amp Out
VCC3
1st IF Amp In
Audio Buffer Out
Audio Buffer In
Low Battery Det.
1.2 V Select
VCC
Vreg
Receiver Enable
Comparator OIP
E
II
MC3367
ABSOLUTE MAXIMUM RATINGS (Voltages referred to Pin 12· TA
Parameter
~ 25°C)
Pin
Value
Supply Voltage
18
5.0
Units
Vdc
RF Input Signal
3
1.0
Vrms
Audio Buffer Input
21
1.0
Vrms
Data Buffer Input
26
1.0
Vrms
Comparator Input
14
1.0
Vrms
Junction Temperature
-
150
°c
Storage Temperature
-
-65to +150
°c
Devices should not be operated at or outside these values. The "Recommended Operating limits"
provide for actual device operation.
RECOMMENDED OPERATING CONDITIONS
Pin
Value
Units
Supply Voltage
18
1.1 to 3.0
Vdc
Receiver Enable Voltage
16
o or VCC
Vdc
1.2 V Select Voltage
19
VCC
Vdc
RF Input Signal
3
0.001 to 100
mVrms
RF Input Frequency
3
o to 75
MHz
Intermediate Frequency (IF)
-
455
kHz
Audio Buffer Input
21
mVrms
Parameter
Data Buffer Input
26
o to 75
o to 75
Comparator Input
14
10 to 300
mVrms
Ambient Temperature
-
o to 70
°c
mVrms
FIGURE 2 - TEST CIRCUIT
(All capacitors in ,uF unless otherwise stated. Resistors in ohms. Inductors in Henries.)
L 0.1~
RF
Input
45 MHz
7r
28*
27
~
2 p ~ 0.1
3
26
1.21" ~
0.7 I"
Ll
44.545 MHz
~
... ,
4
25
5
24
~
30p;:"
6
5 p:a::
FLl ~ FL2 ~
Taka LFC-455F/I
ar
muRa ta CFU 455D/E/F
T
9 p 1000p CYOFLl
>---l~
0.1
1
2
330
:a::
0.1
~
23
.".
0.1~
Cp
~
180 P
~---
56 k*
=.r
1.0~
=
1*]1
22
8
21
9
20
10
19
11
18
12
17
$0.1
T~~RMC
2A 6597HM
7
100 k
~
~1.0
.".
~
13
14
16
15 ~
MOTOROLA LINEAR/INTERFACE DEVICES
8-60
100 k
Vec
MC3367
ELECTRICAL CHARACTERISTICS (VCC = 1.3 V, fo = 45 MHz, fmod = 1.0 kHz, Deviation = 3.0 kHz, TA = 25'C,
Test Circuit of Figure 2 unless otherwise noted)
I
Characteristic
Pin
I
Min
Typ
Max
Units
-
1.4
0.5
3.0
mA
p.A
10
-
OVERALL MC3367 PERFORMANCE
= VCC
= 0 Vdc
Recovered Audio (RF Input = 10 mY)
Noise Output (RF Input = 0 mY)
10
-
Input for - 3.0 dB Limiting
3
-
Drain Current -
Pill 15
Pin 15
-
13
-
mVrms
4.5
-
mVrms
0.2
-
p.Vrms
MIXER
Mixer Input Resistance (Rp)
Mixer Input Capacitance (Cp)
FIRST IF AMPLIFIER
I First IF Amp Voltage Gain
25
dB
AUDIO BUFFER
Voltage Gain
-
-
4.0
-
Input Resistance
21
-
125
Maximum Input for Undistorted Output
21
-
70
Maximum Output Swing
22
-
800
Output Resistance
22
-
680
-
Voltage Gain
26
Maximum Input for Undistorted Output
26
Maximum Output Swing
27
Output Resistance
27
-
3.2
Input Resistance
VN
kO
mVrms
mVpp
0
DATA BUFFER
mVrms
1.5
-
7.0
-,
mVrms
8.0
70
600
COMPARATOR
Minimum Input for Triggering
14
Maximum Input Frequency (RL
Rise Time (10-90%; RL
Fall Time (90-10%; RL
=
100 kO)
= 100 kO)
= 100 kO)
14
15
15
-
LOW BATTERY DETECTOR
Low Battery Trip Point
Low Battery Output - VCC
-VCC
=
=
0.9 V
1.3V
VOLTAGE REGULATOR
Regulated Output (see Figure 6)
Source Capability
MOTOROLA LINEAR/INTERFACE DEVICES
8-61
25
5.0
0.4
-
VN
MO
mVpp
kO
kHZ
p.s
p.s
II
MC3367
RECOVERED AUDIO versus SUPPLY
FIGURE 3 -
80
1400
~1.0~
60
V22
50
1000
If
1
~
I
II
800
600
30
20
400
Vg
10
200
o
o
0.5
1.0
1.5
FIGURE 5 -
2.0
Vee IVI
2.5
3.0
3.5
o
o
4.0
1000
+20
900
-10
-20
-30
-40
-50
-60
:>
5
~
>
R
~e"
6
27
0.1 R=56k!l
N
- 70 130
22
120
110
100
90
80
3.5
4.0
VREG versus SUPPLY
~
500
_RL
7330
RL
~ 990
400
200
e=1000pF
e~ Output
3.0
600
300
~
2.5
I
700 RL =
r--,.
2.0
VeelVI
I
800
S+N
0::::-
1.5
1.0
FIGURE 6 -
+30
0
0.5
S +N, N versus INPUT
+10
II
v
1200
22
40
DRAIN versus SUPPLY
1600
~
70
~
FIGURE 4 -
100
70.
60
50
40
30
o0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VeelVI
CIRCUIT DESCRIPTION
APPLICATION
The MC3367 is an FM narrowband receiver capable
of operation to 75 MHz. The low voltage design yields
low power drain and excellent sensitivity in narrowband
voice and data link applications. In the typical application the mixer amplifies the incoming RF or IF signal
and converts the RF or IF frequency to 455 kHz. This
signal is then filtered by a 455 ceramic filter and applied
to the first intermediate frequency (IF) amplifier input.
This amplifier amplifies the 455 kHz IF before it is filtered
by a second ceramic filter. The modulated IF signal is
then applied to the limiting IF amplifier and detector
circuitry. Audio is recovered by a conventional quadrature detector.
Features available include buffers for audio/data
amplification and active filtering, on board voltage regulator, low battery detection circuitry with programmable level, and receiver disable circuitry. The MC3.~67
is an FM utility receiver to be used for voice and/or
narrowband data reception, especially suitable where
eldremely low power consumption and high design
flexibility are required.
The MC3367 can be used as a high performance FM
IF for use in low power dual conversion receivers.
Because of the MC3367's extremely good sensitivity
(0.6 p.V for 20 dB (S + N)/N, see Figure 5), it can also
be used as a stand alone single conversion narrOWband receiver to 75 MHz for applications not sensitive
to image frequency interference.
The oscillator is a Colpitts type which can be run as
an LC oscillator or under crystal control. The crystal
in Figure 2 is a 3rd overtone series mode type, and
the 1.2 p.H coil (L 1) and 1.0 ko' resistor are needed to
ensure proper operation. For fundamental mode crystals, the inductor L 1 can be omitted.
The best adjacent channel and sensitivity response
occur when two 455 kHz ceramic filters are used, as
shown in Figure 2. Either can be niplaced by a 0.1 p.F
coupling capacitor to reduce cost, but some degradation in sensitivity and/or stability is suspected.
The detector is a quadrature type, with the connection from the limiter output to the detector input provided internally as with the MC3359 and the MC3361.
MOTOROLA LINEAR/INTERFACE DEVICES
8-62
s:
(')
w
w
0')
....,.
FIGURE 7 -
2
:5:'
khlLuru I ti"
11
0
12
0
9
\~kfldJ mI
~,
0
:::c
CIRCUIT SCHEMATIC
3
1.~
4
0
>,
r-
6
Z
m
eo
0,
to>
l-
~
Z
-I
m
:::c
"fi
m
0
m
<
n
m
7
':~~
180
I:~~~~~~A
91
-
~
100
1
kl
~
~ I
8.0 k!
I
8.0 k
t 3;-\ I
C/I,
91 k*
1_19
~J~'
II I IIf
20 16
14
II
15
26
27
21
22
l10k
t,;10
10k
MC3367
A 455 kHz LC tank circuit must be provided externally.
One of the tank pins (Pin 11) must be decoupled using
a 0.1 JLF capacitor. The 56 kG damping resistor shown
in Figure 2 determines the peak separation (and thus
the detector bandwidth) of the detector. Smaller values will increase the separation and bandwidth but
decrease recovered audio and sensitivity.
The data buffer is a non-inverting amplifier with a
nominal voltage gain of 3.2 VN. This buffer needs its
dc bias (approx. 250 mV) provided externally or else
debiasing will occur. A single-pole RC filter as shown
in Figure 5 connecting the recovered audio output to
the data buffer input provides the necessary dc bias and
some post-detection filtering. The buffer can also be
used as an active filter.
The audio buffer is a non-inverting amplifier with a
nominal voltage gain of 4.0 VN. This buffer is selfbiasing so its input should be ac coupled. The two
buffers, when used as active filters, can be used
together to allow simultaneous audio and very lowspeed data reception. Another possible configuration
is to receive audio only and include a noise-triggered
squelch.
The comparator is a non-inverting type with an open
collector output. Typically the pull-up resistor used
between Pin 15 and VCC is 100 kG. With RL = 100 kG
the comparator is capable of operation up to 25 kHz.
This circuit is self-biasing, so its input should be ac
coupled.
The regulator is a 0.95 V reference capable of sourcing
3.0 mAo This pin (Pin 17) needs to be decoupled using
a 1.0-10 JLF capacitor to maintain stability of the
MC3367.
All three VCC's on the MC3367 (VCC, VCC2, VCC3) run
on the same supply voltage. VCC is typically decoupled
using capacitors only. VCC2 and VCC3 should be
bypassed using the RC bypasses shown in Figure 2.
Eliminating the resistors on the VCC2 and VCC3
bypasses may be possible in some applications, but a
reduction in sensitivity and quieting will likely occur.
The low battery detection circuit gives an NPN open
collector output at Pin 20 which drops low when the
MC3367 supply voltage drops below 1.1 V. Typically it
would be pulled up via a 100 kG resistor to supply.
The 1.2 V Select pin, when connected to the MC3367
supply, programs the low battery detector to trip at VCC
< 1.1 V. Leaving this pin open raises the trip voltage on
the low battery detector.
Pin 16 is a receiver enable, which is connected to VCC
for normal operation. Connecting this pin to ground
shuts off receiver and reduces current drain to ICC <
0.5 !LA.
II
MOTOROLA LINEAR/INTERFACE DEVICES
8-64
®
MC13055
MOTOROI.A
WIDEBAND FSK RECEIVER
WIDEBAND
FSK
RECEIVER
The MC13055 is intended for RF data link systems using carrier
frequencies up to 40 MHz and FSK (frequency shift keying) data
rates up to 2.0M Baud (1.0 MHz). This design is similar to the
MC3356, except that it does not include the oscillator/mixer. The
IF bandwidth has been increased and the detector output has been
revised to a balanced configuration. The received signal strength
metering circuit has been retained, as has the versatile data slicerl
comparator.
MONOLITHIC SILICON
INTEGRATED CIRCUIT
• Input Sensitivity 20 !LV (cL 40 MHz
• Signal Strength Indicator Linear Over 3 Decades
,,--~.
• Available in Surface Mount Package
• Easy Application, Few Peripheral Components
PLASTIC PACKAGE
CASE 648-06
II
D SUFFIX
PLASTIC PACKAGE
CASE 751 B-03
SO-16
FIGURE 1 -
Vee
BLOCK DIAGRAM AND APPLICATION CIRCUIT
0.01
16
Data
Output
15
14
40 MHz
IF
"--If--..-I
13
100 pF
Comparator
Ground
12
Squelch
Adjust
(meter)
Comparator
Vee
IF Ground
IF
Vee
Limiter Input
Limiter Bias
Limiter Bias
3.9 k
Quad Bias
L2
MOTOROLA LINEAR/INTERFACE DEVICES
8-65
11 Detector Out
MC13055
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC(max)
15
Vdc
V2,V4
3.0 to 12
Vdc
Junction Temperature
TJ
150
"C
Operating Ambient Temperature Range
TA
-40 to +85
"C
TstQ
-65 to + 150
"C
PD
1.25
W
Power Supply Voltage
Operating Supply Voltage Range
. Storage Temperature Range
Power Dissipation, Package Rating
ELECTRICAL CHARACTERISTICS
(VCC
~
5.0 Vdc, fa
~
~
40 MHz, fmod
1.0 MHz, j.f
~
± 1.0 MHz, TA ~ 25"C, Test circuit of Figure 2)
Typ
Max
Unit
12 + 14
-
20
25
mA
Data Comparator Pull-Down Current
116
-
10
-
mA
Meter Drive Slope versus Input
112
4.5
7.0
9.0
/LA/dB
Carrier Detect Pull-Down Current
113
-
1.3
-
mA
Carrier Detect flu'll-Up Current
113
-
500
-
/LA
Carrier Detect Threshold Voltage
V12
700
800
900
mV
Characteristics
Measure
Total Drain Current
DC Output Currerit
Recovered Signal
Sensitivity for 20 dB S + NIN, BW
S+N/N at Vin
Input
•
~
~
110,111
-
430
-
/LA
Vl0 - Vl1
-
350
-
mVrms
VIN
-
20
-
/LVrms
30
-
dB
4.2
4.5
-
kll
pF
5.0 MHz
Vl0 - Vll
50/LV
Impedance~'
Min
40 MHz
Quadrature Coil Loading
Rin
Cin
Pin 5, Ground
Rin
Pin 9 to 8
-
-
Cin
FIGURE 2 -
kll
pF
Coils - Shielded
Coilcralt UNI-l0/142
L1 Gray 8-1/2 Turns, nominal 300 /LH
L2 Black 10-1/2 Turns, nominal 380 /LH
100 pF
or
TOKO Series E526HNA
L1 Part No. 100301
Carrier
1-<>-+---1----0 Detect Output L2 Part No. 100079
22 pF
Input o----j I-'---....--i-'+---<>-i
\-<>-+---1--0 Meter Drive
Detector
1-<>-...........-1----0 Output
3.9 k
39 pF
r
-
-
TEST CIRCUIT
VCCo-~~------4-~
I
7.6
5.2
-
-T2--i
I
L _____ .,J
MOTOROLA LINEAR/INTERFACE DEVICES
8-66
MC13055
All curves taken with test conditions of ELECTRICAL CHARACTERISTICS, unless otherwise noted
FIGURE 3 -
FIGURE 4 -
OVERALL GAIN. NOISE. AM REJECTION
- ,---_.
METER CURRENT versus SIGNAL
_.
Output fmod ~ 1.0 MHz
af ~ 1.0 MHz
+--+--1
600
VCC~~
,/
~
V/
12 V
1500
~ 400
/h
/, V
6Y
a
300
w
'"
ti:i
/-.....
\. IJ'--...
-60-·-100
FIGURE 5 -
-20 r--- I- 51
-50
'"'zEO
-60
"=>
>-
;;:
;;;
MC13055
-90
-100
10
20
FIGURE 7 -
I:2.-50
~
~-70
EO
"
~-80
30
40
50
60
70
INPUT FREQUENCY (MHzl
i
.....- V
500
§ 400
u
~
80
90
Quadrature
r-
./
/
°0~~~~-~3~0-~40~~50r-~6~0-~7~0-~80~~-~
100
FIGURE 8 - DETECTOR CURRENT AND POWER SUPPLY
CURRENT versus SUPPLY VOLTAGE
1200
'"'
39.8 ~
39.7 ~
!""-
39.68
39.5 ~
:::>
39.4 0
39.3
\/
limiting
~
I-
+
C)
39.2
I
11
13
.....V
f
f.-- 1-"110 + 111
--
~r:14
o
/
MOTOROLA LINEAR/INTERFACE DEVICES
+
.....3
2
1
11
VCC (Vdc)
8-67
- --
V
o
15
J.- l-
-
1
I
7
9
VCC (Vdcl
60
40.2
40.1
1000
40.0 ~
39.9 ~ ;:: 800
-
Sensitivity
1--1---'''"!-<=--+'=>O'~--_f>'_r--''1I'-...=+-=''''I_'''''''c1
INPUT FREQUENCY (MHzl
Coil Tuning
40 MHz
E
300r---;-___c
" 200
;;;
-90
UNTUNED INPUT: METER CURRENT
versus FREQUENCY
_ 600
LIMITING SENSITIVITY AND DETUNING
versus SUPPLY
~
:;:
~-60
-20
-60
40
INPUT SIGNAL (dBml
"1
4OJ
-40
- 80
FIGURE 6 -
2~ k
-- - --
V-
I -, /
o
8
I-0.l~
-70
-80
I9
7
> -30 I - - I:;:
>= -40 r---
I
5
>-
~
o
-100
800.--,--,--,--,--,--_-,,--r---,--,
0.\
-10 I--Inputo-)
U5
h
.b
100
'V
20
//
-
200
UNTUNED INPUT: LIMITING SENSITIVITY
versus FREQUENCY
I
j
/
-60
-40
SIGNAL INPUT (dBml
80
"
13
0
15
MC13055
FIGURE 9 -
FIGURE 10 - CARRIER DETECT THRESHOLD
versus TEMPERATURE
RECOVERED AUDIO versus TEMPERATURE
1000
......
.0
~
.0
0
~
.01-_
900
-- --
f-
.... r--..
r-........
0
.0
.0
0
0
0
..............
"'"
....
....-;:::;
2
-~
-~
W
~
~
M
AMBIENT TEMPERATURE 1°C}
-W
FIGURE 11 -
~
~
~
V
"..-
§ 300
u
~
II
I-"""
'" 200
V
~
----
---
--
-20
~~
-30
r--..
-fO
-50
60
0
W
~
~
M
AMBIENT TEMPERATURE 1°C}
100
1~
lW
INPUT LIMITING versus TEMPERATURE
~
E -60
~ I'~,
...........
r-- ........
.........
~
'" -70
m
,
1'-. ',
"
,~,
r--~ ....
..... ..... :'~
'"Ez
~ -80
........
100
;.:
....
120
...... r--.
--V
cO:>
........ ........
1--1"-
......
...v
-90
-60
140
-40
-20
o
W
~
~
M
AMBIENT TEMPERATURE 1°C}
~
lW
~
t
!
l
Jr~~~~68~~
3.9
1.0k
-W
FIGURE 12 -
~
20
40
60
80
AMBIENT TEMPERATURE 1°C}
-20
-~
-50
100
-60 -40
-~
Inputl~
j
500 --10~
i!1' 400
500
~
lW
METER CURRENT versus TEMPERATURE
600
1
100
39 ~\ •
k ____
5.0 k
'"O~~t--o
~~';;~~~rA~~i~:t
~!e3t,J l,\ t,) @~ ~ 0'.':'.
39PFl~
10-1I2T
~
Carrier
0
~~~~~j~~~iliI.o~o
~l'Ok' Detect
o1(i{<>
I
"tV
'OrlE-fo
'''Il-~:~\~
T
!.25 inch
\o.o?]
<>f{fE-"
0.Q1 ~k'
-'.
0
Vcr
~. Ic{I,~i22PF
401npMuHtZCJ~
FIGURE 13 - APPLICATION PRINTED CIRCUIT BOARD
(Bottom View, Circuit of Figure 11
IBNC}
MOTOROLA LINEAR/INTERFACE DEVICES
8-68
s:(")
.....
W
o
FIGURE 14 -
~ ~i
~ ~ ~~"
n~
'"'"
~K
J
74
89
I
n
69
0
-I
H:::67
0
"~rl~
:JJ
0
r
»
r
>---013
~70
I
83
84
r
M
a,
«>
~.
~r
1
9
4
---Z
65
:JJ
."
»
()
<
50--6
7
?8
~
46
-I
()
14
15
m
m
0
m
90"--L
/"
~
87
8
m
;;1
93 M
92
91
Z
CO
'
~.---l
76
~
s::
U'I
U'I
INTERNAL SCHEMATIC
L
25
~~~~~~~~lt,sr
V26'
~~~~
26
m
(f)
5~
M"1"1''1M ~
'-i58
,.x1
"-157
,-¥'
"'" 56
.K'
" 55
~
3
II
" 54
~
~2
,-""
36
~
37
38
10
27
3~
29
28
~
,.Y'
11
48
4
51
"""
~r""50
49
MC13055
is fairly linear for IF input signals of 20 /LV to'20 mVrms.
(See Figure 4.)
A simple squelch arra~gement is provided whereby
the meter current flowing through the meter load resistance flips a comparator at about O.B Vdc above ground.
The Signal strength at which this occurs can be adjusted
by changing the meter load resistor. The comparator( +)
input and output are available to permit control of hysteresis. Good positive action can be obtained for IF input
signals of above 20 /LVrms. A resistor R from Pin 13 to
Pin 12 will provide VCC/R of feedback current. This current can be correlated to an amount of signal strength
hysteresis by using Figure 4.
The squelch is internally connected to the data shapero
Squelch causes the data shaper to produce a high (VCC)
output.
The data shaper is a complete "floating" comparator,
with diodes across its inputs. The outputs of the quadrature detector can be fed directly to either or preferably
both inputs of the comparator to produce a squared
output swinging from VCC to ground in inverted or noninverted form.
GENERAL, DESCRIPTION
The MC13055 is an extended frequency range FM IF,
quadrature detector, signal strength detector and data
shapero It is intended primarily for FSK data systems.
The design is very similar to MC3356 except that the
oscillator/mixer has been rElmoved, and the frequency
capability of the IF has been raised about 2: 1. The detector output configuration has been changed to a balanced, open-collector type to permit symmetrical drive
of the data shaper (comparator). Meter'drive and
squelch features have been retained.
The limiting tF is a high frequency type, capable of
being operated up to 100 MHz. It is expected to be used
at 40 MHz in most cases. The quadrature detector is
internally coupled to the IF, and a 2.0 pF quadrature
capacitor is internally provided. The 20 dB quieting sensitivity is approximately 20 /LV, tuned input,lmcj, the IF
can accept signals up to 220 mVrms without distortion
or change of detector quiescent dc level.
The If is unusual in that each of the last 5 stages of
the 6 stage limiter contains a signal strength sensitive,
current sinking device. These are parallel connected and
buffered to produce a signal strength meter drive which
II
MOTOROLA LINEAR/INTERFACE DEVICES
8-70
In Brief ...
Selector Guide
Entertainment Radio Receiver
Circuits. . . . . . . . . . . . . . . . . . . . . . . .. 9·2
Video Circuits .................... 9·3
Remote Control Circuits. . . . . . . . . .. 9·5
... reflecting Motorola's continuing commitment to
semiconductor products necessary for consumer system designs. This tabulation is arranged to simplify firs!:
order selection of consumer integrated circuit devices
that satisfy the primary functions for home entertainment products, including Television, Hi-Fi Audio and
AM/FM Radio.
Alphanumeric Index. . . . . . . . . . . . . . . .. 9·6
Related Application Notes. . . . . . . . . .. 9·6
Data Sheets ........................ 9·7
Consumer
Electronic Circuits
,
/
J
9-1
Consumer Electronic Circuits
Entertainment Radio Receiver Circuits
C·OUAM® AM Stereo Decoders . . .
FM Stereo Decoder . . . . . . . . . . .
Audio Amplifiers. . . . . . . . . . . . . .
Audio Attenuators/Controls. . . . . . .
Video Circuits
Modulators . . . . . . . . . . . . . . . . .
Demodulators . . . . . . . . . . . . . . .
.
.
.
.
.
.
.
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.
.
.
.
.
.
.
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.
.
.
.
.
.
.
.
.
.
Tuning System Circuits
Deflection. . . . . . . . .
Sound. . . . . . . . . . .
Transistor Arrays . . . .
Television Subsystems
Video IF Amplifiers. . .
Remote Control Circuits.
.
9·2
. .. 9·2
. .. 9·2
. .. 9·2
. . . . . . . . . .. 9·3
. . . . . . . . . .. 9·3
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. . .. 9·4
. . .. 9·4
9·4
. . .. 9·4
. . .. 9·4
. . .. 9·4
. . .. 9·5
Entertainment Radio Receiver Circuits
C-QUAM® AM Stereo Decoders
Function
Basic AM Stereo Decoder
Features
Monaural/Stereo AM Detector, Indicator, 6-10 V Operation
Suffix/Case
Device
P1738
MC13020
Advanced AM Stereo Decoder
Medium Voltage 2-8 V, Decoder and IF Amp
DW/751F
MC13022
AM Front End
Tuning Stabilizer for MC13022
P/738
MC13023
AM Stereo Personal Radio
Complete Low Voltage AM Stereo Receiver
Pn24
MC13024
Tuning Stabilizer
Companion for MC13020 for Manual Tuned Receivers
P/648
MC13021
AM Broadcast Receiver
AM Receiver Subsystem -
P1738
MC13041
Ideal Companion for MC13020
FM Stereo Decoder
Function
Channel
Separation
dBTyp
THD
%Typ
Stereollndicator
Lamp Driver
mAMax
62
0.1
100
Po
@ rated
Watts
Vcc
Vdc Max
1.0W
400 mW
FM Multiplex Stereo Decoder
Features
Low Signal Blend
for Noise Reduction
Suffix/Case
Device
-/648
TCA4500A
AUd"10 Ampil
rflers
Vin
Function
Mini Watt SOIC Audio Amp
Low Power Audio Amp
Po
mVTyp
ID
mATyp
RL
Ohms
Suffix/Case
Type
35
80
11
16
0/751
MC13060
16
-
2.5 mA
8-100
0/751
P/626
MC34119
Audio Attenuators/Controls
VCC
Range
Vdc
THD
%
Tone
Control
Range
dBTyp
Stereo, Volume, Bass, Treble, Balance
8.5-18
0.1 Typ
Stereo, Volume, Bass, Treble, Balance
3-18
0.5 Max
Function
Attenuation
Range
dB Typ
Suffix/Case
Device
±14
80
P1707
TCA5550
±15
80
P1707
TDA1524
MOTOROLA LINEAR/INTERFACE DEVICES
9·2
C-QUAM® A.M. Stereo Broadcast Receiver
C·QUAMA.M.
STEREO DECODER
MC13020
A.M. RECEIVER
SYSTEM
MCl3041
RF
MPF102
J·FET
AGC
STEREO TONE
CONTROL
TDA1524
TCA5550
STOP
SCAN
SYNTHESIZED
TUNING
SUBSYSTEM
MCl45156·1 PLL FREQ. SYN.
MCl46605 CMOS MCU
Based on the field·proven C-Quam performance,
Motorola has developed a low-cost, high performance
C-Quam AM Stereo Decoder chip, with fully compati·
ble, no-compromise mono performance, as the basis
for both broadcast and receiving equipment. Additional
IC components from Motorola's inventory offer a single
supply source for state-of-the-art radio receiver
designs. New products cover virtually every type of
receiver - home, auto, and personal portable.
When AM stereo broadcasting was sanctioned by the
F.C.C. in 1982, there were five different systems vying for
user approval. Since then C-QUAM® has become the
defacto standard in the U.S.A., as the market and broad·
casters recognize its performance advantages. It is the
legal standard in Canada, Australia and Brazil where A.M.
is the dominant radio medium. C-QUAM is available from
nearly 50 automobile radio makers 'lnd a dozen home
receiver builders (for as little as $60 in a basic tuner).
Radio Circuits (See Communications Section)
~
II
Video Circuits
Modulators
Suffix/Case
Device
TV Modulator (Hi Ouality)
RF Oscillator/Modulator, and FM Sound Oscillator/Modulator
P/646
MC1374
Video RGB to PAUNTSC Encoder
RGB and Sync Inputs, Composite Video Out Switch Selectable
pn38
MC1377
Video Synchronizer
Complete Color TV Video Overlay Synchronizer
P/711
MC1378
Color Processor
PALINTSC Input, RGB Output, also RGB Inputs, Plus Fast
Blanking Input. Ideal for Text. Graphics, Overlays
pn11
TDA3301
TDA3303
Color Processor
PALINTSC Input, RGB Outputs, On·Chip Hue Control
P/724
TDA3330
Color Processor
PAUNTSC Input, Color Difference Outputs On-Chip Hue Control
pn07
TDA3333
Function
Features
PALINTSC
Demodulators
MOTOROLA LINEAR/INTERFACE DEVICES
9-3
Tuning System
Function
Features
Remote Control Amplifier
Infrared Diode Signal Amplifier Shaper
PLL-Tuning Circuit
TV Tuning System -
Prescaler -
M-Bus Control
Suffix/Case
Device
P/626
MC3373
DW/751C
MC44802
Deflection r ·
Horizontal Processor
Linear Balanced Phase Detector, Oscillator and Predriver,
Adjustable de Loop Gain, Adjustable Duty Cycle
Sound
Sound IF Detector, dc Volume
Control, Preamplifier
30 !'V, 3.0 dB Limiting, Excellent AMR
-/646
TBA120C
Sound IF, Low Pass Filter,
Detector, dc Volume Control.
Preamplifier
Complete TV Sound System; 100 !'V, 3 dB Limiting Sensitivity;
4 Watts Output; VCC ~ 24 V; RL ~ 16!l
P/648C
TDA3190
750 mW Output
P/648C
TDA1190
Stereo Balance, Volume, Bass, Treble Control
P1707
TCA5550
Stereo Sound Control System
..-
Transistor Arrays
Function
'Clmax)
rnA
VCEO
Volts Max
VCBO
Volts Max
VEBO
Volts Max
Suffix/Case
Device
50
15
20
5.0
P/646
D/751 A
MC3346
50
15
20
5.0
P/646
CA3054
One Differentially Connected Pair and Three
Isolated Transistors
Dual Independent Differential Amplifiers with
Associated Constant Current Transistors
Television Subsystems
Function
II
Features
Suffix/Case
Device
P/710
MC13001X
PI710
MC13002X
P/648C
TDA3190
MONOMAX-l-Chip
Black and White TV
Subsystem
Video IF, Detector, AGC, Video Amplifier, Horizontal Processor,
Vertical Processor, and Sync For 525 Line Systems
Sound IF, Low Pass Filter,
Detector, de Volume Control,
Preamplifier, Power Amplifier
Complete TV Sound System; 100 !'V, 3 dB Limiting Sensitivity;
4 Watts Output; VCC ~ 24 V; RL ~ 16!l
Same as TDA1190Z Except for 750 mW Output
P/648C
TDA1190
MONOMAX AudioNertical Output
High Level 750 mW Audio Output - Vertical Yoke Driver
P/648C
MC13014
Same as Above Except For 625 Line Systems
Video IF Amplifiers
Suffix/Case
Device
P/626
MC1350
Low Level Detection, Low Harmonic Generation, Zero Signal
dc Output Voltage of 7.0 to 8.2 V
P/626
MC1330A1P
Same as MC1330Al Except Zero Signal dc Output Voltage of
7.8 to 9.0 V
P/626
MC1330A2P
SAW Preamp, IF Amplifier,
Detector, AGC, AFC
Complete Video IF or Parallel Sound IF System Complete AFT
System with Simple Quadrature Detector
P/707
MC13010P
Advanced Video IF
Complete Video/Audio IF System for High Performance
Analog TV Receivers
DW/751F
MC44301
Features
Function
1st and 2nd Video IF Amplifier
IF Gain
3rd IF, Video Detector, Video
Buffer, and AFC Buffer
«I
45 MHz
~
50 dB typ, AGC Range
~
60 dB min
MOTOROLA LINEAR/INTERFACE DEVICES
9-4
Remote Control Circuits
MC3373 Amplifier/Detector (Bipolar), Case 626
MC14497 Transmitter (CMOS), Case 707
The MC3373 remote control receiver is specifically
designed for infra-red link systems where high sensitivity and
good noise immunity are critical. The MC3373 incorporates
a high gain detector diode preamp driving an envelope detector and data wave shaper for accurate data recovery. Provision is also made to use an external L-C tank circuit at the
carrier frequency, normally 30 to 60 kHz, for extended range
low noise systems. Applications include TV remote control,
short range data links (up to several hundred feet), door
openers and security systems. The MC14497 is an ideal
companion transmitter, where a simple D.T.M.F. like key-pad
control is desired. The Motorola discrete opto division also
has several high sensitivity detectors and emitters which
match up well to the MC1373 system.
Functional Block Diagram of Remote Control System
(21
1N914
·90 Vdc
1500 IJ.F
To
Keyboard
t
Infrared
Emining
Diodes
II
LlTRONIX
SFH206
Receiver
DIode
1N914
TRANSMITTER
RECEIVER
MOTOROLA LlNEA1VINTERFACE DEVICES
i
\9-5
5.0 Vdc
CONSUMER ELECTRONIC PRODUCTS
ENTERTAINMENT RADIO RECEIVER CIRCUITS
Device
MC13020P
MC13021
MC13022
MC13023
MC13024
MC13041
MC13055
MC13060
MC34119
TCA4500A
TCA5550
TDA1524A
Function
Page
C-QUAM® AM Stereo Decoder ......... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-84
Motorola C-QUAM® AM Stereo Tuning Stabilizer ........................ 9-89
Advanced Medium Voltage AM Stereo Decoder ......................... 9-91
C-QUAM® AM Receiver Front End and Tuner Stabilizer ................... 9-95
Low Voltage Motorola C-QUAM® AM Stereo Receiver .................... 9-101
AM Receiver Subsystem ............................................. 9-104
Wideband FSK Receiver ....................................... See Chapter 8
Mini-Watt Audio Output .............................................. 9-110
Low Power Audio Amplifier .......................................... 9-114
FM Stereo Demodulator .............................................. 9-142
Stereo Sound Control System ........................................ 9-149
Stereo Tone Control System .......................................... 9-156
VIDEO CIRCUITS
II
Device
CA3054
MC1330A1P
MC1330A2P
MC1350
MC1374
MC1377
MC1378
MC1391P
MC1733,C
MC3346
MC3373
MC10320
MC10320·1
MC13001XP
MC13002XP
MC13010P
MC13014P
MC44301
MC44802
NE592
SE592
TBA120C
TCA5550
TDA1190P
TDA3190P
TDA3301
TDA3303
TDA3330
TDA3333
Function
Page
Dual Differential Amplifier ............................................ 9-7
Low Level Video Detector ............................................ 9-9
Low Level Video Detector ............................................ 9-9
IF Amplifier ............................................ , ............ 9-15
TV Modulator Circuit ........................................... ~ .... 9-19
Color Television RGB to PAUNTSC Encoder ............................ 9-27
Complete Color TV Video Overlay Synchronizer ....... ; ...... : .......... 9-31
TV Horizontal Processor .............................................. 9-35
Differential Audio Amplifier ..............................•.... See Chapter 2
General Purpose Transistor Array ..................................... 9-40
Remote Control Wideband Amplifier-Detector ........................... 9-43
Triple 4-Bit Color Palette Video DAC ................................... 9-47
Triple 4-Bit Color Palette Video DAC ................................... 9-47
Monomax Black and White TV Subsystem ...................... ; ....... 9-64
Monomax Black and White TV Subsystem .............................. 9-64
TV Parallel Sound IF and AFT ......................................... 9-73
Companion AudioNertical Subsystem ................................. 9-78
System 4 High Performance Color TV IF ................................ 9-123
PLL Tuning Circuit with 1.3 GHz Prescaler ................ , ............. 9-129
Video Amplifier ........................................ \,' ..... See Chapter 2
Video Amplifier .............................................. See Chapter 2
FM IF Amplifier, Limiter and Detector .................................. 9-137
Stereo Sound Control System ........................................ 9-149
TV Sound System ................................................... 9-153
TV Sound System ......................................... . . . . . . . . .. 9-153
TV Color Processor ........................ '.......................... 9-161
TV Color Processor .......................................... '........ 9-161
TV Color Processor .................................................. 9-175
TV Color Difference Demodulator ............................ ; ......... 9-183
REMOTE CONTROL CIRCUIT
Device
MC3373 .
Function
Page
Remote Control Wideband Amplifier-Detector ............. : ............. 9-43
RELATED APPLICATION NOTES
Application
Note
'
AN 545A
AN829
AN932
AN879
ANHK07
/'
Title
Television Video IF Amplifier Using Integrated CirCUits .............
Application of the MC1374 TV Modulator ....... ',' . ~ ...... ~ ..... ..
Application of the MC1377 Color Encoder .........................
Monomax-Application of the MC13001 Monochrome TV IC ..........
A High Performance, Manual-Tuned AM Stereo Receiver for
Automotive Application Using Motorola ICs: MC13020,
MC13021 and MC13041 .......................................
MOTOROLA LINEAR/INTERFACE DEVICES
9-6
Related
Device
MC1350
MC1374
MC1377
MC13001
MC13020,21
MC13041
@
CA3054
MOTOROLA
DUAL INDEPENDENT DIFFERENTIAL AMPLIFIER
GENERAL PURPOSE
TRANSISTOR ARRAY
The CA3054 consists of two independent differential ampl ifiers
with associated constant-current transistors on a common monolithic
SILICON MONOLITHIC
INTEGRATED CIRCUIT
substrate. The six NPN transistors which comprise the amplifiers are'
general purpose devices useful from de to 120 MHz.
The monolithic construction of the CA3054 provides close
electrical and thermal matching of the amplifiers which makes
this device particularly useful in dual channel applications where
matched performance of the two channels is required.
•
Two differential amplifiers on a common substrate
•
Independently accessible inputs and outputs
•
Maximum input offset voltage - ±5 mV
PSUFFIX
PLASTIC PACKAGE
CASE 646-06
MAXIMUM RATINGS
Symbol
Value
Unit
COllector-Emitter Voltage
VCEO
15
Vdc
Collector-Base Voltage
VCBO
20
Vdc
Emitter-Base Voltage
VEB
5.0
Vdc
Collector-Substrate Voltage
VCIO
20
Vdc
IC
50
mAde
°c
uc
°c
Rating
Collector CUrrent - Continuous
Junction Temperature
TJ
150
Operating Temperature Range
TA
-40 to +85
T stg
-65 to + 150
Storage Temperature Range
PIN CONNECTIONS
Pin 5 is connected to substrate and must remain at the lowest circuit potential
MOTOROLA LINEAR/INTERFACE DEVICES
9-7
CA3054
ELECTRICAL CHARACTERISTICS (TA = 25 0 C, unless otherwise notedl.
Characteristic
Min
Typ
Max
Unit
VIO
-
-
5.0
mV
110
-
2.0
~A
liB
-
24
~A
Symbol
STATIC CHARACTERISTICS FOR EACH DIFFERENTIAL AMPLIFIER
Input Offset Voltage
(VCB
= 3.0
Vdcl
I nput Offset Current
(VCB
= 3.0
Vdcl
Input Bias Current
(VCB
= 3.0
Vdcl
STATIC CHARACTERISTICS FOR EACH TRANSISTOR
Base-Emitter Voltage
(VCB = 3.0 Vdc,
(VCB = 3.0 Vdc,
(VCB = 3.0 Vdc,
(VCB c'3.0 Vdc,
IC
IC
IC
IC
Collector Cutoff Current
(VCB = 10 Vdc, IE
-
-
-
-
ICBO
-
0.70
0.80
0.85
0.90
-
100
nA
V(BR)CEO
15
-
-
Vdc
V(BR)CBO
20
-
-
Vdc
V(BR)CIO
20
-
-
Vdc
V(BR)EBO
5.0
-
-
Vdc
= 01
Collector-Emitter Breakdown Voltage
(lC
Vdc
VBE
"
= 50 ~Al
= 1.0 mAl
= 3.0 mAl
= 10 mAl"
= 1,0 mAl
Collector-Base Breakdown Voltage
(lC =
10~AI
COllector-Substrate Breakdown Voltage
IIC =
10~AI
Emitter-Base Breakdown Voltage
ilE=10!'Al
II
MOTOROLA LINEAR/INTERFACE DEVICES
9-8
MC1330A1P
MC1330A2P
ORDERING INFORMATION
Device
Temperature Range
Package
O'C to +70'C
O'Cto +70'C
Plastic DIP
Plastic DIP
MC1330A1P
MC1330A2P
LOW LEVEL VIDEO DETECTOR
LOW LEVEL VIDEO
DETECTOR
... an integrated circuit featuring very linear video character·
istics and wide bandwidth. Designed for color and monochrome
television receivers, replacing the third IF, detector, video buffer and
AFC buffer.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Conversion Gain - 33 dB (Typ)
•
Excellent Differential Phase and Gain
•
High Rejection of I F Carrier Feedthrough
•
High Video Output - B.O V(p.p)
•
Fully Balanced Detector
• Output Temperature Compensated
•
•
Improved Versions of the MC1330P
P SUFFIX
CIRCUIT DESCRIPTION
The MC1330A video detector is a fully balanced multiplier detec·
tor circu it that has linear amplitude and phase characteristics. The
si,gnal is divided into two channels, one a linear amplifier and the
other a limiting amplifier that provides the switching carrier for the
detector.
The switching carrier has a buffered output for use in providing
the AFT function.
The video amplifier output is an improved design that reduces
the differential gain and phase distortion associated with previous
video' output systems. The output is wide band, > B.O MHz, with
normal negative polarity. A separate narrow bandwidth, positive
video output is also provided.
PLASTIC PACKAGE
CASE 626-05
OUTPUT VOLTAGE SELECTION
The MC1330A1P is identical to the MC1330A2P
with the following exception:
ZERO SIGNAL DC
OUTPUT VOLTAGE
MC1330A1P
MC1330A2P
FIGURE 1 - CIRCUIT SCHEMATIC
R1
4.8k
TUNED CIRCUIT
7
IF
o--+--t----,
INPUT
'3
2.0k
MOTOROLA LINEAR/INTERFACE DEVICES
9-9
7.0 to 8.2 Vdc
7.8 to 9.0 Vdc
II
MC1330A1P, MC1330A2P
MAXIMUM RATINGS
Rating
Value
Unit
Power Supply Voltage,
24
Vde
DC Video Output Current
5.0
mAde
2.q
mAde
DC AFT Output Current
Junction Temperature
o to
Operating Ambient Temperature Range
Storage Temp~rature Range
+ 70
DC
-65 to +150
ELECTRICAL CHARACTERISTICS (VCC
=+20 Vde. a}~ 40, fe = 45.75 MHz, TA =+25 0 C unless otherwise noted)
~
Characteristic
Zero Signal de Output Voltage
Supply
°c
°c
+150
Pin
Min
Typ
Max
Unit
4
4
7.0
7.8
-
8.2
9.0
Vde
Vde
5,6
11
17.5
20
mA
4
-
0
0.5
Vde
65
mVrms
650
mVp·p
MC1330A1P
MC1330A2P
Curren~'
Maximum Signal de Output Voltage
Conversion Gain for 1.0
(30% Modulation)
Vp~p
Output
AFT Buffer Output at Ca'rrier Frequency
7
25
1
300
36
475 "
FIGURE 3 - INPUT ADMITTANCE
eOILQ~40
O.B
FIGURE 2 - TEST FIXTURE CIRCUIT
Vee 12 Vde
~ 0.6
E
.5
Vee
11
lf1
~~ 0.4
I) Vee = 10 Vde
gil
CARRIER
INPUT>-1r--i!-,
0.2
bll
50
AUXILIARY OUTPUT
o
-
5.0
3.0
10
n1
50
30
100
fREQUENCY (MHz)
10V[J\:=]
IOV
'NI I
VeC=11Vde
1.0
MC1330A
V
/' r-- VCC = 10 Vde
---
FIGURE 4 - VIDEO DETECTOR OUTPUT RESISTANCE
11
550
AFT OUTPUT
~
3.9k
50
\
~ 450
z
a: 400
~. 350
ll, Cl: See General1nformation Number 3,
'"
u;
page 5 of this specification.
ti; 300
~ 250
l=>
~ 200
~ 150
e>
10 0
\
\
r-...
"\.
r'-...
t--
...
50
0.1
1.0
3.0
0.5
0.3
VIDEO OUTPUT CURRENT, PIN 4 (mAde)
MOTOROLA LINEAR/INTERFACE DEVICES
9-10
5.0
10
MC1330A1P, MC1330A2P
DESIGN CHARACTERISTICS (Vee: +20 lide, Q: 40, fe: 45.75 MHz, T A: +25 0 e unle.. otherwise notedl
Characteristic
Input Resistance
Input Capacitance
Internal Resistance (Across Tuned Circuitl
Internal Capacitance (Across Tuned Circuit)
,
Negative Video Output Bandwidth (Figure 101
Positive Video Output Bandwidth (Figure 10)
Pin
TVp
Unit
7
7
4.9
1.5
kn
2,3
2,3
4.4
1.0
kn
'pF
4
5
10,B
2.2
MHz
MHz
4
7.0
Degrees
4
4.0
%
4
B.O
Degrees
pF
Differential Phase@ 3.5B MHz, 100% Modulated
Staircase, 3.0 Vp-p Detected Video Pin 5 Tied to Pin 6
Differential Gain@3.58 MHz, 100% Modulated
Staircase. 3.0 Vp-p Detected Video Pin 5 Tied to Pin 6
Differential Phase@3.58 MHz, 100% Modulated
Staircase, 3.0 Vp-p Detected Video, R Pin 5 == 4.3 kn
Differential Gain
@
3.58 MHz, 100% Modulated
Staircase, 3.0 Vp-p Detected Video, R Pin 5 == 4.3
kn
920 kHz Beat Output (dB Below 100% Modulated Video, See Figure 111
45.75 MHz == Reference
42.17 MHz: - 6 dB
41.25 MHz: -20 dB
Video Output Resistance @ 1 MHz,2 rnA
Vee:
Vee:
Vee:
Vee:
Input Overload (Carrier Level at Input to
Caused Detector Output, Pin 4,
To Go Positive 0.1 Vdc From
Ground.)
12
15
20
24
Vde
Vdc
Vde
Vde
Power Supply Voltage Range
4
6.0
%
4
-3B
dB
4
94
n
7
2.0
2.6
3.6
4.6
Volts
5
10to 24
Volts
FIGURE 5 -DIFFERENTIAL PHASE AND GAIN TEST SET UP
ADJUST FOR
OTO 3 V PEAK
AT OUTPUT OF
VIDEO DEMODULATOR
RF~----------~
1
50
-=
100mV INTO
LOAD
BOONTON 910
VIDEO
DEMODULATOR
TEST
FIXTURE
RLoad,..,3 kTVP.
SIX STEP
MODULATED
STAIRCASE
GENERATOR
TEKTRONIX
144 NTSC
SUBCARRIER
MOTOROLA LINEAR/INTERFACE DEVICES
9-11
II
MC1330A1P, MC1330A2P
TYPICAL CHARACTERISTICS
(Vcc
= +20 Vdc. TA = +2SoC Unle.. Otherwise Noted)
FIGURE 6 - OUTPUT VOLTAGE TRANSFER FUNCTION
:,
8.0
7.9
"CI
7.8
;
7.7
~
0:
~.
t
PO~ITI~E
h i\.t
7.6
..... ,
~ 6.0
> 7.4
"- f'..-.
~
FUNCTION
> 3.0 I----
~
-...
7.1
o
2.0
4.0
6.0
~
~ 2.0
"",
ou~PUTVdLTAGE
14
16
~
""
5.0
~
f----+~....-+-------- ...
~f=-
---
..-/
__ -/:1 ~uTP/voILTAGE
':;
4.0
0
>
- - 24
22
VI
a
~~
---- lB
16
I
"i
14
~
20
40
.----I----+----+-----j-----i B.o
.....
,..-1-"'"
~
~ - NEGlTIVE VlbEO
z
'"
0
!;;:
~ -2. 0
1= -4. 0
"" -6. 0
~
;::
A
/
..."
"
-1 a
'"
I
2.0
6.0
~
140
160
...-
50
~
j
30
>-
20
~
10
1.0
2.0
10
5.0
3.0
20
30
50
100
FIGURE 11 - VIDEO OUTPUT PRODUCTS
6
~
i=
~-
r\
I
,
I
I 41.25 MHz !NPUT _.
RElATI~E
to
45.75 MHz INPUT
4.5 MHz
.5
a.':----:1:70- - - :1:72----:1,4,-----:"16,----7:
1B,-----::20,----17:2-----:146.0
+6.0
~
Iii 500
3. 0 1----+.._=f--'7"l"'=--+
0 f-----1"---+------
~
VCC=15~ "'~ "- ......... "'-...
FIGURE 9 - AFT LIMITING
'+__ CARRIER INPUT= 50 mV(rmsl 12
f--__+--.A/
____I-SGPPLY CUR~ENT --+---jl-----i 1
~ 1. 0
/'
CARRIER INPUT = 0
....=>
""
1000
~
0: 6.0
~=2oVdC
CARRIER INPUT VOLTAGE (mV[rmsll
_____
~
~
~
~ 1.0 I-----+----I---~--~I~~~+_--_+----~~~~20 ~
z
CARRIER INPUT = 0 t---.
........
~
Vee
a
FIGURE 8 - OUTPUT VOLTAGE. SUPPLY CURRENT
10 r---'---~---'----'----r---,----~--,2
9.0
,
1.0
10
B.o
12
CARRIER INPUT VOLTAGE (mV[rm.sll
B.O 1-__--+__
~
........... ...........
~ 4.0
o
,
1.2
7.0
c: 5.0
.
~
ACTUAL TRANSFER FUNCTION
I-- LINEAR
I-- TRANSFER
~ 7.3
"'"
~
z
IDEAL ..............
o
>-
~ <---SEE FIGURE 6
1.0
OFFSET
~ 7.5
g
FIGURE 7 - OUTPUT VOL TAGE TRANSFER FUNCTION
B.O
~
~
~
12
14
~-50r-~~~~~~~~~~~±_~~~--t_--_1
!;;:
~-60r----r~Q-=~60~·--~Q*=~40~-+~-~+--?~~~~~,.,
-10_~10,--~--~~~2~.6~6~M~HZ~~~~--=--~~~~~
16
-20
VIDEO OUTPUT RESPONSE (MHzl
-30
RELATIVE 41.25 MHz INPUT LEVEL (dBI
MOTOROLA LINEAR/INTERFACE DEVICES
9-12
MC1330A1P, MC1330A2P
TV-IF Amplifier Information
much lower power signal levels than possible with a detector diode.
Offering a number of distinct advantages, its easy
implementation should meet with ready acceptance for
television designs. Some specific features and information
on systems design with this device are given below:
1. The device provides excellent linearity of output
versus input, as shown in Figures 6 and 7. These graphs
also show that video peak-to-peak amplitude (ac) does not
change with supply voltage variation. (Slopes are parallel.
Visualize a given variation of input CW and use the figure
as a transfer function.)
2. The dc output level does change linearly with supply
voltage shown in Figure 8. This can be accommodated
by regulating the supply or by referencing the subsequent
video amplifier to the same power supply.
3. The choice of Q for the tuned circu it of pins 2 and 3
is not critical. The higher the Q, the better the rejection
of 920 kHz products but the more critical the tuning
accuracy required. See Figure 11. Values of Q from 20
to 50 are recommended. (Note the internal resistance.)
4. A video output with positive-going sync is available at pin 5 if required. This signal has a higher output
impedance than pin 4 so it must be handled with greater
care. If not used, pin 5 may be connected directly to the
supply voltage (pin 6).The video response will be altered
somewhat. See Figure 10.
5. An AFT output (pinl) provides 460 mV of IF
carrier output, sufficient voltage to drive an AFT ratio
detector, with only one additional stage.
6. AGC lockout can occur if the input signal presented in the MC 1330A is greater than that shown in the
input overload section of the design characteristics shown
on Page 3. If these values are exceeded, the turns ratio between the primary and secondary of T 1 should be increased. Another solution to the problem is to use an input clamp diode Dl shown in Figure 14.
7. The total I.F. noise figure at high gain reductions
can be improved by reflecting'" 1 k source impedance to
the input of the MC1330AP. This will cause some loss in
overall IF voltage gain.
A very compact high performance IF amplifier constructed as shown in Figure 14 minimizes the number of
overall components and alignment adjustments. It can be
readily combined with normal tuners and input tuningtrapping circuitry to provide the performance demanded
of high quality receivers. This configuration will provide
approximately 93 dB voltage gain and can accomodate the
usual low impedance input network or, if desired, can
take advantage of an impedance step-up from tuner to
MC1349P input.
The burden of selectivity, formerly found between the
third IF and detector, must now be placed at the interstage. The nominal 3 volt peak-to-peak output can be
varied from 0 to 7.0 V with excellent linearity and freedom from spurious output products.
Alignment is most easily accomplished with an AM generator, set at a carrier frequency of 45.75 MHz, modulated
with a video frequency sweep. This provides the proper
realistic conditions necessary to operate to low-level
detector (LLD). The detector tank is first adjusted for
maximum detected dc (with a CW input). next, the video
sweep modulation is applied and the interstage and input
circuits aligned, step by step, as in a standard IF amplifier.
Note: A normal IF sweep generator, essentially an FM
generator, will not serve properly without modification.
The LLD tank attempts to "follow" the sweep input fre·
quency, and results in variations of switching amplitude in the detector. Hence, the apparent overalt response
becomes modified by the response of the LLD tank,
which a real signal doesn't do.
This effect can be prevented by resistively adding a
45.75 MHz CW signal to the output of the sweep generator approximately 3 dB greater than the sweep amplitude.
See Figures 12 and 13 below. For a more detailed description of the MC 1330AP see application note AN-545.·
MC1330A General Information
The MC 1330A offers the designer a new approach to
an old problem. Now linear detection can be performed at
FIGURE 12 - BANDPASS DISPLAYED BY
CONVENTIONAL SWEEP
AGURE 13 -
BANDPASS DISPLAY WITH THE ADDITION
OF CARRIER INJECTION
MOTOROLA LINEAR/INTERFACE DEVICES
9-13
•
..
MC1330A1P, MC1330A2P
FIGURE 14 - TYPICAL APPLICATION OF MC1349P VIDEO IF AMPLIFIER
and MC1330A LOW-LEVEL VIDEO DETECTOR CIRCUIT
R4
200
+20Vdc
VIO:~V L~ A--]
AUXILIARY
OUTPUT
...,..,J
h.Nw
- - --
~-----.'0V
PRIMARY VIDEO
AND SOUND OUTPUT
R771r----]
3.9k~
MC1330A
o
D1
MBD
101 L,.-~--.--,-J C14
13.QpF
.....-l~--I--I.. AFT OUTPUT
R6
39k
T1
AGe
•[ttl b[u J
2
'/ ~__
TURNS,c:..---
-.:....
3
TURNS
All windings 22 AWG tinned nylon
acetate wire tuned with Coilcraf! #61
l",
tt10
Ll wound with 26 AWG tinned nylon
acetate wire tuned by distorting Winding
slugs, SIZe 10-32, or equivalent
"See Note 1 (page3},and C4,Parts List (paye4) for this specification on theMC1349P Data Sheet
.... See Input Overload Section of the Design Characteristics Page 3, and General Information, Page 5, Note 6.
FIGURE 16 - PRINTED CIRCUIT BOARD LAYOUT
FIGURE 15 - PRINTED CIRCUIT BOARD PARTS LAYOUT
Ci
;.~
AGe
INPUT
R2
e:.
~
C5
G4 _
---lEe;
-1f-:
--IE-3-
'::II,...
. tl
~.
~
~~"'.:-:.--. ..
&
1I!lIliI'
.. ' '.:;rm
l'!D!Dil.
MOTOROLA LINEAR/INTERFACE DEVICES
9-14
•
I
®
MC1350
MOTOROLA
IF AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
MONOLITHIC IF AMPLIFIER
· .. an integrated circuit featuring wide range AGC for use as an
IF amplifier in radio and TV over the temperature range 0 to
+ 75°C. The MC1352 is similar in design but has a keyed-AGC
amplifier as an integral part of the same chip.
• Power Gain -
50 dB Typ at 45 MHz
48 dB Typ at 58 MHz
• AGC Range -
60 dB Min. dc to 45 MHz
• Nearly Constant Input and Output Admittance Over the Entire
AGC Range
• Y21 Constant (- 3.0 dB) to 90 MHz
• Low Reverse Transfer Admittance -«
1.0 JLmho Typ
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
• 12-Volt Operation. Single-Polarity Power Supply
MAXIMUM RATINGS (TA
= + 25°C unless otherwise noted)
Symbol
Valua
Unit
Power Supply Voltage
V+
+18
Vdc
Output Supply Voltage
VI. V8
+18
Vdc
AGC Supply Voltage
VAGC
V+
Vdc
Differential Input Voltage
Yin
5.0
Vdo
Power Dissipation (Package Limitation)
Plastic Package
Derate above 25°C
Po
625
5.0
mW
mWrC
Operating Temperature Range
TA
o to +75
°c
Rating
DSUFRX
PLASTIC PACKAGE
CASE 751-02
50-8
II
FIGURE 1 - TYPICAL MC1350 VIDEO IF AMPLIFIER
AND MC1330 LOW·LEVEL VIDEO DETECTOR CIRCUIT
0.0021'-F
470
+ 18 Vdc
220
Vide~8 V [
Auxiliary
Output
t-----'---- 10 V
-A - -]
v.J Ivvw
- - - Primary Video
and Sound Output
V]
3.:: : [
MC1330
5
8
AFT Output
5.0
k
-= AGC
3.9 k
T1
J
q 1IT1_ ~;i
__ ~ll"
"4
Turns:.?Turns
All windings #30 AWG tinned nylon
acetate wire tuned with Carbonyl
E or J slugs.
3"
r16l
Turns
16
L1 wound with #26 AWG tinned nylon
acetate wire tuned by distorting winding.
MOTOROLA LINEAR/INTERFACE DEVICES
9-15
I
r:lL~
MC1350
ELECTRICAL CHARACTERISTICS (V +
+ 12 Vdc; T A = + 25°C unless otherwise noted)
Characteristic
Symbol
AGC Range, 45 MHz (5.0 V to 7.0 V) (Figure 1)
Min
Typ
60
68
Max
Unit
-
dB
Power Gain (Pin 5 grounded via a 5.1 k!l resistor)
See Figure 6(a)
f = 58 MHz, BW = 4.5 MHz
f = 45 MHz, BW = 4.5 MHz
See Figure 6(a),(b)
I = 10.7 MHz, BW = 350 kHz
See Figure 7
I = 455 kHz, BW = 20 kHz
Ap
Maximum Differential Voltage Swing
o dB AGC
-30 dB AGC
Vo
Output Stage Current (Pins 1 and 8)
11 + 18
-
5.6
-
IS
-
14
17
mAdc
Po
'-
168
204
mW
-
Power Dissipation
+ 12 Vdc TA
=
-
dB
-
4B
. 50
58
62
46
Total Supply Current (Pins 1,2 and 8)
DESIGN PARAMETERS, Typical Values (V+
-
-
20
8.0
Vp _p
mA
+ 25°C unless otherwise noted)
Frequency
Parameter
Single-Ended Input Admittance
Symbol
455 kHz
10.7 MHz
4Ij.MHz
5BMHz
Unit
911
b11
0.31
0.022
0.36
0.50
0.39
2.30
0.5
2.75
mmhos
-
-
60
0
-
922
b22
4.0
3.0
4.4
110
30
390
60
510
/ 40
III
z
FIGURE 3 - NOISE RGURE
(Figure 6)
---....
;;: 60
'"
~
w
'"=>
80
5.0
6.0
18
16
'"0:
14
z
10
8.0
6.0
7.0
58MHz~
~
./
//
~ 45 MHz
./?'
L-"'"
y
o
10
20
GAIN REDUCTION (dB)
MOTOROLA LINEAR/INTERFACE DEVICES
9-16
/
/
~ 12
5
IAGC = /0.2 m;::--'"
4.0
,
22
20
"" "'-
,,
u
/
V
.§l
7.0
~
b22
g
3.0
FIGURE 11 - DIFFERENTIAL OUTPUT VOLTAGE
8.0
1
10
40
e
~200
FIGURE 10 - DIFFERENTIAL OUTPUT ADMITTANCE
0
~
.s
1.0
0.2
LY21 ( 30 dB gain)
I II--r:t:::;
~
50
70
2.0
I:t 1.0
/'
o
100
For additional information see "A High-Performance
Monolithic IF Amplifier Incorporating Electronic Gain
o
o
10
20
30
40
50
GAIN REDUCTION (dB)
60
70
80
Contra)," by W. R. Davis and J. E. Solomon, IEEE Journal on Solid State Circuits, December 1968.
MOTOROLA LINEAR/INTERFACE DEV)CES
9-18
®
MC1374
MOTOROLA
TV MODULATOR CIRCUIT
TV MODULATOR CIRCUIT
The MC1374 includes an FM audio modulator, sound carrier
oscillator, RF oscillator, and RF dual input modulator. It is designed
to generate a TV signal from audio and video inputs. The MC1374's
wide dynamic range and low distortion audio make it particularly
well suited for applications such as video tape recorders, video disc
players, T.V. games and subscription decoders.
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Single Supply, 5 V to 12 V
•
Channel 3 or 4 Operation
•
Variable Gain RF Modulator
• Wide Dynamic Range
•
Low Inter modulation Distortion
•
Positive or Negative Sync
•
Low Audio Distortion
•
Few External Components
P SUFFIX
PLASTIC PACKAGE
CASE 646-06
FIGURE 1 - TYPICAL APPLICATION
Volts
Channel 3
4
+
+
.+
Rl0
10 k
O.OOl:I:
-::-
II
:l~~~::'
r
.
12 V
C9
0.001 :I:
C8
Rl
470
VCC~
-=-
01
MPN3404
7
I
6
+
Ul
MC1374
P---~~~~~~~--~
R9
560
Rll
220
L------- represents one diode drop, or
about 0.75 V.) The oscillator Pins 6 and 7 must be biased
to a level ofVCC - cf> - 211 RL (or lower) and the input Pins 1
and 11 must always be at least 2cf> below that. It is permissible to operate down to 1.6 V, saturating the current
sources, but whenever possible, the minimum should be
3cf> above ground.
II
FIGURE 3 - AM MODULATOR TRANSFER FUNCTION
The oscillator will operate dependably up to about 105
MHz with a broad range of tank circuit components values.
It isdesirableto use a small Land a large Cto minimize the
dependence on I.C. internal capacitance. An operating 0
between 10 and 20 is recommended. Thevalues of Rl, R2
and R3 are chosen to produce the desired 0 andto set the
Pin 6 and 7 d.c. voltage as discussed above. Unbalanced
operation; i.e., Pin 6 or 7 bypassed to ground, is not recommended. Although the oscillator will still run, and the
modulator will produce a useable signal. this mode causes
substantial base-band video feedthrough. Bandswitching,
as Figure 1 shows, can still be accomplished economically
without using the unbalanced method.
The oscillator frequency with respect to temperature in
the test circuit shows less than ±20 kHz total shift from
O°Cto 50°C as shown in Figure 7. At higher temperatures
the slope approaches 2.0 kHz/DC. Improvement in this
region would require a temperature compensating tuning
capacitor of the N75 family.
Crystal control is feasible using the circuit shown in
Figure 21. The crystal is a 3rd overtone series type, used
in series resonance. The L1, C2 resonance is adjusted
well below the crystal frequency and is sufficiently tolerant
to permit fixed values. A frequency shift versus temperature of less than 1.0 Hz/oC can be expected from this
approach. The resistors Ra and Rb are to suppress parasitic resonances.
Coupling of output RF to wiring and components on Pins
1 and 11 can cause as much as 300 kHz shift in carrier (at
67 MHz) over the video input range. A careful layout can
keep this shift below 10kHz. Oscillator may also be inadvertently coupled to the RF output, with the undesired
effect of preventing a good null when VII = VI. Reasonable care will yield carrier rejection ratios of 36 to 40 dB
below sync tip level carrier.
Differential Input, Vll-V, (Volts)
FIGURE 4 - AM TEST CIRCUIT
R2
470
Ll
D.' I'H
RF
I
MOTOROLA LINEAR/INTERFACE DEVICES
9-22
11
MC1374
FIGURE 6 - 920 kHz BEAT
FIGURE 5 - THE OPERATING WINDOW
12.----,-----r----.-----r----.-----,--~~
5c 7.0
Inilial Video = 1.0 Vdc
-10 I- Chroma (3.58 MHz) =300 mVp-p
mVp-p
'" -20 I- Sound (4.5 MHz) a)b) =250
w"C
=500 mVp-p
o
I- Gain Resistor RG = 1.0 kn
~ ~ -30
~ ~ 6.0 f----,:;oi:I~'=-f"""o:-t.,...,¥_It
~
11
10
w
~ en 9.0 f----+-
0
....
:>
c5 8.0
"
0.... ......
z~
:s
5 .....
oz
;
0:
~
3.0~~~~~j~~~~~~~~~~~~~~
10~
5.0
6.0
~
__
7.0
~
____- L____
8.0
9.0
~
__
~
____
11
10
c:c -50
~g
-70
-80
12
o
0.1 0.2 0.3 0.4 0.5 0.6 D,7 0.8 0.9 10 11 1.2 1,3 1.4
DIFFERENTIAL INPUT, (Vlt-VI) [Vdc)
FIGURE 7 - RF OSCILLATOR FREQUENCY
versus TEMPERATURE
~~
t~ -10
IC~61.25
"« ~
M
~ -20
~
-30
~
-40
:il
ff:
g
~ ~-40
-'"
~ ~-50
+1
,,<;\
50
75
b
""
~~
V :\
25
-60
r-
-80
100
o
a
~ -10
>-
~
-20
V/; t;'; t!; VI
o
V/ II; ~
\:!j -40 VI
«
'"~ -50 II;'; ~ ~
~
-60 VI '1/
o
~
1(1
vi
V
It
1..-1 11
-30
mI1l
FIGURE 10 - 920 kHz BEAT
6.0
g'"
-20
>-
-30
I
~
I
Initial Video 10 IVdC I
Chroma (3.58 MHz) =300 mVp-p
Sound (4.5 MHz) a) =250 mVp-p
b)=500 mVp-p
RG =2.2 kn
-10
~~
~
~~
~~
~ ~-40
/.
N~
~ ~ -50
TA=25°C
Ic=6125 MHz
1/
-70
5.0
~
DIFFERENTIAL INPUT (V11-VI) [Vdc)
10
'"~
I~ V
:-.......
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10 11 1.2 1.3 1.4
FIGURE 9 - RF OSCILLATOR FREQUENCY
versus SUPPLY VOLTAGE
_1r-7";
-
-70
AMBIENT TEMPERATURE (0G)
N
1/
NO.
"'«0
o
Okn
0.0
~ vA
-50
Jideo~0.5IVdC
I
I
In:tial
I
-10 I- Chroma (3.58 MHz)=150 mVp-p
iii"
I- Sound (4.5 MHz) a) =125 mVp-p
w"E.. -20
b) = 250 mVp-p
S w -30 I- RG=1
-60
-70
FIGURE 8 - 920 kHz BEAT
0
JHZ
VCC=12 Vdc - -
~~
"'f\lV
~
SUPPLY VOLTAGE, VCC (Vdc)
10
~V
:--....
a
-60
+1
V
b
1'\
","
4.0 F----+=-r:1+'*h'-7I7'-T--ht:
OL-__- L____
E -40
N'ii
~ 5.0 ~S,...~
z 46
II
=>
~
~
0
~
~
45 5
j~TV
48
45
)
4.4
~
I?
Vcc
42
~
~
!
4.5 2
-
~ 4.5 1
~ 4.5 0
4.48
4.0
5.0
25
7.0
60
-
t-Pin 14
--
O~;--- ---
TA
FIGURE 18 -
b= 12 V
=25°C
i112
l
~11 0
!
fA
~
VII
1\
lA!
10
7~
4.43
30
4.0
50
100
6.0
/
../
./
--I-
I
TA=25°C -
5.0
7.0
6.0
MOTOROLA LINEAR/INTERFACE DEVICES
9-25
1---
I
8.0
9.0
Vee. SUPPLY VOLTAGE (Vde)
DC INPUT VOLTAGE. PIN 14 (VOLTS)
V
P1n 14 - 180 k/30 k Oivider
L
4.42
4.0
70
V
t;7
/"
./'
4.4 5
444
~
20
4.4
:.....-
I---
Pin 14 Open
~ 4.46
~
~
:::j 10.2
1--I---
-
>-
l//
gj 10.4
Pin 14 to 2.6 V Source
4.4 8
fI
~ 108
'"~ 10.6
I
4.4 9
~
:;;
75
FM SYSTEM FREQUENCY versus VCC
4.5 0
90V,VCC
50V
~~
50
AMBIENT TEMPERATURE (OC)
FIGURE 17 - MODULATOR TRANSFER
FUNCTION (10.7 MHz)
11.6
96
180 k/30 k Divider -
4.4 7
30
DC INPUT VOLTAGE. PIN 14 (VOLTS)
9.8
/
[...../
4.4 9
2.0
10
~ 100
/
Pin 14 TO 2'16/
>-
W
,,-
I
!
45 3
=5.0 V. 9.0 V
41
11.4
, ....--;;.
11
45 41-- Vec=12 V
~
43
100
FIGURE 16 - FM SYSTEM FREQUENCY
versus TEMPERATURE
J1
=25 v C
47
75
OEVIATION (kHz)
FIGURE 15 - MODULATOR TRANSFER
FUNCTION (4.5 MHz)
~
--
-r--
DC INPUT VOLTAGE. PIN 14 (VOLTS)
TA
/
I~
I
../
o
1.0
'/
OPli~um Bias (2.6-2.7 V)
/"
1.4
1.3
Vv
/'
20
10
o
/
1/
TA=25°C
Ie =4.5 M~Z
;1'.
~"
t::;; ~
15
~
OISTORTION versus MOOULATION DEPTH
I--- VCC=12 V
Vcc = 12 V
2.0
~
>~
FIGURE 14 -
10
11
12
MC1374
FIGURE 21 - CRYSTAL CONTROLLED RF OSCILLATOR
FOR CHANNEL 3,61.25 MHz
FIGURE 19 - A CHANNEL4 VESTIGIAL
SIDEBAND FILTER
Vee
VCC
RL
75f2
82 F
=
q
24n
33 pF
33 pF
-=-
.
~
,.~
27
ks~ pF
•
470
::"'\ Output
:;
n
~oo
75n
Clr-I
0.001
C2
56 pF
180
-10
"
L1
0.15{JH
~ -50
6
-60
1= - 70 +----,--'----,--L,.-«
61
65
MC1374
73
69
Frequency (MHz)
FIGURE 20 - AUDIO PRE-EMPHASIS CIRCUIT
II
R3
470
-=-
iii -20
; -30
~ -40
as
R2
470
lOOn
-=-
Close Wound
Knife Tuned
To Trap Ch. 3
61.25 MHz
windings 4T #23 AWG
close wound on 1/4" 10
on :~2mp:02~ axis. 3/S" :::n9
~ pF
#23 AWG
I/S"1 0
Rl
Both transformer
---,
o---=.J
"Flat"
Audio
<~ A
~ 6 kn
,=56 kn
Input
Gnd
_1_
2"Ae
25
CD
:!!
~
;;
~
20
15
10
0
.~
2" (r+ AICe
~
---I-
I%:
-5
21
210
2100
21 k
Frequency (Hz)
pre-emphasIs = 75 p.S = rC =
21T(21~O Hz)
See Application Note AN829 for further information_
MOTOROLA LINEAR/INTERFACE DEVICES
9-26
Rb
18
@
MC1377
MOTOROLA
Advance Information
COLOR TELEVISION
RGB to PALINTSC ENCODER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
COLOR TELEVISION RGB to PALINTSC ENCODER
· .. an integrated circuit used to generate a composite TV signal
from baseband red, blue, green and sync inputs. The MC1377 has
color subcarrier oscillator, voltage controlled 90° phase shifter,
two DSB suppressed carrier chroma modulators, RGB input matrices and blanking level clamps. It can be operated with very few
external par:ts, but has the pinouts for a fully implemented, top
quality composite signal. It is ideal for encoding signals from color
cameras and graphics generators.
~
~ ~ ~ ~ ~ ''''''''
FN SUFFIX
• Reference Oscillator Self-Contained Or Externally Driven
PLASTIC PACKAGE
CASE 775-02
PLCC-20
• Nominal 90° ±3.00 Axes Are Optionally Trimmable
.,
:LASTIC PACKAGE
CASE 738-03
1
1
• Simple PALINTSC Switch
• Luminance And Chroma Channels Can Accept Delay
Line/Bandpass Elements Or Direct Connection
ORDERING INFORMATION
• Provides de Reference To Permit Direct Drive To RF Modulator
FIGURE 1 -
Device
Temperature
Range
Package
MC1377P
MC1377FN
0-70°C
Plastic DIP
PLCC-20
BLOCK DIAGRAM AND APPLICATION CIRCUIT
-------------,
0.1
r-=:=b'0_'-l°~~47/33
~) 3-:3kV~
11
3.58/
4.43
MHz
Composite
Video
Output
2.5 V p-p
0.001:r 50 k 8.2 V
Composite
Sync Input
+
15 "FT'
6f
+
+
1i T' 15 "F
6',5 "F 6, 1.0 k
R
G
B
"'----.---Inputs: 1.0 V p-p
400 ns
Y Delay
-=
This document contains information on a new product. Specifications and information herein
are SUbject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-27
MC1377
MAXIMUM RATINGS
Symbol
Value
Supply Voltage
Rating
VCC
15
Vdc
8.2 Vdc Regulator Output Current
IREG
10
mAde
Operating Temperature
o to
TAMB
Unit
·C
+70
Storage Temperature
Tsta
-65to +150
·C
Junction Temperature
TJ(max)
150
·C
Po
1.25
10
W
mWrC
Power Dissipation, package
Derate above 25"C
RECOMMENDED OPERATING CONDITIONS
SupplV Voltage
Sync Tip Level
Sync, Blanking Level
1,2 ± 1.2
Vdc
-0.5 to +1.0
+1.710 +8.2
Vdc
1.0
Vo- o
Red, Green, Blue Inputs (Saturated)
ELECTRICAL CHARACTERISTICS (Vee
= 12 Vdc TA = 25"C Circuit Of Figure 1 Unless Otherwise Noted.)
Characteristic
II
Pin No.
Min
Typ
,Max
Unit
Supply Current
14
20
32
40
mAde
Oscillator Amplitude
18
0.25
-
V(o-o)
17
Subcarrier Input:
17
-
0.5
External Subcarrier Input (Oscillator Components Removed)
5.0
2.0
-
k!l
pF
Resistance
Capacitance
VRMS
Modulation Angle (R-Y) to (B-Y)
-
85
90
95
Degrees
(R-Y) Angle Adjustment
19
-
0.25
-
Deg/.,A
R, G, B Input For 100% Color Saturation
3,4,5
1.0
-
V(c-o)
R, G, B Input:
3,4,5
-
10
2.0
-
k!l
pF
Resistance
Capacitance
Sync Threshold (See Figure 2e)
2
-
1.7
-
V
Sync Input Resistance (Input> 1.7 V)
2
10
-
k!l
Chroma Output Level At 100% Saturation
13
1.0
-
V(c-p)
Chroma Output Resistance
13
50
Chroma Input Level For 100% Saturation
10
-
V(o-o)
Chroma Input:
10
-
-
k!l
pF
-
VIp-pI
Resistance
Capacitance
Composite Output,
100% Saturation
(See Figure 2d)
}{
Sync
Luminance
Chroma
Burst
9
-
Output Impedimce (See Note 1)
9
Luminance Bandwidth (3 dB), Less Delay.Line
9
-
Subcarrier Leakage In Output
9
-
0.7
10
2.0
0.6
1.4
1.7
0.6
50
8.0
20
-
!l
!l
MHz
mV(a-o)
Note 1: Output Impedance can be reduced to less than 100 by uSing a 1500 output load from Pm 9 to ground. Power supply current Will Increase
to about 60 rnA.
See Application Note AN932 for further information.
MOTOROLA LINEAR/INTERFACE DEVICES
9-28
MC1377
FIGURE 2 - SIGNAL VOLTAGES
(CIRCUIT VALUES OF FIGURE 11
(a)
1.0
v
(p_p)
lJL
APPLICATION NOTES
100%
Green
Input
(Pin 4)
R.G.B. Inputs should be set up to be 1.0 V p-p for
fully saturated levels. This is not arbitrary, since sync
and burst levels are internally fixed. The large (15 j.LF)
input capacitors of Figure 1 are needed for the 50/60 Hz
vertical component.
(b)
100%
Red
Input
(Pin 3)
1.0 V (p_p)
Subcarrier Oscillator. The internal common-collector
Colpitts can be free run or it can easily be pulled in by
a lightly coupled signal from a "master" into Pin 17.
Also, it can be disabled entirely and a 0.25 VRMS signal
driven into Pin 17.
(c)
100%
Blue
Input
(Pin 5)
1.0 V (p_p)
(d)
Modulator Phase Angles are quite accurately established internally. Taking (B-V) as 0', burst is at 180', and
the angle of (R-V) is 90' ± 3.0'. The (R-V) angle can be
"tweaked." For example, 470 k!l from Pin 19 to ground
will increase the (R-V) to (B-V) angle about 3.0'. Pulling
Pin 19 up will decrease the angle.
5.0
Composite
Output
(Pin 9)
4.0
Composite Output is dc referenced and can be direct
coupled to an RF modulator as shown in Figure 3. In
this case, the 8.2 V regulator output of the MC1377 is
divided down to 5.8 V to provide the zero carrier reference to Pin 1 of the MC1374.
3.0
(e)
8.2 Max
r
1.7 Min
I
Sync
1.0 Max
I I
------11-
0
-0.5 Min
(f)
Burst Generation is provided by a sync triggered
ramp on Pin 1 and two internal level sensors. Since the
early part of this ramp is used, it is quite accurate. Fixed
R-C values are feasible, as shown in Figure 3;
Input
(Pin 2)
\oj
Sync Input can be varied over a wide latitude but
neverless must be applied correctly. The typical ac coupled sync signal has very little positive value and will
require a pull-up resistor to 8.2 Vdc at the input. The
sync input is a 10 k!l/10 k!l divider in the base of a
common emitter stage. For PAL operation, the correctly
serrated vertical sync interval must be used, in order to
continuously trigger the PAL flip-flop. "Block" vertical
sync can be used for NTSC.
10.5
Chroma
Output
(Pin 13)
10.0
9.5
(g)
4.35
Chroma
Input
(Pin 10)
4.0
(R-V)(B-Y)(-Y) signals are generated to NTSC values
(± 5.0%) in the input matrices. They are dc clamped at
3.65
(h)
5.2h
4.3~
~
2.6t-!
2. 1
~
~
...,....rL-r-'"""
black level by a sync driven clamp. Burst amplitude is
internally fixed to correspond to sync level, allowing for
3.0 dB loss in the chroma bandpass filter. If the filter is
not used, as shown in Figure 3, a resistor divider should
be inserted between Pin 13 and Pin 10 to provide the
proper chroma level. When the chroma bandpass is not
used, the (-V) delay line should also be removed, but
the 1.0 kll.0 k divider from Pin 6 to Pin 8 should be
retained.
Luminance
Output
(Pin 6)
Luminance
Input
(Pin 8)
MOTOROLA LINEAR/INTERFACE DEVICES
9-29
IJ
MC1377
FIGURE 3 -
COUPLING THE MC1377 TO THE MC1374 RF MODULATOR
Vcc ~ +12 Vdc
RF Tank:
See MC1374
Data Sheet
8.2 Vdc Reference
16r-~~----~--~
!J2r
30
=
Inputs
I
8
18
svnc
I R
\
4
75
CJ
91-----"i
3
MC1374
MC1377
9
G
I
I
4
I B
Compo~ite
I
'-
0.001
Video
1.0 k
12
~
N
19
15
~
NO.1
0.1
5.1 k
11
10
0.01
q
Audio
In
0
o------j
+
1.0 jJ.F
=
=
FIGURE 5 -100% SATURATED PAL COLOR
BARS ON NTSC VECTORSCOPE
FIGURE 4 - VECTORSCOPE DISPLAY
OF 100% SATURATED NTSC COLOR BARS
MOTOROLA LINEAR/INTERFACE DEVICES
9-30
®
MC1378
MOTOROLA
Product Preview
COLOR TELEVISION
COMPOSITE VIDEO OVERLAY
SYNCHRONIZER
COLOR TELEVISION COMPOSITE VIDEO OVERLAY
SYNCHRONIZER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. a bipolar composite video overlay encoder and microcomputer synchronizer. The MC1378 contains the complete encoder
function of the MC1377, i.e. quadrature color modulators, RGB
matrix, and blanking level clamps, plus a complete complement
of synchronizers to lock a microcomputer-based video source to
any remote video source. The MC1378 is especially tailored to
work with the Motorola RMS (Raster Memory System), but it can
be applied to other controllable video sources. It can be used as
a local system timing and encoding source, but it is most valuable
when used to lock the microcomputer source to a remotely originated video signal.
• Contains All Needed Reference Oscillators
FN SUFFIX
• Can Be Operated in PAL or NTSC Mode, 625 or 525 Line
PLASTIC PACKAGE
CASE 777-02
PLCC-44
• Wideband, Full-Fidelity Color Encoding
• Local or Remote Modes of Operation
• Minimal External Components
ORDERING INFORMATION
• Designed to Operate from 5.0 V Supply
• Will Work with Non-standard Video
Temperature
Range
Device
MC1378P
Package
Plastic DIP
0-70°C
MC1378FN
FIGURE 1 -
•
PLCC-44
BLOCK DIAGRAM TYPICAL APPLICATION
PIN ASSIGNMENTS
36 MHz Master Clock
Local/Rem.
H Sync
3.58/4.43 MHz
Vert/Camp Sync
RMS
Red
MC1378
-
H. PLL Filter
H.
Remote
Video
veo{
Burst Gate Out
PAUNTse Mode
Ground
3.58/4.43 In
Green
Composite
r--- Overlayed
Video
Blue
Chroma PLL Filter
Chroma {
veo
Video Enable
LocallRemote
t
f
Clock Output
Clock"Ground
} Clock
veo
Killer Filter
Quad. loop Filter
PAlldent. Cap
Ground
B Input
Overlay Enable
Chroma In
) PLCC Pin Assignments
This document contains information on a product under development. Motorola reserves the
right to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
Compo Vid. Out
G Input
Lac. Vid. Clamp
9-31
Clock VCC
Vee
Chroma Out
*(
V. Out/Sync In
Clock PLL Filter
B-YClamp
-Y Output
PAU
NTSC
Camp. Sync Out
R-YClamp
R Input
525/60
625/50
H. Sync In
Rem. Vid. In
ACC Filter
-Y Input
Rem. Vid. Clamp
MC1378
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
6.0
Vdc
TA
Oto+70
·C
Storage Temperature
Tsta
-65 to +150
·C
Junction Temperature
TJ(max)
150
·C
Po
1.25
10
W
mWI'C
Value
Unit
Supply Voltage
Operating Temperature
Power Dissipation (Package)
Derate above 25·C
RECOMMENDED OPERATING CONDITIONS
Condition
Pin No.
28,36
Supply Voltage
14,15,16
1.0
Color Oscillator Input Level
8
0.5
Vdc
Vp_p
VD _D
Video Input, Po.sitive
24
1.0
Vo_o
RGB Input for 100% Saturation
5.0
:!:
0.25
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = 25·C Circuit of Figure 4 or 5)
Characteristic
Pin No.
Min
Typ
Max
Unit
28,36
-
100
-
Video Output, Open Circuit, Positive
27
-
2.0
9.4
Vn-D
Modulation Angle (R - V) to (B - V)
-
87
90
93
Degrees
Supply Current
RGB Input Impedance
High
Low
1
Horizontal Sync Input, Negative Going
10
Remote
Local
-
4.3
39
-
4.3
5
-
4.3
(TTL)
40
Vertical Sync Output, Negative Going, Remote
(TTL)
Mode
38
Composite Sync Output, Negative Going (TTL)
(TTL)
Burst Gate Output, Positive Going
-
14,15,16
Local/Remote Switch (TTL)
4.3
mAdc
-
kG
-
-
-
Vn-o
Vp_p
-
Vp_p
Vn-n
DESCRIPTION OF OPERATION - Refer to Figures 3, 4
II
REMOTE MODE
LOCAL MODE
The incoming remote video signal (Pin 24) supplies all
synchronizing information. A discussion of the function of the
phase detectors helps to clarify the lockup method:
The MC137S and RMS combine to provide a fully synchronized
standard signal source. In this case, composite sync must be
supplied by the RMS or other time base system. In the MC137S
the phase detectors operate as follows:
PD1 -locks the internally counted-down 4 MHz horizontal VCO
to the incoming horizontal sync. It is fast acting, to follow
VCR source fluctuations.
PD2 - locks the 36 MHz clock VCO, which is divided down by
the RMS, to the divided down horizontal VCO.
PD3 -is a gated phase detector which locks the 14 MHz crystal
oscillator, divided by 4, to the incoming color burst.
PD4 - controls an internal phase shifter to assure that the
outgoing color burst is the same phase as incoming burst
at PD3.
PD5- not used in REMOTE MODE
POI -locks the internally counted-down 4 MHz horizontal VCO
to a Horizontal Sync signal (at Pin 40) from the RMS
(counted down from 36 MHz).
PD2 - not used in LOCAL MODE.
PD3 - not used in LOCAL MODE.
PD4 - active, but providing an arbitrary phase shift setting
between the color oscillator and the output burst phase.
PD5 - locks the 36 MHz clock VCO (which is divided down by
the RMS) to the 14 MHz (crystal) color oscillator. The 14
MHz is, therefore, the system standard in LOCAL MODE,
and it is not dc controlled.
Vertical lock is obtained by continuously resetting the sync
generator in the RMS with separated vertical sync from the
MC1378, Pin 38. This signal is TTL level vertical block sync,
negative going. The horizontal sync from the RMS to Pin 40 is
also TTL level with sync negative going. The local/remote switch,
Pin 1, is in local mode when grounded, remote mode when taken
to 5.0 V. The overlay control, Pin 25, has an analog characteristic,
centered about 1.0 V, which allows fading from local to remote.
COMPOSITE VIDEO GENERATION
The color encoding at the RGB signals is done exactly as in
the MC1377. Composite chroma is looped out at Pins 18 and 20
to allow the designer to choose band shaping. Luminance is
similarly brought out (Pins 17 and 22) to permit installation of
the appropriate delay.
Composite sync output, Pin 39, and burst gate output, Pin 5,
are provided for convenience only.
MOTOROLA LINEAR/INTERFACE DEVICES
9-32
3:
n
....
FIGURE 2 - MC1378 INTERNAL BLOCK DIAGRAM
w
......
Burst Gate Out
+5.0 V
r
I
••
I~u
00
I" - - - - - - - -I- - - - - 1 - 1I
28
•••
• ••••• I
35.81
35.5
MHz
s:
0
~
-I
0
:I)
0
r
l>
r
z
I--_ _ _~"'"~ ~ Sync
m
l>
CD
W
w
:I)
:::::
Z
-I
m
PAU
NTse 0----------+-1
~Sync
Out
:I)
"l>
Locall
~Remote
(")
m
0
m
<
Red In o---)~
(")
m
en
I
I
I
I
I
I
I
L __
I
18
-y
~I
rI
'n
Out~
T
19
-=-
II
----7T26
25
I
Overlay
Enable
RemoteII
Video
Video
Out
In
Vee
-=-
Gnd
Compo Sync In
MC1378
Overlay Enable
Remote
+5 Video
Master Clock 35.8135.5 MHz
Video
Vee Out
33
32
31
'"
25
30
24
23
AMS
TOI<
Dl122401D
-1533
orother
Local
Video
Source
1.2 It
FIGURE 3 -
REMOTE MODE
Overlay Enable
+5 Video
Master Clock 35.8/35.5 MHz
Vee
Out
•
1.0p,F
+
TDK
DL122401D
-1533
+10
-B
'.2k
RMS
orother
Local
Video
Source
1---------'--'------,J4.:a~Hz
AGURE 4 -
LOCAL MODE
MOTOROLA LINEAR/INTERFACE DEVICES
9-34
®
MC1391P
MOTOROI.A
TV HORIZONTAL PROCESSOR
TV HORIZONTAL
PROCESSOR
· .. low-level horizontal sections including phase detector, oscillator
and pre-driver - a device designed for use in ali types of television
receivers.
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
Internal Shunt Regulator
• Preset Hold Control Capabil ity
• ±300 Hz Typical Pull-In
•
Linear Balanced Phase Detector
•
Variable Output Outy Cycle for Driving Tube or Transistor
•
Low Thermal Frequency Drift
'.
• Small Static Phase Error
•
1
Adjustable dc Loop Gain
•
PSUFFIX
Positive Flyback Inputs
PLASTIC PACKAGE
CASE 626-05
Vnonreg
FIGURE 1 - TYPICAL APPLICATION CIRCUIT
+30 V
RA
RS
470
470
+150 V
CA
b'3 k
+
100~FI
[
Hold
AD
Rcl;.
27 k
12 k
AX
Ay
0.0068
AEf
2.4 k_
~lcs
150 k
0.0051
~F
8
2.2 k
7
6
4k
10W
3.3 k
I
ccl:
JL
fP
1~~
6
MJ105
or Equiv
r---'I-MC1391P
1
2
RZ t
82 k
39 k
~
~
1.5 k
Y
0
K
0.001
~F
4iO"~F
3
.E
' - - ""5.3"
MAD...,
1140
or
Equiv
4·~'"'o:'
1.5
or Equiv
0.003
~F
-=-
T
-=
~
High
Voltage
Tripier
[:;"0.1 ~F
tRz
= 6.8 k
per 100 V af fly back amplitude.
-20 V Sync
This circuit has an oscillator pull·in range of ±SOO Hz, a noise bandwidth
of 320 Hz, and a damping factor of O.S.
MOTOROLA LINEAR/INTERFACE DEVICES
9-35
0.01
I"
~F
*
0.2
~F
MC1391P
MAXIMUM RATINGS ITA
= +250 C unle.. otherwise noted. I
Value
Unit
Supply Current
40
mAde
Output Voltage
40
Vdc
Output Current
30
mAde
Sync Input Voltage IPin 31
5.0
Vlp·pl
Flyback Input Voltage IPin 41
5.0
Vip_pi
Power Dissipation (Package Limitation)
Plastic Package
Derate above T A = +25 0 C
625
5.0
rnW
rnW/oC
Rating
o to
Operating Temperature Range (Ambient)
°c
°c
+700
-65 to +150
Storage Temperature Range
ELECTRICAL CHARACTERISTICS ITA" +25 0 C unless otherwise noted.IISee Test Circuit of Figure 2, all switches in position 1.1
Characteristic
Regulated Voltage IPin 61
Supply Current (Pin 6)
Min
Typ
Max
Unit
8.0
8.6
-
20
9.4
-
mAde
Vdc
Collector-Emitter Saturation Voltage (Output Transistor
Q1 in Figure 6)
II
Vdc
-
0.15
0.25
Voltage IPin 41
-
2.0
-
Oscillator PulHn Range (Adjust RH in Figure 2)
-
±300
-
Hz
Oscillator Hold-in Range (Adjust RH in Figure 2)
-
±900
-
Hz
-
0.5
-
-
±3.0
-
-
-
±1.0
Sync Input Voltage (Pin 3)
2.0
-
5.0
Vlp·pl
Sawtooth Input Voltage (Pin 4)
1.0
-
3.0
Vlp·pl
IIc = 20 rnA, Pin 11 Vdc
Static Phase Error
Vdc
~s
I
--
VBE
-
~
w
~
0.01
0,01
---
o 0.7
0.6
:t
0,2
0.1
0.3
0.5
0.7
0.05
0.1
0,5
FIGURE 5 - DC CURRENT GAIN
130
~
I
"
~
0
3.5
3.0
/
hFE
z
'"'"
110
/
'"
./
50
0.01
I
0.85
0.8
1\
0.1
~
1.5
0,9
\hFE11 Ih FE 2\
hFE210r FIE
0.05
~
2.0
0.95
--t 1'
~
0,5
1.0
5,0
0.75
10
IE, EMITIER CURRENT ImAde)
MOTOROLA LINEAR/INTERFACE DEVICES
9-42
0
;::
2.5
1.0
90
70
1.0
IE, EMITTER CURRENT ImA)
I
I
~
2.0~
~
;;:
1.0 :,
;;
IC, COLLECTOR CURRENT ImAde)
140
3.0cj
>
VIO
0.4
0.01
1.0
w
'"
«
~
z
~ 0.5
>
0.05
4.0~
__ f-"'"
~
0.02 0,03
~
---
~ 0.8
I-"
'/
125
TA, AMBIENTTEMPERATURE 1°C)
0.07
0.03
VCB=10V
0.9
0.1
~
~
5.0 V
~
50
75
TA,AMBIENT TEMPERATURE 10C)
0.5
0.05
VCB
-10-2
o
0.7
~
Y
./
,..-:
810- 1
/"
I::
:t
o
V./
VA
o
1.0
~
15V
0:
FIGURE 3 - INPUT OFFSET CHARACTERISTICS FOR
Q1and Q2
"~
,--VCB
'"
u
0
i
~
5.0
o
10
®
MC3373
MOTOROLA
REMOTE CONTROL WIDEBAND
AMPLIFIER WITH
DETECTOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
REMOTE CONTROL AMPLIFIER-DETECTOR
The MC3373 is intended for application in infrared remote controls. It provides the high gain and pulse shaping needed to couple
the signal from an IR receiver diode to the tuning control system
logic.
• High Gain Pre-Amp
• Envelope Detector for PCM Demodulation
• Simple Interface to Microcomputer Remote Control Decoder
• May Be Used with Tuned Circuit for Narrow Bandwidth, Lower
Noise Operation
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Small Package Size
• Minimum External Components
• Wide Operating Supply Voltage Range
Pin Connections
• Low Current Drain
Output
• Improved retrofit for NEC part no. ,...PC1373
VCC
Filter
Input
Tank
Filter
Peak Hold
FIGURE 1 -
REMOTE CONTROL APPLICATION
+9.0 Vdc
1500 fLF
Ground
(21
lN914
+12
Vdco-----~---1~--~~-1~
+
455
IN
100
150 k
+5.0 Vdc
18
-Irl-+-+-l17
18 k
-1r-t-+-+--I 2
-Irl-+-+-l 16
-t--t--t--t--I 14
MC14497
-Irl-+-+-ll I
(31
MLE071
Infrared
Emitting
Diodes
4
56
LlTRONIX
SFH206
Receiver
Diode
lN914
MOTOROLA LINEAR/INTERFACE DEVICES
9-43
MC3373
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
15
Vdc
TA
Oto 75
·C
Tstll
-55 to +125
·C
TJ
150
·C
Po
1/6JA
1.25
10
Watts
mWrC
Supply Voltage
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Power Dissipation. Package Rating
Darate above 25·C
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Power Supply Voltage (25·C)
VCC
4.75
Power Supply Voltage (O"C)
VCC
5.0
-
fin
30
40
Parameter
Input Frequency
ELECTRICAL CHARACTERISTICS
(TA
Typ
Unit
15
Vdc
15
Vdc
80
kHz
= 25·C. VCC = 5.0 V. fin = 40 kHz. Test circuit of Figure 2)
Symbol
Min
Typ
Max
Unit
Power Supply Cu"ent
IcC
1.5
2.5
3.5
mAdc
Input Terminal Voltage
V(Pin 7)
2.4
2.8
3.0
Vdc
Input Voltage Threshold
Vin
50
100
I£VP_P
Input Amplifier Voltage Gain
(VIPin 3] = 500 mVp_p)
AV
-
60
-
dB
80
ill
Characteristic
40
60
= 1.0 mVp_p
Output Leakage. VCC = VOH = 15 Vdc
VOL
-
IOH
Output Voltage. Input Open
VOH
-
-
Input Impedance
qn
Output Voltage. Vin
II
Max
FIGURE 2 -
-
0.5
V
2.0
,.A
5.0
Vdc
TEST CIRCUIT
VCC
100 k
=
5.0 Vdc
Output
8
10 fLF
+
0.033
7
2
6
3
5
4
h
-=
5.0 mH
22
COIL:
TOKO INC.
CANS-4612Z
150 k
MOTOROLA LINEAR/INTERFACE DEVICES
9-44
MC3373
FIGURE 3 -
BLOCK DIAGRAM
r----------4~--_.--~--------~--------------._-oVcc
1.0 k
100 k
+~I1F
r;;;;;;;;;-f---WIiRl;--:-;-f-'.""-"---;:::;~'-"""'-oOutput
22
~~------+
FIGURE 4 - INPUT AMPLIFIER GAIN
5
FIGURE 5 -
100
DETECTOR THRESHOLD
1.0
12 Vdc
Vee
......
Vee
r--....
~
10 Vdc
I
\
....
1\
\
\
\..
.........
f=Vee
\.
'\.
8.5 Vdc
........
'-..
a
1.0
10
lOa
PIN 6 RESISTOR (OHMS I
1000
50
r-
512 p,s burst of 30-80 kHz
PIN 3
Amplifier
Output
--1WNtt-------MIIIIt-- Vcc
= 500 mVp.p
PIN 1
Output
~
W
~
200
250
The MC3373 is designed to amplify and detect the
signal from an infrared receiver diode in a remote con·
trol system. The signal is generally in the form of ultra·
sonic bursts. ranging in amplitude from 50 fJ.Vp.p to
several hundred millivolts. The receiver diode may be
directly connected to the MC3373 to save parts; the
input is internally compensated by an ABlC (automatic
bias level control). However. it is advantageous to ac
couple the input. as shown in Figure 1. in order to pro·
vide attenuation of the power line frequency IR inputs.
which are plentiful in most cases.
The input amplifier gain is approximately'equal to the
load impedance at Pin 3. divided by the resistor from
Pin 6 to ground. Again. the low frequency gain can be
reduced by using a small coupling capacitor in series
with the Pin 6 resistor.
~2.8V
--I
100
150
PIN 4 RESISTOR IKILOHMS)
t---t-
APPLICATIONS INFORMATION
FIGURE 6 - TYPICAL SIGNAL WAVEFORMS
PIN 7
Input
50 I1VP.P(min)
-
"""
I"--.. ...............
r-VCC
----o.SV
w
--------------------0
MOTOROLA LINEAR/INTERFACE DEVICES
9·45
E
MC3373
FIGURE 7 -INTERNAL SCHEMATIC
Vee
RI
56 k
Input
Output
Filter
r+t-t-------i:;::021
R13
3.3 k
RIO
10 k
.....- - - - . ........"""'-027
R21
RI5
2.2 k
2.2 k
R24
2.2 k
Circuit Description (Refer to Figure 7)
01-04 set the bias on the amplifier input at approximately 2.8 V. 06-010 form the input amplifier, which
has a gain of about 80 dB when RIPin 6) = o. 05 sinks
The load may be resistive, as shown in the application
circuit, or tuned, as in the test circuit. The amplifier
output is limited by back-to-back clamping diodes, level
shifted, buffered and fed to a negative peak detector.
The detector threshold is set by the external resistor on
Pin 4, and an internal 6.8 k!1 resistor and diode to Vee.
The capacitor from Vee to Pin 4 quickly charges during
the negative peaks and then settles toward the set-up
voltage between signal bursts at a rate roughly determined by the value of the capacitor and the 6.8 k resistor. The external capacitor at Pin 2 filters the ultrasonic
carrier from the pulses.
input current from the photo diode and keeps the amplifier properly biased. 018-020 level shift and buffer
the signal to the negative peak detector, 022 and 023.
Output devices 026 and 027 conduct during peaks and
pull the output, Pin 1, low. The capacitor on Pin 2 filters
out the carrier.
MOTOROLA LINEAR/INTERFACE DEVICES
9-46
®
MCI0320
MCI0320-1
MOTOROLA
Specifications and Applications
Information
TRIPLE 4-BIT
COLOR PALETTE
VIDEO DAC
TRIPLE 4-BIT COLOR PALETTE VIDEO DAC
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MCl 0320 integrates a triple 4-bit digital-to-analog converter
and a 16 x 12 color look-up table into a single 28 pin IC for use
in a high resolution color graphics display system. The outputs
are EIA-343-A compatible red, blue, and green video signals capable of driving single or doubly terminated 50 ohm or 75 ohm
cables directly. Complementary outputs are provided for custom
displays.
Control inputs include BLANK and SYNC to produce the levels
required for vertical and horizontal retrace.
The color look-up table allows up to 16 color combinations (out
of a palette of 4096 possible colors) on the screen at anyone time.
The table can be updated as often as required.
The lower speed digital inputs (WRITE, DATA, and SYNC) are
TTL compatible, whereas the high speed inputs (ADDRESS, PIXEL
CLOCK, and BLANK) can be user programmed to either ECL or
TTL compatability. The address and blank signals are latched into
input registers, facilitating the timing requirements for those signals. Additional registers frame the data as it is presented to the
three DACs, ensuring low glitch area and matched response.
Innovative level translators permit the MC10320 series to be
used in single or dual supply systems, permitting compatability
with most any system configuration. The MC10320 series is fabricated with Motorola's MOSAIC process, which provides both
low power consumption and high speed.
PIN CONNECTIONS
(Top View)
00
01
02
• Triple 4-Bit Video DAC with 16 x 12 Color Look-Up Table
03
• 125 MHz Max Pixel Rate (MC10320). 90 MHz Max
(MC10320-1)
VCC1
SYNC
• User Selectable TTL or ECL Compatability on High Speed
Inputs
VEE1
• Single/Dual Supply Operation (Inputs and/or Outputs May Be
Above/Below Ground)
RSET
• Supply Sensitivity Typically - 34 dB
VEE2
• EIA-343-A Compatible Output Levels
BLANK
VCC2
• Directly Drives 50 or 75 Ohm Cables
• Low Power Dissipation -
684 mW Typical
• Internal Bandgap Reference
TH CTRL
VR
VEE2
VR
• SYNC and BLANK Control Inputs
VB
VG
VB
VG
ORDERING INFORMATION
Maximum
Pixel Rate
125 MHz
90 MHz
MOTOROLA LINEAR/INTERFACE DEVICES
9-47
Device
MC10320L
MC10320L-1
E
MC10320, MC10320·1
BLOCK DIAGRAM
_ VCC1
Data
WRITE 3
4
Threshold
Control
Address
4
4
16 x 12 Bit
Color
look-Up
Table
RAM
BLANK
Pixel Clock
Delay
SYNC
MC10320
MC10320-1
VEE1
ABSOLUTE MAXIMUM RATINGS
Parameter
Value
Units
Vdc
Supply Voltages
VCC1 (Measured to VEE1)
VCC2 (Measured to VEE2)
VEE1 (Measured to VEE2)
VCC2 (Measured to VEE1)
-0.5,
-0.5,
-0.5,
-0.5,
+7.0
+ 7.0
+ 7.0
+ 7.0
Input Voltages
(Address, Data, Wit WG, WB, SYNC, BLANK, PClK,
and Threshold Control)
RSET (Pin 21)
RSET External Resistor
VEE1 -0.5, VCC1 +0.5
VEE2- 0.5, VCC2
0,3.0 k
Vdc
Vdc
Outputs (VR, VR, VG, VG, VB, VB Measured to VEE2)
+2.5, +8.0
Vdc
Junction Temperature
-55, +150
"C
n
"Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant
to imply that the device should be operated at these limits. The "Recommended Operating limits" provide for actual
device operation.
RECOMMENDED OPERATING LIMITS
Parameter
Single Supply -
VCC1, VCC2
VEE1, VEE2
or
Dual Supply -
Typ
Max
Units
4.5
5.0
0
5.5
Vdc
-
-
VCC1, VCC2
VEE1, VEE2
-4.5
4.5
VCC1
VCC2
VEE1
VEE2
-4.5
RSET (Between VCC2 and Pin 21)
ISET (Determined by RSET) .
Rl (load Resistance at Each Output)
Input Voltages -
Min
500
0.55
0
Threshold Control (Pin 11, See Text)
TTL High (Pins 1-3, 5-10, 23, 25-28,
TTL low Pin 11 connected to VEE1)
ECl High (Pins 5-10 only, Pin 11
ECl low connected to VCC1)
VEE1
VEE1 +2.0
VEE1
VCC1-1.13
VEE1
Output Compliance (Measured to VCC2)
Ambient Temperature
-2.0
0
MOTOROLA LINEAR/INTERFACE DEVICES
9-48
0
-5.0
5.0
0
0
-5.0
1.0 k
1.25
-
-
0
-
-5.72
5.5
-
-
-5.72
2.0 k
2.8
75
n
mA
n
VCC1
VCC1
VEE1 +0.8
VCC1
VeC1 -1.48
Vdc
+2.0
+70
Vdc
"C
MC10320, MC10320-1
ELECTRICAL CHARACTERISTICS (See Figure 1 TA
~ 25°C)
Symbol
Min
Typ
Max
Resolution (Each DAC)
Res
4.0
4.0
4.0
Bits
Palette Colors (Active)
(Total Available)
-
-
-
16
4096
Colors
Colors
Integral Nonlinearity
INl
-1/4
0
+1/4
lSB
Differential Nonlinearity
DNl
-1/4
0
+ 114
lSB
Parameter
-
Monotinicity
Output levels Cal VR, VG, VB, relative to VCC2 unless
otherwise noted.
Ref. White Offset (DAC Input ~ 1111)
BLANK, SYNC ~ 1
Units
Guaranteed*
-
lOW
VOW
50
-1.9
400
-15
-
pA
mV
lOB
VOB
16.1
-682
17.2
-645
18.2
-604
rnA
mV
Blank level Relative to Ref. Black
BLANK ~ 0, SYNC ~ 1
10BK
VOBK
1.17
-56.2
1.33
-50
1.5
-43.9
rnA
mV
Sync level - VG Only, Relative to Blank
SYNC, BLANK ~ 0
10SY
VOSY
6.71
-320
7.S3
-286
8.54
-251
rnA
mV
Ref. Black (DAC Input ~ 0000) Relative to
Ref. White, BLANK, SYNC ~ 1
Total Error (Each DAC, Ref. White to Ref. Black)
GER
-S.O
0
+S.O
%
Gain Tracking Error (Any two DACs Cd! Ref. Black)
GTR
-3.0
0
+3.0
%
Output Impedance @J VR, VG, VB
Zo
10
100
Reference Voltage (VCC2 - VRSET, RSET ~ 1.0 kfl)
Pin 21 Output DC Resistance (0 rnA < IREF < 3.0 rnA)
VREF
-1.4
-1.25
3.0
Input Voltage High (Data, WR, WG, WB, SYNC)
low (Data, WR, WG, WB, SYNC)
VIHA
VilA
VEEl +2.0
VEEl
Input Voltage High (Address, PClK, BLANK)
(Threshold Control @ VEEl [TTL Mode))
(Threshold Control @ VCCl [ECl Mode))
VIHB
VIHC
Input Voltage low (Address, PClK, BLANK)
(Threshold Control @J VEEl [TTL Mode))
(Threshold Control @J VCCl [ECl Mode))
Input Current @J 2.4 V (TTL Mode)
@ 0.4 V (TTL Mode)
Input Current @ VCCl - 0.8 V (ECl Mode)
@J VCCl - 1.8 V (ECl Mode)
Input Current @ Pin 11 (Pin 11
@ Pin 11 (Pin 11
~
~
VCC1)
VEE1)
kG
Vdc
G
-
VCCl
VEEl +0.8
Vdc
VEEl +2.0
VCC1-1.13
-
VCCl
VCCl
VllB
VllC
VEEl
VEEl
-
VEEl +0.8
VCC1-l.48
IIHA
liLA
-
-
50
10
150
100
IIHB
IllB
-
100
70
250
200
0
-0.4
-
-
(All Input Pins
Except Pin 11)
-1.1
11TH
IITl
Signal Feedthrough to Outputs Due to
Pixel Clock ((a! 125 MHz for MC10320,
BLANK
90 MHz MC10320-1)
Data
SRR
Power Supply Rejection Ratio (All DACs)
VCCl @ 1.0 kHz
VCCl @ 1.0 MHz
VCCl @50MHz
VEE2 @ 1.0 kHz
VEE2 @ 1.0 MHz
VEE2 @ 50 MHz
Power Supply Sensitivity"
PSRR
-
-5.0
-1.0
-
-
-
-
-
-
-50
-50
-SO
SO
45
30
50
33
12
0.02
-
-
",A
rnA
dB
-
-
0.12
dB
%/%
rnA
Power Supply Requirements (See Figure 1)
VCCl Current (VCCl - VEEl ~ 5.0 V)
VEEl Current (VCCl - VEEl ~ 5.0 V)
VCC2 Current (VCC2 - VEE2 ~ 5.0 V)
VEE2 Current (VCC2 - VEE2 ~ 5.0 V,
Includes output currents)
Power Dissipation (@ 5.0 volt supplies)
ICCl
IEEl
ICC2
lEE
-
PD
-
50
-50
28
-92
70
-70
45
-120
-
S84
894
*Guaranteed by linearity tests.
**(VCC1 - VEE1) and (VCC2 - VEE2) are each varied from 4.5 to 5.72 volts, but not simultaneously.
MOTOROLA LINEAR/INTERFACE DEVICES
9-49
mW
IJ
MC10320, MC10320-1
TIMING CHARACTERISTICS (See Timing Diagram -
Figure 2)
Symbol
Parameter
READ Cycle (Display Mode)
Address, BLANK Setup Time
Address, BLANK Hold Time
Clock Pulse Width - High
Clock Pulse Width - Low
Pipeline Delay
DAC Prop Delay (PCLK to 50% Point)
DAC Prop Delay Difference (DAC to DAC)
SYNC Prop Delay
Output Settling Time (± 1/2 LSB to ±.1'2 LSB)
Output Slew Rate
Glitch Area
tRSA
tRHA
tPWH
tPWL
tplPE
tDPD
tDPD~
tSPD
tDS
SR
AG
Min
Typ
-
1.5
1.5
3.0
3.0
1.0
9.0
0.5
6.0
3.0
300
20
-
1.0
-
-
-
Max
Units
1.0
-
ns
ns
ns
ns
clk cycle
ns
ns
ns
ns
V/p.s
pV-S
-
ns
WRITE Cycle (RAM Update Mode)
Address Setup Time
Address Hold Time
Clock Setup Time
Clock Hold Time
Data Setup Time
Data Hold Time
Write Pulse Width
tWSA
twHA
twsc
tWHC
tWSD
twHD
twpw
-
1.5
1.5
5.0
10
90
10
90
-
-
-
-
TEMPERATURE CHARACTERISTICS (O"C to + 70"C)
Typ
Units
Offset (at Ref. White)
±20
ppm GS/"C
DAC Gain
±100
ppm GSI"C
Gain Tracking (any 2 DACs @ Ref. Black)
±50
ppm GSI"C
Linearity
±100
ppm GSI"C
Parameter
Note: ppm
Gsrc =
Parts Per Million of Grey Scalef'C.
FIGURE 1 - BLOCK DIAGRAM
24
VCC1
4 25-28
Data
1-3
3
WRITE
19
r-----+---~ Red
Output
Threshold
Control
Address
11
tl
4 5-8
16 x 12 Bit
i!?
'0,
4
"
II:
':5
Co
Color
Look-Up
Table
RAM
E
BLANK
10
i!?
~
r-----+--....~ Green
Output
u;
"
"a
~
' 5.
0
Clock
SYNC
VEE1
>-
9
Delay
:J
(/l
23
4,22
a.Co
MC10320
MC10320-1
Note:
Electrical Characteristics are tested with both single and dual supply configurations at the typical supply voltages listed in the "Recommended
Operating Limits." Input levels are TTL or EeL, as appropriate. Threshold control input is set at Vee1, or VEE1, as appropriate. Exceptions to
these conditions are noted in the Characteristics.
MOTOROLA LINEAR/INTERFACE DEVICES
9-50
MC10320, MC10320·1
FIGURE 2 - TIMING DIAGRAM
READ CYCLE (PIXEL DISPLAY MODE)
PCLK
(1)
(3)
VR,VB
(2)
,----.,
tSPD
(7)
VG
,".,J
Output
Notes:
(7)
1-----+---+-- Blank~
Level
Outputs
tos
Level
Sync
-Level
measured from:;!:: 1/2 LSB to ± 1/2 LSB.
to PO measured to output's 50% point.
All PCLK measurements are made to/from
the appropriate TTL or Eel threshold of the PCLK.
tSPD measured from SYNC threshold to output 50% point.
WRITE CYCLE (RAM UPDATE MODE)
PCLK
Address
Data
______
-J'~--------------~'~----~-----------------J
---------4--~r~----------------~~~--------------------fl--
WR,WG,
andlor WB
~---------twpw-------~
MOTOROLA LINEAR/INTERFACE DEVICES
9-51
MC10320, MC10320-1
PIN DESCRIPTIONS
Symbol
WR
Pin
1
PIN DESCRIPTIONS
Description
Symbol
Write Enable (Red) - Taking this pin low
enables the data (Pins 25-28) to be written
into the selected address location for the
RED look-up table. The data is latched in
the RAM when the pin is high.
VG
15
Same as Pin 13. except for the GREEN DAC.
The SYNC signal appears at this output.
Waveform polarity is "sync down."
VG
16
Same as Pin 14. exceptforthe GREEN DAC.
The SYNC signal appears at this output.
Waveform polarity is "sync up."
VR
17
Same as Pin 13. except for the RED DAC.
VR
18
Same as Pin 14. except for the RED DAC.
VCC2
19
Power supply pin for the circuitry to the
right of the supply option translators (See
Block Diagram). Its reference is VEE2. and
is nominally 5.0 volts more positive than
VEE2·
VEE2
20
Power supply pin for the circuitry to ths
right of the supply option translators (See
Block Diagram). This is the reference for
VCC2. and is typically 5.0 volts below it. It
is internally connected to Pin 12. This pin
and Pin 12 must be connected externally.
RSET
21
Current setting resistor - A user supplied
low inductance resistor is to be connected
between VCC2 and this pin to set the DAC's
full scale current. An RSET of 1.0 kO. combined with load resistors of 37.50 (at Pins
13.15.17) provides output signals consistent with EIA-343-A. The RSET resistor is to
be between 500 0 to 2.0 kO. The voltage at
this pin is 1.25 volts below VCC2.
VEE1
22
Power supply pin for all circuitry prior to
the supply option translators (See Block
Diagram). This is the reference for VCC1.
and is typically 5.0 volts below it. Internally
it is connected to Pin 4. This pin and Pin 4
must be connected externally for proper
operation.
SYNC
23
A logic low on this input forces the GREEN
DAC to increase its output current by 7.6
mA (RSET = 1.0 kO). providing the sync
level of 286 mV (RL = 37.50) below blanking. The BLANK input must have been
asserted previously. SYNC is independent
of PCLK.
VCC1
24
Power supply pin for the circuitry to the left
of the supply option translators (See Block
Diagram). Its reference is VEE1. and is nominally 5.0 volts more positive than VEE1.
00-03
25-28 Data inputs - Information on these pins
is written into the color look-up table. at
the locations specified by the address
lines. by taking the appropriate Write pin
low. Pin 28 is DO (LSB). and Pin 25 is 03
(MSB).
WG
2
Write Enable (Green) - Same as Pin 1.
except for the GREEN table.
WB
3
Write Enable (Blue) - Same as Pin 1.
except for the BLUE table.
VEE1
AO-A3
4
5-8
Power supply pin for all circuitry prior to
the supply option translators (See Block
Diagram). This is the reference for VCC1.
and is typically 5.0 volts below it. Internally
it is connected to Pin 22. This pin and Pin
22 must be connected externally for proper
operation.
Address lines - They are used to select
one of sixteen 12-bit words in the color
look-up table for both reading and writing.
The address is latched on the PCLK rising
edge. and presented to the DACs on the
following rising edge. Pin 5 is A3 (MSB).
and Pin 8 is AO (LSB).
PCLK
9
Pixel clock - Address and BLANK signals
are latched on the rising edge ofthis clock.
The following rising edge presents the data
in the look-up table (of the selected
address) to the DACs. SYNC is independent
from PCLK.
BLANK
10
Blank,ing ~ A logic low overrides the color
look-up table. and forces the three DACs to
the blanking level. The BLANK input is
latched. the same as the address lines.
ThCntl
11
Threshold Control - When tied to VCC1.
the PCLK. AO-A3. and BLANK inputs are at
ECL levels with respect to VCC1. When tied
to VEE1 (Pin 4 or 22). the same inputs are
at TTL levels with respect to VEE1.
VEE2
12
Power supply pin for the circuitry to the
right of the supply option translators (See
Block Diagram). This is the reference for
VCC2. and is typically 5.0 volts below it. It
is internally connected to Pin 20. This pin
and Pin 20 must be connected externally.
VB
13
The output of the BLUE 4-bit DAC. Output
compliance is ± 2.0 volts with respect to
VCC2. and output impedance is typically
100 kO. Designed for a typical load of 37.5
O. the load may be between 0 and 75 O.
The output is a current sink.
VB
14
The complementary output of the BLUE
DAC. This output may be used in conjunction with Pin 13 for twisted pair signal
transmission or for custom interface
schemes. If unused. it must be tied to VCC2.
Pin
Description
MOTOROLA LINEAR/INTERFACE DEVICES
9-52
MC10320, MC10320-1
FUNCTIONAL DESCRIPTION
GENERAL
The MC10320 is a triple video DAC, with a 16 location color palette RAM, designed for high resolution
graphics systems. The maximum pixel speed capability is 125 MHz for the MC10320, and 90 MHz for the
MC10320-1. The input configurations are compatible
with TTL or ECl systems, and the outputs are directly
compatible with monitors having 50 n or 75 n RGB
inputs. Using the external components recommended
in this data sheet, the outputs will conform to EIA-343A levels. The output levels are adjustable by means
of the RSET resistor.
The MC10320 contains three 4-bit DACs whose inputs
are fed from a color palette RAM (data is loaded by the
user). The RAM contains 16 locations (each 12 bits
wide). Each 4-bit nibble of each RAM address can be
individually loaded, so that every address location can
have anyone of a possible 4096 codes. The DAC output
levels are determined by the contents of the selected
RAM address (by means of the address inputs).
The MC10320 contains an input register to accept the
address and Blanking information, and a second register located between the RAM and the DAC inputs. This
arrangement ensures that the RAM data is presented to
the 3 DACs simultaneously, which ensures the DAC outputs will transition simultaneously. The registers are
toggled by the PClK input's rising edge.
The BLANK input overrides the RAM data to the DACs,
and forces the outputs to the Blanking level. The SYNC
input goes directly to the Green DAC, bypassing the
RAM and the latches, forcing the green DAC output to
shift. The combination of BLANK and SYNC produce
the video sync level.
Referrin!] to the Block Diagram, the input stage (circuitry to tne left of the Supply Option Translators) and
the output stage (to the right of the Translators) can be
operated at different supply voltages. The only restriction is that the output stage cannot be more positive
than the input stage.
VEE1, independent of VCC1. With Pin 11 connected to
VCC1, the inputs are fully compatible with the 10KH
family of ECl devices, having a nominal threshold of
1.3 volts below VCC1, independent of VEE1.
Figure 3 depicts a typical input stage configuration,
and Figure 4 indicates the typical input current. Figure
4 applies to both ECl and TTL modes of operation. The
inputs should be kept within the range of VEEl to VCC1.
If an input is taken more than 0.3 volt below VEE1, or
more than 0.5 volts above VCC1, excessive currents will
flow through that input, and the DAC output waveforms
will be distorted.
SYNC
The SYNC input goes directly to the green DAC, independent of the clock. When taken to a logic "0", the
output current at VG is forced to increase by 6.1 x ISET.
For a standard EIA-343-A system, the shift is 7.63 mA.
resulting in a 286 mV change in the output voltage. The
SYNC input does not override the RAM data, requiring
that the BLANK input have been asserted (logic "0")
previously in order to obtain a proper video sync level.
The SYNC input does not affect the red or blue DACs.
The SYNC input is always TTL compatible, with a
nominal threshold of 1.5 volts above VEE1, independent
ofVCC1·
Figure 3 depicts the input stage configuration, and
Figure 4 indicates the typical input current. The input
should be kept within the range of VEEl to VCC1. If the
input is taken more than 0.3 volt below VEE1, or more
than 0.5 volts above VCC1, excessive currents will flow
through the input, and the DAC output waveforms will
be distorted.
DATA 11-41, WR, WB, WG
The data (DO, Dl, D2, D3), and WRITE inputs are the
"low speed" inputs, as they do not have to operate at
the same high speed as the above mentioned inputs.
These inputs are independent of the PClK, although
they are normally used in conjunction with the clock.
Pins 25-28 are the data inputs to the color palette
RAM, and are used for updating the RAM information.
The information is written into the RAM at the address
which was previously clocked into the input register,
while the appropriate WRITE input is low, and then
latched in when the WRITE input is taken high. The
required data setup and hold times (mentioned in the
Timing Characteristics) are with respect to the rising
edge of the WRITE input. Ifthe same data is to be loaded
into different nibbles (color sections) of the same
address, the appropriate WRITE inputs may be taken
low simultaneously, or sequentially. WR, WB, and WG
control the loading of data into the red, blue and green
nibbles respectively.
The data and WRITE inputs are always TTL compatible, with a nominal threshold of 1.5 volts above VEE1,
independent of VCC1.
INPUTS
Address. PCLK. BLANK
The Address, PClK (pixel clock), and BLANK inputs
are the "high speed" inputs capable of the maximum
pixel clock rates mentioned above. The Address and
BLANK are latched into the input register on the rising
edge of the PClK, as long as the required setup and
hold times are adhered to. The data at that RAM address
(or the BLANK signal) is then presented to the DAC
inputs on the next PClK rising edge.
The BLANK input, when taken to a logic "0" and
clocked in as described above, will override the RAM
data presented to the DACs, and force the 3 DAC outputs
to the Blanking level (see Figure 2).
These 6 input pins can accept either TTL or ECl signals. With the Threshold Control pin (Pin 11) connected
to VEE1, the inputs are TTL compatible with respect to
VEE1, having a nominal threshold of 1.5 volts above
MOTOROLA LINEAR/INTERFACE DEVICES
9-53
MC10320, MC10320-1
OUTPUTS
The six DAC outputs (VB, VB, VG, VG, VR, VR) at Pins
13-18 are high impedance current sink outputs, with
the current flow into the pins, never out. VG, VB, and
VR provide the conventional video polarity (sync down),
while the complementary outputs provide a "sync up"
waveform. The output loads must be connected from
the outputs to VCC2, or to a pullup voltage, such that
the output voltages are within ± 2.0 vol.ts of VCC2.
Unused outputs must be connected to VCC2, and not
left open.
The output current (for the gray scale) at Pins 13, 15,
and 17 is related to the digital inputs (of the DACs) and
the reference current (lSET at Pin 21, equal to 1.25 VI
RSET) by the following equation:
In most applications, it will be advantageous to set
the Blanking level while updating the RAM. If Blanking
is not set, the DAC outputs will change unpredictably
while new data is being written into the RAM.
Figure 3 depicts a typical input stage configuration,
and Figure 4 indicates the typical input current. The
inputs should be kept within the range of VEE1 to VCC1.
If an input is taken more than 0.3 volt below VEE1, or
more than 0.5 volts above VCC1, excessive currents will
flow through the input, and the DAC output waveforms
will be distorted.
FIGURE 3 - TYPICAL INPUT StAGE
- .......- - - - - . . . . . . - -......--VCC1
I
_ (15-A) x ISET x 14.63
OUT(GS) 16
Out
1.0 k
Input >----1f----1~"""I'v--I
where A = binary value of the digital input (0-15). A
digital input of 1111 (15) produces no output current,
and therefore the most positive output voltage, referred
to as "Reference White." An input code of 0000 (0)
results in the maximum current, and therefore the gray
scale's most negative output voltage, referred to as
"Reference Black."
After the BLANK input is asserted and clocked in as
described above, the RAM data to the DACs is overriden,
and the output current is set at:
Vrel
50 k
VEE1
VEE1
IOUT(8LANK) = ISET x 14.864
FIGURE 4 -INPUT CURRENT AT PINS 1-3, 5-10, 23, 25-28
LlIOUT(SYNC)
I
II
0
1.0
2.0
3.0
4.0
~
(nominal value)
5.0
'OUT(SYNC) = ISET x 20.97
./
/
VCCI - VEE1
ISET x 6.1
5.0 Volts_
/
-200
-400
-1.0
=
The four outputs of the red and blue DACs are not
affected by SYNC. The current increase at VG results
regardless of the digital input to the Green DAC. To
obtain the correct (EIA-343-A) sync level, the BLANK
output level must have previously been set. Otherwise
the green output will simply shift by the above amount
from the grey scale level in effect at the time the SYNC
input was asserted. If both BLANK and SYNC are
asserted, the output current at VG is:
0
0
(nominal value)
When the SYNC input is asserted, the output current
at VG is increased by:
1000
800
(nominal value)
6.0
(nominal value)
INPUT VOLTAGE (VOLTSI
The sum of the currents into each pair of outputs is
a constant equal to [20.93 x ISETl for the VGNG pair,
and [14.824 x ISETl for the VRNR, and VBNB pairs.
Table 1 summarizes the above information.
THRESHOLD CONTROL
The Threshold Control input (Pin 11) is to be connected directly to VCC1 to set Pins 5-10 to ECl compatibility, or directly to VEE1 to set the pins to TTL
compatibility. A series resistor should not be used
with this input, and it should not be connected to any
other voltage as an incorrect threshold will result at
Pins 5-10. Bias current at Pin 11 is approximately 400
/LA out of the pin when at VEE1, and 0 /LA when at
VeC1. If the pin is taken more than 0.3 volt below
VEE1, excessive currents will flow through this input,
and the DAC output waveforms will be distorted.
The voltage levels generated at the outputs depend
on the value of ISET and the load impedance. An RSET
of 1.0 kn (lSET = 1.25 mAl, and a load of 37.5 n (doubly
terminated 75 n system) at each output will generate
the standard EIA-343-A levels. The output voltages must
be kept within the range of + 2.0 to - 2.0 volts with
respect to VCC2. If any part of the output's waveform
is outside this range, its linearity will be affected.
MOTOROLA LINEAR/INTERFACE DEVICES
9-54
MC10320, MC10320-1
TABLE 1
Output Current (mAl at:
Video
level
A
:=0
--
VR, VB
VG
VR,VB
VG
Gray Scale
('15-AI x ISET)
1.09
Same as
VB, VR
('AI x ISET + 1.06 I
)
1.09
SET
CAl x ISET + 7.17 ISET)
1.09
Blank
ISET x 14.824
Same as
o mA
ISET x 6.1
Sync + Blank
ISET x 14.824
o mA
o mA
VB,VR
ISET x 20.93
DAC digital Input (binary value), ISET IS the current Into Pin 21.
REFERENCE VOLTAGE (RSET)
The reference current for the DACs is supplied from
an internal band-gap reference with a typical TC of
= ± 50 ppmrC. The voltage at RSET (Pin 21) is a constant 1.25 volts below VCC2, and an external resistor
RSET is to be connected from VCC2 to Pin 21. The
current ISET is therefore equal to 1.25 V/RSET- Internally, equal reference currents are supplied to the
three DACs such that their outputs are matched within
±3.0%.
RSET should normally be between 500 nand 2.0 k!1.
With values less than 500 fl, the current at Pin 21
approaches an upper limit, resulting in a nonlinear
relationship for the MC10320. With values greater
than 2.0 kfl, instability and oscillations of the reference amplifier will result. For this reason, current to
Pin 21 should not be supplied from a current source.
Additionally, the resistor should be noninductive
(non-wirewound). Metal film resistors, available with
low TCs, are recommended. The resistor should be
physically adjacent to the MC10320 to avoid the inductive effects of long PC board tracks. Figure 5 indicates
the voltage/current characteristics at Pin 21.
FIGURE 5 -
~
System
--
N
0::
1.25
~
:!
1.24
0.5
l-
0.9
2.1
2.5
VCC2
Gnd
+5.0 V
VEE2
Gnd
Single Supply
Gnd
-5.0 V
Gnd
-5.0 V
+5.0 V
Gnd
Gnd
-5.0 V
TIMING
Timing diagrams for the Read (display) mode and the
Write (RAM update) mode are shown in Figure 2.
In the READ mode, the clock may be any frequency
up to 125 MHz for the MC10320, and up to 90 MHz for
the MC10320-1. Duty cycle is not important as long as
the minimum low and high times are observed. On each
clock's rising edge, a new address is clocked in, and the
previous address' information is supplied to the DACs
from the look-up table. If the BLANK line is taken to a
Logic "0", it will override the information to the DACs
on the next clock rising edge, and the 3 DACs will be
taken to the blanking level. The SYNC input, when taken
to a Logic "0", drives the Green DAC directly with only
a small internal propagation delay. The output of the
Green DAC will then change with respect to the last
address input. For this reason, the SYNC input should
normally be used only after asserting the BLANK input.
In the WRITE mode, the clock is used only to eriter
the address where the new data is to be written. The
PCLK input may continue to toggle if the address inputs
are stable during the write period, or the clock may be
stopped while writing. Data is then entered into each of
3 color sections of that address by taking low the appropriate WRITE lines (WR, WG, WB). If the same four bits
are to be stored in different color locations of the same
address, the appropriate WRITE lines may be taken low
simultaneously. If the BLANK input is held low during
the Write operation, the DAC outputs will be held in a
known state.
V re! versus ISET
1.7
ISET ImAI
VEE1
+5.0 V
The current requirement for the input stage (lCC1) is
typically 50 mA. and the majority of that current (+ 0,
-4.0 mAl flows out of VEE1. The current requirement
for the output stage (ICC2) is typically 28 mAo Out of
VEE2 flows that current, plus the current due to the
outputs and ISET. In a typical application the output
currents total =63 mA, and ISET is =1.25 mA, giving a
total IEE2 of =92 mA.
The minimum voltage at VCCl for memory retention
is =1.5 volts.
Proper bypassing of the supplies at the IC is critical
due to the high frequencies involved. Further information can be found in the Applications section.
I---
1.3
VCC1
Single Supply
Dual Supply
1.26
0
2:
z
TABLE 2
2.9
POWER SUPPLIES
The MCl 0320 may be used in a single or dual supply
system, depending on the system logic levels, and/or
the output requirements (See the Applications Section). Table 2 indicates permissable configurations.
The only restriction is that the output stage (VCC2/VEE2)
cannot be more positive than the input stage. The positive supplies may range from + 4.5 to + 5.5 volts, and
negative supplies may range from - 4.5 to - 5.72 volts.
MOTOROLA LINEAR/INTERFACE DEVICES
9-55
II
MC10320, MC10320-1
APPLICATIONS INFORMATION
than a few inches), they should be terminated according
to transmission line theory. Otherwise reflections back
to the signal sources can occur, disrupting their operation. Additionally, the overshoots and undershoots
which will occur at the MC10320's input pins can cause
its operation to be disrupted, resulting in an incorrect
output.
Additional information regarding the transmission
characteristics of PC board tracks can be found in
Motorola's MECl System Design Handbook
(HB205R1).
POWER SUPPLIES, GROUNDING
The PC board layout, and the quality of the power
supplies and the ground system at the IC are very
important in order to obtain proper operation. Noise,
from any source, coming into the device can result in
an incorrect output due to interaction with the analog
portion of the circuit. At the same time, noise generated
within the MC10320 can cause incorrect operation if that
noise does not have a clear path to ac ground.
The power supply pins at both the input and output
sections of the MC10320 must be decoupled to ground
at the IC (within 1" max) with a 10 /LF tantalum and a
0.1 /LF ceramic. Tantalum capacitors are recommended
since electrolytic capacitors simply have too much
inductance at the frequencies of interest. The quality of
the VCC and VEE supplies should then be checked at
the IC with a high frequency scope. Noise spikes (always
present among digital circuits) can easily exceed 400
mV peak, and if they get into the analog po~tion of the
IC, the output waveforms can be disrupted. Noise can
be reduced by inserting resistors and/or inductors
between the supplies and the IC.
If switching power supplies are used, there will usually be spikes of 0.5 volts or greater at frequencies of
50-200 kHz. These spikes are generally more difficult to
reduce because of their greater energy content. 1n
extreme cases, 3-terminal regulators (MC78l05ACP,
MC7805.2CT), with appropriate high frequency filtering,
should be used and dedicated to the MC10320.
The ripple content of the supplies should not allow
their magnitude to exceed the values in the Recommended Operating Limits.
The PC board tracks supplying VCC and VEE to the
MC10320 should preferably not be at the tail end of the
bus distribution, after passing through a maze of digital
circuitry. The MC10320 should be close to the power
supply, or the connector where the supply voltages
enter the board. If the VCC and VEE lines are supplying
considerable current to other parts of the board, then
it is preferable to have dedicated lines from the supply
or connector directly to the MC10320.
The two VEE 1 pins (4 and 22) must be connected
directly together. Likewise, the two VEE2 pins (12 and
20) must be connected directly together. Any long path
between them can cause stability problems due to the
inductance (@ 125 MHz) of the PC tracks. The ground
return for the analog signals must be noise free.
Input Configurations
The unique configuration of the MC10320's power
supply system permits its use in an all TTL, or all ECl,
or mixed TTl/ECl environments, with the secondary
capability of having the output levels be above or below
ground. For standard TTL inputs refer to Figure 7. For
systems using "above ground ECl" (ECl circuitry operated between ground and + 5.0 volts, rather than - 5.2
volts), refer to Figure 8. The MC10H350 translators will
change the above ground ECl levels to the TTL levels
required by the SYNC, Data and WRITE inr,uts, while
the Threshold Control will set the thresholds of the
Address, Clock and BLANK inputs to the ECl levels. For
standard (below ground) ECl levels, refer to Figure 9.
Since VCC2 cannot be more positive than VCC1, they
are both connected to ground level in this Case.
In the case where all inputs are above ground, but
the low speed inputs (Data, WRITE, and SYNC) are
connected to TTL circuits, while the high speed inputs
are connected to above ground ECl circuits, refer to
Figure 10. In the case where the low speed inputs are
connected to standard TTL, and the high speed inputs
are connected to standard (below ground) ECl, refer
to Figure 11.
Output Configurations
The output waveforms may be above or below
ground, depending on the choice of supply voltages for
VCC2 and VEE2, but the output voltages are always
referenced to VCC2. In Figure 12, the outputs are referenced to + 5.0 V, and produce a 1.0 volt p-p waveform
when used with a doubly terminated 75 fl load, and an
RSET of 1.0 kfl. The + 5.0 volt supply is the "ac ground"
in this case. If the outputs must be referenced to system
ground rather than the + 5.0 volt supply, the circuit of
Figure 13 will provide the required level shifting. Figure
14 provides ground referenced outputs with a range of
o to -1.0 volt. In Figure 15, the outputs are pulle·d up
to a voltage different from VCC2, providing an offset
(+ 1.0 volt offset in the figure). In Figure 15 the complementary outputs should be connected to the + 1.0
volt pullup voltage. The voltage at VR, VG, and VB (and
the complementary outputs) must always lie within the
range of ± 2.0 volts with respect to VCC2.
Figure 6 illustrates the output voltage range, with
respect to VCC2 or a pullup voltage, of the six outputs
(Rl ~ 37.5 fl, RSET ~ 1.0 kfl):
PC Board layout
Due to the high frequencies involved, and in particular, the fast edges of the various digital signals, proper
PC board layout is imperative. A solid ground plane is
necessary in order to have known transmission characteristics, and also to minimize coupling of the digital
signals into the analog section. Use of wire wrapped
boards should definitely be avoided.
Each PC track should be considered a transmission
line, and if they are of any considerable length (more
MOTOROLA LINEAR/INTERFACE DEVICES
9-56
MC10320, MC10320-1
FIGURE 6 -
mV
0
OUTPUT LEVELS
VR.VB
VG
Ref. White
Ref. White
VR.VB
Blank - - t - - S y n c
-100
-200
-300
1
1
Grey Scale
Grey Scale
j
j
Blank
Ref. Black
I
I
-400
-500
-600
-700
-800
-900
-1000
Ref. Black
Blank
11
Note: RSET = 1.0 k. RL = 37.5
Ref. Black
Blank
Grey Scale
Sync
Ref. White
n. above values are typical.
AGURE 7 -
TTL INPUTS
+5.0 V
5.0
SYNC
4
Data
2.0
3
WRITE
TTL
0.8
4
Address
--.
VR
MC10320
Red
VIDEO DAC
w/RAM
See
--.
VG
PCLK
o
Green
BLANK
VEEl
--.
VB
Threshold
Control
VEE2
=
Blue
Note: VCC2NEE2 may
be above or below ground.
MOTOROLA LINEAR/INTERFACE DEVICES
9-57
Figures
12-15
MC10320, MC10320·1
FIGURE 8 -
ABOVE GROUND ECl INPUTS
VR
~
MC10320
Above
Ground
ECl
Address
Red
See
Figures
-
VIDEO DAC
4
12-15
VG
w/RAM
~
Green
PClK
BLANK
+5.0 V
VB
Threshold
Control
VEEl
~
Blue
-=-
VEE2
Note: VCC2NEE2 may
be above or below ground.
FIGURE 9 -
II
Data
WRITE
Std.
ECl
2X
MC10
H350
4
3
-5.2 V
-1. 48
8
-1.95~
STANDARD ECl INPUTS
MC10320
VIDEO DAC
Address-r-..;..4--1
w/RAM
PClK----I
BLANK ------1
Threshold
=
-5.2 V
MOTOROLA LINEAR/INTERFACE DEVICES
9-58
MC10320, MC10320-1
FIGURE 10 - lOW SPEED INPUTS @ TTL,
HIGH SPEED INPUTS @J ABOVE GROUND ECl
VCC2
Cl{
5'O
2.00
TTL
Inputs {
0.: 1"0"
SYNC
4
Data
I
WRITE
4'19EJ'
"1" {
3.B7 .....
Address
r:::l
3.05 ~
BLANK
3.52
--.
VG
--.
VB
--.
Red
Me10320
VIDEO DAC
w/RAM
Above
Ground {
ECl
VR
3
Green
4
PClK
Blue
-
Threshold
+5.0 V
See
Figures
12-15
VEE2
Note: VCC2NEE2 may
be above or below ground.
FIGURE 11 - LOW SPEED INPUTS @ TTL,
HIGH SPEED INPUTS @ STANDARD ECL
-.
Red
a.Bl
LIJ
. :.,' :.".:. {
"1 ''':
Std
-1.13 , •..•.•
{
ECl
-1.48
-1.95
VIDEO DAC
w/RAM
VG
-.
VB
-.
Green
Address
Clock
BLANK
2X
MC10
H125
-5.2
....- - - i
Blue
Threshold
Control
~--~----~~~
Note: VCC2NEE2 may
be above or below ground.
MOTOROLA LINEAR/INTERFACE DEVICES
9-59
See
Figures
12-15
MC10320, MC10320-1
FIGURE 12 - SINGLE +5.0 VOLT SUPPLY,
OUTPUTS ABOVE GROUND
VCC1
SYNC
4
Data
Inputs
See Figures
7,8,10,11
VR
- - - . Red
3
WRITE
MC10320
Address
4
VIDEO DAC
w/RAM
Clock
VG
"'' NC
- - - . Green
+4.0 V , )
Output Waveform
BLANK
VB
- - - . Blue
Threshold Control
-
VEE1
-=-
FIGURE 13 - SINGLE +5.0 VOLT SUPPLY, OUTPUTS
REFERENCED TO GROUND
II
+5.0 V
VCC1
VCC2~~~~~--~~----~----~~,
50n
Inputs
See
Figures
7,8,
10,11
MC10320 VR
VIDEO DAC VG
w/RAM
VB
40n
50
Output Waveform
n
Ir=;:f===~~----~
Clock
BLANK
Red
VEE2
Threshold Control
VEE1
75
n
Q1-Q3: 2N3906 or Equivalent
Diodes: 1N4004 or Equivalent
Resistors: 1/8 W
Green
75H
75n
200n
Blue
MOTOROLA LINEAR/INTERFACE DEVICES
9-60
Outputs
MC10320, MC10320-1
FIGURE 14 - SINGLE OR DUAL SUPPLY,
OUTPUTS BELOW GROUND
VCC1
SYNC
4
Data
Inputs
See Figures
7-11
VR
3
WRITE
-.Red
MC10320
4
Address
Clock
VIDEO DAC
w/RAM
OV
VG
t--'-'+.....-t<» - . Green -1.0 V
J A."'YJL-\..r
BLANK
Output Waveform
VB
Thrsh. Ctrl.
- - . Blue
VEE1
-5.2 V
FIGURE 15 - SINGLE OR DUAL SUPPLY, OUTPUTS ABOVE
GROUND, REFERENCED TO GROUND
+1.0V
VCC1
SYNC
Data
Inputs
See Figures
7-11
WRITE
Address
4
3
4
rV:..:.R+.......~»
-.
Red
MC10320
VIDEO DAC
w/RAM
Clock
+1.0VAA
rV;..:G+.......~»
--.
Green
J
"'Y-\..r
OV~L---------~~
BLANK
Output Waveform
VB
Thrsh. Ctrl.
- - . Blue
VEE1
-5.2 V
MOTOROLA LINEAR/INTERFACE DEVICES
9-61
II
MC10320, MC10320·1
GLOSSARY
INTEGRAL NON-LINEARITY - The maximum error of
an AID, or DAC, transfer function from the ideal straight
line connecting the analog end points. This parameter
is sensitive to dynamics, and test conditions must be
specified in order to be meaningful. This parameter is
the best overall indicator of the device's performance.
BANDGAP REFERENCE - A temperature stable voltage
reference circuit based on the predictable base-emitter
voltage of a transistor.
BIPOLAR INPUT/OUTPUT - A mode of operation
whereby the analog input (of an AID), or output (of a
DACl. includes both negative and positive values.
Examples are - 5.0 to + 5.0 V, - 2.0 to + 8.0 V, etc.
LSB - Least Significant Bit. It is the lowest order bit of
a binary code.
DAC CURRENT GAIN - The internal gain the DAC
applied to the reference current to determine the full
scale output current. The actual maximum current out
of a DAC is one LSB less than the fuli scale current.
LINE REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the input to the
regulator is varied. The error is typically expressed as
a percent of the nominal output voltage.
DIFFERENTIAL GAIN - In video systems, differential
gain is a component's change in gain as a function of
luminance level. In a color picture. saturation will be
distorted if the differential gain is not zero.
LOAD REGULATION - The ability of a voltage regulator
to maintain a certain output voltage as the load current
is varied. The error is typically expressed as a percent
of the nominal output voltage.
DIFFERENTIAL NON-LINEARITY - The maximum
deviation in the actual step size (one transition level to
another) from the ideal step size. The ideal step size is
defined as the Full Scale Range divided by 2n. This error
must be within ± 1 LSB for proper operation.
MONOTONICITY - The characteristic of the ,ransfer
function whereby increasing the input code (of a DAC),
or the input Signal (of an AID), results in the output never
decreasing. Non-monotonicity occurs if the differential
non-linearity exceeds - 1 LSB.
DIFFERENTIAL PHASE - In video systems, differential
phase is the change in the phase modulation of the
chrominance signal as a function ofthe luminance level.
The hue in a color picture will be distorted if the differential phase is not zero.
MSB - Most Significant Bit. It is the highest order bit
of a binary code.
ECL -
where each "A" coefficient has a value of 1 or O.
NATURAL BINARY CODE N
Emitter coupled logic.
FULL SCALE RANGE (Actual) - The difference between
the actual minimum and maximum end points of the
analog input (of an AID). or output (of a DAC).
A binary code defined by:
= An2n + ... + A323 + A222 + A121 + A020
NYQUIST THEORY -
See Sampling Theorem.
OFFSET BINARY CODE - Applicable only to bipolar
input (or output) data converters, it is the same as Natural Binary, except that all zeroes corresponds to the
most negative output voltage (of an DAC). while all ones
corresponds to the most positive output.
FULL SCALE RANGE (Ideal) - The difference between
the actual minimum and maximum end points of the
analog input (of an AID). or output (of a DAC). plus one
LSB.
OUTPUT COMPLIANCE - The maximum voltage range
to which the DAC outputs can be subjected, and still
meet all of the specifications.
GAIN ERROR - The difference between the actual and
theoretical gain (end point to end point), with respect
to the reference, of a data converter. The gain error is
usually expressed in LSBs.
GLITCH AREA - The energy content of a glitch, specified in volt-seconds. It is the area under the curve of
the glitch waveform.
POWER SUPPLY REJECTION RATIO - The ability of a
device to reject noise andlor ripple on the power supply
pins from appearing at the outputs. An ac measurement, this parameter is usually expressed in dB
rejection.
GREY CODE - Also known as reflected binary code, it
is a digital code such that each code differs from adjacent codes by only one bit. Since more than one bit is
never changed at each transition, race condition errors
are eliminated.
POWER SUPPLY SENSITIVITY - The change in a data
converters performance with changes in the power supply voltage(s). A dc measurement, this parameter is usually expressed in percent of full scale versus a percent
change in the power supply voltage.
MOTOROLA LINEAR/INTERFACE DEVICES
9-62
MC10320, MC10320-1
PROPAGATION DELAY - For a video DAC, the time
from when the clock input crosses its threshold to when
the DAC output(s) reach the 50% point of the transition.
interest) of the analog signal to be digitized in order to
preserve the information of that analog signal.
SETTLING TIME - For a video DAC, the time required
for the output to change (and settle in) from an initial
± 1/2 LSB error band to the final ± 1/2 LSB error band.
QUANTITIZATION ERROR - Also known as digitization
error or uncertainty. It is the inherent error involved in
digitizing an analog signal due to the finite number of
steps at the digital output versus the infinite number of
values at the analog input. This error is a minimum of
± 1/2 LSB.
TTL -
Transistor-transistor logic.
TWO'S COMPLEMENT CODE - A binary code applicable to bipolar operation, in which the positive and
negative codes of the same analog magnitude sum to
all zeroes, plus a carry. It is the same as Offset Binary
Code, with the MSB inverted.
RESOLUTION - The smallest change which can be discerned by an AID converter, or produced by a DAC. It
is usually expressed as the number of bits, n, where the
converter has 2 n possible states.
UNIPOLAR INPUT - A mode of operation whereby the
analog input range (of an AID), or output range (of a
DAC), includes values of a single polarity. Examples are
o to + 10 V, 0 to -5.0 V, +2.0 to +8.0 V, etc.
SAMPLING THEOREM - Also known as the Nyquist
Theorem. It states that the sampling frequency of an
AID must be no less than 2x the highest frequency (of
MOTOROLA LINEAR/INTERFACE DEVICES
9-63
•
MC13001XP
MC13002XP
@ MOTOROLA
Advance Information
MONOMAX BLACK AND WHITE TV SUBSYSTEM
MONOMAX.
BLACK AND WHITE TV
SUBSYSTEM
The MONOMAX is a single-chip IC that will perform the electronic functions of a monochrome TV receiver, with the exception
of the tuner, sound channel, and power output stages. The
MC13001XP and MC13002XP will function as drop-in replacements for MC13001P and MC13002P, but some external IF components can be removed for maximum benefit; IF AGC range has
been increas~d, video output impedance lowered, and horizontal
driver output current capability increased.
• Full Performance Monochrome Receiver with Noise and Video
Processing - Black Level Clamp, DC Contrast, Beam Limiter
• Video IF Dli'tection on Chip - No Coils, No Pins, except Inputs
• Noise Filteting on Chip - Minimum Pins and Externals
• Oscillator Components on Chip - No Precision Capacitors Required
• MC13001XP for 525 Line NTSC and MC13002XP for 625 Line
CCIR
• Low Dissipation in All Circuit Sections
• High-Performance Vertical Countdown
• 2-Loop Horizontal System with Low Power Start-Up Mode
• Noise Protected Sync and Gated AGC System
• Designed to work with TDAl190P or TDA3190P Sound IF and
Audio Output Devices
• Reverse RF AGC Types are Available: MC13008XP, MC13009XP
FIGURE 1 -
SILICON MONOLITHIC
INTEGRATED CIRCUITS
P SUFFIX
PLASTIC PACKAGE
CASE 710-02
BASIC ELEMENTS OF THE SYSTEM
BLACK
SOUND
VIF IF DECOUPLING
• 2
6
IF
28
CLAMP
CONTRAST
BEAM LIMIT
26 25 27
r---:'~ 24 VIDEO
OUT
IF IN
IFIN
8
AGC
FILTER
RF AGe 11
RFAGC 10
r--------+-----~~ 23 ~~~~CAL
DELAY
FLYBACK '50-01----1
HORIZ 7 ( ) o o o 1 i - - - - - - - - i - '
SYNC
SEPARATOR
21 VERTICAL
FEEDBACK
20 VERTICAL
SIZE
n.r
'3
HORIZ. PHASE DET.'
'2
HORtZ. FREQ
,.
-------------_ ....
HORIZ. PHASE DET.2
This document contains information on 8 new product. Speciflcationa and Information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-64
I
I
I
17 HORIZONTAL
OUT
MC13001XP, MC13002XP
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Power Supply Voltage -
Symbol
Value
VCC
+16
Vdc
PD
1.0
Watts
Pin 18
Power Dissipation
Pin 17
Horizontal Driver Current RF AGC Current -
Pin 11
Unit
IHOR
-20
mA
IRFAGC
20
mA
Video Detector Current -
Pin 24
IVID
5.0
mA
Vertical Driver Current -
Pin 22
IVERT
5.0
mA
Pin 19
IREG
35
mA
Thermal Resistance Junction-to-Case
RruC
60
'CIW
'c
Auxiliary Regulator Current -
TJ
150
Tsta
-65to +150
'C
TA
0° to +70
'c
Symbol
Value
Unit
IHOR
0;;10
mA
IRFAGC
0;;10
mA
IREG
0;;20
mA
Maximum Junction Temperature
Storage Temperature Range
Operating Temperature Range
RECOMMENDED OPERATING CONDITIONS
Rating
Horizontal Output Drive Current
RF AGC Current
Regulator Current
ELECTRICAL CHARACTERISTICS (VCC ~ 11.3 V, TA ~ 25'C)
Characteristics
Symbol
Min
ICC
44
-
76
mA
Pin 19
VREG
7.2
8.2
8.8
Vdc
Pin 12
tHOR(NOM)
Power Supply Current
Pins 18 & 19
Regulator Voltage
Typ
Max
Unit
HORIZONTAL SPECIFICATIONS
Oscillator Frequency (Nominal)
Oscillator Sensitivity
Start-Up Frequency
(118 ~ 4.0 mAl
tHOR
Oscillator Temperature Stability
(0 0;; TA 0;; 75'C)
tHOR
Phase Detector 1
(Charge/Discharge Current)
(Non Standard Frame)
(Standard Frame)
1e/>1
Phase Detector 1
(Output Voltage Limits)
Ve/>1
-
13
19
kHz
-
230
-10
-
+10
%
50
-
Hz
-
-
HZ/pA
pA
:t900
:t400
-
7.5 (Max)
2.5 (Min)
-
Phase Detector 1
(Leakage Current)
Phase Detector 2
(Charge/Discharge Current)
1e/>2
Phase Detector 2
(Output Voltage Limits)
Ve/>2
-
-
Vdc
2.0
pA
+1.0
-0.6
mA
7.7 (Max)
1.5 (Min)
Vdc
-
-
Phase Detector 2
(Leakage Current)
-
3.0
,..
18 (Max)
5.0 (Min)
Horizontal Delay Range
(Sync to Flyback)
Horizontal Output Saturation Voltage
(117 ~ 15 mAl
V17(SAT)
Phase Detector 1 (Gain Constant)
(Out-at-Lock)
(In-Lock)
-
-
-
5.0
10
:t500
Horizontal Pull-In Range
MOTOROLA LINEAR/INTERFACE DEVICES
9-65
:t750
pA
0.3
-
Vdc
pAl,..
Hz
MC13001XP, MC13002XP
VERTICAL SPECIFICATIONS
Symbol
Min
Output Current
Pin 22
122
-0.6
Feedback Leakage Cu rrent
Pin 21
121
-
Ramp Retrace Current
Pin 20
120
500
Ramp Leakage Current
Pin 20
Characteristics
Typ
-
-
V21
-
Regulator Voltage
V4
Input Bias Voltage
V2,6
Input Resistance
Input Capacitance
(VAGC Pin a = 4.0
RIN
CIN
Feedback Maximum Voltage
Max
Unit
-
mA
6.0
p.A
900
p.A
0.3
p.A
5.1
-
Vdc
-
7.5
4.2
-
Vdc
-
IF SPECIFICATIONS
V,
Sensitivity
(V8 =
a V, 400 Hz 30% MOD, V28
Vdc
kfl
6.0
2.0
pF
-
80
-
/LVRMS
-
75
-
MHz
-
7.0
-
Vdc
1.4
-
V
-
6
4
-
Vdc
= 0.8 V pp )
Bandwidth
VIDEO SPECIFICATIONS
Zero Carrier Voltage (See Figure 5)
Pin 28
Output Voltage (See Figure 6)
White to Back Porch
Pin 24
Differential Gain
Differential Phase
(IRE Test Method)
%
Oegrees
-
10
-
14:1
V27
-
1.0
-
R.F. (Tuner) AGC Output Current
(V11 = 5.5 V)
111
5.0
-
-
mA
AGC Delay Bias Current
110
-
-10
AGC Feedforward Current
19
-
1.0
-
mA
Contrast Bias Current
Pin 26
126
Contrast Control Range
Beam Limiting Voltage
Pin 27
p.A
AGC & SYNC
AGC Threshold
(Sync Tip at Pin 28)
V28
4.7
-
5.1
Vdc
Sync Separator Operating Point
V7
-
4.2
17
-
5.0
-
Vdc
Sync Separator Charge Current
FIGURE 2 -
MONOMAX AGC CHARACTERISTICS
r'\.
-10
FIGURE 3 -
'\
/ ' 4.0
'\
~
'i!\,,~
\
-30
\
20
;;
,/
-50
o
/'
,. / '
"- t'-.
2.0
~ -1
3.0
~
-
~
~
,SOUND IF OUT [PIN 281
............
C>
1.0 ~
-2
J
~
~ -3
~
""": ~
"\.
~
-4
-5
"I"--.
1.0
~
'"
~
,/
-..1...1-
z
o
3.0 ~
/'
/'/'
z
-- r /
VIDEO OUTPUT RESPONSE
VIDEO OUT {PIN 241 WITH MAX CONTRAST
en
':J
/'
~ -20
-40
mA
5.0
z
o
i
p.A
o
4.0
5.0
AGe VOLTAGE
[PIN 81
-6
o
4.0
2.0
6.0
VIDEO OUTPUT RESPONSE [MHzl
MOTOROLA LINEAR/INTERFACE DEVICES
9-66
8.0
'"
"
10
MC13001XP, MC13002XP
FIGURE 4 -
-10
-20
DETECTOR PRODUCTS
-30
-40
-50
RELATIVE 41.25 MHz INPUT LEVEL IdBI
GENERAL DESCRIPTION
limiter and composite blanking. The video signal first
passes through the contrast control. This has a range
of 14: 1 for a 0 V to 5.0 V change of voltage on Pin 26,
which corresponds to a change of video amplitude at
Pin 24 of 1.4 V to 0.1 V (black to white level). The beam
current limiter operates on the contrast control, reducing the video signal when the beam current exceeds
the limit set by external components. As the beam current increases, the voltage at Pin 27 moves negatively
from its normal value of 1.5 V, and at 1.0 V operates the
contrast control, thus initiating beam limiting action.
After the contrast control, the video is passed through
a buffer amplifier and dc restored by the black level
clamp circuit before being fed to Pin 24 where it is
blanked. The black level clamp, which is gated "on"
during the second half of the flyback, maintains the
video black level at 2.4 V ± 0.1 V under all conditions,
including changes in contrast, temperature and power
supply. The loop integrating capacitor is at Pin 25 and
is normally at a voltage of 3.3 V. The frequency response
of the video at Pin 24 is shown in Figure 3 and it is
blanked to within 0.5 V of ground.
The AGe loop is a gated system, and for all normal
variations of the IF input signal maintains the sync tip
of a noise filtered video signal at a reference voltage
The Video IF Amplifier is a four-stage design with 80
It uses a 6.2 V supply decoupled at Pin
4. The first two stages are gain controlled, and to ensure
optimum noise performance, the first stage control is
delayed until the second stage has been gain reduced
by 15 dB. To bias the amplifier, balanced dc feedback
is used which is decoupled at Pins 2 and 6 and then fed
to the input Pins 3 and 5 by internal 3.9 k resistors. The
nominal bias voltage at these input pins is approximately 4.2 Vdc. The input, because of the high IF gain,
should be driven from a balanced differential source.
For the same reason, care must be taken with the IF
decoupling.
The IF output is rectified in a full wave envelope detector and detector nonlinearity is compensated by using a similar nonlinear element in a feedback output
buffer amplifier. The detected 1.9 Vp _p video at Pin 28
contains the sound intercarrier signal, and Pin 28 is normally used as the sound takeoff point. The video frequency response, detector to Pin 28, is shown in Figure
3 and the detector intermodulation performance can be
seen by reference to Figure 4. Typical Pin 28 video
waveforms and voltage levels are shown in Figure 5.
The video processing section of Monomax contains
a contrast control, black level clamp, a beam current
,.N sensitivity.
FIGURE 5 -
FIGURE 6 -
PIN 28 SOUND OUTPUT
'" 'J,-"'%=-------- --~: :::: :::::'
5.1 V
J-
3.6 Vi
--
PIN 24 -
VIDEO OUTPUT
Maximum
-- Contrast
3.8
Minimum
__ Contrast
2.4
AGe Threshold
-- Back Porch
Maximum
Noise Threshold
1.7
- 4 - - - 1 - - - - - - - - - - - - Blanking Level
MOTOROLA LINEAR/INTERFACE DEVICES
9-67
II
MC13001XP, MC13002XP
The components connected to Pin 7 determine the slice
and tilt levels of the sync separator. For ideal horizontal
sync separation and to ensure correct operation of AGC
anti-lockup circuit, a relatively short time constant is
required at Pin 7. This time constant is less than optimum for good noise free vertical separation. giving rise
to a vertical slice level near sync tip. An additional,
longer, time-constant is therefore coupled to the first
via a diode. With the correct choice of time constants,
the diode is non conducting during the horizontal sync
period, but conducts during the longer vertical period.
This connects the longer time constant to the sync separator for the vertical period and stops the slice level
from moving up to the sync tip. The separated composite sync is integrated internally, and the time constant is such that only the longer period vertical pulses
produce a significant output pulse. The output is then
fed to the vertical sync separator, which further processes the vertical pulse and provides increased noise
protection. The selection of the external components
connected to the vertical separator at Pin 23 permits a
wide range of performance options. A simple resistor
divider from the 8.2 V regulated supply gives adequate
performance for most conditions. The addition of an RC
network will make the slice level adapt to varying sync
amplitude and give improved weak signal performance.
A resistor to the AGC voltage on Pin 9 enables the sync
slice level to be changed as a function of signal level.
This further improves the low signal level separation
while at the same time giving increased impulse noise
protection on strong signals.
(5.1 V Pin 28). The strobe for the AGC error amplifier is
formed by gating together the flyback pulse with the
separated sync pulse. Integration of the error signal is
performed by the capacitor at Pin 8, which forms the
dominant AGC time constant. Improved noise performance is obtained by the use of a gated AGC system,
noise protected by a dc coupled noise canceling circuit.
The false AGC lock conditions, which can result from
this combination, are prevented by an anti lockout circuit connected to the sync separator at Pin 7. AGC lockout conditions, which occur due to large rapid changes
of signal level are detected at Pin 7 and recovery is
ensured under these conditions by changing the AGC
into a mean level system. The voltage at Pin 10 sets the
point at which tuner AGC takeover occurs and positive
going tuner control, suitable for an NPN RF transistor,
is available at Pin 11. The maximum output is 5.5 V at
5.0 rnA. A feedcforward output is provided at Pin 9. This
enables the AGC control voltage to be ac coupled into
the tuner takeover control at Pin 10. The coupling allows
additional IF gain reduction during signal transient conditions, thus compensating for variations of AGC loop
gain at the tuner AGC takeover point. In this way the
AGC system stability and response are not degraded.
The previously mentioned noise protection is effected
by detecting negative-going noise spikes at the video
detector output. A dc coupled detector is used which
turns on when a noise spike exceeds the video sync tip
by 1.4 V. This pulse is then stretched and used to cancel
the noise present on the delayed video at the input to
the sync separator. Cancellation is performed by blanking the video to ground. Complete cancellation of the
noise spike results from the stretching of the blanking
pulse and the delay of the noise spike at the input to
the sync separator. Protection of both the horizontal PLL
and the AGC stems from the fact that both circuits use
the noise cancelled sync for gating.
The composite sync is stripped from a delayed and
filtered video in a peak detecting type of sync separator.
FIGURE 7 -
12
HORIZONTAL OSCILLATOR
The horizontal PLL (see Figure 7) is a 2-loop system
using a 31.5 kHz oscillator which after a divider stage
is locked to the sync pulse using phase detector 1. The
control signal derived from this phase detector on Pin
13 is fed via a high-value resistor to the frequencycontrol point on Pin 12. The same divided oscillator
HORIZONTAL OSCILLATOR SYSTEMS
,,
,,
13
: 15
'-0
FLYBACK '--_ _ _-'
SYNC
MOTOROLA LINEAR/INTERFACE DEVICES
9-68
MC13001XP, MC13002XP
frequency is also fed to phase detector 2, where the
flyback pulse is compared with it and the resulting error
used to change a variable slice level on the oscillator
ramp waveform. This therefore changes the timing of
the output square wave from the slicer and hence the
timing of the buffered horizontal output on Pin 17 (see
Figure 8). The error on phase detector 2 is reduced until
the phasing of the flyback pulse is correct with respect
to the divided oscillator waveform, and hence with respect to the sync pulse.
To improve the pull-in and noise characteristics of the
first PLL, the phase detector current is increased when
the vertical lock indicator signals an unlocked condition
and is decreased when locked. This increases the loop
bandwidth and pull-in range when out of lock and decreases the loop bandwidth when in lock, thus improving the noise performance. In addition, the phase detector current during the vertical period is reduced in
order to minimize the disturbance to the horizontal
caused by the longer period vertical phase detector
pulses.
The oscillator itself is a novel design using an on-chip
50 pF silicon nitride capacitor which has a temperature
drift of only 70 ppml"C and negligible long term drift.
This, in conjunction with an external resistor, gives a
drift of horizontal frequency of less than 1Hzl"C - i.e.,
less than 100 Hz over the full operating temperature
range of the chip. The pull-in range of the PLL is about
± 750 Hz, so normally this would eliminate the need
for any customer adjustment of the frequency.
The second significant feature of this design is the
use of a virtual ground at the frequency control point
which floats at a potential derived from a divider across
the power supply and this is the same divider which
determines the end-points of the oscillator ramp. The
frequency adjustment which is necessary to take up
tolerances in the on-chip capacitor is fed in as a current
to this virtual ground and when this adjustment current
is derived from an external potentiometer across the
same supply there is no frequency variation with supply
voltage. Moreover, using the voltage from a potentiometer for the adjustment instead of the simple variable
resistor normally used in RC oscillators makes the frequency independent of the value of the potentiometer
and hence its temperature coefficient. The frequency
control current from the first phase detector is fed into
this same virtual ground and as the sensitivity of the
control is about 230 HzlpA a high value resistor can be
used (680 kO) and this can be directly connected to the
phase detector filter without significant loading.
This oscillator operates with almost constant frequency to below 4.0 volts and as the total PLL system
consumes less than 4.0 mA at this voltage, this gives
an ideal start-up characteristic for receivers using
deflection-derived power supplies.
The flyback gating input is on Pin 15 which is internally clamped to 0.7 V in both directions and requires
a negative input current of 0.6 mA to operate the gate
circuit. This input can be a raw flyback pulse simply fed
via a suitable resistor.
FIGURE 8 -
J1-
-V
HORIZONTAL WAVEFORMS
200 mV pip
50 mV pip
J
("1-4.5V
v----
0
6.0V
@
12~r
@
+0.9V@
OV
-0.7 V
VERTICAL SYSTEM
An output switching signal is taken from the 31.5 kHz
oscillator to clock the vertical counter which is used in
place of a conventional vertical oscillator circuit. The
counter is reset by the vertical sync pulse but the period
during which it is permitted to reset is controlled by the
window control. Normally, when the counter is running
synchronously, the window is narrow to give some protection against spurious noise pulses in the sync signal.
If the counter output is not coincident with sync however, after a short period the window opens to give reset
over a much wider count range, leading to a fast picture
roll towards lock. At weak signal, i.e., less than 200 /LV
IF input, the vertical system is forced to narrow mode
to give a steadier picture for commonly occurring types
of noise. The vertical sync, gated by the counter, then
resets a ramp generator on Pin 20 and the 1.5 volt Pop
ramp is buffered to Pin 22 by the vertical preamplifier.
A differential input to the preamp on Pin 21 compares
the signal generated across the resistor in series with
the deflection coils with the generated ramp and thus
controls shape and amplitude of the coil current.
The basic block diagram of the countdown system is
shown in Figure 9. The 31.5 kHz (2 FH) clock from the
horizontal oscillator drives a 10-stage counter circuit
which is normally reset by the ·vertical sync pulse via
the sync gate, OR gate and 0 flip-flop. This 0 input is
also used to initiate discharge of the ramp capacitor and
hence causes picture fly back.
The period during which sync can reset the counter
and cause flyback is determined by the window control
which defines a count range during which the gate is
open. One of two ranges is selected according to the
condition of the signal. The normal "narrow" range is
514 to 526 counts for a 525 line system and is selected
after the coincidence detector indicates that the reset is
coincident, twice in succession, with the 525 count from
the counter. When the detector indicates noncoincidence 8 times in succession, then the window
control switches to the "wide" mode (384 to 544 counts)
to achieve rapid re-synchronization. For the 625 line
version the counts are 614 to 626 for narrow mode and
MOTOROLA LINEAR/INTERFACE DEVICES
9-69
II
II
MC13001XP, MC13002XP
FIGURE 9 -
MONOMAX VERTICAL COUNTDOWN
BLANKING
PULSE
BLANKING
LATCH
CLOCK
~
COUNTER RESET
10-STAGE COUNTER
514-526
384-544
"NARROW"
"WIDE"
H/4
DELAY
8H/2
DELAY
2H/2
COINC.
D FLIP FLOP
(DELAY)
DELAY
VERTICAL
SYNC
t
TO RAMP
PULL-DOWN
484 to 644 for wide mode_ Note that the OR gate after
the sync gate is used to terminate the count at the end
of the respective window if a sync pulse has not appeared.
This method accepts non-standard Signals almost in
the same way as a conventional triggered RC oscillator
and has a similar fast lock-in time. However, the use of
a window control on the counter reset ensures that
when locked with a normal standard broadcast signal
the counter will reject most spurious noise pulses.
The blanking output is provided from a latch which
is set by the counter reset pulse and terminated by count
20 from the counter chain.
POWER SUPPLY
The power supply regulator, although of simple design, provides two independent power supplies - one
for the horizontal PLL section and the other for the remainder of the chip. The supplies share the same reference voltage but the design of the main regulator is
such that it can be switched on independently to give
minimum loading on the "bleed" voltage source during
start-up phase of a deflection-derived supply system.
FIGURE 11 R
FIGURE 10 -
CLOCK
_ VBL - 8
BL - 4 x 10-3
VERTICAL WAVEFORMS
POWER SUPPLY CIRCUIT
HORIZONTAL
MAIN
START-UP
12 V SUPPLY
BLEED
IEXT
+ VBL ----;;'Wv----,--+~
...:"~
......__.,__
8.2 V TO
... EXTERNAL
CIRCUITS
8.2 V TO
""-w.-44_ c~~2U~~N~X~~T
HORIZONTAL
2.0 V
@
IEXT
R6
rnA Ohms
OV
MOTOROLA LINEAR/INTERFACE DEVICES
9-70
<5
150
20
35
82
68
MC13001XP, MC13002XP
FIGURE 12 -
TEST CIRCUIT DIAGRAM
G) o-----_-[2l--......."""'......"
JII
VREG
@
470 k
12 V
180 k
V21
12 V
12 V
VREG SOURCE
@
8.2V
12 V
120 V
82 k
5.0V
~o-------~--~~
MOTOROLA LINEAR/INTERFACE DEVICES
9-71
II
MC13001XP, MC13002XP
FIGURE 13 -
TYPICAL APPLICATION
Video
Out
+8.2Y
+120V
+8.2 Y
39k
High Voltage
Winding
To TDA1190P
"'~
82k
,~.". ~
Vert
Size
+120V +120V
+12V
+24V
Vert
Vert
Sync t.
50 nF
0."
~.~ N,...
'
1M
~
0
Ula:
:;;
'"
.r
0.05
+8.2Y
Vert
Drive
22
VCC
YREG
'9
20
2'
Hariz
Drive
-=
M
'7
'8
'6
'5
MC'300'X MONOMAX
"RF
'0
'2
AGC
'4
'3
Hariz
Phase
Hariz
Freq
Oet.l
'.0 "F 8.2V
+8.2 V
P-=
F1
Video IF In
r
680 k
.:r
1.8M
2.2 k
II
23
~
~
~
N
ai
2% Metal Film
or Metal Oxide
. -....--'WIr-_ Pin 9
nF
AGC
..>eo
Delay
2.7 M
50
RF
470 k
Sync Separator Components
r-----------,
II
I
I
:I
I
I
Tuner I
I
t
Vertical Sync - optional components
for extra performeoce with low signal strength
I
I
I
I
L._=- ___:: __ J
See Application Note AN879 for further information.
MOTOROLA LINEAR/INTERFACE DEVICES
9-72
Det.2
1,onF
ill
0.1 nF
Hariz
Phase
®
MC13010P
MOTOROLA
TV PARALLEL SOUND
IF/AFT
TV PARALLEL SOUND IF AND AFT
The PSIF is a single-chip IC that enhances the performance of
a color TV, audio and video/chroma system. It eliminates bandpass compromises which normally tradeoff 920 kHz video beat
with sound performance. The chip also includes a surface wave
filter preamplifier and an AFT circuit.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
.-
• Low Noise Preamplifier for SAW Filter
• Wideband IF Amplification with Mean Level AGC
• Intercarrier Detector for Sound Carrier Output
• Reduces 920 kHz Beat
• AFT Discriminator with Output Polarity Selection
1
• Internal Voltage Regulator 8.2 V
PSUFFIX
PLASTIC PACKAGE
CASE 707-02
• 30 mA Available from 8.2 V Internal Regulator
PIN CONNECTIONS
FIGURE 1 -
BLOCK DIAGRAM
•
Decouple
IF
Input
{
Decouple
Ground
Preamp {
Output
Preamp {
Input
MOTOROLA LINEAR/INTERFACE DEVICES
9-73
Sound
Output
AGC
Filter
MC13010P
MAXIMUM
RATiNGS
Rating
Symbol
Value
VCCC
16
Vdc
Regulator Output Current
Ireg
30
mAde
Thermal Resistance
R8JA
70
·CfW
Po
1.1
W
TJ(max)
150
·C
Tstg
-65 to +150
·C
Power Supply Voltage
Power Dissipation (Package Limitation)
Maximum Junction Temperature
Storage Temperature Range
Operating Temperature Range
o to
TA
Unit
·C
+70
ELECTRICAL CHARACTERISTICS (VCC = 12 V, TA = 25·C, Test Circuit of Figure 2, unless otherwise noted)
Static Characteristics
Symbol
Min
Typ
Max
Unit
ICC
30
-
60
mAde
Regulator Voltage, Pin 12
Vrea
7.6
8.2
8.8
Vdc
RF Supply Voltage, Pin 18
VRF
5.8
6.5
7.2
Vdc
4.0
6.6
7.5
mAde
Supply Current
Preamplifier Current, Pins 6, 7
Dynamic Characteristics
Preamp Gain (Differential Output, 50 n Loads)
Av
IF Sensitivity, Output 1.5 Vpp
Input 45.75 MHz, 30% AM @ 1.0 kHz Differential Pins 2, 3
-3.0
-
dB
80
-
/LVrms
AGC Range, Input CW for Output Change of ± 0.25 Vdc
-
48
-
Intercarrier Sound Output (Beat),
Input 45.75 MHz, 7.0 mV rms ; 41.25 MHz, 2.2 mV rms
100
200
400
-
MHz
-
kn
pF
-
mV rms
-
dB
f max
-
80
Preamplifier Input Resistance
Preamplifier Input Capacitance
Rin
Cin
-
1.5
11.5
IF Input Resistance
IF Input Capacitance
Rin
Cin
-
2.2
4.0
Preamplifier Max Input Signal (Single Ended)
Yin
IF Max Input Signal (Differential)
Vin
IF Bandwidth (3.0 dB)
..
-
-
AFT Center-Frequency Slope
-
AFT Output Max, 1.0 MHz Detuning
-
Noise Figure IF, Max Gain
Noise Figure Preamplifier
50
50
6.0
5.0
4.0
±300
dB
mV rms
kn
pF
-
-
mV rms
!LAJkHz
JJA
FIGURE 2 - TEST CIRCUIT
Vee
0.Q1
J
50
5O
1 IF
Vee 17
2} IF
3
Input
4 IF
AFT 16
Mode
AFT 15
Output
5 Gnd
AFTf4
Tuning 13
6} Preamp
7 Output Vreg 12
0.0047
Input 0
I"
)
tIJ
VRF 18
10k
TOKO
E502LN-4000034
10k
(O.12/,H)
f-:J..
':'
0.1 ':'
8}
9
Output 11
Output
Preamp
Input
fa047
AGe 10
+1.~
MOTOROLA LINEAR/INTERFACE DEVICES
9-74
MC13010P
qui ring only one external filter. The general characteristic of the IF gain and gain control are given in Figure
4. The intercarrier sound output (Pin \1) is typically
about 200 mV rms , which easily overcomQS a lossy intercarrier filter and meets the input needs'of even the
least sensitive FM sound IF ICs.
DESCRIPTION
The MC13010 TV Parallel Sound IF/AFT is designed
to be part of a high performance color television system.
Its primary function is to provide a complete separate
IF amplifier for sound, leaving the normal IF to be concerned only with video. Secondary functions include an
AFT detector and a SAW preamp.
In most present day color television receivers, sound
and video are processed by the same IF amplifier and,
in many cases, the same synchronous or pseudosynchronous detector. This imposes undesirable compromises in video and sound performance. Particularly in
the U.S., the avoidance of a color/sound beat product
(920 kHz) can only be achieved at the expense of sound
quieting and sensitivity. Earlier solutions involved a single IF amplifier driving two detectors, with numerous
interstage alignments required.
A method of solving these problems is to process the
sound and video separately, directly from the tuner output. The MC13010 provides the second complete IF
channel, with its own wideband detector and AGC. This
permits both video IF and sound IF to be free of tuned
elements, except at their inputs. (See Figure 3.)
AFT
The AFT detector is a quadrature type opel'lting at
the picture IF frequency, with only one external L-C to
be aligned. The polarity of the AFT output may be
changed by taking the mode control (Pin 16) high or'
low. If the control pin is left open, the AFT is defeated.
ADDITIONAL APPLICATIONS
The MC13010 is an ideal part for stand-alone AFT. II
contains the entire active system to provide a tuner with
"self control". (See Figure 6.)
This device performs AM detection at the intercarrier
sound output. Therefore, AM modulated digital data
may be recovered. This function may be useful in cable
systems where digital coding is employed.
FIGURE 3 - BLOCK DIAGRAM OFT.V. APPLICATION OF MC13010
Intercarrier
Audio
Sound
Video IF
& Del
Filler
PREAMPLIFIER
The preamp is included to compensate for the high
insertion loss of a Surface Acoustic Wave filter. This
SAW filter may have two outputs with different responses, or it may serve only the video signal path. The
preamp is optional if an LC filter is used. In any case,
the selectivity ahead of the video IF must provide deep
trapping ofthe sound carrier, while the sound bandpass
is relatively broad and flat between the picture and
sound carriers.
I-----i~
E
Video
FIGURE 4 - GAIN AND AGC CHARACTERISTICS
7.0
30% 'MODULATION
6.0
IIIIII
IIIIIII
DC OUTPUT VOLTAGE IPIN 111
5.0
11111111
~ 4.0
!:l
~3.0
THE SOUND IF
The overall gain of 80 dB and gain control range of
48 dB equals the video IF's of earlier designs. This allows the full improvement of the system architecture to
be realized. The AGC in the MC13010 is a peak-detecting
type, driven internally from the sound detector, and re-
AGC VdLTW
(~\~ll01 ~
V
2.0
o
o
~
/
1.0
0.1
1.0
10
CW. SIGNAL INPUT (mVrm,1
MOTOROLA LlNEARIiNTERFACE DEVICES
9-75
100
MC13010P
FIGURE 51Al - TYPICAL lV APPUCATION
+12 Vdc
0.Q11 33O
0.01
330
18
,,~n
75
pF
To
Video
IF
2
17
3
16
4
15
5
14
6
13
7
12
8
11
R3
R2
Intercarrier
Output
0
Signal
1"
From
Tuner
(ToFM
Sound IF)
10
9
FIGURE 5(Bl - TYPICAL APPLICATION
Vee = 12 Vdc
18
To
Video 820
IF
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
AFT Output
to Tuner
R3
R2
Intercarrier
III
Signal
From 0
Tuner
Si
Shown above are two approaches to using the
MC13010 in TV designs. The simpler circuit 5(a) offers
the lowest cost, but the 12 dB of preamp gain does not
overcome the 20 to 25 dB of SAW filter loss. (Bearing
in mind that discrete UC approaches also incur some
loss at this point, the 51a) circuit is probably about equal
in gain.) The transformer T4 in Figure 5(b) takes advantage of the high impedance current source nature of the
preamp outputs, Pins 6 and 7, to pick up another 6.0 dB
of gain. Even more may be possible with more primary
turns. When using the coil information given at the right,
note that it is based on very limited experience and is
offered only as a general guideline.
T2 -
Video IF Surface Acoustic Wave (SAW)
Filter: muRata, SAF 45MC02Z
T3 -
Ceramic Intercarrier Output Filter: muRata SFE
4.5 MB
T4 -
TaKa KANAS-K7060EK
L1 -
TaKa E502LN-4000034 J.W. Miller 48A147MPC
with shield case, tuned to 45.75, L = 0.12 JLH.
L2 -
Same part as L1, except tuned to 44 MHz and
loaded with 270 {}
Experimental values for 45 MHz IF:
R3 -
T1 -
R1 and R2 -
Primary: TaKa E502LN-4000034
Secondary: TaKa E502LN-7000037 in Shield
case
Adjust for nominal tuning voltage
Chosen for tuning voltage swing required. Note
that Pin 15 can source or sink 300 JLA (typ) at the
extremes of control range
MOTOROLA LINEAR/INTERFACE DEVICES
9-76
MC13010P
FIGURE 6 -
"STAND-ALONE" AUTOMATIC FINE TUNN'lG (AFT) APPLICATION
+24 Vdc
0.01
1
330
18
AFT to
Tuner
17
2
R3
16
Rl
4
15
5
14
R2
13
0:-
Signal
~~:r
12
7
0-------1.-
- - - - - - - - - -41--1
51
8
11
9
10
L1 -
Channel 3 Component Values
T1 - Made from two coils positioned side by side,
without shields, on 0.38" centers. Coils are COILCRAFT part no. T7-142 (violet 7-1/2 tur.ns), each
with its own slug, Carbona I E, adjusted to 63 MHz
(=0.4 ILH). This should give a slightly overcoupled response. A sheild to surround the coils
may be required.
COILCRAFT UNI-7/150 (blue 6-1/2 turns) or
UNI-10/144 (green 5-1/2 turns) shielded, adjusted
to 61.25 MHz (= 0.14 ILH)
R1 and R2 R3 -
Adjust for nominal tuning voltage
Chosen for tuning voltage swing required. Note
that Pin 15 can source or sink 300 JLA (typ) at the
extremes of control range
E
MOTOROLA LINEAR/INTERFACE DEVICES
9-77
®
MC13014P
MOTOROLA
Advance Information
MONOMAX®
COMPANION
AUDIONERTICAL
SUBSYSTEM
MONOCHROME TELEVISION POWER AUDIONERTICAL
COMPANION SUBSYSTEM FOR MONOMAX®
The MC13014P is intended to complement the Monomaxfamily
by providing the complete output stages for the audio and ~ertical
sections. In the typical case, all active elements and many of the
passive components of the vertical and audio sections are replaced, thereby enhancing the construction simplicity of the Teceiver. Main features include:
• Adaptable to a Variety of Power Supply Configurations
• Efficient Operation; Low Device Temperature Rise
P SUFFIX
PLASTIC PACKAGE
CASE 648C-02
• High Breakdown Voltage, 40 V
• Can Deliver 600 mA pop Yoke Current
• Up to 750 mW of Audio Output
• Operates over a Wide Supply Voltage Range, 6-40 Vdc
FIGURE 1 - BLOCK DIAGRAM. TYPICAL APPUCATION.MONOCHROME TV RECEIVER
.--'W\r-+
7"-19"
B&W
Circuit
MONOMAX"
(MC13001P or
MC13001XP
Families)
Vertical
Feedback
FM IF
MC1358P or
TBA120C
Audio
Horizontal Yoke
Vertical
=
Drive
~rtical
'l t V~~ke
L
=
MC13014
Audio Amplifier
and
Vertical Driver
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-78
400-600 mA Pop
MC13014P
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC, Vboost
+40
V
Power Supply Voltage, Audio Section (Pin 141
VCC'
+35
V
Audio Input
VIS
1.0
V p-p
ReJA
80
°CIW
TJ
150
°c
Power Supply Voltage (Pins 1,7,161
Thermal Resistance, Junction to Air
Junction Temperature
Operating Temperature Range
Too
Storage Temperature Range
TstQ
o to
+70
-65to +150
°c
°c
AUDIO SECTION (TA ~ 25°C Circuit of Figure 21
ELECTRICAL CHARACTERISTICS Characteristic
Symbol
Min
Typ
Max
Unit
ICC
11
19
mAde
Ao
-
50
-
Distortion at 50 mW Output 1.0 kHz
Vout THO
-
0.1
1.0
Distortion at 750 mW Output 1.0 kHz
Vout THO
-
0.5
-
%
Quiescent Output Voltage, No Signal
VPin 10
-
8.0
-
Vdc
VPin 9, VPin 15
-
0.7
-
Vdc
RinPin15
-
28
-
kn
Vout
-
0.5
4.0
mVRMS
Power Supply Current, No Signal, Pin 14
Gain
Input Bias
Input Resistance
Output Noise (50 Hz-15 kHzllnput 50 II
ELECTRICAL CHARACTERISTICS -
VIV
%
VERTICAL SECTION (TA ~ 25°C Circuit of Figure 31
Characteristic
Max
Unit
Symbol
Min
Typ
Iyoke
500
-
mApp
75
Power Supply Current
ICC
-
VPin 6
-
30
-
mAde
Flyback Voltage, Pin 6
Pull-Up Current, Max Height Control
VPin 2
-
250
-
mApk
Output Current, Max Height Control
ELECTRICAL CHARACTERISTICS -
COMBINATION (TA ~ 25°C, Circuits of Figures 2 and 31
Characteristic
Residual Vertical Buzz-In Audio Output.
Vertical Set at 400 mA p-p Output
FIGURE 2 -
TEST CIRCUIT AND TYPICAL APPLICATION, AUDIO SECTION
VCC
~
+ 16 Vdc
10 ;0
~+12V
,10
~
0
--I
160
+30V~1
0
:0
0
r
»
+14 V
r
Z
16
m
CD
Co
w
lN4002
»
:0
:::::
z
MC1Z014P
1.0M
--I
m
+B.OV
:0
"
»
()
m
0
m
<
()
m
en
Li-T,
+11 V
• +14V
+12V
Tuner
AGe
~+11V
+8.0V
i
4715W ~ ..... "'.....
1~
+ 12ov--""
lOOk
I
J
1
160
II
lN4004
~~ L---I~*I---11!e-,'-00--- +30 V
•
I
•
®
MOTOROLA
MC13020P
MOTOROLA C-QUAM®
AM STEREO
DECODER
MOTOROLA C-QUAM® AM STEREO DECODER
This circuit is a complete one chip, full feature AM stereo decoding and pilot detection system. It employs full-wave envelope
signal detection at all times for the L + R signal, and decodes L
- R signals oniy in the presence of valid stereo transmission.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• No Adjustments, No Coils
• Few Peripheral Components
-
• True Full Wave Envelope Detection for L + R
• PLL Detection For L - R
• 25 Hz Pilot Presence Required To Receive L - R
• Pilot Acquisition Time 300 ms For Strong Signals, Time
Extended For Noise Conditions To Prevent "Falsing"
1
P SUFFIX
PLASTIC PACKAGE
CASE 738-03
• Internal Level Detector Can Be Used As AGC Source
FIGURE 1 -
TYPICAL APPLICATION
+8.0 Vdc
0.0033
0.0033
0.0033
Q Detector
I Detector
3
0.01
IF Input
Osc. Input
4 Level
Detector
Optional
Tuner
Grou nd I-"''----+'='+--- Audio
L_-.-_J--?"::"'_-'-'<> Outputs
Note 1
~1---O---4-I
~=~~~~~~"\4-l..---+-=---.r-~11
Input
h+--+~i--~
Force To
Monaural
I
16
I
II
Note 1: Output polarity is
defined for receiver front
See Text
)R2
Rd
and Figures I
C2
5,6 and 7 L ______ OJ!]
II
end with l.O. above signal
frequency_
chronously detected by conventional means. The I and
Q detectors are held at 0' and 90' relative demodulation
angles by reference signals from the phase-locked,
divided-down VCO. The output of the I DET is 1 + L + R,
with the added benefit (over the Env DET) of being able
to produce a negative output on strong co-channel or
noise interference. This is used to tell the Lock circuit
to go to monaural operation. The output of the Q DET
is the L - R and pilot information.
MOTOROLA C-QUAM® - COMPATIBLE
QUADRATURE AM STEREO
INTRODUCTION
In C-QUAM®, conventional quadrature amplitude
modulation has been modified by multiplying each axis
by cos II as shown in Figures 2 and 3. The resulting
carrier envelope is 1 + L + R, i.e., a correct sum signal
for monaural receivers and for stereo receivers operating in monaural mode. A 25 Hz pilot signal is added
to the L-R information at a 4% modulation level.
THE VCO
The VCO operates at 8 times the IF input frequency,
which ensures that it is out-of-band, even when a 260
kHz IF frequency is used. Typically a 450 kHz IF frequency is used with synthesized front ends. This places
the VCO at 3.6 MHz, which permits economic crystal
and ceramic resonators. A crystal VCO is very stable,
but cannot be pulled very far to follow front-end mistuning. Pull-in capability of ± 100 Hz at 450 kHz is typical,
and de-Q-ing with a resistor (see Figure 7) can increase
the range only slightly. Therefore, the crystal approach
can only be used with very accurate, stable front-ends.
By comparison, ceramic and L - C VCO circuits offer
pull-in range in the order of ± 2.5 kHz (at 450 kHz). Ceramic devices accurate enough to avoid trimming adjustment can be obtained with a matched capacitor for
Cs (see Figures 1 and 5).
THE DECODER
The MC13020P takes the output of the AM IF amplifier
and performs the complete C-QUAM" decoding function. In the absence of a good stereo signal, it produces
an undegraded monaural output. Note in Figure 4 that
the L + R information delivered to the output always
comes from the envelope detector (Env DET).
The MC13020P decodes the stereo information by
first converting the C-QUAM" signal to QUAM, and then
detecting QUAM. The conversion is accomplished by
comparing the output of the Env DET and the I DET in
the Err AMP. This provides the 1/cosll correction factor,
which is then multiplied by the C-QUAM® incoming signal in the Var Gain block. Thus, the output of the Var
Gain block is a QUAM Signal, which can then be syn-
MOTOROLA LINEAR/INTERFACE DEVICES
9-86
MC13020P
In the PLL filter circuit on Pin 19, C1 is the primary
factor in setting a loop corner frequency of 8-10 Hz, inlock. An internally controlled fast pull-in is provided. R2
is selected to slightly overdamp the control loop, and
C2 prevents high frequency instability.
The Level DET block senses carrier level and provides
an optional tuner AGC source. It also operates on the
Q AGC block to provide a constant amplitude of 25 Hz
pilot at Pin 11, and it delivers information to the pilot
decoder regarding signal strength.
below the preset threshold. Seven consecutive counts
of no pilot will also put the decoder in monaural. In
stereo, the co-channel input is disabled, and co-channel
or other noise is detected by negative excursions of the
I DET, as mentioned earlier. When these excursions
reach a level caused by approximately 20% modulation
of co-channel, the lock detector puts the system in monaural, even though the PLL may still actually be locked.
This higher level of co-channel tolerance provides the
hysteresis to prevent chattering in and out of stereo on
a marginal signal.
When all inputs to the Pilot Decode block are correct,
and it has completed its count, it turns on the Switch,
sending the L - R to the Matrix, and switches the pilot
lamp· pin to a low impedance to ground.
PILOT AND CO-CHANNEL FILTERS
The Q AGC output drives a low pass filter, made up
of 400 0 internal, and 430 0 and 5 p,F external. From
this point, an active 25 Hz band-pass filter is coupled to
the Pilot Decoder, Pin 14, and another low-pass filter is
connected to the Co-channel Input, Pin 12. A 2:1 reduction of 25 Hz pilot level to the Pilot Decode circuit
will cause the system to go monaural, with the components shown. Refer to Figure 8 for the formulas governing the active band-pass filter. The co-channel input
signal contains any low frequency intercarrier beat
notes, and, at the selected level, prevents the Pilot Decode circuit from going into stereo. The co-channel input, Pin 12, gain can be adjusted by changing the external 1.5 k resistor. The values shown set the "trip"
level at about 7% modulation. The 25 Hz pilot signal at
the output of the active filter is opposite in phase to the
pilot signal coming from the second low-pass filter. The
56 k resistor from Pin 14 to Pin 12 causes the pilot to
be cancelled at the co-channel input. This allows a more
sensitive setting of the co-channel trip level.
SUMMARY
It should be noted that in C-QUAM", with both channels AM modulated, the noise increase in stereo is a
maximum of 3.0 dB, less on program material. Therefore, this is not the major concern in the choice of monaural to stereo switching point as it was in FM, and blend
is not needed.
Pin 1, 2 -
Pin 3
Pin 4
THE PILOT DECODER
The Pilot Decoder has two modes of operation. When
signal conditions are good, the decoder will switch to
stereo after 7 consecutive cycles of the 25 Hz pilot tone.
When signal conditions are bad, the detected interference changes the pilot counter so as to require 37 consecutive cycles of pilot to go to stereo. In a frequency
synthesized radio, the logic that mutes the audio when
tuning can be connected to Pin 9. When this pin is held
low it holds the decoder in monaural mode and switches
it to the short count. This pin should be held low until
the synthesizer and decoder have both locked onto a
new station. A 300 ms delay should be sufficient. If the
synthesizer logic does not provide sufficient delay, the
circuit shown in Figure 9 may be added. Once Pin 9
goes high, the Pilot Decoder starts counting. If no pilot
is detected for seven consecutive counts, it is assumed
to be a good monaural station and the decoder is
switched to the long count. This reduces the possibility
of false stereo triggering due to signal level fluctuation
or noise. If the PLL goes out of lock, or interference is
detected by the co-channel protection circuit before
seven cycles are counted, the decoder goes into the long
count mode. Each disturbance will reset the counter to
zero. The Level Detector will keep the decoder from
going into stereo if the IF input level drops 10 dB, but
will not change the operation of the pilot counter.
Once the decoder has gone into the stereo mode, it
will go instantly back to monaural if either the lock detector on Pin 10 goes low, or if the carrier level drops
-
Pin 5
Pin 6
Pin 7,8 Pin 9
Pin 10
-
Pin 11
-
Pin 12
-
Pin 13 Pin 14 Pin 15
Pin 16
Pin 17
-
Pin 18
-
Pin 19 Pin 20
-
PIN DESCRIPTIONS
Detector Filters, Rout = 4.3 k, recommend
0.0033 p,F to VCC to filter 450 kHz components.
IF Signal Input
Level Detector filter pin, Rout = 8.2 k, 10 p,F
to ground sets the AGC time constant. High
impedance output, needs buffer.
Error Amp compensation to stabilize the Var
Gain feedback loop
Vce, 6-10 Vdc, suitable for low Vbatt automotive operation, but must be protected
from "high line" condition.
Left and Right Outputs, NPN emitter followers
Forced Monaural, MOS or TTL controllable
Lock detector filter, Rout = 27 k, recommend 2.2 p,F to ground.
AGC'd Q output, NPN emitter follower with
400 0 from emitter to Pin 11
Co-channel Input, 2.0 k series in and 47 k
feedback
Pilot Filter Input to op amp, see Figure 8
Pilot Decode Input (op amp output) emitter
follower, Rout = 1000
Stereo Lamp, open-collector of an NPN
common emitter stage, can sink 50 mA,
Vsat = 0.3 V at 5.0 mA
Ground
Oscillator input, Rin = 10 k, do not dc connect to Pin 18 or ground
Oscillator feedback, NPN emitter, Rout =
1000
Phase Detector Output, current source to filter
Detector Filter, Rout = 4.3 k, recommend
0.0033 p,F to VCC to filter 450 kHz
MOTOROLA LINEAR/INTERFACE DEVICES
9-87
MC13020P
FIGURE 6 -
FIGURE 5 - CERAMIC VCO
5.5
~
05.0
~
z
0:
uI
4.5
~
i?z
r
18
,,+
.'
~O.OO33
30
~
o
~
z
0:
uI
5.0
4.5
-1
20
19
'~.17
2Ot: ::
T~·l
jj.F
k
/
I
§? 4.0
W
448 448 ~ ~ •
VCO -;- 8 FREQUENCY IkHzl
~
~
/
V
/
/"
Uk
V
24
,.......... f-""'
~
~
/'
FIGURE 8 - ACTIVE BAND-PASS FILTER
2.:-;;;~
~
....- .......-
~
/
;;!;
~ 3.5
3.0
+
/
/"
/"
448
FIGURE 7 - CRYSTAL VCO
5.5
1/
~
3.0
454
I
100
~
453
I
19
03.5
448
450
451
452
VCO -;- 8 FREQUENCY IkHzl
J
17
~~~ 1'220
sooG
20
§? 4.0
448
L-C VCO
Vref
/
449.90
II
449.95
450.00
450.05
veo -;- 8 FREQUENCY IkHzl
450.10
FIGURE 9 - FORCED MONAURAL
OPTIONAL DELAY CIRCUIT
where, in this application:
fo = center frequency = 25 Hz
Ao = gain at fo"'25
0",10
TTL
Bus
470 k
I
10 k
9
I. .
I .....
I
:.,f!::
Choose values for fo, A o, a, and
convenient C, solve for
MC13020
resistors
1.0I'F'J
C ± 5%
Ra ± 5%
Rb ± 1%
0.471'F
4.7 k
910
220 k
O.331'F
8.2 k
1.3 k
330 k
Rc ± 1%
Note: Capacitor C should be a good grade, low ESR.
MOTOROLA LINEAR/INTERFACE DEVICES
9-88
®
MC13021
MOTOROLA
Product Preview
MOTOROLA C-QUAM®
AM STEREO TUNING STABILIZER
AM STEREO TUNING STABILIZER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
AM stereo systems are basically microphonic. They require a
high degree of local oscillator stability in the receiver front end,
particularly with respect to mechanical vibration in the audible
range. Motion of physical components which affect oscillator frequency can generate significant audio output via the L-R or stereo
information channel. To date, this has meant that most quality
AM stereo implementations were done with PLL synthesized
tuners. The MC13021 offers a low cost means of obtaining PLL
stability in conventional mechanically tuned radios.
16-
r~ y¥~p ~SUFFIX
1
PLASTIC PACKAGE
CASE 648-06
• Provides AFC for Tuning Accuracy and Ease
• Eliminates Microphonic Responses
• Provides Tuning Lock Indication
• Uses Existing Mechanical Tuning Elements
LevelDet
VCC
The MC13021 is appropriate at both ends of the cost spectrum,
from low priced mechanical auto radios to high end component
hi-fi receivers using non-varactor tuning. The oscillator drive
comes out at two levels to accommodate inductively or capacilively tuned systems. It is designed to work with the MC13020
C-QUAM decoder and any discrete or IC AM front end, such as
the MC13041 (ULN3841).
Ground
VRef In
VCOln
La Osc Out
VCO Out
Hi Osc Out
4> Det Out
2.0 V Ref
Window
Limiter In
Lock
Tuned FLL
Tuned Lamp
FIGURE 1 - TUNING MODE
IJ
Force Mono
FIGURE 2 - TUNED MODE
L
R
11
14
10
16
7
16
9
4
9
4
8
/
LED
This document contains information on a product under development. Motorola reserves the
right to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-89
+
MC13021
Vee
22
&-:lB2______ ~~2._
k
I
I OSCCoil of
: Receiver
I
2.2,uf 3:
PVC
HVAH109
I
I
Current
>-____'_0+:_-\
From MC13020
Pin 19
I
:
L
____ _
47 k
From MC13020 Pin 17
veo Reference
Voltage
Converter
I
MC13021
15
To MC13020
Pin 10
0.02
To MC13020
Pin 9
To MC13020 Pin 4
"Locked" LED Indicator
Vce
AM STEREO TUNING STABILIZER
II
In the Tuning Mode (Figure 1) the loop utilizes the
existing tuner oscillator coil as a frequency discriminator to generate a dc voltage which is used to steer a
voltage controlled oscillator (VCO). The VCO output is
applied to the discriminator to close the loop, forcing
the VCO to track the resonant frequency of the tuner
oscillator coil.
The output of the VCO is used as the receiver local
oscillator. In this mode the amount of the noise reduction is limited by the need to track the manual tuning
control without producing a delay that is perceptible to
the user, and it must be able to follow the rapid tuning
changes which are incurred in a push-button tuner. A
forced monaural output prevents the stereo decoder
from going stereo in this mode.
Upon acquiring a usable carrier, the system switches
from the Tuning Mode to the Tuned Mode. (See Figure
2.) In this mode the FLL steering voltage is derived from
the error voltage line ofthe MC13020 AM stereo decoder
PLL, forming what is effectively a classical automatic
frequency control.
The purchase of the Motorola C-QUAMIIII AM Stereo Decoder does not carry with such purchase any license by implication, estoppel or otherwise, under any patent rights
of Motorola or others covering any combination of this decoder with other elements including use in a radio receiver. Upon application by an interested party. licenses are
available from Motorola on its patents applicable to AM Stereo radio receivers.
MOTOROLA LINEAR/INTERFACE DEVICES
9-90
®
MC13022
MOTOROLA
Product Preview
C-QUAM®
ADVANCED, MEDIUM VOLTAGE
AM STEREO DECODER
ADVANCED, MEDIUM VOLTAGE
AM STEREO DECODER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC13022 is designed for home, portable, and automotive
AM stereo radio applications. The circuits and functions included
in the design allow implementation of a full-featured C-QUAM
AM stereo radio with relatively few, inexpensive external parts.
It is available in either 28-lead DIP or EIAJ compatible wide-bodied
28-lead SOIC.
• Operation from 4.0 V to 10 V Supply with Current Drain of
18 mA Typ
• IF Amplifier with Two Speed AGC
• Post Detection Filters with 10 kHz Notch that Allow User or
Automatic Adjustable Audio Bandwidth Control
P SUFFIX
PLASTIC PACKAGE
CASE 710-02
• Signal Quality Controlled Stereo Blend and Noise Reduction
• Noise and Co-Channel Discriminating Stop-On-Station
• Signal Strength Indicator Output for RF AGC and/or Meter
Drive
28.",
• Signal Strength Controlled IF Bandwidth
• Noise Immune Pilot Detector Needs no Precision Filter
Components
DWSUFFIX
PLASTIC PACKAGE
CASE 751 F-02
FIGURE 1 -
IJ
BASIC ELEMENTS OF THE SYSTEM
450 kHz
Low-Level
IF
Left Audio
Right Audio
1---+--------.-,.,
Pilot Lamp
Stop-Sensei
r----------.-,., RF AGCIMeter Drive
Fast AGC Control
The purchase of the Motorola C-QUAMfI\, AM Stereo Decoder does not carry with such purchase any license by implication. estoppel or otherwise,
under any patent rights of Motorola or others covering any combination of this decoder with other elements including use in a radio receiver. Upon
application by an interested party. licenses are available from Motorola on its patents applicable to AM Stereo radio receivers.
This document contains information on a product under development. Motorola reserves the
right to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-91
MC13022
MAXIMUM RATINGS
Rating
Symbol
Value
VCC
12
Vde
30
mAde
Supply Voltage
Pilot Lamp Current, Pin 21
Operating Temperature
Unit
TA
-40 to +85
°c
Storage Temperature
Tsto
-65to +150
°c
Junction Temperature
TJ(max)
150
°c
Po
1.25
10
W
mWfC
Power Dissipation
Derate above 25°C
ELECTRICAL CHARACTERISTICS
Characteristic
Min
Typ
Max
Input Signal Level, Unmodulated, Pin 5, for Full Operation
--
5.0
-
Audio Output Level, 50% Modulation, L only or R only
-
120
-
Audio Output Level, 50% Modulation, Monaural
-
60
Power Supply Operating Range
Supply Line Current Drain, Pin 25
Output THO, 50% Modulation
Monaural
Stereo
Unit
4.0 to 10
-
Vde
18
mAde
mVrms
mVrms
-
0.2
0.5
-
Channel Separation, L only or R only, 50% Modulation
FIGURE 2 -
.-
mVrms
%
-
32
dB
BLOCK DIAGRAM
CC
~
2.2k
1.0 k
0.001 ;:: "
,
~.o;
~,OOl
2.7 k
~
0.001;:1'
:::~7.F
.,[.
20p.F
~
I'
0.22
r-lDf-H~
r""""
LED
10P.~
Stereo
L R
Dot
Q
Dot
Vee
Loop
Filt
Blend
G"d
lamp
28
27
26
25
24
23
22
21
II
II
Signal
Ouality
Detector
0"
0"
,.'"
Fb'
20
Dot
Input
18
I
I
I
I
OArr: "'!.
p;:oT p~T
Pilot
Dot
1.0 .F
~
17
16
Filter
Control
15
Pilot
Detector
vco
Decoder
Gain-Controlled L R
J
Envelope L+R
<$}"'" c25 dB
1
PLASTIC PACKAGE
CASE 724-03
• Pilot Tone Detector
• Combined Tuning and Stereo Indicator
• "Blend On" Stereo Mode and lamp Drive
• High Accuracy, Fast locking VClO
• Controlled Return to Monaural Under Adverse Conditions
DWSUFFIX
• Minimized "Tweets and Birdies"
PLASTIC PACKAGE
CASE 751E-02
SO-24
• Minimized Tuning Transients
II
FIGURE 1 - FUNCTIONAL BLOCK DIAGRAM
~------------~--------------~~~------~------~--------~---c
Vee
PLL
Filter
AFe
IF Output
R
Decoder
'T'
Audio
"='
Outputs
Envelope Detector Output
Mono/Stereo
I-----?r"i+--O Vee
LED
~
I
L ____
~o~t~ _ _ _ _
I
I
I
J
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-101
MC13024
GENERAL DESCRIPTION
The MC13024 is a complete C-QUAM® AM stereo
receiver, from the antenna to low level audio. All that
is needed make a complete AM stereo radio is the addition of the appropriate audio output amplifier. The
MC13024 is intended for use in most types of manually
tuned receivers: pocket portables, "boom boxes," table
radios, etc. It will operate from 1.8 Vdc to 8.0 Vdc and
requires typically 5.0 mA (not including LED). This broad
supply voltage tolerance and low power consumption
makes it ideal for portables using as few as 2 battery
cells. The radios which can be built using this part can
be quite low in cost, while still benefiting from a high
degree of functional sophistication.
tuning element by the user. A proper level of pilot must
be present for several cycles before stereo mode will
be enabled. When all conditions are correct, the transition from monaural to stereo is done gradually to prevent a transient "pop." Under aberrated conditions, the
audio may either blend to mono or make an immediate
change to mono, depending on the detected condition.
The LED pin drives a dual purpose indicator: low current
for PLL lock, and full current for stereo mode. Again,
the switching is done "softly" to prevent transient loading of a weak battery.
The IF gain and the mixer RF gain are each reduced,
in turn, as signal strength increases, to optimize SIN
and prevent overload. The receiver is capable of 20 dB
SIN at 2.5 /LV/50 ohm input. At weak signals, the reference oscillator and quadrature divider are shut off to
minimize "tweets and birdies."
FEATURES
•
The MC13024 contains a wide dynamic range mixer,
IF, AGC, AFC, C-QUAM® decoder, stereo pilot tone
detector, and a signal quality detector. The stereo
decoding and pilot detection are similar to the wellestablished MC13020, except for reduced peripheral
components, and the phase-locked loop used for the
L-R detection now is looped around the entire receiver.
In other words, the PLL controls the tuner local oscillator
(VCLD) rather than a detector loop after the IF. The
advantage of this, in manually tuned AM stereo, is significant, because it assures that the signal will always
be properly centered in the IF bandpass, which is critical
to good channel separation. This architecture also gives
the radio an AFC tuning behavior which makes it easy
to tune. The PLL has two "speeds," provided by current
ratios of 50: 1, which give fast lock and low distortion,
respectively.
A signal quality detector circuit monitors lock condition, excess in-phase modulation due to interference,
pilot presence and amplitude, and the movement of the
RADIO CONSTRUCTION
Layout is not much more critical than any high performance AM receiver. Care must be taken to provide
a good ground plane and short leads on signal paths.
Take special care to keep the reference oscillator components close to Pin 22 and protected from coupling
from the pilot bandpass output, Pin 24. Also take care
with the ever present threat of RF radiation from the
audio output back into the antenna. This can be controlled by proper component location and good (close)
RF bypass on the amplifier Vec and good snubbers on
the audio outputs. Keeping in mind that this is a phasedetecting receiver, it is important to mount coils
securely and avoid movable wires in tuned circuits. A
lot of individual preference will go into each implementation; the components shown here are only
intended to provide a good working start.
The purchase of the Motorola C-QUAM® AM Stereo Decoder does not carry with such purchase any license by implication, estoppel or otherwise. under
any patent rights of Motorola or others covering any combination of this decoder with other elements including use in a radio receiver. Upon application
by an interested party, licenses are available from Motorola on its patents applicable to AM Stereo radio receivers.
MOTOROLA LINEAR/INTERFACE DEVICES
9-102
s:
FIGURE 2 -
n
....
APPLICATION CIRCUIT, MANUALLY TUNED HEADPHONE RADIO
I
J!: :::c 3.0 V
22"F-::r:0.33*,
J
Power
Switch
w
o
Two"AAA"
Batteries
or Larger
10
+1
0.068
Out 1131
~
0
Tun:~~i~a!t~reo,
--I
0
Ii'
2.2
NF 1
I
' 1
n
TA7376P
:0
Stereo
0
r
:P
Gnd
Headphone
Jack
!:
z
In 2
m
~
0
w
:P
:0
::::
z
--I
m
:0
"'Tl
:P
C1
22 JLF
m
0
m
<
C1
~
Loop
Antenna
~ [8] Pilot Out
0.068*,
Part Numbers for TOKO Tuning Components:
m
(J)
1.0 V Ref
Ground
Lock
II
T1 Input Transformer
T2 Local Oscillator
T3 Mixer Output
T4 IF Input (Ceramic}
T5 IF Output
T6 Reference Oscillator
A7BRS·10952X
A7BRS·T1342AIX
A7NRES·T1341
ALFC·450E
A7NRES·T1340AYN
MF291ACCS·3688VL
~
®
MC13041
MOTOROLA
Product Preview
AM RECEIVER SUBSYSTEM
SILICON MONOLITHIC
INTEGRATED CIRCUIT
AM RECEIVER SUBSYSTEM
This circuit is the core of an AM broadcast receiver. The
MC13041 is ideal as the front end for AM stereo radios using
electronic tuning. The scan detection system operates with both
frequency and signal amplitude data for "no false" tuning.
-
• Electrically Equivalent to ULN3841
• Full AM Receiver Function Including: L.O., Balanced Mixer, IF
Amp, AM Detector, Scan Control Detectors, and an Internal
Switchable Voltage Regulator
20
1
• Companion Device to MC13020 C-QUAM® AM Stereo
Decoder
P SUFFIX
PLASTIC PACKAGE
CASE 738-03
DWSUFFIX
PLASTIC PACKAGE
CASE 7510-03
SO·20
• Wideband (RF) Delayed AGC
• Optional Narrowband FM Output
• Tailored to Interlace with Synthesizers in Scanning E.T.R.
Applications
• Stop Detection Independent of AGC Time Constant
IFAGC
Mixer Out
Mixer In
Gnd
II
Mixer Bias
RFAGC In
Osc
MAXIMUM RATINGS
Det.ln
Rating
Power Supply Voltage
Pin 6
Thermal Resistance, Junction to Ambient
Operating Ambient Temperature Range
Storage Temperature Range
Symbol
Value
Unit
VCC
18
Vdc
ROJA
75
°CfW
TA
-40 to +85
°C
Tsrn
-65 to + 150
°C
Osc Gnd
L.O. Gnd
RF AGC Out
AFC Out
Stop Out
FIGURE 1 - C·QUAM AM STEREO BROADCAST RECEIVER
R
C-QUAMAM
Stereo Decoder
MC13020
MC13041
AM Receiver
System
RF
AGC
MPF102
JFET
L
Stereo Tone
Control
TDA1524A
TCA5550
Stop
Scan
Synthesized
Tuning
Subsystem
MC145156-1
MCl46805
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
MOTOROLA LlNEARIINTERFACE DEVICES
9-104
MC13041
ELECTRICAL CHARACTERISTICS (VCC ~ 14.4 Vdc, TA ~ + 25°C, RF Input Frequency ~ 1.0 MHz, IF ~ 450 kHz, FMOD ~ 1.0 kHz,
Modulation = 30% Test Circuit of Figure 2 unless otherwise noted)
Characteristic
Symbol
Operating Supply Voltage Range
VCC
Supply Current
ICC
Test Condition
RF Sensitivity
RF In to
Pin 18
Usable Sensitivity
RF In to
Pin 18
Recovered Audio
Audio Out
at Pin 5
Typ
Max
6.5-16.5
No Input Signal
-
25
33
mAdc
Pin 5 Audio Out Equals
50 mV
-
2.6
10
,uVrms
-
5.6
10
,uVrms
1.0 mV RF In at Pin 18
173
240
346
mVrms
1.0 mV RF In 80%
modulation at Pin 5
-
0.5
3.0
%
~
20 dB
-
Unit
-
S+N
At Pin 5 -N-
THD at
Pin 5
Total Harmonic Distortion
Min
Vdc
Osci Ilator Output
VOSC
RF Out at Pin 14
-
330
-
mVrms
Stop Voltage
VSTOP
Pin 11
No Input at Pin 18
4.3
5.2
-
Vdc
40
80
Stop Sensitivity
VSTP SEN
Pin 18 RF
Pin 11 Equals 1.5 Vdc
27
Stop Bandwidth
VSTOP BW
Pin 18
Pin 11
-
RF AGC
VAGC
Pin 12
Overload
THD at Pin 5
Audio Out
AGC Figure of Merit
Pin 5 Audio
Drop to 10 dB
Below Ref
~
~
1.0 mVrms
1.5 Vdc
~
0 mVrms
-
-
~
20 mVrms
0.8
-
-
-
1.2
-
%
-
75
-
dB
RF In at Pin 18
~
25 mVrms
RF In at Pin 18
dB Below 30 mV
TEST CIRCUIT
Stop Out __-~---'
muRata CFU 450 (Ceramic)
Osc.
5:1
T6
Mixer
Nl :N2 = 2.63
N1:N3", 11.7
T5
Detector Q
Toko 7TAS·Tl078AO
=
100
Toka
0.15
Vdc
Modulation = 80%
V reg
Filter
kHz
RF Pin 16
FIGURE 2 -
T3
-
RF Pin 16
NOTE: Pin 9 voltage regulator output for local oscillator only.
F1
±4.7
J.1.Vrms
7NAES~T1079EK
Toka 7NRES·T1080AAG
Ct=100pF
MOTOROLA LINEAR/INTERFACE DEVICES
9-105
II
MC13041
TAKEN IN TEST CIRCUIT OF FIGURE 2
FIGURE 3 -
RECOVERED AUDIO
FIGURE 4 -
260
RF INPUT AT AUDIO OUTPUT
= 50 mVrms
5.0
RF INPUT = 1.0 mVrms. 30% mod.
4.0
V
220
~60
V
......
V
-45 -30
-15
~
V
45
60
75
1.0
-60 -45 -30
90
RGURE 6 -
.--..
V
2!i
~4'O
fi 3,2
«
0
15
30
TEMPERATURE lOCI
45
60
75
90
STOP LEVEL
90
4.4
~
-15
AM AFC
4.8
!::i 3.6
,/
~ 2.0
5.2
~
f-""
~
5.6
<;
V
53.0
V
15
30
TEMPERATURE lOCI
FIGURE 5 -
--
~
V
...-
\
2.8
\
'-J
/'
V
/
/
80
1\
1\
/
70
~ 60
~
'"
8.0
~ 9.3
-
V'
V
FREQUENCY WINDOW
o 15 30
TEMPERATURE lOCI
FIGURE 8 -
60
45
/'"
75
90
8.0
10
FREQUENCY WINDOW
8.0
-
"'" -
7.0
~ 6.0
;;; 5.0
li:
~ 4.0
PINll=1.5V
~
~
~
z
~
3.0
~
@ 9.2
t;; 2.0
If
1. 0
9.1
-60
.,/
10
-60 -45 -30 -15
10
9.5
~
30
20
2.4
2.0
4.0
6.0
-10 -8.0 -6.0 -4.0 -2.0
DEVIATION FROM IF CENTER FREQUENCY
45 -30
-15
15
30
TEMPERATURE lOCI
45
60
75
o
90
-
,
.-.
:I
:/
il
\:
\\
.~.
\
, RF INPUT
70/LVrms
.li.ElI'j!'l!.L~1Q,!!lJl,rJ!1~_
-
~I
I
-10 -8.0 -6.0 -4.0 -2.0
2.0
4.0
6.0
DEVIATION FROM IF CENTER FREQUENCY
2.2J.t F
~
z
rri
:D
80~~gd?
"T1
f)
m
0
m
<
n
m
CIl
Vee,
12-14 Vdc
T1, T2
T3
T4
T5
T6
F1
Res
RF
Osc
Ant
Det
Mix
IF
Taka RWOS6A7894AO
Taka 7TRS-T1078AO
Taka 7HN-60064CY
Taka 7NRES-T1080AAG
Taka 7NRES-T1079EK
muRata SFG450F - 6.0 kHz
or SFG450E - 7.5 kHz
or SFG450D - 10kHz
muRata CSA3.60MGF101
•
II II
+..1 US!
)~~
Stereo
Audio
Out
MC13041
FIGURE 11 -
RECEIVER GAIN-REDUCTION VOLTAGES
FIGURE 12 - RECEIVER RECOVERED AUDIO
2.0
I II 11111
I.B
1.4
~ 1.2
w
~
~ O.B
~
~
PIN 17 - MIXER
N-..
0::
I 11111111 I
1. 0
STEREO OUTPUT
0
~
5-1.0
j
~ 1.0
I 11111111 I
:E!
I II 11111
1.6
u
3.0
iii 2.0
5 -2.0
o
PIN20-IF
~ -3,0
u
STEREO LOCK
~
II
... -4.0
0.4
0.2
o
10
~
~-50
PIN 12-RF
Hnl
~
1.0 k
10 k
100
SIGNAL INPUT TO ANTENNA (I'Vrms)
100 k
11111
.JJJ lUll
::>
~ 0.6
I
t?l~f ~F fT~R~~ t~~f
/ MONAURAL OUTPUT I I 11111
-6.0
-7.0 I
WJL
10
100
1.0k
1.0
SIGNAL INPUT TO ANTENNA (I'Vrms)
1IIIllii 1111
10 k
II
MOTOROLA LINEAR/INTERFACE DEVICES
9-109
®
MC13060
MOTOROLA
MINI-WATT
AUDIO OUTPUT
SILICON MONOLITHIC
INTEGRATED CIRCUIT
MINI-WATT AUDIO OUTPUT
· .. a rugged and versatile power amplifier in a remarkable plastic
power package.
8.1~.
• Supply Voltages from 6-35 Vdc
~,.",
1'
• 2.0 Watts Output «170°C Ambient on PC Board with Good
Copper Ground Plane
D SUFFIX
• Self Protecting Therma.1 Shutdown
PLASTIC PACKAGE
CASE 751-02
SOP-8
• Easy to Apply, Few Components
• Gain Externally Determined
• Output is Independent of Supply Voltage Over a Wide Range
Power Type
Lead Frame
Output
1
Gnd
2
Feedback
Gnd
Gnd
•
Input
Top
View
FIGURE 1 -
Vee
~
FIGURE 2 - THERMAL RESISTANCE AND MAXIMUM POWER
DISSIPATION versus P.C. BOARD COPPER
TYPICAL APPLICATION
6-35 V
Speaker
16/32 n
MOTOROLA LINEAR/INTERFACE DEVICES
9-110
MC13060
MAXIMUM RATINGS
Rating
Power Supply Voltage
Symbol
Value
Unit
VCC
35
1.0
V
Vp _p
Audio Input, Pin 5
Thermal Resistance, Junction to Air
R8JA
160
·C/W
Thermal Resistance, Junction to Case
R8JC
25
·CIW
Junction Temperature
TJ
150
·C
Operating Ambient Temperature Range
TA
-40 to +85
·C
Tstg
-65 to + 150
·C
Storage Temperature Range
ELECTRICAL CHARACTERISTICS -
AUDIO SECTION (TA
~ 25·C Circuit of Figure 3 unless otherwise noted)
Characteristic
Power Supply Current, No Signal
Symbol
Min
Typ
ICC
-
13
Ao
50
-
0.2
1.0
0.5
3.0
Max
Distortion at 62.5 mW Output, 1.0 kHz
THO
Distortion at 900 mW Output, 1.0 kHz
THO
-
Quiescent Output Voltage, No Signal
VPin 1
-
8.4
VPin 5, VPin 8
-
0.7
Rin, Pin 5
-
28
-
Vout
-
0.5
4.0
Gain
Input Bias
Input Resistance
Output Noise (50 Hz-15 kHz) Input 50 II
FIGURE 3 -
VCC
~
~ +
1
VN
%
%
Vdc
Vdc
kll
mVrms
TEST CIRCUIT
+ 16 Vdc
4 ICC
1.01'F
Audio Input
Unit
mAdc
+
+
8
16 II
Load
330
50
6.8
DESCRIPTION
The amplifier can best be described as a voltage source
with about 1.0 A p _p capability. On a good heat sink, it
can deliver over 2.0 watts at 70·C ambient.
The MC13060 will automatically go into shut-down at
a die temperature of about 150·C, effectively protecting
itself, even on fairly stiff power supplies. This eliminates
the need for decoupling the power supply, which
degrades performance and requires extra components.
Input Pins 5 and 8 are internally biased at 0.7 Vdc and
should not be driven below ground.
The MC13060 is a quasi-complementary audio power
amplifier, mounted in the SOP 8 (power SOIC package).
It is well suited to a variety of 1.0 and 2.0 watt applications in radio, TV, intercoms, and other speaker driving tasks. It requires the usual external components for
high frequency stability and for gain adjustment.
The output signal voltage and the power supply drain
current are very linearly related, as shown in Figure 5.
Both are quite constant over wide variation ofthe power
supply voltage (above min VCC for clipping, of course).
MOTOROLA LINEAR/INTERFACE DEVICES
9-111
II
MC13060
ALL CURVES TAKEN IN THE TEST CIRCUIT OF FIGURE 3 UNLESS OTHERWISE NOTED
FIGURE 4 -
QUIESCENT SUPPLY CURRENT AND OUTPUT VOLTAGE
versus SUPPLY VOLTAGE
FIGURE 5 -
20
200
18
Signal
~
~..§.
14
~§
12
§
10
~~
8.0
§Z
>- u
::>~
>
«
u
.!::?
-
lee
I-
/'
~ ~ 6.0
180
/"
0
uv 16
~~
f-.-:;;;
160
L ,.---
V
~
80
~
'"
60
/'
V
/
RL ~ 32!l
.,..
Vee ~ 32V / "
.,.-/
,..........
k'"
. /V
.,.....,..
./
~ x,
RL
20
Vee, SUPPLY VOLTAGE IVde)
30
a
40
a 1.6
II
2.0
:nis
I
Gain
1.0
1.2
5d
~ 1.0
2.0~
~
0.6
0.4
3.0
~ 0.6
~
0.2
I
a
10
100
lK
~ 0.4
5.0
F 0.2
a
6.0
10K
2.0
-
/V
V V,.
11/ V
'I V
f/. V
~/..,.....
-- 24 V /
..-
VCC
~
32
n
LOAD
I
I
I
/,
/,
~'
10
1.0
2.0
PO, POWER OUTPUT (WATTS I
DISSIPATION versus OUTPUT POWER -
FIGURE 9 -
16
n LOAD
2.0
32 V
28 V
.'
."
.'"
V
V
"'"
/ /'
THO
....--
..-
16 V
~
2.0
VCC
.,..-
I.
III'f//
20 V
1.0
PO, POWER OUTPUT (WATTSI
1_32 V32!l
I
-- --- -
0.1
DISSIPATION versus OUTPUT POWER -
f-o/-24 V16!l
+-+-
f. FREQUENCY (Hzl
FIGURE 8 -
I
24 V321 ! I - j
I
I
~
8.0
:
I
0.8
4.0
7.0
I
I
16V16!l
;'ij Z~ 1.2
1.0~
~
\
I I
I I
~ 1.8
z
400 Hz
~ 1.6 - Signal
~ 1.4 ~r--
~
32 V
I
DISTORTION versus POWER OUTPUT
z
0
a:;; 1.0
0.8
2.0
3.0
4.0
5.0
6.0
SINE WAVE OUTPUT VOLTAGE (VOLTS RMSI
2.0
4.0
3.0
I~~~I ~ 11~ v,1 R~ I~ IW!l~ Ols ~
1.0
FIGURE 7 -
DISTORTION AND GAIN versus FREQUENCY
~
Vee
I
a
10
:sF 1.4
•
_HL ~ 16!l
Vee ~ 24 V
-
0
2.0
ci
100
Va Idel
;: 1.8
F
~
a
V
/'
.B 4a
o
FIGURE 6 -
'"~
~
140
120
/'
V
a
~
!z
E.
/
4.0
2.0
~
SUPPLY CURRENT versus OUTPUT
20 V
..-
16 V
9-112
'1;'~O-
..-
1.0
PO, POWER OUTPUT (WATTSI
MOTOROLA LINEAR/INTERFACE DEVICES
17
24Vt'?
2.0
MC13060
FIGURE 10 -
INTERNAL SCHEMATIC
.-----.----.. . .
....
~-
~--._~~._-_o Audio
Vee
4
D1
t-----o
Audio
Output
Audio o--_.----.J
Input 5
Audio
Feedback 0 - - - - - . - - - '
8
r
MOTOROLA LINEAR/INTERFACE DEVICES
9-113
Ground
Pins
2,3,5,6
®
MC34119
MOTOROLA
Specifications and Applications
Information
LOW POWER
AUDIO AMPLIFIER
LOW POWER AUDIO AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC34119 is a low power audio ampiifier iniegraied circuii
intended (primarily) for telephone applications, such as in
speakerphones. It provides differential speaker outputs to maximize output swing at low supply voltages (2.0 volts minimum).
Coupling capacitors to the speaker are not required. Open loop
gain is 80 dB, and the closed loop gain is set with two external
resistors. A Chip Disable pin permits powering down and/or
muting the input signal. The MC34119 is available in a standard
8-pin DIP or a surface mount package.
• Wide Operating Supply Voltage Range (2-16 volts) Telephone Line Powered Applications
Allows
• Low Quiescent Supply Current (2.7 mA Typical) for Battery
Powered Applications
P SUFFIX
PLASTIC PACKAGE
CASE 626-05
• Chip Disable Input to Power Down the IC
• Low Power-Down Quiescent Current (65 p.A Typical)
• Drives a Wide Range of Speaker Loads (8 Ohms and Up)
• Output Power Exceeds 250 mW with 32 Ohm Speaker
• Low Total Harmonic Distortion (0.5% Typical)
• Gain Adjustable from <0 dB to >46 dB for Voice Band
II
• Requires Few External Components
1
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
BLOCK DIAGRAM AND TYPICAL APPLICATION CIRCUIT
Rf
75 k
VCC
Ci
------,
,--------+---,
Audio
0.1
Input )-l1-'VV'v-"*-'-30
0
-
MH
-
dB
+0.35
-
-
1.5
55
250
400
-
-
1.0
-
0.5
0.5
0.6
50
-
-
-
THD
1.0 kHz)
(VCC ~ 6.0 V, RL ~ 32 H, Pout ~ 125 mW)
(VCC '" 3.0 V, RL ~ 8.0 H, Pout ~ 20 mW)
(VCC'" 12 V, RL ~ 32 H, Pout ~ 200 mW)
Power Supply Rejection (VCC ~ 6.0 V, t.VCC
(Cl ~ x, C2 ~ 0.01 /LF)
(Cl ~ 0.1 /LF, C2 ~ 0, f ~ 1.0 kHz)
(Cl ~ 1.0 /LF, C2 ~ 5.0 /LF, f ~ 1.0 kHz)
-
AVOl1
~
6.0 V, 1.0 kHz'" f '" 20 kHz, CD
3.0 V)
GMT
mW
-
PSRR
2.0 V)
MHz
%
dB
~
dB
12
52
-
>70
1.0
1.15
2.65
5.65
dB
AMPLIFIERS (DC CHARACTERISTICS)
Output DC Level (jv VOl, V02, VCC ~ 3.0 V, RL ~ 16 H
(Rf ~ 75 k)
VCC ~ 6.0 V
VCC ~ 12 V
Output High Level (lout 75 mA, 2.0 V", VCC '" 16 V)
Output Low Level (lout - 75 mA, 2.0 V", VCC '" 16 V)
VO(3)
VO(6)
VO(12)
VOH
VOL
Output DC Offset Voltage (V01-V02)
(VCC ~ 6.0 V, Rf ~ 75 kH, RL ~ 32 !l)
t.VO
-
-30
VCC-l.0
0.16
1.25
-
Vdc
Vdc
Vdc
0
+30
mV
liB
-
-100
-200
nA
6.0 V)
RFCl
100
150
220
kH
Equivalent Resistance @ FC2 (VCC - 6.0 V)
RFC2
18
25
40
kH
ICC3
ICC16
ICeo
-
2.7
3.3
65
4.0
5.0
100
mA
Input Bias Current @ Vin (VCC - 6.0 V)
Equivalent Resistance @ FCl (VCC
~
CHIP DISABLE (Pin 1)
Input Voltage
Low
Input Voltage - High
Input Resistance (VCC - VCD - 16 V)
POWER SUPPLY
Power Supply Current
(VCC ~ 3.0 V, RL ~ 00, CD ~ 0.8 V)
(VCC ~ 16 V, RL ~ 00, CD ~ 0.8 V)
(VCC ~ 3.0 V, RL ~ 00, CD ~ 2.0 V)
..
-
Note. Currents Into a pm are POSitive, currents out of a pm are negative .
MOTOROLA LINEAR/INTERFACE DEVICES
9-115
/LA
MC34119
PIN DESCRIPTION
Symbol
Pin
Description
CD
1
Chip Disable - Digital input. A Logic "0" «0.8 V) sets normal operation. A Logic "1" (.. 2.0 V) sets
the power down mode. Input impedance is nominally 90 kn.
FC2
2
A capacitor at this pin increases power supply rejection, and affects turn-on time. This pin can be left
open if the capacitor at FCI is sufficient.
Fel
3
Analog Ground for the amplifiers. A 1.0 J.LF capacitor at this pin (with a 5.0 J.LF capacitor at Pin 2)
provides (typically) 52 dB of power supply rejection. Turn-on time of the circuit is affected by the
capacitor on this pin. This pin can be used as an alternate input.
Vin
4
Amplifier input. The input capacitor and resistor set low frequency rolloff and input impedance. The
feedback resistor is connected to this pin and VOl.
VOl
5
Amplifier Output #1. The dc level is
Vec
GND
6
DC supply voltage (+2.0 to + 16 volts) is applied to this pin.
7
Ground pin for the entire circuit.
V02
8
Amplifier Output #2. This signal is equal in amplitude, but 180° out of phase with that at VOl. The dc
level is ~ (VCC - 0.7 V)/2.
~
(Vec - 0.7 V)/2.
TYPICAL TEMPERATURE PERFORMANCE (- 20° < TA < + 70°C)
Function
Typical Change
Units
±40
pAf'C
+0.003
%fDC
Input Bias Current W' Vin)
Total Harmonic Distortion
(Vce = 6.0 V, RL = 32 n, Pout
Power Supply Current
(Vee = 3.0 V, RL ~ "', eo
(Vce = 3.0 V, RL = "', eo
= 125 mW, f = 1.0 kHz)
J.LAf'C
= 0 V)
= 2.0 V)
-2.5
-0.03
DESIGN GUIDELINES
II
similar for a particular IC, and therefore nearly cancel
each other at the outputs. Amplifier #l's bias current,
however, flows out ofVin (Pin 4) and through Rf, forcing
Val to shift negative by an amount equal to [Rf x IIB[.
V02 is shifted positive an equal amount. The output
offset voltage specified in the Electrical Characteristics
is measured with the feedback resistor shown in the
Typical Application Circuit, and therefore takes into
account the bias current as well as internal offset voltages of the amplifiers. The bias current is constant with
respect to VCC.
GENERAL
The MC34119 is a low power audio amplifier capable
of low voltage operation (VCC = 2.0 V minimum) such
as that encountered in line-powered speakerphones.
The circuit provides a differential output (V01-V02) to
the speaker to maximize the available voltage swing at
low voltages. The differential gain is set by two external
resistors. Pins FCl and FC2 allow controlling the amount
of power supply and noise rejection, as well as providing alternate inputs to the amplifiers. The CD pin permits
powering down the IC for muting purposes and to conserve power.
Fe1 and FC2
Power supply rejection is provided by the capacitors
(Cl and C2 in the Typical Application Circuit) at FCl and
FC2. C2 is somewhat dominant at low frequencies, while
Cl is dominant at high frequencies, as shown in the
graphs of Figures 4-7. The required values of Cl and
C2 depend on the conditions of each application. A line
powered speakerphone, for example, will require more
filtering than .a circuit powered by a well regulated
power supply. The amount of rejection is a function of
the capacitors, and the equivalent impedance looking
into FCl and FC2 (listed in the Electrical Characteristics
as RFCl and RFC2)'
In addition to providing filtering, Cl and C2 also
affect the turn-on time of the circuit at power-up, since
the two capacitors must charge up through the internal 50 k and 125 kO resistors. The graph of Figure 1
indicates the turn-on time upon application of VCC of
+ 6.0 volts. The turn-on time is =60% longer for Vec
= 3.0 volts, and =20% less for VCC = 9.0 volts. Turnoff time is <10!-,s upon removal of Vee.
AMPLIFIERS
Referring to the block diagram, the internal configuration consists of two identical operational amplifiers. Amplifier #1 has an open loop gain of ;;.80 dB
(at f ". 100 Hz), and the closed loop gain is set by
external resistors Rf and Ri. The amplifier is unity gain
stable, and has a unity gain frequency of approximately 1.5 MHz. In order to adequately cover the telephone voice band (300-3400 Hz)' a maximum closed
loop gain of 46 dB is recommended. Amplifier #2 is
internally set to a gain of -1.0 (0 dB).
The outputs of both amplifiers are capable of sourcing
and sinking a peak current of 200· mAo The outputs can
typically swing to within =0.4 volts above ground, and
to within =1.3 volts below VCC, at the maximum current. See Figures 18 and 19 for VOH and VOL curves.
The output dc offset voltage (V01-V02) is primarily
a function of the feedback resistor (Rf), and secondarily
due to the amplifiers' input offset voltager.. The input
offset voltage of the two amplifiers will generally be
MOTOROLA LINEAR/INTERFACE DEVICES
9-116
MC34119
power. The maximum power which can safely be dissipated within the MC34119 is found from the following
equation:
fiGURE 1 - TURN-ON TIME versus C1, C2 AT POWER-ON
300f-_+-t-_+-+--_+....----,::J.-""'F-~-+___+___1
PD = (140·C - TA)/OJA
where T A is the ambient temperature;
and 0JA is the package thermal resistance (100·CIW for
the standard DIP package, and 180·CIW for the surface
mount package.)
:g 2401--+--=---'
--,:-:-':--7'fV--1--t---+--1--f--1
Cl ~ 5.0/Lf /
~
~ lBOI--+--j,/-7./~-+--t-+-+--t-+./"'""7I
The power dissipated within the MC34119, in a given
application, is found from the following equation:
~'20~--~b~::t:~t;~E;~:::t::~::~~~=t==~
0
PD = (VCC x ICel + (lRMS x Vcel - (RL x IRMS2)
where ICC is obtained from Figure 15.;
and IRMS is the RMS current at the load;
and RL is the load resistance.
./
Cl - 1.0/Lf
I-V";:'+-+-"":';..-"":';F---f--+-VCC switching from-
o~~~-+~~__~I~~__-+~_0~~O_+_6~'01~vo_lt_S·~I-~.
U
U
U
U
W
C2, CAPACITANCE I/Lfl
CHIP DISABLE
The Chip Disable (Pin 1) can be used to power down
the IC to conserve power, or for muting, or both. When
at a Logic "0" (0 to 0.8 volts), the MC34119 is enabled
for normal operation. When Pin 1 is at a Logic "1" (2.0
to VCC volts), the IC is disabled. If Pin 1 is open, that is
equivalentto a Logic "0," although good design practice
dictates that an input should never be left open. Input
impedance at Pin 1 is a nominal 90 kn. The power supply current (when disabled) is shown in Figure 15.
Muting, defined as the change in differential gain
from normal operation to muted operation, is in excess
of 70 dB. The turn-off time of the audio output, from
the application of the CD signal, is <2.0 ,.,.S, and turn
on-time is 12-15 ms. Both times are independent of C1,
C2, and VCC.
When the MC34119 is disabled, the voltages at FC1
and FC2 do not change as they are powered from VCC.
The outputs, V01 and V02, change to a high impedance
condition, removing the signal from the speaker. If signals from other sources are to be applied to the outputs
(while disabled), they must be within the range of VCC
and Ground.
Figures 8-10, along with Figures 11-13 (distortion
curves), and a peak working load current of ± 200 mA.
define the operating range for the MC34119. The operating range is further defined in terms of allowable load
power in Figure 14 for loads of 8.0 n, 16 n, and 32 n.
The left (ascending) portion of each of the three curves
is defined by the power level at which 10% distortion
occurs. The center flat portion of each curve is defined
by the maximum output current capability of the
MC34119. The right (descending) portion of each curve
is defined by the maximum internal power dissipation
of the IC at 25°C. At higher ambient temperatures, the
maximum load power must be reduced according to
the above equations. Operating the device beyond the
current and junction temperature limits will degrade
long term reliability.
LAYOUT CONSIDERATIONS
Normally a snubber is not neeefed at the output of the
MC34119, unlike many other audio amplifiers. However,
the PC board layout, stray capacitances, and the manner
in which the speaker wires are configured, may dictate
otherwise. Generally the speaker wires should be
twisted tightly, and be not more than a few inches in
length.
POWER DISSIPATION
Figures 8-10 indicate the device dissipation (within
the IC) for various combinations of VCC, RL, and load
TYPICAL CHARACTERISTICS
fiGURE 2 -
100
AMPLIfiER #1 OPEN LOOP GAIN AND PHASE
-
l
plas~
0 ........
36
ffi
36
~
72 ;;:;
iii
:s
.........
'" 24
Gai.;'-
180~
u
11!,IJk
I
V
AIIII
z
;;:
, / VRt ~ 75 k, R' ~ 3.0 k
~
/
z
ffi
......
DiffERENTIAL GAIN versus fREQUENCY
'-~f 1'~k~R:
32
144ffi
tt
Rf
01~
V01
16
Input )-I
i5
0
100
~
'"
108~
0
o
fiGURE 3 -
o
III
.....
1.0K
10K
f, fREQUENCY 1Hz)
lOOK
o
1.0M
100
1.0K
f, fREQUENCY 1Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
9-117
~lvo"'
II I
II 1111
10K
#1
I I
20K
I
ttt
MC34119
POWER SUPPLY REJECTION versus FREQUENCY
FIGURE 4 -
C2
= 10,.F
FIGURE 5 -
0
C2
= 5.0,.F
0
I-Cl ;.1.0/LF
e-Cl '" 1.0 /LF
-
0
rCl = 0.1 /LF
40
-
50
o-Cl
..............
o
0
200
1.0K
I-
= 0
.............
10
0
200
20K
10K
.........
0
r0-
I--Cl = 0
-Cl~F
0
1.0K
FIGURE 6 -
FIGURE 7 -
C2 ,;, 1.0,.F
0
60
0
~30
50
Cl = 1.0/LF
-Cl = 5.0/L~
........
%
1/11
ffi
.....- I-
.......
0
~
...............
1.0K
l-I--"
-Cl = 1.0/LF
10K
o
200
20K
f, FREQUENCY 1Hz)
rli
/
1.0K
f, FREQUENCY 1Hz}
MOTOROLA LINEAR/INTERFACE DEVICES
9-118
l......--
.........
1 1
O_Cll=~
Cl = 0
200
~
_I-'
.....-
0
"-20
o
C2 = 0
__ v
0
Cl - 0.1 /LF
0
--
1 1
1 1
Cl = 5.0/LF
0
20K
10K
f, FREQUENCY 1Hz}
f, FREQUENCY 1Hz)
10K
20K
MC34119
FIGURE 8 -
FIGURE 9 -
DEVICE DISSIPATION
DEVICE DISSIPATION
160 LOAD
8.00 LOAD
1000
.s
is
~
~
Vee
/vee ~ 12V
800
§::
1200
V
/
600
/
L
400
t'j
~ 200 /
--
V
/
vee~~ -.:;::;;:-
800
~
600
~
3.0 V_
oV
o
30
60
90
120
150
FIGURE 10 -
1200
""
~
1000
.sz
800
/
600
~
a
V
/ /
I
/I
Vl
i5
~ 400
200 III
'V..L
o :.o
V
Vee
100
8
2
I
I
3.0 V
200
300
400
500
o~
o
DISTORTION versus POWER
~
__ Vee
~
Vee
I
/
o
~
3.0 V, RL
6.0 V, RL
~
I
1/1
I
1
I
I
RL=32n
~
100
100
~
200
1611
'IV
200
32 n
\{
300
400
500
=
II-+- i-Vee
~
/-f-- Vee
Vee
32 n
~
3.0V,RL
~
16n
= 3.0 V, RL = 8.0 n
6.0 V, RL = 32 n
-I
I
I
I
I
/
/
I
J
Vee ~ 12 V, RL = 32 {if
400
o
o
500
I
Vee ~ 16 V,
RL = 32 n Limit
I
I /
300
~
RL
RL=16n
\
FIGURE 13 - DISTORTION versus POWER
f = 1. 3.0 kHz. AVO
12 dB
I
Vee = 6.0V,RL
........
L
8.0n
1Vee ~1'6 v, I
RL = 32 n limit
I
/ I
8.0 n
I I Vee = 16 V,-Vee ~ 6.0 V,_ /-vee ~ 12V_
16 n
~
J I I
6
oV
3.0 V, RL
~
~
32 n
I
10
- Vee
~
OUTPUT POWER ImW)
f = 3.0 kHz. AVO = 34 dB
10
3.0 V, RL = 16 n
Vee = 6.0 V, RL
LOAD POWER ImW)
FIGURE 12 -
~
__ Vee = 3.0 V, RL
6.0 V
~
~
=
1.0 kHz. AVO
Vee
1-
4
~
400
DISTORTION versus POWER
34 dB
~
6
Vee
100
300
200
0
-
.....
LOAD POWER ImW)
f
~
6.0 V
r--
FIGURE 11 -
V~e ~ Lv-
-
/
o
'"
~
DEVICE DISSIPATION
320 LOAD
r-- r-Ve~~16V
§::
'/
o
o
LOAD POWER ImW)
~
Vee
I l.---IL
Vee ~ 3.0 ~
~
200
--
/
~ 400
-
./
/
I /
I
I /
i5
Vee
i"" Vee - 12 V
/
o
~
./"I
16 V
/
§::
.sz
f.--
/
~
1000
I\
\
100
OUTPUT POWER ImW)
Vee
RL
...
200
I
~ 6.0 V,
_
= 16nlimit J
9-119
~
Yo
300
OUTPUT POWER ImW)
MOTOROLA LINEAR/INTERFACE DEVICES
L Vee
~ 12V
RL
32 n
400
500
MC34119
FIGURE 14 -
MAXIMUM ALLOWABLE LOAD POWER
500
RL
\
400
RL = 16n
§<
g 300
II
i
\
'I
III
~ 200
"I'-.
I
"\
o
8
10
Vee (VOLTS)
FIGURE 16 -
--
12
= x
I'-.....
14
-
0
~ r----
<
g 2.0
\.
"'-
TA = 25°e - Derate at higher temperatures
o
3.0
\..
.........
POWER SUPPLY CURRENT
eo
\
1\
RL = 8.on
17
100
FIGURE 15 -
4. 0
1
RL - 32fl1
J;l
1. 0
-
}
0
eo
.
SMALL SIGNAL RESPONSE
-"
O.U
4.u"
L.O
16
FIGURE 17 -
Vee
8.u"
10
Vee (VOLTS)
11
14
16
LARGE SIGNAL RESPONSE
(
OUTPUT
20 mVIDiv
OUTPUT
1.0 VlDiv
\.
\.
INPUT
1.0 mVIDiv
INPUT
80 mVIDiv
20 ",slDlv
10 ",slDlv
II
FIGURE 18 -
FIGURE 19 -
VCe-VOH @ V01, V02 versus LOAD CURRENT
VOL @ V01, V02 versus LOAD CURRENT
1. 5
1. 4
1.4
1.1-TA = 25°e
3
./
1
./
1.0
o.9
O.8 ...........
o
/'
./
8
...-'i.OV '" Vee'" 16V-
.......-
TA
./
40
160
V
-
./
./
O.4
o. 21---
I
I
80
120
LOAD eURRENT (rnA)
/
-
6
= 25°e_
./
= 1.0VJ
/
1.0
./
1
I
Vee
200
0
-
-
--
r40
MOTOROLA LINEAR/INTERFACE DEVICES
9-120
--
I-'"
80
120
LOAD CURRENT (mA)
/
..-:
Vec
= 3.0V
......r
~V
I
I
160
100
MC34119
FIGURE 20 -
FIGURE 21 -
INPUT CHARACTERISTICS @ CD (PIN 1)
AUDIO AMPLIFIER WITH HIGH INPUT IMPEDANCE
75 k
200
./
160
,,~ 120
0,1
r1~~>-+---i
V
c
.Y
/V
80
/
/
40
V
/'
I
Valid for VCD " VCC
I
50 k
1-
o /
o
8,0
VCD (VOLTS!
4,0
12
L..:_____ _
16
Differential Gain '= 34 dB
Frequency Response: See Figure 3
Input Impedance"'" 125 kH
.7
PSRR - 50 dB
FIGURE 22 0,05
AUDIO AMPLIFIER WITH BASS SUPPRESSION
75 k
FIGURE 23 -
0,05
~, .~~+-~
6
-=
4
FREQUENCY RESPONSE OF AGURE 22
2
0,1
Input >-1
V
,,-
6/
r
5,0/lF
0
0
1.OK
100
10K
20K
Il
f. FREQUENCY (Hz!
FIGURE 24 -
AUDIO AMPLIFIER WITH BANDPASS
1000 pF
AGURE 25 -
FREQUENCY RESPONSE OF FIGURE 24
lOOk
36
100 k
0,05
32
0,05
~"~~+-~
«
-=
~
z:
~
~
It
0
I
24
'"
0,1
Input>-1
I
f-"'"
~
8,0
o
50 k
"
1/
16
100
1,OK
1-
10K
f. FREQUENCY (Hz!
L _____ _
7
MOTOROLA LINEAR/INTERFACE DEVICES
9-121
20K
MC34119
FIGURE 26 -
SPLIT SUPPLY OPERATION
Rf 75 k
------..,
VCC (+ 1.0 to +8.0 V)
Ci
Audio
I n put
.-------~---.
0.1
>---1 f-''VV"....~O-:-+---i
I
I
5 VOl
I
I
IL _______
MC34119
, _ _ _ _ '~
7 _
_
~
~
VEE
( _ 1.0 to - 8.0 V)
10k
NOTE; If Vee and VEE are not symmetrical about ground then Fe1 must be
connected through a capacitor to ground as shown on the front page.
VEE
MOTOROLA LINEAR/INTERFACE DEVICES
9-122
Chip
Disable
®
MC44301
MOTOROLA
(Formerly MC13011)
Product Preview
SYSTEM 4
HIGH PERFORMANCE
COLOR TV IF
SYSTEM 4
HIGH PERFORMANCE COLOR TV IF
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC44301 is a single channel TV IF and PLL detector system
for all standard transmission systems. This device enables the
designer to produce a high quality IF system with white spot
inversion, AFT and AGC. The MC44301 was designed with an
emphasis on linearity to minimize sound/picture intermodulation.
~
mrnrn
~~~
• Single Coil Adjustment for AFT and PLL
PSUFFIX
II !LASTIC PACKAGE
• VCO at 1/2 IF for Minimum Beats
1
CASE 724-03
• Simple Circuitry for Low System Cost
• White Spot Inversion
• Symmetrical ± 2.0 MHz Pull-In
DWSUFFIX
PLASTIC PACKAGE
CASE 751 E-02
SO-24
• Detects Positive or Negative Modulation
• Auxiliary AM Detector for AM Sound
• Simple Alignment Procedure
FIGURE 1 -
BLOCK DIAGRAM
AFT
Out
AFT
9 Switch
--------,
/
IPLL Filter
.-------o---I~
-+-ir
'-1s
L--
'<0
l
I
I
I
I
I
24 Sound
1--+--+--+--------0 Output
RF AGC 10
AGC Delay 12
AGC Gate
13 1
/
L_
RF AGC
l'
Filter
~
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-123
&I
MC44301
MAXIMUM RATINGS
Rating
Power Supply Voltage -
Symbol
Value
VCC
7.0
Vdc
V13
±500
mApk
Pin 22
Gating Pulse Amplitude
Operating Temperature
Units
TA
-40 to +85
"C
Storage Temperature
Tstg
-65to +150
"C
Junction Temperature
TJ Max
150
"C
PD
1.25
10
mWI"C
Power Dissipation
Derate above 25"C
ELECTRICAL CHARACTERISTICS (VCC
=
50 Vdc TA
=
W
25"C unless noted)
Typ
Max
Units
Pins
Min
Operating Supply Voltage Range
22
4.5
-
5.5
Vdc
Supply Current
22
-
bO
-
mAdc
Characteristic
Differential Input Sensitivity for Full Output
6,7
-
120
80
-
dB
Noise Figure
-
-
ILVrms
Bandwidth
-
7.0
-
dB
Lock-Up Time
-
-
5.0
ms
Video Amplitude (100% mod depth)
2,3
-
2.4
10
5.0
-
AGC Range
20
MHz
Vpp
Differential Gain Distortion
2
-
-
5.0
%
Differential Phase Distortion
2
-
-
2.0
degrees
2,3
-
8.0
-
MHz
0.1
-
V rms
Tuner AGC Current
Video Bandwidth
Sound Subcarrier Output (-20 dB to PIX)
24
13
AGC Gate Pulse (R pin 13 = 5.0 k)
Differential Input Impedance
6,7
Rin
Cin
FIGURE 2 -
lJ[::
~
3.4
3.0
-
Sound Output
24
23 NC
Video
2}
3 Outputs
?o
-=-
4
22
Mode Switch
Pas Mod
AFT Output
56
-=-
~3.3 k
1°.Q1 1
01
. :
18
-=-
I
I
I
Off
RFAGC
-=-
-=-
17
Digital
AFT Output
~ub-carrier
0.11'
I
I
I
21 NC
19
I ForAM
I Modulated
I Sound
VCC
20
RFAGC
Adjust
kO
pF
-
I Connection
ToSyncSep
VCC
mApk
TEST CIRCUIT
NC
White
Spot Inverted
±0.3
mAdc
r
AFT Switch
0.1
15
10
0.1
11
16
RF AGC Filter
Lock Detector
Filter
~
Envelope
Detector Out
14
3.0 k
+
13
12
1:
MOTOROLA LINEAR/INTERFACE DEVICES
9-124
AGC
Gate Pulse
Envelope
Detector In
MC44301
sistor small signal emitter resistances (re) are corrected
by the cross-coupled resistors. This arrangement leads
to a simpler design, the ability to adjust the demodulation angle, and lower distortion than is normal at the
IF amplifier/demodulator interface. The dynamic emitter
resistances, which can give rise to distortion, are now
in quadrature with the capacitive reactance and, therefore, contribute very little to the resultant output.
CIRCUIT DESCRIPTION
Design Aims
The MC44301 performs the functions of IF amplification, AGC, AFT and demodulation of a TV IF signal
for both positive and negative modulation systems. In
this respect it is similar to other circuits already on the
market. However, in the means of obtaining these functions the MC44301 is very different compared to traditional designs. A unique approach was needed for several reasons. Tuned circuits associated with the IF
amplifier output had to be eliminated to enable the part
to be easy to use with the minimum of adjustments and
external components. With this approach a high degree
of IF stability could be obtained with a reduction in cost.
Secondly, new techniques were required to improve
performance in certain critical areas (differential phase
and gain, etc.). This was especially so in view of the
removal of the above mentioned tuned circuits. The
basic idea therefore, was to produce an advanced, high
performance multistandard IF system which would be
economical and easy to use. Such a device can successfully compete with the already established IF amplifiers now available.
FIGURE 3 -
System Description
Despite the extra complications compared to pseudo
synchronous demodulation, true synchronous demodulation seemed to be the only way in which enhanced
performance could be achieved. The basic system is
shown in Figure 1 in block diagram form. The IF amplifier is a four stage, AC coupled design having a sensitivity of about 20 p.V. With a low loss SAW filter and 3.0
to 6.0 dB extra gain in the tuner, there is no need for a
SAW preamp. The TV set signal to noise performance
is acceptable, while the net savings in cost is considerable. The AGC is a conventional gated system with
the usual RF AGC output and RF AGC adjustment. Three
stages of the amplifier are gain controlled to give an
extended AGC range of 80 dB with improved intermodulation, signal handling, and differential phase and
gain performance. The AGC reference is switched when
positive modulation is selected, via the mode switch, to
ensure the video level remains constant. Under these
circumstances the AGC must be gated by a pulse which
will sample the back porch, as opposed to negative
modulation where fly back can be used. In both cases a
positive or negative-going pulse may be used. To
ensure that the improvements in performance mentioned above were not lost elsewhere, great care was
taken in the design of the video demodulator and video
amplifiers. An example of this care is the placing of the
phase shift required by the video demodulator on the
signal side instead of on the oscillator side ofthe demodulator as is common practice. The 90° phase shift is
produced by replacing the usual emitter resistors by
capacitors in the differential amplifier (Figure 3) feeding
the video demodulator. The output currents are 90° with
respect to the input voltage over a wide band of frequencies and the small phase errors caused by the tran-
90° PHASE SHIFT AMPLIAER
Following the IF amplifier and preceding the PLL
phase detector is a two stage limiter with a gain of 100
and overall dc feedback. This contrasts with the usual
single stage of limiting with no dc feedback and a tuned
circuit with diodes at it's output. With two stages of
limiting, the minimum gain required to remove signal
amplitude modulation can be designed-in without the
large voltage swings of a single stage with the same
gain. Large voltage swings lead to poor differential
phase and gain performance, hence the need for a tuned
circuit and diodes as used in previous designs. The dc
feedback removes the effects of input offsets which are
another source of differential phase and gain problems.
The combination of low swing per stage and dc feedback removes the need for having a tuned circuit at the
output of the limiter and reduces the danger of IF instability and radiation. The only problem in using this
technique is the potential for extra static phase shift and
resultant errors in the demodulating angles at the video
and sound demodulators. However, by putting a similar
two stage limiter, with matching phase shift, on the
oscillator side of the phase detector, the demodulating
angles can be restored to the correct phases (0, 90°).
Having processed the signal in this way, the VCO is then
phase locked at 90° to the noniimited signal. The only
unusual feature of the loop just described is that the
VCO runs at half frequency, and is frequency doubled
on-chip. This means radiation from the external frequency determining components will be at "half IF" and
so will not desensitize the system even if picked up by
the amplifier input leads (this could cause what is known
as PLL push-off). Running the oscillator at twice IF frequency and dividing down, which is another way of
MOTOROLA LINEAR/INTERFACE DEVICES
9-125
E
MC44301
solving .this problem has several disadvantages. First
and foremost, radiation into the antenna at twice IF produces channel 6 and channel 8 problems in the USA.
Secondly, it is easier to produce a stable veo at half IF.
After attaining phase lock, demodulation of the video
is achieved by multiplying the signal (nonlimited) with
the regenerated vision carrier (VeO) in a double balanced multiplier, the phase relationship between the
two waveforms being zero degrees. Both positive and
negative sync video outputs are produced.
FIGURE 4 - PIN 2 VIDEO OUTPUT WITH
WHITE SPOT INVERSION
Volts
--z--
3.7
-3Q------------J-~ormal 0%
2.5
---
1.31----
--
---
and
1?0%
Carrier
Levels
---
White Spot
Clamp Level
FIGURE 5 - PIN 3 VIDEO OUTPUT
FOR DRIVE TO A SYNC SEPARATOR
Volts
3.7
------r---
Normal 0%
and 100%
Carrier
Levels
1.3
1.1
--- ---
T~e negative sync output is intended to be used as
the actual video and is acted upon by the white spot
noise inverter. This effectively removes the "whiter than
white" noise produced by a true synchronous demodulator and prevents the eRT from being over driven
and defocused. The positive sync video output is not
acted on by a white spot noise inverter and of course
the noise output from a synchronous detector does not
contain a dc component. Hence, this drive should be
used as the sync separator drive because a simple preseparator low pass noise filter will produce optimum
sync performance. Note the sense of the video signals
at the outputs remain the same whether positive or
negative modulation is being received. Positive or negative modulation is selected externally by the mode
switch pin. The sound intercarrier is recovered by
another demodulator simiiar to tlie video, except tliat
the phase relationship between the signal and the veo
is 90° instead of 0°. A consequence of this phase relationship is that video interference of the intercarrier signal at the detector output is minimized by suppression
of the lower frequency video components. Should the
sound carrier contain amplitude information, as in the
French TV system or as in some scrambled cable signals, this information can be recovered by feeding the
sound intercarrier output back into the circuit through
a bandpass filter if so desired, to the amplitude detector
provided on chip.
The AFT portion of the circuit is the most unconventional in form. Essentially, AFT is derived by amplifying
the error signai driving the veo aiter phase jock, and
applying this to the local oscillator in the tuner, thus
eliminating a coil and a potential IF instability problem.
After acquisition, and when the circuit has settled down,
due to the much higher gain in the LO loop, the veo
will have moved a small amount (Afv) from it's nominal
frequency, and almost all the original error frequency
(Ate) between LO and veo will have been corrected by
the change in LO frequency (Atl). In this way, provided
the PLL can be initially locked to the incoming IF signal,
the veo can be used as the frequency reference for the
AFT system. It follows from the above therefore,
because the system is phase locked, that Ate = (Afl +
Atv). The combination of the local veo loop and the
loop produced by feedback to the LO forms a double
loop PLL. Analysis shows that overall system stability
can be assured by treating the veo loop as a stand
alone PLL, provided its bandwidth is much wider than
the LO loop. The veo loop therefore is a low gain wideband loop which guarantees initial capture, while the
LO loop is basically a high gain dc loop used to keep
frequency and phase offsets to a minimum. Large phase
offsets can also be caused by dc offsets in the phase
detector and AFT amplifier. These are removed by the
use of commutation on both the phase and AFT outputs.
This eliminates the need for external phase adjustment,
while at the same time minimizing distortion by maintaining the correct phase angles at the demodulators.
The AFT system has been designed to acquire the
vision carrier, without false locking to the sound or adjacent sound carriers, with an initial LO frequency error
of ± 2.0 MHz, reducing this initial error to 3.0 to 10kHz
when locked. This contrasts to the discriminator type of
AFT's which have highly asymmetric lock characteristics (- 2.0 MHz + 1.0 MHz), because of the effects of
the IF filter, and large frequency errors caused by limited
loop gain. To achieve this level of performance without
encountering the normal AFT problems associated with
high loop gain, a novel approach has been taken to
locking up to the PLL. In the absence of an IF signal, the
acquisition circuitry examines the state of the video (I)
and sound (a) demodulators and detects the lack of a
signal. It then clamps the LO drive to a reference dc
level and applies a - 2.0 MHz offset to the veo. This is
done so that the nominal IF (should a signal appear),
and the veo, are sitting in the center of the IF filter
passband. Therefore, even if the LO drifts high by + 2.0
MOTOROLA LINEAR/INTERFACE DEVICES
9-126
MC44301
but not to the extent where it would cause any veo
tracking problems. This technique allows the acquisition time of the circuit to be considerably shortened
while still using a larger than normal time constant in
the La loop. To accommodate all types of tuners and
La's, positive or negative La drive can be selected
externally by operation of the AFT switch. The AFT
switch also has a third position which disconnects the
drive to the tuner. Under this condition the TV set can
be tuned in the normal manner and so appears to have
a conventional type of AFT. Other PLL AFT systems cannot be manually tuned in this way having an abrupt
capture characteristic when tuned, and because of this,
have not gained general acceptance in industry.
MHz, the signal will not be s'ignificantly attenuated by
the filter. When the acquisition circuit detects the
appearance of a signal, beat notes are produced at the
output of the demodulators, a sweep generator is
switched on, and immediately sweeps the veo an additional - 2.0 MHz from it's out of lock nominal frequency.
During this negative sweep, the PLL phase detector
is switched off so phase lock cannot be obtained. The
veo is then swept positive from - 2.0 MHz to + 2.0 MHz
of nominal with the phase detector switched on. The
PLL will therefore lock to the first carrier it encounters.
This in fact must be the vision carrier because the sound
carrier is more negative than - 2.0 MHz from nominal
and the adjacent sound carrier is higher than the vision
carrier. On achieving phase lock, the AFT clamp is
released, the veo offset is slowly removed, the sweep
is inhibited and the phase detector remains enabled.
With the AFT clamp removed, a large error voltage
appears at the AFT output, driving the system back
towards the correct frequency. Since the La loop is slow
and the veo is fast, the IF changes slowly and the veo
tracks it, maintaining phase lock until the final static
conditions are reached. For large frequency errors during this period the slew rate of the La loop is increased,
FIGURE 6 -
ALIGNMENT
The alignment is very simple and inexpensive compared to other IF amplifier circuits, especially those
using a PLL. With a ew input signal of correct picture
carrier frequency, the La side of the 22 k resistor in
series with the loop is connected to a dc supply. The dc
supply (approximately 2.5 V) is adjusted until the output
of the tuner is 45.75 MHz. The veo coil is adjusted until
lock is obtained and the voltage across the 22 k resistor
THE AFT SYSTEM IN ACTION
Typical IF Input
Filter Response
IF Bandpass
Properly Tuned Channel
Desired
CD
I
P
I
I
I
Asl
I
I
I
I
I
I
I
Adjacent
Nominal Channel with Initial 2.0 MHz Offset
Initial nominal offset of VCO and La (AFT). When a beat note
is detected, AFT bias is held and VCO is swept another
2.0 MHz low with phase detector inhibited, then the VCO is
swept high with the phase detector active. Upon phase lock,
the AFT clamp is removed and the initial VCO offset is slowly
removed. Capture of desired picture carrier is assured even IF
mistuned ± 2.0 MHz.
I
I
- 2.0 MHz Mistuning
with Initial 2.0 MHz Offset
+ 2.0 MHz Mistuning with Initial 2.0 MHz Offset
AP
MOTOROLA LINEAR/INTERFACE DEVICES
9-127
MC44301
is zero. The dc supply is then removed.
A digital AFT up/down output having a ± 30 kHz dead
zone is also provided by the circuit. Again, as in the case
of the analog output, the digital output polarity can be
controlled externally by the AFT switch.
Note:
Most pins on the Ie have electrostatic protection
diodes to Vee and ground. It is therefore imperative
that no pin is taken below ground or above Vee by more
than one diode drop without current limiting.
FIGURE 7 - ALIGNMENT CONFIGURATION
c.w.
Picture
Carrier
II
MOTOROLA LINEAR/INTERFACE DEVICES
9-128
®
MC44802
MOTOROLA
Prod uet Preview
PLL TUNING CIRCUIT WITH 1.3 GHz PRESCALER
PLL TUNING CIRCUIT
WITH 1.3 GHz PRESCALER
The MC44802 is a tuning circuit for TV applications. It contains
on one chip all the functions required for PLL control of a VCO.
This integrated circuit also contains a high frequency prescaler
(which can be bypassed by software control) and thus can handle
frequencies up to 1.3 GHz.
The MC44802 is manufactured on a single silicon chip using
Motorola's high density bipolar process, MOSAIC (Motorola
Oxide Self Aligned Implanted Circuits).
• Complete Single Chip System for MPU Control (IIC Bus)
CASE 707·02
PLASTIC PACKAGE
• Selectable Divide-by-8 Prescaler Accepts Frequencies
>1.0 GHz
• 15-Bit Programmable Divider Accepts Input Frequencies
>125 MHz
• Programmable Reference Divider
• Tri-State Phase/Frequency Comparator
DWSUFFIX
CASE 751C-03
PLASTIC PACKAGE
SO-18l
• Op Amp for Direct Tuning Voltage Output (33 V)
• Seven High Current Output Buffers (10 mAl
• Output Options for 62.5 kHz, Reference Frequency and the
Programmable Divider
• Software Compatible with MC44810
PIN ASSIGNMENT
SIMPLIFIED BLOCK DIAGRAM
3
VCCl
Progr.
Reference
In
Out
1953 Hz
VCC2
PHO
VCC1
XTAl
HF
SOA
HF
SCl
Gnd
B7
BO
B6
B1
B5
B2
B4
17
Bus Receiver
ORDERING INFORMATION
Gnd
6
Device
MC44802P
MC44802DW
This document contains information on a product under development. Motorola reserves the right
to change or discontinue this product without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-129
Operating
Temperature
Range
O·C to 70·C
Package
18-Pin DIP
18-Pin SOIC
E
MC44802
MAXIMUM RATINGS (TA
=
25·C unless otherwise specified)
Ratings
Pin
Value
Power Supply Voltage VCC1
3
6.0
Unit
V
Band Buffer "OFF" Voltage
7 to 13
15
V
Band Buffer "ON" Current
7 to 13
15
mA
Op Amp Power Supply Voltage VCC2
2
36
V
Op Amp Short Circuit Duration (0 to VCC2)
1
Continuous
V
-65 to + 150
·C
o to +70
·C
Storage Temperature
\0
Operating Temperature Range
ELECTRICAL CHARACTERISTICS (VCCl = 50 V VCC2 = 32 V TA = 25·C unless otherwise specified)
Characteristic
Pin
Min
Typ
Max
VCCl Supply Voltage Range
3
4.5
5.0
5.5
V
VCCl Supply Current (VCCl = 5.0 V) (Note 1)
3
-
60
90
rnA
VCC2 Supply Voltage Range
2
25
30
35
V
VCC2 Supply Current (Output Open)
2
-
0.8
2.0
rnA
0.01
1.0
I'A
0.6
1.0
V
-
0
I'A
1.0
I'A
1.0
I'A
Band Buffer Leakage Current When "OFF" at 12 V
7 to 13
Band Buffer Saturation Voltage When "ON" at 10 rnA
7 to 13
Data/Clock Current at 0 V
14,15
-10
Clock Current at 5.0 V
14
0
Data Current at 5.0 V Acknowledge "OFF"
15
0
Data Saturation Voltage at 15 mA Acknowledge "ON"
15
DatalClock Input Voltage Low
14,15
-
Data/Clock Input Voltage High
Unit
1.0
V
1.5
V
-
14,15
3.0
Clock Frequency Range
14
0
Phase Detector Tri-State Current
17
-15
0
15
nA
Phase Detector High-State Source Current (lit 1.5 V)
17
-3.0
-2.2
-1.5
rnA
rnA
Phase Detector Low-State Sink Current
«ii, 3.5 V)
100
V
kHz
17
2.0
3.0
4.0
Op Amp Internal Reference Voltage
-
2.0
-
3.0
V
Op Amp Input Current
18
-15
0
15
nA
DC Open Loop Gain
-
5000
Phase Margin (RL = 10 k, CL = 20 pF)
-
50
-
-
Gain Bandwidth Product (RL = 10 k, CL = 20 pF)
0.1
0.3
V
-
V
Vout Low, Sinking 50 I'A
1
Vout High, Sourcing 50 I'A, VCC2
1
0.3
-4.0
-3.0
-
MHz
-
Deg.
HF CHARACTERISTICS (See Figure 1)
-
1.6
HF Voltage Range Prescaler "OFF" 10-150 MHz
5
20
1500
mVrms
HF Voltage Range Prescaler "ON" 50-950 MHz
5
30
-
1500
mVrms
HF Voltage Range Prescaier "ON" 950-1300 MHz
5
50
-
1000
mVrms
4,5
HF In/Ref DC Bias
NOTE
1. When prescaler "OFF:' typical supply current is decreased by 20 rnA.
MOTOROLA LINEAR/INTERFACE DEVICES
9-130
-
V
MC44802
FIGURE 1 -
HF SENSITIVITY TEST CIRCUIT
50V
"--
Bus
I
Bus Controller
I
VCC1
5.0 V
-
MC44S02
3
HF Generator
4
1.0nF
HF Out
II
14
15
~
50 !l Cable
~
I
-::-
Device is in test mode: R2 = 1, R3
0 (see Bus Section)
sensitivity IS level of HF generator on 50 ohms load
1
5
=
6
4.7k
B5
1 1 - - In
.1
Counter
=f.0
nF -::50
n
-'-
(without MC44S02 load).
FIGURE 2 -
PIN 5 INPUT IMPEDANCE (TYP)
PIN FUNCTION DESCRIPTION (See Figure 3)
Pin
Description
Function
1
Out
Operational amplifier output which provides the tuning voltage
2
VCC2
Operational amplifier positive supply
3
VCCl
Positive supply of the circuit (except op amp)
4
5
HFin or HFref
HFin or HFref
Either of the inputs may be used as reference
6
Gnd
Ground
7,S,9, 10, 11, 12, 13
14
BO, Bl,........ B7
Band buffer output can drive up to 10 mA
SCl
Clock Input (supplied by the microprocessor via IIC bus)
15
SDA
Data Input
16
XTAl
Crystal Input (4.0 MHz)
17
PHD
Phase Comparator Output
1S
In
Negative Operational Amplifier Input
MOTOROLA LINEAR/INTERFACE DEVICES
9-131
MC44802
FIGURE 3 - PIN CIRCUIT SCHEMATIC
47 nF
100 nF
Tuning - r - - - - - - - - - - H -......~wv----4---__,
Voltage
18
In
22 k
17
(PHD)
HFin ----jl---<>------~
1.0 nF
1---1
6
L __ J
Gnd
II
r----'
r------,
7
BO
8
Bl
9
B2
:
I
I
~,~--~--~I
L ____ J
L
I
.r----i
:I
13
B7
12
B6
____ J
11
iL ____ J~,~--~--~
B5
r----'
10
B4
,
I
iL ____ J~,~--~--~
Vee1!
!I
I
I
MOTOROLA LINEAR/INTERFACE DEVICES
9-132
MC44802
FUNCTIONAL DESCRIPTION
A representative block diagram and a typical system
application are shown in Figures 4 and 5. A discussion
of the features and function of each of the internal
blocks is given below.
FIGURE 4 - BLOCK DIAGRAM
22 k
Tuning
Voltage
FIGURE 5 - TYPICAL TUNER APPLICATION
IF Out
UHF
VHF
Bill
5.0 V
'--1=:::;::=;;=r:::===~~----4~--'" Clock
L-~~~~~~~-------f~--~ICBus
Data
f asc
V Tun
AGC
47 nF
*Pins 4 and 5 are equivalent
33 V
MOTOROLA LlNEARIINTERFACE DEVICES
9·133
MC44802
DATA FORMAT AND BUS RECEIVER
Frequency information is preceeded by a Logic "0."
If the function bit is Logic "1" the two following bytes
contain control and band information where the bits
have the following functions:
The circuit receives the information for tuning and
control via a two-wire bus (Motorola Bus, IIC compatible). The incoming information consisting of a chip
address byte followed by two or four data bytes, is
treated in the IIC bus receiver. The definition of the permissible bus protocol is shown below:
1_STA
2_STA
3_STA
4__STA
STA
STO
CA
CO
FM
FL
BA
;
;
;
;
;
;
;
CA
CA
CA
CA
CO
FM
CO
FM
BA
FL
BA
FL
STO
STO
FM
CO
FL
BA
ADDRESS
CA
RMi
Bit RO and R1
Define the reference divider division ratio.
Four ratios are available (see Table 1).
-
Bit R2 and R3
Are used to switch internal signals to the buffer outputs. Pin 10 and 11 (see Table 2).
-
Bit R2, R6 and T
Are used to control the phase comparator output
stage (see Table 3).
-
BitP
Switches the prescaler in and out. At Logic "1" the
prescaler is bypassed and the power supply of the
prescaler is switched off.
STO
STO
Start Condition
Stop Condition
Chip Address Byte
Data Byte for Control Information
Data Byte for Frequency Information (MSB' S)
Data Byte for Frequency Information (LSB' S)
Band Information
STA
-
ACK
DATA
DATA
ACK
ACK
STO
TABLE 1
Figure 6 shows the five bytes of information that are
needed for circuit operation: there is the chip address.
two bytes of control and band information and two
bytes of frequency information.
After the chip address, two or four data bytes may be
received: if three data bytes are received the third data
byte is ignored.
If five or more data bytes are received the fifth and
following data bytes are ingored and the last acknowledge pulse is sent at the end of the fourth data byte.
The first and the third data bytes contain a function
bit which allow the IC to distinguish between frequency
information and control plus band information.
Input Data
Reference Divider
Ri
RO
Division Ratio
0
0
2048
0
1
1024
1
0
512
1
1
256
TABLE 2
FIGURE 6 -
Input Data
DEFINITIClN ClF BYTES
o
CA_Chip Address
0
0
o
0
ACK
CO_Information
Test Outputs on Buffers
R2
R3
0
0
Pin 10
0
i
62.5 kHz
1
0
Frel
1
1
-
-
Pin 11
FBY2
-
BA_Band Info.
FM_Frequency Inlo.
FL_Frequency Info.
Bit B4 has to be "zero" when Pin 10 is used to output
62.5 kHz.
Bit 4 and B5 have to "zero" to output Fret and FBY2.
FBY2 is the programmable divider output frequency
divided by two.
N9 N8 ACK
N7 N6
N5
N4 N3
N2
Ni
BO ACK
MOTOROLA LINEAR/INTERFACE DEVICES
9-134
MC44802
TABLE 3
Output State of the Phase Comparator
Input Data
R2
R6
T
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Normal Operation
Off (High Impedance)
High
Low
Normal Operation
Off
Normal Operation
Off
THE BAND BUFFERS
BA_Band Information
B7
B6
B5
B4
x
B2
The band buffers are open collector transistors and
are active "low" at Bn = 1. They are designed for
10 mA with a typical on-resistance of 70 ohms. These
buffers are designed to withstand relative high output
voltage in the off-state.
B4 and B5 buffers (Pins 10 and 11) may also be used
to output internal IC signals (reference frequency and
programmable divider output frequency divided by 2)
for tests purposes.
Buffer B4 may also be used to output a 62.5 kHz frequency for an intermediate stage of the reference
divider. The bit B4 andlor B5 have to be zero if the
buffers are used for these additional functions.
~
BO
ACK
programmable divider is set to a counting ratio of N
256 or higher.
=
THE PRESCALER
The prescaler has a preamplifier which guarantees
high input sensitivity. The prescaler may be by-passed
(Bit P) and the Signal then passes through preamp 2.
THE PHASE COMPARATOR
The phase comparator is phase and frequency sensitive and has very low output leakage current in the
high impedance state.
THE OPERATIONAL AMPLIFIER
The operational amplifier is designed for very low
noise, low input bias current and high power supply
rejection. The positive input is biased internally. The op
amp needs 31 V supply (VCC2) as minimum voltage for
a guaranteed maximum tuning voltage of 28 V.
Figure 1 shows a possible filter arrangement. The
component values depend very much on the application
(tuner characteristic, reference frequency, etc.);
As a starting point for optimization, the components
values in Figure 1 may be used for 7.8125 kHz reference
frequency in a multi band TV tuner.
THE PROGRAMMABLE DIVIDER
The programmable divider is a presettable down
counter. When it has counted to zero it takes its required
division ratio out of the latches B. Latches B are loaded
from latches A by means of signal TOI which is synchronous to the programmable divider output signal.
Since latches A receive the data asynchronously with
the programmable divider, this double latch scheme is
needed to assure correct data transfer to the counter.
The division ratio definition is given by:
N
B1
16384 x N14 + 8132 x N13 + ..... + 4 x N2 + 2 x N1 + NO
Max Ratio 32767
Min Ratio 17
THE OSCILLATOR
The oscillator uses a 4.0 MHz crystal tied to ground
or VCC1 through a capacitor, used in the series resonance mode.
The voltage at Pin 16, "crystal," has low amplitude
and low harmonic distortion.
Where NO....... N14 are the different bits for frequency
information.
The counter may be used for any ratio between 17
and 32767 and reloads correctly as long as its output
frequency does not exceed 1.0 MHz.
The data transfer between latches A and B (signal TOI)
is also initiated by any start condition on the IIC bus.
At power-on the whole bus receiver is reset and the
SYSTEM APPLICATION
Table 4 is a summary of the circuit applications using
a 4.0 MHz crystal.
MOTOROLA LINEAR/INTERFACE DEVICES
9-135
Il
MC44802
TABLE 4
R1
RO
Ref. Divider
Div. Ratio
Reference
Frequency
Hz
(1)
0
0
1
1
0
1
0
1
2048
1024
512
256
1953.125
3906.25
7812.5
15625.0
Input Data
(1) With 4.0 MHz Crystal
With Int. Prescaler
P = 0
Without Prescalsr
P = 1
Frequency
Steps
kHz
Max. Input
Frequency
MHz
Frequency
Steps
kHz
Max. Input
Frequency
MHz
15.625
31.25
62.5
125
512
1024
1300(2)
1300(2)
1.953125
3.90625
7.8125
15.625
64
128
165(3)
165(3)
(2) Limit of Presealer
(3) Limit of Programmable Divider
MOTOROLA LINEAR/INTERFACE DEVICES
9-136
®
TBA120C
MOTOROI.A
FM IF AMPLIFIER,
LIMITER, FM DETECTOR
AND
AUDIO PREAMPLIFIER
FM IF AMPLIFIER, LIMITER AND DETECTOR
An integrated circuit specifically designed for use in the sound
section of "TV receivers and the FM/IF portion of radio receivers.
The TBA120C is pin for pin and function compatible with the
proelectron type TBA120S but includes an improved dc volume
control, which makes "grouping" or selection unnecessary.
• Excellent 3.0 dB Limiting
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• High A.M. Rejection
•
• Wide Supply Voltage Range
• Auxiliary Zener Diode and Transistor
• Minimum Number of External Components Required
1
PLASTIC PACKAGE
CASE 646-06
CIRCUIT SCHEMATIC
11
~
Il
312Z1
1.0k
4
Q20
Z2
045
1.0k
6
13
107
MOTOROLA LINEAR/INTERFACE DEVICES
9-137
9 5
TBA120C
MAXIMUM RATINGS (TA = +25"<: unless otherwise noted)
Value
Unit
Power Supply Voltage
Ratinll
+18
Vdc
Power Dissipation (Package Limitation)
Plastic Package
Derate above TA = + 25'C
625
5.0
mW
mWrC
o to
Operating Temperature Range
+75
-65 to +150
Storage Temperature Range
'c
'c
ELECTRICAL CHARACTERISTICS (TA = + 25'C, VCC = 12 V, R = 20 k, Test circuit: Figure 1)
Charac:teristic
Typ
Min
Supply Voltage Range
-
6.0
Max
Unit
18
Volts
Supply Current
10
14
18
Audio Output (to = 5.5 MHz, £1.1 = 50 kHz, 0 = 45)
1.0
-
Volts RMS
0.38
-
Volts RMS
3.0 dB Limiting (to = 10.7 MHz, £l.t = 75 kHz, 0 = 35)
-
A.M. Rejec:tion (to = 5.5 MHz, RF Input: 500 ,",V)
45
-
-
A.M. Rejection (to = 10.7 MHz, RF Input: 500 "V)
40
-
-
Volume Control Range
65
75
Output Impedance
-
2.6
Audio Output (to = 10.7 MHz, £l.t = 75 kHz, 0 = 35)
3.0 dB Limiting (to = 5.5 MHz, £1.1 = 50 kHz, 0 = 45)
30
40
ELECTRICAL CHARACTERISTICS OF AUXILIARY Z DIODE AND TRANSISTOR Q45 (TA
Charac:teristic
Z-Voltage @ 5.0 mA (Pin 12)
-
=
"VRMS
"VRMS
dB
dB
dB
kll
+25')
Min
Typ
Max
Unit
11.2
-
13.2
Volts
Z-Resistance (Pin 12) @ 1.0 kHz, 5.0 mA
-
045 Breakdown Voltage VCEO
13
-
045 Current Gain @ IC = 1.0 mA, VCE = 5.0 V
40
100
15
MOTOROLA LINEAR/INTERFACE DEVICES
9-138
60
mA
-
Il
Volts
-
TBA120C
FIGURE 1 -
TEST CIRCUIT
COMPONENT VALUES:
Vee
5.5 MHz
6.0 MHz
10.7 MHz
L
Cl
Q
0.55 JLH
0.55 JLH
2.2 JLH
1.5 nF
1.2 nF
100 pF
45
45
35
C2 = 0.022 JLF, together with the integrated resistor of
2.6 k!l (Pin 8) gives the deemphasis and can be reduced
if required. For stereo 470 pF should be used to provide
H.F. decoupling.
FIGURE 2 - AUDIO OUTPUT AND SIN versus
INPUT SIGNAL LEVEL AT 5.5 AND 6.0 MHz
-10
;-
Output 11111111
II II
FIGURE 3 - AUDIO OUTPUT AND SIN versus
INPUT SIGNAL LEVEL AT 10.1 MHz
I1111
""
-10
OdB=1.oVllii.1S)@Af=5OkHz
-20
-20
-30
-30
iii
~-40
:2-40
5
1=-50
5
~-50
~
-60
is -60
-70
I
-BO
10 ILV
10mV
100 mV
"'~JHl
~
50
I
1.0mV
10mV
100 mV
RF INPUT
I
c = 1.2 nF
60
z
a
SIN
N.
lOILV
FIGURE 4 - A.M. REJECTION versus INPUT
SIGNAL LEVEL AT 5.5 AND 6.0 MHz
(30% A.M .. 50 kHz F.M.)
BO
I1111 I
=' 75 kHz
i'o.
-80
1.0mV
RF INPUT
70
11111 II II
I-
r1l
-70
iii
"-
I-
O~t~ut II
o dB = 3BO mV (RMS) @ AF
FIGURE 5 - A.M. REJECTION versus INPUT
SIGNAL LEVEL AT 10.1 MHz
(30% A.M .. 15 kHz FM)
80rT~rn~~'-rrrrn~rrTTnmm-rr~Tnrn
I~
~Mtl
70~+-HH~~~~HH~H-++~~~~+Hffi
601-++-++++++ll-++-+++l+1-1H+++H±W-~"i"i~
C = 1.5 nF
~50~4-t+~ffi-t+-HH+H*~F+++~~+-t+~
;..-
~
o 40~1-~~~++-~H+H*-r~++~~+-~~
~ 40
~ 30~4-t+~~++-HH+H*~~++H*~+-t+~
~30
:;;
z
17
18
20
FIGURE 9 - OUTPUT SIGNAL ATTENUATION
versus D.C. VOLTAGE AT PIN 5
V
10
a;
/
40
:!'1.
80 ~
20
50
S
/
70
40
~
z
/
./
1/
80
V
50
60
70
V
,/
30
z
0
=>
7
60
/"
20
V
30
l-
II
= 10.7 MHz
-70 -60 -50 -40 -30 -20 -10
AmNUATION (dB)
/'
S 50
=>
1=
=>
0
'\
.......... t- 10
FIGURE 8 - OUTPUT SIGNAL ATTENUATION
versus VOLUME CONTROL RESISTANCE
:!'1.
10 = 5.5 MHz
I
6.0 7.0 8.0 9.0
a;
\;
~ 3.0
..,.."'"
v
oV
\
4.0
w
/
~ 0.6
~
/
~0.7
5.0
/l
I
fo = 5.5 &6.0 MHz
AI = 50kHz
90
200
500 1.0k 2.0k
RESISTANCE (OHMS)
5.0k 10k
20k
2.0
1.0
3.0
4.0
DC VOLTAGE (VOLTS)
FIGURE 11 - T.H.D. versus OUTPUT VOLTAGE
FOR AUDIO PREAMPLIFIER SHOWN
IN RGURE 10
FIGURE 10 - AUDIO PREAMPUFIER TEST CIRCUIT
1.0
+12 V
Voltage Gain
,
0.9
Typ 9.0 dB
0.8
1= 1.0 kHz
0.7
~0.6
z
~ 0.5
180 k
/
~0.4
Q45
/
15 0.3
./
0.2
V
J-......
0.1
o
o
0.2
0.4
O.
O.B
1.0 1.2
OUTPUT VOLTS RMS
MOTOROLA LlNEAR/(NTERFACE DEVICES
9-140
1.4
1.6
I.B
2.0
TBA120C
FIGURE 12 - TYPICAL APPLICATION FOR
5.5 MHz WITH L·C INPUT FILTER
FIGURE 13 - TYPICAL APPLICATION FOR
5.5 MHz WITH CERAMIC INPUT FILTER
10 nF
10 nF.I.
FIGURE 14 - TYPICAL APPLICATION FOR 10.7 MHz WITH CERAMIC FILTER
+12V
+12V
I
1.0k
FM Tuner
Ir
Deemphasis mono 22 nF
stereo 470 pF
2.2 jLF Audio
t-~_-+'"i( TOKO 0 Output
r-i'>------'!:--., TKXC.33733BS
1.5 k
11 . ~0 nF
1-++..,
L -_ _ _ _...J
10 nF.I
MOTOROLA LINEAR/INTERFACE DEVICES
9-141
®
TCA4500A
MOTOROLA
Advance Information
FM STEREO
DEMODULATOR
FM STEREO DEMODULATOR
DESIGNED FOR USE IN HI-FI STEREO RECEIVERS
AND CAR RADIOS
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Wide Supply Range: 8 - 16 Vdc
•
Excellent Channel Separation Maintained Over Entire Audio
Frequency Range (Fixed or Adjustable)
•
Variable Blend Control
•
Low Distortion: 0.3% THD at 2.5 Vp·p Composite Input Signal
•
Excellent Rejection of AR I Subcarrier (57 kHz)
•
Excellent Rejection of Pilot Tone Harmonics including 114 kHz
•
Wide Dynamic Range: 0.5 - 2.5 Vp-p Composite Input Signal
•
Up to 6 dB Gain (Monaural)
•
Low Output Impedance
• Transient·free Mono/Stereo Switching
•
50 dB Supply Ripple Rejection
•
Integrated Stereo/Monaural Switch Capability
•
Requires No Inductors
II
PLASTIC PACKAGE
CASE 648-06
100 mA Lamp Driving
FIGURE 1 - TYPICAL APPLICATION AND TEST CIRCUIT
228kHz
Monitor
PIN FUNCTIONS
Stereo
~
1
2
3
4
5
6
7
-
Input
Preamplifier output
Left amplifier input
Left channel output
Right channel output
Right amplifier input
Stereo Indicator Lamp
8 - Ground
9 - Stereo switch filter
10 - Stereo switch filter
11 -
19 k Hz output/blend
, 2 - Modulator input
R3
5.1k
13 - Loop filter
14 - Loop filter
15 - Oscillator AC network
R6
5.1k
16 - VCC
L
R
Outputs
+ Vee
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
9-142
TCA4500A
MAXIMUM RATINGS
ITA
= +25 0 e unless otherwise noted)
Rating
Power Supply Voltage
Power Dissipation (Package limitation)
Derate above T A = +25 0 C
Operating Temperature Range (Ambient)
Value
Unit
16
Volts
1800
15
mW
mW/oe
-40 to +85
°e
°e
Volts
-65 to +150
Storage Temperature Range
Lamp Drive Voltage (Max. voltage at Pin 7 with lamp "off")
30
Lamp Current
100
mA
Blend Control Input Voltage (Pin 11)
10
Volts
ELECTRICAL CHARACTERISTICS Unless otherwise noted: Vee = +12 Vdc. TA' 25 0 e. 2.5 Vp·p standard multiplex composite signal with Lor R channel only modulated at 10kHz and with 10% pilot level using circuit of Figure 1
Characteristic
Min.
Typ.
Max.
Unit
Stereo Channel Separation: Unadjusted
Optimised on other channel 1
30
40
-
-
dB
Monaural Voltage Gain 1
0.8
1.0
1.2
-
-
0.3
0.2
-
-
90
-
dB
Stereo Switch Level (19 kHz input level for lamp "on")
Hysteresis
12
16
6.0
20
mVrms
-
dB
Quiescent Output Voltage Change with Mono/Stereo Switching
-
5.0
20
mVdc
0.7
1.7
-
V
V
dB
dB
THO at 2.5 VPil Composite Input Signal
at 1.5 Vp-p Composite Input Signal
-
%
Signal/Noise Ratio
dB
RMS 20 Hz -15 kHz
Ultrasonic Frequency Rejection 19 kHz
38 kHz
-
Stereo Blend Control Voltage (Pin 11) 3 dB Separation
Isee Figure 2)
30 dB Separation
Minimum Separation IPin 11 at 0 V)
-
Monaural Channel Imbalance (pilot tone off)
-
Operating Supply Voltage
8.0
Current Drain (lamp off)
-
ARI 57 kHz Pilot Tone Influence on TH02
Sub-carrier Harmonic Rejection
76 kHz
114 kHz
152 kHz
Supply Ripple Rejection
Input Impedance
Output Impedance
Blend Control Current
Capture Range
31
50
-
1.0
-
0.3
0.5
%
45
50
50
-
dB
-
-
dB
100
-
Kn
n
-
-300
~A
±5.0
-
%
-
16
35
-
V
mA
50
50
Notes: 1 See Applications Information and Circuit Description
2 ARI Test - Input signal: 1.5 Vp-p standard composite signal, 1 kHz modulation added to a CW 50 mVrms signal at 57.3 kHz.
MOTOROLA LINEAR/INTERFACE DEVICES
9-143
TCA4500A
TYPICAL CHARACTERISTICS
Unless otherwise noted VCC
= +12 V, TA = +2SoC, Input Signal
is Modulated Lor R with 10% Pilot Level. (See Fig. 16,)
- - - : High Loop Gain Circuit
- - - : Normal Circuit
FIGURE 2 - CHANNEL SEPARATION versus
FIGURE 3 - VCOFREE-RUNNING FREQUENCY
COMPOSITE INPUT LEVEL
versus TEMPERATURE
70
~
v~o Tunld
0.25
60
~
~O.25
z
0
>=
;;;>= 50
~
~
40
z
z
~
0
~
-- -
- - -----:
- -- .--f-"
-- -
- ---
,...
0.5',
k.....-
I--
f-'""
30
....
........-f-"
20
0.5
1.0
1.5
-
1.0',
-
2.0",
/
0.50
V
v- r-........
'\.
~0.75 V
-Z-
\
1:;
~-
~ 1.0
~-
~1.25
it
- - ..-
\
u..1.50
1.75
2.0
2.5
-60
3.0
-40
~
-20
COMPOSITE INPUT SIGNAL (Vp·p)
g
•
•
1M
1~
~
TEMPERATURE (OC)
FIGURE 5 - SUPPLY RIPPLE REJECTION
versus SUPPLY VOLTAGE
FIGURE 4 - STEREO SWITCH LEVEL versus
VCO FREE-RUNNING FREQUENCY
65
0
I
I
f· 200 Hz
55
'"E
;;
.5 45
"'~
....
'3
\
I
,
35
I
0:
II
-
\
~
,
25
15
18
--
r--
/
1/,./
./
'"
::;..40
19
FREQUENCY (kHz)
20
8
FIGURE 6 - THO versus COMPOSITE
INPUT LEVEL
16
12
14
SUPPLY VOLTAGE
10
FIGURE 7 - CAPTURE and HOLDING RANGE
WITH 20 mV PILOT LEVEL
I
/
2.0
I
, j,
1.'1
Supply' 8V I
.,
.... " ./
-0
:I:
"'~
1.0
i/
I
~7
o
o
-- --
1.0
18.4
II
19'.3
18.7
19'.6
1/
,I
Supply' 12V, //
-
"y
18
3.0
2.0
COMPOSITE INPUT SIGNAL (Vp-p)
4.0
18.5
19
19.5
5.0
VCO FREE·RUNNING FREQUENCY (kHz)
MOTOROLA LINEAR/INTERFACE DEVICES
9-144
20
18
TCA4500A
FIGURE 8 - CHANNEL SEPARATION
versus FREQUENCY
FIGURE 9 - THO versus FREQUENCY
70
IUI Vp .p
60
0.3
./
.,. "
f.l:
~
50
~
40
£
2~ 30
o
>-
........
'i....
r---
0.2
-'
'"
z
~ 20
0.1
~
10
o
10
20
50
100
200
lk
2k
10k
20k
o
10
50
100
lk
200
2k
10k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 10 - SYSTEM BLOCK DIAGRAM
19kHz ~
19 kHz 12700
Oscillator
~
+2
19 kHz~
19 kHz /180 0
9
IJ
r-~~l----6O---O+V
38kHz
38 kHz
>---OR
~ ..
J
~
MOTOROLA LINEAR/INTERFACE DEVICES
9-145
Regulator
!~c
TCA4500A
CIRCUIT DESCRIPTION
blend circuit in which they are partially combined, and
hence mutually attenuated, according to the control
voltage applied.
Matrixing occurs at the inputs of the output amplifiers,
where the unmodified composite signal is added to the
blended channel difference signals. The stereo separation
may be progressively reduced from maximum to zero,
dependent on the blending. The control law has been
made non-linear, as the major redistribution of sound
energy occurs at very low separation levels. For monaural,
or very weak stereo signals, the modulator in the decoder
section is disactivated by the stereo switch circuit. The
variable separation control is thus, also, automatically
disabled.
INTRODUCTION
The TCA4500A is a phase-lock-loop stereo decoder
which incorporates a variable separation control, and in
which sensitivity to the third harmonics of both the pilot
and sub-carrier frequencies has been eliminated by the use
of appropriate, digitally generated, waveformslinthe phaselock-loop and decoder sections.
The variable separation control may be operated
manually, or by a receiver's AGC or S meter signals, to
provide smooth transitions between monaural and stereo
reception. It operates only during stereo reception: the
circuit switches automatically to monaural if the 19 kH7
pilot tone is absent.
The elimination of sensitivity to the third harmonic
(114 kHz) of the sub-carrier (38 kHz) excludes interference
from the 100 kHz (European Spacing) spaced side bands
of adjacent transmitters, while elimination of sensitivity
to the third harmonic (57 kHz) of the pilot tone (19 kHz)
excludes interference from the AR 1* system employed in
Europe.
FIGURE 11 - DIGITAL WAVEFORM
~
PLL(19kHz)
~
StereoSwitch ~
(19kHz)
~
*Auto Radio Information.
Decoder
CIRCUIT OPERATION
The block diagram of the circuit, shown in Fig. 10,
consists of three sections: the phase-lock-loop, including
the digital waveform generator: the stereo switch: and the
decoder, in which the composite stereo signal is demodulated and matrixed to separate land R channels.
In the phase-lock-loop the internal RC oscillator,
operating at 228 kHz, feeds a 3 stage Johnson counter, via
a binary divider, to generate a series of 19 kHz square
waves. By the use of suitably connected NAND and EXCLUSIVE OR gates, the waveforms shown in Fig_ 11,
which are used to drive the various modulators in the circuit, are developed.
The use of such drive waveforms produces the modulating functions also shown in Fig. 11. The usual squarewaveforms have been replaced in the Pll and decoder
sections by 3-level forms which contain no third harmonic
(actually no harmonics which are mUltiples of 2 or 3 are
present). This eliminates the frequency translation of
interference from the&e bands into the low frequency
region. Such translation may produce audible components
in the decoder section from the sidebands of adjacent
channel FM signals, and may produce phase jitter, and
consequent intermodulation distortion, in the Pll, from
the modulated 57 kHz tones of the ARI system. The TCA
4500A is inherently free from these effects.
The stereo switch section is of conventional form
(e.g_ MC1310).
The decoder section consists of a modulator (driven
by the waveforms shown in Fig. 11) whose outputs are
the inverted and non-inverted channel difference signals.
These signals pass to the output amplifiers via the variable
~
~
Modulator Drive Waveform
(38 kHz)
Modulating Functions
APPLICATION INFORMATION
GAIN AND DE-EMPHASIS
The gain and de-emphasis characteristics of the circuit
are defined by shunt feedback via the external RC networks
(R3, C6, R4, C7 of Fig. 1) around the output amplifiers.
The gain is unity when resistors of 5.1 kn are used.
Higher gains may be obtained by using networks of the
form shown in Fig. 12.
The resistors R6, R7 are added to correct the output
quiescent voltage levels which are optimized for R3, R4 =
5.1 kn and which would, if uncorrected, become too low
with higher value resistors. Suitable network values are
as follows:
FIGURE 12 - OUTPUT AMPLIFIER FEEDBACK NETWORKS
Pin 4
Pin 3
C6
R3
R6
MOTOROLA LINEAR/INTERFACE DEVICES
9-146
Pin 5
·Pin 6
C7
R4
R7
TCA4500A
APPLICATION INFORMATION (continued)
Gain (dB)
R3,R4
0
5.1kil
10nF
15 nF
3
6.8kil
6.8nF
10nF
47k ±10%
6
10k
4.7 nF
6.8 nF
27k ±10%
C6,C7
SOilS
VARIABLE SEPARATION (BLEND) CONTROL AND
19 kHz OUTPUT
To retain the 16-pin package, the blend control has
been combined with the 19 kHz output on pin 11. The
internal circuit providing this combination is shown in
Fig.14.
If pin 11 is left open-circuit, the 19 kHz signal appears
at a mean dc level of 4 V. The blend circuit is inoperative
at this level and the decoder provides full separation. The
19 kHz signal can be used to tune the internal oscillator.
To reduce the separation, the voltage on pin 11 is
lowered. At 3.2 V, T2 ceases conduction and the 19 kHz
signal disappears.
At 2.3 V, the blend circuit comes into operation and
the separation decreases according to the curve shown in
Fig. 15.
R6, R7
751ls
The maximum output level is 1 Vrms; consequently the
max. input is limited to 1.4 Vp-p if the gain is set to 6 dB.
SEPARATION ADJUSTMENT
A separation adjustment may be added, as shown
below, (Fig. 13), to compensate for the receiver's IF
characteristics.
FIGURE 13 - NETWORK PROVIDING
ADJUSTABLE SEPARATION
FIGURE 15 - SEPARATION CONTROL VOLTAGE
Pin 2
dB
40
56k 5%
Pin 3
30
10k
Pin 6
-"""fVv-~
20
56k 5%
10
'---or-...---,---.-- Volts
This network reduces the amplification of the channel
sum signal in the decoder, to compensate the attenuation of the channel difference signal in the receiver's IF
section. The network shown will compensate for up to 2
dB attenuation at 38 kHz. The decoder gain is, obviously,
reduced by an amount equal to the compensation required.
When used as described, the adjustment also corrects the
inherent separation of the decoder, which may be optimized on one channel. Optimization of both channels
is possible if separate potentiometers are used to feed
each output amplifier.
o
2
FIGURE 16 - OSCILLATOR NETWORK FOR DIRECT
FREQUENCY MEASUREMENT
Pin 15
'Okil
2%
f=%
Test Point
FIGURE 14 - BLEND CONTROL INPUT CIRCUIT
5kil
1-----'.----0
l'OOil
OSCILLATOR TUNING
If the variable separation facility is not required, pin 11
is left open-circuit and the 19 kHz signal which then
appears may be used to indicate the oscillator frequency.
If the variable separation is used, and the drive circuit prevents access to the 19 kHz signal, then the oscillator
frequency must be measured directly. A test point should
be obtained by modifying the oscillator RC network as
shown in Fig. 16.
Pin 11
'k
19·kHz
2.~~L.SL
MOTOROLA LINEAR/INTERFACE DEVICES
9-147
IJ
TCA4500A
pin 9 are the following:
- Quiescent voltage: +2.3 Vdc
Current required to ensure mono operaton (with 100
mVrms pilot level): 10j.lA (from pin 9 to ground)
Hysteresis: O.lj.lA
- Stereo/mono switching and oscillator killing: less than
+SOO mV
- Maximum stray capacitance between pin 9 and ground:
100pF
The output is a pulse train of approximately 1.S Volts
amplitude. Connecting frequency counters of up to 300
pF input capacitance produces less than 0.3% change of
the oscillator frequency, which should be set to 228 kHz.
HIGH LOOP GAIN COMPONENTS
For applications demanding operation under low pilot
level (e.g., car radio) the following component changes to
Fig.l are recommended.
Rl ~ 12k
R2 ~ 1.Sk
R8 ~ 330
P1 ~ 10k
C3
C4
~
~
C5~
lS0pF
330 nF
lS0nF
EXTERNAL COMPONENT FUNCTIONS
P1
- 19 kHz frequency adjustment
P2
- channel separation adjustment and compensation for IF roll-off.
R3, RS- gain fixing resistors. The values shown in the
schematic are for unity gain.
CS, Cl- de-emphasis capacitors. Value to give:
RC ~ SOj.ls.
EXTERNAL MONO-STEREO SWITCHING ANO
OSCILLATOR KILLING
If required, the TeA 4500A can be forced into mono
mode simply by grounding pin 9 (see Fig. 1). The 228
kHz oscillator will be automatically killed.
The conditions governing Mono/Stereo switching on
Values shown in Fig. 1 are recommended for applications
with input level higher than 1.0 Vrms.
MOTOROLA LINEAR/INTERFACE DEVICES
9-148
®
MOTOROLA
TCA5550
STEREO SOUND CONTROL SYSTEM
STEREO SOUND
CONTROL SYSTEM
The TCA5550 is a single chip stereo balance, volume, bass and
treble control circuit designed for use in car radios, TV, and audio
systems. Simple dc inputs allow the control to be effected by four
inexpensive potentiometers or a remote control system. The bass
and treble responses are defined by a single capacitor per control
per channel.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Four High Impedance dc Controls - Vol, Bass, Treble, Balance
• A Single External Capacitor Defines Each Tone Control
Characteristic
• low Distortion, 0.1% at Nominal Input level, Unity Gain with
the Tone Controls Flat
• Channel Separation Better Than 45 dB
• Wide Power Supply Tolerance, 10 to 16 Vdc
•
± 14 dB of Tone Control
• More Than 75 dB of Volume Control
• Wide Dynamic Range: 100 mV to 500 mV rms Input Signal
PSUFFIX
• low Output Impedance
PLASTIC PACKAGE
CASE 707-02
II
FIGURE 1 - BLOCK DIAGRAM
2
Input
7
Vee
6
Output
Volume
Balance
14
~
-:-
3
4
-:-
8
MOTOROLA LINEAR/INTERFACE DEVICES
9-149
Bass
Treble
Output
TCA5550
MAXIMUM RATINGS (TA = +25'C)
Value
Unit
18
Volts
1250
10
mW
mWrC
Operating Temperature Range (Ambient)
-40 to +85
·C
Storage Temperature Range
-65 to +150
·C
Rating
Power Supply Voltage
Power Dissipation (Package Limitation)
Derate above TA = +25·C
ELECTRICAL CHARACTERISTICS (TA
= 25·C VCC = 12 Vdc)
Characterlatic
Supply Voltage
Supply Current i,
.,
Max
Unit
10
-
16
Vdc
-
30
15
-
-
mA
5
Input Levels
Max Gain
With Reduced Gain3
12,16
5.0
-
-
-
3.0
V
mA
-
100
-
mV rms
-
-
500
12,16
-
100
-
Output Impedance
2,8
-
300
-
Tone Control Range (at 70 Hz & 10 kHz)2
With Pins 3 & 4 @ 0.5 V
With Pins 3 & 4 @ 2.3 V
With Pins 3 & 4@ 4.1 V
3,4
Input Impedance
Balance Control Range
(Constant Power Law)
Voltage on Pin 6 for Balanced Gain
II
Min
13
Min Gain
Max Gain
Regulated Output
Voltage 1
Current
Typ
Pin
Min Gain
Max Gain
6
Volume Control Range
With Pin 7 @ 0 V
With Pin 7 @ 3.1 V
With Pin 7 @ VPIN 5
7
Control Input Currents
3,4,6,7
-
-
-14
0
+14
-
-35
+3.0
2.3
-
-
80
+10
-20
-70
-
-
45
Distortion (at 1.0 kHz) at 300 mV rms Output3
-
0.1
-
70
-
50
-
Noise Level
50 Hz to 15 kHz, Min Gain
!l
d8
dB
dB
V
dB
-
±1.0
Channel Separation
Signal : Noise Ratio
50 Hz to 15 kHz, 10 dB Gain, Tone Controls Flat
k!l
p.A
dB
%
dB
p;V rms
NOTES:
1. The control potentiometers to this point, see Figure 7.
2. These figures are functions of the capacitors on Pins', 9, 10, 11, 17 &
1a. See the application diagram, Figure 7.
3. The input level may be increased to 500 mVrms but the user controls must be adjusted to ensure that the output level does not exceed 300
mVrms·
MOTOROLA LINEAR/INTERFACE DEVICES
9-150
TCA5550
PERFORMANCE CHARACTERISTICS, FIGURES 2-7, TAKEN IN CIRCUIT OF FIGURE 8, VCC
FIGURE 3 -
FIGURE 2 - MIDBAND DISTORTION
2.0
1.8
~
-20 dB
1.6
" ""-
-10
1.4
1.2
0.6 1---1"- lei Volume at
-10dB
0.4
~
0.2
if.
~
-40
Ibl Volume at Max
-50
JJ
-70
0.2
0.5
1.0
OUTPUT IV rmsl
2.0
o
5.0
1.0
VCcl =I,~ ~~:III
Signal = 100 mV rms
Volume 0 dB
IIIIII
Pin 3
~
I---
+10
V
z
;;;:
'" -10 r--.
-20 I---
~1rfffi "- i"Pin 3
2.3 Vde
Ililil
./1-"
r-t-
~
IIII
~
-iW
10K
lK
\
=>=
'\
0.1
" ~ k:
0.2
0.5
VCC = 12 Vde
t= 50Hz
I
=>=
..... 2.0
0.1
-10
i'Q
~ -15
r- Volume Max, Others Flat
;;;:
0.2
0.3
0.5
.."
1.0
2.0
OUTPUT IV rmsl
Bass Max, Others Flat
5.0
I--
"'\
Channel
1
I
-25
I I II
I III
3.0
-fCh~nel
'" -20
I"- All Controls Flat
.......
/'
-5. 0
Bass ~ax,1 volu~e
Max, Others Flat
II I-
1.0
o
........
I I II
-
I I
1.0
2.0
OUTPUT IVrmsl
- -- --
m
I r rrr
All Controls FIatT
'./
5. 0
C>
Volume Max, Others Flat
j)
FIGURE 7 - BALANCE CONTROL CHARACTERISTIC
LOW FREQUENCY DISTORTION
~ 3.0
I T TTTT
I I I I Ir
V
o ""-
5.0
4.0
J.T lTTT
Max Treble, Max Volume,
All Others Flat
Max Treble, Others Flat
t, FREQUENCY IHzl
FIGURE 6 -
,I
/
f\ f\
1.0
lOOK
I
/
\
3.0
..... 2.0
0.5 Vde
100
I, I ~CGI= lz ~d~f
t=20kHz
I
C>
III1
I'illi,
3.0
4.0
5.0
VOLUME CONTROL, PIN 7 IVdel
4.0
Pin 4
2.3 V~e
V'/
2.0
5.0
Ull
./
~~
10
I"-.
\
FIGURE 5 - HIGH FREQUENCY DISTORTION
FIGURE 4 - TONE CONTROL CHARACTERISTICS
+20
""
-60
o
0.1
"'-
~ -30
II
j:: 0.8
Vin = 100 mV rms
-20
i'Q
lal All Controls Flat
~1.0
VOLUME CONTROL CHARACTERISTICS
........,
+10
VCC = 112 Vd~
t = 1.0 kHz
I~I VOlulme ~t
= 12 V
-30
-35
5.0
I
1.0
2.0
3.0
4.0
5.0
6.0
BALANCE CONTROL, PIN 6, VOLTAGE IVdel
MOTOROLA LINEAR/INTERFACE DEVICES
9-151
7.0
TCA5550
FIGURE 8 - APPLICATION CIRCUIT
Bass
-
Balance
Treble
100 k
lOa k
~
0
(Bass)
-=
N
sCo
S
0
P
0
~
Ili
10;
~
0.22
0.1
0.22
3
100 k
~
lOOk
2
lOa k
:;
:;
Volume
4
0.1
5
0.22
1
0.1USS)
0.22
6
7
13
12
TCA5550
14
(Treble)
Input 2
Input 1
Vcc
= 10-16
V
II
MOTOROLA LINEAR/INTERFACE DEVICES
9-152
+
4.7 p.F
®
TDAl190P
TDA3190P
MOTOROLA
TV SOUND SYSTEM
TV SOUND SYSTEM
The TDA3190P 4.2-wan sound system is designed for television
and related applications. The TDA1190P is a low-power version.
Functions performed by these devices include: IF Limiting, IF amplifier, low pass filter, FM detector, DC volume control, audio
preamplifier, and audio power amplifier.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• 4.2 Watts Output Power - TDA3190P
(VCC = 24V,RL = 160)
• 1.3 Watts Output Power (VCC = 18V, RL = 320)
TDA 1190P
• Linear Volume Control
• High AM Rejection
...
• Low Harmonic Distortion
• High Sensitivity
1
BLOCK DIAGRAM
PSUFAX
PLASTIC PACKAGE
CASE 648C-02
14
9
15
Deemphasis
IF Input
11
DecQupling
Ripple Rejection
Oecoupling
Supply Voltage
Ground {
4
} Ground
Phase Shift
Output
Phase Shift
DC Volume
Control
Compensation
-"'_ _
-I~
Gain
2
3
6
8
4
5
12
16
13
UfJ
ORDERING INFORMATION
Temperatura Range
MOTOROLA LINEAR/INTERFACE DEVICES
9-153
II
II
TDA1190P, TDA3190P
MAXIMUM RATINGS
Rating
Supply Voltage Range
Output Peak Current (Non repetitive)
(Repetitive)
Symbol
TDA3190P
TDA1190P
VCC
9.0 to 28
9.0 to 22
V
10
2.0
1.5
1.5
1.0
A
Input Signal Voltage
VI
Operating Temperature Range
TA
Junction Temperature
TJ
1.0
o to
V
+ 75
°c
150
ELECTRICAL CHARACTERISTICS (Vce = 24 V, 10 = 4.5 MHz, III
Characteristic
=
°c
+25
kHz, TA = 25°C unless otherwise noted.)
Symbol
Quiescent Output Voltage (Pin 11)
Vce = 24 V
Vec = 18V
VCC = 12 V
TDA3190P
TDAl190P
Both
Quiescent Drain Current
(Pl = 22 k!l)
Vce = 24 V
Vce=18V
VCC = 12 V
TDA3190P
TDA1190P
Both
Min
Typ
Max
11
8.0
5.1
12
9.0
6.0
13
11
11
22
22
19
-
10
6.9
mA
10
-
35
35
W
Po
-
TDA3190P
TDA3190P
TDAl190P
TDA1190P
1.0
0.7
4.2
1.5
1.3
0.9
TDA3190P
TDA3190P
TDA1190P
TDAl190P
-
3.5
1.4
1.0
0.7
-
-
40
60
100
100
Input Limiting Threshold Volts (-3.0 dB) at Pin 1
M = ± 7.5 kHz, 1m = 400 Hz, Set Pl lor 2.0 Vrms on Pin 11
TDA3190P
TDAl190P
Unit
V
Vo
Output Power
(d = 10%, 1m = 400 Hz)
Vec = 24 V, RL = 16!l
Vec = 12 V, RL = 8.0 !l
Vee = 18 V, RL = 32 !l
Vce = 12 V, RL = 16!l
(d = 2%, 1m = 400 Hz)
Vee = 24 V, RL = 16!l
Vee = 12 V, RL = 8.0!l
Vee = 18 V, RL = 32!l
Vee = 12 V, RL = 16!l
Distortion
(PO = 50 mW,
VCC = 24 V,
Vec = 18V,
VCC = 12V,
Unit
/LV
VI
-
%
1m
RL
RL
RL
=
=
=
=
400 Hz, III = ±7.5 kHz)
16!l
32!l
16!l
-
TDA3190P
TDAl190P
Both
Frequency Response 01 Audio Amplifier ( - 3.0 dB)
(RL = 16!l, ClO = 120 pF, C12 = 470 pF, Pl = 22 k!l)
RI=82!l
RI = 47 !l
-
-
0.75
1.0
1.0
-
-
B
Recovered Audio Voltage (Pin 16)
(VI'" 1.0 mV, fm = 400 Hz, Ilf = ±7.5 kHz, Pl = 0)
Amplitude Modulation Rejection
(Vi'" 1.0 mV, 1m = 400 Hz, m = 30%)
-
Vo
-
120
-
mV
AMR
-
55
-
dB
50
65
-
dB
-
k!l
5 + N
N
Signal and Noise to Noise Ratio
(VI'" 1.0 mV, Vo = 4.0 V, fm = 400 Hz)
Hz
70 to 12 k
70t07.0k
Input Resistance (Pin 1)
(VI = 1.0 mV)
ri
-
30
Input Capacitance (Pin 1)
(VI = 1.0 mV)
ei
-
5.0
DC Volume Control Attenuation
(Pl = 12 k!l)
-
-
90
MOTOROLA LINEAR/INTERFACE DEVICES
9-154
-
pF
dB
TDA1190P, TDA3190P
TEST CIRCUIT
Ll
-----.
Cl0 r-----------C-9-1~--~---oVCC
C14
C12
L = 10l'H
00 = 60
fo = 4.5 MHz
9.0 pF
470 pF
120 pF
~
~r-------l-00,nF~
~ 100l'F/35
V
120pF
14
Cll
Cl
100 nF
11
'nput ~ f---<....-o-~
AI
50
1000 I'F/16 V
n
A4
9
4, 5,
Volume
12,
13
22 kn
B
1.0
15
PI
C5
lin.
C2
CB
7,5 nF
47 of
*RC= 751ls
TYPICAL CIRCUIT CONFIGURATION
A3
C4
C5
~
--,
14
r--------------15
I
I
Cll
~
'J;C13
A4
-
---4,51£;3 --
3
R2
T
6
B
Ll
e3
A/",crs""·
~
C7
~
MOTOROLA LINEAR/INTERFACE DEVICES
9-155
PI
16
AL
®
TDA1524A
MOTOROLA
STEREO TONE CONTROL
STEREO TONE CONTROL
SYSTEM
The TDA1524A is an active balance, volume, bass and treble
control for use in car radios, stereo TV receivers and audio
systems. Functions are controlled by four non-critical single
potentiometers with excellent channel to channel tracking characteristics. Bass and treble contours are defined by a single
capacitor per control per channel. Volume control can be linear
across the audio spectrum, or a loudness contour can be used.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Low Noise
• Low Distortion
• High Signal Handling Capability
• Wide Supply Range
• Popular Multi-Sourced Device
P SUFFIX
PLASTIC PACKAGE
CASE 707-02
FIGURE 1 -
SLOCK DIAGRAM AND TYPICAL APPUCATION
2.2 fLF
+
r-----~--~~--------~+ ~
Left
~ Output
33 k
10 k
II
+ 100/LF
33 k
+
~2.2
2.2
~ /LF
/LF
+
1
Vol
Bass
Right
Output
MOTOROLA LINEAR/INTERFACE DEVICES
9-156
I
Off
Sal
Treble
Contour
On
2.2 k
TDA1524A
~ + 25·C)
MAXIMUM RATINGS (TA
Rating
Value
Power Supply Voltage
Units
20
V
1250
10
mW
mWrC
Operating Temperature Range
-40 to +85
·C
Storage Temperature Range
-65 to +150
·C
Power Dissipation
Derate above 25·C
DC CHARACTERISTICS (TA ~ 25·C, circuit of Figure 2, SWI at "contour on", VI, V9, VlO, V16 ~ 1.9 V, unless otherwise
noted)
Min
Typ
Max
Units
Supply Voltage, VCC
Characteristic
Pin
3
-
7.5
-
16.5
Vdc
Supply Current
3
8.5
12
15
19
27
35
43
35
mA
DC Input Level
VCC(Vdc)
4,15
DC Output Level
Regulator Output Voltage
Regulator Output Voltage, SWI in "Linear" Position
-
8.5
12
15
3.8
8,11
8.5
12
15
3.3
17
8.5
12
15
3.5
8.5
17
FIGURE 2 -
-
-
-
4.25
5.9
7.3
4.7
4.25
6.0
7.5
5.2
4.0
-
-
3.75
3.8
3.85
3.5
3.75
4.0
-
-
-
-
+
L~
Left
I-'-....--'VW---~.....-"""/Ir--'-I~ Output
VCC
0.Q15
q
Left~
Input~ +
15
14
13
12
3
11
2
Linear
3.0 k
171-......~I\IIr--O'_
2.2 p.F
Contour
TDA1524AP
On
Right~
4
Input~ +
10
2.2p.F ~--~---T----T----r---T----~--~---T----T----'
0.056
Volume
10 k
2.2
p.F
Balance
Bass
Treble
33 k
51
2.2 p.F
. . . - - -...........WI,.-.......'---'Vvv--......;+.HE-----....o Right
+
Output
-:t'
MOTOROLA LINEAR/INTERFACE DEVICES
9-157
Vdc
-
2.2 p.F
51
Vdc
-
TEST CIRCUIT
33 k
Vdc
-
Vdc
TDA1524A
AC CHARACTERISTICS (VCC = 8.5 Vdc, TA = 25°C, circuit of Figure 2, contour switch (SW1) to "Linear" position,
frequency 1.0 kHz, gains expressed as 20 log [voltage ratio] unless otherwise noted)
Characteristic
Vl
V9 Vl0 V16
Measure
Pints)
Gain at Max Volume Control (Input = 50 mVrms)
V17 ~ V17 V17
2
2
2
Distortion at 1.8 Vrms Output (Output signal handling)
AC Input Resistance
Output to Output Separation, One Input Driven (100 mVrms)
Noise Output (20 H... 20 kHz, Inputs are Grounded)
8,11
8,11
4,15
8,11
8,11
Gain at Mid Volume, Left Channel
(Input = 100 mVrms)
Gain Difference Left to Right
V17 V17 V17 V17
8,11
2.1 V17 ~ V17
2
2
2
8,11
70 Hz Gain
(Input =
70 Hz Gain
(Input =
70 Hz Bass
Min
Typ
Max
Units
20
10
60
20
-
24
0.5
-
250
400
dB
%
kG
dB
p.Vrms
-9.0
-6.0
dB
-12
""2 ""2 ""2 ""2
Difference Output to Output
100 mVrms)
at Mid Bass Setting
100 mVrms)
Control - Boost
-Cut
-
-
V17
0
-
-
2.5
-
0
-
10
10
-
-
-
-
0
-
12
12
-
2.5
-
-
-
35
35
-
3.5
16 kHz Gain at Mid Treble Setting
(Input = 100 mVrms)
16 kHz Gain Difference Output to Output
16 kHz Treble Control - Boost
-Cut
2.1 ~ V17 V17
2
2
2
Balance Control Range of Right Channel
Balance Control Range of Left Channel
Output Ripple (No Signal, 200 mVrms @
120 Hz Added to Vcel
Adj"
2.1 V17 V17 Adj"
""2 ""2 V17
8
11
8,11
-
1.6 V17 ~ V17
2
2
2
8,11
-
-20
-
75
-
1.0 kHz Gain (Input
V17
0
""2
= 1.8 Vrms)
Noise Output (20 Hz-20 kHz, Inputs ac Grounded)
Distortion (Input = 1.4 Vrms)
(Input Signal Handling)
Distortion (Input = 1.8 Vrms)
1.0 kHz Gain (Input
8,11
= 2.0 Vrms)
2.0
1.5
-
-
dB
dB
dB
dB
mVrms
-
dB
p.Vrms
%
%
120
0.5
0.7
-
-
8,11
1.3 V17 V17 V17
-
-
-40
dB
""2 ""2 ""2
-
Gain Difference Output to Output
Contour Boost at 70 Hz
(Contour Switch in "Contour On" Position)
Gain at Minimum Volume
0
(Input 2.0 Vrms)
Adj'" -
~ V17 V17
2
/'
~
z
«
FIGURE 4 -
dB
/
-10
~
z
«
'"
'"~
-40
/
/
,,'
/
-10
/
-30
0
>
fa = 1.0 kHz f - VCC = 8.5 Vdc f - -
/
-40
I
-50
./
1.0
,,'
w
V
0
BALANCE CONTROL CHARACTERISTIC
~
/
-10
-60
-70
= 8.5 Vdc, unless otherwise noted)
VOLUME CONTROL CHARACTERISTIC
10
>
-
means vary the control over the full range from V17 to o.
FIGURE 3 -
'"
'"«>::;
-
-
2
2
(All curves taken in the test circuit of Figure 2, VCC
w
8,11
-
6.0
8
1.0
3.0
4.0
VOLUME CONTROL PIN 1 (Vdc)
.'
.'
fa = 1.0 kHz
VCC = 8.5 Vdc
Left Channel
- - - - Right Channel
1
1.0
I'
1
I
I
'\.
'\.
'\.
'\.
1.0
3.0
BALANCE CONTROL, PIN 16 (Vdc)
MOTOROLA LINEAR/[NTERFACE DEVICES
9-158
""
'\.
4.0
TDA1524A
FIGURE 5 -
BASS CONTROL CHARACTERISTIC
FIGURE 6 - TREBLE CONTROL CHARACTERISTIC
20
20
v
,/'
10
10
/
~
z
«
/
~
z
«
'"
'"
~
«
!:;
0
:>
/
-10
.-V
-20
o
'"
~
/
fa
VCC
~
/
'"
«
40Hz _
8.5 Vdc
~
!:;
V
0
:>
-10
/
/
-20
1.0
2.0
o
4.0
3.0
1.0
BASS CONTROL, PIN S (Vdc}
FIGURE 7 - TOTAL HARMONIC DISTORTION
versus FREQUENCY
0.4
0.3
0.3
o 0.2
j:=
0.1
~ 1.~
I
o
FIGURE 9 - TONE CONTROL RESPONSE WITH SINGLE POLE
LOW·PASS FILTER
10
~
z
«
'"
'"!:;«
-
~
0
:>
-10 -
~
I
3.0V
.1.
2'i
,""
I.1
V
V/
I
I
I
~"
1.5
10
1
1.j
"- Iij
"
o
Vinput ~ ~ Vrms
/ ' 0.2._
1.0
.-;;?' ~/
~
"'" ""'- V-...........,.L-
0.5
........
1.0
OUTPUT VOLTAGE (Vrms}
V
1.4
2.0
1.5
FIGURE 10 - TONE CONTROL RESPONSE WITH DOUBLE
POLE LOW·PASS FILTER
3.0 V
~
20 vs13 11
I
10 >-- 2,6
2.3
r--
z
~ -10
~ -20
!:;
o
:>
tl
t=:r--.
\0
-30
~
~.6
r""
~
V
0
-50
103
FREQUENCY (Hz}
10
103
FREQUENCY (Hz}
MOTOROLA LINEAR/INTERFACE DEVICES
9·159
r-.....
t:;:
~
-40
0.5
Vl0
3.1
2.6
2.3
H,S
1.4
~
:\.
o.~
-20
1
// 2.4
~
.1.
LIs
Vl0
""
~ -"
I
103
FREQUENCY (Hz}
Vs
.\
0.5
10
20
~"\
~[\. .~
'*
1.2
f=::
4.0
\
;; 0.2
j:=
I
-
H·2
1.0
0.1 0.5
I
2.0
3.0
TREBLE CONTROL, PIN 10 (Vdc}
'\ r\
Vinpul ~
0.2Vrms
0.2
-,
FIGURE 8 - TOTAL HARMONIC DISTORTION versus OUTPUT
0.4
~
fa ~ 16kHz
Vec ~ 8.5Vdc-
1.li
I
1.4
0.6
0
II
TDA1524A
FIGURE 11 -
FIGURE 12 -
SINGLE POLE LOW-PASS FILTER
DOUBLE POLE LOW-PASS FILTER
TDA1524AP
8(11)
8(11)
6(13)
Y.
Output
I
I
l'
:!:...e ~Ii~n~e_s_
VOLUME CONTROL RESPONSE WITH SINGLE
POLE LOW-PASS FILTER
-20
~
:>
-40
Z
~
w
I
1.5
-30
~
B
Linear
:>
- - - Contour On
-50
J 1111111
I
-60
II
-70
II 11111111 I
103
FREQUENCY 1Hz)
10
II
10 5
w
~
!:; 200
0
:>
I-
J. ' I
/
L]2
1S Vdc f--.
100
50
-60
B.S
-40
-20
0
~
- - - Contour On
I II 11111 II
I I 1111111 I 11
10
103
'1
APPLICATION NOTES
The use of dc feedback stabilizes the dc output voltage
at approximately VCCl2 and assures large output swing
capability without distortion. If this dc feedback is not
used, the dc output will vary from part to part and available headroom will be somewhat reduced.
The loading of the regulator output, Pin 17 has an
abrupt effect on switching the contour function and is
not intended to be applied in any intermediate degree.
The tests assure that the part is in linear mode for total
loading of Pin 17 less than 3.0 k.o., and is in contour
mode for a total load on Pin 17 greater than 10 k.o..
::; 250
Vec
Linear
-40
FREQUENCY 1Hz)
300
r--
1.5
-30
-70
~
150
I
-20
-60
T
350
~
2.0
-10
-50
FIGURE 15 - NOISE OUTPUT VOLTAGE
(20 Hz to 20 kHzl
::>
0
l-
10
2.0
z -10
VI - 3.5 Vdc
3.0
2
20
2'i
m
I
VOLUME CONTROL RESPONSE WITH DOUBLE
POLE LOW-PASS FILTER
30
3.Q
:g
0
FIGURE 14 -
= 3.5 Vdc
10
')
~ee~PI=o~ot':...J
J
VI
33 k
+
I
I
Recommended DC Feedback
Recommended-DC Feedback
20
'"w
'"«!:;
I
10k
I '1'-= 2.2 p.F
-=..L
I
2.2p.F
30
«
I
10k
+
L
FIGURE 13 -
33 k
10 k
(
Output
0.056
20
40
60
VOLTAGE GAIN IdB)
MOTOROLA LINEAR/INTERFACE DEVICES
9-160
®
TDA3301
TDA3303
MOTOROI.A
TV COLOR PROCESSOR
TV COLOR PROCESSOR
These devices will accept a PAL or NTSC compositE: video signal
and output the three color signals, needing only a simple driver
amplifier to interface to the picture tube. The provision of high
bandwidth on-screen display inputs makes them suitable for text
display, TV games, cameras, etc. The TDA3301 differs from the
TDA3303 in its user control laws, and also a phase shift control
which operates in PAL, as well as NTSC.
• Automatic Black Level Setup
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Beam Current Limiting
~ PSUFFIX
• Uses Inexpensive 4.43/3.58 MHz Crystal
• No Oscillator Adjustment Required
...
• Three OSD Inputs Plus Fast Blanking Input
40
• Four DC, High Impedance User Controls
•
• Interfaces with TDA3030B SECAM Adaptor
• Single 12 V Supply
• Low Dissipation, Typically 600 mW
FIGURE 1 -
FN SUFFIX
PLASTIC PACKAGE
CASE 777-02
PLCC-44
PIN ASSIGNMENT
Chroma Input
Hue Control/NTSC Switch
ACC Capacitor
+12V
Chroma DL Driver, Emitter
Ground
Chroma DL Driver, Collector
1.0 V Composite Video Input
Saturation Control
Delayed Luma Input
Luma DL Drive and 3.0 Inverted Output
Identification Capacitor
V Input
Luma Emitter Load
U Input
Luma Collector Load
Contrast Control
90° Loop Capacitor
Oscillator Loop Filter
Black Level Clamp
Crystal Drive
Brightness Control
Peak Beam Limit Adjust
Crystal Feedback
Ground
Frame Pulse Input
Sandcastle Pulse Input
Blue Output
Blue Output Clamp Capacitor
OSD Input Green
Blue Output Feedback
OSD Input Red
Green Output
OSD Input Blue
Green Output Clamp Capacitor
OSD Input Fast Blanking
Red Output Feedback
Green Output Feedback
Red Output
*(
PLASTIC PACKAGE
CASE 711-03
1
Red Output Clamp Capacitor
) Plee Pin Assignment
MOTOROLA LINEAR/INTERFACE DEVICES
9-161
TDA3301, TDA3303
MAXIMUM RATINGS (TA = +25'C unless otherwise stated)
Rating'
Supply Voltage
Pin
Value
Unit
39
14
Vdc
o to + 70
'c
'c
Operating Temperature,Range
Storage Temperature Range
-65to+150
ELECTRICAL CHARACTERiSTICS (TA
= 25'C, VCC = 12 V)
Pin
Min
Typ
Max
Unit
Supply Voltage
Supply Current
39
10.8
12
45
13.2
V
rnA
Composite Vid.80 Input
Video Input Resistance
Video Gain to Pin 35
Input Window
37
Chroma Input (Burst)
Input Resistance
ACC Effectiveness
1
1
4
Characteristic
OSD
OSD
OSD
OSD
Gain
-
13
2.7
0.8-3
24,25,26
Input
Drive Impedance
Frequency Response ( - 3.0 dB)
Max Gain
Difference Between Any Two
Beam Current Ref. Threshold
Differential Voltage
Beam Current Ref. Input Current
Differential Current
16,19,22
Luminance Gain Between Pin 36 and Outputs (depends on
R33 and R34)
Luminance Bandwidth (- 3.0 dB)
Output Resistance
Residual Carrier (4.43 Melsi
PAL Offset (H/2)
Difference in Gain Between Y Input and any RGB olp
.14,17,20
U Input Sensitivity for 5.0 V Blue Output
8
Matrix Error
14,17,20
Oscillator Capture Range
10
1.0
18
3.2
0.7-3.2
60
-
23
3.6
-
200
-
100
5.0
1.2
0.5
0.7
-
1.0
180
9.0
-
-
7.2
-
-
1.7
2.0
-
-
-
-
4.7
9.0
120
-
350
-
3.0
Vp-p
kn
Vp-p
V
mVp-p
kn
dB
15
V
n
MHz
MHz
%
2.3
20
V
mV
+ 1.5/-0.5
pA
pA
-
1.0
-
5.0
-
MHz
n
mVp-p
mVp-p
%
340
-
mVp-p
170
30
-
-
300
150
50
10
%
-
Hz
Color Kill Attenuation
14,17,20
50
Contrast Tracking OSDILumalChroma
14,17,20
-
OSD Contrast Tracking
14,17,20
-
-
OSD Enable Slice Level
23
-
0.7
-
V
Sandcastle Slice Level
Burst Gate
Line Blanking
R Input V27 > 7.0 V
V27<7.0V
27
7.2
2.6
5.0
22
8.0
V
V
Frame Slice Level
R Input
28
2.8
15
3.6
4x 129
4.6 x 129
U Ref. Phase Error
V Ref. Phase Error
",
6.5
2.0
-
Peak eaam Limiter Threshold
(129 Min = 250 pAl
2
3.4 x 129
Pin 29 Input Resistance
29
-
5.0
Pin 29 Open Circuit Voltage
29
-
10.6
MOTOROLA LINEAR/INTERFACE DEVICES
9-162
5.0
5.0
-
dB
-
dB
±2.0
3.0
-
-
dB
kG
kG
V
kn
kG
V
TDA3301. TDA3303
INPUT/OUTPUT FUNCTIONS
FIGURE 2 - BRILLIANCE CONTROL
+2.0
in
t::;
The brilliance control operates by adding a pedestal
to the output signals. The amplitude of the pedestal is
controlled by Pin 30.
~ +1.0
w
(!1
Z
~
During CRT beam current sampling a standard pedestal is substituted, its value being equivalent to the
value given by V30 Nom. Brightness at black level with
V30 Nom is given by the sum of three gun currents at
the sampling level, i.e. 3 x 20 p.A with 100 k reference
resistors on Pins 16, 19, and 22.
(.)
5NOM
I
5o
I
-1.0
I
II:!
~I~
~1i:3
> (1-
o
I
I
I
I
1-
During picture blanking the brilliance pedestal is zero;
therefore the output voltage during blanking is always
the minimum brilliance black level (Note: Signal channels are also gain blanked).
~Ig
ol!d!
~I~
1.0
2.0
3.0
BRILLIANCE CONTROL (VOLTS) V30
4.0
FIGURE 3 - SATURATION CONTROL VOLTAGE
V5 (VOLTS)
o
1.0
2.0
3.0
4.0
5.0
o
FIGURE 4 - CONTRAST CONTROL
V32 (VOLTS)
1.0
2.0
3.0
4.0
5.0
2.0
-10
4.Q
iii -20
8.0
6.0
:!:!
z
o
~
~
_
10
IXI
:!:! 12
-30
z
z
o
~ -40
~ 14
~
z
I!!
16
< 18
-50
20
22
24
Pin 5 is automatically pulled to ground with a misidentified PAL signal.
Note: Nominal 100% saturation point is given by
choice of R2 which sets ACC operating point.
Note: Pin 32 is pulled down by the operation of the
peak beam limiter.
MOTOROLA LINEAR/INTERFACE DEVICES
9-163
II
TDA3301, TDA3303
FIGURE 5 - BLOCK DIAGRAM
J;6
31
30
34
~
Black
Level
Clamp
Brilliance
Control
~
D.C.
Level
Shifter
33
~~
-
Luma
Contrast
Ro-
t
~
Beam
Limiting
t
J
II
Contrast
Controller
I
I
1
H
ACC
Control
>--
H
Hue
Control
I
-l
HJ
I
Output
Amplifier X3
I
Timing
logic
Counters A & B
t
I
14
17
20
23
0
27
28
F
13
~
Burst Gate
4ID
Filter
Filter
Det
rrr
I
Det
t,-<}-<
V
tu
U
Ref
I
Delay Line
Driver
90".p
Shifter
I
~
4
5
~Det
U Det
Color
Contrast &
Saturation
3
15
18
21
I
t
40
~
Color Difference
Matrix & Color Killer
Color
Kill Logic
16
19
22
C.R.T. Beam
Current
Clamp X3
J::
Blanking
Controller
TDA3301
TDA3303
1
2
..-
t
~
20
26
25
O.S.D.
Black Level
Clamp &
Contrast X3
--l
35
>--
-
I
4
Y
37
3-Way
Splitter
I
t
39
+12V
38
29
p2
I
6
7
t
H/2
Bistable
8
I
I
I
U
V
Ref
90"
.pOet
.t
H/2
Switch
.poet
~
~
MOTOROLA LINEAR/INTERFACE DEVICES
H/2
Switch
Switch
4.33MHZ
VCO
I
9
9-164
~t
Lt12
r
10
TDA3301, TDA3303
AGURE 6 -
HUE CONTROL
BURST
.pLEAO· (3.58 MHz)
The hue control acts only during burst gating to give
a ±40· phase shift between the burst and chrominance
signal.
On the TDA3303 Pin 40 is also used to select NTSC
when V 40 < 8.0 V and thus the control will operate only
in this mode.
On the TDA3301 NTSC selection is independent of
V40 and the control can be operated in both NTSC and
PAL.
5040
30
~ 20w
a:
13
ew
10
----' VF
I
FIGURE 8 - VECTOR DIAGRAM FOR
REFERENCE REGENERATION
The crystal VCO is of the phase shift variety in which
the frequency is controlled by varying the phase of the
feedback. A great deal of care was taken to ensure that
the oscillator loop gain and the crystal loading impedance were held constant in order to ensure that the
circuit functions well with low grade crystal (crystals
having high magnitude spurious responses can cause
bad phase jitter). It is also necessary to ensure that the
gain at third harmonic is low enough to ensure absence
of oscillation at this frequency.
a
=0
veo
al2
=
a
11 . . . , . - - - - - - -.... -
-
-
-
---'"7
/
Ix
/
/
/
/
/
/
/
MOTOROLA LINEAR/INTERFACE DEVICES
9-165
VF
1
TDA3301. TDA3303
is that the loop filter is not compromised by the 7.8
kHz component normally required at this point for
PAL identification.
b) The H/2 switching of the oscillator phase is carried
out before the phase detector. This implies any
error signal from the phase detector is a signal at
7.8 kHz and not dc. A commutator at the phase
detector output also driven from the PAL bistable
converts this ac signal to a dc prior to the loop
filter. The purpose of this is that constant offsets
in the phase detector are converted by the commutator to a signal at 7.8 kHz which is integrated
to zero and does not give a phase error.
By referring to Figures 7 and 8 it can be seen that the
necessary ±45° phase shift is obtained by variable addition of two currents I, and 12 which are then fed into
the load resistance of tbe crystal tuned circuit R,. Feedback is taken from the crystal load capacitance which
gives a voltage VF lagging the crystal current by 90°.
The RC network in T, collector causes I, to lag the
collector current of T, by 45°.
For SECAM operation the currents I, and 12 are added
together in a fixed ratio giving a frequency close to
nominal.
When decoding PAL there are two departures from
normal chroma reference regeneration practice:
a) The loop is locked to the burst entering from the
PAL delay line matrix U channel and hence there
is no alternating component. A small improvement
in signal noise ratio is gained but more important
FIGURE 9 -
When used for decoding NTSC the bistable is inhibited, and slightly less accurate phasing is achieved;
however, as a hue control is used on NTSC this cannot
be considered to be a serious disadvantage.
BLOCK DIAGRAM OF REFERENCE SECTION
U Axis
V Axis
Filter
U
Signal
From
PAL
-----i
Delay Line
90° REFERENCE GENERATION
To generate the U axis reference a variable all-pass
network is utilized in a servo loop. The output of the allpass network is compared with the oscillator output
with a phase detector of which the output is filtered and
corrects the operating point of the variable all-pass network (see Figure '0).
As with the reference loop the oscillator signal is taken
after the H/2 phase switch and a commutator inserted
before the filter so that constant phase detector errors
are cancelled.
For SECAM operation the loop filter is grounded causing near zero phase shift so that the two synchronous
detectors work in phase and not in quadrature.
The use of a 4.4 MHz oscillator and a servo loop to
generate the required 90° reference signal allows the
use of a standard, high volume, low cost crystal and
gives an extremely accurate 90° which may be easily
switched to 0° for decoding AM SECAM generated by
the TDA3030B adapter.
MOTOROLA LINEAR/INTERFACE DEVICES
9-166
TDA3301, TDA3303
FIGURE 10 -
VARIABLE ALL-PASS NETWORK
Filter 9
0-.-----1---+__
C
Control
dc
4.43 MHz
From Dsc. --I------~----+--I
. , - - - - -..... SECAM Switching
FIGURE 11 -
ACC AND IDENTIFICATION DETECTORS
To R-Y Filter
To B-Y Filter
7.0 V
4.0 k
4.0 k
4.0 k
4.0 k
+12 V
+ Burst
Gate
1----'\""'-._
Ident
Filter
ACC
Filter
MOTOROLA LINEAR/INTERFACE DEVICES
9-167
TDA3301, TDA3303
ACC AND IDENTIFICATION DETECTORS
When Vref 2 is exceeded by 0.7 V then latch 2 is made
conducting until C is completely discharged and the
current drops to a value insufficient to hold on latch 2.
As latch 2 turns on latch 1 must turn off.
Latch 2 turning on gives extra trigger pulse to bistable
to correct identification.
The inhibit line on latch 2 restricts latch 2 conduction
to alternate lines as controlled by the bistable. This function allows the SECAM switching line to inhibit the bistable operation by firing latch 2 in the correct phase
for SECAM. For NTSC latch 2 is fired by current injected
on Pin 6.
If the voltage on C is greater than 1.4 V then the saturation is held down. Only for SECAM/NTSC with latch
2 on or correctly identified PAL can the saturation control be anywhere but minimum.
During burst gate time the output components of the
U and also the V demodulators are steered into PNP
emitters. One collector current of each PNP pair is mirrored 'and balanced 'against its twin giving push-pull
current sources for driving the ACC and the identification filter capacitors.
The identification detector is given an internal offset
by making the NPN current mirror emitter resistors unequal. The resistors are offset by 5% such that the identification detector pulls up on its filter capacitor with
zero signal.
IDENTIFICATION
See Figure 12 for definitions.
Monochrome 11>12
PAL ident. OK 11<12
PAL ident. X
11>12
NTSC
13>12
NTSCSWITCH
NTSC operation is selected when current (13) is injected into Pin 6.
On the TDA3301 this current must be derived externally by connecting Pin 6 to + 12 V via a resistor (as on
TDA3300B).
On the TDA3303 13 is supplied internally when V40
falls below 8.0 V;
For normal PAL operation on both versions Pin 40
should be connected to + 12 V and Pin 6 to the filter
capacitor.
Only for correctly identified PAL signal is the capacitor
voltage held low since 12 is then greater than 11.
For monochrome and incorrectly identified PAL signals 11 >12 hence voltage VCC rises with each burst gate
pulse.
When Vref is exceeded by 0.7 V latch 1 is made conducting which increases rate of voltage rise on C. Maximum current is limited by R1.
FIGURE 12 - IDENTIFICATION CIRCUIT
NTSC
Switch
+12 V
II
] - - - - c SECAM Switching
Line
R2
440
Vref 1
'Supplied externally on
TDA3301
1-_--'WI.._-Vre f 2
+ Trigger
Supplied internally on
TDA3303
Burst
Gate
Latch 2
Inhibit
MOTOROLA LINEAR/INTERFACE DEVICES
9-168
TDA3301, TDA3303
The color difference matrixing is performed by 2 differential amplifiers each with one side split to give the
correct values of the - (B-Y) and - (R-Y) signals. These
are added to give the (G-Y) signal.
The 3 color difference signals are then taken to the
virtual earths of the video output stages together with
luminance signal.
COLOR DIFFERENCE MATRIXING, COLOR KILLING,
AND CHROMA BLANKING
During picture time the two demodulators feed simple RC filters with emitter follower outputs. Color killing
and blanking is performed by lifting these outputs to a
voltage above the maximum value that the color difference signal could supply.
FIGURE 13 - COLOR DIFFERENCE STAGES
Color Kill
&
Blanking
+
+
+
+
R
R
B-Y
R·Y
R
C
R
R-Y..-----...
~-----I~
SANDCASTLE SELECTION
The TDA3301/3303 may be used with a two level sandcastle and a separate frame pulse to Pin 28, or with only
a 3 level (super) sandcastle. In the latter case a resistor
of 1 M.o. is necessary from + 12 volts to Pin 28 and a
470 pF capacitor from Pin 28 to ground.
MOTOROLA LINEAR/INTERFACE DEVICES
9-169
8-Y
II
~
-
FIGURE 14 - TIMING DIAGRAM
o
~
I
r-____________~/,~I--------------Frame Pulse F (V281
s::
0
-i
0
:lI
0
r
C
Z
m
!!...,
0
»
:lI
L
-i
m
I
I
U
I
('")
m
_ _ _ _ _ _ _ _ _----,1
f
<
n
m
1
I
1
I
I
i
J
I
1
I..
CRT
Sa~ple
Tome
Insert Brilliance
1
S
Reference Pedestal
I
S
r
I
I
I
I"
1--1 I-
I
L.-:----~;_.--------
Counter B Output
1
I
I
------11
I
Vl
II
IU
I
Counter A Output
"
»
I
UI
-------------------------f{ 'r'-------------,
:lI
m
0
I
Clock To A
~
z
I
Sandcastle L (V27)
»
Si~als
Gain Blank All
F+L+B+A
+ B
I1
_I
I
I
-I
·1
M
TDA3301, TDA3303
ing edge of the frame pulse. In order to provide control
signals for:
Luma/Chroma blanking,
Beam current sampling,
On-screen display blanking,
Brilliance control.
The appropriate flip-flop outputs are matrixed with
sandcastle and frame signals by an emitter follower
matrix_
TIMING COUNTER FOR SAMPLE CONTROL
In order to control the beam current sampling at the
beginning of each frame scan two edge triggered flipflops are used.
The output A of the fi rst fli p-flop A is used to clock
the second flip-flop B. Clocking of A by the burst gate
is inhibited by a count of A.B.
The count sequence can only by initiated by the trail-
FIGURE 15 - TIMING COUNTER
+
Frame
Burst ~-.J\I'.(\r---------"'"
Gate
}-_ _.....
ON-SCREEN DISPLAY INPUTS
input coupling capacitor. This ensures that the current
in the diversion gate is zero at black level and makes
the OSD black level insensitive to contrast control, also
the inputs ignore signals below black, e.g. sync, pulses.
Each section of the OSD stages consists of a common
emitter input stage feeding a diversion gate controlled
by the contrast control. During burst gate time a feedback loop is activated which clamps the signal at the
FIGURE 16 - OSD STAGE
Burst
Gate
Pulse
~
'"~1
MOTOROLA LINEAR/INTERFACE DEVICES
9-171
TDA3301, TDA3303
FIGURE 17 -
VIDEO OUTPUT SECTION
A further drive current is used to control the dc operating point; this is derived from the sample and hold
stage which samples the beam current after frame
flyback.
Each video output stage consists of a feedback amplifier in which the input signal is a current drive to the
virtual earth from the luminance, color difference and
on-screen display stages.
DC Control
Drive
">---+--..-,. Output
+
Video
Blanking
OSD
Drive
Luminance
Drive
Color
Difference
Drive
FIGURE 18 -
II
COMPLETE VIDEO OUTPUT SECTIONS
~+--+----J
Signals
Ref.
I
R.
Enable
Ref.
Voltage
MOTOROLA LINEAR/INTERFACE DEVICES
9-172
CRT
TDA3301, TDA3303
FIGURE 19 - TYPICAL VIDEO OUTPUT STAGE
-----e-------.--------------+250V
1.0 nF
12 k
12 k
1.0 k
CRT
Cathode
22 k
IN4148
Gain
22 k
Spark
Gap
Video
Drive
+12V
1.0 k2
4.7 k
To Other Stages
1.5 k
1.5 k
Feedback ...---------------------e--------"IIIfIr-------.....
3.3 k
*RF is chosen to suit CRT characteristics, typically 120 k.
I
33PF
FIGURE 20 - CLASS A VIDEO OUTPUT STAGE WITH DIRECT FEEDBACK
+250 V
10 k
. . .------.. . .'V'v--------.
1.0 k
Gain
Video
Drive
_------.JVJ/.Iv-------.------1
2.0 k
2.2 k
..Jr
180
Feedback .........._______________-____
180
MOTOROLA LINEAR/INTERFACE DEVICES
9-173
CRT Cathode
c:
o'i'" c.
"0>
o
.~
~"
~c:
~
o
-.-
;;"
16
".£
'"c:
:;;;
..'" -..
""0
"-C:~
~c?lC)
a: CD
-
0;
U
+12 V
.."" o.
~
8c:
1;;
>0
I";
~
c:
,,-CD
r-1.Ok
~
I-fH
1.5 k
Vl
l.,r
1.0k
Q
330
!;(
~
~
~
I
1;j
~
::l.
~
a
CW)
~
"fJf.~
Positive Video
1.0Vpp
1.8 k
11
~
~
~
~
~
-
~
~
fa)
c
W
~
~
~
27
26
Red Feedback
~
11
c
c
~
§
25
24
~Drive
23
22
W
U
>
w
0
w
u
«
u.
ex:
w
21
f-
Z
:::::
TDA3301fTDA3303
2
345
6
7
8
up
9
10
11
ex:
12
13
.43
u~
~
l..
"If
P
47 F
r::
la",t8M~
14
15
16
17
18
19
1'1 I +,"1
eIa1I,a ·'1 ~ ~
-.i
47p.F
U
~
~I~
~~
10k
18 k
~
-
J.!.2 pF
u
20
«
w
1
...J
Z
G';'","_'
[7~,"w
V
loOk
"
"
~
1,0 nF
82
Q
I-
.
1-8.
loOk
''~Jl
0'1 ~1 '0' IT.
i~ TOOOF ~
47 PF"t..
~
17St--175
1751
220 k
z
~
751
1.0M
220 k
2.7 k
00
4
PAL
Delay
Line
Blue Feedback
rtf!
~
~--------·----------~C
Blue Drive
390
oCW)
Note: When not using super sandcastle a positive
vertical blanking pulse must be applied
to Pin 28.
~
II
«
...J
aex:
afa
~
""enr-
®
TDA3330
MOTOROLA
TV COLOR PROCESSOR
TV COLOR PROCESSOR
This device will accept a PAL or NTSC composite video signal
and output the three color signals, needing only a simple driver
amplifier to interface to the picture tube.
Its simplified approach makes it particularly suitable for low
cost CTV systems.
•
•
•
•
•
SILICON MONOLITHIC
INTEGRATED CIRCUIT
No Oscillator Adjustment Required
Four dc High Impedance User Controls
Uses Inexpensive 4.43/3.58 MHz Crystals
Interfaces With TDA3030B SECAM Adaptor
Uses Horizontal Flyback or Super Sandcastle Pulse
-
• Single 12 V Supply
• Low Dissipation
1
PSUFFIX
PLASTIC PACKAGE
CASE 724-03
FIGURE 1 -
PIN ASSIGNMENT
Chroma DL Driver, Emitter
Chroma DL Driver. Collector
Saturation Control
2
ACC Filter
Identification Capacitor
3
Chroma Input
Hue ControliNTSC Switch
V Input
4
U Input
5
+12 V
90· Loop Capacitor
6
Contrast Control
Oscillator Loop Filter
7
Brightness Control
Crystal Drive
8
Y Input
Crystal Feedback
9
dFldt
Ground
10
Sandcastle Input
DC Ref & Blanking
11
Red Output
Blue Output
12
Green Output
MOTOROLA LINEAR/INTERFACE DEVICES
9-175
TDA3330
MAXIMUM RATINGS (TA
=
+ 25°C unless otherwise stated)
Rating
Supply Voltage
Pin
Value
Unit
20
14
Vdc
o to
Operating Temperature Range
Storage Temperature Range
°c
+70
-65to +150
°c
ELECTRICAL CHARACTERISTICS (TA = 25°C VCC = 12 V)
Pin
Min
Typ
Max
Unit
Supply Voltage
Supply Current
Characteristic
20
10.8
12
13.2
50
V
mA
Composite Video Input
17
-
Vp-p
Video Input Resistance
On
Burst Gate
Off
Chroma Input (Burst)
Input Resistance
ACC Effectiveness
22
22
1
Luminance Gain between Pin 17 and Outputs (Contrast max)
Luminance Bandwidth (- 3.0 dB)
Output Resistance
Residual Carrier (4.43 MHz)
PAL Offset (H/2)
-
1.0
-
5.0
1.5
-
-
k!l
M!l
10
100
5.0
0
200
mVp-p
-1.5
-
12,13,14
-
dB
-
8.0
5.0
170
-
ill
+1.5
-
MHz
!l
. mVp-p
mVp-p
-
-
200
50
-
340
-
-
10
%
Oscillator Capture Range
300
500
-
Hz
U Reference Phase Error
-
-
5.0
5.0
°
,
U Input Sensitivity for 5.0 V Blue Output
5
Matrix Error
12,13,14
V Reference Phase Error
mVp-p
°
Color Kill Attenuation
12,13,14
50
-
-
dB
Contrast Tracking Luma/Chroma
12,13,14
-
0
2.0
dB
-
7.2
1.5
5.0
10
8.0
2.5
V
V
k!l
k!l
15
Sandcastle Slice Level
Burst Gate
Line Blanking
R Input V15 > 7.0 V
V15 < 7.0 V
0.5
-
-
INPUT/OUTPUT FUNCTIONS
FIGURE 3 - SATURATION CONTROL VOLTAGE
V2 (VOLTS)
FIGURE 2 - BRIGHTNESS CONTROL
o
1.0
2.0
3.0
4.0
5.0
7.0
-10
iii
iii
:!:!
6.0
~
z
o
~ 5.0
::::l -30
o
~
w
z
{~
~ -40
z
i!:u
....::::l
-20
4.0
-50
53.0
o
Pin 2 is automatically pulled to ground with a misidentified PAL signal.
Note: Nominal 100% saturation point is given by
choice of Rpin 23 which sets ACC operating point.
2.0-i-_ _-,-_ _-r-_...L-,-_ _-,-_
o
1.0
2.0
3.0
4.0
BRIGHTNESS CONTROL (VOLTS) V18
MOTOROLA LINEAR/INTERFACE DEVICES
9-176
TDA3330
RGURE 4 - CONTRAST CONTROL
V19 (VOLTS)
50
o
1.0
2.0
3.0
4.0
(ij40t-----........
5.0
ttl 30
~ 20
e
iii
~ 10
10
w
Z
o
~ 10
li:J
20
~
30
FIGURE 5 - HUE CONTROL
BURST
.pLEAD"
(3.58 MHz)
t-----+-----~--~\_----~--~~--~~---+-----+~----.
1.0
2.0
5.0
6.0
7.0
V21
I
"- 20
~ 30
a:
:J 40
50
Z
'"
40+---'
The hue control acts only during burst gating to give
a ± 40" phase shift between the burst and chrominance
signal.
Pin 21 is also used to select NTSC when V21 < 8.0 V
and thus the control will operate only in this mode.
NTSC selection means the PAL phase switching is
turned off. Delay-line and filter switching must be implemented externally.
FIGURE 6 - BLOCK DIAGRAM
Sandcastle
Chroma 22
Input
ACC 23
Filter
. . .I
r-----t~===;=+===t-
NTSC 21
Hue
11 DC Ref
and
Blanking
Saturation 2 Q------t------------'
24
1
~
PAL Delay
Ident. 3
4V
U Input
90·
7
VCO
Filter
Filter
6
lop!:!t
Line
MOTOROLA LINEAR/INTERFACE DEVICES
9-177
TDA3330
CIRCUIT OPERATION
CHROMINANCE DECODER SECTION
FIGURE 7 - VOLTAGE CONTROLLED OSCILLATOR (VCO)
The chrominance decoder section of the TDA3330
consists of the following blocks:
Phase-locked reference oscillator- Figures 7, 8 and 9
Phll$l!-Iocked 90 degree servo loop - Figures 9 and 10
U and V axis decoders
ACC detector and identification detector - Figure 11
Identification circuits and PAL bistable - Figure 12
Color difference filters and matrixes with fast blanking
circuits.
The major design considerations apart from optimum
performance were:
- a minimum number of factory adjustments
- a minimum number of external components
- compatibility with the SECAM adapter TDA3030B
- low dissipation
- use of a standard 4.433618 MHz crystal rather than
a 2.0 fc crystal with divider, (or standard 3.579545
MHz for NTSC).
+12V
R1
Ix
REFERENCE REGENERATION
8
FIGURE 8 - VECTOR DIAGRAM FOR VCO
The crystal VCO is of the phase shift variety in which
the frequency is controlled by varying the phase of the
feedback. Much care was taken to ensure that the oscillator loop gain and the crystal loading impedance
were held constant in order to ensure that the circuit
functions well with low grade crystals ( crystals having
high magnitude spurious responses can cause bad
phase jitter). It is also necessary to ensure that the gain
at third harmonic is low enough to ensure absence of
oscillation at this frequency.
By referring to Figures 7 and 8 it can be seen that the
necessary ± 45° phase shift is obtained by variable addition of two currents 11 and 12 which are then fed into
the load resistance ofthe crystal tuned circuit R1. Feedback is taken from the crystal load capacitance which
gives a voltage VF lagging the crystal current by 90°.
The RC network in 01 collector causes 11 to lag the
collector current of 01 by 45°.
For SECAM operation the currents 11 and 12 are added
together in a fixed ratio giving a frequency close to
nominal.
When decoding PAL there are two departures from
normal chroma reference regeneration practice:
a
= 0
al2
11 , . . - - - - - - . , - -
--7a
-
=
1
/
/
/
/
/
/
ICOl
/
VF
b) The H/2 switching of the oscillator phase is carried
out before the phase detector. This implies any
error signal from the phase detector is a signal at
7.8 kHz and not DC. A commutator at the phase
detector output also driven from the PAL bistable
converts this AC signal to a DC prior to the loop
filter. The purpose of this is that constant offsets
in the phase detector are converted by the commutator to a signal at 7.8 kHz which is integrated
to zero and does not give a phase error.
When used for decoding NTSC the bistable is inhibited, and slightly less accurate phasing is achieved;
however, as a hue control is used on NTSC this cannot
be considered to be serious disadvantage.
a) The loop is locked to the burst entering from the
PAL delay line matrix U channel and hence there
is no alternating component. A small improvement
in signal noise ratio is gained but more important
is that the loop filter is not compromised by the
7.8 kHz component normally required at this point
for PAL identification.
MOTOROLA LINEAR/INTERFACE DEVICES
9-178
TDA3330
IDENTIFICATION
See Figure 12 for definitions.
Monochrome
11 > 12
PAL ident. OK 11 < 12
PAL ident. X
11 > 12
NTSC
13> 12
90' REFERENCE GENERATION
To generate the U axis reference a variable all-pass
network is utilized in a servo loop. The output of the allpass network is compared with the oscillator output
with a phase detector of which the output is filtered and
corrects the operating point of the variable all-pass network. (See Figure 10.)
As with the reference loop the oscillator signal is taken
after the H/2 phase switch and a commutator inserted
before the filter so that constant phase detector errors
are cancelled.
For SECAM operation with TDA3030B the loop filter
is grounded causing near zero phase shift so that the
two synchronous detectors work in phase and not in
quadrature.
The use of a 4.4 MHz oscillator and a servo loop to
generate the required 90' reference signal allows the
use of a standard, high volume, low cost crystal and
gives an extremely accurate 90' which may be easily
switched to O' for decoding AM SECAM generated by
the TDA3030B adapter.
FIGURE 9 -
Only for correctly identified PAL signal is the capacitor
voltage held low since 12 is then greater than 11.
FIGURE 10 -
VARIABLE ALL-PASS NETWORK
+12 V
4.0 k
BLOCK DIAGRAM OF REFERENCE SECTION
SECAM
Switching
1/----
For monochrome and incorrectly identified PAL signals 11 > 12 hence voltage Vc rises with each burst gate
pulse.
When Vref1 is exceeded by 0.7 V latch 1 is made
conducting which increases rate of voltage rise on C.
Maximum current is limited by R1.
When Vref2 is exceeded by 0.7 V then latch 2 is made
conducting until C is completely discharged and the
current drops to a value insufficient to hold on latch 2.
As latch 2 turns on latch 1 must turn off.
Latch 2 turning on gives extra trigger pulse to bistable
to correct identification.
The inhibit line on latch 2 restricts latch 2 conduction
to alternate lines as controlled by the bistable. This function allows the SECAM switching line to inhibit the bistable operation by firing latch 2 in the correct phase for
SECAM. For NTSC latch 2 is fired by current (13) injected
into Pin 3 by the NTSC switch. This is supplied internally
when V21 falls below B.O V.
If the voltage on C is greater than 1.4 V then the saturation is held down. Only for SECAM/NTSC with latch
2 on or correctly identified PAL can the saturation control be anywhere but minimum.
U
Signal
From~
PAL
Delay Line
ACC AND IDENTIFICATION DETECTORS
During burst gate time the output components of the
U and also the V demodulators are steered into PNP
emitters. One collector current of each PNP pair is mirrored and balanced against its twin giving push pull
current sources for driving the ACC and the identification filter capacitors.
The identification detector is given an internal offset
by making the NPN current mirror emitter resistors unequal. The resistors are offset by 5% such that the identification detector pulls up on its filter capacitor with
zero signal.
MOTOROLA LINEAR/INTERFACE DEVICES
9-179
TDA3330
FIGURE 11 -
ACC AND IDENTIFICATION DETECTORS
To B-Y Filter
To R-Y Filter
7.0 V
4.0 k
4.0 k
4.0 k
4.0 k
+12 V
j-----'VVv--_
Ident
Filter
FIGURE 12 -
+
Burst
Gate
ACC
Filter
IDENTIFICATION CIRCUIT
NTSC
Switch
+
+12 V
} -_ _.... SECAML~:itching
+
•
+
Trigger
Burst
Gate
Latch 2
Inhibit
COLOR DIFFERENCE MATR!X!NG. COLOR K!LlING.
AND CHROMA BLANKING
The color difference matrixing is performed by 2 differential amplifiers each with one side split to give the
correct values of the - (S-Y) and - (R-Y) signals. These
are added to give the (G-Y) signal.
The 3 color difference signals are then taken to the
virtual earths of the video output stages together with
luminance signal.
During picture time the two demodulators feed simple RC filters with emitter follower outputs. Color killing
and blanking is performed by lifting these outputs to a
voltage above the maximum value that the color difference signal could supply.
MOTOROLA LINEAR/INTERFACE DEVICES
9-180
TDA3330
FIGURE 13 - COLOR DIFFERENCE STAGES
Color Kill
and
Blanking
+
R-V
+
+
+
R
R
R C
R
B-V
R-V.._--,
~--. B-V
Pin 16. This input is used to inhibit the burst gate. This
is used if a true Sandcastle is not available; in this case
horizontal flyback may be used instead and differen-
SANDCASTlE SECTION
The input signal is sliced at 2 levels, 1.5 V and 7.2 V.
Above 1.5 V is used for blanking, above 7.2 V for burst
gating provided level on Pin 16 is belowO.7V.lfa normal
Sandcastle is used, it is recommended to ground the
tiated flyback applied to the
1.0 kO).
"*"
pin (input resistance
t
FIGURE 14 - DC REFERENCE AND BLANKING SECTION
+
11
The DC Reference and Blanking section is used to bias
the Video output stages. The temperature coefficient is
arranged to be a VBe drift less than the Red, Green and
Blue outputs.
DC Reference
>-....--'--'-0 and Blanking DIP
=
Blanking From
Sandcastle
MOTOROLA LINEAR/INTERFACE DEVICES
9-181
TDA3330
FIGURE 16 - TYPICAL PAL APPLICAOON
+12V
,-----~~Mn~
, - - - _ Brightn...
...
1,OV
4.43 MHz Trap
~:= ~-..,...
,..J'r.v:r'..,...-'WI.-rv:'"\....-,;---+-t--+-,
1.5k
f\
.,
. -.....---.-:....:.... Honz. Flybeck
.2~
+--...,.,I\r---CVert. Ryback
G
+250 V
3.0W
8.2 k
1.0k
12
Saturatlon_-+_M.-------+-t
Blu8
Cathode
44 k
430
l1F
Other Output
Stagea
FIGURE 16 - TYPICAL NTSC APPLlCAnON
+12V
.-----~Contrast
- - - - C Brightness
.-+_I-+. ___
Hue
~
.,
f\
. -.....- - - - -.. Horiz. Flyback or Blanking Pulse
lU~
Vert. Flyback or Blanking Pulse
G
+250V
TDA3330
3.0W
8.2 k
1.0k
44 k
10nF'J;,
8lue
Cathode
Other Output
S...es
RO -
Should follow the Delay Line manufacturer's
recommendations.
R1 - Should be selected to give approximately 10-12
V pulse at Pin 15 (approximately 5.0 k internal
resistance).
R2 -
Should be selected to give approximately 4.0 to
5.0 V pulse at Pin 15 (approximately 10 k internal
resistance).
MOTOROLA LINEAR/INTERFACE DEVICES
9-182
®
TDA3333
MOTOROLA
TV COLOR DIFFERENCE
DEMODULATOR
TV COLOR DIFFERENCE DEMODULATOR
This device is designed to demodulate a typical chroma input
signal and output the two color difference signals, R - Y and B - Y.
• Decodes PAL or NTSC
SILICON MONOLITHIC
INTEGRATED CIRCUIT
• Uses Inexpensive 4.43/3.58 MHz Crystal
• No Oscillator Adjustment Required
• On-Chip Hue Control for NTSC
• Interfaces with TDA3030B SECAM Adaptor
• Single 12 V Supply
• Low Dissipation
P SUFFIX
PLASTIC PACKAGE
CASE 707-02
FIGURE 1 - PIN ASSIGNMENT
Chroma DL DRIVER, Collector ~p Chroma DL Driver, Emitter
Satu ration
2
17
Identification Capacitor
3
16
V Input
4
15
PACC Fi Iter
PChroma Input
PHue ControliNTSC Switch
U Input
5
14] +12V
Crystal Drive
6
13
J (R - V) Output
Crystal Feedback
7
12
(B - V) Output
PSandcastie Input
[ L-_
9
10.....POscillator Loop Filter
_
90' Loop Capacitor [ 8
Ground
11
MOTOROLA LINEAR/INTERFACE DEVICES
9-183
II
II
TDA3333
MAXIMUM RATINGS (TA
= +25°C unless otherwise stated)
Rating
Supply Voltage
Pin
Value
Unit
39
14
Vdc
o to
Operating Temperature Range
°C
+70
-65 to +150
Storage Temperature Range
°C
ELECTRICAL CHARACTERISTICS (TA = 25°C VCC = 12 V)
Pin
Min
Typ
Max
Supply Voltage
14
10.8
12
13.2
V
Chroma Input
16
10
100
200
mVp-p
(burst)
ACC Effectiveness
1
dB
Characteristic
Unit
-
1.2
3.0
Matrix Error
-
-
10
%
Oscillator Capture Range
350
-
Hz
U Ref. Phase Error
-
-
5.0
5.0
°
70
-
mVp-p
4.2
2.4
-
Vp-p
Vp-p
V Ref. Phase Error
U Input Sensitivity for 1.0 Vp-p
(B-Y) Output
5
Max Output (Limiting)
B-Y
R-Y
12
13
DC Output
B-Y
R-Y
12
13
B-Y
R-Y
12
13
Output Resistance
FIGURE 2 -
VCC
Gnd
Chroma
ACC
Filter
Hue
Control
M
ACC
Control
17
~
.
I t
~
I
I
R-Y
J
ACC
Det
Iri
Ident
Del
Filter
Delay Line
Driver
1 90"
Shifter
t
y
18
1
3
1
Filter
1
4 5
+
I
I
U Det
I
I
90°
Det
+U
I
H/2
1 Switch
f
H/2
Bistable
Chroma Delay Line
1
~
U
Ref
•
1
I
t
Burst Gate
1
<}
I
+12
Color Difference
Matrix & Color Killer
Slicer
I
I
B-Y
+13
~.-
2
n
n
-
BLOCK DIAGRAM
,"
~
Hue
Control
Color
Contrast &
Saturation
Sat
Control
Color
Kill
Logic
V
V
-
100
80
-
Sandcastle
P
, 14
9.2
10.1
°
V Det
1
I
I
J
L
H/2
1
Switch
Burst
Det
•
J
H/2
1
Switch
f
14.43 MHz
VCO
MOTOROLA LINEAR/INTERFACE DEVICES
~
V
Ref
I- -I
90° Filter
9-184
1
U
I
I
8
Ident Filter V U
1
I
I
i6 h
Crystal
10
VCO Filter
TDA3333
FIGURE 3 - SATURATION CONTROL VOLTAGE
Pin 2 Voltage (V)
2
345
o
-10
-20
In the case of a misidentified PAL signal
Pin 2 is automatically pulled to ground.
-30
Note: Nominal 100% saturation point is
given by choice of R17 which sets
ACC operating point.
-40
-50
FIGURE 4 - HUE CONTROL
Burst
Lead"(3.58 MHz)
50
..
.
e.'"
.,.
~
40
30
20
10
.J::.
0..
10
1?!
20
OJ
30
"
Pin 15 Voltage (V)
2
4
5
6
PAL
Mode
NTSC
Mode
40
50
Burst
Lag"
Note: Hue control acts only during burst gating with
V15<8 Volts.
This condition also selects NTSC mode
MOTOROLA LINEAR/INTERFACE DEVICES
9-185
TDA3333
CIRCUIT OPERATION
CHROMINANCE DECODER SECTION
FIGURE 5 - VOLTAGE CONTROLLED OSCILLATOR (VCO)
The chrominance decoder consists of the following
blocks:
Phase-locked reference oscillator - Figures 5, 6,
and 7
Phase-locked 90 degree servo loop - Figures 7
and 8
U and V axis decoders
ACC detector and identification detector - Figure 9
Identification circuits and PAL bistable - Figure' 0
Color difference filters and matrixes with fast blanking
circuits.
The major design considerations apart from optimum
performance were:
- a minimum number of factory adjustments
- a minimum number of external components
- compatibility with the SECAM adapter TDA3030B
- low dissipation
- use of a standard 4.4336'8 MHz Crystal rather than
a 2.0 fc Crystal with divider.
+12V
Ix = al2+11
12 (1-a)
R1
6
Ix
CJ
7
VF
1
DC
Bias
REFERENCE REGENERATION
FIGURE 6 - VECTOR DIAGRAM FOR
The Crystal VCO is of the phase shift variety in which
the frequency is controlled by varying the phase of the
feedback. A great deal of care was taken to ensure that
the oscillator loop gain and the Crystal loading impedance were held constant in order to ensure that the
circuit functions well with low grade Crystals (Crystals
having high magnitude spurious responses can cause
bad phase jitter). It is also necessary to ensure that the
gain at third harmonic is low enough to ensure absence
of oscillation at this frequency.
veo
al2
a = 0 ..,...-------...... - - - - - - - - - - 7 a = 1
11
//
/
Ix
/
/
//
/
/
/
/
/
/
/
I C 0 1 _ - - - . . . J . - - - " " ' - / - - - - - - . VF
By referring to Figures 5 and 6 it can be seen that the
necessary ±45° phase shift is obtained by variable addition of two currents I, and 12 which are then fed into
the load resistance of the Crystal tuned circuit R,. Feedback is taken from the Crystal load capacitance which
gives a voltage VF lagging the Crystal current by 90°.
is that the loop filter is not compromised by the 7.8
kHz component normally required at this point for
PAL identification.
b) The H/2 switching of the oscillator phase is carried
out before the phase detector. This implies any
error signal from the phase detector is a signal at
7.8 kHz and not dc. A commutator at the phase
detector output also driven from the PAL bistable
converts this ac signal to a dc prior to the !oop
filter. The purpose of this is that constant offsets
in the phase detector are converted by the commutator to a signal at 7.8 kHz which is integrated
to zero and does not give a phase error.
When used for decoding NTSC the bistable is inhibited, and slightly less accurate phasing is achieved;
however, as a hue control is used on NTSC, this cannot
be considered to be a serious disadvantage.
The RC network in T, collector causes I, to lag the
collector current of T, by 45°.
For SECAM operation the currents I, and 12 are added
together in a fixed ratio giving a frequency close to
nominal.
When decoding PAL there are two departures from
normal chroma reference regeneration practice:
a) The loop is locked to the burst entering from the
PAL delay line matrix U channel and hence there
is no alternating component. A small improvement
in signallnoise ratio is gained but more important
MOTOROLA LINEAR/INTERFACE DEVICES
9-186
TDA3333
90· REFERENCE GENERATION
FIGURE 7 - BLOCK DIAGRAM OF REFERENCE SECTION
V Axis
FIGURE 8 - VARIABLE ALL-PASS NETWORK
U Axis
9
Filter
C
Control
dc
Filter
4.43 MHz
From OSC.
H/2
U
90"
Signal
From
PAL
SECAM
Switching
Filter
To generate the U axis reference a variable all-pass
network is utilized in a servo loop. The output of the allpass network is compared with the oscillator output
with a phase detector of which the output is filtered and
corrects the operating point of the varible all-pass network (see Figure 8).
As with the reference loop the oscillator signal is taken
after the H/2 phase switch and a commutator inserted
before the filter so that constant phase detector errors
are cancelled.
For SECAM operation the loop filter is grounded causing near zero phase shift so that the two synchronous
detectors work in phase and not in quadrature.
The use of a 4.4 MHz oscillator and a servo loop to
generate the required 90" reference signal allows the
use of a standard, high volume, low cost crystal and
gives an extremely accurate 90" which may be easily
switched to 0" for decoding AM SECAM generated by
the TDAJ030B Adapter.
current sources for driving the ACC and the identification filter capacitors.
The identification detector is given an internal offset
by making the NPN current mirror emitter resistors unequal. The resistors are offset by 5% such that the identification detector pulls up on its filter capacitor with
zero signal.
IDENTIFICATION
Monochrome I, >12
PAL ident. OK I, <12
PAL ident. X 1,>12
NTSC
13>12
Only for correctly identified PAL signal is the capacitor
voltage held low since '2 is then greater than I,.
For monochrome and incorrectly identified PAL signals 1,>12 hence voltage Vc rises with each burst gate
pulse.
When Vref is exceeded by 0.7 V latch' is made conducting which increases rate of voltage rise on C. Maximum current is limited by R,.
When Vref is exceeded by 0.7 V then latch 2 is made
conducting until C is completely discharged and the
current drops to a value insufficient to hold on latch 2.
As latch 2 turns on latch' must turn off.
Latch 2 turning on gives extra trigger pulse to bistable
to correct identification.
ACC AND IDENTIFICATION DETECTORS
During burst gate time the output components of the
U and also the V demodulators are steered into PNP
emitters. One collector current of each PNP pair is mirrored and balanced against its twin giving push-pull
MOTOROLA LINEAR/INTERFACE DEVICES
9-187
TDA3333
The inhibit line on latch 2 restricts latch 2 conduction
to alternate lines as controlled by the bistable. This func·
tion allows the SECAM switching line to inhibit the bi·
stable operation by firing latch 2 in the correct phase
for SECAM. For NTSC latch 2 is fired by current injected
externally on the filter capacitor.
If the voltage on C is greater than 1.4 V then the saturation is held down. Only for SECAM/NTSC with latch
2 on or correctly identified PAL can the saturation control be anywhere but minimum.
FIGURE 9 - ACC AND IDENTIFICATION DETECTORS
To R-Y Filter
To B-Y Filter
7.0 V
4.0 k
4.0 k
+12 V
4.0k .......~-......-
4.0 k
J-~'IM.,--
Ident
Filter
II
+
NTSC
Switch
ACC
Filter
FIGURE 10 - IDENTIFICATION CIRCUIT
+12 V
+
11
SECAM Switching
Line
12
+
3
13
R2
+Trigger
Burst
Gate
Latch 2
Inhibit
NTSC switch operates when V15<8.0 V.
MOTOROLA LINEAR/INTERFACE DEVICES
9-188
+ Burst
Gate
TDA3333
COLOR DIFFERENCE MATRIXING. COLOR KILLING.
AND CHROMA BLANKING
During picture time the two demodulators feed simple RC filters with emitter follower outputs. Color killing
and blanking is performed by lifting these outputs to a
voltage above the maximum value that the color difference signal could supply.
The R-Y and B-Y demodulators have equal conversion
gains. The demodulated signals are therefore fed through
differential amplifiers with a gain ratio G (B-Y)/G (R-Y)
= 1.78 in order to give correctly proportioned B-Y and
R-Y signals at the output.
FIGURE 11 - COLOR DIFFERENCE STAGES
Color Kill
and
Blanking
+
+
+
+
R
R
C
R-Y
B-Y
R
R-Y
B-Y
13O""-~·'
,-.>----I~
12
E
MOTOROLA LINEAR/INTERFACE DEVICES
9-189
TDA3333
FIGURE 12 - TYPICAL PAL APPUCAnON
v£-
+12V
*47
22 nF
1.0 k
1.0nF
82
18 k
1.0 J.-
/
~
=>
u
V
20
>-
ii'i
u
~
d
s-
10
.....- ~
-
.....---- V
5
V
200
./
t.-
I
FIGURE 4 -
V
400
600
800
1000
IL. LOAD CURRENT {mAl
\.
MOTOROLA LINEAR/INTERFACE DEVICES
10-15
800
1000
®
MOTOROLA
MC3399T
Advance Information
AUTOMOTIVE
HIGH-SIDE DRIVER
SWITCH
AUTOMOTIVE HIGH-SIDE DRIVER SWITCH
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC3399T is a High-Side Driver Switch that is designed to
drive loads from the positive side of the power supply. The output
is controlled by a TTL compatible Enable pin. In the ON state, the
device exhibits very low saturation voltages for load currents in
excess of 750 mAo The device also protects the load from positive
or negative going high voltage transients by becoming an open
circuit and isolating the transient for its duration from the load.
The MC3399T is fabricated on a power BIMOS process which
combines the best features of Bipolar and MaS technologies. The
mixed technology provides higher gain PNP output devices and
results in Power Integrated Circuits with reduced quiescent
current.
The device operates over a wide power supply voltage range
and can withstand voltage transients (positive or negative) of
± 100 V. A rugged PNP output stage along with active clamp circuitry, current limit and thermal shutdown permits driving of all
types of loads including inductive. The MC3399T is specified over
a wide junction temperature of -40'C to + 125'C and is ideally
suited for industrial and automotive applications where harsh environments exist.
TSUFFIX
PLASTIC P A C K A G E ,
CASE 3140-01
6>
Pin 1.
2.
3.
4.
5.
Ignition
Output
Output
Ground
Input
1
"-~/
.
5
(Heatsink surface
connected to Pin 2)
BLOCK DIAGRAM
• Low Switch Voltage Drop
• Load Currents in Excess of 750 mA
• Low Quiescent Current
• Transient Protection Up to ± 100 V
• TTL Compatible Enable Input
-X
TIMING DIAGRAM
• On-Chip Current limit and Thermal Shutdown Circuitry
+100 V
Line TranSbJ·ent
1.0 ms
I
I
+31 V-
MAXIMUM RATINGS
I
I
y-I
I
-J
I
Ignition
Symbol
Value
Unit
Ignition Input Voltage - Continuous
VIGN
+25
-12
Vdc
+12Vo V_
Ignition Input Voltage - Transient
t - 100 ms
t = 1.0 ms
VIGN
V
- 100 V-
Rating
:tao
I
I+-I
1.0 ms
±100
Input Voltage
Vin
-0.3 to +7.0
V
Output Cu rrent
10
Internally
Limited
A
Po
1/8JA
2.0
16
8JA
Po
118JA
8JA
65
25
200
5.0
Watts
mWrC
'c/w
Watts
mWrC
'CIW
TJ
-40 to +150
'c
Tsta
-65 to +150
'C
Power Dissipation and Thermal Characteristics
TA = +25'C
Derate above TA = + 25'C
Thermal Resistance Junction to Ambient
TC = +25'C
Derate above TC = + 25'C
Thermal Resistance Junction to Case
Operating Junction Temperature Range
Storage Temperature Range
- I I-
+5.0 V- r----~{f-(_ _ __
OvJ
+31V~
+12V-
OV-
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
10-16
Input
Output
(load Voltage)
t--, r--
lJ
MC3399T
ELECTRICAL CHARACTERISTICS (VIGN
= + 12 V
IL
=
150 mA -4O'C '" TJ
Characteristic
Operating Voltage
Switch Voltage Drop (Saturation)
VIGN = 4.5 V 10 = 150 mA TJ
10 = 200 mA TJ
10 = 125 mA TJ
VIGN = 12 V 10 = 425 mA TJ
10 = 550 mA TJ
VIGN = 16 V 10 = 375 mA TJ
Quiescent Current
VIGN = 12VI0
10
10
=
=
=
Max
Unit
VIGN(min)
4.5
-
-
V
0.2
0.3
0.3
0.3
0.3
0.4
0.5
0.5
0.5
0.7
0.7
0.7
12
25
10
50
100
50
IGND
-40'C
125'C
Output Leakage Current
VIGN = 12 V, Input = "0"
-
1.6
2.5
A
ILeak
-
10
150
p.A
-
0.8
120
20
-
50
-
I'-S
5.0
-
I'-S
Input Current
High Logic State (VIH = 5.5 V)
Low Logic State (VIL = 0.4 V)
IIH
IlL
Output Turn-Off Delay Time
Input = "1" ~ "0," TJ =
+ 25'C (Figures 1 and 2)
tDLY(on)
tDLY(off)
Over Voltage Shutdown Threshold
Output Turn-Off Delay Time (TJ = + 25'C)
to Over Voltage Condition, Yin stepped from 12 V to 40 V,
V '" 0.9 Vo (Figures 1 and 2)
Output Recovery Delay Time (TJ = + 25'C)
VIGN stepped from 40 V to 12 V, V", 0.9 Vo (Figures 1 and 2)
mA
-
VIH
VIL
+ 25'C (Figures 1 and 2)
-
V
ISC
Input Voltage
High Logic State
Low Logic State
Output Turn-On Delay Time
Input = "0" ~ "1," TJ =
"1" unless noted)'
Typ
-
Output Current Limit
Vo = OV
=
Min
-
= 25'C
TJ
TJ
300 mA TJ
V Input
VIGN-VO
= 25'C
= -40'C
= 125'C
= 25'C
= -40'C
= 125'C
= 150mA
= 550 mA
= + 125'C
Symbol
2.0
-
V
I'-A
Vin(OV)
26
31
36
V
tDLY
-
2.0
-
I'-S
tRCVY
-
5.0
-
I'-S
NOTE:
*Typical Values Represent Characteristics of Operation at TJ = + 25°C.
FIGURE 1 -
TRANSIENT RESPONSE TEST CIRCUIT
Output'
Ignition
50n
Ground
NOTE:
·Depending on Load Current and Transient Duration. an Output Capacitor (CO) of
sufficient value may be used to hold up Output Voltage during the Transient. and
absorb Turn-off Delay Voltage Overshoot.
MOTOROLA LINEAR/INTERFACE DEVICES
1()-'17
MC3399T
+40V-J1
FIGURE 2 -
RESPONSE TIME DIAGRAM
Ignilion
:
I
1
1
+12VInpul
+5.0 V-
O~m
V
o
1....- - - - - - - - - -
I
I
-----"t-I-----+I---.
+3~ ~= ------1k1
1
0. 9Vo
I
I
+12V-
o V-
I
I I
I
lDLY(OV)
lRCVY
SWITCH VOLTAGE DROP versus LOAD CURRENT
80 0
I
l
+14 V
VIGN ~
TJ ~ +15'C
VIN ~ "1"
0
FIGURE 4 80
l,...-...-'
/
0
0
V
/'"
/
t---
V
V
1
60
!z
ll!
a'"
40
!z
d
QUIESCENT CURRENT versus LOAD CURRENT
I
I
VIGN ~ +14V_
t--TJ ~ +15'C
VIN ~ "1"
-t---
10
9
400
600
lDLY(on)
~
'5
......- /'"
100
lDLY(off)
t---
/'"
0
!--l :-
-t
-.I k-
FIGURE 3 -
I
I
800
1000
-
o
o
100
--
IL' LOAD CURRENT ImA)
400
--600
IL, LOAD CURRENT ImA)
MOTOROLA LINEAR/INTERFACE DEVICES
10-18
BOO
V
1000
®
MC3484S2-1
MC3484S4-1
MOTOROLA
INTEGRATED SOLENOID DRIVER
SOLENOID DRIVER
2.4A-S2
4.0A- S4
The MC3484 is an integrated monolithic solenoid driver. Its typical function is to apply full battery voltage to fuel injector(s) for
rapid current rise, in order to produce positive injector opening.
When load current reaches a preset level (4.0 A in MC3484S4 or
2.4 A in MC3484S2) the injector driver reduces the load current
by a 4-to-l ratio and operates as a constant current supply. This
condition holds the injector open and reduces system dissipation.
Other solenoid or relay applications could be served by the
MC3484. Two high impedance inputs are provided which permit
a variety of control options and can be driven by TTL or CMOS
logic.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
S SUFFIX
PLASTIC PACKAGE
CASE 314D
• Microprocessor Compatible Inputs
• On-Chip Power Device
MC3484S2-1
2.4 A Peak
MC3484S4-1
4.0 A Peak
PIN CONNECTIONS
UNFORMED PACKAGE
0.6 A Sustain
1.0 A Sustain
• Low Thermal Resistance to Grounded Tab -
ROJC
~
Input
&~;~~~
:
Output
2SC/W
• Overvoltage Protection Cutoff
• Low Saturation Voltage -
VCE(sat)
=
1.6 V Typ (a 4.0 A
• Fully Functional from Vbat
=
ORDERING INFORMATION
4.0 V to 24 V
• High VCEO(sus) ~ 42 V min (rl ISUSTAIN
• Alternate Lead Forms are Available
Device
FIGURE 1 -
It
+VCC
• Uncompromised Performance - 40"C to + 85°C Junction
Temperature
Tested Ambient
Temperature Range
Peak
Current
MC3484S2-1
2.4 A
MC3484S4-1
4.0 A
TYPICAL APPLICATION
Single Injector with Overvoltage Protection at 30 V (Vb at)
400 Ohms
VSuppiy
4 to 24 Vdc
5
~------------------------------~
I
20 k
Ohms
ILoad
I
I
14
I
I
1~-'-~loJu-t~~--srOr'ernOr'~d
:
~
i
V,n
I
I
I
OVP
In
1.0 k
Ohm
I
iI
-=-
F
-=
L __________________________
3
I
I
I
iI
..J
Gnd (Tab)
lout
(Amps)
Vin
4
(Volts)
3
o
1.0 ms/div
MOTOROLA LINEAR/INTERFACE DEVICES
10-19
MC3484S2-1, MC3484S4-1
MAXIMUM RATINGS
Rating
Power Supply Voltage (Vbat)
Input (Pin 1)
Symbol
Value
Unit
Vbat
24
Volts
~6.0
Yin
Control (Pin 2)
V eant
V
V
50
mA
-
Internal Regulator (Pin 5)
to + 24
o to +5.0
Junction Temperature
TJ
150
°c
Operating Temperature (Tab Temperature)
TA
~40
to + 105
°c
Storage Temperature
T stg
~65
to + 150
Thermal Resistance, Junction to Case
°JC
ELECTRICAL CHARACTERISTICS (Vbat ~ 12 Vdc, TC
~
40" to + 85°C, test circuit of Figure 2, unless noted)
Symbol
Min
Typ
Max
Unit
Ipk(sense)
3.6
1.7
4.0
2.4
5.2
2.9
A
Isus
0.95
0.50
1.0
0.6
1.3
0.7
A
42
50
-
V
-
1.2
1.6
-
Characteristic
Output Peak Current
°c
'C/W
2.5
54-1
52-1
Output Sustaining Current
-
VCEO(sus) Ca 2.0 A
Output Voltage in Saturated Mode
52 Ca 1.5 A
54 (a 3.0 A
Vout
V
Internal Regulated Voltage (VCC, Figure 2)
V reg
-
7.1
-
V
Input "On" Threshold Voltage
Von
-
1.4
2.0
V
Input "Off" Threshold Voltage
Voff
1.3
-
Input "On" Current
(a VI ~ 2.0 Vdc
Ca VI ~ 5.0 Vdc
0.7
V
JJ.A
lin
-
50
220
-
Veant
-
1.5
-
V
lin2
-
75
-
JJ.A
V, Low
-
10
-
kll
ti
-
0.5
-
JJ.s
2fl.
-
60
-
JJ.s
Control Signal Delay
tt
-
15
-
JJ.s
Input Turn Off from Saturated Mode Delay
ts
-
1.0
-
JJ.s
Input Turn Off from Sustain Mode Delay
td
-
0.2
-
JJ.s
Output Voltage Rise Time
tv
-
0.4
-
JJ.s
tf
-
0.3
0.6
-
JJ.s
Control "On" Threshold Voltage (Pin 2)
Control "On" Current
Control Pin Impedance
Input Turn On Delay
Ipk sense to Isus delay
2.0 A
4.0 A
Output Current FalJ Time
FIGURE 2 -
20 k
r
TEST CIRCUIT
--~----------------~~---------------------1~----~ Vba'
400 II
2.0W
Overvoltage
VCC
I 2
RL
Control
r-------~--------,
l'~Je~~or
2.0
mH
1.0 k
P- P
10VHz
250
Square
O
~ colou
MC3484
51
Input
Output
41------~
0~5.0
40 Vll0 W
Zener
Vdc
Wave
MOTOROLA LINEAR/INTERFACE DEVICES
10-20
MC3484S2-1, MC3484S4-1
GENERAL INFORMATION
FIGURE 3 - OPERATING WAVEFORMS
(Max Frequency 250 Hz, Pin 2 Grounded)
Inductive actuators such as automotive electronic fuel
injectors, relays, solenoids and hammer drivers can be
powered more efficiently by providing a high current
drive until actuation (pull-in) occurs and then decreasing the drive current to a level which will sustain actuation. Pull-in and especially drop-out times of the actuators are also improved.
The fundamental output characteristic of the MC3484
provides a low impedance saturated power switch until
the load current reaches a predetermined high-current
level and then changes to a current source of lower
magnitude until the device is turned off. This output
characteristic allows the inductive load to control its
actuation time during turn-on while minimizing power
and stored energy during the sustain period, thereby
promoting a fast turn-off time.
Automotive injectors at present come in two types.
The large throttle body injectors have an impedance of
about 2.0 mH and 1.2 n and require the MC3484S4
driver. The smaller type, popular world-wide, has an
impedance of 4.0 mH and 2.4 n and needs about a 2.0 A
pulse for good results. Some designs are planned which
employ two of the smaller types in parallel. The inductance of an injector is much larger at low current,
decreasing due to armature movement and core saturation to the values above at rated current.
Operating frequencies range from 5.0 Hz to 250 Hz
depending on the injector location and engine type.
Duty cycle in some designs reaches 80%.
~~ult
Sign: 1._4_V_!f----'IL-_ _---!I::-__...,...,LC_
o
Load
Current
"'I L1d
Ipk
Output
Current
2.0
4.0 ms
I
I I
Ipk(sense)
Isus
/
APPLICATIONS INFORMATION
The MC3484 is provided with an input pin (Pin 1)
which turns the injector driver "on" and "off." This pin
has a nominal trip level of 1.4 V and an input impedance
of 20 kll. It is internally protected against negative voltages and is compatible with TTL and most other logic.
There is also a control pin (Pin 2) which rpay be used
as an overvoltage, load dump, shutdown. When a nominal 1.5 V is applied to Pin 2, via a 20: 1 voltage divider
the driver and circuit are set in a safe off state at 30 V
(Vbat)·
Figure 3 shows the operating waveforms for the simplest mode; i.e., with control Pin 2 grounded. When the
driver is turned on, the current ramps up to the peak
current sense level, where some overshoot occurs
because of internal delay. The MC3484 then reduces its
output to Isus. The fall time of the device is very rapid
(, 1.0 J.ls), but the decay of the load current takes 150
to 220 J.lS. while dumping the load energy into the protection zener clamp. It is essential that the zener voltage
be lowerthan the VCEO(sus), but not so low as to greatly
stretch the load current decay time. Without the zener,
the discharge of the load energy would be totally into
the MC3484, which, for the high current applications,
could cause the device to fail. (Se~ SOA, Figure 11.)
Also in Figure 3 is the graphically derived instantaneous power dissipation of the MC3484. It shows that,
for practical purposes, the worst case dissipation is less
than (lsus) (Vbat) (duty cycle).
Provided in Figures 3 and 4 are definitions of the
switching intervals specified in the Electrical Characteristics. Figure 5 shows that the critical switching
parameters stay under control at elevated
temperatures.
MOTOROLA LINEAR/INTERFACE DEVICES
10-21
MC3484S2-1, MC3484S4-1
FIGURE 4 - SWITCHING WAVEFORMS
(Expanded Time Scale)
FIGURE 5 - SWITCHING SPEEO versus
TEMPERATURE
2.0
1,(S2)
-==:-.. . . . ,_--------l
......-: ~
Ipk+-_ _ _
90%
A
VI Turn
Off
10'0
#
.....
o
!7
~
IfIS4)
)r
ty1S2)
vz
o
1.0
2.0
3.0
IvIS4)
If1S2
"5
-40
-20
20
40
60
80
CASE TEMPERATURE 1°C)
TYPICAL CHARACTERISTICS
(Unless otherwise noted: Test circuit of Figure 2, Vbat = 12 Vdc, TC
250 Hz square wave input)
FIGURE 6 -
5.0
4.0
Ipk(,ense)IS4)
II
0
FIGURE 7 -
OUTPUT CURRENT versus TEMPERATURE
r-
--
----
2.0
Dy~amiC Ijk IS4)
I-
1. 8 '-------
- r--
0
8
100
120
~
+ 85°C,
Vee"
3.0 V.........
.....~
".,-
Vee I~
J"
7.0V
--:::.-
o. 2
I,us IS2)
20
40
60
80
CASE TEMPERATURE 1°C)
1125°C -!..-250C
.-::;:-:::. ....
--
140
0.4
]"
12 Vdc
-40 -20
0
120
6
I,us IS4)
o
0
100
SATURATION VOLTAGE
4
2
-
Ipkl,en,e)IS2)
TC
r- TC
- 40° to
16
r-I'
Dy~am~(S2)
1.0
Vb.l
1,(S4)
,;;::? V
o
o
140
1.0
MOTOROLA LINEAR/INTERFACE DEVICES
10-22
2.0
loul lAMPS)
3.0
4.0
MC3484S2-1, MC3484S4-1
TYPICAL CHARACTERISTICS
(Unless otherwise noted: Test circuit of Figure 2, Vbat = 12 Vdc, TC
250 Hz square wave input)
FIGURE 8 - OUTPUT CURRENT versus
SUPPLY VOLTAGE
5. 0
TC
0
25°C
-"
/
/
/
K
2. oil
V
"-.i.lpklsensel
--
4.0
~
Ipk IS21
'"~
-f--
80
10
5.0
12
14
16
4.0
22
-_ ..
24
Pin 2 (Control Threshold)
"'-
p-
o
40
FIGURE 10 -
Pin 1
-"'250 Hz
6.0
BREAKDOWN VOLTAGE versus
TEMPERATURE
T
I--j....-.-
8.0
10
12
FIGURE 11 -
r
put TeshaT-f--
14
16
Vbat IVdcl
Te
18
20
0
25°e
22
24
70
100
SAFE OPERATING AREA
0
---I
10/,s
7. 0
5.0
High Limit Device
...
3.0
-
100/,s
......
...
de
W 2.0
Tvreal
_. . f - -
...
Vbat IVdel
0
--
5.0 Hz
1.0
-- -
--
----
2.0
20
'250 Hz
V
0:
18
7'
[ij
z 3.0
T
Isus IS41
Isus IS21
6.0
W·
<{
10
o
\/
6.0
Ipk(sense)
OPERATING VOLTAGES
Pin 5 IVeel
7.0 -5THZ
./"1
0
0
FIGURE 9 8.0
Ipk IS41
§;
Dr iee
~ 1.0
'"
_50.7
0.5
Low Jmit
De~jCe
0.3
0.2
1f-TC
Ipk - 2.0 A
40
-40
-20
20
40
60
80
Te eASE TEMPERATURE lOCI
100
120
~ BONDING WIRE LTD
THERMALLY LTD
f - SECOND BREAKDOWN
o.
140
~ 25"C,TJ(pkl'" 150"C
2.0
3.0 4.05.0 7.0
II
10
20
aut IVOLTSI
V
MOTOROLA LINEAR/INTERFACE DEVICES
10-23
30 40 50
II
s::
o
!....
NI
FIGURE 12 -
INTERNAL SCHEMATIC
~
s::
o
!....
,a::a.
I
s::
0
-I
~I
6.8 V
1Z1
Power
!;
r
Z
m
~
0
,:.,
.j>.
»
~
Z
-I
m
:xl
~
(')
m
0
m
<
c=;
m
en
R39
40k
R40
R44
R48
10k
32k
54k
Z4
6.8V
R41
10k
t---~~---tr=------:~4~g~~;:O~'tage
Input
Z3
6.8V
®
TCF7000
MOTOROLA
Advance Information
PRESSURE TRANSDUCER
AMPLIFIER
PRESSURE TRANSDUCER AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
This circuit is ideal for automotive and industrial applications
and consists of two low power operational amplifiers with identical characteristics except the outputs which have the following
configurations:
AMPLIFIER A -
NPN Transistor driving an on-chip current
source
AMPLIFIER B -
NPN Transistor with pull-up resistor
PLASTIC PACKAGE
CASE 626-05
• Short Circuit Protected Outputs
• True Differential Input Stage
• Single Supply Operation 4 to 20 Volts
o
• low Input Bias Currents
SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-08
• Internally Compensated
• Common Mode Range Extends to Negative Supply
s~
,
• large Output Voltage Swing from Gnd to VCC
• large Current Drive Capability
PIN ASSIGNMENTS
• Very low Input Offset Voltage
• Operating Ambient Temperature Range of -40'C to + 12S'C
(Top View)
Output A ,
• VCC
, Output B
_. :I
FIGURE 1 -
TYPICAL APPLICATION
r---~------~----------------------~r-----~vcc
RS
Rg
OP
RT330
R5
NOTE:
±5%
Resistor values are determined by the
customer for his specific application.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA LINEAR/INTERFACE DEVICES
10-25
Inputs B
TCF7000
ELECTRICAL CHARACTERISTICS (at TA
~ 25°C and VCC ~ 50 V)
Characteristic
Symbol
Min
VCC
4.0
Power Supply Output
Typ
Max
Unit
20
V
-
Short Circuit Duration
Continuous
Source Current (Amp. A)
Sink Current
High Voltage at IL ~ -5.0 mA (Amp. A)
Low Voltage at IL ~ 5.0 mA
Pull Up Resistor (Amp. B)
-
VOHI
VOL
-
Input
Common Mode Voltage Range
Offset Voltage
Temperature Coefficient of Offset Voltage
Offset Current
-
5.0
50
VCC-0.12
0.12
2.0
3.0
IL
1.0
-
-
-
3.0
mA
mA
V
V
KOhm
VCC-l
3.0
mV
-
p'vrc
-
nA
nA
V/mV
kHz
dB
-
1.0
2.0
3.0
30
100
100
Common Mode Rejection
50
100
-
Power Supply Rejection
50
80
-
dB
Power Supply Current (Outputs High State)
-
2.2
-
mA
Bias Current
Large Signal Open Loop Gain
Bandwidth Unity Gain
FIGURE 2 -
OUTPUT CONFIGURATION
Outputs
VCC
,---
A
B
8
------l
I
I
I
I
In~ts ~
I
5.0 mA
I
2.0 k
16
0-3--i-1-----i
B
31
0-----=1-----1
I
_ _ _ _ _ _ _ _ _ _ JI
I
I
+ 1-_ _.....,1_5_ollnPBuls
TCF7000
~----
4
Gnd
MOTOROLA LINEAR/INTERFACE DEVICES
10-26
®
UAA1041
MOTOROLA
AUTOMOTIVE DIRECTION
INDICATOR
AUTOMOTIVE DIRECTION INDICATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
· .. designed for use in conjunction with a relay in automotive
applications. It is also applicable for other warning lamps such
as "handbr~ke ON," etc.
• Defective'Lamp Detection
• Overvoltage Protection
• Short Circuit Detection and Relay Shutdown to Prevent Risk
of Fire
• Reverse Battery Connection Protection
-VCC
+V Bat
• Integrated Suppression' Clamp Diode
08'
2
7
RlY Out 3
6
Osc
5
4
FIGURE 1 - TYPICAL AUTOMOTIVE SYSTEM
C2
+V
-VCC
Rs
8
UAA
3
1041
4
T
I
I
--"---V
7
6
Rl
.~
1
5
R2
PSUFFIX
PLASTIC PACKAGE
CASE 626-05
R3
o SUFFIX
L1: 1.2 W warning light handbrake ON
Rl = 75 k
R2 = 3.3 k
R3=220!l
L2, l3, l4, l5: 21 W. turn signals
Rs=30m!l
Cl = 5.61-'F
C2 = 0.0471-'F
MOTOROLA LINEAR/INTERFACE DEVICES
10-27
PLASTIC PACKAGE
CASE 751-02
50-8
Start
Fault Det
Fault Det
On/Off
Osc
UAA1041
MAXIMUM RATINGS
Rating
Current: Continuous/Pulse'
Pin
Value
Unit
1
+150/+500
mA
-35/-500
2
3
8
+1-350/1900
+1-300/1400
+1-25150
Junction Temperature
TJ
150
·C
Operating Ambient Temperature Range
TA
-40 to +100
·C
Tstg
-65 to +150
·C
Storage Temperature Range
.One pulse with an exponential decay and With a time constant of 500 ms.
ELECTRICAL CHARACTERISTICS (T 1 = 25°C)
Characteristics
Battery Voltage Range (normal operation)
Symbol
Min
VB
8.0
Typ
-
Max
Unit
18
V
Overvoltage Detector Threshold
(VPin2- VPinl)
Dth(OV)
19
20.2
21.5
V
Clamping Voltage
(VPin2 - VPin1)
VIK
29
31.5
34
V
Short Circuit Detector Threshold
(VPin2 - VPin7)
Dth(SC)
0.63
0.7
0.77
V
Output Voltage (lrelay = - 250 mAl
(VPin2 - VPin3)
Vo
-
-
1.5
V
Starter Resistance Rst = R2 + RLamo
Rst
-
-
3.6
kOt
Oscillator Constant (normal operation)
Kn
1.4
1.5
1.6
-
Temperature Coefficient of Kn
kn
-
-
lfC
Duty Cycle (normal operation)
-
Oscillator Constant -
KF
(1 lamp defect of 21 W)
-1.5x10- 3
45
50
55
0.63
0.68
0.73
%
-
-
35
40
45
%
Oscillator Constant
Kl
K2
K3
0.167
0.25
0.126
0.18
0.27
0.13
0.193
0.29
0.14
-
Current Consumption (relay off)
Pin 1; at VPin2-VPinl = 8.0 V
= 13.5V
= 18V
ICC
-0.9
-1.6
-2.2
-1.0
Current Consumption (relay on)
Pin 1; at VPin2-VPin1 = 8.0 V
= 13.5V
= 18V
-
Duty Cycle (1 lamp defect of 21 W)
mA
-2.5
-
-
.
>
VPin2- VPin7
VPin2- VPin7
VPin2- VPin7
79
-
tSee Note 1 of Application Information
MOTOROLA LINEAR/INTERFACE DEVICES
10-28
mA
-
Defect Lamp Detector Threshold at VPin2 to - VB = 8.0 V
and R3 = 2200
= 13.5V
= 18V
-
-3.8
-5.6
-6.9
67.
85.3
100
-
-
91
-
mV
UAA1041
2.
CIRCUIT DESCRIPTION
The circuit is designed to drive the direction indicator
flasher relay. Figure 2 shows the typical system configuration with the external components. It consists of a
network (R1, C1) to determine the oscillator frequency,
shunt resistor (Rs) to detect defective bulbs and short
circuits in the system, and two current limiting resistors
(R2/R3) to protect the IC against load dump transients.
The circuit can be used either with or without shortcircuit detection.
The lightbulbs L2, L3, L4, L5 are the turn signal indicators with the dashboard-light L6. When switch S1 is
closed, after a time delay of t1 (in our example t1 = 75
ms), the relay will be actuated. The corresponding lightbulbs L2, L3 (or L4, L5) will flash at the oscillator frequency, independent of the battery voltage of B.O V to
1B V. The flashing cycle stops and the circuit is reset to
the initial position when the switch S1 is open.
The circuit features overvoltage, defective lamp and
short circuit detection.
.
1
f
f n : Flashing frequency: n = R1 C1Kn
3. fF: Flashing frequency in the case of one defective
lightbulb of 21 W
f
F -
_1_ K
R1 C1KF n
=
22K
, F
4. t1: delay at the moment when S1 is closed and first
flasht1 = K1R1C
5. t2: defective lightbulb detection delay t2 = K2R1C1
6. t3: short circuit detection delay t3 = K1R1C1
In the case of short circuit:
-
it is assumed that the voltage VPin2-VPin1 "" B.O
V.
-
The relay will be turned off after delay t3.
-
The circuit is reset by switching S1 to the off
position.
7. The capacitor C2 is not obligatory when the short
circuit detector is not used. In this case Pin 6 has to
be connected to Pin 2.
Overvoltage detection:
Senses the battery voltage. When this voltage exceeds
20.2 V (this is the case when two batteries are connected
in series), the relay will be turned off to protect the
lightbulbs.
B. When overvoltage is sensed (VPin2 - VPin1) the relay
is turned off to protect the relay and the lightbulbs
against excessive currents.
C2
Lightbulb defect detector:
Senses the current through the shunt resistor Rs. When
one of the lightbulbs is defective, the failure is indicated
by doubling the flashing frequency.
JU·1 (
-VCC
8
T
7
.....L
I
I
3
Short circuit detector:
Detects excessive current (Ish > 25 A) flowing in the
shunt resistor Rs. The detection takes place after a time
delay of t3 (t3 = 55 ms). In this case, the relay will be
turned off. The circuit is reset by switching S1 to the off
position.
UAA
1041
4
-v
6
5
R2
R1
R3
Operation with short circuit detection:
Pin 6 has to be left open and a capacitor C2 has to be
connected between Pin 1 and Pin 2.
Operation without short circuit detection:
Pin 6 has to be connected to Pin 2 and the use of capacitor C2 is not necessary.
The circuit can also be used for other warning flashers.
In our example, handbrake engaged is signaled by the
light L1.
APPLICATION INFORMATION
FIGURE 2
1. The flashing cycle is started by closing S1.
The switch position is sensed across resistor R2 and
RLamp by input B.
PARTS LIST
R1 = 75 kn
R2 = 3.3 kn
R3=220n
Rs = 30mn
Rst = R2 + RLamp·
The condition for the start is: Rst <3.6 kil
For correct operation leakage resistance from Pin B
to ground must be greater than 5.6 kil.
Wire Resistor
C1 = 5.6JLF
C2 = 0.047 JLF
MOTOROLA LINEAR/INTERFACE DEVICES
10-29
Relay - Coil Resistance
Range 60 to 800 n
Note: Per text connect
jumper JU·1 to bypass
short circuit detector.
C2 may be deleted also.
MOTOROLA LINEAR/INTERFACE DEVICES
10-30
In Brief ...
A variety of other analog circuits are provided for
special applications with both bipolar and CMOS
technologies. These circuits range from the industrystandard analog timing circuits and multipliers.
Selector Guide
Timing Circuits .................. 11-2
Multipliers ....................... 11-2
Alphanumeric Listing .............. 11-3
Related Application Notes. . . . . . . . .. 11-3
Data Sheets ....................... 11-4
Other Linear Circuits
m
Other Linear Circuits
Timing Circuits
These highly stable timers are capable of producing
accurate time delays or oscillation. In the time delay
mode of operation, the time is precisely controlled by
one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the
duty cycle are both accurately controlled with two exter-
nal resistors and one capacitor. The output structure
can source or sink up to 200 mA or drive TIL circuits.
Timing intervals from microseconds through hours can
be obtained. The typical timing error for the MC1455 is
1.0%.
Singles
Duals
MC1455G,P1,U TA = 0° to + 700C, Case 601, 626, 693
MC1455BP1 T A = - 40° to + 85°C, Case 626
MC3556L T A = - 55° to + 125°C, Case 632
MC3456L,P TA = 0° to + 70°C, Case 632, 646
Multipliers
Linear Four-Quadrant Multipliers
MC1595L TA = -55° to + 125°C, Case 632
MC1495L TA = 0° to + 70°C, Case 632
Multipliers are designed for use where the output
voltage is a linear product of two input voltages. Typical
applications include: multiply, divide, square, rootmean-square, phase detector, frequency doubler, balanced modulator/demodulator, electronic gain control.
... designed for uses where the output is a linear product
of two input voltages. Maximum versatility is assured by
allowing the user to select the level shift method. Typical
applications include: multiply, divide*, square root,*
mean square*, phase detector, frequency doubler, balanced modulator/demodulator, electronic gain control.
MC1594L T A = - 55° to + 125°C, Case 620
MC1494L TA = 0° to +70°C, Case 620
m
The MC1594/MC1494 is a Variable Transconductance
Multiplier with internal level-shift circuitry and voltage
regulator. Scale factor, input offsets and output offset
are completely adjustable with the use of four external
potentiometers. Two complementary regulated voltages are provided to simplify offset adjustment and improve power-supply rejection.
*When used with an operational amplifier.
MOTOROLA LINEAR/INTERFACE DEVICES
11-2
OTHER LINEAR CIRCUITS
TIMING CIRCUITS
Device
MC1455
MC3456
MC3556
Function
Timing Circuit ......................................................
Dual Timing Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Dual Timing Circuit ..................................................
Page
11-4
11-40
11-40
MULTIPLIERS
Device
MC1494L
MC1495L
MC1496
MC1594L
MC1595L
MC1596
Function
Page
Four-Quadrant Multiplier ............................................. 11-11
Four-Quadrant Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-25
Balanced Modulator-Demodulator .............................. See Chapter 8
Four-Quadrant Multiplier ............................................. 11-11
Four-Quadrant Multiplier ............................................. 11-25
Balanced Modulator-Demodulator .............................. See Chapter 8
RELATED APPLICATION NOTES
Application
Note
AN489
AN531
Related
Title
Device
Analysis and Basic Operation of the MC1595 ....................... MC1595L
MC1596 Balanced Modulator ..................................... MC1596
m
MOTOROLA LINEAR/INTERFACE DEVICES
11-3
®
MC1455
MOTOROLA
Specifications and Applications
Information
TIMING CIRCUIT
SILICON MONOLITHIC
INTEGRATED CIRCUIT
TIMING CIRCUIT
The MC1455 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation.
Additional terminals are provided for triggering or resetting if
desired. In the time delay mode of operation, the time is precisely
controlled by one external resistor and capacitor. For astable operation as an oscillator, the. free running frequency and the duty
cycle are both accurately controlled with two external resistors
and one capacitor. The circuit may be triggered and reset on falling
waveforms, and the output structure can source or sink up to 200
mA or drive MTTl circuits.
G SUFFIX
• Direct Replacement for NE555 Timers
METAL PACKAGE
CASE 601-04
• Timing From Microseconds Through Hours
• Operates in Both Astable and Monostable Modes
1.
2.
3.
4.
• Adjustable Duty Cycle
• High Current Output Can Source or Sink 200 mA
Ground
Trigger
Output
Reset
5. Control Voltage
6. Threshold
7. Discharge
8. VCC
• Output Can Drive MTTl
• Temperature Stability of 0.005% per ·C
• Normally "On" or Normally "Off" Output
FIGURE 1 - 22-SECONO SOLID-STATE TIME DELAY RELAY CIRCUIT
P1 SUFFIX
PLASTIC PACKAGE
CASE 626-05
m
~
0.1 p.F
USUFFIX
CERAMIC PACKAGE
CASE 693-02
8
t ~ 1.1; R,C ~ 22 s
Time delay (t) is variable by
changing Rand C, (See Figure 16).
FIGURE 2 -
1
D SUFFIX
BLOCK DIAGRAM
PLASTIC PACKAGE
CASE 751-02
VCC
8
SO-8
8.1 -
5k
Threshold4--t---l
/""--p-- Discharge
Control....;5+-~H
ORDERING INFORMATION
Voltage
5k
Temperature
Output
Device
MC1455G
MCl455Pl
MC1455D
MC1455U
MC1455BPl
Trigger ...:201-_+-'
5k
Reset
MOTOROLA LINEAR/INTERFACE DEVICES
11-4
Alternate
NE555V
-
. Range
O"C to
O"Cto
O"Cto
O"Cto
- 40°C to
Package
+70°C Metal Can
+70"C Plastic DIP
+70"C 50-8
+70°C Ceramic DIP
+ 85°C Plastic DIP
MC1455
MAXIMUM RATINGS (TA = +25·C unless otherwise noted.)
Rating
Symbol
Value
Unit
Power Supply Voltage
FIGURE 3 - GENERAL TEST CIRCUIT
VCC
+lB
Vdc
Discharge Current (Pin 7)
17
200
mA
Power Dissipation (Package
Limitation)
Metal Can
Derate above TA = + 25·C
Plastic Dual In-Line Package
Derate above TA = + 25·C
Po
6BO
4.6
625
5.0
mW
mwrc
mW
mwrc
Operating Temperature
Range (Ambient)
MC1455B
MC1455
TA
Storage Temperature Range
X
+
0.01 ~F
Control
Voltage
Output
·C
1sink
Isource
-40 to +B5
o to +70
Tstg
-65to +150
·C
Test Circuit for Measuring de Parameters: (to set output and measure parameters)
a) When Vs "" 2/3 Vee. Vo is low.
b) When Vs ,... 113 Vee. Vo is high.
c) When Vo is low, pin 7 sinks current. To test for Reset, set VO. high.
apply Reset voltage, and test for current flowing into pin 7.
When Reset is nol in use, it should be tied to Vee-
ELECTRICAL CHARACTERISTICS (TA = + 25·C VCC = + 50 V to + 15 V unless otherwise noted)
Symbol
Min
Typ
Max
Operating Supply Voltage Range
Characteristics
VCC
4.5
-
16
Supply Current
VCC = 5.0 V, Rl = '"
VCC = 15 V, Rl = '"
low State, (Note 1)
ICC
-
Timing Error (Note 2)
R=1.0kl1tol00kl1
Initial Accuracy C = 0.1 /LF
Drift with Temperature
Drift with Supply Voltage
-
Unit
V
mA
3.0
10
6.0
15
Threshold Voltage
Vth
Trigger Voltage
VCC = 15 V
VCC = 5.0 V
VT
Trigger Current
0.5
Reset Voltage
'T
VR
-
0.4
0.7
1.0
V
Reset Current
IR
-
0.1
-
mA
Threshold Current (Note 3)
'th
-
0.1
0.25
/LA
Discharge leakage Current (Pin 7)
Idis
-
-
100
nA
Control Voltage level
VCC = 15 V
VCC = 5.0 V
VCl
Output
(VCC
Isink
Isink
'sink
'sink
(VCC
Isink
Isink
VOL
Voltage low
= 15 V)
= 10 mA
= 50 mA
= 100 mA
= 200 mA
= 5.0 V)
= B.O mA
= 5.0 mA
-
1.0
50
0.1
-
2/3
-
5.0
1.67
VOH
Rise Time of Output
tOlH
Fall Ti me of Output
tOHl
10
3.33
11
4.0
-
0.1
0.4
2.0
2.5
0.25
0.75
2.5
-
0.25
V
!LA
-
-
0.35
V
12.5
-
13.3
3.3
-
-
100
-
ns
-
100
-
ns
-
3. This will determine the maximum value of AA
The maximum total R = 20 megohms.
Monostable mode
MOTOROLA LINEAR/INTERFACE DEVICES
11-5
xVCC
V
12.75
2.75
NOTES:
1. Supply current when output is high is typically 1.0 rnA less.
2. TO>ted at Vec = 5.0 V and VCC = 15 V.
%Nolt
V
9.0
2.6
-
Output Voltage High
(lsou ree = 200 mAl
VCC = 15 V
(lsouree = 100 mAl
VCC=15V
VCC = 5.0 V
%
PPMrC
+ RS
for 15 V operation.
m
MC1455
TYPICAL CHARACTERISTICS
ITA = +25"C unless otherwise noted.)
FIGURE 4 -
FIGURE 5 -
TRIGGER PULSE WIDTH
12 5
~
..s 100
~
+2J"
8. 0
V-
~ 6. 0
-
5
oo
f--
01--
5~
0
SUPPLY CURRENT
0
15 0
u
pt
,/
~
1~oC
IX Vee
'T
~
or
g
V
1. 2
1. 0
~ O. 8
~ O.S
0.4
o
5.0
5V.;"VCC';;;15V
r
o
1.0
15
10
2.0
+25 0 C
0
1
.0
7
~
-'
"
V
>"
V
>
.1
20
50
0.0 I
1.0
100
2.0
+25 0 C./
.1
V
FIGURE 10 - DELAY TIME
versus SUPPLY VOLTAGE
"~
::;
~
1.000
20
50
100
0.0 I
1.0
2.0
FIGURE 12 -
5.0
10
20
ISINK,lmAI
\
I-- ~
\
-
1.010
'"
~ 1.005
::;
w
0
'"
;:: 1.00
t-
g
>-
" 0.995
~
-r-
-
j
0.99 5
'";?
;?
0.990
15
10
5.0
Vee. SUPPLY VOLTAGE IVdcl
20
t--
--
0~~7
o
0.99 0
0
0.98 5-75 -50 -25
0 +25 +50 +75 +100 +125
TA, AMBIENT TEMPERATURE loel
0
MOTOROLA LINEAR/INTERFACE DEVICES
I
~
-~+250e
O
+70 C
0.3
0.4
0.1
0.2
VTlminl. MINIMUM TRIGGER VOLTAGE
IX Vee Vdcl
0
11-6
100
PROPAGATION DELAY
::;
\
50
versus TRIGGER VOLTAGE
300
1.01 5
1.015
>-
10
FIGURE 11 - DELAY TIME
versus TEMPERATURE
'" 1.010
~
>-
5.0
ISINK,lmAI
ISINK, (rnA)'
'"~" 1.005
100
0
II
./
II
50
FIGURE 9 - LOW OUTPUT
VOLTAGE @ Vee = 15 Vdc
=
0" I-
10
20
Isource(mA)
FIGURE B - LOW OUTPUT VOLTAGE
@Vee
10Vdc
1$/
5.0
10
Vrlcl
0
2.0
5.0
Vce,SUPPLY VOLTAGE IVdcl
-'
0.0 I
1.0
1...-1-
+25 0 C
<:i 1.4
0.2
0
o. I
I
I
I. 8
1.6
,/
HIGH OUTPUT VOLTAGE
U
FIGURE 7 - LOW OUTPUT VOLTAGE
@ Vee = 5.0 Vdc
0
V
!:?2.0
0.3
0.4
VT(mill}. MINIMUM TRIGGER VOLTAGE
0.2
2. 0
~ 4. 01/'
......,[;:::::: ~ ~
0.1
V-
FIGURE 6 -
MC1455
FIGURE 13 -
REPRESENTATIVE CIRCUIT SCHEMATIC
i r
5
Control Voltage
i
-F[,P=-hop -''Oi:lT"puTI
THRESHOLD
- TRIGGeRi
Vee 8~__e_O~M_p_A_R_A
__
T~O_R__~__~I~I~e_O__
M_p_T~R~H-______~~~4-~--,
I
I
1
Threshold 6
3
,,
,
L ______
.J
Trigger
20-----------+----4--[
,
I
Reset 4
I
4.7k
I
II
'L _______ ...J
Discharge 7
~
_______
L
__
I
~.!
GENERAL OPERATION
A reset pin is provided to discharge the capacitor thus interrupting the timing cycle. As long as the reset pins is low, the
The MC1455 is a monolithic timing circuit which uses as its
timing elements an external resistor - capacitor network. It
can be used in both the monostable (one-shot) and astable
modes with frequency and duty cycle controlled by the capacitor and resistor values. While the timing is dependent upon
capacitor discharge transistor is turned "on" and prevents the
capacitor from charging. While the reset voltage is applied the
digital output will remain the same. The reset pin should be
tied to the supply voltage when not in use.
the external passive components, the monolithic circuit provides the starting circuit, voltage comparison and other func-
tions needed for a complete timing circuit. Internal to the integrated circuit are two comparators, one for the input signal
and the other for capacitor voltage; also a flip-flop and digital
FIGURE 14 - MONOSTABLE CIRCUIT
output are included. The comparator reference voltages are
always a fixed ratio of the supply voltage thus providing output
timing independent of supply voltage.
+Vcc (5 to 15 VI
Monostable Mode
>
tL
,,
In the monostable mode, a capacitor and a single resistor
are used for the timing network. Both the threshold terminal
and the discharge transistor terminal are connected together
in this mode, refer to circuit Figure 14. When the input voltage
to the trigger comparator falls below 113 VCC the comparator
output triggers the flip-flop so that it's output sets low. This
I
I
turns the capacitor discharge transistor "off" and drives the
digital output to the high state. This condition allows the capacitor to charge at an exponential rate which is set by the RC
time constant. When the capacitor voltage reaches 2/3 VCC the
threshold comparator resets the flip-flop. This action dis-
Reset
Vee
8
4
Discharge
3
7
Output
MC1455
charges the timing capacitor and returns the digital output to
Trigger
the low state. Once the flip-flop has been triggered by an input
;,:RL
signal, it cannot be retriggered until the present timing period
has been completed. The time that the output is high is given
by the equation t = 1.1 RA C. Various combinations of Rand
._'--
C and their associated tim~s are shown in Figure 16. The trigger
pulse width must be less than the timing period.
MOTOROLA LINEAR/INTERFACE DEVICES
11-7
1
Control
0.01 IlF
Voltage
II
MC1455
GENERAL OPERATION
(continued)
FIGURE 15 - MONOSTABLE WAVEFORMS
FIGURE 16 - TIME DELAY
==:I
100
Inl
put
l VOI U
t age 5_0 V/cm
10
oull
tput
-
.
II
Capacitor
/
. •
voltagle l 1
5.0
/
1/
0.01 /
0.00
L
.L.
.L.
/
/
/'
t-~
:/
/
/
V
l/
1/
lOOps
t = 50.uslcm
(RA = 10 kf!, e = 0,01 ~F, RL = 1.0 kf!, Vee = 15 V)
/
!L
/
L
~ ,c"~ -.~ ~ t-,c,,+~
/
I~ /
/
1/ V
11/
L
L
~ ~ f-'-'
1
,-/
V/cm
'/
/
1/
Voltage 20 V/cm
!rill
1/
/
/
L
/
/
/
/
1.0ms
10ms
lOOms
10
1.0
100
'd, TIME DELAY Is)
FIGURE 17 - ASTABLE CIRCUIT
FIGURE 18 - ASTABLE WAVEFORMS
+VCC(5 to 15 V)
:
~:RL
VCC
Reset
I
I
I
Output
Voltaye
10 V/crn
7 Discharge
3
6 Threshold
I
I
I
I
!
Ch~put
8
4
I
1-
MC1455
Trigger
~
.rL
! l ! I ic' !
apitC1to
: i i i :::ii
r VOlta_ge
.~
IIJ:ii !!:Ii
:)0 ViCIT1
t,.. 20,usJcm
(RA = 5.1 kf!, e = O.OlI'F, RL = 1.0 kf!;
RS = 3.9 kf!, Vee = 15 V)
Astable Mode
In the astable mode the timer is connected so that it will
retrigger itself and cause the capacitor voltage to oscillate between
1/3 Vee and 2/3 Vee. See Figure 17.
The external capacitor charges to 2/3
m
and discharges to 1/3
Vee
Vee through
RA and RS
through AS- By varying the ratio of
FIGURE 19 - FREE-RUNNING FREQUENCY
these resistors the duty cycle can be varied. The charge and
discharge times are independent of the supply voltage.
100"":--......,.....-..,..~-,..--r--""T----,
The charge time (output high) is given by: tl = 0.695 (RA+RB) e
The discharge time (output low) by: t2 = 0.695 (RB) e
Thusthe total period is given by: T
= tl
+ t2
101 p.":---f",-..p..,,,,-1~-+---1f---1
= 0.695 (RA+2RB) e
~
The frequency of oscillation is then: f
=.!. =
T
3
1.44
(RA+2RB) e
~
:::u
and may be easily found as shown in Figure 19.
The duty cycle is given by: De
=~
1.0 p.,,"'-1i"<:-;--t""'-;--f""'-z-f"-:--;-+----<
;1;
;3 0.1 f----i"<:--t""'--f""'--f"-:---+',,--j
RA+2R S
U
To obtain the maximum duty cycle RA must be as small as
possible; but it must also be large enough to limit the discharge
current (pin 7 current) within the maximum rating of the discharge
transistor (200 mAt.
The minimum value of RA is given by:
Vee (Vdc)
Vee (Vdc)
RA;;'17iAl ;;. -0-.2--
f, FREE·RUNNING FREQUENCY (Hz)
MOTOROLA LINEAR/INTERFACE DEVICES
11-8
MC1455
APPLICATIONS INFORMATION
Missing Pulse Detector
Linear Voltage Ramp
In the monostable mode, the resistor can be replaced by a con·
stant current source to provide a linear ramp voltage. The capaci·
tor still charges from 0 to 2/3 Vee. The linear ramp time is given
by t = ~ Vee
3
where I
then
t
=
Vee - VB - VBE
RE
The timer can be used to produce an output when an input
pulse fails to occur within the delay of the timer. To accomplish
this, set the time delay to be slightly longer than the time between
successive input pulses. The timing cycle is then continuously reset
by the input pulse train until a change in frequency or a missing
pulse allows completion of the timing cycle, causing a change in
the output level.
If VB is much larger than VSE.
can be made independent of Vce.
AGURE 20 -
LINEAR VOLTAGE SWEEP CIRCUIT
FIGURE 22
+Vcc (5 to 15 V)
Vee
Reset
Reset
4
Vee
4
8 Vee
r-_--L_ _-L--,Di~charge
Rl
3
2N4403
Output
Threshold
6
MC1455
5
Input
ContrOl
Voltage
Trigger
2N4403
or Equiv
FIGURE 21 IRE
LINEAR VOLTAGE RAMP WAVEFORMS
= 10 kO.R2 = 100 kO.R1 = 39 kO.C = 0.01 ,.F.VCC = 15 VI
FIGURE 23 - MISSING PULSE DETECTOR WAVEFORMS
IRA = 2.0 kO. RL = 1.0 kO. C = 0.1 ,.F. VCC = 15 VI
III
t = 500 1-a/em
t = 100J,ls/cm
MOTOROLA LINEAR/INTERFACE DEVICES
11-9
MC1455
APPLICATIONS INFORMATION
(continued)
FIGURE 25 - PULSE WIDTH MODULATION WAVEFORMS
(RA = 10 leO, e = 0.02 p,F, Vee = 15 V)
Pulse Width Modulation
If the timer is triggered with a continuous pulse train in the
rnonostable mode of operation, the charge time of the capacitor
can be varied by changing the control voltage at pin 5. I n this
manner. the output pulse width can be modulated by applying
a modulating signal that controls the threshold voltage.
FIGURE 24
+ Vcc (5 to 15 V)
RL
RA
40
3
7
o utput
t ~
±
MC1455
2
5
c lock
nput
Test Sequences
Modulatio
Input
1
0.5 ms/cm
c
6
Several timers can be connected to drive each other for sequential timing. An example is shown in Figure 26 where the sequence
is started by triggering the first timer which runs for 10 rns. The
output then switches low momentarily and starts the second timer
which runs for 50 ms and so forth.
FIGURE 26
Vcc (5 to 15 V)
27 k
9.1 k
8
III
8·
~~
6
}---<>MC1455
6
>----<>7
r----o--
f----<>O.OOlI'F
2
T
MC1455
1
5.0!'F
r·O!'F
1
I
18.2 k
4
8
~~
1
4
6
>----<>7
>----<>-
3
2
3
7
27 k
9.1 k
4
MC1455
2
roo,", I
~~
3
f---<>---1
5.01'F
Load
Load
MOTOROLA LINEAR/INTERFACE DEVICES
11-10
Load
®
MC1494L
MC1594L
MOTOROLA
Specifications and Applications
Information
LINEAR FOUR-QUADRANT
MULTIPLIER INTEGRATED
CIRCUIT
MONOLITHIC FOUR·QUADRANT MULTIPLIER
· .. desigQed for use where the output voltage is a linear product of
two input voltages. Typical applications include: multiply, divide,
square root, mean square, phase detector, frequency doubler, balanced
modulator/demodulator, electronic gain control.
The MC1594/1494 is a variable transconductance multiplier with
internal level·shift circuitry and voltage regulator. Scale factor. input
offsets and output offset are completely adjustable with the use of four
external potentiometers. Two complementary regulated voltages are
provided to simplify offset adjustment and improve power-supply
rejection.
•
Operates With ±.15 V Supplies
•
Excellent Linearity - Maximum Error (X or V): ±. 0.5% (MC15941
±. 1.0% (MC1494)
Wide Input Voltage Range - ±.10 volts
Adjustable Scale Factor, K (0.1 nominal)
Single·Ended Output Referenced to Ground
Simplified Offset Adjust Circuitry
Frequency Response (3 dB Small-Signal) - 1.0 MHz
Power Supply Sensitivity - 30 mV/v typical
•
•
•
•
•
•
SILICON MONOLITHIC
EPITAXIAL PASSIVATED
,~-
L SUFFIX
CERAMIC PACKAGE
CASE 620·10
TYPICAL LINEARITY ERROR
versus TEMPERATURE
FOUR-QUAORANT
MULTIPLIER TRANSFER CHARACTERISTIC
10 0
~ +6.ol-.::----1--~~-1
5
~ +4.0 f----1----"'~;::--"f"'----t---I
w
~ +2.0 t-=oj=:-t--~.....
2't-,,-+-7l's..""f'---
:;
i:
~
o
>
~
>~
-2.0J-=F---1--:J......'7IL.---t-.."".?.....t:--'
-4.0 r---i--;;;;-4'--~"---+--+--+-~.-
050
::0
>~
;:--"~f-----1
g -6.0i""--r---7I"----1---i----t ----+----+-
02 5
x
~
-4.0
-2.0
+2.0
-
m
o
+4.0
-55
-25
VX.INPUT VOLTAGE (VOLTSI
'25
'50
')5
TA.AMBIENT TEMPERATURE lOCI
CONTENTS
Subject Sequence
Specification
Page No.
Subject Sequence
Specification
Page No.
Maximum Ratings
2
AC Operation
Electrical Characteristics
Test Circuits
2
3
AC Applications
11
Characteristic Curves
4
Definitions
13
Circuit Description
5
General I nformation Index
14
Circuit Schematic
5
6
DC Operation
DC Applications
MOTOROLA LINEAR/INTERFACE DEVICES
11-11
+100
+125
m
MC1494L, MC1594L
MAXIMUM RATINGS (TA = + 25°C unless otherwise noted)
Symbol
Value
Unit
V+
V-
+18
-18
Vdc
V9-V6
Vlo-V13
±16+11 Ryl<30
±16+11RXI<30
Vdc
Common-Mode Input Voltage
VCMY = V9 = V6
VCMX = VlO = V13
VCMY
VCMX
±11.5
±11.5
Power Dissipation (Package Limitation)
TA = +25°C
Derate above TA = + 25°C
PD
l/eJA
750
5.0
Rating
Power Supply Voltage
Differential Input Signal
Operating Temperature Range
Vdc
MC1594
MC1494
Storage Temperature Range
mW
mW/oC
TA
-55 to + 125
o to +70
°c
Tstg
-65to +150
°c
ELECTRICAL CHARACTERISTICS (v+ = +15 V, V- = -15 V, TA = + 25°C, Rl = 16 kn, RX = 30 kil, Ry = 62 kil,
RL - 47 kil unless otherwise noted)
MC1594
Characteristic
Linearity
Output error in Percent of full scale
Fig.
Symbol
1
ERX or ERY
-10V:..t
Vy ....
10k
8"
Vyoff
VI oil
10k
'Ok
Vooll
FIGURE 6 - COMMON·MOOE
FIGURE 5 - FREQUENCV RESPONSE
I
...~:
vx
Vy
CMVy
(20Hlt
~
'"
-
47k
"
8"
FIGURE 7 - POWER·SUPPL V SENSITIVITV
FIGURE 8 - BURN·IN
MOTOROLA LINEAR/INTERFACE DEVICES
11-13
m
MC1494L, MC1594L
TYPICAL CHARACTERISTICS
(Unless otherwise noted. v+ = +15 V. V- = -15 V. Rl = 16 k!1. RX = 30 k!1. Ry = 62 k!1. RL = 47 k!1. T A = +250 C)
FIGURE 9 - FREQUENCY RESPONSE OF Y INPUT
versus LOAD RESISTANCE
FIGURE 10 - FREQUENCY RESPONSE OF
X INPUT versus LOAD RESISTANCE
1--t-+++I+H+--t-+++I+HII-:::±~CI'm1f-IR l " 33 k!l
--ll
·5.0 1--t+tt1+ffi--+-+t-ttHtr-+-H-I'NJItt--=t"'i'"i..titttl
·1 0
Vy" 1 V~rmsl. Vx
=:
10 Vdc
104
105
p;'--J....JIIu..J..LLIIIII~II............
Uill";;-----'--'--w.u.w
"::--,--,-,...L.J.J..IJIIII"';--I"
6
-20
10 7
106
=:
.151--+-+++1 RX " 30 k!l, Ry " 62 k" -1-+++l+"Htt
II 11_"_'++1H-+ffl
'20L-L-L.u..u.III",-~rl"6.J-.lprI-W..JIII.JJJ.L,IIIII--,-,-,-,~~
103
f--+-l-ttt++lt-f-++++++!!---+-H+t+i,ff-~---'1-r-wt1~
Vx 1 V{rmsl. Vy 10 Vdc
R
47 k'
=
.15 I--++H-+ RX "30k~!, Ry =62 k~!
103
10 5
104
10 6
f. FREQUENCY
t, FREQUENCY IHll
FIGURE 11 - LARGE SIGNAL VOLTAGE versus FREOUENCY
10 7
(Hi)
FIGURE 12 - LINEARITY versus RX OR Ry WITH K = 1/10
6
CD
0
t'-....
1\
~
O. 5
r£'.
~~
T 1'-
OA
\
z
CD With MC1556 Buller Op-Ampl
_
Ci) No Op-Ampl., RL '" 47 k!~
1111111
b
§
03
"'ox
"'
O. 2
w
~
.........
t----..
1111111
100
10k
.. Ok
100 k
t, FREQUENCY IHll
FIGURE 13 - LINEARITY versus RX OR Ry WITH K = 1
m
t--
\
:::;
0
0,4
.1
.
1""-
0.10
1.1
2
Vin = 2 Vpp
t'-....
t;
......... f"'-...,
I
30
40
50
RX
{k~!
40
60
80
100
Ry
(k~!
6",
K Factor Adjusted for 1110 at 25°C
a: 0.10 4
o
f'....
20
FIGURE 14 - SCALE FACTOR IK) versus TEMPERATURE
010 8
RL Adjusted for K:: 1 _
3
Al Adiusted for K =: 1110
Vin'" 20 Vpp
~
--
w
~
0.10 2
1\ ....
o. 1
I'---
---.....
~ 0.09 8
--
r-..
0,09 6
~
0.094
0
:
2.0
4.0
6.0
8.0
10
RX Ik!ll
4.0
8.0
12
16
20
Ry Iklfl
-55
-35
-15
+5.0
MOTOROLA LINEAR/INTERFACE DEVICES
11-14
+25
+45
+65
+85
TA,AMBIENT TEMPERATURE lOCI
+105
+125 +145
MC1494L, MC1594L
GEN~RAL
1.
INFORMATION
CIRCUIT DESCRIPTION
1.1
Introduction
with the offset adjust circuits to virtually eliminate sensitivity
of the offset voltage nulls to changes in supply voltage.
The MC1594 is a monolithic. four-quadrant multiplier that
As shown in Figure 15, the MC1594 consists of a multiplier
operates on the principle of variable transconductance. It
proper and associated peripheral circuitry to provide these
features.
features a single-ended current output referenced to ground
and provides two complementary regulated voltages for use
FIGURE 15
--i
(Recommended External Circuitry is Depicted With Dotted Lines)
1- ._- -- - - - -- -- -~L~C;D~A~R:M-- ----- - -15
v+
2 +4.3V
+v,
3
~
14
"
CURRENT AND VOLTAGE
REGUlATOR
4
-VR -4.3V ' -_ _ _. ,_ _ _- '
vy
FOUR QUADRANT
MULTIPLIER
9
1--,--:::----'----1
to
'.
•
DIFFERENTIAl
CURRENT
'0
(10 - IA - ta)
CONVERTER
vx
13
12
v-
5~,~5----------~--------7-------------~--~--~------------4-----------'
SIMPLIFIED CIRCUIT
SCHEMATIC
-'A
-~:
14
10
vy
vx
500
13
15
v'
500
COMPLETE CIRCUIT
SCHEMATIC
1
~
R1~==l==~=:t:~_..
____________________-+
GNO 3
V,
500
4
v- O-............-
....._-_-_...._-_-_-_-_-_. . ._-_-_....
..........................----<~L..-_--_-_-_-_
REGULATOR
_-_-_---.J.:....-----D-IF-FE.JRENTIAL
MULTIPliER
MOTOROLA LINEAR/INTERFACE DEVICES
11-15
CURRENT CONVERTER
14
II
MC1494L, MC1594L
1.2
Regulator (Figure 151
or
The regulator biases the entire MC1594 circuit making it
essentially independent of supply variation. It also provides
2VXVy
two convenient regulated supply voltages which can be used
in the offset adjust circuitry. The regulated output voltage
10 = RX Ryll
at pin 2 is approximately +4.3 V while the regulated voltage
at pin 4 is approximately -4.3 V. For optimum temperature
stability of these regulated voltages, it is recommended that
The output current can be easily converted to an output
voltage by placing a load resistor R L from the output (pin
14) to ground (Figure 17) or by using an op-ampl. as a
current-to-voltage converter (Figure 16). The result in both
circuits is that the output voltage is given by:
1121 = 1141 = 1.0 mA lequivalent load of 8.6 kill. As will be
shown later, there will normally be two 20 k-ohm potenti-
ometersand one 50 k-ohm potentiometer connected between
pins 2 and 4.
V
The regulator also establishes a constant current reference that
controls
of the constant current sources in the MC1594.
Note that all current sources are related to current 11 which
is determined by R 1. For best temperature performance,
Rl should be 16 kn so that 11 ~ 0.5 mA for all applications.
o
2RL Vx Vy
= - - - - = KVXVy
RXRyl1
an
1.3
2RL
where K (scale factorl :: - - RX Ryl1
Multiplier (Figure 15)
The multiplier section of the MC1594 (center section of
Figure 15) is nearly identical to the MC1595 and IS discussed
in detail in Application Note AN-489, "Analysis and Basic
Operation of the MC1595"
The result of this analYSIS is
that the differential output current of the multiplier is given
by:
2.
DC OPERATION
2.1
Selection of External Components
For low frequency operation the circuit of Figure 16 is
recommended. For this CirCUit, RX == 30 kn, Ry:: 62 kn,
Rl == 16 kn and hence 11 ~0.5 rnA. Therefore, to set the
scale factor, K, equal to 1110, the value of RL can be calculated to be:
K
Therefore, the output is proportional to the product of the
two input voltages.
1.4
1
2RL
10
RXRyl1
= --- = - - - RXRyl1
or
Differential Current Converter (Figure 15)
This portion of the circuitry converts the differential output
current (I A-I B) of the multiplier to a single-ended output
current (10):
RL
=
I2iIiOI
=
130 kl162 kilOS mAl
20
RL=46.5k
Thus, a reasonable accuracy In scale factor can be ach leved
by making R L a fixed 47 k~2 resistor. However, if it is desired
FIGURE 16 - TYPICAL MUL TlPLIER CONNECTION
+15 V
-15
v
RL
vx
~
50 k
22k
'l
P
P4
AI
R'
IO 110
16k
30k
lOpf
yy
II
""I
*
,>-o--+_v,
R'
110
PI
""ti'
20k
~
-R is not necessarV it
inputsilredccoupled.
MOTOROLA LINEAR/INTERFACE DEVICES
11-16
O.'"F
-15 V
Vo" -vx Vy
+15V
'0
1
-10Vo;;;VX<+10V
-10V 0;;; Vy 0;;;+10 V
MC1494L, MC1594L
offset voltage can be adjusted to zero (see offset and scale
factor adjustment procedure).
that the scale factor be exact. R L can be comprised of a
fixed resistor and a potentiometer as shown in Figure 16.
It should be pointed out that there is nothing magic about
setting the scale factor to 1/10. This is merely a convenient
factor to use if the Vx and Vy input voltages are expected
to be large. say ±10 V. Obviously with Vx = Vy = 10 Vand
a scale factor of unity. the device could not hope to provide
The input offset adjustment potentiometers, P 1 and P2 will
be necessary for most applications where it is desirable to
take advantage of the multiplier's excellent linearity characteristics. Depending upon the particular application, some
of the potentiometers can be omitted (see Figures 17, 19,
a 100 V output, so the scale factor is set to 1/10 and provides
an output scaled down by a factor of ten. For many applications it may be desirable to set K = 1/2 or K = 1 or even
K = 100. This can be accomplished by adjusting AX. Ry
and RL appropriately.
22, 24 and 251.
2.5
The adjustment procedure for the circuit of Figure 16 is:
A. X Input Offset
The selection of R L is arbitrary and can be chosen after
resistors RX and Ry are found. Note in Figure 16 that Ry
is 62 kn while RX is 30 kfl. The reason for this is that the
"Y" side of the multiplier exhibits a second order nonlinearity whereas the "X" side exhibits a simple non-linearity.
By making the Ry resistor approximately twice the value
of the RX resistor, the linearity on both the "X" and "Y"
sides are made equal. The selection of the R X and Ry
resistor values is dependent upon the expected amp I itude of
Vx and Vy inputs. To maintain a specified linearity,
resistors R X and Ry should be selected according to the
following equations:
RX~
3 Vx (max) in kH when Vx is in volts
~
6 Vy (max) in kn when Vy is in volts
Ry
(a) connect oscillator (1 kHz, 5 Vpp sinewave) to the "Y"
input (pin 9)
(b) connect "X" input (pin 10) to ground
(cl adjust X-offset potentiometer, P2 for an ac null at
the output
B. y Input Offset
(a) connect oscillator (1 kHz, 5 Vpp sinewave) to the "X"
input (pin 10)
(bl connect "Y" input (pin 9) to ground
(c) adjust V-offset potentiometer, P1 for an ac null at
the output
C. Output Offset
(al connect both "X" and "Y" inputs to ground
(hi adjust output offset potentiometer,P3, until the output voltage Va' is zero volts dc
For example, if the maximum input on the "X" side is
± 1 volt, resistor RX can be selected to be 3 kH. If the max-
D. Scale Factor
imum input on the "y" side is also ±.1 volt, then resistor
Ry can be selected to be 6 kn (6.2 kn nominal value). If a
scale factor of K 10 is desired, the load resistor is found to
be 47 kn. In this example, the multiplier provides a gain
(a) apply +10 Vdc to both the "X" and "Y" inputs
(b) adjust P4 to achieve -10.00 V at the output
0::
(c) apply -10 Vdc to both "X" and "Y" inputs and check
for Vo " -10.00 V
of 20 dB.
2.2
Operational Amplifier Selection
E. Repeat steps A th rou gh 0 as necessary.
The operational amplifier connection in Figure 16 is a simple
but extremely accurate current-to-voltage converter. The
output current of the multiplier flows through the feedback
resistor RL to provide a low impedance output voltage from
the op-amp!. Since the offset current and bias currents of
the op-amp!. will cause errors in the output voltage, particularly with temperature, one with very low bias and offset currents is recommended. The MC1556/MC1456 or MC1741/
MC1741C are excellent choices for this application.
The ability to accurately adjust the MC1594 is dependent
on the offset adjust potentiometers. Potentiometers should
be of the "infinite" resolution type rather than wirewound.
Fine adjustments in balanced-modulator applications may
require two potentiometers to provide "coarse" and "fine"
adjustment. Potentiometers should have low temperature
coefficients and be free from backlash.
Since the MC1594 is capable of operation at much higher
frequencies than the op-amp!., the frequency characteristics
of the circuit in Figure 16 will be primarily dependent upon
the op-ampl.
2.3
2.6
Temperature Stability
While the MC1594 provides excel/ent performance in itself,
overall performance depends to a large degree on the quality
of the external components. Previous discussion shows the
direct dependence on RX, Ry, and RL and indirect dependence on R 1 (through 11). Any circuit subjected to tempera!ure variations should be evaluated with these effects in mind.
Stabil ity
The current-to-voltage converter mode is a most demanding
application for an operational amplifier. Loop gain is at its
maximum and the feedback resistor in conjunction with
stray or input capacitance at the multiplier output adds additional phase shift. It may therefore be necessary to add
(particularly in the case of internally compensated op-ampls.)
a small feedback capacitor to reduce loop gain at the higher
frequencies. A value of 10 pF in parallel with RL should be
adequate to insure stabil ity over production and temperature
variations, etc.
2.7
Bias Currents
The MC1594 multiplier, like most linear IC's, requires a dc
bias current into its input terminals. The device cannot be
capacitively coupled at the input without regard for this bias
current, If inputs Vx and Vy are able to supply the small bias
current (~0.5 /JA) resistors, R (Figure 16) can be omitted,
If the MC1594 is used in an ac mode of operation and
capacitive coupling is used the value of resistor R can be any
reasonable value up to 100 kS1. For minimum noise and
optimum temperature performance, the value of resistor R
should be as low as practical.
An externally compensated op-amp1. might be employed
using slightly heavier compensation than that recommended
for unity-gain ·operation.
2.8
2.4
Offset and Scale factor Adjustment Procedure
Offset Adjustment
Parasitic Oscillation
When long leads are used on the inputs, oscillation may occur,
In this event, an RC parasitic suppression network similar to
the ones shown in Figure 16 should be connected directly
to each input using short leads. The purpose of the network
The non-inverting input of the op-ampl. provides a convenient
pointto adjust the output offset voltage. By connecting this
point to the wiper arm of a potentiometer (P3), the output
MOTOROLA LINEAR/INTERFACE DEVICES
11-17
III
MC1494L, MC1594L
is to reduce the "0" of the source-tuned circuits which cause
"zeros" is seen in Figures 9 and 10. The reason for this
increase in gain is due to the bypassing of RX and Ry at
high frequencies. Since the Ay resistor is approximately
twice the value of the RX resistor, the zero associated with
the "y" input will occur at approximately one octave below
the zero associated with the '·x'· input. For RX = 30 kn and
Ry = 62 kil, the zeros occur at 1.5 MHz for the "X" input
and 700 kHz for the "y" input. These two measured break·
points correspond to a shunt capacitance of about 3.5 pF.
Thus, for the circuit of Figure 17, the "X" input zero and
"y" input zero will be at approximately 15 MHz and
7 MHz respectively.
the oscillation.
Inability to adjust the circuit to within the specified accuracy
may· be "an indication Of oscillation.
3.
AC OPERATION
3.1
General
For ac operation, such as balanced modulation, frequency
doubler, AGe. etc., the op-ampl. will usually be omitted as
well as the output offset adjust potentiometer. The output
offset adjust potentiometer is omitted since the output will
normally be ac-coupled and the de voltage at the output is
It should be noted that the MC1594 multiplies in the time
domain, hence, its frequency response is found by means
of complex convolution in the frequency (laplace) domain.
This means thatif the ·'x'· input does not involve afrequency,
it is not necessary to consider the "X" side frequency
response in the output product. likewise, for the "y" side.
Thus, for applications such as a wideband linear AGC ampli·
fier which has a dc voltage as one input, the multiplier fre·
quency response has one zero and one pole. For applications
which involve an ac voltage on both the "X" and "Y" side.
such as a balanced modulator, the product voltage response
will have two zeros and one pole, hence. peaking may be
present in the output.
of no concern providing it is close enough to zero volts that
it will not cause clipping jn the Output_waveform. Figure 17
FIGURE 17 - WIDEBAND MULTIPLIER
61k
3k
+15 V -15 V
From this brief discussion, it is evident that for ac applications; (1) the value of resistors RX, Ry and Rl should be
kept as small as possible to achieve maximum frequency
response, and (2) it is possible to select a load resistor RL
such that the dominant pole (Rl, Co) cancels the input zero
(RX. 3.5 pF or Ry. 3.5 pFl to give a flat amplitude characteristic with frequency. This is shown in Figures 9 and 10.
Examination of the frequency characteristics of the "X"
and "y" inputs will demonstrate that for wideband amplifier
applications, the best tradeoff with frequency response and
gain is achieved by using the "Y" input for the ac signal.
'y
1
1
:~ i~" Co
"
I
I
13
51k
_"'w
A
.""".
For ac applications requiring bandwidths greater than those
specified for the MC1594, two other devices are recom'
mended.
For modulator-demodulator applications. the
MC1596 may be used up to 100 MHz. For wideband multi·
plier applications. the MC1595 (using small collector loads
and ac coupling) can be used.
20k
K
~
1
shows a typical ae multiplier circuit with a scale factor K~ 1.
Again, resistor RX and Ry are chosen as outlined in the
previous section, with Rl chosen to provide the required
scale factor.
3.3
The MC1594 multiplier is not slew-rate limited in the ordinary sense that an op-ampl. is. Since all the signals in the
multiplier are currents and not voltages, there is no charging
and discharging of stray capacitors and thus no limitations
beyond the normal device limitations. However, it should
be noted that the quiescent current in the output transistors
is 0.5 mA and thus the maximum rate of change of the output voltage is limited by the output load capacitance by
the simple equation:
The offset voltage then existing at the output will be equal to
the offset current times the load resistance. The output off-
set current of the MC1594 is typically 17 "A and 35 "A
maximum.
Thus, the maximum output offset would be
about 160 mV.
3.2
Slew-Rate
Bandwidth
The bandwidth of the MC1594 is primarily determined by
Slew·Rate
two factors. First, the dominant pole will be determined by
the load resistor and the stray capacitance at the output
terminal. For the circuit shown in Figure 17, assuming a
kn. the bandwidth would be approximately 340 kHz.
at frequencies beyond the breakpoint of the ··zero". The
!>.Vo
0.5x 10-3
!>.T
10 x 10- 12
-- = ~~- = 50 V/"s
would be approximately 3.4 MHz. If the load resistor were
47
10
aT = C
Thus, if Co is 10 pF, the maximum slew-rate would be:
total output capacitance (Col of 10 pF. the 3 dB bandwidth
Secondly, a "zero" is present in the frequency response
characteristic for both the "X" and "Y" inputs which causes
the output signal to rise in amplituda at a 6 dB/octave slope
tJ.V o
This can be improved if necessary by addition of an emitterfollower or other type of buffer.
3.4
Phase-Vector Error
All multipliers are subject to an error which is known as the
phase-vector error. This error is a phase error only and does
not contribute an amplitude error per sa. The phase-vector
"zero" is caused by the parasitiC and substrate capacitance
which is relatad to resistors RX and Ry and the transistors
aaociated with them. The effect of these transmission
MOTOROLA LINEAR/INTERFACE DEVICES
11-18
MC1494l, MC1594l
error is best explained by an example. If the "X" input is
delcribBd in vector notation _
4.
DC APPLICATIONS
4.1
SqUiring Circuit
X=A ~ rJ>
If the two inputs are connected together. the resultant
function is squaring:
and the "V" input is described as
Vo= KV2
V=S4rJ>
where K is the scale factor (see Figure 19),
then the output product wou Id be expected to be
Vo = AS
I(
However, a more careful look at the multiplier's defining
equation will provide some useful information. The output
voltage, without initial offset adjustments is given by:
rJ> lsee Figure 18)
However, due to a relative phase shift between the "X" and
Vo
"Y" channels, the output product will be given by
=KIV. + Vio, -V, off) IVy + Vioy -
Vyoff) + Voo
(See "Definitions" for an explanation of terms).
With Vx
Notice that the magnitude is correct but the phase angle of
the product is in error. The vector. V, associated with this
error is the "phase-vector erro,", The startling fact about
the phase-vector error is that it OCCU rs and actu mu lates much
more rapidly than the amplitude error associated with freQuencv response: In fatt,. relative phase shift of only 0.57°
= Vy = V
(squaring) and defining
ex = Viox - Vx off
tfy = Vioy - Vy off
The output voltage equation becomes
will result in a 1% phase-vector error. For most applications.
this error is meaningless. If phase of the output product is
not important, then neither is the phase-vector error. If
phase is important, such as in the case of double sideband
modulation or demodulation, then a 1% phase-vector error
will represent a 1% amplitude error at the phase angle
of interest.
Va = K
V~ + KVx (EX + fy) + KExfy + Voo
This shows that all error terms can be eliminated with only
three adjustment potentiometers, eliminating one of the input offset adjustments. For instance, if the "X" input offset
adjustment is eliminated, E"x is determined by the internal
offset, Viox, but E"y is adjustable to the extent that the
(Ex + E"yl term can be zeroed. Then the output offset adjustment is used to adjust the Voo term and thus zero the remaining error terms. An ac procedure for nulling with three
adjustments is:
FIGURE 18 - PHASE·VECTOR ERROR
A. AC Procedure:
1. Connect OSCillator (1 kHz. 15 Vpp) to input
2. Monitor output at 2 kHz with tuned voltmeter and
adjust P4 for desired gain (Be sure to peak response
of vol tmeter)
3. Tune voltmeter to 1 kHz and adjust P1 for a minimum
output voltage
AB!.OO
3.5
Circuit Layout
4. Ground input and adjust P3 (output offset) for zero
volts de out
If wideband operation is desired. careful circuit layout must
be observed. Stray capacitance across RX and Ay should be
avoided to minimize peaking (caused by a zero created by
the parallel RC circuit!.
5. Repeat steps 1 through 4 as necessary.
FIGURE 19 - MC1594 SQUARING CIRCUIT
61k
30k
+15 V ·15 V
SOk
22k
lOpF
MCI594L
(MC1494U
14
·v 2
Vo" ~IO
' 'I
510
I
3
6
13
451k.
_J....,.~~
16k
20k
INPUT
OFFSET
P3
-15 V
":"
+15V
MOTOROLA LINEAR/INTERFACE DEVICES
11-19
m
MC1494L, MC1594L
B. DC Procedure:
1. Set Vx = Vy = 0 V and adjust P3 (output offset
potentiometer) such that Vo = 0.0 Vdc
2. Set Vx = Vy = 1.0 V and adjust Pl (Y input offset
potentiometer) such that the output voltage is
-0.100 volts
3. Set Vx = Vy = 10 Vdc and adjust P4 (load resistor)
such that the output vOltage is -10.00 volts
4. Set Vx = Vy = -10 Vdc and check that Va = -10V
Repeat steps 1 through 4 as necessary.
4.2
Should Vx change polarity. the transfer function through
the multiplier becomes inverting. the amplifier has positive
feedback and latch-up results. The problem resulting from
Vx being near zero is a result of the transfer through the
multiplier being near zero. The op-amp!. is then operating
with a very high closed loop gain and error voltages can thus
become effective in causing latch-up.
The other mode of latch-up results from the output voltage
of the op-ampl. exceeding the rated common-mode input
voltage of the multiplier. The input stage of the multiplier
becomes saturated. phase reversal results, and the circuit is
latched up. The circuit of Figure 21 protects against this
happening by clamcing the output swing of the op-ampl. to
approximately ± 10.7 volts. Five-percent tolerance. 1~volt
zeners are used to assure adequate output swing but still
limit the output voltage of the op-ampl. from exceeding the
common-mode input range of the MC1594.
S~tting up the divide circuit for reasonably accurate operation is somewhat different from the procedure for the
multiplier itself. One approach, however, is to break the
feedback loop. null out the multiplier circuit, and then close
the loop.
A simpler approach, since it does not involve breaking the
10t?P (thus making it more practical on a production basis). is:
Divide
Divide circuits warrant a special discussion as a result of their
special problems. Classic feedback theory teaches that if a
multiplier is used as a feedback element in an operational
amplifier circuit, the divide function results. Figure 20 illustrates the theoretical simplicity of such an approach and a
practical realization is shown in Figure 21.
The characteristic "failure" mode of the divide circuit is
latch-up, One way it can occur is if Vx is allowed to go
negative or, in some cases, if Vx approaches zero.
Figure 20 illustrates why this is so. For Vx > 0 the transfer
function through the multiplier is non-inverting. Its output
is fed to the inverting input of the op-ampl. Thus, operation
is in the negative feedback ·mode and the circuit is dc stable.
1. Set Vz = 0 volts and adjust the output offset potentiometer (P3) until the output voltage (Va) remains at
some (not necessarily zero) constant value as Vx is varied
between +1.0 volt and +10 volts.
FIGURE 20 - BASIC DIVIDE CIRCUIT USING MUL TlPLIER
2. Maintain Vz at 0 volts, set Vx at +10 volts and ad·
just the Y input offset potentiometer (PU until Vo = 0
volts.
3. With Vx = VZ, adjust the X input offset potentiometer
(P2) until the output voltage remains at some (not necessarily -10 volts) constant value as Vz = Vx is varied
between +1.0volt and +10 volts.
K VXVy
OR
4. Maintain Vx = Vz and adjust the scale factor potentiometer (AL) until the average value of Va is-10voltsas
Vz = Vx is varied between +1.0 volt and +10 volts.
5. Aepeat steps 1 through 4 as necessary to achieve optimum performance.
·VZ
Vo ~ K Vx
Vz
">--4--_v,
Users of the divide circuit should be aware that the accuracy
to be expected decreases in direct proportion to the denomiFIGURE 21 - PRACTICAL DIVIDE CIRCUIT
3Dk
62k
Vz
r - -....M~----..,..--+-.
<"
m
MZ91.118
OR EOUlY'
lN9618
(1~,5~~~8J ':"
OR EQUIV
Vx
...,
--vx-
-IOYZ
Vo"
+15Y
-15Y
O--......- ..... V,
nator voltage. As a result. if V X is set to 10 volts and 0.5%
accuracy is available, then 5% accuracy can be expected
when Vx is only 1 volt.
In accordance with an earlier statement, Vx may have only
one polarity, positive. while Vz may be either polarity.
4.3
Squar. Aoot
A special case of the divide circuit in which the two inputs
to the multiplier are connected together results in the square
root function as indicated in Figure 22. This circuit too
may suffer from latch-up problems similar to those of the
divide circuit. Note that only one polarity of input is allowed
and diode clamping (see Figure 231 protects against accidental
latch-up.
This circuit too. may be adjusted in the closed-loop mode:
of approximately 20 dB.
1. Set Vz = -0.01 Vdc and adjust P3 (output offset I for
Va = 0.316 Vdc.
It is AGC'd through a 60 dB
dynamic range with the application of an AGC voltage from
o Vdc to 1 Vdc. The bandwidth of the amplifier is determined by the load resistor and output stray capacitance. For
this reason, an emitter·follower buffer has been added to
extend the bandwidth in excess of 1 MHz.
2. Set Vz to -0.9 Vdc and adjust P2 ("X" adjustl for Vo =
+3 Vdc.
3. Set Vz to -10 Vdc and adjust P4 19ain adjustl for Vo ""
+10 Vdc.
5.2
Balanced Modulator
When two·time variant signals are used as inputs, the result-
FIGURE 23 - SQUARE ROOT CIRCUIT
30k
61k
'1
III
P
lO 510
15
13
51k
P3 20k
tl5 V
-IOV
f6
11
-
ITClool
9,10
MCI495
MC1595
(
-
-
11
kO
p,A
ITCliol
MC1495
MC1595
MC1495
MC1595
MO
p,A
-
Ilioxi
6
Frequency Response
3.0 dB Bandwidth, RL = 11 kO
3.0 dB Bandwidth, RL = 50 II (Transconductance Bandwidth)
3° Relative Phase Shift Between Vx and Vy
1% Absolute Error Due to Input-Output Phase Shift
Common Mode Quiescent
Output Voltage
-
Ibx
30
35
20
35
6
114 - 181
Common Mode Gain
(Either Input)
Ro
6
I-~I-~
bx2
,by2
m
-
RINY
8
Input Bias Current
-
-
5.0
10
-
-
MHz
MHz
kHz
kHz
-
Vdc
-
-
dB
-
Vdc
Vpeak
mVN
6.0
7.0
mA
135
170
mW
MC1495L, MC1595L
MAXIMUM RATINGS (TA = +250 C unless otherwise noted)
Svmbol
6V
Value
30
Unit
V12-V9
V4- V a
±(6+113 RX)
±(6+13 Ry)
Vdc
Vdc
Maximum Bias Current
13
113
10
10
mA
Power Dissipation (Package Limitation)
Po
750
5.0
mW
mW/oC
o to +70
°c
°c
Rating
Applied Voltage
(V2-V l. V14-Vl. Vl-V9. Vl-V12. Vl- V 4.
VI-Va. V12-V7. V9-V7. Va-V7. V4- V 7)
Differential Input Signal
Ceramic Package
Derate above T A = +250 C
Operating Temperature Range
Vdc
TA
MC1495
MC1595
-55 to +125
°c
-65 to +150
T stg
Storage Temperature Range
TEST CIRCUITS
FIGURE 4 - LINEARITY (USING NULL TECHNIQUE)
'-~~-1p---t--------+---1P------"""V+ .. tl!iV
10.
3k
10.
MC1741G
(MC1741CG}
10'
>--0""'''' v,
33.
OUTPUT
OFFSET
ADJUST
+------------_I-__________
1;D.,;.tF
---l~
_ _ _ _ _...... V-,,-15V
NOTES'
Adjust "Scale FactorAdJust"toranull in VE.
Thissch!maticforiliustrallvepurputeSonlynOI sJl8cified for lest conditions
FIGURE 5 - LINEARITY (USING X·Y PLOTTER TECHNIQUE)
II
v,
OFFSfTADJUST.
(SfEFIGURES 13& 14)
I
v
X
PLOTTER
X-Y
Y·INPUT
PLOTTER
-15V
MOTOROLA LINEAR/INTERFACE DEVICES
11-27
MC1495L, MC1595L
TEST CIRCUITS (continued)
FIGURE 6 - INPUT AND OUTPUT CURRENT
FIGURE 7 - INPUT RESISTANCE
+32 V
Ry' 15 k RX' 15 k
el '" T.OV (rms)
10 Hz
+32 V
RY'15k RX=15k
1.0 M
4
II
5
9.1 k
I
I.OM
MCI595L
{MCI495L)
'1
'1
11
-=
13.75k
11k
5.0 k
RINX" RrNY "R!
FIGURE 8 - OUTPUT RESISTANCE
~ - 21
~ -=
O.I"F~
0.1 J.iF
-15 V
FIGURE 9 - BANDWIDTH (RL = 11 kQ)
+31 V
Ry '15 k RX '15 k
11
11k
7 13
I.OM
-15V
Ilk
14
+32 V
RY'15k RX'15k
9.1 k
9.lk
11k
'1
RL '11 k
Ilk
Ilk
14
'V
0.1 "F
'I
13.7k
'*
1.0 V (rms)
20 Hz
SCALE
FACTOR
ADJUST.
-15V
-15 V
FIGURE 10 - BANDWIDTH (RL
m
= 50 Q)
FIGURE 11 - COMMON-MODE GAIN and
COMMON·MODE INPUT SWING
VT=+15 V
Ry· 510 RX' 510
15 k
+32 V
15 k
II
Ik
9.1 k
50
50
Vo
~_ O.I"F
K' 40
SCALE
FACTOR
Teo
-=:=
-
A~JUST.
-15 V
t 1.0 mA
Vo
I
ACM • 10 log CMVy
CL<3.0pF
Vo
--t--
-15 V
MOTOROLA LINEAR/INTERFACE DEVICES
11-28
or 10 log CMVx
MC1495L, MC1595L
TEST CIRCUITS (continued)
FIGURE 12 - POWER SUPPLY SENSITIVITY
+32 V
15k
FIGURE 13 - OFFSET ADJUST CIRCUIT
+32 V
15k
v+
9.1 k
2.0 k
Ilk
2.0 k
IN753
6.2 V
Pot II
~OO~I~S~T ADJ - - -
11k
10 k 10 k
4.3 k
13.1k
2.0 k
10 k
s+. I" IVol - Vo211
"v+
-15V
s-. I" IVol -
•
-15V
Vo2l!
"v-
FIGURE 14 - OFFSET ADJUST CIRCUIT {ALTERNATE}
V+
5.1 V
5.1 V
2k
-15V
II
MOTOROLA LINEAR/INTERFACE DEVICES
"-29
MC1495L, MC1595L
TYPICAL CHARACTERISTICS
FIGURE 15 - LINEARITY versus TEMPERATURE
FIGURE 16 - SCALE FACTOR versus TEMPERATURE
2. 0
1.
1.
~
0.11 0
81\.
6"'\,.
1::
~
1.4
~
1.
1.2
"
O~
~ o. 8
E
"'"
~
..............
O. 6
...-
ERY
............
0.10
'"
.
~
~
-r---
K ADJUSTED TO 0.100 AT +25 0 C
0.10 0
~
~
ERX
5~
"-...
0.09 5
O. 4
O. 2
o
-55
c
o
-25
+25
+50
+15
+100
-55
+125
-25
+25
+50
+75
TA. AMBIENT TEMPERATURE lOCI
TA. AMBIENTTEMPERATURE lOCI
,= Vy=±10 VMax
,
Vx ':: Vy:: ±5.0 V Max
Vx
~
0.8
~
~
0.6
~
...
~
0
0.'
~
'"
~
131= 113= 1.0 mAde
13" 113" 1.0 mAde
~
it
0.2
o
10
\
~
6
~
12
--
I--18
14
16
RX OR Ry Ik DHMSI
\
"" '---.......
-
o
4.0
20
6.0
8.0
10
RX OR Ry Ik OHMSI
FIGURE 19 - MAXIMUM ALLOWABLE INPUT VOLTAGE versus VOLTAGE AT PIN 1 OR PIN 7
14
ID
..........
12
1
10
x
8.0
."
..........
,;'
~
>=
~
J
+125
1.0
1.0
~
+100
FIGURE 18 - ERROR CONTRiBUTED BY
INPUT DIFFERENTIAL AMPLIFIER
FIGURE 17 - ERROR CONTRIBUTED BY
INPUT DIFFERENTIAL AMPLIFIER
w
---
..........
MLNIMUM
........
6.0
;......--
...- ..........~
'"
0
X 4.0
;;,.
-- .........--.........--.............
2.0
.................... , ; '
2.0
4.0
~
6.0
...-
........
..........
........ ~
12
14
-- ..--.-
...... ~
.,..
~
RECtMENDED
8.0
IV11
10
DR
12
1V71 {VOLTSI
MOTOROLA LINEAR/INTERFACE DEVICES
11-30
14
16
18
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION
2.1.2 3 dB·Bandwidth and Phase Shift
1. Theory of Operation
The MC1595 fMC1495) is a monolithic. four..quadrant multi~
plier which operates on the principle of variable transconductance.
The detailed theory of operation is covered in Application Note
AN-489. Analysis and Basic Operation of the MC1595. The result
of this analysis is that the differential output current of the multiplier is given by
where fA and '8 are the currents into pins 14 and 2, respectively.
and Vx and Vy are the X and Y input voltages at the multiplier
input terminals.
2. Design Considerations
Bandwidth is primarily determined by the load resistors and
the stray multiplier output capacitance and/or the operational
amplifier used to level shift the output. If wideband operation
is desired, low val ue load resistors and/or a wideband operational
amplifier should be used. Stray output capacitance will depend
to a large extent on circuit layout.
Phase shift in the multiplier circuit results from two sources:
phase shift common to both X and Y channels (due to the load
resistor-.output capacitance pole mentioned above) and relative
phase shift between X and Y channels (due to differences in
transadmittance in the X and Y channels). If the input to output
phase shift is only 0.60 , the output product of two sine waves
will exhibit a vector error of 1%. A 3° relative phase shift between Vx and Vy results in a vector error of 5%.
2.1.3 Maximum Input Voltage
2.1 General
The MC1595 (MC1495) permits the designer to tailor the
VX(max), VY(maxl maximum input voltages must be such
that:
multiplier to a specific application by proper selection of external components. External components may be selected to
optimize a given parameter (e.g. bandwidthl which may in turn
restrict another parameter (e.g. maximum output voltage swingl.
Each important parameter is discussed in detail in the following
paragraphs.
2.1.1 Linearity, Output Error, ERX or ERY
Linearity error is defined as the maximum deviation of out·
put voltage from a straight line transfer function. It is expressed
as error in percent of full scale (see figure below!'
VX(maxl <113 R y
VY(maxl <13 Ry.
Exceedingthisvaluewill drive one side of the input amplifier to
"cutoff" and cause non·linear operation.
Currents 13 and 113are chosen at a convenient value (observ·
ing power dissipation limitation) between 0.5 rnA and 2.0 rnA,
approximately 1.0 mAo Then RX and Ry can be determined by
considering the input signal handling requirements.
For VX(maxl
=
VYlmaxl = 10 volts;
RxoRy>~010kJl.
1.0mA
----,11;------:-: + 1 0
2VXVy
The equation IA -IB
V
= RX R y I 3
2VXVy
is derived from IA - 18
=
2kT
2kT
(RX +Qi131 (Ry + 2kT and R Y
q l 13
P. 2kT
•
q l3
~ ±1.0%.
2kT 02kT 052,n.
Linearity error may be measured by either of the following
methods:
1. Using an X - Y plotter with the circuit shown in Figure 5,
obtain plots for X and Y similar to the one shown above.
2. Use the circuit of Figure 4. This method nulls the level
shifted output of the multiplier with the original input.
The peak output of the null operational amplifier will be
equal to the error voltage, VE(max).
One source of linearity error can arise from large signal non·
linearity in the X and Y·input differential amplifiers. To avoid
introducing error from this source. the emitter degeneration
resistors RX and Ry must be chosen large enough so that non·
linear base--emitter voltage variation can be ignored. Figures 17
and 18 show the error expected from this source as a function
of the values of R X and Ry with an operating current of 1.0 rnA
in each side of the differential amplifiers (i.e., 13 = 113 = 1.0 mAl.
ql13 q l 3
Therefore, with RX = Ry = 10 kn the above assumption is valid.
Reference to Figure 19 will indicate limitations of VX(maxl or
VY(maxl due to V1 and V7. Exceeding these limits will cause
saturation or "cutoff" of the input transistors_ See Step 4 of
Section 3 (General Design Procedure) for further details.
2.1.4 Maximum Output Voltage Swing
The maximum output voltage swing is dependent upon the
factors mentioned below and upon the particular circuit being
considered.
For Figure 20 the maximum output swing is dependent
upon V+ for positive swing and upon the voltage at pin 1 for
negative swing. The potential at pin 1 determines the quies~
cent level for transistors 05, 06, Q7. and aS· This potential
MOTOROLA LINEAR/INTERFACE DEVICES
11-31
m
MC1495l, MC1595l
OPERATION AND APPLICATIONS INFORMATION (continued)
If an ope'rational amplifier is used for level shift, as shown
in Figure 21, the output swing (of the multiplier) is greatly
should b8 related so that negative swing at pins 2 or 14 does
not saturate those transistors. See Section 3 for further information regarding selection of these potentials.
reduced. See Section 3 for further details.
3. General Design Procedure
Selection of component values is best demonstrated by the
following example: assume resistive dividers are used at the X and
Y inputs to limit the maximum multiplier input to ±5.0 volts (Vx '""
FIGURE 20 - BASIC MULTIPLIER
VY[max~fora ± 1O-vo It input IVX' = VY'[maxJI. (See Figure 211.
If an overall scale factar of 1/10 is desired, then
V'
RX
R,
Ry
Rl
v
10
Vx
Vy
i
i
10
10
Therefore, K "'" 4/10 for the multiplier (excluding the divider
network).
"
} v,
14
MC1595L
(MC1495l)
Step 1. The first step is to select current 13 and current 113·
There are no restrictions on the selection of either of these currents
except the power dissipation of the device. 13 and 113 will normally
be one or two milliamperes. Further, 13 does not have to be equal
to 113, and there is normally no need to make them different. For
this example, let
Vo=KVXVy
2Rl
K·-Rx Ryl3
3
'3
= VX' Vy' _12VXI12Vy) = 4/10 VXVy,
a
Rl
t'3
13
'13
To set currents 13 and 113 to the desired value, it is only
necessary to connect a resistor between pin 13 and ground, and between pin 3 and ground. From the schematic shown in Figure 3,
V-
FIGURE 21 - MULTIPLIER WITH OP-AMPL. LEVEL SHIFT
-15V
r--~--.,....---~---+---t-
R,
3k
0.1
"
R,
3k
+15V
~F
D.lp.F
3k
>----e. . . ...-..
MC1741G
(MCl141CG)
MC1595L
(MC1495L)
± IOV
10k
10k
13
12
13k
40k
33k
12k
5k
10k
OUTPUT
OFFSET
SCALE
FACTOR
ADJUST
ADJUST
-=
Y OFFSET
ADJUST
X OFFSET
ADJUST
10k
15k
15k
-15V
+15V
10k
2k
2k
MOTOROLA LINEAR/INTERFACE DEVICES
11-34
v o :-V_X_,~_y
(1)
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION (continued)
?j
x,
5.2 Squaring Circuit
Y and Output Offset Voltages
o
If the two inputs are tied together, the resultant function is
squaring; that is Va = KV2 where K is the scale factor. Note
that all error terms can be eliminated with only three adjustment
potentiometers, thus eliminating one of the input offset adjust·
ments. Procedures for nulling with adjustments are given as
follows:
Output
Offset
Vx
X Offset
--~L+~+---rVy
1. AC Procedure:
(a) Connect oscillator 11kHz, 15 Vpp) to input
(b) Monitor output at 2 kHz with tuned voltmeter
and adjust P3 for desired gain (be sure to peak response
of the voltmeter)
(e) Tune voltmeter to 1 kHz and adjust P1 for a minimum output voltage
(d) Ground input and adjust P4 (output offset I for
zero volts dc output
lei Repeat steps a through d as necessary.
2. DC Procedure:
(a) Set Vx = Vy =' 0 V and adjust P4 (output offset
potentiometer) such that Vo '= 0.0 Vdc
Y Offset
For most de applications, all three offset adjust potentiome-
ters (P1. P2. P4) will be necessary. One or more offset adjust
potentiometers can be eliminated for ae applications (See Figures
28, 29, 30, 31 lIt well regulated supply voltages are available, the offset adjust circuit of Figure 13·i5 recommended. Otherwise. the circuit
of Figure 14 will greatly reduce the sensitivity to power supply
changes.
4.2 Scale Factor
The scale factor, K, is set by P3(F igu[e 21). P3 varies 13 which
inversely controls the scale factor K. It should be noted that
current 13 is one-half the current through R 1. R 1 sets the bias
level for Q5, 06, 07, and Os (See Figure 3), Therefore, to be
sure that these devices remain active under all conditions of input
and output swing, care should be exercised in adjusting P3 over
wide voltage ranges (see Section 3, General Design Procedurel.
(b) Set Vx
~
Vv
~
1.0 V and adjust P1 (V ·input
offset potentiometer) such that the output voltage is
+0.100 volts
(c) Set Vx =' Vy =' 10 Vdc and adjust P3 such that the
output voltage is + 10.00 volts
(dl Set Vx = Vy = -10 Vdc. Repeat steps a through
d as necessary.
4.3 Adjustment Procedures
FIGURE 24 - BASIC DIVIDE CIRCUIT
The following adjustment procedure should be used to null
the offsets and set the scale factor for the multiply mode of
operation. (See Figure 21)
1. X I nput Offset
(al Connect oscillator (1 kHz, 5 Vpp sinewavel to the
"y" input (pin 41
(bl Connect "x .. input (pin 9) to ground
(e) Adjust X offset potentiometer, P2, for an ac null
at the output
2. Y Input Offset
(a) Connect oscillator (1 kHz, 5 Vpp sinewave) to the
"x .. input (pin 9)
(b) Connect "Y" input (pin 4) to ground
Ie) Adjust "v" offset potentiometer, P1,for an ac null
at the output
3. Output Offset
(a) Connect both "X" and "Y" inputs to ground
(b) Adjust output offset potentiometer. P4, until the
output voltage Va is zero volts dc
4. Scale Factor
(a) Apply +10 Vdc to both the "x" and "Y" inputs
(b) Adjust P3 to achieve + 10.00 V at the output.
5. Repeat steps 1 through 4 as necessary.
"1
5.3 Divide Circuit
Consider the circuit shown in Figure 24 in which the multi·
plier is placed in the feedback path of an operational amplifier.
For this configuration, the operational amplifier will maintain
a "virtual ground" at the inverting (-I input. Assuming that the
bias current of the operational amplifier is negligible. then 11 =
12 and
The ability to accurately adjust the MC1595 (MC1495)
depends upon the characteristics of potentiometers P1
through P4. Multi·turn, infinite resolution potentiomet·
ers with low·temperature coefficients are recommended.
5. DC Applications
KVXVv ~ -VZ
The circuit shown in Figure 21 may be used to multiply
signals from de to 100 kHz. Input levels to the actual multiplier are 5.0 V (max). With resistive voltage dividers the maxi·
mum could be very large - however. for this application two·
to-one dividers have been used so that the maximum input
level is 10 V. The maximum output level has also been designed
for 10 V (max).
R2
R1
Solving for Vy,
5.1 Multiply
'>---<>-~""Vy
If
R1
~
-R1 Vz
Vv ~R2 K VX'
(1)
(2)
R2
-VZ
VV~--
KVX
If
R1
~
-VZ
VV~VX '
MOTOROLA LINEAR/INTERFACE DEVICES
11-35
(3)
KR2
(4)
m
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION (continued)
Hence, the output voltage is the ratio of Vz to Vx and provides
adivide function. Thisanalysis is. of course, the ideal condition.
From equation 7, the percentage error is inversely related to
voltage Vz (i.e., for increasing values of VZ, the percentage
error decreases).
A circuit that performs the divide function is shown in
Figure 25.
If the multiplier error is taken into account, the output voltage
is fou nd to be
VY~_[~lvz+ 6E
112 K Vx
•
KVX
Two things should be emphasized concerning Figure 25.
1. The input voltage (V'X) must be greater than zero and
must be positive. This insures that the current out of
pin 2 of the multiplier will always be in a direction compatible with the polarity of Vz.
151
where .o.E is the error voltage at the output of the multiplier.
From this equation, it is seen that divide accuracy is strongly
dependent upon the accuracy at which the multiplier can be
set. particularly at small values of Vy. For example, assume
that R1 = R2, and K == 1/10. Fortheseconditionstheoutput
of the divide circuit is given by:
-10
Vz
106E
Vy=--- +-Vx
Vx
2. Pins 2 and 14 of the multiplier have been interchanged
in respect to the operational amplifiers input terminals.
In this instance, Figure 25 differs from the circuit connec·
tion shown in Figure 21; necessitated to insure negative
feedback around the loop.
A Suggested Adjustment Procedure for the Divide Circuit
161
1. Set Vz
= 0 volts and adjust the output offset potentiometer (P 4) until the output voltage (Va) remains at some
(not necessarily zero) constant value as VX' is varied
between +1.0 volt and +10 volts.
From equation 6, it is seen that only when Vx = 10 V is the
error voltage of the divide circuit as low as the error of the
multiply circuit. For example, when Vx is small, (0.1 volt)
the error voltage of the divide circuit can be expected to be a
hundred times the error of the basic multiplier circuit.
In terms of percentage error,
percentage error
=error
2. Keep Vz at 0 volts, set VX' at +10 volts and adjust the
Y input offset potentiometer (P1) until Va "" 0 volts.
3. Let VX' "" Vz and adjust the X input offset potentiometer (P2) until the output voltage remains at some (not
necessarily - 10 volts) constant value as Vz "" VX' is
varied between +1.0 and +10 volts.
x 100%
actual
4. Keep VX' "" Vz and adjust the scale factor potentiometer
(P3) until the average value of Va is -10 volts as Vz '"
VX' is varied between +1.0 volt and +10 volts.
or from equation (5)'
5. Repeat steps 1 through 4 as necessary to achieve optimum performance.
AE
P.E·O
[1I2]6E
=r 111KVX
] Vz =Ai" vz .
[R2 K
5.4 Square Root
17)
A special case of the divide circuit in which the two inputs to
the multiplier are connected together is the square root function
Vx
II
MOTOROLA LINEAR/INTERFACE DEVICES
11-36
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION (continued)
FIGURE 26 - BASIC SQUARE ROOT CIRCUIT
6. AC Applications
The applications that follow demonstrate the versatility of the
monolithic multiplier. If a potted multiplier is used for these
cases, the results generally would not be as good because the potted
units have circuits that. although they optimize dc multiplication
operation. can hinder ac applications'.
B.1 Frequency doubling often is done with a diode where the
fundamental plus a series of harmonics are generated. However,
extensive filtering is required to obtain the desired harmonic,
and the second harmonic obtained under this technique usually
is small in magnitude and requires amplification.
.
When a multiplier is used to double frequency the second
harmonic is obtained directly, except for a dc term, which can
be removed with ac coupling.
Vz
>---<>-...._V,
Vo=J'l
en
KE2
=:
_
(1
+ cos
2wt).
2
as indicated in Figure 26.
This circuit may suffer from
latch-up problems similar to those of the divide circuit. Note
that only one polarity of input is allowed and diode clamping
A potted multiplier can be used to obtain the double frequency component, but frequency would be limited by its
internal level-shift amplifier. In the monolithic units, the amplifier is omitted.
In a typical doubler circuit, conventional ± 15-volt supplies
are used. An input dynamic range of 5.0 volts peak-to-peak is
allOWed. The circuit generates wave-forms that are double frequency; less than 1% distortion is encountered without filtering.
The configuration has been successfully used in excess of 200
kHz; reducing the scale factor by decreasing the load resistors
can further expand the bandwidth.
'
A slightly modified version of the MC1595 (MC1495) the MC1596 (MC1496) - has been successfully used as a doubler
to obtain 400 MHz. (See Figure 28,)
(see Figure 27) protects against accidental latch-up,
This circuit also may be adjusted in the closed-loop mode as
follows:
1. Set Vz to -0.01 volts and adjust P4 (output offset) for
Va = +0.316 volts. being careful to approach the output
from the positive side to preclude the effect of the out·
put diode clamping.
2. Set Vz to - 0.9 volts and adiust P2 IX adjust) for Vo =
+3.0 volts.
3. Set
Vz
for Va
to -10 volts and adjust P3 (scale factor adjust)
= +10 volts.
6.2 Figure 29 represents an application for the monolithic
multiplier as a balanced modulator. Here, the audio input signal
is 1.6 kHz and the carrier is 40 kHz.
4. Steps 1 through 3 may be repeated as necessary to achieve
desired accuracy.
MOTOROLA LINEAR/INTERFACE DEVICES
11-37
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION (continued)
The defining equation for balanced modulation is
FIGURE 28 - FREQUENCY DOUBLER
Ry
RX
B.2k
B.2k
VCC=+15V
R,
13.0k
Ecoswt
1<5V p_p)
R,
where we is the carrier frequency, wm is the modulator
23.3k
AC couplingat the output eliminates the need for level translation or an operational amplifier; a higher operating frequency
results.
R,
3.3k
14
A problem common to communications is to extract the
1
c,'
'SElECT
6.ak
intelligence from single-sideband received signal. The ssb signal
is of the form
essb "" A cos (we + wmlt
E2
eo "'20COS2W!
and if multiplied by the appropriate carrier waveform, cos wet,
-15V
Whefllwo equal cosine waves are applied 10 X and Y,
the result is a wave shape of Iwicelhe inputfreqlleflcy.
Forthisexampletheinputwasa 10kHlsignel.olltput
was 20 kHz.
FIGURE 29 -
essbecarrier =
BALANCED MODULATOR
Ry
RX
B.H
B.2k
.Jl~F
11
2AK
{cos (2w c + wm)t + cos (Welt].
If the frequency of the band·limited carrier signal, wc, is ascer·
tained in advance the designer can insert a low-pass filter and
obtain the IAK/2) (cos wct) term with ease. He also can use an
operational amplifier for a combination level shift·active filter,
as an external component. But in potted multipliers, even if
the frequency range can be covered, the operational amplifier
is inside and not accessible, so the user must accept the level
shifting provided, and still add a low·pass filter.
+15V
(AI
6.3 Amplitude Modulation
'3k
ey'" Ecoswmt
The multiplier performs amplitude modulation. similar to
balanced modulation, when a dc term is added to the modulating
signal with the Y offset adjust potentiometer, (See Figure 30,)
Rl
23.3k
Rl
3.3k
OFFSET
ADJUST
14
X
·SELECT
6.ak
Here, the identity is
1,·
Em( 1 + m cos wmt) Ec cos wct "" KEmEccos wct +
KEmEcm
- - 2 - - [cos(w c + wm h + cos (wc - wm)tJ
"
where m indicates the degree of modulation. Since m is adjust·
able, via potentiometer P1, 100% modulation is possible. With·
out extensive tweaking, 96% modulation may be obtained where
Wc and wm are the same as in the balanced~modulator example.
·15V
III
fre~
quencyand K is the multiplier gain constant.
OFFSET
ADJUST
(BI
6.4 Linear Gain Control
To obtain linear gain control, the designer can feed to one
of the two MC1595 (MC1495) inputs a signal that will vary the
unit's gain. The following example demonstrates the feasibility
of this application. Suppose a 200 kHz sine wave, 1.0 volt
peak·to-peak. is the signal to which a gain control will be added.
The dynamic range of the control voltage Vc is 0 to +1.0 volt.
These must be ascertained and the proper values of RX and Ry
can be selected for optimum performance. For the 200·kHz
operating frequency, load resistors of 100 ohms were chosen to
broaden the operating bandwidth of the multiplier, but gain was
sacrificed. It may be made up with an amplifier operating at the
appropriate frequency. (See Figure 31.)
MOTOROLA LINEAR/INTERFACE DEVICES
11-38
MC1495L, MC1595L
OPERATION AND APPLICATIONS INFORMATION (continued)
The signal is applied to the unit's Y input. Since the total
FIGURE 30 - AMPLITUDE MODULATION
input range is limited to 1.0 volt pop, a 2.0-volt swing. a current
source of 2.0 mA and an Ry value of 1.0 kilohm is chosen.
Ry
RX
82k
8.2k
This takes best advantage of the dynamic range and insures
linear operation in the Y -channel.
VCC=+15V
11
,
Since the X input varies between 0 and +1.0 volt, the current
source selected was 1.0 rnA and the RX value chosen was 2.0
R,
J.Ok
ey= ECDSwmt
kilohms. This also insures linear operation over the X input
dynamic range.
Choosing RL = 100 assures wide-bandwidth operation. Hence,
the scale factor for this configuration is
Rll
ex = Ecoswmt
2
J.3k
%MODUlATION
RLl
ADJUST
3.3k
14
OFFSET ADJUST
"SELECT
68'
I
1.0.' ::);
C,"
_ _ _1-,-00
_ _ _ V- 1
(2 kit 1 klt2 x 10+ 3 1
"
=
-15 V
~
40
V-1"
IBI
The 2 in the numerator of the equation is missing in this scalefactor expression because the output is single-ended and ac
coupled.
To recover the gain, an MC1552 video amplifier with a gain
of 40 is used. An operational amplifier also could have been
used with frequency compensation to allow a gain of 40 at
200 kHz. The MC1539 operational amplifier can be tailored for
this use; and the MC1520 operational amplifier does it directly.
FIGURE 31 - LINEAR GAIN CONTROL
+12V
2k
1k
10
1.5k
r'f
510
IBI
(AI
1.25
Vin'" I Vp·p
200kHz
m
1.0
O.l/JF
MC1595L
lMC1495L)
l
k~
to
100
50j.(F
100
33
E--eVo
14
12
~
0.75
>
~
0.'
0.25
0.33j.lF
00
13
.
11k
3k
~'"
-12
1
50
"
0.' 0.6 0.8 1.0
VAGC(VOLTS)
NOTE:
linear gain control oi a '·volt peak·tD·p~ak signal is
performed with a O·!o·1·votl control voltage. If VCis
0.5 volt the outpulwill be 0.5 volt p.p
v
MOTOROLA LINEAR/INTERFACE DEVICES
11-39
0.2
1.2
ORDERING INFORMATION
Temperature
Device
MC3456D
MC3456L
MC3456P
MC3556L
NE556D
Alternate
Range
Package
NE556A
O°C to +70°C
O°C to +70°C
O°C to +70°C
- 55°C to + 125°C
O°C to +70°C
SO-14
Ceramic DIP
Plastic DIP
Ceramic DIP
SO-14
MC3456
MC3556
Specifications and Applications
Information
DUAL
TIMING CIRCUIT
DUAL TIMING CIRCUIT
The MC35561MC3456 dual timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation.
Additional terminals are provided for triggering or resetting if
desired. In the time delay mode of operation, the time is precisely
controlled by one external resistor and capacitor per timer. For
astable operation as an oscillator, the free running frequency and
the duty cycle are both accurately controlled with two external
resistors and one capacitor per timer. The circuit may be triggered
and reset on falling waveforms, and the output structure can
source or sink up to 200 rnA or drive MTTL circuits.
SILICON MONOLITHIC
INTEGRATED CIRCUIT
L SUFFIX
CERAMIC P A C K A G E .
CASE 632-08
• Direct Replacement for NE556/SE556 Timers
• Tirning From Microseconds Through Hours
• Operates in Both Astable and Monostable Modes
14
1
• Adjustable Duty Cycle
• High Current Output Can Source or Sink 200 rnA
•
•
•
•
Output Can Drive MTTL
Temperature Stability of 0.005% per °C
Normally "On" or Normally "Off" Output
Dual Version of the Popular MC1455 Timer
FIGURE 1 -
Threshold A 2
13 Discharge B
Contiol A 3
12 Threshold B
Reset A 4
22-SECOND SOUD-STATE TIME DELAY RELAY CIRCUIT
Output B
Trigger B
(Top View)
P SUFFIX
PLASTIC PACKAGE
,~ffMm
O.Ol/LF
II
Time delay It) is variable
by changing Rand C, (See
Figure.16).
1
fiGURE Z -
,.
8.
D SUFFIX
PLASTIC PACKAGE
CASE 751-02
SO-8
,
1
BLOCK DIAGRAM (1/2 SHOWN)
vee
2 (12) 5.0 k
Threshold
Control
TYPICAL APPLICATIONS
1 (13)
Discharge
Voltage
3 (11) 5.0 k
Output
Trigger
6(8) 5.0 k
5 (9)
MOTOROLA LINEAR/INTERFACE DEVICES
11-40
•
•
•
•
•
•
•
•
•
Time Delay Generation
Sequential Timing
Linear Sweep Generation
Precision Timing
Pulse Generation
Pulse Shaping
Missing Pulse Detection
Pulse Width Modulation
Pulse Position Modulation
MC3456, MC3556
MAXIMUM RATINGS IT A
FIGURE 3 - GENERAL TEST CIRCUIT
= +2SoC unless otherwise noted.!
Ratmg
Power Supply Voltage
Discharge Current
Power DIssipation (Package
Symbol
Value
Unit
Vee
+18
Vdc
Idis
200
mA
1000
6.6
625
5.0
mW
mw/oe
mW
mw/oe
Po
Limitation)
Ceramic Dual-lnMLine Package
Derate above T A = +25 0 C
Plastic Dual I n-Line Package
Derate above T A
=
+25 0 C
Operating Ambient Temperature
Range
MC3556
MC3456
TA
Storage Temperature Range
T stg
°c
Test CircuIt for MeasurIng de Parameters
(to set output and measure parameters)
-55 to +125
o to +70
-65 to +150
Vs ...
a
When
b.
When VS"" 1/3
2/3
Vee. Vo
Vee. Vo
IS low.
15 hIgh
When Vo IS lOW, pin 7 sinks current. To tesl tor Reset,
set VO. hIgh, applv Reset VOltage, and t8St for current
°c
flowing Into discharge pIn. When Aeset IS not In USB, It
should be tied to
Vee.
ELECTRICAL CHARACTERISTICS IT A" +2Soc Vee'" +50 V to +15 V unless otherWise noted I
Symbol
Characteristics
Supply Voltage
Vee
upply Current
Vee" 5.0 V. RL
VCC=-15V.AL ~oo
Low State. (Note 1)
MC3456
MC35S6
Min
TyO
'.5
'ce
Tlmmg Error (Note 21
Monostable Mode
RA = 2.0 krl to 100 kU
Initial Accuracy C" a 1 /.IF
Dnft with Temperature
Drift with Supply Voltage
Min
Vh
VT
Trigger Voltage
VCC=15V
VCC" 5.0 V
Trigger Current
'T
VR
Reset Voltage
0.5
30
1.5
100
0.2
0.75
"
%lVolt
"
150
0.3
PPM/oC
%lVolt
2/3
2/3
xVee
V
4.8
5.0
1.67
5.2
1.9
0.'
0.5
0.7
1.0
'R
0.1
-'tn.
0.03
0.1
Vel
10
3.33
10.4
3.8
0.1
0.4
2.0
2.5
0.15
0.5
0.1
0.25
Vee" 5.0 V
V
mA
PPMl"e
50
0.1
2.25
ThreshOld Current INote 3J
Output Voltage Low
(Vec" 15 VI
Isink = 10 mA
Isink'" 50 mA
Isink '" 100 mA
'sink = 200 mA
Unit
0.15
1.45
9.6
2.9
12
30
6.0
20
Control Voltage Level
VCC'" 15 V
Reset Current
M..
t6
10
2.
1.5
90
ThreshOld Voltage
TyO
'.5
6.0
20
0.15
Astable Mode
AA = AB = 2.0 kSl to 100 kH
C = 0.01 ,uF
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
M..
18
5.0
1.67
0.4.
9.0
2.6
0.5
0.7
0.1
1.0
0.03
0.1
10
3.33
11
4.0
0.1
0.4
2.0
2.5
0.25
0.75
0,25
0.35
.A
V
mA
.A
V
VOL
V
2.25
III
2.75
IVee' 5.0 VI
I,ink .. 8.0 mA
I'
• 5.0mA
Output Voltage High
V
VOH
tl lOurce " 200 mAl
Vec"5V
12.5
tllOurce" 100 mAl
VCC" 5V
'
=
Vee
13
3.0
5.0 V
TOQgle Rate (Figures 11. 191
RA = 3,3 kn, RB • 6.8 kn, C = 0.003 .F
,T',
12.75
2.75
I·
IOut~t
.tou-L
.!OttL
t
Matching Characteristics Between Sections
(MonQ1,tablel
Initial Timing Accuracy
Timing Drift with Temperature
Drift with Suoply Vollaae
20
100
20
100
100
1.0
1.0
tl0
0.2
100
100
0.5
:!:10
0.1
NOTES: 1. Supply current IS typically 1.0 mA less for each output which is high.
2. Tested at Vee = 5.0 V and Vce == 15 V.
0.2
3. This will determine the maximum value of RA + RS for
15 V operation. The maximum total R = 20 megohms.
MOTOROLA LINEAR/INTERFACE DEVICES
11-41
13.3
3.3
100
100
oischarQe Leakage Current
F II Time of Out
12.5
13.3
3.3
kHz
tOO
2.0
nA
"
ppm/oe
0.5
%IV
MC3456, MC3556
TYPICAL CHARACTERISTICS
(T A = +25 0 C unless otherwise noted.)
FIGURE 4 - TRIGGER PULSE WIDTH
FIGURE 5 - SUPPLY CURRENT
10
150
125
.~
:c
I-
!::! 75
~
50
it"
25
+2J~ ~ ~
A.~ ~oc
~ 80
..s 100
./
r-
~
o
o
~
--I- rj:
V
V
I-
r-
~
~
~ 6.0
~
~
~ 4.0
~oc
f.:::::: ~ ~
kl0°j.
\ f-+1f~oe
0.1
~2.0
r-r-
~
A.~
-55 0 e
~
2.0
-~50e
1.8
/"
1.6
y
1.4
~
1.2
,;
~ 1.0
~ 0.8
> 0.6
+25 0 C
I-"
/
I
--
+125 0 C
0.4
5 V,.;; Vee';;; 15 V
0.2
o
0.3
0.2
FIGURE 6 - HIGH OUTPUT VOLTAGE
5.0
0.4
o
1.0
15
10
VT(min), MINIMUM TRIGGER VOLTAGE
(X Vee Vdcl
Vcc, SUPPLY VOLTAGE (Vd,1
FIGURE 7 - LOW OUTPUT VOLTAGE
@ Vee = 5.0 Vdc
FIGURE B - LOW OUTPUT VOLTAGE
@ Vee = 10 Vdc
2.0
5.0
10
II
1
20
50
100
'source{mA)
0
0
0
If!
I-
N
-
\
~
\
l"- f-"""
g« 0.995
-
'"
;:;:
w
";::>-
g
;?
0.99 0
5.0
10
2.0
5.0
!250
15
Vee, SUPPLY VOLTAGE (Vdcl
20
-I1.000
- -
l- t--
0.995
-50
-25
0
g
200
;3 150
;::
«
(!J
~
100
100
-55 0 e
--
~e.....-
I
-.......-: ~r
~~
~+250C
oS: r=tOte
].
+25 +50 +75 +100 +125
T A, AMBIENT TEMPERATURE (OCI
MOTOROLA LINEAR/INTERFACE DEVICES
11-42
50
/}
";::
~
0.990
O.98~75
20
FIGURE 12 - PROPAGATION OELAY
versus TRIGGER VOLTAGE
1.010
1.005
10
ISINK, (mAl
300
~
-55 DC
iffiP
+125 DC
0.0 1
1.0
100
1.015
«
;?
0.98 50
50
0
\
+250~
o. 1
FIGURE 11 - DELAY TIME
versus TEMPERATURE
'"~ 1.010
'"
"
~
>
20
J
1.-4
~
-'
o
ISIN K, (mAl
FIGURE 10 - DELAY TIME
versus SUPPLY VOLTAGE
«
1
10
5.0
ISIN K, (mAl
a
~50C
1.0
~50e
0.0 1
1.0
100
-55°C
+25 0 C
o
[t/
o. 1
11
-55 0C--::
q- ~C-f
0
FIGURE 9 - LOW OUTPUT
VOLTAGE @ Vee = 15 Vdc
i'-+100e
5
0
0.1
0.2
0.3
0.4
VT(minl, MINIMUM TRIGGER VOLTAGE
(X Vce 0 Vdcl
MC3456, MC3556
FIGURE 13 - 1/2 REPRESENTATIVE
CIRCUIT SCHEMATIC
Vee
Threshold
'I
II
L _____
Trigger
I
---,
, RESET
Reset
I
Discharge
GND
I,
~,
~-----l
I
I I
i:
"
"
o-;-~1-L~______________________________~
"1-[ _____ .J lOO
GENERAL OPERATION
A reset pin is provided to dischBrge the capacitor thus interrupting the timing cycle. As long as the reset pin is low, the capacitor discharge transistor is turned "on" and prevents the capacitor
from charging. While the reset voltage is applied the digital output
will remain the same. The reset pin should be tied to the supply
voltage when not in use.
The MC3556 is a dual timing circuit which uses as its
timing elements an external resistor - capacitor network. It can
be used in both the monostable (one-shot) and astable modes
with frequency and duty cycle controlled by the capacitor and
resistor values. While the timing is dependent upon the external
passive components, the monolithic circuit provides the starting
circuit, voltage comparison and other functions needed for a complete timing circuit. I nternal to the integrated circuit are two
comparators, one for the input signal and the other for capacitor
voltage; also a flip-flop and digital output are included. The comparator reference voltages are always a fixed ratio of the supply
voltage thus providing output timing independent of supply voltage.
FIGURE 14 - MONOSTABLE CIRCUIT
+Vcc (5 to 15 V)
Monostable Mode
In the monostable mode, a capacitor and a single resistor are
used for the timing network. Both the threshold terminal and the
discharge transistor terminal are connected together in this mode,
refer to circuit Figure 14. When the input voltage to the trigger
comparator falls below 1/3 Vec the comparator output triggers
the flip-flop so that it's output sets low. This turns the capacitor
discharge transistor "off" and drives the digital output to the high
state. This condition allows the capacitor to charge at an exponential rate which is set by the RC time constant. When the
capacitor voltage reaches 2/3 Vce the threshold comparator resets
the flip-flop. This action discharges the timing capacitor and returns the digital output to the low state. Once the flip-flop has
been triggered by an input signal, it cannot be retriggered until
the present timing period has been completed. The time that the
output is !::'igh is given by the equation t :::: 1.1 RA C. Various
combinations of Rand C and their associated times are shown in
Figure 16. The trigger pulse width must be less than the timing
period.
Reset
Vee
4 (10)
5 (9)
14
, - - ' - - - - - - ' - - - , 0 ischarge
1 (13)
Output
6 (8)
1/2 MC3556
1/2 MC3456
Trigger
~:AL
.--:~--
MOTOROLA LINEAR/INTERFACE DEVICES
11-43
0.01 ItF
Gnd
I
Control
Voltage
II
II
MC3456, MC3556
GENERAL OPERATION (continued)
FIGURE 15 - MONOSTABLE WAVEFORMS
FIGURE 17 - ASTABLE CIRCUIT
+VCC(5 to 15 V)
14
VCC
4 (101
RL
Reset
RA
11131
5191
Oischarge
Output
0-
li2 MC3556
1/2 MC3456
6 (81
R8
Trigger
RL
Gnd
t = 50 #s/cm
(RA = 10 kn. e = 0.01 ~F. RL = 1.0 kn • Vee = 15 V)
FIGURE 16 - TIME DELAY
100
/
10
-"
w
u
z
/
/
1.0
""<3
I-
/
;t 0.1
;'i
U
0.01
0.001
./
/
?L )
,"
/
/
10,us
V
lOOps
~
~"
/
V
lL
/
~I--
/
/
/
/
-,fL _,~~o/
-!z: /
Output Voltage
/
10
./
/
-~
/
•
/
/
/
/
1.0 ms
/
/
/
/
/
/
/
/
/
/
/
FIGURE 18 - ASTABLE WAVEFORMS
/
10 ms
100 ms
td, TIME DELAY lsi
1.0
100
10
IP!
iil'-
IRII!1Ii'
'c!apae'tor
liii
VOlta _g ,
IISi!!:ii
"a
t"" 20,...sJcm
(RA = 5.1 k!!. C = 0.01 ~F. RL = 1.0 k!!;
RB = 3.9 kn. Vce = 15 VI
Astable Mode
In the astable mode the timer is connected so that it will
retrigger itself and cause the capacitor voltage to oscillate between
1/3 Vccand 2/3 VCC. See Figure 17.
FIGURE 19 - FREE·RUNNING FREQUENCY
The external capacitor charges to 2/3 Vee through AA and RS
and discharges to 1/3 Vee through RS' By varying the ratio of
these resistors the duty cycle can be varied. The charge and
discharge times are independent of the supply voltage.
100r.:--r.:--,-.;:--,---,----r---r---,
10~-~~--~:--f~--+_---4---4---~
The charge time (output high) is given by: q = 0.695 (RA+RS) C
The discharge time (output low) by: t2 = 0.695 (RS) C
= tl
+ t2
The frequency of oscillation is then: f "'"
~ ;:;
Thusthe total period is given by: T
= 0.695 (RA+2RS)
C
1.44
T (RA+2RB) C
and may be easily found as shown in Figure 19.
The duty cycle is given by: DC ;:;
~ 1.0~-,~~-,_+~~_+~~_f~~_r--4_--~
;:
<3
;t
--+'....-4_--~
~ O.lt--~~-_+~--+~-_f....
u'
~
RA+2RB
0.011----+----f'.:---f....---.p.,.--4"-----P~~
To obtain the maximum duty cycle RA must be as small as
possible; but it must also be large enough to limit the discharge
current (pin 7 current) within the maximum rating of the discharge
transistor (200 mAl.
The minimum value of RA is given by:
f, FREE-RUNNING FREQUENCY (Hz)
R? VCC (Vdc) ;;. VCC (Vdc)
17 (A)
0.2
MOTOROLA LINEAR/INTERFACE DEVICES
11-44
MC3456, MC3556
APPLICATIONS INFORMATION
DUAL ASTABLE MULTIVIBRATOR
This dual astable multivibrator provides versatility not
available with single timer circuits. The duty cycle can be
adjusted from 5% to 95%. The two outputs provide two
phase clock signals often required in digital systems. It
can also be inhibited by use of either reset terminal.
TONE BURST GENERATOR
For a tone burst generator the first timer is used as a
monostable and determines the tone duration when triggered by a positive pulse'at Pin 6, The second timer is
enabled by the high output of the monostable. It is con·
nected as an astable and determines the frequency of
the tone.
FIGURE 20 - TONE BURST GENERATOR
+15 V
Reset
4
14
VCC
RA
13 Discharge
Trigger
Trigger
5 Output
0---1--0--1
6
AS
Reset 10
1
1/2 MC3556
12 Threshold
1/2 MC3556
Discharge
8 Trigger
Control
ThresC1..
C2
hold
Gnd
f=
1,44
(RA + 2RB) C
FIGURE 21 - DUAL ASTABLE MUL TlVIBRATOR
+15 V
Reset
R1
4
Threshold
2
14
+
10 k
10 k
1N914
1N914
Reset
10
Thresh·
5
Output
R2
old
9
Output
II
1/2 MC3556
0.001
6
C1
Control
Voltage
8
Trigger
Trigger
Gnd
11
Output
C2
'T'
'T'
I
I
I
I
Gnd
f
= (R~'!~2)
C for C1
= C2
Duty ,Cycle R 1~2R2
MOTOROLA LINEAR/INTERFACE DEVICES
11-45
MC3456, MC3556
APPLICATIONS INFORMATION (continued)
Pulse Width Modulation
FIGURE 23 - PULSE WIDTH MODULATION WAVEFORMS
(RA = 10 k!1. e = 0.02I'F. Vee = 15 V)
If the timer is triggered with a continuous pulse train in the
monostabie mode of operation, the charge time of the capacitor
can be varied by changing the control voltage at pin 3. In this
manner, the output pulse width can be modulated by applying
a modulating signal that controls the threshold voltage.
FIGURE 22
+ Vee (5
to 15 V)
411~r~
Vee
RL
Reset
Output
o utput
RA
14
Discharge
5(9)
1(13)
1/2·MCJ556
1/2-MC3456
Control
6(8)
C lock
I nput
3(11)
Gnd
7
0.5 ms/cm
C
2(12)
Trigger
t
±
Threshold
Modulatio
Test Sequences
Input
Several timers can be connected to drive each other for sequential timing. An example is shown in Figure 24 where the sequence
is started by triggering the first timer which runs for 10 ms. The
output then switches low momentarily and starts the second timer
which runs for 50 ms and so forth.
FIGURE 24
Vee (5 to 15 V)
27 k
9.1 k
•
VCC
0.011'F
~
1/2-MC3556
~f-J-
1/2·MC3456
~
ge
I1.0I'F
( Trigger
r
Threshold
~
~
1/2-MC3556
0.0011'F
r·OI'F
Load
~I~
Output
Thrp.shold
0.01#
~
~
1/2-MC3556
1/2-MC3456
0.001 IlF
~~I
=
Output
Trigger
t--o-
I1
Gnd
5 O
. I'F
Load
MOTOROLA LINEAR/INTERFACE DEVICES
11-46
Reset
VCC
1/2-MC3456
r
50 k
Reset
O.01IJ F
Trigger
Output
lCh..
27 k
9.1 k
Reset
VCC
Threshold
=
Load
In Brief ...
Linear and Interface Devices. . . . . . .. 12-2
Surface Mount Technology is now being utilized to
offer answers to many problems that have been created
in the use of insertion technology.
Limitations have been reached with insertion packages and PC board technology. Surface Mount Technology offers the opportunity to continue to advance
the State-of-the-Art designs that cannot be accomplished with Insertion Technology.
Surface Mount Packages allow more optimum device
performance with the smaller Surface Mount configuration. Internal lead lengths, parasitic capacitance and
inductance that placed limitations on chip performance
has been reduced.
The lower profile of Surface Mount Packages allows
more boards to be utilized in a given amount of space.
They are stacked closer together and utilize less total
volume than insertion populated PC boards.
Printed circuit costs are lowered with the reduction
of the number of board layers required. The elimination
or reduction of the number of plated through holes in
the board, contribute significantly to lower PC board
prices.
Surface Mount assembly does not require the preparation of components that are common on insertion
technology lines. Surface Mount components are sent
directly to the assembly line, eliminating an intermediate step.
Automatic placement equipment is available that can
place Surface Mount components at the rate of a few
thousand per hour to hundreds of thousands of components per hour.
Surface Mount Technology is cost effective, allowing
the manufacturer the opportunity to produce smaller
units and offer increased functions with the same size
product.
Tape and Reel . . . . . . . . . . . . . . . . . . . .. 12-5
Surface Mount
Technology
Linear and Interface Devices. . . . . . . . . . . . . . . . . 12-2
Tape and Reel
Standard Bipolar Logic, Bipolar Analog and
MOS Integrated Circuits . . . . . . . . . . . . . . . . . . 12-5
Surface Mount
Technology
Linear and Interface
the updated EIA-481A is now on line for the industry's
largest array of op-amps, regulators, interface, data conversion, consumer, telecom and automotive Linear ICs.
All the major bipolar analog fami,lies are now represented in surface mount packaging. Standard SOIC and
PLCC packages are augmented by SOP-S and DPAK for
Linear regulators. In addition, tape and reel shipping to
Device
Function
Package
DAC-08CD,ED
LF347D
LF351D
LF353D
LF412CD
LF441 CD
LF442CD
LF444CD
LM201AD
LM208D,AD
High-Speed 8-Bit Multiplying D-to-A Converter
Quad BIFET Operational Amplifiers
Single BIFET Operational Amplifier
Dual BIFET Operational Amplifiers
Dual BIFET High Power Operational Amplifiers
Single BIFET Low Power Operational Amplifier
Dual BIFET Low Power Operational Amplifiers
Quad BIFET Low Power Operational Amplifiers
General Purpose Adjustable Operational Amplifier
Precision Operational Amplifier
50-16
50-14
. 50-8
50-8
50-8
50-8
50-8
50-14
50-8
50-8
LM211D
LM224D
LM239D,AD
LM258D
LM293D
LM301AD
LM308D,AD
LM311D
LM317LD
LM324D,AD
High Performance Voltage Comparator
Quad Low Power Operational Amplifiers
Quad Single Supply Comparators
Dual Low Power Operational Amplifiers
Dual Comparators
General Purpose Adjustable Operational Amplifier
Precision Operational Amplifier
High Performance Voltage Comparator
Positive Adjustable 100 mA Voltage Regulator
Quad Low Power Operational Amplifiers
50-8
50-14
50-14
50-8
50-8
50-8
50-8
50-8
SOP-8
50-14
LM339D,AD
LM348D
LM358D
LM385D-1.2
LM385D-2.5
LM393D
LM833D
LM2901D
Quad Single Supply Comparators
Quad MC1741 Operational Amplifiers
Dual Low Power Operational Amplifiers
Micropower Voltage Reference Diodes
Micropower Voltage Reference Diodes
Dual Comparators
Dual Audio Amplifiers
Quad Sir;gi" Supply Comparators
50-14
50-14
50-8
50-8
50-8
50-8
50-8
50-14
LM2902D
LM2903D
LM2904D
LM2931AD-5.0,D-5.0
LM2931CD*
LM3900D
MC1377DW'
MC1378FN
MC1403D
MC1413D
MC1436D,CD
MC1455D
Quad Low Power Operational Amplifiers
Dual Comparators
Dual Low Power Operational Amplifiers
Low Dropout Voltage Regulator
Adjustable Low Dropout Voltage Regulator
Quad Single Supply Operational Amplifiers
Color Television RGB to PAUNTSC Encoder
Video Overlay Synchronizer
Precision Low Voltage Reference
Peripheral Driver Array
High Voltage Operational Amplifier
Timing Circuit
MC1458D,CD
MC1458SD
MC1488D
MC1489D
MC1486D
MC1723CD
MC1733CD
MC1741CD
MC1741SCD
MC1747CD
Dual Operational Amplifiers
High Slew Rate Dual Operational Amplifiers
Quad EIA-232C Drivers
Quad EIA-232C Receivers
Balanced Modulator-Demodulator
Adjustable Positive Or Negative Voltage Regulator
Differential Video Amplifier
General Purpose Operational Amplifier
High Slew Rate Operational Amplifier
Dual MC1741 Operational Amplifiers
50-8
50-8
50-14
50-14
50-14
50-14
50-14
50-8
50-8
50-14
MC1776CD
MC26LS31D
Programmable Operational Amplifier
Quad EIA-422/3 Drivers
50-8
50-16
*To Be Introduced.
MOTOROLA LINEAR/INTERFACE DEVICES
12-2
50-14
50-8
50-8
SOP-8
SOP-8
50-14
50-20
PLCC-44
50-8
50-16
50-8
50-8
LINEAR AND INTERFACE (continued)
Device
MC26LS32D
MC2831AD
MC3346D
MC3356FN
MC3357D
MC3359DW
MC3361D
MC3362DW
MC3363DW*
Function
Quad EIA-422 Receivers
FM Transmitter
General Purpose Transistor Array
FSK Receiver
Low Power FM IF Amplifier
Low Power Narrowband FM IF Amplifier
Low Voltage Narrowband FM IF Amplifier
Dual Conversion Receivers
Dual Conversion Receivers
Package
SO-16
SO-16
SO-14
PLCC-20
SO-16
SO-20
SO-16
SO-28
SO-28
Quad EIA-422/3 Receivers
SO-28
SO-16
SO-14
SO-14
SO-8
SO-16
SO-16
SO-16
SO-8
SO-16
MC3487D
MC4558CD
MC4741CD
MC78L05ACD
MC78L08ACD
MC78L12ACD
MC78L15ACD
MC7SM05CDT*
MC7SM12CDT*
MC7SM15CDT*
Quad EIA-422 Drivers
Dual High Frequency Operational Amplifiers
Quad MC1741 Operational Amplifiers
Positive Voltage Regulator, 5 V, 100 rnA
Positive Voltage Regulator, 8 V, 100 mA
Positive Voltage Regulator, 12 V, 100 rnA
Positive Voltage Regulator, 15 V, 100 mA
Positive Voltage Regulator, 5 V, 500 rnA
Positive Voltage Regulator, 12 V, 500 rnA
Positive Voltage Regulator, 15 V, 500 rnA
SO-16
SO-8
SO-14
SOP-8
SOP-8
SOP-8
SOP-S
DPAK
DPAK
DPAK
MC79L05ACD
MC79L12ACD
MC79L15ACD
MC79M05CDT*
MC79M12CDT*
MC79M15CDT*
MC13022DW*
MC13024DW*
MC13041DW*
MC13055D
3-Terminal Negative Fixed Voltage Regulator, -5 V, 100 rnA
3-Terminal Negative Fixed Voltage Regulator, -12 V, 100 rnA
3-Terminal Negative Fixed Voltage Regulator, -15 V, 100 rnA
3-Terminal Negative Fixed Voltage Regulator, -5 V, 500 rnA
3-Terminal Negative Fixed Voltage Regulator, -12 V, 500 rnA
3-Terminal Negative Fixed Voltage Regulator, -15 V, 500 rnA
Medium Voltage AM Stereo C-QUAM Decoder
Low Voltage C-QUAM Receiver
AM Receiver Subsystem
VHF LAN Receiver - FSK
SOP-S
SOP-S
SOP-S
DPAK
DPAK
DPAK
SO-2S
SO-24
SO-20
SO-16
MC13060D
MC33077D
MC3307SD
MC33079D
MC331710
MC33172D*
MC33174D*
MC332S2D*
MC33284D*
MC34001D,AD,BD
1 Watt Audio Amp
Dual, Low Noise High Frequency Operational Amplifiers
Dual Audio, Low Noise Operational Amplifiers
Low Power, Single Supply Operational Amplifier
Single, Low Power, Single Supply Operational Amplifier
Dual, Low Power, Single Supply Operational Amplifiers
Quad, Low Power, Single Supply Operational Amplifiers
Dual Precision Low Input JFET Operational Amplifiers
Quad Precision JFET Operational Amplifiers (Trim-in-the-Package)
Single JFET Input Operational Amplifier
SOP-S
SO-S
SO-S
SO-14
SO-S
SO-S
SO-14
SO-14
SO-14
SO-S
MC34002D,AD,BD
MC34004D,BD
MC34011AFN
MC34012-1D
MC34012-2D
MC34012-3D
MC34013AFN
MC34014FN
MC34017-1D
MC34017-2D
Dual JFET Input Operational Amplifiers
Quad JFET Input Operational Amplifiers
Electronic Telephone Circuit
Telephone Tone Ringer
Telephone Tone Ringer
Telephone Tone Ringer
Speech Network and Tone Dialer
Telephone Speech Network with Dialer Interface
Telephone Tone Dialer
Telephone Tone Dialer
MC34017-3D
MC3401SDW
Telephone Tone Dialer
Voice Switched Speakerphone Circuit
MC3367DW
MC33710*
MC3401D
MC3403D
MC3423D
MC3448AD
MC3450D
MC3452D
MC3458D
MC3486D
Low Voltage VHF Receiver
Low Voltage FM Receiver with RSSI
Quad Operational Amplifiers
Quad Differential-Input Operational Amplifiers
Overvoltage Sensing Circuit
Quad GPIB Transceivers
Quad Line Receivers
Quad Line Receivers
Dual Low Power Operational Amplifiers
*To Be Introduced.
MOTOROLA LINEAR/INTERFACE DEVICES
12-3
SO-S
SO-14
PLCC-44
SO-S
SO-S
SO-S
PLCC-2S
PLCC-20
SO-S
SO-S
SO-S
SO-2S
LINEAR AND INTERFACE (continued)
Device
Function
Package
MC34018FN
MC34060AD*
MC34063AD
MC34071D
MC34072D*
MC34074D*
MC34080D
MC34081D
MC34114DW
MC34118DW
Voice Switched Speakerphone Circuit
Switchmode Pulse Width Modulation Control Circuit
Precision DC-to-DC Converter Control Circuit
Single, High Speed, Single Supply Operational Amplifier
Dual, High Speed, Single Supply Operational Amplifiers
Quad, High Performance, Single Supply Operational Amplifiers
High Speed Decompensated (AVCL .. 2) JFET Input Operational Amplifier
High Speed JFET Input Operational Amplifier
Speech Network II
Speakerphone II
MC34119D
MC34129D
MC34181D
MC34182D
MC34184D
MC44301DW*t
NE592D
TL061CD
TL062CD
TL064CD
Telephone Speaker Amplifier
Power Supply Controller
Single, Low Power, High Speed JFET Operational Amplifier
Dual, Low Power, High Speed JFET Operational Amplifiers
Quad, Low Power, High Speed JFET Operational Amplifiers
High Performance Video IF
Video Amplifier
Single BIFET Low Power Operational Amplifier
Dual BIFET Low Power Operational Amplifiers
Quad BIFET Low Power Operational Amplifiers
SO-8
SO-14
SO-8
SO-8
SO-14
SO-28
SO-14
SO-8
SO-8
SO-14
TL071CD,ACD,BCD
TL072CD,ACD,BCD
TL074CD,ACD,BCD
TL081 CD,ACD,BCD
TL082CD,ACD,BCD
TL084CD,ACD,BCD*
TL431CD
TYA1350D
UAA1041D
UC2842AD
Single, Low Noise JFET Input Operational Amplifier
Dual, Low Noise JFET Input Operational Amplifiers
Quad, Low Noise JFET Input Operational Amplifiers
Single, JFET Input Operational Amplifier
Dual, JFET Input Operational Amplifiers
Quad, JFET Input Operational Amplifiers
Programmable Precision Reference
IF Amplifier (M1350D)
Automotive Direction Indicator
Off-Line Current Mode PWM Controller
SO-8
SO-8
SO-14
SO-8
SO-8
SO-14
SOP-8
SO-8
SO-8
SO-14
UC2843AD
UC3842AD
UC3843AD
Current Mode PWM Controller
Off-Line Current Mode PWM Controller
Current Mode PWM Controller
SO-14
SO-14
SO-14
*To Be Introduced.
tFormerly MC1a01'OW
II
MOTOROLA LINEAR/INTERFACE DEVICES
12-4
PLCC-28
SO-14
SO-8
SO-8
SO-8
SO-14
SO-8
SO-8
SO-18
SO-28
GJ
o
Tape and Reel
Standard Bipolar Logic, Bipolar Analog
and MOS Integrated Circuits
Motorola has now added the convenience of Tape and Reel
packaging for our growing family of standard Integrated Circuit products. Two reel sizes are available, for all but the
largest types, to support the requirements of both first and
second generation pick-and-place equipment. The packaging
fully conforms to the latest EIA'481A specification. The antistatic embossed tape provides a secure cavity, sealed with
a peel-back cover tape.
Mechanical Polarization
SOIC DEVICES
PlCC DEVICES
TYPICAL
TYPICAL
I
I
I
I
I
I
J
I
e-e-e-e-e-e-e-e
'[8[8[8 ,
USER DIRECTION OF FEED
USER DIRECTION OF FEED
per Reel
Reel Size'
(inch)
Tape III Reel
Lot Size(1)
(Min)
Device
Suffix
12
12
750
2,500
7
13
5,000
5,000
R1
R2
50-14
16
16
750
2,500
7
13
5,000
5.000
R1
R2
50-16
16
16
750
2,500
7
13
5,000
5,000
R1
R2
SO-16L (WIDE)
16
16
250
1,000
7
13
5,000
5.000
R1
R2
SO-20L (WIDE)
24
24
250
1,000
7
13
5,000
5.000
R1
R2
SO-24L (WIDE)
24
24
250
1,000
7
13
5,000
5.000
R1
R2
SO-28L (WIDE)
24
24
200
1,000
7
13
3,000
3,000
R1
R2
PLCC-20
16
16
200
1,000
7
13
3,000
3,000
R1
R2
PLCC-28
24
24
200
500
7
13
2,400
2,500
R1
R2
PLCC-44
32
32
200
500
7
13
2,000
2,000
R1
R2
PLCC-52
PLCC-68
PLCC-84
32
44
44
500
250
250
13
13
13
2,000
2,000
2,000
R2
R2
R2
18
1800
13
10,000
RA, RB or RP only
Tape Width
Device
(mm)
SO-8,SOP-8
Package
TO-226AA(2)
..
Notes: 1. Minimum lot size Information applies to OEM customers. Dlstnbutors may break lots or reels at their option, however broken reels may not
be returned.
2. Integrated Circuits in TO-226AA packages are available in Styles A and B only, with optional "Ammo Pack" (Suffix API.
For ordering information please contact your local Motorola Semiconductor Sales Office.
Distribution minimum order quantity is 1 reel.
*Reel Size: 7"/178 mm, 13"/330 mm.
MOTOROLA LINEAR/INTERFACE DEVICES
12-5
MOTOROLA LINEAR/INTERFACE DEVICES
12-6
Packaging Information
IE
Case Outline Dimensions
The packaging availability for each device type is indicated on the individual data sheets and the Selector Guide.
All of the outline dimensions for the packages are given in this section.
The maximum power consumption an integrated circuit can tolerate at a given operating ambient temperature
can be found from the equation:
P
where: PD(TA)
=
-
TJ(max)
=
TA
=
=
ROJA(Typ)
_ TJ(max) - TA
D(TA) ROJA(Typ)
Power Dissipation allowable at a given operating ambient temperature. This must be greater
than the sum of the products of the supply voltages and supply currents at the worst case
operating condition.
Maximum Operating Junction Temperature as listed in the Maximum Ratings Section. See
individual data sheets for TJ(max) information.
Maximum Desired Operating Ambient Temperature
Typical Thermal Resistance Junction to Ambient
K SUFFIX
CASE '-03
Metal Package
ROJA = 450 CIW(Typ)
I I
L I Ir-'-j~
~
-w~
f
K
--I1-02PL
~
~I <1>0.30(0.012)
~
H
t
r,-f.
V'
G
V
t
®Iwl v® I
ItB
_Je~
A
J
K
Q
S
T'
V
0j1i~
SECT.A·A
rl~
~
1
'~
c
N
MOTOROLA LlNEARIINTERFACE DEVICES
13-2
DIM
A
B
c
J
~
0.97
1.09
0.875
0.450
0.043
- 0.135
1.187 BSC
0.430 BSC
0.215 BSC
0.666 BSC
0.312
0.151
0.161
- 0.525
- 0.188
0.151
0.161
3.43
30.15 BSC
10.92 BSC
5.46BSC
16.89 BSC
7!¥J.
3.84
3.84
4.09
13.34
4.76
4.09
-
0.250
0.038
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M,1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO·204AA OUTLINE SHALL APPLY.
H
I
6.35
C
D
E
F
G
G
K
INCHES
MIN
MAX
22.23
11.43
-
D
F
L
MlJMTERS
lIN
MAX
B
H
®Iwl v®I Q ® I
_ --.l
"/
PlANE
~
~
F _
3
SEATING
.-~~rr:
2
G
1+1<1>0.25(0.0101
LP, P, Z SUFFIX
CASE 29-04
Plastic Package
ROJA = 2000 CIW
DIM
K
L
N
P
R
S
MILLIMETERS
MIN
MAX
4.32
5.33
4.45
5.20
3.18
4.19
0.41
0.55
0.41
0.46
1.15
1.39
2.54
2.42
2.66
12.70
6.35
2.04
2.66
2.93
3.43
0.39
0.50
INCHES
MIN
MAX
0.210
0.170
0.175
0.205
0.125
0.165
0.016
0.022
0.019
0.016
0.045
0.055
0.100
0.095
0.105
0.500
0.250
0.060
0.105
0.115
0.135
0.D15
0.020
NOTES:
1. CONTOUR OF PACKAGE BEYOND ZONE "P" IS
UNCONTROLLED.
2. DIM "F" APPLIES BElWEEN "H" AND "L". DIM
"D" & "S" APPLIES BElWEEN "L" & 12.70mm
(0.5"1 FROM SEATING PLANE. LEAD DIM IS
UNCONTROLLED IN "H" & BEYOND 12.70mm
(0.5"1 FROM SEATING PLANE.
3. CONTROLLING DIM: INCH.
G, H SUFFIX
CASE 79-05
Metal Package
ROJA = 185° C/w(Typ)
ti
MII.UMEIERS
w
3/(r
DIM
A
B
C
0
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M.I982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION J MEASURED FROM DIMENSION A
MAXIMUM.
4. DIMENSION B SHALL NOT VARY MORE THAN 0.25
10.0101 IN ZONE R. THIS ZONE CONTROLLED FOR
AUTOMAnc HANDLING.
5. DIMENSION FAPPLIES BElWEEN DIMENSION P
AND L DIMENSION D APPLIES BElWEEN
DIMENSION LAND K MINIMUM. LEAD otAMmR
IS UNCONTROLLED IN DIMENSION PAND
BEYOND DIMENSION K MINIMUM.
E
It I<1>0.3610.0141 ®IT I A ®I H ®I
F
G
H
J
K
L
M
p
R
KC, T SUFFIX
CASE 221 A-04
DIM
A
B
C
0
Plastic Package
R/IJA = 65° C/w(Typ)
T
t r
?J
F
G
H
J
K
L
N
uJ
1 2 3
Q
1·
K
-----1
v
D
R
S
T
U
V
Z
loIN
MAX
9.02
8.01
4.20
0.44
0.44
0.41
9.29
B.50
4.57
0.53
0.88
0.48
5.I18BSC
0.72
0.86
0.74
1.01
12.70
19.05
6.36
45°asc
1.27
2.54
-
MILUMmRS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.84
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.36
0.55
14.27
12.70
1.15
1.39
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
1.27
0.00
1.15
2.04
INCIIfS
MIN
MAX
0.355
0.366
0.315
0.335
0.165
0.180
0.017
0.021
0.035
0.017
0.016
0.019
0.200 asc
0.034
0.028
0.029 0.040
0.500
0.750
0.250
45°asc
-
~
0.100
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.014
0.022
0.500
0.562
0.045
0.055
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.050
0.000
0.045
0.080
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M. 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIM Z DERNES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
T SUFFIX
CASE 3140-01
Plastic Package
Q
ROJA = 65° C/w(Typ)
DIM
A
B
C
D
G
J
I
1 2345
K
Q
II
R
T
U
"
-l1.... J
MOTOROLA LlNEARIiNTERFACE DEVICES
13-3
MlLUMmRS
MIN
MAX
15.49
15.87
9.91
10.41
4.32
4.57
0.51
1.01
1.45
1.96
0.38
0.63
12.70
3.53
3.73
0.89
1.39
9.02
9.39
12.70
13.69
INCHES
MIN
MAX
0.610
0.625
0.390
0.410
0.170
0.180
0.020
0.040
0.057
0.077
0.025
0.G15
0.500
0.139
0.147
0.035
0.055
0.355
0.370
0.500
0.539
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M. 1982.
2. CONTROLLING DIMENSION: INCH.
DT-' SUFFIX
CASE 369-03
Plastic Package
cW~ l f-
s-8~
"
3=#
]-!!U
2 3
V
DTSUFFIX
CASE 369A-03
Plastic Package
DPAK
2
""
e
D
E
F
G
H
J
K
L
S
U
Y
W
Y
MIN
MAX
5.97
6.11
6.35
6.13
1.19
1.38
0.88
0.69
0.91
1.06
0.64
0.88
4.58 8SC
2.29 SSC
6.46
0.58
1.89
2.59
0.89
1.21
5.46
5.21
0.51
0.11
1.14
0.84
0.94
4.32
H, GSUFFIX
CASE 601-04
Metal Package
R8JA = 1600 C/w(Typ)
®I T I
V
W
Y
JEj:-
MILUMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
1.38
0.64
0.88
0.97
1.06
2.29 SSC
0.46
0.58
8.89
9.65
0.89
1.27
5.21
5.46
1.14
0.77
0.84
0.94
1.91
2.18
INCHES
MIN
MAX
0.235 0.245
0.250
0.265
0.086 0.094
0.025
0.035
0.038
0.042
0.090 SSC
0.018
0.023
0.350
0.380
0.035 0.050
0.215
0.205
0.030
0.045
0.033 0.037
0.075
0.090
NOTES:
1. SURFACE "T" IS 80TH ADATUM AND A
MOUNTING SURFACE.
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1981.
3. CONTROLLING DIMENSION: INCH.
-'E
1 l.
'{~ll
-.
w
-~_E
· t
1
2
3
Q:l.:~-F~
~I
A
F
K
t ~~
J~P
! i
1+1"''''®I''~1E
u
Y
~~t
NOTES:
1. SURFACE 'T' IS BOTH ADATUM AND A
MOUNTING SURFACE.
2. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1981.
3. CONTROLLING DIMENSION: INCH.
J:~
MI
•
SfA_
PlANE
8 1
K
l
S
~GI-
,~
INCHES
MIN
MAX
0.235 0.145
0.150 0.165
0.086 0.094
0.027 0.035
0.038 0.042
0.025 0.035
0.180 SSC
0.090 SSC
0.018 0.023
0.102 0.114
0.035 0.050
0.205 0.215
0.020
0.030 0.045
0.033 0.031
0.110
D
E
G
J
~D3PL
It I 01310.0051
3
MIllIMEIBIS
DIM
A
8
e
,.t
~.
,
DIM
A
8
~
~~ ~ ~tJ
jl-D
ol
T
M
0
G0G
~
ZyJ
MOTOROLA LINEAR/INTERFACE DEVICES
13-4
DIM
A
8
C
D
E
F
G
H
J
K
L
M
N
MILUMETERS
MIN
MAX
8.51
9.40
1.15
8.51
4.19
4.70
0.41
0.48
0.15
1.01
0.15
1.02
5.06 SSC
0.11
0.86
0.74
1.14
12.70
3.05
4.06
45° SSC
2.41
2.67
INCHES
MIN
MAX
0.335 0.370
0.305 0.335
0.165 0.185
0.016 0.019
0.010 0.040
0.010 0.040
0.200 esc
0.028 0.034
0.029 0.045
0.500
0.120 0.180
45° SSC
0.095 0.105
NOTE:
1. LEADS WITHIN 0.25 mm 10.0101
DIA OF TRUE POSITION AT
SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
H, G SUFFIX
CASE 603-04
Metal Can
ROJA = 1600 CfW
DIM
A
B
C
D
E
F
G
H
J
K
L
M
P
Q
R
MILUMmRS
INCHES
MIN
MAX
MIN
MAX
8.51
9.39
0.335
0.370
7.75
8.51
0.305
0.335
4.19
0.165
0.185
4.70
0.407
0.533 0,016
0.021
1.02
0.040
0.406 0.483 0,016
0.019
0.230 BSC
5.84 BSC
0.712
0.884 0.028
0.034
0.737
1.14
0.029
0.045
12.70
- 0.500 6.35 12.70
0.250
0.500
36° BSC
JIj" BSC
1.27
0.050
3.56
0.160
4.06 - 0.140
0.010
0.040
0.254 1.02
All JEDfC Dimensions and Notes Apply.
NOTt',
LEADS WITHIN 0.18 mm 10.007) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
G SUFFIX
CASE 603C-01
Metal Can
ROJA = 1500 CfW(Typ)
DIM
A
B
C
D
E
F
G
H
J
K
L
M
P
Q
R
MIUIMETERS
MIN
MAX
8.51
9.39
7.75
8.51
4.19
6.73
0.407 0.533
1.02
0.406 0.483
5.84 BSC
0.712 0.884
0.737
1.14
12.70
6.35 12.70
36" BSC
1.27
3.56
4.06
0.254 1.02
INCHES
MIN
MAX
0.335
0.370
0.305
0.335
0.165
0.265
0,016 0.021
- 0.040
0.016 0.019
0.230 BSC
0.028
0.034
0.029 0.045
0.500
0.250
0.500
36° BSC
- 0.050
0.140 0.160
0.010 0.040
110
NOTtS:
1. LEADS WITHIN O.lB mm 10.007) RADIUS OF TRUE
POSITION TO DIM. "A" & "H" AT SEATING PLANE
AT MAXIMUM MATtRIAL CONDITION.
2. LEAD DIA UNCONTROLLED BEYOND DIM "K" MIN.
(BOTTOM VIEW)
DP2, D, J, N SUFFIX
CASE 620-10
NOTtS:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROlLING DIMENSION: INCH.
3. DIMENSION LTO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.7610.030) WHERE THE
LEAD ENTERS THE CERAMIC BODY.
r-
L
~4)L---.J1I\
u __
~-.K
""
!
~
JLJ16PL
1+10.2510010)
M
®
MOTOROLA LINEAR/INTERFACE DEVICES
13-5
I T I B@I
DIM
A
B
C
D
E
F
G
J
K
L
M
N
MILUMETERS
MIN
MAX
19.05 19.93
6.10
7.49
5.08
0.39
0.50
1.27 BSC
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0°
15°
1.01
0.51
INCHES
MIN
MAX
0.750 0.785
0.240 0.295
- 0.200
0.015 0.020
0.050 BSC
0.055
0.085
0.100 BSC
0,015
0.008
0.125
0.170
0.300 BSC
0°
15"
0.020 0.040
L SUFFIX
CASE 623-05
MIWMETEAS
MIN
MAX
31.24
32.77
15.49
12.70
4.06
5.59
DIM
Ceramic Package
A
B
R6JA = 530 C/w(Typ)
C
D
F
G
0.41
0.51
1.27
1.52
2.54 SSC
0.20
0.30
4.06
3.18
15.24 BSC
15'
0'
0.51
1.27
J
K
L
M
N
INCHES
MIN
MAX
1.230
1.290
0.500
0.610
0.160
0.220
0.G16
0.020
0.050
0.060
0.10Q SSC
0.008
0.012
0.125
0.160
0.600 BSC
15'
0'
0.020
0.050
NOTES:
1. OIM "L" TO CENTER OF
LEADS WHEN FORMED
PARALLEL.
2. LEADS WITHIN 0.13 mm
(0.0051 RADIUS OF TRUE
POSITION AT SEATING PLANE
AT MAXIMUM MATERIAL
CONDITION. (WHEN FORMED
PARALLELI.
DP1, N, P, P1 SUFFIX
NOTES:
1. LEAD POSITIONAL TOLERANCE:
I t I pO.13 (0.0051 ® IT I A ® 18 ® I
2. DIMENSION LTO CENTER OF LEADS WHEN fORMED
PARALLEL.
3. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE
CORNERSI.
4. DIMENSIONS A AND BARE DATUMS.
5. OIMENSIONING ANO TOLERANCING PER ANSI
YI4.5M.1982 .
CASE 626-05
Plastic Package
R6JA = 1000 C/w(Typ)
.~
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
~45
0.38
0.51
1.02
1.52
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
10'
0.76
1.01
DIM
A
8
NOTE.
C
D
F
G
H
J
K
L
M
N
J, F, L SUFFIX
CASE 632-08
Ceramic Package
R6JA = 1000 C/w(Typ)
I"
,..., _ _----<~
"I
'.r-=-r---i~\(~=r=~
t:::::::I~
L±l
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M. 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM FMAY NARROW TO 0.76 (0.0301 WHERE THE
LEAD ENTERS THE CERAMIC BODY.
~--
DIM
A
8
i
I
L-
i,,,
-:J--i JLJ14PL
#
~
----
N
C
D
F
G
J
K
L
M
N
f-:I
tTl0-.2-5(-0.0-'-'0-1®'O:'M'I-T'IB-c(j)""sI
MOTOROLA LINEAR/INTERFACE DEVICES
13-6
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.060
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
10'
0.030
0.040
MILLIMETERS
MIN
MAX
19.05
19.94
6.23
7.11
3.94
5.08
0.39
0.50
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSe
0'
15'
0.51
1.01
INCHES
MIN
MAX
0.750
0.785
0.245
0.290
0.155
0.200
0.015
0.020
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSe
0'
15'
0.020
0.040
N, P, N-14, P2 SUFFIX
CASE 646-06
Plastic Package
ROJA = 100° C/w(Typ)
NOTES:
1. LEADS WITHIN 0.13 mm (0.0051 RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION "L" TO CENTER OF LEADS WHEN
FORMED PARALLEl.
3. DIMENSION "B" DOES NOT INCLUDE MOLD
FLASH.
4 ROUNDED CORNERS OPTIONAL.
DIM
A
D
G
M
N
,.
DIM
A
B
C
D
,
F
G
H
J
K
L
M
N
,_,
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.Q15
0.115
0.135
0.300 BSC
0'
10'
0.Q15
0.039
NOTES:
1. LEADS WITHIN 0.13 mm (0.0051 RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION "L" TO CENTER OF LEADS WHEN
FORMED PARALLEl.
3. DIMENSION "B" DOES NOT INCLUDE MOLD
FLASH.
4. "F" DIMENSION IS FOR FULL LEADS.
5. ROUNDED CORNERS OPTIONAl.
N, P SUFFIX
CASE 648-06
Plastic Package
ROJA = 67° C/w(Typ)
P SUFFIX
CASE 648C-02
Plastic Package
ROJA = 52° e/W
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0'
10'
0.39
1.01
~~~
=:
B
~
~
IJ
~~
f;
~
2J
J
:~'
~
H
L
1
---+j
j L~
r---
1
G
D
~~ ~~~
:?262 BSt:3
~L=J~ 101
?c
N
SEAnN/
PlANE
.
II
~ t--
J
M
INCHES
MIN
MAX
0.740
0.840
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.015
0.095
0.008
0.Q15
0.115
0.135
0.300 BSC
0'
10'
0.Q15
0.040
INCHES
MIN
MAX
0.740
0.840
0.240
0.260
0.185
0.145
0.Q15
0.021
0.040
0.070
0.100 BSC
0.Q15
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0'
10'
0.015
0.040
NO:::
1. LEADS WITHIN 0.13mm (0.0051 RADIUS OF
TRUE POSITON AT SEATING PLANE AT
MAXIMUM MATERIAL CONDITION.
2. DIMENSION "L" TO CENTER OF LEADS WHEN
FORMED PARALLEl.
3. DIMENSION "B" DOES NOT INCLUDE MOLD
FLASH.
\
4. ROUNDED CORNERS OPTIONAl.
~ 5. EXTERNAL LEAD CONNECTION, BETWEEN 4
AND 5,12 AND 13 AS SHOWN.
J
MOTOROLA LINEAR/INTERFACE DEVICES
13-7
MILLIMETERS
MIN
MAX
18.80
21.34
6.10
6.60
DIM
A
~~~
:
MILLIMETERS
MIN
MAX
18.80
21.34
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
0.38
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0'
10'
0.39
1.01
P SUFFIX
CASE 649-03
Plastic Package
ROJA = 90° C/w(Typ)
~i::::::~:::jJ
24
K
L
M
N
-1H~
1
,,~
G
-
r:=L==J
~--f
~ L
~l-----+ --IlJl
NOTES:
1. LEADS WITHIN 0.13 mm 10.0051 RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION "L" TO CENTER OF LEADS WHEN
FORMED PARALLEL.
L SUFFIX
CASE 690-13
Ceramic Package
RIIJA = 100° C/w(Typ)
P
Q
INCHES
MIN
MAX
1.240
1.265
0.520
0.540
0.185
0.205
0.020
0.015
0.040
0.060
0.100 BSC
0.065
0.085
0.012
0.008
0.115
0.135
0.590
0.610
10'
0.020
0.040
0.005
0.015
0.020
0.030
MILLIMETERS
MIN
MAX
32.13
31.50
13.21
13.72
4.70
5.21
0.38
0.51
1.52
1.02
2.54 BSC
2.16
1.65
0.20
0.30
2.92
3.43
15.49
14.99
W
0.51
1.02
0.13
0.38
0.76
0.51
DIM
A
B
C
D
F
G
H
J
D
M
SEATING
j\
\---
PlANE
E[
1
NOTES:
1. ·A· AND ·B· ARE DATUMS.
2. ·T·IS SEATING PLANE
3. POSITIONAL TOLERANCE FOR LEADS 101.
0.25(0.0101®I·T·IA®1
5. DIMENSIONING AND TOLERANCING PER ANSI
o
CASE 762-01
Plastic Medium Power Package
SIP9
RWA = 70° C/w(Typ)
RWC = 15° C/w(Typ)
Y14.5, 1982.
6. CONTROLLING DIMENSION: MILLIMETER.
MlWMETERS
DIM
A
B
C
D
E
F
G
H
J
K
M
N
0
R
S
U
V
W
x
Y
MIN
MIN
0.873
0.252
0.135
0.015
0.368
0.055
o.an
0.062
O.l00Bse
0.059
0.067
0.014
0.155
0.165
3O"BSC
0.099
0.106
0.124
0.135
0.535
0.547
0.064
0.076
0.866
0.874
0.021
0.029
0.113 Bse
0.025
0.029
0.106
0.110
oms
NOTES:
1. DATUMS ·L·, ·M·, ·N·, AND .p. DETERMINED
WHERE TOP OF LEAD SHOULDER EXIT PLASTIC
BODY AT MOLD PARTING UNE.
2. DIM 61, TRUE POSTION TO BE MEASURED AT
DATUM ·T·, SEATING PlANE.
3. DIM RAND U DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE MOLD PROTRUSION
IS 0.25 (0.0101 PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
YI4.5M, 1982.
5. CONTROLUNG DIMENSION: INCH.
FN SUFFIX
CASE nS-02
Plastic Package
PLCC-20
RWA = 72° C/w(Typ)
(5K SQML)
lroo
INCHES
MAX
0.897
0.260
1.143
0.021
MAX
22.40
23.00
6.40
6.60
3.45
3.66
0.40
0.55
9.35
9.60
1.40
1.60
2.54 BSC
1.51
1.71
0.360
0.400
3.95
4.20
3O"BSC
2.50
2.70
3.15
3.45
13.60
13.90
1.65
1.95
22.00
22.20
0.55
0.75
2.89 Bse
0.65
0.75
2.70
2.80
B
YBRK
ItI0.1B10.007l® ITI N®-p®ll®-M®1
1--'
ultI0.1B10,"',® ITIN®-P®ll®-M®1
~
DIM
A
B
C
E
F
f
G
1--'
Gl
ItI 0.25 10.0101 ® ITI N®-p®ll®-M®1
~---~-t-AltI0.1810.007l® ITll®-M®IN®-P®1
"ItI01s/Ooo71®
VIEWOoD
ITll®-M®IN~P®1 H
T L®-M® N@-P®
",01810007l®
... O1S/00071® T N®-P® l®-M®
H
J
K
R
U
V
W
X
Y
Z
Gl
Kl
Z1
DETAIL S
DETAILS
Gl
Itl.2SIO.0101® ITll®-M®1 N®-p®1
MOTOROLA LlNEARIINTERFACE DEVICES
13-16
MlLUMETERS
MIN
MAX
10.03
9.7B
9.7B
10.03
4.57
4.20
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
0.64
8.89
9.04
8.B9
9.04
1.07
1.21
1.07
1.21
1.07
1.42
0.50
20
10"
7.88
8.38
1.02
10"
20
-
-
INCHES
MIN
MAX
0.385
0.395
0.385
0.395
0.155
0.180
0.090
0.110
0.013
0.019
0.050 BSC
0.026
0.032
0.020
0.025
0.350
0.356
0.350
0.356
0.042
0.048
0.042
0.049
0.042
0.056
0.020
0
2
10"
0.310
0.330
0.040
20
100
FN SUFFIX
CASE 776-02
Plastic Package
PLCC-28
ROJA = 66° C/w(Typ)
(5K SQML)
l~
NOTES:
1. DUE TO SPACE UMITATION, CASE
776-02 SHALL BE REPRESENTED BY A
GENERAL (SMALLER) CASE OUTLINE
DRAWING RATHER THAN SHOWING
ALL 2B LEADS.
B 1-+10.18(0.007) ® iTl N@-p®IL®-.",!>1
VIRK
1----
e.- ..
r--
u
1.. lo.18(O.0071@) IrIN@-P®IL-MC!>1
2. DATUMS ·L-, -M-, -N-, AND -P- DETERMINED
WHERE TOP OF LEAD SHOULDER EXIT PLASTIC
BODY AT MOLD PARTING LINE.
3. DIM Gl, TRUE POSITION TO BE MEASURED AT
D.ATUM -T-, SEATING PLANE.
4. DIM RAND U 00 NOT INCLUDE MOLO
PIIOTRUSION. ALLOWABLE MOLD PROTRUSION
IS 0.25 10.010) PER SIDE.
5. DIMENSIONING ~ND TOLERANCING PER ANSI
Y14.5M,1982.
6. CONTROLLING DIMENSION: INCH.
NOTE •
LEADS
ACTUAL
DIM
A
B
1----
C
E
F
G
H
J
K
R
U
V
W
X
y
2
G1
Kl
21
1. DUE TO SPACE LlMITA110N, CASE
SHALL BE REPRESENTED BY A
GENERAL (SMALLER) CASE OUTLINE
DRAWING RATHER THAN SHOWING
ALL 44 LEADS.
m.oz
(10K SQML)
E-.
r-
......
ACTUAL
,..
INCHES
MIN
MAX
0.485
0.495
0.485
0.495
0.165
0.180
0.090
0.110
0,013
0.019
O.Il5OBSC
0.026
0.032
0.020
0.025
0.450
0.456
0.450
0.456
0.042
0.048
0.042
0.048
0.042
0.056
0.020
2'
10'
0.410
0.430
0.040
1"
10'
NOTES:
FN SUFFIX
CASE 777-02
Plastic Package
PLCC-44
R8JA = 55° C/w(Typ)
lrrn
MlLLIM£TERS
MIN
MAX
12.32
12.57
12.57
12.32
4.20
4.51
2.29
2.79
0.48
0.33
1.27BSC
0.66
0.81
0.51
0.64
11.43
11.58
11.43
11.58
1.21
1.07
1.07
1.21
1.07
1.42
0.50
1"
10.42
10.92
1.02
2'
10'
.1+1.18IO.1I071@I,IN$ J L""0" J
0.080-0.093
MOUNT ON BACK OF CHASSIS
NO.6 SHEET METAL SCREW
B51564F003
lIm
++-+--;c:-;;;-;-.-.-ch¥'--
1.00
1.30
BACK TEMPLATE
B51087A002
0.500 ± 0.031
@
0.695
O.06TYP--1
0.13
1.i87
FRONT TEMPLATE
651087AOOl
MOTOROLA LINEAR/INTERFACE DEVICES
13-19
®
MOUNTING
HARDWARE
TO-220AB
MOTOROLA
PREFERRED ARRANGEMENT
ALTERNATE ARRANGEMENT
for Isolated or Non-isolated
Mounting. Screw is at Semiconductor Case Potential.
when Screw must be at
6·32 Hardware is Used.
4-40 Hardware is Used.
Choose from Parts Listed
Use Parts Listed Below.
for Isolated
Mount~J,g
Heat-Sink Potential.
Below. . .
•UH"H"D~'. JIjj~
4-40 HEX HEAD SCREW
B094B9A034
B094B9A035
I
CASE 221A-04
PLASTIC PACKAGE
I
i
RECTANGULAR STEEL
WASHER(I)
/NYLON INSULATING BUSHING
/
851547F019
~
B09002AOOI
..........
SEMICONDUCTOR
""""[)=r::~=::::::::J
SEMICONDUCTOR
(CASE
221, AB
221A)
TO-220
(CASE 221, 221A)
I
"c=::::::=::=::::::=-____.J
/
/
"
>
.
RECTANGULAR MICA
INSULATOR (2)
BOBB53AOOI
[1'=r==~~==I:==========::J
HEATSINK
"
~r----'
'--~~""
NYLON BUSHING (2)
B51547FOO5
" " RECTANGULAR
MICA INSULATOR
B08853AOOI
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIM Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
HEATSINK
"--.. .--~'-----,
FLAT WASHER (3)
B51567F036
'"
L..~_---,c,...Li_L,..;
./
COMPRESSION WASHER
B52200FOO5
./
COMPRESSION 0'
L~;2~:~~:R (4),,""~--""":'-'--(7
6-32 HEX NUT.............
B09490A006
.............
I'
r-(j"---!-;::-'-X----j
II
11)
(2)
(3)
(4)
B
C
D
F
G
_ _ _ _ _ _ _ _ _ 4·40 HEX NUT
B09490A005
I
DIM
A
H
J
K
L
N
Q
Used with thin chassis andlor large hole.
Used when isolation is required.
Required when nylon bushing and lock washer are used.
Compression washer preferred when plastic insulating
material is used.
TORQUE REQUIREMENTS
Insulated 0.68 N-M (8 in-Ibs) max
Noninsulated 0.9 N-M (8 in-Ibs) max
MOTOROLA LINEAR/INTERFACE DEVICES
13-20
R
S
T
U
V
Z
MILLIMETERS
MIN
MAX
INCHES
MIN
MAX
14.48
9.66
4.07
0.64
3,61
2.42
2.80
0.36
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
0.570
0.380
0,160
0.025
0,142
0.095
0.110
0.014
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
-
15.75
10.28
4.82
0.88
3.73
2,66
3.93
0.55
14.27
1.39
5.33
3.04
2.79
1.39
6.47
1.27
-
2.04
-
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.022
0.562
0.055
0.210
0.120
0.110
0.055
0.255
0.050
-
0.080
MOUNTING HARDWARE TO-220AB
(DIMENSION _ MILLIMETER)
INCH
MICA INSULATOR
BOB853Aool
3.05-3.28
~
l,., -'"
'~
··"··. ·W
3"'3 .•
!
i
i
I
8.20·8.46
--1
i
.,
13.84-14.10
0.545·0.555
j
1.02-1.40
0.323.0.33:~0.040-0.055
-c=:===s
3.68-3.89
Ll----+---:-:--::-::-:-:-::-
0.36&-0.37~
-c=:===s L
~:~~:~4:J.::
1.02-1.40
0.040-0.055
STEEL COMPRESSION
WASHER
B52200F005
STEEL COMPRESSION
WASHER
1-_-+_.,....:4,:.:.9,,-7-_6:;:.2=.:3=-,0.196-0_201
21.43-21.17
HEX HEAD SCREW
CARBON STEEL
CADMIUM-PLATED
(See table below.)
HEX NUT
CARBON STEEL
CADMIUM-PLATED
0.046-0.086
~ 0.0018-0.0034
0.844-0_833
B52200F004
RECTANGULAR
STEEL WASHER
B09002AOOl
,-
NYLON
INSULATING BUSHING
(See table below.)
00. · "
3.58-3.68
I ...: ....
r
0.400-0.410
Iii
I~,';~~
1-.1
I
1.51-1.72i]"
0.0595-0.0680
c
DIMENSIONS -
MILLIMETER (INCH)
NYLON BUSHING
PART NO.
DIMA
DIMB
DIMe
DIM D
DIME
B51547F005
9.40-9.65
(0.370-0.380)
3.84-4.09
(0.151-0.161)
2.16-2.41
(0.085-0.095 )
6.10-6.35
(0.240-0.250)
1.02-1.27
(0.040-0.050)
B51547F019
5.59-6.10
(0.220-0.240)
3.05-3.15
(0.120-0.1 24)
1.73-1.91
(0.068-0.075)
3.61-3.68
(0.142-0.145)
0.51-0.64
(0.020-0.025)
HEX NUT
TYPE
PART NO.
DIMG
DIMH
DlMJ
DIMK
4-40
B09490A005
6.12-6.35 (0.241-0.250)
6.98-7.34 (0.275-0.289)
2.21 -2.49 (0.087-0.098)
2.84 NOM (0.112 NOM)
6-32
B09490A006
7.67-7.92 (0.302-0.312)
8.74-9.17 (0.344-0.361)
2.59-2.90 (0.102-0.114)
3.50 NOM (0.138 NOM)
HEX HEAD SCREW
TYPE
PART NO.
DlMM
DIMN
DIMP
DIMQ
DIMR
4-40
B09489A034
0.112-40
1.57 (0.62)
1 .24-1 .52 (0.049-0.060)
5.13 MIN (0.202 MIN)
4.60-4.75 (0.181-0.187)
6.32
B09489A035
0.138-32
1.57 (0.62)
2.03-2.36 (0.080-0.093)
6.91 MIN (0.272 MIN)
6.20-6.35 (0.244-0.250)
MOTOROLA LINEAR/INTERFACE DEVICES
13-21
SOIC MINIATURE IC PLASTIC PACKAGE
Thermal Information
The maximum power consumption an integrated circuit can tolerate at a given
operating ambient temperature, can be found from the equation:
_T:JJ(..",m.:::a::.!.x)l---_T.:...::A
ROJA (Typ)
P(DT ) A Where: PD(TA)
TJ(max)
= power dissipation allowable at a given operating ambient temperature.
=
Maximum operating junction temperature as listed in the maximum ratings
section
TA = Desired operating ambient temperature
ROJA(Typ) = Typical thermal resistance junction to ambient
Maximum Ratings
Symbol
Value
Unit
Operating Ambient Temperature Range
TA
o to +70
-40 to +85
°C
°C
Operating Junction Temperature
TJ
150
°C
Tstg
-55 to + 150
°C
Rating
Storage Temperature Range
200
180
160
G"IW
8J A
I
140
P.C. BOARD HEATS1NK EXAMPLE
I
I
I
120
I
I
:~~~:~~N~ 6~~AIL
100
SO-8
SOP-8'
MAX DIE SIZE
8K MILS2
SO-14
120
CO/W
SO-16
PACKAGE STYLE
'JA
'0
DATA TAKEN USING PHILIPS SO TEST BOARD #7322-078, 80873
'SOP-S USING STANDARD 80-8 FOOTPRINT - MIN PAD SIZE
40
TOP
Figure 1. Thermal Resistance, Junction-toAmbient ("elW)
VIEW
10
20
L-
30
40
50
LENGTH OF COPPER FLAG
Figure 2. Thermal Resistance for SOP-8
Package Die 2K mils2
THERMAL RESISTANCE OF SOIC PACKAGES
Measurement specimens are solder mounted on a Philips SO test board #7322-078,
80873 in still air. No auxiliary thermal conduction aids are used. As thermal resistance
varies inversely with die area, a given package takes thermal resistance values between
the max and min curves shown. These curves represent the smallest (2000 square mils)
and largest (8000 square mils) die areas expected to be assembled in the sOle package.
MOTOROLA LINEAR/INTERFACE DEVICES
13-22
Quality and
Reliability Assurance
11'1
11M
Quality Concepts
ification range for a given characteristic). When Six Sigma is
achieved, virtually zero defects are observed in the output of
a process/product even allowing for potential process shifts
(Figure 1).
The word Quality has been used to describe many things,
such as fitness for use, customer satisfaction, customer
enthusiasm, what the customer says quality is, etc. These
descriptions convey important truths, however quality should
be described in a way that precipitates immediate action. With
that in mind quality can be described as reduction of variability around a target, so that conformance to customer
requirements/expectations can be achieved in a cost
effective way. This definition provides direction and potential
for immediate action for a person desiring to improve quality.
Quality Improvement for a task or a process can be quickly
described in terms of the target, current status with respect
to target (variability), reduction of variability (commitment to
never ending improvement), customer requirements (who
receives output, what are person's requirements/expectations) and economics (cost of nonconformance; loss function,
etc.).
The definition of quality as described above can be applied
to a task, process or a whole company. If we are to reap the
benefits of quality and obtain a competitive advantage, quality
must be applied to the whole company.
Application of quality to the whole company has come to
be known by such names as "Total Quality Control" (TQC);
"Company Wide Quality Control" (CWQ(:);" Total Quality
Excellence" (TQE); "Total Quality Involvement" (TQI).
These names attempt to convey the idea that quality is a
process (a way of acting continuously) rather than a program
(implying a beginning and an end). Neverthlilless for this process to be successful it must be able to show measurable
results.
Implementation of quality ideas, company, wide requires a
quality plan showing: A philosophy (belief) of operation,
measurable goals, training of individuals and methods of
communicating this philosophy of operation to the whole
organization.
Motorola, for example, believes that quality and reliability
are the responsibility of every person. Participative Management Program (PMP) is the process by which problem
solving and quality improvement are facilitated at all levels
of the organization. Continuous, !mprovement for the individual is facilitated by a broad educational program covering
on-site, university and college courses. The Mqtorola Training and Education Center (MTEC) provides leadership and
administers this educational effort on a company wide basis.
Another key belief is that quality excellence is accomplished by people doing things right the first time and
committed to never ending improvement. The Six Sigma
(6u) challenge is designed to convey and facilitate the idea
of continuous improvement at all levels.
"Six Sigma is the required capability level to approach the
standard. The standard is zero defects. Our goal is to be
Best-In-Class in product, sales and service." (For a more
detailed explanation, contact your Motorola Representative
for a pamphlet of the Six Sigma Challenge.)
Quick insight into Six Sigma is obtained if we realize that
a Six Sigma process has variability which is one half of the
variation allowed (tolerance; spread) by the customer requirements (i.e. natural variation is one half of the customer spec-
Mean
Six Sigma Capability
VlrtuaUy
Zero Defects
(3.4 ppm)
\
FIGURE 1 -
A SIX SIGMA PROCESS HAS viRTUAllY ZERO
DEFECTS AllOWING FOR 1.5u SHIFT
Policies, objectives and five year plans are the mechanisms for communicating the key beliefs and measurable
goals to all personnel and continuously keeping them in focus.
This is done at the corporate, sector, group, division, and
department levels.
The Analog Division, for example, evaluates performance
to the corporate goals of 10 Fold Improvement by 1969;
100 Fold Improvement by 1991 and achievement of Six
Sigma capability by 1992 by utilizing indices such as Outgoing Electrical and Visual Mechanical Quality (AOQ) in
terms of PPM (parts per million or sometimes given in 'parts
per billion'); % of devices with zero PPB; product quality
retums (RMR); number of processes/products with specified
capability Indices (cp; cpk); Six Sigma capability roadmaps; failure rates for various reliability tests (operating
life, temperature humidity bias, hast, temperature cycling,
etc.); on til11& delivery; customer product evaluation and
failure analysis turnaround; cost of nonconformance;
productivity Improvement and personnel development.
Figure 2 shows the improvement in electrical outgoing quality for bipolar analog products oV\lf retent years in a normalized form.
Documentation control is an important part of statistical
process control. Process flow charting with documentation
identified allows visualization and therefore optimization of
the process. Figure 4 shows a portion of a flow chart for
Wafer Fabrication. Control plans are,· an important part of
Statistical Process Control, these plans identify in detail critical points where data for process control is taken, parameters
measured, frequency of measurements, type of control
device used, measuring equipment, responsibilities and reaction plans. Figure 5 shows a portion of a control plan for wafer
fabrication. These flow charts and control plans exist for all
product flows.
Six Sigma progress is tracked by roadmaps. A portion of
a roadmap is shown for example on Figure 6.
On Time Delivery is of great importance, with the current
emphasis on just-in-time systems. Tracking is done on an
overall basis, and at the device level.
MOTOROLA LINEAR/INTERFACE DEVICES
14-2
100
..
90
..
80
..
70
..
60
..
50
..
40
..
30
..
20
..
10
..
80 .
82
81
FIGURE 2 -
83
84
85
OUTGOING ELECTRICAL OUALITY (AOO) TREND/NORMALIZED 1980
0.6
0.26
86
87
= 100%
-
IOIJIFIMIAIMIJIJIAISIOINIOIJIFIMIAIMIJIJIAlslolNlol
ROLLING 13 WEEK ENOING NOV. '87
ZERO PPB
lK-99K PPB
l00K-499K PPB
500K-999K PPB
-+ l000K PPB
~
~
EZZl
k2'Z:22l
~
FIGURE 3 -
PERCENT (%) OF DEVICES WITH ZERO PARTS PER BILLION (AOO)
MOTOROLA LINEAR/INTERFACE DEVICES
14-3
PROCESS CONTROL PLAN
DOCUMENTATION &
REFERENCE #
OPERATION
FLOW
SPC
IMPLEMENTATION
BURIED LAYER OXIDE
PREDIFFUSION CLEAN
WAFER INSPECTION AFTIER CLEAN
12MSM 45640A
12MSM 53692A
BURIED LAYER OXIDE
NANOSPECIAFTER DEP.
CVPLOTTING
CV EVALUATION
12MSM 35443A REF. #1
12MSM 5141BA
12MSM 53B05A
12MRM 4548BA
CONTROL PLAN, OXIDE THICKNESS
12MSM 51416A REF. #10
X BAR & R, RESIST THICKNESS
BURIED LAYER PHOTO MASK
WAFERTRAC PROCESS
(SCRUBIBAKEICOATIBAKE)
FIGURE 4 -
PORTION OF A PROCESS FLOW CHART FROM WAFER FAB, SHOWING DOCUMENTATION CONTROL AND SPC
Characteristics:
Description
VISUAL DEFECTS
VISUAL DEFECTS ... MICROSCOPE
PARTICLE ... MONITOR
FILM THICKNESS
Parl/Process
Detail
Measuremenls
Method
B.L. OXIDE
D
OXIDE
THICKNESS
NANOMETRIC
EPI
D
THICKNESS
QA
D
E
QA
FIGURE 5 -
Rei.
No.
Description
FILM SHEET RESISTANCE
REFRACTIVE INDEX
CRITICAL DIMENSION
CVPLOT
Code
E.
F.
G.
H.
Characteristic
Affected
Process
Location
III
Code
A.
B.
C.
D.
Analysis
Melhods
Frequency
Sample Size
Reaction Plan:
Point out of
Lim" (3) (4)
CONTROL
GRAPH
EVERY RUN
3 WFAIRUN
IMPOUND LOT 11)
ADJUST TIME TO
CENTER PROCESS
PER SPEC
DIGILAB
X
RCHART
EVERY RUN
SSITEStWFR
IMPOUND LOT (1)
NOTIFY ENGR.
THICKNESS
DlGILAB
X RCHART
1WFAISHIFT
5SITEStWFR
IMPOUND LOT (2)
NOTIFY ENGR.
FILM
RESISTIVITY
4PTPROBE
X RCHART
EVERY RUN
5SITEStWFR
IMPOUND LOT (1)
NOTIFY ENGR.
RLM
4PTPROBE
X
1WFAISHIFT
5SITEStWFR
IMPOUND LOT (2)
NOTIFYENGR.
EVERY LOT
1 CTRLWFR
PER LOT
IMPOUND LOT
NOTIFYLI'!:)'
RCHART
".....
PART OF A WAFER FAB CONTROL PLAN, SHOWING STATISTICAL PROCESS CONTROL DETAILS
MOTOROLA LINEAR/INTERFACE DEVICES
14-4
±6uSummary
Step
1. Identify critical characteristics
•
•
•
•
•
2. Determine specified product elements
contributing to critical characteristics
•
•
•
•
3. For each product element, determine
the process step or process choice
that affects or controls required performance
•
•
•
•
•
Planned experiments
Computer-aided simulation
TOP/process engineering studies
Multi-vari analysis
Comparative experiments
4. Determine maximum (real) allowable
tolerance for each and pr
•
•
•
•
Graphing techniques
Engineering handbooks
Planned experiments
Optimization, especially response surface methodolopv
FIGURE 6 -
Product description
Marketing
Industrial Design
R&D/Developmental Engineering
Actual or potential customers
Critical Characteristics Matrix
Cause-and-effect and Ishikawa diagrams
Success tree/fault tree analysis
Component search or other forms of planned
experimentation
• FMECA (Failure Mode Effects and Critical Analysis)
PART OF SIX SIGMA (6u) ROADMAP SHOWING STEPS TO SIX SIGMA CAPABILITY
Reliability Concepts
fidence level is obtained from the point estimate and the CHI
square (X2) distribution. (The X2 is a statistical distribution
used to relate the observed and expected frequencies of an
event.) In practice, a reliability calculator rule is used which
gives the failure rate at the confidence level desired for the
number of failures and device hours under question.
As the number of device hours increases, our confidence
in the estimate increases. In integrated circuits, it is preferred
to make estimates on the basis 01 failures per 1,000,000,000
(109 ) device hours (FITS) or more. " such large numbers of
device hours are not available for a particular device, then
the point estimate is obtained by pooling the data from
devices that are similar in process, voltage, construction,
design, etc., and for which we expect to see the same failure
modes in the field.
The environment is specified in terms of the temperature,
electric field, relative humidity, etc., by an Eyring type equation of the form:
Reliability is the probability that a Linear integrated circuit
will perform its specified function in a given environment for
a specified period of time. This is the classical definition of
reliability applied to Linear integrated circuits.
Another way of thinking about reliability is in relationship
to quality. While quality is a measure of variability (extending
to potential nonconformances-rejects) in the population
domain, reliability is a measure of variability (extending to
potential nonconformances-failures) in the population, time
and environmental conditions domain. In brief reliability can
be thought of as quality over time and environmental
conditions.
The most frequently used reliability measure for integrated
circuits is the failure rate expressed in percent per thousand
device hours (%/1000 hrs.). If the time interval is small the
failure rate is called "Instantaneous Failure Rate" [A (t)] or
"Hazard Rate." If the time interval is long (for example total
operational time) the failure rate is called "Cumulative Failure Rate."
The number of failures observed, taken over the number
of device hours accumulated at the end of the observation
period and expressed as a percent is called the point estimate
failure rate. This however, is a number obtained from observations from a sample of all integrated circuits. If we are to
use this number to estimate the failure rate of all integrated
circuits (total population), we need to say something about
the risk we are taking by using this estimate. A risk statement
is provided by the confidence level expressed together with
the failure rate. For example, a 0.1% per 1000 device hours
failure rate at 90% confidence level can be thought of as 90%
of the integrated circuits will have a failure rate below 0.1%/
1000 hours. Mathematically the failure rate at a given con-
A=Ae-!!!...
KT
B
... e - RH
...e -
C
E
Where A, B, C, '" & K are constants, T is temperature, RH
is relative humidity, E is the electric field, etc.
The most familiar form of this equation deals with the first
exponential which shows an Arrhenlous type relationship
of the failure rate versus the junction temperature of integrated circuits, while the causes of failure generally remain
the same. Thus, we can test devices near their maximum
junction temperatures, analyze the failures to assure that they
are the types that are accelerated by temperature and then
applying known acceleration factors, estimate the failure
rates for lower junction temperatures. Figure 7 shows an
MOTOROLA LINEAR/INTERFACE DEVICES
14-5
II
example of a curve which gives estimates of typical failure
rates versus temperature for integrated circuits.
~
Arrhenious type of equation: ,\ = Ae Where: ,\
=
=
=
=
=
=
A
e
"
K
T
TJ = TA
+
Where: TJ
TA
TC
9JA
Failure Rate
Constant
2.72
Activation Energy
Botzman's Constant
Temperature in Degrees Kelvin
9JAPo orTj = TC
=
=
=
=
0JC =
Po =
There are three important regions identified on this curve.
In Region A, the failure rate decreases with time and it is
generally called Infant mortality or early life failure region.
In Region B, the failure rate has reached a relatively constant
level and it is called constant failure rate or useful life
region. In the third region, the failure rate increases again
and it is called wearout region. Modern integrated circuits
generally do not reach the wearout portion of the curve when
operated under normal use conditions.
The wearout portion of the curve can usually be identified
by using highly accelerated test conditions. For modem integrated cincuits, even the useful life portion of the curve is
characterized by so few failures compared to the accumulated device hours, that the useful life portion of the curve
looks like a continuously decreasing failure rate curve (Figure
8, dotted line).
The Infant mortality portion of the curve is of most interest
to equipment manufacturers because of its impact on customer perception and potential warranty costs. In recent years
the infant mortality portion of the curve for integrated circuits,
and even equipment, has been drastically reduced (Figure
8, note arrows showing reduction of infant mortality). The
reduction was accomplished by improvements in technology,
emphasis on statistical process control, reliability modeling
in design and reliability in manufacturing (wafer reliability,
assembly reliability, etc.). In this respect many integrated circuit families have a continuously decreasing failure rate
curve.
Does a user still need to consider burn-in? For this question
to be answered properly the IC user must consider the target
failure rate of the equipment, apportioned to the components used, application environment, maturity of equipment
and components (new versus mature technology), the impact
of a failure (i.e. safety versus casual entertainment), maintenance costs, etc. Therefore, if the IC user is going through
these considerations for the first time, the question of burnin at the component level should be discussed during a uservendor interlace meeting.
A frequently asked question is about the reliability differences between plastic versus hermetic packaged integrated
circuits. In general, for all bipolar integrated circuits including
linear, the field removal rates are the same for normal use
environments, with many claims of plastic being better
because of their "solid block" structure.
The tremendous inc-<;lase in reliability of plastic packages
has been accomplished by the continuous improvements in
piece parts, materials and processes. Nevertheless differences can still be observed under highly accelerated environmental conditions. For example, if a bimetallic (gold wire
and aluminum metallization) system is used in plastic packages and they are placed on a high temperature operating
life test (125°C) then failures in the form of opens will be
observed after 10,000 hours of continuous operating life at
the gold to aluminum interlace. Packages, whether plastic or
hermetic, with a monometallic system (aluminum wire to aluminum metallization) will have no opens because of the
absence of the gold to aluminum interlace. As a result, a
difference in failure rates will be observable.
Differences in failure rates between plastics and hermetics
could be observed if devices from both packaging systems
are placed in an environment of 85°C; 85% RH with bias
applied. At some point in time plastic encapsulated ICs should
fail since they are considered pervious by moisture, (the failure mechanism being corrosion of the aluminum metallization) while hermetic packages should not fail since they are
considered impervious by moisture. The reason the word
+ 0JC
Po
Junction Temperature
Ambient Temperature
Case Temperature
Junction to Ambient Thermal Resistance
Junction to Case Thermal Resistance
Power Dissipation
Failure rate curves for equipment and devices can be represented by an idealized graph called the Bathtub Curve
(Figure 8).
100
10
,
NON-8URNED-IN PRODUCT
\
"\ r\
\
,
0.001
500 400 300
200
150
100
50
25
JUNCTION TEMPERATURE ·C
FIGURE 7 - TYPICAL FAILURE RATE versus
JUNCTION TEMPERATURE
- - - Typical Equipment Failure Rate
lt L"'.: ;-c~o-n-sta"'n~t" 'F-ai-lu-re-R-a-te-t~
III
Infant Mortality
or
Early Life
Region A
•••••
.?! Useful We
...... .,/-.. ___ ...
Region 8
Region C
TIME
FIGURE B - FAILURE RATE versus TIME (BATHTUB CURVE)
MOTOROLA LINEAR/INTERFACE DEVICES
14-6
"should" was used is because advances in plastic compounds, package piece parts, encapsulation processes and
final chip passivation have made plastic integrated circuits
capable of operating more than 5000 hours without failures
in an 85"C; 85% RH environment. Differences in failure rates
due to internal corrosion between plastic and hermetic packages may not be observable until well after 5000 operating
hours.
The aforementioned two examples had environments substantially more accelerated than normal life so these two
issues discussed are not even a factor under normal use
conditions. In addition, mechanisms inherent in hermetic
packages but absent in plastics were not even considered
here. Improved reliability of plastic encapsulated ICs has
decreased demand of hermetic packages to the point where
many devices are offered only in plastic packages. The user
then should feel comfortable in using the present plastic packaging systems.
A final question that is asked by the IC users is: how can
one be assured that the reliability of standard product does
not degrade over time? This is accomplished by our emphasis
on statistical process control, in-line reliability assessment
and reliability auditing by periodic and strategic sampling and
accelerated testing of the various integrated circuit device
packaging systems. A description of these audit programs
follows below.
Punishment Program), and RAP (Reliability Audit Program).
Currently, the Bipolar Analog Reliability Audit Program consists of a Weekly Reliability Audit and a Quarterly Reliability
Audit. The Weekly Reliability Audit consists of rapid (short
time) types of tests used to monitor the production lines on
a real time basis. This type of testing is performed at the
assemblyltest sites worldwide. It provides data for use as an
early warning system for identifying negative trends and triggering investigations for causes and corrective actions.
The Quarterly Reliability Audit consists of long term types
of tests and is performed at the U.S. Bipolar Analog Division
Center. The data obtained from the Quarterly Reliability Audit
is used to assure that the correlation between the short term
weekly tests and long term quarterly tests has not changed,
and a new failure mechanism has not appeared.
A large data base is established by combining the results
from the Weekly Reliability Audit with the results from the
Quarterly Reliability Audit. Such a data base is necessary for
estimating long term failure rates and evaluating potential
process improvement changes. Also, after a process
improvement change has been implemented, the Linear Reliability Audit Program provides a system for monitoring the
change and the past history data base for evaluating the
affect of the change.
Weekly Reliability Audit
Linear Reliability Audit
Program
The Weekly Reliability Audit is performed by each assemblyllest site worldwide. The site must have capability for final
electrical and quality assurance testing; reliability testing and
first level of failure analysis. The results are reviewed on a
continuous basis and corrective action is taken when appropriate. The results are accumulated on a monthly basis and
published.
The Reliability Audit test plan is as follows:
The reliability of a product is a function of design and manufacturing. Inherent reliability is the reliability which a product
would have if there were no imperfections in the materials,
piece parts and manufacturing processes of the product. The
presence of imperfections gives risk to the actual reliability
of the product.
Motorola uses on-line and off-line reliability monitoring in
an attempt to prevent situations which could degrade reliability. On-line reliability monitoring is at the wafer and assembly levels while off-line reliability monitoring involves reliability
assessment of the finished product through the use of accelerated environmental tests.
Continuous monitoring of the reliability of Linear integrated
circuits is accompished by the Linear Reliability Audit Program, which is designed to compare the actual reliability to
that specified. This objective is accomplished by periodic and
strategic sampling of the various integrated circuit device
packaging systems. The samples are tested by subjecting
them to accelerated environmental conditions and the results
are reviewed for unlavorable trends that would indicate a
degradation of the reliability or quality of a particular packaging system. This provides the trigger mechanism for initiating an investigation for cause and corrective action. Concurrently, in order to provide a minimum of interruption of
prOC/uct flow and assure that the product is fit for use, a lot
by lot sampling or a nondestructive type 100% screen is used
to assure that a particular packaging system released for
shipment does have the expected reliability. This rigorous
surveillance is continued until there is sufficient proof (many
consecutive lots) that the problem has been corrected.
The Standard Logic and Analog Integrated Circuits Group
has used reliability audits since the late sixties. Such programs have been identified by acronyms such as CRP (Consumer Reliability Program), EPIIC (Environmental Package
Indicators for Integrated Circuits), LAPP (Linear Accelerated
Electrical Measurements: Performed initially and after each
reliability test, consists of critical parameters and functional
testing at 25"C on a go-no-go basis.
High Temperature Operating Life: Performed to detect failure mechanisms that are accelerated by a combination of
temperature and electric fields. Procedure and conditions are
per the MIL-STD-883, Method 1015 with an ambient temperature of 145"C for 40 hours or equivalent based on a 1 .0eV
activation energy and the Arrhenious equation.
Approximate Accelerated Factors
145°C
125°C
125"<:
sooC
4
1
4000
1000
Temperature CycllnglThermal Shock: Performed to detect
mechanisms related to thermal expansion and contraction of
dissimilar materials, etc. Procedures and conditions are per
MIL-STD-883, Methods 1010 or 1011, with ambient temperatures of -65°C to + 150°C or -40°C to + 125°C (JEDECSTD-22-Al04), minimum of 100 cycles.
Pressure Temperature Humidity (Autoclave): Performed
to measure the moisture resistance of plastic encapsulated
packages. It detects corrosion type failure mechanisms due
to free ionic contaminants that may have entered the package
during the manufacturing processes. Conditions are per
MOTOROLA LlNEARIINTERFACE DEVICES
14-7
III
JEDEC-STD-22, Method 102, a temperature of 121 ·C, steam
environment and 15psig. The duration of the test is 48 hours.
Pressure Temperature Humidity (Autoclave): Performed
to measure the moisture reSistance of plastic encapsulated
packages. It detects corrosion type failure mechanism due
to free ionic contaminants that may have entered the package
during the manufacturing processes. Conditions are per
JEDEC-STD-22, Method 102, a temperature of 121 ·C, steam
environment and 15psig. The duration of the test is for 96
hours, with a 4B hour interim readout.
Analysis Procedure: Devices failing to meet the electrical
criteria aller being subjected to an accelerated environment
type test are verified and characterized electrically, then submitted for failure analysis.
Quarterly Reliability Audit
Pressure Temperature Humidity Bias (Biased Autoclave): This test measures the moisture resistance of plastic
encapsulated packages. It detects corrosion type failure
mechanism due to free and bounded ionic contaminants that
may have entered the package during the manufacturing processes, or they may be bound in the materials of the integrated Circuit packaging system and activated by the moisture
and the applied electriC fieldS. Conditions are per JEDECSTD-22, Method 102, with bias applied. Temperature is
121·C, steam environment and 15psig. Duration is for 32
hours, with a 16 hour interim readout. This test detects the
same type of failures as the Temperature Humidity Bias
(B5·C, 85% RH, with bias) test, only faster. The acceleration
factor between PTHB and THB is between 20 and 40 times,
depending on the type of corrosion mechanism, electric field
and packaging system.
The Quarterly Bipolar Analog Reliability Audit Program is
performed at the U.S. Bipolar Analog Division Center. This
testing is designed to assure that the correlation between the
short term weekly tests and the longer quarterly tests has
not changed and that no new failure mechanisms have
appeared. It also provides additional long term information
for a data base for estimating failure rates and evaluation of
potential process improvement changes.
Electrical Measurements: Performed initially and at interim
readouts, consist of all standard dc and functional parameters
at 25·C, measured on a go-no-go basis.
High Temperature Operating Life Test: Performed to detect
failure mechanisms that are accelerated by a combination of
temperature and electric fields. Procedure and conditions are
per MIL-STD-883, Method 1015, with an ambient temperature of 145·C for 40 and 250 hours or equivalent, based on
1.0eVactivation energy and the Arrhenious equation.
Temperature, Humidity and Bias (THB): This test measures the moisture resistance of plastic encapsulated packages. It detects corrosion type failure mechanisms due to
free and bounded ionic contaminants that may have entered
the package during the manufacturing processes, or they may
be bound in the materials of the integrated circuit packaging
system and activated by moisture and the applied electric
fields. Conditions are per JEDEC-STD-22, Method 102 (B5°C,
B5% RH), with bias applied. The duration is for 100B hours,
with a 504 hour interim readout. The acceleration factor
between THB (85·C, 85% RH and bias) and the 30·C, 90%
RH is typically 40-50 times, depending on the type of corrosion mechanism, electric field and packaging system.
Approximate Acceleration Factors
145·C
125·C
12S·C
4
1
SO·C
4000
1000
Temperature CyclinglThermal Shock: Performed to detect
mechanisms related to thermal expansion and contraction,
mismatch effects, etc. Procedure and conditions are per MILSTD-8B3, Methods 1010 or 1011, with ambienttemperatilres
of -65·C to + 150·C or -40·C to + 125°C (JEDEC-STD22-A104) for 100 and 1000 cycles. Temperature Cycling and
Thermal Shock are used interchangeably.
Analysis Procedure: Devices failing to meet the electrical
criteria aller being subjected to an accelerated environment
type test are verified and characterized electrically, then submitted for failure analysis.
III
MOTOROLA LINEAR/INTERFACE DEVICES
14-8
Applications Literature
III
Applications Literature
AN703
Designing Digitally-Controlled Power
Supplies
The application literature listed in this section has been
prepared to acquaint the circuits and systems engineer with
Motorola Linear integrated circuits and their applications. To
obtain copies of the notes, simply list the publication number
or numbers and send your request on your company letterhead to: Technical Information Center, Motorola Semiconductor Products Inc., P.O. Box 20912, Phoenix, Arizona
85036.
This application note shows two design approaches; a
basic low voltage supply using an inexpensive MC1723 voltage regulator and a high current, high voltage, supply using
the MC1466 floating regulator with optoelectronic isolation.
Various circuit options are shown to allow the designer maximum flexibility in an application.
Application Note Abstracts
AN708A
AN273A
This report discusses many line driver and receiver design
considerations such as system description, definition of
terms, important parameter measurements, design procedures and application examples. An extensive line of devices
is available from Motorola to provide the designer with the
tools to implement the data transmission requirements necessary for.almost every type of transmission system.
Getting More Value Out of an
Integrated Operational Amplifier
Data Sheet
The operational amplifier has become a basic building
block in present day solid state electronic systems. The purpose of this application note is to provide a better understanding of the open loop characteristics of the amplifier and
their significance to overall circuit operation. Also each
parameter is defined and reviewed with respect to closed
loop considerations. The importance of loop gain stability and
bandwidth is discussed at length. Input qffset voltage and
current and resultant drift effects in the circuit are also
reviewed with respect to closed loop operation.
AN489
AN727
Line Driver and Receiver Considerations
Television Horizontal APC/AFC Loops:
The Last 10 Percent
A discussion of some common problems that may be
encountered with the design of Horizontal APC/AFC loops
and methods to avoid or overcome them.
AN778
Analysis and Basic Operation of the
MC1595
Mounting Techniques for Power
Semiconductors
The MC1595 monolithic linear four-quadrant multiplier is
discussed. The equations for the analysis are given along
with performance that is characteristic of the device. A few
baSic applications are given to assist the designer in system
design.
For reliable operation, semiconductors must be properly
mounted. Discussed are aspects of preparing the mounting
surface, using thermal compounds, insulation techniques,
fastening techniques, handling of leads and pins, and evaluation methods for the thermal system.
AN513
AN781A
A High Gain Integrated Circuit RF-IF
Amplifier with Wide Range AGC
Revised Data Interface Standards
This note describes the operation and application of the
MC1590G, a monolithic RF-IF amplifier. Included are several
applications for IF amplifiers, a mixer, video amplifiers, single
and two-stage RF amplifiers.
This application note provides a brief overview and
comparison of communication interface standards
EIA-232-C, EIA-422A, EIA-423, EIA-449 and EIA-485 for
the hardware designer. A listing of the standard's specifications and appropriate Motorola devices are included.
AN531
AN829
MC1596 Balanced Modulator
The MC1596 monolithic circuit is a highly versatile communications building block. In this note, both theoretical and
practical information are given to aid the designer in the use
of this part. Applications include modulators/demodulators for
AM, SSB, and suppressed carrier AM; frequency doublers
and HFIVHF double balanced mixers.
AN879
AN545A
Application of the MC1374 TV Modulator
The MC1374 was designed for use in applications where
separate audio and composite video signals are available,
which need converting to a high quality VHF television signal.
It's idealy suited as an output device for subscription TV
decoders, video disk and video tape players.
Television Video IF Amplifier Using
Integrated Circuits
Monomax - Application of the MC13001
Monochrome Television Integrated
Circuit
This applications note considers the requirements of the
video IF amplifier section of a television receiver, and gives
working circuit schematics using integrated circuits which
have been specifically designed for consumer oriented products. The integrated circuits used are the MC1350, MC1352,
and the MC1330.
This application note presents a complete 12" black and
white line-operated television receiver, including artwork for
the printed circuit board. It is intended to provide a good
starting point for the first-time user. Some of the most common pitfalls are overcome, and the significance of component
selections and locations are discussed.
AN587
AN917
Analysis and DeSign of the Op Amp
Current Source
A voltage controlled current source utilizing an operational
amplifier is discussed. Expressions for the transfer function
and output impedances are developed using both the ideal
and non-ideal op amp models. A section on analysis of the
effects of op amp parameters and temperature variations on
circuit performance is presented.
Reading and Writing in Floppy Disk
Systems Using Motorola Integrated
Circuits
The floppy disk system has become a widely used means
for storing and retrieving both programs and data. A floppy
disk drive requires precision controls to position and load the
head as well as defined read/write signals in order to be a
viable system. This application note describes the use of the
MOTOROLA LINEAR/INTERFACE DEVICES
15-2
APPLICATIONS LITERATURE (continued)
MC3469 and MC3471 Write Control ICs and the MC3470
Read Amplifier which provide the necessary head and erase
control, timing functions, and filtering.
AN920A
designs is becoming more pronounced over that of linear
regulators. This is primarily due to the need for reductions in
size and weight which dictate an ever increasing demand for
higher power conversion efficiency from a battery pack. When
designing at the board level it sometimes becomes necessary
to generate a constant output voltage that is less than that
of the battery. The step-down Circuit will perform this function
efficiently. However, as the battery discharges, its terminal
voltage will eventually fall below the desired output, and in
order to utilize the remaining battery energy, the step-up circuit will be required.
Theory and Applications of the
MC34063 and ,.,.A78S40 Switching
Regulator Control Circuits
This paper describes in detail the principle of operation of
the MC34063 and ILA7BS40 switching regulator subsystems.
Several converter design examples and numerous applications circuits with test data are included.
AN926
AN957
Techniques for Improving the Settling
Time of a DAC & Op Amp Combination
Interfacing the MC3401 B speakerphone circuit to the
MC34010 series of telephone circuits is described in this
application note. The series includes the MC34010,
MC34011, MC34013, and the new "A" version of each of
those. The interface is applicable to existing designs, as well
as to new designs.
This application note describes some techniques which
were tested for the purpose of optimizing settling time of a
DAClop amp combination. The objective of the experimentation was to obtain a settling time of under 1.0 ILS for 12 bit
(±0.012%) accuracy. Op amps chosen for this exercise are
high speed, yet inexpensive monolithic devices.
AN932
AN958
Application of the MC13n
Color Encoder
AN959
A Variety of Uses for the MC34012 and
MC34017 Tone Ringers
A Speakerphone with Receive Idle Mode
The MC3401 B speakerphone system operates on the principle of comparing the transmit and receive signals to determine which is stronger, and then switching the circuit into
that mode. Under conditions where noise from the telephone
line (in the receive path) exceeds the background noise in
the transmit path, the speakerphone will switch easily, or even
lock, into the receive mode. Under these conditions the conversation will sound "dead" to the party at the far-end. It will
also be more difficult for the near-end party to activate the
transmit channel since the transmit detection is at the output
of the transmit attenuator, which will be at maximum attenuation during this time. The addition of a receive idle mode
can alleviate this problem by ensuring that the transmit and
receive gains will be approximately equal when no voice signals are present. This allows the far-end party to hear ambient
noises, and also increases the sensitivity to transmit signals.
The MC34012 and MC34017 electronic tone ringers were
developed to replace the bulky electromechanical bell assembly of a telephone, while providing the same basic function.
When used in conjunction with a piezo ceramic transducer,
these circuits will output a warbling sound in response to the
applied ringing voltage. With some imagination, however, the
circuits can be used in a variety of ways, including non-telephone applications, - wherever an alerting sound or indication is required. Applications include appliance buzzers,
burglar alarms, safety alerting functions, special sound
effects, visual ringing indicators, and others. The circuits in
this application note show how a variety of effects can be
obtained.
AN937
Transmit Gain Adjustments for the
MC34014 Speech Network
The MC34014 telephone speech network provides for
direct connection to an electret microphone and to Tip and
Ring. In between, the circuit provides gain, drive capability,
and determination of the ac impedance for compatability with
the telephone lines. Since different microphones have different sensitivity levels, different gain levels are required from
the microphone to the Tip and Ring lines. This application
note will discuss how to change the gain level to suit a particular microphone while not affecting the other circuit
parameters.
The MCI377 is an economical, high quality, RGB encoder
for NTSC or PAL applications. It accepts red, green, blue,
and composite sync inputs and delivers IVpp composite
NTSC or PAL video output into a 75 ohm load. It can provide
its own color oscillator and burst gating, or it can be easily
driven from extemal sources. Performance virtually equal to
high cost studio equipment is possible with common color
receiver components. The following note is intended to
explain the operation of the device and guide the prospective
user in selecting the optimum circuit for his needs.
AN933
Interfacing the Speakerphone to the
MC34010/11/13 Speech Networks
A Telephone Ringer Which Complies
with FCC and EIA Impedance Standards
AN960
The MC34012 and MC34017 Tone Ringers are deSigned
to replace the bulky bell assembly of a telephone, while providing the same function and performance under a variety of
conditions. The operational requirements spelled out by the
FCC and the EIA, simply stated, are that a ringer circuit MUST
function when a ringing signal is provided, and MUST NOT
ring when other signals (speech, dialing signals, noise) are
on the line. This application note discusses how the IC's
operate, the specific operational requirements to be met, and
how they are met. Only "on-hook" requirements are discussed since off-hook operation is not applicable.
Equalization of DTMF Signals Using
the MC34014
This application note will describe how to obtain equalization (line length compensation) of the DTMF dialing tones
using the MC34014 speech network. While the MC34014
does not have an intemal dialer, it has the interface for a
dialer so as to provide the means for putting the DTMF tones
onto the Tip & Ring lines. The Equalization amplifier, whose
gain varies with loop current, was meant primarily to equalize
the speech signals. However, by adding one resistor, it can
be used to equalize the DTMF signals as well.
A Unique Converter Configuration
Provides Step-Up/Down Functions
AN963
Interfacing the MC6108 AID to a
Microprocessor - It's Easier Than
You Think!
The use of switching regulators in new portable equipment
This application note will supplement information in the
AN954
MOTOROLA LlNEARIINTERFACE DEVICES
15-3
APPLICATIONS LITERATURE (continued)
MC6l08 data sheet by describing the detailed requirements
for interfacing the Analog-to-Digital converter to a microprocessor. The hardware requirements, and the programming
necessary to execute a conversion and read the data, in
several different configurations, will be discussed. The microprocessor used in developing this application note is the
MC6802 (operating off a 3.58 MHz crystal), a repres!lntative
sample of the MC6800 family.
Because of the short conversion time of the MC6108,
"Wait" states and "Wait for Interrupt" instructions are generally not needed with most microprocessors. The microprocessor can issue a CONVERT instruction, and immediately
thereafter, issue a READ instruction, regardless of whether
the MC6l 08 is read through a port (MC682l), or read off the
bus directly.
AN976
ered featurephone, a line-powered featurephone with a
booster (for using the speakerphone on long lines), and one
powered from a power supply. The circuits are nearly identical, except for the Tip/Ring interface. Their performance,
however, differs noticeably, particularly in the low loop current
range. Initially, the discussion will focus on the line-powered
circuit.
ANE002
The architecture is based on the fly-back mode working in
a free switching mode. Frequency range varies between 20
kHz at full load and 70 kHz in the standby condition (also
called sleep-mode). Input power is from the line (220 Vac)
and is completely isolated from the output. Control and regulation are achieved by the TDA4601.
The power supply presents a linear foldback characteristic
and is short circuit proof. An undervoltage inhibit provides a
protection against low line voltage.
The complete system is an excellent compromise between
complexity, cost and performance.
A New High Performance Current Mode
Controller Teams Up with Current
Sensing Power MOSFETs
A new current mode control IC that interfaces directly with
current sensing power MOSFETs is described. Its second
generation architecture is shown to provide a variety of
advantages in current mode power supplies. The most notable of these advantages is a "loss less" current sensing
capability that is provided when used with current sensing
MOSFETs.
Included in the discussion are subtle factors to watch out
for in practical designs, and an applications example.
AN980
AN-HK-07
Low Power FM Dual Conversion
Receivers MC3362/3/4
Article Reprints
A Simplified Power Supply Design Using
the TL494 Control Circuit
ARl15
A bipolar quad op amp having a JFET-like 4.5 MHz
bandwidth resolves common mode input voltages and sinks
output current close to the ground rail - even with a single
+ 5.0 V supply.
This describes the operation and characteristics of the
TL494 Switchmode'" Voltage Regulator and shows its application in a 400-walt off-line power supply.
The TL494 is a fixed-frequency pulse width modulation
control circuit, incorporating the primary building blocks
required for the control of a switching power supply.
AN1002
A High Performance Manually Tuned
AM Stereo Receiver for Automotive
Application Using MOTOROLA ICs
MC13021, MC13020 and MC13041
This application note presents a high performance manually tuned automotive AM stereo receiver design using
MOTOROLA AM stereo ICs; MC13021, MC13020 and the
MC1304l. It is intended to provide radio design engineers
with a good start in automotive AM stereo receiver design.
The note consists of two parts; the first describes all relative
important principles of a manually tuned AM stereo receiver,
and the second part details the AM stereo receiver design
for automotive application.
Motorola has recently developed a series of low power FM
dual conversion receivers in monolithic silicon integrated circuits. The MC336213/4 series is ideal for application in cordless phones, narrowband voice and data receivers, CB and
amateur band radios, RF security devices, and other applications through 150 MHz.
AN983
130 W Ringing Choke Power Supply
Using TDA4601
Engineering Bulletin Abstracts
EB20
A Handsfree Featurephone Design
Using the MC34114 Speech Network
and the MC34018 Speakerphone ICs
Multiplier/Op Amp Circuit Detects True
RMS
Two op amps and two multipliers are used in the circuit
described in EB20 to obtain the true rms of an input voltage
ranging from 2.0 to 10 Vpk.
This application note describes the procedure for combining the MC34114 speech network with the MC34018 speakerphone circuit into a featurephone which includes the following functions: ten number memory pulse/tone dialer, tone
ringer, a "Privacy" (Mike Mute) function, and line length compensation for both handset and speakerphone operation.
Three circuits are developed in this discussion: a line-pow-
EB51
Successive Approximation BCD AID
Converter
A successive approximation AID converter in which a digital-to-analog converter in a feedback loop produces a BCD
digital output from an analog input is described in EB5l.
MOTOROLA LINEAR/INTERFACE DEVICES
15-4
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Index/Cross Reference
It
Amplifiers
and Comparators
..
Power Circuits
II
II
II
•II
II
1m
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lEI
III
•II
Power/Motor
Control Circuits
Voltage References
Data Conversion
Interface Circuits
Communication Circuits
Consumer
Electronic Circuits
Automotive
Electronic Circuits
Other Linear Circuits
Surface Mount
Technology
Packaging Information
Quality and
Reliability Assurance
Applications Literature
16941>-7
4188
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : No XMP Toolkit : Adobe XMP Core 4.2.1-c041 52.342996, 2008/05/07-21:37:19 Create Date : 2017:07:29 19:41:35-08:00 Modify Date : 2017:07:29 20:43:23-07:00 Metadata Date : 2017:07:29 20:43:23-07:00 Producer : Adobe Acrobat 9.0 Paper Capture Plug-in Format : application/pdf Document ID : uuid:50bc11ad-d9de-974a-83e5-fdbed6b3d802 Instance ID : uuid:bcbff208-589c-8342-af84-ba10d144323d Page Layout : SinglePage Page Mode : UseNone Page Count : 1542EXIF Metadata provided by EXIF.tools